1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * driver for Microchip PQI-based storage controllers 4 * Copyright (c) 2019-2022 Microchip Technology Inc. and its subsidiaries 5 * Copyright (c) 2016-2018 Microsemi Corporation 6 * Copyright (c) 2016 PMC-Sierra, Inc. 7 * 8 * Questions/Comments/Bugfixes to storagedev@microchip.com 9 * 10 */ 11 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/pci.h> 15 #include <linux/delay.h> 16 #include <linux/interrupt.h> 17 #include <linux/sched.h> 18 #include <linux/rtc.h> 19 #include <linux/bcd.h> 20 #include <linux/reboot.h> 21 #include <linux/cciss_ioctl.h> 22 #include <linux/blk-mq-pci.h> 23 #include <scsi/scsi_host.h> 24 #include <scsi/scsi_cmnd.h> 25 #include <scsi/scsi_device.h> 26 #include <scsi/scsi_eh.h> 27 #include <scsi/scsi_transport_sas.h> 28 #include <asm/unaligned.h> 29 #include "smartpqi.h" 30 #include "smartpqi_sis.h" 31 32 #if !defined(BUILD_TIMESTAMP) 33 #define BUILD_TIMESTAMP 34 #endif 35 36 #define DRIVER_VERSION "2.1.20-035" 37 #define DRIVER_MAJOR 2 38 #define DRIVER_MINOR 1 39 #define DRIVER_RELEASE 20 40 #define DRIVER_REVISION 35 41 42 #define DRIVER_NAME "Microchip SmartPQI Driver (v" \ 43 DRIVER_VERSION BUILD_TIMESTAMP ")" 44 #define DRIVER_NAME_SHORT "smartpqi" 45 46 #define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor)) 47 48 #define PQI_POST_RESET_DELAY_SECS 5 49 #define PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS 10 50 51 MODULE_AUTHOR("Microchip"); 52 MODULE_DESCRIPTION("Driver for Microchip Smart Family Controller version " 53 DRIVER_VERSION); 54 MODULE_VERSION(DRIVER_VERSION); 55 MODULE_LICENSE("GPL"); 56 57 struct pqi_cmd_priv { 58 int this_residual; 59 }; 60 61 static struct pqi_cmd_priv *pqi_cmd_priv(struct scsi_cmnd *cmd) 62 { 63 return scsi_cmd_priv(cmd); 64 } 65 66 static void pqi_verify_structures(void); 67 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info, 68 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason); 69 static void pqi_ctrl_offline_worker(struct work_struct *work); 70 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info); 71 static void pqi_scan_start(struct Scsi_Host *shost); 72 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 73 struct pqi_queue_group *queue_group, enum pqi_io_path path, 74 struct pqi_io_request *io_request); 75 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 76 struct pqi_iu_header *request, unsigned int flags, 77 struct pqi_raid_error_info *error_info); 78 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 79 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 80 unsigned int cdb_length, struct pqi_queue_group *queue_group, 81 struct pqi_encryption_info *encryption_info, bool raid_bypass, bool io_high_prio); 82 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info, 83 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 84 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 85 struct pqi_scsi_dev_raid_map_data *rmd); 86 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info, 87 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 88 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 89 struct pqi_scsi_dev_raid_map_data *rmd); 90 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info); 91 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info); 92 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs); 93 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info); 94 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info); 95 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info); 96 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 97 struct pqi_scsi_dev *device, u8 lun, unsigned long timeout_msecs); 98 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info); 99 100 /* for flags argument to pqi_submit_raid_request_synchronous() */ 101 #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1 102 103 static struct scsi_transport_template *pqi_sas_transport_template; 104 105 static atomic_t pqi_controller_count = ATOMIC_INIT(0); 106 107 enum pqi_lockup_action { 108 NONE, 109 REBOOT, 110 PANIC 111 }; 112 113 static enum pqi_lockup_action pqi_lockup_action = NONE; 114 115 static struct { 116 enum pqi_lockup_action action; 117 char *name; 118 } pqi_lockup_actions[] = { 119 { 120 .action = NONE, 121 .name = "none", 122 }, 123 { 124 .action = REBOOT, 125 .name = "reboot", 126 }, 127 { 128 .action = PANIC, 129 .name = "panic", 130 }, 131 }; 132 133 static unsigned int pqi_supported_event_types[] = { 134 PQI_EVENT_TYPE_HOTPLUG, 135 PQI_EVENT_TYPE_HARDWARE, 136 PQI_EVENT_TYPE_PHYSICAL_DEVICE, 137 PQI_EVENT_TYPE_LOGICAL_DEVICE, 138 PQI_EVENT_TYPE_OFA, 139 PQI_EVENT_TYPE_AIO_STATE_CHANGE, 140 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE, 141 }; 142 143 static int pqi_disable_device_id_wildcards; 144 module_param_named(disable_device_id_wildcards, 145 pqi_disable_device_id_wildcards, int, 0644); 146 MODULE_PARM_DESC(disable_device_id_wildcards, 147 "Disable device ID wildcards."); 148 149 static int pqi_disable_heartbeat; 150 module_param_named(disable_heartbeat, 151 pqi_disable_heartbeat, int, 0644); 152 MODULE_PARM_DESC(disable_heartbeat, 153 "Disable heartbeat."); 154 155 static int pqi_disable_ctrl_shutdown; 156 module_param_named(disable_ctrl_shutdown, 157 pqi_disable_ctrl_shutdown, int, 0644); 158 MODULE_PARM_DESC(disable_ctrl_shutdown, 159 "Disable controller shutdown when controller locked up."); 160 161 static char *pqi_lockup_action_param; 162 module_param_named(lockup_action, 163 pqi_lockup_action_param, charp, 0644); 164 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n" 165 "\t\tSupported: none, reboot, panic\n" 166 "\t\tDefault: none"); 167 168 static int pqi_expose_ld_first; 169 module_param_named(expose_ld_first, 170 pqi_expose_ld_first, int, 0644); 171 MODULE_PARM_DESC(expose_ld_first, "Expose logical drives before physical drives."); 172 173 static int pqi_hide_vsep; 174 module_param_named(hide_vsep, 175 pqi_hide_vsep, int, 0644); 176 MODULE_PARM_DESC(hide_vsep, "Hide the virtual SEP for direct attached drives."); 177 178 static int pqi_disable_managed_interrupts; 179 module_param_named(disable_managed_interrupts, 180 pqi_disable_managed_interrupts, int, 0644); 181 MODULE_PARM_DESC(disable_managed_interrupts, 182 "Disable the kernel automatically assigning SMP affinity to IRQs."); 183 184 static unsigned int pqi_ctrl_ready_timeout_secs; 185 module_param_named(ctrl_ready_timeout, 186 pqi_ctrl_ready_timeout_secs, uint, 0644); 187 MODULE_PARM_DESC(ctrl_ready_timeout, 188 "Timeout in seconds for driver to wait for controller ready."); 189 190 static char *raid_levels[] = { 191 "RAID-0", 192 "RAID-4", 193 "RAID-1(1+0)", 194 "RAID-5", 195 "RAID-5+1", 196 "RAID-6", 197 "RAID-1(Triple)", 198 }; 199 200 static char *pqi_raid_level_to_string(u8 raid_level) 201 { 202 if (raid_level < ARRAY_SIZE(raid_levels)) 203 return raid_levels[raid_level]; 204 205 return "RAID UNKNOWN"; 206 } 207 208 #define SA_RAID_0 0 209 #define SA_RAID_4 1 210 #define SA_RAID_1 2 /* also used for RAID 10 */ 211 #define SA_RAID_5 3 /* also used for RAID 50 */ 212 #define SA_RAID_51 4 213 #define SA_RAID_6 5 /* also used for RAID 60 */ 214 #define SA_RAID_TRIPLE 6 /* also used for RAID 1+0 Triple */ 215 #define SA_RAID_MAX SA_RAID_TRIPLE 216 #define SA_RAID_UNKNOWN 0xff 217 218 static inline void pqi_scsi_done(struct scsi_cmnd *scmd) 219 { 220 pqi_prep_for_scsi_done(scmd); 221 scsi_done(scmd); 222 } 223 224 static inline void pqi_disable_write_same(struct scsi_device *sdev) 225 { 226 sdev->no_write_same = 1; 227 } 228 229 static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2) 230 { 231 return memcmp(scsi3addr1, scsi3addr2, 8) == 0; 232 } 233 234 static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device) 235 { 236 return !device->is_physical_device; 237 } 238 239 static inline bool pqi_is_external_raid_addr(u8 *scsi3addr) 240 { 241 return scsi3addr[2] != 0; 242 } 243 244 static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info) 245 { 246 return !ctrl_info->controller_online; 247 } 248 249 static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info) 250 { 251 if (ctrl_info->controller_online) 252 if (!sis_is_firmware_running(ctrl_info)) 253 pqi_take_ctrl_offline(ctrl_info, PQI_FIRMWARE_KERNEL_NOT_UP); 254 } 255 256 static inline bool pqi_is_hba_lunid(u8 *scsi3addr) 257 { 258 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID); 259 } 260 261 #define PQI_DRIVER_SCRATCH_PQI_MODE 0x1 262 #define PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED 0x2 263 264 static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(struct pqi_ctrl_info *ctrl_info) 265 { 266 return sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_PQI_MODE ? PQI_MODE : SIS_MODE; 267 } 268 269 static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info, 270 enum pqi_ctrl_mode mode) 271 { 272 u32 driver_scratch; 273 274 driver_scratch = sis_read_driver_scratch(ctrl_info); 275 276 if (mode == PQI_MODE) 277 driver_scratch |= PQI_DRIVER_SCRATCH_PQI_MODE; 278 else 279 driver_scratch &= ~PQI_DRIVER_SCRATCH_PQI_MODE; 280 281 sis_write_driver_scratch(ctrl_info, driver_scratch); 282 } 283 284 static inline bool pqi_is_fw_triage_supported(struct pqi_ctrl_info *ctrl_info) 285 { 286 return (sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED) != 0; 287 } 288 289 static inline void pqi_save_fw_triage_setting(struct pqi_ctrl_info *ctrl_info, bool is_supported) 290 { 291 u32 driver_scratch; 292 293 driver_scratch = sis_read_driver_scratch(ctrl_info); 294 295 if (is_supported) 296 driver_scratch |= PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED; 297 else 298 driver_scratch &= ~PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED; 299 300 sis_write_driver_scratch(ctrl_info, driver_scratch); 301 } 302 303 static inline void pqi_ctrl_block_scan(struct pqi_ctrl_info *ctrl_info) 304 { 305 ctrl_info->scan_blocked = true; 306 mutex_lock(&ctrl_info->scan_mutex); 307 } 308 309 static inline void pqi_ctrl_unblock_scan(struct pqi_ctrl_info *ctrl_info) 310 { 311 ctrl_info->scan_blocked = false; 312 mutex_unlock(&ctrl_info->scan_mutex); 313 } 314 315 static inline bool pqi_ctrl_scan_blocked(struct pqi_ctrl_info *ctrl_info) 316 { 317 return ctrl_info->scan_blocked; 318 } 319 320 static inline void pqi_ctrl_block_device_reset(struct pqi_ctrl_info *ctrl_info) 321 { 322 mutex_lock(&ctrl_info->lun_reset_mutex); 323 } 324 325 static inline void pqi_ctrl_unblock_device_reset(struct pqi_ctrl_info *ctrl_info) 326 { 327 mutex_unlock(&ctrl_info->lun_reset_mutex); 328 } 329 330 static inline void pqi_scsi_block_requests(struct pqi_ctrl_info *ctrl_info) 331 { 332 struct Scsi_Host *shost; 333 unsigned int num_loops; 334 int msecs_sleep; 335 336 shost = ctrl_info->scsi_host; 337 338 scsi_block_requests(shost); 339 340 num_loops = 0; 341 msecs_sleep = 20; 342 while (scsi_host_busy(shost)) { 343 num_loops++; 344 if (num_loops == 10) 345 msecs_sleep = 500; 346 msleep(msecs_sleep); 347 } 348 } 349 350 static inline void pqi_scsi_unblock_requests(struct pqi_ctrl_info *ctrl_info) 351 { 352 scsi_unblock_requests(ctrl_info->scsi_host); 353 } 354 355 static inline void pqi_ctrl_busy(struct pqi_ctrl_info *ctrl_info) 356 { 357 atomic_inc(&ctrl_info->num_busy_threads); 358 } 359 360 static inline void pqi_ctrl_unbusy(struct pqi_ctrl_info *ctrl_info) 361 { 362 atomic_dec(&ctrl_info->num_busy_threads); 363 } 364 365 static inline bool pqi_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 366 { 367 return ctrl_info->block_requests; 368 } 369 370 static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info) 371 { 372 ctrl_info->block_requests = true; 373 } 374 375 static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info) 376 { 377 ctrl_info->block_requests = false; 378 wake_up_all(&ctrl_info->block_requests_wait); 379 } 380 381 static void pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 382 { 383 if (!pqi_ctrl_blocked(ctrl_info)) 384 return; 385 386 atomic_inc(&ctrl_info->num_blocked_threads); 387 wait_event(ctrl_info->block_requests_wait, 388 !pqi_ctrl_blocked(ctrl_info)); 389 atomic_dec(&ctrl_info->num_blocked_threads); 390 } 391 392 #define PQI_QUIESCE_WARNING_TIMEOUT_SECS 10 393 394 static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info) 395 { 396 unsigned long start_jiffies; 397 unsigned long warning_timeout; 398 bool displayed_warning; 399 400 displayed_warning = false; 401 start_jiffies = jiffies; 402 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * HZ) + start_jiffies; 403 404 while (atomic_read(&ctrl_info->num_busy_threads) > 405 atomic_read(&ctrl_info->num_blocked_threads)) { 406 if (time_after(jiffies, warning_timeout)) { 407 dev_warn(&ctrl_info->pci_dev->dev, 408 "waiting %u seconds for driver activity to quiesce\n", 409 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 410 displayed_warning = true; 411 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * HZ) + jiffies; 412 } 413 usleep_range(1000, 2000); 414 } 415 416 if (displayed_warning) 417 dev_warn(&ctrl_info->pci_dev->dev, 418 "driver activity quiesced after waiting for %u seconds\n", 419 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 420 } 421 422 static inline bool pqi_device_offline(struct pqi_scsi_dev *device) 423 { 424 return device->device_offline; 425 } 426 427 static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info) 428 { 429 mutex_lock(&ctrl_info->ofa_mutex); 430 } 431 432 static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info) 433 { 434 mutex_unlock(&ctrl_info->ofa_mutex); 435 } 436 437 static inline void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info) 438 { 439 mutex_lock(&ctrl_info->ofa_mutex); 440 mutex_unlock(&ctrl_info->ofa_mutex); 441 } 442 443 static inline bool pqi_ofa_in_progress(struct pqi_ctrl_info *ctrl_info) 444 { 445 return mutex_is_locked(&ctrl_info->ofa_mutex); 446 } 447 448 static inline void pqi_device_remove_start(struct pqi_scsi_dev *device) 449 { 450 device->in_remove = true; 451 } 452 453 static inline bool pqi_device_in_remove(struct pqi_scsi_dev *device) 454 { 455 return device->in_remove; 456 } 457 458 static inline int pqi_event_type_to_event_index(unsigned int event_type) 459 { 460 int index; 461 462 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++) 463 if (event_type == pqi_supported_event_types[index]) 464 return index; 465 466 return -1; 467 } 468 469 static inline bool pqi_is_supported_event(unsigned int event_type) 470 { 471 return pqi_event_type_to_event_index(event_type) != -1; 472 } 473 474 static inline void pqi_schedule_rescan_worker_with_delay(struct pqi_ctrl_info *ctrl_info, 475 unsigned long delay) 476 { 477 if (pqi_ctrl_offline(ctrl_info)) 478 return; 479 480 schedule_delayed_work(&ctrl_info->rescan_work, delay); 481 } 482 483 static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info) 484 { 485 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0); 486 } 487 488 #define PQI_RESCAN_WORK_DELAY (10 * HZ) 489 490 static inline void pqi_schedule_rescan_worker_delayed(struct pqi_ctrl_info *ctrl_info) 491 { 492 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY); 493 } 494 495 static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info) 496 { 497 cancel_delayed_work_sync(&ctrl_info->rescan_work); 498 } 499 500 static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info) 501 { 502 if (!ctrl_info->heartbeat_counter) 503 return 0; 504 505 return readl(ctrl_info->heartbeat_counter); 506 } 507 508 static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info) 509 { 510 return readb(ctrl_info->soft_reset_status); 511 } 512 513 static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info) 514 { 515 u8 status; 516 517 status = pqi_read_soft_reset_status(ctrl_info); 518 status &= ~PQI_SOFT_RESET_ABORT; 519 writeb(status, ctrl_info->soft_reset_status); 520 } 521 522 static int pqi_map_single(struct pci_dev *pci_dev, 523 struct pqi_sg_descriptor *sg_descriptor, void *buffer, 524 size_t buffer_length, enum dma_data_direction data_direction) 525 { 526 dma_addr_t bus_address; 527 528 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE) 529 return 0; 530 531 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length, 532 data_direction); 533 if (dma_mapping_error(&pci_dev->dev, bus_address)) 534 return -ENOMEM; 535 536 put_unaligned_le64((u64)bus_address, &sg_descriptor->address); 537 put_unaligned_le32(buffer_length, &sg_descriptor->length); 538 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 539 540 return 0; 541 } 542 543 static void pqi_pci_unmap(struct pci_dev *pci_dev, 544 struct pqi_sg_descriptor *descriptors, int num_descriptors, 545 enum dma_data_direction data_direction) 546 { 547 int i; 548 549 if (data_direction == DMA_NONE) 550 return; 551 552 for (i = 0; i < num_descriptors; i++) 553 dma_unmap_single(&pci_dev->dev, 554 (dma_addr_t)get_unaligned_le64(&descriptors[i].address), 555 get_unaligned_le32(&descriptors[i].length), 556 data_direction); 557 } 558 559 static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info, 560 struct pqi_raid_path_request *request, u8 cmd, 561 u8 *scsi3addr, void *buffer, size_t buffer_length, 562 u16 vpd_page, enum dma_data_direction *dir) 563 { 564 u8 *cdb; 565 size_t cdb_length = buffer_length; 566 567 memset(request, 0, sizeof(*request)); 568 569 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 570 put_unaligned_le16(offsetof(struct pqi_raid_path_request, 571 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH, 572 &request->header.iu_length); 573 put_unaligned_le32(buffer_length, &request->buffer_length); 574 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number)); 575 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 576 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 577 578 cdb = request->cdb; 579 580 switch (cmd) { 581 case TEST_UNIT_READY: 582 request->data_direction = SOP_READ_FLAG; 583 cdb[0] = TEST_UNIT_READY; 584 break; 585 case INQUIRY: 586 request->data_direction = SOP_READ_FLAG; 587 cdb[0] = INQUIRY; 588 if (vpd_page & VPD_PAGE) { 589 cdb[1] = 0x1; 590 cdb[2] = (u8)vpd_page; 591 } 592 cdb[4] = (u8)cdb_length; 593 break; 594 case CISS_REPORT_LOG: 595 case CISS_REPORT_PHYS: 596 request->data_direction = SOP_READ_FLAG; 597 cdb[0] = cmd; 598 if (cmd == CISS_REPORT_PHYS) { 599 if (ctrl_info->rpl_extended_format_4_5_supported) 600 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4; 601 else 602 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2; 603 } else { 604 cdb[1] = ctrl_info->ciss_report_log_flags; 605 } 606 put_unaligned_be32(cdb_length, &cdb[6]); 607 break; 608 case CISS_GET_RAID_MAP: 609 request->data_direction = SOP_READ_FLAG; 610 cdb[0] = CISS_READ; 611 cdb[1] = CISS_GET_RAID_MAP; 612 put_unaligned_be32(cdb_length, &cdb[6]); 613 break; 614 case SA_FLUSH_CACHE: 615 request->header.driver_flags = PQI_DRIVER_NONBLOCKABLE_REQUEST; 616 request->data_direction = SOP_WRITE_FLAG; 617 cdb[0] = BMIC_WRITE; 618 cdb[6] = BMIC_FLUSH_CACHE; 619 put_unaligned_be16(cdb_length, &cdb[7]); 620 break; 621 case BMIC_SENSE_DIAG_OPTIONS: 622 cdb_length = 0; 623 fallthrough; 624 case BMIC_IDENTIFY_CONTROLLER: 625 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 626 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 627 case BMIC_SENSE_FEATURE: 628 request->data_direction = SOP_READ_FLAG; 629 cdb[0] = BMIC_READ; 630 cdb[6] = cmd; 631 put_unaligned_be16(cdb_length, &cdb[7]); 632 break; 633 case BMIC_SET_DIAG_OPTIONS: 634 cdb_length = 0; 635 fallthrough; 636 case BMIC_WRITE_HOST_WELLNESS: 637 request->data_direction = SOP_WRITE_FLAG; 638 cdb[0] = BMIC_WRITE; 639 cdb[6] = cmd; 640 put_unaligned_be16(cdb_length, &cdb[7]); 641 break; 642 case BMIC_CSMI_PASSTHRU: 643 request->data_direction = SOP_BIDIRECTIONAL; 644 cdb[0] = BMIC_WRITE; 645 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU; 646 cdb[6] = cmd; 647 put_unaligned_be16(cdb_length, &cdb[7]); 648 break; 649 default: 650 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", cmd); 651 break; 652 } 653 654 switch (request->data_direction) { 655 case SOP_READ_FLAG: 656 *dir = DMA_FROM_DEVICE; 657 break; 658 case SOP_WRITE_FLAG: 659 *dir = DMA_TO_DEVICE; 660 break; 661 case SOP_NO_DIRECTION_FLAG: 662 *dir = DMA_NONE; 663 break; 664 default: 665 *dir = DMA_BIDIRECTIONAL; 666 break; 667 } 668 669 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0], 670 buffer, buffer_length, *dir); 671 } 672 673 static inline void pqi_reinit_io_request(struct pqi_io_request *io_request) 674 { 675 io_request->scmd = NULL; 676 io_request->status = 0; 677 io_request->error_info = NULL; 678 io_request->raid_bypass = false; 679 } 680 681 static inline struct pqi_io_request *pqi_alloc_io_request(struct pqi_ctrl_info *ctrl_info, struct scsi_cmnd *scmd) 682 { 683 struct pqi_io_request *io_request; 684 u16 i; 685 686 if (scmd) { /* SML I/O request */ 687 u32 blk_tag = blk_mq_unique_tag(scsi_cmd_to_rq(scmd)); 688 689 i = blk_mq_unique_tag_to_tag(blk_tag); 690 io_request = &ctrl_info->io_request_pool[i]; 691 if (atomic_inc_return(&io_request->refcount) > 1) { 692 atomic_dec(&io_request->refcount); 693 return NULL; 694 } 695 } else { /* IOCTL or driver internal request */ 696 /* 697 * benignly racy - may have to wait for an open slot. 698 * command slot range is scsi_ml_can_queue - 699 * [scsi_ml_can_queue + (PQI_RESERVED_IO_SLOTS - 1)] 700 */ 701 i = 0; 702 while (1) { 703 io_request = &ctrl_info->io_request_pool[ctrl_info->scsi_ml_can_queue + i]; 704 if (atomic_inc_return(&io_request->refcount) == 1) 705 break; 706 atomic_dec(&io_request->refcount); 707 i = (i + 1) % PQI_RESERVED_IO_SLOTS; 708 } 709 } 710 711 pqi_reinit_io_request(io_request); 712 713 return io_request; 714 } 715 716 static void pqi_free_io_request(struct pqi_io_request *io_request) 717 { 718 atomic_dec(&io_request->refcount); 719 } 720 721 static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd, 722 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page, 723 struct pqi_raid_error_info *error_info) 724 { 725 int rc; 726 struct pqi_raid_path_request request; 727 enum dma_data_direction dir; 728 729 rc = pqi_build_raid_path_request(ctrl_info, &request, cmd, scsi3addr, 730 buffer, buffer_length, vpd_page, &dir); 731 if (rc) 732 return rc; 733 734 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, error_info); 735 736 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 737 738 return rc; 739 } 740 741 /* helper functions for pqi_send_scsi_raid_request */ 742 743 static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info, 744 u8 cmd, void *buffer, size_t buffer_length) 745 { 746 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 747 buffer, buffer_length, 0, NULL); 748 } 749 750 static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info, 751 u8 cmd, void *buffer, size_t buffer_length, 752 struct pqi_raid_error_info *error_info) 753 { 754 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 755 buffer, buffer_length, 0, error_info); 756 } 757 758 static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info, 759 struct bmic_identify_controller *buffer) 760 { 761 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER, 762 buffer, sizeof(*buffer)); 763 } 764 765 static inline int pqi_sense_subsystem_info(struct pqi_ctrl_info *ctrl_info, 766 struct bmic_sense_subsystem_info *sense_info) 767 { 768 return pqi_send_ctrl_raid_request(ctrl_info, 769 BMIC_SENSE_SUBSYSTEM_INFORMATION, sense_info, 770 sizeof(*sense_info)); 771 } 772 773 static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info, 774 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length) 775 { 776 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr, 777 buffer, buffer_length, vpd_page, NULL); 778 } 779 780 static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info, 781 struct pqi_scsi_dev *device, 782 struct bmic_identify_physical_device *buffer, size_t buffer_length) 783 { 784 int rc; 785 enum dma_data_direction dir; 786 u16 bmic_device_index; 787 struct pqi_raid_path_request request; 788 789 rc = pqi_build_raid_path_request(ctrl_info, &request, 790 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer, 791 buffer_length, 0, &dir); 792 if (rc) 793 return rc; 794 795 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr); 796 request.cdb[2] = (u8)bmic_device_index; 797 request.cdb[9] = (u8)(bmic_device_index >> 8); 798 799 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 800 801 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 802 803 return rc; 804 } 805 806 static inline u32 pqi_aio_limit_to_bytes(__le16 *limit) 807 { 808 u32 bytes; 809 810 bytes = get_unaligned_le16(limit); 811 if (bytes == 0) 812 bytes = ~0; 813 else 814 bytes *= 1024; 815 816 return bytes; 817 } 818 819 #pragma pack(1) 820 821 struct bmic_sense_feature_buffer { 822 struct bmic_sense_feature_buffer_header header; 823 struct bmic_sense_feature_io_page_aio_subpage aio_subpage; 824 }; 825 826 #pragma pack() 827 828 #define MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH \ 829 offsetofend(struct bmic_sense_feature_buffer, \ 830 aio_subpage.max_write_raid_1_10_3drive) 831 832 #define MINIMUM_AIO_SUBPAGE_LENGTH \ 833 (offsetofend(struct bmic_sense_feature_io_page_aio_subpage, \ 834 max_write_raid_1_10_3drive) - \ 835 sizeof_field(struct bmic_sense_feature_io_page_aio_subpage, header)) 836 837 static int pqi_get_advanced_raid_bypass_config(struct pqi_ctrl_info *ctrl_info) 838 { 839 int rc; 840 enum dma_data_direction dir; 841 struct pqi_raid_path_request request; 842 struct bmic_sense_feature_buffer *buffer; 843 844 buffer = kmalloc(sizeof(*buffer), GFP_KERNEL); 845 if (!buffer) 846 return -ENOMEM; 847 848 rc = pqi_build_raid_path_request(ctrl_info, &request, BMIC_SENSE_FEATURE, RAID_CTLR_LUNID, 849 buffer, sizeof(*buffer), 0, &dir); 850 if (rc) 851 goto error; 852 853 request.cdb[2] = BMIC_SENSE_FEATURE_IO_PAGE; 854 request.cdb[3] = BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE; 855 856 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 857 858 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 859 860 if (rc) 861 goto error; 862 863 if (buffer->header.page_code != BMIC_SENSE_FEATURE_IO_PAGE || 864 buffer->header.subpage_code != 865 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE || 866 get_unaligned_le16(&buffer->header.buffer_length) < 867 MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH || 868 buffer->aio_subpage.header.page_code != 869 BMIC_SENSE_FEATURE_IO_PAGE || 870 buffer->aio_subpage.header.subpage_code != 871 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE || 872 get_unaligned_le16(&buffer->aio_subpage.header.page_length) < 873 MINIMUM_AIO_SUBPAGE_LENGTH) { 874 goto error; 875 } 876 877 ctrl_info->max_transfer_encrypted_sas_sata = 878 pqi_aio_limit_to_bytes( 879 &buffer->aio_subpage.max_transfer_encrypted_sas_sata); 880 881 ctrl_info->max_transfer_encrypted_nvme = 882 pqi_aio_limit_to_bytes( 883 &buffer->aio_subpage.max_transfer_encrypted_nvme); 884 885 ctrl_info->max_write_raid_5_6 = 886 pqi_aio_limit_to_bytes( 887 &buffer->aio_subpage.max_write_raid_5_6); 888 889 ctrl_info->max_write_raid_1_10_2drive = 890 pqi_aio_limit_to_bytes( 891 &buffer->aio_subpage.max_write_raid_1_10_2drive); 892 893 ctrl_info->max_write_raid_1_10_3drive = 894 pqi_aio_limit_to_bytes( 895 &buffer->aio_subpage.max_write_raid_1_10_3drive); 896 897 error: 898 kfree(buffer); 899 900 return rc; 901 } 902 903 static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info, 904 enum bmic_flush_cache_shutdown_event shutdown_event) 905 { 906 int rc; 907 struct bmic_flush_cache *flush_cache; 908 909 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL); 910 if (!flush_cache) 911 return -ENOMEM; 912 913 flush_cache->shutdown_event = shutdown_event; 914 915 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache, 916 sizeof(*flush_cache)); 917 918 kfree(flush_cache); 919 920 return rc; 921 } 922 923 int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info, 924 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length, 925 struct pqi_raid_error_info *error_info) 926 { 927 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU, 928 buffer, buffer_length, error_info); 929 } 930 931 #define PQI_FETCH_PTRAID_DATA (1 << 31) 932 933 static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info) 934 { 935 int rc; 936 struct bmic_diag_options *diag; 937 938 diag = kzalloc(sizeof(*diag), GFP_KERNEL); 939 if (!diag) 940 return -ENOMEM; 941 942 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS, 943 diag, sizeof(*diag)); 944 if (rc) 945 goto out; 946 947 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA); 948 949 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS, diag, 950 sizeof(*diag)); 951 952 out: 953 kfree(diag); 954 955 return rc; 956 } 957 958 static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info, 959 void *buffer, size_t buffer_length) 960 { 961 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS, 962 buffer, buffer_length); 963 } 964 965 #pragma pack(1) 966 967 struct bmic_host_wellness_driver_version { 968 u8 start_tag[4]; 969 u8 driver_version_tag[2]; 970 __le16 driver_version_length; 971 char driver_version[32]; 972 u8 dont_write_tag[2]; 973 u8 end_tag[2]; 974 }; 975 976 #pragma pack() 977 978 static int pqi_write_driver_version_to_host_wellness( 979 struct pqi_ctrl_info *ctrl_info) 980 { 981 int rc; 982 struct bmic_host_wellness_driver_version *buffer; 983 size_t buffer_length; 984 985 buffer_length = sizeof(*buffer); 986 987 buffer = kmalloc(buffer_length, GFP_KERNEL); 988 if (!buffer) 989 return -ENOMEM; 990 991 buffer->start_tag[0] = '<'; 992 buffer->start_tag[1] = 'H'; 993 buffer->start_tag[2] = 'W'; 994 buffer->start_tag[3] = '>'; 995 buffer->driver_version_tag[0] = 'D'; 996 buffer->driver_version_tag[1] = 'V'; 997 put_unaligned_le16(sizeof(buffer->driver_version), 998 &buffer->driver_version_length); 999 strncpy(buffer->driver_version, "Linux " DRIVER_VERSION, 1000 sizeof(buffer->driver_version) - 1); 1001 buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0'; 1002 buffer->dont_write_tag[0] = 'D'; 1003 buffer->dont_write_tag[1] = 'W'; 1004 buffer->end_tag[0] = 'Z'; 1005 buffer->end_tag[1] = 'Z'; 1006 1007 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 1008 1009 kfree(buffer); 1010 1011 return rc; 1012 } 1013 1014 #pragma pack(1) 1015 1016 struct bmic_host_wellness_time { 1017 u8 start_tag[4]; 1018 u8 time_tag[2]; 1019 __le16 time_length; 1020 u8 time[8]; 1021 u8 dont_write_tag[2]; 1022 u8 end_tag[2]; 1023 }; 1024 1025 #pragma pack() 1026 1027 static int pqi_write_current_time_to_host_wellness( 1028 struct pqi_ctrl_info *ctrl_info) 1029 { 1030 int rc; 1031 struct bmic_host_wellness_time *buffer; 1032 size_t buffer_length; 1033 time64_t local_time; 1034 unsigned int year; 1035 struct tm tm; 1036 1037 buffer_length = sizeof(*buffer); 1038 1039 buffer = kmalloc(buffer_length, GFP_KERNEL); 1040 if (!buffer) 1041 return -ENOMEM; 1042 1043 buffer->start_tag[0] = '<'; 1044 buffer->start_tag[1] = 'H'; 1045 buffer->start_tag[2] = 'W'; 1046 buffer->start_tag[3] = '>'; 1047 buffer->time_tag[0] = 'T'; 1048 buffer->time_tag[1] = 'D'; 1049 put_unaligned_le16(sizeof(buffer->time), 1050 &buffer->time_length); 1051 1052 local_time = ktime_get_real_seconds(); 1053 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm); 1054 year = tm.tm_year + 1900; 1055 1056 buffer->time[0] = bin2bcd(tm.tm_hour); 1057 buffer->time[1] = bin2bcd(tm.tm_min); 1058 buffer->time[2] = bin2bcd(tm.tm_sec); 1059 buffer->time[3] = 0; 1060 buffer->time[4] = bin2bcd(tm.tm_mon + 1); 1061 buffer->time[5] = bin2bcd(tm.tm_mday); 1062 buffer->time[6] = bin2bcd(year / 100); 1063 buffer->time[7] = bin2bcd(year % 100); 1064 1065 buffer->dont_write_tag[0] = 'D'; 1066 buffer->dont_write_tag[1] = 'W'; 1067 buffer->end_tag[0] = 'Z'; 1068 buffer->end_tag[1] = 'Z'; 1069 1070 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 1071 1072 kfree(buffer); 1073 1074 return rc; 1075 } 1076 1077 #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * HZ) 1078 1079 static void pqi_update_time_worker(struct work_struct *work) 1080 { 1081 int rc; 1082 struct pqi_ctrl_info *ctrl_info; 1083 1084 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1085 update_time_work); 1086 1087 rc = pqi_write_current_time_to_host_wellness(ctrl_info); 1088 if (rc) 1089 dev_warn(&ctrl_info->pci_dev->dev, 1090 "error updating time on controller\n"); 1091 1092 schedule_delayed_work(&ctrl_info->update_time_work, 1093 PQI_UPDATE_TIME_WORK_INTERVAL); 1094 } 1095 1096 static inline void pqi_schedule_update_time_worker(struct pqi_ctrl_info *ctrl_info) 1097 { 1098 schedule_delayed_work(&ctrl_info->update_time_work, 0); 1099 } 1100 1101 static inline void pqi_cancel_update_time_worker(struct pqi_ctrl_info *ctrl_info) 1102 { 1103 cancel_delayed_work_sync(&ctrl_info->update_time_work); 1104 } 1105 1106 static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void *buffer, 1107 size_t buffer_length) 1108 { 1109 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer, buffer_length); 1110 } 1111 1112 static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void **buffer) 1113 { 1114 int rc; 1115 size_t lun_list_length; 1116 size_t lun_data_length; 1117 size_t new_lun_list_length; 1118 void *lun_data = NULL; 1119 struct report_lun_header *report_lun_header; 1120 1121 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL); 1122 if (!report_lun_header) { 1123 rc = -ENOMEM; 1124 goto out; 1125 } 1126 1127 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header, sizeof(*report_lun_header)); 1128 if (rc) 1129 goto out; 1130 1131 lun_list_length = get_unaligned_be32(&report_lun_header->list_length); 1132 1133 again: 1134 lun_data_length = sizeof(struct report_lun_header) + lun_list_length; 1135 1136 lun_data = kmalloc(lun_data_length, GFP_KERNEL); 1137 if (!lun_data) { 1138 rc = -ENOMEM; 1139 goto out; 1140 } 1141 1142 if (lun_list_length == 0) { 1143 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header)); 1144 goto out; 1145 } 1146 1147 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length); 1148 if (rc) 1149 goto out; 1150 1151 new_lun_list_length = 1152 get_unaligned_be32(&((struct report_lun_header *)lun_data)->list_length); 1153 1154 if (new_lun_list_length > lun_list_length) { 1155 lun_list_length = new_lun_list_length; 1156 kfree(lun_data); 1157 goto again; 1158 } 1159 1160 out: 1161 kfree(report_lun_header); 1162 1163 if (rc) { 1164 kfree(lun_data); 1165 lun_data = NULL; 1166 } 1167 1168 *buffer = lun_data; 1169 1170 return rc; 1171 } 1172 1173 static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info, void **buffer) 1174 { 1175 int rc; 1176 unsigned int i; 1177 u8 rpl_response_format; 1178 u32 num_physicals; 1179 size_t rpl_16byte_wwid_list_length; 1180 void *rpl_list; 1181 struct report_lun_header *rpl_header; 1182 struct report_phys_lun_8byte_wwid_list *rpl_8byte_wwid_list; 1183 struct report_phys_lun_16byte_wwid_list *rpl_16byte_wwid_list; 1184 1185 rc = pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS, &rpl_list); 1186 if (rc) 1187 return rc; 1188 1189 if (ctrl_info->rpl_extended_format_4_5_supported) { 1190 rpl_header = rpl_list; 1191 rpl_response_format = rpl_header->flags & CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_MASK; 1192 if (rpl_response_format == CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4) { 1193 *buffer = rpl_list; 1194 return 0; 1195 } else if (rpl_response_format != CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2) { 1196 dev_err(&ctrl_info->pci_dev->dev, 1197 "RPL returned unsupported data format %u\n", 1198 rpl_response_format); 1199 return -EINVAL; 1200 } else { 1201 dev_warn(&ctrl_info->pci_dev->dev, 1202 "RPL returned extended format 2 instead of 4\n"); 1203 } 1204 } 1205 1206 rpl_8byte_wwid_list = rpl_list; 1207 num_physicals = get_unaligned_be32(&rpl_8byte_wwid_list->header.list_length) / sizeof(rpl_8byte_wwid_list->lun_entries[0]); 1208 rpl_16byte_wwid_list_length = sizeof(struct report_lun_header) + (num_physicals * sizeof(struct report_phys_lun_16byte_wwid)); 1209 1210 rpl_16byte_wwid_list = kmalloc(rpl_16byte_wwid_list_length, GFP_KERNEL); 1211 if (!rpl_16byte_wwid_list) 1212 return -ENOMEM; 1213 1214 put_unaligned_be32(num_physicals * sizeof(struct report_phys_lun_16byte_wwid), 1215 &rpl_16byte_wwid_list->header.list_length); 1216 rpl_16byte_wwid_list->header.flags = rpl_8byte_wwid_list->header.flags; 1217 1218 for (i = 0; i < num_physicals; i++) { 1219 memcpy(&rpl_16byte_wwid_list->lun_entries[i].lunid, &rpl_8byte_wwid_list->lun_entries[i].lunid, sizeof(rpl_8byte_wwid_list->lun_entries[i].lunid)); 1220 memcpy(&rpl_16byte_wwid_list->lun_entries[i].wwid[0], &rpl_8byte_wwid_list->lun_entries[i].wwid, sizeof(rpl_8byte_wwid_list->lun_entries[i].wwid)); 1221 memset(&rpl_16byte_wwid_list->lun_entries[i].wwid[8], 0, 8); 1222 rpl_16byte_wwid_list->lun_entries[i].device_type = rpl_8byte_wwid_list->lun_entries[i].device_type; 1223 rpl_16byte_wwid_list->lun_entries[i].device_flags = rpl_8byte_wwid_list->lun_entries[i].device_flags; 1224 rpl_16byte_wwid_list->lun_entries[i].lun_count = rpl_8byte_wwid_list->lun_entries[i].lun_count; 1225 rpl_16byte_wwid_list->lun_entries[i].redundant_paths = rpl_8byte_wwid_list->lun_entries[i].redundant_paths; 1226 rpl_16byte_wwid_list->lun_entries[i].aio_handle = rpl_8byte_wwid_list->lun_entries[i].aio_handle; 1227 } 1228 1229 kfree(rpl_8byte_wwid_list); 1230 *buffer = rpl_16byte_wwid_list; 1231 1232 return 0; 1233 } 1234 1235 static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info, void **buffer) 1236 { 1237 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer); 1238 } 1239 1240 static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info, 1241 struct report_phys_lun_16byte_wwid_list **physdev_list, 1242 struct report_log_lun_list **logdev_list) 1243 { 1244 int rc; 1245 size_t logdev_list_length; 1246 size_t logdev_data_length; 1247 struct report_log_lun_list *internal_logdev_list; 1248 struct report_log_lun_list *logdev_data; 1249 struct report_lun_header report_lun_header; 1250 1251 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list); 1252 if (rc) 1253 dev_err(&ctrl_info->pci_dev->dev, 1254 "report physical LUNs failed\n"); 1255 1256 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list); 1257 if (rc) 1258 dev_err(&ctrl_info->pci_dev->dev, 1259 "report logical LUNs failed\n"); 1260 1261 /* 1262 * Tack the controller itself onto the end of the logical device list 1263 * by adding a list entry that is all zeros. 1264 */ 1265 1266 logdev_data = *logdev_list; 1267 1268 if (logdev_data) { 1269 logdev_list_length = 1270 get_unaligned_be32(&logdev_data->header.list_length); 1271 } else { 1272 memset(&report_lun_header, 0, sizeof(report_lun_header)); 1273 logdev_data = 1274 (struct report_log_lun_list *)&report_lun_header; 1275 logdev_list_length = 0; 1276 } 1277 1278 logdev_data_length = sizeof(struct report_lun_header) + 1279 logdev_list_length; 1280 1281 internal_logdev_list = kmalloc(logdev_data_length + 1282 sizeof(struct report_log_lun), GFP_KERNEL); 1283 if (!internal_logdev_list) { 1284 kfree(*logdev_list); 1285 *logdev_list = NULL; 1286 return -ENOMEM; 1287 } 1288 1289 memcpy(internal_logdev_list, logdev_data, logdev_data_length); 1290 memset((u8 *)internal_logdev_list + logdev_data_length, 0, 1291 sizeof(struct report_log_lun)); 1292 put_unaligned_be32(logdev_list_length + 1293 sizeof(struct report_log_lun), 1294 &internal_logdev_list->header.list_length); 1295 1296 kfree(*logdev_list); 1297 *logdev_list = internal_logdev_list; 1298 1299 return 0; 1300 } 1301 1302 static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device, 1303 int bus, int target, int lun) 1304 { 1305 device->bus = bus; 1306 device->target = target; 1307 device->lun = lun; 1308 } 1309 1310 static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device) 1311 { 1312 u8 *scsi3addr; 1313 u32 lunid; 1314 int bus; 1315 int target; 1316 int lun; 1317 1318 scsi3addr = device->scsi3addr; 1319 lunid = get_unaligned_le32(scsi3addr); 1320 1321 if (pqi_is_hba_lunid(scsi3addr)) { 1322 /* The specified device is the controller. */ 1323 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff); 1324 device->target_lun_valid = true; 1325 return; 1326 } 1327 1328 if (pqi_is_logical_device(device)) { 1329 if (device->is_external_raid_device) { 1330 bus = PQI_EXTERNAL_RAID_VOLUME_BUS; 1331 target = (lunid >> 16) & 0x3fff; 1332 lun = lunid & 0xff; 1333 } else { 1334 bus = PQI_RAID_VOLUME_BUS; 1335 target = 0; 1336 lun = lunid & 0x3fff; 1337 } 1338 pqi_set_bus_target_lun(device, bus, target, lun); 1339 device->target_lun_valid = true; 1340 return; 1341 } 1342 1343 /* 1344 * Defer target and LUN assignment for non-controller physical devices 1345 * because the SAS transport layer will make these assignments later. 1346 */ 1347 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0); 1348 } 1349 1350 static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info, 1351 struct pqi_scsi_dev *device) 1352 { 1353 int rc; 1354 u8 raid_level; 1355 u8 *buffer; 1356 1357 raid_level = SA_RAID_UNKNOWN; 1358 1359 buffer = kmalloc(64, GFP_KERNEL); 1360 if (buffer) { 1361 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1362 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64); 1363 if (rc == 0) { 1364 raid_level = buffer[8]; 1365 if (raid_level > SA_RAID_MAX) 1366 raid_level = SA_RAID_UNKNOWN; 1367 } 1368 kfree(buffer); 1369 } 1370 1371 device->raid_level = raid_level; 1372 } 1373 1374 static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info, 1375 struct pqi_scsi_dev *device, struct raid_map *raid_map) 1376 { 1377 char *err_msg; 1378 u32 raid_map_size; 1379 u32 r5or6_blocks_per_row; 1380 1381 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1382 1383 if (raid_map_size < offsetof(struct raid_map, disk_data)) { 1384 err_msg = "RAID map too small"; 1385 goto bad_raid_map; 1386 } 1387 1388 if (device->raid_level == SA_RAID_1) { 1389 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) { 1390 err_msg = "invalid RAID-1 map"; 1391 goto bad_raid_map; 1392 } 1393 } else if (device->raid_level == SA_RAID_TRIPLE) { 1394 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) { 1395 err_msg = "invalid RAID-1(Triple) map"; 1396 goto bad_raid_map; 1397 } 1398 } else if ((device->raid_level == SA_RAID_5 || 1399 device->raid_level == SA_RAID_6) && 1400 get_unaligned_le16(&raid_map->layout_map_count) > 1) { 1401 /* RAID 50/60 */ 1402 r5or6_blocks_per_row = 1403 get_unaligned_le16(&raid_map->strip_size) * 1404 get_unaligned_le16(&raid_map->data_disks_per_row); 1405 if (r5or6_blocks_per_row == 0) { 1406 err_msg = "invalid RAID-5 or RAID-6 map"; 1407 goto bad_raid_map; 1408 } 1409 } 1410 1411 return 0; 1412 1413 bad_raid_map: 1414 dev_warn(&ctrl_info->pci_dev->dev, 1415 "logical device %08x%08x %s\n", 1416 *((u32 *)&device->scsi3addr), 1417 *((u32 *)&device->scsi3addr[4]), err_msg); 1418 1419 return -EINVAL; 1420 } 1421 1422 static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info, 1423 struct pqi_scsi_dev *device) 1424 { 1425 int rc; 1426 u32 raid_map_size; 1427 struct raid_map *raid_map; 1428 1429 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL); 1430 if (!raid_map) 1431 return -ENOMEM; 1432 1433 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1434 device->scsi3addr, raid_map, sizeof(*raid_map), 0, NULL); 1435 if (rc) 1436 goto error; 1437 1438 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1439 1440 if (raid_map_size > sizeof(*raid_map)) { 1441 1442 kfree(raid_map); 1443 1444 raid_map = kmalloc(raid_map_size, GFP_KERNEL); 1445 if (!raid_map) 1446 return -ENOMEM; 1447 1448 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1449 device->scsi3addr, raid_map, raid_map_size, 0, NULL); 1450 if (rc) 1451 goto error; 1452 1453 if (get_unaligned_le32(&raid_map->structure_size) 1454 != raid_map_size) { 1455 dev_warn(&ctrl_info->pci_dev->dev, 1456 "requested %u bytes, received %u bytes\n", 1457 raid_map_size, 1458 get_unaligned_le32(&raid_map->structure_size)); 1459 rc = -EINVAL; 1460 goto error; 1461 } 1462 } 1463 1464 rc = pqi_validate_raid_map(ctrl_info, device, raid_map); 1465 if (rc) 1466 goto error; 1467 1468 device->raid_map = raid_map; 1469 1470 return 0; 1471 1472 error: 1473 kfree(raid_map); 1474 1475 return rc; 1476 } 1477 1478 static void pqi_set_max_transfer_encrypted(struct pqi_ctrl_info *ctrl_info, 1479 struct pqi_scsi_dev *device) 1480 { 1481 if (!ctrl_info->lv_drive_type_mix_valid) { 1482 device->max_transfer_encrypted = ~0; 1483 return; 1484 } 1485 1486 switch (LV_GET_DRIVE_TYPE_MIX(device->scsi3addr)) { 1487 case LV_DRIVE_TYPE_MIX_SAS_HDD_ONLY: 1488 case LV_DRIVE_TYPE_MIX_SATA_HDD_ONLY: 1489 case LV_DRIVE_TYPE_MIX_SAS_OR_SATA_SSD_ONLY: 1490 case LV_DRIVE_TYPE_MIX_SAS_SSD_ONLY: 1491 case LV_DRIVE_TYPE_MIX_SATA_SSD_ONLY: 1492 case LV_DRIVE_TYPE_MIX_SAS_ONLY: 1493 case LV_DRIVE_TYPE_MIX_SATA_ONLY: 1494 device->max_transfer_encrypted = 1495 ctrl_info->max_transfer_encrypted_sas_sata; 1496 break; 1497 case LV_DRIVE_TYPE_MIX_NVME_ONLY: 1498 device->max_transfer_encrypted = 1499 ctrl_info->max_transfer_encrypted_nvme; 1500 break; 1501 case LV_DRIVE_TYPE_MIX_UNKNOWN: 1502 case LV_DRIVE_TYPE_MIX_NO_RESTRICTION: 1503 default: 1504 device->max_transfer_encrypted = 1505 min(ctrl_info->max_transfer_encrypted_sas_sata, 1506 ctrl_info->max_transfer_encrypted_nvme); 1507 break; 1508 } 1509 } 1510 1511 static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info, 1512 struct pqi_scsi_dev *device) 1513 { 1514 int rc; 1515 u8 *buffer; 1516 u8 bypass_status; 1517 1518 buffer = kmalloc(64, GFP_KERNEL); 1519 if (!buffer) 1520 return; 1521 1522 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1523 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64); 1524 if (rc) 1525 goto out; 1526 1527 #define RAID_BYPASS_STATUS 4 1528 #define RAID_BYPASS_CONFIGURED 0x1 1529 #define RAID_BYPASS_ENABLED 0x2 1530 1531 bypass_status = buffer[RAID_BYPASS_STATUS]; 1532 device->raid_bypass_configured = 1533 (bypass_status & RAID_BYPASS_CONFIGURED) != 0; 1534 if (device->raid_bypass_configured && 1535 (bypass_status & RAID_BYPASS_ENABLED) && 1536 pqi_get_raid_map(ctrl_info, device) == 0) { 1537 device->raid_bypass_enabled = true; 1538 if (get_unaligned_le16(&device->raid_map->flags) & 1539 RAID_MAP_ENCRYPTION_ENABLED) 1540 pqi_set_max_transfer_encrypted(ctrl_info, device); 1541 } 1542 1543 out: 1544 kfree(buffer); 1545 } 1546 1547 /* 1548 * Use vendor-specific VPD to determine online/offline status of a volume. 1549 */ 1550 1551 static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info, 1552 struct pqi_scsi_dev *device) 1553 { 1554 int rc; 1555 size_t page_length; 1556 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE; 1557 bool volume_offline = true; 1558 u32 volume_flags; 1559 struct ciss_vpd_logical_volume_status *vpd; 1560 1561 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL); 1562 if (!vpd) 1563 goto no_buffer; 1564 1565 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1566 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd)); 1567 if (rc) 1568 goto out; 1569 1570 if (vpd->page_code != CISS_VPD_LV_STATUS) 1571 goto out; 1572 1573 page_length = offsetof(struct ciss_vpd_logical_volume_status, 1574 volume_status) + vpd->page_length; 1575 if (page_length < sizeof(*vpd)) 1576 goto out; 1577 1578 volume_status = vpd->volume_status; 1579 volume_flags = get_unaligned_be32(&vpd->flags); 1580 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0; 1581 1582 out: 1583 kfree(vpd); 1584 no_buffer: 1585 device->volume_status = volume_status; 1586 device->volume_offline = volume_offline; 1587 } 1588 1589 #define PQI_DEVICE_NCQ_PRIO_SUPPORTED 0x01 1590 #define PQI_DEVICE_PHY_MAP_SUPPORTED 0x10 1591 1592 static int pqi_get_physical_device_info(struct pqi_ctrl_info *ctrl_info, 1593 struct pqi_scsi_dev *device, 1594 struct bmic_identify_physical_device *id_phys) 1595 { 1596 int rc; 1597 1598 memset(id_phys, 0, sizeof(*id_phys)); 1599 1600 rc = pqi_identify_physical_device(ctrl_info, device, 1601 id_phys, sizeof(*id_phys)); 1602 if (rc) { 1603 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH; 1604 return rc; 1605 } 1606 1607 scsi_sanitize_inquiry_string(&id_phys->model[0], 8); 1608 scsi_sanitize_inquiry_string(&id_phys->model[8], 16); 1609 1610 memcpy(device->vendor, &id_phys->model[0], sizeof(device->vendor)); 1611 memcpy(device->model, &id_phys->model[8], sizeof(device->model)); 1612 1613 device->box_index = id_phys->box_index; 1614 device->phys_box_on_bus = id_phys->phys_box_on_bus; 1615 device->phy_connected_dev_type = id_phys->phy_connected_dev_type[0]; 1616 device->queue_depth = 1617 get_unaligned_le16(&id_phys->current_queue_depth_limit); 1618 device->active_path_index = id_phys->active_path_number; 1619 device->path_map = id_phys->redundant_path_present_map; 1620 memcpy(&device->box, 1621 &id_phys->alternate_paths_phys_box_on_port, 1622 sizeof(device->box)); 1623 memcpy(&device->phys_connector, 1624 &id_phys->alternate_paths_phys_connector, 1625 sizeof(device->phys_connector)); 1626 device->bay = id_phys->phys_bay_in_box; 1627 device->lun_count = id_phys->multi_lun_device_lun_count; 1628 if ((id_phys->even_more_flags & PQI_DEVICE_PHY_MAP_SUPPORTED) && 1629 id_phys->phy_count) 1630 device->phy_id = 1631 id_phys->phy_to_phy_map[device->active_path_index]; 1632 else 1633 device->phy_id = 0xFF; 1634 1635 device->ncq_prio_support = 1636 ((get_unaligned_le32(&id_phys->misc_drive_flags) >> 16) & 1637 PQI_DEVICE_NCQ_PRIO_SUPPORTED); 1638 1639 return 0; 1640 } 1641 1642 static int pqi_get_logical_device_info(struct pqi_ctrl_info *ctrl_info, 1643 struct pqi_scsi_dev *device) 1644 { 1645 int rc; 1646 u8 *buffer; 1647 1648 buffer = kmalloc(64, GFP_KERNEL); 1649 if (!buffer) 1650 return -ENOMEM; 1651 1652 /* Send an inquiry to the device to see what it is. */ 1653 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, buffer, 64); 1654 if (rc) 1655 goto out; 1656 1657 scsi_sanitize_inquiry_string(&buffer[8], 8); 1658 scsi_sanitize_inquiry_string(&buffer[16], 16); 1659 1660 device->devtype = buffer[0] & 0x1f; 1661 memcpy(device->vendor, &buffer[8], sizeof(device->vendor)); 1662 memcpy(device->model, &buffer[16], sizeof(device->model)); 1663 1664 if (device->devtype == TYPE_DISK) { 1665 if (device->is_external_raid_device) { 1666 device->raid_level = SA_RAID_UNKNOWN; 1667 device->volume_status = CISS_LV_OK; 1668 device->volume_offline = false; 1669 } else { 1670 pqi_get_raid_level(ctrl_info, device); 1671 pqi_get_raid_bypass_status(ctrl_info, device); 1672 pqi_get_volume_status(ctrl_info, device); 1673 } 1674 } 1675 1676 out: 1677 kfree(buffer); 1678 1679 return rc; 1680 } 1681 1682 /* 1683 * Prevent adding drive to OS for some corner cases such as a drive 1684 * undergoing a sanitize operation. Some OSes will continue to poll 1685 * the drive until the sanitize completes, which can take hours, 1686 * resulting in long bootup delays. Commands such as TUR, READ_CAP 1687 * are allowed, but READ/WRITE cause check condition. So the OS 1688 * cannot check/read the partition table. 1689 * Note: devices that have completed sanitize must be re-enabled 1690 * using the management utility. 1691 */ 1692 static bool pqi_keep_device_offline(struct pqi_ctrl_info *ctrl_info, 1693 struct pqi_scsi_dev *device) 1694 { 1695 u8 scsi_status; 1696 int rc; 1697 enum dma_data_direction dir; 1698 char *buffer; 1699 int buffer_length = 64; 1700 size_t sense_data_length; 1701 struct scsi_sense_hdr sshdr; 1702 struct pqi_raid_path_request request; 1703 struct pqi_raid_error_info error_info; 1704 bool offline = false; /* Assume keep online */ 1705 1706 /* Do not check controllers. */ 1707 if (pqi_is_hba_lunid(device->scsi3addr)) 1708 return false; 1709 1710 /* Do not check LVs. */ 1711 if (pqi_is_logical_device(device)) 1712 return false; 1713 1714 buffer = kmalloc(buffer_length, GFP_KERNEL); 1715 if (!buffer) 1716 return false; /* Assume not offline */ 1717 1718 /* Check for SANITIZE in progress using TUR */ 1719 rc = pqi_build_raid_path_request(ctrl_info, &request, 1720 TEST_UNIT_READY, RAID_CTLR_LUNID, buffer, 1721 buffer_length, 0, &dir); 1722 if (rc) 1723 goto out; /* Assume not offline */ 1724 1725 memcpy(request.lun_number, device->scsi3addr, sizeof(request.lun_number)); 1726 1727 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, &error_info); 1728 1729 if (rc) 1730 goto out; /* Assume not offline */ 1731 1732 scsi_status = error_info.status; 1733 sense_data_length = get_unaligned_le16(&error_info.sense_data_length); 1734 if (sense_data_length == 0) 1735 sense_data_length = 1736 get_unaligned_le16(&error_info.response_data_length); 1737 if (sense_data_length) { 1738 if (sense_data_length > sizeof(error_info.data)) 1739 sense_data_length = sizeof(error_info.data); 1740 1741 /* 1742 * Check for sanitize in progress: asc:0x04, ascq: 0x1b 1743 */ 1744 if (scsi_status == SAM_STAT_CHECK_CONDITION && 1745 scsi_normalize_sense(error_info.data, 1746 sense_data_length, &sshdr) && 1747 sshdr.sense_key == NOT_READY && 1748 sshdr.asc == 0x04 && 1749 sshdr.ascq == 0x1b) { 1750 device->device_offline = true; 1751 offline = true; 1752 goto out; /* Keep device offline */ 1753 } 1754 } 1755 1756 out: 1757 kfree(buffer); 1758 return offline; 1759 } 1760 1761 static int pqi_get_device_info_phys_logical(struct pqi_ctrl_info *ctrl_info, 1762 struct pqi_scsi_dev *device, 1763 struct bmic_identify_physical_device *id_phys) 1764 { 1765 int rc; 1766 1767 if (device->is_expander_smp_device) 1768 return 0; 1769 1770 if (pqi_is_logical_device(device)) 1771 rc = pqi_get_logical_device_info(ctrl_info, device); 1772 else 1773 rc = pqi_get_physical_device_info(ctrl_info, device, id_phys); 1774 1775 return rc; 1776 } 1777 1778 static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info, 1779 struct pqi_scsi_dev *device, 1780 struct bmic_identify_physical_device *id_phys) 1781 { 1782 int rc; 1783 1784 rc = pqi_get_device_info_phys_logical(ctrl_info, device, id_phys); 1785 1786 if (rc == 0 && device->lun_count == 0) 1787 device->lun_count = 1; 1788 1789 return rc; 1790 } 1791 1792 static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info, 1793 struct pqi_scsi_dev *device) 1794 { 1795 char *status; 1796 static const char unknown_state_str[] = 1797 "Volume is in an unknown state (%u)"; 1798 char unknown_state_buffer[sizeof(unknown_state_str) + 10]; 1799 1800 switch (device->volume_status) { 1801 case CISS_LV_OK: 1802 status = "Volume online"; 1803 break; 1804 case CISS_LV_FAILED: 1805 status = "Volume failed"; 1806 break; 1807 case CISS_LV_NOT_CONFIGURED: 1808 status = "Volume not configured"; 1809 break; 1810 case CISS_LV_DEGRADED: 1811 status = "Volume degraded"; 1812 break; 1813 case CISS_LV_READY_FOR_RECOVERY: 1814 status = "Volume ready for recovery operation"; 1815 break; 1816 case CISS_LV_UNDERGOING_RECOVERY: 1817 status = "Volume undergoing recovery"; 1818 break; 1819 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED: 1820 status = "Wrong physical drive was replaced"; 1821 break; 1822 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM: 1823 status = "A physical drive not properly connected"; 1824 break; 1825 case CISS_LV_HARDWARE_OVERHEATING: 1826 status = "Hardware is overheating"; 1827 break; 1828 case CISS_LV_HARDWARE_HAS_OVERHEATED: 1829 status = "Hardware has overheated"; 1830 break; 1831 case CISS_LV_UNDERGOING_EXPANSION: 1832 status = "Volume undergoing expansion"; 1833 break; 1834 case CISS_LV_NOT_AVAILABLE: 1835 status = "Volume waiting for transforming volume"; 1836 break; 1837 case CISS_LV_QUEUED_FOR_EXPANSION: 1838 status = "Volume queued for expansion"; 1839 break; 1840 case CISS_LV_DISABLED_SCSI_ID_CONFLICT: 1841 status = "Volume disabled due to SCSI ID conflict"; 1842 break; 1843 case CISS_LV_EJECTED: 1844 status = "Volume has been ejected"; 1845 break; 1846 case CISS_LV_UNDERGOING_ERASE: 1847 status = "Volume undergoing background erase"; 1848 break; 1849 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD: 1850 status = "Volume ready for predictive spare rebuild"; 1851 break; 1852 case CISS_LV_UNDERGOING_RPI: 1853 status = "Volume undergoing rapid parity initialization"; 1854 break; 1855 case CISS_LV_PENDING_RPI: 1856 status = "Volume queued for rapid parity initialization"; 1857 break; 1858 case CISS_LV_ENCRYPTED_NO_KEY: 1859 status = "Encrypted volume inaccessible - key not present"; 1860 break; 1861 case CISS_LV_UNDERGOING_ENCRYPTION: 1862 status = "Volume undergoing encryption process"; 1863 break; 1864 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING: 1865 status = "Volume undergoing encryption re-keying process"; 1866 break; 1867 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1868 status = "Volume encrypted but encryption is disabled"; 1869 break; 1870 case CISS_LV_PENDING_ENCRYPTION: 1871 status = "Volume pending migration to encrypted state"; 1872 break; 1873 case CISS_LV_PENDING_ENCRYPTION_REKEYING: 1874 status = "Volume pending encryption rekeying"; 1875 break; 1876 case CISS_LV_NOT_SUPPORTED: 1877 status = "Volume not supported on this controller"; 1878 break; 1879 case CISS_LV_STATUS_UNAVAILABLE: 1880 status = "Volume status not available"; 1881 break; 1882 default: 1883 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer), 1884 unknown_state_str, device->volume_status); 1885 status = unknown_state_buffer; 1886 break; 1887 } 1888 1889 dev_info(&ctrl_info->pci_dev->dev, 1890 "scsi %d:%d:%d:%d %s\n", 1891 ctrl_info->scsi_host->host_no, 1892 device->bus, device->target, device->lun, status); 1893 } 1894 1895 static void pqi_rescan_worker(struct work_struct *work) 1896 { 1897 struct pqi_ctrl_info *ctrl_info; 1898 1899 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1900 rescan_work); 1901 1902 pqi_scan_scsi_devices(ctrl_info); 1903 } 1904 1905 static int pqi_add_device(struct pqi_ctrl_info *ctrl_info, 1906 struct pqi_scsi_dev *device) 1907 { 1908 int rc; 1909 1910 if (pqi_is_logical_device(device)) 1911 rc = scsi_add_device(ctrl_info->scsi_host, device->bus, 1912 device->target, device->lun); 1913 else 1914 rc = pqi_add_sas_device(ctrl_info->sas_host, device); 1915 1916 return rc; 1917 } 1918 1919 #define PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS (20 * 1000) 1920 1921 static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device) 1922 { 1923 int rc; 1924 int lun; 1925 1926 for (lun = 0; lun < device->lun_count; lun++) { 1927 rc = pqi_device_wait_for_pending_io(ctrl_info, device, lun, 1928 PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS); 1929 if (rc) 1930 dev_err(&ctrl_info->pci_dev->dev, 1931 "scsi %d:%d:%d:%d removing device with %d outstanding command(s)\n", 1932 ctrl_info->scsi_host->host_no, device->bus, 1933 device->target, lun, 1934 atomic_read(&device->scsi_cmds_outstanding[lun])); 1935 } 1936 1937 if (pqi_is_logical_device(device)) 1938 scsi_remove_device(device->sdev); 1939 else 1940 pqi_remove_sas_device(device); 1941 1942 pqi_device_remove_start(device); 1943 } 1944 1945 /* Assumes the SCSI device list lock is held. */ 1946 1947 static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info, 1948 int bus, int target, int lun) 1949 { 1950 struct pqi_scsi_dev *device; 1951 1952 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 1953 if (device->bus == bus && device->target == target && device->lun == lun) 1954 return device; 1955 1956 return NULL; 1957 } 1958 1959 static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1, struct pqi_scsi_dev *dev2) 1960 { 1961 if (dev1->is_physical_device != dev2->is_physical_device) 1962 return false; 1963 1964 if (dev1->is_physical_device) 1965 return memcmp(dev1->wwid, dev2->wwid, sizeof(dev1->wwid)) == 0; 1966 1967 return memcmp(dev1->volume_id, dev2->volume_id, sizeof(dev1->volume_id)) == 0; 1968 } 1969 1970 enum pqi_find_result { 1971 DEVICE_NOT_FOUND, 1972 DEVICE_CHANGED, 1973 DEVICE_SAME, 1974 }; 1975 1976 static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info, 1977 struct pqi_scsi_dev *device_to_find, struct pqi_scsi_dev **matching_device) 1978 { 1979 struct pqi_scsi_dev *device; 1980 1981 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 1982 if (pqi_scsi3addr_equal(device_to_find->scsi3addr, device->scsi3addr)) { 1983 *matching_device = device; 1984 if (pqi_device_equal(device_to_find, device)) { 1985 if (device_to_find->volume_offline) 1986 return DEVICE_CHANGED; 1987 return DEVICE_SAME; 1988 } 1989 return DEVICE_CHANGED; 1990 } 1991 } 1992 1993 return DEVICE_NOT_FOUND; 1994 } 1995 1996 static inline const char *pqi_device_type(struct pqi_scsi_dev *device) 1997 { 1998 if (device->is_expander_smp_device) 1999 return "Enclosure SMP "; 2000 2001 return scsi_device_type(device->devtype); 2002 } 2003 2004 #define PQI_DEV_INFO_BUFFER_LENGTH 128 2005 2006 static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info, 2007 char *action, struct pqi_scsi_dev *device) 2008 { 2009 ssize_t count; 2010 char buffer[PQI_DEV_INFO_BUFFER_LENGTH]; 2011 2012 count = scnprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH, 2013 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus); 2014 2015 if (device->target_lun_valid) 2016 count += scnprintf(buffer + count, 2017 PQI_DEV_INFO_BUFFER_LENGTH - count, 2018 "%d:%d", 2019 device->target, 2020 device->lun); 2021 else 2022 count += scnprintf(buffer + count, 2023 PQI_DEV_INFO_BUFFER_LENGTH - count, 2024 "-:-"); 2025 2026 if (pqi_is_logical_device(device)) 2027 count += scnprintf(buffer + count, 2028 PQI_DEV_INFO_BUFFER_LENGTH - count, 2029 " %08x%08x", 2030 *((u32 *)&device->scsi3addr), 2031 *((u32 *)&device->scsi3addr[4])); 2032 else 2033 count += scnprintf(buffer + count, 2034 PQI_DEV_INFO_BUFFER_LENGTH - count, 2035 " %016llx%016llx", 2036 get_unaligned_be64(&device->wwid[0]), 2037 get_unaligned_be64(&device->wwid[8])); 2038 2039 count += scnprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count, 2040 " %s %.8s %.16s ", 2041 pqi_device_type(device), 2042 device->vendor, 2043 device->model); 2044 2045 if (pqi_is_logical_device(device)) { 2046 if (device->devtype == TYPE_DISK) 2047 count += scnprintf(buffer + count, 2048 PQI_DEV_INFO_BUFFER_LENGTH - count, 2049 "SSDSmartPathCap%c En%c %-12s", 2050 device->raid_bypass_configured ? '+' : '-', 2051 device->raid_bypass_enabled ? '+' : '-', 2052 pqi_raid_level_to_string(device->raid_level)); 2053 } else { 2054 count += scnprintf(buffer + count, 2055 PQI_DEV_INFO_BUFFER_LENGTH - count, 2056 "AIO%c", device->aio_enabled ? '+' : '-'); 2057 if (device->devtype == TYPE_DISK || 2058 device->devtype == TYPE_ZBC) 2059 count += scnprintf(buffer + count, 2060 PQI_DEV_INFO_BUFFER_LENGTH - count, 2061 " qd=%-6d", device->queue_depth); 2062 } 2063 2064 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer); 2065 } 2066 2067 static bool pqi_raid_maps_equal(struct raid_map *raid_map1, struct raid_map *raid_map2) 2068 { 2069 u32 raid_map1_size; 2070 u32 raid_map2_size; 2071 2072 if (raid_map1 == NULL || raid_map2 == NULL) 2073 return raid_map1 == raid_map2; 2074 2075 raid_map1_size = get_unaligned_le32(&raid_map1->structure_size); 2076 raid_map2_size = get_unaligned_le32(&raid_map2->structure_size); 2077 2078 if (raid_map1_size != raid_map2_size) 2079 return false; 2080 2081 return memcmp(raid_map1, raid_map2, raid_map1_size) == 0; 2082 } 2083 2084 /* Assumes the SCSI device list lock is held. */ 2085 2086 static void pqi_scsi_update_device(struct pqi_ctrl_info *ctrl_info, 2087 struct pqi_scsi_dev *existing_device, struct pqi_scsi_dev *new_device) 2088 { 2089 existing_device->device_type = new_device->device_type; 2090 existing_device->bus = new_device->bus; 2091 if (new_device->target_lun_valid) { 2092 existing_device->target = new_device->target; 2093 existing_device->lun = new_device->lun; 2094 existing_device->target_lun_valid = true; 2095 } 2096 2097 /* By definition, the scsi3addr and wwid fields are already the same. */ 2098 2099 existing_device->is_physical_device = new_device->is_physical_device; 2100 memcpy(existing_device->vendor, new_device->vendor, sizeof(existing_device->vendor)); 2101 memcpy(existing_device->model, new_device->model, sizeof(existing_device->model)); 2102 existing_device->sas_address = new_device->sas_address; 2103 existing_device->queue_depth = new_device->queue_depth; 2104 existing_device->device_offline = false; 2105 existing_device->lun_count = new_device->lun_count; 2106 2107 if (pqi_is_logical_device(existing_device)) { 2108 existing_device->is_external_raid_device = new_device->is_external_raid_device; 2109 2110 if (existing_device->devtype == TYPE_DISK) { 2111 existing_device->raid_level = new_device->raid_level; 2112 existing_device->volume_status = new_device->volume_status; 2113 if (ctrl_info->logical_volume_rescan_needed) 2114 existing_device->rescan = true; 2115 memset(existing_device->next_bypass_group, 0, sizeof(existing_device->next_bypass_group)); 2116 if (!pqi_raid_maps_equal(existing_device->raid_map, new_device->raid_map)) { 2117 kfree(existing_device->raid_map); 2118 existing_device->raid_map = new_device->raid_map; 2119 /* To prevent this from being freed later. */ 2120 new_device->raid_map = NULL; 2121 } 2122 existing_device->raid_bypass_configured = new_device->raid_bypass_configured; 2123 existing_device->raid_bypass_enabled = new_device->raid_bypass_enabled; 2124 } 2125 } else { 2126 existing_device->aio_enabled = new_device->aio_enabled; 2127 existing_device->aio_handle = new_device->aio_handle; 2128 existing_device->is_expander_smp_device = new_device->is_expander_smp_device; 2129 existing_device->active_path_index = new_device->active_path_index; 2130 existing_device->phy_id = new_device->phy_id; 2131 existing_device->path_map = new_device->path_map; 2132 existing_device->bay = new_device->bay; 2133 existing_device->box_index = new_device->box_index; 2134 existing_device->phys_box_on_bus = new_device->phys_box_on_bus; 2135 existing_device->phy_connected_dev_type = new_device->phy_connected_dev_type; 2136 memcpy(existing_device->box, new_device->box, sizeof(existing_device->box)); 2137 memcpy(existing_device->phys_connector, new_device->phys_connector, sizeof(existing_device->phys_connector)); 2138 } 2139 } 2140 2141 static inline void pqi_free_device(struct pqi_scsi_dev *device) 2142 { 2143 if (device) { 2144 kfree(device->raid_map); 2145 kfree(device); 2146 } 2147 } 2148 2149 /* 2150 * Called when exposing a new device to the OS fails in order to re-adjust 2151 * our internal SCSI device list to match the SCSI ML's view. 2152 */ 2153 2154 static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info, 2155 struct pqi_scsi_dev *device) 2156 { 2157 unsigned long flags; 2158 2159 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2160 list_del(&device->scsi_device_list_entry); 2161 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2162 2163 /* Allow the device structure to be freed later. */ 2164 device->keep_device = false; 2165 } 2166 2167 static inline bool pqi_is_device_added(struct pqi_scsi_dev *device) 2168 { 2169 if (device->is_expander_smp_device) 2170 return device->sas_port != NULL; 2171 2172 return device->sdev != NULL; 2173 } 2174 2175 static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info, 2176 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices) 2177 { 2178 int rc; 2179 unsigned int i; 2180 unsigned long flags; 2181 enum pqi_find_result find_result; 2182 struct pqi_scsi_dev *device; 2183 struct pqi_scsi_dev *next; 2184 struct pqi_scsi_dev *matching_device; 2185 LIST_HEAD(add_list); 2186 LIST_HEAD(delete_list); 2187 2188 /* 2189 * The idea here is to do as little work as possible while holding the 2190 * spinlock. That's why we go to great pains to defer anything other 2191 * than updating the internal device list until after we release the 2192 * spinlock. 2193 */ 2194 2195 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2196 2197 /* Assume that all devices in the existing list have gone away. */ 2198 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 2199 device->device_gone = true; 2200 2201 for (i = 0; i < num_new_devices; i++) { 2202 device = new_device_list[i]; 2203 2204 find_result = pqi_scsi_find_entry(ctrl_info, device, 2205 &matching_device); 2206 2207 switch (find_result) { 2208 case DEVICE_SAME: 2209 /* 2210 * The newly found device is already in the existing 2211 * device list. 2212 */ 2213 device->new_device = false; 2214 matching_device->device_gone = false; 2215 pqi_scsi_update_device(ctrl_info, matching_device, device); 2216 break; 2217 case DEVICE_NOT_FOUND: 2218 /* 2219 * The newly found device is NOT in the existing device 2220 * list. 2221 */ 2222 device->new_device = true; 2223 break; 2224 case DEVICE_CHANGED: 2225 /* 2226 * The original device has gone away and we need to add 2227 * the new device. 2228 */ 2229 device->new_device = true; 2230 break; 2231 } 2232 } 2233 2234 /* Process all devices that have gone away. */ 2235 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list, 2236 scsi_device_list_entry) { 2237 if (device->device_gone) { 2238 list_del(&device->scsi_device_list_entry); 2239 list_add_tail(&device->delete_list_entry, &delete_list); 2240 } 2241 } 2242 2243 /* Process all new devices. */ 2244 for (i = 0; i < num_new_devices; i++) { 2245 device = new_device_list[i]; 2246 if (!device->new_device) 2247 continue; 2248 if (device->volume_offline) 2249 continue; 2250 list_add_tail(&device->scsi_device_list_entry, 2251 &ctrl_info->scsi_device_list); 2252 list_add_tail(&device->add_list_entry, &add_list); 2253 /* To prevent this device structure from being freed later. */ 2254 device->keep_device = true; 2255 } 2256 2257 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2258 2259 /* 2260 * If OFA is in progress and there are devices that need to be deleted, 2261 * allow any pending reset operations to continue and unblock any SCSI 2262 * requests before removal. 2263 */ 2264 if (pqi_ofa_in_progress(ctrl_info)) { 2265 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) 2266 if (pqi_is_device_added(device)) 2267 pqi_device_remove_start(device); 2268 pqi_ctrl_unblock_device_reset(ctrl_info); 2269 pqi_scsi_unblock_requests(ctrl_info); 2270 } 2271 2272 /* Remove all devices that have gone away. */ 2273 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) { 2274 if (device->volume_offline) { 2275 pqi_dev_info(ctrl_info, "offline", device); 2276 pqi_show_volume_status(ctrl_info, device); 2277 } else { 2278 pqi_dev_info(ctrl_info, "removed", device); 2279 } 2280 if (pqi_is_device_added(device)) 2281 pqi_remove_device(ctrl_info, device); 2282 list_del(&device->delete_list_entry); 2283 pqi_free_device(device); 2284 } 2285 2286 /* 2287 * Notify the SML of any existing device changes such as; 2288 * queue depth, device size. 2289 */ 2290 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 2291 if (device->sdev && device->queue_depth != device->advertised_queue_depth) { 2292 device->advertised_queue_depth = device->queue_depth; 2293 scsi_change_queue_depth(device->sdev, device->advertised_queue_depth); 2294 if (device->rescan) { 2295 scsi_rescan_device(&device->sdev->sdev_gendev); 2296 device->rescan = false; 2297 } 2298 } 2299 } 2300 2301 /* Expose any new devices. */ 2302 list_for_each_entry_safe(device, next, &add_list, add_list_entry) { 2303 if (!pqi_is_device_added(device)) { 2304 rc = pqi_add_device(ctrl_info, device); 2305 if (rc == 0) { 2306 pqi_dev_info(ctrl_info, "added", device); 2307 } else { 2308 dev_warn(&ctrl_info->pci_dev->dev, 2309 "scsi %d:%d:%d:%d addition failed, device not added\n", 2310 ctrl_info->scsi_host->host_no, 2311 device->bus, device->target, 2312 device->lun); 2313 pqi_fixup_botched_add(ctrl_info, device); 2314 } 2315 } 2316 } 2317 2318 ctrl_info->logical_volume_rescan_needed = false; 2319 2320 } 2321 2322 static inline bool pqi_is_supported_device(struct pqi_scsi_dev *device) 2323 { 2324 /* 2325 * Only support the HBA controller itself as a RAID 2326 * controller. If it's a RAID controller other than 2327 * the HBA itself (an external RAID controller, for 2328 * example), we don't support it. 2329 */ 2330 if (device->device_type == SA_DEVICE_TYPE_CONTROLLER && 2331 !pqi_is_hba_lunid(device->scsi3addr)) 2332 return false; 2333 2334 return true; 2335 } 2336 2337 static inline bool pqi_skip_device(u8 *scsi3addr) 2338 { 2339 /* Ignore all masked devices. */ 2340 if (MASKED_DEVICE(scsi3addr)) 2341 return true; 2342 2343 return false; 2344 } 2345 2346 static inline void pqi_mask_device(u8 *scsi3addr) 2347 { 2348 scsi3addr[3] |= 0xc0; 2349 } 2350 2351 static inline bool pqi_is_multipath_device(struct pqi_scsi_dev *device) 2352 { 2353 if (pqi_is_logical_device(device)) 2354 return false; 2355 2356 return (device->path_map & (device->path_map - 1)) != 0; 2357 } 2358 2359 static inline bool pqi_expose_device(struct pqi_scsi_dev *device) 2360 { 2361 return !device->is_physical_device || !pqi_skip_device(device->scsi3addr); 2362 } 2363 2364 static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2365 { 2366 int i; 2367 int rc; 2368 LIST_HEAD(new_device_list_head); 2369 struct report_phys_lun_16byte_wwid_list *physdev_list = NULL; 2370 struct report_log_lun_list *logdev_list = NULL; 2371 struct report_phys_lun_16byte_wwid *phys_lun; 2372 struct report_log_lun *log_lun; 2373 struct bmic_identify_physical_device *id_phys = NULL; 2374 u32 num_physicals; 2375 u32 num_logicals; 2376 struct pqi_scsi_dev **new_device_list = NULL; 2377 struct pqi_scsi_dev *device; 2378 struct pqi_scsi_dev *next; 2379 unsigned int num_new_devices; 2380 unsigned int num_valid_devices; 2381 bool is_physical_device; 2382 u8 *scsi3addr; 2383 unsigned int physical_index; 2384 unsigned int logical_index; 2385 static char *out_of_memory_msg = 2386 "failed to allocate memory, device discovery stopped"; 2387 2388 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list); 2389 if (rc) 2390 goto out; 2391 2392 if (physdev_list) 2393 num_physicals = 2394 get_unaligned_be32(&physdev_list->header.list_length) 2395 / sizeof(physdev_list->lun_entries[0]); 2396 else 2397 num_physicals = 0; 2398 2399 if (logdev_list) 2400 num_logicals = 2401 get_unaligned_be32(&logdev_list->header.list_length) 2402 / sizeof(logdev_list->lun_entries[0]); 2403 else 2404 num_logicals = 0; 2405 2406 if (num_physicals) { 2407 /* 2408 * We need this buffer for calls to pqi_get_physical_disk_info() 2409 * below. We allocate it here instead of inside 2410 * pqi_get_physical_disk_info() because it's a fairly large 2411 * buffer. 2412 */ 2413 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL); 2414 if (!id_phys) { 2415 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2416 out_of_memory_msg); 2417 rc = -ENOMEM; 2418 goto out; 2419 } 2420 2421 if (pqi_hide_vsep) { 2422 for (i = num_physicals - 1; i >= 0; i--) { 2423 phys_lun = &physdev_list->lun_entries[i]; 2424 if (CISS_GET_DRIVE_NUMBER(phys_lun->lunid) == PQI_VSEP_CISS_BTL) { 2425 pqi_mask_device(phys_lun->lunid); 2426 break; 2427 } 2428 } 2429 } 2430 } 2431 2432 if (num_logicals && 2433 (logdev_list->header.flags & CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX)) 2434 ctrl_info->lv_drive_type_mix_valid = true; 2435 2436 num_new_devices = num_physicals + num_logicals; 2437 2438 new_device_list = kmalloc_array(num_new_devices, 2439 sizeof(*new_device_list), 2440 GFP_KERNEL); 2441 if (!new_device_list) { 2442 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg); 2443 rc = -ENOMEM; 2444 goto out; 2445 } 2446 2447 for (i = 0; i < num_new_devices; i++) { 2448 device = kzalloc(sizeof(*device), GFP_KERNEL); 2449 if (!device) { 2450 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2451 out_of_memory_msg); 2452 rc = -ENOMEM; 2453 goto out; 2454 } 2455 list_add_tail(&device->new_device_list_entry, 2456 &new_device_list_head); 2457 } 2458 2459 device = NULL; 2460 num_valid_devices = 0; 2461 physical_index = 0; 2462 logical_index = 0; 2463 2464 for (i = 0; i < num_new_devices; i++) { 2465 2466 if ((!pqi_expose_ld_first && i < num_physicals) || 2467 (pqi_expose_ld_first && i >= num_logicals)) { 2468 is_physical_device = true; 2469 phys_lun = &physdev_list->lun_entries[physical_index++]; 2470 log_lun = NULL; 2471 scsi3addr = phys_lun->lunid; 2472 } else { 2473 is_physical_device = false; 2474 phys_lun = NULL; 2475 log_lun = &logdev_list->lun_entries[logical_index++]; 2476 scsi3addr = log_lun->lunid; 2477 } 2478 2479 if (is_physical_device && pqi_skip_device(scsi3addr)) 2480 continue; 2481 2482 if (device) 2483 device = list_next_entry(device, new_device_list_entry); 2484 else 2485 device = list_first_entry(&new_device_list_head, 2486 struct pqi_scsi_dev, new_device_list_entry); 2487 2488 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 2489 device->is_physical_device = is_physical_device; 2490 if (is_physical_device) { 2491 device->device_type = phys_lun->device_type; 2492 if (device->device_type == SA_DEVICE_TYPE_EXPANDER_SMP) 2493 device->is_expander_smp_device = true; 2494 } else { 2495 device->is_external_raid_device = 2496 pqi_is_external_raid_addr(scsi3addr); 2497 } 2498 2499 if (!pqi_is_supported_device(device)) 2500 continue; 2501 2502 /* Do not present disks that the OS cannot fully probe */ 2503 if (pqi_keep_device_offline(ctrl_info, device)) 2504 continue; 2505 2506 /* Gather information about the device. */ 2507 rc = pqi_get_device_info(ctrl_info, device, id_phys); 2508 if (rc == -ENOMEM) { 2509 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2510 out_of_memory_msg); 2511 goto out; 2512 } 2513 if (rc) { 2514 if (device->is_physical_device) 2515 dev_warn(&ctrl_info->pci_dev->dev, 2516 "obtaining device info failed, skipping physical device %016llx%016llx\n", 2517 get_unaligned_be64(&phys_lun->wwid[0]), 2518 get_unaligned_be64(&phys_lun->wwid[8])); 2519 else 2520 dev_warn(&ctrl_info->pci_dev->dev, 2521 "obtaining device info failed, skipping logical device %08x%08x\n", 2522 *((u32 *)&device->scsi3addr), 2523 *((u32 *)&device->scsi3addr[4])); 2524 rc = 0; 2525 continue; 2526 } 2527 2528 pqi_assign_bus_target_lun(device); 2529 2530 if (device->is_physical_device) { 2531 memcpy(device->wwid, phys_lun->wwid, sizeof(device->wwid)); 2532 if ((phys_lun->device_flags & 2533 CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED) && 2534 phys_lun->aio_handle) { 2535 device->aio_enabled = true; 2536 device->aio_handle = 2537 phys_lun->aio_handle; 2538 } 2539 } else { 2540 memcpy(device->volume_id, log_lun->volume_id, 2541 sizeof(device->volume_id)); 2542 } 2543 2544 device->sas_address = get_unaligned_be64(&device->wwid[0]); 2545 2546 new_device_list[num_valid_devices++] = device; 2547 } 2548 2549 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices); 2550 2551 out: 2552 list_for_each_entry_safe(device, next, &new_device_list_head, 2553 new_device_list_entry) { 2554 if (device->keep_device) 2555 continue; 2556 list_del(&device->new_device_list_entry); 2557 pqi_free_device(device); 2558 } 2559 2560 kfree(new_device_list); 2561 kfree(physdev_list); 2562 kfree(logdev_list); 2563 kfree(id_phys); 2564 2565 return rc; 2566 } 2567 2568 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2569 { 2570 int rc; 2571 int mutex_acquired; 2572 2573 if (pqi_ctrl_offline(ctrl_info)) 2574 return -ENXIO; 2575 2576 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex); 2577 2578 if (!mutex_acquired) { 2579 if (pqi_ctrl_scan_blocked(ctrl_info)) 2580 return -EBUSY; 2581 pqi_schedule_rescan_worker_delayed(ctrl_info); 2582 return -EINPROGRESS; 2583 } 2584 2585 rc = pqi_update_scsi_devices(ctrl_info); 2586 if (rc && !pqi_ctrl_scan_blocked(ctrl_info)) 2587 pqi_schedule_rescan_worker_delayed(ctrl_info); 2588 2589 mutex_unlock(&ctrl_info->scan_mutex); 2590 2591 return rc; 2592 } 2593 2594 static void pqi_scan_start(struct Scsi_Host *shost) 2595 { 2596 struct pqi_ctrl_info *ctrl_info; 2597 2598 ctrl_info = shost_to_hba(shost); 2599 2600 pqi_scan_scsi_devices(ctrl_info); 2601 } 2602 2603 /* Returns TRUE if scan is finished. */ 2604 2605 static int pqi_scan_finished(struct Scsi_Host *shost, 2606 unsigned long elapsed_time) 2607 { 2608 struct pqi_ctrl_info *ctrl_info; 2609 2610 ctrl_info = shost_priv(shost); 2611 2612 return !mutex_is_locked(&ctrl_info->scan_mutex); 2613 } 2614 2615 static inline void pqi_set_encryption_info(struct pqi_encryption_info *encryption_info, 2616 struct raid_map *raid_map, u64 first_block) 2617 { 2618 u32 volume_blk_size; 2619 2620 /* 2621 * Set the encryption tweak values based on logical block address. 2622 * If the block size is 512, the tweak value is equal to the LBA. 2623 * For other block sizes, tweak value is (LBA * block size) / 512. 2624 */ 2625 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size); 2626 if (volume_blk_size != 512) 2627 first_block = (first_block * volume_blk_size) / 512; 2628 2629 encryption_info->data_encryption_key_index = 2630 get_unaligned_le16(&raid_map->data_encryption_key_index); 2631 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block); 2632 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block); 2633 } 2634 2635 /* 2636 * Attempt to perform RAID bypass mapping for a logical volume I/O. 2637 */ 2638 2639 static bool pqi_aio_raid_level_supported(struct pqi_ctrl_info *ctrl_info, 2640 struct pqi_scsi_dev_raid_map_data *rmd) 2641 { 2642 bool is_supported = true; 2643 2644 switch (rmd->raid_level) { 2645 case SA_RAID_0: 2646 break; 2647 case SA_RAID_1: 2648 if (rmd->is_write && (!ctrl_info->enable_r1_writes || 2649 rmd->data_length > ctrl_info->max_write_raid_1_10_2drive)) 2650 is_supported = false; 2651 break; 2652 case SA_RAID_TRIPLE: 2653 if (rmd->is_write && (!ctrl_info->enable_r1_writes || 2654 rmd->data_length > ctrl_info->max_write_raid_1_10_3drive)) 2655 is_supported = false; 2656 break; 2657 case SA_RAID_5: 2658 if (rmd->is_write && (!ctrl_info->enable_r5_writes || 2659 rmd->data_length > ctrl_info->max_write_raid_5_6)) 2660 is_supported = false; 2661 break; 2662 case SA_RAID_6: 2663 if (rmd->is_write && (!ctrl_info->enable_r6_writes || 2664 rmd->data_length > ctrl_info->max_write_raid_5_6)) 2665 is_supported = false; 2666 break; 2667 default: 2668 is_supported = false; 2669 break; 2670 } 2671 2672 return is_supported; 2673 } 2674 2675 #define PQI_RAID_BYPASS_INELIGIBLE 1 2676 2677 static int pqi_get_aio_lba_and_block_count(struct scsi_cmnd *scmd, 2678 struct pqi_scsi_dev_raid_map_data *rmd) 2679 { 2680 /* Check for valid opcode, get LBA and block count. */ 2681 switch (scmd->cmnd[0]) { 2682 case WRITE_6: 2683 rmd->is_write = true; 2684 fallthrough; 2685 case READ_6: 2686 rmd->first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) | 2687 (scmd->cmnd[2] << 8) | scmd->cmnd[3]); 2688 rmd->block_cnt = (u32)scmd->cmnd[4]; 2689 if (rmd->block_cnt == 0) 2690 rmd->block_cnt = 256; 2691 break; 2692 case WRITE_10: 2693 rmd->is_write = true; 2694 fallthrough; 2695 case READ_10: 2696 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2697 rmd->block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]); 2698 break; 2699 case WRITE_12: 2700 rmd->is_write = true; 2701 fallthrough; 2702 case READ_12: 2703 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2704 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[6]); 2705 break; 2706 case WRITE_16: 2707 rmd->is_write = true; 2708 fallthrough; 2709 case READ_16: 2710 rmd->first_block = get_unaligned_be64(&scmd->cmnd[2]); 2711 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[10]); 2712 break; 2713 default: 2714 /* Process via normal I/O path. */ 2715 return PQI_RAID_BYPASS_INELIGIBLE; 2716 } 2717 2718 put_unaligned_le32(scsi_bufflen(scmd), &rmd->data_length); 2719 2720 return 0; 2721 } 2722 2723 static int pci_get_aio_common_raid_map_values(struct pqi_ctrl_info *ctrl_info, 2724 struct pqi_scsi_dev_raid_map_data *rmd, struct raid_map *raid_map) 2725 { 2726 #if BITS_PER_LONG == 32 2727 u64 tmpdiv; 2728 #endif 2729 2730 rmd->last_block = rmd->first_block + rmd->block_cnt - 1; 2731 2732 /* Check for invalid block or wraparound. */ 2733 if (rmd->last_block >= 2734 get_unaligned_le64(&raid_map->volume_blk_cnt) || 2735 rmd->last_block < rmd->first_block) 2736 return PQI_RAID_BYPASS_INELIGIBLE; 2737 2738 rmd->data_disks_per_row = 2739 get_unaligned_le16(&raid_map->data_disks_per_row); 2740 rmd->strip_size = get_unaligned_le16(&raid_map->strip_size); 2741 rmd->layout_map_count = get_unaligned_le16(&raid_map->layout_map_count); 2742 2743 /* Calculate stripe information for the request. */ 2744 rmd->blocks_per_row = rmd->data_disks_per_row * rmd->strip_size; 2745 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */ 2746 return PQI_RAID_BYPASS_INELIGIBLE; 2747 #if BITS_PER_LONG == 32 2748 tmpdiv = rmd->first_block; 2749 do_div(tmpdiv, rmd->blocks_per_row); 2750 rmd->first_row = tmpdiv; 2751 tmpdiv = rmd->last_block; 2752 do_div(tmpdiv, rmd->blocks_per_row); 2753 rmd->last_row = tmpdiv; 2754 rmd->first_row_offset = (u32)(rmd->first_block - (rmd->first_row * rmd->blocks_per_row)); 2755 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * rmd->blocks_per_row)); 2756 tmpdiv = rmd->first_row_offset; 2757 do_div(tmpdiv, rmd->strip_size); 2758 rmd->first_column = tmpdiv; 2759 tmpdiv = rmd->last_row_offset; 2760 do_div(tmpdiv, rmd->strip_size); 2761 rmd->last_column = tmpdiv; 2762 #else 2763 rmd->first_row = rmd->first_block / rmd->blocks_per_row; 2764 rmd->last_row = rmd->last_block / rmd->blocks_per_row; 2765 rmd->first_row_offset = (u32)(rmd->first_block - 2766 (rmd->first_row * rmd->blocks_per_row)); 2767 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * 2768 rmd->blocks_per_row)); 2769 rmd->first_column = rmd->first_row_offset / rmd->strip_size; 2770 rmd->last_column = rmd->last_row_offset / rmd->strip_size; 2771 #endif 2772 2773 /* If this isn't a single row/column then give to the controller. */ 2774 if (rmd->first_row != rmd->last_row || 2775 rmd->first_column != rmd->last_column) 2776 return PQI_RAID_BYPASS_INELIGIBLE; 2777 2778 /* Proceeding with driver mapping. */ 2779 rmd->total_disks_per_row = rmd->data_disks_per_row + 2780 get_unaligned_le16(&raid_map->metadata_disks_per_row); 2781 rmd->map_row = ((u32)(rmd->first_row >> 2782 raid_map->parity_rotation_shift)) % 2783 get_unaligned_le16(&raid_map->row_cnt); 2784 rmd->map_index = (rmd->map_row * rmd->total_disks_per_row) + 2785 rmd->first_column; 2786 2787 return 0; 2788 } 2789 2790 static int pqi_calc_aio_r5_or_r6(struct pqi_scsi_dev_raid_map_data *rmd, 2791 struct raid_map *raid_map) 2792 { 2793 #if BITS_PER_LONG == 32 2794 u64 tmpdiv; 2795 #endif 2796 2797 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */ 2798 return PQI_RAID_BYPASS_INELIGIBLE; 2799 2800 /* RAID 50/60 */ 2801 /* Verify first and last block are in same RAID group. */ 2802 rmd->stripesize = rmd->blocks_per_row * rmd->layout_map_count; 2803 #if BITS_PER_LONG == 32 2804 tmpdiv = rmd->first_block; 2805 rmd->first_group = do_div(tmpdiv, rmd->stripesize); 2806 tmpdiv = rmd->first_group; 2807 do_div(tmpdiv, rmd->blocks_per_row); 2808 rmd->first_group = tmpdiv; 2809 tmpdiv = rmd->last_block; 2810 rmd->last_group = do_div(tmpdiv, rmd->stripesize); 2811 tmpdiv = rmd->last_group; 2812 do_div(tmpdiv, rmd->blocks_per_row); 2813 rmd->last_group = tmpdiv; 2814 #else 2815 rmd->first_group = (rmd->first_block % rmd->stripesize) / rmd->blocks_per_row; 2816 rmd->last_group = (rmd->last_block % rmd->stripesize) / rmd->blocks_per_row; 2817 #endif 2818 if (rmd->first_group != rmd->last_group) 2819 return PQI_RAID_BYPASS_INELIGIBLE; 2820 2821 /* Verify request is in a single row of RAID 5/6. */ 2822 #if BITS_PER_LONG == 32 2823 tmpdiv = rmd->first_block; 2824 do_div(tmpdiv, rmd->stripesize); 2825 rmd->first_row = tmpdiv; 2826 rmd->r5or6_first_row = tmpdiv; 2827 tmpdiv = rmd->last_block; 2828 do_div(tmpdiv, rmd->stripesize); 2829 rmd->r5or6_last_row = tmpdiv; 2830 #else 2831 rmd->first_row = rmd->r5or6_first_row = 2832 rmd->first_block / rmd->stripesize; 2833 rmd->r5or6_last_row = rmd->last_block / rmd->stripesize; 2834 #endif 2835 if (rmd->r5or6_first_row != rmd->r5or6_last_row) 2836 return PQI_RAID_BYPASS_INELIGIBLE; 2837 2838 /* Verify request is in a single column. */ 2839 #if BITS_PER_LONG == 32 2840 tmpdiv = rmd->first_block; 2841 rmd->first_row_offset = do_div(tmpdiv, rmd->stripesize); 2842 tmpdiv = rmd->first_row_offset; 2843 rmd->first_row_offset = (u32)do_div(tmpdiv, rmd->blocks_per_row); 2844 rmd->r5or6_first_row_offset = rmd->first_row_offset; 2845 tmpdiv = rmd->last_block; 2846 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->stripesize); 2847 tmpdiv = rmd->r5or6_last_row_offset; 2848 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->blocks_per_row); 2849 tmpdiv = rmd->r5or6_first_row_offset; 2850 do_div(tmpdiv, rmd->strip_size); 2851 rmd->first_column = rmd->r5or6_first_column = tmpdiv; 2852 tmpdiv = rmd->r5or6_last_row_offset; 2853 do_div(tmpdiv, rmd->strip_size); 2854 rmd->r5or6_last_column = tmpdiv; 2855 #else 2856 rmd->first_row_offset = rmd->r5or6_first_row_offset = 2857 (u32)((rmd->first_block % rmd->stripesize) % 2858 rmd->blocks_per_row); 2859 2860 rmd->r5or6_last_row_offset = 2861 (u32)((rmd->last_block % rmd->stripesize) % 2862 rmd->blocks_per_row); 2863 2864 rmd->first_column = 2865 rmd->r5or6_first_row_offset / rmd->strip_size; 2866 rmd->r5or6_first_column = rmd->first_column; 2867 rmd->r5or6_last_column = rmd->r5or6_last_row_offset / rmd->strip_size; 2868 #endif 2869 if (rmd->r5or6_first_column != rmd->r5or6_last_column) 2870 return PQI_RAID_BYPASS_INELIGIBLE; 2871 2872 /* Request is eligible. */ 2873 rmd->map_row = 2874 ((u32)(rmd->first_row >> raid_map->parity_rotation_shift)) % 2875 get_unaligned_le16(&raid_map->row_cnt); 2876 2877 rmd->map_index = (rmd->first_group * 2878 (get_unaligned_le16(&raid_map->row_cnt) * 2879 rmd->total_disks_per_row)) + 2880 (rmd->map_row * rmd->total_disks_per_row) + rmd->first_column; 2881 2882 if (rmd->is_write) { 2883 u32 index; 2884 2885 /* 2886 * p_parity_it_nexus and q_parity_it_nexus are pointers to the 2887 * parity entries inside the device's raid_map. 2888 * 2889 * A device's RAID map is bounded by: number of RAID disks squared. 2890 * 2891 * The devices RAID map size is checked during device 2892 * initialization. 2893 */ 2894 index = DIV_ROUND_UP(rmd->map_index + 1, rmd->total_disks_per_row); 2895 index *= rmd->total_disks_per_row; 2896 index -= get_unaligned_le16(&raid_map->metadata_disks_per_row); 2897 2898 rmd->p_parity_it_nexus = raid_map->disk_data[index].aio_handle; 2899 if (rmd->raid_level == SA_RAID_6) { 2900 rmd->q_parity_it_nexus = raid_map->disk_data[index + 1].aio_handle; 2901 rmd->xor_mult = raid_map->disk_data[rmd->map_index].xor_mult[1]; 2902 } 2903 #if BITS_PER_LONG == 32 2904 tmpdiv = rmd->first_block; 2905 do_div(tmpdiv, rmd->blocks_per_row); 2906 rmd->row = tmpdiv; 2907 #else 2908 rmd->row = rmd->first_block / rmd->blocks_per_row; 2909 #endif 2910 } 2911 2912 return 0; 2913 } 2914 2915 static void pqi_set_aio_cdb(struct pqi_scsi_dev_raid_map_data *rmd) 2916 { 2917 /* Build the new CDB for the physical disk I/O. */ 2918 if (rmd->disk_block > 0xffffffff) { 2919 rmd->cdb[0] = rmd->is_write ? WRITE_16 : READ_16; 2920 rmd->cdb[1] = 0; 2921 put_unaligned_be64(rmd->disk_block, &rmd->cdb[2]); 2922 put_unaligned_be32(rmd->disk_block_cnt, &rmd->cdb[10]); 2923 rmd->cdb[14] = 0; 2924 rmd->cdb[15] = 0; 2925 rmd->cdb_length = 16; 2926 } else { 2927 rmd->cdb[0] = rmd->is_write ? WRITE_10 : READ_10; 2928 rmd->cdb[1] = 0; 2929 put_unaligned_be32((u32)rmd->disk_block, &rmd->cdb[2]); 2930 rmd->cdb[6] = 0; 2931 put_unaligned_be16((u16)rmd->disk_block_cnt, &rmd->cdb[7]); 2932 rmd->cdb[9] = 0; 2933 rmd->cdb_length = 10; 2934 } 2935 } 2936 2937 static void pqi_calc_aio_r1_nexus(struct raid_map *raid_map, 2938 struct pqi_scsi_dev_raid_map_data *rmd) 2939 { 2940 u32 index; 2941 u32 group; 2942 2943 group = rmd->map_index / rmd->data_disks_per_row; 2944 2945 index = rmd->map_index - (group * rmd->data_disks_per_row); 2946 rmd->it_nexus[0] = raid_map->disk_data[index].aio_handle; 2947 index += rmd->data_disks_per_row; 2948 rmd->it_nexus[1] = raid_map->disk_data[index].aio_handle; 2949 if (rmd->layout_map_count > 2) { 2950 index += rmd->data_disks_per_row; 2951 rmd->it_nexus[2] = raid_map->disk_data[index].aio_handle; 2952 } 2953 2954 rmd->num_it_nexus_entries = rmd->layout_map_count; 2955 } 2956 2957 static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 2958 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 2959 struct pqi_queue_group *queue_group) 2960 { 2961 int rc; 2962 struct raid_map *raid_map; 2963 u32 group; 2964 u32 next_bypass_group; 2965 struct pqi_encryption_info *encryption_info_ptr; 2966 struct pqi_encryption_info encryption_info; 2967 struct pqi_scsi_dev_raid_map_data rmd = { 0 }; 2968 2969 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd); 2970 if (rc) 2971 return PQI_RAID_BYPASS_INELIGIBLE; 2972 2973 rmd.raid_level = device->raid_level; 2974 2975 if (!pqi_aio_raid_level_supported(ctrl_info, &rmd)) 2976 return PQI_RAID_BYPASS_INELIGIBLE; 2977 2978 if (unlikely(rmd.block_cnt == 0)) 2979 return PQI_RAID_BYPASS_INELIGIBLE; 2980 2981 raid_map = device->raid_map; 2982 2983 rc = pci_get_aio_common_raid_map_values(ctrl_info, &rmd, raid_map); 2984 if (rc) 2985 return PQI_RAID_BYPASS_INELIGIBLE; 2986 2987 if (device->raid_level == SA_RAID_1 || 2988 device->raid_level == SA_RAID_TRIPLE) { 2989 if (rmd.is_write) { 2990 pqi_calc_aio_r1_nexus(raid_map, &rmd); 2991 } else { 2992 group = device->next_bypass_group[rmd.map_index]; 2993 next_bypass_group = group + 1; 2994 if (next_bypass_group >= rmd.layout_map_count) 2995 next_bypass_group = 0; 2996 device->next_bypass_group[rmd.map_index] = next_bypass_group; 2997 rmd.map_index += group * rmd.data_disks_per_row; 2998 } 2999 } else if ((device->raid_level == SA_RAID_5 || 3000 device->raid_level == SA_RAID_6) && 3001 (rmd.layout_map_count > 1 || rmd.is_write)) { 3002 rc = pqi_calc_aio_r5_or_r6(&rmd, raid_map); 3003 if (rc) 3004 return PQI_RAID_BYPASS_INELIGIBLE; 3005 } 3006 3007 if (unlikely(rmd.map_index >= RAID_MAP_MAX_ENTRIES)) 3008 return PQI_RAID_BYPASS_INELIGIBLE; 3009 3010 rmd.aio_handle = raid_map->disk_data[rmd.map_index].aio_handle; 3011 rmd.disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) + 3012 rmd.first_row * rmd.strip_size + 3013 (rmd.first_row_offset - rmd.first_column * rmd.strip_size); 3014 rmd.disk_block_cnt = rmd.block_cnt; 3015 3016 /* Handle differing logical/physical block sizes. */ 3017 if (raid_map->phys_blk_shift) { 3018 rmd.disk_block <<= raid_map->phys_blk_shift; 3019 rmd.disk_block_cnt <<= raid_map->phys_blk_shift; 3020 } 3021 3022 if (unlikely(rmd.disk_block_cnt > 0xffff)) 3023 return PQI_RAID_BYPASS_INELIGIBLE; 3024 3025 pqi_set_aio_cdb(&rmd); 3026 3027 if (get_unaligned_le16(&raid_map->flags) & RAID_MAP_ENCRYPTION_ENABLED) { 3028 if (rmd.data_length > device->max_transfer_encrypted) 3029 return PQI_RAID_BYPASS_INELIGIBLE; 3030 pqi_set_encryption_info(&encryption_info, raid_map, rmd.first_block); 3031 encryption_info_ptr = &encryption_info; 3032 } else { 3033 encryption_info_ptr = NULL; 3034 } 3035 3036 if (rmd.is_write) { 3037 switch (device->raid_level) { 3038 case SA_RAID_1: 3039 case SA_RAID_TRIPLE: 3040 return pqi_aio_submit_r1_write_io(ctrl_info, scmd, queue_group, 3041 encryption_info_ptr, device, &rmd); 3042 case SA_RAID_5: 3043 case SA_RAID_6: 3044 return pqi_aio_submit_r56_write_io(ctrl_info, scmd, queue_group, 3045 encryption_info_ptr, device, &rmd); 3046 } 3047 } 3048 3049 return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle, 3050 rmd.cdb, rmd.cdb_length, queue_group, 3051 encryption_info_ptr, true, false); 3052 } 3053 3054 #define PQI_STATUS_IDLE 0x0 3055 3056 #define PQI_CREATE_ADMIN_QUEUE_PAIR 1 3057 #define PQI_DELETE_ADMIN_QUEUE_PAIR 2 3058 3059 #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0 3060 #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1 3061 #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2 3062 #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3 3063 #define PQI_DEVICE_STATE_ERROR 0x4 3064 3065 #define PQI_MODE_READY_TIMEOUT_SECS 30 3066 #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1 3067 3068 static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info) 3069 { 3070 struct pqi_device_registers __iomem *pqi_registers; 3071 unsigned long timeout; 3072 u64 signature; 3073 u8 status; 3074 3075 pqi_registers = ctrl_info->pqi_registers; 3076 timeout = (PQI_MODE_READY_TIMEOUT_SECS * HZ) + jiffies; 3077 3078 while (1) { 3079 signature = readq(&pqi_registers->signature); 3080 if (memcmp(&signature, PQI_DEVICE_SIGNATURE, 3081 sizeof(signature)) == 0) 3082 break; 3083 if (time_after(jiffies, timeout)) { 3084 dev_err(&ctrl_info->pci_dev->dev, 3085 "timed out waiting for PQI signature\n"); 3086 return -ETIMEDOUT; 3087 } 3088 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3089 } 3090 3091 while (1) { 3092 status = readb(&pqi_registers->function_and_status_code); 3093 if (status == PQI_STATUS_IDLE) 3094 break; 3095 if (time_after(jiffies, timeout)) { 3096 dev_err(&ctrl_info->pci_dev->dev, 3097 "timed out waiting for PQI IDLE\n"); 3098 return -ETIMEDOUT; 3099 } 3100 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3101 } 3102 3103 while (1) { 3104 if (readl(&pqi_registers->device_status) == 3105 PQI_DEVICE_STATE_ALL_REGISTERS_READY) 3106 break; 3107 if (time_after(jiffies, timeout)) { 3108 dev_err(&ctrl_info->pci_dev->dev, 3109 "timed out waiting for PQI all registers ready\n"); 3110 return -ETIMEDOUT; 3111 } 3112 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3113 } 3114 3115 return 0; 3116 } 3117 3118 static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request) 3119 { 3120 struct pqi_scsi_dev *device; 3121 3122 device = io_request->scmd->device->hostdata; 3123 device->raid_bypass_enabled = false; 3124 device->aio_enabled = false; 3125 } 3126 3127 static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path) 3128 { 3129 struct pqi_ctrl_info *ctrl_info; 3130 struct pqi_scsi_dev *device; 3131 3132 device = sdev->hostdata; 3133 if (device->device_offline) 3134 return; 3135 3136 device->device_offline = true; 3137 ctrl_info = shost_to_hba(sdev->host); 3138 pqi_schedule_rescan_worker(ctrl_info); 3139 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n", 3140 path, ctrl_info->scsi_host->host_no, device->bus, 3141 device->target, device->lun); 3142 } 3143 3144 static void pqi_process_raid_io_error(struct pqi_io_request *io_request) 3145 { 3146 u8 scsi_status; 3147 u8 host_byte; 3148 struct scsi_cmnd *scmd; 3149 struct pqi_raid_error_info *error_info; 3150 size_t sense_data_length; 3151 int residual_count; 3152 int xfer_count; 3153 struct scsi_sense_hdr sshdr; 3154 3155 scmd = io_request->scmd; 3156 if (!scmd) 3157 return; 3158 3159 error_info = io_request->error_info; 3160 scsi_status = error_info->status; 3161 host_byte = DID_OK; 3162 3163 switch (error_info->data_out_result) { 3164 case PQI_DATA_IN_OUT_GOOD: 3165 break; 3166 case PQI_DATA_IN_OUT_UNDERFLOW: 3167 xfer_count = 3168 get_unaligned_le32(&error_info->data_out_transferred); 3169 residual_count = scsi_bufflen(scmd) - xfer_count; 3170 scsi_set_resid(scmd, residual_count); 3171 if (xfer_count < scmd->underflow) 3172 host_byte = DID_SOFT_ERROR; 3173 break; 3174 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 3175 case PQI_DATA_IN_OUT_ABORTED: 3176 host_byte = DID_ABORT; 3177 break; 3178 case PQI_DATA_IN_OUT_TIMEOUT: 3179 host_byte = DID_TIME_OUT; 3180 break; 3181 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 3182 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 3183 case PQI_DATA_IN_OUT_BUFFER_ERROR: 3184 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 3185 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 3186 case PQI_DATA_IN_OUT_ERROR: 3187 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 3188 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 3189 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 3190 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 3191 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 3192 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 3193 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 3194 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 3195 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 3196 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 3197 default: 3198 host_byte = DID_ERROR; 3199 break; 3200 } 3201 3202 sense_data_length = get_unaligned_le16(&error_info->sense_data_length); 3203 if (sense_data_length == 0) 3204 sense_data_length = 3205 get_unaligned_le16(&error_info->response_data_length); 3206 if (sense_data_length) { 3207 if (sense_data_length > sizeof(error_info->data)) 3208 sense_data_length = sizeof(error_info->data); 3209 3210 if (scsi_status == SAM_STAT_CHECK_CONDITION && 3211 scsi_normalize_sense(error_info->data, 3212 sense_data_length, &sshdr) && 3213 sshdr.sense_key == HARDWARE_ERROR && 3214 sshdr.asc == 0x3e) { 3215 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host); 3216 struct pqi_scsi_dev *device = scmd->device->hostdata; 3217 3218 switch (sshdr.ascq) { 3219 case 0x1: /* LOGICAL UNIT FAILURE */ 3220 if (printk_ratelimit()) 3221 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n", 3222 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 3223 pqi_take_device_offline(scmd->device, "RAID"); 3224 host_byte = DID_NO_CONNECT; 3225 break; 3226 3227 default: /* See http://www.t10.org/lists/asc-num.htm#ASC_3E */ 3228 if (printk_ratelimit()) 3229 scmd_printk(KERN_ERR, scmd, "received unhandled error %d from controller for scsi %d:%d:%d:%d\n", 3230 sshdr.ascq, ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 3231 break; 3232 } 3233 } 3234 3235 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 3236 sense_data_length = SCSI_SENSE_BUFFERSIZE; 3237 memcpy(scmd->sense_buffer, error_info->data, 3238 sense_data_length); 3239 } 3240 3241 scmd->result = scsi_status; 3242 set_host_byte(scmd, host_byte); 3243 } 3244 3245 static void pqi_process_aio_io_error(struct pqi_io_request *io_request) 3246 { 3247 u8 scsi_status; 3248 u8 host_byte; 3249 struct scsi_cmnd *scmd; 3250 struct pqi_aio_error_info *error_info; 3251 size_t sense_data_length; 3252 int residual_count; 3253 int xfer_count; 3254 bool device_offline; 3255 struct pqi_scsi_dev *device; 3256 3257 scmd = io_request->scmd; 3258 error_info = io_request->error_info; 3259 host_byte = DID_OK; 3260 sense_data_length = 0; 3261 device_offline = false; 3262 device = scmd->device->hostdata; 3263 3264 switch (error_info->service_response) { 3265 case PQI_AIO_SERV_RESPONSE_COMPLETE: 3266 scsi_status = error_info->status; 3267 break; 3268 case PQI_AIO_SERV_RESPONSE_FAILURE: 3269 switch (error_info->status) { 3270 case PQI_AIO_STATUS_IO_ABORTED: 3271 scsi_status = SAM_STAT_TASK_ABORTED; 3272 break; 3273 case PQI_AIO_STATUS_UNDERRUN: 3274 scsi_status = SAM_STAT_GOOD; 3275 residual_count = get_unaligned_le32( 3276 &error_info->residual_count); 3277 scsi_set_resid(scmd, residual_count); 3278 xfer_count = scsi_bufflen(scmd) - residual_count; 3279 if (xfer_count < scmd->underflow) 3280 host_byte = DID_SOFT_ERROR; 3281 break; 3282 case PQI_AIO_STATUS_OVERRUN: 3283 scsi_status = SAM_STAT_GOOD; 3284 break; 3285 case PQI_AIO_STATUS_AIO_PATH_DISABLED: 3286 pqi_aio_path_disabled(io_request); 3287 if (pqi_is_multipath_device(device)) { 3288 pqi_device_remove_start(device); 3289 host_byte = DID_NO_CONNECT; 3290 scsi_status = SAM_STAT_CHECK_CONDITION; 3291 } else { 3292 scsi_status = SAM_STAT_GOOD; 3293 io_request->status = -EAGAIN; 3294 } 3295 break; 3296 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE: 3297 case PQI_AIO_STATUS_INVALID_DEVICE: 3298 if (!io_request->raid_bypass) { 3299 device_offline = true; 3300 pqi_take_device_offline(scmd->device, "AIO"); 3301 host_byte = DID_NO_CONNECT; 3302 } 3303 scsi_status = SAM_STAT_CHECK_CONDITION; 3304 break; 3305 case PQI_AIO_STATUS_IO_ERROR: 3306 default: 3307 scsi_status = SAM_STAT_CHECK_CONDITION; 3308 break; 3309 } 3310 break; 3311 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE: 3312 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED: 3313 scsi_status = SAM_STAT_GOOD; 3314 break; 3315 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED: 3316 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN: 3317 default: 3318 scsi_status = SAM_STAT_CHECK_CONDITION; 3319 break; 3320 } 3321 3322 if (error_info->data_present) { 3323 sense_data_length = 3324 get_unaligned_le16(&error_info->data_length); 3325 if (sense_data_length) { 3326 if (sense_data_length > sizeof(error_info->data)) 3327 sense_data_length = sizeof(error_info->data); 3328 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 3329 sense_data_length = SCSI_SENSE_BUFFERSIZE; 3330 memcpy(scmd->sense_buffer, error_info->data, 3331 sense_data_length); 3332 } 3333 } 3334 3335 if (device_offline && sense_data_length == 0) 3336 scsi_build_sense(scmd, 0, HARDWARE_ERROR, 0x3e, 0x1); 3337 3338 scmd->result = scsi_status; 3339 set_host_byte(scmd, host_byte); 3340 } 3341 3342 static void pqi_process_io_error(unsigned int iu_type, 3343 struct pqi_io_request *io_request) 3344 { 3345 switch (iu_type) { 3346 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 3347 pqi_process_raid_io_error(io_request); 3348 break; 3349 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 3350 pqi_process_aio_io_error(io_request); 3351 break; 3352 } 3353 } 3354 3355 static int pqi_interpret_task_management_response(struct pqi_ctrl_info *ctrl_info, 3356 struct pqi_task_management_response *response) 3357 { 3358 int rc; 3359 3360 switch (response->response_code) { 3361 case SOP_TMF_COMPLETE: 3362 case SOP_TMF_FUNCTION_SUCCEEDED: 3363 rc = 0; 3364 break; 3365 case SOP_TMF_REJECTED: 3366 rc = -EAGAIN; 3367 break; 3368 case SOP_RC_INCORRECT_LOGICAL_UNIT: 3369 rc = -ENODEV; 3370 break; 3371 default: 3372 rc = -EIO; 3373 break; 3374 } 3375 3376 if (rc) 3377 dev_err(&ctrl_info->pci_dev->dev, 3378 "Task Management Function error: %d (response code: %u)\n", rc, response->response_code); 3379 3380 return rc; 3381 } 3382 3383 static inline void pqi_invalid_response(struct pqi_ctrl_info *ctrl_info, 3384 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 3385 { 3386 pqi_take_ctrl_offline(ctrl_info, ctrl_shutdown_reason); 3387 } 3388 3389 static int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, struct pqi_queue_group *queue_group) 3390 { 3391 int num_responses; 3392 pqi_index_t oq_pi; 3393 pqi_index_t oq_ci; 3394 struct pqi_io_request *io_request; 3395 struct pqi_io_response *response; 3396 u16 request_id; 3397 3398 num_responses = 0; 3399 oq_ci = queue_group->oq_ci_copy; 3400 3401 while (1) { 3402 oq_pi = readl(queue_group->oq_pi); 3403 if (oq_pi >= ctrl_info->num_elements_per_oq) { 3404 pqi_invalid_response(ctrl_info, PQI_IO_PI_OUT_OF_RANGE); 3405 dev_err(&ctrl_info->pci_dev->dev, 3406 "I/O interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n", 3407 oq_pi, ctrl_info->num_elements_per_oq - 1, oq_ci); 3408 return -1; 3409 } 3410 if (oq_pi == oq_ci) 3411 break; 3412 3413 num_responses++; 3414 response = queue_group->oq_element_array + 3415 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 3416 3417 request_id = get_unaligned_le16(&response->request_id); 3418 if (request_id >= ctrl_info->max_io_slots) { 3419 pqi_invalid_response(ctrl_info, PQI_INVALID_REQ_ID); 3420 dev_err(&ctrl_info->pci_dev->dev, 3421 "request ID in response (%u) out of range (0-%u): producer index: %u consumer index: %u\n", 3422 request_id, ctrl_info->max_io_slots - 1, oq_pi, oq_ci); 3423 return -1; 3424 } 3425 3426 io_request = &ctrl_info->io_request_pool[request_id]; 3427 if (atomic_read(&io_request->refcount) == 0) { 3428 pqi_invalid_response(ctrl_info, PQI_UNMATCHED_REQ_ID); 3429 dev_err(&ctrl_info->pci_dev->dev, 3430 "request ID in response (%u) does not match an outstanding I/O request: producer index: %u consumer index: %u\n", 3431 request_id, oq_pi, oq_ci); 3432 return -1; 3433 } 3434 3435 switch (response->header.iu_type) { 3436 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS: 3437 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS: 3438 if (io_request->scmd) 3439 io_request->scmd->result = 0; 3440 fallthrough; 3441 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT: 3442 break; 3443 case PQI_RESPONSE_IU_VENDOR_GENERAL: 3444 io_request->status = 3445 get_unaligned_le16( 3446 &((struct pqi_vendor_general_response *)response)->status); 3447 break; 3448 case PQI_RESPONSE_IU_TASK_MANAGEMENT: 3449 io_request->status = pqi_interpret_task_management_response(ctrl_info, 3450 (void *)response); 3451 break; 3452 case PQI_RESPONSE_IU_AIO_PATH_DISABLED: 3453 pqi_aio_path_disabled(io_request); 3454 io_request->status = -EAGAIN; 3455 break; 3456 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 3457 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 3458 io_request->error_info = ctrl_info->error_buffer + 3459 (get_unaligned_le16(&response->error_index) * 3460 PQI_ERROR_BUFFER_ELEMENT_LENGTH); 3461 pqi_process_io_error(response->header.iu_type, io_request); 3462 break; 3463 default: 3464 pqi_invalid_response(ctrl_info, PQI_UNEXPECTED_IU_TYPE); 3465 dev_err(&ctrl_info->pci_dev->dev, 3466 "unexpected IU type: 0x%x: producer index: %u consumer index: %u\n", 3467 response->header.iu_type, oq_pi, oq_ci); 3468 return -1; 3469 } 3470 3471 io_request->io_complete_callback(io_request, io_request->context); 3472 3473 /* 3474 * Note that the I/O request structure CANNOT BE TOUCHED after 3475 * returning from the I/O completion callback! 3476 */ 3477 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq; 3478 } 3479 3480 if (num_responses) { 3481 queue_group->oq_ci_copy = oq_ci; 3482 writel(oq_ci, queue_group->oq_ci); 3483 } 3484 3485 return num_responses; 3486 } 3487 3488 static inline unsigned int pqi_num_elements_free(unsigned int pi, 3489 unsigned int ci, unsigned int elements_in_queue) 3490 { 3491 unsigned int num_elements_used; 3492 3493 if (pi >= ci) 3494 num_elements_used = pi - ci; 3495 else 3496 num_elements_used = elements_in_queue - ci + pi; 3497 3498 return elements_in_queue - num_elements_used - 1; 3499 } 3500 3501 static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info, 3502 struct pqi_event_acknowledge_request *iu, size_t iu_length) 3503 { 3504 pqi_index_t iq_pi; 3505 pqi_index_t iq_ci; 3506 unsigned long flags; 3507 void *next_element; 3508 struct pqi_queue_group *queue_group; 3509 3510 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP]; 3511 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id); 3512 3513 while (1) { 3514 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags); 3515 3516 iq_pi = queue_group->iq_pi_copy[RAID_PATH]; 3517 iq_ci = readl(queue_group->iq_ci[RAID_PATH]); 3518 3519 if (pqi_num_elements_free(iq_pi, iq_ci, 3520 ctrl_info->num_elements_per_iq)) 3521 break; 3522 3523 spin_unlock_irqrestore( 3524 &queue_group->submit_lock[RAID_PATH], flags); 3525 3526 if (pqi_ctrl_offline(ctrl_info)) 3527 return; 3528 } 3529 3530 next_element = queue_group->iq_element_array[RAID_PATH] + 3531 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3532 3533 memcpy(next_element, iu, iu_length); 3534 3535 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq; 3536 queue_group->iq_pi_copy[RAID_PATH] = iq_pi; 3537 3538 /* 3539 * This write notifies the controller that an IU is available to be 3540 * processed. 3541 */ 3542 writel(iq_pi, queue_group->iq_pi[RAID_PATH]); 3543 3544 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags); 3545 } 3546 3547 static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info, 3548 struct pqi_event *event) 3549 { 3550 struct pqi_event_acknowledge_request request; 3551 3552 memset(&request, 0, sizeof(request)); 3553 3554 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT; 3555 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 3556 &request.header.iu_length); 3557 request.event_type = event->event_type; 3558 put_unaligned_le16(event->event_id, &request.event_id); 3559 put_unaligned_le32(event->additional_event_id, &request.additional_event_id); 3560 3561 pqi_send_event_ack(ctrl_info, &request, sizeof(request)); 3562 } 3563 3564 #define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30 3565 #define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1 3566 3567 static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status( 3568 struct pqi_ctrl_info *ctrl_info) 3569 { 3570 u8 status; 3571 unsigned long timeout; 3572 3573 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * HZ) + jiffies; 3574 3575 while (1) { 3576 status = pqi_read_soft_reset_status(ctrl_info); 3577 if (status & PQI_SOFT_RESET_INITIATE) 3578 return RESET_INITIATE_DRIVER; 3579 3580 if (status & PQI_SOFT_RESET_ABORT) 3581 return RESET_ABORT; 3582 3583 if (!sis_is_firmware_running(ctrl_info)) 3584 return RESET_NORESPONSE; 3585 3586 if (time_after(jiffies, timeout)) { 3587 dev_warn(&ctrl_info->pci_dev->dev, 3588 "timed out waiting for soft reset status\n"); 3589 return RESET_TIMEDOUT; 3590 } 3591 3592 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS); 3593 } 3594 } 3595 3596 static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info) 3597 { 3598 int rc; 3599 unsigned int delay_secs; 3600 enum pqi_soft_reset_status reset_status; 3601 3602 if (ctrl_info->soft_reset_handshake_supported) 3603 reset_status = pqi_poll_for_soft_reset_status(ctrl_info); 3604 else 3605 reset_status = RESET_INITIATE_FIRMWARE; 3606 3607 delay_secs = PQI_POST_RESET_DELAY_SECS; 3608 3609 switch (reset_status) { 3610 case RESET_TIMEDOUT: 3611 delay_secs = PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS; 3612 fallthrough; 3613 case RESET_INITIATE_DRIVER: 3614 dev_info(&ctrl_info->pci_dev->dev, 3615 "Online Firmware Activation: resetting controller\n"); 3616 sis_soft_reset(ctrl_info); 3617 fallthrough; 3618 case RESET_INITIATE_FIRMWARE: 3619 ctrl_info->pqi_mode_enabled = false; 3620 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 3621 rc = pqi_ofa_ctrl_restart(ctrl_info, delay_secs); 3622 pqi_ofa_free_host_buffer(ctrl_info); 3623 pqi_ctrl_ofa_done(ctrl_info); 3624 dev_info(&ctrl_info->pci_dev->dev, 3625 "Online Firmware Activation: %s\n", 3626 rc == 0 ? "SUCCESS" : "FAILED"); 3627 break; 3628 case RESET_ABORT: 3629 dev_info(&ctrl_info->pci_dev->dev, 3630 "Online Firmware Activation ABORTED\n"); 3631 if (ctrl_info->soft_reset_handshake_supported) 3632 pqi_clear_soft_reset_status(ctrl_info); 3633 pqi_ofa_free_host_buffer(ctrl_info); 3634 pqi_ctrl_ofa_done(ctrl_info); 3635 pqi_ofa_ctrl_unquiesce(ctrl_info); 3636 break; 3637 case RESET_NORESPONSE: 3638 fallthrough; 3639 default: 3640 dev_err(&ctrl_info->pci_dev->dev, 3641 "unexpected Online Firmware Activation reset status: 0x%x\n", 3642 reset_status); 3643 pqi_ofa_free_host_buffer(ctrl_info); 3644 pqi_ctrl_ofa_done(ctrl_info); 3645 pqi_ofa_ctrl_unquiesce(ctrl_info); 3646 pqi_take_ctrl_offline(ctrl_info, PQI_OFA_RESPONSE_TIMEOUT); 3647 break; 3648 } 3649 } 3650 3651 static void pqi_ofa_memory_alloc_worker(struct work_struct *work) 3652 { 3653 struct pqi_ctrl_info *ctrl_info; 3654 3655 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_memory_alloc_work); 3656 3657 pqi_ctrl_ofa_start(ctrl_info); 3658 pqi_ofa_setup_host_buffer(ctrl_info); 3659 pqi_ofa_host_memory_update(ctrl_info); 3660 } 3661 3662 static void pqi_ofa_quiesce_worker(struct work_struct *work) 3663 { 3664 struct pqi_ctrl_info *ctrl_info; 3665 struct pqi_event *event; 3666 3667 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_quiesce_work); 3668 3669 event = &ctrl_info->events[pqi_event_type_to_event_index(PQI_EVENT_TYPE_OFA)]; 3670 3671 pqi_ofa_ctrl_quiesce(ctrl_info); 3672 pqi_acknowledge_event(ctrl_info, event); 3673 pqi_process_soft_reset(ctrl_info); 3674 } 3675 3676 static bool pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info, 3677 struct pqi_event *event) 3678 { 3679 bool ack_event; 3680 3681 ack_event = true; 3682 3683 switch (event->event_id) { 3684 case PQI_EVENT_OFA_MEMORY_ALLOCATION: 3685 dev_info(&ctrl_info->pci_dev->dev, 3686 "received Online Firmware Activation memory allocation request\n"); 3687 schedule_work(&ctrl_info->ofa_memory_alloc_work); 3688 break; 3689 case PQI_EVENT_OFA_QUIESCE: 3690 dev_info(&ctrl_info->pci_dev->dev, 3691 "received Online Firmware Activation quiesce request\n"); 3692 schedule_work(&ctrl_info->ofa_quiesce_work); 3693 ack_event = false; 3694 break; 3695 case PQI_EVENT_OFA_CANCELED: 3696 dev_info(&ctrl_info->pci_dev->dev, 3697 "received Online Firmware Activation cancel request: reason: %u\n", 3698 ctrl_info->ofa_cancel_reason); 3699 pqi_ofa_free_host_buffer(ctrl_info); 3700 pqi_ctrl_ofa_done(ctrl_info); 3701 break; 3702 default: 3703 dev_err(&ctrl_info->pci_dev->dev, 3704 "received unknown Online Firmware Activation request: event ID: %u\n", 3705 event->event_id); 3706 break; 3707 } 3708 3709 return ack_event; 3710 } 3711 3712 static void pqi_disable_raid_bypass(struct pqi_ctrl_info *ctrl_info) 3713 { 3714 unsigned long flags; 3715 struct pqi_scsi_dev *device; 3716 3717 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 3718 3719 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 3720 if (device->raid_bypass_enabled) 3721 device->raid_bypass_enabled = false; 3722 3723 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 3724 } 3725 3726 static void pqi_event_worker(struct work_struct *work) 3727 { 3728 unsigned int i; 3729 bool rescan_needed; 3730 struct pqi_ctrl_info *ctrl_info; 3731 struct pqi_event *event; 3732 bool ack_event; 3733 3734 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work); 3735 3736 pqi_ctrl_busy(ctrl_info); 3737 pqi_wait_if_ctrl_blocked(ctrl_info); 3738 if (pqi_ctrl_offline(ctrl_info)) 3739 goto out; 3740 3741 rescan_needed = false; 3742 event = ctrl_info->events; 3743 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) { 3744 if (event->pending) { 3745 event->pending = false; 3746 if (event->event_type == PQI_EVENT_TYPE_OFA) { 3747 ack_event = pqi_ofa_process_event(ctrl_info, event); 3748 } else { 3749 ack_event = true; 3750 rescan_needed = true; 3751 if (event->event_type == PQI_EVENT_TYPE_LOGICAL_DEVICE) 3752 ctrl_info->logical_volume_rescan_needed = true; 3753 else if (event->event_type == PQI_EVENT_TYPE_AIO_STATE_CHANGE) 3754 pqi_disable_raid_bypass(ctrl_info); 3755 } 3756 if (ack_event) 3757 pqi_acknowledge_event(ctrl_info, event); 3758 } 3759 event++; 3760 } 3761 3762 #define PQI_RESCAN_WORK_FOR_EVENT_DELAY (5 * HZ) 3763 3764 if (rescan_needed) 3765 pqi_schedule_rescan_worker_with_delay(ctrl_info, 3766 PQI_RESCAN_WORK_FOR_EVENT_DELAY); 3767 3768 out: 3769 pqi_ctrl_unbusy(ctrl_info); 3770 } 3771 3772 #define PQI_HEARTBEAT_TIMER_INTERVAL (10 * HZ) 3773 3774 static void pqi_heartbeat_timer_handler(struct timer_list *t) 3775 { 3776 int num_interrupts; 3777 u32 heartbeat_count; 3778 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t, heartbeat_timer); 3779 3780 pqi_check_ctrl_health(ctrl_info); 3781 if (pqi_ctrl_offline(ctrl_info)) 3782 return; 3783 3784 num_interrupts = atomic_read(&ctrl_info->num_interrupts); 3785 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info); 3786 3787 if (num_interrupts == ctrl_info->previous_num_interrupts) { 3788 if (heartbeat_count == ctrl_info->previous_heartbeat_count) { 3789 dev_err(&ctrl_info->pci_dev->dev, 3790 "no heartbeat detected - last heartbeat count: %u\n", 3791 heartbeat_count); 3792 pqi_take_ctrl_offline(ctrl_info, PQI_NO_HEARTBEAT); 3793 return; 3794 } 3795 } else { 3796 ctrl_info->previous_num_interrupts = num_interrupts; 3797 } 3798 3799 ctrl_info->previous_heartbeat_count = heartbeat_count; 3800 mod_timer(&ctrl_info->heartbeat_timer, 3801 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL); 3802 } 3803 3804 static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3805 { 3806 if (!ctrl_info->heartbeat_counter) 3807 return; 3808 3809 ctrl_info->previous_num_interrupts = 3810 atomic_read(&ctrl_info->num_interrupts); 3811 ctrl_info->previous_heartbeat_count = 3812 pqi_read_heartbeat_counter(ctrl_info); 3813 3814 ctrl_info->heartbeat_timer.expires = 3815 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL; 3816 add_timer(&ctrl_info->heartbeat_timer); 3817 } 3818 3819 static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3820 { 3821 del_timer_sync(&ctrl_info->heartbeat_timer); 3822 } 3823 3824 static void pqi_ofa_capture_event_payload(struct pqi_ctrl_info *ctrl_info, 3825 struct pqi_event *event, struct pqi_event_response *response) 3826 { 3827 switch (event->event_id) { 3828 case PQI_EVENT_OFA_MEMORY_ALLOCATION: 3829 ctrl_info->ofa_bytes_requested = 3830 get_unaligned_le32(&response->data.ofa_memory_allocation.bytes_requested); 3831 break; 3832 case PQI_EVENT_OFA_CANCELED: 3833 ctrl_info->ofa_cancel_reason = 3834 get_unaligned_le16(&response->data.ofa_cancelled.reason); 3835 break; 3836 } 3837 } 3838 3839 static int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info) 3840 { 3841 int num_events; 3842 pqi_index_t oq_pi; 3843 pqi_index_t oq_ci; 3844 struct pqi_event_queue *event_queue; 3845 struct pqi_event_response *response; 3846 struct pqi_event *event; 3847 int event_index; 3848 3849 event_queue = &ctrl_info->event_queue; 3850 num_events = 0; 3851 oq_ci = event_queue->oq_ci_copy; 3852 3853 while (1) { 3854 oq_pi = readl(event_queue->oq_pi); 3855 if (oq_pi >= PQI_NUM_EVENT_QUEUE_ELEMENTS) { 3856 pqi_invalid_response(ctrl_info, PQI_EVENT_PI_OUT_OF_RANGE); 3857 dev_err(&ctrl_info->pci_dev->dev, 3858 "event interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n", 3859 oq_pi, PQI_NUM_EVENT_QUEUE_ELEMENTS - 1, oq_ci); 3860 return -1; 3861 } 3862 3863 if (oq_pi == oq_ci) 3864 break; 3865 3866 num_events++; 3867 response = event_queue->oq_element_array + (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH); 3868 3869 event_index = pqi_event_type_to_event_index(response->event_type); 3870 3871 if (event_index >= 0 && response->request_acknowledge) { 3872 event = &ctrl_info->events[event_index]; 3873 event->pending = true; 3874 event->event_type = response->event_type; 3875 event->event_id = get_unaligned_le16(&response->event_id); 3876 event->additional_event_id = 3877 get_unaligned_le32(&response->additional_event_id); 3878 if (event->event_type == PQI_EVENT_TYPE_OFA) 3879 pqi_ofa_capture_event_payload(ctrl_info, event, response); 3880 } 3881 3882 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS; 3883 } 3884 3885 if (num_events) { 3886 event_queue->oq_ci_copy = oq_ci; 3887 writel(oq_ci, event_queue->oq_ci); 3888 schedule_work(&ctrl_info->event_work); 3889 } 3890 3891 return num_events; 3892 } 3893 3894 #define PQI_LEGACY_INTX_MASK 0x1 3895 3896 static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info, bool enable_intx) 3897 { 3898 u32 intx_mask; 3899 struct pqi_device_registers __iomem *pqi_registers; 3900 volatile void __iomem *register_addr; 3901 3902 pqi_registers = ctrl_info->pqi_registers; 3903 3904 if (enable_intx) 3905 register_addr = &pqi_registers->legacy_intx_mask_clear; 3906 else 3907 register_addr = &pqi_registers->legacy_intx_mask_set; 3908 3909 intx_mask = readl(register_addr); 3910 intx_mask |= PQI_LEGACY_INTX_MASK; 3911 writel(intx_mask, register_addr); 3912 } 3913 3914 static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info, 3915 enum pqi_irq_mode new_mode) 3916 { 3917 switch (ctrl_info->irq_mode) { 3918 case IRQ_MODE_MSIX: 3919 switch (new_mode) { 3920 case IRQ_MODE_MSIX: 3921 break; 3922 case IRQ_MODE_INTX: 3923 pqi_configure_legacy_intx(ctrl_info, true); 3924 sis_enable_intx(ctrl_info); 3925 break; 3926 case IRQ_MODE_NONE: 3927 break; 3928 } 3929 break; 3930 case IRQ_MODE_INTX: 3931 switch (new_mode) { 3932 case IRQ_MODE_MSIX: 3933 pqi_configure_legacy_intx(ctrl_info, false); 3934 sis_enable_msix(ctrl_info); 3935 break; 3936 case IRQ_MODE_INTX: 3937 break; 3938 case IRQ_MODE_NONE: 3939 pqi_configure_legacy_intx(ctrl_info, false); 3940 break; 3941 } 3942 break; 3943 case IRQ_MODE_NONE: 3944 switch (new_mode) { 3945 case IRQ_MODE_MSIX: 3946 sis_enable_msix(ctrl_info); 3947 break; 3948 case IRQ_MODE_INTX: 3949 pqi_configure_legacy_intx(ctrl_info, true); 3950 sis_enable_intx(ctrl_info); 3951 break; 3952 case IRQ_MODE_NONE: 3953 break; 3954 } 3955 break; 3956 } 3957 3958 ctrl_info->irq_mode = new_mode; 3959 } 3960 3961 #define PQI_LEGACY_INTX_PENDING 0x1 3962 3963 static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info) 3964 { 3965 bool valid_irq; 3966 u32 intx_status; 3967 3968 switch (ctrl_info->irq_mode) { 3969 case IRQ_MODE_MSIX: 3970 valid_irq = true; 3971 break; 3972 case IRQ_MODE_INTX: 3973 intx_status = readl(&ctrl_info->pqi_registers->legacy_intx_status); 3974 if (intx_status & PQI_LEGACY_INTX_PENDING) 3975 valid_irq = true; 3976 else 3977 valid_irq = false; 3978 break; 3979 case IRQ_MODE_NONE: 3980 default: 3981 valid_irq = false; 3982 break; 3983 } 3984 3985 return valid_irq; 3986 } 3987 3988 static irqreturn_t pqi_irq_handler(int irq, void *data) 3989 { 3990 struct pqi_ctrl_info *ctrl_info; 3991 struct pqi_queue_group *queue_group; 3992 int num_io_responses_handled; 3993 int num_events_handled; 3994 3995 queue_group = data; 3996 ctrl_info = queue_group->ctrl_info; 3997 3998 if (!pqi_is_valid_irq(ctrl_info)) 3999 return IRQ_NONE; 4000 4001 num_io_responses_handled = pqi_process_io_intr(ctrl_info, queue_group); 4002 if (num_io_responses_handled < 0) 4003 goto out; 4004 4005 if (irq == ctrl_info->event_irq) { 4006 num_events_handled = pqi_process_event_intr(ctrl_info); 4007 if (num_events_handled < 0) 4008 goto out; 4009 } else { 4010 num_events_handled = 0; 4011 } 4012 4013 if (num_io_responses_handled + num_events_handled > 0) 4014 atomic_inc(&ctrl_info->num_interrupts); 4015 4016 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL); 4017 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL); 4018 4019 out: 4020 return IRQ_HANDLED; 4021 } 4022 4023 static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info) 4024 { 4025 struct pci_dev *pci_dev = ctrl_info->pci_dev; 4026 int i; 4027 int rc; 4028 4029 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0); 4030 4031 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) { 4032 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0, 4033 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]); 4034 if (rc) { 4035 dev_err(&pci_dev->dev, 4036 "irq %u init failed with error %d\n", 4037 pci_irq_vector(pci_dev, i), rc); 4038 return rc; 4039 } 4040 ctrl_info->num_msix_vectors_initialized++; 4041 } 4042 4043 return 0; 4044 } 4045 4046 static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info) 4047 { 4048 int i; 4049 4050 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++) 4051 free_irq(pci_irq_vector(ctrl_info->pci_dev, i), 4052 &ctrl_info->queue_groups[i]); 4053 4054 ctrl_info->num_msix_vectors_initialized = 0; 4055 } 4056 4057 static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 4058 { 4059 int num_vectors_enabled; 4060 unsigned int flags = PCI_IRQ_MSIX; 4061 4062 if (!pqi_disable_managed_interrupts) 4063 flags |= PCI_IRQ_AFFINITY; 4064 4065 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev, 4066 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups, 4067 flags); 4068 if (num_vectors_enabled < 0) { 4069 dev_err(&ctrl_info->pci_dev->dev, 4070 "MSI-X init failed with error %d\n", 4071 num_vectors_enabled); 4072 return num_vectors_enabled; 4073 } 4074 4075 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled; 4076 ctrl_info->irq_mode = IRQ_MODE_MSIX; 4077 return 0; 4078 } 4079 4080 static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 4081 { 4082 if (ctrl_info->num_msix_vectors_enabled) { 4083 pci_free_irq_vectors(ctrl_info->pci_dev); 4084 ctrl_info->num_msix_vectors_enabled = 0; 4085 } 4086 } 4087 4088 static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info) 4089 { 4090 unsigned int i; 4091 size_t alloc_length; 4092 size_t element_array_length_per_iq; 4093 size_t element_array_length_per_oq; 4094 void *element_array; 4095 void __iomem *next_queue_index; 4096 void *aligned_pointer; 4097 unsigned int num_inbound_queues; 4098 unsigned int num_outbound_queues; 4099 unsigned int num_queue_indexes; 4100 struct pqi_queue_group *queue_group; 4101 4102 element_array_length_per_iq = 4103 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH * 4104 ctrl_info->num_elements_per_iq; 4105 element_array_length_per_oq = 4106 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH * 4107 ctrl_info->num_elements_per_oq; 4108 num_inbound_queues = ctrl_info->num_queue_groups * 2; 4109 num_outbound_queues = ctrl_info->num_queue_groups; 4110 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1; 4111 4112 aligned_pointer = NULL; 4113 4114 for (i = 0; i < num_inbound_queues; i++) { 4115 aligned_pointer = PTR_ALIGN(aligned_pointer, 4116 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4117 aligned_pointer += element_array_length_per_iq; 4118 } 4119 4120 for (i = 0; i < num_outbound_queues; i++) { 4121 aligned_pointer = PTR_ALIGN(aligned_pointer, 4122 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4123 aligned_pointer += element_array_length_per_oq; 4124 } 4125 4126 aligned_pointer = PTR_ALIGN(aligned_pointer, 4127 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4128 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS * 4129 PQI_EVENT_OQ_ELEMENT_LENGTH; 4130 4131 for (i = 0; i < num_queue_indexes; i++) { 4132 aligned_pointer = PTR_ALIGN(aligned_pointer, 4133 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4134 aligned_pointer += sizeof(pqi_index_t); 4135 } 4136 4137 alloc_length = (size_t)aligned_pointer + 4138 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 4139 4140 alloc_length += PQI_EXTRA_SGL_MEMORY; 4141 4142 ctrl_info->queue_memory_base = 4143 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 4144 &ctrl_info->queue_memory_base_dma_handle, 4145 GFP_KERNEL); 4146 4147 if (!ctrl_info->queue_memory_base) 4148 return -ENOMEM; 4149 4150 ctrl_info->queue_memory_length = alloc_length; 4151 4152 element_array = PTR_ALIGN(ctrl_info->queue_memory_base, 4153 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4154 4155 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4156 queue_group = &ctrl_info->queue_groups[i]; 4157 queue_group->iq_element_array[RAID_PATH] = element_array; 4158 queue_group->iq_element_array_bus_addr[RAID_PATH] = 4159 ctrl_info->queue_memory_base_dma_handle + 4160 (element_array - ctrl_info->queue_memory_base); 4161 element_array += element_array_length_per_iq; 4162 element_array = PTR_ALIGN(element_array, 4163 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4164 queue_group->iq_element_array[AIO_PATH] = element_array; 4165 queue_group->iq_element_array_bus_addr[AIO_PATH] = 4166 ctrl_info->queue_memory_base_dma_handle + 4167 (element_array - ctrl_info->queue_memory_base); 4168 element_array += element_array_length_per_iq; 4169 element_array = PTR_ALIGN(element_array, 4170 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4171 } 4172 4173 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4174 queue_group = &ctrl_info->queue_groups[i]; 4175 queue_group->oq_element_array = element_array; 4176 queue_group->oq_element_array_bus_addr = 4177 ctrl_info->queue_memory_base_dma_handle + 4178 (element_array - ctrl_info->queue_memory_base); 4179 element_array += element_array_length_per_oq; 4180 element_array = PTR_ALIGN(element_array, 4181 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4182 } 4183 4184 ctrl_info->event_queue.oq_element_array = element_array; 4185 ctrl_info->event_queue.oq_element_array_bus_addr = 4186 ctrl_info->queue_memory_base_dma_handle + 4187 (element_array - ctrl_info->queue_memory_base); 4188 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS * 4189 PQI_EVENT_OQ_ELEMENT_LENGTH; 4190 4191 next_queue_index = (void __iomem *)PTR_ALIGN(element_array, 4192 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4193 4194 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4195 queue_group = &ctrl_info->queue_groups[i]; 4196 queue_group->iq_ci[RAID_PATH] = next_queue_index; 4197 queue_group->iq_ci_bus_addr[RAID_PATH] = 4198 ctrl_info->queue_memory_base_dma_handle + 4199 (next_queue_index - 4200 (void __iomem *)ctrl_info->queue_memory_base); 4201 next_queue_index += sizeof(pqi_index_t); 4202 next_queue_index = PTR_ALIGN(next_queue_index, 4203 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4204 queue_group->iq_ci[AIO_PATH] = next_queue_index; 4205 queue_group->iq_ci_bus_addr[AIO_PATH] = 4206 ctrl_info->queue_memory_base_dma_handle + 4207 (next_queue_index - 4208 (void __iomem *)ctrl_info->queue_memory_base); 4209 next_queue_index += sizeof(pqi_index_t); 4210 next_queue_index = PTR_ALIGN(next_queue_index, 4211 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4212 queue_group->oq_pi = next_queue_index; 4213 queue_group->oq_pi_bus_addr = 4214 ctrl_info->queue_memory_base_dma_handle + 4215 (next_queue_index - 4216 (void __iomem *)ctrl_info->queue_memory_base); 4217 next_queue_index += sizeof(pqi_index_t); 4218 next_queue_index = PTR_ALIGN(next_queue_index, 4219 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4220 } 4221 4222 ctrl_info->event_queue.oq_pi = next_queue_index; 4223 ctrl_info->event_queue.oq_pi_bus_addr = 4224 ctrl_info->queue_memory_base_dma_handle + 4225 (next_queue_index - 4226 (void __iomem *)ctrl_info->queue_memory_base); 4227 4228 return 0; 4229 } 4230 4231 static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info) 4232 { 4233 unsigned int i; 4234 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 4235 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 4236 4237 /* 4238 * Initialize the backpointers to the controller structure in 4239 * each operational queue group structure. 4240 */ 4241 for (i = 0; i < ctrl_info->num_queue_groups; i++) 4242 ctrl_info->queue_groups[i].ctrl_info = ctrl_info; 4243 4244 /* 4245 * Assign IDs to all operational queues. Note that the IDs 4246 * assigned to operational IQs are independent of the IDs 4247 * assigned to operational OQs. 4248 */ 4249 ctrl_info->event_queue.oq_id = next_oq_id++; 4250 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4251 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++; 4252 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++; 4253 ctrl_info->queue_groups[i].oq_id = next_oq_id++; 4254 } 4255 4256 /* 4257 * Assign MSI-X table entry indexes to all queues. Note that the 4258 * interrupt for the event queue is shared with the first queue group. 4259 */ 4260 ctrl_info->event_queue.int_msg_num = 0; 4261 for (i = 0; i < ctrl_info->num_queue_groups; i++) 4262 ctrl_info->queue_groups[i].int_msg_num = i; 4263 4264 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4265 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]); 4266 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]); 4267 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]); 4268 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]); 4269 } 4270 } 4271 4272 static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info) 4273 { 4274 size_t alloc_length; 4275 struct pqi_admin_queues_aligned *admin_queues_aligned; 4276 struct pqi_admin_queues *admin_queues; 4277 4278 alloc_length = sizeof(struct pqi_admin_queues_aligned) + 4279 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 4280 4281 ctrl_info->admin_queue_memory_base = 4282 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 4283 &ctrl_info->admin_queue_memory_base_dma_handle, 4284 GFP_KERNEL); 4285 4286 if (!ctrl_info->admin_queue_memory_base) 4287 return -ENOMEM; 4288 4289 ctrl_info->admin_queue_memory_length = alloc_length; 4290 4291 admin_queues = &ctrl_info->admin_queues; 4292 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base, 4293 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4294 admin_queues->iq_element_array = 4295 &admin_queues_aligned->iq_element_array; 4296 admin_queues->oq_element_array = 4297 &admin_queues_aligned->oq_element_array; 4298 admin_queues->iq_ci = 4299 (pqi_index_t __iomem *)&admin_queues_aligned->iq_ci; 4300 admin_queues->oq_pi = 4301 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi; 4302 4303 admin_queues->iq_element_array_bus_addr = 4304 ctrl_info->admin_queue_memory_base_dma_handle + 4305 (admin_queues->iq_element_array - 4306 ctrl_info->admin_queue_memory_base); 4307 admin_queues->oq_element_array_bus_addr = 4308 ctrl_info->admin_queue_memory_base_dma_handle + 4309 (admin_queues->oq_element_array - 4310 ctrl_info->admin_queue_memory_base); 4311 admin_queues->iq_ci_bus_addr = 4312 ctrl_info->admin_queue_memory_base_dma_handle + 4313 ((void __iomem *)admin_queues->iq_ci - 4314 (void __iomem *)ctrl_info->admin_queue_memory_base); 4315 admin_queues->oq_pi_bus_addr = 4316 ctrl_info->admin_queue_memory_base_dma_handle + 4317 ((void __iomem *)admin_queues->oq_pi - 4318 (void __iomem *)ctrl_info->admin_queue_memory_base); 4319 4320 return 0; 4321 } 4322 4323 #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES HZ 4324 #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1 4325 4326 static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info) 4327 { 4328 struct pqi_device_registers __iomem *pqi_registers; 4329 struct pqi_admin_queues *admin_queues; 4330 unsigned long timeout; 4331 u8 status; 4332 u32 reg; 4333 4334 pqi_registers = ctrl_info->pqi_registers; 4335 admin_queues = &ctrl_info->admin_queues; 4336 4337 writeq((u64)admin_queues->iq_element_array_bus_addr, 4338 &pqi_registers->admin_iq_element_array_addr); 4339 writeq((u64)admin_queues->oq_element_array_bus_addr, 4340 &pqi_registers->admin_oq_element_array_addr); 4341 writeq((u64)admin_queues->iq_ci_bus_addr, 4342 &pqi_registers->admin_iq_ci_addr); 4343 writeq((u64)admin_queues->oq_pi_bus_addr, 4344 &pqi_registers->admin_oq_pi_addr); 4345 4346 reg = PQI_ADMIN_IQ_NUM_ELEMENTS | 4347 (PQI_ADMIN_OQ_NUM_ELEMENTS << 8) | 4348 (admin_queues->int_msg_num << 16); 4349 writel(reg, &pqi_registers->admin_iq_num_elements); 4350 4351 writel(PQI_CREATE_ADMIN_QUEUE_PAIR, 4352 &pqi_registers->function_and_status_code); 4353 4354 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies; 4355 while (1) { 4356 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS); 4357 status = readb(&pqi_registers->function_and_status_code); 4358 if (status == PQI_STATUS_IDLE) 4359 break; 4360 if (time_after(jiffies, timeout)) 4361 return -ETIMEDOUT; 4362 } 4363 4364 /* 4365 * The offset registers are not initialized to the correct 4366 * offsets until *after* the create admin queue pair command 4367 * completes successfully. 4368 */ 4369 admin_queues->iq_pi = ctrl_info->iomem_base + 4370 PQI_DEVICE_REGISTERS_OFFSET + 4371 readq(&pqi_registers->admin_iq_pi_offset); 4372 admin_queues->oq_ci = ctrl_info->iomem_base + 4373 PQI_DEVICE_REGISTERS_OFFSET + 4374 readq(&pqi_registers->admin_oq_ci_offset); 4375 4376 return 0; 4377 } 4378 4379 static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info, 4380 struct pqi_general_admin_request *request) 4381 { 4382 struct pqi_admin_queues *admin_queues; 4383 void *next_element; 4384 pqi_index_t iq_pi; 4385 4386 admin_queues = &ctrl_info->admin_queues; 4387 iq_pi = admin_queues->iq_pi_copy; 4388 4389 next_element = admin_queues->iq_element_array + 4390 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH); 4391 4392 memcpy(next_element, request, sizeof(*request)); 4393 4394 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS; 4395 admin_queues->iq_pi_copy = iq_pi; 4396 4397 /* 4398 * This write notifies the controller that an IU is available to be 4399 * processed. 4400 */ 4401 writel(iq_pi, admin_queues->iq_pi); 4402 } 4403 4404 #define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60 4405 4406 static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info, 4407 struct pqi_general_admin_response *response) 4408 { 4409 struct pqi_admin_queues *admin_queues; 4410 pqi_index_t oq_pi; 4411 pqi_index_t oq_ci; 4412 unsigned long timeout; 4413 4414 admin_queues = &ctrl_info->admin_queues; 4415 oq_ci = admin_queues->oq_ci_copy; 4416 4417 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * HZ) + jiffies; 4418 4419 while (1) { 4420 oq_pi = readl(admin_queues->oq_pi); 4421 if (oq_pi != oq_ci) 4422 break; 4423 if (time_after(jiffies, timeout)) { 4424 dev_err(&ctrl_info->pci_dev->dev, 4425 "timed out waiting for admin response\n"); 4426 return -ETIMEDOUT; 4427 } 4428 if (!sis_is_firmware_running(ctrl_info)) 4429 return -ENXIO; 4430 usleep_range(1000, 2000); 4431 } 4432 4433 memcpy(response, admin_queues->oq_element_array + 4434 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response)); 4435 4436 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS; 4437 admin_queues->oq_ci_copy = oq_ci; 4438 writel(oq_ci, admin_queues->oq_ci); 4439 4440 return 0; 4441 } 4442 4443 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 4444 struct pqi_queue_group *queue_group, enum pqi_io_path path, 4445 struct pqi_io_request *io_request) 4446 { 4447 struct pqi_io_request *next; 4448 void *next_element; 4449 pqi_index_t iq_pi; 4450 pqi_index_t iq_ci; 4451 size_t iu_length; 4452 unsigned long flags; 4453 unsigned int num_elements_needed; 4454 unsigned int num_elements_to_end_of_queue; 4455 size_t copy_count; 4456 struct pqi_iu_header *request; 4457 4458 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 4459 4460 if (io_request) { 4461 io_request->queue_group = queue_group; 4462 list_add_tail(&io_request->request_list_entry, 4463 &queue_group->request_list[path]); 4464 } 4465 4466 iq_pi = queue_group->iq_pi_copy[path]; 4467 4468 list_for_each_entry_safe(io_request, next, 4469 &queue_group->request_list[path], request_list_entry) { 4470 4471 request = io_request->iu; 4472 4473 iu_length = get_unaligned_le16(&request->iu_length) + 4474 PQI_REQUEST_HEADER_LENGTH; 4475 num_elements_needed = 4476 DIV_ROUND_UP(iu_length, 4477 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4478 4479 iq_ci = readl(queue_group->iq_ci[path]); 4480 4481 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci, 4482 ctrl_info->num_elements_per_iq)) 4483 break; 4484 4485 put_unaligned_le16(queue_group->oq_id, 4486 &request->response_queue_id); 4487 4488 next_element = queue_group->iq_element_array[path] + 4489 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4490 4491 num_elements_to_end_of_queue = 4492 ctrl_info->num_elements_per_iq - iq_pi; 4493 4494 if (num_elements_needed <= num_elements_to_end_of_queue) { 4495 memcpy(next_element, request, iu_length); 4496 } else { 4497 copy_count = num_elements_to_end_of_queue * 4498 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 4499 memcpy(next_element, request, copy_count); 4500 memcpy(queue_group->iq_element_array[path], 4501 (u8 *)request + copy_count, 4502 iu_length - copy_count); 4503 } 4504 4505 iq_pi = (iq_pi + num_elements_needed) % 4506 ctrl_info->num_elements_per_iq; 4507 4508 list_del(&io_request->request_list_entry); 4509 } 4510 4511 if (iq_pi != queue_group->iq_pi_copy[path]) { 4512 queue_group->iq_pi_copy[path] = iq_pi; 4513 /* 4514 * This write notifies the controller that one or more IUs are 4515 * available to be processed. 4516 */ 4517 writel(iq_pi, queue_group->iq_pi[path]); 4518 } 4519 4520 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 4521 } 4522 4523 #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10 4524 4525 static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info, 4526 struct completion *wait) 4527 { 4528 int rc; 4529 4530 while (1) { 4531 if (wait_for_completion_io_timeout(wait, 4532 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * HZ)) { 4533 rc = 0; 4534 break; 4535 } 4536 4537 pqi_check_ctrl_health(ctrl_info); 4538 if (pqi_ctrl_offline(ctrl_info)) { 4539 rc = -ENXIO; 4540 break; 4541 } 4542 } 4543 4544 return rc; 4545 } 4546 4547 static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request, 4548 void *context) 4549 { 4550 struct completion *waiting = context; 4551 4552 complete(waiting); 4553 } 4554 4555 static int pqi_process_raid_io_error_synchronous( 4556 struct pqi_raid_error_info *error_info) 4557 { 4558 int rc = -EIO; 4559 4560 switch (error_info->data_out_result) { 4561 case PQI_DATA_IN_OUT_GOOD: 4562 if (error_info->status == SAM_STAT_GOOD) 4563 rc = 0; 4564 break; 4565 case PQI_DATA_IN_OUT_UNDERFLOW: 4566 if (error_info->status == SAM_STAT_GOOD || 4567 error_info->status == SAM_STAT_CHECK_CONDITION) 4568 rc = 0; 4569 break; 4570 case PQI_DATA_IN_OUT_ABORTED: 4571 rc = PQI_CMD_STATUS_ABORTED; 4572 break; 4573 } 4574 4575 return rc; 4576 } 4577 4578 static inline bool pqi_is_blockable_request(struct pqi_iu_header *request) 4579 { 4580 return (request->driver_flags & PQI_DRIVER_NONBLOCKABLE_REQUEST) == 0; 4581 } 4582 4583 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 4584 struct pqi_iu_header *request, unsigned int flags, 4585 struct pqi_raid_error_info *error_info) 4586 { 4587 int rc = 0; 4588 struct pqi_io_request *io_request; 4589 size_t iu_length; 4590 DECLARE_COMPLETION_ONSTACK(wait); 4591 4592 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) { 4593 if (down_interruptible(&ctrl_info->sync_request_sem)) 4594 return -ERESTARTSYS; 4595 } else { 4596 down(&ctrl_info->sync_request_sem); 4597 } 4598 4599 pqi_ctrl_busy(ctrl_info); 4600 /* 4601 * Wait for other admin queue updates such as; 4602 * config table changes, OFA memory updates, ... 4603 */ 4604 if (pqi_is_blockable_request(request)) 4605 pqi_wait_if_ctrl_blocked(ctrl_info); 4606 4607 if (pqi_ctrl_offline(ctrl_info)) { 4608 rc = -ENXIO; 4609 goto out; 4610 } 4611 4612 io_request = pqi_alloc_io_request(ctrl_info, NULL); 4613 4614 put_unaligned_le16(io_request->index, 4615 &(((struct pqi_raid_path_request *)request)->request_id)); 4616 4617 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO) 4618 ((struct pqi_raid_path_request *)request)->error_index = 4619 ((struct pqi_raid_path_request *)request)->request_id; 4620 4621 iu_length = get_unaligned_le16(&request->iu_length) + 4622 PQI_REQUEST_HEADER_LENGTH; 4623 memcpy(io_request->iu, request, iu_length); 4624 4625 io_request->io_complete_callback = pqi_raid_synchronous_complete; 4626 io_request->context = &wait; 4627 4628 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 4629 io_request); 4630 4631 pqi_wait_for_completion_io(ctrl_info, &wait); 4632 4633 if (error_info) { 4634 if (io_request->error_info) 4635 memcpy(error_info, io_request->error_info, sizeof(*error_info)); 4636 else 4637 memset(error_info, 0, sizeof(*error_info)); 4638 } else if (rc == 0 && io_request->error_info) { 4639 rc = pqi_process_raid_io_error_synchronous(io_request->error_info); 4640 } 4641 4642 pqi_free_io_request(io_request); 4643 4644 out: 4645 pqi_ctrl_unbusy(ctrl_info); 4646 up(&ctrl_info->sync_request_sem); 4647 4648 return rc; 4649 } 4650 4651 static int pqi_validate_admin_response( 4652 struct pqi_general_admin_response *response, u8 expected_function_code) 4653 { 4654 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN) 4655 return -EINVAL; 4656 4657 if (get_unaligned_le16(&response->header.iu_length) != 4658 PQI_GENERAL_ADMIN_IU_LENGTH) 4659 return -EINVAL; 4660 4661 if (response->function_code != expected_function_code) 4662 return -EINVAL; 4663 4664 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) 4665 return -EINVAL; 4666 4667 return 0; 4668 } 4669 4670 static int pqi_submit_admin_request_synchronous( 4671 struct pqi_ctrl_info *ctrl_info, 4672 struct pqi_general_admin_request *request, 4673 struct pqi_general_admin_response *response) 4674 { 4675 int rc; 4676 4677 pqi_submit_admin_request(ctrl_info, request); 4678 4679 rc = pqi_poll_for_admin_response(ctrl_info, response); 4680 4681 if (rc == 0) 4682 rc = pqi_validate_admin_response(response, request->function_code); 4683 4684 return rc; 4685 } 4686 4687 static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info) 4688 { 4689 int rc; 4690 struct pqi_general_admin_request request; 4691 struct pqi_general_admin_response response; 4692 struct pqi_device_capability *capability; 4693 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor; 4694 4695 capability = kmalloc(sizeof(*capability), GFP_KERNEL); 4696 if (!capability) 4697 return -ENOMEM; 4698 4699 memset(&request, 0, sizeof(request)); 4700 4701 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4702 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4703 &request.header.iu_length); 4704 request.function_code = 4705 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY; 4706 put_unaligned_le32(sizeof(*capability), 4707 &request.data.report_device_capability.buffer_length); 4708 4709 rc = pqi_map_single(ctrl_info->pci_dev, 4710 &request.data.report_device_capability.sg_descriptor, 4711 capability, sizeof(*capability), 4712 DMA_FROM_DEVICE); 4713 if (rc) 4714 goto out; 4715 4716 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, &response); 4717 4718 pqi_pci_unmap(ctrl_info->pci_dev, 4719 &request.data.report_device_capability.sg_descriptor, 1, 4720 DMA_FROM_DEVICE); 4721 4722 if (rc) 4723 goto out; 4724 4725 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) { 4726 rc = -EIO; 4727 goto out; 4728 } 4729 4730 ctrl_info->max_inbound_queues = 4731 get_unaligned_le16(&capability->max_inbound_queues); 4732 ctrl_info->max_elements_per_iq = 4733 get_unaligned_le16(&capability->max_elements_per_iq); 4734 ctrl_info->max_iq_element_length = 4735 get_unaligned_le16(&capability->max_iq_element_length) 4736 * 16; 4737 ctrl_info->max_outbound_queues = 4738 get_unaligned_le16(&capability->max_outbound_queues); 4739 ctrl_info->max_elements_per_oq = 4740 get_unaligned_le16(&capability->max_elements_per_oq); 4741 ctrl_info->max_oq_element_length = 4742 get_unaligned_le16(&capability->max_oq_element_length) 4743 * 16; 4744 4745 sop_iu_layer_descriptor = 4746 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP]; 4747 4748 ctrl_info->max_inbound_iu_length_per_firmware = 4749 get_unaligned_le16( 4750 &sop_iu_layer_descriptor->max_inbound_iu_length); 4751 ctrl_info->inbound_spanning_supported = 4752 sop_iu_layer_descriptor->inbound_spanning_supported; 4753 ctrl_info->outbound_spanning_supported = 4754 sop_iu_layer_descriptor->outbound_spanning_supported; 4755 4756 out: 4757 kfree(capability); 4758 4759 return rc; 4760 } 4761 4762 static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info) 4763 { 4764 if (ctrl_info->max_iq_element_length < 4765 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4766 dev_err(&ctrl_info->pci_dev->dev, 4767 "max. inbound queue element length of %d is less than the required length of %d\n", 4768 ctrl_info->max_iq_element_length, 4769 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4770 return -EINVAL; 4771 } 4772 4773 if (ctrl_info->max_oq_element_length < 4774 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) { 4775 dev_err(&ctrl_info->pci_dev->dev, 4776 "max. outbound queue element length of %d is less than the required length of %d\n", 4777 ctrl_info->max_oq_element_length, 4778 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 4779 return -EINVAL; 4780 } 4781 4782 if (ctrl_info->max_inbound_iu_length_per_firmware < 4783 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4784 dev_err(&ctrl_info->pci_dev->dev, 4785 "max. inbound IU length of %u is less than the min. required length of %d\n", 4786 ctrl_info->max_inbound_iu_length_per_firmware, 4787 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4788 return -EINVAL; 4789 } 4790 4791 if (!ctrl_info->inbound_spanning_supported) { 4792 dev_err(&ctrl_info->pci_dev->dev, 4793 "the controller does not support inbound spanning\n"); 4794 return -EINVAL; 4795 } 4796 4797 if (ctrl_info->outbound_spanning_supported) { 4798 dev_err(&ctrl_info->pci_dev->dev, 4799 "the controller supports outbound spanning but this driver does not\n"); 4800 return -EINVAL; 4801 } 4802 4803 return 0; 4804 } 4805 4806 static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info) 4807 { 4808 int rc; 4809 struct pqi_event_queue *event_queue; 4810 struct pqi_general_admin_request request; 4811 struct pqi_general_admin_response response; 4812 4813 event_queue = &ctrl_info->event_queue; 4814 4815 /* 4816 * Create OQ (Outbound Queue - device to host queue) to dedicate 4817 * to events. 4818 */ 4819 memset(&request, 0, sizeof(request)); 4820 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4821 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4822 &request.header.iu_length); 4823 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4824 put_unaligned_le16(event_queue->oq_id, 4825 &request.data.create_operational_oq.queue_id); 4826 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr, 4827 &request.data.create_operational_oq.element_array_addr); 4828 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr, 4829 &request.data.create_operational_oq.pi_addr); 4830 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS, 4831 &request.data.create_operational_oq.num_elements); 4832 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16, 4833 &request.data.create_operational_oq.element_length); 4834 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4835 put_unaligned_le16(event_queue->int_msg_num, 4836 &request.data.create_operational_oq.int_msg_num); 4837 4838 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4839 &response); 4840 if (rc) 4841 return rc; 4842 4843 event_queue->oq_ci = ctrl_info->iomem_base + 4844 PQI_DEVICE_REGISTERS_OFFSET + 4845 get_unaligned_le64( 4846 &response.data.create_operational_oq.oq_ci_offset); 4847 4848 return 0; 4849 } 4850 4851 static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info, 4852 unsigned int group_number) 4853 { 4854 int rc; 4855 struct pqi_queue_group *queue_group; 4856 struct pqi_general_admin_request request; 4857 struct pqi_general_admin_response response; 4858 4859 queue_group = &ctrl_info->queue_groups[group_number]; 4860 4861 /* 4862 * Create IQ (Inbound Queue - host to device queue) for 4863 * RAID path. 4864 */ 4865 memset(&request, 0, sizeof(request)); 4866 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4867 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4868 &request.header.iu_length); 4869 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4870 put_unaligned_le16(queue_group->iq_id[RAID_PATH], 4871 &request.data.create_operational_iq.queue_id); 4872 put_unaligned_le64( 4873 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH], 4874 &request.data.create_operational_iq.element_array_addr); 4875 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH], 4876 &request.data.create_operational_iq.ci_addr); 4877 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4878 &request.data.create_operational_iq.num_elements); 4879 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4880 &request.data.create_operational_iq.element_length); 4881 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4882 4883 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4884 &response); 4885 if (rc) { 4886 dev_err(&ctrl_info->pci_dev->dev, 4887 "error creating inbound RAID queue\n"); 4888 return rc; 4889 } 4890 4891 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base + 4892 PQI_DEVICE_REGISTERS_OFFSET + 4893 get_unaligned_le64( 4894 &response.data.create_operational_iq.iq_pi_offset); 4895 4896 /* 4897 * Create IQ (Inbound Queue - host to device queue) for 4898 * Advanced I/O (AIO) path. 4899 */ 4900 memset(&request, 0, sizeof(request)); 4901 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4902 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4903 &request.header.iu_length); 4904 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4905 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4906 &request.data.create_operational_iq.queue_id); 4907 put_unaligned_le64((u64)queue_group-> 4908 iq_element_array_bus_addr[AIO_PATH], 4909 &request.data.create_operational_iq.element_array_addr); 4910 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH], 4911 &request.data.create_operational_iq.ci_addr); 4912 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4913 &request.data.create_operational_iq.num_elements); 4914 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4915 &request.data.create_operational_iq.element_length); 4916 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4917 4918 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4919 &response); 4920 if (rc) { 4921 dev_err(&ctrl_info->pci_dev->dev, 4922 "error creating inbound AIO queue\n"); 4923 return rc; 4924 } 4925 4926 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base + 4927 PQI_DEVICE_REGISTERS_OFFSET + 4928 get_unaligned_le64( 4929 &response.data.create_operational_iq.iq_pi_offset); 4930 4931 /* 4932 * Designate the 2nd IQ as the AIO path. By default, all IQs are 4933 * assumed to be for RAID path I/O unless we change the queue's 4934 * property. 4935 */ 4936 memset(&request, 0, sizeof(request)); 4937 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4938 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4939 &request.header.iu_length); 4940 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY; 4941 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4942 &request.data.change_operational_iq_properties.queue_id); 4943 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE, 4944 &request.data.change_operational_iq_properties.vendor_specific); 4945 4946 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4947 &response); 4948 if (rc) { 4949 dev_err(&ctrl_info->pci_dev->dev, 4950 "error changing queue property\n"); 4951 return rc; 4952 } 4953 4954 /* 4955 * Create OQ (Outbound Queue - device to host queue). 4956 */ 4957 memset(&request, 0, sizeof(request)); 4958 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4959 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4960 &request.header.iu_length); 4961 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4962 put_unaligned_le16(queue_group->oq_id, 4963 &request.data.create_operational_oq.queue_id); 4964 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr, 4965 &request.data.create_operational_oq.element_array_addr); 4966 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr, 4967 &request.data.create_operational_oq.pi_addr); 4968 put_unaligned_le16(ctrl_info->num_elements_per_oq, 4969 &request.data.create_operational_oq.num_elements); 4970 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16, 4971 &request.data.create_operational_oq.element_length); 4972 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4973 put_unaligned_le16(queue_group->int_msg_num, 4974 &request.data.create_operational_oq.int_msg_num); 4975 4976 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4977 &response); 4978 if (rc) { 4979 dev_err(&ctrl_info->pci_dev->dev, 4980 "error creating outbound queue\n"); 4981 return rc; 4982 } 4983 4984 queue_group->oq_ci = ctrl_info->iomem_base + 4985 PQI_DEVICE_REGISTERS_OFFSET + 4986 get_unaligned_le64( 4987 &response.data.create_operational_oq.oq_ci_offset); 4988 4989 return 0; 4990 } 4991 4992 static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info) 4993 { 4994 int rc; 4995 unsigned int i; 4996 4997 rc = pqi_create_event_queue(ctrl_info); 4998 if (rc) { 4999 dev_err(&ctrl_info->pci_dev->dev, 5000 "error creating event queue\n"); 5001 return rc; 5002 } 5003 5004 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5005 rc = pqi_create_queue_group(ctrl_info, i); 5006 if (rc) { 5007 dev_err(&ctrl_info->pci_dev->dev, 5008 "error creating queue group number %u/%u\n", 5009 i, ctrl_info->num_queue_groups); 5010 return rc; 5011 } 5012 } 5013 5014 return 0; 5015 } 5016 5017 #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \ 5018 struct_size((struct pqi_event_config *)0, descriptors, PQI_MAX_EVENT_DESCRIPTORS) 5019 5020 static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info, 5021 bool enable_events) 5022 { 5023 int rc; 5024 unsigned int i; 5025 struct pqi_event_config *event_config; 5026 struct pqi_event_descriptor *event_descriptor; 5027 struct pqi_general_management_request request; 5028 5029 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5030 GFP_KERNEL); 5031 if (!event_config) 5032 return -ENOMEM; 5033 5034 memset(&request, 0, sizeof(request)); 5035 5036 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG; 5037 put_unaligned_le16(offsetof(struct pqi_general_management_request, 5038 data.report_event_configuration.sg_descriptors[1]) - 5039 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 5040 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5041 &request.data.report_event_configuration.buffer_length); 5042 5043 rc = pqi_map_single(ctrl_info->pci_dev, 5044 request.data.report_event_configuration.sg_descriptors, 5045 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5046 DMA_FROM_DEVICE); 5047 if (rc) 5048 goto out; 5049 5050 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 5051 5052 pqi_pci_unmap(ctrl_info->pci_dev, 5053 request.data.report_event_configuration.sg_descriptors, 1, 5054 DMA_FROM_DEVICE); 5055 5056 if (rc) 5057 goto out; 5058 5059 for (i = 0; i < event_config->num_event_descriptors; i++) { 5060 event_descriptor = &event_config->descriptors[i]; 5061 if (enable_events && 5062 pqi_is_supported_event(event_descriptor->event_type)) 5063 put_unaligned_le16(ctrl_info->event_queue.oq_id, 5064 &event_descriptor->oq_id); 5065 else 5066 put_unaligned_le16(0, &event_descriptor->oq_id); 5067 } 5068 5069 memset(&request, 0, sizeof(request)); 5070 5071 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG; 5072 put_unaligned_le16(offsetof(struct pqi_general_management_request, 5073 data.report_event_configuration.sg_descriptors[1]) - 5074 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 5075 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5076 &request.data.report_event_configuration.buffer_length); 5077 5078 rc = pqi_map_single(ctrl_info->pci_dev, 5079 request.data.report_event_configuration.sg_descriptors, 5080 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5081 DMA_TO_DEVICE); 5082 if (rc) 5083 goto out; 5084 5085 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 5086 5087 pqi_pci_unmap(ctrl_info->pci_dev, 5088 request.data.report_event_configuration.sg_descriptors, 1, 5089 DMA_TO_DEVICE); 5090 5091 out: 5092 kfree(event_config); 5093 5094 return rc; 5095 } 5096 5097 static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info) 5098 { 5099 return pqi_configure_events(ctrl_info, true); 5100 } 5101 5102 static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info) 5103 { 5104 unsigned int i; 5105 struct device *dev; 5106 size_t sg_chain_buffer_length; 5107 struct pqi_io_request *io_request; 5108 5109 if (!ctrl_info->io_request_pool) 5110 return; 5111 5112 dev = &ctrl_info->pci_dev->dev; 5113 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 5114 io_request = ctrl_info->io_request_pool; 5115 5116 for (i = 0; i < ctrl_info->max_io_slots; i++) { 5117 kfree(io_request->iu); 5118 if (!io_request->sg_chain_buffer) 5119 break; 5120 dma_free_coherent(dev, sg_chain_buffer_length, 5121 io_request->sg_chain_buffer, 5122 io_request->sg_chain_buffer_dma_handle); 5123 io_request++; 5124 } 5125 5126 kfree(ctrl_info->io_request_pool); 5127 ctrl_info->io_request_pool = NULL; 5128 } 5129 5130 static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info) 5131 { 5132 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev, 5133 ctrl_info->error_buffer_length, 5134 &ctrl_info->error_buffer_dma_handle, 5135 GFP_KERNEL); 5136 if (!ctrl_info->error_buffer) 5137 return -ENOMEM; 5138 5139 return 0; 5140 } 5141 5142 static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info) 5143 { 5144 unsigned int i; 5145 void *sg_chain_buffer; 5146 size_t sg_chain_buffer_length; 5147 dma_addr_t sg_chain_buffer_dma_handle; 5148 struct device *dev; 5149 struct pqi_io_request *io_request; 5150 5151 ctrl_info->io_request_pool = kcalloc(ctrl_info->max_io_slots, 5152 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL); 5153 5154 if (!ctrl_info->io_request_pool) { 5155 dev_err(&ctrl_info->pci_dev->dev, 5156 "failed to allocate I/O request pool\n"); 5157 goto error; 5158 } 5159 5160 dev = &ctrl_info->pci_dev->dev; 5161 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 5162 io_request = ctrl_info->io_request_pool; 5163 5164 for (i = 0; i < ctrl_info->max_io_slots; i++) { 5165 io_request->iu = kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL); 5166 5167 if (!io_request->iu) { 5168 dev_err(&ctrl_info->pci_dev->dev, 5169 "failed to allocate IU buffers\n"); 5170 goto error; 5171 } 5172 5173 sg_chain_buffer = dma_alloc_coherent(dev, 5174 sg_chain_buffer_length, &sg_chain_buffer_dma_handle, 5175 GFP_KERNEL); 5176 5177 if (!sg_chain_buffer) { 5178 dev_err(&ctrl_info->pci_dev->dev, 5179 "failed to allocate PQI scatter-gather chain buffers\n"); 5180 goto error; 5181 } 5182 5183 io_request->index = i; 5184 io_request->sg_chain_buffer = sg_chain_buffer; 5185 io_request->sg_chain_buffer_dma_handle = sg_chain_buffer_dma_handle; 5186 io_request++; 5187 } 5188 5189 return 0; 5190 5191 error: 5192 pqi_free_all_io_requests(ctrl_info); 5193 5194 return -ENOMEM; 5195 } 5196 5197 /* 5198 * Calculate required resources that are sized based on max. outstanding 5199 * requests and max. transfer size. 5200 */ 5201 5202 static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info) 5203 { 5204 u32 max_transfer_size; 5205 u32 max_sg_entries; 5206 5207 ctrl_info->scsi_ml_can_queue = 5208 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS; 5209 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests; 5210 5211 ctrl_info->error_buffer_length = 5212 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH; 5213 5214 if (reset_devices) 5215 max_transfer_size = min(ctrl_info->max_transfer_size, 5216 PQI_MAX_TRANSFER_SIZE_KDUMP); 5217 else 5218 max_transfer_size = min(ctrl_info->max_transfer_size, 5219 PQI_MAX_TRANSFER_SIZE); 5220 5221 max_sg_entries = max_transfer_size / PAGE_SIZE; 5222 5223 /* +1 to cover when the buffer is not page-aligned. */ 5224 max_sg_entries++; 5225 5226 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries); 5227 5228 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE; 5229 5230 ctrl_info->sg_chain_buffer_length = 5231 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) + 5232 PQI_EXTRA_SGL_MEMORY; 5233 ctrl_info->sg_tablesize = max_sg_entries; 5234 ctrl_info->max_sectors = max_transfer_size / 512; 5235 } 5236 5237 static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info) 5238 { 5239 int num_queue_groups; 5240 u16 num_elements_per_iq; 5241 u16 num_elements_per_oq; 5242 5243 if (reset_devices) { 5244 num_queue_groups = 1; 5245 } else { 5246 int num_cpus; 5247 int max_queue_groups; 5248 5249 max_queue_groups = min(ctrl_info->max_inbound_queues / 2, 5250 ctrl_info->max_outbound_queues - 1); 5251 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS); 5252 5253 num_cpus = num_online_cpus(); 5254 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors); 5255 num_queue_groups = min(num_queue_groups, max_queue_groups); 5256 } 5257 5258 ctrl_info->num_queue_groups = num_queue_groups; 5259 5260 /* 5261 * Make sure that the max. inbound IU length is an even multiple 5262 * of our inbound element length. 5263 */ 5264 ctrl_info->max_inbound_iu_length = 5265 (ctrl_info->max_inbound_iu_length_per_firmware / 5266 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) * 5267 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 5268 5269 num_elements_per_iq = 5270 (ctrl_info->max_inbound_iu_length / 5271 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 5272 5273 /* Add one because one element in each queue is unusable. */ 5274 num_elements_per_iq++; 5275 5276 num_elements_per_iq = min(num_elements_per_iq, 5277 ctrl_info->max_elements_per_iq); 5278 5279 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1; 5280 num_elements_per_oq = min(num_elements_per_oq, 5281 ctrl_info->max_elements_per_oq); 5282 5283 ctrl_info->num_elements_per_iq = num_elements_per_iq; 5284 ctrl_info->num_elements_per_oq = num_elements_per_oq; 5285 5286 ctrl_info->max_sg_per_iu = 5287 ((ctrl_info->max_inbound_iu_length - 5288 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 5289 sizeof(struct pqi_sg_descriptor)) + 5290 PQI_MAX_EMBEDDED_SG_DESCRIPTORS; 5291 5292 ctrl_info->max_sg_per_r56_iu = 5293 ((ctrl_info->max_inbound_iu_length - 5294 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 5295 sizeof(struct pqi_sg_descriptor)) + 5296 PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS; 5297 } 5298 5299 static inline void pqi_set_sg_descriptor(struct pqi_sg_descriptor *sg_descriptor, 5300 struct scatterlist *sg) 5301 { 5302 u64 address = (u64)sg_dma_address(sg); 5303 unsigned int length = sg_dma_len(sg); 5304 5305 put_unaligned_le64(address, &sg_descriptor->address); 5306 put_unaligned_le32(length, &sg_descriptor->length); 5307 put_unaligned_le32(0, &sg_descriptor->flags); 5308 } 5309 5310 static unsigned int pqi_build_sg_list(struct pqi_sg_descriptor *sg_descriptor, 5311 struct scatterlist *sg, int sg_count, struct pqi_io_request *io_request, 5312 int max_sg_per_iu, bool *chained) 5313 { 5314 int i; 5315 unsigned int num_sg_in_iu; 5316 5317 *chained = false; 5318 i = 0; 5319 num_sg_in_iu = 0; 5320 max_sg_per_iu--; /* Subtract 1 to leave room for chain marker. */ 5321 5322 while (1) { 5323 pqi_set_sg_descriptor(sg_descriptor, sg); 5324 if (!*chained) 5325 num_sg_in_iu++; 5326 i++; 5327 if (i == sg_count) 5328 break; 5329 sg_descriptor++; 5330 if (i == max_sg_per_iu) { 5331 put_unaligned_le64((u64)io_request->sg_chain_buffer_dma_handle, 5332 &sg_descriptor->address); 5333 put_unaligned_le32((sg_count - num_sg_in_iu) * sizeof(*sg_descriptor), 5334 &sg_descriptor->length); 5335 put_unaligned_le32(CISS_SG_CHAIN, &sg_descriptor->flags); 5336 *chained = true; 5337 num_sg_in_iu++; 5338 sg_descriptor = io_request->sg_chain_buffer; 5339 } 5340 sg = sg_next(sg); 5341 } 5342 5343 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 5344 5345 return num_sg_in_iu; 5346 } 5347 5348 static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info, 5349 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd, 5350 struct pqi_io_request *io_request) 5351 { 5352 u16 iu_length; 5353 int sg_count; 5354 bool chained; 5355 unsigned int num_sg_in_iu; 5356 struct scatterlist *sg; 5357 struct pqi_sg_descriptor *sg_descriptor; 5358 5359 sg_count = scsi_dma_map(scmd); 5360 if (sg_count < 0) 5361 return sg_count; 5362 5363 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 5364 PQI_REQUEST_HEADER_LENGTH; 5365 5366 if (sg_count == 0) 5367 goto out; 5368 5369 sg = scsi_sglist(scmd); 5370 sg_descriptor = request->sg_descriptors; 5371 5372 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5373 ctrl_info->max_sg_per_iu, &chained); 5374 5375 request->partial = chained; 5376 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5377 5378 out: 5379 put_unaligned_le16(iu_length, &request->header.iu_length); 5380 5381 return 0; 5382 } 5383 5384 static int pqi_build_aio_r1_sg_list(struct pqi_ctrl_info *ctrl_info, 5385 struct pqi_aio_r1_path_request *request, struct scsi_cmnd *scmd, 5386 struct pqi_io_request *io_request) 5387 { 5388 u16 iu_length; 5389 int sg_count; 5390 bool chained; 5391 unsigned int num_sg_in_iu; 5392 struct scatterlist *sg; 5393 struct pqi_sg_descriptor *sg_descriptor; 5394 5395 sg_count = scsi_dma_map(scmd); 5396 if (sg_count < 0) 5397 return sg_count; 5398 5399 iu_length = offsetof(struct pqi_aio_r1_path_request, sg_descriptors) - 5400 PQI_REQUEST_HEADER_LENGTH; 5401 num_sg_in_iu = 0; 5402 5403 if (sg_count == 0) 5404 goto out; 5405 5406 sg = scsi_sglist(scmd); 5407 sg_descriptor = request->sg_descriptors; 5408 5409 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5410 ctrl_info->max_sg_per_iu, &chained); 5411 5412 request->partial = chained; 5413 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5414 5415 out: 5416 put_unaligned_le16(iu_length, &request->header.iu_length); 5417 request->num_sg_descriptors = num_sg_in_iu; 5418 5419 return 0; 5420 } 5421 5422 static int pqi_build_aio_r56_sg_list(struct pqi_ctrl_info *ctrl_info, 5423 struct pqi_aio_r56_path_request *request, struct scsi_cmnd *scmd, 5424 struct pqi_io_request *io_request) 5425 { 5426 u16 iu_length; 5427 int sg_count; 5428 bool chained; 5429 unsigned int num_sg_in_iu; 5430 struct scatterlist *sg; 5431 struct pqi_sg_descriptor *sg_descriptor; 5432 5433 sg_count = scsi_dma_map(scmd); 5434 if (sg_count < 0) 5435 return sg_count; 5436 5437 iu_length = offsetof(struct pqi_aio_r56_path_request, sg_descriptors) - 5438 PQI_REQUEST_HEADER_LENGTH; 5439 num_sg_in_iu = 0; 5440 5441 if (sg_count != 0) { 5442 sg = scsi_sglist(scmd); 5443 sg_descriptor = request->sg_descriptors; 5444 5445 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5446 ctrl_info->max_sg_per_r56_iu, &chained); 5447 5448 request->partial = chained; 5449 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5450 } 5451 5452 put_unaligned_le16(iu_length, &request->header.iu_length); 5453 request->num_sg_descriptors = num_sg_in_iu; 5454 5455 return 0; 5456 } 5457 5458 static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info, 5459 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd, 5460 struct pqi_io_request *io_request) 5461 { 5462 u16 iu_length; 5463 int sg_count; 5464 bool chained; 5465 unsigned int num_sg_in_iu; 5466 struct scatterlist *sg; 5467 struct pqi_sg_descriptor *sg_descriptor; 5468 5469 sg_count = scsi_dma_map(scmd); 5470 if (sg_count < 0) 5471 return sg_count; 5472 5473 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) - 5474 PQI_REQUEST_HEADER_LENGTH; 5475 num_sg_in_iu = 0; 5476 5477 if (sg_count == 0) 5478 goto out; 5479 5480 sg = scsi_sglist(scmd); 5481 sg_descriptor = request->sg_descriptors; 5482 5483 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5484 ctrl_info->max_sg_per_iu, &chained); 5485 5486 request->partial = chained; 5487 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5488 5489 out: 5490 put_unaligned_le16(iu_length, &request->header.iu_length); 5491 request->num_sg_descriptors = num_sg_in_iu; 5492 5493 return 0; 5494 } 5495 5496 static void pqi_raid_io_complete(struct pqi_io_request *io_request, 5497 void *context) 5498 { 5499 struct scsi_cmnd *scmd; 5500 5501 scmd = io_request->scmd; 5502 pqi_free_io_request(io_request); 5503 scsi_dma_unmap(scmd); 5504 pqi_scsi_done(scmd); 5505 } 5506 5507 static int pqi_raid_submit_scsi_cmd_with_io_request( 5508 struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request, 5509 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5510 struct pqi_queue_group *queue_group) 5511 { 5512 int rc; 5513 size_t cdb_length; 5514 struct pqi_raid_path_request *request; 5515 5516 io_request->io_complete_callback = pqi_raid_io_complete; 5517 io_request->scmd = scmd; 5518 5519 request = io_request->iu; 5520 memset(request, 0, offsetof(struct pqi_raid_path_request, sg_descriptors)); 5521 5522 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 5523 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 5524 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5525 put_unaligned_le16(io_request->index, &request->request_id); 5526 request->error_index = request->request_id; 5527 memcpy(request->lun_number, device->scsi3addr, sizeof(request->lun_number)); 5528 request->ml_device_lun_number = (u8)scmd->device->lun; 5529 5530 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb)); 5531 memcpy(request->cdb, scmd->cmnd, cdb_length); 5532 5533 switch (cdb_length) { 5534 case 6: 5535 case 10: 5536 case 12: 5537 case 16: 5538 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 5539 break; 5540 case 20: 5541 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_4; 5542 break; 5543 case 24: 5544 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_8; 5545 break; 5546 case 28: 5547 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_12; 5548 break; 5549 case 32: 5550 default: 5551 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_16; 5552 break; 5553 } 5554 5555 switch (scmd->sc_data_direction) { 5556 case DMA_FROM_DEVICE: 5557 request->data_direction = SOP_READ_FLAG; 5558 break; 5559 case DMA_TO_DEVICE: 5560 request->data_direction = SOP_WRITE_FLAG; 5561 break; 5562 case DMA_NONE: 5563 request->data_direction = SOP_NO_DIRECTION_FLAG; 5564 break; 5565 case DMA_BIDIRECTIONAL: 5566 request->data_direction = SOP_BIDIRECTIONAL; 5567 break; 5568 default: 5569 dev_err(&ctrl_info->pci_dev->dev, 5570 "unknown data direction: %d\n", 5571 scmd->sc_data_direction); 5572 break; 5573 } 5574 5575 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request); 5576 if (rc) { 5577 pqi_free_io_request(io_request); 5578 return SCSI_MLQUEUE_HOST_BUSY; 5579 } 5580 5581 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request); 5582 5583 return 0; 5584 } 5585 5586 static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5587 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5588 struct pqi_queue_group *queue_group) 5589 { 5590 struct pqi_io_request *io_request; 5591 5592 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5593 if (!io_request) 5594 return SCSI_MLQUEUE_HOST_BUSY; 5595 5596 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request, 5597 device, scmd, queue_group); 5598 } 5599 5600 static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request) 5601 { 5602 struct scsi_cmnd *scmd; 5603 struct pqi_scsi_dev *device; 5604 struct pqi_ctrl_info *ctrl_info; 5605 5606 if (!io_request->raid_bypass) 5607 return false; 5608 5609 scmd = io_request->scmd; 5610 if ((scmd->result & 0xff) == SAM_STAT_GOOD) 5611 return false; 5612 if (host_byte(scmd->result) == DID_NO_CONNECT) 5613 return false; 5614 5615 device = scmd->device->hostdata; 5616 if (pqi_device_offline(device) || pqi_device_in_remove(device)) 5617 return false; 5618 5619 ctrl_info = shost_to_hba(scmd->device->host); 5620 if (pqi_ctrl_offline(ctrl_info)) 5621 return false; 5622 5623 return true; 5624 } 5625 5626 static void pqi_aio_io_complete(struct pqi_io_request *io_request, 5627 void *context) 5628 { 5629 struct scsi_cmnd *scmd; 5630 5631 scmd = io_request->scmd; 5632 scsi_dma_unmap(scmd); 5633 if (io_request->status == -EAGAIN || pqi_raid_bypass_retry_needed(io_request)) { 5634 set_host_byte(scmd, DID_IMM_RETRY); 5635 pqi_cmd_priv(scmd)->this_residual++; 5636 } 5637 5638 pqi_free_io_request(io_request); 5639 pqi_scsi_done(scmd); 5640 } 5641 5642 static inline bool pqi_is_io_high_priority(struct pqi_ctrl_info *ctrl_info, 5643 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd) 5644 { 5645 bool io_high_prio; 5646 int priority_class; 5647 5648 io_high_prio = false; 5649 5650 if (device->ncq_prio_enable) { 5651 priority_class = 5652 IOPRIO_PRIO_CLASS(req_get_ioprio(scsi_cmd_to_rq(scmd))); 5653 if (priority_class == IOPRIO_CLASS_RT) { 5654 /* Set NCQ priority for read/write commands. */ 5655 switch (scmd->cmnd[0]) { 5656 case WRITE_16: 5657 case READ_16: 5658 case WRITE_12: 5659 case READ_12: 5660 case WRITE_10: 5661 case READ_10: 5662 case WRITE_6: 5663 case READ_6: 5664 io_high_prio = true; 5665 break; 5666 } 5667 } 5668 } 5669 5670 return io_high_prio; 5671 } 5672 5673 static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5674 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5675 struct pqi_queue_group *queue_group) 5676 { 5677 bool io_high_prio; 5678 5679 io_high_prio = pqi_is_io_high_priority(ctrl_info, device, scmd); 5680 5681 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle, 5682 scmd->cmnd, scmd->cmd_len, queue_group, NULL, 5683 false, io_high_prio); 5684 } 5685 5686 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 5687 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 5688 unsigned int cdb_length, struct pqi_queue_group *queue_group, 5689 struct pqi_encryption_info *encryption_info, bool raid_bypass, 5690 bool io_high_prio) 5691 { 5692 int rc; 5693 struct pqi_io_request *io_request; 5694 struct pqi_aio_path_request *request; 5695 struct pqi_scsi_dev *device; 5696 5697 device = scmd->device->hostdata; 5698 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5699 if (!io_request) 5700 return SCSI_MLQUEUE_HOST_BUSY; 5701 io_request->io_complete_callback = pqi_aio_io_complete; 5702 io_request->scmd = scmd; 5703 io_request->raid_bypass = raid_bypass; 5704 5705 request = io_request->iu; 5706 memset(request, 0, offsetof(struct pqi_aio_path_request, sg_descriptors)); 5707 5708 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO; 5709 put_unaligned_le32(aio_handle, &request->nexus_id); 5710 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 5711 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5712 request->command_priority = io_high_prio; 5713 put_unaligned_le16(io_request->index, &request->request_id); 5714 request->error_index = request->request_id; 5715 if (!pqi_is_logical_device(device) && ctrl_info->multi_lun_device_supported) 5716 put_unaligned_le64(((scmd->device->lun) << 8), &request->lun_number); 5717 if (cdb_length > sizeof(request->cdb)) 5718 cdb_length = sizeof(request->cdb); 5719 request->cdb_length = cdb_length; 5720 memcpy(request->cdb, cdb, cdb_length); 5721 5722 switch (scmd->sc_data_direction) { 5723 case DMA_TO_DEVICE: 5724 request->data_direction = SOP_READ_FLAG; 5725 break; 5726 case DMA_FROM_DEVICE: 5727 request->data_direction = SOP_WRITE_FLAG; 5728 break; 5729 case DMA_NONE: 5730 request->data_direction = SOP_NO_DIRECTION_FLAG; 5731 break; 5732 case DMA_BIDIRECTIONAL: 5733 request->data_direction = SOP_BIDIRECTIONAL; 5734 break; 5735 default: 5736 dev_err(&ctrl_info->pci_dev->dev, 5737 "unknown data direction: %d\n", 5738 scmd->sc_data_direction); 5739 break; 5740 } 5741 5742 if (encryption_info) { 5743 request->encryption_enable = true; 5744 put_unaligned_le16(encryption_info->data_encryption_key_index, 5745 &request->data_encryption_key_index); 5746 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5747 &request->encrypt_tweak_lower); 5748 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5749 &request->encrypt_tweak_upper); 5750 } 5751 5752 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request); 5753 if (rc) { 5754 pqi_free_io_request(io_request); 5755 return SCSI_MLQUEUE_HOST_BUSY; 5756 } 5757 5758 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5759 5760 return 0; 5761 } 5762 5763 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info, 5764 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 5765 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 5766 struct pqi_scsi_dev_raid_map_data *rmd) 5767 { 5768 int rc; 5769 struct pqi_io_request *io_request; 5770 struct pqi_aio_r1_path_request *r1_request; 5771 5772 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5773 if (!io_request) 5774 return SCSI_MLQUEUE_HOST_BUSY; 5775 5776 io_request->io_complete_callback = pqi_aio_io_complete; 5777 io_request->scmd = scmd; 5778 io_request->raid_bypass = true; 5779 5780 r1_request = io_request->iu; 5781 memset(r1_request, 0, offsetof(struct pqi_aio_r1_path_request, sg_descriptors)); 5782 5783 r1_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID1_IO; 5784 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r1_request->volume_id); 5785 r1_request->num_drives = rmd->num_it_nexus_entries; 5786 put_unaligned_le32(rmd->it_nexus[0], &r1_request->it_nexus_1); 5787 put_unaligned_le32(rmd->it_nexus[1], &r1_request->it_nexus_2); 5788 if (rmd->num_it_nexus_entries == 3) 5789 put_unaligned_le32(rmd->it_nexus[2], &r1_request->it_nexus_3); 5790 5791 put_unaligned_le32(scsi_bufflen(scmd), &r1_request->data_length); 5792 r1_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5793 put_unaligned_le16(io_request->index, &r1_request->request_id); 5794 r1_request->error_index = r1_request->request_id; 5795 if (rmd->cdb_length > sizeof(r1_request->cdb)) 5796 rmd->cdb_length = sizeof(r1_request->cdb); 5797 r1_request->cdb_length = rmd->cdb_length; 5798 memcpy(r1_request->cdb, rmd->cdb, rmd->cdb_length); 5799 5800 /* The direction is always write. */ 5801 r1_request->data_direction = SOP_READ_FLAG; 5802 5803 if (encryption_info) { 5804 r1_request->encryption_enable = true; 5805 put_unaligned_le16(encryption_info->data_encryption_key_index, 5806 &r1_request->data_encryption_key_index); 5807 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5808 &r1_request->encrypt_tweak_lower); 5809 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5810 &r1_request->encrypt_tweak_upper); 5811 } 5812 5813 rc = pqi_build_aio_r1_sg_list(ctrl_info, r1_request, scmd, io_request); 5814 if (rc) { 5815 pqi_free_io_request(io_request); 5816 return SCSI_MLQUEUE_HOST_BUSY; 5817 } 5818 5819 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5820 5821 return 0; 5822 } 5823 5824 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info, 5825 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 5826 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 5827 struct pqi_scsi_dev_raid_map_data *rmd) 5828 { 5829 int rc; 5830 struct pqi_io_request *io_request; 5831 struct pqi_aio_r56_path_request *r56_request; 5832 5833 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5834 if (!io_request) 5835 return SCSI_MLQUEUE_HOST_BUSY; 5836 io_request->io_complete_callback = pqi_aio_io_complete; 5837 io_request->scmd = scmd; 5838 io_request->raid_bypass = true; 5839 5840 r56_request = io_request->iu; 5841 memset(r56_request, 0, offsetof(struct pqi_aio_r56_path_request, sg_descriptors)); 5842 5843 if (device->raid_level == SA_RAID_5 || device->raid_level == SA_RAID_51) 5844 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID5_IO; 5845 else 5846 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID6_IO; 5847 5848 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r56_request->volume_id); 5849 put_unaligned_le32(rmd->aio_handle, &r56_request->data_it_nexus); 5850 put_unaligned_le32(rmd->p_parity_it_nexus, &r56_request->p_parity_it_nexus); 5851 if (rmd->raid_level == SA_RAID_6) { 5852 put_unaligned_le32(rmd->q_parity_it_nexus, &r56_request->q_parity_it_nexus); 5853 r56_request->xor_multiplier = rmd->xor_mult; 5854 } 5855 put_unaligned_le32(scsi_bufflen(scmd), &r56_request->data_length); 5856 r56_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5857 put_unaligned_le64(rmd->row, &r56_request->row); 5858 5859 put_unaligned_le16(io_request->index, &r56_request->request_id); 5860 r56_request->error_index = r56_request->request_id; 5861 5862 if (rmd->cdb_length > sizeof(r56_request->cdb)) 5863 rmd->cdb_length = sizeof(r56_request->cdb); 5864 r56_request->cdb_length = rmd->cdb_length; 5865 memcpy(r56_request->cdb, rmd->cdb, rmd->cdb_length); 5866 5867 /* The direction is always write. */ 5868 r56_request->data_direction = SOP_READ_FLAG; 5869 5870 if (encryption_info) { 5871 r56_request->encryption_enable = true; 5872 put_unaligned_le16(encryption_info->data_encryption_key_index, 5873 &r56_request->data_encryption_key_index); 5874 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5875 &r56_request->encrypt_tweak_lower); 5876 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5877 &r56_request->encrypt_tweak_upper); 5878 } 5879 5880 rc = pqi_build_aio_r56_sg_list(ctrl_info, r56_request, scmd, io_request); 5881 if (rc) { 5882 pqi_free_io_request(io_request); 5883 return SCSI_MLQUEUE_HOST_BUSY; 5884 } 5885 5886 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5887 5888 return 0; 5889 } 5890 5891 static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info, 5892 struct scsi_cmnd *scmd) 5893 { 5894 /* 5895 * We are setting host_tagset = 1 during init. 5896 */ 5897 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scsi_cmd_to_rq(scmd))); 5898 } 5899 5900 static inline bool pqi_is_bypass_eligible_request(struct scsi_cmnd *scmd) 5901 { 5902 if (blk_rq_is_passthrough(scsi_cmd_to_rq(scmd))) 5903 return false; 5904 5905 return pqi_cmd_priv(scmd)->this_residual == 0; 5906 } 5907 5908 /* 5909 * This function gets called just before we hand the completed SCSI request 5910 * back to the SML. 5911 */ 5912 5913 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd) 5914 { 5915 struct pqi_scsi_dev *device; 5916 5917 if (!scmd->device) { 5918 set_host_byte(scmd, DID_NO_CONNECT); 5919 return; 5920 } 5921 5922 device = scmd->device->hostdata; 5923 if (!device) { 5924 set_host_byte(scmd, DID_NO_CONNECT); 5925 return; 5926 } 5927 5928 atomic_dec(&device->scsi_cmds_outstanding[scmd->device->lun]); 5929 } 5930 5931 static bool pqi_is_parity_write_stream(struct pqi_ctrl_info *ctrl_info, 5932 struct scsi_cmnd *scmd) 5933 { 5934 u32 oldest_jiffies; 5935 u8 lru_index; 5936 int i; 5937 int rc; 5938 struct pqi_scsi_dev *device; 5939 struct pqi_stream_data *pqi_stream_data; 5940 struct pqi_scsi_dev_raid_map_data rmd; 5941 5942 if (!ctrl_info->enable_stream_detection) 5943 return false; 5944 5945 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd); 5946 if (rc) 5947 return false; 5948 5949 /* Check writes only. */ 5950 if (!rmd.is_write) 5951 return false; 5952 5953 device = scmd->device->hostdata; 5954 5955 /* Check for RAID 5/6 streams. */ 5956 if (device->raid_level != SA_RAID_5 && device->raid_level != SA_RAID_6) 5957 return false; 5958 5959 /* 5960 * If controller does not support AIO RAID{5,6} writes, need to send 5961 * requests down non-AIO path. 5962 */ 5963 if ((device->raid_level == SA_RAID_5 && !ctrl_info->enable_r5_writes) || 5964 (device->raid_level == SA_RAID_6 && !ctrl_info->enable_r6_writes)) 5965 return true; 5966 5967 lru_index = 0; 5968 oldest_jiffies = INT_MAX; 5969 for (i = 0; i < NUM_STREAMS_PER_LUN; i++) { 5970 pqi_stream_data = &device->stream_data[i]; 5971 /* 5972 * Check for adjacent request or request is within 5973 * the previous request. 5974 */ 5975 if ((pqi_stream_data->next_lba && 5976 rmd.first_block >= pqi_stream_data->next_lba) && 5977 rmd.first_block <= pqi_stream_data->next_lba + 5978 rmd.block_cnt) { 5979 pqi_stream_data->next_lba = rmd.first_block + 5980 rmd.block_cnt; 5981 pqi_stream_data->last_accessed = jiffies; 5982 return true; 5983 } 5984 5985 /* unused entry */ 5986 if (pqi_stream_data->last_accessed == 0) { 5987 lru_index = i; 5988 break; 5989 } 5990 5991 /* Find entry with oldest last accessed time. */ 5992 if (pqi_stream_data->last_accessed <= oldest_jiffies) { 5993 oldest_jiffies = pqi_stream_data->last_accessed; 5994 lru_index = i; 5995 } 5996 } 5997 5998 /* Set LRU entry. */ 5999 pqi_stream_data = &device->stream_data[lru_index]; 6000 pqi_stream_data->last_accessed = jiffies; 6001 pqi_stream_data->next_lba = rmd.first_block + rmd.block_cnt; 6002 6003 return false; 6004 } 6005 6006 static int pqi_scsi_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd) 6007 { 6008 int rc; 6009 struct pqi_ctrl_info *ctrl_info; 6010 struct pqi_scsi_dev *device; 6011 u16 hw_queue; 6012 struct pqi_queue_group *queue_group; 6013 bool raid_bypassed; 6014 6015 device = scmd->device->hostdata; 6016 6017 if (!device) { 6018 set_host_byte(scmd, DID_NO_CONNECT); 6019 pqi_scsi_done(scmd); 6020 return 0; 6021 } 6022 6023 atomic_inc(&device->scsi_cmds_outstanding[scmd->device->lun]); 6024 6025 ctrl_info = shost_to_hba(shost); 6026 6027 if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(device)) { 6028 set_host_byte(scmd, DID_NO_CONNECT); 6029 pqi_scsi_done(scmd); 6030 return 0; 6031 } 6032 6033 if (pqi_ctrl_blocked(ctrl_info)) { 6034 rc = SCSI_MLQUEUE_HOST_BUSY; 6035 goto out; 6036 } 6037 6038 /* 6039 * This is necessary because the SML doesn't zero out this field during 6040 * error recovery. 6041 */ 6042 scmd->result = 0; 6043 6044 hw_queue = pqi_get_hw_queue(ctrl_info, scmd); 6045 queue_group = &ctrl_info->queue_groups[hw_queue]; 6046 6047 if (pqi_is_logical_device(device)) { 6048 raid_bypassed = false; 6049 if (device->raid_bypass_enabled && 6050 pqi_is_bypass_eligible_request(scmd) && 6051 !pqi_is_parity_write_stream(ctrl_info, scmd)) { 6052 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6053 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY) { 6054 raid_bypassed = true; 6055 atomic_inc(&device->raid_bypass_cnt); 6056 } 6057 } 6058 if (!raid_bypassed) 6059 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6060 } else { 6061 if (device->aio_enabled) 6062 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6063 else 6064 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6065 } 6066 6067 out: 6068 if (rc) 6069 atomic_dec(&device->scsi_cmds_outstanding[scmd->device->lun]); 6070 6071 return rc; 6072 } 6073 6074 static unsigned int pqi_queued_io_count(struct pqi_ctrl_info *ctrl_info) 6075 { 6076 unsigned int i; 6077 unsigned int path; 6078 unsigned long flags; 6079 unsigned int queued_io_count; 6080 struct pqi_queue_group *queue_group; 6081 struct pqi_io_request *io_request; 6082 6083 queued_io_count = 0; 6084 6085 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6086 queue_group = &ctrl_info->queue_groups[i]; 6087 for (path = 0; path < 2; path++) { 6088 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 6089 list_for_each_entry(io_request, &queue_group->request_list[path], request_list_entry) 6090 queued_io_count++; 6091 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 6092 } 6093 } 6094 6095 return queued_io_count; 6096 } 6097 6098 static unsigned int pqi_nonempty_inbound_queue_count(struct pqi_ctrl_info *ctrl_info) 6099 { 6100 unsigned int i; 6101 unsigned int path; 6102 unsigned int nonempty_inbound_queue_count; 6103 struct pqi_queue_group *queue_group; 6104 pqi_index_t iq_pi; 6105 pqi_index_t iq_ci; 6106 6107 nonempty_inbound_queue_count = 0; 6108 6109 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6110 queue_group = &ctrl_info->queue_groups[i]; 6111 for (path = 0; path < 2; path++) { 6112 iq_pi = queue_group->iq_pi_copy[path]; 6113 iq_ci = readl(queue_group->iq_ci[path]); 6114 if (iq_ci != iq_pi) 6115 nonempty_inbound_queue_count++; 6116 } 6117 } 6118 6119 return nonempty_inbound_queue_count; 6120 } 6121 6122 #define PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS 10 6123 6124 static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info) 6125 { 6126 unsigned long start_jiffies; 6127 unsigned long warning_timeout; 6128 unsigned int queued_io_count; 6129 unsigned int nonempty_inbound_queue_count; 6130 bool displayed_warning; 6131 6132 displayed_warning = false; 6133 start_jiffies = jiffies; 6134 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * HZ) + start_jiffies; 6135 6136 while (1) { 6137 queued_io_count = pqi_queued_io_count(ctrl_info); 6138 nonempty_inbound_queue_count = pqi_nonempty_inbound_queue_count(ctrl_info); 6139 if (queued_io_count == 0 && nonempty_inbound_queue_count == 0) 6140 break; 6141 pqi_check_ctrl_health(ctrl_info); 6142 if (pqi_ctrl_offline(ctrl_info)) 6143 return -ENXIO; 6144 if (time_after(jiffies, warning_timeout)) { 6145 dev_warn(&ctrl_info->pci_dev->dev, 6146 "waiting %u seconds for queued I/O to drain (queued I/O count: %u; non-empty inbound queue count: %u)\n", 6147 jiffies_to_msecs(jiffies - start_jiffies) / 1000, queued_io_count, nonempty_inbound_queue_count); 6148 displayed_warning = true; 6149 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * HZ) + jiffies; 6150 } 6151 usleep_range(1000, 2000); 6152 } 6153 6154 if (displayed_warning) 6155 dev_warn(&ctrl_info->pci_dev->dev, 6156 "queued I/O drained after waiting for %u seconds\n", 6157 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 6158 6159 return 0; 6160 } 6161 6162 static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info, 6163 struct pqi_scsi_dev *device) 6164 { 6165 unsigned int i; 6166 unsigned int path; 6167 struct pqi_queue_group *queue_group; 6168 unsigned long flags; 6169 struct pqi_io_request *io_request; 6170 struct pqi_io_request *next; 6171 struct scsi_cmnd *scmd; 6172 struct pqi_scsi_dev *scsi_device; 6173 6174 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6175 queue_group = &ctrl_info->queue_groups[i]; 6176 6177 for (path = 0; path < 2; path++) { 6178 spin_lock_irqsave( 6179 &queue_group->submit_lock[path], flags); 6180 6181 list_for_each_entry_safe(io_request, next, 6182 &queue_group->request_list[path], 6183 request_list_entry) { 6184 6185 scmd = io_request->scmd; 6186 if (!scmd) 6187 continue; 6188 6189 scsi_device = scmd->device->hostdata; 6190 if (scsi_device != device) 6191 continue; 6192 6193 list_del(&io_request->request_list_entry); 6194 set_host_byte(scmd, DID_RESET); 6195 pqi_free_io_request(io_request); 6196 scsi_dma_unmap(scmd); 6197 pqi_scsi_done(scmd); 6198 } 6199 6200 spin_unlock_irqrestore( 6201 &queue_group->submit_lock[path], flags); 6202 } 6203 } 6204 } 6205 6206 #define PQI_PENDING_IO_WARNING_TIMEOUT_SECS 10 6207 6208 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 6209 struct pqi_scsi_dev *device, u8 lun, unsigned long timeout_msecs) 6210 { 6211 int cmds_outstanding; 6212 unsigned long start_jiffies; 6213 unsigned long warning_timeout; 6214 unsigned long msecs_waiting; 6215 6216 start_jiffies = jiffies; 6217 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * HZ) + start_jiffies; 6218 6219 while ((cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding[lun])) > 0) { 6220 if (ctrl_info->ctrl_removal_state != PQI_CTRL_GRACEFUL_REMOVAL) { 6221 pqi_check_ctrl_health(ctrl_info); 6222 if (pqi_ctrl_offline(ctrl_info)) 6223 return -ENXIO; 6224 } 6225 msecs_waiting = jiffies_to_msecs(jiffies - start_jiffies); 6226 if (msecs_waiting >= timeout_msecs) { 6227 dev_err(&ctrl_info->pci_dev->dev, 6228 "scsi %d:%d:%d:%d: timed out after %lu seconds waiting for %d outstanding command(s)\n", 6229 ctrl_info->scsi_host->host_no, device->bus, device->target, 6230 lun, msecs_waiting / 1000, cmds_outstanding); 6231 return -ETIMEDOUT; 6232 } 6233 if (time_after(jiffies, warning_timeout)) { 6234 dev_warn(&ctrl_info->pci_dev->dev, 6235 "scsi %d:%d:%d:%d: waiting %lu seconds for %d outstanding command(s)\n", 6236 ctrl_info->scsi_host->host_no, device->bus, device->target, 6237 lun, msecs_waiting / 1000, cmds_outstanding); 6238 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * HZ) + jiffies; 6239 } 6240 usleep_range(1000, 2000); 6241 } 6242 6243 return 0; 6244 } 6245 6246 static void pqi_lun_reset_complete(struct pqi_io_request *io_request, 6247 void *context) 6248 { 6249 struct completion *waiting = context; 6250 6251 complete(waiting); 6252 } 6253 6254 #define PQI_LUN_RESET_POLL_COMPLETION_SECS 10 6255 6256 static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info, 6257 struct pqi_scsi_dev *device, u8 lun, struct completion *wait) 6258 { 6259 int rc; 6260 unsigned int wait_secs; 6261 int cmds_outstanding; 6262 6263 wait_secs = 0; 6264 6265 while (1) { 6266 if (wait_for_completion_io_timeout(wait, 6267 PQI_LUN_RESET_POLL_COMPLETION_SECS * HZ)) { 6268 rc = 0; 6269 break; 6270 } 6271 6272 pqi_check_ctrl_health(ctrl_info); 6273 if (pqi_ctrl_offline(ctrl_info)) { 6274 rc = -ENXIO; 6275 break; 6276 } 6277 6278 wait_secs += PQI_LUN_RESET_POLL_COMPLETION_SECS; 6279 cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding[lun]); 6280 dev_warn(&ctrl_info->pci_dev->dev, 6281 "scsi %d:%d:%d:%d: waiting %u seconds for LUN reset to complete (%d command(s) outstanding)\n", 6282 ctrl_info->scsi_host->host_no, device->bus, device->target, lun, wait_secs, cmds_outstanding); 6283 } 6284 6285 return rc; 6286 } 6287 6288 #define PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS 30 6289 6290 static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info, struct scsi_cmnd *scmd) 6291 { 6292 int rc; 6293 struct pqi_io_request *io_request; 6294 DECLARE_COMPLETION_ONSTACK(wait); 6295 struct pqi_task_management_request *request; 6296 struct pqi_scsi_dev *device; 6297 6298 device = scmd->device->hostdata; 6299 io_request = pqi_alloc_io_request(ctrl_info, NULL); 6300 io_request->io_complete_callback = pqi_lun_reset_complete; 6301 io_request->context = &wait; 6302 6303 request = io_request->iu; 6304 memset(request, 0, sizeof(*request)); 6305 6306 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT; 6307 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH, 6308 &request->header.iu_length); 6309 put_unaligned_le16(io_request->index, &request->request_id); 6310 memcpy(request->lun_number, device->scsi3addr, 6311 sizeof(request->lun_number)); 6312 if (!pqi_is_logical_device(device) && ctrl_info->multi_lun_device_supported) 6313 request->ml_device_lun_number = (u8)scmd->device->lun; 6314 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET; 6315 if (ctrl_info->tmf_iu_timeout_supported) 6316 put_unaligned_le16(PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS, &request->timeout); 6317 6318 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 6319 io_request); 6320 6321 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, (u8)scmd->device->lun, &wait); 6322 if (rc == 0) 6323 rc = io_request->status; 6324 6325 pqi_free_io_request(io_request); 6326 6327 return rc; 6328 } 6329 6330 #define PQI_LUN_RESET_RETRIES 3 6331 #define PQI_LUN_RESET_RETRY_INTERVAL_MSECS (10 * 1000) 6332 #define PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS (10 * 60 * 1000) 6333 #define PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS (2 * 60 * 1000) 6334 6335 static int pqi_lun_reset_with_retries(struct pqi_ctrl_info *ctrl_info, struct scsi_cmnd *scmd) 6336 { 6337 int reset_rc; 6338 int wait_rc; 6339 unsigned int retries; 6340 unsigned long timeout_msecs; 6341 struct pqi_scsi_dev *device; 6342 6343 device = scmd->device->hostdata; 6344 for (retries = 0;;) { 6345 reset_rc = pqi_lun_reset(ctrl_info, scmd); 6346 if (reset_rc == 0 || reset_rc == -ENODEV || ++retries > PQI_LUN_RESET_RETRIES) 6347 break; 6348 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS); 6349 } 6350 6351 timeout_msecs = reset_rc ? PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS : 6352 PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS; 6353 6354 wait_rc = pqi_device_wait_for_pending_io(ctrl_info, device, scmd->device->lun, timeout_msecs); 6355 if (wait_rc && reset_rc == 0) 6356 reset_rc = wait_rc; 6357 6358 return reset_rc == 0 ? SUCCESS : FAILED; 6359 } 6360 6361 static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info, struct scsi_cmnd *scmd) 6362 { 6363 int rc; 6364 struct pqi_scsi_dev *device; 6365 6366 device = scmd->device->hostdata; 6367 pqi_ctrl_block_requests(ctrl_info); 6368 pqi_ctrl_wait_until_quiesced(ctrl_info); 6369 pqi_fail_io_queued_for_device(ctrl_info, device); 6370 rc = pqi_wait_until_inbound_queues_empty(ctrl_info); 6371 if (rc) 6372 rc = FAILED; 6373 else 6374 rc = pqi_lun_reset_with_retries(ctrl_info, scmd); 6375 pqi_ctrl_unblock_requests(ctrl_info); 6376 6377 return rc; 6378 } 6379 6380 static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd) 6381 { 6382 int rc; 6383 struct Scsi_Host *shost; 6384 struct pqi_ctrl_info *ctrl_info; 6385 struct pqi_scsi_dev *device; 6386 6387 shost = scmd->device->host; 6388 ctrl_info = shost_to_hba(shost); 6389 device = scmd->device->hostdata; 6390 6391 mutex_lock(&ctrl_info->lun_reset_mutex); 6392 6393 dev_err(&ctrl_info->pci_dev->dev, 6394 "resetting scsi %d:%d:%d:%d due to cmd 0x%02x\n", 6395 shost->host_no, 6396 device->bus, device->target, (u32)scmd->device->lun, 6397 scmd->cmd_len > 0 ? scmd->cmnd[0] : 0xff); 6398 6399 pqi_check_ctrl_health(ctrl_info); 6400 if (pqi_ctrl_offline(ctrl_info)) 6401 rc = FAILED; 6402 else 6403 rc = pqi_device_reset(ctrl_info, scmd); 6404 6405 dev_err(&ctrl_info->pci_dev->dev, 6406 "reset of scsi %d:%d:%d:%d: %s\n", 6407 shost->host_no, device->bus, device->target, (u32)scmd->device->lun, 6408 rc == SUCCESS ? "SUCCESS" : "FAILED"); 6409 6410 mutex_unlock(&ctrl_info->lun_reset_mutex); 6411 6412 return rc; 6413 } 6414 6415 static int pqi_slave_alloc(struct scsi_device *sdev) 6416 { 6417 struct pqi_scsi_dev *device; 6418 unsigned long flags; 6419 struct pqi_ctrl_info *ctrl_info; 6420 struct scsi_target *starget; 6421 struct sas_rphy *rphy; 6422 6423 ctrl_info = shost_to_hba(sdev->host); 6424 6425 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6426 6427 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) { 6428 starget = scsi_target(sdev); 6429 rphy = target_to_rphy(starget); 6430 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy); 6431 if (device) { 6432 if (device->target_lun_valid) { 6433 device->ignore_device = true; 6434 } else { 6435 device->target = sdev_id(sdev); 6436 device->lun = sdev->lun; 6437 device->target_lun_valid = true; 6438 } 6439 } 6440 } else { 6441 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev), 6442 sdev_id(sdev), sdev->lun); 6443 } 6444 6445 if (device) { 6446 sdev->hostdata = device; 6447 device->sdev = sdev; 6448 if (device->queue_depth) { 6449 device->advertised_queue_depth = device->queue_depth; 6450 scsi_change_queue_depth(sdev, 6451 device->advertised_queue_depth); 6452 } 6453 if (pqi_is_logical_device(device)) { 6454 pqi_disable_write_same(sdev); 6455 } else { 6456 sdev->allow_restart = 1; 6457 if (device->device_type == SA_DEVICE_TYPE_NVME) 6458 pqi_disable_write_same(sdev); 6459 } 6460 } 6461 6462 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6463 6464 return 0; 6465 } 6466 6467 static void pqi_map_queues(struct Scsi_Host *shost) 6468 { 6469 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6470 6471 blk_mq_pci_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT], 6472 ctrl_info->pci_dev, 0); 6473 } 6474 6475 static inline bool pqi_is_tape_changer_device(struct pqi_scsi_dev *device) 6476 { 6477 return device->devtype == TYPE_TAPE || device->devtype == TYPE_MEDIUM_CHANGER; 6478 } 6479 6480 static int pqi_slave_configure(struct scsi_device *sdev) 6481 { 6482 int rc = 0; 6483 struct pqi_scsi_dev *device; 6484 6485 device = sdev->hostdata; 6486 device->devtype = sdev->type; 6487 6488 if (pqi_is_tape_changer_device(device) && device->ignore_device) { 6489 rc = -ENXIO; 6490 device->ignore_device = false; 6491 } 6492 6493 return rc; 6494 } 6495 6496 static void pqi_slave_destroy(struct scsi_device *sdev) 6497 { 6498 struct pqi_ctrl_info *ctrl_info; 6499 struct pqi_scsi_dev *device; 6500 int mutex_acquired; 6501 unsigned long flags; 6502 6503 ctrl_info = shost_to_hba(sdev->host); 6504 6505 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex); 6506 if (!mutex_acquired) 6507 return; 6508 6509 device = sdev->hostdata; 6510 if (!device) { 6511 mutex_unlock(&ctrl_info->scan_mutex); 6512 return; 6513 } 6514 6515 device->lun_count--; 6516 if (device->lun_count > 0) { 6517 mutex_unlock(&ctrl_info->scan_mutex); 6518 return; 6519 } 6520 6521 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6522 list_del(&device->scsi_device_list_entry); 6523 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6524 6525 mutex_unlock(&ctrl_info->scan_mutex); 6526 6527 pqi_dev_info(ctrl_info, "removed", device); 6528 pqi_free_device(device); 6529 } 6530 6531 static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 6532 { 6533 struct pci_dev *pci_dev; 6534 u32 subsystem_vendor; 6535 u32 subsystem_device; 6536 cciss_pci_info_struct pciinfo; 6537 6538 if (!arg) 6539 return -EINVAL; 6540 6541 pci_dev = ctrl_info->pci_dev; 6542 6543 pciinfo.domain = pci_domain_nr(pci_dev->bus); 6544 pciinfo.bus = pci_dev->bus->number; 6545 pciinfo.dev_fn = pci_dev->devfn; 6546 subsystem_vendor = pci_dev->subsystem_vendor; 6547 subsystem_device = pci_dev->subsystem_device; 6548 pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) | subsystem_vendor; 6549 6550 if (copy_to_user(arg, &pciinfo, sizeof(pciinfo))) 6551 return -EFAULT; 6552 6553 return 0; 6554 } 6555 6556 static int pqi_getdrivver_ioctl(void __user *arg) 6557 { 6558 u32 version; 6559 6560 if (!arg) 6561 return -EINVAL; 6562 6563 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) | 6564 (DRIVER_RELEASE << 16) | DRIVER_REVISION; 6565 6566 if (copy_to_user(arg, &version, sizeof(version))) 6567 return -EFAULT; 6568 6569 return 0; 6570 } 6571 6572 struct ciss_error_info { 6573 u8 scsi_status; 6574 int command_status; 6575 size_t sense_data_length; 6576 }; 6577 6578 static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info, 6579 struct ciss_error_info *ciss_error_info) 6580 { 6581 int ciss_cmd_status; 6582 size_t sense_data_length; 6583 6584 switch (pqi_error_info->data_out_result) { 6585 case PQI_DATA_IN_OUT_GOOD: 6586 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS; 6587 break; 6588 case PQI_DATA_IN_OUT_UNDERFLOW: 6589 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN; 6590 break; 6591 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 6592 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN; 6593 break; 6594 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 6595 case PQI_DATA_IN_OUT_BUFFER_ERROR: 6596 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 6597 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 6598 case PQI_DATA_IN_OUT_ERROR: 6599 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR; 6600 break; 6601 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 6602 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 6603 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 6604 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 6605 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 6606 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 6607 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 6608 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 6609 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 6610 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 6611 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR; 6612 break; 6613 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 6614 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT; 6615 break; 6616 case PQI_DATA_IN_OUT_ABORTED: 6617 ciss_cmd_status = CISS_CMD_STATUS_ABORTED; 6618 break; 6619 case PQI_DATA_IN_OUT_TIMEOUT: 6620 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT; 6621 break; 6622 default: 6623 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS; 6624 break; 6625 } 6626 6627 sense_data_length = 6628 get_unaligned_le16(&pqi_error_info->sense_data_length); 6629 if (sense_data_length == 0) 6630 sense_data_length = 6631 get_unaligned_le16(&pqi_error_info->response_data_length); 6632 if (sense_data_length) 6633 if (sense_data_length > sizeof(pqi_error_info->data)) 6634 sense_data_length = sizeof(pqi_error_info->data); 6635 6636 ciss_error_info->scsi_status = pqi_error_info->status; 6637 ciss_error_info->command_status = ciss_cmd_status; 6638 ciss_error_info->sense_data_length = sense_data_length; 6639 } 6640 6641 static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 6642 { 6643 int rc; 6644 char *kernel_buffer = NULL; 6645 u16 iu_length; 6646 size_t sense_data_length; 6647 IOCTL_Command_struct iocommand; 6648 struct pqi_raid_path_request request; 6649 struct pqi_raid_error_info pqi_error_info; 6650 struct ciss_error_info ciss_error_info; 6651 6652 if (pqi_ctrl_offline(ctrl_info)) 6653 return -ENXIO; 6654 if (pqi_ofa_in_progress(ctrl_info) && pqi_ctrl_blocked(ctrl_info)) 6655 return -EBUSY; 6656 if (!arg) 6657 return -EINVAL; 6658 if (!capable(CAP_SYS_RAWIO)) 6659 return -EPERM; 6660 if (copy_from_user(&iocommand, arg, sizeof(iocommand))) 6661 return -EFAULT; 6662 if (iocommand.buf_size < 1 && 6663 iocommand.Request.Type.Direction != XFER_NONE) 6664 return -EINVAL; 6665 if (iocommand.Request.CDBLen > sizeof(request.cdb)) 6666 return -EINVAL; 6667 if (iocommand.Request.Type.Type != TYPE_CMD) 6668 return -EINVAL; 6669 6670 switch (iocommand.Request.Type.Direction) { 6671 case XFER_NONE: 6672 case XFER_WRITE: 6673 case XFER_READ: 6674 case XFER_READ | XFER_WRITE: 6675 break; 6676 default: 6677 return -EINVAL; 6678 } 6679 6680 if (iocommand.buf_size > 0) { 6681 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL); 6682 if (!kernel_buffer) 6683 return -ENOMEM; 6684 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6685 if (copy_from_user(kernel_buffer, iocommand.buf, 6686 iocommand.buf_size)) { 6687 rc = -EFAULT; 6688 goto out; 6689 } 6690 } else { 6691 memset(kernel_buffer, 0, iocommand.buf_size); 6692 } 6693 } 6694 6695 memset(&request, 0, sizeof(request)); 6696 6697 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 6698 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 6699 PQI_REQUEST_HEADER_LENGTH; 6700 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes, 6701 sizeof(request.lun_number)); 6702 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen); 6703 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 6704 6705 switch (iocommand.Request.Type.Direction) { 6706 case XFER_NONE: 6707 request.data_direction = SOP_NO_DIRECTION_FLAG; 6708 break; 6709 case XFER_WRITE: 6710 request.data_direction = SOP_WRITE_FLAG; 6711 break; 6712 case XFER_READ: 6713 request.data_direction = SOP_READ_FLAG; 6714 break; 6715 case XFER_READ | XFER_WRITE: 6716 request.data_direction = SOP_BIDIRECTIONAL; 6717 break; 6718 } 6719 6720 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 6721 6722 if (iocommand.buf_size > 0) { 6723 put_unaligned_le32(iocommand.buf_size, &request.buffer_length); 6724 6725 rc = pqi_map_single(ctrl_info->pci_dev, 6726 &request.sg_descriptors[0], kernel_buffer, 6727 iocommand.buf_size, DMA_BIDIRECTIONAL); 6728 if (rc) 6729 goto out; 6730 6731 iu_length += sizeof(request.sg_descriptors[0]); 6732 } 6733 6734 put_unaligned_le16(iu_length, &request.header.iu_length); 6735 6736 if (ctrl_info->raid_iu_timeout_supported) 6737 put_unaligned_le32(iocommand.Request.Timeout, &request.timeout); 6738 6739 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 6740 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info); 6741 6742 if (iocommand.buf_size > 0) 6743 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 6744 DMA_BIDIRECTIONAL); 6745 6746 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info)); 6747 6748 if (rc == 0) { 6749 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info); 6750 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status; 6751 iocommand.error_info.CommandStatus = 6752 ciss_error_info.command_status; 6753 sense_data_length = ciss_error_info.sense_data_length; 6754 if (sense_data_length) { 6755 if (sense_data_length > 6756 sizeof(iocommand.error_info.SenseInfo)) 6757 sense_data_length = 6758 sizeof(iocommand.error_info.SenseInfo); 6759 memcpy(iocommand.error_info.SenseInfo, 6760 pqi_error_info.data, sense_data_length); 6761 iocommand.error_info.SenseLen = sense_data_length; 6762 } 6763 } 6764 6765 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) { 6766 rc = -EFAULT; 6767 goto out; 6768 } 6769 6770 if (rc == 0 && iocommand.buf_size > 0 && 6771 (iocommand.Request.Type.Direction & XFER_READ)) { 6772 if (copy_to_user(iocommand.buf, kernel_buffer, 6773 iocommand.buf_size)) { 6774 rc = -EFAULT; 6775 } 6776 } 6777 6778 out: 6779 kfree(kernel_buffer); 6780 6781 return rc; 6782 } 6783 6784 static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd, 6785 void __user *arg) 6786 { 6787 int rc; 6788 struct pqi_ctrl_info *ctrl_info; 6789 6790 ctrl_info = shost_to_hba(sdev->host); 6791 6792 switch (cmd) { 6793 case CCISS_DEREGDISK: 6794 case CCISS_REGNEWDISK: 6795 case CCISS_REGNEWD: 6796 rc = pqi_scan_scsi_devices(ctrl_info); 6797 break; 6798 case CCISS_GETPCIINFO: 6799 rc = pqi_getpciinfo_ioctl(ctrl_info, arg); 6800 break; 6801 case CCISS_GETDRIVVER: 6802 rc = pqi_getdrivver_ioctl(arg); 6803 break; 6804 case CCISS_PASSTHRU: 6805 rc = pqi_passthru_ioctl(ctrl_info, arg); 6806 break; 6807 default: 6808 rc = -EINVAL; 6809 break; 6810 } 6811 6812 return rc; 6813 } 6814 6815 static ssize_t pqi_firmware_version_show(struct device *dev, 6816 struct device_attribute *attr, char *buffer) 6817 { 6818 struct Scsi_Host *shost; 6819 struct pqi_ctrl_info *ctrl_info; 6820 6821 shost = class_to_shost(dev); 6822 ctrl_info = shost_to_hba(shost); 6823 6824 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->firmware_version); 6825 } 6826 6827 static ssize_t pqi_driver_version_show(struct device *dev, 6828 struct device_attribute *attr, char *buffer) 6829 { 6830 return scnprintf(buffer, PAGE_SIZE, "%s\n", DRIVER_VERSION BUILD_TIMESTAMP); 6831 } 6832 6833 static ssize_t pqi_serial_number_show(struct device *dev, 6834 struct device_attribute *attr, char *buffer) 6835 { 6836 struct Scsi_Host *shost; 6837 struct pqi_ctrl_info *ctrl_info; 6838 6839 shost = class_to_shost(dev); 6840 ctrl_info = shost_to_hba(shost); 6841 6842 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->serial_number); 6843 } 6844 6845 static ssize_t pqi_model_show(struct device *dev, 6846 struct device_attribute *attr, char *buffer) 6847 { 6848 struct Scsi_Host *shost; 6849 struct pqi_ctrl_info *ctrl_info; 6850 6851 shost = class_to_shost(dev); 6852 ctrl_info = shost_to_hba(shost); 6853 6854 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->model); 6855 } 6856 6857 static ssize_t pqi_vendor_show(struct device *dev, 6858 struct device_attribute *attr, char *buffer) 6859 { 6860 struct Scsi_Host *shost; 6861 struct pqi_ctrl_info *ctrl_info; 6862 6863 shost = class_to_shost(dev); 6864 ctrl_info = shost_to_hba(shost); 6865 6866 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->vendor); 6867 } 6868 6869 static ssize_t pqi_host_rescan_store(struct device *dev, 6870 struct device_attribute *attr, const char *buffer, size_t count) 6871 { 6872 struct Scsi_Host *shost = class_to_shost(dev); 6873 6874 pqi_scan_start(shost); 6875 6876 return count; 6877 } 6878 6879 static ssize_t pqi_lockup_action_show(struct device *dev, 6880 struct device_attribute *attr, char *buffer) 6881 { 6882 int count = 0; 6883 unsigned int i; 6884 6885 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 6886 if (pqi_lockup_actions[i].action == pqi_lockup_action) 6887 count += scnprintf(buffer + count, PAGE_SIZE - count, 6888 "[%s] ", pqi_lockup_actions[i].name); 6889 else 6890 count += scnprintf(buffer + count, PAGE_SIZE - count, 6891 "%s ", pqi_lockup_actions[i].name); 6892 } 6893 6894 count += scnprintf(buffer + count, PAGE_SIZE - count, "\n"); 6895 6896 return count; 6897 } 6898 6899 static ssize_t pqi_lockup_action_store(struct device *dev, 6900 struct device_attribute *attr, const char *buffer, size_t count) 6901 { 6902 unsigned int i; 6903 char *action_name; 6904 char action_name_buffer[32]; 6905 6906 strlcpy(action_name_buffer, buffer, sizeof(action_name_buffer)); 6907 action_name = strstrip(action_name_buffer); 6908 6909 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 6910 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) { 6911 pqi_lockup_action = pqi_lockup_actions[i].action; 6912 return count; 6913 } 6914 } 6915 6916 return -EINVAL; 6917 } 6918 6919 static ssize_t pqi_host_enable_stream_detection_show(struct device *dev, 6920 struct device_attribute *attr, char *buffer) 6921 { 6922 struct Scsi_Host *shost = class_to_shost(dev); 6923 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6924 6925 return scnprintf(buffer, 10, "%x\n", 6926 ctrl_info->enable_stream_detection); 6927 } 6928 6929 static ssize_t pqi_host_enable_stream_detection_store(struct device *dev, 6930 struct device_attribute *attr, const char *buffer, size_t count) 6931 { 6932 struct Scsi_Host *shost = class_to_shost(dev); 6933 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6934 u8 set_stream_detection = 0; 6935 6936 if (kstrtou8(buffer, 0, &set_stream_detection)) 6937 return -EINVAL; 6938 6939 if (set_stream_detection > 0) 6940 set_stream_detection = 1; 6941 6942 ctrl_info->enable_stream_detection = set_stream_detection; 6943 6944 return count; 6945 } 6946 6947 static ssize_t pqi_host_enable_r5_writes_show(struct device *dev, 6948 struct device_attribute *attr, char *buffer) 6949 { 6950 struct Scsi_Host *shost = class_to_shost(dev); 6951 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6952 6953 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r5_writes); 6954 } 6955 6956 static ssize_t pqi_host_enable_r5_writes_store(struct device *dev, 6957 struct device_attribute *attr, const char *buffer, size_t count) 6958 { 6959 struct Scsi_Host *shost = class_to_shost(dev); 6960 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6961 u8 set_r5_writes = 0; 6962 6963 if (kstrtou8(buffer, 0, &set_r5_writes)) 6964 return -EINVAL; 6965 6966 if (set_r5_writes > 0) 6967 set_r5_writes = 1; 6968 6969 ctrl_info->enable_r5_writes = set_r5_writes; 6970 6971 return count; 6972 } 6973 6974 static ssize_t pqi_host_enable_r6_writes_show(struct device *dev, 6975 struct device_attribute *attr, char *buffer) 6976 { 6977 struct Scsi_Host *shost = class_to_shost(dev); 6978 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6979 6980 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r6_writes); 6981 } 6982 6983 static ssize_t pqi_host_enable_r6_writes_store(struct device *dev, 6984 struct device_attribute *attr, const char *buffer, size_t count) 6985 { 6986 struct Scsi_Host *shost = class_to_shost(dev); 6987 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6988 u8 set_r6_writes = 0; 6989 6990 if (kstrtou8(buffer, 0, &set_r6_writes)) 6991 return -EINVAL; 6992 6993 if (set_r6_writes > 0) 6994 set_r6_writes = 1; 6995 6996 ctrl_info->enable_r6_writes = set_r6_writes; 6997 6998 return count; 6999 } 7000 7001 static DEVICE_ATTR(driver_version, 0444, pqi_driver_version_show, NULL); 7002 static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL); 7003 static DEVICE_ATTR(model, 0444, pqi_model_show, NULL); 7004 static DEVICE_ATTR(serial_number, 0444, pqi_serial_number_show, NULL); 7005 static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL); 7006 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store); 7007 static DEVICE_ATTR(lockup_action, 0644, pqi_lockup_action_show, 7008 pqi_lockup_action_store); 7009 static DEVICE_ATTR(enable_stream_detection, 0644, 7010 pqi_host_enable_stream_detection_show, 7011 pqi_host_enable_stream_detection_store); 7012 static DEVICE_ATTR(enable_r5_writes, 0644, 7013 pqi_host_enable_r5_writes_show, pqi_host_enable_r5_writes_store); 7014 static DEVICE_ATTR(enable_r6_writes, 0644, 7015 pqi_host_enable_r6_writes_show, pqi_host_enable_r6_writes_store); 7016 7017 static struct attribute *pqi_shost_attrs[] = { 7018 &dev_attr_driver_version.attr, 7019 &dev_attr_firmware_version.attr, 7020 &dev_attr_model.attr, 7021 &dev_attr_serial_number.attr, 7022 &dev_attr_vendor.attr, 7023 &dev_attr_rescan.attr, 7024 &dev_attr_lockup_action.attr, 7025 &dev_attr_enable_stream_detection.attr, 7026 &dev_attr_enable_r5_writes.attr, 7027 &dev_attr_enable_r6_writes.attr, 7028 NULL 7029 }; 7030 7031 ATTRIBUTE_GROUPS(pqi_shost); 7032 7033 static ssize_t pqi_unique_id_show(struct device *dev, 7034 struct device_attribute *attr, char *buffer) 7035 { 7036 struct pqi_ctrl_info *ctrl_info; 7037 struct scsi_device *sdev; 7038 struct pqi_scsi_dev *device; 7039 unsigned long flags; 7040 u8 unique_id[16]; 7041 7042 sdev = to_scsi_device(dev); 7043 ctrl_info = shost_to_hba(sdev->host); 7044 7045 if (pqi_ctrl_offline(ctrl_info)) 7046 return -ENODEV; 7047 7048 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7049 7050 device = sdev->hostdata; 7051 if (!device) { 7052 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7053 return -ENODEV; 7054 } 7055 7056 if (device->is_physical_device) 7057 memcpy(unique_id, device->wwid, sizeof(device->wwid)); 7058 else 7059 memcpy(unique_id, device->volume_id, sizeof(device->volume_id)); 7060 7061 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7062 7063 return scnprintf(buffer, PAGE_SIZE, 7064 "%02X%02X%02X%02X%02X%02X%02X%02X" 7065 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 7066 unique_id[0], unique_id[1], unique_id[2], unique_id[3], 7067 unique_id[4], unique_id[5], unique_id[6], unique_id[7], 7068 unique_id[8], unique_id[9], unique_id[10], unique_id[11], 7069 unique_id[12], unique_id[13], unique_id[14], unique_id[15]); 7070 } 7071 7072 static ssize_t pqi_lunid_show(struct device *dev, 7073 struct device_attribute *attr, char *buffer) 7074 { 7075 struct pqi_ctrl_info *ctrl_info; 7076 struct scsi_device *sdev; 7077 struct pqi_scsi_dev *device; 7078 unsigned long flags; 7079 u8 lunid[8]; 7080 7081 sdev = to_scsi_device(dev); 7082 ctrl_info = shost_to_hba(sdev->host); 7083 7084 if (pqi_ctrl_offline(ctrl_info)) 7085 return -ENODEV; 7086 7087 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7088 7089 device = sdev->hostdata; 7090 if (!device) { 7091 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7092 return -ENODEV; 7093 } 7094 7095 memcpy(lunid, device->scsi3addr, sizeof(lunid)); 7096 7097 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7098 7099 return scnprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid); 7100 } 7101 7102 #define MAX_PATHS 8 7103 7104 static ssize_t pqi_path_info_show(struct device *dev, 7105 struct device_attribute *attr, char *buf) 7106 { 7107 struct pqi_ctrl_info *ctrl_info; 7108 struct scsi_device *sdev; 7109 struct pqi_scsi_dev *device; 7110 unsigned long flags; 7111 int i; 7112 int output_len = 0; 7113 u8 box; 7114 u8 bay; 7115 u8 path_map_index; 7116 char *active; 7117 u8 phys_connector[2]; 7118 7119 sdev = to_scsi_device(dev); 7120 ctrl_info = shost_to_hba(sdev->host); 7121 7122 if (pqi_ctrl_offline(ctrl_info)) 7123 return -ENODEV; 7124 7125 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7126 7127 device = sdev->hostdata; 7128 if (!device) { 7129 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7130 return -ENODEV; 7131 } 7132 7133 bay = device->bay; 7134 for (i = 0; i < MAX_PATHS; i++) { 7135 path_map_index = 1 << i; 7136 if (i == device->active_path_index) 7137 active = "Active"; 7138 else if (device->path_map & path_map_index) 7139 active = "Inactive"; 7140 else 7141 continue; 7142 7143 output_len += scnprintf(buf + output_len, 7144 PAGE_SIZE - output_len, 7145 "[%d:%d:%d:%d] %20.20s ", 7146 ctrl_info->scsi_host->host_no, 7147 device->bus, device->target, 7148 device->lun, 7149 scsi_device_type(device->devtype)); 7150 7151 if (device->devtype == TYPE_RAID || 7152 pqi_is_logical_device(device)) 7153 goto end_buffer; 7154 7155 memcpy(&phys_connector, &device->phys_connector[i], 7156 sizeof(phys_connector)); 7157 if (phys_connector[0] < '0') 7158 phys_connector[0] = '0'; 7159 if (phys_connector[1] < '0') 7160 phys_connector[1] = '0'; 7161 7162 output_len += scnprintf(buf + output_len, 7163 PAGE_SIZE - output_len, 7164 "PORT: %.2s ", phys_connector); 7165 7166 box = device->box[i]; 7167 if (box != 0 && box != 0xFF) 7168 output_len += scnprintf(buf + output_len, 7169 PAGE_SIZE - output_len, 7170 "BOX: %hhu ", box); 7171 7172 if ((device->devtype == TYPE_DISK || 7173 device->devtype == TYPE_ZBC) && 7174 pqi_expose_device(device)) 7175 output_len += scnprintf(buf + output_len, 7176 PAGE_SIZE - output_len, 7177 "BAY: %hhu ", bay); 7178 7179 end_buffer: 7180 output_len += scnprintf(buf + output_len, 7181 PAGE_SIZE - output_len, 7182 "%s\n", active); 7183 } 7184 7185 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7186 7187 return output_len; 7188 } 7189 7190 static ssize_t pqi_sas_address_show(struct device *dev, 7191 struct device_attribute *attr, char *buffer) 7192 { 7193 struct pqi_ctrl_info *ctrl_info; 7194 struct scsi_device *sdev; 7195 struct pqi_scsi_dev *device; 7196 unsigned long flags; 7197 u64 sas_address; 7198 7199 sdev = to_scsi_device(dev); 7200 ctrl_info = shost_to_hba(sdev->host); 7201 7202 if (pqi_ctrl_offline(ctrl_info)) 7203 return -ENODEV; 7204 7205 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7206 7207 device = sdev->hostdata; 7208 if (!device) { 7209 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7210 return -ENODEV; 7211 } 7212 7213 sas_address = device->sas_address; 7214 7215 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7216 7217 return scnprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address); 7218 } 7219 7220 static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev, 7221 struct device_attribute *attr, char *buffer) 7222 { 7223 struct pqi_ctrl_info *ctrl_info; 7224 struct scsi_device *sdev; 7225 struct pqi_scsi_dev *device; 7226 unsigned long flags; 7227 7228 sdev = to_scsi_device(dev); 7229 ctrl_info = shost_to_hba(sdev->host); 7230 7231 if (pqi_ctrl_offline(ctrl_info)) 7232 return -ENODEV; 7233 7234 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7235 7236 device = sdev->hostdata; 7237 if (!device) { 7238 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7239 return -ENODEV; 7240 } 7241 7242 buffer[0] = device->raid_bypass_enabled ? '1' : '0'; 7243 buffer[1] = '\n'; 7244 buffer[2] = '\0'; 7245 7246 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7247 7248 return 2; 7249 } 7250 7251 static ssize_t pqi_raid_level_show(struct device *dev, 7252 struct device_attribute *attr, char *buffer) 7253 { 7254 struct pqi_ctrl_info *ctrl_info; 7255 struct scsi_device *sdev; 7256 struct pqi_scsi_dev *device; 7257 unsigned long flags; 7258 char *raid_level; 7259 7260 sdev = to_scsi_device(dev); 7261 ctrl_info = shost_to_hba(sdev->host); 7262 7263 if (pqi_ctrl_offline(ctrl_info)) 7264 return -ENODEV; 7265 7266 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7267 7268 device = sdev->hostdata; 7269 if (!device) { 7270 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7271 return -ENODEV; 7272 } 7273 7274 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) 7275 raid_level = pqi_raid_level_to_string(device->raid_level); 7276 else 7277 raid_level = "N/A"; 7278 7279 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7280 7281 return scnprintf(buffer, PAGE_SIZE, "%s\n", raid_level); 7282 } 7283 7284 static ssize_t pqi_raid_bypass_cnt_show(struct device *dev, 7285 struct device_attribute *attr, char *buffer) 7286 { 7287 struct pqi_ctrl_info *ctrl_info; 7288 struct scsi_device *sdev; 7289 struct pqi_scsi_dev *device; 7290 unsigned long flags; 7291 int raid_bypass_cnt; 7292 7293 sdev = to_scsi_device(dev); 7294 ctrl_info = shost_to_hba(sdev->host); 7295 7296 if (pqi_ctrl_offline(ctrl_info)) 7297 return -ENODEV; 7298 7299 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7300 7301 device = sdev->hostdata; 7302 if (!device) { 7303 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7304 return -ENODEV; 7305 } 7306 7307 raid_bypass_cnt = atomic_read(&device->raid_bypass_cnt); 7308 7309 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7310 7311 return scnprintf(buffer, PAGE_SIZE, "0x%x\n", raid_bypass_cnt); 7312 } 7313 7314 static ssize_t pqi_sas_ncq_prio_enable_show(struct device *dev, 7315 struct device_attribute *attr, char *buf) 7316 { 7317 struct pqi_ctrl_info *ctrl_info; 7318 struct scsi_device *sdev; 7319 struct pqi_scsi_dev *device; 7320 unsigned long flags; 7321 int output_len = 0; 7322 7323 sdev = to_scsi_device(dev); 7324 ctrl_info = shost_to_hba(sdev->host); 7325 7326 if (pqi_ctrl_offline(ctrl_info)) 7327 return -ENODEV; 7328 7329 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7330 7331 device = sdev->hostdata; 7332 if (!device) { 7333 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7334 return -ENODEV; 7335 } 7336 7337 output_len = snprintf(buf, PAGE_SIZE, "%d\n", 7338 device->ncq_prio_enable); 7339 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7340 7341 return output_len; 7342 } 7343 7344 static ssize_t pqi_sas_ncq_prio_enable_store(struct device *dev, 7345 struct device_attribute *attr, 7346 const char *buf, size_t count) 7347 { 7348 struct pqi_ctrl_info *ctrl_info; 7349 struct scsi_device *sdev; 7350 struct pqi_scsi_dev *device; 7351 unsigned long flags; 7352 u8 ncq_prio_enable = 0; 7353 7354 if (kstrtou8(buf, 0, &ncq_prio_enable)) 7355 return -EINVAL; 7356 7357 sdev = to_scsi_device(dev); 7358 ctrl_info = shost_to_hba(sdev->host); 7359 7360 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7361 7362 device = sdev->hostdata; 7363 7364 if (!device) { 7365 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7366 return -ENODEV; 7367 } 7368 7369 if (!device->ncq_prio_support || 7370 !device->is_physical_device) { 7371 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7372 return -EINVAL; 7373 } 7374 7375 device->ncq_prio_enable = ncq_prio_enable; 7376 7377 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7378 7379 return strlen(buf); 7380 } 7381 7382 static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL); 7383 static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL); 7384 static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL); 7385 static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL); 7386 static DEVICE_ATTR(ssd_smart_path_enabled, 0444, pqi_ssd_smart_path_enabled_show, NULL); 7387 static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL); 7388 static DEVICE_ATTR(raid_bypass_cnt, 0444, pqi_raid_bypass_cnt_show, NULL); 7389 static DEVICE_ATTR(sas_ncq_prio_enable, 0644, 7390 pqi_sas_ncq_prio_enable_show, pqi_sas_ncq_prio_enable_store); 7391 7392 static struct attribute *pqi_sdev_attrs[] = { 7393 &dev_attr_lunid.attr, 7394 &dev_attr_unique_id.attr, 7395 &dev_attr_path_info.attr, 7396 &dev_attr_sas_address.attr, 7397 &dev_attr_ssd_smart_path_enabled.attr, 7398 &dev_attr_raid_level.attr, 7399 &dev_attr_raid_bypass_cnt.attr, 7400 &dev_attr_sas_ncq_prio_enable.attr, 7401 NULL 7402 }; 7403 7404 ATTRIBUTE_GROUPS(pqi_sdev); 7405 7406 static struct scsi_host_template pqi_driver_template = { 7407 .module = THIS_MODULE, 7408 .name = DRIVER_NAME_SHORT, 7409 .proc_name = DRIVER_NAME_SHORT, 7410 .queuecommand = pqi_scsi_queue_command, 7411 .scan_start = pqi_scan_start, 7412 .scan_finished = pqi_scan_finished, 7413 .this_id = -1, 7414 .eh_device_reset_handler = pqi_eh_device_reset_handler, 7415 .ioctl = pqi_ioctl, 7416 .slave_alloc = pqi_slave_alloc, 7417 .slave_configure = pqi_slave_configure, 7418 .slave_destroy = pqi_slave_destroy, 7419 .map_queues = pqi_map_queues, 7420 .sdev_groups = pqi_sdev_groups, 7421 .shost_groups = pqi_shost_groups, 7422 .cmd_size = sizeof(struct pqi_cmd_priv), 7423 }; 7424 7425 static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info) 7426 { 7427 int rc; 7428 struct Scsi_Host *shost; 7429 7430 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info)); 7431 if (!shost) { 7432 dev_err(&ctrl_info->pci_dev->dev, "scsi_host_alloc failed\n"); 7433 return -ENOMEM; 7434 } 7435 7436 shost->io_port = 0; 7437 shost->n_io_port = 0; 7438 shost->this_id = -1; 7439 shost->max_channel = PQI_MAX_BUS; 7440 shost->max_cmd_len = MAX_COMMAND_SIZE; 7441 shost->max_lun = PQI_MAX_LUNS_PER_DEVICE; 7442 shost->max_id = ~0; 7443 shost->max_sectors = ctrl_info->max_sectors; 7444 shost->can_queue = ctrl_info->scsi_ml_can_queue; 7445 shost->cmd_per_lun = shost->can_queue; 7446 shost->sg_tablesize = ctrl_info->sg_tablesize; 7447 shost->transportt = pqi_sas_transport_template; 7448 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0); 7449 shost->unique_id = shost->irq; 7450 shost->nr_hw_queues = ctrl_info->num_queue_groups; 7451 shost->host_tagset = 1; 7452 shost->hostdata[0] = (unsigned long)ctrl_info; 7453 7454 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev); 7455 if (rc) { 7456 dev_err(&ctrl_info->pci_dev->dev, "scsi_add_host failed\n"); 7457 goto free_host; 7458 } 7459 7460 rc = pqi_add_sas_host(shost, ctrl_info); 7461 if (rc) { 7462 dev_err(&ctrl_info->pci_dev->dev, "add SAS host failed\n"); 7463 goto remove_host; 7464 } 7465 7466 ctrl_info->scsi_host = shost; 7467 7468 return 0; 7469 7470 remove_host: 7471 scsi_remove_host(shost); 7472 free_host: 7473 scsi_host_put(shost); 7474 7475 return rc; 7476 } 7477 7478 static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info) 7479 { 7480 struct Scsi_Host *shost; 7481 7482 pqi_delete_sas_host(ctrl_info); 7483 7484 shost = ctrl_info->scsi_host; 7485 if (!shost) 7486 return; 7487 7488 scsi_remove_host(shost); 7489 scsi_host_put(shost); 7490 } 7491 7492 static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info) 7493 { 7494 int rc = 0; 7495 struct pqi_device_registers __iomem *pqi_registers; 7496 unsigned long timeout; 7497 unsigned int timeout_msecs; 7498 union pqi_reset_register reset_reg; 7499 7500 pqi_registers = ctrl_info->pqi_registers; 7501 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100; 7502 timeout = msecs_to_jiffies(timeout_msecs) + jiffies; 7503 7504 while (1) { 7505 msleep(PQI_RESET_POLL_INTERVAL_MSECS); 7506 reset_reg.all_bits = readl(&pqi_registers->device_reset); 7507 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED) 7508 break; 7509 if (!sis_is_firmware_running(ctrl_info)) { 7510 rc = -ENXIO; 7511 break; 7512 } 7513 if (time_after(jiffies, timeout)) { 7514 rc = -ETIMEDOUT; 7515 break; 7516 } 7517 } 7518 7519 return rc; 7520 } 7521 7522 static int pqi_reset(struct pqi_ctrl_info *ctrl_info) 7523 { 7524 int rc; 7525 union pqi_reset_register reset_reg; 7526 7527 if (ctrl_info->pqi_reset_quiesce_supported) { 7528 rc = sis_pqi_reset_quiesce(ctrl_info); 7529 if (rc) { 7530 dev_err(&ctrl_info->pci_dev->dev, 7531 "PQI reset failed during quiesce with error %d\n", rc); 7532 return rc; 7533 } 7534 } 7535 7536 reset_reg.all_bits = 0; 7537 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET; 7538 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET; 7539 7540 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset); 7541 7542 rc = pqi_wait_for_pqi_reset_completion(ctrl_info); 7543 if (rc) 7544 dev_err(&ctrl_info->pci_dev->dev, 7545 "PQI reset failed with error %d\n", rc); 7546 7547 return rc; 7548 } 7549 7550 static int pqi_get_ctrl_serial_number(struct pqi_ctrl_info *ctrl_info) 7551 { 7552 int rc; 7553 struct bmic_sense_subsystem_info *sense_info; 7554 7555 sense_info = kzalloc(sizeof(*sense_info), GFP_KERNEL); 7556 if (!sense_info) 7557 return -ENOMEM; 7558 7559 rc = pqi_sense_subsystem_info(ctrl_info, sense_info); 7560 if (rc) 7561 goto out; 7562 7563 memcpy(ctrl_info->serial_number, sense_info->ctrl_serial_number, 7564 sizeof(sense_info->ctrl_serial_number)); 7565 ctrl_info->serial_number[sizeof(sense_info->ctrl_serial_number)] = '\0'; 7566 7567 out: 7568 kfree(sense_info); 7569 7570 return rc; 7571 } 7572 7573 static int pqi_get_ctrl_product_details(struct pqi_ctrl_info *ctrl_info) 7574 { 7575 int rc; 7576 struct bmic_identify_controller *identify; 7577 7578 identify = kmalloc(sizeof(*identify), GFP_KERNEL); 7579 if (!identify) 7580 return -ENOMEM; 7581 7582 rc = pqi_identify_controller(ctrl_info, identify); 7583 if (rc) 7584 goto out; 7585 7586 if (get_unaligned_le32(&identify->extra_controller_flags) & 7587 BMIC_IDENTIFY_EXTRA_FLAGS_LONG_FW_VERSION_SUPPORTED) { 7588 memcpy(ctrl_info->firmware_version, 7589 identify->firmware_version_long, 7590 sizeof(identify->firmware_version_long)); 7591 } else { 7592 memcpy(ctrl_info->firmware_version, 7593 identify->firmware_version_short, 7594 sizeof(identify->firmware_version_short)); 7595 ctrl_info->firmware_version 7596 [sizeof(identify->firmware_version_short)] = '\0'; 7597 snprintf(ctrl_info->firmware_version + 7598 strlen(ctrl_info->firmware_version), 7599 sizeof(ctrl_info->firmware_version) - 7600 sizeof(identify->firmware_version_short), 7601 "-%u", 7602 get_unaligned_le16(&identify->firmware_build_number)); 7603 } 7604 7605 memcpy(ctrl_info->model, identify->product_id, 7606 sizeof(identify->product_id)); 7607 ctrl_info->model[sizeof(identify->product_id)] = '\0'; 7608 7609 memcpy(ctrl_info->vendor, identify->vendor_id, 7610 sizeof(identify->vendor_id)); 7611 ctrl_info->vendor[sizeof(identify->vendor_id)] = '\0'; 7612 7613 dev_info(&ctrl_info->pci_dev->dev, 7614 "Firmware version: %s\n", ctrl_info->firmware_version); 7615 7616 out: 7617 kfree(identify); 7618 7619 return rc; 7620 } 7621 7622 struct pqi_config_table_section_info { 7623 struct pqi_ctrl_info *ctrl_info; 7624 void *section; 7625 u32 section_offset; 7626 void __iomem *section_iomem_addr; 7627 }; 7628 7629 static inline bool pqi_is_firmware_feature_supported( 7630 struct pqi_config_table_firmware_features *firmware_features, 7631 unsigned int bit_position) 7632 { 7633 unsigned int byte_index; 7634 7635 byte_index = bit_position / BITS_PER_BYTE; 7636 7637 if (byte_index >= le16_to_cpu(firmware_features->num_elements)) 7638 return false; 7639 7640 return firmware_features->features_supported[byte_index] & 7641 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 7642 } 7643 7644 static inline bool pqi_is_firmware_feature_enabled( 7645 struct pqi_config_table_firmware_features *firmware_features, 7646 void __iomem *firmware_features_iomem_addr, 7647 unsigned int bit_position) 7648 { 7649 unsigned int byte_index; 7650 u8 __iomem *features_enabled_iomem_addr; 7651 7652 byte_index = (bit_position / BITS_PER_BYTE) + 7653 (le16_to_cpu(firmware_features->num_elements) * 2); 7654 7655 features_enabled_iomem_addr = firmware_features_iomem_addr + 7656 offsetof(struct pqi_config_table_firmware_features, 7657 features_supported) + byte_index; 7658 7659 return *((__force u8 *)features_enabled_iomem_addr) & 7660 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 7661 } 7662 7663 static inline void pqi_request_firmware_feature( 7664 struct pqi_config_table_firmware_features *firmware_features, 7665 unsigned int bit_position) 7666 { 7667 unsigned int byte_index; 7668 7669 byte_index = (bit_position / BITS_PER_BYTE) + 7670 le16_to_cpu(firmware_features->num_elements); 7671 7672 firmware_features->features_supported[byte_index] |= 7673 (1 << (bit_position % BITS_PER_BYTE)); 7674 } 7675 7676 static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info, 7677 u16 first_section, u16 last_section) 7678 { 7679 struct pqi_vendor_general_request request; 7680 7681 memset(&request, 0, sizeof(request)); 7682 7683 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 7684 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 7685 &request.header.iu_length); 7686 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE, 7687 &request.function_code); 7688 put_unaligned_le16(first_section, 7689 &request.data.config_table_update.first_section); 7690 put_unaligned_le16(last_section, 7691 &request.data.config_table_update.last_section); 7692 7693 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 7694 } 7695 7696 static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info, 7697 struct pqi_config_table_firmware_features *firmware_features, 7698 void __iomem *firmware_features_iomem_addr) 7699 { 7700 void *features_requested; 7701 void __iomem *features_requested_iomem_addr; 7702 void __iomem *host_max_known_feature_iomem_addr; 7703 7704 features_requested = firmware_features->features_supported + 7705 le16_to_cpu(firmware_features->num_elements); 7706 7707 features_requested_iomem_addr = firmware_features_iomem_addr + 7708 (features_requested - (void *)firmware_features); 7709 7710 memcpy_toio(features_requested_iomem_addr, features_requested, 7711 le16_to_cpu(firmware_features->num_elements)); 7712 7713 if (pqi_is_firmware_feature_supported(firmware_features, 7714 PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE)) { 7715 host_max_known_feature_iomem_addr = 7716 features_requested_iomem_addr + 7717 (le16_to_cpu(firmware_features->num_elements) * 2) + 7718 sizeof(__le16); 7719 writew(PQI_FIRMWARE_FEATURE_MAXIMUM, 7720 host_max_known_feature_iomem_addr); 7721 } 7722 7723 return pqi_config_table_update(ctrl_info, 7724 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES, 7725 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES); 7726 } 7727 7728 struct pqi_firmware_feature { 7729 char *feature_name; 7730 unsigned int feature_bit; 7731 bool supported; 7732 bool enabled; 7733 void (*feature_status)(struct pqi_ctrl_info *ctrl_info, 7734 struct pqi_firmware_feature *firmware_feature); 7735 }; 7736 7737 static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info, 7738 struct pqi_firmware_feature *firmware_feature) 7739 { 7740 if (!firmware_feature->supported) { 7741 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n", 7742 firmware_feature->feature_name); 7743 return; 7744 } 7745 7746 if (firmware_feature->enabled) { 7747 dev_info(&ctrl_info->pci_dev->dev, 7748 "%s enabled\n", firmware_feature->feature_name); 7749 return; 7750 } 7751 7752 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n", 7753 firmware_feature->feature_name); 7754 } 7755 7756 static void pqi_ctrl_update_feature_flags(struct pqi_ctrl_info *ctrl_info, 7757 struct pqi_firmware_feature *firmware_feature) 7758 { 7759 switch (firmware_feature->feature_bit) { 7760 case PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS: 7761 ctrl_info->enable_r1_writes = firmware_feature->enabled; 7762 break; 7763 case PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS: 7764 ctrl_info->enable_r5_writes = firmware_feature->enabled; 7765 break; 7766 case PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS: 7767 ctrl_info->enable_r6_writes = firmware_feature->enabled; 7768 break; 7769 case PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE: 7770 ctrl_info->soft_reset_handshake_supported = 7771 firmware_feature->enabled && 7772 pqi_read_soft_reset_status(ctrl_info); 7773 break; 7774 case PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT: 7775 ctrl_info->raid_iu_timeout_supported = firmware_feature->enabled; 7776 break; 7777 case PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT: 7778 ctrl_info->tmf_iu_timeout_supported = firmware_feature->enabled; 7779 break; 7780 case PQI_FIRMWARE_FEATURE_FW_TRIAGE: 7781 ctrl_info->firmware_triage_supported = firmware_feature->enabled; 7782 pqi_save_fw_triage_setting(ctrl_info, firmware_feature->enabled); 7783 break; 7784 case PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5: 7785 ctrl_info->rpl_extended_format_4_5_supported = firmware_feature->enabled; 7786 break; 7787 case PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT: 7788 ctrl_info->multi_lun_device_supported = firmware_feature->enabled; 7789 break; 7790 } 7791 7792 pqi_firmware_feature_status(ctrl_info, firmware_feature); 7793 } 7794 7795 static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info, 7796 struct pqi_firmware_feature *firmware_feature) 7797 { 7798 if (firmware_feature->feature_status) 7799 firmware_feature->feature_status(ctrl_info, firmware_feature); 7800 } 7801 7802 static DEFINE_MUTEX(pqi_firmware_features_mutex); 7803 7804 static struct pqi_firmware_feature pqi_firmware_features[] = { 7805 { 7806 .feature_name = "Online Firmware Activation", 7807 .feature_bit = PQI_FIRMWARE_FEATURE_OFA, 7808 .feature_status = pqi_firmware_feature_status, 7809 }, 7810 { 7811 .feature_name = "Serial Management Protocol", 7812 .feature_bit = PQI_FIRMWARE_FEATURE_SMP, 7813 .feature_status = pqi_firmware_feature_status, 7814 }, 7815 { 7816 .feature_name = "Maximum Known Feature", 7817 .feature_bit = PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE, 7818 .feature_status = pqi_firmware_feature_status, 7819 }, 7820 { 7821 .feature_name = "RAID 0 Read Bypass", 7822 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS, 7823 .feature_status = pqi_firmware_feature_status, 7824 }, 7825 { 7826 .feature_name = "RAID 1 Read Bypass", 7827 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS, 7828 .feature_status = pqi_firmware_feature_status, 7829 }, 7830 { 7831 .feature_name = "RAID 5 Read Bypass", 7832 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS, 7833 .feature_status = pqi_firmware_feature_status, 7834 }, 7835 { 7836 .feature_name = "RAID 6 Read Bypass", 7837 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS, 7838 .feature_status = pqi_firmware_feature_status, 7839 }, 7840 { 7841 .feature_name = "RAID 0 Write Bypass", 7842 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS, 7843 .feature_status = pqi_firmware_feature_status, 7844 }, 7845 { 7846 .feature_name = "RAID 1 Write Bypass", 7847 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS, 7848 .feature_status = pqi_ctrl_update_feature_flags, 7849 }, 7850 { 7851 .feature_name = "RAID 5 Write Bypass", 7852 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS, 7853 .feature_status = pqi_ctrl_update_feature_flags, 7854 }, 7855 { 7856 .feature_name = "RAID 6 Write Bypass", 7857 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS, 7858 .feature_status = pqi_ctrl_update_feature_flags, 7859 }, 7860 { 7861 .feature_name = "New Soft Reset Handshake", 7862 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE, 7863 .feature_status = pqi_ctrl_update_feature_flags, 7864 }, 7865 { 7866 .feature_name = "RAID IU Timeout", 7867 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT, 7868 .feature_status = pqi_ctrl_update_feature_flags, 7869 }, 7870 { 7871 .feature_name = "TMF IU Timeout", 7872 .feature_bit = PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT, 7873 .feature_status = pqi_ctrl_update_feature_flags, 7874 }, 7875 { 7876 .feature_name = "RAID Bypass on encrypted logical volumes on NVMe", 7877 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME, 7878 .feature_status = pqi_firmware_feature_status, 7879 }, 7880 { 7881 .feature_name = "Firmware Triage", 7882 .feature_bit = PQI_FIRMWARE_FEATURE_FW_TRIAGE, 7883 .feature_status = pqi_ctrl_update_feature_flags, 7884 }, 7885 { 7886 .feature_name = "RPL Extended Formats 4 and 5", 7887 .feature_bit = PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5, 7888 .feature_status = pqi_ctrl_update_feature_flags, 7889 }, 7890 { 7891 .feature_name = "Multi-LUN Target", 7892 .feature_bit = PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT, 7893 .feature_status = pqi_ctrl_update_feature_flags, 7894 }, 7895 }; 7896 7897 static void pqi_process_firmware_features( 7898 struct pqi_config_table_section_info *section_info) 7899 { 7900 int rc; 7901 struct pqi_ctrl_info *ctrl_info; 7902 struct pqi_config_table_firmware_features *firmware_features; 7903 void __iomem *firmware_features_iomem_addr; 7904 unsigned int i; 7905 unsigned int num_features_supported; 7906 7907 ctrl_info = section_info->ctrl_info; 7908 firmware_features = section_info->section; 7909 firmware_features_iomem_addr = section_info->section_iomem_addr; 7910 7911 for (i = 0, num_features_supported = 0; 7912 i < ARRAY_SIZE(pqi_firmware_features); i++) { 7913 if (pqi_is_firmware_feature_supported(firmware_features, 7914 pqi_firmware_features[i].feature_bit)) { 7915 pqi_firmware_features[i].supported = true; 7916 num_features_supported++; 7917 } else { 7918 pqi_firmware_feature_update(ctrl_info, 7919 &pqi_firmware_features[i]); 7920 } 7921 } 7922 7923 if (num_features_supported == 0) 7924 return; 7925 7926 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 7927 if (!pqi_firmware_features[i].supported) 7928 continue; 7929 pqi_request_firmware_feature(firmware_features, 7930 pqi_firmware_features[i].feature_bit); 7931 } 7932 7933 rc = pqi_enable_firmware_features(ctrl_info, firmware_features, 7934 firmware_features_iomem_addr); 7935 if (rc) { 7936 dev_err(&ctrl_info->pci_dev->dev, 7937 "failed to enable firmware features in PQI configuration table\n"); 7938 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 7939 if (!pqi_firmware_features[i].supported) 7940 continue; 7941 pqi_firmware_feature_update(ctrl_info, 7942 &pqi_firmware_features[i]); 7943 } 7944 return; 7945 } 7946 7947 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 7948 if (!pqi_firmware_features[i].supported) 7949 continue; 7950 if (pqi_is_firmware_feature_enabled(firmware_features, 7951 firmware_features_iomem_addr, 7952 pqi_firmware_features[i].feature_bit)) { 7953 pqi_firmware_features[i].enabled = true; 7954 } 7955 pqi_firmware_feature_update(ctrl_info, 7956 &pqi_firmware_features[i]); 7957 } 7958 } 7959 7960 static void pqi_init_firmware_features(void) 7961 { 7962 unsigned int i; 7963 7964 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 7965 pqi_firmware_features[i].supported = false; 7966 pqi_firmware_features[i].enabled = false; 7967 } 7968 } 7969 7970 static void pqi_process_firmware_features_section( 7971 struct pqi_config_table_section_info *section_info) 7972 { 7973 mutex_lock(&pqi_firmware_features_mutex); 7974 pqi_init_firmware_features(); 7975 pqi_process_firmware_features(section_info); 7976 mutex_unlock(&pqi_firmware_features_mutex); 7977 } 7978 7979 /* 7980 * Reset all controller settings that can be initialized during the processing 7981 * of the PQI Configuration Table. 7982 */ 7983 7984 static void pqi_ctrl_reset_config(struct pqi_ctrl_info *ctrl_info) 7985 { 7986 ctrl_info->heartbeat_counter = NULL; 7987 ctrl_info->soft_reset_status = NULL; 7988 ctrl_info->soft_reset_handshake_supported = false; 7989 ctrl_info->enable_r1_writes = false; 7990 ctrl_info->enable_r5_writes = false; 7991 ctrl_info->enable_r6_writes = false; 7992 ctrl_info->raid_iu_timeout_supported = false; 7993 ctrl_info->tmf_iu_timeout_supported = false; 7994 ctrl_info->firmware_triage_supported = false; 7995 ctrl_info->rpl_extended_format_4_5_supported = false; 7996 ctrl_info->multi_lun_device_supported = false; 7997 } 7998 7999 static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info) 8000 { 8001 u32 table_length; 8002 u32 section_offset; 8003 bool firmware_feature_section_present; 8004 void __iomem *table_iomem_addr; 8005 struct pqi_config_table *config_table; 8006 struct pqi_config_table_section_header *section; 8007 struct pqi_config_table_section_info section_info; 8008 struct pqi_config_table_section_info feature_section_info = {0}; 8009 8010 table_length = ctrl_info->config_table_length; 8011 if (table_length == 0) 8012 return 0; 8013 8014 config_table = kmalloc(table_length, GFP_KERNEL); 8015 if (!config_table) { 8016 dev_err(&ctrl_info->pci_dev->dev, 8017 "failed to allocate memory for PQI configuration table\n"); 8018 return -ENOMEM; 8019 } 8020 8021 /* 8022 * Copy the config table contents from I/O memory space into the 8023 * temporary buffer. 8024 */ 8025 table_iomem_addr = ctrl_info->iomem_base + ctrl_info->config_table_offset; 8026 memcpy_fromio(config_table, table_iomem_addr, table_length); 8027 8028 firmware_feature_section_present = false; 8029 section_info.ctrl_info = ctrl_info; 8030 section_offset = get_unaligned_le32(&config_table->first_section_offset); 8031 8032 while (section_offset) { 8033 section = (void *)config_table + section_offset; 8034 8035 section_info.section = section; 8036 section_info.section_offset = section_offset; 8037 section_info.section_iomem_addr = table_iomem_addr + section_offset; 8038 8039 switch (get_unaligned_le16(§ion->section_id)) { 8040 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES: 8041 firmware_feature_section_present = true; 8042 feature_section_info = section_info; 8043 break; 8044 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT: 8045 if (pqi_disable_heartbeat) 8046 dev_warn(&ctrl_info->pci_dev->dev, 8047 "heartbeat disabled by module parameter\n"); 8048 else 8049 ctrl_info->heartbeat_counter = 8050 table_iomem_addr + 8051 section_offset + 8052 offsetof(struct pqi_config_table_heartbeat, 8053 heartbeat_counter); 8054 break; 8055 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET: 8056 ctrl_info->soft_reset_status = 8057 table_iomem_addr + 8058 section_offset + 8059 offsetof(struct pqi_config_table_soft_reset, 8060 soft_reset_status); 8061 break; 8062 } 8063 8064 section_offset = get_unaligned_le16(§ion->next_section_offset); 8065 } 8066 8067 /* 8068 * We process the firmware feature section after all other sections 8069 * have been processed so that the feature bit callbacks can take 8070 * into account the settings configured by other sections. 8071 */ 8072 if (firmware_feature_section_present) 8073 pqi_process_firmware_features_section(&feature_section_info); 8074 8075 kfree(config_table); 8076 8077 return 0; 8078 } 8079 8080 /* Switches the controller from PQI mode back into SIS mode. */ 8081 8082 static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info) 8083 { 8084 int rc; 8085 8086 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE); 8087 rc = pqi_reset(ctrl_info); 8088 if (rc) 8089 return rc; 8090 rc = sis_reenable_sis_mode(ctrl_info); 8091 if (rc) { 8092 dev_err(&ctrl_info->pci_dev->dev, 8093 "re-enabling SIS mode failed with error %d\n", rc); 8094 return rc; 8095 } 8096 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 8097 8098 return 0; 8099 } 8100 8101 /* 8102 * If the controller isn't already in SIS mode, this function forces it into 8103 * SIS mode. 8104 */ 8105 8106 static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info) 8107 { 8108 if (!sis_is_firmware_running(ctrl_info)) 8109 return -ENXIO; 8110 8111 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE) 8112 return 0; 8113 8114 if (sis_is_kernel_up(ctrl_info)) { 8115 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 8116 return 0; 8117 } 8118 8119 return pqi_revert_to_sis_mode(ctrl_info); 8120 } 8121 8122 static void pqi_perform_lockup_action(void) 8123 { 8124 switch (pqi_lockup_action) { 8125 case PANIC: 8126 panic("FATAL: Smart Family Controller lockup detected"); 8127 break; 8128 case REBOOT: 8129 emergency_restart(); 8130 break; 8131 case NONE: 8132 default: 8133 break; 8134 } 8135 } 8136 8137 static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info) 8138 { 8139 int rc; 8140 u32 product_id; 8141 8142 if (reset_devices) { 8143 if (pqi_is_fw_triage_supported(ctrl_info)) { 8144 rc = sis_wait_for_fw_triage_completion(ctrl_info); 8145 if (rc) 8146 return rc; 8147 } 8148 sis_soft_reset(ctrl_info); 8149 ssleep(PQI_POST_RESET_DELAY_SECS); 8150 } else { 8151 rc = pqi_force_sis_mode(ctrl_info); 8152 if (rc) 8153 return rc; 8154 } 8155 8156 /* 8157 * Wait until the controller is ready to start accepting SIS 8158 * commands. 8159 */ 8160 rc = sis_wait_for_ctrl_ready(ctrl_info); 8161 if (rc) { 8162 if (reset_devices) { 8163 dev_err(&ctrl_info->pci_dev->dev, 8164 "kdump init failed with error %d\n", rc); 8165 pqi_lockup_action = REBOOT; 8166 pqi_perform_lockup_action(); 8167 } 8168 return rc; 8169 } 8170 8171 /* 8172 * Get the controller properties. This allows us to determine 8173 * whether or not it supports PQI mode. 8174 */ 8175 rc = sis_get_ctrl_properties(ctrl_info); 8176 if (rc) { 8177 dev_err(&ctrl_info->pci_dev->dev, 8178 "error obtaining controller properties\n"); 8179 return rc; 8180 } 8181 8182 rc = sis_get_pqi_capabilities(ctrl_info); 8183 if (rc) { 8184 dev_err(&ctrl_info->pci_dev->dev, 8185 "error obtaining controller capabilities\n"); 8186 return rc; 8187 } 8188 8189 product_id = sis_get_product_id(ctrl_info); 8190 ctrl_info->product_id = (u8)product_id; 8191 ctrl_info->product_revision = (u8)(product_id >> 8); 8192 8193 if (reset_devices) { 8194 if (ctrl_info->max_outstanding_requests > 8195 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP) 8196 ctrl_info->max_outstanding_requests = 8197 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP; 8198 } else { 8199 if (ctrl_info->max_outstanding_requests > 8200 PQI_MAX_OUTSTANDING_REQUESTS) 8201 ctrl_info->max_outstanding_requests = 8202 PQI_MAX_OUTSTANDING_REQUESTS; 8203 } 8204 8205 pqi_calculate_io_resources(ctrl_info); 8206 8207 rc = pqi_alloc_error_buffer(ctrl_info); 8208 if (rc) { 8209 dev_err(&ctrl_info->pci_dev->dev, 8210 "failed to allocate PQI error buffer\n"); 8211 return rc; 8212 } 8213 8214 /* 8215 * If the function we are about to call succeeds, the 8216 * controller will transition from legacy SIS mode 8217 * into PQI mode. 8218 */ 8219 rc = sis_init_base_struct_addr(ctrl_info); 8220 if (rc) { 8221 dev_err(&ctrl_info->pci_dev->dev, 8222 "error initializing PQI mode\n"); 8223 return rc; 8224 } 8225 8226 /* Wait for the controller to complete the SIS -> PQI transition. */ 8227 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 8228 if (rc) { 8229 dev_err(&ctrl_info->pci_dev->dev, 8230 "transition to PQI mode failed\n"); 8231 return rc; 8232 } 8233 8234 /* From here on, we are running in PQI mode. */ 8235 ctrl_info->pqi_mode_enabled = true; 8236 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 8237 8238 rc = pqi_alloc_admin_queues(ctrl_info); 8239 if (rc) { 8240 dev_err(&ctrl_info->pci_dev->dev, 8241 "failed to allocate admin queues\n"); 8242 return rc; 8243 } 8244 8245 rc = pqi_create_admin_queues(ctrl_info); 8246 if (rc) { 8247 dev_err(&ctrl_info->pci_dev->dev, 8248 "error creating admin queues\n"); 8249 return rc; 8250 } 8251 8252 rc = pqi_report_device_capability(ctrl_info); 8253 if (rc) { 8254 dev_err(&ctrl_info->pci_dev->dev, 8255 "obtaining device capability failed\n"); 8256 return rc; 8257 } 8258 8259 rc = pqi_validate_device_capability(ctrl_info); 8260 if (rc) 8261 return rc; 8262 8263 pqi_calculate_queue_resources(ctrl_info); 8264 8265 rc = pqi_enable_msix_interrupts(ctrl_info); 8266 if (rc) 8267 return rc; 8268 8269 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) { 8270 ctrl_info->max_msix_vectors = 8271 ctrl_info->num_msix_vectors_enabled; 8272 pqi_calculate_queue_resources(ctrl_info); 8273 } 8274 8275 rc = pqi_alloc_io_resources(ctrl_info); 8276 if (rc) 8277 return rc; 8278 8279 rc = pqi_alloc_operational_queues(ctrl_info); 8280 if (rc) { 8281 dev_err(&ctrl_info->pci_dev->dev, 8282 "failed to allocate operational queues\n"); 8283 return rc; 8284 } 8285 8286 pqi_init_operational_queues(ctrl_info); 8287 8288 rc = pqi_create_queues(ctrl_info); 8289 if (rc) 8290 return rc; 8291 8292 rc = pqi_request_irqs(ctrl_info); 8293 if (rc) 8294 return rc; 8295 8296 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 8297 8298 ctrl_info->controller_online = true; 8299 8300 rc = pqi_process_config_table(ctrl_info); 8301 if (rc) 8302 return rc; 8303 8304 pqi_start_heartbeat_timer(ctrl_info); 8305 8306 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) { 8307 rc = pqi_get_advanced_raid_bypass_config(ctrl_info); 8308 if (rc) { /* Supported features not returned correctly. */ 8309 dev_err(&ctrl_info->pci_dev->dev, 8310 "error obtaining advanced RAID bypass configuration\n"); 8311 return rc; 8312 } 8313 ctrl_info->ciss_report_log_flags |= 8314 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX; 8315 } 8316 8317 rc = pqi_enable_events(ctrl_info); 8318 if (rc) { 8319 dev_err(&ctrl_info->pci_dev->dev, 8320 "error enabling events\n"); 8321 return rc; 8322 } 8323 8324 /* Register with the SCSI subsystem. */ 8325 rc = pqi_register_scsi(ctrl_info); 8326 if (rc) 8327 return rc; 8328 8329 rc = pqi_get_ctrl_product_details(ctrl_info); 8330 if (rc) { 8331 dev_err(&ctrl_info->pci_dev->dev, 8332 "error obtaining product details\n"); 8333 return rc; 8334 } 8335 8336 rc = pqi_get_ctrl_serial_number(ctrl_info); 8337 if (rc) { 8338 dev_err(&ctrl_info->pci_dev->dev, 8339 "error obtaining ctrl serial number\n"); 8340 return rc; 8341 } 8342 8343 rc = pqi_set_diag_rescan(ctrl_info); 8344 if (rc) { 8345 dev_err(&ctrl_info->pci_dev->dev, 8346 "error enabling multi-lun rescan\n"); 8347 return rc; 8348 } 8349 8350 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 8351 if (rc) { 8352 dev_err(&ctrl_info->pci_dev->dev, 8353 "error updating host wellness\n"); 8354 return rc; 8355 } 8356 8357 pqi_schedule_update_time_worker(ctrl_info); 8358 8359 pqi_scan_scsi_devices(ctrl_info); 8360 8361 return 0; 8362 } 8363 8364 static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info) 8365 { 8366 unsigned int i; 8367 struct pqi_admin_queues *admin_queues; 8368 struct pqi_event_queue *event_queue; 8369 8370 admin_queues = &ctrl_info->admin_queues; 8371 admin_queues->iq_pi_copy = 0; 8372 admin_queues->oq_ci_copy = 0; 8373 writel(0, admin_queues->oq_pi); 8374 8375 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 8376 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0; 8377 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0; 8378 ctrl_info->queue_groups[i].oq_ci_copy = 0; 8379 8380 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]); 8381 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]); 8382 writel(0, ctrl_info->queue_groups[i].oq_pi); 8383 } 8384 8385 event_queue = &ctrl_info->event_queue; 8386 writel(0, event_queue->oq_pi); 8387 event_queue->oq_ci_copy = 0; 8388 } 8389 8390 static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info) 8391 { 8392 int rc; 8393 8394 rc = pqi_force_sis_mode(ctrl_info); 8395 if (rc) 8396 return rc; 8397 8398 /* 8399 * Wait until the controller is ready to start accepting SIS 8400 * commands. 8401 */ 8402 rc = sis_wait_for_ctrl_ready_resume(ctrl_info); 8403 if (rc) 8404 return rc; 8405 8406 /* 8407 * Get the controller properties. This allows us to determine 8408 * whether or not it supports PQI mode. 8409 */ 8410 rc = sis_get_ctrl_properties(ctrl_info); 8411 if (rc) { 8412 dev_err(&ctrl_info->pci_dev->dev, 8413 "error obtaining controller properties\n"); 8414 return rc; 8415 } 8416 8417 rc = sis_get_pqi_capabilities(ctrl_info); 8418 if (rc) { 8419 dev_err(&ctrl_info->pci_dev->dev, 8420 "error obtaining controller capabilities\n"); 8421 return rc; 8422 } 8423 8424 /* 8425 * If the function we are about to call succeeds, the 8426 * controller will transition from legacy SIS mode 8427 * into PQI mode. 8428 */ 8429 rc = sis_init_base_struct_addr(ctrl_info); 8430 if (rc) { 8431 dev_err(&ctrl_info->pci_dev->dev, 8432 "error initializing PQI mode\n"); 8433 return rc; 8434 } 8435 8436 /* Wait for the controller to complete the SIS -> PQI transition. */ 8437 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 8438 if (rc) { 8439 dev_err(&ctrl_info->pci_dev->dev, 8440 "transition to PQI mode failed\n"); 8441 return rc; 8442 } 8443 8444 /* From here on, we are running in PQI mode. */ 8445 ctrl_info->pqi_mode_enabled = true; 8446 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 8447 8448 pqi_reinit_queues(ctrl_info); 8449 8450 rc = pqi_create_admin_queues(ctrl_info); 8451 if (rc) { 8452 dev_err(&ctrl_info->pci_dev->dev, 8453 "error creating admin queues\n"); 8454 return rc; 8455 } 8456 8457 rc = pqi_create_queues(ctrl_info); 8458 if (rc) 8459 return rc; 8460 8461 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 8462 8463 ctrl_info->controller_online = true; 8464 pqi_ctrl_unblock_requests(ctrl_info); 8465 8466 pqi_ctrl_reset_config(ctrl_info); 8467 8468 rc = pqi_process_config_table(ctrl_info); 8469 if (rc) 8470 return rc; 8471 8472 pqi_start_heartbeat_timer(ctrl_info); 8473 8474 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) { 8475 rc = pqi_get_advanced_raid_bypass_config(ctrl_info); 8476 if (rc) { 8477 dev_err(&ctrl_info->pci_dev->dev, 8478 "error obtaining advanced RAID bypass configuration\n"); 8479 return rc; 8480 } 8481 ctrl_info->ciss_report_log_flags |= 8482 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX; 8483 } 8484 8485 rc = pqi_enable_events(ctrl_info); 8486 if (rc) { 8487 dev_err(&ctrl_info->pci_dev->dev, 8488 "error enabling events\n"); 8489 return rc; 8490 } 8491 8492 rc = pqi_get_ctrl_product_details(ctrl_info); 8493 if (rc) { 8494 dev_err(&ctrl_info->pci_dev->dev, 8495 "error obtaining product details\n"); 8496 return rc; 8497 } 8498 8499 rc = pqi_set_diag_rescan(ctrl_info); 8500 if (rc) { 8501 dev_err(&ctrl_info->pci_dev->dev, 8502 "error enabling multi-lun rescan\n"); 8503 return rc; 8504 } 8505 8506 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 8507 if (rc) { 8508 dev_err(&ctrl_info->pci_dev->dev, 8509 "error updating host wellness\n"); 8510 return rc; 8511 } 8512 8513 if (pqi_ofa_in_progress(ctrl_info)) 8514 pqi_ctrl_unblock_scan(ctrl_info); 8515 8516 pqi_scan_scsi_devices(ctrl_info); 8517 8518 return 0; 8519 } 8520 8521 static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev, u16 timeout) 8522 { 8523 int rc; 8524 8525 rc = pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2, 8526 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout); 8527 8528 return pcibios_err_to_errno(rc); 8529 } 8530 8531 static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info) 8532 { 8533 int rc; 8534 u64 mask; 8535 8536 rc = pci_enable_device(ctrl_info->pci_dev); 8537 if (rc) { 8538 dev_err(&ctrl_info->pci_dev->dev, 8539 "failed to enable PCI device\n"); 8540 return rc; 8541 } 8542 8543 if (sizeof(dma_addr_t) > 4) 8544 mask = DMA_BIT_MASK(64); 8545 else 8546 mask = DMA_BIT_MASK(32); 8547 8548 rc = dma_set_mask_and_coherent(&ctrl_info->pci_dev->dev, mask); 8549 if (rc) { 8550 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n"); 8551 goto disable_device; 8552 } 8553 8554 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT); 8555 if (rc) { 8556 dev_err(&ctrl_info->pci_dev->dev, 8557 "failed to obtain PCI resources\n"); 8558 goto disable_device; 8559 } 8560 8561 ctrl_info->iomem_base = ioremap(pci_resource_start( 8562 ctrl_info->pci_dev, 0), 8563 sizeof(struct pqi_ctrl_registers)); 8564 if (!ctrl_info->iomem_base) { 8565 dev_err(&ctrl_info->pci_dev->dev, 8566 "failed to map memory for controller registers\n"); 8567 rc = -ENOMEM; 8568 goto release_regions; 8569 } 8570 8571 #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6 8572 8573 /* Increase the PCIe completion timeout. */ 8574 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev, 8575 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS); 8576 if (rc) { 8577 dev_err(&ctrl_info->pci_dev->dev, 8578 "failed to set PCIe completion timeout\n"); 8579 goto release_regions; 8580 } 8581 8582 /* Enable bus mastering. */ 8583 pci_set_master(ctrl_info->pci_dev); 8584 8585 ctrl_info->registers = ctrl_info->iomem_base; 8586 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers; 8587 8588 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info); 8589 8590 return 0; 8591 8592 release_regions: 8593 pci_release_regions(ctrl_info->pci_dev); 8594 disable_device: 8595 pci_disable_device(ctrl_info->pci_dev); 8596 8597 return rc; 8598 } 8599 8600 static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info) 8601 { 8602 iounmap(ctrl_info->iomem_base); 8603 pci_release_regions(ctrl_info->pci_dev); 8604 if (pci_is_enabled(ctrl_info->pci_dev)) 8605 pci_disable_device(ctrl_info->pci_dev); 8606 pci_set_drvdata(ctrl_info->pci_dev, NULL); 8607 } 8608 8609 static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node) 8610 { 8611 struct pqi_ctrl_info *ctrl_info; 8612 8613 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info), 8614 GFP_KERNEL, numa_node); 8615 if (!ctrl_info) 8616 return NULL; 8617 8618 mutex_init(&ctrl_info->scan_mutex); 8619 mutex_init(&ctrl_info->lun_reset_mutex); 8620 mutex_init(&ctrl_info->ofa_mutex); 8621 8622 INIT_LIST_HEAD(&ctrl_info->scsi_device_list); 8623 spin_lock_init(&ctrl_info->scsi_device_list_lock); 8624 8625 INIT_WORK(&ctrl_info->event_work, pqi_event_worker); 8626 atomic_set(&ctrl_info->num_interrupts, 0); 8627 8628 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker); 8629 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker); 8630 8631 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0); 8632 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker); 8633 8634 INIT_WORK(&ctrl_info->ofa_memory_alloc_work, pqi_ofa_memory_alloc_worker); 8635 INIT_WORK(&ctrl_info->ofa_quiesce_work, pqi_ofa_quiesce_worker); 8636 8637 sema_init(&ctrl_info->sync_request_sem, 8638 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS); 8639 init_waitqueue_head(&ctrl_info->block_requests_wait); 8640 8641 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1; 8642 ctrl_info->irq_mode = IRQ_MODE_NONE; 8643 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS; 8644 8645 ctrl_info->ciss_report_log_flags = CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID; 8646 ctrl_info->max_transfer_encrypted_sas_sata = 8647 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_SAS_SATA; 8648 ctrl_info->max_transfer_encrypted_nvme = 8649 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_NVME; 8650 ctrl_info->max_write_raid_5_6 = PQI_DEFAULT_MAX_WRITE_RAID_5_6; 8651 ctrl_info->max_write_raid_1_10_2drive = ~0; 8652 ctrl_info->max_write_raid_1_10_3drive = ~0; 8653 ctrl_info->disable_managed_interrupts = pqi_disable_managed_interrupts; 8654 8655 return ctrl_info; 8656 } 8657 8658 static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info) 8659 { 8660 kfree(ctrl_info); 8661 } 8662 8663 static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info) 8664 { 8665 pqi_free_irqs(ctrl_info); 8666 pqi_disable_msix_interrupts(ctrl_info); 8667 } 8668 8669 static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info) 8670 { 8671 pqi_free_interrupts(ctrl_info); 8672 if (ctrl_info->queue_memory_base) 8673 dma_free_coherent(&ctrl_info->pci_dev->dev, 8674 ctrl_info->queue_memory_length, 8675 ctrl_info->queue_memory_base, 8676 ctrl_info->queue_memory_base_dma_handle); 8677 if (ctrl_info->admin_queue_memory_base) 8678 dma_free_coherent(&ctrl_info->pci_dev->dev, 8679 ctrl_info->admin_queue_memory_length, 8680 ctrl_info->admin_queue_memory_base, 8681 ctrl_info->admin_queue_memory_base_dma_handle); 8682 pqi_free_all_io_requests(ctrl_info); 8683 if (ctrl_info->error_buffer) 8684 dma_free_coherent(&ctrl_info->pci_dev->dev, 8685 ctrl_info->error_buffer_length, 8686 ctrl_info->error_buffer, 8687 ctrl_info->error_buffer_dma_handle); 8688 if (ctrl_info->iomem_base) 8689 pqi_cleanup_pci_init(ctrl_info); 8690 pqi_free_ctrl_info(ctrl_info); 8691 } 8692 8693 static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info) 8694 { 8695 ctrl_info->controller_online = false; 8696 pqi_stop_heartbeat_timer(ctrl_info); 8697 pqi_ctrl_block_requests(ctrl_info); 8698 pqi_cancel_rescan_worker(ctrl_info); 8699 pqi_cancel_update_time_worker(ctrl_info); 8700 if (ctrl_info->ctrl_removal_state == PQI_CTRL_SURPRISE_REMOVAL) { 8701 pqi_fail_all_outstanding_requests(ctrl_info); 8702 ctrl_info->pqi_mode_enabled = false; 8703 } 8704 pqi_unregister_scsi(ctrl_info); 8705 if (ctrl_info->pqi_mode_enabled) 8706 pqi_revert_to_sis_mode(ctrl_info); 8707 pqi_free_ctrl_resources(ctrl_info); 8708 } 8709 8710 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info) 8711 { 8712 pqi_ctrl_block_scan(ctrl_info); 8713 pqi_scsi_block_requests(ctrl_info); 8714 pqi_ctrl_block_device_reset(ctrl_info); 8715 pqi_ctrl_block_requests(ctrl_info); 8716 pqi_ctrl_wait_until_quiesced(ctrl_info); 8717 pqi_stop_heartbeat_timer(ctrl_info); 8718 } 8719 8720 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info) 8721 { 8722 pqi_start_heartbeat_timer(ctrl_info); 8723 pqi_ctrl_unblock_requests(ctrl_info); 8724 pqi_ctrl_unblock_device_reset(ctrl_info); 8725 pqi_scsi_unblock_requests(ctrl_info); 8726 pqi_ctrl_unblock_scan(ctrl_info); 8727 } 8728 8729 static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info, u32 total_size, u32 chunk_size) 8730 { 8731 int i; 8732 u32 sg_count; 8733 struct device *dev; 8734 struct pqi_ofa_memory *ofap; 8735 struct pqi_sg_descriptor *mem_descriptor; 8736 dma_addr_t dma_handle; 8737 8738 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 8739 8740 sg_count = DIV_ROUND_UP(total_size, chunk_size); 8741 if (sg_count == 0 || sg_count > PQI_OFA_MAX_SG_DESCRIPTORS) 8742 goto out; 8743 8744 ctrl_info->pqi_ofa_chunk_virt_addr = kmalloc_array(sg_count, sizeof(void *), GFP_KERNEL); 8745 if (!ctrl_info->pqi_ofa_chunk_virt_addr) 8746 goto out; 8747 8748 dev = &ctrl_info->pci_dev->dev; 8749 8750 for (i = 0; i < sg_count; i++) { 8751 ctrl_info->pqi_ofa_chunk_virt_addr[i] = 8752 dma_alloc_coherent(dev, chunk_size, &dma_handle, GFP_KERNEL); 8753 if (!ctrl_info->pqi_ofa_chunk_virt_addr[i]) 8754 goto out_free_chunks; 8755 mem_descriptor = &ofap->sg_descriptor[i]; 8756 put_unaligned_le64((u64)dma_handle, &mem_descriptor->address); 8757 put_unaligned_le32(chunk_size, &mem_descriptor->length); 8758 } 8759 8760 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags); 8761 put_unaligned_le16(sg_count, &ofap->num_memory_descriptors); 8762 put_unaligned_le32(sg_count * chunk_size, &ofap->bytes_allocated); 8763 8764 return 0; 8765 8766 out_free_chunks: 8767 while (--i >= 0) { 8768 mem_descriptor = &ofap->sg_descriptor[i]; 8769 dma_free_coherent(dev, chunk_size, 8770 ctrl_info->pqi_ofa_chunk_virt_addr[i], 8771 get_unaligned_le64(&mem_descriptor->address)); 8772 } 8773 kfree(ctrl_info->pqi_ofa_chunk_virt_addr); 8774 8775 out: 8776 return -ENOMEM; 8777 } 8778 8779 static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info) 8780 { 8781 u32 total_size; 8782 u32 chunk_size; 8783 u32 min_chunk_size; 8784 8785 if (ctrl_info->ofa_bytes_requested == 0) 8786 return 0; 8787 8788 total_size = PAGE_ALIGN(ctrl_info->ofa_bytes_requested); 8789 min_chunk_size = DIV_ROUND_UP(total_size, PQI_OFA_MAX_SG_DESCRIPTORS); 8790 min_chunk_size = PAGE_ALIGN(min_chunk_size); 8791 8792 for (chunk_size = total_size; chunk_size >= min_chunk_size;) { 8793 if (pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_size) == 0) 8794 return 0; 8795 chunk_size /= 2; 8796 chunk_size = PAGE_ALIGN(chunk_size); 8797 } 8798 8799 return -ENOMEM; 8800 } 8801 8802 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info) 8803 { 8804 struct device *dev; 8805 struct pqi_ofa_memory *ofap; 8806 8807 dev = &ctrl_info->pci_dev->dev; 8808 8809 ofap = dma_alloc_coherent(dev, sizeof(*ofap), 8810 &ctrl_info->pqi_ofa_mem_dma_handle, GFP_KERNEL); 8811 if (!ofap) 8812 return; 8813 8814 ctrl_info->pqi_ofa_mem_virt_addr = ofap; 8815 8816 if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) { 8817 dev_err(dev, 8818 "failed to allocate host buffer for Online Firmware Activation\n"); 8819 dma_free_coherent(dev, sizeof(*ofap), ofap, ctrl_info->pqi_ofa_mem_dma_handle); 8820 ctrl_info->pqi_ofa_mem_virt_addr = NULL; 8821 return; 8822 } 8823 8824 put_unaligned_le16(PQI_OFA_VERSION, &ofap->version); 8825 memcpy(&ofap->signature, PQI_OFA_SIGNATURE, sizeof(ofap->signature)); 8826 } 8827 8828 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info) 8829 { 8830 unsigned int i; 8831 struct device *dev; 8832 struct pqi_ofa_memory *ofap; 8833 struct pqi_sg_descriptor *mem_descriptor; 8834 unsigned int num_memory_descriptors; 8835 8836 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 8837 if (!ofap) 8838 return; 8839 8840 dev = &ctrl_info->pci_dev->dev; 8841 8842 if (get_unaligned_le32(&ofap->bytes_allocated) == 0) 8843 goto out; 8844 8845 mem_descriptor = ofap->sg_descriptor; 8846 num_memory_descriptors = 8847 get_unaligned_le16(&ofap->num_memory_descriptors); 8848 8849 for (i = 0; i < num_memory_descriptors; i++) { 8850 dma_free_coherent(dev, 8851 get_unaligned_le32(&mem_descriptor[i].length), 8852 ctrl_info->pqi_ofa_chunk_virt_addr[i], 8853 get_unaligned_le64(&mem_descriptor[i].address)); 8854 } 8855 kfree(ctrl_info->pqi_ofa_chunk_virt_addr); 8856 8857 out: 8858 dma_free_coherent(dev, sizeof(*ofap), ofap, 8859 ctrl_info->pqi_ofa_mem_dma_handle); 8860 ctrl_info->pqi_ofa_mem_virt_addr = NULL; 8861 } 8862 8863 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info) 8864 { 8865 u32 buffer_length; 8866 struct pqi_vendor_general_request request; 8867 struct pqi_ofa_memory *ofap; 8868 8869 memset(&request, 0, sizeof(request)); 8870 8871 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 8872 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 8873 &request.header.iu_length); 8874 put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE, 8875 &request.function_code); 8876 8877 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 8878 8879 if (ofap) { 8880 buffer_length = offsetof(struct pqi_ofa_memory, sg_descriptor) + 8881 get_unaligned_le16(&ofap->num_memory_descriptors) * 8882 sizeof(struct pqi_sg_descriptor); 8883 8884 put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle, 8885 &request.data.ofa_memory_allocation.buffer_address); 8886 put_unaligned_le32(buffer_length, 8887 &request.data.ofa_memory_allocation.buffer_length); 8888 } 8889 8890 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 8891 } 8892 8893 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs) 8894 { 8895 ssleep(delay_secs); 8896 8897 return pqi_ctrl_init_resume(ctrl_info); 8898 } 8899 8900 static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = { 8901 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR, 8902 .status = SAM_STAT_CHECK_CONDITION, 8903 }; 8904 8905 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info) 8906 { 8907 unsigned int i; 8908 struct pqi_io_request *io_request; 8909 struct scsi_cmnd *scmd; 8910 struct scsi_device *sdev; 8911 8912 for (i = 0; i < ctrl_info->max_io_slots; i++) { 8913 io_request = &ctrl_info->io_request_pool[i]; 8914 if (atomic_read(&io_request->refcount) == 0) 8915 continue; 8916 8917 scmd = io_request->scmd; 8918 if (scmd) { 8919 sdev = scmd->device; 8920 if (!sdev || !scsi_device_online(sdev)) { 8921 pqi_free_io_request(io_request); 8922 continue; 8923 } else { 8924 set_host_byte(scmd, DID_NO_CONNECT); 8925 } 8926 } else { 8927 io_request->status = -ENXIO; 8928 io_request->error_info = 8929 &pqi_ctrl_offline_raid_error_info; 8930 } 8931 8932 io_request->io_complete_callback(io_request, 8933 io_request->context); 8934 } 8935 } 8936 8937 static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info) 8938 { 8939 pqi_perform_lockup_action(); 8940 pqi_stop_heartbeat_timer(ctrl_info); 8941 pqi_free_interrupts(ctrl_info); 8942 pqi_cancel_rescan_worker(ctrl_info); 8943 pqi_cancel_update_time_worker(ctrl_info); 8944 pqi_ctrl_wait_until_quiesced(ctrl_info); 8945 pqi_fail_all_outstanding_requests(ctrl_info); 8946 pqi_ctrl_unblock_requests(ctrl_info); 8947 } 8948 8949 static void pqi_ctrl_offline_worker(struct work_struct *work) 8950 { 8951 struct pqi_ctrl_info *ctrl_info; 8952 8953 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work); 8954 pqi_take_ctrl_offline_deferred(ctrl_info); 8955 } 8956 8957 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info, 8958 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 8959 { 8960 if (!ctrl_info->controller_online) 8961 return; 8962 8963 ctrl_info->controller_online = false; 8964 ctrl_info->pqi_mode_enabled = false; 8965 pqi_ctrl_block_requests(ctrl_info); 8966 if (!pqi_disable_ctrl_shutdown) 8967 sis_shutdown_ctrl(ctrl_info, ctrl_shutdown_reason); 8968 pci_disable_device(ctrl_info->pci_dev); 8969 dev_err(&ctrl_info->pci_dev->dev, "controller offline\n"); 8970 schedule_work(&ctrl_info->ctrl_offline_work); 8971 } 8972 8973 static void pqi_print_ctrl_info(struct pci_dev *pci_dev, 8974 const struct pci_device_id *id) 8975 { 8976 char *ctrl_description; 8977 8978 if (id->driver_data) 8979 ctrl_description = (char *)id->driver_data; 8980 else 8981 ctrl_description = "Microchip Smart Family Controller"; 8982 8983 dev_info(&pci_dev->dev, "%s found\n", ctrl_description); 8984 } 8985 8986 static int pqi_pci_probe(struct pci_dev *pci_dev, 8987 const struct pci_device_id *id) 8988 { 8989 int rc; 8990 int node; 8991 struct pqi_ctrl_info *ctrl_info; 8992 8993 pqi_print_ctrl_info(pci_dev, id); 8994 8995 if (pqi_disable_device_id_wildcards && 8996 id->subvendor == PCI_ANY_ID && 8997 id->subdevice == PCI_ANY_ID) { 8998 dev_warn(&pci_dev->dev, 8999 "controller not probed because device ID wildcards are disabled\n"); 9000 return -ENODEV; 9001 } 9002 9003 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID) 9004 dev_warn(&pci_dev->dev, 9005 "controller device ID matched using wildcards\n"); 9006 9007 node = dev_to_node(&pci_dev->dev); 9008 if (node == NUMA_NO_NODE) { 9009 node = cpu_to_node(0); 9010 if (node == NUMA_NO_NODE) 9011 node = 0; 9012 set_dev_node(&pci_dev->dev, node); 9013 } 9014 9015 ctrl_info = pqi_alloc_ctrl_info(node); 9016 if (!ctrl_info) { 9017 dev_err(&pci_dev->dev, 9018 "failed to allocate controller info block\n"); 9019 return -ENOMEM; 9020 } 9021 9022 ctrl_info->pci_dev = pci_dev; 9023 9024 rc = pqi_pci_init(ctrl_info); 9025 if (rc) 9026 goto error; 9027 9028 rc = pqi_ctrl_init(ctrl_info); 9029 if (rc) 9030 goto error; 9031 9032 return 0; 9033 9034 error: 9035 pqi_remove_ctrl(ctrl_info); 9036 9037 return rc; 9038 } 9039 9040 static void pqi_pci_remove(struct pci_dev *pci_dev) 9041 { 9042 struct pqi_ctrl_info *ctrl_info; 9043 u16 vendor_id; 9044 int rc; 9045 9046 ctrl_info = pci_get_drvdata(pci_dev); 9047 if (!ctrl_info) 9048 return; 9049 9050 pci_read_config_word(ctrl_info->pci_dev, PCI_SUBSYSTEM_VENDOR_ID, &vendor_id); 9051 if (vendor_id == 0xffff) 9052 ctrl_info->ctrl_removal_state = PQI_CTRL_SURPRISE_REMOVAL; 9053 else 9054 ctrl_info->ctrl_removal_state = PQI_CTRL_GRACEFUL_REMOVAL; 9055 9056 if (ctrl_info->ctrl_removal_state == PQI_CTRL_GRACEFUL_REMOVAL) { 9057 rc = pqi_flush_cache(ctrl_info, RESTART); 9058 if (rc) 9059 dev_err(&pci_dev->dev, 9060 "unable to flush controller cache during remove\n"); 9061 } 9062 9063 pqi_remove_ctrl(ctrl_info); 9064 } 9065 9066 static void pqi_crash_if_pending_command(struct pqi_ctrl_info *ctrl_info) 9067 { 9068 unsigned int i; 9069 struct pqi_io_request *io_request; 9070 struct scsi_cmnd *scmd; 9071 9072 for (i = 0; i < ctrl_info->max_io_slots; i++) { 9073 io_request = &ctrl_info->io_request_pool[i]; 9074 if (atomic_read(&io_request->refcount) == 0) 9075 continue; 9076 scmd = io_request->scmd; 9077 WARN_ON(scmd != NULL); /* IO command from SML */ 9078 WARN_ON(scmd == NULL); /* Non-IO cmd or driver initiated*/ 9079 } 9080 } 9081 9082 static void pqi_shutdown(struct pci_dev *pci_dev) 9083 { 9084 int rc; 9085 struct pqi_ctrl_info *ctrl_info; 9086 enum bmic_flush_cache_shutdown_event shutdown_event; 9087 9088 ctrl_info = pci_get_drvdata(pci_dev); 9089 if (!ctrl_info) { 9090 dev_err(&pci_dev->dev, 9091 "cache could not be flushed\n"); 9092 return; 9093 } 9094 9095 pqi_wait_until_ofa_finished(ctrl_info); 9096 9097 pqi_scsi_block_requests(ctrl_info); 9098 pqi_ctrl_block_device_reset(ctrl_info); 9099 pqi_ctrl_block_requests(ctrl_info); 9100 pqi_ctrl_wait_until_quiesced(ctrl_info); 9101 9102 if (system_state == SYSTEM_RESTART) 9103 shutdown_event = RESTART; 9104 else 9105 shutdown_event = SHUTDOWN; 9106 9107 /* 9108 * Write all data in the controller's battery-backed cache to 9109 * storage. 9110 */ 9111 rc = pqi_flush_cache(ctrl_info, shutdown_event); 9112 if (rc) 9113 dev_err(&pci_dev->dev, 9114 "unable to flush controller cache\n"); 9115 9116 pqi_crash_if_pending_command(ctrl_info); 9117 pqi_reset(ctrl_info); 9118 } 9119 9120 static void pqi_process_lockup_action_param(void) 9121 { 9122 unsigned int i; 9123 9124 if (!pqi_lockup_action_param) 9125 return; 9126 9127 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 9128 if (strcmp(pqi_lockup_action_param, 9129 pqi_lockup_actions[i].name) == 0) { 9130 pqi_lockup_action = pqi_lockup_actions[i].action; 9131 return; 9132 } 9133 } 9134 9135 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n", 9136 DRIVER_NAME_SHORT, pqi_lockup_action_param); 9137 } 9138 9139 #define PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS 30 9140 #define PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS (30 * 60) 9141 9142 static void pqi_process_ctrl_ready_timeout_param(void) 9143 { 9144 if (pqi_ctrl_ready_timeout_secs == 0) 9145 return; 9146 9147 if (pqi_ctrl_ready_timeout_secs < PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS) { 9148 pr_warn("%s: ctrl_ready_timeout parm of %u second(s) is less than minimum timeout of %d seconds - setting timeout to %d seconds\n", 9149 DRIVER_NAME_SHORT, pqi_ctrl_ready_timeout_secs, PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS, PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS); 9150 pqi_ctrl_ready_timeout_secs = PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS; 9151 } else if (pqi_ctrl_ready_timeout_secs > PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS) { 9152 pr_warn("%s: ctrl_ready_timeout parm of %u seconds is greater than maximum timeout of %d seconds - setting timeout to %d seconds\n", 9153 DRIVER_NAME_SHORT, pqi_ctrl_ready_timeout_secs, PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS, PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS); 9154 pqi_ctrl_ready_timeout_secs = PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS; 9155 } 9156 9157 sis_ctrl_ready_timeout_secs = pqi_ctrl_ready_timeout_secs; 9158 } 9159 9160 static void pqi_process_module_params(void) 9161 { 9162 pqi_process_lockup_action_param(); 9163 pqi_process_ctrl_ready_timeout_param(); 9164 } 9165 9166 #if defined(CONFIG_PM) 9167 9168 static inline enum bmic_flush_cache_shutdown_event pqi_get_flush_cache_shutdown_event(struct pci_dev *pci_dev) 9169 { 9170 if (pci_dev->subsystem_vendor == PCI_VENDOR_ID_ADAPTEC2 && pci_dev->subsystem_device == 0x1304) 9171 return RESTART; 9172 9173 return SUSPEND; 9174 } 9175 9176 static int pqi_suspend_or_freeze(struct device *dev, bool suspend) 9177 { 9178 struct pci_dev *pci_dev; 9179 struct pqi_ctrl_info *ctrl_info; 9180 9181 pci_dev = to_pci_dev(dev); 9182 ctrl_info = pci_get_drvdata(pci_dev); 9183 9184 pqi_wait_until_ofa_finished(ctrl_info); 9185 9186 pqi_ctrl_block_scan(ctrl_info); 9187 pqi_scsi_block_requests(ctrl_info); 9188 pqi_ctrl_block_device_reset(ctrl_info); 9189 pqi_ctrl_block_requests(ctrl_info); 9190 pqi_ctrl_wait_until_quiesced(ctrl_info); 9191 9192 if (suspend) { 9193 enum bmic_flush_cache_shutdown_event shutdown_event; 9194 9195 shutdown_event = pqi_get_flush_cache_shutdown_event(pci_dev); 9196 pqi_flush_cache(ctrl_info, shutdown_event); 9197 } 9198 9199 pqi_stop_heartbeat_timer(ctrl_info); 9200 pqi_crash_if_pending_command(ctrl_info); 9201 pqi_free_irqs(ctrl_info); 9202 9203 ctrl_info->controller_online = false; 9204 ctrl_info->pqi_mode_enabled = false; 9205 9206 return 0; 9207 } 9208 9209 static __maybe_unused int pqi_suspend(struct device *dev) 9210 { 9211 return pqi_suspend_or_freeze(dev, true); 9212 } 9213 9214 static int pqi_resume_or_restore(struct device *dev) 9215 { 9216 int rc; 9217 struct pci_dev *pci_dev; 9218 struct pqi_ctrl_info *ctrl_info; 9219 9220 pci_dev = to_pci_dev(dev); 9221 ctrl_info = pci_get_drvdata(pci_dev); 9222 9223 rc = pqi_request_irqs(ctrl_info); 9224 if (rc) 9225 return rc; 9226 9227 pqi_ctrl_unblock_device_reset(ctrl_info); 9228 pqi_ctrl_unblock_requests(ctrl_info); 9229 pqi_scsi_unblock_requests(ctrl_info); 9230 pqi_ctrl_unblock_scan(ctrl_info); 9231 9232 ssleep(PQI_POST_RESET_DELAY_SECS); 9233 9234 return pqi_ctrl_init_resume(ctrl_info); 9235 } 9236 9237 static int pqi_freeze(struct device *dev) 9238 { 9239 return pqi_suspend_or_freeze(dev, false); 9240 } 9241 9242 static int pqi_thaw(struct device *dev) 9243 { 9244 int rc; 9245 struct pci_dev *pci_dev; 9246 struct pqi_ctrl_info *ctrl_info; 9247 9248 pci_dev = to_pci_dev(dev); 9249 ctrl_info = pci_get_drvdata(pci_dev); 9250 9251 rc = pqi_request_irqs(ctrl_info); 9252 if (rc) 9253 return rc; 9254 9255 ctrl_info->controller_online = true; 9256 ctrl_info->pqi_mode_enabled = true; 9257 9258 pqi_ctrl_unblock_device_reset(ctrl_info); 9259 pqi_ctrl_unblock_requests(ctrl_info); 9260 pqi_scsi_unblock_requests(ctrl_info); 9261 pqi_ctrl_unblock_scan(ctrl_info); 9262 9263 return 0; 9264 } 9265 9266 static int pqi_poweroff(struct device *dev) 9267 { 9268 struct pci_dev *pci_dev; 9269 struct pqi_ctrl_info *ctrl_info; 9270 enum bmic_flush_cache_shutdown_event shutdown_event; 9271 9272 pci_dev = to_pci_dev(dev); 9273 ctrl_info = pci_get_drvdata(pci_dev); 9274 9275 shutdown_event = pqi_get_flush_cache_shutdown_event(pci_dev); 9276 pqi_flush_cache(ctrl_info, shutdown_event); 9277 9278 return 0; 9279 } 9280 9281 static const struct dev_pm_ops pqi_pm_ops = { 9282 .suspend = pqi_suspend, 9283 .resume = pqi_resume_or_restore, 9284 .freeze = pqi_freeze, 9285 .thaw = pqi_thaw, 9286 .poweroff = pqi_poweroff, 9287 .restore = pqi_resume_or_restore, 9288 }; 9289 9290 #endif /* CONFIG_PM */ 9291 9292 /* Define the PCI IDs for the controllers that we support. */ 9293 static const struct pci_device_id pqi_pci_id_table[] = { 9294 { 9295 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9296 0x105b, 0x1211) 9297 }, 9298 { 9299 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9300 0x105b, 0x1321) 9301 }, 9302 { 9303 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9304 0x152d, 0x8a22) 9305 }, 9306 { 9307 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9308 0x152d, 0x8a23) 9309 }, 9310 { 9311 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9312 0x152d, 0x8a24) 9313 }, 9314 { 9315 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9316 0x152d, 0x8a36) 9317 }, 9318 { 9319 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9320 0x152d, 0x8a37) 9321 }, 9322 { 9323 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9324 0x193d, 0x1104) 9325 }, 9326 { 9327 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9328 0x193d, 0x1105) 9329 }, 9330 { 9331 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9332 0x193d, 0x1106) 9333 }, 9334 { 9335 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9336 0x193d, 0x1107) 9337 }, 9338 { 9339 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9340 0x193d, 0x1108) 9341 }, 9342 { 9343 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9344 0x193d, 0x1109) 9345 }, 9346 { 9347 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9348 0x193d, 0x110b) 9349 }, 9350 { 9351 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9352 0x193d, 0x8460) 9353 }, 9354 { 9355 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9356 0x193d, 0x8461) 9357 }, 9358 { 9359 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9360 0x193d, 0xc460) 9361 }, 9362 { 9363 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9364 0x193d, 0xc461) 9365 }, 9366 { 9367 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9368 0x193d, 0xf460) 9369 }, 9370 { 9371 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9372 0x193d, 0xf461) 9373 }, 9374 { 9375 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9376 0x1bd4, 0x0045) 9377 }, 9378 { 9379 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9380 0x1bd4, 0x0046) 9381 }, 9382 { 9383 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9384 0x1bd4, 0x0047) 9385 }, 9386 { 9387 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9388 0x1bd4, 0x0048) 9389 }, 9390 { 9391 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9392 0x1bd4, 0x004a) 9393 }, 9394 { 9395 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9396 0x1bd4, 0x004b) 9397 }, 9398 { 9399 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9400 0x1bd4, 0x004c) 9401 }, 9402 { 9403 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9404 0x1bd4, 0x004f) 9405 }, 9406 { 9407 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9408 0x1bd4, 0x0051) 9409 }, 9410 { 9411 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9412 0x1bd4, 0x0052) 9413 }, 9414 { 9415 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9416 0x1bd4, 0x0053) 9417 }, 9418 { 9419 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9420 0x1bd4, 0x0054) 9421 }, 9422 { 9423 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9424 0x1bd4, 0x006b) 9425 }, 9426 { 9427 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9428 0x1bd4, 0x006c) 9429 }, 9430 { 9431 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9432 0x1bd4, 0x006d) 9433 }, 9434 { 9435 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9436 0x1bd4, 0x006f) 9437 }, 9438 { 9439 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9440 0x1bd4, 0x0070) 9441 }, 9442 { 9443 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9444 0x1bd4, 0x0071) 9445 }, 9446 { 9447 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9448 0x1bd4, 0x0072) 9449 }, 9450 { 9451 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9452 0x1bd4, 0x0086) 9453 }, 9454 { 9455 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9456 0x1bd4, 0x0087) 9457 }, 9458 { 9459 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9460 0x1bd4, 0x0088) 9461 }, 9462 { 9463 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9464 0x1bd4, 0x0089) 9465 }, 9466 { 9467 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9468 0x19e5, 0xd227) 9469 }, 9470 { 9471 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9472 0x19e5, 0xd228) 9473 }, 9474 { 9475 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9476 0x19e5, 0xd229) 9477 }, 9478 { 9479 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9480 0x19e5, 0xd22a) 9481 }, 9482 { 9483 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9484 0x19e5, 0xd22b) 9485 }, 9486 { 9487 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9488 0x19e5, 0xd22c) 9489 }, 9490 { 9491 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9492 PCI_VENDOR_ID_ADAPTEC2, 0x0110) 9493 }, 9494 { 9495 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9496 PCI_VENDOR_ID_ADAPTEC2, 0x0608) 9497 }, 9498 { 9499 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9500 PCI_VENDOR_ID_ADAPTEC2, 0x0659) 9501 }, 9502 { 9503 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9504 PCI_VENDOR_ID_ADAPTEC2, 0x0800) 9505 }, 9506 { 9507 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9508 PCI_VENDOR_ID_ADAPTEC2, 0x0801) 9509 }, 9510 { 9511 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9512 PCI_VENDOR_ID_ADAPTEC2, 0x0802) 9513 }, 9514 { 9515 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9516 PCI_VENDOR_ID_ADAPTEC2, 0x0803) 9517 }, 9518 { 9519 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9520 PCI_VENDOR_ID_ADAPTEC2, 0x0804) 9521 }, 9522 { 9523 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9524 PCI_VENDOR_ID_ADAPTEC2, 0x0805) 9525 }, 9526 { 9527 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9528 PCI_VENDOR_ID_ADAPTEC2, 0x0806) 9529 }, 9530 { 9531 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9532 PCI_VENDOR_ID_ADAPTEC2, 0x0807) 9533 }, 9534 { 9535 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9536 PCI_VENDOR_ID_ADAPTEC2, 0x0808) 9537 }, 9538 { 9539 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9540 PCI_VENDOR_ID_ADAPTEC2, 0x0809) 9541 }, 9542 { 9543 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9544 PCI_VENDOR_ID_ADAPTEC2, 0x080a) 9545 }, 9546 { 9547 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9548 PCI_VENDOR_ID_ADAPTEC2, 0x0900) 9549 }, 9550 { 9551 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9552 PCI_VENDOR_ID_ADAPTEC2, 0x0901) 9553 }, 9554 { 9555 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9556 PCI_VENDOR_ID_ADAPTEC2, 0x0902) 9557 }, 9558 { 9559 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9560 PCI_VENDOR_ID_ADAPTEC2, 0x0903) 9561 }, 9562 { 9563 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9564 PCI_VENDOR_ID_ADAPTEC2, 0x0904) 9565 }, 9566 { 9567 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9568 PCI_VENDOR_ID_ADAPTEC2, 0x0905) 9569 }, 9570 { 9571 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9572 PCI_VENDOR_ID_ADAPTEC2, 0x0906) 9573 }, 9574 { 9575 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9576 PCI_VENDOR_ID_ADAPTEC2, 0x0907) 9577 }, 9578 { 9579 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9580 PCI_VENDOR_ID_ADAPTEC2, 0x0908) 9581 }, 9582 { 9583 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9584 PCI_VENDOR_ID_ADAPTEC2, 0x090a) 9585 }, 9586 { 9587 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9588 PCI_VENDOR_ID_ADAPTEC2, 0x1200) 9589 }, 9590 { 9591 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9592 PCI_VENDOR_ID_ADAPTEC2, 0x1201) 9593 }, 9594 { 9595 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9596 PCI_VENDOR_ID_ADAPTEC2, 0x1202) 9597 }, 9598 { 9599 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9600 PCI_VENDOR_ID_ADAPTEC2, 0x1280) 9601 }, 9602 { 9603 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9604 PCI_VENDOR_ID_ADAPTEC2, 0x1281) 9605 }, 9606 { 9607 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9608 PCI_VENDOR_ID_ADAPTEC2, 0x1282) 9609 }, 9610 { 9611 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9612 PCI_VENDOR_ID_ADAPTEC2, 0x1300) 9613 }, 9614 { 9615 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9616 PCI_VENDOR_ID_ADAPTEC2, 0x1301) 9617 }, 9618 { 9619 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9620 PCI_VENDOR_ID_ADAPTEC2, 0x1302) 9621 }, 9622 { 9623 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9624 PCI_VENDOR_ID_ADAPTEC2, 0x1303) 9625 }, 9626 { 9627 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9628 PCI_VENDOR_ID_ADAPTEC2, 0x1304) 9629 }, 9630 { 9631 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9632 PCI_VENDOR_ID_ADAPTEC2, 0x1380) 9633 }, 9634 { 9635 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9636 PCI_VENDOR_ID_ADAPTEC2, 0x1400) 9637 }, 9638 { 9639 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9640 PCI_VENDOR_ID_ADAPTEC2, 0x1402) 9641 }, 9642 { 9643 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9644 PCI_VENDOR_ID_ADAPTEC2, 0x1410) 9645 }, 9646 { 9647 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9648 PCI_VENDOR_ID_ADAPTEC2, 0x1411) 9649 }, 9650 { 9651 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9652 PCI_VENDOR_ID_ADAPTEC2, 0x1412) 9653 }, 9654 { 9655 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9656 PCI_VENDOR_ID_ADAPTEC2, 0x1420) 9657 }, 9658 { 9659 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9660 PCI_VENDOR_ID_ADAPTEC2, 0x1430) 9661 }, 9662 { 9663 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9664 PCI_VENDOR_ID_ADAPTEC2, 0x1440) 9665 }, 9666 { 9667 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9668 PCI_VENDOR_ID_ADAPTEC2, 0x1441) 9669 }, 9670 { 9671 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9672 PCI_VENDOR_ID_ADAPTEC2, 0x1450) 9673 }, 9674 { 9675 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9676 PCI_VENDOR_ID_ADAPTEC2, 0x1452) 9677 }, 9678 { 9679 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9680 PCI_VENDOR_ID_ADAPTEC2, 0x1460) 9681 }, 9682 { 9683 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9684 PCI_VENDOR_ID_ADAPTEC2, 0x1461) 9685 }, 9686 { 9687 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9688 PCI_VENDOR_ID_ADAPTEC2, 0x1462) 9689 }, 9690 { 9691 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9692 PCI_VENDOR_ID_ADAPTEC2, 0x1463) 9693 }, 9694 { 9695 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9696 PCI_VENDOR_ID_ADAPTEC2, 0x1470) 9697 }, 9698 { 9699 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9700 PCI_VENDOR_ID_ADAPTEC2, 0x1471) 9701 }, 9702 { 9703 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9704 PCI_VENDOR_ID_ADAPTEC2, 0x1472) 9705 }, 9706 { 9707 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9708 PCI_VENDOR_ID_ADAPTEC2, 0x1473) 9709 }, 9710 { 9711 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9712 PCI_VENDOR_ID_ADAPTEC2, 0x1474) 9713 }, 9714 { 9715 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9716 PCI_VENDOR_ID_ADAPTEC2, 0x1475) 9717 }, 9718 { 9719 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9720 PCI_VENDOR_ID_ADAPTEC2, 0x1480) 9721 }, 9722 { 9723 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9724 PCI_VENDOR_ID_ADAPTEC2, 0x1490) 9725 }, 9726 { 9727 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9728 PCI_VENDOR_ID_ADAPTEC2, 0x1491) 9729 }, 9730 { 9731 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9732 PCI_VENDOR_ID_ADAPTEC2, 0x14a0) 9733 }, 9734 { 9735 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9736 PCI_VENDOR_ID_ADAPTEC2, 0x14a1) 9737 }, 9738 { 9739 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9740 PCI_VENDOR_ID_ADAPTEC2, 0x14a2) 9741 }, 9742 { 9743 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9744 PCI_VENDOR_ID_ADAPTEC2, 0x14a4) 9745 }, 9746 { 9747 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9748 PCI_VENDOR_ID_ADAPTEC2, 0x14a5) 9749 }, 9750 { 9751 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9752 PCI_VENDOR_ID_ADAPTEC2, 0x14a6) 9753 }, 9754 { 9755 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9756 PCI_VENDOR_ID_ADAPTEC2, 0x14b0) 9757 }, 9758 { 9759 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9760 PCI_VENDOR_ID_ADAPTEC2, 0x14b1) 9761 }, 9762 { 9763 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9764 PCI_VENDOR_ID_ADAPTEC2, 0x14c0) 9765 }, 9766 { 9767 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9768 PCI_VENDOR_ID_ADAPTEC2, 0x14c1) 9769 }, 9770 { 9771 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9772 PCI_VENDOR_ID_ADAPTEC2, 0x14c2) 9773 }, 9774 { 9775 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9776 PCI_VENDOR_ID_ADAPTEC2, 0x14c3) 9777 }, 9778 { 9779 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9780 PCI_VENDOR_ID_ADAPTEC2, 0x14c4) 9781 }, 9782 { 9783 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9784 PCI_VENDOR_ID_ADAPTEC2, 0x14d0) 9785 }, 9786 { 9787 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9788 PCI_VENDOR_ID_ADAPTEC2, 0x14e0) 9789 }, 9790 { 9791 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9792 PCI_VENDOR_ID_ADAPTEC2, 0x14f0) 9793 }, 9794 { 9795 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9796 PCI_VENDOR_ID_ADVANTECH, 0x8312) 9797 }, 9798 { 9799 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9800 PCI_VENDOR_ID_DELL, 0x1fe0) 9801 }, 9802 { 9803 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9804 PCI_VENDOR_ID_HP, 0x0600) 9805 }, 9806 { 9807 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9808 PCI_VENDOR_ID_HP, 0x0601) 9809 }, 9810 { 9811 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9812 PCI_VENDOR_ID_HP, 0x0602) 9813 }, 9814 { 9815 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9816 PCI_VENDOR_ID_HP, 0x0603) 9817 }, 9818 { 9819 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9820 PCI_VENDOR_ID_HP, 0x0609) 9821 }, 9822 { 9823 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9824 PCI_VENDOR_ID_HP, 0x0650) 9825 }, 9826 { 9827 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9828 PCI_VENDOR_ID_HP, 0x0651) 9829 }, 9830 { 9831 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9832 PCI_VENDOR_ID_HP, 0x0652) 9833 }, 9834 { 9835 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9836 PCI_VENDOR_ID_HP, 0x0653) 9837 }, 9838 { 9839 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9840 PCI_VENDOR_ID_HP, 0x0654) 9841 }, 9842 { 9843 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9844 PCI_VENDOR_ID_HP, 0x0655) 9845 }, 9846 { 9847 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9848 PCI_VENDOR_ID_HP, 0x0700) 9849 }, 9850 { 9851 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9852 PCI_VENDOR_ID_HP, 0x0701) 9853 }, 9854 { 9855 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9856 PCI_VENDOR_ID_HP, 0x1001) 9857 }, 9858 { 9859 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9860 PCI_VENDOR_ID_HP, 0x1002) 9861 }, 9862 { 9863 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9864 PCI_VENDOR_ID_HP, 0x1100) 9865 }, 9866 { 9867 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9868 PCI_VENDOR_ID_HP, 0x1101) 9869 }, 9870 { 9871 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9872 0x1590, 0x0294) 9873 }, 9874 { 9875 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9876 0x1590, 0x02db) 9877 }, 9878 { 9879 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9880 0x1590, 0x02dc) 9881 }, 9882 { 9883 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9884 0x1590, 0x032e) 9885 }, 9886 { 9887 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9888 0x1590, 0x036f) 9889 }, 9890 { 9891 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9892 0x1590, 0x0381) 9893 }, 9894 { 9895 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9896 0x1590, 0x0382) 9897 }, 9898 { 9899 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9900 0x1590, 0x0383) 9901 }, 9902 { 9903 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9904 0x1d8d, 0x0800) 9905 }, 9906 { 9907 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9908 0x1d8d, 0x0908) 9909 }, 9910 { 9911 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9912 0x1d8d, 0x0806) 9913 }, 9914 { 9915 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9916 0x1d8d, 0x0916) 9917 }, 9918 { 9919 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9920 PCI_VENDOR_ID_GIGABYTE, 0x1000) 9921 }, 9922 { 9923 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9924 0x1dfc, 0x3161) 9925 }, 9926 { 9927 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9928 0x1f0c, 0x3161) 9929 }, 9930 { 9931 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9932 0x1cf2, 0x5445) 9933 }, 9934 { 9935 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9936 0x1cf2, 0x5446) 9937 }, 9938 { 9939 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9940 0x1cf2, 0x5447) 9941 }, 9942 { 9943 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9944 0x1cf2, 0x5449) 9945 }, 9946 { 9947 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9948 0x1cf2, 0x544a) 9949 }, 9950 { 9951 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9952 0x1cf2, 0x544b) 9953 }, 9954 { 9955 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9956 0x1cf2, 0x544d) 9957 }, 9958 { 9959 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9960 0x1cf2, 0x544e) 9961 }, 9962 { 9963 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9964 0x1cf2, 0x544f) 9965 }, 9966 { 9967 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9968 0x1cf2, 0x0b27) 9969 }, 9970 { 9971 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9972 0x1cf2, 0x0b29) 9973 }, 9974 { 9975 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9976 0x1cf2, 0x0b45) 9977 }, 9978 { 9979 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9980 0x1cc4, 0x0101) 9981 }, 9982 { 9983 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9984 0x1cc4, 0x0201) 9985 }, 9986 { 9987 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9988 PCI_VENDOR_ID_LENOVO, 0x0220) 9989 }, 9990 { 9991 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9992 PCI_VENDOR_ID_LENOVO, 0x0221) 9993 }, 9994 { 9995 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9996 PCI_VENDOR_ID_LENOVO, 0x0520) 9997 }, 9998 { 9999 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10000 PCI_VENDOR_ID_LENOVO, 0x0522) 10001 }, 10002 { 10003 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10004 PCI_VENDOR_ID_LENOVO, 0x0620) 10005 }, 10006 { 10007 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10008 PCI_VENDOR_ID_LENOVO, 0x0621) 10009 }, 10010 { 10011 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10012 PCI_VENDOR_ID_LENOVO, 0x0622) 10013 }, 10014 { 10015 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10016 PCI_VENDOR_ID_LENOVO, 0x0623) 10017 }, 10018 { 10019 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10020 0x1e93, 0x1000) 10021 }, 10022 { 10023 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10024 0x1e93, 0x1001) 10025 }, 10026 { 10027 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10028 0x1e93, 0x1002) 10029 }, 10030 { 10031 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10032 PCI_ANY_ID, PCI_ANY_ID) 10033 }, 10034 { 0 } 10035 }; 10036 10037 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table); 10038 10039 static struct pci_driver pqi_pci_driver = { 10040 .name = DRIVER_NAME_SHORT, 10041 .id_table = pqi_pci_id_table, 10042 .probe = pqi_pci_probe, 10043 .remove = pqi_pci_remove, 10044 .shutdown = pqi_shutdown, 10045 #if defined(CONFIG_PM) 10046 .driver = { 10047 .pm = &pqi_pm_ops 10048 }, 10049 #endif 10050 }; 10051 10052 static int __init pqi_init(void) 10053 { 10054 int rc; 10055 10056 pr_info(DRIVER_NAME "\n"); 10057 pqi_verify_structures(); 10058 sis_verify_structures(); 10059 10060 pqi_sas_transport_template = sas_attach_transport(&pqi_sas_transport_functions); 10061 if (!pqi_sas_transport_template) 10062 return -ENODEV; 10063 10064 pqi_process_module_params(); 10065 10066 rc = pci_register_driver(&pqi_pci_driver); 10067 if (rc) 10068 sas_release_transport(pqi_sas_transport_template); 10069 10070 return rc; 10071 } 10072 10073 static void __exit pqi_cleanup(void) 10074 { 10075 pci_unregister_driver(&pqi_pci_driver); 10076 sas_release_transport(pqi_sas_transport_template); 10077 } 10078 10079 module_init(pqi_init); 10080 module_exit(pqi_cleanup); 10081 10082 static void pqi_verify_structures(void) 10083 { 10084 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10085 sis_host_to_ctrl_doorbell) != 0x20); 10086 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10087 sis_interrupt_mask) != 0x34); 10088 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10089 sis_ctrl_to_host_doorbell) != 0x9c); 10090 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10091 sis_ctrl_to_host_doorbell_clear) != 0xa0); 10092 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10093 sis_driver_scratch) != 0xb0); 10094 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10095 sis_product_identifier) != 0xb4); 10096 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10097 sis_firmware_status) != 0xbc); 10098 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10099 sis_ctrl_shutdown_reason_code) != 0xcc); 10100 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10101 sis_mailbox) != 0x1000); 10102 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10103 pqi_registers) != 0x4000); 10104 10105 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10106 iu_type) != 0x0); 10107 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10108 iu_length) != 0x2); 10109 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10110 response_queue_id) != 0x4); 10111 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10112 driver_flags) != 0x6); 10113 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8); 10114 10115 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10116 status) != 0x0); 10117 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10118 service_response) != 0x1); 10119 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10120 data_present) != 0x2); 10121 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10122 reserved) != 0x3); 10123 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10124 residual_count) != 0x4); 10125 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10126 data_length) != 0x8); 10127 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10128 reserved1) != 0xa); 10129 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10130 data) != 0xc); 10131 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c); 10132 10133 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10134 data_in_result) != 0x0); 10135 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10136 data_out_result) != 0x1); 10137 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10138 reserved) != 0x2); 10139 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10140 status) != 0x5); 10141 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10142 status_qualifier) != 0x6); 10143 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10144 sense_data_length) != 0x8); 10145 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10146 response_data_length) != 0xa); 10147 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10148 data_in_transferred) != 0xc); 10149 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10150 data_out_transferred) != 0x10); 10151 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10152 data) != 0x14); 10153 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114); 10154 10155 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10156 signature) != 0x0); 10157 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10158 function_and_status_code) != 0x8); 10159 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10160 max_admin_iq_elements) != 0x10); 10161 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10162 max_admin_oq_elements) != 0x11); 10163 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10164 admin_iq_element_length) != 0x12); 10165 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10166 admin_oq_element_length) != 0x13); 10167 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10168 max_reset_timeout) != 0x14); 10169 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10170 legacy_intx_status) != 0x18); 10171 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10172 legacy_intx_mask_set) != 0x1c); 10173 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10174 legacy_intx_mask_clear) != 0x20); 10175 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10176 device_status) != 0x40); 10177 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10178 admin_iq_pi_offset) != 0x48); 10179 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10180 admin_oq_ci_offset) != 0x50); 10181 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10182 admin_iq_element_array_addr) != 0x58); 10183 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10184 admin_oq_element_array_addr) != 0x60); 10185 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10186 admin_iq_ci_addr) != 0x68); 10187 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10188 admin_oq_pi_addr) != 0x70); 10189 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10190 admin_iq_num_elements) != 0x78); 10191 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10192 admin_oq_num_elements) != 0x79); 10193 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10194 admin_queue_int_msg_num) != 0x7a); 10195 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10196 device_error) != 0x80); 10197 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10198 error_details) != 0x88); 10199 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10200 device_reset) != 0x90); 10201 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10202 power_action) != 0x94); 10203 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100); 10204 10205 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10206 header.iu_type) != 0); 10207 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10208 header.iu_length) != 2); 10209 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10210 header.driver_flags) != 6); 10211 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10212 request_id) != 8); 10213 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10214 function_code) != 10); 10215 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10216 data.report_device_capability.buffer_length) != 44); 10217 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10218 data.report_device_capability.sg_descriptor) != 48); 10219 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10220 data.create_operational_iq.queue_id) != 12); 10221 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10222 data.create_operational_iq.element_array_addr) != 16); 10223 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10224 data.create_operational_iq.ci_addr) != 24); 10225 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10226 data.create_operational_iq.num_elements) != 32); 10227 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10228 data.create_operational_iq.element_length) != 34); 10229 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10230 data.create_operational_iq.queue_protocol) != 36); 10231 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10232 data.create_operational_oq.queue_id) != 12); 10233 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10234 data.create_operational_oq.element_array_addr) != 16); 10235 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10236 data.create_operational_oq.pi_addr) != 24); 10237 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10238 data.create_operational_oq.num_elements) != 32); 10239 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10240 data.create_operational_oq.element_length) != 34); 10241 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10242 data.create_operational_oq.queue_protocol) != 36); 10243 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10244 data.create_operational_oq.int_msg_num) != 40); 10245 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10246 data.create_operational_oq.coalescing_count) != 42); 10247 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10248 data.create_operational_oq.min_coalescing_time) != 44); 10249 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10250 data.create_operational_oq.max_coalescing_time) != 48); 10251 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10252 data.delete_operational_queue.queue_id) != 12); 10253 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64); 10254 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 10255 data.create_operational_iq) != 64 - 11); 10256 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 10257 data.create_operational_oq) != 64 - 11); 10258 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 10259 data.delete_operational_queue) != 64 - 11); 10260 10261 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10262 header.iu_type) != 0); 10263 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10264 header.iu_length) != 2); 10265 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10266 header.driver_flags) != 6); 10267 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10268 request_id) != 8); 10269 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10270 function_code) != 10); 10271 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10272 status) != 11); 10273 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10274 data.create_operational_iq.status_descriptor) != 12); 10275 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10276 data.create_operational_iq.iq_pi_offset) != 16); 10277 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10278 data.create_operational_oq.status_descriptor) != 12); 10279 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10280 data.create_operational_oq.oq_ci_offset) != 16); 10281 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64); 10282 10283 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10284 header.iu_type) != 0); 10285 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10286 header.iu_length) != 2); 10287 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10288 header.response_queue_id) != 4); 10289 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10290 header.driver_flags) != 6); 10291 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10292 request_id) != 8); 10293 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10294 nexus_id) != 10); 10295 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10296 buffer_length) != 12); 10297 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10298 lun_number) != 16); 10299 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10300 protocol_specific) != 24); 10301 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10302 error_index) != 27); 10303 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10304 cdb) != 32); 10305 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10306 timeout) != 60); 10307 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10308 sg_descriptors) != 64); 10309 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) != 10310 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 10311 10312 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10313 header.iu_type) != 0); 10314 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10315 header.iu_length) != 2); 10316 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10317 header.response_queue_id) != 4); 10318 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10319 header.driver_flags) != 6); 10320 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10321 request_id) != 8); 10322 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10323 nexus_id) != 12); 10324 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10325 buffer_length) != 16); 10326 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10327 data_encryption_key_index) != 22); 10328 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10329 encrypt_tweak_lower) != 24); 10330 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10331 encrypt_tweak_upper) != 28); 10332 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10333 cdb) != 32); 10334 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10335 error_index) != 48); 10336 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10337 num_sg_descriptors) != 50); 10338 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10339 cdb_length) != 51); 10340 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10341 lun_number) != 52); 10342 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10343 sg_descriptors) != 64); 10344 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) != 10345 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 10346 10347 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10348 header.iu_type) != 0); 10349 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10350 header.iu_length) != 2); 10351 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10352 request_id) != 8); 10353 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10354 error_index) != 10); 10355 10356 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10357 header.iu_type) != 0); 10358 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10359 header.iu_length) != 2); 10360 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10361 header.response_queue_id) != 4); 10362 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10363 request_id) != 8); 10364 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10365 data.report_event_configuration.buffer_length) != 12); 10366 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10367 data.report_event_configuration.sg_descriptors) != 16); 10368 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10369 data.set_event_configuration.global_event_oq_id) != 10); 10370 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10371 data.set_event_configuration.buffer_length) != 12); 10372 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10373 data.set_event_configuration.sg_descriptors) != 16); 10374 10375 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 10376 max_inbound_iu_length) != 6); 10377 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 10378 max_outbound_iu_length) != 14); 10379 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16); 10380 10381 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10382 data_length) != 0); 10383 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10384 iq_arbitration_priority_support_bitmask) != 8); 10385 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10386 maximum_aw_a) != 9); 10387 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10388 maximum_aw_b) != 10); 10389 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10390 maximum_aw_c) != 11); 10391 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10392 max_inbound_queues) != 16); 10393 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10394 max_elements_per_iq) != 18); 10395 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10396 max_iq_element_length) != 24); 10397 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10398 min_iq_element_length) != 26); 10399 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10400 max_outbound_queues) != 30); 10401 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10402 max_elements_per_oq) != 32); 10403 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10404 intr_coalescing_time_granularity) != 34); 10405 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10406 max_oq_element_length) != 36); 10407 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10408 min_oq_element_length) != 38); 10409 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10410 iu_layer_descriptors) != 64); 10411 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576); 10412 10413 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 10414 event_type) != 0); 10415 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 10416 oq_id) != 2); 10417 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4); 10418 10419 BUILD_BUG_ON(offsetof(struct pqi_event_config, 10420 num_event_descriptors) != 2); 10421 BUILD_BUG_ON(offsetof(struct pqi_event_config, 10422 descriptors) != 4); 10423 10424 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS != 10425 ARRAY_SIZE(pqi_supported_event_types)); 10426 10427 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10428 header.iu_type) != 0); 10429 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10430 header.iu_length) != 2); 10431 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10432 event_type) != 8); 10433 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10434 event_id) != 10); 10435 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10436 additional_event_id) != 12); 10437 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10438 data) != 16); 10439 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32); 10440 10441 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10442 header.iu_type) != 0); 10443 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10444 header.iu_length) != 2); 10445 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10446 event_type) != 8); 10447 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10448 event_id) != 10); 10449 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10450 additional_event_id) != 12); 10451 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16); 10452 10453 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10454 header.iu_type) != 0); 10455 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10456 header.iu_length) != 2); 10457 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10458 request_id) != 8); 10459 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10460 nexus_id) != 10); 10461 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10462 timeout) != 14); 10463 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10464 lun_number) != 16); 10465 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10466 protocol_specific) != 24); 10467 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10468 outbound_queue_id_to_manage) != 26); 10469 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10470 request_id_to_manage) != 28); 10471 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10472 task_management_function) != 30); 10473 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32); 10474 10475 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10476 header.iu_type) != 0); 10477 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10478 header.iu_length) != 2); 10479 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10480 request_id) != 8); 10481 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10482 nexus_id) != 10); 10483 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10484 additional_response_info) != 12); 10485 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10486 response_code) != 15); 10487 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16); 10488 10489 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10490 configured_logical_drive_count) != 0); 10491 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10492 configuration_signature) != 1); 10493 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10494 firmware_version_short) != 5); 10495 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10496 extended_logical_unit_count) != 154); 10497 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10498 firmware_build_number) != 190); 10499 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10500 vendor_id) != 200); 10501 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10502 product_id) != 208); 10503 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10504 extra_controller_flags) != 286); 10505 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10506 controller_mode) != 292); 10507 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10508 spare_part_number) != 293); 10509 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10510 firmware_version_long) != 325); 10511 10512 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10513 phys_bay_in_box) != 115); 10514 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10515 device_type) != 120); 10516 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10517 redundant_path_present_map) != 1736); 10518 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10519 active_path_number) != 1738); 10520 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10521 alternate_paths_phys_connector) != 1739); 10522 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10523 alternate_paths_phys_box_on_port) != 1755); 10524 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10525 current_queue_depth_limit) != 1796); 10526 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560); 10527 10528 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_buffer_header) != 4); 10529 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 10530 page_code) != 0); 10531 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 10532 subpage_code) != 1); 10533 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 10534 buffer_length) != 2); 10535 10536 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_page_header) != 4); 10537 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 10538 page_code) != 0); 10539 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 10540 subpage_code) != 1); 10541 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 10542 page_length) != 2); 10543 10544 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_io_page_aio_subpage) 10545 != 18); 10546 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10547 header) != 0); 10548 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10549 firmware_read_support) != 4); 10550 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10551 driver_read_support) != 5); 10552 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10553 firmware_write_support) != 6); 10554 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10555 driver_write_support) != 7); 10556 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10557 max_transfer_encrypted_sas_sata) != 8); 10558 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10559 max_transfer_encrypted_nvme) != 10); 10560 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10561 max_write_raid_5_6) != 12); 10562 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10563 max_write_raid_1_10_2drive) != 14); 10564 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10565 max_write_raid_1_10_3drive) != 16); 10566 10567 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255); 10568 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255); 10569 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH % 10570 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10571 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH % 10572 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10573 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560); 10574 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH % 10575 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10576 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560); 10577 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH % 10578 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10579 10580 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS); 10581 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= 10582 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP); 10583 } 10584