1 /* 2 * QLogic iSCSI HBA Driver 3 * Copyright (c) 2003-2010 QLogic Corporation 4 * 5 * See LICENSE.qla4xxx for copyright and licensing details. 6 */ 7 8 #ifndef __QL4_DEF_H 9 #define __QL4_DEF_H 10 11 #include <linux/kernel.h> 12 #include <linux/init.h> 13 #include <linux/types.h> 14 #include <linux/module.h> 15 #include <linux/list.h> 16 #include <linux/pci.h> 17 #include <linux/dma-mapping.h> 18 #include <linux/sched.h> 19 #include <linux/slab.h> 20 #include <linux/dmapool.h> 21 #include <linux/mempool.h> 22 #include <linux/spinlock.h> 23 #include <linux/workqueue.h> 24 #include <linux/delay.h> 25 #include <linux/interrupt.h> 26 #include <linux/mutex.h> 27 #include <linux/aer.h> 28 29 #include <net/tcp.h> 30 #include <scsi/scsi.h> 31 #include <scsi/scsi_host.h> 32 #include <scsi/scsi_device.h> 33 #include <scsi/scsi_cmnd.h> 34 #include <scsi/scsi_transport.h> 35 #include <scsi/scsi_transport_iscsi.h> 36 37 #include "ql4_dbg.h" 38 #include "ql4_nx.h" 39 40 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4010 41 #define PCI_DEVICE_ID_QLOGIC_ISP4010 0x4010 42 #endif 43 44 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4022 45 #define PCI_DEVICE_ID_QLOGIC_ISP4022 0x4022 46 #endif 47 48 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4032 49 #define PCI_DEVICE_ID_QLOGIC_ISP4032 0x4032 50 #endif 51 52 #ifndef PCI_DEVICE_ID_QLOGIC_ISP8022 53 #define PCI_DEVICE_ID_QLOGIC_ISP8022 0x8022 54 #endif 55 56 #define QLA_SUCCESS 0 57 #define QLA_ERROR 1 58 59 /* 60 * Data bit definitions 61 */ 62 #define BIT_0 0x1 63 #define BIT_1 0x2 64 #define BIT_2 0x4 65 #define BIT_3 0x8 66 #define BIT_4 0x10 67 #define BIT_5 0x20 68 #define BIT_6 0x40 69 #define BIT_7 0x80 70 #define BIT_8 0x100 71 #define BIT_9 0x200 72 #define BIT_10 0x400 73 #define BIT_11 0x800 74 #define BIT_12 0x1000 75 #define BIT_13 0x2000 76 #define BIT_14 0x4000 77 #define BIT_15 0x8000 78 #define BIT_16 0x10000 79 #define BIT_17 0x20000 80 #define BIT_18 0x40000 81 #define BIT_19 0x80000 82 #define BIT_20 0x100000 83 #define BIT_21 0x200000 84 #define BIT_22 0x400000 85 #define BIT_23 0x800000 86 #define BIT_24 0x1000000 87 #define BIT_25 0x2000000 88 #define BIT_26 0x4000000 89 #define BIT_27 0x8000000 90 #define BIT_28 0x10000000 91 #define BIT_29 0x20000000 92 #define BIT_30 0x40000000 93 #define BIT_31 0x80000000 94 95 /** 96 * Macros to help code, maintain, etc. 97 **/ 98 #define ql4_printk(level, ha, format, arg...) \ 99 dev_printk(level , &((ha)->pdev->dev) , format , ## arg) 100 101 102 /* 103 * Host adapter default definitions 104 ***********************************/ 105 #define MAX_HBAS 16 106 #define MAX_BUSES 1 107 #define MAX_TARGETS MAX_DEV_DB_ENTRIES 108 #define MAX_LUNS 0xffff 109 #define MAX_AEN_ENTRIES 256 /* should be > EXT_DEF_MAX_AEN_QUEUE */ 110 #define MAX_DDB_ENTRIES MAX_DEV_DB_ENTRIES 111 #define MAX_PDU_ENTRIES 32 112 #define INVALID_ENTRY 0xFFFF 113 #define MAX_CMDS_TO_RISC 1024 114 #define MAX_SRBS MAX_CMDS_TO_RISC 115 #define MBOX_AEN_REG_COUNT 5 116 #define MAX_INIT_RETRIES 5 117 118 /* 119 * Buffer sizes 120 */ 121 #define REQUEST_QUEUE_DEPTH MAX_CMDS_TO_RISC 122 #define RESPONSE_QUEUE_DEPTH 64 123 #define QUEUE_SIZE 64 124 #define DMA_BUFFER_SIZE 512 125 126 /* 127 * Misc 128 */ 129 #define MAC_ADDR_LEN 6 /* in bytes */ 130 #define IP_ADDR_LEN 4 /* in bytes */ 131 #define IPv6_ADDR_LEN 16 /* IPv6 address size */ 132 #define DRIVER_NAME "qla4xxx" 133 134 #define MAX_LINKED_CMDS_PER_LUN 3 135 #define MAX_REQS_SERVICED_PER_INTR 1 136 137 #define ISCSI_IPADDR_SIZE 4 /* IP address size */ 138 #define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */ 139 #define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */ 140 141 #define QL4_SESS_RECOVERY_TMO 30 /* iSCSI session */ 142 /* recovery timeout */ 143 144 #define LSDW(x) ((u32)((u64)(x))) 145 #define MSDW(x) ((u32)((((u64)(x)) >> 16) >> 16)) 146 147 /* 148 * Retry & Timeout Values 149 */ 150 #define MBOX_TOV 60 151 #define SOFT_RESET_TOV 30 152 #define RESET_INTR_TOV 3 153 #define SEMAPHORE_TOV 10 154 #define ADAPTER_INIT_TOV 30 155 #define ADAPTER_RESET_TOV 180 156 #define EXTEND_CMD_TOV 60 157 #define WAIT_CMD_TOV 30 158 #define EH_WAIT_CMD_TOV 120 159 #define FIRMWARE_UP_TOV 60 160 #define RESET_FIRMWARE_TOV 30 161 #define LOGOUT_TOV 10 162 #define IOCB_TOV_MARGIN 10 163 #define RELOGIN_TOV 18 164 #define ISNS_DEREG_TOV 5 165 #define HBA_ONLINE_TOV 30 166 167 #define MAX_RESET_HA_RETRIES 2 168 169 #define CMD_SP(Cmnd) ((Cmnd)->SCp.ptr) 170 171 /* 172 * SCSI Request Block structure (srb) that is placed 173 * on cmd->SCp location of every I/O [We have 22 bytes available] 174 */ 175 struct srb { 176 struct list_head list; /* (8) */ 177 struct scsi_qla_host *ha; /* HA the SP is queued on */ 178 struct ddb_entry *ddb; 179 uint16_t flags; /* (1) Status flags. */ 180 181 #define SRB_DMA_VALID BIT_3 /* DMA Buffer mapped. */ 182 #define SRB_GOT_SENSE BIT_4 /* sense data recieved. */ 183 uint8_t state; /* (1) Status flags. */ 184 185 #define SRB_NO_QUEUE_STATE 0 /* Request is in between states */ 186 #define SRB_FREE_STATE 1 187 #define SRB_ACTIVE_STATE 3 188 #define SRB_ACTIVE_TIMEOUT_STATE 4 189 #define SRB_SUSPENDED_STATE 7 /* Request in suspended state */ 190 191 struct scsi_cmnd *cmd; /* (4) SCSI command block */ 192 dma_addr_t dma_handle; /* (4) for unmap of single transfers */ 193 struct kref srb_ref; /* reference count for this srb */ 194 uint8_t err_id; /* error id */ 195 #define SRB_ERR_PORT 1 /* Request failed because "port down" */ 196 #define SRB_ERR_LOOP 2 /* Request failed because "loop down" */ 197 #define SRB_ERR_DEVICE 3 /* Request failed because "device error" */ 198 #define SRB_ERR_OTHER 4 199 200 uint16_t reserved; 201 uint16_t iocb_tov; 202 uint16_t iocb_cnt; /* Number of used iocbs */ 203 uint16_t cc_stat; 204 205 /* Used for extended sense / status continuation */ 206 uint8_t *req_sense_ptr; 207 uint16_t req_sense_len; 208 uint16_t reserved2; 209 }; 210 211 /* 212 * Asynchronous Event Queue structure 213 */ 214 struct aen { 215 uint32_t mbox_sts[MBOX_AEN_REG_COUNT]; 216 }; 217 218 struct ql4_aen_log { 219 int count; 220 struct aen entry[MAX_AEN_ENTRIES]; 221 }; 222 223 /* 224 * Device Database (DDB) structure 225 */ 226 struct ddb_entry { 227 struct list_head list; /* ddb list */ 228 struct scsi_qla_host *ha; 229 struct iscsi_cls_session *sess; 230 struct iscsi_cls_conn *conn; 231 232 atomic_t state; /* DDB State */ 233 234 unsigned long flags; /* DDB Flags */ 235 236 unsigned long dev_scan_wait_to_start_relogin; 237 unsigned long dev_scan_wait_to_complete_relogin; 238 239 uint16_t fw_ddb_index; /* DDB firmware index */ 240 uint16_t options; 241 uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */ 242 243 uint32_t CmdSn; 244 uint16_t target_session_id; 245 uint16_t connection_id; 246 uint16_t exe_throttle; /* Max mumber of cmds outstanding 247 * simultaneously */ 248 uint16_t task_mgmt_timeout; /* Min time for task mgmt cmds to 249 * complete */ 250 uint16_t default_relogin_timeout; /* Max time to wait for 251 * relogin to complete */ 252 uint16_t tcp_source_port_num; 253 uint32_t default_time2wait; /* Default Min time between 254 * relogins (+aens) */ 255 256 atomic_t retry_relogin_timer; /* Min Time between relogins 257 * (4000 only) */ 258 atomic_t relogin_timer; /* Max Time to wait for relogin to complete */ 259 atomic_t relogin_retry_count; /* Num of times relogin has been 260 * retried */ 261 262 uint16_t port; 263 uint32_t tpgt; 264 uint8_t ip_addr[IP_ADDR_LEN]; 265 uint8_t iscsi_name[ISCSI_NAME_SIZE]; /* 72 x48 */ 266 uint8_t iscsi_alias[0x20]; 267 uint8_t isid[6]; 268 uint16_t iscsi_max_burst_len; 269 uint16_t iscsi_max_outsnd_r2t; 270 uint16_t iscsi_first_burst_len; 271 uint16_t iscsi_max_rcv_data_seg_len; 272 uint16_t iscsi_max_snd_data_seg_len; 273 274 struct in6_addr remote_ipv6_addr; 275 struct in6_addr link_local_ipv6_addr; 276 }; 277 278 /* 279 * DDB states. 280 */ 281 #define DDB_STATE_DEAD 0 /* We can no longer talk to 282 * this device */ 283 #define DDB_STATE_ONLINE 1 /* Device ready to accept 284 * commands */ 285 #define DDB_STATE_MISSING 2 /* Device logged off, trying 286 * to re-login */ 287 288 /* 289 * DDB flags. 290 */ 291 #define DF_RELOGIN 0 /* Relogin to device */ 292 #define DF_NO_RELOGIN 1 /* Do not relogin if IOCTL 293 * logged it out */ 294 #define DF_ISNS_DISCOVERED 2 /* Device was discovered via iSNS */ 295 #define DF_FO_MASKED 3 296 297 298 #include "ql4_fw.h" 299 #include "ql4_nvram.h" 300 301 struct ql82xx_hw_data { 302 /* Offsets for flash/nvram access (set to ~0 if not used). */ 303 uint32_t flash_conf_off; 304 uint32_t flash_data_off; 305 306 uint32_t fdt_wrt_disable; 307 uint32_t fdt_erase_cmd; 308 uint32_t fdt_block_size; 309 uint32_t fdt_unprotect_sec_cmd; 310 uint32_t fdt_protect_sec_cmd; 311 312 uint32_t flt_region_flt; 313 uint32_t flt_region_fdt; 314 uint32_t flt_region_boot; 315 uint32_t flt_region_bootload; 316 uint32_t flt_region_fw; 317 uint32_t reserved; 318 }; 319 320 struct qla4_8xxx_legacy_intr_set { 321 uint32_t int_vec_bit; 322 uint32_t tgt_status_reg; 323 uint32_t tgt_mask_reg; 324 uint32_t pci_int_reg; 325 }; 326 327 /* MSI-X Support */ 328 329 #define QLA_MSIX_DEFAULT 0x00 330 #define QLA_MSIX_RSP_Q 0x01 331 332 #define QLA_MSIX_ENTRIES 2 333 #define QLA_MIDX_DEFAULT 0 334 #define QLA_MIDX_RSP_Q 1 335 336 struct ql4_msix_entry { 337 int have_irq; 338 uint16_t msix_vector; 339 uint16_t msix_entry; 340 }; 341 342 /* 343 * ISP Operations 344 */ 345 struct isp_operations { 346 int (*iospace_config) (struct scsi_qla_host *ha); 347 void (*pci_config) (struct scsi_qla_host *); 348 void (*disable_intrs) (struct scsi_qla_host *); 349 void (*enable_intrs) (struct scsi_qla_host *); 350 int (*start_firmware) (struct scsi_qla_host *); 351 irqreturn_t (*intr_handler) (int , void *); 352 void (*interrupt_service_routine) (struct scsi_qla_host *, uint32_t); 353 int (*reset_chip) (struct scsi_qla_host *); 354 int (*reset_firmware) (struct scsi_qla_host *); 355 void (*queue_iocb) (struct scsi_qla_host *); 356 void (*complete_iocb) (struct scsi_qla_host *); 357 uint16_t (*rd_shdw_req_q_out) (struct scsi_qla_host *); 358 uint16_t (*rd_shdw_rsp_q_in) (struct scsi_qla_host *); 359 int (*get_sys_info) (struct scsi_qla_host *); 360 }; 361 362 /* 363 * Linux Host Adapter structure 364 */ 365 struct scsi_qla_host { 366 /* Linux adapter configuration data */ 367 unsigned long flags; 368 369 #define AF_ONLINE 0 /* 0x00000001 */ 370 #define AF_INIT_DONE 1 /* 0x00000002 */ 371 #define AF_MBOX_COMMAND 2 /* 0x00000004 */ 372 #define AF_MBOX_COMMAND_DONE 3 /* 0x00000008 */ 373 #define AF_DPC_SCHEDULED 5 /* 0x00000020 */ 374 #define AF_INTERRUPTS_ON 6 /* 0x00000040 */ 375 #define AF_GET_CRASH_RECORD 7 /* 0x00000080 */ 376 #define AF_LINK_UP 8 /* 0x00000100 */ 377 #define AF_IRQ_ATTACHED 10 /* 0x00000400 */ 378 #define AF_DISABLE_ACB_COMPLETE 11 /* 0x00000800 */ 379 #define AF_HBA_GOING_AWAY 12 /* 0x00001000 */ 380 #define AF_INTx_ENABLED 15 /* 0x00008000 */ 381 #define AF_MSI_ENABLED 16 /* 0x00010000 */ 382 #define AF_MSIX_ENABLED 17 /* 0x00020000 */ 383 #define AF_MBOX_COMMAND_NOPOLL 18 /* 0x00040000 */ 384 #define AF_FW_RECOVERY 19 /* 0x00080000 */ 385 #define AF_EEH_BUSY 20 /* 0x00100000 */ 386 #define AF_PCI_CHANNEL_IO_PERM_FAILURE 21 /* 0x00200000 */ 387 388 unsigned long dpc_flags; 389 390 #define DPC_RESET_HA 1 /* 0x00000002 */ 391 #define DPC_RETRY_RESET_HA 2 /* 0x00000004 */ 392 #define DPC_RELOGIN_DEVICE 3 /* 0x00000008 */ 393 #define DPC_RESET_HA_FW_CONTEXT 4 /* 0x00000010 */ 394 #define DPC_RESET_HA_INTR 5 /* 0x00000020 */ 395 #define DPC_ISNS_RESTART 7 /* 0x00000080 */ 396 #define DPC_AEN 9 /* 0x00000200 */ 397 #define DPC_GET_DHCP_IP_ADDR 15 /* 0x00008000 */ 398 #define DPC_LINK_CHANGED 18 /* 0x00040000 */ 399 #define DPC_RESET_ACTIVE 20 /* 0x00040000 */ 400 #define DPC_HA_UNRECOVERABLE 21 /* 0x00080000 ISP-82xx only*/ 401 #define DPC_HA_NEED_QUIESCENT 22 /* 0x00100000 ISP-82xx only*/ 402 403 404 struct Scsi_Host *host; /* pointer to host data */ 405 uint32_t tot_ddbs; 406 407 uint16_t iocb_cnt; 408 409 /* SRB cache. */ 410 #define SRB_MIN_REQ 128 411 mempool_t *srb_mempool; 412 413 /* pci information */ 414 struct pci_dev *pdev; 415 416 struct isp_reg __iomem *reg; /* Base I/O address */ 417 unsigned long pio_address; 418 unsigned long pio_length; 419 #define MIN_IOBASE_LEN 0x100 420 421 uint16_t req_q_count; 422 423 unsigned long host_no; 424 425 /* NVRAM registers */ 426 struct eeprom_data *nvram; 427 spinlock_t hardware_lock ____cacheline_aligned; 428 uint32_t eeprom_cmd_data; 429 430 /* Counters for general statistics */ 431 uint64_t isr_count; 432 uint64_t adapter_error_count; 433 uint64_t device_error_count; 434 uint64_t total_io_count; 435 uint64_t total_mbytes_xferred; 436 uint64_t link_failure_count; 437 uint64_t invalid_crc_count; 438 uint32_t bytes_xfered; 439 uint32_t spurious_int_count; 440 uint32_t aborted_io_count; 441 uint32_t io_timeout_count; 442 uint32_t mailbox_timeout_count; 443 uint32_t seconds_since_last_intr; 444 uint32_t seconds_since_last_heartbeat; 445 uint32_t mac_index; 446 447 /* Info Needed for Management App */ 448 /* --- From GetFwVersion --- */ 449 uint32_t firmware_version[2]; 450 uint32_t patch_number; 451 uint32_t build_number; 452 uint32_t board_id; 453 454 /* --- From Init_FW --- */ 455 /* init_cb_t *init_cb; */ 456 uint16_t firmware_options; 457 uint16_t tcp_options; 458 uint8_t ip_address[IP_ADDR_LEN]; 459 uint8_t subnet_mask[IP_ADDR_LEN]; 460 uint8_t gateway[IP_ADDR_LEN]; 461 uint8_t alias[32]; 462 uint8_t name_string[256]; 463 uint8_t heartbeat_interval; 464 465 /* --- From FlashSysInfo --- */ 466 uint8_t my_mac[MAC_ADDR_LEN]; 467 uint8_t serial_number[16]; 468 469 /* --- From GetFwState --- */ 470 uint32_t firmware_state; 471 uint32_t addl_fw_state; 472 473 /* Linux kernel thread */ 474 struct workqueue_struct *dpc_thread; 475 struct work_struct dpc_work; 476 477 /* Linux timer thread */ 478 struct timer_list timer; 479 uint32_t timer_active; 480 481 /* Recovery Timers */ 482 uint32_t discovery_wait; 483 atomic_t check_relogin_timeouts; 484 uint32_t retry_reset_ha_cnt; 485 uint32_t isp_reset_timer; /* reset test timer */ 486 uint32_t nic_reset_timer; /* simulated nic reset test timer */ 487 int eh_start; 488 struct list_head free_srb_q; 489 uint16_t free_srb_q_count; 490 uint16_t num_srbs_allocated; 491 492 /* DMA Memory Block */ 493 void *queues; 494 dma_addr_t queues_dma; 495 unsigned long queues_len; 496 497 #define MEM_ALIGN_VALUE \ 498 ((max(REQUEST_QUEUE_DEPTH, RESPONSE_QUEUE_DEPTH)) * \ 499 sizeof(struct queue_entry)) 500 /* request and response queue variables */ 501 dma_addr_t request_dma; 502 struct queue_entry *request_ring; 503 struct queue_entry *request_ptr; 504 dma_addr_t response_dma; 505 struct queue_entry *response_ring; 506 struct queue_entry *response_ptr; 507 dma_addr_t shadow_regs_dma; 508 struct shadow_regs *shadow_regs; 509 uint16_t request_in; /* Current indexes. */ 510 uint16_t request_out; 511 uint16_t response_in; 512 uint16_t response_out; 513 514 /* aen queue variables */ 515 uint16_t aen_q_count; /* Number of available aen_q entries */ 516 uint16_t aen_in; /* Current indexes */ 517 uint16_t aen_out; 518 struct aen aen_q[MAX_AEN_ENTRIES]; 519 520 struct ql4_aen_log aen_log;/* tracks all aens */ 521 522 /* This mutex protects several threads to do mailbox commands 523 * concurrently. 524 */ 525 struct mutex mbox_sem; 526 527 /* temporary mailbox status registers */ 528 volatile uint8_t mbox_status_count; 529 volatile uint32_t mbox_status[MBOX_REG_COUNT]; 530 531 /* local device database list (contains internal ddb entries) */ 532 struct list_head ddb_list; 533 534 /* Map ddb_list entry by FW ddb index */ 535 struct ddb_entry *fw_ddb_index_map[MAX_DDB_ENTRIES]; 536 537 /* Saved srb for status continuation entry processing */ 538 struct srb *status_srb; 539 540 /* IPv6 support info from InitFW */ 541 uint8_t acb_version; 542 uint8_t ipv4_addr_state; 543 uint16_t ipv4_options; 544 545 uint32_t resvd2; 546 uint32_t ipv6_options; 547 uint32_t ipv6_addl_options; 548 uint8_t ipv6_link_local_state; 549 uint8_t ipv6_addr0_state; 550 uint8_t ipv6_addr1_state; 551 uint8_t ipv6_default_router_state; 552 struct in6_addr ipv6_link_local_addr; 553 struct in6_addr ipv6_addr0; 554 struct in6_addr ipv6_addr1; 555 struct in6_addr ipv6_default_router_addr; 556 557 /* qla82xx specific fields */ 558 struct device_reg_82xx __iomem *qla4_8xxx_reg; /* Base I/O address */ 559 unsigned long nx_pcibase; /* Base I/O address */ 560 uint8_t *nx_db_rd_ptr; /* Doorbell read pointer */ 561 unsigned long nx_db_wr_ptr; /* Door bell write pointer */ 562 unsigned long first_page_group_start; 563 unsigned long first_page_group_end; 564 565 uint32_t crb_win; 566 uint32_t curr_window; 567 uint32_t ddr_mn_window; 568 unsigned long mn_win_crb; 569 unsigned long ms_win_crb; 570 int qdr_sn_window; 571 rwlock_t hw_lock; 572 uint16_t func_num; 573 int link_width; 574 575 struct qla4_8xxx_legacy_intr_set nx_legacy_intr; 576 u32 nx_crb_mask; 577 578 uint8_t revision_id; 579 uint32_t fw_heartbeat_counter; 580 581 struct isp_operations *isp_ops; 582 struct ql82xx_hw_data hw; 583 584 struct ql4_msix_entry msix_entries[QLA_MSIX_ENTRIES]; 585 586 uint32_t nx_dev_init_timeout; 587 uint32_t nx_reset_timeout; 588 589 struct completion mbx_intr_comp; 590 }; 591 592 static inline int is_ipv4_enabled(struct scsi_qla_host *ha) 593 { 594 return ((ha->ipv4_options & IPOPT_IPv4_PROTOCOL_ENABLE) != 0); 595 } 596 597 static inline int is_ipv6_enabled(struct scsi_qla_host *ha) 598 { 599 return ((ha->ipv6_options & IPV6_OPT_IPV6_PROTOCOL_ENABLE) != 0); 600 } 601 602 static inline int is_qla4010(struct scsi_qla_host *ha) 603 { 604 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4010; 605 } 606 607 static inline int is_qla4022(struct scsi_qla_host *ha) 608 { 609 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4022; 610 } 611 612 static inline int is_qla4032(struct scsi_qla_host *ha) 613 { 614 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4032; 615 } 616 617 static inline int is_qla8022(struct scsi_qla_host *ha) 618 { 619 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8022; 620 } 621 622 /* Note: Currently AER/EEH is now supported only for 8022 cards 623 * This function needs to be updated when AER/EEH is enabled 624 * for other cards. 625 */ 626 static inline int is_aer_supported(struct scsi_qla_host *ha) 627 { 628 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8022; 629 } 630 631 static inline int adapter_up(struct scsi_qla_host *ha) 632 { 633 return (test_bit(AF_ONLINE, &ha->flags) != 0) && 634 (test_bit(AF_LINK_UP, &ha->flags) != 0); 635 } 636 637 static inline struct scsi_qla_host* to_qla_host(struct Scsi_Host *shost) 638 { 639 return (struct scsi_qla_host *)shost->hostdata; 640 } 641 642 static inline void __iomem* isp_semaphore(struct scsi_qla_host *ha) 643 { 644 return (is_qla4010(ha) ? 645 &ha->reg->u1.isp4010.nvram : 646 &ha->reg->u1.isp4022.semaphore); 647 } 648 649 static inline void __iomem* isp_nvram(struct scsi_qla_host *ha) 650 { 651 return (is_qla4010(ha) ? 652 &ha->reg->u1.isp4010.nvram : 653 &ha->reg->u1.isp4022.nvram); 654 } 655 656 static inline void __iomem* isp_ext_hw_conf(struct scsi_qla_host *ha) 657 { 658 return (is_qla4010(ha) ? 659 &ha->reg->u2.isp4010.ext_hw_conf : 660 &ha->reg->u2.isp4022.p0.ext_hw_conf); 661 } 662 663 static inline void __iomem* isp_port_status(struct scsi_qla_host *ha) 664 { 665 return (is_qla4010(ha) ? 666 &ha->reg->u2.isp4010.port_status : 667 &ha->reg->u2.isp4022.p0.port_status); 668 } 669 670 static inline void __iomem* isp_port_ctrl(struct scsi_qla_host *ha) 671 { 672 return (is_qla4010(ha) ? 673 &ha->reg->u2.isp4010.port_ctrl : 674 &ha->reg->u2.isp4022.p0.port_ctrl); 675 } 676 677 static inline void __iomem* isp_port_error_status(struct scsi_qla_host *ha) 678 { 679 return (is_qla4010(ha) ? 680 &ha->reg->u2.isp4010.port_err_status : 681 &ha->reg->u2.isp4022.p0.port_err_status); 682 } 683 684 static inline void __iomem * isp_gp_out(struct scsi_qla_host *ha) 685 { 686 return (is_qla4010(ha) ? 687 &ha->reg->u2.isp4010.gp_out : 688 &ha->reg->u2.isp4022.p0.gp_out); 689 } 690 691 static inline int eeprom_ext_hw_conf_offset(struct scsi_qla_host *ha) 692 { 693 return (is_qla4010(ha) ? 694 offsetof(struct eeprom_data, isp4010.ext_hw_conf) / 2 : 695 offsetof(struct eeprom_data, isp4022.ext_hw_conf) / 2); 696 } 697 698 int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits); 699 void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask); 700 int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits); 701 702 static inline int ql4xxx_lock_flash(struct scsi_qla_host *a) 703 { 704 if (is_qla4010(a)) 705 return ql4xxx_sem_spinlock(a, QL4010_FLASH_SEM_MASK, 706 QL4010_FLASH_SEM_BITS); 707 else 708 return ql4xxx_sem_spinlock(a, QL4022_FLASH_SEM_MASK, 709 (QL4022_RESOURCE_BITS_BASE_CODE | 710 (a->mac_index)) << 13); 711 } 712 713 static inline void ql4xxx_unlock_flash(struct scsi_qla_host *a) 714 { 715 if (is_qla4010(a)) 716 ql4xxx_sem_unlock(a, QL4010_FLASH_SEM_MASK); 717 else 718 ql4xxx_sem_unlock(a, QL4022_FLASH_SEM_MASK); 719 } 720 721 static inline int ql4xxx_lock_nvram(struct scsi_qla_host *a) 722 { 723 if (is_qla4010(a)) 724 return ql4xxx_sem_spinlock(a, QL4010_NVRAM_SEM_MASK, 725 QL4010_NVRAM_SEM_BITS); 726 else 727 return ql4xxx_sem_spinlock(a, QL4022_NVRAM_SEM_MASK, 728 (QL4022_RESOURCE_BITS_BASE_CODE | 729 (a->mac_index)) << 10); 730 } 731 732 static inline void ql4xxx_unlock_nvram(struct scsi_qla_host *a) 733 { 734 if (is_qla4010(a)) 735 ql4xxx_sem_unlock(a, QL4010_NVRAM_SEM_MASK); 736 else 737 ql4xxx_sem_unlock(a, QL4022_NVRAM_SEM_MASK); 738 } 739 740 static inline int ql4xxx_lock_drvr(struct scsi_qla_host *a) 741 { 742 if (is_qla4010(a)) 743 return ql4xxx_sem_lock(a, QL4010_DRVR_SEM_MASK, 744 QL4010_DRVR_SEM_BITS); 745 else 746 return ql4xxx_sem_lock(a, QL4022_DRVR_SEM_MASK, 747 (QL4022_RESOURCE_BITS_BASE_CODE | 748 (a->mac_index)) << 1); 749 } 750 751 static inline void ql4xxx_unlock_drvr(struct scsi_qla_host *a) 752 { 753 if (is_qla4010(a)) 754 ql4xxx_sem_unlock(a, QL4010_DRVR_SEM_MASK); 755 else 756 ql4xxx_sem_unlock(a, QL4022_DRVR_SEM_MASK); 757 } 758 759 /*---------------------------------------------------------------------------*/ 760 761 /* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */ 762 #define PRESERVE_DDB_LIST 0 763 #define REBUILD_DDB_LIST 1 764 765 /* Defines for process_aen() */ 766 #define PROCESS_ALL_AENS 0 767 #define FLUSH_DDB_CHANGED_AENS 1 768 #define RELOGIN_DDB_CHANGED_AENS 2 769 770 #endif /*_QLA4XXX_H */ 771