xref: /openbmc/linux/drivers/scsi/qla4xxx/ql4_def.h (revision 22246614)
1 /*
2  * QLogic iSCSI HBA Driver
3  * Copyright (c)  2003-2006 QLogic Corporation
4  *
5  * See LICENSE.qla4xxx for copyright and licensing details.
6  */
7 
8 #ifndef __QL4_DEF_H
9 #define __QL4_DEF_H
10 
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/types.h>
14 #include <linux/module.h>
15 #include <linux/list.h>
16 #include <linux/pci.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/sched.h>
19 #include <linux/slab.h>
20 #include <linux/dmapool.h>
21 #include <linux/mempool.h>
22 #include <linux/spinlock.h>
23 #include <linux/workqueue.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/mutex.h>
27 
28 #include <net/tcp.h>
29 #include <scsi/scsi.h>
30 #include <scsi/scsi_host.h>
31 #include <scsi/scsi_device.h>
32 #include <scsi/scsi_cmnd.h>
33 #include <scsi/scsi_transport.h>
34 #include <scsi/scsi_transport_iscsi.h>
35 
36 
37 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4010
38 #define PCI_DEVICE_ID_QLOGIC_ISP4010	0x4010
39 #endif
40 
41 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4022
42 #define PCI_DEVICE_ID_QLOGIC_ISP4022	0x4022
43 #endif
44 
45 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4032
46 #define PCI_DEVICE_ID_QLOGIC_ISP4032	0x4032
47 #endif
48 
49 #define QLA_SUCCESS			0
50 #define QLA_ERROR			1
51 
52 /*
53  * Data bit definitions
54  */
55 #define BIT_0	0x1
56 #define BIT_1	0x2
57 #define BIT_2	0x4
58 #define BIT_3	0x8
59 #define BIT_4	0x10
60 #define BIT_5	0x20
61 #define BIT_6	0x40
62 #define BIT_7	0x80
63 #define BIT_8	0x100
64 #define BIT_9	0x200
65 #define BIT_10	0x400
66 #define BIT_11	0x800
67 #define BIT_12	0x1000
68 #define BIT_13	0x2000
69 #define BIT_14	0x4000
70 #define BIT_15	0x8000
71 #define BIT_16	0x10000
72 #define BIT_17	0x20000
73 #define BIT_18	0x40000
74 #define BIT_19	0x80000
75 #define BIT_20	0x100000
76 #define BIT_21	0x200000
77 #define BIT_22	0x400000
78 #define BIT_23	0x800000
79 #define BIT_24	0x1000000
80 #define BIT_25	0x2000000
81 #define BIT_26	0x4000000
82 #define BIT_27	0x8000000
83 #define BIT_28	0x10000000
84 #define BIT_29	0x20000000
85 #define BIT_30	0x40000000
86 #define BIT_31	0x80000000
87 
88 /*
89  * Host adapter default definitions
90  ***********************************/
91 #define MAX_HBAS		16
92 #define MAX_BUSES		1
93 #define MAX_TARGETS		(MAX_PRST_DEV_DB_ENTRIES +  MAX_DEV_DB_ENTRIES)
94 #define MAX_LUNS		0xffff
95 #define MAX_AEN_ENTRIES		256 /* should be > EXT_DEF_MAX_AEN_QUEUE */
96 #define MAX_DDB_ENTRIES		(MAX_PRST_DEV_DB_ENTRIES + MAX_DEV_DB_ENTRIES)
97 #define MAX_PDU_ENTRIES		32
98 #define INVALID_ENTRY		0xFFFF
99 #define MAX_CMDS_TO_RISC	1024
100 #define MAX_SRBS		MAX_CMDS_TO_RISC
101 #define MBOX_AEN_REG_COUNT	5
102 #define MAX_INIT_RETRIES	5
103 #define IOCB_HIWAT_CUSHION	16
104 
105 /*
106  * Buffer sizes
107  */
108 #define REQUEST_QUEUE_DEPTH		MAX_CMDS_TO_RISC
109 #define RESPONSE_QUEUE_DEPTH		64
110 #define QUEUE_SIZE			64
111 #define DMA_BUFFER_SIZE			512
112 
113 /*
114  * Misc
115  */
116 #define MAC_ADDR_LEN			6	/* in bytes */
117 #define IP_ADDR_LEN			4	/* in bytes */
118 #define DRIVER_NAME			"qla4xxx"
119 
120 #define MAX_LINKED_CMDS_PER_LUN		3
121 #define MAX_REQS_SERVICED_PER_INTR	16
122 
123 #define ISCSI_IPADDR_SIZE		4	/* IP address size */
124 #define ISCSI_ALIAS_SIZE		32	/* ISCSI Alias name size */
125 #define ISCSI_NAME_SIZE			0xE0	/* ISCSI Name size */
126 
127 #define LSDW(x) ((u32)((u64)(x)))
128 #define MSDW(x) ((u32)((((u64)(x)) >> 16) >> 16))
129 
130 /*
131  * Retry & Timeout Values
132  */
133 #define MBOX_TOV			60
134 #define SOFT_RESET_TOV			30
135 #define RESET_INTR_TOV			3
136 #define SEMAPHORE_TOV			10
137 #define ADAPTER_INIT_TOV		120
138 #define ADAPTER_RESET_TOV		180
139 #define EXTEND_CMD_TOV			60
140 #define WAIT_CMD_TOV			30
141 #define EH_WAIT_CMD_TOV			120
142 #define FIRMWARE_UP_TOV			60
143 #define RESET_FIRMWARE_TOV		30
144 #define LOGOUT_TOV			10
145 #define IOCB_TOV_MARGIN			10
146 #define RELOGIN_TOV			18
147 #define ISNS_DEREG_TOV			5
148 
149 #define MAX_RESET_HA_RETRIES		2
150 
151 /*
152  * SCSI Request Block structure	 (srb)	that is placed
153  * on cmd->SCp location of every I/O	 [We have 22 bytes available]
154  */
155 struct srb {
156 	struct list_head list;	/* (8)	 */
157 	struct scsi_qla_host *ha;	/* HA the SP is queued on */
158 	struct ddb_entry	*ddb;
159 	uint16_t flags;		/* (1) Status flags. */
160 
161 #define SRB_DMA_VALID		BIT_3	/* DMA Buffer mapped. */
162 #define SRB_GOT_SENSE		BIT_4	/* sense data recieved. */
163 	uint8_t state;		/* (1) Status flags. */
164 
165 #define SRB_NO_QUEUE_STATE	 0	/* Request is in between states */
166 #define SRB_FREE_STATE		 1
167 #define SRB_ACTIVE_STATE	 3
168 #define SRB_ACTIVE_TIMEOUT_STATE 4
169 #define SRB_SUSPENDED_STATE	 7	/* Request in suspended state */
170 
171 	struct scsi_cmnd *cmd;	/* (4) SCSI command block */
172 	dma_addr_t dma_handle;	/* (4) for unmap of single transfers */
173 	atomic_t ref_count;	/* reference count for this srb */
174 	uint32_t fw_ddb_index;
175 	uint8_t err_id;		/* error id */
176 #define SRB_ERR_PORT	   1	/* Request failed because "port down" */
177 #define SRB_ERR_LOOP	   2	/* Request failed because "loop down" */
178 #define SRB_ERR_DEVICE	   3	/* Request failed because "device error" */
179 #define SRB_ERR_OTHER	   4
180 
181 	uint16_t reserved;
182 	uint16_t iocb_tov;
183 	uint16_t iocb_cnt;	/* Number of used iocbs */
184 	uint16_t cc_stat;
185 	u_long r_start;		/* Time we recieve a cmd from OS */
186 	u_long u_start;		/* Time when we handed the cmd to F/W */
187 };
188 
189 /*
190  * Asynchronous Event Queue structure
191  */
192 struct aen {
193         uint32_t mbox_sts[MBOX_AEN_REG_COUNT];
194 };
195 
196 struct ql4_aen_log {
197         int count;
198         struct aen entry[MAX_AEN_ENTRIES];
199 };
200 
201 /*
202  * Device Database (DDB) structure
203  */
204 struct ddb_entry {
205 	struct list_head list;	/* ddb list */
206 	struct scsi_qla_host *ha;
207 	struct iscsi_cls_session *sess;
208 	struct iscsi_cls_conn *conn;
209 
210 	atomic_t state;		/* DDB State */
211 
212 	unsigned long flags;	/* DDB Flags */
213 
214 	unsigned long dev_scan_wait_to_start_relogin;
215 	unsigned long dev_scan_wait_to_complete_relogin;
216 
217 	uint16_t os_target_id;	/* Target ID */
218 	uint16_t fw_ddb_index;	/* DDB firmware index */
219 	uint8_t reserved[2];
220 	uint32_t fw_ddb_device_state; /* F/W Device State  -- see ql4_fw.h */
221 
222 	uint32_t CmdSn;
223 	uint16_t target_session_id;
224 	uint16_t connection_id;
225 	uint16_t exe_throttle;	/* Max mumber of cmds outstanding
226 				 * simultaneously */
227 	uint16_t task_mgmt_timeout; /* Min time for task mgmt cmds to
228 				     * complete */
229 	uint16_t default_relogin_timeout; /*  Max time to wait for
230 					   *  relogin to complete */
231 	uint16_t tcp_source_port_num;
232 	uint32_t default_time2wait; /* Default Min time between
233 				     * relogins (+aens) */
234 
235 	atomic_t port_down_timer; /* Device connection timer */
236 	atomic_t retry_relogin_timer; /* Min Time between relogins
237 				       * (4000 only) */
238 	atomic_t relogin_timer;	/* Max Time to wait for relogin to complete */
239 	atomic_t relogin_retry_count; /* Num of times relogin has been
240 				       * retried */
241 
242 	uint16_t port;
243 	uint32_t tpgt;
244 	uint8_t ip_addr[ISCSI_IPADDR_SIZE];
245 	uint8_t iscsi_name[ISCSI_NAME_SIZE];	/* 72 x48 */
246 	uint8_t iscsi_alias[0x20];
247 };
248 
249 /*
250  * DDB states.
251  */
252 #define DDB_STATE_DEAD		0	/* We can no longer talk to
253 					 * this device */
254 #define DDB_STATE_ONLINE	1	/* Device ready to accept
255 					 * commands */
256 #define DDB_STATE_MISSING	2	/* Device logged off, trying
257 					 * to re-login */
258 
259 /*
260  * DDB flags.
261  */
262 #define DF_RELOGIN		0	/* Relogin to device */
263 #define DF_NO_RELOGIN		1	/* Do not relogin if IOCTL
264 					 * logged it out */
265 #define DF_ISNS_DISCOVERED	2	/* Device was discovered via iSNS */
266 #define DF_FO_MASKED		3
267 
268 
269 #include "ql4_fw.h"
270 #include "ql4_nvram.h"
271 
272 /*
273  * Linux Host Adapter structure
274  */
275 struct scsi_qla_host {
276 	/* Linux adapter configuration data */
277 	unsigned long flags;
278 
279 #define AF_ONLINE			0 /* 0x00000001 */
280 #define AF_INIT_DONE			1 /* 0x00000002 */
281 #define AF_MBOX_COMMAND			2 /* 0x00000004 */
282 #define AF_MBOX_COMMAND_DONE		3 /* 0x00000008 */
283 #define AF_INTERRUPTS_ON		6 /* 0x00000040 */
284 #define AF_GET_CRASH_RECORD		7 /* 0x00000080 */
285 #define AF_LINK_UP			8 /* 0x00000100 */
286 #define AF_IRQ_ATTACHED			10 /* 0x00000400 */
287 #define AF_DISABLE_ACB_COMPLETE		11 /* 0x00000800 */
288 
289 	unsigned long dpc_flags;
290 
291 #define DPC_RESET_HA			1 /* 0x00000002 */
292 #define DPC_RETRY_RESET_HA		2 /* 0x00000004 */
293 #define DPC_RELOGIN_DEVICE		3 /* 0x00000008 */
294 #define DPC_RESET_HA_DESTROY_DDB_LIST	4 /* 0x00000010 */
295 #define DPC_RESET_HA_INTR		5 /* 0x00000020 */
296 #define DPC_ISNS_RESTART		7 /* 0x00000080 */
297 #define DPC_AEN				9 /* 0x00000200 */
298 #define DPC_GET_DHCP_IP_ADDR		15 /* 0x00008000 */
299 
300 	struct Scsi_Host *host; /* pointer to host data */
301 	uint32_t tot_ddbs;
302 
303 	uint16_t	iocb_cnt;
304 	uint16_t	iocb_hiwat;
305 
306 	/* SRB cache. */
307 #define SRB_MIN_REQ	128
308 	mempool_t *srb_mempool;
309 
310 	/* pci information */
311 	struct pci_dev *pdev;
312 
313 	struct isp_reg __iomem *reg; /* Base I/O address */
314 	unsigned long pio_address;
315 	unsigned long pio_length;
316 #define MIN_IOBASE_LEN		0x100
317 
318 	uint16_t req_q_count;
319 	uint8_t marker_needed;
320 	uint8_t rsvd1;
321 
322 	unsigned long host_no;
323 
324 	/* NVRAM registers */
325 	struct eeprom_data *nvram;
326 	spinlock_t hardware_lock ____cacheline_aligned;
327 	uint32_t   eeprom_cmd_data;
328 
329 	/* Counters for general statistics */
330 	uint64_t isr_count;
331 	uint64_t adapter_error_count;
332 	uint64_t device_error_count;
333 	uint64_t total_io_count;
334 	uint64_t total_mbytes_xferred;
335 	uint64_t link_failure_count;
336 	uint64_t invalid_crc_count;
337 	uint32_t bytes_xfered;
338 	uint32_t spurious_int_count;
339 	uint32_t aborted_io_count;
340 	uint32_t io_timeout_count;
341 	uint32_t mailbox_timeout_count;
342 	uint32_t seconds_since_last_intr;
343 	uint32_t seconds_since_last_heartbeat;
344 	uint32_t mac_index;
345 
346 	/* Info Needed for Management App */
347 	/* --- From GetFwVersion --- */
348 	uint32_t firmware_version[2];
349 	uint32_t patch_number;
350 	uint32_t build_number;
351 	uint32_t board_id;
352 
353 	/* --- From Init_FW --- */
354 	/* init_cb_t *init_cb; */
355 	uint16_t firmware_options;
356 	uint16_t tcp_options;
357 	uint8_t ip_address[IP_ADDR_LEN];
358 	uint8_t subnet_mask[IP_ADDR_LEN];
359 	uint8_t gateway[IP_ADDR_LEN];
360 	uint8_t alias[32];
361 	uint8_t name_string[256];
362 	uint8_t heartbeat_interval;
363 	uint8_t rsvd;
364 
365 	/* --- From FlashSysInfo --- */
366 	uint8_t my_mac[MAC_ADDR_LEN];
367 	uint8_t serial_number[16];
368 
369 	/* --- From GetFwState --- */
370 	uint32_t firmware_state;
371 	uint32_t addl_fw_state;
372 
373 	/* Linux kernel thread */
374 	struct workqueue_struct *dpc_thread;
375 	struct work_struct dpc_work;
376 
377 	/* Linux timer thread */
378 	struct timer_list timer;
379 	uint32_t timer_active;
380 
381 	/* Recovery Timers */
382 	uint32_t port_down_retry_count;
383 	uint32_t discovery_wait;
384 	atomic_t check_relogin_timeouts;
385 	uint32_t retry_reset_ha_cnt;
386 	uint32_t isp_reset_timer;	/* reset test timer */
387 	uint32_t nic_reset_timer;	/* simulated nic reset test timer */
388 	int eh_start;
389 	struct list_head free_srb_q;
390 	uint16_t free_srb_q_count;
391 	uint16_t num_srbs_allocated;
392 
393 	/* DMA Memory Block */
394 	void *queues;
395 	dma_addr_t queues_dma;
396 	unsigned long queues_len;
397 
398 #define MEM_ALIGN_VALUE \
399 	    ((max(REQUEST_QUEUE_DEPTH, RESPONSE_QUEUE_DEPTH)) * \
400 	     sizeof(struct queue_entry))
401 	/* request and response queue variables */
402 	dma_addr_t request_dma;
403 	struct queue_entry *request_ring;
404 	struct queue_entry *request_ptr;
405 	dma_addr_t response_dma;
406 	struct queue_entry *response_ring;
407 	struct queue_entry *response_ptr;
408 	dma_addr_t shadow_regs_dma;
409 	struct shadow_regs *shadow_regs;
410 	uint16_t request_in;	/* Current indexes. */
411 	uint16_t request_out;
412 	uint16_t response_in;
413 	uint16_t response_out;
414 
415 	/* aen queue variables */
416 	uint16_t aen_q_count;	/* Number of available aen_q entries */
417 	uint16_t aen_in;	/* Current indexes */
418 	uint16_t aen_out;
419 	struct aen aen_q[MAX_AEN_ENTRIES];
420 
421 	struct ql4_aen_log aen_log;/* tracks all aens */
422 
423 	/* This mutex protects several threads to do mailbox commands
424 	 * concurrently.
425 	 */
426 	struct mutex  mbox_sem;
427 
428 	/* temporary mailbox status registers */
429 	volatile uint8_t mbox_status_count;
430 	volatile uint32_t mbox_status[MBOX_REG_COUNT];
431 
432 	/* local device database list (contains internal ddb entries) */
433 	struct list_head ddb_list;
434 
435 	/* Map ddb_list entry by FW ddb index */
436 	struct ddb_entry *fw_ddb_index_map[MAX_DDB_ENTRIES];
437 
438 };
439 
440 static inline int is_qla4010(struct scsi_qla_host *ha)
441 {
442 	return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4010;
443 }
444 
445 static inline int is_qla4022(struct scsi_qla_host *ha)
446 {
447 	return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4022;
448 }
449 
450 static inline int is_qla4032(struct scsi_qla_host *ha)
451 {
452 	return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4032;
453 }
454 
455 static inline int adapter_up(struct scsi_qla_host *ha)
456 {
457 	return (test_bit(AF_ONLINE, &ha->flags) != 0) &&
458 		(test_bit(AF_LINK_UP, &ha->flags) != 0);
459 }
460 
461 static inline struct scsi_qla_host* to_qla_host(struct Scsi_Host *shost)
462 {
463 	return (struct scsi_qla_host *)shost->hostdata;
464 }
465 
466 static inline void __iomem* isp_semaphore(struct scsi_qla_host *ha)
467 {
468 	return (is_qla4010(ha) ?
469 		&ha->reg->u1.isp4010.nvram :
470 		&ha->reg->u1.isp4022.semaphore);
471 }
472 
473 static inline void __iomem* isp_nvram(struct scsi_qla_host *ha)
474 {
475 	return (is_qla4010(ha) ?
476 		&ha->reg->u1.isp4010.nvram :
477 		&ha->reg->u1.isp4022.nvram);
478 }
479 
480 static inline void __iomem* isp_ext_hw_conf(struct scsi_qla_host *ha)
481 {
482 	return (is_qla4010(ha) ?
483 		&ha->reg->u2.isp4010.ext_hw_conf :
484 		&ha->reg->u2.isp4022.p0.ext_hw_conf);
485 }
486 
487 static inline void __iomem* isp_port_status(struct scsi_qla_host *ha)
488 {
489 	return (is_qla4010(ha) ?
490 		&ha->reg->u2.isp4010.port_status :
491 		&ha->reg->u2.isp4022.p0.port_status);
492 }
493 
494 static inline void __iomem* isp_port_ctrl(struct scsi_qla_host *ha)
495 {
496 	return (is_qla4010(ha) ?
497 		&ha->reg->u2.isp4010.port_ctrl :
498 		&ha->reg->u2.isp4022.p0.port_ctrl);
499 }
500 
501 static inline void __iomem* isp_port_error_status(struct scsi_qla_host *ha)
502 {
503 	return (is_qla4010(ha) ?
504 		&ha->reg->u2.isp4010.port_err_status :
505 		&ha->reg->u2.isp4022.p0.port_err_status);
506 }
507 
508 static inline void __iomem * isp_gp_out(struct scsi_qla_host *ha)
509 {
510 	return (is_qla4010(ha) ?
511 		&ha->reg->u2.isp4010.gp_out :
512 		&ha->reg->u2.isp4022.p0.gp_out);
513 }
514 
515 static inline int eeprom_ext_hw_conf_offset(struct scsi_qla_host *ha)
516 {
517 	return (is_qla4010(ha) ?
518 		offsetof(struct eeprom_data, isp4010.ext_hw_conf) / 2 :
519 		offsetof(struct eeprom_data, isp4022.ext_hw_conf) / 2);
520 }
521 
522 int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
523 void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask);
524 int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
525 
526 static inline int ql4xxx_lock_flash(struct scsi_qla_host *a)
527 {
528 	if (is_qla4010(a))
529 		return ql4xxx_sem_spinlock(a, QL4010_FLASH_SEM_MASK,
530 					   QL4010_FLASH_SEM_BITS);
531 	else
532 		return ql4xxx_sem_spinlock(a, QL4022_FLASH_SEM_MASK,
533 					   (QL4022_RESOURCE_BITS_BASE_CODE |
534 					    (a->mac_index)) << 13);
535 }
536 
537 static inline void ql4xxx_unlock_flash(struct scsi_qla_host *a)
538 {
539 	if (is_qla4010(a))
540 		ql4xxx_sem_unlock(a, QL4010_FLASH_SEM_MASK);
541 	else
542 		ql4xxx_sem_unlock(a, QL4022_FLASH_SEM_MASK);
543 }
544 
545 static inline int ql4xxx_lock_nvram(struct scsi_qla_host *a)
546 {
547 	if (is_qla4010(a))
548 		return ql4xxx_sem_spinlock(a, QL4010_NVRAM_SEM_MASK,
549 					   QL4010_NVRAM_SEM_BITS);
550 	else
551 		return ql4xxx_sem_spinlock(a, QL4022_NVRAM_SEM_MASK,
552 					   (QL4022_RESOURCE_BITS_BASE_CODE |
553 					    (a->mac_index)) << 10);
554 }
555 
556 static inline void ql4xxx_unlock_nvram(struct scsi_qla_host *a)
557 {
558 	if (is_qla4010(a))
559 		ql4xxx_sem_unlock(a, QL4010_NVRAM_SEM_MASK);
560 	else
561 		ql4xxx_sem_unlock(a, QL4022_NVRAM_SEM_MASK);
562 }
563 
564 static inline int ql4xxx_lock_drvr(struct scsi_qla_host *a)
565 {
566 	if (is_qla4010(a))
567 		return ql4xxx_sem_lock(a, QL4010_DRVR_SEM_MASK,
568 				       QL4010_DRVR_SEM_BITS);
569 	else
570 		return ql4xxx_sem_lock(a, QL4022_DRVR_SEM_MASK,
571 				       (QL4022_RESOURCE_BITS_BASE_CODE |
572 					(a->mac_index)) << 1);
573 }
574 
575 static inline void ql4xxx_unlock_drvr(struct scsi_qla_host *a)
576 {
577 	if (is_qla4010(a))
578 		ql4xxx_sem_unlock(a, QL4010_DRVR_SEM_MASK);
579 	else
580 		ql4xxx_sem_unlock(a, QL4022_DRVR_SEM_MASK);
581 }
582 
583 /*---------------------------------------------------------------------------*/
584 
585 /* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */
586 #define PRESERVE_DDB_LIST	0
587 #define REBUILD_DDB_LIST	1
588 
589 /* Defines for process_aen() */
590 #define PROCESS_ALL_AENS	 0
591 #define FLUSH_DDB_CHANGED_AENS	 1
592 #define RELOGIN_DDB_CHANGED_AENS 2
593 
594 #endif	/*_QLA4XXX_H */
595