1 /* 2 * QLogic iSCSI HBA Driver 3 * Copyright (c) 2003-2006 QLogic Corporation 4 * 5 * See LICENSE.qla4xxx for copyright and licensing details. 6 */ 7 8 #include "ql4_def.h" 9 #include <scsi/scsi_dbg.h> 10 11 #if 0 12 13 static void qla4xxx_print_srb_info(struct srb * srb) 14 { 15 printk("%s: srb = 0x%p, flags=0x%02x\n", __func__, srb, srb->flags); 16 printk("%s: cmd = 0x%p, saved_dma_handle = 0x%lx\n", 17 __func__, srb->cmd, (unsigned long) srb->dma_handle); 18 printk("%s: fw_ddb_index = %d, lun = %d\n", 19 __func__, srb->fw_ddb_index, srb->cmd->device->lun); 20 printk("%s: iocb_tov = %d\n", 21 __func__, srb->iocb_tov); 22 printk("%s: cc_stat = 0x%x, r_start = 0x%lx, u_start = 0x%lx\n\n", 23 __func__, srb->cc_stat, srb->r_start, srb->u_start); 24 } 25 26 void qla4xxx_print_scsi_cmd(struct scsi_cmnd *cmd) 27 { 28 printk("SCSI Command = 0x%p, Handle=0x%p\n", cmd, cmd->host_scribble); 29 printk(" b=%d, t=%02xh, l=%02xh, cmd_len = %02xh\n", 30 cmd->device->channel, cmd->device->id, cmd->device->lun, 31 cmd->cmd_len); 32 scsi_print_command(cmd); 33 printk(" seg_cnt = %d\n", cmd->use_sg); 34 printk(" request buffer = 0x%p, request buffer len = 0x%x\n", 35 cmd->request_buffer, cmd->request_bufflen); 36 if (cmd->use_sg) { 37 struct scatterlist *sg; 38 sg = (struct scatterlist *)cmd->request_buffer; 39 printk(" SG buffer: \n"); 40 qla4xxx_dump_buffer((caddr_t) sg, 41 (cmd->use_sg * sizeof(*sg))); 42 } 43 printk(" tag = %d, transfersize = 0x%x \n", cmd->tag, 44 cmd->transfersize); 45 printk(" Pid = %d, SP = 0x%p\n", (int)cmd->pid, cmd->SCp.ptr); 46 printk(" underflow size = 0x%x, direction=0x%x\n", cmd->underflow, 47 cmd->sc_data_direction); 48 printk(" Current time (jiffies) = 0x%lx, " 49 "timeout expires = 0x%lx\n", jiffies, cmd->eh_timeout.expires); 50 qla4xxx_print_srb_info((struct srb *) cmd->SCp.ptr); 51 } 52 53 void __dump_registers(struct scsi_qla_host *ha) 54 { 55 uint8_t i; 56 for (i = 0; i < MBOX_REG_COUNT; i++) { 57 printk(KERN_INFO "0x%02X mailbox[%d] = 0x%08X\n", 58 (uint8_t) offsetof(struct isp_reg, mailbox[i]), i, 59 readw(&ha->reg->mailbox[i])); 60 } 61 printk(KERN_INFO "0x%02X flash_address = 0x%08X\n", 62 (uint8_t) offsetof(struct isp_reg, flash_address), 63 readw(&ha->reg->flash_address)); 64 printk(KERN_INFO "0x%02X flash_data = 0x%08X\n", 65 (uint8_t) offsetof(struct isp_reg, flash_data), 66 readw(&ha->reg->flash_data)); 67 printk(KERN_INFO "0x%02X ctrl_status = 0x%08X\n", 68 (uint8_t) offsetof(struct isp_reg, ctrl_status), 69 readw(&ha->reg->ctrl_status)); 70 if (is_qla4010(ha)) { 71 printk(KERN_INFO "0x%02X nvram = 0x%08X\n", 72 (uint8_t) offsetof(struct isp_reg, u1.isp4010.nvram), 73 readw(&ha->reg->u1.isp4010.nvram)); 74 } 75 76 else if (is_qla4022(ha) | is_qla4032(ha)) { 77 printk(KERN_INFO "0x%02X intr_mask = 0x%08X\n", 78 (uint8_t) offsetof(struct isp_reg, 79 u1.isp4022.intr_mask), 80 readw(&ha->reg->u1.isp4022.intr_mask)); 81 printk(KERN_INFO "0x%02X nvram = 0x%08X\n", 82 (uint8_t) offsetof(struct isp_reg, u1.isp4022.nvram), 83 readw(&ha->reg->u1.isp4022.nvram)); 84 printk(KERN_INFO "0x%02X semaphore = 0x%08X\n", 85 (uint8_t) offsetof(struct isp_reg, 86 u1.isp4022.semaphore), 87 readw(&ha->reg->u1.isp4022.semaphore)); 88 } 89 printk(KERN_INFO "0x%02X req_q_in = 0x%08X\n", 90 (uint8_t) offsetof(struct isp_reg, req_q_in), 91 readw(&ha->reg->req_q_in)); 92 printk(KERN_INFO "0x%02X rsp_q_out = 0x%08X\n", 93 (uint8_t) offsetof(struct isp_reg, rsp_q_out), 94 readw(&ha->reg->rsp_q_out)); 95 if (is_qla4010(ha)) { 96 printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n", 97 (uint8_t) offsetof(struct isp_reg, 98 u2.isp4010.ext_hw_conf), 99 readw(&ha->reg->u2.isp4010.ext_hw_conf)); 100 printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n", 101 (uint8_t) offsetof(struct isp_reg, 102 u2.isp4010.port_ctrl), 103 readw(&ha->reg->u2.isp4010.port_ctrl)); 104 printk(KERN_INFO "0x%02X port_status = 0x%08X\n", 105 (uint8_t) offsetof(struct isp_reg, 106 u2.isp4010.port_status), 107 readw(&ha->reg->u2.isp4010.port_status)); 108 printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n", 109 (uint8_t) offsetof(struct isp_reg, 110 u2.isp4010.req_q_out), 111 readw(&ha->reg->u2.isp4010.req_q_out)); 112 printk(KERN_INFO "0x%02X gp_out = 0x%08X\n", 113 (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_out), 114 readw(&ha->reg->u2.isp4010.gp_out)); 115 printk(KERN_INFO "0x%02X gp_in = 0x%08X\n", 116 (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_in), 117 readw(&ha->reg->u2.isp4010.gp_in)); 118 printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n", 119 (uint8_t) offsetof(struct isp_reg, 120 u2.isp4010.port_err_status), 121 readw(&ha->reg->u2.isp4010.port_err_status)); 122 } 123 124 else if (is_qla4022(ha) | is_qla4032(ha)) { 125 printk(KERN_INFO "Page 0 Registers:\n"); 126 printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n", 127 (uint8_t) offsetof(struct isp_reg, 128 u2.isp4022.p0.ext_hw_conf), 129 readw(&ha->reg->u2.isp4022.p0.ext_hw_conf)); 130 printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n", 131 (uint8_t) offsetof(struct isp_reg, 132 u2.isp4022.p0.port_ctrl), 133 readw(&ha->reg->u2.isp4022.p0.port_ctrl)); 134 printk(KERN_INFO "0x%02X port_status = 0x%08X\n", 135 (uint8_t) offsetof(struct isp_reg, 136 u2.isp4022.p0.port_status), 137 readw(&ha->reg->u2.isp4022.p0.port_status)); 138 printk(KERN_INFO "0x%02X gp_out = 0x%08X\n", 139 (uint8_t) offsetof(struct isp_reg, 140 u2.isp4022.p0.gp_out), 141 readw(&ha->reg->u2.isp4022.p0.gp_out)); 142 printk(KERN_INFO "0x%02X gp_in = 0x%08X\n", 143 (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in), 144 readw(&ha->reg->u2.isp4022.p0.gp_in)); 145 printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n", 146 (uint8_t) offsetof(struct isp_reg, 147 u2.isp4022.p0.port_err_status), 148 readw(&ha->reg->u2.isp4022.p0.port_err_status)); 149 printk(KERN_INFO "Page 1 Registers:\n"); 150 writel(HOST_MEM_CFG_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT), 151 &ha->reg->ctrl_status); 152 printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n", 153 (uint8_t) offsetof(struct isp_reg, 154 u2.isp4022.p1.req_q_out), 155 readw(&ha->reg->u2.isp4022.p1.req_q_out)); 156 writel(PORT_CTRL_STAT_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT), 157 &ha->reg->ctrl_status); 158 } 159 } 160 161 void qla4xxx_dump_mbox_registers(struct scsi_qla_host *ha) 162 { 163 unsigned long flags = 0; 164 int i = 0; 165 spin_lock_irqsave(&ha->hardware_lock, flags); 166 for (i = 1; i < MBOX_REG_COUNT; i++) 167 printk(KERN_INFO " Mailbox[%d] = %08x\n", i, 168 readw(&ha->reg->mailbox[i])); 169 spin_unlock_irqrestore(&ha->hardware_lock, flags); 170 } 171 172 void qla4xxx_dump_registers(struct scsi_qla_host *ha) 173 { 174 unsigned long flags = 0; 175 spin_lock_irqsave(&ha->hardware_lock, flags); 176 __dump_registers(ha); 177 spin_unlock_irqrestore(&ha->hardware_lock, flags); 178 } 179 180 void qla4xxx_dump_buffer(void *b, uint32_t size) 181 { 182 uint32_t cnt; 183 uint8_t *c = b; 184 185 printk(" 0 1 2 3 4 5 6 7 8 9 Ah Bh Ch Dh Eh " 186 "Fh\n"); 187 printk("------------------------------------------------------------" 188 "--\n"); 189 for (cnt = 0; cnt < size; cnt++, c++) { 190 printk(KERN_DEBUG "%02x", *c); 191 if (!(cnt % 16)) 192 printk(KERN_DEBUG "\n"); 193 194 else 195 printk(KERN_DEBUG " "); 196 } 197 if (cnt % 16) 198 printk(KERN_DEBUG "\n"); 199 } 200 201 #endif /* 0 */ 202