1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_tmpl.h" 9 10 /* note default template is in big endian */ 11 static const uint32_t ql27xx_fwdt_default_template[] = { 12 0x63000000, 0xa4000000, 0x7c050000, 0x00000000, 13 0x30000000, 0x01000000, 0x00000000, 0xc0406eb4, 14 0x00000000, 0x00000000, 0x00000000, 0x00000000, 15 0x00000000, 0x00000000, 0x00000000, 0x00000000, 16 0x00000000, 0x00000000, 0x00000000, 0x00000000, 17 0x00000000, 0x00000000, 0x00000000, 0x00000000, 18 0x00000000, 0x00000000, 0x00000000, 0x00000000, 19 0x00000000, 0x00000000, 0x00000000, 0x00000000, 20 0x00000000, 0x00000000, 0x00000000, 0x00000000, 21 0x00000000, 0x00000000, 0x00000000, 0x00000000, 22 0x00000000, 0x04010000, 0x14000000, 0x00000000, 23 0x02000000, 0x44000000, 0x09010000, 0x10000000, 24 0x00000000, 0x02000000, 0x01010000, 0x1c000000, 25 0x00000000, 0x02000000, 0x00600000, 0x00000000, 26 0xc0000000, 0x01010000, 0x1c000000, 0x00000000, 27 0x02000000, 0x00600000, 0x00000000, 0xcc000000, 28 0x01010000, 0x1c000000, 0x00000000, 0x02000000, 29 0x10600000, 0x00000000, 0xd4000000, 0x01010000, 30 0x1c000000, 0x00000000, 0x02000000, 0x700f0000, 31 0x00000060, 0xf0000000, 0x00010000, 0x18000000, 32 0x00000000, 0x02000000, 0x00700000, 0x041000c0, 33 0x00010000, 0x18000000, 0x00000000, 0x02000000, 34 0x10700000, 0x041000c0, 0x00010000, 0x18000000, 35 0x00000000, 0x02000000, 0x40700000, 0x041000c0, 36 0x01010000, 0x1c000000, 0x00000000, 0x02000000, 37 0x007c0000, 0x01000000, 0xc0000000, 0x00010000, 38 0x18000000, 0x00000000, 0x02000000, 0x007c0000, 39 0x040300c4, 0x00010000, 0x18000000, 0x00000000, 40 0x02000000, 0x007c0000, 0x040100c0, 0x01010000, 41 0x1c000000, 0x00000000, 0x02000000, 0x007c0000, 42 0x00000000, 0xc0000000, 0x00010000, 0x18000000, 43 0x00000000, 0x02000000, 0x007c0000, 0x04200000, 44 0x0b010000, 0x18000000, 0x00000000, 0x02000000, 45 0x0c000000, 0x00000000, 0x02010000, 0x20000000, 46 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 47 0xf0000000, 0x000000b0, 0x02010000, 0x20000000, 48 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 49 0xf0000000, 0x000010b0, 0x02010000, 0x20000000, 50 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 51 0xf0000000, 0x000020b0, 0x02010000, 0x20000000, 52 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 53 0xf0000000, 0x000030b0, 0x02010000, 0x20000000, 54 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 55 0xf0000000, 0x000040b0, 0x02010000, 0x20000000, 56 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 57 0xf0000000, 0x000050b0, 0x02010000, 0x20000000, 58 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 59 0xf0000000, 0x000060b0, 0x02010000, 0x20000000, 60 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 61 0xf0000000, 0x000070b0, 0x02010000, 0x20000000, 62 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 63 0xf0000000, 0x000080b0, 0x02010000, 0x20000000, 64 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 65 0xf0000000, 0x000090b0, 0x02010000, 0x20000000, 66 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 67 0xf0000000, 0x0000a0b0, 0x00010000, 0x18000000, 68 0x00000000, 0x02000000, 0x0a000000, 0x040100c0, 69 0x00010000, 0x18000000, 0x00000000, 0x02000000, 70 0x0a000000, 0x04200080, 0x00010000, 0x18000000, 71 0x00000000, 0x02000000, 0x00be0000, 0x041000c0, 72 0x00010000, 0x18000000, 0x00000000, 0x02000000, 73 0x10be0000, 0x041000c0, 0x00010000, 0x18000000, 74 0x00000000, 0x02000000, 0x20be0000, 0x041000c0, 75 0x00010000, 0x18000000, 0x00000000, 0x02000000, 76 0x30be0000, 0x041000c0, 0x00010000, 0x18000000, 77 0x00000000, 0x02000000, 0x00b00000, 0x041000c0, 78 0x00010000, 0x18000000, 0x00000000, 0x02000000, 79 0x10b00000, 0x041000c0, 0x00010000, 0x18000000, 80 0x00000000, 0x02000000, 0x20b00000, 0x041000c0, 81 0x00010000, 0x18000000, 0x00000000, 0x02000000, 82 0x30b00000, 0x041000c0, 0x00010000, 0x18000000, 83 0x00000000, 0x02000000, 0x00300000, 0x041000c0, 84 0x00010000, 0x18000000, 0x00000000, 0x02000000, 85 0x10300000, 0x041000c0, 0x00010000, 0x18000000, 86 0x00000000, 0x02000000, 0x20300000, 0x041000c0, 87 0x00010000, 0x18000000, 0x00000000, 0x02000000, 88 0x30300000, 0x041000c0, 0x0a010000, 0x10000000, 89 0x00000000, 0x02000000, 0x06010000, 0x1c000000, 90 0x00000000, 0x02000000, 0x01000000, 0x00000200, 91 0xff230200, 0x06010000, 0x1c000000, 0x00000000, 92 0x02000000, 0x02000000, 0x00001000, 0x00000000, 93 0x07010000, 0x18000000, 0x00000000, 0x02000000, 94 0x00000000, 0x01000000, 0x07010000, 0x18000000, 95 0x00000000, 0x02000000, 0x00000000, 0x02000000, 96 0x07010000, 0x18000000, 0x00000000, 0x02000000, 97 0x00000000, 0x03000000, 0x0d010000, 0x14000000, 98 0x00000000, 0x02000000, 0x00000000, 0xff000000, 99 0x10000000, 0x00000000, 0x00000080, 100 }; 101 102 static inline void __iomem * 103 qla27xx_isp_reg(struct scsi_qla_host *vha) 104 { 105 return &vha->hw->iobase->isp24; 106 } 107 108 static inline void 109 qla27xx_insert16(uint16_t value, void *buf, ulong *len) 110 { 111 if (buf) { 112 buf += *len; 113 *(__le16 *)buf = cpu_to_le16(value); 114 } 115 *len += sizeof(value); 116 } 117 118 static inline void 119 qla27xx_insert32(uint32_t value, void *buf, ulong *len) 120 { 121 if (buf) { 122 buf += *len; 123 *(__le32 *)buf = cpu_to_le32(value); 124 } 125 *len += sizeof(value); 126 } 127 128 static inline void 129 qla27xx_insertbuf(void *mem, ulong size, void *buf, ulong *len) 130 { 131 132 if (buf && mem && size) { 133 buf += *len; 134 memcpy(buf, mem, size); 135 } 136 *len += size; 137 } 138 139 static inline void 140 qla27xx_read8(void __iomem *window, void *buf, ulong *len) 141 { 142 uint8_t value = ~0; 143 144 if (buf) { 145 value = RD_REG_BYTE(window); 146 } 147 qla27xx_insert32(value, buf, len); 148 } 149 150 static inline void 151 qla27xx_read16(void __iomem *window, void *buf, ulong *len) 152 { 153 uint16_t value = ~0; 154 155 if (buf) { 156 value = RD_REG_WORD(window); 157 } 158 qla27xx_insert32(value, buf, len); 159 } 160 161 static inline void 162 qla27xx_read32(void __iomem *window, void *buf, ulong *len) 163 { 164 uint32_t value = ~0; 165 166 if (buf) { 167 value = RD_REG_DWORD(window); 168 } 169 qla27xx_insert32(value, buf, len); 170 } 171 172 static inline void (*qla27xx_read_vector(uint width))(void __iomem*, void *, ulong *) 173 { 174 return 175 (width == 1) ? qla27xx_read8 : 176 (width == 2) ? qla27xx_read16 : 177 qla27xx_read32; 178 } 179 180 static inline void 181 qla27xx_read_reg(__iomem struct device_reg_24xx *reg, 182 uint offset, void *buf, ulong *len) 183 { 184 void __iomem *window = (void __iomem *)reg + offset; 185 186 qla27xx_read32(window, buf, len); 187 } 188 189 static inline void 190 qla27xx_write_reg(__iomem struct device_reg_24xx *reg, 191 uint offset, uint32_t data, void *buf) 192 { 193 __iomem void *window = (void __iomem *)reg + offset; 194 195 if (buf) { 196 WRT_REG_DWORD(window, data); 197 } 198 } 199 200 static inline void 201 qla27xx_read_window(__iomem struct device_reg_24xx *reg, 202 uint32_t addr, uint offset, uint count, uint width, void *buf, 203 ulong *len) 204 { 205 void __iomem *window = (void __iomem *)reg + offset; 206 void (*readn)(void __iomem*, void *, ulong *) = qla27xx_read_vector(width); 207 208 qla27xx_write_reg(reg, IOBASE_ADDR, addr, buf); 209 while (count--) { 210 qla27xx_insert32(addr, buf, len); 211 readn(window, buf, len); 212 window += width; 213 addr++; 214 } 215 } 216 217 static inline void 218 qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf) 219 { 220 if (buf) 221 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY; 222 } 223 224 static int 225 qla27xx_fwdt_entry_t0(struct scsi_qla_host *vha, 226 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 227 { 228 ql_dbg(ql_dbg_misc, vha, 0xd100, 229 "%s: nop [%lx]\n", __func__, *len); 230 qla27xx_skip_entry(ent, buf); 231 232 return false; 233 } 234 235 static int 236 qla27xx_fwdt_entry_t255(struct scsi_qla_host *vha, 237 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 238 { 239 ql_dbg(ql_dbg_misc, vha, 0xd1ff, 240 "%s: end [%lx]\n", __func__, *len); 241 qla27xx_skip_entry(ent, buf); 242 243 /* terminate */ 244 return true; 245 } 246 247 static int 248 qla27xx_fwdt_entry_t256(struct scsi_qla_host *vha, 249 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 250 { 251 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 252 253 ql_dbg(ql_dbg_misc, vha, 0xd200, 254 "%s: rdio t1 [%lx]\n", __func__, *len); 255 qla27xx_read_window(reg, ent->t256.base_addr, ent->t256.pci_offset, 256 ent->t256.reg_count, ent->t256.reg_width, buf, len); 257 258 return false; 259 } 260 261 static int 262 qla27xx_fwdt_entry_t257(struct scsi_qla_host *vha, 263 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 264 { 265 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 266 267 ql_dbg(ql_dbg_misc, vha, 0xd201, 268 "%s: wrio t1 [%lx]\n", __func__, *len); 269 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t257.base_addr, buf); 270 qla27xx_write_reg(reg, ent->t257.pci_offset, ent->t257.write_data, buf); 271 272 return false; 273 } 274 275 static int 276 qla27xx_fwdt_entry_t258(struct scsi_qla_host *vha, 277 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 278 { 279 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 280 281 ql_dbg(ql_dbg_misc, vha, 0xd202, 282 "%s: rdio t2 [%lx]\n", __func__, *len); 283 qla27xx_write_reg(reg, ent->t258.banksel_offset, ent->t258.bank, buf); 284 qla27xx_read_window(reg, ent->t258.base_addr, ent->t258.pci_offset, 285 ent->t258.reg_count, ent->t258.reg_width, buf, len); 286 287 return false; 288 } 289 290 static int 291 qla27xx_fwdt_entry_t259(struct scsi_qla_host *vha, 292 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 293 { 294 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 295 296 ql_dbg(ql_dbg_misc, vha, 0xd203, 297 "%s: wrio t2 [%lx]\n", __func__, *len); 298 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t259.base_addr, buf); 299 qla27xx_write_reg(reg, ent->t259.banksel_offset, ent->t259.bank, buf); 300 qla27xx_write_reg(reg, ent->t259.pci_offset, ent->t259.write_data, buf); 301 302 return false; 303 } 304 305 static int 306 qla27xx_fwdt_entry_t260(struct scsi_qla_host *vha, 307 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 308 { 309 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 310 311 ql_dbg(ql_dbg_misc, vha, 0xd204, 312 "%s: rdpci [%lx]\n", __func__, *len); 313 qla27xx_insert32(ent->t260.pci_offset, buf, len); 314 qla27xx_read_reg(reg, ent->t260.pci_offset, buf, len); 315 316 return false; 317 } 318 319 static int 320 qla27xx_fwdt_entry_t261(struct scsi_qla_host *vha, 321 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 322 { 323 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 324 325 ql_dbg(ql_dbg_misc, vha, 0xd205, 326 "%s: wrpci [%lx]\n", __func__, *len); 327 qla27xx_write_reg(reg, ent->t261.pci_offset, ent->t261.write_data, buf); 328 329 return false; 330 } 331 332 static int 333 qla27xx_fwdt_entry_t262(struct scsi_qla_host *vha, 334 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 335 { 336 ulong dwords; 337 ulong start; 338 ulong end; 339 340 ql_dbg(ql_dbg_misc, vha, 0xd206, 341 "%s: rdram(%x) [%lx]\n", __func__, ent->t262.ram_area, *len); 342 start = ent->t262.start_addr; 343 end = ent->t262.end_addr; 344 345 if (ent->t262.ram_area == T262_RAM_AREA_CRITICAL_RAM) { 346 ; 347 } else if (ent->t262.ram_area == T262_RAM_AREA_EXTERNAL_RAM) { 348 end = vha->hw->fw_memory_size; 349 if (buf) 350 ent->t262.end_addr = end; 351 } else if (ent->t262.ram_area == T262_RAM_AREA_SHARED_RAM) { 352 start = vha->hw->fw_shared_ram_start; 353 end = vha->hw->fw_shared_ram_end; 354 if (buf) { 355 ent->t262.start_addr = start; 356 ent->t262.end_addr = end; 357 } 358 } else if (ent->t262.ram_area == T262_RAM_AREA_DDR_RAM) { 359 start = vha->hw->fw_ddr_ram_start; 360 end = vha->hw->fw_ddr_ram_end; 361 if (buf) { 362 ent->t262.start_addr = start; 363 ent->t262.end_addr = end; 364 } 365 } else { 366 ql_dbg(ql_dbg_misc, vha, 0xd022, 367 "%s: unknown area %x\n", __func__, ent->t262.ram_area); 368 qla27xx_skip_entry(ent, buf); 369 goto done; 370 } 371 372 if (end < start || start == 0 || end == 0) { 373 ql_dbg(ql_dbg_misc, vha, 0xd023, 374 "%s: unusable range (start=%x end=%x)\n", __func__, 375 ent->t262.end_addr, ent->t262.start_addr); 376 qla27xx_skip_entry(ent, buf); 377 goto done; 378 } 379 380 dwords = end - start + 1; 381 if (buf) { 382 buf += *len; 383 qla24xx_dump_ram(vha->hw, start, buf, dwords, &buf); 384 } 385 *len += dwords * sizeof(uint32_t); 386 done: 387 return false; 388 } 389 390 static int 391 qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha, 392 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 393 { 394 uint count = 0; 395 uint i; 396 uint length; 397 398 ql_dbg(ql_dbg_misc, vha, 0xd207, 399 "%s: getq(%x) [%lx]\n", __func__, ent->t263.queue_type, *len); 400 if (ent->t263.queue_type == T263_QUEUE_TYPE_REQ) { 401 for (i = 0; i < vha->hw->max_req_queues; i++) { 402 struct req_que *req = vha->hw->req_q_map[i]; 403 404 if (req || !buf) { 405 length = req ? 406 req->length : REQUEST_ENTRY_CNT_24XX; 407 qla27xx_insert16(i, buf, len); 408 qla27xx_insert16(length, buf, len); 409 qla27xx_insertbuf(req ? req->ring : NULL, 410 length * sizeof(*req->ring), buf, len); 411 count++; 412 } 413 } 414 } else if (ent->t263.queue_type == T263_QUEUE_TYPE_RSP) { 415 for (i = 0; i < vha->hw->max_rsp_queues; i++) { 416 struct rsp_que *rsp = vha->hw->rsp_q_map[i]; 417 418 if (rsp || !buf) { 419 length = rsp ? 420 rsp->length : RESPONSE_ENTRY_CNT_MQ; 421 qla27xx_insert16(i, buf, len); 422 qla27xx_insert16(length, buf, len); 423 qla27xx_insertbuf(rsp ? rsp->ring : NULL, 424 length * sizeof(*rsp->ring), buf, len); 425 count++; 426 } 427 } 428 } else if (QLA_TGT_MODE_ENABLED() && 429 ent->t263.queue_type == T263_QUEUE_TYPE_ATIO) { 430 struct qla_hw_data *ha = vha->hw; 431 struct atio *atr = ha->tgt.atio_ring; 432 433 if (atr || !buf) { 434 length = ha->tgt.atio_q_length; 435 qla27xx_insert16(0, buf, len); 436 qla27xx_insert16(length, buf, len); 437 qla27xx_insertbuf(atr, length * sizeof(*atr), buf, len); 438 count++; 439 } 440 } else { 441 ql_dbg(ql_dbg_misc, vha, 0xd026, 442 "%s: unknown queue %x\n", __func__, ent->t263.queue_type); 443 qla27xx_skip_entry(ent, buf); 444 } 445 446 if (buf) { 447 if (count) 448 ent->t263.num_queues = count; 449 else 450 qla27xx_skip_entry(ent, buf); 451 } 452 453 return false; 454 } 455 456 static int 457 qla27xx_fwdt_entry_t264(struct scsi_qla_host *vha, 458 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 459 { 460 ql_dbg(ql_dbg_misc, vha, 0xd208, 461 "%s: getfce [%lx]\n", __func__, *len); 462 if (vha->hw->fce) { 463 if (buf) { 464 ent->t264.fce_trace_size = FCE_SIZE; 465 ent->t264.write_pointer = vha->hw->fce_wr; 466 ent->t264.base_pointer = vha->hw->fce_dma; 467 ent->t264.fce_enable_mb0 = vha->hw->fce_mb[0]; 468 ent->t264.fce_enable_mb2 = vha->hw->fce_mb[2]; 469 ent->t264.fce_enable_mb3 = vha->hw->fce_mb[3]; 470 ent->t264.fce_enable_mb4 = vha->hw->fce_mb[4]; 471 ent->t264.fce_enable_mb5 = vha->hw->fce_mb[5]; 472 ent->t264.fce_enable_mb6 = vha->hw->fce_mb[6]; 473 } 474 qla27xx_insertbuf(vha->hw->fce, FCE_SIZE, buf, len); 475 } else { 476 ql_dbg(ql_dbg_misc, vha, 0xd027, 477 "%s: missing fce\n", __func__); 478 qla27xx_skip_entry(ent, buf); 479 } 480 481 return false; 482 } 483 484 static int 485 qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha, 486 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 487 { 488 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 489 490 ql_dbg(ql_dbg_misc, vha, 0xd209, 491 "%s: pause risc [%lx]\n", __func__, *len); 492 if (buf) 493 qla24xx_pause_risc(reg, vha->hw); 494 495 return false; 496 } 497 498 static int 499 qla27xx_fwdt_entry_t266(struct scsi_qla_host *vha, 500 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 501 { 502 ql_dbg(ql_dbg_misc, vha, 0xd20a, 503 "%s: reset risc [%lx]\n", __func__, *len); 504 if (buf) 505 qla24xx_soft_reset(vha->hw); 506 507 return false; 508 } 509 510 static int 511 qla27xx_fwdt_entry_t267(struct scsi_qla_host *vha, 512 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 513 { 514 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 515 516 ql_dbg(ql_dbg_misc, vha, 0xd20b, 517 "%s: dis intr [%lx]\n", __func__, *len); 518 qla27xx_write_reg(reg, ent->t267.pci_offset, ent->t267.data, buf); 519 520 return false; 521 } 522 523 static int 524 qla27xx_fwdt_entry_t268(struct scsi_qla_host *vha, 525 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 526 { 527 ql_dbg(ql_dbg_misc, vha, 0xd20c, 528 "%s: gethb(%x) [%lx]\n", __func__, ent->t268.buf_type, *len); 529 switch (ent->t268.buf_type) { 530 case T268_BUF_TYPE_EXTD_TRACE: 531 if (vha->hw->eft) { 532 if (buf) { 533 ent->t268.buf_size = EFT_SIZE; 534 ent->t268.start_addr = vha->hw->eft_dma; 535 } 536 qla27xx_insertbuf(vha->hw->eft, EFT_SIZE, buf, len); 537 } else { 538 ql_dbg(ql_dbg_misc, vha, 0xd028, 539 "%s: missing eft\n", __func__); 540 qla27xx_skip_entry(ent, buf); 541 } 542 break; 543 case T268_BUF_TYPE_EXCH_BUFOFF: 544 if (vha->hw->exchoffld_buf) { 545 if (buf) { 546 ent->t268.buf_size = vha->hw->exchoffld_size; 547 ent->t268.start_addr = 548 vha->hw->exchoffld_buf_dma; 549 } 550 qla27xx_insertbuf(vha->hw->exchoffld_buf, 551 vha->hw->exchoffld_size, buf, len); 552 } else { 553 ql_dbg(ql_dbg_misc, vha, 0xd028, 554 "%s: missing exch offld\n", __func__); 555 qla27xx_skip_entry(ent, buf); 556 } 557 break; 558 case T268_BUF_TYPE_EXTD_LOGIN: 559 if (vha->hw->exlogin_buf) { 560 if (buf) { 561 ent->t268.buf_size = vha->hw->exlogin_size; 562 ent->t268.start_addr = 563 vha->hw->exlogin_buf_dma; 564 } 565 qla27xx_insertbuf(vha->hw->exlogin_buf, 566 vha->hw->exlogin_size, buf, len); 567 } else { 568 ql_dbg(ql_dbg_misc, vha, 0xd028, 569 "%s: missing ext login\n", __func__); 570 qla27xx_skip_entry(ent, buf); 571 } 572 break; 573 574 default: 575 ql_dbg(ql_dbg_async, vha, 0xd02b, 576 "%s: unknown buffer %x\n", __func__, ent->t268.buf_type); 577 qla27xx_skip_entry(ent, buf); 578 break; 579 } 580 581 return false; 582 } 583 584 static int 585 qla27xx_fwdt_entry_t269(struct scsi_qla_host *vha, 586 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 587 { 588 ql_dbg(ql_dbg_misc, vha, 0xd20d, 589 "%s: scratch [%lx]\n", __func__, *len); 590 qla27xx_insert32(0xaaaaaaaa, buf, len); 591 qla27xx_insert32(0xbbbbbbbb, buf, len); 592 qla27xx_insert32(0xcccccccc, buf, len); 593 qla27xx_insert32(0xdddddddd, buf, len); 594 qla27xx_insert32(*len + sizeof(uint32_t), buf, len); 595 if (buf) 596 ent->t269.scratch_size = 5 * sizeof(uint32_t); 597 598 return false; 599 } 600 601 static int 602 qla27xx_fwdt_entry_t270(struct scsi_qla_host *vha, 603 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 604 { 605 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 606 ulong dwords = ent->t270.count; 607 ulong addr = ent->t270.addr; 608 609 ql_dbg(ql_dbg_misc, vha, 0xd20e, 610 "%s: rdremreg [%lx]\n", __func__, *len); 611 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf); 612 while (dwords--) { 613 qla27xx_write_reg(reg, 0xc0, addr|0x80000000, buf); 614 qla27xx_insert32(addr, buf, len); 615 qla27xx_read_reg(reg, 0xc4, buf, len); 616 addr += sizeof(uint32_t); 617 } 618 619 return false; 620 } 621 622 static int 623 qla27xx_fwdt_entry_t271(struct scsi_qla_host *vha, 624 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 625 { 626 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 627 ulong addr = ent->t271.addr; 628 ulong data = ent->t271.data; 629 630 ql_dbg(ql_dbg_misc, vha, 0xd20f, 631 "%s: wrremreg [%lx]\n", __func__, *len); 632 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf); 633 qla27xx_write_reg(reg, 0xc4, data, buf); 634 qla27xx_write_reg(reg, 0xc0, addr, buf); 635 636 return false; 637 } 638 639 static int 640 qla27xx_fwdt_entry_t272(struct scsi_qla_host *vha, 641 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 642 { 643 ulong dwords = ent->t272.count; 644 ulong start = ent->t272.addr; 645 646 ql_dbg(ql_dbg_misc, vha, 0xd210, 647 "%s: rdremram [%lx]\n", __func__, *len); 648 if (buf) { 649 ql_dbg(ql_dbg_misc, vha, 0xd02c, 650 "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords); 651 buf += *len; 652 qla27xx_dump_mpi_ram(vha->hw, start, buf, dwords, &buf); 653 } 654 *len += dwords * sizeof(uint32_t); 655 656 return false; 657 } 658 659 static int 660 qla27xx_fwdt_entry_t273(struct scsi_qla_host *vha, 661 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 662 { 663 ulong dwords = ent->t273.count; 664 ulong addr = ent->t273.addr; 665 uint32_t value; 666 667 ql_dbg(ql_dbg_misc, vha, 0xd211, 668 "%s: pcicfg [%lx]\n", __func__, *len); 669 while (dwords--) { 670 value = ~0; 671 if (pci_read_config_dword(vha->hw->pdev, addr, &value)) 672 ql_dbg(ql_dbg_misc, vha, 0xd02d, 673 "%s: failed pcicfg read at %lx\n", __func__, addr); 674 qla27xx_insert32(addr, buf, len); 675 qla27xx_insert32(value, buf, len); 676 addr += sizeof(uint32_t); 677 } 678 679 return false; 680 } 681 682 static int 683 qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha, 684 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 685 { 686 uint count = 0; 687 uint i; 688 689 ql_dbg(ql_dbg_misc, vha, 0xd212, 690 "%s: getqsh(%x) [%lx]\n", __func__, ent->t274.queue_type, *len); 691 if (ent->t274.queue_type == T274_QUEUE_TYPE_REQ_SHAD) { 692 for (i = 0; i < vha->hw->max_req_queues; i++) { 693 struct req_que *req = vha->hw->req_q_map[i]; 694 695 if (req || !buf) { 696 qla27xx_insert16(i, buf, len); 697 qla27xx_insert16(1, buf, len); 698 qla27xx_insert32(req && req->out_ptr ? 699 *req->out_ptr : 0, buf, len); 700 count++; 701 } 702 } 703 } else if (ent->t274.queue_type == T274_QUEUE_TYPE_RSP_SHAD) { 704 for (i = 0; i < vha->hw->max_rsp_queues; i++) { 705 struct rsp_que *rsp = vha->hw->rsp_q_map[i]; 706 707 if (rsp || !buf) { 708 qla27xx_insert16(i, buf, len); 709 qla27xx_insert16(1, buf, len); 710 qla27xx_insert32(rsp && rsp->in_ptr ? 711 *rsp->in_ptr : 0, buf, len); 712 count++; 713 } 714 } 715 } else if (QLA_TGT_MODE_ENABLED() && 716 ent->t274.queue_type == T274_QUEUE_TYPE_ATIO_SHAD) { 717 struct qla_hw_data *ha = vha->hw; 718 struct atio *atr = ha->tgt.atio_ring_ptr; 719 720 if (atr || !buf) { 721 qla27xx_insert16(0, buf, len); 722 qla27xx_insert16(1, buf, len); 723 qla27xx_insert32(ha->tgt.atio_q_in ? 724 readl(ha->tgt.atio_q_in) : 0, buf, len); 725 count++; 726 } 727 } else { 728 ql_dbg(ql_dbg_misc, vha, 0xd02f, 729 "%s: unknown queue %x\n", __func__, ent->t274.queue_type); 730 qla27xx_skip_entry(ent, buf); 731 } 732 733 if (buf) { 734 if (count) 735 ent->t274.num_queues = count; 736 else 737 qla27xx_skip_entry(ent, buf); 738 } 739 740 return false; 741 } 742 743 static int 744 qla27xx_fwdt_entry_t275(struct scsi_qla_host *vha, 745 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 746 { 747 ulong offset = offsetof(typeof(*ent), t275.buffer); 748 749 ql_dbg(ql_dbg_misc, vha, 0xd213, 750 "%s: buffer(%x) [%lx]\n", __func__, ent->t275.length, *len); 751 if (!ent->t275.length) { 752 ql_dbg(ql_dbg_misc, vha, 0xd020, 753 "%s: buffer zero length\n", __func__); 754 qla27xx_skip_entry(ent, buf); 755 goto done; 756 } 757 if (offset + ent->t275.length > ent->hdr.entry_size) { 758 ql_dbg(ql_dbg_misc, vha, 0xd030, 759 "%s: buffer overflow\n", __func__); 760 qla27xx_skip_entry(ent, buf); 761 goto done; 762 } 763 764 qla27xx_insertbuf(ent->t275.buffer, ent->t275.length, buf, len); 765 done: 766 return false; 767 } 768 769 static int 770 qla27xx_fwdt_entry_other(struct scsi_qla_host *vha, 771 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 772 { 773 ql_dbg(ql_dbg_misc, vha, 0xd2ff, 774 "%s: type %x [%lx]\n", __func__, ent->hdr.entry_type, *len); 775 qla27xx_skip_entry(ent, buf); 776 777 return false; 778 } 779 780 struct qla27xx_fwdt_entry_call { 781 uint type; 782 int (*call)( 783 struct scsi_qla_host *, 784 struct qla27xx_fwdt_entry *, 785 void *, 786 ulong *); 787 }; 788 789 static struct qla27xx_fwdt_entry_call ql27xx_fwdt_entry_call_list[] = { 790 { ENTRY_TYPE_NOP , qla27xx_fwdt_entry_t0 } , 791 { ENTRY_TYPE_TMP_END , qla27xx_fwdt_entry_t255 } , 792 { ENTRY_TYPE_RD_IOB_T1 , qla27xx_fwdt_entry_t256 } , 793 { ENTRY_TYPE_WR_IOB_T1 , qla27xx_fwdt_entry_t257 } , 794 { ENTRY_TYPE_RD_IOB_T2 , qla27xx_fwdt_entry_t258 } , 795 { ENTRY_TYPE_WR_IOB_T2 , qla27xx_fwdt_entry_t259 } , 796 { ENTRY_TYPE_RD_PCI , qla27xx_fwdt_entry_t260 } , 797 { ENTRY_TYPE_WR_PCI , qla27xx_fwdt_entry_t261 } , 798 { ENTRY_TYPE_RD_RAM , qla27xx_fwdt_entry_t262 } , 799 { ENTRY_TYPE_GET_QUEUE , qla27xx_fwdt_entry_t263 } , 800 { ENTRY_TYPE_GET_FCE , qla27xx_fwdt_entry_t264 } , 801 { ENTRY_TYPE_PSE_RISC , qla27xx_fwdt_entry_t265 } , 802 { ENTRY_TYPE_RST_RISC , qla27xx_fwdt_entry_t266 } , 803 { ENTRY_TYPE_DIS_INTR , qla27xx_fwdt_entry_t267 } , 804 { ENTRY_TYPE_GET_HBUF , qla27xx_fwdt_entry_t268 } , 805 { ENTRY_TYPE_SCRATCH , qla27xx_fwdt_entry_t269 } , 806 { ENTRY_TYPE_RDREMREG , qla27xx_fwdt_entry_t270 } , 807 { ENTRY_TYPE_WRREMREG , qla27xx_fwdt_entry_t271 } , 808 { ENTRY_TYPE_RDREMRAM , qla27xx_fwdt_entry_t272 } , 809 { ENTRY_TYPE_PCICFG , qla27xx_fwdt_entry_t273 } , 810 { ENTRY_TYPE_GET_SHADOW , qla27xx_fwdt_entry_t274 } , 811 { ENTRY_TYPE_WRITE_BUF , qla27xx_fwdt_entry_t275 } , 812 { -1 , qla27xx_fwdt_entry_other } 813 }; 814 815 static inline int (*qla27xx_find_entry(uint type)) 816 (struct scsi_qla_host *, struct qla27xx_fwdt_entry *, void *, ulong *) 817 { 818 struct qla27xx_fwdt_entry_call *list = ql27xx_fwdt_entry_call_list; 819 820 while (list->type < type) 821 list++; 822 823 if (list->type == type) 824 return list->call; 825 return qla27xx_fwdt_entry_other; 826 } 827 828 static inline void * 829 qla27xx_next_entry(void *p) 830 { 831 struct qla27xx_fwdt_entry *ent = p; 832 833 return p + ent->hdr.entry_size; 834 } 835 836 static void 837 qla27xx_walk_template(struct scsi_qla_host *vha, 838 struct qla27xx_fwdt_template *tmp, void *buf, ulong *len) 839 { 840 struct qla27xx_fwdt_entry *ent = (void *)tmp + tmp->entry_offset; 841 ulong count = tmp->entry_count; 842 843 ql_dbg(ql_dbg_misc, vha, 0xd01a, 844 "%s: entry count %lx\n", __func__, count); 845 while (count--) { 846 if (buf && *len >= vha->hw->fw_dump_len) 847 break; 848 if (qla27xx_find_entry(ent->hdr.entry_type)(vha, ent, buf, len)) 849 break; 850 ent = qla27xx_next_entry(ent); 851 } 852 853 if (count) 854 ql_dbg(ql_dbg_misc, vha, 0xd018, 855 "%s: entry residual count (%lx)\n", __func__, count); 856 857 if (ent->hdr.entry_type != ENTRY_TYPE_TMP_END) 858 ql_dbg(ql_dbg_misc, vha, 0xd019, 859 "%s: missing end entry (%lx)\n", __func__, count); 860 861 if (buf && *len != vha->hw->fw_dump_len) 862 ql_dbg(ql_dbg_misc, vha, 0xd01b, 863 "%s: length=%#lx residual=%+ld\n", 864 __func__, *len, vha->hw->fw_dump_len - *len); 865 866 if (buf) { 867 ql_log(ql_log_warn, vha, 0xd015, 868 "Firmware dump saved to temp buffer (%lu/%p)\n", 869 vha->host_no, vha->hw->fw_dump); 870 qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP); 871 } 872 } 873 874 static void 875 qla27xx_time_stamp(struct qla27xx_fwdt_template *tmp) 876 { 877 tmp->capture_timestamp = jiffies; 878 } 879 880 static void 881 qla27xx_driver_info(struct qla27xx_fwdt_template *tmp) 882 { 883 uint8_t v[] = { 0, 0, 0, 0, 0, 0 }; 884 885 sscanf(qla2x00_version_str, "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu", 886 v+0, v+1, v+2, v+3, v+4, v+5); 887 888 tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0]; 889 tmp->driver_info[1] = v[5] << 8 | v[4]; 890 tmp->driver_info[2] = 0x12345678; 891 } 892 893 static void 894 qla27xx_firmware_info(struct qla27xx_fwdt_template *tmp, 895 struct scsi_qla_host *vha) 896 { 897 tmp->firmware_version[0] = vha->hw->fw_major_version; 898 tmp->firmware_version[1] = vha->hw->fw_minor_version; 899 tmp->firmware_version[2] = vha->hw->fw_subminor_version; 900 tmp->firmware_version[3] = 901 vha->hw->fw_attributes_h << 16 | vha->hw->fw_attributes; 902 tmp->firmware_version[4] = 903 vha->hw->fw_attributes_ext[1] << 16 | vha->hw->fw_attributes_ext[0]; 904 } 905 906 static void 907 ql27xx_edit_template(struct scsi_qla_host *vha, 908 struct qla27xx_fwdt_template *tmp) 909 { 910 qla27xx_time_stamp(tmp); 911 qla27xx_driver_info(tmp); 912 qla27xx_firmware_info(tmp, vha); 913 } 914 915 static inline uint32_t 916 qla27xx_template_checksum(void *p, ulong size) 917 { 918 uint32_t *buf = p; 919 uint64_t sum = 0; 920 921 size /= sizeof(*buf); 922 923 while (size--) 924 sum += *buf++; 925 926 sum = (sum & 0xffffffff) + (sum >> 32); 927 928 return ~sum; 929 } 930 931 static inline int 932 qla27xx_verify_template_checksum(struct qla27xx_fwdt_template *tmp) 933 { 934 return qla27xx_template_checksum(tmp, tmp->template_size) == 0; 935 } 936 937 static inline int 938 qla27xx_verify_template_header(struct qla27xx_fwdt_template *tmp) 939 { 940 return tmp->template_type == TEMPLATE_TYPE_FWDUMP; 941 } 942 943 static void 944 qla27xx_execute_fwdt_template(struct scsi_qla_host *vha) 945 { 946 struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template; 947 ulong len; 948 949 if (qla27xx_fwdt_template_valid(tmp)) { 950 len = tmp->template_size; 951 tmp = memcpy(vha->hw->fw_dump, tmp, len); 952 ql27xx_edit_template(vha, tmp); 953 qla27xx_walk_template(vha, tmp, tmp, &len); 954 vha->hw->fw_dump_len = len; 955 vha->hw->fw_dumped = 1; 956 } 957 } 958 959 ulong 960 qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host *vha) 961 { 962 struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template; 963 ulong len = 0; 964 965 if (qla27xx_fwdt_template_valid(tmp)) { 966 len = tmp->template_size; 967 qla27xx_walk_template(vha, tmp, NULL, &len); 968 } 969 970 return len; 971 } 972 973 ulong 974 qla27xx_fwdt_template_size(void *p) 975 { 976 struct qla27xx_fwdt_template *tmp = p; 977 978 return tmp->template_size; 979 } 980 981 ulong 982 qla27xx_fwdt_template_default_size(void) 983 { 984 return sizeof(ql27xx_fwdt_default_template); 985 } 986 987 const void * 988 qla27xx_fwdt_template_default(void) 989 { 990 return ql27xx_fwdt_default_template; 991 } 992 993 int 994 qla27xx_fwdt_template_valid(void *p) 995 { 996 struct qla27xx_fwdt_template *tmp = p; 997 998 if (!qla27xx_verify_template_header(tmp)) { 999 ql_log(ql_log_warn, NULL, 0xd01c, 1000 "%s: template type %x\n", __func__, tmp->template_type); 1001 return false; 1002 } 1003 1004 if (!qla27xx_verify_template_checksum(tmp)) { 1005 ql_log(ql_log_warn, NULL, 0xd01d, 1006 "%s: failed template checksum\n", __func__); 1007 return false; 1008 } 1009 1010 return true; 1011 } 1012 1013 void 1014 qla27xx_fwdump(scsi_qla_host_t *vha, int hardware_locked) 1015 { 1016 ulong flags = 0; 1017 1018 #ifndef __CHECKER__ 1019 if (!hardware_locked) 1020 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 1021 #endif 1022 1023 if (!vha->hw->fw_dump) 1024 ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n"); 1025 else if (!vha->hw->fw_dump_template) 1026 ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n"); 1027 else if (vha->hw->fw_dumped) 1028 ql_log(ql_log_warn, vha, 0xd300, 1029 "Firmware has been previously dumped (%p)," 1030 " -- ignoring request\n", vha->hw->fw_dump); 1031 else 1032 qla27xx_execute_fwdt_template(vha); 1033 1034 #ifndef __CHECKER__ 1035 if (!hardware_locked) 1036 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 1037 #endif 1038 } 1039