1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_tmpl.h" 9 10 /* note default template is in big endian */ 11 static const uint32_t ql27xx_fwdt_default_template[] = { 12 0x63000000, 0xa4000000, 0x7c050000, 0x00000000, 13 0x30000000, 0x01000000, 0x00000000, 0xc0406eb4, 14 0x00000000, 0x00000000, 0x00000000, 0x00000000, 15 0x00000000, 0x00000000, 0x00000000, 0x00000000, 16 0x00000000, 0x00000000, 0x00000000, 0x00000000, 17 0x00000000, 0x00000000, 0x00000000, 0x00000000, 18 0x00000000, 0x00000000, 0x00000000, 0x00000000, 19 0x00000000, 0x00000000, 0x00000000, 0x00000000, 20 0x00000000, 0x00000000, 0x00000000, 0x00000000, 21 0x00000000, 0x00000000, 0x00000000, 0x00000000, 22 0x00000000, 0x04010000, 0x14000000, 0x00000000, 23 0x02000000, 0x44000000, 0x09010000, 0x10000000, 24 0x00000000, 0x02000000, 0x01010000, 0x1c000000, 25 0x00000000, 0x02000000, 0x00600000, 0x00000000, 26 0xc0000000, 0x01010000, 0x1c000000, 0x00000000, 27 0x02000000, 0x00600000, 0x00000000, 0xcc000000, 28 0x01010000, 0x1c000000, 0x00000000, 0x02000000, 29 0x10600000, 0x00000000, 0xd4000000, 0x01010000, 30 0x1c000000, 0x00000000, 0x02000000, 0x700f0000, 31 0x00000060, 0xf0000000, 0x00010000, 0x18000000, 32 0x00000000, 0x02000000, 0x00700000, 0x041000c0, 33 0x00010000, 0x18000000, 0x00000000, 0x02000000, 34 0x10700000, 0x041000c0, 0x00010000, 0x18000000, 35 0x00000000, 0x02000000, 0x40700000, 0x041000c0, 36 0x01010000, 0x1c000000, 0x00000000, 0x02000000, 37 0x007c0000, 0x01000000, 0xc0000000, 0x00010000, 38 0x18000000, 0x00000000, 0x02000000, 0x007c0000, 39 0x040300c4, 0x00010000, 0x18000000, 0x00000000, 40 0x02000000, 0x007c0000, 0x040100c0, 0x01010000, 41 0x1c000000, 0x00000000, 0x02000000, 0x007c0000, 42 0x00000000, 0xc0000000, 0x00010000, 0x18000000, 43 0x00000000, 0x02000000, 0x007c0000, 0x04200000, 44 0x0b010000, 0x18000000, 0x00000000, 0x02000000, 45 0x0c000000, 0x00000000, 0x02010000, 0x20000000, 46 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 47 0xf0000000, 0x000000b0, 0x02010000, 0x20000000, 48 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 49 0xf0000000, 0x000010b0, 0x02010000, 0x20000000, 50 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 51 0xf0000000, 0x000020b0, 0x02010000, 0x20000000, 52 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 53 0xf0000000, 0x000030b0, 0x02010000, 0x20000000, 54 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 55 0xf0000000, 0x000040b0, 0x02010000, 0x20000000, 56 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 57 0xf0000000, 0x000050b0, 0x02010000, 0x20000000, 58 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 59 0xf0000000, 0x000060b0, 0x02010000, 0x20000000, 60 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 61 0xf0000000, 0x000070b0, 0x02010000, 0x20000000, 62 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 63 0xf0000000, 0x000080b0, 0x02010000, 0x20000000, 64 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 65 0xf0000000, 0x000090b0, 0x02010000, 0x20000000, 66 0x00000000, 0x02000000, 0x700f0000, 0x040100fc, 67 0xf0000000, 0x0000a0b0, 0x00010000, 0x18000000, 68 0x00000000, 0x02000000, 0x0a000000, 0x040100c0, 69 0x00010000, 0x18000000, 0x00000000, 0x02000000, 70 0x0a000000, 0x04200080, 0x00010000, 0x18000000, 71 0x00000000, 0x02000000, 0x00be0000, 0x041000c0, 72 0x00010000, 0x18000000, 0x00000000, 0x02000000, 73 0x10be0000, 0x041000c0, 0x00010000, 0x18000000, 74 0x00000000, 0x02000000, 0x20be0000, 0x041000c0, 75 0x00010000, 0x18000000, 0x00000000, 0x02000000, 76 0x30be0000, 0x041000c0, 0x00010000, 0x18000000, 77 0x00000000, 0x02000000, 0x00b00000, 0x041000c0, 78 0x00010000, 0x18000000, 0x00000000, 0x02000000, 79 0x10b00000, 0x041000c0, 0x00010000, 0x18000000, 80 0x00000000, 0x02000000, 0x20b00000, 0x041000c0, 81 0x00010000, 0x18000000, 0x00000000, 0x02000000, 82 0x30b00000, 0x041000c0, 0x00010000, 0x18000000, 83 0x00000000, 0x02000000, 0x00300000, 0x041000c0, 84 0x00010000, 0x18000000, 0x00000000, 0x02000000, 85 0x10300000, 0x041000c0, 0x00010000, 0x18000000, 86 0x00000000, 0x02000000, 0x20300000, 0x041000c0, 87 0x00010000, 0x18000000, 0x00000000, 0x02000000, 88 0x30300000, 0x041000c0, 0x0a010000, 0x10000000, 89 0x00000000, 0x02000000, 0x06010000, 0x1c000000, 90 0x00000000, 0x02000000, 0x01000000, 0x00000200, 91 0xff230200, 0x06010000, 0x1c000000, 0x00000000, 92 0x02000000, 0x02000000, 0x00001000, 0x00000000, 93 0x07010000, 0x18000000, 0x00000000, 0x02000000, 94 0x00000000, 0x01000000, 0x07010000, 0x18000000, 95 0x00000000, 0x02000000, 0x00000000, 0x02000000, 96 0x07010000, 0x18000000, 0x00000000, 0x02000000, 97 0x00000000, 0x03000000, 0x0d010000, 0x14000000, 98 0x00000000, 0x02000000, 0x00000000, 0xff000000, 99 0x10000000, 0x00000000, 0x00000080, 100 }; 101 102 static inline void __iomem * 103 qla27xx_isp_reg(struct scsi_qla_host *vha) 104 { 105 return &vha->hw->iobase->isp24; 106 } 107 108 static inline void 109 qla27xx_insert16(uint16_t value, void *buf, ulong *len) 110 { 111 if (buf) { 112 buf += *len; 113 *(__le16 *)buf = cpu_to_le16(value); 114 } 115 *len += sizeof(value); 116 } 117 118 static inline void 119 qla27xx_insert32(uint32_t value, void *buf, ulong *len) 120 { 121 if (buf) { 122 buf += *len; 123 *(__le32 *)buf = cpu_to_le32(value); 124 } 125 *len += sizeof(value); 126 } 127 128 static inline void 129 qla27xx_insertbuf(void *mem, ulong size, void *buf, ulong *len) 130 { 131 132 if (buf && mem && size) { 133 buf += *len; 134 memcpy(buf, mem, size); 135 } 136 *len += size; 137 } 138 139 static inline void 140 qla27xx_read8(void __iomem *window, void *buf, ulong *len) 141 { 142 uint8_t value = ~0; 143 144 if (buf) { 145 value = RD_REG_BYTE(window); 146 } 147 qla27xx_insert32(value, buf, len); 148 } 149 150 static inline void 151 qla27xx_read16(void __iomem *window, void *buf, ulong *len) 152 { 153 uint16_t value = ~0; 154 155 if (buf) { 156 value = RD_REG_WORD(window); 157 } 158 qla27xx_insert32(value, buf, len); 159 } 160 161 static inline void 162 qla27xx_read32(void __iomem *window, void *buf, ulong *len) 163 { 164 uint32_t value = ~0; 165 166 if (buf) { 167 value = RD_REG_DWORD(window); 168 } 169 qla27xx_insert32(value, buf, len); 170 } 171 172 static inline void (*qla27xx_read_vector(uint width))(void __iomem*, void *, ulong *) 173 { 174 return 175 (width == 1) ? qla27xx_read8 : 176 (width == 2) ? qla27xx_read16 : 177 qla27xx_read32; 178 } 179 180 static inline void 181 qla27xx_read_reg(__iomem struct device_reg_24xx *reg, 182 uint offset, void *buf, ulong *len) 183 { 184 void __iomem *window = (void __iomem *)reg + offset; 185 186 qla27xx_read32(window, buf, len); 187 } 188 189 static inline void 190 qla27xx_write_reg(__iomem struct device_reg_24xx *reg, 191 uint offset, uint32_t data, void *buf) 192 { 193 __iomem void *window = (void __iomem *)reg + offset; 194 195 if (buf) { 196 WRT_REG_DWORD(window, data); 197 } 198 } 199 200 static inline void 201 qla27xx_read_window(__iomem struct device_reg_24xx *reg, 202 uint32_t addr, uint offset, uint count, uint width, void *buf, 203 ulong *len) 204 { 205 void __iomem *window = (void __iomem *)reg + offset; 206 void (*readn)(void __iomem*, void *, ulong *) = qla27xx_read_vector(width); 207 208 qla27xx_write_reg(reg, IOBASE_ADDR, addr, buf); 209 while (count--) { 210 qla27xx_insert32(addr, buf, len); 211 readn(window, buf, len); 212 window += width; 213 addr++; 214 } 215 } 216 217 static inline void 218 qla27xx_skip_entry(struct qla27xx_fwdt_entry *ent, void *buf) 219 { 220 if (buf) 221 ent->hdr.driver_flags |= DRIVER_FLAG_SKIP_ENTRY; 222 ql_dbg(ql_dbg_misc + ql_dbg_verbose, NULL, 0xd011, 223 "Skipping entry %d\n", ent->hdr.entry_type); 224 } 225 226 static int 227 qla27xx_fwdt_entry_t0(struct scsi_qla_host *vha, 228 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 229 { 230 ql_dbg(ql_dbg_misc, vha, 0xd100, 231 "%s: nop [%lx]\n", __func__, *len); 232 qla27xx_skip_entry(ent, buf); 233 234 return false; 235 } 236 237 static int 238 qla27xx_fwdt_entry_t255(struct scsi_qla_host *vha, 239 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 240 { 241 ql_dbg(ql_dbg_misc, vha, 0xd1ff, 242 "%s: end [%lx]\n", __func__, *len); 243 qla27xx_skip_entry(ent, buf); 244 245 /* terminate */ 246 return true; 247 } 248 249 static int 250 qla27xx_fwdt_entry_t256(struct scsi_qla_host *vha, 251 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 252 { 253 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 254 255 ql_dbg(ql_dbg_misc, vha, 0xd200, 256 "%s: rdio t1 [%lx]\n", __func__, *len); 257 qla27xx_read_window(reg, ent->t256.base_addr, ent->t256.pci_offset, 258 ent->t256.reg_count, ent->t256.reg_width, buf, len); 259 260 return false; 261 } 262 263 static int 264 qla27xx_fwdt_entry_t257(struct scsi_qla_host *vha, 265 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 266 { 267 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 268 269 ql_dbg(ql_dbg_misc, vha, 0xd201, 270 "%s: wrio t1 [%lx]\n", __func__, *len); 271 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t257.base_addr, buf); 272 qla27xx_write_reg(reg, ent->t257.pci_offset, ent->t257.write_data, buf); 273 274 return false; 275 } 276 277 static int 278 qla27xx_fwdt_entry_t258(struct scsi_qla_host *vha, 279 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 280 { 281 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 282 283 ql_dbg(ql_dbg_misc, vha, 0xd202, 284 "%s: rdio t2 [%lx]\n", __func__, *len); 285 qla27xx_write_reg(reg, ent->t258.banksel_offset, ent->t258.bank, buf); 286 qla27xx_read_window(reg, ent->t258.base_addr, ent->t258.pci_offset, 287 ent->t258.reg_count, ent->t258.reg_width, buf, len); 288 289 return false; 290 } 291 292 static int 293 qla27xx_fwdt_entry_t259(struct scsi_qla_host *vha, 294 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 295 { 296 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 297 298 ql_dbg(ql_dbg_misc, vha, 0xd203, 299 "%s: wrio t2 [%lx]\n", __func__, *len); 300 qla27xx_write_reg(reg, IOBASE_ADDR, ent->t259.base_addr, buf); 301 qla27xx_write_reg(reg, ent->t259.banksel_offset, ent->t259.bank, buf); 302 qla27xx_write_reg(reg, ent->t259.pci_offset, ent->t259.write_data, buf); 303 304 return false; 305 } 306 307 static int 308 qla27xx_fwdt_entry_t260(struct scsi_qla_host *vha, 309 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 310 { 311 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 312 313 ql_dbg(ql_dbg_misc, vha, 0xd204, 314 "%s: rdpci [%lx]\n", __func__, *len); 315 qla27xx_insert32(ent->t260.pci_offset, buf, len); 316 qla27xx_read_reg(reg, ent->t260.pci_offset, buf, len); 317 318 return false; 319 } 320 321 static int 322 qla27xx_fwdt_entry_t261(struct scsi_qla_host *vha, 323 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 324 { 325 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 326 327 ql_dbg(ql_dbg_misc, vha, 0xd205, 328 "%s: wrpci [%lx]\n", __func__, *len); 329 qla27xx_write_reg(reg, ent->t261.pci_offset, ent->t261.write_data, buf); 330 331 return false; 332 } 333 334 static int 335 qla27xx_fwdt_entry_t262(struct scsi_qla_host *vha, 336 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 337 { 338 ulong dwords; 339 ulong start; 340 ulong end; 341 342 ql_dbg(ql_dbg_misc, vha, 0xd206, 343 "%s: rdram(%x) [%lx]\n", __func__, ent->t262.ram_area, *len); 344 start = ent->t262.start_addr; 345 end = ent->t262.end_addr; 346 347 if (ent->t262.ram_area == T262_RAM_AREA_CRITICAL_RAM) { 348 ; 349 } else if (ent->t262.ram_area == T262_RAM_AREA_EXTERNAL_RAM) { 350 end = vha->hw->fw_memory_size; 351 if (buf) 352 ent->t262.end_addr = end; 353 } else if (ent->t262.ram_area == T262_RAM_AREA_SHARED_RAM) { 354 start = vha->hw->fw_shared_ram_start; 355 end = vha->hw->fw_shared_ram_end; 356 if (buf) { 357 ent->t262.start_addr = start; 358 ent->t262.end_addr = end; 359 } 360 } else { 361 ql_dbg(ql_dbg_misc, vha, 0xd022, 362 "%s: unknown area %x\n", __func__, ent->t262.ram_area); 363 qla27xx_skip_entry(ent, buf); 364 goto done; 365 } 366 367 if (end < start || end == 0) { 368 ql_dbg(ql_dbg_misc, vha, 0xd023, 369 "%s: unusable range (start=%x end=%x)\n", __func__, 370 ent->t262.end_addr, ent->t262.start_addr); 371 qla27xx_skip_entry(ent, buf); 372 goto done; 373 } 374 375 dwords = end - start + 1; 376 if (buf) { 377 buf += *len; 378 qla24xx_dump_ram(vha->hw, start, buf, dwords, &buf); 379 } 380 *len += dwords * sizeof(uint32_t); 381 done: 382 return false; 383 } 384 385 static int 386 qla27xx_fwdt_entry_t263(struct scsi_qla_host *vha, 387 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 388 { 389 uint count = 0; 390 uint i; 391 uint length; 392 393 ql_dbg(ql_dbg_misc, vha, 0xd207, 394 "%s: getq(%x) [%lx]\n", __func__, ent->t263.queue_type, *len); 395 if (ent->t263.queue_type == T263_QUEUE_TYPE_REQ) { 396 for (i = 0; i < vha->hw->max_req_queues; i++) { 397 struct req_que *req = vha->hw->req_q_map[i]; 398 399 if (!test_bit(i, vha->hw->req_qid_map)) 400 continue; 401 402 if (req || !buf) { 403 length = req ? 404 req->length : REQUEST_ENTRY_CNT_24XX; 405 qla27xx_insert16(i, buf, len); 406 qla27xx_insert16(length, buf, len); 407 qla27xx_insertbuf(req ? req->ring : NULL, 408 length * sizeof(*req->ring), buf, len); 409 count++; 410 } 411 } 412 } else if (ent->t263.queue_type == T263_QUEUE_TYPE_RSP) { 413 for (i = 0; i < vha->hw->max_rsp_queues; i++) { 414 struct rsp_que *rsp = vha->hw->rsp_q_map[i]; 415 416 if (!test_bit(i, vha->hw->rsp_qid_map)) 417 continue; 418 419 if (rsp || !buf) { 420 length = rsp ? 421 rsp->length : RESPONSE_ENTRY_CNT_MQ; 422 qla27xx_insert16(i, buf, len); 423 qla27xx_insert16(length, buf, len); 424 qla27xx_insertbuf(rsp ? rsp->ring : NULL, 425 length * sizeof(*rsp->ring), buf, len); 426 count++; 427 } 428 } 429 } else { 430 ql_dbg(ql_dbg_misc, vha, 0xd026, 431 "%s: unknown queue %x\n", __func__, ent->t263.queue_type); 432 qla27xx_skip_entry(ent, buf); 433 } 434 435 if (buf) 436 ent->t263.num_queues = count; 437 438 return false; 439 } 440 441 static int 442 qla27xx_fwdt_entry_t264(struct scsi_qla_host *vha, 443 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 444 { 445 ql_dbg(ql_dbg_misc, vha, 0xd208, 446 "%s: getfce [%lx]\n", __func__, *len); 447 if (vha->hw->fce) { 448 if (buf) { 449 ent->t264.fce_trace_size = FCE_SIZE; 450 ent->t264.write_pointer = vha->hw->fce_wr; 451 ent->t264.base_pointer = vha->hw->fce_dma; 452 ent->t264.fce_enable_mb0 = vha->hw->fce_mb[0]; 453 ent->t264.fce_enable_mb2 = vha->hw->fce_mb[2]; 454 ent->t264.fce_enable_mb3 = vha->hw->fce_mb[3]; 455 ent->t264.fce_enable_mb4 = vha->hw->fce_mb[4]; 456 ent->t264.fce_enable_mb5 = vha->hw->fce_mb[5]; 457 ent->t264.fce_enable_mb6 = vha->hw->fce_mb[6]; 458 } 459 qla27xx_insertbuf(vha->hw->fce, FCE_SIZE, buf, len); 460 } else { 461 ql_dbg(ql_dbg_misc, vha, 0xd027, 462 "%s: missing fce\n", __func__); 463 qla27xx_skip_entry(ent, buf); 464 } 465 466 return false; 467 } 468 469 static int 470 qla27xx_fwdt_entry_t265(struct scsi_qla_host *vha, 471 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 472 { 473 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 474 475 ql_dbg(ql_dbg_misc, vha, 0xd209, 476 "%s: pause risc [%lx]\n", __func__, *len); 477 if (buf) 478 qla24xx_pause_risc(reg, vha->hw); 479 480 return false; 481 } 482 483 static int 484 qla27xx_fwdt_entry_t266(struct scsi_qla_host *vha, 485 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 486 { 487 ql_dbg(ql_dbg_misc, vha, 0xd20a, 488 "%s: reset risc [%lx]\n", __func__, *len); 489 if (buf) 490 qla24xx_soft_reset(vha->hw); 491 492 return false; 493 } 494 495 static int 496 qla27xx_fwdt_entry_t267(struct scsi_qla_host *vha, 497 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 498 { 499 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 500 501 ql_dbg(ql_dbg_misc, vha, 0xd20b, 502 "%s: dis intr [%lx]\n", __func__, *len); 503 qla27xx_write_reg(reg, ent->t267.pci_offset, ent->t267.data, buf); 504 505 return false; 506 } 507 508 static int 509 qla27xx_fwdt_entry_t268(struct scsi_qla_host *vha, 510 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 511 { 512 ql_dbg(ql_dbg_misc, vha, 0xd20c, 513 "%s: gethb(%x) [%lx]\n", __func__, ent->t268.buf_type, *len); 514 if (ent->t268.buf_type == T268_BUF_TYPE_EXTD_TRACE) { 515 if (vha->hw->eft) { 516 if (buf) { 517 ent->t268.buf_size = EFT_SIZE; 518 ent->t268.start_addr = vha->hw->eft_dma; 519 } 520 qla27xx_insertbuf(vha->hw->eft, EFT_SIZE, buf, len); 521 } else { 522 ql_dbg(ql_dbg_misc, vha, 0xd028, 523 "%s: missing eft\n", __func__); 524 qla27xx_skip_entry(ent, buf); 525 } 526 } else { 527 ql_dbg(ql_dbg_misc, vha, 0xd02b, 528 "%s: unknown buffer %x\n", __func__, ent->t268.buf_type); 529 qla27xx_skip_entry(ent, buf); 530 } 531 532 return false; 533 } 534 535 static int 536 qla27xx_fwdt_entry_t269(struct scsi_qla_host *vha, 537 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 538 { 539 ql_dbg(ql_dbg_misc, vha, 0xd20d, 540 "%s: scratch [%lx]\n", __func__, *len); 541 qla27xx_insert32(0xaaaaaaaa, buf, len); 542 qla27xx_insert32(0xbbbbbbbb, buf, len); 543 qla27xx_insert32(0xcccccccc, buf, len); 544 qla27xx_insert32(0xdddddddd, buf, len); 545 qla27xx_insert32(*len + sizeof(uint32_t), buf, len); 546 if (buf) 547 ent->t269.scratch_size = 5 * sizeof(uint32_t); 548 549 return false; 550 } 551 552 static int 553 qla27xx_fwdt_entry_t270(struct scsi_qla_host *vha, 554 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 555 { 556 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 557 ulong dwords = ent->t270.count; 558 ulong addr = ent->t270.addr; 559 560 ql_dbg(ql_dbg_misc, vha, 0xd20e, 561 "%s: rdremreg [%lx]\n", __func__, *len); 562 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf); 563 while (dwords--) { 564 qla27xx_write_reg(reg, 0xc0, addr|0x80000000, buf); 565 qla27xx_insert32(addr, buf, len); 566 qla27xx_read_reg(reg, 0xc4, buf, len); 567 addr += sizeof(uint32_t); 568 } 569 570 return false; 571 } 572 573 static int 574 qla27xx_fwdt_entry_t271(struct scsi_qla_host *vha, 575 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 576 { 577 struct device_reg_24xx __iomem *reg = qla27xx_isp_reg(vha); 578 ulong addr = ent->t271.addr; 579 ulong data = ent->t271.data; 580 581 ql_dbg(ql_dbg_misc, vha, 0xd20f, 582 "%s: wrremreg [%lx]\n", __func__, *len); 583 qla27xx_write_reg(reg, IOBASE_ADDR, 0x40, buf); 584 qla27xx_write_reg(reg, 0xc4, data, buf); 585 qla27xx_write_reg(reg, 0xc0, addr, buf); 586 587 return false; 588 } 589 590 static int 591 qla27xx_fwdt_entry_t272(struct scsi_qla_host *vha, 592 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 593 { 594 ulong dwords = ent->t272.count; 595 ulong start = ent->t272.addr; 596 597 ql_dbg(ql_dbg_misc, vha, 0xd210, 598 "%s: rdremram [%lx]\n", __func__, *len); 599 if (buf) { 600 ql_dbg(ql_dbg_misc, vha, 0xd02c, 601 "%s: @%lx -> (%lx dwords)\n", __func__, start, dwords); 602 buf += *len; 603 qla27xx_dump_mpi_ram(vha->hw, start, buf, dwords, &buf); 604 } 605 *len += dwords * sizeof(uint32_t); 606 607 return false; 608 } 609 610 static int 611 qla27xx_fwdt_entry_t273(struct scsi_qla_host *vha, 612 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 613 { 614 ulong dwords = ent->t273.count; 615 ulong addr = ent->t273.addr; 616 uint32_t value; 617 618 ql_dbg(ql_dbg_misc, vha, 0xd211, 619 "%s: pcicfg [%lx]\n", __func__, *len); 620 while (dwords--) { 621 value = ~0; 622 if (pci_read_config_dword(vha->hw->pdev, addr, &value)) 623 ql_dbg(ql_dbg_misc, vha, 0xd02d, 624 "%s: failed pcicfg read at %lx\n", __func__, addr); 625 qla27xx_insert32(addr, buf, len); 626 qla27xx_insert32(value, buf, len); 627 addr += sizeof(uint32_t); 628 } 629 630 return false; 631 } 632 633 static int 634 qla27xx_fwdt_entry_t274(struct scsi_qla_host *vha, 635 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 636 { 637 uint count = 0; 638 uint i; 639 640 ql_dbg(ql_dbg_misc, vha, 0xd212, 641 "%s: getqsh(%x) [%lx]\n", __func__, ent->t274.queue_type, *len); 642 if (ent->t274.queue_type == T274_QUEUE_TYPE_REQ_SHAD) { 643 for (i = 0; i < vha->hw->max_req_queues; i++) { 644 struct req_que *req = vha->hw->req_q_map[i]; 645 646 if (!test_bit(i, vha->hw->req_qid_map)) 647 continue; 648 649 if (req || !buf) { 650 qla27xx_insert16(i, buf, len); 651 qla27xx_insert16(1, buf, len); 652 qla27xx_insert32(req && req->out_ptr ? 653 *req->out_ptr : 0, buf, len); 654 count++; 655 } 656 } 657 } else if (ent->t274.queue_type == T274_QUEUE_TYPE_RSP_SHAD) { 658 for (i = 0; i < vha->hw->max_rsp_queues; i++) { 659 struct rsp_que *rsp = vha->hw->rsp_q_map[i]; 660 661 if (!test_bit(i, vha->hw->rsp_qid_map)) 662 continue; 663 664 if (rsp || !buf) { 665 qla27xx_insert16(i, buf, len); 666 qla27xx_insert16(1, buf, len); 667 qla27xx_insert32(rsp && rsp->in_ptr ? 668 *rsp->in_ptr : 0, buf, len); 669 count++; 670 } 671 } 672 } else { 673 ql_dbg(ql_dbg_misc, vha, 0xd02f, 674 "%s: unknown queue %x\n", __func__, ent->t274.queue_type); 675 qla27xx_skip_entry(ent, buf); 676 } 677 678 if (buf) 679 ent->t274.num_queues = count; 680 681 if (!count) 682 qla27xx_skip_entry(ent, buf); 683 684 return false; 685 } 686 687 static int 688 qla27xx_fwdt_entry_t275(struct scsi_qla_host *vha, 689 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 690 { 691 ulong offset = offsetof(typeof(*ent), t275.buffer); 692 693 ql_dbg(ql_dbg_misc, vha, 0xd213, 694 "%s: buffer(%x) [%lx]\n", __func__, ent->t275.length, *len); 695 if (!ent->t275.length) { 696 ql_dbg(ql_dbg_misc, vha, 0xd020, 697 "%s: buffer zero length\n", __func__); 698 qla27xx_skip_entry(ent, buf); 699 goto done; 700 } 701 if (offset + ent->t275.length > ent->hdr.entry_size) { 702 ql_dbg(ql_dbg_misc, vha, 0xd030, 703 "%s: buffer overflow\n", __func__); 704 qla27xx_skip_entry(ent, buf); 705 goto done; 706 } 707 708 qla27xx_insertbuf(ent->t275.buffer, ent->t275.length, buf, len); 709 done: 710 return false; 711 } 712 713 static int 714 qla27xx_fwdt_entry_other(struct scsi_qla_host *vha, 715 struct qla27xx_fwdt_entry *ent, void *buf, ulong *len) 716 { 717 ql_dbg(ql_dbg_misc, vha, 0xd2ff, 718 "%s: type %x [%lx]\n", __func__, ent->hdr.entry_type, *len); 719 qla27xx_skip_entry(ent, buf); 720 721 return false; 722 } 723 724 struct qla27xx_fwdt_entry_call { 725 uint type; 726 int (*call)( 727 struct scsi_qla_host *, 728 struct qla27xx_fwdt_entry *, 729 void *, 730 ulong *); 731 }; 732 733 static struct qla27xx_fwdt_entry_call ql27xx_fwdt_entry_call_list[] = { 734 { ENTRY_TYPE_NOP , qla27xx_fwdt_entry_t0 } , 735 { ENTRY_TYPE_TMP_END , qla27xx_fwdt_entry_t255 } , 736 { ENTRY_TYPE_RD_IOB_T1 , qla27xx_fwdt_entry_t256 } , 737 { ENTRY_TYPE_WR_IOB_T1 , qla27xx_fwdt_entry_t257 } , 738 { ENTRY_TYPE_RD_IOB_T2 , qla27xx_fwdt_entry_t258 } , 739 { ENTRY_TYPE_WR_IOB_T2 , qla27xx_fwdt_entry_t259 } , 740 { ENTRY_TYPE_RD_PCI , qla27xx_fwdt_entry_t260 } , 741 { ENTRY_TYPE_WR_PCI , qla27xx_fwdt_entry_t261 } , 742 { ENTRY_TYPE_RD_RAM , qla27xx_fwdt_entry_t262 } , 743 { ENTRY_TYPE_GET_QUEUE , qla27xx_fwdt_entry_t263 } , 744 { ENTRY_TYPE_GET_FCE , qla27xx_fwdt_entry_t264 } , 745 { ENTRY_TYPE_PSE_RISC , qla27xx_fwdt_entry_t265 } , 746 { ENTRY_TYPE_RST_RISC , qla27xx_fwdt_entry_t266 } , 747 { ENTRY_TYPE_DIS_INTR , qla27xx_fwdt_entry_t267 } , 748 { ENTRY_TYPE_GET_HBUF , qla27xx_fwdt_entry_t268 } , 749 { ENTRY_TYPE_SCRATCH , qla27xx_fwdt_entry_t269 } , 750 { ENTRY_TYPE_RDREMREG , qla27xx_fwdt_entry_t270 } , 751 { ENTRY_TYPE_WRREMREG , qla27xx_fwdt_entry_t271 } , 752 { ENTRY_TYPE_RDREMRAM , qla27xx_fwdt_entry_t272 } , 753 { ENTRY_TYPE_PCICFG , qla27xx_fwdt_entry_t273 } , 754 { ENTRY_TYPE_GET_SHADOW , qla27xx_fwdt_entry_t274 } , 755 { ENTRY_TYPE_WRITE_BUF , qla27xx_fwdt_entry_t275 } , 756 { -1 , qla27xx_fwdt_entry_other } 757 }; 758 759 static inline int (*qla27xx_find_entry(uint type)) 760 (struct scsi_qla_host *, struct qla27xx_fwdt_entry *, void *, ulong *) 761 { 762 struct qla27xx_fwdt_entry_call *list = ql27xx_fwdt_entry_call_list; 763 764 while (list->type < type) 765 list++; 766 767 if (list->type == type) 768 return list->call; 769 return qla27xx_fwdt_entry_other; 770 } 771 772 static inline void * 773 qla27xx_next_entry(void *p) 774 { 775 struct qla27xx_fwdt_entry *ent = p; 776 777 return p + ent->hdr.entry_size; 778 } 779 780 static void 781 qla27xx_walk_template(struct scsi_qla_host *vha, 782 struct qla27xx_fwdt_template *tmp, void *buf, ulong *len) 783 { 784 struct qla27xx_fwdt_entry *ent = (void *)tmp + tmp->entry_offset; 785 ulong count = tmp->entry_count; 786 787 ql_dbg(ql_dbg_misc, vha, 0xd01a, 788 "%s: entry count %lx\n", __func__, count); 789 while (count--) { 790 if (qla27xx_find_entry(ent->hdr.entry_type)(vha, ent, buf, len)) 791 break; 792 ent = qla27xx_next_entry(ent); 793 } 794 795 if (count) 796 ql_dbg(ql_dbg_misc, vha, 0xd018, 797 "%s: residual count (%lx)\n", __func__, count); 798 799 if (ent->hdr.entry_type != ENTRY_TYPE_TMP_END) 800 ql_dbg(ql_dbg_misc, vha, 0xd019, 801 "%s: missing end (%lx)\n", __func__, count); 802 803 ql_dbg(ql_dbg_misc, vha, 0xd01b, 804 "%s: len=%lx\n", __func__, *len); 805 806 if (buf) { 807 ql_log(ql_log_warn, vha, 0xd015, 808 "Firmware dump saved to temp buffer (%ld/%p)\n", 809 vha->host_no, vha->hw->fw_dump); 810 qla2x00_post_uevent_work(vha, QLA_UEVENT_CODE_FW_DUMP); 811 } 812 } 813 814 static void 815 qla27xx_time_stamp(struct qla27xx_fwdt_template *tmp) 816 { 817 tmp->capture_timestamp = jiffies; 818 } 819 820 static void 821 qla27xx_driver_info(struct qla27xx_fwdt_template *tmp) 822 { 823 uint8_t v[] = { 0, 0, 0, 0, 0, 0 }; 824 825 sscanf(qla2x00_version_str, "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu", 826 v+0, v+1, v+2, v+3, v+4, v+5); 827 828 tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0]; 829 tmp->driver_info[1] = v[5] << 8 | v[4]; 830 tmp->driver_info[2] = 0x12345678; 831 } 832 833 static void 834 qla27xx_firmware_info(struct qla27xx_fwdt_template *tmp, 835 struct scsi_qla_host *vha) 836 { 837 tmp->firmware_version[0] = vha->hw->fw_major_version; 838 tmp->firmware_version[1] = vha->hw->fw_minor_version; 839 tmp->firmware_version[2] = vha->hw->fw_subminor_version; 840 tmp->firmware_version[3] = 841 vha->hw->fw_attributes_h << 16 | vha->hw->fw_attributes; 842 tmp->firmware_version[4] = 843 vha->hw->fw_attributes_ext[1] << 16 | vha->hw->fw_attributes_ext[0]; 844 } 845 846 static void 847 ql27xx_edit_template(struct scsi_qla_host *vha, 848 struct qla27xx_fwdt_template *tmp) 849 { 850 qla27xx_time_stamp(tmp); 851 qla27xx_driver_info(tmp); 852 qla27xx_firmware_info(tmp, vha); 853 } 854 855 static inline uint32_t 856 qla27xx_template_checksum(void *p, ulong size) 857 { 858 uint32_t *buf = p; 859 uint64_t sum = 0; 860 861 size /= sizeof(*buf); 862 863 while (size--) 864 sum += *buf++; 865 866 sum = (sum & 0xffffffff) + (sum >> 32); 867 868 return ~sum; 869 } 870 871 static inline int 872 qla27xx_verify_template_checksum(struct qla27xx_fwdt_template *tmp) 873 { 874 return qla27xx_template_checksum(tmp, tmp->template_size) == 0; 875 } 876 877 static inline int 878 qla27xx_verify_template_header(struct qla27xx_fwdt_template *tmp) 879 { 880 return tmp->template_type == TEMPLATE_TYPE_FWDUMP; 881 } 882 883 static void 884 qla27xx_execute_fwdt_template(struct scsi_qla_host *vha) 885 { 886 struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template; 887 ulong len; 888 889 if (qla27xx_fwdt_template_valid(tmp)) { 890 len = tmp->template_size; 891 tmp = memcpy(vha->hw->fw_dump, tmp, len); 892 ql27xx_edit_template(vha, tmp); 893 qla27xx_walk_template(vha, tmp, tmp, &len); 894 vha->hw->fw_dump_len = len; 895 vha->hw->fw_dumped = 1; 896 } 897 } 898 899 ulong 900 qla27xx_fwdt_calculate_dump_size(struct scsi_qla_host *vha) 901 { 902 struct qla27xx_fwdt_template *tmp = vha->hw->fw_dump_template; 903 ulong len = 0; 904 905 if (qla27xx_fwdt_template_valid(tmp)) { 906 len = tmp->template_size; 907 qla27xx_walk_template(vha, tmp, NULL, &len); 908 } 909 910 return len; 911 } 912 913 ulong 914 qla27xx_fwdt_template_size(void *p) 915 { 916 struct qla27xx_fwdt_template *tmp = p; 917 918 return tmp->template_size; 919 } 920 921 ulong 922 qla27xx_fwdt_template_default_size(void) 923 { 924 return sizeof(ql27xx_fwdt_default_template); 925 } 926 927 const void * 928 qla27xx_fwdt_template_default(void) 929 { 930 return ql27xx_fwdt_default_template; 931 } 932 933 int 934 qla27xx_fwdt_template_valid(void *p) 935 { 936 struct qla27xx_fwdt_template *tmp = p; 937 938 if (!qla27xx_verify_template_header(tmp)) { 939 ql_log(ql_log_warn, NULL, 0xd01c, 940 "%s: template type %x\n", __func__, tmp->template_type); 941 return false; 942 } 943 944 if (!qla27xx_verify_template_checksum(tmp)) { 945 ql_log(ql_log_warn, NULL, 0xd01d, 946 "%s: failed template checksum\n", __func__); 947 return false; 948 } 949 950 return true; 951 } 952 953 void 954 qla27xx_fwdump(scsi_qla_host_t *vha, int hardware_locked) 955 { 956 ulong flags = 0; 957 958 #ifndef __CHECKER__ 959 if (!hardware_locked) 960 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 961 #endif 962 963 if (!vha->hw->fw_dump) 964 ql_log(ql_log_warn, vha, 0xd01e, "fwdump buffer missing.\n"); 965 else if (!vha->hw->fw_dump_template) 966 ql_log(ql_log_warn, vha, 0xd01f, "fwdump template missing.\n"); 967 else if (vha->hw->fw_dumped) 968 ql_log(ql_log_warn, vha, 0xd300, 969 "Firmware has been previously dumped (%p)," 970 " -- ignoring request\n", vha->hw->fw_dump); 971 else 972 qla27xx_execute_fwdt_template(vha); 973 974 #ifndef __CHECKER__ 975 if (!hardware_locked) 976 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 977 #endif 978 } 979