1 /* 2 * Copyright (C) 2004 - 2010 Vladislav Bolkhovitin <vst@vlnb.net> 3 * Copyright (C) 2004 - 2005 Leonid Stoljar 4 * Copyright (C) 2006 Nathaniel Clark <nate@misrule.us> 5 * Copyright (C) 2007 - 2010 ID7 Ltd. 6 * 7 * Forward port and refactoring to modern qla2xxx and target/configfs 8 * 9 * Copyright (C) 2010-2011 Nicholas A. Bellinger <nab@kernel.org> 10 * 11 * Additional file for the target driver support. 12 * 13 * This program is free software; you can redistribute it and/or 14 * modify it under the terms of the GNU General Public License 15 * as published by the Free Software Foundation; either version 2 16 * of the License, or (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 */ 23 /* 24 * This is the global def file that is useful for including from the 25 * target portion. 26 */ 27 28 #ifndef __QLA_TARGET_H 29 #define __QLA_TARGET_H 30 31 #include "qla_def.h" 32 33 /* 34 * Must be changed on any change in any initiator visible interfaces or 35 * data in the target add-on 36 */ 37 #define QLA2XXX_TARGET_MAGIC 269 38 39 /* 40 * Must be changed on any change in any target visible interfaces or 41 * data in the initiator 42 */ 43 #define QLA2XXX_INITIATOR_MAGIC 57222 44 45 #define QLA2XXX_INI_MODE_STR_EXCLUSIVE "exclusive" 46 #define QLA2XXX_INI_MODE_STR_DISABLED "disabled" 47 #define QLA2XXX_INI_MODE_STR_ENABLED "enabled" 48 #define QLA2XXX_INI_MODE_STR_DUAL "dual" 49 50 #define QLA2XXX_INI_MODE_EXCLUSIVE 0 51 #define QLA2XXX_INI_MODE_DISABLED 1 52 #define QLA2XXX_INI_MODE_ENABLED 2 53 #define QLA2XXX_INI_MODE_DUAL 3 54 55 #define QLA2XXX_COMMAND_COUNT_INIT 250 56 #define QLA2XXX_IMMED_NOTIFY_COUNT_INIT 250 57 58 /* 59 * Used to mark which completion handles (for RIO Status's) are for CTIO's 60 * vs. regular (non-target) info. This is checked for in 61 * qla2x00_process_response_queue() to see if a handle coming back in a 62 * multi-complete should come to the tgt driver or be handled there by qla2xxx 63 */ 64 #define CTIO_COMPLETION_HANDLE_MARK BIT_29 65 #if (CTIO_COMPLETION_HANDLE_MARK <= DEFAULT_OUTSTANDING_COMMANDS) 66 #error "CTIO_COMPLETION_HANDLE_MARK not larger than " 67 "DEFAULT_OUTSTANDING_COMMANDS" 68 #endif 69 #define HANDLE_IS_CTIO_COMP(h) (h & CTIO_COMPLETION_HANDLE_MARK) 70 71 /* Used to mark CTIO as intermediate */ 72 #define CTIO_INTERMEDIATE_HANDLE_MARK BIT_30 73 74 #ifndef OF_SS_MODE_0 75 /* 76 * ISP target entries - Flags bit definitions. 77 */ 78 #define OF_SS_MODE_0 0 79 #define OF_SS_MODE_1 1 80 #define OF_SS_MODE_2 2 81 #define OF_SS_MODE_3 3 82 83 #define OF_EXPL_CONF BIT_5 /* Explicit Confirmation Requested */ 84 #define OF_DATA_IN BIT_6 /* Data in to initiator */ 85 /* (data from target to initiator) */ 86 #define OF_DATA_OUT BIT_7 /* Data out from initiator */ 87 /* (data from initiator to target) */ 88 #define OF_NO_DATA (BIT_7 | BIT_6) 89 #define OF_INC_RC BIT_8 /* Increment command resource count */ 90 #define OF_FAST_POST BIT_9 /* Enable mailbox fast posting. */ 91 #define OF_CONF_REQ BIT_13 /* Confirmation Requested */ 92 #define OF_TERM_EXCH BIT_14 /* Terminate exchange */ 93 #define OF_SSTS BIT_15 /* Send SCSI status */ 94 #endif 95 96 #ifndef QLA_TGT_DATASEGS_PER_CMD32 97 #define QLA_TGT_DATASEGS_PER_CMD32 3 98 #define QLA_TGT_DATASEGS_PER_CONT32 7 99 #define QLA_TGT_MAX_SG32(ql) \ 100 (((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD32 + \ 101 QLA_TGT_DATASEGS_PER_CONT32*((ql) - 1)) : 0) 102 103 #define QLA_TGT_DATASEGS_PER_CMD64 2 104 #define QLA_TGT_DATASEGS_PER_CONT64 5 105 #define QLA_TGT_MAX_SG64(ql) \ 106 (((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD64 + \ 107 QLA_TGT_DATASEGS_PER_CONT64*((ql) - 1)) : 0) 108 #endif 109 110 #ifndef QLA_TGT_DATASEGS_PER_CMD_24XX 111 #define QLA_TGT_DATASEGS_PER_CMD_24XX 1 112 #define QLA_TGT_DATASEGS_PER_CONT_24XX 5 113 #define QLA_TGT_MAX_SG_24XX(ql) \ 114 (min(1270, ((ql) > 0) ? (QLA_TGT_DATASEGS_PER_CMD_24XX + \ 115 QLA_TGT_DATASEGS_PER_CONT_24XX*((ql) - 1)) : 0)) 116 #endif 117 #endif 118 119 #define GET_TARGET_ID(ha, iocb) ((HAS_EXTENDED_IDS(ha)) \ 120 ? le16_to_cpu((iocb)->u.isp2x.target.extended) \ 121 : (uint16_t)(iocb)->u.isp2x.target.id.standard) 122 123 #ifndef NOTIFY_ACK_TYPE 124 #define NOTIFY_ACK_TYPE 0x0E /* Notify acknowledge entry. */ 125 /* 126 * ISP queue - notify acknowledge entry structure definition. 127 * This is sent to the ISP from the target driver. 128 */ 129 struct nack_to_isp { 130 uint8_t entry_type; /* Entry type. */ 131 uint8_t entry_count; /* Entry count. */ 132 uint8_t sys_define; /* System defined. */ 133 uint8_t entry_status; /* Entry Status. */ 134 union { 135 struct { 136 uint32_t sys_define_2; /* System defined. */ 137 target_id_t target; 138 uint8_t target_id; 139 uint8_t reserved_1; 140 uint16_t flags; 141 uint16_t resp_code; 142 uint16_t status; 143 uint16_t task_flags; 144 uint16_t seq_id; 145 uint16_t srr_rx_id; 146 uint32_t srr_rel_offs; 147 uint16_t srr_ui; 148 uint16_t srr_flags; 149 uint16_t srr_reject_code; 150 uint8_t srr_reject_vendor_uniq; 151 uint8_t srr_reject_code_expl; 152 uint8_t reserved_2[24]; 153 } isp2x; 154 struct { 155 uint32_t handle; 156 uint16_t nport_handle; 157 uint16_t reserved_1; 158 uint16_t flags; 159 uint16_t srr_rx_id; 160 uint16_t status; 161 uint8_t status_subcode; 162 uint8_t fw_handle; 163 uint32_t exchange_address; 164 uint32_t srr_rel_offs; 165 uint16_t srr_ui; 166 uint16_t srr_flags; 167 uint8_t reserved_4[19]; 168 uint8_t vp_index; 169 uint8_t srr_reject_vendor_uniq; 170 uint8_t srr_reject_code_expl; 171 uint8_t srr_reject_code; 172 uint8_t reserved_5[5]; 173 } isp24; 174 } u; 175 uint8_t reserved[2]; 176 uint16_t ox_id; 177 } __packed; 178 #define NOTIFY_ACK_FLAGS_TERMINATE BIT_3 179 #define NOTIFY_ACK_SRR_FLAGS_ACCEPT 0 180 #define NOTIFY_ACK_SRR_FLAGS_REJECT 1 181 182 #define NOTIFY_ACK_SRR_REJECT_REASON_UNABLE_TO_PERFORM 0x9 183 184 #define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_NO_EXPL 0 185 #define NOTIFY_ACK_SRR_FLAGS_REJECT_EXPL_UNABLE_TO_SUPPLY_DATA 0x2a 186 187 #define NOTIFY_ACK_SUCCESS 0x01 188 #endif 189 190 #ifndef ACCEPT_TGT_IO_TYPE 191 #define ACCEPT_TGT_IO_TYPE 0x16 /* Accept target I/O entry. */ 192 #endif 193 194 #ifndef CONTINUE_TGT_IO_TYPE 195 #define CONTINUE_TGT_IO_TYPE 0x17 196 /* 197 * ISP queue - Continue Target I/O (CTIO) entry for status mode 0 structure. 198 * This structure is sent to the ISP 2xxx from target driver. 199 */ 200 struct ctio_to_2xxx { 201 uint8_t entry_type; /* Entry type. */ 202 uint8_t entry_count; /* Entry count. */ 203 uint8_t sys_define; /* System defined. */ 204 uint8_t entry_status; /* Entry Status. */ 205 uint32_t handle; /* System defined handle */ 206 target_id_t target; 207 uint16_t rx_id; 208 uint16_t flags; 209 uint16_t status; 210 uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ 211 uint16_t dseg_count; /* Data segment count. */ 212 uint32_t relative_offset; 213 uint32_t residual; 214 uint16_t reserved_1[3]; 215 uint16_t scsi_status; 216 uint32_t transfer_length; 217 uint32_t dseg_0_address; /* Data segment 0 address. */ 218 uint32_t dseg_0_length; /* Data segment 0 length. */ 219 uint32_t dseg_1_address; /* Data segment 1 address. */ 220 uint32_t dseg_1_length; /* Data segment 1 length. */ 221 uint32_t dseg_2_address; /* Data segment 2 address. */ 222 uint32_t dseg_2_length; /* Data segment 2 length. */ 223 } __packed; 224 #define ATIO_PATH_INVALID 0x07 225 #define ATIO_CANT_PROV_CAP 0x16 226 #define ATIO_CDB_VALID 0x3D 227 228 #define ATIO_EXEC_READ BIT_1 229 #define ATIO_EXEC_WRITE BIT_0 230 #endif 231 232 #ifndef CTIO_A64_TYPE 233 #define CTIO_A64_TYPE 0x1F 234 #define CTIO_SUCCESS 0x01 235 #define CTIO_ABORTED 0x02 236 #define CTIO_INVALID_RX_ID 0x08 237 #define CTIO_TIMEOUT 0x0B 238 #define CTIO_DIF_ERROR 0x0C /* DIF error detected */ 239 #define CTIO_LIP_RESET 0x0E 240 #define CTIO_TARGET_RESET 0x17 241 #define CTIO_PORT_UNAVAILABLE 0x28 242 #define CTIO_PORT_LOGGED_OUT 0x29 243 #define CTIO_PORT_CONF_CHANGED 0x2A 244 #define CTIO_SRR_RECEIVED 0x45 245 #endif 246 247 #ifndef CTIO_RET_TYPE 248 #define CTIO_RET_TYPE 0x17 /* CTIO return entry */ 249 #define ATIO_TYPE7 0x06 /* Accept target I/O entry for 24xx */ 250 251 struct fcp_hdr { 252 uint8_t r_ctl; 253 uint8_t d_id[3]; 254 uint8_t cs_ctl; 255 uint8_t s_id[3]; 256 uint8_t type; 257 uint8_t f_ctl[3]; 258 uint8_t seq_id; 259 uint8_t df_ctl; 260 uint16_t seq_cnt; 261 __be16 ox_id; 262 uint16_t rx_id; 263 uint32_t parameter; 264 } __packed; 265 266 struct fcp_hdr_le { 267 uint8_t d_id[3]; 268 uint8_t r_ctl; 269 uint8_t s_id[3]; 270 uint8_t cs_ctl; 271 uint8_t f_ctl[3]; 272 uint8_t type; 273 uint16_t seq_cnt; 274 uint8_t df_ctl; 275 uint8_t seq_id; 276 uint16_t rx_id; 277 uint16_t ox_id; 278 uint32_t parameter; 279 } __packed; 280 281 #define F_CTL_EXCH_CONTEXT_RESP BIT_23 282 #define F_CTL_SEQ_CONTEXT_RESIP BIT_22 283 #define F_CTL_LAST_SEQ BIT_20 284 #define F_CTL_END_SEQ BIT_19 285 #define F_CTL_SEQ_INITIATIVE BIT_16 286 287 #define R_CTL_BASIC_LINK_SERV 0x80 288 #define R_CTL_B_ACC 0x4 289 #define R_CTL_B_RJT 0x5 290 291 struct atio7_fcp_cmnd { 292 uint64_t lun; 293 uint8_t cmnd_ref; 294 uint8_t task_attr:3; 295 uint8_t reserved:5; 296 uint8_t task_mgmt_flags; 297 #define FCP_CMND_TASK_MGMT_CLEAR_ACA 6 298 #define FCP_CMND_TASK_MGMT_TARGET_RESET 5 299 #define FCP_CMND_TASK_MGMT_LU_RESET 4 300 #define FCP_CMND_TASK_MGMT_CLEAR_TASK_SET 2 301 #define FCP_CMND_TASK_MGMT_ABORT_TASK_SET 1 302 uint8_t wrdata:1; 303 uint8_t rddata:1; 304 uint8_t add_cdb_len:6; 305 uint8_t cdb[16]; 306 /* 307 * add_cdb is optional and can absent from struct atio7_fcp_cmnd. Size 4 308 * only to make sizeof(struct atio7_fcp_cmnd) be as expected by 309 * BUILD_BUG_ON in qlt_init(). 310 */ 311 uint8_t add_cdb[4]; 312 /* uint32_t data_length; */ 313 } __packed; 314 315 /* 316 * ISP queue - Accept Target I/O (ATIO) type entry IOCB structure. 317 * This is sent from the ISP to the target driver. 318 */ 319 struct atio_from_isp { 320 union { 321 struct { 322 uint16_t entry_hdr; 323 uint8_t sys_define; /* System defined. */ 324 uint8_t entry_status; /* Entry Status. */ 325 uint32_t sys_define_2; /* System defined. */ 326 target_id_t target; 327 uint16_t rx_id; 328 uint16_t flags; 329 uint16_t status; 330 uint8_t command_ref; 331 uint8_t task_codes; 332 uint8_t task_flags; 333 uint8_t execution_codes; 334 uint8_t cdb[MAX_CMDSZ]; 335 uint32_t data_length; 336 uint16_t lun; 337 uint8_t initiator_port_name[WWN_SIZE]; /* on qla23xx */ 338 uint16_t reserved_32[6]; 339 uint16_t ox_id; 340 } isp2x; 341 struct { 342 uint16_t entry_hdr; 343 uint8_t fcp_cmnd_len_low; 344 uint8_t fcp_cmnd_len_high:4; 345 uint8_t attr:4; 346 uint32_t exchange_addr; 347 #define ATIO_EXCHANGE_ADDRESS_UNKNOWN 0xFFFFFFFF 348 struct fcp_hdr fcp_hdr; 349 struct atio7_fcp_cmnd fcp_cmnd; 350 } isp24; 351 struct { 352 uint8_t entry_type; /* Entry type. */ 353 uint8_t entry_count; /* Entry count. */ 354 __le16 attr_n_length; 355 #define FCP_CMD_LENGTH_MASK 0x0fff 356 #define FCP_CMD_LENGTH_MIN 0x38 357 uint8_t data[56]; 358 uint32_t signature; 359 #define ATIO_PROCESSED 0xDEADDEAD /* Signature */ 360 } raw; 361 } u; 362 } __packed; 363 364 static inline int fcpcmd_is_corrupted(struct atio *atio) 365 { 366 if (atio->entry_type == ATIO_TYPE7 && 367 (le16_to_cpu(atio->attr_n_length & FCP_CMD_LENGTH_MASK) < 368 FCP_CMD_LENGTH_MIN)) 369 return 1; 370 else 371 return 0; 372 } 373 374 /* adjust corrupted atio so we won't trip over the same entry again. */ 375 static inline void adjust_corrupted_atio(struct atio_from_isp *atio) 376 { 377 atio->u.raw.attr_n_length = cpu_to_le16(FCP_CMD_LENGTH_MIN); 378 atio->u.isp24.fcp_cmnd.add_cdb_len = 0; 379 } 380 381 #define CTIO_TYPE7 0x12 /* Continue target I/O entry (for 24xx) */ 382 383 /* 384 * ISP queue - Continue Target I/O (ATIO) type 7 entry (for 24xx) structure. 385 * This structure is sent to the ISP 24xx from the target driver. 386 */ 387 388 struct ctio7_to_24xx { 389 uint8_t entry_type; /* Entry type. */ 390 uint8_t entry_count; /* Entry count. */ 391 uint8_t sys_define; /* System defined. */ 392 uint8_t entry_status; /* Entry Status. */ 393 uint32_t handle; /* System defined handle */ 394 uint16_t nport_handle; 395 #define CTIO7_NHANDLE_UNRECOGNIZED 0xFFFF 396 uint16_t timeout; 397 uint16_t dseg_count; /* Data segment count. */ 398 uint8_t vp_index; 399 uint8_t add_flags; 400 uint8_t initiator_id[3]; 401 uint8_t reserved; 402 uint32_t exchange_addr; 403 union { 404 struct { 405 uint16_t reserved1; 406 __le16 flags; 407 uint32_t residual; 408 __le16 ox_id; 409 uint16_t scsi_status; 410 uint32_t relative_offset; 411 uint32_t reserved2; 412 uint32_t transfer_length; 413 uint32_t reserved3; 414 /* Data segment 0 address. */ 415 uint32_t dseg_0_address[2]; 416 /* Data segment 0 length. */ 417 uint32_t dseg_0_length; 418 } status0; 419 struct { 420 uint16_t sense_length; 421 uint16_t flags; 422 uint32_t residual; 423 __le16 ox_id; 424 uint16_t scsi_status; 425 uint16_t response_len; 426 uint16_t reserved; 427 uint8_t sense_data[24]; 428 } status1; 429 } u; 430 } __packed; 431 432 /* 433 * ISP queue - CTIO type 7 from ISP 24xx to target driver 434 * returned entry structure. 435 */ 436 struct ctio7_from_24xx { 437 uint8_t entry_type; /* Entry type. */ 438 uint8_t entry_count; /* Entry count. */ 439 uint8_t sys_define; /* System defined. */ 440 uint8_t entry_status; /* Entry Status. */ 441 uint32_t handle; /* System defined handle */ 442 uint16_t status; 443 uint16_t timeout; 444 uint16_t dseg_count; /* Data segment count. */ 445 uint8_t vp_index; 446 uint8_t reserved1[5]; 447 uint32_t exchange_address; 448 uint16_t reserved2; 449 uint16_t flags; 450 uint32_t residual; 451 uint16_t ox_id; 452 uint16_t reserved3; 453 uint32_t relative_offset; 454 uint8_t reserved4[24]; 455 } __packed; 456 457 /* CTIO7 flags values */ 458 #define CTIO7_FLAGS_SEND_STATUS BIT_15 459 #define CTIO7_FLAGS_TERMINATE BIT_14 460 #define CTIO7_FLAGS_CONFORM_REQ BIT_13 461 #define CTIO7_FLAGS_DONT_RET_CTIO BIT_8 462 #define CTIO7_FLAGS_STATUS_MODE_0 0 463 #define CTIO7_FLAGS_STATUS_MODE_1 BIT_6 464 #define CTIO7_FLAGS_STATUS_MODE_2 BIT_7 465 #define CTIO7_FLAGS_EXPLICIT_CONFORM BIT_5 466 #define CTIO7_FLAGS_CONFIRM_SATISF BIT_4 467 #define CTIO7_FLAGS_DSD_PTR BIT_2 468 #define CTIO7_FLAGS_DATA_IN BIT_1 /* data to initiator */ 469 #define CTIO7_FLAGS_DATA_OUT BIT_0 /* data from initiator */ 470 471 #define ELS_PLOGI 0x3 472 #define ELS_FLOGI 0x4 473 #define ELS_LOGO 0x5 474 #define ELS_PRLI 0x20 475 #define ELS_PRLO 0x21 476 #define ELS_TPRLO 0x24 477 #define ELS_PDISC 0x50 478 #define ELS_ADISC 0x52 479 480 /* 481 *CTIO Type CRC_2 IOCB 482 */ 483 struct ctio_crc2_to_fw { 484 uint8_t entry_type; /* Entry type. */ 485 #define CTIO_CRC2 0x7A 486 uint8_t entry_count; /* Entry count. */ 487 uint8_t sys_define; /* System defined. */ 488 uint8_t entry_status; /* Entry Status. */ 489 490 uint32_t handle; /* System handle. */ 491 uint16_t nport_handle; /* N_PORT handle. */ 492 __le16 timeout; /* Command timeout. */ 493 494 uint16_t dseg_count; /* Data segment count. */ 495 uint8_t vp_index; 496 uint8_t add_flags; /* additional flags */ 497 #define CTIO_CRC2_AF_DIF_DSD_ENA BIT_3 498 499 uint8_t initiator_id[3]; /* initiator ID */ 500 uint8_t reserved1; 501 uint32_t exchange_addr; /* rcv exchange address */ 502 uint16_t reserved2; 503 __le16 flags; /* refer to CTIO7 flags values */ 504 uint32_t residual; 505 __le16 ox_id; 506 uint16_t scsi_status; 507 __le32 relative_offset; 508 uint32_t reserved5; 509 __le32 transfer_length; /* total fc transfer length */ 510 uint32_t reserved6; 511 __le32 crc_context_address[2];/* Data segment address. */ 512 uint16_t crc_context_len; /* Data segment length. */ 513 uint16_t reserved_1; /* MUST be set to 0. */ 514 } __packed; 515 516 /* CTIO Type CRC_x Status IOCB */ 517 struct ctio_crc_from_fw { 518 uint8_t entry_type; /* Entry type. */ 519 uint8_t entry_count; /* Entry count. */ 520 uint8_t sys_define; /* System defined. */ 521 uint8_t entry_status; /* Entry Status. */ 522 523 uint32_t handle; /* System handle. */ 524 uint16_t status; 525 uint16_t timeout; /* Command timeout. */ 526 uint16_t dseg_count; /* Data segment count. */ 527 uint32_t reserved1; 528 uint16_t state_flags; 529 #define CTIO_CRC_SF_DIF_CHOPPED BIT_4 530 531 uint32_t exchange_address; /* rcv exchange address */ 532 uint16_t reserved2; 533 uint16_t flags; 534 uint32_t resid_xfer_length; 535 uint16_t ox_id; 536 uint8_t reserved3[12]; 537 uint16_t runt_guard; /* reported runt blk guard */ 538 uint8_t actual_dif[8]; 539 uint8_t expected_dif[8]; 540 } __packed; 541 542 /* 543 * ISP queue - ABTS received/response entries structure definition for 24xx. 544 */ 545 #define ABTS_RECV_24XX 0x54 /* ABTS received (for 24xx) */ 546 #define ABTS_RESP_24XX 0x55 /* ABTS responce (for 24xx) */ 547 548 /* 549 * ISP queue - ABTS received IOCB entry structure definition for 24xx. 550 * The ABTS BLS received from the wire is sent to the 551 * target driver by the ISP 24xx. 552 * The IOCB is placed on the response queue. 553 */ 554 struct abts_recv_from_24xx { 555 uint8_t entry_type; /* Entry type. */ 556 uint8_t entry_count; /* Entry count. */ 557 uint8_t sys_define; /* System defined. */ 558 uint8_t entry_status; /* Entry Status. */ 559 uint8_t reserved_1[6]; 560 uint16_t nport_handle; 561 uint8_t reserved_2[2]; 562 uint8_t vp_index; 563 uint8_t reserved_3:4; 564 uint8_t sof_type:4; 565 uint32_t exchange_address; 566 struct fcp_hdr_le fcp_hdr_le; 567 uint8_t reserved_4[16]; 568 uint32_t exchange_addr_to_abort; 569 } __packed; 570 571 #define ABTS_PARAM_ABORT_SEQ BIT_0 572 573 struct ba_acc_le { 574 uint16_t reserved; 575 uint8_t seq_id_last; 576 uint8_t seq_id_valid; 577 #define SEQ_ID_VALID 0x80 578 #define SEQ_ID_INVALID 0x00 579 uint16_t rx_id; 580 uint16_t ox_id; 581 uint16_t high_seq_cnt; 582 uint16_t low_seq_cnt; 583 } __packed; 584 585 struct ba_rjt_le { 586 uint8_t vendor_uniq; 587 uint8_t reason_expl; 588 uint8_t reason_code; 589 #define BA_RJT_REASON_CODE_INVALID_COMMAND 0x1 590 #define BA_RJT_REASON_CODE_UNABLE_TO_PERFORM 0x9 591 uint8_t reserved; 592 } __packed; 593 594 /* 595 * ISP queue - ABTS Response IOCB entry structure definition for 24xx. 596 * The ABTS response to the ABTS received is sent by the 597 * target driver to the ISP 24xx. 598 * The IOCB is placed on the request queue. 599 */ 600 struct abts_resp_to_24xx { 601 uint8_t entry_type; /* Entry type. */ 602 uint8_t entry_count; /* Entry count. */ 603 uint8_t sys_define; /* System defined. */ 604 uint8_t entry_status; /* Entry Status. */ 605 uint32_t handle; 606 uint16_t reserved_1; 607 uint16_t nport_handle; 608 uint16_t control_flags; 609 #define ABTS_CONTR_FLG_TERM_EXCHG BIT_0 610 uint8_t vp_index; 611 uint8_t reserved_3:4; 612 uint8_t sof_type:4; 613 uint32_t exchange_address; 614 struct fcp_hdr_le fcp_hdr_le; 615 union { 616 struct ba_acc_le ba_acct; 617 struct ba_rjt_le ba_rjt; 618 } __packed payload; 619 uint32_t reserved_4; 620 uint32_t exchange_addr_to_abort; 621 } __packed; 622 623 /* 624 * ISP queue - ABTS Response IOCB from ISP24xx Firmware entry structure. 625 * The ABTS response with completion status to the ABTS response 626 * (sent by the target driver to the ISP 24xx) is sent by the 627 * ISP24xx firmware to the target driver. 628 * The IOCB is placed on the response queue. 629 */ 630 struct abts_resp_from_24xx_fw { 631 uint8_t entry_type; /* Entry type. */ 632 uint8_t entry_count; /* Entry count. */ 633 uint8_t sys_define; /* System defined. */ 634 uint8_t entry_status; /* Entry Status. */ 635 uint32_t handle; 636 uint16_t compl_status; 637 #define ABTS_RESP_COMPL_SUCCESS 0 638 #define ABTS_RESP_COMPL_SUBCODE_ERROR 0x31 639 uint16_t nport_handle; 640 uint16_t reserved_1; 641 uint8_t reserved_2; 642 uint8_t reserved_3:4; 643 uint8_t sof_type:4; 644 uint32_t exchange_address; 645 struct fcp_hdr_le fcp_hdr_le; 646 uint8_t reserved_4[8]; 647 uint32_t error_subcode1; 648 #define ABTS_RESP_SUBCODE_ERR_ABORTED_EXCH_NOT_TERM 0x1E 649 uint32_t error_subcode2; 650 uint32_t exchange_addr_to_abort; 651 } __packed; 652 653 /********************************************************************\ 654 * Type Definitions used by initiator & target halves 655 \********************************************************************/ 656 657 struct qla_tgt_mgmt_cmd; 658 struct fc_port; 659 660 /* 661 * This structure provides a template of function calls that the 662 * target driver (from within qla_target.c) can issue to the 663 * target module (tcm_qla2xxx). 664 */ 665 struct qla_tgt_func_tmpl { 666 667 int (*handle_cmd)(struct scsi_qla_host *, struct qla_tgt_cmd *, 668 unsigned char *, uint32_t, int, int, int); 669 void (*handle_data)(struct qla_tgt_cmd *); 670 void (*handle_dif_err)(struct qla_tgt_cmd *); 671 int (*handle_tmr)(struct qla_tgt_mgmt_cmd *, uint32_t, uint16_t, 672 uint32_t); 673 void (*free_cmd)(struct qla_tgt_cmd *); 674 void (*free_mcmd)(struct qla_tgt_mgmt_cmd *); 675 void (*free_session)(struct fc_port *); 676 677 int (*check_initiator_node_acl)(struct scsi_qla_host *, unsigned char *, 678 struct fc_port *); 679 void (*update_sess)(struct fc_port *, port_id_t, uint16_t, bool); 680 struct fc_port *(*find_sess_by_loop_id)(struct scsi_qla_host *, 681 const uint16_t); 682 struct fc_port *(*find_sess_by_s_id)(struct scsi_qla_host *, 683 const uint8_t *); 684 void (*clear_nacl_from_fcport_map)(struct fc_port *); 685 void (*put_sess)(struct fc_port *); 686 void (*shutdown_sess)(struct fc_port *); 687 }; 688 689 int qla2x00_wait_for_hba_online(struct scsi_qla_host *); 690 691 #include <target/target_core_base.h> 692 693 #define QLA_TGT_TIMEOUT 10 /* in seconds */ 694 695 #define QLA_TGT_MAX_HW_PENDING_TIME 60 /* in seconds */ 696 697 /* Immediate notify status constants */ 698 #define IMM_NTFY_LIP_RESET 0x000E 699 #define IMM_NTFY_LIP_LINK_REINIT 0x000F 700 #define IMM_NTFY_IOCB_OVERFLOW 0x0016 701 #define IMM_NTFY_ABORT_TASK 0x0020 702 #define IMM_NTFY_PORT_LOGOUT 0x0029 703 #define IMM_NTFY_PORT_CONFIG 0x002A 704 #define IMM_NTFY_GLBL_TPRLO 0x002D 705 #define IMM_NTFY_GLBL_LOGO 0x002E 706 #define IMM_NTFY_RESOURCE 0x0034 707 #define IMM_NTFY_MSG_RX 0x0036 708 #define IMM_NTFY_SRR 0x0045 709 #define IMM_NTFY_ELS 0x0046 710 711 /* Immediate notify task flags */ 712 #define IMM_NTFY_TASK_MGMT_SHIFT 8 713 714 #define QLA_TGT_CLEAR_ACA 0x40 715 #define QLA_TGT_TARGET_RESET 0x20 716 #define QLA_TGT_LUN_RESET 0x10 717 #define QLA_TGT_CLEAR_TS 0x04 718 #define QLA_TGT_ABORT_TS 0x02 719 #define QLA_TGT_ABORT_ALL_SESS 0xFFFF 720 #define QLA_TGT_ABORT_ALL 0xFFFE 721 #define QLA_TGT_NEXUS_LOSS_SESS 0xFFFD 722 #define QLA_TGT_NEXUS_LOSS 0xFFFC 723 #define QLA_TGT_ABTS 0xFFFB 724 #define QLA_TGT_2G_ABORT_TASK 0xFFFA 725 726 /* Notify Acknowledge flags */ 727 #define NOTIFY_ACK_RES_COUNT BIT_8 728 #define NOTIFY_ACK_CLEAR_LIP_RESET BIT_5 729 #define NOTIFY_ACK_TM_RESP_CODE_VALID BIT_4 730 731 /* Command's states */ 732 #define QLA_TGT_STATE_NEW 0 /* New command + target processing */ 733 #define QLA_TGT_STATE_NEED_DATA 1 /* target needs data to continue */ 734 #define QLA_TGT_STATE_DATA_IN 2 /* Data arrived + target processing */ 735 #define QLA_TGT_STATE_PROCESSED 3 /* target done processing */ 736 737 738 /* Special handles */ 739 #define QLA_TGT_NULL_HANDLE 0 740 #define QLA_TGT_SKIP_HANDLE (0xFFFFFFFF & ~CTIO_COMPLETION_HANDLE_MARK) 741 742 /* ATIO task_codes field */ 743 #define ATIO_SIMPLE_QUEUE 0 744 #define ATIO_HEAD_OF_QUEUE 1 745 #define ATIO_ORDERED_QUEUE 2 746 #define ATIO_ACA_QUEUE 4 747 #define ATIO_UNTAGGED 5 748 749 /* TM failed response codes, see FCP (9.4.11 FCP_RSP_INFO) */ 750 #define FC_TM_SUCCESS 0 751 #define FC_TM_BAD_FCP_DATA 1 752 #define FC_TM_BAD_CMD 2 753 #define FC_TM_FCP_DATA_MISMATCH 3 754 #define FC_TM_REJECT 4 755 #define FC_TM_FAILED 5 756 757 #if (BITS_PER_LONG > 32) || defined(CONFIG_HIGHMEM64G) 758 #define pci_dma_lo32(a) (a & 0xffffffff) 759 #define pci_dma_hi32(a) ((((a) >> 16)>>16) & 0xffffffff) 760 #else 761 #define pci_dma_lo32(a) (a & 0xffffffff) 762 #define pci_dma_hi32(a) 0 763 #endif 764 765 #define QLA_TGT_SENSE_VALID(sense) ((sense != NULL) && \ 766 (((const uint8_t *)(sense))[0] & 0x70) == 0x70) 767 768 struct qla_port_24xx_data { 769 uint8_t port_name[WWN_SIZE]; 770 uint16_t loop_id; 771 uint16_t reserved; 772 }; 773 774 struct qla_tgt { 775 struct scsi_qla_host *vha; 776 struct qla_hw_data *ha; 777 778 /* 779 * To sync between IRQ handlers and qlt_target_release(). Needed, 780 * because req_pkt() can drop/reaquire HW lock inside. Protected by 781 * HW lock. 782 */ 783 int irq_cmd_count; 784 int atio_irq_cmd_count; 785 786 int datasegs_per_cmd, datasegs_per_cont, sg_tablesize; 787 788 /* Target's flags, serialized by pha->hardware_lock */ 789 unsigned int tgt_enable_64bit_addr:1; /* 64-bits PCI addr enabled */ 790 unsigned int link_reinit_iocb_pending:1; 791 792 /* 793 * Protected by tgt_mutex AND hardware_lock for writing and tgt_mutex 794 * OR hardware_lock for reading. 795 */ 796 int tgt_stop; /* the target mode driver is being stopped */ 797 int tgt_stopped; /* the target mode driver has been stopped */ 798 799 /* Count of sessions refering qla_tgt. Protected by hardware_lock. */ 800 int sess_count; 801 802 /* Protected by hardware_lock */ 803 struct list_head del_sess_list; 804 805 spinlock_t sess_work_lock; 806 struct list_head sess_works_list; 807 struct work_struct sess_work; 808 809 struct imm_ntfy_from_isp link_reinit_iocb; 810 wait_queue_head_t waitQ; 811 int notify_ack_expected; 812 int abts_resp_expected; 813 int modify_lun_expected; 814 atomic_t tgt_global_resets_count; 815 struct list_head tgt_list_entry; 816 }; 817 818 struct qla_tgt_sess_op { 819 struct scsi_qla_host *vha; 820 uint32_t chip_reset; 821 struct atio_from_isp atio; 822 struct work_struct work; 823 struct list_head cmd_list; 824 bool aborted; 825 }; 826 827 enum trace_flags { 828 TRC_NEW_CMD = BIT_0, 829 TRC_DO_WORK = BIT_1, 830 TRC_DO_WORK_ERR = BIT_2, 831 TRC_XFR_RDY = BIT_3, 832 TRC_XMIT_DATA = BIT_4, 833 TRC_XMIT_STATUS = BIT_5, 834 TRC_SRR_RSP = BIT_6, 835 TRC_SRR_XRDY = BIT_7, 836 TRC_SRR_TERM = BIT_8, 837 TRC_SRR_CTIO = BIT_9, 838 TRC_FLUSH = BIT_10, 839 TRC_CTIO_ERR = BIT_11, 840 TRC_CTIO_DONE = BIT_12, 841 TRC_CTIO_ABORTED = BIT_13, 842 TRC_CTIO_STRANGE= BIT_14, 843 TRC_CMD_DONE = BIT_15, 844 TRC_CMD_CHK_STOP = BIT_16, 845 TRC_CMD_FREE = BIT_17, 846 TRC_DATA_IN = BIT_18, 847 TRC_ABORT = BIT_19, 848 }; 849 850 struct qla_tgt_cmd { 851 struct se_cmd se_cmd; 852 struct fc_port *sess; 853 int state; 854 struct work_struct free_work; 855 struct work_struct work; 856 /* Sense buffer that will be mapped into outgoing status */ 857 unsigned char sense_buffer[TRANSPORT_SENSE_BUFFER]; 858 859 spinlock_t cmd_lock; 860 /* to save extra sess dereferences */ 861 unsigned int conf_compl_supported:1; 862 unsigned int sg_mapped:1; 863 unsigned int free_sg:1; 864 unsigned int write_data_transferred:1; 865 unsigned int ctx_dsd_alloced:1; 866 unsigned int q_full:1; 867 unsigned int term_exchg:1; 868 unsigned int cmd_sent_to_fw:1; 869 unsigned int cmd_in_wq:1; 870 unsigned int aborted:1; 871 unsigned int data_work:1; 872 unsigned int data_work_free:1; 873 874 struct scatterlist *sg; /* cmd data buffer SG vector */ 875 int sg_cnt; /* SG segments count */ 876 int bufflen; /* cmd buffer length */ 877 int offset; 878 uint32_t unpacked_lun; 879 enum dma_data_direction dma_data_direction; 880 uint32_t reset_count; 881 882 uint16_t loop_id; /* to save extra sess dereferences */ 883 struct qla_tgt *tgt; /* to save extra sess dereferences */ 884 struct scsi_qla_host *vha; 885 struct list_head cmd_list; 886 887 struct atio_from_isp atio; 888 /* t10dif */ 889 struct scatterlist *prot_sg; 890 uint32_t prot_sg_cnt; 891 uint32_t blk_sz; 892 struct crc_context *ctx; 893 894 uint64_t jiffies_at_alloc; 895 uint64_t jiffies_at_free; 896 897 enum trace_flags trc_flags; 898 }; 899 900 struct qla_tgt_sess_work_param { 901 struct list_head sess_works_list_entry; 902 903 #define QLA_TGT_SESS_WORK_ABORT 1 904 #define QLA_TGT_SESS_WORK_TM 2 905 int type; 906 907 union { 908 struct abts_recv_from_24xx abts; 909 struct imm_ntfy_from_isp tm_iocb; 910 struct atio_from_isp tm_iocb2; 911 }; 912 }; 913 914 struct qla_tgt_mgmt_cmd { 915 uint16_t tmr_func; 916 uint8_t fc_tm_rsp; 917 struct fc_port *sess; 918 struct se_cmd se_cmd; 919 struct work_struct free_work; 920 unsigned int flags; 921 uint32_t reset_count; 922 #define QLA24XX_MGMT_SEND_NACK 1 923 union { 924 struct atio_from_isp atio; 925 struct imm_ntfy_from_isp imm_ntfy; 926 struct abts_recv_from_24xx abts; 927 } __packed orig_iocb; 928 }; 929 930 struct qla_tgt_prm { 931 struct qla_tgt_cmd *cmd; 932 struct qla_tgt *tgt; 933 void *pkt; 934 struct scatterlist *sg; /* cmd data buffer SG vector */ 935 unsigned char *sense_buffer; 936 int seg_cnt; 937 int req_cnt; 938 uint16_t rq_result; 939 uint16_t scsi_status; 940 int sense_buffer_len; 941 int residual; 942 int add_status_pkt; 943 /* dif */ 944 struct scatterlist *prot_sg; 945 uint16_t prot_seg_cnt; 946 uint16_t tot_dsds; 947 }; 948 949 /* Check for Switch reserved address */ 950 #define IS_SW_RESV_ADDR(_s_id) \ 951 ((_s_id.b.domain == 0xff) && (_s_id.b.area == 0xfc)) 952 953 #define QLA_TGT_XMIT_DATA 1 954 #define QLA_TGT_XMIT_STATUS 2 955 #define QLA_TGT_XMIT_ALL (QLA_TGT_XMIT_STATUS|QLA_TGT_XMIT_DATA) 956 957 958 extern struct qla_tgt_data qla_target; 959 960 /* 961 * Function prototypes for qla_target.c logic used by qla2xxx LLD code. 962 */ 963 extern int qlt_add_target(struct qla_hw_data *, struct scsi_qla_host *); 964 extern int qlt_remove_target(struct qla_hw_data *, struct scsi_qla_host *); 965 extern int qlt_lport_register(void *, u64, u64, u64, 966 int (*callback)(struct scsi_qla_host *, void *, u64, u64)); 967 extern void qlt_lport_deregister(struct scsi_qla_host *); 968 extern void qlt_unreg_sess(struct fc_port *); 969 extern void qlt_fc_port_added(struct scsi_qla_host *, fc_port_t *); 970 extern void qlt_fc_port_deleted(struct scsi_qla_host *, fc_port_t *, int); 971 extern int __init qlt_init(void); 972 extern void qlt_exit(void); 973 extern void qlt_update_vp_map(struct scsi_qla_host *, int); 974 975 /* 976 * This macro is used during early initializations when host->active_mode 977 * is not set. Right now, ha value is ignored. 978 */ 979 #define QLA_TGT_MODE_ENABLED() (ql2x_ini_mode != QLA2XXX_INI_MODE_ENABLED) 980 981 extern int ql2x_ini_mode; 982 983 static inline bool qla_tgt_mode_enabled(struct scsi_qla_host *ha) 984 { 985 return ha->host->active_mode == MODE_TARGET; 986 } 987 988 static inline bool qla_ini_mode_enabled(struct scsi_qla_host *ha) 989 { 990 return ha->host->active_mode == MODE_INITIATOR; 991 } 992 993 static inline bool qla_dual_mode_enabled(struct scsi_qla_host *ha) 994 { 995 return (ha->host->active_mode == MODE_DUAL); 996 } 997 998 static inline uint32_t sid_to_key(const uint8_t *s_id) 999 { 1000 uint32_t key; 1001 1002 key = (((unsigned long)s_id[0] << 16) | 1003 ((unsigned long)s_id[1] << 8) | 1004 (unsigned long)s_id[2]); 1005 return key; 1006 } 1007 1008 static inline void sid_to_portid(const uint8_t *s_id, port_id_t *p) 1009 { 1010 memset(p, 0, sizeof(*p)); 1011 p->b.domain = s_id[0]; 1012 p->b.area = s_id[1]; 1013 p->b.al_pa = s_id[2]; 1014 } 1015 1016 /* 1017 * Exported symbols from qla_target.c LLD logic used by qla2xxx code.. 1018 */ 1019 extern void qlt_response_pkt_all_vps(struct scsi_qla_host *, response_t *); 1020 extern int qlt_rdy_to_xfer(struct qla_tgt_cmd *); 1021 extern int qlt_xmit_response(struct qla_tgt_cmd *, int, uint8_t); 1022 extern int qlt_abort_cmd(struct qla_tgt_cmd *); 1023 extern void qlt_xmit_tm_rsp(struct qla_tgt_mgmt_cmd *); 1024 extern void qlt_free_mcmd(struct qla_tgt_mgmt_cmd *); 1025 extern void qlt_free_cmd(struct qla_tgt_cmd *cmd); 1026 extern void qlt_async_event(uint16_t, struct scsi_qla_host *, uint16_t *); 1027 extern void qlt_enable_vha(struct scsi_qla_host *); 1028 extern void qlt_vport_create(struct scsi_qla_host *, struct qla_hw_data *); 1029 extern void qlt_rff_id(struct scsi_qla_host *, struct ct_sns_req *); 1030 extern void qlt_init_atio_q_entries(struct scsi_qla_host *); 1031 extern void qlt_24xx_process_atio_queue(struct scsi_qla_host *, uint8_t); 1032 extern void qlt_24xx_config_rings(struct scsi_qla_host *); 1033 extern void qlt_24xx_config_nvram_stage1(struct scsi_qla_host *, 1034 struct nvram_24xx *); 1035 extern void qlt_24xx_config_nvram_stage2(struct scsi_qla_host *, 1036 struct init_cb_24xx *); 1037 extern void qlt_81xx_config_nvram_stage2(struct scsi_qla_host *, 1038 struct init_cb_81xx *); 1039 extern void qlt_81xx_config_nvram_stage1(struct scsi_qla_host *, 1040 struct nvram_81xx *); 1041 extern int qlt_24xx_process_response_error(struct scsi_qla_host *, 1042 struct sts_entry_24xx *); 1043 extern void qlt_modify_vp_config(struct scsi_qla_host *, 1044 struct vp_config_entry_24xx *); 1045 extern void qlt_probe_one_stage1(struct scsi_qla_host *, struct qla_hw_data *); 1046 extern int qlt_mem_alloc(struct qla_hw_data *); 1047 extern void qlt_mem_free(struct qla_hw_data *); 1048 extern int qlt_stop_phase1(struct qla_tgt *); 1049 extern void qlt_stop_phase2(struct qla_tgt *); 1050 extern irqreturn_t qla83xx_msix_atio_q(int, void *); 1051 extern void qlt_83xx_iospace_config(struct qla_hw_data *); 1052 extern int qlt_free_qfull_cmds(struct scsi_qla_host *); 1053 extern void qlt_logo_completion_handler(fc_port_t *, int); 1054 extern void qlt_do_generation_tick(struct scsi_qla_host *, int *); 1055 1056 #endif /* __QLA_TARGET_H */ 1057