1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2011 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 9 #include <linux/moduleparam.h> 10 #include <linux/vmalloc.h> 11 #include <linux/delay.h> 12 #include <linux/kthread.h> 13 #include <linux/mutex.h> 14 #include <linux/kobject.h> 15 #include <linux/slab.h> 16 17 #include <scsi/scsi_tcq.h> 18 #include <scsi/scsicam.h> 19 #include <scsi/scsi_transport.h> 20 #include <scsi/scsi_transport_fc.h> 21 22 /* 23 * Driver version 24 */ 25 char qla2x00_version_str[40]; 26 27 static int apidev_major; 28 29 /* 30 * SRB allocation cache 31 */ 32 static struct kmem_cache *srb_cachep; 33 34 /* 35 * CT6 CTX allocation cache 36 */ 37 static struct kmem_cache *ctx_cachep; 38 /* 39 * error level for logging 40 */ 41 int ql_errlev = ql_log_all; 42 43 int ql2xlogintimeout = 20; 44 module_param(ql2xlogintimeout, int, S_IRUGO); 45 MODULE_PARM_DESC(ql2xlogintimeout, 46 "Login timeout value in seconds."); 47 48 int qlport_down_retry; 49 module_param(qlport_down_retry, int, S_IRUGO); 50 MODULE_PARM_DESC(qlport_down_retry, 51 "Maximum number of command retries to a port that returns " 52 "a PORT-DOWN status."); 53 54 int ql2xplogiabsentdevice; 55 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR); 56 MODULE_PARM_DESC(ql2xplogiabsentdevice, 57 "Option to enable PLOGI to devices that are not present after " 58 "a Fabric scan. This is needed for several broken switches. " 59 "Default is 0 - no PLOGI. 1 - perfom PLOGI."); 60 61 int ql2xloginretrycount = 0; 62 module_param(ql2xloginretrycount, int, S_IRUGO); 63 MODULE_PARM_DESC(ql2xloginretrycount, 64 "Specify an alternate value for the NVRAM login retry count."); 65 66 int ql2xallocfwdump = 1; 67 module_param(ql2xallocfwdump, int, S_IRUGO); 68 MODULE_PARM_DESC(ql2xallocfwdump, 69 "Option to enable allocation of memory for a firmware dump " 70 "during HBA initialization. Memory allocation requirements " 71 "vary by ISP type. Default is 1 - allocate memory."); 72 73 int ql2xextended_error_logging; 74 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR); 75 MODULE_PARM_DESC(ql2xextended_error_logging, 76 "Option to enable extended error logging,\n" 77 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n" 78 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n" 79 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n" 80 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n" 81 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n" 82 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n" 83 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n" 84 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n" 85 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n" 86 "\t\tDo LOGICAL OR of the value to enable more than one level"); 87 88 int ql2xshiftctondsd = 6; 89 module_param(ql2xshiftctondsd, int, S_IRUGO); 90 MODULE_PARM_DESC(ql2xshiftctondsd, 91 "Set to control shifting of command type processing " 92 "based on total number of SG elements."); 93 94 static void qla2x00_free_device(scsi_qla_host_t *); 95 96 int ql2xfdmienable=1; 97 module_param(ql2xfdmienable, int, S_IRUGO); 98 MODULE_PARM_DESC(ql2xfdmienable, 99 "Enables FDMI registrations. " 100 "0 - no FDMI. Default is 1 - perform FDMI."); 101 102 #define MAX_Q_DEPTH 32 103 static int ql2xmaxqdepth = MAX_Q_DEPTH; 104 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR); 105 MODULE_PARM_DESC(ql2xmaxqdepth, 106 "Maximum queue depth to report for target devices."); 107 108 /* Do not change the value of this after module load */ 109 int ql2xenabledif = 1; 110 module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR); 111 MODULE_PARM_DESC(ql2xenabledif, 112 " Enable T10-CRC-DIF " 113 " Default is 0 - No DIF Support. 1 - Enable it"); 114 115 int ql2xenablehba_err_chk; 116 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR); 117 MODULE_PARM_DESC(ql2xenablehba_err_chk, 118 " Enable T10-CRC-DIF Error isolation by HBA" 119 " Default is 0 - Error isolation disabled, 1 - Enable it"); 120 121 int ql2xiidmaenable=1; 122 module_param(ql2xiidmaenable, int, S_IRUGO); 123 MODULE_PARM_DESC(ql2xiidmaenable, 124 "Enables iIDMA settings " 125 "Default is 1 - perform iIDMA. 0 - no iIDMA."); 126 127 int ql2xmaxqueues = 1; 128 module_param(ql2xmaxqueues, int, S_IRUGO); 129 MODULE_PARM_DESC(ql2xmaxqueues, 130 "Enables MQ settings " 131 "Default is 1 for single queue. Set it to number " 132 "of queues in MQ mode."); 133 134 int ql2xmultique_tag; 135 module_param(ql2xmultique_tag, int, S_IRUGO); 136 MODULE_PARM_DESC(ql2xmultique_tag, 137 "Enables CPU affinity settings for the driver " 138 "Default is 0 for no affinity of request and response IO. " 139 "Set it to 1 to turn on the cpu affinity."); 140 141 int ql2xfwloadbin; 142 module_param(ql2xfwloadbin, int, S_IRUGO); 143 MODULE_PARM_DESC(ql2xfwloadbin, 144 "Option to specify location from which to load ISP firmware:.\n" 145 " 2 -- load firmware via the request_firmware() (hotplug).\n" 146 " interface.\n" 147 " 1 -- load firmware from flash.\n" 148 " 0 -- use default semantics.\n"); 149 150 int ql2xetsenable; 151 module_param(ql2xetsenable, int, S_IRUGO); 152 MODULE_PARM_DESC(ql2xetsenable, 153 "Enables firmware ETS burst." 154 "Default is 0 - skip ETS enablement."); 155 156 int ql2xdbwr = 1; 157 module_param(ql2xdbwr, int, S_IRUGO); 158 MODULE_PARM_DESC(ql2xdbwr, 159 "Option to specify scheme for request queue posting.\n" 160 " 0 -- Regular doorbell.\n" 161 " 1 -- CAMRAM doorbell (faster).\n"); 162 163 int ql2xtargetreset = 1; 164 module_param(ql2xtargetreset, int, S_IRUGO); 165 MODULE_PARM_DESC(ql2xtargetreset, 166 "Enable target reset." 167 "Default is 1 - use hw defaults."); 168 169 int ql2xgffidenable; 170 module_param(ql2xgffidenable, int, S_IRUGO); 171 MODULE_PARM_DESC(ql2xgffidenable, 172 "Enables GFF_ID checks of port type. " 173 "Default is 0 - Do not use GFF_ID information."); 174 175 int ql2xasynctmfenable; 176 module_param(ql2xasynctmfenable, int, S_IRUGO); 177 MODULE_PARM_DESC(ql2xasynctmfenable, 178 "Enables issue of TM IOCBs asynchronously via IOCB mechanism" 179 "Default is 0 - Issue TM IOCBs via mailbox mechanism."); 180 181 int ql2xdontresethba; 182 module_param(ql2xdontresethba, int, S_IRUGO); 183 MODULE_PARM_DESC(ql2xdontresethba, 184 "Option to specify reset behaviour.\n" 185 " 0 (Default) -- Reset on failure.\n" 186 " 1 -- Do not reset on failure.\n"); 187 188 uint ql2xmaxlun = MAX_LUNS; 189 module_param(ql2xmaxlun, uint, S_IRUGO); 190 MODULE_PARM_DESC(ql2xmaxlun, 191 "Defines the maximum LU number to register with the SCSI " 192 "midlayer. Default is 65535."); 193 194 /* 195 * SCSI host template entry points 196 */ 197 static int qla2xxx_slave_configure(struct scsi_device * device); 198 static int qla2xxx_slave_alloc(struct scsi_device *); 199 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time); 200 static void qla2xxx_scan_start(struct Scsi_Host *); 201 static void qla2xxx_slave_destroy(struct scsi_device *); 202 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd); 203 static int qla2xxx_eh_abort(struct scsi_cmnd *); 204 static int qla2xxx_eh_device_reset(struct scsi_cmnd *); 205 static int qla2xxx_eh_target_reset(struct scsi_cmnd *); 206 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *); 207 static int qla2xxx_eh_host_reset(struct scsi_cmnd *); 208 209 static int qla2x00_change_queue_depth(struct scsi_device *, int, int); 210 static int qla2x00_change_queue_type(struct scsi_device *, int); 211 212 struct scsi_host_template qla2xxx_driver_template = { 213 .module = THIS_MODULE, 214 .name = QLA2XXX_DRIVER_NAME, 215 .queuecommand = qla2xxx_queuecommand, 216 217 .eh_abort_handler = qla2xxx_eh_abort, 218 .eh_device_reset_handler = qla2xxx_eh_device_reset, 219 .eh_target_reset_handler = qla2xxx_eh_target_reset, 220 .eh_bus_reset_handler = qla2xxx_eh_bus_reset, 221 .eh_host_reset_handler = qla2xxx_eh_host_reset, 222 223 .slave_configure = qla2xxx_slave_configure, 224 225 .slave_alloc = qla2xxx_slave_alloc, 226 .slave_destroy = qla2xxx_slave_destroy, 227 .scan_finished = qla2xxx_scan_finished, 228 .scan_start = qla2xxx_scan_start, 229 .change_queue_depth = qla2x00_change_queue_depth, 230 .change_queue_type = qla2x00_change_queue_type, 231 .this_id = -1, 232 .cmd_per_lun = 3, 233 .use_clustering = ENABLE_CLUSTERING, 234 .sg_tablesize = SG_ALL, 235 236 .max_sectors = 0xFFFF, 237 .shost_attrs = qla2x00_host_attrs, 238 }; 239 240 static struct scsi_transport_template *qla2xxx_transport_template = NULL; 241 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL; 242 243 /* TODO Convert to inlines 244 * 245 * Timer routines 246 */ 247 248 __inline__ void 249 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval) 250 { 251 init_timer(&vha->timer); 252 vha->timer.expires = jiffies + interval * HZ; 253 vha->timer.data = (unsigned long)vha; 254 vha->timer.function = (void (*)(unsigned long))func; 255 add_timer(&vha->timer); 256 vha->timer_active = 1; 257 } 258 259 static inline void 260 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval) 261 { 262 /* Currently used for 82XX only. */ 263 if (vha->device_flags & DFLG_DEV_FAILED) { 264 ql_dbg(ql_dbg_timer, vha, 0x600d, 265 "Device in a failed state, returning.\n"); 266 return; 267 } 268 269 mod_timer(&vha->timer, jiffies + interval * HZ); 270 } 271 272 static __inline__ void 273 qla2x00_stop_timer(scsi_qla_host_t *vha) 274 { 275 del_timer_sync(&vha->timer); 276 vha->timer_active = 0; 277 } 278 279 static int qla2x00_do_dpc(void *data); 280 281 static void qla2x00_rst_aen(scsi_qla_host_t *); 282 283 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t, 284 struct req_que **, struct rsp_que **); 285 static void qla2x00_free_fw_dump(struct qla_hw_data *); 286 static void qla2x00_mem_free(struct qla_hw_data *); 287 static void qla2x00_sp_free_dma(srb_t *); 288 289 /* -------------------------------------------------------------------------- */ 290 static int qla2x00_alloc_queues(struct qla_hw_data *ha) 291 { 292 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 293 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues, 294 GFP_KERNEL); 295 if (!ha->req_q_map) { 296 ql_log(ql_log_fatal, vha, 0x003b, 297 "Unable to allocate memory for request queue ptrs.\n"); 298 goto fail_req_map; 299 } 300 301 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues, 302 GFP_KERNEL); 303 if (!ha->rsp_q_map) { 304 ql_log(ql_log_fatal, vha, 0x003c, 305 "Unable to allocate memory for response queue ptrs.\n"); 306 goto fail_rsp_map; 307 } 308 set_bit(0, ha->rsp_qid_map); 309 set_bit(0, ha->req_qid_map); 310 return 1; 311 312 fail_rsp_map: 313 kfree(ha->req_q_map); 314 ha->req_q_map = NULL; 315 fail_req_map: 316 return -ENOMEM; 317 } 318 319 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req) 320 { 321 if (req && req->ring) 322 dma_free_coherent(&ha->pdev->dev, 323 (req->length + 1) * sizeof(request_t), 324 req->ring, req->dma); 325 326 kfree(req); 327 req = NULL; 328 } 329 330 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp) 331 { 332 if (rsp && rsp->ring) 333 dma_free_coherent(&ha->pdev->dev, 334 (rsp->length + 1) * sizeof(response_t), 335 rsp->ring, rsp->dma); 336 337 kfree(rsp); 338 rsp = NULL; 339 } 340 341 static void qla2x00_free_queues(struct qla_hw_data *ha) 342 { 343 struct req_que *req; 344 struct rsp_que *rsp; 345 int cnt; 346 347 for (cnt = 0; cnt < ha->max_req_queues; cnt++) { 348 req = ha->req_q_map[cnt]; 349 qla2x00_free_req_que(ha, req); 350 } 351 kfree(ha->req_q_map); 352 ha->req_q_map = NULL; 353 354 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) { 355 rsp = ha->rsp_q_map[cnt]; 356 qla2x00_free_rsp_que(ha, rsp); 357 } 358 kfree(ha->rsp_q_map); 359 ha->rsp_q_map = NULL; 360 } 361 362 static int qla25xx_setup_mode(struct scsi_qla_host *vha) 363 { 364 uint16_t options = 0; 365 int ques, req, ret; 366 struct qla_hw_data *ha = vha->hw; 367 368 if (!(ha->fw_attributes & BIT_6)) { 369 ql_log(ql_log_warn, vha, 0x00d8, 370 "Firmware is not multi-queue capable.\n"); 371 goto fail; 372 } 373 if (ql2xmultique_tag) { 374 /* create a request queue for IO */ 375 options |= BIT_7; 376 req = qla25xx_create_req_que(ha, options, 0, 0, -1, 377 QLA_DEFAULT_QUE_QOS); 378 if (!req) { 379 ql_log(ql_log_warn, vha, 0x00e0, 380 "Failed to create request queue.\n"); 381 goto fail; 382 } 383 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1); 384 vha->req = ha->req_q_map[req]; 385 options |= BIT_1; 386 for (ques = 1; ques < ha->max_rsp_queues; ques++) { 387 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req); 388 if (!ret) { 389 ql_log(ql_log_warn, vha, 0x00e8, 390 "Failed to create response queue.\n"); 391 goto fail2; 392 } 393 } 394 ha->flags.cpu_affinity_enabled = 1; 395 ql_dbg(ql_dbg_multiq, vha, 0xc007, 396 "CPU affinity mode enalbed, " 397 "no. of response queues:%d no. of request queues:%d.\n", 398 ha->max_rsp_queues, ha->max_req_queues); 399 ql_dbg(ql_dbg_init, vha, 0x00e9, 400 "CPU affinity mode enalbed, " 401 "no. of response queues:%d no. of request queues:%d.\n", 402 ha->max_rsp_queues, ha->max_req_queues); 403 } 404 return 0; 405 fail2: 406 qla25xx_delete_queues(vha); 407 destroy_workqueue(ha->wq); 408 ha->wq = NULL; 409 fail: 410 ha->mqenable = 0; 411 kfree(ha->req_q_map); 412 kfree(ha->rsp_q_map); 413 ha->max_req_queues = ha->max_rsp_queues = 1; 414 return 1; 415 } 416 417 static char * 418 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str) 419 { 420 struct qla_hw_data *ha = vha->hw; 421 static char *pci_bus_modes[] = { 422 "33", "66", "100", "133", 423 }; 424 uint16_t pci_bus; 425 426 strcpy(str, "PCI"); 427 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9; 428 if (pci_bus) { 429 strcat(str, "-X ("); 430 strcat(str, pci_bus_modes[pci_bus]); 431 } else { 432 pci_bus = (ha->pci_attr & BIT_8) >> 8; 433 strcat(str, " ("); 434 strcat(str, pci_bus_modes[pci_bus]); 435 } 436 strcat(str, " MHz)"); 437 438 return (str); 439 } 440 441 static char * 442 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str) 443 { 444 static char *pci_bus_modes[] = { "33", "66", "100", "133", }; 445 struct qla_hw_data *ha = vha->hw; 446 uint32_t pci_bus; 447 int pcie_reg; 448 449 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP); 450 if (pcie_reg) { 451 char lwstr[6]; 452 uint16_t pcie_lstat, lspeed, lwidth; 453 454 pcie_reg += 0x12; 455 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat); 456 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3); 457 lwidth = (pcie_lstat & 458 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4; 459 460 strcpy(str, "PCIe ("); 461 if (lspeed == 1) 462 strcat(str, "2.5GT/s "); 463 else if (lspeed == 2) 464 strcat(str, "5.0GT/s "); 465 else 466 strcat(str, "<unknown> "); 467 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth); 468 strcat(str, lwstr); 469 470 return str; 471 } 472 473 strcpy(str, "PCI"); 474 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8; 475 if (pci_bus == 0 || pci_bus == 8) { 476 strcat(str, " ("); 477 strcat(str, pci_bus_modes[pci_bus >> 3]); 478 } else { 479 strcat(str, "-X "); 480 if (pci_bus & BIT_2) 481 strcat(str, "Mode 2"); 482 else 483 strcat(str, "Mode 1"); 484 strcat(str, " ("); 485 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]); 486 } 487 strcat(str, " MHz)"); 488 489 return str; 490 } 491 492 static char * 493 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str) 494 { 495 char un_str[10]; 496 struct qla_hw_data *ha = vha->hw; 497 498 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version, 499 ha->fw_minor_version, 500 ha->fw_subminor_version); 501 502 if (ha->fw_attributes & BIT_9) { 503 strcat(str, "FLX"); 504 return (str); 505 } 506 507 switch (ha->fw_attributes & 0xFF) { 508 case 0x7: 509 strcat(str, "EF"); 510 break; 511 case 0x17: 512 strcat(str, "TP"); 513 break; 514 case 0x37: 515 strcat(str, "IP"); 516 break; 517 case 0x77: 518 strcat(str, "VI"); 519 break; 520 default: 521 sprintf(un_str, "(%x)", ha->fw_attributes); 522 strcat(str, un_str); 523 break; 524 } 525 if (ha->fw_attributes & 0x100) 526 strcat(str, "X"); 527 528 return (str); 529 } 530 531 static char * 532 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str) 533 { 534 struct qla_hw_data *ha = vha->hw; 535 536 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version, 537 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes); 538 return str; 539 } 540 541 static inline srb_t * 542 qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport, 543 struct scsi_cmnd *cmd) 544 { 545 srb_t *sp; 546 struct qla_hw_data *ha = vha->hw; 547 548 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC); 549 if (!sp) { 550 ql_log(ql_log_warn, vha, 0x3006, 551 "Memory allocation failed for sp.\n"); 552 return sp; 553 } 554 555 atomic_set(&sp->ref_count, 1); 556 sp->fcport = fcport; 557 sp->cmd = cmd; 558 sp->flags = 0; 559 CMD_SP(cmd) = (void *)sp; 560 sp->ctx = NULL; 561 562 return sp; 563 } 564 565 static int 566 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd) 567 { 568 scsi_qla_host_t *vha = shost_priv(host); 569 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; 570 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device)); 571 struct qla_hw_data *ha = vha->hw; 572 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 573 srb_t *sp; 574 int rval; 575 576 if (ha->flags.eeh_busy) { 577 if (ha->flags.pci_channel_io_perm_failure) { 578 ql_dbg(ql_dbg_io, vha, 0x3001, 579 "PCI Channel IO permanent failure, exiting " 580 "cmd=%p.\n", cmd); 581 cmd->result = DID_NO_CONNECT << 16; 582 } else { 583 ql_dbg(ql_dbg_io, vha, 0x3002, 584 "EEH_Busy, Requeuing the cmd=%p.\n", cmd); 585 cmd->result = DID_REQUEUE << 16; 586 } 587 goto qc24_fail_command; 588 } 589 590 rval = fc_remote_port_chkready(rport); 591 if (rval) { 592 cmd->result = rval; 593 ql_dbg(ql_dbg_io, vha, 0x3003, 594 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n", 595 cmd, rval); 596 goto qc24_fail_command; 597 } 598 599 if (!vha->flags.difdix_supported && 600 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) { 601 ql_dbg(ql_dbg_io, vha, 0x3004, 602 "DIF Cap not reg, fail DIF capable cmd's:%p.\n", 603 cmd); 604 cmd->result = DID_NO_CONNECT << 16; 605 goto qc24_fail_command; 606 } 607 if (atomic_read(&fcport->state) != FCS_ONLINE) { 608 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD || 609 atomic_read(&base_vha->loop_state) == LOOP_DEAD) { 610 ql_dbg(ql_dbg_io, vha, 0x3005, 611 "Returning DNC, fcport_state=%d loop_state=%d.\n", 612 atomic_read(&fcport->state), 613 atomic_read(&base_vha->loop_state)); 614 cmd->result = DID_NO_CONNECT << 16; 615 goto qc24_fail_command; 616 } 617 goto qc24_target_busy; 618 } 619 620 sp = qla2x00_get_new_sp(base_vha, fcport, cmd); 621 if (!sp) 622 goto qc24_host_busy; 623 624 rval = ha->isp_ops->start_scsi(sp); 625 if (rval != QLA_SUCCESS) { 626 ql_dbg(ql_dbg_io, vha, 0x3013, 627 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd); 628 goto qc24_host_busy_free_sp; 629 } 630 631 return 0; 632 633 qc24_host_busy_free_sp: 634 qla2x00_sp_free_dma(sp); 635 mempool_free(sp, ha->srb_mempool); 636 637 qc24_host_busy: 638 return SCSI_MLQUEUE_HOST_BUSY; 639 640 qc24_target_busy: 641 return SCSI_MLQUEUE_TARGET_BUSY; 642 643 qc24_fail_command: 644 cmd->scsi_done(cmd); 645 646 return 0; 647 } 648 649 /* 650 * qla2x00_eh_wait_on_command 651 * Waits for the command to be returned by the Firmware for some 652 * max time. 653 * 654 * Input: 655 * cmd = Scsi Command to wait on. 656 * 657 * Return: 658 * Not Found : 0 659 * Found : 1 660 */ 661 static int 662 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd) 663 { 664 #define ABORT_POLLING_PERIOD 1000 665 #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD)) 666 unsigned long wait_iter = ABORT_WAIT_ITER; 667 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 668 struct qla_hw_data *ha = vha->hw; 669 int ret = QLA_SUCCESS; 670 671 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) { 672 ql_dbg(ql_dbg_taskm, vha, 0x8005, 673 "Return:eh_wait.\n"); 674 return ret; 675 } 676 677 while (CMD_SP(cmd) && wait_iter--) { 678 msleep(ABORT_POLLING_PERIOD); 679 } 680 if (CMD_SP(cmd)) 681 ret = QLA_FUNCTION_FAILED; 682 683 return ret; 684 } 685 686 /* 687 * qla2x00_wait_for_hba_online 688 * Wait till the HBA is online after going through 689 * <= MAX_RETRIES_OF_ISP_ABORT or 690 * finally HBA is disabled ie marked offline 691 * 692 * Input: 693 * ha - pointer to host adapter structure 694 * 695 * Note: 696 * Does context switching-Release SPIN_LOCK 697 * (if any) before calling this routine. 698 * 699 * Return: 700 * Success (Adapter is online) : 0 701 * Failed (Adapter is offline/disabled) : 1 702 */ 703 int 704 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha) 705 { 706 int return_status; 707 unsigned long wait_online; 708 struct qla_hw_data *ha = vha->hw; 709 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 710 711 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ); 712 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) || 713 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || 714 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || 715 ha->dpc_active) && time_before(jiffies, wait_online)) { 716 717 msleep(1000); 718 } 719 if (base_vha->flags.online) 720 return_status = QLA_SUCCESS; 721 else 722 return_status = QLA_FUNCTION_FAILED; 723 724 return (return_status); 725 } 726 727 /* 728 * qla2x00_wait_for_reset_ready 729 * Wait till the HBA is online after going through 730 * <= MAX_RETRIES_OF_ISP_ABORT or 731 * finally HBA is disabled ie marked offline or flash 732 * operations are in progress. 733 * 734 * Input: 735 * ha - pointer to host adapter structure 736 * 737 * Note: 738 * Does context switching-Release SPIN_LOCK 739 * (if any) before calling this routine. 740 * 741 * Return: 742 * Success (Adapter is online/no flash ops) : 0 743 * Failed (Adapter is offline/disabled/flash ops in progress) : 1 744 */ 745 static int 746 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha) 747 { 748 int return_status; 749 unsigned long wait_online; 750 struct qla_hw_data *ha = vha->hw; 751 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 752 753 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ); 754 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) || 755 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || 756 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || 757 ha->optrom_state != QLA_SWAITING || 758 ha->dpc_active) && time_before(jiffies, wait_online)) 759 msleep(1000); 760 761 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING) 762 return_status = QLA_SUCCESS; 763 else 764 return_status = QLA_FUNCTION_FAILED; 765 766 ql_dbg(ql_dbg_taskm, vha, 0x8019, 767 "%s return status=%d.\n", __func__, return_status); 768 769 return return_status; 770 } 771 772 int 773 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha) 774 { 775 int return_status; 776 unsigned long wait_reset; 777 struct qla_hw_data *ha = vha->hw; 778 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 779 780 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ); 781 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) || 782 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) || 783 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) || 784 ha->dpc_active) && time_before(jiffies, wait_reset)) { 785 786 msleep(1000); 787 788 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) && 789 ha->flags.chip_reset_done) 790 break; 791 } 792 if (ha->flags.chip_reset_done) 793 return_status = QLA_SUCCESS; 794 else 795 return_status = QLA_FUNCTION_FAILED; 796 797 return return_status; 798 } 799 800 /* 801 * qla2x00_wait_for_loop_ready 802 * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop 803 * to be in LOOP_READY state. 804 * Input: 805 * ha - pointer to host adapter structure 806 * 807 * Note: 808 * Does context switching-Release SPIN_LOCK 809 * (if any) before calling this routine. 810 * 811 * 812 * Return: 813 * Success (LOOP_READY) : 0 814 * Failed (LOOP_NOT_READY) : 1 815 */ 816 static inline int 817 qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha) 818 { 819 int return_status = QLA_SUCCESS; 820 unsigned long loop_timeout ; 821 struct qla_hw_data *ha = vha->hw; 822 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 823 824 /* wait for 5 min at the max for loop to be ready */ 825 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ); 826 827 while ((!atomic_read(&base_vha->loop_down_timer) && 828 atomic_read(&base_vha->loop_state) == LOOP_DOWN) || 829 atomic_read(&base_vha->loop_state) != LOOP_READY) { 830 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) { 831 return_status = QLA_FUNCTION_FAILED; 832 break; 833 } 834 msleep(1000); 835 if (time_after_eq(jiffies, loop_timeout)) { 836 return_status = QLA_FUNCTION_FAILED; 837 break; 838 } 839 } 840 return (return_status); 841 } 842 843 static void 844 sp_get(struct srb *sp) 845 { 846 atomic_inc(&sp->ref_count); 847 } 848 849 /************************************************************************** 850 * qla2xxx_eh_abort 851 * 852 * Description: 853 * The abort function will abort the specified command. 854 * 855 * Input: 856 * cmd = Linux SCSI command packet to be aborted. 857 * 858 * Returns: 859 * Either SUCCESS or FAILED. 860 * 861 * Note: 862 * Only return FAILED if command not returned by firmware. 863 **************************************************************************/ 864 static int 865 qla2xxx_eh_abort(struct scsi_cmnd *cmd) 866 { 867 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 868 srb_t *sp; 869 int ret; 870 unsigned int id, lun; 871 unsigned long flags; 872 int wait = 0; 873 struct qla_hw_data *ha = vha->hw; 874 875 ql_dbg(ql_dbg_taskm, vha, 0x8000, 876 "Entered %s for cmd=%p.\n", __func__, cmd); 877 if (!CMD_SP(cmd)) 878 return SUCCESS; 879 880 ret = fc_block_scsi_eh(cmd); 881 ql_dbg(ql_dbg_taskm, vha, 0x8001, 882 "Return value of fc_block_scsi_eh=%d.\n", ret); 883 if (ret != 0) 884 return ret; 885 ret = SUCCESS; 886 887 id = cmd->device->id; 888 lun = cmd->device->lun; 889 890 spin_lock_irqsave(&ha->hardware_lock, flags); 891 sp = (srb_t *) CMD_SP(cmd); 892 if (!sp) { 893 spin_unlock_irqrestore(&ha->hardware_lock, flags); 894 return SUCCESS; 895 } 896 897 ql_dbg(ql_dbg_taskm, vha, 0x8002, 898 "Aborting sp=%p cmd=%p from RISC ", sp, cmd); 899 900 /* Get a reference to the sp and drop the lock.*/ 901 sp_get(sp); 902 903 spin_unlock_irqrestore(&ha->hardware_lock, flags); 904 if (ha->isp_ops->abort_command(sp)) { 905 ql_dbg(ql_dbg_taskm, vha, 0x8003, 906 "Abort command mbx failed for cmd=%p.\n", cmd); 907 } else { 908 ql_dbg(ql_dbg_taskm, vha, 0x8004, 909 "Abort command mbx success.\n"); 910 wait = 1; 911 } 912 qla2x00_sp_compl(ha, sp); 913 914 /* Wait for the command to be returned. */ 915 if (wait) { 916 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) { 917 ql_log(ql_log_warn, vha, 0x8006, 918 "Abort handler timed out for cmd=%p.\n", cmd); 919 ret = FAILED; 920 } 921 } 922 923 ql_log(ql_log_info, vha, 0x801c, 924 "Abort command issued -- %d %x.\n", wait, ret); 925 926 return ret; 927 } 928 929 int 930 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t, 931 unsigned int l, enum nexus_wait_type type) 932 { 933 int cnt, match, status; 934 unsigned long flags; 935 struct qla_hw_data *ha = vha->hw; 936 struct req_que *req; 937 srb_t *sp; 938 939 status = QLA_SUCCESS; 940 941 spin_lock_irqsave(&ha->hardware_lock, flags); 942 req = vha->req; 943 for (cnt = 1; status == QLA_SUCCESS && 944 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) { 945 sp = req->outstanding_cmds[cnt]; 946 if (!sp) 947 continue; 948 if ((sp->ctx) && !IS_PROT_IO(sp)) 949 continue; 950 if (vha->vp_idx != sp->fcport->vha->vp_idx) 951 continue; 952 match = 0; 953 switch (type) { 954 case WAIT_HOST: 955 match = 1; 956 break; 957 case WAIT_TARGET: 958 match = sp->cmd->device->id == t; 959 break; 960 case WAIT_LUN: 961 match = (sp->cmd->device->id == t && 962 sp->cmd->device->lun == l); 963 break; 964 } 965 if (!match) 966 continue; 967 968 spin_unlock_irqrestore(&ha->hardware_lock, flags); 969 status = qla2x00_eh_wait_on_command(sp->cmd); 970 spin_lock_irqsave(&ha->hardware_lock, flags); 971 } 972 spin_unlock_irqrestore(&ha->hardware_lock, flags); 973 974 return status; 975 } 976 977 static char *reset_errors[] = { 978 "HBA not online", 979 "HBA not ready", 980 "Task management failed", 981 "Waiting for command completions", 982 }; 983 984 static int 985 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type, 986 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int)) 987 { 988 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 989 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; 990 int err; 991 992 if (!fcport) { 993 ql_log(ql_log_warn, vha, 0x8007, 994 "fcport is NULL.\n"); 995 return FAILED; 996 } 997 998 err = fc_block_scsi_eh(cmd); 999 ql_dbg(ql_dbg_taskm, vha, 0x8008, 1000 "fc_block_scsi_eh ret=%d.\n", err); 1001 if (err != 0) 1002 return err; 1003 1004 ql_log(ql_log_info, vha, 0x8009, 1005 "%s RESET ISSUED for id %d lun %d cmd=%p.\n", name, 1006 cmd->device->id, cmd->device->lun, cmd); 1007 1008 err = 0; 1009 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) { 1010 ql_log(ql_log_warn, vha, 0x800a, 1011 "Wait for hba online failed for cmd=%p.\n", cmd); 1012 goto eh_reset_failed; 1013 } 1014 err = 1; 1015 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS) { 1016 ql_log(ql_log_warn, vha, 0x800b, 1017 "Wait for loop ready failed for cmd=%p.\n", cmd); 1018 goto eh_reset_failed; 1019 } 1020 err = 2; 1021 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1) 1022 != QLA_SUCCESS) { 1023 ql_log(ql_log_warn, vha, 0x800c, 1024 "do_reset failed for cmd=%p.\n", cmd); 1025 goto eh_reset_failed; 1026 } 1027 err = 3; 1028 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id, 1029 cmd->device->lun, type) != QLA_SUCCESS) { 1030 ql_log(ql_log_warn, vha, 0x800d, 1031 "wait for peding cmds failed for cmd=%p.\n", cmd); 1032 goto eh_reset_failed; 1033 } 1034 1035 ql_log(ql_log_info, vha, 0x800e, 1036 "%s RESET SUCCEEDED for id %d lun %d cmd=%p.\n", name, 1037 cmd->device->id, cmd->device->lun, cmd); 1038 1039 return SUCCESS; 1040 1041 eh_reset_failed: 1042 ql_log(ql_log_info, vha, 0x800f, 1043 "%s RESET FAILED: %s for id %d lun %d cmd=%p.\n", name, 1044 reset_errors[err], cmd->device->id, cmd->device->lun); 1045 return FAILED; 1046 } 1047 1048 static int 1049 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd) 1050 { 1051 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 1052 struct qla_hw_data *ha = vha->hw; 1053 1054 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd, 1055 ha->isp_ops->lun_reset); 1056 } 1057 1058 static int 1059 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd) 1060 { 1061 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 1062 struct qla_hw_data *ha = vha->hw; 1063 1064 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd, 1065 ha->isp_ops->target_reset); 1066 } 1067 1068 /************************************************************************** 1069 * qla2xxx_eh_bus_reset 1070 * 1071 * Description: 1072 * The bus reset function will reset the bus and abort any executing 1073 * commands. 1074 * 1075 * Input: 1076 * cmd = Linux SCSI command packet of the command that cause the 1077 * bus reset. 1078 * 1079 * Returns: 1080 * SUCCESS/FAILURE (defined as macro in scsi.h). 1081 * 1082 **************************************************************************/ 1083 static int 1084 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd) 1085 { 1086 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 1087 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; 1088 int ret = FAILED; 1089 unsigned int id, lun; 1090 1091 id = cmd->device->id; 1092 lun = cmd->device->lun; 1093 1094 if (!fcport) { 1095 ql_log(ql_log_warn, vha, 0x8010, 1096 "fcport is NULL.\n"); 1097 return ret; 1098 } 1099 1100 ret = fc_block_scsi_eh(cmd); 1101 ql_dbg(ql_dbg_taskm, vha, 0x8011, 1102 "fc_block_scsi_eh ret=%d.\n", ret); 1103 if (ret != 0) 1104 return ret; 1105 ret = FAILED; 1106 1107 ql_log(ql_log_info, vha, 0x8012, 1108 "BUS RESET ISSUED for id %d lun %d.\n", id, lun); 1109 1110 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) { 1111 ql_log(ql_log_fatal, vha, 0x8013, 1112 "Wait for hba online failed board disabled.\n"); 1113 goto eh_bus_reset_done; 1114 } 1115 1116 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) { 1117 if (qla2x00_loop_reset(vha) == QLA_SUCCESS) 1118 ret = SUCCESS; 1119 } 1120 if (ret == FAILED) 1121 goto eh_bus_reset_done; 1122 1123 /* Flush outstanding commands. */ 1124 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) != 1125 QLA_SUCCESS) { 1126 ql_log(ql_log_warn, vha, 0x8014, 1127 "Wait for pending commands failed.\n"); 1128 ret = FAILED; 1129 } 1130 1131 eh_bus_reset_done: 1132 ql_log(ql_log_warn, vha, 0x802b, 1133 "BUS RESET %s.\n", (ret == FAILED) ? "FAILED" : "SUCCEDED"); 1134 1135 return ret; 1136 } 1137 1138 /************************************************************************** 1139 * qla2xxx_eh_host_reset 1140 * 1141 * Description: 1142 * The reset function will reset the Adapter. 1143 * 1144 * Input: 1145 * cmd = Linux SCSI command packet of the command that cause the 1146 * adapter reset. 1147 * 1148 * Returns: 1149 * Either SUCCESS or FAILED. 1150 * 1151 * Note: 1152 **************************************************************************/ 1153 static int 1154 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd) 1155 { 1156 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 1157 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata; 1158 struct qla_hw_data *ha = vha->hw; 1159 int ret = FAILED; 1160 unsigned int id, lun; 1161 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 1162 1163 id = cmd->device->id; 1164 lun = cmd->device->lun; 1165 1166 if (!fcport) { 1167 ql_log(ql_log_warn, vha, 0x8016, 1168 "fcport is NULL.\n"); 1169 return ret; 1170 } 1171 1172 ret = fc_block_scsi_eh(cmd); 1173 ql_dbg(ql_dbg_taskm, vha, 0x8017, 1174 "fc_block_scsi_eh ret=%d.\n", ret); 1175 if (ret != 0) 1176 return ret; 1177 ret = FAILED; 1178 1179 ql_log(ql_log_info, vha, 0x8018, 1180 "ADAPTER RESET ISSUED for id %d lun %d.\n", id, lun); 1181 1182 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS) 1183 goto eh_host_reset_lock; 1184 1185 /* 1186 * Fixme-may be dpc thread is active and processing 1187 * loop_resync,so wait a while for it to 1188 * be completed and then issue big hammer.Otherwise 1189 * it may cause I/O failure as big hammer marks the 1190 * devices as lost kicking of the port_down_timer 1191 * while dpc is stuck for the mailbox to complete. 1192 */ 1193 qla2x00_wait_for_loop_ready(vha); 1194 if (vha != base_vha) { 1195 if (qla2x00_vp_abort_isp(vha)) 1196 goto eh_host_reset_lock; 1197 } else { 1198 if (IS_QLA82XX(vha->hw)) { 1199 if (!qla82xx_fcoe_ctx_reset(vha)) { 1200 /* Ctx reset success */ 1201 ret = SUCCESS; 1202 goto eh_host_reset_lock; 1203 } 1204 /* fall thru if ctx reset failed */ 1205 } 1206 if (ha->wq) 1207 flush_workqueue(ha->wq); 1208 1209 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 1210 if (ha->isp_ops->abort_isp(base_vha)) { 1211 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 1212 /* failed. schedule dpc to try */ 1213 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); 1214 1215 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) { 1216 ql_log(ql_log_warn, vha, 0x802a, 1217 "wait for hba online failed.\n"); 1218 goto eh_host_reset_lock; 1219 } 1220 } 1221 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 1222 } 1223 1224 /* Waiting for command to be returned to OS.*/ 1225 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) == 1226 QLA_SUCCESS) 1227 ret = SUCCESS; 1228 1229 eh_host_reset_lock: 1230 qla_printk(KERN_INFO, ha, "%s: reset %s.\n", __func__, 1231 (ret == FAILED) ? "failed" : "succeeded"); 1232 1233 return ret; 1234 } 1235 1236 /* 1237 * qla2x00_loop_reset 1238 * Issue loop reset. 1239 * 1240 * Input: 1241 * ha = adapter block pointer. 1242 * 1243 * Returns: 1244 * 0 = success 1245 */ 1246 int 1247 qla2x00_loop_reset(scsi_qla_host_t *vha) 1248 { 1249 int ret; 1250 struct fc_port *fcport; 1251 struct qla_hw_data *ha = vha->hw; 1252 1253 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) { 1254 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1255 if (fcport->port_type != FCT_TARGET) 1256 continue; 1257 1258 ret = ha->isp_ops->target_reset(fcport, 0, 0); 1259 if (ret != QLA_SUCCESS) { 1260 ql_dbg(ql_dbg_taskm, vha, 0x802c, 1261 "Bus Reset failed: Target Reset=%d " 1262 "d_id=%x.\n", ret, fcport->d_id.b24); 1263 } 1264 } 1265 } 1266 1267 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) { 1268 ret = qla2x00_full_login_lip(vha); 1269 if (ret != QLA_SUCCESS) { 1270 ql_dbg(ql_dbg_taskm, vha, 0x802d, 1271 "full_login_lip=%d.\n", ret); 1272 } 1273 atomic_set(&vha->loop_state, LOOP_DOWN); 1274 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1275 qla2x00_mark_all_devices_lost(vha, 0); 1276 qla2x00_wait_for_loop_ready(vha); 1277 } 1278 1279 if (ha->flags.enable_lip_reset) { 1280 ret = qla2x00_lip_reset(vha); 1281 if (ret != QLA_SUCCESS) { 1282 ql_dbg(ql_dbg_taskm, vha, 0x802e, 1283 "lip_reset failed (%d).\n", ret); 1284 } else 1285 qla2x00_wait_for_loop_ready(vha); 1286 } 1287 1288 /* Issue marker command only when we are going to start the I/O */ 1289 vha->marker_needed = 1; 1290 1291 return QLA_SUCCESS; 1292 } 1293 1294 void 1295 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res) 1296 { 1297 int que, cnt; 1298 unsigned long flags; 1299 srb_t *sp; 1300 struct srb_ctx *ctx; 1301 struct qla_hw_data *ha = vha->hw; 1302 struct req_que *req; 1303 1304 spin_lock_irqsave(&ha->hardware_lock, flags); 1305 for (que = 0; que < ha->max_req_queues; que++) { 1306 req = ha->req_q_map[que]; 1307 if (!req) 1308 continue; 1309 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) { 1310 sp = req->outstanding_cmds[cnt]; 1311 if (sp) { 1312 req->outstanding_cmds[cnt] = NULL; 1313 if (!sp->ctx || 1314 (sp->flags & SRB_FCP_CMND_DMA_VALID) || 1315 IS_PROT_IO(sp)) { 1316 sp->cmd->result = res; 1317 qla2x00_sp_compl(ha, sp); 1318 } else { 1319 ctx = sp->ctx; 1320 if (ctx->type == SRB_LOGIN_CMD || 1321 ctx->type == SRB_LOGOUT_CMD) { 1322 ctx->u.iocb_cmd->free(sp); 1323 } else { 1324 struct fc_bsg_job *bsg_job = 1325 ctx->u.bsg_job; 1326 if (bsg_job->request->msgcode 1327 == FC_BSG_HST_CT) 1328 kfree(sp->fcport); 1329 bsg_job->req->errors = 0; 1330 bsg_job->reply->result = res; 1331 bsg_job->job_done(bsg_job); 1332 kfree(sp->ctx); 1333 mempool_free(sp, 1334 ha->srb_mempool); 1335 } 1336 } 1337 } 1338 } 1339 } 1340 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1341 } 1342 1343 static int 1344 qla2xxx_slave_alloc(struct scsi_device *sdev) 1345 { 1346 struct fc_rport *rport = starget_to_rport(scsi_target(sdev)); 1347 1348 if (!rport || fc_remote_port_chkready(rport)) 1349 return -ENXIO; 1350 1351 sdev->hostdata = *(fc_port_t **)rport->dd_data; 1352 1353 return 0; 1354 } 1355 1356 static int 1357 qla2xxx_slave_configure(struct scsi_device *sdev) 1358 { 1359 scsi_qla_host_t *vha = shost_priv(sdev->host); 1360 struct req_que *req = vha->req; 1361 1362 if (sdev->tagged_supported) 1363 scsi_activate_tcq(sdev, req->max_q_depth); 1364 else 1365 scsi_deactivate_tcq(sdev, req->max_q_depth); 1366 return 0; 1367 } 1368 1369 static void 1370 qla2xxx_slave_destroy(struct scsi_device *sdev) 1371 { 1372 sdev->hostdata = NULL; 1373 } 1374 1375 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth) 1376 { 1377 fc_port_t *fcport = (struct fc_port *) sdev->hostdata; 1378 1379 if (!scsi_track_queue_full(sdev, qdepth)) 1380 return; 1381 1382 ql_dbg(ql_dbg_io, fcport->vha, 0x3029, 1383 "Queue depth adjusted-down " 1384 "to %d for scsi(%ld:%d:%d:%d).\n", 1385 sdev->queue_depth, fcport->vha->host_no, 1386 sdev->channel, sdev->id, sdev->lun); 1387 } 1388 1389 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth) 1390 { 1391 fc_port_t *fcport = sdev->hostdata; 1392 struct scsi_qla_host *vha = fcport->vha; 1393 struct req_que *req = NULL; 1394 1395 req = vha->req; 1396 if (!req) 1397 return; 1398 1399 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth) 1400 return; 1401 1402 if (sdev->ordered_tags) 1403 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth); 1404 else 1405 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth); 1406 1407 ql_dbg(ql_dbg_io, vha, 0x302a, 1408 "Queue depth adjusted-up to %d for " 1409 "scsi(%ld:%d:%d:%d).\n", 1410 sdev->queue_depth, fcport->vha->host_no, 1411 sdev->channel, sdev->id, sdev->lun); 1412 } 1413 1414 static int 1415 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason) 1416 { 1417 switch (reason) { 1418 case SCSI_QDEPTH_DEFAULT: 1419 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); 1420 break; 1421 case SCSI_QDEPTH_QFULL: 1422 qla2x00_handle_queue_full(sdev, qdepth); 1423 break; 1424 case SCSI_QDEPTH_RAMP_UP: 1425 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth); 1426 break; 1427 default: 1428 return -EOPNOTSUPP; 1429 } 1430 1431 return sdev->queue_depth; 1432 } 1433 1434 static int 1435 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type) 1436 { 1437 if (sdev->tagged_supported) { 1438 scsi_set_tag_type(sdev, tag_type); 1439 if (tag_type) 1440 scsi_activate_tcq(sdev, sdev->queue_depth); 1441 else 1442 scsi_deactivate_tcq(sdev, sdev->queue_depth); 1443 } else 1444 tag_type = 0; 1445 1446 return tag_type; 1447 } 1448 1449 /** 1450 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method. 1451 * @ha: HA context 1452 * 1453 * At exit, the @ha's flags.enable_64bit_addressing set to indicated 1454 * supported addressing method. 1455 */ 1456 static void 1457 qla2x00_config_dma_addressing(struct qla_hw_data *ha) 1458 { 1459 /* Assume a 32bit DMA mask. */ 1460 ha->flags.enable_64bit_addressing = 0; 1461 1462 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) { 1463 /* Any upper-dword bits set? */ 1464 if (MSD(dma_get_required_mask(&ha->pdev->dev)) && 1465 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) { 1466 /* Ok, a 64bit DMA mask is applicable. */ 1467 ha->flags.enable_64bit_addressing = 1; 1468 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64; 1469 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64; 1470 return; 1471 } 1472 } 1473 1474 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32)); 1475 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32)); 1476 } 1477 1478 static void 1479 qla2x00_enable_intrs(struct qla_hw_data *ha) 1480 { 1481 unsigned long flags = 0; 1482 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1483 1484 spin_lock_irqsave(&ha->hardware_lock, flags); 1485 ha->interrupts_on = 1; 1486 /* enable risc and host interrupts */ 1487 WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC); 1488 RD_REG_WORD(®->ictrl); 1489 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1490 1491 } 1492 1493 static void 1494 qla2x00_disable_intrs(struct qla_hw_data *ha) 1495 { 1496 unsigned long flags = 0; 1497 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1498 1499 spin_lock_irqsave(&ha->hardware_lock, flags); 1500 ha->interrupts_on = 0; 1501 /* disable risc and host interrupts */ 1502 WRT_REG_WORD(®->ictrl, 0); 1503 RD_REG_WORD(®->ictrl); 1504 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1505 } 1506 1507 static void 1508 qla24xx_enable_intrs(struct qla_hw_data *ha) 1509 { 1510 unsigned long flags = 0; 1511 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1512 1513 spin_lock_irqsave(&ha->hardware_lock, flags); 1514 ha->interrupts_on = 1; 1515 WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT); 1516 RD_REG_DWORD(®->ictrl); 1517 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1518 } 1519 1520 static void 1521 qla24xx_disable_intrs(struct qla_hw_data *ha) 1522 { 1523 unsigned long flags = 0; 1524 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1525 1526 if (IS_NOPOLLING_TYPE(ha)) 1527 return; 1528 spin_lock_irqsave(&ha->hardware_lock, flags); 1529 ha->interrupts_on = 0; 1530 WRT_REG_DWORD(®->ictrl, 0); 1531 RD_REG_DWORD(®->ictrl); 1532 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1533 } 1534 1535 static struct isp_operations qla2100_isp_ops = { 1536 .pci_config = qla2100_pci_config, 1537 .reset_chip = qla2x00_reset_chip, 1538 .chip_diag = qla2x00_chip_diag, 1539 .config_rings = qla2x00_config_rings, 1540 .reset_adapter = qla2x00_reset_adapter, 1541 .nvram_config = qla2x00_nvram_config, 1542 .update_fw_options = qla2x00_update_fw_options, 1543 .load_risc = qla2x00_load_risc, 1544 .pci_info_str = qla2x00_pci_info_str, 1545 .fw_version_str = qla2x00_fw_version_str, 1546 .intr_handler = qla2100_intr_handler, 1547 .enable_intrs = qla2x00_enable_intrs, 1548 .disable_intrs = qla2x00_disable_intrs, 1549 .abort_command = qla2x00_abort_command, 1550 .target_reset = qla2x00_abort_target, 1551 .lun_reset = qla2x00_lun_reset, 1552 .fabric_login = qla2x00_login_fabric, 1553 .fabric_logout = qla2x00_fabric_logout, 1554 .calc_req_entries = qla2x00_calc_iocbs_32, 1555 .build_iocbs = qla2x00_build_scsi_iocbs_32, 1556 .prep_ms_iocb = qla2x00_prep_ms_iocb, 1557 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb, 1558 .read_nvram = qla2x00_read_nvram_data, 1559 .write_nvram = qla2x00_write_nvram_data, 1560 .fw_dump = qla2100_fw_dump, 1561 .beacon_on = NULL, 1562 .beacon_off = NULL, 1563 .beacon_blink = NULL, 1564 .read_optrom = qla2x00_read_optrom_data, 1565 .write_optrom = qla2x00_write_optrom_data, 1566 .get_flash_version = qla2x00_get_flash_version, 1567 .start_scsi = qla2x00_start_scsi, 1568 .abort_isp = qla2x00_abort_isp, 1569 }; 1570 1571 static struct isp_operations qla2300_isp_ops = { 1572 .pci_config = qla2300_pci_config, 1573 .reset_chip = qla2x00_reset_chip, 1574 .chip_diag = qla2x00_chip_diag, 1575 .config_rings = qla2x00_config_rings, 1576 .reset_adapter = qla2x00_reset_adapter, 1577 .nvram_config = qla2x00_nvram_config, 1578 .update_fw_options = qla2x00_update_fw_options, 1579 .load_risc = qla2x00_load_risc, 1580 .pci_info_str = qla2x00_pci_info_str, 1581 .fw_version_str = qla2x00_fw_version_str, 1582 .intr_handler = qla2300_intr_handler, 1583 .enable_intrs = qla2x00_enable_intrs, 1584 .disable_intrs = qla2x00_disable_intrs, 1585 .abort_command = qla2x00_abort_command, 1586 .target_reset = qla2x00_abort_target, 1587 .lun_reset = qla2x00_lun_reset, 1588 .fabric_login = qla2x00_login_fabric, 1589 .fabric_logout = qla2x00_fabric_logout, 1590 .calc_req_entries = qla2x00_calc_iocbs_32, 1591 .build_iocbs = qla2x00_build_scsi_iocbs_32, 1592 .prep_ms_iocb = qla2x00_prep_ms_iocb, 1593 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb, 1594 .read_nvram = qla2x00_read_nvram_data, 1595 .write_nvram = qla2x00_write_nvram_data, 1596 .fw_dump = qla2300_fw_dump, 1597 .beacon_on = qla2x00_beacon_on, 1598 .beacon_off = qla2x00_beacon_off, 1599 .beacon_blink = qla2x00_beacon_blink, 1600 .read_optrom = qla2x00_read_optrom_data, 1601 .write_optrom = qla2x00_write_optrom_data, 1602 .get_flash_version = qla2x00_get_flash_version, 1603 .start_scsi = qla2x00_start_scsi, 1604 .abort_isp = qla2x00_abort_isp, 1605 }; 1606 1607 static struct isp_operations qla24xx_isp_ops = { 1608 .pci_config = qla24xx_pci_config, 1609 .reset_chip = qla24xx_reset_chip, 1610 .chip_diag = qla24xx_chip_diag, 1611 .config_rings = qla24xx_config_rings, 1612 .reset_adapter = qla24xx_reset_adapter, 1613 .nvram_config = qla24xx_nvram_config, 1614 .update_fw_options = qla24xx_update_fw_options, 1615 .load_risc = qla24xx_load_risc, 1616 .pci_info_str = qla24xx_pci_info_str, 1617 .fw_version_str = qla24xx_fw_version_str, 1618 .intr_handler = qla24xx_intr_handler, 1619 .enable_intrs = qla24xx_enable_intrs, 1620 .disable_intrs = qla24xx_disable_intrs, 1621 .abort_command = qla24xx_abort_command, 1622 .target_reset = qla24xx_abort_target, 1623 .lun_reset = qla24xx_lun_reset, 1624 .fabric_login = qla24xx_login_fabric, 1625 .fabric_logout = qla24xx_fabric_logout, 1626 .calc_req_entries = NULL, 1627 .build_iocbs = NULL, 1628 .prep_ms_iocb = qla24xx_prep_ms_iocb, 1629 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, 1630 .read_nvram = qla24xx_read_nvram_data, 1631 .write_nvram = qla24xx_write_nvram_data, 1632 .fw_dump = qla24xx_fw_dump, 1633 .beacon_on = qla24xx_beacon_on, 1634 .beacon_off = qla24xx_beacon_off, 1635 .beacon_blink = qla24xx_beacon_blink, 1636 .read_optrom = qla24xx_read_optrom_data, 1637 .write_optrom = qla24xx_write_optrom_data, 1638 .get_flash_version = qla24xx_get_flash_version, 1639 .start_scsi = qla24xx_start_scsi, 1640 .abort_isp = qla2x00_abort_isp, 1641 }; 1642 1643 static struct isp_operations qla25xx_isp_ops = { 1644 .pci_config = qla25xx_pci_config, 1645 .reset_chip = qla24xx_reset_chip, 1646 .chip_diag = qla24xx_chip_diag, 1647 .config_rings = qla24xx_config_rings, 1648 .reset_adapter = qla24xx_reset_adapter, 1649 .nvram_config = qla24xx_nvram_config, 1650 .update_fw_options = qla24xx_update_fw_options, 1651 .load_risc = qla24xx_load_risc, 1652 .pci_info_str = qla24xx_pci_info_str, 1653 .fw_version_str = qla24xx_fw_version_str, 1654 .intr_handler = qla24xx_intr_handler, 1655 .enable_intrs = qla24xx_enable_intrs, 1656 .disable_intrs = qla24xx_disable_intrs, 1657 .abort_command = qla24xx_abort_command, 1658 .target_reset = qla24xx_abort_target, 1659 .lun_reset = qla24xx_lun_reset, 1660 .fabric_login = qla24xx_login_fabric, 1661 .fabric_logout = qla24xx_fabric_logout, 1662 .calc_req_entries = NULL, 1663 .build_iocbs = NULL, 1664 .prep_ms_iocb = qla24xx_prep_ms_iocb, 1665 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, 1666 .read_nvram = qla25xx_read_nvram_data, 1667 .write_nvram = qla25xx_write_nvram_data, 1668 .fw_dump = qla25xx_fw_dump, 1669 .beacon_on = qla24xx_beacon_on, 1670 .beacon_off = qla24xx_beacon_off, 1671 .beacon_blink = qla24xx_beacon_blink, 1672 .read_optrom = qla25xx_read_optrom_data, 1673 .write_optrom = qla24xx_write_optrom_data, 1674 .get_flash_version = qla24xx_get_flash_version, 1675 .start_scsi = qla24xx_dif_start_scsi, 1676 .abort_isp = qla2x00_abort_isp, 1677 }; 1678 1679 static struct isp_operations qla81xx_isp_ops = { 1680 .pci_config = qla25xx_pci_config, 1681 .reset_chip = qla24xx_reset_chip, 1682 .chip_diag = qla24xx_chip_diag, 1683 .config_rings = qla24xx_config_rings, 1684 .reset_adapter = qla24xx_reset_adapter, 1685 .nvram_config = qla81xx_nvram_config, 1686 .update_fw_options = qla81xx_update_fw_options, 1687 .load_risc = qla81xx_load_risc, 1688 .pci_info_str = qla24xx_pci_info_str, 1689 .fw_version_str = qla24xx_fw_version_str, 1690 .intr_handler = qla24xx_intr_handler, 1691 .enable_intrs = qla24xx_enable_intrs, 1692 .disable_intrs = qla24xx_disable_intrs, 1693 .abort_command = qla24xx_abort_command, 1694 .target_reset = qla24xx_abort_target, 1695 .lun_reset = qla24xx_lun_reset, 1696 .fabric_login = qla24xx_login_fabric, 1697 .fabric_logout = qla24xx_fabric_logout, 1698 .calc_req_entries = NULL, 1699 .build_iocbs = NULL, 1700 .prep_ms_iocb = qla24xx_prep_ms_iocb, 1701 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, 1702 .read_nvram = NULL, 1703 .write_nvram = NULL, 1704 .fw_dump = qla81xx_fw_dump, 1705 .beacon_on = qla24xx_beacon_on, 1706 .beacon_off = qla24xx_beacon_off, 1707 .beacon_blink = qla24xx_beacon_blink, 1708 .read_optrom = qla25xx_read_optrom_data, 1709 .write_optrom = qla24xx_write_optrom_data, 1710 .get_flash_version = qla24xx_get_flash_version, 1711 .start_scsi = qla24xx_dif_start_scsi, 1712 .abort_isp = qla2x00_abort_isp, 1713 }; 1714 1715 static struct isp_operations qla82xx_isp_ops = { 1716 .pci_config = qla82xx_pci_config, 1717 .reset_chip = qla82xx_reset_chip, 1718 .chip_diag = qla24xx_chip_diag, 1719 .config_rings = qla82xx_config_rings, 1720 .reset_adapter = qla24xx_reset_adapter, 1721 .nvram_config = qla81xx_nvram_config, 1722 .update_fw_options = qla24xx_update_fw_options, 1723 .load_risc = qla82xx_load_risc, 1724 .pci_info_str = qla82xx_pci_info_str, 1725 .fw_version_str = qla24xx_fw_version_str, 1726 .intr_handler = qla82xx_intr_handler, 1727 .enable_intrs = qla82xx_enable_intrs, 1728 .disable_intrs = qla82xx_disable_intrs, 1729 .abort_command = qla24xx_abort_command, 1730 .target_reset = qla24xx_abort_target, 1731 .lun_reset = qla24xx_lun_reset, 1732 .fabric_login = qla24xx_login_fabric, 1733 .fabric_logout = qla24xx_fabric_logout, 1734 .calc_req_entries = NULL, 1735 .build_iocbs = NULL, 1736 .prep_ms_iocb = qla24xx_prep_ms_iocb, 1737 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, 1738 .read_nvram = qla24xx_read_nvram_data, 1739 .write_nvram = qla24xx_write_nvram_data, 1740 .fw_dump = qla24xx_fw_dump, 1741 .beacon_on = qla24xx_beacon_on, 1742 .beacon_off = qla24xx_beacon_off, 1743 .beacon_blink = qla24xx_beacon_blink, 1744 .read_optrom = qla82xx_read_optrom_data, 1745 .write_optrom = qla82xx_write_optrom_data, 1746 .get_flash_version = qla24xx_get_flash_version, 1747 .start_scsi = qla82xx_start_scsi, 1748 .abort_isp = qla82xx_abort_isp, 1749 }; 1750 1751 static inline void 1752 qla2x00_set_isp_flags(struct qla_hw_data *ha) 1753 { 1754 ha->device_type = DT_EXTENDED_IDS; 1755 switch (ha->pdev->device) { 1756 case PCI_DEVICE_ID_QLOGIC_ISP2100: 1757 ha->device_type |= DT_ISP2100; 1758 ha->device_type &= ~DT_EXTENDED_IDS; 1759 ha->fw_srisc_address = RISC_START_ADDRESS_2100; 1760 break; 1761 case PCI_DEVICE_ID_QLOGIC_ISP2200: 1762 ha->device_type |= DT_ISP2200; 1763 ha->device_type &= ~DT_EXTENDED_IDS; 1764 ha->fw_srisc_address = RISC_START_ADDRESS_2100; 1765 break; 1766 case PCI_DEVICE_ID_QLOGIC_ISP2300: 1767 ha->device_type |= DT_ISP2300; 1768 ha->device_type |= DT_ZIO_SUPPORTED; 1769 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1770 break; 1771 case PCI_DEVICE_ID_QLOGIC_ISP2312: 1772 ha->device_type |= DT_ISP2312; 1773 ha->device_type |= DT_ZIO_SUPPORTED; 1774 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1775 break; 1776 case PCI_DEVICE_ID_QLOGIC_ISP2322: 1777 ha->device_type |= DT_ISP2322; 1778 ha->device_type |= DT_ZIO_SUPPORTED; 1779 if (ha->pdev->subsystem_vendor == 0x1028 && 1780 ha->pdev->subsystem_device == 0x0170) 1781 ha->device_type |= DT_OEM_001; 1782 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1783 break; 1784 case PCI_DEVICE_ID_QLOGIC_ISP6312: 1785 ha->device_type |= DT_ISP6312; 1786 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1787 break; 1788 case PCI_DEVICE_ID_QLOGIC_ISP6322: 1789 ha->device_type |= DT_ISP6322; 1790 ha->fw_srisc_address = RISC_START_ADDRESS_2300; 1791 break; 1792 case PCI_DEVICE_ID_QLOGIC_ISP2422: 1793 ha->device_type |= DT_ISP2422; 1794 ha->device_type |= DT_ZIO_SUPPORTED; 1795 ha->device_type |= DT_FWI2; 1796 ha->device_type |= DT_IIDMA; 1797 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1798 break; 1799 case PCI_DEVICE_ID_QLOGIC_ISP2432: 1800 ha->device_type |= DT_ISP2432; 1801 ha->device_type |= DT_ZIO_SUPPORTED; 1802 ha->device_type |= DT_FWI2; 1803 ha->device_type |= DT_IIDMA; 1804 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1805 break; 1806 case PCI_DEVICE_ID_QLOGIC_ISP8432: 1807 ha->device_type |= DT_ISP8432; 1808 ha->device_type |= DT_ZIO_SUPPORTED; 1809 ha->device_type |= DT_FWI2; 1810 ha->device_type |= DT_IIDMA; 1811 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1812 break; 1813 case PCI_DEVICE_ID_QLOGIC_ISP5422: 1814 ha->device_type |= DT_ISP5422; 1815 ha->device_type |= DT_FWI2; 1816 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1817 break; 1818 case PCI_DEVICE_ID_QLOGIC_ISP5432: 1819 ha->device_type |= DT_ISP5432; 1820 ha->device_type |= DT_FWI2; 1821 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1822 break; 1823 case PCI_DEVICE_ID_QLOGIC_ISP2532: 1824 ha->device_type |= DT_ISP2532; 1825 ha->device_type |= DT_ZIO_SUPPORTED; 1826 ha->device_type |= DT_FWI2; 1827 ha->device_type |= DT_IIDMA; 1828 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1829 break; 1830 case PCI_DEVICE_ID_QLOGIC_ISP8001: 1831 ha->device_type |= DT_ISP8001; 1832 ha->device_type |= DT_ZIO_SUPPORTED; 1833 ha->device_type |= DT_FWI2; 1834 ha->device_type |= DT_IIDMA; 1835 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1836 break; 1837 case PCI_DEVICE_ID_QLOGIC_ISP8021: 1838 ha->device_type |= DT_ISP8021; 1839 ha->device_type |= DT_ZIO_SUPPORTED; 1840 ha->device_type |= DT_FWI2; 1841 ha->fw_srisc_address = RISC_START_ADDRESS_2400; 1842 /* Initialize 82XX ISP flags */ 1843 qla82xx_init_flags(ha); 1844 break; 1845 } 1846 1847 if (IS_QLA82XX(ha)) 1848 ha->port_no = !(ha->portnum & 1); 1849 else 1850 /* Get adapter physical port no from interrupt pin register. */ 1851 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no); 1852 1853 if (ha->port_no & 1) 1854 ha->flags.port0 = 1; 1855 else 1856 ha->flags.port0 = 0; 1857 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b, 1858 "device_type=0x%x port=%d fw_srisc_address=%p.\n", 1859 ha->device_type, ha->flags.port0, ha->fw_srisc_address); 1860 } 1861 1862 static int 1863 qla2x00_iospace_config(struct qla_hw_data *ha) 1864 { 1865 resource_size_t pio; 1866 uint16_t msix; 1867 int cpus; 1868 1869 if (IS_QLA82XX(ha)) 1870 return qla82xx_iospace_config(ha); 1871 1872 if (pci_request_selected_regions(ha->pdev, ha->bars, 1873 QLA2XXX_DRIVER_NAME)) { 1874 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011, 1875 "Failed to reserve PIO/MMIO regions (%s), aborting.\n", 1876 pci_name(ha->pdev)); 1877 goto iospace_error_exit; 1878 } 1879 if (!(ha->bars & 1)) 1880 goto skip_pio; 1881 1882 /* We only need PIO for Flash operations on ISP2312 v2 chips. */ 1883 pio = pci_resource_start(ha->pdev, 0); 1884 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) { 1885 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { 1886 ql_log_pci(ql_log_warn, ha->pdev, 0x0012, 1887 "Invalid pci I/O region size (%s).\n", 1888 pci_name(ha->pdev)); 1889 pio = 0; 1890 } 1891 } else { 1892 ql_log_pci(ql_log_warn, ha->pdev, 0x0013, 1893 "Region #0 no a PIO resource (%s).\n", 1894 pci_name(ha->pdev)); 1895 pio = 0; 1896 } 1897 ha->pio_address = pio; 1898 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014, 1899 "PIO address=%p.\n", 1900 ha->pio_address); 1901 1902 skip_pio: 1903 /* Use MMIO operations for all accesses. */ 1904 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) { 1905 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015, 1906 "Region #1 not an MMIO resource (%s), aborting.\n", 1907 pci_name(ha->pdev)); 1908 goto iospace_error_exit; 1909 } 1910 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) { 1911 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016, 1912 "Invalid PCI mem region size (%s), aborting.\n", 1913 pci_name(ha->pdev)); 1914 goto iospace_error_exit; 1915 } 1916 1917 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN); 1918 if (!ha->iobase) { 1919 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017, 1920 "Cannot remap MMIO (%s), aborting.\n", 1921 pci_name(ha->pdev)); 1922 goto iospace_error_exit; 1923 } 1924 1925 /* Determine queue resources */ 1926 ha->max_req_queues = ha->max_rsp_queues = 1; 1927 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) || 1928 (ql2xmaxqueues > 1 && ql2xmultique_tag) || 1929 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))) 1930 goto mqiobase_exit; 1931 1932 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), 1933 pci_resource_len(ha->pdev, 3)); 1934 if (ha->mqiobase) { 1935 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018, 1936 "MQIO Base=%p.\n", ha->mqiobase); 1937 /* Read MSIX vector size of the board */ 1938 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix); 1939 ha->msix_count = msix; 1940 /* Max queues are bounded by available msix vectors */ 1941 /* queue 0 uses two msix vectors */ 1942 if (ql2xmultique_tag) { 1943 cpus = num_online_cpus(); 1944 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ? 1945 (cpus + 1) : (ha->msix_count - 1); 1946 ha->max_req_queues = 2; 1947 } else if (ql2xmaxqueues > 1) { 1948 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ? 1949 QLA_MQ_SIZE : ql2xmaxqueues; 1950 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008, 1951 "QoS mode set, max no of request queues:%d.\n", 1952 ha->max_req_queues); 1953 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019, 1954 "QoS mode set, max no of request queues:%d.\n", 1955 ha->max_req_queues); 1956 } 1957 ql_log_pci(ql_log_info, ha->pdev, 0x001a, 1958 "MSI-X vector count: %d.\n", msix); 1959 } else 1960 ql_log_pci(ql_log_info, ha->pdev, 0x001b, 1961 "BAR 3 not enabled.\n"); 1962 1963 mqiobase_exit: 1964 ha->msix_count = ha->max_rsp_queues + 1; 1965 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c, 1966 "MSIX Count:%d.\n", ha->msix_count); 1967 return (0); 1968 1969 iospace_error_exit: 1970 return (-ENOMEM); 1971 } 1972 1973 static void 1974 qla2xxx_scan_start(struct Scsi_Host *shost) 1975 { 1976 scsi_qla_host_t *vha = shost_priv(shost); 1977 1978 if (vha->hw->flags.running_gold_fw) 1979 return; 1980 1981 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1982 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1983 set_bit(RSCN_UPDATE, &vha->dpc_flags); 1984 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags); 1985 } 1986 1987 static int 1988 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time) 1989 { 1990 scsi_qla_host_t *vha = shost_priv(shost); 1991 1992 if (!vha->host) 1993 return 1; 1994 if (time > vha->hw->loop_reset_delay * HZ) 1995 return 1; 1996 1997 return atomic_read(&vha->loop_state) == LOOP_READY; 1998 } 1999 2000 /* 2001 * PCI driver interface 2002 */ 2003 static int __devinit 2004 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) 2005 { 2006 int ret = -ENODEV; 2007 struct Scsi_Host *host; 2008 scsi_qla_host_t *base_vha = NULL; 2009 struct qla_hw_data *ha; 2010 char pci_info[30]; 2011 char fw_str[30]; 2012 struct scsi_host_template *sht; 2013 int bars, max_id, mem_only = 0; 2014 uint16_t req_length = 0, rsp_length = 0; 2015 struct req_que *req = NULL; 2016 struct rsp_que *rsp = NULL; 2017 2018 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO); 2019 sht = &qla2xxx_driver_template; 2020 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 || 2021 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 || 2022 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 || 2023 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 || 2024 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 || 2025 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 || 2026 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 || 2027 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) { 2028 bars = pci_select_bars(pdev, IORESOURCE_MEM); 2029 mem_only = 1; 2030 ql_dbg_pci(ql_dbg_init, pdev, 0x0007, 2031 "Mem only adapter.\n"); 2032 } 2033 ql_dbg_pci(ql_dbg_init, pdev, 0x0008, 2034 "Bars=%d.\n", bars); 2035 2036 if (mem_only) { 2037 if (pci_enable_device_mem(pdev)) 2038 goto probe_out; 2039 } else { 2040 if (pci_enable_device(pdev)) 2041 goto probe_out; 2042 } 2043 2044 /* This may fail but that's ok */ 2045 pci_enable_pcie_error_reporting(pdev); 2046 2047 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL); 2048 if (!ha) { 2049 ql_log_pci(ql_log_fatal, pdev, 0x0009, 2050 "Unable to allocate memory for ha.\n"); 2051 goto probe_out; 2052 } 2053 ql_dbg_pci(ql_dbg_init, pdev, 0x000a, 2054 "Memory allocated for ha=%p.\n", ha); 2055 ha->pdev = pdev; 2056 2057 /* Clear our data area */ 2058 ha->bars = bars; 2059 ha->mem_only = mem_only; 2060 spin_lock_init(&ha->hardware_lock); 2061 spin_lock_init(&ha->vport_slock); 2062 2063 /* Set ISP-type information. */ 2064 qla2x00_set_isp_flags(ha); 2065 2066 /* Set EEH reset type to fundamental if required by hba */ 2067 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) { 2068 pdev->needs_freset = 1; 2069 } 2070 2071 /* Configure PCI I/O space */ 2072 ret = qla2x00_iospace_config(ha); 2073 if (ret) 2074 goto probe_hw_failed; 2075 2076 ql_log_pci(ql_log_info, pdev, 0x001d, 2077 "Found an ISP%04X irq %d iobase 0x%p.\n", 2078 pdev->device, pdev->irq, ha->iobase); 2079 ha->prev_topology = 0; 2080 ha->init_cb_size = sizeof(init_cb_t); 2081 ha->link_data_rate = PORT_SPEED_UNKNOWN; 2082 ha->optrom_size = OPTROM_SIZE_2300; 2083 2084 /* Assign ISP specific operations. */ 2085 max_id = MAX_TARGETS_2200; 2086 if (IS_QLA2100(ha)) { 2087 max_id = MAX_TARGETS_2100; 2088 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100; 2089 req_length = REQUEST_ENTRY_CNT_2100; 2090 rsp_length = RESPONSE_ENTRY_CNT_2100; 2091 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; 2092 ha->gid_list_info_size = 4; 2093 ha->flash_conf_off = ~0; 2094 ha->flash_data_off = ~0; 2095 ha->nvram_conf_off = ~0; 2096 ha->nvram_data_off = ~0; 2097 ha->isp_ops = &qla2100_isp_ops; 2098 } else if (IS_QLA2200(ha)) { 2099 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2100 req_length = REQUEST_ENTRY_CNT_2200; 2101 rsp_length = RESPONSE_ENTRY_CNT_2100; 2102 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; 2103 ha->gid_list_info_size = 4; 2104 ha->flash_conf_off = ~0; 2105 ha->flash_data_off = ~0; 2106 ha->nvram_conf_off = ~0; 2107 ha->nvram_data_off = ~0; 2108 ha->isp_ops = &qla2100_isp_ops; 2109 } else if (IS_QLA23XX(ha)) { 2110 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2111 req_length = REQUEST_ENTRY_CNT_2200; 2112 rsp_length = RESPONSE_ENTRY_CNT_2300; 2113 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2114 ha->gid_list_info_size = 6; 2115 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2116 ha->optrom_size = OPTROM_SIZE_2322; 2117 ha->flash_conf_off = ~0; 2118 ha->flash_data_off = ~0; 2119 ha->nvram_conf_off = ~0; 2120 ha->nvram_data_off = ~0; 2121 ha->isp_ops = &qla2300_isp_ops; 2122 } else if (IS_QLA24XX_TYPE(ha)) { 2123 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2124 req_length = REQUEST_ENTRY_CNT_24XX; 2125 rsp_length = RESPONSE_ENTRY_CNT_2300; 2126 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2127 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); 2128 ha->gid_list_info_size = 8; 2129 ha->optrom_size = OPTROM_SIZE_24XX; 2130 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; 2131 ha->isp_ops = &qla24xx_isp_ops; 2132 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; 2133 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; 2134 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; 2135 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; 2136 } else if (IS_QLA25XX(ha)) { 2137 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2138 req_length = REQUEST_ENTRY_CNT_24XX; 2139 rsp_length = RESPONSE_ENTRY_CNT_2300; 2140 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2141 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); 2142 ha->gid_list_info_size = 8; 2143 ha->optrom_size = OPTROM_SIZE_25XX; 2144 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; 2145 ha->isp_ops = &qla25xx_isp_ops; 2146 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; 2147 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; 2148 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; 2149 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; 2150 } else if (IS_QLA81XX(ha)) { 2151 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2152 req_length = REQUEST_ENTRY_CNT_24XX; 2153 rsp_length = RESPONSE_ENTRY_CNT_2300; 2154 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2155 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); 2156 ha->gid_list_info_size = 8; 2157 ha->optrom_size = OPTROM_SIZE_81XX; 2158 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; 2159 ha->isp_ops = &qla81xx_isp_ops; 2160 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; 2161 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; 2162 ha->nvram_conf_off = ~0; 2163 ha->nvram_data_off = ~0; 2164 } else if (IS_QLA82XX(ha)) { 2165 ha->mbx_count = MAILBOX_REGISTER_COUNT; 2166 req_length = REQUEST_ENTRY_CNT_82XX; 2167 rsp_length = RESPONSE_ENTRY_CNT_82XX; 2168 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; 2169 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); 2170 ha->gid_list_info_size = 8; 2171 ha->optrom_size = OPTROM_SIZE_82XX; 2172 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; 2173 ha->isp_ops = &qla82xx_isp_ops; 2174 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; 2175 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; 2176 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; 2177 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; 2178 } 2179 ql_dbg_pci(ql_dbg_init, pdev, 0x001e, 2180 "mbx_count=%d, req_length=%d, " 2181 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, " 2182 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, .\n", 2183 ha->mbx_count, req_length, rsp_length, ha->max_loop_id, 2184 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size, 2185 ha->nvram_npiv_size); 2186 ql_dbg_pci(ql_dbg_init, pdev, 0x001f, 2187 "isp_ops=%p, flash_conf_off=%d, " 2188 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n", 2189 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off, 2190 ha->nvram_conf_off, ha->nvram_data_off); 2191 mutex_init(&ha->vport_lock); 2192 init_completion(&ha->mbx_cmd_comp); 2193 complete(&ha->mbx_cmd_comp); 2194 init_completion(&ha->mbx_intr_comp); 2195 init_completion(&ha->dcbx_comp); 2196 2197 set_bit(0, (unsigned long *) ha->vp_idx_map); 2198 2199 qla2x00_config_dma_addressing(ha); 2200 ql_dbg_pci(ql_dbg_init, pdev, 0x0020, 2201 "64 Bit addressing is %s.\n", 2202 ha->flags.enable_64bit_addressing ? "enable" : 2203 "disable"); 2204 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp); 2205 if (!ret) { 2206 ql_log_pci(ql_log_fatal, pdev, 0x0031, 2207 "Failed to allocate memory for adapter, aborting.\n"); 2208 2209 goto probe_hw_failed; 2210 } 2211 2212 req->max_q_depth = MAX_Q_DEPTH; 2213 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU) 2214 req->max_q_depth = ql2xmaxqdepth; 2215 2216 2217 base_vha = qla2x00_create_host(sht, ha); 2218 if (!base_vha) { 2219 ret = -ENOMEM; 2220 qla2x00_mem_free(ha); 2221 qla2x00_free_req_que(ha, req); 2222 qla2x00_free_rsp_que(ha, rsp); 2223 goto probe_hw_failed; 2224 } 2225 2226 pci_set_drvdata(pdev, base_vha); 2227 2228 host = base_vha->host; 2229 base_vha->req = req; 2230 host->can_queue = req->length + 128; 2231 if (IS_QLA2XXX_MIDTYPE(ha)) 2232 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx; 2233 else 2234 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER + 2235 base_vha->vp_idx; 2236 2237 /* Set the SG table size based on ISP type */ 2238 if (!IS_FWI2_CAPABLE(ha)) { 2239 if (IS_QLA2100(ha)) 2240 host->sg_tablesize = 32; 2241 } else { 2242 if (!IS_QLA82XX(ha)) 2243 host->sg_tablesize = QLA_SG_ALL; 2244 } 2245 ql_dbg(ql_dbg_init, base_vha, 0x0032, 2246 "can_queue=%d, req=%p, " 2247 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n", 2248 host->can_queue, base_vha->req, 2249 base_vha->mgmt_svr_loop_id, host->sg_tablesize); 2250 host->max_id = max_id; 2251 host->this_id = 255; 2252 host->cmd_per_lun = 3; 2253 host->unique_id = host->host_no; 2254 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) 2255 host->max_cmd_len = 32; 2256 else 2257 host->max_cmd_len = MAX_CMDSZ; 2258 host->max_channel = MAX_BUSES - 1; 2259 host->max_lun = ql2xmaxlun; 2260 host->transportt = qla2xxx_transport_template; 2261 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC); 2262 2263 ql_dbg(ql_dbg_init, base_vha, 0x0033, 2264 "max_id=%d this_id=%d " 2265 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d " 2266 "max_lun=%d transportt=%p, vendor_id=%d.\n", host->max_id, 2267 host->this_id, host->cmd_per_lun, host->unique_id, 2268 host->max_cmd_len, host->max_channel, host->max_lun, 2269 host->transportt, sht->vendor_id); 2270 2271 /* Set up the irqs */ 2272 ret = qla2x00_request_irqs(ha, rsp); 2273 if (ret) 2274 goto probe_init_failed; 2275 2276 pci_save_state(pdev); 2277 2278 /* Alloc arrays of request and response ring ptrs */ 2279 que_init: 2280 if (!qla2x00_alloc_queues(ha)) { 2281 ql_log(ql_log_fatal, base_vha, 0x003d, 2282 "Failed to allocate memory for queue pointers.. aborting.\n"); 2283 goto probe_init_failed; 2284 } 2285 2286 ha->rsp_q_map[0] = rsp; 2287 ha->req_q_map[0] = req; 2288 rsp->req = req; 2289 req->rsp = rsp; 2290 set_bit(0, ha->req_qid_map); 2291 set_bit(0, ha->rsp_qid_map); 2292 /* FWI2-capable only. */ 2293 req->req_q_in = &ha->iobase->isp24.req_q_in; 2294 req->req_q_out = &ha->iobase->isp24.req_q_out; 2295 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in; 2296 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out; 2297 if (ha->mqenable) { 2298 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in; 2299 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out; 2300 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in; 2301 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out; 2302 } 2303 2304 if (IS_QLA82XX(ha)) { 2305 req->req_q_out = &ha->iobase->isp82.req_q_out[0]; 2306 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0]; 2307 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0]; 2308 } 2309 2310 ql_dbg(ql_dbg_multiq, base_vha, 0xc009, 2311 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n", 2312 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); 2313 ql_dbg(ql_dbg_multiq, base_vha, 0xc00a, 2314 "req->req_q_in=%p req->req_q_out=%p " 2315 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n", 2316 req->req_q_in, req->req_q_out, 2317 rsp->rsp_q_in, rsp->rsp_q_out); 2318 ql_dbg(ql_dbg_init, base_vha, 0x003e, 2319 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n", 2320 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); 2321 ql_dbg(ql_dbg_init, base_vha, 0x003f, 2322 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n", 2323 req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out); 2324 2325 if (qla2x00_initialize_adapter(base_vha)) { 2326 ql_log(ql_log_fatal, base_vha, 0x00d6, 2327 "Failed to initialize adapter - Adapter flags %x.\n", 2328 base_vha->device_flags); 2329 2330 if (IS_QLA82XX(ha)) { 2331 qla82xx_idc_lock(ha); 2332 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 2333 QLA82XX_DEV_FAILED); 2334 qla82xx_idc_unlock(ha); 2335 ql_log(ql_log_fatal, base_vha, 0x00d7, 2336 "HW State: FAILED.\n"); 2337 } 2338 2339 ret = -ENODEV; 2340 goto probe_failed; 2341 } 2342 2343 if (ha->mqenable) { 2344 if (qla25xx_setup_mode(base_vha)) { 2345 ql_log(ql_log_warn, base_vha, 0x00ec, 2346 "Failed to create queues, falling back to single queue mode.\n"); 2347 goto que_init; 2348 } 2349 } 2350 2351 if (ha->flags.running_gold_fw) 2352 goto skip_dpc; 2353 2354 /* 2355 * Startup the kernel thread for this host adapter 2356 */ 2357 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha, 2358 "%s_dpc", base_vha->host_str); 2359 if (IS_ERR(ha->dpc_thread)) { 2360 ql_log(ql_log_fatal, base_vha, 0x00ed, 2361 "Failed to start DPC thread.\n"); 2362 ret = PTR_ERR(ha->dpc_thread); 2363 goto probe_failed; 2364 } 2365 ql_dbg(ql_dbg_init, base_vha, 0x00ee, 2366 "DPC thread started successfully.\n"); 2367 2368 skip_dpc: 2369 list_add_tail(&base_vha->list, &ha->vp_list); 2370 base_vha->host->irq = ha->pdev->irq; 2371 2372 /* Initialized the timer */ 2373 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL); 2374 ql_dbg(ql_dbg_init, base_vha, 0x00ef, 2375 "Started qla2x00_timer with " 2376 "interval=%d.\n", WATCH_INTERVAL); 2377 ql_dbg(ql_dbg_init, base_vha, 0x00f0, 2378 "Detected hba at address=%p.\n", 2379 ha); 2380 2381 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) { 2382 if (ha->fw_attributes & BIT_4) { 2383 base_vha->flags.difdix_supported = 1; 2384 ql_dbg(ql_dbg_init, base_vha, 0x00f1, 2385 "Registering for DIF/DIX type 1 and 3 protection.\n"); 2386 scsi_host_set_prot(host, 2387 SHOST_DIF_TYPE1_PROTECTION 2388 | SHOST_DIF_TYPE2_PROTECTION 2389 | SHOST_DIF_TYPE3_PROTECTION 2390 | SHOST_DIX_TYPE1_PROTECTION 2391 | SHOST_DIX_TYPE2_PROTECTION 2392 | SHOST_DIX_TYPE3_PROTECTION); 2393 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC); 2394 } else 2395 base_vha->flags.difdix_supported = 0; 2396 } 2397 2398 ha->isp_ops->enable_intrs(ha); 2399 2400 ret = scsi_add_host(host, &pdev->dev); 2401 if (ret) 2402 goto probe_failed; 2403 2404 base_vha->flags.init_done = 1; 2405 base_vha->flags.online = 1; 2406 2407 ql_dbg(ql_dbg_init, base_vha, 0x00f2, 2408 "Init done and hba is online.\n"); 2409 2410 scsi_scan_host(host); 2411 2412 qla2x00_alloc_sysfs_attr(base_vha); 2413 2414 qla2x00_init_host_attr(base_vha); 2415 2416 qla2x00_dfs_setup(base_vha); 2417 2418 ql_log(ql_log_info, base_vha, 0x00fa, 2419 "QLogic Fibre Channed HBA Driver: %s.\n", 2420 qla2x00_version_str); 2421 ql_log(ql_log_info, base_vha, 0x00fb, 2422 "QLogic %s - %s.\n", 2423 ha->model_number, ha->model_desc ? ha->model_desc : ""); 2424 ql_log(ql_log_info, base_vha, 0x00fc, 2425 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n", 2426 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info), 2427 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-', 2428 base_vha->host_no, 2429 ha->isp_ops->fw_version_str(base_vha, fw_str)); 2430 2431 return 0; 2432 2433 probe_init_failed: 2434 qla2x00_free_req_que(ha, req); 2435 qla2x00_free_rsp_que(ha, rsp); 2436 ha->max_req_queues = ha->max_rsp_queues = 0; 2437 2438 probe_failed: 2439 if (base_vha->timer_active) 2440 qla2x00_stop_timer(base_vha); 2441 base_vha->flags.online = 0; 2442 if (ha->dpc_thread) { 2443 struct task_struct *t = ha->dpc_thread; 2444 2445 ha->dpc_thread = NULL; 2446 kthread_stop(t); 2447 } 2448 2449 qla2x00_free_device(base_vha); 2450 2451 scsi_host_put(base_vha->host); 2452 2453 probe_hw_failed: 2454 if (IS_QLA82XX(ha)) { 2455 qla82xx_idc_lock(ha); 2456 qla82xx_clear_drv_active(ha); 2457 qla82xx_idc_unlock(ha); 2458 iounmap((device_reg_t __iomem *)ha->nx_pcibase); 2459 if (!ql2xdbwr) 2460 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr); 2461 } else { 2462 if (ha->iobase) 2463 iounmap(ha->iobase); 2464 } 2465 pci_release_selected_regions(ha->pdev, ha->bars); 2466 kfree(ha); 2467 ha = NULL; 2468 2469 probe_out: 2470 pci_disable_device(pdev); 2471 return ret; 2472 } 2473 2474 static void 2475 qla2x00_shutdown(struct pci_dev *pdev) 2476 { 2477 scsi_qla_host_t *vha; 2478 struct qla_hw_data *ha; 2479 2480 vha = pci_get_drvdata(pdev); 2481 ha = vha->hw; 2482 2483 /* Turn-off FCE trace */ 2484 if (ha->flags.fce_enabled) { 2485 qla2x00_disable_fce_trace(vha, NULL, NULL); 2486 ha->flags.fce_enabled = 0; 2487 } 2488 2489 /* Turn-off EFT trace */ 2490 if (ha->eft) 2491 qla2x00_disable_eft_trace(vha); 2492 2493 /* Stop currently executing firmware. */ 2494 qla2x00_try_to_stop_firmware(vha); 2495 2496 /* Turn adapter off line */ 2497 vha->flags.online = 0; 2498 2499 /* turn-off interrupts on the card */ 2500 if (ha->interrupts_on) { 2501 vha->flags.init_done = 0; 2502 ha->isp_ops->disable_intrs(ha); 2503 } 2504 2505 qla2x00_free_irqs(vha); 2506 2507 qla2x00_free_fw_dump(ha); 2508 } 2509 2510 static void 2511 qla2x00_remove_one(struct pci_dev *pdev) 2512 { 2513 scsi_qla_host_t *base_vha, *vha; 2514 struct qla_hw_data *ha; 2515 unsigned long flags; 2516 2517 base_vha = pci_get_drvdata(pdev); 2518 ha = base_vha->hw; 2519 2520 mutex_lock(&ha->vport_lock); 2521 while (ha->cur_vport_count) { 2522 struct Scsi_Host *scsi_host; 2523 2524 spin_lock_irqsave(&ha->vport_slock, flags); 2525 2526 BUG_ON(base_vha->list.next == &ha->vp_list); 2527 /* This assumes first entry in ha->vp_list is always base vha */ 2528 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list); 2529 scsi_host = scsi_host_get(vha->host); 2530 2531 spin_unlock_irqrestore(&ha->vport_slock, flags); 2532 mutex_unlock(&ha->vport_lock); 2533 2534 fc_vport_terminate(vha->fc_vport); 2535 scsi_host_put(vha->host); 2536 2537 mutex_lock(&ha->vport_lock); 2538 } 2539 mutex_unlock(&ha->vport_lock); 2540 2541 set_bit(UNLOADING, &base_vha->dpc_flags); 2542 2543 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); 2544 2545 qla2x00_dfs_remove(base_vha); 2546 2547 qla84xx_put_chip(base_vha); 2548 2549 /* Disable timer */ 2550 if (base_vha->timer_active) 2551 qla2x00_stop_timer(base_vha); 2552 2553 base_vha->flags.online = 0; 2554 2555 /* Flush the work queue and remove it */ 2556 if (ha->wq) { 2557 flush_workqueue(ha->wq); 2558 destroy_workqueue(ha->wq); 2559 ha->wq = NULL; 2560 } 2561 2562 /* Kill the kernel thread for this host */ 2563 if (ha->dpc_thread) { 2564 struct task_struct *t = ha->dpc_thread; 2565 2566 /* 2567 * qla2xxx_wake_dpc checks for ->dpc_thread 2568 * so we need to zero it out. 2569 */ 2570 ha->dpc_thread = NULL; 2571 kthread_stop(t); 2572 } 2573 2574 qla2x00_free_sysfs_attr(base_vha); 2575 2576 fc_remove_host(base_vha->host); 2577 2578 scsi_remove_host(base_vha->host); 2579 2580 qla2x00_free_device(base_vha); 2581 2582 scsi_host_put(base_vha->host); 2583 2584 if (IS_QLA82XX(ha)) { 2585 qla82xx_idc_lock(ha); 2586 qla82xx_clear_drv_active(ha); 2587 qla82xx_idc_unlock(ha); 2588 2589 iounmap((device_reg_t __iomem *)ha->nx_pcibase); 2590 if (!ql2xdbwr) 2591 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr); 2592 } else { 2593 if (ha->iobase) 2594 iounmap(ha->iobase); 2595 2596 if (ha->mqiobase) 2597 iounmap(ha->mqiobase); 2598 } 2599 2600 pci_release_selected_regions(ha->pdev, ha->bars); 2601 kfree(ha); 2602 ha = NULL; 2603 2604 pci_disable_pcie_error_reporting(pdev); 2605 2606 pci_disable_device(pdev); 2607 pci_set_drvdata(pdev, NULL); 2608 } 2609 2610 static void 2611 qla2x00_free_device(scsi_qla_host_t *vha) 2612 { 2613 struct qla_hw_data *ha = vha->hw; 2614 2615 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16); 2616 2617 /* Disable timer */ 2618 if (vha->timer_active) 2619 qla2x00_stop_timer(vha); 2620 2621 /* Kill the kernel thread for this host */ 2622 if (ha->dpc_thread) { 2623 struct task_struct *t = ha->dpc_thread; 2624 2625 /* 2626 * qla2xxx_wake_dpc checks for ->dpc_thread 2627 * so we need to zero it out. 2628 */ 2629 ha->dpc_thread = NULL; 2630 kthread_stop(t); 2631 } 2632 2633 qla25xx_delete_queues(vha); 2634 2635 if (ha->flags.fce_enabled) 2636 qla2x00_disable_fce_trace(vha, NULL, NULL); 2637 2638 if (ha->eft) 2639 qla2x00_disable_eft_trace(vha); 2640 2641 /* Stop currently executing firmware. */ 2642 qla2x00_try_to_stop_firmware(vha); 2643 2644 vha->flags.online = 0; 2645 2646 /* turn-off interrupts on the card */ 2647 if (ha->interrupts_on) { 2648 vha->flags.init_done = 0; 2649 ha->isp_ops->disable_intrs(ha); 2650 } 2651 2652 qla2x00_free_irqs(vha); 2653 2654 qla2x00_free_fcports(vha); 2655 2656 qla2x00_mem_free(ha); 2657 2658 qla2x00_free_queues(ha); 2659 } 2660 2661 void qla2x00_free_fcports(struct scsi_qla_host *vha) 2662 { 2663 fc_port_t *fcport, *tfcport; 2664 2665 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) { 2666 list_del(&fcport->list); 2667 kfree(fcport); 2668 fcport = NULL; 2669 } 2670 } 2671 2672 static inline void 2673 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport, 2674 int defer) 2675 { 2676 struct fc_rport *rport; 2677 scsi_qla_host_t *base_vha; 2678 unsigned long flags; 2679 2680 if (!fcport->rport) 2681 return; 2682 2683 rport = fcport->rport; 2684 if (defer) { 2685 base_vha = pci_get_drvdata(vha->hw->pdev); 2686 spin_lock_irqsave(vha->host->host_lock, flags); 2687 fcport->drport = rport; 2688 spin_unlock_irqrestore(vha->host->host_lock, flags); 2689 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags); 2690 qla2xxx_wake_dpc(base_vha); 2691 } else 2692 fc_remote_port_delete(rport); 2693 } 2694 2695 /* 2696 * qla2x00_mark_device_lost Updates fcport state when device goes offline. 2697 * 2698 * Input: ha = adapter block pointer. fcport = port structure pointer. 2699 * 2700 * Return: None. 2701 * 2702 * Context: 2703 */ 2704 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport, 2705 int do_login, int defer) 2706 { 2707 if (atomic_read(&fcport->state) == FCS_ONLINE && 2708 vha->vp_idx == fcport->vp_idx) { 2709 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2710 qla2x00_schedule_rport_del(vha, fcport, defer); 2711 } 2712 /* 2713 * We may need to retry the login, so don't change the state of the 2714 * port but do the retries. 2715 */ 2716 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD) 2717 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2718 2719 if (!do_login) 2720 return; 2721 2722 if (fcport->login_retry == 0) { 2723 fcport->login_retry = vha->hw->login_retry_count; 2724 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2725 2726 ql_dbg(ql_dbg_disc, vha, 0x2067, 2727 "Port login retry " 2728 "%02x%02x%02x%02x%02x%02x%02x%02x, " 2729 "id = 0x%04x retry cnt=%d.\n", 2730 fcport->port_name[0], fcport->port_name[1], 2731 fcport->port_name[2], fcport->port_name[3], 2732 fcport->port_name[4], fcport->port_name[5], 2733 fcport->port_name[6], fcport->port_name[7], 2734 fcport->loop_id, fcport->login_retry); 2735 } 2736 } 2737 2738 /* 2739 * qla2x00_mark_all_devices_lost 2740 * Updates fcport state when device goes offline. 2741 * 2742 * Input: 2743 * ha = adapter block pointer. 2744 * fcport = port structure pointer. 2745 * 2746 * Return: 2747 * None. 2748 * 2749 * Context: 2750 */ 2751 void 2752 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer) 2753 { 2754 fc_port_t *fcport; 2755 2756 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2757 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx) 2758 continue; 2759 2760 /* 2761 * No point in marking the device as lost, if the device is 2762 * already DEAD. 2763 */ 2764 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD) 2765 continue; 2766 if (atomic_read(&fcport->state) == FCS_ONLINE) { 2767 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2768 if (defer) 2769 qla2x00_schedule_rport_del(vha, fcport, defer); 2770 else if (vha->vp_idx == fcport->vp_idx) 2771 qla2x00_schedule_rport_del(vha, fcport, defer); 2772 } 2773 } 2774 } 2775 2776 /* 2777 * qla2x00_mem_alloc 2778 * Allocates adapter memory. 2779 * 2780 * Returns: 2781 * 0 = success. 2782 * !0 = failure. 2783 */ 2784 static int 2785 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, 2786 struct req_que **req, struct rsp_que **rsp) 2787 { 2788 char name[16]; 2789 2790 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size, 2791 &ha->init_cb_dma, GFP_KERNEL); 2792 if (!ha->init_cb) 2793 goto fail; 2794 2795 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE, 2796 &ha->gid_list_dma, GFP_KERNEL); 2797 if (!ha->gid_list) 2798 goto fail_free_init_cb; 2799 2800 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 2801 if (!ha->srb_mempool) 2802 goto fail_free_gid_list; 2803 2804 if (IS_QLA82XX(ha)) { 2805 /* Allocate cache for CT6 Ctx. */ 2806 if (!ctx_cachep) { 2807 ctx_cachep = kmem_cache_create("qla2xxx_ctx", 2808 sizeof(struct ct6_dsd), 0, 2809 SLAB_HWCACHE_ALIGN, NULL); 2810 if (!ctx_cachep) 2811 goto fail_free_gid_list; 2812 } 2813 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ, 2814 ctx_cachep); 2815 if (!ha->ctx_mempool) 2816 goto fail_free_srb_mempool; 2817 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021, 2818 "ctx_cachep=%p ctx_mempool=%p.\n", 2819 ctx_cachep, ha->ctx_mempool); 2820 } 2821 2822 /* Get memory for cached NVRAM */ 2823 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL); 2824 if (!ha->nvram) 2825 goto fail_free_ctx_mempool; 2826 2827 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME, 2828 ha->pdev->device); 2829 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev, 2830 DMA_POOL_SIZE, 8, 0); 2831 if (!ha->s_dma_pool) 2832 goto fail_free_nvram; 2833 2834 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022, 2835 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n", 2836 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool); 2837 2838 if (IS_QLA82XX(ha) || ql2xenabledif) { 2839 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev, 2840 DSD_LIST_DMA_POOL_SIZE, 8, 0); 2841 if (!ha->dl_dma_pool) { 2842 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023, 2843 "Failed to allocate memory for dl_dma_pool.\n"); 2844 goto fail_s_dma_pool; 2845 } 2846 2847 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev, 2848 FCP_CMND_DMA_POOL_SIZE, 8, 0); 2849 if (!ha->fcp_cmnd_dma_pool) { 2850 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024, 2851 "Failed to allocate memory for fcp_cmnd_dma_pool.\n"); 2852 goto fail_dl_dma_pool; 2853 } 2854 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025, 2855 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n", 2856 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool); 2857 } 2858 2859 /* Allocate memory for SNS commands */ 2860 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2861 /* Get consistent memory allocated for SNS commands */ 2862 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev, 2863 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL); 2864 if (!ha->sns_cmd) 2865 goto fail_dma_pool; 2866 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026, 2867 "sns_cmd.\n", ha->sns_cmd); 2868 } else { 2869 /* Get consistent memory allocated for MS IOCB */ 2870 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, 2871 &ha->ms_iocb_dma); 2872 if (!ha->ms_iocb) 2873 goto fail_dma_pool; 2874 /* Get consistent memory allocated for CT SNS commands */ 2875 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev, 2876 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL); 2877 if (!ha->ct_sns) 2878 goto fail_free_ms_iocb; 2879 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027, 2880 "ms_iocb=%p ct_sns=%p.\n", 2881 ha->ms_iocb, ha->ct_sns); 2882 } 2883 2884 /* Allocate memory for request ring */ 2885 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL); 2886 if (!*req) { 2887 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028, 2888 "Failed to allocate memory for req.\n"); 2889 goto fail_req; 2890 } 2891 (*req)->length = req_len; 2892 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev, 2893 ((*req)->length + 1) * sizeof(request_t), 2894 &(*req)->dma, GFP_KERNEL); 2895 if (!(*req)->ring) { 2896 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029, 2897 "Failed to allocate memory for req_ring.\n"); 2898 goto fail_req_ring; 2899 } 2900 /* Allocate memory for response ring */ 2901 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL); 2902 if (!*rsp) { 2903 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a, 2904 "Failed to allocate memory for rsp.\n"); 2905 goto fail_rsp; 2906 } 2907 (*rsp)->hw = ha; 2908 (*rsp)->length = rsp_len; 2909 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev, 2910 ((*rsp)->length + 1) * sizeof(response_t), 2911 &(*rsp)->dma, GFP_KERNEL); 2912 if (!(*rsp)->ring) { 2913 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b, 2914 "Failed to allocate memory for rsp_ring.\n"); 2915 goto fail_rsp_ring; 2916 } 2917 (*req)->rsp = *rsp; 2918 (*rsp)->req = *req; 2919 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c, 2920 "req=%p req->length=%d req->ring=%p rsp=%p " 2921 "rsp->length=%d rsp->ring=%p.\n", 2922 *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length, 2923 (*rsp)->ring); 2924 /* Allocate memory for NVRAM data for vports */ 2925 if (ha->nvram_npiv_size) { 2926 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) * 2927 ha->nvram_npiv_size, GFP_KERNEL); 2928 if (!ha->npiv_info) { 2929 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d, 2930 "Failed to allocate memory for npiv_info.\n"); 2931 goto fail_npiv_info; 2932 } 2933 } else 2934 ha->npiv_info = NULL; 2935 2936 /* Get consistent memory allocated for EX-INIT-CB. */ 2937 if (IS_QLA8XXX_TYPE(ha)) { 2938 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, 2939 &ha->ex_init_cb_dma); 2940 if (!ha->ex_init_cb) 2941 goto fail_ex_init_cb; 2942 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e, 2943 "ex_init_cb=%p.\n", ha->ex_init_cb); 2944 } 2945 2946 INIT_LIST_HEAD(&ha->gbl_dsd_list); 2947 2948 /* Get consistent memory allocated for Async Port-Database. */ 2949 if (!IS_FWI2_CAPABLE(ha)) { 2950 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, 2951 &ha->async_pd_dma); 2952 if (!ha->async_pd) 2953 goto fail_async_pd; 2954 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f, 2955 "async_pd=%p.\n", ha->async_pd); 2956 } 2957 2958 INIT_LIST_HEAD(&ha->vp_list); 2959 return 1; 2960 2961 fail_async_pd: 2962 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma); 2963 fail_ex_init_cb: 2964 kfree(ha->npiv_info); 2965 fail_npiv_info: 2966 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) * 2967 sizeof(response_t), (*rsp)->ring, (*rsp)->dma); 2968 (*rsp)->ring = NULL; 2969 (*rsp)->dma = 0; 2970 fail_rsp_ring: 2971 kfree(*rsp); 2972 fail_rsp: 2973 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) * 2974 sizeof(request_t), (*req)->ring, (*req)->dma); 2975 (*req)->ring = NULL; 2976 (*req)->dma = 0; 2977 fail_req_ring: 2978 kfree(*req); 2979 fail_req: 2980 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), 2981 ha->ct_sns, ha->ct_sns_dma); 2982 ha->ct_sns = NULL; 2983 ha->ct_sns_dma = 0; 2984 fail_free_ms_iocb: 2985 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); 2986 ha->ms_iocb = NULL; 2987 ha->ms_iocb_dma = 0; 2988 fail_dma_pool: 2989 if (IS_QLA82XX(ha) || ql2xenabledif) { 2990 dma_pool_destroy(ha->fcp_cmnd_dma_pool); 2991 ha->fcp_cmnd_dma_pool = NULL; 2992 } 2993 fail_dl_dma_pool: 2994 if (IS_QLA82XX(ha) || ql2xenabledif) { 2995 dma_pool_destroy(ha->dl_dma_pool); 2996 ha->dl_dma_pool = NULL; 2997 } 2998 fail_s_dma_pool: 2999 dma_pool_destroy(ha->s_dma_pool); 3000 ha->s_dma_pool = NULL; 3001 fail_free_nvram: 3002 kfree(ha->nvram); 3003 ha->nvram = NULL; 3004 fail_free_ctx_mempool: 3005 mempool_destroy(ha->ctx_mempool); 3006 ha->ctx_mempool = NULL; 3007 fail_free_srb_mempool: 3008 mempool_destroy(ha->srb_mempool); 3009 ha->srb_mempool = NULL; 3010 fail_free_gid_list: 3011 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list, 3012 ha->gid_list_dma); 3013 ha->gid_list = NULL; 3014 ha->gid_list_dma = 0; 3015 fail_free_init_cb: 3016 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb, 3017 ha->init_cb_dma); 3018 ha->init_cb = NULL; 3019 ha->init_cb_dma = 0; 3020 fail: 3021 ql_log(ql_log_fatal, NULL, 0x0030, 3022 "Memory allocation failure.\n"); 3023 return -ENOMEM; 3024 } 3025 3026 /* 3027 * qla2x00_free_fw_dump 3028 * Frees fw dump stuff. 3029 * 3030 * Input: 3031 * ha = adapter block pointer. 3032 */ 3033 static void 3034 qla2x00_free_fw_dump(struct qla_hw_data *ha) 3035 { 3036 if (ha->fce) 3037 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 3038 ha->fce_dma); 3039 3040 if (ha->fw_dump) { 3041 if (ha->eft) 3042 dma_free_coherent(&ha->pdev->dev, 3043 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma); 3044 vfree(ha->fw_dump); 3045 } 3046 ha->fce = NULL; 3047 ha->fce_dma = 0; 3048 ha->eft = NULL; 3049 ha->eft_dma = 0; 3050 ha->fw_dump = NULL; 3051 ha->fw_dumped = 0; 3052 ha->fw_dump_reading = 0; 3053 } 3054 3055 /* 3056 * qla2x00_mem_free 3057 * Frees all adapter allocated memory. 3058 * 3059 * Input: 3060 * ha = adapter block pointer. 3061 */ 3062 static void 3063 qla2x00_mem_free(struct qla_hw_data *ha) 3064 { 3065 qla2x00_free_fw_dump(ha); 3066 3067 if (ha->srb_mempool) 3068 mempool_destroy(ha->srb_mempool); 3069 3070 if (ha->dcbx_tlv) 3071 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE, 3072 ha->dcbx_tlv, ha->dcbx_tlv_dma); 3073 3074 if (ha->xgmac_data) 3075 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE, 3076 ha->xgmac_data, ha->xgmac_data_dma); 3077 3078 if (ha->sns_cmd) 3079 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt), 3080 ha->sns_cmd, ha->sns_cmd_dma); 3081 3082 if (ha->ct_sns) 3083 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), 3084 ha->ct_sns, ha->ct_sns_dma); 3085 3086 if (ha->sfp_data) 3087 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma); 3088 3089 if (ha->edc_data) 3090 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma); 3091 3092 if (ha->ms_iocb) 3093 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); 3094 3095 if (ha->ex_init_cb) 3096 dma_pool_free(ha->s_dma_pool, 3097 ha->ex_init_cb, ha->ex_init_cb_dma); 3098 3099 if (ha->async_pd) 3100 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma); 3101 3102 if (ha->s_dma_pool) 3103 dma_pool_destroy(ha->s_dma_pool); 3104 3105 if (ha->gid_list) 3106 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list, 3107 ha->gid_list_dma); 3108 3109 if (IS_QLA82XX(ha)) { 3110 if (!list_empty(&ha->gbl_dsd_list)) { 3111 struct dsd_dma *dsd_ptr, *tdsd_ptr; 3112 3113 /* clean up allocated prev pool */ 3114 list_for_each_entry_safe(dsd_ptr, 3115 tdsd_ptr, &ha->gbl_dsd_list, list) { 3116 dma_pool_free(ha->dl_dma_pool, 3117 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma); 3118 list_del(&dsd_ptr->list); 3119 kfree(dsd_ptr); 3120 } 3121 } 3122 } 3123 3124 if (ha->dl_dma_pool) 3125 dma_pool_destroy(ha->dl_dma_pool); 3126 3127 if (ha->fcp_cmnd_dma_pool) 3128 dma_pool_destroy(ha->fcp_cmnd_dma_pool); 3129 3130 if (ha->ctx_mempool) 3131 mempool_destroy(ha->ctx_mempool); 3132 3133 if (ha->init_cb) 3134 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, 3135 ha->init_cb, ha->init_cb_dma); 3136 vfree(ha->optrom_buffer); 3137 kfree(ha->nvram); 3138 kfree(ha->npiv_info); 3139 3140 ha->srb_mempool = NULL; 3141 ha->ctx_mempool = NULL; 3142 ha->sns_cmd = NULL; 3143 ha->sns_cmd_dma = 0; 3144 ha->ct_sns = NULL; 3145 ha->ct_sns_dma = 0; 3146 ha->ms_iocb = NULL; 3147 ha->ms_iocb_dma = 0; 3148 ha->init_cb = NULL; 3149 ha->init_cb_dma = 0; 3150 ha->ex_init_cb = NULL; 3151 ha->ex_init_cb_dma = 0; 3152 ha->async_pd = NULL; 3153 ha->async_pd_dma = 0; 3154 3155 ha->s_dma_pool = NULL; 3156 ha->dl_dma_pool = NULL; 3157 ha->fcp_cmnd_dma_pool = NULL; 3158 3159 ha->gid_list = NULL; 3160 ha->gid_list_dma = 0; 3161 } 3162 3163 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht, 3164 struct qla_hw_data *ha) 3165 { 3166 struct Scsi_Host *host; 3167 struct scsi_qla_host *vha = NULL; 3168 3169 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t)); 3170 if (host == NULL) { 3171 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107, 3172 "Failed to allocate host from the scsi layer, aborting.\n"); 3173 goto fail; 3174 } 3175 3176 /* Clear our data area */ 3177 vha = shost_priv(host); 3178 memset(vha, 0, sizeof(scsi_qla_host_t)); 3179 3180 vha->host = host; 3181 vha->host_no = host->host_no; 3182 vha->hw = ha; 3183 3184 INIT_LIST_HEAD(&vha->vp_fcports); 3185 INIT_LIST_HEAD(&vha->work_list); 3186 INIT_LIST_HEAD(&vha->list); 3187 3188 spin_lock_init(&vha->work_lock); 3189 3190 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no); 3191 ql_dbg(ql_dbg_init, vha, 0x0041, 3192 "Allocated the host=%p hw=%p vha=%p dev_name=%s", 3193 vha->host, vha->hw, vha, 3194 dev_name(&(ha->pdev->dev))); 3195 3196 return vha; 3197 3198 fail: 3199 return vha; 3200 } 3201 3202 static struct qla_work_evt * 3203 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type) 3204 { 3205 struct qla_work_evt *e; 3206 uint8_t bail; 3207 3208 QLA_VHA_MARK_BUSY(vha, bail); 3209 if (bail) 3210 return NULL; 3211 3212 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC); 3213 if (!e) { 3214 QLA_VHA_MARK_NOT_BUSY(vha); 3215 return NULL; 3216 } 3217 3218 INIT_LIST_HEAD(&e->list); 3219 e->type = type; 3220 e->flags = QLA_EVT_FLAG_FREE; 3221 return e; 3222 } 3223 3224 static int 3225 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e) 3226 { 3227 unsigned long flags; 3228 3229 spin_lock_irqsave(&vha->work_lock, flags); 3230 list_add_tail(&e->list, &vha->work_list); 3231 spin_unlock_irqrestore(&vha->work_lock, flags); 3232 qla2xxx_wake_dpc(vha); 3233 3234 return QLA_SUCCESS; 3235 } 3236 3237 int 3238 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code, 3239 u32 data) 3240 { 3241 struct qla_work_evt *e; 3242 3243 e = qla2x00_alloc_work(vha, QLA_EVT_AEN); 3244 if (!e) 3245 return QLA_FUNCTION_FAILED; 3246 3247 e->u.aen.code = code; 3248 e->u.aen.data = data; 3249 return qla2x00_post_work(vha, e); 3250 } 3251 3252 int 3253 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb) 3254 { 3255 struct qla_work_evt *e; 3256 3257 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK); 3258 if (!e) 3259 return QLA_FUNCTION_FAILED; 3260 3261 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t)); 3262 return qla2x00_post_work(vha, e); 3263 } 3264 3265 #define qla2x00_post_async_work(name, type) \ 3266 int qla2x00_post_async_##name##_work( \ 3267 struct scsi_qla_host *vha, \ 3268 fc_port_t *fcport, uint16_t *data) \ 3269 { \ 3270 struct qla_work_evt *e; \ 3271 \ 3272 e = qla2x00_alloc_work(vha, type); \ 3273 if (!e) \ 3274 return QLA_FUNCTION_FAILED; \ 3275 \ 3276 e->u.logio.fcport = fcport; \ 3277 if (data) { \ 3278 e->u.logio.data[0] = data[0]; \ 3279 e->u.logio.data[1] = data[1]; \ 3280 } \ 3281 return qla2x00_post_work(vha, e); \ 3282 } 3283 3284 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN); 3285 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE); 3286 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT); 3287 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE); 3288 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC); 3289 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE); 3290 3291 int 3292 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code) 3293 { 3294 struct qla_work_evt *e; 3295 3296 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT); 3297 if (!e) 3298 return QLA_FUNCTION_FAILED; 3299 3300 e->u.uevent.code = code; 3301 return qla2x00_post_work(vha, e); 3302 } 3303 3304 static void 3305 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code) 3306 { 3307 char event_string[40]; 3308 char *envp[] = { event_string, NULL }; 3309 3310 switch (code) { 3311 case QLA_UEVENT_CODE_FW_DUMP: 3312 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld", 3313 vha->host_no); 3314 break; 3315 default: 3316 /* do nothing */ 3317 break; 3318 } 3319 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp); 3320 } 3321 3322 void 3323 qla2x00_do_work(struct scsi_qla_host *vha) 3324 { 3325 struct qla_work_evt *e, *tmp; 3326 unsigned long flags; 3327 LIST_HEAD(work); 3328 3329 spin_lock_irqsave(&vha->work_lock, flags); 3330 list_splice_init(&vha->work_list, &work); 3331 spin_unlock_irqrestore(&vha->work_lock, flags); 3332 3333 list_for_each_entry_safe(e, tmp, &work, list) { 3334 list_del_init(&e->list); 3335 3336 switch (e->type) { 3337 case QLA_EVT_AEN: 3338 fc_host_post_event(vha->host, fc_get_event_number(), 3339 e->u.aen.code, e->u.aen.data); 3340 break; 3341 case QLA_EVT_IDC_ACK: 3342 qla81xx_idc_ack(vha, e->u.idc_ack.mb); 3343 break; 3344 case QLA_EVT_ASYNC_LOGIN: 3345 qla2x00_async_login(vha, e->u.logio.fcport, 3346 e->u.logio.data); 3347 break; 3348 case QLA_EVT_ASYNC_LOGIN_DONE: 3349 qla2x00_async_login_done(vha, e->u.logio.fcport, 3350 e->u.logio.data); 3351 break; 3352 case QLA_EVT_ASYNC_LOGOUT: 3353 qla2x00_async_logout(vha, e->u.logio.fcport); 3354 break; 3355 case QLA_EVT_ASYNC_LOGOUT_DONE: 3356 qla2x00_async_logout_done(vha, e->u.logio.fcport, 3357 e->u.logio.data); 3358 break; 3359 case QLA_EVT_ASYNC_ADISC: 3360 qla2x00_async_adisc(vha, e->u.logio.fcport, 3361 e->u.logio.data); 3362 break; 3363 case QLA_EVT_ASYNC_ADISC_DONE: 3364 qla2x00_async_adisc_done(vha, e->u.logio.fcport, 3365 e->u.logio.data); 3366 break; 3367 case QLA_EVT_UEVENT: 3368 qla2x00_uevent_emit(vha, e->u.uevent.code); 3369 break; 3370 } 3371 if (e->flags & QLA_EVT_FLAG_FREE) 3372 kfree(e); 3373 3374 /* For each work completed decrement vha ref count */ 3375 QLA_VHA_MARK_NOT_BUSY(vha); 3376 } 3377 } 3378 3379 /* Relogins all the fcports of a vport 3380 * Context: dpc thread 3381 */ 3382 void qla2x00_relogin(struct scsi_qla_host *vha) 3383 { 3384 fc_port_t *fcport; 3385 int status; 3386 uint16_t next_loopid = 0; 3387 struct qla_hw_data *ha = vha->hw; 3388 uint16_t data[2]; 3389 3390 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3391 /* 3392 * If the port is not ONLINE then try to login 3393 * to it if we haven't run out of retries. 3394 */ 3395 if (atomic_read(&fcport->state) != FCS_ONLINE && 3396 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) { 3397 fcport->login_retry--; 3398 if (fcport->flags & FCF_FABRIC_DEVICE) { 3399 if (fcport->flags & FCF_FCP2_DEVICE) 3400 ha->isp_ops->fabric_logout(vha, 3401 fcport->loop_id, 3402 fcport->d_id.b.domain, 3403 fcport->d_id.b.area, 3404 fcport->d_id.b.al_pa); 3405 3406 if (fcport->loop_id == FC_NO_LOOP_ID) { 3407 fcport->loop_id = next_loopid = 3408 ha->min_external_loopid; 3409 status = qla2x00_find_new_loop_id( 3410 vha, fcport); 3411 if (status != QLA_SUCCESS) { 3412 /* Ran out of IDs to use */ 3413 break; 3414 } 3415 } 3416 3417 if (IS_ALOGIO_CAPABLE(ha)) { 3418 fcport->flags |= FCF_ASYNC_SENT; 3419 data[0] = 0; 3420 data[1] = QLA_LOGIO_LOGIN_RETRIED; 3421 status = qla2x00_post_async_login_work( 3422 vha, fcport, data); 3423 if (status == QLA_SUCCESS) 3424 continue; 3425 /* Attempt a retry. */ 3426 status = 1; 3427 } else 3428 status = qla2x00_fabric_login(vha, 3429 fcport, &next_loopid); 3430 } else 3431 status = qla2x00_local_device_login(vha, 3432 fcport); 3433 3434 if (status == QLA_SUCCESS) { 3435 fcport->old_loop_id = fcport->loop_id; 3436 3437 ql_dbg(ql_dbg_disc, vha, 0x2003, 3438 "Port login OK: logged in ID 0x%x.\n", 3439 fcport->loop_id); 3440 3441 qla2x00_update_fcport(vha, fcport); 3442 3443 } else if (status == 1) { 3444 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 3445 /* retry the login again */ 3446 ql_dbg(ql_dbg_disc, vha, 0x2007, 3447 "Retrying %d login again loop_id 0x%x.\n", 3448 fcport->login_retry, fcport->loop_id); 3449 } else { 3450 fcport->login_retry = 0; 3451 } 3452 3453 if (fcport->login_retry == 0 && status != QLA_SUCCESS) 3454 fcport->loop_id = FC_NO_LOOP_ID; 3455 } 3456 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3457 break; 3458 } 3459 } 3460 3461 /************************************************************************** 3462 * qla2x00_do_dpc 3463 * This kernel thread is a task that is schedule by the interrupt handler 3464 * to perform the background processing for interrupts. 3465 * 3466 * Notes: 3467 * This task always run in the context of a kernel thread. It 3468 * is kick-off by the driver's detect code and starts up 3469 * up one per adapter. It immediately goes to sleep and waits for 3470 * some fibre event. When either the interrupt handler or 3471 * the timer routine detects a event it will one of the task 3472 * bits then wake us up. 3473 **************************************************************************/ 3474 static int 3475 qla2x00_do_dpc(void *data) 3476 { 3477 int rval; 3478 scsi_qla_host_t *base_vha; 3479 struct qla_hw_data *ha; 3480 3481 ha = (struct qla_hw_data *)data; 3482 base_vha = pci_get_drvdata(ha->pdev); 3483 3484 set_user_nice(current, -20); 3485 3486 set_current_state(TASK_INTERRUPTIBLE); 3487 while (!kthread_should_stop()) { 3488 ql_dbg(ql_dbg_dpc, base_vha, 0x4000, 3489 "DPC handler sleeping.\n"); 3490 3491 schedule(); 3492 __set_current_state(TASK_RUNNING); 3493 3494 ql_dbg(ql_dbg_dpc, base_vha, 0x4001, 3495 "DPC handler waking up.\n"); 3496 ql_dbg(ql_dbg_dpc, base_vha, 0x4002, 3497 "dpc_flags=0x%lx.\n", base_vha->dpc_flags); 3498 3499 /* Initialization not yet finished. Don't do anything yet. */ 3500 if (!base_vha->flags.init_done) 3501 continue; 3502 3503 if (ha->flags.eeh_busy) { 3504 ql_dbg(ql_dbg_dpc, base_vha, 0x4003, 3505 "eeh_busy=%d.\n", ha->flags.eeh_busy); 3506 continue; 3507 } 3508 3509 ha->dpc_active = 1; 3510 3511 if (ha->flags.mbox_busy) { 3512 ha->dpc_active = 0; 3513 continue; 3514 } 3515 3516 qla2x00_do_work(base_vha); 3517 3518 if (IS_QLA82XX(ha)) { 3519 if (test_and_clear_bit(ISP_UNRECOVERABLE, 3520 &base_vha->dpc_flags)) { 3521 qla82xx_idc_lock(ha); 3522 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 3523 QLA82XX_DEV_FAILED); 3524 qla82xx_idc_unlock(ha); 3525 ql_log(ql_log_info, base_vha, 0x4004, 3526 "HW State: FAILED.\n"); 3527 qla82xx_device_state_handler(base_vha); 3528 continue; 3529 } 3530 3531 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED, 3532 &base_vha->dpc_flags)) { 3533 3534 ql_dbg(ql_dbg_dpc, base_vha, 0x4005, 3535 "FCoE context reset scheduled.\n"); 3536 if (!(test_and_set_bit(ABORT_ISP_ACTIVE, 3537 &base_vha->dpc_flags))) { 3538 if (qla82xx_fcoe_ctx_reset(base_vha)) { 3539 /* FCoE-ctx reset failed. 3540 * Escalate to chip-reset 3541 */ 3542 set_bit(ISP_ABORT_NEEDED, 3543 &base_vha->dpc_flags); 3544 } 3545 clear_bit(ABORT_ISP_ACTIVE, 3546 &base_vha->dpc_flags); 3547 } 3548 3549 ql_dbg(ql_dbg_dpc, base_vha, 0x4006, 3550 "FCoE context reset end.\n"); 3551 } 3552 } 3553 3554 if (test_and_clear_bit(ISP_ABORT_NEEDED, 3555 &base_vha->dpc_flags)) { 3556 3557 ql_dbg(ql_dbg_dpc, base_vha, 0x4007, 3558 "ISP abort scheduled.\n"); 3559 if (!(test_and_set_bit(ABORT_ISP_ACTIVE, 3560 &base_vha->dpc_flags))) { 3561 3562 if (ha->isp_ops->abort_isp(base_vha)) { 3563 /* failed. retry later */ 3564 set_bit(ISP_ABORT_NEEDED, 3565 &base_vha->dpc_flags); 3566 } 3567 clear_bit(ABORT_ISP_ACTIVE, 3568 &base_vha->dpc_flags); 3569 } 3570 3571 ql_dbg(ql_dbg_dpc, base_vha, 0x4008, 3572 "ISP abort end.\n"); 3573 } 3574 3575 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) { 3576 qla2x00_update_fcports(base_vha); 3577 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags); 3578 } 3579 3580 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) { 3581 ql_dbg(ql_dbg_dpc, base_vha, 0x4009, 3582 "Quiescence mode scheduled.\n"); 3583 qla82xx_device_state_handler(base_vha); 3584 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags); 3585 if (!ha->flags.quiesce_owner) { 3586 qla2x00_perform_loop_resync(base_vha); 3587 3588 qla82xx_idc_lock(ha); 3589 qla82xx_clear_qsnt_ready(base_vha); 3590 qla82xx_idc_unlock(ha); 3591 } 3592 ql_dbg(ql_dbg_dpc, base_vha, 0x400a, 3593 "Quiescence mode end.\n"); 3594 } 3595 3596 if (test_and_clear_bit(RESET_MARKER_NEEDED, 3597 &base_vha->dpc_flags) && 3598 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) { 3599 3600 ql_dbg(ql_dbg_dpc, base_vha, 0x400b, 3601 "Reset marker scheduled.\n"); 3602 qla2x00_rst_aen(base_vha); 3603 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags); 3604 ql_dbg(ql_dbg_dpc, base_vha, 0x400c, 3605 "Reset marker end.\n"); 3606 } 3607 3608 /* Retry each device up to login retry count */ 3609 if ((test_and_clear_bit(RELOGIN_NEEDED, 3610 &base_vha->dpc_flags)) && 3611 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) && 3612 atomic_read(&base_vha->loop_state) != LOOP_DOWN) { 3613 3614 ql_dbg(ql_dbg_dpc, base_vha, 0x400d, 3615 "Relogin scheduled.\n"); 3616 qla2x00_relogin(base_vha); 3617 ql_dbg(ql_dbg_dpc, base_vha, 0x400e, 3618 "Relogin end.\n"); 3619 } 3620 3621 if (test_and_clear_bit(LOOP_RESYNC_NEEDED, 3622 &base_vha->dpc_flags)) { 3623 3624 ql_dbg(ql_dbg_dpc, base_vha, 0x400f, 3625 "Loop resync scheduled.\n"); 3626 3627 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE, 3628 &base_vha->dpc_flags))) { 3629 3630 rval = qla2x00_loop_resync(base_vha); 3631 3632 clear_bit(LOOP_RESYNC_ACTIVE, 3633 &base_vha->dpc_flags); 3634 } 3635 3636 ql_dbg(ql_dbg_dpc, base_vha, 0x4010, 3637 "Loop resync end.\n"); 3638 } 3639 3640 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) && 3641 atomic_read(&base_vha->loop_state) == LOOP_READY) { 3642 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags); 3643 qla2xxx_flash_npiv_conf(base_vha); 3644 } 3645 3646 if (!ha->interrupts_on) 3647 ha->isp_ops->enable_intrs(ha); 3648 3649 if (test_and_clear_bit(BEACON_BLINK_NEEDED, 3650 &base_vha->dpc_flags)) 3651 ha->isp_ops->beacon_blink(base_vha); 3652 3653 qla2x00_do_dpc_all_vps(base_vha); 3654 3655 ha->dpc_active = 0; 3656 set_current_state(TASK_INTERRUPTIBLE); 3657 } /* End of while(1) */ 3658 __set_current_state(TASK_RUNNING); 3659 3660 ql_dbg(ql_dbg_dpc, base_vha, 0x4011, 3661 "DPC handler exiting.\n"); 3662 3663 /* 3664 * Make sure that nobody tries to wake us up again. 3665 */ 3666 ha->dpc_active = 0; 3667 3668 /* Cleanup any residual CTX SRBs. */ 3669 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); 3670 3671 return 0; 3672 } 3673 3674 void 3675 qla2xxx_wake_dpc(struct scsi_qla_host *vha) 3676 { 3677 struct qla_hw_data *ha = vha->hw; 3678 struct task_struct *t = ha->dpc_thread; 3679 3680 if (!test_bit(UNLOADING, &vha->dpc_flags) && t) 3681 wake_up_process(t); 3682 } 3683 3684 /* 3685 * qla2x00_rst_aen 3686 * Processes asynchronous reset. 3687 * 3688 * Input: 3689 * ha = adapter block pointer. 3690 */ 3691 static void 3692 qla2x00_rst_aen(scsi_qla_host_t *vha) 3693 { 3694 if (vha->flags.online && !vha->flags.reset_active && 3695 !atomic_read(&vha->loop_down_timer) && 3696 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) { 3697 do { 3698 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 3699 3700 /* 3701 * Issue marker command only when we are going to start 3702 * the I/O. 3703 */ 3704 vha->marker_needed = 1; 3705 } while (!atomic_read(&vha->loop_down_timer) && 3706 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags))); 3707 } 3708 } 3709 3710 static void 3711 qla2x00_sp_free_dma(srb_t *sp) 3712 { 3713 struct scsi_cmnd *cmd = sp->cmd; 3714 struct qla_hw_data *ha = sp->fcport->vha->hw; 3715 3716 if (sp->flags & SRB_DMA_VALID) { 3717 scsi_dma_unmap(cmd); 3718 sp->flags &= ~SRB_DMA_VALID; 3719 } 3720 3721 if (sp->flags & SRB_CRC_PROT_DMA_VALID) { 3722 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd), 3723 scsi_prot_sg_count(cmd), cmd->sc_data_direction); 3724 sp->flags &= ~SRB_CRC_PROT_DMA_VALID; 3725 } 3726 3727 if (sp->flags & SRB_CRC_CTX_DSD_VALID) { 3728 /* List assured to be having elements */ 3729 qla2x00_clean_dsd_pool(ha, sp); 3730 sp->flags &= ~SRB_CRC_CTX_DSD_VALID; 3731 } 3732 3733 if (sp->flags & SRB_CRC_CTX_DMA_VALID) { 3734 dma_pool_free(ha->dl_dma_pool, sp->ctx, 3735 ((struct crc_context *)sp->ctx)->crc_ctx_dma); 3736 sp->flags &= ~SRB_CRC_CTX_DMA_VALID; 3737 } 3738 3739 CMD_SP(cmd) = NULL; 3740 } 3741 3742 static void 3743 qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp) 3744 { 3745 struct scsi_cmnd *cmd = sp->cmd; 3746 3747 qla2x00_sp_free_dma(sp); 3748 3749 if (sp->flags & SRB_FCP_CMND_DMA_VALID) { 3750 struct ct6_dsd *ctx = sp->ctx; 3751 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, 3752 ctx->fcp_cmnd_dma); 3753 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list); 3754 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt; 3755 ha->gbl_dsd_avail += ctx->dsd_use_cnt; 3756 mempool_free(sp->ctx, ha->ctx_mempool); 3757 sp->ctx = NULL; 3758 } 3759 3760 mempool_free(sp, ha->srb_mempool); 3761 cmd->scsi_done(cmd); 3762 } 3763 3764 void 3765 qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp) 3766 { 3767 if (atomic_read(&sp->ref_count) == 0) { 3768 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015, 3769 "SP reference-count to ZERO -- sp=%p cmd=%p.\n", 3770 sp, sp->cmd); 3771 if (ql2xextended_error_logging & ql_dbg_io) 3772 BUG(); 3773 return; 3774 } 3775 if (!atomic_dec_and_test(&sp->ref_count)) 3776 return; 3777 qla2x00_sp_final_compl(ha, sp); 3778 } 3779 3780 /************************************************************************** 3781 * qla2x00_timer 3782 * 3783 * Description: 3784 * One second timer 3785 * 3786 * Context: Interrupt 3787 ***************************************************************************/ 3788 void 3789 qla2x00_timer(scsi_qla_host_t *vha) 3790 { 3791 unsigned long cpu_flags = 0; 3792 int start_dpc = 0; 3793 int index; 3794 srb_t *sp; 3795 uint16_t w; 3796 struct qla_hw_data *ha = vha->hw; 3797 struct req_que *req; 3798 3799 if (ha->flags.eeh_busy) { 3800 ql_dbg(ql_dbg_timer, vha, 0x6000, 3801 "EEH = %d, restarting timer.\n", 3802 ha->flags.eeh_busy); 3803 qla2x00_restart_timer(vha, WATCH_INTERVAL); 3804 return; 3805 } 3806 3807 /* Hardware read to raise pending EEH errors during mailbox waits. */ 3808 if (!pci_channel_offline(ha->pdev)) 3809 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); 3810 3811 /* Make sure qla82xx_watchdog is run only for physical port */ 3812 if (!vha->vp_idx && IS_QLA82XX(ha)) { 3813 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags)) 3814 start_dpc++; 3815 qla82xx_watchdog(vha); 3816 } 3817 3818 /* Loop down handler. */ 3819 if (atomic_read(&vha->loop_down_timer) > 0 && 3820 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) && 3821 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags)) 3822 && vha->flags.online) { 3823 3824 if (atomic_read(&vha->loop_down_timer) == 3825 vha->loop_down_abort_time) { 3826 3827 ql_log(ql_log_info, vha, 0x6008, 3828 "Loop down - aborting the queues before time expires.\n"); 3829 3830 if (!IS_QLA2100(ha) && vha->link_down_timeout) 3831 atomic_set(&vha->loop_state, LOOP_DEAD); 3832 3833 /* 3834 * Schedule an ISP abort to return any FCP2-device 3835 * commands. 3836 */ 3837 /* NPIV - scan physical port only */ 3838 if (!vha->vp_idx) { 3839 spin_lock_irqsave(&ha->hardware_lock, 3840 cpu_flags); 3841 req = ha->req_q_map[0]; 3842 for (index = 1; 3843 index < MAX_OUTSTANDING_COMMANDS; 3844 index++) { 3845 fc_port_t *sfcp; 3846 3847 sp = req->outstanding_cmds[index]; 3848 if (!sp) 3849 continue; 3850 if (sp->ctx && !IS_PROT_IO(sp)) 3851 continue; 3852 sfcp = sp->fcport; 3853 if (!(sfcp->flags & FCF_FCP2_DEVICE)) 3854 continue; 3855 3856 if (IS_QLA82XX(ha)) 3857 set_bit(FCOE_CTX_RESET_NEEDED, 3858 &vha->dpc_flags); 3859 else 3860 set_bit(ISP_ABORT_NEEDED, 3861 &vha->dpc_flags); 3862 break; 3863 } 3864 spin_unlock_irqrestore(&ha->hardware_lock, 3865 cpu_flags); 3866 } 3867 start_dpc++; 3868 } 3869 3870 /* if the loop has been down for 4 minutes, reinit adapter */ 3871 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) { 3872 if (!(vha->device_flags & DFLG_NO_CABLE)) { 3873 ql_log(ql_log_warn, vha, 0x6009, 3874 "Loop down - aborting ISP.\n"); 3875 3876 if (IS_QLA82XX(ha)) 3877 set_bit(FCOE_CTX_RESET_NEEDED, 3878 &vha->dpc_flags); 3879 else 3880 set_bit(ISP_ABORT_NEEDED, 3881 &vha->dpc_flags); 3882 } 3883 } 3884 ql_dbg(ql_dbg_timer, vha, 0x600a, 3885 "Loop down - seconds remaining %d.\n", 3886 atomic_read(&vha->loop_down_timer)); 3887 } 3888 3889 /* Check if beacon LED needs to be blinked for physical host only */ 3890 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) { 3891 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags); 3892 start_dpc++; 3893 } 3894 3895 /* Process any deferred work. */ 3896 if (!list_empty(&vha->work_list)) 3897 start_dpc++; 3898 3899 /* Schedule the DPC routine if needed */ 3900 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) || 3901 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) || 3902 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) || 3903 start_dpc || 3904 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) || 3905 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) || 3906 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) || 3907 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) || 3908 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) || 3909 test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) { 3910 ql_dbg(ql_dbg_timer, vha, 0x600b, 3911 "isp_abort_needed=%d loop_resync_needed=%d " 3912 "fcport_update_needed=%d start_dpc=%d " 3913 "reset_marker_needed=%d", 3914 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags), 3915 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags), 3916 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags), 3917 start_dpc, 3918 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)); 3919 ql_dbg(ql_dbg_timer, vha, 0x600c, 3920 "beacon_blink_needed=%d isp_unrecoverable=%d " 3921 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d " 3922 "relogin_needed=%d.\n", 3923 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags), 3924 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags), 3925 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags), 3926 test_bit(VP_DPC_NEEDED, &vha->dpc_flags), 3927 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)); 3928 qla2xxx_wake_dpc(vha); 3929 } 3930 3931 qla2x00_restart_timer(vha, WATCH_INTERVAL); 3932 } 3933 3934 /* Firmware interface routines. */ 3935 3936 #define FW_BLOBS 8 3937 #define FW_ISP21XX 0 3938 #define FW_ISP22XX 1 3939 #define FW_ISP2300 2 3940 #define FW_ISP2322 3 3941 #define FW_ISP24XX 4 3942 #define FW_ISP25XX 5 3943 #define FW_ISP81XX 6 3944 #define FW_ISP82XX 7 3945 3946 #define FW_FILE_ISP21XX "ql2100_fw.bin" 3947 #define FW_FILE_ISP22XX "ql2200_fw.bin" 3948 #define FW_FILE_ISP2300 "ql2300_fw.bin" 3949 #define FW_FILE_ISP2322 "ql2322_fw.bin" 3950 #define FW_FILE_ISP24XX "ql2400_fw.bin" 3951 #define FW_FILE_ISP25XX "ql2500_fw.bin" 3952 #define FW_FILE_ISP81XX "ql8100_fw.bin" 3953 #define FW_FILE_ISP82XX "ql8200_fw.bin" 3954 3955 static DEFINE_MUTEX(qla_fw_lock); 3956 3957 static struct fw_blob qla_fw_blobs[FW_BLOBS] = { 3958 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, }, 3959 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, }, 3960 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, }, 3961 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, }, 3962 { .name = FW_FILE_ISP24XX, }, 3963 { .name = FW_FILE_ISP25XX, }, 3964 { .name = FW_FILE_ISP81XX, }, 3965 { .name = FW_FILE_ISP82XX, }, 3966 }; 3967 3968 struct fw_blob * 3969 qla2x00_request_firmware(scsi_qla_host_t *vha) 3970 { 3971 struct qla_hw_data *ha = vha->hw; 3972 struct fw_blob *blob; 3973 3974 blob = NULL; 3975 if (IS_QLA2100(ha)) { 3976 blob = &qla_fw_blobs[FW_ISP21XX]; 3977 } else if (IS_QLA2200(ha)) { 3978 blob = &qla_fw_blobs[FW_ISP22XX]; 3979 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3980 blob = &qla_fw_blobs[FW_ISP2300]; 3981 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) { 3982 blob = &qla_fw_blobs[FW_ISP2322]; 3983 } else if (IS_QLA24XX_TYPE(ha)) { 3984 blob = &qla_fw_blobs[FW_ISP24XX]; 3985 } else if (IS_QLA25XX(ha)) { 3986 blob = &qla_fw_blobs[FW_ISP25XX]; 3987 } else if (IS_QLA81XX(ha)) { 3988 blob = &qla_fw_blobs[FW_ISP81XX]; 3989 } else if (IS_QLA82XX(ha)) { 3990 blob = &qla_fw_blobs[FW_ISP82XX]; 3991 } 3992 3993 mutex_lock(&qla_fw_lock); 3994 if (blob->fw) 3995 goto out; 3996 3997 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) { 3998 ql_log(ql_log_warn, vha, 0x0063, 3999 "Failed to load firmware image (%s).\n", blob->name); 4000 blob->fw = NULL; 4001 blob = NULL; 4002 goto out; 4003 } 4004 4005 out: 4006 mutex_unlock(&qla_fw_lock); 4007 return blob; 4008 } 4009 4010 static void 4011 qla2x00_release_firmware(void) 4012 { 4013 int idx; 4014 4015 mutex_lock(&qla_fw_lock); 4016 for (idx = 0; idx < FW_BLOBS; idx++) 4017 if (qla_fw_blobs[idx].fw) 4018 release_firmware(qla_fw_blobs[idx].fw); 4019 mutex_unlock(&qla_fw_lock); 4020 } 4021 4022 static pci_ers_result_t 4023 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 4024 { 4025 scsi_qla_host_t *vha = pci_get_drvdata(pdev); 4026 struct qla_hw_data *ha = vha->hw; 4027 4028 ql_dbg(ql_dbg_aer, vha, 0x9000, 4029 "PCI error detected, state %x.\n", state); 4030 4031 switch (state) { 4032 case pci_channel_io_normal: 4033 ha->flags.eeh_busy = 0; 4034 return PCI_ERS_RESULT_CAN_RECOVER; 4035 case pci_channel_io_frozen: 4036 ha->flags.eeh_busy = 1; 4037 /* For ISP82XX complete any pending mailbox cmd */ 4038 if (IS_QLA82XX(ha)) { 4039 ha->flags.isp82xx_fw_hung = 1; 4040 if (ha->flags.mbox_busy) { 4041 ha->flags.mbox_int = 1; 4042 ql_dbg(ql_dbg_aer, vha, 0x9001, 4043 "Due to pci channel io frozen, doing premature " 4044 "completion of mbx command.\n"); 4045 complete(&ha->mbx_intr_comp); 4046 } 4047 } 4048 qla2x00_free_irqs(vha); 4049 pci_disable_device(pdev); 4050 /* Return back all IOs */ 4051 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 4052 return PCI_ERS_RESULT_NEED_RESET; 4053 case pci_channel_io_perm_failure: 4054 ha->flags.pci_channel_io_perm_failure = 1; 4055 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16); 4056 return PCI_ERS_RESULT_DISCONNECT; 4057 } 4058 return PCI_ERS_RESULT_NEED_RESET; 4059 } 4060 4061 static pci_ers_result_t 4062 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev) 4063 { 4064 int risc_paused = 0; 4065 uint32_t stat; 4066 unsigned long flags; 4067 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); 4068 struct qla_hw_data *ha = base_vha->hw; 4069 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4070 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; 4071 4072 if (IS_QLA82XX(ha)) 4073 return PCI_ERS_RESULT_RECOVERED; 4074 4075 spin_lock_irqsave(&ha->hardware_lock, flags); 4076 if (IS_QLA2100(ha) || IS_QLA2200(ha)){ 4077 stat = RD_REG_DWORD(®->hccr); 4078 if (stat & HCCR_RISC_PAUSE) 4079 risc_paused = 1; 4080 } else if (IS_QLA23XX(ha)) { 4081 stat = RD_REG_DWORD(®->u.isp2300.host_status); 4082 if (stat & HSR_RISC_PAUSED) 4083 risc_paused = 1; 4084 } else if (IS_FWI2_CAPABLE(ha)) { 4085 stat = RD_REG_DWORD(®24->host_status); 4086 if (stat & HSRX_RISC_PAUSED) 4087 risc_paused = 1; 4088 } 4089 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4090 4091 if (risc_paused) { 4092 ql_log(ql_log_info, base_vha, 0x9003, 4093 "RISC paused -- mmio_enabled, Dumping firmware.\n"); 4094 ha->isp_ops->fw_dump(base_vha, 0); 4095 4096 return PCI_ERS_RESULT_NEED_RESET; 4097 } else 4098 return PCI_ERS_RESULT_RECOVERED; 4099 } 4100 4101 uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha) 4102 { 4103 uint32_t rval = QLA_FUNCTION_FAILED; 4104 uint32_t drv_active = 0; 4105 struct qla_hw_data *ha = base_vha->hw; 4106 int fn; 4107 struct pci_dev *other_pdev = NULL; 4108 4109 ql_dbg(ql_dbg_aer, base_vha, 0x9006, 4110 "Entered %s.\n", __func__); 4111 4112 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 4113 4114 if (base_vha->flags.online) { 4115 /* Abort all outstanding commands, 4116 * so as to be requeued later */ 4117 qla2x00_abort_isp_cleanup(base_vha); 4118 } 4119 4120 4121 fn = PCI_FUNC(ha->pdev->devfn); 4122 while (fn > 0) { 4123 fn--; 4124 ql_dbg(ql_dbg_aer, base_vha, 0x9007, 4125 "Finding pci device at function = 0x%x.\n", fn); 4126 other_pdev = 4127 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus), 4128 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn), 4129 fn)); 4130 4131 if (!other_pdev) 4132 continue; 4133 if (atomic_read(&other_pdev->enable_cnt)) { 4134 ql_dbg(ql_dbg_aer, base_vha, 0x9008, 4135 "Found PCI func available and enable at 0x%x.\n", 4136 fn); 4137 pci_dev_put(other_pdev); 4138 break; 4139 } 4140 pci_dev_put(other_pdev); 4141 } 4142 4143 if (!fn) { 4144 /* Reset owner */ 4145 ql_dbg(ql_dbg_aer, base_vha, 0x9009, 4146 "This devfn is reset owner = 0x%x.\n", 4147 ha->pdev->devfn); 4148 qla82xx_idc_lock(ha); 4149 4150 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 4151 QLA82XX_DEV_INITIALIZING); 4152 4153 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, 4154 QLA82XX_IDC_VERSION); 4155 4156 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); 4157 ql_dbg(ql_dbg_aer, base_vha, 0x900a, 4158 "drv_active = 0x%x.\n", drv_active); 4159 4160 qla82xx_idc_unlock(ha); 4161 /* Reset if device is not already reset 4162 * drv_active would be 0 if a reset has already been done 4163 */ 4164 if (drv_active) 4165 rval = qla82xx_start_firmware(base_vha); 4166 else 4167 rval = QLA_SUCCESS; 4168 qla82xx_idc_lock(ha); 4169 4170 if (rval != QLA_SUCCESS) { 4171 ql_log(ql_log_info, base_vha, 0x900b, 4172 "HW State: FAILED.\n"); 4173 qla82xx_clear_drv_active(ha); 4174 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 4175 QLA82XX_DEV_FAILED); 4176 } else { 4177 ql_log(ql_log_info, base_vha, 0x900c, 4178 "HW State: READY.\n"); 4179 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, 4180 QLA82XX_DEV_READY); 4181 qla82xx_idc_unlock(ha); 4182 ha->flags.isp82xx_fw_hung = 0; 4183 rval = qla82xx_restart_isp(base_vha); 4184 qla82xx_idc_lock(ha); 4185 /* Clear driver state register */ 4186 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0); 4187 qla82xx_set_drv_active(base_vha); 4188 } 4189 qla82xx_idc_unlock(ha); 4190 } else { 4191 ql_dbg(ql_dbg_aer, base_vha, 0x900d, 4192 "This devfn is not reset owner = 0x%x.\n", 4193 ha->pdev->devfn); 4194 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == 4195 QLA82XX_DEV_READY)) { 4196 ha->flags.isp82xx_fw_hung = 0; 4197 rval = qla82xx_restart_isp(base_vha); 4198 qla82xx_idc_lock(ha); 4199 qla82xx_set_drv_active(base_vha); 4200 qla82xx_idc_unlock(ha); 4201 } 4202 } 4203 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 4204 4205 return rval; 4206 } 4207 4208 static pci_ers_result_t 4209 qla2xxx_pci_slot_reset(struct pci_dev *pdev) 4210 { 4211 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT; 4212 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); 4213 struct qla_hw_data *ha = base_vha->hw; 4214 struct rsp_que *rsp; 4215 int rc, retries = 10; 4216 4217 ql_dbg(ql_dbg_aer, base_vha, 0x9004, 4218 "Slot Reset.\n"); 4219 4220 /* Workaround: qla2xxx driver which access hardware earlier 4221 * needs error state to be pci_channel_io_online. 4222 * Otherwise mailbox command timesout. 4223 */ 4224 pdev->error_state = pci_channel_io_normal; 4225 4226 pci_restore_state(pdev); 4227 4228 /* pci_restore_state() clears the saved_state flag of the device 4229 * save restored state which resets saved_state flag 4230 */ 4231 pci_save_state(pdev); 4232 4233 if (ha->mem_only) 4234 rc = pci_enable_device_mem(pdev); 4235 else 4236 rc = pci_enable_device(pdev); 4237 4238 if (rc) { 4239 ql_log(ql_log_warn, base_vha, 0x9005, 4240 "Can't re-enable PCI device after reset.\n"); 4241 goto exit_slot_reset; 4242 } 4243 4244 rsp = ha->rsp_q_map[0]; 4245 if (qla2x00_request_irqs(ha, rsp)) 4246 goto exit_slot_reset; 4247 4248 if (ha->isp_ops->pci_config(base_vha)) 4249 goto exit_slot_reset; 4250 4251 if (IS_QLA82XX(ha)) { 4252 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) { 4253 ret = PCI_ERS_RESULT_RECOVERED; 4254 goto exit_slot_reset; 4255 } else 4256 goto exit_slot_reset; 4257 } 4258 4259 while (ha->flags.mbox_busy && retries--) 4260 msleep(1000); 4261 4262 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 4263 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS) 4264 ret = PCI_ERS_RESULT_RECOVERED; 4265 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 4266 4267 4268 exit_slot_reset: 4269 ql_dbg(ql_dbg_aer, base_vha, 0x900e, 4270 "slot_reset return %x.\n", ret); 4271 4272 return ret; 4273 } 4274 4275 static void 4276 qla2xxx_pci_resume(struct pci_dev *pdev) 4277 { 4278 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); 4279 struct qla_hw_data *ha = base_vha->hw; 4280 int ret; 4281 4282 ql_dbg(ql_dbg_aer, base_vha, 0x900f, 4283 "pci_resume.\n"); 4284 4285 ret = qla2x00_wait_for_hba_online(base_vha); 4286 if (ret != QLA_SUCCESS) { 4287 ql_log(ql_log_fatal, base_vha, 0x9002, 4288 "The device failed to resume I/O from slot/link_reset.\n"); 4289 } 4290 4291 pci_cleanup_aer_uncorrect_error_status(pdev); 4292 4293 ha->flags.eeh_busy = 0; 4294 } 4295 4296 static struct pci_error_handlers qla2xxx_err_handler = { 4297 .error_detected = qla2xxx_pci_error_detected, 4298 .mmio_enabled = qla2xxx_pci_mmio_enabled, 4299 .slot_reset = qla2xxx_pci_slot_reset, 4300 .resume = qla2xxx_pci_resume, 4301 }; 4302 4303 static struct pci_device_id qla2xxx_pci_tbl[] = { 4304 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) }, 4305 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) }, 4306 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) }, 4307 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) }, 4308 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) }, 4309 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) }, 4310 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) }, 4311 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) }, 4312 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) }, 4313 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) }, 4314 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) }, 4315 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) }, 4316 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) }, 4317 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) }, 4318 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) }, 4319 { 0 }, 4320 }; 4321 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl); 4322 4323 static struct pci_driver qla2xxx_pci_driver = { 4324 .name = QLA2XXX_DRIVER_NAME, 4325 .driver = { 4326 .owner = THIS_MODULE, 4327 }, 4328 .id_table = qla2xxx_pci_tbl, 4329 .probe = qla2x00_probe_one, 4330 .remove = qla2x00_remove_one, 4331 .shutdown = qla2x00_shutdown, 4332 .err_handler = &qla2xxx_err_handler, 4333 }; 4334 4335 static struct file_operations apidev_fops = { 4336 .owner = THIS_MODULE, 4337 .llseek = noop_llseek, 4338 }; 4339 4340 /** 4341 * qla2x00_module_init - Module initialization. 4342 **/ 4343 static int __init 4344 qla2x00_module_init(void) 4345 { 4346 int ret = 0; 4347 4348 /* Allocate cache for SRBs. */ 4349 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0, 4350 SLAB_HWCACHE_ALIGN, NULL); 4351 if (srb_cachep == NULL) { 4352 ql_log(ql_log_fatal, NULL, 0x0001, 4353 "Unable to allocate SRB cache...Failing load!.\n"); 4354 return -ENOMEM; 4355 } 4356 4357 /* Derive version string. */ 4358 strcpy(qla2x00_version_str, QLA2XXX_VERSION); 4359 if (ql2xextended_error_logging) 4360 strcat(qla2x00_version_str, "-debug"); 4361 4362 qla2xxx_transport_template = 4363 fc_attach_transport(&qla2xxx_transport_functions); 4364 if (!qla2xxx_transport_template) { 4365 kmem_cache_destroy(srb_cachep); 4366 ql_log(ql_log_fatal, NULL, 0x0002, 4367 "fc_attach_transport failed...Failing load!.\n"); 4368 return -ENODEV; 4369 } 4370 4371 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops); 4372 if (apidev_major < 0) { 4373 ql_log(ql_log_fatal, NULL, 0x0003, 4374 "Unable to register char device %s.\n", QLA2XXX_APIDEV); 4375 } 4376 4377 qla2xxx_transport_vport_template = 4378 fc_attach_transport(&qla2xxx_transport_vport_functions); 4379 if (!qla2xxx_transport_vport_template) { 4380 kmem_cache_destroy(srb_cachep); 4381 fc_release_transport(qla2xxx_transport_template); 4382 ql_log(ql_log_fatal, NULL, 0x0004, 4383 "fc_attach_transport vport failed...Failing load!.\n"); 4384 return -ENODEV; 4385 } 4386 ql_log(ql_log_info, NULL, 0x0005, 4387 "QLogic Fibre Channel HBA Driver: %s.\n", 4388 qla2x00_version_str); 4389 ret = pci_register_driver(&qla2xxx_pci_driver); 4390 if (ret) { 4391 kmem_cache_destroy(srb_cachep); 4392 fc_release_transport(qla2xxx_transport_template); 4393 fc_release_transport(qla2xxx_transport_vport_template); 4394 ql_log(ql_log_fatal, NULL, 0x0006, 4395 "pci_register_driver failed...ret=%d Failing load!.\n", 4396 ret); 4397 } 4398 return ret; 4399 } 4400 4401 /** 4402 * qla2x00_module_exit - Module cleanup. 4403 **/ 4404 static void __exit 4405 qla2x00_module_exit(void) 4406 { 4407 unregister_chrdev(apidev_major, QLA2XXX_APIDEV); 4408 pci_unregister_driver(&qla2xxx_pci_driver); 4409 qla2x00_release_firmware(); 4410 kmem_cache_destroy(srb_cachep); 4411 if (ctx_cachep) 4412 kmem_cache_destroy(ctx_cachep); 4413 fc_release_transport(qla2xxx_transport_template); 4414 fc_release_transport(qla2xxx_transport_vport_template); 4415 } 4416 4417 module_init(qla2x00_module_init); 4418 module_exit(qla2x00_module_exit); 4419 4420 MODULE_AUTHOR("QLogic Corporation"); 4421 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver"); 4422 MODULE_LICENSE("GPL"); 4423 MODULE_VERSION(QLA2XXX_VERSION); 4424 MODULE_FIRMWARE(FW_FILE_ISP21XX); 4425 MODULE_FIRMWARE(FW_FILE_ISP22XX); 4426 MODULE_FIRMWARE(FW_FILE_ISP2300); 4427 MODULE_FIRMWARE(FW_FILE_ISP2322); 4428 MODULE_FIRMWARE(FW_FILE_ISP24XX); 4429 MODULE_FIRMWARE(FW_FILE_ISP25XX); 4430