1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2013 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include <linux/delay.h> 9 #include <linux/pci.h> 10 #include <linux/ratelimit.h> 11 #include <linux/vmalloc.h> 12 #include <scsi/scsi_tcq.h> 13 #include <linux/utsname.h> 14 15 16 /* QLAFX00 specific Mailbox implementation functions */ 17 18 /* 19 * qlafx00_mailbox_command 20 * Issue mailbox command and waits for completion. 21 * 22 * Input: 23 * ha = adapter block pointer. 24 * mcp = driver internal mbx struct pointer. 25 * 26 * Output: 27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data. 28 * 29 * Returns: 30 * 0 : QLA_SUCCESS = cmd performed success 31 * 1 : QLA_FUNCTION_FAILED (error encountered) 32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered) 33 * 34 * Context: 35 * Kernel context. 36 */ 37 static int 38 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp) 39 40 { 41 int rval; 42 unsigned long flags = 0; 43 device_reg_t __iomem *reg; 44 uint8_t abort_active; 45 uint8_t io_lock_on; 46 uint16_t command = 0; 47 uint32_t *iptr; 48 uint32_t __iomem *optr; 49 uint32_t cnt; 50 uint32_t mboxes; 51 unsigned long wait_time; 52 struct qla_hw_data *ha = vha->hw; 53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 54 55 if (ha->pdev->error_state > pci_channel_io_frozen) { 56 ql_log(ql_log_warn, vha, 0x115c, 57 "error_state is greater than pci_channel_io_frozen, " 58 "exiting.\n"); 59 return QLA_FUNCTION_TIMEOUT; 60 } 61 62 if (vha->device_flags & DFLG_DEV_FAILED) { 63 ql_log(ql_log_warn, vha, 0x115f, 64 "Device in failed state, exiting.\n"); 65 return QLA_FUNCTION_TIMEOUT; 66 } 67 68 reg = ha->iobase; 69 io_lock_on = base_vha->flags.init_done; 70 71 rval = QLA_SUCCESS; 72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 73 74 if (ha->flags.pci_channel_io_perm_failure) { 75 ql_log(ql_log_warn, vha, 0x1175, 76 "Perm failure on EEH timeout MBX, exiting.\n"); 77 return QLA_FUNCTION_TIMEOUT; 78 } 79 80 if (ha->flags.isp82xx_fw_hung) { 81 /* Setting Link-Down error */ 82 mcp->mb[0] = MBS_LINK_DOWN_ERROR; 83 ql_log(ql_log_warn, vha, 0x1176, 84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); 85 rval = QLA_FUNCTION_FAILED; 86 goto premature_exit; 87 } 88 89 /* 90 * Wait for active mailbox commands to finish by waiting at most tov 91 * seconds. This is to serialize actual issuing of mailbox cmds during 92 * non ISP abort time. 93 */ 94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { 95 /* Timeout occurred. Return error. */ 96 ql_log(ql_log_warn, vha, 0x1177, 97 "Cmd access timeout, cmd=0x%x, Exiting.\n", 98 mcp->mb[0]); 99 return QLA_FUNCTION_TIMEOUT; 100 } 101 102 ha->flags.mbox_busy = 1; 103 /* Save mailbox command for debug */ 104 ha->mcp32 = mcp; 105 106 ql_dbg(ql_dbg_mbx, vha, 0x1178, 107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); 108 109 spin_lock_irqsave(&ha->hardware_lock, flags); 110 111 /* Load mailbox registers. */ 112 optr = (uint32_t __iomem *)®->ispfx00.mailbox0; 113 114 iptr = mcp->mb; 115 command = mcp->mb[0]; 116 mboxes = mcp->out_mb; 117 118 for (cnt = 0; cnt < ha->mbx_count; cnt++) { 119 if (mboxes & BIT_0) 120 WRT_REG_DWORD(optr, *iptr); 121 122 mboxes >>= 1; 123 optr++; 124 iptr++; 125 } 126 127 /* Issue set host interrupt command to send cmd out. */ 128 ha->flags.mbox_int = 0; 129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); 130 131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172, 132 (uint8_t *)mcp->mb, 16); 133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173, 134 ((uint8_t *)mcp->mb + 0x10), 16); 135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174, 136 ((uint8_t *)mcp->mb + 0x20), 8); 137 138 /* Unlock mbx registers and wait for interrupt */ 139 ql_dbg(ql_dbg_mbx, vha, 0x1179, 140 "Going to unlock irq & waiting for interrupts. " 141 "jiffies=%lx.\n", jiffies); 142 143 /* Wait for mbx cmd completion until timeout */ 144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { 145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 146 147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); 148 spin_unlock_irqrestore(&ha->hardware_lock, flags); 149 150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ); 151 } else { 152 ql_dbg(ql_dbg_mbx, vha, 0x112c, 153 "Cmd=%x Polling Mode.\n", command); 154 155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); 156 spin_unlock_irqrestore(&ha->hardware_lock, flags); 157 158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */ 159 while (!ha->flags.mbox_int) { 160 if (time_after(jiffies, wait_time)) 161 break; 162 163 /* Check for pending interrupts. */ 164 qla2x00_poll(ha->rsp_q_map[0]); 165 166 if (!ha->flags.mbox_int && 167 !(IS_QLA2200(ha) && 168 command == MBC_LOAD_RISC_RAM_EXTENDED)) 169 usleep_range(10000, 11000); 170 } /* while */ 171 ql_dbg(ql_dbg_mbx, vha, 0x112d, 172 "Waited %d sec.\n", 173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)); 174 } 175 176 /* Check whether we timed out */ 177 if (ha->flags.mbox_int) { 178 uint32_t *iptr2; 179 180 ql_dbg(ql_dbg_mbx, vha, 0x112e, 181 "Cmd=%x completed.\n", command); 182 183 /* Got interrupt. Clear the flag. */ 184 ha->flags.mbox_int = 0; 185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); 186 187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE) 188 rval = QLA_FUNCTION_FAILED; 189 190 /* Load return mailbox registers. */ 191 iptr2 = mcp->mb; 192 iptr = (uint32_t *)&ha->mailbox_out32[0]; 193 mboxes = mcp->in_mb; 194 for (cnt = 0; cnt < ha->mbx_count; cnt++) { 195 if (mboxes & BIT_0) 196 *iptr2 = *iptr; 197 198 mboxes >>= 1; 199 iptr2++; 200 iptr++; 201 } 202 } else { 203 204 rval = QLA_FUNCTION_TIMEOUT; 205 } 206 207 ha->flags.mbox_busy = 0; 208 209 /* Clean up */ 210 ha->mcp32 = NULL; 211 212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) { 213 ql_dbg(ql_dbg_mbx, vha, 0x113a, 214 "checking for additional resp interrupt.\n"); 215 216 /* polling mode for non isp_abort commands. */ 217 qla2x00_poll(ha->rsp_q_map[0]); 218 } 219 220 if (rval == QLA_FUNCTION_TIMEOUT && 221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) { 222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) || 223 ha->flags.eeh_busy) { 224 /* not in dpc. schedule it for dpc to take over. */ 225 ql_dbg(ql_dbg_mbx, vha, 0x115d, 226 "Timeout, schedule isp_abort_needed.\n"); 227 228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && 229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && 230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 231 232 ql_log(ql_log_info, base_vha, 0x115e, 233 "Mailbox cmd timeout occurred, cmd=0x%x, " 234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP " 235 "abort.\n", command, mcp->mb[0], 236 ha->flags.eeh_busy); 237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 238 qla2xxx_wake_dpc(vha); 239 } 240 } else if (!abort_active) { 241 /* call abort directly since we are in the DPC thread */ 242 ql_dbg(ql_dbg_mbx, vha, 0x1160, 243 "Timeout, calling abort_isp.\n"); 244 245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && 246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && 247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 248 249 ql_log(ql_log_info, base_vha, 0x1161, 250 "Mailbox cmd timeout occurred, cmd=0x%x, " 251 "mb[0]=0x%x. Scheduling ISP abort ", 252 command, mcp->mb[0]); 253 254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); 255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 256 if (ha->isp_ops->abort_isp(vha)) { 257 /* Failed. retry later. */ 258 set_bit(ISP_ABORT_NEEDED, 259 &vha->dpc_flags); 260 } 261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); 262 ql_dbg(ql_dbg_mbx, vha, 0x1162, 263 "Finished abort_isp.\n"); 264 } 265 } 266 } 267 268 premature_exit: 269 /* Allow next mbx cmd to come in. */ 270 complete(&ha->mbx_cmd_comp); 271 272 if (rval) { 273 ql_log(ql_log_warn, base_vha, 0x1163, 274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, " 275 "mb[3]=%x, cmd=%x ****.\n", 276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command); 277 } else { 278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__); 279 } 280 281 return rval; 282 } 283 284 /* 285 * qlafx00_driver_shutdown 286 * Indicate a driver shutdown to firmware. 287 * 288 * Input: 289 * ha = adapter block pointer. 290 * 291 * Returns: 292 * local function return status code. 293 * 294 * Context: 295 * Kernel context. 296 */ 297 int 298 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo) 299 { 300 int rval; 301 struct mbx_cmd_32 mc; 302 struct mbx_cmd_32 *mcp = &mc; 303 304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166, 305 "Entered %s.\n", __func__); 306 307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN; 308 mcp->out_mb = MBX_0; 309 mcp->in_mb = MBX_0; 310 if (tmo) 311 mcp->tov = tmo; 312 else 313 mcp->tov = MBX_TOV_SECONDS; 314 mcp->flags = 0; 315 rval = qlafx00_mailbox_command(vha, mcp); 316 317 if (rval != QLA_SUCCESS) { 318 ql_dbg(ql_dbg_mbx, vha, 0x1167, 319 "Failed=%x.\n", rval); 320 } else { 321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168, 322 "Done %s.\n", __func__); 323 } 324 325 return rval; 326 } 327 328 /* 329 * qlafx00_get_firmware_state 330 * Get adapter firmware state. 331 * 332 * Input: 333 * ha = adapter block pointer. 334 * TARGET_QUEUE_LOCK must be released. 335 * ADAPTER_STATE_LOCK must be released. 336 * 337 * Returns: 338 * qla7xxx local function return status code. 339 * 340 * Context: 341 * Kernel context. 342 */ 343 static int 344 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states) 345 { 346 int rval; 347 struct mbx_cmd_32 mc; 348 struct mbx_cmd_32 *mcp = &mc; 349 350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169, 351 "Entered %s.\n", __func__); 352 353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE; 354 mcp->out_mb = MBX_0; 355 mcp->in_mb = MBX_1|MBX_0; 356 mcp->tov = MBX_TOV_SECONDS; 357 mcp->flags = 0; 358 rval = qlafx00_mailbox_command(vha, mcp); 359 360 /* Return firmware states. */ 361 states[0] = mcp->mb[1]; 362 363 if (rval != QLA_SUCCESS) { 364 ql_dbg(ql_dbg_mbx, vha, 0x116a, 365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 366 } else { 367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b, 368 "Done %s.\n", __func__); 369 } 370 return rval; 371 } 372 373 /* 374 * qlafx00_init_firmware 375 * Initialize adapter firmware. 376 * 377 * Input: 378 * ha = adapter block pointer. 379 * dptr = Initialization control block pointer. 380 * size = size of initialization control block. 381 * TARGET_QUEUE_LOCK must be released. 382 * ADAPTER_STATE_LOCK must be released. 383 * 384 * Returns: 385 * qlafx00 local function return status code. 386 * 387 * Context: 388 * Kernel context. 389 */ 390 int 391 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size) 392 { 393 int rval; 394 struct mbx_cmd_32 mc; 395 struct mbx_cmd_32 *mcp = &mc; 396 struct qla_hw_data *ha = vha->hw; 397 398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c, 399 "Entered %s.\n", __func__); 400 401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE; 402 403 mcp->mb[1] = 0; 404 mcp->mb[2] = MSD(ha->init_cb_dma); 405 mcp->mb[3] = LSD(ha->init_cb_dma); 406 407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; 408 mcp->in_mb = MBX_0; 409 mcp->buf_size = size; 410 mcp->flags = MBX_DMA_OUT; 411 mcp->tov = MBX_TOV_SECONDS; 412 rval = qlafx00_mailbox_command(vha, mcp); 413 414 if (rval != QLA_SUCCESS) { 415 ql_dbg(ql_dbg_mbx, vha, 0x116d, 416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 417 } else { 418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e, 419 "Done %s.\n", __func__); 420 } 421 return rval; 422 } 423 424 /* 425 * qlafx00_mbx_reg_test 426 */ 427 static int 428 qlafx00_mbx_reg_test(scsi_qla_host_t *vha) 429 { 430 int rval; 431 struct mbx_cmd_32 mc; 432 struct mbx_cmd_32 *mcp = &mc; 433 434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f, 435 "Entered %s.\n", __func__); 436 437 438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST; 439 mcp->mb[1] = 0xAAAA; 440 mcp->mb[2] = 0x5555; 441 mcp->mb[3] = 0xAA55; 442 mcp->mb[4] = 0x55AA; 443 mcp->mb[5] = 0xA5A5; 444 mcp->mb[6] = 0x5A5A; 445 mcp->mb[7] = 0x2525; 446 mcp->mb[8] = 0xBBBB; 447 mcp->mb[9] = 0x6666; 448 mcp->mb[10] = 0xBB66; 449 mcp->mb[11] = 0x66BB; 450 mcp->mb[12] = 0xB6B6; 451 mcp->mb[13] = 0x6B6B; 452 mcp->mb[14] = 0x3636; 453 mcp->mb[15] = 0xCCCC; 454 455 456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| 457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; 458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| 459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; 460 mcp->buf_size = 0; 461 mcp->flags = MBX_DMA_OUT; 462 mcp->tov = MBX_TOV_SECONDS; 463 rval = qlafx00_mailbox_command(vha, mcp); 464 if (rval == QLA_SUCCESS) { 465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 || 466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA) 467 rval = QLA_FUNCTION_FAILED; 468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A || 469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB) 470 rval = QLA_FUNCTION_FAILED; 471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 || 472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6) 473 rval = QLA_FUNCTION_FAILED; 474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 || 475 mcp->mb[31] != 0xCCCC) 476 rval = QLA_FUNCTION_FAILED; 477 } 478 479 if (rval != QLA_SUCCESS) { 480 ql_dbg(ql_dbg_mbx, vha, 0x1170, 481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 482 } else { 483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171, 484 "Done %s.\n", __func__); 485 } 486 return rval; 487 } 488 489 /** 490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers. 491 * @ha: HA context 492 * 493 * Returns 0 on success. 494 */ 495 int 496 qlafx00_pci_config(scsi_qla_host_t *vha) 497 { 498 uint16_t w; 499 struct qla_hw_data *ha = vha->hw; 500 501 pci_set_master(ha->pdev); 502 pci_try_set_mwi(ha->pdev); 503 504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 506 w &= ~PCI_COMMAND_INTX_DISABLE; 507 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 508 509 /* PCIe -- adjust Maximum Read Request Size (2048). */ 510 if (pci_is_pcie(ha->pdev)) 511 pcie_set_readrq(ha->pdev, 2048); 512 513 ha->chip_revision = ha->pdev->revision; 514 515 return QLA_SUCCESS; 516 } 517 518 /** 519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC). 520 * @ha: HA context 521 * 522 */ 523 static inline void 524 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha) 525 { 526 unsigned long flags = 0; 527 struct qla_hw_data *ha = vha->hw; 528 int i, core; 529 uint32_t cnt; 530 531 /* Set all 4 cores in reset */ 532 for (i = 0; i < 4; i++) { 533 QLAFX00_SET_HBA_SOC_REG(ha, 534 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01)); 535 } 536 537 /* Set all 4 core Clock gating control */ 538 for (i = 0; i < 4; i++) { 539 QLAFX00_SET_HBA_SOC_REG(ha, 540 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101)); 541 } 542 543 /* Reset all units in Fabric */ 544 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x11F0101)); 545 546 /* Reset all interrupt control registers */ 547 for (i = 0; i < 115; i++) { 548 QLAFX00_SET_HBA_SOC_REG(ha, 549 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0)); 550 } 551 552 /* Reset Timers control registers. per core */ 553 for (core = 0; core < 4; core++) 554 for (i = 0; i < 8; i++) 555 QLAFX00_SET_HBA_SOC_REG(ha, 556 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0)); 557 558 /* Reset per core IRQ ack register */ 559 for (core = 0; core < 4; core++) 560 QLAFX00_SET_HBA_SOC_REG(ha, 561 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF)); 562 563 /* Set Fabric control and config to defaults */ 564 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2)); 565 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3)); 566 567 spin_lock_irqsave(&ha->hardware_lock, flags); 568 569 /* Kick in Fabric units */ 570 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0)); 571 572 /* Kick in Core0 to start boot process */ 573 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00)); 574 575 /* Wait 10secs for soft-reset to complete. */ 576 for (cnt = 10; cnt; cnt--) { 577 msleep(1000); 578 barrier(); 579 } 580 spin_unlock_irqrestore(&ha->hardware_lock, flags); 581 } 582 583 /** 584 * qlafx00_soft_reset() - Soft Reset ISPFx00. 585 * @ha: HA context 586 * 587 * Returns 0 on success. 588 */ 589 void 590 qlafx00_soft_reset(scsi_qla_host_t *vha) 591 { 592 struct qla_hw_data *ha = vha->hw; 593 594 if (unlikely(pci_channel_offline(ha->pdev) && 595 ha->flags.pci_channel_io_perm_failure)) 596 return; 597 598 ha->isp_ops->disable_intrs(ha); 599 qlafx00_soc_cpu_reset(vha); 600 ha->isp_ops->enable_intrs(ha); 601 } 602 603 /** 604 * qlafx00_chip_diag() - Test ISPFx00 for proper operation. 605 * @ha: HA context 606 * 607 * Returns 0 on success. 608 */ 609 int 610 qlafx00_chip_diag(scsi_qla_host_t *vha) 611 { 612 int rval = 0; 613 struct qla_hw_data *ha = vha->hw; 614 struct req_que *req = ha->req_q_map[0]; 615 616 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 617 618 rval = qlafx00_mbx_reg_test(vha); 619 if (rval) { 620 ql_log(ql_log_warn, vha, 0x1165, 621 "Failed mailbox send register test\n"); 622 } else { 623 /* Flag a successful rval */ 624 rval = QLA_SUCCESS; 625 } 626 return rval; 627 } 628 629 void 630 qlafx00_config_rings(struct scsi_qla_host *vha) 631 { 632 struct qla_hw_data *ha = vha->hw; 633 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 634 struct init_cb_fx *icb; 635 struct req_que *req = ha->req_q_map[0]; 636 struct rsp_que *rsp = ha->rsp_q_map[0]; 637 638 /* Setup ring parameters in initialization control block. */ 639 icb = (struct init_cb_fx *)ha->init_cb; 640 icb->request_q_outpointer = __constant_cpu_to_le16(0); 641 icb->response_q_inpointer = __constant_cpu_to_le16(0); 642 icb->request_q_length = cpu_to_le16(req->length); 643 icb->response_q_length = cpu_to_le16(rsp->length); 644 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 645 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 646 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 647 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 648 649 WRT_REG_DWORD(®->req_q_in, 0); 650 WRT_REG_DWORD(®->req_q_out, 0); 651 652 WRT_REG_DWORD(®->rsp_q_in, 0); 653 WRT_REG_DWORD(®->rsp_q_out, 0); 654 655 /* PCI posting */ 656 RD_REG_DWORD(®->rsp_q_out); 657 } 658 659 char * 660 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str) 661 { 662 struct qla_hw_data *ha = vha->hw; 663 664 if (pci_is_pcie(ha->pdev)) { 665 strcpy(str, "PCIe iSA"); 666 return str; 667 } 668 return str; 669 } 670 671 char * 672 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str) 673 { 674 struct qla_hw_data *ha = vha->hw; 675 676 sprintf(str, "%s", ha->mr.fw_version); 677 return str; 678 } 679 680 void 681 qlafx00_enable_intrs(struct qla_hw_data *ha) 682 { 683 unsigned long flags = 0; 684 685 spin_lock_irqsave(&ha->hardware_lock, flags); 686 ha->interrupts_on = 1; 687 QLAFX00_ENABLE_ICNTRL_REG(ha); 688 spin_unlock_irqrestore(&ha->hardware_lock, flags); 689 } 690 691 void 692 qlafx00_disable_intrs(struct qla_hw_data *ha) 693 { 694 unsigned long flags = 0; 695 696 spin_lock_irqsave(&ha->hardware_lock, flags); 697 ha->interrupts_on = 0; 698 QLAFX00_DISABLE_ICNTRL_REG(ha); 699 spin_unlock_irqrestore(&ha->hardware_lock, flags); 700 } 701 702 static void 703 qlafx00_tmf_iocb_timeout(void *data) 704 { 705 srb_t *sp = (srb_t *)data; 706 struct srb_iocb *tmf = &sp->u.iocb_cmd; 707 708 tmf->u.tmf.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT); 709 complete(&tmf->u.tmf.comp); 710 } 711 712 static void 713 qlafx00_tmf_sp_done(void *data, void *ptr, int res) 714 { 715 srb_t *sp = (srb_t *)ptr; 716 struct srb_iocb *tmf = &sp->u.iocb_cmd; 717 718 complete(&tmf->u.tmf.comp); 719 } 720 721 static int 722 qlafx00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, 723 uint32_t lun, uint32_t tag) 724 { 725 scsi_qla_host_t *vha = fcport->vha; 726 struct srb_iocb *tm_iocb; 727 srb_t *sp; 728 int rval = QLA_FUNCTION_FAILED; 729 730 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 731 if (!sp) 732 goto done; 733 734 tm_iocb = &sp->u.iocb_cmd; 735 sp->type = SRB_TM_CMD; 736 sp->name = "tmf"; 737 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 738 tm_iocb->u.tmf.flags = flags; 739 tm_iocb->u.tmf.lun = lun; 740 tm_iocb->u.tmf.data = tag; 741 sp->done = qlafx00_tmf_sp_done; 742 tm_iocb->timeout = qlafx00_tmf_iocb_timeout; 743 init_completion(&tm_iocb->u.tmf.comp); 744 745 rval = qla2x00_start_sp(sp); 746 if (rval != QLA_SUCCESS) 747 goto done_free_sp; 748 749 ql_dbg(ql_dbg_async, vha, 0x507b, 750 "Task management command issued target_id=%x\n", 751 fcport->tgt_id); 752 753 wait_for_completion(&tm_iocb->u.tmf.comp); 754 755 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 756 QLA_SUCCESS : QLA_FUNCTION_FAILED; 757 758 done_free_sp: 759 sp->free(vha, sp); 760 done: 761 return rval; 762 } 763 764 int 765 qlafx00_abort_target(fc_port_t *fcport, unsigned int l, int tag) 766 { 767 return qlafx00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag); 768 } 769 770 int 771 qlafx00_lun_reset(fc_port_t *fcport, unsigned int l, int tag) 772 { 773 return qlafx00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag); 774 } 775 776 int 777 qlafx00_loop_reset(scsi_qla_host_t *vha) 778 { 779 int ret; 780 struct fc_port *fcport; 781 struct qla_hw_data *ha = vha->hw; 782 783 if (ql2xtargetreset) { 784 list_for_each_entry(fcport, &vha->vp_fcports, list) { 785 if (fcport->port_type != FCT_TARGET) 786 continue; 787 788 ret = ha->isp_ops->target_reset(fcport, 0, 0); 789 if (ret != QLA_SUCCESS) { 790 ql_dbg(ql_dbg_taskm, vha, 0x803d, 791 "Bus Reset failed: Reset=%d " 792 "d_id=%x.\n", ret, fcport->d_id.b24); 793 } 794 } 795 } 796 return QLA_SUCCESS; 797 } 798 799 int 800 qlafx00_iospace_config(struct qla_hw_data *ha) 801 { 802 if (pci_request_selected_regions(ha->pdev, ha->bars, 803 QLA2XXX_DRIVER_NAME)) { 804 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e, 805 "Failed to reserve PIO/MMIO regions (%s), aborting.\n", 806 pci_name(ha->pdev)); 807 goto iospace_error_exit; 808 } 809 810 /* Use MMIO operations for all accesses. */ 811 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { 812 ql_log_pci(ql_log_warn, ha->pdev, 0x014f, 813 "Invalid pci I/O region size (%s).\n", 814 pci_name(ha->pdev)); 815 goto iospace_error_exit; 816 } 817 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) { 818 ql_log_pci(ql_log_warn, ha->pdev, 0x0127, 819 "Invalid PCI mem BAR0 region size (%s), aborting\n", 820 pci_name(ha->pdev)); 821 goto iospace_error_exit; 822 } 823 824 ha->cregbase = 825 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00); 826 if (!ha->cregbase) { 827 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128, 828 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); 829 goto iospace_error_exit; 830 } 831 832 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) { 833 ql_log_pci(ql_log_warn, ha->pdev, 0x0129, 834 "region #2 not an MMIO resource (%s), aborting\n", 835 pci_name(ha->pdev)); 836 goto iospace_error_exit; 837 } 838 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) { 839 ql_log_pci(ql_log_warn, ha->pdev, 0x012a, 840 "Invalid PCI mem BAR2 region size (%s), aborting\n", 841 pci_name(ha->pdev)); 842 goto iospace_error_exit; 843 } 844 845 ha->iobase = 846 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00); 847 if (!ha->iobase) { 848 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b, 849 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); 850 goto iospace_error_exit; 851 } 852 853 /* Determine queue resources */ 854 ha->max_req_queues = ha->max_rsp_queues = 1; 855 856 ql_log_pci(ql_log_info, ha->pdev, 0x012c, 857 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n", 858 ha->bars, ha->cregbase, ha->iobase); 859 860 return 0; 861 862 iospace_error_exit: 863 return -ENOMEM; 864 } 865 866 static void 867 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha) 868 { 869 struct qla_hw_data *ha = vha->hw; 870 struct req_que *req = ha->req_q_map[0]; 871 struct rsp_que *rsp = ha->rsp_q_map[0]; 872 873 req->length_fx00 = req->length; 874 req->ring_fx00 = req->ring; 875 req->dma_fx00 = req->dma; 876 877 rsp->length_fx00 = rsp->length; 878 rsp->ring_fx00 = rsp->ring; 879 rsp->dma_fx00 = rsp->dma; 880 881 ql_dbg(ql_dbg_init, vha, 0x012d, 882 "req: %p, ring_fx00: %p, length_fx00: 0x%x," 883 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00, 884 req->length_fx00, (u64)req->dma_fx00); 885 886 ql_dbg(ql_dbg_init, vha, 0x012e, 887 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x," 888 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00, 889 rsp->length_fx00, (u64)rsp->dma_fx00); 890 } 891 892 static int 893 qlafx00_config_queues(struct scsi_qla_host *vha) 894 { 895 struct qla_hw_data *ha = vha->hw; 896 struct req_que *req = ha->req_q_map[0]; 897 struct rsp_que *rsp = ha->rsp_q_map[0]; 898 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2); 899 900 req->length = ha->req_que_len; 901 req->ring = (void *)ha->iobase + ha->req_que_off; 902 req->dma = bar2_hdl + ha->req_que_off; 903 if ((!req->ring) || (req->length == 0)) { 904 ql_log_pci(ql_log_info, ha->pdev, 0x012f, 905 "Unable to allocate memory for req_ring\n"); 906 return QLA_FUNCTION_FAILED; 907 } 908 909 ql_dbg(ql_dbg_init, vha, 0x0130, 910 "req: %p req_ring pointer %p req len 0x%x " 911 "req off 0x%x\n, req->dma: 0x%llx", 912 req, req->ring, req->length, 913 ha->req_que_off, (u64)req->dma); 914 915 rsp->length = ha->rsp_que_len; 916 rsp->ring = (void *)ha->iobase + ha->rsp_que_off; 917 rsp->dma = bar2_hdl + ha->rsp_que_off; 918 if ((!rsp->ring) || (rsp->length == 0)) { 919 ql_log_pci(ql_log_info, ha->pdev, 0x0131, 920 "Unable to allocate memory for rsp_ring\n"); 921 return QLA_FUNCTION_FAILED; 922 } 923 924 ql_dbg(ql_dbg_init, vha, 0x0132, 925 "rsp: %p rsp_ring pointer %p rsp len 0x%x " 926 "rsp off 0x%x, rsp->dma: 0x%llx\n", 927 rsp, rsp->ring, rsp->length, 928 ha->rsp_que_off, (u64)rsp->dma); 929 930 return QLA_SUCCESS; 931 } 932 933 static int 934 qlafx00_init_fw_ready(scsi_qla_host_t *vha) 935 { 936 int rval = 0; 937 unsigned long wtime; 938 uint16_t wait_time; /* Wait time */ 939 struct qla_hw_data *ha = vha->hw; 940 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 941 uint32_t aenmbx, aenmbx7 = 0; 942 uint32_t pseudo_aen; 943 uint32_t state[5]; 944 bool done = false; 945 946 /* 30 seconds wait - Adjust if required */ 947 wait_time = 30; 948 949 pseudo_aen = RD_REG_DWORD(®->pseudoaen); 950 if (pseudo_aen == 1) { 951 aenmbx7 = RD_REG_DWORD(®->initval7); 952 ha->mbx_intr_code = MSW(aenmbx7); 953 ha->rqstq_intr_code = LSW(aenmbx7); 954 rval = qlafx00_driver_shutdown(vha, 10); 955 if (rval != QLA_SUCCESS) 956 qlafx00_soft_reset(vha); 957 } 958 959 /* wait time before firmware ready */ 960 wtime = jiffies + (wait_time * HZ); 961 do { 962 aenmbx = RD_REG_DWORD(®->aenmailbox0); 963 barrier(); 964 ql_dbg(ql_dbg_mbx, vha, 0x0133, 965 "aenmbx: 0x%x\n", aenmbx); 966 967 switch (aenmbx) { 968 case MBA_FW_NOT_STARTED: 969 case MBA_FW_STARTING: 970 break; 971 972 case MBA_SYSTEM_ERR: 973 case MBA_REQ_TRANSFER_ERR: 974 case MBA_RSP_TRANSFER_ERR: 975 case MBA_FW_INIT_FAILURE: 976 qlafx00_soft_reset(vha); 977 break; 978 979 case MBA_FW_RESTART_CMPLT: 980 /* Set the mbx and rqstq intr code */ 981 aenmbx7 = RD_REG_DWORD(®->aenmailbox7); 982 ha->mbx_intr_code = MSW(aenmbx7); 983 ha->rqstq_intr_code = LSW(aenmbx7); 984 ha->req_que_off = RD_REG_DWORD(®->aenmailbox1); 985 ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3); 986 ha->req_que_len = RD_REG_DWORD(®->aenmailbox5); 987 ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6); 988 WRT_REG_DWORD(®->aenmailbox0, 0); 989 RD_REG_DWORD_RELAXED(®->aenmailbox0); 990 ql_dbg(ql_dbg_init, vha, 0x0134, 991 "f/w returned mbx_intr_code: 0x%x, " 992 "rqstq_intr_code: 0x%x\n", 993 ha->mbx_intr_code, ha->rqstq_intr_code); 994 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 995 rval = QLA_SUCCESS; 996 done = true; 997 break; 998 999 default: 1000 /* If fw is apparently not ready. In order to continue, 1001 * we might need to issue Mbox cmd, but the problem is 1002 * that the DoorBell vector values that come with the 1003 * 8060 AEN are most likely gone by now (and thus no 1004 * bell would be rung on the fw side when mbox cmd is 1005 * issued). We have to therefore grab the 8060 AEN 1006 * shadow regs (filled in by FW when the last 8060 1007 * AEN was being posted). 1008 * Do the following to determine what is needed in 1009 * order to get the FW ready: 1010 * 1. reload the 8060 AEN values from the shadow regs 1011 * 2. clear int status to get rid of possible pending 1012 * interrupts 1013 * 3. issue Get FW State Mbox cmd to determine fw state 1014 * Set the mbx and rqstq intr code from Shadow Regs 1015 */ 1016 aenmbx7 = RD_REG_DWORD(®->initval7); 1017 ha->mbx_intr_code = MSW(aenmbx7); 1018 ha->rqstq_intr_code = LSW(aenmbx7); 1019 ha->req_que_off = RD_REG_DWORD(®->initval1); 1020 ha->rsp_que_off = RD_REG_DWORD(®->initval3); 1021 ha->req_que_len = RD_REG_DWORD(®->initval5); 1022 ha->rsp_que_len = RD_REG_DWORD(®->initval6); 1023 ql_dbg(ql_dbg_init, vha, 0x0135, 1024 "f/w returned mbx_intr_code: 0x%x, " 1025 "rqstq_intr_code: 0x%x\n", 1026 ha->mbx_intr_code, ha->rqstq_intr_code); 1027 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1028 1029 /* Get the FW state */ 1030 rval = qlafx00_get_firmware_state(vha, state); 1031 if (rval != QLA_SUCCESS) { 1032 /* Retry if timer has not expired */ 1033 break; 1034 } 1035 1036 if (state[0] == FSTATE_FX00_CONFIG_WAIT) { 1037 /* Firmware is waiting to be 1038 * initialized by driver 1039 */ 1040 rval = QLA_SUCCESS; 1041 done = true; 1042 break; 1043 } 1044 1045 /* Issue driver shutdown and wait until f/w recovers. 1046 * Driver should continue to poll until 8060 AEN is 1047 * received indicating firmware recovery. 1048 */ 1049 ql_dbg(ql_dbg_init, vha, 0x0136, 1050 "Sending Driver shutdown fw_state 0x%x\n", 1051 state[0]); 1052 1053 rval = qlafx00_driver_shutdown(vha, 10); 1054 if (rval != QLA_SUCCESS) { 1055 rval = QLA_FUNCTION_FAILED; 1056 break; 1057 } 1058 msleep(500); 1059 1060 wtime = jiffies + (wait_time * HZ); 1061 break; 1062 } 1063 1064 if (!done) { 1065 if (time_after_eq(jiffies, wtime)) { 1066 ql_dbg(ql_dbg_init, vha, 0x0137, 1067 "Init f/w failed: aen[7]: 0x%x\n", 1068 RD_REG_DWORD(®->aenmailbox7)); 1069 rval = QLA_FUNCTION_FAILED; 1070 done = true; 1071 break; 1072 } 1073 /* Delay for a while */ 1074 msleep(500); 1075 } 1076 } while (!done); 1077 1078 if (rval) 1079 ql_dbg(ql_dbg_init, vha, 0x0138, 1080 "%s **** FAILED ****.\n", __func__); 1081 else 1082 ql_dbg(ql_dbg_init, vha, 0x0139, 1083 "%s **** SUCCESS ****.\n", __func__); 1084 1085 return rval; 1086 } 1087 1088 /* 1089 * qlafx00_fw_ready() - Waits for firmware ready. 1090 * @ha: HA context 1091 * 1092 * Returns 0 on success. 1093 */ 1094 int 1095 qlafx00_fw_ready(scsi_qla_host_t *vha) 1096 { 1097 int rval; 1098 unsigned long wtime; 1099 uint16_t wait_time; /* Wait time if loop is coming ready */ 1100 uint32_t state[5]; 1101 1102 rval = QLA_SUCCESS; 1103 1104 wait_time = 10; 1105 1106 /* wait time before firmware ready */ 1107 wtime = jiffies + (wait_time * HZ); 1108 1109 /* Wait for ISP to finish init */ 1110 if (!vha->flags.init_done) 1111 ql_dbg(ql_dbg_init, vha, 0x013a, 1112 "Waiting for init to complete...\n"); 1113 1114 do { 1115 rval = qlafx00_get_firmware_state(vha, state); 1116 1117 if (rval == QLA_SUCCESS) { 1118 if (state[0] == FSTATE_FX00_INITIALIZED) { 1119 ql_dbg(ql_dbg_init, vha, 0x013b, 1120 "fw_state=%x\n", state[0]); 1121 rval = QLA_SUCCESS; 1122 break; 1123 } 1124 } 1125 rval = QLA_FUNCTION_FAILED; 1126 1127 if (time_after_eq(jiffies, wtime)) 1128 break; 1129 1130 /* Delay for a while */ 1131 msleep(500); 1132 1133 ql_dbg(ql_dbg_init, vha, 0x013c, 1134 "fw_state=%x curr time=%lx.\n", state[0], jiffies); 1135 } while (1); 1136 1137 1138 if (rval) 1139 ql_dbg(ql_dbg_init, vha, 0x013d, 1140 "Firmware ready **** FAILED ****.\n"); 1141 else 1142 ql_dbg(ql_dbg_init, vha, 0x013e, 1143 "Firmware ready **** SUCCESS ****.\n"); 1144 1145 return rval; 1146 } 1147 1148 static int 1149 qlafx00_find_all_targets(scsi_qla_host_t *vha, 1150 struct list_head *new_fcports) 1151 { 1152 int rval; 1153 uint16_t tgt_id; 1154 fc_port_t *fcport, *new_fcport; 1155 int found; 1156 struct qla_hw_data *ha = vha->hw; 1157 1158 rval = QLA_SUCCESS; 1159 1160 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags)) 1161 return QLA_FUNCTION_FAILED; 1162 1163 if ((atomic_read(&vha->loop_down_timer) || 1164 STATE_TRANSITION(vha))) { 1165 atomic_set(&vha->loop_down_timer, 0); 1166 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1167 return QLA_FUNCTION_FAILED; 1168 } 1169 1170 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088, 1171 "Listing Target bit map...\n"); 1172 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha, 1173 0x2089, (uint8_t *)ha->gid_list, 32); 1174 1175 /* Allocate temporary rmtport for any new rmtports discovered. */ 1176 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 1177 if (new_fcport == NULL) 1178 return QLA_MEMORY_ALLOC_FAILED; 1179 1180 for_each_set_bit(tgt_id, (void *)ha->gid_list, 1181 QLAFX00_TGT_NODE_LIST_SIZE) { 1182 1183 /* Send get target node info */ 1184 new_fcport->tgt_id = tgt_id; 1185 rval = qlafx00_fx_disc(vha, new_fcport, 1186 FXDISC_GET_TGT_NODE_INFO); 1187 if (rval != QLA_SUCCESS) { 1188 ql_log(ql_log_warn, vha, 0x208a, 1189 "Target info scan failed -- assuming zero-entry " 1190 "result...\n"); 1191 continue; 1192 } 1193 1194 /* Locate matching device in database. */ 1195 found = 0; 1196 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1197 if (memcmp(new_fcport->port_name, 1198 fcport->port_name, WWN_SIZE)) 1199 continue; 1200 1201 found++; 1202 1203 /* 1204 * If tgt_id is same and state FCS_ONLINE, nothing 1205 * changed. 1206 */ 1207 if (fcport->tgt_id == new_fcport->tgt_id && 1208 atomic_read(&fcport->state) == FCS_ONLINE) 1209 break; 1210 1211 /* 1212 * Tgt ID changed or device was marked to be updated. 1213 */ 1214 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b, 1215 "TGT-ID Change(%s): Present tgt id: " 1216 "0x%x state: 0x%x " 1217 "wwnn = %llx wwpn = %llx.\n", 1218 __func__, fcport->tgt_id, 1219 atomic_read(&fcport->state), 1220 (unsigned long long)wwn_to_u64(fcport->node_name), 1221 (unsigned long long)wwn_to_u64(fcport->port_name)); 1222 1223 ql_log(ql_log_info, vha, 0x208c, 1224 "TGT-ID Announce(%s): Discovered tgt " 1225 "id 0x%x wwnn = %llx " 1226 "wwpn = %llx.\n", __func__, new_fcport->tgt_id, 1227 (unsigned long long) 1228 wwn_to_u64(new_fcport->node_name), 1229 (unsigned long long) 1230 wwn_to_u64(new_fcport->port_name)); 1231 1232 if (atomic_read(&fcport->state) != FCS_ONLINE) { 1233 fcport->old_tgt_id = fcport->tgt_id; 1234 fcport->tgt_id = new_fcport->tgt_id; 1235 ql_log(ql_log_info, vha, 0x208d, 1236 "TGT-ID: New fcport Added: %p\n", fcport); 1237 qla2x00_update_fcport(vha, fcport); 1238 } else { 1239 ql_log(ql_log_info, vha, 0x208e, 1240 " Existing TGT-ID %x did not get " 1241 " offline event from firmware.\n", 1242 fcport->old_tgt_id); 1243 qla2x00_mark_device_lost(vha, fcport, 0, 0); 1244 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1245 kfree(new_fcport); 1246 return rval; 1247 } 1248 break; 1249 } 1250 1251 if (found) 1252 continue; 1253 1254 /* If device was not in our fcports list, then add it. */ 1255 list_add_tail(&new_fcport->list, new_fcports); 1256 1257 /* Allocate a new replacement fcport. */ 1258 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 1259 if (new_fcport == NULL) 1260 return QLA_MEMORY_ALLOC_FAILED; 1261 } 1262 1263 kfree(new_fcport); 1264 return rval; 1265 } 1266 1267 /* 1268 * qlafx00_configure_all_targets 1269 * Setup target devices with node ID's. 1270 * 1271 * Input: 1272 * ha = adapter block pointer. 1273 * 1274 * Returns: 1275 * 0 = success. 1276 * BIT_0 = error 1277 */ 1278 static int 1279 qlafx00_configure_all_targets(scsi_qla_host_t *vha) 1280 { 1281 int rval; 1282 fc_port_t *fcport, *rmptemp; 1283 LIST_HEAD(new_fcports); 1284 1285 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1286 FXDISC_GET_TGT_NODE_LIST); 1287 if (rval != QLA_SUCCESS) { 1288 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1289 return rval; 1290 } 1291 1292 rval = qlafx00_find_all_targets(vha, &new_fcports); 1293 if (rval != QLA_SUCCESS) { 1294 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1295 return rval; 1296 } 1297 1298 /* 1299 * Delete all previous devices marked lost. 1300 */ 1301 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1302 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 1303 break; 1304 1305 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { 1306 if (fcport->port_type != FCT_INITIATOR) 1307 qla2x00_mark_device_lost(vha, fcport, 0, 0); 1308 } 1309 } 1310 1311 /* 1312 * Add the new devices to our devices list. 1313 */ 1314 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) { 1315 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 1316 break; 1317 1318 qla2x00_update_fcport(vha, fcport); 1319 list_move_tail(&fcport->list, &vha->vp_fcports); 1320 ql_log(ql_log_info, vha, 0x208f, 1321 "Attach new target id 0x%x wwnn = %llx " 1322 "wwpn = %llx.\n", 1323 fcport->tgt_id, 1324 (unsigned long long)wwn_to_u64(fcport->node_name), 1325 (unsigned long long)wwn_to_u64(fcport->port_name)); 1326 } 1327 1328 /* Free all new device structures not processed. */ 1329 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) { 1330 list_del(&fcport->list); 1331 kfree(fcport); 1332 } 1333 1334 return rval; 1335 } 1336 1337 /* 1338 * qlafx00_configure_devices 1339 * Updates Fibre Channel Device Database with what is actually on loop. 1340 * 1341 * Input: 1342 * ha = adapter block pointer. 1343 * 1344 * Returns: 1345 * 0 = success. 1346 * 1 = error. 1347 * 2 = database was full and device was not configured. 1348 */ 1349 int 1350 qlafx00_configure_devices(scsi_qla_host_t *vha) 1351 { 1352 int rval; 1353 unsigned long flags, save_flags; 1354 rval = QLA_SUCCESS; 1355 1356 save_flags = flags = vha->dpc_flags; 1357 1358 ql_dbg(ql_dbg_disc, vha, 0x2090, 1359 "Configure devices -- dpc flags =0x%lx\n", flags); 1360 1361 rval = qlafx00_configure_all_targets(vha); 1362 1363 if (rval == QLA_SUCCESS) { 1364 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 1365 rval = QLA_FUNCTION_FAILED; 1366 } else { 1367 atomic_set(&vha->loop_state, LOOP_READY); 1368 ql_log(ql_log_info, vha, 0x2091, 1369 "Device Ready\n"); 1370 } 1371 } 1372 1373 if (rval) { 1374 ql_dbg(ql_dbg_disc, vha, 0x2092, 1375 "%s *** FAILED ***.\n", __func__); 1376 } else { 1377 ql_dbg(ql_dbg_disc, vha, 0x2093, 1378 "%s: exiting normally.\n", __func__); 1379 } 1380 return rval; 1381 } 1382 1383 static void 1384 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp) 1385 { 1386 struct qla_hw_data *ha = vha->hw; 1387 fc_port_t *fcport; 1388 1389 vha->flags.online = 0; 1390 ha->mr.fw_hbt_en = 0; 1391 1392 if (!critemp) { 1393 ha->flags.chip_reset_done = 0; 1394 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1395 vha->qla_stats.total_isp_aborts++; 1396 ql_log(ql_log_info, vha, 0x013f, 1397 "Performing ISP error recovery - ha = %p.\n", ha); 1398 ha->isp_ops->reset_chip(vha); 1399 } 1400 1401 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1402 atomic_set(&vha->loop_state, LOOP_DOWN); 1403 atomic_set(&vha->loop_down_timer, 1404 QLAFX00_LOOP_DOWN_TIME); 1405 } else { 1406 if (!atomic_read(&vha->loop_down_timer)) 1407 atomic_set(&vha->loop_down_timer, 1408 QLAFX00_LOOP_DOWN_TIME); 1409 } 1410 1411 /* Clear all async request states across all VPs. */ 1412 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1413 fcport->flags = 0; 1414 if (atomic_read(&fcport->state) == FCS_ONLINE) 1415 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 1416 } 1417 1418 if (!ha->flags.eeh_busy) { 1419 if (critemp) { 1420 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16); 1421 } else { 1422 /* Requeue all commands in outstanding command list. */ 1423 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 1424 } 1425 } 1426 1427 qla2x00_free_irqs(vha); 1428 if (critemp) 1429 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags); 1430 else 1431 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); 1432 1433 /* Clear the Interrupts */ 1434 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1435 1436 ql_log(ql_log_info, vha, 0x0140, 1437 "%s Done done - ha=%p.\n", __func__, ha); 1438 } 1439 1440 /** 1441 * qlafx00_init_response_q_entries() - Initializes response queue entries. 1442 * @ha: HA context 1443 * 1444 * Beginning of request ring has initialization control block already built 1445 * by nvram config routine. 1446 * 1447 * Returns 0 on success. 1448 */ 1449 void 1450 qlafx00_init_response_q_entries(struct rsp_que *rsp) 1451 { 1452 uint16_t cnt; 1453 response_t *pkt; 1454 1455 rsp->ring_ptr = rsp->ring; 1456 rsp->ring_index = 0; 1457 rsp->status_srb = NULL; 1458 pkt = rsp->ring_ptr; 1459 for (cnt = 0; cnt < rsp->length; cnt++) { 1460 pkt->signature = RESPONSE_PROCESSED; 1461 WRT_REG_DWORD((void __iomem *)&pkt->signature, 1462 RESPONSE_PROCESSED); 1463 pkt++; 1464 } 1465 } 1466 1467 int 1468 qlafx00_rescan_isp(scsi_qla_host_t *vha) 1469 { 1470 uint32_t status = QLA_FUNCTION_FAILED; 1471 struct qla_hw_data *ha = vha->hw; 1472 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 1473 uint32_t aenmbx7; 1474 1475 qla2x00_request_irqs(ha, ha->rsp_q_map[0]); 1476 1477 aenmbx7 = RD_REG_DWORD(®->aenmailbox7); 1478 ha->mbx_intr_code = MSW(aenmbx7); 1479 ha->rqstq_intr_code = LSW(aenmbx7); 1480 ha->req_que_off = RD_REG_DWORD(®->aenmailbox1); 1481 ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3); 1482 ha->req_que_len = RD_REG_DWORD(®->aenmailbox5); 1483 ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6); 1484 1485 ql_dbg(ql_dbg_disc, vha, 0x2094, 1486 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x " 1487 " Req que offset 0x%x Rsp que offset 0x%x\n", 1488 ha->mbx_intr_code, ha->rqstq_intr_code, 1489 ha->req_que_off, ha->rsp_que_len); 1490 1491 /* Clear the Interrupts */ 1492 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1493 1494 status = qla2x00_init_rings(vha); 1495 if (!status) { 1496 vha->flags.online = 1; 1497 1498 /* if no cable then assume it's good */ 1499 if ((vha->device_flags & DFLG_NO_CABLE)) 1500 status = 0; 1501 /* Register system information */ 1502 if (qlafx00_fx_disc(vha, 1503 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO)) 1504 ql_dbg(ql_dbg_disc, vha, 0x2095, 1505 "failed to register host info\n"); 1506 } 1507 scsi_unblock_requests(vha->host); 1508 return status; 1509 } 1510 1511 void 1512 qlafx00_timer_routine(scsi_qla_host_t *vha) 1513 { 1514 struct qla_hw_data *ha = vha->hw; 1515 uint32_t fw_heart_beat; 1516 uint32_t aenmbx0; 1517 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 1518 uint32_t tempc; 1519 1520 /* Check firmware health */ 1521 if (ha->mr.fw_hbt_cnt) 1522 ha->mr.fw_hbt_cnt--; 1523 else { 1524 if ((!ha->flags.mr_reset_hdlr_active) && 1525 (!test_bit(UNLOADING, &vha->dpc_flags)) && 1526 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) && 1527 (ha->mr.fw_hbt_en)) { 1528 fw_heart_beat = RD_REG_DWORD(®->fwheartbeat); 1529 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) { 1530 ha->mr.old_fw_hbt_cnt = fw_heart_beat; 1531 ha->mr.fw_hbt_miss_cnt = 0; 1532 } else { 1533 ha->mr.fw_hbt_miss_cnt++; 1534 if (ha->mr.fw_hbt_miss_cnt == 1535 QLAFX00_HEARTBEAT_MISS_CNT) { 1536 set_bit(ISP_ABORT_NEEDED, 1537 &vha->dpc_flags); 1538 qla2xxx_wake_dpc(vha); 1539 ha->mr.fw_hbt_miss_cnt = 0; 1540 } 1541 } 1542 } 1543 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL; 1544 } 1545 1546 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) { 1547 /* Reset recovery to be performed in timer routine */ 1548 aenmbx0 = RD_REG_DWORD(®->aenmailbox0); 1549 if (ha->mr.fw_reset_timer_exp) { 1550 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1551 qla2xxx_wake_dpc(vha); 1552 ha->mr.fw_reset_timer_exp = 0; 1553 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) { 1554 /* Wake up DPC to rescan the targets */ 1555 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags); 1556 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); 1557 qla2xxx_wake_dpc(vha); 1558 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; 1559 } else if ((aenmbx0 == MBA_FW_STARTING) && 1560 (!ha->mr.fw_hbt_en)) { 1561 ha->mr.fw_hbt_en = 1; 1562 } else if (!ha->mr.fw_reset_timer_tick) { 1563 if (aenmbx0 == ha->mr.old_aenmbx0_state) 1564 ha->mr.fw_reset_timer_exp = 1; 1565 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; 1566 } else if (aenmbx0 == 0xFFFFFFFF) { 1567 uint32_t data0, data1; 1568 1569 data0 = QLAFX00_RD_REG(ha, 1570 QLAFX00_BAR1_BASE_ADDR_REG); 1571 data1 = QLAFX00_RD_REG(ha, 1572 QLAFX00_PEX0_WIN0_BASE_ADDR_REG); 1573 1574 data0 &= 0xffff0000; 1575 data1 &= 0x0000ffff; 1576 1577 QLAFX00_WR_REG(ha, 1578 QLAFX00_PEX0_WIN0_BASE_ADDR_REG, 1579 (data0 | data1)); 1580 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) { 1581 ha->mr.fw_reset_timer_tick = 1582 QLAFX00_MAX_RESET_INTERVAL; 1583 } else if (aenmbx0 == MBA_FW_RESET_FCT) { 1584 ha->mr.fw_reset_timer_tick = 1585 QLAFX00_MAX_RESET_INTERVAL; 1586 } 1587 ha->mr.old_aenmbx0_state = aenmbx0; 1588 ha->mr.fw_reset_timer_tick--; 1589 } 1590 if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) { 1591 /* 1592 * Critical temperature recovery to be 1593 * performed in timer routine 1594 */ 1595 if (ha->mr.fw_critemp_timer_tick == 0) { 1596 tempc = QLAFX00_GET_TEMPERATURE(ha); 1597 ql_dbg(ql_dbg_timer, vha, 0x6012, 1598 "ISPFx00(%s): Critical temp timer, " 1599 "current SOC temperature: %d\n", 1600 __func__, tempc); 1601 if (tempc < ha->mr.critical_temperature) { 1602 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1603 clear_bit(FX00_CRITEMP_RECOVERY, 1604 &vha->dpc_flags); 1605 qla2xxx_wake_dpc(vha); 1606 } 1607 ha->mr.fw_critemp_timer_tick = 1608 QLAFX00_CRITEMP_INTERVAL; 1609 } else { 1610 ha->mr.fw_critemp_timer_tick--; 1611 } 1612 } 1613 } 1614 1615 /* 1616 * qlfx00a_reset_initialize 1617 * Re-initialize after a iSA device reset. 1618 * 1619 * Input: 1620 * ha = adapter block pointer. 1621 * 1622 * Returns: 1623 * 0 = success 1624 */ 1625 int 1626 qlafx00_reset_initialize(scsi_qla_host_t *vha) 1627 { 1628 struct qla_hw_data *ha = vha->hw; 1629 1630 if (vha->device_flags & DFLG_DEV_FAILED) { 1631 ql_dbg(ql_dbg_init, vha, 0x0142, 1632 "Device in failed state\n"); 1633 return QLA_SUCCESS; 1634 } 1635 1636 ha->flags.mr_reset_hdlr_active = 1; 1637 1638 if (vha->flags.online) { 1639 scsi_block_requests(vha->host); 1640 qlafx00_abort_isp_cleanup(vha, false); 1641 } 1642 1643 ql_log(ql_log_info, vha, 0x0143, 1644 "(%s): succeeded.\n", __func__); 1645 ha->flags.mr_reset_hdlr_active = 0; 1646 return QLA_SUCCESS; 1647 } 1648 1649 /* 1650 * qlafx00_abort_isp 1651 * Resets ISP and aborts all outstanding commands. 1652 * 1653 * Input: 1654 * ha = adapter block pointer. 1655 * 1656 * Returns: 1657 * 0 = success 1658 */ 1659 int 1660 qlafx00_abort_isp(scsi_qla_host_t *vha) 1661 { 1662 struct qla_hw_data *ha = vha->hw; 1663 1664 if (vha->flags.online) { 1665 if (unlikely(pci_channel_offline(ha->pdev) && 1666 ha->flags.pci_channel_io_perm_failure)) { 1667 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 1668 return QLA_SUCCESS; 1669 } 1670 1671 scsi_block_requests(vha->host); 1672 qlafx00_abort_isp_cleanup(vha, false); 1673 } else { 1674 scsi_block_requests(vha->host); 1675 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1676 vha->qla_stats.total_isp_aborts++; 1677 ha->isp_ops->reset_chip(vha); 1678 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); 1679 /* Clear the Interrupts */ 1680 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1681 } 1682 1683 ql_log(ql_log_info, vha, 0x0145, 1684 "(%s): succeeded.\n", __func__); 1685 1686 return QLA_SUCCESS; 1687 } 1688 1689 static inline fc_port_t* 1690 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id) 1691 { 1692 fc_port_t *fcport; 1693 1694 /* Check for matching device in remote port list. */ 1695 fcport = NULL; 1696 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1697 if (fcport->tgt_id == tgt_id) { 1698 ql_dbg(ql_dbg_async, vha, 0x5072, 1699 "Matching fcport(%p) found with TGT-ID: 0x%x " 1700 "and Remote TGT_ID: 0x%x\n", 1701 fcport, fcport->tgt_id, tgt_id); 1702 break; 1703 } 1704 } 1705 return fcport; 1706 } 1707 1708 static void 1709 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id) 1710 { 1711 fc_port_t *fcport; 1712 1713 ql_log(ql_log_info, vha, 0x5073, 1714 "Detach TGT-ID: 0x%x\n", tgt_id); 1715 1716 fcport = qlafx00_get_fcport(vha, tgt_id); 1717 if (!fcport) 1718 return; 1719 1720 qla2x00_mark_device_lost(vha, fcport, 0, 0); 1721 1722 return; 1723 } 1724 1725 int 1726 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt) 1727 { 1728 int rval = 0; 1729 uint32_t aen_code, aen_data; 1730 1731 aen_code = FCH_EVT_VENDOR_UNIQUE; 1732 aen_data = evt->u.aenfx.evtcode; 1733 1734 switch (evt->u.aenfx.evtcode) { 1735 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */ 1736 if (evt->u.aenfx.mbx[1] == 0) { 1737 if (evt->u.aenfx.mbx[2] == 1) { 1738 if (!vha->flags.fw_tgt_reported) 1739 vha->flags.fw_tgt_reported = 1; 1740 atomic_set(&vha->loop_down_timer, 0); 1741 atomic_set(&vha->loop_state, LOOP_UP); 1742 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1743 qla2xxx_wake_dpc(vha); 1744 } else if (evt->u.aenfx.mbx[2] == 2) { 1745 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]); 1746 } 1747 } else if (evt->u.aenfx.mbx[1] == 0xffff) { 1748 if (evt->u.aenfx.mbx[2] == 1) { 1749 if (!vha->flags.fw_tgt_reported) 1750 vha->flags.fw_tgt_reported = 1; 1751 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1752 } else if (evt->u.aenfx.mbx[2] == 2) { 1753 vha->device_flags |= DFLG_NO_CABLE; 1754 qla2x00_mark_all_devices_lost(vha, 1); 1755 } 1756 } 1757 break; 1758 case QLAFX00_MBA_LINK_UP: 1759 aen_code = FCH_EVT_LINKUP; 1760 aen_data = 0; 1761 break; 1762 case QLAFX00_MBA_LINK_DOWN: 1763 aen_code = FCH_EVT_LINKDOWN; 1764 aen_data = 0; 1765 break; 1766 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */ 1767 ql_log(ql_log_info, vha, 0x5082, 1768 "Process critical temperature event " 1769 "aenmb[0]: %x\n", 1770 evt->u.aenfx.evtcode); 1771 scsi_block_requests(vha->host); 1772 qlafx00_abort_isp_cleanup(vha, true); 1773 scsi_unblock_requests(vha->host); 1774 break; 1775 } 1776 1777 fc_host_post_event(vha->host, fc_get_event_number(), 1778 aen_code, aen_data); 1779 1780 return rval; 1781 } 1782 1783 static void 1784 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo) 1785 { 1786 u64 port_name = 0, node_name = 0; 1787 1788 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name); 1789 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name); 1790 1791 fc_host_node_name(vha->host) = node_name; 1792 fc_host_port_name(vha->host) = port_name; 1793 if (!pinfo->port_type) 1794 vha->hw->current_topology = ISP_CFG_F; 1795 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP) 1796 atomic_set(&vha->loop_state, LOOP_READY); 1797 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN) 1798 atomic_set(&vha->loop_state, LOOP_DOWN); 1799 vha->hw->link_data_rate = (uint16_t)pinfo->link_config; 1800 } 1801 1802 static void 1803 qla2x00_fxdisc_iocb_timeout(void *data) 1804 { 1805 srb_t *sp = (srb_t *)data; 1806 struct srb_iocb *lio = &sp->u.iocb_cmd; 1807 1808 complete(&lio->u.fxiocb.fxiocb_comp); 1809 } 1810 1811 static void 1812 qla2x00_fxdisc_sp_done(void *data, void *ptr, int res) 1813 { 1814 srb_t *sp = (srb_t *)ptr; 1815 struct srb_iocb *lio = &sp->u.iocb_cmd; 1816 1817 complete(&lio->u.fxiocb.fxiocb_comp); 1818 } 1819 1820 int 1821 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type) 1822 { 1823 srb_t *sp; 1824 struct srb_iocb *fdisc; 1825 int rval = QLA_FUNCTION_FAILED; 1826 struct qla_hw_data *ha = vha->hw; 1827 struct host_system_info *phost_info; 1828 struct register_host_info *preg_hsi; 1829 struct new_utsname *p_sysid = NULL; 1830 struct timeval tv; 1831 1832 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1833 if (!sp) 1834 goto done; 1835 1836 fdisc = &sp->u.iocb_cmd; 1837 switch (fx_type) { 1838 case FXDISC_GET_CONFIG_INFO: 1839 fdisc->u.fxiocb.flags = 1840 SRB_FXDISC_RESP_DMA_VALID; 1841 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data); 1842 break; 1843 case FXDISC_GET_PORT_INFO: 1844 fdisc->u.fxiocb.flags = 1845 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; 1846 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO; 1847 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id); 1848 break; 1849 case FXDISC_GET_TGT_NODE_INFO: 1850 fdisc->u.fxiocb.flags = 1851 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; 1852 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO; 1853 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id); 1854 break; 1855 case FXDISC_GET_TGT_NODE_LIST: 1856 fdisc->u.fxiocb.flags = 1857 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; 1858 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE; 1859 break; 1860 case FXDISC_REG_HOST_INFO: 1861 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID; 1862 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info); 1863 p_sysid = utsname(); 1864 if (!p_sysid) { 1865 ql_log(ql_log_warn, vha, 0x303c, 1866 "Not able to get the system information\n"); 1867 goto done_free_sp; 1868 } 1869 break; 1870 default: 1871 break; 1872 } 1873 1874 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) { 1875 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev, 1876 fdisc->u.fxiocb.req_len, 1877 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL); 1878 if (!fdisc->u.fxiocb.req_addr) 1879 goto done_free_sp; 1880 1881 if (fx_type == FXDISC_REG_HOST_INFO) { 1882 preg_hsi = (struct register_host_info *) 1883 fdisc->u.fxiocb.req_addr; 1884 phost_info = &preg_hsi->hsi; 1885 memset(preg_hsi, 0, sizeof(struct register_host_info)); 1886 phost_info->os_type = OS_TYPE_LINUX; 1887 strncpy(phost_info->sysname, 1888 p_sysid->sysname, SYSNAME_LENGTH); 1889 strncpy(phost_info->nodename, 1890 p_sysid->nodename, NODENAME_LENGTH); 1891 strncpy(phost_info->release, 1892 p_sysid->release, RELEASE_LENGTH); 1893 strncpy(phost_info->version, 1894 p_sysid->version, VERSION_LENGTH); 1895 strncpy(phost_info->machine, 1896 p_sysid->machine, MACHINE_LENGTH); 1897 strncpy(phost_info->domainname, 1898 p_sysid->domainname, DOMNAME_LENGTH); 1899 strncpy(phost_info->hostdriver, 1900 QLA2XXX_VERSION, VERSION_LENGTH); 1901 do_gettimeofday(&tv); 1902 preg_hsi->utc = (uint64_t)tv.tv_sec; 1903 ql_dbg(ql_dbg_init, vha, 0x0149, 1904 "ISP%04X: Host registration with firmware\n", 1905 ha->pdev->device); 1906 ql_dbg(ql_dbg_init, vha, 0x014a, 1907 "os_type = '%d', sysname = '%s', nodname = '%s'\n", 1908 phost_info->os_type, 1909 phost_info->sysname, 1910 phost_info->nodename); 1911 ql_dbg(ql_dbg_init, vha, 0x014b, 1912 "release = '%s', version = '%s'\n", 1913 phost_info->release, 1914 phost_info->version); 1915 ql_dbg(ql_dbg_init, vha, 0x014c, 1916 "machine = '%s' " 1917 "domainname = '%s', hostdriver = '%s'\n", 1918 phost_info->machine, 1919 phost_info->domainname, 1920 phost_info->hostdriver); 1921 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d, 1922 (uint8_t *)phost_info, 1923 sizeof(struct host_system_info)); 1924 } 1925 } 1926 1927 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) { 1928 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev, 1929 fdisc->u.fxiocb.rsp_len, 1930 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL); 1931 if (!fdisc->u.fxiocb.rsp_addr) 1932 goto done_unmap_req; 1933 } 1934 1935 sp->type = SRB_FXIOCB_DCMD; 1936 sp->name = "fxdisc"; 1937 qla2x00_init_timer(sp, FXDISC_TIMEOUT); 1938 fdisc->timeout = qla2x00_fxdisc_iocb_timeout; 1939 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type); 1940 sp->done = qla2x00_fxdisc_sp_done; 1941 1942 rval = qla2x00_start_sp(sp); 1943 if (rval != QLA_SUCCESS) 1944 goto done_unmap_dma; 1945 1946 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp); 1947 1948 if (fx_type == FXDISC_GET_CONFIG_INFO) { 1949 struct config_info_data *pinfo = 1950 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr; 1951 memcpy(&vha->hw->mr.product_name, pinfo->product_name, 1952 sizeof(vha->hw->mr.product_name)); 1953 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name, 1954 sizeof(vha->hw->mr.symbolic_name)); 1955 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num, 1956 sizeof(vha->hw->mr.serial_num)); 1957 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version, 1958 sizeof(vha->hw->mr.hw_version)); 1959 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version, 1960 sizeof(vha->hw->mr.fw_version)); 1961 strim(vha->hw->mr.fw_version); 1962 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version, 1963 sizeof(vha->hw->mr.uboot_version)); 1964 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num, 1965 sizeof(vha->hw->mr.fru_serial_num)); 1966 vha->hw->mr.critical_temperature = 1967 (pinfo->nominal_temp_value) ? 1968 pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD; 1969 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities & 1970 QLAFX00_EXTENDED_IO_EN_MASK) != 0; 1971 } else if (fx_type == FXDISC_GET_PORT_INFO) { 1972 struct port_info_data *pinfo = 1973 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr; 1974 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE); 1975 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE); 1976 vha->d_id.b.domain = pinfo->port_id[0]; 1977 vha->d_id.b.area = pinfo->port_id[1]; 1978 vha->d_id.b.al_pa = pinfo->port_id[2]; 1979 qlafx00_update_host_attr(vha, pinfo); 1980 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141, 1981 (uint8_t *)pinfo, 16); 1982 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) { 1983 struct qlafx00_tgt_node_info *pinfo = 1984 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr; 1985 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE); 1986 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE); 1987 fcport->port_type = FCT_TARGET; 1988 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144, 1989 (uint8_t *)pinfo, 16); 1990 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) { 1991 struct qlafx00_tgt_node_info *pinfo = 1992 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr; 1993 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146, 1994 (uint8_t *)pinfo, 16); 1995 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE); 1996 } 1997 rval = le32_to_cpu(fdisc->u.fxiocb.result); 1998 1999 done_unmap_dma: 2000 if (fdisc->u.fxiocb.rsp_addr) 2001 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len, 2002 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle); 2003 2004 done_unmap_req: 2005 if (fdisc->u.fxiocb.req_addr) 2006 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len, 2007 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle); 2008 done_free_sp: 2009 sp->free(vha, sp); 2010 done: 2011 return rval; 2012 } 2013 2014 static void 2015 qlafx00_abort_iocb_timeout(void *data) 2016 { 2017 srb_t *sp = (srb_t *)data; 2018 struct srb_iocb *abt = &sp->u.iocb_cmd; 2019 2020 abt->u.abt.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT); 2021 complete(&abt->u.abt.comp); 2022 } 2023 2024 static void 2025 qlafx00_abort_sp_done(void *data, void *ptr, int res) 2026 { 2027 srb_t *sp = (srb_t *)ptr; 2028 struct srb_iocb *abt = &sp->u.iocb_cmd; 2029 2030 complete(&abt->u.abt.comp); 2031 } 2032 2033 static int 2034 qlafx00_async_abt_cmd(srb_t *cmd_sp) 2035 { 2036 scsi_qla_host_t *vha = cmd_sp->fcport->vha; 2037 fc_port_t *fcport = cmd_sp->fcport; 2038 struct srb_iocb *abt_iocb; 2039 srb_t *sp; 2040 int rval = QLA_FUNCTION_FAILED; 2041 2042 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 2043 if (!sp) 2044 goto done; 2045 2046 abt_iocb = &sp->u.iocb_cmd; 2047 sp->type = SRB_ABT_CMD; 2048 sp->name = "abort"; 2049 qla2x00_init_timer(sp, FXDISC_TIMEOUT); 2050 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 2051 sp->done = qlafx00_abort_sp_done; 2052 abt_iocb->timeout = qlafx00_abort_iocb_timeout; 2053 init_completion(&abt_iocb->u.abt.comp); 2054 2055 rval = qla2x00_start_sp(sp); 2056 if (rval != QLA_SUCCESS) 2057 goto done_free_sp; 2058 2059 ql_dbg(ql_dbg_async, vha, 0x507c, 2060 "Abort command issued - hdl=%x, target_id=%x\n", 2061 cmd_sp->handle, fcport->tgt_id); 2062 2063 wait_for_completion(&abt_iocb->u.abt.comp); 2064 2065 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 2066 QLA_SUCCESS : QLA_FUNCTION_FAILED; 2067 2068 done_free_sp: 2069 sp->free(vha, sp); 2070 done: 2071 return rval; 2072 } 2073 2074 int 2075 qlafx00_abort_command(srb_t *sp) 2076 { 2077 unsigned long flags = 0; 2078 2079 uint32_t handle; 2080 fc_port_t *fcport = sp->fcport; 2081 struct scsi_qla_host *vha = fcport->vha; 2082 struct qla_hw_data *ha = vha->hw; 2083 struct req_que *req = vha->req; 2084 2085 spin_lock_irqsave(&ha->hardware_lock, flags); 2086 for (handle = 1; handle < DEFAULT_OUTSTANDING_COMMANDS; handle++) { 2087 if (req->outstanding_cmds[handle] == sp) 2088 break; 2089 } 2090 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2091 if (handle == DEFAULT_OUTSTANDING_COMMANDS) { 2092 /* Command not found. */ 2093 return QLA_FUNCTION_FAILED; 2094 } 2095 return qlafx00_async_abt_cmd(sp); 2096 } 2097 2098 /* 2099 * qlafx00_initialize_adapter 2100 * Initialize board. 2101 * 2102 * Input: 2103 * ha = adapter block pointer. 2104 * 2105 * Returns: 2106 * 0 = success 2107 */ 2108 int 2109 qlafx00_initialize_adapter(scsi_qla_host_t *vha) 2110 { 2111 int rval; 2112 struct qla_hw_data *ha = vha->hw; 2113 uint32_t tempc; 2114 2115 /* Clear adapter flags. */ 2116 vha->flags.online = 0; 2117 ha->flags.chip_reset_done = 0; 2118 vha->flags.reset_active = 0; 2119 ha->flags.pci_channel_io_perm_failure = 0; 2120 ha->flags.eeh_busy = 0; 2121 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2122 atomic_set(&vha->loop_state, LOOP_DOWN); 2123 vha->device_flags = DFLG_NO_CABLE; 2124 vha->dpc_flags = 0; 2125 vha->flags.management_server_logged_in = 0; 2126 vha->marker_needed = 0; 2127 ha->isp_abort_cnt = 0; 2128 ha->beacon_blink_led = 0; 2129 2130 set_bit(0, ha->req_qid_map); 2131 set_bit(0, ha->rsp_qid_map); 2132 2133 ql_dbg(ql_dbg_init, vha, 0x0147, 2134 "Configuring PCI space...\n"); 2135 2136 rval = ha->isp_ops->pci_config(vha); 2137 if (rval) { 2138 ql_log(ql_log_warn, vha, 0x0148, 2139 "Unable to configure PCI space.\n"); 2140 return rval; 2141 } 2142 2143 rval = qlafx00_init_fw_ready(vha); 2144 if (rval != QLA_SUCCESS) 2145 return rval; 2146 2147 qlafx00_save_queue_ptrs(vha); 2148 2149 rval = qlafx00_config_queues(vha); 2150 if (rval != QLA_SUCCESS) 2151 return rval; 2152 2153 /* 2154 * Allocate the array of outstanding commands 2155 * now that we know the firmware resources. 2156 */ 2157 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req); 2158 if (rval != QLA_SUCCESS) 2159 return rval; 2160 2161 rval = qla2x00_init_rings(vha); 2162 ha->flags.chip_reset_done = 1; 2163 2164 tempc = QLAFX00_GET_TEMPERATURE(ha); 2165 ql_dbg(ql_dbg_init, vha, 0x0152, 2166 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n", 2167 __func__, tempc); 2168 2169 return rval; 2170 } 2171 2172 uint32_t 2173 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr, 2174 char *buf) 2175 { 2176 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); 2177 int rval = QLA_FUNCTION_FAILED; 2178 uint32_t state[1]; 2179 2180 if (qla2x00_reset_active(vha)) 2181 ql_log(ql_log_warn, vha, 0x70ce, 2182 "ISP reset active.\n"); 2183 else if (!vha->hw->flags.eeh_busy) { 2184 rval = qlafx00_get_firmware_state(vha, state); 2185 } 2186 if (rval != QLA_SUCCESS) 2187 memset(state, -1, sizeof(state)); 2188 2189 return state[0]; 2190 } 2191 2192 void 2193 qlafx00_get_host_speed(struct Scsi_Host *shost) 2194 { 2195 struct qla_hw_data *ha = ((struct scsi_qla_host *) 2196 (shost_priv(shost)))->hw; 2197 u32 speed = FC_PORTSPEED_UNKNOWN; 2198 2199 switch (ha->link_data_rate) { 2200 case QLAFX00_PORT_SPEED_2G: 2201 speed = FC_PORTSPEED_2GBIT; 2202 break; 2203 case QLAFX00_PORT_SPEED_4G: 2204 speed = FC_PORTSPEED_4GBIT; 2205 break; 2206 case QLAFX00_PORT_SPEED_8G: 2207 speed = FC_PORTSPEED_8GBIT; 2208 break; 2209 case QLAFX00_PORT_SPEED_10G: 2210 speed = FC_PORTSPEED_10GBIT; 2211 break; 2212 } 2213 fc_host_speed(shost) = speed; 2214 } 2215 2216 /** QLAFX00 specific ISR implementation functions */ 2217 2218 static inline void 2219 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, 2220 uint32_t sense_len, struct rsp_que *rsp, int res) 2221 { 2222 struct scsi_qla_host *vha = sp->fcport->vha; 2223 struct scsi_cmnd *cp = GET_CMD_SP(sp); 2224 uint32_t track_sense_len; 2225 2226 SET_FW_SENSE_LEN(sp, sense_len); 2227 2228 if (sense_len >= SCSI_SENSE_BUFFERSIZE) 2229 sense_len = SCSI_SENSE_BUFFERSIZE; 2230 2231 SET_CMD_SENSE_LEN(sp, sense_len); 2232 SET_CMD_SENSE_PTR(sp, cp->sense_buffer); 2233 track_sense_len = sense_len; 2234 2235 if (sense_len > par_sense_len) 2236 sense_len = par_sense_len; 2237 2238 memcpy(cp->sense_buffer, sense_data, sense_len); 2239 2240 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len); 2241 2242 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); 2243 track_sense_len -= sense_len; 2244 SET_CMD_SENSE_LEN(sp, track_sense_len); 2245 2246 ql_dbg(ql_dbg_io, vha, 0x304d, 2247 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n", 2248 sense_len, par_sense_len, track_sense_len); 2249 if (GET_FW_SENSE_LEN(sp) > 0) { 2250 rsp->status_srb = sp; 2251 cp->result = res; 2252 } 2253 2254 if (sense_len) { 2255 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039, 2256 "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n", 2257 sp->fcport->vha->host_no, cp->device->id, cp->device->lun, 2258 cp); 2259 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049, 2260 cp->sense_buffer, sense_len); 2261 } 2262 } 2263 2264 static void 2265 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2266 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp, 2267 __le16 sstatus, __le16 cpstatus) 2268 { 2269 struct srb_iocb *tmf; 2270 2271 tmf = &sp->u.iocb_cmd; 2272 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) || 2273 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID))) 2274 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE); 2275 tmf->u.tmf.comp_status = cpstatus; 2276 sp->done(vha, sp, 0); 2277 } 2278 2279 static void 2280 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2281 struct abort_iocb_entry_fx00 *pkt) 2282 { 2283 const char func[] = "ABT_IOCB"; 2284 srb_t *sp; 2285 struct srb_iocb *abt; 2286 2287 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2288 if (!sp) 2289 return; 2290 2291 abt = &sp->u.iocb_cmd; 2292 abt->u.abt.comp_status = pkt->tgt_id_sts; 2293 sp->done(vha, sp, 0); 2294 } 2295 2296 static void 2297 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req, 2298 struct ioctl_iocb_entry_fx00 *pkt) 2299 { 2300 const char func[] = "IOSB_IOCB"; 2301 srb_t *sp; 2302 struct fc_bsg_job *bsg_job; 2303 struct srb_iocb *iocb_job; 2304 int res; 2305 struct qla_mt_iocb_rsp_fx00 fstatus; 2306 uint8_t *fw_sts_ptr; 2307 2308 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2309 if (!sp) 2310 return; 2311 2312 if (sp->type == SRB_FXIOCB_DCMD) { 2313 iocb_job = &sp->u.iocb_cmd; 2314 iocb_job->u.fxiocb.seq_number = pkt->seq_no; 2315 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags; 2316 iocb_job->u.fxiocb.result = pkt->status; 2317 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID) 2318 iocb_job->u.fxiocb.req_data = 2319 pkt->dataword_r; 2320 } else { 2321 bsg_job = sp->u.bsg_job; 2322 2323 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00)); 2324 2325 fstatus.reserved_1 = pkt->reserved_0; 2326 fstatus.func_type = pkt->comp_func_num; 2327 fstatus.ioctl_flags = pkt->fw_iotcl_flags; 2328 fstatus.ioctl_data = pkt->dataword_r; 2329 fstatus.adapid = pkt->adapid; 2330 fstatus.adapid_hi = pkt->adapid_hi; 2331 fstatus.reserved_2 = pkt->reserved_1; 2332 fstatus.res_count = pkt->residuallen; 2333 fstatus.status = pkt->status; 2334 fstatus.seq_number = pkt->seq_no; 2335 memcpy(fstatus.reserved_3, 2336 pkt->reserved_2, 20 * sizeof(uint8_t)); 2337 2338 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) + 2339 sizeof(struct fc_bsg_reply); 2340 2341 memcpy(fw_sts_ptr, (uint8_t *)&fstatus, 2342 sizeof(struct qla_mt_iocb_rsp_fx00)); 2343 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + 2344 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t); 2345 2346 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 2347 sp->fcport->vha, 0x5080, 2348 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00)); 2349 2350 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 2351 sp->fcport->vha, 0x5074, 2352 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00)); 2353 2354 res = bsg_job->reply->result = DID_OK << 16; 2355 bsg_job->reply->reply_payload_rcv_len = 2356 bsg_job->reply_payload.payload_len; 2357 } 2358 sp->done(vha, sp, res); 2359 } 2360 2361 /** 2362 * qlafx00_status_entry() - Process a Status IOCB entry. 2363 * @ha: SCSI driver HA context 2364 * @pkt: Entry pointer 2365 */ 2366 static void 2367 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) 2368 { 2369 srb_t *sp; 2370 fc_port_t *fcport; 2371 struct scsi_cmnd *cp; 2372 struct sts_entry_fx00 *sts; 2373 __le16 comp_status; 2374 __le16 scsi_status; 2375 uint16_t ox_id; 2376 __le16 lscsi_status; 2377 int32_t resid; 2378 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, 2379 fw_resid_len; 2380 uint8_t *rsp_info = NULL, *sense_data = NULL; 2381 struct qla_hw_data *ha = vha->hw; 2382 uint32_t hindex, handle; 2383 uint16_t que; 2384 struct req_que *req; 2385 int logit = 1; 2386 int res = 0; 2387 2388 sts = (struct sts_entry_fx00 *) pkt; 2389 2390 comp_status = sts->comp_status; 2391 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK); 2392 hindex = sts->handle; 2393 handle = LSW(hindex); 2394 2395 que = MSW(hindex); 2396 req = ha->req_q_map[que]; 2397 2398 /* Validate handle. */ 2399 if (handle < req->num_outstanding_cmds) 2400 sp = req->outstanding_cmds[handle]; 2401 else 2402 sp = NULL; 2403 2404 if (sp == NULL) { 2405 ql_dbg(ql_dbg_io, vha, 0x3034, 2406 "Invalid status handle (0x%x).\n", handle); 2407 2408 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2409 qla2xxx_wake_dpc(vha); 2410 return; 2411 } 2412 2413 if (sp->type == SRB_TM_CMD) { 2414 req->outstanding_cmds[handle] = NULL; 2415 qlafx00_tm_iocb_entry(vha, req, pkt, sp, 2416 scsi_status, comp_status); 2417 return; 2418 } 2419 2420 /* Fast path completion. */ 2421 if (comp_status == CS_COMPLETE && scsi_status == 0) { 2422 qla2x00_do_host_ramp_up(vha); 2423 qla2x00_process_completed_request(vha, req, handle); 2424 return; 2425 } 2426 2427 req->outstanding_cmds[handle] = NULL; 2428 cp = GET_CMD_SP(sp); 2429 if (cp == NULL) { 2430 ql_dbg(ql_dbg_io, vha, 0x3048, 2431 "Command already returned (0x%x/%p).\n", 2432 handle, sp); 2433 2434 return; 2435 } 2436 2437 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK); 2438 2439 fcport = sp->fcport; 2440 2441 ox_id = 0; 2442 sense_len = par_sense_len = rsp_info_len = resid_len = 2443 fw_resid_len = 0; 2444 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)) 2445 sense_len = sts->sense_len; 2446 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER 2447 | (uint16_t)SS_RESIDUAL_OVER))) 2448 resid_len = le32_to_cpu(sts->residual_len); 2449 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN)) 2450 fw_resid_len = le32_to_cpu(sts->residual_len); 2451 rsp_info = sense_data = sts->data; 2452 par_sense_len = sizeof(sts->data); 2453 2454 /* Check for overrun. */ 2455 if (comp_status == CS_COMPLETE && 2456 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER)) 2457 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN); 2458 2459 /* 2460 * Based on Host and scsi status generate status code for Linux 2461 */ 2462 switch (le16_to_cpu(comp_status)) { 2463 case CS_COMPLETE: 2464 case CS_QUEUE_FULL: 2465 if (scsi_status == 0) { 2466 res = DID_OK << 16; 2467 break; 2468 } 2469 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER 2470 | (uint16_t)SS_RESIDUAL_OVER))) { 2471 resid = resid_len; 2472 scsi_set_resid(cp, resid); 2473 2474 if (!lscsi_status && 2475 ((unsigned)(scsi_bufflen(cp) - resid) < 2476 cp->underflow)) { 2477 ql_dbg(ql_dbg_io, fcport->vha, 0x3050, 2478 "Mid-layer underflow " 2479 "detected (0x%x of 0x%x bytes).\n", 2480 resid, scsi_bufflen(cp)); 2481 2482 res = DID_ERROR << 16; 2483 break; 2484 } 2485 } 2486 res = DID_OK << 16 | le16_to_cpu(lscsi_status); 2487 2488 if (lscsi_status == 2489 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) { 2490 ql_dbg(ql_dbg_io, fcport->vha, 0x3051, 2491 "QUEUE FULL detected.\n"); 2492 break; 2493 } 2494 logit = 0; 2495 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION)) 2496 break; 2497 2498 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 2499 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))) 2500 break; 2501 2502 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len, 2503 rsp, res); 2504 break; 2505 2506 case CS_DATA_UNDERRUN: 2507 /* Use F/W calculated residual length. */ 2508 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) 2509 resid = fw_resid_len; 2510 else 2511 resid = resid_len; 2512 scsi_set_resid(cp, resid); 2513 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) { 2514 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) 2515 && fw_resid_len != resid_len) { 2516 ql_dbg(ql_dbg_io, fcport->vha, 0x3052, 2517 "Dropped frame(s) detected " 2518 "(0x%x of 0x%x bytes).\n", 2519 resid, scsi_bufflen(cp)); 2520 2521 res = DID_ERROR << 16 | 2522 le16_to_cpu(lscsi_status); 2523 goto check_scsi_status; 2524 } 2525 2526 if (!lscsi_status && 2527 ((unsigned)(scsi_bufflen(cp) - resid) < 2528 cp->underflow)) { 2529 ql_dbg(ql_dbg_io, fcport->vha, 0x3053, 2530 "Mid-layer underflow " 2531 "detected (0x%x of 0x%x bytes, " 2532 "cp->underflow: 0x%x).\n", 2533 resid, scsi_bufflen(cp), cp->underflow); 2534 2535 res = DID_ERROR << 16; 2536 break; 2537 } 2538 } else if (lscsi_status != 2539 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) && 2540 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) { 2541 /* 2542 * scsi status of task set and busy are considered 2543 * to be task not completed. 2544 */ 2545 2546 ql_dbg(ql_dbg_io, fcport->vha, 0x3054, 2547 "Dropped frame(s) detected (0x%x " 2548 "of 0x%x bytes).\n", resid, 2549 scsi_bufflen(cp)); 2550 2551 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status); 2552 goto check_scsi_status; 2553 } else { 2554 ql_dbg(ql_dbg_io, fcport->vha, 0x3055, 2555 "scsi_status: 0x%x, lscsi_status: 0x%x\n", 2556 scsi_status, lscsi_status); 2557 } 2558 2559 res = DID_OK << 16 | le16_to_cpu(lscsi_status); 2560 logit = 0; 2561 2562 check_scsi_status: 2563 /* 2564 * Check to see if SCSI Status is non zero. If so report SCSI 2565 * Status. 2566 */ 2567 if (lscsi_status != 0) { 2568 if (lscsi_status == 2569 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) { 2570 ql_dbg(ql_dbg_io, fcport->vha, 0x3056, 2571 "QUEUE FULL detected.\n"); 2572 logit = 1; 2573 break; 2574 } 2575 if (lscsi_status != 2576 cpu_to_le16((uint16_t)SS_CHECK_CONDITION)) 2577 break; 2578 2579 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 2580 if (!(scsi_status & 2581 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))) 2582 break; 2583 2584 qlafx00_handle_sense(sp, sense_data, par_sense_len, 2585 sense_len, rsp, res); 2586 } 2587 break; 2588 2589 case CS_PORT_LOGGED_OUT: 2590 case CS_PORT_CONFIG_CHG: 2591 case CS_PORT_BUSY: 2592 case CS_INCOMPLETE: 2593 case CS_PORT_UNAVAILABLE: 2594 case CS_TIMEOUT: 2595 case CS_RESET: 2596 2597 /* 2598 * We are going to have the fc class block the rport 2599 * while we try to recover so instruct the mid layer 2600 * to requeue until the class decides how to handle this. 2601 */ 2602 res = DID_TRANSPORT_DISRUPTED << 16; 2603 2604 ql_dbg(ql_dbg_io, fcport->vha, 0x3057, 2605 "Port down status: port-state=0x%x.\n", 2606 atomic_read(&fcport->state)); 2607 2608 if (atomic_read(&fcport->state) == FCS_ONLINE) 2609 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); 2610 break; 2611 2612 case CS_ABORTED: 2613 res = DID_RESET << 16; 2614 break; 2615 2616 default: 2617 res = DID_ERROR << 16; 2618 break; 2619 } 2620 2621 if (logit) 2622 ql_dbg(ql_dbg_io, fcport->vha, 0x3058, 2623 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%d " 2624 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x " 2625 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sense_len=0x%x, " 2626 "par_sense_len=0x%x, rsp_info_len=0x%x\n", 2627 comp_status, scsi_status, res, vha->host_no, 2628 cp->device->id, cp->device->lun, fcport->tgt_id, 2629 lscsi_status, cp->cmnd, scsi_bufflen(cp), 2630 rsp_info_len, resid_len, fw_resid_len, sense_len, 2631 par_sense_len, rsp_info_len); 2632 2633 if (!res) 2634 qla2x00_do_host_ramp_up(vha); 2635 2636 if (rsp->status_srb == NULL) 2637 sp->done(ha, sp, res); 2638 } 2639 2640 /** 2641 * qlafx00_status_cont_entry() - Process a Status Continuations entry. 2642 * @ha: SCSI driver HA context 2643 * @pkt: Entry pointer 2644 * 2645 * Extended sense data. 2646 */ 2647 static void 2648 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) 2649 { 2650 uint8_t sense_sz = 0; 2651 struct qla_hw_data *ha = rsp->hw; 2652 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); 2653 srb_t *sp = rsp->status_srb; 2654 struct scsi_cmnd *cp; 2655 uint32_t sense_len; 2656 uint8_t *sense_ptr; 2657 2658 if (!sp) { 2659 ql_dbg(ql_dbg_io, vha, 0x3037, 2660 "no SP, sp = %p\n", sp); 2661 return; 2662 } 2663 2664 if (!GET_FW_SENSE_LEN(sp)) { 2665 ql_dbg(ql_dbg_io, vha, 0x304b, 2666 "no fw sense data, sp = %p\n", sp); 2667 return; 2668 } 2669 cp = GET_CMD_SP(sp); 2670 if (cp == NULL) { 2671 ql_log(ql_log_warn, vha, 0x303b, 2672 "cmd is NULL: already returned to OS (sp=%p).\n", sp); 2673 2674 rsp->status_srb = NULL; 2675 return; 2676 } 2677 2678 if (!GET_CMD_SENSE_LEN(sp)) { 2679 ql_dbg(ql_dbg_io, vha, 0x304c, 2680 "no sense data, sp = %p\n", sp); 2681 } else { 2682 sense_len = GET_CMD_SENSE_LEN(sp); 2683 sense_ptr = GET_CMD_SENSE_PTR(sp); 2684 ql_dbg(ql_dbg_io, vha, 0x304f, 2685 "sp=%p sense_len=0x%x sense_ptr=%p.\n", 2686 sp, sense_len, sense_ptr); 2687 2688 if (sense_len > sizeof(pkt->data)) 2689 sense_sz = sizeof(pkt->data); 2690 else 2691 sense_sz = sense_len; 2692 2693 /* Move sense data. */ 2694 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e, 2695 (uint8_t *)pkt, sizeof(sts_cont_entry_t)); 2696 memcpy(sense_ptr, pkt->data, sense_sz); 2697 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a, 2698 sense_ptr, sense_sz); 2699 2700 sense_len -= sense_sz; 2701 sense_ptr += sense_sz; 2702 2703 SET_CMD_SENSE_PTR(sp, sense_ptr); 2704 SET_CMD_SENSE_LEN(sp, sense_len); 2705 } 2706 sense_len = GET_FW_SENSE_LEN(sp); 2707 sense_len = (sense_len > sizeof(pkt->data)) ? 2708 (sense_len - sizeof(pkt->data)) : 0; 2709 SET_FW_SENSE_LEN(sp, sense_len); 2710 2711 /* Place command on done queue. */ 2712 if (sense_len == 0) { 2713 rsp->status_srb = NULL; 2714 sp->done(ha, sp, cp->result); 2715 } 2716 } 2717 2718 /** 2719 * qlafx00_multistatus_entry() - Process Multi response queue entries. 2720 * @ha: SCSI driver HA context 2721 */ 2722 static void 2723 qlafx00_multistatus_entry(struct scsi_qla_host *vha, 2724 struct rsp_que *rsp, void *pkt) 2725 { 2726 srb_t *sp; 2727 struct multi_sts_entry_fx00 *stsmfx; 2728 struct qla_hw_data *ha = vha->hw; 2729 uint32_t handle, hindex, handle_count, i; 2730 uint16_t que; 2731 struct req_que *req; 2732 __le32 *handle_ptr; 2733 2734 stsmfx = (struct multi_sts_entry_fx00 *) pkt; 2735 2736 handle_count = stsmfx->handle_count; 2737 2738 if (handle_count > MAX_HANDLE_COUNT) { 2739 ql_dbg(ql_dbg_io, vha, 0x3035, 2740 "Invalid handle count (0x%x).\n", handle_count); 2741 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2742 qla2xxx_wake_dpc(vha); 2743 return; 2744 } 2745 2746 handle_ptr = &stsmfx->handles[0]; 2747 2748 for (i = 0; i < handle_count; i++) { 2749 hindex = le32_to_cpu(*handle_ptr); 2750 handle = LSW(hindex); 2751 que = MSW(hindex); 2752 req = ha->req_q_map[que]; 2753 2754 /* Validate handle. */ 2755 if (handle < req->num_outstanding_cmds) 2756 sp = req->outstanding_cmds[handle]; 2757 else 2758 sp = NULL; 2759 2760 if (sp == NULL) { 2761 ql_dbg(ql_dbg_io, vha, 0x3044, 2762 "Invalid status handle (0x%x).\n", handle); 2763 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2764 qla2xxx_wake_dpc(vha); 2765 return; 2766 } 2767 qla2x00_process_completed_request(vha, req, handle); 2768 handle_ptr++; 2769 } 2770 } 2771 2772 /** 2773 * qlafx00_error_entry() - Process an error entry. 2774 * @ha: SCSI driver HA context 2775 * @pkt: Entry pointer 2776 */ 2777 static void 2778 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, 2779 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype) 2780 { 2781 srb_t *sp; 2782 struct qla_hw_data *ha = vha->hw; 2783 const char func[] = "ERROR-IOCB"; 2784 uint16_t que = MSW(pkt->handle); 2785 struct req_que *req = NULL; 2786 int res = DID_ERROR << 16; 2787 2788 ql_dbg(ql_dbg_async, vha, 0x507f, 2789 "type of error status in response: 0x%x\n", estatus); 2790 2791 req = ha->req_q_map[que]; 2792 2793 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2794 if (sp) { 2795 sp->done(ha, sp, res); 2796 return; 2797 } 2798 2799 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2800 qla2xxx_wake_dpc(vha); 2801 } 2802 2803 /** 2804 * qlafx00_process_response_queue() - Process response queue entries. 2805 * @ha: SCSI driver HA context 2806 */ 2807 static void 2808 qlafx00_process_response_queue(struct scsi_qla_host *vha, 2809 struct rsp_que *rsp) 2810 { 2811 struct sts_entry_fx00 *pkt; 2812 response_t *lptr; 2813 2814 while (RD_REG_DWORD((void __iomem *)&(rsp->ring_ptr->signature)) != 2815 RESPONSE_PROCESSED) { 2816 lptr = rsp->ring_ptr; 2817 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr, 2818 sizeof(rsp->rsp_pkt)); 2819 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt; 2820 2821 rsp->ring_index++; 2822 if (rsp->ring_index == rsp->length) { 2823 rsp->ring_index = 0; 2824 rsp->ring_ptr = rsp->ring; 2825 } else { 2826 rsp->ring_ptr++; 2827 } 2828 2829 if (pkt->entry_status != 0 && 2830 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) { 2831 qlafx00_error_entry(vha, rsp, 2832 (struct sts_entry_fx00 *)pkt, pkt->entry_status, 2833 pkt->entry_type); 2834 goto next_iter; 2835 continue; 2836 } 2837 2838 switch (pkt->entry_type) { 2839 case STATUS_TYPE_FX00: 2840 qlafx00_status_entry(vha, rsp, pkt); 2841 break; 2842 2843 case STATUS_CONT_TYPE_FX00: 2844 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); 2845 break; 2846 2847 case MULTI_STATUS_TYPE_FX00: 2848 qlafx00_multistatus_entry(vha, rsp, pkt); 2849 break; 2850 2851 case ABORT_IOCB_TYPE_FX00: 2852 qlafx00_abort_iocb_entry(vha, rsp->req, 2853 (struct abort_iocb_entry_fx00 *)pkt); 2854 break; 2855 2856 case IOCTL_IOSB_TYPE_FX00: 2857 qlafx00_ioctl_iosb_entry(vha, rsp->req, 2858 (struct ioctl_iocb_entry_fx00 *)pkt); 2859 break; 2860 default: 2861 /* Type Not Supported. */ 2862 ql_dbg(ql_dbg_async, vha, 0x5081, 2863 "Received unknown response pkt type %x " 2864 "entry status=%x.\n", 2865 pkt->entry_type, pkt->entry_status); 2866 break; 2867 } 2868 next_iter: 2869 WRT_REG_DWORD((void __iomem *)&lptr->signature, 2870 RESPONSE_PROCESSED); 2871 wmb(); 2872 } 2873 2874 /* Adjust ring index */ 2875 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); 2876 } 2877 2878 /** 2879 * qlafx00_async_event() - Process aynchronous events. 2880 * @ha: SCSI driver HA context 2881 */ 2882 static void 2883 qlafx00_async_event(scsi_qla_host_t *vha) 2884 { 2885 struct qla_hw_data *ha = vha->hw; 2886 struct device_reg_fx00 __iomem *reg; 2887 int data_size = 1; 2888 2889 reg = &ha->iobase->ispfx00; 2890 /* Setup to process RIO completion. */ 2891 switch (ha->aenmb[0]) { 2892 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */ 2893 ql_log(ql_log_warn, vha, 0x5079, 2894 "ISP System Error - mbx1=%x\n", ha->aenmb[0]); 2895 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2896 break; 2897 2898 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */ 2899 ql_dbg(ql_dbg_async, vha, 0x5076, 2900 "Asynchronous FW shutdown requested.\n"); 2901 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2902 qla2xxx_wake_dpc(vha); 2903 break; 2904 2905 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */ 2906 ha->aenmb[1] = RD_REG_WORD(®->aenmailbox1); 2907 ha->aenmb[2] = RD_REG_WORD(®->aenmailbox2); 2908 ha->aenmb[3] = RD_REG_WORD(®->aenmailbox3); 2909 ql_dbg(ql_dbg_async, vha, 0x5077, 2910 "Asynchronous port Update received " 2911 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n", 2912 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]); 2913 data_size = 4; 2914 break; 2915 2916 case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */ 2917 ql_log(ql_log_info, vha, 0x5085, 2918 "Asynchronous over temperature event received " 2919 "aenmb[0]: %x\n", 2920 ha->aenmb[0]); 2921 break; 2922 2923 case QLAFX00_MBA_TEMP_NORM: /* Normal temperature event */ 2924 ql_log(ql_log_info, vha, 0x5086, 2925 "Asynchronous normal temperature event received " 2926 "aenmb[0]: %x\n", 2927 ha->aenmb[0]); 2928 break; 2929 2930 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */ 2931 ql_log(ql_log_info, vha, 0x5083, 2932 "Asynchronous critical temperature event received " 2933 "aenmb[0]: %x\n", 2934 ha->aenmb[0]); 2935 break; 2936 2937 default: 2938 ha->aenmb[1] = RD_REG_WORD(®->aenmailbox1); 2939 ha->aenmb[2] = RD_REG_WORD(®->aenmailbox2); 2940 ha->aenmb[3] = RD_REG_WORD(®->aenmailbox3); 2941 ha->aenmb[4] = RD_REG_WORD(®->aenmailbox4); 2942 ha->aenmb[5] = RD_REG_WORD(®->aenmailbox5); 2943 ha->aenmb[6] = RD_REG_WORD(®->aenmailbox6); 2944 ha->aenmb[7] = RD_REG_WORD(®->aenmailbox7); 2945 ql_dbg(ql_dbg_async, vha, 0x5078, 2946 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n", 2947 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3], 2948 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]); 2949 break; 2950 } 2951 qlafx00_post_aenfx_work(vha, ha->aenmb[0], 2952 (uint32_t *)ha->aenmb, data_size); 2953 } 2954 2955 /** 2956 * 2957 * qlafx00x_mbx_completion() - Process mailbox command completions. 2958 * @ha: SCSI driver HA context 2959 * @mb16: Mailbox16 register 2960 */ 2961 static void 2962 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0) 2963 { 2964 uint16_t cnt; 2965 uint16_t __iomem *wptr; 2966 struct qla_hw_data *ha = vha->hw; 2967 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 2968 2969 if (!ha->mcp32) 2970 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n"); 2971 2972 /* Load return mailbox registers. */ 2973 ha->flags.mbox_int = 1; 2974 ha->mailbox_out32[0] = mb0; 2975 wptr = (uint16_t __iomem *)®->mailbox17; 2976 2977 for (cnt = 1; cnt < ha->mbx_count; cnt++) { 2978 ha->mailbox_out32[cnt] = RD_REG_WORD(wptr); 2979 wptr++; 2980 } 2981 } 2982 2983 /** 2984 * qlafx00_intr_handler() - Process interrupts for the ISPFX00. 2985 * @irq: 2986 * @dev_id: SCSI driver HA context 2987 * 2988 * Called by system whenever the host adapter generates an interrupt. 2989 * 2990 * Returns handled flag. 2991 */ 2992 irqreturn_t 2993 qlafx00_intr_handler(int irq, void *dev_id) 2994 { 2995 scsi_qla_host_t *vha; 2996 struct qla_hw_data *ha; 2997 struct device_reg_fx00 __iomem *reg; 2998 int status; 2999 unsigned long iter; 3000 uint32_t stat; 3001 uint32_t mb[8]; 3002 struct rsp_que *rsp; 3003 unsigned long flags; 3004 uint32_t clr_intr = 0; 3005 3006 rsp = (struct rsp_que *) dev_id; 3007 if (!rsp) { 3008 ql_log(ql_log_info, NULL, 0x507d, 3009 "%s: NULL response queue pointer.\n", __func__); 3010 return IRQ_NONE; 3011 } 3012 3013 ha = rsp->hw; 3014 reg = &ha->iobase->ispfx00; 3015 status = 0; 3016 3017 if (unlikely(pci_channel_offline(ha->pdev))) 3018 return IRQ_HANDLED; 3019 3020 spin_lock_irqsave(&ha->hardware_lock, flags); 3021 vha = pci_get_drvdata(ha->pdev); 3022 for (iter = 50; iter--; clr_intr = 0) { 3023 stat = QLAFX00_RD_INTR_REG(ha); 3024 if ((stat & QLAFX00_HST_INT_STS_BITS) == 0) 3025 break; 3026 3027 switch (stat & QLAFX00_HST_INT_STS_BITS) { 3028 case QLAFX00_INTR_MB_CMPLT: 3029 case QLAFX00_INTR_MB_RSP_CMPLT: 3030 case QLAFX00_INTR_MB_ASYNC_CMPLT: 3031 case QLAFX00_INTR_ALL_CMPLT: 3032 mb[0] = RD_REG_WORD(®->mailbox16); 3033 qlafx00_mbx_completion(vha, mb[0]); 3034 status |= MBX_INTERRUPT; 3035 clr_intr |= QLAFX00_INTR_MB_CMPLT; 3036 break; 3037 case QLAFX00_INTR_ASYNC_CMPLT: 3038 case QLAFX00_INTR_RSP_ASYNC_CMPLT: 3039 ha->aenmb[0] = RD_REG_WORD(®->aenmailbox0); 3040 qlafx00_async_event(vha); 3041 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT; 3042 break; 3043 case QLAFX00_INTR_RSP_CMPLT: 3044 qlafx00_process_response_queue(vha, rsp); 3045 clr_intr |= QLAFX00_INTR_RSP_CMPLT; 3046 break; 3047 default: 3048 ql_dbg(ql_dbg_async, vha, 0x507a, 3049 "Unrecognized interrupt type (%d).\n", stat); 3050 break; 3051 } 3052 QLAFX00_CLR_INTR_REG(ha, clr_intr); 3053 QLAFX00_RD_INTR_REG(ha); 3054 } 3055 3056 qla2x00_handle_mbx_completion(ha, status); 3057 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3058 3059 return IRQ_HANDLED; 3060 } 3061 3062 /** QLAFX00 specific IOCB implementation functions */ 3063 3064 static inline cont_a64_entry_t * 3065 qlafx00_prep_cont_type1_iocb(struct req_que *req, 3066 cont_a64_entry_t *lcont_pkt) 3067 { 3068 cont_a64_entry_t *cont_pkt; 3069 3070 /* Adjust ring index. */ 3071 req->ring_index++; 3072 if (req->ring_index == req->length) { 3073 req->ring_index = 0; 3074 req->ring_ptr = req->ring; 3075 } else { 3076 req->ring_ptr++; 3077 } 3078 3079 cont_pkt = (cont_a64_entry_t *)req->ring_ptr; 3080 3081 /* Load packet defaults. */ 3082 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00; 3083 3084 return cont_pkt; 3085 } 3086 3087 static inline void 3088 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt, 3089 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt) 3090 { 3091 uint16_t avail_dsds; 3092 __le32 *cur_dsd; 3093 scsi_qla_host_t *vha; 3094 struct scsi_cmnd *cmd; 3095 struct scatterlist *sg; 3096 int i, cont; 3097 struct req_que *req; 3098 cont_a64_entry_t lcont_pkt; 3099 cont_a64_entry_t *cont_pkt; 3100 3101 vha = sp->fcport->vha; 3102 req = vha->req; 3103 3104 cmd = GET_CMD_SP(sp); 3105 cont = 0; 3106 cont_pkt = NULL; 3107 3108 /* Update entry type to indicate Command Type 3 IOCB */ 3109 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7; 3110 3111 /* No data transfer */ 3112 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) { 3113 lcmd_pkt->byte_count = __constant_cpu_to_le32(0); 3114 return; 3115 } 3116 3117 /* Set transfer direction */ 3118 if (cmd->sc_data_direction == DMA_TO_DEVICE) { 3119 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA; 3120 vha->qla_stats.output_bytes += scsi_bufflen(cmd); 3121 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) { 3122 lcmd_pkt->cntrl_flags = TMF_READ_DATA; 3123 vha->qla_stats.input_bytes += scsi_bufflen(cmd); 3124 } 3125 3126 /* One DSD is available in the Command Type 3 IOCB */ 3127 avail_dsds = 1; 3128 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address; 3129 3130 /* Load data segments */ 3131 scsi_for_each_sg(cmd, sg, tot_dsds, i) { 3132 dma_addr_t sle_dma; 3133 3134 /* Allocate additional continuation packets? */ 3135 if (avail_dsds == 0) { 3136 /* 3137 * Five DSDs are available in the Continuation 3138 * Type 1 IOCB. 3139 */ 3140 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE); 3141 cont_pkt = 3142 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt); 3143 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address; 3144 avail_dsds = 5; 3145 cont = 1; 3146 } 3147 3148 sle_dma = sg_dma_address(sg); 3149 *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); 3150 *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); 3151 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); 3152 avail_dsds--; 3153 if (avail_dsds == 0 && cont == 1) { 3154 cont = 0; 3155 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt, 3156 REQUEST_ENTRY_SIZE); 3157 } 3158 3159 } 3160 if (avail_dsds != 0 && cont == 1) { 3161 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt, 3162 REQUEST_ENTRY_SIZE); 3163 } 3164 } 3165 3166 /** 3167 * qlafx00_start_scsi() - Send a SCSI command to the ISP 3168 * @sp: command to send to the ISP 3169 * 3170 * Returns non-zero if a failure occurred, else zero. 3171 */ 3172 int 3173 qlafx00_start_scsi(srb_t *sp) 3174 { 3175 int ret, nseg; 3176 unsigned long flags; 3177 uint32_t index; 3178 uint32_t handle; 3179 uint16_t cnt; 3180 uint16_t req_cnt; 3181 uint16_t tot_dsds; 3182 struct req_que *req = NULL; 3183 struct rsp_que *rsp = NULL; 3184 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 3185 struct scsi_qla_host *vha = sp->fcport->vha; 3186 struct qla_hw_data *ha = vha->hw; 3187 struct cmd_type_7_fx00 *cmd_pkt; 3188 struct cmd_type_7_fx00 lcmd_pkt; 3189 struct scsi_lun llun; 3190 char tag[2]; 3191 3192 /* Setup device pointers. */ 3193 ret = 0; 3194 3195 rsp = ha->rsp_q_map[0]; 3196 req = vha->req; 3197 3198 /* So we know we haven't pci_map'ed anything yet */ 3199 tot_dsds = 0; 3200 3201 /* Forcing marker needed for now */ 3202 vha->marker_needed = 0; 3203 3204 /* Send marker if required */ 3205 if (vha->marker_needed != 0) { 3206 if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) != 3207 QLA_SUCCESS) 3208 return QLA_FUNCTION_FAILED; 3209 vha->marker_needed = 0; 3210 } 3211 3212 /* Acquire ring specific lock */ 3213 spin_lock_irqsave(&ha->hardware_lock, flags); 3214 3215 /* Check for room in outstanding command list. */ 3216 handle = req->current_outstanding_cmd; 3217 for (index = 1; index < req->num_outstanding_cmds; index++) { 3218 handle++; 3219 if (handle == req->num_outstanding_cmds) 3220 handle = 1; 3221 if (!req->outstanding_cmds[handle]) 3222 break; 3223 } 3224 if (index == req->num_outstanding_cmds) 3225 goto queuing_error; 3226 3227 /* Map the sg table so we have an accurate count of sg entries needed */ 3228 if (scsi_sg_count(cmd)) { 3229 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd), 3230 scsi_sg_count(cmd), cmd->sc_data_direction); 3231 if (unlikely(!nseg)) 3232 goto queuing_error; 3233 } else 3234 nseg = 0; 3235 3236 tot_dsds = nseg; 3237 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds); 3238 if (req->cnt < (req_cnt + 2)) { 3239 cnt = RD_REG_DWORD_RELAXED(req->req_q_out); 3240 3241 if (req->ring_index < cnt) 3242 req->cnt = cnt - req->ring_index; 3243 else 3244 req->cnt = req->length - 3245 (req->ring_index - cnt); 3246 if (req->cnt < (req_cnt + 2)) 3247 goto queuing_error; 3248 } 3249 3250 /* Build command packet. */ 3251 req->current_outstanding_cmd = handle; 3252 req->outstanding_cmds[handle] = sp; 3253 sp->handle = handle; 3254 cmd->host_scribble = (unsigned char *)(unsigned long)handle; 3255 req->cnt -= req_cnt; 3256 3257 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr; 3258 3259 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE); 3260 3261 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle); 3262 lcmd_pkt.handle_hi = 0; 3263 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds); 3264 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id); 3265 3266 int_to_scsilun(cmd->device->lun, &llun); 3267 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun, 3268 sizeof(lcmd_pkt.lun)); 3269 3270 /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */ 3271 if (scsi_populate_tag_msg(cmd, tag)) { 3272 switch (tag[0]) { 3273 case HEAD_OF_QUEUE_TAG: 3274 lcmd_pkt.task = TSK_HEAD_OF_QUEUE; 3275 break; 3276 case ORDERED_QUEUE_TAG: 3277 lcmd_pkt.task = TSK_ORDERED; 3278 break; 3279 } 3280 } 3281 3282 /* Load SCSI command packet. */ 3283 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb)); 3284 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd)); 3285 3286 /* Build IOCB segments */ 3287 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt); 3288 3289 /* Set total data segment count. */ 3290 lcmd_pkt.entry_count = (uint8_t)req_cnt; 3291 3292 /* Specify response queue number where completion should happen */ 3293 lcmd_pkt.entry_status = (uint8_t) rsp->id; 3294 3295 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e, 3296 (uint8_t *)cmd->cmnd, cmd->cmd_len); 3297 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032, 3298 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE); 3299 3300 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE); 3301 wmb(); 3302 3303 /* Adjust ring index. */ 3304 req->ring_index++; 3305 if (req->ring_index == req->length) { 3306 req->ring_index = 0; 3307 req->ring_ptr = req->ring; 3308 } else 3309 req->ring_ptr++; 3310 3311 sp->flags |= SRB_DMA_VALID; 3312 3313 /* Set chip new ring index. */ 3314 WRT_REG_DWORD(req->req_q_in, req->ring_index); 3315 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code); 3316 3317 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3318 return QLA_SUCCESS; 3319 3320 queuing_error: 3321 if (tot_dsds) 3322 scsi_dma_unmap(cmd); 3323 3324 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3325 3326 return QLA_FUNCTION_FAILED; 3327 } 3328 3329 void 3330 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb) 3331 { 3332 struct srb_iocb *fxio = &sp->u.iocb_cmd; 3333 scsi_qla_host_t *vha = sp->fcport->vha; 3334 struct req_que *req = vha->req; 3335 struct tsk_mgmt_entry_fx00 tm_iocb; 3336 struct scsi_lun llun; 3337 3338 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00)); 3339 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00; 3340 tm_iocb.entry_count = 1; 3341 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle)); 3342 tm_iocb.handle_hi = 0; 3343 tm_iocb.timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2); 3344 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id); 3345 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags); 3346 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) { 3347 int_to_scsilun(fxio->u.tmf.lun, &llun); 3348 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun, 3349 sizeof(struct scsi_lun)); 3350 } 3351 3352 memcpy((void *)ptm_iocb, &tm_iocb, 3353 sizeof(struct tsk_mgmt_entry_fx00)); 3354 wmb(); 3355 } 3356 3357 void 3358 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb) 3359 { 3360 struct srb_iocb *fxio = &sp->u.iocb_cmd; 3361 scsi_qla_host_t *vha = sp->fcport->vha; 3362 struct req_que *req = vha->req; 3363 struct abort_iocb_entry_fx00 abt_iocb; 3364 3365 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00)); 3366 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00; 3367 abt_iocb.entry_count = 1; 3368 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle)); 3369 abt_iocb.abort_handle = 3370 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl)); 3371 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id); 3372 abt_iocb.req_que_no = cpu_to_le16(req->id); 3373 3374 memcpy((void *)pabt_iocb, &abt_iocb, 3375 sizeof(struct abort_iocb_entry_fx00)); 3376 wmb(); 3377 } 3378 3379 void 3380 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb) 3381 { 3382 struct srb_iocb *fxio = &sp->u.iocb_cmd; 3383 struct qla_mt_iocb_rqst_fx00 *piocb_rqst; 3384 struct fc_bsg_job *bsg_job; 3385 struct fxdisc_entry_fx00 fx_iocb; 3386 uint8_t entry_cnt = 1; 3387 3388 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00)); 3389 fx_iocb.entry_type = FX00_IOCB_TYPE; 3390 fx_iocb.handle = cpu_to_le32(sp->handle); 3391 fx_iocb.entry_count = entry_cnt; 3392 3393 if (sp->type == SRB_FXIOCB_DCMD) { 3394 fx_iocb.func_num = 3395 sp->u.iocb_cmd.u.fxiocb.req_func_type; 3396 fx_iocb.adapid = fxio->u.fxiocb.adapter_id; 3397 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi; 3398 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0; 3399 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1; 3400 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra; 3401 3402 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) { 3403 fx_iocb.req_dsdcnt = cpu_to_le16(1); 3404 fx_iocb.req_xfrcnt = 3405 cpu_to_le16(fxio->u.fxiocb.req_len); 3406 fx_iocb.dseg_rq_address[0] = 3407 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle)); 3408 fx_iocb.dseg_rq_address[1] = 3409 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle)); 3410 fx_iocb.dseg_rq_len = 3411 cpu_to_le32(fxio->u.fxiocb.req_len); 3412 } 3413 3414 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) { 3415 fx_iocb.rsp_dsdcnt = cpu_to_le16(1); 3416 fx_iocb.rsp_xfrcnt = 3417 cpu_to_le16(fxio->u.fxiocb.rsp_len); 3418 fx_iocb.dseg_rsp_address[0] = 3419 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle)); 3420 fx_iocb.dseg_rsp_address[1] = 3421 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle)); 3422 fx_iocb.dseg_rsp_len = 3423 cpu_to_le32(fxio->u.fxiocb.rsp_len); 3424 } 3425 3426 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) { 3427 fx_iocb.dataword = fxio->u.fxiocb.req_data; 3428 } 3429 fx_iocb.flags = fxio->u.fxiocb.flags; 3430 } else { 3431 struct scatterlist *sg; 3432 bsg_job = sp->u.bsg_job; 3433 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *) 3434 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1]; 3435 3436 fx_iocb.func_num = piocb_rqst->func_type; 3437 fx_iocb.adapid = piocb_rqst->adapid; 3438 fx_iocb.adapid_hi = piocb_rqst->adapid_hi; 3439 fx_iocb.reserved_0 = piocb_rqst->reserved_0; 3440 fx_iocb.reserved_1 = piocb_rqst->reserved_1; 3441 fx_iocb.dataword_extra = piocb_rqst->dataword_extra; 3442 fx_iocb.dataword = piocb_rqst->dataword; 3443 fx_iocb.req_xfrcnt = piocb_rqst->req_len; 3444 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len; 3445 3446 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) { 3447 int avail_dsds, tot_dsds; 3448 cont_a64_entry_t lcont_pkt; 3449 cont_a64_entry_t *cont_pkt = NULL; 3450 __le32 *cur_dsd; 3451 int index = 0, cont = 0; 3452 3453 fx_iocb.req_dsdcnt = 3454 cpu_to_le16(bsg_job->request_payload.sg_cnt); 3455 tot_dsds = 3456 bsg_job->request_payload.sg_cnt; 3457 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0]; 3458 avail_dsds = 1; 3459 for_each_sg(bsg_job->request_payload.sg_list, sg, 3460 tot_dsds, index) { 3461 dma_addr_t sle_dma; 3462 3463 /* Allocate additional continuation packets? */ 3464 if (avail_dsds == 0) { 3465 /* 3466 * Five DSDs are available in the Cont. 3467 * Type 1 IOCB. 3468 */ 3469 memset(&lcont_pkt, 0, 3470 REQUEST_ENTRY_SIZE); 3471 cont_pkt = 3472 qlafx00_prep_cont_type1_iocb( 3473 sp->fcport->vha->req, 3474 &lcont_pkt); 3475 cur_dsd = (__le32 *) 3476 lcont_pkt.dseg_0_address; 3477 avail_dsds = 5; 3478 cont = 1; 3479 entry_cnt++; 3480 } 3481 3482 sle_dma = sg_dma_address(sg); 3483 *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); 3484 *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); 3485 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); 3486 avail_dsds--; 3487 3488 if (avail_dsds == 0 && cont == 1) { 3489 cont = 0; 3490 memcpy_toio( 3491 (void __iomem *)cont_pkt, 3492 &lcont_pkt, REQUEST_ENTRY_SIZE); 3493 ql_dump_buffer( 3494 ql_dbg_user + ql_dbg_verbose, 3495 sp->fcport->vha, 0x3042, 3496 (uint8_t *)&lcont_pkt, 3497 REQUEST_ENTRY_SIZE); 3498 } 3499 } 3500 if (avail_dsds != 0 && cont == 1) { 3501 memcpy_toio((void __iomem *)cont_pkt, 3502 &lcont_pkt, REQUEST_ENTRY_SIZE); 3503 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 3504 sp->fcport->vha, 0x3043, 3505 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE); 3506 } 3507 } 3508 3509 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) { 3510 int avail_dsds, tot_dsds; 3511 cont_a64_entry_t lcont_pkt; 3512 cont_a64_entry_t *cont_pkt = NULL; 3513 __le32 *cur_dsd; 3514 int index = 0, cont = 0; 3515 3516 fx_iocb.rsp_dsdcnt = 3517 cpu_to_le16(bsg_job->reply_payload.sg_cnt); 3518 tot_dsds = bsg_job->reply_payload.sg_cnt; 3519 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0]; 3520 avail_dsds = 1; 3521 3522 for_each_sg(bsg_job->reply_payload.sg_list, sg, 3523 tot_dsds, index) { 3524 dma_addr_t sle_dma; 3525 3526 /* Allocate additional continuation packets? */ 3527 if (avail_dsds == 0) { 3528 /* 3529 * Five DSDs are available in the Cont. 3530 * Type 1 IOCB. 3531 */ 3532 memset(&lcont_pkt, 0, 3533 REQUEST_ENTRY_SIZE); 3534 cont_pkt = 3535 qlafx00_prep_cont_type1_iocb( 3536 sp->fcport->vha->req, 3537 &lcont_pkt); 3538 cur_dsd = (__le32 *) 3539 lcont_pkt.dseg_0_address; 3540 avail_dsds = 5; 3541 cont = 1; 3542 entry_cnt++; 3543 } 3544 3545 sle_dma = sg_dma_address(sg); 3546 *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); 3547 *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); 3548 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); 3549 avail_dsds--; 3550 3551 if (avail_dsds == 0 && cont == 1) { 3552 cont = 0; 3553 memcpy_toio((void __iomem *)cont_pkt, 3554 &lcont_pkt, 3555 REQUEST_ENTRY_SIZE); 3556 ql_dump_buffer( 3557 ql_dbg_user + ql_dbg_verbose, 3558 sp->fcport->vha, 0x3045, 3559 (uint8_t *)&lcont_pkt, 3560 REQUEST_ENTRY_SIZE); 3561 } 3562 } 3563 if (avail_dsds != 0 && cont == 1) { 3564 memcpy_toio((void __iomem *)cont_pkt, 3565 &lcont_pkt, REQUEST_ENTRY_SIZE); 3566 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 3567 sp->fcport->vha, 0x3046, 3568 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE); 3569 } 3570 } 3571 3572 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID) 3573 fx_iocb.dataword = piocb_rqst->dataword; 3574 fx_iocb.flags = piocb_rqst->flags; 3575 fx_iocb.entry_count = entry_cnt; 3576 } 3577 3578 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 3579 sp->fcport->vha, 0x3047, 3580 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00)); 3581 3582 memcpy((void *)pfxiocb, &fx_iocb, 3583 sizeof(struct fxdisc_entry_fx00)); 3584 wmb(); 3585 } 3586