1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2013 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include <linux/delay.h> 9 #include <linux/pci.h> 10 #include <linux/ratelimit.h> 11 #include <linux/vmalloc.h> 12 #include <scsi/scsi_tcq.h> 13 #include <linux/utsname.h> 14 15 16 /* QLAFX00 specific Mailbox implementation functions */ 17 18 /* 19 * qlafx00_mailbox_command 20 * Issue mailbox command and waits for completion. 21 * 22 * Input: 23 * ha = adapter block pointer. 24 * mcp = driver internal mbx struct pointer. 25 * 26 * Output: 27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data. 28 * 29 * Returns: 30 * 0 : QLA_SUCCESS = cmd performed success 31 * 1 : QLA_FUNCTION_FAILED (error encountered) 32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered) 33 * 34 * Context: 35 * Kernel context. 36 */ 37 static int 38 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp) 39 40 { 41 int rval; 42 unsigned long flags = 0; 43 device_reg_t __iomem *reg; 44 uint8_t abort_active; 45 uint8_t io_lock_on; 46 uint16_t command = 0; 47 uint32_t *iptr; 48 uint32_t __iomem *optr; 49 uint32_t cnt; 50 uint32_t mboxes; 51 unsigned long wait_time; 52 struct qla_hw_data *ha = vha->hw; 53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 54 55 if (ha->pdev->error_state > pci_channel_io_frozen) { 56 ql_log(ql_log_warn, vha, 0x115c, 57 "error_state is greater than pci_channel_io_frozen, " 58 "exiting.\n"); 59 return QLA_FUNCTION_TIMEOUT; 60 } 61 62 if (vha->device_flags & DFLG_DEV_FAILED) { 63 ql_log(ql_log_warn, vha, 0x115f, 64 "Device in failed state, exiting.\n"); 65 return QLA_FUNCTION_TIMEOUT; 66 } 67 68 reg = ha->iobase; 69 io_lock_on = base_vha->flags.init_done; 70 71 rval = QLA_SUCCESS; 72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 73 74 if (ha->flags.pci_channel_io_perm_failure) { 75 ql_log(ql_log_warn, vha, 0x1175, 76 "Perm failure on EEH timeout MBX, exiting.\n"); 77 return QLA_FUNCTION_TIMEOUT; 78 } 79 80 if (ha->flags.isp82xx_fw_hung) { 81 /* Setting Link-Down error */ 82 mcp->mb[0] = MBS_LINK_DOWN_ERROR; 83 ql_log(ql_log_warn, vha, 0x1176, 84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); 85 rval = QLA_FUNCTION_FAILED; 86 goto premature_exit; 87 } 88 89 /* 90 * Wait for active mailbox commands to finish by waiting at most tov 91 * seconds. This is to serialize actual issuing of mailbox cmds during 92 * non ISP abort time. 93 */ 94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { 95 /* Timeout occurred. Return error. */ 96 ql_log(ql_log_warn, vha, 0x1177, 97 "Cmd access timeout, cmd=0x%x, Exiting.\n", 98 mcp->mb[0]); 99 return QLA_FUNCTION_TIMEOUT; 100 } 101 102 ha->flags.mbox_busy = 1; 103 /* Save mailbox command for debug */ 104 ha->mcp32 = mcp; 105 106 ql_dbg(ql_dbg_mbx, vha, 0x1178, 107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); 108 109 spin_lock_irqsave(&ha->hardware_lock, flags); 110 111 /* Load mailbox registers. */ 112 optr = (uint32_t __iomem *)®->ispfx00.mailbox0; 113 114 iptr = mcp->mb; 115 command = mcp->mb[0]; 116 mboxes = mcp->out_mb; 117 118 for (cnt = 0; cnt < ha->mbx_count; cnt++) { 119 if (mboxes & BIT_0) 120 WRT_REG_DWORD(optr, *iptr); 121 122 mboxes >>= 1; 123 optr++; 124 iptr++; 125 } 126 127 /* Issue set host interrupt command to send cmd out. */ 128 ha->flags.mbox_int = 0; 129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); 130 131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172, 132 (uint8_t *)mcp->mb, 16); 133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173, 134 ((uint8_t *)mcp->mb + 0x10), 16); 135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174, 136 ((uint8_t *)mcp->mb + 0x20), 8); 137 138 /* Unlock mbx registers and wait for interrupt */ 139 ql_dbg(ql_dbg_mbx, vha, 0x1179, 140 "Going to unlock irq & waiting for interrupts. " 141 "jiffies=%lx.\n", jiffies); 142 143 /* Wait for mbx cmd completion until timeout */ 144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { 145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 146 147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); 148 spin_unlock_irqrestore(&ha->hardware_lock, flags); 149 150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ); 151 } else { 152 ql_dbg(ql_dbg_mbx, vha, 0x112c, 153 "Cmd=%x Polling Mode.\n", command); 154 155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); 156 spin_unlock_irqrestore(&ha->hardware_lock, flags); 157 158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */ 159 while (!ha->flags.mbox_int) { 160 if (time_after(jiffies, wait_time)) 161 break; 162 163 /* Check for pending interrupts. */ 164 qla2x00_poll(ha->rsp_q_map[0]); 165 166 if (!ha->flags.mbox_int && 167 !(IS_QLA2200(ha) && 168 command == MBC_LOAD_RISC_RAM_EXTENDED)) 169 usleep_range(10000, 11000); 170 } /* while */ 171 ql_dbg(ql_dbg_mbx, vha, 0x112d, 172 "Waited %d sec.\n", 173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)); 174 } 175 176 /* Check whether we timed out */ 177 if (ha->flags.mbox_int) { 178 uint32_t *iptr2; 179 180 ql_dbg(ql_dbg_mbx, vha, 0x112e, 181 "Cmd=%x completed.\n", command); 182 183 /* Got interrupt. Clear the flag. */ 184 ha->flags.mbox_int = 0; 185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); 186 187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE) 188 rval = QLA_FUNCTION_FAILED; 189 190 /* Load return mailbox registers. */ 191 iptr2 = mcp->mb; 192 iptr = (uint32_t *)&ha->mailbox_out32[0]; 193 mboxes = mcp->in_mb; 194 for (cnt = 0; cnt < ha->mbx_count; cnt++) { 195 if (mboxes & BIT_0) 196 *iptr2 = *iptr; 197 198 mboxes >>= 1; 199 iptr2++; 200 iptr++; 201 } 202 } else { 203 204 rval = QLA_FUNCTION_TIMEOUT; 205 } 206 207 ha->flags.mbox_busy = 0; 208 209 /* Clean up */ 210 ha->mcp32 = NULL; 211 212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) { 213 ql_dbg(ql_dbg_mbx, vha, 0x113a, 214 "checking for additional resp interrupt.\n"); 215 216 /* polling mode for non isp_abort commands. */ 217 qla2x00_poll(ha->rsp_q_map[0]); 218 } 219 220 if (rval == QLA_FUNCTION_TIMEOUT && 221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) { 222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) || 223 ha->flags.eeh_busy) { 224 /* not in dpc. schedule it for dpc to take over. */ 225 ql_dbg(ql_dbg_mbx, vha, 0x115d, 226 "Timeout, schedule isp_abort_needed.\n"); 227 228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && 229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && 230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 231 232 ql_log(ql_log_info, base_vha, 0x115e, 233 "Mailbox cmd timeout occurred, cmd=0x%x, " 234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP " 235 "abort.\n", command, mcp->mb[0], 236 ha->flags.eeh_busy); 237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 238 qla2xxx_wake_dpc(vha); 239 } 240 } else if (!abort_active) { 241 /* call abort directly since we are in the DPC thread */ 242 ql_dbg(ql_dbg_mbx, vha, 0x1160, 243 "Timeout, calling abort_isp.\n"); 244 245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && 246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && 247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 248 249 ql_log(ql_log_info, base_vha, 0x1161, 250 "Mailbox cmd timeout occurred, cmd=0x%x, " 251 "mb[0]=0x%x. Scheduling ISP abort ", 252 command, mcp->mb[0]); 253 254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); 255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 256 if (ha->isp_ops->abort_isp(vha)) { 257 /* Failed. retry later. */ 258 set_bit(ISP_ABORT_NEEDED, 259 &vha->dpc_flags); 260 } 261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); 262 ql_dbg(ql_dbg_mbx, vha, 0x1162, 263 "Finished abort_isp.\n"); 264 } 265 } 266 } 267 268 premature_exit: 269 /* Allow next mbx cmd to come in. */ 270 complete(&ha->mbx_cmd_comp); 271 272 if (rval) { 273 ql_log(ql_log_warn, base_vha, 0x1163, 274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, " 275 "mb[3]=%x, cmd=%x ****.\n", 276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command); 277 } else { 278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__); 279 } 280 281 return rval; 282 } 283 284 /* 285 * qlafx00_driver_shutdown 286 * Indicate a driver shutdown to firmware. 287 * 288 * Input: 289 * ha = adapter block pointer. 290 * 291 * Returns: 292 * local function return status code. 293 * 294 * Context: 295 * Kernel context. 296 */ 297 int 298 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo) 299 { 300 int rval; 301 struct mbx_cmd_32 mc; 302 struct mbx_cmd_32 *mcp = &mc; 303 304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166, 305 "Entered %s.\n", __func__); 306 307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN; 308 mcp->out_mb = MBX_0; 309 mcp->in_mb = MBX_0; 310 if (tmo) 311 mcp->tov = tmo; 312 else 313 mcp->tov = MBX_TOV_SECONDS; 314 mcp->flags = 0; 315 rval = qlafx00_mailbox_command(vha, mcp); 316 317 if (rval != QLA_SUCCESS) { 318 ql_dbg(ql_dbg_mbx, vha, 0x1167, 319 "Failed=%x.\n", rval); 320 } else { 321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168, 322 "Done %s.\n", __func__); 323 } 324 325 return rval; 326 } 327 328 /* 329 * qlafx00_get_firmware_state 330 * Get adapter firmware state. 331 * 332 * Input: 333 * ha = adapter block pointer. 334 * TARGET_QUEUE_LOCK must be released. 335 * ADAPTER_STATE_LOCK must be released. 336 * 337 * Returns: 338 * qla7xxx local function return status code. 339 * 340 * Context: 341 * Kernel context. 342 */ 343 static int 344 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states) 345 { 346 int rval; 347 struct mbx_cmd_32 mc; 348 struct mbx_cmd_32 *mcp = &mc; 349 350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169, 351 "Entered %s.\n", __func__); 352 353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE; 354 mcp->out_mb = MBX_0; 355 mcp->in_mb = MBX_1|MBX_0; 356 mcp->tov = MBX_TOV_SECONDS; 357 mcp->flags = 0; 358 rval = qlafx00_mailbox_command(vha, mcp); 359 360 /* Return firmware states. */ 361 states[0] = mcp->mb[1]; 362 363 if (rval != QLA_SUCCESS) { 364 ql_dbg(ql_dbg_mbx, vha, 0x116a, 365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 366 } else { 367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b, 368 "Done %s.\n", __func__); 369 } 370 return rval; 371 } 372 373 /* 374 * qlafx00_init_firmware 375 * Initialize adapter firmware. 376 * 377 * Input: 378 * ha = adapter block pointer. 379 * dptr = Initialization control block pointer. 380 * size = size of initialization control block. 381 * TARGET_QUEUE_LOCK must be released. 382 * ADAPTER_STATE_LOCK must be released. 383 * 384 * Returns: 385 * qlafx00 local function return status code. 386 * 387 * Context: 388 * Kernel context. 389 */ 390 int 391 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size) 392 { 393 int rval; 394 struct mbx_cmd_32 mc; 395 struct mbx_cmd_32 *mcp = &mc; 396 struct qla_hw_data *ha = vha->hw; 397 398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c, 399 "Entered %s.\n", __func__); 400 401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE; 402 403 mcp->mb[1] = 0; 404 mcp->mb[2] = MSD(ha->init_cb_dma); 405 mcp->mb[3] = LSD(ha->init_cb_dma); 406 407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; 408 mcp->in_mb = MBX_0; 409 mcp->buf_size = size; 410 mcp->flags = MBX_DMA_OUT; 411 mcp->tov = MBX_TOV_SECONDS; 412 rval = qlafx00_mailbox_command(vha, mcp); 413 414 if (rval != QLA_SUCCESS) { 415 ql_dbg(ql_dbg_mbx, vha, 0x116d, 416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 417 } else { 418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e, 419 "Done %s.\n", __func__); 420 } 421 return rval; 422 } 423 424 /* 425 * qlafx00_mbx_reg_test 426 */ 427 static int 428 qlafx00_mbx_reg_test(scsi_qla_host_t *vha) 429 { 430 int rval; 431 struct mbx_cmd_32 mc; 432 struct mbx_cmd_32 *mcp = &mc; 433 434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f, 435 "Entered %s.\n", __func__); 436 437 438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST; 439 mcp->mb[1] = 0xAAAA; 440 mcp->mb[2] = 0x5555; 441 mcp->mb[3] = 0xAA55; 442 mcp->mb[4] = 0x55AA; 443 mcp->mb[5] = 0xA5A5; 444 mcp->mb[6] = 0x5A5A; 445 mcp->mb[7] = 0x2525; 446 mcp->mb[8] = 0xBBBB; 447 mcp->mb[9] = 0x6666; 448 mcp->mb[10] = 0xBB66; 449 mcp->mb[11] = 0x66BB; 450 mcp->mb[12] = 0xB6B6; 451 mcp->mb[13] = 0x6B6B; 452 mcp->mb[14] = 0x3636; 453 mcp->mb[15] = 0xCCCC; 454 455 456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| 457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; 458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| 459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; 460 mcp->buf_size = 0; 461 mcp->flags = MBX_DMA_OUT; 462 mcp->tov = MBX_TOV_SECONDS; 463 rval = qlafx00_mailbox_command(vha, mcp); 464 if (rval == QLA_SUCCESS) { 465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 || 466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA) 467 rval = QLA_FUNCTION_FAILED; 468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A || 469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB) 470 rval = QLA_FUNCTION_FAILED; 471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 || 472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6) 473 rval = QLA_FUNCTION_FAILED; 474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 || 475 mcp->mb[31] != 0xCCCC) 476 rval = QLA_FUNCTION_FAILED; 477 } 478 479 if (rval != QLA_SUCCESS) { 480 ql_dbg(ql_dbg_mbx, vha, 0x1170, 481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 482 } else { 483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171, 484 "Done %s.\n", __func__); 485 } 486 return rval; 487 } 488 489 /** 490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers. 491 * @ha: HA context 492 * 493 * Returns 0 on success. 494 */ 495 int 496 qlafx00_pci_config(scsi_qla_host_t *vha) 497 { 498 uint16_t w; 499 struct qla_hw_data *ha = vha->hw; 500 501 pci_set_master(ha->pdev); 502 pci_try_set_mwi(ha->pdev); 503 504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 506 w &= ~PCI_COMMAND_INTX_DISABLE; 507 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 508 509 /* PCIe -- adjust Maximum Read Request Size (2048). */ 510 if (pci_is_pcie(ha->pdev)) 511 pcie_set_readrq(ha->pdev, 2048); 512 513 ha->chip_revision = ha->pdev->revision; 514 515 return QLA_SUCCESS; 516 } 517 518 /** 519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC). 520 * @ha: HA context 521 * 522 */ 523 static inline void 524 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha) 525 { 526 unsigned long flags = 0; 527 struct qla_hw_data *ha = vha->hw; 528 int i, core; 529 uint32_t cnt; 530 531 /* Set all 4 cores in reset */ 532 for (i = 0; i < 4; i++) { 533 QLAFX00_SET_HBA_SOC_REG(ha, 534 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01)); 535 } 536 537 /* Set all 4 core Clock gating control */ 538 for (i = 0; i < 4; i++) { 539 QLAFX00_SET_HBA_SOC_REG(ha, 540 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101)); 541 } 542 543 /* Reset all units in Fabric */ 544 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x11F0101)); 545 546 /* Reset all interrupt control registers */ 547 for (i = 0; i < 115; i++) { 548 QLAFX00_SET_HBA_SOC_REG(ha, 549 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0)); 550 } 551 552 /* Reset Timers control registers. per core */ 553 for (core = 0; core < 4; core++) 554 for (i = 0; i < 8; i++) 555 QLAFX00_SET_HBA_SOC_REG(ha, 556 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0)); 557 558 /* Reset per core IRQ ack register */ 559 for (core = 0; core < 4; core++) 560 QLAFX00_SET_HBA_SOC_REG(ha, 561 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF)); 562 563 /* Set Fabric control and config to defaults */ 564 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2)); 565 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3)); 566 567 spin_lock_irqsave(&ha->hardware_lock, flags); 568 569 /* Kick in Fabric units */ 570 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0)); 571 572 /* Kick in Core0 to start boot process */ 573 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00)); 574 575 /* Wait 10secs for soft-reset to complete. */ 576 for (cnt = 10; cnt; cnt--) { 577 msleep(1000); 578 barrier(); 579 } 580 spin_unlock_irqrestore(&ha->hardware_lock, flags); 581 } 582 583 /** 584 * qlafx00_soft_reset() - Soft Reset ISPFx00. 585 * @ha: HA context 586 * 587 * Returns 0 on success. 588 */ 589 void 590 qlafx00_soft_reset(scsi_qla_host_t *vha) 591 { 592 struct qla_hw_data *ha = vha->hw; 593 594 if (unlikely(pci_channel_offline(ha->pdev) && 595 ha->flags.pci_channel_io_perm_failure)) 596 return; 597 598 ha->isp_ops->disable_intrs(ha); 599 qlafx00_soc_cpu_reset(vha); 600 ha->isp_ops->enable_intrs(ha); 601 } 602 603 /** 604 * qlafx00_chip_diag() - Test ISPFx00 for proper operation. 605 * @ha: HA context 606 * 607 * Returns 0 on success. 608 */ 609 int 610 qlafx00_chip_diag(scsi_qla_host_t *vha) 611 { 612 int rval = 0; 613 struct qla_hw_data *ha = vha->hw; 614 struct req_que *req = ha->req_q_map[0]; 615 616 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 617 618 rval = qlafx00_mbx_reg_test(vha); 619 if (rval) { 620 ql_log(ql_log_warn, vha, 0x1165, 621 "Failed mailbox send register test\n"); 622 } else { 623 /* Flag a successful rval */ 624 rval = QLA_SUCCESS; 625 } 626 return rval; 627 } 628 629 void 630 qlafx00_config_rings(struct scsi_qla_host *vha) 631 { 632 struct qla_hw_data *ha = vha->hw; 633 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 634 struct init_cb_fx *icb; 635 struct req_que *req = ha->req_q_map[0]; 636 struct rsp_que *rsp = ha->rsp_q_map[0]; 637 638 /* Setup ring parameters in initialization control block. */ 639 icb = (struct init_cb_fx *)ha->init_cb; 640 icb->request_q_outpointer = __constant_cpu_to_le16(0); 641 icb->response_q_inpointer = __constant_cpu_to_le16(0); 642 icb->request_q_length = cpu_to_le16(req->length); 643 icb->response_q_length = cpu_to_le16(rsp->length); 644 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 645 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 646 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 647 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 648 649 WRT_REG_DWORD(®->req_q_in, 0); 650 WRT_REG_DWORD(®->req_q_out, 0); 651 652 WRT_REG_DWORD(®->rsp_q_in, 0); 653 WRT_REG_DWORD(®->rsp_q_out, 0); 654 655 /* PCI posting */ 656 RD_REG_DWORD(®->rsp_q_out); 657 } 658 659 char * 660 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str) 661 { 662 struct qla_hw_data *ha = vha->hw; 663 664 if (pci_is_pcie(ha->pdev)) { 665 strcpy(str, "PCIe iSA"); 666 return str; 667 } 668 return str; 669 } 670 671 char * 672 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str) 673 { 674 struct qla_hw_data *ha = vha->hw; 675 676 sprintf(str, "%s", ha->mr.fw_version); 677 return str; 678 } 679 680 void 681 qlafx00_enable_intrs(struct qla_hw_data *ha) 682 { 683 unsigned long flags = 0; 684 685 spin_lock_irqsave(&ha->hardware_lock, flags); 686 ha->interrupts_on = 1; 687 QLAFX00_ENABLE_ICNTRL_REG(ha); 688 spin_unlock_irqrestore(&ha->hardware_lock, flags); 689 } 690 691 void 692 qlafx00_disable_intrs(struct qla_hw_data *ha) 693 { 694 unsigned long flags = 0; 695 696 spin_lock_irqsave(&ha->hardware_lock, flags); 697 ha->interrupts_on = 0; 698 QLAFX00_DISABLE_ICNTRL_REG(ha); 699 spin_unlock_irqrestore(&ha->hardware_lock, flags); 700 } 701 702 static void 703 qlafx00_tmf_iocb_timeout(void *data) 704 { 705 srb_t *sp = (srb_t *)data; 706 struct srb_iocb *tmf = &sp->u.iocb_cmd; 707 708 tmf->u.tmf.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT); 709 complete(&tmf->u.tmf.comp); 710 } 711 712 static void 713 qlafx00_tmf_sp_done(void *data, void *ptr, int res) 714 { 715 srb_t *sp = (srb_t *)ptr; 716 struct srb_iocb *tmf = &sp->u.iocb_cmd; 717 718 complete(&tmf->u.tmf.comp); 719 } 720 721 static int 722 qlafx00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, 723 uint32_t lun, uint32_t tag) 724 { 725 scsi_qla_host_t *vha = fcport->vha; 726 struct srb_iocb *tm_iocb; 727 srb_t *sp; 728 int rval = QLA_FUNCTION_FAILED; 729 730 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 731 if (!sp) 732 goto done; 733 734 tm_iocb = &sp->u.iocb_cmd; 735 sp->type = SRB_TM_CMD; 736 sp->name = "tmf"; 737 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 738 tm_iocb->u.tmf.flags = flags; 739 tm_iocb->u.tmf.lun = lun; 740 tm_iocb->u.tmf.data = tag; 741 sp->done = qlafx00_tmf_sp_done; 742 tm_iocb->timeout = qlafx00_tmf_iocb_timeout; 743 init_completion(&tm_iocb->u.tmf.comp); 744 745 rval = qla2x00_start_sp(sp); 746 if (rval != QLA_SUCCESS) 747 goto done_free_sp; 748 749 ql_dbg(ql_dbg_async, vha, 0x507b, 750 "Task management command issued target_id=%x\n", 751 fcport->tgt_id); 752 753 wait_for_completion(&tm_iocb->u.tmf.comp); 754 755 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 756 QLA_SUCCESS : QLA_FUNCTION_FAILED; 757 758 done_free_sp: 759 sp->free(vha, sp); 760 done: 761 return rval; 762 } 763 764 int 765 qlafx00_abort_target(fc_port_t *fcport, unsigned int l, int tag) 766 { 767 return qlafx00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag); 768 } 769 770 int 771 qlafx00_lun_reset(fc_port_t *fcport, unsigned int l, int tag) 772 { 773 return qlafx00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag); 774 } 775 776 int 777 qlafx00_loop_reset(scsi_qla_host_t *vha) 778 { 779 int ret; 780 struct fc_port *fcport; 781 struct qla_hw_data *ha = vha->hw; 782 783 if (ql2xtargetreset) { 784 list_for_each_entry(fcport, &vha->vp_fcports, list) { 785 if (fcport->port_type != FCT_TARGET) 786 continue; 787 788 ret = ha->isp_ops->target_reset(fcport, 0, 0); 789 if (ret != QLA_SUCCESS) { 790 ql_dbg(ql_dbg_taskm, vha, 0x803d, 791 "Bus Reset failed: Reset=%d " 792 "d_id=%x.\n", ret, fcport->d_id.b24); 793 } 794 } 795 } 796 return QLA_SUCCESS; 797 } 798 799 int 800 qlafx00_iospace_config(struct qla_hw_data *ha) 801 { 802 if (pci_request_selected_regions(ha->pdev, ha->bars, 803 QLA2XXX_DRIVER_NAME)) { 804 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e, 805 "Failed to reserve PIO/MMIO regions (%s), aborting.\n", 806 pci_name(ha->pdev)); 807 goto iospace_error_exit; 808 } 809 810 /* Use MMIO operations for all accesses. */ 811 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { 812 ql_log_pci(ql_log_warn, ha->pdev, 0x014f, 813 "Invalid pci I/O region size (%s).\n", 814 pci_name(ha->pdev)); 815 goto iospace_error_exit; 816 } 817 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) { 818 ql_log_pci(ql_log_warn, ha->pdev, 0x0127, 819 "Invalid PCI mem BAR0 region size (%s), aborting\n", 820 pci_name(ha->pdev)); 821 goto iospace_error_exit; 822 } 823 824 ha->cregbase = 825 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00); 826 if (!ha->cregbase) { 827 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128, 828 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); 829 goto iospace_error_exit; 830 } 831 832 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) { 833 ql_log_pci(ql_log_warn, ha->pdev, 0x0129, 834 "region #2 not an MMIO resource (%s), aborting\n", 835 pci_name(ha->pdev)); 836 goto iospace_error_exit; 837 } 838 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) { 839 ql_log_pci(ql_log_warn, ha->pdev, 0x012a, 840 "Invalid PCI mem BAR2 region size (%s), aborting\n", 841 pci_name(ha->pdev)); 842 goto iospace_error_exit; 843 } 844 845 ha->iobase = 846 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00); 847 if (!ha->iobase) { 848 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b, 849 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); 850 goto iospace_error_exit; 851 } 852 853 /* Determine queue resources */ 854 ha->max_req_queues = ha->max_rsp_queues = 1; 855 856 ql_log_pci(ql_log_info, ha->pdev, 0x012c, 857 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n", 858 ha->bars, ha->cregbase, ha->iobase); 859 860 return 0; 861 862 iospace_error_exit: 863 return -ENOMEM; 864 } 865 866 static void 867 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha) 868 { 869 struct qla_hw_data *ha = vha->hw; 870 struct req_que *req = ha->req_q_map[0]; 871 struct rsp_que *rsp = ha->rsp_q_map[0]; 872 873 req->length_fx00 = req->length; 874 req->ring_fx00 = req->ring; 875 req->dma_fx00 = req->dma; 876 877 rsp->length_fx00 = rsp->length; 878 rsp->ring_fx00 = rsp->ring; 879 rsp->dma_fx00 = rsp->dma; 880 881 ql_dbg(ql_dbg_init, vha, 0x012d, 882 "req: %p, ring_fx00: %p, length_fx00: 0x%x," 883 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00, 884 req->length_fx00, (u64)req->dma_fx00); 885 886 ql_dbg(ql_dbg_init, vha, 0x012e, 887 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x," 888 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00, 889 rsp->length_fx00, (u64)rsp->dma_fx00); 890 } 891 892 static int 893 qlafx00_config_queues(struct scsi_qla_host *vha) 894 { 895 struct qla_hw_data *ha = vha->hw; 896 struct req_que *req = ha->req_q_map[0]; 897 struct rsp_que *rsp = ha->rsp_q_map[0]; 898 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2); 899 900 req->length = ha->req_que_len; 901 req->ring = (void *)ha->iobase + ha->req_que_off; 902 req->dma = bar2_hdl + ha->req_que_off; 903 if ((!req->ring) || (req->length == 0)) { 904 ql_log_pci(ql_log_info, ha->pdev, 0x012f, 905 "Unable to allocate memory for req_ring\n"); 906 return QLA_FUNCTION_FAILED; 907 } 908 909 ql_dbg(ql_dbg_init, vha, 0x0130, 910 "req: %p req_ring pointer %p req len 0x%x " 911 "req off 0x%x\n, req->dma: 0x%llx", 912 req, req->ring, req->length, 913 ha->req_que_off, (u64)req->dma); 914 915 rsp->length = ha->rsp_que_len; 916 rsp->ring = (void *)ha->iobase + ha->rsp_que_off; 917 rsp->dma = bar2_hdl + ha->rsp_que_off; 918 if ((!rsp->ring) || (rsp->length == 0)) { 919 ql_log_pci(ql_log_info, ha->pdev, 0x0131, 920 "Unable to allocate memory for rsp_ring\n"); 921 return QLA_FUNCTION_FAILED; 922 } 923 924 ql_dbg(ql_dbg_init, vha, 0x0132, 925 "rsp: %p rsp_ring pointer %p rsp len 0x%x " 926 "rsp off 0x%x, rsp->dma: 0x%llx\n", 927 rsp, rsp->ring, rsp->length, 928 ha->rsp_que_off, (u64)rsp->dma); 929 930 return QLA_SUCCESS; 931 } 932 933 static int 934 qlafx00_init_fw_ready(scsi_qla_host_t *vha) 935 { 936 int rval = 0; 937 unsigned long wtime; 938 uint16_t wait_time; /* Wait time */ 939 struct qla_hw_data *ha = vha->hw; 940 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 941 uint32_t aenmbx, aenmbx7 = 0; 942 uint32_t pseudo_aen; 943 uint32_t state[5]; 944 bool done = false; 945 946 /* 30 seconds wait - Adjust if required */ 947 wait_time = 30; 948 949 pseudo_aen = RD_REG_DWORD(®->pseudoaen); 950 if (pseudo_aen == 1) { 951 aenmbx7 = RD_REG_DWORD(®->initval7); 952 ha->mbx_intr_code = MSW(aenmbx7); 953 ha->rqstq_intr_code = LSW(aenmbx7); 954 rval = qlafx00_driver_shutdown(vha, 10); 955 if (rval != QLA_SUCCESS) 956 qlafx00_soft_reset(vha); 957 } 958 959 /* wait time before firmware ready */ 960 wtime = jiffies + (wait_time * HZ); 961 do { 962 aenmbx = RD_REG_DWORD(®->aenmailbox0); 963 barrier(); 964 ql_dbg(ql_dbg_mbx, vha, 0x0133, 965 "aenmbx: 0x%x\n", aenmbx); 966 967 switch (aenmbx) { 968 case MBA_FW_NOT_STARTED: 969 case MBA_FW_STARTING: 970 break; 971 972 case MBA_SYSTEM_ERR: 973 case MBA_REQ_TRANSFER_ERR: 974 case MBA_RSP_TRANSFER_ERR: 975 case MBA_FW_INIT_FAILURE: 976 qlafx00_soft_reset(vha); 977 break; 978 979 case MBA_FW_RESTART_CMPLT: 980 /* Set the mbx and rqstq intr code */ 981 aenmbx7 = RD_REG_DWORD(®->aenmailbox7); 982 ha->mbx_intr_code = MSW(aenmbx7); 983 ha->rqstq_intr_code = LSW(aenmbx7); 984 ha->req_que_off = RD_REG_DWORD(®->aenmailbox1); 985 ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3); 986 ha->req_que_len = RD_REG_DWORD(®->aenmailbox5); 987 ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6); 988 WRT_REG_DWORD(®->aenmailbox0, 0); 989 RD_REG_DWORD_RELAXED(®->aenmailbox0); 990 ql_dbg(ql_dbg_init, vha, 0x0134, 991 "f/w returned mbx_intr_code: 0x%x, " 992 "rqstq_intr_code: 0x%x\n", 993 ha->mbx_intr_code, ha->rqstq_intr_code); 994 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 995 rval = QLA_SUCCESS; 996 done = true; 997 break; 998 999 default: 1000 /* If fw is apparently not ready. In order to continue, 1001 * we might need to issue Mbox cmd, but the problem is 1002 * that the DoorBell vector values that come with the 1003 * 8060 AEN are most likely gone by now (and thus no 1004 * bell would be rung on the fw side when mbox cmd is 1005 * issued). We have to therefore grab the 8060 AEN 1006 * shadow regs (filled in by FW when the last 8060 1007 * AEN was being posted). 1008 * Do the following to determine what is needed in 1009 * order to get the FW ready: 1010 * 1. reload the 8060 AEN values from the shadow regs 1011 * 2. clear int status to get rid of possible pending 1012 * interrupts 1013 * 3. issue Get FW State Mbox cmd to determine fw state 1014 * Set the mbx and rqstq intr code from Shadow Regs 1015 */ 1016 aenmbx7 = RD_REG_DWORD(®->initval7); 1017 ha->mbx_intr_code = MSW(aenmbx7); 1018 ha->rqstq_intr_code = LSW(aenmbx7); 1019 ha->req_que_off = RD_REG_DWORD(®->initval1); 1020 ha->rsp_que_off = RD_REG_DWORD(®->initval3); 1021 ha->req_que_len = RD_REG_DWORD(®->initval5); 1022 ha->rsp_que_len = RD_REG_DWORD(®->initval6); 1023 ql_dbg(ql_dbg_init, vha, 0x0135, 1024 "f/w returned mbx_intr_code: 0x%x, " 1025 "rqstq_intr_code: 0x%x\n", 1026 ha->mbx_intr_code, ha->rqstq_intr_code); 1027 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1028 1029 /* Get the FW state */ 1030 rval = qlafx00_get_firmware_state(vha, state); 1031 if (rval != QLA_SUCCESS) { 1032 /* Retry if timer has not expired */ 1033 break; 1034 } 1035 1036 if (state[0] == FSTATE_FX00_CONFIG_WAIT) { 1037 /* Firmware is waiting to be 1038 * initialized by driver 1039 */ 1040 rval = QLA_SUCCESS; 1041 done = true; 1042 break; 1043 } 1044 1045 /* Issue driver shutdown and wait until f/w recovers. 1046 * Driver should continue to poll until 8060 AEN is 1047 * received indicating firmware recovery. 1048 */ 1049 ql_dbg(ql_dbg_init, vha, 0x0136, 1050 "Sending Driver shutdown fw_state 0x%x\n", 1051 state[0]); 1052 1053 rval = qlafx00_driver_shutdown(vha, 10); 1054 if (rval != QLA_SUCCESS) { 1055 rval = QLA_FUNCTION_FAILED; 1056 break; 1057 } 1058 msleep(500); 1059 1060 wtime = jiffies + (wait_time * HZ); 1061 break; 1062 } 1063 1064 if (!done) { 1065 if (time_after_eq(jiffies, wtime)) { 1066 ql_dbg(ql_dbg_init, vha, 0x0137, 1067 "Init f/w failed: aen[7]: 0x%x\n", 1068 RD_REG_DWORD(®->aenmailbox7)); 1069 rval = QLA_FUNCTION_FAILED; 1070 done = true; 1071 break; 1072 } 1073 /* Delay for a while */ 1074 msleep(500); 1075 } 1076 } while (!done); 1077 1078 if (rval) 1079 ql_dbg(ql_dbg_init, vha, 0x0138, 1080 "%s **** FAILED ****.\n", __func__); 1081 else 1082 ql_dbg(ql_dbg_init, vha, 0x0139, 1083 "%s **** SUCCESS ****.\n", __func__); 1084 1085 return rval; 1086 } 1087 1088 /* 1089 * qlafx00_fw_ready() - Waits for firmware ready. 1090 * @ha: HA context 1091 * 1092 * Returns 0 on success. 1093 */ 1094 int 1095 qlafx00_fw_ready(scsi_qla_host_t *vha) 1096 { 1097 int rval; 1098 unsigned long wtime; 1099 uint16_t wait_time; /* Wait time if loop is coming ready */ 1100 uint32_t state[5]; 1101 1102 rval = QLA_SUCCESS; 1103 1104 wait_time = 10; 1105 1106 /* wait time before firmware ready */ 1107 wtime = jiffies + (wait_time * HZ); 1108 1109 /* Wait for ISP to finish init */ 1110 if (!vha->flags.init_done) 1111 ql_dbg(ql_dbg_init, vha, 0x013a, 1112 "Waiting for init to complete...\n"); 1113 1114 do { 1115 rval = qlafx00_get_firmware_state(vha, state); 1116 1117 if (rval == QLA_SUCCESS) { 1118 if (state[0] == FSTATE_FX00_INITIALIZED) { 1119 ql_dbg(ql_dbg_init, vha, 0x013b, 1120 "fw_state=%x\n", state[0]); 1121 rval = QLA_SUCCESS; 1122 break; 1123 } 1124 } 1125 rval = QLA_FUNCTION_FAILED; 1126 1127 if (time_after_eq(jiffies, wtime)) 1128 break; 1129 1130 /* Delay for a while */ 1131 msleep(500); 1132 1133 ql_dbg(ql_dbg_init, vha, 0x013c, 1134 "fw_state=%x curr time=%lx.\n", state[0], jiffies); 1135 } while (1); 1136 1137 1138 if (rval) 1139 ql_dbg(ql_dbg_init, vha, 0x013d, 1140 "Firmware ready **** FAILED ****.\n"); 1141 else 1142 ql_dbg(ql_dbg_init, vha, 0x013e, 1143 "Firmware ready **** SUCCESS ****.\n"); 1144 1145 return rval; 1146 } 1147 1148 static int 1149 qlafx00_find_all_targets(scsi_qla_host_t *vha, 1150 struct list_head *new_fcports) 1151 { 1152 int rval; 1153 uint16_t tgt_id; 1154 fc_port_t *fcport, *new_fcport; 1155 int found; 1156 struct qla_hw_data *ha = vha->hw; 1157 1158 rval = QLA_SUCCESS; 1159 1160 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags)) 1161 return QLA_FUNCTION_FAILED; 1162 1163 if ((atomic_read(&vha->loop_down_timer) || 1164 STATE_TRANSITION(vha))) { 1165 atomic_set(&vha->loop_down_timer, 0); 1166 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1167 return QLA_FUNCTION_FAILED; 1168 } 1169 1170 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088, 1171 "Listing Target bit map...\n"); 1172 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha, 1173 0x2089, (uint8_t *)ha->gid_list, 32); 1174 1175 /* Allocate temporary rmtport for any new rmtports discovered. */ 1176 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 1177 if (new_fcport == NULL) 1178 return QLA_MEMORY_ALLOC_FAILED; 1179 1180 for_each_set_bit(tgt_id, (void *)ha->gid_list, 1181 QLAFX00_TGT_NODE_LIST_SIZE) { 1182 1183 /* Send get target node info */ 1184 new_fcport->tgt_id = tgt_id; 1185 rval = qlafx00_fx_disc(vha, new_fcport, 1186 FXDISC_GET_TGT_NODE_INFO); 1187 if (rval != QLA_SUCCESS) { 1188 ql_log(ql_log_warn, vha, 0x208a, 1189 "Target info scan failed -- assuming zero-entry " 1190 "result...\n"); 1191 continue; 1192 } 1193 1194 /* Locate matching device in database. */ 1195 found = 0; 1196 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1197 if (memcmp(new_fcport->port_name, 1198 fcport->port_name, WWN_SIZE)) 1199 continue; 1200 1201 found++; 1202 1203 /* 1204 * If tgt_id is same and state FCS_ONLINE, nothing 1205 * changed. 1206 */ 1207 if (fcport->tgt_id == new_fcport->tgt_id && 1208 atomic_read(&fcport->state) == FCS_ONLINE) 1209 break; 1210 1211 /* 1212 * Tgt ID changed or device was marked to be updated. 1213 */ 1214 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b, 1215 "TGT-ID Change(%s): Present tgt id: " 1216 "0x%x state: 0x%x " 1217 "wwnn = %llx wwpn = %llx.\n", 1218 __func__, fcport->tgt_id, 1219 atomic_read(&fcport->state), 1220 (unsigned long long)wwn_to_u64(fcport->node_name), 1221 (unsigned long long)wwn_to_u64(fcport->port_name)); 1222 1223 ql_log(ql_log_info, vha, 0x208c, 1224 "TGT-ID Announce(%s): Discovered tgt " 1225 "id 0x%x wwnn = %llx " 1226 "wwpn = %llx.\n", __func__, new_fcport->tgt_id, 1227 (unsigned long long) 1228 wwn_to_u64(new_fcport->node_name), 1229 (unsigned long long) 1230 wwn_to_u64(new_fcport->port_name)); 1231 1232 if (atomic_read(&fcport->state) != FCS_ONLINE) { 1233 fcport->old_tgt_id = fcport->tgt_id; 1234 fcport->tgt_id = new_fcport->tgt_id; 1235 ql_log(ql_log_info, vha, 0x208d, 1236 "TGT-ID: New fcport Added: %p\n", fcport); 1237 qla2x00_update_fcport(vha, fcport); 1238 } else { 1239 ql_log(ql_log_info, vha, 0x208e, 1240 " Existing TGT-ID %x did not get " 1241 " offline event from firmware.\n", 1242 fcport->old_tgt_id); 1243 qla2x00_mark_device_lost(vha, fcport, 0, 0); 1244 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1245 kfree(new_fcport); 1246 return rval; 1247 } 1248 break; 1249 } 1250 1251 if (found) 1252 continue; 1253 1254 /* If device was not in our fcports list, then add it. */ 1255 list_add_tail(&new_fcport->list, new_fcports); 1256 1257 /* Allocate a new replacement fcport. */ 1258 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 1259 if (new_fcport == NULL) 1260 return QLA_MEMORY_ALLOC_FAILED; 1261 } 1262 1263 kfree(new_fcport); 1264 return rval; 1265 } 1266 1267 /* 1268 * qlafx00_configure_all_targets 1269 * Setup target devices with node ID's. 1270 * 1271 * Input: 1272 * ha = adapter block pointer. 1273 * 1274 * Returns: 1275 * 0 = success. 1276 * BIT_0 = error 1277 */ 1278 static int 1279 qlafx00_configure_all_targets(scsi_qla_host_t *vha) 1280 { 1281 int rval; 1282 fc_port_t *fcport, *rmptemp; 1283 LIST_HEAD(new_fcports); 1284 1285 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1286 FXDISC_GET_TGT_NODE_LIST); 1287 if (rval != QLA_SUCCESS) { 1288 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1289 return rval; 1290 } 1291 1292 rval = qlafx00_find_all_targets(vha, &new_fcports); 1293 if (rval != QLA_SUCCESS) { 1294 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1295 return rval; 1296 } 1297 1298 /* 1299 * Delete all previous devices marked lost. 1300 */ 1301 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1302 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 1303 break; 1304 1305 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { 1306 if (fcport->port_type != FCT_INITIATOR) 1307 qla2x00_mark_device_lost(vha, fcport, 0, 0); 1308 } 1309 } 1310 1311 /* 1312 * Add the new devices to our devices list. 1313 */ 1314 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) { 1315 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 1316 break; 1317 1318 qla2x00_update_fcport(vha, fcport); 1319 list_move_tail(&fcport->list, &vha->vp_fcports); 1320 ql_log(ql_log_info, vha, 0x208f, 1321 "Attach new target id 0x%x wwnn = %llx " 1322 "wwpn = %llx.\n", 1323 fcport->tgt_id, 1324 (unsigned long long)wwn_to_u64(fcport->node_name), 1325 (unsigned long long)wwn_to_u64(fcport->port_name)); 1326 } 1327 1328 /* Free all new device structures not processed. */ 1329 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) { 1330 list_del(&fcport->list); 1331 kfree(fcport); 1332 } 1333 1334 return rval; 1335 } 1336 1337 /* 1338 * qlafx00_configure_devices 1339 * Updates Fibre Channel Device Database with what is actually on loop. 1340 * 1341 * Input: 1342 * ha = adapter block pointer. 1343 * 1344 * Returns: 1345 * 0 = success. 1346 * 1 = error. 1347 * 2 = database was full and device was not configured. 1348 */ 1349 int 1350 qlafx00_configure_devices(scsi_qla_host_t *vha) 1351 { 1352 int rval; 1353 unsigned long flags, save_flags; 1354 rval = QLA_SUCCESS; 1355 1356 save_flags = flags = vha->dpc_flags; 1357 1358 ql_dbg(ql_dbg_disc, vha, 0x2090, 1359 "Configure devices -- dpc flags =0x%lx\n", flags); 1360 1361 rval = qlafx00_configure_all_targets(vha); 1362 1363 if (rval == QLA_SUCCESS) { 1364 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 1365 rval = QLA_FUNCTION_FAILED; 1366 } else { 1367 atomic_set(&vha->loop_state, LOOP_READY); 1368 ql_log(ql_log_info, vha, 0x2091, 1369 "Device Ready\n"); 1370 } 1371 } 1372 1373 if (rval) { 1374 ql_dbg(ql_dbg_disc, vha, 0x2092, 1375 "%s *** FAILED ***.\n", __func__); 1376 } else { 1377 ql_dbg(ql_dbg_disc, vha, 0x2093, 1378 "%s: exiting normally.\n", __func__); 1379 } 1380 return rval; 1381 } 1382 1383 static void 1384 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp) 1385 { 1386 struct qla_hw_data *ha = vha->hw; 1387 fc_port_t *fcport; 1388 1389 vha->flags.online = 0; 1390 ha->mr.fw_hbt_en = 0; 1391 1392 if (!critemp) { 1393 ha->flags.chip_reset_done = 0; 1394 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1395 vha->qla_stats.total_isp_aborts++; 1396 ql_log(ql_log_info, vha, 0x013f, 1397 "Performing ISP error recovery - ha = %p.\n", ha); 1398 ha->isp_ops->reset_chip(vha); 1399 } 1400 1401 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1402 atomic_set(&vha->loop_state, LOOP_DOWN); 1403 atomic_set(&vha->loop_down_timer, 1404 QLAFX00_LOOP_DOWN_TIME); 1405 } else { 1406 if (!atomic_read(&vha->loop_down_timer)) 1407 atomic_set(&vha->loop_down_timer, 1408 QLAFX00_LOOP_DOWN_TIME); 1409 } 1410 1411 /* Clear all async request states across all VPs. */ 1412 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1413 fcport->flags = 0; 1414 if (atomic_read(&fcport->state) == FCS_ONLINE) 1415 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 1416 } 1417 1418 if (!ha->flags.eeh_busy) { 1419 if (critemp) { 1420 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16); 1421 } else { 1422 /* Requeue all commands in outstanding command list. */ 1423 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 1424 } 1425 } 1426 1427 qla2x00_free_irqs(vha); 1428 if (critemp) 1429 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags); 1430 else 1431 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); 1432 1433 /* Clear the Interrupts */ 1434 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1435 1436 ql_log(ql_log_info, vha, 0x0140, 1437 "%s Done done - ha=%p.\n", __func__, ha); 1438 } 1439 1440 /** 1441 * qlafx00_init_response_q_entries() - Initializes response queue entries. 1442 * @ha: HA context 1443 * 1444 * Beginning of request ring has initialization control block already built 1445 * by nvram config routine. 1446 * 1447 * Returns 0 on success. 1448 */ 1449 void 1450 qlafx00_init_response_q_entries(struct rsp_que *rsp) 1451 { 1452 uint16_t cnt; 1453 response_t *pkt; 1454 1455 rsp->ring_ptr = rsp->ring; 1456 rsp->ring_index = 0; 1457 rsp->status_srb = NULL; 1458 pkt = rsp->ring_ptr; 1459 for (cnt = 0; cnt < rsp->length; cnt++) { 1460 pkt->signature = RESPONSE_PROCESSED; 1461 WRT_REG_DWORD((void __iomem *)&pkt->signature, 1462 RESPONSE_PROCESSED); 1463 pkt++; 1464 } 1465 } 1466 1467 int 1468 qlafx00_rescan_isp(scsi_qla_host_t *vha) 1469 { 1470 uint32_t status = QLA_FUNCTION_FAILED; 1471 struct qla_hw_data *ha = vha->hw; 1472 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 1473 uint32_t aenmbx7; 1474 1475 qla2x00_request_irqs(ha, ha->rsp_q_map[0]); 1476 1477 aenmbx7 = RD_REG_DWORD(®->aenmailbox7); 1478 ha->mbx_intr_code = MSW(aenmbx7); 1479 ha->rqstq_intr_code = LSW(aenmbx7); 1480 ha->req_que_off = RD_REG_DWORD(®->aenmailbox1); 1481 ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3); 1482 ha->req_que_len = RD_REG_DWORD(®->aenmailbox5); 1483 ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6); 1484 1485 ql_dbg(ql_dbg_disc, vha, 0x2094, 1486 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x " 1487 " Req que offset 0x%x Rsp que offset 0x%x\n", 1488 ha->mbx_intr_code, ha->rqstq_intr_code, 1489 ha->req_que_off, ha->rsp_que_len); 1490 1491 /* Clear the Interrupts */ 1492 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1493 1494 status = qla2x00_init_rings(vha); 1495 if (!status) { 1496 vha->flags.online = 1; 1497 1498 /* if no cable then assume it's good */ 1499 if ((vha->device_flags & DFLG_NO_CABLE)) 1500 status = 0; 1501 /* Register system information */ 1502 if (qlafx00_fx_disc(vha, 1503 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO)) 1504 ql_dbg(ql_dbg_disc, vha, 0x2095, 1505 "failed to register host info\n"); 1506 } 1507 scsi_unblock_requests(vha->host); 1508 return status; 1509 } 1510 1511 void 1512 qlafx00_timer_routine(scsi_qla_host_t *vha) 1513 { 1514 struct qla_hw_data *ha = vha->hw; 1515 uint32_t fw_heart_beat; 1516 uint32_t aenmbx0; 1517 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 1518 uint32_t tempc; 1519 1520 /* Check firmware health */ 1521 if (ha->mr.fw_hbt_cnt) 1522 ha->mr.fw_hbt_cnt--; 1523 else { 1524 if ((!ha->flags.mr_reset_hdlr_active) && 1525 (!test_bit(UNLOADING, &vha->dpc_flags)) && 1526 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) && 1527 (ha->mr.fw_hbt_en)) { 1528 fw_heart_beat = RD_REG_DWORD(®->fwheartbeat); 1529 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) { 1530 ha->mr.old_fw_hbt_cnt = fw_heart_beat; 1531 ha->mr.fw_hbt_miss_cnt = 0; 1532 } else { 1533 ha->mr.fw_hbt_miss_cnt++; 1534 if (ha->mr.fw_hbt_miss_cnt == 1535 QLAFX00_HEARTBEAT_MISS_CNT) { 1536 set_bit(ISP_ABORT_NEEDED, 1537 &vha->dpc_flags); 1538 qla2xxx_wake_dpc(vha); 1539 ha->mr.fw_hbt_miss_cnt = 0; 1540 } 1541 } 1542 } 1543 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL; 1544 } 1545 1546 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) { 1547 /* Reset recovery to be performed in timer routine */ 1548 aenmbx0 = RD_REG_DWORD(®->aenmailbox0); 1549 if (ha->mr.fw_reset_timer_exp) { 1550 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1551 qla2xxx_wake_dpc(vha); 1552 ha->mr.fw_reset_timer_exp = 0; 1553 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) { 1554 /* Wake up DPC to rescan the targets */ 1555 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags); 1556 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); 1557 qla2xxx_wake_dpc(vha); 1558 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; 1559 } else if ((aenmbx0 == MBA_FW_STARTING) && 1560 (!ha->mr.fw_hbt_en)) { 1561 ha->mr.fw_hbt_en = 1; 1562 } else if (!ha->mr.fw_reset_timer_tick) { 1563 if (aenmbx0 == ha->mr.old_aenmbx0_state) 1564 ha->mr.fw_reset_timer_exp = 1; 1565 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; 1566 } else if (aenmbx0 == 0xFFFFFFFF) { 1567 uint32_t data0, data1; 1568 1569 data0 = QLAFX00_RD_REG(ha, 1570 QLAFX00_BAR1_BASE_ADDR_REG); 1571 data1 = QLAFX00_RD_REG(ha, 1572 QLAFX00_PEX0_WIN0_BASE_ADDR_REG); 1573 1574 data0 &= 0xffff0000; 1575 data1 &= 0x0000ffff; 1576 1577 QLAFX00_WR_REG(ha, 1578 QLAFX00_PEX0_WIN0_BASE_ADDR_REG, 1579 (data0 | data1)); 1580 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) { 1581 ha->mr.fw_reset_timer_tick = 1582 QLAFX00_MAX_RESET_INTERVAL; 1583 } else if (aenmbx0 == MBA_FW_RESET_FCT) { 1584 ha->mr.fw_reset_timer_tick = 1585 QLAFX00_MAX_RESET_INTERVAL; 1586 } 1587 ha->mr.old_aenmbx0_state = aenmbx0; 1588 ha->mr.fw_reset_timer_tick--; 1589 } 1590 if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) { 1591 /* 1592 * Critical temperature recovery to be 1593 * performed in timer routine 1594 */ 1595 if (ha->mr.fw_critemp_timer_tick == 0) { 1596 tempc = QLAFX00_GET_TEMPERATURE(ha); 1597 ql_dbg(ql_dbg_timer, vha, 0x6012, 1598 "ISPFx00(%s): Critical temp timer, " 1599 "current SOC temperature: %d\n", 1600 __func__, tempc); 1601 if (tempc < ha->mr.critical_temperature) { 1602 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1603 clear_bit(FX00_CRITEMP_RECOVERY, 1604 &vha->dpc_flags); 1605 qla2xxx_wake_dpc(vha); 1606 } 1607 ha->mr.fw_critemp_timer_tick = 1608 QLAFX00_CRITEMP_INTERVAL; 1609 } else { 1610 ha->mr.fw_critemp_timer_tick--; 1611 } 1612 } 1613 if (ha->mr.host_info_resend) { 1614 /* 1615 * Incomplete host info might be sent to firmware 1616 * durinng system boot - info should be resend 1617 */ 1618 if (ha->mr.hinfo_resend_timer_tick == 0) { 1619 ha->mr.host_info_resend = false; 1620 set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags); 1621 ha->mr.hinfo_resend_timer_tick = 1622 QLAFX00_HINFO_RESEND_INTERVAL; 1623 qla2xxx_wake_dpc(vha); 1624 } else { 1625 ha->mr.hinfo_resend_timer_tick--; 1626 } 1627 } 1628 1629 } 1630 1631 /* 1632 * qlfx00a_reset_initialize 1633 * Re-initialize after a iSA device reset. 1634 * 1635 * Input: 1636 * ha = adapter block pointer. 1637 * 1638 * Returns: 1639 * 0 = success 1640 */ 1641 int 1642 qlafx00_reset_initialize(scsi_qla_host_t *vha) 1643 { 1644 struct qla_hw_data *ha = vha->hw; 1645 1646 if (vha->device_flags & DFLG_DEV_FAILED) { 1647 ql_dbg(ql_dbg_init, vha, 0x0142, 1648 "Device in failed state\n"); 1649 return QLA_SUCCESS; 1650 } 1651 1652 ha->flags.mr_reset_hdlr_active = 1; 1653 1654 if (vha->flags.online) { 1655 scsi_block_requests(vha->host); 1656 qlafx00_abort_isp_cleanup(vha, false); 1657 } 1658 1659 ql_log(ql_log_info, vha, 0x0143, 1660 "(%s): succeeded.\n", __func__); 1661 ha->flags.mr_reset_hdlr_active = 0; 1662 return QLA_SUCCESS; 1663 } 1664 1665 /* 1666 * qlafx00_abort_isp 1667 * Resets ISP and aborts all outstanding commands. 1668 * 1669 * Input: 1670 * ha = adapter block pointer. 1671 * 1672 * Returns: 1673 * 0 = success 1674 */ 1675 int 1676 qlafx00_abort_isp(scsi_qla_host_t *vha) 1677 { 1678 struct qla_hw_data *ha = vha->hw; 1679 1680 if (vha->flags.online) { 1681 if (unlikely(pci_channel_offline(ha->pdev) && 1682 ha->flags.pci_channel_io_perm_failure)) { 1683 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 1684 return QLA_SUCCESS; 1685 } 1686 1687 scsi_block_requests(vha->host); 1688 qlafx00_abort_isp_cleanup(vha, false); 1689 } else { 1690 scsi_block_requests(vha->host); 1691 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1692 vha->qla_stats.total_isp_aborts++; 1693 ha->isp_ops->reset_chip(vha); 1694 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); 1695 /* Clear the Interrupts */ 1696 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1697 } 1698 1699 ql_log(ql_log_info, vha, 0x0145, 1700 "(%s): succeeded.\n", __func__); 1701 1702 return QLA_SUCCESS; 1703 } 1704 1705 static inline fc_port_t* 1706 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id) 1707 { 1708 fc_port_t *fcport; 1709 1710 /* Check for matching device in remote port list. */ 1711 fcport = NULL; 1712 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1713 if (fcport->tgt_id == tgt_id) { 1714 ql_dbg(ql_dbg_async, vha, 0x5072, 1715 "Matching fcport(%p) found with TGT-ID: 0x%x " 1716 "and Remote TGT_ID: 0x%x\n", 1717 fcport, fcport->tgt_id, tgt_id); 1718 break; 1719 } 1720 } 1721 return fcport; 1722 } 1723 1724 static void 1725 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id) 1726 { 1727 fc_port_t *fcport; 1728 1729 ql_log(ql_log_info, vha, 0x5073, 1730 "Detach TGT-ID: 0x%x\n", tgt_id); 1731 1732 fcport = qlafx00_get_fcport(vha, tgt_id); 1733 if (!fcport) 1734 return; 1735 1736 qla2x00_mark_device_lost(vha, fcport, 0, 0); 1737 1738 return; 1739 } 1740 1741 int 1742 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt) 1743 { 1744 int rval = 0; 1745 uint32_t aen_code, aen_data; 1746 1747 aen_code = FCH_EVT_VENDOR_UNIQUE; 1748 aen_data = evt->u.aenfx.evtcode; 1749 1750 switch (evt->u.aenfx.evtcode) { 1751 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */ 1752 if (evt->u.aenfx.mbx[1] == 0) { 1753 if (evt->u.aenfx.mbx[2] == 1) { 1754 if (!vha->flags.fw_tgt_reported) 1755 vha->flags.fw_tgt_reported = 1; 1756 atomic_set(&vha->loop_down_timer, 0); 1757 atomic_set(&vha->loop_state, LOOP_UP); 1758 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1759 qla2xxx_wake_dpc(vha); 1760 } else if (evt->u.aenfx.mbx[2] == 2) { 1761 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]); 1762 } 1763 } else if (evt->u.aenfx.mbx[1] == 0xffff) { 1764 if (evt->u.aenfx.mbx[2] == 1) { 1765 if (!vha->flags.fw_tgt_reported) 1766 vha->flags.fw_tgt_reported = 1; 1767 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1768 } else if (evt->u.aenfx.mbx[2] == 2) { 1769 vha->device_flags |= DFLG_NO_CABLE; 1770 qla2x00_mark_all_devices_lost(vha, 1); 1771 } 1772 } 1773 break; 1774 case QLAFX00_MBA_LINK_UP: 1775 aen_code = FCH_EVT_LINKUP; 1776 aen_data = 0; 1777 break; 1778 case QLAFX00_MBA_LINK_DOWN: 1779 aen_code = FCH_EVT_LINKDOWN; 1780 aen_data = 0; 1781 break; 1782 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */ 1783 ql_log(ql_log_info, vha, 0x5082, 1784 "Process critical temperature event " 1785 "aenmb[0]: %x\n", 1786 evt->u.aenfx.evtcode); 1787 scsi_block_requests(vha->host); 1788 qlafx00_abort_isp_cleanup(vha, true); 1789 scsi_unblock_requests(vha->host); 1790 break; 1791 } 1792 1793 fc_host_post_event(vha->host, fc_get_event_number(), 1794 aen_code, aen_data); 1795 1796 return rval; 1797 } 1798 1799 static void 1800 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo) 1801 { 1802 u64 port_name = 0, node_name = 0; 1803 1804 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name); 1805 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name); 1806 1807 fc_host_node_name(vha->host) = node_name; 1808 fc_host_port_name(vha->host) = port_name; 1809 if (!pinfo->port_type) 1810 vha->hw->current_topology = ISP_CFG_F; 1811 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP) 1812 atomic_set(&vha->loop_state, LOOP_READY); 1813 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN) 1814 atomic_set(&vha->loop_state, LOOP_DOWN); 1815 vha->hw->link_data_rate = (uint16_t)pinfo->link_config; 1816 } 1817 1818 static void 1819 qla2x00_fxdisc_iocb_timeout(void *data) 1820 { 1821 srb_t *sp = (srb_t *)data; 1822 struct srb_iocb *lio = &sp->u.iocb_cmd; 1823 1824 complete(&lio->u.fxiocb.fxiocb_comp); 1825 } 1826 1827 static void 1828 qla2x00_fxdisc_sp_done(void *data, void *ptr, int res) 1829 { 1830 srb_t *sp = (srb_t *)ptr; 1831 struct srb_iocb *lio = &sp->u.iocb_cmd; 1832 1833 complete(&lio->u.fxiocb.fxiocb_comp); 1834 } 1835 1836 int 1837 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type) 1838 { 1839 srb_t *sp; 1840 struct srb_iocb *fdisc; 1841 int rval = QLA_FUNCTION_FAILED; 1842 struct qla_hw_data *ha = vha->hw; 1843 struct host_system_info *phost_info; 1844 struct register_host_info *preg_hsi; 1845 struct new_utsname *p_sysid = NULL; 1846 struct timeval tv; 1847 1848 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1849 if (!sp) 1850 goto done; 1851 1852 fdisc = &sp->u.iocb_cmd; 1853 switch (fx_type) { 1854 case FXDISC_GET_CONFIG_INFO: 1855 fdisc->u.fxiocb.flags = 1856 SRB_FXDISC_RESP_DMA_VALID; 1857 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data); 1858 break; 1859 case FXDISC_GET_PORT_INFO: 1860 fdisc->u.fxiocb.flags = 1861 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; 1862 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO; 1863 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id); 1864 break; 1865 case FXDISC_GET_TGT_NODE_INFO: 1866 fdisc->u.fxiocb.flags = 1867 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; 1868 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO; 1869 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id); 1870 break; 1871 case FXDISC_GET_TGT_NODE_LIST: 1872 fdisc->u.fxiocb.flags = 1873 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; 1874 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE; 1875 break; 1876 case FXDISC_REG_HOST_INFO: 1877 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID; 1878 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info); 1879 p_sysid = utsname(); 1880 if (!p_sysid) { 1881 ql_log(ql_log_warn, vha, 0x303c, 1882 "Not able to get the system information\n"); 1883 goto done_free_sp; 1884 } 1885 break; 1886 case FXDISC_ABORT_IOCTL: 1887 default: 1888 break; 1889 } 1890 1891 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) { 1892 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev, 1893 fdisc->u.fxiocb.req_len, 1894 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL); 1895 if (!fdisc->u.fxiocb.req_addr) 1896 goto done_free_sp; 1897 1898 if (fx_type == FXDISC_REG_HOST_INFO) { 1899 preg_hsi = (struct register_host_info *) 1900 fdisc->u.fxiocb.req_addr; 1901 phost_info = &preg_hsi->hsi; 1902 memset(preg_hsi, 0, sizeof(struct register_host_info)); 1903 phost_info->os_type = OS_TYPE_LINUX; 1904 strncpy(phost_info->sysname, 1905 p_sysid->sysname, SYSNAME_LENGTH); 1906 strncpy(phost_info->nodename, 1907 p_sysid->nodename, NODENAME_LENGTH); 1908 if (!strcmp(phost_info->nodename, "(none)")) 1909 ha->mr.host_info_resend = true; 1910 strncpy(phost_info->release, 1911 p_sysid->release, RELEASE_LENGTH); 1912 strncpy(phost_info->version, 1913 p_sysid->version, VERSION_LENGTH); 1914 strncpy(phost_info->machine, 1915 p_sysid->machine, MACHINE_LENGTH); 1916 strncpy(phost_info->domainname, 1917 p_sysid->domainname, DOMNAME_LENGTH); 1918 strncpy(phost_info->hostdriver, 1919 QLA2XXX_VERSION, VERSION_LENGTH); 1920 do_gettimeofday(&tv); 1921 preg_hsi->utc = (uint64_t)tv.tv_sec; 1922 ql_dbg(ql_dbg_init, vha, 0x0149, 1923 "ISP%04X: Host registration with firmware\n", 1924 ha->pdev->device); 1925 ql_dbg(ql_dbg_init, vha, 0x014a, 1926 "os_type = '%d', sysname = '%s', nodname = '%s'\n", 1927 phost_info->os_type, 1928 phost_info->sysname, 1929 phost_info->nodename); 1930 ql_dbg(ql_dbg_init, vha, 0x014b, 1931 "release = '%s', version = '%s'\n", 1932 phost_info->release, 1933 phost_info->version); 1934 ql_dbg(ql_dbg_init, vha, 0x014c, 1935 "machine = '%s' " 1936 "domainname = '%s', hostdriver = '%s'\n", 1937 phost_info->machine, 1938 phost_info->domainname, 1939 phost_info->hostdriver); 1940 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d, 1941 (uint8_t *)phost_info, 1942 sizeof(struct host_system_info)); 1943 } 1944 } 1945 1946 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) { 1947 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev, 1948 fdisc->u.fxiocb.rsp_len, 1949 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL); 1950 if (!fdisc->u.fxiocb.rsp_addr) 1951 goto done_unmap_req; 1952 } 1953 1954 sp->type = SRB_FXIOCB_DCMD; 1955 sp->name = "fxdisc"; 1956 qla2x00_init_timer(sp, FXDISC_TIMEOUT); 1957 fdisc->timeout = qla2x00_fxdisc_iocb_timeout; 1958 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type); 1959 sp->done = qla2x00_fxdisc_sp_done; 1960 1961 rval = qla2x00_start_sp(sp); 1962 if (rval != QLA_SUCCESS) 1963 goto done_unmap_dma; 1964 1965 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp); 1966 1967 if (fx_type == FXDISC_GET_CONFIG_INFO) { 1968 struct config_info_data *pinfo = 1969 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr; 1970 strcpy(vha->hw->model_number, pinfo->model_num); 1971 strcpy(vha->hw->model_desc, pinfo->model_description); 1972 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name, 1973 sizeof(vha->hw->mr.symbolic_name)); 1974 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num, 1975 sizeof(vha->hw->mr.serial_num)); 1976 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version, 1977 sizeof(vha->hw->mr.hw_version)); 1978 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version, 1979 sizeof(vha->hw->mr.fw_version)); 1980 strim(vha->hw->mr.fw_version); 1981 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version, 1982 sizeof(vha->hw->mr.uboot_version)); 1983 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num, 1984 sizeof(vha->hw->mr.fru_serial_num)); 1985 vha->hw->mr.critical_temperature = 1986 (pinfo->nominal_temp_value) ? 1987 pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD; 1988 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities & 1989 QLAFX00_EXTENDED_IO_EN_MASK) != 0; 1990 } else if (fx_type == FXDISC_GET_PORT_INFO) { 1991 struct port_info_data *pinfo = 1992 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr; 1993 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE); 1994 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE); 1995 vha->d_id.b.domain = pinfo->port_id[0]; 1996 vha->d_id.b.area = pinfo->port_id[1]; 1997 vha->d_id.b.al_pa = pinfo->port_id[2]; 1998 qlafx00_update_host_attr(vha, pinfo); 1999 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141, 2000 (uint8_t *)pinfo, 16); 2001 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) { 2002 struct qlafx00_tgt_node_info *pinfo = 2003 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr; 2004 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE); 2005 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE); 2006 fcport->port_type = FCT_TARGET; 2007 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144, 2008 (uint8_t *)pinfo, 16); 2009 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) { 2010 struct qlafx00_tgt_node_info *pinfo = 2011 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr; 2012 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146, 2013 (uint8_t *)pinfo, 16); 2014 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE); 2015 } else if (fx_type == FXDISC_ABORT_IOCTL) 2016 fdisc->u.fxiocb.result = 2017 (fdisc->u.fxiocb.result == cpu_to_le32(0x68)) ? 2018 cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED); 2019 2020 rval = le32_to_cpu(fdisc->u.fxiocb.result); 2021 2022 done_unmap_dma: 2023 if (fdisc->u.fxiocb.rsp_addr) 2024 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len, 2025 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle); 2026 2027 done_unmap_req: 2028 if (fdisc->u.fxiocb.req_addr) 2029 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len, 2030 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle); 2031 done_free_sp: 2032 sp->free(vha, sp); 2033 done: 2034 return rval; 2035 } 2036 2037 static void 2038 qlafx00_abort_iocb_timeout(void *data) 2039 { 2040 srb_t *sp = (srb_t *)data; 2041 struct srb_iocb *abt = &sp->u.iocb_cmd; 2042 2043 abt->u.abt.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT); 2044 complete(&abt->u.abt.comp); 2045 } 2046 2047 static void 2048 qlafx00_abort_sp_done(void *data, void *ptr, int res) 2049 { 2050 srb_t *sp = (srb_t *)ptr; 2051 struct srb_iocb *abt = &sp->u.iocb_cmd; 2052 2053 complete(&abt->u.abt.comp); 2054 } 2055 2056 static int 2057 qlafx00_async_abt_cmd(srb_t *cmd_sp) 2058 { 2059 scsi_qla_host_t *vha = cmd_sp->fcport->vha; 2060 fc_port_t *fcport = cmd_sp->fcport; 2061 struct srb_iocb *abt_iocb; 2062 srb_t *sp; 2063 int rval = QLA_FUNCTION_FAILED; 2064 2065 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 2066 if (!sp) 2067 goto done; 2068 2069 abt_iocb = &sp->u.iocb_cmd; 2070 sp->type = SRB_ABT_CMD; 2071 sp->name = "abort"; 2072 qla2x00_init_timer(sp, FXDISC_TIMEOUT); 2073 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 2074 sp->done = qlafx00_abort_sp_done; 2075 abt_iocb->timeout = qlafx00_abort_iocb_timeout; 2076 init_completion(&abt_iocb->u.abt.comp); 2077 2078 rval = qla2x00_start_sp(sp); 2079 if (rval != QLA_SUCCESS) 2080 goto done_free_sp; 2081 2082 ql_dbg(ql_dbg_async, vha, 0x507c, 2083 "Abort command issued - hdl=%x, target_id=%x\n", 2084 cmd_sp->handle, fcport->tgt_id); 2085 2086 wait_for_completion(&abt_iocb->u.abt.comp); 2087 2088 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 2089 QLA_SUCCESS : QLA_FUNCTION_FAILED; 2090 2091 done_free_sp: 2092 sp->free(vha, sp); 2093 done: 2094 return rval; 2095 } 2096 2097 int 2098 qlafx00_abort_command(srb_t *sp) 2099 { 2100 unsigned long flags = 0; 2101 2102 uint32_t handle; 2103 fc_port_t *fcport = sp->fcport; 2104 struct scsi_qla_host *vha = fcport->vha; 2105 struct qla_hw_data *ha = vha->hw; 2106 struct req_que *req = vha->req; 2107 2108 spin_lock_irqsave(&ha->hardware_lock, flags); 2109 for (handle = 1; handle < DEFAULT_OUTSTANDING_COMMANDS; handle++) { 2110 if (req->outstanding_cmds[handle] == sp) 2111 break; 2112 } 2113 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2114 if (handle == DEFAULT_OUTSTANDING_COMMANDS) { 2115 /* Command not found. */ 2116 return QLA_FUNCTION_FAILED; 2117 } 2118 if (sp->type == SRB_FXIOCB_DCMD) 2119 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 2120 FXDISC_ABORT_IOCTL); 2121 2122 return qlafx00_async_abt_cmd(sp); 2123 } 2124 2125 /* 2126 * qlafx00_initialize_adapter 2127 * Initialize board. 2128 * 2129 * Input: 2130 * ha = adapter block pointer. 2131 * 2132 * Returns: 2133 * 0 = success 2134 */ 2135 int 2136 qlafx00_initialize_adapter(scsi_qla_host_t *vha) 2137 { 2138 int rval; 2139 struct qla_hw_data *ha = vha->hw; 2140 uint32_t tempc; 2141 2142 /* Clear adapter flags. */ 2143 vha->flags.online = 0; 2144 ha->flags.chip_reset_done = 0; 2145 vha->flags.reset_active = 0; 2146 ha->flags.pci_channel_io_perm_failure = 0; 2147 ha->flags.eeh_busy = 0; 2148 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2149 atomic_set(&vha->loop_state, LOOP_DOWN); 2150 vha->device_flags = DFLG_NO_CABLE; 2151 vha->dpc_flags = 0; 2152 vha->flags.management_server_logged_in = 0; 2153 vha->marker_needed = 0; 2154 ha->isp_abort_cnt = 0; 2155 ha->beacon_blink_led = 0; 2156 2157 set_bit(0, ha->req_qid_map); 2158 set_bit(0, ha->rsp_qid_map); 2159 2160 ql_dbg(ql_dbg_init, vha, 0x0147, 2161 "Configuring PCI space...\n"); 2162 2163 rval = ha->isp_ops->pci_config(vha); 2164 if (rval) { 2165 ql_log(ql_log_warn, vha, 0x0148, 2166 "Unable to configure PCI space.\n"); 2167 return rval; 2168 } 2169 2170 rval = qlafx00_init_fw_ready(vha); 2171 if (rval != QLA_SUCCESS) 2172 return rval; 2173 2174 qlafx00_save_queue_ptrs(vha); 2175 2176 rval = qlafx00_config_queues(vha); 2177 if (rval != QLA_SUCCESS) 2178 return rval; 2179 2180 /* 2181 * Allocate the array of outstanding commands 2182 * now that we know the firmware resources. 2183 */ 2184 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req); 2185 if (rval != QLA_SUCCESS) 2186 return rval; 2187 2188 rval = qla2x00_init_rings(vha); 2189 ha->flags.chip_reset_done = 1; 2190 2191 tempc = QLAFX00_GET_TEMPERATURE(ha); 2192 ql_dbg(ql_dbg_init, vha, 0x0152, 2193 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n", 2194 __func__, tempc); 2195 2196 return rval; 2197 } 2198 2199 uint32_t 2200 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr, 2201 char *buf) 2202 { 2203 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); 2204 int rval = QLA_FUNCTION_FAILED; 2205 uint32_t state[1]; 2206 2207 if (qla2x00_reset_active(vha)) 2208 ql_log(ql_log_warn, vha, 0x70ce, 2209 "ISP reset active.\n"); 2210 else if (!vha->hw->flags.eeh_busy) { 2211 rval = qlafx00_get_firmware_state(vha, state); 2212 } 2213 if (rval != QLA_SUCCESS) 2214 memset(state, -1, sizeof(state)); 2215 2216 return state[0]; 2217 } 2218 2219 void 2220 qlafx00_get_host_speed(struct Scsi_Host *shost) 2221 { 2222 struct qla_hw_data *ha = ((struct scsi_qla_host *) 2223 (shost_priv(shost)))->hw; 2224 u32 speed = FC_PORTSPEED_UNKNOWN; 2225 2226 switch (ha->link_data_rate) { 2227 case QLAFX00_PORT_SPEED_2G: 2228 speed = FC_PORTSPEED_2GBIT; 2229 break; 2230 case QLAFX00_PORT_SPEED_4G: 2231 speed = FC_PORTSPEED_4GBIT; 2232 break; 2233 case QLAFX00_PORT_SPEED_8G: 2234 speed = FC_PORTSPEED_8GBIT; 2235 break; 2236 case QLAFX00_PORT_SPEED_10G: 2237 speed = FC_PORTSPEED_10GBIT; 2238 break; 2239 } 2240 fc_host_speed(shost) = speed; 2241 } 2242 2243 /** QLAFX00 specific ISR implementation functions */ 2244 2245 static inline void 2246 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, 2247 uint32_t sense_len, struct rsp_que *rsp, int res) 2248 { 2249 struct scsi_qla_host *vha = sp->fcport->vha; 2250 struct scsi_cmnd *cp = GET_CMD_SP(sp); 2251 uint32_t track_sense_len; 2252 2253 SET_FW_SENSE_LEN(sp, sense_len); 2254 2255 if (sense_len >= SCSI_SENSE_BUFFERSIZE) 2256 sense_len = SCSI_SENSE_BUFFERSIZE; 2257 2258 SET_CMD_SENSE_LEN(sp, sense_len); 2259 SET_CMD_SENSE_PTR(sp, cp->sense_buffer); 2260 track_sense_len = sense_len; 2261 2262 if (sense_len > par_sense_len) 2263 sense_len = par_sense_len; 2264 2265 memcpy(cp->sense_buffer, sense_data, sense_len); 2266 2267 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len); 2268 2269 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); 2270 track_sense_len -= sense_len; 2271 SET_CMD_SENSE_LEN(sp, track_sense_len); 2272 2273 ql_dbg(ql_dbg_io, vha, 0x304d, 2274 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n", 2275 sense_len, par_sense_len, track_sense_len); 2276 if (GET_FW_SENSE_LEN(sp) > 0) { 2277 rsp->status_srb = sp; 2278 cp->result = res; 2279 } 2280 2281 if (sense_len) { 2282 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039, 2283 "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n", 2284 sp->fcport->vha->host_no, cp->device->id, cp->device->lun, 2285 cp); 2286 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049, 2287 cp->sense_buffer, sense_len); 2288 } 2289 } 2290 2291 static void 2292 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2293 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp, 2294 __le16 sstatus, __le16 cpstatus) 2295 { 2296 struct srb_iocb *tmf; 2297 2298 tmf = &sp->u.iocb_cmd; 2299 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) || 2300 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID))) 2301 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE); 2302 tmf->u.tmf.comp_status = cpstatus; 2303 sp->done(vha, sp, 0); 2304 } 2305 2306 static void 2307 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2308 struct abort_iocb_entry_fx00 *pkt) 2309 { 2310 const char func[] = "ABT_IOCB"; 2311 srb_t *sp; 2312 struct srb_iocb *abt; 2313 2314 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2315 if (!sp) 2316 return; 2317 2318 abt = &sp->u.iocb_cmd; 2319 abt->u.abt.comp_status = pkt->tgt_id_sts; 2320 sp->done(vha, sp, 0); 2321 } 2322 2323 static void 2324 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req, 2325 struct ioctl_iocb_entry_fx00 *pkt) 2326 { 2327 const char func[] = "IOSB_IOCB"; 2328 srb_t *sp; 2329 struct fc_bsg_job *bsg_job; 2330 struct srb_iocb *iocb_job; 2331 int res; 2332 struct qla_mt_iocb_rsp_fx00 fstatus; 2333 uint8_t *fw_sts_ptr; 2334 2335 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2336 if (!sp) 2337 return; 2338 2339 if (sp->type == SRB_FXIOCB_DCMD) { 2340 iocb_job = &sp->u.iocb_cmd; 2341 iocb_job->u.fxiocb.seq_number = pkt->seq_no; 2342 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags; 2343 iocb_job->u.fxiocb.result = pkt->status; 2344 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID) 2345 iocb_job->u.fxiocb.req_data = 2346 pkt->dataword_r; 2347 } else { 2348 bsg_job = sp->u.bsg_job; 2349 2350 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00)); 2351 2352 fstatus.reserved_1 = pkt->reserved_0; 2353 fstatus.func_type = pkt->comp_func_num; 2354 fstatus.ioctl_flags = pkt->fw_iotcl_flags; 2355 fstatus.ioctl_data = pkt->dataword_r; 2356 fstatus.adapid = pkt->adapid; 2357 fstatus.adapid_hi = pkt->adapid_hi; 2358 fstatus.reserved_2 = pkt->reserved_1; 2359 fstatus.res_count = pkt->residuallen; 2360 fstatus.status = pkt->status; 2361 fstatus.seq_number = pkt->seq_no; 2362 memcpy(fstatus.reserved_3, 2363 pkt->reserved_2, 20 * sizeof(uint8_t)); 2364 2365 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) + 2366 sizeof(struct fc_bsg_reply); 2367 2368 memcpy(fw_sts_ptr, (uint8_t *)&fstatus, 2369 sizeof(struct qla_mt_iocb_rsp_fx00)); 2370 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + 2371 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t); 2372 2373 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 2374 sp->fcport->vha, 0x5080, 2375 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00)); 2376 2377 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 2378 sp->fcport->vha, 0x5074, 2379 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00)); 2380 2381 res = bsg_job->reply->result = DID_OK << 16; 2382 bsg_job->reply->reply_payload_rcv_len = 2383 bsg_job->reply_payload.payload_len; 2384 } 2385 sp->done(vha, sp, res); 2386 } 2387 2388 /** 2389 * qlafx00_status_entry() - Process a Status IOCB entry. 2390 * @ha: SCSI driver HA context 2391 * @pkt: Entry pointer 2392 */ 2393 static void 2394 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) 2395 { 2396 srb_t *sp; 2397 fc_port_t *fcport; 2398 struct scsi_cmnd *cp; 2399 struct sts_entry_fx00 *sts; 2400 __le16 comp_status; 2401 __le16 scsi_status; 2402 uint16_t ox_id; 2403 __le16 lscsi_status; 2404 int32_t resid; 2405 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, 2406 fw_resid_len; 2407 uint8_t *rsp_info = NULL, *sense_data = NULL; 2408 struct qla_hw_data *ha = vha->hw; 2409 uint32_t hindex, handle; 2410 uint16_t que; 2411 struct req_que *req; 2412 int logit = 1; 2413 int res = 0; 2414 2415 sts = (struct sts_entry_fx00 *) pkt; 2416 2417 comp_status = sts->comp_status; 2418 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK); 2419 hindex = sts->handle; 2420 handle = LSW(hindex); 2421 2422 que = MSW(hindex); 2423 req = ha->req_q_map[que]; 2424 2425 /* Validate handle. */ 2426 if (handle < req->num_outstanding_cmds) 2427 sp = req->outstanding_cmds[handle]; 2428 else 2429 sp = NULL; 2430 2431 if (sp == NULL) { 2432 ql_dbg(ql_dbg_io, vha, 0x3034, 2433 "Invalid status handle (0x%x).\n", handle); 2434 2435 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2436 qla2xxx_wake_dpc(vha); 2437 return; 2438 } 2439 2440 if (sp->type == SRB_TM_CMD) { 2441 req->outstanding_cmds[handle] = NULL; 2442 qlafx00_tm_iocb_entry(vha, req, pkt, sp, 2443 scsi_status, comp_status); 2444 return; 2445 } 2446 2447 /* Fast path completion. */ 2448 if (comp_status == CS_COMPLETE && scsi_status == 0) { 2449 qla2x00_process_completed_request(vha, req, handle); 2450 return; 2451 } 2452 2453 req->outstanding_cmds[handle] = NULL; 2454 cp = GET_CMD_SP(sp); 2455 if (cp == NULL) { 2456 ql_dbg(ql_dbg_io, vha, 0x3048, 2457 "Command already returned (0x%x/%p).\n", 2458 handle, sp); 2459 2460 return; 2461 } 2462 2463 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK); 2464 2465 fcport = sp->fcport; 2466 2467 ox_id = 0; 2468 sense_len = par_sense_len = rsp_info_len = resid_len = 2469 fw_resid_len = 0; 2470 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)) 2471 sense_len = sts->sense_len; 2472 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER 2473 | (uint16_t)SS_RESIDUAL_OVER))) 2474 resid_len = le32_to_cpu(sts->residual_len); 2475 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN)) 2476 fw_resid_len = le32_to_cpu(sts->residual_len); 2477 rsp_info = sense_data = sts->data; 2478 par_sense_len = sizeof(sts->data); 2479 2480 /* Check for overrun. */ 2481 if (comp_status == CS_COMPLETE && 2482 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER)) 2483 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN); 2484 2485 /* 2486 * Based on Host and scsi status generate status code for Linux 2487 */ 2488 switch (le16_to_cpu(comp_status)) { 2489 case CS_COMPLETE: 2490 case CS_QUEUE_FULL: 2491 if (scsi_status == 0) { 2492 res = DID_OK << 16; 2493 break; 2494 } 2495 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER 2496 | (uint16_t)SS_RESIDUAL_OVER))) { 2497 resid = resid_len; 2498 scsi_set_resid(cp, resid); 2499 2500 if (!lscsi_status && 2501 ((unsigned)(scsi_bufflen(cp) - resid) < 2502 cp->underflow)) { 2503 ql_dbg(ql_dbg_io, fcport->vha, 0x3050, 2504 "Mid-layer underflow " 2505 "detected (0x%x of 0x%x bytes).\n", 2506 resid, scsi_bufflen(cp)); 2507 2508 res = DID_ERROR << 16; 2509 break; 2510 } 2511 } 2512 res = DID_OK << 16 | le16_to_cpu(lscsi_status); 2513 2514 if (lscsi_status == 2515 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) { 2516 ql_dbg(ql_dbg_io, fcport->vha, 0x3051, 2517 "QUEUE FULL detected.\n"); 2518 break; 2519 } 2520 logit = 0; 2521 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION)) 2522 break; 2523 2524 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 2525 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))) 2526 break; 2527 2528 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len, 2529 rsp, res); 2530 break; 2531 2532 case CS_DATA_UNDERRUN: 2533 /* Use F/W calculated residual length. */ 2534 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) 2535 resid = fw_resid_len; 2536 else 2537 resid = resid_len; 2538 scsi_set_resid(cp, resid); 2539 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) { 2540 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) 2541 && fw_resid_len != resid_len) { 2542 ql_dbg(ql_dbg_io, fcport->vha, 0x3052, 2543 "Dropped frame(s) detected " 2544 "(0x%x of 0x%x bytes).\n", 2545 resid, scsi_bufflen(cp)); 2546 2547 res = DID_ERROR << 16 | 2548 le16_to_cpu(lscsi_status); 2549 goto check_scsi_status; 2550 } 2551 2552 if (!lscsi_status && 2553 ((unsigned)(scsi_bufflen(cp) - resid) < 2554 cp->underflow)) { 2555 ql_dbg(ql_dbg_io, fcport->vha, 0x3053, 2556 "Mid-layer underflow " 2557 "detected (0x%x of 0x%x bytes, " 2558 "cp->underflow: 0x%x).\n", 2559 resid, scsi_bufflen(cp), cp->underflow); 2560 2561 res = DID_ERROR << 16; 2562 break; 2563 } 2564 } else if (lscsi_status != 2565 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) && 2566 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) { 2567 /* 2568 * scsi status of task set and busy are considered 2569 * to be task not completed. 2570 */ 2571 2572 ql_dbg(ql_dbg_io, fcport->vha, 0x3054, 2573 "Dropped frame(s) detected (0x%x " 2574 "of 0x%x bytes).\n", resid, 2575 scsi_bufflen(cp)); 2576 2577 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status); 2578 goto check_scsi_status; 2579 } else { 2580 ql_dbg(ql_dbg_io, fcport->vha, 0x3055, 2581 "scsi_status: 0x%x, lscsi_status: 0x%x\n", 2582 scsi_status, lscsi_status); 2583 } 2584 2585 res = DID_OK << 16 | le16_to_cpu(lscsi_status); 2586 logit = 0; 2587 2588 check_scsi_status: 2589 /* 2590 * Check to see if SCSI Status is non zero. If so report SCSI 2591 * Status. 2592 */ 2593 if (lscsi_status != 0) { 2594 if (lscsi_status == 2595 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) { 2596 ql_dbg(ql_dbg_io, fcport->vha, 0x3056, 2597 "QUEUE FULL detected.\n"); 2598 logit = 1; 2599 break; 2600 } 2601 if (lscsi_status != 2602 cpu_to_le16((uint16_t)SS_CHECK_CONDITION)) 2603 break; 2604 2605 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 2606 if (!(scsi_status & 2607 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))) 2608 break; 2609 2610 qlafx00_handle_sense(sp, sense_data, par_sense_len, 2611 sense_len, rsp, res); 2612 } 2613 break; 2614 2615 case CS_PORT_LOGGED_OUT: 2616 case CS_PORT_CONFIG_CHG: 2617 case CS_PORT_BUSY: 2618 case CS_INCOMPLETE: 2619 case CS_PORT_UNAVAILABLE: 2620 case CS_TIMEOUT: 2621 case CS_RESET: 2622 2623 /* 2624 * We are going to have the fc class block the rport 2625 * while we try to recover so instruct the mid layer 2626 * to requeue until the class decides how to handle this. 2627 */ 2628 res = DID_TRANSPORT_DISRUPTED << 16; 2629 2630 ql_dbg(ql_dbg_io, fcport->vha, 0x3057, 2631 "Port down status: port-state=0x%x.\n", 2632 atomic_read(&fcport->state)); 2633 2634 if (atomic_read(&fcport->state) == FCS_ONLINE) 2635 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); 2636 break; 2637 2638 case CS_ABORTED: 2639 res = DID_RESET << 16; 2640 break; 2641 2642 default: 2643 res = DID_ERROR << 16; 2644 break; 2645 } 2646 2647 if (logit) 2648 ql_dbg(ql_dbg_io, fcport->vha, 0x3058, 2649 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%d " 2650 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x " 2651 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sense_len=0x%x, " 2652 "par_sense_len=0x%x, rsp_info_len=0x%x\n", 2653 comp_status, scsi_status, res, vha->host_no, 2654 cp->device->id, cp->device->lun, fcport->tgt_id, 2655 lscsi_status, cp->cmnd, scsi_bufflen(cp), 2656 rsp_info_len, resid_len, fw_resid_len, sense_len, 2657 par_sense_len, rsp_info_len); 2658 2659 if (rsp->status_srb == NULL) 2660 sp->done(ha, sp, res); 2661 } 2662 2663 /** 2664 * qlafx00_status_cont_entry() - Process a Status Continuations entry. 2665 * @ha: SCSI driver HA context 2666 * @pkt: Entry pointer 2667 * 2668 * Extended sense data. 2669 */ 2670 static void 2671 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) 2672 { 2673 uint8_t sense_sz = 0; 2674 struct qla_hw_data *ha = rsp->hw; 2675 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); 2676 srb_t *sp = rsp->status_srb; 2677 struct scsi_cmnd *cp; 2678 uint32_t sense_len; 2679 uint8_t *sense_ptr; 2680 2681 if (!sp) { 2682 ql_dbg(ql_dbg_io, vha, 0x3037, 2683 "no SP, sp = %p\n", sp); 2684 return; 2685 } 2686 2687 if (!GET_FW_SENSE_LEN(sp)) { 2688 ql_dbg(ql_dbg_io, vha, 0x304b, 2689 "no fw sense data, sp = %p\n", sp); 2690 return; 2691 } 2692 cp = GET_CMD_SP(sp); 2693 if (cp == NULL) { 2694 ql_log(ql_log_warn, vha, 0x303b, 2695 "cmd is NULL: already returned to OS (sp=%p).\n", sp); 2696 2697 rsp->status_srb = NULL; 2698 return; 2699 } 2700 2701 if (!GET_CMD_SENSE_LEN(sp)) { 2702 ql_dbg(ql_dbg_io, vha, 0x304c, 2703 "no sense data, sp = %p\n", sp); 2704 } else { 2705 sense_len = GET_CMD_SENSE_LEN(sp); 2706 sense_ptr = GET_CMD_SENSE_PTR(sp); 2707 ql_dbg(ql_dbg_io, vha, 0x304f, 2708 "sp=%p sense_len=0x%x sense_ptr=%p.\n", 2709 sp, sense_len, sense_ptr); 2710 2711 if (sense_len > sizeof(pkt->data)) 2712 sense_sz = sizeof(pkt->data); 2713 else 2714 sense_sz = sense_len; 2715 2716 /* Move sense data. */ 2717 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e, 2718 (uint8_t *)pkt, sizeof(sts_cont_entry_t)); 2719 memcpy(sense_ptr, pkt->data, sense_sz); 2720 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a, 2721 sense_ptr, sense_sz); 2722 2723 sense_len -= sense_sz; 2724 sense_ptr += sense_sz; 2725 2726 SET_CMD_SENSE_PTR(sp, sense_ptr); 2727 SET_CMD_SENSE_LEN(sp, sense_len); 2728 } 2729 sense_len = GET_FW_SENSE_LEN(sp); 2730 sense_len = (sense_len > sizeof(pkt->data)) ? 2731 (sense_len - sizeof(pkt->data)) : 0; 2732 SET_FW_SENSE_LEN(sp, sense_len); 2733 2734 /* Place command on done queue. */ 2735 if (sense_len == 0) { 2736 rsp->status_srb = NULL; 2737 sp->done(ha, sp, cp->result); 2738 } 2739 } 2740 2741 /** 2742 * qlafx00_multistatus_entry() - Process Multi response queue entries. 2743 * @ha: SCSI driver HA context 2744 */ 2745 static void 2746 qlafx00_multistatus_entry(struct scsi_qla_host *vha, 2747 struct rsp_que *rsp, void *pkt) 2748 { 2749 srb_t *sp; 2750 struct multi_sts_entry_fx00 *stsmfx; 2751 struct qla_hw_data *ha = vha->hw; 2752 uint32_t handle, hindex, handle_count, i; 2753 uint16_t que; 2754 struct req_que *req; 2755 __le32 *handle_ptr; 2756 2757 stsmfx = (struct multi_sts_entry_fx00 *) pkt; 2758 2759 handle_count = stsmfx->handle_count; 2760 2761 if (handle_count > MAX_HANDLE_COUNT) { 2762 ql_dbg(ql_dbg_io, vha, 0x3035, 2763 "Invalid handle count (0x%x).\n", handle_count); 2764 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2765 qla2xxx_wake_dpc(vha); 2766 return; 2767 } 2768 2769 handle_ptr = &stsmfx->handles[0]; 2770 2771 for (i = 0; i < handle_count; i++) { 2772 hindex = le32_to_cpu(*handle_ptr); 2773 handle = LSW(hindex); 2774 que = MSW(hindex); 2775 req = ha->req_q_map[que]; 2776 2777 /* Validate handle. */ 2778 if (handle < req->num_outstanding_cmds) 2779 sp = req->outstanding_cmds[handle]; 2780 else 2781 sp = NULL; 2782 2783 if (sp == NULL) { 2784 ql_dbg(ql_dbg_io, vha, 0x3044, 2785 "Invalid status handle (0x%x).\n", handle); 2786 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2787 qla2xxx_wake_dpc(vha); 2788 return; 2789 } 2790 qla2x00_process_completed_request(vha, req, handle); 2791 handle_ptr++; 2792 } 2793 } 2794 2795 /** 2796 * qlafx00_error_entry() - Process an error entry. 2797 * @ha: SCSI driver HA context 2798 * @pkt: Entry pointer 2799 */ 2800 static void 2801 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, 2802 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype) 2803 { 2804 srb_t *sp; 2805 struct qla_hw_data *ha = vha->hw; 2806 const char func[] = "ERROR-IOCB"; 2807 uint16_t que = MSW(pkt->handle); 2808 struct req_que *req = NULL; 2809 int res = DID_ERROR << 16; 2810 2811 ql_dbg(ql_dbg_async, vha, 0x507f, 2812 "type of error status in response: 0x%x\n", estatus); 2813 2814 req = ha->req_q_map[que]; 2815 2816 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2817 if (sp) { 2818 sp->done(ha, sp, res); 2819 return; 2820 } 2821 2822 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2823 qla2xxx_wake_dpc(vha); 2824 } 2825 2826 /** 2827 * qlafx00_process_response_queue() - Process response queue entries. 2828 * @ha: SCSI driver HA context 2829 */ 2830 static void 2831 qlafx00_process_response_queue(struct scsi_qla_host *vha, 2832 struct rsp_que *rsp) 2833 { 2834 struct sts_entry_fx00 *pkt; 2835 response_t *lptr; 2836 2837 while (RD_REG_DWORD((void __iomem *)&(rsp->ring_ptr->signature)) != 2838 RESPONSE_PROCESSED) { 2839 lptr = rsp->ring_ptr; 2840 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr, 2841 sizeof(rsp->rsp_pkt)); 2842 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt; 2843 2844 rsp->ring_index++; 2845 if (rsp->ring_index == rsp->length) { 2846 rsp->ring_index = 0; 2847 rsp->ring_ptr = rsp->ring; 2848 } else { 2849 rsp->ring_ptr++; 2850 } 2851 2852 if (pkt->entry_status != 0 && 2853 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) { 2854 qlafx00_error_entry(vha, rsp, 2855 (struct sts_entry_fx00 *)pkt, pkt->entry_status, 2856 pkt->entry_type); 2857 goto next_iter; 2858 continue; 2859 } 2860 2861 switch (pkt->entry_type) { 2862 case STATUS_TYPE_FX00: 2863 qlafx00_status_entry(vha, rsp, pkt); 2864 break; 2865 2866 case STATUS_CONT_TYPE_FX00: 2867 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); 2868 break; 2869 2870 case MULTI_STATUS_TYPE_FX00: 2871 qlafx00_multistatus_entry(vha, rsp, pkt); 2872 break; 2873 2874 case ABORT_IOCB_TYPE_FX00: 2875 qlafx00_abort_iocb_entry(vha, rsp->req, 2876 (struct abort_iocb_entry_fx00 *)pkt); 2877 break; 2878 2879 case IOCTL_IOSB_TYPE_FX00: 2880 qlafx00_ioctl_iosb_entry(vha, rsp->req, 2881 (struct ioctl_iocb_entry_fx00 *)pkt); 2882 break; 2883 default: 2884 /* Type Not Supported. */ 2885 ql_dbg(ql_dbg_async, vha, 0x5081, 2886 "Received unknown response pkt type %x " 2887 "entry status=%x.\n", 2888 pkt->entry_type, pkt->entry_status); 2889 break; 2890 } 2891 next_iter: 2892 WRT_REG_DWORD((void __iomem *)&lptr->signature, 2893 RESPONSE_PROCESSED); 2894 wmb(); 2895 } 2896 2897 /* Adjust ring index */ 2898 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); 2899 } 2900 2901 /** 2902 * qlafx00_async_event() - Process aynchronous events. 2903 * @ha: SCSI driver HA context 2904 */ 2905 static void 2906 qlafx00_async_event(scsi_qla_host_t *vha) 2907 { 2908 struct qla_hw_data *ha = vha->hw; 2909 struct device_reg_fx00 __iomem *reg; 2910 int data_size = 1; 2911 2912 reg = &ha->iobase->ispfx00; 2913 /* Setup to process RIO completion. */ 2914 switch (ha->aenmb[0]) { 2915 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */ 2916 ql_log(ql_log_warn, vha, 0x5079, 2917 "ISP System Error - mbx1=%x\n", ha->aenmb[0]); 2918 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2919 break; 2920 2921 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */ 2922 ql_dbg(ql_dbg_async, vha, 0x5076, 2923 "Asynchronous FW shutdown requested.\n"); 2924 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2925 qla2xxx_wake_dpc(vha); 2926 break; 2927 2928 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */ 2929 ha->aenmb[1] = RD_REG_WORD(®->aenmailbox1); 2930 ha->aenmb[2] = RD_REG_WORD(®->aenmailbox2); 2931 ha->aenmb[3] = RD_REG_WORD(®->aenmailbox3); 2932 ql_dbg(ql_dbg_async, vha, 0x5077, 2933 "Asynchronous port Update received " 2934 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n", 2935 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]); 2936 data_size = 4; 2937 break; 2938 2939 case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */ 2940 ql_log(ql_log_info, vha, 0x5085, 2941 "Asynchronous over temperature event received " 2942 "aenmb[0]: %x\n", 2943 ha->aenmb[0]); 2944 break; 2945 2946 case QLAFX00_MBA_TEMP_NORM: /* Normal temperature event */ 2947 ql_log(ql_log_info, vha, 0x5086, 2948 "Asynchronous normal temperature event received " 2949 "aenmb[0]: %x\n", 2950 ha->aenmb[0]); 2951 break; 2952 2953 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */ 2954 ql_log(ql_log_info, vha, 0x5083, 2955 "Asynchronous critical temperature event received " 2956 "aenmb[0]: %x\n", 2957 ha->aenmb[0]); 2958 break; 2959 2960 default: 2961 ha->aenmb[1] = RD_REG_WORD(®->aenmailbox1); 2962 ha->aenmb[2] = RD_REG_WORD(®->aenmailbox2); 2963 ha->aenmb[3] = RD_REG_WORD(®->aenmailbox3); 2964 ha->aenmb[4] = RD_REG_WORD(®->aenmailbox4); 2965 ha->aenmb[5] = RD_REG_WORD(®->aenmailbox5); 2966 ha->aenmb[6] = RD_REG_WORD(®->aenmailbox6); 2967 ha->aenmb[7] = RD_REG_WORD(®->aenmailbox7); 2968 ql_dbg(ql_dbg_async, vha, 0x5078, 2969 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n", 2970 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3], 2971 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]); 2972 break; 2973 } 2974 qlafx00_post_aenfx_work(vha, ha->aenmb[0], 2975 (uint32_t *)ha->aenmb, data_size); 2976 } 2977 2978 /** 2979 * 2980 * qlafx00x_mbx_completion() - Process mailbox command completions. 2981 * @ha: SCSI driver HA context 2982 * @mb16: Mailbox16 register 2983 */ 2984 static void 2985 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0) 2986 { 2987 uint16_t cnt; 2988 uint16_t __iomem *wptr; 2989 struct qla_hw_data *ha = vha->hw; 2990 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 2991 2992 if (!ha->mcp32) 2993 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n"); 2994 2995 /* Load return mailbox registers. */ 2996 ha->flags.mbox_int = 1; 2997 ha->mailbox_out32[0] = mb0; 2998 wptr = (uint16_t __iomem *)®->mailbox17; 2999 3000 for (cnt = 1; cnt < ha->mbx_count; cnt++) { 3001 ha->mailbox_out32[cnt] = RD_REG_WORD(wptr); 3002 wptr++; 3003 } 3004 } 3005 3006 /** 3007 * qlafx00_intr_handler() - Process interrupts for the ISPFX00. 3008 * @irq: 3009 * @dev_id: SCSI driver HA context 3010 * 3011 * Called by system whenever the host adapter generates an interrupt. 3012 * 3013 * Returns handled flag. 3014 */ 3015 irqreturn_t 3016 qlafx00_intr_handler(int irq, void *dev_id) 3017 { 3018 scsi_qla_host_t *vha; 3019 struct qla_hw_data *ha; 3020 struct device_reg_fx00 __iomem *reg; 3021 int status; 3022 unsigned long iter; 3023 uint32_t stat; 3024 uint32_t mb[8]; 3025 struct rsp_que *rsp; 3026 unsigned long flags; 3027 uint32_t clr_intr = 0; 3028 3029 rsp = (struct rsp_que *) dev_id; 3030 if (!rsp) { 3031 ql_log(ql_log_info, NULL, 0x507d, 3032 "%s: NULL response queue pointer.\n", __func__); 3033 return IRQ_NONE; 3034 } 3035 3036 ha = rsp->hw; 3037 reg = &ha->iobase->ispfx00; 3038 status = 0; 3039 3040 if (unlikely(pci_channel_offline(ha->pdev))) 3041 return IRQ_HANDLED; 3042 3043 spin_lock_irqsave(&ha->hardware_lock, flags); 3044 vha = pci_get_drvdata(ha->pdev); 3045 for (iter = 50; iter--; clr_intr = 0) { 3046 stat = QLAFX00_RD_INTR_REG(ha); 3047 if (qla2x00_check_reg_for_disconnect(vha, stat)) 3048 break; 3049 if ((stat & QLAFX00_HST_INT_STS_BITS) == 0) 3050 break; 3051 3052 switch (stat & QLAFX00_HST_INT_STS_BITS) { 3053 case QLAFX00_INTR_MB_CMPLT: 3054 case QLAFX00_INTR_MB_RSP_CMPLT: 3055 case QLAFX00_INTR_MB_ASYNC_CMPLT: 3056 case QLAFX00_INTR_ALL_CMPLT: 3057 mb[0] = RD_REG_WORD(®->mailbox16); 3058 qlafx00_mbx_completion(vha, mb[0]); 3059 status |= MBX_INTERRUPT; 3060 clr_intr |= QLAFX00_INTR_MB_CMPLT; 3061 break; 3062 case QLAFX00_INTR_ASYNC_CMPLT: 3063 case QLAFX00_INTR_RSP_ASYNC_CMPLT: 3064 ha->aenmb[0] = RD_REG_WORD(®->aenmailbox0); 3065 qlafx00_async_event(vha); 3066 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT; 3067 break; 3068 case QLAFX00_INTR_RSP_CMPLT: 3069 qlafx00_process_response_queue(vha, rsp); 3070 clr_intr |= QLAFX00_INTR_RSP_CMPLT; 3071 break; 3072 default: 3073 ql_dbg(ql_dbg_async, vha, 0x507a, 3074 "Unrecognized interrupt type (%d).\n", stat); 3075 break; 3076 } 3077 QLAFX00_CLR_INTR_REG(ha, clr_intr); 3078 QLAFX00_RD_INTR_REG(ha); 3079 } 3080 3081 qla2x00_handle_mbx_completion(ha, status); 3082 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3083 3084 return IRQ_HANDLED; 3085 } 3086 3087 /** QLAFX00 specific IOCB implementation functions */ 3088 3089 static inline cont_a64_entry_t * 3090 qlafx00_prep_cont_type1_iocb(struct req_que *req, 3091 cont_a64_entry_t *lcont_pkt) 3092 { 3093 cont_a64_entry_t *cont_pkt; 3094 3095 /* Adjust ring index. */ 3096 req->ring_index++; 3097 if (req->ring_index == req->length) { 3098 req->ring_index = 0; 3099 req->ring_ptr = req->ring; 3100 } else { 3101 req->ring_ptr++; 3102 } 3103 3104 cont_pkt = (cont_a64_entry_t *)req->ring_ptr; 3105 3106 /* Load packet defaults. */ 3107 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00; 3108 3109 return cont_pkt; 3110 } 3111 3112 static inline void 3113 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt, 3114 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt) 3115 { 3116 uint16_t avail_dsds; 3117 __le32 *cur_dsd; 3118 scsi_qla_host_t *vha; 3119 struct scsi_cmnd *cmd; 3120 struct scatterlist *sg; 3121 int i, cont; 3122 struct req_que *req; 3123 cont_a64_entry_t lcont_pkt; 3124 cont_a64_entry_t *cont_pkt; 3125 3126 vha = sp->fcport->vha; 3127 req = vha->req; 3128 3129 cmd = GET_CMD_SP(sp); 3130 cont = 0; 3131 cont_pkt = NULL; 3132 3133 /* Update entry type to indicate Command Type 3 IOCB */ 3134 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7; 3135 3136 /* No data transfer */ 3137 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) { 3138 lcmd_pkt->byte_count = __constant_cpu_to_le32(0); 3139 return; 3140 } 3141 3142 /* Set transfer direction */ 3143 if (cmd->sc_data_direction == DMA_TO_DEVICE) { 3144 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA; 3145 vha->qla_stats.output_bytes += scsi_bufflen(cmd); 3146 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) { 3147 lcmd_pkt->cntrl_flags = TMF_READ_DATA; 3148 vha->qla_stats.input_bytes += scsi_bufflen(cmd); 3149 } 3150 3151 /* One DSD is available in the Command Type 3 IOCB */ 3152 avail_dsds = 1; 3153 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address; 3154 3155 /* Load data segments */ 3156 scsi_for_each_sg(cmd, sg, tot_dsds, i) { 3157 dma_addr_t sle_dma; 3158 3159 /* Allocate additional continuation packets? */ 3160 if (avail_dsds == 0) { 3161 /* 3162 * Five DSDs are available in the Continuation 3163 * Type 1 IOCB. 3164 */ 3165 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE); 3166 cont_pkt = 3167 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt); 3168 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address; 3169 avail_dsds = 5; 3170 cont = 1; 3171 } 3172 3173 sle_dma = sg_dma_address(sg); 3174 *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); 3175 *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); 3176 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); 3177 avail_dsds--; 3178 if (avail_dsds == 0 && cont == 1) { 3179 cont = 0; 3180 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt, 3181 REQUEST_ENTRY_SIZE); 3182 } 3183 3184 } 3185 if (avail_dsds != 0 && cont == 1) { 3186 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt, 3187 REQUEST_ENTRY_SIZE); 3188 } 3189 } 3190 3191 /** 3192 * qlafx00_start_scsi() - Send a SCSI command to the ISP 3193 * @sp: command to send to the ISP 3194 * 3195 * Returns non-zero if a failure occurred, else zero. 3196 */ 3197 int 3198 qlafx00_start_scsi(srb_t *sp) 3199 { 3200 int ret, nseg; 3201 unsigned long flags; 3202 uint32_t index; 3203 uint32_t handle; 3204 uint16_t cnt; 3205 uint16_t req_cnt; 3206 uint16_t tot_dsds; 3207 struct req_que *req = NULL; 3208 struct rsp_que *rsp = NULL; 3209 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 3210 struct scsi_qla_host *vha = sp->fcport->vha; 3211 struct qla_hw_data *ha = vha->hw; 3212 struct cmd_type_7_fx00 *cmd_pkt; 3213 struct cmd_type_7_fx00 lcmd_pkt; 3214 struct scsi_lun llun; 3215 char tag[2]; 3216 3217 /* Setup device pointers. */ 3218 ret = 0; 3219 3220 rsp = ha->rsp_q_map[0]; 3221 req = vha->req; 3222 3223 /* So we know we haven't pci_map'ed anything yet */ 3224 tot_dsds = 0; 3225 3226 /* Forcing marker needed for now */ 3227 vha->marker_needed = 0; 3228 3229 /* Send marker if required */ 3230 if (vha->marker_needed != 0) { 3231 if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) != 3232 QLA_SUCCESS) 3233 return QLA_FUNCTION_FAILED; 3234 vha->marker_needed = 0; 3235 } 3236 3237 /* Acquire ring specific lock */ 3238 spin_lock_irqsave(&ha->hardware_lock, flags); 3239 3240 /* Check for room in outstanding command list. */ 3241 handle = req->current_outstanding_cmd; 3242 for (index = 1; index < req->num_outstanding_cmds; index++) { 3243 handle++; 3244 if (handle == req->num_outstanding_cmds) 3245 handle = 1; 3246 if (!req->outstanding_cmds[handle]) 3247 break; 3248 } 3249 if (index == req->num_outstanding_cmds) 3250 goto queuing_error; 3251 3252 /* Map the sg table so we have an accurate count of sg entries needed */ 3253 if (scsi_sg_count(cmd)) { 3254 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd), 3255 scsi_sg_count(cmd), cmd->sc_data_direction); 3256 if (unlikely(!nseg)) 3257 goto queuing_error; 3258 } else 3259 nseg = 0; 3260 3261 tot_dsds = nseg; 3262 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds); 3263 if (req->cnt < (req_cnt + 2)) { 3264 cnt = RD_REG_DWORD_RELAXED(req->req_q_out); 3265 3266 if (req->ring_index < cnt) 3267 req->cnt = cnt - req->ring_index; 3268 else 3269 req->cnt = req->length - 3270 (req->ring_index - cnt); 3271 if (req->cnt < (req_cnt + 2)) 3272 goto queuing_error; 3273 } 3274 3275 /* Build command packet. */ 3276 req->current_outstanding_cmd = handle; 3277 req->outstanding_cmds[handle] = sp; 3278 sp->handle = handle; 3279 cmd->host_scribble = (unsigned char *)(unsigned long)handle; 3280 req->cnt -= req_cnt; 3281 3282 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr; 3283 3284 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE); 3285 3286 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle); 3287 lcmd_pkt.handle_hi = 0; 3288 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds); 3289 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id); 3290 3291 int_to_scsilun(cmd->device->lun, &llun); 3292 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun, 3293 sizeof(lcmd_pkt.lun)); 3294 3295 /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */ 3296 if (scsi_populate_tag_msg(cmd, tag)) { 3297 switch (tag[0]) { 3298 case HEAD_OF_QUEUE_TAG: 3299 lcmd_pkt.task = TSK_HEAD_OF_QUEUE; 3300 break; 3301 case ORDERED_QUEUE_TAG: 3302 lcmd_pkt.task = TSK_ORDERED; 3303 break; 3304 } 3305 } 3306 3307 /* Load SCSI command packet. */ 3308 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb)); 3309 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd)); 3310 3311 /* Build IOCB segments */ 3312 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt); 3313 3314 /* Set total data segment count. */ 3315 lcmd_pkt.entry_count = (uint8_t)req_cnt; 3316 3317 /* Specify response queue number where completion should happen */ 3318 lcmd_pkt.entry_status = (uint8_t) rsp->id; 3319 3320 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e, 3321 (uint8_t *)cmd->cmnd, cmd->cmd_len); 3322 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032, 3323 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE); 3324 3325 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE); 3326 wmb(); 3327 3328 /* Adjust ring index. */ 3329 req->ring_index++; 3330 if (req->ring_index == req->length) { 3331 req->ring_index = 0; 3332 req->ring_ptr = req->ring; 3333 } else 3334 req->ring_ptr++; 3335 3336 sp->flags |= SRB_DMA_VALID; 3337 3338 /* Set chip new ring index. */ 3339 WRT_REG_DWORD(req->req_q_in, req->ring_index); 3340 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code); 3341 3342 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3343 return QLA_SUCCESS; 3344 3345 queuing_error: 3346 if (tot_dsds) 3347 scsi_dma_unmap(cmd); 3348 3349 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3350 3351 return QLA_FUNCTION_FAILED; 3352 } 3353 3354 void 3355 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb) 3356 { 3357 struct srb_iocb *fxio = &sp->u.iocb_cmd; 3358 scsi_qla_host_t *vha = sp->fcport->vha; 3359 struct req_que *req = vha->req; 3360 struct tsk_mgmt_entry_fx00 tm_iocb; 3361 struct scsi_lun llun; 3362 3363 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00)); 3364 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00; 3365 tm_iocb.entry_count = 1; 3366 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle)); 3367 tm_iocb.handle_hi = 0; 3368 tm_iocb.timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2); 3369 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id); 3370 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags); 3371 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) { 3372 int_to_scsilun(fxio->u.tmf.lun, &llun); 3373 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun, 3374 sizeof(struct scsi_lun)); 3375 } 3376 3377 memcpy((void *)ptm_iocb, &tm_iocb, 3378 sizeof(struct tsk_mgmt_entry_fx00)); 3379 wmb(); 3380 } 3381 3382 void 3383 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb) 3384 { 3385 struct srb_iocb *fxio = &sp->u.iocb_cmd; 3386 scsi_qla_host_t *vha = sp->fcport->vha; 3387 struct req_que *req = vha->req; 3388 struct abort_iocb_entry_fx00 abt_iocb; 3389 3390 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00)); 3391 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00; 3392 abt_iocb.entry_count = 1; 3393 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle)); 3394 abt_iocb.abort_handle = 3395 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl)); 3396 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id); 3397 abt_iocb.req_que_no = cpu_to_le16(req->id); 3398 3399 memcpy((void *)pabt_iocb, &abt_iocb, 3400 sizeof(struct abort_iocb_entry_fx00)); 3401 wmb(); 3402 } 3403 3404 void 3405 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb) 3406 { 3407 struct srb_iocb *fxio = &sp->u.iocb_cmd; 3408 struct qla_mt_iocb_rqst_fx00 *piocb_rqst; 3409 struct fc_bsg_job *bsg_job; 3410 struct fxdisc_entry_fx00 fx_iocb; 3411 uint8_t entry_cnt = 1; 3412 3413 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00)); 3414 fx_iocb.entry_type = FX00_IOCB_TYPE; 3415 fx_iocb.handle = cpu_to_le32(sp->handle); 3416 fx_iocb.entry_count = entry_cnt; 3417 3418 if (sp->type == SRB_FXIOCB_DCMD) { 3419 fx_iocb.func_num = 3420 sp->u.iocb_cmd.u.fxiocb.req_func_type; 3421 fx_iocb.adapid = fxio->u.fxiocb.adapter_id; 3422 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi; 3423 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0; 3424 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1; 3425 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra; 3426 3427 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) { 3428 fx_iocb.req_dsdcnt = cpu_to_le16(1); 3429 fx_iocb.req_xfrcnt = 3430 cpu_to_le16(fxio->u.fxiocb.req_len); 3431 fx_iocb.dseg_rq_address[0] = 3432 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle)); 3433 fx_iocb.dseg_rq_address[1] = 3434 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle)); 3435 fx_iocb.dseg_rq_len = 3436 cpu_to_le32(fxio->u.fxiocb.req_len); 3437 } 3438 3439 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) { 3440 fx_iocb.rsp_dsdcnt = cpu_to_le16(1); 3441 fx_iocb.rsp_xfrcnt = 3442 cpu_to_le16(fxio->u.fxiocb.rsp_len); 3443 fx_iocb.dseg_rsp_address[0] = 3444 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle)); 3445 fx_iocb.dseg_rsp_address[1] = 3446 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle)); 3447 fx_iocb.dseg_rsp_len = 3448 cpu_to_le32(fxio->u.fxiocb.rsp_len); 3449 } 3450 3451 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) { 3452 fx_iocb.dataword = fxio->u.fxiocb.req_data; 3453 } 3454 fx_iocb.flags = fxio->u.fxiocb.flags; 3455 } else { 3456 struct scatterlist *sg; 3457 bsg_job = sp->u.bsg_job; 3458 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *) 3459 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1]; 3460 3461 fx_iocb.func_num = piocb_rqst->func_type; 3462 fx_iocb.adapid = piocb_rqst->adapid; 3463 fx_iocb.adapid_hi = piocb_rqst->adapid_hi; 3464 fx_iocb.reserved_0 = piocb_rqst->reserved_0; 3465 fx_iocb.reserved_1 = piocb_rqst->reserved_1; 3466 fx_iocb.dataword_extra = piocb_rqst->dataword_extra; 3467 fx_iocb.dataword = piocb_rqst->dataword; 3468 fx_iocb.req_xfrcnt = piocb_rqst->req_len; 3469 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len; 3470 3471 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) { 3472 int avail_dsds, tot_dsds; 3473 cont_a64_entry_t lcont_pkt; 3474 cont_a64_entry_t *cont_pkt = NULL; 3475 __le32 *cur_dsd; 3476 int index = 0, cont = 0; 3477 3478 fx_iocb.req_dsdcnt = 3479 cpu_to_le16(bsg_job->request_payload.sg_cnt); 3480 tot_dsds = 3481 bsg_job->request_payload.sg_cnt; 3482 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0]; 3483 avail_dsds = 1; 3484 for_each_sg(bsg_job->request_payload.sg_list, sg, 3485 tot_dsds, index) { 3486 dma_addr_t sle_dma; 3487 3488 /* Allocate additional continuation packets? */ 3489 if (avail_dsds == 0) { 3490 /* 3491 * Five DSDs are available in the Cont. 3492 * Type 1 IOCB. 3493 */ 3494 memset(&lcont_pkt, 0, 3495 REQUEST_ENTRY_SIZE); 3496 cont_pkt = 3497 qlafx00_prep_cont_type1_iocb( 3498 sp->fcport->vha->req, 3499 &lcont_pkt); 3500 cur_dsd = (__le32 *) 3501 lcont_pkt.dseg_0_address; 3502 avail_dsds = 5; 3503 cont = 1; 3504 entry_cnt++; 3505 } 3506 3507 sle_dma = sg_dma_address(sg); 3508 *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); 3509 *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); 3510 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); 3511 avail_dsds--; 3512 3513 if (avail_dsds == 0 && cont == 1) { 3514 cont = 0; 3515 memcpy_toio( 3516 (void __iomem *)cont_pkt, 3517 &lcont_pkt, REQUEST_ENTRY_SIZE); 3518 ql_dump_buffer( 3519 ql_dbg_user + ql_dbg_verbose, 3520 sp->fcport->vha, 0x3042, 3521 (uint8_t *)&lcont_pkt, 3522 REQUEST_ENTRY_SIZE); 3523 } 3524 } 3525 if (avail_dsds != 0 && cont == 1) { 3526 memcpy_toio((void __iomem *)cont_pkt, 3527 &lcont_pkt, REQUEST_ENTRY_SIZE); 3528 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 3529 sp->fcport->vha, 0x3043, 3530 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE); 3531 } 3532 } 3533 3534 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) { 3535 int avail_dsds, tot_dsds; 3536 cont_a64_entry_t lcont_pkt; 3537 cont_a64_entry_t *cont_pkt = NULL; 3538 __le32 *cur_dsd; 3539 int index = 0, cont = 0; 3540 3541 fx_iocb.rsp_dsdcnt = 3542 cpu_to_le16(bsg_job->reply_payload.sg_cnt); 3543 tot_dsds = bsg_job->reply_payload.sg_cnt; 3544 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0]; 3545 avail_dsds = 1; 3546 3547 for_each_sg(bsg_job->reply_payload.sg_list, sg, 3548 tot_dsds, index) { 3549 dma_addr_t sle_dma; 3550 3551 /* Allocate additional continuation packets? */ 3552 if (avail_dsds == 0) { 3553 /* 3554 * Five DSDs are available in the Cont. 3555 * Type 1 IOCB. 3556 */ 3557 memset(&lcont_pkt, 0, 3558 REQUEST_ENTRY_SIZE); 3559 cont_pkt = 3560 qlafx00_prep_cont_type1_iocb( 3561 sp->fcport->vha->req, 3562 &lcont_pkt); 3563 cur_dsd = (__le32 *) 3564 lcont_pkt.dseg_0_address; 3565 avail_dsds = 5; 3566 cont = 1; 3567 entry_cnt++; 3568 } 3569 3570 sle_dma = sg_dma_address(sg); 3571 *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); 3572 *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); 3573 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); 3574 avail_dsds--; 3575 3576 if (avail_dsds == 0 && cont == 1) { 3577 cont = 0; 3578 memcpy_toio((void __iomem *)cont_pkt, 3579 &lcont_pkt, 3580 REQUEST_ENTRY_SIZE); 3581 ql_dump_buffer( 3582 ql_dbg_user + ql_dbg_verbose, 3583 sp->fcport->vha, 0x3045, 3584 (uint8_t *)&lcont_pkt, 3585 REQUEST_ENTRY_SIZE); 3586 } 3587 } 3588 if (avail_dsds != 0 && cont == 1) { 3589 memcpy_toio((void __iomem *)cont_pkt, 3590 &lcont_pkt, REQUEST_ENTRY_SIZE); 3591 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 3592 sp->fcport->vha, 0x3046, 3593 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE); 3594 } 3595 } 3596 3597 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID) 3598 fx_iocb.dataword = piocb_rqst->dataword; 3599 fx_iocb.flags = piocb_rqst->flags; 3600 fx_iocb.entry_count = entry_cnt; 3601 } 3602 3603 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 3604 sp->fcport->vha, 0x3047, 3605 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00)); 3606 3607 memcpy((void *)pfxiocb, &fx_iocb, 3608 sizeof(struct fxdisc_entry_fx00)); 3609 wmb(); 3610 } 3611