xref: /openbmc/linux/drivers/scsi/qla2xxx/qla_mbx.c (revision 8a10bc9d)
1 /*
2  * QLogic Fibre Channel HBA Driver
3  * Copyright (c)  2003-2013 QLogic Corporation
4  *
5  * See LICENSE.qla2xxx for copyright and licensing details.
6  */
7 #include "qla_def.h"
8 #include "qla_target.h"
9 
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
12 
13 
14 /*
15  * qla2x00_mailbox_command
16  *	Issue mailbox command and waits for completion.
17  *
18  * Input:
19  *	ha = adapter block pointer.
20  *	mcp = driver internal mbx struct pointer.
21  *
22  * Output:
23  *	mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
24  *
25  * Returns:
26  *	0 : QLA_SUCCESS = cmd performed success
27  *	1 : QLA_FUNCTION_FAILED   (error encountered)
28  *	6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
29  *
30  * Context:
31  *	Kernel context.
32  */
33 static int
34 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
35 {
36 	int		rval;
37 	unsigned long    flags = 0;
38 	device_reg_t __iomem *reg;
39 	uint8_t		abort_active;
40 	uint8_t		io_lock_on;
41 	uint16_t	command = 0;
42 	uint16_t	*iptr;
43 	uint16_t __iomem *optr;
44 	uint32_t	cnt;
45 	uint32_t	mboxes;
46 	unsigned long	wait_time;
47 	struct qla_hw_data *ha = vha->hw;
48 	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
49 
50 	ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
51 
52 	if (ha->pdev->error_state > pci_channel_io_frozen) {
53 		ql_log(ql_log_warn, vha, 0x1001,
54 		    "error_state is greater than pci_channel_io_frozen, "
55 		    "exiting.\n");
56 		return QLA_FUNCTION_TIMEOUT;
57 	}
58 
59 	if (vha->device_flags & DFLG_DEV_FAILED) {
60 		ql_log(ql_log_warn, vha, 0x1002,
61 		    "Device in failed state, exiting.\n");
62 		return QLA_FUNCTION_TIMEOUT;
63 	}
64 
65 	reg = ha->iobase;
66 	io_lock_on = base_vha->flags.init_done;
67 
68 	rval = QLA_SUCCESS;
69 	abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
70 
71 
72 	if (ha->flags.pci_channel_io_perm_failure) {
73 		ql_log(ql_log_warn, vha, 0x1003,
74 		    "Perm failure on EEH timeout MBX, exiting.\n");
75 		return QLA_FUNCTION_TIMEOUT;
76 	}
77 
78 	if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
79 		/* Setting Link-Down error */
80 		mcp->mb[0] = MBS_LINK_DOWN_ERROR;
81 		ql_log(ql_log_warn, vha, 0x1004,
82 		    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
83 		return QLA_FUNCTION_TIMEOUT;
84 	}
85 
86 	/*
87 	 * Wait for active mailbox commands to finish by waiting at most tov
88 	 * seconds. This is to serialize actual issuing of mailbox cmds during
89 	 * non ISP abort time.
90 	 */
91 	if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
92 		/* Timeout occurred. Return error. */
93 		ql_log(ql_log_warn, vha, 0x1005,
94 		    "Cmd access timeout, cmd=0x%x, Exiting.\n",
95 		    mcp->mb[0]);
96 		return QLA_FUNCTION_TIMEOUT;
97 	}
98 
99 	ha->flags.mbox_busy = 1;
100 	/* Save mailbox command for debug */
101 	ha->mcp = mcp;
102 
103 	ql_dbg(ql_dbg_mbx, vha, 0x1006,
104 	    "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
105 
106 	spin_lock_irqsave(&ha->hardware_lock, flags);
107 
108 	/* Load mailbox registers. */
109 	if (IS_P3P_TYPE(ha))
110 		optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
111 	else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
112 		optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
113 	else
114 		optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
115 
116 	iptr = mcp->mb;
117 	command = mcp->mb[0];
118 	mboxes = mcp->out_mb;
119 
120 	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1111,
121 	    "Mailbox registers (OUT):\n");
122 	for (cnt = 0; cnt < ha->mbx_count; cnt++) {
123 		if (IS_QLA2200(ha) && cnt == 8)
124 			optr =
125 			    (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
126 		if (mboxes & BIT_0) {
127 			ql_dbg(ql_dbg_mbx, vha, 0x1112,
128 			    "mbox[%d]<-0x%04x\n", cnt, *iptr);
129 			WRT_REG_WORD(optr, *iptr);
130 		}
131 
132 		mboxes >>= 1;
133 		optr++;
134 		iptr++;
135 	}
136 
137 	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
138 	    "I/O Address = %p.\n", optr);
139 
140 	/* Issue set host interrupt command to send cmd out. */
141 	ha->flags.mbox_int = 0;
142 	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
143 
144 	/* Unlock mbx registers and wait for interrupt */
145 	ql_dbg(ql_dbg_mbx, vha, 0x100f,
146 	    "Going to unlock irq & waiting for interrupts. "
147 	    "jiffies=%lx.\n", jiffies);
148 
149 	/* Wait for mbx cmd completion until timeout */
150 
151 	if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
152 		set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
153 
154 		if (IS_P3P_TYPE(ha)) {
155 			if (RD_REG_DWORD(&reg->isp82.hint) &
156 				HINT_MBX_INT_PENDING) {
157 				spin_unlock_irqrestore(&ha->hardware_lock,
158 					flags);
159 				ha->flags.mbox_busy = 0;
160 				ql_dbg(ql_dbg_mbx, vha, 0x1010,
161 				    "Pending mailbox timeout, exiting.\n");
162 				rval = QLA_FUNCTION_TIMEOUT;
163 				goto premature_exit;
164 			}
165 			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
166 		} else if (IS_FWI2_CAPABLE(ha))
167 			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
168 		else
169 			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
170 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
171 
172 		if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
173 		    mcp->tov * HZ)) {
174 			ql_dbg(ql_dbg_mbx, vha, 0x117a,
175 			    "cmd=%x Timeout.\n", command);
176 			spin_lock_irqsave(&ha->hardware_lock, flags);
177 			clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
178 			spin_unlock_irqrestore(&ha->hardware_lock, flags);
179 		}
180 	} else {
181 		ql_dbg(ql_dbg_mbx, vha, 0x1011,
182 		    "Cmd=%x Polling Mode.\n", command);
183 
184 		if (IS_P3P_TYPE(ha)) {
185 			if (RD_REG_DWORD(&reg->isp82.hint) &
186 				HINT_MBX_INT_PENDING) {
187 				spin_unlock_irqrestore(&ha->hardware_lock,
188 					flags);
189 				ha->flags.mbox_busy = 0;
190 				ql_dbg(ql_dbg_mbx, vha, 0x1012,
191 				    "Pending mailbox timeout, exiting.\n");
192 				rval = QLA_FUNCTION_TIMEOUT;
193 				goto premature_exit;
194 			}
195 			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
196 		} else if (IS_FWI2_CAPABLE(ha))
197 			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
198 		else
199 			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
200 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
201 
202 		wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
203 		while (!ha->flags.mbox_int) {
204 			if (time_after(jiffies, wait_time))
205 				break;
206 
207 			/* Check for pending interrupts. */
208 			qla2x00_poll(ha->rsp_q_map[0]);
209 
210 			if (!ha->flags.mbox_int &&
211 			    !(IS_QLA2200(ha) &&
212 			    command == MBC_LOAD_RISC_RAM_EXTENDED))
213 				msleep(10);
214 		} /* while */
215 		ql_dbg(ql_dbg_mbx, vha, 0x1013,
216 		    "Waited %d sec.\n",
217 		    (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
218 	}
219 
220 	/* Check whether we timed out */
221 	if (ha->flags.mbox_int) {
222 		uint16_t *iptr2;
223 
224 		ql_dbg(ql_dbg_mbx, vha, 0x1014,
225 		    "Cmd=%x completed.\n", command);
226 
227 		/* Got interrupt. Clear the flag. */
228 		ha->flags.mbox_int = 0;
229 		clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
230 
231 		if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
232 			ha->flags.mbox_busy = 0;
233 			/* Setting Link-Down error */
234 			mcp->mb[0] = MBS_LINK_DOWN_ERROR;
235 			ha->mcp = NULL;
236 			rval = QLA_FUNCTION_FAILED;
237 			ql_log(ql_log_warn, vha, 0x1015,
238 			    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
239 			goto premature_exit;
240 		}
241 
242 		if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
243 			rval = QLA_FUNCTION_FAILED;
244 
245 		/* Load return mailbox registers. */
246 		iptr2 = mcp->mb;
247 		iptr = (uint16_t *)&ha->mailbox_out[0];
248 		mboxes = mcp->in_mb;
249 
250 		ql_dbg(ql_dbg_mbx, vha, 0x1113,
251 		    "Mailbox registers (IN):\n");
252 		for (cnt = 0; cnt < ha->mbx_count; cnt++) {
253 			if (mboxes & BIT_0) {
254 				*iptr2 = *iptr;
255 				ql_dbg(ql_dbg_mbx, vha, 0x1114,
256 				    "mbox[%d]->0x%04x\n", cnt, *iptr2);
257 			}
258 
259 			mboxes >>= 1;
260 			iptr2++;
261 			iptr++;
262 		}
263 	} else {
264 
265 		uint16_t mb0;
266 		uint32_t ictrl;
267 
268 		if (IS_FWI2_CAPABLE(ha)) {
269 			mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
270 			ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
271 		} else {
272 			mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
273 			ictrl = RD_REG_WORD(&reg->isp.ictrl);
274 		}
275 		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
276 		    "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
277 		    "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
278 		ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
279 
280 		/*
281 		 * Attempt to capture a firmware dump for further analysis
282 		 * of the current firmware state.  We do not need to do this
283 		 * if we are intentionally generating a dump.
284 		 */
285 		if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
286 			ha->isp_ops->fw_dump(vha, 0);
287 
288 		rval = QLA_FUNCTION_TIMEOUT;
289 	}
290 
291 	ha->flags.mbox_busy = 0;
292 
293 	/* Clean up */
294 	ha->mcp = NULL;
295 
296 	if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
297 		ql_dbg(ql_dbg_mbx, vha, 0x101a,
298 		    "Checking for additional resp interrupt.\n");
299 
300 		/* polling mode for non isp_abort commands. */
301 		qla2x00_poll(ha->rsp_q_map[0]);
302 	}
303 
304 	if (rval == QLA_FUNCTION_TIMEOUT &&
305 	    mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
306 		if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
307 		    ha->flags.eeh_busy) {
308 			/* not in dpc. schedule it for dpc to take over. */
309 			ql_dbg(ql_dbg_mbx, vha, 0x101b,
310 			    "Timeout, schedule isp_abort_needed.\n");
311 
312 			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
313 			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
314 			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
315 				if (IS_QLA82XX(ha)) {
316 					ql_dbg(ql_dbg_mbx, vha, 0x112a,
317 					    "disabling pause transmit on port "
318 					    "0 & 1.\n");
319 					qla82xx_wr_32(ha,
320 					    QLA82XX_CRB_NIU + 0x98,
321 					    CRB_NIU_XG_PAUSE_CTL_P0|
322 					    CRB_NIU_XG_PAUSE_CTL_P1);
323 				}
324 				ql_log(ql_log_info, base_vha, 0x101c,
325 				    "Mailbox cmd timeout occurred, cmd=0x%x, "
326 				    "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
327 				    "abort.\n", command, mcp->mb[0],
328 				    ha->flags.eeh_busy);
329 				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
330 				qla2xxx_wake_dpc(vha);
331 			}
332 		} else if (!abort_active) {
333 			/* call abort directly since we are in the DPC thread */
334 			ql_dbg(ql_dbg_mbx, vha, 0x101d,
335 			    "Timeout, calling abort_isp.\n");
336 
337 			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
338 			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
339 			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
340 				if (IS_QLA82XX(ha)) {
341 					ql_dbg(ql_dbg_mbx, vha, 0x112b,
342 					    "disabling pause transmit on port "
343 					    "0 & 1.\n");
344 					qla82xx_wr_32(ha,
345 					    QLA82XX_CRB_NIU + 0x98,
346 					    CRB_NIU_XG_PAUSE_CTL_P0|
347 					    CRB_NIU_XG_PAUSE_CTL_P1);
348 				}
349 				ql_log(ql_log_info, base_vha, 0x101e,
350 				    "Mailbox cmd timeout occurred, cmd=0x%x, "
351 				    "mb[0]=0x%x. Scheduling ISP abort ",
352 				    command, mcp->mb[0]);
353 				set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
354 				clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
355 				/* Allow next mbx cmd to come in. */
356 				complete(&ha->mbx_cmd_comp);
357 				if (ha->isp_ops->abort_isp(vha)) {
358 					/* Failed. retry later. */
359 					set_bit(ISP_ABORT_NEEDED,
360 					    &vha->dpc_flags);
361 				}
362 				clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
363 				ql_dbg(ql_dbg_mbx, vha, 0x101f,
364 				    "Finished abort_isp.\n");
365 				goto mbx_done;
366 			}
367 		}
368 	}
369 
370 premature_exit:
371 	/* Allow next mbx cmd to come in. */
372 	complete(&ha->mbx_cmd_comp);
373 
374 mbx_done:
375 	if (rval) {
376 		ql_log(ql_log_warn, base_vha, 0x1020,
377 		    "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
378 		    mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
379 	} else {
380 		ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
381 	}
382 
383 	return rval;
384 }
385 
386 int
387 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
388     uint32_t risc_code_size)
389 {
390 	int rval;
391 	struct qla_hw_data *ha = vha->hw;
392 	mbx_cmd_t mc;
393 	mbx_cmd_t *mcp = &mc;
394 
395 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
396 	    "Entered %s.\n", __func__);
397 
398 	if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
399 		mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
400 		mcp->mb[8] = MSW(risc_addr);
401 		mcp->out_mb = MBX_8|MBX_0;
402 	} else {
403 		mcp->mb[0] = MBC_LOAD_RISC_RAM;
404 		mcp->out_mb = MBX_0;
405 	}
406 	mcp->mb[1] = LSW(risc_addr);
407 	mcp->mb[2] = MSW(req_dma);
408 	mcp->mb[3] = LSW(req_dma);
409 	mcp->mb[6] = MSW(MSD(req_dma));
410 	mcp->mb[7] = LSW(MSD(req_dma));
411 	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
412 	if (IS_FWI2_CAPABLE(ha)) {
413 		mcp->mb[4] = MSW(risc_code_size);
414 		mcp->mb[5] = LSW(risc_code_size);
415 		mcp->out_mb |= MBX_5|MBX_4;
416 	} else {
417 		mcp->mb[4] = LSW(risc_code_size);
418 		mcp->out_mb |= MBX_4;
419 	}
420 
421 	mcp->in_mb = MBX_0;
422 	mcp->tov = MBX_TOV_SECONDS;
423 	mcp->flags = 0;
424 	rval = qla2x00_mailbox_command(vha, mcp);
425 
426 	if (rval != QLA_SUCCESS) {
427 		ql_dbg(ql_dbg_mbx, vha, 0x1023,
428 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
429 	} else {
430 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
431 		    "Done %s.\n", __func__);
432 	}
433 
434 	return rval;
435 }
436 
437 #define	EXTENDED_BB_CREDITS	BIT_0
438 /*
439  * qla2x00_execute_fw
440  *     Start adapter firmware.
441  *
442  * Input:
443  *     ha = adapter block pointer.
444  *     TARGET_QUEUE_LOCK must be released.
445  *     ADAPTER_STATE_LOCK must be released.
446  *
447  * Returns:
448  *     qla2x00 local function return status code.
449  *
450  * Context:
451  *     Kernel context.
452  */
453 int
454 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
455 {
456 	int rval;
457 	struct qla_hw_data *ha = vha->hw;
458 	mbx_cmd_t mc;
459 	mbx_cmd_t *mcp = &mc;
460 
461 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
462 	    "Entered %s.\n", __func__);
463 
464 	mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
465 	mcp->out_mb = MBX_0;
466 	mcp->in_mb = MBX_0;
467 	if (IS_FWI2_CAPABLE(ha)) {
468 		mcp->mb[1] = MSW(risc_addr);
469 		mcp->mb[2] = LSW(risc_addr);
470 		mcp->mb[3] = 0;
471 		if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha)) {
472 			struct nvram_81xx *nv = ha->nvram;
473 			mcp->mb[4] = (nv->enhanced_features &
474 			    EXTENDED_BB_CREDITS);
475 		} else
476 			mcp->mb[4] = 0;
477 		mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
478 		mcp->in_mb |= MBX_1;
479 	} else {
480 		mcp->mb[1] = LSW(risc_addr);
481 		mcp->out_mb |= MBX_1;
482 		if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
483 			mcp->mb[2] = 0;
484 			mcp->out_mb |= MBX_2;
485 		}
486 	}
487 
488 	mcp->tov = MBX_TOV_SECONDS;
489 	mcp->flags = 0;
490 	rval = qla2x00_mailbox_command(vha, mcp);
491 
492 	if (rval != QLA_SUCCESS) {
493 		ql_dbg(ql_dbg_mbx, vha, 0x1026,
494 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
495 	} else {
496 		if (IS_FWI2_CAPABLE(ha)) {
497 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
498 			    "Done exchanges=%x.\n", mcp->mb[1]);
499 		} else {
500 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
501 			    "Done %s.\n", __func__);
502 		}
503 	}
504 
505 	return rval;
506 }
507 
508 /*
509  * qla2x00_get_fw_version
510  *	Get firmware version.
511  *
512  * Input:
513  *	ha:		adapter state pointer.
514  *	major:		pointer for major number.
515  *	minor:		pointer for minor number.
516  *	subminor:	pointer for subminor number.
517  *
518  * Returns:
519  *	qla2x00 local function return status code.
520  *
521  * Context:
522  *	Kernel context.
523  */
524 int
525 qla2x00_get_fw_version(scsi_qla_host_t *vha)
526 {
527 	int		rval;
528 	mbx_cmd_t	mc;
529 	mbx_cmd_t	*mcp = &mc;
530 	struct qla_hw_data *ha = vha->hw;
531 
532 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
533 	    "Entered %s.\n", __func__);
534 
535 	mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
536 	mcp->out_mb = MBX_0;
537 	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
538 	if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
539 		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
540 	if (IS_FWI2_CAPABLE(ha))
541 		mcp->in_mb |= MBX_17|MBX_16|MBX_15;
542 	mcp->flags = 0;
543 	mcp->tov = MBX_TOV_SECONDS;
544 	rval = qla2x00_mailbox_command(vha, mcp);
545 	if (rval != QLA_SUCCESS)
546 		goto failed;
547 
548 	/* Return mailbox data. */
549 	ha->fw_major_version = mcp->mb[1];
550 	ha->fw_minor_version = mcp->mb[2];
551 	ha->fw_subminor_version = mcp->mb[3];
552 	ha->fw_attributes = mcp->mb[6];
553 	if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
554 		ha->fw_memory_size = 0x1FFFF;		/* Defaults to 128KB. */
555 	else
556 		ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
557 	if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
558 		ha->mpi_version[0] = mcp->mb[10] & 0xff;
559 		ha->mpi_version[1] = mcp->mb[11] >> 8;
560 		ha->mpi_version[2] = mcp->mb[11] & 0xff;
561 		ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
562 		ha->phy_version[0] = mcp->mb[8] & 0xff;
563 		ha->phy_version[1] = mcp->mb[9] >> 8;
564 		ha->phy_version[2] = mcp->mb[9] & 0xff;
565 	}
566 	if (IS_FWI2_CAPABLE(ha)) {
567 		ha->fw_attributes_h = mcp->mb[15];
568 		ha->fw_attributes_ext[0] = mcp->mb[16];
569 		ha->fw_attributes_ext[1] = mcp->mb[17];
570 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
571 		    "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
572 		    __func__, mcp->mb[15], mcp->mb[6]);
573 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
574 		    "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
575 		    __func__, mcp->mb[17], mcp->mb[16]);
576 	}
577 
578 failed:
579 	if (rval != QLA_SUCCESS) {
580 		/*EMPTY*/
581 		ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
582 	} else {
583 		/*EMPTY*/
584 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
585 		    "Done %s.\n", __func__);
586 	}
587 	return rval;
588 }
589 
590 /*
591  * qla2x00_get_fw_options
592  *	Set firmware options.
593  *
594  * Input:
595  *	ha = adapter block pointer.
596  *	fwopt = pointer for firmware options.
597  *
598  * Returns:
599  *	qla2x00 local function return status code.
600  *
601  * Context:
602  *	Kernel context.
603  */
604 int
605 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
606 {
607 	int rval;
608 	mbx_cmd_t mc;
609 	mbx_cmd_t *mcp = &mc;
610 
611 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
612 	    "Entered %s.\n", __func__);
613 
614 	mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
615 	mcp->out_mb = MBX_0;
616 	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
617 	mcp->tov = MBX_TOV_SECONDS;
618 	mcp->flags = 0;
619 	rval = qla2x00_mailbox_command(vha, mcp);
620 
621 	if (rval != QLA_SUCCESS) {
622 		/*EMPTY*/
623 		ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
624 	} else {
625 		fwopts[0] = mcp->mb[0];
626 		fwopts[1] = mcp->mb[1];
627 		fwopts[2] = mcp->mb[2];
628 		fwopts[3] = mcp->mb[3];
629 
630 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
631 		    "Done %s.\n", __func__);
632 	}
633 
634 	return rval;
635 }
636 
637 
638 /*
639  * qla2x00_set_fw_options
640  *	Set firmware options.
641  *
642  * Input:
643  *	ha = adapter block pointer.
644  *	fwopt = pointer for firmware options.
645  *
646  * Returns:
647  *	qla2x00 local function return status code.
648  *
649  * Context:
650  *	Kernel context.
651  */
652 int
653 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
654 {
655 	int rval;
656 	mbx_cmd_t mc;
657 	mbx_cmd_t *mcp = &mc;
658 
659 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
660 	    "Entered %s.\n", __func__);
661 
662 	mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
663 	mcp->mb[1] = fwopts[1];
664 	mcp->mb[2] = fwopts[2];
665 	mcp->mb[3] = fwopts[3];
666 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
667 	mcp->in_mb = MBX_0;
668 	if (IS_FWI2_CAPABLE(vha->hw)) {
669 		mcp->in_mb |= MBX_1;
670 	} else {
671 		mcp->mb[10] = fwopts[10];
672 		mcp->mb[11] = fwopts[11];
673 		mcp->mb[12] = 0;	/* Undocumented, but used */
674 		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
675 	}
676 	mcp->tov = MBX_TOV_SECONDS;
677 	mcp->flags = 0;
678 	rval = qla2x00_mailbox_command(vha, mcp);
679 
680 	fwopts[0] = mcp->mb[0];
681 
682 	if (rval != QLA_SUCCESS) {
683 		/*EMPTY*/
684 		ql_dbg(ql_dbg_mbx, vha, 0x1030,
685 		    "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
686 	} else {
687 		/*EMPTY*/
688 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
689 		    "Done %s.\n", __func__);
690 	}
691 
692 	return rval;
693 }
694 
695 /*
696  * qla2x00_mbx_reg_test
697  *	Mailbox register wrap test.
698  *
699  * Input:
700  *	ha = adapter block pointer.
701  *	TARGET_QUEUE_LOCK must be released.
702  *	ADAPTER_STATE_LOCK must be released.
703  *
704  * Returns:
705  *	qla2x00 local function return status code.
706  *
707  * Context:
708  *	Kernel context.
709  */
710 int
711 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
712 {
713 	int rval;
714 	mbx_cmd_t mc;
715 	mbx_cmd_t *mcp = &mc;
716 
717 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
718 	    "Entered %s.\n", __func__);
719 
720 	mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
721 	mcp->mb[1] = 0xAAAA;
722 	mcp->mb[2] = 0x5555;
723 	mcp->mb[3] = 0xAA55;
724 	mcp->mb[4] = 0x55AA;
725 	mcp->mb[5] = 0xA5A5;
726 	mcp->mb[6] = 0x5A5A;
727 	mcp->mb[7] = 0x2525;
728 	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
729 	mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
730 	mcp->tov = MBX_TOV_SECONDS;
731 	mcp->flags = 0;
732 	rval = qla2x00_mailbox_command(vha, mcp);
733 
734 	if (rval == QLA_SUCCESS) {
735 		if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
736 		    mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
737 			rval = QLA_FUNCTION_FAILED;
738 		if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
739 		    mcp->mb[7] != 0x2525)
740 			rval = QLA_FUNCTION_FAILED;
741 	}
742 
743 	if (rval != QLA_SUCCESS) {
744 		/*EMPTY*/
745 		ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
746 	} else {
747 		/*EMPTY*/
748 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
749 		    "Done %s.\n", __func__);
750 	}
751 
752 	return rval;
753 }
754 
755 /*
756  * qla2x00_verify_checksum
757  *	Verify firmware checksum.
758  *
759  * Input:
760  *	ha = adapter block pointer.
761  *	TARGET_QUEUE_LOCK must be released.
762  *	ADAPTER_STATE_LOCK must be released.
763  *
764  * Returns:
765  *	qla2x00 local function return status code.
766  *
767  * Context:
768  *	Kernel context.
769  */
770 int
771 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
772 {
773 	int rval;
774 	mbx_cmd_t mc;
775 	mbx_cmd_t *mcp = &mc;
776 
777 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
778 	    "Entered %s.\n", __func__);
779 
780 	mcp->mb[0] = MBC_VERIFY_CHECKSUM;
781 	mcp->out_mb = MBX_0;
782 	mcp->in_mb = MBX_0;
783 	if (IS_FWI2_CAPABLE(vha->hw)) {
784 		mcp->mb[1] = MSW(risc_addr);
785 		mcp->mb[2] = LSW(risc_addr);
786 		mcp->out_mb |= MBX_2|MBX_1;
787 		mcp->in_mb |= MBX_2|MBX_1;
788 	} else {
789 		mcp->mb[1] = LSW(risc_addr);
790 		mcp->out_mb |= MBX_1;
791 		mcp->in_mb |= MBX_1;
792 	}
793 
794 	mcp->tov = MBX_TOV_SECONDS;
795 	mcp->flags = 0;
796 	rval = qla2x00_mailbox_command(vha, mcp);
797 
798 	if (rval != QLA_SUCCESS) {
799 		ql_dbg(ql_dbg_mbx, vha, 0x1036,
800 		    "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
801 		    (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
802 	} else {
803 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
804 		    "Done %s.\n", __func__);
805 	}
806 
807 	return rval;
808 }
809 
810 /*
811  * qla2x00_issue_iocb
812  *	Issue IOCB using mailbox command
813  *
814  * Input:
815  *	ha = adapter state pointer.
816  *	buffer = buffer pointer.
817  *	phys_addr = physical address of buffer.
818  *	size = size of buffer.
819  *	TARGET_QUEUE_LOCK must be released.
820  *	ADAPTER_STATE_LOCK must be released.
821  *
822  * Returns:
823  *	qla2x00 local function return status code.
824  *
825  * Context:
826  *	Kernel context.
827  */
828 int
829 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
830     dma_addr_t phys_addr, size_t size, uint32_t tov)
831 {
832 	int		rval;
833 	mbx_cmd_t	mc;
834 	mbx_cmd_t	*mcp = &mc;
835 
836 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
837 	    "Entered %s.\n", __func__);
838 
839 	mcp->mb[0] = MBC_IOCB_COMMAND_A64;
840 	mcp->mb[1] = 0;
841 	mcp->mb[2] = MSW(phys_addr);
842 	mcp->mb[3] = LSW(phys_addr);
843 	mcp->mb[6] = MSW(MSD(phys_addr));
844 	mcp->mb[7] = LSW(MSD(phys_addr));
845 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
846 	mcp->in_mb = MBX_2|MBX_0;
847 	mcp->tov = tov;
848 	mcp->flags = 0;
849 	rval = qla2x00_mailbox_command(vha, mcp);
850 
851 	if (rval != QLA_SUCCESS) {
852 		/*EMPTY*/
853 		ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
854 	} else {
855 		sts_entry_t *sts_entry = (sts_entry_t *) buffer;
856 
857 		/* Mask reserved bits. */
858 		sts_entry->entry_status &=
859 		    IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
860 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
861 		    "Done %s.\n", __func__);
862 	}
863 
864 	return rval;
865 }
866 
867 int
868 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
869     size_t size)
870 {
871 	return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
872 	    MBX_TOV_SECONDS);
873 }
874 
875 /*
876  * qla2x00_abort_command
877  *	Abort command aborts a specified IOCB.
878  *
879  * Input:
880  *	ha = adapter block pointer.
881  *	sp = SB structure pointer.
882  *
883  * Returns:
884  *	qla2x00 local function return status code.
885  *
886  * Context:
887  *	Kernel context.
888  */
889 int
890 qla2x00_abort_command(srb_t *sp)
891 {
892 	unsigned long   flags = 0;
893 	int		rval;
894 	uint32_t	handle = 0;
895 	mbx_cmd_t	mc;
896 	mbx_cmd_t	*mcp = &mc;
897 	fc_port_t	*fcport = sp->fcport;
898 	scsi_qla_host_t *vha = fcport->vha;
899 	struct qla_hw_data *ha = vha->hw;
900 	struct req_que *req = vha->req;
901 	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
902 
903 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
904 	    "Entered %s.\n", __func__);
905 
906 	spin_lock_irqsave(&ha->hardware_lock, flags);
907 	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
908 		if (req->outstanding_cmds[handle] == sp)
909 			break;
910 	}
911 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
912 
913 	if (handle == req->num_outstanding_cmds) {
914 		/* command not found */
915 		return QLA_FUNCTION_FAILED;
916 	}
917 
918 	mcp->mb[0] = MBC_ABORT_COMMAND;
919 	if (HAS_EXTENDED_IDS(ha))
920 		mcp->mb[1] = fcport->loop_id;
921 	else
922 		mcp->mb[1] = fcport->loop_id << 8;
923 	mcp->mb[2] = (uint16_t)handle;
924 	mcp->mb[3] = (uint16_t)(handle >> 16);
925 	mcp->mb[6] = (uint16_t)cmd->device->lun;
926 	mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
927 	mcp->in_mb = MBX_0;
928 	mcp->tov = MBX_TOV_SECONDS;
929 	mcp->flags = 0;
930 	rval = qla2x00_mailbox_command(vha, mcp);
931 
932 	if (rval != QLA_SUCCESS) {
933 		ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
934 	} else {
935 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
936 		    "Done %s.\n", __func__);
937 	}
938 
939 	return rval;
940 }
941 
942 int
943 qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
944 {
945 	int rval, rval2;
946 	mbx_cmd_t  mc;
947 	mbx_cmd_t  *mcp = &mc;
948 	scsi_qla_host_t *vha;
949 	struct req_que *req;
950 	struct rsp_que *rsp;
951 
952 	l = l;
953 	vha = fcport->vha;
954 
955 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
956 	    "Entered %s.\n", __func__);
957 
958 	req = vha->hw->req_q_map[0];
959 	rsp = req->rsp;
960 	mcp->mb[0] = MBC_ABORT_TARGET;
961 	mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
962 	if (HAS_EXTENDED_IDS(vha->hw)) {
963 		mcp->mb[1] = fcport->loop_id;
964 		mcp->mb[10] = 0;
965 		mcp->out_mb |= MBX_10;
966 	} else {
967 		mcp->mb[1] = fcport->loop_id << 8;
968 	}
969 	mcp->mb[2] = vha->hw->loop_reset_delay;
970 	mcp->mb[9] = vha->vp_idx;
971 
972 	mcp->in_mb = MBX_0;
973 	mcp->tov = MBX_TOV_SECONDS;
974 	mcp->flags = 0;
975 	rval = qla2x00_mailbox_command(vha, mcp);
976 	if (rval != QLA_SUCCESS) {
977 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
978 		    "Failed=%x.\n", rval);
979 	}
980 
981 	/* Issue marker IOCB. */
982 	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
983 							MK_SYNC_ID);
984 	if (rval2 != QLA_SUCCESS) {
985 		ql_dbg(ql_dbg_mbx, vha, 0x1040,
986 		    "Failed to issue marker IOCB (%x).\n", rval2);
987 	} else {
988 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
989 		    "Done %s.\n", __func__);
990 	}
991 
992 	return rval;
993 }
994 
995 int
996 qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
997 {
998 	int rval, rval2;
999 	mbx_cmd_t  mc;
1000 	mbx_cmd_t  *mcp = &mc;
1001 	scsi_qla_host_t *vha;
1002 	struct req_que *req;
1003 	struct rsp_que *rsp;
1004 
1005 	vha = fcport->vha;
1006 
1007 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1008 	    "Entered %s.\n", __func__);
1009 
1010 	req = vha->hw->req_q_map[0];
1011 	rsp = req->rsp;
1012 	mcp->mb[0] = MBC_LUN_RESET;
1013 	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1014 	if (HAS_EXTENDED_IDS(vha->hw))
1015 		mcp->mb[1] = fcport->loop_id;
1016 	else
1017 		mcp->mb[1] = fcport->loop_id << 8;
1018 	mcp->mb[2] = l;
1019 	mcp->mb[3] = 0;
1020 	mcp->mb[9] = vha->vp_idx;
1021 
1022 	mcp->in_mb = MBX_0;
1023 	mcp->tov = MBX_TOV_SECONDS;
1024 	mcp->flags = 0;
1025 	rval = qla2x00_mailbox_command(vha, mcp);
1026 	if (rval != QLA_SUCCESS) {
1027 		ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1028 	}
1029 
1030 	/* Issue marker IOCB. */
1031 	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1032 								MK_SYNC_ID_LUN);
1033 	if (rval2 != QLA_SUCCESS) {
1034 		ql_dbg(ql_dbg_mbx, vha, 0x1044,
1035 		    "Failed to issue marker IOCB (%x).\n", rval2);
1036 	} else {
1037 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1038 		    "Done %s.\n", __func__);
1039 	}
1040 
1041 	return rval;
1042 }
1043 
1044 /*
1045  * qla2x00_get_adapter_id
1046  *	Get adapter ID and topology.
1047  *
1048  * Input:
1049  *	ha = adapter block pointer.
1050  *	id = pointer for loop ID.
1051  *	al_pa = pointer for AL_PA.
1052  *	area = pointer for area.
1053  *	domain = pointer for domain.
1054  *	top = pointer for topology.
1055  *	TARGET_QUEUE_LOCK must be released.
1056  *	ADAPTER_STATE_LOCK must be released.
1057  *
1058  * Returns:
1059  *	qla2x00 local function return status code.
1060  *
1061  * Context:
1062  *	Kernel context.
1063  */
1064 int
1065 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1066     uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1067 {
1068 	int rval;
1069 	mbx_cmd_t mc;
1070 	mbx_cmd_t *mcp = &mc;
1071 
1072 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1073 	    "Entered %s.\n", __func__);
1074 
1075 	mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1076 	mcp->mb[9] = vha->vp_idx;
1077 	mcp->out_mb = MBX_9|MBX_0;
1078 	mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1079 	if (IS_CNA_CAPABLE(vha->hw))
1080 		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1081 	mcp->tov = MBX_TOV_SECONDS;
1082 	mcp->flags = 0;
1083 	rval = qla2x00_mailbox_command(vha, mcp);
1084 	if (mcp->mb[0] == MBS_COMMAND_ERROR)
1085 		rval = QLA_COMMAND_ERROR;
1086 	else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1087 		rval = QLA_INVALID_COMMAND;
1088 
1089 	/* Return data. */
1090 	*id = mcp->mb[1];
1091 	*al_pa = LSB(mcp->mb[2]);
1092 	*area = MSB(mcp->mb[2]);
1093 	*domain	= LSB(mcp->mb[3]);
1094 	*top = mcp->mb[6];
1095 	*sw_cap = mcp->mb[7];
1096 
1097 	if (rval != QLA_SUCCESS) {
1098 		/*EMPTY*/
1099 		ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1100 	} else {
1101 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1102 		    "Done %s.\n", __func__);
1103 
1104 		if (IS_CNA_CAPABLE(vha->hw)) {
1105 			vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1106 			vha->fcoe_fcf_idx = mcp->mb[10];
1107 			vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1108 			vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1109 			vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1110 			vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1111 			vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1112 			vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1113 		}
1114 	}
1115 
1116 	return rval;
1117 }
1118 
1119 /*
1120  * qla2x00_get_retry_cnt
1121  *	Get current firmware login retry count and delay.
1122  *
1123  * Input:
1124  *	ha = adapter block pointer.
1125  *	retry_cnt = pointer to login retry count.
1126  *	tov = pointer to login timeout value.
1127  *
1128  * Returns:
1129  *	qla2x00 local function return status code.
1130  *
1131  * Context:
1132  *	Kernel context.
1133  */
1134 int
1135 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1136     uint16_t *r_a_tov)
1137 {
1138 	int rval;
1139 	uint16_t ratov;
1140 	mbx_cmd_t mc;
1141 	mbx_cmd_t *mcp = &mc;
1142 
1143 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1144 	    "Entered %s.\n", __func__);
1145 
1146 	mcp->mb[0] = MBC_GET_RETRY_COUNT;
1147 	mcp->out_mb = MBX_0;
1148 	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1149 	mcp->tov = MBX_TOV_SECONDS;
1150 	mcp->flags = 0;
1151 	rval = qla2x00_mailbox_command(vha, mcp);
1152 
1153 	if (rval != QLA_SUCCESS) {
1154 		/*EMPTY*/
1155 		ql_dbg(ql_dbg_mbx, vha, 0x104a,
1156 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1157 	} else {
1158 		/* Convert returned data and check our values. */
1159 		*r_a_tov = mcp->mb[3] / 2;
1160 		ratov = (mcp->mb[3]/2) / 10;  /* mb[3] value is in 100ms */
1161 		if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1162 			/* Update to the larger values */
1163 			*retry_cnt = (uint8_t)mcp->mb[1];
1164 			*tov = ratov;
1165 		}
1166 
1167 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1168 		    "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1169 	}
1170 
1171 	return rval;
1172 }
1173 
1174 /*
1175  * qla2x00_init_firmware
1176  *	Initialize adapter firmware.
1177  *
1178  * Input:
1179  *	ha = adapter block pointer.
1180  *	dptr = Initialization control block pointer.
1181  *	size = size of initialization control block.
1182  *	TARGET_QUEUE_LOCK must be released.
1183  *	ADAPTER_STATE_LOCK must be released.
1184  *
1185  * Returns:
1186  *	qla2x00 local function return status code.
1187  *
1188  * Context:
1189  *	Kernel context.
1190  */
1191 int
1192 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1193 {
1194 	int rval;
1195 	mbx_cmd_t mc;
1196 	mbx_cmd_t *mcp = &mc;
1197 	struct qla_hw_data *ha = vha->hw;
1198 
1199 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1200 	    "Entered %s.\n", __func__);
1201 
1202 	if (IS_P3P_TYPE(ha) && ql2xdbwr)
1203 		qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
1204 			(0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1205 
1206 	if (ha->flags.npiv_supported)
1207 		mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1208 	else
1209 		mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1210 
1211 	mcp->mb[1] = 0;
1212 	mcp->mb[2] = MSW(ha->init_cb_dma);
1213 	mcp->mb[3] = LSW(ha->init_cb_dma);
1214 	mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1215 	mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1216 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1217 	if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1218 		mcp->mb[1] = BIT_0;
1219 		mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1220 		mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1221 		mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1222 		mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1223 		mcp->mb[14] = sizeof(*ha->ex_init_cb);
1224 		mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1225 	}
1226 	/* 1 and 2 should normally be captured. */
1227 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
1228 	if (IS_QLA83XX(ha))
1229 		/* mb3 is additional info about the installed SFP. */
1230 		mcp->in_mb  |= MBX_3;
1231 	mcp->buf_size = size;
1232 	mcp->flags = MBX_DMA_OUT;
1233 	mcp->tov = MBX_TOV_SECONDS;
1234 	rval = qla2x00_mailbox_command(vha, mcp);
1235 
1236 	if (rval != QLA_SUCCESS) {
1237 		/*EMPTY*/
1238 		ql_dbg(ql_dbg_mbx, vha, 0x104d,
1239 		    "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1240 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1241 	} else {
1242 		/*EMPTY*/
1243 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1244 		    "Done %s.\n", __func__);
1245 	}
1246 
1247 	return rval;
1248 }
1249 
1250 /*
1251  * qla2x00_get_node_name_list
1252  *      Issue get node name list mailbox command, kmalloc()
1253  *      and return the resulting list. Caller must kfree() it!
1254  *
1255  * Input:
1256  *      ha = adapter state pointer.
1257  *      out_data = resulting list
1258  *      out_len = length of the resulting list
1259  *
1260  * Returns:
1261  *      qla2x00 local function return status code.
1262  *
1263  * Context:
1264  *      Kernel context.
1265  */
1266 int
1267 qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
1268 {
1269 	struct qla_hw_data *ha = vha->hw;
1270 	struct qla_port_24xx_data *list = NULL;
1271 	void *pmap;
1272 	mbx_cmd_t mc;
1273 	dma_addr_t pmap_dma;
1274 	ulong dma_size;
1275 	int rval, left;
1276 
1277 	left = 1;
1278 	while (left > 0) {
1279 		dma_size = left * sizeof(*list);
1280 		pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
1281 					 &pmap_dma, GFP_KERNEL);
1282 		if (!pmap) {
1283 			ql_log(ql_log_warn, vha, 0x113f,
1284 			    "%s(%ld): DMA Alloc failed of %ld\n",
1285 			    __func__, vha->host_no, dma_size);
1286 			rval = QLA_MEMORY_ALLOC_FAILED;
1287 			goto out;
1288 		}
1289 
1290 		mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
1291 		mc.mb[1] = BIT_1 | BIT_3;
1292 		mc.mb[2] = MSW(pmap_dma);
1293 		mc.mb[3] = LSW(pmap_dma);
1294 		mc.mb[6] = MSW(MSD(pmap_dma));
1295 		mc.mb[7] = LSW(MSD(pmap_dma));
1296 		mc.mb[8] = dma_size;
1297 		mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
1298 		mc.in_mb = MBX_0|MBX_1;
1299 		mc.tov = 30;
1300 		mc.flags = MBX_DMA_IN;
1301 
1302 		rval = qla2x00_mailbox_command(vha, &mc);
1303 		if (rval != QLA_SUCCESS) {
1304 			if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
1305 			    (mc.mb[1] == 0xA)) {
1306 				left += le16_to_cpu(mc.mb[2]) /
1307 				    sizeof(struct qla_port_24xx_data);
1308 				goto restart;
1309 			}
1310 			goto out_free;
1311 		}
1312 
1313 		left = 0;
1314 
1315 		list = kzalloc(dma_size, GFP_KERNEL);
1316 		if (!list) {
1317 			ql_log(ql_log_warn, vha, 0x1140,
1318 			    "%s(%ld): failed to allocate node names list "
1319 			    "structure.\n", __func__, vha->host_no);
1320 			rval = QLA_MEMORY_ALLOC_FAILED;
1321 			goto out_free;
1322 		}
1323 
1324 		memcpy(list, pmap, dma_size);
1325 restart:
1326 		dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1327 	}
1328 
1329 	*out_data = list;
1330 	*out_len = dma_size;
1331 
1332 out:
1333 	return rval;
1334 
1335 out_free:
1336 	dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1337 	return rval;
1338 }
1339 
1340 /*
1341  * qla2x00_get_port_database
1342  *	Issue normal/enhanced get port database mailbox command
1343  *	and copy device name as necessary.
1344  *
1345  * Input:
1346  *	ha = adapter state pointer.
1347  *	dev = structure pointer.
1348  *	opt = enhanced cmd option byte.
1349  *
1350  * Returns:
1351  *	qla2x00 local function return status code.
1352  *
1353  * Context:
1354  *	Kernel context.
1355  */
1356 int
1357 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1358 {
1359 	int rval;
1360 	mbx_cmd_t mc;
1361 	mbx_cmd_t *mcp = &mc;
1362 	port_database_t *pd;
1363 	struct port_database_24xx *pd24;
1364 	dma_addr_t pd_dma;
1365 	struct qla_hw_data *ha = vha->hw;
1366 
1367 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1368 	    "Entered %s.\n", __func__);
1369 
1370 	pd24 = NULL;
1371 	pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1372 	if (pd  == NULL) {
1373 		ql_log(ql_log_warn, vha, 0x1050,
1374 		    "Failed to allocate port database structure.\n");
1375 		return QLA_MEMORY_ALLOC_FAILED;
1376 	}
1377 	memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1378 
1379 	mcp->mb[0] = MBC_GET_PORT_DATABASE;
1380 	if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1381 		mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1382 	mcp->mb[2] = MSW(pd_dma);
1383 	mcp->mb[3] = LSW(pd_dma);
1384 	mcp->mb[6] = MSW(MSD(pd_dma));
1385 	mcp->mb[7] = LSW(MSD(pd_dma));
1386 	mcp->mb[9] = vha->vp_idx;
1387 	mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1388 	mcp->in_mb = MBX_0;
1389 	if (IS_FWI2_CAPABLE(ha)) {
1390 		mcp->mb[1] = fcport->loop_id;
1391 		mcp->mb[10] = opt;
1392 		mcp->out_mb |= MBX_10|MBX_1;
1393 		mcp->in_mb |= MBX_1;
1394 	} else if (HAS_EXTENDED_IDS(ha)) {
1395 		mcp->mb[1] = fcport->loop_id;
1396 		mcp->mb[10] = opt;
1397 		mcp->out_mb |= MBX_10|MBX_1;
1398 	} else {
1399 		mcp->mb[1] = fcport->loop_id << 8 | opt;
1400 		mcp->out_mb |= MBX_1;
1401 	}
1402 	mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1403 	    PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1404 	mcp->flags = MBX_DMA_IN;
1405 	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1406 	rval = qla2x00_mailbox_command(vha, mcp);
1407 	if (rval != QLA_SUCCESS)
1408 		goto gpd_error_out;
1409 
1410 	if (IS_FWI2_CAPABLE(ha)) {
1411 		uint64_t zero = 0;
1412 		pd24 = (struct port_database_24xx *) pd;
1413 
1414 		/* Check for logged in state. */
1415 		if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1416 		    pd24->last_login_state != PDS_PRLI_COMPLETE) {
1417 			ql_dbg(ql_dbg_mbx, vha, 0x1051,
1418 			    "Unable to verify login-state (%x/%x) for "
1419 			    "loop_id %x.\n", pd24->current_login_state,
1420 			    pd24->last_login_state, fcport->loop_id);
1421 			rval = QLA_FUNCTION_FAILED;
1422 			goto gpd_error_out;
1423 		}
1424 
1425 		if (fcport->loop_id == FC_NO_LOOP_ID ||
1426 		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1427 		     memcmp(fcport->port_name, pd24->port_name, 8))) {
1428 			/* We lost the device mid way. */
1429 			rval = QLA_NOT_LOGGED_IN;
1430 			goto gpd_error_out;
1431 		}
1432 
1433 		/* Names are little-endian. */
1434 		memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1435 		memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1436 
1437 		/* Get port_id of device. */
1438 		fcport->d_id.b.domain = pd24->port_id[0];
1439 		fcport->d_id.b.area = pd24->port_id[1];
1440 		fcport->d_id.b.al_pa = pd24->port_id[2];
1441 		fcport->d_id.b.rsvd_1 = 0;
1442 
1443 		/* If not target must be initiator or unknown type. */
1444 		if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1445 			fcport->port_type = FCT_INITIATOR;
1446 		else
1447 			fcport->port_type = FCT_TARGET;
1448 
1449 		/* Passback COS information. */
1450 		fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1451 				FC_COS_CLASS2 : FC_COS_CLASS3;
1452 
1453 		if (pd24->prli_svc_param_word_3[0] & BIT_7)
1454 			fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1455 	} else {
1456 		uint64_t zero = 0;
1457 
1458 		/* Check for logged in state. */
1459 		if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1460 		    pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1461 			ql_dbg(ql_dbg_mbx, vha, 0x100a,
1462 			    "Unable to verify login-state (%x/%x) - "
1463 			    "portid=%02x%02x%02x.\n", pd->master_state,
1464 			    pd->slave_state, fcport->d_id.b.domain,
1465 			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
1466 			rval = QLA_FUNCTION_FAILED;
1467 			goto gpd_error_out;
1468 		}
1469 
1470 		if (fcport->loop_id == FC_NO_LOOP_ID ||
1471 		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1472 		     memcmp(fcport->port_name, pd->port_name, 8))) {
1473 			/* We lost the device mid way. */
1474 			rval = QLA_NOT_LOGGED_IN;
1475 			goto gpd_error_out;
1476 		}
1477 
1478 		/* Names are little-endian. */
1479 		memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1480 		memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1481 
1482 		/* Get port_id of device. */
1483 		fcport->d_id.b.domain = pd->port_id[0];
1484 		fcport->d_id.b.area = pd->port_id[3];
1485 		fcport->d_id.b.al_pa = pd->port_id[2];
1486 		fcport->d_id.b.rsvd_1 = 0;
1487 
1488 		/* If not target must be initiator or unknown type. */
1489 		if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1490 			fcport->port_type = FCT_INITIATOR;
1491 		else
1492 			fcport->port_type = FCT_TARGET;
1493 
1494 		/* Passback COS information. */
1495 		fcport->supported_classes = (pd->options & BIT_4) ?
1496 		    FC_COS_CLASS2: FC_COS_CLASS3;
1497 	}
1498 
1499 gpd_error_out:
1500 	dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1501 
1502 	if (rval != QLA_SUCCESS) {
1503 		ql_dbg(ql_dbg_mbx, vha, 0x1052,
1504 		    "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1505 		    mcp->mb[0], mcp->mb[1]);
1506 	} else {
1507 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1508 		    "Done %s.\n", __func__);
1509 	}
1510 
1511 	return rval;
1512 }
1513 
1514 /*
1515  * qla2x00_get_firmware_state
1516  *	Get adapter firmware state.
1517  *
1518  * Input:
1519  *	ha = adapter block pointer.
1520  *	dptr = pointer for firmware state.
1521  *	TARGET_QUEUE_LOCK must be released.
1522  *	ADAPTER_STATE_LOCK must be released.
1523  *
1524  * Returns:
1525  *	qla2x00 local function return status code.
1526  *
1527  * Context:
1528  *	Kernel context.
1529  */
1530 int
1531 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1532 {
1533 	int rval;
1534 	mbx_cmd_t mc;
1535 	mbx_cmd_t *mcp = &mc;
1536 
1537 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1538 	    "Entered %s.\n", __func__);
1539 
1540 	mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1541 	mcp->out_mb = MBX_0;
1542 	if (IS_FWI2_CAPABLE(vha->hw))
1543 		mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1544 	else
1545 		mcp->in_mb = MBX_1|MBX_0;
1546 	mcp->tov = MBX_TOV_SECONDS;
1547 	mcp->flags = 0;
1548 	rval = qla2x00_mailbox_command(vha, mcp);
1549 
1550 	/* Return firmware states. */
1551 	states[0] = mcp->mb[1];
1552 	if (IS_FWI2_CAPABLE(vha->hw)) {
1553 		states[1] = mcp->mb[2];
1554 		states[2] = mcp->mb[3];
1555 		states[3] = mcp->mb[4];
1556 		states[4] = mcp->mb[5];
1557 	}
1558 
1559 	if (rval != QLA_SUCCESS) {
1560 		/*EMPTY*/
1561 		ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1562 	} else {
1563 		/*EMPTY*/
1564 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1565 		    "Done %s.\n", __func__);
1566 	}
1567 
1568 	return rval;
1569 }
1570 
1571 /*
1572  * qla2x00_get_port_name
1573  *	Issue get port name mailbox command.
1574  *	Returned name is in big endian format.
1575  *
1576  * Input:
1577  *	ha = adapter block pointer.
1578  *	loop_id = loop ID of device.
1579  *	name = pointer for name.
1580  *	TARGET_QUEUE_LOCK must be released.
1581  *	ADAPTER_STATE_LOCK must be released.
1582  *
1583  * Returns:
1584  *	qla2x00 local function return status code.
1585  *
1586  * Context:
1587  *	Kernel context.
1588  */
1589 int
1590 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1591     uint8_t opt)
1592 {
1593 	int rval;
1594 	mbx_cmd_t mc;
1595 	mbx_cmd_t *mcp = &mc;
1596 
1597 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1598 	    "Entered %s.\n", __func__);
1599 
1600 	mcp->mb[0] = MBC_GET_PORT_NAME;
1601 	mcp->mb[9] = vha->vp_idx;
1602 	mcp->out_mb = MBX_9|MBX_1|MBX_0;
1603 	if (HAS_EXTENDED_IDS(vha->hw)) {
1604 		mcp->mb[1] = loop_id;
1605 		mcp->mb[10] = opt;
1606 		mcp->out_mb |= MBX_10;
1607 	} else {
1608 		mcp->mb[1] = loop_id << 8 | opt;
1609 	}
1610 
1611 	mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1612 	mcp->tov = MBX_TOV_SECONDS;
1613 	mcp->flags = 0;
1614 	rval = qla2x00_mailbox_command(vha, mcp);
1615 
1616 	if (rval != QLA_SUCCESS) {
1617 		/*EMPTY*/
1618 		ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1619 	} else {
1620 		if (name != NULL) {
1621 			/* This function returns name in big endian. */
1622 			name[0] = MSB(mcp->mb[2]);
1623 			name[1] = LSB(mcp->mb[2]);
1624 			name[2] = MSB(mcp->mb[3]);
1625 			name[3] = LSB(mcp->mb[3]);
1626 			name[4] = MSB(mcp->mb[6]);
1627 			name[5] = LSB(mcp->mb[6]);
1628 			name[6] = MSB(mcp->mb[7]);
1629 			name[7] = LSB(mcp->mb[7]);
1630 		}
1631 
1632 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1633 		    "Done %s.\n", __func__);
1634 	}
1635 
1636 	return rval;
1637 }
1638 
1639 /*
1640  * qla24xx_link_initialization
1641  *	Issue link initialization mailbox command.
1642  *
1643  * Input:
1644  *	ha = adapter block pointer.
1645  *	TARGET_QUEUE_LOCK must be released.
1646  *	ADAPTER_STATE_LOCK must be released.
1647  *
1648  * Returns:
1649  *	qla2x00 local function return status code.
1650  *
1651  * Context:
1652  *	Kernel context.
1653  */
1654 int
1655 qla24xx_link_initialize(scsi_qla_host_t *vha)
1656 {
1657 	int rval;
1658 	mbx_cmd_t mc;
1659 	mbx_cmd_t *mcp = &mc;
1660 
1661 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
1662 	    "Entered %s.\n", __func__);
1663 
1664 	if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
1665 		return QLA_FUNCTION_FAILED;
1666 
1667 	mcp->mb[0] = MBC_LINK_INITIALIZATION;
1668 	mcp->mb[1] = BIT_4;
1669 	if (vha->hw->operating_mode == LOOP)
1670 		mcp->mb[1] |= BIT_6;
1671 	else
1672 		mcp->mb[1] |= BIT_5;
1673 	mcp->mb[2] = 0;
1674 	mcp->mb[3] = 0;
1675 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1676 	mcp->in_mb = MBX_0;
1677 	mcp->tov = MBX_TOV_SECONDS;
1678 	mcp->flags = 0;
1679 	rval = qla2x00_mailbox_command(vha, mcp);
1680 
1681 	if (rval != QLA_SUCCESS) {
1682 		ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
1683 	} else {
1684 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
1685 		    "Done %s.\n", __func__);
1686 	}
1687 
1688 	return rval;
1689 }
1690 
1691 /*
1692  * qla2x00_lip_reset
1693  *	Issue LIP reset mailbox command.
1694  *
1695  * Input:
1696  *	ha = adapter block pointer.
1697  *	TARGET_QUEUE_LOCK must be released.
1698  *	ADAPTER_STATE_LOCK must be released.
1699  *
1700  * Returns:
1701  *	qla2x00 local function return status code.
1702  *
1703  * Context:
1704  *	Kernel context.
1705  */
1706 int
1707 qla2x00_lip_reset(scsi_qla_host_t *vha)
1708 {
1709 	int rval;
1710 	mbx_cmd_t mc;
1711 	mbx_cmd_t *mcp = &mc;
1712 
1713 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
1714 	    "Entered %s.\n", __func__);
1715 
1716 	if (IS_CNA_CAPABLE(vha->hw)) {
1717 		/* Logout across all FCFs. */
1718 		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1719 		mcp->mb[1] = BIT_1;
1720 		mcp->mb[2] = 0;
1721 		mcp->out_mb = MBX_2|MBX_1|MBX_0;
1722 	} else if (IS_FWI2_CAPABLE(vha->hw)) {
1723 		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1724 		mcp->mb[1] = BIT_6;
1725 		mcp->mb[2] = 0;
1726 		mcp->mb[3] = vha->hw->loop_reset_delay;
1727 		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1728 	} else {
1729 		mcp->mb[0] = MBC_LIP_RESET;
1730 		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1731 		if (HAS_EXTENDED_IDS(vha->hw)) {
1732 			mcp->mb[1] = 0x00ff;
1733 			mcp->mb[10] = 0;
1734 			mcp->out_mb |= MBX_10;
1735 		} else {
1736 			mcp->mb[1] = 0xff00;
1737 		}
1738 		mcp->mb[2] = vha->hw->loop_reset_delay;
1739 		mcp->mb[3] = 0;
1740 	}
1741 	mcp->in_mb = MBX_0;
1742 	mcp->tov = MBX_TOV_SECONDS;
1743 	mcp->flags = 0;
1744 	rval = qla2x00_mailbox_command(vha, mcp);
1745 
1746 	if (rval != QLA_SUCCESS) {
1747 		/*EMPTY*/
1748 		ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
1749 	} else {
1750 		/*EMPTY*/
1751 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
1752 		    "Done %s.\n", __func__);
1753 	}
1754 
1755 	return rval;
1756 }
1757 
1758 /*
1759  * qla2x00_send_sns
1760  *	Send SNS command.
1761  *
1762  * Input:
1763  *	ha = adapter block pointer.
1764  *	sns = pointer for command.
1765  *	cmd_size = command size.
1766  *	buf_size = response/command size.
1767  *	TARGET_QUEUE_LOCK must be released.
1768  *	ADAPTER_STATE_LOCK must be released.
1769  *
1770  * Returns:
1771  *	qla2x00 local function return status code.
1772  *
1773  * Context:
1774  *	Kernel context.
1775  */
1776 int
1777 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
1778     uint16_t cmd_size, size_t buf_size)
1779 {
1780 	int rval;
1781 	mbx_cmd_t mc;
1782 	mbx_cmd_t *mcp = &mc;
1783 
1784 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
1785 	    "Entered %s.\n", __func__);
1786 
1787 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
1788 	    "Retry cnt=%d ratov=%d total tov=%d.\n",
1789 	    vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
1790 
1791 	mcp->mb[0] = MBC_SEND_SNS_COMMAND;
1792 	mcp->mb[1] = cmd_size;
1793 	mcp->mb[2] = MSW(sns_phys_address);
1794 	mcp->mb[3] = LSW(sns_phys_address);
1795 	mcp->mb[6] = MSW(MSD(sns_phys_address));
1796 	mcp->mb[7] = LSW(MSD(sns_phys_address));
1797 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1798 	mcp->in_mb = MBX_0|MBX_1;
1799 	mcp->buf_size = buf_size;
1800 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
1801 	mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
1802 	rval = qla2x00_mailbox_command(vha, mcp);
1803 
1804 	if (rval != QLA_SUCCESS) {
1805 		/*EMPTY*/
1806 		ql_dbg(ql_dbg_mbx, vha, 0x105f,
1807 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
1808 		    rval, mcp->mb[0], mcp->mb[1]);
1809 	} else {
1810 		/*EMPTY*/
1811 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
1812 		    "Done %s.\n", __func__);
1813 	}
1814 
1815 	return rval;
1816 }
1817 
1818 int
1819 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1820     uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1821 {
1822 	int		rval;
1823 
1824 	struct logio_entry_24xx *lg;
1825 	dma_addr_t	lg_dma;
1826 	uint32_t	iop[2];
1827 	struct qla_hw_data *ha = vha->hw;
1828 	struct req_que *req;
1829 	struct rsp_que *rsp;
1830 
1831 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
1832 	    "Entered %s.\n", __func__);
1833 
1834 	if (ha->flags.cpu_affinity_enabled)
1835 		req = ha->req_q_map[0];
1836 	else
1837 		req = vha->req;
1838 	rsp = req->rsp;
1839 
1840 	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
1841 	if (lg == NULL) {
1842 		ql_log(ql_log_warn, vha, 0x1062,
1843 		    "Failed to allocate login IOCB.\n");
1844 		return QLA_MEMORY_ALLOC_FAILED;
1845 	}
1846 	memset(lg, 0, sizeof(struct logio_entry_24xx));
1847 
1848 	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
1849 	lg->entry_count = 1;
1850 	lg->handle = MAKE_HANDLE(req->id, lg->handle);
1851 	lg->nport_handle = cpu_to_le16(loop_id);
1852 	lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
1853 	if (opt & BIT_0)
1854 		lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
1855 	if (opt & BIT_1)
1856 		lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
1857 	lg->port_id[0] = al_pa;
1858 	lg->port_id[1] = area;
1859 	lg->port_id[2] = domain;
1860 	lg->vp_index = vha->vp_idx;
1861 	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
1862 	    (ha->r_a_tov / 10 * 2) + 2);
1863 	if (rval != QLA_SUCCESS) {
1864 		ql_dbg(ql_dbg_mbx, vha, 0x1063,
1865 		    "Failed to issue login IOCB (%x).\n", rval);
1866 	} else if (lg->entry_status != 0) {
1867 		ql_dbg(ql_dbg_mbx, vha, 0x1064,
1868 		    "Failed to complete IOCB -- error status (%x).\n",
1869 		    lg->entry_status);
1870 		rval = QLA_FUNCTION_FAILED;
1871 	} else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
1872 		iop[0] = le32_to_cpu(lg->io_parameter[0]);
1873 		iop[1] = le32_to_cpu(lg->io_parameter[1]);
1874 
1875 		ql_dbg(ql_dbg_mbx, vha, 0x1065,
1876 		    "Failed to complete IOCB -- completion  status (%x) "
1877 		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
1878 		    iop[0], iop[1]);
1879 
1880 		switch (iop[0]) {
1881 		case LSC_SCODE_PORTID_USED:
1882 			mb[0] = MBS_PORT_ID_USED;
1883 			mb[1] = LSW(iop[1]);
1884 			break;
1885 		case LSC_SCODE_NPORT_USED:
1886 			mb[0] = MBS_LOOP_ID_USED;
1887 			break;
1888 		case LSC_SCODE_NOLINK:
1889 		case LSC_SCODE_NOIOCB:
1890 		case LSC_SCODE_NOXCB:
1891 		case LSC_SCODE_CMD_FAILED:
1892 		case LSC_SCODE_NOFABRIC:
1893 		case LSC_SCODE_FW_NOT_READY:
1894 		case LSC_SCODE_NOT_LOGGED_IN:
1895 		case LSC_SCODE_NOPCB:
1896 		case LSC_SCODE_ELS_REJECT:
1897 		case LSC_SCODE_CMD_PARAM_ERR:
1898 		case LSC_SCODE_NONPORT:
1899 		case LSC_SCODE_LOGGED_IN:
1900 		case LSC_SCODE_NOFLOGI_ACC:
1901 		default:
1902 			mb[0] = MBS_COMMAND_ERROR;
1903 			break;
1904 		}
1905 	} else {
1906 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
1907 		    "Done %s.\n", __func__);
1908 
1909 		iop[0] = le32_to_cpu(lg->io_parameter[0]);
1910 
1911 		mb[0] = MBS_COMMAND_COMPLETE;
1912 		mb[1] = 0;
1913 		if (iop[0] & BIT_4) {
1914 			if (iop[0] & BIT_8)
1915 				mb[1] |= BIT_1;
1916 		} else
1917 			mb[1] = BIT_0;
1918 
1919 		/* Passback COS information. */
1920 		mb[10] = 0;
1921 		if (lg->io_parameter[7] || lg->io_parameter[8])
1922 			mb[10] |= BIT_0;	/* Class 2. */
1923 		if (lg->io_parameter[9] || lg->io_parameter[10])
1924 			mb[10] |= BIT_1;	/* Class 3. */
1925 		if (lg->io_parameter[0] & __constant_cpu_to_le32(BIT_7))
1926 			mb[10] |= BIT_7;	/* Confirmed Completion
1927 						 * Allowed
1928 						 */
1929 	}
1930 
1931 	dma_pool_free(ha->s_dma_pool, lg, lg_dma);
1932 
1933 	return rval;
1934 }
1935 
1936 /*
1937  * qla2x00_login_fabric
1938  *	Issue login fabric port mailbox command.
1939  *
1940  * Input:
1941  *	ha = adapter block pointer.
1942  *	loop_id = device loop ID.
1943  *	domain = device domain.
1944  *	area = device area.
1945  *	al_pa = device AL_PA.
1946  *	status = pointer for return status.
1947  *	opt = command options.
1948  *	TARGET_QUEUE_LOCK must be released.
1949  *	ADAPTER_STATE_LOCK must be released.
1950  *
1951  * Returns:
1952  *	qla2x00 local function return status code.
1953  *
1954  * Context:
1955  *	Kernel context.
1956  */
1957 int
1958 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1959     uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1960 {
1961 	int rval;
1962 	mbx_cmd_t mc;
1963 	mbx_cmd_t *mcp = &mc;
1964 	struct qla_hw_data *ha = vha->hw;
1965 
1966 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
1967 	    "Entered %s.\n", __func__);
1968 
1969 	mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
1970 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1971 	if (HAS_EXTENDED_IDS(ha)) {
1972 		mcp->mb[1] = loop_id;
1973 		mcp->mb[10] = opt;
1974 		mcp->out_mb |= MBX_10;
1975 	} else {
1976 		mcp->mb[1] = (loop_id << 8) | opt;
1977 	}
1978 	mcp->mb[2] = domain;
1979 	mcp->mb[3] = area << 8 | al_pa;
1980 
1981 	mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
1982 	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1983 	mcp->flags = 0;
1984 	rval = qla2x00_mailbox_command(vha, mcp);
1985 
1986 	/* Return mailbox statuses. */
1987 	if (mb != NULL) {
1988 		mb[0] = mcp->mb[0];
1989 		mb[1] = mcp->mb[1];
1990 		mb[2] = mcp->mb[2];
1991 		mb[6] = mcp->mb[6];
1992 		mb[7] = mcp->mb[7];
1993 		/* COS retrieved from Get-Port-Database mailbox command. */
1994 		mb[10] = 0;
1995 	}
1996 
1997 	if (rval != QLA_SUCCESS) {
1998 		/* RLU tmp code: need to change main mailbox_command function to
1999 		 * return ok even when the mailbox completion value is not
2000 		 * SUCCESS. The caller needs to be responsible to interpret
2001 		 * the return values of this mailbox command if we're not
2002 		 * to change too much of the existing code.
2003 		 */
2004 		if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2005 		    mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2006 		    mcp->mb[0] == 0x4006)
2007 			rval = QLA_SUCCESS;
2008 
2009 		/*EMPTY*/
2010 		ql_dbg(ql_dbg_mbx, vha, 0x1068,
2011 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2012 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2013 	} else {
2014 		/*EMPTY*/
2015 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2016 		    "Done %s.\n", __func__);
2017 	}
2018 
2019 	return rval;
2020 }
2021 
2022 /*
2023  * qla2x00_login_local_device
2024  *           Issue login loop port mailbox command.
2025  *
2026  * Input:
2027  *           ha = adapter block pointer.
2028  *           loop_id = device loop ID.
2029  *           opt = command options.
2030  *
2031  * Returns:
2032  *            Return status code.
2033  *
2034  * Context:
2035  *            Kernel context.
2036  *
2037  */
2038 int
2039 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2040     uint16_t *mb_ret, uint8_t opt)
2041 {
2042 	int rval;
2043 	mbx_cmd_t mc;
2044 	mbx_cmd_t *mcp = &mc;
2045 	struct qla_hw_data *ha = vha->hw;
2046 
2047 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2048 	    "Entered %s.\n", __func__);
2049 
2050 	if (IS_FWI2_CAPABLE(ha))
2051 		return qla24xx_login_fabric(vha, fcport->loop_id,
2052 		    fcport->d_id.b.domain, fcport->d_id.b.area,
2053 		    fcport->d_id.b.al_pa, mb_ret, opt);
2054 
2055 	mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2056 	if (HAS_EXTENDED_IDS(ha))
2057 		mcp->mb[1] = fcport->loop_id;
2058 	else
2059 		mcp->mb[1] = fcport->loop_id << 8;
2060 	mcp->mb[2] = opt;
2061 	mcp->out_mb = MBX_2|MBX_1|MBX_0;
2062  	mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2063 	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2064 	mcp->flags = 0;
2065 	rval = qla2x00_mailbox_command(vha, mcp);
2066 
2067  	/* Return mailbox statuses. */
2068  	if (mb_ret != NULL) {
2069  		mb_ret[0] = mcp->mb[0];
2070  		mb_ret[1] = mcp->mb[1];
2071  		mb_ret[6] = mcp->mb[6];
2072  		mb_ret[7] = mcp->mb[7];
2073  	}
2074 
2075 	if (rval != QLA_SUCCESS) {
2076  		/* AV tmp code: need to change main mailbox_command function to
2077  		 * return ok even when the mailbox completion value is not
2078  		 * SUCCESS. The caller needs to be responsible to interpret
2079  		 * the return values of this mailbox command if we're not
2080  		 * to change too much of the existing code.
2081  		 */
2082  		if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2083  			rval = QLA_SUCCESS;
2084 
2085 		ql_dbg(ql_dbg_mbx, vha, 0x106b,
2086 		    "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2087 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2088 	} else {
2089 		/*EMPTY*/
2090 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2091 		    "Done %s.\n", __func__);
2092 	}
2093 
2094 	return (rval);
2095 }
2096 
2097 int
2098 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2099     uint8_t area, uint8_t al_pa)
2100 {
2101 	int		rval;
2102 	struct logio_entry_24xx *lg;
2103 	dma_addr_t	lg_dma;
2104 	struct qla_hw_data *ha = vha->hw;
2105 	struct req_que *req;
2106 	struct rsp_que *rsp;
2107 
2108 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2109 	    "Entered %s.\n", __func__);
2110 
2111 	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2112 	if (lg == NULL) {
2113 		ql_log(ql_log_warn, vha, 0x106e,
2114 		    "Failed to allocate logout IOCB.\n");
2115 		return QLA_MEMORY_ALLOC_FAILED;
2116 	}
2117 	memset(lg, 0, sizeof(struct logio_entry_24xx));
2118 
2119 	if (ql2xmaxqueues > 1)
2120 		req = ha->req_q_map[0];
2121 	else
2122 		req = vha->req;
2123 	rsp = req->rsp;
2124 	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2125 	lg->entry_count = 1;
2126 	lg->handle = MAKE_HANDLE(req->id, lg->handle);
2127 	lg->nport_handle = cpu_to_le16(loop_id);
2128 	lg->control_flags =
2129 	    __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2130 		LCF_FREE_NPORT);
2131 	lg->port_id[0] = al_pa;
2132 	lg->port_id[1] = area;
2133 	lg->port_id[2] = domain;
2134 	lg->vp_index = vha->vp_idx;
2135 	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2136 	    (ha->r_a_tov / 10 * 2) + 2);
2137 	if (rval != QLA_SUCCESS) {
2138 		ql_dbg(ql_dbg_mbx, vha, 0x106f,
2139 		    "Failed to issue logout IOCB (%x).\n", rval);
2140 	} else if (lg->entry_status != 0) {
2141 		ql_dbg(ql_dbg_mbx, vha, 0x1070,
2142 		    "Failed to complete IOCB -- error status (%x).\n",
2143 		    lg->entry_status);
2144 		rval = QLA_FUNCTION_FAILED;
2145 	} else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
2146 		ql_dbg(ql_dbg_mbx, vha, 0x1071,
2147 		    "Failed to complete IOCB -- completion status (%x) "
2148 		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2149 		    le32_to_cpu(lg->io_parameter[0]),
2150 		    le32_to_cpu(lg->io_parameter[1]));
2151 	} else {
2152 		/*EMPTY*/
2153 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2154 		    "Done %s.\n", __func__);
2155 	}
2156 
2157 	dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2158 
2159 	return rval;
2160 }
2161 
2162 /*
2163  * qla2x00_fabric_logout
2164  *	Issue logout fabric port mailbox command.
2165  *
2166  * Input:
2167  *	ha = adapter block pointer.
2168  *	loop_id = device loop ID.
2169  *	TARGET_QUEUE_LOCK must be released.
2170  *	ADAPTER_STATE_LOCK must be released.
2171  *
2172  * Returns:
2173  *	qla2x00 local function return status code.
2174  *
2175  * Context:
2176  *	Kernel context.
2177  */
2178 int
2179 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2180     uint8_t area, uint8_t al_pa)
2181 {
2182 	int rval;
2183 	mbx_cmd_t mc;
2184 	mbx_cmd_t *mcp = &mc;
2185 
2186 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2187 	    "Entered %s.\n", __func__);
2188 
2189 	mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2190 	mcp->out_mb = MBX_1|MBX_0;
2191 	if (HAS_EXTENDED_IDS(vha->hw)) {
2192 		mcp->mb[1] = loop_id;
2193 		mcp->mb[10] = 0;
2194 		mcp->out_mb |= MBX_10;
2195 	} else {
2196 		mcp->mb[1] = loop_id << 8;
2197 	}
2198 
2199 	mcp->in_mb = MBX_1|MBX_0;
2200 	mcp->tov = MBX_TOV_SECONDS;
2201 	mcp->flags = 0;
2202 	rval = qla2x00_mailbox_command(vha, mcp);
2203 
2204 	if (rval != QLA_SUCCESS) {
2205 		/*EMPTY*/
2206 		ql_dbg(ql_dbg_mbx, vha, 0x1074,
2207 		    "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2208 	} else {
2209 		/*EMPTY*/
2210 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2211 		    "Done %s.\n", __func__);
2212 	}
2213 
2214 	return rval;
2215 }
2216 
2217 /*
2218  * qla2x00_full_login_lip
2219  *	Issue full login LIP mailbox command.
2220  *
2221  * Input:
2222  *	ha = adapter block pointer.
2223  *	TARGET_QUEUE_LOCK must be released.
2224  *	ADAPTER_STATE_LOCK must be released.
2225  *
2226  * Returns:
2227  *	qla2x00 local function return status code.
2228  *
2229  * Context:
2230  *	Kernel context.
2231  */
2232 int
2233 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2234 {
2235 	int rval;
2236 	mbx_cmd_t mc;
2237 	mbx_cmd_t *mcp = &mc;
2238 
2239 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2240 	    "Entered %s.\n", __func__);
2241 
2242 	mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2243 	mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2244 	mcp->mb[2] = 0;
2245 	mcp->mb[3] = 0;
2246 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2247 	mcp->in_mb = MBX_0;
2248 	mcp->tov = MBX_TOV_SECONDS;
2249 	mcp->flags = 0;
2250 	rval = qla2x00_mailbox_command(vha, mcp);
2251 
2252 	if (rval != QLA_SUCCESS) {
2253 		/*EMPTY*/
2254 		ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2255 	} else {
2256 		/*EMPTY*/
2257 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2258 		    "Done %s.\n", __func__);
2259 	}
2260 
2261 	return rval;
2262 }
2263 
2264 /*
2265  * qla2x00_get_id_list
2266  *
2267  * Input:
2268  *	ha = adapter block pointer.
2269  *
2270  * Returns:
2271  *	qla2x00 local function return status code.
2272  *
2273  * Context:
2274  *	Kernel context.
2275  */
2276 int
2277 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2278     uint16_t *entries)
2279 {
2280 	int rval;
2281 	mbx_cmd_t mc;
2282 	mbx_cmd_t *mcp = &mc;
2283 
2284 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2285 	    "Entered %s.\n", __func__);
2286 
2287 	if (id_list == NULL)
2288 		return QLA_FUNCTION_FAILED;
2289 
2290 	mcp->mb[0] = MBC_GET_ID_LIST;
2291 	mcp->out_mb = MBX_0;
2292 	if (IS_FWI2_CAPABLE(vha->hw)) {
2293 		mcp->mb[2] = MSW(id_list_dma);
2294 		mcp->mb[3] = LSW(id_list_dma);
2295 		mcp->mb[6] = MSW(MSD(id_list_dma));
2296 		mcp->mb[7] = LSW(MSD(id_list_dma));
2297 		mcp->mb[8] = 0;
2298 		mcp->mb[9] = vha->vp_idx;
2299 		mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2300 	} else {
2301 		mcp->mb[1] = MSW(id_list_dma);
2302 		mcp->mb[2] = LSW(id_list_dma);
2303 		mcp->mb[3] = MSW(MSD(id_list_dma));
2304 		mcp->mb[6] = LSW(MSD(id_list_dma));
2305 		mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2306 	}
2307 	mcp->in_mb = MBX_1|MBX_0;
2308 	mcp->tov = MBX_TOV_SECONDS;
2309 	mcp->flags = 0;
2310 	rval = qla2x00_mailbox_command(vha, mcp);
2311 
2312 	if (rval != QLA_SUCCESS) {
2313 		/*EMPTY*/
2314 		ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2315 	} else {
2316 		*entries = mcp->mb[1];
2317 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2318 		    "Done %s.\n", __func__);
2319 	}
2320 
2321 	return rval;
2322 }
2323 
2324 /*
2325  * qla2x00_get_resource_cnts
2326  *	Get current firmware resource counts.
2327  *
2328  * Input:
2329  *	ha = adapter block pointer.
2330  *
2331  * Returns:
2332  *	qla2x00 local function return status code.
2333  *
2334  * Context:
2335  *	Kernel context.
2336  */
2337 int
2338 qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
2339     uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
2340     uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
2341 {
2342 	int rval;
2343 	mbx_cmd_t mc;
2344 	mbx_cmd_t *mcp = &mc;
2345 
2346 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2347 	    "Entered %s.\n", __func__);
2348 
2349 	mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2350 	mcp->out_mb = MBX_0;
2351 	mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2352 	if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
2353 		mcp->in_mb |= MBX_12;
2354 	mcp->tov = MBX_TOV_SECONDS;
2355 	mcp->flags = 0;
2356 	rval = qla2x00_mailbox_command(vha, mcp);
2357 
2358 	if (rval != QLA_SUCCESS) {
2359 		/*EMPTY*/
2360 		ql_dbg(ql_dbg_mbx, vha, 0x107d,
2361 		    "Failed mb[0]=%x.\n", mcp->mb[0]);
2362 	} else {
2363 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2364 		    "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2365 		    "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2366 		    mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2367 		    mcp->mb[11], mcp->mb[12]);
2368 
2369 		if (cur_xchg_cnt)
2370 			*cur_xchg_cnt = mcp->mb[3];
2371 		if (orig_xchg_cnt)
2372 			*orig_xchg_cnt = mcp->mb[6];
2373 		if (cur_iocb_cnt)
2374 			*cur_iocb_cnt = mcp->mb[7];
2375 		if (orig_iocb_cnt)
2376 			*orig_iocb_cnt = mcp->mb[10];
2377 		if (vha->hw->flags.npiv_supported && max_npiv_vports)
2378 			*max_npiv_vports = mcp->mb[11];
2379 		if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
2380 			*max_fcfs = mcp->mb[12];
2381 	}
2382 
2383 	return (rval);
2384 }
2385 
2386 /*
2387  * qla2x00_get_fcal_position_map
2388  *	Get FCAL (LILP) position map using mailbox command
2389  *
2390  * Input:
2391  *	ha = adapter state pointer.
2392  *	pos_map = buffer pointer (can be NULL).
2393  *
2394  * Returns:
2395  *	qla2x00 local function return status code.
2396  *
2397  * Context:
2398  *	Kernel context.
2399  */
2400 int
2401 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2402 {
2403 	int rval;
2404 	mbx_cmd_t mc;
2405 	mbx_cmd_t *mcp = &mc;
2406 	char *pmap;
2407 	dma_addr_t pmap_dma;
2408 	struct qla_hw_data *ha = vha->hw;
2409 
2410 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2411 	    "Entered %s.\n", __func__);
2412 
2413 	pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2414 	if (pmap  == NULL) {
2415 		ql_log(ql_log_warn, vha, 0x1080,
2416 		    "Memory alloc failed.\n");
2417 		return QLA_MEMORY_ALLOC_FAILED;
2418 	}
2419 	memset(pmap, 0, FCAL_MAP_SIZE);
2420 
2421 	mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2422 	mcp->mb[2] = MSW(pmap_dma);
2423 	mcp->mb[3] = LSW(pmap_dma);
2424 	mcp->mb[6] = MSW(MSD(pmap_dma));
2425 	mcp->mb[7] = LSW(MSD(pmap_dma));
2426 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2427 	mcp->in_mb = MBX_1|MBX_0;
2428 	mcp->buf_size = FCAL_MAP_SIZE;
2429 	mcp->flags = MBX_DMA_IN;
2430 	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2431 	rval = qla2x00_mailbox_command(vha, mcp);
2432 
2433 	if (rval == QLA_SUCCESS) {
2434 		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2435 		    "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2436 		    mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2437 		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2438 		    pmap, pmap[0] + 1);
2439 
2440 		if (pos_map)
2441 			memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2442 	}
2443 	dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2444 
2445 	if (rval != QLA_SUCCESS) {
2446 		ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2447 	} else {
2448 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2449 		    "Done %s.\n", __func__);
2450 	}
2451 
2452 	return rval;
2453 }
2454 
2455 /*
2456  * qla2x00_get_link_status
2457  *
2458  * Input:
2459  *	ha = adapter block pointer.
2460  *	loop_id = device loop ID.
2461  *	ret_buf = pointer to link status return buffer.
2462  *
2463  * Returns:
2464  *	0 = success.
2465  *	BIT_0 = mem alloc error.
2466  *	BIT_1 = mailbox error.
2467  */
2468 int
2469 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2470     struct link_statistics *stats, dma_addr_t stats_dma)
2471 {
2472 	int rval;
2473 	mbx_cmd_t mc;
2474 	mbx_cmd_t *mcp = &mc;
2475 	uint32_t *siter, *diter, dwords;
2476 	struct qla_hw_data *ha = vha->hw;
2477 
2478 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2479 	    "Entered %s.\n", __func__);
2480 
2481 	mcp->mb[0] = MBC_GET_LINK_STATUS;
2482 	mcp->mb[2] = MSW(stats_dma);
2483 	mcp->mb[3] = LSW(stats_dma);
2484 	mcp->mb[6] = MSW(MSD(stats_dma));
2485 	mcp->mb[7] = LSW(MSD(stats_dma));
2486 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2487 	mcp->in_mb = MBX_0;
2488 	if (IS_FWI2_CAPABLE(ha)) {
2489 		mcp->mb[1] = loop_id;
2490 		mcp->mb[4] = 0;
2491 		mcp->mb[10] = 0;
2492 		mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2493 		mcp->in_mb |= MBX_1;
2494 	} else if (HAS_EXTENDED_IDS(ha)) {
2495 		mcp->mb[1] = loop_id;
2496 		mcp->mb[10] = 0;
2497 		mcp->out_mb |= MBX_10|MBX_1;
2498 	} else {
2499 		mcp->mb[1] = loop_id << 8;
2500 		mcp->out_mb |= MBX_1;
2501 	}
2502 	mcp->tov = MBX_TOV_SECONDS;
2503 	mcp->flags = IOCTL_CMD;
2504 	rval = qla2x00_mailbox_command(vha, mcp);
2505 
2506 	if (rval == QLA_SUCCESS) {
2507 		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2508 			ql_dbg(ql_dbg_mbx, vha, 0x1085,
2509 			    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2510 			rval = QLA_FUNCTION_FAILED;
2511 		} else {
2512 			/* Copy over data -- firmware data is LE. */
2513 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2514 			    "Done %s.\n", __func__);
2515 			dwords = offsetof(struct link_statistics, unused1) / 4;
2516 			siter = diter = &stats->link_fail_cnt;
2517 			while (dwords--)
2518 				*diter++ = le32_to_cpu(*siter++);
2519 		}
2520 	} else {
2521 		/* Failed. */
2522 		ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2523 	}
2524 
2525 	return rval;
2526 }
2527 
2528 int
2529 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2530     dma_addr_t stats_dma)
2531 {
2532 	int rval;
2533 	mbx_cmd_t mc;
2534 	mbx_cmd_t *mcp = &mc;
2535 	uint32_t *siter, *diter, dwords;
2536 
2537 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2538 	    "Entered %s.\n", __func__);
2539 
2540 	mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2541 	mcp->mb[2] = MSW(stats_dma);
2542 	mcp->mb[3] = LSW(stats_dma);
2543 	mcp->mb[6] = MSW(MSD(stats_dma));
2544 	mcp->mb[7] = LSW(MSD(stats_dma));
2545 	mcp->mb[8] = sizeof(struct link_statistics) / 4;
2546 	mcp->mb[9] = vha->vp_idx;
2547 	mcp->mb[10] = 0;
2548 	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2549 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
2550 	mcp->tov = MBX_TOV_SECONDS;
2551 	mcp->flags = IOCTL_CMD;
2552 	rval = qla2x00_mailbox_command(vha, mcp);
2553 
2554 	if (rval == QLA_SUCCESS) {
2555 		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2556 			ql_dbg(ql_dbg_mbx, vha, 0x1089,
2557 			    "Failed mb[0]=%x.\n", mcp->mb[0]);
2558 			rval = QLA_FUNCTION_FAILED;
2559 		} else {
2560 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2561 			    "Done %s.\n", __func__);
2562 			/* Copy over data -- firmware data is LE. */
2563 			dwords = sizeof(struct link_statistics) / 4;
2564 			siter = diter = &stats->link_fail_cnt;
2565 			while (dwords--)
2566 				*diter++ = le32_to_cpu(*siter++);
2567 		}
2568 	} else {
2569 		/* Failed. */
2570 		ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2571 	}
2572 
2573 	return rval;
2574 }
2575 
2576 int
2577 qla24xx_abort_command(srb_t *sp)
2578 {
2579 	int		rval;
2580 	unsigned long   flags = 0;
2581 
2582 	struct abort_entry_24xx *abt;
2583 	dma_addr_t	abt_dma;
2584 	uint32_t	handle;
2585 	fc_port_t	*fcport = sp->fcport;
2586 	struct scsi_qla_host *vha = fcport->vha;
2587 	struct qla_hw_data *ha = vha->hw;
2588 	struct req_que *req = vha->req;
2589 
2590 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2591 	    "Entered %s.\n", __func__);
2592 
2593 	spin_lock_irqsave(&ha->hardware_lock, flags);
2594 	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2595 		if (req->outstanding_cmds[handle] == sp)
2596 			break;
2597 	}
2598 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2599 	if (handle == req->num_outstanding_cmds) {
2600 		/* Command not found. */
2601 		return QLA_FUNCTION_FAILED;
2602 	}
2603 
2604 	abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2605 	if (abt == NULL) {
2606 		ql_log(ql_log_warn, vha, 0x108d,
2607 		    "Failed to allocate abort IOCB.\n");
2608 		return QLA_MEMORY_ALLOC_FAILED;
2609 	}
2610 	memset(abt, 0, sizeof(struct abort_entry_24xx));
2611 
2612 	abt->entry_type = ABORT_IOCB_TYPE;
2613 	abt->entry_count = 1;
2614 	abt->handle = MAKE_HANDLE(req->id, abt->handle);
2615 	abt->nport_handle = cpu_to_le16(fcport->loop_id);
2616 	abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2617 	abt->port_id[0] = fcport->d_id.b.al_pa;
2618 	abt->port_id[1] = fcport->d_id.b.area;
2619 	abt->port_id[2] = fcport->d_id.b.domain;
2620 	abt->vp_index = fcport->vha->vp_idx;
2621 
2622 	abt->req_que_no = cpu_to_le16(req->id);
2623 
2624 	rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2625 	if (rval != QLA_SUCCESS) {
2626 		ql_dbg(ql_dbg_mbx, vha, 0x108e,
2627 		    "Failed to issue IOCB (%x).\n", rval);
2628 	} else if (abt->entry_status != 0) {
2629 		ql_dbg(ql_dbg_mbx, vha, 0x108f,
2630 		    "Failed to complete IOCB -- error status (%x).\n",
2631 		    abt->entry_status);
2632 		rval = QLA_FUNCTION_FAILED;
2633 	} else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
2634 		ql_dbg(ql_dbg_mbx, vha, 0x1090,
2635 		    "Failed to complete IOCB -- completion status (%x).\n",
2636 		    le16_to_cpu(abt->nport_handle));
2637 		rval = QLA_FUNCTION_FAILED;
2638 	} else {
2639 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2640 		    "Done %s.\n", __func__);
2641 	}
2642 
2643 	dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2644 
2645 	return rval;
2646 }
2647 
2648 struct tsk_mgmt_cmd {
2649 	union {
2650 		struct tsk_mgmt_entry tsk;
2651 		struct sts_entry_24xx sts;
2652 	} p;
2653 };
2654 
2655 static int
2656 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2657     unsigned int l, int tag)
2658 {
2659 	int		rval, rval2;
2660 	struct tsk_mgmt_cmd *tsk;
2661 	struct sts_entry_24xx *sts;
2662 	dma_addr_t	tsk_dma;
2663 	scsi_qla_host_t *vha;
2664 	struct qla_hw_data *ha;
2665 	struct req_que *req;
2666 	struct rsp_que *rsp;
2667 
2668 	vha = fcport->vha;
2669 	ha = vha->hw;
2670 	req = vha->req;
2671 
2672 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2673 	    "Entered %s.\n", __func__);
2674 
2675 	if (ha->flags.cpu_affinity_enabled)
2676 		rsp = ha->rsp_q_map[tag + 1];
2677 	else
2678 		rsp = req->rsp;
2679 	tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
2680 	if (tsk == NULL) {
2681 		ql_log(ql_log_warn, vha, 0x1093,
2682 		    "Failed to allocate task management IOCB.\n");
2683 		return QLA_MEMORY_ALLOC_FAILED;
2684 	}
2685 	memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
2686 
2687 	tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
2688 	tsk->p.tsk.entry_count = 1;
2689 	tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
2690 	tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
2691 	tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
2692 	tsk->p.tsk.control_flags = cpu_to_le32(type);
2693 	tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
2694 	tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
2695 	tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
2696 	tsk->p.tsk.vp_index = fcport->vha->vp_idx;
2697 	if (type == TCF_LUN_RESET) {
2698 		int_to_scsilun(l, &tsk->p.tsk.lun);
2699 		host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
2700 		    sizeof(tsk->p.tsk.lun));
2701 	}
2702 
2703 	sts = &tsk->p.sts;
2704 	rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
2705 	if (rval != QLA_SUCCESS) {
2706 		ql_dbg(ql_dbg_mbx, vha, 0x1094,
2707 		    "Failed to issue %s reset IOCB (%x).\n", name, rval);
2708 	} else if (sts->entry_status != 0) {
2709 		ql_dbg(ql_dbg_mbx, vha, 0x1095,
2710 		    "Failed to complete IOCB -- error status (%x).\n",
2711 		    sts->entry_status);
2712 		rval = QLA_FUNCTION_FAILED;
2713 	} else if (sts->comp_status !=
2714 	    __constant_cpu_to_le16(CS_COMPLETE)) {
2715 		ql_dbg(ql_dbg_mbx, vha, 0x1096,
2716 		    "Failed to complete IOCB -- completion status (%x).\n",
2717 		    le16_to_cpu(sts->comp_status));
2718 		rval = QLA_FUNCTION_FAILED;
2719 	} else if (le16_to_cpu(sts->scsi_status) &
2720 	    SS_RESPONSE_INFO_LEN_VALID) {
2721 		if (le32_to_cpu(sts->rsp_data_len) < 4) {
2722 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
2723 			    "Ignoring inconsistent data length -- not enough "
2724 			    "response info (%d).\n",
2725 			    le32_to_cpu(sts->rsp_data_len));
2726 		} else if (sts->data[3]) {
2727 			ql_dbg(ql_dbg_mbx, vha, 0x1098,
2728 			    "Failed to complete IOCB -- response (%x).\n",
2729 			    sts->data[3]);
2730 			rval = QLA_FUNCTION_FAILED;
2731 		}
2732 	}
2733 
2734 	/* Issue marker IOCB. */
2735 	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
2736 	    type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
2737 	if (rval2 != QLA_SUCCESS) {
2738 		ql_dbg(ql_dbg_mbx, vha, 0x1099,
2739 		    "Failed to issue marker IOCB (%x).\n", rval2);
2740 	} else {
2741 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
2742 		    "Done %s.\n", __func__);
2743 	}
2744 
2745 	dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
2746 
2747 	return rval;
2748 }
2749 
2750 int
2751 qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
2752 {
2753 	struct qla_hw_data *ha = fcport->vha->hw;
2754 
2755 	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2756 		return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
2757 
2758 	return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
2759 }
2760 
2761 int
2762 qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
2763 {
2764 	struct qla_hw_data *ha = fcport->vha->hw;
2765 
2766 	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2767 		return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
2768 
2769 	return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
2770 }
2771 
2772 int
2773 qla2x00_system_error(scsi_qla_host_t *vha)
2774 {
2775 	int rval;
2776 	mbx_cmd_t mc;
2777 	mbx_cmd_t *mcp = &mc;
2778 	struct qla_hw_data *ha = vha->hw;
2779 
2780 	if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
2781 		return QLA_FUNCTION_FAILED;
2782 
2783 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
2784 	    "Entered %s.\n", __func__);
2785 
2786 	mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
2787 	mcp->out_mb = MBX_0;
2788 	mcp->in_mb = MBX_0;
2789 	mcp->tov = 5;
2790 	mcp->flags = 0;
2791 	rval = qla2x00_mailbox_command(vha, mcp);
2792 
2793 	if (rval != QLA_SUCCESS) {
2794 		ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
2795 	} else {
2796 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
2797 		    "Done %s.\n", __func__);
2798 	}
2799 
2800 	return rval;
2801 }
2802 
2803 int
2804 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
2805 {
2806 	int rval;
2807 	mbx_cmd_t mc;
2808 	mbx_cmd_t *mcp = &mc;
2809 
2810 	if (!IS_QLA2031(vha->hw))
2811 		return QLA_FUNCTION_FAILED;
2812 
2813 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
2814 	    "Entered %s.\n", __func__);
2815 
2816 	mcp->mb[0] = MBC_WRITE_SERDES;
2817 	mcp->mb[1] = addr;
2818 	mcp->mb[2] = data & 0xff;
2819 	mcp->mb[3] = 0;
2820 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2821 	mcp->in_mb = MBX_0;
2822 	mcp->tov = MBX_TOV_SECONDS;
2823 	mcp->flags = 0;
2824 	rval = qla2x00_mailbox_command(vha, mcp);
2825 
2826 	if (rval != QLA_SUCCESS) {
2827 		ql_dbg(ql_dbg_mbx, vha, 0x1183,
2828 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2829 	} else {
2830 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
2831 		    "Done %s.\n", __func__);
2832 	}
2833 
2834 	return rval;
2835 }
2836 
2837 int
2838 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
2839 {
2840 	int rval;
2841 	mbx_cmd_t mc;
2842 	mbx_cmd_t *mcp = &mc;
2843 
2844 	if (!IS_QLA2031(vha->hw))
2845 		return QLA_FUNCTION_FAILED;
2846 
2847 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
2848 	    "Entered %s.\n", __func__);
2849 
2850 	mcp->mb[0] = MBC_READ_SERDES;
2851 	mcp->mb[1] = addr;
2852 	mcp->mb[3] = 0;
2853 	mcp->out_mb = MBX_3|MBX_1|MBX_0;
2854 	mcp->in_mb = MBX_1|MBX_0;
2855 	mcp->tov = MBX_TOV_SECONDS;
2856 	mcp->flags = 0;
2857 	rval = qla2x00_mailbox_command(vha, mcp);
2858 
2859 	*data = mcp->mb[1] & 0xff;
2860 
2861 	if (rval != QLA_SUCCESS) {
2862 		ql_dbg(ql_dbg_mbx, vha, 0x1186,
2863 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2864 	} else {
2865 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
2866 		    "Done %s.\n", __func__);
2867 	}
2868 
2869 	return rval;
2870 }
2871 
2872 /**
2873  * qla2x00_set_serdes_params() -
2874  * @ha: HA context
2875  *
2876  * Returns
2877  */
2878 int
2879 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
2880     uint16_t sw_em_2g, uint16_t sw_em_4g)
2881 {
2882 	int rval;
2883 	mbx_cmd_t mc;
2884 	mbx_cmd_t *mcp = &mc;
2885 
2886 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
2887 	    "Entered %s.\n", __func__);
2888 
2889 	mcp->mb[0] = MBC_SERDES_PARAMS;
2890 	mcp->mb[1] = BIT_0;
2891 	mcp->mb[2] = sw_em_1g | BIT_15;
2892 	mcp->mb[3] = sw_em_2g | BIT_15;
2893 	mcp->mb[4] = sw_em_4g | BIT_15;
2894 	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2895 	mcp->in_mb = MBX_0;
2896 	mcp->tov = MBX_TOV_SECONDS;
2897 	mcp->flags = 0;
2898 	rval = qla2x00_mailbox_command(vha, mcp);
2899 
2900 	if (rval != QLA_SUCCESS) {
2901 		/*EMPTY*/
2902 		ql_dbg(ql_dbg_mbx, vha, 0x109f,
2903 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2904 	} else {
2905 		/*EMPTY*/
2906 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
2907 		    "Done %s.\n", __func__);
2908 	}
2909 
2910 	return rval;
2911 }
2912 
2913 int
2914 qla2x00_stop_firmware(scsi_qla_host_t *vha)
2915 {
2916 	int rval;
2917 	mbx_cmd_t mc;
2918 	mbx_cmd_t *mcp = &mc;
2919 
2920 	if (!IS_FWI2_CAPABLE(vha->hw))
2921 		return QLA_FUNCTION_FAILED;
2922 
2923 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
2924 	    "Entered %s.\n", __func__);
2925 
2926 	mcp->mb[0] = MBC_STOP_FIRMWARE;
2927 	mcp->mb[1] = 0;
2928 	mcp->out_mb = MBX_1|MBX_0;
2929 	mcp->in_mb = MBX_0;
2930 	mcp->tov = 5;
2931 	mcp->flags = 0;
2932 	rval = qla2x00_mailbox_command(vha, mcp);
2933 
2934 	if (rval != QLA_SUCCESS) {
2935 		ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
2936 		if (mcp->mb[0] == MBS_INVALID_COMMAND)
2937 			rval = QLA_INVALID_COMMAND;
2938 	} else {
2939 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
2940 		    "Done %s.\n", __func__);
2941 	}
2942 
2943 	return rval;
2944 }
2945 
2946 int
2947 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
2948     uint16_t buffers)
2949 {
2950 	int rval;
2951 	mbx_cmd_t mc;
2952 	mbx_cmd_t *mcp = &mc;
2953 
2954 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
2955 	    "Entered %s.\n", __func__);
2956 
2957 	if (!IS_FWI2_CAPABLE(vha->hw))
2958 		return QLA_FUNCTION_FAILED;
2959 
2960 	if (unlikely(pci_channel_offline(vha->hw->pdev)))
2961 		return QLA_FUNCTION_FAILED;
2962 
2963 	mcp->mb[0] = MBC_TRACE_CONTROL;
2964 	mcp->mb[1] = TC_EFT_ENABLE;
2965 	mcp->mb[2] = LSW(eft_dma);
2966 	mcp->mb[3] = MSW(eft_dma);
2967 	mcp->mb[4] = LSW(MSD(eft_dma));
2968 	mcp->mb[5] = MSW(MSD(eft_dma));
2969 	mcp->mb[6] = buffers;
2970 	mcp->mb[7] = TC_AEN_DISABLE;
2971 	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2972 	mcp->in_mb = MBX_1|MBX_0;
2973 	mcp->tov = MBX_TOV_SECONDS;
2974 	mcp->flags = 0;
2975 	rval = qla2x00_mailbox_command(vha, mcp);
2976 	if (rval != QLA_SUCCESS) {
2977 		ql_dbg(ql_dbg_mbx, vha, 0x10a5,
2978 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
2979 		    rval, mcp->mb[0], mcp->mb[1]);
2980 	} else {
2981 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
2982 		    "Done %s.\n", __func__);
2983 	}
2984 
2985 	return rval;
2986 }
2987 
2988 int
2989 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
2990 {
2991 	int rval;
2992 	mbx_cmd_t mc;
2993 	mbx_cmd_t *mcp = &mc;
2994 
2995 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
2996 	    "Entered %s.\n", __func__);
2997 
2998 	if (!IS_FWI2_CAPABLE(vha->hw))
2999 		return QLA_FUNCTION_FAILED;
3000 
3001 	if (unlikely(pci_channel_offline(vha->hw->pdev)))
3002 		return QLA_FUNCTION_FAILED;
3003 
3004 	mcp->mb[0] = MBC_TRACE_CONTROL;
3005 	mcp->mb[1] = TC_EFT_DISABLE;
3006 	mcp->out_mb = MBX_1|MBX_0;
3007 	mcp->in_mb = MBX_1|MBX_0;
3008 	mcp->tov = MBX_TOV_SECONDS;
3009 	mcp->flags = 0;
3010 	rval = qla2x00_mailbox_command(vha, mcp);
3011 	if (rval != QLA_SUCCESS) {
3012 		ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3013 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3014 		    rval, mcp->mb[0], mcp->mb[1]);
3015 	} else {
3016 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3017 		    "Done %s.\n", __func__);
3018 	}
3019 
3020 	return rval;
3021 }
3022 
3023 int
3024 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3025     uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3026 {
3027 	int rval;
3028 	mbx_cmd_t mc;
3029 	mbx_cmd_t *mcp = &mc;
3030 
3031 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3032 	    "Entered %s.\n", __func__);
3033 
3034 	if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3035 	    !IS_QLA83XX(vha->hw))
3036 		return QLA_FUNCTION_FAILED;
3037 
3038 	if (unlikely(pci_channel_offline(vha->hw->pdev)))
3039 		return QLA_FUNCTION_FAILED;
3040 
3041 	mcp->mb[0] = MBC_TRACE_CONTROL;
3042 	mcp->mb[1] = TC_FCE_ENABLE;
3043 	mcp->mb[2] = LSW(fce_dma);
3044 	mcp->mb[3] = MSW(fce_dma);
3045 	mcp->mb[4] = LSW(MSD(fce_dma));
3046 	mcp->mb[5] = MSW(MSD(fce_dma));
3047 	mcp->mb[6] = buffers;
3048 	mcp->mb[7] = TC_AEN_DISABLE;
3049 	mcp->mb[8] = 0;
3050 	mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3051 	mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3052 	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3053 	    MBX_1|MBX_0;
3054 	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3055 	mcp->tov = MBX_TOV_SECONDS;
3056 	mcp->flags = 0;
3057 	rval = qla2x00_mailbox_command(vha, mcp);
3058 	if (rval != QLA_SUCCESS) {
3059 		ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3060 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3061 		    rval, mcp->mb[0], mcp->mb[1]);
3062 	} else {
3063 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3064 		    "Done %s.\n", __func__);
3065 
3066 		if (mb)
3067 			memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3068 		if (dwords)
3069 			*dwords = buffers;
3070 	}
3071 
3072 	return rval;
3073 }
3074 
3075 int
3076 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3077 {
3078 	int rval;
3079 	mbx_cmd_t mc;
3080 	mbx_cmd_t *mcp = &mc;
3081 
3082 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3083 	    "Entered %s.\n", __func__);
3084 
3085 	if (!IS_FWI2_CAPABLE(vha->hw))
3086 		return QLA_FUNCTION_FAILED;
3087 
3088 	if (unlikely(pci_channel_offline(vha->hw->pdev)))
3089 		return QLA_FUNCTION_FAILED;
3090 
3091 	mcp->mb[0] = MBC_TRACE_CONTROL;
3092 	mcp->mb[1] = TC_FCE_DISABLE;
3093 	mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3094 	mcp->out_mb = MBX_2|MBX_1|MBX_0;
3095 	mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3096 	    MBX_1|MBX_0;
3097 	mcp->tov = MBX_TOV_SECONDS;
3098 	mcp->flags = 0;
3099 	rval = qla2x00_mailbox_command(vha, mcp);
3100 	if (rval != QLA_SUCCESS) {
3101 		ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3102 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3103 		    rval, mcp->mb[0], mcp->mb[1]);
3104 	} else {
3105 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3106 		    "Done %s.\n", __func__);
3107 
3108 		if (wr)
3109 			*wr = (uint64_t) mcp->mb[5] << 48 |
3110 			    (uint64_t) mcp->mb[4] << 32 |
3111 			    (uint64_t) mcp->mb[3] << 16 |
3112 			    (uint64_t) mcp->mb[2];
3113 		if (rd)
3114 			*rd = (uint64_t) mcp->mb[9] << 48 |
3115 			    (uint64_t) mcp->mb[8] << 32 |
3116 			    (uint64_t) mcp->mb[7] << 16 |
3117 			    (uint64_t) mcp->mb[6];
3118 	}
3119 
3120 	return rval;
3121 }
3122 
3123 int
3124 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3125 	uint16_t *port_speed, uint16_t *mb)
3126 {
3127 	int rval;
3128 	mbx_cmd_t mc;
3129 	mbx_cmd_t *mcp = &mc;
3130 
3131 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3132 	    "Entered %s.\n", __func__);
3133 
3134 	if (!IS_IIDMA_CAPABLE(vha->hw))
3135 		return QLA_FUNCTION_FAILED;
3136 
3137 	mcp->mb[0] = MBC_PORT_PARAMS;
3138 	mcp->mb[1] = loop_id;
3139 	mcp->mb[2] = mcp->mb[3] = 0;
3140 	mcp->mb[9] = vha->vp_idx;
3141 	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3142 	mcp->in_mb = MBX_3|MBX_1|MBX_0;
3143 	mcp->tov = MBX_TOV_SECONDS;
3144 	mcp->flags = 0;
3145 	rval = qla2x00_mailbox_command(vha, mcp);
3146 
3147 	/* Return mailbox statuses. */
3148 	if (mb != NULL) {
3149 		mb[0] = mcp->mb[0];
3150 		mb[1] = mcp->mb[1];
3151 		mb[3] = mcp->mb[3];
3152 	}
3153 
3154 	if (rval != QLA_SUCCESS) {
3155 		ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3156 	} else {
3157 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3158 		    "Done %s.\n", __func__);
3159 		if (port_speed)
3160 			*port_speed = mcp->mb[3];
3161 	}
3162 
3163 	return rval;
3164 }
3165 
3166 int
3167 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3168     uint16_t port_speed, uint16_t *mb)
3169 {
3170 	int rval;
3171 	mbx_cmd_t mc;
3172 	mbx_cmd_t *mcp = &mc;
3173 
3174 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3175 	    "Entered %s.\n", __func__);
3176 
3177 	if (!IS_IIDMA_CAPABLE(vha->hw))
3178 		return QLA_FUNCTION_FAILED;
3179 
3180 	mcp->mb[0] = MBC_PORT_PARAMS;
3181 	mcp->mb[1] = loop_id;
3182 	mcp->mb[2] = BIT_0;
3183 	if (IS_CNA_CAPABLE(vha->hw))
3184 		mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3185 	else
3186 		mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
3187 	mcp->mb[9] = vha->vp_idx;
3188 	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3189 	mcp->in_mb = MBX_3|MBX_1|MBX_0;
3190 	mcp->tov = MBX_TOV_SECONDS;
3191 	mcp->flags = 0;
3192 	rval = qla2x00_mailbox_command(vha, mcp);
3193 
3194 	/* Return mailbox statuses. */
3195 	if (mb != NULL) {
3196 		mb[0] = mcp->mb[0];
3197 		mb[1] = mcp->mb[1];
3198 		mb[3] = mcp->mb[3];
3199 	}
3200 
3201 	if (rval != QLA_SUCCESS) {
3202 		ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3203 		    "Failed=%x.\n", rval);
3204 	} else {
3205 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3206 		    "Done %s.\n", __func__);
3207 	}
3208 
3209 	return rval;
3210 }
3211 
3212 void
3213 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3214 	struct vp_rpt_id_entry_24xx *rptid_entry)
3215 {
3216 	uint8_t vp_idx;
3217 	uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3218 	struct qla_hw_data *ha = vha->hw;
3219 	scsi_qla_host_t *vp;
3220 	unsigned long   flags;
3221 	int found;
3222 
3223 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3224 	    "Entered %s.\n", __func__);
3225 
3226 	if (rptid_entry->entry_status != 0)
3227 		return;
3228 
3229 	if (rptid_entry->format == 0) {
3230 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3231 		    "Format 0 : Number of VPs setup %d, number of "
3232 		    "VPs acquired %d.\n",
3233 		    MSB(le16_to_cpu(rptid_entry->vp_count)),
3234 		    LSB(le16_to_cpu(rptid_entry->vp_count)));
3235 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3236 		    "Primary port id %02x%02x%02x.\n",
3237 		    rptid_entry->port_id[2], rptid_entry->port_id[1],
3238 		    rptid_entry->port_id[0]);
3239 	} else if (rptid_entry->format == 1) {
3240 		vp_idx = LSB(stat);
3241 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3242 		    "Format 1: VP[%d] enabled - status %d - with "
3243 		    "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3244 		    rptid_entry->port_id[2], rptid_entry->port_id[1],
3245 		    rptid_entry->port_id[0]);
3246 
3247 		vp = vha;
3248 		if (vp_idx == 0 && (MSB(stat) != 1))
3249 			goto reg_needed;
3250 
3251 		if (MSB(stat) != 0 && MSB(stat) != 2) {
3252 			ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3253 			    "Could not acquire ID for VP[%d].\n", vp_idx);
3254 			return;
3255 		}
3256 
3257 		found = 0;
3258 		spin_lock_irqsave(&ha->vport_slock, flags);
3259 		list_for_each_entry(vp, &ha->vp_list, list) {
3260 			if (vp_idx == vp->vp_idx) {
3261 				found = 1;
3262 				break;
3263 			}
3264 		}
3265 		spin_unlock_irqrestore(&ha->vport_slock, flags);
3266 
3267 		if (!found)
3268 			return;
3269 
3270 		vp->d_id.b.domain = rptid_entry->port_id[2];
3271 		vp->d_id.b.area =  rptid_entry->port_id[1];
3272 		vp->d_id.b.al_pa = rptid_entry->port_id[0];
3273 
3274 		/*
3275 		 * Cannot configure here as we are still sitting on the
3276 		 * response queue. Handle it in dpc context.
3277 		 */
3278 		set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3279 
3280 reg_needed:
3281 		set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3282 		set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3283 		set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3284 		qla2xxx_wake_dpc(vha);
3285 	}
3286 }
3287 
3288 /*
3289  * qla24xx_modify_vp_config
3290  *	Change VP configuration for vha
3291  *
3292  * Input:
3293  *	vha = adapter block pointer.
3294  *
3295  * Returns:
3296  *	qla2xxx local function return status code.
3297  *
3298  * Context:
3299  *	Kernel context.
3300  */
3301 int
3302 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3303 {
3304 	int		rval;
3305 	struct vp_config_entry_24xx *vpmod;
3306 	dma_addr_t	vpmod_dma;
3307 	struct qla_hw_data *ha = vha->hw;
3308 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3309 
3310 	/* This can be called by the parent */
3311 
3312 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3313 	    "Entered %s.\n", __func__);
3314 
3315 	vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3316 	if (!vpmod) {
3317 		ql_log(ql_log_warn, vha, 0x10bc,
3318 		    "Failed to allocate modify VP IOCB.\n");
3319 		return QLA_MEMORY_ALLOC_FAILED;
3320 	}
3321 
3322 	memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3323 	vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3324 	vpmod->entry_count = 1;
3325 	vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3326 	vpmod->vp_count = 1;
3327 	vpmod->vp_index1 = vha->vp_idx;
3328 	vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3329 
3330 	qlt_modify_vp_config(vha, vpmod);
3331 
3332 	memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3333 	memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3334 	vpmod->entry_count = 1;
3335 
3336 	rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3337 	if (rval != QLA_SUCCESS) {
3338 		ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3339 		    "Failed to issue VP config IOCB (%x).\n", rval);
3340 	} else if (vpmod->comp_status != 0) {
3341 		ql_dbg(ql_dbg_mbx, vha, 0x10be,
3342 		    "Failed to complete IOCB -- error status (%x).\n",
3343 		    vpmod->comp_status);
3344 		rval = QLA_FUNCTION_FAILED;
3345 	} else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3346 		ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3347 		    "Failed to complete IOCB -- completion status (%x).\n",
3348 		    le16_to_cpu(vpmod->comp_status));
3349 		rval = QLA_FUNCTION_FAILED;
3350 	} else {
3351 		/* EMPTY */
3352 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3353 		    "Done %s.\n", __func__);
3354 		fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3355 	}
3356 	dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3357 
3358 	return rval;
3359 }
3360 
3361 /*
3362  * qla24xx_control_vp
3363  *	Enable a virtual port for given host
3364  *
3365  * Input:
3366  *	ha = adapter block pointer.
3367  *	vhba = virtual adapter (unused)
3368  *	index = index number for enabled VP
3369  *
3370  * Returns:
3371  *	qla2xxx local function return status code.
3372  *
3373  * Context:
3374  *	Kernel context.
3375  */
3376 int
3377 qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3378 {
3379 	int		rval;
3380 	int		map, pos;
3381 	struct vp_ctrl_entry_24xx   *vce;
3382 	dma_addr_t	vce_dma;
3383 	struct qla_hw_data *ha = vha->hw;
3384 	int	vp_index = vha->vp_idx;
3385 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3386 
3387 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3388 	    "Entered %s enabling index %d.\n", __func__, vp_index);
3389 
3390 	if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3391 		return QLA_PARAMETER_ERROR;
3392 
3393 	vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3394 	if (!vce) {
3395 		ql_log(ql_log_warn, vha, 0x10c2,
3396 		    "Failed to allocate VP control IOCB.\n");
3397 		return QLA_MEMORY_ALLOC_FAILED;
3398 	}
3399 	memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3400 
3401 	vce->entry_type = VP_CTRL_IOCB_TYPE;
3402 	vce->entry_count = 1;
3403 	vce->command = cpu_to_le16(cmd);
3404 	vce->vp_count = __constant_cpu_to_le16(1);
3405 
3406 	/* index map in firmware starts with 1; decrement index
3407 	 * this is ok as we never use index 0
3408 	 */
3409 	map = (vp_index - 1) / 8;
3410 	pos = (vp_index - 1) & 7;
3411 	mutex_lock(&ha->vport_lock);
3412 	vce->vp_idx_map[map] |= 1 << pos;
3413 	mutex_unlock(&ha->vport_lock);
3414 
3415 	rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3416 	if (rval != QLA_SUCCESS) {
3417 		ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3418 		    "Failed to issue VP control IOCB (%x).\n", rval);
3419 	} else if (vce->entry_status != 0) {
3420 		ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3421 		    "Failed to complete IOCB -- error status (%x).\n",
3422 		    vce->entry_status);
3423 		rval = QLA_FUNCTION_FAILED;
3424 	} else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3425 		ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3426 		    "Failed to complet IOCB -- completion status (%x).\n",
3427 		    le16_to_cpu(vce->comp_status));
3428 		rval = QLA_FUNCTION_FAILED;
3429 	} else {
3430 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3431 		    "Done %s.\n", __func__);
3432 	}
3433 
3434 	dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3435 
3436 	return rval;
3437 }
3438 
3439 /*
3440  * qla2x00_send_change_request
3441  *	Receive or disable RSCN request from fabric controller
3442  *
3443  * Input:
3444  *	ha = adapter block pointer
3445  *	format = registration format:
3446  *		0 - Reserved
3447  *		1 - Fabric detected registration
3448  *		2 - N_port detected registration
3449  *		3 - Full registration
3450  *		FF - clear registration
3451  *	vp_idx = Virtual port index
3452  *
3453  * Returns:
3454  *	qla2x00 local function return status code.
3455  *
3456  * Context:
3457  *	Kernel Context
3458  */
3459 
3460 int
3461 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3462 			    uint16_t vp_idx)
3463 {
3464 	int rval;
3465 	mbx_cmd_t mc;
3466 	mbx_cmd_t *mcp = &mc;
3467 
3468 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3469 	    "Entered %s.\n", __func__);
3470 
3471 	mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3472 	mcp->mb[1] = format;
3473 	mcp->mb[9] = vp_idx;
3474 	mcp->out_mb = MBX_9|MBX_1|MBX_0;
3475 	mcp->in_mb = MBX_0|MBX_1;
3476 	mcp->tov = MBX_TOV_SECONDS;
3477 	mcp->flags = 0;
3478 	rval = qla2x00_mailbox_command(vha, mcp);
3479 
3480 	if (rval == QLA_SUCCESS) {
3481 		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3482 			rval = BIT_1;
3483 		}
3484 	} else
3485 		rval = BIT_1;
3486 
3487 	return rval;
3488 }
3489 
3490 int
3491 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3492     uint32_t size)
3493 {
3494 	int rval;
3495 	mbx_cmd_t mc;
3496 	mbx_cmd_t *mcp = &mc;
3497 
3498 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3499 	    "Entered %s.\n", __func__);
3500 
3501 	if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3502 		mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3503 		mcp->mb[8] = MSW(addr);
3504 		mcp->out_mb = MBX_8|MBX_0;
3505 	} else {
3506 		mcp->mb[0] = MBC_DUMP_RISC_RAM;
3507 		mcp->out_mb = MBX_0;
3508 	}
3509 	mcp->mb[1] = LSW(addr);
3510 	mcp->mb[2] = MSW(req_dma);
3511 	mcp->mb[3] = LSW(req_dma);
3512 	mcp->mb[6] = MSW(MSD(req_dma));
3513 	mcp->mb[7] = LSW(MSD(req_dma));
3514 	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3515 	if (IS_FWI2_CAPABLE(vha->hw)) {
3516 		mcp->mb[4] = MSW(size);
3517 		mcp->mb[5] = LSW(size);
3518 		mcp->out_mb |= MBX_5|MBX_4;
3519 	} else {
3520 		mcp->mb[4] = LSW(size);
3521 		mcp->out_mb |= MBX_4;
3522 	}
3523 
3524 	mcp->in_mb = MBX_0;
3525 	mcp->tov = MBX_TOV_SECONDS;
3526 	mcp->flags = 0;
3527 	rval = qla2x00_mailbox_command(vha, mcp);
3528 
3529 	if (rval != QLA_SUCCESS) {
3530 		ql_dbg(ql_dbg_mbx, vha, 0x1008,
3531 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3532 	} else {
3533 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3534 		    "Done %s.\n", __func__);
3535 	}
3536 
3537 	return rval;
3538 }
3539 /* 84XX Support **************************************************************/
3540 
3541 struct cs84xx_mgmt_cmd {
3542 	union {
3543 		struct verify_chip_entry_84xx req;
3544 		struct verify_chip_rsp_84xx rsp;
3545 	} p;
3546 };
3547 
3548 int
3549 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3550 {
3551 	int rval, retry;
3552 	struct cs84xx_mgmt_cmd *mn;
3553 	dma_addr_t mn_dma;
3554 	uint16_t options;
3555 	unsigned long flags;
3556 	struct qla_hw_data *ha = vha->hw;
3557 
3558 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
3559 	    "Entered %s.\n", __func__);
3560 
3561 	mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
3562 	if (mn == NULL) {
3563 		return QLA_MEMORY_ALLOC_FAILED;
3564 	}
3565 
3566 	/* Force Update? */
3567 	options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
3568 	/* Diagnostic firmware? */
3569 	/* options |= MENLO_DIAG_FW; */
3570 	/* We update the firmware with only one data sequence. */
3571 	options |= VCO_END_OF_DATA;
3572 
3573 	do {
3574 		retry = 0;
3575 		memset(mn, 0, sizeof(*mn));
3576 		mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
3577 		mn->p.req.entry_count = 1;
3578 		mn->p.req.options = cpu_to_le16(options);
3579 
3580 		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
3581 		    "Dump of Verify Request.\n");
3582 		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
3583 		    (uint8_t *)mn, sizeof(*mn));
3584 
3585 		rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
3586 		if (rval != QLA_SUCCESS) {
3587 			ql_dbg(ql_dbg_mbx, vha, 0x10cb,
3588 			    "Failed to issue verify IOCB (%x).\n", rval);
3589 			goto verify_done;
3590 		}
3591 
3592 		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
3593 		    "Dump of Verify Response.\n");
3594 		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
3595 		    (uint8_t *)mn, sizeof(*mn));
3596 
3597 		status[0] = le16_to_cpu(mn->p.rsp.comp_status);
3598 		status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
3599 		    le16_to_cpu(mn->p.rsp.failure_code) : 0;
3600 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
3601 		    "cs=%x fc=%x.\n", status[0], status[1]);
3602 
3603 		if (status[0] != CS_COMPLETE) {
3604 			rval = QLA_FUNCTION_FAILED;
3605 			if (!(options & VCO_DONT_UPDATE_FW)) {
3606 				ql_dbg(ql_dbg_mbx, vha, 0x10cf,
3607 				    "Firmware update failed. Retrying "
3608 				    "without update firmware.\n");
3609 				options |= VCO_DONT_UPDATE_FW;
3610 				options &= ~VCO_FORCE_UPDATE;
3611 				retry = 1;
3612 			}
3613 		} else {
3614 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
3615 			    "Firmware updated to %x.\n",
3616 			    le32_to_cpu(mn->p.rsp.fw_ver));
3617 
3618 			/* NOTE: we only update OP firmware. */
3619 			spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
3620 			ha->cs84xx->op_fw_version =
3621 			    le32_to_cpu(mn->p.rsp.fw_ver);
3622 			spin_unlock_irqrestore(&ha->cs84xx->access_lock,
3623 			    flags);
3624 		}
3625 	} while (retry);
3626 
3627 verify_done:
3628 	dma_pool_free(ha->s_dma_pool, mn, mn_dma);
3629 
3630 	if (rval != QLA_SUCCESS) {
3631 		ql_dbg(ql_dbg_mbx, vha, 0x10d1,
3632 		    "Failed=%x.\n", rval);
3633 	} else {
3634 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
3635 		    "Done %s.\n", __func__);
3636 	}
3637 
3638 	return rval;
3639 }
3640 
3641 int
3642 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
3643 {
3644 	int rval;
3645 	unsigned long flags;
3646 	mbx_cmd_t mc;
3647 	mbx_cmd_t *mcp = &mc;
3648 	struct qla_hw_data *ha = vha->hw;
3649 
3650 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
3651 	    "Entered %s.\n", __func__);
3652 
3653 	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3654 	mcp->mb[1] = req->options;
3655 	mcp->mb[2] = MSW(LSD(req->dma));
3656 	mcp->mb[3] = LSW(LSD(req->dma));
3657 	mcp->mb[6] = MSW(MSD(req->dma));
3658 	mcp->mb[7] = LSW(MSD(req->dma));
3659 	mcp->mb[5] = req->length;
3660 	if (req->rsp)
3661 		mcp->mb[10] = req->rsp->id;
3662 	mcp->mb[12] = req->qos;
3663 	mcp->mb[11] = req->vp_idx;
3664 	mcp->mb[13] = req->rid;
3665 	if (IS_QLA83XX(ha))
3666 		mcp->mb[15] = 0;
3667 
3668 	mcp->mb[4] = req->id;
3669 	/* que in ptr index */
3670 	mcp->mb[8] = 0;
3671 	/* que out ptr index */
3672 	mcp->mb[9] = 0;
3673 	mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
3674 			MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3675 	mcp->in_mb = MBX_0;
3676 	mcp->flags = MBX_DMA_OUT;
3677 	mcp->tov = MBX_TOV_SECONDS * 2;
3678 
3679 	if (IS_QLA81XX(ha) || IS_QLA83XX(ha))
3680 		mcp->in_mb |= MBX_1;
3681 	if (IS_QLA83XX(ha)) {
3682 		mcp->out_mb |= MBX_15;
3683 		/* debug q create issue in SR-IOV */
3684 		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3685 	}
3686 
3687 	spin_lock_irqsave(&ha->hardware_lock, flags);
3688 	if (!(req->options & BIT_0)) {
3689 		WRT_REG_DWORD(req->req_q_in, 0);
3690 		if (!IS_QLA83XX(ha))
3691 			WRT_REG_DWORD(req->req_q_out, 0);
3692 	}
3693 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3694 
3695 	rval = qla2x00_mailbox_command(vha, mcp);
3696 	if (rval != QLA_SUCCESS) {
3697 		ql_dbg(ql_dbg_mbx, vha, 0x10d4,
3698 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3699 	} else {
3700 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
3701 		    "Done %s.\n", __func__);
3702 	}
3703 
3704 	return rval;
3705 }
3706 
3707 int
3708 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
3709 {
3710 	int rval;
3711 	unsigned long flags;
3712 	mbx_cmd_t mc;
3713 	mbx_cmd_t *mcp = &mc;
3714 	struct qla_hw_data *ha = vha->hw;
3715 
3716 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
3717 	    "Entered %s.\n", __func__);
3718 
3719 	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3720 	mcp->mb[1] = rsp->options;
3721 	mcp->mb[2] = MSW(LSD(rsp->dma));
3722 	mcp->mb[3] = LSW(LSD(rsp->dma));
3723 	mcp->mb[6] = MSW(MSD(rsp->dma));
3724 	mcp->mb[7] = LSW(MSD(rsp->dma));
3725 	mcp->mb[5] = rsp->length;
3726 	mcp->mb[14] = rsp->msix->entry;
3727 	mcp->mb[13] = rsp->rid;
3728 	if (IS_QLA83XX(ha))
3729 		mcp->mb[15] = 0;
3730 
3731 	mcp->mb[4] = rsp->id;
3732 	/* que in ptr index */
3733 	mcp->mb[8] = 0;
3734 	/* que out ptr index */
3735 	mcp->mb[9] = 0;
3736 	mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
3737 			|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3738 	mcp->in_mb = MBX_0;
3739 	mcp->flags = MBX_DMA_OUT;
3740 	mcp->tov = MBX_TOV_SECONDS * 2;
3741 
3742 	if (IS_QLA81XX(ha)) {
3743 		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
3744 		mcp->in_mb |= MBX_1;
3745 	} else if (IS_QLA83XX(ha)) {
3746 		mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
3747 		mcp->in_mb |= MBX_1;
3748 		/* debug q create issue in SR-IOV */
3749 		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3750 	}
3751 
3752 	spin_lock_irqsave(&ha->hardware_lock, flags);
3753 	if (!(rsp->options & BIT_0)) {
3754 		WRT_REG_DWORD(rsp->rsp_q_out, 0);
3755 		if (!IS_QLA83XX(ha))
3756 			WRT_REG_DWORD(rsp->rsp_q_in, 0);
3757 	}
3758 
3759 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3760 
3761 	rval = qla2x00_mailbox_command(vha, mcp);
3762 	if (rval != QLA_SUCCESS) {
3763 		ql_dbg(ql_dbg_mbx, vha, 0x10d7,
3764 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3765 	} else {
3766 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
3767 		    "Done %s.\n", __func__);
3768 	}
3769 
3770 	return rval;
3771 }
3772 
3773 int
3774 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
3775 {
3776 	int rval;
3777 	mbx_cmd_t mc;
3778 	mbx_cmd_t *mcp = &mc;
3779 
3780 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
3781 	    "Entered %s.\n", __func__);
3782 
3783 	mcp->mb[0] = MBC_IDC_ACK;
3784 	memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3785 	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3786 	mcp->in_mb = MBX_0;
3787 	mcp->tov = MBX_TOV_SECONDS;
3788 	mcp->flags = 0;
3789 	rval = qla2x00_mailbox_command(vha, mcp);
3790 
3791 	if (rval != QLA_SUCCESS) {
3792 		ql_dbg(ql_dbg_mbx, vha, 0x10da,
3793 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3794 	} else {
3795 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
3796 		    "Done %s.\n", __func__);
3797 	}
3798 
3799 	return rval;
3800 }
3801 
3802 int
3803 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
3804 {
3805 	int rval;
3806 	mbx_cmd_t mc;
3807 	mbx_cmd_t *mcp = &mc;
3808 
3809 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
3810 	    "Entered %s.\n", __func__);
3811 
3812 	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3813 		return QLA_FUNCTION_FAILED;
3814 
3815 	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3816 	mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
3817 	mcp->out_mb = MBX_1|MBX_0;
3818 	mcp->in_mb = MBX_1|MBX_0;
3819 	mcp->tov = MBX_TOV_SECONDS;
3820 	mcp->flags = 0;
3821 	rval = qla2x00_mailbox_command(vha, mcp);
3822 
3823 	if (rval != QLA_SUCCESS) {
3824 		ql_dbg(ql_dbg_mbx, vha, 0x10dd,
3825 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3826 		    rval, mcp->mb[0], mcp->mb[1]);
3827 	} else {
3828 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
3829 		    "Done %s.\n", __func__);
3830 		*sector_size = mcp->mb[1];
3831 	}
3832 
3833 	return rval;
3834 }
3835 
3836 int
3837 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
3838 {
3839 	int rval;
3840 	mbx_cmd_t mc;
3841 	mbx_cmd_t *mcp = &mc;
3842 
3843 	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3844 		return QLA_FUNCTION_FAILED;
3845 
3846 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
3847 	    "Entered %s.\n", __func__);
3848 
3849 	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3850 	mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
3851 	    FAC_OPT_CMD_WRITE_PROTECT;
3852 	mcp->out_mb = MBX_1|MBX_0;
3853 	mcp->in_mb = MBX_1|MBX_0;
3854 	mcp->tov = MBX_TOV_SECONDS;
3855 	mcp->flags = 0;
3856 	rval = qla2x00_mailbox_command(vha, mcp);
3857 
3858 	if (rval != QLA_SUCCESS) {
3859 		ql_dbg(ql_dbg_mbx, vha, 0x10e0,
3860 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3861 		    rval, mcp->mb[0], mcp->mb[1]);
3862 	} else {
3863 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
3864 		    "Done %s.\n", __func__);
3865 	}
3866 
3867 	return rval;
3868 }
3869 
3870 int
3871 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
3872 {
3873 	int rval;
3874 	mbx_cmd_t mc;
3875 	mbx_cmd_t *mcp = &mc;
3876 
3877 	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3878 		return QLA_FUNCTION_FAILED;
3879 
3880 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
3881 	    "Entered %s.\n", __func__);
3882 
3883 	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3884 	mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
3885 	mcp->mb[2] = LSW(start);
3886 	mcp->mb[3] = MSW(start);
3887 	mcp->mb[4] = LSW(finish);
3888 	mcp->mb[5] = MSW(finish);
3889 	mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3890 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
3891 	mcp->tov = MBX_TOV_SECONDS;
3892 	mcp->flags = 0;
3893 	rval = qla2x00_mailbox_command(vha, mcp);
3894 
3895 	if (rval != QLA_SUCCESS) {
3896 		ql_dbg(ql_dbg_mbx, vha, 0x10e3,
3897 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
3898 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
3899 	} else {
3900 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
3901 		    "Done %s.\n", __func__);
3902 	}
3903 
3904 	return rval;
3905 }
3906 
3907 int
3908 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
3909 {
3910 	int rval = 0;
3911 	mbx_cmd_t mc;
3912 	mbx_cmd_t *mcp = &mc;
3913 
3914 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
3915 	    "Entered %s.\n", __func__);
3916 
3917 	mcp->mb[0] = MBC_RESTART_MPI_FW;
3918 	mcp->out_mb = MBX_0;
3919 	mcp->in_mb = MBX_0|MBX_1;
3920 	mcp->tov = MBX_TOV_SECONDS;
3921 	mcp->flags = 0;
3922 	rval = qla2x00_mailbox_command(vha, mcp);
3923 
3924 	if (rval != QLA_SUCCESS) {
3925 		ql_dbg(ql_dbg_mbx, vha, 0x10e6,
3926 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3927 		    rval, mcp->mb[0], mcp->mb[1]);
3928 	} else {
3929 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
3930 		    "Done %s.\n", __func__);
3931 	}
3932 
3933 	return rval;
3934 }
3935 
3936 int
3937 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
3938 {
3939 	int rval;
3940 	mbx_cmd_t mc;
3941 	mbx_cmd_t *mcp = &mc;
3942 	int i;
3943 	int len;
3944 	uint16_t *str;
3945 	struct qla_hw_data *ha = vha->hw;
3946 
3947 	if (!IS_P3P_TYPE(ha))
3948 		return QLA_FUNCTION_FAILED;
3949 
3950 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
3951 	    "Entered %s.\n", __func__);
3952 
3953 	str = (void *)version;
3954 	len = strlen(version);
3955 
3956 	mcp->mb[0] = MBC_SET_RNID_PARAMS;
3957 	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
3958 	mcp->out_mb = MBX_1|MBX_0;
3959 	for (i = 4; i < 16 && len; i++, str++, len -= 2) {
3960 		mcp->mb[i] = cpu_to_le16p(str);
3961 		mcp->out_mb |= 1<<i;
3962 	}
3963 	for (; i < 16; i++) {
3964 		mcp->mb[i] = 0;
3965 		mcp->out_mb |= 1<<i;
3966 	}
3967 	mcp->in_mb = MBX_1|MBX_0;
3968 	mcp->tov = MBX_TOV_SECONDS;
3969 	mcp->flags = 0;
3970 	rval = qla2x00_mailbox_command(vha, mcp);
3971 
3972 	if (rval != QLA_SUCCESS) {
3973 		ql_dbg(ql_dbg_mbx, vha, 0x117c,
3974 		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
3975 	} else {
3976 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
3977 		    "Done %s.\n", __func__);
3978 	}
3979 
3980 	return rval;
3981 }
3982 
3983 int
3984 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
3985 {
3986 	int rval;
3987 	mbx_cmd_t mc;
3988 	mbx_cmd_t *mcp = &mc;
3989 	int len;
3990 	uint16_t dwlen;
3991 	uint8_t *str;
3992 	dma_addr_t str_dma;
3993 	struct qla_hw_data *ha = vha->hw;
3994 
3995 	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
3996 	    IS_P3P_TYPE(ha))
3997 		return QLA_FUNCTION_FAILED;
3998 
3999 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4000 	    "Entered %s.\n", __func__);
4001 
4002 	str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4003 	if (!str) {
4004 		ql_log(ql_log_warn, vha, 0x117f,
4005 		    "Failed to allocate driver version param.\n");
4006 		return QLA_MEMORY_ALLOC_FAILED;
4007 	}
4008 
4009 	memcpy(str, "\x7\x3\x11\x0", 4);
4010 	dwlen = str[0];
4011 	len = dwlen * 4 - 4;
4012 	memset(str + 4, 0, len);
4013 	if (len > strlen(version))
4014 		len = strlen(version);
4015 	memcpy(str + 4, version, len);
4016 
4017 	mcp->mb[0] = MBC_SET_RNID_PARAMS;
4018 	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4019 	mcp->mb[2] = MSW(LSD(str_dma));
4020 	mcp->mb[3] = LSW(LSD(str_dma));
4021 	mcp->mb[6] = MSW(MSD(str_dma));
4022 	mcp->mb[7] = LSW(MSD(str_dma));
4023 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4024 	mcp->in_mb = MBX_1|MBX_0;
4025 	mcp->tov = MBX_TOV_SECONDS;
4026 	mcp->flags = 0;
4027 	rval = qla2x00_mailbox_command(vha, mcp);
4028 
4029 	if (rval != QLA_SUCCESS) {
4030 		ql_dbg(ql_dbg_mbx, vha, 0x1180,
4031 		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4032 	} else {
4033 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4034 		    "Done %s.\n", __func__);
4035 	}
4036 
4037 	dma_pool_free(ha->s_dma_pool, str, str_dma);
4038 
4039 	return rval;
4040 }
4041 
4042 static int
4043 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
4044 {
4045 	int rval;
4046 	mbx_cmd_t mc;
4047 	mbx_cmd_t *mcp = &mc;
4048 
4049 	if (!IS_FWI2_CAPABLE(vha->hw))
4050 		return QLA_FUNCTION_FAILED;
4051 
4052 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4053 	    "Entered %s.\n", __func__);
4054 
4055 	mcp->mb[0] = MBC_GET_RNID_PARAMS;
4056 	mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
4057 	mcp->out_mb = MBX_1|MBX_0;
4058 	mcp->in_mb = MBX_1|MBX_0;
4059 	mcp->tov = MBX_TOV_SECONDS;
4060 	mcp->flags = 0;
4061 	rval = qla2x00_mailbox_command(vha, mcp);
4062 	*temp = mcp->mb[1];
4063 
4064 	if (rval != QLA_SUCCESS) {
4065 		ql_dbg(ql_dbg_mbx, vha, 0x115a,
4066 		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4067 	} else {
4068 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4069 		    "Done %s.\n", __func__);
4070 	}
4071 
4072 	return rval;
4073 }
4074 
4075 int
4076 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4077 	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4078 {
4079 	int rval;
4080 	mbx_cmd_t mc;
4081 	mbx_cmd_t *mcp = &mc;
4082 	struct qla_hw_data *ha = vha->hw;
4083 
4084 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
4085 	    "Entered %s.\n", __func__);
4086 
4087 	if (!IS_FWI2_CAPABLE(ha))
4088 		return QLA_FUNCTION_FAILED;
4089 
4090 	if (len == 1)
4091 		opt |= BIT_0;
4092 
4093 	mcp->mb[0] = MBC_READ_SFP;
4094 	mcp->mb[1] = dev;
4095 	mcp->mb[2] = MSW(sfp_dma);
4096 	mcp->mb[3] = LSW(sfp_dma);
4097 	mcp->mb[6] = MSW(MSD(sfp_dma));
4098 	mcp->mb[7] = LSW(MSD(sfp_dma));
4099 	mcp->mb[8] = len;
4100 	mcp->mb[9] = off;
4101 	mcp->mb[10] = opt;
4102 	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4103 	mcp->in_mb = MBX_1|MBX_0;
4104 	mcp->tov = MBX_TOV_SECONDS;
4105 	mcp->flags = 0;
4106 	rval = qla2x00_mailbox_command(vha, mcp);
4107 
4108 	if (opt & BIT_0)
4109 		*sfp = mcp->mb[1];
4110 
4111 	if (rval != QLA_SUCCESS) {
4112 		ql_dbg(ql_dbg_mbx, vha, 0x10e9,
4113 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4114 	} else {
4115 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
4116 		    "Done %s.\n", __func__);
4117 	}
4118 
4119 	return rval;
4120 }
4121 
4122 int
4123 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4124 	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4125 {
4126 	int rval;
4127 	mbx_cmd_t mc;
4128 	mbx_cmd_t *mcp = &mc;
4129 	struct qla_hw_data *ha = vha->hw;
4130 
4131 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
4132 	    "Entered %s.\n", __func__);
4133 
4134 	if (!IS_FWI2_CAPABLE(ha))
4135 		return QLA_FUNCTION_FAILED;
4136 
4137 	if (len == 1)
4138 		opt |= BIT_0;
4139 
4140 	if (opt & BIT_0)
4141 		len = *sfp;
4142 
4143 	mcp->mb[0] = MBC_WRITE_SFP;
4144 	mcp->mb[1] = dev;
4145 	mcp->mb[2] = MSW(sfp_dma);
4146 	mcp->mb[3] = LSW(sfp_dma);
4147 	mcp->mb[6] = MSW(MSD(sfp_dma));
4148 	mcp->mb[7] = LSW(MSD(sfp_dma));
4149 	mcp->mb[8] = len;
4150 	mcp->mb[9] = off;
4151 	mcp->mb[10] = opt;
4152 	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4153 	mcp->in_mb = MBX_1|MBX_0;
4154 	mcp->tov = MBX_TOV_SECONDS;
4155 	mcp->flags = 0;
4156 	rval = qla2x00_mailbox_command(vha, mcp);
4157 
4158 	if (rval != QLA_SUCCESS) {
4159 		ql_dbg(ql_dbg_mbx, vha, 0x10ec,
4160 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4161 	} else {
4162 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
4163 		    "Done %s.\n", __func__);
4164 	}
4165 
4166 	return rval;
4167 }
4168 
4169 int
4170 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4171     uint16_t size_in_bytes, uint16_t *actual_size)
4172 {
4173 	int rval;
4174 	mbx_cmd_t mc;
4175 	mbx_cmd_t *mcp = &mc;
4176 
4177 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4178 	    "Entered %s.\n", __func__);
4179 
4180 	if (!IS_CNA_CAPABLE(vha->hw))
4181 		return QLA_FUNCTION_FAILED;
4182 
4183 	mcp->mb[0] = MBC_GET_XGMAC_STATS;
4184 	mcp->mb[2] = MSW(stats_dma);
4185 	mcp->mb[3] = LSW(stats_dma);
4186 	mcp->mb[6] = MSW(MSD(stats_dma));
4187 	mcp->mb[7] = LSW(MSD(stats_dma));
4188 	mcp->mb[8] = size_in_bytes >> 2;
4189 	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4190 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
4191 	mcp->tov = MBX_TOV_SECONDS;
4192 	mcp->flags = 0;
4193 	rval = qla2x00_mailbox_command(vha, mcp);
4194 
4195 	if (rval != QLA_SUCCESS) {
4196 		ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4197 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4198 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4199 	} else {
4200 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4201 		    "Done %s.\n", __func__);
4202 
4203 
4204 		*actual_size = mcp->mb[2] << 2;
4205 	}
4206 
4207 	return rval;
4208 }
4209 
4210 int
4211 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4212     uint16_t size)
4213 {
4214 	int rval;
4215 	mbx_cmd_t mc;
4216 	mbx_cmd_t *mcp = &mc;
4217 
4218 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4219 	    "Entered %s.\n", __func__);
4220 
4221 	if (!IS_CNA_CAPABLE(vha->hw))
4222 		return QLA_FUNCTION_FAILED;
4223 
4224 	mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4225 	mcp->mb[1] = 0;
4226 	mcp->mb[2] = MSW(tlv_dma);
4227 	mcp->mb[3] = LSW(tlv_dma);
4228 	mcp->mb[6] = MSW(MSD(tlv_dma));
4229 	mcp->mb[7] = LSW(MSD(tlv_dma));
4230 	mcp->mb[8] = size;
4231 	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4232 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
4233 	mcp->tov = MBX_TOV_SECONDS;
4234 	mcp->flags = 0;
4235 	rval = qla2x00_mailbox_command(vha, mcp);
4236 
4237 	if (rval != QLA_SUCCESS) {
4238 		ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4239 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4240 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4241 	} else {
4242 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4243 		    "Done %s.\n", __func__);
4244 	}
4245 
4246 	return rval;
4247 }
4248 
4249 int
4250 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4251 {
4252 	int rval;
4253 	mbx_cmd_t mc;
4254 	mbx_cmd_t *mcp = &mc;
4255 
4256 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4257 	    "Entered %s.\n", __func__);
4258 
4259 	if (!IS_FWI2_CAPABLE(vha->hw))
4260 		return QLA_FUNCTION_FAILED;
4261 
4262 	mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4263 	mcp->mb[1] = LSW(risc_addr);
4264 	mcp->mb[8] = MSW(risc_addr);
4265 	mcp->out_mb = MBX_8|MBX_1|MBX_0;
4266 	mcp->in_mb = MBX_3|MBX_2|MBX_0;
4267 	mcp->tov = 30;
4268 	mcp->flags = 0;
4269 	rval = qla2x00_mailbox_command(vha, mcp);
4270 	if (rval != QLA_SUCCESS) {
4271 		ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4272 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4273 	} else {
4274 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4275 		    "Done %s.\n", __func__);
4276 		*data = mcp->mb[3] << 16 | mcp->mb[2];
4277 	}
4278 
4279 	return rval;
4280 }
4281 
4282 int
4283 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4284 	uint16_t *mresp)
4285 {
4286 	int rval;
4287 	mbx_cmd_t mc;
4288 	mbx_cmd_t *mcp = &mc;
4289 
4290 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4291 	    "Entered %s.\n", __func__);
4292 
4293 	memset(mcp->mb, 0 , sizeof(mcp->mb));
4294 	mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4295 	mcp->mb[1] = mreq->options | BIT_6;	// BIT_6 specifies 64 bit addressing
4296 
4297 	/* transfer count */
4298 	mcp->mb[10] = LSW(mreq->transfer_size);
4299 	mcp->mb[11] = MSW(mreq->transfer_size);
4300 
4301 	/* send data address */
4302 	mcp->mb[14] = LSW(mreq->send_dma);
4303 	mcp->mb[15] = MSW(mreq->send_dma);
4304 	mcp->mb[20] = LSW(MSD(mreq->send_dma));
4305 	mcp->mb[21] = MSW(MSD(mreq->send_dma));
4306 
4307 	/* receive data address */
4308 	mcp->mb[16] = LSW(mreq->rcv_dma);
4309 	mcp->mb[17] = MSW(mreq->rcv_dma);
4310 	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4311 	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4312 
4313 	/* Iteration count */
4314 	mcp->mb[18] = LSW(mreq->iteration_count);
4315 	mcp->mb[19] = MSW(mreq->iteration_count);
4316 
4317 	mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4318 	    MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4319 	if (IS_CNA_CAPABLE(vha->hw))
4320 		mcp->out_mb |= MBX_2;
4321 	mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4322 
4323 	mcp->buf_size = mreq->transfer_size;
4324 	mcp->tov = MBX_TOV_SECONDS;
4325 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4326 
4327 	rval = qla2x00_mailbox_command(vha, mcp);
4328 
4329 	if (rval != QLA_SUCCESS) {
4330 		ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4331 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4332 		    "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4333 		    mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4334 	} else {
4335 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4336 		    "Done %s.\n", __func__);
4337 	}
4338 
4339 	/* Copy mailbox information */
4340 	memcpy( mresp, mcp->mb, 64);
4341 	return rval;
4342 }
4343 
4344 int
4345 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4346 	uint16_t *mresp)
4347 {
4348 	int rval;
4349 	mbx_cmd_t mc;
4350 	mbx_cmd_t *mcp = &mc;
4351 	struct qla_hw_data *ha = vha->hw;
4352 
4353 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4354 	    "Entered %s.\n", __func__);
4355 
4356 	memset(mcp->mb, 0 , sizeof(mcp->mb));
4357 	mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4358 	mcp->mb[1] = mreq->options | BIT_6;	/* BIT_6 specifies 64bit address */
4359 	if (IS_CNA_CAPABLE(ha)) {
4360 		mcp->mb[1] |= BIT_15;
4361 		mcp->mb[2] = vha->fcoe_fcf_idx;
4362 	}
4363 	mcp->mb[16] = LSW(mreq->rcv_dma);
4364 	mcp->mb[17] = MSW(mreq->rcv_dma);
4365 	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4366 	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4367 
4368 	mcp->mb[10] = LSW(mreq->transfer_size);
4369 
4370 	mcp->mb[14] = LSW(mreq->send_dma);
4371 	mcp->mb[15] = MSW(mreq->send_dma);
4372 	mcp->mb[20] = LSW(MSD(mreq->send_dma));
4373 	mcp->mb[21] = MSW(MSD(mreq->send_dma));
4374 
4375 	mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4376 	    MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4377 	if (IS_CNA_CAPABLE(ha))
4378 		mcp->out_mb |= MBX_2;
4379 
4380 	mcp->in_mb = MBX_0;
4381 	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4382 	    IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4383 		mcp->in_mb |= MBX_1;
4384 	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4385 		mcp->in_mb |= MBX_3;
4386 
4387 	mcp->tov = MBX_TOV_SECONDS;
4388 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4389 	mcp->buf_size = mreq->transfer_size;
4390 
4391 	rval = qla2x00_mailbox_command(vha, mcp);
4392 
4393 	if (rval != QLA_SUCCESS) {
4394 		ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4395 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
4396 		    rval, mcp->mb[0], mcp->mb[1]);
4397 	} else {
4398 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4399 		    "Done %s.\n", __func__);
4400 	}
4401 
4402 	/* Copy mailbox information */
4403 	memcpy(mresp, mcp->mb, 64);
4404 	return rval;
4405 }
4406 
4407 int
4408 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4409 {
4410 	int rval;
4411 	mbx_cmd_t mc;
4412 	mbx_cmd_t *mcp = &mc;
4413 
4414 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4415 	    "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4416 
4417 	mcp->mb[0] = MBC_ISP84XX_RESET;
4418 	mcp->mb[1] = enable_diagnostic;
4419 	mcp->out_mb = MBX_1|MBX_0;
4420 	mcp->in_mb = MBX_1|MBX_0;
4421 	mcp->tov = MBX_TOV_SECONDS;
4422 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4423 	rval = qla2x00_mailbox_command(vha, mcp);
4424 
4425 	if (rval != QLA_SUCCESS)
4426 		ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4427 	else
4428 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4429 		    "Done %s.\n", __func__);
4430 
4431 	return rval;
4432 }
4433 
4434 int
4435 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4436 {
4437 	int rval;
4438 	mbx_cmd_t mc;
4439 	mbx_cmd_t *mcp = &mc;
4440 
4441 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4442 	    "Entered %s.\n", __func__);
4443 
4444 	if (!IS_FWI2_CAPABLE(vha->hw))
4445 		return QLA_FUNCTION_FAILED;
4446 
4447 	mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4448 	mcp->mb[1] = LSW(risc_addr);
4449 	mcp->mb[2] = LSW(data);
4450 	mcp->mb[3] = MSW(data);
4451 	mcp->mb[8] = MSW(risc_addr);
4452 	mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4453 	mcp->in_mb = MBX_0;
4454 	mcp->tov = 30;
4455 	mcp->flags = 0;
4456 	rval = qla2x00_mailbox_command(vha, mcp);
4457 	if (rval != QLA_SUCCESS) {
4458 		ql_dbg(ql_dbg_mbx, vha, 0x1101,
4459 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4460 	} else {
4461 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4462 		    "Done %s.\n", __func__);
4463 	}
4464 
4465 	return rval;
4466 }
4467 
4468 int
4469 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4470 {
4471 	int rval;
4472 	uint32_t stat, timer;
4473 	uint16_t mb0 = 0;
4474 	struct qla_hw_data *ha = vha->hw;
4475 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4476 
4477 	rval = QLA_SUCCESS;
4478 
4479 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4480 	    "Entered %s.\n", __func__);
4481 
4482 	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4483 
4484 	/* Write the MBC data to the registers */
4485 	WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
4486 	WRT_REG_WORD(&reg->mailbox1, mb[0]);
4487 	WRT_REG_WORD(&reg->mailbox2, mb[1]);
4488 	WRT_REG_WORD(&reg->mailbox3, mb[2]);
4489 	WRT_REG_WORD(&reg->mailbox4, mb[3]);
4490 
4491 	WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);
4492 
4493 	/* Poll for MBC interrupt */
4494 	for (timer = 6000000; timer; timer--) {
4495 		/* Check for pending interrupts. */
4496 		stat = RD_REG_DWORD(&reg->host_status);
4497 		if (stat & HSRX_RISC_INT) {
4498 			stat &= 0xff;
4499 
4500 			if (stat == 0x1 || stat == 0x2 ||
4501 			    stat == 0x10 || stat == 0x11) {
4502 				set_bit(MBX_INTERRUPT,
4503 				    &ha->mbx_cmd_flags);
4504 				mb0 = RD_REG_WORD(&reg->mailbox0);
4505 				WRT_REG_DWORD(&reg->hccr,
4506 				    HCCRX_CLR_RISC_INT);
4507 				RD_REG_DWORD(&reg->hccr);
4508 				break;
4509 			}
4510 		}
4511 		udelay(5);
4512 	}
4513 
4514 	if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4515 		rval = mb0 & MBS_MASK;
4516 	else
4517 		rval = QLA_FUNCTION_FAILED;
4518 
4519 	if (rval != QLA_SUCCESS) {
4520 		ql_dbg(ql_dbg_mbx, vha, 0x1104,
4521 		    "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4522 	} else {
4523 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4524 		    "Done %s.\n", __func__);
4525 	}
4526 
4527 	return rval;
4528 }
4529 
4530 int
4531 qla2x00_get_data_rate(scsi_qla_host_t *vha)
4532 {
4533 	int rval;
4534 	mbx_cmd_t mc;
4535 	mbx_cmd_t *mcp = &mc;
4536 	struct qla_hw_data *ha = vha->hw;
4537 
4538 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
4539 	    "Entered %s.\n", __func__);
4540 
4541 	if (!IS_FWI2_CAPABLE(ha))
4542 		return QLA_FUNCTION_FAILED;
4543 
4544 	mcp->mb[0] = MBC_DATA_RATE;
4545 	mcp->mb[1] = 0;
4546 	mcp->out_mb = MBX_1|MBX_0;
4547 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
4548 	if (IS_QLA83XX(ha))
4549 		mcp->in_mb |= MBX_3;
4550 	mcp->tov = MBX_TOV_SECONDS;
4551 	mcp->flags = 0;
4552 	rval = qla2x00_mailbox_command(vha, mcp);
4553 	if (rval != QLA_SUCCESS) {
4554 		ql_dbg(ql_dbg_mbx, vha, 0x1107,
4555 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4556 	} else {
4557 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
4558 		    "Done %s.\n", __func__);
4559 		if (mcp->mb[1] != 0x7)
4560 			ha->link_data_rate = mcp->mb[1];
4561 	}
4562 
4563 	return rval;
4564 }
4565 
4566 int
4567 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4568 {
4569 	int rval;
4570 	mbx_cmd_t mc;
4571 	mbx_cmd_t *mcp = &mc;
4572 	struct qla_hw_data *ha = vha->hw;
4573 
4574 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
4575 	    "Entered %s.\n", __func__);
4576 
4577 	if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha))
4578 		return QLA_FUNCTION_FAILED;
4579 	mcp->mb[0] = MBC_GET_PORT_CONFIG;
4580 	mcp->out_mb = MBX_0;
4581 	mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4582 	mcp->tov = MBX_TOV_SECONDS;
4583 	mcp->flags = 0;
4584 
4585 	rval = qla2x00_mailbox_command(vha, mcp);
4586 
4587 	if (rval != QLA_SUCCESS) {
4588 		ql_dbg(ql_dbg_mbx, vha, 0x110a,
4589 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4590 	} else {
4591 		/* Copy all bits to preserve original value */
4592 		memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
4593 
4594 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
4595 		    "Done %s.\n", __func__);
4596 	}
4597 	return rval;
4598 }
4599 
4600 int
4601 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4602 {
4603 	int rval;
4604 	mbx_cmd_t mc;
4605 	mbx_cmd_t *mcp = &mc;
4606 
4607 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
4608 	    "Entered %s.\n", __func__);
4609 
4610 	mcp->mb[0] = MBC_SET_PORT_CONFIG;
4611 	/* Copy all bits to preserve original setting */
4612 	memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
4613 	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4614 	mcp->in_mb = MBX_0;
4615 	mcp->tov = MBX_TOV_SECONDS;
4616 	mcp->flags = 0;
4617 	rval = qla2x00_mailbox_command(vha, mcp);
4618 
4619 	if (rval != QLA_SUCCESS) {
4620 		ql_dbg(ql_dbg_mbx, vha, 0x110d,
4621 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4622 	} else
4623 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
4624 		    "Done %s.\n", __func__);
4625 
4626 	return rval;
4627 }
4628 
4629 
4630 int
4631 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
4632 		uint16_t *mb)
4633 {
4634 	int rval;
4635 	mbx_cmd_t mc;
4636 	mbx_cmd_t *mcp = &mc;
4637 	struct qla_hw_data *ha = vha->hw;
4638 
4639 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
4640 	    "Entered %s.\n", __func__);
4641 
4642 	if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
4643 		return QLA_FUNCTION_FAILED;
4644 
4645 	mcp->mb[0] = MBC_PORT_PARAMS;
4646 	mcp->mb[1] = loop_id;
4647 	if (ha->flags.fcp_prio_enabled)
4648 		mcp->mb[2] = BIT_1;
4649 	else
4650 		mcp->mb[2] = BIT_2;
4651 	mcp->mb[4] = priority & 0xf;
4652 	mcp->mb[9] = vha->vp_idx;
4653 	mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4654 	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
4655 	mcp->tov = 30;
4656 	mcp->flags = 0;
4657 	rval = qla2x00_mailbox_command(vha, mcp);
4658 	if (mb != NULL) {
4659 		mb[0] = mcp->mb[0];
4660 		mb[1] = mcp->mb[1];
4661 		mb[3] = mcp->mb[3];
4662 		mb[4] = mcp->mb[4];
4663 	}
4664 
4665 	if (rval != QLA_SUCCESS) {
4666 		ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
4667 	} else {
4668 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
4669 		    "Done %s.\n", __func__);
4670 	}
4671 
4672 	return rval;
4673 }
4674 
4675 int
4676 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
4677 {
4678 	int rval = QLA_FUNCTION_FAILED;
4679 	struct qla_hw_data *ha = vha->hw;
4680 	uint8_t byte;
4681 
4682 	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
4683 		ql_dbg(ql_dbg_mbx, vha, 0x1150,
4684 		    "Thermal not supported by this card.\n");
4685 		return rval;
4686 	}
4687 
4688 	if (IS_QLA25XX(ha)) {
4689 		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4690 		    ha->pdev->subsystem_device == 0x0175) {
4691 			rval = qla2x00_read_sfp(vha, 0, &byte,
4692 			    0x98, 0x1, 1, BIT_13|BIT_0);
4693 			*temp = byte;
4694 			return rval;
4695 		}
4696 		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
4697 		    ha->pdev->subsystem_device == 0x338e) {
4698 			rval = qla2x00_read_sfp(vha, 0, &byte,
4699 			    0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
4700 			*temp = byte;
4701 			return rval;
4702 		}
4703 		ql_dbg(ql_dbg_mbx, vha, 0x10c9,
4704 		    "Thermal not supported by this card.\n");
4705 		return rval;
4706 	}
4707 
4708 	if (IS_QLA82XX(ha)) {
4709 		*temp = qla82xx_read_temperature(vha);
4710 		rval = QLA_SUCCESS;
4711 		return rval;
4712 	} else if (IS_QLA8044(ha)) {
4713 		*temp = qla8044_read_temperature(vha);
4714 		rval = QLA_SUCCESS;
4715 		return rval;
4716 	}
4717 
4718 	rval = qla2x00_read_asic_temperature(vha, temp);
4719 	return rval;
4720 }
4721 
4722 int
4723 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
4724 {
4725 	int rval;
4726 	struct qla_hw_data *ha = vha->hw;
4727 	mbx_cmd_t mc;
4728 	mbx_cmd_t *mcp = &mc;
4729 
4730 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
4731 	    "Entered %s.\n", __func__);
4732 
4733 	if (!IS_FWI2_CAPABLE(ha))
4734 		return QLA_FUNCTION_FAILED;
4735 
4736 	memset(mcp, 0, sizeof(mbx_cmd_t));
4737 	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4738 	mcp->mb[1] = 1;
4739 
4740 	mcp->out_mb = MBX_1|MBX_0;
4741 	mcp->in_mb = MBX_0;
4742 	mcp->tov = 30;
4743 	mcp->flags = 0;
4744 
4745 	rval = qla2x00_mailbox_command(vha, mcp);
4746 	if (rval != QLA_SUCCESS) {
4747 		ql_dbg(ql_dbg_mbx, vha, 0x1016,
4748 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4749 	} else {
4750 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
4751 		    "Done %s.\n", __func__);
4752 	}
4753 
4754 	return rval;
4755 }
4756 
4757 int
4758 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
4759 {
4760 	int rval;
4761 	struct qla_hw_data *ha = vha->hw;
4762 	mbx_cmd_t mc;
4763 	mbx_cmd_t *mcp = &mc;
4764 
4765 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
4766 	    "Entered %s.\n", __func__);
4767 
4768 	if (!IS_P3P_TYPE(ha))
4769 		return QLA_FUNCTION_FAILED;
4770 
4771 	memset(mcp, 0, sizeof(mbx_cmd_t));
4772 	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4773 	mcp->mb[1] = 0;
4774 
4775 	mcp->out_mb = MBX_1|MBX_0;
4776 	mcp->in_mb = MBX_0;
4777 	mcp->tov = 30;
4778 	mcp->flags = 0;
4779 
4780 	rval = qla2x00_mailbox_command(vha, mcp);
4781 	if (rval != QLA_SUCCESS) {
4782 		ql_dbg(ql_dbg_mbx, vha, 0x100c,
4783 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4784 	} else {
4785 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
4786 		    "Done %s.\n", __func__);
4787 	}
4788 
4789 	return rval;
4790 }
4791 
4792 int
4793 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
4794 {
4795 	struct qla_hw_data *ha = vha->hw;
4796 	mbx_cmd_t mc;
4797 	mbx_cmd_t *mcp = &mc;
4798 	int rval = QLA_FUNCTION_FAILED;
4799 
4800 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
4801 	    "Entered %s.\n", __func__);
4802 
4803 	memset(mcp->mb, 0 , sizeof(mcp->mb));
4804 	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4805 	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4806 	mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
4807 	mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
4808 
4809 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4810 	mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
4811 	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4812 
4813 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4814 	mcp->tov = MBX_TOV_SECONDS;
4815 	rval = qla2x00_mailbox_command(vha, mcp);
4816 
4817 	/* Always copy back return mailbox values. */
4818 	if (rval != QLA_SUCCESS) {
4819 		ql_dbg(ql_dbg_mbx, vha, 0x1120,
4820 		    "mailbox command FAILED=0x%x, subcode=%x.\n",
4821 		    (mcp->mb[1] << 16) | mcp->mb[0],
4822 		    (mcp->mb[3] << 16) | mcp->mb[2]);
4823 	} else {
4824 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
4825 		    "Done %s.\n", __func__);
4826 		ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
4827 		if (!ha->md_template_size) {
4828 			ql_dbg(ql_dbg_mbx, vha, 0x1122,
4829 			    "Null template size obtained.\n");
4830 			rval = QLA_FUNCTION_FAILED;
4831 		}
4832 	}
4833 	return rval;
4834 }
4835 
4836 int
4837 qla82xx_md_get_template(scsi_qla_host_t *vha)
4838 {
4839 	struct qla_hw_data *ha = vha->hw;
4840 	mbx_cmd_t mc;
4841 	mbx_cmd_t *mcp = &mc;
4842 	int rval = QLA_FUNCTION_FAILED;
4843 
4844 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
4845 	    "Entered %s.\n", __func__);
4846 
4847 	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
4848 	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
4849 	if (!ha->md_tmplt_hdr) {
4850 		ql_log(ql_log_warn, vha, 0x1124,
4851 		    "Unable to allocate memory for Minidump template.\n");
4852 		return rval;
4853 	}
4854 
4855 	memset(mcp->mb, 0 , sizeof(mcp->mb));
4856 	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4857 	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4858 	mcp->mb[2] = LSW(RQST_TMPLT);
4859 	mcp->mb[3] = MSW(RQST_TMPLT);
4860 	mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
4861 	mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
4862 	mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
4863 	mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
4864 	mcp->mb[8] = LSW(ha->md_template_size);
4865 	mcp->mb[9] = MSW(ha->md_template_size);
4866 
4867 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4868 	mcp->tov = MBX_TOV_SECONDS;
4869 	mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
4870 	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4871 	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4872 	rval = qla2x00_mailbox_command(vha, mcp);
4873 
4874 	if (rval != QLA_SUCCESS) {
4875 		ql_dbg(ql_dbg_mbx, vha, 0x1125,
4876 		    "mailbox command FAILED=0x%x, subcode=%x.\n",
4877 		    ((mcp->mb[1] << 16) | mcp->mb[0]),
4878 		    ((mcp->mb[3] << 16) | mcp->mb[2]));
4879 	} else
4880 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
4881 		    "Done %s.\n", __func__);
4882 	return rval;
4883 }
4884 
4885 int
4886 qla8044_md_get_template(scsi_qla_host_t *vha)
4887 {
4888 	struct qla_hw_data *ha = vha->hw;
4889 	mbx_cmd_t mc;
4890 	mbx_cmd_t *mcp = &mc;
4891 	int rval = QLA_FUNCTION_FAILED;
4892 	int offset = 0, size = MINIDUMP_SIZE_36K;
4893 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
4894 	    "Entered %s.\n", __func__);
4895 
4896 	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
4897 	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
4898 	if (!ha->md_tmplt_hdr) {
4899 		ql_log(ql_log_warn, vha, 0xb11b,
4900 		    "Unable to allocate memory for Minidump template.\n");
4901 		return rval;
4902 	}
4903 
4904 	memset(mcp->mb, 0 , sizeof(mcp->mb));
4905 	while (offset < ha->md_template_size) {
4906 		mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4907 		mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4908 		mcp->mb[2] = LSW(RQST_TMPLT);
4909 		mcp->mb[3] = MSW(RQST_TMPLT);
4910 		mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
4911 		mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
4912 		mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
4913 		mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
4914 		mcp->mb[8] = LSW(size);
4915 		mcp->mb[9] = MSW(size);
4916 		mcp->mb[10] = offset & 0x0000FFFF;
4917 		mcp->mb[11] = offset & 0xFFFF0000;
4918 		mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4919 		mcp->tov = MBX_TOV_SECONDS;
4920 		mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
4921 			MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4922 		mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4923 		rval = qla2x00_mailbox_command(vha, mcp);
4924 
4925 		if (rval != QLA_SUCCESS) {
4926 			ql_dbg(ql_dbg_mbx, vha, 0xb11c,
4927 				"mailbox command FAILED=0x%x, subcode=%x.\n",
4928 				((mcp->mb[1] << 16) | mcp->mb[0]),
4929 				((mcp->mb[3] << 16) | mcp->mb[2]));
4930 			return rval;
4931 		} else
4932 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
4933 				"Done %s.\n", __func__);
4934 		offset = offset + size;
4935 	}
4936 	return rval;
4937 }
4938 
4939 int
4940 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4941 {
4942 	int rval;
4943 	struct qla_hw_data *ha = vha->hw;
4944 	mbx_cmd_t mc;
4945 	mbx_cmd_t *mcp = &mc;
4946 
4947 	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4948 		return QLA_FUNCTION_FAILED;
4949 
4950 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
4951 	    "Entered %s.\n", __func__);
4952 
4953 	memset(mcp, 0, sizeof(mbx_cmd_t));
4954 	mcp->mb[0] = MBC_SET_LED_CONFIG;
4955 	mcp->mb[1] = led_cfg[0];
4956 	mcp->mb[2] = led_cfg[1];
4957 	if (IS_QLA8031(ha)) {
4958 		mcp->mb[3] = led_cfg[2];
4959 		mcp->mb[4] = led_cfg[3];
4960 		mcp->mb[5] = led_cfg[4];
4961 		mcp->mb[6] = led_cfg[5];
4962 	}
4963 
4964 	mcp->out_mb = MBX_2|MBX_1|MBX_0;
4965 	if (IS_QLA8031(ha))
4966 		mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
4967 	mcp->in_mb = MBX_0;
4968 	mcp->tov = 30;
4969 	mcp->flags = 0;
4970 
4971 	rval = qla2x00_mailbox_command(vha, mcp);
4972 	if (rval != QLA_SUCCESS) {
4973 		ql_dbg(ql_dbg_mbx, vha, 0x1134,
4974 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4975 	} else {
4976 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
4977 		    "Done %s.\n", __func__);
4978 	}
4979 
4980 	return rval;
4981 }
4982 
4983 int
4984 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4985 {
4986 	int rval;
4987 	struct qla_hw_data *ha = vha->hw;
4988 	mbx_cmd_t mc;
4989 	mbx_cmd_t *mcp = &mc;
4990 
4991 	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4992 		return QLA_FUNCTION_FAILED;
4993 
4994 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
4995 	    "Entered %s.\n", __func__);
4996 
4997 	memset(mcp, 0, sizeof(mbx_cmd_t));
4998 	mcp->mb[0] = MBC_GET_LED_CONFIG;
4999 
5000 	mcp->out_mb = MBX_0;
5001 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
5002 	if (IS_QLA8031(ha))
5003 		mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5004 	mcp->tov = 30;
5005 	mcp->flags = 0;
5006 
5007 	rval = qla2x00_mailbox_command(vha, mcp);
5008 	if (rval != QLA_SUCCESS) {
5009 		ql_dbg(ql_dbg_mbx, vha, 0x1137,
5010 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5011 	} else {
5012 		led_cfg[0] = mcp->mb[1];
5013 		led_cfg[1] = mcp->mb[2];
5014 		if (IS_QLA8031(ha)) {
5015 			led_cfg[2] = mcp->mb[3];
5016 			led_cfg[3] = mcp->mb[4];
5017 			led_cfg[4] = mcp->mb[5];
5018 			led_cfg[5] = mcp->mb[6];
5019 		}
5020 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
5021 		    "Done %s.\n", __func__);
5022 	}
5023 
5024 	return rval;
5025 }
5026 
5027 int
5028 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
5029 {
5030 	int rval;
5031 	struct qla_hw_data *ha = vha->hw;
5032 	mbx_cmd_t mc;
5033 	mbx_cmd_t *mcp = &mc;
5034 
5035 	if (!IS_P3P_TYPE(ha))
5036 		return QLA_FUNCTION_FAILED;
5037 
5038 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5039 		"Entered %s.\n", __func__);
5040 
5041 	memset(mcp, 0, sizeof(mbx_cmd_t));
5042 	mcp->mb[0] = MBC_SET_LED_CONFIG;
5043 	if (enable)
5044 		mcp->mb[7] = 0xE;
5045 	else
5046 		mcp->mb[7] = 0xD;
5047 
5048 	mcp->out_mb = MBX_7|MBX_0;
5049 	mcp->in_mb = MBX_0;
5050 	mcp->tov = MBX_TOV_SECONDS;
5051 	mcp->flags = 0;
5052 
5053 	rval = qla2x00_mailbox_command(vha, mcp);
5054 	if (rval != QLA_SUCCESS) {
5055 		ql_dbg(ql_dbg_mbx, vha, 0x1128,
5056 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5057 	} else {
5058 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5059 		    "Done %s.\n", __func__);
5060 	}
5061 
5062 	return rval;
5063 }
5064 
5065 int
5066 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5067 {
5068 	int rval;
5069 	struct qla_hw_data *ha = vha->hw;
5070 	mbx_cmd_t mc;
5071 	mbx_cmd_t *mcp = &mc;
5072 
5073 	if (!IS_QLA83XX(ha))
5074 		return QLA_FUNCTION_FAILED;
5075 
5076 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
5077 	    "Entered %s.\n", __func__);
5078 
5079 	mcp->mb[0] = MBC_WRITE_REMOTE_REG;
5080 	mcp->mb[1] = LSW(reg);
5081 	mcp->mb[2] = MSW(reg);
5082 	mcp->mb[3] = LSW(data);
5083 	mcp->mb[4] = MSW(data);
5084 	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5085 
5086 	mcp->in_mb = MBX_1|MBX_0;
5087 	mcp->tov = MBX_TOV_SECONDS;
5088 	mcp->flags = 0;
5089 	rval = qla2x00_mailbox_command(vha, mcp);
5090 
5091 	if (rval != QLA_SUCCESS) {
5092 		ql_dbg(ql_dbg_mbx, vha, 0x1131,
5093 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5094 	} else {
5095 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5096 		    "Done %s.\n", __func__);
5097 	}
5098 
5099 	return rval;
5100 }
5101 
5102 int
5103 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
5104 {
5105 	int rval;
5106 	struct qla_hw_data *ha = vha->hw;
5107 	mbx_cmd_t mc;
5108 	mbx_cmd_t *mcp = &mc;
5109 
5110 	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5111 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5112 		    "Implicit LOGO Unsupported.\n");
5113 		return QLA_FUNCTION_FAILED;
5114 	}
5115 
5116 
5117 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
5118 	    "Entering %s.\n",  __func__);
5119 
5120 	/* Perform Implicit LOGO. */
5121 	mcp->mb[0] = MBC_PORT_LOGOUT;
5122 	mcp->mb[1] = fcport->loop_id;
5123 	mcp->mb[10] = BIT_15;
5124 	mcp->out_mb = MBX_10|MBX_1|MBX_0;
5125 	mcp->in_mb = MBX_0;
5126 	mcp->tov = MBX_TOV_SECONDS;
5127 	mcp->flags = 0;
5128 	rval = qla2x00_mailbox_command(vha, mcp);
5129 	if (rval != QLA_SUCCESS)
5130 		ql_dbg(ql_dbg_mbx, vha, 0x113d,
5131 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5132 	else
5133 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
5134 		    "Done %s.\n", __func__);
5135 
5136 	return rval;
5137 }
5138 
5139 int
5140 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
5141 {
5142 	int rval;
5143 	mbx_cmd_t mc;
5144 	mbx_cmd_t *mcp = &mc;
5145 	struct qla_hw_data *ha = vha->hw;
5146 	unsigned long retry_max_time = jiffies + (2 * HZ);
5147 
5148 	if (!IS_QLA83XX(ha))
5149 		return QLA_FUNCTION_FAILED;
5150 
5151 	ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
5152 
5153 retry_rd_reg:
5154 	mcp->mb[0] = MBC_READ_REMOTE_REG;
5155 	mcp->mb[1] = LSW(reg);
5156 	mcp->mb[2] = MSW(reg);
5157 	mcp->out_mb = MBX_2|MBX_1|MBX_0;
5158 	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5159 	mcp->tov = MBX_TOV_SECONDS;
5160 	mcp->flags = 0;
5161 	rval = qla2x00_mailbox_command(vha, mcp);
5162 
5163 	if (rval != QLA_SUCCESS) {
5164 		ql_dbg(ql_dbg_mbx, vha, 0x114c,
5165 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
5166 		    rval, mcp->mb[0], mcp->mb[1]);
5167 	} else {
5168 		*data = (mcp->mb[3] | (mcp->mb[4] << 16));
5169 		if (*data == QLA8XXX_BAD_VALUE) {
5170 			/*
5171 			 * During soft-reset CAMRAM register reads might
5172 			 * return 0xbad0bad0. So retry for MAX of 2 sec
5173 			 * while reading camram registers.
5174 			 */
5175 			if (time_after(jiffies, retry_max_time)) {
5176 				ql_dbg(ql_dbg_mbx, vha, 0x1141,
5177 				    "Failure to read CAMRAM register. "
5178 				    "data=0x%x.\n", *data);
5179 				return QLA_FUNCTION_FAILED;
5180 			}
5181 			msleep(100);
5182 			goto retry_rd_reg;
5183 		}
5184 		ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
5185 	}
5186 
5187 	return rval;
5188 }
5189 
5190 int
5191 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
5192 {
5193 	int rval;
5194 	mbx_cmd_t mc;
5195 	mbx_cmd_t *mcp = &mc;
5196 	struct qla_hw_data *ha = vha->hw;
5197 
5198 	if (!IS_QLA83XX(ha))
5199 		return QLA_FUNCTION_FAILED;
5200 
5201 	ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
5202 
5203 	mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
5204 	mcp->out_mb = MBX_0;
5205 	mcp->in_mb = MBX_1|MBX_0;
5206 	mcp->tov = MBX_TOV_SECONDS;
5207 	mcp->flags = 0;
5208 	rval = qla2x00_mailbox_command(vha, mcp);
5209 
5210 	if (rval != QLA_SUCCESS) {
5211 		ql_dbg(ql_dbg_mbx, vha, 0x1144,
5212 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
5213 		    rval, mcp->mb[0], mcp->mb[1]);
5214 		ha->isp_ops->fw_dump(vha, 0);
5215 	} else {
5216 		ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
5217 	}
5218 
5219 	return rval;
5220 }
5221 
5222 int
5223 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
5224 	uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
5225 {
5226 	int rval;
5227 	mbx_cmd_t mc;
5228 	mbx_cmd_t *mcp = &mc;
5229 	uint8_t subcode = (uint8_t)options;
5230 	struct qla_hw_data *ha = vha->hw;
5231 
5232 	if (!IS_QLA8031(ha))
5233 		return QLA_FUNCTION_FAILED;
5234 
5235 	ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5236 
5237 	mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5238 	mcp->mb[1] = options;
5239 	mcp->out_mb = MBX_1|MBX_0;
5240 	if (subcode & BIT_2) {
5241 		mcp->mb[2] = LSW(start_addr);
5242 		mcp->mb[3] = MSW(start_addr);
5243 		mcp->mb[4] = LSW(end_addr);
5244 		mcp->mb[5] = MSW(end_addr);
5245 		mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5246 	}
5247 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
5248 	if (!(subcode & (BIT_2 | BIT_5)))
5249 		mcp->in_mb |= MBX_4|MBX_3;
5250 	mcp->tov = MBX_TOV_SECONDS;
5251 	mcp->flags = 0;
5252 	rval = qla2x00_mailbox_command(vha, mcp);
5253 
5254 	if (rval != QLA_SUCCESS) {
5255 		ql_dbg(ql_dbg_mbx, vha, 0x1147,
5256 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5257 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5258 		    mcp->mb[4]);
5259 		ha->isp_ops->fw_dump(vha, 0);
5260 	} else {
5261 		if (subcode & BIT_5)
5262 			*sector_size = mcp->mb[1];
5263 		else if (subcode & (BIT_6 | BIT_7)) {
5264 			ql_dbg(ql_dbg_mbx, vha, 0x1148,
5265 			    "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5266 		} else if (subcode & (BIT_3 | BIT_4)) {
5267 			ql_dbg(ql_dbg_mbx, vha, 0x1149,
5268 			    "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5269 		}
5270 		ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5271 	}
5272 
5273 	return rval;
5274 }
5275 
5276 int
5277 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5278 	uint32_t size)
5279 {
5280 	int rval;
5281 	mbx_cmd_t mc;
5282 	mbx_cmd_t *mcp = &mc;
5283 
5284 	if (!IS_MCTP_CAPABLE(vha->hw))
5285 		return QLA_FUNCTION_FAILED;
5286 
5287 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5288 	    "Entered %s.\n", __func__);
5289 
5290 	mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5291 	mcp->mb[1] = LSW(addr);
5292 	mcp->mb[2] = MSW(req_dma);
5293 	mcp->mb[3] = LSW(req_dma);
5294 	mcp->mb[4] = MSW(size);
5295 	mcp->mb[5] = LSW(size);
5296 	mcp->mb[6] = MSW(MSD(req_dma));
5297 	mcp->mb[7] = LSW(MSD(req_dma));
5298 	mcp->mb[8] = MSW(addr);
5299 	/* Setting RAM ID to valid */
5300 	mcp->mb[10] |= BIT_7;
5301 	/* For MCTP RAM ID is 0x40 */
5302 	mcp->mb[10] |= 0x40;
5303 
5304 	mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5305 	    MBX_0;
5306 
5307 	mcp->in_mb = MBX_0;
5308 	mcp->tov = MBX_TOV_SECONDS;
5309 	mcp->flags = 0;
5310 	rval = qla2x00_mailbox_command(vha, mcp);
5311 
5312 	if (rval != QLA_SUCCESS) {
5313 		ql_dbg(ql_dbg_mbx, vha, 0x114e,
5314 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5315 	} else {
5316 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
5317 		    "Done %s.\n", __func__);
5318 	}
5319 
5320 	return rval;
5321 }
5322