xref: /openbmc/linux/drivers/scsi/qla2xxx/qla_mbx.c (revision 6774def6)
1 /*
2  * QLogic Fibre Channel HBA Driver
3  * Copyright (c)  2003-2014 QLogic Corporation
4  *
5  * See LICENSE.qla2xxx for copyright and licensing details.
6  */
7 #include "qla_def.h"
8 #include "qla_target.h"
9 
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
12 
13 
14 /*
15  * qla2x00_mailbox_command
16  *	Issue mailbox command and waits for completion.
17  *
18  * Input:
19  *	ha = adapter block pointer.
20  *	mcp = driver internal mbx struct pointer.
21  *
22  * Output:
23  *	mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
24  *
25  * Returns:
26  *	0 : QLA_SUCCESS = cmd performed success
27  *	1 : QLA_FUNCTION_FAILED   (error encountered)
28  *	6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
29  *
30  * Context:
31  *	Kernel context.
32  */
33 static int
34 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
35 {
36 	int		rval;
37 	unsigned long    flags = 0;
38 	device_reg_t *reg;
39 	uint8_t		abort_active;
40 	uint8_t		io_lock_on;
41 	uint16_t	command = 0;
42 	uint16_t	*iptr;
43 	uint16_t __iomem *optr;
44 	uint32_t	cnt;
45 	uint32_t	mboxes;
46 	unsigned long	wait_time;
47 	struct qla_hw_data *ha = vha->hw;
48 	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
49 
50 	ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
51 
52 	if (ha->pdev->error_state > pci_channel_io_frozen) {
53 		ql_log(ql_log_warn, vha, 0x1001,
54 		    "error_state is greater than pci_channel_io_frozen, "
55 		    "exiting.\n");
56 		return QLA_FUNCTION_TIMEOUT;
57 	}
58 
59 	if (vha->device_flags & DFLG_DEV_FAILED) {
60 		ql_log(ql_log_warn, vha, 0x1002,
61 		    "Device in failed state, exiting.\n");
62 		return QLA_FUNCTION_TIMEOUT;
63 	}
64 
65 	reg = ha->iobase;
66 	io_lock_on = base_vha->flags.init_done;
67 
68 	rval = QLA_SUCCESS;
69 	abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
70 
71 
72 	if (ha->flags.pci_channel_io_perm_failure) {
73 		ql_log(ql_log_warn, vha, 0x1003,
74 		    "Perm failure on EEH timeout MBX, exiting.\n");
75 		return QLA_FUNCTION_TIMEOUT;
76 	}
77 
78 	if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
79 		/* Setting Link-Down error */
80 		mcp->mb[0] = MBS_LINK_DOWN_ERROR;
81 		ql_log(ql_log_warn, vha, 0x1004,
82 		    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
83 		return QLA_FUNCTION_TIMEOUT;
84 	}
85 
86 	/*
87 	 * Wait for active mailbox commands to finish by waiting at most tov
88 	 * seconds. This is to serialize actual issuing of mailbox cmds during
89 	 * non ISP abort time.
90 	 */
91 	if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
92 		/* Timeout occurred. Return error. */
93 		ql_log(ql_log_warn, vha, 0x1005,
94 		    "Cmd access timeout, cmd=0x%x, Exiting.\n",
95 		    mcp->mb[0]);
96 		return QLA_FUNCTION_TIMEOUT;
97 	}
98 
99 	ha->flags.mbox_busy = 1;
100 	/* Save mailbox command for debug */
101 	ha->mcp = mcp;
102 
103 	ql_dbg(ql_dbg_mbx, vha, 0x1006,
104 	    "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
105 
106 	spin_lock_irqsave(&ha->hardware_lock, flags);
107 
108 	/* Load mailbox registers. */
109 	if (IS_P3P_TYPE(ha))
110 		optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
111 	else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
112 		optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
113 	else
114 		optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
115 
116 	iptr = mcp->mb;
117 	command = mcp->mb[0];
118 	mboxes = mcp->out_mb;
119 
120 	ql_dbg(ql_dbg_mbx, vha, 0x1111,
121 	    "Mailbox registers (OUT):\n");
122 	for (cnt = 0; cnt < ha->mbx_count; cnt++) {
123 		if (IS_QLA2200(ha) && cnt == 8)
124 			optr =
125 			    (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
126 		if (mboxes & BIT_0) {
127 			ql_dbg(ql_dbg_mbx, vha, 0x1112,
128 			    "mbox[%d]<-0x%04x\n", cnt, *iptr);
129 			WRT_REG_WORD(optr, *iptr);
130 		}
131 
132 		mboxes >>= 1;
133 		optr++;
134 		iptr++;
135 	}
136 
137 	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
138 	    "I/O Address = %p.\n", optr);
139 
140 	/* Issue set host interrupt command to send cmd out. */
141 	ha->flags.mbox_int = 0;
142 	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
143 
144 	/* Unlock mbx registers and wait for interrupt */
145 	ql_dbg(ql_dbg_mbx, vha, 0x100f,
146 	    "Going to unlock irq & waiting for interrupts. "
147 	    "jiffies=%lx.\n", jiffies);
148 
149 	/* Wait for mbx cmd completion until timeout */
150 
151 	if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
152 		set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
153 
154 		if (IS_P3P_TYPE(ha)) {
155 			if (RD_REG_DWORD(&reg->isp82.hint) &
156 				HINT_MBX_INT_PENDING) {
157 				spin_unlock_irqrestore(&ha->hardware_lock,
158 					flags);
159 				ha->flags.mbox_busy = 0;
160 				ql_dbg(ql_dbg_mbx, vha, 0x1010,
161 				    "Pending mailbox timeout, exiting.\n");
162 				rval = QLA_FUNCTION_TIMEOUT;
163 				goto premature_exit;
164 			}
165 			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
166 		} else if (IS_FWI2_CAPABLE(ha))
167 			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
168 		else
169 			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
170 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
171 
172 		if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
173 		    mcp->tov * HZ)) {
174 			ql_dbg(ql_dbg_mbx, vha, 0x117a,
175 			    "cmd=%x Timeout.\n", command);
176 			spin_lock_irqsave(&ha->hardware_lock, flags);
177 			clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
178 			spin_unlock_irqrestore(&ha->hardware_lock, flags);
179 		}
180 	} else {
181 		ql_dbg(ql_dbg_mbx, vha, 0x1011,
182 		    "Cmd=%x Polling Mode.\n", command);
183 
184 		if (IS_P3P_TYPE(ha)) {
185 			if (RD_REG_DWORD(&reg->isp82.hint) &
186 				HINT_MBX_INT_PENDING) {
187 				spin_unlock_irqrestore(&ha->hardware_lock,
188 					flags);
189 				ha->flags.mbox_busy = 0;
190 				ql_dbg(ql_dbg_mbx, vha, 0x1012,
191 				    "Pending mailbox timeout, exiting.\n");
192 				rval = QLA_FUNCTION_TIMEOUT;
193 				goto premature_exit;
194 			}
195 			WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
196 		} else if (IS_FWI2_CAPABLE(ha))
197 			WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
198 		else
199 			WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
200 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
201 
202 		wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
203 		while (!ha->flags.mbox_int) {
204 			if (time_after(jiffies, wait_time))
205 				break;
206 
207 			/* Check for pending interrupts. */
208 			qla2x00_poll(ha->rsp_q_map[0]);
209 
210 			if (!ha->flags.mbox_int &&
211 			    !(IS_QLA2200(ha) &&
212 			    command == MBC_LOAD_RISC_RAM_EXTENDED))
213 				msleep(10);
214 		} /* while */
215 		ql_dbg(ql_dbg_mbx, vha, 0x1013,
216 		    "Waited %d sec.\n",
217 		    (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
218 	}
219 
220 	/* Check whether we timed out */
221 	if (ha->flags.mbox_int) {
222 		uint16_t *iptr2;
223 
224 		ql_dbg(ql_dbg_mbx, vha, 0x1014,
225 		    "Cmd=%x completed.\n", command);
226 
227 		/* Got interrupt. Clear the flag. */
228 		ha->flags.mbox_int = 0;
229 		clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
230 
231 		if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
232 			ha->flags.mbox_busy = 0;
233 			/* Setting Link-Down error */
234 			mcp->mb[0] = MBS_LINK_DOWN_ERROR;
235 			ha->mcp = NULL;
236 			rval = QLA_FUNCTION_FAILED;
237 			ql_log(ql_log_warn, vha, 0x1015,
238 			    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
239 			goto premature_exit;
240 		}
241 
242 		if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
243 			rval = QLA_FUNCTION_FAILED;
244 
245 		/* Load return mailbox registers. */
246 		iptr2 = mcp->mb;
247 		iptr = (uint16_t *)&ha->mailbox_out[0];
248 		mboxes = mcp->in_mb;
249 
250 		ql_dbg(ql_dbg_mbx, vha, 0x1113,
251 		    "Mailbox registers (IN):\n");
252 		for (cnt = 0; cnt < ha->mbx_count; cnt++) {
253 			if (mboxes & BIT_0) {
254 				*iptr2 = *iptr;
255 				ql_dbg(ql_dbg_mbx, vha, 0x1114,
256 				    "mbox[%d]->0x%04x\n", cnt, *iptr2);
257 			}
258 
259 			mboxes >>= 1;
260 			iptr2++;
261 			iptr++;
262 		}
263 	} else {
264 
265 		uint16_t mb0;
266 		uint32_t ictrl;
267 
268 		if (IS_FWI2_CAPABLE(ha)) {
269 			mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
270 			ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
271 		} else {
272 			mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
273 			ictrl = RD_REG_WORD(&reg->isp.ictrl);
274 		}
275 		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
276 		    "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
277 		    "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
278 		ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
279 
280 		/*
281 		 * Attempt to capture a firmware dump for further analysis
282 		 * of the current firmware state.  We do not need to do this
283 		 * if we are intentionally generating a dump.
284 		 */
285 		if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
286 			ha->isp_ops->fw_dump(vha, 0);
287 
288 		rval = QLA_FUNCTION_TIMEOUT;
289 	}
290 
291 	ha->flags.mbox_busy = 0;
292 
293 	/* Clean up */
294 	ha->mcp = NULL;
295 
296 	if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
297 		ql_dbg(ql_dbg_mbx, vha, 0x101a,
298 		    "Checking for additional resp interrupt.\n");
299 
300 		/* polling mode for non isp_abort commands. */
301 		qla2x00_poll(ha->rsp_q_map[0]);
302 	}
303 
304 	if (rval == QLA_FUNCTION_TIMEOUT &&
305 	    mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
306 		if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
307 		    ha->flags.eeh_busy) {
308 			/* not in dpc. schedule it for dpc to take over. */
309 			ql_dbg(ql_dbg_mbx, vha, 0x101b,
310 			    "Timeout, schedule isp_abort_needed.\n");
311 
312 			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
313 			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
314 			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
315 				if (IS_QLA82XX(ha)) {
316 					ql_dbg(ql_dbg_mbx, vha, 0x112a,
317 					    "disabling pause transmit on port "
318 					    "0 & 1.\n");
319 					qla82xx_wr_32(ha,
320 					    QLA82XX_CRB_NIU + 0x98,
321 					    CRB_NIU_XG_PAUSE_CTL_P0|
322 					    CRB_NIU_XG_PAUSE_CTL_P1);
323 				}
324 				ql_log(ql_log_info, base_vha, 0x101c,
325 				    "Mailbox cmd timeout occurred, cmd=0x%x, "
326 				    "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
327 				    "abort.\n", command, mcp->mb[0],
328 				    ha->flags.eeh_busy);
329 				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
330 				qla2xxx_wake_dpc(vha);
331 			}
332 		} else if (!abort_active) {
333 			/* call abort directly since we are in the DPC thread */
334 			ql_dbg(ql_dbg_mbx, vha, 0x101d,
335 			    "Timeout, calling abort_isp.\n");
336 
337 			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
338 			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
339 			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
340 				if (IS_QLA82XX(ha)) {
341 					ql_dbg(ql_dbg_mbx, vha, 0x112b,
342 					    "disabling pause transmit on port "
343 					    "0 & 1.\n");
344 					qla82xx_wr_32(ha,
345 					    QLA82XX_CRB_NIU + 0x98,
346 					    CRB_NIU_XG_PAUSE_CTL_P0|
347 					    CRB_NIU_XG_PAUSE_CTL_P1);
348 				}
349 				ql_log(ql_log_info, base_vha, 0x101e,
350 				    "Mailbox cmd timeout occurred, cmd=0x%x, "
351 				    "mb[0]=0x%x. Scheduling ISP abort ",
352 				    command, mcp->mb[0]);
353 				set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
354 				clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
355 				/* Allow next mbx cmd to come in. */
356 				complete(&ha->mbx_cmd_comp);
357 				if (ha->isp_ops->abort_isp(vha)) {
358 					/* Failed. retry later. */
359 					set_bit(ISP_ABORT_NEEDED,
360 					    &vha->dpc_flags);
361 				}
362 				clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
363 				ql_dbg(ql_dbg_mbx, vha, 0x101f,
364 				    "Finished abort_isp.\n");
365 				goto mbx_done;
366 			}
367 		}
368 	}
369 
370 premature_exit:
371 	/* Allow next mbx cmd to come in. */
372 	complete(&ha->mbx_cmd_comp);
373 
374 mbx_done:
375 	if (rval) {
376 		ql_dbg(ql_dbg_disc, base_vha, 0x1020,
377 		    "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
378 		    mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
379 	} else {
380 		ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
381 	}
382 
383 	return rval;
384 }
385 
386 int
387 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
388     uint32_t risc_code_size)
389 {
390 	int rval;
391 	struct qla_hw_data *ha = vha->hw;
392 	mbx_cmd_t mc;
393 	mbx_cmd_t *mcp = &mc;
394 
395 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
396 	    "Entered %s.\n", __func__);
397 
398 	if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
399 		mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
400 		mcp->mb[8] = MSW(risc_addr);
401 		mcp->out_mb = MBX_8|MBX_0;
402 	} else {
403 		mcp->mb[0] = MBC_LOAD_RISC_RAM;
404 		mcp->out_mb = MBX_0;
405 	}
406 	mcp->mb[1] = LSW(risc_addr);
407 	mcp->mb[2] = MSW(req_dma);
408 	mcp->mb[3] = LSW(req_dma);
409 	mcp->mb[6] = MSW(MSD(req_dma));
410 	mcp->mb[7] = LSW(MSD(req_dma));
411 	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
412 	if (IS_FWI2_CAPABLE(ha)) {
413 		mcp->mb[4] = MSW(risc_code_size);
414 		mcp->mb[5] = LSW(risc_code_size);
415 		mcp->out_mb |= MBX_5|MBX_4;
416 	} else {
417 		mcp->mb[4] = LSW(risc_code_size);
418 		mcp->out_mb |= MBX_4;
419 	}
420 
421 	mcp->in_mb = MBX_0;
422 	mcp->tov = MBX_TOV_SECONDS;
423 	mcp->flags = 0;
424 	rval = qla2x00_mailbox_command(vha, mcp);
425 
426 	if (rval != QLA_SUCCESS) {
427 		ql_dbg(ql_dbg_mbx, vha, 0x1023,
428 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
429 	} else {
430 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
431 		    "Done %s.\n", __func__);
432 	}
433 
434 	return rval;
435 }
436 
437 #define	EXTENDED_BB_CREDITS	BIT_0
438 /*
439  * qla2x00_execute_fw
440  *     Start adapter firmware.
441  *
442  * Input:
443  *     ha = adapter block pointer.
444  *     TARGET_QUEUE_LOCK must be released.
445  *     ADAPTER_STATE_LOCK must be released.
446  *
447  * Returns:
448  *     qla2x00 local function return status code.
449  *
450  * Context:
451  *     Kernel context.
452  */
453 int
454 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
455 {
456 	int rval;
457 	struct qla_hw_data *ha = vha->hw;
458 	mbx_cmd_t mc;
459 	mbx_cmd_t *mcp = &mc;
460 
461 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
462 	    "Entered %s.\n", __func__);
463 
464 	mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
465 	mcp->out_mb = MBX_0;
466 	mcp->in_mb = MBX_0;
467 	if (IS_FWI2_CAPABLE(ha)) {
468 		mcp->mb[1] = MSW(risc_addr);
469 		mcp->mb[2] = LSW(risc_addr);
470 		mcp->mb[3] = 0;
471 		if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
472 		    IS_QLA27XX(ha)) {
473 			struct nvram_81xx *nv = ha->nvram;
474 			mcp->mb[4] = (nv->enhanced_features &
475 			    EXTENDED_BB_CREDITS);
476 		} else
477 			mcp->mb[4] = 0;
478 		mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
479 		mcp->in_mb |= MBX_1;
480 	} else {
481 		mcp->mb[1] = LSW(risc_addr);
482 		mcp->out_mb |= MBX_1;
483 		if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
484 			mcp->mb[2] = 0;
485 			mcp->out_mb |= MBX_2;
486 		}
487 	}
488 
489 	mcp->tov = MBX_TOV_SECONDS;
490 	mcp->flags = 0;
491 	rval = qla2x00_mailbox_command(vha, mcp);
492 
493 	if (rval != QLA_SUCCESS) {
494 		ql_dbg(ql_dbg_mbx, vha, 0x1026,
495 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
496 	} else {
497 		if (IS_FWI2_CAPABLE(ha)) {
498 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
499 			    "Done exchanges=%x.\n", mcp->mb[1]);
500 		} else {
501 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
502 			    "Done %s.\n", __func__);
503 		}
504 	}
505 
506 	return rval;
507 }
508 
509 /*
510  * qla2x00_get_fw_version
511  *	Get firmware version.
512  *
513  * Input:
514  *	ha:		adapter state pointer.
515  *	major:		pointer for major number.
516  *	minor:		pointer for minor number.
517  *	subminor:	pointer for subminor number.
518  *
519  * Returns:
520  *	qla2x00 local function return status code.
521  *
522  * Context:
523  *	Kernel context.
524  */
525 int
526 qla2x00_get_fw_version(scsi_qla_host_t *vha)
527 {
528 	int		rval;
529 	mbx_cmd_t	mc;
530 	mbx_cmd_t	*mcp = &mc;
531 	struct qla_hw_data *ha = vha->hw;
532 
533 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
534 	    "Entered %s.\n", __func__);
535 
536 	mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
537 	mcp->out_mb = MBX_0;
538 	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
539 	if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
540 		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
541 	if (IS_FWI2_CAPABLE(ha))
542 		mcp->in_mb |= MBX_17|MBX_16|MBX_15;
543 	if (IS_QLA27XX(ha))
544 		mcp->in_mb |= MBX_21|MBX_20|MBX_19|MBX_18;
545 	mcp->flags = 0;
546 	mcp->tov = MBX_TOV_SECONDS;
547 	rval = qla2x00_mailbox_command(vha, mcp);
548 	if (rval != QLA_SUCCESS)
549 		goto failed;
550 
551 	/* Return mailbox data. */
552 	ha->fw_major_version = mcp->mb[1];
553 	ha->fw_minor_version = mcp->mb[2];
554 	ha->fw_subminor_version = mcp->mb[3];
555 	ha->fw_attributes = mcp->mb[6];
556 	if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
557 		ha->fw_memory_size = 0x1FFFF;		/* Defaults to 128KB. */
558 	else
559 		ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
560 	if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
561 		ha->mpi_version[0] = mcp->mb[10] & 0xff;
562 		ha->mpi_version[1] = mcp->mb[11] >> 8;
563 		ha->mpi_version[2] = mcp->mb[11] & 0xff;
564 		ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
565 		ha->phy_version[0] = mcp->mb[8] & 0xff;
566 		ha->phy_version[1] = mcp->mb[9] >> 8;
567 		ha->phy_version[2] = mcp->mb[9] & 0xff;
568 	}
569 	if (IS_FWI2_CAPABLE(ha)) {
570 		ha->fw_attributes_h = mcp->mb[15];
571 		ha->fw_attributes_ext[0] = mcp->mb[16];
572 		ha->fw_attributes_ext[1] = mcp->mb[17];
573 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
574 		    "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
575 		    __func__, mcp->mb[15], mcp->mb[6]);
576 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
577 		    "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
578 		    __func__, mcp->mb[17], mcp->mb[16]);
579 	}
580 	if (IS_QLA27XX(ha)) {
581 		ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
582 		ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
583 	}
584 
585 failed:
586 	if (rval != QLA_SUCCESS) {
587 		/*EMPTY*/
588 		ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
589 	} else {
590 		/*EMPTY*/
591 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
592 		    "Done %s.\n", __func__);
593 	}
594 	return rval;
595 }
596 
597 /*
598  * qla2x00_get_fw_options
599  *	Set firmware options.
600  *
601  * Input:
602  *	ha = adapter block pointer.
603  *	fwopt = pointer for firmware options.
604  *
605  * Returns:
606  *	qla2x00 local function return status code.
607  *
608  * Context:
609  *	Kernel context.
610  */
611 int
612 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
613 {
614 	int rval;
615 	mbx_cmd_t mc;
616 	mbx_cmd_t *mcp = &mc;
617 
618 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
619 	    "Entered %s.\n", __func__);
620 
621 	mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
622 	mcp->out_mb = MBX_0;
623 	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
624 	mcp->tov = MBX_TOV_SECONDS;
625 	mcp->flags = 0;
626 	rval = qla2x00_mailbox_command(vha, mcp);
627 
628 	if (rval != QLA_SUCCESS) {
629 		/*EMPTY*/
630 		ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
631 	} else {
632 		fwopts[0] = mcp->mb[0];
633 		fwopts[1] = mcp->mb[1];
634 		fwopts[2] = mcp->mb[2];
635 		fwopts[3] = mcp->mb[3];
636 
637 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
638 		    "Done %s.\n", __func__);
639 	}
640 
641 	return rval;
642 }
643 
644 
645 /*
646  * qla2x00_set_fw_options
647  *	Set firmware options.
648  *
649  * Input:
650  *	ha = adapter block pointer.
651  *	fwopt = pointer for firmware options.
652  *
653  * Returns:
654  *	qla2x00 local function return status code.
655  *
656  * Context:
657  *	Kernel context.
658  */
659 int
660 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
661 {
662 	int rval;
663 	mbx_cmd_t mc;
664 	mbx_cmd_t *mcp = &mc;
665 
666 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
667 	    "Entered %s.\n", __func__);
668 
669 	mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
670 	mcp->mb[1] = fwopts[1];
671 	mcp->mb[2] = fwopts[2];
672 	mcp->mb[3] = fwopts[3];
673 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
674 	mcp->in_mb = MBX_0;
675 	if (IS_FWI2_CAPABLE(vha->hw)) {
676 		mcp->in_mb |= MBX_1;
677 	} else {
678 		mcp->mb[10] = fwopts[10];
679 		mcp->mb[11] = fwopts[11];
680 		mcp->mb[12] = 0;	/* Undocumented, but used */
681 		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
682 	}
683 	mcp->tov = MBX_TOV_SECONDS;
684 	mcp->flags = 0;
685 	rval = qla2x00_mailbox_command(vha, mcp);
686 
687 	fwopts[0] = mcp->mb[0];
688 
689 	if (rval != QLA_SUCCESS) {
690 		/*EMPTY*/
691 		ql_dbg(ql_dbg_mbx, vha, 0x1030,
692 		    "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
693 	} else {
694 		/*EMPTY*/
695 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
696 		    "Done %s.\n", __func__);
697 	}
698 
699 	return rval;
700 }
701 
702 /*
703  * qla2x00_mbx_reg_test
704  *	Mailbox register wrap test.
705  *
706  * Input:
707  *	ha = adapter block pointer.
708  *	TARGET_QUEUE_LOCK must be released.
709  *	ADAPTER_STATE_LOCK must be released.
710  *
711  * Returns:
712  *	qla2x00 local function return status code.
713  *
714  * Context:
715  *	Kernel context.
716  */
717 int
718 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
719 {
720 	int rval;
721 	mbx_cmd_t mc;
722 	mbx_cmd_t *mcp = &mc;
723 
724 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
725 	    "Entered %s.\n", __func__);
726 
727 	mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
728 	mcp->mb[1] = 0xAAAA;
729 	mcp->mb[2] = 0x5555;
730 	mcp->mb[3] = 0xAA55;
731 	mcp->mb[4] = 0x55AA;
732 	mcp->mb[5] = 0xA5A5;
733 	mcp->mb[6] = 0x5A5A;
734 	mcp->mb[7] = 0x2525;
735 	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
736 	mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
737 	mcp->tov = MBX_TOV_SECONDS;
738 	mcp->flags = 0;
739 	rval = qla2x00_mailbox_command(vha, mcp);
740 
741 	if (rval == QLA_SUCCESS) {
742 		if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
743 		    mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
744 			rval = QLA_FUNCTION_FAILED;
745 		if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
746 		    mcp->mb[7] != 0x2525)
747 			rval = QLA_FUNCTION_FAILED;
748 	}
749 
750 	if (rval != QLA_SUCCESS) {
751 		/*EMPTY*/
752 		ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
753 	} else {
754 		/*EMPTY*/
755 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
756 		    "Done %s.\n", __func__);
757 	}
758 
759 	return rval;
760 }
761 
762 /*
763  * qla2x00_verify_checksum
764  *	Verify firmware checksum.
765  *
766  * Input:
767  *	ha = adapter block pointer.
768  *	TARGET_QUEUE_LOCK must be released.
769  *	ADAPTER_STATE_LOCK must be released.
770  *
771  * Returns:
772  *	qla2x00 local function return status code.
773  *
774  * Context:
775  *	Kernel context.
776  */
777 int
778 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
779 {
780 	int rval;
781 	mbx_cmd_t mc;
782 	mbx_cmd_t *mcp = &mc;
783 
784 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
785 	    "Entered %s.\n", __func__);
786 
787 	mcp->mb[0] = MBC_VERIFY_CHECKSUM;
788 	mcp->out_mb = MBX_0;
789 	mcp->in_mb = MBX_0;
790 	if (IS_FWI2_CAPABLE(vha->hw)) {
791 		mcp->mb[1] = MSW(risc_addr);
792 		mcp->mb[2] = LSW(risc_addr);
793 		mcp->out_mb |= MBX_2|MBX_1;
794 		mcp->in_mb |= MBX_2|MBX_1;
795 	} else {
796 		mcp->mb[1] = LSW(risc_addr);
797 		mcp->out_mb |= MBX_1;
798 		mcp->in_mb |= MBX_1;
799 	}
800 
801 	mcp->tov = MBX_TOV_SECONDS;
802 	mcp->flags = 0;
803 	rval = qla2x00_mailbox_command(vha, mcp);
804 
805 	if (rval != QLA_SUCCESS) {
806 		ql_dbg(ql_dbg_mbx, vha, 0x1036,
807 		    "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
808 		    (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
809 	} else {
810 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
811 		    "Done %s.\n", __func__);
812 	}
813 
814 	return rval;
815 }
816 
817 /*
818  * qla2x00_issue_iocb
819  *	Issue IOCB using mailbox command
820  *
821  * Input:
822  *	ha = adapter state pointer.
823  *	buffer = buffer pointer.
824  *	phys_addr = physical address of buffer.
825  *	size = size of buffer.
826  *	TARGET_QUEUE_LOCK must be released.
827  *	ADAPTER_STATE_LOCK must be released.
828  *
829  * Returns:
830  *	qla2x00 local function return status code.
831  *
832  * Context:
833  *	Kernel context.
834  */
835 int
836 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
837     dma_addr_t phys_addr, size_t size, uint32_t tov)
838 {
839 	int		rval;
840 	mbx_cmd_t	mc;
841 	mbx_cmd_t	*mcp = &mc;
842 
843 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
844 	    "Entered %s.\n", __func__);
845 
846 	mcp->mb[0] = MBC_IOCB_COMMAND_A64;
847 	mcp->mb[1] = 0;
848 	mcp->mb[2] = MSW(phys_addr);
849 	mcp->mb[3] = LSW(phys_addr);
850 	mcp->mb[6] = MSW(MSD(phys_addr));
851 	mcp->mb[7] = LSW(MSD(phys_addr));
852 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
853 	mcp->in_mb = MBX_2|MBX_0;
854 	mcp->tov = tov;
855 	mcp->flags = 0;
856 	rval = qla2x00_mailbox_command(vha, mcp);
857 
858 	if (rval != QLA_SUCCESS) {
859 		/*EMPTY*/
860 		ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
861 	} else {
862 		sts_entry_t *sts_entry = (sts_entry_t *) buffer;
863 
864 		/* Mask reserved bits. */
865 		sts_entry->entry_status &=
866 		    IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
867 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
868 		    "Done %s.\n", __func__);
869 	}
870 
871 	return rval;
872 }
873 
874 int
875 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
876     size_t size)
877 {
878 	return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
879 	    MBX_TOV_SECONDS);
880 }
881 
882 /*
883  * qla2x00_abort_command
884  *	Abort command aborts a specified IOCB.
885  *
886  * Input:
887  *	ha = adapter block pointer.
888  *	sp = SB structure pointer.
889  *
890  * Returns:
891  *	qla2x00 local function return status code.
892  *
893  * Context:
894  *	Kernel context.
895  */
896 int
897 qla2x00_abort_command(srb_t *sp)
898 {
899 	unsigned long   flags = 0;
900 	int		rval;
901 	uint32_t	handle = 0;
902 	mbx_cmd_t	mc;
903 	mbx_cmd_t	*mcp = &mc;
904 	fc_port_t	*fcport = sp->fcport;
905 	scsi_qla_host_t *vha = fcport->vha;
906 	struct qla_hw_data *ha = vha->hw;
907 	struct req_que *req = vha->req;
908 	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
909 
910 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
911 	    "Entered %s.\n", __func__);
912 
913 	spin_lock_irqsave(&ha->hardware_lock, flags);
914 	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
915 		if (req->outstanding_cmds[handle] == sp)
916 			break;
917 	}
918 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
919 
920 	if (handle == req->num_outstanding_cmds) {
921 		/* command not found */
922 		return QLA_FUNCTION_FAILED;
923 	}
924 
925 	mcp->mb[0] = MBC_ABORT_COMMAND;
926 	if (HAS_EXTENDED_IDS(ha))
927 		mcp->mb[1] = fcport->loop_id;
928 	else
929 		mcp->mb[1] = fcport->loop_id << 8;
930 	mcp->mb[2] = (uint16_t)handle;
931 	mcp->mb[3] = (uint16_t)(handle >> 16);
932 	mcp->mb[6] = (uint16_t)cmd->device->lun;
933 	mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
934 	mcp->in_mb = MBX_0;
935 	mcp->tov = MBX_TOV_SECONDS;
936 	mcp->flags = 0;
937 	rval = qla2x00_mailbox_command(vha, mcp);
938 
939 	if (rval != QLA_SUCCESS) {
940 		ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
941 	} else {
942 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
943 		    "Done %s.\n", __func__);
944 	}
945 
946 	return rval;
947 }
948 
949 int
950 qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
951 {
952 	int rval, rval2;
953 	mbx_cmd_t  mc;
954 	mbx_cmd_t  *mcp = &mc;
955 	scsi_qla_host_t *vha;
956 	struct req_que *req;
957 	struct rsp_que *rsp;
958 
959 	l = l;
960 	vha = fcport->vha;
961 
962 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
963 	    "Entered %s.\n", __func__);
964 
965 	req = vha->hw->req_q_map[0];
966 	rsp = req->rsp;
967 	mcp->mb[0] = MBC_ABORT_TARGET;
968 	mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
969 	if (HAS_EXTENDED_IDS(vha->hw)) {
970 		mcp->mb[1] = fcport->loop_id;
971 		mcp->mb[10] = 0;
972 		mcp->out_mb |= MBX_10;
973 	} else {
974 		mcp->mb[1] = fcport->loop_id << 8;
975 	}
976 	mcp->mb[2] = vha->hw->loop_reset_delay;
977 	mcp->mb[9] = vha->vp_idx;
978 
979 	mcp->in_mb = MBX_0;
980 	mcp->tov = MBX_TOV_SECONDS;
981 	mcp->flags = 0;
982 	rval = qla2x00_mailbox_command(vha, mcp);
983 	if (rval != QLA_SUCCESS) {
984 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
985 		    "Failed=%x.\n", rval);
986 	}
987 
988 	/* Issue marker IOCB. */
989 	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
990 							MK_SYNC_ID);
991 	if (rval2 != QLA_SUCCESS) {
992 		ql_dbg(ql_dbg_mbx, vha, 0x1040,
993 		    "Failed to issue marker IOCB (%x).\n", rval2);
994 	} else {
995 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
996 		    "Done %s.\n", __func__);
997 	}
998 
999 	return rval;
1000 }
1001 
1002 int
1003 qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1004 {
1005 	int rval, rval2;
1006 	mbx_cmd_t  mc;
1007 	mbx_cmd_t  *mcp = &mc;
1008 	scsi_qla_host_t *vha;
1009 	struct req_que *req;
1010 	struct rsp_que *rsp;
1011 
1012 	vha = fcport->vha;
1013 
1014 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1015 	    "Entered %s.\n", __func__);
1016 
1017 	req = vha->hw->req_q_map[0];
1018 	rsp = req->rsp;
1019 	mcp->mb[0] = MBC_LUN_RESET;
1020 	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1021 	if (HAS_EXTENDED_IDS(vha->hw))
1022 		mcp->mb[1] = fcport->loop_id;
1023 	else
1024 		mcp->mb[1] = fcport->loop_id << 8;
1025 	mcp->mb[2] = (u32)l;
1026 	mcp->mb[3] = 0;
1027 	mcp->mb[9] = vha->vp_idx;
1028 
1029 	mcp->in_mb = MBX_0;
1030 	mcp->tov = MBX_TOV_SECONDS;
1031 	mcp->flags = 0;
1032 	rval = qla2x00_mailbox_command(vha, mcp);
1033 	if (rval != QLA_SUCCESS) {
1034 		ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1035 	}
1036 
1037 	/* Issue marker IOCB. */
1038 	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1039 								MK_SYNC_ID_LUN);
1040 	if (rval2 != QLA_SUCCESS) {
1041 		ql_dbg(ql_dbg_mbx, vha, 0x1044,
1042 		    "Failed to issue marker IOCB (%x).\n", rval2);
1043 	} else {
1044 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1045 		    "Done %s.\n", __func__);
1046 	}
1047 
1048 	return rval;
1049 }
1050 
1051 /*
1052  * qla2x00_get_adapter_id
1053  *	Get adapter ID and topology.
1054  *
1055  * Input:
1056  *	ha = adapter block pointer.
1057  *	id = pointer for loop ID.
1058  *	al_pa = pointer for AL_PA.
1059  *	area = pointer for area.
1060  *	domain = pointer for domain.
1061  *	top = pointer for topology.
1062  *	TARGET_QUEUE_LOCK must be released.
1063  *	ADAPTER_STATE_LOCK must be released.
1064  *
1065  * Returns:
1066  *	qla2x00 local function return status code.
1067  *
1068  * Context:
1069  *	Kernel context.
1070  */
1071 int
1072 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1073     uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1074 {
1075 	int rval;
1076 	mbx_cmd_t mc;
1077 	mbx_cmd_t *mcp = &mc;
1078 
1079 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1080 	    "Entered %s.\n", __func__);
1081 
1082 	mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1083 	mcp->mb[9] = vha->vp_idx;
1084 	mcp->out_mb = MBX_9|MBX_0;
1085 	mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1086 	if (IS_CNA_CAPABLE(vha->hw))
1087 		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1088 	if (IS_FWI2_CAPABLE(vha->hw))
1089 		mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1090 	mcp->tov = MBX_TOV_SECONDS;
1091 	mcp->flags = 0;
1092 	rval = qla2x00_mailbox_command(vha, mcp);
1093 	if (mcp->mb[0] == MBS_COMMAND_ERROR)
1094 		rval = QLA_COMMAND_ERROR;
1095 	else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1096 		rval = QLA_INVALID_COMMAND;
1097 
1098 	/* Return data. */
1099 	*id = mcp->mb[1];
1100 	*al_pa = LSB(mcp->mb[2]);
1101 	*area = MSB(mcp->mb[2]);
1102 	*domain	= LSB(mcp->mb[3]);
1103 	*top = mcp->mb[6];
1104 	*sw_cap = mcp->mb[7];
1105 
1106 	if (rval != QLA_SUCCESS) {
1107 		/*EMPTY*/
1108 		ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1109 	} else {
1110 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1111 		    "Done %s.\n", __func__);
1112 
1113 		if (IS_CNA_CAPABLE(vha->hw)) {
1114 			vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1115 			vha->fcoe_fcf_idx = mcp->mb[10];
1116 			vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1117 			vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1118 			vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1119 			vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1120 			vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1121 			vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1122 		}
1123 		/* If FA-WWN supported */
1124 		if (mcp->mb[7] & BIT_14) {
1125 			vha->port_name[0] = MSB(mcp->mb[16]);
1126 			vha->port_name[1] = LSB(mcp->mb[16]);
1127 			vha->port_name[2] = MSB(mcp->mb[17]);
1128 			vha->port_name[3] = LSB(mcp->mb[17]);
1129 			vha->port_name[4] = MSB(mcp->mb[18]);
1130 			vha->port_name[5] = LSB(mcp->mb[18]);
1131 			vha->port_name[6] = MSB(mcp->mb[19]);
1132 			vha->port_name[7] = LSB(mcp->mb[19]);
1133 			fc_host_port_name(vha->host) =
1134 			    wwn_to_u64(vha->port_name);
1135 			ql_dbg(ql_dbg_mbx, vha, 0x10ca,
1136 			    "FA-WWN acquired %016llx\n",
1137 			    wwn_to_u64(vha->port_name));
1138 		}
1139 	}
1140 
1141 	return rval;
1142 }
1143 
1144 /*
1145  * qla2x00_get_retry_cnt
1146  *	Get current firmware login retry count and delay.
1147  *
1148  * Input:
1149  *	ha = adapter block pointer.
1150  *	retry_cnt = pointer to login retry count.
1151  *	tov = pointer to login timeout value.
1152  *
1153  * Returns:
1154  *	qla2x00 local function return status code.
1155  *
1156  * Context:
1157  *	Kernel context.
1158  */
1159 int
1160 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1161     uint16_t *r_a_tov)
1162 {
1163 	int rval;
1164 	uint16_t ratov;
1165 	mbx_cmd_t mc;
1166 	mbx_cmd_t *mcp = &mc;
1167 
1168 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1169 	    "Entered %s.\n", __func__);
1170 
1171 	mcp->mb[0] = MBC_GET_RETRY_COUNT;
1172 	mcp->out_mb = MBX_0;
1173 	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1174 	mcp->tov = MBX_TOV_SECONDS;
1175 	mcp->flags = 0;
1176 	rval = qla2x00_mailbox_command(vha, mcp);
1177 
1178 	if (rval != QLA_SUCCESS) {
1179 		/*EMPTY*/
1180 		ql_dbg(ql_dbg_mbx, vha, 0x104a,
1181 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1182 	} else {
1183 		/* Convert returned data and check our values. */
1184 		*r_a_tov = mcp->mb[3] / 2;
1185 		ratov = (mcp->mb[3]/2) / 10;  /* mb[3] value is in 100ms */
1186 		if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1187 			/* Update to the larger values */
1188 			*retry_cnt = (uint8_t)mcp->mb[1];
1189 			*tov = ratov;
1190 		}
1191 
1192 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1193 		    "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1194 	}
1195 
1196 	return rval;
1197 }
1198 
1199 /*
1200  * qla2x00_init_firmware
1201  *	Initialize adapter firmware.
1202  *
1203  * Input:
1204  *	ha = adapter block pointer.
1205  *	dptr = Initialization control block pointer.
1206  *	size = size of initialization control block.
1207  *	TARGET_QUEUE_LOCK must be released.
1208  *	ADAPTER_STATE_LOCK must be released.
1209  *
1210  * Returns:
1211  *	qla2x00 local function return status code.
1212  *
1213  * Context:
1214  *	Kernel context.
1215  */
1216 int
1217 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1218 {
1219 	int rval;
1220 	mbx_cmd_t mc;
1221 	mbx_cmd_t *mcp = &mc;
1222 	struct qla_hw_data *ha = vha->hw;
1223 
1224 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1225 	    "Entered %s.\n", __func__);
1226 
1227 	if (IS_P3P_TYPE(ha) && ql2xdbwr)
1228 		qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
1229 			(0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1230 
1231 	if (ha->flags.npiv_supported)
1232 		mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1233 	else
1234 		mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1235 
1236 	mcp->mb[1] = 0;
1237 	mcp->mb[2] = MSW(ha->init_cb_dma);
1238 	mcp->mb[3] = LSW(ha->init_cb_dma);
1239 	mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1240 	mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1241 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1242 	if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1243 		mcp->mb[1] = BIT_0;
1244 		mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1245 		mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1246 		mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1247 		mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1248 		mcp->mb[14] = sizeof(*ha->ex_init_cb);
1249 		mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1250 	}
1251 	/* 1 and 2 should normally be captured. */
1252 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
1253 	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1254 		/* mb3 is additional info about the installed SFP. */
1255 		mcp->in_mb  |= MBX_3;
1256 	mcp->buf_size = size;
1257 	mcp->flags = MBX_DMA_OUT;
1258 	mcp->tov = MBX_TOV_SECONDS;
1259 	rval = qla2x00_mailbox_command(vha, mcp);
1260 
1261 	if (rval != QLA_SUCCESS) {
1262 		/*EMPTY*/
1263 		ql_dbg(ql_dbg_mbx, vha, 0x104d,
1264 		    "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1265 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1266 	} else {
1267 		/*EMPTY*/
1268 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1269 		    "Done %s.\n", __func__);
1270 	}
1271 
1272 	return rval;
1273 }
1274 
1275 /*
1276  * qla2x00_get_node_name_list
1277  *      Issue get node name list mailbox command, kmalloc()
1278  *      and return the resulting list. Caller must kfree() it!
1279  *
1280  * Input:
1281  *      ha = adapter state pointer.
1282  *      out_data = resulting list
1283  *      out_len = length of the resulting list
1284  *
1285  * Returns:
1286  *      qla2x00 local function return status code.
1287  *
1288  * Context:
1289  *      Kernel context.
1290  */
1291 int
1292 qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
1293 {
1294 	struct qla_hw_data *ha = vha->hw;
1295 	struct qla_port_24xx_data *list = NULL;
1296 	void *pmap;
1297 	mbx_cmd_t mc;
1298 	dma_addr_t pmap_dma;
1299 	ulong dma_size;
1300 	int rval, left;
1301 
1302 	left = 1;
1303 	while (left > 0) {
1304 		dma_size = left * sizeof(*list);
1305 		pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
1306 					 &pmap_dma, GFP_KERNEL);
1307 		if (!pmap) {
1308 			ql_log(ql_log_warn, vha, 0x113f,
1309 			    "%s(%ld): DMA Alloc failed of %ld\n",
1310 			    __func__, vha->host_no, dma_size);
1311 			rval = QLA_MEMORY_ALLOC_FAILED;
1312 			goto out;
1313 		}
1314 
1315 		mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
1316 		mc.mb[1] = BIT_1 | BIT_3;
1317 		mc.mb[2] = MSW(pmap_dma);
1318 		mc.mb[3] = LSW(pmap_dma);
1319 		mc.mb[6] = MSW(MSD(pmap_dma));
1320 		mc.mb[7] = LSW(MSD(pmap_dma));
1321 		mc.mb[8] = dma_size;
1322 		mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
1323 		mc.in_mb = MBX_0|MBX_1;
1324 		mc.tov = 30;
1325 		mc.flags = MBX_DMA_IN;
1326 
1327 		rval = qla2x00_mailbox_command(vha, &mc);
1328 		if (rval != QLA_SUCCESS) {
1329 			if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
1330 			    (mc.mb[1] == 0xA)) {
1331 				left += le16_to_cpu(mc.mb[2]) /
1332 				    sizeof(struct qla_port_24xx_data);
1333 				goto restart;
1334 			}
1335 			goto out_free;
1336 		}
1337 
1338 		left = 0;
1339 
1340 		list = kmemdup(pmap, dma_size, GFP_KERNEL);
1341 		if (!list) {
1342 			ql_log(ql_log_warn, vha, 0x1140,
1343 			    "%s(%ld): failed to allocate node names list "
1344 			    "structure.\n", __func__, vha->host_no);
1345 			rval = QLA_MEMORY_ALLOC_FAILED;
1346 			goto out_free;
1347 		}
1348 
1349 restart:
1350 		dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1351 	}
1352 
1353 	*out_data = list;
1354 	*out_len = dma_size;
1355 
1356 out:
1357 	return rval;
1358 
1359 out_free:
1360 	dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1361 	return rval;
1362 }
1363 
1364 /*
1365  * qla2x00_get_port_database
1366  *	Issue normal/enhanced get port database mailbox command
1367  *	and copy device name as necessary.
1368  *
1369  * Input:
1370  *	ha = adapter state pointer.
1371  *	dev = structure pointer.
1372  *	opt = enhanced cmd option byte.
1373  *
1374  * Returns:
1375  *	qla2x00 local function return status code.
1376  *
1377  * Context:
1378  *	Kernel context.
1379  */
1380 int
1381 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1382 {
1383 	int rval;
1384 	mbx_cmd_t mc;
1385 	mbx_cmd_t *mcp = &mc;
1386 	port_database_t *pd;
1387 	struct port_database_24xx *pd24;
1388 	dma_addr_t pd_dma;
1389 	struct qla_hw_data *ha = vha->hw;
1390 
1391 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1392 	    "Entered %s.\n", __func__);
1393 
1394 	pd24 = NULL;
1395 	pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1396 	if (pd  == NULL) {
1397 		ql_log(ql_log_warn, vha, 0x1050,
1398 		    "Failed to allocate port database structure.\n");
1399 		return QLA_MEMORY_ALLOC_FAILED;
1400 	}
1401 	memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1402 
1403 	mcp->mb[0] = MBC_GET_PORT_DATABASE;
1404 	if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1405 		mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1406 	mcp->mb[2] = MSW(pd_dma);
1407 	mcp->mb[3] = LSW(pd_dma);
1408 	mcp->mb[6] = MSW(MSD(pd_dma));
1409 	mcp->mb[7] = LSW(MSD(pd_dma));
1410 	mcp->mb[9] = vha->vp_idx;
1411 	mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1412 	mcp->in_mb = MBX_0;
1413 	if (IS_FWI2_CAPABLE(ha)) {
1414 		mcp->mb[1] = fcport->loop_id;
1415 		mcp->mb[10] = opt;
1416 		mcp->out_mb |= MBX_10|MBX_1;
1417 		mcp->in_mb |= MBX_1;
1418 	} else if (HAS_EXTENDED_IDS(ha)) {
1419 		mcp->mb[1] = fcport->loop_id;
1420 		mcp->mb[10] = opt;
1421 		mcp->out_mb |= MBX_10|MBX_1;
1422 	} else {
1423 		mcp->mb[1] = fcport->loop_id << 8 | opt;
1424 		mcp->out_mb |= MBX_1;
1425 	}
1426 	mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1427 	    PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1428 	mcp->flags = MBX_DMA_IN;
1429 	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1430 	rval = qla2x00_mailbox_command(vha, mcp);
1431 	if (rval != QLA_SUCCESS)
1432 		goto gpd_error_out;
1433 
1434 	if (IS_FWI2_CAPABLE(ha)) {
1435 		uint64_t zero = 0;
1436 		pd24 = (struct port_database_24xx *) pd;
1437 
1438 		/* Check for logged in state. */
1439 		if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1440 		    pd24->last_login_state != PDS_PRLI_COMPLETE) {
1441 			ql_dbg(ql_dbg_mbx, vha, 0x1051,
1442 			    "Unable to verify login-state (%x/%x) for "
1443 			    "loop_id %x.\n", pd24->current_login_state,
1444 			    pd24->last_login_state, fcport->loop_id);
1445 			rval = QLA_FUNCTION_FAILED;
1446 			goto gpd_error_out;
1447 		}
1448 
1449 		if (fcport->loop_id == FC_NO_LOOP_ID ||
1450 		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1451 		     memcmp(fcport->port_name, pd24->port_name, 8))) {
1452 			/* We lost the device mid way. */
1453 			rval = QLA_NOT_LOGGED_IN;
1454 			goto gpd_error_out;
1455 		}
1456 
1457 		/* Names are little-endian. */
1458 		memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1459 		memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1460 
1461 		/* Get port_id of device. */
1462 		fcport->d_id.b.domain = pd24->port_id[0];
1463 		fcport->d_id.b.area = pd24->port_id[1];
1464 		fcport->d_id.b.al_pa = pd24->port_id[2];
1465 		fcport->d_id.b.rsvd_1 = 0;
1466 
1467 		/* If not target must be initiator or unknown type. */
1468 		if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1469 			fcport->port_type = FCT_INITIATOR;
1470 		else
1471 			fcport->port_type = FCT_TARGET;
1472 
1473 		/* Passback COS information. */
1474 		fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1475 				FC_COS_CLASS2 : FC_COS_CLASS3;
1476 
1477 		if (pd24->prli_svc_param_word_3[0] & BIT_7)
1478 			fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1479 	} else {
1480 		uint64_t zero = 0;
1481 
1482 		/* Check for logged in state. */
1483 		if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1484 		    pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1485 			ql_dbg(ql_dbg_mbx, vha, 0x100a,
1486 			    "Unable to verify login-state (%x/%x) - "
1487 			    "portid=%02x%02x%02x.\n", pd->master_state,
1488 			    pd->slave_state, fcport->d_id.b.domain,
1489 			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
1490 			rval = QLA_FUNCTION_FAILED;
1491 			goto gpd_error_out;
1492 		}
1493 
1494 		if (fcport->loop_id == FC_NO_LOOP_ID ||
1495 		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1496 		     memcmp(fcport->port_name, pd->port_name, 8))) {
1497 			/* We lost the device mid way. */
1498 			rval = QLA_NOT_LOGGED_IN;
1499 			goto gpd_error_out;
1500 		}
1501 
1502 		/* Names are little-endian. */
1503 		memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1504 		memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1505 
1506 		/* Get port_id of device. */
1507 		fcport->d_id.b.domain = pd->port_id[0];
1508 		fcport->d_id.b.area = pd->port_id[3];
1509 		fcport->d_id.b.al_pa = pd->port_id[2];
1510 		fcport->d_id.b.rsvd_1 = 0;
1511 
1512 		/* If not target must be initiator or unknown type. */
1513 		if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1514 			fcport->port_type = FCT_INITIATOR;
1515 		else
1516 			fcport->port_type = FCT_TARGET;
1517 
1518 		/* Passback COS information. */
1519 		fcport->supported_classes = (pd->options & BIT_4) ?
1520 		    FC_COS_CLASS2: FC_COS_CLASS3;
1521 	}
1522 
1523 gpd_error_out:
1524 	dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1525 
1526 	if (rval != QLA_SUCCESS) {
1527 		ql_dbg(ql_dbg_mbx, vha, 0x1052,
1528 		    "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1529 		    mcp->mb[0], mcp->mb[1]);
1530 	} else {
1531 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1532 		    "Done %s.\n", __func__);
1533 	}
1534 
1535 	return rval;
1536 }
1537 
1538 /*
1539  * qla2x00_get_firmware_state
1540  *	Get adapter firmware state.
1541  *
1542  * Input:
1543  *	ha = adapter block pointer.
1544  *	dptr = pointer for firmware state.
1545  *	TARGET_QUEUE_LOCK must be released.
1546  *	ADAPTER_STATE_LOCK must be released.
1547  *
1548  * Returns:
1549  *	qla2x00 local function return status code.
1550  *
1551  * Context:
1552  *	Kernel context.
1553  */
1554 int
1555 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1556 {
1557 	int rval;
1558 	mbx_cmd_t mc;
1559 	mbx_cmd_t *mcp = &mc;
1560 
1561 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1562 	    "Entered %s.\n", __func__);
1563 
1564 	mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1565 	mcp->out_mb = MBX_0;
1566 	if (IS_FWI2_CAPABLE(vha->hw))
1567 		mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1568 	else
1569 		mcp->in_mb = MBX_1|MBX_0;
1570 	mcp->tov = MBX_TOV_SECONDS;
1571 	mcp->flags = 0;
1572 	rval = qla2x00_mailbox_command(vha, mcp);
1573 
1574 	/* Return firmware states. */
1575 	states[0] = mcp->mb[1];
1576 	if (IS_FWI2_CAPABLE(vha->hw)) {
1577 		states[1] = mcp->mb[2];
1578 		states[2] = mcp->mb[3];
1579 		states[3] = mcp->mb[4];
1580 		states[4] = mcp->mb[5];
1581 		states[5] = mcp->mb[6];  /* DPORT status */
1582 	}
1583 
1584 	if (rval != QLA_SUCCESS) {
1585 		/*EMPTY*/
1586 		ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1587 	} else {
1588 		/*EMPTY*/
1589 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1590 		    "Done %s.\n", __func__);
1591 	}
1592 
1593 	return rval;
1594 }
1595 
1596 /*
1597  * qla2x00_get_port_name
1598  *	Issue get port name mailbox command.
1599  *	Returned name is in big endian format.
1600  *
1601  * Input:
1602  *	ha = adapter block pointer.
1603  *	loop_id = loop ID of device.
1604  *	name = pointer for name.
1605  *	TARGET_QUEUE_LOCK must be released.
1606  *	ADAPTER_STATE_LOCK must be released.
1607  *
1608  * Returns:
1609  *	qla2x00 local function return status code.
1610  *
1611  * Context:
1612  *	Kernel context.
1613  */
1614 int
1615 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1616     uint8_t opt)
1617 {
1618 	int rval;
1619 	mbx_cmd_t mc;
1620 	mbx_cmd_t *mcp = &mc;
1621 
1622 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1623 	    "Entered %s.\n", __func__);
1624 
1625 	mcp->mb[0] = MBC_GET_PORT_NAME;
1626 	mcp->mb[9] = vha->vp_idx;
1627 	mcp->out_mb = MBX_9|MBX_1|MBX_0;
1628 	if (HAS_EXTENDED_IDS(vha->hw)) {
1629 		mcp->mb[1] = loop_id;
1630 		mcp->mb[10] = opt;
1631 		mcp->out_mb |= MBX_10;
1632 	} else {
1633 		mcp->mb[1] = loop_id << 8 | opt;
1634 	}
1635 
1636 	mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1637 	mcp->tov = MBX_TOV_SECONDS;
1638 	mcp->flags = 0;
1639 	rval = qla2x00_mailbox_command(vha, mcp);
1640 
1641 	if (rval != QLA_SUCCESS) {
1642 		/*EMPTY*/
1643 		ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1644 	} else {
1645 		if (name != NULL) {
1646 			/* This function returns name in big endian. */
1647 			name[0] = MSB(mcp->mb[2]);
1648 			name[1] = LSB(mcp->mb[2]);
1649 			name[2] = MSB(mcp->mb[3]);
1650 			name[3] = LSB(mcp->mb[3]);
1651 			name[4] = MSB(mcp->mb[6]);
1652 			name[5] = LSB(mcp->mb[6]);
1653 			name[6] = MSB(mcp->mb[7]);
1654 			name[7] = LSB(mcp->mb[7]);
1655 		}
1656 
1657 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1658 		    "Done %s.\n", __func__);
1659 	}
1660 
1661 	return rval;
1662 }
1663 
1664 /*
1665  * qla24xx_link_initialization
1666  *	Issue link initialization mailbox command.
1667  *
1668  * Input:
1669  *	ha = adapter block pointer.
1670  *	TARGET_QUEUE_LOCK must be released.
1671  *	ADAPTER_STATE_LOCK must be released.
1672  *
1673  * Returns:
1674  *	qla2x00 local function return status code.
1675  *
1676  * Context:
1677  *	Kernel context.
1678  */
1679 int
1680 qla24xx_link_initialize(scsi_qla_host_t *vha)
1681 {
1682 	int rval;
1683 	mbx_cmd_t mc;
1684 	mbx_cmd_t *mcp = &mc;
1685 
1686 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
1687 	    "Entered %s.\n", __func__);
1688 
1689 	if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
1690 		return QLA_FUNCTION_FAILED;
1691 
1692 	mcp->mb[0] = MBC_LINK_INITIALIZATION;
1693 	mcp->mb[1] = BIT_4;
1694 	if (vha->hw->operating_mode == LOOP)
1695 		mcp->mb[1] |= BIT_6;
1696 	else
1697 		mcp->mb[1] |= BIT_5;
1698 	mcp->mb[2] = 0;
1699 	mcp->mb[3] = 0;
1700 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1701 	mcp->in_mb = MBX_0;
1702 	mcp->tov = MBX_TOV_SECONDS;
1703 	mcp->flags = 0;
1704 	rval = qla2x00_mailbox_command(vha, mcp);
1705 
1706 	if (rval != QLA_SUCCESS) {
1707 		ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
1708 	} else {
1709 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
1710 		    "Done %s.\n", __func__);
1711 	}
1712 
1713 	return rval;
1714 }
1715 
1716 /*
1717  * qla2x00_lip_reset
1718  *	Issue LIP reset mailbox command.
1719  *
1720  * Input:
1721  *	ha = adapter block pointer.
1722  *	TARGET_QUEUE_LOCK must be released.
1723  *	ADAPTER_STATE_LOCK must be released.
1724  *
1725  * Returns:
1726  *	qla2x00 local function return status code.
1727  *
1728  * Context:
1729  *	Kernel context.
1730  */
1731 int
1732 qla2x00_lip_reset(scsi_qla_host_t *vha)
1733 {
1734 	int rval;
1735 	mbx_cmd_t mc;
1736 	mbx_cmd_t *mcp = &mc;
1737 
1738 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
1739 	    "Entered %s.\n", __func__);
1740 
1741 	if (IS_CNA_CAPABLE(vha->hw)) {
1742 		/* Logout across all FCFs. */
1743 		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1744 		mcp->mb[1] = BIT_1;
1745 		mcp->mb[2] = 0;
1746 		mcp->out_mb = MBX_2|MBX_1|MBX_0;
1747 	} else if (IS_FWI2_CAPABLE(vha->hw)) {
1748 		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1749 		mcp->mb[1] = BIT_6;
1750 		mcp->mb[2] = 0;
1751 		mcp->mb[3] = vha->hw->loop_reset_delay;
1752 		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1753 	} else {
1754 		mcp->mb[0] = MBC_LIP_RESET;
1755 		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1756 		if (HAS_EXTENDED_IDS(vha->hw)) {
1757 			mcp->mb[1] = 0x00ff;
1758 			mcp->mb[10] = 0;
1759 			mcp->out_mb |= MBX_10;
1760 		} else {
1761 			mcp->mb[1] = 0xff00;
1762 		}
1763 		mcp->mb[2] = vha->hw->loop_reset_delay;
1764 		mcp->mb[3] = 0;
1765 	}
1766 	mcp->in_mb = MBX_0;
1767 	mcp->tov = MBX_TOV_SECONDS;
1768 	mcp->flags = 0;
1769 	rval = qla2x00_mailbox_command(vha, mcp);
1770 
1771 	if (rval != QLA_SUCCESS) {
1772 		/*EMPTY*/
1773 		ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
1774 	} else {
1775 		/*EMPTY*/
1776 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
1777 		    "Done %s.\n", __func__);
1778 	}
1779 
1780 	return rval;
1781 }
1782 
1783 /*
1784  * qla2x00_send_sns
1785  *	Send SNS command.
1786  *
1787  * Input:
1788  *	ha = adapter block pointer.
1789  *	sns = pointer for command.
1790  *	cmd_size = command size.
1791  *	buf_size = response/command size.
1792  *	TARGET_QUEUE_LOCK must be released.
1793  *	ADAPTER_STATE_LOCK must be released.
1794  *
1795  * Returns:
1796  *	qla2x00 local function return status code.
1797  *
1798  * Context:
1799  *	Kernel context.
1800  */
1801 int
1802 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
1803     uint16_t cmd_size, size_t buf_size)
1804 {
1805 	int rval;
1806 	mbx_cmd_t mc;
1807 	mbx_cmd_t *mcp = &mc;
1808 
1809 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
1810 	    "Entered %s.\n", __func__);
1811 
1812 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
1813 	    "Retry cnt=%d ratov=%d total tov=%d.\n",
1814 	    vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
1815 
1816 	mcp->mb[0] = MBC_SEND_SNS_COMMAND;
1817 	mcp->mb[1] = cmd_size;
1818 	mcp->mb[2] = MSW(sns_phys_address);
1819 	mcp->mb[3] = LSW(sns_phys_address);
1820 	mcp->mb[6] = MSW(MSD(sns_phys_address));
1821 	mcp->mb[7] = LSW(MSD(sns_phys_address));
1822 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1823 	mcp->in_mb = MBX_0|MBX_1;
1824 	mcp->buf_size = buf_size;
1825 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
1826 	mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
1827 	rval = qla2x00_mailbox_command(vha, mcp);
1828 
1829 	if (rval != QLA_SUCCESS) {
1830 		/*EMPTY*/
1831 		ql_dbg(ql_dbg_mbx, vha, 0x105f,
1832 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
1833 		    rval, mcp->mb[0], mcp->mb[1]);
1834 	} else {
1835 		/*EMPTY*/
1836 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
1837 		    "Done %s.\n", __func__);
1838 	}
1839 
1840 	return rval;
1841 }
1842 
1843 int
1844 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1845     uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1846 {
1847 	int		rval;
1848 
1849 	struct logio_entry_24xx *lg;
1850 	dma_addr_t	lg_dma;
1851 	uint32_t	iop[2];
1852 	struct qla_hw_data *ha = vha->hw;
1853 	struct req_que *req;
1854 	struct rsp_que *rsp;
1855 
1856 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
1857 	    "Entered %s.\n", __func__);
1858 
1859 	if (ha->flags.cpu_affinity_enabled)
1860 		req = ha->req_q_map[0];
1861 	else
1862 		req = vha->req;
1863 	rsp = req->rsp;
1864 
1865 	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
1866 	if (lg == NULL) {
1867 		ql_log(ql_log_warn, vha, 0x1062,
1868 		    "Failed to allocate login IOCB.\n");
1869 		return QLA_MEMORY_ALLOC_FAILED;
1870 	}
1871 	memset(lg, 0, sizeof(struct logio_entry_24xx));
1872 
1873 	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
1874 	lg->entry_count = 1;
1875 	lg->handle = MAKE_HANDLE(req->id, lg->handle);
1876 	lg->nport_handle = cpu_to_le16(loop_id);
1877 	lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
1878 	if (opt & BIT_0)
1879 		lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
1880 	if (opt & BIT_1)
1881 		lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
1882 	lg->port_id[0] = al_pa;
1883 	lg->port_id[1] = area;
1884 	lg->port_id[2] = domain;
1885 	lg->vp_index = vha->vp_idx;
1886 	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
1887 	    (ha->r_a_tov / 10 * 2) + 2);
1888 	if (rval != QLA_SUCCESS) {
1889 		ql_dbg(ql_dbg_mbx, vha, 0x1063,
1890 		    "Failed to issue login IOCB (%x).\n", rval);
1891 	} else if (lg->entry_status != 0) {
1892 		ql_dbg(ql_dbg_mbx, vha, 0x1064,
1893 		    "Failed to complete IOCB -- error status (%x).\n",
1894 		    lg->entry_status);
1895 		rval = QLA_FUNCTION_FAILED;
1896 	} else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
1897 		iop[0] = le32_to_cpu(lg->io_parameter[0]);
1898 		iop[1] = le32_to_cpu(lg->io_parameter[1]);
1899 
1900 		ql_dbg(ql_dbg_mbx, vha, 0x1065,
1901 		    "Failed to complete IOCB -- completion  status (%x) "
1902 		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
1903 		    iop[0], iop[1]);
1904 
1905 		switch (iop[0]) {
1906 		case LSC_SCODE_PORTID_USED:
1907 			mb[0] = MBS_PORT_ID_USED;
1908 			mb[1] = LSW(iop[1]);
1909 			break;
1910 		case LSC_SCODE_NPORT_USED:
1911 			mb[0] = MBS_LOOP_ID_USED;
1912 			break;
1913 		case LSC_SCODE_NOLINK:
1914 		case LSC_SCODE_NOIOCB:
1915 		case LSC_SCODE_NOXCB:
1916 		case LSC_SCODE_CMD_FAILED:
1917 		case LSC_SCODE_NOFABRIC:
1918 		case LSC_SCODE_FW_NOT_READY:
1919 		case LSC_SCODE_NOT_LOGGED_IN:
1920 		case LSC_SCODE_NOPCB:
1921 		case LSC_SCODE_ELS_REJECT:
1922 		case LSC_SCODE_CMD_PARAM_ERR:
1923 		case LSC_SCODE_NONPORT:
1924 		case LSC_SCODE_LOGGED_IN:
1925 		case LSC_SCODE_NOFLOGI_ACC:
1926 		default:
1927 			mb[0] = MBS_COMMAND_ERROR;
1928 			break;
1929 		}
1930 	} else {
1931 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
1932 		    "Done %s.\n", __func__);
1933 
1934 		iop[0] = le32_to_cpu(lg->io_parameter[0]);
1935 
1936 		mb[0] = MBS_COMMAND_COMPLETE;
1937 		mb[1] = 0;
1938 		if (iop[0] & BIT_4) {
1939 			if (iop[0] & BIT_8)
1940 				mb[1] |= BIT_1;
1941 		} else
1942 			mb[1] = BIT_0;
1943 
1944 		/* Passback COS information. */
1945 		mb[10] = 0;
1946 		if (lg->io_parameter[7] || lg->io_parameter[8])
1947 			mb[10] |= BIT_0;	/* Class 2. */
1948 		if (lg->io_parameter[9] || lg->io_parameter[10])
1949 			mb[10] |= BIT_1;	/* Class 3. */
1950 		if (lg->io_parameter[0] & __constant_cpu_to_le32(BIT_7))
1951 			mb[10] |= BIT_7;	/* Confirmed Completion
1952 						 * Allowed
1953 						 */
1954 	}
1955 
1956 	dma_pool_free(ha->s_dma_pool, lg, lg_dma);
1957 
1958 	return rval;
1959 }
1960 
1961 /*
1962  * qla2x00_login_fabric
1963  *	Issue login fabric port mailbox command.
1964  *
1965  * Input:
1966  *	ha = adapter block pointer.
1967  *	loop_id = device loop ID.
1968  *	domain = device domain.
1969  *	area = device area.
1970  *	al_pa = device AL_PA.
1971  *	status = pointer for return status.
1972  *	opt = command options.
1973  *	TARGET_QUEUE_LOCK must be released.
1974  *	ADAPTER_STATE_LOCK must be released.
1975  *
1976  * Returns:
1977  *	qla2x00 local function return status code.
1978  *
1979  * Context:
1980  *	Kernel context.
1981  */
1982 int
1983 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1984     uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1985 {
1986 	int rval;
1987 	mbx_cmd_t mc;
1988 	mbx_cmd_t *mcp = &mc;
1989 	struct qla_hw_data *ha = vha->hw;
1990 
1991 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
1992 	    "Entered %s.\n", __func__);
1993 
1994 	mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
1995 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1996 	if (HAS_EXTENDED_IDS(ha)) {
1997 		mcp->mb[1] = loop_id;
1998 		mcp->mb[10] = opt;
1999 		mcp->out_mb |= MBX_10;
2000 	} else {
2001 		mcp->mb[1] = (loop_id << 8) | opt;
2002 	}
2003 	mcp->mb[2] = domain;
2004 	mcp->mb[3] = area << 8 | al_pa;
2005 
2006 	mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
2007 	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2008 	mcp->flags = 0;
2009 	rval = qla2x00_mailbox_command(vha, mcp);
2010 
2011 	/* Return mailbox statuses. */
2012 	if (mb != NULL) {
2013 		mb[0] = mcp->mb[0];
2014 		mb[1] = mcp->mb[1];
2015 		mb[2] = mcp->mb[2];
2016 		mb[6] = mcp->mb[6];
2017 		mb[7] = mcp->mb[7];
2018 		/* COS retrieved from Get-Port-Database mailbox command. */
2019 		mb[10] = 0;
2020 	}
2021 
2022 	if (rval != QLA_SUCCESS) {
2023 		/* RLU tmp code: need to change main mailbox_command function to
2024 		 * return ok even when the mailbox completion value is not
2025 		 * SUCCESS. The caller needs to be responsible to interpret
2026 		 * the return values of this mailbox command if we're not
2027 		 * to change too much of the existing code.
2028 		 */
2029 		if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2030 		    mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2031 		    mcp->mb[0] == 0x4006)
2032 			rval = QLA_SUCCESS;
2033 
2034 		/*EMPTY*/
2035 		ql_dbg(ql_dbg_mbx, vha, 0x1068,
2036 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2037 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2038 	} else {
2039 		/*EMPTY*/
2040 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2041 		    "Done %s.\n", __func__);
2042 	}
2043 
2044 	return rval;
2045 }
2046 
2047 /*
2048  * qla2x00_login_local_device
2049  *           Issue login loop port mailbox command.
2050  *
2051  * Input:
2052  *           ha = adapter block pointer.
2053  *           loop_id = device loop ID.
2054  *           opt = command options.
2055  *
2056  * Returns:
2057  *            Return status code.
2058  *
2059  * Context:
2060  *            Kernel context.
2061  *
2062  */
2063 int
2064 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2065     uint16_t *mb_ret, uint8_t opt)
2066 {
2067 	int rval;
2068 	mbx_cmd_t mc;
2069 	mbx_cmd_t *mcp = &mc;
2070 	struct qla_hw_data *ha = vha->hw;
2071 
2072 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2073 	    "Entered %s.\n", __func__);
2074 
2075 	if (IS_FWI2_CAPABLE(ha))
2076 		return qla24xx_login_fabric(vha, fcport->loop_id,
2077 		    fcport->d_id.b.domain, fcport->d_id.b.area,
2078 		    fcport->d_id.b.al_pa, mb_ret, opt);
2079 
2080 	mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2081 	if (HAS_EXTENDED_IDS(ha))
2082 		mcp->mb[1] = fcport->loop_id;
2083 	else
2084 		mcp->mb[1] = fcport->loop_id << 8;
2085 	mcp->mb[2] = opt;
2086 	mcp->out_mb = MBX_2|MBX_1|MBX_0;
2087  	mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2088 	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2089 	mcp->flags = 0;
2090 	rval = qla2x00_mailbox_command(vha, mcp);
2091 
2092  	/* Return mailbox statuses. */
2093  	if (mb_ret != NULL) {
2094  		mb_ret[0] = mcp->mb[0];
2095  		mb_ret[1] = mcp->mb[1];
2096  		mb_ret[6] = mcp->mb[6];
2097  		mb_ret[7] = mcp->mb[7];
2098  	}
2099 
2100 	if (rval != QLA_SUCCESS) {
2101  		/* AV tmp code: need to change main mailbox_command function to
2102  		 * return ok even when the mailbox completion value is not
2103  		 * SUCCESS. The caller needs to be responsible to interpret
2104  		 * the return values of this mailbox command if we're not
2105  		 * to change too much of the existing code.
2106  		 */
2107  		if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2108  			rval = QLA_SUCCESS;
2109 
2110 		ql_dbg(ql_dbg_mbx, vha, 0x106b,
2111 		    "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2112 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2113 	} else {
2114 		/*EMPTY*/
2115 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2116 		    "Done %s.\n", __func__);
2117 	}
2118 
2119 	return (rval);
2120 }
2121 
2122 int
2123 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2124     uint8_t area, uint8_t al_pa)
2125 {
2126 	int		rval;
2127 	struct logio_entry_24xx *lg;
2128 	dma_addr_t	lg_dma;
2129 	struct qla_hw_data *ha = vha->hw;
2130 	struct req_que *req;
2131 	struct rsp_que *rsp;
2132 
2133 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2134 	    "Entered %s.\n", __func__);
2135 
2136 	lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2137 	if (lg == NULL) {
2138 		ql_log(ql_log_warn, vha, 0x106e,
2139 		    "Failed to allocate logout IOCB.\n");
2140 		return QLA_MEMORY_ALLOC_FAILED;
2141 	}
2142 	memset(lg, 0, sizeof(struct logio_entry_24xx));
2143 
2144 	if (ql2xmaxqueues > 1)
2145 		req = ha->req_q_map[0];
2146 	else
2147 		req = vha->req;
2148 	rsp = req->rsp;
2149 	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2150 	lg->entry_count = 1;
2151 	lg->handle = MAKE_HANDLE(req->id, lg->handle);
2152 	lg->nport_handle = cpu_to_le16(loop_id);
2153 	lg->control_flags =
2154 	    __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2155 		LCF_FREE_NPORT);
2156 	lg->port_id[0] = al_pa;
2157 	lg->port_id[1] = area;
2158 	lg->port_id[2] = domain;
2159 	lg->vp_index = vha->vp_idx;
2160 	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2161 	    (ha->r_a_tov / 10 * 2) + 2);
2162 	if (rval != QLA_SUCCESS) {
2163 		ql_dbg(ql_dbg_mbx, vha, 0x106f,
2164 		    "Failed to issue logout IOCB (%x).\n", rval);
2165 	} else if (lg->entry_status != 0) {
2166 		ql_dbg(ql_dbg_mbx, vha, 0x1070,
2167 		    "Failed to complete IOCB -- error status (%x).\n",
2168 		    lg->entry_status);
2169 		rval = QLA_FUNCTION_FAILED;
2170 	} else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
2171 		ql_dbg(ql_dbg_mbx, vha, 0x1071,
2172 		    "Failed to complete IOCB -- completion status (%x) "
2173 		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2174 		    le32_to_cpu(lg->io_parameter[0]),
2175 		    le32_to_cpu(lg->io_parameter[1]));
2176 	} else {
2177 		/*EMPTY*/
2178 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2179 		    "Done %s.\n", __func__);
2180 	}
2181 
2182 	dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2183 
2184 	return rval;
2185 }
2186 
2187 /*
2188  * qla2x00_fabric_logout
2189  *	Issue logout fabric port mailbox command.
2190  *
2191  * Input:
2192  *	ha = adapter block pointer.
2193  *	loop_id = device loop ID.
2194  *	TARGET_QUEUE_LOCK must be released.
2195  *	ADAPTER_STATE_LOCK must be released.
2196  *
2197  * Returns:
2198  *	qla2x00 local function return status code.
2199  *
2200  * Context:
2201  *	Kernel context.
2202  */
2203 int
2204 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2205     uint8_t area, uint8_t al_pa)
2206 {
2207 	int rval;
2208 	mbx_cmd_t mc;
2209 	mbx_cmd_t *mcp = &mc;
2210 
2211 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2212 	    "Entered %s.\n", __func__);
2213 
2214 	mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2215 	mcp->out_mb = MBX_1|MBX_0;
2216 	if (HAS_EXTENDED_IDS(vha->hw)) {
2217 		mcp->mb[1] = loop_id;
2218 		mcp->mb[10] = 0;
2219 		mcp->out_mb |= MBX_10;
2220 	} else {
2221 		mcp->mb[1] = loop_id << 8;
2222 	}
2223 
2224 	mcp->in_mb = MBX_1|MBX_0;
2225 	mcp->tov = MBX_TOV_SECONDS;
2226 	mcp->flags = 0;
2227 	rval = qla2x00_mailbox_command(vha, mcp);
2228 
2229 	if (rval != QLA_SUCCESS) {
2230 		/*EMPTY*/
2231 		ql_dbg(ql_dbg_mbx, vha, 0x1074,
2232 		    "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2233 	} else {
2234 		/*EMPTY*/
2235 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2236 		    "Done %s.\n", __func__);
2237 	}
2238 
2239 	return rval;
2240 }
2241 
2242 /*
2243  * qla2x00_full_login_lip
2244  *	Issue full login LIP mailbox command.
2245  *
2246  * Input:
2247  *	ha = adapter block pointer.
2248  *	TARGET_QUEUE_LOCK must be released.
2249  *	ADAPTER_STATE_LOCK must be released.
2250  *
2251  * Returns:
2252  *	qla2x00 local function return status code.
2253  *
2254  * Context:
2255  *	Kernel context.
2256  */
2257 int
2258 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2259 {
2260 	int rval;
2261 	mbx_cmd_t mc;
2262 	mbx_cmd_t *mcp = &mc;
2263 
2264 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2265 	    "Entered %s.\n", __func__);
2266 
2267 	mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2268 	mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2269 	mcp->mb[2] = 0;
2270 	mcp->mb[3] = 0;
2271 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2272 	mcp->in_mb = MBX_0;
2273 	mcp->tov = MBX_TOV_SECONDS;
2274 	mcp->flags = 0;
2275 	rval = qla2x00_mailbox_command(vha, mcp);
2276 
2277 	if (rval != QLA_SUCCESS) {
2278 		/*EMPTY*/
2279 		ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2280 	} else {
2281 		/*EMPTY*/
2282 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2283 		    "Done %s.\n", __func__);
2284 	}
2285 
2286 	return rval;
2287 }
2288 
2289 /*
2290  * qla2x00_get_id_list
2291  *
2292  * Input:
2293  *	ha = adapter block pointer.
2294  *
2295  * Returns:
2296  *	qla2x00 local function return status code.
2297  *
2298  * Context:
2299  *	Kernel context.
2300  */
2301 int
2302 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2303     uint16_t *entries)
2304 {
2305 	int rval;
2306 	mbx_cmd_t mc;
2307 	mbx_cmd_t *mcp = &mc;
2308 
2309 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2310 	    "Entered %s.\n", __func__);
2311 
2312 	if (id_list == NULL)
2313 		return QLA_FUNCTION_FAILED;
2314 
2315 	mcp->mb[0] = MBC_GET_ID_LIST;
2316 	mcp->out_mb = MBX_0;
2317 	if (IS_FWI2_CAPABLE(vha->hw)) {
2318 		mcp->mb[2] = MSW(id_list_dma);
2319 		mcp->mb[3] = LSW(id_list_dma);
2320 		mcp->mb[6] = MSW(MSD(id_list_dma));
2321 		mcp->mb[7] = LSW(MSD(id_list_dma));
2322 		mcp->mb[8] = 0;
2323 		mcp->mb[9] = vha->vp_idx;
2324 		mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2325 	} else {
2326 		mcp->mb[1] = MSW(id_list_dma);
2327 		mcp->mb[2] = LSW(id_list_dma);
2328 		mcp->mb[3] = MSW(MSD(id_list_dma));
2329 		mcp->mb[6] = LSW(MSD(id_list_dma));
2330 		mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2331 	}
2332 	mcp->in_mb = MBX_1|MBX_0;
2333 	mcp->tov = MBX_TOV_SECONDS;
2334 	mcp->flags = 0;
2335 	rval = qla2x00_mailbox_command(vha, mcp);
2336 
2337 	if (rval != QLA_SUCCESS) {
2338 		/*EMPTY*/
2339 		ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2340 	} else {
2341 		*entries = mcp->mb[1];
2342 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2343 		    "Done %s.\n", __func__);
2344 	}
2345 
2346 	return rval;
2347 }
2348 
2349 /*
2350  * qla2x00_get_resource_cnts
2351  *	Get current firmware resource counts.
2352  *
2353  * Input:
2354  *	ha = adapter block pointer.
2355  *
2356  * Returns:
2357  *	qla2x00 local function return status code.
2358  *
2359  * Context:
2360  *	Kernel context.
2361  */
2362 int
2363 qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
2364     uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
2365     uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
2366 {
2367 	int rval;
2368 	mbx_cmd_t mc;
2369 	mbx_cmd_t *mcp = &mc;
2370 
2371 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2372 	    "Entered %s.\n", __func__);
2373 
2374 	mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2375 	mcp->out_mb = MBX_0;
2376 	mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2377 	if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw))
2378 		mcp->in_mb |= MBX_12;
2379 	mcp->tov = MBX_TOV_SECONDS;
2380 	mcp->flags = 0;
2381 	rval = qla2x00_mailbox_command(vha, mcp);
2382 
2383 	if (rval != QLA_SUCCESS) {
2384 		/*EMPTY*/
2385 		ql_dbg(ql_dbg_mbx, vha, 0x107d,
2386 		    "Failed mb[0]=%x.\n", mcp->mb[0]);
2387 	} else {
2388 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2389 		    "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2390 		    "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2391 		    mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2392 		    mcp->mb[11], mcp->mb[12]);
2393 
2394 		if (cur_xchg_cnt)
2395 			*cur_xchg_cnt = mcp->mb[3];
2396 		if (orig_xchg_cnt)
2397 			*orig_xchg_cnt = mcp->mb[6];
2398 		if (cur_iocb_cnt)
2399 			*cur_iocb_cnt = mcp->mb[7];
2400 		if (orig_iocb_cnt)
2401 			*orig_iocb_cnt = mcp->mb[10];
2402 		if (vha->hw->flags.npiv_supported && max_npiv_vports)
2403 			*max_npiv_vports = mcp->mb[11];
2404 		if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
2405 			*max_fcfs = mcp->mb[12];
2406 	}
2407 
2408 	return (rval);
2409 }
2410 
2411 /*
2412  * qla2x00_get_fcal_position_map
2413  *	Get FCAL (LILP) position map using mailbox command
2414  *
2415  * Input:
2416  *	ha = adapter state pointer.
2417  *	pos_map = buffer pointer (can be NULL).
2418  *
2419  * Returns:
2420  *	qla2x00 local function return status code.
2421  *
2422  * Context:
2423  *	Kernel context.
2424  */
2425 int
2426 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2427 {
2428 	int rval;
2429 	mbx_cmd_t mc;
2430 	mbx_cmd_t *mcp = &mc;
2431 	char *pmap;
2432 	dma_addr_t pmap_dma;
2433 	struct qla_hw_data *ha = vha->hw;
2434 
2435 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2436 	    "Entered %s.\n", __func__);
2437 
2438 	pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2439 	if (pmap  == NULL) {
2440 		ql_log(ql_log_warn, vha, 0x1080,
2441 		    "Memory alloc failed.\n");
2442 		return QLA_MEMORY_ALLOC_FAILED;
2443 	}
2444 	memset(pmap, 0, FCAL_MAP_SIZE);
2445 
2446 	mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2447 	mcp->mb[2] = MSW(pmap_dma);
2448 	mcp->mb[3] = LSW(pmap_dma);
2449 	mcp->mb[6] = MSW(MSD(pmap_dma));
2450 	mcp->mb[7] = LSW(MSD(pmap_dma));
2451 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2452 	mcp->in_mb = MBX_1|MBX_0;
2453 	mcp->buf_size = FCAL_MAP_SIZE;
2454 	mcp->flags = MBX_DMA_IN;
2455 	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2456 	rval = qla2x00_mailbox_command(vha, mcp);
2457 
2458 	if (rval == QLA_SUCCESS) {
2459 		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2460 		    "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2461 		    mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2462 		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2463 		    pmap, pmap[0] + 1);
2464 
2465 		if (pos_map)
2466 			memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2467 	}
2468 	dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2469 
2470 	if (rval != QLA_SUCCESS) {
2471 		ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2472 	} else {
2473 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2474 		    "Done %s.\n", __func__);
2475 	}
2476 
2477 	return rval;
2478 }
2479 
2480 /*
2481  * qla2x00_get_link_status
2482  *
2483  * Input:
2484  *	ha = adapter block pointer.
2485  *	loop_id = device loop ID.
2486  *	ret_buf = pointer to link status return buffer.
2487  *
2488  * Returns:
2489  *	0 = success.
2490  *	BIT_0 = mem alloc error.
2491  *	BIT_1 = mailbox error.
2492  */
2493 int
2494 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2495     struct link_statistics *stats, dma_addr_t stats_dma)
2496 {
2497 	int rval;
2498 	mbx_cmd_t mc;
2499 	mbx_cmd_t *mcp = &mc;
2500 	uint32_t *siter, *diter, dwords;
2501 	struct qla_hw_data *ha = vha->hw;
2502 
2503 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2504 	    "Entered %s.\n", __func__);
2505 
2506 	mcp->mb[0] = MBC_GET_LINK_STATUS;
2507 	mcp->mb[2] = MSW(stats_dma);
2508 	mcp->mb[3] = LSW(stats_dma);
2509 	mcp->mb[6] = MSW(MSD(stats_dma));
2510 	mcp->mb[7] = LSW(MSD(stats_dma));
2511 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2512 	mcp->in_mb = MBX_0;
2513 	if (IS_FWI2_CAPABLE(ha)) {
2514 		mcp->mb[1] = loop_id;
2515 		mcp->mb[4] = 0;
2516 		mcp->mb[10] = 0;
2517 		mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2518 		mcp->in_mb |= MBX_1;
2519 	} else if (HAS_EXTENDED_IDS(ha)) {
2520 		mcp->mb[1] = loop_id;
2521 		mcp->mb[10] = 0;
2522 		mcp->out_mb |= MBX_10|MBX_1;
2523 	} else {
2524 		mcp->mb[1] = loop_id << 8;
2525 		mcp->out_mb |= MBX_1;
2526 	}
2527 	mcp->tov = MBX_TOV_SECONDS;
2528 	mcp->flags = IOCTL_CMD;
2529 	rval = qla2x00_mailbox_command(vha, mcp);
2530 
2531 	if (rval == QLA_SUCCESS) {
2532 		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2533 			ql_dbg(ql_dbg_mbx, vha, 0x1085,
2534 			    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2535 			rval = QLA_FUNCTION_FAILED;
2536 		} else {
2537 			/* Copy over data -- firmware data is LE. */
2538 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2539 			    "Done %s.\n", __func__);
2540 			dwords = offsetof(struct link_statistics, unused1) / 4;
2541 			siter = diter = &stats->link_fail_cnt;
2542 			while (dwords--)
2543 				*diter++ = le32_to_cpu(*siter++);
2544 		}
2545 	} else {
2546 		/* Failed. */
2547 		ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2548 	}
2549 
2550 	return rval;
2551 }
2552 
2553 int
2554 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2555     dma_addr_t stats_dma)
2556 {
2557 	int rval;
2558 	mbx_cmd_t mc;
2559 	mbx_cmd_t *mcp = &mc;
2560 	uint32_t *siter, *diter, dwords;
2561 
2562 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2563 	    "Entered %s.\n", __func__);
2564 
2565 	mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2566 	mcp->mb[2] = MSW(stats_dma);
2567 	mcp->mb[3] = LSW(stats_dma);
2568 	mcp->mb[6] = MSW(MSD(stats_dma));
2569 	mcp->mb[7] = LSW(MSD(stats_dma));
2570 	mcp->mb[8] = sizeof(struct link_statistics) / 4;
2571 	mcp->mb[9] = vha->vp_idx;
2572 	mcp->mb[10] = 0;
2573 	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2574 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
2575 	mcp->tov = MBX_TOV_SECONDS;
2576 	mcp->flags = IOCTL_CMD;
2577 	rval = qla2x00_mailbox_command(vha, mcp);
2578 
2579 	if (rval == QLA_SUCCESS) {
2580 		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2581 			ql_dbg(ql_dbg_mbx, vha, 0x1089,
2582 			    "Failed mb[0]=%x.\n", mcp->mb[0]);
2583 			rval = QLA_FUNCTION_FAILED;
2584 		} else {
2585 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2586 			    "Done %s.\n", __func__);
2587 			/* Copy over data -- firmware data is LE. */
2588 			dwords = sizeof(struct link_statistics) / 4;
2589 			siter = diter = &stats->link_fail_cnt;
2590 			while (dwords--)
2591 				*diter++ = le32_to_cpu(*siter++);
2592 		}
2593 	} else {
2594 		/* Failed. */
2595 		ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2596 	}
2597 
2598 	return rval;
2599 }
2600 
2601 int
2602 qla24xx_abort_command(srb_t *sp)
2603 {
2604 	int		rval;
2605 	unsigned long   flags = 0;
2606 
2607 	struct abort_entry_24xx *abt;
2608 	dma_addr_t	abt_dma;
2609 	uint32_t	handle;
2610 	fc_port_t	*fcport = sp->fcport;
2611 	struct scsi_qla_host *vha = fcport->vha;
2612 	struct qla_hw_data *ha = vha->hw;
2613 	struct req_que *req = vha->req;
2614 
2615 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2616 	    "Entered %s.\n", __func__);
2617 
2618 	if (ql2xasynctmfenable)
2619 		return qla24xx_async_abort_command(sp);
2620 
2621 	spin_lock_irqsave(&ha->hardware_lock, flags);
2622 	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2623 		if (req->outstanding_cmds[handle] == sp)
2624 			break;
2625 	}
2626 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2627 	if (handle == req->num_outstanding_cmds) {
2628 		/* Command not found. */
2629 		return QLA_FUNCTION_FAILED;
2630 	}
2631 
2632 	abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2633 	if (abt == NULL) {
2634 		ql_log(ql_log_warn, vha, 0x108d,
2635 		    "Failed to allocate abort IOCB.\n");
2636 		return QLA_MEMORY_ALLOC_FAILED;
2637 	}
2638 	memset(abt, 0, sizeof(struct abort_entry_24xx));
2639 
2640 	abt->entry_type = ABORT_IOCB_TYPE;
2641 	abt->entry_count = 1;
2642 	abt->handle = MAKE_HANDLE(req->id, abt->handle);
2643 	abt->nport_handle = cpu_to_le16(fcport->loop_id);
2644 	abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2645 	abt->port_id[0] = fcport->d_id.b.al_pa;
2646 	abt->port_id[1] = fcport->d_id.b.area;
2647 	abt->port_id[2] = fcport->d_id.b.domain;
2648 	abt->vp_index = fcport->vha->vp_idx;
2649 
2650 	abt->req_que_no = cpu_to_le16(req->id);
2651 
2652 	rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2653 	if (rval != QLA_SUCCESS) {
2654 		ql_dbg(ql_dbg_mbx, vha, 0x108e,
2655 		    "Failed to issue IOCB (%x).\n", rval);
2656 	} else if (abt->entry_status != 0) {
2657 		ql_dbg(ql_dbg_mbx, vha, 0x108f,
2658 		    "Failed to complete IOCB -- error status (%x).\n",
2659 		    abt->entry_status);
2660 		rval = QLA_FUNCTION_FAILED;
2661 	} else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
2662 		ql_dbg(ql_dbg_mbx, vha, 0x1090,
2663 		    "Failed to complete IOCB -- completion status (%x).\n",
2664 		    le16_to_cpu(abt->nport_handle));
2665 		if (abt->nport_handle == CS_IOCB_ERROR)
2666 			rval = QLA_FUNCTION_PARAMETER_ERROR;
2667 		else
2668 			rval = QLA_FUNCTION_FAILED;
2669 	} else {
2670 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2671 		    "Done %s.\n", __func__);
2672 	}
2673 
2674 	dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2675 
2676 	return rval;
2677 }
2678 
2679 struct tsk_mgmt_cmd {
2680 	union {
2681 		struct tsk_mgmt_entry tsk;
2682 		struct sts_entry_24xx sts;
2683 	} p;
2684 };
2685 
2686 static int
2687 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2688     uint64_t l, int tag)
2689 {
2690 	int		rval, rval2;
2691 	struct tsk_mgmt_cmd *tsk;
2692 	struct sts_entry_24xx *sts;
2693 	dma_addr_t	tsk_dma;
2694 	scsi_qla_host_t *vha;
2695 	struct qla_hw_data *ha;
2696 	struct req_que *req;
2697 	struct rsp_que *rsp;
2698 
2699 	vha = fcport->vha;
2700 	ha = vha->hw;
2701 	req = vha->req;
2702 
2703 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2704 	    "Entered %s.\n", __func__);
2705 
2706 	if (ha->flags.cpu_affinity_enabled)
2707 		rsp = ha->rsp_q_map[tag + 1];
2708 	else
2709 		rsp = req->rsp;
2710 	tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
2711 	if (tsk == NULL) {
2712 		ql_log(ql_log_warn, vha, 0x1093,
2713 		    "Failed to allocate task management IOCB.\n");
2714 		return QLA_MEMORY_ALLOC_FAILED;
2715 	}
2716 	memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
2717 
2718 	tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
2719 	tsk->p.tsk.entry_count = 1;
2720 	tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
2721 	tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
2722 	tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
2723 	tsk->p.tsk.control_flags = cpu_to_le32(type);
2724 	tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
2725 	tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
2726 	tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
2727 	tsk->p.tsk.vp_index = fcport->vha->vp_idx;
2728 	if (type == TCF_LUN_RESET) {
2729 		int_to_scsilun(l, &tsk->p.tsk.lun);
2730 		host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
2731 		    sizeof(tsk->p.tsk.lun));
2732 	}
2733 
2734 	sts = &tsk->p.sts;
2735 	rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
2736 	if (rval != QLA_SUCCESS) {
2737 		ql_dbg(ql_dbg_mbx, vha, 0x1094,
2738 		    "Failed to issue %s reset IOCB (%x).\n", name, rval);
2739 	} else if (sts->entry_status != 0) {
2740 		ql_dbg(ql_dbg_mbx, vha, 0x1095,
2741 		    "Failed to complete IOCB -- error status (%x).\n",
2742 		    sts->entry_status);
2743 		rval = QLA_FUNCTION_FAILED;
2744 	} else if (sts->comp_status !=
2745 	    __constant_cpu_to_le16(CS_COMPLETE)) {
2746 		ql_dbg(ql_dbg_mbx, vha, 0x1096,
2747 		    "Failed to complete IOCB -- completion status (%x).\n",
2748 		    le16_to_cpu(sts->comp_status));
2749 		rval = QLA_FUNCTION_FAILED;
2750 	} else if (le16_to_cpu(sts->scsi_status) &
2751 	    SS_RESPONSE_INFO_LEN_VALID) {
2752 		if (le32_to_cpu(sts->rsp_data_len) < 4) {
2753 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
2754 			    "Ignoring inconsistent data length -- not enough "
2755 			    "response info (%d).\n",
2756 			    le32_to_cpu(sts->rsp_data_len));
2757 		} else if (sts->data[3]) {
2758 			ql_dbg(ql_dbg_mbx, vha, 0x1098,
2759 			    "Failed to complete IOCB -- response (%x).\n",
2760 			    sts->data[3]);
2761 			rval = QLA_FUNCTION_FAILED;
2762 		}
2763 	}
2764 
2765 	/* Issue marker IOCB. */
2766 	rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
2767 	    type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
2768 	if (rval2 != QLA_SUCCESS) {
2769 		ql_dbg(ql_dbg_mbx, vha, 0x1099,
2770 		    "Failed to issue marker IOCB (%x).\n", rval2);
2771 	} else {
2772 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
2773 		    "Done %s.\n", __func__);
2774 	}
2775 
2776 	dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
2777 
2778 	return rval;
2779 }
2780 
2781 int
2782 qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
2783 {
2784 	struct qla_hw_data *ha = fcport->vha->hw;
2785 
2786 	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2787 		return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
2788 
2789 	return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
2790 }
2791 
2792 int
2793 qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
2794 {
2795 	struct qla_hw_data *ha = fcport->vha->hw;
2796 
2797 	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2798 		return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
2799 
2800 	return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
2801 }
2802 
2803 int
2804 qla2x00_system_error(scsi_qla_host_t *vha)
2805 {
2806 	int rval;
2807 	mbx_cmd_t mc;
2808 	mbx_cmd_t *mcp = &mc;
2809 	struct qla_hw_data *ha = vha->hw;
2810 
2811 	if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
2812 		return QLA_FUNCTION_FAILED;
2813 
2814 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
2815 	    "Entered %s.\n", __func__);
2816 
2817 	mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
2818 	mcp->out_mb = MBX_0;
2819 	mcp->in_mb = MBX_0;
2820 	mcp->tov = 5;
2821 	mcp->flags = 0;
2822 	rval = qla2x00_mailbox_command(vha, mcp);
2823 
2824 	if (rval != QLA_SUCCESS) {
2825 		ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
2826 	} else {
2827 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
2828 		    "Done %s.\n", __func__);
2829 	}
2830 
2831 	return rval;
2832 }
2833 
2834 int
2835 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
2836 {
2837 	int rval;
2838 	mbx_cmd_t mc;
2839 	mbx_cmd_t *mcp = &mc;
2840 
2841 	if (!IS_QLA2031(vha->hw))
2842 		return QLA_FUNCTION_FAILED;
2843 
2844 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
2845 	    "Entered %s.\n", __func__);
2846 
2847 	mcp->mb[0] = MBC_WRITE_SERDES;
2848 	mcp->mb[1] = addr;
2849 	mcp->mb[2] = data & 0xff;
2850 	mcp->mb[3] = 0;
2851 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2852 	mcp->in_mb = MBX_0;
2853 	mcp->tov = MBX_TOV_SECONDS;
2854 	mcp->flags = 0;
2855 	rval = qla2x00_mailbox_command(vha, mcp);
2856 
2857 	if (rval != QLA_SUCCESS) {
2858 		ql_dbg(ql_dbg_mbx, vha, 0x1183,
2859 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2860 	} else {
2861 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
2862 		    "Done %s.\n", __func__);
2863 	}
2864 
2865 	return rval;
2866 }
2867 
2868 int
2869 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
2870 {
2871 	int rval;
2872 	mbx_cmd_t mc;
2873 	mbx_cmd_t *mcp = &mc;
2874 
2875 	if (!IS_QLA2031(vha->hw))
2876 		return QLA_FUNCTION_FAILED;
2877 
2878 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
2879 	    "Entered %s.\n", __func__);
2880 
2881 	mcp->mb[0] = MBC_READ_SERDES;
2882 	mcp->mb[1] = addr;
2883 	mcp->mb[3] = 0;
2884 	mcp->out_mb = MBX_3|MBX_1|MBX_0;
2885 	mcp->in_mb = MBX_1|MBX_0;
2886 	mcp->tov = MBX_TOV_SECONDS;
2887 	mcp->flags = 0;
2888 	rval = qla2x00_mailbox_command(vha, mcp);
2889 
2890 	*data = mcp->mb[1] & 0xff;
2891 
2892 	if (rval != QLA_SUCCESS) {
2893 		ql_dbg(ql_dbg_mbx, vha, 0x1186,
2894 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2895 	} else {
2896 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
2897 		    "Done %s.\n", __func__);
2898 	}
2899 
2900 	return rval;
2901 }
2902 
2903 int
2904 qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
2905 {
2906 	int rval;
2907 	mbx_cmd_t mc;
2908 	mbx_cmd_t *mcp = &mc;
2909 
2910 	if (!IS_QLA8044(vha->hw))
2911 		return QLA_FUNCTION_FAILED;
2912 
2913 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1186,
2914 	    "Entered %s.\n", __func__);
2915 
2916 	mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
2917 	mcp->mb[1] = HCS_WRITE_SERDES;
2918 	mcp->mb[3] = LSW(addr);
2919 	mcp->mb[4] = MSW(addr);
2920 	mcp->mb[5] = LSW(data);
2921 	mcp->mb[6] = MSW(data);
2922 	mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
2923 	mcp->in_mb = MBX_0;
2924 	mcp->tov = MBX_TOV_SECONDS;
2925 	mcp->flags = 0;
2926 	rval = qla2x00_mailbox_command(vha, mcp);
2927 
2928 	if (rval != QLA_SUCCESS) {
2929 		ql_dbg(ql_dbg_mbx, vha, 0x1187,
2930 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2931 	} else {
2932 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
2933 		    "Done %s.\n", __func__);
2934 	}
2935 
2936 	return rval;
2937 }
2938 
2939 int
2940 qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
2941 {
2942 	int rval;
2943 	mbx_cmd_t mc;
2944 	mbx_cmd_t *mcp = &mc;
2945 
2946 	if (!IS_QLA8044(vha->hw))
2947 		return QLA_FUNCTION_FAILED;
2948 
2949 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
2950 	    "Entered %s.\n", __func__);
2951 
2952 	mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
2953 	mcp->mb[1] = HCS_READ_SERDES;
2954 	mcp->mb[3] = LSW(addr);
2955 	mcp->mb[4] = MSW(addr);
2956 	mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
2957 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
2958 	mcp->tov = MBX_TOV_SECONDS;
2959 	mcp->flags = 0;
2960 	rval = qla2x00_mailbox_command(vha, mcp);
2961 
2962 	*data = mcp->mb[2] << 16 | mcp->mb[1];
2963 
2964 	if (rval != QLA_SUCCESS) {
2965 		ql_dbg(ql_dbg_mbx, vha, 0x118a,
2966 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2967 	} else {
2968 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
2969 		    "Done %s.\n", __func__);
2970 	}
2971 
2972 	return rval;
2973 }
2974 
2975 /**
2976  * qla2x00_set_serdes_params() -
2977  * @ha: HA context
2978  *
2979  * Returns
2980  */
2981 int
2982 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
2983     uint16_t sw_em_2g, uint16_t sw_em_4g)
2984 {
2985 	int rval;
2986 	mbx_cmd_t mc;
2987 	mbx_cmd_t *mcp = &mc;
2988 
2989 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
2990 	    "Entered %s.\n", __func__);
2991 
2992 	mcp->mb[0] = MBC_SERDES_PARAMS;
2993 	mcp->mb[1] = BIT_0;
2994 	mcp->mb[2] = sw_em_1g | BIT_15;
2995 	mcp->mb[3] = sw_em_2g | BIT_15;
2996 	mcp->mb[4] = sw_em_4g | BIT_15;
2997 	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2998 	mcp->in_mb = MBX_0;
2999 	mcp->tov = MBX_TOV_SECONDS;
3000 	mcp->flags = 0;
3001 	rval = qla2x00_mailbox_command(vha, mcp);
3002 
3003 	if (rval != QLA_SUCCESS) {
3004 		/*EMPTY*/
3005 		ql_dbg(ql_dbg_mbx, vha, 0x109f,
3006 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3007 	} else {
3008 		/*EMPTY*/
3009 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
3010 		    "Done %s.\n", __func__);
3011 	}
3012 
3013 	return rval;
3014 }
3015 
3016 int
3017 qla2x00_stop_firmware(scsi_qla_host_t *vha)
3018 {
3019 	int rval;
3020 	mbx_cmd_t mc;
3021 	mbx_cmd_t *mcp = &mc;
3022 
3023 	if (!IS_FWI2_CAPABLE(vha->hw))
3024 		return QLA_FUNCTION_FAILED;
3025 
3026 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
3027 	    "Entered %s.\n", __func__);
3028 
3029 	mcp->mb[0] = MBC_STOP_FIRMWARE;
3030 	mcp->mb[1] = 0;
3031 	mcp->out_mb = MBX_1|MBX_0;
3032 	mcp->in_mb = MBX_0;
3033 	mcp->tov = 5;
3034 	mcp->flags = 0;
3035 	rval = qla2x00_mailbox_command(vha, mcp);
3036 
3037 	if (rval != QLA_SUCCESS) {
3038 		ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3039 		if (mcp->mb[0] == MBS_INVALID_COMMAND)
3040 			rval = QLA_INVALID_COMMAND;
3041 	} else {
3042 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
3043 		    "Done %s.\n", __func__);
3044 	}
3045 
3046 	return rval;
3047 }
3048 
3049 int
3050 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3051     uint16_t buffers)
3052 {
3053 	int rval;
3054 	mbx_cmd_t mc;
3055 	mbx_cmd_t *mcp = &mc;
3056 
3057 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
3058 	    "Entered %s.\n", __func__);
3059 
3060 	if (!IS_FWI2_CAPABLE(vha->hw))
3061 		return QLA_FUNCTION_FAILED;
3062 
3063 	if (unlikely(pci_channel_offline(vha->hw->pdev)))
3064 		return QLA_FUNCTION_FAILED;
3065 
3066 	mcp->mb[0] = MBC_TRACE_CONTROL;
3067 	mcp->mb[1] = TC_EFT_ENABLE;
3068 	mcp->mb[2] = LSW(eft_dma);
3069 	mcp->mb[3] = MSW(eft_dma);
3070 	mcp->mb[4] = LSW(MSD(eft_dma));
3071 	mcp->mb[5] = MSW(MSD(eft_dma));
3072 	mcp->mb[6] = buffers;
3073 	mcp->mb[7] = TC_AEN_DISABLE;
3074 	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3075 	mcp->in_mb = MBX_1|MBX_0;
3076 	mcp->tov = MBX_TOV_SECONDS;
3077 	mcp->flags = 0;
3078 	rval = qla2x00_mailbox_command(vha, mcp);
3079 	if (rval != QLA_SUCCESS) {
3080 		ql_dbg(ql_dbg_mbx, vha, 0x10a5,
3081 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3082 		    rval, mcp->mb[0], mcp->mb[1]);
3083 	} else {
3084 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
3085 		    "Done %s.\n", __func__);
3086 	}
3087 
3088 	return rval;
3089 }
3090 
3091 int
3092 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3093 {
3094 	int rval;
3095 	mbx_cmd_t mc;
3096 	mbx_cmd_t *mcp = &mc;
3097 
3098 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
3099 	    "Entered %s.\n", __func__);
3100 
3101 	if (!IS_FWI2_CAPABLE(vha->hw))
3102 		return QLA_FUNCTION_FAILED;
3103 
3104 	if (unlikely(pci_channel_offline(vha->hw->pdev)))
3105 		return QLA_FUNCTION_FAILED;
3106 
3107 	mcp->mb[0] = MBC_TRACE_CONTROL;
3108 	mcp->mb[1] = TC_EFT_DISABLE;
3109 	mcp->out_mb = MBX_1|MBX_0;
3110 	mcp->in_mb = MBX_1|MBX_0;
3111 	mcp->tov = MBX_TOV_SECONDS;
3112 	mcp->flags = 0;
3113 	rval = qla2x00_mailbox_command(vha, mcp);
3114 	if (rval != QLA_SUCCESS) {
3115 		ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3116 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3117 		    rval, mcp->mb[0], mcp->mb[1]);
3118 	} else {
3119 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3120 		    "Done %s.\n", __func__);
3121 	}
3122 
3123 	return rval;
3124 }
3125 
3126 int
3127 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3128     uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3129 {
3130 	int rval;
3131 	mbx_cmd_t mc;
3132 	mbx_cmd_t *mcp = &mc;
3133 
3134 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3135 	    "Entered %s.\n", __func__);
3136 
3137 	if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3138 	    !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
3139 		return QLA_FUNCTION_FAILED;
3140 
3141 	if (unlikely(pci_channel_offline(vha->hw->pdev)))
3142 		return QLA_FUNCTION_FAILED;
3143 
3144 	mcp->mb[0] = MBC_TRACE_CONTROL;
3145 	mcp->mb[1] = TC_FCE_ENABLE;
3146 	mcp->mb[2] = LSW(fce_dma);
3147 	mcp->mb[3] = MSW(fce_dma);
3148 	mcp->mb[4] = LSW(MSD(fce_dma));
3149 	mcp->mb[5] = MSW(MSD(fce_dma));
3150 	mcp->mb[6] = buffers;
3151 	mcp->mb[7] = TC_AEN_DISABLE;
3152 	mcp->mb[8] = 0;
3153 	mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3154 	mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3155 	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3156 	    MBX_1|MBX_0;
3157 	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3158 	mcp->tov = MBX_TOV_SECONDS;
3159 	mcp->flags = 0;
3160 	rval = qla2x00_mailbox_command(vha, mcp);
3161 	if (rval != QLA_SUCCESS) {
3162 		ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3163 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3164 		    rval, mcp->mb[0], mcp->mb[1]);
3165 	} else {
3166 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3167 		    "Done %s.\n", __func__);
3168 
3169 		if (mb)
3170 			memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3171 		if (dwords)
3172 			*dwords = buffers;
3173 	}
3174 
3175 	return rval;
3176 }
3177 
3178 int
3179 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3180 {
3181 	int rval;
3182 	mbx_cmd_t mc;
3183 	mbx_cmd_t *mcp = &mc;
3184 
3185 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3186 	    "Entered %s.\n", __func__);
3187 
3188 	if (!IS_FWI2_CAPABLE(vha->hw))
3189 		return QLA_FUNCTION_FAILED;
3190 
3191 	if (unlikely(pci_channel_offline(vha->hw->pdev)))
3192 		return QLA_FUNCTION_FAILED;
3193 
3194 	mcp->mb[0] = MBC_TRACE_CONTROL;
3195 	mcp->mb[1] = TC_FCE_DISABLE;
3196 	mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3197 	mcp->out_mb = MBX_2|MBX_1|MBX_0;
3198 	mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3199 	    MBX_1|MBX_0;
3200 	mcp->tov = MBX_TOV_SECONDS;
3201 	mcp->flags = 0;
3202 	rval = qla2x00_mailbox_command(vha, mcp);
3203 	if (rval != QLA_SUCCESS) {
3204 		ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3205 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3206 		    rval, mcp->mb[0], mcp->mb[1]);
3207 	} else {
3208 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3209 		    "Done %s.\n", __func__);
3210 
3211 		if (wr)
3212 			*wr = (uint64_t) mcp->mb[5] << 48 |
3213 			    (uint64_t) mcp->mb[4] << 32 |
3214 			    (uint64_t) mcp->mb[3] << 16 |
3215 			    (uint64_t) mcp->mb[2];
3216 		if (rd)
3217 			*rd = (uint64_t) mcp->mb[9] << 48 |
3218 			    (uint64_t) mcp->mb[8] << 32 |
3219 			    (uint64_t) mcp->mb[7] << 16 |
3220 			    (uint64_t) mcp->mb[6];
3221 	}
3222 
3223 	return rval;
3224 }
3225 
3226 int
3227 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3228 	uint16_t *port_speed, uint16_t *mb)
3229 {
3230 	int rval;
3231 	mbx_cmd_t mc;
3232 	mbx_cmd_t *mcp = &mc;
3233 
3234 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3235 	    "Entered %s.\n", __func__);
3236 
3237 	if (!IS_IIDMA_CAPABLE(vha->hw))
3238 		return QLA_FUNCTION_FAILED;
3239 
3240 	mcp->mb[0] = MBC_PORT_PARAMS;
3241 	mcp->mb[1] = loop_id;
3242 	mcp->mb[2] = mcp->mb[3] = 0;
3243 	mcp->mb[9] = vha->vp_idx;
3244 	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3245 	mcp->in_mb = MBX_3|MBX_1|MBX_0;
3246 	mcp->tov = MBX_TOV_SECONDS;
3247 	mcp->flags = 0;
3248 	rval = qla2x00_mailbox_command(vha, mcp);
3249 
3250 	/* Return mailbox statuses. */
3251 	if (mb != NULL) {
3252 		mb[0] = mcp->mb[0];
3253 		mb[1] = mcp->mb[1];
3254 		mb[3] = mcp->mb[3];
3255 	}
3256 
3257 	if (rval != QLA_SUCCESS) {
3258 		ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3259 	} else {
3260 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3261 		    "Done %s.\n", __func__);
3262 		if (port_speed)
3263 			*port_speed = mcp->mb[3];
3264 	}
3265 
3266 	return rval;
3267 }
3268 
3269 int
3270 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3271     uint16_t port_speed, uint16_t *mb)
3272 {
3273 	int rval;
3274 	mbx_cmd_t mc;
3275 	mbx_cmd_t *mcp = &mc;
3276 
3277 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3278 	    "Entered %s.\n", __func__);
3279 
3280 	if (!IS_IIDMA_CAPABLE(vha->hw))
3281 		return QLA_FUNCTION_FAILED;
3282 
3283 	mcp->mb[0] = MBC_PORT_PARAMS;
3284 	mcp->mb[1] = loop_id;
3285 	mcp->mb[2] = BIT_0;
3286 	if (IS_CNA_CAPABLE(vha->hw))
3287 		mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3288 	else
3289 		mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
3290 	mcp->mb[9] = vha->vp_idx;
3291 	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3292 	mcp->in_mb = MBX_3|MBX_1|MBX_0;
3293 	mcp->tov = MBX_TOV_SECONDS;
3294 	mcp->flags = 0;
3295 	rval = qla2x00_mailbox_command(vha, mcp);
3296 
3297 	/* Return mailbox statuses. */
3298 	if (mb != NULL) {
3299 		mb[0] = mcp->mb[0];
3300 		mb[1] = mcp->mb[1];
3301 		mb[3] = mcp->mb[3];
3302 	}
3303 
3304 	if (rval != QLA_SUCCESS) {
3305 		ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3306 		    "Failed=%x.\n", rval);
3307 	} else {
3308 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3309 		    "Done %s.\n", __func__);
3310 	}
3311 
3312 	return rval;
3313 }
3314 
3315 void
3316 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3317 	struct vp_rpt_id_entry_24xx *rptid_entry)
3318 {
3319 	uint8_t vp_idx;
3320 	uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3321 	struct qla_hw_data *ha = vha->hw;
3322 	scsi_qla_host_t *vp;
3323 	unsigned long   flags;
3324 	int found;
3325 
3326 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3327 	    "Entered %s.\n", __func__);
3328 
3329 	if (rptid_entry->entry_status != 0)
3330 		return;
3331 
3332 	if (rptid_entry->format == 0) {
3333 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3334 		    "Format 0 : Number of VPs setup %d, number of "
3335 		    "VPs acquired %d.\n",
3336 		    MSB(le16_to_cpu(rptid_entry->vp_count)),
3337 		    LSB(le16_to_cpu(rptid_entry->vp_count)));
3338 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3339 		    "Primary port id %02x%02x%02x.\n",
3340 		    rptid_entry->port_id[2], rptid_entry->port_id[1],
3341 		    rptid_entry->port_id[0]);
3342 	} else if (rptid_entry->format == 1) {
3343 		vp_idx = LSB(stat);
3344 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3345 		    "Format 1: VP[%d] enabled - status %d - with "
3346 		    "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3347 		    rptid_entry->port_id[2], rptid_entry->port_id[1],
3348 		    rptid_entry->port_id[0]);
3349 
3350 		/* FA-WWN is only for physical port */
3351 		if (!vp_idx) {
3352 			void *wwpn = ha->init_cb->port_name;
3353 
3354 			if (!MSB(stat)) {
3355 				if (rptid_entry->vp_idx_map[1] & BIT_6)
3356 					wwpn = rptid_entry->reserved_4 + 8;
3357 			}
3358 			memcpy(vha->port_name, wwpn, WWN_SIZE);
3359 			fc_host_port_name(vha->host) =
3360 			    wwn_to_u64(vha->port_name);
3361 			ql_dbg(ql_dbg_mbx, vha, 0x1018,
3362 			    "FA-WWN portname %016llx (%x)\n",
3363 			    fc_host_port_name(vha->host), MSB(stat));
3364 		}
3365 
3366 		vp = vha;
3367 		if (vp_idx == 0)
3368 			goto reg_needed;
3369 
3370 		if (MSB(stat) != 0 && MSB(stat) != 2) {
3371 			ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3372 			    "Could not acquire ID for VP[%d].\n", vp_idx);
3373 			return;
3374 		}
3375 
3376 		found = 0;
3377 		spin_lock_irqsave(&ha->vport_slock, flags);
3378 		list_for_each_entry(vp, &ha->vp_list, list) {
3379 			if (vp_idx == vp->vp_idx) {
3380 				found = 1;
3381 				break;
3382 			}
3383 		}
3384 		spin_unlock_irqrestore(&ha->vport_slock, flags);
3385 
3386 		if (!found)
3387 			return;
3388 
3389 		vp->d_id.b.domain = rptid_entry->port_id[2];
3390 		vp->d_id.b.area =  rptid_entry->port_id[1];
3391 		vp->d_id.b.al_pa = rptid_entry->port_id[0];
3392 
3393 		/*
3394 		 * Cannot configure here as we are still sitting on the
3395 		 * response queue. Handle it in dpc context.
3396 		 */
3397 		set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3398 
3399 reg_needed:
3400 		set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3401 		set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3402 		set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3403 		qla2xxx_wake_dpc(vha);
3404 	}
3405 }
3406 
3407 /*
3408  * qla24xx_modify_vp_config
3409  *	Change VP configuration for vha
3410  *
3411  * Input:
3412  *	vha = adapter block pointer.
3413  *
3414  * Returns:
3415  *	qla2xxx local function return status code.
3416  *
3417  * Context:
3418  *	Kernel context.
3419  */
3420 int
3421 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3422 {
3423 	int		rval;
3424 	struct vp_config_entry_24xx *vpmod;
3425 	dma_addr_t	vpmod_dma;
3426 	struct qla_hw_data *ha = vha->hw;
3427 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3428 
3429 	/* This can be called by the parent */
3430 
3431 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3432 	    "Entered %s.\n", __func__);
3433 
3434 	vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3435 	if (!vpmod) {
3436 		ql_log(ql_log_warn, vha, 0x10bc,
3437 		    "Failed to allocate modify VP IOCB.\n");
3438 		return QLA_MEMORY_ALLOC_FAILED;
3439 	}
3440 
3441 	memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3442 	vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3443 	vpmod->entry_count = 1;
3444 	vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3445 	vpmod->vp_count = 1;
3446 	vpmod->vp_index1 = vha->vp_idx;
3447 	vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3448 
3449 	qlt_modify_vp_config(vha, vpmod);
3450 
3451 	memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3452 	memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3453 	vpmod->entry_count = 1;
3454 
3455 	rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3456 	if (rval != QLA_SUCCESS) {
3457 		ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3458 		    "Failed to issue VP config IOCB (%x).\n", rval);
3459 	} else if (vpmod->comp_status != 0) {
3460 		ql_dbg(ql_dbg_mbx, vha, 0x10be,
3461 		    "Failed to complete IOCB -- error status (%x).\n",
3462 		    vpmod->comp_status);
3463 		rval = QLA_FUNCTION_FAILED;
3464 	} else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3465 		ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3466 		    "Failed to complete IOCB -- completion status (%x).\n",
3467 		    le16_to_cpu(vpmod->comp_status));
3468 		rval = QLA_FUNCTION_FAILED;
3469 	} else {
3470 		/* EMPTY */
3471 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3472 		    "Done %s.\n", __func__);
3473 		fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3474 	}
3475 	dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3476 
3477 	return rval;
3478 }
3479 
3480 /*
3481  * qla24xx_control_vp
3482  *	Enable a virtual port for given host
3483  *
3484  * Input:
3485  *	ha = adapter block pointer.
3486  *	vhba = virtual adapter (unused)
3487  *	index = index number for enabled VP
3488  *
3489  * Returns:
3490  *	qla2xxx local function return status code.
3491  *
3492  * Context:
3493  *	Kernel context.
3494  */
3495 int
3496 qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3497 {
3498 	int		rval;
3499 	int		map, pos;
3500 	struct vp_ctrl_entry_24xx   *vce;
3501 	dma_addr_t	vce_dma;
3502 	struct qla_hw_data *ha = vha->hw;
3503 	int	vp_index = vha->vp_idx;
3504 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3505 
3506 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3507 	    "Entered %s enabling index %d.\n", __func__, vp_index);
3508 
3509 	if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3510 		return QLA_PARAMETER_ERROR;
3511 
3512 	vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3513 	if (!vce) {
3514 		ql_log(ql_log_warn, vha, 0x10c2,
3515 		    "Failed to allocate VP control IOCB.\n");
3516 		return QLA_MEMORY_ALLOC_FAILED;
3517 	}
3518 	memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3519 
3520 	vce->entry_type = VP_CTRL_IOCB_TYPE;
3521 	vce->entry_count = 1;
3522 	vce->command = cpu_to_le16(cmd);
3523 	vce->vp_count = __constant_cpu_to_le16(1);
3524 
3525 	/* index map in firmware starts with 1; decrement index
3526 	 * this is ok as we never use index 0
3527 	 */
3528 	map = (vp_index - 1) / 8;
3529 	pos = (vp_index - 1) & 7;
3530 	mutex_lock(&ha->vport_lock);
3531 	vce->vp_idx_map[map] |= 1 << pos;
3532 	mutex_unlock(&ha->vport_lock);
3533 
3534 	rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3535 	if (rval != QLA_SUCCESS) {
3536 		ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3537 		    "Failed to issue VP control IOCB (%x).\n", rval);
3538 	} else if (vce->entry_status != 0) {
3539 		ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3540 		    "Failed to complete IOCB -- error status (%x).\n",
3541 		    vce->entry_status);
3542 		rval = QLA_FUNCTION_FAILED;
3543 	} else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3544 		ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3545 		    "Failed to complet IOCB -- completion status (%x).\n",
3546 		    le16_to_cpu(vce->comp_status));
3547 		rval = QLA_FUNCTION_FAILED;
3548 	} else {
3549 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3550 		    "Done %s.\n", __func__);
3551 	}
3552 
3553 	dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3554 
3555 	return rval;
3556 }
3557 
3558 /*
3559  * qla2x00_send_change_request
3560  *	Receive or disable RSCN request from fabric controller
3561  *
3562  * Input:
3563  *	ha = adapter block pointer
3564  *	format = registration format:
3565  *		0 - Reserved
3566  *		1 - Fabric detected registration
3567  *		2 - N_port detected registration
3568  *		3 - Full registration
3569  *		FF - clear registration
3570  *	vp_idx = Virtual port index
3571  *
3572  * Returns:
3573  *	qla2x00 local function return status code.
3574  *
3575  * Context:
3576  *	Kernel Context
3577  */
3578 
3579 int
3580 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3581 			    uint16_t vp_idx)
3582 {
3583 	int rval;
3584 	mbx_cmd_t mc;
3585 	mbx_cmd_t *mcp = &mc;
3586 
3587 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3588 	    "Entered %s.\n", __func__);
3589 
3590 	mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3591 	mcp->mb[1] = format;
3592 	mcp->mb[9] = vp_idx;
3593 	mcp->out_mb = MBX_9|MBX_1|MBX_0;
3594 	mcp->in_mb = MBX_0|MBX_1;
3595 	mcp->tov = MBX_TOV_SECONDS;
3596 	mcp->flags = 0;
3597 	rval = qla2x00_mailbox_command(vha, mcp);
3598 
3599 	if (rval == QLA_SUCCESS) {
3600 		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3601 			rval = BIT_1;
3602 		}
3603 	} else
3604 		rval = BIT_1;
3605 
3606 	return rval;
3607 }
3608 
3609 int
3610 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3611     uint32_t size)
3612 {
3613 	int rval;
3614 	mbx_cmd_t mc;
3615 	mbx_cmd_t *mcp = &mc;
3616 
3617 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3618 	    "Entered %s.\n", __func__);
3619 
3620 	if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3621 		mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3622 		mcp->mb[8] = MSW(addr);
3623 		mcp->out_mb = MBX_8|MBX_0;
3624 	} else {
3625 		mcp->mb[0] = MBC_DUMP_RISC_RAM;
3626 		mcp->out_mb = MBX_0;
3627 	}
3628 	mcp->mb[1] = LSW(addr);
3629 	mcp->mb[2] = MSW(req_dma);
3630 	mcp->mb[3] = LSW(req_dma);
3631 	mcp->mb[6] = MSW(MSD(req_dma));
3632 	mcp->mb[7] = LSW(MSD(req_dma));
3633 	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3634 	if (IS_FWI2_CAPABLE(vha->hw)) {
3635 		mcp->mb[4] = MSW(size);
3636 		mcp->mb[5] = LSW(size);
3637 		mcp->out_mb |= MBX_5|MBX_4;
3638 	} else {
3639 		mcp->mb[4] = LSW(size);
3640 		mcp->out_mb |= MBX_4;
3641 	}
3642 
3643 	mcp->in_mb = MBX_0;
3644 	mcp->tov = MBX_TOV_SECONDS;
3645 	mcp->flags = 0;
3646 	rval = qla2x00_mailbox_command(vha, mcp);
3647 
3648 	if (rval != QLA_SUCCESS) {
3649 		ql_dbg(ql_dbg_mbx, vha, 0x1008,
3650 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3651 	} else {
3652 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3653 		    "Done %s.\n", __func__);
3654 	}
3655 
3656 	return rval;
3657 }
3658 /* 84XX Support **************************************************************/
3659 
3660 struct cs84xx_mgmt_cmd {
3661 	union {
3662 		struct verify_chip_entry_84xx req;
3663 		struct verify_chip_rsp_84xx rsp;
3664 	} p;
3665 };
3666 
3667 int
3668 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3669 {
3670 	int rval, retry;
3671 	struct cs84xx_mgmt_cmd *mn;
3672 	dma_addr_t mn_dma;
3673 	uint16_t options;
3674 	unsigned long flags;
3675 	struct qla_hw_data *ha = vha->hw;
3676 
3677 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
3678 	    "Entered %s.\n", __func__);
3679 
3680 	mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
3681 	if (mn == NULL) {
3682 		return QLA_MEMORY_ALLOC_FAILED;
3683 	}
3684 
3685 	/* Force Update? */
3686 	options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
3687 	/* Diagnostic firmware? */
3688 	/* options |= MENLO_DIAG_FW; */
3689 	/* We update the firmware with only one data sequence. */
3690 	options |= VCO_END_OF_DATA;
3691 
3692 	do {
3693 		retry = 0;
3694 		memset(mn, 0, sizeof(*mn));
3695 		mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
3696 		mn->p.req.entry_count = 1;
3697 		mn->p.req.options = cpu_to_le16(options);
3698 
3699 		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
3700 		    "Dump of Verify Request.\n");
3701 		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
3702 		    (uint8_t *)mn, sizeof(*mn));
3703 
3704 		rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
3705 		if (rval != QLA_SUCCESS) {
3706 			ql_dbg(ql_dbg_mbx, vha, 0x10cb,
3707 			    "Failed to issue verify IOCB (%x).\n", rval);
3708 			goto verify_done;
3709 		}
3710 
3711 		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
3712 		    "Dump of Verify Response.\n");
3713 		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
3714 		    (uint8_t *)mn, sizeof(*mn));
3715 
3716 		status[0] = le16_to_cpu(mn->p.rsp.comp_status);
3717 		status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
3718 		    le16_to_cpu(mn->p.rsp.failure_code) : 0;
3719 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
3720 		    "cs=%x fc=%x.\n", status[0], status[1]);
3721 
3722 		if (status[0] != CS_COMPLETE) {
3723 			rval = QLA_FUNCTION_FAILED;
3724 			if (!(options & VCO_DONT_UPDATE_FW)) {
3725 				ql_dbg(ql_dbg_mbx, vha, 0x10cf,
3726 				    "Firmware update failed. Retrying "
3727 				    "without update firmware.\n");
3728 				options |= VCO_DONT_UPDATE_FW;
3729 				options &= ~VCO_FORCE_UPDATE;
3730 				retry = 1;
3731 			}
3732 		} else {
3733 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
3734 			    "Firmware updated to %x.\n",
3735 			    le32_to_cpu(mn->p.rsp.fw_ver));
3736 
3737 			/* NOTE: we only update OP firmware. */
3738 			spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
3739 			ha->cs84xx->op_fw_version =
3740 			    le32_to_cpu(mn->p.rsp.fw_ver);
3741 			spin_unlock_irqrestore(&ha->cs84xx->access_lock,
3742 			    flags);
3743 		}
3744 	} while (retry);
3745 
3746 verify_done:
3747 	dma_pool_free(ha->s_dma_pool, mn, mn_dma);
3748 
3749 	if (rval != QLA_SUCCESS) {
3750 		ql_dbg(ql_dbg_mbx, vha, 0x10d1,
3751 		    "Failed=%x.\n", rval);
3752 	} else {
3753 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
3754 		    "Done %s.\n", __func__);
3755 	}
3756 
3757 	return rval;
3758 }
3759 
3760 int
3761 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
3762 {
3763 	int rval;
3764 	unsigned long flags;
3765 	mbx_cmd_t mc;
3766 	mbx_cmd_t *mcp = &mc;
3767 	struct qla_hw_data *ha = vha->hw;
3768 
3769 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
3770 	    "Entered %s.\n", __func__);
3771 
3772 	if (IS_SHADOW_REG_CAPABLE(ha))
3773 		req->options |= BIT_13;
3774 
3775 	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3776 	mcp->mb[1] = req->options;
3777 	mcp->mb[2] = MSW(LSD(req->dma));
3778 	mcp->mb[3] = LSW(LSD(req->dma));
3779 	mcp->mb[6] = MSW(MSD(req->dma));
3780 	mcp->mb[7] = LSW(MSD(req->dma));
3781 	mcp->mb[5] = req->length;
3782 	if (req->rsp)
3783 		mcp->mb[10] = req->rsp->id;
3784 	mcp->mb[12] = req->qos;
3785 	mcp->mb[11] = req->vp_idx;
3786 	mcp->mb[13] = req->rid;
3787 	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3788 		mcp->mb[15] = 0;
3789 
3790 	mcp->mb[4] = req->id;
3791 	/* que in ptr index */
3792 	mcp->mb[8] = 0;
3793 	/* que out ptr index */
3794 	mcp->mb[9] = *req->out_ptr = 0;
3795 	mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
3796 			MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3797 	mcp->in_mb = MBX_0;
3798 	mcp->flags = MBX_DMA_OUT;
3799 	mcp->tov = MBX_TOV_SECONDS * 2;
3800 
3801 	if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
3802 		mcp->in_mb |= MBX_1;
3803 	if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3804 		mcp->out_mb |= MBX_15;
3805 		/* debug q create issue in SR-IOV */
3806 		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3807 	}
3808 
3809 	spin_lock_irqsave(&ha->hardware_lock, flags);
3810 	if (!(req->options & BIT_0)) {
3811 		WRT_REG_DWORD(req->req_q_in, 0);
3812 		if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
3813 			WRT_REG_DWORD(req->req_q_out, 0);
3814 	}
3815 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3816 
3817 	rval = qla2x00_mailbox_command(vha, mcp);
3818 	if (rval != QLA_SUCCESS) {
3819 		ql_dbg(ql_dbg_mbx, vha, 0x10d4,
3820 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3821 	} else {
3822 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
3823 		    "Done %s.\n", __func__);
3824 	}
3825 
3826 	return rval;
3827 }
3828 
3829 int
3830 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
3831 {
3832 	int rval;
3833 	unsigned long flags;
3834 	mbx_cmd_t mc;
3835 	mbx_cmd_t *mcp = &mc;
3836 	struct qla_hw_data *ha = vha->hw;
3837 
3838 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
3839 	    "Entered %s.\n", __func__);
3840 
3841 	if (IS_SHADOW_REG_CAPABLE(ha))
3842 		rsp->options |= BIT_13;
3843 
3844 	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3845 	mcp->mb[1] = rsp->options;
3846 	mcp->mb[2] = MSW(LSD(rsp->dma));
3847 	mcp->mb[3] = LSW(LSD(rsp->dma));
3848 	mcp->mb[6] = MSW(MSD(rsp->dma));
3849 	mcp->mb[7] = LSW(MSD(rsp->dma));
3850 	mcp->mb[5] = rsp->length;
3851 	mcp->mb[14] = rsp->msix->entry;
3852 	mcp->mb[13] = rsp->rid;
3853 	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3854 		mcp->mb[15] = 0;
3855 
3856 	mcp->mb[4] = rsp->id;
3857 	/* que in ptr index */
3858 	mcp->mb[8] = *rsp->in_ptr = 0;
3859 	/* que out ptr index */
3860 	mcp->mb[9] = 0;
3861 	mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
3862 			|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3863 	mcp->in_mb = MBX_0;
3864 	mcp->flags = MBX_DMA_OUT;
3865 	mcp->tov = MBX_TOV_SECONDS * 2;
3866 
3867 	if (IS_QLA81XX(ha)) {
3868 		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
3869 		mcp->in_mb |= MBX_1;
3870 	} else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3871 		mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
3872 		mcp->in_mb |= MBX_1;
3873 		/* debug q create issue in SR-IOV */
3874 		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3875 	}
3876 
3877 	spin_lock_irqsave(&ha->hardware_lock, flags);
3878 	if (!(rsp->options & BIT_0)) {
3879 		WRT_REG_DWORD(rsp->rsp_q_out, 0);
3880 		if (!IS_QLA83XX(ha))
3881 			WRT_REG_DWORD(rsp->rsp_q_in, 0);
3882 	}
3883 
3884 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3885 
3886 	rval = qla2x00_mailbox_command(vha, mcp);
3887 	if (rval != QLA_SUCCESS) {
3888 		ql_dbg(ql_dbg_mbx, vha, 0x10d7,
3889 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3890 	} else {
3891 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
3892 		    "Done %s.\n", __func__);
3893 	}
3894 
3895 	return rval;
3896 }
3897 
3898 int
3899 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
3900 {
3901 	int rval;
3902 	mbx_cmd_t mc;
3903 	mbx_cmd_t *mcp = &mc;
3904 
3905 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
3906 	    "Entered %s.\n", __func__);
3907 
3908 	mcp->mb[0] = MBC_IDC_ACK;
3909 	memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3910 	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3911 	mcp->in_mb = MBX_0;
3912 	mcp->tov = MBX_TOV_SECONDS;
3913 	mcp->flags = 0;
3914 	rval = qla2x00_mailbox_command(vha, mcp);
3915 
3916 	if (rval != QLA_SUCCESS) {
3917 		ql_dbg(ql_dbg_mbx, vha, 0x10da,
3918 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3919 	} else {
3920 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
3921 		    "Done %s.\n", __func__);
3922 	}
3923 
3924 	return rval;
3925 }
3926 
3927 int
3928 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
3929 {
3930 	int rval;
3931 	mbx_cmd_t mc;
3932 	mbx_cmd_t *mcp = &mc;
3933 
3934 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
3935 	    "Entered %s.\n", __func__);
3936 
3937 	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
3938 	    !IS_QLA27XX(vha->hw))
3939 		return QLA_FUNCTION_FAILED;
3940 
3941 	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3942 	mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
3943 	mcp->out_mb = MBX_1|MBX_0;
3944 	mcp->in_mb = MBX_1|MBX_0;
3945 	mcp->tov = MBX_TOV_SECONDS;
3946 	mcp->flags = 0;
3947 	rval = qla2x00_mailbox_command(vha, mcp);
3948 
3949 	if (rval != QLA_SUCCESS) {
3950 		ql_dbg(ql_dbg_mbx, vha, 0x10dd,
3951 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3952 		    rval, mcp->mb[0], mcp->mb[1]);
3953 	} else {
3954 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
3955 		    "Done %s.\n", __func__);
3956 		*sector_size = mcp->mb[1];
3957 	}
3958 
3959 	return rval;
3960 }
3961 
3962 int
3963 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
3964 {
3965 	int rval;
3966 	mbx_cmd_t mc;
3967 	mbx_cmd_t *mcp = &mc;
3968 
3969 	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
3970 	    !IS_QLA27XX(vha->hw))
3971 		return QLA_FUNCTION_FAILED;
3972 
3973 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
3974 	    "Entered %s.\n", __func__);
3975 
3976 	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3977 	mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
3978 	    FAC_OPT_CMD_WRITE_PROTECT;
3979 	mcp->out_mb = MBX_1|MBX_0;
3980 	mcp->in_mb = MBX_1|MBX_0;
3981 	mcp->tov = MBX_TOV_SECONDS;
3982 	mcp->flags = 0;
3983 	rval = qla2x00_mailbox_command(vha, mcp);
3984 
3985 	if (rval != QLA_SUCCESS) {
3986 		ql_dbg(ql_dbg_mbx, vha, 0x10e0,
3987 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
3988 		    rval, mcp->mb[0], mcp->mb[1]);
3989 	} else {
3990 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
3991 		    "Done %s.\n", __func__);
3992 	}
3993 
3994 	return rval;
3995 }
3996 
3997 int
3998 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
3999 {
4000 	int rval;
4001 	mbx_cmd_t mc;
4002 	mbx_cmd_t *mcp = &mc;
4003 
4004 	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4005 	    !IS_QLA27XX(vha->hw))
4006 		return QLA_FUNCTION_FAILED;
4007 
4008 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4009 	    "Entered %s.\n", __func__);
4010 
4011 	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4012 	mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
4013 	mcp->mb[2] = LSW(start);
4014 	mcp->mb[3] = MSW(start);
4015 	mcp->mb[4] = LSW(finish);
4016 	mcp->mb[5] = MSW(finish);
4017 	mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4018 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
4019 	mcp->tov = MBX_TOV_SECONDS;
4020 	mcp->flags = 0;
4021 	rval = qla2x00_mailbox_command(vha, mcp);
4022 
4023 	if (rval != QLA_SUCCESS) {
4024 		ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4025 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4026 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4027 	} else {
4028 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4029 		    "Done %s.\n", __func__);
4030 	}
4031 
4032 	return rval;
4033 }
4034 
4035 int
4036 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
4037 {
4038 	int rval = 0;
4039 	mbx_cmd_t mc;
4040 	mbx_cmd_t *mcp = &mc;
4041 
4042 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
4043 	    "Entered %s.\n", __func__);
4044 
4045 	mcp->mb[0] = MBC_RESTART_MPI_FW;
4046 	mcp->out_mb = MBX_0;
4047 	mcp->in_mb = MBX_0|MBX_1;
4048 	mcp->tov = MBX_TOV_SECONDS;
4049 	mcp->flags = 0;
4050 	rval = qla2x00_mailbox_command(vha, mcp);
4051 
4052 	if (rval != QLA_SUCCESS) {
4053 		ql_dbg(ql_dbg_mbx, vha, 0x10e6,
4054 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
4055 		    rval, mcp->mb[0], mcp->mb[1]);
4056 	} else {
4057 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
4058 		    "Done %s.\n", __func__);
4059 	}
4060 
4061 	return rval;
4062 }
4063 
4064 int
4065 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4066 {
4067 	int rval;
4068 	mbx_cmd_t mc;
4069 	mbx_cmd_t *mcp = &mc;
4070 	int i;
4071 	int len;
4072 	uint16_t *str;
4073 	struct qla_hw_data *ha = vha->hw;
4074 
4075 	if (!IS_P3P_TYPE(ha))
4076 		return QLA_FUNCTION_FAILED;
4077 
4078 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
4079 	    "Entered %s.\n", __func__);
4080 
4081 	str = (void *)version;
4082 	len = strlen(version);
4083 
4084 	mcp->mb[0] = MBC_SET_RNID_PARAMS;
4085 	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
4086 	mcp->out_mb = MBX_1|MBX_0;
4087 	for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4088 		mcp->mb[i] = cpu_to_le16p(str);
4089 		mcp->out_mb |= 1<<i;
4090 	}
4091 	for (; i < 16; i++) {
4092 		mcp->mb[i] = 0;
4093 		mcp->out_mb |= 1<<i;
4094 	}
4095 	mcp->in_mb = MBX_1|MBX_0;
4096 	mcp->tov = MBX_TOV_SECONDS;
4097 	mcp->flags = 0;
4098 	rval = qla2x00_mailbox_command(vha, mcp);
4099 
4100 	if (rval != QLA_SUCCESS) {
4101 		ql_dbg(ql_dbg_mbx, vha, 0x117c,
4102 		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4103 	} else {
4104 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
4105 		    "Done %s.\n", __func__);
4106 	}
4107 
4108 	return rval;
4109 }
4110 
4111 int
4112 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4113 {
4114 	int rval;
4115 	mbx_cmd_t mc;
4116 	mbx_cmd_t *mcp = &mc;
4117 	int len;
4118 	uint16_t dwlen;
4119 	uint8_t *str;
4120 	dma_addr_t str_dma;
4121 	struct qla_hw_data *ha = vha->hw;
4122 
4123 	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
4124 	    IS_P3P_TYPE(ha))
4125 		return QLA_FUNCTION_FAILED;
4126 
4127 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4128 	    "Entered %s.\n", __func__);
4129 
4130 	str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4131 	if (!str) {
4132 		ql_log(ql_log_warn, vha, 0x117f,
4133 		    "Failed to allocate driver version param.\n");
4134 		return QLA_MEMORY_ALLOC_FAILED;
4135 	}
4136 
4137 	memcpy(str, "\x7\x3\x11\x0", 4);
4138 	dwlen = str[0];
4139 	len = dwlen * 4 - 4;
4140 	memset(str + 4, 0, len);
4141 	if (len > strlen(version))
4142 		len = strlen(version);
4143 	memcpy(str + 4, version, len);
4144 
4145 	mcp->mb[0] = MBC_SET_RNID_PARAMS;
4146 	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4147 	mcp->mb[2] = MSW(LSD(str_dma));
4148 	mcp->mb[3] = LSW(LSD(str_dma));
4149 	mcp->mb[6] = MSW(MSD(str_dma));
4150 	mcp->mb[7] = LSW(MSD(str_dma));
4151 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4152 	mcp->in_mb = MBX_1|MBX_0;
4153 	mcp->tov = MBX_TOV_SECONDS;
4154 	mcp->flags = 0;
4155 	rval = qla2x00_mailbox_command(vha, mcp);
4156 
4157 	if (rval != QLA_SUCCESS) {
4158 		ql_dbg(ql_dbg_mbx, vha, 0x1180,
4159 		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4160 	} else {
4161 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4162 		    "Done %s.\n", __func__);
4163 	}
4164 
4165 	dma_pool_free(ha->s_dma_pool, str, str_dma);
4166 
4167 	return rval;
4168 }
4169 
4170 static int
4171 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
4172 {
4173 	int rval;
4174 	mbx_cmd_t mc;
4175 	mbx_cmd_t *mcp = &mc;
4176 
4177 	if (!IS_FWI2_CAPABLE(vha->hw))
4178 		return QLA_FUNCTION_FAILED;
4179 
4180 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4181 	    "Entered %s.\n", __func__);
4182 
4183 	mcp->mb[0] = MBC_GET_RNID_PARAMS;
4184 	mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
4185 	mcp->out_mb = MBX_1|MBX_0;
4186 	mcp->in_mb = MBX_1|MBX_0;
4187 	mcp->tov = MBX_TOV_SECONDS;
4188 	mcp->flags = 0;
4189 	rval = qla2x00_mailbox_command(vha, mcp);
4190 	*temp = mcp->mb[1];
4191 
4192 	if (rval != QLA_SUCCESS) {
4193 		ql_dbg(ql_dbg_mbx, vha, 0x115a,
4194 		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4195 	} else {
4196 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4197 		    "Done %s.\n", __func__);
4198 	}
4199 
4200 	return rval;
4201 }
4202 
4203 int
4204 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4205 	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4206 {
4207 	int rval;
4208 	mbx_cmd_t mc;
4209 	mbx_cmd_t *mcp = &mc;
4210 	struct qla_hw_data *ha = vha->hw;
4211 
4212 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
4213 	    "Entered %s.\n", __func__);
4214 
4215 	if (!IS_FWI2_CAPABLE(ha))
4216 		return QLA_FUNCTION_FAILED;
4217 
4218 	if (len == 1)
4219 		opt |= BIT_0;
4220 
4221 	mcp->mb[0] = MBC_READ_SFP;
4222 	mcp->mb[1] = dev;
4223 	mcp->mb[2] = MSW(sfp_dma);
4224 	mcp->mb[3] = LSW(sfp_dma);
4225 	mcp->mb[6] = MSW(MSD(sfp_dma));
4226 	mcp->mb[7] = LSW(MSD(sfp_dma));
4227 	mcp->mb[8] = len;
4228 	mcp->mb[9] = off;
4229 	mcp->mb[10] = opt;
4230 	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4231 	mcp->in_mb = MBX_1|MBX_0;
4232 	mcp->tov = MBX_TOV_SECONDS;
4233 	mcp->flags = 0;
4234 	rval = qla2x00_mailbox_command(vha, mcp);
4235 
4236 	if (opt & BIT_0)
4237 		*sfp = mcp->mb[1];
4238 
4239 	if (rval != QLA_SUCCESS) {
4240 		ql_dbg(ql_dbg_mbx, vha, 0x10e9,
4241 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4242 	} else {
4243 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
4244 		    "Done %s.\n", __func__);
4245 	}
4246 
4247 	return rval;
4248 }
4249 
4250 int
4251 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4252 	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4253 {
4254 	int rval;
4255 	mbx_cmd_t mc;
4256 	mbx_cmd_t *mcp = &mc;
4257 	struct qla_hw_data *ha = vha->hw;
4258 
4259 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
4260 	    "Entered %s.\n", __func__);
4261 
4262 	if (!IS_FWI2_CAPABLE(ha))
4263 		return QLA_FUNCTION_FAILED;
4264 
4265 	if (len == 1)
4266 		opt |= BIT_0;
4267 
4268 	if (opt & BIT_0)
4269 		len = *sfp;
4270 
4271 	mcp->mb[0] = MBC_WRITE_SFP;
4272 	mcp->mb[1] = dev;
4273 	mcp->mb[2] = MSW(sfp_dma);
4274 	mcp->mb[3] = LSW(sfp_dma);
4275 	mcp->mb[6] = MSW(MSD(sfp_dma));
4276 	mcp->mb[7] = LSW(MSD(sfp_dma));
4277 	mcp->mb[8] = len;
4278 	mcp->mb[9] = off;
4279 	mcp->mb[10] = opt;
4280 	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4281 	mcp->in_mb = MBX_1|MBX_0;
4282 	mcp->tov = MBX_TOV_SECONDS;
4283 	mcp->flags = 0;
4284 	rval = qla2x00_mailbox_command(vha, mcp);
4285 
4286 	if (rval != QLA_SUCCESS) {
4287 		ql_dbg(ql_dbg_mbx, vha, 0x10ec,
4288 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4289 	} else {
4290 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
4291 		    "Done %s.\n", __func__);
4292 	}
4293 
4294 	return rval;
4295 }
4296 
4297 int
4298 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4299     uint16_t size_in_bytes, uint16_t *actual_size)
4300 {
4301 	int rval;
4302 	mbx_cmd_t mc;
4303 	mbx_cmd_t *mcp = &mc;
4304 
4305 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4306 	    "Entered %s.\n", __func__);
4307 
4308 	if (!IS_CNA_CAPABLE(vha->hw))
4309 		return QLA_FUNCTION_FAILED;
4310 
4311 	mcp->mb[0] = MBC_GET_XGMAC_STATS;
4312 	mcp->mb[2] = MSW(stats_dma);
4313 	mcp->mb[3] = LSW(stats_dma);
4314 	mcp->mb[6] = MSW(MSD(stats_dma));
4315 	mcp->mb[7] = LSW(MSD(stats_dma));
4316 	mcp->mb[8] = size_in_bytes >> 2;
4317 	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4318 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
4319 	mcp->tov = MBX_TOV_SECONDS;
4320 	mcp->flags = 0;
4321 	rval = qla2x00_mailbox_command(vha, mcp);
4322 
4323 	if (rval != QLA_SUCCESS) {
4324 		ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4325 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4326 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4327 	} else {
4328 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4329 		    "Done %s.\n", __func__);
4330 
4331 
4332 		*actual_size = mcp->mb[2] << 2;
4333 	}
4334 
4335 	return rval;
4336 }
4337 
4338 int
4339 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4340     uint16_t size)
4341 {
4342 	int rval;
4343 	mbx_cmd_t mc;
4344 	mbx_cmd_t *mcp = &mc;
4345 
4346 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4347 	    "Entered %s.\n", __func__);
4348 
4349 	if (!IS_CNA_CAPABLE(vha->hw))
4350 		return QLA_FUNCTION_FAILED;
4351 
4352 	mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4353 	mcp->mb[1] = 0;
4354 	mcp->mb[2] = MSW(tlv_dma);
4355 	mcp->mb[3] = LSW(tlv_dma);
4356 	mcp->mb[6] = MSW(MSD(tlv_dma));
4357 	mcp->mb[7] = LSW(MSD(tlv_dma));
4358 	mcp->mb[8] = size;
4359 	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4360 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
4361 	mcp->tov = MBX_TOV_SECONDS;
4362 	mcp->flags = 0;
4363 	rval = qla2x00_mailbox_command(vha, mcp);
4364 
4365 	if (rval != QLA_SUCCESS) {
4366 		ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4367 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4368 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4369 	} else {
4370 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4371 		    "Done %s.\n", __func__);
4372 	}
4373 
4374 	return rval;
4375 }
4376 
4377 int
4378 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4379 {
4380 	int rval;
4381 	mbx_cmd_t mc;
4382 	mbx_cmd_t *mcp = &mc;
4383 
4384 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4385 	    "Entered %s.\n", __func__);
4386 
4387 	if (!IS_FWI2_CAPABLE(vha->hw))
4388 		return QLA_FUNCTION_FAILED;
4389 
4390 	mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4391 	mcp->mb[1] = LSW(risc_addr);
4392 	mcp->mb[8] = MSW(risc_addr);
4393 	mcp->out_mb = MBX_8|MBX_1|MBX_0;
4394 	mcp->in_mb = MBX_3|MBX_2|MBX_0;
4395 	mcp->tov = 30;
4396 	mcp->flags = 0;
4397 	rval = qla2x00_mailbox_command(vha, mcp);
4398 	if (rval != QLA_SUCCESS) {
4399 		ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4400 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4401 	} else {
4402 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4403 		    "Done %s.\n", __func__);
4404 		*data = mcp->mb[3] << 16 | mcp->mb[2];
4405 	}
4406 
4407 	return rval;
4408 }
4409 
4410 int
4411 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4412 	uint16_t *mresp)
4413 {
4414 	int rval;
4415 	mbx_cmd_t mc;
4416 	mbx_cmd_t *mcp = &mc;
4417 
4418 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4419 	    "Entered %s.\n", __func__);
4420 
4421 	memset(mcp->mb, 0 , sizeof(mcp->mb));
4422 	mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4423 	mcp->mb[1] = mreq->options | BIT_6;	// BIT_6 specifies 64 bit addressing
4424 
4425 	/* transfer count */
4426 	mcp->mb[10] = LSW(mreq->transfer_size);
4427 	mcp->mb[11] = MSW(mreq->transfer_size);
4428 
4429 	/* send data address */
4430 	mcp->mb[14] = LSW(mreq->send_dma);
4431 	mcp->mb[15] = MSW(mreq->send_dma);
4432 	mcp->mb[20] = LSW(MSD(mreq->send_dma));
4433 	mcp->mb[21] = MSW(MSD(mreq->send_dma));
4434 
4435 	/* receive data address */
4436 	mcp->mb[16] = LSW(mreq->rcv_dma);
4437 	mcp->mb[17] = MSW(mreq->rcv_dma);
4438 	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4439 	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4440 
4441 	/* Iteration count */
4442 	mcp->mb[18] = LSW(mreq->iteration_count);
4443 	mcp->mb[19] = MSW(mreq->iteration_count);
4444 
4445 	mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4446 	    MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4447 	if (IS_CNA_CAPABLE(vha->hw))
4448 		mcp->out_mb |= MBX_2;
4449 	mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4450 
4451 	mcp->buf_size = mreq->transfer_size;
4452 	mcp->tov = MBX_TOV_SECONDS;
4453 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4454 
4455 	rval = qla2x00_mailbox_command(vha, mcp);
4456 
4457 	if (rval != QLA_SUCCESS) {
4458 		ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4459 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4460 		    "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4461 		    mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4462 	} else {
4463 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4464 		    "Done %s.\n", __func__);
4465 	}
4466 
4467 	/* Copy mailbox information */
4468 	memcpy( mresp, mcp->mb, 64);
4469 	return rval;
4470 }
4471 
4472 int
4473 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4474 	uint16_t *mresp)
4475 {
4476 	int rval;
4477 	mbx_cmd_t mc;
4478 	mbx_cmd_t *mcp = &mc;
4479 	struct qla_hw_data *ha = vha->hw;
4480 
4481 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4482 	    "Entered %s.\n", __func__);
4483 
4484 	memset(mcp->mb, 0 , sizeof(mcp->mb));
4485 	mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4486 	mcp->mb[1] = mreq->options | BIT_6;	/* BIT_6 specifies 64bit address */
4487 	if (IS_CNA_CAPABLE(ha)) {
4488 		mcp->mb[1] |= BIT_15;
4489 		mcp->mb[2] = vha->fcoe_fcf_idx;
4490 	}
4491 	mcp->mb[16] = LSW(mreq->rcv_dma);
4492 	mcp->mb[17] = MSW(mreq->rcv_dma);
4493 	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4494 	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4495 
4496 	mcp->mb[10] = LSW(mreq->transfer_size);
4497 
4498 	mcp->mb[14] = LSW(mreq->send_dma);
4499 	mcp->mb[15] = MSW(mreq->send_dma);
4500 	mcp->mb[20] = LSW(MSD(mreq->send_dma));
4501 	mcp->mb[21] = MSW(MSD(mreq->send_dma));
4502 
4503 	mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4504 	    MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4505 	if (IS_CNA_CAPABLE(ha))
4506 		mcp->out_mb |= MBX_2;
4507 
4508 	mcp->in_mb = MBX_0;
4509 	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4510 	    IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4511 		mcp->in_mb |= MBX_1;
4512 	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4513 		mcp->in_mb |= MBX_3;
4514 
4515 	mcp->tov = MBX_TOV_SECONDS;
4516 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4517 	mcp->buf_size = mreq->transfer_size;
4518 
4519 	rval = qla2x00_mailbox_command(vha, mcp);
4520 
4521 	if (rval != QLA_SUCCESS) {
4522 		ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4523 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
4524 		    rval, mcp->mb[0], mcp->mb[1]);
4525 	} else {
4526 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4527 		    "Done %s.\n", __func__);
4528 	}
4529 
4530 	/* Copy mailbox information */
4531 	memcpy(mresp, mcp->mb, 64);
4532 	return rval;
4533 }
4534 
4535 int
4536 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4537 {
4538 	int rval;
4539 	mbx_cmd_t mc;
4540 	mbx_cmd_t *mcp = &mc;
4541 
4542 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4543 	    "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4544 
4545 	mcp->mb[0] = MBC_ISP84XX_RESET;
4546 	mcp->mb[1] = enable_diagnostic;
4547 	mcp->out_mb = MBX_1|MBX_0;
4548 	mcp->in_mb = MBX_1|MBX_0;
4549 	mcp->tov = MBX_TOV_SECONDS;
4550 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4551 	rval = qla2x00_mailbox_command(vha, mcp);
4552 
4553 	if (rval != QLA_SUCCESS)
4554 		ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4555 	else
4556 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4557 		    "Done %s.\n", __func__);
4558 
4559 	return rval;
4560 }
4561 
4562 int
4563 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4564 {
4565 	int rval;
4566 	mbx_cmd_t mc;
4567 	mbx_cmd_t *mcp = &mc;
4568 
4569 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4570 	    "Entered %s.\n", __func__);
4571 
4572 	if (!IS_FWI2_CAPABLE(vha->hw))
4573 		return QLA_FUNCTION_FAILED;
4574 
4575 	mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4576 	mcp->mb[1] = LSW(risc_addr);
4577 	mcp->mb[2] = LSW(data);
4578 	mcp->mb[3] = MSW(data);
4579 	mcp->mb[8] = MSW(risc_addr);
4580 	mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4581 	mcp->in_mb = MBX_0;
4582 	mcp->tov = 30;
4583 	mcp->flags = 0;
4584 	rval = qla2x00_mailbox_command(vha, mcp);
4585 	if (rval != QLA_SUCCESS) {
4586 		ql_dbg(ql_dbg_mbx, vha, 0x1101,
4587 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4588 	} else {
4589 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4590 		    "Done %s.\n", __func__);
4591 	}
4592 
4593 	return rval;
4594 }
4595 
4596 int
4597 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4598 {
4599 	int rval;
4600 	uint32_t stat, timer;
4601 	uint16_t mb0 = 0;
4602 	struct qla_hw_data *ha = vha->hw;
4603 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4604 
4605 	rval = QLA_SUCCESS;
4606 
4607 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4608 	    "Entered %s.\n", __func__);
4609 
4610 	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4611 
4612 	/* Write the MBC data to the registers */
4613 	WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
4614 	WRT_REG_WORD(&reg->mailbox1, mb[0]);
4615 	WRT_REG_WORD(&reg->mailbox2, mb[1]);
4616 	WRT_REG_WORD(&reg->mailbox3, mb[2]);
4617 	WRT_REG_WORD(&reg->mailbox4, mb[3]);
4618 
4619 	WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);
4620 
4621 	/* Poll for MBC interrupt */
4622 	for (timer = 6000000; timer; timer--) {
4623 		/* Check for pending interrupts. */
4624 		stat = RD_REG_DWORD(&reg->host_status);
4625 		if (stat & HSRX_RISC_INT) {
4626 			stat &= 0xff;
4627 
4628 			if (stat == 0x1 || stat == 0x2 ||
4629 			    stat == 0x10 || stat == 0x11) {
4630 				set_bit(MBX_INTERRUPT,
4631 				    &ha->mbx_cmd_flags);
4632 				mb0 = RD_REG_WORD(&reg->mailbox0);
4633 				WRT_REG_DWORD(&reg->hccr,
4634 				    HCCRX_CLR_RISC_INT);
4635 				RD_REG_DWORD(&reg->hccr);
4636 				break;
4637 			}
4638 		}
4639 		udelay(5);
4640 	}
4641 
4642 	if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4643 		rval = mb0 & MBS_MASK;
4644 	else
4645 		rval = QLA_FUNCTION_FAILED;
4646 
4647 	if (rval != QLA_SUCCESS) {
4648 		ql_dbg(ql_dbg_mbx, vha, 0x1104,
4649 		    "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4650 	} else {
4651 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4652 		    "Done %s.\n", __func__);
4653 	}
4654 
4655 	return rval;
4656 }
4657 
4658 int
4659 qla2x00_get_data_rate(scsi_qla_host_t *vha)
4660 {
4661 	int rval;
4662 	mbx_cmd_t mc;
4663 	mbx_cmd_t *mcp = &mc;
4664 	struct qla_hw_data *ha = vha->hw;
4665 
4666 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
4667 	    "Entered %s.\n", __func__);
4668 
4669 	if (!IS_FWI2_CAPABLE(ha))
4670 		return QLA_FUNCTION_FAILED;
4671 
4672 	mcp->mb[0] = MBC_DATA_RATE;
4673 	mcp->mb[1] = 0;
4674 	mcp->out_mb = MBX_1|MBX_0;
4675 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
4676 	if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4677 		mcp->in_mb |= MBX_3;
4678 	mcp->tov = MBX_TOV_SECONDS;
4679 	mcp->flags = 0;
4680 	rval = qla2x00_mailbox_command(vha, mcp);
4681 	if (rval != QLA_SUCCESS) {
4682 		ql_dbg(ql_dbg_mbx, vha, 0x1107,
4683 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4684 	} else {
4685 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
4686 		    "Done %s.\n", __func__);
4687 		if (mcp->mb[1] != 0x7)
4688 			ha->link_data_rate = mcp->mb[1];
4689 	}
4690 
4691 	return rval;
4692 }
4693 
4694 int
4695 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4696 {
4697 	int rval;
4698 	mbx_cmd_t mc;
4699 	mbx_cmd_t *mcp = &mc;
4700 	struct qla_hw_data *ha = vha->hw;
4701 
4702 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
4703 	    "Entered %s.\n", __func__);
4704 
4705 	if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
4706 	    !IS_QLA27XX(ha))
4707 		return QLA_FUNCTION_FAILED;
4708 	mcp->mb[0] = MBC_GET_PORT_CONFIG;
4709 	mcp->out_mb = MBX_0;
4710 	mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4711 	mcp->tov = MBX_TOV_SECONDS;
4712 	mcp->flags = 0;
4713 
4714 	rval = qla2x00_mailbox_command(vha, mcp);
4715 
4716 	if (rval != QLA_SUCCESS) {
4717 		ql_dbg(ql_dbg_mbx, vha, 0x110a,
4718 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4719 	} else {
4720 		/* Copy all bits to preserve original value */
4721 		memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
4722 
4723 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
4724 		    "Done %s.\n", __func__);
4725 	}
4726 	return rval;
4727 }
4728 
4729 int
4730 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4731 {
4732 	int rval;
4733 	mbx_cmd_t mc;
4734 	mbx_cmd_t *mcp = &mc;
4735 
4736 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
4737 	    "Entered %s.\n", __func__);
4738 
4739 	mcp->mb[0] = MBC_SET_PORT_CONFIG;
4740 	/* Copy all bits to preserve original setting */
4741 	memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
4742 	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4743 	mcp->in_mb = MBX_0;
4744 	mcp->tov = MBX_TOV_SECONDS;
4745 	mcp->flags = 0;
4746 	rval = qla2x00_mailbox_command(vha, mcp);
4747 
4748 	if (rval != QLA_SUCCESS) {
4749 		ql_dbg(ql_dbg_mbx, vha, 0x110d,
4750 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4751 	} else
4752 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
4753 		    "Done %s.\n", __func__);
4754 
4755 	return rval;
4756 }
4757 
4758 
4759 int
4760 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
4761 		uint16_t *mb)
4762 {
4763 	int rval;
4764 	mbx_cmd_t mc;
4765 	mbx_cmd_t *mcp = &mc;
4766 	struct qla_hw_data *ha = vha->hw;
4767 
4768 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
4769 	    "Entered %s.\n", __func__);
4770 
4771 	if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
4772 		return QLA_FUNCTION_FAILED;
4773 
4774 	mcp->mb[0] = MBC_PORT_PARAMS;
4775 	mcp->mb[1] = loop_id;
4776 	if (ha->flags.fcp_prio_enabled)
4777 		mcp->mb[2] = BIT_1;
4778 	else
4779 		mcp->mb[2] = BIT_2;
4780 	mcp->mb[4] = priority & 0xf;
4781 	mcp->mb[9] = vha->vp_idx;
4782 	mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4783 	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
4784 	mcp->tov = 30;
4785 	mcp->flags = 0;
4786 	rval = qla2x00_mailbox_command(vha, mcp);
4787 	if (mb != NULL) {
4788 		mb[0] = mcp->mb[0];
4789 		mb[1] = mcp->mb[1];
4790 		mb[3] = mcp->mb[3];
4791 		mb[4] = mcp->mb[4];
4792 	}
4793 
4794 	if (rval != QLA_SUCCESS) {
4795 		ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
4796 	} else {
4797 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
4798 		    "Done %s.\n", __func__);
4799 	}
4800 
4801 	return rval;
4802 }
4803 
4804 int
4805 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
4806 {
4807 	int rval = QLA_FUNCTION_FAILED;
4808 	struct qla_hw_data *ha = vha->hw;
4809 	uint8_t byte;
4810 
4811 	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
4812 		ql_dbg(ql_dbg_mbx, vha, 0x1150,
4813 		    "Thermal not supported by this card.\n");
4814 		return rval;
4815 	}
4816 
4817 	if (IS_QLA25XX(ha)) {
4818 		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4819 		    ha->pdev->subsystem_device == 0x0175) {
4820 			rval = qla2x00_read_sfp(vha, 0, &byte,
4821 			    0x98, 0x1, 1, BIT_13|BIT_0);
4822 			*temp = byte;
4823 			return rval;
4824 		}
4825 		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
4826 		    ha->pdev->subsystem_device == 0x338e) {
4827 			rval = qla2x00_read_sfp(vha, 0, &byte,
4828 			    0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
4829 			*temp = byte;
4830 			return rval;
4831 		}
4832 		ql_dbg(ql_dbg_mbx, vha, 0x10c9,
4833 		    "Thermal not supported by this card.\n");
4834 		return rval;
4835 	}
4836 
4837 	if (IS_QLA82XX(ha)) {
4838 		*temp = qla82xx_read_temperature(vha);
4839 		rval = QLA_SUCCESS;
4840 		return rval;
4841 	} else if (IS_QLA8044(ha)) {
4842 		*temp = qla8044_read_temperature(vha);
4843 		rval = QLA_SUCCESS;
4844 		return rval;
4845 	}
4846 
4847 	rval = qla2x00_read_asic_temperature(vha, temp);
4848 	return rval;
4849 }
4850 
4851 int
4852 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
4853 {
4854 	int rval;
4855 	struct qla_hw_data *ha = vha->hw;
4856 	mbx_cmd_t mc;
4857 	mbx_cmd_t *mcp = &mc;
4858 
4859 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
4860 	    "Entered %s.\n", __func__);
4861 
4862 	if (!IS_FWI2_CAPABLE(ha))
4863 		return QLA_FUNCTION_FAILED;
4864 
4865 	memset(mcp, 0, sizeof(mbx_cmd_t));
4866 	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4867 	mcp->mb[1] = 1;
4868 
4869 	mcp->out_mb = MBX_1|MBX_0;
4870 	mcp->in_mb = MBX_0;
4871 	mcp->tov = 30;
4872 	mcp->flags = 0;
4873 
4874 	rval = qla2x00_mailbox_command(vha, mcp);
4875 	if (rval != QLA_SUCCESS) {
4876 		ql_dbg(ql_dbg_mbx, vha, 0x1016,
4877 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4878 	} else {
4879 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
4880 		    "Done %s.\n", __func__);
4881 	}
4882 
4883 	return rval;
4884 }
4885 
4886 int
4887 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
4888 {
4889 	int rval;
4890 	struct qla_hw_data *ha = vha->hw;
4891 	mbx_cmd_t mc;
4892 	mbx_cmd_t *mcp = &mc;
4893 
4894 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
4895 	    "Entered %s.\n", __func__);
4896 
4897 	if (!IS_P3P_TYPE(ha))
4898 		return QLA_FUNCTION_FAILED;
4899 
4900 	memset(mcp, 0, sizeof(mbx_cmd_t));
4901 	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4902 	mcp->mb[1] = 0;
4903 
4904 	mcp->out_mb = MBX_1|MBX_0;
4905 	mcp->in_mb = MBX_0;
4906 	mcp->tov = 30;
4907 	mcp->flags = 0;
4908 
4909 	rval = qla2x00_mailbox_command(vha, mcp);
4910 	if (rval != QLA_SUCCESS) {
4911 		ql_dbg(ql_dbg_mbx, vha, 0x100c,
4912 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4913 	} else {
4914 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
4915 		    "Done %s.\n", __func__);
4916 	}
4917 
4918 	return rval;
4919 }
4920 
4921 int
4922 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
4923 {
4924 	struct qla_hw_data *ha = vha->hw;
4925 	mbx_cmd_t mc;
4926 	mbx_cmd_t *mcp = &mc;
4927 	int rval = QLA_FUNCTION_FAILED;
4928 
4929 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
4930 	    "Entered %s.\n", __func__);
4931 
4932 	memset(mcp->mb, 0 , sizeof(mcp->mb));
4933 	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4934 	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4935 	mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
4936 	mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
4937 
4938 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4939 	mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
4940 	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4941 
4942 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4943 	mcp->tov = MBX_TOV_SECONDS;
4944 	rval = qla2x00_mailbox_command(vha, mcp);
4945 
4946 	/* Always copy back return mailbox values. */
4947 	if (rval != QLA_SUCCESS) {
4948 		ql_dbg(ql_dbg_mbx, vha, 0x1120,
4949 		    "mailbox command FAILED=0x%x, subcode=%x.\n",
4950 		    (mcp->mb[1] << 16) | mcp->mb[0],
4951 		    (mcp->mb[3] << 16) | mcp->mb[2]);
4952 	} else {
4953 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
4954 		    "Done %s.\n", __func__);
4955 		ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
4956 		if (!ha->md_template_size) {
4957 			ql_dbg(ql_dbg_mbx, vha, 0x1122,
4958 			    "Null template size obtained.\n");
4959 			rval = QLA_FUNCTION_FAILED;
4960 		}
4961 	}
4962 	return rval;
4963 }
4964 
4965 int
4966 qla82xx_md_get_template(scsi_qla_host_t *vha)
4967 {
4968 	struct qla_hw_data *ha = vha->hw;
4969 	mbx_cmd_t mc;
4970 	mbx_cmd_t *mcp = &mc;
4971 	int rval = QLA_FUNCTION_FAILED;
4972 
4973 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
4974 	    "Entered %s.\n", __func__);
4975 
4976 	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
4977 	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
4978 	if (!ha->md_tmplt_hdr) {
4979 		ql_log(ql_log_warn, vha, 0x1124,
4980 		    "Unable to allocate memory for Minidump template.\n");
4981 		return rval;
4982 	}
4983 
4984 	memset(mcp->mb, 0 , sizeof(mcp->mb));
4985 	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4986 	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4987 	mcp->mb[2] = LSW(RQST_TMPLT);
4988 	mcp->mb[3] = MSW(RQST_TMPLT);
4989 	mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
4990 	mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
4991 	mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
4992 	mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
4993 	mcp->mb[8] = LSW(ha->md_template_size);
4994 	mcp->mb[9] = MSW(ha->md_template_size);
4995 
4996 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4997 	mcp->tov = MBX_TOV_SECONDS;
4998 	mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
4999 	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5000 	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5001 	rval = qla2x00_mailbox_command(vha, mcp);
5002 
5003 	if (rval != QLA_SUCCESS) {
5004 		ql_dbg(ql_dbg_mbx, vha, 0x1125,
5005 		    "mailbox command FAILED=0x%x, subcode=%x.\n",
5006 		    ((mcp->mb[1] << 16) | mcp->mb[0]),
5007 		    ((mcp->mb[3] << 16) | mcp->mb[2]));
5008 	} else
5009 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
5010 		    "Done %s.\n", __func__);
5011 	return rval;
5012 }
5013 
5014 int
5015 qla8044_md_get_template(scsi_qla_host_t *vha)
5016 {
5017 	struct qla_hw_data *ha = vha->hw;
5018 	mbx_cmd_t mc;
5019 	mbx_cmd_t *mcp = &mc;
5020 	int rval = QLA_FUNCTION_FAILED;
5021 	int offset = 0, size = MINIDUMP_SIZE_36K;
5022 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
5023 	    "Entered %s.\n", __func__);
5024 
5025 	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5026 	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5027 	if (!ha->md_tmplt_hdr) {
5028 		ql_log(ql_log_warn, vha, 0xb11b,
5029 		    "Unable to allocate memory for Minidump template.\n");
5030 		return rval;
5031 	}
5032 
5033 	memset(mcp->mb, 0 , sizeof(mcp->mb));
5034 	while (offset < ha->md_template_size) {
5035 		mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5036 		mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5037 		mcp->mb[2] = LSW(RQST_TMPLT);
5038 		mcp->mb[3] = MSW(RQST_TMPLT);
5039 		mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
5040 		mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
5041 		mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
5042 		mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
5043 		mcp->mb[8] = LSW(size);
5044 		mcp->mb[9] = MSW(size);
5045 		mcp->mb[10] = offset & 0x0000FFFF;
5046 		mcp->mb[11] = offset & 0xFFFF0000;
5047 		mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5048 		mcp->tov = MBX_TOV_SECONDS;
5049 		mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5050 			MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5051 		mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5052 		rval = qla2x00_mailbox_command(vha, mcp);
5053 
5054 		if (rval != QLA_SUCCESS) {
5055 			ql_dbg(ql_dbg_mbx, vha, 0xb11c,
5056 				"mailbox command FAILED=0x%x, subcode=%x.\n",
5057 				((mcp->mb[1] << 16) | mcp->mb[0]),
5058 				((mcp->mb[3] << 16) | mcp->mb[2]));
5059 			return rval;
5060 		} else
5061 			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
5062 				"Done %s.\n", __func__);
5063 		offset = offset + size;
5064 	}
5065 	return rval;
5066 }
5067 
5068 int
5069 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5070 {
5071 	int rval;
5072 	struct qla_hw_data *ha = vha->hw;
5073 	mbx_cmd_t mc;
5074 	mbx_cmd_t *mcp = &mc;
5075 
5076 	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5077 		return QLA_FUNCTION_FAILED;
5078 
5079 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
5080 	    "Entered %s.\n", __func__);
5081 
5082 	memset(mcp, 0, sizeof(mbx_cmd_t));
5083 	mcp->mb[0] = MBC_SET_LED_CONFIG;
5084 	mcp->mb[1] = led_cfg[0];
5085 	mcp->mb[2] = led_cfg[1];
5086 	if (IS_QLA8031(ha)) {
5087 		mcp->mb[3] = led_cfg[2];
5088 		mcp->mb[4] = led_cfg[3];
5089 		mcp->mb[5] = led_cfg[4];
5090 		mcp->mb[6] = led_cfg[5];
5091 	}
5092 
5093 	mcp->out_mb = MBX_2|MBX_1|MBX_0;
5094 	if (IS_QLA8031(ha))
5095 		mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5096 	mcp->in_mb = MBX_0;
5097 	mcp->tov = 30;
5098 	mcp->flags = 0;
5099 
5100 	rval = qla2x00_mailbox_command(vha, mcp);
5101 	if (rval != QLA_SUCCESS) {
5102 		ql_dbg(ql_dbg_mbx, vha, 0x1134,
5103 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5104 	} else {
5105 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
5106 		    "Done %s.\n", __func__);
5107 	}
5108 
5109 	return rval;
5110 }
5111 
5112 int
5113 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5114 {
5115 	int rval;
5116 	struct qla_hw_data *ha = vha->hw;
5117 	mbx_cmd_t mc;
5118 	mbx_cmd_t *mcp = &mc;
5119 
5120 	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5121 		return QLA_FUNCTION_FAILED;
5122 
5123 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
5124 	    "Entered %s.\n", __func__);
5125 
5126 	memset(mcp, 0, sizeof(mbx_cmd_t));
5127 	mcp->mb[0] = MBC_GET_LED_CONFIG;
5128 
5129 	mcp->out_mb = MBX_0;
5130 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
5131 	if (IS_QLA8031(ha))
5132 		mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5133 	mcp->tov = 30;
5134 	mcp->flags = 0;
5135 
5136 	rval = qla2x00_mailbox_command(vha, mcp);
5137 	if (rval != QLA_SUCCESS) {
5138 		ql_dbg(ql_dbg_mbx, vha, 0x1137,
5139 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5140 	} else {
5141 		led_cfg[0] = mcp->mb[1];
5142 		led_cfg[1] = mcp->mb[2];
5143 		if (IS_QLA8031(ha)) {
5144 			led_cfg[2] = mcp->mb[3];
5145 			led_cfg[3] = mcp->mb[4];
5146 			led_cfg[4] = mcp->mb[5];
5147 			led_cfg[5] = mcp->mb[6];
5148 		}
5149 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
5150 		    "Done %s.\n", __func__);
5151 	}
5152 
5153 	return rval;
5154 }
5155 
5156 int
5157 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
5158 {
5159 	int rval;
5160 	struct qla_hw_data *ha = vha->hw;
5161 	mbx_cmd_t mc;
5162 	mbx_cmd_t *mcp = &mc;
5163 
5164 	if (!IS_P3P_TYPE(ha))
5165 		return QLA_FUNCTION_FAILED;
5166 
5167 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5168 		"Entered %s.\n", __func__);
5169 
5170 	memset(mcp, 0, sizeof(mbx_cmd_t));
5171 	mcp->mb[0] = MBC_SET_LED_CONFIG;
5172 	if (enable)
5173 		mcp->mb[7] = 0xE;
5174 	else
5175 		mcp->mb[7] = 0xD;
5176 
5177 	mcp->out_mb = MBX_7|MBX_0;
5178 	mcp->in_mb = MBX_0;
5179 	mcp->tov = MBX_TOV_SECONDS;
5180 	mcp->flags = 0;
5181 
5182 	rval = qla2x00_mailbox_command(vha, mcp);
5183 	if (rval != QLA_SUCCESS) {
5184 		ql_dbg(ql_dbg_mbx, vha, 0x1128,
5185 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5186 	} else {
5187 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5188 		    "Done %s.\n", __func__);
5189 	}
5190 
5191 	return rval;
5192 }
5193 
5194 int
5195 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5196 {
5197 	int rval;
5198 	struct qla_hw_data *ha = vha->hw;
5199 	mbx_cmd_t mc;
5200 	mbx_cmd_t *mcp = &mc;
5201 
5202 	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5203 		return QLA_FUNCTION_FAILED;
5204 
5205 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
5206 	    "Entered %s.\n", __func__);
5207 
5208 	mcp->mb[0] = MBC_WRITE_REMOTE_REG;
5209 	mcp->mb[1] = LSW(reg);
5210 	mcp->mb[2] = MSW(reg);
5211 	mcp->mb[3] = LSW(data);
5212 	mcp->mb[4] = MSW(data);
5213 	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5214 
5215 	mcp->in_mb = MBX_1|MBX_0;
5216 	mcp->tov = MBX_TOV_SECONDS;
5217 	mcp->flags = 0;
5218 	rval = qla2x00_mailbox_command(vha, mcp);
5219 
5220 	if (rval != QLA_SUCCESS) {
5221 		ql_dbg(ql_dbg_mbx, vha, 0x1131,
5222 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5223 	} else {
5224 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5225 		    "Done %s.\n", __func__);
5226 	}
5227 
5228 	return rval;
5229 }
5230 
5231 int
5232 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
5233 {
5234 	int rval;
5235 	struct qla_hw_data *ha = vha->hw;
5236 	mbx_cmd_t mc;
5237 	mbx_cmd_t *mcp = &mc;
5238 
5239 	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5240 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5241 		    "Implicit LOGO Unsupported.\n");
5242 		return QLA_FUNCTION_FAILED;
5243 	}
5244 
5245 
5246 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
5247 	    "Entering %s.\n",  __func__);
5248 
5249 	/* Perform Implicit LOGO. */
5250 	mcp->mb[0] = MBC_PORT_LOGOUT;
5251 	mcp->mb[1] = fcport->loop_id;
5252 	mcp->mb[10] = BIT_15;
5253 	mcp->out_mb = MBX_10|MBX_1|MBX_0;
5254 	mcp->in_mb = MBX_0;
5255 	mcp->tov = MBX_TOV_SECONDS;
5256 	mcp->flags = 0;
5257 	rval = qla2x00_mailbox_command(vha, mcp);
5258 	if (rval != QLA_SUCCESS)
5259 		ql_dbg(ql_dbg_mbx, vha, 0x113d,
5260 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5261 	else
5262 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
5263 		    "Done %s.\n", __func__);
5264 
5265 	return rval;
5266 }
5267 
5268 int
5269 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
5270 {
5271 	int rval;
5272 	mbx_cmd_t mc;
5273 	mbx_cmd_t *mcp = &mc;
5274 	struct qla_hw_data *ha = vha->hw;
5275 	unsigned long retry_max_time = jiffies + (2 * HZ);
5276 
5277 	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5278 		return QLA_FUNCTION_FAILED;
5279 
5280 	ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
5281 
5282 retry_rd_reg:
5283 	mcp->mb[0] = MBC_READ_REMOTE_REG;
5284 	mcp->mb[1] = LSW(reg);
5285 	mcp->mb[2] = MSW(reg);
5286 	mcp->out_mb = MBX_2|MBX_1|MBX_0;
5287 	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5288 	mcp->tov = MBX_TOV_SECONDS;
5289 	mcp->flags = 0;
5290 	rval = qla2x00_mailbox_command(vha, mcp);
5291 
5292 	if (rval != QLA_SUCCESS) {
5293 		ql_dbg(ql_dbg_mbx, vha, 0x114c,
5294 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
5295 		    rval, mcp->mb[0], mcp->mb[1]);
5296 	} else {
5297 		*data = (mcp->mb[3] | (mcp->mb[4] << 16));
5298 		if (*data == QLA8XXX_BAD_VALUE) {
5299 			/*
5300 			 * During soft-reset CAMRAM register reads might
5301 			 * return 0xbad0bad0. So retry for MAX of 2 sec
5302 			 * while reading camram registers.
5303 			 */
5304 			if (time_after(jiffies, retry_max_time)) {
5305 				ql_dbg(ql_dbg_mbx, vha, 0x1141,
5306 				    "Failure to read CAMRAM register. "
5307 				    "data=0x%x.\n", *data);
5308 				return QLA_FUNCTION_FAILED;
5309 			}
5310 			msleep(100);
5311 			goto retry_rd_reg;
5312 		}
5313 		ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
5314 	}
5315 
5316 	return rval;
5317 }
5318 
5319 int
5320 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
5321 {
5322 	int rval;
5323 	mbx_cmd_t mc;
5324 	mbx_cmd_t *mcp = &mc;
5325 	struct qla_hw_data *ha = vha->hw;
5326 
5327 	if (!IS_QLA83XX(ha))
5328 		return QLA_FUNCTION_FAILED;
5329 
5330 	ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
5331 
5332 	mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
5333 	mcp->out_mb = MBX_0;
5334 	mcp->in_mb = MBX_1|MBX_0;
5335 	mcp->tov = MBX_TOV_SECONDS;
5336 	mcp->flags = 0;
5337 	rval = qla2x00_mailbox_command(vha, mcp);
5338 
5339 	if (rval != QLA_SUCCESS) {
5340 		ql_dbg(ql_dbg_mbx, vha, 0x1144,
5341 		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
5342 		    rval, mcp->mb[0], mcp->mb[1]);
5343 		ha->isp_ops->fw_dump(vha, 0);
5344 	} else {
5345 		ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
5346 	}
5347 
5348 	return rval;
5349 }
5350 
5351 int
5352 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
5353 	uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
5354 {
5355 	int rval;
5356 	mbx_cmd_t mc;
5357 	mbx_cmd_t *mcp = &mc;
5358 	uint8_t subcode = (uint8_t)options;
5359 	struct qla_hw_data *ha = vha->hw;
5360 
5361 	if (!IS_QLA8031(ha))
5362 		return QLA_FUNCTION_FAILED;
5363 
5364 	ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5365 
5366 	mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5367 	mcp->mb[1] = options;
5368 	mcp->out_mb = MBX_1|MBX_0;
5369 	if (subcode & BIT_2) {
5370 		mcp->mb[2] = LSW(start_addr);
5371 		mcp->mb[3] = MSW(start_addr);
5372 		mcp->mb[4] = LSW(end_addr);
5373 		mcp->mb[5] = MSW(end_addr);
5374 		mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5375 	}
5376 	mcp->in_mb = MBX_2|MBX_1|MBX_0;
5377 	if (!(subcode & (BIT_2 | BIT_5)))
5378 		mcp->in_mb |= MBX_4|MBX_3;
5379 	mcp->tov = MBX_TOV_SECONDS;
5380 	mcp->flags = 0;
5381 	rval = qla2x00_mailbox_command(vha, mcp);
5382 
5383 	if (rval != QLA_SUCCESS) {
5384 		ql_dbg(ql_dbg_mbx, vha, 0x1147,
5385 		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5386 		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5387 		    mcp->mb[4]);
5388 		ha->isp_ops->fw_dump(vha, 0);
5389 	} else {
5390 		if (subcode & BIT_5)
5391 			*sector_size = mcp->mb[1];
5392 		else if (subcode & (BIT_6 | BIT_7)) {
5393 			ql_dbg(ql_dbg_mbx, vha, 0x1148,
5394 			    "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5395 		} else if (subcode & (BIT_3 | BIT_4)) {
5396 			ql_dbg(ql_dbg_mbx, vha, 0x1149,
5397 			    "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5398 		}
5399 		ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5400 	}
5401 
5402 	return rval;
5403 }
5404 
5405 int
5406 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5407 	uint32_t size)
5408 {
5409 	int rval;
5410 	mbx_cmd_t mc;
5411 	mbx_cmd_t *mcp = &mc;
5412 
5413 	if (!IS_MCTP_CAPABLE(vha->hw))
5414 		return QLA_FUNCTION_FAILED;
5415 
5416 	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5417 	    "Entered %s.\n", __func__);
5418 
5419 	mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5420 	mcp->mb[1] = LSW(addr);
5421 	mcp->mb[2] = MSW(req_dma);
5422 	mcp->mb[3] = LSW(req_dma);
5423 	mcp->mb[4] = MSW(size);
5424 	mcp->mb[5] = LSW(size);
5425 	mcp->mb[6] = MSW(MSD(req_dma));
5426 	mcp->mb[7] = LSW(MSD(req_dma));
5427 	mcp->mb[8] = MSW(addr);
5428 	/* Setting RAM ID to valid */
5429 	mcp->mb[10] |= BIT_7;
5430 	/* For MCTP RAM ID is 0x40 */
5431 	mcp->mb[10] |= 0x40;
5432 
5433 	mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5434 	    MBX_0;
5435 
5436 	mcp->in_mb = MBX_0;
5437 	mcp->tov = MBX_TOV_SECONDS;
5438 	mcp->flags = 0;
5439 	rval = qla2x00_mailbox_command(vha, mcp);
5440 
5441 	if (rval != QLA_SUCCESS) {
5442 		ql_dbg(ql_dbg_mbx, vha, 0x114e,
5443 		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5444 	} else {
5445 		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
5446 		    "Done %s.\n", __func__);
5447 	}
5448 
5449 	return rval;
5450 }
5451