1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_target.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/cpu.h> 13 #include <linux/t10-pi.h> 14 #include <scsi/scsi_tcq.h> 15 #include <scsi/scsi_bsg_fc.h> 16 #include <scsi/scsi_eh.h> 17 #include <scsi/fc/fc_fs.h> 18 #include <linux/nvme-fc-driver.h> 19 20 static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t); 21 static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *); 22 static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *); 23 static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *, 24 sts_entry_t *); 25 26 const char *const port_state_str[] = { 27 "Unknown", 28 "UNCONFIGURED", 29 "DEAD", 30 "LOST", 31 "ONLINE" 32 }; 33 34 /** 35 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200. 36 * @irq: interrupt number 37 * @dev_id: SCSI driver HA context 38 * 39 * Called by system whenever the host adapter generates an interrupt. 40 * 41 * Returns handled flag. 42 */ 43 irqreturn_t 44 qla2100_intr_handler(int irq, void *dev_id) 45 { 46 scsi_qla_host_t *vha; 47 struct qla_hw_data *ha; 48 struct device_reg_2xxx __iomem *reg; 49 int status; 50 unsigned long iter; 51 uint16_t hccr; 52 uint16_t mb[8]; 53 struct rsp_que *rsp; 54 unsigned long flags; 55 56 rsp = (struct rsp_que *) dev_id; 57 if (!rsp) { 58 ql_log(ql_log_info, NULL, 0x505d, 59 "%s: NULL response queue pointer.\n", __func__); 60 return (IRQ_NONE); 61 } 62 63 ha = rsp->hw; 64 reg = &ha->iobase->isp; 65 status = 0; 66 67 spin_lock_irqsave(&ha->hardware_lock, flags); 68 vha = pci_get_drvdata(ha->pdev); 69 for (iter = 50; iter--; ) { 70 hccr = RD_REG_WORD(®->hccr); 71 if (qla2x00_check_reg16_for_disconnect(vha, hccr)) 72 break; 73 if (hccr & HCCR_RISC_PAUSE) { 74 if (pci_channel_offline(ha->pdev)) 75 break; 76 77 /* 78 * Issue a "HARD" reset in order for the RISC interrupt 79 * bit to be cleared. Schedule a big hammer to get 80 * out of the RISC PAUSED state. 81 */ 82 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 83 RD_REG_WORD(®->hccr); 84 85 ha->isp_ops->fw_dump(vha, 1); 86 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 87 break; 88 } else if ((RD_REG_WORD(®->istatus) & ISR_RISC_INT) == 0) 89 break; 90 91 if (RD_REG_WORD(®->semaphore) & BIT_0) { 92 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 93 RD_REG_WORD(®->hccr); 94 95 /* Get mailbox data. */ 96 mb[0] = RD_MAILBOX_REG(ha, reg, 0); 97 if (mb[0] > 0x3fff && mb[0] < 0x8000) { 98 qla2x00_mbx_completion(vha, mb[0]); 99 status |= MBX_INTERRUPT; 100 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { 101 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 102 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 103 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 104 qla2x00_async_event(vha, rsp, mb); 105 } else { 106 /*EMPTY*/ 107 ql_dbg(ql_dbg_async, vha, 0x5025, 108 "Unrecognized interrupt type (%d).\n", 109 mb[0]); 110 } 111 /* Release mailbox registers. */ 112 WRT_REG_WORD(®->semaphore, 0); 113 RD_REG_WORD(®->semaphore); 114 } else { 115 qla2x00_process_response_queue(rsp); 116 117 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 118 RD_REG_WORD(®->hccr); 119 } 120 } 121 qla2x00_handle_mbx_completion(ha, status); 122 spin_unlock_irqrestore(&ha->hardware_lock, flags); 123 124 return (IRQ_HANDLED); 125 } 126 127 bool 128 qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg) 129 { 130 /* Check for PCI disconnection */ 131 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) { 132 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) && 133 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) && 134 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) { 135 /* 136 * Schedule this (only once) on the default system 137 * workqueue so that all the adapter workqueues and the 138 * DPC thread can be shutdown cleanly. 139 */ 140 schedule_work(&vha->hw->board_disable); 141 } 142 return true; 143 } else 144 return false; 145 } 146 147 bool 148 qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg) 149 { 150 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg); 151 } 152 153 /** 154 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. 155 * @irq: interrupt number 156 * @dev_id: SCSI driver HA context 157 * 158 * Called by system whenever the host adapter generates an interrupt. 159 * 160 * Returns handled flag. 161 */ 162 irqreturn_t 163 qla2300_intr_handler(int irq, void *dev_id) 164 { 165 scsi_qla_host_t *vha; 166 struct device_reg_2xxx __iomem *reg; 167 int status; 168 unsigned long iter; 169 uint32_t stat; 170 uint16_t hccr; 171 uint16_t mb[8]; 172 struct rsp_que *rsp; 173 struct qla_hw_data *ha; 174 unsigned long flags; 175 176 rsp = (struct rsp_que *) dev_id; 177 if (!rsp) { 178 ql_log(ql_log_info, NULL, 0x5058, 179 "%s: NULL response queue pointer.\n", __func__); 180 return (IRQ_NONE); 181 } 182 183 ha = rsp->hw; 184 reg = &ha->iobase->isp; 185 status = 0; 186 187 spin_lock_irqsave(&ha->hardware_lock, flags); 188 vha = pci_get_drvdata(ha->pdev); 189 for (iter = 50; iter--; ) { 190 stat = RD_REG_DWORD(®->u.isp2300.host_status); 191 if (qla2x00_check_reg32_for_disconnect(vha, stat)) 192 break; 193 if (stat & HSR_RISC_PAUSED) { 194 if (unlikely(pci_channel_offline(ha->pdev))) 195 break; 196 197 hccr = RD_REG_WORD(®->hccr); 198 199 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) 200 ql_log(ql_log_warn, vha, 0x5026, 201 "Parity error -- HCCR=%x, Dumping " 202 "firmware.\n", hccr); 203 else 204 ql_log(ql_log_warn, vha, 0x5027, 205 "RISC paused -- HCCR=%x, Dumping " 206 "firmware.\n", hccr); 207 208 /* 209 * Issue a "HARD" reset in order for the RISC 210 * interrupt bit to be cleared. Schedule a big 211 * hammer to get out of the RISC PAUSED state. 212 */ 213 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 214 RD_REG_WORD(®->hccr); 215 216 ha->isp_ops->fw_dump(vha, 1); 217 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 218 break; 219 } else if ((stat & HSR_RISC_INT) == 0) 220 break; 221 222 switch (stat & 0xff) { 223 case 0x1: 224 case 0x2: 225 case 0x10: 226 case 0x11: 227 qla2x00_mbx_completion(vha, MSW(stat)); 228 status |= MBX_INTERRUPT; 229 230 /* Release mailbox registers. */ 231 WRT_REG_WORD(®->semaphore, 0); 232 break; 233 case 0x12: 234 mb[0] = MSW(stat); 235 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 236 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 237 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 238 qla2x00_async_event(vha, rsp, mb); 239 break; 240 case 0x13: 241 qla2x00_process_response_queue(rsp); 242 break; 243 case 0x15: 244 mb[0] = MBA_CMPLT_1_16BIT; 245 mb[1] = MSW(stat); 246 qla2x00_async_event(vha, rsp, mb); 247 break; 248 case 0x16: 249 mb[0] = MBA_SCSI_COMPLETION; 250 mb[1] = MSW(stat); 251 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 252 qla2x00_async_event(vha, rsp, mb); 253 break; 254 default: 255 ql_dbg(ql_dbg_async, vha, 0x5028, 256 "Unrecognized interrupt type (%d).\n", stat & 0xff); 257 break; 258 } 259 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 260 RD_REG_WORD_RELAXED(®->hccr); 261 } 262 qla2x00_handle_mbx_completion(ha, status); 263 spin_unlock_irqrestore(&ha->hardware_lock, flags); 264 265 return (IRQ_HANDLED); 266 } 267 268 /** 269 * qla2x00_mbx_completion() - Process mailbox command completions. 270 * @vha: SCSI driver HA context 271 * @mb0: Mailbox0 register 272 */ 273 static void 274 qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) 275 { 276 uint16_t cnt; 277 uint32_t mboxes; 278 uint16_t __iomem *wptr; 279 struct qla_hw_data *ha = vha->hw; 280 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 281 282 /* Read all mbox registers? */ 283 WARN_ON_ONCE(ha->mbx_count > 32); 284 mboxes = (1ULL << ha->mbx_count) - 1; 285 if (!ha->mcp) 286 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n"); 287 else 288 mboxes = ha->mcp->in_mb; 289 290 /* Load return mailbox registers. */ 291 ha->flags.mbox_int = 1; 292 ha->mailbox_out[0] = mb0; 293 mboxes >>= 1; 294 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1); 295 296 for (cnt = 1; cnt < ha->mbx_count; cnt++) { 297 if (IS_QLA2200(ha) && cnt == 8) 298 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8); 299 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0)) 300 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); 301 else if (mboxes & BIT_0) 302 ha->mailbox_out[cnt] = RD_REG_WORD(wptr); 303 304 wptr++; 305 mboxes >>= 1; 306 } 307 } 308 309 static void 310 qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) 311 { 312 static char *event[] = 313 { "Complete", "Request Notification", "Time Extension" }; 314 int rval; 315 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; 316 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82; 317 uint16_t __iomem *wptr; 318 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; 319 320 /* Seed data -- mailbox1 -> mailbox7. */ 321 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) 322 wptr = (uint16_t __iomem *)®24->mailbox1; 323 else if (IS_QLA8044(vha->hw)) 324 wptr = (uint16_t __iomem *)®82->mailbox_out[1]; 325 else 326 return; 327 328 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) 329 mb[cnt] = RD_REG_WORD(wptr); 330 331 ql_dbg(ql_dbg_async, vha, 0x5021, 332 "Inter-Driver Communication %s -- " 333 "%04x %04x %04x %04x %04x %04x %04x.\n", 334 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3], 335 mb[4], mb[5], mb[6]); 336 switch (aen) { 337 /* Handle IDC Error completion case. */ 338 case MBA_IDC_COMPLETE: 339 if (mb[1] >> 15) { 340 vha->hw->flags.idc_compl_status = 1; 341 if (vha->hw->notify_dcbx_comp && !vha->vp_idx) 342 complete(&vha->hw->dcbx_comp); 343 } 344 break; 345 346 case MBA_IDC_NOTIFY: 347 /* Acknowledgement needed? [Notify && non-zero timeout]. */ 348 timeout = (descr >> 8) & 0xf; 349 ql_dbg(ql_dbg_async, vha, 0x5022, 350 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n", 351 vha->host_no, event[aen & 0xff], timeout); 352 353 if (!timeout) 354 return; 355 rval = qla2x00_post_idc_ack_work(vha, mb); 356 if (rval != QLA_SUCCESS) 357 ql_log(ql_log_warn, vha, 0x5023, 358 "IDC failed to post ACK.\n"); 359 break; 360 case MBA_IDC_TIME_EXT: 361 vha->hw->idc_extend_tmo = descr; 362 ql_dbg(ql_dbg_async, vha, 0x5087, 363 "%lu Inter-Driver Communication %s -- " 364 "Extend timeout by=%d.\n", 365 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo); 366 break; 367 } 368 } 369 370 #define LS_UNKNOWN 2 371 const char * 372 qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed) 373 { 374 static const char *const link_speeds[] = { 375 "1", "2", "?", "4", "8", "16", "32", "10" 376 }; 377 #define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1) 378 379 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 380 return link_speeds[0]; 381 else if (speed == 0x13) 382 return link_speeds[QLA_LAST_SPEED]; 383 else if (speed < QLA_LAST_SPEED) 384 return link_speeds[speed]; 385 else 386 return link_speeds[LS_UNKNOWN]; 387 } 388 389 static void 390 qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) 391 { 392 struct qla_hw_data *ha = vha->hw; 393 394 /* 395 * 8200 AEN Interpretation: 396 * mb[0] = AEN code 397 * mb[1] = AEN Reason code 398 * mb[2] = LSW of Peg-Halt Status-1 Register 399 * mb[6] = MSW of Peg-Halt Status-1 Register 400 * mb[3] = LSW of Peg-Halt Status-2 register 401 * mb[7] = MSW of Peg-Halt Status-2 register 402 * mb[4] = IDC Device-State Register value 403 * mb[5] = IDC Driver-Presence Register value 404 */ 405 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: " 406 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n", 407 mb[0], mb[1], mb[2], mb[6]); 408 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x " 409 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x " 410 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]); 411 412 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE | 413 IDC_HEARTBEAT_FAILURE)) { 414 ha->flags.nic_core_hung = 1; 415 ql_log(ql_log_warn, vha, 0x5060, 416 "83XX: F/W Error Reported: Check if reset required.\n"); 417 418 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) { 419 uint32_t protocol_engine_id, fw_err_code, err_level; 420 421 /* 422 * IDC_PEG_HALT_STATUS_CHANGE interpretation: 423 * - PEG-Halt Status-1 Register: 424 * (LSW = mb[2], MSW = mb[6]) 425 * Bits 0-7 = protocol-engine ID 426 * Bits 8-28 = f/w error code 427 * Bits 29-31 = Error-level 428 * Error-level 0x1 = Non-Fatal error 429 * Error-level 0x2 = Recoverable Fatal error 430 * Error-level 0x4 = UnRecoverable Fatal error 431 * - PEG-Halt Status-2 Register: 432 * (LSW = mb[3], MSW = mb[7]) 433 */ 434 protocol_engine_id = (mb[2] & 0xff); 435 fw_err_code = (((mb[2] & 0xff00) >> 8) | 436 ((mb[6] & 0x1fff) << 8)); 437 err_level = ((mb[6] & 0xe000) >> 13); 438 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 " 439 "Register: protocol_engine_id=0x%x " 440 "fw_err_code=0x%x err_level=0x%x.\n", 441 protocol_engine_id, fw_err_code, err_level); 442 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 " 443 "Register: 0x%x%x.\n", mb[7], mb[3]); 444 if (err_level == ERR_LEVEL_NON_FATAL) { 445 ql_log(ql_log_warn, vha, 0x5063, 446 "Not a fatal error, f/w has recovered itself.\n"); 447 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) { 448 ql_log(ql_log_fatal, vha, 0x5064, 449 "Recoverable Fatal error: Chip reset " 450 "required.\n"); 451 qla83xx_schedule_work(vha, 452 QLA83XX_NIC_CORE_RESET); 453 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) { 454 ql_log(ql_log_fatal, vha, 0x5065, 455 "Unrecoverable Fatal error: Set FAILED " 456 "state, reboot required.\n"); 457 qla83xx_schedule_work(vha, 458 QLA83XX_NIC_CORE_UNRECOVERABLE); 459 } 460 } 461 462 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) { 463 uint16_t peg_fw_state, nw_interface_link_up; 464 uint16_t nw_interface_signal_detect, sfp_status; 465 uint16_t htbt_counter, htbt_monitor_enable; 466 uint16_t sfp_additional_info, sfp_multirate; 467 uint16_t sfp_tx_fault, link_speed, dcbx_status; 468 469 /* 470 * IDC_NIC_FW_REPORTED_FAILURE interpretation: 471 * - PEG-to-FC Status Register: 472 * (LSW = mb[2], MSW = mb[6]) 473 * Bits 0-7 = Peg-Firmware state 474 * Bit 8 = N/W Interface Link-up 475 * Bit 9 = N/W Interface signal detected 476 * Bits 10-11 = SFP Status 477 * SFP Status 0x0 = SFP+ transceiver not expected 478 * SFP Status 0x1 = SFP+ transceiver not present 479 * SFP Status 0x2 = SFP+ transceiver invalid 480 * SFP Status 0x3 = SFP+ transceiver present and 481 * valid 482 * Bits 12-14 = Heartbeat Counter 483 * Bit 15 = Heartbeat Monitor Enable 484 * Bits 16-17 = SFP Additional Info 485 * SFP info 0x0 = Unregocnized transceiver for 486 * Ethernet 487 * SFP info 0x1 = SFP+ brand validation failed 488 * SFP info 0x2 = SFP+ speed validation failed 489 * SFP info 0x3 = SFP+ access error 490 * Bit 18 = SFP Multirate 491 * Bit 19 = SFP Tx Fault 492 * Bits 20-22 = Link Speed 493 * Bits 23-27 = Reserved 494 * Bits 28-30 = DCBX Status 495 * DCBX Status 0x0 = DCBX Disabled 496 * DCBX Status 0x1 = DCBX Enabled 497 * DCBX Status 0x2 = DCBX Exchange error 498 * Bit 31 = Reserved 499 */ 500 peg_fw_state = (mb[2] & 0x00ff); 501 nw_interface_link_up = ((mb[2] & 0x0100) >> 8); 502 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9); 503 sfp_status = ((mb[2] & 0x0c00) >> 10); 504 htbt_counter = ((mb[2] & 0x7000) >> 12); 505 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15); 506 sfp_additional_info = (mb[6] & 0x0003); 507 sfp_multirate = ((mb[6] & 0x0004) >> 2); 508 sfp_tx_fault = ((mb[6] & 0x0008) >> 3); 509 link_speed = ((mb[6] & 0x0070) >> 4); 510 dcbx_status = ((mb[6] & 0x7000) >> 12); 511 512 ql_log(ql_log_warn, vha, 0x5066, 513 "Peg-to-Fc Status Register:\n" 514 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, " 515 "nw_interface_signal_detect=0x%x" 516 "\nsfp_statis=0x%x.\n ", peg_fw_state, 517 nw_interface_link_up, nw_interface_signal_detect, 518 sfp_status); 519 ql_log(ql_log_warn, vha, 0x5067, 520 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, " 521 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ", 522 htbt_counter, htbt_monitor_enable, 523 sfp_additional_info, sfp_multirate); 524 ql_log(ql_log_warn, vha, 0x5068, 525 "sfp_tx_fault=0x%x, link_state=0x%x, " 526 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed, 527 dcbx_status); 528 529 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); 530 } 531 532 if (mb[1] & IDC_HEARTBEAT_FAILURE) { 533 ql_log(ql_log_warn, vha, 0x5069, 534 "Heartbeat Failure encountered, chip reset " 535 "required.\n"); 536 537 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); 538 } 539 } 540 541 if (mb[1] & IDC_DEVICE_STATE_CHANGE) { 542 ql_log(ql_log_info, vha, 0x506a, 543 "IDC Device-State changed = 0x%x.\n", mb[4]); 544 if (ha->flags.nic_core_reset_owner) 545 return; 546 qla83xx_schedule_work(vha, MBA_IDC_AEN); 547 } 548 } 549 550 int 551 qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry) 552 { 553 struct qla_hw_data *ha = vha->hw; 554 scsi_qla_host_t *vp; 555 uint32_t vp_did; 556 unsigned long flags; 557 int ret = 0; 558 559 if (!ha->num_vhosts) 560 return ret; 561 562 spin_lock_irqsave(&ha->vport_slock, flags); 563 list_for_each_entry(vp, &ha->vp_list, list) { 564 vp_did = vp->d_id.b24; 565 if (vp_did == rscn_entry) { 566 ret = 1; 567 break; 568 } 569 } 570 spin_unlock_irqrestore(&ha->vport_slock, flags); 571 572 return ret; 573 } 574 575 fc_port_t * 576 qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id) 577 { 578 fc_port_t *f, *tf; 579 580 f = tf = NULL; 581 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) 582 if (f->loop_id == loop_id) 583 return f; 584 return NULL; 585 } 586 587 fc_port_t * 588 qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted) 589 { 590 fc_port_t *f, *tf; 591 592 f = tf = NULL; 593 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 594 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) { 595 if (incl_deleted) 596 return f; 597 else if (f->deleted == 0) 598 return f; 599 } 600 } 601 return NULL; 602 } 603 604 fc_port_t * 605 qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id, 606 u8 incl_deleted) 607 { 608 fc_port_t *f, *tf; 609 610 f = tf = NULL; 611 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 612 if (f->d_id.b24 == id->b24) { 613 if (incl_deleted) 614 return f; 615 else if (f->deleted == 0) 616 return f; 617 } 618 } 619 return NULL; 620 } 621 622 /** 623 * qla2x00_async_event() - Process aynchronous events. 624 * @vha: SCSI driver HA context 625 * @rsp: response queue 626 * @mb: Mailbox registers (0 - 3) 627 */ 628 void 629 qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb) 630 { 631 uint16_t handle_cnt; 632 uint16_t cnt, mbx; 633 uint32_t handles[5]; 634 struct qla_hw_data *ha = vha->hw; 635 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 636 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; 637 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; 638 uint32_t rscn_entry, host_pid; 639 unsigned long flags; 640 fc_port_t *fcport = NULL; 641 642 if (!vha->hw->flags.fw_started) 643 return; 644 645 /* Setup to process RIO completion. */ 646 handle_cnt = 0; 647 if (IS_CNA_CAPABLE(ha)) 648 goto skip_rio; 649 switch (mb[0]) { 650 case MBA_SCSI_COMPLETION: 651 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); 652 handle_cnt = 1; 653 break; 654 case MBA_CMPLT_1_16BIT: 655 handles[0] = mb[1]; 656 handle_cnt = 1; 657 mb[0] = MBA_SCSI_COMPLETION; 658 break; 659 case MBA_CMPLT_2_16BIT: 660 handles[0] = mb[1]; 661 handles[1] = mb[2]; 662 handle_cnt = 2; 663 mb[0] = MBA_SCSI_COMPLETION; 664 break; 665 case MBA_CMPLT_3_16BIT: 666 handles[0] = mb[1]; 667 handles[1] = mb[2]; 668 handles[2] = mb[3]; 669 handle_cnt = 3; 670 mb[0] = MBA_SCSI_COMPLETION; 671 break; 672 case MBA_CMPLT_4_16BIT: 673 handles[0] = mb[1]; 674 handles[1] = mb[2]; 675 handles[2] = mb[3]; 676 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); 677 handle_cnt = 4; 678 mb[0] = MBA_SCSI_COMPLETION; 679 break; 680 case MBA_CMPLT_5_16BIT: 681 handles[0] = mb[1]; 682 handles[1] = mb[2]; 683 handles[2] = mb[3]; 684 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); 685 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); 686 handle_cnt = 5; 687 mb[0] = MBA_SCSI_COMPLETION; 688 break; 689 case MBA_CMPLT_2_32BIT: 690 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); 691 handles[1] = le32_to_cpu( 692 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) | 693 RD_MAILBOX_REG(ha, reg, 6)); 694 handle_cnt = 2; 695 mb[0] = MBA_SCSI_COMPLETION; 696 break; 697 default: 698 break; 699 } 700 skip_rio: 701 switch (mb[0]) { 702 case MBA_SCSI_COMPLETION: /* Fast Post */ 703 if (!vha->flags.online) 704 break; 705 706 for (cnt = 0; cnt < handle_cnt; cnt++) 707 qla2x00_process_completed_request(vha, rsp->req, 708 handles[cnt]); 709 break; 710 711 case MBA_RESET: /* Reset */ 712 ql_dbg(ql_dbg_async, vha, 0x5002, 713 "Asynchronous RESET.\n"); 714 715 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 716 break; 717 718 case MBA_SYSTEM_ERR: /* System Error */ 719 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 720 IS_QLA28XX(ha)) ? 721 RD_REG_WORD(®24->mailbox7) : 0; 722 ql_log(ql_log_warn, vha, 0x5003, 723 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh " 724 "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx); 725 ha->fw_dump_mpi = 726 (IS_QLA27XX(ha) || IS_QLA28XX(ha)) && 727 RD_REG_WORD(®24->mailbox7) & BIT_8; 728 ha->isp_ops->fw_dump(vha, 1); 729 ha->flags.fw_init_done = 0; 730 QLA_FW_STOPPED(ha); 731 732 if (IS_FWI2_CAPABLE(ha)) { 733 if (mb[1] == 0 && mb[2] == 0) { 734 ql_log(ql_log_fatal, vha, 0x5004, 735 "Unrecoverable Hardware Error: adapter " 736 "marked OFFLINE!\n"); 737 vha->flags.online = 0; 738 vha->device_flags |= DFLG_DEV_FAILED; 739 } else { 740 /* Check to see if MPI timeout occurred */ 741 if ((mbx & MBX_3) && (ha->port_no == 0)) 742 set_bit(MPI_RESET_NEEDED, 743 &vha->dpc_flags); 744 745 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 746 } 747 } else if (mb[1] == 0) { 748 ql_log(ql_log_fatal, vha, 0x5005, 749 "Unrecoverable Hardware Error: adapter marked " 750 "OFFLINE!\n"); 751 vha->flags.online = 0; 752 vha->device_flags |= DFLG_DEV_FAILED; 753 } else 754 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 755 break; 756 757 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */ 758 ql_log(ql_log_warn, vha, 0x5006, 759 "ISP Request Transfer Error (%x).\n", mb[1]); 760 761 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 762 break; 763 764 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */ 765 ql_log(ql_log_warn, vha, 0x5007, 766 "ISP Response Transfer Error (%x).\n", mb[1]); 767 768 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 769 break; 770 771 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */ 772 ql_dbg(ql_dbg_async, vha, 0x5008, 773 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]); 774 break; 775 776 case MBA_LOOP_INIT_ERR: 777 ql_log(ql_log_warn, vha, 0x5090, 778 "LOOP INIT ERROR (%x).\n", mb[1]); 779 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 780 break; 781 782 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ 783 ha->flags.lip_ae = 1; 784 785 ql_dbg(ql_dbg_async, vha, 0x5009, 786 "LIP occurred (%x).\n", mb[1]); 787 788 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 789 atomic_set(&vha->loop_state, LOOP_DOWN); 790 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 791 qla2x00_mark_all_devices_lost(vha); 792 } 793 794 if (vha->vp_idx) { 795 atomic_set(&vha->vp_state, VP_FAILED); 796 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 797 } 798 799 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); 800 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); 801 802 vha->flags.management_server_logged_in = 0; 803 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]); 804 break; 805 806 case MBA_LOOP_UP: /* Loop Up Event */ 807 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 808 ha->link_data_rate = PORT_SPEED_1GB; 809 else 810 ha->link_data_rate = mb[1]; 811 812 ql_log(ql_log_info, vha, 0x500a, 813 "LOOP UP detected (%s Gbps).\n", 814 qla2x00_get_link_speed_str(ha, ha->link_data_rate)); 815 816 vha->flags.management_server_logged_in = 0; 817 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); 818 819 if (AUTO_DETECT_SFP_SUPPORT(vha)) { 820 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags); 821 qla2xxx_wake_dpc(vha); 822 } 823 break; 824 825 case MBA_LOOP_DOWN: /* Loop Down Event */ 826 SAVE_TOPO(ha); 827 ha->flags.lip_ae = 0; 828 ha->current_topology = 0; 829 830 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) 831 ? RD_REG_WORD(®24->mailbox4) : 0; 832 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(®82->mailbox_out[4]) 833 : mbx; 834 ql_log(ql_log_info, vha, 0x500b, 835 "LOOP DOWN detected (%x %x %x %x).\n", 836 mb[1], mb[2], mb[3], mbx); 837 838 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 839 atomic_set(&vha->loop_state, LOOP_DOWN); 840 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 841 /* 842 * In case of loop down, restore WWPN from 843 * NVRAM in case of FA-WWPN capable ISP 844 * Restore for Physical Port only 845 */ 846 if (!vha->vp_idx) { 847 if (ha->flags.fawwpn_enabled && 848 (ha->current_topology == ISP_CFG_F)) { 849 void *wwpn = ha->init_cb->port_name; 850 851 memcpy(vha->port_name, wwpn, WWN_SIZE); 852 fc_host_port_name(vha->host) = 853 wwn_to_u64(vha->port_name); 854 ql_dbg(ql_dbg_init + ql_dbg_verbose, 855 vha, 0x00d8, "LOOP DOWN detected," 856 "restore WWPN %016llx\n", 857 wwn_to_u64(vha->port_name)); 858 } 859 860 clear_bit(VP_CONFIG_OK, &vha->vp_flags); 861 } 862 863 vha->device_flags |= DFLG_NO_CABLE; 864 qla2x00_mark_all_devices_lost(vha); 865 } 866 867 if (vha->vp_idx) { 868 atomic_set(&vha->vp_state, VP_FAILED); 869 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 870 } 871 872 vha->flags.management_server_logged_in = 0; 873 ha->link_data_rate = PORT_SPEED_UNKNOWN; 874 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0); 875 break; 876 877 case MBA_LIP_RESET: /* LIP reset occurred */ 878 ql_dbg(ql_dbg_async, vha, 0x500c, 879 "LIP reset occurred (%x).\n", mb[1]); 880 881 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 882 atomic_set(&vha->loop_state, LOOP_DOWN); 883 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 884 qla2x00_mark_all_devices_lost(vha); 885 } 886 887 if (vha->vp_idx) { 888 atomic_set(&vha->vp_state, VP_FAILED); 889 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 890 } 891 892 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 893 894 ha->operating_mode = LOOP; 895 vha->flags.management_server_logged_in = 0; 896 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]); 897 break; 898 899 /* case MBA_DCBX_COMPLETE: */ 900 case MBA_POINT_TO_POINT: /* Point-to-Point */ 901 ha->flags.lip_ae = 0; 902 903 if (IS_QLA2100(ha)) 904 break; 905 906 if (IS_CNA_CAPABLE(ha)) { 907 ql_dbg(ql_dbg_async, vha, 0x500d, 908 "DCBX Completed -- %04x %04x %04x.\n", 909 mb[1], mb[2], mb[3]); 910 if (ha->notify_dcbx_comp && !vha->vp_idx) 911 complete(&ha->dcbx_comp); 912 913 } else 914 ql_dbg(ql_dbg_async, vha, 0x500e, 915 "Asynchronous P2P MODE received.\n"); 916 917 /* 918 * Until there's a transition from loop down to loop up, treat 919 * this as loop down only. 920 */ 921 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 922 atomic_set(&vha->loop_state, LOOP_DOWN); 923 if (!atomic_read(&vha->loop_down_timer)) 924 atomic_set(&vha->loop_down_timer, 925 LOOP_DOWN_TIME); 926 if (!N2N_TOPO(ha)) 927 qla2x00_mark_all_devices_lost(vha); 928 } 929 930 if (vha->vp_idx) { 931 atomic_set(&vha->vp_state, VP_FAILED); 932 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 933 } 934 935 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) 936 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 937 938 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); 939 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); 940 941 vha->flags.management_server_logged_in = 0; 942 break; 943 944 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */ 945 if (IS_QLA2100(ha)) 946 break; 947 948 ql_dbg(ql_dbg_async, vha, 0x500f, 949 "Configuration change detected: value=%x.\n", mb[1]); 950 951 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 952 atomic_set(&vha->loop_state, LOOP_DOWN); 953 if (!atomic_read(&vha->loop_down_timer)) 954 atomic_set(&vha->loop_down_timer, 955 LOOP_DOWN_TIME); 956 qla2x00_mark_all_devices_lost(vha); 957 } 958 959 if (vha->vp_idx) { 960 atomic_set(&vha->vp_state, VP_FAILED); 961 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 962 } 963 964 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 965 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 966 break; 967 968 case MBA_PORT_UPDATE: /* Port database update */ 969 /* 970 * Handle only global and vn-port update events 971 * 972 * Relevant inputs: 973 * mb[1] = N_Port handle of changed port 974 * OR 0xffff for global event 975 * mb[2] = New login state 976 * 7 = Port logged out 977 * mb[3] = LSB is vp_idx, 0xff = all vps 978 * 979 * Skip processing if: 980 * Event is global, vp_idx is NOT all vps, 981 * vp_idx does not match 982 * Event is not global, vp_idx does not match 983 */ 984 if (IS_QLA2XXX_MIDTYPE(ha) && 985 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) || 986 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff)) 987 break; 988 989 if (mb[2] == 0x7) { 990 ql_dbg(ql_dbg_async, vha, 0x5010, 991 "Port %s %04x %04x %04x.\n", 992 mb[1] == 0xffff ? "unavailable" : "logout", 993 mb[1], mb[2], mb[3]); 994 995 if (mb[1] == 0xffff) 996 goto global_port_update; 997 998 if (mb[1] == NPH_SNS_LID(ha)) { 999 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1000 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1001 break; 1002 } 1003 1004 /* use handle_cnt for loop id/nport handle */ 1005 if (IS_FWI2_CAPABLE(ha)) 1006 handle_cnt = NPH_SNS; 1007 else 1008 handle_cnt = SIMPLE_NAME_SERVER; 1009 if (mb[1] == handle_cnt) { 1010 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1011 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1012 break; 1013 } 1014 1015 /* Port logout */ 1016 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]); 1017 if (!fcport) 1018 break; 1019 if (atomic_read(&fcport->state) != FCS_ONLINE) 1020 break; 1021 ql_dbg(ql_dbg_async, vha, 0x508a, 1022 "Marking port lost loopid=%04x portid=%06x.\n", 1023 fcport->loop_id, fcport->d_id.b24); 1024 if (qla_ini_mode_enabled(vha)) { 1025 fcport->logout_on_delete = 0; 1026 qlt_schedule_sess_for_deletion(fcport); 1027 } 1028 break; 1029 1030 global_port_update: 1031 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1032 atomic_set(&vha->loop_state, LOOP_DOWN); 1033 atomic_set(&vha->loop_down_timer, 1034 LOOP_DOWN_TIME); 1035 vha->device_flags |= DFLG_NO_CABLE; 1036 qla2x00_mark_all_devices_lost(vha); 1037 } 1038 1039 if (vha->vp_idx) { 1040 atomic_set(&vha->vp_state, VP_FAILED); 1041 fc_vport_set_state(vha->fc_vport, 1042 FC_VPORT_FAILED); 1043 qla2x00_mark_all_devices_lost(vha); 1044 } 1045 1046 vha->flags.management_server_logged_in = 0; 1047 ha->link_data_rate = PORT_SPEED_UNKNOWN; 1048 break; 1049 } 1050 1051 /* 1052 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET 1053 * event etc. earlier indicating loop is down) then process 1054 * it. Otherwise ignore it and Wait for RSCN to come in. 1055 */ 1056 atomic_set(&vha->loop_down_timer, 0); 1057 if (atomic_read(&vha->loop_state) != LOOP_DOWN && 1058 !ha->flags.n2n_ae && 1059 atomic_read(&vha->loop_state) != LOOP_DEAD) { 1060 ql_dbg(ql_dbg_async, vha, 0x5011, 1061 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n", 1062 mb[1], mb[2], mb[3]); 1063 break; 1064 } 1065 1066 ql_dbg(ql_dbg_async, vha, 0x5012, 1067 "Port database changed %04x %04x %04x.\n", 1068 mb[1], mb[2], mb[3]); 1069 1070 /* 1071 * Mark all devices as missing so we will login again. 1072 */ 1073 atomic_set(&vha->loop_state, LOOP_UP); 1074 vha->scan.scan_retry = 0; 1075 1076 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1077 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1078 set_bit(VP_CONFIG_OK, &vha->vp_flags); 1079 break; 1080 1081 case MBA_RSCN_UPDATE: /* State Change Registration */ 1082 /* Check if the Vport has issued a SCR */ 1083 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags)) 1084 break; 1085 /* Only handle SCNs for our Vport index. */ 1086 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff)) 1087 break; 1088 1089 ql_dbg(ql_dbg_async, vha, 0x5013, 1090 "RSCN database changed -- %04x %04x %04x.\n", 1091 mb[1], mb[2], mb[3]); 1092 1093 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2]; 1094 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8) 1095 | vha->d_id.b.al_pa; 1096 if (rscn_entry == host_pid) { 1097 ql_dbg(ql_dbg_async, vha, 0x5014, 1098 "Ignoring RSCN update to local host " 1099 "port ID (%06x).\n", host_pid); 1100 break; 1101 } 1102 1103 /* Ignore reserved bits from RSCN-payload. */ 1104 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2]; 1105 1106 /* Skip RSCNs for virtual ports on the same physical port */ 1107 if (qla2x00_is_a_vp_did(vha, rscn_entry)) 1108 break; 1109 1110 atomic_set(&vha->loop_down_timer, 0); 1111 vha->flags.management_server_logged_in = 0; 1112 { 1113 struct event_arg ea; 1114 1115 memset(&ea, 0, sizeof(ea)); 1116 ea.id.b24 = rscn_entry; 1117 ea.id.b.rsvd_1 = rscn_entry >> 24; 1118 qla2x00_handle_rscn(vha, &ea); 1119 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry); 1120 } 1121 break; 1122 /* case MBA_RIO_RESPONSE: */ 1123 case MBA_ZIO_RESPONSE: 1124 ql_dbg(ql_dbg_async, vha, 0x5015, 1125 "[R|Z]IO update completion.\n"); 1126 1127 if (IS_FWI2_CAPABLE(ha)) 1128 qla24xx_process_response_queue(vha, rsp); 1129 else 1130 qla2x00_process_response_queue(rsp); 1131 break; 1132 1133 case MBA_DISCARD_RND_FRAME: 1134 ql_dbg(ql_dbg_async, vha, 0x5016, 1135 "Discard RND Frame -- %04x %04x %04x.\n", 1136 mb[1], mb[2], mb[3]); 1137 break; 1138 1139 case MBA_TRACE_NOTIFICATION: 1140 ql_dbg(ql_dbg_async, vha, 0x5017, 1141 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]); 1142 break; 1143 1144 case MBA_ISP84XX_ALERT: 1145 ql_dbg(ql_dbg_async, vha, 0x5018, 1146 "ISP84XX Alert Notification -- %04x %04x %04x.\n", 1147 mb[1], mb[2], mb[3]); 1148 1149 spin_lock_irqsave(&ha->cs84xx->access_lock, flags); 1150 switch (mb[1]) { 1151 case A84_PANIC_RECOVERY: 1152 ql_log(ql_log_info, vha, 0x5019, 1153 "Alert 84XX: panic recovery %04x %04x.\n", 1154 mb[2], mb[3]); 1155 break; 1156 case A84_OP_LOGIN_COMPLETE: 1157 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; 1158 ql_log(ql_log_info, vha, 0x501a, 1159 "Alert 84XX: firmware version %x.\n", 1160 ha->cs84xx->op_fw_version); 1161 break; 1162 case A84_DIAG_LOGIN_COMPLETE: 1163 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; 1164 ql_log(ql_log_info, vha, 0x501b, 1165 "Alert 84XX: diagnostic firmware version %x.\n", 1166 ha->cs84xx->diag_fw_version); 1167 break; 1168 case A84_GOLD_LOGIN_COMPLETE: 1169 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; 1170 ha->cs84xx->fw_update = 1; 1171 ql_log(ql_log_info, vha, 0x501c, 1172 "Alert 84XX: gold firmware version %x.\n", 1173 ha->cs84xx->gold_fw_version); 1174 break; 1175 default: 1176 ql_log(ql_log_warn, vha, 0x501d, 1177 "Alert 84xx: Invalid Alert %04x %04x %04x.\n", 1178 mb[1], mb[2], mb[3]); 1179 } 1180 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); 1181 break; 1182 case MBA_DCBX_START: 1183 ql_dbg(ql_dbg_async, vha, 0x501e, 1184 "DCBX Started -- %04x %04x %04x.\n", 1185 mb[1], mb[2], mb[3]); 1186 break; 1187 case MBA_DCBX_PARAM_UPDATE: 1188 ql_dbg(ql_dbg_async, vha, 0x501f, 1189 "DCBX Parameters Updated -- %04x %04x %04x.\n", 1190 mb[1], mb[2], mb[3]); 1191 break; 1192 case MBA_FCF_CONF_ERR: 1193 ql_dbg(ql_dbg_async, vha, 0x5020, 1194 "FCF Configuration Error -- %04x %04x %04x.\n", 1195 mb[1], mb[2], mb[3]); 1196 break; 1197 case MBA_IDC_NOTIFY: 1198 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { 1199 mb[4] = RD_REG_WORD(®24->mailbox4); 1200 if (((mb[2] & 0x7fff) == MBC_PORT_RESET || 1201 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) && 1202 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) { 1203 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); 1204 /* 1205 * Extend loop down timer since port is active. 1206 */ 1207 if (atomic_read(&vha->loop_state) == LOOP_DOWN) 1208 atomic_set(&vha->loop_down_timer, 1209 LOOP_DOWN_TIME); 1210 qla2xxx_wake_dpc(vha); 1211 } 1212 } 1213 /* fall through */ 1214 case MBA_IDC_COMPLETE: 1215 if (ha->notify_lb_portup_comp && !vha->vp_idx) 1216 complete(&ha->lb_portup_comp); 1217 /* Fallthru */ 1218 case MBA_IDC_TIME_EXT: 1219 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || 1220 IS_QLA8044(ha)) 1221 qla81xx_idc_event(vha, mb[0], mb[1]); 1222 break; 1223 1224 case MBA_IDC_AEN: 1225 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1226 ha->flags.fw_init_done = 0; 1227 ql_log(ql_log_warn, vha, 0xffff, 1228 "MPI Heartbeat stop. Chip reset needed. MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n", 1229 mb[0], mb[1], mb[2], mb[3]); 1230 1231 if ((mb[1] & BIT_8) || 1232 (mb[2] & BIT_8)) { 1233 ql_log(ql_log_warn, vha, 0xd013, 1234 "MPI Heartbeat stop. FW dump needed\n"); 1235 ha->fw_dump_mpi = 1; 1236 ha->isp_ops->fw_dump(vha, 1); 1237 } 1238 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1239 qla2xxx_wake_dpc(vha); 1240 } else if (IS_QLA83XX(ha)) { 1241 mb[4] = RD_REG_WORD(®24->mailbox4); 1242 mb[5] = RD_REG_WORD(®24->mailbox5); 1243 mb[6] = RD_REG_WORD(®24->mailbox6); 1244 mb[7] = RD_REG_WORD(®24->mailbox7); 1245 qla83xx_handle_8200_aen(vha, mb); 1246 } else { 1247 ql_dbg(ql_dbg_async, vha, 0x5052, 1248 "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n", 1249 mb[0], mb[1], mb[2], mb[3]); 1250 } 1251 break; 1252 1253 case MBA_DPORT_DIAGNOSTICS: 1254 ql_dbg(ql_dbg_async, vha, 0x5052, 1255 "D-Port Diagnostics: %04x %04x %04x %04x\n", 1256 mb[0], mb[1], mb[2], mb[3]); 1257 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1258 static char *results[] = { 1259 "start", "done(pass)", "done(error)", "undefined" }; 1260 static char *types[] = { 1261 "none", "dynamic", "static", "other" }; 1262 uint result = mb[1] >> 0 & 0x3; 1263 uint type = mb[1] >> 6 & 0x3; 1264 uint sw = mb[1] >> 15 & 0x1; 1265 ql_dbg(ql_dbg_async, vha, 0x5052, 1266 "D-Port Diagnostics: result=%s type=%s [sw=%u]\n", 1267 results[result], types[type], sw); 1268 if (result == 2) { 1269 static char *reasons[] = { 1270 "reserved", "unexpected reject", 1271 "unexpected phase", "retry exceeded", 1272 "timed out", "not supported", 1273 "user stopped" }; 1274 uint reason = mb[2] >> 0 & 0xf; 1275 uint phase = mb[2] >> 12 & 0xf; 1276 ql_dbg(ql_dbg_async, vha, 0x5052, 1277 "D-Port Diagnostics: reason=%s phase=%u \n", 1278 reason < 7 ? reasons[reason] : "other", 1279 phase >> 1); 1280 } 1281 } 1282 break; 1283 1284 case MBA_TEMPERATURE_ALERT: 1285 ql_dbg(ql_dbg_async, vha, 0x505e, 1286 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]); 1287 if (mb[1] == 0x12) 1288 schedule_work(&ha->board_disable); 1289 break; 1290 1291 case MBA_TRANS_INSERT: 1292 ql_dbg(ql_dbg_async, vha, 0x5091, 1293 "Transceiver Insertion: %04x\n", mb[1]); 1294 break; 1295 1296 default: 1297 ql_dbg(ql_dbg_async, vha, 0x5057, 1298 "Unknown AEN:%04x %04x %04x %04x\n", 1299 mb[0], mb[1], mb[2], mb[3]); 1300 } 1301 1302 qlt_async_event(mb[0], vha, mb); 1303 1304 if (!vha->vp_idx && ha->num_vhosts) 1305 qla2x00_alert_all_vps(rsp, mb); 1306 } 1307 1308 /** 1309 * qla2x00_process_completed_request() - Process a Fast Post response. 1310 * @vha: SCSI driver HA context 1311 * @req: request queue 1312 * @index: SRB index 1313 */ 1314 void 1315 qla2x00_process_completed_request(struct scsi_qla_host *vha, 1316 struct req_que *req, uint32_t index) 1317 { 1318 srb_t *sp; 1319 struct qla_hw_data *ha = vha->hw; 1320 1321 /* Validate handle. */ 1322 if (index >= req->num_outstanding_cmds) { 1323 ql_log(ql_log_warn, vha, 0x3014, 1324 "Invalid SCSI command index (%x).\n", index); 1325 1326 if (IS_P3P_TYPE(ha)) 1327 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1328 else 1329 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1330 return; 1331 } 1332 1333 sp = req->outstanding_cmds[index]; 1334 if (sp) { 1335 /* Free outstanding command slot. */ 1336 req->outstanding_cmds[index] = NULL; 1337 1338 /* Save ISP completion status */ 1339 sp->done(sp, DID_OK << 16); 1340 } else { 1341 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n"); 1342 1343 if (IS_P3P_TYPE(ha)) 1344 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1345 else 1346 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1347 } 1348 } 1349 1350 srb_t * 1351 qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func, 1352 struct req_que *req, void *iocb) 1353 { 1354 struct qla_hw_data *ha = vha->hw; 1355 sts_entry_t *pkt = iocb; 1356 srb_t *sp = NULL; 1357 uint16_t index; 1358 1359 index = LSW(pkt->handle); 1360 if (index >= req->num_outstanding_cmds) { 1361 ql_log(ql_log_warn, vha, 0x5031, 1362 "Invalid command index (%x) type %8ph.\n", 1363 index, iocb); 1364 if (IS_P3P_TYPE(ha)) 1365 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1366 else 1367 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1368 goto done; 1369 } 1370 sp = req->outstanding_cmds[index]; 1371 if (!sp) { 1372 ql_log(ql_log_warn, vha, 0x5032, 1373 "Invalid completion handle (%x) -- timed-out.\n", index); 1374 return sp; 1375 } 1376 if (sp->handle != index) { 1377 ql_log(ql_log_warn, vha, 0x5033, 1378 "SRB handle (%x) mismatch %x.\n", sp->handle, index); 1379 return NULL; 1380 } 1381 1382 req->outstanding_cmds[index] = NULL; 1383 1384 done: 1385 return sp; 1386 } 1387 1388 static void 1389 qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 1390 struct mbx_entry *mbx) 1391 { 1392 const char func[] = "MBX-IOCB"; 1393 const char *type; 1394 fc_port_t *fcport; 1395 srb_t *sp; 1396 struct srb_iocb *lio; 1397 uint16_t *data; 1398 uint16_t status; 1399 1400 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx); 1401 if (!sp) 1402 return; 1403 1404 lio = &sp->u.iocb_cmd; 1405 type = sp->name; 1406 fcport = sp->fcport; 1407 data = lio->u.logio.data; 1408 1409 data[0] = MBS_COMMAND_ERROR; 1410 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 1411 QLA_LOGIO_LOGIN_RETRIED : 0; 1412 if (mbx->entry_status) { 1413 ql_dbg(ql_dbg_async, vha, 0x5043, 1414 "Async-%s error entry - hdl=%x portid=%02x%02x%02x " 1415 "entry-status=%x status=%x state-flag=%x " 1416 "status-flags=%x.\n", type, sp->handle, 1417 fcport->d_id.b.domain, fcport->d_id.b.area, 1418 fcport->d_id.b.al_pa, mbx->entry_status, 1419 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags), 1420 le16_to_cpu(mbx->status_flags)); 1421 1422 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029, 1423 mbx, sizeof(*mbx)); 1424 1425 goto logio_done; 1426 } 1427 1428 status = le16_to_cpu(mbx->status); 1429 if (status == 0x30 && sp->type == SRB_LOGIN_CMD && 1430 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) 1431 status = 0; 1432 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) { 1433 ql_dbg(ql_dbg_async, vha, 0x5045, 1434 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n", 1435 type, sp->handle, fcport->d_id.b.domain, 1436 fcport->d_id.b.area, fcport->d_id.b.al_pa, 1437 le16_to_cpu(mbx->mb1)); 1438 1439 data[0] = MBS_COMMAND_COMPLETE; 1440 if (sp->type == SRB_LOGIN_CMD) { 1441 fcport->port_type = FCT_TARGET; 1442 if (le16_to_cpu(mbx->mb1) & BIT_0) 1443 fcport->port_type = FCT_INITIATOR; 1444 else if (le16_to_cpu(mbx->mb1) & BIT_1) 1445 fcport->flags |= FCF_FCP2_DEVICE; 1446 } 1447 goto logio_done; 1448 } 1449 1450 data[0] = le16_to_cpu(mbx->mb0); 1451 switch (data[0]) { 1452 case MBS_PORT_ID_USED: 1453 data[1] = le16_to_cpu(mbx->mb1); 1454 break; 1455 case MBS_LOOP_ID_USED: 1456 break; 1457 default: 1458 data[0] = MBS_COMMAND_ERROR; 1459 break; 1460 } 1461 1462 ql_log(ql_log_warn, vha, 0x5046, 1463 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x " 1464 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle, 1465 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 1466 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1), 1467 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6), 1468 le16_to_cpu(mbx->mb7)); 1469 1470 logio_done: 1471 sp->done(sp, 0); 1472 } 1473 1474 static void 1475 qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 1476 struct mbx_24xx_entry *pkt) 1477 { 1478 const char func[] = "MBX-IOCB2"; 1479 srb_t *sp; 1480 struct srb_iocb *si; 1481 u16 sz, i; 1482 int res; 1483 1484 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 1485 if (!sp) 1486 return; 1487 1488 si = &sp->u.iocb_cmd; 1489 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb)); 1490 1491 for (i = 0; i < sz; i++) 1492 si->u.mbx.in_mb[i] = le16_to_cpu(pkt->mb[i]); 1493 1494 res = (si->u.mbx.in_mb[0] & MBS_MASK); 1495 1496 sp->done(sp, res); 1497 } 1498 1499 static void 1500 qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 1501 struct nack_to_isp *pkt) 1502 { 1503 const char func[] = "nack"; 1504 srb_t *sp; 1505 int res = 0; 1506 1507 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 1508 if (!sp) 1509 return; 1510 1511 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS)) 1512 res = QLA_FUNCTION_FAILED; 1513 1514 sp->done(sp, res); 1515 } 1516 1517 static void 1518 qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req, 1519 sts_entry_t *pkt, int iocb_type) 1520 { 1521 const char func[] = "CT_IOCB"; 1522 const char *type; 1523 srb_t *sp; 1524 struct bsg_job *bsg_job; 1525 struct fc_bsg_reply *bsg_reply; 1526 uint16_t comp_status; 1527 int res = 0; 1528 1529 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 1530 if (!sp) 1531 return; 1532 1533 switch (sp->type) { 1534 case SRB_CT_CMD: 1535 bsg_job = sp->u.bsg_job; 1536 bsg_reply = bsg_job->reply; 1537 1538 type = "ct pass-through"; 1539 1540 comp_status = le16_to_cpu(pkt->comp_status); 1541 1542 /* 1543 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT 1544 * fc payload to the caller 1545 */ 1546 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; 1547 bsg_job->reply_len = sizeof(struct fc_bsg_reply); 1548 1549 if (comp_status != CS_COMPLETE) { 1550 if (comp_status == CS_DATA_UNDERRUN) { 1551 res = DID_OK << 16; 1552 bsg_reply->reply_payload_rcv_len = 1553 le16_to_cpu(pkt->rsp_info_len); 1554 1555 ql_log(ql_log_warn, vha, 0x5048, 1556 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n", 1557 type, comp_status, 1558 bsg_reply->reply_payload_rcv_len); 1559 } else { 1560 ql_log(ql_log_warn, vha, 0x5049, 1561 "CT pass-through-%s error comp_status=0x%x.\n", 1562 type, comp_status); 1563 res = DID_ERROR << 16; 1564 bsg_reply->reply_payload_rcv_len = 0; 1565 } 1566 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035, 1567 pkt, sizeof(*pkt)); 1568 } else { 1569 res = DID_OK << 16; 1570 bsg_reply->reply_payload_rcv_len = 1571 bsg_job->reply_payload.payload_len; 1572 bsg_job->reply_len = 0; 1573 } 1574 break; 1575 case SRB_CT_PTHRU_CMD: 1576 /* 1577 * borrowing sts_entry_24xx.comp_status. 1578 * same location as ct_entry_24xx.comp_status 1579 */ 1580 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt, 1581 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, 1582 sp->name); 1583 break; 1584 } 1585 1586 sp->done(sp, res); 1587 } 1588 1589 static void 1590 qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req, 1591 struct sts_entry_24xx *pkt, int iocb_type) 1592 { 1593 const char func[] = "ELS_CT_IOCB"; 1594 const char *type; 1595 srb_t *sp; 1596 struct bsg_job *bsg_job; 1597 struct fc_bsg_reply *bsg_reply; 1598 uint16_t comp_status; 1599 uint32_t fw_status[3]; 1600 int res; 1601 struct srb_iocb *els; 1602 1603 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 1604 if (!sp) 1605 return; 1606 1607 type = NULL; 1608 switch (sp->type) { 1609 case SRB_ELS_CMD_RPT: 1610 case SRB_ELS_CMD_HST: 1611 type = "els"; 1612 break; 1613 case SRB_CT_CMD: 1614 type = "ct pass-through"; 1615 break; 1616 case SRB_ELS_DCMD: 1617 type = "Driver ELS logo"; 1618 if (iocb_type != ELS_IOCB_TYPE) { 1619 ql_dbg(ql_dbg_user, vha, 0x5047, 1620 "Completing %s: (%p) type=%d.\n", 1621 type, sp, sp->type); 1622 sp->done(sp, 0); 1623 return; 1624 } 1625 break; 1626 case SRB_CT_PTHRU_CMD: 1627 /* borrowing sts_entry_24xx.comp_status. 1628 same location as ct_entry_24xx.comp_status 1629 */ 1630 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt, 1631 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, 1632 sp->name); 1633 sp->done(sp, res); 1634 return; 1635 default: 1636 ql_dbg(ql_dbg_user, vha, 0x503e, 1637 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type); 1638 return; 1639 } 1640 1641 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status); 1642 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_1); 1643 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_2); 1644 1645 if (iocb_type == ELS_IOCB_TYPE) { 1646 els = &sp->u.iocb_cmd; 1647 els->u.els_plogi.fw_status[0] = fw_status[0]; 1648 els->u.els_plogi.fw_status[1] = fw_status[1]; 1649 els->u.els_plogi.fw_status[2] = fw_status[2]; 1650 els->u.els_plogi.comp_status = fw_status[0]; 1651 if (comp_status == CS_COMPLETE) { 1652 res = DID_OK << 16; 1653 } else { 1654 if (comp_status == CS_DATA_UNDERRUN) { 1655 res = DID_OK << 16; 1656 els->u.els_plogi.len = 1657 le16_to_cpu(((struct els_sts_entry_24xx *) 1658 pkt)->total_byte_count); 1659 } else { 1660 els->u.els_plogi.len = 0; 1661 res = DID_ERROR << 16; 1662 } 1663 } 1664 ql_dbg(ql_dbg_user, vha, 0x503f, 1665 "ELS IOCB Done -%s error hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n", 1666 type, sp->handle, comp_status, fw_status[1], fw_status[2], 1667 le16_to_cpu(((struct els_sts_entry_24xx *) 1668 pkt)->total_byte_count)); 1669 goto els_ct_done; 1670 } 1671 1672 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT 1673 * fc payload to the caller 1674 */ 1675 bsg_job = sp->u.bsg_job; 1676 bsg_reply = bsg_job->reply; 1677 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; 1678 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status); 1679 1680 if (comp_status != CS_COMPLETE) { 1681 if (comp_status == CS_DATA_UNDERRUN) { 1682 res = DID_OK << 16; 1683 bsg_reply->reply_payload_rcv_len = 1684 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count); 1685 1686 ql_dbg(ql_dbg_user, vha, 0x503f, 1687 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " 1688 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n", 1689 type, sp->handle, comp_status, fw_status[1], fw_status[2], 1690 le16_to_cpu(((struct els_sts_entry_24xx *) 1691 pkt)->total_byte_count)); 1692 } else { 1693 ql_dbg(ql_dbg_user, vha, 0x5040, 1694 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " 1695 "error subcode 1=0x%x error subcode 2=0x%x.\n", 1696 type, sp->handle, comp_status, 1697 le16_to_cpu(((struct els_sts_entry_24xx *) 1698 pkt)->error_subcode_1), 1699 le16_to_cpu(((struct els_sts_entry_24xx *) 1700 pkt)->error_subcode_2)); 1701 res = DID_ERROR << 16; 1702 bsg_reply->reply_payload_rcv_len = 0; 1703 } 1704 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply), 1705 fw_status, sizeof(fw_status)); 1706 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056, 1707 pkt, sizeof(*pkt)); 1708 } 1709 else { 1710 res = DID_OK << 16; 1711 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len; 1712 bsg_job->reply_len = 0; 1713 } 1714 els_ct_done: 1715 1716 sp->done(sp, res); 1717 } 1718 1719 static void 1720 qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, 1721 struct logio_entry_24xx *logio) 1722 { 1723 const char func[] = "LOGIO-IOCB"; 1724 const char *type; 1725 fc_port_t *fcport; 1726 srb_t *sp; 1727 struct srb_iocb *lio; 1728 uint16_t *data; 1729 uint32_t iop[2]; 1730 1731 sp = qla2x00_get_sp_from_handle(vha, func, req, logio); 1732 if (!sp) 1733 return; 1734 1735 lio = &sp->u.iocb_cmd; 1736 type = sp->name; 1737 fcport = sp->fcport; 1738 data = lio->u.logio.data; 1739 1740 data[0] = MBS_COMMAND_ERROR; 1741 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 1742 QLA_LOGIO_LOGIN_RETRIED : 0; 1743 if (logio->entry_status) { 1744 ql_log(ql_log_warn, fcport->vha, 0x5034, 1745 "Async-%s error entry - %8phC hdl=%x" 1746 "portid=%02x%02x%02x entry-status=%x.\n", 1747 type, fcport->port_name, sp->handle, fcport->d_id.b.domain, 1748 fcport->d_id.b.area, fcport->d_id.b.al_pa, 1749 logio->entry_status); 1750 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d, 1751 logio, sizeof(*logio)); 1752 1753 goto logio_done; 1754 } 1755 1756 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) { 1757 ql_dbg(ql_dbg_async, fcport->vha, 0x5036, 1758 "Async-%s complete - %8phC hdl=%x portid=%02x%02x%02x " 1759 "iop0=%x.\n", type, fcport->port_name, sp->handle, 1760 fcport->d_id.b.domain, 1761 fcport->d_id.b.area, fcport->d_id.b.al_pa, 1762 le32_to_cpu(logio->io_parameter[0])); 1763 1764 vha->hw->exch_starvation = 0; 1765 data[0] = MBS_COMMAND_COMPLETE; 1766 1767 if (sp->type == SRB_PRLI_CMD) { 1768 lio->u.logio.iop[0] = 1769 le32_to_cpu(logio->io_parameter[0]); 1770 lio->u.logio.iop[1] = 1771 le32_to_cpu(logio->io_parameter[1]); 1772 goto logio_done; 1773 } 1774 1775 if (sp->type != SRB_LOGIN_CMD) 1776 goto logio_done; 1777 1778 iop[0] = le32_to_cpu(logio->io_parameter[0]); 1779 if (iop[0] & BIT_4) { 1780 fcport->port_type = FCT_TARGET; 1781 if (iop[0] & BIT_8) 1782 fcport->flags |= FCF_FCP2_DEVICE; 1783 } else if (iop[0] & BIT_5) 1784 fcport->port_type = FCT_INITIATOR; 1785 1786 if (iop[0] & BIT_7) 1787 fcport->flags |= FCF_CONF_COMP_SUPPORTED; 1788 1789 if (logio->io_parameter[7] || logio->io_parameter[8]) 1790 fcport->supported_classes |= FC_COS_CLASS2; 1791 if (logio->io_parameter[9] || logio->io_parameter[10]) 1792 fcport->supported_classes |= FC_COS_CLASS3; 1793 1794 goto logio_done; 1795 } 1796 1797 iop[0] = le32_to_cpu(logio->io_parameter[0]); 1798 iop[1] = le32_to_cpu(logio->io_parameter[1]); 1799 lio->u.logio.iop[0] = iop[0]; 1800 lio->u.logio.iop[1] = iop[1]; 1801 switch (iop[0]) { 1802 case LSC_SCODE_PORTID_USED: 1803 data[0] = MBS_PORT_ID_USED; 1804 data[1] = LSW(iop[1]); 1805 break; 1806 case LSC_SCODE_NPORT_USED: 1807 data[0] = MBS_LOOP_ID_USED; 1808 break; 1809 case LSC_SCODE_CMD_FAILED: 1810 if (iop[1] == 0x0606) { 1811 /* 1812 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI, 1813 * Target side acked. 1814 */ 1815 data[0] = MBS_COMMAND_COMPLETE; 1816 goto logio_done; 1817 } 1818 data[0] = MBS_COMMAND_ERROR; 1819 break; 1820 case LSC_SCODE_NOXCB: 1821 vha->hw->exch_starvation++; 1822 if (vha->hw->exch_starvation > 5) { 1823 ql_log(ql_log_warn, vha, 0xd046, 1824 "Exchange starvation. Resetting RISC\n"); 1825 1826 vha->hw->exch_starvation = 0; 1827 1828 if (IS_P3P_TYPE(vha->hw)) 1829 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1830 else 1831 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1832 qla2xxx_wake_dpc(vha); 1833 } 1834 /* fall through */ 1835 default: 1836 data[0] = MBS_COMMAND_ERROR; 1837 break; 1838 } 1839 1840 ql_dbg(ql_dbg_async, fcport->vha, 0x5037, 1841 "Async-%s failed - %8phC hdl=%x portid=%02x%02x%02x comp=%x " 1842 "iop0=%x iop1=%x.\n", type, fcport->port_name, 1843 sp->handle, fcport->d_id.b.domain, 1844 fcport->d_id.b.area, fcport->d_id.b.al_pa, 1845 le16_to_cpu(logio->comp_status), 1846 le32_to_cpu(logio->io_parameter[0]), 1847 le32_to_cpu(logio->io_parameter[1])); 1848 1849 logio_done: 1850 sp->done(sp, 0); 1851 } 1852 1853 static void 1854 qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk) 1855 { 1856 const char func[] = "TMF-IOCB"; 1857 const char *type; 1858 fc_port_t *fcport; 1859 srb_t *sp; 1860 struct srb_iocb *iocb; 1861 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; 1862 1863 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk); 1864 if (!sp) 1865 return; 1866 1867 iocb = &sp->u.iocb_cmd; 1868 type = sp->name; 1869 fcport = sp->fcport; 1870 iocb->u.tmf.data = QLA_SUCCESS; 1871 1872 if (sts->entry_status) { 1873 ql_log(ql_log_warn, fcport->vha, 0x5038, 1874 "Async-%s error - hdl=%x entry-status(%x).\n", 1875 type, sp->handle, sts->entry_status); 1876 iocb->u.tmf.data = QLA_FUNCTION_FAILED; 1877 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) { 1878 ql_log(ql_log_warn, fcport->vha, 0x5039, 1879 "Async-%s error - hdl=%x completion status(%x).\n", 1880 type, sp->handle, sts->comp_status); 1881 iocb->u.tmf.data = QLA_FUNCTION_FAILED; 1882 } else if ((le16_to_cpu(sts->scsi_status) & 1883 SS_RESPONSE_INFO_LEN_VALID)) { 1884 if (le32_to_cpu(sts->rsp_data_len) < 4) { 1885 ql_log(ql_log_warn, fcport->vha, 0x503b, 1886 "Async-%s error - hdl=%x not enough response(%d).\n", 1887 type, sp->handle, sts->rsp_data_len); 1888 } else if (sts->data[3]) { 1889 ql_log(ql_log_warn, fcport->vha, 0x503c, 1890 "Async-%s error - hdl=%x response(%x).\n", 1891 type, sp->handle, sts->data[3]); 1892 iocb->u.tmf.data = QLA_FUNCTION_FAILED; 1893 } 1894 } 1895 1896 if (iocb->u.tmf.data != QLA_SUCCESS) 1897 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055, 1898 sts, sizeof(*sts)); 1899 1900 sp->done(sp, 0); 1901 } 1902 1903 static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 1904 void *tsk, srb_t *sp) 1905 { 1906 fc_port_t *fcport; 1907 struct srb_iocb *iocb; 1908 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; 1909 uint16_t state_flags; 1910 struct nvmefc_fcp_req *fd; 1911 uint16_t ret = QLA_SUCCESS; 1912 uint16_t comp_status = le16_to_cpu(sts->comp_status); 1913 1914 iocb = &sp->u.iocb_cmd; 1915 fcport = sp->fcport; 1916 iocb->u.nvme.comp_status = comp_status; 1917 state_flags = le16_to_cpu(sts->state_flags); 1918 fd = iocb->u.nvme.desc; 1919 1920 if (unlikely(iocb->u.nvme.aen_op)) 1921 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt); 1922 1923 /* 1924 * State flags: Bit 6 and 0. 1925 * If 0 is set, we don't care about 6. 1926 * both cases resp was dma'd to host buffer 1927 * if both are 0, that is good path case. 1928 * if six is set and 0 is clear, we need to 1929 * copy resp data from status iocb to resp buffer. 1930 */ 1931 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) { 1932 iocb->u.nvme.rsp_pyld_len = 0; 1933 } else if ((state_flags & SF_FCP_RSP_DMA)) { 1934 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len); 1935 } else if (state_flags & SF_NVME_ERSP) { 1936 uint32_t *inbuf, *outbuf; 1937 uint16_t iter; 1938 1939 inbuf = (uint32_t *)&sts->nvme_ersp_data; 1940 outbuf = (uint32_t *)fd->rspaddr; 1941 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len); 1942 if (unlikely(iocb->u.nvme.rsp_pyld_len > 1943 sizeof(struct nvme_fc_ersp_iu))) { 1944 if (ql_mask_match(ql_dbg_io)) { 1945 WARN_ONCE(1, "Unexpected response payload length %u.\n", 1946 iocb->u.nvme.rsp_pyld_len); 1947 ql_log(ql_log_warn, fcport->vha, 0x5100, 1948 "Unexpected response payload length %u.\n", 1949 iocb->u.nvme.rsp_pyld_len); 1950 } 1951 iocb->u.nvme.rsp_pyld_len = 1952 sizeof(struct nvme_fc_ersp_iu); 1953 } 1954 iter = iocb->u.nvme.rsp_pyld_len >> 2; 1955 for (; iter; iter--) 1956 *outbuf++ = swab32(*inbuf++); 1957 } else { /* unhandled case */ 1958 ql_log(ql_log_warn, fcport->vha, 0x503a, 1959 "NVME-%s error. Unhandled state_flags of %x\n", 1960 sp->name, state_flags); 1961 } 1962 1963 fd->transferred_length = fd->payload_length - 1964 le32_to_cpu(sts->residual_len); 1965 1966 if (unlikely(comp_status != CS_COMPLETE)) 1967 ql_log(ql_log_warn, fcport->vha, 0x5060, 1968 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n", 1969 sp->name, sp->handle, comp_status, 1970 fd->transferred_length, le32_to_cpu(sts->residual_len), 1971 sts->ox_id); 1972 1973 /* 1974 * If transport error then Failure (HBA rejects request) 1975 * otherwise transport will handle. 1976 */ 1977 switch (comp_status) { 1978 case CS_COMPLETE: 1979 break; 1980 1981 case CS_RESET: 1982 case CS_PORT_UNAVAILABLE: 1983 case CS_PORT_LOGGED_OUT: 1984 fcport->nvme_flag |= NVME_FLAG_RESETTING; 1985 /* fall through */ 1986 case CS_ABORTED: 1987 case CS_PORT_BUSY: 1988 fd->transferred_length = 0; 1989 iocb->u.nvme.rsp_pyld_len = 0; 1990 ret = QLA_ABORTED; 1991 break; 1992 case CS_DATA_UNDERRUN: 1993 break; 1994 default: 1995 ret = QLA_FUNCTION_FAILED; 1996 break; 1997 } 1998 sp->done(sp, ret); 1999 } 2000 2001 static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req, 2002 struct vp_ctrl_entry_24xx *vce) 2003 { 2004 const char func[] = "CTRLVP-IOCB"; 2005 srb_t *sp; 2006 int rval = QLA_SUCCESS; 2007 2008 sp = qla2x00_get_sp_from_handle(vha, func, req, vce); 2009 if (!sp) 2010 return; 2011 2012 if (vce->entry_status != 0) { 2013 ql_dbg(ql_dbg_vport, vha, 0x10c4, 2014 "%s: Failed to complete IOCB -- error status (%x)\n", 2015 sp->name, vce->entry_status); 2016 rval = QLA_FUNCTION_FAILED; 2017 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { 2018 ql_dbg(ql_dbg_vport, vha, 0x10c5, 2019 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n", 2020 sp->name, le16_to_cpu(vce->comp_status), 2021 le16_to_cpu(vce->vp_idx_failed)); 2022 rval = QLA_FUNCTION_FAILED; 2023 } else { 2024 ql_dbg(ql_dbg_vport, vha, 0x10c6, 2025 "Done %s.\n", __func__); 2026 } 2027 2028 sp->rc = rval; 2029 sp->done(sp, rval); 2030 } 2031 2032 /* Process a single response queue entry. */ 2033 static void qla2x00_process_response_entry(struct scsi_qla_host *vha, 2034 struct rsp_que *rsp, 2035 sts_entry_t *pkt) 2036 { 2037 sts21_entry_t *sts21_entry; 2038 sts22_entry_t *sts22_entry; 2039 uint16_t handle_cnt; 2040 uint16_t cnt; 2041 2042 switch (pkt->entry_type) { 2043 case STATUS_TYPE: 2044 qla2x00_status_entry(vha, rsp, pkt); 2045 break; 2046 case STATUS_TYPE_21: 2047 sts21_entry = (sts21_entry_t *)pkt; 2048 handle_cnt = sts21_entry->handle_count; 2049 for (cnt = 0; cnt < handle_cnt; cnt++) 2050 qla2x00_process_completed_request(vha, rsp->req, 2051 sts21_entry->handle[cnt]); 2052 break; 2053 case STATUS_TYPE_22: 2054 sts22_entry = (sts22_entry_t *)pkt; 2055 handle_cnt = sts22_entry->handle_count; 2056 for (cnt = 0; cnt < handle_cnt; cnt++) 2057 qla2x00_process_completed_request(vha, rsp->req, 2058 sts22_entry->handle[cnt]); 2059 break; 2060 case STATUS_CONT_TYPE: 2061 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); 2062 break; 2063 case MBX_IOCB_TYPE: 2064 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt); 2065 break; 2066 case CT_IOCB_TYPE: 2067 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); 2068 break; 2069 default: 2070 /* Type Not Supported. */ 2071 ql_log(ql_log_warn, vha, 0x504a, 2072 "Received unknown response pkt type %x entry status=%x.\n", 2073 pkt->entry_type, pkt->entry_status); 2074 break; 2075 } 2076 } 2077 2078 /** 2079 * qla2x00_process_response_queue() - Process response queue entries. 2080 * @rsp: response queue 2081 */ 2082 void 2083 qla2x00_process_response_queue(struct rsp_que *rsp) 2084 { 2085 struct scsi_qla_host *vha; 2086 struct qla_hw_data *ha = rsp->hw; 2087 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2088 sts_entry_t *pkt; 2089 2090 vha = pci_get_drvdata(ha->pdev); 2091 2092 if (!vha->flags.online) 2093 return; 2094 2095 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { 2096 pkt = (sts_entry_t *)rsp->ring_ptr; 2097 2098 rsp->ring_index++; 2099 if (rsp->ring_index == rsp->length) { 2100 rsp->ring_index = 0; 2101 rsp->ring_ptr = rsp->ring; 2102 } else { 2103 rsp->ring_ptr++; 2104 } 2105 2106 if (pkt->entry_status != 0) { 2107 qla2x00_error_entry(vha, rsp, pkt); 2108 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 2109 wmb(); 2110 continue; 2111 } 2112 2113 qla2x00_process_response_entry(vha, rsp, pkt); 2114 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 2115 wmb(); 2116 } 2117 2118 /* Adjust ring index */ 2119 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); 2120 } 2121 2122 static inline void 2123 qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, 2124 uint32_t sense_len, struct rsp_que *rsp, int res) 2125 { 2126 struct scsi_qla_host *vha = sp->vha; 2127 struct scsi_cmnd *cp = GET_CMD_SP(sp); 2128 uint32_t track_sense_len; 2129 2130 if (sense_len >= SCSI_SENSE_BUFFERSIZE) 2131 sense_len = SCSI_SENSE_BUFFERSIZE; 2132 2133 SET_CMD_SENSE_LEN(sp, sense_len); 2134 SET_CMD_SENSE_PTR(sp, cp->sense_buffer); 2135 track_sense_len = sense_len; 2136 2137 if (sense_len > par_sense_len) 2138 sense_len = par_sense_len; 2139 2140 memcpy(cp->sense_buffer, sense_data, sense_len); 2141 2142 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); 2143 track_sense_len -= sense_len; 2144 SET_CMD_SENSE_LEN(sp, track_sense_len); 2145 2146 if (track_sense_len != 0) { 2147 rsp->status_srb = sp; 2148 cp->result = res; 2149 } 2150 2151 if (sense_len) { 2152 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c, 2153 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n", 2154 sp->vha->host_no, cp->device->id, cp->device->lun, 2155 cp); 2156 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b, 2157 cp->sense_buffer, sense_len); 2158 } 2159 } 2160 2161 struct scsi_dif_tuple { 2162 __be16 guard; /* Checksum */ 2163 __be16 app_tag; /* APPL identifier */ 2164 __be32 ref_tag; /* Target LBA or indirect LBA */ 2165 }; 2166 2167 /* 2168 * Checks the guard or meta-data for the type of error 2169 * detected by the HBA. In case of errors, we set the 2170 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST 2171 * to indicate to the kernel that the HBA detected error. 2172 */ 2173 static inline int 2174 qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) 2175 { 2176 struct scsi_qla_host *vha = sp->vha; 2177 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 2178 uint8_t *ap = &sts24->data[12]; 2179 uint8_t *ep = &sts24->data[20]; 2180 uint32_t e_ref_tag, a_ref_tag; 2181 uint16_t e_app_tag, a_app_tag; 2182 uint16_t e_guard, a_guard; 2183 2184 /* 2185 * swab32 of the "data" field in the beginning of qla2x00_status_entry() 2186 * would make guard field appear at offset 2 2187 */ 2188 a_guard = get_unaligned_le16(ap + 2); 2189 a_app_tag = get_unaligned_le16(ap + 0); 2190 a_ref_tag = get_unaligned_le32(ap + 4); 2191 e_guard = get_unaligned_le16(ep + 2); 2192 e_app_tag = get_unaligned_le16(ep + 0); 2193 e_ref_tag = get_unaligned_le32(ep + 4); 2194 2195 ql_dbg(ql_dbg_io, vha, 0x3023, 2196 "iocb(s) %p Returned STATUS.\n", sts24); 2197 2198 ql_dbg(ql_dbg_io, vha, 0x3024, 2199 "DIF ERROR in cmd 0x%x lba 0x%llx act ref" 2200 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app" 2201 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n", 2202 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, 2203 a_app_tag, e_app_tag, a_guard, e_guard); 2204 2205 /* 2206 * Ignore sector if: 2207 * For type 3: ref & app tag is all 'f's 2208 * For type 0,1,2: app tag is all 'f's 2209 */ 2210 if ((a_app_tag == T10_PI_APP_ESCAPE) && 2211 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) || 2212 (a_ref_tag == T10_PI_REF_ESCAPE))) { 2213 uint32_t blocks_done, resid; 2214 sector_t lba_s = scsi_get_lba(cmd); 2215 2216 /* 2TB boundary case covered automatically with this */ 2217 blocks_done = e_ref_tag - (uint32_t)lba_s + 1; 2218 2219 resid = scsi_bufflen(cmd) - (blocks_done * 2220 cmd->device->sector_size); 2221 2222 scsi_set_resid(cmd, resid); 2223 cmd->result = DID_OK << 16; 2224 2225 /* Update protection tag */ 2226 if (scsi_prot_sg_count(cmd)) { 2227 uint32_t i, j = 0, k = 0, num_ent; 2228 struct scatterlist *sg; 2229 struct t10_pi_tuple *spt; 2230 2231 /* Patch the corresponding protection tags */ 2232 scsi_for_each_prot_sg(cmd, sg, 2233 scsi_prot_sg_count(cmd), i) { 2234 num_ent = sg_dma_len(sg) / 8; 2235 if (k + num_ent < blocks_done) { 2236 k += num_ent; 2237 continue; 2238 } 2239 j = blocks_done - k - 1; 2240 k = blocks_done; 2241 break; 2242 } 2243 2244 if (k != blocks_done) { 2245 ql_log(ql_log_warn, vha, 0x302f, 2246 "unexpected tag values tag:lba=%x:%llx)\n", 2247 e_ref_tag, (unsigned long long)lba_s); 2248 return 1; 2249 } 2250 2251 spt = page_address(sg_page(sg)) + sg->offset; 2252 spt += j; 2253 2254 spt->app_tag = T10_PI_APP_ESCAPE; 2255 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3) 2256 spt->ref_tag = T10_PI_REF_ESCAPE; 2257 } 2258 2259 return 0; 2260 } 2261 2262 /* check guard */ 2263 if (e_guard != a_guard) { 2264 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, 2265 0x10, 0x1); 2266 set_driver_byte(cmd, DRIVER_SENSE); 2267 set_host_byte(cmd, DID_ABORT); 2268 cmd->result |= SAM_STAT_CHECK_CONDITION; 2269 return 1; 2270 } 2271 2272 /* check ref tag */ 2273 if (e_ref_tag != a_ref_tag) { 2274 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, 2275 0x10, 0x3); 2276 set_driver_byte(cmd, DRIVER_SENSE); 2277 set_host_byte(cmd, DID_ABORT); 2278 cmd->result |= SAM_STAT_CHECK_CONDITION; 2279 return 1; 2280 } 2281 2282 /* check appl tag */ 2283 if (e_app_tag != a_app_tag) { 2284 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, 2285 0x10, 0x2); 2286 set_driver_byte(cmd, DRIVER_SENSE); 2287 set_host_byte(cmd, DID_ABORT); 2288 cmd->result |= SAM_STAT_CHECK_CONDITION; 2289 return 1; 2290 } 2291 2292 return 1; 2293 } 2294 2295 static void 2296 qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt, 2297 struct req_que *req, uint32_t index) 2298 { 2299 struct qla_hw_data *ha = vha->hw; 2300 srb_t *sp; 2301 uint16_t comp_status; 2302 uint16_t scsi_status; 2303 uint16_t thread_id; 2304 uint32_t rval = EXT_STATUS_OK; 2305 struct bsg_job *bsg_job = NULL; 2306 struct fc_bsg_request *bsg_request; 2307 struct fc_bsg_reply *bsg_reply; 2308 sts_entry_t *sts = pkt; 2309 struct sts_entry_24xx *sts24 = pkt; 2310 2311 /* Validate handle. */ 2312 if (index >= req->num_outstanding_cmds) { 2313 ql_log(ql_log_warn, vha, 0x70af, 2314 "Invalid SCSI completion handle 0x%x.\n", index); 2315 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2316 return; 2317 } 2318 2319 sp = req->outstanding_cmds[index]; 2320 if (!sp) { 2321 ql_log(ql_log_warn, vha, 0x70b0, 2322 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n", 2323 req->id, index); 2324 2325 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2326 return; 2327 } 2328 2329 /* Free outstanding command slot. */ 2330 req->outstanding_cmds[index] = NULL; 2331 bsg_job = sp->u.bsg_job; 2332 bsg_request = bsg_job->request; 2333 bsg_reply = bsg_job->reply; 2334 2335 if (IS_FWI2_CAPABLE(ha)) { 2336 comp_status = le16_to_cpu(sts24->comp_status); 2337 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; 2338 } else { 2339 comp_status = le16_to_cpu(sts->comp_status); 2340 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; 2341 } 2342 2343 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1]; 2344 switch (comp_status) { 2345 case CS_COMPLETE: 2346 if (scsi_status == 0) { 2347 bsg_reply->reply_payload_rcv_len = 2348 bsg_job->reply_payload.payload_len; 2349 vha->qla_stats.input_bytes += 2350 bsg_reply->reply_payload_rcv_len; 2351 vha->qla_stats.input_requests++; 2352 rval = EXT_STATUS_OK; 2353 } 2354 goto done; 2355 2356 case CS_DATA_OVERRUN: 2357 ql_dbg(ql_dbg_user, vha, 0x70b1, 2358 "Command completed with data overrun thread_id=%d\n", 2359 thread_id); 2360 rval = EXT_STATUS_DATA_OVERRUN; 2361 break; 2362 2363 case CS_DATA_UNDERRUN: 2364 ql_dbg(ql_dbg_user, vha, 0x70b2, 2365 "Command completed with data underrun thread_id=%d\n", 2366 thread_id); 2367 rval = EXT_STATUS_DATA_UNDERRUN; 2368 break; 2369 case CS_BIDIR_RD_OVERRUN: 2370 ql_dbg(ql_dbg_user, vha, 0x70b3, 2371 "Command completed with read data overrun thread_id=%d\n", 2372 thread_id); 2373 rval = EXT_STATUS_DATA_OVERRUN; 2374 break; 2375 2376 case CS_BIDIR_RD_WR_OVERRUN: 2377 ql_dbg(ql_dbg_user, vha, 0x70b4, 2378 "Command completed with read and write data overrun " 2379 "thread_id=%d\n", thread_id); 2380 rval = EXT_STATUS_DATA_OVERRUN; 2381 break; 2382 2383 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN: 2384 ql_dbg(ql_dbg_user, vha, 0x70b5, 2385 "Command completed with read data over and write data " 2386 "underrun thread_id=%d\n", thread_id); 2387 rval = EXT_STATUS_DATA_OVERRUN; 2388 break; 2389 2390 case CS_BIDIR_RD_UNDERRUN: 2391 ql_dbg(ql_dbg_user, vha, 0x70b6, 2392 "Command completed with read data underrun " 2393 "thread_id=%d\n", thread_id); 2394 rval = EXT_STATUS_DATA_UNDERRUN; 2395 break; 2396 2397 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN: 2398 ql_dbg(ql_dbg_user, vha, 0x70b7, 2399 "Command completed with read data under and write data " 2400 "overrun thread_id=%d\n", thread_id); 2401 rval = EXT_STATUS_DATA_UNDERRUN; 2402 break; 2403 2404 case CS_BIDIR_RD_WR_UNDERRUN: 2405 ql_dbg(ql_dbg_user, vha, 0x70b8, 2406 "Command completed with read and write data underrun " 2407 "thread_id=%d\n", thread_id); 2408 rval = EXT_STATUS_DATA_UNDERRUN; 2409 break; 2410 2411 case CS_BIDIR_DMA: 2412 ql_dbg(ql_dbg_user, vha, 0x70b9, 2413 "Command completed with data DMA error thread_id=%d\n", 2414 thread_id); 2415 rval = EXT_STATUS_DMA_ERR; 2416 break; 2417 2418 case CS_TIMEOUT: 2419 ql_dbg(ql_dbg_user, vha, 0x70ba, 2420 "Command completed with timeout thread_id=%d\n", 2421 thread_id); 2422 rval = EXT_STATUS_TIMEOUT; 2423 break; 2424 default: 2425 ql_dbg(ql_dbg_user, vha, 0x70bb, 2426 "Command completed with completion status=0x%x " 2427 "thread_id=%d\n", comp_status, thread_id); 2428 rval = EXT_STATUS_ERR; 2429 break; 2430 } 2431 bsg_reply->reply_payload_rcv_len = 0; 2432 2433 done: 2434 /* Return the vendor specific reply to API */ 2435 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval; 2436 bsg_job->reply_len = sizeof(struct fc_bsg_reply); 2437 /* Always return DID_OK, bsg will send the vendor specific response 2438 * in this case only */ 2439 sp->done(sp, DID_OK << 16); 2440 2441 } 2442 2443 /** 2444 * qla2x00_status_entry() - Process a Status IOCB entry. 2445 * @vha: SCSI driver HA context 2446 * @rsp: response queue 2447 * @pkt: Entry pointer 2448 */ 2449 static void 2450 qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) 2451 { 2452 srb_t *sp; 2453 fc_port_t *fcport; 2454 struct scsi_cmnd *cp; 2455 sts_entry_t *sts = pkt; 2456 struct sts_entry_24xx *sts24 = pkt; 2457 uint16_t comp_status; 2458 uint16_t scsi_status; 2459 uint16_t ox_id; 2460 uint8_t lscsi_status; 2461 int32_t resid; 2462 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, 2463 fw_resid_len; 2464 uint8_t *rsp_info, *sense_data; 2465 struct qla_hw_data *ha = vha->hw; 2466 uint32_t handle; 2467 uint16_t que; 2468 struct req_que *req; 2469 int logit = 1; 2470 int res = 0; 2471 uint16_t state_flags = 0; 2472 uint16_t retry_delay = 0; 2473 2474 if (IS_FWI2_CAPABLE(ha)) { 2475 comp_status = le16_to_cpu(sts24->comp_status); 2476 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; 2477 state_flags = le16_to_cpu(sts24->state_flags); 2478 } else { 2479 comp_status = le16_to_cpu(sts->comp_status); 2480 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; 2481 } 2482 handle = (uint32_t) LSW(sts->handle); 2483 que = MSW(sts->handle); 2484 req = ha->req_q_map[que]; 2485 2486 /* Check for invalid queue pointer */ 2487 if (req == NULL || 2488 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) { 2489 ql_dbg(ql_dbg_io, vha, 0x3059, 2490 "Invalid status handle (0x%x): Bad req pointer. req=%p, " 2491 "que=%u.\n", sts->handle, req, que); 2492 return; 2493 } 2494 2495 /* Validate handle. */ 2496 if (handle < req->num_outstanding_cmds) { 2497 sp = req->outstanding_cmds[handle]; 2498 if (!sp) { 2499 ql_dbg(ql_dbg_io, vha, 0x3075, 2500 "%s(%ld): Already returned command for status handle (0x%x).\n", 2501 __func__, vha->host_no, sts->handle); 2502 return; 2503 } 2504 } else { 2505 ql_dbg(ql_dbg_io, vha, 0x3017, 2506 "Invalid status handle, out of range (0x%x).\n", 2507 sts->handle); 2508 2509 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { 2510 if (IS_P3P_TYPE(ha)) 2511 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 2512 else 2513 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2514 qla2xxx_wake_dpc(vha); 2515 } 2516 return; 2517 } 2518 2519 if (sp->abort) 2520 sp->aborted = 1; 2521 else 2522 sp->completed = 1; 2523 2524 if (sp->cmd_type != TYPE_SRB) { 2525 req->outstanding_cmds[handle] = NULL; 2526 ql_dbg(ql_dbg_io, vha, 0x3015, 2527 "Unknown sp->cmd_type %x %p).\n", 2528 sp->cmd_type, sp); 2529 return; 2530 } 2531 2532 /* NVME completion. */ 2533 if (sp->type == SRB_NVME_CMD) { 2534 req->outstanding_cmds[handle] = NULL; 2535 qla24xx_nvme_iocb_entry(vha, req, pkt, sp); 2536 return; 2537 } 2538 2539 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) { 2540 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle); 2541 return; 2542 } 2543 2544 /* Task Management completion. */ 2545 if (sp->type == SRB_TM_CMD) { 2546 qla24xx_tm_iocb_entry(vha, req, pkt); 2547 return; 2548 } 2549 2550 /* Fast path completion. */ 2551 if (comp_status == CS_COMPLETE && scsi_status == 0) { 2552 qla2x00_process_completed_request(vha, req, handle); 2553 2554 return; 2555 } 2556 2557 req->outstanding_cmds[handle] = NULL; 2558 cp = GET_CMD_SP(sp); 2559 if (cp == NULL) { 2560 ql_dbg(ql_dbg_io, vha, 0x3018, 2561 "Command already returned (0x%x/%p).\n", 2562 sts->handle, sp); 2563 2564 return; 2565 } 2566 2567 lscsi_status = scsi_status & STATUS_MASK; 2568 2569 fcport = sp->fcport; 2570 2571 ox_id = 0; 2572 sense_len = par_sense_len = rsp_info_len = resid_len = 2573 fw_resid_len = 0; 2574 if (IS_FWI2_CAPABLE(ha)) { 2575 if (scsi_status & SS_SENSE_LEN_VALID) 2576 sense_len = le32_to_cpu(sts24->sense_len); 2577 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) 2578 rsp_info_len = le32_to_cpu(sts24->rsp_data_len); 2579 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) 2580 resid_len = le32_to_cpu(sts24->rsp_residual_count); 2581 if (comp_status == CS_DATA_UNDERRUN) 2582 fw_resid_len = le32_to_cpu(sts24->residual_len); 2583 rsp_info = sts24->data; 2584 sense_data = sts24->data; 2585 host_to_fcp_swap(sts24->data, sizeof(sts24->data)); 2586 ox_id = le16_to_cpu(sts24->ox_id); 2587 par_sense_len = sizeof(sts24->data); 2588 /* Valid values of the retry delay timer are 0x1-0xffef */ 2589 if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) { 2590 retry_delay = sts24->retry_delay & 0x3fff; 2591 ql_dbg(ql_dbg_io, sp->vha, 0x3033, 2592 "%s: scope=%#x retry_delay=%#x\n", __func__, 2593 sts24->retry_delay >> 14, retry_delay); 2594 } 2595 } else { 2596 if (scsi_status & SS_SENSE_LEN_VALID) 2597 sense_len = le16_to_cpu(sts->req_sense_length); 2598 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) 2599 rsp_info_len = le16_to_cpu(sts->rsp_info_len); 2600 resid_len = le32_to_cpu(sts->residual_length); 2601 rsp_info = sts->rsp_info; 2602 sense_data = sts->req_sense_data; 2603 par_sense_len = sizeof(sts->req_sense_data); 2604 } 2605 2606 /* Check for any FCP transport errors. */ 2607 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) { 2608 /* Sense data lies beyond any FCP RESPONSE data. */ 2609 if (IS_FWI2_CAPABLE(ha)) { 2610 sense_data += rsp_info_len; 2611 par_sense_len -= rsp_info_len; 2612 } 2613 if (rsp_info_len > 3 && rsp_info[3]) { 2614 ql_dbg(ql_dbg_io, fcport->vha, 0x3019, 2615 "FCP I/O protocol failure (0x%x/0x%x).\n", 2616 rsp_info_len, rsp_info[3]); 2617 2618 res = DID_BUS_BUSY << 16; 2619 goto out; 2620 } 2621 } 2622 2623 /* Check for overrun. */ 2624 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && 2625 scsi_status & SS_RESIDUAL_OVER) 2626 comp_status = CS_DATA_OVERRUN; 2627 2628 /* 2629 * Check retry_delay_timer value if we receive a busy or 2630 * queue full. 2631 */ 2632 if (lscsi_status == SAM_STAT_TASK_SET_FULL || 2633 lscsi_status == SAM_STAT_BUSY) 2634 qla2x00_set_retry_delay_timestamp(fcport, retry_delay); 2635 2636 /* 2637 * Based on Host and scsi status generate status code for Linux 2638 */ 2639 switch (comp_status) { 2640 case CS_COMPLETE: 2641 case CS_QUEUE_FULL: 2642 if (scsi_status == 0) { 2643 res = DID_OK << 16; 2644 break; 2645 } 2646 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) { 2647 resid = resid_len; 2648 scsi_set_resid(cp, resid); 2649 2650 if (!lscsi_status && 2651 ((unsigned)(scsi_bufflen(cp) - resid) < 2652 cp->underflow)) { 2653 ql_dbg(ql_dbg_io, fcport->vha, 0x301a, 2654 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", 2655 resid, scsi_bufflen(cp)); 2656 2657 res = DID_ERROR << 16; 2658 break; 2659 } 2660 } 2661 res = DID_OK << 16 | lscsi_status; 2662 2663 if (lscsi_status == SAM_STAT_TASK_SET_FULL) { 2664 ql_dbg(ql_dbg_io, fcport->vha, 0x301b, 2665 "QUEUE FULL detected.\n"); 2666 break; 2667 } 2668 logit = 0; 2669 if (lscsi_status != SS_CHECK_CONDITION) 2670 break; 2671 2672 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 2673 if (!(scsi_status & SS_SENSE_LEN_VALID)) 2674 break; 2675 2676 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len, 2677 rsp, res); 2678 break; 2679 2680 case CS_DATA_UNDERRUN: 2681 /* Use F/W calculated residual length. */ 2682 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len; 2683 scsi_set_resid(cp, resid); 2684 if (scsi_status & SS_RESIDUAL_UNDER) { 2685 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) { 2686 ql_dbg(ql_dbg_io, fcport->vha, 0x301d, 2687 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", 2688 resid, scsi_bufflen(cp)); 2689 2690 res = DID_ERROR << 16 | lscsi_status; 2691 goto check_scsi_status; 2692 } 2693 2694 if (!lscsi_status && 2695 ((unsigned)(scsi_bufflen(cp) - resid) < 2696 cp->underflow)) { 2697 ql_dbg(ql_dbg_io, fcport->vha, 0x301e, 2698 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", 2699 resid, scsi_bufflen(cp)); 2700 2701 res = DID_ERROR << 16; 2702 break; 2703 } 2704 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && 2705 lscsi_status != SAM_STAT_BUSY) { 2706 /* 2707 * scsi status of task set and busy are considered to be 2708 * task not completed. 2709 */ 2710 2711 ql_dbg(ql_dbg_io, fcport->vha, 0x301f, 2712 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", 2713 resid, scsi_bufflen(cp)); 2714 2715 res = DID_ERROR << 16 | lscsi_status; 2716 goto check_scsi_status; 2717 } else { 2718 ql_dbg(ql_dbg_io, fcport->vha, 0x3030, 2719 "scsi_status: 0x%x, lscsi_status: 0x%x\n", 2720 scsi_status, lscsi_status); 2721 } 2722 2723 res = DID_OK << 16 | lscsi_status; 2724 logit = 0; 2725 2726 check_scsi_status: 2727 /* 2728 * Check to see if SCSI Status is non zero. If so report SCSI 2729 * Status. 2730 */ 2731 if (lscsi_status != 0) { 2732 if (lscsi_status == SAM_STAT_TASK_SET_FULL) { 2733 ql_dbg(ql_dbg_io, fcport->vha, 0x3020, 2734 "QUEUE FULL detected.\n"); 2735 logit = 1; 2736 break; 2737 } 2738 if (lscsi_status != SS_CHECK_CONDITION) 2739 break; 2740 2741 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 2742 if (!(scsi_status & SS_SENSE_LEN_VALID)) 2743 break; 2744 2745 qla2x00_handle_sense(sp, sense_data, par_sense_len, 2746 sense_len, rsp, res); 2747 } 2748 break; 2749 2750 case CS_PORT_LOGGED_OUT: 2751 case CS_PORT_CONFIG_CHG: 2752 case CS_PORT_BUSY: 2753 case CS_INCOMPLETE: 2754 case CS_PORT_UNAVAILABLE: 2755 case CS_TIMEOUT: 2756 case CS_RESET: 2757 2758 /* 2759 * We are going to have the fc class block the rport 2760 * while we try to recover so instruct the mid layer 2761 * to requeue until the class decides how to handle this. 2762 */ 2763 res = DID_TRANSPORT_DISRUPTED << 16; 2764 2765 if (comp_status == CS_TIMEOUT) { 2766 if (IS_FWI2_CAPABLE(ha)) 2767 break; 2768 else if ((le16_to_cpu(sts->status_flags) & 2769 SF_LOGOUT_SENT) == 0) 2770 break; 2771 } 2772 2773 if (atomic_read(&fcport->state) == FCS_ONLINE) { 2774 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021, 2775 "Port to be marked lost on fcport=%02x%02x%02x, current " 2776 "port state= %s comp_status %x.\n", fcport->d_id.b.domain, 2777 fcport->d_id.b.area, fcport->d_id.b.al_pa, 2778 port_state_str[FCS_ONLINE], 2779 comp_status); 2780 2781 qlt_schedule_sess_for_deletion(fcport); 2782 } 2783 2784 break; 2785 2786 case CS_ABORTED: 2787 res = DID_RESET << 16; 2788 break; 2789 2790 case CS_DIF_ERROR: 2791 logit = qla2x00_handle_dif_error(sp, sts24); 2792 res = cp->result; 2793 break; 2794 2795 case CS_TRANSPORT: 2796 res = DID_ERROR << 16; 2797 2798 if (!IS_PI_SPLIT_DET_CAPABLE(ha)) 2799 break; 2800 2801 if (state_flags & BIT_4) 2802 scmd_printk(KERN_WARNING, cp, 2803 "Unsupported device '%s' found.\n", 2804 cp->device->vendor); 2805 break; 2806 2807 case CS_DMA: 2808 ql_log(ql_log_info, fcport->vha, 0x3022, 2809 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", 2810 comp_status, scsi_status, res, vha->host_no, 2811 cp->device->id, cp->device->lun, fcport->d_id.b24, 2812 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len, 2813 resid_len, fw_resid_len, sp, cp); 2814 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee, 2815 pkt, sizeof(*sts24)); 2816 res = DID_ERROR << 16; 2817 break; 2818 default: 2819 res = DID_ERROR << 16; 2820 break; 2821 } 2822 2823 out: 2824 if (logit) 2825 ql_dbg(ql_dbg_io, fcport->vha, 0x3022, 2826 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu " 2827 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x " 2828 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", 2829 comp_status, scsi_status, res, vha->host_no, 2830 cp->device->id, cp->device->lun, fcport->d_id.b.domain, 2831 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id, 2832 cp->cmnd, scsi_bufflen(cp), rsp_info_len, 2833 resid_len, fw_resid_len, sp, cp); 2834 2835 if (rsp->status_srb == NULL) 2836 sp->done(sp, res); 2837 } 2838 2839 /** 2840 * qla2x00_status_cont_entry() - Process a Status Continuations entry. 2841 * @rsp: response queue 2842 * @pkt: Entry pointer 2843 * 2844 * Extended sense data. 2845 */ 2846 static void 2847 qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) 2848 { 2849 uint8_t sense_sz = 0; 2850 struct qla_hw_data *ha = rsp->hw; 2851 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); 2852 srb_t *sp = rsp->status_srb; 2853 struct scsi_cmnd *cp; 2854 uint32_t sense_len; 2855 uint8_t *sense_ptr; 2856 2857 if (!sp || !GET_CMD_SENSE_LEN(sp)) 2858 return; 2859 2860 sense_len = GET_CMD_SENSE_LEN(sp); 2861 sense_ptr = GET_CMD_SENSE_PTR(sp); 2862 2863 cp = GET_CMD_SP(sp); 2864 if (cp == NULL) { 2865 ql_log(ql_log_warn, vha, 0x3025, 2866 "cmd is NULL: already returned to OS (sp=%p).\n", sp); 2867 2868 rsp->status_srb = NULL; 2869 return; 2870 } 2871 2872 if (sense_len > sizeof(pkt->data)) 2873 sense_sz = sizeof(pkt->data); 2874 else 2875 sense_sz = sense_len; 2876 2877 /* Move sense data. */ 2878 if (IS_FWI2_CAPABLE(ha)) 2879 host_to_fcp_swap(pkt->data, sizeof(pkt->data)); 2880 memcpy(sense_ptr, pkt->data, sense_sz); 2881 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c, 2882 sense_ptr, sense_sz); 2883 2884 sense_len -= sense_sz; 2885 sense_ptr += sense_sz; 2886 2887 SET_CMD_SENSE_PTR(sp, sense_ptr); 2888 SET_CMD_SENSE_LEN(sp, sense_len); 2889 2890 /* Place command on done queue. */ 2891 if (sense_len == 0) { 2892 rsp->status_srb = NULL; 2893 sp->done(sp, cp->result); 2894 } 2895 } 2896 2897 /** 2898 * qla2x00_error_entry() - Process an error entry. 2899 * @vha: SCSI driver HA context 2900 * @rsp: response queue 2901 * @pkt: Entry pointer 2902 * return : 1=allow further error analysis. 0=no additional error analysis. 2903 */ 2904 static int 2905 qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt) 2906 { 2907 srb_t *sp; 2908 struct qla_hw_data *ha = vha->hw; 2909 const char func[] = "ERROR-IOCB"; 2910 uint16_t que = MSW(pkt->handle); 2911 struct req_que *req = NULL; 2912 int res = DID_ERROR << 16; 2913 2914 ql_dbg(ql_dbg_async, vha, 0x502a, 2915 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n", 2916 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id); 2917 2918 if (que >= ha->max_req_queues || !ha->req_q_map[que]) 2919 goto fatal; 2920 2921 req = ha->req_q_map[que]; 2922 2923 if (pkt->entry_status & RF_BUSY) 2924 res = DID_BUS_BUSY << 16; 2925 2926 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE) 2927 return 0; 2928 2929 switch (pkt->entry_type) { 2930 case NOTIFY_ACK_TYPE: 2931 case STATUS_TYPE: 2932 case STATUS_CONT_TYPE: 2933 case LOGINOUT_PORT_IOCB_TYPE: 2934 case CT_IOCB_TYPE: 2935 case ELS_IOCB_TYPE: 2936 case ABORT_IOCB_TYPE: 2937 case MBX_IOCB_TYPE: 2938 default: 2939 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2940 if (sp) { 2941 sp->done(sp, res); 2942 return 0; 2943 } 2944 break; 2945 2946 case ABTS_RESP_24XX: 2947 case CTIO_TYPE7: 2948 case CTIO_CRC2: 2949 return 1; 2950 } 2951 fatal: 2952 ql_log(ql_log_warn, vha, 0x5030, 2953 "Error entry - invalid handle/queue (%04x).\n", que); 2954 return 0; 2955 } 2956 2957 /** 2958 * qla24xx_mbx_completion() - Process mailbox command completions. 2959 * @vha: SCSI driver HA context 2960 * @mb0: Mailbox0 register 2961 */ 2962 static void 2963 qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) 2964 { 2965 uint16_t cnt; 2966 uint32_t mboxes; 2967 uint16_t __iomem *wptr; 2968 struct qla_hw_data *ha = vha->hw; 2969 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2970 2971 /* Read all mbox registers? */ 2972 WARN_ON_ONCE(ha->mbx_count > 32); 2973 mboxes = (1ULL << ha->mbx_count) - 1; 2974 if (!ha->mcp) 2975 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n"); 2976 else 2977 mboxes = ha->mcp->in_mb; 2978 2979 /* Load return mailbox registers. */ 2980 ha->flags.mbox_int = 1; 2981 ha->mailbox_out[0] = mb0; 2982 mboxes >>= 1; 2983 wptr = (uint16_t __iomem *)®->mailbox1; 2984 2985 for (cnt = 1; cnt < ha->mbx_count; cnt++) { 2986 if (mboxes & BIT_0) 2987 ha->mailbox_out[cnt] = RD_REG_WORD(wptr); 2988 2989 mboxes >>= 1; 2990 wptr++; 2991 } 2992 } 2993 2994 static void 2995 qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2996 struct abort_entry_24xx *pkt) 2997 { 2998 const char func[] = "ABT_IOCB"; 2999 srb_t *sp; 3000 struct srb_iocb *abt; 3001 3002 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3003 if (!sp) 3004 return; 3005 3006 abt = &sp->u.iocb_cmd; 3007 abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle); 3008 sp->done(sp, 0); 3009 } 3010 3011 void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha, 3012 struct pt_ls4_request *pkt, struct req_que *req) 3013 { 3014 srb_t *sp; 3015 const char func[] = "LS4_IOCB"; 3016 uint16_t comp_status; 3017 3018 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3019 if (!sp) 3020 return; 3021 3022 comp_status = le16_to_cpu(pkt->status); 3023 sp->done(sp, comp_status); 3024 } 3025 3026 /** 3027 * qla24xx_process_response_queue() - Process response queue entries. 3028 * @vha: SCSI driver HA context 3029 * @rsp: response queue 3030 */ 3031 void qla24xx_process_response_queue(struct scsi_qla_host *vha, 3032 struct rsp_que *rsp) 3033 { 3034 struct sts_entry_24xx *pkt; 3035 struct qla_hw_data *ha = vha->hw; 3036 3037 if (!ha->flags.fw_started) 3038 return; 3039 3040 if (rsp->qpair->cpuid != smp_processor_id()) 3041 qla_cpu_update(rsp->qpair, smp_processor_id()); 3042 3043 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { 3044 pkt = (struct sts_entry_24xx *)rsp->ring_ptr; 3045 3046 rsp->ring_index++; 3047 if (rsp->ring_index == rsp->length) { 3048 rsp->ring_index = 0; 3049 rsp->ring_ptr = rsp->ring; 3050 } else { 3051 rsp->ring_ptr++; 3052 } 3053 3054 if (pkt->entry_status != 0) { 3055 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt)) 3056 goto process_err; 3057 3058 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 3059 wmb(); 3060 continue; 3061 } 3062 process_err: 3063 3064 switch (pkt->entry_type) { 3065 case STATUS_TYPE: 3066 qla2x00_status_entry(vha, rsp, pkt); 3067 break; 3068 case STATUS_CONT_TYPE: 3069 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); 3070 break; 3071 case VP_RPT_ID_IOCB_TYPE: 3072 qla24xx_report_id_acquisition(vha, 3073 (struct vp_rpt_id_entry_24xx *)pkt); 3074 break; 3075 case LOGINOUT_PORT_IOCB_TYPE: 3076 qla24xx_logio_entry(vha, rsp->req, 3077 (struct logio_entry_24xx *)pkt); 3078 break; 3079 case CT_IOCB_TYPE: 3080 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); 3081 break; 3082 case ELS_IOCB_TYPE: 3083 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE); 3084 break; 3085 case ABTS_RECV_24XX: 3086 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3087 IS_QLA28XX(ha)) { 3088 /* ensure that the ATIO queue is empty */ 3089 qlt_handle_abts_recv(vha, rsp, 3090 (response_t *)pkt); 3091 break; 3092 } else { 3093 qlt_24xx_process_atio_queue(vha, 1); 3094 } 3095 /* fall through */ 3096 case ABTS_RESP_24XX: 3097 case CTIO_TYPE7: 3098 case CTIO_CRC2: 3099 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt); 3100 break; 3101 case PT_LS4_REQUEST: 3102 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt, 3103 rsp->req); 3104 break; 3105 case NOTIFY_ACK_TYPE: 3106 if (pkt->handle == QLA_TGT_SKIP_HANDLE) 3107 qlt_response_pkt_all_vps(vha, rsp, 3108 (response_t *)pkt); 3109 else 3110 qla24xxx_nack_iocb_entry(vha, rsp->req, 3111 (struct nack_to_isp *)pkt); 3112 break; 3113 case MARKER_TYPE: 3114 /* Do nothing in this case, this check is to prevent it 3115 * from falling into default case 3116 */ 3117 break; 3118 case ABORT_IOCB_TYPE: 3119 qla24xx_abort_iocb_entry(vha, rsp->req, 3120 (struct abort_entry_24xx *)pkt); 3121 break; 3122 case MBX_IOCB_TYPE: 3123 qla24xx_mbx_iocb_entry(vha, rsp->req, 3124 (struct mbx_24xx_entry *)pkt); 3125 break; 3126 case VP_CTRL_IOCB_TYPE: 3127 qla_ctrlvp_completed(vha, rsp->req, 3128 (struct vp_ctrl_entry_24xx *)pkt); 3129 break; 3130 default: 3131 /* Type Not Supported. */ 3132 ql_dbg(ql_dbg_async, vha, 0x5042, 3133 "Received unknown response pkt type %x " 3134 "entry status=%x.\n", 3135 pkt->entry_type, pkt->entry_status); 3136 break; 3137 } 3138 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 3139 wmb(); 3140 } 3141 3142 /* Adjust ring index */ 3143 if (IS_P3P_TYPE(ha)) { 3144 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; 3145 3146 WRT_REG_DWORD(®->rsp_q_out[0], rsp->ring_index); 3147 } else { 3148 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); 3149 } 3150 } 3151 3152 static void 3153 qla2xxx_check_risc_status(scsi_qla_host_t *vha) 3154 { 3155 int rval; 3156 uint32_t cnt; 3157 struct qla_hw_data *ha = vha->hw; 3158 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3159 3160 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3161 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3162 return; 3163 3164 rval = QLA_SUCCESS; 3165 WRT_REG_DWORD(®->iobase_addr, 0x7C00); 3166 RD_REG_DWORD(®->iobase_addr); 3167 WRT_REG_DWORD(®->iobase_window, 0x0001); 3168 for (cnt = 10000; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && 3169 rval == QLA_SUCCESS; cnt--) { 3170 if (cnt) { 3171 WRT_REG_DWORD(®->iobase_window, 0x0001); 3172 udelay(10); 3173 } else 3174 rval = QLA_FUNCTION_TIMEOUT; 3175 } 3176 if (rval == QLA_SUCCESS) 3177 goto next_test; 3178 3179 rval = QLA_SUCCESS; 3180 WRT_REG_DWORD(®->iobase_window, 0x0003); 3181 for (cnt = 100; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && 3182 rval == QLA_SUCCESS; cnt--) { 3183 if (cnt) { 3184 WRT_REG_DWORD(®->iobase_window, 0x0003); 3185 udelay(10); 3186 } else 3187 rval = QLA_FUNCTION_TIMEOUT; 3188 } 3189 if (rval != QLA_SUCCESS) 3190 goto done; 3191 3192 next_test: 3193 if (RD_REG_DWORD(®->iobase_c8) & BIT_3) 3194 ql_log(ql_log_info, vha, 0x504c, 3195 "Additional code -- 0x55AA.\n"); 3196 3197 done: 3198 WRT_REG_DWORD(®->iobase_window, 0x0000); 3199 RD_REG_DWORD(®->iobase_window); 3200 } 3201 3202 /** 3203 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx. 3204 * @irq: interrupt number 3205 * @dev_id: SCSI driver HA context 3206 * 3207 * Called by system whenever the host adapter generates an interrupt. 3208 * 3209 * Returns handled flag. 3210 */ 3211 irqreturn_t 3212 qla24xx_intr_handler(int irq, void *dev_id) 3213 { 3214 scsi_qla_host_t *vha; 3215 struct qla_hw_data *ha; 3216 struct device_reg_24xx __iomem *reg; 3217 int status; 3218 unsigned long iter; 3219 uint32_t stat; 3220 uint32_t hccr; 3221 uint16_t mb[8]; 3222 struct rsp_que *rsp; 3223 unsigned long flags; 3224 bool process_atio = false; 3225 3226 rsp = (struct rsp_que *) dev_id; 3227 if (!rsp) { 3228 ql_log(ql_log_info, NULL, 0x5059, 3229 "%s: NULL response queue pointer.\n", __func__); 3230 return IRQ_NONE; 3231 } 3232 3233 ha = rsp->hw; 3234 reg = &ha->iobase->isp24; 3235 status = 0; 3236 3237 if (unlikely(pci_channel_offline(ha->pdev))) 3238 return IRQ_HANDLED; 3239 3240 spin_lock_irqsave(&ha->hardware_lock, flags); 3241 vha = pci_get_drvdata(ha->pdev); 3242 for (iter = 50; iter--; ) { 3243 stat = RD_REG_DWORD(®->host_status); 3244 if (qla2x00_check_reg32_for_disconnect(vha, stat)) 3245 break; 3246 if (stat & HSRX_RISC_PAUSED) { 3247 if (unlikely(pci_channel_offline(ha->pdev))) 3248 break; 3249 3250 hccr = RD_REG_DWORD(®->hccr); 3251 3252 ql_log(ql_log_warn, vha, 0x504b, 3253 "RISC paused -- HCCR=%x, Dumping firmware.\n", 3254 hccr); 3255 3256 qla2xxx_check_risc_status(vha); 3257 3258 ha->isp_ops->fw_dump(vha, 1); 3259 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3260 break; 3261 } else if ((stat & HSRX_RISC_INT) == 0) 3262 break; 3263 3264 switch (stat & 0xff) { 3265 case INTR_ROM_MB_SUCCESS: 3266 case INTR_ROM_MB_FAILED: 3267 case INTR_MB_SUCCESS: 3268 case INTR_MB_FAILED: 3269 qla24xx_mbx_completion(vha, MSW(stat)); 3270 status |= MBX_INTERRUPT; 3271 3272 break; 3273 case INTR_ASYNC_EVENT: 3274 mb[0] = MSW(stat); 3275 mb[1] = RD_REG_WORD(®->mailbox1); 3276 mb[2] = RD_REG_WORD(®->mailbox2); 3277 mb[3] = RD_REG_WORD(®->mailbox3); 3278 qla2x00_async_event(vha, rsp, mb); 3279 break; 3280 case INTR_RSP_QUE_UPDATE: 3281 case INTR_RSP_QUE_UPDATE_83XX: 3282 qla24xx_process_response_queue(vha, rsp); 3283 break; 3284 case INTR_ATIO_QUE_UPDATE_27XX: 3285 case INTR_ATIO_QUE_UPDATE: 3286 process_atio = true; 3287 break; 3288 case INTR_ATIO_RSP_QUE_UPDATE: 3289 process_atio = true; 3290 qla24xx_process_response_queue(vha, rsp); 3291 break; 3292 default: 3293 ql_dbg(ql_dbg_async, vha, 0x504f, 3294 "Unrecognized interrupt type (%d).\n", stat * 0xff); 3295 break; 3296 } 3297 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); 3298 RD_REG_DWORD_RELAXED(®->hccr); 3299 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1))) 3300 ndelay(3500); 3301 } 3302 qla2x00_handle_mbx_completion(ha, status); 3303 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3304 3305 if (process_atio) { 3306 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 3307 qlt_24xx_process_atio_queue(vha, 0); 3308 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); 3309 } 3310 3311 return IRQ_HANDLED; 3312 } 3313 3314 static irqreturn_t 3315 qla24xx_msix_rsp_q(int irq, void *dev_id) 3316 { 3317 struct qla_hw_data *ha; 3318 struct rsp_que *rsp; 3319 struct device_reg_24xx __iomem *reg; 3320 struct scsi_qla_host *vha; 3321 unsigned long flags; 3322 3323 rsp = (struct rsp_que *) dev_id; 3324 if (!rsp) { 3325 ql_log(ql_log_info, NULL, 0x505a, 3326 "%s: NULL response queue pointer.\n", __func__); 3327 return IRQ_NONE; 3328 } 3329 ha = rsp->hw; 3330 reg = &ha->iobase->isp24; 3331 3332 spin_lock_irqsave(&ha->hardware_lock, flags); 3333 3334 vha = pci_get_drvdata(ha->pdev); 3335 qla24xx_process_response_queue(vha, rsp); 3336 if (!ha->flags.disable_msix_handshake) { 3337 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); 3338 RD_REG_DWORD_RELAXED(®->hccr); 3339 } 3340 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3341 3342 return IRQ_HANDLED; 3343 } 3344 3345 static irqreturn_t 3346 qla24xx_msix_default(int irq, void *dev_id) 3347 { 3348 scsi_qla_host_t *vha; 3349 struct qla_hw_data *ha; 3350 struct rsp_que *rsp; 3351 struct device_reg_24xx __iomem *reg; 3352 int status; 3353 uint32_t stat; 3354 uint32_t hccr; 3355 uint16_t mb[8]; 3356 unsigned long flags; 3357 bool process_atio = false; 3358 3359 rsp = (struct rsp_que *) dev_id; 3360 if (!rsp) { 3361 ql_log(ql_log_info, NULL, 0x505c, 3362 "%s: NULL response queue pointer.\n", __func__); 3363 return IRQ_NONE; 3364 } 3365 ha = rsp->hw; 3366 reg = &ha->iobase->isp24; 3367 status = 0; 3368 3369 spin_lock_irqsave(&ha->hardware_lock, flags); 3370 vha = pci_get_drvdata(ha->pdev); 3371 do { 3372 stat = RD_REG_DWORD(®->host_status); 3373 if (qla2x00_check_reg32_for_disconnect(vha, stat)) 3374 break; 3375 if (stat & HSRX_RISC_PAUSED) { 3376 if (unlikely(pci_channel_offline(ha->pdev))) 3377 break; 3378 3379 hccr = RD_REG_DWORD(®->hccr); 3380 3381 ql_log(ql_log_info, vha, 0x5050, 3382 "RISC paused -- HCCR=%x, Dumping firmware.\n", 3383 hccr); 3384 3385 qla2xxx_check_risc_status(vha); 3386 3387 ha->isp_ops->fw_dump(vha, 1); 3388 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3389 break; 3390 } else if ((stat & HSRX_RISC_INT) == 0) 3391 break; 3392 3393 switch (stat & 0xff) { 3394 case INTR_ROM_MB_SUCCESS: 3395 case INTR_ROM_MB_FAILED: 3396 case INTR_MB_SUCCESS: 3397 case INTR_MB_FAILED: 3398 qla24xx_mbx_completion(vha, MSW(stat)); 3399 status |= MBX_INTERRUPT; 3400 3401 break; 3402 case INTR_ASYNC_EVENT: 3403 mb[0] = MSW(stat); 3404 mb[1] = RD_REG_WORD(®->mailbox1); 3405 mb[2] = RD_REG_WORD(®->mailbox2); 3406 mb[3] = RD_REG_WORD(®->mailbox3); 3407 qla2x00_async_event(vha, rsp, mb); 3408 break; 3409 case INTR_RSP_QUE_UPDATE: 3410 case INTR_RSP_QUE_UPDATE_83XX: 3411 qla24xx_process_response_queue(vha, rsp); 3412 break; 3413 case INTR_ATIO_QUE_UPDATE_27XX: 3414 case INTR_ATIO_QUE_UPDATE: 3415 process_atio = true; 3416 break; 3417 case INTR_ATIO_RSP_QUE_UPDATE: 3418 process_atio = true; 3419 qla24xx_process_response_queue(vha, rsp); 3420 break; 3421 default: 3422 ql_dbg(ql_dbg_async, vha, 0x5051, 3423 "Unrecognized interrupt type (%d).\n", stat & 0xff); 3424 break; 3425 } 3426 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); 3427 } while (0); 3428 qla2x00_handle_mbx_completion(ha, status); 3429 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3430 3431 if (process_atio) { 3432 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 3433 qlt_24xx_process_atio_queue(vha, 0); 3434 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); 3435 } 3436 3437 return IRQ_HANDLED; 3438 } 3439 3440 irqreturn_t 3441 qla2xxx_msix_rsp_q(int irq, void *dev_id) 3442 { 3443 struct qla_hw_data *ha; 3444 struct qla_qpair *qpair; 3445 struct device_reg_24xx __iomem *reg; 3446 unsigned long flags; 3447 3448 qpair = dev_id; 3449 if (!qpair) { 3450 ql_log(ql_log_info, NULL, 0x505b, 3451 "%s: NULL response queue pointer.\n", __func__); 3452 return IRQ_NONE; 3453 } 3454 ha = qpair->hw; 3455 3456 /* Clear the interrupt, if enabled, for this response queue */ 3457 if (unlikely(!ha->flags.disable_msix_handshake)) { 3458 reg = &ha->iobase->isp24; 3459 spin_lock_irqsave(&ha->hardware_lock, flags); 3460 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); 3461 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3462 } 3463 3464 queue_work(ha->wq, &qpair->q_work); 3465 3466 return IRQ_HANDLED; 3467 } 3468 3469 /* Interrupt handling helpers. */ 3470 3471 struct qla_init_msix_entry { 3472 const char *name; 3473 irq_handler_t handler; 3474 }; 3475 3476 static const struct qla_init_msix_entry msix_entries[] = { 3477 { "default", qla24xx_msix_default }, 3478 { "rsp_q", qla24xx_msix_rsp_q }, 3479 { "atio_q", qla83xx_msix_atio_q }, 3480 { "qpair_multiq", qla2xxx_msix_rsp_q }, 3481 }; 3482 3483 static const struct qla_init_msix_entry qla82xx_msix_entries[] = { 3484 { "qla2xxx (default)", qla82xx_msix_default }, 3485 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q }, 3486 }; 3487 3488 static int 3489 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) 3490 { 3491 int i, ret; 3492 struct qla_msix_entry *qentry; 3493 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 3494 int min_vecs = QLA_BASE_VECTORS; 3495 struct irq_affinity desc = { 3496 .pre_vectors = QLA_BASE_VECTORS, 3497 }; 3498 3499 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && 3500 IS_ATIO_MSIX_CAPABLE(ha)) { 3501 desc.pre_vectors++; 3502 min_vecs++; 3503 } 3504 3505 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) { 3506 /* user wants to control IRQ setting for target mode */ 3507 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs, 3508 ha->msix_count, PCI_IRQ_MSIX); 3509 } else 3510 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs, 3511 ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, 3512 &desc); 3513 3514 if (ret < 0) { 3515 ql_log(ql_log_fatal, vha, 0x00c7, 3516 "MSI-X: Failed to enable support, " 3517 "giving up -- %d/%d.\n", 3518 ha->msix_count, ret); 3519 goto msix_out; 3520 } else if (ret < ha->msix_count) { 3521 ql_log(ql_log_info, vha, 0x00c6, 3522 "MSI-X: Using %d vectors\n", ret); 3523 ha->msix_count = ret; 3524 /* Recalculate queue values */ 3525 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) { 3526 ha->max_req_queues = ha->msix_count - 1; 3527 3528 /* ATIOQ needs 1 vector. That's 1 less QPair */ 3529 if (QLA_TGT_MODE_ENABLED()) 3530 ha->max_req_queues--; 3531 3532 ha->max_rsp_queues = ha->max_req_queues; 3533 3534 ha->max_qpairs = ha->max_req_queues - 1; 3535 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190, 3536 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs); 3537 } 3538 } 3539 vha->irq_offset = desc.pre_vectors; 3540 ha->msix_entries = kcalloc(ha->msix_count, 3541 sizeof(struct qla_msix_entry), 3542 GFP_KERNEL); 3543 if (!ha->msix_entries) { 3544 ql_log(ql_log_fatal, vha, 0x00c8, 3545 "Failed to allocate memory for ha->msix_entries.\n"); 3546 ret = -ENOMEM; 3547 goto free_irqs; 3548 } 3549 ha->flags.msix_enabled = 1; 3550 3551 for (i = 0; i < ha->msix_count; i++) { 3552 qentry = &ha->msix_entries[i]; 3553 qentry->vector = pci_irq_vector(ha->pdev, i); 3554 qentry->entry = i; 3555 qentry->have_irq = 0; 3556 qentry->in_use = 0; 3557 qentry->handle = NULL; 3558 } 3559 3560 /* Enable MSI-X vectors for the base queue */ 3561 for (i = 0; i < QLA_BASE_VECTORS; i++) { 3562 qentry = &ha->msix_entries[i]; 3563 qentry->handle = rsp; 3564 rsp->msix = qentry; 3565 scnprintf(qentry->name, sizeof(qentry->name), 3566 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name); 3567 if (IS_P3P_TYPE(ha)) 3568 ret = request_irq(qentry->vector, 3569 qla82xx_msix_entries[i].handler, 3570 0, qla82xx_msix_entries[i].name, rsp); 3571 else 3572 ret = request_irq(qentry->vector, 3573 msix_entries[i].handler, 3574 0, qentry->name, rsp); 3575 if (ret) 3576 goto msix_register_fail; 3577 qentry->have_irq = 1; 3578 qentry->in_use = 1; 3579 } 3580 3581 /* 3582 * If target mode is enable, also request the vector for the ATIO 3583 * queue. 3584 */ 3585 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && 3586 IS_ATIO_MSIX_CAPABLE(ha)) { 3587 qentry = &ha->msix_entries[QLA_ATIO_VECTOR]; 3588 rsp->msix = qentry; 3589 qentry->handle = rsp; 3590 scnprintf(qentry->name, sizeof(qentry->name), 3591 "qla2xxx%lu_%s", vha->host_no, 3592 msix_entries[QLA_ATIO_VECTOR].name); 3593 qentry->in_use = 1; 3594 ret = request_irq(qentry->vector, 3595 msix_entries[QLA_ATIO_VECTOR].handler, 3596 0, qentry->name, rsp); 3597 qentry->have_irq = 1; 3598 } 3599 3600 msix_register_fail: 3601 if (ret) { 3602 ql_log(ql_log_fatal, vha, 0x00cb, 3603 "MSI-X: unable to register handler -- %x/%d.\n", 3604 qentry->vector, ret); 3605 qla2x00_free_irqs(vha); 3606 ha->mqenable = 0; 3607 goto msix_out; 3608 } 3609 3610 /* Enable MSI-X vector for response queue update for queue 0 */ 3611 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3612 if (ha->msixbase && ha->mqiobase && 3613 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || 3614 ql2xmqsupport)) 3615 ha->mqenable = 1; 3616 } else 3617 if (ha->mqiobase && 3618 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || 3619 ql2xmqsupport)) 3620 ha->mqenable = 1; 3621 ql_dbg(ql_dbg_multiq, vha, 0xc005, 3622 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", 3623 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); 3624 ql_dbg(ql_dbg_init, vha, 0x0055, 3625 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", 3626 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); 3627 3628 msix_out: 3629 return ret; 3630 3631 free_irqs: 3632 pci_free_irq_vectors(ha->pdev); 3633 goto msix_out; 3634 } 3635 3636 int 3637 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) 3638 { 3639 int ret = QLA_FUNCTION_FAILED; 3640 device_reg_t *reg = ha->iobase; 3641 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 3642 3643 /* If possible, enable MSI-X. */ 3644 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) && 3645 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && 3646 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))) 3647 goto skip_msi; 3648 3649 if (ql2xenablemsix == 2) 3650 goto skip_msix; 3651 3652 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && 3653 (ha->pdev->subsystem_device == 0x7040 || 3654 ha->pdev->subsystem_device == 0x7041 || 3655 ha->pdev->subsystem_device == 0x1705)) { 3656 ql_log(ql_log_warn, vha, 0x0034, 3657 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n", 3658 ha->pdev->subsystem_vendor, 3659 ha->pdev->subsystem_device); 3660 goto skip_msi; 3661 } 3662 3663 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { 3664 ql_log(ql_log_warn, vha, 0x0035, 3665 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", 3666 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); 3667 goto skip_msix; 3668 } 3669 3670 ret = qla24xx_enable_msix(ha, rsp); 3671 if (!ret) { 3672 ql_dbg(ql_dbg_init, vha, 0x0036, 3673 "MSI-X: Enabled (0x%X, 0x%X).\n", 3674 ha->chip_revision, ha->fw_attributes); 3675 goto clear_risc_ints; 3676 } 3677 3678 skip_msix: 3679 3680 ql_log(ql_log_info, vha, 0x0037, 3681 "Falling back-to MSI mode -- ret=%d.\n", ret); 3682 3683 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && 3684 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) && 3685 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3686 goto skip_msi; 3687 3688 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI); 3689 if (ret > 0) { 3690 ql_dbg(ql_dbg_init, vha, 0x0038, 3691 "MSI: Enabled.\n"); 3692 ha->flags.msi_enabled = 1; 3693 } else 3694 ql_log(ql_log_warn, vha, 0x0039, 3695 "Falling back-to INTa mode -- ret=%d.\n", ret); 3696 skip_msi: 3697 3698 /* Skip INTx on ISP82xx. */ 3699 if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) 3700 return QLA_FUNCTION_FAILED; 3701 3702 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, 3703 ha->flags.msi_enabled ? 0 : IRQF_SHARED, 3704 QLA2XXX_DRIVER_NAME, rsp); 3705 if (ret) { 3706 ql_log(ql_log_warn, vha, 0x003a, 3707 "Failed to reserve interrupt %d already in use.\n", 3708 ha->pdev->irq); 3709 goto fail; 3710 } else if (!ha->flags.msi_enabled) { 3711 ql_dbg(ql_dbg_init, vha, 0x0125, 3712 "INTa mode: Enabled.\n"); 3713 ha->flags.mr_intr_valid = 1; 3714 } 3715 3716 clear_risc_ints: 3717 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) 3718 goto fail; 3719 3720 spin_lock_irq(&ha->hardware_lock); 3721 WRT_REG_WORD(®->isp.semaphore, 0); 3722 spin_unlock_irq(&ha->hardware_lock); 3723 3724 fail: 3725 return ret; 3726 } 3727 3728 void 3729 qla2x00_free_irqs(scsi_qla_host_t *vha) 3730 { 3731 struct qla_hw_data *ha = vha->hw; 3732 struct rsp_que *rsp; 3733 struct qla_msix_entry *qentry; 3734 int i; 3735 3736 /* 3737 * We need to check that ha->rsp_q_map is valid in case we are called 3738 * from a probe failure context. 3739 */ 3740 if (!ha->rsp_q_map || !ha->rsp_q_map[0]) 3741 goto free_irqs; 3742 rsp = ha->rsp_q_map[0]; 3743 3744 if (ha->flags.msix_enabled) { 3745 for (i = 0; i < ha->msix_count; i++) { 3746 qentry = &ha->msix_entries[i]; 3747 if (qentry->have_irq) { 3748 irq_set_affinity_notifier(qentry->vector, NULL); 3749 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle); 3750 } 3751 } 3752 kfree(ha->msix_entries); 3753 ha->msix_entries = NULL; 3754 ha->flags.msix_enabled = 0; 3755 ql_dbg(ql_dbg_init, vha, 0x0042, 3756 "Disabled MSI-X.\n"); 3757 } else { 3758 free_irq(pci_irq_vector(ha->pdev, 0), rsp); 3759 } 3760 3761 free_irqs: 3762 pci_free_irq_vectors(ha->pdev); 3763 } 3764 3765 int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair, 3766 struct qla_msix_entry *msix, int vector_type) 3767 { 3768 const struct qla_init_msix_entry *intr = &msix_entries[vector_type]; 3769 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 3770 int ret; 3771 3772 scnprintf(msix->name, sizeof(msix->name), 3773 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id); 3774 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair); 3775 if (ret) { 3776 ql_log(ql_log_fatal, vha, 0x00e6, 3777 "MSI-X: Unable to register handler -- %x/%d.\n", 3778 msix->vector, ret); 3779 return ret; 3780 } 3781 msix->have_irq = 1; 3782 msix->handle = qpair; 3783 return ret; 3784 } 3785