1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #include "qla_def.h" 7 #include "qla_target.h" 8 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/cpu.h> 12 #include <linux/t10-pi.h> 13 #include <scsi/scsi_tcq.h> 14 #include <scsi/scsi_bsg_fc.h> 15 #include <scsi/scsi_eh.h> 16 #include <scsi/fc/fc_fs.h> 17 #include <linux/nvme-fc-driver.h> 18 19 static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t); 20 static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *); 21 static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *); 22 static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *, 23 sts_entry_t *); 24 static void qla27xx_process_purex_fpin(struct scsi_qla_host *vha, 25 struct purex_item *item); 26 static struct purex_item *qla24xx_alloc_purex_item(scsi_qla_host_t *vha, 27 uint16_t size); 28 static struct purex_item *qla24xx_copy_std_pkt(struct scsi_qla_host *vha, 29 void *pkt); 30 static struct purex_item *qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha, 31 void **pkt, struct rsp_que **rsp); 32 33 static void 34 qla27xx_process_purex_fpin(struct scsi_qla_host *vha, struct purex_item *item) 35 { 36 void *pkt = &item->iocb; 37 uint16_t pkt_size = item->size; 38 39 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508d, 40 "%s: Enter\n", __func__); 41 42 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508e, 43 "-------- ELS REQ -------\n"); 44 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x508f, 45 pkt, pkt_size); 46 47 fc_host_fpin_rcv(vha->host, pkt_size, (char *)pkt); 48 } 49 50 const char *const port_state_str[] = { 51 "Unknown", 52 "UNCONFIGURED", 53 "DEAD", 54 "LOST", 55 "ONLINE" 56 }; 57 58 static void 59 qla24xx_process_abts(struct scsi_qla_host *vha, struct purex_item *pkt) 60 { 61 struct abts_entry_24xx *abts = 62 (struct abts_entry_24xx *)&pkt->iocb; 63 struct qla_hw_data *ha = vha->hw; 64 struct els_entry_24xx *rsp_els; 65 struct abts_entry_24xx *abts_rsp; 66 dma_addr_t dma; 67 uint32_t fctl; 68 int rval; 69 70 ql_dbg(ql_dbg_init, vha, 0x0286, "%s: entered.\n", __func__); 71 72 ql_log(ql_log_warn, vha, 0x0287, 73 "Processing ABTS xchg=%#x oxid=%#x rxid=%#x seqid=%#x seqcnt=%#x\n", 74 abts->rx_xch_addr_to_abort, abts->ox_id, abts->rx_id, 75 abts->seq_id, abts->seq_cnt); 76 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0287, 77 "-------- ABTS RCV -------\n"); 78 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0287, 79 (uint8_t *)abts, sizeof(*abts)); 80 81 rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els), &dma, 82 GFP_KERNEL); 83 if (!rsp_els) { 84 ql_log(ql_log_warn, vha, 0x0287, 85 "Failed allocate dma buffer ABTS/ELS RSP.\n"); 86 return; 87 } 88 89 /* terminate exchange */ 90 rsp_els->entry_type = ELS_IOCB_TYPE; 91 rsp_els->entry_count = 1; 92 rsp_els->nport_handle = cpu_to_le16(~0); 93 rsp_els->rx_xchg_address = abts->rx_xch_addr_to_abort; 94 rsp_els->control_flags = cpu_to_le16(EPD_RX_XCHG); 95 ql_dbg(ql_dbg_init, vha, 0x0283, 96 "Sending ELS Response to terminate exchange %#x...\n", 97 abts->rx_xch_addr_to_abort); 98 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0283, 99 "-------- ELS RSP -------\n"); 100 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0283, 101 (uint8_t *)rsp_els, sizeof(*rsp_els)); 102 rval = qla2x00_issue_iocb(vha, rsp_els, dma, 0); 103 if (rval) { 104 ql_log(ql_log_warn, vha, 0x0288, 105 "%s: iocb failed to execute -> %x\n", __func__, rval); 106 } else if (rsp_els->comp_status) { 107 ql_log(ql_log_warn, vha, 0x0289, 108 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n", 109 __func__, rsp_els->comp_status, 110 rsp_els->error_subcode_1, rsp_els->error_subcode_2); 111 } else { 112 ql_dbg(ql_dbg_init, vha, 0x028a, 113 "%s: abort exchange done.\n", __func__); 114 } 115 116 /* send ABTS response */ 117 abts_rsp = (void *)rsp_els; 118 memset(abts_rsp, 0, sizeof(*abts_rsp)); 119 abts_rsp->entry_type = ABTS_RSP_TYPE; 120 abts_rsp->entry_count = 1; 121 abts_rsp->nport_handle = abts->nport_handle; 122 abts_rsp->vp_idx = abts->vp_idx; 123 abts_rsp->sof_type = abts->sof_type & 0xf0; 124 abts_rsp->rx_xch_addr = abts->rx_xch_addr; 125 abts_rsp->d_id[0] = abts->s_id[0]; 126 abts_rsp->d_id[1] = abts->s_id[1]; 127 abts_rsp->d_id[2] = abts->s_id[2]; 128 abts_rsp->r_ctl = FC_ROUTING_BLD | FC_R_CTL_BLD_BA_ACC; 129 abts_rsp->s_id[0] = abts->d_id[0]; 130 abts_rsp->s_id[1] = abts->d_id[1]; 131 abts_rsp->s_id[2] = abts->d_id[2]; 132 abts_rsp->cs_ctl = abts->cs_ctl; 133 /* include flipping bit23 in fctl */ 134 fctl = ~(abts->f_ctl[2] | 0x7F) << 16 | 135 FC_F_CTL_LAST_SEQ | FC_F_CTL_END_SEQ | FC_F_CTL_SEQ_INIT; 136 abts_rsp->f_ctl[0] = fctl >> 0 & 0xff; 137 abts_rsp->f_ctl[1] = fctl >> 8 & 0xff; 138 abts_rsp->f_ctl[2] = fctl >> 16 & 0xff; 139 abts_rsp->type = FC_TYPE_BLD; 140 abts_rsp->rx_id = abts->rx_id; 141 abts_rsp->ox_id = abts->ox_id; 142 abts_rsp->payload.ba_acc.aborted_rx_id = abts->rx_id; 143 abts_rsp->payload.ba_acc.aborted_ox_id = abts->ox_id; 144 abts_rsp->payload.ba_acc.high_seq_cnt = cpu_to_le16(~0); 145 abts_rsp->rx_xch_addr_to_abort = abts->rx_xch_addr_to_abort; 146 ql_dbg(ql_dbg_init, vha, 0x028b, 147 "Sending BA ACC response to ABTS %#x...\n", 148 abts->rx_xch_addr_to_abort); 149 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x028b, 150 "-------- ELS RSP -------\n"); 151 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x028b, 152 (uint8_t *)abts_rsp, sizeof(*abts_rsp)); 153 rval = qla2x00_issue_iocb(vha, abts_rsp, dma, 0); 154 if (rval) { 155 ql_log(ql_log_warn, vha, 0x028c, 156 "%s: iocb failed to execute -> %x\n", __func__, rval); 157 } else if (abts_rsp->comp_status) { 158 ql_log(ql_log_warn, vha, 0x028d, 159 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n", 160 __func__, abts_rsp->comp_status, 161 abts_rsp->payload.error.subcode1, 162 abts_rsp->payload.error.subcode2); 163 } else { 164 ql_dbg(ql_dbg_init, vha, 0x028ea, 165 "%s: done.\n", __func__); 166 } 167 168 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els), rsp_els, dma); 169 } 170 171 /** 172 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200. 173 * @irq: interrupt number 174 * @dev_id: SCSI driver HA context 175 * 176 * Called by system whenever the host adapter generates an interrupt. 177 * 178 * Returns handled flag. 179 */ 180 irqreturn_t 181 qla2100_intr_handler(int irq, void *dev_id) 182 { 183 scsi_qla_host_t *vha; 184 struct qla_hw_data *ha; 185 struct device_reg_2xxx __iomem *reg; 186 int status; 187 unsigned long iter; 188 uint16_t hccr; 189 uint16_t mb[8]; 190 struct rsp_que *rsp; 191 unsigned long flags; 192 193 rsp = (struct rsp_que *) dev_id; 194 if (!rsp) { 195 ql_log(ql_log_info, NULL, 0x505d, 196 "%s: NULL response queue pointer.\n", __func__); 197 return (IRQ_NONE); 198 } 199 200 ha = rsp->hw; 201 reg = &ha->iobase->isp; 202 status = 0; 203 204 spin_lock_irqsave(&ha->hardware_lock, flags); 205 vha = pci_get_drvdata(ha->pdev); 206 for (iter = 50; iter--; ) { 207 hccr = rd_reg_word(®->hccr); 208 if (qla2x00_check_reg16_for_disconnect(vha, hccr)) 209 break; 210 if (hccr & HCCR_RISC_PAUSE) { 211 if (pci_channel_offline(ha->pdev)) 212 break; 213 214 /* 215 * Issue a "HARD" reset in order for the RISC interrupt 216 * bit to be cleared. Schedule a big hammer to get 217 * out of the RISC PAUSED state. 218 */ 219 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 220 rd_reg_word(®->hccr); 221 222 ha->isp_ops->fw_dump(vha); 223 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 224 break; 225 } else if ((rd_reg_word(®->istatus) & ISR_RISC_INT) == 0) 226 break; 227 228 if (rd_reg_word(®->semaphore) & BIT_0) { 229 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 230 rd_reg_word(®->hccr); 231 232 /* Get mailbox data. */ 233 mb[0] = RD_MAILBOX_REG(ha, reg, 0); 234 if (mb[0] > 0x3fff && mb[0] < 0x8000) { 235 qla2x00_mbx_completion(vha, mb[0]); 236 status |= MBX_INTERRUPT; 237 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { 238 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 239 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 240 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 241 qla2x00_async_event(vha, rsp, mb); 242 } else { 243 /*EMPTY*/ 244 ql_dbg(ql_dbg_async, vha, 0x5025, 245 "Unrecognized interrupt type (%d).\n", 246 mb[0]); 247 } 248 /* Release mailbox registers. */ 249 wrt_reg_word(®->semaphore, 0); 250 rd_reg_word(®->semaphore); 251 } else { 252 qla2x00_process_response_queue(rsp); 253 254 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 255 rd_reg_word(®->hccr); 256 } 257 } 258 qla2x00_handle_mbx_completion(ha, status); 259 spin_unlock_irqrestore(&ha->hardware_lock, flags); 260 261 return (IRQ_HANDLED); 262 } 263 264 bool 265 qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg) 266 { 267 /* Check for PCI disconnection */ 268 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) { 269 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) && 270 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) && 271 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) { 272 /* 273 * Schedule this (only once) on the default system 274 * workqueue so that all the adapter workqueues and the 275 * DPC thread can be shutdown cleanly. 276 */ 277 schedule_work(&vha->hw->board_disable); 278 } 279 return true; 280 } else 281 return false; 282 } 283 284 bool 285 qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg) 286 { 287 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg); 288 } 289 290 /** 291 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. 292 * @irq: interrupt number 293 * @dev_id: SCSI driver HA context 294 * 295 * Called by system whenever the host adapter generates an interrupt. 296 * 297 * Returns handled flag. 298 */ 299 irqreturn_t 300 qla2300_intr_handler(int irq, void *dev_id) 301 { 302 scsi_qla_host_t *vha; 303 struct device_reg_2xxx __iomem *reg; 304 int status; 305 unsigned long iter; 306 uint32_t stat; 307 uint16_t hccr; 308 uint16_t mb[8]; 309 struct rsp_que *rsp; 310 struct qla_hw_data *ha; 311 unsigned long flags; 312 313 rsp = (struct rsp_que *) dev_id; 314 if (!rsp) { 315 ql_log(ql_log_info, NULL, 0x5058, 316 "%s: NULL response queue pointer.\n", __func__); 317 return (IRQ_NONE); 318 } 319 320 ha = rsp->hw; 321 reg = &ha->iobase->isp; 322 status = 0; 323 324 spin_lock_irqsave(&ha->hardware_lock, flags); 325 vha = pci_get_drvdata(ha->pdev); 326 for (iter = 50; iter--; ) { 327 stat = rd_reg_dword(®->u.isp2300.host_status); 328 if (qla2x00_check_reg32_for_disconnect(vha, stat)) 329 break; 330 if (stat & HSR_RISC_PAUSED) { 331 if (unlikely(pci_channel_offline(ha->pdev))) 332 break; 333 334 hccr = rd_reg_word(®->hccr); 335 336 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) 337 ql_log(ql_log_warn, vha, 0x5026, 338 "Parity error -- HCCR=%x, Dumping " 339 "firmware.\n", hccr); 340 else 341 ql_log(ql_log_warn, vha, 0x5027, 342 "RISC paused -- HCCR=%x, Dumping " 343 "firmware.\n", hccr); 344 345 /* 346 * Issue a "HARD" reset in order for the RISC 347 * interrupt bit to be cleared. Schedule a big 348 * hammer to get out of the RISC PAUSED state. 349 */ 350 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 351 rd_reg_word(®->hccr); 352 353 ha->isp_ops->fw_dump(vha); 354 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 355 break; 356 } else if ((stat & HSR_RISC_INT) == 0) 357 break; 358 359 switch (stat & 0xff) { 360 case 0x1: 361 case 0x2: 362 case 0x10: 363 case 0x11: 364 qla2x00_mbx_completion(vha, MSW(stat)); 365 status |= MBX_INTERRUPT; 366 367 /* Release mailbox registers. */ 368 wrt_reg_word(®->semaphore, 0); 369 break; 370 case 0x12: 371 mb[0] = MSW(stat); 372 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 373 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 374 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 375 qla2x00_async_event(vha, rsp, mb); 376 break; 377 case 0x13: 378 qla2x00_process_response_queue(rsp); 379 break; 380 case 0x15: 381 mb[0] = MBA_CMPLT_1_16BIT; 382 mb[1] = MSW(stat); 383 qla2x00_async_event(vha, rsp, mb); 384 break; 385 case 0x16: 386 mb[0] = MBA_SCSI_COMPLETION; 387 mb[1] = MSW(stat); 388 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 389 qla2x00_async_event(vha, rsp, mb); 390 break; 391 default: 392 ql_dbg(ql_dbg_async, vha, 0x5028, 393 "Unrecognized interrupt type (%d).\n", stat & 0xff); 394 break; 395 } 396 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 397 rd_reg_word_relaxed(®->hccr); 398 } 399 qla2x00_handle_mbx_completion(ha, status); 400 spin_unlock_irqrestore(&ha->hardware_lock, flags); 401 402 return (IRQ_HANDLED); 403 } 404 405 /** 406 * qla2x00_mbx_completion() - Process mailbox command completions. 407 * @vha: SCSI driver HA context 408 * @mb0: Mailbox0 register 409 */ 410 static void 411 qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) 412 { 413 uint16_t cnt; 414 uint32_t mboxes; 415 __le16 __iomem *wptr; 416 struct qla_hw_data *ha = vha->hw; 417 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 418 419 /* Read all mbox registers? */ 420 WARN_ON_ONCE(ha->mbx_count > 32); 421 mboxes = (1ULL << ha->mbx_count) - 1; 422 if (!ha->mcp) 423 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n"); 424 else 425 mboxes = ha->mcp->in_mb; 426 427 /* Load return mailbox registers. */ 428 ha->flags.mbox_int = 1; 429 ha->mailbox_out[0] = mb0; 430 mboxes >>= 1; 431 wptr = MAILBOX_REG(ha, reg, 1); 432 433 for (cnt = 1; cnt < ha->mbx_count; cnt++) { 434 if (IS_QLA2200(ha) && cnt == 8) 435 wptr = MAILBOX_REG(ha, reg, 8); 436 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0)) 437 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); 438 else if (mboxes & BIT_0) 439 ha->mailbox_out[cnt] = rd_reg_word(wptr); 440 441 wptr++; 442 mboxes >>= 1; 443 } 444 } 445 446 static void 447 qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) 448 { 449 static char *event[] = 450 { "Complete", "Request Notification", "Time Extension" }; 451 int rval; 452 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; 453 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82; 454 __le16 __iomem *wptr; 455 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; 456 457 /* Seed data -- mailbox1 -> mailbox7. */ 458 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) 459 wptr = ®24->mailbox1; 460 else if (IS_QLA8044(vha->hw)) 461 wptr = ®82->mailbox_out[1]; 462 else 463 return; 464 465 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) 466 mb[cnt] = rd_reg_word(wptr); 467 468 ql_dbg(ql_dbg_async, vha, 0x5021, 469 "Inter-Driver Communication %s -- " 470 "%04x %04x %04x %04x %04x %04x %04x.\n", 471 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3], 472 mb[4], mb[5], mb[6]); 473 switch (aen) { 474 /* Handle IDC Error completion case. */ 475 case MBA_IDC_COMPLETE: 476 if (mb[1] >> 15) { 477 vha->hw->flags.idc_compl_status = 1; 478 if (vha->hw->notify_dcbx_comp && !vha->vp_idx) 479 complete(&vha->hw->dcbx_comp); 480 } 481 break; 482 483 case MBA_IDC_NOTIFY: 484 /* Acknowledgement needed? [Notify && non-zero timeout]. */ 485 timeout = (descr >> 8) & 0xf; 486 ql_dbg(ql_dbg_async, vha, 0x5022, 487 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n", 488 vha->host_no, event[aen & 0xff], timeout); 489 490 if (!timeout) 491 return; 492 rval = qla2x00_post_idc_ack_work(vha, mb); 493 if (rval != QLA_SUCCESS) 494 ql_log(ql_log_warn, vha, 0x5023, 495 "IDC failed to post ACK.\n"); 496 break; 497 case MBA_IDC_TIME_EXT: 498 vha->hw->idc_extend_tmo = descr; 499 ql_dbg(ql_dbg_async, vha, 0x5087, 500 "%lu Inter-Driver Communication %s -- " 501 "Extend timeout by=%d.\n", 502 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo); 503 break; 504 } 505 } 506 507 #define LS_UNKNOWN 2 508 const char * 509 qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed) 510 { 511 static const char *const link_speeds[] = { 512 "1", "2", "?", "4", "8", "16", "32", "10" 513 }; 514 #define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1) 515 516 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 517 return link_speeds[0]; 518 else if (speed == 0x13) 519 return link_speeds[QLA_LAST_SPEED]; 520 else if (speed < QLA_LAST_SPEED) 521 return link_speeds[speed]; 522 else 523 return link_speeds[LS_UNKNOWN]; 524 } 525 526 static void 527 qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) 528 { 529 struct qla_hw_data *ha = vha->hw; 530 531 /* 532 * 8200 AEN Interpretation: 533 * mb[0] = AEN code 534 * mb[1] = AEN Reason code 535 * mb[2] = LSW of Peg-Halt Status-1 Register 536 * mb[6] = MSW of Peg-Halt Status-1 Register 537 * mb[3] = LSW of Peg-Halt Status-2 register 538 * mb[7] = MSW of Peg-Halt Status-2 register 539 * mb[4] = IDC Device-State Register value 540 * mb[5] = IDC Driver-Presence Register value 541 */ 542 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: " 543 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n", 544 mb[0], mb[1], mb[2], mb[6]); 545 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x " 546 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x " 547 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]); 548 549 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE | 550 IDC_HEARTBEAT_FAILURE)) { 551 ha->flags.nic_core_hung = 1; 552 ql_log(ql_log_warn, vha, 0x5060, 553 "83XX: F/W Error Reported: Check if reset required.\n"); 554 555 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) { 556 uint32_t protocol_engine_id, fw_err_code, err_level; 557 558 /* 559 * IDC_PEG_HALT_STATUS_CHANGE interpretation: 560 * - PEG-Halt Status-1 Register: 561 * (LSW = mb[2], MSW = mb[6]) 562 * Bits 0-7 = protocol-engine ID 563 * Bits 8-28 = f/w error code 564 * Bits 29-31 = Error-level 565 * Error-level 0x1 = Non-Fatal error 566 * Error-level 0x2 = Recoverable Fatal error 567 * Error-level 0x4 = UnRecoverable Fatal error 568 * - PEG-Halt Status-2 Register: 569 * (LSW = mb[3], MSW = mb[7]) 570 */ 571 protocol_engine_id = (mb[2] & 0xff); 572 fw_err_code = (((mb[2] & 0xff00) >> 8) | 573 ((mb[6] & 0x1fff) << 8)); 574 err_level = ((mb[6] & 0xe000) >> 13); 575 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 " 576 "Register: protocol_engine_id=0x%x " 577 "fw_err_code=0x%x err_level=0x%x.\n", 578 protocol_engine_id, fw_err_code, err_level); 579 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 " 580 "Register: 0x%x%x.\n", mb[7], mb[3]); 581 if (err_level == ERR_LEVEL_NON_FATAL) { 582 ql_log(ql_log_warn, vha, 0x5063, 583 "Not a fatal error, f/w has recovered itself.\n"); 584 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) { 585 ql_log(ql_log_fatal, vha, 0x5064, 586 "Recoverable Fatal error: Chip reset " 587 "required.\n"); 588 qla83xx_schedule_work(vha, 589 QLA83XX_NIC_CORE_RESET); 590 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) { 591 ql_log(ql_log_fatal, vha, 0x5065, 592 "Unrecoverable Fatal error: Set FAILED " 593 "state, reboot required.\n"); 594 qla83xx_schedule_work(vha, 595 QLA83XX_NIC_CORE_UNRECOVERABLE); 596 } 597 } 598 599 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) { 600 uint16_t peg_fw_state, nw_interface_link_up; 601 uint16_t nw_interface_signal_detect, sfp_status; 602 uint16_t htbt_counter, htbt_monitor_enable; 603 uint16_t sfp_additional_info, sfp_multirate; 604 uint16_t sfp_tx_fault, link_speed, dcbx_status; 605 606 /* 607 * IDC_NIC_FW_REPORTED_FAILURE interpretation: 608 * - PEG-to-FC Status Register: 609 * (LSW = mb[2], MSW = mb[6]) 610 * Bits 0-7 = Peg-Firmware state 611 * Bit 8 = N/W Interface Link-up 612 * Bit 9 = N/W Interface signal detected 613 * Bits 10-11 = SFP Status 614 * SFP Status 0x0 = SFP+ transceiver not expected 615 * SFP Status 0x1 = SFP+ transceiver not present 616 * SFP Status 0x2 = SFP+ transceiver invalid 617 * SFP Status 0x3 = SFP+ transceiver present and 618 * valid 619 * Bits 12-14 = Heartbeat Counter 620 * Bit 15 = Heartbeat Monitor Enable 621 * Bits 16-17 = SFP Additional Info 622 * SFP info 0x0 = Unregocnized transceiver for 623 * Ethernet 624 * SFP info 0x1 = SFP+ brand validation failed 625 * SFP info 0x2 = SFP+ speed validation failed 626 * SFP info 0x3 = SFP+ access error 627 * Bit 18 = SFP Multirate 628 * Bit 19 = SFP Tx Fault 629 * Bits 20-22 = Link Speed 630 * Bits 23-27 = Reserved 631 * Bits 28-30 = DCBX Status 632 * DCBX Status 0x0 = DCBX Disabled 633 * DCBX Status 0x1 = DCBX Enabled 634 * DCBX Status 0x2 = DCBX Exchange error 635 * Bit 31 = Reserved 636 */ 637 peg_fw_state = (mb[2] & 0x00ff); 638 nw_interface_link_up = ((mb[2] & 0x0100) >> 8); 639 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9); 640 sfp_status = ((mb[2] & 0x0c00) >> 10); 641 htbt_counter = ((mb[2] & 0x7000) >> 12); 642 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15); 643 sfp_additional_info = (mb[6] & 0x0003); 644 sfp_multirate = ((mb[6] & 0x0004) >> 2); 645 sfp_tx_fault = ((mb[6] & 0x0008) >> 3); 646 link_speed = ((mb[6] & 0x0070) >> 4); 647 dcbx_status = ((mb[6] & 0x7000) >> 12); 648 649 ql_log(ql_log_warn, vha, 0x5066, 650 "Peg-to-Fc Status Register:\n" 651 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, " 652 "nw_interface_signal_detect=0x%x" 653 "\nsfp_statis=0x%x.\n ", peg_fw_state, 654 nw_interface_link_up, nw_interface_signal_detect, 655 sfp_status); 656 ql_log(ql_log_warn, vha, 0x5067, 657 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, " 658 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ", 659 htbt_counter, htbt_monitor_enable, 660 sfp_additional_info, sfp_multirate); 661 ql_log(ql_log_warn, vha, 0x5068, 662 "sfp_tx_fault=0x%x, link_state=0x%x, " 663 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed, 664 dcbx_status); 665 666 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); 667 } 668 669 if (mb[1] & IDC_HEARTBEAT_FAILURE) { 670 ql_log(ql_log_warn, vha, 0x5069, 671 "Heartbeat Failure encountered, chip reset " 672 "required.\n"); 673 674 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); 675 } 676 } 677 678 if (mb[1] & IDC_DEVICE_STATE_CHANGE) { 679 ql_log(ql_log_info, vha, 0x506a, 680 "IDC Device-State changed = 0x%x.\n", mb[4]); 681 if (ha->flags.nic_core_reset_owner) 682 return; 683 qla83xx_schedule_work(vha, MBA_IDC_AEN); 684 } 685 } 686 687 int 688 qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry) 689 { 690 struct qla_hw_data *ha = vha->hw; 691 scsi_qla_host_t *vp; 692 uint32_t vp_did; 693 unsigned long flags; 694 int ret = 0; 695 696 if (!ha->num_vhosts) 697 return ret; 698 699 spin_lock_irqsave(&ha->vport_slock, flags); 700 list_for_each_entry(vp, &ha->vp_list, list) { 701 vp_did = vp->d_id.b24; 702 if (vp_did == rscn_entry) { 703 ret = 1; 704 break; 705 } 706 } 707 spin_unlock_irqrestore(&ha->vport_slock, flags); 708 709 return ret; 710 } 711 712 fc_port_t * 713 qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id) 714 { 715 fc_port_t *f, *tf; 716 717 f = tf = NULL; 718 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) 719 if (f->loop_id == loop_id) 720 return f; 721 return NULL; 722 } 723 724 fc_port_t * 725 qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted) 726 { 727 fc_port_t *f, *tf; 728 729 f = tf = NULL; 730 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 731 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) { 732 if (incl_deleted) 733 return f; 734 else if (f->deleted == 0) 735 return f; 736 } 737 } 738 return NULL; 739 } 740 741 fc_port_t * 742 qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id, 743 u8 incl_deleted) 744 { 745 fc_port_t *f, *tf; 746 747 f = tf = NULL; 748 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 749 if (f->d_id.b24 == id->b24) { 750 if (incl_deleted) 751 return f; 752 else if (f->deleted == 0) 753 return f; 754 } 755 } 756 return NULL; 757 } 758 759 /* Shall be called only on supported adapters. */ 760 static void 761 qla27xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) 762 { 763 struct qla_hw_data *ha = vha->hw; 764 bool reset_isp_needed = 0; 765 766 ql_log(ql_log_warn, vha, 0x02f0, 767 "MPI Heartbeat stop. MPI reset is%s needed. " 768 "MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n", 769 mb[1] & BIT_8 ? "" : " not", 770 mb[0], mb[1], mb[2], mb[3]); 771 772 if ((mb[1] & BIT_8) == 0) 773 return; 774 775 ql_log(ql_log_warn, vha, 0x02f1, 776 "MPI Heartbeat stop. FW dump needed\n"); 777 778 if (ql2xfulldump_on_mpifail) { 779 ha->isp_ops->fw_dump(vha); 780 reset_isp_needed = 1; 781 } 782 783 ha->isp_ops->mpi_fw_dump(vha, 1); 784 785 if (reset_isp_needed) { 786 vha->hw->flags.fw_init_done = 0; 787 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 788 qla2xxx_wake_dpc(vha); 789 } 790 } 791 792 static struct purex_item * 793 qla24xx_alloc_purex_item(scsi_qla_host_t *vha, uint16_t size) 794 { 795 struct purex_item *item = NULL; 796 uint8_t item_hdr_size = sizeof(*item); 797 798 if (size > QLA_DEFAULT_PAYLOAD_SIZE) { 799 item = kzalloc(item_hdr_size + 800 (size - QLA_DEFAULT_PAYLOAD_SIZE), GFP_ATOMIC); 801 } else { 802 if (atomic_inc_return(&vha->default_item.in_use) == 1) { 803 item = &vha->default_item; 804 goto initialize_purex_header; 805 } else { 806 item = kzalloc(item_hdr_size, GFP_ATOMIC); 807 } 808 } 809 if (!item) { 810 ql_log(ql_log_warn, vha, 0x5092, 811 ">> Failed allocate purex list item.\n"); 812 813 return NULL; 814 } 815 816 initialize_purex_header: 817 item->vha = vha; 818 item->size = size; 819 return item; 820 } 821 822 static void 823 qla24xx_queue_purex_item(scsi_qla_host_t *vha, struct purex_item *pkt, 824 void (*process_item)(struct scsi_qla_host *vha, 825 struct purex_item *pkt)) 826 { 827 struct purex_list *list = &vha->purex_list; 828 ulong flags; 829 830 pkt->process_item = process_item; 831 832 spin_lock_irqsave(&list->lock, flags); 833 list_add_tail(&pkt->list, &list->head); 834 spin_unlock_irqrestore(&list->lock, flags); 835 836 set_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags); 837 } 838 839 /** 840 * qla24xx_copy_std_pkt() - Copy over purex ELS which is 841 * contained in a single IOCB. 842 * purex packet. 843 * @vha: SCSI driver HA context 844 * @pkt: ELS packet 845 */ 846 static struct purex_item 847 *qla24xx_copy_std_pkt(struct scsi_qla_host *vha, void *pkt) 848 { 849 struct purex_item *item; 850 851 item = qla24xx_alloc_purex_item(vha, 852 QLA_DEFAULT_PAYLOAD_SIZE); 853 if (!item) 854 return item; 855 856 memcpy(&item->iocb, pkt, sizeof(item->iocb)); 857 return item; 858 } 859 860 /** 861 * qla27xx_copy_fpin_pkt() - Copy over fpin packets that can 862 * span over multiple IOCBs. 863 * @vha: SCSI driver HA context 864 * @pkt: ELS packet 865 * @rsp: Response queue 866 */ 867 static struct purex_item * 868 qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha, void **pkt, 869 struct rsp_que **rsp) 870 { 871 struct purex_entry_24xx *purex = *pkt; 872 struct rsp_que *rsp_q = *rsp; 873 sts_cont_entry_t *new_pkt; 874 uint16_t no_bytes = 0, total_bytes = 0, pending_bytes = 0; 875 uint16_t buffer_copy_offset = 0; 876 uint16_t entry_count, entry_count_remaining; 877 struct purex_item *item; 878 void *fpin_pkt = NULL; 879 880 total_bytes = (le16_to_cpu(purex->frame_size) & 0x0FFF) 881 - PURX_ELS_HEADER_SIZE; 882 pending_bytes = total_bytes; 883 entry_count = entry_count_remaining = purex->entry_count; 884 no_bytes = (pending_bytes > sizeof(purex->els_frame_payload)) ? 885 sizeof(purex->els_frame_payload) : pending_bytes; 886 ql_log(ql_log_info, vha, 0x509a, 887 "FPIN ELS, frame_size 0x%x, entry count %d\n", 888 total_bytes, entry_count); 889 890 item = qla24xx_alloc_purex_item(vha, total_bytes); 891 if (!item) 892 return item; 893 894 fpin_pkt = &item->iocb; 895 896 memcpy(fpin_pkt, &purex->els_frame_payload[0], no_bytes); 897 buffer_copy_offset += no_bytes; 898 pending_bytes -= no_bytes; 899 --entry_count_remaining; 900 901 ((response_t *)purex)->signature = RESPONSE_PROCESSED; 902 wmb(); 903 904 do { 905 while ((total_bytes > 0) && (entry_count_remaining > 0)) { 906 if (rsp_q->ring_ptr->signature == RESPONSE_PROCESSED) { 907 ql_dbg(ql_dbg_async, vha, 0x5084, 908 "Ran out of IOCBs, partial data 0x%x\n", 909 buffer_copy_offset); 910 cpu_relax(); 911 continue; 912 } 913 914 new_pkt = (sts_cont_entry_t *)rsp_q->ring_ptr; 915 *pkt = new_pkt; 916 917 if (new_pkt->entry_type != STATUS_CONT_TYPE) { 918 ql_log(ql_log_warn, vha, 0x507a, 919 "Unexpected IOCB type, partial data 0x%x\n", 920 buffer_copy_offset); 921 break; 922 } 923 924 rsp_q->ring_index++; 925 if (rsp_q->ring_index == rsp_q->length) { 926 rsp_q->ring_index = 0; 927 rsp_q->ring_ptr = rsp_q->ring; 928 } else { 929 rsp_q->ring_ptr++; 930 } 931 no_bytes = (pending_bytes > sizeof(new_pkt->data)) ? 932 sizeof(new_pkt->data) : pending_bytes; 933 if ((buffer_copy_offset + no_bytes) <= total_bytes) { 934 memcpy(((uint8_t *)fpin_pkt + 935 buffer_copy_offset), new_pkt->data, 936 no_bytes); 937 buffer_copy_offset += no_bytes; 938 pending_bytes -= no_bytes; 939 --entry_count_remaining; 940 } else { 941 ql_log(ql_log_warn, vha, 0x5044, 942 "Attempt to copy more that we got, optimizing..%x\n", 943 buffer_copy_offset); 944 memcpy(((uint8_t *)fpin_pkt + 945 buffer_copy_offset), new_pkt->data, 946 total_bytes - buffer_copy_offset); 947 } 948 949 ((response_t *)new_pkt)->signature = RESPONSE_PROCESSED; 950 wmb(); 951 } 952 953 if (pending_bytes != 0 || entry_count_remaining != 0) { 954 ql_log(ql_log_fatal, vha, 0x508b, 955 "Dropping partial FPIN, underrun bytes = 0x%x, entry cnts 0x%x\n", 956 total_bytes, entry_count_remaining); 957 qla24xx_free_purex_item(item); 958 return NULL; 959 } 960 } while (entry_count_remaining > 0); 961 host_to_fcp_swap((uint8_t *)&item->iocb, total_bytes); 962 return item; 963 } 964 965 /** 966 * qla2x00_async_event() - Process aynchronous events. 967 * @vha: SCSI driver HA context 968 * @rsp: response queue 969 * @mb: Mailbox registers (0 - 3) 970 */ 971 void 972 qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb) 973 { 974 uint16_t handle_cnt; 975 uint16_t cnt, mbx; 976 uint32_t handles[5]; 977 struct qla_hw_data *ha = vha->hw; 978 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 979 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; 980 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; 981 uint32_t rscn_entry, host_pid; 982 unsigned long flags; 983 fc_port_t *fcport = NULL; 984 985 if (!vha->hw->flags.fw_started) 986 return; 987 988 /* Setup to process RIO completion. */ 989 handle_cnt = 0; 990 if (IS_CNA_CAPABLE(ha)) 991 goto skip_rio; 992 switch (mb[0]) { 993 case MBA_SCSI_COMPLETION: 994 handles[0] = make_handle(mb[2], mb[1]); 995 handle_cnt = 1; 996 break; 997 case MBA_CMPLT_1_16BIT: 998 handles[0] = mb[1]; 999 handle_cnt = 1; 1000 mb[0] = MBA_SCSI_COMPLETION; 1001 break; 1002 case MBA_CMPLT_2_16BIT: 1003 handles[0] = mb[1]; 1004 handles[1] = mb[2]; 1005 handle_cnt = 2; 1006 mb[0] = MBA_SCSI_COMPLETION; 1007 break; 1008 case MBA_CMPLT_3_16BIT: 1009 handles[0] = mb[1]; 1010 handles[1] = mb[2]; 1011 handles[2] = mb[3]; 1012 handle_cnt = 3; 1013 mb[0] = MBA_SCSI_COMPLETION; 1014 break; 1015 case MBA_CMPLT_4_16BIT: 1016 handles[0] = mb[1]; 1017 handles[1] = mb[2]; 1018 handles[2] = mb[3]; 1019 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); 1020 handle_cnt = 4; 1021 mb[0] = MBA_SCSI_COMPLETION; 1022 break; 1023 case MBA_CMPLT_5_16BIT: 1024 handles[0] = mb[1]; 1025 handles[1] = mb[2]; 1026 handles[2] = mb[3]; 1027 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); 1028 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); 1029 handle_cnt = 5; 1030 mb[0] = MBA_SCSI_COMPLETION; 1031 break; 1032 case MBA_CMPLT_2_32BIT: 1033 handles[0] = make_handle(mb[2], mb[1]); 1034 handles[1] = make_handle(RD_MAILBOX_REG(ha, reg, 7), 1035 RD_MAILBOX_REG(ha, reg, 6)); 1036 handle_cnt = 2; 1037 mb[0] = MBA_SCSI_COMPLETION; 1038 break; 1039 default: 1040 break; 1041 } 1042 skip_rio: 1043 switch (mb[0]) { 1044 case MBA_SCSI_COMPLETION: /* Fast Post */ 1045 if (!vha->flags.online) 1046 break; 1047 1048 for (cnt = 0; cnt < handle_cnt; cnt++) 1049 qla2x00_process_completed_request(vha, rsp->req, 1050 handles[cnt]); 1051 break; 1052 1053 case MBA_RESET: /* Reset */ 1054 ql_dbg(ql_dbg_async, vha, 0x5002, 1055 "Asynchronous RESET.\n"); 1056 1057 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 1058 break; 1059 1060 case MBA_SYSTEM_ERR: /* System Error */ 1061 mbx = 0; 1062 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || 1063 IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1064 u16 m[4]; 1065 1066 m[0] = rd_reg_word(®24->mailbox4); 1067 m[1] = rd_reg_word(®24->mailbox5); 1068 m[2] = rd_reg_word(®24->mailbox6); 1069 mbx = m[3] = rd_reg_word(®24->mailbox7); 1070 1071 ql_log(ql_log_warn, vha, 0x5003, 1072 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh mbx4=%xh mbx5=%xh mbx6=%xh mbx7=%xh.\n", 1073 mb[1], mb[2], mb[3], m[0], m[1], m[2], m[3]); 1074 } else 1075 ql_log(ql_log_warn, vha, 0x5003, 1076 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh.\n ", 1077 mb[1], mb[2], mb[3]); 1078 1079 if ((IS_QLA27XX(ha) || IS_QLA28XX(ha)) && 1080 rd_reg_word(®24->mailbox7) & BIT_8) 1081 ha->isp_ops->mpi_fw_dump(vha, 1); 1082 ha->isp_ops->fw_dump(vha); 1083 ha->flags.fw_init_done = 0; 1084 QLA_FW_STOPPED(ha); 1085 1086 if (IS_FWI2_CAPABLE(ha)) { 1087 if (mb[1] == 0 && mb[2] == 0) { 1088 ql_log(ql_log_fatal, vha, 0x5004, 1089 "Unrecoverable Hardware Error: adapter " 1090 "marked OFFLINE!\n"); 1091 vha->flags.online = 0; 1092 vha->device_flags |= DFLG_DEV_FAILED; 1093 } else { 1094 /* Check to see if MPI timeout occurred */ 1095 if ((mbx & MBX_3) && (ha->port_no == 0)) 1096 set_bit(MPI_RESET_NEEDED, 1097 &vha->dpc_flags); 1098 1099 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1100 } 1101 } else if (mb[1] == 0) { 1102 ql_log(ql_log_fatal, vha, 0x5005, 1103 "Unrecoverable Hardware Error: adapter marked " 1104 "OFFLINE!\n"); 1105 vha->flags.online = 0; 1106 vha->device_flags |= DFLG_DEV_FAILED; 1107 } else 1108 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1109 break; 1110 1111 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */ 1112 ql_log(ql_log_warn, vha, 0x5006, 1113 "ISP Request Transfer Error (%x).\n", mb[1]); 1114 1115 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1116 break; 1117 1118 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */ 1119 ql_log(ql_log_warn, vha, 0x5007, 1120 "ISP Response Transfer Error (%x).\n", mb[1]); 1121 1122 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1123 break; 1124 1125 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */ 1126 ql_dbg(ql_dbg_async, vha, 0x5008, 1127 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]); 1128 break; 1129 1130 case MBA_LOOP_INIT_ERR: 1131 ql_log(ql_log_warn, vha, 0x5090, 1132 "LOOP INIT ERROR (%x).\n", mb[1]); 1133 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1134 break; 1135 1136 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ 1137 ha->flags.lip_ae = 1; 1138 1139 ql_dbg(ql_dbg_async, vha, 0x5009, 1140 "LIP occurred (%x).\n", mb[1]); 1141 1142 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1143 atomic_set(&vha->loop_state, LOOP_DOWN); 1144 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1145 qla2x00_mark_all_devices_lost(vha); 1146 } 1147 1148 if (vha->vp_idx) { 1149 atomic_set(&vha->vp_state, VP_FAILED); 1150 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1151 } 1152 1153 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); 1154 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); 1155 1156 vha->flags.management_server_logged_in = 0; 1157 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]); 1158 break; 1159 1160 case MBA_LOOP_UP: /* Loop Up Event */ 1161 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 1162 ha->link_data_rate = PORT_SPEED_1GB; 1163 else 1164 ha->link_data_rate = mb[1]; 1165 1166 ql_log(ql_log_info, vha, 0x500a, 1167 "LOOP UP detected (%s Gbps).\n", 1168 qla2x00_get_link_speed_str(ha, ha->link_data_rate)); 1169 1170 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1171 if (mb[2] & BIT_0) 1172 ql_log(ql_log_info, vha, 0x11a0, 1173 "FEC=enabled (link up).\n"); 1174 } 1175 1176 vha->flags.management_server_logged_in = 0; 1177 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); 1178 1179 break; 1180 1181 case MBA_LOOP_DOWN: /* Loop Down Event */ 1182 SAVE_TOPO(ha); 1183 ha->flags.lip_ae = 0; 1184 ha->current_topology = 0; 1185 1186 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) 1187 ? rd_reg_word(®24->mailbox4) : 0; 1188 mbx = (IS_P3P_TYPE(ha)) ? rd_reg_word(®82->mailbox_out[4]) 1189 : mbx; 1190 ql_log(ql_log_info, vha, 0x500b, 1191 "LOOP DOWN detected (%x %x %x %x).\n", 1192 mb[1], mb[2], mb[3], mbx); 1193 1194 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1195 atomic_set(&vha->loop_state, LOOP_DOWN); 1196 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1197 /* 1198 * In case of loop down, restore WWPN from 1199 * NVRAM in case of FA-WWPN capable ISP 1200 * Restore for Physical Port only 1201 */ 1202 if (!vha->vp_idx) { 1203 if (ha->flags.fawwpn_enabled && 1204 (ha->current_topology == ISP_CFG_F)) { 1205 void *wwpn = ha->init_cb->port_name; 1206 1207 memcpy(vha->port_name, wwpn, WWN_SIZE); 1208 fc_host_port_name(vha->host) = 1209 wwn_to_u64(vha->port_name); 1210 ql_dbg(ql_dbg_init + ql_dbg_verbose, 1211 vha, 0x00d8, "LOOP DOWN detected," 1212 "restore WWPN %016llx\n", 1213 wwn_to_u64(vha->port_name)); 1214 } 1215 1216 clear_bit(VP_CONFIG_OK, &vha->vp_flags); 1217 } 1218 1219 vha->device_flags |= DFLG_NO_CABLE; 1220 qla2x00_mark_all_devices_lost(vha); 1221 } 1222 1223 if (vha->vp_idx) { 1224 atomic_set(&vha->vp_state, VP_FAILED); 1225 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1226 } 1227 1228 vha->flags.management_server_logged_in = 0; 1229 ha->link_data_rate = PORT_SPEED_UNKNOWN; 1230 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0); 1231 break; 1232 1233 case MBA_LIP_RESET: /* LIP reset occurred */ 1234 ql_dbg(ql_dbg_async, vha, 0x500c, 1235 "LIP reset occurred (%x).\n", mb[1]); 1236 1237 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1238 atomic_set(&vha->loop_state, LOOP_DOWN); 1239 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1240 qla2x00_mark_all_devices_lost(vha); 1241 } 1242 1243 if (vha->vp_idx) { 1244 atomic_set(&vha->vp_state, VP_FAILED); 1245 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1246 } 1247 1248 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 1249 1250 ha->operating_mode = LOOP; 1251 vha->flags.management_server_logged_in = 0; 1252 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]); 1253 break; 1254 1255 /* case MBA_DCBX_COMPLETE: */ 1256 case MBA_POINT_TO_POINT: /* Point-to-Point */ 1257 ha->flags.lip_ae = 0; 1258 1259 if (IS_QLA2100(ha)) 1260 break; 1261 1262 if (IS_CNA_CAPABLE(ha)) { 1263 ql_dbg(ql_dbg_async, vha, 0x500d, 1264 "DCBX Completed -- %04x %04x %04x.\n", 1265 mb[1], mb[2], mb[3]); 1266 if (ha->notify_dcbx_comp && !vha->vp_idx) 1267 complete(&ha->dcbx_comp); 1268 1269 } else 1270 ql_dbg(ql_dbg_async, vha, 0x500e, 1271 "Asynchronous P2P MODE received.\n"); 1272 1273 /* 1274 * Until there's a transition from loop down to loop up, treat 1275 * this as loop down only. 1276 */ 1277 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1278 atomic_set(&vha->loop_state, LOOP_DOWN); 1279 if (!atomic_read(&vha->loop_down_timer)) 1280 atomic_set(&vha->loop_down_timer, 1281 LOOP_DOWN_TIME); 1282 if (!N2N_TOPO(ha)) 1283 qla2x00_mark_all_devices_lost(vha); 1284 } 1285 1286 if (vha->vp_idx) { 1287 atomic_set(&vha->vp_state, VP_FAILED); 1288 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1289 } 1290 1291 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) 1292 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 1293 1294 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); 1295 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); 1296 1297 vha->flags.management_server_logged_in = 0; 1298 break; 1299 1300 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */ 1301 if (IS_QLA2100(ha)) 1302 break; 1303 1304 ql_dbg(ql_dbg_async, vha, 0x500f, 1305 "Configuration change detected: value=%x.\n", mb[1]); 1306 1307 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1308 atomic_set(&vha->loop_state, LOOP_DOWN); 1309 if (!atomic_read(&vha->loop_down_timer)) 1310 atomic_set(&vha->loop_down_timer, 1311 LOOP_DOWN_TIME); 1312 qla2x00_mark_all_devices_lost(vha); 1313 } 1314 1315 if (vha->vp_idx) { 1316 atomic_set(&vha->vp_state, VP_FAILED); 1317 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1318 } 1319 1320 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1321 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1322 break; 1323 1324 case MBA_PORT_UPDATE: /* Port database update */ 1325 /* 1326 * Handle only global and vn-port update events 1327 * 1328 * Relevant inputs: 1329 * mb[1] = N_Port handle of changed port 1330 * OR 0xffff for global event 1331 * mb[2] = New login state 1332 * 7 = Port logged out 1333 * mb[3] = LSB is vp_idx, 0xff = all vps 1334 * 1335 * Skip processing if: 1336 * Event is global, vp_idx is NOT all vps, 1337 * vp_idx does not match 1338 * Event is not global, vp_idx does not match 1339 */ 1340 if (IS_QLA2XXX_MIDTYPE(ha) && 1341 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) || 1342 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff)) 1343 break; 1344 1345 if (mb[2] == 0x7) { 1346 ql_dbg(ql_dbg_async, vha, 0x5010, 1347 "Port %s %04x %04x %04x.\n", 1348 mb[1] == 0xffff ? "unavailable" : "logout", 1349 mb[1], mb[2], mb[3]); 1350 1351 if (mb[1] == 0xffff) 1352 goto global_port_update; 1353 1354 if (mb[1] == NPH_SNS_LID(ha)) { 1355 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1356 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1357 break; 1358 } 1359 1360 /* use handle_cnt for loop id/nport handle */ 1361 if (IS_FWI2_CAPABLE(ha)) 1362 handle_cnt = NPH_SNS; 1363 else 1364 handle_cnt = SIMPLE_NAME_SERVER; 1365 if (mb[1] == handle_cnt) { 1366 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1367 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1368 break; 1369 } 1370 1371 /* Port logout */ 1372 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]); 1373 if (!fcport) 1374 break; 1375 if (atomic_read(&fcport->state) != FCS_ONLINE) 1376 break; 1377 ql_dbg(ql_dbg_async, vha, 0x508a, 1378 "Marking port lost loopid=%04x portid=%06x.\n", 1379 fcport->loop_id, fcport->d_id.b24); 1380 if (qla_ini_mode_enabled(vha)) { 1381 fcport->logout_on_delete = 0; 1382 qlt_schedule_sess_for_deletion(fcport); 1383 } 1384 break; 1385 1386 global_port_update: 1387 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1388 atomic_set(&vha->loop_state, LOOP_DOWN); 1389 atomic_set(&vha->loop_down_timer, 1390 LOOP_DOWN_TIME); 1391 vha->device_flags |= DFLG_NO_CABLE; 1392 qla2x00_mark_all_devices_lost(vha); 1393 } 1394 1395 if (vha->vp_idx) { 1396 atomic_set(&vha->vp_state, VP_FAILED); 1397 fc_vport_set_state(vha->fc_vport, 1398 FC_VPORT_FAILED); 1399 qla2x00_mark_all_devices_lost(vha); 1400 } 1401 1402 vha->flags.management_server_logged_in = 0; 1403 ha->link_data_rate = PORT_SPEED_UNKNOWN; 1404 break; 1405 } 1406 1407 /* 1408 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET 1409 * event etc. earlier indicating loop is down) then process 1410 * it. Otherwise ignore it and Wait for RSCN to come in. 1411 */ 1412 atomic_set(&vha->loop_down_timer, 0); 1413 if (atomic_read(&vha->loop_state) != LOOP_DOWN && 1414 !ha->flags.n2n_ae && 1415 atomic_read(&vha->loop_state) != LOOP_DEAD) { 1416 ql_dbg(ql_dbg_async, vha, 0x5011, 1417 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n", 1418 mb[1], mb[2], mb[3]); 1419 break; 1420 } 1421 1422 ql_dbg(ql_dbg_async, vha, 0x5012, 1423 "Port database changed %04x %04x %04x.\n", 1424 mb[1], mb[2], mb[3]); 1425 1426 /* 1427 * Mark all devices as missing so we will login again. 1428 */ 1429 atomic_set(&vha->loop_state, LOOP_UP); 1430 vha->scan.scan_retry = 0; 1431 1432 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1433 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1434 set_bit(VP_CONFIG_OK, &vha->vp_flags); 1435 break; 1436 1437 case MBA_RSCN_UPDATE: /* State Change Registration */ 1438 /* Check if the Vport has issued a SCR */ 1439 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags)) 1440 break; 1441 /* Only handle SCNs for our Vport index. */ 1442 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff)) 1443 break; 1444 1445 ql_dbg(ql_dbg_async, vha, 0x5013, 1446 "RSCN database changed -- %04x %04x %04x.\n", 1447 mb[1], mb[2], mb[3]); 1448 1449 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2]; 1450 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8) 1451 | vha->d_id.b.al_pa; 1452 if (rscn_entry == host_pid) { 1453 ql_dbg(ql_dbg_async, vha, 0x5014, 1454 "Ignoring RSCN update to local host " 1455 "port ID (%06x).\n", host_pid); 1456 break; 1457 } 1458 1459 /* Ignore reserved bits from RSCN-payload. */ 1460 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2]; 1461 1462 /* Skip RSCNs for virtual ports on the same physical port */ 1463 if (qla2x00_is_a_vp_did(vha, rscn_entry)) 1464 break; 1465 1466 atomic_set(&vha->loop_down_timer, 0); 1467 vha->flags.management_server_logged_in = 0; 1468 { 1469 struct event_arg ea; 1470 1471 memset(&ea, 0, sizeof(ea)); 1472 ea.id.b24 = rscn_entry; 1473 ea.id.b.rsvd_1 = rscn_entry >> 24; 1474 qla2x00_handle_rscn(vha, &ea); 1475 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry); 1476 } 1477 break; 1478 case MBA_CONGN_NOTI_RECV: 1479 if (!ha->flags.scm_enabled || 1480 mb[1] != QLA_CON_PRIMITIVE_RECEIVED) 1481 break; 1482 1483 if (mb[2] == QLA_CONGESTION_ARB_WARNING) { 1484 ql_dbg(ql_dbg_async, vha, 0x509b, 1485 "Congestion Warning %04x %04x.\n", mb[1], mb[2]); 1486 } else if (mb[2] == QLA_CONGESTION_ARB_ALARM) { 1487 ql_log(ql_log_warn, vha, 0x509b, 1488 "Congestion Alarm %04x %04x.\n", mb[1], mb[2]); 1489 } 1490 break; 1491 /* case MBA_RIO_RESPONSE: */ 1492 case MBA_ZIO_RESPONSE: 1493 ql_dbg(ql_dbg_async, vha, 0x5015, 1494 "[R|Z]IO update completion.\n"); 1495 1496 if (IS_FWI2_CAPABLE(ha)) 1497 qla24xx_process_response_queue(vha, rsp); 1498 else 1499 qla2x00_process_response_queue(rsp); 1500 break; 1501 1502 case MBA_DISCARD_RND_FRAME: 1503 ql_dbg(ql_dbg_async, vha, 0x5016, 1504 "Discard RND Frame -- %04x %04x %04x.\n", 1505 mb[1], mb[2], mb[3]); 1506 break; 1507 1508 case MBA_TRACE_NOTIFICATION: 1509 ql_dbg(ql_dbg_async, vha, 0x5017, 1510 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]); 1511 break; 1512 1513 case MBA_ISP84XX_ALERT: 1514 ql_dbg(ql_dbg_async, vha, 0x5018, 1515 "ISP84XX Alert Notification -- %04x %04x %04x.\n", 1516 mb[1], mb[2], mb[3]); 1517 1518 spin_lock_irqsave(&ha->cs84xx->access_lock, flags); 1519 switch (mb[1]) { 1520 case A84_PANIC_RECOVERY: 1521 ql_log(ql_log_info, vha, 0x5019, 1522 "Alert 84XX: panic recovery %04x %04x.\n", 1523 mb[2], mb[3]); 1524 break; 1525 case A84_OP_LOGIN_COMPLETE: 1526 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; 1527 ql_log(ql_log_info, vha, 0x501a, 1528 "Alert 84XX: firmware version %x.\n", 1529 ha->cs84xx->op_fw_version); 1530 break; 1531 case A84_DIAG_LOGIN_COMPLETE: 1532 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; 1533 ql_log(ql_log_info, vha, 0x501b, 1534 "Alert 84XX: diagnostic firmware version %x.\n", 1535 ha->cs84xx->diag_fw_version); 1536 break; 1537 case A84_GOLD_LOGIN_COMPLETE: 1538 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; 1539 ha->cs84xx->fw_update = 1; 1540 ql_log(ql_log_info, vha, 0x501c, 1541 "Alert 84XX: gold firmware version %x.\n", 1542 ha->cs84xx->gold_fw_version); 1543 break; 1544 default: 1545 ql_log(ql_log_warn, vha, 0x501d, 1546 "Alert 84xx: Invalid Alert %04x %04x %04x.\n", 1547 mb[1], mb[2], mb[3]); 1548 } 1549 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); 1550 break; 1551 case MBA_DCBX_START: 1552 ql_dbg(ql_dbg_async, vha, 0x501e, 1553 "DCBX Started -- %04x %04x %04x.\n", 1554 mb[1], mb[2], mb[3]); 1555 break; 1556 case MBA_DCBX_PARAM_UPDATE: 1557 ql_dbg(ql_dbg_async, vha, 0x501f, 1558 "DCBX Parameters Updated -- %04x %04x %04x.\n", 1559 mb[1], mb[2], mb[3]); 1560 break; 1561 case MBA_FCF_CONF_ERR: 1562 ql_dbg(ql_dbg_async, vha, 0x5020, 1563 "FCF Configuration Error -- %04x %04x %04x.\n", 1564 mb[1], mb[2], mb[3]); 1565 break; 1566 case MBA_IDC_NOTIFY: 1567 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { 1568 mb[4] = rd_reg_word(®24->mailbox4); 1569 if (((mb[2] & 0x7fff) == MBC_PORT_RESET || 1570 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) && 1571 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) { 1572 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); 1573 /* 1574 * Extend loop down timer since port is active. 1575 */ 1576 if (atomic_read(&vha->loop_state) == LOOP_DOWN) 1577 atomic_set(&vha->loop_down_timer, 1578 LOOP_DOWN_TIME); 1579 qla2xxx_wake_dpc(vha); 1580 } 1581 } 1582 fallthrough; 1583 case MBA_IDC_COMPLETE: 1584 if (ha->notify_lb_portup_comp && !vha->vp_idx) 1585 complete(&ha->lb_portup_comp); 1586 fallthrough; 1587 case MBA_IDC_TIME_EXT: 1588 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || 1589 IS_QLA8044(ha)) 1590 qla81xx_idc_event(vha, mb[0], mb[1]); 1591 break; 1592 1593 case MBA_IDC_AEN: 1594 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1595 qla27xx_handle_8200_aen(vha, mb); 1596 } else if (IS_QLA83XX(ha)) { 1597 mb[4] = rd_reg_word(®24->mailbox4); 1598 mb[5] = rd_reg_word(®24->mailbox5); 1599 mb[6] = rd_reg_word(®24->mailbox6); 1600 mb[7] = rd_reg_word(®24->mailbox7); 1601 qla83xx_handle_8200_aen(vha, mb); 1602 } else { 1603 ql_dbg(ql_dbg_async, vha, 0x5052, 1604 "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n", 1605 mb[0], mb[1], mb[2], mb[3]); 1606 } 1607 break; 1608 1609 case MBA_DPORT_DIAGNOSTICS: 1610 ql_dbg(ql_dbg_async, vha, 0x5052, 1611 "D-Port Diagnostics: %04x %04x %04x %04x\n", 1612 mb[0], mb[1], mb[2], mb[3]); 1613 memcpy(vha->dport_data, mb, sizeof(vha->dport_data)); 1614 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1615 static char *results[] = { 1616 "start", "done(pass)", "done(error)", "undefined" }; 1617 static char *types[] = { 1618 "none", "dynamic", "static", "other" }; 1619 uint result = mb[1] >> 0 & 0x3; 1620 uint type = mb[1] >> 6 & 0x3; 1621 uint sw = mb[1] >> 15 & 0x1; 1622 ql_dbg(ql_dbg_async, vha, 0x5052, 1623 "D-Port Diagnostics: result=%s type=%s [sw=%u]\n", 1624 results[result], types[type], sw); 1625 if (result == 2) { 1626 static char *reasons[] = { 1627 "reserved", "unexpected reject", 1628 "unexpected phase", "retry exceeded", 1629 "timed out", "not supported", 1630 "user stopped" }; 1631 uint reason = mb[2] >> 0 & 0xf; 1632 uint phase = mb[2] >> 12 & 0xf; 1633 ql_dbg(ql_dbg_async, vha, 0x5052, 1634 "D-Port Diagnostics: reason=%s phase=%u \n", 1635 reason < 7 ? reasons[reason] : "other", 1636 phase >> 1); 1637 } 1638 } 1639 break; 1640 1641 case MBA_TEMPERATURE_ALERT: 1642 ql_dbg(ql_dbg_async, vha, 0x505e, 1643 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]); 1644 if (mb[1] == 0x12) 1645 schedule_work(&ha->board_disable); 1646 break; 1647 1648 case MBA_TRANS_INSERT: 1649 ql_dbg(ql_dbg_async, vha, 0x5091, 1650 "Transceiver Insertion: %04x\n", mb[1]); 1651 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags); 1652 break; 1653 1654 case MBA_TRANS_REMOVE: 1655 ql_dbg(ql_dbg_async, vha, 0x5091, "Transceiver Removal\n"); 1656 break; 1657 1658 default: 1659 ql_dbg(ql_dbg_async, vha, 0x5057, 1660 "Unknown AEN:%04x %04x %04x %04x\n", 1661 mb[0], mb[1], mb[2], mb[3]); 1662 } 1663 1664 qlt_async_event(mb[0], vha, mb); 1665 1666 if (!vha->vp_idx && ha->num_vhosts) 1667 qla2x00_alert_all_vps(rsp, mb); 1668 } 1669 1670 /** 1671 * qla2x00_process_completed_request() - Process a Fast Post response. 1672 * @vha: SCSI driver HA context 1673 * @req: request queue 1674 * @index: SRB index 1675 */ 1676 void 1677 qla2x00_process_completed_request(struct scsi_qla_host *vha, 1678 struct req_que *req, uint32_t index) 1679 { 1680 srb_t *sp; 1681 struct qla_hw_data *ha = vha->hw; 1682 1683 /* Validate handle. */ 1684 if (index >= req->num_outstanding_cmds) { 1685 ql_log(ql_log_warn, vha, 0x3014, 1686 "Invalid SCSI command index (%x).\n", index); 1687 1688 if (IS_P3P_TYPE(ha)) 1689 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1690 else 1691 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1692 return; 1693 } 1694 1695 sp = req->outstanding_cmds[index]; 1696 if (sp) { 1697 /* Free outstanding command slot. */ 1698 req->outstanding_cmds[index] = NULL; 1699 1700 /* Save ISP completion status */ 1701 sp->done(sp, DID_OK << 16); 1702 } else { 1703 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n"); 1704 1705 if (IS_P3P_TYPE(ha)) 1706 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1707 else 1708 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1709 } 1710 } 1711 1712 srb_t * 1713 qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func, 1714 struct req_que *req, void *iocb) 1715 { 1716 struct qla_hw_data *ha = vha->hw; 1717 sts_entry_t *pkt = iocb; 1718 srb_t *sp; 1719 uint16_t index; 1720 1721 index = LSW(pkt->handle); 1722 if (index >= req->num_outstanding_cmds) { 1723 ql_log(ql_log_warn, vha, 0x5031, 1724 "%s: Invalid command index (%x) type %8ph.\n", 1725 func, index, iocb); 1726 if (IS_P3P_TYPE(ha)) 1727 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1728 else 1729 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1730 return NULL; 1731 } 1732 sp = req->outstanding_cmds[index]; 1733 if (!sp) { 1734 ql_log(ql_log_warn, vha, 0x5032, 1735 "%s: Invalid completion handle (%x) -- timed-out.\n", 1736 func, index); 1737 return NULL; 1738 } 1739 if (sp->handle != index) { 1740 ql_log(ql_log_warn, vha, 0x5033, 1741 "%s: SRB handle (%x) mismatch %x.\n", func, 1742 sp->handle, index); 1743 return NULL; 1744 } 1745 1746 req->outstanding_cmds[index] = NULL; 1747 return sp; 1748 } 1749 1750 static void 1751 qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 1752 struct mbx_entry *mbx) 1753 { 1754 const char func[] = "MBX-IOCB"; 1755 const char *type; 1756 fc_port_t *fcport; 1757 srb_t *sp; 1758 struct srb_iocb *lio; 1759 uint16_t *data; 1760 uint16_t status; 1761 1762 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx); 1763 if (!sp) 1764 return; 1765 1766 lio = &sp->u.iocb_cmd; 1767 type = sp->name; 1768 fcport = sp->fcport; 1769 data = lio->u.logio.data; 1770 1771 data[0] = MBS_COMMAND_ERROR; 1772 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 1773 QLA_LOGIO_LOGIN_RETRIED : 0; 1774 if (mbx->entry_status) { 1775 ql_dbg(ql_dbg_async, vha, 0x5043, 1776 "Async-%s error entry - hdl=%x portid=%02x%02x%02x " 1777 "entry-status=%x status=%x state-flag=%x " 1778 "status-flags=%x.\n", type, sp->handle, 1779 fcport->d_id.b.domain, fcport->d_id.b.area, 1780 fcport->d_id.b.al_pa, mbx->entry_status, 1781 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags), 1782 le16_to_cpu(mbx->status_flags)); 1783 1784 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029, 1785 mbx, sizeof(*mbx)); 1786 1787 goto logio_done; 1788 } 1789 1790 status = le16_to_cpu(mbx->status); 1791 if (status == 0x30 && sp->type == SRB_LOGIN_CMD && 1792 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) 1793 status = 0; 1794 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) { 1795 ql_dbg(ql_dbg_async, vha, 0x5045, 1796 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n", 1797 type, sp->handle, fcport->d_id.b.domain, 1798 fcport->d_id.b.area, fcport->d_id.b.al_pa, 1799 le16_to_cpu(mbx->mb1)); 1800 1801 data[0] = MBS_COMMAND_COMPLETE; 1802 if (sp->type == SRB_LOGIN_CMD) { 1803 fcport->port_type = FCT_TARGET; 1804 if (le16_to_cpu(mbx->mb1) & BIT_0) 1805 fcport->port_type = FCT_INITIATOR; 1806 else if (le16_to_cpu(mbx->mb1) & BIT_1) 1807 fcport->flags |= FCF_FCP2_DEVICE; 1808 } 1809 goto logio_done; 1810 } 1811 1812 data[0] = le16_to_cpu(mbx->mb0); 1813 switch (data[0]) { 1814 case MBS_PORT_ID_USED: 1815 data[1] = le16_to_cpu(mbx->mb1); 1816 break; 1817 case MBS_LOOP_ID_USED: 1818 break; 1819 default: 1820 data[0] = MBS_COMMAND_ERROR; 1821 break; 1822 } 1823 1824 ql_log(ql_log_warn, vha, 0x5046, 1825 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x " 1826 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle, 1827 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 1828 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1), 1829 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6), 1830 le16_to_cpu(mbx->mb7)); 1831 1832 logio_done: 1833 sp->done(sp, 0); 1834 } 1835 1836 static void 1837 qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 1838 struct mbx_24xx_entry *pkt) 1839 { 1840 const char func[] = "MBX-IOCB2"; 1841 struct qla_hw_data *ha = vha->hw; 1842 srb_t *sp; 1843 struct srb_iocb *si; 1844 u16 sz, i; 1845 int res; 1846 1847 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 1848 if (!sp) 1849 return; 1850 1851 if (sp->type == SRB_SCSI_CMD || 1852 sp->type == SRB_NVME_CMD || 1853 sp->type == SRB_TM_CMD) { 1854 ql_log(ql_log_warn, vha, 0x509d, 1855 "Inconsistent event entry type %d\n", sp->type); 1856 if (IS_P3P_TYPE(ha)) 1857 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1858 else 1859 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1860 return; 1861 } 1862 1863 si = &sp->u.iocb_cmd; 1864 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb)); 1865 1866 for (i = 0; i < sz; i++) 1867 si->u.mbx.in_mb[i] = pkt->mb[i]; 1868 1869 res = (si->u.mbx.in_mb[0] & MBS_MASK); 1870 1871 sp->done(sp, res); 1872 } 1873 1874 static void 1875 qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 1876 struct nack_to_isp *pkt) 1877 { 1878 const char func[] = "nack"; 1879 srb_t *sp; 1880 int res = 0; 1881 1882 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 1883 if (!sp) 1884 return; 1885 1886 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS)) 1887 res = QLA_FUNCTION_FAILED; 1888 1889 sp->done(sp, res); 1890 } 1891 1892 static void 1893 qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req, 1894 sts_entry_t *pkt, int iocb_type) 1895 { 1896 const char func[] = "CT_IOCB"; 1897 const char *type; 1898 srb_t *sp; 1899 struct bsg_job *bsg_job; 1900 struct fc_bsg_reply *bsg_reply; 1901 uint16_t comp_status; 1902 int res = 0; 1903 1904 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 1905 if (!sp) 1906 return; 1907 1908 switch (sp->type) { 1909 case SRB_CT_CMD: 1910 bsg_job = sp->u.bsg_job; 1911 bsg_reply = bsg_job->reply; 1912 1913 type = "ct pass-through"; 1914 1915 comp_status = le16_to_cpu(pkt->comp_status); 1916 1917 /* 1918 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT 1919 * fc payload to the caller 1920 */ 1921 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; 1922 bsg_job->reply_len = sizeof(struct fc_bsg_reply); 1923 1924 if (comp_status != CS_COMPLETE) { 1925 if (comp_status == CS_DATA_UNDERRUN) { 1926 res = DID_OK << 16; 1927 bsg_reply->reply_payload_rcv_len = 1928 le16_to_cpu(pkt->rsp_info_len); 1929 1930 ql_log(ql_log_warn, vha, 0x5048, 1931 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n", 1932 type, comp_status, 1933 bsg_reply->reply_payload_rcv_len); 1934 } else { 1935 ql_log(ql_log_warn, vha, 0x5049, 1936 "CT pass-through-%s error comp_status=0x%x.\n", 1937 type, comp_status); 1938 res = DID_ERROR << 16; 1939 bsg_reply->reply_payload_rcv_len = 0; 1940 } 1941 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035, 1942 pkt, sizeof(*pkt)); 1943 } else { 1944 res = DID_OK << 16; 1945 bsg_reply->reply_payload_rcv_len = 1946 bsg_job->reply_payload.payload_len; 1947 bsg_job->reply_len = 0; 1948 } 1949 break; 1950 case SRB_CT_PTHRU_CMD: 1951 /* 1952 * borrowing sts_entry_24xx.comp_status. 1953 * same location as ct_entry_24xx.comp_status 1954 */ 1955 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt, 1956 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, 1957 sp->name); 1958 break; 1959 } 1960 1961 sp->done(sp, res); 1962 } 1963 1964 static void 1965 qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req, 1966 struct sts_entry_24xx *pkt, int iocb_type) 1967 { 1968 struct els_sts_entry_24xx *ese = (struct els_sts_entry_24xx *)pkt; 1969 const char func[] = "ELS_CT_IOCB"; 1970 const char *type; 1971 srb_t *sp; 1972 struct bsg_job *bsg_job; 1973 struct fc_bsg_reply *bsg_reply; 1974 uint16_t comp_status; 1975 uint32_t fw_status[3]; 1976 int res; 1977 struct srb_iocb *els; 1978 1979 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 1980 if (!sp) 1981 return; 1982 1983 type = NULL; 1984 switch (sp->type) { 1985 case SRB_ELS_CMD_RPT: 1986 case SRB_ELS_CMD_HST: 1987 type = "els"; 1988 break; 1989 case SRB_CT_CMD: 1990 type = "ct pass-through"; 1991 break; 1992 case SRB_ELS_DCMD: 1993 type = "Driver ELS logo"; 1994 if (iocb_type != ELS_IOCB_TYPE) { 1995 ql_dbg(ql_dbg_user, vha, 0x5047, 1996 "Completing %s: (%p) type=%d.\n", 1997 type, sp, sp->type); 1998 sp->done(sp, 0); 1999 return; 2000 } 2001 break; 2002 case SRB_CT_PTHRU_CMD: 2003 /* borrowing sts_entry_24xx.comp_status. 2004 same location as ct_entry_24xx.comp_status 2005 */ 2006 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt, 2007 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, 2008 sp->name); 2009 sp->done(sp, res); 2010 return; 2011 default: 2012 ql_dbg(ql_dbg_user, vha, 0x503e, 2013 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type); 2014 return; 2015 } 2016 2017 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status); 2018 fw_status[1] = le32_to_cpu(ese->error_subcode_1); 2019 fw_status[2] = le32_to_cpu(ese->error_subcode_2); 2020 2021 if (iocb_type == ELS_IOCB_TYPE) { 2022 els = &sp->u.iocb_cmd; 2023 els->u.els_plogi.fw_status[0] = cpu_to_le32(fw_status[0]); 2024 els->u.els_plogi.fw_status[1] = cpu_to_le32(fw_status[1]); 2025 els->u.els_plogi.fw_status[2] = cpu_to_le32(fw_status[2]); 2026 els->u.els_plogi.comp_status = cpu_to_le16(fw_status[0]); 2027 if (comp_status == CS_COMPLETE) { 2028 res = DID_OK << 16; 2029 } else { 2030 if (comp_status == CS_DATA_UNDERRUN) { 2031 res = DID_OK << 16; 2032 els->u.els_plogi.len = cpu_to_le16(le32_to_cpu( 2033 ese->total_byte_count)); 2034 } else { 2035 els->u.els_plogi.len = 0; 2036 res = DID_ERROR << 16; 2037 } 2038 } 2039 ql_dbg(ql_dbg_disc, vha, 0x503f, 2040 "ELS IOCB Done -%s hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n", 2041 type, sp->handle, comp_status, fw_status[1], fw_status[2], 2042 le32_to_cpu(ese->total_byte_count)); 2043 goto els_ct_done; 2044 } 2045 2046 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT 2047 * fc payload to the caller 2048 */ 2049 bsg_job = sp->u.bsg_job; 2050 bsg_reply = bsg_job->reply; 2051 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; 2052 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status); 2053 2054 if (comp_status != CS_COMPLETE) { 2055 if (comp_status == CS_DATA_UNDERRUN) { 2056 res = DID_OK << 16; 2057 bsg_reply->reply_payload_rcv_len = 2058 le32_to_cpu(ese->total_byte_count); 2059 2060 ql_dbg(ql_dbg_user, vha, 0x503f, 2061 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " 2062 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n", 2063 type, sp->handle, comp_status, fw_status[1], fw_status[2], 2064 le32_to_cpu(ese->total_byte_count)); 2065 } else { 2066 ql_dbg(ql_dbg_user, vha, 0x5040, 2067 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " 2068 "error subcode 1=0x%x error subcode 2=0x%x.\n", 2069 type, sp->handle, comp_status, 2070 le32_to_cpu(ese->error_subcode_1), 2071 le32_to_cpu(ese->error_subcode_2)); 2072 res = DID_ERROR << 16; 2073 bsg_reply->reply_payload_rcv_len = 0; 2074 } 2075 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply), 2076 fw_status, sizeof(fw_status)); 2077 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056, 2078 pkt, sizeof(*pkt)); 2079 } 2080 else { 2081 res = DID_OK << 16; 2082 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len; 2083 bsg_job->reply_len = 0; 2084 } 2085 els_ct_done: 2086 2087 sp->done(sp, res); 2088 } 2089 2090 static void 2091 qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, 2092 struct logio_entry_24xx *logio) 2093 { 2094 const char func[] = "LOGIO-IOCB"; 2095 const char *type; 2096 fc_port_t *fcport; 2097 srb_t *sp; 2098 struct srb_iocb *lio; 2099 uint16_t *data; 2100 uint32_t iop[2]; 2101 2102 sp = qla2x00_get_sp_from_handle(vha, func, req, logio); 2103 if (!sp) 2104 return; 2105 2106 lio = &sp->u.iocb_cmd; 2107 type = sp->name; 2108 fcport = sp->fcport; 2109 data = lio->u.logio.data; 2110 2111 data[0] = MBS_COMMAND_ERROR; 2112 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 2113 QLA_LOGIO_LOGIN_RETRIED : 0; 2114 if (logio->entry_status) { 2115 ql_log(ql_log_warn, fcport->vha, 0x5034, 2116 "Async-%s error entry - %8phC hdl=%x" 2117 "portid=%02x%02x%02x entry-status=%x.\n", 2118 type, fcport->port_name, sp->handle, fcport->d_id.b.domain, 2119 fcport->d_id.b.area, fcport->d_id.b.al_pa, 2120 logio->entry_status); 2121 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d, 2122 logio, sizeof(*logio)); 2123 2124 goto logio_done; 2125 } 2126 2127 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) { 2128 ql_dbg(ql_dbg_async, sp->vha, 0x5036, 2129 "Async-%s complete: handle=%x pid=%06x wwpn=%8phC iop0=%x\n", 2130 type, sp->handle, fcport->d_id.b24, fcport->port_name, 2131 le32_to_cpu(logio->io_parameter[0])); 2132 2133 vha->hw->exch_starvation = 0; 2134 data[0] = MBS_COMMAND_COMPLETE; 2135 2136 if (sp->type == SRB_PRLI_CMD) { 2137 lio->u.logio.iop[0] = 2138 le32_to_cpu(logio->io_parameter[0]); 2139 lio->u.logio.iop[1] = 2140 le32_to_cpu(logio->io_parameter[1]); 2141 goto logio_done; 2142 } 2143 2144 if (sp->type != SRB_LOGIN_CMD) 2145 goto logio_done; 2146 2147 iop[0] = le32_to_cpu(logio->io_parameter[0]); 2148 if (iop[0] & BIT_4) { 2149 fcport->port_type = FCT_TARGET; 2150 if (iop[0] & BIT_8) 2151 fcport->flags |= FCF_FCP2_DEVICE; 2152 } else if (iop[0] & BIT_5) 2153 fcport->port_type = FCT_INITIATOR; 2154 2155 if (iop[0] & BIT_7) 2156 fcport->flags |= FCF_CONF_COMP_SUPPORTED; 2157 2158 if (logio->io_parameter[7] || logio->io_parameter[8]) 2159 fcport->supported_classes |= FC_COS_CLASS2; 2160 if (logio->io_parameter[9] || logio->io_parameter[10]) 2161 fcport->supported_classes |= FC_COS_CLASS3; 2162 2163 goto logio_done; 2164 } 2165 2166 iop[0] = le32_to_cpu(logio->io_parameter[0]); 2167 iop[1] = le32_to_cpu(logio->io_parameter[1]); 2168 lio->u.logio.iop[0] = iop[0]; 2169 lio->u.logio.iop[1] = iop[1]; 2170 switch (iop[0]) { 2171 case LSC_SCODE_PORTID_USED: 2172 data[0] = MBS_PORT_ID_USED; 2173 data[1] = LSW(iop[1]); 2174 break; 2175 case LSC_SCODE_NPORT_USED: 2176 data[0] = MBS_LOOP_ID_USED; 2177 break; 2178 case LSC_SCODE_CMD_FAILED: 2179 if (iop[1] == 0x0606) { 2180 /* 2181 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI, 2182 * Target side acked. 2183 */ 2184 data[0] = MBS_COMMAND_COMPLETE; 2185 goto logio_done; 2186 } 2187 data[0] = MBS_COMMAND_ERROR; 2188 break; 2189 case LSC_SCODE_NOXCB: 2190 vha->hw->exch_starvation++; 2191 if (vha->hw->exch_starvation > 5) { 2192 ql_log(ql_log_warn, vha, 0xd046, 2193 "Exchange starvation. Resetting RISC\n"); 2194 2195 vha->hw->exch_starvation = 0; 2196 2197 if (IS_P3P_TYPE(vha->hw)) 2198 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 2199 else 2200 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2201 qla2xxx_wake_dpc(vha); 2202 } 2203 fallthrough; 2204 default: 2205 data[0] = MBS_COMMAND_ERROR; 2206 break; 2207 } 2208 2209 ql_dbg(ql_dbg_async, sp->vha, 0x5037, 2210 "Async-%s failed: handle=%x pid=%06x wwpn=%8phC comp_status=%x iop0=%x iop1=%x\n", 2211 type, sp->handle, fcport->d_id.b24, fcport->port_name, 2212 le16_to_cpu(logio->comp_status), 2213 le32_to_cpu(logio->io_parameter[0]), 2214 le32_to_cpu(logio->io_parameter[1])); 2215 2216 logio_done: 2217 sp->done(sp, 0); 2218 } 2219 2220 static void 2221 qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk) 2222 { 2223 const char func[] = "TMF-IOCB"; 2224 const char *type; 2225 fc_port_t *fcport; 2226 srb_t *sp; 2227 struct srb_iocb *iocb; 2228 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; 2229 u16 comp_status; 2230 2231 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk); 2232 if (!sp) 2233 return; 2234 2235 comp_status = le16_to_cpu(sts->comp_status); 2236 iocb = &sp->u.iocb_cmd; 2237 type = sp->name; 2238 fcport = sp->fcport; 2239 iocb->u.tmf.data = QLA_SUCCESS; 2240 2241 if (sts->entry_status) { 2242 ql_log(ql_log_warn, fcport->vha, 0x5038, 2243 "Async-%s error - hdl=%x entry-status(%x).\n", 2244 type, sp->handle, sts->entry_status); 2245 iocb->u.tmf.data = QLA_FUNCTION_FAILED; 2246 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) { 2247 ql_log(ql_log_warn, fcport->vha, 0x5039, 2248 "Async-%s error - hdl=%x completion status(%x).\n", 2249 type, sp->handle, comp_status); 2250 iocb->u.tmf.data = QLA_FUNCTION_FAILED; 2251 } else if ((le16_to_cpu(sts->scsi_status) & 2252 SS_RESPONSE_INFO_LEN_VALID)) { 2253 if (le32_to_cpu(sts->rsp_data_len) < 4) { 2254 ql_log(ql_log_warn, fcport->vha, 0x503b, 2255 "Async-%s error - hdl=%x not enough response(%d).\n", 2256 type, sp->handle, sts->rsp_data_len); 2257 } else if (sts->data[3]) { 2258 ql_log(ql_log_warn, fcport->vha, 0x503c, 2259 "Async-%s error - hdl=%x response(%x).\n", 2260 type, sp->handle, sts->data[3]); 2261 iocb->u.tmf.data = QLA_FUNCTION_FAILED; 2262 } 2263 } 2264 2265 switch (comp_status) { 2266 case CS_PORT_LOGGED_OUT: 2267 case CS_PORT_CONFIG_CHG: 2268 case CS_PORT_BUSY: 2269 case CS_INCOMPLETE: 2270 case CS_PORT_UNAVAILABLE: 2271 case CS_TIMEOUT: 2272 case CS_RESET: 2273 if (atomic_read(&fcport->state) == FCS_ONLINE) { 2274 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021, 2275 "-Port to be marked lost on fcport=%02x%02x%02x, current port state= %s comp_status %x.\n", 2276 fcport->d_id.b.domain, fcport->d_id.b.area, 2277 fcport->d_id.b.al_pa, 2278 port_state_str[FCS_ONLINE], 2279 comp_status); 2280 2281 qlt_schedule_sess_for_deletion(fcport); 2282 } 2283 break; 2284 2285 default: 2286 break; 2287 } 2288 2289 if (iocb->u.tmf.data != QLA_SUCCESS) 2290 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055, 2291 sts, sizeof(*sts)); 2292 2293 sp->done(sp, 0); 2294 } 2295 2296 static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2297 void *tsk, srb_t *sp) 2298 { 2299 fc_port_t *fcport; 2300 struct srb_iocb *iocb; 2301 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; 2302 uint16_t state_flags; 2303 struct nvmefc_fcp_req *fd; 2304 uint16_t ret = QLA_SUCCESS; 2305 __le16 comp_status = sts->comp_status; 2306 int logit = 0; 2307 2308 iocb = &sp->u.iocb_cmd; 2309 fcport = sp->fcport; 2310 iocb->u.nvme.comp_status = comp_status; 2311 state_flags = le16_to_cpu(sts->state_flags); 2312 fd = iocb->u.nvme.desc; 2313 2314 if (unlikely(iocb->u.nvme.aen_op)) 2315 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt); 2316 2317 if (unlikely(comp_status != CS_COMPLETE)) 2318 logit = 1; 2319 2320 fd->transferred_length = fd->payload_length - 2321 le32_to_cpu(sts->residual_len); 2322 2323 /* 2324 * State flags: Bit 6 and 0. 2325 * If 0 is set, we don't care about 6. 2326 * both cases resp was dma'd to host buffer 2327 * if both are 0, that is good path case. 2328 * if six is set and 0 is clear, we need to 2329 * copy resp data from status iocb to resp buffer. 2330 */ 2331 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) { 2332 iocb->u.nvme.rsp_pyld_len = 0; 2333 } else if ((state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP)) == 2334 (SF_FCP_RSP_DMA | SF_NVME_ERSP)) { 2335 /* Response already DMA'd to fd->rspaddr. */ 2336 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len; 2337 } else if ((state_flags & SF_FCP_RSP_DMA)) { 2338 /* 2339 * Non-zero value in first 12 bytes of NVMe_RSP IU, treat this 2340 * as an error. 2341 */ 2342 iocb->u.nvme.rsp_pyld_len = 0; 2343 fd->transferred_length = 0; 2344 ql_dbg(ql_dbg_io, fcport->vha, 0x307a, 2345 "Unexpected values in NVMe_RSP IU.\n"); 2346 logit = 1; 2347 } else if (state_flags & SF_NVME_ERSP) { 2348 uint32_t *inbuf, *outbuf; 2349 uint16_t iter; 2350 2351 inbuf = (uint32_t *)&sts->nvme_ersp_data; 2352 outbuf = (uint32_t *)fd->rspaddr; 2353 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len; 2354 if (unlikely(le16_to_cpu(iocb->u.nvme.rsp_pyld_len) > 2355 sizeof(struct nvme_fc_ersp_iu))) { 2356 if (ql_mask_match(ql_dbg_io)) { 2357 WARN_ONCE(1, "Unexpected response payload length %u.\n", 2358 iocb->u.nvme.rsp_pyld_len); 2359 ql_log(ql_log_warn, fcport->vha, 0x5100, 2360 "Unexpected response payload length %u.\n", 2361 iocb->u.nvme.rsp_pyld_len); 2362 } 2363 iocb->u.nvme.rsp_pyld_len = 2364 cpu_to_le16(sizeof(struct nvme_fc_ersp_iu)); 2365 } 2366 iter = le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >> 2; 2367 for (; iter; iter--) 2368 *outbuf++ = swab32(*inbuf++); 2369 } 2370 2371 if (state_flags & SF_NVME_ERSP) { 2372 struct nvme_fc_ersp_iu *rsp_iu = fd->rspaddr; 2373 u32 tgt_xfer_len; 2374 2375 tgt_xfer_len = be32_to_cpu(rsp_iu->xfrd_len); 2376 if (fd->transferred_length != tgt_xfer_len) { 2377 ql_dbg(ql_dbg_io, fcport->vha, 0x3079, 2378 "Dropped frame(s) detected (sent/rcvd=%u/%u).\n", 2379 tgt_xfer_len, fd->transferred_length); 2380 logit = 1; 2381 } else if (le16_to_cpu(comp_status) == CS_DATA_UNDERRUN) { 2382 /* 2383 * Do not log if this is just an underflow and there 2384 * is no data loss. 2385 */ 2386 logit = 0; 2387 } 2388 } 2389 2390 if (unlikely(logit)) 2391 ql_log(ql_log_warn, fcport->vha, 0x5060, 2392 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n", 2393 sp->name, sp->handle, comp_status, 2394 fd->transferred_length, le32_to_cpu(sts->residual_len), 2395 sts->ox_id); 2396 2397 /* 2398 * If transport error then Failure (HBA rejects request) 2399 * otherwise transport will handle. 2400 */ 2401 switch (le16_to_cpu(comp_status)) { 2402 case CS_COMPLETE: 2403 break; 2404 2405 case CS_RESET: 2406 case CS_PORT_UNAVAILABLE: 2407 case CS_PORT_LOGGED_OUT: 2408 fcport->nvme_flag |= NVME_FLAG_RESETTING; 2409 fallthrough; 2410 case CS_ABORTED: 2411 case CS_PORT_BUSY: 2412 fd->transferred_length = 0; 2413 iocb->u.nvme.rsp_pyld_len = 0; 2414 ret = QLA_ABORTED; 2415 break; 2416 case CS_DATA_UNDERRUN: 2417 break; 2418 default: 2419 ret = QLA_FUNCTION_FAILED; 2420 break; 2421 } 2422 sp->done(sp, ret); 2423 } 2424 2425 static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req, 2426 struct vp_ctrl_entry_24xx *vce) 2427 { 2428 const char func[] = "CTRLVP-IOCB"; 2429 srb_t *sp; 2430 int rval = QLA_SUCCESS; 2431 2432 sp = qla2x00_get_sp_from_handle(vha, func, req, vce); 2433 if (!sp) 2434 return; 2435 2436 if (vce->entry_status != 0) { 2437 ql_dbg(ql_dbg_vport, vha, 0x10c4, 2438 "%s: Failed to complete IOCB -- error status (%x)\n", 2439 sp->name, vce->entry_status); 2440 rval = QLA_FUNCTION_FAILED; 2441 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { 2442 ql_dbg(ql_dbg_vport, vha, 0x10c5, 2443 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n", 2444 sp->name, le16_to_cpu(vce->comp_status), 2445 le16_to_cpu(vce->vp_idx_failed)); 2446 rval = QLA_FUNCTION_FAILED; 2447 } else { 2448 ql_dbg(ql_dbg_vport, vha, 0x10c6, 2449 "Done %s.\n", __func__); 2450 } 2451 2452 sp->rc = rval; 2453 sp->done(sp, rval); 2454 } 2455 2456 /* Process a single response queue entry. */ 2457 static void qla2x00_process_response_entry(struct scsi_qla_host *vha, 2458 struct rsp_que *rsp, 2459 sts_entry_t *pkt) 2460 { 2461 sts21_entry_t *sts21_entry; 2462 sts22_entry_t *sts22_entry; 2463 uint16_t handle_cnt; 2464 uint16_t cnt; 2465 2466 switch (pkt->entry_type) { 2467 case STATUS_TYPE: 2468 qla2x00_status_entry(vha, rsp, pkt); 2469 break; 2470 case STATUS_TYPE_21: 2471 sts21_entry = (sts21_entry_t *)pkt; 2472 handle_cnt = sts21_entry->handle_count; 2473 for (cnt = 0; cnt < handle_cnt; cnt++) 2474 qla2x00_process_completed_request(vha, rsp->req, 2475 sts21_entry->handle[cnt]); 2476 break; 2477 case STATUS_TYPE_22: 2478 sts22_entry = (sts22_entry_t *)pkt; 2479 handle_cnt = sts22_entry->handle_count; 2480 for (cnt = 0; cnt < handle_cnt; cnt++) 2481 qla2x00_process_completed_request(vha, rsp->req, 2482 sts22_entry->handle[cnt]); 2483 break; 2484 case STATUS_CONT_TYPE: 2485 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); 2486 break; 2487 case MBX_IOCB_TYPE: 2488 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt); 2489 break; 2490 case CT_IOCB_TYPE: 2491 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); 2492 break; 2493 default: 2494 /* Type Not Supported. */ 2495 ql_log(ql_log_warn, vha, 0x504a, 2496 "Received unknown response pkt type %x entry status=%x.\n", 2497 pkt->entry_type, pkt->entry_status); 2498 break; 2499 } 2500 } 2501 2502 /** 2503 * qla2x00_process_response_queue() - Process response queue entries. 2504 * @rsp: response queue 2505 */ 2506 void 2507 qla2x00_process_response_queue(struct rsp_que *rsp) 2508 { 2509 struct scsi_qla_host *vha; 2510 struct qla_hw_data *ha = rsp->hw; 2511 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2512 sts_entry_t *pkt; 2513 2514 vha = pci_get_drvdata(ha->pdev); 2515 2516 if (!vha->flags.online) 2517 return; 2518 2519 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { 2520 pkt = (sts_entry_t *)rsp->ring_ptr; 2521 2522 rsp->ring_index++; 2523 if (rsp->ring_index == rsp->length) { 2524 rsp->ring_index = 0; 2525 rsp->ring_ptr = rsp->ring; 2526 } else { 2527 rsp->ring_ptr++; 2528 } 2529 2530 if (pkt->entry_status != 0) { 2531 qla2x00_error_entry(vha, rsp, pkt); 2532 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 2533 wmb(); 2534 continue; 2535 } 2536 2537 qla2x00_process_response_entry(vha, rsp, pkt); 2538 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 2539 wmb(); 2540 } 2541 2542 /* Adjust ring index */ 2543 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); 2544 } 2545 2546 static inline void 2547 qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, 2548 uint32_t sense_len, struct rsp_que *rsp, int res) 2549 { 2550 struct scsi_qla_host *vha = sp->vha; 2551 struct scsi_cmnd *cp = GET_CMD_SP(sp); 2552 uint32_t track_sense_len; 2553 2554 if (sense_len >= SCSI_SENSE_BUFFERSIZE) 2555 sense_len = SCSI_SENSE_BUFFERSIZE; 2556 2557 SET_CMD_SENSE_LEN(sp, sense_len); 2558 SET_CMD_SENSE_PTR(sp, cp->sense_buffer); 2559 track_sense_len = sense_len; 2560 2561 if (sense_len > par_sense_len) 2562 sense_len = par_sense_len; 2563 2564 memcpy(cp->sense_buffer, sense_data, sense_len); 2565 2566 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); 2567 track_sense_len -= sense_len; 2568 SET_CMD_SENSE_LEN(sp, track_sense_len); 2569 2570 if (track_sense_len != 0) { 2571 rsp->status_srb = sp; 2572 cp->result = res; 2573 } 2574 2575 if (sense_len) { 2576 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c, 2577 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n", 2578 sp->vha->host_no, cp->device->id, cp->device->lun, 2579 cp); 2580 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b, 2581 cp->sense_buffer, sense_len); 2582 } 2583 } 2584 2585 struct scsi_dif_tuple { 2586 __be16 guard; /* Checksum */ 2587 __be16 app_tag; /* APPL identifier */ 2588 __be32 ref_tag; /* Target LBA or indirect LBA */ 2589 }; 2590 2591 /* 2592 * Checks the guard or meta-data for the type of error 2593 * detected by the HBA. In case of errors, we set the 2594 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST 2595 * to indicate to the kernel that the HBA detected error. 2596 */ 2597 static inline int 2598 qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) 2599 { 2600 struct scsi_qla_host *vha = sp->vha; 2601 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 2602 uint8_t *ap = &sts24->data[12]; 2603 uint8_t *ep = &sts24->data[20]; 2604 uint32_t e_ref_tag, a_ref_tag; 2605 uint16_t e_app_tag, a_app_tag; 2606 uint16_t e_guard, a_guard; 2607 2608 /* 2609 * swab32 of the "data" field in the beginning of qla2x00_status_entry() 2610 * would make guard field appear at offset 2 2611 */ 2612 a_guard = get_unaligned_le16(ap + 2); 2613 a_app_tag = get_unaligned_le16(ap + 0); 2614 a_ref_tag = get_unaligned_le32(ap + 4); 2615 e_guard = get_unaligned_le16(ep + 2); 2616 e_app_tag = get_unaligned_le16(ep + 0); 2617 e_ref_tag = get_unaligned_le32(ep + 4); 2618 2619 ql_dbg(ql_dbg_io, vha, 0x3023, 2620 "iocb(s) %p Returned STATUS.\n", sts24); 2621 2622 ql_dbg(ql_dbg_io, vha, 0x3024, 2623 "DIF ERROR in cmd 0x%x lba 0x%llx act ref" 2624 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app" 2625 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n", 2626 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, 2627 a_app_tag, e_app_tag, a_guard, e_guard); 2628 2629 /* 2630 * Ignore sector if: 2631 * For type 3: ref & app tag is all 'f's 2632 * For type 0,1,2: app tag is all 'f's 2633 */ 2634 if (a_app_tag == be16_to_cpu(T10_PI_APP_ESCAPE) && 2635 (scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3 || 2636 a_ref_tag == be32_to_cpu(T10_PI_REF_ESCAPE))) { 2637 uint32_t blocks_done, resid; 2638 sector_t lba_s = scsi_get_lba(cmd); 2639 2640 /* 2TB boundary case covered automatically with this */ 2641 blocks_done = e_ref_tag - (uint32_t)lba_s + 1; 2642 2643 resid = scsi_bufflen(cmd) - (blocks_done * 2644 cmd->device->sector_size); 2645 2646 scsi_set_resid(cmd, resid); 2647 cmd->result = DID_OK << 16; 2648 2649 /* Update protection tag */ 2650 if (scsi_prot_sg_count(cmd)) { 2651 uint32_t i, j = 0, k = 0, num_ent; 2652 struct scatterlist *sg; 2653 struct t10_pi_tuple *spt; 2654 2655 /* Patch the corresponding protection tags */ 2656 scsi_for_each_prot_sg(cmd, sg, 2657 scsi_prot_sg_count(cmd), i) { 2658 num_ent = sg_dma_len(sg) / 8; 2659 if (k + num_ent < blocks_done) { 2660 k += num_ent; 2661 continue; 2662 } 2663 j = blocks_done - k - 1; 2664 k = blocks_done; 2665 break; 2666 } 2667 2668 if (k != blocks_done) { 2669 ql_log(ql_log_warn, vha, 0x302f, 2670 "unexpected tag values tag:lba=%x:%llx)\n", 2671 e_ref_tag, (unsigned long long)lba_s); 2672 return 1; 2673 } 2674 2675 spt = page_address(sg_page(sg)) + sg->offset; 2676 spt += j; 2677 2678 spt->app_tag = T10_PI_APP_ESCAPE; 2679 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3) 2680 spt->ref_tag = T10_PI_REF_ESCAPE; 2681 } 2682 2683 return 0; 2684 } 2685 2686 /* check guard */ 2687 if (e_guard != a_guard) { 2688 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, 2689 0x10, 0x1); 2690 set_driver_byte(cmd, DRIVER_SENSE); 2691 set_host_byte(cmd, DID_ABORT); 2692 cmd->result |= SAM_STAT_CHECK_CONDITION; 2693 return 1; 2694 } 2695 2696 /* check ref tag */ 2697 if (e_ref_tag != a_ref_tag) { 2698 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, 2699 0x10, 0x3); 2700 set_driver_byte(cmd, DRIVER_SENSE); 2701 set_host_byte(cmd, DID_ABORT); 2702 cmd->result |= SAM_STAT_CHECK_CONDITION; 2703 return 1; 2704 } 2705 2706 /* check appl tag */ 2707 if (e_app_tag != a_app_tag) { 2708 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, 2709 0x10, 0x2); 2710 set_driver_byte(cmd, DRIVER_SENSE); 2711 set_host_byte(cmd, DID_ABORT); 2712 cmd->result |= SAM_STAT_CHECK_CONDITION; 2713 return 1; 2714 } 2715 2716 return 1; 2717 } 2718 2719 static void 2720 qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt, 2721 struct req_que *req, uint32_t index) 2722 { 2723 struct qla_hw_data *ha = vha->hw; 2724 srb_t *sp; 2725 uint16_t comp_status; 2726 uint16_t scsi_status; 2727 uint16_t thread_id; 2728 uint32_t rval = EXT_STATUS_OK; 2729 struct bsg_job *bsg_job = NULL; 2730 struct fc_bsg_request *bsg_request; 2731 struct fc_bsg_reply *bsg_reply; 2732 sts_entry_t *sts = pkt; 2733 struct sts_entry_24xx *sts24 = pkt; 2734 2735 /* Validate handle. */ 2736 if (index >= req->num_outstanding_cmds) { 2737 ql_log(ql_log_warn, vha, 0x70af, 2738 "Invalid SCSI completion handle 0x%x.\n", index); 2739 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2740 return; 2741 } 2742 2743 sp = req->outstanding_cmds[index]; 2744 if (!sp) { 2745 ql_log(ql_log_warn, vha, 0x70b0, 2746 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n", 2747 req->id, index); 2748 2749 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2750 return; 2751 } 2752 2753 /* Free outstanding command slot. */ 2754 req->outstanding_cmds[index] = NULL; 2755 bsg_job = sp->u.bsg_job; 2756 bsg_request = bsg_job->request; 2757 bsg_reply = bsg_job->reply; 2758 2759 if (IS_FWI2_CAPABLE(ha)) { 2760 comp_status = le16_to_cpu(sts24->comp_status); 2761 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; 2762 } else { 2763 comp_status = le16_to_cpu(sts->comp_status); 2764 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; 2765 } 2766 2767 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1]; 2768 switch (comp_status) { 2769 case CS_COMPLETE: 2770 if (scsi_status == 0) { 2771 bsg_reply->reply_payload_rcv_len = 2772 bsg_job->reply_payload.payload_len; 2773 vha->qla_stats.input_bytes += 2774 bsg_reply->reply_payload_rcv_len; 2775 vha->qla_stats.input_requests++; 2776 rval = EXT_STATUS_OK; 2777 } 2778 goto done; 2779 2780 case CS_DATA_OVERRUN: 2781 ql_dbg(ql_dbg_user, vha, 0x70b1, 2782 "Command completed with data overrun thread_id=%d\n", 2783 thread_id); 2784 rval = EXT_STATUS_DATA_OVERRUN; 2785 break; 2786 2787 case CS_DATA_UNDERRUN: 2788 ql_dbg(ql_dbg_user, vha, 0x70b2, 2789 "Command completed with data underrun thread_id=%d\n", 2790 thread_id); 2791 rval = EXT_STATUS_DATA_UNDERRUN; 2792 break; 2793 case CS_BIDIR_RD_OVERRUN: 2794 ql_dbg(ql_dbg_user, vha, 0x70b3, 2795 "Command completed with read data overrun thread_id=%d\n", 2796 thread_id); 2797 rval = EXT_STATUS_DATA_OVERRUN; 2798 break; 2799 2800 case CS_BIDIR_RD_WR_OVERRUN: 2801 ql_dbg(ql_dbg_user, vha, 0x70b4, 2802 "Command completed with read and write data overrun " 2803 "thread_id=%d\n", thread_id); 2804 rval = EXT_STATUS_DATA_OVERRUN; 2805 break; 2806 2807 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN: 2808 ql_dbg(ql_dbg_user, vha, 0x70b5, 2809 "Command completed with read data over and write data " 2810 "underrun thread_id=%d\n", thread_id); 2811 rval = EXT_STATUS_DATA_OVERRUN; 2812 break; 2813 2814 case CS_BIDIR_RD_UNDERRUN: 2815 ql_dbg(ql_dbg_user, vha, 0x70b6, 2816 "Command completed with read data underrun " 2817 "thread_id=%d\n", thread_id); 2818 rval = EXT_STATUS_DATA_UNDERRUN; 2819 break; 2820 2821 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN: 2822 ql_dbg(ql_dbg_user, vha, 0x70b7, 2823 "Command completed with read data under and write data " 2824 "overrun thread_id=%d\n", thread_id); 2825 rval = EXT_STATUS_DATA_UNDERRUN; 2826 break; 2827 2828 case CS_BIDIR_RD_WR_UNDERRUN: 2829 ql_dbg(ql_dbg_user, vha, 0x70b8, 2830 "Command completed with read and write data underrun " 2831 "thread_id=%d\n", thread_id); 2832 rval = EXT_STATUS_DATA_UNDERRUN; 2833 break; 2834 2835 case CS_BIDIR_DMA: 2836 ql_dbg(ql_dbg_user, vha, 0x70b9, 2837 "Command completed with data DMA error thread_id=%d\n", 2838 thread_id); 2839 rval = EXT_STATUS_DMA_ERR; 2840 break; 2841 2842 case CS_TIMEOUT: 2843 ql_dbg(ql_dbg_user, vha, 0x70ba, 2844 "Command completed with timeout thread_id=%d\n", 2845 thread_id); 2846 rval = EXT_STATUS_TIMEOUT; 2847 break; 2848 default: 2849 ql_dbg(ql_dbg_user, vha, 0x70bb, 2850 "Command completed with completion status=0x%x " 2851 "thread_id=%d\n", comp_status, thread_id); 2852 rval = EXT_STATUS_ERR; 2853 break; 2854 } 2855 bsg_reply->reply_payload_rcv_len = 0; 2856 2857 done: 2858 /* Return the vendor specific reply to API */ 2859 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval; 2860 bsg_job->reply_len = sizeof(struct fc_bsg_reply); 2861 /* Always return DID_OK, bsg will send the vendor specific response 2862 * in this case only */ 2863 sp->done(sp, DID_OK << 16); 2864 2865 } 2866 2867 /** 2868 * qla2x00_status_entry() - Process a Status IOCB entry. 2869 * @vha: SCSI driver HA context 2870 * @rsp: response queue 2871 * @pkt: Entry pointer 2872 */ 2873 static void 2874 qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) 2875 { 2876 srb_t *sp; 2877 fc_port_t *fcport; 2878 struct scsi_cmnd *cp; 2879 sts_entry_t *sts = pkt; 2880 struct sts_entry_24xx *sts24 = pkt; 2881 uint16_t comp_status; 2882 uint16_t scsi_status; 2883 uint16_t ox_id; 2884 uint8_t lscsi_status; 2885 int32_t resid; 2886 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, 2887 fw_resid_len; 2888 uint8_t *rsp_info, *sense_data; 2889 struct qla_hw_data *ha = vha->hw; 2890 uint32_t handle; 2891 uint16_t que; 2892 struct req_que *req; 2893 int logit = 1; 2894 int res = 0; 2895 uint16_t state_flags = 0; 2896 uint16_t sts_qual = 0; 2897 2898 if (IS_FWI2_CAPABLE(ha)) { 2899 comp_status = le16_to_cpu(sts24->comp_status); 2900 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; 2901 state_flags = le16_to_cpu(sts24->state_flags); 2902 } else { 2903 comp_status = le16_to_cpu(sts->comp_status); 2904 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; 2905 } 2906 handle = (uint32_t) LSW(sts->handle); 2907 que = MSW(sts->handle); 2908 req = ha->req_q_map[que]; 2909 2910 /* Check for invalid queue pointer */ 2911 if (req == NULL || 2912 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) { 2913 ql_dbg(ql_dbg_io, vha, 0x3059, 2914 "Invalid status handle (0x%x): Bad req pointer. req=%p, " 2915 "que=%u.\n", sts->handle, req, que); 2916 return; 2917 } 2918 2919 /* Validate handle. */ 2920 if (handle < req->num_outstanding_cmds) { 2921 sp = req->outstanding_cmds[handle]; 2922 if (!sp) { 2923 ql_dbg(ql_dbg_io, vha, 0x3075, 2924 "%s(%ld): Already returned command for status handle (0x%x).\n", 2925 __func__, vha->host_no, sts->handle); 2926 return; 2927 } 2928 } else { 2929 ql_dbg(ql_dbg_io, vha, 0x3017, 2930 "Invalid status handle, out of range (0x%x).\n", 2931 sts->handle); 2932 2933 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { 2934 if (IS_P3P_TYPE(ha)) 2935 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 2936 else 2937 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2938 qla2xxx_wake_dpc(vha); 2939 } 2940 return; 2941 } 2942 qla_put_iocbs(sp->qpair, &sp->iores); 2943 2944 if (sp->cmd_type != TYPE_SRB) { 2945 req->outstanding_cmds[handle] = NULL; 2946 ql_dbg(ql_dbg_io, vha, 0x3015, 2947 "Unknown sp->cmd_type %x %p).\n", 2948 sp->cmd_type, sp); 2949 return; 2950 } 2951 2952 /* NVME completion. */ 2953 if (sp->type == SRB_NVME_CMD) { 2954 req->outstanding_cmds[handle] = NULL; 2955 qla24xx_nvme_iocb_entry(vha, req, pkt, sp); 2956 return; 2957 } 2958 2959 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) { 2960 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle); 2961 return; 2962 } 2963 2964 /* Task Management completion. */ 2965 if (sp->type == SRB_TM_CMD) { 2966 qla24xx_tm_iocb_entry(vha, req, pkt); 2967 return; 2968 } 2969 2970 /* Fast path completion. */ 2971 if (comp_status == CS_COMPLETE && scsi_status == 0) { 2972 qla2x00_process_completed_request(vha, req, handle); 2973 2974 return; 2975 } 2976 2977 req->outstanding_cmds[handle] = NULL; 2978 cp = GET_CMD_SP(sp); 2979 if (cp == NULL) { 2980 ql_dbg(ql_dbg_io, vha, 0x3018, 2981 "Command already returned (0x%x/%p).\n", 2982 sts->handle, sp); 2983 2984 return; 2985 } 2986 2987 lscsi_status = scsi_status & STATUS_MASK; 2988 2989 fcport = sp->fcport; 2990 2991 ox_id = 0; 2992 sense_len = par_sense_len = rsp_info_len = resid_len = 2993 fw_resid_len = 0; 2994 if (IS_FWI2_CAPABLE(ha)) { 2995 if (scsi_status & SS_SENSE_LEN_VALID) 2996 sense_len = le32_to_cpu(sts24->sense_len); 2997 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) 2998 rsp_info_len = le32_to_cpu(sts24->rsp_data_len); 2999 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) 3000 resid_len = le32_to_cpu(sts24->rsp_residual_count); 3001 if (comp_status == CS_DATA_UNDERRUN) 3002 fw_resid_len = le32_to_cpu(sts24->residual_len); 3003 rsp_info = sts24->data; 3004 sense_data = sts24->data; 3005 host_to_fcp_swap(sts24->data, sizeof(sts24->data)); 3006 ox_id = le16_to_cpu(sts24->ox_id); 3007 par_sense_len = sizeof(sts24->data); 3008 sts_qual = le16_to_cpu(sts24->status_qualifier); 3009 } else { 3010 if (scsi_status & SS_SENSE_LEN_VALID) 3011 sense_len = le16_to_cpu(sts->req_sense_length); 3012 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) 3013 rsp_info_len = le16_to_cpu(sts->rsp_info_len); 3014 resid_len = le32_to_cpu(sts->residual_length); 3015 rsp_info = sts->rsp_info; 3016 sense_data = sts->req_sense_data; 3017 par_sense_len = sizeof(sts->req_sense_data); 3018 } 3019 3020 /* Check for any FCP transport errors. */ 3021 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) { 3022 /* Sense data lies beyond any FCP RESPONSE data. */ 3023 if (IS_FWI2_CAPABLE(ha)) { 3024 sense_data += rsp_info_len; 3025 par_sense_len -= rsp_info_len; 3026 } 3027 if (rsp_info_len > 3 && rsp_info[3]) { 3028 ql_dbg(ql_dbg_io, fcport->vha, 0x3019, 3029 "FCP I/O protocol failure (0x%x/0x%x).\n", 3030 rsp_info_len, rsp_info[3]); 3031 3032 res = DID_BUS_BUSY << 16; 3033 goto out; 3034 } 3035 } 3036 3037 /* Check for overrun. */ 3038 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && 3039 scsi_status & SS_RESIDUAL_OVER) 3040 comp_status = CS_DATA_OVERRUN; 3041 3042 /* 3043 * Check retry_delay_timer value if we receive a busy or 3044 * queue full. 3045 */ 3046 if (unlikely(lscsi_status == SAM_STAT_TASK_SET_FULL || 3047 lscsi_status == SAM_STAT_BUSY)) 3048 qla2x00_set_retry_delay_timestamp(fcport, sts_qual); 3049 3050 /* 3051 * Based on Host and scsi status generate status code for Linux 3052 */ 3053 switch (comp_status) { 3054 case CS_COMPLETE: 3055 case CS_QUEUE_FULL: 3056 if (scsi_status == 0) { 3057 res = DID_OK << 16; 3058 break; 3059 } 3060 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) { 3061 resid = resid_len; 3062 scsi_set_resid(cp, resid); 3063 3064 if (!lscsi_status && 3065 ((unsigned)(scsi_bufflen(cp) - resid) < 3066 cp->underflow)) { 3067 ql_dbg(ql_dbg_io, fcport->vha, 0x301a, 3068 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", 3069 resid, scsi_bufflen(cp)); 3070 3071 res = DID_ERROR << 16; 3072 break; 3073 } 3074 } 3075 res = DID_OK << 16 | lscsi_status; 3076 3077 if (lscsi_status == SAM_STAT_TASK_SET_FULL) { 3078 ql_dbg(ql_dbg_io, fcport->vha, 0x301b, 3079 "QUEUE FULL detected.\n"); 3080 break; 3081 } 3082 logit = 0; 3083 if (lscsi_status != SS_CHECK_CONDITION) 3084 break; 3085 3086 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 3087 if (!(scsi_status & SS_SENSE_LEN_VALID)) 3088 break; 3089 3090 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len, 3091 rsp, res); 3092 break; 3093 3094 case CS_DATA_UNDERRUN: 3095 /* Use F/W calculated residual length. */ 3096 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len; 3097 scsi_set_resid(cp, resid); 3098 if (scsi_status & SS_RESIDUAL_UNDER) { 3099 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) { 3100 ql_dbg(ql_dbg_io, fcport->vha, 0x301d, 3101 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", 3102 resid, scsi_bufflen(cp)); 3103 3104 res = DID_ERROR << 16 | lscsi_status; 3105 goto check_scsi_status; 3106 } 3107 3108 if (!lscsi_status && 3109 ((unsigned)(scsi_bufflen(cp) - resid) < 3110 cp->underflow)) { 3111 ql_dbg(ql_dbg_io, fcport->vha, 0x301e, 3112 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", 3113 resid, scsi_bufflen(cp)); 3114 3115 res = DID_ERROR << 16; 3116 break; 3117 } 3118 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && 3119 lscsi_status != SAM_STAT_BUSY) { 3120 /* 3121 * scsi status of task set and busy are considered to be 3122 * task not completed. 3123 */ 3124 3125 ql_dbg(ql_dbg_io, fcport->vha, 0x301f, 3126 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", 3127 resid, scsi_bufflen(cp)); 3128 3129 res = DID_ERROR << 16 | lscsi_status; 3130 goto check_scsi_status; 3131 } else { 3132 ql_dbg(ql_dbg_io, fcport->vha, 0x3030, 3133 "scsi_status: 0x%x, lscsi_status: 0x%x\n", 3134 scsi_status, lscsi_status); 3135 } 3136 3137 res = DID_OK << 16 | lscsi_status; 3138 logit = 0; 3139 3140 check_scsi_status: 3141 /* 3142 * Check to see if SCSI Status is non zero. If so report SCSI 3143 * Status. 3144 */ 3145 if (lscsi_status != 0) { 3146 if (lscsi_status == SAM_STAT_TASK_SET_FULL) { 3147 ql_dbg(ql_dbg_io, fcport->vha, 0x3020, 3148 "QUEUE FULL detected.\n"); 3149 logit = 1; 3150 break; 3151 } 3152 if (lscsi_status != SS_CHECK_CONDITION) 3153 break; 3154 3155 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 3156 if (!(scsi_status & SS_SENSE_LEN_VALID)) 3157 break; 3158 3159 qla2x00_handle_sense(sp, sense_data, par_sense_len, 3160 sense_len, rsp, res); 3161 } 3162 break; 3163 3164 case CS_PORT_LOGGED_OUT: 3165 case CS_PORT_CONFIG_CHG: 3166 case CS_PORT_BUSY: 3167 case CS_INCOMPLETE: 3168 case CS_PORT_UNAVAILABLE: 3169 case CS_TIMEOUT: 3170 case CS_RESET: 3171 3172 /* 3173 * We are going to have the fc class block the rport 3174 * while we try to recover so instruct the mid layer 3175 * to requeue until the class decides how to handle this. 3176 */ 3177 res = DID_TRANSPORT_DISRUPTED << 16; 3178 3179 if (comp_status == CS_TIMEOUT) { 3180 if (IS_FWI2_CAPABLE(ha)) 3181 break; 3182 else if ((le16_to_cpu(sts->status_flags) & 3183 SF_LOGOUT_SENT) == 0) 3184 break; 3185 } 3186 3187 if (atomic_read(&fcport->state) == FCS_ONLINE) { 3188 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021, 3189 "Port to be marked lost on fcport=%02x%02x%02x, current " 3190 "port state= %s comp_status %x.\n", fcport->d_id.b.domain, 3191 fcport->d_id.b.area, fcport->d_id.b.al_pa, 3192 port_state_str[FCS_ONLINE], 3193 comp_status); 3194 3195 qlt_schedule_sess_for_deletion(fcport); 3196 } 3197 3198 break; 3199 3200 case CS_ABORTED: 3201 res = DID_RESET << 16; 3202 break; 3203 3204 case CS_DIF_ERROR: 3205 logit = qla2x00_handle_dif_error(sp, sts24); 3206 res = cp->result; 3207 break; 3208 3209 case CS_TRANSPORT: 3210 res = DID_ERROR << 16; 3211 3212 if (!IS_PI_SPLIT_DET_CAPABLE(ha)) 3213 break; 3214 3215 if (state_flags & BIT_4) 3216 scmd_printk(KERN_WARNING, cp, 3217 "Unsupported device '%s' found.\n", 3218 cp->device->vendor); 3219 break; 3220 3221 case CS_DMA: 3222 ql_log(ql_log_info, fcport->vha, 0x3022, 3223 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", 3224 comp_status, scsi_status, res, vha->host_no, 3225 cp->device->id, cp->device->lun, fcport->d_id.b24, 3226 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len, 3227 resid_len, fw_resid_len, sp, cp); 3228 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee, 3229 pkt, sizeof(*sts24)); 3230 res = DID_ERROR << 16; 3231 break; 3232 default: 3233 res = DID_ERROR << 16; 3234 break; 3235 } 3236 3237 out: 3238 if (logit) 3239 ql_dbg(ql_dbg_io, fcport->vha, 0x3022, 3240 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu " 3241 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x " 3242 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", 3243 comp_status, scsi_status, res, vha->host_no, 3244 cp->device->id, cp->device->lun, fcport->d_id.b.domain, 3245 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id, 3246 cp->cmnd, scsi_bufflen(cp), rsp_info_len, 3247 resid_len, fw_resid_len, sp, cp); 3248 3249 if (rsp->status_srb == NULL) 3250 sp->done(sp, res); 3251 } 3252 3253 /** 3254 * qla2x00_status_cont_entry() - Process a Status Continuations entry. 3255 * @rsp: response queue 3256 * @pkt: Entry pointer 3257 * 3258 * Extended sense data. 3259 */ 3260 static void 3261 qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) 3262 { 3263 uint8_t sense_sz = 0; 3264 struct qla_hw_data *ha = rsp->hw; 3265 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); 3266 srb_t *sp = rsp->status_srb; 3267 struct scsi_cmnd *cp; 3268 uint32_t sense_len; 3269 uint8_t *sense_ptr; 3270 3271 if (!sp || !GET_CMD_SENSE_LEN(sp)) 3272 return; 3273 3274 sense_len = GET_CMD_SENSE_LEN(sp); 3275 sense_ptr = GET_CMD_SENSE_PTR(sp); 3276 3277 cp = GET_CMD_SP(sp); 3278 if (cp == NULL) { 3279 ql_log(ql_log_warn, vha, 0x3025, 3280 "cmd is NULL: already returned to OS (sp=%p).\n", sp); 3281 3282 rsp->status_srb = NULL; 3283 return; 3284 } 3285 3286 if (sense_len > sizeof(pkt->data)) 3287 sense_sz = sizeof(pkt->data); 3288 else 3289 sense_sz = sense_len; 3290 3291 /* Move sense data. */ 3292 if (IS_FWI2_CAPABLE(ha)) 3293 host_to_fcp_swap(pkt->data, sizeof(pkt->data)); 3294 memcpy(sense_ptr, pkt->data, sense_sz); 3295 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c, 3296 sense_ptr, sense_sz); 3297 3298 sense_len -= sense_sz; 3299 sense_ptr += sense_sz; 3300 3301 SET_CMD_SENSE_PTR(sp, sense_ptr); 3302 SET_CMD_SENSE_LEN(sp, sense_len); 3303 3304 /* Place command on done queue. */ 3305 if (sense_len == 0) { 3306 rsp->status_srb = NULL; 3307 sp->done(sp, cp->result); 3308 } 3309 } 3310 3311 /** 3312 * qla2x00_error_entry() - Process an error entry. 3313 * @vha: SCSI driver HA context 3314 * @rsp: response queue 3315 * @pkt: Entry pointer 3316 * return : 1=allow further error analysis. 0=no additional error analysis. 3317 */ 3318 static int 3319 qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt) 3320 { 3321 srb_t *sp; 3322 struct qla_hw_data *ha = vha->hw; 3323 const char func[] = "ERROR-IOCB"; 3324 uint16_t que = MSW(pkt->handle); 3325 struct req_que *req = NULL; 3326 int res = DID_ERROR << 16; 3327 3328 ql_dbg(ql_dbg_async, vha, 0x502a, 3329 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n", 3330 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id); 3331 3332 if (que >= ha->max_req_queues || !ha->req_q_map[que]) 3333 goto fatal; 3334 3335 req = ha->req_q_map[que]; 3336 3337 if (pkt->entry_status & RF_BUSY) 3338 res = DID_BUS_BUSY << 16; 3339 3340 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE) 3341 return 0; 3342 3343 switch (pkt->entry_type) { 3344 case NOTIFY_ACK_TYPE: 3345 case STATUS_TYPE: 3346 case STATUS_CONT_TYPE: 3347 case LOGINOUT_PORT_IOCB_TYPE: 3348 case CT_IOCB_TYPE: 3349 case ELS_IOCB_TYPE: 3350 case ABORT_IOCB_TYPE: 3351 case MBX_IOCB_TYPE: 3352 default: 3353 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3354 if (sp) { 3355 qla_put_iocbs(sp->qpair, &sp->iores); 3356 sp->done(sp, res); 3357 return 0; 3358 } 3359 break; 3360 3361 case ABTS_RESP_24XX: 3362 case CTIO_TYPE7: 3363 case CTIO_CRC2: 3364 return 1; 3365 } 3366 fatal: 3367 ql_log(ql_log_warn, vha, 0x5030, 3368 "Error entry - invalid handle/queue (%04x).\n", que); 3369 return 0; 3370 } 3371 3372 /** 3373 * qla24xx_mbx_completion() - Process mailbox command completions. 3374 * @vha: SCSI driver HA context 3375 * @mb0: Mailbox0 register 3376 */ 3377 static void 3378 qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) 3379 { 3380 uint16_t cnt; 3381 uint32_t mboxes; 3382 __le16 __iomem *wptr; 3383 struct qla_hw_data *ha = vha->hw; 3384 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3385 3386 /* Read all mbox registers? */ 3387 WARN_ON_ONCE(ha->mbx_count > 32); 3388 mboxes = (1ULL << ha->mbx_count) - 1; 3389 if (!ha->mcp) 3390 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n"); 3391 else 3392 mboxes = ha->mcp->in_mb; 3393 3394 /* Load return mailbox registers. */ 3395 ha->flags.mbox_int = 1; 3396 ha->mailbox_out[0] = mb0; 3397 mboxes >>= 1; 3398 wptr = ®->mailbox1; 3399 3400 for (cnt = 1; cnt < ha->mbx_count; cnt++) { 3401 if (mboxes & BIT_0) 3402 ha->mailbox_out[cnt] = rd_reg_word(wptr); 3403 3404 mboxes >>= 1; 3405 wptr++; 3406 } 3407 } 3408 3409 static void 3410 qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 3411 struct abort_entry_24xx *pkt) 3412 { 3413 const char func[] = "ABT_IOCB"; 3414 srb_t *sp; 3415 struct srb_iocb *abt; 3416 3417 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3418 if (!sp) 3419 return; 3420 3421 abt = &sp->u.iocb_cmd; 3422 abt->u.abt.comp_status = pkt->nport_handle; 3423 sp->done(sp, 0); 3424 } 3425 3426 void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha, 3427 struct pt_ls4_request *pkt, struct req_que *req) 3428 { 3429 srb_t *sp; 3430 const char func[] = "LS4_IOCB"; 3431 uint16_t comp_status; 3432 3433 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3434 if (!sp) 3435 return; 3436 3437 comp_status = le16_to_cpu(pkt->status); 3438 sp->done(sp, comp_status); 3439 } 3440 3441 /** 3442 * qla24xx_process_response_queue() - Process response queue entries. 3443 * @vha: SCSI driver HA context 3444 * @rsp: response queue 3445 */ 3446 void qla24xx_process_response_queue(struct scsi_qla_host *vha, 3447 struct rsp_que *rsp) 3448 { 3449 struct sts_entry_24xx *pkt; 3450 struct qla_hw_data *ha = vha->hw; 3451 struct purex_entry_24xx *purex_entry; 3452 struct purex_item *pure_item; 3453 3454 if (!ha->flags.fw_started) 3455 return; 3456 3457 if (rsp->qpair->cpuid != smp_processor_id() || !rsp->qpair->rcv_intr) { 3458 rsp->qpair->rcv_intr = 1; 3459 qla_cpu_update(rsp->qpair, smp_processor_id()); 3460 } 3461 3462 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { 3463 pkt = (struct sts_entry_24xx *)rsp->ring_ptr; 3464 3465 rsp->ring_index++; 3466 if (rsp->ring_index == rsp->length) { 3467 rsp->ring_index = 0; 3468 rsp->ring_ptr = rsp->ring; 3469 } else { 3470 rsp->ring_ptr++; 3471 } 3472 3473 if (pkt->entry_status != 0) { 3474 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt)) 3475 goto process_err; 3476 3477 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 3478 wmb(); 3479 continue; 3480 } 3481 process_err: 3482 3483 switch (pkt->entry_type) { 3484 case STATUS_TYPE: 3485 qla2x00_status_entry(vha, rsp, pkt); 3486 break; 3487 case STATUS_CONT_TYPE: 3488 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); 3489 break; 3490 case VP_RPT_ID_IOCB_TYPE: 3491 qla24xx_report_id_acquisition(vha, 3492 (struct vp_rpt_id_entry_24xx *)pkt); 3493 break; 3494 case LOGINOUT_PORT_IOCB_TYPE: 3495 qla24xx_logio_entry(vha, rsp->req, 3496 (struct logio_entry_24xx *)pkt); 3497 break; 3498 case CT_IOCB_TYPE: 3499 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); 3500 break; 3501 case ELS_IOCB_TYPE: 3502 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE); 3503 break; 3504 case ABTS_RECV_24XX: 3505 if (qla_ini_mode_enabled(vha)) { 3506 pure_item = qla24xx_copy_std_pkt(vha, pkt); 3507 if (!pure_item) 3508 break; 3509 qla24xx_queue_purex_item(vha, pure_item, 3510 qla24xx_process_abts); 3511 break; 3512 } 3513 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3514 IS_QLA28XX(ha)) { 3515 /* ensure that the ATIO queue is empty */ 3516 qlt_handle_abts_recv(vha, rsp, 3517 (response_t *)pkt); 3518 break; 3519 } else { 3520 qlt_24xx_process_atio_queue(vha, 1); 3521 } 3522 fallthrough; 3523 case ABTS_RESP_24XX: 3524 case CTIO_TYPE7: 3525 case CTIO_CRC2: 3526 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt); 3527 break; 3528 case PT_LS4_REQUEST: 3529 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt, 3530 rsp->req); 3531 break; 3532 case NOTIFY_ACK_TYPE: 3533 if (pkt->handle == QLA_TGT_SKIP_HANDLE) 3534 qlt_response_pkt_all_vps(vha, rsp, 3535 (response_t *)pkt); 3536 else 3537 qla24xxx_nack_iocb_entry(vha, rsp->req, 3538 (struct nack_to_isp *)pkt); 3539 break; 3540 case MARKER_TYPE: 3541 /* Do nothing in this case, this check is to prevent it 3542 * from falling into default case 3543 */ 3544 break; 3545 case ABORT_IOCB_TYPE: 3546 qla24xx_abort_iocb_entry(vha, rsp->req, 3547 (struct abort_entry_24xx *)pkt); 3548 break; 3549 case MBX_IOCB_TYPE: 3550 qla24xx_mbx_iocb_entry(vha, rsp->req, 3551 (struct mbx_24xx_entry *)pkt); 3552 break; 3553 case VP_CTRL_IOCB_TYPE: 3554 qla_ctrlvp_completed(vha, rsp->req, 3555 (struct vp_ctrl_entry_24xx *)pkt); 3556 break; 3557 case PUREX_IOCB_TYPE: 3558 purex_entry = (void *)pkt; 3559 switch (purex_entry->els_frame_payload[3]) { 3560 case ELS_RDP: 3561 pure_item = qla24xx_copy_std_pkt(vha, pkt); 3562 if (!pure_item) 3563 break; 3564 qla24xx_queue_purex_item(vha, pure_item, 3565 qla24xx_process_purex_rdp); 3566 break; 3567 case ELS_FPIN: 3568 if (!vha->hw->flags.scm_enabled) { 3569 ql_log(ql_log_warn, vha, 0x5094, 3570 "SCM not active for this port\n"); 3571 break; 3572 } 3573 pure_item = qla27xx_copy_fpin_pkt(vha, 3574 (void **)&pkt, &rsp); 3575 if (!pure_item) 3576 break; 3577 qla24xx_queue_purex_item(vha, pure_item, 3578 qla27xx_process_purex_fpin); 3579 break; 3580 3581 default: 3582 ql_log(ql_log_warn, vha, 0x509c, 3583 "Discarding ELS Request opcode 0x%x\n", 3584 purex_entry->els_frame_payload[3]); 3585 } 3586 break; 3587 default: 3588 /* Type Not Supported. */ 3589 ql_dbg(ql_dbg_async, vha, 0x5042, 3590 "Received unknown response pkt type 0x%x entry status=%x.\n", 3591 pkt->entry_type, pkt->entry_status); 3592 break; 3593 } 3594 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 3595 wmb(); 3596 } 3597 3598 /* Adjust ring index */ 3599 if (IS_P3P_TYPE(ha)) { 3600 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; 3601 3602 wrt_reg_dword(®->rsp_q_out[0], rsp->ring_index); 3603 } else { 3604 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index); 3605 } 3606 } 3607 3608 static void 3609 qla2xxx_check_risc_status(scsi_qla_host_t *vha) 3610 { 3611 int rval; 3612 uint32_t cnt; 3613 struct qla_hw_data *ha = vha->hw; 3614 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3615 3616 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3617 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3618 return; 3619 3620 rval = QLA_SUCCESS; 3621 wrt_reg_dword(®->iobase_addr, 0x7C00); 3622 rd_reg_dword(®->iobase_addr); 3623 wrt_reg_dword(®->iobase_window, 0x0001); 3624 for (cnt = 10000; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 && 3625 rval == QLA_SUCCESS; cnt--) { 3626 if (cnt) { 3627 wrt_reg_dword(®->iobase_window, 0x0001); 3628 udelay(10); 3629 } else 3630 rval = QLA_FUNCTION_TIMEOUT; 3631 } 3632 if (rval == QLA_SUCCESS) 3633 goto next_test; 3634 3635 rval = QLA_SUCCESS; 3636 wrt_reg_dword(®->iobase_window, 0x0003); 3637 for (cnt = 100; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 && 3638 rval == QLA_SUCCESS; cnt--) { 3639 if (cnt) { 3640 wrt_reg_dword(®->iobase_window, 0x0003); 3641 udelay(10); 3642 } else 3643 rval = QLA_FUNCTION_TIMEOUT; 3644 } 3645 if (rval != QLA_SUCCESS) 3646 goto done; 3647 3648 next_test: 3649 if (rd_reg_dword(®->iobase_c8) & BIT_3) 3650 ql_log(ql_log_info, vha, 0x504c, 3651 "Additional code -- 0x55AA.\n"); 3652 3653 done: 3654 wrt_reg_dword(®->iobase_window, 0x0000); 3655 rd_reg_dword(®->iobase_window); 3656 } 3657 3658 /** 3659 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx. 3660 * @irq: interrupt number 3661 * @dev_id: SCSI driver HA context 3662 * 3663 * Called by system whenever the host adapter generates an interrupt. 3664 * 3665 * Returns handled flag. 3666 */ 3667 irqreturn_t 3668 qla24xx_intr_handler(int irq, void *dev_id) 3669 { 3670 scsi_qla_host_t *vha; 3671 struct qla_hw_data *ha; 3672 struct device_reg_24xx __iomem *reg; 3673 int status; 3674 unsigned long iter; 3675 uint32_t stat; 3676 uint32_t hccr; 3677 uint16_t mb[8]; 3678 struct rsp_que *rsp; 3679 unsigned long flags; 3680 bool process_atio = false; 3681 3682 rsp = (struct rsp_que *) dev_id; 3683 if (!rsp) { 3684 ql_log(ql_log_info, NULL, 0x5059, 3685 "%s: NULL response queue pointer.\n", __func__); 3686 return IRQ_NONE; 3687 } 3688 3689 ha = rsp->hw; 3690 reg = &ha->iobase->isp24; 3691 status = 0; 3692 3693 if (unlikely(pci_channel_offline(ha->pdev))) 3694 return IRQ_HANDLED; 3695 3696 spin_lock_irqsave(&ha->hardware_lock, flags); 3697 vha = pci_get_drvdata(ha->pdev); 3698 for (iter = 50; iter--; ) { 3699 stat = rd_reg_dword(®->host_status); 3700 if (qla2x00_check_reg32_for_disconnect(vha, stat)) 3701 break; 3702 if (stat & HSRX_RISC_PAUSED) { 3703 if (unlikely(pci_channel_offline(ha->pdev))) 3704 break; 3705 3706 hccr = rd_reg_dword(®->hccr); 3707 3708 ql_log(ql_log_warn, vha, 0x504b, 3709 "RISC paused -- HCCR=%x, Dumping firmware.\n", 3710 hccr); 3711 3712 qla2xxx_check_risc_status(vha); 3713 3714 ha->isp_ops->fw_dump(vha); 3715 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3716 break; 3717 } else if ((stat & HSRX_RISC_INT) == 0) 3718 break; 3719 3720 switch (stat & 0xff) { 3721 case INTR_ROM_MB_SUCCESS: 3722 case INTR_ROM_MB_FAILED: 3723 case INTR_MB_SUCCESS: 3724 case INTR_MB_FAILED: 3725 qla24xx_mbx_completion(vha, MSW(stat)); 3726 status |= MBX_INTERRUPT; 3727 3728 break; 3729 case INTR_ASYNC_EVENT: 3730 mb[0] = MSW(stat); 3731 mb[1] = rd_reg_word(®->mailbox1); 3732 mb[2] = rd_reg_word(®->mailbox2); 3733 mb[3] = rd_reg_word(®->mailbox3); 3734 qla2x00_async_event(vha, rsp, mb); 3735 break; 3736 case INTR_RSP_QUE_UPDATE: 3737 case INTR_RSP_QUE_UPDATE_83XX: 3738 qla24xx_process_response_queue(vha, rsp); 3739 break; 3740 case INTR_ATIO_QUE_UPDATE_27XX: 3741 case INTR_ATIO_QUE_UPDATE: 3742 process_atio = true; 3743 break; 3744 case INTR_ATIO_RSP_QUE_UPDATE: 3745 process_atio = true; 3746 qla24xx_process_response_queue(vha, rsp); 3747 break; 3748 default: 3749 ql_dbg(ql_dbg_async, vha, 0x504f, 3750 "Unrecognized interrupt type (%d).\n", stat * 0xff); 3751 break; 3752 } 3753 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); 3754 rd_reg_dword_relaxed(®->hccr); 3755 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1))) 3756 ndelay(3500); 3757 } 3758 qla2x00_handle_mbx_completion(ha, status); 3759 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3760 3761 if (process_atio) { 3762 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 3763 qlt_24xx_process_atio_queue(vha, 0); 3764 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); 3765 } 3766 3767 return IRQ_HANDLED; 3768 } 3769 3770 static irqreturn_t 3771 qla24xx_msix_rsp_q(int irq, void *dev_id) 3772 { 3773 struct qla_hw_data *ha; 3774 struct rsp_que *rsp; 3775 struct device_reg_24xx __iomem *reg; 3776 struct scsi_qla_host *vha; 3777 unsigned long flags; 3778 3779 rsp = (struct rsp_que *) dev_id; 3780 if (!rsp) { 3781 ql_log(ql_log_info, NULL, 0x505a, 3782 "%s: NULL response queue pointer.\n", __func__); 3783 return IRQ_NONE; 3784 } 3785 ha = rsp->hw; 3786 reg = &ha->iobase->isp24; 3787 3788 spin_lock_irqsave(&ha->hardware_lock, flags); 3789 3790 vha = pci_get_drvdata(ha->pdev); 3791 qla24xx_process_response_queue(vha, rsp); 3792 if (!ha->flags.disable_msix_handshake) { 3793 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); 3794 rd_reg_dword_relaxed(®->hccr); 3795 } 3796 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3797 3798 return IRQ_HANDLED; 3799 } 3800 3801 static irqreturn_t 3802 qla24xx_msix_default(int irq, void *dev_id) 3803 { 3804 scsi_qla_host_t *vha; 3805 struct qla_hw_data *ha; 3806 struct rsp_que *rsp; 3807 struct device_reg_24xx __iomem *reg; 3808 int status; 3809 uint32_t stat; 3810 uint32_t hccr; 3811 uint16_t mb[8]; 3812 unsigned long flags; 3813 bool process_atio = false; 3814 3815 rsp = (struct rsp_que *) dev_id; 3816 if (!rsp) { 3817 ql_log(ql_log_info, NULL, 0x505c, 3818 "%s: NULL response queue pointer.\n", __func__); 3819 return IRQ_NONE; 3820 } 3821 ha = rsp->hw; 3822 reg = &ha->iobase->isp24; 3823 status = 0; 3824 3825 spin_lock_irqsave(&ha->hardware_lock, flags); 3826 vha = pci_get_drvdata(ha->pdev); 3827 do { 3828 stat = rd_reg_dword(®->host_status); 3829 if (qla2x00_check_reg32_for_disconnect(vha, stat)) 3830 break; 3831 if (stat & HSRX_RISC_PAUSED) { 3832 if (unlikely(pci_channel_offline(ha->pdev))) 3833 break; 3834 3835 hccr = rd_reg_dword(®->hccr); 3836 3837 ql_log(ql_log_info, vha, 0x5050, 3838 "RISC paused -- HCCR=%x, Dumping firmware.\n", 3839 hccr); 3840 3841 qla2xxx_check_risc_status(vha); 3842 3843 ha->isp_ops->fw_dump(vha); 3844 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3845 break; 3846 } else if ((stat & HSRX_RISC_INT) == 0) 3847 break; 3848 3849 switch (stat & 0xff) { 3850 case INTR_ROM_MB_SUCCESS: 3851 case INTR_ROM_MB_FAILED: 3852 case INTR_MB_SUCCESS: 3853 case INTR_MB_FAILED: 3854 qla24xx_mbx_completion(vha, MSW(stat)); 3855 status |= MBX_INTERRUPT; 3856 3857 break; 3858 case INTR_ASYNC_EVENT: 3859 mb[0] = MSW(stat); 3860 mb[1] = rd_reg_word(®->mailbox1); 3861 mb[2] = rd_reg_word(®->mailbox2); 3862 mb[3] = rd_reg_word(®->mailbox3); 3863 qla2x00_async_event(vha, rsp, mb); 3864 break; 3865 case INTR_RSP_QUE_UPDATE: 3866 case INTR_RSP_QUE_UPDATE_83XX: 3867 qla24xx_process_response_queue(vha, rsp); 3868 break; 3869 case INTR_ATIO_QUE_UPDATE_27XX: 3870 case INTR_ATIO_QUE_UPDATE: 3871 process_atio = true; 3872 break; 3873 case INTR_ATIO_RSP_QUE_UPDATE: 3874 process_atio = true; 3875 qla24xx_process_response_queue(vha, rsp); 3876 break; 3877 default: 3878 ql_dbg(ql_dbg_async, vha, 0x5051, 3879 "Unrecognized interrupt type (%d).\n", stat & 0xff); 3880 break; 3881 } 3882 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); 3883 } while (0); 3884 qla2x00_handle_mbx_completion(ha, status); 3885 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3886 3887 if (process_atio) { 3888 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 3889 qlt_24xx_process_atio_queue(vha, 0); 3890 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); 3891 } 3892 3893 return IRQ_HANDLED; 3894 } 3895 3896 irqreturn_t 3897 qla2xxx_msix_rsp_q(int irq, void *dev_id) 3898 { 3899 struct qla_hw_data *ha; 3900 struct qla_qpair *qpair; 3901 3902 qpair = dev_id; 3903 if (!qpair) { 3904 ql_log(ql_log_info, NULL, 0x505b, 3905 "%s: NULL response queue pointer.\n", __func__); 3906 return IRQ_NONE; 3907 } 3908 ha = qpair->hw; 3909 3910 queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work); 3911 3912 return IRQ_HANDLED; 3913 } 3914 3915 irqreturn_t 3916 qla2xxx_msix_rsp_q_hs(int irq, void *dev_id) 3917 { 3918 struct qla_hw_data *ha; 3919 struct qla_qpair *qpair; 3920 struct device_reg_24xx __iomem *reg; 3921 unsigned long flags; 3922 3923 qpair = dev_id; 3924 if (!qpair) { 3925 ql_log(ql_log_info, NULL, 0x505b, 3926 "%s: NULL response queue pointer.\n", __func__); 3927 return IRQ_NONE; 3928 } 3929 ha = qpair->hw; 3930 3931 reg = &ha->iobase->isp24; 3932 spin_lock_irqsave(&ha->hardware_lock, flags); 3933 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); 3934 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3935 3936 queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work); 3937 3938 return IRQ_HANDLED; 3939 } 3940 3941 /* Interrupt handling helpers. */ 3942 3943 struct qla_init_msix_entry { 3944 const char *name; 3945 irq_handler_t handler; 3946 }; 3947 3948 static const struct qla_init_msix_entry msix_entries[] = { 3949 { "default", qla24xx_msix_default }, 3950 { "rsp_q", qla24xx_msix_rsp_q }, 3951 { "atio_q", qla83xx_msix_atio_q }, 3952 { "qpair_multiq", qla2xxx_msix_rsp_q }, 3953 { "qpair_multiq_hs", qla2xxx_msix_rsp_q_hs }, 3954 }; 3955 3956 static const struct qla_init_msix_entry qla82xx_msix_entries[] = { 3957 { "qla2xxx (default)", qla82xx_msix_default }, 3958 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q }, 3959 }; 3960 3961 static int 3962 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) 3963 { 3964 int i, ret; 3965 struct qla_msix_entry *qentry; 3966 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 3967 int min_vecs = QLA_BASE_VECTORS; 3968 struct irq_affinity desc = { 3969 .pre_vectors = QLA_BASE_VECTORS, 3970 }; 3971 3972 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && 3973 IS_ATIO_MSIX_CAPABLE(ha)) { 3974 desc.pre_vectors++; 3975 min_vecs++; 3976 } 3977 3978 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) { 3979 /* user wants to control IRQ setting for target mode */ 3980 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs, 3981 min((u16)ha->msix_count, (u16)num_online_cpus()), 3982 PCI_IRQ_MSIX); 3983 } else 3984 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs, 3985 min((u16)ha->msix_count, (u16)num_online_cpus()), 3986 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, 3987 &desc); 3988 3989 if (ret < 0) { 3990 ql_log(ql_log_fatal, vha, 0x00c7, 3991 "MSI-X: Failed to enable support, " 3992 "giving up -- %d/%d.\n", 3993 ha->msix_count, ret); 3994 goto msix_out; 3995 } else if (ret < ha->msix_count) { 3996 ql_log(ql_log_info, vha, 0x00c6, 3997 "MSI-X: Using %d vectors\n", ret); 3998 ha->msix_count = ret; 3999 /* Recalculate queue values */ 4000 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) { 4001 ha->max_req_queues = ha->msix_count - 1; 4002 4003 /* ATIOQ needs 1 vector. That's 1 less QPair */ 4004 if (QLA_TGT_MODE_ENABLED()) 4005 ha->max_req_queues--; 4006 4007 ha->max_rsp_queues = ha->max_req_queues; 4008 4009 ha->max_qpairs = ha->max_req_queues - 1; 4010 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190, 4011 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs); 4012 } 4013 } 4014 vha->irq_offset = desc.pre_vectors; 4015 ha->msix_entries = kcalloc(ha->msix_count, 4016 sizeof(struct qla_msix_entry), 4017 GFP_KERNEL); 4018 if (!ha->msix_entries) { 4019 ql_log(ql_log_fatal, vha, 0x00c8, 4020 "Failed to allocate memory for ha->msix_entries.\n"); 4021 ret = -ENOMEM; 4022 goto free_irqs; 4023 } 4024 ha->flags.msix_enabled = 1; 4025 4026 for (i = 0; i < ha->msix_count; i++) { 4027 qentry = &ha->msix_entries[i]; 4028 qentry->vector = pci_irq_vector(ha->pdev, i); 4029 qentry->entry = i; 4030 qentry->have_irq = 0; 4031 qentry->in_use = 0; 4032 qentry->handle = NULL; 4033 } 4034 4035 /* Enable MSI-X vectors for the base queue */ 4036 for (i = 0; i < QLA_BASE_VECTORS; i++) { 4037 qentry = &ha->msix_entries[i]; 4038 qentry->handle = rsp; 4039 rsp->msix = qentry; 4040 scnprintf(qentry->name, sizeof(qentry->name), 4041 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name); 4042 if (IS_P3P_TYPE(ha)) 4043 ret = request_irq(qentry->vector, 4044 qla82xx_msix_entries[i].handler, 4045 0, qla82xx_msix_entries[i].name, rsp); 4046 else 4047 ret = request_irq(qentry->vector, 4048 msix_entries[i].handler, 4049 0, qentry->name, rsp); 4050 if (ret) 4051 goto msix_register_fail; 4052 qentry->have_irq = 1; 4053 qentry->in_use = 1; 4054 } 4055 4056 /* 4057 * If target mode is enable, also request the vector for the ATIO 4058 * queue. 4059 */ 4060 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && 4061 IS_ATIO_MSIX_CAPABLE(ha)) { 4062 qentry = &ha->msix_entries[QLA_ATIO_VECTOR]; 4063 rsp->msix = qentry; 4064 qentry->handle = rsp; 4065 scnprintf(qentry->name, sizeof(qentry->name), 4066 "qla2xxx%lu_%s", vha->host_no, 4067 msix_entries[QLA_ATIO_VECTOR].name); 4068 qentry->in_use = 1; 4069 ret = request_irq(qentry->vector, 4070 msix_entries[QLA_ATIO_VECTOR].handler, 4071 0, qentry->name, rsp); 4072 qentry->have_irq = 1; 4073 } 4074 4075 msix_register_fail: 4076 if (ret) { 4077 ql_log(ql_log_fatal, vha, 0x00cb, 4078 "MSI-X: unable to register handler -- %x/%d.\n", 4079 qentry->vector, ret); 4080 qla2x00_free_irqs(vha); 4081 ha->mqenable = 0; 4082 goto msix_out; 4083 } 4084 4085 /* Enable MSI-X vector for response queue update for queue 0 */ 4086 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 4087 if (ha->msixbase && ha->mqiobase && 4088 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || 4089 ql2xmqsupport)) 4090 ha->mqenable = 1; 4091 } else 4092 if (ha->mqiobase && 4093 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || 4094 ql2xmqsupport)) 4095 ha->mqenable = 1; 4096 ql_dbg(ql_dbg_multiq, vha, 0xc005, 4097 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", 4098 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); 4099 ql_dbg(ql_dbg_init, vha, 0x0055, 4100 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", 4101 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); 4102 4103 msix_out: 4104 return ret; 4105 4106 free_irqs: 4107 pci_free_irq_vectors(ha->pdev); 4108 goto msix_out; 4109 } 4110 4111 int 4112 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) 4113 { 4114 int ret = QLA_FUNCTION_FAILED; 4115 device_reg_t *reg = ha->iobase; 4116 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 4117 4118 /* If possible, enable MSI-X. */ 4119 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) && 4120 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && 4121 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))) 4122 goto skip_msi; 4123 4124 if (ql2xenablemsix == 2) 4125 goto skip_msix; 4126 4127 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && 4128 (ha->pdev->subsystem_device == 0x7040 || 4129 ha->pdev->subsystem_device == 0x7041 || 4130 ha->pdev->subsystem_device == 0x1705)) { 4131 ql_log(ql_log_warn, vha, 0x0034, 4132 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n", 4133 ha->pdev->subsystem_vendor, 4134 ha->pdev->subsystem_device); 4135 goto skip_msi; 4136 } 4137 4138 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { 4139 ql_log(ql_log_warn, vha, 0x0035, 4140 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", 4141 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); 4142 goto skip_msix; 4143 } 4144 4145 ret = qla24xx_enable_msix(ha, rsp); 4146 if (!ret) { 4147 ql_dbg(ql_dbg_init, vha, 0x0036, 4148 "MSI-X: Enabled (0x%X, 0x%X).\n", 4149 ha->chip_revision, ha->fw_attributes); 4150 goto clear_risc_ints; 4151 } 4152 4153 skip_msix: 4154 4155 ql_log(ql_log_info, vha, 0x0037, 4156 "Falling back-to MSI mode -- ret=%d.\n", ret); 4157 4158 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && 4159 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) && 4160 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 4161 goto skip_msi; 4162 4163 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI); 4164 if (ret > 0) { 4165 ql_dbg(ql_dbg_init, vha, 0x0038, 4166 "MSI: Enabled.\n"); 4167 ha->flags.msi_enabled = 1; 4168 } else 4169 ql_log(ql_log_warn, vha, 0x0039, 4170 "Falling back-to INTa mode -- ret=%d.\n", ret); 4171 skip_msi: 4172 4173 /* Skip INTx on ISP82xx. */ 4174 if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) 4175 return QLA_FUNCTION_FAILED; 4176 4177 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, 4178 ha->flags.msi_enabled ? 0 : IRQF_SHARED, 4179 QLA2XXX_DRIVER_NAME, rsp); 4180 if (ret) { 4181 ql_log(ql_log_warn, vha, 0x003a, 4182 "Failed to reserve interrupt %d already in use.\n", 4183 ha->pdev->irq); 4184 goto fail; 4185 } else if (!ha->flags.msi_enabled) { 4186 ql_dbg(ql_dbg_init, vha, 0x0125, 4187 "INTa mode: Enabled.\n"); 4188 ha->flags.mr_intr_valid = 1; 4189 } 4190 4191 clear_risc_ints: 4192 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) 4193 goto fail; 4194 4195 spin_lock_irq(&ha->hardware_lock); 4196 wrt_reg_word(®->isp.semaphore, 0); 4197 spin_unlock_irq(&ha->hardware_lock); 4198 4199 fail: 4200 return ret; 4201 } 4202 4203 void 4204 qla2x00_free_irqs(scsi_qla_host_t *vha) 4205 { 4206 struct qla_hw_data *ha = vha->hw; 4207 struct rsp_que *rsp; 4208 struct qla_msix_entry *qentry; 4209 int i; 4210 4211 /* 4212 * We need to check that ha->rsp_q_map is valid in case we are called 4213 * from a probe failure context. 4214 */ 4215 if (!ha->rsp_q_map || !ha->rsp_q_map[0]) 4216 goto free_irqs; 4217 rsp = ha->rsp_q_map[0]; 4218 4219 if (ha->flags.msix_enabled) { 4220 for (i = 0; i < ha->msix_count; i++) { 4221 qentry = &ha->msix_entries[i]; 4222 if (qentry->have_irq) { 4223 irq_set_affinity_notifier(qentry->vector, NULL); 4224 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle); 4225 } 4226 } 4227 kfree(ha->msix_entries); 4228 ha->msix_entries = NULL; 4229 ha->flags.msix_enabled = 0; 4230 ql_dbg(ql_dbg_init, vha, 0x0042, 4231 "Disabled MSI-X.\n"); 4232 } else { 4233 free_irq(pci_irq_vector(ha->pdev, 0), rsp); 4234 } 4235 4236 free_irqs: 4237 pci_free_irq_vectors(ha->pdev); 4238 } 4239 4240 int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair, 4241 struct qla_msix_entry *msix, int vector_type) 4242 { 4243 const struct qla_init_msix_entry *intr = &msix_entries[vector_type]; 4244 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 4245 int ret; 4246 4247 scnprintf(msix->name, sizeof(msix->name), 4248 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id); 4249 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair); 4250 if (ret) { 4251 ql_log(ql_log_fatal, vha, 0x00e6, 4252 "MSI-X: Unable to register handler -- %x/%d.\n", 4253 msix->vector, ret); 4254 return ret; 4255 } 4256 msix->have_irq = 1; 4257 msix->handle = qpair; 4258 return ret; 4259 } 4260