1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #include "qla_def.h" 7 #include "qla_target.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/cpu.h> 13 #include <linux/t10-pi.h> 14 #include <scsi/scsi_tcq.h> 15 #include <scsi/scsi_bsg_fc.h> 16 #include <scsi/scsi_eh.h> 17 #include <scsi/fc/fc_fs.h> 18 #include <linux/nvme-fc-driver.h> 19 20 static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t); 21 static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *); 22 static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *); 23 static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *, 24 sts_entry_t *); 25 static void qla27xx_process_purex_fpin(struct scsi_qla_host *vha, 26 struct purex_item *item); 27 static struct purex_item *qla24xx_alloc_purex_item(scsi_qla_host_t *vha, 28 uint16_t size); 29 static struct purex_item *qla24xx_copy_std_pkt(struct scsi_qla_host *vha, 30 void *pkt); 31 static struct purex_item *qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha, 32 void **pkt, struct rsp_que **rsp); 33 34 static void 35 qla27xx_process_purex_fpin(struct scsi_qla_host *vha, struct purex_item *item) 36 { 37 void *pkt = &item->iocb; 38 uint16_t pkt_size = item->size; 39 40 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508d, 41 "%s: Enter\n", __func__); 42 43 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508e, 44 "-------- ELS REQ -------\n"); 45 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x508f, 46 pkt, pkt_size); 47 48 fc_host_fpin_rcv(vha->host, pkt_size, (char *)pkt, 0); 49 } 50 51 const char *const port_state_str[] = { 52 [FCS_UNKNOWN] = "Unknown", 53 [FCS_UNCONFIGURED] = "UNCONFIGURED", 54 [FCS_DEVICE_DEAD] = "DEAD", 55 [FCS_DEVICE_LOST] = "LOST", 56 [FCS_ONLINE] = "ONLINE" 57 }; 58 59 static void 60 qla24xx_process_abts(struct scsi_qla_host *vha, struct purex_item *pkt) 61 { 62 struct abts_entry_24xx *abts = 63 (struct abts_entry_24xx *)&pkt->iocb; 64 struct qla_hw_data *ha = vha->hw; 65 struct els_entry_24xx *rsp_els; 66 struct abts_entry_24xx *abts_rsp; 67 dma_addr_t dma; 68 uint32_t fctl; 69 int rval; 70 71 ql_dbg(ql_dbg_init, vha, 0x0286, "%s: entered.\n", __func__); 72 73 ql_log(ql_log_warn, vha, 0x0287, 74 "Processing ABTS xchg=%#x oxid=%#x rxid=%#x seqid=%#x seqcnt=%#x\n", 75 abts->rx_xch_addr_to_abort, abts->ox_id, abts->rx_id, 76 abts->seq_id, abts->seq_cnt); 77 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0287, 78 "-------- ABTS RCV -------\n"); 79 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0287, 80 (uint8_t *)abts, sizeof(*abts)); 81 82 rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els), &dma, 83 GFP_KERNEL); 84 if (!rsp_els) { 85 ql_log(ql_log_warn, vha, 0x0287, 86 "Failed allocate dma buffer ABTS/ELS RSP.\n"); 87 return; 88 } 89 90 /* terminate exchange */ 91 rsp_els->entry_type = ELS_IOCB_TYPE; 92 rsp_els->entry_count = 1; 93 rsp_els->nport_handle = cpu_to_le16(~0); 94 rsp_els->rx_xchg_address = abts->rx_xch_addr_to_abort; 95 rsp_els->control_flags = cpu_to_le16(EPD_RX_XCHG); 96 ql_dbg(ql_dbg_init, vha, 0x0283, 97 "Sending ELS Response to terminate exchange %#x...\n", 98 abts->rx_xch_addr_to_abort); 99 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0283, 100 "-------- ELS RSP -------\n"); 101 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0283, 102 (uint8_t *)rsp_els, sizeof(*rsp_els)); 103 rval = qla2x00_issue_iocb(vha, rsp_els, dma, 0); 104 if (rval) { 105 ql_log(ql_log_warn, vha, 0x0288, 106 "%s: iocb failed to execute -> %x\n", __func__, rval); 107 } else if (rsp_els->comp_status) { 108 ql_log(ql_log_warn, vha, 0x0289, 109 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n", 110 __func__, rsp_els->comp_status, 111 rsp_els->error_subcode_1, rsp_els->error_subcode_2); 112 } else { 113 ql_dbg(ql_dbg_init, vha, 0x028a, 114 "%s: abort exchange done.\n", __func__); 115 } 116 117 /* send ABTS response */ 118 abts_rsp = (void *)rsp_els; 119 memset(abts_rsp, 0, sizeof(*abts_rsp)); 120 abts_rsp->entry_type = ABTS_RSP_TYPE; 121 abts_rsp->entry_count = 1; 122 abts_rsp->nport_handle = abts->nport_handle; 123 abts_rsp->vp_idx = abts->vp_idx; 124 abts_rsp->sof_type = abts->sof_type & 0xf0; 125 abts_rsp->rx_xch_addr = abts->rx_xch_addr; 126 abts_rsp->d_id[0] = abts->s_id[0]; 127 abts_rsp->d_id[1] = abts->s_id[1]; 128 abts_rsp->d_id[2] = abts->s_id[2]; 129 abts_rsp->r_ctl = FC_ROUTING_BLD | FC_R_CTL_BLD_BA_ACC; 130 abts_rsp->s_id[0] = abts->d_id[0]; 131 abts_rsp->s_id[1] = abts->d_id[1]; 132 abts_rsp->s_id[2] = abts->d_id[2]; 133 abts_rsp->cs_ctl = abts->cs_ctl; 134 /* include flipping bit23 in fctl */ 135 fctl = ~(abts->f_ctl[2] | 0x7F) << 16 | 136 FC_F_CTL_LAST_SEQ | FC_F_CTL_END_SEQ | FC_F_CTL_SEQ_INIT; 137 abts_rsp->f_ctl[0] = fctl >> 0 & 0xff; 138 abts_rsp->f_ctl[1] = fctl >> 8 & 0xff; 139 abts_rsp->f_ctl[2] = fctl >> 16 & 0xff; 140 abts_rsp->type = FC_TYPE_BLD; 141 abts_rsp->rx_id = abts->rx_id; 142 abts_rsp->ox_id = abts->ox_id; 143 abts_rsp->payload.ba_acc.aborted_rx_id = abts->rx_id; 144 abts_rsp->payload.ba_acc.aborted_ox_id = abts->ox_id; 145 abts_rsp->payload.ba_acc.high_seq_cnt = cpu_to_le16(~0); 146 abts_rsp->rx_xch_addr_to_abort = abts->rx_xch_addr_to_abort; 147 ql_dbg(ql_dbg_init, vha, 0x028b, 148 "Sending BA ACC response to ABTS %#x...\n", 149 abts->rx_xch_addr_to_abort); 150 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x028b, 151 "-------- ELS RSP -------\n"); 152 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x028b, 153 (uint8_t *)abts_rsp, sizeof(*abts_rsp)); 154 rval = qla2x00_issue_iocb(vha, abts_rsp, dma, 0); 155 if (rval) { 156 ql_log(ql_log_warn, vha, 0x028c, 157 "%s: iocb failed to execute -> %x\n", __func__, rval); 158 } else if (abts_rsp->comp_status) { 159 ql_log(ql_log_warn, vha, 0x028d, 160 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n", 161 __func__, abts_rsp->comp_status, 162 abts_rsp->payload.error.subcode1, 163 abts_rsp->payload.error.subcode2); 164 } else { 165 ql_dbg(ql_dbg_init, vha, 0x028ea, 166 "%s: done.\n", __func__); 167 } 168 169 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els), rsp_els, dma); 170 } 171 172 /** 173 * __qla_consume_iocb - this routine is used to tell fw driver has processed 174 * or consumed the head IOCB along with the continuation IOCB's from the 175 * provided respond queue. 176 * @vha: host adapter pointer 177 * @pkt: pointer to current packet. On return, this pointer shall move 178 * to the next packet. 179 * @rsp: respond queue pointer. 180 * 181 * it is assumed pkt is the head iocb, not the continuation iocbk 182 */ 183 void __qla_consume_iocb(struct scsi_qla_host *vha, 184 void **pkt, struct rsp_que **rsp) 185 { 186 struct rsp_que *rsp_q = *rsp; 187 response_t *new_pkt; 188 uint16_t entry_count_remaining; 189 struct purex_entry_24xx *purex = *pkt; 190 191 entry_count_remaining = purex->entry_count; 192 while (entry_count_remaining > 0) { 193 new_pkt = rsp_q->ring_ptr; 194 *pkt = new_pkt; 195 196 rsp_q->ring_index++; 197 if (rsp_q->ring_index == rsp_q->length) { 198 rsp_q->ring_index = 0; 199 rsp_q->ring_ptr = rsp_q->ring; 200 } else { 201 rsp_q->ring_ptr++; 202 } 203 204 new_pkt->signature = RESPONSE_PROCESSED; 205 /* flush signature */ 206 wmb(); 207 --entry_count_remaining; 208 } 209 } 210 211 /** 212 * __qla_copy_purex_to_buffer - extract ELS payload from Purex IOCB 213 * and save to provided buffer 214 * @vha: host adapter pointer 215 * @pkt: pointer Purex IOCB 216 * @rsp: respond queue 217 * @buf: extracted ELS payload copy here 218 * @buf_len: buffer length 219 */ 220 int __qla_copy_purex_to_buffer(struct scsi_qla_host *vha, 221 void **pkt, struct rsp_que **rsp, u8 *buf, u32 buf_len) 222 { 223 struct purex_entry_24xx *purex = *pkt; 224 struct rsp_que *rsp_q = *rsp; 225 sts_cont_entry_t *new_pkt; 226 uint16_t no_bytes = 0, total_bytes = 0, pending_bytes = 0; 227 uint16_t buffer_copy_offset = 0; 228 uint16_t entry_count_remaining; 229 u16 tpad; 230 231 entry_count_remaining = purex->entry_count; 232 total_bytes = (le16_to_cpu(purex->frame_size) & 0x0FFF) 233 - PURX_ELS_HEADER_SIZE; 234 235 /* 236 * end of payload may not end in 4bytes boundary. Need to 237 * round up / pad for room to swap, before saving data 238 */ 239 tpad = roundup(total_bytes, 4); 240 241 if (buf_len < tpad) { 242 ql_dbg(ql_dbg_async, vha, 0x5084, 243 "%s buffer is too small %d < %d\n", 244 __func__, buf_len, tpad); 245 __qla_consume_iocb(vha, pkt, rsp); 246 return -EIO; 247 } 248 249 pending_bytes = total_bytes = tpad; 250 no_bytes = (pending_bytes > sizeof(purex->els_frame_payload)) ? 251 sizeof(purex->els_frame_payload) : pending_bytes; 252 253 memcpy(buf, &purex->els_frame_payload[0], no_bytes); 254 buffer_copy_offset += no_bytes; 255 pending_bytes -= no_bytes; 256 --entry_count_remaining; 257 258 ((response_t *)purex)->signature = RESPONSE_PROCESSED; 259 /* flush signature */ 260 wmb(); 261 262 do { 263 while ((total_bytes > 0) && (entry_count_remaining > 0)) { 264 new_pkt = (sts_cont_entry_t *)rsp_q->ring_ptr; 265 *pkt = new_pkt; 266 267 if (new_pkt->entry_type != STATUS_CONT_TYPE) { 268 ql_log(ql_log_warn, vha, 0x507a, 269 "Unexpected IOCB type, partial data 0x%x\n", 270 buffer_copy_offset); 271 break; 272 } 273 274 rsp_q->ring_index++; 275 if (rsp_q->ring_index == rsp_q->length) { 276 rsp_q->ring_index = 0; 277 rsp_q->ring_ptr = rsp_q->ring; 278 } else { 279 rsp_q->ring_ptr++; 280 } 281 no_bytes = (pending_bytes > sizeof(new_pkt->data)) ? 282 sizeof(new_pkt->data) : pending_bytes; 283 if ((buffer_copy_offset + no_bytes) <= total_bytes) { 284 memcpy((buf + buffer_copy_offset), new_pkt->data, 285 no_bytes); 286 buffer_copy_offset += no_bytes; 287 pending_bytes -= no_bytes; 288 --entry_count_remaining; 289 } else { 290 ql_log(ql_log_warn, vha, 0x5044, 291 "Attempt to copy more that we got, optimizing..%x\n", 292 buffer_copy_offset); 293 memcpy((buf + buffer_copy_offset), new_pkt->data, 294 total_bytes - buffer_copy_offset); 295 } 296 297 ((response_t *)new_pkt)->signature = RESPONSE_PROCESSED; 298 /* flush signature */ 299 wmb(); 300 } 301 302 if (pending_bytes != 0 || entry_count_remaining != 0) { 303 ql_log(ql_log_fatal, vha, 0x508b, 304 "Dropping partial Data, underrun bytes = 0x%x, entry cnts 0x%x\n", 305 total_bytes, entry_count_remaining); 306 return -EIO; 307 } 308 } while (entry_count_remaining > 0); 309 310 be32_to_cpu_array((u32 *)buf, (__be32 *)buf, total_bytes >> 2); 311 312 return 0; 313 } 314 315 /** 316 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200. 317 * @irq: interrupt number 318 * @dev_id: SCSI driver HA context 319 * 320 * Called by system whenever the host adapter generates an interrupt. 321 * 322 * Returns handled flag. 323 */ 324 irqreturn_t 325 qla2100_intr_handler(int irq, void *dev_id) 326 { 327 scsi_qla_host_t *vha; 328 struct qla_hw_data *ha; 329 struct device_reg_2xxx __iomem *reg; 330 int status; 331 unsigned long iter; 332 uint16_t hccr; 333 uint16_t mb[8]; 334 struct rsp_que *rsp; 335 unsigned long flags; 336 337 rsp = (struct rsp_que *) dev_id; 338 if (!rsp) { 339 ql_log(ql_log_info, NULL, 0x505d, 340 "%s: NULL response queue pointer.\n", __func__); 341 return (IRQ_NONE); 342 } 343 344 ha = rsp->hw; 345 reg = &ha->iobase->isp; 346 status = 0; 347 348 spin_lock_irqsave(&ha->hardware_lock, flags); 349 vha = pci_get_drvdata(ha->pdev); 350 for (iter = 50; iter--; ) { 351 hccr = rd_reg_word(®->hccr); 352 if (qla2x00_check_reg16_for_disconnect(vha, hccr)) 353 break; 354 if (hccr & HCCR_RISC_PAUSE) { 355 if (pci_channel_offline(ha->pdev)) 356 break; 357 358 /* 359 * Issue a "HARD" reset in order for the RISC interrupt 360 * bit to be cleared. Schedule a big hammer to get 361 * out of the RISC PAUSED state. 362 */ 363 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 364 rd_reg_word(®->hccr); 365 366 ha->isp_ops->fw_dump(vha); 367 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 368 break; 369 } else if ((rd_reg_word(®->istatus) & ISR_RISC_INT) == 0) 370 break; 371 372 if (rd_reg_word(®->semaphore) & BIT_0) { 373 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 374 rd_reg_word(®->hccr); 375 376 /* Get mailbox data. */ 377 mb[0] = RD_MAILBOX_REG(ha, reg, 0); 378 if (mb[0] > 0x3fff && mb[0] < 0x8000) { 379 qla2x00_mbx_completion(vha, mb[0]); 380 status |= MBX_INTERRUPT; 381 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { 382 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 383 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 384 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 385 qla2x00_async_event(vha, rsp, mb); 386 } else { 387 /*EMPTY*/ 388 ql_dbg(ql_dbg_async, vha, 0x5025, 389 "Unrecognized interrupt type (%d).\n", 390 mb[0]); 391 } 392 /* Release mailbox registers. */ 393 wrt_reg_word(®->semaphore, 0); 394 rd_reg_word(®->semaphore); 395 } else { 396 qla2x00_process_response_queue(rsp); 397 398 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 399 rd_reg_word(®->hccr); 400 } 401 } 402 qla2x00_handle_mbx_completion(ha, status); 403 spin_unlock_irqrestore(&ha->hardware_lock, flags); 404 405 return (IRQ_HANDLED); 406 } 407 408 bool 409 qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg) 410 { 411 /* Check for PCI disconnection */ 412 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) { 413 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) && 414 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) && 415 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) { 416 qla_schedule_eeh_work(vha); 417 } 418 return true; 419 } else 420 return false; 421 } 422 423 bool 424 qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg) 425 { 426 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg); 427 } 428 429 /** 430 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. 431 * @irq: interrupt number 432 * @dev_id: SCSI driver HA context 433 * 434 * Called by system whenever the host adapter generates an interrupt. 435 * 436 * Returns handled flag. 437 */ 438 irqreturn_t 439 qla2300_intr_handler(int irq, void *dev_id) 440 { 441 scsi_qla_host_t *vha; 442 struct device_reg_2xxx __iomem *reg; 443 int status; 444 unsigned long iter; 445 uint32_t stat; 446 uint16_t hccr; 447 uint16_t mb[8]; 448 struct rsp_que *rsp; 449 struct qla_hw_data *ha; 450 unsigned long flags; 451 452 rsp = (struct rsp_que *) dev_id; 453 if (!rsp) { 454 ql_log(ql_log_info, NULL, 0x5058, 455 "%s: NULL response queue pointer.\n", __func__); 456 return (IRQ_NONE); 457 } 458 459 ha = rsp->hw; 460 reg = &ha->iobase->isp; 461 status = 0; 462 463 spin_lock_irqsave(&ha->hardware_lock, flags); 464 vha = pci_get_drvdata(ha->pdev); 465 for (iter = 50; iter--; ) { 466 stat = rd_reg_dword(®->u.isp2300.host_status); 467 if (qla2x00_check_reg32_for_disconnect(vha, stat)) 468 break; 469 if (stat & HSR_RISC_PAUSED) { 470 if (unlikely(pci_channel_offline(ha->pdev))) 471 break; 472 473 hccr = rd_reg_word(®->hccr); 474 475 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) 476 ql_log(ql_log_warn, vha, 0x5026, 477 "Parity error -- HCCR=%x, Dumping " 478 "firmware.\n", hccr); 479 else 480 ql_log(ql_log_warn, vha, 0x5027, 481 "RISC paused -- HCCR=%x, Dumping " 482 "firmware.\n", hccr); 483 484 /* 485 * Issue a "HARD" reset in order for the RISC 486 * interrupt bit to be cleared. Schedule a big 487 * hammer to get out of the RISC PAUSED state. 488 */ 489 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 490 rd_reg_word(®->hccr); 491 492 ha->isp_ops->fw_dump(vha); 493 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 494 break; 495 } else if ((stat & HSR_RISC_INT) == 0) 496 break; 497 498 switch (stat & 0xff) { 499 case 0x1: 500 case 0x2: 501 case 0x10: 502 case 0x11: 503 qla2x00_mbx_completion(vha, MSW(stat)); 504 status |= MBX_INTERRUPT; 505 506 /* Release mailbox registers. */ 507 wrt_reg_word(®->semaphore, 0); 508 break; 509 case 0x12: 510 mb[0] = MSW(stat); 511 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 512 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 513 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 514 qla2x00_async_event(vha, rsp, mb); 515 break; 516 case 0x13: 517 qla2x00_process_response_queue(rsp); 518 break; 519 case 0x15: 520 mb[0] = MBA_CMPLT_1_16BIT; 521 mb[1] = MSW(stat); 522 qla2x00_async_event(vha, rsp, mb); 523 break; 524 case 0x16: 525 mb[0] = MBA_SCSI_COMPLETION; 526 mb[1] = MSW(stat); 527 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 528 qla2x00_async_event(vha, rsp, mb); 529 break; 530 default: 531 ql_dbg(ql_dbg_async, vha, 0x5028, 532 "Unrecognized interrupt type (%d).\n", stat & 0xff); 533 break; 534 } 535 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 536 rd_reg_word_relaxed(®->hccr); 537 } 538 qla2x00_handle_mbx_completion(ha, status); 539 spin_unlock_irqrestore(&ha->hardware_lock, flags); 540 541 return (IRQ_HANDLED); 542 } 543 544 /** 545 * qla2x00_mbx_completion() - Process mailbox command completions. 546 * @vha: SCSI driver HA context 547 * @mb0: Mailbox0 register 548 */ 549 static void 550 qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) 551 { 552 uint16_t cnt; 553 uint32_t mboxes; 554 __le16 __iomem *wptr; 555 struct qla_hw_data *ha = vha->hw; 556 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 557 558 /* Read all mbox registers? */ 559 WARN_ON_ONCE(ha->mbx_count > 32); 560 mboxes = (1ULL << ha->mbx_count) - 1; 561 if (!ha->mcp) 562 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n"); 563 else 564 mboxes = ha->mcp->in_mb; 565 566 /* Load return mailbox registers. */ 567 ha->flags.mbox_int = 1; 568 ha->mailbox_out[0] = mb0; 569 mboxes >>= 1; 570 wptr = MAILBOX_REG(ha, reg, 1); 571 572 for (cnt = 1; cnt < ha->mbx_count; cnt++) { 573 if (IS_QLA2200(ha) && cnt == 8) 574 wptr = MAILBOX_REG(ha, reg, 8); 575 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0)) 576 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); 577 else if (mboxes & BIT_0) 578 ha->mailbox_out[cnt] = rd_reg_word(wptr); 579 580 wptr++; 581 mboxes >>= 1; 582 } 583 } 584 585 static void 586 qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) 587 { 588 static char *event[] = 589 { "Complete", "Request Notification", "Time Extension" }; 590 int rval; 591 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; 592 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82; 593 __le16 __iomem *wptr; 594 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; 595 596 /* Seed data -- mailbox1 -> mailbox7. */ 597 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) 598 wptr = ®24->mailbox1; 599 else if (IS_QLA8044(vha->hw)) 600 wptr = ®82->mailbox_out[1]; 601 else 602 return; 603 604 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) 605 mb[cnt] = rd_reg_word(wptr); 606 607 ql_dbg(ql_dbg_async, vha, 0x5021, 608 "Inter-Driver Communication %s -- " 609 "%04x %04x %04x %04x %04x %04x %04x.\n", 610 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3], 611 mb[4], mb[5], mb[6]); 612 switch (aen) { 613 /* Handle IDC Error completion case. */ 614 case MBA_IDC_COMPLETE: 615 if (mb[1] >> 15) { 616 vha->hw->flags.idc_compl_status = 1; 617 if (vha->hw->notify_dcbx_comp && !vha->vp_idx) 618 complete(&vha->hw->dcbx_comp); 619 } 620 break; 621 622 case MBA_IDC_NOTIFY: 623 /* Acknowledgement needed? [Notify && non-zero timeout]. */ 624 timeout = (descr >> 8) & 0xf; 625 ql_dbg(ql_dbg_async, vha, 0x5022, 626 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n", 627 vha->host_no, event[aen & 0xff], timeout); 628 629 if (!timeout) 630 return; 631 rval = qla2x00_post_idc_ack_work(vha, mb); 632 if (rval != QLA_SUCCESS) 633 ql_log(ql_log_warn, vha, 0x5023, 634 "IDC failed to post ACK.\n"); 635 break; 636 case MBA_IDC_TIME_EXT: 637 vha->hw->idc_extend_tmo = descr; 638 ql_dbg(ql_dbg_async, vha, 0x5087, 639 "%lu Inter-Driver Communication %s -- " 640 "Extend timeout by=%d.\n", 641 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo); 642 break; 643 } 644 } 645 646 #define LS_UNKNOWN 2 647 const char * 648 qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed) 649 { 650 static const char *const link_speeds[] = { 651 "1", "2", "?", "4", "8", "16", "32", "64", "10" 652 }; 653 #define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1) 654 655 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 656 return link_speeds[0]; 657 else if (speed == 0x13) 658 return link_speeds[QLA_LAST_SPEED]; 659 else if (speed < QLA_LAST_SPEED) 660 return link_speeds[speed]; 661 else 662 return link_speeds[LS_UNKNOWN]; 663 } 664 665 static void 666 qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) 667 { 668 struct qla_hw_data *ha = vha->hw; 669 670 /* 671 * 8200 AEN Interpretation: 672 * mb[0] = AEN code 673 * mb[1] = AEN Reason code 674 * mb[2] = LSW of Peg-Halt Status-1 Register 675 * mb[6] = MSW of Peg-Halt Status-1 Register 676 * mb[3] = LSW of Peg-Halt Status-2 register 677 * mb[7] = MSW of Peg-Halt Status-2 register 678 * mb[4] = IDC Device-State Register value 679 * mb[5] = IDC Driver-Presence Register value 680 */ 681 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: " 682 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n", 683 mb[0], mb[1], mb[2], mb[6]); 684 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x " 685 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x " 686 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]); 687 688 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE | 689 IDC_HEARTBEAT_FAILURE)) { 690 ha->flags.nic_core_hung = 1; 691 ql_log(ql_log_warn, vha, 0x5060, 692 "83XX: F/W Error Reported: Check if reset required.\n"); 693 694 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) { 695 uint32_t protocol_engine_id, fw_err_code, err_level; 696 697 /* 698 * IDC_PEG_HALT_STATUS_CHANGE interpretation: 699 * - PEG-Halt Status-1 Register: 700 * (LSW = mb[2], MSW = mb[6]) 701 * Bits 0-7 = protocol-engine ID 702 * Bits 8-28 = f/w error code 703 * Bits 29-31 = Error-level 704 * Error-level 0x1 = Non-Fatal error 705 * Error-level 0x2 = Recoverable Fatal error 706 * Error-level 0x4 = UnRecoverable Fatal error 707 * - PEG-Halt Status-2 Register: 708 * (LSW = mb[3], MSW = mb[7]) 709 */ 710 protocol_engine_id = (mb[2] & 0xff); 711 fw_err_code = (((mb[2] & 0xff00) >> 8) | 712 ((mb[6] & 0x1fff) << 8)); 713 err_level = ((mb[6] & 0xe000) >> 13); 714 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 " 715 "Register: protocol_engine_id=0x%x " 716 "fw_err_code=0x%x err_level=0x%x.\n", 717 protocol_engine_id, fw_err_code, err_level); 718 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 " 719 "Register: 0x%x%x.\n", mb[7], mb[3]); 720 if (err_level == ERR_LEVEL_NON_FATAL) { 721 ql_log(ql_log_warn, vha, 0x5063, 722 "Not a fatal error, f/w has recovered itself.\n"); 723 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) { 724 ql_log(ql_log_fatal, vha, 0x5064, 725 "Recoverable Fatal error: Chip reset " 726 "required.\n"); 727 qla83xx_schedule_work(vha, 728 QLA83XX_NIC_CORE_RESET); 729 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) { 730 ql_log(ql_log_fatal, vha, 0x5065, 731 "Unrecoverable Fatal error: Set FAILED " 732 "state, reboot required.\n"); 733 qla83xx_schedule_work(vha, 734 QLA83XX_NIC_CORE_UNRECOVERABLE); 735 } 736 } 737 738 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) { 739 uint16_t peg_fw_state, nw_interface_link_up; 740 uint16_t nw_interface_signal_detect, sfp_status; 741 uint16_t htbt_counter, htbt_monitor_enable; 742 uint16_t sfp_additional_info, sfp_multirate; 743 uint16_t sfp_tx_fault, link_speed, dcbx_status; 744 745 /* 746 * IDC_NIC_FW_REPORTED_FAILURE interpretation: 747 * - PEG-to-FC Status Register: 748 * (LSW = mb[2], MSW = mb[6]) 749 * Bits 0-7 = Peg-Firmware state 750 * Bit 8 = N/W Interface Link-up 751 * Bit 9 = N/W Interface signal detected 752 * Bits 10-11 = SFP Status 753 * SFP Status 0x0 = SFP+ transceiver not expected 754 * SFP Status 0x1 = SFP+ transceiver not present 755 * SFP Status 0x2 = SFP+ transceiver invalid 756 * SFP Status 0x3 = SFP+ transceiver present and 757 * valid 758 * Bits 12-14 = Heartbeat Counter 759 * Bit 15 = Heartbeat Monitor Enable 760 * Bits 16-17 = SFP Additional Info 761 * SFP info 0x0 = Unregocnized transceiver for 762 * Ethernet 763 * SFP info 0x1 = SFP+ brand validation failed 764 * SFP info 0x2 = SFP+ speed validation failed 765 * SFP info 0x3 = SFP+ access error 766 * Bit 18 = SFP Multirate 767 * Bit 19 = SFP Tx Fault 768 * Bits 20-22 = Link Speed 769 * Bits 23-27 = Reserved 770 * Bits 28-30 = DCBX Status 771 * DCBX Status 0x0 = DCBX Disabled 772 * DCBX Status 0x1 = DCBX Enabled 773 * DCBX Status 0x2 = DCBX Exchange error 774 * Bit 31 = Reserved 775 */ 776 peg_fw_state = (mb[2] & 0x00ff); 777 nw_interface_link_up = ((mb[2] & 0x0100) >> 8); 778 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9); 779 sfp_status = ((mb[2] & 0x0c00) >> 10); 780 htbt_counter = ((mb[2] & 0x7000) >> 12); 781 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15); 782 sfp_additional_info = (mb[6] & 0x0003); 783 sfp_multirate = ((mb[6] & 0x0004) >> 2); 784 sfp_tx_fault = ((mb[6] & 0x0008) >> 3); 785 link_speed = ((mb[6] & 0x0070) >> 4); 786 dcbx_status = ((mb[6] & 0x7000) >> 12); 787 788 ql_log(ql_log_warn, vha, 0x5066, 789 "Peg-to-Fc Status Register:\n" 790 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, " 791 "nw_interface_signal_detect=0x%x" 792 "\nsfp_statis=0x%x.\n ", peg_fw_state, 793 nw_interface_link_up, nw_interface_signal_detect, 794 sfp_status); 795 ql_log(ql_log_warn, vha, 0x5067, 796 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, " 797 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ", 798 htbt_counter, htbt_monitor_enable, 799 sfp_additional_info, sfp_multirate); 800 ql_log(ql_log_warn, vha, 0x5068, 801 "sfp_tx_fault=0x%x, link_state=0x%x, " 802 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed, 803 dcbx_status); 804 805 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); 806 } 807 808 if (mb[1] & IDC_HEARTBEAT_FAILURE) { 809 ql_log(ql_log_warn, vha, 0x5069, 810 "Heartbeat Failure encountered, chip reset " 811 "required.\n"); 812 813 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); 814 } 815 } 816 817 if (mb[1] & IDC_DEVICE_STATE_CHANGE) { 818 ql_log(ql_log_info, vha, 0x506a, 819 "IDC Device-State changed = 0x%x.\n", mb[4]); 820 if (ha->flags.nic_core_reset_owner) 821 return; 822 qla83xx_schedule_work(vha, MBA_IDC_AEN); 823 } 824 } 825 826 int 827 qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry) 828 { 829 struct qla_hw_data *ha = vha->hw; 830 scsi_qla_host_t *vp; 831 uint32_t vp_did; 832 unsigned long flags; 833 int ret = 0; 834 835 if (!ha->num_vhosts) 836 return ret; 837 838 spin_lock_irqsave(&ha->vport_slock, flags); 839 list_for_each_entry(vp, &ha->vp_list, list) { 840 vp_did = vp->d_id.b24; 841 if (vp_did == rscn_entry) { 842 ret = 1; 843 break; 844 } 845 } 846 spin_unlock_irqrestore(&ha->vport_slock, flags); 847 848 return ret; 849 } 850 851 fc_port_t * 852 qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id) 853 { 854 fc_port_t *f, *tf; 855 856 f = tf = NULL; 857 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) 858 if (f->loop_id == loop_id) 859 return f; 860 return NULL; 861 } 862 863 fc_port_t * 864 qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted) 865 { 866 fc_port_t *f, *tf; 867 868 f = tf = NULL; 869 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 870 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) { 871 if (incl_deleted) 872 return f; 873 else if (f->deleted == 0) 874 return f; 875 } 876 } 877 return NULL; 878 } 879 880 fc_port_t * 881 qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id, 882 u8 incl_deleted) 883 { 884 fc_port_t *f, *tf; 885 886 f = tf = NULL; 887 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 888 if (f->d_id.b24 == id->b24) { 889 if (incl_deleted) 890 return f; 891 else if (f->deleted == 0) 892 return f; 893 } 894 } 895 return NULL; 896 } 897 898 /* Shall be called only on supported adapters. */ 899 static void 900 qla27xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) 901 { 902 struct qla_hw_data *ha = vha->hw; 903 bool reset_isp_needed = false; 904 905 ql_log(ql_log_warn, vha, 0x02f0, 906 "MPI Heartbeat stop. MPI reset is%s needed. " 907 "MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n", 908 mb[1] & BIT_8 ? "" : " not", 909 mb[0], mb[1], mb[2], mb[3]); 910 911 if ((mb[1] & BIT_8) == 0) 912 return; 913 914 ql_log(ql_log_warn, vha, 0x02f1, 915 "MPI Heartbeat stop. FW dump needed\n"); 916 917 if (ql2xfulldump_on_mpifail) { 918 ha->isp_ops->fw_dump(vha); 919 reset_isp_needed = true; 920 } 921 922 ha->isp_ops->mpi_fw_dump(vha, 1); 923 924 if (reset_isp_needed) { 925 vha->hw->flags.fw_init_done = 0; 926 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 927 qla2xxx_wake_dpc(vha); 928 } 929 } 930 931 static struct purex_item * 932 qla24xx_alloc_purex_item(scsi_qla_host_t *vha, uint16_t size) 933 { 934 struct purex_item *item = NULL; 935 uint8_t item_hdr_size = sizeof(*item); 936 937 if (size > QLA_DEFAULT_PAYLOAD_SIZE) { 938 item = kzalloc(item_hdr_size + 939 (size - QLA_DEFAULT_PAYLOAD_SIZE), GFP_ATOMIC); 940 } else { 941 if (atomic_inc_return(&vha->default_item.in_use) == 1) { 942 item = &vha->default_item; 943 goto initialize_purex_header; 944 } else { 945 item = kzalloc(item_hdr_size, GFP_ATOMIC); 946 } 947 } 948 if (!item) { 949 ql_log(ql_log_warn, vha, 0x5092, 950 ">> Failed allocate purex list item.\n"); 951 952 return NULL; 953 } 954 955 initialize_purex_header: 956 item->vha = vha; 957 item->size = size; 958 return item; 959 } 960 961 static void 962 qla24xx_queue_purex_item(scsi_qla_host_t *vha, struct purex_item *pkt, 963 void (*process_item)(struct scsi_qla_host *vha, 964 struct purex_item *pkt)) 965 { 966 struct purex_list *list = &vha->purex_list; 967 ulong flags; 968 969 pkt->process_item = process_item; 970 971 spin_lock_irqsave(&list->lock, flags); 972 list_add_tail(&pkt->list, &list->head); 973 spin_unlock_irqrestore(&list->lock, flags); 974 975 set_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags); 976 } 977 978 /** 979 * qla24xx_copy_std_pkt() - Copy over purex ELS which is 980 * contained in a single IOCB. 981 * purex packet. 982 * @vha: SCSI driver HA context 983 * @pkt: ELS packet 984 */ 985 static struct purex_item 986 *qla24xx_copy_std_pkt(struct scsi_qla_host *vha, void *pkt) 987 { 988 struct purex_item *item; 989 990 item = qla24xx_alloc_purex_item(vha, 991 QLA_DEFAULT_PAYLOAD_SIZE); 992 if (!item) 993 return item; 994 995 memcpy(&item->iocb, pkt, sizeof(item->iocb)); 996 return item; 997 } 998 999 /** 1000 * qla27xx_copy_fpin_pkt() - Copy over fpin packets that can 1001 * span over multiple IOCBs. 1002 * @vha: SCSI driver HA context 1003 * @pkt: ELS packet 1004 * @rsp: Response queue 1005 */ 1006 static struct purex_item * 1007 qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha, void **pkt, 1008 struct rsp_que **rsp) 1009 { 1010 struct purex_entry_24xx *purex = *pkt; 1011 struct rsp_que *rsp_q = *rsp; 1012 sts_cont_entry_t *new_pkt; 1013 uint16_t no_bytes = 0, total_bytes = 0, pending_bytes = 0; 1014 uint16_t buffer_copy_offset = 0; 1015 uint16_t entry_count, entry_count_remaining; 1016 struct purex_item *item; 1017 void *fpin_pkt = NULL; 1018 1019 total_bytes = (le16_to_cpu(purex->frame_size) & 0x0FFF) 1020 - PURX_ELS_HEADER_SIZE; 1021 pending_bytes = total_bytes; 1022 entry_count = entry_count_remaining = purex->entry_count; 1023 no_bytes = (pending_bytes > sizeof(purex->els_frame_payload)) ? 1024 sizeof(purex->els_frame_payload) : pending_bytes; 1025 ql_log(ql_log_info, vha, 0x509a, 1026 "FPIN ELS, frame_size 0x%x, entry count %d\n", 1027 total_bytes, entry_count); 1028 1029 item = qla24xx_alloc_purex_item(vha, total_bytes); 1030 if (!item) 1031 return item; 1032 1033 fpin_pkt = &item->iocb; 1034 1035 memcpy(fpin_pkt, &purex->els_frame_payload[0], no_bytes); 1036 buffer_copy_offset += no_bytes; 1037 pending_bytes -= no_bytes; 1038 --entry_count_remaining; 1039 1040 ((response_t *)purex)->signature = RESPONSE_PROCESSED; 1041 wmb(); 1042 1043 do { 1044 while ((total_bytes > 0) && (entry_count_remaining > 0)) { 1045 if (rsp_q->ring_ptr->signature == RESPONSE_PROCESSED) { 1046 ql_dbg(ql_dbg_async, vha, 0x5084, 1047 "Ran out of IOCBs, partial data 0x%x\n", 1048 buffer_copy_offset); 1049 cpu_relax(); 1050 continue; 1051 } 1052 1053 new_pkt = (sts_cont_entry_t *)rsp_q->ring_ptr; 1054 *pkt = new_pkt; 1055 1056 if (new_pkt->entry_type != STATUS_CONT_TYPE) { 1057 ql_log(ql_log_warn, vha, 0x507a, 1058 "Unexpected IOCB type, partial data 0x%x\n", 1059 buffer_copy_offset); 1060 break; 1061 } 1062 1063 rsp_q->ring_index++; 1064 if (rsp_q->ring_index == rsp_q->length) { 1065 rsp_q->ring_index = 0; 1066 rsp_q->ring_ptr = rsp_q->ring; 1067 } else { 1068 rsp_q->ring_ptr++; 1069 } 1070 no_bytes = (pending_bytes > sizeof(new_pkt->data)) ? 1071 sizeof(new_pkt->data) : pending_bytes; 1072 if ((buffer_copy_offset + no_bytes) <= total_bytes) { 1073 memcpy(((uint8_t *)fpin_pkt + 1074 buffer_copy_offset), new_pkt->data, 1075 no_bytes); 1076 buffer_copy_offset += no_bytes; 1077 pending_bytes -= no_bytes; 1078 --entry_count_remaining; 1079 } else { 1080 ql_log(ql_log_warn, vha, 0x5044, 1081 "Attempt to copy more that we got, optimizing..%x\n", 1082 buffer_copy_offset); 1083 memcpy(((uint8_t *)fpin_pkt + 1084 buffer_copy_offset), new_pkt->data, 1085 total_bytes - buffer_copy_offset); 1086 } 1087 1088 ((response_t *)new_pkt)->signature = RESPONSE_PROCESSED; 1089 wmb(); 1090 } 1091 1092 if (pending_bytes != 0 || entry_count_remaining != 0) { 1093 ql_log(ql_log_fatal, vha, 0x508b, 1094 "Dropping partial FPIN, underrun bytes = 0x%x, entry cnts 0x%x\n", 1095 total_bytes, entry_count_remaining); 1096 qla24xx_free_purex_item(item); 1097 return NULL; 1098 } 1099 } while (entry_count_remaining > 0); 1100 host_to_fcp_swap((uint8_t *)&item->iocb, total_bytes); 1101 return item; 1102 } 1103 1104 /** 1105 * qla2x00_async_event() - Process aynchronous events. 1106 * @vha: SCSI driver HA context 1107 * @rsp: response queue 1108 * @mb: Mailbox registers (0 - 3) 1109 */ 1110 void 1111 qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb) 1112 { 1113 uint16_t handle_cnt; 1114 uint16_t cnt, mbx; 1115 uint32_t handles[5]; 1116 struct qla_hw_data *ha = vha->hw; 1117 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1118 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; 1119 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; 1120 uint32_t rscn_entry, host_pid; 1121 unsigned long flags; 1122 fc_port_t *fcport = NULL; 1123 1124 if (!vha->hw->flags.fw_started) 1125 return; 1126 1127 /* Setup to process RIO completion. */ 1128 handle_cnt = 0; 1129 if (IS_CNA_CAPABLE(ha)) 1130 goto skip_rio; 1131 switch (mb[0]) { 1132 case MBA_SCSI_COMPLETION: 1133 handles[0] = make_handle(mb[2], mb[1]); 1134 handle_cnt = 1; 1135 break; 1136 case MBA_CMPLT_1_16BIT: 1137 handles[0] = mb[1]; 1138 handle_cnt = 1; 1139 mb[0] = MBA_SCSI_COMPLETION; 1140 break; 1141 case MBA_CMPLT_2_16BIT: 1142 handles[0] = mb[1]; 1143 handles[1] = mb[2]; 1144 handle_cnt = 2; 1145 mb[0] = MBA_SCSI_COMPLETION; 1146 break; 1147 case MBA_CMPLT_3_16BIT: 1148 handles[0] = mb[1]; 1149 handles[1] = mb[2]; 1150 handles[2] = mb[3]; 1151 handle_cnt = 3; 1152 mb[0] = MBA_SCSI_COMPLETION; 1153 break; 1154 case MBA_CMPLT_4_16BIT: 1155 handles[0] = mb[1]; 1156 handles[1] = mb[2]; 1157 handles[2] = mb[3]; 1158 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); 1159 handle_cnt = 4; 1160 mb[0] = MBA_SCSI_COMPLETION; 1161 break; 1162 case MBA_CMPLT_5_16BIT: 1163 handles[0] = mb[1]; 1164 handles[1] = mb[2]; 1165 handles[2] = mb[3]; 1166 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); 1167 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); 1168 handle_cnt = 5; 1169 mb[0] = MBA_SCSI_COMPLETION; 1170 break; 1171 case MBA_CMPLT_2_32BIT: 1172 handles[0] = make_handle(mb[2], mb[1]); 1173 handles[1] = make_handle(RD_MAILBOX_REG(ha, reg, 7), 1174 RD_MAILBOX_REG(ha, reg, 6)); 1175 handle_cnt = 2; 1176 mb[0] = MBA_SCSI_COMPLETION; 1177 break; 1178 default: 1179 break; 1180 } 1181 skip_rio: 1182 switch (mb[0]) { 1183 case MBA_SCSI_COMPLETION: /* Fast Post */ 1184 if (!vha->flags.online) 1185 break; 1186 1187 for (cnt = 0; cnt < handle_cnt; cnt++) 1188 qla2x00_process_completed_request(vha, rsp->req, 1189 handles[cnt]); 1190 break; 1191 1192 case MBA_RESET: /* Reset */ 1193 ql_dbg(ql_dbg_async, vha, 0x5002, 1194 "Asynchronous RESET.\n"); 1195 1196 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 1197 break; 1198 1199 case MBA_SYSTEM_ERR: /* System Error */ 1200 mbx = 0; 1201 1202 vha->hw_err_cnt++; 1203 1204 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || 1205 IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1206 u16 m[4]; 1207 1208 m[0] = rd_reg_word(®24->mailbox4); 1209 m[1] = rd_reg_word(®24->mailbox5); 1210 m[2] = rd_reg_word(®24->mailbox6); 1211 mbx = m[3] = rd_reg_word(®24->mailbox7); 1212 1213 ql_log(ql_log_warn, vha, 0x5003, 1214 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh mbx4=%xh mbx5=%xh mbx6=%xh mbx7=%xh.\n", 1215 mb[1], mb[2], mb[3], m[0], m[1], m[2], m[3]); 1216 } else 1217 ql_log(ql_log_warn, vha, 0x5003, 1218 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh.\n ", 1219 mb[1], mb[2], mb[3]); 1220 1221 if ((IS_QLA27XX(ha) || IS_QLA28XX(ha)) && 1222 rd_reg_word(®24->mailbox7) & BIT_8) 1223 ha->isp_ops->mpi_fw_dump(vha, 1); 1224 ha->isp_ops->fw_dump(vha); 1225 ha->flags.fw_init_done = 0; 1226 QLA_FW_STOPPED(ha); 1227 1228 if (IS_FWI2_CAPABLE(ha)) { 1229 if (mb[1] == 0 && mb[2] == 0) { 1230 ql_log(ql_log_fatal, vha, 0x5004, 1231 "Unrecoverable Hardware Error: adapter " 1232 "marked OFFLINE!\n"); 1233 vha->flags.online = 0; 1234 vha->device_flags |= DFLG_DEV_FAILED; 1235 } else { 1236 /* Check to see if MPI timeout occurred */ 1237 if ((mbx & MBX_3) && (ha->port_no == 0)) 1238 set_bit(MPI_RESET_NEEDED, 1239 &vha->dpc_flags); 1240 1241 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1242 } 1243 } else if (mb[1] == 0) { 1244 ql_log(ql_log_fatal, vha, 0x5005, 1245 "Unrecoverable Hardware Error: adapter marked " 1246 "OFFLINE!\n"); 1247 vha->flags.online = 0; 1248 vha->device_flags |= DFLG_DEV_FAILED; 1249 } else 1250 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1251 break; 1252 1253 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */ 1254 ql_log(ql_log_warn, vha, 0x5006, 1255 "ISP Request Transfer Error (%x).\n", mb[1]); 1256 1257 vha->hw_err_cnt++; 1258 1259 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1260 break; 1261 1262 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */ 1263 ql_log(ql_log_warn, vha, 0x5007, 1264 "ISP Response Transfer Error (%x).\n", mb[1]); 1265 1266 vha->hw_err_cnt++; 1267 1268 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1269 break; 1270 1271 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */ 1272 ql_dbg(ql_dbg_async, vha, 0x5008, 1273 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]); 1274 break; 1275 1276 case MBA_LOOP_INIT_ERR: 1277 ql_log(ql_log_warn, vha, 0x5090, 1278 "LOOP INIT ERROR (%x).\n", mb[1]); 1279 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1280 break; 1281 1282 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ 1283 ha->flags.lip_ae = 1; 1284 1285 ql_dbg(ql_dbg_async, vha, 0x5009, 1286 "LIP occurred (%x).\n", mb[1]); 1287 1288 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1289 atomic_set(&vha->loop_state, LOOP_DOWN); 1290 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1291 qla2x00_mark_all_devices_lost(vha); 1292 } 1293 1294 if (vha->vp_idx) { 1295 atomic_set(&vha->vp_state, VP_FAILED); 1296 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1297 } 1298 1299 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); 1300 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); 1301 1302 vha->flags.management_server_logged_in = 0; 1303 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]); 1304 break; 1305 1306 case MBA_LOOP_UP: /* Loop Up Event */ 1307 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 1308 ha->link_data_rate = PORT_SPEED_1GB; 1309 else 1310 ha->link_data_rate = mb[1]; 1311 1312 ql_log(ql_log_info, vha, 0x500a, 1313 "LOOP UP detected (%s Gbps).\n", 1314 qla2x00_get_link_speed_str(ha, ha->link_data_rate)); 1315 1316 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1317 if (mb[2] & BIT_0) 1318 ql_log(ql_log_info, vha, 0x11a0, 1319 "FEC=enabled (link up).\n"); 1320 } 1321 1322 vha->flags.management_server_logged_in = 0; 1323 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); 1324 1325 if (vha->link_down_time < vha->hw->port_down_retry_count) { 1326 vha->short_link_down_cnt++; 1327 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 1328 } 1329 1330 break; 1331 1332 case MBA_LOOP_DOWN: /* Loop Down Event */ 1333 SAVE_TOPO(ha); 1334 ha->flags.lip_ae = 0; 1335 ha->current_topology = 0; 1336 vha->link_down_time = 0; 1337 1338 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) 1339 ? rd_reg_word(®24->mailbox4) : 0; 1340 mbx = (IS_P3P_TYPE(ha)) ? rd_reg_word(®82->mailbox_out[4]) 1341 : mbx; 1342 ql_log(ql_log_info, vha, 0x500b, 1343 "LOOP DOWN detected (%x %x %x %x).\n", 1344 mb[1], mb[2], mb[3], mbx); 1345 1346 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1347 atomic_set(&vha->loop_state, LOOP_DOWN); 1348 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1349 /* 1350 * In case of loop down, restore WWPN from 1351 * NVRAM in case of FA-WWPN capable ISP 1352 * Restore for Physical Port only 1353 */ 1354 if (!vha->vp_idx) { 1355 if (ha->flags.fawwpn_enabled && 1356 (ha->current_topology == ISP_CFG_F)) { 1357 memcpy(vha->port_name, ha->port_name, WWN_SIZE); 1358 fc_host_port_name(vha->host) = 1359 wwn_to_u64(vha->port_name); 1360 ql_dbg(ql_dbg_init + ql_dbg_verbose, 1361 vha, 0x00d8, "LOOP DOWN detected," 1362 "restore WWPN %016llx\n", 1363 wwn_to_u64(vha->port_name)); 1364 } 1365 1366 clear_bit(VP_CONFIG_OK, &vha->vp_flags); 1367 } 1368 1369 vha->device_flags |= DFLG_NO_CABLE; 1370 qla2x00_mark_all_devices_lost(vha); 1371 } 1372 1373 if (vha->vp_idx) { 1374 atomic_set(&vha->vp_state, VP_FAILED); 1375 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1376 } 1377 1378 vha->flags.management_server_logged_in = 0; 1379 ha->link_data_rate = PORT_SPEED_UNKNOWN; 1380 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0); 1381 break; 1382 1383 case MBA_LIP_RESET: /* LIP reset occurred */ 1384 ql_dbg(ql_dbg_async, vha, 0x500c, 1385 "LIP reset occurred (%x).\n", mb[1]); 1386 1387 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1388 atomic_set(&vha->loop_state, LOOP_DOWN); 1389 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1390 qla2x00_mark_all_devices_lost(vha); 1391 } 1392 1393 if (vha->vp_idx) { 1394 atomic_set(&vha->vp_state, VP_FAILED); 1395 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1396 } 1397 1398 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 1399 1400 ha->operating_mode = LOOP; 1401 vha->flags.management_server_logged_in = 0; 1402 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]); 1403 break; 1404 1405 /* case MBA_DCBX_COMPLETE: */ 1406 case MBA_POINT_TO_POINT: /* Point-to-Point */ 1407 ha->flags.lip_ae = 0; 1408 1409 if (IS_QLA2100(ha)) 1410 break; 1411 1412 if (IS_CNA_CAPABLE(ha)) { 1413 ql_dbg(ql_dbg_async, vha, 0x500d, 1414 "DCBX Completed -- %04x %04x %04x.\n", 1415 mb[1], mb[2], mb[3]); 1416 if (ha->notify_dcbx_comp && !vha->vp_idx) 1417 complete(&ha->dcbx_comp); 1418 1419 } else 1420 ql_dbg(ql_dbg_async, vha, 0x500e, 1421 "Asynchronous P2P MODE received.\n"); 1422 1423 /* 1424 * Until there's a transition from loop down to loop up, treat 1425 * this as loop down only. 1426 */ 1427 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1428 atomic_set(&vha->loop_state, LOOP_DOWN); 1429 if (!atomic_read(&vha->loop_down_timer)) 1430 atomic_set(&vha->loop_down_timer, 1431 LOOP_DOWN_TIME); 1432 if (!N2N_TOPO(ha)) 1433 qla2x00_mark_all_devices_lost(vha); 1434 } 1435 1436 if (vha->vp_idx) { 1437 atomic_set(&vha->vp_state, VP_FAILED); 1438 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1439 } 1440 1441 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) 1442 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 1443 1444 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); 1445 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); 1446 1447 vha->flags.management_server_logged_in = 0; 1448 break; 1449 1450 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */ 1451 if (IS_QLA2100(ha)) 1452 break; 1453 1454 ql_dbg(ql_dbg_async, vha, 0x500f, 1455 "Configuration change detected: value=%x.\n", mb[1]); 1456 1457 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1458 atomic_set(&vha->loop_state, LOOP_DOWN); 1459 if (!atomic_read(&vha->loop_down_timer)) 1460 atomic_set(&vha->loop_down_timer, 1461 LOOP_DOWN_TIME); 1462 qla2x00_mark_all_devices_lost(vha); 1463 } 1464 1465 if (vha->vp_idx) { 1466 atomic_set(&vha->vp_state, VP_FAILED); 1467 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); 1468 } 1469 1470 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1471 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1472 break; 1473 1474 case MBA_PORT_UPDATE: /* Port database update */ 1475 /* 1476 * Handle only global and vn-port update events 1477 * 1478 * Relevant inputs: 1479 * mb[1] = N_Port handle of changed port 1480 * OR 0xffff for global event 1481 * mb[2] = New login state 1482 * 7 = Port logged out 1483 * mb[3] = LSB is vp_idx, 0xff = all vps 1484 * 1485 * Skip processing if: 1486 * Event is global, vp_idx is NOT all vps, 1487 * vp_idx does not match 1488 * Event is not global, vp_idx does not match 1489 */ 1490 if (IS_QLA2XXX_MIDTYPE(ha) && 1491 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) || 1492 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff)) 1493 break; 1494 1495 if (mb[2] == 0x7) { 1496 ql_dbg(ql_dbg_async, vha, 0x5010, 1497 "Port %s %04x %04x %04x.\n", 1498 mb[1] == 0xffff ? "unavailable" : "logout", 1499 mb[1], mb[2], mb[3]); 1500 1501 if (mb[1] == 0xffff) 1502 goto global_port_update; 1503 1504 if (mb[1] == NPH_SNS_LID(ha)) { 1505 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1506 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1507 break; 1508 } 1509 1510 /* use handle_cnt for loop id/nport handle */ 1511 if (IS_FWI2_CAPABLE(ha)) 1512 handle_cnt = NPH_SNS; 1513 else 1514 handle_cnt = SIMPLE_NAME_SERVER; 1515 if (mb[1] == handle_cnt) { 1516 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1517 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1518 break; 1519 } 1520 1521 /* Port logout */ 1522 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]); 1523 if (!fcport) 1524 break; 1525 if (atomic_read(&fcport->state) != FCS_ONLINE) 1526 break; 1527 ql_dbg(ql_dbg_async, vha, 0x508a, 1528 "Marking port lost loopid=%04x portid=%06x.\n", 1529 fcport->loop_id, fcport->d_id.b24); 1530 if (qla_ini_mode_enabled(vha)) { 1531 fcport->logout_on_delete = 0; 1532 qlt_schedule_sess_for_deletion(fcport); 1533 } 1534 break; 1535 1536 global_port_update: 1537 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1538 atomic_set(&vha->loop_state, LOOP_DOWN); 1539 atomic_set(&vha->loop_down_timer, 1540 LOOP_DOWN_TIME); 1541 vha->device_flags |= DFLG_NO_CABLE; 1542 qla2x00_mark_all_devices_lost(vha); 1543 } 1544 1545 if (vha->vp_idx) { 1546 atomic_set(&vha->vp_state, VP_FAILED); 1547 fc_vport_set_state(vha->fc_vport, 1548 FC_VPORT_FAILED); 1549 qla2x00_mark_all_devices_lost(vha); 1550 } 1551 1552 vha->flags.management_server_logged_in = 0; 1553 ha->link_data_rate = PORT_SPEED_UNKNOWN; 1554 break; 1555 } 1556 1557 /* 1558 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET 1559 * event etc. earlier indicating loop is down) then process 1560 * it. Otherwise ignore it and Wait for RSCN to come in. 1561 */ 1562 atomic_set(&vha->loop_down_timer, 0); 1563 if (atomic_read(&vha->loop_state) != LOOP_DOWN && 1564 !ha->flags.n2n_ae && 1565 atomic_read(&vha->loop_state) != LOOP_DEAD) { 1566 ql_dbg(ql_dbg_async, vha, 0x5011, 1567 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n", 1568 mb[1], mb[2], mb[3]); 1569 break; 1570 } 1571 1572 ql_dbg(ql_dbg_async, vha, 0x5012, 1573 "Port database changed %04x %04x %04x.\n", 1574 mb[1], mb[2], mb[3]); 1575 1576 /* 1577 * Mark all devices as missing so we will login again. 1578 */ 1579 atomic_set(&vha->loop_state, LOOP_UP); 1580 vha->scan.scan_retry = 0; 1581 1582 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1583 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1584 set_bit(VP_CONFIG_OK, &vha->vp_flags); 1585 break; 1586 1587 case MBA_RSCN_UPDATE: /* State Change Registration */ 1588 /* Check if the Vport has issued a SCR */ 1589 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags)) 1590 break; 1591 /* Only handle SCNs for our Vport index. */ 1592 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff)) 1593 break; 1594 1595 ql_log(ql_log_warn, vha, 0x5013, 1596 "RSCN database changed -- %04x %04x %04x.\n", 1597 mb[1], mb[2], mb[3]); 1598 1599 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2]; 1600 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8) 1601 | vha->d_id.b.al_pa; 1602 if (rscn_entry == host_pid) { 1603 ql_dbg(ql_dbg_async, vha, 0x5014, 1604 "Ignoring RSCN update to local host " 1605 "port ID (%06x).\n", host_pid); 1606 break; 1607 } 1608 1609 /* Ignore reserved bits from RSCN-payload. */ 1610 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2]; 1611 1612 /* Skip RSCNs for virtual ports on the same physical port */ 1613 if (qla2x00_is_a_vp_did(vha, rscn_entry)) 1614 break; 1615 1616 atomic_set(&vha->loop_down_timer, 0); 1617 vha->flags.management_server_logged_in = 0; 1618 { 1619 struct event_arg ea; 1620 1621 memset(&ea, 0, sizeof(ea)); 1622 ea.id.b24 = rscn_entry; 1623 ea.id.b.rsvd_1 = rscn_entry >> 24; 1624 qla2x00_handle_rscn(vha, &ea); 1625 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry); 1626 } 1627 break; 1628 case MBA_CONGN_NOTI_RECV: 1629 if (!ha->flags.scm_enabled || 1630 mb[1] != QLA_CON_PRIMITIVE_RECEIVED) 1631 break; 1632 1633 if (mb[2] == QLA_CONGESTION_ARB_WARNING) { 1634 ql_dbg(ql_dbg_async, vha, 0x509b, 1635 "Congestion Warning %04x %04x.\n", mb[1], mb[2]); 1636 } else if (mb[2] == QLA_CONGESTION_ARB_ALARM) { 1637 ql_log(ql_log_warn, vha, 0x509b, 1638 "Congestion Alarm %04x %04x.\n", mb[1], mb[2]); 1639 } 1640 break; 1641 /* case MBA_RIO_RESPONSE: */ 1642 case MBA_ZIO_RESPONSE: 1643 ql_dbg(ql_dbg_async, vha, 0x5015, 1644 "[R|Z]IO update completion.\n"); 1645 1646 if (IS_FWI2_CAPABLE(ha)) 1647 qla24xx_process_response_queue(vha, rsp); 1648 else 1649 qla2x00_process_response_queue(rsp); 1650 break; 1651 1652 case MBA_DISCARD_RND_FRAME: 1653 ql_dbg(ql_dbg_async, vha, 0x5016, 1654 "Discard RND Frame -- %04x %04x %04x.\n", 1655 mb[1], mb[2], mb[3]); 1656 vha->interface_err_cnt++; 1657 break; 1658 1659 case MBA_TRACE_NOTIFICATION: 1660 ql_dbg(ql_dbg_async, vha, 0x5017, 1661 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]); 1662 break; 1663 1664 case MBA_ISP84XX_ALERT: 1665 ql_dbg(ql_dbg_async, vha, 0x5018, 1666 "ISP84XX Alert Notification -- %04x %04x %04x.\n", 1667 mb[1], mb[2], mb[3]); 1668 1669 spin_lock_irqsave(&ha->cs84xx->access_lock, flags); 1670 switch (mb[1]) { 1671 case A84_PANIC_RECOVERY: 1672 ql_log(ql_log_info, vha, 0x5019, 1673 "Alert 84XX: panic recovery %04x %04x.\n", 1674 mb[2], mb[3]); 1675 break; 1676 case A84_OP_LOGIN_COMPLETE: 1677 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; 1678 ql_log(ql_log_info, vha, 0x501a, 1679 "Alert 84XX: firmware version %x.\n", 1680 ha->cs84xx->op_fw_version); 1681 break; 1682 case A84_DIAG_LOGIN_COMPLETE: 1683 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; 1684 ql_log(ql_log_info, vha, 0x501b, 1685 "Alert 84XX: diagnostic firmware version %x.\n", 1686 ha->cs84xx->diag_fw_version); 1687 break; 1688 case A84_GOLD_LOGIN_COMPLETE: 1689 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; 1690 ha->cs84xx->fw_update = 1; 1691 ql_log(ql_log_info, vha, 0x501c, 1692 "Alert 84XX: gold firmware version %x.\n", 1693 ha->cs84xx->gold_fw_version); 1694 break; 1695 default: 1696 ql_log(ql_log_warn, vha, 0x501d, 1697 "Alert 84xx: Invalid Alert %04x %04x %04x.\n", 1698 mb[1], mb[2], mb[3]); 1699 } 1700 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); 1701 break; 1702 case MBA_DCBX_START: 1703 ql_dbg(ql_dbg_async, vha, 0x501e, 1704 "DCBX Started -- %04x %04x %04x.\n", 1705 mb[1], mb[2], mb[3]); 1706 break; 1707 case MBA_DCBX_PARAM_UPDATE: 1708 ql_dbg(ql_dbg_async, vha, 0x501f, 1709 "DCBX Parameters Updated -- %04x %04x %04x.\n", 1710 mb[1], mb[2], mb[3]); 1711 break; 1712 case MBA_FCF_CONF_ERR: 1713 ql_dbg(ql_dbg_async, vha, 0x5020, 1714 "FCF Configuration Error -- %04x %04x %04x.\n", 1715 mb[1], mb[2], mb[3]); 1716 break; 1717 case MBA_IDC_NOTIFY: 1718 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { 1719 mb[4] = rd_reg_word(®24->mailbox4); 1720 if (((mb[2] & 0x7fff) == MBC_PORT_RESET || 1721 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) && 1722 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) { 1723 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); 1724 /* 1725 * Extend loop down timer since port is active. 1726 */ 1727 if (atomic_read(&vha->loop_state) == LOOP_DOWN) 1728 atomic_set(&vha->loop_down_timer, 1729 LOOP_DOWN_TIME); 1730 qla2xxx_wake_dpc(vha); 1731 } 1732 } 1733 fallthrough; 1734 case MBA_IDC_COMPLETE: 1735 if (ha->notify_lb_portup_comp && !vha->vp_idx) 1736 complete(&ha->lb_portup_comp); 1737 fallthrough; 1738 case MBA_IDC_TIME_EXT: 1739 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || 1740 IS_QLA8044(ha)) 1741 qla81xx_idc_event(vha, mb[0], mb[1]); 1742 break; 1743 1744 case MBA_IDC_AEN: 1745 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1746 vha->hw_err_cnt++; 1747 qla27xx_handle_8200_aen(vha, mb); 1748 } else if (IS_QLA83XX(ha)) { 1749 mb[4] = rd_reg_word(®24->mailbox4); 1750 mb[5] = rd_reg_word(®24->mailbox5); 1751 mb[6] = rd_reg_word(®24->mailbox6); 1752 mb[7] = rd_reg_word(®24->mailbox7); 1753 qla83xx_handle_8200_aen(vha, mb); 1754 } else { 1755 ql_dbg(ql_dbg_async, vha, 0x5052, 1756 "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n", 1757 mb[0], mb[1], mb[2], mb[3]); 1758 } 1759 break; 1760 1761 case MBA_DPORT_DIAGNOSTICS: 1762 if ((mb[1] & 0xF) == AEN_DONE_DIAG_TEST_WITH_NOERR || 1763 (mb[1] & 0xF) == AEN_DONE_DIAG_TEST_WITH_ERR) 1764 vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS; 1765 ql_dbg(ql_dbg_async, vha, 0x5052, 1766 "D-Port Diagnostics: %04x %04x %04x %04x\n", 1767 mb[0], mb[1], mb[2], mb[3]); 1768 memcpy(vha->dport_data, mb, sizeof(vha->dport_data)); 1769 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 1770 static char *results[] = { 1771 "start", "done(pass)", "done(error)", "undefined" }; 1772 static char *types[] = { 1773 "none", "dynamic", "static", "other" }; 1774 uint result = mb[1] >> 0 & 0x3; 1775 uint type = mb[1] >> 6 & 0x3; 1776 uint sw = mb[1] >> 15 & 0x1; 1777 ql_dbg(ql_dbg_async, vha, 0x5052, 1778 "D-Port Diagnostics: result=%s type=%s [sw=%u]\n", 1779 results[result], types[type], sw); 1780 if (result == 2) { 1781 static char *reasons[] = { 1782 "reserved", "unexpected reject", 1783 "unexpected phase", "retry exceeded", 1784 "timed out", "not supported", 1785 "user stopped" }; 1786 uint reason = mb[2] >> 0 & 0xf; 1787 uint phase = mb[2] >> 12 & 0xf; 1788 ql_dbg(ql_dbg_async, vha, 0x5052, 1789 "D-Port Diagnostics: reason=%s phase=%u \n", 1790 reason < 7 ? reasons[reason] : "other", 1791 phase >> 1); 1792 } 1793 } 1794 break; 1795 1796 case MBA_TEMPERATURE_ALERT: 1797 ql_dbg(ql_dbg_async, vha, 0x505e, 1798 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]); 1799 break; 1800 1801 case MBA_TRANS_INSERT: 1802 ql_dbg(ql_dbg_async, vha, 0x5091, 1803 "Transceiver Insertion: %04x\n", mb[1]); 1804 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags); 1805 break; 1806 1807 case MBA_TRANS_REMOVE: 1808 ql_dbg(ql_dbg_async, vha, 0x5091, "Transceiver Removal\n"); 1809 break; 1810 1811 default: 1812 ql_dbg(ql_dbg_async, vha, 0x5057, 1813 "Unknown AEN:%04x %04x %04x %04x\n", 1814 mb[0], mb[1], mb[2], mb[3]); 1815 } 1816 1817 qlt_async_event(mb[0], vha, mb); 1818 1819 if (!vha->vp_idx && ha->num_vhosts) 1820 qla2x00_alert_all_vps(rsp, mb); 1821 } 1822 1823 /** 1824 * qla2x00_process_completed_request() - Process a Fast Post response. 1825 * @vha: SCSI driver HA context 1826 * @req: request queue 1827 * @index: SRB index 1828 */ 1829 void 1830 qla2x00_process_completed_request(struct scsi_qla_host *vha, 1831 struct req_que *req, uint32_t index) 1832 { 1833 srb_t *sp; 1834 struct qla_hw_data *ha = vha->hw; 1835 1836 /* Validate handle. */ 1837 if (index >= req->num_outstanding_cmds) { 1838 ql_log(ql_log_warn, vha, 0x3014, 1839 "Invalid SCSI command index (%x).\n", index); 1840 1841 if (IS_P3P_TYPE(ha)) 1842 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1843 else 1844 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1845 return; 1846 } 1847 1848 sp = req->outstanding_cmds[index]; 1849 if (sp) { 1850 /* Free outstanding command slot. */ 1851 req->outstanding_cmds[index] = NULL; 1852 1853 /* Save ISP completion status */ 1854 sp->done(sp, DID_OK << 16); 1855 } else { 1856 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n"); 1857 1858 if (IS_P3P_TYPE(ha)) 1859 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1860 else 1861 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1862 } 1863 } 1864 1865 static srb_t * 1866 qla_get_sp_from_handle(scsi_qla_host_t *vha, const char *func, 1867 struct req_que *req, void *iocb, u16 *ret_index) 1868 { 1869 struct qla_hw_data *ha = vha->hw; 1870 sts_entry_t *pkt = iocb; 1871 srb_t *sp; 1872 uint16_t index; 1873 1874 if (pkt->handle == QLA_SKIP_HANDLE) 1875 return NULL; 1876 1877 index = LSW(pkt->handle); 1878 if (index >= req->num_outstanding_cmds) { 1879 ql_log(ql_log_warn, vha, 0x5031, 1880 "%s: Invalid command index (%x) type %8ph.\n", 1881 func, index, iocb); 1882 if (IS_P3P_TYPE(ha)) 1883 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 1884 else 1885 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1886 return NULL; 1887 } 1888 sp = req->outstanding_cmds[index]; 1889 if (!sp) { 1890 ql_log(ql_log_warn, vha, 0x5032, 1891 "%s: Invalid completion handle (%x) -- timed-out.\n", 1892 func, index); 1893 return NULL; 1894 } 1895 if (sp->handle != index) { 1896 ql_log(ql_log_warn, vha, 0x5033, 1897 "%s: SRB handle (%x) mismatch %x.\n", func, 1898 sp->handle, index); 1899 return NULL; 1900 } 1901 1902 *ret_index = index; 1903 qla_put_fw_resources(sp->qpair, &sp->iores); 1904 return sp; 1905 } 1906 1907 srb_t * 1908 qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func, 1909 struct req_que *req, void *iocb) 1910 { 1911 uint16_t index; 1912 srb_t *sp; 1913 1914 sp = qla_get_sp_from_handle(vha, func, req, iocb, &index); 1915 if (sp) 1916 req->outstanding_cmds[index] = NULL; 1917 1918 return sp; 1919 } 1920 1921 static void 1922 qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 1923 struct mbx_entry *mbx) 1924 { 1925 const char func[] = "MBX-IOCB"; 1926 const char *type; 1927 fc_port_t *fcport; 1928 srb_t *sp; 1929 struct srb_iocb *lio; 1930 uint16_t *data; 1931 uint16_t status; 1932 1933 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx); 1934 if (!sp) 1935 return; 1936 1937 lio = &sp->u.iocb_cmd; 1938 type = sp->name; 1939 fcport = sp->fcport; 1940 data = lio->u.logio.data; 1941 1942 data[0] = MBS_COMMAND_ERROR; 1943 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 1944 QLA_LOGIO_LOGIN_RETRIED : 0; 1945 if (mbx->entry_status) { 1946 ql_dbg(ql_dbg_async, vha, 0x5043, 1947 "Async-%s error entry - hdl=%x portid=%02x%02x%02x " 1948 "entry-status=%x status=%x state-flag=%x " 1949 "status-flags=%x.\n", type, sp->handle, 1950 fcport->d_id.b.domain, fcport->d_id.b.area, 1951 fcport->d_id.b.al_pa, mbx->entry_status, 1952 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags), 1953 le16_to_cpu(mbx->status_flags)); 1954 1955 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029, 1956 mbx, sizeof(*mbx)); 1957 1958 goto logio_done; 1959 } 1960 1961 status = le16_to_cpu(mbx->status); 1962 if (status == 0x30 && sp->type == SRB_LOGIN_CMD && 1963 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) 1964 status = 0; 1965 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) { 1966 ql_dbg(ql_dbg_async, vha, 0x5045, 1967 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n", 1968 type, sp->handle, fcport->d_id.b.domain, 1969 fcport->d_id.b.area, fcport->d_id.b.al_pa, 1970 le16_to_cpu(mbx->mb1)); 1971 1972 data[0] = MBS_COMMAND_COMPLETE; 1973 if (sp->type == SRB_LOGIN_CMD) { 1974 fcport->port_type = FCT_TARGET; 1975 if (le16_to_cpu(mbx->mb1) & BIT_0) 1976 fcport->port_type = FCT_INITIATOR; 1977 else if (le16_to_cpu(mbx->mb1) & BIT_1) 1978 fcport->flags |= FCF_FCP2_DEVICE; 1979 } 1980 goto logio_done; 1981 } 1982 1983 data[0] = le16_to_cpu(mbx->mb0); 1984 switch (data[0]) { 1985 case MBS_PORT_ID_USED: 1986 data[1] = le16_to_cpu(mbx->mb1); 1987 break; 1988 case MBS_LOOP_ID_USED: 1989 break; 1990 default: 1991 data[0] = MBS_COMMAND_ERROR; 1992 break; 1993 } 1994 1995 ql_log(ql_log_warn, vha, 0x5046, 1996 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x " 1997 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle, 1998 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 1999 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1), 2000 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6), 2001 le16_to_cpu(mbx->mb7)); 2002 2003 logio_done: 2004 sp->done(sp, 0); 2005 } 2006 2007 static void 2008 qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2009 struct mbx_24xx_entry *pkt) 2010 { 2011 const char func[] = "MBX-IOCB2"; 2012 struct qla_hw_data *ha = vha->hw; 2013 srb_t *sp; 2014 struct srb_iocb *si; 2015 u16 sz, i; 2016 int res; 2017 2018 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2019 if (!sp) 2020 return; 2021 2022 if (sp->type == SRB_SCSI_CMD || 2023 sp->type == SRB_NVME_CMD || 2024 sp->type == SRB_TM_CMD) { 2025 ql_log(ql_log_warn, vha, 0x509d, 2026 "Inconsistent event entry type %d\n", sp->type); 2027 if (IS_P3P_TYPE(ha)) 2028 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 2029 else 2030 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2031 return; 2032 } 2033 2034 si = &sp->u.iocb_cmd; 2035 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb)); 2036 2037 for (i = 0; i < sz; i++) 2038 si->u.mbx.in_mb[i] = pkt->mb[i]; 2039 2040 res = (si->u.mbx.in_mb[0] & MBS_MASK); 2041 2042 sp->done(sp, res); 2043 } 2044 2045 static void 2046 qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2047 struct nack_to_isp *pkt) 2048 { 2049 const char func[] = "nack"; 2050 srb_t *sp; 2051 int res = 0; 2052 2053 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2054 if (!sp) 2055 return; 2056 2057 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS)) 2058 res = QLA_FUNCTION_FAILED; 2059 2060 sp->done(sp, res); 2061 } 2062 2063 static void 2064 qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req, 2065 sts_entry_t *pkt, int iocb_type) 2066 { 2067 const char func[] = "CT_IOCB"; 2068 const char *type; 2069 srb_t *sp; 2070 struct bsg_job *bsg_job; 2071 struct fc_bsg_reply *bsg_reply; 2072 uint16_t comp_status; 2073 int res = 0; 2074 2075 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2076 if (!sp) 2077 return; 2078 2079 switch (sp->type) { 2080 case SRB_CT_CMD: 2081 bsg_job = sp->u.bsg_job; 2082 bsg_reply = bsg_job->reply; 2083 2084 type = "ct pass-through"; 2085 2086 comp_status = le16_to_cpu(pkt->comp_status); 2087 2088 /* 2089 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT 2090 * fc payload to the caller 2091 */ 2092 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; 2093 bsg_job->reply_len = sizeof(struct fc_bsg_reply); 2094 2095 if (comp_status != CS_COMPLETE) { 2096 if (comp_status == CS_DATA_UNDERRUN) { 2097 res = DID_OK << 16; 2098 bsg_reply->reply_payload_rcv_len = 2099 le16_to_cpu(pkt->rsp_info_len); 2100 2101 ql_log(ql_log_warn, vha, 0x5048, 2102 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n", 2103 type, comp_status, 2104 bsg_reply->reply_payload_rcv_len); 2105 } else { 2106 ql_log(ql_log_warn, vha, 0x5049, 2107 "CT pass-through-%s error comp_status=0x%x.\n", 2108 type, comp_status); 2109 res = DID_ERROR << 16; 2110 bsg_reply->reply_payload_rcv_len = 0; 2111 } 2112 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035, 2113 pkt, sizeof(*pkt)); 2114 } else { 2115 res = DID_OK << 16; 2116 bsg_reply->reply_payload_rcv_len = 2117 bsg_job->reply_payload.payload_len; 2118 bsg_job->reply_len = 0; 2119 } 2120 break; 2121 case SRB_CT_PTHRU_CMD: 2122 /* 2123 * borrowing sts_entry_24xx.comp_status. 2124 * same location as ct_entry_24xx.comp_status 2125 */ 2126 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt, 2127 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, 2128 sp->name); 2129 break; 2130 } 2131 2132 sp->done(sp, res); 2133 } 2134 2135 static void 2136 qla24xx_els_ct_entry(scsi_qla_host_t *v, struct req_que *req, 2137 struct sts_entry_24xx *pkt, int iocb_type) 2138 { 2139 struct els_sts_entry_24xx *ese = (struct els_sts_entry_24xx *)pkt; 2140 const char func[] = "ELS_CT_IOCB"; 2141 const char *type; 2142 srb_t *sp; 2143 struct bsg_job *bsg_job; 2144 struct fc_bsg_reply *bsg_reply; 2145 uint16_t comp_status; 2146 uint32_t fw_status[3]; 2147 int res, logit = 1; 2148 struct srb_iocb *els; 2149 uint n; 2150 scsi_qla_host_t *vha; 2151 struct els_sts_entry_24xx *e = (struct els_sts_entry_24xx *)pkt; 2152 2153 sp = qla2x00_get_sp_from_handle(v, func, req, pkt); 2154 if (!sp) 2155 return; 2156 bsg_job = sp->u.bsg_job; 2157 vha = sp->vha; 2158 2159 type = NULL; 2160 2161 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status); 2162 fw_status[1] = le32_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_1); 2163 fw_status[2] = le32_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_2); 2164 2165 switch (sp->type) { 2166 case SRB_ELS_CMD_RPT: 2167 case SRB_ELS_CMD_HST: 2168 type = "rpt hst"; 2169 break; 2170 case SRB_ELS_CMD_HST_NOLOGIN: 2171 type = "els"; 2172 { 2173 struct els_entry_24xx *els = (void *)pkt; 2174 struct qla_bsg_auth_els_request *p = 2175 (struct qla_bsg_auth_els_request *)bsg_job->request; 2176 2177 ql_dbg(ql_dbg_user, vha, 0x700f, 2178 "%s %s. portid=%02x%02x%02x status %x xchg %x bsg ptr %p\n", 2179 __func__, sc_to_str(p->e.sub_cmd), 2180 e->d_id[2], e->d_id[1], e->d_id[0], 2181 comp_status, p->e.extra_rx_xchg_address, bsg_job); 2182 2183 if (!(le16_to_cpu(els->control_flags) & ECF_PAYLOAD_DESCR_MASK)) { 2184 if (sp->remap.remapped) { 2185 n = sg_copy_from_buffer(bsg_job->reply_payload.sg_list, 2186 bsg_job->reply_payload.sg_cnt, 2187 sp->remap.rsp.buf, 2188 sp->remap.rsp.len); 2189 ql_dbg(ql_dbg_user + ql_dbg_verbose, vha, 0x700e, 2190 "%s: SG copied %x of %x\n", 2191 __func__, n, sp->remap.rsp.len); 2192 } else { 2193 ql_dbg(ql_dbg_user, vha, 0x700f, 2194 "%s: NOT REMAPPED (error)...!!!\n", 2195 __func__); 2196 } 2197 } 2198 } 2199 break; 2200 case SRB_CT_CMD: 2201 type = "ct pass-through"; 2202 break; 2203 case SRB_ELS_DCMD: 2204 type = "Driver ELS logo"; 2205 if (iocb_type != ELS_IOCB_TYPE) { 2206 ql_dbg(ql_dbg_user, vha, 0x5047, 2207 "Completing %s: (%p) type=%d.\n", 2208 type, sp, sp->type); 2209 sp->done(sp, 0); 2210 return; 2211 } 2212 break; 2213 case SRB_CT_PTHRU_CMD: 2214 /* borrowing sts_entry_24xx.comp_status. 2215 same location as ct_entry_24xx.comp_status 2216 */ 2217 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt, 2218 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, 2219 sp->name); 2220 sp->done(sp, res); 2221 return; 2222 default: 2223 ql_dbg(ql_dbg_user, vha, 0x503e, 2224 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type); 2225 return; 2226 } 2227 2228 if (iocb_type == ELS_IOCB_TYPE) { 2229 els = &sp->u.iocb_cmd; 2230 els->u.els_plogi.fw_status[0] = cpu_to_le32(fw_status[0]); 2231 els->u.els_plogi.fw_status[1] = cpu_to_le32(fw_status[1]); 2232 els->u.els_plogi.fw_status[2] = cpu_to_le32(fw_status[2]); 2233 els->u.els_plogi.comp_status = cpu_to_le16(fw_status[0]); 2234 if (comp_status == CS_COMPLETE) { 2235 res = DID_OK << 16; 2236 } else { 2237 if (comp_status == CS_DATA_UNDERRUN) { 2238 res = DID_OK << 16; 2239 els->u.els_plogi.len = cpu_to_le16(le32_to_cpu( 2240 ese->total_byte_count)); 2241 2242 if (sp->remap.remapped && 2243 ((u8 *)sp->remap.rsp.buf)[0] == ELS_LS_ACC) { 2244 ql_dbg(ql_dbg_user, vha, 0x503f, 2245 "%s IOCB Done LS_ACC %02x%02x%02x -> %02x%02x%02x", 2246 __func__, e->s_id[0], e->s_id[2], e->s_id[1], 2247 e->d_id[2], e->d_id[1], e->d_id[0]); 2248 logit = 0; 2249 } 2250 2251 } else if (comp_status == CS_PORT_LOGGED_OUT) { 2252 ql_dbg(ql_dbg_disc, vha, 0x911e, 2253 "%s %d schedule session deletion\n", 2254 __func__, __LINE__); 2255 2256 els->u.els_plogi.len = 0; 2257 res = DID_IMM_RETRY << 16; 2258 qlt_schedule_sess_for_deletion(sp->fcport); 2259 } else { 2260 els->u.els_plogi.len = 0; 2261 res = DID_ERROR << 16; 2262 } 2263 2264 if (sp->remap.remapped && 2265 ((u8 *)sp->remap.rsp.buf)[0] == ELS_LS_RJT) { 2266 if (logit) { 2267 ql_dbg(ql_dbg_user, vha, 0x503f, 2268 "%s IOCB Done LS_RJT hdl=%x comp_status=0x%x\n", 2269 type, sp->handle, comp_status); 2270 2271 ql_dbg(ql_dbg_user, vha, 0x503f, 2272 "subcode 1=0x%x subcode 2=0x%x bytes=0x%x %02x%02x%02x -> %02x%02x%02x\n", 2273 fw_status[1], fw_status[2], 2274 le32_to_cpu(((struct els_sts_entry_24xx *) 2275 pkt)->total_byte_count), 2276 e->s_id[0], e->s_id[2], e->s_id[1], 2277 e->d_id[2], e->d_id[1], e->d_id[0]); 2278 } 2279 if (sp->fcport && sp->fcport->flags & FCF_FCSP_DEVICE && 2280 sp->type == SRB_ELS_CMD_HST_NOLOGIN) { 2281 ql_dbg(ql_dbg_edif, vha, 0x911e, 2282 "%s rcv reject. Sched delete\n", __func__); 2283 qlt_schedule_sess_for_deletion(sp->fcport); 2284 } 2285 } else if (logit) { 2286 ql_log(ql_log_info, vha, 0x503f, 2287 "%s IOCB Done hdl=%x comp_status=0x%x\n", 2288 type, sp->handle, comp_status); 2289 ql_log(ql_log_info, vha, 0x503f, 2290 "subcode 1=0x%x subcode 2=0x%x bytes=0x%x %02x%02x%02x -> %02x%02x%02x\n", 2291 fw_status[1], fw_status[2], 2292 le32_to_cpu(((struct els_sts_entry_24xx *) 2293 pkt)->total_byte_count), 2294 e->s_id[0], e->s_id[2], e->s_id[1], 2295 e->d_id[2], e->d_id[1], e->d_id[0]); 2296 } 2297 } 2298 goto els_ct_done; 2299 } 2300 2301 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT 2302 * fc payload to the caller 2303 */ 2304 bsg_job = sp->u.bsg_job; 2305 bsg_reply = bsg_job->reply; 2306 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; 2307 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status); 2308 2309 if (comp_status != CS_COMPLETE) { 2310 if (comp_status == CS_DATA_UNDERRUN) { 2311 res = DID_OK << 16; 2312 bsg_reply->reply_payload_rcv_len = 2313 le32_to_cpu(ese->total_byte_count); 2314 2315 ql_dbg(ql_dbg_user, vha, 0x503f, 2316 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " 2317 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n", 2318 type, sp->handle, comp_status, fw_status[1], fw_status[2], 2319 le32_to_cpu(ese->total_byte_count)); 2320 } else { 2321 ql_dbg(ql_dbg_user, vha, 0x5040, 2322 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " 2323 "error subcode 1=0x%x error subcode 2=0x%x.\n", 2324 type, sp->handle, comp_status, 2325 le32_to_cpu(ese->error_subcode_1), 2326 le32_to_cpu(ese->error_subcode_2)); 2327 res = DID_ERROR << 16; 2328 bsg_reply->reply_payload_rcv_len = 0; 2329 } 2330 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply), 2331 fw_status, sizeof(fw_status)); 2332 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056, 2333 pkt, sizeof(*pkt)); 2334 } 2335 else { 2336 res = DID_OK << 16; 2337 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len; 2338 bsg_job->reply_len = 0; 2339 } 2340 els_ct_done: 2341 2342 sp->done(sp, res); 2343 } 2344 2345 static void 2346 qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, 2347 struct logio_entry_24xx *logio) 2348 { 2349 const char func[] = "LOGIO-IOCB"; 2350 const char *type; 2351 fc_port_t *fcport; 2352 srb_t *sp; 2353 struct srb_iocb *lio; 2354 uint16_t *data; 2355 uint32_t iop[2]; 2356 int logit = 1; 2357 2358 sp = qla2x00_get_sp_from_handle(vha, func, req, logio); 2359 if (!sp) 2360 return; 2361 2362 lio = &sp->u.iocb_cmd; 2363 type = sp->name; 2364 fcport = sp->fcport; 2365 data = lio->u.logio.data; 2366 2367 data[0] = MBS_COMMAND_ERROR; 2368 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 2369 QLA_LOGIO_LOGIN_RETRIED : 0; 2370 if (logio->entry_status) { 2371 ql_log(ql_log_warn, fcport->vha, 0x5034, 2372 "Async-%s error entry - %8phC hdl=%x" 2373 "portid=%02x%02x%02x entry-status=%x.\n", 2374 type, fcport->port_name, sp->handle, fcport->d_id.b.domain, 2375 fcport->d_id.b.area, fcport->d_id.b.al_pa, 2376 logio->entry_status); 2377 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d, 2378 logio, sizeof(*logio)); 2379 2380 goto logio_done; 2381 } 2382 2383 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) { 2384 ql_dbg(ql_dbg_async, sp->vha, 0x5036, 2385 "Async-%s complete: handle=%x pid=%06x wwpn=%8phC iop0=%x\n", 2386 type, sp->handle, fcport->d_id.b24, fcport->port_name, 2387 le32_to_cpu(logio->io_parameter[0])); 2388 2389 vha->hw->exch_starvation = 0; 2390 data[0] = MBS_COMMAND_COMPLETE; 2391 2392 if (sp->type == SRB_PRLI_CMD) { 2393 lio->u.logio.iop[0] = 2394 le32_to_cpu(logio->io_parameter[0]); 2395 lio->u.logio.iop[1] = 2396 le32_to_cpu(logio->io_parameter[1]); 2397 goto logio_done; 2398 } 2399 2400 if (sp->type != SRB_LOGIN_CMD) 2401 goto logio_done; 2402 2403 lio->u.logio.iop[1] = le32_to_cpu(logio->io_parameter[5]); 2404 if (le32_to_cpu(logio->io_parameter[5]) & LIO_COMM_FEAT_FCSP) 2405 fcport->flags |= FCF_FCSP_DEVICE; 2406 2407 iop[0] = le32_to_cpu(logio->io_parameter[0]); 2408 if (iop[0] & BIT_4) { 2409 fcport->port_type = FCT_TARGET; 2410 if (iop[0] & BIT_8) 2411 fcport->flags |= FCF_FCP2_DEVICE; 2412 } else if (iop[0] & BIT_5) 2413 fcport->port_type = FCT_INITIATOR; 2414 2415 if (iop[0] & BIT_7) 2416 fcport->flags |= FCF_CONF_COMP_SUPPORTED; 2417 2418 if (logio->io_parameter[7] || logio->io_parameter[8]) 2419 fcport->supported_classes |= FC_COS_CLASS2; 2420 if (logio->io_parameter[9] || logio->io_parameter[10]) 2421 fcport->supported_classes |= FC_COS_CLASS3; 2422 2423 goto logio_done; 2424 } 2425 2426 iop[0] = le32_to_cpu(logio->io_parameter[0]); 2427 iop[1] = le32_to_cpu(logio->io_parameter[1]); 2428 lio->u.logio.iop[0] = iop[0]; 2429 lio->u.logio.iop[1] = iop[1]; 2430 switch (iop[0]) { 2431 case LSC_SCODE_PORTID_USED: 2432 data[0] = MBS_PORT_ID_USED; 2433 data[1] = LSW(iop[1]); 2434 logit = 0; 2435 break; 2436 case LSC_SCODE_NPORT_USED: 2437 data[0] = MBS_LOOP_ID_USED; 2438 logit = 0; 2439 break; 2440 case LSC_SCODE_CMD_FAILED: 2441 if (iop[1] == 0x0606) { 2442 /* 2443 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI, 2444 * Target side acked. 2445 */ 2446 data[0] = MBS_COMMAND_COMPLETE; 2447 goto logio_done; 2448 } 2449 data[0] = MBS_COMMAND_ERROR; 2450 break; 2451 case LSC_SCODE_NOXCB: 2452 vha->hw->exch_starvation++; 2453 if (vha->hw->exch_starvation > 5) { 2454 ql_log(ql_log_warn, vha, 0xd046, 2455 "Exchange starvation. Resetting RISC\n"); 2456 2457 vha->hw->exch_starvation = 0; 2458 2459 if (IS_P3P_TYPE(vha->hw)) 2460 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 2461 else 2462 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2463 qla2xxx_wake_dpc(vha); 2464 } 2465 fallthrough; 2466 default: 2467 data[0] = MBS_COMMAND_ERROR; 2468 break; 2469 } 2470 2471 if (logit) 2472 ql_log(ql_log_warn, sp->vha, 0x5037, "Async-%s failed: " 2473 "handle=%x pid=%06x wwpn=%8phC comp_status=%x iop0=%x iop1=%x\n", 2474 type, sp->handle, fcport->d_id.b24, fcport->port_name, 2475 le16_to_cpu(logio->comp_status), 2476 le32_to_cpu(logio->io_parameter[0]), 2477 le32_to_cpu(logio->io_parameter[1])); 2478 else 2479 ql_dbg(ql_dbg_disc, sp->vha, 0x5037, "Async-%s failed: " 2480 "handle=%x pid=%06x wwpn=%8phC comp_status=%x iop0=%x iop1=%x\n", 2481 type, sp->handle, fcport->d_id.b24, fcport->port_name, 2482 le16_to_cpu(logio->comp_status), 2483 le32_to_cpu(logio->io_parameter[0]), 2484 le32_to_cpu(logio->io_parameter[1])); 2485 2486 logio_done: 2487 sp->done(sp, 0); 2488 } 2489 2490 static void 2491 qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk) 2492 { 2493 const char func[] = "TMF-IOCB"; 2494 const char *type; 2495 fc_port_t *fcport; 2496 srb_t *sp; 2497 struct srb_iocb *iocb; 2498 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; 2499 u16 comp_status; 2500 2501 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk); 2502 if (!sp) 2503 return; 2504 2505 comp_status = le16_to_cpu(sts->comp_status); 2506 iocb = &sp->u.iocb_cmd; 2507 type = sp->name; 2508 fcport = sp->fcport; 2509 iocb->u.tmf.data = QLA_SUCCESS; 2510 2511 if (sts->entry_status) { 2512 ql_log(ql_log_warn, fcport->vha, 0x5038, 2513 "Async-%s error - hdl=%x entry-status(%x).\n", 2514 type, sp->handle, sts->entry_status); 2515 iocb->u.tmf.data = QLA_FUNCTION_FAILED; 2516 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) { 2517 ql_log(ql_log_warn, fcport->vha, 0x5039, 2518 "Async-%s error - hdl=%x completion status(%x).\n", 2519 type, sp->handle, comp_status); 2520 iocb->u.tmf.data = QLA_FUNCTION_FAILED; 2521 } else if ((le16_to_cpu(sts->scsi_status) & 2522 SS_RESPONSE_INFO_LEN_VALID)) { 2523 host_to_fcp_swap(sts->data, sizeof(sts->data)); 2524 if (le32_to_cpu(sts->rsp_data_len) < 4) { 2525 ql_log(ql_log_warn, fcport->vha, 0x503b, 2526 "Async-%s error - hdl=%x not enough response(%d).\n", 2527 type, sp->handle, sts->rsp_data_len); 2528 } else if (sts->data[3]) { 2529 ql_log(ql_log_warn, fcport->vha, 0x503c, 2530 "Async-%s error - hdl=%x response(%x).\n", 2531 type, sp->handle, sts->data[3]); 2532 iocb->u.tmf.data = QLA_FUNCTION_FAILED; 2533 } 2534 } 2535 2536 switch (comp_status) { 2537 case CS_PORT_LOGGED_OUT: 2538 case CS_PORT_CONFIG_CHG: 2539 case CS_PORT_BUSY: 2540 case CS_INCOMPLETE: 2541 case CS_PORT_UNAVAILABLE: 2542 case CS_TIMEOUT: 2543 case CS_RESET: 2544 if (atomic_read(&fcport->state) == FCS_ONLINE) { 2545 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021, 2546 "-Port to be marked lost on fcport=%02x%02x%02x, current port state= %s comp_status %x.\n", 2547 fcport->d_id.b.domain, fcport->d_id.b.area, 2548 fcport->d_id.b.al_pa, 2549 port_state_str[FCS_ONLINE], 2550 comp_status); 2551 2552 qlt_schedule_sess_for_deletion(fcport); 2553 } 2554 break; 2555 2556 default: 2557 break; 2558 } 2559 2560 if (iocb->u.tmf.data != QLA_SUCCESS) 2561 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055, 2562 sts, sizeof(*sts)); 2563 2564 sp->done(sp, 0); 2565 } 2566 2567 static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2568 void *tsk, srb_t *sp) 2569 { 2570 fc_port_t *fcport; 2571 struct srb_iocb *iocb; 2572 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; 2573 uint16_t state_flags; 2574 struct nvmefc_fcp_req *fd; 2575 uint16_t ret = QLA_SUCCESS; 2576 __le16 comp_status = sts->comp_status; 2577 int logit = 0; 2578 2579 iocb = &sp->u.iocb_cmd; 2580 fcport = sp->fcport; 2581 iocb->u.nvme.comp_status = comp_status; 2582 state_flags = le16_to_cpu(sts->state_flags); 2583 fd = iocb->u.nvme.desc; 2584 2585 if (unlikely(iocb->u.nvme.aen_op)) 2586 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt); 2587 else 2588 sp->qpair->cmd_completion_cnt++; 2589 2590 if (unlikely(comp_status != CS_COMPLETE)) 2591 logit = 1; 2592 2593 fd->transferred_length = fd->payload_length - 2594 le32_to_cpu(sts->residual_len); 2595 2596 /* 2597 * State flags: Bit 6 and 0. 2598 * If 0 is set, we don't care about 6. 2599 * both cases resp was dma'd to host buffer 2600 * if both are 0, that is good path case. 2601 * if six is set and 0 is clear, we need to 2602 * copy resp data from status iocb to resp buffer. 2603 */ 2604 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) { 2605 iocb->u.nvme.rsp_pyld_len = 0; 2606 } else if ((state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP)) == 2607 (SF_FCP_RSP_DMA | SF_NVME_ERSP)) { 2608 /* Response already DMA'd to fd->rspaddr. */ 2609 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len; 2610 } else if ((state_flags & SF_FCP_RSP_DMA)) { 2611 /* 2612 * Non-zero value in first 12 bytes of NVMe_RSP IU, treat this 2613 * as an error. 2614 */ 2615 iocb->u.nvme.rsp_pyld_len = 0; 2616 fd->transferred_length = 0; 2617 ql_dbg(ql_dbg_io, fcport->vha, 0x307a, 2618 "Unexpected values in NVMe_RSP IU.\n"); 2619 logit = 1; 2620 } else if (state_flags & SF_NVME_ERSP) { 2621 uint32_t *inbuf, *outbuf; 2622 uint16_t iter; 2623 2624 inbuf = (uint32_t *)&sts->nvme_ersp_data; 2625 outbuf = (uint32_t *)fd->rspaddr; 2626 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len; 2627 if (unlikely(le16_to_cpu(iocb->u.nvme.rsp_pyld_len) > 2628 sizeof(struct nvme_fc_ersp_iu))) { 2629 if (ql_mask_match(ql_dbg_io)) { 2630 WARN_ONCE(1, "Unexpected response payload length %u.\n", 2631 iocb->u.nvme.rsp_pyld_len); 2632 ql_log(ql_log_warn, fcport->vha, 0x5100, 2633 "Unexpected response payload length %u.\n", 2634 iocb->u.nvme.rsp_pyld_len); 2635 } 2636 iocb->u.nvme.rsp_pyld_len = 2637 cpu_to_le16(sizeof(struct nvme_fc_ersp_iu)); 2638 } 2639 iter = le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >> 2; 2640 for (; iter; iter--) 2641 *outbuf++ = swab32(*inbuf++); 2642 } 2643 2644 if (state_flags & SF_NVME_ERSP) { 2645 struct nvme_fc_ersp_iu *rsp_iu = fd->rspaddr; 2646 u32 tgt_xfer_len; 2647 2648 tgt_xfer_len = be32_to_cpu(rsp_iu->xfrd_len); 2649 if (fd->transferred_length != tgt_xfer_len) { 2650 ql_log(ql_log_warn, fcport->vha, 0x3079, 2651 "Dropped frame(s) detected (sent/rcvd=%u/%u).\n", 2652 tgt_xfer_len, fd->transferred_length); 2653 logit = 1; 2654 } else if (le16_to_cpu(comp_status) == CS_DATA_UNDERRUN) { 2655 /* 2656 * Do not log if this is just an underflow and there 2657 * is no data loss. 2658 */ 2659 logit = 0; 2660 } 2661 } 2662 2663 if (unlikely(logit)) 2664 ql_dbg(ql_dbg_io, fcport->vha, 0x5060, 2665 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n", 2666 sp->name, sp->handle, comp_status, 2667 fd->transferred_length, le32_to_cpu(sts->residual_len), 2668 sts->ox_id); 2669 2670 /* 2671 * If transport error then Failure (HBA rejects request) 2672 * otherwise transport will handle. 2673 */ 2674 switch (le16_to_cpu(comp_status)) { 2675 case CS_COMPLETE: 2676 break; 2677 2678 case CS_RESET: 2679 case CS_PORT_UNAVAILABLE: 2680 case CS_PORT_LOGGED_OUT: 2681 fcport->nvme_flag |= NVME_FLAG_RESETTING; 2682 if (atomic_read(&fcport->state) == FCS_ONLINE) { 2683 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021, 2684 "Port to be marked lost on fcport=%06x, current " 2685 "port state= %s comp_status %x.\n", 2686 fcport->d_id.b24, port_state_str[FCS_ONLINE], 2687 comp_status); 2688 2689 qlt_schedule_sess_for_deletion(fcport); 2690 } 2691 fallthrough; 2692 case CS_ABORTED: 2693 case CS_PORT_BUSY: 2694 fd->transferred_length = 0; 2695 iocb->u.nvme.rsp_pyld_len = 0; 2696 ret = QLA_ABORTED; 2697 break; 2698 case CS_DATA_UNDERRUN: 2699 break; 2700 default: 2701 ret = QLA_FUNCTION_FAILED; 2702 break; 2703 } 2704 sp->done(sp, ret); 2705 } 2706 2707 static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req, 2708 struct vp_ctrl_entry_24xx *vce) 2709 { 2710 const char func[] = "CTRLVP-IOCB"; 2711 srb_t *sp; 2712 int rval = QLA_SUCCESS; 2713 2714 sp = qla2x00_get_sp_from_handle(vha, func, req, vce); 2715 if (!sp) 2716 return; 2717 2718 if (vce->entry_status != 0) { 2719 ql_dbg(ql_dbg_vport, vha, 0x10c4, 2720 "%s: Failed to complete IOCB -- error status (%x)\n", 2721 sp->name, vce->entry_status); 2722 rval = QLA_FUNCTION_FAILED; 2723 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { 2724 ql_dbg(ql_dbg_vport, vha, 0x10c5, 2725 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n", 2726 sp->name, le16_to_cpu(vce->comp_status), 2727 le16_to_cpu(vce->vp_idx_failed)); 2728 rval = QLA_FUNCTION_FAILED; 2729 } else { 2730 ql_dbg(ql_dbg_vport, vha, 0x10c6, 2731 "Done %s.\n", __func__); 2732 } 2733 2734 sp->rc = rval; 2735 sp->done(sp, rval); 2736 } 2737 2738 /* Process a single response queue entry. */ 2739 static void qla2x00_process_response_entry(struct scsi_qla_host *vha, 2740 struct rsp_que *rsp, 2741 sts_entry_t *pkt) 2742 { 2743 sts21_entry_t *sts21_entry; 2744 sts22_entry_t *sts22_entry; 2745 uint16_t handle_cnt; 2746 uint16_t cnt; 2747 2748 switch (pkt->entry_type) { 2749 case STATUS_TYPE: 2750 qla2x00_status_entry(vha, rsp, pkt); 2751 break; 2752 case STATUS_TYPE_21: 2753 sts21_entry = (sts21_entry_t *)pkt; 2754 handle_cnt = sts21_entry->handle_count; 2755 for (cnt = 0; cnt < handle_cnt; cnt++) 2756 qla2x00_process_completed_request(vha, rsp->req, 2757 sts21_entry->handle[cnt]); 2758 break; 2759 case STATUS_TYPE_22: 2760 sts22_entry = (sts22_entry_t *)pkt; 2761 handle_cnt = sts22_entry->handle_count; 2762 for (cnt = 0; cnt < handle_cnt; cnt++) 2763 qla2x00_process_completed_request(vha, rsp->req, 2764 sts22_entry->handle[cnt]); 2765 break; 2766 case STATUS_CONT_TYPE: 2767 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); 2768 break; 2769 case MBX_IOCB_TYPE: 2770 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt); 2771 break; 2772 case CT_IOCB_TYPE: 2773 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); 2774 break; 2775 default: 2776 /* Type Not Supported. */ 2777 ql_log(ql_log_warn, vha, 0x504a, 2778 "Received unknown response pkt type %x entry status=%x.\n", 2779 pkt->entry_type, pkt->entry_status); 2780 break; 2781 } 2782 } 2783 2784 /** 2785 * qla2x00_process_response_queue() - Process response queue entries. 2786 * @rsp: response queue 2787 */ 2788 void 2789 qla2x00_process_response_queue(struct rsp_que *rsp) 2790 { 2791 struct scsi_qla_host *vha; 2792 struct qla_hw_data *ha = rsp->hw; 2793 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2794 sts_entry_t *pkt; 2795 2796 vha = pci_get_drvdata(ha->pdev); 2797 2798 if (!vha->flags.online) 2799 return; 2800 2801 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { 2802 pkt = (sts_entry_t *)rsp->ring_ptr; 2803 2804 rsp->ring_index++; 2805 if (rsp->ring_index == rsp->length) { 2806 rsp->ring_index = 0; 2807 rsp->ring_ptr = rsp->ring; 2808 } else { 2809 rsp->ring_ptr++; 2810 } 2811 2812 if (pkt->entry_status != 0) { 2813 qla2x00_error_entry(vha, rsp, pkt); 2814 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 2815 wmb(); 2816 continue; 2817 } 2818 2819 qla2x00_process_response_entry(vha, rsp, pkt); 2820 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 2821 wmb(); 2822 } 2823 2824 /* Adjust ring index */ 2825 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); 2826 } 2827 2828 static inline void 2829 qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, 2830 uint32_t sense_len, struct rsp_que *rsp, int res) 2831 { 2832 struct scsi_qla_host *vha = sp->vha; 2833 struct scsi_cmnd *cp = GET_CMD_SP(sp); 2834 uint32_t track_sense_len; 2835 2836 if (sense_len >= SCSI_SENSE_BUFFERSIZE) 2837 sense_len = SCSI_SENSE_BUFFERSIZE; 2838 2839 SET_CMD_SENSE_LEN(sp, sense_len); 2840 SET_CMD_SENSE_PTR(sp, cp->sense_buffer); 2841 track_sense_len = sense_len; 2842 2843 if (sense_len > par_sense_len) 2844 sense_len = par_sense_len; 2845 2846 memcpy(cp->sense_buffer, sense_data, sense_len); 2847 2848 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); 2849 track_sense_len -= sense_len; 2850 SET_CMD_SENSE_LEN(sp, track_sense_len); 2851 2852 if (track_sense_len != 0) { 2853 rsp->status_srb = sp; 2854 cp->result = res; 2855 } 2856 2857 if (sense_len) { 2858 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c, 2859 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n", 2860 sp->vha->host_no, cp->device->id, cp->device->lun, 2861 cp); 2862 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b, 2863 cp->sense_buffer, sense_len); 2864 } 2865 } 2866 2867 struct scsi_dif_tuple { 2868 __be16 guard; /* Checksum */ 2869 __be16 app_tag; /* APPL identifier */ 2870 __be32 ref_tag; /* Target LBA or indirect LBA */ 2871 }; 2872 2873 /* 2874 * Checks the guard or meta-data for the type of error 2875 * detected by the HBA. In case of errors, we set the 2876 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST 2877 * to indicate to the kernel that the HBA detected error. 2878 */ 2879 static inline int 2880 qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) 2881 { 2882 struct scsi_qla_host *vha = sp->vha; 2883 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 2884 uint8_t *ap = &sts24->data[12]; 2885 uint8_t *ep = &sts24->data[20]; 2886 uint32_t e_ref_tag, a_ref_tag; 2887 uint16_t e_app_tag, a_app_tag; 2888 uint16_t e_guard, a_guard; 2889 2890 /* 2891 * swab32 of the "data" field in the beginning of qla2x00_status_entry() 2892 * would make guard field appear at offset 2 2893 */ 2894 a_guard = get_unaligned_le16(ap + 2); 2895 a_app_tag = get_unaligned_le16(ap + 0); 2896 a_ref_tag = get_unaligned_le32(ap + 4); 2897 e_guard = get_unaligned_le16(ep + 2); 2898 e_app_tag = get_unaligned_le16(ep + 0); 2899 e_ref_tag = get_unaligned_le32(ep + 4); 2900 2901 ql_dbg(ql_dbg_io, vha, 0x3023, 2902 "iocb(s) %p Returned STATUS.\n", sts24); 2903 2904 ql_dbg(ql_dbg_io, vha, 0x3024, 2905 "DIF ERROR in cmd 0x%x lba 0x%llx act ref" 2906 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app" 2907 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n", 2908 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, 2909 a_app_tag, e_app_tag, a_guard, e_guard); 2910 2911 /* 2912 * Ignore sector if: 2913 * For type 3: ref & app tag is all 'f's 2914 * For type 0,1,2: app tag is all 'f's 2915 */ 2916 if (a_app_tag == be16_to_cpu(T10_PI_APP_ESCAPE) && 2917 (scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3 || 2918 a_ref_tag == be32_to_cpu(T10_PI_REF_ESCAPE))) { 2919 uint32_t blocks_done, resid; 2920 sector_t lba_s = scsi_get_lba(cmd); 2921 2922 /* 2TB boundary case covered automatically with this */ 2923 blocks_done = e_ref_tag - (uint32_t)lba_s + 1; 2924 2925 resid = scsi_bufflen(cmd) - (blocks_done * 2926 cmd->device->sector_size); 2927 2928 scsi_set_resid(cmd, resid); 2929 cmd->result = DID_OK << 16; 2930 2931 /* Update protection tag */ 2932 if (scsi_prot_sg_count(cmd)) { 2933 uint32_t i, j = 0, k = 0, num_ent; 2934 struct scatterlist *sg; 2935 struct t10_pi_tuple *spt; 2936 2937 /* Patch the corresponding protection tags */ 2938 scsi_for_each_prot_sg(cmd, sg, 2939 scsi_prot_sg_count(cmd), i) { 2940 num_ent = sg_dma_len(sg) / 8; 2941 if (k + num_ent < blocks_done) { 2942 k += num_ent; 2943 continue; 2944 } 2945 j = blocks_done - k - 1; 2946 k = blocks_done; 2947 break; 2948 } 2949 2950 if (k != blocks_done) { 2951 ql_log(ql_log_warn, vha, 0x302f, 2952 "unexpected tag values tag:lba=%x:%llx)\n", 2953 e_ref_tag, (unsigned long long)lba_s); 2954 return 1; 2955 } 2956 2957 spt = page_address(sg_page(sg)) + sg->offset; 2958 spt += j; 2959 2960 spt->app_tag = T10_PI_APP_ESCAPE; 2961 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3) 2962 spt->ref_tag = T10_PI_REF_ESCAPE; 2963 } 2964 2965 return 0; 2966 } 2967 2968 /* check guard */ 2969 if (e_guard != a_guard) { 2970 scsi_build_sense(cmd, 1, ILLEGAL_REQUEST, 0x10, 0x1); 2971 set_host_byte(cmd, DID_ABORT); 2972 return 1; 2973 } 2974 2975 /* check ref tag */ 2976 if (e_ref_tag != a_ref_tag) { 2977 scsi_build_sense(cmd, 1, ILLEGAL_REQUEST, 0x10, 0x3); 2978 set_host_byte(cmd, DID_ABORT); 2979 return 1; 2980 } 2981 2982 /* check appl tag */ 2983 if (e_app_tag != a_app_tag) { 2984 scsi_build_sense(cmd, 1, ILLEGAL_REQUEST, 0x10, 0x2); 2985 set_host_byte(cmd, DID_ABORT); 2986 return 1; 2987 } 2988 2989 return 1; 2990 } 2991 2992 static void 2993 qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt, 2994 struct req_que *req, uint32_t index) 2995 { 2996 struct qla_hw_data *ha = vha->hw; 2997 srb_t *sp; 2998 uint16_t comp_status; 2999 uint16_t scsi_status; 3000 uint16_t thread_id; 3001 uint32_t rval = EXT_STATUS_OK; 3002 struct bsg_job *bsg_job = NULL; 3003 struct fc_bsg_request *bsg_request; 3004 struct fc_bsg_reply *bsg_reply; 3005 sts_entry_t *sts = pkt; 3006 struct sts_entry_24xx *sts24 = pkt; 3007 3008 /* Validate handle. */ 3009 if (index >= req->num_outstanding_cmds) { 3010 ql_log(ql_log_warn, vha, 0x70af, 3011 "Invalid SCSI completion handle 0x%x.\n", index); 3012 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3013 return; 3014 } 3015 3016 sp = req->outstanding_cmds[index]; 3017 if (!sp) { 3018 ql_log(ql_log_warn, vha, 0x70b0, 3019 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n", 3020 req->id, index); 3021 3022 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3023 return; 3024 } 3025 3026 /* Free outstanding command slot. */ 3027 req->outstanding_cmds[index] = NULL; 3028 bsg_job = sp->u.bsg_job; 3029 bsg_request = bsg_job->request; 3030 bsg_reply = bsg_job->reply; 3031 3032 if (IS_FWI2_CAPABLE(ha)) { 3033 comp_status = le16_to_cpu(sts24->comp_status); 3034 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; 3035 } else { 3036 comp_status = le16_to_cpu(sts->comp_status); 3037 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; 3038 } 3039 3040 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1]; 3041 switch (comp_status) { 3042 case CS_COMPLETE: 3043 if (scsi_status == 0) { 3044 bsg_reply->reply_payload_rcv_len = 3045 bsg_job->reply_payload.payload_len; 3046 vha->qla_stats.input_bytes += 3047 bsg_reply->reply_payload_rcv_len; 3048 vha->qla_stats.input_requests++; 3049 rval = EXT_STATUS_OK; 3050 } 3051 goto done; 3052 3053 case CS_DATA_OVERRUN: 3054 ql_dbg(ql_dbg_user, vha, 0x70b1, 3055 "Command completed with data overrun thread_id=%d\n", 3056 thread_id); 3057 rval = EXT_STATUS_DATA_OVERRUN; 3058 break; 3059 3060 case CS_DATA_UNDERRUN: 3061 ql_dbg(ql_dbg_user, vha, 0x70b2, 3062 "Command completed with data underrun thread_id=%d\n", 3063 thread_id); 3064 rval = EXT_STATUS_DATA_UNDERRUN; 3065 break; 3066 case CS_BIDIR_RD_OVERRUN: 3067 ql_dbg(ql_dbg_user, vha, 0x70b3, 3068 "Command completed with read data overrun thread_id=%d\n", 3069 thread_id); 3070 rval = EXT_STATUS_DATA_OVERRUN; 3071 break; 3072 3073 case CS_BIDIR_RD_WR_OVERRUN: 3074 ql_dbg(ql_dbg_user, vha, 0x70b4, 3075 "Command completed with read and write data overrun " 3076 "thread_id=%d\n", thread_id); 3077 rval = EXT_STATUS_DATA_OVERRUN; 3078 break; 3079 3080 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN: 3081 ql_dbg(ql_dbg_user, vha, 0x70b5, 3082 "Command completed with read data over and write data " 3083 "underrun thread_id=%d\n", thread_id); 3084 rval = EXT_STATUS_DATA_OVERRUN; 3085 break; 3086 3087 case CS_BIDIR_RD_UNDERRUN: 3088 ql_dbg(ql_dbg_user, vha, 0x70b6, 3089 "Command completed with read data underrun " 3090 "thread_id=%d\n", thread_id); 3091 rval = EXT_STATUS_DATA_UNDERRUN; 3092 break; 3093 3094 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN: 3095 ql_dbg(ql_dbg_user, vha, 0x70b7, 3096 "Command completed with read data under and write data " 3097 "overrun thread_id=%d\n", thread_id); 3098 rval = EXT_STATUS_DATA_UNDERRUN; 3099 break; 3100 3101 case CS_BIDIR_RD_WR_UNDERRUN: 3102 ql_dbg(ql_dbg_user, vha, 0x70b8, 3103 "Command completed with read and write data underrun " 3104 "thread_id=%d\n", thread_id); 3105 rval = EXT_STATUS_DATA_UNDERRUN; 3106 break; 3107 3108 case CS_BIDIR_DMA: 3109 ql_dbg(ql_dbg_user, vha, 0x70b9, 3110 "Command completed with data DMA error thread_id=%d\n", 3111 thread_id); 3112 rval = EXT_STATUS_DMA_ERR; 3113 break; 3114 3115 case CS_TIMEOUT: 3116 ql_dbg(ql_dbg_user, vha, 0x70ba, 3117 "Command completed with timeout thread_id=%d\n", 3118 thread_id); 3119 rval = EXT_STATUS_TIMEOUT; 3120 break; 3121 default: 3122 ql_dbg(ql_dbg_user, vha, 0x70bb, 3123 "Command completed with completion status=0x%x " 3124 "thread_id=%d\n", comp_status, thread_id); 3125 rval = EXT_STATUS_ERR; 3126 break; 3127 } 3128 bsg_reply->reply_payload_rcv_len = 0; 3129 3130 done: 3131 /* Return the vendor specific reply to API */ 3132 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval; 3133 bsg_job->reply_len = sizeof(struct fc_bsg_reply); 3134 /* Always return DID_OK, bsg will send the vendor specific response 3135 * in this case only */ 3136 sp->done(sp, DID_OK << 16); 3137 3138 } 3139 3140 /** 3141 * qla2x00_status_entry() - Process a Status IOCB entry. 3142 * @vha: SCSI driver HA context 3143 * @rsp: response queue 3144 * @pkt: Entry pointer 3145 */ 3146 static void 3147 qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) 3148 { 3149 srb_t *sp; 3150 fc_port_t *fcport; 3151 struct scsi_cmnd *cp; 3152 sts_entry_t *sts = pkt; 3153 struct sts_entry_24xx *sts24 = pkt; 3154 uint16_t comp_status; 3155 uint16_t scsi_status; 3156 uint16_t ox_id; 3157 uint8_t lscsi_status; 3158 int32_t resid; 3159 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, 3160 fw_resid_len; 3161 uint8_t *rsp_info, *sense_data; 3162 struct qla_hw_data *ha = vha->hw; 3163 uint32_t handle; 3164 uint16_t que; 3165 struct req_que *req; 3166 int logit = 1; 3167 int res = 0; 3168 uint16_t state_flags = 0; 3169 uint16_t sts_qual = 0; 3170 3171 if (IS_FWI2_CAPABLE(ha)) { 3172 comp_status = le16_to_cpu(sts24->comp_status); 3173 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; 3174 state_flags = le16_to_cpu(sts24->state_flags); 3175 } else { 3176 comp_status = le16_to_cpu(sts->comp_status); 3177 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; 3178 } 3179 handle = (uint32_t) LSW(sts->handle); 3180 que = MSW(sts->handle); 3181 req = ha->req_q_map[que]; 3182 3183 /* Check for invalid queue pointer */ 3184 if (req == NULL || 3185 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) { 3186 ql_dbg(ql_dbg_io, vha, 0x3059, 3187 "Invalid status handle (0x%x): Bad req pointer. req=%p, " 3188 "que=%u.\n", sts->handle, req, que); 3189 return; 3190 } 3191 3192 /* Validate handle. */ 3193 if (handle < req->num_outstanding_cmds) { 3194 sp = req->outstanding_cmds[handle]; 3195 if (!sp) { 3196 ql_dbg(ql_dbg_io, vha, 0x3075, 3197 "%s(%ld): Already returned command for status handle (0x%x).\n", 3198 __func__, vha->host_no, sts->handle); 3199 return; 3200 } 3201 } else { 3202 ql_dbg(ql_dbg_io, vha, 0x3017, 3203 "Invalid status handle, out of range (0x%x).\n", 3204 sts->handle); 3205 3206 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { 3207 if (IS_P3P_TYPE(ha)) 3208 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); 3209 else 3210 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3211 qla2xxx_wake_dpc(vha); 3212 } 3213 return; 3214 } 3215 qla_put_fw_resources(sp->qpair, &sp->iores); 3216 3217 if (sp->cmd_type != TYPE_SRB) { 3218 req->outstanding_cmds[handle] = NULL; 3219 ql_dbg(ql_dbg_io, vha, 0x3015, 3220 "Unknown sp->cmd_type %x %p).\n", 3221 sp->cmd_type, sp); 3222 return; 3223 } 3224 3225 /* NVME completion. */ 3226 if (sp->type == SRB_NVME_CMD) { 3227 req->outstanding_cmds[handle] = NULL; 3228 qla24xx_nvme_iocb_entry(vha, req, pkt, sp); 3229 return; 3230 } 3231 3232 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) { 3233 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle); 3234 return; 3235 } 3236 3237 /* Task Management completion. */ 3238 if (sp->type == SRB_TM_CMD) { 3239 qla24xx_tm_iocb_entry(vha, req, pkt); 3240 return; 3241 } 3242 3243 /* Fast path completion. */ 3244 qla_chk_edif_rx_sa_delete_pending(vha, sp, sts24); 3245 sp->qpair->cmd_completion_cnt++; 3246 3247 if (comp_status == CS_COMPLETE && scsi_status == 0) { 3248 qla2x00_process_completed_request(vha, req, handle); 3249 3250 return; 3251 } 3252 3253 cp = GET_CMD_SP(sp); 3254 if (cp == NULL) { 3255 ql_dbg(ql_dbg_io, vha, 0x3018, 3256 "Command already returned (0x%x/%p).\n", 3257 sts->handle, sp); 3258 3259 req->outstanding_cmds[handle] = NULL; 3260 return; 3261 } 3262 3263 lscsi_status = scsi_status & STATUS_MASK; 3264 3265 fcport = sp->fcport; 3266 3267 ox_id = 0; 3268 sense_len = par_sense_len = rsp_info_len = resid_len = 3269 fw_resid_len = 0; 3270 if (IS_FWI2_CAPABLE(ha)) { 3271 if (scsi_status & SS_SENSE_LEN_VALID) 3272 sense_len = le32_to_cpu(sts24->sense_len); 3273 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) 3274 rsp_info_len = le32_to_cpu(sts24->rsp_data_len); 3275 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) 3276 resid_len = le32_to_cpu(sts24->rsp_residual_count); 3277 if (comp_status == CS_DATA_UNDERRUN) 3278 fw_resid_len = le32_to_cpu(sts24->residual_len); 3279 rsp_info = sts24->data; 3280 sense_data = sts24->data; 3281 host_to_fcp_swap(sts24->data, sizeof(sts24->data)); 3282 ox_id = le16_to_cpu(sts24->ox_id); 3283 par_sense_len = sizeof(sts24->data); 3284 sts_qual = le16_to_cpu(sts24->status_qualifier); 3285 } else { 3286 if (scsi_status & SS_SENSE_LEN_VALID) 3287 sense_len = le16_to_cpu(sts->req_sense_length); 3288 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) 3289 rsp_info_len = le16_to_cpu(sts->rsp_info_len); 3290 resid_len = le32_to_cpu(sts->residual_length); 3291 rsp_info = sts->rsp_info; 3292 sense_data = sts->req_sense_data; 3293 par_sense_len = sizeof(sts->req_sense_data); 3294 } 3295 3296 /* Check for any FCP transport errors. */ 3297 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) { 3298 /* Sense data lies beyond any FCP RESPONSE data. */ 3299 if (IS_FWI2_CAPABLE(ha)) { 3300 sense_data += rsp_info_len; 3301 par_sense_len -= rsp_info_len; 3302 } 3303 if (rsp_info_len > 3 && rsp_info[3]) { 3304 ql_dbg(ql_dbg_io, fcport->vha, 0x3019, 3305 "FCP I/O protocol failure (0x%x/0x%x).\n", 3306 rsp_info_len, rsp_info[3]); 3307 3308 res = DID_BUS_BUSY << 16; 3309 goto out; 3310 } 3311 } 3312 3313 /* Check for overrun. */ 3314 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && 3315 scsi_status & SS_RESIDUAL_OVER) 3316 comp_status = CS_DATA_OVERRUN; 3317 3318 /* 3319 * Check retry_delay_timer value if we receive a busy or 3320 * queue full. 3321 */ 3322 if (unlikely(lscsi_status == SAM_STAT_TASK_SET_FULL || 3323 lscsi_status == SAM_STAT_BUSY)) 3324 qla2x00_set_retry_delay_timestamp(fcport, sts_qual); 3325 3326 /* 3327 * Based on Host and scsi status generate status code for Linux 3328 */ 3329 switch (comp_status) { 3330 case CS_COMPLETE: 3331 case CS_QUEUE_FULL: 3332 if (scsi_status == 0) { 3333 res = DID_OK << 16; 3334 break; 3335 } 3336 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) { 3337 resid = resid_len; 3338 scsi_set_resid(cp, resid); 3339 3340 if (!lscsi_status && 3341 ((unsigned)(scsi_bufflen(cp) - resid) < 3342 cp->underflow)) { 3343 ql_dbg(ql_dbg_io, fcport->vha, 0x301a, 3344 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", 3345 resid, scsi_bufflen(cp)); 3346 3347 res = DID_ERROR << 16; 3348 break; 3349 } 3350 } 3351 res = DID_OK << 16 | lscsi_status; 3352 3353 if (lscsi_status == SAM_STAT_TASK_SET_FULL) { 3354 ql_dbg(ql_dbg_io, fcport->vha, 0x301b, 3355 "QUEUE FULL detected.\n"); 3356 break; 3357 } 3358 logit = 0; 3359 if (lscsi_status != SS_CHECK_CONDITION) 3360 break; 3361 3362 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 3363 if (!(scsi_status & SS_SENSE_LEN_VALID)) 3364 break; 3365 3366 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len, 3367 rsp, res); 3368 break; 3369 3370 case CS_DATA_UNDERRUN: 3371 /* Use F/W calculated residual length. */ 3372 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len; 3373 scsi_set_resid(cp, resid); 3374 if (scsi_status & SS_RESIDUAL_UNDER) { 3375 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) { 3376 ql_log(ql_log_warn, fcport->vha, 0x301d, 3377 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", 3378 resid, scsi_bufflen(cp)); 3379 3380 res = DID_ERROR << 16 | lscsi_status; 3381 goto check_scsi_status; 3382 } 3383 3384 if (!lscsi_status && 3385 ((unsigned)(scsi_bufflen(cp) - resid) < 3386 cp->underflow)) { 3387 ql_dbg(ql_dbg_io, fcport->vha, 0x301e, 3388 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", 3389 resid, scsi_bufflen(cp)); 3390 3391 res = DID_ERROR << 16; 3392 break; 3393 } 3394 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && 3395 lscsi_status != SAM_STAT_BUSY) { 3396 /* 3397 * scsi status of task set and busy are considered to be 3398 * task not completed. 3399 */ 3400 3401 ql_log(ql_log_warn, fcport->vha, 0x301f, 3402 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", 3403 resid, scsi_bufflen(cp)); 3404 3405 vha->interface_err_cnt++; 3406 3407 res = DID_ERROR << 16 | lscsi_status; 3408 goto check_scsi_status; 3409 } else { 3410 ql_dbg(ql_dbg_io, fcport->vha, 0x3030, 3411 "scsi_status: 0x%x, lscsi_status: 0x%x\n", 3412 scsi_status, lscsi_status); 3413 } 3414 3415 res = DID_OK << 16 | lscsi_status; 3416 logit = 0; 3417 3418 check_scsi_status: 3419 /* 3420 * Check to see if SCSI Status is non zero. If so report SCSI 3421 * Status. 3422 */ 3423 if (lscsi_status != 0) { 3424 if (lscsi_status == SAM_STAT_TASK_SET_FULL) { 3425 ql_dbg(ql_dbg_io, fcport->vha, 0x3020, 3426 "QUEUE FULL detected.\n"); 3427 logit = 1; 3428 break; 3429 } 3430 if (lscsi_status != SS_CHECK_CONDITION) 3431 break; 3432 3433 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 3434 if (!(scsi_status & SS_SENSE_LEN_VALID)) 3435 break; 3436 3437 qla2x00_handle_sense(sp, sense_data, par_sense_len, 3438 sense_len, rsp, res); 3439 } 3440 break; 3441 3442 case CS_PORT_LOGGED_OUT: 3443 case CS_PORT_CONFIG_CHG: 3444 case CS_PORT_BUSY: 3445 case CS_INCOMPLETE: 3446 case CS_PORT_UNAVAILABLE: 3447 case CS_TIMEOUT: 3448 case CS_RESET: 3449 case CS_EDIF_INV_REQ: 3450 3451 /* 3452 * We are going to have the fc class block the rport 3453 * while we try to recover so instruct the mid layer 3454 * to requeue until the class decides how to handle this. 3455 */ 3456 res = DID_TRANSPORT_DISRUPTED << 16; 3457 3458 if (comp_status == CS_TIMEOUT) { 3459 if (IS_FWI2_CAPABLE(ha)) 3460 break; 3461 else if ((le16_to_cpu(sts->status_flags) & 3462 SF_LOGOUT_SENT) == 0) 3463 break; 3464 } 3465 3466 if (atomic_read(&fcport->state) == FCS_ONLINE) { 3467 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021, 3468 "Port to be marked lost on fcport=%02x%02x%02x, current " 3469 "port state= %s comp_status %x.\n", fcport->d_id.b.domain, 3470 fcport->d_id.b.area, fcport->d_id.b.al_pa, 3471 port_state_str[FCS_ONLINE], 3472 comp_status); 3473 3474 qlt_schedule_sess_for_deletion(fcport); 3475 } 3476 3477 break; 3478 3479 case CS_ABORTED: 3480 res = DID_RESET << 16; 3481 break; 3482 3483 case CS_DIF_ERROR: 3484 logit = qla2x00_handle_dif_error(sp, sts24); 3485 res = cp->result; 3486 break; 3487 3488 case CS_TRANSPORT: 3489 res = DID_ERROR << 16; 3490 vha->hw_err_cnt++; 3491 3492 if (!IS_PI_SPLIT_DET_CAPABLE(ha)) 3493 break; 3494 3495 if (state_flags & BIT_4) 3496 scmd_printk(KERN_WARNING, cp, 3497 "Unsupported device '%s' found.\n", 3498 cp->device->vendor); 3499 break; 3500 3501 case CS_DMA: 3502 ql_log(ql_log_info, fcport->vha, 0x3022, 3503 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", 3504 comp_status, scsi_status, res, vha->host_no, 3505 cp->device->id, cp->device->lun, fcport->d_id.b24, 3506 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len, 3507 resid_len, fw_resid_len, sp, cp); 3508 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee, 3509 pkt, sizeof(*sts24)); 3510 res = DID_ERROR << 16; 3511 vha->hw_err_cnt++; 3512 break; 3513 default: 3514 res = DID_ERROR << 16; 3515 break; 3516 } 3517 3518 out: 3519 if (logit) 3520 ql_dbg(ql_dbg_io, fcport->vha, 0x3022, 3521 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", 3522 comp_status, scsi_status, res, vha->host_no, 3523 cp->device->id, cp->device->lun, fcport->d_id.b.domain, 3524 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id, 3525 cp->cmnd, scsi_bufflen(cp), rsp_info_len, 3526 resid_len, fw_resid_len, sp, cp); 3527 3528 if (rsp->status_srb == NULL) 3529 sp->done(sp, res); 3530 3531 /* for io's, clearing of outstanding_cmds[handle] means scsi_done was called */ 3532 req->outstanding_cmds[handle] = NULL; 3533 } 3534 3535 /** 3536 * qla2x00_status_cont_entry() - Process a Status Continuations entry. 3537 * @rsp: response queue 3538 * @pkt: Entry pointer 3539 * 3540 * Extended sense data. 3541 */ 3542 static void 3543 qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) 3544 { 3545 uint8_t sense_sz = 0; 3546 struct qla_hw_data *ha = rsp->hw; 3547 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); 3548 srb_t *sp = rsp->status_srb; 3549 struct scsi_cmnd *cp; 3550 uint32_t sense_len; 3551 uint8_t *sense_ptr; 3552 3553 if (!sp || !GET_CMD_SENSE_LEN(sp)) 3554 return; 3555 3556 sense_len = GET_CMD_SENSE_LEN(sp); 3557 sense_ptr = GET_CMD_SENSE_PTR(sp); 3558 3559 cp = GET_CMD_SP(sp); 3560 if (cp == NULL) { 3561 ql_log(ql_log_warn, vha, 0x3025, 3562 "cmd is NULL: already returned to OS (sp=%p).\n", sp); 3563 3564 rsp->status_srb = NULL; 3565 return; 3566 } 3567 3568 if (sense_len > sizeof(pkt->data)) 3569 sense_sz = sizeof(pkt->data); 3570 else 3571 sense_sz = sense_len; 3572 3573 /* Move sense data. */ 3574 if (IS_FWI2_CAPABLE(ha)) 3575 host_to_fcp_swap(pkt->data, sizeof(pkt->data)); 3576 memcpy(sense_ptr, pkt->data, sense_sz); 3577 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c, 3578 sense_ptr, sense_sz); 3579 3580 sense_len -= sense_sz; 3581 sense_ptr += sense_sz; 3582 3583 SET_CMD_SENSE_PTR(sp, sense_ptr); 3584 SET_CMD_SENSE_LEN(sp, sense_len); 3585 3586 /* Place command on done queue. */ 3587 if (sense_len == 0) { 3588 rsp->status_srb = NULL; 3589 sp->done(sp, cp->result); 3590 } 3591 } 3592 3593 /** 3594 * qla2x00_error_entry() - Process an error entry. 3595 * @vha: SCSI driver HA context 3596 * @rsp: response queue 3597 * @pkt: Entry pointer 3598 * return : 1=allow further error analysis. 0=no additional error analysis. 3599 */ 3600 static int 3601 qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt) 3602 { 3603 srb_t *sp; 3604 struct qla_hw_data *ha = vha->hw; 3605 const char func[] = "ERROR-IOCB"; 3606 uint16_t que = MSW(pkt->handle); 3607 struct req_que *req = NULL; 3608 int res = DID_ERROR << 16; 3609 u16 index; 3610 3611 ql_dbg(ql_dbg_async, vha, 0x502a, 3612 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n", 3613 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id); 3614 3615 if (que >= ha->max_req_queues || !ha->req_q_map[que]) 3616 goto fatal; 3617 3618 req = ha->req_q_map[que]; 3619 3620 if (pkt->entry_status & RF_BUSY) 3621 res = DID_BUS_BUSY << 16; 3622 3623 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE) 3624 return 0; 3625 3626 switch (pkt->entry_type) { 3627 case NOTIFY_ACK_TYPE: 3628 case STATUS_CONT_TYPE: 3629 case LOGINOUT_PORT_IOCB_TYPE: 3630 case CT_IOCB_TYPE: 3631 case ELS_IOCB_TYPE: 3632 case ABORT_IOCB_TYPE: 3633 case MBX_IOCB_TYPE: 3634 default: 3635 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3636 if (sp) { 3637 sp->done(sp, res); 3638 return 0; 3639 } 3640 break; 3641 3642 case SA_UPDATE_IOCB_TYPE: 3643 case ABTS_RESP_24XX: 3644 case CTIO_TYPE7: 3645 case CTIO_CRC2: 3646 return 1; 3647 case STATUS_TYPE: 3648 sp = qla_get_sp_from_handle(vha, func, req, pkt, &index); 3649 if (sp) { 3650 sp->done(sp, res); 3651 req->outstanding_cmds[index] = NULL; 3652 return 0; 3653 } 3654 break; 3655 } 3656 fatal: 3657 ql_log(ql_log_warn, vha, 0x5030, 3658 "Error entry - invalid handle/queue (%04x).\n", que); 3659 return 0; 3660 } 3661 3662 /** 3663 * qla24xx_mbx_completion() - Process mailbox command completions. 3664 * @vha: SCSI driver HA context 3665 * @mb0: Mailbox0 register 3666 */ 3667 static void 3668 qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) 3669 { 3670 uint16_t cnt; 3671 uint32_t mboxes; 3672 __le16 __iomem *wptr; 3673 struct qla_hw_data *ha = vha->hw; 3674 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3675 3676 /* Read all mbox registers? */ 3677 WARN_ON_ONCE(ha->mbx_count > 32); 3678 mboxes = (1ULL << ha->mbx_count) - 1; 3679 if (!ha->mcp) 3680 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n"); 3681 else 3682 mboxes = ha->mcp->in_mb; 3683 3684 /* Load return mailbox registers. */ 3685 ha->flags.mbox_int = 1; 3686 ha->mailbox_out[0] = mb0; 3687 mboxes >>= 1; 3688 wptr = ®->mailbox1; 3689 3690 for (cnt = 1; cnt < ha->mbx_count; cnt++) { 3691 if (mboxes & BIT_0) 3692 ha->mailbox_out[cnt] = rd_reg_word(wptr); 3693 3694 mboxes >>= 1; 3695 wptr++; 3696 } 3697 } 3698 3699 static void 3700 qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 3701 struct abort_entry_24xx *pkt) 3702 { 3703 const char func[] = "ABT_IOCB"; 3704 srb_t *sp; 3705 srb_t *orig_sp = NULL; 3706 struct srb_iocb *abt; 3707 3708 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3709 if (!sp) 3710 return; 3711 3712 abt = &sp->u.iocb_cmd; 3713 abt->u.abt.comp_status = pkt->comp_status; 3714 orig_sp = sp->cmd_sp; 3715 /* Need to pass original sp */ 3716 if (orig_sp) 3717 qla_nvme_abort_process_comp_status(pkt, orig_sp); 3718 3719 sp->done(sp, 0); 3720 } 3721 3722 void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha, 3723 struct pt_ls4_request *pkt, struct req_que *req) 3724 { 3725 srb_t *sp; 3726 const char func[] = "LS4_IOCB"; 3727 uint16_t comp_status; 3728 3729 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3730 if (!sp) 3731 return; 3732 3733 comp_status = le16_to_cpu(pkt->status); 3734 sp->done(sp, comp_status); 3735 } 3736 3737 /** 3738 * qla_chk_cont_iocb_avail - check for all continuation iocbs are available 3739 * before iocb processing can start. 3740 * @vha: host adapter pointer 3741 * @rsp: respond queue 3742 * @pkt: head iocb describing how many continuation iocb 3743 * Return: 0 all iocbs has arrived, xx- all iocbs have not arrived. 3744 */ 3745 static int qla_chk_cont_iocb_avail(struct scsi_qla_host *vha, 3746 struct rsp_que *rsp, response_t *pkt, u32 rsp_q_in) 3747 { 3748 int start_pkt_ring_index; 3749 u32 iocb_cnt = 0; 3750 int rc = 0; 3751 3752 if (pkt->entry_count == 1) 3753 return rc; 3754 3755 /* ring_index was pre-increment. set it back to current pkt */ 3756 if (rsp->ring_index == 0) 3757 start_pkt_ring_index = rsp->length - 1; 3758 else 3759 start_pkt_ring_index = rsp->ring_index - 1; 3760 3761 if (rsp_q_in < start_pkt_ring_index) 3762 /* q in ptr is wrapped */ 3763 iocb_cnt = rsp->length - start_pkt_ring_index + rsp_q_in; 3764 else 3765 iocb_cnt = rsp_q_in - start_pkt_ring_index; 3766 3767 if (iocb_cnt < pkt->entry_count) 3768 rc = -EIO; 3769 3770 ql_dbg(ql_dbg_init, vha, 0x5091, 3771 "%s - ring %p pkt %p entry count %d iocb_cnt %d rsp_q_in %d rc %d\n", 3772 __func__, rsp->ring, pkt, pkt->entry_count, iocb_cnt, rsp_q_in, rc); 3773 3774 return rc; 3775 } 3776 3777 static void qla_marker_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 3778 struct mrk_entry_24xx *pkt) 3779 { 3780 const char func[] = "MRK-IOCB"; 3781 srb_t *sp; 3782 int res = QLA_SUCCESS; 3783 3784 if (!IS_FWI2_CAPABLE(vha->hw)) 3785 return; 3786 3787 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 3788 if (!sp) 3789 return; 3790 3791 if (pkt->entry_status) { 3792 ql_dbg(ql_dbg_taskm, vha, 0x8025, "marker failure.\n"); 3793 res = QLA_COMMAND_ERROR; 3794 } 3795 sp->u.iocb_cmd.u.tmf.data = res; 3796 sp->done(sp, res); 3797 } 3798 3799 /** 3800 * qla24xx_process_response_queue() - Process response queue entries. 3801 * @vha: SCSI driver HA context 3802 * @rsp: response queue 3803 */ 3804 void qla24xx_process_response_queue(struct scsi_qla_host *vha, 3805 struct rsp_que *rsp) 3806 { 3807 struct sts_entry_24xx *pkt; 3808 struct qla_hw_data *ha = vha->hw; 3809 struct purex_entry_24xx *purex_entry; 3810 struct purex_item *pure_item; 3811 u16 rsp_in = 0, cur_ring_index; 3812 int is_shadow_hba; 3813 3814 if (!ha->flags.fw_started) 3815 return; 3816 3817 if (rsp->qpair->cpuid != smp_processor_id() || !rsp->qpair->rcv_intr) { 3818 rsp->qpair->rcv_intr = 1; 3819 } 3820 3821 #define __update_rsp_in(_is_shadow_hba, _rsp, _rsp_in) \ 3822 do { \ 3823 _rsp_in = _is_shadow_hba ? *(_rsp)->in_ptr : \ 3824 rd_reg_dword_relaxed((_rsp)->rsp_q_in); \ 3825 } while (0) 3826 3827 is_shadow_hba = IS_SHADOW_REG_CAPABLE(ha); 3828 3829 __update_rsp_in(is_shadow_hba, rsp, rsp_in); 3830 3831 while (rsp->ring_index != rsp_in && 3832 rsp->ring_ptr->signature != RESPONSE_PROCESSED) { 3833 pkt = (struct sts_entry_24xx *)rsp->ring_ptr; 3834 cur_ring_index = rsp->ring_index; 3835 3836 rsp->ring_index++; 3837 if (rsp->ring_index == rsp->length) { 3838 rsp->ring_index = 0; 3839 rsp->ring_ptr = rsp->ring; 3840 } else { 3841 rsp->ring_ptr++; 3842 } 3843 3844 if (pkt->entry_status != 0) { 3845 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt)) 3846 goto process_err; 3847 3848 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 3849 wmb(); 3850 continue; 3851 } 3852 process_err: 3853 3854 switch (pkt->entry_type) { 3855 case STATUS_TYPE: 3856 qla2x00_status_entry(vha, rsp, pkt); 3857 break; 3858 case STATUS_CONT_TYPE: 3859 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); 3860 break; 3861 case VP_RPT_ID_IOCB_TYPE: 3862 qla24xx_report_id_acquisition(vha, 3863 (struct vp_rpt_id_entry_24xx *)pkt); 3864 break; 3865 case LOGINOUT_PORT_IOCB_TYPE: 3866 qla24xx_logio_entry(vha, rsp->req, 3867 (struct logio_entry_24xx *)pkt); 3868 break; 3869 case CT_IOCB_TYPE: 3870 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); 3871 break; 3872 case ELS_IOCB_TYPE: 3873 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE); 3874 break; 3875 case ABTS_RECV_24XX: 3876 if (qla_ini_mode_enabled(vha)) { 3877 pure_item = qla24xx_copy_std_pkt(vha, pkt); 3878 if (!pure_item) 3879 break; 3880 qla24xx_queue_purex_item(vha, pure_item, 3881 qla24xx_process_abts); 3882 break; 3883 } 3884 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3885 IS_QLA28XX(ha)) { 3886 /* ensure that the ATIO queue is empty */ 3887 qlt_handle_abts_recv(vha, rsp, 3888 (response_t *)pkt); 3889 break; 3890 } else { 3891 qlt_24xx_process_atio_queue(vha, 1); 3892 } 3893 fallthrough; 3894 case ABTS_RESP_24XX: 3895 case CTIO_TYPE7: 3896 case CTIO_CRC2: 3897 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt); 3898 break; 3899 case PT_LS4_REQUEST: 3900 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt, 3901 rsp->req); 3902 break; 3903 case NOTIFY_ACK_TYPE: 3904 if (pkt->handle == QLA_TGT_SKIP_HANDLE) 3905 qlt_response_pkt_all_vps(vha, rsp, 3906 (response_t *)pkt); 3907 else 3908 qla24xxx_nack_iocb_entry(vha, rsp->req, 3909 (struct nack_to_isp *)pkt); 3910 break; 3911 case MARKER_TYPE: 3912 qla_marker_iocb_entry(vha, rsp->req, (struct mrk_entry_24xx *)pkt); 3913 break; 3914 case ABORT_IOCB_TYPE: 3915 qla24xx_abort_iocb_entry(vha, rsp->req, 3916 (struct abort_entry_24xx *)pkt); 3917 break; 3918 case MBX_IOCB_TYPE: 3919 qla24xx_mbx_iocb_entry(vha, rsp->req, 3920 (struct mbx_24xx_entry *)pkt); 3921 break; 3922 case VP_CTRL_IOCB_TYPE: 3923 qla_ctrlvp_completed(vha, rsp->req, 3924 (struct vp_ctrl_entry_24xx *)pkt); 3925 break; 3926 case PUREX_IOCB_TYPE: 3927 purex_entry = (void *)pkt; 3928 switch (purex_entry->els_frame_payload[3]) { 3929 case ELS_RDP: 3930 pure_item = qla24xx_copy_std_pkt(vha, pkt); 3931 if (!pure_item) 3932 break; 3933 qla24xx_queue_purex_item(vha, pure_item, 3934 qla24xx_process_purex_rdp); 3935 break; 3936 case ELS_FPIN: 3937 if (!vha->hw->flags.scm_enabled) { 3938 ql_log(ql_log_warn, vha, 0x5094, 3939 "SCM not active for this port\n"); 3940 break; 3941 } 3942 pure_item = qla27xx_copy_fpin_pkt(vha, 3943 (void **)&pkt, &rsp); 3944 __update_rsp_in(is_shadow_hba, rsp, rsp_in); 3945 if (!pure_item) 3946 break; 3947 qla24xx_queue_purex_item(vha, pure_item, 3948 qla27xx_process_purex_fpin); 3949 break; 3950 3951 case ELS_AUTH_ELS: 3952 if (qla_chk_cont_iocb_avail(vha, rsp, (response_t *)pkt, rsp_in)) { 3953 /* 3954 * ring_ptr and ring_index were 3955 * pre-incremented above. Reset them 3956 * back to current. Wait for next 3957 * interrupt with all IOCBs to arrive 3958 * and re-process. 3959 */ 3960 rsp->ring_ptr = (response_t *)pkt; 3961 rsp->ring_index = cur_ring_index; 3962 3963 ql_dbg(ql_dbg_init, vha, 0x5091, 3964 "Defer processing ELS opcode %#x...\n", 3965 purex_entry->els_frame_payload[3]); 3966 return; 3967 } 3968 qla24xx_auth_els(vha, (void **)&pkt, &rsp); 3969 break; 3970 default: 3971 ql_log(ql_log_warn, vha, 0x509c, 3972 "Discarding ELS Request opcode 0x%x\n", 3973 purex_entry->els_frame_payload[3]); 3974 } 3975 break; 3976 case SA_UPDATE_IOCB_TYPE: 3977 qla28xx_sa_update_iocb_entry(vha, rsp->req, 3978 (struct sa_update_28xx *)pkt); 3979 break; 3980 3981 default: 3982 /* Type Not Supported. */ 3983 ql_dbg(ql_dbg_async, vha, 0x5042, 3984 "Received unknown response pkt type 0x%x entry status=%x.\n", 3985 pkt->entry_type, pkt->entry_status); 3986 break; 3987 } 3988 ((response_t *)pkt)->signature = RESPONSE_PROCESSED; 3989 wmb(); 3990 } 3991 3992 /* Adjust ring index */ 3993 if (IS_P3P_TYPE(ha)) { 3994 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; 3995 3996 wrt_reg_dword(®->rsp_q_out[0], rsp->ring_index); 3997 } else { 3998 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index); 3999 } 4000 } 4001 4002 static void 4003 qla2xxx_check_risc_status(scsi_qla_host_t *vha) 4004 { 4005 int rval; 4006 uint32_t cnt; 4007 struct qla_hw_data *ha = vha->hw; 4008 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 4009 4010 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 4011 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 4012 return; 4013 4014 rval = QLA_SUCCESS; 4015 wrt_reg_dword(®->iobase_addr, 0x7C00); 4016 rd_reg_dword(®->iobase_addr); 4017 wrt_reg_dword(®->iobase_window, 0x0001); 4018 for (cnt = 10000; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 && 4019 rval == QLA_SUCCESS; cnt--) { 4020 if (cnt) { 4021 wrt_reg_dword(®->iobase_window, 0x0001); 4022 udelay(10); 4023 } else 4024 rval = QLA_FUNCTION_TIMEOUT; 4025 } 4026 if (rval == QLA_SUCCESS) 4027 goto next_test; 4028 4029 rval = QLA_SUCCESS; 4030 wrt_reg_dword(®->iobase_window, 0x0003); 4031 for (cnt = 100; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 && 4032 rval == QLA_SUCCESS; cnt--) { 4033 if (cnt) { 4034 wrt_reg_dword(®->iobase_window, 0x0003); 4035 udelay(10); 4036 } else 4037 rval = QLA_FUNCTION_TIMEOUT; 4038 } 4039 if (rval != QLA_SUCCESS) 4040 goto done; 4041 4042 next_test: 4043 if (rd_reg_dword(®->iobase_c8) & BIT_3) 4044 ql_log(ql_log_info, vha, 0x504c, 4045 "Additional code -- 0x55AA.\n"); 4046 4047 done: 4048 wrt_reg_dword(®->iobase_window, 0x0000); 4049 rd_reg_dword(®->iobase_window); 4050 } 4051 4052 /** 4053 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx. 4054 * @irq: interrupt number 4055 * @dev_id: SCSI driver HA context 4056 * 4057 * Called by system whenever the host adapter generates an interrupt. 4058 * 4059 * Returns handled flag. 4060 */ 4061 irqreturn_t 4062 qla24xx_intr_handler(int irq, void *dev_id) 4063 { 4064 scsi_qla_host_t *vha; 4065 struct qla_hw_data *ha; 4066 struct device_reg_24xx __iomem *reg; 4067 int status; 4068 unsigned long iter; 4069 uint32_t stat; 4070 uint32_t hccr; 4071 uint16_t mb[8]; 4072 struct rsp_que *rsp; 4073 unsigned long flags; 4074 bool process_atio = false; 4075 4076 rsp = (struct rsp_que *) dev_id; 4077 if (!rsp) { 4078 ql_log(ql_log_info, NULL, 0x5059, 4079 "%s: NULL response queue pointer.\n", __func__); 4080 return IRQ_NONE; 4081 } 4082 4083 ha = rsp->hw; 4084 reg = &ha->iobase->isp24; 4085 status = 0; 4086 4087 if (unlikely(pci_channel_offline(ha->pdev))) 4088 return IRQ_HANDLED; 4089 4090 spin_lock_irqsave(&ha->hardware_lock, flags); 4091 vha = pci_get_drvdata(ha->pdev); 4092 for (iter = 50; iter--; ) { 4093 stat = rd_reg_dword(®->host_status); 4094 if (qla2x00_check_reg32_for_disconnect(vha, stat)) 4095 break; 4096 if (stat & HSRX_RISC_PAUSED) { 4097 if (unlikely(pci_channel_offline(ha->pdev))) 4098 break; 4099 4100 hccr = rd_reg_dword(®->hccr); 4101 4102 ql_log(ql_log_warn, vha, 0x504b, 4103 "RISC paused -- HCCR=%x, Dumping firmware.\n", 4104 hccr); 4105 4106 qla2xxx_check_risc_status(vha); 4107 4108 ha->isp_ops->fw_dump(vha); 4109 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4110 break; 4111 } else if ((stat & HSRX_RISC_INT) == 0) 4112 break; 4113 4114 switch (stat & 0xff) { 4115 case INTR_ROM_MB_SUCCESS: 4116 case INTR_ROM_MB_FAILED: 4117 case INTR_MB_SUCCESS: 4118 case INTR_MB_FAILED: 4119 qla24xx_mbx_completion(vha, MSW(stat)); 4120 status |= MBX_INTERRUPT; 4121 4122 break; 4123 case INTR_ASYNC_EVENT: 4124 mb[0] = MSW(stat); 4125 mb[1] = rd_reg_word(®->mailbox1); 4126 mb[2] = rd_reg_word(®->mailbox2); 4127 mb[3] = rd_reg_word(®->mailbox3); 4128 qla2x00_async_event(vha, rsp, mb); 4129 break; 4130 case INTR_RSP_QUE_UPDATE: 4131 case INTR_RSP_QUE_UPDATE_83XX: 4132 qla24xx_process_response_queue(vha, rsp); 4133 break; 4134 case INTR_ATIO_QUE_UPDATE_27XX: 4135 case INTR_ATIO_QUE_UPDATE: 4136 process_atio = true; 4137 break; 4138 case INTR_ATIO_RSP_QUE_UPDATE: 4139 process_atio = true; 4140 qla24xx_process_response_queue(vha, rsp); 4141 break; 4142 default: 4143 ql_dbg(ql_dbg_async, vha, 0x504f, 4144 "Unrecognized interrupt type (%d).\n", stat * 0xff); 4145 break; 4146 } 4147 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); 4148 rd_reg_dword_relaxed(®->hccr); 4149 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1))) 4150 ndelay(3500); 4151 } 4152 qla2x00_handle_mbx_completion(ha, status); 4153 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4154 4155 if (process_atio) { 4156 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 4157 qlt_24xx_process_atio_queue(vha, 0); 4158 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); 4159 } 4160 4161 return IRQ_HANDLED; 4162 } 4163 4164 static irqreturn_t 4165 qla24xx_msix_rsp_q(int irq, void *dev_id) 4166 { 4167 struct qla_hw_data *ha; 4168 struct rsp_que *rsp; 4169 struct device_reg_24xx __iomem *reg; 4170 struct scsi_qla_host *vha; 4171 unsigned long flags; 4172 4173 rsp = (struct rsp_que *) dev_id; 4174 if (!rsp) { 4175 ql_log(ql_log_info, NULL, 0x505a, 4176 "%s: NULL response queue pointer.\n", __func__); 4177 return IRQ_NONE; 4178 } 4179 ha = rsp->hw; 4180 reg = &ha->iobase->isp24; 4181 4182 spin_lock_irqsave(&ha->hardware_lock, flags); 4183 4184 vha = pci_get_drvdata(ha->pdev); 4185 qla24xx_process_response_queue(vha, rsp); 4186 if (!ha->flags.disable_msix_handshake) { 4187 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); 4188 rd_reg_dword_relaxed(®->hccr); 4189 } 4190 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4191 4192 return IRQ_HANDLED; 4193 } 4194 4195 static irqreturn_t 4196 qla24xx_msix_default(int irq, void *dev_id) 4197 { 4198 scsi_qla_host_t *vha; 4199 struct qla_hw_data *ha; 4200 struct rsp_que *rsp; 4201 struct device_reg_24xx __iomem *reg; 4202 int status; 4203 uint32_t stat; 4204 uint32_t hccr; 4205 uint16_t mb[8]; 4206 unsigned long flags; 4207 bool process_atio = false; 4208 4209 rsp = (struct rsp_que *) dev_id; 4210 if (!rsp) { 4211 ql_log(ql_log_info, NULL, 0x505c, 4212 "%s: NULL response queue pointer.\n", __func__); 4213 return IRQ_NONE; 4214 } 4215 ha = rsp->hw; 4216 reg = &ha->iobase->isp24; 4217 status = 0; 4218 4219 spin_lock_irqsave(&ha->hardware_lock, flags); 4220 vha = pci_get_drvdata(ha->pdev); 4221 do { 4222 stat = rd_reg_dword(®->host_status); 4223 if (qla2x00_check_reg32_for_disconnect(vha, stat)) 4224 break; 4225 if (stat & HSRX_RISC_PAUSED) { 4226 if (unlikely(pci_channel_offline(ha->pdev))) 4227 break; 4228 4229 hccr = rd_reg_dword(®->hccr); 4230 4231 ql_log(ql_log_info, vha, 0x5050, 4232 "RISC paused -- HCCR=%x, Dumping firmware.\n", 4233 hccr); 4234 4235 qla2xxx_check_risc_status(vha); 4236 vha->hw_err_cnt++; 4237 4238 ha->isp_ops->fw_dump(vha); 4239 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4240 break; 4241 } else if ((stat & HSRX_RISC_INT) == 0) 4242 break; 4243 4244 switch (stat & 0xff) { 4245 case INTR_ROM_MB_SUCCESS: 4246 case INTR_ROM_MB_FAILED: 4247 case INTR_MB_SUCCESS: 4248 case INTR_MB_FAILED: 4249 qla24xx_mbx_completion(vha, MSW(stat)); 4250 status |= MBX_INTERRUPT; 4251 4252 break; 4253 case INTR_ASYNC_EVENT: 4254 mb[0] = MSW(stat); 4255 mb[1] = rd_reg_word(®->mailbox1); 4256 mb[2] = rd_reg_word(®->mailbox2); 4257 mb[3] = rd_reg_word(®->mailbox3); 4258 qla2x00_async_event(vha, rsp, mb); 4259 break; 4260 case INTR_RSP_QUE_UPDATE: 4261 case INTR_RSP_QUE_UPDATE_83XX: 4262 qla24xx_process_response_queue(vha, rsp); 4263 break; 4264 case INTR_ATIO_QUE_UPDATE_27XX: 4265 case INTR_ATIO_QUE_UPDATE: 4266 process_atio = true; 4267 break; 4268 case INTR_ATIO_RSP_QUE_UPDATE: 4269 process_atio = true; 4270 qla24xx_process_response_queue(vha, rsp); 4271 break; 4272 default: 4273 ql_dbg(ql_dbg_async, vha, 0x5051, 4274 "Unrecognized interrupt type (%d).\n", stat & 0xff); 4275 break; 4276 } 4277 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); 4278 } while (0); 4279 qla2x00_handle_mbx_completion(ha, status); 4280 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4281 4282 if (process_atio) { 4283 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 4284 qlt_24xx_process_atio_queue(vha, 0); 4285 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); 4286 } 4287 4288 return IRQ_HANDLED; 4289 } 4290 4291 irqreturn_t 4292 qla2xxx_msix_rsp_q(int irq, void *dev_id) 4293 { 4294 struct qla_hw_data *ha; 4295 struct qla_qpair *qpair; 4296 4297 qpair = dev_id; 4298 if (!qpair) { 4299 ql_log(ql_log_info, NULL, 0x505b, 4300 "%s: NULL response queue pointer.\n", __func__); 4301 return IRQ_NONE; 4302 } 4303 ha = qpair->hw; 4304 4305 queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work); 4306 4307 return IRQ_HANDLED; 4308 } 4309 4310 irqreturn_t 4311 qla2xxx_msix_rsp_q_hs(int irq, void *dev_id) 4312 { 4313 struct qla_hw_data *ha; 4314 struct qla_qpair *qpair; 4315 struct device_reg_24xx __iomem *reg; 4316 unsigned long flags; 4317 4318 qpair = dev_id; 4319 if (!qpair) { 4320 ql_log(ql_log_info, NULL, 0x505b, 4321 "%s: NULL response queue pointer.\n", __func__); 4322 return IRQ_NONE; 4323 } 4324 ha = qpair->hw; 4325 4326 reg = &ha->iobase->isp24; 4327 spin_lock_irqsave(&ha->hardware_lock, flags); 4328 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); 4329 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4330 4331 queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work); 4332 4333 return IRQ_HANDLED; 4334 } 4335 4336 /* Interrupt handling helpers. */ 4337 4338 struct qla_init_msix_entry { 4339 const char *name; 4340 irq_handler_t handler; 4341 }; 4342 4343 static const struct qla_init_msix_entry msix_entries[] = { 4344 { "default", qla24xx_msix_default }, 4345 { "rsp_q", qla24xx_msix_rsp_q }, 4346 { "atio_q", qla83xx_msix_atio_q }, 4347 { "qpair_multiq", qla2xxx_msix_rsp_q }, 4348 { "qpair_multiq_hs", qla2xxx_msix_rsp_q_hs }, 4349 }; 4350 4351 static const struct qla_init_msix_entry qla82xx_msix_entries[] = { 4352 { "qla2xxx (default)", qla82xx_msix_default }, 4353 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q }, 4354 }; 4355 4356 static int 4357 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) 4358 { 4359 int i, ret; 4360 struct qla_msix_entry *qentry; 4361 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 4362 int min_vecs = QLA_BASE_VECTORS; 4363 struct irq_affinity desc = { 4364 .pre_vectors = QLA_BASE_VECTORS, 4365 }; 4366 4367 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && 4368 IS_ATIO_MSIX_CAPABLE(ha)) { 4369 desc.pre_vectors++; 4370 min_vecs++; 4371 } 4372 4373 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) { 4374 /* user wants to control IRQ setting for target mode */ 4375 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs, 4376 min((u16)ha->msix_count, (u16)(num_online_cpus() + min_vecs)), 4377 PCI_IRQ_MSIX); 4378 } else 4379 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs, 4380 min((u16)ha->msix_count, (u16)(num_online_cpus() + min_vecs)), 4381 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, 4382 &desc); 4383 4384 if (ret < 0) { 4385 ql_log(ql_log_fatal, vha, 0x00c7, 4386 "MSI-X: Failed to enable support, " 4387 "giving up -- %d/%d.\n", 4388 ha->msix_count, ret); 4389 goto msix_out; 4390 } else if (ret < ha->msix_count) { 4391 ql_log(ql_log_info, vha, 0x00c6, 4392 "MSI-X: Using %d vectors\n", ret); 4393 ha->msix_count = ret; 4394 /* Recalculate queue values */ 4395 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) { 4396 ha->max_req_queues = ha->msix_count - 1; 4397 4398 /* ATIOQ needs 1 vector. That's 1 less QPair */ 4399 if (QLA_TGT_MODE_ENABLED()) 4400 ha->max_req_queues--; 4401 4402 ha->max_rsp_queues = ha->max_req_queues; 4403 4404 ha->max_qpairs = ha->max_req_queues - 1; 4405 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190, 4406 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs); 4407 } 4408 } 4409 vha->irq_offset = desc.pre_vectors; 4410 ha->msix_entries = kcalloc(ha->msix_count, 4411 sizeof(struct qla_msix_entry), 4412 GFP_KERNEL); 4413 if (!ha->msix_entries) { 4414 ql_log(ql_log_fatal, vha, 0x00c8, 4415 "Failed to allocate memory for ha->msix_entries.\n"); 4416 ret = -ENOMEM; 4417 goto free_irqs; 4418 } 4419 ha->flags.msix_enabled = 1; 4420 4421 for (i = 0; i < ha->msix_count; i++) { 4422 qentry = &ha->msix_entries[i]; 4423 qentry->vector = pci_irq_vector(ha->pdev, i); 4424 qentry->vector_base0 = i; 4425 qentry->entry = i; 4426 qentry->have_irq = 0; 4427 qentry->in_use = 0; 4428 qentry->handle = NULL; 4429 } 4430 4431 /* Enable MSI-X vectors for the base queue */ 4432 for (i = 0; i < QLA_BASE_VECTORS; i++) { 4433 qentry = &ha->msix_entries[i]; 4434 qentry->handle = rsp; 4435 rsp->msix = qentry; 4436 scnprintf(qentry->name, sizeof(qentry->name), 4437 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name); 4438 if (IS_P3P_TYPE(ha)) 4439 ret = request_irq(qentry->vector, 4440 qla82xx_msix_entries[i].handler, 4441 0, qla82xx_msix_entries[i].name, rsp); 4442 else 4443 ret = request_irq(qentry->vector, 4444 msix_entries[i].handler, 4445 0, qentry->name, rsp); 4446 if (ret) 4447 goto msix_register_fail; 4448 qentry->have_irq = 1; 4449 qentry->in_use = 1; 4450 } 4451 4452 /* 4453 * If target mode is enable, also request the vector for the ATIO 4454 * queue. 4455 */ 4456 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && 4457 IS_ATIO_MSIX_CAPABLE(ha)) { 4458 qentry = &ha->msix_entries[QLA_ATIO_VECTOR]; 4459 rsp->msix = qentry; 4460 qentry->handle = rsp; 4461 scnprintf(qentry->name, sizeof(qentry->name), 4462 "qla2xxx%lu_%s", vha->host_no, 4463 msix_entries[QLA_ATIO_VECTOR].name); 4464 qentry->in_use = 1; 4465 ret = request_irq(qentry->vector, 4466 msix_entries[QLA_ATIO_VECTOR].handler, 4467 0, qentry->name, rsp); 4468 qentry->have_irq = 1; 4469 } 4470 4471 msix_register_fail: 4472 if (ret) { 4473 ql_log(ql_log_fatal, vha, 0x00cb, 4474 "MSI-X: unable to register handler -- %x/%d.\n", 4475 qentry->vector, ret); 4476 qla2x00_free_irqs(vha); 4477 ha->mqenable = 0; 4478 goto msix_out; 4479 } 4480 4481 /* Enable MSI-X vector for response queue update for queue 0 */ 4482 if (IS_MQUE_CAPABLE(ha) && 4483 (ha->msixbase && ha->mqiobase && ha->max_qpairs)) 4484 ha->mqenable = 1; 4485 else 4486 ha->mqenable = 0; 4487 4488 ql_dbg(ql_dbg_multiq, vha, 0xc005, 4489 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", 4490 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); 4491 ql_dbg(ql_dbg_init, vha, 0x0055, 4492 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", 4493 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); 4494 4495 msix_out: 4496 return ret; 4497 4498 free_irqs: 4499 pci_free_irq_vectors(ha->pdev); 4500 goto msix_out; 4501 } 4502 4503 int 4504 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) 4505 { 4506 int ret = QLA_FUNCTION_FAILED; 4507 device_reg_t *reg = ha->iobase; 4508 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 4509 4510 /* If possible, enable MSI-X. */ 4511 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) && 4512 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && 4513 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))) 4514 goto skip_msi; 4515 4516 if (ql2xenablemsix == 2) 4517 goto skip_msix; 4518 4519 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && 4520 (ha->pdev->subsystem_device == 0x7040 || 4521 ha->pdev->subsystem_device == 0x7041 || 4522 ha->pdev->subsystem_device == 0x1705)) { 4523 ql_log(ql_log_warn, vha, 0x0034, 4524 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n", 4525 ha->pdev->subsystem_vendor, 4526 ha->pdev->subsystem_device); 4527 goto skip_msi; 4528 } 4529 4530 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { 4531 ql_log(ql_log_warn, vha, 0x0035, 4532 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", 4533 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); 4534 goto skip_msix; 4535 } 4536 4537 ret = qla24xx_enable_msix(ha, rsp); 4538 if (!ret) { 4539 ql_dbg(ql_dbg_init, vha, 0x0036, 4540 "MSI-X: Enabled (0x%X, 0x%X).\n", 4541 ha->chip_revision, ha->fw_attributes); 4542 goto clear_risc_ints; 4543 } 4544 4545 skip_msix: 4546 4547 ql_log(ql_log_info, vha, 0x0037, 4548 "Falling back-to MSI mode -- ret=%d.\n", ret); 4549 4550 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && 4551 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) && 4552 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 4553 goto skip_msi; 4554 4555 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI); 4556 if (ret > 0) { 4557 ql_dbg(ql_dbg_init, vha, 0x0038, 4558 "MSI: Enabled.\n"); 4559 ha->flags.msi_enabled = 1; 4560 } else 4561 ql_log(ql_log_warn, vha, 0x0039, 4562 "Falling back-to INTa mode -- ret=%d.\n", ret); 4563 skip_msi: 4564 4565 /* Skip INTx on ISP82xx. */ 4566 if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) 4567 return QLA_FUNCTION_FAILED; 4568 4569 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, 4570 ha->flags.msi_enabled ? 0 : IRQF_SHARED, 4571 QLA2XXX_DRIVER_NAME, rsp); 4572 if (ret) { 4573 ql_log(ql_log_warn, vha, 0x003a, 4574 "Failed to reserve interrupt %d already in use.\n", 4575 ha->pdev->irq); 4576 goto fail; 4577 } else if (!ha->flags.msi_enabled) { 4578 ql_dbg(ql_dbg_init, vha, 0x0125, 4579 "INTa mode: Enabled.\n"); 4580 ha->flags.mr_intr_valid = 1; 4581 /* Set max_qpair to 0, as MSI-X and MSI in not enabled */ 4582 ha->max_qpairs = 0; 4583 } 4584 4585 clear_risc_ints: 4586 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) 4587 goto fail; 4588 4589 spin_lock_irq(&ha->hardware_lock); 4590 wrt_reg_word(®->isp.semaphore, 0); 4591 spin_unlock_irq(&ha->hardware_lock); 4592 4593 fail: 4594 return ret; 4595 } 4596 4597 void 4598 qla2x00_free_irqs(scsi_qla_host_t *vha) 4599 { 4600 struct qla_hw_data *ha = vha->hw; 4601 struct rsp_que *rsp; 4602 struct qla_msix_entry *qentry; 4603 int i; 4604 4605 /* 4606 * We need to check that ha->rsp_q_map is valid in case we are called 4607 * from a probe failure context. 4608 */ 4609 if (!ha->rsp_q_map || !ha->rsp_q_map[0]) 4610 goto free_irqs; 4611 rsp = ha->rsp_q_map[0]; 4612 4613 if (ha->flags.msix_enabled) { 4614 for (i = 0; i < ha->msix_count; i++) { 4615 qentry = &ha->msix_entries[i]; 4616 if (qentry->have_irq) { 4617 irq_set_affinity_notifier(qentry->vector, NULL); 4618 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle); 4619 } 4620 } 4621 kfree(ha->msix_entries); 4622 ha->msix_entries = NULL; 4623 ha->flags.msix_enabled = 0; 4624 ql_dbg(ql_dbg_init, vha, 0x0042, 4625 "Disabled MSI-X.\n"); 4626 } else { 4627 free_irq(pci_irq_vector(ha->pdev, 0), rsp); 4628 } 4629 4630 free_irqs: 4631 pci_free_irq_vectors(ha->pdev); 4632 } 4633 4634 int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair, 4635 struct qla_msix_entry *msix, int vector_type) 4636 { 4637 const struct qla_init_msix_entry *intr = &msix_entries[vector_type]; 4638 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 4639 int ret; 4640 4641 scnprintf(msix->name, sizeof(msix->name), 4642 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id); 4643 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair); 4644 if (ret) { 4645 ql_log(ql_log_fatal, vha, 0x00e6, 4646 "MSI-X: Unable to register handler -- %x/%d.\n", 4647 msix->vector, ret); 4648 return ret; 4649 } 4650 msix->have_irq = 1; 4651 msix->handle = qpair; 4652 qla_mapq_init_qp_cpu_map(ha, msix, qpair); 4653 return ret; 4654 } 4655