1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 struct req_que *req; 54 unsigned long flags; 55 struct qla_hw_data *ha = sp->vha->hw; 56 57 WARN_ON_ONCE(irqs_disabled()); 58 spin_lock_irqsave(&ha->hardware_lock, flags); 59 req = sp->qpair->req; 60 req->outstanding_cmds[sp->handle] = NULL; 61 iocb = &sp->u.iocb_cmd; 62 spin_unlock_irqrestore(&ha->hardware_lock, flags); 63 iocb->timeout(sp); 64 } 65 66 void 67 qla2x00_sp_free(void *ptr) 68 { 69 srb_t *sp = ptr; 70 struct srb_iocb *iocb = &sp->u.iocb_cmd; 71 72 del_timer(&iocb->timer); 73 qla2x00_rel_sp(sp); 74 } 75 76 /* Asynchronous Login/Logout Routines -------------------------------------- */ 77 78 unsigned long 79 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 80 { 81 unsigned long tmo; 82 struct qla_hw_data *ha = vha->hw; 83 84 /* Firmware should use switch negotiated r_a_tov for timeout. */ 85 tmo = ha->r_a_tov / 10 * 2; 86 if (IS_QLAFX00(ha)) { 87 tmo = FX00_DEF_RATOV * 2; 88 } else if (!IS_FWI2_CAPABLE(ha)) { 89 /* 90 * Except for earlier ISPs where the timeout is seeded from the 91 * initialization control block. 92 */ 93 tmo = ha->login_timeout; 94 } 95 return tmo; 96 } 97 98 void 99 qla2x00_async_iocb_timeout(void *data) 100 { 101 srb_t *sp = data; 102 fc_port_t *fcport = sp->fcport; 103 struct srb_iocb *lio = &sp->u.iocb_cmd; 104 int rc, h; 105 unsigned long flags; 106 107 if (fcport) { 108 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 109 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 110 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 111 112 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 113 } else { 114 pr_info("Async-%s timeout - hdl=%x.\n", 115 sp->name, sp->handle); 116 } 117 118 switch (sp->type) { 119 case SRB_LOGIN_CMD: 120 rc = qla24xx_async_abort_cmd(sp, false); 121 if (rc) { 122 /* Retry as needed. */ 123 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 124 lio->u.logio.data[1] = 125 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 126 QLA_LOGIO_LOGIN_RETRIED : 0; 127 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 128 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 129 h++) { 130 if (sp->qpair->req->outstanding_cmds[h] == 131 sp) { 132 sp->qpair->req->outstanding_cmds[h] = 133 NULL; 134 break; 135 } 136 } 137 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 138 sp->done(sp, QLA_FUNCTION_TIMEOUT); 139 } 140 break; 141 case SRB_LOGOUT_CMD: 142 case SRB_CT_PTHRU_CMD: 143 case SRB_MB_IOCB: 144 case SRB_NACK_PLOGI: 145 case SRB_NACK_PRLI: 146 case SRB_NACK_LOGO: 147 case SRB_CTRL_VP: 148 rc = qla24xx_async_abort_cmd(sp, false); 149 if (rc) { 150 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 151 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 152 h++) { 153 if (sp->qpair->req->outstanding_cmds[h] == 154 sp) { 155 sp->qpair->req->outstanding_cmds[h] = 156 NULL; 157 break; 158 } 159 } 160 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 161 sp->done(sp, QLA_FUNCTION_TIMEOUT); 162 } 163 break; 164 } 165 } 166 167 static void 168 qla2x00_async_login_sp_done(void *ptr, int res) 169 { 170 srb_t *sp = ptr; 171 struct scsi_qla_host *vha = sp->vha; 172 struct srb_iocb *lio = &sp->u.iocb_cmd; 173 struct event_arg ea; 174 175 ql_dbg(ql_dbg_disc, vha, 0x20dd, 176 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 177 178 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 179 180 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 181 memset(&ea, 0, sizeof(ea)); 182 ea.event = FCME_PLOGI_DONE; 183 ea.fcport = sp->fcport; 184 ea.data[0] = lio->u.logio.data[0]; 185 ea.data[1] = lio->u.logio.data[1]; 186 ea.iop[0] = lio->u.logio.iop[0]; 187 ea.iop[1] = lio->u.logio.iop[1]; 188 ea.sp = sp; 189 qla2x00_fcport_event_handler(vha, &ea); 190 } 191 192 sp->free(sp); 193 } 194 195 static inline bool 196 fcport_is_smaller(fc_port_t *fcport) 197 { 198 if (wwn_to_u64(fcport->port_name) < 199 wwn_to_u64(fcport->vha->port_name)) 200 return true; 201 else 202 return false; 203 } 204 205 static inline bool 206 fcport_is_bigger(fc_port_t *fcport) 207 { 208 return !fcport_is_smaller(fcport); 209 } 210 211 int 212 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 213 uint16_t *data) 214 { 215 srb_t *sp; 216 struct srb_iocb *lio; 217 int rval = QLA_FUNCTION_FAILED; 218 219 if (!vha->flags.online) 220 goto done; 221 222 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 223 if (!sp) 224 goto done; 225 226 fcport->flags |= FCF_ASYNC_SENT; 227 fcport->logout_completed = 0; 228 229 fcport->disc_state = DSC_LOGIN_PEND; 230 sp->type = SRB_LOGIN_CMD; 231 sp->name = "login"; 232 sp->gen1 = fcport->rscn_gen; 233 sp->gen2 = fcport->login_gen; 234 235 lio = &sp->u.iocb_cmd; 236 lio->timeout = qla2x00_async_iocb_timeout; 237 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 238 239 sp->done = qla2x00_async_login_sp_done; 240 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) 241 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 242 else 243 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 244 245 if (fcport->fc4f_nvme) 246 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 247 248 ql_dbg(ql_dbg_disc, vha, 0x2072, 249 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 250 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 251 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 252 fcport->login_retry); 253 254 rval = qla2x00_start_sp(sp); 255 if (rval != QLA_SUCCESS) { 256 fcport->flags |= FCF_LOGIN_NEEDED; 257 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 258 goto done_free_sp; 259 } 260 261 return rval; 262 263 done_free_sp: 264 sp->free(sp); 265 fcport->flags &= ~FCF_ASYNC_SENT; 266 done: 267 fcport->flags &= ~FCF_ASYNC_ACTIVE; 268 return rval; 269 } 270 271 static void 272 qla2x00_async_logout_sp_done(void *ptr, int res) 273 { 274 srb_t *sp = ptr; 275 276 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 277 sp->fcport->login_gen++; 278 qlt_logo_completion_handler(sp->fcport, res); 279 sp->free(sp); 280 } 281 282 int 283 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 284 { 285 srb_t *sp; 286 struct srb_iocb *lio; 287 int rval = QLA_FUNCTION_FAILED; 288 289 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 290 return rval; 291 292 fcport->flags |= FCF_ASYNC_SENT; 293 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 294 if (!sp) 295 goto done; 296 297 sp->type = SRB_LOGOUT_CMD; 298 sp->name = "logout"; 299 300 lio = &sp->u.iocb_cmd; 301 lio->timeout = qla2x00_async_iocb_timeout; 302 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 303 304 sp->done = qla2x00_async_logout_sp_done; 305 306 ql_dbg(ql_dbg_disc, vha, 0x2070, 307 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 308 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 309 fcport->d_id.b.area, fcport->d_id.b.al_pa, 310 fcport->port_name); 311 312 rval = qla2x00_start_sp(sp); 313 if (rval != QLA_SUCCESS) 314 goto done_free_sp; 315 return rval; 316 317 done_free_sp: 318 sp->free(sp); 319 done: 320 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 321 return rval; 322 } 323 324 void 325 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 326 uint16_t *data) 327 { 328 fcport->flags &= ~FCF_ASYNC_ACTIVE; 329 /* Don't re-login in target mode */ 330 if (!fcport->tgt_session) 331 qla2x00_mark_device_lost(vha, fcport, 1, 0); 332 qlt_logo_completion_handler(fcport, data[0]); 333 } 334 335 static void 336 qla2x00_async_prlo_sp_done(void *s, int res) 337 { 338 srb_t *sp = (srb_t *)s; 339 struct srb_iocb *lio = &sp->u.iocb_cmd; 340 struct scsi_qla_host *vha = sp->vha; 341 342 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 343 if (!test_bit(UNLOADING, &vha->dpc_flags)) 344 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 345 lio->u.logio.data); 346 sp->free(sp); 347 } 348 349 int 350 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 351 { 352 srb_t *sp; 353 struct srb_iocb *lio; 354 int rval; 355 356 rval = QLA_FUNCTION_FAILED; 357 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 358 if (!sp) 359 goto done; 360 361 sp->type = SRB_PRLO_CMD; 362 sp->name = "prlo"; 363 364 lio = &sp->u.iocb_cmd; 365 lio->timeout = qla2x00_async_iocb_timeout; 366 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 367 368 sp->done = qla2x00_async_prlo_sp_done; 369 rval = qla2x00_start_sp(sp); 370 if (rval != QLA_SUCCESS) 371 goto done_free_sp; 372 373 ql_dbg(ql_dbg_disc, vha, 0x2070, 374 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 375 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 376 fcport->d_id.b.area, fcport->d_id.b.al_pa); 377 return rval; 378 379 done_free_sp: 380 sp->free(sp); 381 done: 382 fcport->flags &= ~FCF_ASYNC_ACTIVE; 383 return rval; 384 } 385 386 static 387 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 388 { 389 struct fc_port *fcport = ea->fcport; 390 391 ql_dbg(ql_dbg_disc, vha, 0x20d2, 392 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 393 __func__, fcport->port_name, fcport->disc_state, 394 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 395 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 396 397 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 398 ql_dbg(ql_dbg_disc, vha, 0x2066, 399 "%s %8phC: adisc fail: post delete\n", 400 __func__, ea->fcport->port_name); 401 /* deleted = 0 & logout_on_delete = force fw cleanup */ 402 fcport->deleted = 0; 403 fcport->logout_on_delete = 1; 404 qlt_schedule_sess_for_deletion(ea->fcport); 405 return; 406 } 407 408 if (ea->fcport->disc_state == DSC_DELETE_PEND) 409 return; 410 411 if (ea->sp->gen2 != ea->fcport->login_gen) { 412 /* target side must have changed it. */ 413 ql_dbg(ql_dbg_disc, vha, 0x20d3, 414 "%s %8phC generation changed\n", 415 __func__, ea->fcport->port_name); 416 return; 417 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 418 qla_rscn_replay(fcport); 419 qlt_schedule_sess_for_deletion(fcport); 420 return; 421 } 422 423 __qla24xx_handle_gpdb_event(vha, ea); 424 } 425 426 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 427 { 428 struct qla_work_evt *e; 429 430 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 431 if (!e) 432 return QLA_FUNCTION_FAILED; 433 434 e->u.fcport.fcport = fcport; 435 fcport->flags |= FCF_ASYNC_ACTIVE; 436 return qla2x00_post_work(vha, e); 437 } 438 439 static void 440 qla2x00_async_adisc_sp_done(void *ptr, int res) 441 { 442 srb_t *sp = ptr; 443 struct scsi_qla_host *vha = sp->vha; 444 struct event_arg ea; 445 struct srb_iocb *lio = &sp->u.iocb_cmd; 446 447 ql_dbg(ql_dbg_disc, vha, 0x2066, 448 "Async done-%s res %x %8phC\n", 449 sp->name, res, sp->fcport->port_name); 450 451 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 452 453 memset(&ea, 0, sizeof(ea)); 454 ea.event = FCME_ADISC_DONE; 455 ea.rc = res; 456 ea.data[0] = lio->u.logio.data[0]; 457 ea.data[1] = lio->u.logio.data[1]; 458 ea.iop[0] = lio->u.logio.iop[0]; 459 ea.iop[1] = lio->u.logio.iop[1]; 460 ea.fcport = sp->fcport; 461 ea.sp = sp; 462 463 qla2x00_fcport_event_handler(vha, &ea); 464 465 sp->free(sp); 466 } 467 468 int 469 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 470 uint16_t *data) 471 { 472 srb_t *sp; 473 struct srb_iocb *lio; 474 int rval; 475 476 rval = QLA_FUNCTION_FAILED; 477 fcport->flags |= FCF_ASYNC_SENT; 478 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 479 if (!sp) 480 goto done; 481 482 sp->type = SRB_ADISC_CMD; 483 sp->name = "adisc"; 484 485 lio = &sp->u.iocb_cmd; 486 lio->timeout = qla2x00_async_iocb_timeout; 487 sp->gen1 = fcport->rscn_gen; 488 sp->gen2 = fcport->login_gen; 489 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 490 491 sp->done = qla2x00_async_adisc_sp_done; 492 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 493 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 494 495 ql_dbg(ql_dbg_disc, vha, 0x206f, 496 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 497 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 498 499 rval = qla2x00_start_sp(sp); 500 if (rval != QLA_SUCCESS) 501 goto done_free_sp; 502 503 return rval; 504 505 done_free_sp: 506 sp->free(sp); 507 done: 508 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 509 qla2x00_post_async_adisc_work(vha, fcport, data); 510 return rval; 511 } 512 513 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 514 struct event_arg *ea) 515 { 516 fc_port_t *fcport, *conflict_fcport; 517 struct get_name_list_extended *e; 518 u16 i, n, found = 0, loop_id; 519 port_id_t id; 520 u64 wwn; 521 u16 data[2]; 522 u8 current_login_state; 523 524 fcport = ea->fcport; 525 ql_dbg(ql_dbg_disc, vha, 0xffff, 526 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 527 __func__, fcport->port_name, fcport->disc_state, 528 fcport->fw_login_state, ea->rc, 529 fcport->login_gen, fcport->last_login_gen, 530 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 531 532 if (fcport->disc_state == DSC_DELETE_PEND) 533 return; 534 535 if (ea->rc) { /* rval */ 536 if (fcport->login_retry == 0) { 537 ql_dbg(ql_dbg_disc, vha, 0x20de, 538 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 539 fcport->port_name, fcport->login_retry); 540 } 541 return; 542 } 543 544 if (fcport->last_rscn_gen != fcport->rscn_gen) { 545 qla_rscn_replay(fcport); 546 qlt_schedule_sess_for_deletion(fcport); 547 return; 548 } else if (fcport->last_login_gen != fcport->login_gen) { 549 ql_dbg(ql_dbg_disc, vha, 0x20e0, 550 "%s %8phC login gen changed\n", 551 __func__, fcport->port_name); 552 return; 553 } 554 555 n = ea->data[0] / sizeof(struct get_name_list_extended); 556 557 ql_dbg(ql_dbg_disc, vha, 0x20e1, 558 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 559 __func__, __LINE__, fcport->port_name, n, 560 fcport->d_id.b.domain, fcport->d_id.b.area, 561 fcport->d_id.b.al_pa, fcport->loop_id); 562 563 for (i = 0; i < n; i++) { 564 e = &vha->gnl.l[i]; 565 wwn = wwn_to_u64(e->port_name); 566 id.b.domain = e->port_id[2]; 567 id.b.area = e->port_id[1]; 568 id.b.al_pa = e->port_id[0]; 569 id.b.rsvd_1 = 0; 570 571 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 572 continue; 573 574 if (IS_SW_RESV_ADDR(id)) 575 continue; 576 577 found = 1; 578 579 loop_id = le16_to_cpu(e->nport_handle); 580 loop_id = (loop_id & 0x7fff); 581 if (fcport->fc4f_nvme) 582 current_login_state = e->current_login_state >> 4; 583 else 584 current_login_state = e->current_login_state & 0xf; 585 586 587 ql_dbg(ql_dbg_disc, vha, 0x20e2, 588 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 589 __func__, fcport->port_name, 590 e->current_login_state, fcport->fw_login_state, 591 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa, 592 fcport->d_id.b.domain, fcport->d_id.b.area, 593 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 594 595 switch (fcport->disc_state) { 596 case DSC_DELETE_PEND: 597 case DSC_DELETED: 598 break; 599 default: 600 if ((id.b24 != fcport->d_id.b24 && 601 fcport->d_id.b24) || 602 (fcport->loop_id != FC_NO_LOOP_ID && 603 fcport->loop_id != loop_id)) { 604 ql_dbg(ql_dbg_disc, vha, 0x20e3, 605 "%s %d %8phC post del sess\n", 606 __func__, __LINE__, fcport->port_name); 607 qlt_schedule_sess_for_deletion(fcport); 608 return; 609 } 610 break; 611 } 612 613 fcport->loop_id = loop_id; 614 615 wwn = wwn_to_u64(fcport->port_name); 616 qlt_find_sess_invalidate_other(vha, wwn, 617 id, loop_id, &conflict_fcport); 618 619 if (conflict_fcport) { 620 /* 621 * Another share fcport share the same loop_id & 622 * nport id. Conflict fcport needs to finish 623 * cleanup before this fcport can proceed to login. 624 */ 625 conflict_fcport->conflict = fcport; 626 fcport->login_pause = 1; 627 } 628 629 switch (vha->hw->current_topology) { 630 default: 631 switch (current_login_state) { 632 case DSC_LS_PRLI_COMP: 633 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 634 vha, 0x20e4, "%s %d %8phC post gpdb\n", 635 __func__, __LINE__, fcport->port_name); 636 637 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 638 fcport->port_type = FCT_INITIATOR; 639 else 640 fcport->port_type = FCT_TARGET; 641 data[0] = data[1] = 0; 642 qla2x00_post_async_adisc_work(vha, fcport, 643 data); 644 break; 645 case DSC_LS_PORT_UNAVAIL: 646 default: 647 if (fcport->loop_id != FC_NO_LOOP_ID) 648 qla2x00_clear_loop_id(fcport); 649 650 fcport->loop_id = loop_id; 651 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 652 qla24xx_fcport_handle_login(vha, fcport); 653 break; 654 } 655 break; 656 case ISP_CFG_N: 657 fcport->fw_login_state = current_login_state; 658 fcport->d_id = id; 659 switch (current_login_state) { 660 case DSC_LS_PRLI_COMP: 661 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 662 fcport->port_type = FCT_INITIATOR; 663 else 664 fcport->port_type = FCT_TARGET; 665 666 data[0] = data[1] = 0; 667 qla2x00_post_async_adisc_work(vha, fcport, 668 data); 669 break; 670 case DSC_LS_PLOGI_COMP: 671 if (fcport_is_bigger(fcport)) { 672 /* local adapter is smaller */ 673 if (fcport->loop_id != FC_NO_LOOP_ID) 674 qla2x00_clear_loop_id(fcport); 675 676 fcport->loop_id = loop_id; 677 qla24xx_fcport_handle_login(vha, 678 fcport); 679 break; 680 } 681 /* fall through */ 682 default: 683 if (fcport_is_smaller(fcport)) { 684 /* local adapter is bigger */ 685 if (fcport->loop_id != FC_NO_LOOP_ID) 686 qla2x00_clear_loop_id(fcport); 687 688 fcport->loop_id = loop_id; 689 qla24xx_fcport_handle_login(vha, 690 fcport); 691 } 692 break; 693 } 694 break; 695 } /* switch (ha->current_topology) */ 696 } 697 698 if (!found) { 699 switch (vha->hw->current_topology) { 700 case ISP_CFG_F: 701 case ISP_CFG_FL: 702 for (i = 0; i < n; i++) { 703 e = &vha->gnl.l[i]; 704 id.b.domain = e->port_id[0]; 705 id.b.area = e->port_id[1]; 706 id.b.al_pa = e->port_id[2]; 707 id.b.rsvd_1 = 0; 708 loop_id = le16_to_cpu(e->nport_handle); 709 710 if (fcport->d_id.b24 == id.b24) { 711 conflict_fcport = 712 qla2x00_find_fcport_by_wwpn(vha, 713 e->port_name, 0); 714 if (conflict_fcport) { 715 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 716 vha, 0x20e5, 717 "%s %d %8phC post del sess\n", 718 __func__, __LINE__, 719 conflict_fcport->port_name); 720 qlt_schedule_sess_for_deletion 721 (conflict_fcport); 722 } 723 } 724 /* 725 * FW already picked this loop id for 726 * another fcport 727 */ 728 if (fcport->loop_id == loop_id) 729 fcport->loop_id = FC_NO_LOOP_ID; 730 } 731 qla24xx_fcport_handle_login(vha, fcport); 732 break; 733 case ISP_CFG_N: 734 fcport->disc_state = DSC_DELETED; 735 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 736 if (fcport->n2n_link_reset_cnt < 2) { 737 fcport->n2n_link_reset_cnt++; 738 /* 739 * remote port is not sending PLOGI. 740 * Reset link to kick start his state 741 * machine 742 */ 743 set_bit(N2N_LINK_RESET, 744 &vha->dpc_flags); 745 } else { 746 if (fcport->n2n_chip_reset < 1) { 747 ql_log(ql_log_info, vha, 0x705d, 748 "Chip reset to bring laser down"); 749 set_bit(ISP_ABORT_NEEDED, 750 &vha->dpc_flags); 751 fcport->n2n_chip_reset++; 752 } else { 753 ql_log(ql_log_info, vha, 0x705d, 754 "Remote port %8ph is not coming back\n", 755 fcport->port_name); 756 fcport->scan_state = 0; 757 } 758 } 759 qla2xxx_wake_dpc(vha); 760 } else { 761 /* 762 * report port suppose to do PLOGI. Give him 763 * more time. FW will catch it. 764 */ 765 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 766 } 767 break; 768 default: 769 break; 770 } 771 } 772 } /* gnl_event */ 773 774 static void 775 qla24xx_async_gnl_sp_done(void *s, int res) 776 { 777 struct srb *sp = s; 778 struct scsi_qla_host *vha = sp->vha; 779 unsigned long flags; 780 struct fc_port *fcport = NULL, *tf; 781 u16 i, n = 0, loop_id; 782 struct event_arg ea; 783 struct get_name_list_extended *e; 784 u64 wwn; 785 struct list_head h; 786 bool found = false; 787 788 ql_dbg(ql_dbg_disc, vha, 0x20e7, 789 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 790 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 791 sp->u.iocb_cmd.u.mbx.in_mb[2]); 792 793 if (res == QLA_FUNCTION_TIMEOUT) 794 return; 795 796 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 797 memset(&ea, 0, sizeof(ea)); 798 ea.sp = sp; 799 ea.rc = res; 800 ea.event = FCME_GNL_DONE; 801 802 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 803 sizeof(struct get_name_list_extended)) { 804 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 805 sizeof(struct get_name_list_extended); 806 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 807 } 808 809 for (i = 0; i < n; i++) { 810 e = &vha->gnl.l[i]; 811 loop_id = le16_to_cpu(e->nport_handle); 812 /* mask out reserve bit */ 813 loop_id = (loop_id & 0x7fff); 814 set_bit(loop_id, vha->hw->loop_id_map); 815 wwn = wwn_to_u64(e->port_name); 816 817 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 818 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 819 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 820 e->port_id[0], e->current_login_state, e->last_login_state, 821 (loop_id & 0x7fff)); 822 } 823 824 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 825 826 INIT_LIST_HEAD(&h); 827 fcport = tf = NULL; 828 if (!list_empty(&vha->gnl.fcports)) 829 list_splice_init(&vha->gnl.fcports, &h); 830 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 831 832 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 833 list_del_init(&fcport->gnl_entry); 834 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 835 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 836 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 837 ea.fcport = fcport; 838 839 qla2x00_fcport_event_handler(vha, &ea); 840 } 841 842 /* create new fcport if fw has knowledge of new sessions */ 843 for (i = 0; i < n; i++) { 844 port_id_t id; 845 u64 wwnn; 846 847 e = &vha->gnl.l[i]; 848 wwn = wwn_to_u64(e->port_name); 849 850 found = false; 851 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 852 if (!memcmp((u8 *)&wwn, fcport->port_name, 853 WWN_SIZE)) { 854 found = true; 855 break; 856 } 857 } 858 859 id.b.domain = e->port_id[2]; 860 id.b.area = e->port_id[1]; 861 id.b.al_pa = e->port_id[0]; 862 id.b.rsvd_1 = 0; 863 864 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 865 ql_dbg(ql_dbg_disc, vha, 0x2065, 866 "%s %d %8phC %06x post new sess\n", 867 __func__, __LINE__, (u8 *)&wwn, id.b24); 868 wwnn = wwn_to_u64(e->node_name); 869 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 870 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 871 } 872 } 873 874 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 875 vha->gnl.sent = 0; 876 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 877 878 sp->free(sp); 879 } 880 881 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 882 { 883 srb_t *sp; 884 struct srb_iocb *mbx; 885 int rval = QLA_FUNCTION_FAILED; 886 unsigned long flags; 887 u16 *mb; 888 889 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 890 return rval; 891 892 ql_dbg(ql_dbg_disc, vha, 0x20d9, 893 "Async-gnlist WWPN %8phC \n", fcport->port_name); 894 895 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 896 fcport->flags |= FCF_ASYNC_SENT; 897 fcport->disc_state = DSC_GNL; 898 fcport->last_rscn_gen = fcport->rscn_gen; 899 fcport->last_login_gen = fcport->login_gen; 900 901 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 902 if (vha->gnl.sent) { 903 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 904 return QLA_SUCCESS; 905 } 906 vha->gnl.sent = 1; 907 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 908 909 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 910 if (!sp) 911 goto done; 912 913 sp->type = SRB_MB_IOCB; 914 sp->name = "gnlist"; 915 sp->gen1 = fcport->rscn_gen; 916 sp->gen2 = fcport->login_gen; 917 918 mbx = &sp->u.iocb_cmd; 919 mbx->timeout = qla2x00_async_iocb_timeout; 920 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 921 922 mb = sp->u.iocb_cmd.u.mbx.out_mb; 923 mb[0] = MBC_PORT_NODE_NAME_LIST; 924 mb[1] = BIT_2 | BIT_3; 925 mb[2] = MSW(vha->gnl.ldma); 926 mb[3] = LSW(vha->gnl.ldma); 927 mb[6] = MSW(MSD(vha->gnl.ldma)); 928 mb[7] = LSW(MSD(vha->gnl.ldma)); 929 mb[8] = vha->gnl.size; 930 mb[9] = vha->vp_idx; 931 932 sp->done = qla24xx_async_gnl_sp_done; 933 934 rval = qla2x00_start_sp(sp); 935 if (rval != QLA_SUCCESS) 936 goto done_free_sp; 937 938 ql_dbg(ql_dbg_disc, vha, 0x20da, 939 "Async-%s - OUT WWPN %8phC hndl %x\n", 940 sp->name, fcport->port_name, sp->handle); 941 942 return rval; 943 944 done_free_sp: 945 sp->free(sp); 946 fcport->flags &= ~FCF_ASYNC_SENT; 947 done: 948 return rval; 949 } 950 951 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 952 { 953 struct qla_work_evt *e; 954 955 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 956 if (!e) 957 return QLA_FUNCTION_FAILED; 958 959 e->u.fcport.fcport = fcport; 960 fcport->flags |= FCF_ASYNC_ACTIVE; 961 return qla2x00_post_work(vha, e); 962 } 963 964 static 965 void qla24xx_async_gpdb_sp_done(void *s, int res) 966 { 967 struct srb *sp = s; 968 struct scsi_qla_host *vha = sp->vha; 969 struct qla_hw_data *ha = vha->hw; 970 fc_port_t *fcport = sp->fcport; 971 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 972 struct event_arg ea; 973 974 ql_dbg(ql_dbg_disc, vha, 0x20db, 975 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 976 sp->name, res, fcport->port_name, mb[1], mb[2]); 977 978 if (res == QLA_FUNCTION_TIMEOUT) { 979 dma_pool_free(sp->vha->hw->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 980 sp->u.iocb_cmd.u.mbx.in_dma); 981 return; 982 } 983 984 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 985 memset(&ea, 0, sizeof(ea)); 986 ea.event = FCME_GPDB_DONE; 987 ea.fcport = fcport; 988 ea.sp = sp; 989 990 qla2x00_fcport_event_handler(vha, &ea); 991 992 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 993 sp->u.iocb_cmd.u.mbx.in_dma); 994 995 sp->free(sp); 996 } 997 998 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 999 { 1000 struct qla_work_evt *e; 1001 1002 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1003 if (!e) 1004 return QLA_FUNCTION_FAILED; 1005 1006 e->u.fcport.fcport = fcport; 1007 1008 return qla2x00_post_work(vha, e); 1009 } 1010 1011 static void 1012 qla2x00_async_prli_sp_done(void *ptr, int res) 1013 { 1014 srb_t *sp = ptr; 1015 struct scsi_qla_host *vha = sp->vha; 1016 struct srb_iocb *lio = &sp->u.iocb_cmd; 1017 struct event_arg ea; 1018 1019 ql_dbg(ql_dbg_disc, vha, 0x2129, 1020 "%s %8phC res %d \n", __func__, 1021 sp->fcport->port_name, res); 1022 1023 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1024 1025 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1026 memset(&ea, 0, sizeof(ea)); 1027 ea.event = FCME_PRLI_DONE; 1028 ea.fcport = sp->fcport; 1029 ea.data[0] = lio->u.logio.data[0]; 1030 ea.data[1] = lio->u.logio.data[1]; 1031 ea.iop[0] = lio->u.logio.iop[0]; 1032 ea.iop[1] = lio->u.logio.iop[1]; 1033 ea.sp = sp; 1034 1035 qla2x00_fcport_event_handler(vha, &ea); 1036 } 1037 1038 sp->free(sp); 1039 } 1040 1041 int 1042 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1043 { 1044 srb_t *sp; 1045 struct srb_iocb *lio; 1046 int rval = QLA_FUNCTION_FAILED; 1047 1048 if (!vha->flags.online) 1049 return rval; 1050 1051 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1052 fcport->fw_login_state == DSC_LS_PRLI_PEND) 1053 return rval; 1054 1055 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1056 if (!sp) 1057 return rval; 1058 1059 fcport->flags |= FCF_ASYNC_SENT; 1060 fcport->logout_completed = 0; 1061 1062 sp->type = SRB_PRLI_CMD; 1063 sp->name = "prli"; 1064 1065 lio = &sp->u.iocb_cmd; 1066 lio->timeout = qla2x00_async_iocb_timeout; 1067 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1068 1069 sp->done = qla2x00_async_prli_sp_done; 1070 lio->u.logio.flags = 0; 1071 1072 if (fcport->fc4f_nvme) 1073 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1074 1075 rval = qla2x00_start_sp(sp); 1076 if (rval != QLA_SUCCESS) { 1077 fcport->flags |= FCF_LOGIN_NEEDED; 1078 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1079 goto done_free_sp; 1080 } 1081 1082 ql_dbg(ql_dbg_disc, vha, 0x211b, 1083 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 1084 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1085 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc"); 1086 1087 return rval; 1088 1089 done_free_sp: 1090 sp->free(sp); 1091 fcport->flags &= ~FCF_ASYNC_SENT; 1092 return rval; 1093 } 1094 1095 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1096 { 1097 struct qla_work_evt *e; 1098 1099 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1100 if (!e) 1101 return QLA_FUNCTION_FAILED; 1102 1103 e->u.fcport.fcport = fcport; 1104 e->u.fcport.opt = opt; 1105 fcport->flags |= FCF_ASYNC_ACTIVE; 1106 return qla2x00_post_work(vha, e); 1107 } 1108 1109 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1110 { 1111 srb_t *sp; 1112 struct srb_iocb *mbx; 1113 int rval = QLA_FUNCTION_FAILED; 1114 u16 *mb; 1115 dma_addr_t pd_dma; 1116 struct port_database_24xx *pd; 1117 struct qla_hw_data *ha = vha->hw; 1118 1119 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1120 return rval; 1121 1122 fcport->disc_state = DSC_GPDB; 1123 1124 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1125 if (!sp) 1126 goto done; 1127 1128 fcport->flags |= FCF_ASYNC_SENT; 1129 sp->type = SRB_MB_IOCB; 1130 sp->name = "gpdb"; 1131 sp->gen1 = fcport->rscn_gen; 1132 sp->gen2 = fcport->login_gen; 1133 1134 mbx = &sp->u.iocb_cmd; 1135 mbx->timeout = qla2x00_async_iocb_timeout; 1136 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1137 1138 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1139 if (pd == NULL) { 1140 ql_log(ql_log_warn, vha, 0xd043, 1141 "Failed to allocate port database structure.\n"); 1142 goto done_free_sp; 1143 } 1144 1145 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1146 mb[0] = MBC_GET_PORT_DATABASE; 1147 mb[1] = fcport->loop_id; 1148 mb[2] = MSW(pd_dma); 1149 mb[3] = LSW(pd_dma); 1150 mb[6] = MSW(MSD(pd_dma)); 1151 mb[7] = LSW(MSD(pd_dma)); 1152 mb[9] = vha->vp_idx; 1153 mb[10] = opt; 1154 1155 mbx->u.mbx.in = (void *)pd; 1156 mbx->u.mbx.in_dma = pd_dma; 1157 1158 sp->done = qla24xx_async_gpdb_sp_done; 1159 1160 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1161 "Async-%s %8phC hndl %x opt %x\n", 1162 sp->name, fcport->port_name, sp->handle, opt); 1163 1164 rval = qla2x00_start_sp(sp); 1165 if (rval != QLA_SUCCESS) 1166 goto done_free_sp; 1167 return rval; 1168 1169 done_free_sp: 1170 if (pd) 1171 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1172 1173 sp->free(sp); 1174 fcport->flags &= ~FCF_ASYNC_SENT; 1175 done: 1176 qla24xx_post_gpdb_work(vha, fcport, opt); 1177 return rval; 1178 } 1179 1180 static 1181 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1182 { 1183 unsigned long flags; 1184 1185 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1186 ea->fcport->login_gen++; 1187 ea->fcport->deleted = 0; 1188 ea->fcport->logout_on_delete = 1; 1189 1190 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1191 vha->fcport_count++; 1192 ea->fcport->login_succ = 1; 1193 1194 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1195 qla24xx_sched_upd_fcport(ea->fcport); 1196 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1197 } else if (ea->fcport->login_succ) { 1198 /* 1199 * We have an existing session. A late RSCN delivery 1200 * must have triggered the session to be re-validate. 1201 * Session is still valid. 1202 */ 1203 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1204 "%s %d %8phC session revalidate success\n", 1205 __func__, __LINE__, ea->fcport->port_name); 1206 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1207 } 1208 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1209 } 1210 1211 static 1212 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1213 { 1214 fc_port_t *fcport = ea->fcport; 1215 struct port_database_24xx *pd; 1216 struct srb *sp = ea->sp; 1217 uint8_t ls; 1218 1219 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1220 1221 fcport->flags &= ~FCF_ASYNC_SENT; 1222 1223 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1224 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name, 1225 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme, 1226 ea->rc); 1227 1228 if (fcport->disc_state == DSC_DELETE_PEND) 1229 return; 1230 1231 if (fcport->fc4f_nvme) 1232 ls = pd->current_login_state >> 4; 1233 else 1234 ls = pd->current_login_state & 0xf; 1235 1236 if (ea->sp->gen2 != fcport->login_gen) { 1237 /* target side must have changed it. */ 1238 1239 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1240 "%s %8phC generation changed\n", 1241 __func__, fcport->port_name); 1242 return; 1243 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1244 qla_rscn_replay(fcport); 1245 qlt_schedule_sess_for_deletion(fcport); 1246 return; 1247 } 1248 1249 switch (ls) { 1250 case PDS_PRLI_COMPLETE: 1251 __qla24xx_parse_gpdb(vha, fcport, pd); 1252 break; 1253 case PDS_PLOGI_PENDING: 1254 case PDS_PLOGI_COMPLETE: 1255 case PDS_PRLI_PENDING: 1256 case PDS_PRLI2_PENDING: 1257 /* Set discovery state back to GNL to Relogin attempt */ 1258 if (qla_dual_mode_enabled(vha) || 1259 qla_ini_mode_enabled(vha)) { 1260 fcport->disc_state = DSC_GNL; 1261 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1262 } 1263 return; 1264 case PDS_LOGO_PENDING: 1265 case PDS_PORT_UNAVAILABLE: 1266 default: 1267 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1268 __func__, __LINE__, fcport->port_name); 1269 qlt_schedule_sess_for_deletion(fcport); 1270 return; 1271 } 1272 __qla24xx_handle_gpdb_event(vha, ea); 1273 } /* gpdb event */ 1274 1275 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1276 { 1277 u8 login = 0; 1278 int rc; 1279 1280 if (qla_tgt_mode_enabled(vha)) 1281 return; 1282 1283 if (qla_dual_mode_enabled(vha)) { 1284 if (N2N_TOPO(vha->hw)) { 1285 u64 mywwn, wwn; 1286 1287 mywwn = wwn_to_u64(vha->port_name); 1288 wwn = wwn_to_u64(fcport->port_name); 1289 if (mywwn > wwn) 1290 login = 1; 1291 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1292 && time_after_eq(jiffies, 1293 fcport->plogi_nack_done_deadline)) 1294 login = 1; 1295 } else { 1296 login = 1; 1297 } 1298 } else { 1299 /* initiator mode */ 1300 login = 1; 1301 } 1302 1303 if (login && fcport->login_retry) { 1304 fcport->login_retry--; 1305 if (fcport->loop_id == FC_NO_LOOP_ID) { 1306 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1307 rc = qla2x00_find_new_loop_id(vha, fcport); 1308 if (rc) { 1309 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1310 "%s %d %8phC post del sess - out of loopid\n", 1311 __func__, __LINE__, fcport->port_name); 1312 fcport->scan_state = 0; 1313 qlt_schedule_sess_for_deletion(fcport); 1314 return; 1315 } 1316 } 1317 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1318 "%s %d %8phC post login\n", 1319 __func__, __LINE__, fcport->port_name); 1320 qla2x00_post_async_login_work(vha, fcport, NULL); 1321 } 1322 } 1323 1324 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1325 { 1326 u16 data[2]; 1327 u64 wwn; 1328 u16 sec; 1329 1330 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8, 1331 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1332 __func__, fcport->port_name, fcport->disc_state, 1333 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1334 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1335 fcport->login_gen, fcport->loop_id, fcport->scan_state); 1336 1337 if (fcport->scan_state != QLA_FCPORT_FOUND) 1338 return 0; 1339 1340 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1341 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1342 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1343 return 0; 1344 1345 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1346 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1347 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1348 return 0; 1349 } 1350 } 1351 1352 /* for pure Target Mode. Login will not be initiated */ 1353 if (vha->host->active_mode == MODE_TARGET) 1354 return 0; 1355 1356 if (fcport->flags & FCF_ASYNC_SENT) { 1357 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1358 return 0; 1359 } 1360 1361 switch (fcport->disc_state) { 1362 case DSC_DELETED: 1363 wwn = wwn_to_u64(fcport->node_name); 1364 switch (vha->hw->current_topology) { 1365 case ISP_CFG_N: 1366 if (fcport_is_smaller(fcport)) { 1367 /* this adapter is bigger */ 1368 if (fcport->login_retry) { 1369 if (fcport->loop_id == FC_NO_LOOP_ID) { 1370 qla2x00_find_new_loop_id(vha, 1371 fcport); 1372 fcport->fw_login_state = 1373 DSC_LS_PORT_UNAVAIL; 1374 } 1375 fcport->login_retry--; 1376 qla_post_els_plogi_work(vha, fcport); 1377 } else { 1378 ql_log(ql_log_info, vha, 0x705d, 1379 "Unable to reach remote port %8phC", 1380 fcport->port_name); 1381 } 1382 } else { 1383 qla24xx_post_gnl_work(vha, fcport); 1384 } 1385 break; 1386 default: 1387 if (wwn == 0) { 1388 ql_dbg(ql_dbg_disc, vha, 0xffff, 1389 "%s %d %8phC post GNNID\n", 1390 __func__, __LINE__, fcport->port_name); 1391 qla24xx_post_gnnid_work(vha, fcport); 1392 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1393 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1394 "%s %d %8phC post gnl\n", 1395 __func__, __LINE__, fcport->port_name); 1396 qla24xx_post_gnl_work(vha, fcport); 1397 } else { 1398 qla_chk_n2n_b4_login(vha, fcport); 1399 } 1400 break; 1401 } 1402 break; 1403 1404 case DSC_GNL: 1405 switch (vha->hw->current_topology) { 1406 case ISP_CFG_N: 1407 if ((fcport->current_login_state & 0xf) == 0x6) { 1408 ql_dbg(ql_dbg_disc, vha, 0x2118, 1409 "%s %d %8phC post GPDB work\n", 1410 __func__, __LINE__, fcport->port_name); 1411 fcport->chip_reset = 1412 vha->hw->base_qpair->chip_reset; 1413 qla24xx_post_gpdb_work(vha, fcport, 0); 1414 } else { 1415 ql_dbg(ql_dbg_disc, vha, 0x2118, 1416 "%s %d %8phC post NVMe PRLI\n", 1417 __func__, __LINE__, fcport->port_name); 1418 qla24xx_post_prli_work(vha, fcport); 1419 } 1420 break; 1421 default: 1422 if (fcport->login_pause) { 1423 fcport->last_rscn_gen = fcport->rscn_gen; 1424 fcport->last_login_gen = fcport->login_gen; 1425 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1426 break; 1427 } 1428 qla_chk_n2n_b4_login(vha, fcport); 1429 break; 1430 } 1431 break; 1432 1433 case DSC_LOGIN_FAILED: 1434 if (N2N_TOPO(vha->hw)) 1435 qla_chk_n2n_b4_login(vha, fcport); 1436 else 1437 qlt_schedule_sess_for_deletion(fcport); 1438 break; 1439 1440 case DSC_LOGIN_COMPLETE: 1441 /* recheck login state */ 1442 data[0] = data[1] = 0; 1443 qla2x00_post_async_adisc_work(vha, fcport, data); 1444 break; 1445 1446 case DSC_LOGIN_PEND: 1447 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1448 qla24xx_post_prli_work(vha, fcport); 1449 break; 1450 1451 case DSC_UPD_FCPORT: 1452 sec = jiffies_to_msecs(jiffies - 1453 fcport->jiffies_at_registration)/1000; 1454 if (fcport->sec_since_registration < sec && sec && 1455 !(sec % 60)) { 1456 fcport->sec_since_registration = sec; 1457 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1458 "%s %8phC - Slow Rport registration(%d Sec)\n", 1459 __func__, fcport->port_name, sec); 1460 } 1461 1462 if (fcport->next_disc_state != DSC_DELETE_PEND) 1463 fcport->next_disc_state = DSC_ADISC; 1464 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1465 break; 1466 1467 default: 1468 break; 1469 } 1470 1471 return 0; 1472 } 1473 1474 static 1475 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1476 { 1477 fcport->rscn_gen++; 1478 1479 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1480 "%s %8phC DS %d LS %d\n", 1481 __func__, fcport->port_name, fcport->disc_state, 1482 fcport->fw_login_state); 1483 1484 if (fcport->flags & FCF_ASYNC_SENT) 1485 return; 1486 1487 switch (fcport->disc_state) { 1488 case DSC_DELETED: 1489 case DSC_LOGIN_COMPLETE: 1490 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1491 break; 1492 default: 1493 break; 1494 } 1495 } 1496 1497 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1498 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1499 { 1500 struct qla_work_evt *e; 1501 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1502 if (!e) 1503 return QLA_FUNCTION_FAILED; 1504 1505 e->u.new_sess.id = *id; 1506 e->u.new_sess.pla = pla; 1507 e->u.new_sess.fc4_type = fc4_type; 1508 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1509 if (node_name) 1510 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1511 1512 return qla2x00_post_work(vha, e); 1513 } 1514 1515 static 1516 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1517 struct event_arg *ea) 1518 { 1519 fc_port_t *fcport = ea->fcport; 1520 1521 ql_dbg(ql_dbg_disc, vha, 0x2102, 1522 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1523 __func__, fcport->port_name, fcport->disc_state, 1524 fcport->fw_login_state, fcport->login_pause, 1525 fcport->deleted, fcport->conflict, 1526 fcport->last_rscn_gen, fcport->rscn_gen, 1527 fcport->last_login_gen, fcport->login_gen, 1528 fcport->flags); 1529 1530 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1531 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1532 return; 1533 1534 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1535 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1536 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1537 return; 1538 } 1539 } 1540 1541 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1542 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1543 __func__, __LINE__, fcport->port_name); 1544 1545 return; 1546 } 1547 1548 qla24xx_fcport_handle_login(vha, fcport); 1549 } 1550 1551 1552 static void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1553 struct event_arg *ea) 1554 { 1555 ql_dbg(ql_dbg_disc, vha, 0x2118, 1556 "%s %d %8phC post PRLI\n", 1557 __func__, __LINE__, ea->fcport->port_name); 1558 qla24xx_post_prli_work(vha, ea->fcport); 1559 } 1560 1561 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1562 { 1563 fc_port_t *f, *tf; 1564 uint32_t id = 0, mask, rid; 1565 fc_port_t *fcport; 1566 1567 switch (ea->event) { 1568 case FCME_RELOGIN: 1569 if (test_bit(UNLOADING, &vha->dpc_flags)) 1570 return; 1571 1572 qla24xx_handle_relogin_event(vha, ea); 1573 break; 1574 case FCME_RSCN: 1575 if (test_bit(UNLOADING, &vha->dpc_flags)) 1576 return; 1577 switch (ea->id.b.rsvd_1) { 1578 case RSCN_PORT_ADDR: 1579 #define BIGSCAN 1 1580 #if defined BIGSCAN & BIGSCAN > 0 1581 { 1582 unsigned long flags; 1583 fcport = qla2x00_find_fcport_by_nportid 1584 (vha, &ea->id, 1); 1585 if (fcport) { 1586 fcport->scan_needed = 1; 1587 fcport->rscn_gen++; 1588 } 1589 1590 spin_lock_irqsave(&vha->work_lock, flags); 1591 if (vha->scan.scan_flags == 0) { 1592 ql_dbg(ql_dbg_disc, vha, 0xffff, 1593 "%s: schedule\n", __func__); 1594 vha->scan.scan_flags |= SF_QUEUED; 1595 schedule_delayed_work(&vha->scan.scan_work, 5); 1596 } 1597 spin_unlock_irqrestore(&vha->work_lock, flags); 1598 } 1599 #else 1600 { 1601 int rc; 1602 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1603 if (!fcport) { 1604 /* cable moved */ 1605 rc = qla24xx_post_gpnid_work(vha, &ea->id); 1606 if (rc) { 1607 ql_log(ql_log_warn, vha, 0xd044, 1608 "RSCN GPNID work failed %06x\n", 1609 ea->id.b24); 1610 } 1611 } else { 1612 ea->fcport = fcport; 1613 fcport->scan_needed = 1; 1614 qla24xx_handle_rscn_event(fcport, ea); 1615 } 1616 } 1617 #endif 1618 break; 1619 case RSCN_AREA_ADDR: 1620 case RSCN_DOM_ADDR: 1621 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1622 mask = 0xffff00; 1623 ql_dbg(ql_dbg_async, vha, 0x5044, 1624 "RSCN: Area 0x%06x was affected\n", 1625 ea->id.b24); 1626 } else { 1627 mask = 0xff0000; 1628 ql_dbg(ql_dbg_async, vha, 0x507a, 1629 "RSCN: Domain 0x%06x was affected\n", 1630 ea->id.b24); 1631 } 1632 1633 rid = ea->id.b24 & mask; 1634 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1635 list) { 1636 id = f->d_id.b24 & mask; 1637 if (rid == id) { 1638 ea->fcport = f; 1639 qla24xx_handle_rscn_event(f, ea); 1640 } 1641 } 1642 break; 1643 case RSCN_FAB_ADDR: 1644 default: 1645 ql_log(ql_log_warn, vha, 0xd045, 1646 "RSCN: Fabric was affected. Addr format %d\n", 1647 ea->id.b.rsvd_1); 1648 qla2x00_mark_all_devices_lost(vha, 1); 1649 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1650 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1651 } 1652 break; 1653 case FCME_GNL_DONE: 1654 qla24xx_handle_gnl_done_event(vha, ea); 1655 break; 1656 case FCME_GPSC_DONE: 1657 qla24xx_handle_gpsc_event(vha, ea); 1658 break; 1659 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1660 qla24xx_handle_plogi_done_event(vha, ea); 1661 break; 1662 case FCME_PRLI_DONE: 1663 qla24xx_handle_prli_done_event(vha, ea); 1664 break; 1665 case FCME_GPDB_DONE: 1666 qla24xx_handle_gpdb_event(vha, ea); 1667 break; 1668 case FCME_GPNID_DONE: 1669 qla24xx_handle_gpnid_event(vha, ea); 1670 break; 1671 case FCME_GFFID_DONE: 1672 qla24xx_handle_gffid_event(vha, ea); 1673 break; 1674 case FCME_ADISC_DONE: 1675 qla24xx_handle_adisc_event(vha, ea); 1676 break; 1677 case FCME_GNNID_DONE: 1678 qla24xx_handle_gnnid_event(vha, ea); 1679 break; 1680 case FCME_GFPNID_DONE: 1681 qla24xx_handle_gfpnid_event(vha, ea); 1682 break; 1683 case FCME_ELS_PLOGI_DONE: 1684 qla_handle_els_plogi_done(vha, ea); 1685 break; 1686 default: 1687 BUG_ON(1); 1688 break; 1689 } 1690 } 1691 1692 /* 1693 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1694 * to be consumed by the fcport 1695 */ 1696 void qla_rscn_replay(fc_port_t *fcport) 1697 { 1698 struct event_arg ea; 1699 1700 switch (fcport->disc_state) { 1701 case DSC_DELETE_PEND: 1702 return; 1703 default: 1704 break; 1705 } 1706 1707 if (fcport->scan_needed) { 1708 memset(&ea, 0, sizeof(ea)); 1709 ea.event = FCME_RSCN; 1710 ea.id = fcport->d_id; 1711 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1712 #if defined BIGSCAN & BIGSCAN > 0 1713 qla2x00_fcport_event_handler(fcport->vha, &ea); 1714 #else 1715 qla24xx_post_gpnid_work(fcport->vha, &ea.id); 1716 #endif 1717 } 1718 } 1719 1720 static void 1721 qla2x00_tmf_iocb_timeout(void *data) 1722 { 1723 srb_t *sp = data; 1724 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1725 1726 tmf->u.tmf.comp_status = CS_TIMEOUT; 1727 complete(&tmf->u.tmf.comp); 1728 } 1729 1730 static void 1731 qla2x00_tmf_sp_done(void *ptr, int res) 1732 { 1733 srb_t *sp = ptr; 1734 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1735 1736 complete(&tmf->u.tmf.comp); 1737 } 1738 1739 int 1740 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1741 uint32_t tag) 1742 { 1743 struct scsi_qla_host *vha = fcport->vha; 1744 struct srb_iocb *tm_iocb; 1745 srb_t *sp; 1746 int rval = QLA_FUNCTION_FAILED; 1747 1748 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1749 if (!sp) 1750 goto done; 1751 1752 tm_iocb = &sp->u.iocb_cmd; 1753 sp->type = SRB_TM_CMD; 1754 sp->name = "tmf"; 1755 1756 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1757 init_completion(&tm_iocb->u.tmf.comp); 1758 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1759 1760 tm_iocb->u.tmf.flags = flags; 1761 tm_iocb->u.tmf.lun = lun; 1762 tm_iocb->u.tmf.data = tag; 1763 sp->done = qla2x00_tmf_sp_done; 1764 1765 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1766 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1767 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1768 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1769 1770 rval = qla2x00_start_sp(sp); 1771 if (rval != QLA_SUCCESS) 1772 goto done_free_sp; 1773 wait_for_completion(&tm_iocb->u.tmf.comp); 1774 1775 rval = tm_iocb->u.tmf.data; 1776 1777 if (rval != QLA_SUCCESS) { 1778 ql_log(ql_log_warn, vha, 0x8030, 1779 "TM IOCB failed (%x).\n", rval); 1780 } 1781 1782 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1783 flags = tm_iocb->u.tmf.flags; 1784 lun = (uint16_t)tm_iocb->u.tmf.lun; 1785 1786 /* Issue Marker IOCB */ 1787 qla2x00_marker(vha, vha->hw->req_q_map[0], 1788 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1789 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1790 } 1791 1792 done_free_sp: 1793 sp->free(sp); 1794 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1795 done: 1796 return rval; 1797 } 1798 1799 static void 1800 qla24xx_abort_iocb_timeout(void *data) 1801 { 1802 srb_t *sp = data; 1803 struct srb_iocb *abt = &sp->u.iocb_cmd; 1804 1805 abt->u.abt.comp_status = CS_TIMEOUT; 1806 sp->done(sp, QLA_FUNCTION_TIMEOUT); 1807 } 1808 1809 static void 1810 qla24xx_abort_sp_done(void *ptr, int res) 1811 { 1812 srb_t *sp = ptr; 1813 struct srb_iocb *abt = &sp->u.iocb_cmd; 1814 1815 if (del_timer(&sp->u.iocb_cmd.timer)) { 1816 if (sp->flags & SRB_WAKEUP_ON_COMP) 1817 complete(&abt->u.abt.comp); 1818 else 1819 sp->free(sp); 1820 } 1821 } 1822 1823 int 1824 qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 1825 { 1826 scsi_qla_host_t *vha = cmd_sp->vha; 1827 struct srb_iocb *abt_iocb; 1828 srb_t *sp; 1829 int rval = QLA_FUNCTION_FAILED; 1830 1831 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 1832 GFP_KERNEL); 1833 if (!sp) 1834 goto done; 1835 1836 abt_iocb = &sp->u.iocb_cmd; 1837 sp->type = SRB_ABT_CMD; 1838 sp->name = "abort"; 1839 sp->qpair = cmd_sp->qpair; 1840 if (wait) 1841 sp->flags = SRB_WAKEUP_ON_COMP; 1842 1843 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1844 init_completion(&abt_iocb->u.abt.comp); 1845 /* FW can send 2 x ABTS's timeout/20s */ 1846 qla2x00_init_timer(sp, 42); 1847 1848 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1849 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 1850 1851 sp->done = qla24xx_abort_sp_done; 1852 1853 ql_dbg(ql_dbg_async, vha, 0x507c, 1854 "Abort command issued - hdl=%x, type=%x\n", 1855 cmd_sp->handle, cmd_sp->type); 1856 1857 rval = qla2x00_start_sp(sp); 1858 if (rval != QLA_SUCCESS) 1859 goto done_free_sp; 1860 1861 if (wait) { 1862 wait_for_completion(&abt_iocb->u.abt.comp); 1863 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1864 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1865 } else { 1866 goto done; 1867 } 1868 1869 done_free_sp: 1870 sp->free(sp); 1871 done: 1872 return rval; 1873 } 1874 1875 int 1876 qla24xx_async_abort_command(srb_t *sp) 1877 { 1878 unsigned long flags = 0; 1879 1880 uint32_t handle; 1881 fc_port_t *fcport = sp->fcport; 1882 struct qla_qpair *qpair = sp->qpair; 1883 struct scsi_qla_host *vha = fcport->vha; 1884 struct req_que *req = qpair->req; 1885 1886 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1887 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1888 if (req->outstanding_cmds[handle] == sp) 1889 break; 1890 } 1891 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1892 1893 if (handle == req->num_outstanding_cmds) { 1894 /* Command not found. */ 1895 return QLA_FUNCTION_FAILED; 1896 } 1897 if (sp->type == SRB_FXIOCB_DCMD) 1898 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1899 FXDISC_ABORT_IOCTL); 1900 1901 return qla24xx_async_abort_cmd(sp, true); 1902 } 1903 1904 static void 1905 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1906 { 1907 switch (ea->data[0]) { 1908 case MBS_COMMAND_COMPLETE: 1909 ql_dbg(ql_dbg_disc, vha, 0x2118, 1910 "%s %d %8phC post gpdb\n", 1911 __func__, __LINE__, ea->fcport->port_name); 1912 1913 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1914 ea->fcport->logout_on_delete = 1; 1915 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1916 break; 1917 default: 1918 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1919 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1920 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1921 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1922 break; 1923 } 1924 1925 if (ea->fcport->n2n_flag) { 1926 ql_dbg(ql_dbg_disc, vha, 0x2118, 1927 "%s %d %8phC post fc4 prli\n", 1928 __func__, __LINE__, ea->fcport->port_name); 1929 ea->fcport->fc4f_nvme = 0; 1930 ea->fcport->n2n_flag = 0; 1931 qla24xx_post_prli_work(vha, ea->fcport); 1932 } 1933 ql_dbg(ql_dbg_disc, vha, 0x2119, 1934 "%s %d %8phC unhandle event of %x\n", 1935 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1936 break; 1937 } 1938 } 1939 1940 static void 1941 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1942 { 1943 port_id_t cid; /* conflict Nport id */ 1944 u16 lid; 1945 struct fc_port *conflict_fcport; 1946 unsigned long flags; 1947 struct fc_port *fcport = ea->fcport; 1948 1949 ql_dbg(ql_dbg_disc, vha, 0xffff, 1950 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1951 __func__, fcport->port_name, fcport->disc_state, 1952 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1953 ea->sp->gen1, fcport->rscn_gen, 1954 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1955 1956 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1957 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1958 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1959 "%s %d %8phC Remote is trying to login\n", 1960 __func__, __LINE__, fcport->port_name); 1961 return; 1962 } 1963 1964 if (fcport->disc_state == DSC_DELETE_PEND) 1965 return; 1966 1967 if (ea->sp->gen2 != fcport->login_gen) { 1968 /* target side must have changed it. */ 1969 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1970 "%s %8phC generation changed\n", 1971 __func__, fcport->port_name); 1972 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1973 return; 1974 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1975 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1976 "%s %8phC RSCN generation changed\n", 1977 __func__, fcport->port_name); 1978 qla_rscn_replay(fcport); 1979 qlt_schedule_sess_for_deletion(fcport); 1980 return; 1981 } 1982 1983 switch (ea->data[0]) { 1984 case MBS_COMMAND_COMPLETE: 1985 /* 1986 * Driver must validate login state - If PRLI not complete, 1987 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1988 * requests. 1989 */ 1990 if (ea->fcport->fc4f_nvme) { 1991 ql_dbg(ql_dbg_disc, vha, 0x2117, 1992 "%s %d %8phC post prli\n", 1993 __func__, __LINE__, ea->fcport->port_name); 1994 qla24xx_post_prli_work(vha, ea->fcport); 1995 } else { 1996 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1997 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1998 __func__, __LINE__, ea->fcport->port_name, 1999 ea->fcport->loop_id, ea->fcport->d_id.b24); 2000 2001 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2002 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2003 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2004 ea->fcport->logout_on_delete = 1; 2005 ea->fcport->send_els_logo = 0; 2006 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 2007 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2008 2009 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2010 } 2011 break; 2012 case MBS_COMMAND_ERROR: 2013 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2014 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2015 2016 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2017 ea->fcport->disc_state = DSC_LOGIN_FAILED; 2018 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 2019 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2020 else 2021 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 2022 break; 2023 case MBS_LOOP_ID_USED: 2024 /* data[1] = IO PARAM 1 = nport ID */ 2025 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2026 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2027 cid.b.al_pa = ea->iop[1] & 0xff; 2028 cid.b.rsvd_1 = 0; 2029 2030 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2031 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2032 __func__, __LINE__, ea->fcport->port_name, 2033 ea->fcport->loop_id, cid.b24); 2034 2035 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2036 ea->fcport->loop_id = FC_NO_LOOP_ID; 2037 qla24xx_post_gnl_work(vha, ea->fcport); 2038 break; 2039 case MBS_PORT_ID_USED: 2040 lid = ea->iop[1] & 0xffff; 2041 qlt_find_sess_invalidate_other(vha, 2042 wwn_to_u64(ea->fcport->port_name), 2043 ea->fcport->d_id, lid, &conflict_fcport); 2044 2045 if (conflict_fcport) { 2046 /* 2047 * Another fcport share the same loop_id/nport id. 2048 * Conflict fcport needs to finish cleanup before this 2049 * fcport can proceed to login. 2050 */ 2051 conflict_fcport->conflict = ea->fcport; 2052 ea->fcport->login_pause = 1; 2053 2054 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2055 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2056 __func__, __LINE__, ea->fcport->port_name, 2057 ea->fcport->d_id.b24, lid); 2058 } else { 2059 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2060 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2061 __func__, __LINE__, ea->fcport->port_name, 2062 ea->fcport->d_id.b24, lid); 2063 2064 qla2x00_clear_loop_id(ea->fcport); 2065 set_bit(lid, vha->hw->loop_id_map); 2066 ea->fcport->loop_id = lid; 2067 ea->fcport->keep_nport_handle = 0; 2068 qlt_schedule_sess_for_deletion(ea->fcport); 2069 } 2070 break; 2071 } 2072 return; 2073 } 2074 2075 void 2076 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 2077 uint16_t *data) 2078 { 2079 qlt_logo_completion_handler(fcport, data[0]); 2080 fcport->login_gen++; 2081 fcport->flags &= ~FCF_ASYNC_ACTIVE; 2082 return; 2083 } 2084 2085 /****************************************************************************/ 2086 /* QLogic ISP2x00 Hardware Support Functions. */ 2087 /****************************************************************************/ 2088 2089 static int 2090 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2091 { 2092 int rval = QLA_SUCCESS; 2093 struct qla_hw_data *ha = vha->hw; 2094 uint32_t idc_major_ver, idc_minor_ver; 2095 uint16_t config[4]; 2096 2097 qla83xx_idc_lock(vha, 0); 2098 2099 /* SV: TODO: Assign initialization timeout from 2100 * flash-info / other param 2101 */ 2102 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2103 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2104 2105 /* Set our fcoe function presence */ 2106 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2107 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2108 "Error while setting DRV-Presence.\n"); 2109 rval = QLA_FUNCTION_FAILED; 2110 goto exit; 2111 } 2112 2113 /* Decide the reset ownership */ 2114 qla83xx_reset_ownership(vha); 2115 2116 /* 2117 * On first protocol driver load: 2118 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2119 * register. 2120 * Others: Check compatibility with current IDC Major version. 2121 */ 2122 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2123 if (ha->flags.nic_core_reset_owner) { 2124 /* Set IDC Major version */ 2125 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2126 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2127 2128 /* Clearing IDC-Lock-Recovery register */ 2129 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2130 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2131 /* 2132 * Clear further IDC participation if we are not compatible with 2133 * the current IDC Major Version. 2134 */ 2135 ql_log(ql_log_warn, vha, 0xb07d, 2136 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2137 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2138 __qla83xx_clear_drv_presence(vha); 2139 rval = QLA_FUNCTION_FAILED; 2140 goto exit; 2141 } 2142 /* Each function sets its supported Minor version. */ 2143 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2144 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2145 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2146 2147 if (ha->flags.nic_core_reset_owner) { 2148 memset(config, 0, sizeof(config)); 2149 if (!qla81xx_get_port_config(vha, config)) 2150 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2151 QLA8XXX_DEV_READY); 2152 } 2153 2154 rval = qla83xx_idc_state_handler(vha); 2155 2156 exit: 2157 qla83xx_idc_unlock(vha, 0); 2158 2159 return rval; 2160 } 2161 2162 /* 2163 * qla2x00_initialize_adapter 2164 * Initialize board. 2165 * 2166 * Input: 2167 * ha = adapter block pointer. 2168 * 2169 * Returns: 2170 * 0 = success 2171 */ 2172 int 2173 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2174 { 2175 int rval; 2176 struct qla_hw_data *ha = vha->hw; 2177 struct req_que *req = ha->req_q_map[0]; 2178 2179 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2180 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2181 2182 /* Clear adapter flags. */ 2183 vha->flags.online = 0; 2184 ha->flags.chip_reset_done = 0; 2185 vha->flags.reset_active = 0; 2186 ha->flags.pci_channel_io_perm_failure = 0; 2187 ha->flags.eeh_busy = 0; 2188 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2189 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2190 atomic_set(&vha->loop_state, LOOP_DOWN); 2191 vha->device_flags = DFLG_NO_CABLE; 2192 vha->dpc_flags = 0; 2193 vha->flags.management_server_logged_in = 0; 2194 vha->marker_needed = 0; 2195 ha->isp_abort_cnt = 0; 2196 ha->beacon_blink_led = 0; 2197 2198 set_bit(0, ha->req_qid_map); 2199 set_bit(0, ha->rsp_qid_map); 2200 2201 ql_dbg(ql_dbg_init, vha, 0x0040, 2202 "Configuring PCI space...\n"); 2203 rval = ha->isp_ops->pci_config(vha); 2204 if (rval) { 2205 ql_log(ql_log_warn, vha, 0x0044, 2206 "Unable to configure PCI space.\n"); 2207 return (rval); 2208 } 2209 2210 ha->isp_ops->reset_chip(vha); 2211 2212 rval = qla2xxx_get_flash_info(vha); 2213 if (rval) { 2214 ql_log(ql_log_fatal, vha, 0x004f, 2215 "Unable to validate FLASH data.\n"); 2216 return rval; 2217 } 2218 2219 if (IS_QLA8044(ha)) { 2220 qla8044_read_reset_template(vha); 2221 2222 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2223 * If DONRESET_BIT0 is set, drivers should not set dev_state 2224 * to NEED_RESET. But if NEED_RESET is set, drivers should 2225 * should honor the reset. */ 2226 if (ql2xdontresethba == 1) 2227 qla8044_set_idc_dontreset(vha); 2228 } 2229 2230 ha->isp_ops->get_flash_version(vha, req->ring); 2231 ql_dbg(ql_dbg_init, vha, 0x0061, 2232 "Configure NVRAM parameters...\n"); 2233 2234 ha->isp_ops->nvram_config(vha); 2235 2236 if (ha->flags.disable_serdes) { 2237 /* Mask HBA via NVRAM settings? */ 2238 ql_log(ql_log_info, vha, 0x0077, 2239 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2240 return QLA_FUNCTION_FAILED; 2241 } 2242 2243 ql_dbg(ql_dbg_init, vha, 0x0078, 2244 "Verifying loaded RISC code...\n"); 2245 2246 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2247 rval = ha->isp_ops->chip_diag(vha); 2248 if (rval) 2249 return (rval); 2250 rval = qla2x00_setup_chip(vha); 2251 if (rval) 2252 return (rval); 2253 } 2254 2255 if (IS_QLA84XX(ha)) { 2256 ha->cs84xx = qla84xx_get_chip(vha); 2257 if (!ha->cs84xx) { 2258 ql_log(ql_log_warn, vha, 0x00d0, 2259 "Unable to configure ISP84XX.\n"); 2260 return QLA_FUNCTION_FAILED; 2261 } 2262 } 2263 2264 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2265 rval = qla2x00_init_rings(vha); 2266 2267 ha->flags.chip_reset_done = 1; 2268 2269 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2270 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2271 rval = qla84xx_init_chip(vha); 2272 if (rval != QLA_SUCCESS) { 2273 ql_log(ql_log_warn, vha, 0x00d4, 2274 "Unable to initialize ISP84XX.\n"); 2275 qla84xx_put_chip(vha); 2276 } 2277 } 2278 2279 /* Load the NIC Core f/w if we are the first protocol driver. */ 2280 if (IS_QLA8031(ha)) { 2281 rval = qla83xx_nic_core_fw_load(vha); 2282 if (rval) 2283 ql_log(ql_log_warn, vha, 0x0124, 2284 "Error in initializing NIC Core f/w.\n"); 2285 } 2286 2287 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2288 qla24xx_read_fcp_prio_cfg(vha); 2289 2290 if (IS_P3P_TYPE(ha)) 2291 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2292 else 2293 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2294 2295 return (rval); 2296 } 2297 2298 /** 2299 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2300 * @vha: HA context 2301 * 2302 * Returns 0 on success. 2303 */ 2304 int 2305 qla2100_pci_config(scsi_qla_host_t *vha) 2306 { 2307 uint16_t w; 2308 unsigned long flags; 2309 struct qla_hw_data *ha = vha->hw; 2310 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2311 2312 pci_set_master(ha->pdev); 2313 pci_try_set_mwi(ha->pdev); 2314 2315 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2316 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2317 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2318 2319 pci_disable_rom(ha->pdev); 2320 2321 /* Get PCI bus information. */ 2322 spin_lock_irqsave(&ha->hardware_lock, flags); 2323 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2324 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2325 2326 return QLA_SUCCESS; 2327 } 2328 2329 /** 2330 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2331 * @vha: HA context 2332 * 2333 * Returns 0 on success. 2334 */ 2335 int 2336 qla2300_pci_config(scsi_qla_host_t *vha) 2337 { 2338 uint16_t w; 2339 unsigned long flags = 0; 2340 uint32_t cnt; 2341 struct qla_hw_data *ha = vha->hw; 2342 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2343 2344 pci_set_master(ha->pdev); 2345 pci_try_set_mwi(ha->pdev); 2346 2347 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2348 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2349 2350 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2351 w &= ~PCI_COMMAND_INTX_DISABLE; 2352 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2353 2354 /* 2355 * If this is a 2300 card and not 2312, reset the 2356 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2357 * the 2310 also reports itself as a 2300 so we need to get the 2358 * fb revision level -- a 6 indicates it really is a 2300 and 2359 * not a 2310. 2360 */ 2361 if (IS_QLA2300(ha)) { 2362 spin_lock_irqsave(&ha->hardware_lock, flags); 2363 2364 /* Pause RISC. */ 2365 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2366 for (cnt = 0; cnt < 30000; cnt++) { 2367 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2368 break; 2369 2370 udelay(10); 2371 } 2372 2373 /* Select FPM registers. */ 2374 WRT_REG_WORD(®->ctrl_status, 0x20); 2375 RD_REG_WORD(®->ctrl_status); 2376 2377 /* Get the fb rev level */ 2378 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2379 2380 if (ha->fb_rev == FPM_2300) 2381 pci_clear_mwi(ha->pdev); 2382 2383 /* Deselect FPM registers. */ 2384 WRT_REG_WORD(®->ctrl_status, 0x0); 2385 RD_REG_WORD(®->ctrl_status); 2386 2387 /* Release RISC module. */ 2388 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2389 for (cnt = 0; cnt < 30000; cnt++) { 2390 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2391 break; 2392 2393 udelay(10); 2394 } 2395 2396 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2397 } 2398 2399 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2400 2401 pci_disable_rom(ha->pdev); 2402 2403 /* Get PCI bus information. */ 2404 spin_lock_irqsave(&ha->hardware_lock, flags); 2405 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2406 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2407 2408 return QLA_SUCCESS; 2409 } 2410 2411 /** 2412 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2413 * @vha: HA context 2414 * 2415 * Returns 0 on success. 2416 */ 2417 int 2418 qla24xx_pci_config(scsi_qla_host_t *vha) 2419 { 2420 uint16_t w; 2421 unsigned long flags = 0; 2422 struct qla_hw_data *ha = vha->hw; 2423 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2424 2425 pci_set_master(ha->pdev); 2426 pci_try_set_mwi(ha->pdev); 2427 2428 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2429 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2430 w &= ~PCI_COMMAND_INTX_DISABLE; 2431 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2432 2433 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2434 2435 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2436 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2437 pcix_set_mmrbc(ha->pdev, 2048); 2438 2439 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2440 if (pci_is_pcie(ha->pdev)) 2441 pcie_set_readrq(ha->pdev, 4096); 2442 2443 pci_disable_rom(ha->pdev); 2444 2445 ha->chip_revision = ha->pdev->revision; 2446 2447 /* Get PCI bus information. */ 2448 spin_lock_irqsave(&ha->hardware_lock, flags); 2449 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2450 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2451 2452 return QLA_SUCCESS; 2453 } 2454 2455 /** 2456 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2457 * @vha: HA context 2458 * 2459 * Returns 0 on success. 2460 */ 2461 int 2462 qla25xx_pci_config(scsi_qla_host_t *vha) 2463 { 2464 uint16_t w; 2465 struct qla_hw_data *ha = vha->hw; 2466 2467 pci_set_master(ha->pdev); 2468 pci_try_set_mwi(ha->pdev); 2469 2470 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2471 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2472 w &= ~PCI_COMMAND_INTX_DISABLE; 2473 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2474 2475 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2476 if (pci_is_pcie(ha->pdev)) 2477 pcie_set_readrq(ha->pdev, 4096); 2478 2479 pci_disable_rom(ha->pdev); 2480 2481 ha->chip_revision = ha->pdev->revision; 2482 2483 return QLA_SUCCESS; 2484 } 2485 2486 /** 2487 * qla2x00_isp_firmware() - Choose firmware image. 2488 * @vha: HA context 2489 * 2490 * Returns 0 on success. 2491 */ 2492 static int 2493 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2494 { 2495 int rval; 2496 uint16_t loop_id, topo, sw_cap; 2497 uint8_t domain, area, al_pa; 2498 struct qla_hw_data *ha = vha->hw; 2499 2500 /* Assume loading risc code */ 2501 rval = QLA_FUNCTION_FAILED; 2502 2503 if (ha->flags.disable_risc_code_load) { 2504 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2505 2506 /* Verify checksum of loaded RISC code. */ 2507 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2508 if (rval == QLA_SUCCESS) { 2509 /* And, verify we are not in ROM code. */ 2510 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2511 &area, &domain, &topo, &sw_cap); 2512 } 2513 } 2514 2515 if (rval) 2516 ql_dbg(ql_dbg_init, vha, 0x007a, 2517 "**** Load RISC code ****.\n"); 2518 2519 return (rval); 2520 } 2521 2522 /** 2523 * qla2x00_reset_chip() - Reset ISP chip. 2524 * @vha: HA context 2525 * 2526 * Returns 0 on success. 2527 */ 2528 void 2529 qla2x00_reset_chip(scsi_qla_host_t *vha) 2530 { 2531 unsigned long flags = 0; 2532 struct qla_hw_data *ha = vha->hw; 2533 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2534 uint32_t cnt; 2535 uint16_t cmd; 2536 2537 if (unlikely(pci_channel_offline(ha->pdev))) 2538 return; 2539 2540 ha->isp_ops->disable_intrs(ha); 2541 2542 spin_lock_irqsave(&ha->hardware_lock, flags); 2543 2544 /* Turn off master enable */ 2545 cmd = 0; 2546 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2547 cmd &= ~PCI_COMMAND_MASTER; 2548 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2549 2550 if (!IS_QLA2100(ha)) { 2551 /* Pause RISC. */ 2552 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2553 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2554 for (cnt = 0; cnt < 30000; cnt++) { 2555 if ((RD_REG_WORD(®->hccr) & 2556 HCCR_RISC_PAUSE) != 0) 2557 break; 2558 udelay(100); 2559 } 2560 } else { 2561 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2562 udelay(10); 2563 } 2564 2565 /* Select FPM registers. */ 2566 WRT_REG_WORD(®->ctrl_status, 0x20); 2567 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2568 2569 /* FPM Soft Reset. */ 2570 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2571 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2572 2573 /* Toggle Fpm Reset. */ 2574 if (!IS_QLA2200(ha)) { 2575 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2576 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2577 } 2578 2579 /* Select frame buffer registers. */ 2580 WRT_REG_WORD(®->ctrl_status, 0x10); 2581 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2582 2583 /* Reset frame buffer FIFOs. */ 2584 if (IS_QLA2200(ha)) { 2585 WRT_FB_CMD_REG(ha, reg, 0xa000); 2586 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2587 } else { 2588 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2589 2590 /* Read back fb_cmd until zero or 3 seconds max */ 2591 for (cnt = 0; cnt < 3000; cnt++) { 2592 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2593 break; 2594 udelay(100); 2595 } 2596 } 2597 2598 /* Select RISC module registers. */ 2599 WRT_REG_WORD(®->ctrl_status, 0); 2600 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2601 2602 /* Reset RISC processor. */ 2603 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2604 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2605 2606 /* Release RISC processor. */ 2607 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2608 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2609 } 2610 2611 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2612 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2613 2614 /* Reset ISP chip. */ 2615 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2616 2617 /* Wait for RISC to recover from reset. */ 2618 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2619 /* 2620 * It is necessary to for a delay here since the card doesn't 2621 * respond to PCI reads during a reset. On some architectures 2622 * this will result in an MCA. 2623 */ 2624 udelay(20); 2625 for (cnt = 30000; cnt; cnt--) { 2626 if ((RD_REG_WORD(®->ctrl_status) & 2627 CSR_ISP_SOFT_RESET) == 0) 2628 break; 2629 udelay(100); 2630 } 2631 } else 2632 udelay(10); 2633 2634 /* Reset RISC processor. */ 2635 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2636 2637 WRT_REG_WORD(®->semaphore, 0); 2638 2639 /* Release RISC processor. */ 2640 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2641 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2642 2643 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2644 for (cnt = 0; cnt < 30000; cnt++) { 2645 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2646 break; 2647 2648 udelay(100); 2649 } 2650 } else 2651 udelay(100); 2652 2653 /* Turn on master enable */ 2654 cmd |= PCI_COMMAND_MASTER; 2655 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2656 2657 /* Disable RISC pause on FPM parity error. */ 2658 if (!IS_QLA2100(ha)) { 2659 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2660 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2661 } 2662 2663 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2664 } 2665 2666 /** 2667 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2668 * @vha: HA context 2669 * 2670 * Returns 0 on success. 2671 */ 2672 static int 2673 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2674 { 2675 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2676 2677 if (!IS_QLA81XX(vha->hw)) 2678 return QLA_SUCCESS; 2679 2680 return qla81xx_write_mpi_register(vha, mb); 2681 } 2682 2683 /** 2684 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2685 * @vha: HA context 2686 * 2687 * Returns 0 on success. 2688 */ 2689 static inline int 2690 qla24xx_reset_risc(scsi_qla_host_t *vha) 2691 { 2692 unsigned long flags = 0; 2693 struct qla_hw_data *ha = vha->hw; 2694 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2695 uint32_t cnt; 2696 uint16_t wd; 2697 static int abts_cnt; /* ISP abort retry counts */ 2698 int rval = QLA_SUCCESS; 2699 2700 spin_lock_irqsave(&ha->hardware_lock, flags); 2701 2702 /* Reset RISC. */ 2703 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2704 for (cnt = 0; cnt < 30000; cnt++) { 2705 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2706 break; 2707 2708 udelay(10); 2709 } 2710 2711 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2712 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2713 2714 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2715 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2716 RD_REG_DWORD(®->hccr), 2717 RD_REG_DWORD(®->ctrl_status), 2718 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2719 2720 WRT_REG_DWORD(®->ctrl_status, 2721 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2722 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2723 2724 udelay(100); 2725 2726 /* Wait for firmware to complete NVRAM accesses. */ 2727 RD_REG_WORD(®->mailbox0); 2728 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2729 rval == QLA_SUCCESS; cnt--) { 2730 barrier(); 2731 if (cnt) 2732 udelay(5); 2733 else 2734 rval = QLA_FUNCTION_TIMEOUT; 2735 } 2736 2737 if (rval == QLA_SUCCESS) 2738 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2739 2740 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2741 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2742 RD_REG_DWORD(®->hccr), 2743 RD_REG_DWORD(®->mailbox0)); 2744 2745 /* Wait for soft-reset to complete. */ 2746 RD_REG_DWORD(®->ctrl_status); 2747 for (cnt = 0; cnt < 60; cnt++) { 2748 barrier(); 2749 if ((RD_REG_DWORD(®->ctrl_status) & 2750 CSRX_ISP_SOFT_RESET) == 0) 2751 break; 2752 2753 udelay(5); 2754 } 2755 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2756 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2757 2758 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2759 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2760 RD_REG_DWORD(®->hccr), 2761 RD_REG_DWORD(®->ctrl_status)); 2762 2763 /* If required, do an MPI FW reset now */ 2764 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2765 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2766 if (++abts_cnt < 5) { 2767 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2768 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2769 } else { 2770 /* 2771 * We exhausted the ISP abort retries. We have to 2772 * set the board offline. 2773 */ 2774 abts_cnt = 0; 2775 vha->flags.online = 0; 2776 } 2777 } 2778 } 2779 2780 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2781 RD_REG_DWORD(®->hccr); 2782 2783 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2784 RD_REG_DWORD(®->hccr); 2785 2786 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2787 RD_REG_DWORD(®->hccr); 2788 2789 RD_REG_WORD(®->mailbox0); 2790 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2791 rval == QLA_SUCCESS; cnt--) { 2792 barrier(); 2793 if (cnt) 2794 udelay(5); 2795 else 2796 rval = QLA_FUNCTION_TIMEOUT; 2797 } 2798 if (rval == QLA_SUCCESS) 2799 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2800 2801 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2802 "Host Risc 0x%x, mailbox0 0x%x\n", 2803 RD_REG_DWORD(®->hccr), 2804 RD_REG_WORD(®->mailbox0)); 2805 2806 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2807 2808 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2809 "Driver in %s mode\n", 2810 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2811 2812 if (IS_NOPOLLING_TYPE(ha)) 2813 ha->isp_ops->enable_intrs(ha); 2814 2815 return rval; 2816 } 2817 2818 static void 2819 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2820 { 2821 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2822 2823 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2824 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2825 2826 } 2827 2828 static void 2829 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2830 { 2831 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2832 2833 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2834 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2835 } 2836 2837 static void 2838 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2839 { 2840 uint32_t wd32 = 0; 2841 uint delta_msec = 100; 2842 uint elapsed_msec = 0; 2843 uint timeout_msec; 2844 ulong n; 2845 2846 if (vha->hw->pdev->subsystem_device != 0x0175 && 2847 vha->hw->pdev->subsystem_device != 0x0240) 2848 return; 2849 2850 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2851 udelay(100); 2852 2853 attempt: 2854 timeout_msec = TIMEOUT_SEMAPHORE; 2855 n = timeout_msec / delta_msec; 2856 while (n--) { 2857 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2858 qla25xx_read_risc_sema_reg(vha, &wd32); 2859 if (wd32 & RISC_SEMAPHORE) 2860 break; 2861 msleep(delta_msec); 2862 elapsed_msec += delta_msec; 2863 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2864 goto force; 2865 } 2866 2867 if (!(wd32 & RISC_SEMAPHORE)) 2868 goto force; 2869 2870 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2871 goto acquired; 2872 2873 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2874 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2875 n = timeout_msec / delta_msec; 2876 while (n--) { 2877 qla25xx_read_risc_sema_reg(vha, &wd32); 2878 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2879 break; 2880 msleep(delta_msec); 2881 elapsed_msec += delta_msec; 2882 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2883 goto force; 2884 } 2885 2886 if (wd32 & RISC_SEMAPHORE_FORCE) 2887 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2888 2889 goto attempt; 2890 2891 force: 2892 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2893 2894 acquired: 2895 return; 2896 } 2897 2898 /** 2899 * qla24xx_reset_chip() - Reset ISP24xx chip. 2900 * @vha: HA context 2901 * 2902 * Returns 0 on success. 2903 */ 2904 void 2905 qla24xx_reset_chip(scsi_qla_host_t *vha) 2906 { 2907 struct qla_hw_data *ha = vha->hw; 2908 2909 if (pci_channel_offline(ha->pdev) && 2910 ha->flags.pci_channel_io_perm_failure) { 2911 return; 2912 } 2913 2914 ha->isp_ops->disable_intrs(ha); 2915 2916 qla25xx_manipulate_risc_semaphore(vha); 2917 2918 /* Perform RISC reset. */ 2919 qla24xx_reset_risc(vha); 2920 } 2921 2922 /** 2923 * qla2x00_chip_diag() - Test chip for proper operation. 2924 * @vha: HA context 2925 * 2926 * Returns 0 on success. 2927 */ 2928 int 2929 qla2x00_chip_diag(scsi_qla_host_t *vha) 2930 { 2931 int rval; 2932 struct qla_hw_data *ha = vha->hw; 2933 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2934 unsigned long flags = 0; 2935 uint16_t data; 2936 uint32_t cnt; 2937 uint16_t mb[5]; 2938 struct req_que *req = ha->req_q_map[0]; 2939 2940 /* Assume a failed state */ 2941 rval = QLA_FUNCTION_FAILED; 2942 2943 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2944 ®->flash_address); 2945 2946 spin_lock_irqsave(&ha->hardware_lock, flags); 2947 2948 /* Reset ISP chip. */ 2949 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2950 2951 /* 2952 * We need to have a delay here since the card will not respond while 2953 * in reset causing an MCA on some architectures. 2954 */ 2955 udelay(20); 2956 data = qla2x00_debounce_register(®->ctrl_status); 2957 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2958 udelay(5); 2959 data = RD_REG_WORD(®->ctrl_status); 2960 barrier(); 2961 } 2962 2963 if (!cnt) 2964 goto chip_diag_failed; 2965 2966 ql_dbg(ql_dbg_init, vha, 0x007c, 2967 "Reset register cleared by chip reset.\n"); 2968 2969 /* Reset RISC processor. */ 2970 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2971 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2972 2973 /* Workaround for QLA2312 PCI parity error */ 2974 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2975 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2976 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2977 udelay(5); 2978 data = RD_MAILBOX_REG(ha, reg, 0); 2979 barrier(); 2980 } 2981 } else 2982 udelay(10); 2983 2984 if (!cnt) 2985 goto chip_diag_failed; 2986 2987 /* Check product ID of chip */ 2988 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2989 2990 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2991 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2992 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2993 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2994 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2995 mb[3] != PROD_ID_3) { 2996 ql_log(ql_log_warn, vha, 0x0062, 2997 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2998 mb[1], mb[2], mb[3]); 2999 3000 goto chip_diag_failed; 3001 } 3002 ha->product_id[0] = mb[1]; 3003 ha->product_id[1] = mb[2]; 3004 ha->product_id[2] = mb[3]; 3005 ha->product_id[3] = mb[4]; 3006 3007 /* Adjust fw RISC transfer size */ 3008 if (req->length > 1024) 3009 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3010 else 3011 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3012 req->length; 3013 3014 if (IS_QLA2200(ha) && 3015 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3016 /* Limit firmware transfer size with a 2200A */ 3017 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3018 3019 ha->device_type |= DT_ISP2200A; 3020 ha->fw_transfer_size = 128; 3021 } 3022 3023 /* Wrap Incoming Mailboxes Test. */ 3024 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3025 3026 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3027 rval = qla2x00_mbx_reg_test(vha); 3028 if (rval) 3029 ql_log(ql_log_warn, vha, 0x0080, 3030 "Failed mailbox send register test.\n"); 3031 else 3032 /* Flag a successful rval */ 3033 rval = QLA_SUCCESS; 3034 spin_lock_irqsave(&ha->hardware_lock, flags); 3035 3036 chip_diag_failed: 3037 if (rval) 3038 ql_log(ql_log_info, vha, 0x0081, 3039 "Chip diagnostics **** FAILED ****.\n"); 3040 3041 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3042 3043 return (rval); 3044 } 3045 3046 /** 3047 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3048 * @vha: HA context 3049 * 3050 * Returns 0 on success. 3051 */ 3052 int 3053 qla24xx_chip_diag(scsi_qla_host_t *vha) 3054 { 3055 int rval; 3056 struct qla_hw_data *ha = vha->hw; 3057 struct req_que *req = ha->req_q_map[0]; 3058 3059 if (IS_P3P_TYPE(ha)) 3060 return QLA_SUCCESS; 3061 3062 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3063 3064 rval = qla2x00_mbx_reg_test(vha); 3065 if (rval) { 3066 ql_log(ql_log_warn, vha, 0x0082, 3067 "Failed mailbox send register test.\n"); 3068 } else { 3069 /* Flag a successful rval */ 3070 rval = QLA_SUCCESS; 3071 } 3072 3073 return rval; 3074 } 3075 3076 static void 3077 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3078 { 3079 int rval; 3080 dma_addr_t tc_dma; 3081 void *tc; 3082 struct qla_hw_data *ha = vha->hw; 3083 3084 if (ha->eft) { 3085 ql_dbg(ql_dbg_init, vha, 0x00bd, 3086 "%s: Offload Mem is already allocated.\n", 3087 __func__); 3088 return; 3089 } 3090 3091 if (IS_FWI2_CAPABLE(ha)) { 3092 /* Allocate memory for Fibre Channel Event Buffer. */ 3093 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3094 !IS_QLA27XX(ha)) 3095 goto try_eft; 3096 3097 if (ha->fce) 3098 dma_free_coherent(&ha->pdev->dev, 3099 FCE_SIZE, ha->fce, ha->fce_dma); 3100 3101 /* Allocate memory for Fibre Channel Event Buffer. */ 3102 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3103 GFP_KERNEL); 3104 if (!tc) { 3105 ql_log(ql_log_warn, vha, 0x00be, 3106 "Unable to allocate (%d KB) for FCE.\n", 3107 FCE_SIZE / 1024); 3108 goto try_eft; 3109 } 3110 3111 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3112 ha->fce_mb, &ha->fce_bufs); 3113 if (rval) { 3114 ql_log(ql_log_warn, vha, 0x00bf, 3115 "Unable to initialize FCE (%d).\n", rval); 3116 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 3117 tc_dma); 3118 ha->flags.fce_enabled = 0; 3119 goto try_eft; 3120 } 3121 ql_dbg(ql_dbg_init, vha, 0x00c0, 3122 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 3123 3124 ha->flags.fce_enabled = 1; 3125 ha->fce_dma = tc_dma; 3126 ha->fce = tc; 3127 3128 try_eft: 3129 if (ha->eft) 3130 dma_free_coherent(&ha->pdev->dev, 3131 EFT_SIZE, ha->eft, ha->eft_dma); 3132 3133 /* Allocate memory for Extended Trace Buffer. */ 3134 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3135 GFP_KERNEL); 3136 if (!tc) { 3137 ql_log(ql_log_warn, vha, 0x00c1, 3138 "Unable to allocate (%d KB) for EFT.\n", 3139 EFT_SIZE / 1024); 3140 goto eft_err; 3141 } 3142 3143 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3144 if (rval) { 3145 ql_log(ql_log_warn, vha, 0x00c2, 3146 "Unable to initialize EFT (%d).\n", rval); 3147 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 3148 tc_dma); 3149 goto eft_err; 3150 } 3151 ql_dbg(ql_dbg_init, vha, 0x00c3, 3152 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3153 3154 ha->eft_dma = tc_dma; 3155 ha->eft = tc; 3156 } 3157 3158 eft_err: 3159 return; 3160 } 3161 3162 void 3163 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3164 { 3165 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3166 eft_size, fce_size, mq_size; 3167 struct qla_hw_data *ha = vha->hw; 3168 struct req_que *req = ha->req_q_map[0]; 3169 struct rsp_que *rsp = ha->rsp_q_map[0]; 3170 struct qla2xxx_fw_dump *fw_dump; 3171 3172 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3173 req_q_size = rsp_q_size = 0; 3174 3175 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3176 fixed_size = sizeof(struct qla2100_fw_dump); 3177 } else if (IS_QLA23XX(ha)) { 3178 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3179 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3180 sizeof(uint16_t); 3181 } else if (IS_FWI2_CAPABLE(ha)) { 3182 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 3183 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3184 else if (IS_QLA81XX(ha)) 3185 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3186 else if (IS_QLA25XX(ha)) 3187 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3188 else 3189 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3190 3191 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3192 sizeof(uint32_t); 3193 if (ha->mqenable) { 3194 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 3195 mq_size = sizeof(struct qla2xxx_mq_chain); 3196 /* 3197 * Allocate maximum buffer size for all queues. 3198 * Resizing must be done at end-of-dump processing. 3199 */ 3200 mq_size += ha->max_req_queues * 3201 (req->length * sizeof(request_t)); 3202 mq_size += ha->max_rsp_queues * 3203 (rsp->length * sizeof(response_t)); 3204 } 3205 if (ha->tgt.atio_ring) 3206 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3207 /* Allocate memory for Fibre Channel Event Buffer. */ 3208 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3209 !IS_QLA27XX(ha)) 3210 goto try_eft; 3211 3212 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3213 try_eft: 3214 ql_dbg(ql_dbg_init, vha, 0x00c3, 3215 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3216 eft_size = EFT_SIZE; 3217 } 3218 3219 if (IS_QLA27XX(ha)) { 3220 if (!ha->fw_dump_template) { 3221 ql_log(ql_log_warn, vha, 0x00ba, 3222 "Failed missing fwdump template\n"); 3223 return; 3224 } 3225 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 3226 ql_dbg(ql_dbg_init, vha, 0x00fa, 3227 "-> allocating fwdump (%x bytes)...\n", dump_size); 3228 goto allocate; 3229 } 3230 3231 req_q_size = req->length * sizeof(request_t); 3232 rsp_q_size = rsp->length * sizeof(response_t); 3233 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3234 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 3235 ha->chain_offset = dump_size; 3236 dump_size += mq_size + fce_size; 3237 3238 if (ha->exchoffld_buf) 3239 dump_size += sizeof(struct qla2xxx_offld_chain) + 3240 ha->exchoffld_size; 3241 if (ha->exlogin_buf) 3242 dump_size += sizeof(struct qla2xxx_offld_chain) + 3243 ha->exlogin_size; 3244 3245 allocate: 3246 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 3247 fw_dump = vmalloc(dump_size); 3248 if (!fw_dump) { 3249 ql_log(ql_log_warn, vha, 0x00c4, 3250 "Unable to allocate (%d KB) for firmware dump.\n", 3251 dump_size / 1024); 3252 } else { 3253 if (ha->fw_dump) 3254 vfree(ha->fw_dump); 3255 ha->fw_dump = fw_dump; 3256 3257 ha->fw_dump_len = dump_size; 3258 ql_dbg(ql_dbg_init, vha, 0x00c5, 3259 "Allocated (%d KB) for firmware dump.\n", 3260 dump_size / 1024); 3261 3262 if (IS_QLA27XX(ha)) 3263 return; 3264 3265 ha->fw_dump->signature[0] = 'Q'; 3266 ha->fw_dump->signature[1] = 'L'; 3267 ha->fw_dump->signature[2] = 'G'; 3268 ha->fw_dump->signature[3] = 'C'; 3269 ha->fw_dump->version = htonl(1); 3270 3271 ha->fw_dump->fixed_size = htonl(fixed_size); 3272 ha->fw_dump->mem_size = htonl(mem_size); 3273 ha->fw_dump->req_q_size = htonl(req_q_size); 3274 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3275 3276 ha->fw_dump->eft_size = htonl(eft_size); 3277 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3278 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3279 3280 ha->fw_dump->header_size = 3281 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3282 } 3283 } 3284 } 3285 3286 static int 3287 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3288 { 3289 #define MPS_MASK 0xe0 3290 int rval; 3291 uint16_t dc; 3292 uint32_t dw; 3293 3294 if (!IS_QLA81XX(vha->hw)) 3295 return QLA_SUCCESS; 3296 3297 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3298 if (rval != QLA_SUCCESS) { 3299 ql_log(ql_log_warn, vha, 0x0105, 3300 "Unable to acquire semaphore.\n"); 3301 goto done; 3302 } 3303 3304 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3305 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3306 if (rval != QLA_SUCCESS) { 3307 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3308 goto done_release; 3309 } 3310 3311 dc &= MPS_MASK; 3312 if (dc == (dw & MPS_MASK)) 3313 goto done_release; 3314 3315 dw &= ~MPS_MASK; 3316 dw |= dc; 3317 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3318 if (rval != QLA_SUCCESS) { 3319 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3320 } 3321 3322 done_release: 3323 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3324 if (rval != QLA_SUCCESS) { 3325 ql_log(ql_log_warn, vha, 0x006d, 3326 "Unable to release semaphore.\n"); 3327 } 3328 3329 done: 3330 return rval; 3331 } 3332 3333 int 3334 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3335 { 3336 /* Don't try to reallocate the array */ 3337 if (req->outstanding_cmds) 3338 return QLA_SUCCESS; 3339 3340 if (!IS_FWI2_CAPABLE(ha)) 3341 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3342 else { 3343 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3344 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3345 else 3346 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3347 } 3348 3349 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3350 sizeof(srb_t *), 3351 GFP_KERNEL); 3352 3353 if (!req->outstanding_cmds) { 3354 /* 3355 * Try to allocate a minimal size just so we can get through 3356 * initialization. 3357 */ 3358 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3359 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3360 sizeof(srb_t *), 3361 GFP_KERNEL); 3362 3363 if (!req->outstanding_cmds) { 3364 ql_log(ql_log_fatal, NULL, 0x0126, 3365 "Failed to allocate memory for " 3366 "outstanding_cmds for req_que %p.\n", req); 3367 req->num_outstanding_cmds = 0; 3368 return QLA_FUNCTION_FAILED; 3369 } 3370 } 3371 3372 return QLA_SUCCESS; 3373 } 3374 3375 #define PRINT_FIELD(_field, _flag, _str) { \ 3376 if (a0->_field & _flag) {\ 3377 if (p) {\ 3378 strcat(ptr, "|");\ 3379 ptr++;\ 3380 leftover--;\ 3381 } \ 3382 len = snprintf(ptr, leftover, "%s", _str); \ 3383 p = 1;\ 3384 leftover -= len;\ 3385 ptr += len; \ 3386 } \ 3387 } 3388 3389 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3390 { 3391 #define STR_LEN 64 3392 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3393 u8 str[STR_LEN], *ptr, p; 3394 int leftover, len; 3395 3396 memset(str, 0, STR_LEN); 3397 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3398 ql_dbg(ql_dbg_init, vha, 0x015a, 3399 "SFP MFG Name: %s\n", str); 3400 3401 memset(str, 0, STR_LEN); 3402 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3403 ql_dbg(ql_dbg_init, vha, 0x015c, 3404 "SFP Part Name: %s\n", str); 3405 3406 /* media */ 3407 memset(str, 0, STR_LEN); 3408 ptr = str; 3409 leftover = STR_LEN; 3410 p = len = 0; 3411 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3412 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3413 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3414 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3415 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3416 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3417 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3418 ql_dbg(ql_dbg_init, vha, 0x0160, 3419 "SFP Media: %s\n", str); 3420 3421 /* link length */ 3422 memset(str, 0, STR_LEN); 3423 ptr = str; 3424 leftover = STR_LEN; 3425 p = len = 0; 3426 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3427 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3428 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3429 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3430 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3431 ql_dbg(ql_dbg_init, vha, 0x0196, 3432 "SFP Link Length: %s\n", str); 3433 3434 memset(str, 0, STR_LEN); 3435 ptr = str; 3436 leftover = STR_LEN; 3437 p = len = 0; 3438 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3439 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3440 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3441 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3442 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3443 ql_dbg(ql_dbg_init, vha, 0x016e, 3444 "SFP FC Link Tech: %s\n", str); 3445 3446 if (a0->length_km) 3447 ql_dbg(ql_dbg_init, vha, 0x016f, 3448 "SFP Distant: %d km\n", a0->length_km); 3449 if (a0->length_100m) 3450 ql_dbg(ql_dbg_init, vha, 0x0170, 3451 "SFP Distant: %d m\n", a0->length_100m*100); 3452 if (a0->length_50um_10m) 3453 ql_dbg(ql_dbg_init, vha, 0x0189, 3454 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3455 if (a0->length_62um_10m) 3456 ql_dbg(ql_dbg_init, vha, 0x018a, 3457 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3458 if (a0->length_om4_10m) 3459 ql_dbg(ql_dbg_init, vha, 0x0194, 3460 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3461 if (a0->length_om3_10m) 3462 ql_dbg(ql_dbg_init, vha, 0x0195, 3463 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3464 } 3465 3466 3467 /* 3468 * Return Code: 3469 * QLA_SUCCESS: no action 3470 * QLA_INTERFACE_ERROR: SFP is not there. 3471 * QLA_FUNCTION_FAILED: detected New SFP 3472 */ 3473 int 3474 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3475 { 3476 int rc = QLA_SUCCESS; 3477 struct sff_8247_a0 *a; 3478 struct qla_hw_data *ha = vha->hw; 3479 3480 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3481 goto out; 3482 3483 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3484 if (rc) 3485 goto out; 3486 3487 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3488 qla2xxx_print_sfp_info(vha); 3489 3490 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3491 /* long range */ 3492 ha->flags.detected_lr_sfp = 1; 3493 3494 if (a->length_km > 5 || a->length_100m > 50) 3495 ha->long_range_distance = LR_DISTANCE_10K; 3496 else 3497 ha->long_range_distance = LR_DISTANCE_5K; 3498 3499 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3500 ql_dbg(ql_dbg_async, vha, 0x507b, 3501 "Detected Long Range SFP.\n"); 3502 } else { 3503 /* short range */ 3504 ha->flags.detected_lr_sfp = 0; 3505 if (ha->flags.using_lr_setting) 3506 ql_dbg(ql_dbg_async, vha, 0x5084, 3507 "Detected Short Range SFP.\n"); 3508 } 3509 3510 if (!vha->flags.init_done) 3511 rc = QLA_SUCCESS; 3512 out: 3513 return rc; 3514 } 3515 3516 /** 3517 * qla2x00_setup_chip() - Load and start RISC firmware. 3518 * @vha: HA context 3519 * 3520 * Returns 0 on success. 3521 */ 3522 static int 3523 qla2x00_setup_chip(scsi_qla_host_t *vha) 3524 { 3525 int rval; 3526 uint32_t srisc_address = 0; 3527 struct qla_hw_data *ha = vha->hw; 3528 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3529 unsigned long flags; 3530 uint16_t fw_major_version; 3531 3532 if (IS_P3P_TYPE(ha)) { 3533 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3534 if (rval == QLA_SUCCESS) { 3535 qla2x00_stop_firmware(vha); 3536 goto enable_82xx_npiv; 3537 } else 3538 goto failed; 3539 } 3540 3541 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3542 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3543 spin_lock_irqsave(&ha->hardware_lock, flags); 3544 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3545 RD_REG_WORD(®->hccr); 3546 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3547 } 3548 3549 qla81xx_mpi_sync(vha); 3550 3551 /* Load firmware sequences */ 3552 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3553 if (rval == QLA_SUCCESS) { 3554 ql_dbg(ql_dbg_init, vha, 0x00c9, 3555 "Verifying Checksum of loaded RISC code.\n"); 3556 3557 rval = qla2x00_verify_checksum(vha, srisc_address); 3558 if (rval == QLA_SUCCESS) { 3559 /* Start firmware execution. */ 3560 ql_dbg(ql_dbg_init, vha, 0x00ca, 3561 "Starting firmware.\n"); 3562 3563 if (ql2xexlogins) 3564 ha->flags.exlogins_enabled = 1; 3565 3566 if (qla_is_exch_offld_enabled(vha)) 3567 ha->flags.exchoffld_enabled = 1; 3568 3569 rval = qla2x00_execute_fw(vha, srisc_address); 3570 /* Retrieve firmware information. */ 3571 if (rval == QLA_SUCCESS) { 3572 qla24xx_detect_sfp(vha); 3573 3574 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && 3575 (ha->zio_mode == QLA_ZIO_MODE_6)) 3576 qla27xx_set_zio_threshold(vha, 3577 ha->last_zio_threshold); 3578 3579 rval = qla2x00_set_exlogins_buffer(vha); 3580 if (rval != QLA_SUCCESS) 3581 goto failed; 3582 3583 rval = qla2x00_set_exchoffld_buffer(vha); 3584 if (rval != QLA_SUCCESS) 3585 goto failed; 3586 3587 enable_82xx_npiv: 3588 fw_major_version = ha->fw_major_version; 3589 if (IS_P3P_TYPE(ha)) 3590 qla82xx_check_md_needed(vha); 3591 else 3592 rval = qla2x00_get_fw_version(vha); 3593 if (rval != QLA_SUCCESS) 3594 goto failed; 3595 ha->flags.npiv_supported = 0; 3596 if (IS_QLA2XXX_MIDTYPE(ha) && 3597 (ha->fw_attributes & BIT_2)) { 3598 ha->flags.npiv_supported = 1; 3599 if ((!ha->max_npiv_vports) || 3600 ((ha->max_npiv_vports + 1) % 3601 MIN_MULTI_ID_FABRIC)) 3602 ha->max_npiv_vports = 3603 MIN_MULTI_ID_FABRIC - 1; 3604 } 3605 qla2x00_get_resource_cnts(vha); 3606 3607 /* 3608 * Allocate the array of outstanding commands 3609 * now that we know the firmware resources. 3610 */ 3611 rval = qla2x00_alloc_outstanding_cmds(ha, 3612 vha->req); 3613 if (rval != QLA_SUCCESS) 3614 goto failed; 3615 3616 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3617 qla2x00_alloc_offload_mem(vha); 3618 3619 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3620 qla2x00_alloc_fw_dump(vha); 3621 3622 } else { 3623 goto failed; 3624 } 3625 } else { 3626 ql_log(ql_log_fatal, vha, 0x00cd, 3627 "ISP Firmware failed checksum.\n"); 3628 goto failed; 3629 } 3630 } else 3631 goto failed; 3632 3633 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3634 /* Enable proper parity. */ 3635 spin_lock_irqsave(&ha->hardware_lock, flags); 3636 if (IS_QLA2300(ha)) 3637 /* SRAM parity */ 3638 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3639 else 3640 /* SRAM, Instruction RAM and GP RAM parity */ 3641 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3642 RD_REG_WORD(®->hccr); 3643 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3644 } 3645 3646 if (IS_QLA27XX(ha)) 3647 ha->flags.fac_supported = 1; 3648 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3649 uint32_t size; 3650 3651 rval = qla81xx_fac_get_sector_size(vha, &size); 3652 if (rval == QLA_SUCCESS) { 3653 ha->flags.fac_supported = 1; 3654 ha->fdt_block_size = size << 2; 3655 } else { 3656 ql_log(ql_log_warn, vha, 0x00ce, 3657 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3658 ha->fw_major_version, ha->fw_minor_version, 3659 ha->fw_subminor_version); 3660 3661 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3662 ha->flags.fac_supported = 0; 3663 rval = QLA_SUCCESS; 3664 } 3665 } 3666 } 3667 failed: 3668 if (rval) { 3669 ql_log(ql_log_fatal, vha, 0x00cf, 3670 "Setup chip ****FAILED****.\n"); 3671 } 3672 3673 return (rval); 3674 } 3675 3676 /** 3677 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3678 * @rsp: response queue 3679 * 3680 * Beginning of request ring has initialization control block already built 3681 * by nvram config routine. 3682 * 3683 * Returns 0 on success. 3684 */ 3685 void 3686 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3687 { 3688 uint16_t cnt; 3689 response_t *pkt; 3690 3691 rsp->ring_ptr = rsp->ring; 3692 rsp->ring_index = 0; 3693 rsp->status_srb = NULL; 3694 pkt = rsp->ring_ptr; 3695 for (cnt = 0; cnt < rsp->length; cnt++) { 3696 pkt->signature = RESPONSE_PROCESSED; 3697 pkt++; 3698 } 3699 } 3700 3701 /** 3702 * qla2x00_update_fw_options() - Read and process firmware options. 3703 * @vha: HA context 3704 * 3705 * Returns 0 on success. 3706 */ 3707 void 3708 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3709 { 3710 uint16_t swing, emphasis, tx_sens, rx_sens; 3711 struct qla_hw_data *ha = vha->hw; 3712 3713 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3714 qla2x00_get_fw_options(vha, ha->fw_options); 3715 3716 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3717 return; 3718 3719 /* Serial Link options. */ 3720 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3721 "Serial link options.\n"); 3722 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3723 (uint8_t *)&ha->fw_seriallink_options, 3724 sizeof(ha->fw_seriallink_options)); 3725 3726 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3727 if (ha->fw_seriallink_options[3] & BIT_2) { 3728 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3729 3730 /* 1G settings */ 3731 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3732 emphasis = (ha->fw_seriallink_options[2] & 3733 (BIT_4 | BIT_3)) >> 3; 3734 tx_sens = ha->fw_seriallink_options[0] & 3735 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3736 rx_sens = (ha->fw_seriallink_options[0] & 3737 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3738 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3739 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3740 if (rx_sens == 0x0) 3741 rx_sens = 0x3; 3742 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3743 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3744 ha->fw_options[10] |= BIT_5 | 3745 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3746 (tx_sens & (BIT_1 | BIT_0)); 3747 3748 /* 2G settings */ 3749 swing = (ha->fw_seriallink_options[2] & 3750 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3751 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3752 tx_sens = ha->fw_seriallink_options[1] & 3753 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3754 rx_sens = (ha->fw_seriallink_options[1] & 3755 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3756 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3757 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3758 if (rx_sens == 0x0) 3759 rx_sens = 0x3; 3760 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3761 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3762 ha->fw_options[11] |= BIT_5 | 3763 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3764 (tx_sens & (BIT_1 | BIT_0)); 3765 } 3766 3767 /* FCP2 options. */ 3768 /* Return command IOCBs without waiting for an ABTS to complete. */ 3769 ha->fw_options[3] |= BIT_13; 3770 3771 /* LED scheme. */ 3772 if (ha->flags.enable_led_scheme) 3773 ha->fw_options[2] |= BIT_12; 3774 3775 /* Detect ISP6312. */ 3776 if (IS_QLA6312(ha)) 3777 ha->fw_options[2] |= BIT_13; 3778 3779 /* Set Retry FLOGI in case of P2P connection */ 3780 if (ha->operating_mode == P2P) { 3781 ha->fw_options[2] |= BIT_3; 3782 ql_dbg(ql_dbg_disc, vha, 0x2100, 3783 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3784 __func__, ha->fw_options[2]); 3785 } 3786 3787 /* Update firmware options. */ 3788 qla2x00_set_fw_options(vha, ha->fw_options); 3789 } 3790 3791 void 3792 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3793 { 3794 int rval; 3795 struct qla_hw_data *ha = vha->hw; 3796 3797 if (IS_P3P_TYPE(ha)) 3798 return; 3799 3800 /* Hold status IOCBs until ABTS response received. */ 3801 if (ql2xfwholdabts) 3802 ha->fw_options[3] |= BIT_12; 3803 3804 /* Set Retry FLOGI in case of P2P connection */ 3805 if (ha->operating_mode == P2P) { 3806 ha->fw_options[2] |= BIT_3; 3807 ql_dbg(ql_dbg_disc, vha, 0x2101, 3808 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3809 __func__, ha->fw_options[2]); 3810 } 3811 3812 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3813 if (ql2xmvasynctoatio && 3814 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3815 if (qla_tgt_mode_enabled(vha) || 3816 qla_dual_mode_enabled(vha)) 3817 ha->fw_options[2] |= BIT_11; 3818 else 3819 ha->fw_options[2] &= ~BIT_11; 3820 } 3821 3822 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3823 /* 3824 * Tell FW to track each exchange to prevent 3825 * driver from using stale exchange. 3826 */ 3827 if (qla_tgt_mode_enabled(vha) || 3828 qla_dual_mode_enabled(vha)) 3829 ha->fw_options[2] |= BIT_4; 3830 else 3831 ha->fw_options[2] &= ~BIT_4; 3832 3833 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3834 if (qla2xuseresexchforels) 3835 ha->fw_options[2] |= BIT_8; 3836 else 3837 ha->fw_options[2] &= ~BIT_8; 3838 } 3839 3840 ql_dbg(ql_dbg_init, vha, 0x00e8, 3841 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3842 __func__, ha->fw_options[1], ha->fw_options[2], 3843 ha->fw_options[3], vha->host->active_mode); 3844 3845 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3846 qla2x00_set_fw_options(vha, ha->fw_options); 3847 3848 /* Update Serial Link options. */ 3849 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3850 return; 3851 3852 rval = qla2x00_set_serdes_params(vha, 3853 le16_to_cpu(ha->fw_seriallink_options24[1]), 3854 le16_to_cpu(ha->fw_seriallink_options24[2]), 3855 le16_to_cpu(ha->fw_seriallink_options24[3])); 3856 if (rval != QLA_SUCCESS) { 3857 ql_log(ql_log_warn, vha, 0x0104, 3858 "Unable to update Serial Link options (%x).\n", rval); 3859 } 3860 } 3861 3862 void 3863 qla2x00_config_rings(struct scsi_qla_host *vha) 3864 { 3865 struct qla_hw_data *ha = vha->hw; 3866 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3867 struct req_que *req = ha->req_q_map[0]; 3868 struct rsp_que *rsp = ha->rsp_q_map[0]; 3869 3870 /* Setup ring parameters in initialization control block. */ 3871 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3872 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3873 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3874 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3875 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3876 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3877 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3878 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3879 3880 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3881 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3882 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3883 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3884 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3885 } 3886 3887 void 3888 qla24xx_config_rings(struct scsi_qla_host *vha) 3889 { 3890 struct qla_hw_data *ha = vha->hw; 3891 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3892 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3893 struct qla_msix_entry *msix; 3894 struct init_cb_24xx *icb; 3895 uint16_t rid = 0; 3896 struct req_que *req = ha->req_q_map[0]; 3897 struct rsp_que *rsp = ha->rsp_q_map[0]; 3898 3899 /* Setup ring parameters in initialization control block. */ 3900 icb = (struct init_cb_24xx *)ha->init_cb; 3901 icb->request_q_outpointer = cpu_to_le16(0); 3902 icb->response_q_inpointer = cpu_to_le16(0); 3903 icb->request_q_length = cpu_to_le16(req->length); 3904 icb->response_q_length = cpu_to_le16(rsp->length); 3905 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3906 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3907 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3908 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3909 3910 /* Setup ATIO queue dma pointers for target mode */ 3911 icb->atio_q_inpointer = cpu_to_le16(0); 3912 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3913 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3914 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3915 3916 if (IS_SHADOW_REG_CAPABLE(ha)) 3917 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3918 3919 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3920 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3921 icb->rid = cpu_to_le16(rid); 3922 if (ha->flags.msix_enabled) { 3923 msix = &ha->msix_entries[1]; 3924 ql_dbg(ql_dbg_init, vha, 0x0019, 3925 "Registering vector 0x%x for base que.\n", 3926 msix->entry); 3927 icb->msix = cpu_to_le16(msix->entry); 3928 } 3929 /* Use alternate PCI bus number */ 3930 if (MSB(rid)) 3931 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3932 /* Use alternate PCI devfn */ 3933 if (LSB(rid)) 3934 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3935 3936 /* Use Disable MSIX Handshake mode for capable adapters */ 3937 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3938 (ha->flags.msix_enabled)) { 3939 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3940 ha->flags.disable_msix_handshake = 1; 3941 ql_dbg(ql_dbg_init, vha, 0x00fe, 3942 "MSIX Handshake Disable Mode turned on.\n"); 3943 } else { 3944 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3945 } 3946 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3947 3948 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3949 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3950 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3951 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3952 } else { 3953 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3954 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3955 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3956 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3957 } 3958 qlt_24xx_config_rings(vha); 3959 3960 /* PCI posting */ 3961 RD_REG_DWORD(&ioreg->hccr); 3962 } 3963 3964 /** 3965 * qla2x00_init_rings() - Initializes firmware. 3966 * @vha: HA context 3967 * 3968 * Beginning of request ring has initialization control block already built 3969 * by nvram config routine. 3970 * 3971 * Returns 0 on success. 3972 */ 3973 int 3974 qla2x00_init_rings(scsi_qla_host_t *vha) 3975 { 3976 int rval; 3977 unsigned long flags = 0; 3978 int cnt, que; 3979 struct qla_hw_data *ha = vha->hw; 3980 struct req_que *req; 3981 struct rsp_que *rsp; 3982 struct mid_init_cb_24xx *mid_init_cb = 3983 (struct mid_init_cb_24xx *) ha->init_cb; 3984 3985 spin_lock_irqsave(&ha->hardware_lock, flags); 3986 3987 /* Clear outstanding commands array. */ 3988 for (que = 0; que < ha->max_req_queues; que++) { 3989 req = ha->req_q_map[que]; 3990 if (!req || !test_bit(que, ha->req_qid_map)) 3991 continue; 3992 req->out_ptr = (void *)(req->ring + req->length); 3993 *req->out_ptr = 0; 3994 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3995 req->outstanding_cmds[cnt] = NULL; 3996 3997 req->current_outstanding_cmd = 1; 3998 3999 /* Initialize firmware. */ 4000 req->ring_ptr = req->ring; 4001 req->ring_index = 0; 4002 req->cnt = req->length; 4003 } 4004 4005 for (que = 0; que < ha->max_rsp_queues; que++) { 4006 rsp = ha->rsp_q_map[que]; 4007 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4008 continue; 4009 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 4010 *rsp->in_ptr = 0; 4011 /* Initialize response queue entries */ 4012 if (IS_QLAFX00(ha)) 4013 qlafx00_init_response_q_entries(rsp); 4014 else 4015 qla2x00_init_response_q_entries(rsp); 4016 } 4017 4018 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4019 ha->tgt.atio_ring_index = 0; 4020 /* Initialize ATIO queue entries */ 4021 qlt_init_atio_q_entries(vha); 4022 4023 ha->isp_ops->config_rings(vha); 4024 4025 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4026 4027 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 4028 4029 if (IS_QLAFX00(ha)) { 4030 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4031 goto next_check; 4032 } 4033 4034 /* Update any ISP specific firmware options before initialization. */ 4035 ha->isp_ops->update_fw_options(vha); 4036 4037 if (ha->flags.npiv_supported) { 4038 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4039 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4040 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4041 } 4042 4043 if (IS_FWI2_CAPABLE(ha)) { 4044 mid_init_cb->options = cpu_to_le16(BIT_1); 4045 mid_init_cb->init_cb.execution_throttle = 4046 cpu_to_le16(ha->cur_fw_xcb_count); 4047 ha->flags.dport_enabled = 4048 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 4049 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4050 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4051 /* FA-WWPN Status */ 4052 ha->flags.fawwpn_enabled = 4053 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 4054 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4055 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4056 } 4057 4058 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4059 next_check: 4060 if (rval) { 4061 ql_log(ql_log_fatal, vha, 0x00d2, 4062 "Init Firmware **** FAILED ****.\n"); 4063 } else { 4064 ql_dbg(ql_dbg_init, vha, 0x00d3, 4065 "Init Firmware -- success.\n"); 4066 QLA_FW_STARTED(ha); 4067 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4068 } 4069 4070 return (rval); 4071 } 4072 4073 /** 4074 * qla2x00_fw_ready() - Waits for firmware ready. 4075 * @vha: HA context 4076 * 4077 * Returns 0 on success. 4078 */ 4079 static int 4080 qla2x00_fw_ready(scsi_qla_host_t *vha) 4081 { 4082 int rval; 4083 unsigned long wtime, mtime, cs84xx_time; 4084 uint16_t min_wait; /* Minimum wait time if loop is down */ 4085 uint16_t wait_time; /* Wait time if loop is coming ready */ 4086 uint16_t state[6]; 4087 struct qla_hw_data *ha = vha->hw; 4088 4089 if (IS_QLAFX00(vha->hw)) 4090 return qlafx00_fw_ready(vha); 4091 4092 rval = QLA_SUCCESS; 4093 4094 /* Time to wait for loop down */ 4095 if (IS_P3P_TYPE(ha)) 4096 min_wait = 30; 4097 else 4098 min_wait = 20; 4099 4100 /* 4101 * Firmware should take at most one RATOV to login, plus 5 seconds for 4102 * our own processing. 4103 */ 4104 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4105 wait_time = min_wait; 4106 } 4107 4108 /* Min wait time if loop down */ 4109 mtime = jiffies + (min_wait * HZ); 4110 4111 /* wait time before firmware ready */ 4112 wtime = jiffies + (wait_time * HZ); 4113 4114 /* Wait for ISP to finish LIP */ 4115 if (!vha->flags.init_done) 4116 ql_log(ql_log_info, vha, 0x801e, 4117 "Waiting for LIP to complete.\n"); 4118 4119 do { 4120 memset(state, -1, sizeof(state)); 4121 rval = qla2x00_get_firmware_state(vha, state); 4122 if (rval == QLA_SUCCESS) { 4123 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4124 vha->device_flags &= ~DFLG_NO_CABLE; 4125 } 4126 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4127 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4128 "fw_state=%x 84xx=%x.\n", state[0], 4129 state[2]); 4130 if ((state[2] & FSTATE_LOGGED_IN) && 4131 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4132 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4133 "Sending verify iocb.\n"); 4134 4135 cs84xx_time = jiffies; 4136 rval = qla84xx_init_chip(vha); 4137 if (rval != QLA_SUCCESS) { 4138 ql_log(ql_log_warn, 4139 vha, 0x8007, 4140 "Init chip failed.\n"); 4141 break; 4142 } 4143 4144 /* Add time taken to initialize. */ 4145 cs84xx_time = jiffies - cs84xx_time; 4146 wtime += cs84xx_time; 4147 mtime += cs84xx_time; 4148 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4149 "Increasing wait time by %ld. " 4150 "New time %ld.\n", cs84xx_time, 4151 wtime); 4152 } 4153 } else if (state[0] == FSTATE_READY) { 4154 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4155 "F/W Ready - OK.\n"); 4156 4157 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4158 &ha->login_timeout, &ha->r_a_tov); 4159 4160 rval = QLA_SUCCESS; 4161 break; 4162 } 4163 4164 rval = QLA_FUNCTION_FAILED; 4165 4166 if (atomic_read(&vha->loop_down_timer) && 4167 state[0] != FSTATE_READY) { 4168 /* Loop down. Timeout on min_wait for states 4169 * other than Wait for Login. 4170 */ 4171 if (time_after_eq(jiffies, mtime)) { 4172 ql_log(ql_log_info, vha, 0x8038, 4173 "Cable is unplugged...\n"); 4174 4175 vha->device_flags |= DFLG_NO_CABLE; 4176 break; 4177 } 4178 } 4179 } else { 4180 /* Mailbox cmd failed. Timeout on min_wait. */ 4181 if (time_after_eq(jiffies, mtime) || 4182 ha->flags.isp82xx_fw_hung) 4183 break; 4184 } 4185 4186 if (time_after_eq(jiffies, wtime)) 4187 break; 4188 4189 /* Delay for a while */ 4190 msleep(500); 4191 } while (1); 4192 4193 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4194 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4195 state[1], state[2], state[3], state[4], state[5], jiffies); 4196 4197 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4198 ql_log(ql_log_warn, vha, 0x803b, 4199 "Firmware ready **** FAILED ****.\n"); 4200 } 4201 4202 return (rval); 4203 } 4204 4205 /* 4206 * qla2x00_configure_hba 4207 * Setup adapter context. 4208 * 4209 * Input: 4210 * ha = adapter state pointer. 4211 * 4212 * Returns: 4213 * 0 = success 4214 * 4215 * Context: 4216 * Kernel context. 4217 */ 4218 static int 4219 qla2x00_configure_hba(scsi_qla_host_t *vha) 4220 { 4221 int rval; 4222 uint16_t loop_id; 4223 uint16_t topo; 4224 uint16_t sw_cap; 4225 uint8_t al_pa; 4226 uint8_t area; 4227 uint8_t domain; 4228 char connect_type[22]; 4229 struct qla_hw_data *ha = vha->hw; 4230 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4231 port_id_t id; 4232 unsigned long flags; 4233 4234 /* Get host addresses. */ 4235 rval = qla2x00_get_adapter_id(vha, 4236 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4237 if (rval != QLA_SUCCESS) { 4238 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4239 IS_CNA_CAPABLE(ha) || 4240 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4241 ql_dbg(ql_dbg_disc, vha, 0x2008, 4242 "Loop is in a transition state.\n"); 4243 } else { 4244 ql_log(ql_log_warn, vha, 0x2009, 4245 "Unable to get host loop ID.\n"); 4246 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4247 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4248 ql_log(ql_log_warn, vha, 0x1151, 4249 "Doing link init.\n"); 4250 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4251 return rval; 4252 } 4253 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4254 } 4255 return (rval); 4256 } 4257 4258 if (topo == 4) { 4259 ql_log(ql_log_info, vha, 0x200a, 4260 "Cannot get topology - retrying.\n"); 4261 return (QLA_FUNCTION_FAILED); 4262 } 4263 4264 vha->loop_id = loop_id; 4265 4266 /* initialize */ 4267 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4268 ha->operating_mode = LOOP; 4269 ha->switch_cap = 0; 4270 4271 switch (topo) { 4272 case 0: 4273 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4274 ha->current_topology = ISP_CFG_NL; 4275 strcpy(connect_type, "(Loop)"); 4276 break; 4277 4278 case 1: 4279 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4280 ha->switch_cap = sw_cap; 4281 ha->current_topology = ISP_CFG_FL; 4282 strcpy(connect_type, "(FL_Port)"); 4283 break; 4284 4285 case 2: 4286 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4287 ha->operating_mode = P2P; 4288 ha->current_topology = ISP_CFG_N; 4289 strcpy(connect_type, "(N_Port-to-N_Port)"); 4290 break; 4291 4292 case 3: 4293 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4294 ha->switch_cap = sw_cap; 4295 ha->operating_mode = P2P; 4296 ha->current_topology = ISP_CFG_F; 4297 strcpy(connect_type, "(F_Port)"); 4298 break; 4299 4300 default: 4301 ql_dbg(ql_dbg_disc, vha, 0x200f, 4302 "HBA in unknown topology %x, using NL.\n", topo); 4303 ha->current_topology = ISP_CFG_NL; 4304 strcpy(connect_type, "(Loop)"); 4305 break; 4306 } 4307 4308 /* Save Host port and loop ID. */ 4309 /* byte order - Big Endian */ 4310 id.b.domain = domain; 4311 id.b.area = area; 4312 id.b.al_pa = al_pa; 4313 id.b.rsvd_1 = 0; 4314 spin_lock_irqsave(&ha->hardware_lock, flags); 4315 if (!(topo == 2 && ha->flags.n2n_bigger)) 4316 qlt_update_host_map(vha, id); 4317 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4318 4319 if (!vha->flags.init_done) 4320 ql_log(ql_log_info, vha, 0x2010, 4321 "Topology - %s, Host Loop address 0x%x.\n", 4322 connect_type, vha->loop_id); 4323 4324 return(rval); 4325 } 4326 4327 inline void 4328 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4329 char *def) 4330 { 4331 char *st, *en; 4332 uint16_t index; 4333 struct qla_hw_data *ha = vha->hw; 4334 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4335 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4336 4337 if (memcmp(model, BINZERO, len) != 0) { 4338 strncpy(ha->model_number, model, len); 4339 st = en = ha->model_number; 4340 en += len - 1; 4341 while (en > st) { 4342 if (*en != 0x20 && *en != 0x00) 4343 break; 4344 *en-- = '\0'; 4345 } 4346 4347 index = (ha->pdev->subsystem_device & 0xff); 4348 if (use_tbl && 4349 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4350 index < QLA_MODEL_NAMES) 4351 strncpy(ha->model_desc, 4352 qla2x00_model_name[index * 2 + 1], 4353 sizeof(ha->model_desc) - 1); 4354 } else { 4355 index = (ha->pdev->subsystem_device & 0xff); 4356 if (use_tbl && 4357 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4358 index < QLA_MODEL_NAMES) { 4359 strcpy(ha->model_number, 4360 qla2x00_model_name[index * 2]); 4361 strncpy(ha->model_desc, 4362 qla2x00_model_name[index * 2 + 1], 4363 sizeof(ha->model_desc) - 1); 4364 } else { 4365 strcpy(ha->model_number, def); 4366 } 4367 } 4368 if (IS_FWI2_CAPABLE(ha)) 4369 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4370 sizeof(ha->model_desc)); 4371 } 4372 4373 /* On sparc systems, obtain port and node WWN from firmware 4374 * properties. 4375 */ 4376 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4377 { 4378 #ifdef CONFIG_SPARC 4379 struct qla_hw_data *ha = vha->hw; 4380 struct pci_dev *pdev = ha->pdev; 4381 struct device_node *dp = pci_device_to_OF_node(pdev); 4382 const u8 *val; 4383 int len; 4384 4385 val = of_get_property(dp, "port-wwn", &len); 4386 if (val && len >= WWN_SIZE) 4387 memcpy(nv->port_name, val, WWN_SIZE); 4388 4389 val = of_get_property(dp, "node-wwn", &len); 4390 if (val && len >= WWN_SIZE) 4391 memcpy(nv->node_name, val, WWN_SIZE); 4392 #endif 4393 } 4394 4395 /* 4396 * NVRAM configuration for ISP 2xxx 4397 * 4398 * Input: 4399 * ha = adapter block pointer. 4400 * 4401 * Output: 4402 * initialization control block in response_ring 4403 * host adapters parameters in host adapter block 4404 * 4405 * Returns: 4406 * 0 = success. 4407 */ 4408 int 4409 qla2x00_nvram_config(scsi_qla_host_t *vha) 4410 { 4411 int rval; 4412 uint8_t chksum = 0; 4413 uint16_t cnt; 4414 uint8_t *dptr1, *dptr2; 4415 struct qla_hw_data *ha = vha->hw; 4416 init_cb_t *icb = ha->init_cb; 4417 nvram_t *nv = ha->nvram; 4418 uint8_t *ptr = ha->nvram; 4419 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4420 4421 rval = QLA_SUCCESS; 4422 4423 /* Determine NVRAM starting address. */ 4424 ha->nvram_size = sizeof(nvram_t); 4425 ha->nvram_base = 0; 4426 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4427 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4428 ha->nvram_base = 0x80; 4429 4430 /* Get NVRAM data and calculate checksum. */ 4431 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4432 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4433 chksum += *ptr++; 4434 4435 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4436 "Contents of NVRAM.\n"); 4437 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4438 (uint8_t *)nv, ha->nvram_size); 4439 4440 /* Bad NVRAM data, set defaults parameters. */ 4441 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4442 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4443 /* Reset NVRAM data. */ 4444 ql_log(ql_log_warn, vha, 0x0064, 4445 "Inconsistent NVRAM " 4446 "detected: checksum=0x%x id=%c version=0x%x.\n", 4447 chksum, nv->id[0], nv->nvram_version); 4448 ql_log(ql_log_warn, vha, 0x0065, 4449 "Falling back to " 4450 "functioning (yet invalid -- WWPN) defaults.\n"); 4451 4452 /* 4453 * Set default initialization control block. 4454 */ 4455 memset(nv, 0, ha->nvram_size); 4456 nv->parameter_block_version = ICB_VERSION; 4457 4458 if (IS_QLA23XX(ha)) { 4459 nv->firmware_options[0] = BIT_2 | BIT_1; 4460 nv->firmware_options[1] = BIT_7 | BIT_5; 4461 nv->add_firmware_options[0] = BIT_5; 4462 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4463 nv->frame_payload_size = 2048; 4464 nv->special_options[1] = BIT_7; 4465 } else if (IS_QLA2200(ha)) { 4466 nv->firmware_options[0] = BIT_2 | BIT_1; 4467 nv->firmware_options[1] = BIT_7 | BIT_5; 4468 nv->add_firmware_options[0] = BIT_5; 4469 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4470 nv->frame_payload_size = 1024; 4471 } else if (IS_QLA2100(ha)) { 4472 nv->firmware_options[0] = BIT_3 | BIT_1; 4473 nv->firmware_options[1] = BIT_5; 4474 nv->frame_payload_size = 1024; 4475 } 4476 4477 nv->max_iocb_allocation = cpu_to_le16(256); 4478 nv->execution_throttle = cpu_to_le16(16); 4479 nv->retry_count = 8; 4480 nv->retry_delay = 1; 4481 4482 nv->port_name[0] = 33; 4483 nv->port_name[3] = 224; 4484 nv->port_name[4] = 139; 4485 4486 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4487 4488 nv->login_timeout = 4; 4489 4490 /* 4491 * Set default host adapter parameters 4492 */ 4493 nv->host_p[1] = BIT_2; 4494 nv->reset_delay = 5; 4495 nv->port_down_retry_count = 8; 4496 nv->max_luns_per_target = cpu_to_le16(8); 4497 nv->link_down_timeout = 60; 4498 4499 rval = 1; 4500 } 4501 4502 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4503 /* 4504 * The SN2 does not provide BIOS emulation which means you can't change 4505 * potentially bogus BIOS settings. Force the use of default settings 4506 * for link rate and frame size. Hope that the rest of the settings 4507 * are valid. 4508 */ 4509 if (ia64_platform_is("sn2")) { 4510 nv->frame_payload_size = 2048; 4511 if (IS_QLA23XX(ha)) 4512 nv->special_options[1] = BIT_7; 4513 } 4514 #endif 4515 4516 /* Reset Initialization control block */ 4517 memset(icb, 0, ha->init_cb_size); 4518 4519 /* 4520 * Setup driver NVRAM options. 4521 */ 4522 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4523 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4524 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4525 nv->firmware_options[1] &= ~BIT_4; 4526 4527 if (IS_QLA23XX(ha)) { 4528 nv->firmware_options[0] |= BIT_2; 4529 nv->firmware_options[0] &= ~BIT_3; 4530 nv->special_options[0] &= ~BIT_6; 4531 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4532 4533 if (IS_QLA2300(ha)) { 4534 if (ha->fb_rev == FPM_2310) { 4535 strcpy(ha->model_number, "QLA2310"); 4536 } else { 4537 strcpy(ha->model_number, "QLA2300"); 4538 } 4539 } else { 4540 qla2x00_set_model_info(vha, nv->model_number, 4541 sizeof(nv->model_number), "QLA23xx"); 4542 } 4543 } else if (IS_QLA2200(ha)) { 4544 nv->firmware_options[0] |= BIT_2; 4545 /* 4546 * 'Point-to-point preferred, else loop' is not a safe 4547 * connection mode setting. 4548 */ 4549 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4550 (BIT_5 | BIT_4)) { 4551 /* Force 'loop preferred, else point-to-point'. */ 4552 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4553 nv->add_firmware_options[0] |= BIT_5; 4554 } 4555 strcpy(ha->model_number, "QLA22xx"); 4556 } else /*if (IS_QLA2100(ha))*/ { 4557 strcpy(ha->model_number, "QLA2100"); 4558 } 4559 4560 /* 4561 * Copy over NVRAM RISC parameter block to initialization control block. 4562 */ 4563 dptr1 = (uint8_t *)icb; 4564 dptr2 = (uint8_t *)&nv->parameter_block_version; 4565 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4566 while (cnt--) 4567 *dptr1++ = *dptr2++; 4568 4569 /* Copy 2nd half. */ 4570 dptr1 = (uint8_t *)icb->add_firmware_options; 4571 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4572 while (cnt--) 4573 *dptr1++ = *dptr2++; 4574 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4575 /* Use alternate WWN? */ 4576 if (nv->host_p[1] & BIT_7) { 4577 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4578 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4579 } 4580 4581 /* Prepare nodename */ 4582 if ((icb->firmware_options[1] & BIT_6) == 0) { 4583 /* 4584 * Firmware will apply the following mask if the nodename was 4585 * not provided. 4586 */ 4587 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4588 icb->node_name[0] &= 0xF0; 4589 } 4590 4591 /* 4592 * Set host adapter parameters. 4593 */ 4594 4595 /* 4596 * BIT_7 in the host-parameters section allows for modification to 4597 * internal driver logging. 4598 */ 4599 if (nv->host_p[0] & BIT_7) 4600 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4601 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4602 /* Always load RISC code on non ISP2[12]00 chips. */ 4603 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4604 ha->flags.disable_risc_code_load = 0; 4605 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4606 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4607 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4608 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4609 ha->flags.disable_serdes = 0; 4610 4611 ha->operating_mode = 4612 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4613 4614 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4615 sizeof(ha->fw_seriallink_options)); 4616 4617 /* save HBA serial number */ 4618 ha->serial0 = icb->port_name[5]; 4619 ha->serial1 = icb->port_name[6]; 4620 ha->serial2 = icb->port_name[7]; 4621 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4622 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4623 4624 icb->execution_throttle = cpu_to_le16(0xFFFF); 4625 4626 ha->retry_count = nv->retry_count; 4627 4628 /* Set minimum login_timeout to 4 seconds. */ 4629 if (nv->login_timeout != ql2xlogintimeout) 4630 nv->login_timeout = ql2xlogintimeout; 4631 if (nv->login_timeout < 4) 4632 nv->login_timeout = 4; 4633 ha->login_timeout = nv->login_timeout; 4634 4635 /* Set minimum RATOV to 100 tenths of a second. */ 4636 ha->r_a_tov = 100; 4637 4638 ha->loop_reset_delay = nv->reset_delay; 4639 4640 /* Link Down Timeout = 0: 4641 * 4642 * When Port Down timer expires we will start returning 4643 * I/O's to OS with "DID_NO_CONNECT". 4644 * 4645 * Link Down Timeout != 0: 4646 * 4647 * The driver waits for the link to come up after link down 4648 * before returning I/Os to OS with "DID_NO_CONNECT". 4649 */ 4650 if (nv->link_down_timeout == 0) { 4651 ha->loop_down_abort_time = 4652 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4653 } else { 4654 ha->link_down_timeout = nv->link_down_timeout; 4655 ha->loop_down_abort_time = 4656 (LOOP_DOWN_TIME - ha->link_down_timeout); 4657 } 4658 4659 /* 4660 * Need enough time to try and get the port back. 4661 */ 4662 ha->port_down_retry_count = nv->port_down_retry_count; 4663 if (qlport_down_retry) 4664 ha->port_down_retry_count = qlport_down_retry; 4665 /* Set login_retry_count */ 4666 ha->login_retry_count = nv->retry_count; 4667 if (ha->port_down_retry_count == nv->port_down_retry_count && 4668 ha->port_down_retry_count > 3) 4669 ha->login_retry_count = ha->port_down_retry_count; 4670 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4671 ha->login_retry_count = ha->port_down_retry_count; 4672 if (ql2xloginretrycount) 4673 ha->login_retry_count = ql2xloginretrycount; 4674 4675 icb->lun_enables = cpu_to_le16(0); 4676 icb->command_resource_count = 0; 4677 icb->immediate_notify_resource_count = 0; 4678 icb->timeout = cpu_to_le16(0); 4679 4680 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4681 /* Enable RIO */ 4682 icb->firmware_options[0] &= ~BIT_3; 4683 icb->add_firmware_options[0] &= 4684 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4685 icb->add_firmware_options[0] |= BIT_2; 4686 icb->response_accumulation_timer = 3; 4687 icb->interrupt_delay_timer = 5; 4688 4689 vha->flags.process_response_queue = 1; 4690 } else { 4691 /* Enable ZIO. */ 4692 if (!vha->flags.init_done) { 4693 ha->zio_mode = icb->add_firmware_options[0] & 4694 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4695 ha->zio_timer = icb->interrupt_delay_timer ? 4696 icb->interrupt_delay_timer: 2; 4697 } 4698 icb->add_firmware_options[0] &= 4699 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4700 vha->flags.process_response_queue = 0; 4701 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4702 ha->zio_mode = QLA_ZIO_MODE_6; 4703 4704 ql_log(ql_log_info, vha, 0x0068, 4705 "ZIO mode %d enabled; timer delay (%d us).\n", 4706 ha->zio_mode, ha->zio_timer * 100); 4707 4708 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4709 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4710 vha->flags.process_response_queue = 1; 4711 } 4712 } 4713 4714 if (rval) { 4715 ql_log(ql_log_warn, vha, 0x0069, 4716 "NVRAM configuration failed.\n"); 4717 } 4718 return (rval); 4719 } 4720 4721 static void 4722 qla2x00_rport_del(void *data) 4723 { 4724 fc_port_t *fcport = data; 4725 struct fc_rport *rport; 4726 unsigned long flags; 4727 4728 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4729 rport = fcport->drport ? fcport->drport: fcport->rport; 4730 fcport->drport = NULL; 4731 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4732 if (rport) { 4733 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4734 "%s %8phN. rport %p roles %x\n", 4735 __func__, fcport->port_name, rport, 4736 rport->roles); 4737 4738 fc_remote_port_delete(rport); 4739 } 4740 } 4741 4742 /** 4743 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4744 * @vha: HA context 4745 * @flags: allocation flags 4746 * 4747 * Returns a pointer to the allocated fcport, or NULL, if none available. 4748 */ 4749 fc_port_t * 4750 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4751 { 4752 fc_port_t *fcport; 4753 4754 fcport = kzalloc(sizeof(fc_port_t), flags); 4755 if (!fcport) 4756 return NULL; 4757 4758 /* Setup fcport template structure. */ 4759 fcport->vha = vha; 4760 fcport->port_type = FCT_UNKNOWN; 4761 fcport->loop_id = FC_NO_LOOP_ID; 4762 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4763 fcport->supported_classes = FC_COS_UNSPECIFIED; 4764 fcport->fp_speed = PORT_SPEED_UNKNOWN; 4765 4766 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4767 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4768 flags); 4769 fcport->disc_state = DSC_DELETED; 4770 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4771 fcport->deleted = QLA_SESS_DELETED; 4772 fcport->login_retry = vha->hw->login_retry_count; 4773 fcport->logout_on_delete = 1; 4774 4775 if (!fcport->ct_desc.ct_sns) { 4776 ql_log(ql_log_warn, vha, 0xd049, 4777 "Failed to allocate ct_sns request.\n"); 4778 kfree(fcport); 4779 fcport = NULL; 4780 } 4781 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4782 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 4783 INIT_LIST_HEAD(&fcport->gnl_entry); 4784 INIT_LIST_HEAD(&fcport->list); 4785 4786 return fcport; 4787 } 4788 4789 void 4790 qla2x00_free_fcport(fc_port_t *fcport) 4791 { 4792 if (fcport->ct_desc.ct_sns) { 4793 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4794 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4795 fcport->ct_desc.ct_sns_dma); 4796 4797 fcport->ct_desc.ct_sns = NULL; 4798 } 4799 kfree(fcport); 4800 } 4801 4802 /* 4803 * qla2x00_configure_loop 4804 * Updates Fibre Channel Device Database with what is actually on loop. 4805 * 4806 * Input: 4807 * ha = adapter block pointer. 4808 * 4809 * Returns: 4810 * 0 = success. 4811 * 1 = error. 4812 * 2 = database was full and device was not configured. 4813 */ 4814 static int 4815 qla2x00_configure_loop(scsi_qla_host_t *vha) 4816 { 4817 int rval; 4818 unsigned long flags, save_flags; 4819 struct qla_hw_data *ha = vha->hw; 4820 rval = QLA_SUCCESS; 4821 4822 /* Get Initiator ID */ 4823 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4824 rval = qla2x00_configure_hba(vha); 4825 if (rval != QLA_SUCCESS) { 4826 ql_dbg(ql_dbg_disc, vha, 0x2013, 4827 "Unable to configure HBA.\n"); 4828 return (rval); 4829 } 4830 } 4831 4832 save_flags = flags = vha->dpc_flags; 4833 ql_dbg(ql_dbg_disc, vha, 0x2014, 4834 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4835 4836 /* 4837 * If we have both an RSCN and PORT UPDATE pending then handle them 4838 * both at the same time. 4839 */ 4840 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4841 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4842 4843 qla2x00_get_data_rate(vha); 4844 4845 /* Determine what we need to do */ 4846 if (ha->current_topology == ISP_CFG_FL && 4847 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4848 4849 set_bit(RSCN_UPDATE, &flags); 4850 4851 } else if (ha->current_topology == ISP_CFG_F && 4852 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4853 4854 set_bit(RSCN_UPDATE, &flags); 4855 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4856 4857 } else if (ha->current_topology == ISP_CFG_N) { 4858 clear_bit(RSCN_UPDATE, &flags); 4859 if (qla_tgt_mode_enabled(vha)) { 4860 /* allow the other side to start the login */ 4861 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4862 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4863 } 4864 } else if (ha->current_topology == ISP_CFG_NL) { 4865 clear_bit(RSCN_UPDATE, &flags); 4866 set_bit(LOCAL_LOOP_UPDATE, &flags); 4867 } else if (!vha->flags.online || 4868 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4869 set_bit(RSCN_UPDATE, &flags); 4870 set_bit(LOCAL_LOOP_UPDATE, &flags); 4871 } 4872 4873 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4874 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4875 ql_dbg(ql_dbg_disc, vha, 0x2015, 4876 "Loop resync needed, failing.\n"); 4877 rval = QLA_FUNCTION_FAILED; 4878 } else 4879 rval = qla2x00_configure_local_loop(vha); 4880 } 4881 4882 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4883 if (LOOP_TRANSITION(vha)) { 4884 ql_dbg(ql_dbg_disc, vha, 0x2099, 4885 "Needs RSCN update and loop transition.\n"); 4886 rval = QLA_FUNCTION_FAILED; 4887 } 4888 else 4889 rval = qla2x00_configure_fabric(vha); 4890 } 4891 4892 if (rval == QLA_SUCCESS) { 4893 if (atomic_read(&vha->loop_down_timer) || 4894 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4895 rval = QLA_FUNCTION_FAILED; 4896 } else { 4897 atomic_set(&vha->loop_state, LOOP_READY); 4898 ql_dbg(ql_dbg_disc, vha, 0x2069, 4899 "LOOP READY.\n"); 4900 ha->flags.fw_init_done = 1; 4901 4902 /* 4903 * Process any ATIO queue entries that came in 4904 * while we weren't online. 4905 */ 4906 if (qla_tgt_mode_enabled(vha) || 4907 qla_dual_mode_enabled(vha)) { 4908 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 4909 qlt_24xx_process_atio_queue(vha, 0); 4910 spin_unlock_irqrestore(&ha->tgt.atio_lock, 4911 flags); 4912 } 4913 } 4914 } 4915 4916 if (rval) { 4917 ql_dbg(ql_dbg_disc, vha, 0x206a, 4918 "%s *** FAILED ***.\n", __func__); 4919 } else { 4920 ql_dbg(ql_dbg_disc, vha, 0x206b, 4921 "%s: exiting normally.\n", __func__); 4922 } 4923 4924 /* Restore state if a resync event occurred during processing */ 4925 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4926 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4927 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4928 if (test_bit(RSCN_UPDATE, &save_flags)) { 4929 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4930 } 4931 } 4932 4933 return (rval); 4934 } 4935 4936 /* 4937 * qla2x00_configure_local_loop 4938 * Updates Fibre Channel Device Database with local loop devices. 4939 * 4940 * Input: 4941 * ha = adapter block pointer. 4942 * 4943 * Returns: 4944 * 0 = success. 4945 */ 4946 static int 4947 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4948 { 4949 int rval, rval2; 4950 int found_devs; 4951 int found; 4952 fc_port_t *fcport, *new_fcport; 4953 4954 uint16_t index; 4955 uint16_t entries; 4956 char *id_iter; 4957 uint16_t loop_id; 4958 uint8_t domain, area, al_pa; 4959 struct qla_hw_data *ha = vha->hw; 4960 unsigned long flags; 4961 4962 /* Inititae N2N login. */ 4963 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4964 /* borrowing */ 4965 u32 *bp, i, sz; 4966 4967 memset(ha->init_cb, 0, ha->init_cb_size); 4968 sz = min_t(int, sizeof(struct els_plogi_payload), 4969 ha->init_cb_size); 4970 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 4971 (void *)ha->init_cb, sz); 4972 if (rval == QLA_SUCCESS) { 4973 bp = (uint32_t *)ha->init_cb; 4974 for (i = 0; i < sz/4 ; i++, bp++) 4975 *bp = cpu_to_be32(*bp); 4976 4977 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb, 4978 sizeof(ha->plogi_els_payld.data)); 4979 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4980 } else { 4981 ql_dbg(ql_dbg_init, vha, 0x00d1, 4982 "PLOGI ELS param read fail.\n"); 4983 } 4984 return QLA_SUCCESS; 4985 } 4986 4987 found_devs = 0; 4988 new_fcport = NULL; 4989 entries = MAX_FIBRE_DEVICES_LOOP; 4990 4991 /* Get list of logged in devices. */ 4992 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4993 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4994 &entries); 4995 if (rval != QLA_SUCCESS) 4996 goto cleanup_allocation; 4997 4998 ql_dbg(ql_dbg_disc, vha, 0x2011, 4999 "Entries in ID list (%d).\n", entries); 5000 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5001 (uint8_t *)ha->gid_list, 5002 entries * sizeof(struct gid_list_info)); 5003 5004 if (entries == 0) { 5005 spin_lock_irqsave(&vha->work_lock, flags); 5006 vha->scan.scan_retry++; 5007 spin_unlock_irqrestore(&vha->work_lock, flags); 5008 5009 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5010 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5011 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5012 } 5013 } else { 5014 vha->scan.scan_retry = 0; 5015 } 5016 5017 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5018 fcport->scan_state = QLA_FCPORT_SCAN; 5019 } 5020 5021 /* Allocate temporary fcport for any new fcports discovered. */ 5022 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5023 if (new_fcport == NULL) { 5024 ql_log(ql_log_warn, vha, 0x2012, 5025 "Memory allocation failed for fcport.\n"); 5026 rval = QLA_MEMORY_ALLOC_FAILED; 5027 goto cleanup_allocation; 5028 } 5029 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5030 5031 /* Add devices to port list. */ 5032 id_iter = (char *)ha->gid_list; 5033 for (index = 0; index < entries; index++) { 5034 domain = ((struct gid_list_info *)id_iter)->domain; 5035 area = ((struct gid_list_info *)id_iter)->area; 5036 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 5037 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5038 loop_id = (uint16_t) 5039 ((struct gid_list_info *)id_iter)->loop_id_2100; 5040 else 5041 loop_id = le16_to_cpu( 5042 ((struct gid_list_info *)id_iter)->loop_id); 5043 id_iter += ha->gid_list_info_size; 5044 5045 /* Bypass reserved domain fields. */ 5046 if ((domain & 0xf0) == 0xf0) 5047 continue; 5048 5049 /* Bypass if not same domain and area of adapter. */ 5050 if (area && domain && 5051 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 5052 continue; 5053 5054 /* Bypass invalid local loop ID. */ 5055 if (loop_id > LAST_LOCAL_LOOP_ID) 5056 continue; 5057 5058 memset(new_fcport->port_name, 0, WWN_SIZE); 5059 5060 /* Fill in member data. */ 5061 new_fcport->d_id.b.domain = domain; 5062 new_fcport->d_id.b.area = area; 5063 new_fcport->d_id.b.al_pa = al_pa; 5064 new_fcport->loop_id = loop_id; 5065 new_fcport->scan_state = QLA_FCPORT_FOUND; 5066 5067 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5068 if (rval2 != QLA_SUCCESS) { 5069 ql_dbg(ql_dbg_disc, vha, 0x2097, 5070 "Failed to retrieve fcport information " 5071 "-- get_port_database=%x, loop_id=0x%04x.\n", 5072 rval2, new_fcport->loop_id); 5073 /* Skip retry if N2N */ 5074 if (ha->current_topology != ISP_CFG_N) { 5075 ql_dbg(ql_dbg_disc, vha, 0x2105, 5076 "Scheduling resync.\n"); 5077 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5078 continue; 5079 } 5080 } 5081 5082 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5083 /* Check for matching device in port list. */ 5084 found = 0; 5085 fcport = NULL; 5086 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5087 if (memcmp(new_fcport->port_name, fcport->port_name, 5088 WWN_SIZE)) 5089 continue; 5090 5091 fcport->flags &= ~FCF_FABRIC_DEVICE; 5092 fcport->loop_id = new_fcport->loop_id; 5093 fcport->port_type = new_fcport->port_type; 5094 fcport->d_id.b24 = new_fcport->d_id.b24; 5095 memcpy(fcport->node_name, new_fcport->node_name, 5096 WWN_SIZE); 5097 fcport->scan_state = QLA_FCPORT_FOUND; 5098 found++; 5099 break; 5100 } 5101 5102 if (!found) { 5103 /* New device, add to fcports list. */ 5104 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5105 5106 /* Allocate a new replacement fcport. */ 5107 fcport = new_fcport; 5108 5109 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5110 5111 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5112 5113 if (new_fcport == NULL) { 5114 ql_log(ql_log_warn, vha, 0xd031, 5115 "Failed to allocate memory for fcport.\n"); 5116 rval = QLA_MEMORY_ALLOC_FAILED; 5117 goto cleanup_allocation; 5118 } 5119 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5120 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5121 } 5122 5123 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5124 5125 /* Base iIDMA settings on HBA port speed. */ 5126 fcport->fp_speed = ha->link_data_rate; 5127 5128 found_devs++; 5129 } 5130 5131 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5132 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5133 break; 5134 5135 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5136 if ((qla_dual_mode_enabled(vha) || 5137 qla_ini_mode_enabled(vha)) && 5138 atomic_read(&fcport->state) == FCS_ONLINE) { 5139 qla2x00_mark_device_lost(vha, fcport, 5140 ql2xplogiabsentdevice, 0); 5141 if (fcport->loop_id != FC_NO_LOOP_ID && 5142 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5143 fcport->port_type != FCT_INITIATOR && 5144 fcport->port_type != FCT_BROADCAST) { 5145 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5146 "%s %d %8phC post del sess\n", 5147 __func__, __LINE__, 5148 fcport->port_name); 5149 5150 qlt_schedule_sess_for_deletion(fcport); 5151 continue; 5152 } 5153 } 5154 } 5155 5156 if (fcport->scan_state == QLA_FCPORT_FOUND) 5157 qla24xx_fcport_handle_login(vha, fcport); 5158 } 5159 5160 cleanup_allocation: 5161 kfree(new_fcport); 5162 5163 if (rval != QLA_SUCCESS) { 5164 ql_dbg(ql_dbg_disc, vha, 0x2098, 5165 "Configure local loop error exit: rval=%x.\n", rval); 5166 } 5167 5168 return (rval); 5169 } 5170 5171 static void 5172 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5173 { 5174 int rval; 5175 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5176 struct qla_hw_data *ha = vha->hw; 5177 5178 if (!IS_IIDMA_CAPABLE(ha)) 5179 return; 5180 5181 if (atomic_read(&fcport->state) != FCS_ONLINE) 5182 return; 5183 5184 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5185 fcport->fp_speed > ha->link_data_rate || 5186 !ha->flags.gpsc_supported) 5187 return; 5188 5189 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5190 mb); 5191 if (rval != QLA_SUCCESS) { 5192 ql_dbg(ql_dbg_disc, vha, 0x2004, 5193 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5194 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5195 } else { 5196 ql_dbg(ql_dbg_disc, vha, 0x2005, 5197 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5198 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5199 fcport->fp_speed, fcport->port_name); 5200 } 5201 } 5202 5203 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5204 { 5205 qla2x00_iidma_fcport(vha, fcport); 5206 qla24xx_update_fcport_fcp_prio(vha, fcport); 5207 } 5208 5209 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5210 { 5211 struct qla_work_evt *e; 5212 5213 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5214 if (!e) 5215 return QLA_FUNCTION_FAILED; 5216 5217 e->u.fcport.fcport = fcport; 5218 return qla2x00_post_work(vha, e); 5219 } 5220 5221 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5222 static void 5223 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5224 { 5225 struct fc_rport_identifiers rport_ids; 5226 struct fc_rport *rport; 5227 unsigned long flags; 5228 5229 if (atomic_read(&fcport->state) == FCS_ONLINE) 5230 return; 5231 5232 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5233 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5234 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5235 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5236 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5237 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5238 if (!rport) { 5239 ql_log(ql_log_warn, vha, 0x2006, 5240 "Unable to allocate fc remote port.\n"); 5241 return; 5242 } 5243 5244 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5245 *((fc_port_t **)rport->dd_data) = fcport; 5246 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5247 5248 rport->supported_classes = fcport->supported_classes; 5249 5250 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5251 if (fcport->port_type == FCT_INITIATOR) 5252 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5253 if (fcport->port_type == FCT_TARGET) 5254 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5255 5256 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5257 "%s %8phN. rport %p is %s mode\n", 5258 __func__, fcport->port_name, rport, 5259 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5260 5261 fc_remote_port_rolechg(rport, rport_ids.roles); 5262 } 5263 5264 /* 5265 * qla2x00_update_fcport 5266 * Updates device on list. 5267 * 5268 * Input: 5269 * ha = adapter block pointer. 5270 * fcport = port structure pointer. 5271 * 5272 * Return: 5273 * 0 - Success 5274 * BIT_0 - error 5275 * 5276 * Context: 5277 * Kernel context. 5278 */ 5279 void 5280 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5281 { 5282 if (IS_SW_RESV_ADDR(fcport->d_id)) 5283 return; 5284 5285 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5286 __func__, fcport->port_name); 5287 5288 fcport->disc_state = DSC_UPD_FCPORT; 5289 fcport->login_retry = vha->hw->login_retry_count; 5290 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5291 fcport->deleted = 0; 5292 fcport->logout_on_delete = 1; 5293 fcport->login_retry = vha->hw->login_retry_count; 5294 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5295 5296 switch (vha->hw->current_topology) { 5297 case ISP_CFG_N: 5298 case ISP_CFG_NL: 5299 fcport->keep_nport_handle = 1; 5300 break; 5301 default: 5302 break; 5303 } 5304 5305 qla2x00_iidma_fcport(vha, fcport); 5306 5307 if (fcport->fc4f_nvme) { 5308 qla_nvme_register_remote(vha, fcport); 5309 fcport->disc_state = DSC_LOGIN_COMPLETE; 5310 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5311 return; 5312 } 5313 5314 qla24xx_update_fcport_fcp_prio(vha, fcport); 5315 5316 switch (vha->host->active_mode) { 5317 case MODE_INITIATOR: 5318 qla2x00_reg_remote_port(vha, fcport); 5319 break; 5320 case MODE_TARGET: 5321 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5322 !vha->vha_tgt.qla_tgt->tgt_stopped) 5323 qlt_fc_port_added(vha, fcport); 5324 break; 5325 case MODE_DUAL: 5326 qla2x00_reg_remote_port(vha, fcport); 5327 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5328 !vha->vha_tgt.qla_tgt->tgt_stopped) 5329 qlt_fc_port_added(vha, fcport); 5330 break; 5331 default: 5332 break; 5333 } 5334 5335 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5336 5337 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5338 if (fcport->id_changed) { 5339 fcport->id_changed = 0; 5340 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5341 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5342 __func__, __LINE__, fcport->port_name, 5343 vha->fcport_count); 5344 qla24xx_post_gfpnid_work(vha, fcport); 5345 } else { 5346 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5347 "%s %d %8phC post gpsc fcp_cnt %d\n", 5348 __func__, __LINE__, fcport->port_name, 5349 vha->fcport_count); 5350 qla24xx_post_gpsc_work(vha, fcport); 5351 } 5352 } 5353 5354 fcport->disc_state = DSC_LOGIN_COMPLETE; 5355 } 5356 5357 void qla_register_fcport_fn(struct work_struct *work) 5358 { 5359 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5360 u32 rscn_gen = fcport->rscn_gen; 5361 u16 data[2]; 5362 5363 if (IS_SW_RESV_ADDR(fcport->d_id)) 5364 return; 5365 5366 qla2x00_update_fcport(fcport->vha, fcport); 5367 5368 if (rscn_gen != fcport->rscn_gen) { 5369 /* RSCN(s) came in while registration */ 5370 switch (fcport->next_disc_state) { 5371 case DSC_DELETE_PEND: 5372 qlt_schedule_sess_for_deletion(fcport); 5373 break; 5374 case DSC_ADISC: 5375 data[0] = data[1] = 0; 5376 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5377 data); 5378 break; 5379 default: 5380 break; 5381 } 5382 } 5383 } 5384 5385 /* 5386 * qla2x00_configure_fabric 5387 * Setup SNS devices with loop ID's. 5388 * 5389 * Input: 5390 * ha = adapter block pointer. 5391 * 5392 * Returns: 5393 * 0 = success. 5394 * BIT_0 = error 5395 */ 5396 static int 5397 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5398 { 5399 int rval; 5400 fc_port_t *fcport; 5401 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5402 uint16_t loop_id; 5403 LIST_HEAD(new_fcports); 5404 struct qla_hw_data *ha = vha->hw; 5405 int discovery_gen; 5406 5407 /* If FL port exists, then SNS is present */ 5408 if (IS_FWI2_CAPABLE(ha)) 5409 loop_id = NPH_F_PORT; 5410 else 5411 loop_id = SNS_FL_PORT; 5412 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5413 if (rval != QLA_SUCCESS) { 5414 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5415 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5416 5417 vha->device_flags &= ~SWITCH_FOUND; 5418 return (QLA_SUCCESS); 5419 } 5420 vha->device_flags |= SWITCH_FOUND; 5421 5422 5423 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5424 rval = qla2x00_send_change_request(vha, 0x3, 0); 5425 if (rval != QLA_SUCCESS) 5426 ql_log(ql_log_warn, vha, 0x121, 5427 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5428 rval); 5429 } 5430 5431 5432 do { 5433 qla2x00_mgmt_svr_login(vha); 5434 5435 /* FDMI support. */ 5436 if (ql2xfdmienable && 5437 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5438 qla2x00_fdmi_register(vha); 5439 5440 /* Ensure we are logged into the SNS. */ 5441 loop_id = NPH_SNS_LID(ha); 5442 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5443 0xfc, mb, BIT_1|BIT_0); 5444 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5445 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5446 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5447 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5448 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5449 return rval; 5450 } 5451 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5452 if (qla2x00_rft_id(vha)) { 5453 /* EMPTY */ 5454 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5455 "Register FC-4 TYPE failed.\n"); 5456 if (test_bit(LOOP_RESYNC_NEEDED, 5457 &vha->dpc_flags)) 5458 break; 5459 } 5460 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5461 /* EMPTY */ 5462 ql_dbg(ql_dbg_disc, vha, 0x209a, 5463 "Register FC-4 Features failed.\n"); 5464 if (test_bit(LOOP_RESYNC_NEEDED, 5465 &vha->dpc_flags)) 5466 break; 5467 } 5468 if (vha->flags.nvme_enabled) { 5469 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5470 ql_dbg(ql_dbg_disc, vha, 0x2049, 5471 "Register NVME FC Type Features failed.\n"); 5472 } 5473 } 5474 if (qla2x00_rnn_id(vha)) { 5475 /* EMPTY */ 5476 ql_dbg(ql_dbg_disc, vha, 0x2104, 5477 "Register Node Name failed.\n"); 5478 if (test_bit(LOOP_RESYNC_NEEDED, 5479 &vha->dpc_flags)) 5480 break; 5481 } else if (qla2x00_rsnn_nn(vha)) { 5482 /* EMPTY */ 5483 ql_dbg(ql_dbg_disc, vha, 0x209b, 5484 "Register Symbolic Node Name failed.\n"); 5485 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5486 break; 5487 } 5488 } 5489 5490 5491 /* Mark the time right before querying FW for connected ports. 5492 * This process is long, asynchronous and by the time it's done, 5493 * collected information might not be accurate anymore. E.g. 5494 * disconnected port might have re-connected and a brand new 5495 * session has been created. In this case session's generation 5496 * will be newer than discovery_gen. */ 5497 qlt_do_generation_tick(vha, &discovery_gen); 5498 5499 if (USE_ASYNC_SCAN(ha)) { 5500 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5501 NULL); 5502 if (rval) 5503 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5504 } else { 5505 list_for_each_entry(fcport, &vha->vp_fcports, list) 5506 fcport->scan_state = QLA_FCPORT_SCAN; 5507 5508 rval = qla2x00_find_all_fabric_devs(vha); 5509 } 5510 if (rval != QLA_SUCCESS) 5511 break; 5512 } while (0); 5513 5514 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5515 qla_nvme_register_hba(vha); 5516 5517 if (rval) 5518 ql_dbg(ql_dbg_disc, vha, 0x2068, 5519 "Configure fabric error exit rval=%d.\n", rval); 5520 5521 return (rval); 5522 } 5523 5524 /* 5525 * qla2x00_find_all_fabric_devs 5526 * 5527 * Input: 5528 * ha = adapter block pointer. 5529 * dev = database device entry pointer. 5530 * 5531 * Returns: 5532 * 0 = success. 5533 * 5534 * Context: 5535 * Kernel context. 5536 */ 5537 static int 5538 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5539 { 5540 int rval; 5541 uint16_t loop_id; 5542 fc_port_t *fcport, *new_fcport; 5543 int found; 5544 5545 sw_info_t *swl; 5546 int swl_idx; 5547 int first_dev, last_dev; 5548 port_id_t wrap = {}, nxt_d_id; 5549 struct qla_hw_data *ha = vha->hw; 5550 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5551 unsigned long flags; 5552 5553 rval = QLA_SUCCESS; 5554 5555 /* Try GID_PT to get device list, else GAN. */ 5556 if (!ha->swl) 5557 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5558 GFP_KERNEL); 5559 swl = ha->swl; 5560 if (!swl) { 5561 /*EMPTY*/ 5562 ql_dbg(ql_dbg_disc, vha, 0x209c, 5563 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5564 } else { 5565 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5566 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5567 swl = NULL; 5568 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5569 return rval; 5570 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5571 swl = NULL; 5572 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5573 return rval; 5574 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5575 swl = NULL; 5576 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5577 return rval; 5578 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5579 swl = NULL; 5580 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5581 return rval; 5582 } 5583 5584 /* If other queries succeeded probe for FC-4 type */ 5585 if (swl) { 5586 qla2x00_gff_id(vha, swl); 5587 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5588 return rval; 5589 } 5590 } 5591 swl_idx = 0; 5592 5593 /* Allocate temporary fcport for any new fcports discovered. */ 5594 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5595 if (new_fcport == NULL) { 5596 ql_log(ql_log_warn, vha, 0x209d, 5597 "Failed to allocate memory for fcport.\n"); 5598 return (QLA_MEMORY_ALLOC_FAILED); 5599 } 5600 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5601 /* Set start port ID scan at adapter ID. */ 5602 first_dev = 1; 5603 last_dev = 0; 5604 5605 /* Starting free loop ID. */ 5606 loop_id = ha->min_external_loopid; 5607 for (; loop_id <= ha->max_loop_id; loop_id++) { 5608 if (qla2x00_is_reserved_id(vha, loop_id)) 5609 continue; 5610 5611 if (ha->current_topology == ISP_CFG_FL && 5612 (atomic_read(&vha->loop_down_timer) || 5613 LOOP_TRANSITION(vha))) { 5614 atomic_set(&vha->loop_down_timer, 0); 5615 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5616 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5617 break; 5618 } 5619 5620 if (swl != NULL) { 5621 if (last_dev) { 5622 wrap.b24 = new_fcport->d_id.b24; 5623 } else { 5624 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5625 memcpy(new_fcport->node_name, 5626 swl[swl_idx].node_name, WWN_SIZE); 5627 memcpy(new_fcport->port_name, 5628 swl[swl_idx].port_name, WWN_SIZE); 5629 memcpy(new_fcport->fabric_port_name, 5630 swl[swl_idx].fabric_port_name, WWN_SIZE); 5631 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5632 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5633 5634 new_fcport->nvme_flag = 0; 5635 new_fcport->fc4f_nvme = 0; 5636 if (vha->flags.nvme_enabled && 5637 swl[swl_idx].fc4f_nvme) { 5638 new_fcport->fc4f_nvme = 5639 swl[swl_idx].fc4f_nvme; 5640 ql_log(ql_log_info, vha, 0x2131, 5641 "FOUND: NVME port %8phC as FC Type 28h\n", 5642 new_fcport->port_name); 5643 } 5644 5645 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5646 last_dev = 1; 5647 } 5648 swl_idx++; 5649 } 5650 } else { 5651 /* Send GA_NXT to the switch */ 5652 rval = qla2x00_ga_nxt(vha, new_fcport); 5653 if (rval != QLA_SUCCESS) { 5654 ql_log(ql_log_warn, vha, 0x209e, 5655 "SNS scan failed -- assuming " 5656 "zero-entry result.\n"); 5657 rval = QLA_SUCCESS; 5658 break; 5659 } 5660 } 5661 5662 /* If wrap on switch device list, exit. */ 5663 if (first_dev) { 5664 wrap.b24 = new_fcport->d_id.b24; 5665 first_dev = 0; 5666 } else if (new_fcport->d_id.b24 == wrap.b24) { 5667 ql_dbg(ql_dbg_disc, vha, 0x209f, 5668 "Device wrap (%02x%02x%02x).\n", 5669 new_fcport->d_id.b.domain, 5670 new_fcport->d_id.b.area, 5671 new_fcport->d_id.b.al_pa); 5672 break; 5673 } 5674 5675 /* Bypass if same physical adapter. */ 5676 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5677 continue; 5678 5679 /* Bypass virtual ports of the same host. */ 5680 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5681 continue; 5682 5683 /* Bypass if same domain and area of adapter. */ 5684 if (((new_fcport->d_id.b24 & 0xffff00) == 5685 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5686 ISP_CFG_FL) 5687 continue; 5688 5689 /* Bypass reserved domain fields. */ 5690 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5691 continue; 5692 5693 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5694 if (ql2xgffidenable && 5695 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5696 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5697 continue; 5698 5699 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5700 5701 /* Locate matching device in database. */ 5702 found = 0; 5703 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5704 if (memcmp(new_fcport->port_name, fcport->port_name, 5705 WWN_SIZE)) 5706 continue; 5707 5708 fcport->scan_state = QLA_FCPORT_FOUND; 5709 5710 found++; 5711 5712 /* Update port state. */ 5713 memcpy(fcport->fabric_port_name, 5714 new_fcport->fabric_port_name, WWN_SIZE); 5715 fcport->fp_speed = new_fcport->fp_speed; 5716 5717 /* 5718 * If address the same and state FCS_ONLINE 5719 * (or in target mode), nothing changed. 5720 */ 5721 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5722 (atomic_read(&fcport->state) == FCS_ONLINE || 5723 (vha->host->active_mode == MODE_TARGET))) { 5724 break; 5725 } 5726 5727 /* 5728 * If device was not a fabric device before. 5729 */ 5730 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5731 fcport->d_id.b24 = new_fcport->d_id.b24; 5732 qla2x00_clear_loop_id(fcport); 5733 fcport->flags |= (FCF_FABRIC_DEVICE | 5734 FCF_LOGIN_NEEDED); 5735 break; 5736 } 5737 5738 /* 5739 * Port ID changed or device was marked to be updated; 5740 * Log it out if still logged in and mark it for 5741 * relogin later. 5742 */ 5743 if (qla_tgt_mode_enabled(base_vha)) { 5744 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5745 "port changed FC ID, %8phC" 5746 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5747 fcport->port_name, 5748 fcport->d_id.b.domain, 5749 fcport->d_id.b.area, 5750 fcport->d_id.b.al_pa, 5751 fcport->loop_id, 5752 new_fcport->d_id.b.domain, 5753 new_fcport->d_id.b.area, 5754 new_fcport->d_id.b.al_pa); 5755 fcport->d_id.b24 = new_fcport->d_id.b24; 5756 break; 5757 } 5758 5759 fcport->d_id.b24 = new_fcport->d_id.b24; 5760 fcport->flags |= FCF_LOGIN_NEEDED; 5761 break; 5762 } 5763 5764 if (fcport->fc4f_nvme) { 5765 if (fcport->disc_state == DSC_DELETE_PEND) { 5766 fcport->disc_state = DSC_GNL; 5767 vha->fcport_count--; 5768 fcport->login_succ = 0; 5769 } 5770 } 5771 5772 if (found) { 5773 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5774 continue; 5775 } 5776 /* If device was not in our fcports list, then add it. */ 5777 new_fcport->scan_state = QLA_FCPORT_FOUND; 5778 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5779 5780 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5781 5782 5783 /* Allocate a new replacement fcport. */ 5784 nxt_d_id.b24 = new_fcport->d_id.b24; 5785 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5786 if (new_fcport == NULL) { 5787 ql_log(ql_log_warn, vha, 0xd032, 5788 "Memory allocation failed for fcport.\n"); 5789 return (QLA_MEMORY_ALLOC_FAILED); 5790 } 5791 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5792 new_fcport->d_id.b24 = nxt_d_id.b24; 5793 } 5794 5795 qla2x00_free_fcport(new_fcport); 5796 5797 /* 5798 * Logout all previous fabric dev marked lost, except FCP2 devices. 5799 */ 5800 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5801 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5802 break; 5803 5804 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5805 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5806 continue; 5807 5808 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5809 if ((qla_dual_mode_enabled(vha) || 5810 qla_ini_mode_enabled(vha)) && 5811 atomic_read(&fcport->state) == FCS_ONLINE) { 5812 qla2x00_mark_device_lost(vha, fcport, 5813 ql2xplogiabsentdevice, 0); 5814 if (fcport->loop_id != FC_NO_LOOP_ID && 5815 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5816 fcport->port_type != FCT_INITIATOR && 5817 fcport->port_type != FCT_BROADCAST) { 5818 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5819 "%s %d %8phC post del sess\n", 5820 __func__, __LINE__, 5821 fcport->port_name); 5822 qlt_schedule_sess_for_deletion(fcport); 5823 continue; 5824 } 5825 } 5826 } 5827 5828 if (fcport->scan_state == QLA_FCPORT_FOUND) 5829 qla24xx_fcport_handle_login(vha, fcport); 5830 } 5831 return (rval); 5832 } 5833 5834 /* 5835 * qla2x00_find_new_loop_id 5836 * Scan through our port list and find a new usable loop ID. 5837 * 5838 * Input: 5839 * ha: adapter state pointer. 5840 * dev: port structure pointer. 5841 * 5842 * Returns: 5843 * qla2x00 local function return status code. 5844 * 5845 * Context: 5846 * Kernel context. 5847 */ 5848 int 5849 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5850 { 5851 int rval; 5852 struct qla_hw_data *ha = vha->hw; 5853 unsigned long flags = 0; 5854 5855 rval = QLA_SUCCESS; 5856 5857 spin_lock_irqsave(&ha->vport_slock, flags); 5858 5859 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5860 LOOPID_MAP_SIZE); 5861 if (dev->loop_id >= LOOPID_MAP_SIZE || 5862 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5863 dev->loop_id = FC_NO_LOOP_ID; 5864 rval = QLA_FUNCTION_FAILED; 5865 } else 5866 set_bit(dev->loop_id, ha->loop_id_map); 5867 5868 spin_unlock_irqrestore(&ha->vport_slock, flags); 5869 5870 if (rval == QLA_SUCCESS) 5871 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5872 "Assigning new loopid=%x, portid=%x.\n", 5873 dev->loop_id, dev->d_id.b24); 5874 else 5875 ql_log(ql_log_warn, dev->vha, 0x2087, 5876 "No loop_id's available, portid=%x.\n", 5877 dev->d_id.b24); 5878 5879 return (rval); 5880 } 5881 5882 5883 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 5884 int 5885 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 5886 { 5887 int loop_id = FC_NO_LOOP_ID; 5888 int lid = NPH_MGMT_SERVER - vha->vp_idx; 5889 unsigned long flags; 5890 struct qla_hw_data *ha = vha->hw; 5891 5892 if (vha->vp_idx == 0) { 5893 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 5894 return NPH_MGMT_SERVER; 5895 } 5896 5897 /* pick id from high and work down to low */ 5898 spin_lock_irqsave(&ha->vport_slock, flags); 5899 for (; lid > 0; lid--) { 5900 if (!test_bit(lid, vha->hw->loop_id_map)) { 5901 set_bit(lid, vha->hw->loop_id_map); 5902 loop_id = lid; 5903 break; 5904 } 5905 } 5906 spin_unlock_irqrestore(&ha->vport_slock, flags); 5907 5908 return loop_id; 5909 } 5910 5911 /* 5912 * qla2x00_fabric_login 5913 * Issue fabric login command. 5914 * 5915 * Input: 5916 * ha = adapter block pointer. 5917 * device = pointer to FC device type structure. 5918 * 5919 * Returns: 5920 * 0 - Login successfully 5921 * 1 - Login failed 5922 * 2 - Initiator device 5923 * 3 - Fatal error 5924 */ 5925 int 5926 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5927 uint16_t *next_loopid) 5928 { 5929 int rval; 5930 int retry; 5931 uint16_t tmp_loopid; 5932 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5933 struct qla_hw_data *ha = vha->hw; 5934 5935 retry = 0; 5936 tmp_loopid = 0; 5937 5938 for (;;) { 5939 ql_dbg(ql_dbg_disc, vha, 0x2000, 5940 "Trying Fabric Login w/loop id 0x%04x for port " 5941 "%02x%02x%02x.\n", 5942 fcport->loop_id, fcport->d_id.b.domain, 5943 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5944 5945 /* Login fcport on switch. */ 5946 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5947 fcport->d_id.b.domain, fcport->d_id.b.area, 5948 fcport->d_id.b.al_pa, mb, BIT_0); 5949 if (rval != QLA_SUCCESS) { 5950 return rval; 5951 } 5952 if (mb[0] == MBS_PORT_ID_USED) { 5953 /* 5954 * Device has another loop ID. The firmware team 5955 * recommends the driver perform an implicit login with 5956 * the specified ID again. The ID we just used is save 5957 * here so we return with an ID that can be tried by 5958 * the next login. 5959 */ 5960 retry++; 5961 tmp_loopid = fcport->loop_id; 5962 fcport->loop_id = mb[1]; 5963 5964 ql_dbg(ql_dbg_disc, vha, 0x2001, 5965 "Fabric Login: port in use - next loop " 5966 "id=0x%04x, port id= %02x%02x%02x.\n", 5967 fcport->loop_id, fcport->d_id.b.domain, 5968 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5969 5970 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5971 /* 5972 * Login succeeded. 5973 */ 5974 if (retry) { 5975 /* A retry occurred before. */ 5976 *next_loopid = tmp_loopid; 5977 } else { 5978 /* 5979 * No retry occurred before. Just increment the 5980 * ID value for next login. 5981 */ 5982 *next_loopid = (fcport->loop_id + 1); 5983 } 5984 5985 if (mb[1] & BIT_0) { 5986 fcport->port_type = FCT_INITIATOR; 5987 } else { 5988 fcport->port_type = FCT_TARGET; 5989 if (mb[1] & BIT_1) { 5990 fcport->flags |= FCF_FCP2_DEVICE; 5991 } 5992 } 5993 5994 if (mb[10] & BIT_0) 5995 fcport->supported_classes |= FC_COS_CLASS2; 5996 if (mb[10] & BIT_1) 5997 fcport->supported_classes |= FC_COS_CLASS3; 5998 5999 if (IS_FWI2_CAPABLE(ha)) { 6000 if (mb[10] & BIT_7) 6001 fcport->flags |= 6002 FCF_CONF_COMP_SUPPORTED; 6003 } 6004 6005 rval = QLA_SUCCESS; 6006 break; 6007 } else if (mb[0] == MBS_LOOP_ID_USED) { 6008 /* 6009 * Loop ID already used, try next loop ID. 6010 */ 6011 fcport->loop_id++; 6012 rval = qla2x00_find_new_loop_id(vha, fcport); 6013 if (rval != QLA_SUCCESS) { 6014 /* Ran out of loop IDs to use */ 6015 break; 6016 } 6017 } else if (mb[0] == MBS_COMMAND_ERROR) { 6018 /* 6019 * Firmware possibly timed out during login. If NO 6020 * retries are left to do then the device is declared 6021 * dead. 6022 */ 6023 *next_loopid = fcport->loop_id; 6024 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6025 fcport->d_id.b.domain, fcport->d_id.b.area, 6026 fcport->d_id.b.al_pa); 6027 qla2x00_mark_device_lost(vha, fcport, 1, 0); 6028 6029 rval = 1; 6030 break; 6031 } else { 6032 /* 6033 * unrecoverable / not handled error 6034 */ 6035 ql_dbg(ql_dbg_disc, vha, 0x2002, 6036 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6037 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6038 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6039 fcport->loop_id, jiffies); 6040 6041 *next_loopid = fcport->loop_id; 6042 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6043 fcport->d_id.b.domain, fcport->d_id.b.area, 6044 fcport->d_id.b.al_pa); 6045 qla2x00_clear_loop_id(fcport); 6046 fcport->login_retry = 0; 6047 6048 rval = 3; 6049 break; 6050 } 6051 } 6052 6053 return (rval); 6054 } 6055 6056 /* 6057 * qla2x00_local_device_login 6058 * Issue local device login command. 6059 * 6060 * Input: 6061 * ha = adapter block pointer. 6062 * loop_id = loop id of device to login to. 6063 * 6064 * Returns (Where's the #define!!!!): 6065 * 0 - Login successfully 6066 * 1 - Login failed 6067 * 3 - Fatal error 6068 */ 6069 int 6070 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6071 { 6072 int rval; 6073 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6074 6075 memset(mb, 0, sizeof(mb)); 6076 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6077 if (rval == QLA_SUCCESS) { 6078 /* Interrogate mailbox registers for any errors */ 6079 if (mb[0] == MBS_COMMAND_ERROR) 6080 rval = 1; 6081 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6082 /* device not in PCB table */ 6083 rval = 3; 6084 } 6085 6086 return (rval); 6087 } 6088 6089 /* 6090 * qla2x00_loop_resync 6091 * Resync with fibre channel devices. 6092 * 6093 * Input: 6094 * ha = adapter block pointer. 6095 * 6096 * Returns: 6097 * 0 = success 6098 */ 6099 int 6100 qla2x00_loop_resync(scsi_qla_host_t *vha) 6101 { 6102 int rval = QLA_SUCCESS; 6103 uint32_t wait_time; 6104 struct req_que *req; 6105 struct rsp_que *rsp; 6106 6107 req = vha->req; 6108 rsp = req->rsp; 6109 6110 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6111 if (vha->flags.online) { 6112 if (!(rval = qla2x00_fw_ready(vha))) { 6113 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6114 wait_time = 256; 6115 do { 6116 if (!IS_QLAFX00(vha->hw)) { 6117 /* 6118 * Issue a marker after FW becomes 6119 * ready. 6120 */ 6121 qla2x00_marker(vha, req, rsp, 0, 0, 6122 MK_SYNC_ALL); 6123 vha->marker_needed = 0; 6124 } 6125 6126 /* Remap devices on Loop. */ 6127 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6128 6129 if (IS_QLAFX00(vha->hw)) 6130 qlafx00_configure_devices(vha); 6131 else 6132 qla2x00_configure_loop(vha); 6133 6134 wait_time--; 6135 } while (!atomic_read(&vha->loop_down_timer) && 6136 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6137 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6138 &vha->dpc_flags))); 6139 } 6140 } 6141 6142 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6143 return (QLA_FUNCTION_FAILED); 6144 6145 if (rval) 6146 ql_dbg(ql_dbg_disc, vha, 0x206c, 6147 "%s *** FAILED ***.\n", __func__); 6148 6149 return (rval); 6150 } 6151 6152 /* 6153 * qla2x00_perform_loop_resync 6154 * Description: This function will set the appropriate flags and call 6155 * qla2x00_loop_resync. If successful loop will be resynced 6156 * Arguments : scsi_qla_host_t pointer 6157 * returm : Success or Failure 6158 */ 6159 6160 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6161 { 6162 int32_t rval = 0; 6163 6164 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6165 /*Configure the flags so that resync happens properly*/ 6166 atomic_set(&ha->loop_down_timer, 0); 6167 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6168 atomic_set(&ha->loop_state, LOOP_UP); 6169 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6170 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6171 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6172 6173 rval = qla2x00_loop_resync(ha); 6174 } else 6175 atomic_set(&ha->loop_state, LOOP_DEAD); 6176 6177 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6178 } 6179 6180 return rval; 6181 } 6182 6183 void 6184 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6185 { 6186 fc_port_t *fcport; 6187 struct scsi_qla_host *vha; 6188 struct qla_hw_data *ha = base_vha->hw; 6189 unsigned long flags; 6190 6191 spin_lock_irqsave(&ha->vport_slock, flags); 6192 /* Go with deferred removal of rport references. */ 6193 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6194 atomic_inc(&vha->vref_count); 6195 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6196 if (fcport->drport && 6197 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6198 spin_unlock_irqrestore(&ha->vport_slock, flags); 6199 qla2x00_rport_del(fcport); 6200 6201 spin_lock_irqsave(&ha->vport_slock, flags); 6202 } 6203 } 6204 atomic_dec(&vha->vref_count); 6205 wake_up(&vha->vref_waitq); 6206 } 6207 spin_unlock_irqrestore(&ha->vport_slock, flags); 6208 } 6209 6210 /* Assumes idc_lock always held on entry */ 6211 void 6212 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6213 { 6214 struct qla_hw_data *ha = vha->hw; 6215 uint32_t drv_presence, drv_presence_mask; 6216 uint32_t dev_part_info1, dev_part_info2, class_type; 6217 uint32_t class_type_mask = 0x3; 6218 uint16_t fcoe_other_function = 0xffff, i; 6219 6220 if (IS_QLA8044(ha)) { 6221 drv_presence = qla8044_rd_direct(vha, 6222 QLA8044_CRB_DRV_ACTIVE_INDEX); 6223 dev_part_info1 = qla8044_rd_direct(vha, 6224 QLA8044_CRB_DEV_PART_INFO_INDEX); 6225 dev_part_info2 = qla8044_rd_direct(vha, 6226 QLA8044_CRB_DEV_PART_INFO2); 6227 } else { 6228 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6229 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6230 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6231 } 6232 for (i = 0; i < 8; i++) { 6233 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6234 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6235 (i != ha->portnum)) { 6236 fcoe_other_function = i; 6237 break; 6238 } 6239 } 6240 if (fcoe_other_function == 0xffff) { 6241 for (i = 0; i < 8; i++) { 6242 class_type = ((dev_part_info2 >> (i * 4)) & 6243 class_type_mask); 6244 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6245 ((i + 8) != ha->portnum)) { 6246 fcoe_other_function = i + 8; 6247 break; 6248 } 6249 } 6250 } 6251 /* 6252 * Prepare drv-presence mask based on fcoe functions present. 6253 * However consider only valid physical fcoe function numbers (0-15). 6254 */ 6255 drv_presence_mask = ~((1 << (ha->portnum)) | 6256 ((fcoe_other_function == 0xffff) ? 6257 0 : (1 << (fcoe_other_function)))); 6258 6259 /* We are the reset owner iff: 6260 * - No other protocol drivers present. 6261 * - This is the lowest among fcoe functions. */ 6262 if (!(drv_presence & drv_presence_mask) && 6263 (ha->portnum < fcoe_other_function)) { 6264 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6265 "This host is Reset owner.\n"); 6266 ha->flags.nic_core_reset_owner = 1; 6267 } 6268 } 6269 6270 static int 6271 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6272 { 6273 int rval = QLA_SUCCESS; 6274 struct qla_hw_data *ha = vha->hw; 6275 uint32_t drv_ack; 6276 6277 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6278 if (rval == QLA_SUCCESS) { 6279 drv_ack |= (1 << ha->portnum); 6280 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6281 } 6282 6283 return rval; 6284 } 6285 6286 static int 6287 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6288 { 6289 int rval = QLA_SUCCESS; 6290 struct qla_hw_data *ha = vha->hw; 6291 uint32_t drv_ack; 6292 6293 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6294 if (rval == QLA_SUCCESS) { 6295 drv_ack &= ~(1 << ha->portnum); 6296 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6297 } 6298 6299 return rval; 6300 } 6301 6302 static const char * 6303 qla83xx_dev_state_to_string(uint32_t dev_state) 6304 { 6305 switch (dev_state) { 6306 case QLA8XXX_DEV_COLD: 6307 return "COLD/RE-INIT"; 6308 case QLA8XXX_DEV_INITIALIZING: 6309 return "INITIALIZING"; 6310 case QLA8XXX_DEV_READY: 6311 return "READY"; 6312 case QLA8XXX_DEV_NEED_RESET: 6313 return "NEED RESET"; 6314 case QLA8XXX_DEV_NEED_QUIESCENT: 6315 return "NEED QUIESCENT"; 6316 case QLA8XXX_DEV_FAILED: 6317 return "FAILED"; 6318 case QLA8XXX_DEV_QUIESCENT: 6319 return "QUIESCENT"; 6320 default: 6321 return "Unknown"; 6322 } 6323 } 6324 6325 /* Assumes idc-lock always held on entry */ 6326 void 6327 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6328 { 6329 struct qla_hw_data *ha = vha->hw; 6330 uint32_t idc_audit_reg = 0, duration_secs = 0; 6331 6332 switch (audit_type) { 6333 case IDC_AUDIT_TIMESTAMP: 6334 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6335 idc_audit_reg = (ha->portnum) | 6336 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6337 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6338 break; 6339 6340 case IDC_AUDIT_COMPLETION: 6341 duration_secs = ((jiffies_to_msecs(jiffies) - 6342 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6343 idc_audit_reg = (ha->portnum) | 6344 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6345 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6346 break; 6347 6348 default: 6349 ql_log(ql_log_warn, vha, 0xb078, 6350 "Invalid audit type specified.\n"); 6351 break; 6352 } 6353 } 6354 6355 /* Assumes idc_lock always held on entry */ 6356 static int 6357 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6358 { 6359 struct qla_hw_data *ha = vha->hw; 6360 uint32_t idc_control, dev_state; 6361 6362 __qla83xx_get_idc_control(vha, &idc_control); 6363 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6364 ql_log(ql_log_info, vha, 0xb080, 6365 "NIC Core reset has been disabled. idc-control=0x%x\n", 6366 idc_control); 6367 return QLA_FUNCTION_FAILED; 6368 } 6369 6370 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6371 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6372 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6373 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6374 QLA8XXX_DEV_NEED_RESET); 6375 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6376 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6377 } else { 6378 const char *state = qla83xx_dev_state_to_string(dev_state); 6379 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6380 6381 /* SV: XXX: Is timeout required here? */ 6382 /* Wait for IDC state change READY -> NEED_RESET */ 6383 while (dev_state == QLA8XXX_DEV_READY) { 6384 qla83xx_idc_unlock(vha, 0); 6385 msleep(200); 6386 qla83xx_idc_lock(vha, 0); 6387 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6388 } 6389 } 6390 6391 /* Send IDC ack by writing to drv-ack register */ 6392 __qla83xx_set_drv_ack(vha); 6393 6394 return QLA_SUCCESS; 6395 } 6396 6397 int 6398 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6399 { 6400 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6401 } 6402 6403 int 6404 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6405 { 6406 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6407 } 6408 6409 static int 6410 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6411 { 6412 uint32_t drv_presence = 0; 6413 struct qla_hw_data *ha = vha->hw; 6414 6415 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6416 if (drv_presence & (1 << ha->portnum)) 6417 return QLA_SUCCESS; 6418 else 6419 return QLA_TEST_FAILED; 6420 } 6421 6422 int 6423 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6424 { 6425 int rval = QLA_SUCCESS; 6426 struct qla_hw_data *ha = vha->hw; 6427 6428 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6429 "Entered %s().\n", __func__); 6430 6431 if (vha->device_flags & DFLG_DEV_FAILED) { 6432 ql_log(ql_log_warn, vha, 0xb059, 6433 "Device in unrecoverable FAILED state.\n"); 6434 return QLA_FUNCTION_FAILED; 6435 } 6436 6437 qla83xx_idc_lock(vha, 0); 6438 6439 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6440 ql_log(ql_log_warn, vha, 0xb05a, 6441 "Function=0x%x has been removed from IDC participation.\n", 6442 ha->portnum); 6443 rval = QLA_FUNCTION_FAILED; 6444 goto exit; 6445 } 6446 6447 qla83xx_reset_ownership(vha); 6448 6449 rval = qla83xx_initiating_reset(vha); 6450 6451 /* 6452 * Perform reset if we are the reset-owner, 6453 * else wait till IDC state changes to READY/FAILED. 6454 */ 6455 if (rval == QLA_SUCCESS) { 6456 rval = qla83xx_idc_state_handler(vha); 6457 6458 if (rval == QLA_SUCCESS) 6459 ha->flags.nic_core_hung = 0; 6460 __qla83xx_clear_drv_ack(vha); 6461 } 6462 6463 exit: 6464 qla83xx_idc_unlock(vha, 0); 6465 6466 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6467 6468 return rval; 6469 } 6470 6471 int 6472 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6473 { 6474 struct qla_hw_data *ha = vha->hw; 6475 int rval = QLA_FUNCTION_FAILED; 6476 6477 if (!IS_MCTP_CAPABLE(ha)) { 6478 /* This message can be removed from the final version */ 6479 ql_log(ql_log_info, vha, 0x506d, 6480 "This board is not MCTP capable\n"); 6481 return rval; 6482 } 6483 6484 if (!ha->mctp_dump) { 6485 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6486 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6487 6488 if (!ha->mctp_dump) { 6489 ql_log(ql_log_warn, vha, 0x506e, 6490 "Failed to allocate memory for mctp dump\n"); 6491 return rval; 6492 } 6493 } 6494 6495 #define MCTP_DUMP_STR_ADDR 0x00000000 6496 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6497 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6498 if (rval != QLA_SUCCESS) { 6499 ql_log(ql_log_warn, vha, 0x506f, 6500 "Failed to capture mctp dump\n"); 6501 } else { 6502 ql_log(ql_log_info, vha, 0x5070, 6503 "Mctp dump capture for host (%ld/%p).\n", 6504 vha->host_no, ha->mctp_dump); 6505 ha->mctp_dumped = 1; 6506 } 6507 6508 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6509 ha->flags.nic_core_reset_hdlr_active = 1; 6510 rval = qla83xx_restart_nic_firmware(vha); 6511 if (rval) 6512 /* NIC Core reset failed. */ 6513 ql_log(ql_log_warn, vha, 0x5071, 6514 "Failed to restart nic firmware\n"); 6515 else 6516 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6517 "Restarted NIC firmware successfully.\n"); 6518 ha->flags.nic_core_reset_hdlr_active = 0; 6519 } 6520 6521 return rval; 6522 6523 } 6524 6525 /* 6526 * qla2x00_quiesce_io 6527 * Description: This function will block the new I/Os 6528 * Its not aborting any I/Os as context 6529 * is not destroyed during quiescence 6530 * Arguments: scsi_qla_host_t 6531 * return : void 6532 */ 6533 void 6534 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6535 { 6536 struct qla_hw_data *ha = vha->hw; 6537 struct scsi_qla_host *vp; 6538 6539 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6540 "Quiescing I/O - ha=%p.\n", ha); 6541 6542 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6543 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6544 atomic_set(&vha->loop_state, LOOP_DOWN); 6545 qla2x00_mark_all_devices_lost(vha, 0); 6546 list_for_each_entry(vp, &ha->vp_list, list) 6547 qla2x00_mark_all_devices_lost(vp, 0); 6548 } else { 6549 if (!atomic_read(&vha->loop_down_timer)) 6550 atomic_set(&vha->loop_down_timer, 6551 LOOP_DOWN_TIME); 6552 } 6553 /* Wait for pending cmds to complete */ 6554 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6555 } 6556 6557 void 6558 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6559 { 6560 struct qla_hw_data *ha = vha->hw; 6561 struct scsi_qla_host *vp; 6562 unsigned long flags; 6563 fc_port_t *fcport; 6564 u16 i; 6565 6566 /* For ISP82XX, driver waits for completion of the commands. 6567 * online flag should be set. 6568 */ 6569 if (!(IS_P3P_TYPE(ha))) 6570 vha->flags.online = 0; 6571 ha->flags.chip_reset_done = 0; 6572 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6573 vha->qla_stats.total_isp_aborts++; 6574 6575 ql_log(ql_log_info, vha, 0x00af, 6576 "Performing ISP error recovery - ha=%p.\n", ha); 6577 6578 ha->flags.purge_mbox = 1; 6579 /* For ISP82XX, reset_chip is just disabling interrupts. 6580 * Driver waits for the completion of the commands. 6581 * the interrupts need to be enabled. 6582 */ 6583 if (!(IS_P3P_TYPE(ha))) 6584 ha->isp_ops->reset_chip(vha); 6585 6586 ha->link_data_rate = PORT_SPEED_UNKNOWN; 6587 SAVE_TOPO(ha); 6588 ha->flags.rida_fmt2 = 0; 6589 ha->flags.n2n_ae = 0; 6590 ha->flags.lip_ae = 0; 6591 ha->current_topology = 0; 6592 ha->flags.fw_started = 0; 6593 ha->flags.fw_init_done = 0; 6594 ha->chip_reset++; 6595 ha->base_qpair->chip_reset = ha->chip_reset; 6596 for (i = 0; i < ha->max_qpairs; i++) { 6597 if (ha->queue_pair_map[i]) 6598 ha->queue_pair_map[i]->chip_reset = 6599 ha->base_qpair->chip_reset; 6600 } 6601 6602 /* purge MBox commands */ 6603 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6604 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6605 complete(&ha->mbx_intr_comp); 6606 } 6607 6608 i = 0; 6609 while (atomic_read(&ha->num_pend_mbx_stage3) || 6610 atomic_read(&ha->num_pend_mbx_stage2) || 6611 atomic_read(&ha->num_pend_mbx_stage1)) { 6612 msleep(20); 6613 i++; 6614 if (i > 50) 6615 break; 6616 } 6617 ha->flags.purge_mbox = 0; 6618 6619 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6620 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6621 atomic_set(&vha->loop_state, LOOP_DOWN); 6622 qla2x00_mark_all_devices_lost(vha, 0); 6623 6624 spin_lock_irqsave(&ha->vport_slock, flags); 6625 list_for_each_entry(vp, &ha->vp_list, list) { 6626 atomic_inc(&vp->vref_count); 6627 spin_unlock_irqrestore(&ha->vport_slock, flags); 6628 6629 qla2x00_mark_all_devices_lost(vp, 0); 6630 6631 spin_lock_irqsave(&ha->vport_slock, flags); 6632 atomic_dec(&vp->vref_count); 6633 } 6634 spin_unlock_irqrestore(&ha->vport_slock, flags); 6635 } else { 6636 if (!atomic_read(&vha->loop_down_timer)) 6637 atomic_set(&vha->loop_down_timer, 6638 LOOP_DOWN_TIME); 6639 } 6640 6641 /* Clear all async request states across all VPs. */ 6642 list_for_each_entry(fcport, &vha->vp_fcports, list) 6643 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6644 spin_lock_irqsave(&ha->vport_slock, flags); 6645 list_for_each_entry(vp, &ha->vp_list, list) { 6646 atomic_inc(&vp->vref_count); 6647 spin_unlock_irqrestore(&ha->vport_slock, flags); 6648 6649 list_for_each_entry(fcport, &vp->vp_fcports, list) 6650 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6651 6652 spin_lock_irqsave(&ha->vport_slock, flags); 6653 atomic_dec(&vp->vref_count); 6654 } 6655 spin_unlock_irqrestore(&ha->vport_slock, flags); 6656 6657 if (!ha->flags.eeh_busy) { 6658 /* Make sure for ISP 82XX IO DMA is complete */ 6659 if (IS_P3P_TYPE(ha)) { 6660 qla82xx_chip_reset_cleanup(vha); 6661 ql_log(ql_log_info, vha, 0x00b4, 6662 "Done chip reset cleanup.\n"); 6663 6664 /* Done waiting for pending commands. 6665 * Reset the online flag. 6666 */ 6667 vha->flags.online = 0; 6668 } 6669 6670 /* Requeue all commands in outstanding command list. */ 6671 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6672 } 6673 /* memory barrier */ 6674 wmb(); 6675 } 6676 6677 /* 6678 * qla2x00_abort_isp 6679 * Resets ISP and aborts all outstanding commands. 6680 * 6681 * Input: 6682 * ha = adapter block pointer. 6683 * 6684 * Returns: 6685 * 0 = success 6686 */ 6687 int 6688 qla2x00_abort_isp(scsi_qla_host_t *vha) 6689 { 6690 int rval; 6691 uint8_t status = 0; 6692 struct qla_hw_data *ha = vha->hw; 6693 struct scsi_qla_host *vp; 6694 struct req_que *req = ha->req_q_map[0]; 6695 unsigned long flags; 6696 6697 if (vha->flags.online) { 6698 qla2x00_abort_isp_cleanup(vha); 6699 6700 if (IS_QLA8031(ha)) { 6701 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6702 "Clearing fcoe driver presence.\n"); 6703 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6704 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6705 "Error while clearing DRV-Presence.\n"); 6706 } 6707 6708 if (unlikely(pci_channel_offline(ha->pdev) && 6709 ha->flags.pci_channel_io_perm_failure)) { 6710 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6711 status = 0; 6712 return status; 6713 } 6714 6715 switch (vha->qlini_mode) { 6716 case QLA2XXX_INI_MODE_DISABLED: 6717 if (!qla_tgt_mode_enabled(vha)) 6718 return 0; 6719 break; 6720 case QLA2XXX_INI_MODE_DUAL: 6721 if (!qla_dual_mode_enabled(vha)) 6722 return 0; 6723 break; 6724 case QLA2XXX_INI_MODE_ENABLED: 6725 default: 6726 break; 6727 } 6728 6729 ha->isp_ops->get_flash_version(vha, req->ring); 6730 6731 ha->isp_ops->nvram_config(vha); 6732 6733 if (!qla2x00_restart_isp(vha)) { 6734 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6735 6736 if (!atomic_read(&vha->loop_down_timer)) { 6737 /* 6738 * Issue marker command only when we are going 6739 * to start the I/O . 6740 */ 6741 vha->marker_needed = 1; 6742 } 6743 6744 vha->flags.online = 1; 6745 6746 ha->isp_ops->enable_intrs(ha); 6747 6748 ha->isp_abort_cnt = 0; 6749 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6750 6751 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6752 qla2x00_get_fw_version(vha); 6753 if (ha->fce) { 6754 ha->flags.fce_enabled = 1; 6755 memset(ha->fce, 0, 6756 fce_calc_size(ha->fce_bufs)); 6757 rval = qla2x00_enable_fce_trace(vha, 6758 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6759 &ha->fce_bufs); 6760 if (rval) { 6761 ql_log(ql_log_warn, vha, 0x8033, 6762 "Unable to reinitialize FCE " 6763 "(%d).\n", rval); 6764 ha->flags.fce_enabled = 0; 6765 } 6766 } 6767 6768 if (ha->eft) { 6769 memset(ha->eft, 0, EFT_SIZE); 6770 rval = qla2x00_enable_eft_trace(vha, 6771 ha->eft_dma, EFT_NUM_BUFFERS); 6772 if (rval) { 6773 ql_log(ql_log_warn, vha, 0x8034, 6774 "Unable to reinitialize EFT " 6775 "(%d).\n", rval); 6776 } 6777 } 6778 } else { /* failed the ISP abort */ 6779 vha->flags.online = 1; 6780 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6781 if (ha->isp_abort_cnt == 0) { 6782 ql_log(ql_log_fatal, vha, 0x8035, 6783 "ISP error recover failed - " 6784 "board disabled.\n"); 6785 /* 6786 * The next call disables the board 6787 * completely. 6788 */ 6789 qla2x00_abort_isp_cleanup(vha); 6790 vha->flags.online = 0; 6791 clear_bit(ISP_ABORT_RETRY, 6792 &vha->dpc_flags); 6793 status = 0; 6794 } else { /* schedule another ISP abort */ 6795 ha->isp_abort_cnt--; 6796 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6797 "ISP abort - retry remaining %d.\n", 6798 ha->isp_abort_cnt); 6799 status = 1; 6800 } 6801 } else { 6802 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6803 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6804 "ISP error recovery - retrying (%d) " 6805 "more times.\n", ha->isp_abort_cnt); 6806 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6807 status = 1; 6808 } 6809 } 6810 6811 } 6812 6813 if (!status) { 6814 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6815 qla2x00_configure_hba(vha); 6816 spin_lock_irqsave(&ha->vport_slock, flags); 6817 list_for_each_entry(vp, &ha->vp_list, list) { 6818 if (vp->vp_idx) { 6819 atomic_inc(&vp->vref_count); 6820 spin_unlock_irqrestore(&ha->vport_slock, flags); 6821 6822 qla2x00_vp_abort_isp(vp); 6823 6824 spin_lock_irqsave(&ha->vport_slock, flags); 6825 atomic_dec(&vp->vref_count); 6826 } 6827 } 6828 spin_unlock_irqrestore(&ha->vport_slock, flags); 6829 6830 if (IS_QLA8031(ha)) { 6831 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6832 "Setting back fcoe driver presence.\n"); 6833 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6834 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6835 "Error while setting DRV-Presence.\n"); 6836 } 6837 } else { 6838 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6839 __func__); 6840 } 6841 6842 return(status); 6843 } 6844 6845 /* 6846 * qla2x00_restart_isp 6847 * restarts the ISP after a reset 6848 * 6849 * Input: 6850 * ha = adapter block pointer. 6851 * 6852 * Returns: 6853 * 0 = success 6854 */ 6855 static int 6856 qla2x00_restart_isp(scsi_qla_host_t *vha) 6857 { 6858 int status = 0; 6859 struct qla_hw_data *ha = vha->hw; 6860 struct req_que *req = ha->req_q_map[0]; 6861 struct rsp_que *rsp = ha->rsp_q_map[0]; 6862 6863 /* If firmware needs to be loaded */ 6864 if (qla2x00_isp_firmware(vha)) { 6865 vha->flags.online = 0; 6866 status = ha->isp_ops->chip_diag(vha); 6867 if (!status) 6868 status = qla2x00_setup_chip(vha); 6869 } 6870 6871 if (!status && !(status = qla2x00_init_rings(vha))) { 6872 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6873 ha->flags.chip_reset_done = 1; 6874 6875 /* Initialize the queues in use */ 6876 qla25xx_init_queues(ha); 6877 6878 status = qla2x00_fw_ready(vha); 6879 if (!status) { 6880 /* Issue a marker after FW becomes ready. */ 6881 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6882 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6883 } 6884 6885 /* if no cable then assume it's good */ 6886 if ((vha->device_flags & DFLG_NO_CABLE)) 6887 status = 0; 6888 } 6889 return (status); 6890 } 6891 6892 static int 6893 qla25xx_init_queues(struct qla_hw_data *ha) 6894 { 6895 struct rsp_que *rsp = NULL; 6896 struct req_que *req = NULL; 6897 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6898 int ret = -1; 6899 int i; 6900 6901 for (i = 1; i < ha->max_rsp_queues; i++) { 6902 rsp = ha->rsp_q_map[i]; 6903 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6904 rsp->options &= ~BIT_0; 6905 ret = qla25xx_init_rsp_que(base_vha, rsp); 6906 if (ret != QLA_SUCCESS) 6907 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6908 "%s Rsp que: %d init failed.\n", 6909 __func__, rsp->id); 6910 else 6911 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6912 "%s Rsp que: %d inited.\n", 6913 __func__, rsp->id); 6914 } 6915 } 6916 for (i = 1; i < ha->max_req_queues; i++) { 6917 req = ha->req_q_map[i]; 6918 if (req && test_bit(i, ha->req_qid_map)) { 6919 /* Clear outstanding commands array. */ 6920 req->options &= ~BIT_0; 6921 ret = qla25xx_init_req_que(base_vha, req); 6922 if (ret != QLA_SUCCESS) 6923 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6924 "%s Req que: %d init failed.\n", 6925 __func__, req->id); 6926 else 6927 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6928 "%s Req que: %d inited.\n", 6929 __func__, req->id); 6930 } 6931 } 6932 return ret; 6933 } 6934 6935 /* 6936 * qla2x00_reset_adapter 6937 * Reset adapter. 6938 * 6939 * Input: 6940 * ha = adapter block pointer. 6941 */ 6942 void 6943 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6944 { 6945 unsigned long flags = 0; 6946 struct qla_hw_data *ha = vha->hw; 6947 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6948 6949 vha->flags.online = 0; 6950 ha->isp_ops->disable_intrs(ha); 6951 6952 spin_lock_irqsave(&ha->hardware_lock, flags); 6953 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6954 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6955 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6956 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6957 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6958 } 6959 6960 void 6961 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6962 { 6963 unsigned long flags = 0; 6964 struct qla_hw_data *ha = vha->hw; 6965 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6966 6967 if (IS_P3P_TYPE(ha)) 6968 return; 6969 6970 vha->flags.online = 0; 6971 ha->isp_ops->disable_intrs(ha); 6972 6973 spin_lock_irqsave(&ha->hardware_lock, flags); 6974 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6975 RD_REG_DWORD(®->hccr); 6976 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6977 RD_REG_DWORD(®->hccr); 6978 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6979 6980 if (IS_NOPOLLING_TYPE(ha)) 6981 ha->isp_ops->enable_intrs(ha); 6982 } 6983 6984 /* On sparc systems, obtain port and node WWN from firmware 6985 * properties. 6986 */ 6987 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6988 struct nvram_24xx *nv) 6989 { 6990 #ifdef CONFIG_SPARC 6991 struct qla_hw_data *ha = vha->hw; 6992 struct pci_dev *pdev = ha->pdev; 6993 struct device_node *dp = pci_device_to_OF_node(pdev); 6994 const u8 *val; 6995 int len; 6996 6997 val = of_get_property(dp, "port-wwn", &len); 6998 if (val && len >= WWN_SIZE) 6999 memcpy(nv->port_name, val, WWN_SIZE); 7000 7001 val = of_get_property(dp, "node-wwn", &len); 7002 if (val && len >= WWN_SIZE) 7003 memcpy(nv->node_name, val, WWN_SIZE); 7004 #endif 7005 } 7006 7007 int 7008 qla24xx_nvram_config(scsi_qla_host_t *vha) 7009 { 7010 int rval; 7011 struct init_cb_24xx *icb; 7012 struct nvram_24xx *nv; 7013 uint32_t *dptr; 7014 uint8_t *dptr1, *dptr2; 7015 uint32_t chksum; 7016 uint16_t cnt; 7017 struct qla_hw_data *ha = vha->hw; 7018 7019 rval = QLA_SUCCESS; 7020 icb = (struct init_cb_24xx *)ha->init_cb; 7021 nv = ha->nvram; 7022 7023 /* Determine NVRAM starting address. */ 7024 if (ha->port_no == 0) { 7025 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7026 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7027 } else { 7028 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7029 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7030 } 7031 7032 ha->nvram_size = sizeof(struct nvram_24xx); 7033 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7034 7035 /* Get VPD data into cache */ 7036 ha->vpd = ha->nvram + VPD_OFFSET; 7037 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 7038 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7039 7040 /* Get NVRAM data into cache and calculate checksum. */ 7041 dptr = (uint32_t *)nv; 7042 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 7043 ha->nvram_size); 7044 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7045 chksum += le32_to_cpu(*dptr); 7046 7047 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7048 "Contents of NVRAM\n"); 7049 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7050 (uint8_t *)nv, ha->nvram_size); 7051 7052 /* Bad NVRAM data, set defaults parameters. */ 7053 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7054 || nv->id[3] != ' ' || 7055 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7056 /* Reset NVRAM data. */ 7057 ql_log(ql_log_warn, vha, 0x006b, 7058 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 7059 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 7060 ql_log(ql_log_warn, vha, 0x006c, 7061 "Falling back to functioning (yet invalid -- WWPN) " 7062 "defaults.\n"); 7063 7064 /* 7065 * Set default initialization control block. 7066 */ 7067 memset(nv, 0, ha->nvram_size); 7068 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7069 nv->version = cpu_to_le16(ICB_VERSION); 7070 nv->frame_payload_size = 2048; 7071 nv->execution_throttle = cpu_to_le16(0xFFFF); 7072 nv->exchange_count = cpu_to_le16(0); 7073 nv->hard_address = cpu_to_le16(124); 7074 nv->port_name[0] = 0x21; 7075 nv->port_name[1] = 0x00 + ha->port_no + 1; 7076 nv->port_name[2] = 0x00; 7077 nv->port_name[3] = 0xe0; 7078 nv->port_name[4] = 0x8b; 7079 nv->port_name[5] = 0x1c; 7080 nv->port_name[6] = 0x55; 7081 nv->port_name[7] = 0x86; 7082 nv->node_name[0] = 0x20; 7083 nv->node_name[1] = 0x00; 7084 nv->node_name[2] = 0x00; 7085 nv->node_name[3] = 0xe0; 7086 nv->node_name[4] = 0x8b; 7087 nv->node_name[5] = 0x1c; 7088 nv->node_name[6] = 0x55; 7089 nv->node_name[7] = 0x86; 7090 qla24xx_nvram_wwn_from_ofw(vha, nv); 7091 nv->login_retry_count = cpu_to_le16(8); 7092 nv->interrupt_delay_timer = cpu_to_le16(0); 7093 nv->login_timeout = cpu_to_le16(0); 7094 nv->firmware_options_1 = 7095 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7096 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7097 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7098 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7099 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7100 nv->efi_parameters = cpu_to_le32(0); 7101 nv->reset_delay = 5; 7102 nv->max_luns_per_target = cpu_to_le16(128); 7103 nv->port_down_retry_count = cpu_to_le16(30); 7104 nv->link_down_timeout = cpu_to_le16(30); 7105 7106 rval = 1; 7107 } 7108 7109 if (qla_tgt_mode_enabled(vha)) { 7110 /* Don't enable full login after initial LIP */ 7111 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7112 /* Don't enable LIP full login for initiator */ 7113 nv->host_p &= cpu_to_le32(~BIT_10); 7114 } 7115 7116 qlt_24xx_config_nvram_stage1(vha, nv); 7117 7118 /* Reset Initialization control block */ 7119 memset(icb, 0, ha->init_cb_size); 7120 7121 /* Copy 1st segment. */ 7122 dptr1 = (uint8_t *)icb; 7123 dptr2 = (uint8_t *)&nv->version; 7124 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7125 while (cnt--) 7126 *dptr1++ = *dptr2++; 7127 7128 icb->login_retry_count = nv->login_retry_count; 7129 icb->link_down_on_nos = nv->link_down_on_nos; 7130 7131 /* Copy 2nd segment. */ 7132 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7133 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7134 cnt = (uint8_t *)&icb->reserved_3 - 7135 (uint8_t *)&icb->interrupt_delay_timer; 7136 while (cnt--) 7137 *dptr1++ = *dptr2++; 7138 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7139 /* 7140 * Setup driver NVRAM options. 7141 */ 7142 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7143 "QLA2462"); 7144 7145 qlt_24xx_config_nvram_stage2(vha, icb); 7146 7147 if (nv->host_p & cpu_to_le32(BIT_15)) { 7148 /* Use alternate WWN? */ 7149 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7150 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7151 } 7152 7153 /* Prepare nodename */ 7154 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7155 /* 7156 * Firmware will apply the following mask if the nodename was 7157 * not provided. 7158 */ 7159 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7160 icb->node_name[0] &= 0xF0; 7161 } 7162 7163 /* Set host adapter parameters. */ 7164 ha->flags.disable_risc_code_load = 0; 7165 ha->flags.enable_lip_reset = 0; 7166 ha->flags.enable_lip_full_login = 7167 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7168 ha->flags.enable_target_reset = 7169 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7170 ha->flags.enable_led_scheme = 0; 7171 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7172 7173 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7174 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7175 7176 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7177 sizeof(ha->fw_seriallink_options24)); 7178 7179 /* save HBA serial number */ 7180 ha->serial0 = icb->port_name[5]; 7181 ha->serial1 = icb->port_name[6]; 7182 ha->serial2 = icb->port_name[7]; 7183 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7184 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7185 7186 icb->execution_throttle = cpu_to_le16(0xFFFF); 7187 7188 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7189 7190 /* Set minimum login_timeout to 4 seconds. */ 7191 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7192 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7193 if (le16_to_cpu(nv->login_timeout) < 4) 7194 nv->login_timeout = cpu_to_le16(4); 7195 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7196 7197 /* Set minimum RATOV to 100 tenths of a second. */ 7198 ha->r_a_tov = 100; 7199 7200 ha->loop_reset_delay = nv->reset_delay; 7201 7202 /* Link Down Timeout = 0: 7203 * 7204 * When Port Down timer expires we will start returning 7205 * I/O's to OS with "DID_NO_CONNECT". 7206 * 7207 * Link Down Timeout != 0: 7208 * 7209 * The driver waits for the link to come up after link down 7210 * before returning I/Os to OS with "DID_NO_CONNECT". 7211 */ 7212 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7213 ha->loop_down_abort_time = 7214 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7215 } else { 7216 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7217 ha->loop_down_abort_time = 7218 (LOOP_DOWN_TIME - ha->link_down_timeout); 7219 } 7220 7221 /* Need enough time to try and get the port back. */ 7222 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7223 if (qlport_down_retry) 7224 ha->port_down_retry_count = qlport_down_retry; 7225 7226 /* Set login_retry_count */ 7227 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7228 if (ha->port_down_retry_count == 7229 le16_to_cpu(nv->port_down_retry_count) && 7230 ha->port_down_retry_count > 3) 7231 ha->login_retry_count = ha->port_down_retry_count; 7232 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7233 ha->login_retry_count = ha->port_down_retry_count; 7234 if (ql2xloginretrycount) 7235 ha->login_retry_count = ql2xloginretrycount; 7236 7237 /* N2N: driver will initiate Login instead of FW */ 7238 icb->firmware_options_3 |= BIT_8; 7239 7240 /* Enable ZIO. */ 7241 if (!vha->flags.init_done) { 7242 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7243 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7244 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7245 le16_to_cpu(icb->interrupt_delay_timer): 2; 7246 } 7247 icb->firmware_options_2 &= cpu_to_le32( 7248 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7249 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7250 ha->zio_mode = QLA_ZIO_MODE_6; 7251 7252 ql_log(ql_log_info, vha, 0x006f, 7253 "ZIO mode %d enabled; timer delay (%d us).\n", 7254 ha->zio_mode, ha->zio_timer * 100); 7255 7256 icb->firmware_options_2 |= cpu_to_le32( 7257 (uint32_t)ha->zio_mode); 7258 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7259 } 7260 7261 if (rval) { 7262 ql_log(ql_log_warn, vha, 0x0070, 7263 "NVRAM configuration failed.\n"); 7264 } 7265 return (rval); 7266 } 7267 7268 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 7269 { 7270 struct qla27xx_image_status pri_image_status, sec_image_status; 7271 uint8_t valid_pri_image, valid_sec_image; 7272 uint32_t *wptr; 7273 uint32_t cnt, chksum, size; 7274 struct qla_hw_data *ha = vha->hw; 7275 7276 valid_pri_image = valid_sec_image = 1; 7277 ha->active_image = 0; 7278 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 7279 7280 if (!ha->flt_region_img_status_pri) { 7281 valid_pri_image = 0; 7282 goto check_sec_image; 7283 } 7284 7285 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 7286 ha->flt_region_img_status_pri, size); 7287 7288 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7289 ql_dbg(ql_dbg_init, vha, 0x018b, 7290 "Primary image signature (0x%x) not valid\n", 7291 pri_image_status.signature); 7292 valid_pri_image = 0; 7293 goto check_sec_image; 7294 } 7295 7296 wptr = (uint32_t *)(&pri_image_status); 7297 cnt = size; 7298 7299 for (chksum = 0; cnt--; wptr++) 7300 chksum += le32_to_cpu(*wptr); 7301 7302 if (chksum) { 7303 ql_dbg(ql_dbg_init, vha, 0x018c, 7304 "Checksum validation failed for primary image (0x%x)\n", 7305 chksum); 7306 valid_pri_image = 0; 7307 } 7308 7309 check_sec_image: 7310 if (!ha->flt_region_img_status_sec) { 7311 valid_sec_image = 0; 7312 goto check_valid_image; 7313 } 7314 7315 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7316 ha->flt_region_img_status_sec, size); 7317 7318 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7319 ql_dbg(ql_dbg_init, vha, 0x018d, 7320 "Secondary image signature(0x%x) not valid\n", 7321 sec_image_status.signature); 7322 valid_sec_image = 0; 7323 goto check_valid_image; 7324 } 7325 7326 wptr = (uint32_t *)(&sec_image_status); 7327 cnt = size; 7328 for (chksum = 0; cnt--; wptr++) 7329 chksum += le32_to_cpu(*wptr); 7330 if (chksum) { 7331 ql_dbg(ql_dbg_init, vha, 0x018e, 7332 "Checksum validation failed for secondary image (0x%x)\n", 7333 chksum); 7334 valid_sec_image = 0; 7335 } 7336 7337 check_valid_image: 7338 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7339 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7340 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7341 if (!ha->active_image || 7342 pri_image_status.generation_number < 7343 sec_image_status.generation_number) 7344 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7345 } 7346 7347 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n", 7348 ha->active_image == 0 ? "default bootld and fw" : 7349 ha->active_image == 1 ? "primary" : 7350 ha->active_image == 2 ? "secondary" : 7351 "Invalid"); 7352 7353 return ha->active_image; 7354 } 7355 7356 static int 7357 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7358 uint32_t faddr) 7359 { 7360 int rval = QLA_SUCCESS; 7361 int segments, fragment; 7362 uint32_t *dcode, dlen; 7363 uint32_t risc_addr; 7364 uint32_t risc_size; 7365 uint32_t i; 7366 struct qla_hw_data *ha = vha->hw; 7367 struct req_que *req = ha->req_q_map[0]; 7368 7369 ql_dbg(ql_dbg_init, vha, 0x008b, 7370 "FW: Loading firmware from flash (%x).\n", faddr); 7371 7372 rval = QLA_SUCCESS; 7373 7374 segments = FA_RISC_CODE_SEGMENTS; 7375 dcode = (uint32_t *)req->ring; 7376 *srisc_addr = 0; 7377 7378 if (IS_QLA27XX(ha) && 7379 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7380 faddr = ha->flt_region_fw_sec; 7381 7382 /* Validate firmware image by checking version. */ 7383 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7384 for (i = 0; i < 4; i++) 7385 dcode[i] = be32_to_cpu(dcode[i]); 7386 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7387 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7388 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7389 dcode[3] == 0)) { 7390 ql_log(ql_log_fatal, vha, 0x008c, 7391 "Unable to verify the integrity of flash firmware " 7392 "image.\n"); 7393 ql_log(ql_log_fatal, vha, 0x008d, 7394 "Firmware data: %08x %08x %08x %08x.\n", 7395 dcode[0], dcode[1], dcode[2], dcode[3]); 7396 7397 return QLA_FUNCTION_FAILED; 7398 } 7399 7400 while (segments && rval == QLA_SUCCESS) { 7401 /* Read segment's load information. */ 7402 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7403 7404 risc_addr = be32_to_cpu(dcode[2]); 7405 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7406 risc_size = be32_to_cpu(dcode[3]); 7407 7408 fragment = 0; 7409 while (risc_size > 0 && rval == QLA_SUCCESS) { 7410 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7411 if (dlen > risc_size) 7412 dlen = risc_size; 7413 7414 ql_dbg(ql_dbg_init, vha, 0x008e, 7415 "Loading risc segment@ risc addr %x " 7416 "number of dwords 0x%x offset 0x%x.\n", 7417 risc_addr, dlen, faddr); 7418 7419 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7420 for (i = 0; i < dlen; i++) 7421 dcode[i] = swab32(dcode[i]); 7422 7423 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7424 dlen); 7425 if (rval) { 7426 ql_log(ql_log_fatal, vha, 0x008f, 7427 "Failed to load segment %d of firmware.\n", 7428 fragment); 7429 return QLA_FUNCTION_FAILED; 7430 } 7431 7432 faddr += dlen; 7433 risc_addr += dlen; 7434 risc_size -= dlen; 7435 fragment++; 7436 } 7437 7438 /* Next segment. */ 7439 segments--; 7440 } 7441 7442 if (!IS_QLA27XX(ha)) 7443 return rval; 7444 7445 if (ha->fw_dump_template) 7446 vfree(ha->fw_dump_template); 7447 ha->fw_dump_template = NULL; 7448 ha->fw_dump_template_len = 0; 7449 7450 ql_dbg(ql_dbg_init, vha, 0x0161, 7451 "Loading fwdump template from %x\n", faddr); 7452 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7453 risc_size = be32_to_cpu(dcode[2]); 7454 ql_dbg(ql_dbg_init, vha, 0x0162, 7455 "-> array size %x dwords\n", risc_size); 7456 if (risc_size == 0 || risc_size == ~0) 7457 goto default_template; 7458 7459 dlen = (risc_size - 8) * sizeof(*dcode); 7460 ql_dbg(ql_dbg_init, vha, 0x0163, 7461 "-> template allocating %x bytes...\n", dlen); 7462 ha->fw_dump_template = vmalloc(dlen); 7463 if (!ha->fw_dump_template) { 7464 ql_log(ql_log_warn, vha, 0x0164, 7465 "Failed fwdump template allocate %x bytes.\n", risc_size); 7466 goto default_template; 7467 } 7468 7469 faddr += 7; 7470 risc_size -= 8; 7471 dcode = ha->fw_dump_template; 7472 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7473 for (i = 0; i < risc_size; i++) 7474 dcode[i] = le32_to_cpu(dcode[i]); 7475 7476 if (!qla27xx_fwdt_template_valid(dcode)) { 7477 ql_log(ql_log_warn, vha, 0x0165, 7478 "Failed fwdump template validate\n"); 7479 goto default_template; 7480 } 7481 7482 dlen = qla27xx_fwdt_template_size(dcode); 7483 ql_dbg(ql_dbg_init, vha, 0x0166, 7484 "-> template size %x bytes\n", dlen); 7485 if (dlen > risc_size * sizeof(*dcode)) { 7486 ql_log(ql_log_warn, vha, 0x0167, 7487 "Failed fwdump template exceeds array by %zx bytes\n", 7488 (size_t)(dlen - risc_size * sizeof(*dcode))); 7489 goto default_template; 7490 } 7491 ha->fw_dump_template_len = dlen; 7492 return rval; 7493 7494 default_template: 7495 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7496 if (ha->fw_dump_template) 7497 vfree(ha->fw_dump_template); 7498 ha->fw_dump_template = NULL; 7499 ha->fw_dump_template_len = 0; 7500 7501 dlen = qla27xx_fwdt_template_default_size(); 7502 ql_dbg(ql_dbg_init, vha, 0x0169, 7503 "-> template allocating %x bytes...\n", dlen); 7504 ha->fw_dump_template = vmalloc(dlen); 7505 if (!ha->fw_dump_template) { 7506 ql_log(ql_log_warn, vha, 0x016a, 7507 "Failed fwdump template allocate %x bytes.\n", risc_size); 7508 goto failed_template; 7509 } 7510 7511 dcode = ha->fw_dump_template; 7512 risc_size = dlen / sizeof(*dcode); 7513 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7514 for (i = 0; i < risc_size; i++) 7515 dcode[i] = be32_to_cpu(dcode[i]); 7516 7517 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7518 ql_log(ql_log_warn, vha, 0x016b, 7519 "Failed fwdump template validate\n"); 7520 goto failed_template; 7521 } 7522 7523 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7524 ql_dbg(ql_dbg_init, vha, 0x016c, 7525 "-> template size %x bytes\n", dlen); 7526 ha->fw_dump_template_len = dlen; 7527 return rval; 7528 7529 failed_template: 7530 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7531 if (ha->fw_dump_template) 7532 vfree(ha->fw_dump_template); 7533 ha->fw_dump_template = NULL; 7534 ha->fw_dump_template_len = 0; 7535 return rval; 7536 } 7537 7538 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7539 7540 int 7541 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7542 { 7543 int rval; 7544 int i, fragment; 7545 uint16_t *wcode, *fwcode; 7546 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7547 struct fw_blob *blob; 7548 struct qla_hw_data *ha = vha->hw; 7549 struct req_que *req = ha->req_q_map[0]; 7550 7551 /* Load firmware blob. */ 7552 blob = qla2x00_request_firmware(vha); 7553 if (!blob) { 7554 ql_log(ql_log_info, vha, 0x0083, 7555 "Firmware image unavailable.\n"); 7556 ql_log(ql_log_info, vha, 0x0084, 7557 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7558 return QLA_FUNCTION_FAILED; 7559 } 7560 7561 rval = QLA_SUCCESS; 7562 7563 wcode = (uint16_t *)req->ring; 7564 *srisc_addr = 0; 7565 fwcode = (uint16_t *)blob->fw->data; 7566 fwclen = 0; 7567 7568 /* Validate firmware image by checking version. */ 7569 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7570 ql_log(ql_log_fatal, vha, 0x0085, 7571 "Unable to verify integrity of firmware image (%zd).\n", 7572 blob->fw->size); 7573 goto fail_fw_integrity; 7574 } 7575 for (i = 0; i < 4; i++) 7576 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7577 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7578 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7579 wcode[2] == 0 && wcode[3] == 0)) { 7580 ql_log(ql_log_fatal, vha, 0x0086, 7581 "Unable to verify integrity of firmware image.\n"); 7582 ql_log(ql_log_fatal, vha, 0x0087, 7583 "Firmware data: %04x %04x %04x %04x.\n", 7584 wcode[0], wcode[1], wcode[2], wcode[3]); 7585 goto fail_fw_integrity; 7586 } 7587 7588 seg = blob->segs; 7589 while (*seg && rval == QLA_SUCCESS) { 7590 risc_addr = *seg; 7591 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7592 risc_size = be16_to_cpu(fwcode[3]); 7593 7594 /* Validate firmware image size. */ 7595 fwclen += risc_size * sizeof(uint16_t); 7596 if (blob->fw->size < fwclen) { 7597 ql_log(ql_log_fatal, vha, 0x0088, 7598 "Unable to verify integrity of firmware image " 7599 "(%zd).\n", blob->fw->size); 7600 goto fail_fw_integrity; 7601 } 7602 7603 fragment = 0; 7604 while (risc_size > 0 && rval == QLA_SUCCESS) { 7605 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7606 if (wlen > risc_size) 7607 wlen = risc_size; 7608 ql_dbg(ql_dbg_init, vha, 0x0089, 7609 "Loading risc segment@ risc addr %x number of " 7610 "words 0x%x.\n", risc_addr, wlen); 7611 7612 for (i = 0; i < wlen; i++) 7613 wcode[i] = swab16(fwcode[i]); 7614 7615 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7616 wlen); 7617 if (rval) { 7618 ql_log(ql_log_fatal, vha, 0x008a, 7619 "Failed to load segment %d of firmware.\n", 7620 fragment); 7621 break; 7622 } 7623 7624 fwcode += wlen; 7625 risc_addr += wlen; 7626 risc_size -= wlen; 7627 fragment++; 7628 } 7629 7630 /* Next segment. */ 7631 seg++; 7632 } 7633 return rval; 7634 7635 fail_fw_integrity: 7636 return QLA_FUNCTION_FAILED; 7637 } 7638 7639 static int 7640 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7641 { 7642 int rval; 7643 int segments, fragment; 7644 uint32_t *dcode, dlen; 7645 uint32_t risc_addr; 7646 uint32_t risc_size; 7647 uint32_t i; 7648 struct fw_blob *blob; 7649 const uint32_t *fwcode; 7650 uint32_t fwclen; 7651 struct qla_hw_data *ha = vha->hw; 7652 struct req_que *req = ha->req_q_map[0]; 7653 7654 /* Load firmware blob. */ 7655 blob = qla2x00_request_firmware(vha); 7656 if (!blob) { 7657 ql_log(ql_log_warn, vha, 0x0090, 7658 "Firmware image unavailable.\n"); 7659 ql_log(ql_log_warn, vha, 0x0091, 7660 "Firmware images can be retrieved from: " 7661 QLA_FW_URL ".\n"); 7662 7663 return QLA_FUNCTION_FAILED; 7664 } 7665 7666 ql_dbg(ql_dbg_init, vha, 0x0092, 7667 "FW: Loading via request-firmware.\n"); 7668 7669 rval = QLA_SUCCESS; 7670 7671 segments = FA_RISC_CODE_SEGMENTS; 7672 dcode = (uint32_t *)req->ring; 7673 *srisc_addr = 0; 7674 fwcode = (uint32_t *)blob->fw->data; 7675 fwclen = 0; 7676 7677 /* Validate firmware image by checking version. */ 7678 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7679 ql_log(ql_log_fatal, vha, 0x0093, 7680 "Unable to verify integrity of firmware image (%zd).\n", 7681 blob->fw->size); 7682 return QLA_FUNCTION_FAILED; 7683 } 7684 for (i = 0; i < 4; i++) 7685 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7686 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7687 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7688 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7689 dcode[3] == 0)) { 7690 ql_log(ql_log_fatal, vha, 0x0094, 7691 "Unable to verify integrity of firmware image (%zd).\n", 7692 blob->fw->size); 7693 ql_log(ql_log_fatal, vha, 0x0095, 7694 "Firmware data: %08x %08x %08x %08x.\n", 7695 dcode[0], dcode[1], dcode[2], dcode[3]); 7696 return QLA_FUNCTION_FAILED; 7697 } 7698 7699 while (segments && rval == QLA_SUCCESS) { 7700 risc_addr = be32_to_cpu(fwcode[2]); 7701 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7702 risc_size = be32_to_cpu(fwcode[3]); 7703 7704 /* Validate firmware image size. */ 7705 fwclen += risc_size * sizeof(uint32_t); 7706 if (blob->fw->size < fwclen) { 7707 ql_log(ql_log_fatal, vha, 0x0096, 7708 "Unable to verify integrity of firmware image " 7709 "(%zd).\n", blob->fw->size); 7710 return QLA_FUNCTION_FAILED; 7711 } 7712 7713 fragment = 0; 7714 while (risc_size > 0 && rval == QLA_SUCCESS) { 7715 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7716 if (dlen > risc_size) 7717 dlen = risc_size; 7718 7719 ql_dbg(ql_dbg_init, vha, 0x0097, 7720 "Loading risc segment@ risc addr %x " 7721 "number of dwords 0x%x.\n", risc_addr, dlen); 7722 7723 for (i = 0; i < dlen; i++) 7724 dcode[i] = swab32(fwcode[i]); 7725 7726 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7727 dlen); 7728 if (rval) { 7729 ql_log(ql_log_fatal, vha, 0x0098, 7730 "Failed to load segment %d of firmware.\n", 7731 fragment); 7732 return QLA_FUNCTION_FAILED; 7733 } 7734 7735 fwcode += dlen; 7736 risc_addr += dlen; 7737 risc_size -= dlen; 7738 fragment++; 7739 } 7740 7741 /* Next segment. */ 7742 segments--; 7743 } 7744 7745 if (!IS_QLA27XX(ha)) 7746 return rval; 7747 7748 if (ha->fw_dump_template) 7749 vfree(ha->fw_dump_template); 7750 ha->fw_dump_template = NULL; 7751 ha->fw_dump_template_len = 0; 7752 7753 ql_dbg(ql_dbg_init, vha, 0x171, 7754 "Loading fwdump template from %x\n", 7755 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7756 risc_size = be32_to_cpu(fwcode[2]); 7757 ql_dbg(ql_dbg_init, vha, 0x172, 7758 "-> array size %x dwords\n", risc_size); 7759 if (risc_size == 0 || risc_size == ~0) 7760 goto default_template; 7761 7762 dlen = (risc_size - 8) * sizeof(*fwcode); 7763 ql_dbg(ql_dbg_init, vha, 0x0173, 7764 "-> template allocating %x bytes...\n", dlen); 7765 ha->fw_dump_template = vmalloc(dlen); 7766 if (!ha->fw_dump_template) { 7767 ql_log(ql_log_warn, vha, 0x0174, 7768 "Failed fwdump template allocate %x bytes.\n", risc_size); 7769 goto default_template; 7770 } 7771 7772 fwcode += 7; 7773 risc_size -= 8; 7774 dcode = ha->fw_dump_template; 7775 for (i = 0; i < risc_size; i++) 7776 dcode[i] = le32_to_cpu(fwcode[i]); 7777 7778 if (!qla27xx_fwdt_template_valid(dcode)) { 7779 ql_log(ql_log_warn, vha, 0x0175, 7780 "Failed fwdump template validate\n"); 7781 goto default_template; 7782 } 7783 7784 dlen = qla27xx_fwdt_template_size(dcode); 7785 ql_dbg(ql_dbg_init, vha, 0x0176, 7786 "-> template size %x bytes\n", dlen); 7787 if (dlen > risc_size * sizeof(*fwcode)) { 7788 ql_log(ql_log_warn, vha, 0x0177, 7789 "Failed fwdump template exceeds array by %zx bytes\n", 7790 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7791 goto default_template; 7792 } 7793 ha->fw_dump_template_len = dlen; 7794 return rval; 7795 7796 default_template: 7797 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7798 if (ha->fw_dump_template) 7799 vfree(ha->fw_dump_template); 7800 ha->fw_dump_template = NULL; 7801 ha->fw_dump_template_len = 0; 7802 7803 dlen = qla27xx_fwdt_template_default_size(); 7804 ql_dbg(ql_dbg_init, vha, 0x0179, 7805 "-> template allocating %x bytes...\n", dlen); 7806 ha->fw_dump_template = vmalloc(dlen); 7807 if (!ha->fw_dump_template) { 7808 ql_log(ql_log_warn, vha, 0x017a, 7809 "Failed fwdump template allocate %x bytes.\n", risc_size); 7810 goto failed_template; 7811 } 7812 7813 dcode = ha->fw_dump_template; 7814 risc_size = dlen / sizeof(*fwcode); 7815 fwcode = qla27xx_fwdt_template_default(); 7816 for (i = 0; i < risc_size; i++) 7817 dcode[i] = be32_to_cpu(fwcode[i]); 7818 7819 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7820 ql_log(ql_log_warn, vha, 0x017b, 7821 "Failed fwdump template validate\n"); 7822 goto failed_template; 7823 } 7824 7825 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7826 ql_dbg(ql_dbg_init, vha, 0x017c, 7827 "-> template size %x bytes\n", dlen); 7828 ha->fw_dump_template_len = dlen; 7829 return rval; 7830 7831 failed_template: 7832 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7833 if (ha->fw_dump_template) 7834 vfree(ha->fw_dump_template); 7835 ha->fw_dump_template = NULL; 7836 ha->fw_dump_template_len = 0; 7837 return rval; 7838 } 7839 7840 int 7841 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7842 { 7843 int rval; 7844 7845 if (ql2xfwloadbin == 1) 7846 return qla81xx_load_risc(vha, srisc_addr); 7847 7848 /* 7849 * FW Load priority: 7850 * 1) Firmware via request-firmware interface (.bin file). 7851 * 2) Firmware residing in flash. 7852 */ 7853 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7854 if (rval == QLA_SUCCESS) 7855 return rval; 7856 7857 return qla24xx_load_risc_flash(vha, srisc_addr, 7858 vha->hw->flt_region_fw); 7859 } 7860 7861 int 7862 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7863 { 7864 int rval; 7865 struct qla_hw_data *ha = vha->hw; 7866 7867 if (ql2xfwloadbin == 2) 7868 goto try_blob_fw; 7869 7870 /* 7871 * FW Load priority: 7872 * 1) Firmware residing in flash. 7873 * 2) Firmware via request-firmware interface (.bin file). 7874 * 3) Golden-Firmware residing in flash -- limited operation. 7875 */ 7876 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7877 if (rval == QLA_SUCCESS) 7878 return rval; 7879 7880 try_blob_fw: 7881 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7882 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7883 return rval; 7884 7885 ql_log(ql_log_info, vha, 0x0099, 7886 "Attempting to fallback to golden firmware.\n"); 7887 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7888 if (rval != QLA_SUCCESS) 7889 return rval; 7890 7891 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7892 ha->flags.running_gold_fw = 1; 7893 return rval; 7894 } 7895 7896 void 7897 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7898 { 7899 int ret, retries; 7900 struct qla_hw_data *ha = vha->hw; 7901 7902 if (ha->flags.pci_channel_io_perm_failure) 7903 return; 7904 if (!IS_FWI2_CAPABLE(ha)) 7905 return; 7906 if (!ha->fw_major_version) 7907 return; 7908 if (!ha->flags.fw_started) 7909 return; 7910 7911 ret = qla2x00_stop_firmware(vha); 7912 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7913 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7914 ha->isp_ops->reset_chip(vha); 7915 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7916 continue; 7917 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7918 continue; 7919 ql_log(ql_log_info, vha, 0x8015, 7920 "Attempting retry of stop-firmware command.\n"); 7921 ret = qla2x00_stop_firmware(vha); 7922 } 7923 7924 QLA_FW_STOPPED(ha); 7925 ha->flags.fw_init_done = 0; 7926 } 7927 7928 int 7929 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7930 { 7931 int rval = QLA_SUCCESS; 7932 int rval2; 7933 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7934 struct qla_hw_data *ha = vha->hw; 7935 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7936 struct req_que *req; 7937 struct rsp_que *rsp; 7938 7939 if (!vha->vp_idx) 7940 return -EINVAL; 7941 7942 rval = qla2x00_fw_ready(base_vha); 7943 if (vha->qpair) 7944 req = vha->qpair->req; 7945 else 7946 req = ha->req_q_map[0]; 7947 rsp = req->rsp; 7948 7949 if (rval == QLA_SUCCESS) { 7950 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7951 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7952 } 7953 7954 vha->flags.management_server_logged_in = 0; 7955 7956 /* Login to SNS first */ 7957 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7958 BIT_1); 7959 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7960 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7961 ql_dbg(ql_dbg_init, vha, 0x0120, 7962 "Failed SNS login: loop_id=%x, rval2=%d\n", 7963 NPH_SNS, rval2); 7964 else 7965 ql_dbg(ql_dbg_init, vha, 0x0103, 7966 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7967 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7968 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7969 return (QLA_FUNCTION_FAILED); 7970 } 7971 7972 atomic_set(&vha->loop_down_timer, 0); 7973 atomic_set(&vha->loop_state, LOOP_UP); 7974 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7975 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7976 rval = qla2x00_loop_resync(base_vha); 7977 7978 return rval; 7979 } 7980 7981 /* 84XX Support **************************************************************/ 7982 7983 static LIST_HEAD(qla_cs84xx_list); 7984 static DEFINE_MUTEX(qla_cs84xx_mutex); 7985 7986 static struct qla_chip_state_84xx * 7987 qla84xx_get_chip(struct scsi_qla_host *vha) 7988 { 7989 struct qla_chip_state_84xx *cs84xx; 7990 struct qla_hw_data *ha = vha->hw; 7991 7992 mutex_lock(&qla_cs84xx_mutex); 7993 7994 /* Find any shared 84xx chip. */ 7995 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7996 if (cs84xx->bus == ha->pdev->bus) { 7997 kref_get(&cs84xx->kref); 7998 goto done; 7999 } 8000 } 8001 8002 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8003 if (!cs84xx) 8004 goto done; 8005 8006 kref_init(&cs84xx->kref); 8007 spin_lock_init(&cs84xx->access_lock); 8008 mutex_init(&cs84xx->fw_update_mutex); 8009 cs84xx->bus = ha->pdev->bus; 8010 8011 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8012 done: 8013 mutex_unlock(&qla_cs84xx_mutex); 8014 return cs84xx; 8015 } 8016 8017 static void 8018 __qla84xx_chip_release(struct kref *kref) 8019 { 8020 struct qla_chip_state_84xx *cs84xx = 8021 container_of(kref, struct qla_chip_state_84xx, kref); 8022 8023 mutex_lock(&qla_cs84xx_mutex); 8024 list_del(&cs84xx->list); 8025 mutex_unlock(&qla_cs84xx_mutex); 8026 kfree(cs84xx); 8027 } 8028 8029 void 8030 qla84xx_put_chip(struct scsi_qla_host *vha) 8031 { 8032 struct qla_hw_data *ha = vha->hw; 8033 if (ha->cs84xx) 8034 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8035 } 8036 8037 static int 8038 qla84xx_init_chip(scsi_qla_host_t *vha) 8039 { 8040 int rval; 8041 uint16_t status[2]; 8042 struct qla_hw_data *ha = vha->hw; 8043 8044 mutex_lock(&ha->cs84xx->fw_update_mutex); 8045 8046 rval = qla84xx_verify_chip(vha, status); 8047 8048 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8049 8050 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 8051 QLA_SUCCESS; 8052 } 8053 8054 /* 81XX Support **************************************************************/ 8055 8056 int 8057 qla81xx_nvram_config(scsi_qla_host_t *vha) 8058 { 8059 int rval; 8060 struct init_cb_81xx *icb; 8061 struct nvram_81xx *nv; 8062 uint32_t *dptr; 8063 uint8_t *dptr1, *dptr2; 8064 uint32_t chksum; 8065 uint16_t cnt; 8066 struct qla_hw_data *ha = vha->hw; 8067 8068 rval = QLA_SUCCESS; 8069 icb = (struct init_cb_81xx *)ha->init_cb; 8070 nv = ha->nvram; 8071 8072 /* Determine NVRAM starting address. */ 8073 ha->nvram_size = sizeof(struct nvram_81xx); 8074 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8075 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8076 ha->vpd_size = FA_VPD_SIZE_82XX; 8077 8078 /* Get VPD data into cache */ 8079 ha->vpd = ha->nvram + VPD_OFFSET; 8080 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 8081 ha->vpd_size); 8082 8083 /* Get NVRAM data into cache and calculate checksum. */ 8084 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 8085 ha->nvram_size); 8086 dptr = (uint32_t *)nv; 8087 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8088 chksum += le32_to_cpu(*dptr); 8089 8090 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8091 "Contents of NVRAM:\n"); 8092 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8093 (uint8_t *)nv, ha->nvram_size); 8094 8095 /* Bad NVRAM data, set defaults parameters. */ 8096 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 8097 || nv->id[3] != ' ' || 8098 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 8099 /* Reset NVRAM data. */ 8100 ql_log(ql_log_info, vha, 0x0073, 8101 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 8102 "version=0x%x.\n", chksum, nv->id[0], 8103 le16_to_cpu(nv->nvram_version)); 8104 ql_log(ql_log_info, vha, 0x0074, 8105 "Falling back to functioning (yet invalid -- WWPN) " 8106 "defaults.\n"); 8107 8108 /* 8109 * Set default initialization control block. 8110 */ 8111 memset(nv, 0, ha->nvram_size); 8112 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8113 nv->version = cpu_to_le16(ICB_VERSION); 8114 nv->frame_payload_size = 2048; 8115 nv->execution_throttle = cpu_to_le16(0xFFFF); 8116 nv->exchange_count = cpu_to_le16(0); 8117 nv->port_name[0] = 0x21; 8118 nv->port_name[1] = 0x00 + ha->port_no + 1; 8119 nv->port_name[2] = 0x00; 8120 nv->port_name[3] = 0xe0; 8121 nv->port_name[4] = 0x8b; 8122 nv->port_name[5] = 0x1c; 8123 nv->port_name[6] = 0x55; 8124 nv->port_name[7] = 0x86; 8125 nv->node_name[0] = 0x20; 8126 nv->node_name[1] = 0x00; 8127 nv->node_name[2] = 0x00; 8128 nv->node_name[3] = 0xe0; 8129 nv->node_name[4] = 0x8b; 8130 nv->node_name[5] = 0x1c; 8131 nv->node_name[6] = 0x55; 8132 nv->node_name[7] = 0x86; 8133 nv->login_retry_count = cpu_to_le16(8); 8134 nv->interrupt_delay_timer = cpu_to_le16(0); 8135 nv->login_timeout = cpu_to_le16(0); 8136 nv->firmware_options_1 = 8137 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8138 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8139 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8140 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8141 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8142 nv->efi_parameters = cpu_to_le32(0); 8143 nv->reset_delay = 5; 8144 nv->max_luns_per_target = cpu_to_le16(128); 8145 nv->port_down_retry_count = cpu_to_le16(30); 8146 nv->link_down_timeout = cpu_to_le16(180); 8147 nv->enode_mac[0] = 0x00; 8148 nv->enode_mac[1] = 0xC0; 8149 nv->enode_mac[2] = 0xDD; 8150 nv->enode_mac[3] = 0x04; 8151 nv->enode_mac[4] = 0x05; 8152 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8153 8154 rval = 1; 8155 } 8156 8157 if (IS_T10_PI_CAPABLE(ha)) 8158 nv->frame_payload_size &= ~7; 8159 8160 qlt_81xx_config_nvram_stage1(vha, nv); 8161 8162 /* Reset Initialization control block */ 8163 memset(icb, 0, ha->init_cb_size); 8164 8165 /* Copy 1st segment. */ 8166 dptr1 = (uint8_t *)icb; 8167 dptr2 = (uint8_t *)&nv->version; 8168 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8169 while (cnt--) 8170 *dptr1++ = *dptr2++; 8171 8172 icb->login_retry_count = nv->login_retry_count; 8173 8174 /* Copy 2nd segment. */ 8175 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8176 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8177 cnt = (uint8_t *)&icb->reserved_5 - 8178 (uint8_t *)&icb->interrupt_delay_timer; 8179 while (cnt--) 8180 *dptr1++ = *dptr2++; 8181 8182 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8183 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8184 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8185 icb->enode_mac[0] = 0x00; 8186 icb->enode_mac[1] = 0xC0; 8187 icb->enode_mac[2] = 0xDD; 8188 icb->enode_mac[3] = 0x04; 8189 icb->enode_mac[4] = 0x05; 8190 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8191 } 8192 8193 /* Use extended-initialization control block. */ 8194 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8195 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8196 /* 8197 * Setup driver NVRAM options. 8198 */ 8199 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8200 "QLE8XXX"); 8201 8202 qlt_81xx_config_nvram_stage2(vha, icb); 8203 8204 /* Use alternate WWN? */ 8205 if (nv->host_p & cpu_to_le32(BIT_15)) { 8206 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8207 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8208 } 8209 8210 /* Prepare nodename */ 8211 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8212 /* 8213 * Firmware will apply the following mask if the nodename was 8214 * not provided. 8215 */ 8216 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8217 icb->node_name[0] &= 0xF0; 8218 } 8219 8220 /* Set host adapter parameters. */ 8221 ha->flags.disable_risc_code_load = 0; 8222 ha->flags.enable_lip_reset = 0; 8223 ha->flags.enable_lip_full_login = 8224 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 8225 ha->flags.enable_target_reset = 8226 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 8227 ha->flags.enable_led_scheme = 0; 8228 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 8229 8230 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8231 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8232 8233 /* save HBA serial number */ 8234 ha->serial0 = icb->port_name[5]; 8235 ha->serial1 = icb->port_name[6]; 8236 ha->serial2 = icb->port_name[7]; 8237 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8238 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8239 8240 icb->execution_throttle = cpu_to_le16(0xFFFF); 8241 8242 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8243 8244 /* Set minimum login_timeout to 4 seconds. */ 8245 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8246 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8247 if (le16_to_cpu(nv->login_timeout) < 4) 8248 nv->login_timeout = cpu_to_le16(4); 8249 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8250 8251 /* Set minimum RATOV to 100 tenths of a second. */ 8252 ha->r_a_tov = 100; 8253 8254 ha->loop_reset_delay = nv->reset_delay; 8255 8256 /* Link Down Timeout = 0: 8257 * 8258 * When Port Down timer expires we will start returning 8259 * I/O's to OS with "DID_NO_CONNECT". 8260 * 8261 * Link Down Timeout != 0: 8262 * 8263 * The driver waits for the link to come up after link down 8264 * before returning I/Os to OS with "DID_NO_CONNECT". 8265 */ 8266 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8267 ha->loop_down_abort_time = 8268 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8269 } else { 8270 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8271 ha->loop_down_abort_time = 8272 (LOOP_DOWN_TIME - ha->link_down_timeout); 8273 } 8274 8275 /* Need enough time to try and get the port back. */ 8276 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8277 if (qlport_down_retry) 8278 ha->port_down_retry_count = qlport_down_retry; 8279 8280 /* Set login_retry_count */ 8281 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8282 if (ha->port_down_retry_count == 8283 le16_to_cpu(nv->port_down_retry_count) && 8284 ha->port_down_retry_count > 3) 8285 ha->login_retry_count = ha->port_down_retry_count; 8286 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8287 ha->login_retry_count = ha->port_down_retry_count; 8288 if (ql2xloginretrycount) 8289 ha->login_retry_count = ql2xloginretrycount; 8290 8291 /* if not running MSI-X we need handshaking on interrupts */ 8292 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8293 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8294 8295 /* Enable ZIO. */ 8296 if (!vha->flags.init_done) { 8297 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8298 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8299 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8300 le16_to_cpu(icb->interrupt_delay_timer): 2; 8301 } 8302 icb->firmware_options_2 &= cpu_to_le32( 8303 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8304 vha->flags.process_response_queue = 0; 8305 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8306 ha->zio_mode = QLA_ZIO_MODE_6; 8307 8308 ql_log(ql_log_info, vha, 0x0075, 8309 "ZIO mode %d enabled; timer delay (%d us).\n", 8310 ha->zio_mode, 8311 ha->zio_timer * 100); 8312 8313 icb->firmware_options_2 |= cpu_to_le32( 8314 (uint32_t)ha->zio_mode); 8315 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8316 vha->flags.process_response_queue = 1; 8317 } 8318 8319 /* enable RIDA Format2 */ 8320 icb->firmware_options_3 |= BIT_0; 8321 8322 /* N2N: driver will initiate Login instead of FW */ 8323 icb->firmware_options_3 |= BIT_8; 8324 8325 if (IS_QLA27XX(ha)) { 8326 icb->firmware_options_3 |= BIT_8; 8327 ql_dbg(ql_log_info, vha, 0x0075, 8328 "Enabling direct connection.\n"); 8329 } 8330 8331 if (rval) { 8332 ql_log(ql_log_warn, vha, 0x0076, 8333 "NVRAM configuration failed.\n"); 8334 } 8335 return (rval); 8336 } 8337 8338 int 8339 qla82xx_restart_isp(scsi_qla_host_t *vha) 8340 { 8341 int status, rval; 8342 struct qla_hw_data *ha = vha->hw; 8343 struct req_que *req = ha->req_q_map[0]; 8344 struct rsp_que *rsp = ha->rsp_q_map[0]; 8345 struct scsi_qla_host *vp; 8346 unsigned long flags; 8347 8348 status = qla2x00_init_rings(vha); 8349 if (!status) { 8350 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8351 ha->flags.chip_reset_done = 1; 8352 8353 status = qla2x00_fw_ready(vha); 8354 if (!status) { 8355 /* Issue a marker after FW becomes ready. */ 8356 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8357 vha->flags.online = 1; 8358 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8359 } 8360 8361 /* if no cable then assume it's good */ 8362 if ((vha->device_flags & DFLG_NO_CABLE)) 8363 status = 0; 8364 } 8365 8366 if (!status) { 8367 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8368 8369 if (!atomic_read(&vha->loop_down_timer)) { 8370 /* 8371 * Issue marker command only when we are going 8372 * to start the I/O . 8373 */ 8374 vha->marker_needed = 1; 8375 } 8376 8377 ha->isp_ops->enable_intrs(ha); 8378 8379 ha->isp_abort_cnt = 0; 8380 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8381 8382 /* Update the firmware version */ 8383 status = qla82xx_check_md_needed(vha); 8384 8385 if (ha->fce) { 8386 ha->flags.fce_enabled = 1; 8387 memset(ha->fce, 0, 8388 fce_calc_size(ha->fce_bufs)); 8389 rval = qla2x00_enable_fce_trace(vha, 8390 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8391 &ha->fce_bufs); 8392 if (rval) { 8393 ql_log(ql_log_warn, vha, 0x8001, 8394 "Unable to reinitialize FCE (%d).\n", 8395 rval); 8396 ha->flags.fce_enabled = 0; 8397 } 8398 } 8399 8400 if (ha->eft) { 8401 memset(ha->eft, 0, EFT_SIZE); 8402 rval = qla2x00_enable_eft_trace(vha, 8403 ha->eft_dma, EFT_NUM_BUFFERS); 8404 if (rval) { 8405 ql_log(ql_log_warn, vha, 0x8010, 8406 "Unable to reinitialize EFT (%d).\n", 8407 rval); 8408 } 8409 } 8410 } 8411 8412 if (!status) { 8413 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8414 "qla82xx_restart_isp succeeded.\n"); 8415 8416 spin_lock_irqsave(&ha->vport_slock, flags); 8417 list_for_each_entry(vp, &ha->vp_list, list) { 8418 if (vp->vp_idx) { 8419 atomic_inc(&vp->vref_count); 8420 spin_unlock_irqrestore(&ha->vport_slock, flags); 8421 8422 qla2x00_vp_abort_isp(vp); 8423 8424 spin_lock_irqsave(&ha->vport_slock, flags); 8425 atomic_dec(&vp->vref_count); 8426 } 8427 } 8428 spin_unlock_irqrestore(&ha->vport_slock, flags); 8429 8430 } else { 8431 ql_log(ql_log_warn, vha, 0x8016, 8432 "qla82xx_restart_isp **** FAILED ****.\n"); 8433 } 8434 8435 return status; 8436 } 8437 8438 void 8439 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8440 { 8441 struct qla_hw_data *ha = vha->hw; 8442 8443 /* Hold status IOCBs until ABTS response received. */ 8444 if (ql2xfwholdabts) 8445 ha->fw_options[3] |= BIT_12; 8446 8447 /* Set Retry FLOGI in case of P2P connection */ 8448 if (ha->operating_mode == P2P) { 8449 ha->fw_options[2] |= BIT_3; 8450 ql_dbg(ql_dbg_disc, vha, 0x2103, 8451 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8452 __func__, ha->fw_options[2]); 8453 } 8454 8455 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8456 if (ql2xmvasynctoatio) { 8457 if (qla_tgt_mode_enabled(vha) || 8458 qla_dual_mode_enabled(vha)) 8459 ha->fw_options[2] |= BIT_11; 8460 else 8461 ha->fw_options[2] &= ~BIT_11; 8462 } 8463 8464 if (qla_tgt_mode_enabled(vha) || 8465 qla_dual_mode_enabled(vha)) { 8466 /* FW auto send SCSI status during */ 8467 ha->fw_options[1] |= BIT_8; 8468 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8469 8470 /* FW perform Exchange validation */ 8471 ha->fw_options[2] |= BIT_4; 8472 } else { 8473 ha->fw_options[1] &= ~BIT_8; 8474 ha->fw_options[10] &= 0x00ff; 8475 8476 ha->fw_options[2] &= ~BIT_4; 8477 } 8478 8479 if (ql2xetsenable) { 8480 /* Enable ETS Burst. */ 8481 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8482 ha->fw_options[2] |= BIT_9; 8483 } 8484 8485 ql_dbg(ql_dbg_init, vha, 0x00e9, 8486 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8487 __func__, ha->fw_options[1], ha->fw_options[2], 8488 ha->fw_options[3], vha->host->active_mode); 8489 8490 qla2x00_set_fw_options(vha, ha->fw_options); 8491 } 8492 8493 /* 8494 * qla24xx_get_fcp_prio 8495 * Gets the fcp cmd priority value for the logged in port. 8496 * Looks for a match of the port descriptors within 8497 * each of the fcp prio config entries. If a match is found, 8498 * the tag (priority) value is returned. 8499 * 8500 * Input: 8501 * vha = scsi host structure pointer. 8502 * fcport = port structure pointer. 8503 * 8504 * Return: 8505 * non-zero (if found) 8506 * -1 (if not found) 8507 * 8508 * Context: 8509 * Kernel context 8510 */ 8511 static int 8512 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8513 { 8514 int i, entries; 8515 uint8_t pid_match, wwn_match; 8516 int priority; 8517 uint32_t pid1, pid2; 8518 uint64_t wwn1, wwn2; 8519 struct qla_fcp_prio_entry *pri_entry; 8520 struct qla_hw_data *ha = vha->hw; 8521 8522 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8523 return -1; 8524 8525 priority = -1; 8526 entries = ha->fcp_prio_cfg->num_entries; 8527 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8528 8529 for (i = 0; i < entries; i++) { 8530 pid_match = wwn_match = 0; 8531 8532 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8533 pri_entry++; 8534 continue; 8535 } 8536 8537 /* check source pid for a match */ 8538 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8539 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8540 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8541 if (pid1 == INVALID_PORT_ID) 8542 pid_match++; 8543 else if (pid1 == pid2) 8544 pid_match++; 8545 } 8546 8547 /* check destination pid for a match */ 8548 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8549 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8550 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8551 if (pid1 == INVALID_PORT_ID) 8552 pid_match++; 8553 else if (pid1 == pid2) 8554 pid_match++; 8555 } 8556 8557 /* check source WWN for a match */ 8558 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8559 wwn1 = wwn_to_u64(vha->port_name); 8560 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8561 if (wwn2 == (uint64_t)-1) 8562 wwn_match++; 8563 else if (wwn1 == wwn2) 8564 wwn_match++; 8565 } 8566 8567 /* check destination WWN for a match */ 8568 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8569 wwn1 = wwn_to_u64(fcport->port_name); 8570 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8571 if (wwn2 == (uint64_t)-1) 8572 wwn_match++; 8573 else if (wwn1 == wwn2) 8574 wwn_match++; 8575 } 8576 8577 if (pid_match == 2 || wwn_match == 2) { 8578 /* Found a matching entry */ 8579 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8580 priority = pri_entry->tag; 8581 break; 8582 } 8583 8584 pri_entry++; 8585 } 8586 8587 return priority; 8588 } 8589 8590 /* 8591 * qla24xx_update_fcport_fcp_prio 8592 * Activates fcp priority for the logged in fc port 8593 * 8594 * Input: 8595 * vha = scsi host structure pointer. 8596 * fcp = port structure pointer. 8597 * 8598 * Return: 8599 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8600 * 8601 * Context: 8602 * Kernel context. 8603 */ 8604 int 8605 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8606 { 8607 int ret; 8608 int priority; 8609 uint16_t mb[5]; 8610 8611 if (fcport->port_type != FCT_TARGET || 8612 fcport->loop_id == FC_NO_LOOP_ID) 8613 return QLA_FUNCTION_FAILED; 8614 8615 priority = qla24xx_get_fcp_prio(vha, fcport); 8616 if (priority < 0) 8617 return QLA_FUNCTION_FAILED; 8618 8619 if (IS_P3P_TYPE(vha->hw)) { 8620 fcport->fcp_prio = priority & 0xf; 8621 return QLA_SUCCESS; 8622 } 8623 8624 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8625 if (ret == QLA_SUCCESS) { 8626 if (fcport->fcp_prio != priority) 8627 ql_dbg(ql_dbg_user, vha, 0x709e, 8628 "Updated FCP_CMND priority - value=%d loop_id=%d " 8629 "port_id=%02x%02x%02x.\n", priority, 8630 fcport->loop_id, fcport->d_id.b.domain, 8631 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8632 fcport->fcp_prio = priority & 0xf; 8633 } else 8634 ql_dbg(ql_dbg_user, vha, 0x704f, 8635 "Unable to update FCP_CMND priority - ret=0x%x for " 8636 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8637 fcport->d_id.b.domain, fcport->d_id.b.area, 8638 fcport->d_id.b.al_pa); 8639 return ret; 8640 } 8641 8642 /* 8643 * qla24xx_update_all_fcp_prio 8644 * Activates fcp priority for all the logged in ports 8645 * 8646 * Input: 8647 * ha = adapter block pointer. 8648 * 8649 * Return: 8650 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8651 * 8652 * Context: 8653 * Kernel context. 8654 */ 8655 int 8656 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8657 { 8658 int ret; 8659 fc_port_t *fcport; 8660 8661 ret = QLA_FUNCTION_FAILED; 8662 /* We need to set priority for all logged in ports */ 8663 list_for_each_entry(fcport, &vha->vp_fcports, list) 8664 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8665 8666 return ret; 8667 } 8668 8669 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8670 int vp_idx, bool startqp) 8671 { 8672 int rsp_id = 0; 8673 int req_id = 0; 8674 int i; 8675 struct qla_hw_data *ha = vha->hw; 8676 uint16_t qpair_id = 0; 8677 struct qla_qpair *qpair = NULL; 8678 struct qla_msix_entry *msix; 8679 8680 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8681 ql_log(ql_log_warn, vha, 0x00181, 8682 "FW/Driver is not multi-queue capable.\n"); 8683 return NULL; 8684 } 8685 8686 if (ql2xmqsupport || ql2xnvmeenable) { 8687 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8688 if (qpair == NULL) { 8689 ql_log(ql_log_warn, vha, 0x0182, 8690 "Failed to allocate memory for queue pair.\n"); 8691 return NULL; 8692 } 8693 memset(qpair, 0, sizeof(struct qla_qpair)); 8694 8695 qpair->hw = vha->hw; 8696 qpair->vha = vha; 8697 qpair->qp_lock_ptr = &qpair->qp_lock; 8698 spin_lock_init(&qpair->qp_lock); 8699 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8700 8701 /* Assign available que pair id */ 8702 mutex_lock(&ha->mq_lock); 8703 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8704 if (ha->num_qpairs >= ha->max_qpairs) { 8705 mutex_unlock(&ha->mq_lock); 8706 ql_log(ql_log_warn, vha, 0x0183, 8707 "No resources to create additional q pair.\n"); 8708 goto fail_qid_map; 8709 } 8710 ha->num_qpairs++; 8711 set_bit(qpair_id, ha->qpair_qid_map); 8712 ha->queue_pair_map[qpair_id] = qpair; 8713 qpair->id = qpair_id; 8714 qpair->vp_idx = vp_idx; 8715 qpair->fw_started = ha->flags.fw_started; 8716 INIT_LIST_HEAD(&qpair->hints_list); 8717 qpair->chip_reset = ha->base_qpair->chip_reset; 8718 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8719 qpair->enable_explicit_conf = 8720 ha->base_qpair->enable_explicit_conf; 8721 8722 for (i = 0; i < ha->msix_count; i++) { 8723 msix = &ha->msix_entries[i]; 8724 if (msix->in_use) 8725 continue; 8726 qpair->msix = msix; 8727 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8728 "Vector %x selected for qpair\n", msix->vector); 8729 break; 8730 } 8731 if (!qpair->msix) { 8732 ql_log(ql_log_warn, vha, 0x0184, 8733 "Out of MSI-X vectors!.\n"); 8734 goto fail_msix; 8735 } 8736 8737 qpair->msix->in_use = 1; 8738 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8739 qpair->pdev = ha->pdev; 8740 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8741 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8742 8743 mutex_unlock(&ha->mq_lock); 8744 8745 /* Create response queue first */ 8746 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8747 if (!rsp_id) { 8748 ql_log(ql_log_warn, vha, 0x0185, 8749 "Failed to create response queue.\n"); 8750 goto fail_rsp; 8751 } 8752 8753 qpair->rsp = ha->rsp_q_map[rsp_id]; 8754 8755 /* Create request queue */ 8756 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8757 startqp); 8758 if (!req_id) { 8759 ql_log(ql_log_warn, vha, 0x0186, 8760 "Failed to create request queue.\n"); 8761 goto fail_req; 8762 } 8763 8764 qpair->req = ha->req_q_map[req_id]; 8765 qpair->rsp->req = qpair->req; 8766 qpair->rsp->qpair = qpair; 8767 /* init qpair to this cpu. Will adjust at run time. */ 8768 qla_cpu_update(qpair, smp_processor_id()); 8769 8770 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8771 if (ha->fw_attributes & BIT_4) 8772 qpair->difdix_supported = 1; 8773 } 8774 8775 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8776 if (!qpair->srb_mempool) { 8777 ql_log(ql_log_warn, vha, 0xd036, 8778 "Failed to create srb mempool for qpair %d\n", 8779 qpair->id); 8780 goto fail_mempool; 8781 } 8782 8783 /* Mark as online */ 8784 qpair->online = 1; 8785 8786 if (!vha->flags.qpairs_available) 8787 vha->flags.qpairs_available = 1; 8788 8789 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8790 "Request/Response queue pair created, id %d\n", 8791 qpair->id); 8792 ql_dbg(ql_dbg_init, vha, 0x0187, 8793 "Request/Response queue pair created, id %d\n", 8794 qpair->id); 8795 } 8796 return qpair; 8797 8798 fail_mempool: 8799 fail_req: 8800 qla25xx_delete_rsp_que(vha, qpair->rsp); 8801 fail_rsp: 8802 mutex_lock(&ha->mq_lock); 8803 qpair->msix->in_use = 0; 8804 list_del(&qpair->qp_list_elem); 8805 if (list_empty(&vha->qp_list)) 8806 vha->flags.qpairs_available = 0; 8807 fail_msix: 8808 ha->queue_pair_map[qpair_id] = NULL; 8809 clear_bit(qpair_id, ha->qpair_qid_map); 8810 ha->num_qpairs--; 8811 mutex_unlock(&ha->mq_lock); 8812 fail_qid_map: 8813 kfree(qpair); 8814 return NULL; 8815 } 8816 8817 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8818 { 8819 int ret = QLA_FUNCTION_FAILED; 8820 struct qla_hw_data *ha = qpair->hw; 8821 8822 qpair->delete_in_progress = 1; 8823 while (atomic_read(&qpair->ref_count)) 8824 msleep(500); 8825 8826 ret = qla25xx_delete_req_que(vha, qpair->req); 8827 if (ret != QLA_SUCCESS) 8828 goto fail; 8829 8830 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8831 if (ret != QLA_SUCCESS) 8832 goto fail; 8833 8834 mutex_lock(&ha->mq_lock); 8835 ha->queue_pair_map[qpair->id] = NULL; 8836 clear_bit(qpair->id, ha->qpair_qid_map); 8837 ha->num_qpairs--; 8838 list_del(&qpair->qp_list_elem); 8839 if (list_empty(&vha->qp_list)) { 8840 vha->flags.qpairs_available = 0; 8841 vha->flags.qpairs_req_created = 0; 8842 vha->flags.qpairs_rsp_created = 0; 8843 } 8844 mempool_destroy(qpair->srb_mempool); 8845 kfree(qpair); 8846 mutex_unlock(&ha->mq_lock); 8847 8848 return QLA_SUCCESS; 8849 fail: 8850 return ret; 8851 } 8852