1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #include "qla_def.h" 7 #include "qla_gbl.h" 8 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/vmalloc.h> 12 13 #include "qla_devtbl.h" 14 15 #ifdef CONFIG_SPARC 16 #include <asm/prom.h> 17 #endif 18 19 #include "qla_target.h" 20 21 /* 22 * QLogic ISP2x00 Hardware Support Function Prototypes. 23 */ 24 static int qla2x00_isp_firmware(scsi_qla_host_t *); 25 static int qla2x00_setup_chip(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 32 static int qla2x00_restart_isp(scsi_qla_host_t *); 33 34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 35 static int qla84xx_init_chip(scsi_qla_host_t *); 36 static int qla25xx_init_queues(struct qla_hw_data *); 37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 38 struct event_arg *ea); 39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 40 struct event_arg *); 41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(struct timer_list *t) 47 { 48 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 49 struct srb_iocb *iocb; 50 scsi_qla_host_t *vha = sp->vha; 51 52 WARN_ON(irqs_disabled()); 53 iocb = &sp->u.iocb_cmd; 54 iocb->timeout(sp); 55 56 /* ref: TMR */ 57 kref_put(&sp->cmd_kref, qla2x00_sp_release); 58 59 if (vha && qla2x00_isp_reg_stat(vha->hw)) { 60 ql_log(ql_log_info, vha, 0x9008, 61 "PCI/Register disconnect.\n"); 62 qla_pci_set_eeh_busy(vha); 63 } 64 } 65 66 void qla2x00_sp_free(srb_t *sp) 67 { 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 69 70 del_timer(&iocb->timer); 71 qla2x00_rel_sp(sp); 72 } 73 74 void qla2xxx_rel_done_warning(srb_t *sp, int res) 75 { 76 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp); 77 } 78 79 void qla2xxx_rel_free_warning(srb_t *sp) 80 { 81 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp); 82 } 83 84 /* Asynchronous Login/Logout Routines -------------------------------------- */ 85 86 unsigned long 87 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 88 { 89 unsigned long tmo; 90 struct qla_hw_data *ha = vha->hw; 91 92 /* Firmware should use switch negotiated r_a_tov for timeout. */ 93 tmo = ha->r_a_tov / 10 * 2; 94 if (IS_QLAFX00(ha)) { 95 tmo = FX00_DEF_RATOV * 2; 96 } else if (!IS_FWI2_CAPABLE(ha)) { 97 /* 98 * Except for earlier ISPs where the timeout is seeded from the 99 * initialization control block. 100 */ 101 tmo = ha->login_timeout; 102 } 103 return tmo; 104 } 105 106 static void qla24xx_abort_iocb_timeout(void *data) 107 { 108 srb_t *sp = data; 109 struct srb_iocb *abt = &sp->u.iocb_cmd; 110 struct qla_qpair *qpair = sp->qpair; 111 u32 handle; 112 unsigned long flags; 113 114 if (sp->cmd_sp) 115 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 116 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 117 sp->cmd_sp->handle, sp->cmd_sp->type, 118 sp->handle, sp->type); 119 else 120 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 121 "Abort timeout 2 - hdl=%x, type=%x\n", 122 sp->handle, sp->type); 123 124 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 125 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 126 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 127 sp->cmd_sp)) 128 qpair->req->outstanding_cmds[handle] = NULL; 129 130 /* removing the abort */ 131 if (qpair->req->outstanding_cmds[handle] == sp) { 132 qpair->req->outstanding_cmds[handle] = NULL; 133 break; 134 } 135 } 136 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 137 138 if (sp->cmd_sp) { 139 /* 140 * This done function should take care of 141 * original command ref: INIT 142 */ 143 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 144 } 145 146 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT); 147 sp->done(sp, QLA_OS_TIMER_EXPIRED); 148 } 149 150 static void qla24xx_abort_sp_done(srb_t *sp, int res) 151 { 152 struct srb_iocb *abt = &sp->u.iocb_cmd; 153 srb_t *orig_sp = sp->cmd_sp; 154 155 if (orig_sp) 156 qla_wait_nvme_release_cmd_kref(orig_sp); 157 158 if (sp->flags & SRB_WAKEUP_ON_COMP) 159 complete(&abt->u.abt.comp); 160 else 161 /* ref: INIT */ 162 kref_put(&sp->cmd_kref, qla2x00_sp_release); 163 } 164 165 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 166 { 167 scsi_qla_host_t *vha = cmd_sp->vha; 168 struct srb_iocb *abt_iocb; 169 srb_t *sp; 170 int rval = QLA_FUNCTION_FAILED; 171 172 /* ref: INIT for ABTS command */ 173 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 174 GFP_ATOMIC); 175 if (!sp) 176 return QLA_MEMORY_ALLOC_FAILED; 177 178 qla_vha_mark_busy(vha); 179 abt_iocb = &sp->u.iocb_cmd; 180 sp->type = SRB_ABT_CMD; 181 sp->name = "abort"; 182 sp->qpair = cmd_sp->qpair; 183 sp->cmd_sp = cmd_sp; 184 if (wait) 185 sp->flags = SRB_WAKEUP_ON_COMP; 186 187 init_completion(&abt_iocb->u.abt.comp); 188 /* FW can send 2 x ABTS's timeout/20s */ 189 qla2x00_init_async_sp(sp, 42, qla24xx_abort_sp_done); 190 sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout; 191 192 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 193 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 194 195 ql_dbg(ql_dbg_async, vha, 0x507c, 196 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 197 cmd_sp->type); 198 199 rval = qla2x00_start_sp(sp); 200 if (rval != QLA_SUCCESS) { 201 /* ref: INIT */ 202 kref_put(&sp->cmd_kref, qla2x00_sp_release); 203 return rval; 204 } 205 206 if (wait) { 207 wait_for_completion(&abt_iocb->u.abt.comp); 208 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 209 QLA_SUCCESS : QLA_ERR_FROM_FW; 210 /* ref: INIT */ 211 kref_put(&sp->cmd_kref, qla2x00_sp_release); 212 } 213 214 return rval; 215 } 216 217 void 218 qla2x00_async_iocb_timeout(void *data) 219 { 220 srb_t *sp = data; 221 fc_port_t *fcport = sp->fcport; 222 struct srb_iocb *lio = &sp->u.iocb_cmd; 223 int rc, h; 224 unsigned long flags; 225 226 if (fcport) { 227 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 228 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 229 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 230 231 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 232 } else { 233 pr_info("Async-%s timeout - hdl=%x.\n", 234 sp->name, sp->handle); 235 } 236 237 switch (sp->type) { 238 case SRB_LOGIN_CMD: 239 rc = qla24xx_async_abort_cmd(sp, false); 240 if (rc) { 241 /* Retry as needed. */ 242 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 243 lio->u.logio.data[1] = 244 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 245 QLA_LOGIO_LOGIN_RETRIED : 0; 246 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 247 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 248 h++) { 249 if (sp->qpair->req->outstanding_cmds[h] == 250 sp) { 251 sp->qpair->req->outstanding_cmds[h] = 252 NULL; 253 break; 254 } 255 } 256 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 257 sp->done(sp, QLA_FUNCTION_TIMEOUT); 258 } 259 break; 260 case SRB_LOGOUT_CMD: 261 case SRB_CT_PTHRU_CMD: 262 case SRB_MB_IOCB: 263 case SRB_NACK_PLOGI: 264 case SRB_NACK_PRLI: 265 case SRB_NACK_LOGO: 266 case SRB_CTRL_VP: 267 default: 268 rc = qla24xx_async_abort_cmd(sp, false); 269 if (rc) { 270 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 271 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 272 h++) { 273 if (sp->qpair->req->outstanding_cmds[h] == 274 sp) { 275 sp->qpair->req->outstanding_cmds[h] = 276 NULL; 277 break; 278 } 279 } 280 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 281 sp->done(sp, QLA_FUNCTION_TIMEOUT); 282 } 283 break; 284 } 285 } 286 287 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 288 { 289 struct scsi_qla_host *vha = sp->vha; 290 struct srb_iocb *lio = &sp->u.iocb_cmd; 291 struct event_arg ea; 292 293 ql_dbg(ql_dbg_disc, vha, 0x20dd, 294 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 295 296 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 297 298 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 299 memset(&ea, 0, sizeof(ea)); 300 ea.fcport = sp->fcport; 301 ea.data[0] = lio->u.logio.data[0]; 302 ea.data[1] = lio->u.logio.data[1]; 303 ea.iop[0] = lio->u.logio.iop[0]; 304 ea.iop[1] = lio->u.logio.iop[1]; 305 ea.sp = sp; 306 if (res) 307 ea.data[0] = MBS_COMMAND_ERROR; 308 qla24xx_handle_plogi_done_event(vha, &ea); 309 } 310 311 /* ref: INIT */ 312 kref_put(&sp->cmd_kref, qla2x00_sp_release); 313 } 314 315 int 316 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 317 uint16_t *data) 318 { 319 srb_t *sp; 320 struct srb_iocb *lio; 321 int rval = QLA_FUNCTION_FAILED; 322 323 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 324 fcport->loop_id == FC_NO_LOOP_ID) { 325 ql_log(ql_log_warn, vha, 0xffff, 326 "%s: %8phC - not sending command.\n", 327 __func__, fcport->port_name); 328 return rval; 329 } 330 331 /* ref: INIT */ 332 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 333 if (!sp) 334 goto done; 335 336 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 337 fcport->flags |= FCF_ASYNC_SENT; 338 fcport->logout_completed = 0; 339 340 sp->type = SRB_LOGIN_CMD; 341 sp->name = "login"; 342 sp->gen1 = fcport->rscn_gen; 343 sp->gen2 = fcport->login_gen; 344 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 345 qla2x00_async_login_sp_done); 346 347 lio = &sp->u.iocb_cmd; 348 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) { 349 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 350 } else { 351 if (vha->hw->flags.edif_enabled && 352 DBELL_ACTIVE(vha)) { 353 lio->u.logio.flags |= 354 (SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI); 355 } else { 356 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 357 } 358 } 359 360 if (NVME_TARGET(vha->hw, fcport)) 361 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 362 363 rval = qla2x00_start_sp(sp); 364 365 ql_dbg(ql_dbg_disc, vha, 0x2072, 366 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 367 fcport->port_name, sp->handle, fcport->loop_id, 368 fcport->d_id.b24, fcport->login_retry, 369 lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : ""); 370 371 if (rval != QLA_SUCCESS) { 372 fcport->flags |= FCF_LOGIN_NEEDED; 373 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 374 goto done_free_sp; 375 } 376 377 return rval; 378 379 done_free_sp: 380 /* ref: INIT */ 381 kref_put(&sp->cmd_kref, qla2x00_sp_release); 382 fcport->flags &= ~FCF_ASYNC_SENT; 383 done: 384 fcport->flags &= ~FCF_ASYNC_ACTIVE; 385 return rval; 386 } 387 388 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 389 { 390 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 391 sp->fcport->login_gen++; 392 qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]); 393 /* ref: INIT */ 394 kref_put(&sp->cmd_kref, qla2x00_sp_release); 395 } 396 397 int 398 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 399 { 400 srb_t *sp; 401 int rval = QLA_FUNCTION_FAILED; 402 403 fcport->flags |= FCF_ASYNC_SENT; 404 /* ref: INIT */ 405 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 406 if (!sp) 407 goto done; 408 409 sp->type = SRB_LOGOUT_CMD; 410 sp->name = "logout"; 411 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 412 qla2x00_async_logout_sp_done), 413 414 ql_dbg(ql_dbg_disc, vha, 0x2070, 415 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n", 416 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 417 fcport->d_id.b.area, fcport->d_id.b.al_pa, 418 fcport->port_name, fcport->explicit_logout); 419 420 rval = qla2x00_start_sp(sp); 421 if (rval != QLA_SUCCESS) 422 goto done_free_sp; 423 return rval; 424 425 done_free_sp: 426 /* ref: INIT */ 427 kref_put(&sp->cmd_kref, qla2x00_sp_release); 428 done: 429 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 430 return rval; 431 } 432 433 void 434 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 435 uint16_t *data) 436 { 437 fcport->flags &= ~FCF_ASYNC_ACTIVE; 438 /* Don't re-login in target mode */ 439 if (!fcport->tgt_session) 440 qla2x00_mark_device_lost(vha, fcport, 1); 441 qlt_logo_completion_handler(fcport, data[0]); 442 } 443 444 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 445 { 446 struct srb_iocb *lio = &sp->u.iocb_cmd; 447 struct scsi_qla_host *vha = sp->vha; 448 449 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 450 if (!test_bit(UNLOADING, &vha->dpc_flags)) 451 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 452 lio->u.logio.data); 453 /* ref: INIT */ 454 kref_put(&sp->cmd_kref, qla2x00_sp_release); 455 } 456 457 int 458 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 459 { 460 srb_t *sp; 461 int rval; 462 463 rval = QLA_FUNCTION_FAILED; 464 /* ref: INIT */ 465 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 466 if (!sp) 467 goto done; 468 469 sp->type = SRB_PRLO_CMD; 470 sp->name = "prlo"; 471 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 472 qla2x00_async_prlo_sp_done); 473 474 ql_dbg(ql_dbg_disc, vha, 0x2070, 475 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 476 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 477 fcport->d_id.b.area, fcport->d_id.b.al_pa); 478 479 rval = qla2x00_start_sp(sp); 480 if (rval != QLA_SUCCESS) 481 goto done_free_sp; 482 483 return rval; 484 485 done_free_sp: 486 /* ref: INIT */ 487 kref_put(&sp->cmd_kref, qla2x00_sp_release); 488 done: 489 fcport->flags &= ~FCF_ASYNC_ACTIVE; 490 return rval; 491 } 492 493 static 494 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 495 { 496 struct fc_port *fcport = ea->fcport; 497 498 ql_dbg(ql_dbg_disc, vha, 0x20d2, 499 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 500 __func__, fcport->port_name, fcport->disc_state, 501 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 502 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 503 504 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 505 ea->data[0]); 506 507 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 508 ql_dbg(ql_dbg_disc, vha, 0x2066, 509 "%s %8phC: adisc fail: post delete\n", 510 __func__, ea->fcport->port_name); 511 /* deleted = 0 & logout_on_delete = force fw cleanup */ 512 fcport->deleted = 0; 513 fcport->logout_on_delete = 1; 514 qlt_schedule_sess_for_deletion(ea->fcport); 515 return; 516 } 517 518 if (ea->fcport->disc_state == DSC_DELETE_PEND) 519 return; 520 521 if (ea->sp->gen2 != ea->fcport->login_gen) { 522 /* target side must have changed it. */ 523 ql_dbg(ql_dbg_disc, vha, 0x20d3, 524 "%s %8phC generation changed\n", 525 __func__, ea->fcport->port_name); 526 return; 527 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 528 qla_rscn_replay(fcport); 529 qlt_schedule_sess_for_deletion(fcport); 530 return; 531 } 532 533 __qla24xx_handle_gpdb_event(vha, ea); 534 } 535 536 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 537 { 538 struct qla_work_evt *e; 539 540 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 541 if (!e) 542 return QLA_FUNCTION_FAILED; 543 544 e->u.fcport.fcport = fcport; 545 fcport->flags |= FCF_ASYNC_ACTIVE; 546 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 547 return qla2x00_post_work(vha, e); 548 } 549 550 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 551 { 552 struct scsi_qla_host *vha = sp->vha; 553 struct event_arg ea; 554 struct srb_iocb *lio = &sp->u.iocb_cmd; 555 556 ql_dbg(ql_dbg_disc, vha, 0x2066, 557 "Async done-%s res %x %8phC\n", 558 sp->name, res, sp->fcport->port_name); 559 560 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 561 562 memset(&ea, 0, sizeof(ea)); 563 ea.rc = res; 564 ea.data[0] = lio->u.logio.data[0]; 565 ea.data[1] = lio->u.logio.data[1]; 566 ea.iop[0] = lio->u.logio.iop[0]; 567 ea.iop[1] = lio->u.logio.iop[1]; 568 ea.fcport = sp->fcport; 569 ea.sp = sp; 570 if (res) 571 ea.data[0] = MBS_COMMAND_ERROR; 572 573 qla24xx_handle_adisc_event(vha, &ea); 574 /* ref: INIT */ 575 kref_put(&sp->cmd_kref, qla2x00_sp_release); 576 } 577 578 int 579 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 580 uint16_t *data) 581 { 582 srb_t *sp; 583 struct srb_iocb *lio; 584 int rval = QLA_FUNCTION_FAILED; 585 586 if (IS_SESSION_DELETED(fcport)) { 587 ql_log(ql_log_warn, vha, 0xffff, 588 "%s: %8phC is being delete - not sending command.\n", 589 __func__, fcport->port_name); 590 fcport->flags &= ~FCF_ASYNC_ACTIVE; 591 return rval; 592 } 593 594 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 595 return rval; 596 597 fcport->flags |= FCF_ASYNC_SENT; 598 /* ref: INIT */ 599 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 600 if (!sp) 601 goto done; 602 603 sp->type = SRB_ADISC_CMD; 604 sp->name = "adisc"; 605 sp->gen1 = fcport->rscn_gen; 606 sp->gen2 = fcport->login_gen; 607 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 608 qla2x00_async_adisc_sp_done); 609 610 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) { 611 lio = &sp->u.iocb_cmd; 612 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 613 } 614 615 ql_dbg(ql_dbg_disc, vha, 0x206f, 616 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 617 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 618 619 rval = qla2x00_start_sp(sp); 620 if (rval != QLA_SUCCESS) 621 goto done_free_sp; 622 623 return rval; 624 625 done_free_sp: 626 /* ref: INIT */ 627 kref_put(&sp->cmd_kref, qla2x00_sp_release); 628 done: 629 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 630 qla2x00_post_async_adisc_work(vha, fcport, data); 631 return rval; 632 } 633 634 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 635 { 636 struct qla_hw_data *ha = vha->hw; 637 638 if (IS_FWI2_CAPABLE(ha)) 639 return loop_id > NPH_LAST_HANDLE; 640 641 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 642 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 643 } 644 645 /** 646 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 647 * @vha: adapter state pointer. 648 * @dev: port structure pointer. 649 * 650 * Returns: 651 * qla2x00 local function return status code. 652 * 653 * Context: 654 * Kernel context. 655 */ 656 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 657 { 658 int rval; 659 struct qla_hw_data *ha = vha->hw; 660 unsigned long flags = 0; 661 662 rval = QLA_SUCCESS; 663 664 spin_lock_irqsave(&ha->vport_slock, flags); 665 666 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 667 if (dev->loop_id >= LOOPID_MAP_SIZE || 668 qla2x00_is_reserved_id(vha, dev->loop_id)) { 669 dev->loop_id = FC_NO_LOOP_ID; 670 rval = QLA_FUNCTION_FAILED; 671 } else { 672 set_bit(dev->loop_id, ha->loop_id_map); 673 } 674 spin_unlock_irqrestore(&ha->vport_slock, flags); 675 676 if (rval == QLA_SUCCESS) 677 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 678 "Assigning new loopid=%x, portid=%x.\n", 679 dev->loop_id, dev->d_id.b24); 680 else 681 ql_log(ql_log_warn, dev->vha, 0x2087, 682 "No loop_id's available, portid=%x.\n", 683 dev->d_id.b24); 684 685 return rval; 686 } 687 688 void qla2x00_clear_loop_id(fc_port_t *fcport) 689 { 690 struct qla_hw_data *ha = fcport->vha->hw; 691 692 if (fcport->loop_id == FC_NO_LOOP_ID || 693 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 694 return; 695 696 clear_bit(fcport->loop_id, ha->loop_id_map); 697 fcport->loop_id = FC_NO_LOOP_ID; 698 } 699 700 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 701 struct event_arg *ea) 702 { 703 fc_port_t *fcport, *conflict_fcport; 704 struct get_name_list_extended *e; 705 u16 i, n, found = 0, loop_id; 706 port_id_t id; 707 u64 wwn; 708 u16 data[2]; 709 u8 current_login_state, nvme_cls; 710 711 fcport = ea->fcport; 712 ql_dbg(ql_dbg_disc, vha, 0xffff, 713 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n", 714 __func__, fcport->port_name, fcport->disc_state, 715 fcport->fw_login_state, ea->rc, 716 fcport->login_gen, fcport->last_login_gen, 717 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable); 718 719 if (fcport->disc_state == DSC_DELETE_PEND) 720 return; 721 722 if (ea->rc) { /* rval */ 723 if (fcport->login_retry == 0) { 724 ql_dbg(ql_dbg_disc, vha, 0x20de, 725 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 726 fcport->port_name, fcport->login_retry); 727 } 728 return; 729 } 730 731 if (fcport->last_rscn_gen != fcport->rscn_gen) { 732 qla_rscn_replay(fcport); 733 qlt_schedule_sess_for_deletion(fcport); 734 return; 735 } else if (fcport->last_login_gen != fcport->login_gen) { 736 ql_dbg(ql_dbg_disc, vha, 0x20e0, 737 "%s %8phC login gen changed\n", 738 __func__, fcport->port_name); 739 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 740 return; 741 } 742 743 n = ea->data[0] / sizeof(struct get_name_list_extended); 744 745 ql_dbg(ql_dbg_disc, vha, 0x20e1, 746 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 747 __func__, __LINE__, fcport->port_name, n, 748 fcport->d_id.b.domain, fcport->d_id.b.area, 749 fcport->d_id.b.al_pa, fcport->loop_id); 750 751 for (i = 0; i < n; i++) { 752 e = &vha->gnl.l[i]; 753 wwn = wwn_to_u64(e->port_name); 754 id.b.domain = e->port_id[2]; 755 id.b.area = e->port_id[1]; 756 id.b.al_pa = e->port_id[0]; 757 id.b.rsvd_1 = 0; 758 759 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 760 continue; 761 762 if (IS_SW_RESV_ADDR(id)) 763 continue; 764 765 found = 1; 766 767 loop_id = le16_to_cpu(e->nport_handle); 768 loop_id = (loop_id & 0x7fff); 769 nvme_cls = e->current_login_state >> 4; 770 current_login_state = e->current_login_state & 0xf; 771 772 if (PRLI_PHASE(nvme_cls)) { 773 current_login_state = nvme_cls; 774 fcport->fc4_type &= ~FS_FC4TYPE_FCP; 775 fcport->fc4_type |= FS_FC4TYPE_NVME; 776 } else if (PRLI_PHASE(current_login_state)) { 777 fcport->fc4_type |= FS_FC4TYPE_FCP; 778 fcport->fc4_type &= ~FS_FC4TYPE_NVME; 779 } 780 781 ql_dbg(ql_dbg_disc, vha, 0x20e2, 782 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 783 __func__, fcport->port_name, 784 e->current_login_state, fcport->fw_login_state, 785 fcport->fc4_type, id.b24, fcport->d_id.b24, 786 loop_id, fcport->loop_id); 787 788 switch (fcport->disc_state) { 789 case DSC_DELETE_PEND: 790 case DSC_DELETED: 791 break; 792 default: 793 if ((id.b24 != fcport->d_id.b24 && 794 fcport->d_id.b24 && 795 fcport->loop_id != FC_NO_LOOP_ID) || 796 (fcport->loop_id != FC_NO_LOOP_ID && 797 fcport->loop_id != loop_id)) { 798 ql_dbg(ql_dbg_disc, vha, 0x20e3, 799 "%s %d %8phC post del sess\n", 800 __func__, __LINE__, fcport->port_name); 801 if (fcport->n2n_flag) 802 fcport->d_id.b24 = 0; 803 qlt_schedule_sess_for_deletion(fcport); 804 return; 805 } 806 break; 807 } 808 809 fcport->loop_id = loop_id; 810 if (fcport->n2n_flag) 811 fcport->d_id.b24 = id.b24; 812 813 wwn = wwn_to_u64(fcport->port_name); 814 qlt_find_sess_invalidate_other(vha, wwn, 815 id, loop_id, &conflict_fcport); 816 817 if (conflict_fcport) { 818 /* 819 * Another share fcport share the same loop_id & 820 * nport id. Conflict fcport needs to finish 821 * cleanup before this fcport can proceed to login. 822 */ 823 conflict_fcport->conflict = fcport; 824 fcport->login_pause = 1; 825 } 826 827 switch (vha->hw->current_topology) { 828 default: 829 switch (current_login_state) { 830 case DSC_LS_PRLI_COMP: 831 ql_dbg(ql_dbg_disc, 832 vha, 0x20e4, "%s %d %8phC post gpdb\n", 833 __func__, __LINE__, fcport->port_name); 834 835 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 836 fcport->port_type = FCT_INITIATOR; 837 else 838 fcport->port_type = FCT_TARGET; 839 data[0] = data[1] = 0; 840 qla2x00_post_async_adisc_work(vha, fcport, 841 data); 842 break; 843 case DSC_LS_PLOGI_COMP: 844 if (vha->hw->flags.edif_enabled) { 845 /* check to see if App support Secure */ 846 qla24xx_post_gpdb_work(vha, fcport, 0); 847 break; 848 } 849 fallthrough; 850 case DSC_LS_PORT_UNAVAIL: 851 default: 852 if (fcport->loop_id == FC_NO_LOOP_ID) { 853 qla2x00_find_new_loop_id(vha, fcport); 854 fcport->fw_login_state = 855 DSC_LS_PORT_UNAVAIL; 856 } 857 ql_dbg(ql_dbg_disc, vha, 0x20e5, 858 "%s %d %8phC\n", __func__, __LINE__, 859 fcport->port_name); 860 qla24xx_fcport_handle_login(vha, fcport); 861 break; 862 } 863 break; 864 case ISP_CFG_N: 865 fcport->fw_login_state = current_login_state; 866 fcport->d_id = id; 867 switch (current_login_state) { 868 case DSC_LS_PRLI_PEND: 869 /* 870 * In the middle of PRLI. Let it finish. 871 * Allow relogin code to recheck state again 872 * with GNL. Push disc_state back to DELETED 873 * so GNL can go out again 874 */ 875 qla2x00_set_fcport_disc_state(fcport, 876 DSC_DELETED); 877 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 878 break; 879 case DSC_LS_PRLI_COMP: 880 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 881 fcport->port_type = FCT_INITIATOR; 882 else 883 fcport->port_type = FCT_TARGET; 884 885 data[0] = data[1] = 0; 886 qla2x00_post_async_adisc_work(vha, fcport, 887 data); 888 break; 889 case DSC_LS_PLOGI_COMP: 890 if (vha->hw->flags.edif_enabled && 891 DBELL_ACTIVE(vha)) { 892 /* check to see if App support secure or not */ 893 qla24xx_post_gpdb_work(vha, fcport, 0); 894 break; 895 } 896 if (fcport_is_bigger(fcport)) { 897 /* local adapter is smaller */ 898 if (fcport->loop_id != FC_NO_LOOP_ID) 899 qla2x00_clear_loop_id(fcport); 900 901 fcport->loop_id = loop_id; 902 qla24xx_fcport_handle_login(vha, 903 fcport); 904 break; 905 } 906 fallthrough; 907 default: 908 if (fcport_is_smaller(fcport)) { 909 /* local adapter is bigger */ 910 if (fcport->loop_id != FC_NO_LOOP_ID) 911 qla2x00_clear_loop_id(fcport); 912 913 fcport->loop_id = loop_id; 914 qla24xx_fcport_handle_login(vha, 915 fcport); 916 } 917 break; 918 } 919 break; 920 } /* switch (ha->current_topology) */ 921 } 922 923 if (!found) { 924 switch (vha->hw->current_topology) { 925 case ISP_CFG_F: 926 case ISP_CFG_FL: 927 for (i = 0; i < n; i++) { 928 e = &vha->gnl.l[i]; 929 id.b.domain = e->port_id[0]; 930 id.b.area = e->port_id[1]; 931 id.b.al_pa = e->port_id[2]; 932 id.b.rsvd_1 = 0; 933 loop_id = le16_to_cpu(e->nport_handle); 934 935 if (fcport->d_id.b24 == id.b24) { 936 conflict_fcport = 937 qla2x00_find_fcport_by_wwpn(vha, 938 e->port_name, 0); 939 if (conflict_fcport) { 940 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 941 vha, 0x20e5, 942 "%s %d %8phC post del sess\n", 943 __func__, __LINE__, 944 conflict_fcport->port_name); 945 qlt_schedule_sess_for_deletion 946 (conflict_fcport); 947 } 948 } 949 /* 950 * FW already picked this loop id for 951 * another fcport 952 */ 953 if (fcport->loop_id == loop_id) 954 fcport->loop_id = FC_NO_LOOP_ID; 955 } 956 qla24xx_fcport_handle_login(vha, fcport); 957 break; 958 case ISP_CFG_N: 959 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 960 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 961 if (fcport->n2n_link_reset_cnt < 2) { 962 fcport->n2n_link_reset_cnt++; 963 /* 964 * remote port is not sending PLOGI. 965 * Reset link to kick start his state 966 * machine 967 */ 968 set_bit(N2N_LINK_RESET, 969 &vha->dpc_flags); 970 } else { 971 if (fcport->n2n_chip_reset < 1) { 972 ql_log(ql_log_info, vha, 0x705d, 973 "Chip reset to bring laser down"); 974 set_bit(ISP_ABORT_NEEDED, 975 &vha->dpc_flags); 976 fcport->n2n_chip_reset++; 977 } else { 978 ql_log(ql_log_info, vha, 0x705d, 979 "Remote port %8ph is not coming back\n", 980 fcport->port_name); 981 fcport->scan_state = 0; 982 } 983 } 984 qla2xxx_wake_dpc(vha); 985 } else { 986 /* 987 * report port suppose to do PLOGI. Give him 988 * more time. FW will catch it. 989 */ 990 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 991 } 992 break; 993 case ISP_CFG_NL: 994 qla24xx_fcport_handle_login(vha, fcport); 995 break; 996 default: 997 break; 998 } 999 } 1000 } /* gnl_event */ 1001 1002 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 1003 { 1004 struct scsi_qla_host *vha = sp->vha; 1005 unsigned long flags; 1006 struct fc_port *fcport = NULL, *tf; 1007 u16 i, n = 0, loop_id; 1008 struct event_arg ea; 1009 struct get_name_list_extended *e; 1010 u64 wwn; 1011 struct list_head h; 1012 bool found = false; 1013 1014 ql_dbg(ql_dbg_disc, vha, 0x20e7, 1015 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 1016 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 1017 sp->u.iocb_cmd.u.mbx.in_mb[2]); 1018 1019 1020 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 1021 memset(&ea, 0, sizeof(ea)); 1022 ea.sp = sp; 1023 ea.rc = res; 1024 1025 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 1026 sizeof(struct get_name_list_extended)) { 1027 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 1028 sizeof(struct get_name_list_extended); 1029 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 1030 } 1031 1032 for (i = 0; i < n; i++) { 1033 e = &vha->gnl.l[i]; 1034 loop_id = le16_to_cpu(e->nport_handle); 1035 /* mask out reserve bit */ 1036 loop_id = (loop_id & 0x7fff); 1037 set_bit(loop_id, vha->hw->loop_id_map); 1038 wwn = wwn_to_u64(e->port_name); 1039 1040 ql_dbg(ql_dbg_disc, vha, 0x20e8, 1041 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 1042 __func__, &wwn, e->port_id[2], e->port_id[1], 1043 e->port_id[0], e->current_login_state, e->last_login_state, 1044 (loop_id & 0x7fff)); 1045 } 1046 1047 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1048 1049 INIT_LIST_HEAD(&h); 1050 fcport = tf = NULL; 1051 if (!list_empty(&vha->gnl.fcports)) 1052 list_splice_init(&vha->gnl.fcports, &h); 1053 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1054 1055 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1056 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1057 list_del_init(&fcport->gnl_entry); 1058 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1059 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1060 ea.fcport = fcport; 1061 1062 qla24xx_handle_gnl_done_event(vha, &ea); 1063 } 1064 1065 /* create new fcport if fw has knowledge of new sessions */ 1066 for (i = 0; i < n; i++) { 1067 port_id_t id; 1068 u64 wwnn; 1069 1070 e = &vha->gnl.l[i]; 1071 wwn = wwn_to_u64(e->port_name); 1072 1073 found = false; 1074 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1075 if (!memcmp((u8 *)&wwn, fcport->port_name, 1076 WWN_SIZE)) { 1077 found = true; 1078 break; 1079 } 1080 } 1081 1082 id.b.domain = e->port_id[2]; 1083 id.b.area = e->port_id[1]; 1084 id.b.al_pa = e->port_id[0]; 1085 id.b.rsvd_1 = 0; 1086 1087 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1088 ql_dbg(ql_dbg_disc, vha, 0x2065, 1089 "%s %d %8phC %06x post new sess\n", 1090 __func__, __LINE__, (u8 *)&wwn, id.b24); 1091 wwnn = wwn_to_u64(e->node_name); 1092 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1093 (u8 *)&wwnn, NULL, 0); 1094 } 1095 } 1096 1097 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1098 vha->gnl.sent = 0; 1099 if (!list_empty(&vha->gnl.fcports)) { 1100 /* retrigger gnl */ 1101 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports, 1102 gnl_entry) { 1103 list_del_init(&fcport->gnl_entry); 1104 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1105 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS) 1106 break; 1107 } 1108 } 1109 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1110 1111 /* ref: INIT */ 1112 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1113 } 1114 1115 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1116 { 1117 srb_t *sp; 1118 int rval = QLA_FUNCTION_FAILED; 1119 unsigned long flags; 1120 u16 *mb; 1121 1122 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1123 return rval; 1124 1125 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1126 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1127 1128 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1129 fcport->flags |= FCF_ASYNC_SENT; 1130 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1131 fcport->last_rscn_gen = fcport->rscn_gen; 1132 fcport->last_login_gen = fcport->login_gen; 1133 1134 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1135 if (vha->gnl.sent) { 1136 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1137 return QLA_SUCCESS; 1138 } 1139 vha->gnl.sent = 1; 1140 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1141 1142 /* ref: INIT */ 1143 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1144 if (!sp) 1145 goto done; 1146 1147 sp->type = SRB_MB_IOCB; 1148 sp->name = "gnlist"; 1149 sp->gen1 = fcport->rscn_gen; 1150 sp->gen2 = fcport->login_gen; 1151 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1152 qla24xx_async_gnl_sp_done); 1153 1154 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1155 mb[0] = MBC_PORT_NODE_NAME_LIST; 1156 mb[1] = BIT_2 | BIT_3; 1157 mb[2] = MSW(vha->gnl.ldma); 1158 mb[3] = LSW(vha->gnl.ldma); 1159 mb[6] = MSW(MSD(vha->gnl.ldma)); 1160 mb[7] = LSW(MSD(vha->gnl.ldma)); 1161 mb[8] = vha->gnl.size; 1162 mb[9] = vha->vp_idx; 1163 1164 ql_dbg(ql_dbg_disc, vha, 0x20da, 1165 "Async-%s - OUT WWPN %8phC hndl %x\n", 1166 sp->name, fcport->port_name, sp->handle); 1167 1168 rval = qla2x00_start_sp(sp); 1169 if (rval != QLA_SUCCESS) 1170 goto done_free_sp; 1171 1172 return rval; 1173 1174 done_free_sp: 1175 /* ref: INIT */ 1176 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1177 done: 1178 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT); 1179 return rval; 1180 } 1181 1182 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1183 { 1184 struct qla_work_evt *e; 1185 1186 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1187 if (!e) 1188 return QLA_FUNCTION_FAILED; 1189 1190 e->u.fcport.fcport = fcport; 1191 fcport->flags |= FCF_ASYNC_ACTIVE; 1192 return qla2x00_post_work(vha, e); 1193 } 1194 1195 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1196 { 1197 struct scsi_qla_host *vha = sp->vha; 1198 struct qla_hw_data *ha = vha->hw; 1199 fc_port_t *fcport = sp->fcport; 1200 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1201 struct event_arg ea; 1202 1203 ql_dbg(ql_dbg_disc, vha, 0x20db, 1204 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1205 sp->name, res, fcport->port_name, mb[1], mb[2]); 1206 1207 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1208 1209 if (res == QLA_FUNCTION_TIMEOUT) 1210 goto done; 1211 1212 memset(&ea, 0, sizeof(ea)); 1213 ea.fcport = fcport; 1214 ea.sp = sp; 1215 1216 qla24xx_handle_gpdb_event(vha, &ea); 1217 1218 done: 1219 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1220 sp->u.iocb_cmd.u.mbx.in_dma); 1221 1222 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1223 } 1224 1225 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1226 { 1227 struct qla_work_evt *e; 1228 1229 if (vha->host->active_mode == MODE_TARGET) 1230 return QLA_FUNCTION_FAILED; 1231 1232 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1233 if (!e) 1234 return QLA_FUNCTION_FAILED; 1235 1236 e->u.fcport.fcport = fcport; 1237 1238 return qla2x00_post_work(vha, e); 1239 } 1240 1241 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1242 { 1243 struct scsi_qla_host *vha = sp->vha; 1244 struct srb_iocb *lio = &sp->u.iocb_cmd; 1245 struct event_arg ea; 1246 1247 ql_dbg(ql_dbg_disc, vha, 0x2129, 1248 "%s %8phC res %x\n", __func__, 1249 sp->fcport->port_name, res); 1250 1251 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1252 1253 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1254 memset(&ea, 0, sizeof(ea)); 1255 ea.fcport = sp->fcport; 1256 ea.data[0] = lio->u.logio.data[0]; 1257 ea.data[1] = lio->u.logio.data[1]; 1258 ea.iop[0] = lio->u.logio.iop[0]; 1259 ea.iop[1] = lio->u.logio.iop[1]; 1260 ea.sp = sp; 1261 if (res == QLA_OS_TIMER_EXPIRED) 1262 ea.data[0] = QLA_OS_TIMER_EXPIRED; 1263 else if (res) 1264 ea.data[0] = MBS_COMMAND_ERROR; 1265 1266 qla24xx_handle_prli_done_event(vha, &ea); 1267 } 1268 1269 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1270 } 1271 1272 int 1273 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1274 { 1275 srb_t *sp; 1276 struct srb_iocb *lio; 1277 int rval = QLA_FUNCTION_FAILED; 1278 1279 if (!vha->flags.online) { 1280 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1281 __func__, __LINE__, fcport->port_name); 1282 return rval; 1283 } 1284 1285 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1286 fcport->fw_login_state == DSC_LS_PRLI_PEND) && 1287 qla_dual_mode_enabled(vha)) { 1288 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1289 __func__, __LINE__, fcport->port_name); 1290 return rval; 1291 } 1292 1293 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1294 if (!sp) 1295 return rval; 1296 1297 fcport->flags |= FCF_ASYNC_SENT; 1298 fcport->logout_completed = 0; 1299 1300 sp->type = SRB_PRLI_CMD; 1301 sp->name = "prli"; 1302 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1303 qla2x00_async_prli_sp_done); 1304 1305 lio = &sp->u.iocb_cmd; 1306 lio->u.logio.flags = 0; 1307 1308 if (NVME_TARGET(vha->hw, fcport)) 1309 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1310 1311 ql_dbg(ql_dbg_disc, vha, 0x211b, 1312 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n", 1313 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1314 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority, 1315 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp"); 1316 1317 rval = qla2x00_start_sp(sp); 1318 if (rval != QLA_SUCCESS) { 1319 fcport->flags |= FCF_LOGIN_NEEDED; 1320 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1321 goto done_free_sp; 1322 } 1323 1324 return rval; 1325 1326 done_free_sp: 1327 /* ref: INIT */ 1328 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1329 fcport->flags &= ~FCF_ASYNC_SENT; 1330 return rval; 1331 } 1332 1333 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1334 { 1335 struct qla_work_evt *e; 1336 1337 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1338 if (!e) 1339 return QLA_FUNCTION_FAILED; 1340 1341 e->u.fcport.fcport = fcport; 1342 e->u.fcport.opt = opt; 1343 fcport->flags |= FCF_ASYNC_ACTIVE; 1344 return qla2x00_post_work(vha, e); 1345 } 1346 1347 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1348 { 1349 srb_t *sp; 1350 struct srb_iocb *mbx; 1351 int rval = QLA_FUNCTION_FAILED; 1352 u16 *mb; 1353 dma_addr_t pd_dma; 1354 struct port_database_24xx *pd; 1355 struct qla_hw_data *ha = vha->hw; 1356 1357 if (IS_SESSION_DELETED(fcport)) { 1358 ql_log(ql_log_warn, vha, 0xffff, 1359 "%s: %8phC is being delete - not sending command.\n", 1360 __func__, fcport->port_name); 1361 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1362 return rval; 1363 } 1364 1365 if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) { 1366 ql_log(ql_log_warn, vha, 0xffff, 1367 "%s: %8phC online %d flags %x - not sending command.\n", 1368 __func__, fcport->port_name, vha->flags.online, fcport->flags); 1369 goto done; 1370 } 1371 1372 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1373 if (!sp) 1374 goto done; 1375 1376 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB); 1377 1378 fcport->flags |= FCF_ASYNC_SENT; 1379 sp->type = SRB_MB_IOCB; 1380 sp->name = "gpdb"; 1381 sp->gen1 = fcport->rscn_gen; 1382 sp->gen2 = fcport->login_gen; 1383 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1384 qla24xx_async_gpdb_sp_done); 1385 1386 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1387 if (pd == NULL) { 1388 ql_log(ql_log_warn, vha, 0xd043, 1389 "Failed to allocate port database structure.\n"); 1390 goto done_free_sp; 1391 } 1392 1393 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1394 mb[0] = MBC_GET_PORT_DATABASE; 1395 mb[1] = fcport->loop_id; 1396 mb[2] = MSW(pd_dma); 1397 mb[3] = LSW(pd_dma); 1398 mb[6] = MSW(MSD(pd_dma)); 1399 mb[7] = LSW(MSD(pd_dma)); 1400 mb[9] = vha->vp_idx; 1401 mb[10] = opt; 1402 1403 mbx = &sp->u.iocb_cmd; 1404 mbx->u.mbx.in = (void *)pd; 1405 mbx->u.mbx.in_dma = pd_dma; 1406 1407 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1408 "Async-%s %8phC hndl %x opt %x\n", 1409 sp->name, fcport->port_name, sp->handle, opt); 1410 1411 rval = qla2x00_start_sp(sp); 1412 if (rval != QLA_SUCCESS) 1413 goto done_free_sp; 1414 return rval; 1415 1416 done_free_sp: 1417 if (pd) 1418 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1419 1420 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1421 fcport->flags &= ~FCF_ASYNC_SENT; 1422 done: 1423 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1424 qla24xx_post_gpdb_work(vha, fcport, opt); 1425 return rval; 1426 } 1427 1428 static 1429 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1430 { 1431 unsigned long flags; 1432 1433 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1434 ea->fcport->login_gen++; 1435 ea->fcport->deleted = 0; 1436 ea->fcport->logout_on_delete = 1; 1437 1438 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1439 vha->fcport_count++; 1440 ea->fcport->login_succ = 1; 1441 1442 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1443 qla24xx_sched_upd_fcport(ea->fcport); 1444 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1445 } else if (ea->fcport->login_succ) { 1446 /* 1447 * We have an existing session. A late RSCN delivery 1448 * must have triggered the session to be re-validate. 1449 * Session is still valid. 1450 */ 1451 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1452 "%s %d %8phC session revalidate success\n", 1453 __func__, __LINE__, ea->fcport->port_name); 1454 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE); 1455 } 1456 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1457 } 1458 1459 static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport, 1460 struct port_database_24xx *pd) 1461 { 1462 int rc = 0; 1463 1464 if (pd->secure_login) { 1465 ql_dbg(ql_dbg_disc, vha, 0x104d, 1466 "Secure Login established on %8phC\n", 1467 fcport->port_name); 1468 fcport->flags |= FCF_FCSP_DEVICE; 1469 } else { 1470 ql_dbg(ql_dbg_disc, vha, 0x104d, 1471 "non-Secure Login %8phC", 1472 fcport->port_name); 1473 fcport->flags &= ~FCF_FCSP_DEVICE; 1474 } 1475 if (vha->hw->flags.edif_enabled) { 1476 if (fcport->flags & FCF_FCSP_DEVICE) { 1477 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND); 1478 /* Start edif prli timer & ring doorbell for app */ 1479 fcport->edif.rx_sa_set = 0; 1480 fcport->edif.tx_sa_set = 0; 1481 fcport->edif.rx_sa_pending = 0; 1482 fcport->edif.tx_sa_pending = 0; 1483 1484 qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE, 1485 fcport->d_id.b24); 1486 1487 if (DBELL_ACTIVE(vha)) { 1488 ql_dbg(ql_dbg_disc, vha, 0x20ef, 1489 "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n", 1490 __func__, __LINE__, fcport->port_name); 1491 fcport->edif.app_sess_online = 1; 1492 1493 qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED, 1494 fcport->d_id.b24, 0, fcport); 1495 } 1496 1497 rc = 1; 1498 } else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 1499 ql_dbg(ql_dbg_disc, vha, 0x2117, 1500 "%s %d %8phC post prli\n", 1501 __func__, __LINE__, fcport->port_name); 1502 qla24xx_post_prli_work(vha, fcport); 1503 rc = 1; 1504 } 1505 } 1506 return rc; 1507 } 1508 1509 static 1510 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1511 { 1512 fc_port_t *fcport = ea->fcport; 1513 struct port_database_24xx *pd; 1514 struct srb *sp = ea->sp; 1515 uint8_t ls; 1516 1517 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1518 1519 fcport->flags &= ~FCF_ASYNC_SENT; 1520 1521 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1522 "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__, 1523 fcport->port_name, fcport->disc_state, pd->current_login_state, 1524 fcport->fc4_type, ea->rc); 1525 1526 if (fcport->disc_state == DSC_DELETE_PEND) { 1527 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n", 1528 __func__, __LINE__, fcport->port_name); 1529 return; 1530 } 1531 1532 if (NVME_TARGET(vha->hw, fcport)) 1533 ls = pd->current_login_state >> 4; 1534 else 1535 ls = pd->current_login_state & 0xf; 1536 1537 if (ea->sp->gen2 != fcport->login_gen) { 1538 /* target side must have changed it. */ 1539 1540 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1541 "%s %8phC generation changed\n", 1542 __func__, fcport->port_name); 1543 return; 1544 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1545 qla_rscn_replay(fcport); 1546 qlt_schedule_sess_for_deletion(fcport); 1547 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1548 __func__, __LINE__, fcport->port_name, ls); 1549 return; 1550 } 1551 1552 switch (ls) { 1553 case PDS_PRLI_COMPLETE: 1554 __qla24xx_parse_gpdb(vha, fcport, pd); 1555 break; 1556 case PDS_PLOGI_COMPLETE: 1557 if (qla_chk_secure_login(vha, fcport, pd)) { 1558 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1559 __func__, __LINE__, fcport->port_name, ls); 1560 return; 1561 } 1562 fallthrough; 1563 case PDS_PLOGI_PENDING: 1564 case PDS_PRLI_PENDING: 1565 case PDS_PRLI2_PENDING: 1566 /* Set discovery state back to GNL to Relogin attempt */ 1567 if (qla_dual_mode_enabled(vha) || 1568 qla_ini_mode_enabled(vha)) { 1569 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1570 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1571 } 1572 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1573 __func__, __LINE__, fcport->port_name, ls); 1574 return; 1575 case PDS_LOGO_PENDING: 1576 case PDS_PORT_UNAVAILABLE: 1577 default: 1578 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1579 __func__, __LINE__, fcport->port_name); 1580 qlt_schedule_sess_for_deletion(fcport); 1581 return; 1582 } 1583 __qla24xx_handle_gpdb_event(vha, ea); 1584 } /* gpdb event */ 1585 1586 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1587 { 1588 u8 login = 0; 1589 int rc; 1590 1591 ql_dbg(ql_dbg_disc, vha, 0x307b, 1592 "%s %8phC DS %d LS %d lid %d retries=%d\n", 1593 __func__, fcport->port_name, fcport->disc_state, 1594 fcport->fw_login_state, fcport->loop_id, fcport->login_retry); 1595 1596 if (qla_tgt_mode_enabled(vha)) 1597 return; 1598 1599 if (qla_dual_mode_enabled(vha)) { 1600 if (N2N_TOPO(vha->hw)) { 1601 u64 mywwn, wwn; 1602 1603 mywwn = wwn_to_u64(vha->port_name); 1604 wwn = wwn_to_u64(fcport->port_name); 1605 if (mywwn > wwn) 1606 login = 1; 1607 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1608 && time_after_eq(jiffies, 1609 fcport->plogi_nack_done_deadline)) 1610 login = 1; 1611 } else { 1612 login = 1; 1613 } 1614 } else { 1615 /* initiator mode */ 1616 login = 1; 1617 } 1618 1619 if (login && fcport->login_retry) { 1620 fcport->login_retry--; 1621 if (fcport->loop_id == FC_NO_LOOP_ID) { 1622 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1623 rc = qla2x00_find_new_loop_id(vha, fcport); 1624 if (rc) { 1625 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1626 "%s %d %8phC post del sess - out of loopid\n", 1627 __func__, __LINE__, fcport->port_name); 1628 fcport->scan_state = 0; 1629 qlt_schedule_sess_for_deletion(fcport); 1630 return; 1631 } 1632 } 1633 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1634 "%s %d %8phC post login\n", 1635 __func__, __LINE__, fcport->port_name); 1636 qla2x00_post_async_login_work(vha, fcport, NULL); 1637 } 1638 } 1639 1640 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1641 { 1642 u16 data[2]; 1643 u64 wwn; 1644 u16 sec; 1645 1646 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1647 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n", 1648 __func__, fcport->port_name, fcport->disc_state, 1649 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1650 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1651 fcport->login_gen, fcport->loop_id, fcport->scan_state, 1652 fcport->fc4_type); 1653 1654 if (fcport->scan_state != QLA_FCPORT_FOUND || 1655 fcport->disc_state == DSC_DELETE_PEND) 1656 return 0; 1657 1658 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1659 qla_dual_mode_enabled(vha) && 1660 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1661 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1662 return 0; 1663 1664 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1665 !N2N_TOPO(vha->hw)) { 1666 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1667 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1668 return 0; 1669 } 1670 } 1671 1672 /* Target won't initiate port login if fabric is present */ 1673 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1674 return 0; 1675 1676 if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) { 1677 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1678 return 0; 1679 } 1680 1681 switch (fcport->disc_state) { 1682 case DSC_DELETED: 1683 wwn = wwn_to_u64(fcport->node_name); 1684 switch (vha->hw->current_topology) { 1685 case ISP_CFG_N: 1686 if (fcport_is_smaller(fcport)) { 1687 /* this adapter is bigger */ 1688 if (fcport->login_retry) { 1689 if (fcport->loop_id == FC_NO_LOOP_ID) { 1690 qla2x00_find_new_loop_id(vha, 1691 fcport); 1692 fcport->fw_login_state = 1693 DSC_LS_PORT_UNAVAIL; 1694 } 1695 fcport->login_retry--; 1696 qla_post_els_plogi_work(vha, fcport); 1697 } else { 1698 ql_log(ql_log_info, vha, 0x705d, 1699 "Unable to reach remote port %8phC", 1700 fcport->port_name); 1701 } 1702 } else { 1703 qla24xx_post_gnl_work(vha, fcport); 1704 } 1705 break; 1706 default: 1707 if (wwn == 0) { 1708 ql_dbg(ql_dbg_disc, vha, 0xffff, 1709 "%s %d %8phC post GNNID\n", 1710 __func__, __LINE__, fcport->port_name); 1711 qla24xx_post_gnnid_work(vha, fcport); 1712 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1713 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1714 "%s %d %8phC post gnl\n", 1715 __func__, __LINE__, fcport->port_name); 1716 qla24xx_post_gnl_work(vha, fcport); 1717 } else { 1718 qla_chk_n2n_b4_login(vha, fcport); 1719 } 1720 break; 1721 } 1722 break; 1723 1724 case DSC_GNL: 1725 switch (vha->hw->current_topology) { 1726 case ISP_CFG_N: 1727 if ((fcport->current_login_state & 0xf) == 0x6) { 1728 ql_dbg(ql_dbg_disc, vha, 0x2118, 1729 "%s %d %8phC post GPDB work\n", 1730 __func__, __LINE__, fcport->port_name); 1731 fcport->chip_reset = 1732 vha->hw->base_qpair->chip_reset; 1733 qla24xx_post_gpdb_work(vha, fcport, 0); 1734 } else { 1735 ql_dbg(ql_dbg_disc, vha, 0x2118, 1736 "%s %d %8phC post %s PRLI\n", 1737 __func__, __LINE__, fcport->port_name, 1738 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1739 "FC"); 1740 qla24xx_post_prli_work(vha, fcport); 1741 } 1742 break; 1743 default: 1744 if (fcport->login_pause) { 1745 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1746 "%s %d %8phC exit\n", 1747 __func__, __LINE__, 1748 fcport->port_name); 1749 fcport->last_rscn_gen = fcport->rscn_gen; 1750 fcport->last_login_gen = fcport->login_gen; 1751 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1752 break; 1753 } 1754 qla_chk_n2n_b4_login(vha, fcport); 1755 break; 1756 } 1757 break; 1758 1759 case DSC_LOGIN_FAILED: 1760 if (N2N_TOPO(vha->hw)) 1761 qla_chk_n2n_b4_login(vha, fcport); 1762 else 1763 qlt_schedule_sess_for_deletion(fcport); 1764 break; 1765 1766 case DSC_LOGIN_COMPLETE: 1767 /* recheck login state */ 1768 data[0] = data[1] = 0; 1769 qla2x00_post_async_adisc_work(vha, fcport, data); 1770 break; 1771 1772 case DSC_LOGIN_PEND: 1773 if (vha->hw->flags.edif_enabled) 1774 break; 1775 1776 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1777 ql_dbg(ql_dbg_disc, vha, 0x2118, 1778 "%s %d %8phC post %s PRLI\n", 1779 __func__, __LINE__, fcport->port_name, 1780 NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC"); 1781 qla24xx_post_prli_work(vha, fcport); 1782 } 1783 break; 1784 1785 case DSC_UPD_FCPORT: 1786 sec = jiffies_to_msecs(jiffies - 1787 fcport->jiffies_at_registration)/1000; 1788 if (fcport->sec_since_registration < sec && sec && 1789 !(sec % 60)) { 1790 fcport->sec_since_registration = sec; 1791 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1792 "%s %8phC - Slow Rport registration(%d Sec)\n", 1793 __func__, fcport->port_name, sec); 1794 } 1795 1796 if (fcport->next_disc_state != DSC_DELETE_PEND) 1797 fcport->next_disc_state = DSC_ADISC; 1798 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1799 break; 1800 1801 default: 1802 break; 1803 } 1804 1805 return 0; 1806 } 1807 1808 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1809 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1810 { 1811 struct qla_work_evt *e; 1812 1813 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1814 if (!e) 1815 return QLA_FUNCTION_FAILED; 1816 1817 e->u.new_sess.id = *id; 1818 e->u.new_sess.pla = pla; 1819 e->u.new_sess.fc4_type = fc4_type; 1820 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1821 if (node_name) 1822 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1823 1824 return qla2x00_post_work(vha, e); 1825 } 1826 1827 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1828 { 1829 fc_port_t *fcport; 1830 unsigned long flags; 1831 1832 switch (ea->id.b.rsvd_1) { 1833 case RSCN_PORT_ADDR: 1834 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1835 if (fcport) { 1836 if (fcport->flags & FCF_FCP2_DEVICE && 1837 atomic_read(&fcport->state) == FCS_ONLINE) { 1838 ql_dbg(ql_dbg_disc, vha, 0x2115, 1839 "Delaying session delete for FCP2 portid=%06x %8phC ", 1840 fcport->d_id.b24, fcport->port_name); 1841 return; 1842 } 1843 1844 if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) { 1845 /* 1846 * On ipsec start by remote port, Target port 1847 * may use RSCN to trigger initiator to 1848 * relogin. If driver is already in the 1849 * process of a relogin, then ignore the RSCN 1850 * and allow the current relogin to continue. 1851 * This reduces thrashing of the connection. 1852 */ 1853 if (atomic_read(&fcport->state) == FCS_ONLINE) { 1854 /* 1855 * If state = online, then set scan_needed=1 to do relogin. 1856 * Otherwise we're already in the middle of a relogin 1857 */ 1858 fcport->scan_needed = 1; 1859 fcport->rscn_gen++; 1860 } 1861 } else { 1862 fcport->scan_needed = 1; 1863 fcport->rscn_gen++; 1864 } 1865 } 1866 break; 1867 case RSCN_AREA_ADDR: 1868 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1869 if (fcport->flags & FCF_FCP2_DEVICE && 1870 atomic_read(&fcport->state) == FCS_ONLINE) 1871 continue; 1872 1873 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) { 1874 fcport->scan_needed = 1; 1875 fcport->rscn_gen++; 1876 } 1877 } 1878 break; 1879 case RSCN_DOM_ADDR: 1880 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1881 if (fcport->flags & FCF_FCP2_DEVICE && 1882 atomic_read(&fcport->state) == FCS_ONLINE) 1883 continue; 1884 1885 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) { 1886 fcport->scan_needed = 1; 1887 fcport->rscn_gen++; 1888 } 1889 } 1890 break; 1891 case RSCN_FAB_ADDR: 1892 default: 1893 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1894 if (fcport->flags & FCF_FCP2_DEVICE && 1895 atomic_read(&fcport->state) == FCS_ONLINE) 1896 continue; 1897 1898 fcport->scan_needed = 1; 1899 fcport->rscn_gen++; 1900 } 1901 break; 1902 } 1903 1904 spin_lock_irqsave(&vha->work_lock, flags); 1905 if (vha->scan.scan_flags == 0) { 1906 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1907 vha->scan.scan_flags |= SF_QUEUED; 1908 schedule_delayed_work(&vha->scan.scan_work, 5); 1909 } 1910 spin_unlock_irqrestore(&vha->work_lock, flags); 1911 } 1912 1913 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1914 struct event_arg *ea) 1915 { 1916 fc_port_t *fcport = ea->fcport; 1917 1918 if (test_bit(UNLOADING, &vha->dpc_flags)) 1919 return; 1920 1921 ql_dbg(ql_dbg_disc, vha, 0x2102, 1922 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1923 __func__, fcport->port_name, fcport->disc_state, 1924 fcport->fw_login_state, fcport->login_pause, 1925 fcport->deleted, fcport->conflict, 1926 fcport->last_rscn_gen, fcport->rscn_gen, 1927 fcport->last_login_gen, fcport->login_gen, 1928 fcport->flags); 1929 1930 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1931 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1932 __func__, __LINE__, fcport->port_name); 1933 qla24xx_post_gnl_work(vha, fcport); 1934 return; 1935 } 1936 1937 qla24xx_fcport_handle_login(vha, fcport); 1938 } 1939 1940 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1941 struct event_arg *ea) 1942 { 1943 if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) && 1944 vha->hw->flags.edif_enabled) { 1945 /* check to see if App support Secure */ 1946 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1947 return; 1948 } 1949 1950 /* for pure Target Mode, PRLI will not be initiated */ 1951 if (vha->host->active_mode == MODE_TARGET) 1952 return; 1953 1954 ql_dbg(ql_dbg_disc, vha, 0x2118, 1955 "%s %d %8phC post PRLI\n", 1956 __func__, __LINE__, ea->fcport->port_name); 1957 qla24xx_post_prli_work(vha, ea->fcport); 1958 } 1959 1960 /* 1961 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1962 * to be consumed by the fcport 1963 */ 1964 void qla_rscn_replay(fc_port_t *fcport) 1965 { 1966 struct event_arg ea; 1967 1968 switch (fcport->disc_state) { 1969 case DSC_DELETE_PEND: 1970 return; 1971 default: 1972 break; 1973 } 1974 1975 if (fcport->scan_needed) { 1976 memset(&ea, 0, sizeof(ea)); 1977 ea.id = fcport->d_id; 1978 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1979 qla2x00_handle_rscn(fcport->vha, &ea); 1980 } 1981 } 1982 1983 static void 1984 qla2x00_tmf_iocb_timeout(void *data) 1985 { 1986 srb_t *sp = data; 1987 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1988 int rc, h; 1989 unsigned long flags; 1990 1991 rc = qla24xx_async_abort_cmd(sp, false); 1992 if (rc) { 1993 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 1994 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 1995 if (sp->qpair->req->outstanding_cmds[h] == sp) { 1996 sp->qpair->req->outstanding_cmds[h] = NULL; 1997 break; 1998 } 1999 } 2000 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 2001 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT); 2002 tmf->u.tmf.data = QLA_FUNCTION_FAILED; 2003 complete(&tmf->u.tmf.comp); 2004 } 2005 } 2006 2007 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 2008 { 2009 struct srb_iocb *tmf = &sp->u.iocb_cmd; 2010 2011 complete(&tmf->u.tmf.comp); 2012 } 2013 2014 int 2015 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 2016 uint32_t tag) 2017 { 2018 struct scsi_qla_host *vha = fcport->vha; 2019 struct srb_iocb *tm_iocb; 2020 srb_t *sp; 2021 int rval = QLA_FUNCTION_FAILED; 2022 2023 /* ref: INIT */ 2024 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 2025 if (!sp) 2026 goto done; 2027 2028 qla_vha_mark_busy(vha); 2029 sp->type = SRB_TM_CMD; 2030 sp->name = "tmf"; 2031 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), 2032 qla2x00_tmf_sp_done); 2033 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout; 2034 2035 tm_iocb = &sp->u.iocb_cmd; 2036 init_completion(&tm_iocb->u.tmf.comp); 2037 tm_iocb->u.tmf.flags = flags; 2038 tm_iocb->u.tmf.lun = lun; 2039 2040 ql_dbg(ql_dbg_taskm, vha, 0x802f, 2041 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 2042 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 2043 fcport->d_id.b.area, fcport->d_id.b.al_pa); 2044 2045 rval = qla2x00_start_sp(sp); 2046 if (rval != QLA_SUCCESS) 2047 goto done_free_sp; 2048 wait_for_completion(&tm_iocb->u.tmf.comp); 2049 2050 rval = tm_iocb->u.tmf.data; 2051 2052 if (rval != QLA_SUCCESS) { 2053 ql_log(ql_log_warn, vha, 0x8030, 2054 "TM IOCB failed (%x).\n", rval); 2055 } 2056 2057 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 2058 flags = tm_iocb->u.tmf.flags; 2059 lun = (uint16_t)tm_iocb->u.tmf.lun; 2060 2061 /* Issue Marker IOCB */ 2062 qla2x00_marker(vha, vha->hw->base_qpair, 2063 fcport->loop_id, lun, 2064 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 2065 } 2066 2067 done_free_sp: 2068 /* ref: INIT */ 2069 kref_put(&sp->cmd_kref, qla2x00_sp_release); 2070 fcport->flags &= ~FCF_ASYNC_SENT; 2071 done: 2072 return rval; 2073 } 2074 2075 int 2076 qla24xx_async_abort_command(srb_t *sp) 2077 { 2078 unsigned long flags = 0; 2079 2080 uint32_t handle; 2081 fc_port_t *fcport = sp->fcport; 2082 struct qla_qpair *qpair = sp->qpair; 2083 struct scsi_qla_host *vha = fcport->vha; 2084 struct req_que *req = qpair->req; 2085 2086 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 2087 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 2088 if (req->outstanding_cmds[handle] == sp) 2089 break; 2090 } 2091 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 2092 2093 if (handle == req->num_outstanding_cmds) { 2094 /* Command not found. */ 2095 return QLA_ERR_NOT_FOUND; 2096 } 2097 if (sp->type == SRB_FXIOCB_DCMD) 2098 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 2099 FXDISC_ABORT_IOCTL); 2100 2101 return qla24xx_async_abort_cmd(sp, true); 2102 } 2103 2104 static void 2105 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2106 { 2107 struct srb *sp; 2108 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2109 ea->data[0]); 2110 2111 switch (ea->data[0]) { 2112 case MBS_COMMAND_COMPLETE: 2113 ql_dbg(ql_dbg_disc, vha, 0x2118, 2114 "%s %d %8phC post gpdb\n", 2115 __func__, __LINE__, ea->fcport->port_name); 2116 2117 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2118 ea->fcport->logout_on_delete = 1; 2119 ea->fcport->nvme_prli_service_param = ea->iop[0]; 2120 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 2121 ea->fcport->nvme_first_burst_size = 2122 (ea->iop[1] & 0xffff) * 512; 2123 else 2124 ea->fcport->nvme_first_burst_size = 0; 2125 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2126 break; 2127 default: 2128 sp = ea->sp; 2129 ql_dbg(ql_dbg_disc, vha, 0x2118, 2130 "%s %d %8phC priority %s, fc4type %x prev try %s\n", 2131 __func__, __LINE__, ea->fcport->port_name, 2132 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ? 2133 "FCP" : "NVMe", ea->fcport->fc4_type, 2134 (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ? 2135 "NVME" : "FCP"); 2136 2137 if (NVME_FCP_TARGET(ea->fcport)) { 2138 if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) 2139 ea->fcport->do_prli_nvme = 0; 2140 else 2141 ea->fcport->do_prli_nvme = 1; 2142 } else { 2143 ea->fcport->do_prli_nvme = 0; 2144 } 2145 2146 if (N2N_TOPO(vha->hw)) { 2147 if (ea->fcport->n2n_link_reset_cnt == 2148 vha->hw->login_retry_count && 2149 ea->fcport->flags & FCF_FCSP_DEVICE) { 2150 /* remote authentication app just started */ 2151 ea->fcport->n2n_link_reset_cnt = 0; 2152 } 2153 2154 if (ea->fcport->n2n_link_reset_cnt < 2155 vha->hw->login_retry_count) { 2156 ea->fcport->n2n_link_reset_cnt++; 2157 vha->relogin_jif = jiffies + 2 * HZ; 2158 /* 2159 * PRLI failed. Reset link to kick start 2160 * state machine 2161 */ 2162 set_bit(N2N_LINK_RESET, &vha->dpc_flags); 2163 qla2xxx_wake_dpc(vha); 2164 } else { 2165 ql_log(ql_log_warn, vha, 0x2119, 2166 "%s %d %8phC Unable to reconnect\n", 2167 __func__, __LINE__, 2168 ea->fcport->port_name); 2169 } 2170 } else { 2171 /* 2172 * switch connect. login failed. Take connection down 2173 * and allow relogin to retrigger 2174 */ 2175 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2176 ea->fcport->keep_nport_handle = 0; 2177 ea->fcport->logout_on_delete = 1; 2178 qlt_schedule_sess_for_deletion(ea->fcport); 2179 } 2180 break; 2181 } 2182 } 2183 2184 void 2185 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2186 { 2187 port_id_t cid; /* conflict Nport id */ 2188 u16 lid; 2189 struct fc_port *conflict_fcport; 2190 unsigned long flags; 2191 struct fc_port *fcport = ea->fcport; 2192 2193 ql_dbg(ql_dbg_disc, vha, 0xffff, 2194 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 2195 __func__, fcport->port_name, fcport->disc_state, 2196 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 2197 ea->sp->gen1, fcport->rscn_gen, 2198 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 2199 2200 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 2201 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 2202 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2203 "%s %d %8phC Remote is trying to login\n", 2204 __func__, __LINE__, fcport->port_name); 2205 return; 2206 } 2207 2208 if ((fcport->disc_state == DSC_DELETE_PEND) || 2209 (fcport->disc_state == DSC_DELETED)) { 2210 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2211 return; 2212 } 2213 2214 if (ea->sp->gen2 != fcport->login_gen) { 2215 /* target side must have changed it. */ 2216 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2217 "%s %8phC generation changed\n", 2218 __func__, fcport->port_name); 2219 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2220 return; 2221 } else if (ea->sp->gen1 != fcport->rscn_gen) { 2222 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2223 "%s %8phC RSCN generation changed\n", 2224 __func__, fcport->port_name); 2225 qla_rscn_replay(fcport); 2226 qlt_schedule_sess_for_deletion(fcport); 2227 return; 2228 } 2229 2230 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2231 ea->data[0]); 2232 2233 switch (ea->data[0]) { 2234 case MBS_COMMAND_COMPLETE: 2235 /* 2236 * Driver must validate login state - If PRLI not complete, 2237 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 2238 * requests. 2239 */ 2240 if (vha->hw->flags.edif_enabled) { 2241 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2242 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2243 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2244 ea->fcport->logout_on_delete = 1; 2245 ea->fcport->send_els_logo = 0; 2246 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 2247 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2248 2249 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2250 } else { 2251 if (NVME_TARGET(vha->hw, fcport)) { 2252 ql_dbg(ql_dbg_disc, vha, 0x2117, 2253 "%s %d %8phC post prli\n", 2254 __func__, __LINE__, fcport->port_name); 2255 qla24xx_post_prli_work(vha, fcport); 2256 } else { 2257 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2258 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n", 2259 __func__, __LINE__, fcport->port_name, 2260 fcport->loop_id, fcport->d_id.b24); 2261 2262 set_bit(fcport->loop_id, vha->hw->loop_id_map); 2263 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2264 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2265 fcport->logout_on_delete = 1; 2266 fcport->send_els_logo = 0; 2267 fcport->fw_login_state = DSC_LS_PRLI_COMP; 2268 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2269 2270 qla24xx_post_gpdb_work(vha, fcport, 0); 2271 } 2272 } 2273 break; 2274 case MBS_COMMAND_ERROR: 2275 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2276 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2277 2278 qlt_schedule_sess_for_deletion(ea->fcport); 2279 break; 2280 case MBS_LOOP_ID_USED: 2281 /* data[1] = IO PARAM 1 = nport ID */ 2282 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2283 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2284 cid.b.al_pa = ea->iop[1] & 0xff; 2285 cid.b.rsvd_1 = 0; 2286 2287 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2288 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2289 __func__, __LINE__, ea->fcport->port_name, 2290 ea->fcport->loop_id, cid.b24); 2291 2292 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2293 ea->fcport->loop_id = FC_NO_LOOP_ID; 2294 qla24xx_post_gnl_work(vha, ea->fcport); 2295 break; 2296 case MBS_PORT_ID_USED: 2297 lid = ea->iop[1] & 0xffff; 2298 qlt_find_sess_invalidate_other(vha, 2299 wwn_to_u64(ea->fcport->port_name), 2300 ea->fcport->d_id, lid, &conflict_fcport); 2301 2302 if (conflict_fcport) { 2303 /* 2304 * Another fcport share the same loop_id/nport id. 2305 * Conflict fcport needs to finish cleanup before this 2306 * fcport can proceed to login. 2307 */ 2308 conflict_fcport->conflict = ea->fcport; 2309 ea->fcport->login_pause = 1; 2310 2311 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2312 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2313 __func__, __LINE__, ea->fcport->port_name, 2314 ea->fcport->d_id.b24, lid); 2315 } else { 2316 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2317 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2318 __func__, __LINE__, ea->fcport->port_name, 2319 ea->fcport->d_id.b24, lid); 2320 2321 qla2x00_clear_loop_id(ea->fcport); 2322 set_bit(lid, vha->hw->loop_id_map); 2323 ea->fcport->loop_id = lid; 2324 ea->fcport->keep_nport_handle = 0; 2325 ea->fcport->logout_on_delete = 1; 2326 qlt_schedule_sess_for_deletion(ea->fcport); 2327 } 2328 break; 2329 } 2330 return; 2331 } 2332 2333 /****************************************************************************/ 2334 /* QLogic ISP2x00 Hardware Support Functions. */ 2335 /****************************************************************************/ 2336 2337 static int 2338 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2339 { 2340 int rval = QLA_SUCCESS; 2341 struct qla_hw_data *ha = vha->hw; 2342 uint32_t idc_major_ver, idc_minor_ver; 2343 uint16_t config[4]; 2344 2345 qla83xx_idc_lock(vha, 0); 2346 2347 /* SV: TODO: Assign initialization timeout from 2348 * flash-info / other param 2349 */ 2350 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2351 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2352 2353 /* Set our fcoe function presence */ 2354 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2355 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2356 "Error while setting DRV-Presence.\n"); 2357 rval = QLA_FUNCTION_FAILED; 2358 goto exit; 2359 } 2360 2361 /* Decide the reset ownership */ 2362 qla83xx_reset_ownership(vha); 2363 2364 /* 2365 * On first protocol driver load: 2366 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2367 * register. 2368 * Others: Check compatibility with current IDC Major version. 2369 */ 2370 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2371 if (ha->flags.nic_core_reset_owner) { 2372 /* Set IDC Major version */ 2373 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2374 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2375 2376 /* Clearing IDC-Lock-Recovery register */ 2377 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2378 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2379 /* 2380 * Clear further IDC participation if we are not compatible with 2381 * the current IDC Major Version. 2382 */ 2383 ql_log(ql_log_warn, vha, 0xb07d, 2384 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2385 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2386 __qla83xx_clear_drv_presence(vha); 2387 rval = QLA_FUNCTION_FAILED; 2388 goto exit; 2389 } 2390 /* Each function sets its supported Minor version. */ 2391 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2392 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2393 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2394 2395 if (ha->flags.nic_core_reset_owner) { 2396 memset(config, 0, sizeof(config)); 2397 if (!qla81xx_get_port_config(vha, config)) 2398 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2399 QLA8XXX_DEV_READY); 2400 } 2401 2402 rval = qla83xx_idc_state_handler(vha); 2403 2404 exit: 2405 qla83xx_idc_unlock(vha, 0); 2406 2407 return rval; 2408 } 2409 2410 /* 2411 * qla2x00_initialize_adapter 2412 * Initialize board. 2413 * 2414 * Input: 2415 * ha = adapter block pointer. 2416 * 2417 * Returns: 2418 * 0 = success 2419 */ 2420 int 2421 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2422 { 2423 int rval; 2424 struct qla_hw_data *ha = vha->hw; 2425 struct req_que *req = ha->req_q_map[0]; 2426 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2427 2428 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2429 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2430 2431 /* Clear adapter flags. */ 2432 vha->flags.online = 0; 2433 ha->flags.chip_reset_done = 0; 2434 vha->flags.reset_active = 0; 2435 ha->flags.pci_channel_io_perm_failure = 0; 2436 ha->flags.eeh_busy = 0; 2437 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2438 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2439 atomic_set(&vha->loop_state, LOOP_DOWN); 2440 vha->device_flags = DFLG_NO_CABLE; 2441 vha->dpc_flags = 0; 2442 vha->flags.management_server_logged_in = 0; 2443 vha->marker_needed = 0; 2444 ha->isp_abort_cnt = 0; 2445 ha->beacon_blink_led = 0; 2446 2447 set_bit(0, ha->req_qid_map); 2448 set_bit(0, ha->rsp_qid_map); 2449 2450 ql_dbg(ql_dbg_init, vha, 0x0040, 2451 "Configuring PCI space...\n"); 2452 rval = ha->isp_ops->pci_config(vha); 2453 if (rval) { 2454 ql_log(ql_log_warn, vha, 0x0044, 2455 "Unable to configure PCI space.\n"); 2456 return (rval); 2457 } 2458 2459 ha->isp_ops->reset_chip(vha); 2460 2461 /* Check for secure flash support */ 2462 if (IS_QLA28XX(ha)) { 2463 if (rd_reg_word(®->mailbox12) & BIT_0) 2464 ha->flags.secure_adapter = 1; 2465 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n", 2466 (ha->flags.secure_adapter) ? "Yes" : "No"); 2467 } 2468 2469 2470 rval = qla2xxx_get_flash_info(vha); 2471 if (rval) { 2472 ql_log(ql_log_fatal, vha, 0x004f, 2473 "Unable to validate FLASH data.\n"); 2474 return rval; 2475 } 2476 2477 if (IS_QLA8044(ha)) { 2478 qla8044_read_reset_template(vha); 2479 2480 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2481 * If DONRESET_BIT0 is set, drivers should not set dev_state 2482 * to NEED_RESET. But if NEED_RESET is set, drivers should 2483 * should honor the reset. */ 2484 if (ql2xdontresethba == 1) 2485 qla8044_set_idc_dontreset(vha); 2486 } 2487 2488 ha->isp_ops->get_flash_version(vha, req->ring); 2489 ql_dbg(ql_dbg_init, vha, 0x0061, 2490 "Configure NVRAM parameters...\n"); 2491 2492 /* Let priority default to FCP, can be overridden by nvram_config */ 2493 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2494 2495 ha->isp_ops->nvram_config(vha); 2496 2497 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2498 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2499 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2500 2501 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2502 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2503 2504 if (ha->flags.disable_serdes) { 2505 /* Mask HBA via NVRAM settings? */ 2506 ql_log(ql_log_info, vha, 0x0077, 2507 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2508 return QLA_FUNCTION_FAILED; 2509 } 2510 2511 ql_dbg(ql_dbg_init, vha, 0x0078, 2512 "Verifying loaded RISC code...\n"); 2513 2514 /* If smartsan enabled then require fdmi and rdp enabled */ 2515 if (ql2xsmartsan) { 2516 ql2xfdmienable = 1; 2517 ql2xrdpenable = 1; 2518 } 2519 2520 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2521 rval = ha->isp_ops->chip_diag(vha); 2522 if (rval) 2523 return (rval); 2524 rval = qla2x00_setup_chip(vha); 2525 if (rval) 2526 return (rval); 2527 } 2528 2529 if (IS_QLA84XX(ha)) { 2530 ha->cs84xx = qla84xx_get_chip(vha); 2531 if (!ha->cs84xx) { 2532 ql_log(ql_log_warn, vha, 0x00d0, 2533 "Unable to configure ISP84XX.\n"); 2534 return QLA_FUNCTION_FAILED; 2535 } 2536 } 2537 2538 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2539 rval = qla2x00_init_rings(vha); 2540 2541 /* No point in continuing if firmware initialization failed. */ 2542 if (rval != QLA_SUCCESS) 2543 return rval; 2544 2545 ha->flags.chip_reset_done = 1; 2546 2547 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2548 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2549 rval = qla84xx_init_chip(vha); 2550 if (rval != QLA_SUCCESS) { 2551 ql_log(ql_log_warn, vha, 0x00d4, 2552 "Unable to initialize ISP84XX.\n"); 2553 qla84xx_put_chip(vha); 2554 } 2555 } 2556 2557 /* Load the NIC Core f/w if we are the first protocol driver. */ 2558 if (IS_QLA8031(ha)) { 2559 rval = qla83xx_nic_core_fw_load(vha); 2560 if (rval) 2561 ql_log(ql_log_warn, vha, 0x0124, 2562 "Error in initializing NIC Core f/w.\n"); 2563 } 2564 2565 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2566 qla24xx_read_fcp_prio_cfg(vha); 2567 2568 if (IS_P3P_TYPE(ha)) 2569 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2570 else 2571 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2572 2573 return (rval); 2574 } 2575 2576 /** 2577 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2578 * @vha: HA context 2579 * 2580 * Returns 0 on success. 2581 */ 2582 int 2583 qla2100_pci_config(scsi_qla_host_t *vha) 2584 { 2585 uint16_t w; 2586 unsigned long flags; 2587 struct qla_hw_data *ha = vha->hw; 2588 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2589 2590 pci_set_master(ha->pdev); 2591 pci_try_set_mwi(ha->pdev); 2592 2593 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2594 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2595 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2596 2597 pci_disable_rom(ha->pdev); 2598 2599 /* Get PCI bus information. */ 2600 spin_lock_irqsave(&ha->hardware_lock, flags); 2601 ha->pci_attr = rd_reg_word(®->ctrl_status); 2602 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2603 2604 return QLA_SUCCESS; 2605 } 2606 2607 /** 2608 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2609 * @vha: HA context 2610 * 2611 * Returns 0 on success. 2612 */ 2613 int 2614 qla2300_pci_config(scsi_qla_host_t *vha) 2615 { 2616 uint16_t w; 2617 unsigned long flags = 0; 2618 uint32_t cnt; 2619 struct qla_hw_data *ha = vha->hw; 2620 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2621 2622 pci_set_master(ha->pdev); 2623 pci_try_set_mwi(ha->pdev); 2624 2625 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2626 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2627 2628 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2629 w &= ~PCI_COMMAND_INTX_DISABLE; 2630 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2631 2632 /* 2633 * If this is a 2300 card and not 2312, reset the 2634 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2635 * the 2310 also reports itself as a 2300 so we need to get the 2636 * fb revision level -- a 6 indicates it really is a 2300 and 2637 * not a 2310. 2638 */ 2639 if (IS_QLA2300(ha)) { 2640 spin_lock_irqsave(&ha->hardware_lock, flags); 2641 2642 /* Pause RISC. */ 2643 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2644 for (cnt = 0; cnt < 30000; cnt++) { 2645 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) 2646 break; 2647 2648 udelay(10); 2649 } 2650 2651 /* Select FPM registers. */ 2652 wrt_reg_word(®->ctrl_status, 0x20); 2653 rd_reg_word(®->ctrl_status); 2654 2655 /* Get the fb rev level */ 2656 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2657 2658 if (ha->fb_rev == FPM_2300) 2659 pci_clear_mwi(ha->pdev); 2660 2661 /* Deselect FPM registers. */ 2662 wrt_reg_word(®->ctrl_status, 0x0); 2663 rd_reg_word(®->ctrl_status); 2664 2665 /* Release RISC module. */ 2666 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2667 for (cnt = 0; cnt < 30000; cnt++) { 2668 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0) 2669 break; 2670 2671 udelay(10); 2672 } 2673 2674 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2675 } 2676 2677 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2678 2679 pci_disable_rom(ha->pdev); 2680 2681 /* Get PCI bus information. */ 2682 spin_lock_irqsave(&ha->hardware_lock, flags); 2683 ha->pci_attr = rd_reg_word(®->ctrl_status); 2684 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2685 2686 return QLA_SUCCESS; 2687 } 2688 2689 /** 2690 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2691 * @vha: HA context 2692 * 2693 * Returns 0 on success. 2694 */ 2695 int 2696 qla24xx_pci_config(scsi_qla_host_t *vha) 2697 { 2698 uint16_t w; 2699 unsigned long flags = 0; 2700 struct qla_hw_data *ha = vha->hw; 2701 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2702 2703 pci_set_master(ha->pdev); 2704 pci_try_set_mwi(ha->pdev); 2705 2706 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2707 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2708 w &= ~PCI_COMMAND_INTX_DISABLE; 2709 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2710 2711 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2712 2713 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2714 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2715 pcix_set_mmrbc(ha->pdev, 2048); 2716 2717 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2718 if (pci_is_pcie(ha->pdev)) 2719 pcie_set_readrq(ha->pdev, 4096); 2720 2721 pci_disable_rom(ha->pdev); 2722 2723 ha->chip_revision = ha->pdev->revision; 2724 2725 /* Get PCI bus information. */ 2726 spin_lock_irqsave(&ha->hardware_lock, flags); 2727 ha->pci_attr = rd_reg_dword(®->ctrl_status); 2728 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2729 2730 return QLA_SUCCESS; 2731 } 2732 2733 /** 2734 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2735 * @vha: HA context 2736 * 2737 * Returns 0 on success. 2738 */ 2739 int 2740 qla25xx_pci_config(scsi_qla_host_t *vha) 2741 { 2742 uint16_t w; 2743 struct qla_hw_data *ha = vha->hw; 2744 2745 pci_set_master(ha->pdev); 2746 pci_try_set_mwi(ha->pdev); 2747 2748 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2749 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2750 w &= ~PCI_COMMAND_INTX_DISABLE; 2751 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2752 2753 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2754 if (pci_is_pcie(ha->pdev)) 2755 pcie_set_readrq(ha->pdev, 4096); 2756 2757 pci_disable_rom(ha->pdev); 2758 2759 ha->chip_revision = ha->pdev->revision; 2760 2761 return QLA_SUCCESS; 2762 } 2763 2764 /** 2765 * qla2x00_isp_firmware() - Choose firmware image. 2766 * @vha: HA context 2767 * 2768 * Returns 0 on success. 2769 */ 2770 static int 2771 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2772 { 2773 int rval; 2774 uint16_t loop_id, topo, sw_cap; 2775 uint8_t domain, area, al_pa; 2776 struct qla_hw_data *ha = vha->hw; 2777 2778 /* Assume loading risc code */ 2779 rval = QLA_FUNCTION_FAILED; 2780 2781 if (ha->flags.disable_risc_code_load) { 2782 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2783 2784 /* Verify checksum of loaded RISC code. */ 2785 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2786 if (rval == QLA_SUCCESS) { 2787 /* And, verify we are not in ROM code. */ 2788 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2789 &area, &domain, &topo, &sw_cap); 2790 } 2791 } 2792 2793 if (rval) 2794 ql_dbg(ql_dbg_init, vha, 0x007a, 2795 "**** Load RISC code ****.\n"); 2796 2797 return (rval); 2798 } 2799 2800 /** 2801 * qla2x00_reset_chip() - Reset ISP chip. 2802 * @vha: HA context 2803 * 2804 * Returns 0 on success. 2805 */ 2806 int 2807 qla2x00_reset_chip(scsi_qla_host_t *vha) 2808 { 2809 unsigned long flags = 0; 2810 struct qla_hw_data *ha = vha->hw; 2811 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2812 uint32_t cnt; 2813 uint16_t cmd; 2814 int rval = QLA_FUNCTION_FAILED; 2815 2816 if (unlikely(pci_channel_offline(ha->pdev))) 2817 return rval; 2818 2819 ha->isp_ops->disable_intrs(ha); 2820 2821 spin_lock_irqsave(&ha->hardware_lock, flags); 2822 2823 /* Turn off master enable */ 2824 cmd = 0; 2825 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2826 cmd &= ~PCI_COMMAND_MASTER; 2827 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2828 2829 if (!IS_QLA2100(ha)) { 2830 /* Pause RISC. */ 2831 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2832 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2833 for (cnt = 0; cnt < 30000; cnt++) { 2834 if ((rd_reg_word(®->hccr) & 2835 HCCR_RISC_PAUSE) != 0) 2836 break; 2837 udelay(100); 2838 } 2839 } else { 2840 rd_reg_word(®->hccr); /* PCI Posting. */ 2841 udelay(10); 2842 } 2843 2844 /* Select FPM registers. */ 2845 wrt_reg_word(®->ctrl_status, 0x20); 2846 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2847 2848 /* FPM Soft Reset. */ 2849 wrt_reg_word(®->fpm_diag_config, 0x100); 2850 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2851 2852 /* Toggle Fpm Reset. */ 2853 if (!IS_QLA2200(ha)) { 2854 wrt_reg_word(®->fpm_diag_config, 0x0); 2855 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2856 } 2857 2858 /* Select frame buffer registers. */ 2859 wrt_reg_word(®->ctrl_status, 0x10); 2860 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2861 2862 /* Reset frame buffer FIFOs. */ 2863 if (IS_QLA2200(ha)) { 2864 WRT_FB_CMD_REG(ha, reg, 0xa000); 2865 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2866 } else { 2867 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2868 2869 /* Read back fb_cmd until zero or 3 seconds max */ 2870 for (cnt = 0; cnt < 3000; cnt++) { 2871 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2872 break; 2873 udelay(100); 2874 } 2875 } 2876 2877 /* Select RISC module registers. */ 2878 wrt_reg_word(®->ctrl_status, 0); 2879 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2880 2881 /* Reset RISC processor. */ 2882 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2883 rd_reg_word(®->hccr); /* PCI Posting. */ 2884 2885 /* Release RISC processor. */ 2886 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2887 rd_reg_word(®->hccr); /* PCI Posting. */ 2888 } 2889 2890 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 2891 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT); 2892 2893 /* Reset ISP chip. */ 2894 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 2895 2896 /* Wait for RISC to recover from reset. */ 2897 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2898 /* 2899 * It is necessary to for a delay here since the card doesn't 2900 * respond to PCI reads during a reset. On some architectures 2901 * this will result in an MCA. 2902 */ 2903 udelay(20); 2904 for (cnt = 30000; cnt; cnt--) { 2905 if ((rd_reg_word(®->ctrl_status) & 2906 CSR_ISP_SOFT_RESET) == 0) 2907 break; 2908 udelay(100); 2909 } 2910 } else 2911 udelay(10); 2912 2913 /* Reset RISC processor. */ 2914 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2915 2916 wrt_reg_word(®->semaphore, 0); 2917 2918 /* Release RISC processor. */ 2919 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2920 rd_reg_word(®->hccr); /* PCI Posting. */ 2921 2922 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2923 for (cnt = 0; cnt < 30000; cnt++) { 2924 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2925 break; 2926 2927 udelay(100); 2928 } 2929 } else 2930 udelay(100); 2931 2932 /* Turn on master enable */ 2933 cmd |= PCI_COMMAND_MASTER; 2934 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2935 2936 /* Disable RISC pause on FPM parity error. */ 2937 if (!IS_QLA2100(ha)) { 2938 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2939 rd_reg_word(®->hccr); /* PCI Posting. */ 2940 } 2941 2942 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2943 2944 return QLA_SUCCESS; 2945 } 2946 2947 /** 2948 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2949 * @vha: HA context 2950 * 2951 * Returns 0 on success. 2952 */ 2953 static int 2954 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2955 { 2956 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2957 2958 if (!IS_QLA81XX(vha->hw)) 2959 return QLA_SUCCESS; 2960 2961 return qla81xx_write_mpi_register(vha, mb); 2962 } 2963 2964 static int 2965 qla_chk_risc_recovery(scsi_qla_host_t *vha) 2966 { 2967 struct qla_hw_data *ha = vha->hw; 2968 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2969 __le16 __iomem *mbptr = ®->mailbox0; 2970 int i; 2971 u16 mb[32]; 2972 int rc = QLA_SUCCESS; 2973 2974 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 2975 return rc; 2976 2977 /* this check is only valid after RISC reset */ 2978 mb[0] = rd_reg_word(mbptr); 2979 mbptr++; 2980 if (mb[0] == 0xf) { 2981 rc = QLA_FUNCTION_FAILED; 2982 2983 for (i = 1; i < 32; i++) { 2984 mb[i] = rd_reg_word(mbptr); 2985 mbptr++; 2986 } 2987 2988 ql_log(ql_log_warn, vha, 0x1015, 2989 "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2990 mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]); 2991 ql_log(ql_log_warn, vha, 0x1015, 2992 "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2993 mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14], 2994 mb[15]); 2995 ql_log(ql_log_warn, vha, 0x1015, 2996 "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2997 mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22], 2998 mb[23]); 2999 ql_log(ql_log_warn, vha, 0x1015, 3000 "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3001 mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30], 3002 mb[31]); 3003 } 3004 return rc; 3005 } 3006 3007 /** 3008 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 3009 * @vha: HA context 3010 * 3011 * Returns 0 on success. 3012 */ 3013 static inline int 3014 qla24xx_reset_risc(scsi_qla_host_t *vha) 3015 { 3016 unsigned long flags = 0; 3017 struct qla_hw_data *ha = vha->hw; 3018 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3019 uint32_t cnt; 3020 uint16_t wd; 3021 static int abts_cnt; /* ISP abort retry counts */ 3022 int rval = QLA_SUCCESS; 3023 int print = 1; 3024 3025 spin_lock_irqsave(&ha->hardware_lock, flags); 3026 3027 /* Reset RISC. */ 3028 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3029 for (cnt = 0; cnt < 30000; cnt++) { 3030 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 3031 break; 3032 3033 udelay(10); 3034 } 3035 3036 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)) 3037 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 3038 3039 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 3040 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 3041 rd_reg_dword(®->hccr), 3042 rd_reg_dword(®->ctrl_status), 3043 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)); 3044 3045 wrt_reg_dword(®->ctrl_status, 3046 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3047 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 3048 3049 udelay(100); 3050 3051 /* Wait for firmware to complete NVRAM accesses. */ 3052 rd_reg_word(®->mailbox0); 3053 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 && 3054 rval == QLA_SUCCESS; cnt--) { 3055 barrier(); 3056 if (cnt) 3057 udelay(5); 3058 else 3059 rval = QLA_FUNCTION_TIMEOUT; 3060 } 3061 3062 if (rval == QLA_SUCCESS) 3063 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 3064 3065 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 3066 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 3067 rd_reg_dword(®->hccr), 3068 rd_reg_word(®->mailbox0)); 3069 3070 /* Wait for soft-reset to complete. */ 3071 rd_reg_dword(®->ctrl_status); 3072 for (cnt = 0; cnt < 60; cnt++) { 3073 barrier(); 3074 if ((rd_reg_dword(®->ctrl_status) & 3075 CSRX_ISP_SOFT_RESET) == 0) 3076 break; 3077 3078 udelay(5); 3079 } 3080 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 3081 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 3082 3083 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 3084 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 3085 rd_reg_dword(®->hccr), 3086 rd_reg_dword(®->ctrl_status)); 3087 3088 /* If required, do an MPI FW reset now */ 3089 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 3090 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 3091 if (++abts_cnt < 5) { 3092 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3093 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 3094 } else { 3095 /* 3096 * We exhausted the ISP abort retries. We have to 3097 * set the board offline. 3098 */ 3099 abts_cnt = 0; 3100 vha->flags.online = 0; 3101 } 3102 } 3103 } 3104 3105 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 3106 rd_reg_dword(®->hccr); 3107 3108 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 3109 rd_reg_dword(®->hccr); 3110 3111 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET); 3112 mdelay(10); 3113 rd_reg_dword(®->hccr); 3114 3115 wd = rd_reg_word(®->mailbox0); 3116 for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) { 3117 barrier(); 3118 if (cnt) { 3119 mdelay(1); 3120 if (print && qla_chk_risc_recovery(vha)) 3121 print = 0; 3122 3123 wd = rd_reg_word(®->mailbox0); 3124 } else { 3125 rval = QLA_FUNCTION_TIMEOUT; 3126 3127 ql_log(ql_log_warn, vha, 0x015e, 3128 "RISC reset timeout\n"); 3129 } 3130 } 3131 3132 if (rval == QLA_SUCCESS) 3133 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 3134 3135 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 3136 "Host Risc 0x%x, mailbox0 0x%x\n", 3137 rd_reg_dword(®->hccr), 3138 rd_reg_word(®->mailbox0)); 3139 3140 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3141 3142 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 3143 "Driver in %s mode\n", 3144 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 3145 3146 if (IS_NOPOLLING_TYPE(ha)) 3147 ha->isp_ops->enable_intrs(ha); 3148 3149 return rval; 3150 } 3151 3152 static void 3153 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 3154 { 3155 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3156 3157 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3158 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET); 3159 } 3160 3161 static void 3162 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 3163 { 3164 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3165 3166 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3167 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); 3168 } 3169 3170 static void 3171 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 3172 { 3173 uint32_t wd32 = 0; 3174 uint delta_msec = 100; 3175 uint elapsed_msec = 0; 3176 uint timeout_msec; 3177 ulong n; 3178 3179 if (vha->hw->pdev->subsystem_device != 0x0175 && 3180 vha->hw->pdev->subsystem_device != 0x0240) 3181 return; 3182 3183 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 3184 udelay(100); 3185 3186 attempt: 3187 timeout_msec = TIMEOUT_SEMAPHORE; 3188 n = timeout_msec / delta_msec; 3189 while (n--) { 3190 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 3191 qla25xx_read_risc_sema_reg(vha, &wd32); 3192 if (wd32 & RISC_SEMAPHORE) 3193 break; 3194 msleep(delta_msec); 3195 elapsed_msec += delta_msec; 3196 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3197 goto force; 3198 } 3199 3200 if (!(wd32 & RISC_SEMAPHORE)) 3201 goto force; 3202 3203 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3204 goto acquired; 3205 3206 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 3207 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 3208 n = timeout_msec / delta_msec; 3209 while (n--) { 3210 qla25xx_read_risc_sema_reg(vha, &wd32); 3211 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3212 break; 3213 msleep(delta_msec); 3214 elapsed_msec += delta_msec; 3215 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3216 goto force; 3217 } 3218 3219 if (wd32 & RISC_SEMAPHORE_FORCE) 3220 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 3221 3222 goto attempt; 3223 3224 force: 3225 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 3226 3227 acquired: 3228 return; 3229 } 3230 3231 /** 3232 * qla24xx_reset_chip() - Reset ISP24xx chip. 3233 * @vha: HA context 3234 * 3235 * Returns 0 on success. 3236 */ 3237 int 3238 qla24xx_reset_chip(scsi_qla_host_t *vha) 3239 { 3240 struct qla_hw_data *ha = vha->hw; 3241 int rval = QLA_FUNCTION_FAILED; 3242 3243 if (pci_channel_offline(ha->pdev) && 3244 ha->flags.pci_channel_io_perm_failure) { 3245 return rval; 3246 } 3247 3248 ha->isp_ops->disable_intrs(ha); 3249 3250 qla25xx_manipulate_risc_semaphore(vha); 3251 3252 /* Perform RISC reset. */ 3253 rval = qla24xx_reset_risc(vha); 3254 3255 return rval; 3256 } 3257 3258 /** 3259 * qla2x00_chip_diag() - Test chip for proper operation. 3260 * @vha: HA context 3261 * 3262 * Returns 0 on success. 3263 */ 3264 int 3265 qla2x00_chip_diag(scsi_qla_host_t *vha) 3266 { 3267 int rval; 3268 struct qla_hw_data *ha = vha->hw; 3269 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3270 unsigned long flags = 0; 3271 uint16_t data; 3272 uint32_t cnt; 3273 uint16_t mb[5]; 3274 struct req_que *req = ha->req_q_map[0]; 3275 3276 /* Assume a failed state */ 3277 rval = QLA_FUNCTION_FAILED; 3278 3279 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 3280 ®->flash_address); 3281 3282 spin_lock_irqsave(&ha->hardware_lock, flags); 3283 3284 /* Reset ISP chip. */ 3285 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 3286 3287 /* 3288 * We need to have a delay here since the card will not respond while 3289 * in reset causing an MCA on some architectures. 3290 */ 3291 udelay(20); 3292 data = qla2x00_debounce_register(®->ctrl_status); 3293 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 3294 udelay(5); 3295 data = rd_reg_word(®->ctrl_status); 3296 barrier(); 3297 } 3298 3299 if (!cnt) 3300 goto chip_diag_failed; 3301 3302 ql_dbg(ql_dbg_init, vha, 0x007c, 3303 "Reset register cleared by chip reset.\n"); 3304 3305 /* Reset RISC processor. */ 3306 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3307 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3308 3309 /* Workaround for QLA2312 PCI parity error */ 3310 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3311 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 3312 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 3313 udelay(5); 3314 data = RD_MAILBOX_REG(ha, reg, 0); 3315 barrier(); 3316 } 3317 } else 3318 udelay(10); 3319 3320 if (!cnt) 3321 goto chip_diag_failed; 3322 3323 /* Check product ID of chip */ 3324 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3325 3326 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3327 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3328 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3329 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3330 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3331 mb[3] != PROD_ID_3) { 3332 ql_log(ql_log_warn, vha, 0x0062, 3333 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3334 mb[1], mb[2], mb[3]); 3335 3336 goto chip_diag_failed; 3337 } 3338 ha->product_id[0] = mb[1]; 3339 ha->product_id[1] = mb[2]; 3340 ha->product_id[2] = mb[3]; 3341 ha->product_id[3] = mb[4]; 3342 3343 /* Adjust fw RISC transfer size */ 3344 if (req->length > 1024) 3345 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3346 else 3347 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3348 req->length; 3349 3350 if (IS_QLA2200(ha) && 3351 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3352 /* Limit firmware transfer size with a 2200A */ 3353 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3354 3355 ha->device_type |= DT_ISP2200A; 3356 ha->fw_transfer_size = 128; 3357 } 3358 3359 /* Wrap Incoming Mailboxes Test. */ 3360 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3361 3362 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3363 rval = qla2x00_mbx_reg_test(vha); 3364 if (rval) 3365 ql_log(ql_log_warn, vha, 0x0080, 3366 "Failed mailbox send register test.\n"); 3367 else 3368 /* Flag a successful rval */ 3369 rval = QLA_SUCCESS; 3370 spin_lock_irqsave(&ha->hardware_lock, flags); 3371 3372 chip_diag_failed: 3373 if (rval) 3374 ql_log(ql_log_info, vha, 0x0081, 3375 "Chip diagnostics **** FAILED ****.\n"); 3376 3377 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3378 3379 return (rval); 3380 } 3381 3382 /** 3383 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3384 * @vha: HA context 3385 * 3386 * Returns 0 on success. 3387 */ 3388 int 3389 qla24xx_chip_diag(scsi_qla_host_t *vha) 3390 { 3391 int rval; 3392 struct qla_hw_data *ha = vha->hw; 3393 struct req_que *req = ha->req_q_map[0]; 3394 3395 if (IS_P3P_TYPE(ha)) 3396 return QLA_SUCCESS; 3397 3398 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3399 3400 rval = qla2x00_mbx_reg_test(vha); 3401 if (rval) { 3402 ql_log(ql_log_warn, vha, 0x0082, 3403 "Failed mailbox send register test.\n"); 3404 } else { 3405 /* Flag a successful rval */ 3406 rval = QLA_SUCCESS; 3407 } 3408 3409 return rval; 3410 } 3411 3412 static void 3413 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3414 { 3415 int rval; 3416 dma_addr_t tc_dma; 3417 void *tc; 3418 struct qla_hw_data *ha = vha->hw; 3419 3420 if (!IS_FWI2_CAPABLE(ha)) 3421 return; 3422 3423 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3424 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3425 return; 3426 3427 if (ha->fce) { 3428 ql_dbg(ql_dbg_init, vha, 0x00bd, 3429 "%s: FCE Mem is already allocated.\n", 3430 __func__); 3431 return; 3432 } 3433 3434 /* Allocate memory for Fibre Channel Event Buffer. */ 3435 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3436 GFP_KERNEL); 3437 if (!tc) { 3438 ql_log(ql_log_warn, vha, 0x00be, 3439 "Unable to allocate (%d KB) for FCE.\n", 3440 FCE_SIZE / 1024); 3441 return; 3442 } 3443 3444 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3445 ha->fce_mb, &ha->fce_bufs); 3446 if (rval) { 3447 ql_log(ql_log_warn, vha, 0x00bf, 3448 "Unable to initialize FCE (%d).\n", rval); 3449 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3450 return; 3451 } 3452 3453 ql_dbg(ql_dbg_init, vha, 0x00c0, 3454 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3455 3456 ha->flags.fce_enabled = 1; 3457 ha->fce_dma = tc_dma; 3458 ha->fce = tc; 3459 } 3460 3461 static void 3462 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3463 { 3464 int rval; 3465 dma_addr_t tc_dma; 3466 void *tc; 3467 struct qla_hw_data *ha = vha->hw; 3468 3469 if (!IS_FWI2_CAPABLE(ha)) 3470 return; 3471 3472 if (ha->eft) { 3473 ql_dbg(ql_dbg_init, vha, 0x00bd, 3474 "%s: EFT Mem is already allocated.\n", 3475 __func__); 3476 return; 3477 } 3478 3479 /* Allocate memory for Extended Trace Buffer. */ 3480 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3481 GFP_KERNEL); 3482 if (!tc) { 3483 ql_log(ql_log_warn, vha, 0x00c1, 3484 "Unable to allocate (%d KB) for EFT.\n", 3485 EFT_SIZE / 1024); 3486 return; 3487 } 3488 3489 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3490 if (rval) { 3491 ql_log(ql_log_warn, vha, 0x00c2, 3492 "Unable to initialize EFT (%d).\n", rval); 3493 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3494 return; 3495 } 3496 3497 ql_dbg(ql_dbg_init, vha, 0x00c3, 3498 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3499 3500 ha->eft_dma = tc_dma; 3501 ha->eft = tc; 3502 } 3503 3504 static void 3505 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3506 { 3507 qla2x00_init_fce_trace(vha); 3508 qla2x00_init_eft_trace(vha); 3509 } 3510 3511 void 3512 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3513 { 3514 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3515 eft_size, fce_size, mq_size; 3516 struct qla_hw_data *ha = vha->hw; 3517 struct req_que *req = ha->req_q_map[0]; 3518 struct rsp_que *rsp = ha->rsp_q_map[0]; 3519 struct qla2xxx_fw_dump *fw_dump; 3520 3521 if (ha->fw_dump) { 3522 ql_dbg(ql_dbg_init, vha, 0x00bd, 3523 "Firmware dump already allocated.\n"); 3524 return; 3525 } 3526 3527 ha->fw_dumped = 0; 3528 ha->fw_dump_cap_flags = 0; 3529 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3530 req_q_size = rsp_q_size = 0; 3531 3532 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3533 fixed_size = sizeof(struct qla2100_fw_dump); 3534 } else if (IS_QLA23XX(ha)) { 3535 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3536 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3537 sizeof(uint16_t); 3538 } else if (IS_FWI2_CAPABLE(ha)) { 3539 if (IS_QLA83XX(ha)) 3540 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3541 else if (IS_QLA81XX(ha)) 3542 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3543 else if (IS_QLA25XX(ha)) 3544 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3545 else 3546 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3547 3548 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3549 sizeof(uint32_t); 3550 if (ha->mqenable) { 3551 if (!IS_QLA83XX(ha)) 3552 mq_size = sizeof(struct qla2xxx_mq_chain); 3553 /* 3554 * Allocate maximum buffer size for all queues - Q0. 3555 * Resizing must be done at end-of-dump processing. 3556 */ 3557 mq_size += (ha->max_req_queues - 1) * 3558 (req->length * sizeof(request_t)); 3559 mq_size += (ha->max_rsp_queues - 1) * 3560 (rsp->length * sizeof(response_t)); 3561 } 3562 if (ha->tgt.atio_ring) 3563 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3564 3565 qla2x00_init_fce_trace(vha); 3566 if (ha->fce) 3567 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3568 qla2x00_init_eft_trace(vha); 3569 if (ha->eft) 3570 eft_size = EFT_SIZE; 3571 } 3572 3573 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3574 struct fwdt *fwdt = ha->fwdt; 3575 uint j; 3576 3577 for (j = 0; j < 2; j++, fwdt++) { 3578 if (!fwdt->template) { 3579 ql_dbg(ql_dbg_init, vha, 0x00ba, 3580 "-> fwdt%u no template\n", j); 3581 continue; 3582 } 3583 ql_dbg(ql_dbg_init, vha, 0x00fa, 3584 "-> fwdt%u calculating fwdump size...\n", j); 3585 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3586 vha, fwdt->template); 3587 ql_dbg(ql_dbg_init, vha, 0x00fa, 3588 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3589 j, fwdt->dump_size); 3590 dump_size += fwdt->dump_size; 3591 } 3592 /* Add space for spare MPI fw dump. */ 3593 dump_size += ha->fwdt[1].dump_size; 3594 } else { 3595 req_q_size = req->length * sizeof(request_t); 3596 rsp_q_size = rsp->length * sizeof(response_t); 3597 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3598 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3599 + eft_size; 3600 ha->chain_offset = dump_size; 3601 dump_size += mq_size + fce_size; 3602 if (ha->exchoffld_buf) 3603 dump_size += sizeof(struct qla2xxx_offld_chain) + 3604 ha->exchoffld_size; 3605 if (ha->exlogin_buf) 3606 dump_size += sizeof(struct qla2xxx_offld_chain) + 3607 ha->exlogin_size; 3608 } 3609 3610 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3611 3612 ql_dbg(ql_dbg_init, vha, 0x00c5, 3613 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3614 __func__, dump_size, ha->fw_dump_len, 3615 ha->fw_dump_alloc_len); 3616 3617 fw_dump = vmalloc(dump_size); 3618 if (!fw_dump) { 3619 ql_log(ql_log_warn, vha, 0x00c4, 3620 "Unable to allocate (%d KB) for firmware dump.\n", 3621 dump_size / 1024); 3622 } else { 3623 mutex_lock(&ha->optrom_mutex); 3624 if (ha->fw_dumped) { 3625 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3626 vfree(ha->fw_dump); 3627 ha->fw_dump = fw_dump; 3628 ha->fw_dump_alloc_len = dump_size; 3629 ql_dbg(ql_dbg_init, vha, 0x00c5, 3630 "Re-Allocated (%d KB) and save firmware dump.\n", 3631 dump_size / 1024); 3632 } else { 3633 vfree(ha->fw_dump); 3634 ha->fw_dump = fw_dump; 3635 3636 ha->fw_dump_len = ha->fw_dump_alloc_len = 3637 dump_size; 3638 ql_dbg(ql_dbg_init, vha, 0x00c5, 3639 "Allocated (%d KB) for firmware dump.\n", 3640 dump_size / 1024); 3641 3642 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3643 ha->mpi_fw_dump = (char *)fw_dump + 3644 ha->fwdt[1].dump_size; 3645 mutex_unlock(&ha->optrom_mutex); 3646 return; 3647 } 3648 3649 ha->fw_dump->signature[0] = 'Q'; 3650 ha->fw_dump->signature[1] = 'L'; 3651 ha->fw_dump->signature[2] = 'G'; 3652 ha->fw_dump->signature[3] = 'C'; 3653 ha->fw_dump->version = htonl(1); 3654 3655 ha->fw_dump->fixed_size = htonl(fixed_size); 3656 ha->fw_dump->mem_size = htonl(mem_size); 3657 ha->fw_dump->req_q_size = htonl(req_q_size); 3658 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3659 3660 ha->fw_dump->eft_size = htonl(eft_size); 3661 ha->fw_dump->eft_addr_l = 3662 htonl(LSD(ha->eft_dma)); 3663 ha->fw_dump->eft_addr_h = 3664 htonl(MSD(ha->eft_dma)); 3665 3666 ha->fw_dump->header_size = 3667 htonl(offsetof 3668 (struct qla2xxx_fw_dump, isp)); 3669 } 3670 mutex_unlock(&ha->optrom_mutex); 3671 } 3672 } 3673 } 3674 3675 static int 3676 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3677 { 3678 #define MPS_MASK 0xe0 3679 int rval; 3680 uint16_t dc; 3681 uint32_t dw; 3682 3683 if (!IS_QLA81XX(vha->hw)) 3684 return QLA_SUCCESS; 3685 3686 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3687 if (rval != QLA_SUCCESS) { 3688 ql_log(ql_log_warn, vha, 0x0105, 3689 "Unable to acquire semaphore.\n"); 3690 goto done; 3691 } 3692 3693 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3694 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3695 if (rval != QLA_SUCCESS) { 3696 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3697 goto done_release; 3698 } 3699 3700 dc &= MPS_MASK; 3701 if (dc == (dw & MPS_MASK)) 3702 goto done_release; 3703 3704 dw &= ~MPS_MASK; 3705 dw |= dc; 3706 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3707 if (rval != QLA_SUCCESS) { 3708 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3709 } 3710 3711 done_release: 3712 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3713 if (rval != QLA_SUCCESS) { 3714 ql_log(ql_log_warn, vha, 0x006d, 3715 "Unable to release semaphore.\n"); 3716 } 3717 3718 done: 3719 return rval; 3720 } 3721 3722 int 3723 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3724 { 3725 /* Don't try to reallocate the array */ 3726 if (req->outstanding_cmds) 3727 return QLA_SUCCESS; 3728 3729 if (!IS_FWI2_CAPABLE(ha)) 3730 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3731 else { 3732 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3733 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3734 else 3735 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3736 } 3737 3738 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3739 sizeof(srb_t *), 3740 GFP_KERNEL); 3741 3742 if (!req->outstanding_cmds) { 3743 /* 3744 * Try to allocate a minimal size just so we can get through 3745 * initialization. 3746 */ 3747 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3748 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3749 sizeof(srb_t *), 3750 GFP_KERNEL); 3751 3752 if (!req->outstanding_cmds) { 3753 ql_log(ql_log_fatal, NULL, 0x0126, 3754 "Failed to allocate memory for " 3755 "outstanding_cmds for req_que %p.\n", req); 3756 req->num_outstanding_cmds = 0; 3757 return QLA_FUNCTION_FAILED; 3758 } 3759 } 3760 3761 return QLA_SUCCESS; 3762 } 3763 3764 #define PRINT_FIELD(_field, _flag, _str) { \ 3765 if (a0->_field & _flag) {\ 3766 if (p) {\ 3767 strcat(ptr, "|");\ 3768 ptr++;\ 3769 leftover--;\ 3770 } \ 3771 len = snprintf(ptr, leftover, "%s", _str); \ 3772 p = 1;\ 3773 leftover -= len;\ 3774 ptr += len; \ 3775 } \ 3776 } 3777 3778 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3779 { 3780 #define STR_LEN 64 3781 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3782 u8 str[STR_LEN], *ptr, p; 3783 int leftover, len; 3784 3785 memset(str, 0, STR_LEN); 3786 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3787 ql_dbg(ql_dbg_init, vha, 0x015a, 3788 "SFP MFG Name: %s\n", str); 3789 3790 memset(str, 0, STR_LEN); 3791 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3792 ql_dbg(ql_dbg_init, vha, 0x015c, 3793 "SFP Part Name: %s\n", str); 3794 3795 /* media */ 3796 memset(str, 0, STR_LEN); 3797 ptr = str; 3798 leftover = STR_LEN; 3799 p = len = 0; 3800 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3801 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3802 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3803 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3804 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3805 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3806 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3807 ql_dbg(ql_dbg_init, vha, 0x0160, 3808 "SFP Media: %s\n", str); 3809 3810 /* link length */ 3811 memset(str, 0, STR_LEN); 3812 ptr = str; 3813 leftover = STR_LEN; 3814 p = len = 0; 3815 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3816 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3817 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3818 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3819 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3820 ql_dbg(ql_dbg_init, vha, 0x0196, 3821 "SFP Link Length: %s\n", str); 3822 3823 memset(str, 0, STR_LEN); 3824 ptr = str; 3825 leftover = STR_LEN; 3826 p = len = 0; 3827 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3828 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3829 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3830 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3831 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3832 ql_dbg(ql_dbg_init, vha, 0x016e, 3833 "SFP FC Link Tech: %s\n", str); 3834 3835 if (a0->length_km) 3836 ql_dbg(ql_dbg_init, vha, 0x016f, 3837 "SFP Distant: %d km\n", a0->length_km); 3838 if (a0->length_100m) 3839 ql_dbg(ql_dbg_init, vha, 0x0170, 3840 "SFP Distant: %d m\n", a0->length_100m*100); 3841 if (a0->length_50um_10m) 3842 ql_dbg(ql_dbg_init, vha, 0x0189, 3843 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3844 if (a0->length_62um_10m) 3845 ql_dbg(ql_dbg_init, vha, 0x018a, 3846 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3847 if (a0->length_om4_10m) 3848 ql_dbg(ql_dbg_init, vha, 0x0194, 3849 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3850 if (a0->length_om3_10m) 3851 ql_dbg(ql_dbg_init, vha, 0x0195, 3852 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3853 } 3854 3855 3856 /** 3857 * qla24xx_detect_sfp() 3858 * 3859 * @vha: adapter state pointer. 3860 * 3861 * @return 3862 * 0 -- Configure firmware to use short-range settings -- normal 3863 * buffer-to-buffer credits. 3864 * 3865 * 1 -- Configure firmware to use long-range settings -- extra 3866 * buffer-to-buffer credits should be allocated with 3867 * ha->lr_distance containing distance settings from NVRAM or SFP 3868 * (if supported). 3869 */ 3870 int 3871 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3872 { 3873 int rc, used_nvram; 3874 struct sff_8247_a0 *a; 3875 struct qla_hw_data *ha = vha->hw; 3876 struct nvram_81xx *nv = ha->nvram; 3877 #define LR_DISTANCE_UNKNOWN 2 3878 static const char * const types[] = { "Short", "Long" }; 3879 static const char * const lengths[] = { "(10km)", "(5km)", "" }; 3880 u8 ll = 0; 3881 3882 /* Seed with NVRAM settings. */ 3883 used_nvram = 0; 3884 ha->flags.lr_detected = 0; 3885 if (IS_BPM_RANGE_CAPABLE(ha) && 3886 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) { 3887 used_nvram = 1; 3888 ha->flags.lr_detected = 1; 3889 ha->lr_distance = 3890 (nv->enhanced_features >> LR_DIST_NV_POS) 3891 & LR_DIST_NV_MASK; 3892 } 3893 3894 if (!IS_BPM_ENABLED(vha)) 3895 goto out; 3896 /* Determine SR/LR capabilities of SFP/Transceiver. */ 3897 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3898 if (rc) 3899 goto out; 3900 3901 used_nvram = 0; 3902 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3903 qla2xxx_print_sfp_info(vha); 3904 3905 ha->flags.lr_detected = 0; 3906 ll = a->fc_ll_cc7; 3907 if (ll & FC_LL_VL || ll & FC_LL_L) { 3908 /* Long range, track length. */ 3909 ha->flags.lr_detected = 1; 3910 3911 if (a->length_km > 5 || a->length_100m > 50) 3912 ha->lr_distance = LR_DISTANCE_10K; 3913 else 3914 ha->lr_distance = LR_DISTANCE_5K; 3915 } 3916 3917 out: 3918 ql_dbg(ql_dbg_async, vha, 0x507b, 3919 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n", 3920 types[ha->flags.lr_detected], 3921 ha->flags.lr_detected ? lengths[ha->lr_distance] : 3922 lengths[LR_DISTANCE_UNKNOWN], 3923 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance); 3924 return ha->flags.lr_detected; 3925 } 3926 3927 void qla_init_iocb_limit(scsi_qla_host_t *vha) 3928 { 3929 u16 i, num_qps; 3930 u32 limit; 3931 struct qla_hw_data *ha = vha->hw; 3932 3933 num_qps = ha->num_qpairs + 1; 3934 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100; 3935 3936 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count; 3937 ha->base_qpair->fwres.iocbs_limit = limit; 3938 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps; 3939 ha->base_qpair->fwres.iocbs_used = 0; 3940 for (i = 0; i < ha->max_qpairs; i++) { 3941 if (ha->queue_pair_map[i]) { 3942 ha->queue_pair_map[i]->fwres.iocbs_total = 3943 ha->orig_fw_iocb_count; 3944 ha->queue_pair_map[i]->fwres.iocbs_limit = limit; 3945 ha->queue_pair_map[i]->fwres.iocbs_qp_limit = 3946 limit / num_qps; 3947 ha->queue_pair_map[i]->fwres.iocbs_used = 0; 3948 } 3949 } 3950 } 3951 3952 /** 3953 * qla2x00_setup_chip() - Load and start RISC firmware. 3954 * @vha: HA context 3955 * 3956 * Returns 0 on success. 3957 */ 3958 static int 3959 qla2x00_setup_chip(scsi_qla_host_t *vha) 3960 { 3961 int rval; 3962 uint32_t srisc_address = 0; 3963 struct qla_hw_data *ha = vha->hw; 3964 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3965 unsigned long flags; 3966 uint16_t fw_major_version; 3967 int done_once = 0; 3968 3969 if (IS_P3P_TYPE(ha)) { 3970 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3971 if (rval == QLA_SUCCESS) { 3972 qla2x00_stop_firmware(vha); 3973 goto enable_82xx_npiv; 3974 } else 3975 goto failed; 3976 } 3977 3978 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3979 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3980 spin_lock_irqsave(&ha->hardware_lock, flags); 3981 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3982 rd_reg_word(®->hccr); 3983 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3984 } 3985 3986 qla81xx_mpi_sync(vha); 3987 3988 execute_fw_with_lr: 3989 /* Load firmware sequences */ 3990 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3991 if (rval == QLA_SUCCESS) { 3992 ql_dbg(ql_dbg_init, vha, 0x00c9, 3993 "Verifying Checksum of loaded RISC code.\n"); 3994 3995 rval = qla2x00_verify_checksum(vha, srisc_address); 3996 if (rval == QLA_SUCCESS) { 3997 /* Start firmware execution. */ 3998 ql_dbg(ql_dbg_init, vha, 0x00ca, 3999 "Starting firmware.\n"); 4000 4001 if (ql2xexlogins) 4002 ha->flags.exlogins_enabled = 1; 4003 4004 if (qla_is_exch_offld_enabled(vha)) 4005 ha->flags.exchoffld_enabled = 1; 4006 4007 rval = qla2x00_execute_fw(vha, srisc_address); 4008 /* Retrieve firmware information. */ 4009 if (rval == QLA_SUCCESS) { 4010 /* Enable BPM support? */ 4011 if (!done_once++ && qla24xx_detect_sfp(vha)) { 4012 ql_dbg(ql_dbg_init, vha, 0x00ca, 4013 "Re-starting firmware -- BPM.\n"); 4014 /* Best-effort - re-init. */ 4015 ha->isp_ops->reset_chip(vha); 4016 ha->isp_ops->chip_diag(vha); 4017 goto execute_fw_with_lr; 4018 } 4019 4020 if (IS_ZIO_THRESHOLD_CAPABLE(ha)) 4021 qla27xx_set_zio_threshold(vha, 4022 ha->last_zio_threshold); 4023 4024 rval = qla2x00_set_exlogins_buffer(vha); 4025 if (rval != QLA_SUCCESS) 4026 goto failed; 4027 4028 rval = qla2x00_set_exchoffld_buffer(vha); 4029 if (rval != QLA_SUCCESS) 4030 goto failed; 4031 4032 enable_82xx_npiv: 4033 fw_major_version = ha->fw_major_version; 4034 if (IS_P3P_TYPE(ha)) 4035 qla82xx_check_md_needed(vha); 4036 else 4037 rval = qla2x00_get_fw_version(vha); 4038 if (rval != QLA_SUCCESS) 4039 goto failed; 4040 ha->flags.npiv_supported = 0; 4041 if (IS_QLA2XXX_MIDTYPE(ha) && 4042 (ha->fw_attributes & BIT_2)) { 4043 ha->flags.npiv_supported = 1; 4044 if ((!ha->max_npiv_vports) || 4045 ((ha->max_npiv_vports + 1) % 4046 MIN_MULTI_ID_FABRIC)) 4047 ha->max_npiv_vports = 4048 MIN_MULTI_ID_FABRIC - 1; 4049 } 4050 qla2x00_get_resource_cnts(vha); 4051 qla_init_iocb_limit(vha); 4052 4053 /* 4054 * Allocate the array of outstanding commands 4055 * now that we know the firmware resources. 4056 */ 4057 rval = qla2x00_alloc_outstanding_cmds(ha, 4058 vha->req); 4059 if (rval != QLA_SUCCESS) 4060 goto failed; 4061 4062 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 4063 qla2x00_alloc_offload_mem(vha); 4064 4065 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 4066 qla2x00_alloc_fw_dump(vha); 4067 4068 } else { 4069 goto failed; 4070 } 4071 } else { 4072 ql_log(ql_log_fatal, vha, 0x00cd, 4073 "ISP Firmware failed checksum.\n"); 4074 goto failed; 4075 } 4076 4077 /* Enable PUREX PASSTHRU */ 4078 if (ql2xrdpenable || ha->flags.scm_supported_f || 4079 ha->flags.edif_enabled) 4080 qla25xx_set_els_cmds_supported(vha); 4081 } else 4082 goto failed; 4083 4084 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 4085 /* Enable proper parity. */ 4086 spin_lock_irqsave(&ha->hardware_lock, flags); 4087 if (IS_QLA2300(ha)) 4088 /* SRAM parity */ 4089 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1); 4090 else 4091 /* SRAM, Instruction RAM and GP RAM parity */ 4092 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7); 4093 rd_reg_word(®->hccr); 4094 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4095 } 4096 4097 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 4098 ha->flags.fac_supported = 1; 4099 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 4100 uint32_t size; 4101 4102 rval = qla81xx_fac_get_sector_size(vha, &size); 4103 if (rval == QLA_SUCCESS) { 4104 ha->flags.fac_supported = 1; 4105 ha->fdt_block_size = size << 2; 4106 } else { 4107 ql_log(ql_log_warn, vha, 0x00ce, 4108 "Unsupported FAC firmware (%d.%02d.%02d).\n", 4109 ha->fw_major_version, ha->fw_minor_version, 4110 ha->fw_subminor_version); 4111 4112 if (IS_QLA83XX(ha)) { 4113 ha->flags.fac_supported = 0; 4114 rval = QLA_SUCCESS; 4115 } 4116 } 4117 } 4118 failed: 4119 if (rval) { 4120 ql_log(ql_log_fatal, vha, 0x00cf, 4121 "Setup chip ****FAILED****.\n"); 4122 } 4123 4124 return (rval); 4125 } 4126 4127 /** 4128 * qla2x00_init_response_q_entries() - Initializes response queue entries. 4129 * @rsp: response queue 4130 * 4131 * Beginning of request ring has initialization control block already built 4132 * by nvram config routine. 4133 * 4134 * Returns 0 on success. 4135 */ 4136 void 4137 qla2x00_init_response_q_entries(struct rsp_que *rsp) 4138 { 4139 uint16_t cnt; 4140 response_t *pkt; 4141 4142 rsp->ring_ptr = rsp->ring; 4143 rsp->ring_index = 0; 4144 rsp->status_srb = NULL; 4145 pkt = rsp->ring_ptr; 4146 for (cnt = 0; cnt < rsp->length; cnt++) { 4147 pkt->signature = RESPONSE_PROCESSED; 4148 pkt++; 4149 } 4150 } 4151 4152 /** 4153 * qla2x00_update_fw_options() - Read and process firmware options. 4154 * @vha: HA context 4155 * 4156 * Returns 0 on success. 4157 */ 4158 void 4159 qla2x00_update_fw_options(scsi_qla_host_t *vha) 4160 { 4161 uint16_t swing, emphasis, tx_sens, rx_sens; 4162 struct qla_hw_data *ha = vha->hw; 4163 4164 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 4165 qla2x00_get_fw_options(vha, ha->fw_options); 4166 4167 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4168 return; 4169 4170 /* Serial Link options. */ 4171 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 4172 "Serial link options.\n"); 4173 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 4174 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 4175 4176 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 4177 if (ha->fw_seriallink_options[3] & BIT_2) { 4178 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 4179 4180 /* 1G settings */ 4181 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 4182 emphasis = (ha->fw_seriallink_options[2] & 4183 (BIT_4 | BIT_3)) >> 3; 4184 tx_sens = ha->fw_seriallink_options[0] & 4185 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4186 rx_sens = (ha->fw_seriallink_options[0] & 4187 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4188 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 4189 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4190 if (rx_sens == 0x0) 4191 rx_sens = 0x3; 4192 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 4193 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4194 ha->fw_options[10] |= BIT_5 | 4195 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4196 (tx_sens & (BIT_1 | BIT_0)); 4197 4198 /* 2G settings */ 4199 swing = (ha->fw_seriallink_options[2] & 4200 (BIT_7 | BIT_6 | BIT_5)) >> 5; 4201 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 4202 tx_sens = ha->fw_seriallink_options[1] & 4203 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4204 rx_sens = (ha->fw_seriallink_options[1] & 4205 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4206 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 4207 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4208 if (rx_sens == 0x0) 4209 rx_sens = 0x3; 4210 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 4211 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4212 ha->fw_options[11] |= BIT_5 | 4213 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4214 (tx_sens & (BIT_1 | BIT_0)); 4215 } 4216 4217 /* FCP2 options. */ 4218 /* Return command IOCBs without waiting for an ABTS to complete. */ 4219 ha->fw_options[3] |= BIT_13; 4220 4221 /* LED scheme. */ 4222 if (ha->flags.enable_led_scheme) 4223 ha->fw_options[2] |= BIT_12; 4224 4225 /* Detect ISP6312. */ 4226 if (IS_QLA6312(ha)) 4227 ha->fw_options[2] |= BIT_13; 4228 4229 /* Set Retry FLOGI in case of P2P connection */ 4230 if (ha->operating_mode == P2P) { 4231 ha->fw_options[2] |= BIT_3; 4232 ql_dbg(ql_dbg_disc, vha, 0x2100, 4233 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4234 __func__, ha->fw_options[2]); 4235 } 4236 4237 /* Update firmware options. */ 4238 qla2x00_set_fw_options(vha, ha->fw_options); 4239 } 4240 4241 void 4242 qla24xx_update_fw_options(scsi_qla_host_t *vha) 4243 { 4244 int rval; 4245 struct qla_hw_data *ha = vha->hw; 4246 4247 if (IS_P3P_TYPE(ha)) 4248 return; 4249 4250 /* Hold status IOCBs until ABTS response received. */ 4251 if (ql2xfwholdabts) 4252 ha->fw_options[3] |= BIT_12; 4253 4254 /* Set Retry FLOGI in case of P2P connection */ 4255 if (ha->operating_mode == P2P) { 4256 ha->fw_options[2] |= BIT_3; 4257 ql_dbg(ql_dbg_disc, vha, 0x2101, 4258 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4259 __func__, ha->fw_options[2]); 4260 } 4261 4262 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 4263 if (ql2xmvasynctoatio && !ha->flags.edif_enabled && 4264 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 4265 if (qla_tgt_mode_enabled(vha) || 4266 qla_dual_mode_enabled(vha)) 4267 ha->fw_options[2] |= BIT_11; 4268 else 4269 ha->fw_options[2] &= ~BIT_11; 4270 } 4271 4272 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4273 IS_QLA28XX(ha)) { 4274 /* 4275 * Tell FW to track each exchange to prevent 4276 * driver from using stale exchange. 4277 */ 4278 if (qla_tgt_mode_enabled(vha) || 4279 qla_dual_mode_enabled(vha)) 4280 ha->fw_options[2] |= BIT_4; 4281 else 4282 ha->fw_options[2] &= ~(BIT_4); 4283 4284 /* Reserve 1/2 of emergency exchanges for ELS.*/ 4285 if (qla2xuseresexchforels) 4286 ha->fw_options[2] |= BIT_8; 4287 else 4288 ha->fw_options[2] &= ~BIT_8; 4289 4290 /* 4291 * N2N: set Secure=1 for PLOGI ACC and 4292 * fw shal not send PRLI after PLOGI Acc 4293 */ 4294 if (ha->flags.edif_enabled && 4295 DBELL_ACTIVE(vha)) { 4296 ha->fw_options[3] |= BIT_15; 4297 ha->flags.n2n_fw_acc_sec = 1; 4298 } else { 4299 ha->fw_options[3] &= ~BIT_15; 4300 ha->flags.n2n_fw_acc_sec = 0; 4301 } 4302 } 4303 4304 if (ql2xrdpenable || ha->flags.scm_supported_f || 4305 ha->flags.edif_enabled) 4306 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB; 4307 4308 /* Enable Async 8130/8131 events -- transceiver insertion/removal */ 4309 if (IS_BPM_RANGE_CAPABLE(ha)) 4310 ha->fw_options[3] |= BIT_10; 4311 4312 ql_dbg(ql_dbg_init, vha, 0x00e8, 4313 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 4314 __func__, ha->fw_options[1], ha->fw_options[2], 4315 ha->fw_options[3], vha->host->active_mode); 4316 4317 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 4318 qla2x00_set_fw_options(vha, ha->fw_options); 4319 4320 /* Update Serial Link options. */ 4321 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 4322 return; 4323 4324 rval = qla2x00_set_serdes_params(vha, 4325 le16_to_cpu(ha->fw_seriallink_options24[1]), 4326 le16_to_cpu(ha->fw_seriallink_options24[2]), 4327 le16_to_cpu(ha->fw_seriallink_options24[3])); 4328 if (rval != QLA_SUCCESS) { 4329 ql_log(ql_log_warn, vha, 0x0104, 4330 "Unable to update Serial Link options (%x).\n", rval); 4331 } 4332 } 4333 4334 void 4335 qla2x00_config_rings(struct scsi_qla_host *vha) 4336 { 4337 struct qla_hw_data *ha = vha->hw; 4338 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4339 struct req_que *req = ha->req_q_map[0]; 4340 struct rsp_que *rsp = ha->rsp_q_map[0]; 4341 4342 /* Setup ring parameters in initialization control block. */ 4343 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 4344 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 4345 ha->init_cb->request_q_length = cpu_to_le16(req->length); 4346 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 4347 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 4348 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 4349 4350 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0); 4351 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0); 4352 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0); 4353 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0); 4354 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 4355 } 4356 4357 void 4358 qla24xx_config_rings(struct scsi_qla_host *vha) 4359 { 4360 struct qla_hw_data *ha = vha->hw; 4361 device_reg_t *reg = ISP_QUE_REG(ha, 0); 4362 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 4363 struct qla_msix_entry *msix; 4364 struct init_cb_24xx *icb; 4365 uint16_t rid = 0; 4366 struct req_que *req = ha->req_q_map[0]; 4367 struct rsp_que *rsp = ha->rsp_q_map[0]; 4368 4369 /* Setup ring parameters in initialization control block. */ 4370 icb = (struct init_cb_24xx *)ha->init_cb; 4371 icb->request_q_outpointer = cpu_to_le16(0); 4372 icb->response_q_inpointer = cpu_to_le16(0); 4373 icb->request_q_length = cpu_to_le16(req->length); 4374 icb->response_q_length = cpu_to_le16(rsp->length); 4375 put_unaligned_le64(req->dma, &icb->request_q_address); 4376 put_unaligned_le64(rsp->dma, &icb->response_q_address); 4377 4378 /* Setup ATIO queue dma pointers for target mode */ 4379 icb->atio_q_inpointer = cpu_to_le16(0); 4380 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 4381 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 4382 4383 if (IS_SHADOW_REG_CAPABLE(ha)) 4384 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 4385 4386 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4387 IS_QLA28XX(ha)) { 4388 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 4389 icb->rid = cpu_to_le16(rid); 4390 if (ha->flags.msix_enabled) { 4391 msix = &ha->msix_entries[1]; 4392 ql_dbg(ql_dbg_init, vha, 0x0019, 4393 "Registering vector 0x%x for base que.\n", 4394 msix->entry); 4395 icb->msix = cpu_to_le16(msix->entry); 4396 } 4397 /* Use alternate PCI bus number */ 4398 if (MSB(rid)) 4399 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 4400 /* Use alternate PCI devfn */ 4401 if (LSB(rid)) 4402 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 4403 4404 /* Use Disable MSIX Handshake mode for capable adapters */ 4405 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 4406 (ha->flags.msix_enabled)) { 4407 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 4408 ha->flags.disable_msix_handshake = 1; 4409 ql_dbg(ql_dbg_init, vha, 0x00fe, 4410 "MSIX Handshake Disable Mode turned on.\n"); 4411 } else { 4412 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 4413 } 4414 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4415 4416 wrt_reg_dword(®->isp25mq.req_q_in, 0); 4417 wrt_reg_dword(®->isp25mq.req_q_out, 0); 4418 wrt_reg_dword(®->isp25mq.rsp_q_in, 0); 4419 wrt_reg_dword(®->isp25mq.rsp_q_out, 0); 4420 } else { 4421 wrt_reg_dword(®->isp24.req_q_in, 0); 4422 wrt_reg_dword(®->isp24.req_q_out, 0); 4423 wrt_reg_dword(®->isp24.rsp_q_in, 0); 4424 wrt_reg_dword(®->isp24.rsp_q_out, 0); 4425 } 4426 4427 qlt_24xx_config_rings(vha); 4428 4429 /* If the user has configured the speed, set it here */ 4430 if (ha->set_data_rate) { 4431 ql_dbg(ql_dbg_init, vha, 0x00fd, 4432 "Speed set by user : %s Gbps \n", 4433 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4434 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13); 4435 } 4436 4437 /* PCI posting */ 4438 rd_reg_word(&ioreg->hccr); 4439 } 4440 4441 /** 4442 * qla2x00_init_rings() - Initializes firmware. 4443 * @vha: HA context 4444 * 4445 * Beginning of request ring has initialization control block already built 4446 * by nvram config routine. 4447 * 4448 * Returns 0 on success. 4449 */ 4450 int 4451 qla2x00_init_rings(scsi_qla_host_t *vha) 4452 { 4453 int rval; 4454 unsigned long flags = 0; 4455 int cnt, que; 4456 struct qla_hw_data *ha = vha->hw; 4457 struct req_que *req; 4458 struct rsp_que *rsp; 4459 struct mid_init_cb_24xx *mid_init_cb = 4460 (struct mid_init_cb_24xx *) ha->init_cb; 4461 4462 spin_lock_irqsave(&ha->hardware_lock, flags); 4463 4464 /* Clear outstanding commands array. */ 4465 for (que = 0; que < ha->max_req_queues; que++) { 4466 req = ha->req_q_map[que]; 4467 if (!req || !test_bit(que, ha->req_qid_map)) 4468 continue; 4469 req->out_ptr = (uint16_t *)(req->ring + req->length); 4470 *req->out_ptr = 0; 4471 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4472 req->outstanding_cmds[cnt] = NULL; 4473 4474 req->current_outstanding_cmd = 1; 4475 4476 /* Initialize firmware. */ 4477 req->ring_ptr = req->ring; 4478 req->ring_index = 0; 4479 req->cnt = req->length; 4480 } 4481 4482 for (que = 0; que < ha->max_rsp_queues; que++) { 4483 rsp = ha->rsp_q_map[que]; 4484 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4485 continue; 4486 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length); 4487 *rsp->in_ptr = 0; 4488 /* Initialize response queue entries */ 4489 if (IS_QLAFX00(ha)) 4490 qlafx00_init_response_q_entries(rsp); 4491 else 4492 qla2x00_init_response_q_entries(rsp); 4493 } 4494 4495 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4496 ha->tgt.atio_ring_index = 0; 4497 /* Initialize ATIO queue entries */ 4498 qlt_init_atio_q_entries(vha); 4499 4500 ha->isp_ops->config_rings(vha); 4501 4502 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4503 4504 if (IS_QLAFX00(ha)) { 4505 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4506 goto next_check; 4507 } 4508 4509 /* Update any ISP specific firmware options before initialization. */ 4510 ha->isp_ops->update_fw_options(vha); 4511 4512 ql_dbg(ql_dbg_init, vha, 0x00d1, 4513 "Issue init firmware FW opt 1-3= %08x %08x %08x.\n", 4514 le32_to_cpu(mid_init_cb->init_cb.firmware_options_1), 4515 le32_to_cpu(mid_init_cb->init_cb.firmware_options_2), 4516 le32_to_cpu(mid_init_cb->init_cb.firmware_options_3)); 4517 4518 if (ha->flags.npiv_supported) { 4519 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4520 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4521 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4522 } 4523 4524 if (IS_FWI2_CAPABLE(ha)) { 4525 mid_init_cb->options = cpu_to_le16(BIT_1); 4526 mid_init_cb->init_cb.execution_throttle = 4527 cpu_to_le16(ha->cur_fw_xcb_count); 4528 ha->flags.dport_enabled = 4529 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4530 BIT_7) != 0; 4531 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4532 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4533 /* FA-WWPN Status */ 4534 ha->flags.fawwpn_enabled = 4535 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4536 BIT_6) != 0; 4537 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4538 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4539 /* Init_cb will be reused for other command(s). Save a backup copy of port_name */ 4540 memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE); 4541 } 4542 4543 /* ELS pass through payload is limit by frame size. */ 4544 if (ha->flags.edif_enabled) 4545 mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD); 4546 4547 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4548 next_check: 4549 if (rval) { 4550 ql_log(ql_log_fatal, vha, 0x00d2, 4551 "Init Firmware **** FAILED ****.\n"); 4552 } else { 4553 ql_dbg(ql_dbg_init, vha, 0x00d3, 4554 "Init Firmware -- success.\n"); 4555 QLA_FW_STARTED(ha); 4556 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4557 } 4558 4559 return (rval); 4560 } 4561 4562 /** 4563 * qla2x00_fw_ready() - Waits for firmware ready. 4564 * @vha: HA context 4565 * 4566 * Returns 0 on success. 4567 */ 4568 static int 4569 qla2x00_fw_ready(scsi_qla_host_t *vha) 4570 { 4571 int rval; 4572 unsigned long wtime, mtime, cs84xx_time; 4573 uint16_t min_wait; /* Minimum wait time if loop is down */ 4574 uint16_t wait_time; /* Wait time if loop is coming ready */ 4575 uint16_t state[6]; 4576 struct qla_hw_data *ha = vha->hw; 4577 4578 if (IS_QLAFX00(vha->hw)) 4579 return qlafx00_fw_ready(vha); 4580 4581 /* Time to wait for loop down */ 4582 if (IS_P3P_TYPE(ha)) 4583 min_wait = 30; 4584 else 4585 min_wait = 20; 4586 4587 /* 4588 * Firmware should take at most one RATOV to login, plus 5 seconds for 4589 * our own processing. 4590 */ 4591 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4592 wait_time = min_wait; 4593 } 4594 4595 /* Min wait time if loop down */ 4596 mtime = jiffies + (min_wait * HZ); 4597 4598 /* wait time before firmware ready */ 4599 wtime = jiffies + (wait_time * HZ); 4600 4601 /* Wait for ISP to finish LIP */ 4602 if (!vha->flags.init_done) 4603 ql_log(ql_log_info, vha, 0x801e, 4604 "Waiting for LIP to complete.\n"); 4605 4606 do { 4607 memset(state, -1, sizeof(state)); 4608 rval = qla2x00_get_firmware_state(vha, state); 4609 if (rval == QLA_SUCCESS) { 4610 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4611 vha->device_flags &= ~DFLG_NO_CABLE; 4612 } 4613 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4614 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4615 "fw_state=%x 84xx=%x.\n", state[0], 4616 state[2]); 4617 if ((state[2] & FSTATE_LOGGED_IN) && 4618 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4619 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4620 "Sending verify iocb.\n"); 4621 4622 cs84xx_time = jiffies; 4623 rval = qla84xx_init_chip(vha); 4624 if (rval != QLA_SUCCESS) { 4625 ql_log(ql_log_warn, 4626 vha, 0x8007, 4627 "Init chip failed.\n"); 4628 break; 4629 } 4630 4631 /* Add time taken to initialize. */ 4632 cs84xx_time = jiffies - cs84xx_time; 4633 wtime += cs84xx_time; 4634 mtime += cs84xx_time; 4635 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4636 "Increasing wait time by %ld. " 4637 "New time %ld.\n", cs84xx_time, 4638 wtime); 4639 } 4640 } else if (state[0] == FSTATE_READY) { 4641 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4642 "F/W Ready - OK.\n"); 4643 4644 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4645 &ha->login_timeout, &ha->r_a_tov); 4646 4647 rval = QLA_SUCCESS; 4648 break; 4649 } 4650 4651 rval = QLA_FUNCTION_FAILED; 4652 4653 if (atomic_read(&vha->loop_down_timer) && 4654 state[0] != FSTATE_READY) { 4655 /* Loop down. Timeout on min_wait for states 4656 * other than Wait for Login. 4657 */ 4658 if (time_after_eq(jiffies, mtime)) { 4659 ql_log(ql_log_info, vha, 0x8038, 4660 "Cable is unplugged...\n"); 4661 4662 vha->device_flags |= DFLG_NO_CABLE; 4663 break; 4664 } 4665 } 4666 } else { 4667 /* Mailbox cmd failed. Timeout on min_wait. */ 4668 if (time_after_eq(jiffies, mtime) || 4669 ha->flags.isp82xx_fw_hung) 4670 break; 4671 } 4672 4673 if (time_after_eq(jiffies, wtime)) 4674 break; 4675 4676 /* Delay for a while */ 4677 msleep(500); 4678 } while (1); 4679 4680 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4681 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4682 state[1], state[2], state[3], state[4], state[5], jiffies); 4683 4684 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4685 ql_log(ql_log_warn, vha, 0x803b, 4686 "Firmware ready **** FAILED ****.\n"); 4687 } 4688 4689 return (rval); 4690 } 4691 4692 /* 4693 * qla2x00_configure_hba 4694 * Setup adapter context. 4695 * 4696 * Input: 4697 * ha = adapter state pointer. 4698 * 4699 * Returns: 4700 * 0 = success 4701 * 4702 * Context: 4703 * Kernel context. 4704 */ 4705 static int 4706 qla2x00_configure_hba(scsi_qla_host_t *vha) 4707 { 4708 int rval; 4709 uint16_t loop_id; 4710 uint16_t topo; 4711 uint16_t sw_cap; 4712 uint8_t al_pa; 4713 uint8_t area; 4714 uint8_t domain; 4715 char connect_type[22]; 4716 struct qla_hw_data *ha = vha->hw; 4717 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4718 port_id_t id; 4719 unsigned long flags; 4720 4721 /* Get host addresses. */ 4722 rval = qla2x00_get_adapter_id(vha, 4723 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4724 if (rval != QLA_SUCCESS) { 4725 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4726 IS_CNA_CAPABLE(ha) || 4727 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4728 ql_dbg(ql_dbg_disc, vha, 0x2008, 4729 "Loop is in a transition state.\n"); 4730 } else { 4731 ql_log(ql_log_warn, vha, 0x2009, 4732 "Unable to get host loop ID.\n"); 4733 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4734 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4735 ql_log(ql_log_warn, vha, 0x1151, 4736 "Doing link init.\n"); 4737 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4738 return rval; 4739 } 4740 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4741 } 4742 return (rval); 4743 } 4744 4745 if (topo == 4) { 4746 ql_log(ql_log_info, vha, 0x200a, 4747 "Cannot get topology - retrying.\n"); 4748 return (QLA_FUNCTION_FAILED); 4749 } 4750 4751 vha->loop_id = loop_id; 4752 4753 /* initialize */ 4754 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4755 ha->operating_mode = LOOP; 4756 4757 switch (topo) { 4758 case 0: 4759 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4760 ha->switch_cap = 0; 4761 ha->current_topology = ISP_CFG_NL; 4762 strcpy(connect_type, "(Loop)"); 4763 break; 4764 4765 case 1: 4766 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4767 ha->switch_cap = sw_cap; 4768 ha->current_topology = ISP_CFG_FL; 4769 strcpy(connect_type, "(FL_Port)"); 4770 break; 4771 4772 case 2: 4773 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4774 ha->switch_cap = 0; 4775 ha->operating_mode = P2P; 4776 ha->current_topology = ISP_CFG_N; 4777 strcpy(connect_type, "(N_Port-to-N_Port)"); 4778 break; 4779 4780 case 3: 4781 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4782 ha->switch_cap = sw_cap; 4783 ha->operating_mode = P2P; 4784 ha->current_topology = ISP_CFG_F; 4785 strcpy(connect_type, "(F_Port)"); 4786 break; 4787 4788 default: 4789 ql_dbg(ql_dbg_disc, vha, 0x200f, 4790 "HBA in unknown topology %x, using NL.\n", topo); 4791 ha->switch_cap = 0; 4792 ha->current_topology = ISP_CFG_NL; 4793 strcpy(connect_type, "(Loop)"); 4794 break; 4795 } 4796 4797 /* Save Host port and loop ID. */ 4798 /* byte order - Big Endian */ 4799 id.b.domain = domain; 4800 id.b.area = area; 4801 id.b.al_pa = al_pa; 4802 id.b.rsvd_1 = 0; 4803 spin_lock_irqsave(&ha->hardware_lock, flags); 4804 if (vha->hw->flags.edif_enabled) { 4805 if (topo != 2) 4806 qlt_update_host_map(vha, id); 4807 } else if (!(topo == 2 && ha->flags.n2n_bigger)) 4808 qlt_update_host_map(vha, id); 4809 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4810 4811 if (!vha->flags.init_done) 4812 ql_log(ql_log_info, vha, 0x2010, 4813 "Topology - %s, Host Loop address 0x%x.\n", 4814 connect_type, vha->loop_id); 4815 4816 return(rval); 4817 } 4818 4819 inline void 4820 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4821 const char *def) 4822 { 4823 char *st, *en; 4824 uint16_t index; 4825 uint64_t zero[2] = { 0 }; 4826 struct qla_hw_data *ha = vha->hw; 4827 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4828 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4829 4830 if (len > sizeof(zero)) 4831 len = sizeof(zero); 4832 if (memcmp(model, &zero, len) != 0) { 4833 memcpy(ha->model_number, model, len); 4834 st = en = ha->model_number; 4835 en += len - 1; 4836 while (en > st) { 4837 if (*en != 0x20 && *en != 0x00) 4838 break; 4839 *en-- = '\0'; 4840 } 4841 4842 index = (ha->pdev->subsystem_device & 0xff); 4843 if (use_tbl && 4844 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4845 index < QLA_MODEL_NAMES) 4846 strlcpy(ha->model_desc, 4847 qla2x00_model_name[index * 2 + 1], 4848 sizeof(ha->model_desc)); 4849 } else { 4850 index = (ha->pdev->subsystem_device & 0xff); 4851 if (use_tbl && 4852 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4853 index < QLA_MODEL_NAMES) { 4854 strlcpy(ha->model_number, 4855 qla2x00_model_name[index * 2], 4856 sizeof(ha->model_number)); 4857 strlcpy(ha->model_desc, 4858 qla2x00_model_name[index * 2 + 1], 4859 sizeof(ha->model_desc)); 4860 } else { 4861 strlcpy(ha->model_number, def, 4862 sizeof(ha->model_number)); 4863 } 4864 } 4865 if (IS_FWI2_CAPABLE(ha)) 4866 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4867 sizeof(ha->model_desc)); 4868 } 4869 4870 /* On sparc systems, obtain port and node WWN from firmware 4871 * properties. 4872 */ 4873 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4874 { 4875 #ifdef CONFIG_SPARC 4876 struct qla_hw_data *ha = vha->hw; 4877 struct pci_dev *pdev = ha->pdev; 4878 struct device_node *dp = pci_device_to_OF_node(pdev); 4879 const u8 *val; 4880 int len; 4881 4882 val = of_get_property(dp, "port-wwn", &len); 4883 if (val && len >= WWN_SIZE) 4884 memcpy(nv->port_name, val, WWN_SIZE); 4885 4886 val = of_get_property(dp, "node-wwn", &len); 4887 if (val && len >= WWN_SIZE) 4888 memcpy(nv->node_name, val, WWN_SIZE); 4889 #endif 4890 } 4891 4892 /* 4893 * NVRAM configuration for ISP 2xxx 4894 * 4895 * Input: 4896 * ha = adapter block pointer. 4897 * 4898 * Output: 4899 * initialization control block in response_ring 4900 * host adapters parameters in host adapter block 4901 * 4902 * Returns: 4903 * 0 = success. 4904 */ 4905 int 4906 qla2x00_nvram_config(scsi_qla_host_t *vha) 4907 { 4908 int rval; 4909 uint8_t chksum = 0; 4910 uint16_t cnt; 4911 uint8_t *dptr1, *dptr2; 4912 struct qla_hw_data *ha = vha->hw; 4913 init_cb_t *icb = ha->init_cb; 4914 nvram_t *nv = ha->nvram; 4915 uint8_t *ptr = ha->nvram; 4916 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4917 4918 rval = QLA_SUCCESS; 4919 4920 /* Determine NVRAM starting address. */ 4921 ha->nvram_size = sizeof(*nv); 4922 ha->nvram_base = 0; 4923 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4924 if ((rd_reg_word(®->ctrl_status) >> 14) == 1) 4925 ha->nvram_base = 0x80; 4926 4927 /* Get NVRAM data and calculate checksum. */ 4928 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4929 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4930 chksum += *ptr++; 4931 4932 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4933 "Contents of NVRAM.\n"); 4934 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4935 nv, ha->nvram_size); 4936 4937 /* Bad NVRAM data, set defaults parameters. */ 4938 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 4939 nv->nvram_version < 1) { 4940 /* Reset NVRAM data. */ 4941 ql_log(ql_log_warn, vha, 0x0064, 4942 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 4943 chksum, nv->id, nv->nvram_version); 4944 ql_log(ql_log_warn, vha, 0x0065, 4945 "Falling back to " 4946 "functioning (yet invalid -- WWPN) defaults.\n"); 4947 4948 /* 4949 * Set default initialization control block. 4950 */ 4951 memset(nv, 0, ha->nvram_size); 4952 nv->parameter_block_version = ICB_VERSION; 4953 4954 if (IS_QLA23XX(ha)) { 4955 nv->firmware_options[0] = BIT_2 | BIT_1; 4956 nv->firmware_options[1] = BIT_7 | BIT_5; 4957 nv->add_firmware_options[0] = BIT_5; 4958 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4959 nv->frame_payload_size = cpu_to_le16(2048); 4960 nv->special_options[1] = BIT_7; 4961 } else if (IS_QLA2200(ha)) { 4962 nv->firmware_options[0] = BIT_2 | BIT_1; 4963 nv->firmware_options[1] = BIT_7 | BIT_5; 4964 nv->add_firmware_options[0] = BIT_5; 4965 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4966 nv->frame_payload_size = cpu_to_le16(1024); 4967 } else if (IS_QLA2100(ha)) { 4968 nv->firmware_options[0] = BIT_3 | BIT_1; 4969 nv->firmware_options[1] = BIT_5; 4970 nv->frame_payload_size = cpu_to_le16(1024); 4971 } 4972 4973 nv->max_iocb_allocation = cpu_to_le16(256); 4974 nv->execution_throttle = cpu_to_le16(16); 4975 nv->retry_count = 8; 4976 nv->retry_delay = 1; 4977 4978 nv->port_name[0] = 33; 4979 nv->port_name[3] = 224; 4980 nv->port_name[4] = 139; 4981 4982 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4983 4984 nv->login_timeout = 4; 4985 4986 /* 4987 * Set default host adapter parameters 4988 */ 4989 nv->host_p[1] = BIT_2; 4990 nv->reset_delay = 5; 4991 nv->port_down_retry_count = 8; 4992 nv->max_luns_per_target = cpu_to_le16(8); 4993 nv->link_down_timeout = 60; 4994 4995 rval = 1; 4996 } 4997 4998 /* Reset Initialization control block */ 4999 memset(icb, 0, ha->init_cb_size); 5000 5001 /* 5002 * Setup driver NVRAM options. 5003 */ 5004 nv->firmware_options[0] |= (BIT_6 | BIT_1); 5005 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 5006 nv->firmware_options[1] |= (BIT_5 | BIT_0); 5007 nv->firmware_options[1] &= ~BIT_4; 5008 5009 if (IS_QLA23XX(ha)) { 5010 nv->firmware_options[0] |= BIT_2; 5011 nv->firmware_options[0] &= ~BIT_3; 5012 nv->special_options[0] &= ~BIT_6; 5013 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 5014 5015 if (IS_QLA2300(ha)) { 5016 if (ha->fb_rev == FPM_2310) { 5017 strcpy(ha->model_number, "QLA2310"); 5018 } else { 5019 strcpy(ha->model_number, "QLA2300"); 5020 } 5021 } else { 5022 qla2x00_set_model_info(vha, nv->model_number, 5023 sizeof(nv->model_number), "QLA23xx"); 5024 } 5025 } else if (IS_QLA2200(ha)) { 5026 nv->firmware_options[0] |= BIT_2; 5027 /* 5028 * 'Point-to-point preferred, else loop' is not a safe 5029 * connection mode setting. 5030 */ 5031 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 5032 (BIT_5 | BIT_4)) { 5033 /* Force 'loop preferred, else point-to-point'. */ 5034 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 5035 nv->add_firmware_options[0] |= BIT_5; 5036 } 5037 strcpy(ha->model_number, "QLA22xx"); 5038 } else /*if (IS_QLA2100(ha))*/ { 5039 strcpy(ha->model_number, "QLA2100"); 5040 } 5041 5042 /* 5043 * Copy over NVRAM RISC parameter block to initialization control block. 5044 */ 5045 dptr1 = (uint8_t *)icb; 5046 dptr2 = (uint8_t *)&nv->parameter_block_version; 5047 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 5048 while (cnt--) 5049 *dptr1++ = *dptr2++; 5050 5051 /* Copy 2nd half. */ 5052 dptr1 = (uint8_t *)icb->add_firmware_options; 5053 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 5054 while (cnt--) 5055 *dptr1++ = *dptr2++; 5056 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 5057 /* Use alternate WWN? */ 5058 if (nv->host_p[1] & BIT_7) { 5059 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5060 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5061 } 5062 5063 /* Prepare nodename */ 5064 if ((icb->firmware_options[1] & BIT_6) == 0) { 5065 /* 5066 * Firmware will apply the following mask if the nodename was 5067 * not provided. 5068 */ 5069 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5070 icb->node_name[0] &= 0xF0; 5071 } 5072 5073 /* 5074 * Set host adapter parameters. 5075 */ 5076 5077 /* 5078 * BIT_7 in the host-parameters section allows for modification to 5079 * internal driver logging. 5080 */ 5081 if (nv->host_p[0] & BIT_7) 5082 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 5083 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 5084 /* Always load RISC code on non ISP2[12]00 chips. */ 5085 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 5086 ha->flags.disable_risc_code_load = 0; 5087 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 5088 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 5089 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 5090 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 5091 ha->flags.disable_serdes = 0; 5092 5093 ha->operating_mode = 5094 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 5095 5096 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 5097 sizeof(ha->fw_seriallink_options)); 5098 5099 /* save HBA serial number */ 5100 ha->serial0 = icb->port_name[5]; 5101 ha->serial1 = icb->port_name[6]; 5102 ha->serial2 = icb->port_name[7]; 5103 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5104 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5105 5106 icb->execution_throttle = cpu_to_le16(0xFFFF); 5107 5108 ha->retry_count = nv->retry_count; 5109 5110 /* Set minimum login_timeout to 4 seconds. */ 5111 if (nv->login_timeout != ql2xlogintimeout) 5112 nv->login_timeout = ql2xlogintimeout; 5113 if (nv->login_timeout < 4) 5114 nv->login_timeout = 4; 5115 ha->login_timeout = nv->login_timeout; 5116 5117 /* Set minimum RATOV to 100 tenths of a second. */ 5118 ha->r_a_tov = 100; 5119 5120 ha->loop_reset_delay = nv->reset_delay; 5121 5122 /* Link Down Timeout = 0: 5123 * 5124 * When Port Down timer expires we will start returning 5125 * I/O's to OS with "DID_NO_CONNECT". 5126 * 5127 * Link Down Timeout != 0: 5128 * 5129 * The driver waits for the link to come up after link down 5130 * before returning I/Os to OS with "DID_NO_CONNECT". 5131 */ 5132 if (nv->link_down_timeout == 0) { 5133 ha->loop_down_abort_time = 5134 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5135 } else { 5136 ha->link_down_timeout = nv->link_down_timeout; 5137 ha->loop_down_abort_time = 5138 (LOOP_DOWN_TIME - ha->link_down_timeout); 5139 } 5140 5141 /* 5142 * Need enough time to try and get the port back. 5143 */ 5144 ha->port_down_retry_count = nv->port_down_retry_count; 5145 if (qlport_down_retry) 5146 ha->port_down_retry_count = qlport_down_retry; 5147 /* Set login_retry_count */ 5148 ha->login_retry_count = nv->retry_count; 5149 if (ha->port_down_retry_count == nv->port_down_retry_count && 5150 ha->port_down_retry_count > 3) 5151 ha->login_retry_count = ha->port_down_retry_count; 5152 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5153 ha->login_retry_count = ha->port_down_retry_count; 5154 if (ql2xloginretrycount) 5155 ha->login_retry_count = ql2xloginretrycount; 5156 5157 icb->lun_enables = cpu_to_le16(0); 5158 icb->command_resource_count = 0; 5159 icb->immediate_notify_resource_count = 0; 5160 icb->timeout = cpu_to_le16(0); 5161 5162 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 5163 /* Enable RIO */ 5164 icb->firmware_options[0] &= ~BIT_3; 5165 icb->add_firmware_options[0] &= 5166 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5167 icb->add_firmware_options[0] |= BIT_2; 5168 icb->response_accumulation_timer = 3; 5169 icb->interrupt_delay_timer = 5; 5170 5171 vha->flags.process_response_queue = 1; 5172 } else { 5173 /* Enable ZIO. */ 5174 if (!vha->flags.init_done) { 5175 ha->zio_mode = icb->add_firmware_options[0] & 5176 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5177 ha->zio_timer = icb->interrupt_delay_timer ? 5178 icb->interrupt_delay_timer : 2; 5179 } 5180 icb->add_firmware_options[0] &= 5181 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5182 vha->flags.process_response_queue = 0; 5183 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5184 ha->zio_mode = QLA_ZIO_MODE_6; 5185 5186 ql_log(ql_log_info, vha, 0x0068, 5187 "ZIO mode %d enabled; timer delay (%d us).\n", 5188 ha->zio_mode, ha->zio_timer * 100); 5189 5190 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 5191 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 5192 vha->flags.process_response_queue = 1; 5193 } 5194 } 5195 5196 if (rval) { 5197 ql_log(ql_log_warn, vha, 0x0069, 5198 "NVRAM configuration failed.\n"); 5199 } 5200 return (rval); 5201 } 5202 5203 static void 5204 qla2x00_rport_del(void *data) 5205 { 5206 fc_port_t *fcport = data; 5207 struct fc_rport *rport; 5208 unsigned long flags; 5209 5210 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5211 rport = fcport->drport ? fcport->drport : fcport->rport; 5212 fcport->drport = NULL; 5213 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5214 if (rport) { 5215 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 5216 "%s %8phN. rport %p roles %x\n", 5217 __func__, fcport->port_name, rport, 5218 rport->roles); 5219 5220 fc_remote_port_delete(rport); 5221 } 5222 } 5223 5224 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 5225 { 5226 int old_state; 5227 5228 old_state = atomic_read(&fcport->state); 5229 atomic_set(&fcport->state, state); 5230 5231 /* Don't print state transitions during initial allocation of fcport */ 5232 if (old_state && old_state != state) { 5233 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 5234 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 5235 fcport->port_name, port_state_str[old_state], 5236 port_state_str[state], fcport->d_id.b.domain, 5237 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5238 } 5239 } 5240 5241 /** 5242 * qla2x00_alloc_fcport() - Allocate a generic fcport. 5243 * @vha: HA context 5244 * @flags: allocation flags 5245 * 5246 * Returns a pointer to the allocated fcport, or NULL, if none available. 5247 */ 5248 fc_port_t * 5249 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 5250 { 5251 fc_port_t *fcport; 5252 5253 fcport = kzalloc(sizeof(fc_port_t), flags); 5254 if (!fcport) 5255 return NULL; 5256 5257 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 5258 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 5259 flags); 5260 if (!fcport->ct_desc.ct_sns) { 5261 ql_log(ql_log_warn, vha, 0xd049, 5262 "Failed to allocate ct_sns request.\n"); 5263 kfree(fcport); 5264 return NULL; 5265 } 5266 5267 /* Setup fcport template structure. */ 5268 fcport->vha = vha; 5269 fcport->port_type = FCT_UNKNOWN; 5270 fcport->loop_id = FC_NO_LOOP_ID; 5271 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 5272 fcport->supported_classes = FC_COS_UNSPECIFIED; 5273 fcport->fp_speed = PORT_SPEED_UNKNOWN; 5274 5275 fcport->disc_state = DSC_DELETED; 5276 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 5277 fcport->deleted = QLA_SESS_DELETED; 5278 fcport->login_retry = vha->hw->login_retry_count; 5279 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 5280 fcport->logout_on_delete = 1; 5281 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5282 fcport->tgt_short_link_down_cnt = 0; 5283 fcport->dev_loss_tmo = 0; 5284 5285 if (!fcport->ct_desc.ct_sns) { 5286 ql_log(ql_log_warn, vha, 0xd049, 5287 "Failed to allocate ct_sns request.\n"); 5288 kfree(fcport); 5289 return NULL; 5290 } 5291 5292 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 5293 INIT_WORK(&fcport->free_work, qlt_free_session_done); 5294 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 5295 INIT_LIST_HEAD(&fcport->gnl_entry); 5296 INIT_LIST_HEAD(&fcport->list); 5297 5298 INIT_LIST_HEAD(&fcport->sess_cmd_list); 5299 spin_lock_init(&fcport->sess_cmd_lock); 5300 5301 spin_lock_init(&fcport->edif.sa_list_lock); 5302 INIT_LIST_HEAD(&fcport->edif.tx_sa_list); 5303 INIT_LIST_HEAD(&fcport->edif.rx_sa_list); 5304 5305 spin_lock_init(&fcport->edif.indx_list_lock); 5306 INIT_LIST_HEAD(&fcport->edif.edif_indx_list); 5307 5308 return fcport; 5309 } 5310 5311 void 5312 qla2x00_free_fcport(fc_port_t *fcport) 5313 { 5314 if (fcport->ct_desc.ct_sns) { 5315 dma_free_coherent(&fcport->vha->hw->pdev->dev, 5316 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 5317 fcport->ct_desc.ct_sns_dma); 5318 5319 fcport->ct_desc.ct_sns = NULL; 5320 } 5321 5322 qla_edif_flush_sa_ctl_lists(fcport); 5323 list_del(&fcport->list); 5324 qla2x00_clear_loop_id(fcport); 5325 5326 qla_edif_list_del(fcport); 5327 5328 kfree(fcport); 5329 } 5330 5331 static void qla_get_login_template(scsi_qla_host_t *vha) 5332 { 5333 struct qla_hw_data *ha = vha->hw; 5334 int rval; 5335 u32 *bp, sz; 5336 __be32 *q; 5337 5338 memset(ha->init_cb, 0, ha->init_cb_size); 5339 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size); 5340 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 5341 ha->init_cb, sz); 5342 if (rval != QLA_SUCCESS) { 5343 ql_dbg(ql_dbg_init, vha, 0x00d1, 5344 "PLOGI ELS param read fail.\n"); 5345 return; 5346 } 5347 q = (__be32 *)&ha->plogi_els_payld.fl_csp; 5348 5349 bp = (uint32_t *)ha->init_cb; 5350 cpu_to_be32_array(q, bp, sz / 4); 5351 ha->flags.plogi_template_valid = 1; 5352 } 5353 5354 /* 5355 * qla2x00_configure_loop 5356 * Updates Fibre Channel Device Database with what is actually on loop. 5357 * 5358 * Input: 5359 * ha = adapter block pointer. 5360 * 5361 * Returns: 5362 * 0 = success. 5363 * 1 = error. 5364 * 2 = database was full and device was not configured. 5365 */ 5366 static int 5367 qla2x00_configure_loop(scsi_qla_host_t *vha) 5368 { 5369 int rval; 5370 unsigned long flags, save_flags; 5371 struct qla_hw_data *ha = vha->hw; 5372 5373 rval = QLA_SUCCESS; 5374 5375 /* Get Initiator ID */ 5376 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 5377 rval = qla2x00_configure_hba(vha); 5378 if (rval != QLA_SUCCESS) { 5379 ql_dbg(ql_dbg_disc, vha, 0x2013, 5380 "Unable to configure HBA.\n"); 5381 return (rval); 5382 } 5383 } 5384 5385 save_flags = flags = vha->dpc_flags; 5386 ql_dbg(ql_dbg_disc, vha, 0x2014, 5387 "Configure loop -- dpc flags = 0x%lx.\n", flags); 5388 5389 /* 5390 * If we have both an RSCN and PORT UPDATE pending then handle them 5391 * both at the same time. 5392 */ 5393 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5394 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 5395 5396 qla2x00_get_data_rate(vha); 5397 qla_get_login_template(vha); 5398 5399 /* Determine what we need to do */ 5400 if ((ha->current_topology == ISP_CFG_FL || 5401 ha->current_topology == ISP_CFG_F) && 5402 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 5403 5404 set_bit(RSCN_UPDATE, &flags); 5405 clear_bit(LOCAL_LOOP_UPDATE, &flags); 5406 5407 } else if (ha->current_topology == ISP_CFG_NL || 5408 ha->current_topology == ISP_CFG_N) { 5409 clear_bit(RSCN_UPDATE, &flags); 5410 set_bit(LOCAL_LOOP_UPDATE, &flags); 5411 } else if (!vha->flags.online || 5412 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 5413 set_bit(RSCN_UPDATE, &flags); 5414 set_bit(LOCAL_LOOP_UPDATE, &flags); 5415 } 5416 5417 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 5418 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5419 ql_dbg(ql_dbg_disc, vha, 0x2015, 5420 "Loop resync needed, failing.\n"); 5421 rval = QLA_FUNCTION_FAILED; 5422 } else 5423 rval = qla2x00_configure_local_loop(vha); 5424 } 5425 5426 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 5427 if (LOOP_TRANSITION(vha)) { 5428 ql_dbg(ql_dbg_disc, vha, 0x2099, 5429 "Needs RSCN update and loop transition.\n"); 5430 rval = QLA_FUNCTION_FAILED; 5431 } 5432 else 5433 rval = qla2x00_configure_fabric(vha); 5434 } 5435 5436 if (rval == QLA_SUCCESS) { 5437 if (atomic_read(&vha->loop_down_timer) || 5438 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5439 rval = QLA_FUNCTION_FAILED; 5440 } else { 5441 atomic_set(&vha->loop_state, LOOP_READY); 5442 ql_dbg(ql_dbg_disc, vha, 0x2069, 5443 "LOOP READY.\n"); 5444 ha->flags.fw_init_done = 1; 5445 5446 /* 5447 * use link up to wake up app to get ready for 5448 * authentication. 5449 */ 5450 if (ha->flags.edif_enabled && DBELL_INACTIVE(vha)) 5451 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, 5452 ha->link_data_rate); 5453 5454 /* 5455 * Process any ATIO queue entries that came in 5456 * while we weren't online. 5457 */ 5458 if (qla_tgt_mode_enabled(vha) || 5459 qla_dual_mode_enabled(vha)) { 5460 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 5461 qlt_24xx_process_atio_queue(vha, 0); 5462 spin_unlock_irqrestore(&ha->tgt.atio_lock, 5463 flags); 5464 } 5465 } 5466 } 5467 5468 if (rval) { 5469 ql_dbg(ql_dbg_disc, vha, 0x206a, 5470 "%s *** FAILED ***.\n", __func__); 5471 } else { 5472 ql_dbg(ql_dbg_disc, vha, 0x206b, 5473 "%s: exiting normally. local port wwpn %8phN id %06x)\n", 5474 __func__, vha->port_name, vha->d_id.b24); 5475 } 5476 5477 /* Restore state if a resync event occurred during processing */ 5478 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5479 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5480 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5481 if (test_bit(RSCN_UPDATE, &save_flags)) { 5482 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5483 } 5484 } 5485 5486 return (rval); 5487 } 5488 5489 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha) 5490 { 5491 unsigned long flags; 5492 fc_port_t *fcport; 5493 5494 ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__); 5495 5496 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) 5497 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 5498 5499 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5500 if (fcport->n2n_flag) { 5501 qla24xx_fcport_handle_login(vha, fcport); 5502 return QLA_SUCCESS; 5503 } 5504 } 5505 5506 spin_lock_irqsave(&vha->work_lock, flags); 5507 vha->scan.scan_retry++; 5508 spin_unlock_irqrestore(&vha->work_lock, flags); 5509 5510 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5511 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5512 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5513 } 5514 return QLA_FUNCTION_FAILED; 5515 } 5516 5517 static void 5518 qla_reinitialize_link(scsi_qla_host_t *vha) 5519 { 5520 int rval; 5521 5522 atomic_set(&vha->loop_state, LOOP_DOWN); 5523 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 5524 rval = qla2x00_full_login_lip(vha); 5525 if (rval == QLA_SUCCESS) { 5526 ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n"); 5527 } else { 5528 ql_dbg(ql_dbg_disc, vha, 0xd051, 5529 "Link reinitialization failed (%d)\n", rval); 5530 } 5531 } 5532 5533 /* 5534 * qla2x00_configure_local_loop 5535 * Updates Fibre Channel Device Database with local loop devices. 5536 * 5537 * Input: 5538 * ha = adapter block pointer. 5539 * 5540 * Returns: 5541 * 0 = success. 5542 */ 5543 static int 5544 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5545 { 5546 int rval, rval2; 5547 int found; 5548 fc_port_t *fcport, *new_fcport; 5549 uint16_t index; 5550 uint16_t entries; 5551 struct gid_list_info *gid; 5552 uint16_t loop_id; 5553 uint8_t domain, area, al_pa; 5554 struct qla_hw_data *ha = vha->hw; 5555 unsigned long flags; 5556 5557 /* Inititae N2N login. */ 5558 if (N2N_TOPO(ha)) 5559 return qla2x00_configure_n2n_loop(vha); 5560 5561 new_fcport = NULL; 5562 entries = MAX_FIBRE_DEVICES_LOOP; 5563 5564 /* Get list of logged in devices. */ 5565 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5566 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5567 &entries); 5568 if (rval != QLA_SUCCESS) 5569 goto err; 5570 5571 ql_dbg(ql_dbg_disc, vha, 0x2011, 5572 "Entries in ID list (%d).\n", entries); 5573 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5574 ha->gid_list, entries * sizeof(*ha->gid_list)); 5575 5576 if (entries == 0) { 5577 spin_lock_irqsave(&vha->work_lock, flags); 5578 vha->scan.scan_retry++; 5579 spin_unlock_irqrestore(&vha->work_lock, flags); 5580 5581 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5582 u8 loop_map_entries = 0; 5583 int rc; 5584 5585 rc = qla2x00_get_fcal_position_map(vha, NULL, 5586 &loop_map_entries); 5587 if (rc == QLA_SUCCESS && loop_map_entries > 1) { 5588 /* 5589 * There are devices that are still not logged 5590 * in. Reinitialize to give them a chance. 5591 */ 5592 qla_reinitialize_link(vha); 5593 return QLA_FUNCTION_FAILED; 5594 } 5595 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5596 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5597 } 5598 } else { 5599 vha->scan.scan_retry = 0; 5600 } 5601 5602 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5603 fcport->scan_state = QLA_FCPORT_SCAN; 5604 } 5605 5606 /* Allocate temporary fcport for any new fcports discovered. */ 5607 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5608 if (new_fcport == NULL) { 5609 ql_log(ql_log_warn, vha, 0x2012, 5610 "Memory allocation failed for fcport.\n"); 5611 rval = QLA_MEMORY_ALLOC_FAILED; 5612 goto err; 5613 } 5614 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5615 5616 /* Add devices to port list. */ 5617 gid = ha->gid_list; 5618 for (index = 0; index < entries; index++) { 5619 domain = gid->domain; 5620 area = gid->area; 5621 al_pa = gid->al_pa; 5622 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5623 loop_id = gid->loop_id_2100; 5624 else 5625 loop_id = le16_to_cpu(gid->loop_id); 5626 gid = (void *)gid + ha->gid_list_info_size; 5627 5628 /* Bypass reserved domain fields. */ 5629 if ((domain & 0xf0) == 0xf0) 5630 continue; 5631 5632 /* Bypass if not same domain and area of adapter. */ 5633 if (area && domain && ((area != vha->d_id.b.area) || 5634 (domain != vha->d_id.b.domain)) && 5635 (ha->current_topology == ISP_CFG_NL)) 5636 continue; 5637 5638 5639 /* Bypass invalid local loop ID. */ 5640 if (loop_id > LAST_LOCAL_LOOP_ID) 5641 continue; 5642 5643 memset(new_fcport->port_name, 0, WWN_SIZE); 5644 5645 /* Fill in member data. */ 5646 new_fcport->d_id.b.domain = domain; 5647 new_fcport->d_id.b.area = area; 5648 new_fcport->d_id.b.al_pa = al_pa; 5649 new_fcport->loop_id = loop_id; 5650 new_fcport->scan_state = QLA_FCPORT_FOUND; 5651 5652 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5653 if (rval2 != QLA_SUCCESS) { 5654 ql_dbg(ql_dbg_disc, vha, 0x2097, 5655 "Failed to retrieve fcport information " 5656 "-- get_port_database=%x, loop_id=0x%04x.\n", 5657 rval2, new_fcport->loop_id); 5658 /* Skip retry if N2N */ 5659 if (ha->current_topology != ISP_CFG_N) { 5660 ql_dbg(ql_dbg_disc, vha, 0x2105, 5661 "Scheduling resync.\n"); 5662 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5663 continue; 5664 } 5665 } 5666 5667 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5668 /* Check for matching device in port list. */ 5669 found = 0; 5670 fcport = NULL; 5671 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5672 if (memcmp(new_fcport->port_name, fcport->port_name, 5673 WWN_SIZE)) 5674 continue; 5675 5676 fcport->flags &= ~FCF_FABRIC_DEVICE; 5677 fcport->loop_id = new_fcport->loop_id; 5678 fcport->port_type = new_fcport->port_type; 5679 fcport->d_id.b24 = new_fcport->d_id.b24; 5680 memcpy(fcport->node_name, new_fcport->node_name, 5681 WWN_SIZE); 5682 fcport->scan_state = QLA_FCPORT_FOUND; 5683 if (fcport->login_retry == 0) { 5684 fcport->login_retry = vha->hw->login_retry_count; 5685 ql_dbg(ql_dbg_disc, vha, 0x2135, 5686 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n", 5687 fcport->port_name, fcport->loop_id, 5688 fcport->login_retry); 5689 } 5690 found++; 5691 break; 5692 } 5693 5694 if (!found) { 5695 /* New device, add to fcports list. */ 5696 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5697 5698 /* Allocate a new replacement fcport. */ 5699 fcport = new_fcport; 5700 5701 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5702 5703 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5704 5705 if (new_fcport == NULL) { 5706 ql_log(ql_log_warn, vha, 0xd031, 5707 "Failed to allocate memory for fcport.\n"); 5708 rval = QLA_MEMORY_ALLOC_FAILED; 5709 goto err; 5710 } 5711 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5712 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5713 } 5714 5715 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5716 5717 /* Base iIDMA settings on HBA port speed. */ 5718 fcport->fp_speed = ha->link_data_rate; 5719 } 5720 5721 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5722 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5723 break; 5724 5725 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5726 if ((qla_dual_mode_enabled(vha) || 5727 qla_ini_mode_enabled(vha)) && 5728 atomic_read(&fcport->state) == FCS_ONLINE) { 5729 qla2x00_mark_device_lost(vha, fcport, 5730 ql2xplogiabsentdevice); 5731 if (fcport->loop_id != FC_NO_LOOP_ID && 5732 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5733 fcport->port_type != FCT_INITIATOR && 5734 fcport->port_type != FCT_BROADCAST) { 5735 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5736 "%s %d %8phC post del sess\n", 5737 __func__, __LINE__, 5738 fcport->port_name); 5739 5740 qlt_schedule_sess_for_deletion(fcport); 5741 continue; 5742 } 5743 } 5744 } 5745 5746 if (fcport->scan_state == QLA_FCPORT_FOUND) 5747 qla24xx_fcport_handle_login(vha, fcport); 5748 } 5749 5750 qla2x00_free_fcport(new_fcport); 5751 5752 return rval; 5753 5754 err: 5755 ql_dbg(ql_dbg_disc, vha, 0x2098, 5756 "Configure local loop error exit: rval=%x.\n", rval); 5757 return rval; 5758 } 5759 5760 static void 5761 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5762 { 5763 int rval; 5764 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5765 struct qla_hw_data *ha = vha->hw; 5766 5767 if (!IS_IIDMA_CAPABLE(ha)) 5768 return; 5769 5770 if (atomic_read(&fcport->state) != FCS_ONLINE) 5771 return; 5772 5773 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5774 fcport->fp_speed > ha->link_data_rate || 5775 !ha->flags.gpsc_supported) 5776 return; 5777 5778 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5779 mb); 5780 if (rval != QLA_SUCCESS) { 5781 ql_dbg(ql_dbg_disc, vha, 0x2004, 5782 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5783 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5784 } else { 5785 ql_dbg(ql_dbg_disc, vha, 0x2005, 5786 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5787 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5788 fcport->fp_speed, fcport->port_name); 5789 } 5790 } 5791 5792 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5793 { 5794 qla2x00_iidma_fcport(vha, fcport); 5795 qla24xx_update_fcport_fcp_prio(vha, fcport); 5796 } 5797 5798 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5799 { 5800 struct qla_work_evt *e; 5801 5802 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5803 if (!e) 5804 return QLA_FUNCTION_FAILED; 5805 5806 e->u.fcport.fcport = fcport; 5807 return qla2x00_post_work(vha, e); 5808 } 5809 5810 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5811 static void 5812 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5813 { 5814 struct fc_rport_identifiers rport_ids; 5815 struct fc_rport *rport; 5816 unsigned long flags; 5817 5818 if (atomic_read(&fcport->state) == FCS_ONLINE) 5819 return; 5820 5821 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5822 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5823 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5824 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5825 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5826 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5827 if (!rport) { 5828 ql_log(ql_log_warn, vha, 0x2006, 5829 "Unable to allocate fc remote port.\n"); 5830 return; 5831 } 5832 5833 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5834 *((fc_port_t **)rport->dd_data) = fcport; 5835 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5836 fcport->dev_loss_tmo = rport->dev_loss_tmo; 5837 5838 rport->supported_classes = fcport->supported_classes; 5839 5840 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 5841 if (fcport->port_type == FCT_INITIATOR) 5842 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 5843 if (fcport->port_type == FCT_TARGET) 5844 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 5845 if (fcport->port_type & FCT_NVME_INITIATOR) 5846 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 5847 if (fcport->port_type & FCT_NVME_TARGET) 5848 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 5849 if (fcport->port_type & FCT_NVME_DISCOVERY) 5850 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 5851 5852 fc_remote_port_rolechg(rport, rport_ids.roles); 5853 5854 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5855 "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n", 5856 __func__, fcport->port_name, vha->host_no, 5857 rport->scsi_target_id, rport, 5858 (fcport->port_type == FCT_TARGET) ? "tgt" : 5859 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5860 } 5861 5862 /* 5863 * qla2x00_update_fcport 5864 * Updates device on list. 5865 * 5866 * Input: 5867 * ha = adapter block pointer. 5868 * fcport = port structure pointer. 5869 * 5870 * Return: 5871 * 0 - Success 5872 * BIT_0 - error 5873 * 5874 * Context: 5875 * Kernel context. 5876 */ 5877 void 5878 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5879 { 5880 if (IS_SW_RESV_ADDR(fcport->d_id)) 5881 return; 5882 5883 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5884 __func__, fcport->port_name); 5885 5886 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT); 5887 fcport->login_retry = vha->hw->login_retry_count; 5888 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5889 fcport->deleted = 0; 5890 if (vha->hw->current_topology == ISP_CFG_NL) 5891 fcport->logout_on_delete = 0; 5892 else 5893 fcport->logout_on_delete = 1; 5894 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5895 5896 if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) { 5897 fcport->tgt_short_link_down_cnt++; 5898 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5899 } 5900 5901 switch (vha->hw->current_topology) { 5902 case ISP_CFG_N: 5903 case ISP_CFG_NL: 5904 fcport->keep_nport_handle = 1; 5905 break; 5906 default: 5907 break; 5908 } 5909 5910 qla2x00_iidma_fcport(vha, fcport); 5911 5912 qla2x00_dfs_create_rport(vha, fcport); 5913 5914 qla24xx_update_fcport_fcp_prio(vha, fcport); 5915 5916 switch (vha->host->active_mode) { 5917 case MODE_INITIATOR: 5918 qla2x00_reg_remote_port(vha, fcport); 5919 break; 5920 case MODE_TARGET: 5921 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5922 !vha->vha_tgt.qla_tgt->tgt_stopped) 5923 qlt_fc_port_added(vha, fcport); 5924 break; 5925 case MODE_DUAL: 5926 qla2x00_reg_remote_port(vha, fcport); 5927 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5928 !vha->vha_tgt.qla_tgt->tgt_stopped) 5929 qlt_fc_port_added(vha, fcport); 5930 break; 5931 default: 5932 break; 5933 } 5934 5935 if (NVME_TARGET(vha->hw, fcport)) 5936 qla_nvme_register_remote(vha, fcport); 5937 5938 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5939 5940 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5941 if (fcport->id_changed) { 5942 fcport->id_changed = 0; 5943 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5944 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5945 __func__, __LINE__, fcport->port_name, 5946 vha->fcport_count); 5947 qla24xx_post_gfpnid_work(vha, fcport); 5948 } else { 5949 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5950 "%s %d %8phC post gpsc fcp_cnt %d\n", 5951 __func__, __LINE__, fcport->port_name, 5952 vha->fcport_count); 5953 qla24xx_post_gpsc_work(vha, fcport); 5954 } 5955 } 5956 5957 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5958 } 5959 5960 void qla_register_fcport_fn(struct work_struct *work) 5961 { 5962 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5963 u32 rscn_gen = fcport->rscn_gen; 5964 u16 data[2]; 5965 5966 if (IS_SW_RESV_ADDR(fcport->d_id)) 5967 return; 5968 5969 qla2x00_update_fcport(fcport->vha, fcport); 5970 5971 ql_dbg(ql_dbg_disc, fcport->vha, 0x911e, 5972 "%s rscn gen %d/%d next DS %d\n", __func__, 5973 rscn_gen, fcport->rscn_gen, fcport->next_disc_state); 5974 5975 if (rscn_gen != fcport->rscn_gen) { 5976 /* RSCN(s) came in while registration */ 5977 switch (fcport->next_disc_state) { 5978 case DSC_DELETE_PEND: 5979 qlt_schedule_sess_for_deletion(fcport); 5980 break; 5981 case DSC_ADISC: 5982 data[0] = data[1] = 0; 5983 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5984 data); 5985 break; 5986 default: 5987 break; 5988 } 5989 } 5990 } 5991 5992 /* 5993 * qla2x00_configure_fabric 5994 * Setup SNS devices with loop ID's. 5995 * 5996 * Input: 5997 * ha = adapter block pointer. 5998 * 5999 * Returns: 6000 * 0 = success. 6001 * BIT_0 = error 6002 */ 6003 static int 6004 qla2x00_configure_fabric(scsi_qla_host_t *vha) 6005 { 6006 int rval; 6007 fc_port_t *fcport; 6008 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6009 uint16_t loop_id; 6010 LIST_HEAD(new_fcports); 6011 struct qla_hw_data *ha = vha->hw; 6012 int discovery_gen; 6013 6014 /* If FL port exists, then SNS is present */ 6015 if (IS_FWI2_CAPABLE(ha)) 6016 loop_id = NPH_F_PORT; 6017 else 6018 loop_id = SNS_FL_PORT; 6019 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 6020 if (rval != QLA_SUCCESS) { 6021 ql_dbg(ql_dbg_disc, vha, 0x20a0, 6022 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 6023 6024 vha->device_flags &= ~SWITCH_FOUND; 6025 return (QLA_SUCCESS); 6026 } 6027 vha->device_flags |= SWITCH_FOUND; 6028 6029 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0); 6030 if (rval != QLA_SUCCESS) 6031 ql_dbg(ql_dbg_disc, vha, 0x20ff, 6032 "Failed to get Fabric Port Name\n"); 6033 6034 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 6035 rval = qla2x00_send_change_request(vha, 0x3, 0); 6036 if (rval != QLA_SUCCESS) 6037 ql_log(ql_log_warn, vha, 0x121, 6038 "Failed to enable receiving of RSCN requests: 0x%x.\n", 6039 rval); 6040 } 6041 6042 do { 6043 qla2x00_mgmt_svr_login(vha); 6044 6045 /* Ensure we are logged into the SNS. */ 6046 loop_id = NPH_SNS_LID(ha); 6047 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 6048 0xfc, mb, BIT_1|BIT_0); 6049 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 6050 ql_dbg(ql_dbg_disc, vha, 0x20a1, 6051 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 6052 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 6053 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6054 return rval; 6055 } 6056 6057 /* FDMI support. */ 6058 if (ql2xfdmienable && 6059 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 6060 qla2x00_fdmi_register(vha); 6061 6062 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 6063 if (qla2x00_rft_id(vha)) { 6064 /* EMPTY */ 6065 ql_dbg(ql_dbg_disc, vha, 0x20a2, 6066 "Register FC-4 TYPE failed.\n"); 6067 if (test_bit(LOOP_RESYNC_NEEDED, 6068 &vha->dpc_flags)) 6069 break; 6070 } 6071 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 6072 /* EMPTY */ 6073 ql_dbg(ql_dbg_disc, vha, 0x209a, 6074 "Register FC-4 Features failed.\n"); 6075 if (test_bit(LOOP_RESYNC_NEEDED, 6076 &vha->dpc_flags)) 6077 break; 6078 } 6079 if (vha->flags.nvme_enabled) { 6080 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 6081 ql_dbg(ql_dbg_disc, vha, 0x2049, 6082 "Register NVME FC Type Features failed.\n"); 6083 } 6084 } 6085 if (qla2x00_rnn_id(vha)) { 6086 /* EMPTY */ 6087 ql_dbg(ql_dbg_disc, vha, 0x2104, 6088 "Register Node Name failed.\n"); 6089 if (test_bit(LOOP_RESYNC_NEEDED, 6090 &vha->dpc_flags)) 6091 break; 6092 } else if (qla2x00_rsnn_nn(vha)) { 6093 /* EMPTY */ 6094 ql_dbg(ql_dbg_disc, vha, 0x209b, 6095 "Register Symbolic Node Name failed.\n"); 6096 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6097 break; 6098 } 6099 } 6100 6101 6102 /* Mark the time right before querying FW for connected ports. 6103 * This process is long, asynchronous and by the time it's done, 6104 * collected information might not be accurate anymore. E.g. 6105 * disconnected port might have re-connected and a brand new 6106 * session has been created. In this case session's generation 6107 * will be newer than discovery_gen. */ 6108 qlt_do_generation_tick(vha, &discovery_gen); 6109 6110 if (USE_ASYNC_SCAN(ha)) { 6111 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 6112 NULL); 6113 if (rval) 6114 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6115 } else { 6116 list_for_each_entry(fcport, &vha->vp_fcports, list) 6117 fcport->scan_state = QLA_FCPORT_SCAN; 6118 6119 rval = qla2x00_find_all_fabric_devs(vha); 6120 } 6121 if (rval != QLA_SUCCESS) 6122 break; 6123 } while (0); 6124 6125 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 6126 qla_nvme_register_hba(vha); 6127 6128 if (rval) 6129 ql_dbg(ql_dbg_disc, vha, 0x2068, 6130 "Configure fabric error exit rval=%d.\n", rval); 6131 6132 return (rval); 6133 } 6134 6135 /* 6136 * qla2x00_find_all_fabric_devs 6137 * 6138 * Input: 6139 * ha = adapter block pointer. 6140 * dev = database device entry pointer. 6141 * 6142 * Returns: 6143 * 0 = success. 6144 * 6145 * Context: 6146 * Kernel context. 6147 */ 6148 static int 6149 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 6150 { 6151 int rval; 6152 uint16_t loop_id; 6153 fc_port_t *fcport, *new_fcport; 6154 int found; 6155 6156 sw_info_t *swl; 6157 int swl_idx; 6158 int first_dev, last_dev; 6159 port_id_t wrap = {}, nxt_d_id; 6160 struct qla_hw_data *ha = vha->hw; 6161 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6162 unsigned long flags; 6163 6164 rval = QLA_SUCCESS; 6165 6166 /* Try GID_PT to get device list, else GAN. */ 6167 if (!ha->swl) 6168 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 6169 GFP_KERNEL); 6170 swl = ha->swl; 6171 if (!swl) { 6172 /*EMPTY*/ 6173 ql_dbg(ql_dbg_disc, vha, 0x209c, 6174 "GID_PT allocations failed, fallback on GA_NXT.\n"); 6175 } else { 6176 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 6177 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 6178 swl = NULL; 6179 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6180 return rval; 6181 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 6182 swl = NULL; 6183 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6184 return rval; 6185 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 6186 swl = NULL; 6187 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6188 return rval; 6189 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 6190 swl = NULL; 6191 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6192 return rval; 6193 } 6194 6195 /* If other queries succeeded probe for FC-4 type */ 6196 if (swl) { 6197 qla2x00_gff_id(vha, swl); 6198 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6199 return rval; 6200 } 6201 } 6202 swl_idx = 0; 6203 6204 /* Allocate temporary fcport for any new fcports discovered. */ 6205 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6206 if (new_fcport == NULL) { 6207 ql_log(ql_log_warn, vha, 0x209d, 6208 "Failed to allocate memory for fcport.\n"); 6209 return (QLA_MEMORY_ALLOC_FAILED); 6210 } 6211 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6212 /* Set start port ID scan at adapter ID. */ 6213 first_dev = 1; 6214 last_dev = 0; 6215 6216 /* Starting free loop ID. */ 6217 loop_id = ha->min_external_loopid; 6218 for (; loop_id <= ha->max_loop_id; loop_id++) { 6219 if (qla2x00_is_reserved_id(vha, loop_id)) 6220 continue; 6221 6222 if (ha->current_topology == ISP_CFG_FL && 6223 (atomic_read(&vha->loop_down_timer) || 6224 LOOP_TRANSITION(vha))) { 6225 atomic_set(&vha->loop_down_timer, 0); 6226 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6227 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 6228 break; 6229 } 6230 6231 if (swl != NULL) { 6232 if (last_dev) { 6233 wrap.b24 = new_fcport->d_id.b24; 6234 } else { 6235 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 6236 memcpy(new_fcport->node_name, 6237 swl[swl_idx].node_name, WWN_SIZE); 6238 memcpy(new_fcport->port_name, 6239 swl[swl_idx].port_name, WWN_SIZE); 6240 memcpy(new_fcport->fabric_port_name, 6241 swl[swl_idx].fabric_port_name, WWN_SIZE); 6242 new_fcport->fp_speed = swl[swl_idx].fp_speed; 6243 new_fcport->fc4_type = swl[swl_idx].fc4_type; 6244 6245 new_fcport->nvme_flag = 0; 6246 if (vha->flags.nvme_enabled && 6247 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 6248 ql_log(ql_log_info, vha, 0x2131, 6249 "FOUND: NVME port %8phC as FC Type 28h\n", 6250 new_fcport->port_name); 6251 } 6252 6253 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 6254 last_dev = 1; 6255 } 6256 swl_idx++; 6257 } 6258 } else { 6259 /* Send GA_NXT to the switch */ 6260 rval = qla2x00_ga_nxt(vha, new_fcport); 6261 if (rval != QLA_SUCCESS) { 6262 ql_log(ql_log_warn, vha, 0x209e, 6263 "SNS scan failed -- assuming " 6264 "zero-entry result.\n"); 6265 rval = QLA_SUCCESS; 6266 break; 6267 } 6268 } 6269 6270 /* If wrap on switch device list, exit. */ 6271 if (first_dev) { 6272 wrap.b24 = new_fcport->d_id.b24; 6273 first_dev = 0; 6274 } else if (new_fcport->d_id.b24 == wrap.b24) { 6275 ql_dbg(ql_dbg_disc, vha, 0x209f, 6276 "Device wrap (%02x%02x%02x).\n", 6277 new_fcport->d_id.b.domain, 6278 new_fcport->d_id.b.area, 6279 new_fcport->d_id.b.al_pa); 6280 break; 6281 } 6282 6283 /* Bypass if same physical adapter. */ 6284 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 6285 continue; 6286 6287 /* Bypass virtual ports of the same host. */ 6288 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 6289 continue; 6290 6291 /* Bypass if same domain and area of adapter. */ 6292 if (((new_fcport->d_id.b24 & 0xffff00) == 6293 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 6294 ISP_CFG_FL) 6295 continue; 6296 6297 /* Bypass reserved domain fields. */ 6298 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 6299 continue; 6300 6301 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 6302 if (ql2xgffidenable && 6303 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 6304 new_fcport->fc4_type != 0)) 6305 continue; 6306 6307 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 6308 6309 /* Locate matching device in database. */ 6310 found = 0; 6311 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6312 if (memcmp(new_fcport->port_name, fcport->port_name, 6313 WWN_SIZE)) 6314 continue; 6315 6316 fcport->scan_state = QLA_FCPORT_FOUND; 6317 6318 found++; 6319 6320 /* Update port state. */ 6321 memcpy(fcport->fabric_port_name, 6322 new_fcport->fabric_port_name, WWN_SIZE); 6323 fcport->fp_speed = new_fcport->fp_speed; 6324 6325 /* 6326 * If address the same and state FCS_ONLINE 6327 * (or in target mode), nothing changed. 6328 */ 6329 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 6330 (atomic_read(&fcport->state) == FCS_ONLINE || 6331 (vha->host->active_mode == MODE_TARGET))) { 6332 break; 6333 } 6334 6335 if (fcport->login_retry == 0) 6336 fcport->login_retry = 6337 vha->hw->login_retry_count; 6338 /* 6339 * If device was not a fabric device before. 6340 */ 6341 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 6342 fcport->d_id.b24 = new_fcport->d_id.b24; 6343 qla2x00_clear_loop_id(fcport); 6344 fcport->flags |= (FCF_FABRIC_DEVICE | 6345 FCF_LOGIN_NEEDED); 6346 break; 6347 } 6348 6349 /* 6350 * Port ID changed or device was marked to be updated; 6351 * Log it out if still logged in and mark it for 6352 * relogin later. 6353 */ 6354 if (qla_tgt_mode_enabled(base_vha)) { 6355 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 6356 "port changed FC ID, %8phC" 6357 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 6358 fcport->port_name, 6359 fcport->d_id.b.domain, 6360 fcport->d_id.b.area, 6361 fcport->d_id.b.al_pa, 6362 fcport->loop_id, 6363 new_fcport->d_id.b.domain, 6364 new_fcport->d_id.b.area, 6365 new_fcport->d_id.b.al_pa); 6366 fcport->d_id.b24 = new_fcport->d_id.b24; 6367 break; 6368 } 6369 6370 fcport->d_id.b24 = new_fcport->d_id.b24; 6371 fcport->flags |= FCF_LOGIN_NEEDED; 6372 break; 6373 } 6374 6375 if (found && NVME_TARGET(vha->hw, fcport)) { 6376 if (fcport->disc_state == DSC_DELETE_PEND) { 6377 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 6378 vha->fcport_count--; 6379 fcport->login_succ = 0; 6380 } 6381 } 6382 6383 if (found) { 6384 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6385 continue; 6386 } 6387 /* If device was not in our fcports list, then add it. */ 6388 new_fcport->scan_state = QLA_FCPORT_FOUND; 6389 list_add_tail(&new_fcport->list, &vha->vp_fcports); 6390 6391 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6392 6393 6394 /* Allocate a new replacement fcport. */ 6395 nxt_d_id.b24 = new_fcport->d_id.b24; 6396 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6397 if (new_fcport == NULL) { 6398 ql_log(ql_log_warn, vha, 0xd032, 6399 "Memory allocation failed for fcport.\n"); 6400 return (QLA_MEMORY_ALLOC_FAILED); 6401 } 6402 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6403 new_fcport->d_id.b24 = nxt_d_id.b24; 6404 } 6405 6406 qla2x00_free_fcport(new_fcport); 6407 6408 /* 6409 * Logout all previous fabric dev marked lost, except FCP2 devices. 6410 */ 6411 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6412 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6413 break; 6414 6415 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 6416 continue; 6417 6418 if (fcport->scan_state == QLA_FCPORT_SCAN) { 6419 if ((qla_dual_mode_enabled(vha) || 6420 qla_ini_mode_enabled(vha)) && 6421 atomic_read(&fcport->state) == FCS_ONLINE) { 6422 qla2x00_mark_device_lost(vha, fcport, 6423 ql2xplogiabsentdevice); 6424 if (fcport->loop_id != FC_NO_LOOP_ID && 6425 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 6426 fcport->port_type != FCT_INITIATOR && 6427 fcport->port_type != FCT_BROADCAST) { 6428 ql_dbg(ql_dbg_disc, vha, 0x20f0, 6429 "%s %d %8phC post del sess\n", 6430 __func__, __LINE__, 6431 fcport->port_name); 6432 qlt_schedule_sess_for_deletion(fcport); 6433 continue; 6434 } 6435 } 6436 } 6437 6438 if (fcport->scan_state == QLA_FCPORT_FOUND && 6439 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 6440 qla24xx_fcport_handle_login(vha, fcport); 6441 } 6442 return (rval); 6443 } 6444 6445 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 6446 int 6447 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 6448 { 6449 int loop_id = FC_NO_LOOP_ID; 6450 int lid = NPH_MGMT_SERVER - vha->vp_idx; 6451 unsigned long flags; 6452 struct qla_hw_data *ha = vha->hw; 6453 6454 if (vha->vp_idx == 0) { 6455 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 6456 return NPH_MGMT_SERVER; 6457 } 6458 6459 /* pick id from high and work down to low */ 6460 spin_lock_irqsave(&ha->vport_slock, flags); 6461 for (; lid > 0; lid--) { 6462 if (!test_bit(lid, vha->hw->loop_id_map)) { 6463 set_bit(lid, vha->hw->loop_id_map); 6464 loop_id = lid; 6465 break; 6466 } 6467 } 6468 spin_unlock_irqrestore(&ha->vport_slock, flags); 6469 6470 return loop_id; 6471 } 6472 6473 /* 6474 * qla2x00_fabric_login 6475 * Issue fabric login command. 6476 * 6477 * Input: 6478 * ha = adapter block pointer. 6479 * device = pointer to FC device type structure. 6480 * 6481 * Returns: 6482 * 0 - Login successfully 6483 * 1 - Login failed 6484 * 2 - Initiator device 6485 * 3 - Fatal error 6486 */ 6487 int 6488 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 6489 uint16_t *next_loopid) 6490 { 6491 int rval; 6492 int retry; 6493 uint16_t tmp_loopid; 6494 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6495 struct qla_hw_data *ha = vha->hw; 6496 6497 retry = 0; 6498 tmp_loopid = 0; 6499 6500 for (;;) { 6501 ql_dbg(ql_dbg_disc, vha, 0x2000, 6502 "Trying Fabric Login w/loop id 0x%04x for port " 6503 "%02x%02x%02x.\n", 6504 fcport->loop_id, fcport->d_id.b.domain, 6505 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6506 6507 /* Login fcport on switch. */ 6508 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 6509 fcport->d_id.b.domain, fcport->d_id.b.area, 6510 fcport->d_id.b.al_pa, mb, BIT_0); 6511 if (rval != QLA_SUCCESS) { 6512 return rval; 6513 } 6514 if (mb[0] == MBS_PORT_ID_USED) { 6515 /* 6516 * Device has another loop ID. The firmware team 6517 * recommends the driver perform an implicit login with 6518 * the specified ID again. The ID we just used is save 6519 * here so we return with an ID that can be tried by 6520 * the next login. 6521 */ 6522 retry++; 6523 tmp_loopid = fcport->loop_id; 6524 fcport->loop_id = mb[1]; 6525 6526 ql_dbg(ql_dbg_disc, vha, 0x2001, 6527 "Fabric Login: port in use - next loop " 6528 "id=0x%04x, port id= %02x%02x%02x.\n", 6529 fcport->loop_id, fcport->d_id.b.domain, 6530 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6531 6532 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6533 /* 6534 * Login succeeded. 6535 */ 6536 if (retry) { 6537 /* A retry occurred before. */ 6538 *next_loopid = tmp_loopid; 6539 } else { 6540 /* 6541 * No retry occurred before. Just increment the 6542 * ID value for next login. 6543 */ 6544 *next_loopid = (fcport->loop_id + 1); 6545 } 6546 6547 if (mb[1] & BIT_0) { 6548 fcport->port_type = FCT_INITIATOR; 6549 } else { 6550 fcport->port_type = FCT_TARGET; 6551 if (mb[1] & BIT_1) { 6552 fcport->flags |= FCF_FCP2_DEVICE; 6553 } 6554 } 6555 6556 if (mb[10] & BIT_0) 6557 fcport->supported_classes |= FC_COS_CLASS2; 6558 if (mb[10] & BIT_1) 6559 fcport->supported_classes |= FC_COS_CLASS3; 6560 6561 if (IS_FWI2_CAPABLE(ha)) { 6562 if (mb[10] & BIT_7) 6563 fcport->flags |= 6564 FCF_CONF_COMP_SUPPORTED; 6565 } 6566 6567 rval = QLA_SUCCESS; 6568 break; 6569 } else if (mb[0] == MBS_LOOP_ID_USED) { 6570 /* 6571 * Loop ID already used, try next loop ID. 6572 */ 6573 fcport->loop_id++; 6574 rval = qla2x00_find_new_loop_id(vha, fcport); 6575 if (rval != QLA_SUCCESS) { 6576 /* Ran out of loop IDs to use */ 6577 break; 6578 } 6579 } else if (mb[0] == MBS_COMMAND_ERROR) { 6580 /* 6581 * Firmware possibly timed out during login. If NO 6582 * retries are left to do then the device is declared 6583 * dead. 6584 */ 6585 *next_loopid = fcport->loop_id; 6586 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6587 fcport->d_id.b.domain, fcport->d_id.b.area, 6588 fcport->d_id.b.al_pa); 6589 qla2x00_mark_device_lost(vha, fcport, 1); 6590 6591 rval = 1; 6592 break; 6593 } else { 6594 /* 6595 * unrecoverable / not handled error 6596 */ 6597 ql_dbg(ql_dbg_disc, vha, 0x2002, 6598 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6599 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6600 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6601 fcport->loop_id, jiffies); 6602 6603 *next_loopid = fcport->loop_id; 6604 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6605 fcport->d_id.b.domain, fcport->d_id.b.area, 6606 fcport->d_id.b.al_pa); 6607 qla2x00_clear_loop_id(fcport); 6608 fcport->login_retry = 0; 6609 6610 rval = 3; 6611 break; 6612 } 6613 } 6614 6615 return (rval); 6616 } 6617 6618 /* 6619 * qla2x00_local_device_login 6620 * Issue local device login command. 6621 * 6622 * Input: 6623 * ha = adapter block pointer. 6624 * loop_id = loop id of device to login to. 6625 * 6626 * Returns (Where's the #define!!!!): 6627 * 0 - Login successfully 6628 * 1 - Login failed 6629 * 3 - Fatal error 6630 */ 6631 int 6632 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6633 { 6634 int rval; 6635 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6636 6637 memset(mb, 0, sizeof(mb)); 6638 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6639 if (rval == QLA_SUCCESS) { 6640 /* Interrogate mailbox registers for any errors */ 6641 if (mb[0] == MBS_COMMAND_ERROR) 6642 rval = 1; 6643 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6644 /* device not in PCB table */ 6645 rval = 3; 6646 } 6647 6648 return (rval); 6649 } 6650 6651 /* 6652 * qla2x00_loop_resync 6653 * Resync with fibre channel devices. 6654 * 6655 * Input: 6656 * ha = adapter block pointer. 6657 * 6658 * Returns: 6659 * 0 = success 6660 */ 6661 int 6662 qla2x00_loop_resync(scsi_qla_host_t *vha) 6663 { 6664 int rval = QLA_SUCCESS; 6665 uint32_t wait_time; 6666 6667 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6668 if (vha->flags.online) { 6669 if (!(rval = qla2x00_fw_ready(vha))) { 6670 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6671 wait_time = 256; 6672 do { 6673 if (!IS_QLAFX00(vha->hw)) { 6674 /* 6675 * Issue a marker after FW becomes 6676 * ready. 6677 */ 6678 qla2x00_marker(vha, vha->hw->base_qpair, 6679 0, 0, MK_SYNC_ALL); 6680 vha->marker_needed = 0; 6681 } 6682 6683 /* Remap devices on Loop. */ 6684 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6685 6686 if (IS_QLAFX00(vha->hw)) 6687 qlafx00_configure_devices(vha); 6688 else 6689 qla2x00_configure_loop(vha); 6690 6691 wait_time--; 6692 } while (!atomic_read(&vha->loop_down_timer) && 6693 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6694 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6695 &vha->dpc_flags))); 6696 } 6697 } 6698 6699 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6700 return (QLA_FUNCTION_FAILED); 6701 6702 if (rval) 6703 ql_dbg(ql_dbg_disc, vha, 0x206c, 6704 "%s *** FAILED ***.\n", __func__); 6705 6706 return (rval); 6707 } 6708 6709 /* 6710 * qla2x00_perform_loop_resync 6711 * Description: This function will set the appropriate flags and call 6712 * qla2x00_loop_resync. If successful loop will be resynced 6713 * Arguments : scsi_qla_host_t pointer 6714 * returm : Success or Failure 6715 */ 6716 6717 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6718 { 6719 int32_t rval = 0; 6720 6721 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6722 /*Configure the flags so that resync happens properly*/ 6723 atomic_set(&ha->loop_down_timer, 0); 6724 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6725 atomic_set(&ha->loop_state, LOOP_UP); 6726 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6727 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6728 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6729 6730 rval = qla2x00_loop_resync(ha); 6731 } else 6732 atomic_set(&ha->loop_state, LOOP_DEAD); 6733 6734 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6735 } 6736 6737 return rval; 6738 } 6739 6740 void 6741 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6742 { 6743 fc_port_t *fcport; 6744 struct scsi_qla_host *vha, *tvp; 6745 struct qla_hw_data *ha = base_vha->hw; 6746 unsigned long flags; 6747 6748 spin_lock_irqsave(&ha->vport_slock, flags); 6749 /* Go with deferred removal of rport references. */ 6750 list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) { 6751 atomic_inc(&vha->vref_count); 6752 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6753 if (fcport->drport && 6754 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6755 spin_unlock_irqrestore(&ha->vport_slock, flags); 6756 qla2x00_rport_del(fcport); 6757 6758 spin_lock_irqsave(&ha->vport_slock, flags); 6759 } 6760 } 6761 atomic_dec(&vha->vref_count); 6762 wake_up(&vha->vref_waitq); 6763 } 6764 spin_unlock_irqrestore(&ha->vport_slock, flags); 6765 } 6766 6767 /* Assumes idc_lock always held on entry */ 6768 void 6769 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6770 { 6771 struct qla_hw_data *ha = vha->hw; 6772 uint32_t drv_presence, drv_presence_mask; 6773 uint32_t dev_part_info1, dev_part_info2, class_type; 6774 uint32_t class_type_mask = 0x3; 6775 uint16_t fcoe_other_function = 0xffff, i; 6776 6777 if (IS_QLA8044(ha)) { 6778 drv_presence = qla8044_rd_direct(vha, 6779 QLA8044_CRB_DRV_ACTIVE_INDEX); 6780 dev_part_info1 = qla8044_rd_direct(vha, 6781 QLA8044_CRB_DEV_PART_INFO_INDEX); 6782 dev_part_info2 = qla8044_rd_direct(vha, 6783 QLA8044_CRB_DEV_PART_INFO2); 6784 } else { 6785 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6786 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6787 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6788 } 6789 for (i = 0; i < 8; i++) { 6790 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6791 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6792 (i != ha->portnum)) { 6793 fcoe_other_function = i; 6794 break; 6795 } 6796 } 6797 if (fcoe_other_function == 0xffff) { 6798 for (i = 0; i < 8; i++) { 6799 class_type = ((dev_part_info2 >> (i * 4)) & 6800 class_type_mask); 6801 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6802 ((i + 8) != ha->portnum)) { 6803 fcoe_other_function = i + 8; 6804 break; 6805 } 6806 } 6807 } 6808 /* 6809 * Prepare drv-presence mask based on fcoe functions present. 6810 * However consider only valid physical fcoe function numbers (0-15). 6811 */ 6812 drv_presence_mask = ~((1 << (ha->portnum)) | 6813 ((fcoe_other_function == 0xffff) ? 6814 0 : (1 << (fcoe_other_function)))); 6815 6816 /* We are the reset owner iff: 6817 * - No other protocol drivers present. 6818 * - This is the lowest among fcoe functions. */ 6819 if (!(drv_presence & drv_presence_mask) && 6820 (ha->portnum < fcoe_other_function)) { 6821 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6822 "This host is Reset owner.\n"); 6823 ha->flags.nic_core_reset_owner = 1; 6824 } 6825 } 6826 6827 static int 6828 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6829 { 6830 int rval = QLA_SUCCESS; 6831 struct qla_hw_data *ha = vha->hw; 6832 uint32_t drv_ack; 6833 6834 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6835 if (rval == QLA_SUCCESS) { 6836 drv_ack |= (1 << ha->portnum); 6837 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6838 } 6839 6840 return rval; 6841 } 6842 6843 static int 6844 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6845 { 6846 int rval = QLA_SUCCESS; 6847 struct qla_hw_data *ha = vha->hw; 6848 uint32_t drv_ack; 6849 6850 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6851 if (rval == QLA_SUCCESS) { 6852 drv_ack &= ~(1 << ha->portnum); 6853 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6854 } 6855 6856 return rval; 6857 } 6858 6859 /* Assumes idc-lock always held on entry */ 6860 void 6861 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6862 { 6863 struct qla_hw_data *ha = vha->hw; 6864 uint32_t idc_audit_reg = 0, duration_secs = 0; 6865 6866 switch (audit_type) { 6867 case IDC_AUDIT_TIMESTAMP: 6868 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6869 idc_audit_reg = (ha->portnum) | 6870 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6871 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6872 break; 6873 6874 case IDC_AUDIT_COMPLETION: 6875 duration_secs = ((jiffies_to_msecs(jiffies) - 6876 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6877 idc_audit_reg = (ha->portnum) | 6878 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6879 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6880 break; 6881 6882 default: 6883 ql_log(ql_log_warn, vha, 0xb078, 6884 "Invalid audit type specified.\n"); 6885 break; 6886 } 6887 } 6888 6889 /* Assumes idc_lock always held on entry */ 6890 static int 6891 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6892 { 6893 struct qla_hw_data *ha = vha->hw; 6894 uint32_t idc_control, dev_state; 6895 6896 __qla83xx_get_idc_control(vha, &idc_control); 6897 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6898 ql_log(ql_log_info, vha, 0xb080, 6899 "NIC Core reset has been disabled. idc-control=0x%x\n", 6900 idc_control); 6901 return QLA_FUNCTION_FAILED; 6902 } 6903 6904 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6905 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6906 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6907 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6908 QLA8XXX_DEV_NEED_RESET); 6909 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6910 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6911 } else { 6912 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", 6913 qdev_state(dev_state)); 6914 6915 /* SV: XXX: Is timeout required here? */ 6916 /* Wait for IDC state change READY -> NEED_RESET */ 6917 while (dev_state == QLA8XXX_DEV_READY) { 6918 qla83xx_idc_unlock(vha, 0); 6919 msleep(200); 6920 qla83xx_idc_lock(vha, 0); 6921 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6922 } 6923 } 6924 6925 /* Send IDC ack by writing to drv-ack register */ 6926 __qla83xx_set_drv_ack(vha); 6927 6928 return QLA_SUCCESS; 6929 } 6930 6931 int 6932 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6933 { 6934 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6935 } 6936 6937 int 6938 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6939 { 6940 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6941 } 6942 6943 static int 6944 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6945 { 6946 uint32_t drv_presence = 0; 6947 struct qla_hw_data *ha = vha->hw; 6948 6949 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6950 if (drv_presence & (1 << ha->portnum)) 6951 return QLA_SUCCESS; 6952 else 6953 return QLA_TEST_FAILED; 6954 } 6955 6956 int 6957 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6958 { 6959 int rval = QLA_SUCCESS; 6960 struct qla_hw_data *ha = vha->hw; 6961 6962 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6963 "Entered %s().\n", __func__); 6964 6965 if (vha->device_flags & DFLG_DEV_FAILED) { 6966 ql_log(ql_log_warn, vha, 0xb059, 6967 "Device in unrecoverable FAILED state.\n"); 6968 return QLA_FUNCTION_FAILED; 6969 } 6970 6971 qla83xx_idc_lock(vha, 0); 6972 6973 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6974 ql_log(ql_log_warn, vha, 0xb05a, 6975 "Function=0x%x has been removed from IDC participation.\n", 6976 ha->portnum); 6977 rval = QLA_FUNCTION_FAILED; 6978 goto exit; 6979 } 6980 6981 qla83xx_reset_ownership(vha); 6982 6983 rval = qla83xx_initiating_reset(vha); 6984 6985 /* 6986 * Perform reset if we are the reset-owner, 6987 * else wait till IDC state changes to READY/FAILED. 6988 */ 6989 if (rval == QLA_SUCCESS) { 6990 rval = qla83xx_idc_state_handler(vha); 6991 6992 if (rval == QLA_SUCCESS) 6993 ha->flags.nic_core_hung = 0; 6994 __qla83xx_clear_drv_ack(vha); 6995 } 6996 6997 exit: 6998 qla83xx_idc_unlock(vha, 0); 6999 7000 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 7001 7002 return rval; 7003 } 7004 7005 int 7006 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 7007 { 7008 struct qla_hw_data *ha = vha->hw; 7009 int rval = QLA_FUNCTION_FAILED; 7010 7011 if (!IS_MCTP_CAPABLE(ha)) { 7012 /* This message can be removed from the final version */ 7013 ql_log(ql_log_info, vha, 0x506d, 7014 "This board is not MCTP capable\n"); 7015 return rval; 7016 } 7017 7018 if (!ha->mctp_dump) { 7019 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 7020 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 7021 7022 if (!ha->mctp_dump) { 7023 ql_log(ql_log_warn, vha, 0x506e, 7024 "Failed to allocate memory for mctp dump\n"); 7025 return rval; 7026 } 7027 } 7028 7029 #define MCTP_DUMP_STR_ADDR 0x00000000 7030 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 7031 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 7032 if (rval != QLA_SUCCESS) { 7033 ql_log(ql_log_warn, vha, 0x506f, 7034 "Failed to capture mctp dump\n"); 7035 } else { 7036 ql_log(ql_log_info, vha, 0x5070, 7037 "Mctp dump capture for host (%ld/%p).\n", 7038 vha->host_no, ha->mctp_dump); 7039 ha->mctp_dumped = 1; 7040 } 7041 7042 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 7043 ha->flags.nic_core_reset_hdlr_active = 1; 7044 rval = qla83xx_restart_nic_firmware(vha); 7045 if (rval) 7046 /* NIC Core reset failed. */ 7047 ql_log(ql_log_warn, vha, 0x5071, 7048 "Failed to restart nic firmware\n"); 7049 else 7050 ql_dbg(ql_dbg_p3p, vha, 0xb084, 7051 "Restarted NIC firmware successfully.\n"); 7052 ha->flags.nic_core_reset_hdlr_active = 0; 7053 } 7054 7055 return rval; 7056 7057 } 7058 7059 /* 7060 * qla2x00_quiesce_io 7061 * Description: This function will block the new I/Os 7062 * Its not aborting any I/Os as context 7063 * is not destroyed during quiescence 7064 * Arguments: scsi_qla_host_t 7065 * return : void 7066 */ 7067 void 7068 qla2x00_quiesce_io(scsi_qla_host_t *vha) 7069 { 7070 struct qla_hw_data *ha = vha->hw; 7071 struct scsi_qla_host *vp, *tvp; 7072 unsigned long flags; 7073 7074 ql_dbg(ql_dbg_dpc, vha, 0x401d, 7075 "Quiescing I/O - ha=%p.\n", ha); 7076 7077 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 7078 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7079 atomic_set(&vha->loop_state, LOOP_DOWN); 7080 qla2x00_mark_all_devices_lost(vha); 7081 7082 spin_lock_irqsave(&ha->vport_slock, flags); 7083 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7084 atomic_inc(&vp->vref_count); 7085 spin_unlock_irqrestore(&ha->vport_slock, flags); 7086 7087 qla2x00_mark_all_devices_lost(vp); 7088 7089 spin_lock_irqsave(&ha->vport_slock, flags); 7090 atomic_dec(&vp->vref_count); 7091 } 7092 spin_unlock_irqrestore(&ha->vport_slock, flags); 7093 } else { 7094 if (!atomic_read(&vha->loop_down_timer)) 7095 atomic_set(&vha->loop_down_timer, 7096 LOOP_DOWN_TIME); 7097 } 7098 /* Wait for pending cmds to complete */ 7099 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 7100 != QLA_SUCCESS); 7101 } 7102 7103 void 7104 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 7105 { 7106 struct qla_hw_data *ha = vha->hw; 7107 struct scsi_qla_host *vp, *tvp; 7108 unsigned long flags; 7109 fc_port_t *fcport; 7110 u16 i; 7111 7112 /* For ISP82XX, driver waits for completion of the commands. 7113 * online flag should be set. 7114 */ 7115 if (!(IS_P3P_TYPE(ha))) 7116 vha->flags.online = 0; 7117 ha->flags.chip_reset_done = 0; 7118 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 7119 vha->qla_stats.total_isp_aborts++; 7120 7121 ql_log(ql_log_info, vha, 0x00af, 7122 "Performing ISP error recovery - ha=%p.\n", ha); 7123 7124 ha->flags.purge_mbox = 1; 7125 /* For ISP82XX, reset_chip is just disabling interrupts. 7126 * Driver waits for the completion of the commands. 7127 * the interrupts need to be enabled. 7128 */ 7129 if (!(IS_P3P_TYPE(ha))) 7130 ha->isp_ops->reset_chip(vha); 7131 7132 ha->link_data_rate = PORT_SPEED_UNKNOWN; 7133 SAVE_TOPO(ha); 7134 ha->flags.rida_fmt2 = 0; 7135 ha->flags.n2n_ae = 0; 7136 ha->flags.lip_ae = 0; 7137 ha->current_topology = 0; 7138 QLA_FW_STOPPED(ha); 7139 ha->flags.fw_init_done = 0; 7140 ha->chip_reset++; 7141 ha->base_qpair->chip_reset = ha->chip_reset; 7142 ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0; 7143 ha->base_qpair->prev_completion_cnt = 0; 7144 for (i = 0; i < ha->max_qpairs; i++) { 7145 if (ha->queue_pair_map[i]) { 7146 ha->queue_pair_map[i]->chip_reset = 7147 ha->base_qpair->chip_reset; 7148 ha->queue_pair_map[i]->cmd_cnt = 7149 ha->queue_pair_map[i]->cmd_completion_cnt = 0; 7150 ha->base_qpair->prev_completion_cnt = 0; 7151 } 7152 } 7153 7154 /* purge MBox commands */ 7155 if (atomic_read(&ha->num_pend_mbx_stage3)) { 7156 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 7157 complete(&ha->mbx_intr_comp); 7158 } 7159 7160 i = 0; 7161 while (atomic_read(&ha->num_pend_mbx_stage3) || 7162 atomic_read(&ha->num_pend_mbx_stage2) || 7163 atomic_read(&ha->num_pend_mbx_stage1)) { 7164 msleep(20); 7165 i++; 7166 if (i > 50) 7167 break; 7168 } 7169 ha->flags.purge_mbox = 0; 7170 7171 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 7172 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7173 atomic_set(&vha->loop_state, LOOP_DOWN); 7174 qla2x00_mark_all_devices_lost(vha); 7175 7176 spin_lock_irqsave(&ha->vport_slock, flags); 7177 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7178 atomic_inc(&vp->vref_count); 7179 spin_unlock_irqrestore(&ha->vport_slock, flags); 7180 7181 qla2x00_mark_all_devices_lost(vp); 7182 7183 spin_lock_irqsave(&ha->vport_slock, flags); 7184 atomic_dec(&vp->vref_count); 7185 } 7186 spin_unlock_irqrestore(&ha->vport_slock, flags); 7187 } else { 7188 if (!atomic_read(&vha->loop_down_timer)) 7189 atomic_set(&vha->loop_down_timer, 7190 LOOP_DOWN_TIME); 7191 } 7192 7193 /* Clear all async request states across all VPs. */ 7194 list_for_each_entry(fcport, &vha->vp_fcports, list) { 7195 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7196 fcport->scan_state = 0; 7197 } 7198 spin_lock_irqsave(&ha->vport_slock, flags); 7199 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7200 atomic_inc(&vp->vref_count); 7201 spin_unlock_irqrestore(&ha->vport_slock, flags); 7202 7203 list_for_each_entry(fcport, &vp->vp_fcports, list) 7204 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7205 7206 spin_lock_irqsave(&ha->vport_slock, flags); 7207 atomic_dec(&vp->vref_count); 7208 } 7209 spin_unlock_irqrestore(&ha->vport_slock, flags); 7210 7211 /* Make sure for ISP 82XX IO DMA is complete */ 7212 if (IS_P3P_TYPE(ha)) { 7213 qla82xx_chip_reset_cleanup(vha); 7214 ql_log(ql_log_info, vha, 0x00b4, 7215 "Done chip reset cleanup.\n"); 7216 7217 /* Done waiting for pending commands. Reset online flag */ 7218 vha->flags.online = 0; 7219 } 7220 7221 /* Requeue all commands in outstanding command list. */ 7222 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 7223 /* memory barrier */ 7224 wmb(); 7225 } 7226 7227 /* 7228 * qla2x00_abort_isp 7229 * Resets ISP and aborts all outstanding commands. 7230 * 7231 * Input: 7232 * ha = adapter block pointer. 7233 * 7234 * Returns: 7235 * 0 = success 7236 */ 7237 int 7238 qla2x00_abort_isp(scsi_qla_host_t *vha) 7239 { 7240 int rval; 7241 uint8_t status = 0; 7242 struct qla_hw_data *ha = vha->hw; 7243 struct scsi_qla_host *vp, *tvp; 7244 struct req_que *req = ha->req_q_map[0]; 7245 unsigned long flags; 7246 7247 if (vha->flags.online) { 7248 qla2x00_abort_isp_cleanup(vha); 7249 7250 vha->dport_status |= DPORT_DIAG_CHIP_RESET_IN_PROGRESS; 7251 vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS; 7252 7253 if (vha->hw->flags.port_isolated) 7254 return status; 7255 7256 if (qla2x00_isp_reg_stat(ha)) { 7257 ql_log(ql_log_info, vha, 0x803f, 7258 "ISP Abort - ISP reg disconnect, exiting.\n"); 7259 return status; 7260 } 7261 7262 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 7263 ha->flags.chip_reset_done = 1; 7264 vha->flags.online = 1; 7265 status = 0; 7266 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7267 return status; 7268 } 7269 7270 if (IS_QLA8031(ha)) { 7271 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 7272 "Clearing fcoe driver presence.\n"); 7273 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 7274 ql_dbg(ql_dbg_p3p, vha, 0xb073, 7275 "Error while clearing DRV-Presence.\n"); 7276 } 7277 7278 if (unlikely(pci_channel_offline(ha->pdev) && 7279 ha->flags.pci_channel_io_perm_failure)) { 7280 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7281 status = 0; 7282 return status; 7283 } 7284 7285 switch (vha->qlini_mode) { 7286 case QLA2XXX_INI_MODE_DISABLED: 7287 if (!qla_tgt_mode_enabled(vha)) 7288 return 0; 7289 break; 7290 case QLA2XXX_INI_MODE_DUAL: 7291 if (!qla_dual_mode_enabled(vha) && 7292 !qla_ini_mode_enabled(vha)) 7293 return 0; 7294 break; 7295 case QLA2XXX_INI_MODE_ENABLED: 7296 default: 7297 break; 7298 } 7299 7300 ha->isp_ops->get_flash_version(vha, req->ring); 7301 7302 if (qla2x00_isp_reg_stat(ha)) { 7303 ql_log(ql_log_info, vha, 0x803f, 7304 "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n"); 7305 return status; 7306 } 7307 ha->isp_ops->nvram_config(vha); 7308 7309 if (qla2x00_isp_reg_stat(ha)) { 7310 ql_log(ql_log_info, vha, 0x803f, 7311 "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n"); 7312 return status; 7313 } 7314 if (!qla2x00_restart_isp(vha)) { 7315 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7316 7317 if (!atomic_read(&vha->loop_down_timer)) { 7318 /* 7319 * Issue marker command only when we are going 7320 * to start the I/O . 7321 */ 7322 vha->marker_needed = 1; 7323 } 7324 7325 vha->flags.online = 1; 7326 7327 ha->isp_ops->enable_intrs(ha); 7328 7329 ha->isp_abort_cnt = 0; 7330 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7331 7332 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 7333 qla2x00_get_fw_version(vha); 7334 if (ha->fce) { 7335 ha->flags.fce_enabled = 1; 7336 memset(ha->fce, 0, 7337 fce_calc_size(ha->fce_bufs)); 7338 rval = qla2x00_enable_fce_trace(vha, 7339 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 7340 &ha->fce_bufs); 7341 if (rval) { 7342 ql_log(ql_log_warn, vha, 0x8033, 7343 "Unable to reinitialize FCE " 7344 "(%d).\n", rval); 7345 ha->flags.fce_enabled = 0; 7346 } 7347 } 7348 7349 if (ha->eft) { 7350 memset(ha->eft, 0, EFT_SIZE); 7351 rval = qla2x00_enable_eft_trace(vha, 7352 ha->eft_dma, EFT_NUM_BUFFERS); 7353 if (rval) { 7354 ql_log(ql_log_warn, vha, 0x8034, 7355 "Unable to reinitialize EFT " 7356 "(%d).\n", rval); 7357 } 7358 } 7359 } else { /* failed the ISP abort */ 7360 vha->flags.online = 1; 7361 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 7362 if (ha->isp_abort_cnt == 0) { 7363 ql_log(ql_log_fatal, vha, 0x8035, 7364 "ISP error recover failed - " 7365 "board disabled.\n"); 7366 /* 7367 * The next call disables the board 7368 * completely. 7369 */ 7370 qla2x00_abort_isp_cleanup(vha); 7371 vha->flags.online = 0; 7372 clear_bit(ISP_ABORT_RETRY, 7373 &vha->dpc_flags); 7374 status = 0; 7375 } else { /* schedule another ISP abort */ 7376 ha->isp_abort_cnt--; 7377 ql_dbg(ql_dbg_taskm, vha, 0x8020, 7378 "ISP abort - retry remaining %d.\n", 7379 ha->isp_abort_cnt); 7380 status = 1; 7381 } 7382 } else { 7383 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 7384 ql_dbg(ql_dbg_taskm, vha, 0x8021, 7385 "ISP error recovery - retrying (%d) " 7386 "more times.\n", ha->isp_abort_cnt); 7387 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7388 status = 1; 7389 } 7390 } 7391 7392 } 7393 7394 if (vha->hw->flags.port_isolated) { 7395 qla2x00_abort_isp_cleanup(vha); 7396 return status; 7397 } 7398 7399 if (!status) { 7400 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 7401 qla2x00_configure_hba(vha); 7402 spin_lock_irqsave(&ha->vport_slock, flags); 7403 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7404 if (vp->vp_idx) { 7405 atomic_inc(&vp->vref_count); 7406 spin_unlock_irqrestore(&ha->vport_slock, flags); 7407 7408 qla2x00_vp_abort_isp(vp); 7409 7410 spin_lock_irqsave(&ha->vport_slock, flags); 7411 atomic_dec(&vp->vref_count); 7412 } 7413 } 7414 spin_unlock_irqrestore(&ha->vport_slock, flags); 7415 7416 if (IS_QLA8031(ha)) { 7417 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 7418 "Setting back fcoe driver presence.\n"); 7419 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 7420 ql_dbg(ql_dbg_p3p, vha, 0xb074, 7421 "Error while setting DRV-Presence.\n"); 7422 } 7423 } else { 7424 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 7425 __func__); 7426 } 7427 7428 return(status); 7429 } 7430 7431 /* 7432 * qla2x00_restart_isp 7433 * restarts the ISP after a reset 7434 * 7435 * Input: 7436 * ha = adapter block pointer. 7437 * 7438 * Returns: 7439 * 0 = success 7440 */ 7441 static int 7442 qla2x00_restart_isp(scsi_qla_host_t *vha) 7443 { 7444 int status; 7445 struct qla_hw_data *ha = vha->hw; 7446 7447 /* If firmware needs to be loaded */ 7448 if (qla2x00_isp_firmware(vha)) { 7449 vha->flags.online = 0; 7450 status = ha->isp_ops->chip_diag(vha); 7451 if (status) 7452 return status; 7453 status = qla2x00_setup_chip(vha); 7454 if (status) 7455 return status; 7456 } 7457 7458 status = qla2x00_init_rings(vha); 7459 if (status) 7460 return status; 7461 7462 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7463 ha->flags.chip_reset_done = 1; 7464 7465 /* Initialize the queues in use */ 7466 qla25xx_init_queues(ha); 7467 7468 status = qla2x00_fw_ready(vha); 7469 if (status) { 7470 /* if no cable then assume it's good */ 7471 return vha->device_flags & DFLG_NO_CABLE ? 0 : status; 7472 } 7473 7474 /* Issue a marker after FW becomes ready. */ 7475 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7476 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7477 7478 return 0; 7479 } 7480 7481 static int 7482 qla25xx_init_queues(struct qla_hw_data *ha) 7483 { 7484 struct rsp_que *rsp = NULL; 7485 struct req_que *req = NULL; 7486 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7487 int ret = -1; 7488 int i; 7489 7490 for (i = 1; i < ha->max_rsp_queues; i++) { 7491 rsp = ha->rsp_q_map[i]; 7492 if (rsp && test_bit(i, ha->rsp_qid_map)) { 7493 rsp->options &= ~BIT_0; 7494 ret = qla25xx_init_rsp_que(base_vha, rsp); 7495 if (ret != QLA_SUCCESS) 7496 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 7497 "%s Rsp que: %d init failed.\n", 7498 __func__, rsp->id); 7499 else 7500 ql_dbg(ql_dbg_init, base_vha, 0x0100, 7501 "%s Rsp que: %d inited.\n", 7502 __func__, rsp->id); 7503 } 7504 } 7505 for (i = 1; i < ha->max_req_queues; i++) { 7506 req = ha->req_q_map[i]; 7507 if (req && test_bit(i, ha->req_qid_map)) { 7508 /* Clear outstanding commands array. */ 7509 req->options &= ~BIT_0; 7510 ret = qla25xx_init_req_que(base_vha, req); 7511 if (ret != QLA_SUCCESS) 7512 ql_dbg(ql_dbg_init, base_vha, 0x0101, 7513 "%s Req que: %d init failed.\n", 7514 __func__, req->id); 7515 else 7516 ql_dbg(ql_dbg_init, base_vha, 0x0102, 7517 "%s Req que: %d inited.\n", 7518 __func__, req->id); 7519 } 7520 } 7521 return ret; 7522 } 7523 7524 /* 7525 * qla2x00_reset_adapter 7526 * Reset adapter. 7527 * 7528 * Input: 7529 * ha = adapter block pointer. 7530 */ 7531 int 7532 qla2x00_reset_adapter(scsi_qla_host_t *vha) 7533 { 7534 unsigned long flags = 0; 7535 struct qla_hw_data *ha = vha->hw; 7536 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7537 7538 vha->flags.online = 0; 7539 ha->isp_ops->disable_intrs(ha); 7540 7541 spin_lock_irqsave(&ha->hardware_lock, flags); 7542 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 7543 rd_reg_word(®->hccr); /* PCI Posting. */ 7544 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 7545 rd_reg_word(®->hccr); /* PCI Posting. */ 7546 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7547 7548 return QLA_SUCCESS; 7549 } 7550 7551 int 7552 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7553 { 7554 unsigned long flags = 0; 7555 struct qla_hw_data *ha = vha->hw; 7556 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7557 7558 if (IS_P3P_TYPE(ha)) 7559 return QLA_SUCCESS; 7560 7561 vha->flags.online = 0; 7562 ha->isp_ops->disable_intrs(ha); 7563 7564 spin_lock_irqsave(&ha->hardware_lock, flags); 7565 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 7566 rd_reg_dword(®->hccr); 7567 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 7568 rd_reg_dword(®->hccr); 7569 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7570 7571 if (IS_NOPOLLING_TYPE(ha)) 7572 ha->isp_ops->enable_intrs(ha); 7573 7574 return QLA_SUCCESS; 7575 } 7576 7577 /* On sparc systems, obtain port and node WWN from firmware 7578 * properties. 7579 */ 7580 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7581 struct nvram_24xx *nv) 7582 { 7583 #ifdef CONFIG_SPARC 7584 struct qla_hw_data *ha = vha->hw; 7585 struct pci_dev *pdev = ha->pdev; 7586 struct device_node *dp = pci_device_to_OF_node(pdev); 7587 const u8 *val; 7588 int len; 7589 7590 val = of_get_property(dp, "port-wwn", &len); 7591 if (val && len >= WWN_SIZE) 7592 memcpy(nv->port_name, val, WWN_SIZE); 7593 7594 val = of_get_property(dp, "node-wwn", &len); 7595 if (val && len >= WWN_SIZE) 7596 memcpy(nv->node_name, val, WWN_SIZE); 7597 #endif 7598 } 7599 7600 int 7601 qla24xx_nvram_config(scsi_qla_host_t *vha) 7602 { 7603 int rval; 7604 struct init_cb_24xx *icb; 7605 struct nvram_24xx *nv; 7606 __le32 *dptr; 7607 uint8_t *dptr1, *dptr2; 7608 uint32_t chksum; 7609 uint16_t cnt; 7610 struct qla_hw_data *ha = vha->hw; 7611 7612 rval = QLA_SUCCESS; 7613 icb = (struct init_cb_24xx *)ha->init_cb; 7614 nv = ha->nvram; 7615 7616 /* Determine NVRAM starting address. */ 7617 if (ha->port_no == 0) { 7618 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7619 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7620 } else { 7621 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7622 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7623 } 7624 7625 ha->nvram_size = sizeof(*nv); 7626 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7627 7628 /* Get VPD data into cache */ 7629 ha->vpd = ha->nvram + VPD_OFFSET; 7630 ha->isp_ops->read_nvram(vha, ha->vpd, 7631 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7632 7633 /* Get NVRAM data into cache and calculate checksum. */ 7634 dptr = (__force __le32 *)nv; 7635 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7636 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7637 chksum += le32_to_cpu(*dptr); 7638 7639 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7640 "Contents of NVRAM\n"); 7641 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7642 nv, ha->nvram_size); 7643 7644 /* Bad NVRAM data, set defaults parameters. */ 7645 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7646 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7647 /* Reset NVRAM data. */ 7648 ql_log(ql_log_warn, vha, 0x006b, 7649 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7650 chksum, nv->id, nv->nvram_version); 7651 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7652 ql_log(ql_log_warn, vha, 0x006c, 7653 "Falling back to functioning (yet invalid -- WWPN) " 7654 "defaults.\n"); 7655 7656 /* 7657 * Set default initialization control block. 7658 */ 7659 memset(nv, 0, ha->nvram_size); 7660 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7661 nv->version = cpu_to_le16(ICB_VERSION); 7662 nv->frame_payload_size = cpu_to_le16(2048); 7663 nv->execution_throttle = cpu_to_le16(0xFFFF); 7664 nv->exchange_count = cpu_to_le16(0); 7665 nv->hard_address = cpu_to_le16(124); 7666 nv->port_name[0] = 0x21; 7667 nv->port_name[1] = 0x00 + ha->port_no + 1; 7668 nv->port_name[2] = 0x00; 7669 nv->port_name[3] = 0xe0; 7670 nv->port_name[4] = 0x8b; 7671 nv->port_name[5] = 0x1c; 7672 nv->port_name[6] = 0x55; 7673 nv->port_name[7] = 0x86; 7674 nv->node_name[0] = 0x20; 7675 nv->node_name[1] = 0x00; 7676 nv->node_name[2] = 0x00; 7677 nv->node_name[3] = 0xe0; 7678 nv->node_name[4] = 0x8b; 7679 nv->node_name[5] = 0x1c; 7680 nv->node_name[6] = 0x55; 7681 nv->node_name[7] = 0x86; 7682 qla24xx_nvram_wwn_from_ofw(vha, nv); 7683 nv->login_retry_count = cpu_to_le16(8); 7684 nv->interrupt_delay_timer = cpu_to_le16(0); 7685 nv->login_timeout = cpu_to_le16(0); 7686 nv->firmware_options_1 = 7687 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7688 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7689 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7690 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7691 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7692 nv->efi_parameters = cpu_to_le32(0); 7693 nv->reset_delay = 5; 7694 nv->max_luns_per_target = cpu_to_le16(128); 7695 nv->port_down_retry_count = cpu_to_le16(30); 7696 nv->link_down_timeout = cpu_to_le16(30); 7697 7698 rval = 1; 7699 } 7700 7701 if (qla_tgt_mode_enabled(vha)) { 7702 /* Don't enable full login after initial LIP */ 7703 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7704 /* Don't enable LIP full login for initiator */ 7705 nv->host_p &= cpu_to_le32(~BIT_10); 7706 } 7707 7708 qlt_24xx_config_nvram_stage1(vha, nv); 7709 7710 /* Reset Initialization control block */ 7711 memset(icb, 0, ha->init_cb_size); 7712 7713 /* Copy 1st segment. */ 7714 dptr1 = (uint8_t *)icb; 7715 dptr2 = (uint8_t *)&nv->version; 7716 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7717 while (cnt--) 7718 *dptr1++ = *dptr2++; 7719 7720 icb->login_retry_count = nv->login_retry_count; 7721 icb->link_down_on_nos = nv->link_down_on_nos; 7722 7723 /* Copy 2nd segment. */ 7724 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7725 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7726 cnt = (uint8_t *)&icb->reserved_3 - 7727 (uint8_t *)&icb->interrupt_delay_timer; 7728 while (cnt--) 7729 *dptr1++ = *dptr2++; 7730 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7731 /* 7732 * Setup driver NVRAM options. 7733 */ 7734 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7735 "QLA2462"); 7736 7737 qlt_24xx_config_nvram_stage2(vha, icb); 7738 7739 if (nv->host_p & cpu_to_le32(BIT_15)) { 7740 /* Use alternate WWN? */ 7741 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7742 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7743 } 7744 7745 /* Prepare nodename */ 7746 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7747 /* 7748 * Firmware will apply the following mask if the nodename was 7749 * not provided. 7750 */ 7751 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7752 icb->node_name[0] &= 0xF0; 7753 } 7754 7755 /* Set host adapter parameters. */ 7756 ha->flags.disable_risc_code_load = 0; 7757 ha->flags.enable_lip_reset = 0; 7758 ha->flags.enable_lip_full_login = 7759 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7760 ha->flags.enable_target_reset = 7761 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7762 ha->flags.enable_led_scheme = 0; 7763 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7764 7765 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7766 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7767 7768 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7769 sizeof(ha->fw_seriallink_options24)); 7770 7771 /* save HBA serial number */ 7772 ha->serial0 = icb->port_name[5]; 7773 ha->serial1 = icb->port_name[6]; 7774 ha->serial2 = icb->port_name[7]; 7775 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7776 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7777 7778 icb->execution_throttle = cpu_to_le16(0xFFFF); 7779 7780 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7781 7782 /* Set minimum login_timeout to 4 seconds. */ 7783 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7784 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7785 if (le16_to_cpu(nv->login_timeout) < 4) 7786 nv->login_timeout = cpu_to_le16(4); 7787 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7788 7789 /* Set minimum RATOV to 100 tenths of a second. */ 7790 ha->r_a_tov = 100; 7791 7792 ha->loop_reset_delay = nv->reset_delay; 7793 7794 /* Link Down Timeout = 0: 7795 * 7796 * When Port Down timer expires we will start returning 7797 * I/O's to OS with "DID_NO_CONNECT". 7798 * 7799 * Link Down Timeout != 0: 7800 * 7801 * The driver waits for the link to come up after link down 7802 * before returning I/Os to OS with "DID_NO_CONNECT". 7803 */ 7804 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7805 ha->loop_down_abort_time = 7806 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7807 } else { 7808 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7809 ha->loop_down_abort_time = 7810 (LOOP_DOWN_TIME - ha->link_down_timeout); 7811 } 7812 7813 /* Need enough time to try and get the port back. */ 7814 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7815 if (qlport_down_retry) 7816 ha->port_down_retry_count = qlport_down_retry; 7817 7818 /* Set login_retry_count */ 7819 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7820 if (ha->port_down_retry_count == 7821 le16_to_cpu(nv->port_down_retry_count) && 7822 ha->port_down_retry_count > 3) 7823 ha->login_retry_count = ha->port_down_retry_count; 7824 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7825 ha->login_retry_count = ha->port_down_retry_count; 7826 if (ql2xloginretrycount) 7827 ha->login_retry_count = ql2xloginretrycount; 7828 7829 /* N2N: driver will initiate Login instead of FW */ 7830 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 7831 7832 /* Enable ZIO. */ 7833 if (!vha->flags.init_done) { 7834 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7835 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7836 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7837 le16_to_cpu(icb->interrupt_delay_timer) : 2; 7838 } 7839 icb->firmware_options_2 &= cpu_to_le32( 7840 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7841 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7842 ha->zio_mode = QLA_ZIO_MODE_6; 7843 7844 ql_log(ql_log_info, vha, 0x006f, 7845 "ZIO mode %d enabled; timer delay (%d us).\n", 7846 ha->zio_mode, ha->zio_timer * 100); 7847 7848 icb->firmware_options_2 |= cpu_to_le32( 7849 (uint32_t)ha->zio_mode); 7850 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7851 } 7852 7853 if (rval) { 7854 ql_log(ql_log_warn, vha, 0x0070, 7855 "NVRAM configuration failed.\n"); 7856 } 7857 return (rval); 7858 } 7859 7860 static void 7861 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 7862 struct qla27xx_image_status *image_status) 7863 { 7864 ql_dbg(ql_dbg_init, vha, 0x018b, 7865 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 7866 name, "status", 7867 image_status->image_status_mask, 7868 le16_to_cpu(image_status->generation), 7869 image_status->ver_major, 7870 image_status->ver_minor, 7871 image_status->bitmap, 7872 le32_to_cpu(image_status->checksum), 7873 le32_to_cpu(image_status->signature)); 7874 } 7875 7876 static bool 7877 qla28xx_check_aux_image_status_signature( 7878 struct qla27xx_image_status *image_status) 7879 { 7880 ulong signature = le32_to_cpu(image_status->signature); 7881 7882 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 7883 } 7884 7885 static bool 7886 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 7887 { 7888 ulong signature = le32_to_cpu(image_status->signature); 7889 7890 return 7891 signature != QLA27XX_IMG_STATUS_SIGN && 7892 signature != QLA28XX_IMG_STATUS_SIGN; 7893 } 7894 7895 static ulong 7896 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 7897 { 7898 __le32 *p = (__force __le32 *)image_status; 7899 uint n = sizeof(*image_status) / sizeof(*p); 7900 uint32_t sum = 0; 7901 7902 for ( ; n--; p++) 7903 sum += le32_to_cpup(p); 7904 7905 return sum; 7906 } 7907 7908 static inline uint 7909 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 7910 { 7911 return aux->bitmap & bitmask ? 7912 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 7913 } 7914 7915 static void 7916 qla28xx_component_status( 7917 struct active_regions *active_regions, struct qla27xx_image_status *aux) 7918 { 7919 active_regions->aux.board_config = 7920 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 7921 7922 active_regions->aux.vpd_nvram = 7923 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 7924 7925 active_regions->aux.npiv_config_0_1 = 7926 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 7927 7928 active_regions->aux.npiv_config_2_3 = 7929 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 7930 7931 active_regions->aux.nvme_params = 7932 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NVME_PARAMS); 7933 } 7934 7935 static int 7936 qla27xx_compare_image_generation( 7937 struct qla27xx_image_status *pri_image_status, 7938 struct qla27xx_image_status *sec_image_status) 7939 { 7940 /* calculate generation delta as uint16 (this accounts for wrap) */ 7941 int16_t delta = 7942 le16_to_cpu(pri_image_status->generation) - 7943 le16_to_cpu(sec_image_status->generation); 7944 7945 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 7946 7947 return delta; 7948 } 7949 7950 void 7951 qla28xx_get_aux_images( 7952 struct scsi_qla_host *vha, struct active_regions *active_regions) 7953 { 7954 struct qla_hw_data *ha = vha->hw; 7955 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 7956 bool valid_pri_image = false, valid_sec_image = false; 7957 bool active_pri_image = false, active_sec_image = false; 7958 7959 if (!ha->flt_region_aux_img_status_pri) { 7960 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 7961 goto check_sec_image; 7962 } 7963 7964 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status, 7965 ha->flt_region_aux_img_status_pri, 7966 sizeof(pri_aux_image_status) >> 2); 7967 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 7968 7969 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 7970 ql_dbg(ql_dbg_init, vha, 0x018b, 7971 "Primary aux image signature (%#x) not valid\n", 7972 le32_to_cpu(pri_aux_image_status.signature)); 7973 goto check_sec_image; 7974 } 7975 7976 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 7977 ql_dbg(ql_dbg_init, vha, 0x018c, 7978 "Primary aux image checksum failed\n"); 7979 goto check_sec_image; 7980 } 7981 7982 valid_pri_image = true; 7983 7984 if (pri_aux_image_status.image_status_mask & 1) { 7985 ql_dbg(ql_dbg_init, vha, 0x018d, 7986 "Primary aux image is active\n"); 7987 active_pri_image = true; 7988 } 7989 7990 check_sec_image: 7991 if (!ha->flt_region_aux_img_status_sec) { 7992 ql_dbg(ql_dbg_init, vha, 0x018a, 7993 "Secondary aux image not addressed\n"); 7994 goto check_valid_image; 7995 } 7996 7997 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status, 7998 ha->flt_region_aux_img_status_sec, 7999 sizeof(sec_aux_image_status) >> 2); 8000 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 8001 8002 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 8003 ql_dbg(ql_dbg_init, vha, 0x018b, 8004 "Secondary aux image signature (%#x) not valid\n", 8005 le32_to_cpu(sec_aux_image_status.signature)); 8006 goto check_valid_image; 8007 } 8008 8009 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 8010 ql_dbg(ql_dbg_init, vha, 0x018c, 8011 "Secondary aux image checksum failed\n"); 8012 goto check_valid_image; 8013 } 8014 8015 valid_sec_image = true; 8016 8017 if (sec_aux_image_status.image_status_mask & 1) { 8018 ql_dbg(ql_dbg_init, vha, 0x018d, 8019 "Secondary aux image is active\n"); 8020 active_sec_image = true; 8021 } 8022 8023 check_valid_image: 8024 if (valid_pri_image && active_pri_image && 8025 valid_sec_image && active_sec_image) { 8026 if (qla27xx_compare_image_generation(&pri_aux_image_status, 8027 &sec_aux_image_status) >= 0) { 8028 qla28xx_component_status(active_regions, 8029 &pri_aux_image_status); 8030 } else { 8031 qla28xx_component_status(active_regions, 8032 &sec_aux_image_status); 8033 } 8034 } else if (valid_pri_image && active_pri_image) { 8035 qla28xx_component_status(active_regions, &pri_aux_image_status); 8036 } else if (valid_sec_image && active_sec_image) { 8037 qla28xx_component_status(active_regions, &sec_aux_image_status); 8038 } 8039 8040 ql_dbg(ql_dbg_init, vha, 0x018f, 8041 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u, NVME=%u\n", 8042 active_regions->aux.board_config, 8043 active_regions->aux.vpd_nvram, 8044 active_regions->aux.npiv_config_0_1, 8045 active_regions->aux.npiv_config_2_3, 8046 active_regions->aux.nvme_params); 8047 } 8048 8049 void 8050 qla27xx_get_active_image(struct scsi_qla_host *vha, 8051 struct active_regions *active_regions) 8052 { 8053 struct qla_hw_data *ha = vha->hw; 8054 struct qla27xx_image_status pri_image_status, sec_image_status; 8055 bool valid_pri_image = false, valid_sec_image = false; 8056 bool active_pri_image = false, active_sec_image = false; 8057 8058 if (!ha->flt_region_img_status_pri) { 8059 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 8060 goto check_sec_image; 8061 } 8062 8063 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status, 8064 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 8065 QLA_SUCCESS) { 8066 WARN_ON_ONCE(true); 8067 goto check_sec_image; 8068 } 8069 qla27xx_print_image(vha, "Primary image", &pri_image_status); 8070 8071 if (qla27xx_check_image_status_signature(&pri_image_status)) { 8072 ql_dbg(ql_dbg_init, vha, 0x018b, 8073 "Primary image signature (%#x) not valid\n", 8074 le32_to_cpu(pri_image_status.signature)); 8075 goto check_sec_image; 8076 } 8077 8078 if (qla27xx_image_status_checksum(&pri_image_status)) { 8079 ql_dbg(ql_dbg_init, vha, 0x018c, 8080 "Primary image checksum failed\n"); 8081 goto check_sec_image; 8082 } 8083 8084 valid_pri_image = true; 8085 8086 if (pri_image_status.image_status_mask & 1) { 8087 ql_dbg(ql_dbg_init, vha, 0x018d, 8088 "Primary image is active\n"); 8089 active_pri_image = true; 8090 } 8091 8092 check_sec_image: 8093 if (!ha->flt_region_img_status_sec) { 8094 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 8095 goto check_valid_image; 8096 } 8097 8098 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 8099 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 8100 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 8101 8102 if (qla27xx_check_image_status_signature(&sec_image_status)) { 8103 ql_dbg(ql_dbg_init, vha, 0x018b, 8104 "Secondary image signature (%#x) not valid\n", 8105 le32_to_cpu(sec_image_status.signature)); 8106 goto check_valid_image; 8107 } 8108 8109 if (qla27xx_image_status_checksum(&sec_image_status)) { 8110 ql_dbg(ql_dbg_init, vha, 0x018c, 8111 "Secondary image checksum failed\n"); 8112 goto check_valid_image; 8113 } 8114 8115 valid_sec_image = true; 8116 8117 if (sec_image_status.image_status_mask & 1) { 8118 ql_dbg(ql_dbg_init, vha, 0x018d, 8119 "Secondary image is active\n"); 8120 active_sec_image = true; 8121 } 8122 8123 check_valid_image: 8124 if (valid_pri_image && active_pri_image) 8125 active_regions->global = QLA27XX_PRIMARY_IMAGE; 8126 8127 if (valid_sec_image && active_sec_image) { 8128 if (!active_regions->global || 8129 qla27xx_compare_image_generation( 8130 &pri_image_status, &sec_image_status) < 0) { 8131 active_regions->global = QLA27XX_SECONDARY_IMAGE; 8132 } 8133 } 8134 8135 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 8136 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 8137 "default (boot/fw)" : 8138 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 8139 "primary" : 8140 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 8141 "secondary" : "invalid", 8142 active_regions->global); 8143 } 8144 8145 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 8146 { 8147 return 8148 !(dword[4] | dword[5] | dword[6] | dword[7]) || 8149 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 8150 } 8151 8152 static int 8153 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 8154 uint32_t faddr) 8155 { 8156 int rval; 8157 uint templates, segments, fragment; 8158 ulong i; 8159 uint j; 8160 ulong dlen; 8161 uint32_t *dcode; 8162 uint32_t risc_addr, risc_size, risc_attr = 0; 8163 struct qla_hw_data *ha = vha->hw; 8164 struct req_que *req = ha->req_q_map[0]; 8165 struct fwdt *fwdt = ha->fwdt; 8166 8167 ql_dbg(ql_dbg_init, vha, 0x008b, 8168 "FW: Loading firmware from flash (%x).\n", faddr); 8169 8170 dcode = (uint32_t *)req->ring; 8171 qla24xx_read_flash_data(vha, dcode, faddr, 8); 8172 if (qla24xx_risc_firmware_invalid(dcode)) { 8173 ql_log(ql_log_fatal, vha, 0x008c, 8174 "Unable to verify the integrity of flash firmware " 8175 "image.\n"); 8176 ql_log(ql_log_fatal, vha, 0x008d, 8177 "Firmware data: %08x %08x %08x %08x.\n", 8178 dcode[0], dcode[1], dcode[2], dcode[3]); 8179 8180 return QLA_FUNCTION_FAILED; 8181 } 8182 8183 dcode = (uint32_t *)req->ring; 8184 *srisc_addr = 0; 8185 segments = FA_RISC_CODE_SEGMENTS; 8186 for (j = 0; j < segments; j++) { 8187 ql_dbg(ql_dbg_init, vha, 0x008d, 8188 "-> Loading segment %u...\n", j); 8189 qla24xx_read_flash_data(vha, dcode, faddr, 10); 8190 risc_addr = be32_to_cpu((__force __be32)dcode[2]); 8191 risc_size = be32_to_cpu((__force __be32)dcode[3]); 8192 if (!*srisc_addr) { 8193 *srisc_addr = risc_addr; 8194 risc_attr = be32_to_cpu((__force __be32)dcode[9]); 8195 } 8196 8197 dlen = ha->fw_transfer_size >> 2; 8198 for (fragment = 0; risc_size; fragment++) { 8199 if (dlen > risc_size) 8200 dlen = risc_size; 8201 8202 ql_dbg(ql_dbg_init, vha, 0x008e, 8203 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 8204 fragment, risc_addr, faddr, dlen); 8205 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 8206 for (i = 0; i < dlen; i++) 8207 dcode[i] = swab32(dcode[i]); 8208 8209 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8210 if (rval) { 8211 ql_log(ql_log_fatal, vha, 0x008f, 8212 "-> Failed load firmware fragment %u.\n", 8213 fragment); 8214 return QLA_FUNCTION_FAILED; 8215 } 8216 8217 faddr += dlen; 8218 risc_addr += dlen; 8219 risc_size -= dlen; 8220 } 8221 } 8222 8223 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8224 return QLA_SUCCESS; 8225 8226 templates = (risc_attr & BIT_9) ? 2 : 1; 8227 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 8228 for (j = 0; j < templates; j++, fwdt++) { 8229 vfree(fwdt->template); 8230 fwdt->template = NULL; 8231 fwdt->length = 0; 8232 8233 dcode = (uint32_t *)req->ring; 8234 qla24xx_read_flash_data(vha, dcode, faddr, 7); 8235 risc_size = be32_to_cpu((__force __be32)dcode[2]); 8236 ql_dbg(ql_dbg_init, vha, 0x0161, 8237 "-> fwdt%u template array at %#x (%#x dwords)\n", 8238 j, faddr, risc_size); 8239 if (!risc_size || !~risc_size) { 8240 ql_dbg(ql_dbg_init, vha, 0x0162, 8241 "-> fwdt%u failed to read array\n", j); 8242 goto failed; 8243 } 8244 8245 /* skip header and ignore checksum */ 8246 faddr += 7; 8247 risc_size -= 8; 8248 8249 ql_dbg(ql_dbg_init, vha, 0x0163, 8250 "-> fwdt%u template allocate template %#x words...\n", 8251 j, risc_size); 8252 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8253 if (!fwdt->template) { 8254 ql_log(ql_log_warn, vha, 0x0164, 8255 "-> fwdt%u failed allocate template.\n", j); 8256 goto failed; 8257 } 8258 8259 dcode = fwdt->template; 8260 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 8261 8262 if (!qla27xx_fwdt_template_valid(dcode)) { 8263 ql_log(ql_log_warn, vha, 0x0165, 8264 "-> fwdt%u failed template validate\n", j); 8265 goto failed; 8266 } 8267 8268 dlen = qla27xx_fwdt_template_size(dcode); 8269 ql_dbg(ql_dbg_init, vha, 0x0166, 8270 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8271 j, dlen, dlen / sizeof(*dcode)); 8272 if (dlen > risc_size * sizeof(*dcode)) { 8273 ql_log(ql_log_warn, vha, 0x0167, 8274 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8275 j, dlen - risc_size * sizeof(*dcode)); 8276 goto failed; 8277 } 8278 8279 fwdt->length = dlen; 8280 ql_dbg(ql_dbg_init, vha, 0x0168, 8281 "-> fwdt%u loaded template ok\n", j); 8282 8283 faddr += risc_size + 1; 8284 } 8285 8286 return QLA_SUCCESS; 8287 8288 failed: 8289 vfree(fwdt->template); 8290 fwdt->template = NULL; 8291 fwdt->length = 0; 8292 8293 return QLA_SUCCESS; 8294 } 8295 8296 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 8297 8298 int 8299 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8300 { 8301 int rval; 8302 int i, fragment; 8303 uint16_t *wcode; 8304 __be16 *fwcode; 8305 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 8306 struct fw_blob *blob; 8307 struct qla_hw_data *ha = vha->hw; 8308 struct req_que *req = ha->req_q_map[0]; 8309 8310 /* Load firmware blob. */ 8311 blob = qla2x00_request_firmware(vha); 8312 if (!blob) { 8313 ql_log(ql_log_info, vha, 0x0083, 8314 "Firmware image unavailable.\n"); 8315 ql_log(ql_log_info, vha, 0x0084, 8316 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 8317 return QLA_FUNCTION_FAILED; 8318 } 8319 8320 rval = QLA_SUCCESS; 8321 8322 wcode = (uint16_t *)req->ring; 8323 *srisc_addr = 0; 8324 fwcode = (__force __be16 *)blob->fw->data; 8325 fwclen = 0; 8326 8327 /* Validate firmware image by checking version. */ 8328 if (blob->fw->size < 8 * sizeof(uint16_t)) { 8329 ql_log(ql_log_fatal, vha, 0x0085, 8330 "Unable to verify integrity of firmware image (%zd).\n", 8331 blob->fw->size); 8332 goto fail_fw_integrity; 8333 } 8334 for (i = 0; i < 4; i++) 8335 wcode[i] = be16_to_cpu(fwcode[i + 4]); 8336 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 8337 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 8338 wcode[2] == 0 && wcode[3] == 0)) { 8339 ql_log(ql_log_fatal, vha, 0x0086, 8340 "Unable to verify integrity of firmware image.\n"); 8341 ql_log(ql_log_fatal, vha, 0x0087, 8342 "Firmware data: %04x %04x %04x %04x.\n", 8343 wcode[0], wcode[1], wcode[2], wcode[3]); 8344 goto fail_fw_integrity; 8345 } 8346 8347 seg = blob->segs; 8348 while (*seg && rval == QLA_SUCCESS) { 8349 risc_addr = *seg; 8350 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 8351 risc_size = be16_to_cpu(fwcode[3]); 8352 8353 /* Validate firmware image size. */ 8354 fwclen += risc_size * sizeof(uint16_t); 8355 if (blob->fw->size < fwclen) { 8356 ql_log(ql_log_fatal, vha, 0x0088, 8357 "Unable to verify integrity of firmware image " 8358 "(%zd).\n", blob->fw->size); 8359 goto fail_fw_integrity; 8360 } 8361 8362 fragment = 0; 8363 while (risc_size > 0 && rval == QLA_SUCCESS) { 8364 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 8365 if (wlen > risc_size) 8366 wlen = risc_size; 8367 ql_dbg(ql_dbg_init, vha, 0x0089, 8368 "Loading risc segment@ risc addr %x number of " 8369 "words 0x%x.\n", risc_addr, wlen); 8370 8371 for (i = 0; i < wlen; i++) 8372 wcode[i] = swab16((__force u32)fwcode[i]); 8373 8374 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 8375 wlen); 8376 if (rval) { 8377 ql_log(ql_log_fatal, vha, 0x008a, 8378 "Failed to load segment %d of firmware.\n", 8379 fragment); 8380 break; 8381 } 8382 8383 fwcode += wlen; 8384 risc_addr += wlen; 8385 risc_size -= wlen; 8386 fragment++; 8387 } 8388 8389 /* Next segment. */ 8390 seg++; 8391 } 8392 return rval; 8393 8394 fail_fw_integrity: 8395 return QLA_FUNCTION_FAILED; 8396 } 8397 8398 static int 8399 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8400 { 8401 int rval; 8402 uint templates, segments, fragment; 8403 uint32_t *dcode; 8404 ulong dlen; 8405 uint32_t risc_addr, risc_size, risc_attr = 0; 8406 ulong i; 8407 uint j; 8408 struct fw_blob *blob; 8409 __be32 *fwcode; 8410 struct qla_hw_data *ha = vha->hw; 8411 struct req_que *req = ha->req_q_map[0]; 8412 struct fwdt *fwdt = ha->fwdt; 8413 8414 ql_dbg(ql_dbg_init, vha, 0x0090, 8415 "-> FW: Loading via request-firmware.\n"); 8416 8417 blob = qla2x00_request_firmware(vha); 8418 if (!blob) { 8419 ql_log(ql_log_warn, vha, 0x0092, 8420 "-> Firmware file not found.\n"); 8421 8422 return QLA_FUNCTION_FAILED; 8423 } 8424 8425 fwcode = (__force __be32 *)blob->fw->data; 8426 dcode = (__force uint32_t *)fwcode; 8427 if (qla24xx_risc_firmware_invalid(dcode)) { 8428 ql_log(ql_log_fatal, vha, 0x0093, 8429 "Unable to verify integrity of firmware image (%zd).\n", 8430 blob->fw->size); 8431 ql_log(ql_log_fatal, vha, 0x0095, 8432 "Firmware data: %08x %08x %08x %08x.\n", 8433 dcode[0], dcode[1], dcode[2], dcode[3]); 8434 return QLA_FUNCTION_FAILED; 8435 } 8436 8437 dcode = (uint32_t *)req->ring; 8438 *srisc_addr = 0; 8439 segments = FA_RISC_CODE_SEGMENTS; 8440 for (j = 0; j < segments; j++) { 8441 ql_dbg(ql_dbg_init, vha, 0x0096, 8442 "-> Loading segment %u...\n", j); 8443 risc_addr = be32_to_cpu(fwcode[2]); 8444 risc_size = be32_to_cpu(fwcode[3]); 8445 8446 if (!*srisc_addr) { 8447 *srisc_addr = risc_addr; 8448 risc_attr = be32_to_cpu(fwcode[9]); 8449 } 8450 8451 dlen = ha->fw_transfer_size >> 2; 8452 for (fragment = 0; risc_size; fragment++) { 8453 if (dlen > risc_size) 8454 dlen = risc_size; 8455 8456 ql_dbg(ql_dbg_init, vha, 0x0097, 8457 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 8458 fragment, risc_addr, 8459 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 8460 dlen); 8461 8462 for (i = 0; i < dlen; i++) 8463 dcode[i] = swab32((__force u32)fwcode[i]); 8464 8465 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8466 if (rval) { 8467 ql_log(ql_log_fatal, vha, 0x0098, 8468 "-> Failed load firmware fragment %u.\n", 8469 fragment); 8470 return QLA_FUNCTION_FAILED; 8471 } 8472 8473 fwcode += dlen; 8474 risc_addr += dlen; 8475 risc_size -= dlen; 8476 } 8477 } 8478 8479 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8480 return QLA_SUCCESS; 8481 8482 templates = (risc_attr & BIT_9) ? 2 : 1; 8483 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 8484 for (j = 0; j < templates; j++, fwdt++) { 8485 vfree(fwdt->template); 8486 fwdt->template = NULL; 8487 fwdt->length = 0; 8488 8489 risc_size = be32_to_cpu(fwcode[2]); 8490 ql_dbg(ql_dbg_init, vha, 0x0171, 8491 "-> fwdt%u template array at %#x (%#x dwords)\n", 8492 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 8493 risc_size); 8494 if (!risc_size || !~risc_size) { 8495 ql_dbg(ql_dbg_init, vha, 0x0172, 8496 "-> fwdt%u failed to read array\n", j); 8497 goto failed; 8498 } 8499 8500 /* skip header and ignore checksum */ 8501 fwcode += 7; 8502 risc_size -= 8; 8503 8504 ql_dbg(ql_dbg_init, vha, 0x0173, 8505 "-> fwdt%u template allocate template %#x words...\n", 8506 j, risc_size); 8507 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8508 if (!fwdt->template) { 8509 ql_log(ql_log_warn, vha, 0x0174, 8510 "-> fwdt%u failed allocate template.\n", j); 8511 goto failed; 8512 } 8513 8514 dcode = fwdt->template; 8515 for (i = 0; i < risc_size; i++) 8516 dcode[i] = (__force u32)fwcode[i]; 8517 8518 if (!qla27xx_fwdt_template_valid(dcode)) { 8519 ql_log(ql_log_warn, vha, 0x0175, 8520 "-> fwdt%u failed template validate\n", j); 8521 goto failed; 8522 } 8523 8524 dlen = qla27xx_fwdt_template_size(dcode); 8525 ql_dbg(ql_dbg_init, vha, 0x0176, 8526 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8527 j, dlen, dlen / sizeof(*dcode)); 8528 if (dlen > risc_size * sizeof(*dcode)) { 8529 ql_log(ql_log_warn, vha, 0x0177, 8530 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8531 j, dlen - risc_size * sizeof(*dcode)); 8532 goto failed; 8533 } 8534 8535 fwdt->length = dlen; 8536 ql_dbg(ql_dbg_init, vha, 0x0178, 8537 "-> fwdt%u loaded template ok\n", j); 8538 8539 fwcode += risc_size + 1; 8540 } 8541 8542 return QLA_SUCCESS; 8543 8544 failed: 8545 vfree(fwdt->template); 8546 fwdt->template = NULL; 8547 fwdt->length = 0; 8548 8549 return QLA_SUCCESS; 8550 } 8551 8552 int 8553 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8554 { 8555 int rval; 8556 8557 if (ql2xfwloadbin == 1) 8558 return qla81xx_load_risc(vha, srisc_addr); 8559 8560 /* 8561 * FW Load priority: 8562 * 1) Firmware via request-firmware interface (.bin file). 8563 * 2) Firmware residing in flash. 8564 */ 8565 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8566 if (rval == QLA_SUCCESS) 8567 return rval; 8568 8569 return qla24xx_load_risc_flash(vha, srisc_addr, 8570 vha->hw->flt_region_fw); 8571 } 8572 8573 int 8574 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8575 { 8576 int rval; 8577 struct qla_hw_data *ha = vha->hw; 8578 struct active_regions active_regions = { }; 8579 8580 if (ql2xfwloadbin == 2) 8581 goto try_blob_fw; 8582 8583 /* FW Load priority: 8584 * 1) Firmware residing in flash. 8585 * 2) Firmware via request-firmware interface (.bin file). 8586 * 3) Golden-Firmware residing in flash -- (limited operation). 8587 */ 8588 8589 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8590 goto try_primary_fw; 8591 8592 qla27xx_get_active_image(vha, &active_regions); 8593 8594 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8595 goto try_primary_fw; 8596 8597 ql_dbg(ql_dbg_init, vha, 0x008b, 8598 "Loading secondary firmware image.\n"); 8599 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8600 if (!rval) 8601 return rval; 8602 8603 try_primary_fw: 8604 ql_dbg(ql_dbg_init, vha, 0x008b, 8605 "Loading primary firmware image.\n"); 8606 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8607 if (!rval) 8608 return rval; 8609 8610 try_blob_fw: 8611 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8612 if (!rval || !ha->flt_region_gold_fw) 8613 return rval; 8614 8615 ql_log(ql_log_info, vha, 0x0099, 8616 "Attempting to fallback to golden firmware.\n"); 8617 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8618 if (rval) 8619 return rval; 8620 8621 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8622 ha->flags.running_gold_fw = 1; 8623 return rval; 8624 } 8625 8626 void 8627 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8628 { 8629 int ret, retries; 8630 struct qla_hw_data *ha = vha->hw; 8631 8632 if (ha->flags.pci_channel_io_perm_failure) 8633 return; 8634 if (!IS_FWI2_CAPABLE(ha)) 8635 return; 8636 if (!ha->fw_major_version) 8637 return; 8638 if (!ha->flags.fw_started) 8639 return; 8640 8641 ret = qla2x00_stop_firmware(vha); 8642 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8643 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8644 ha->isp_ops->reset_chip(vha); 8645 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8646 continue; 8647 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8648 continue; 8649 ql_log(ql_log_info, vha, 0x8015, 8650 "Attempting retry of stop-firmware command.\n"); 8651 ret = qla2x00_stop_firmware(vha); 8652 } 8653 8654 QLA_FW_STOPPED(ha); 8655 ha->flags.fw_init_done = 0; 8656 } 8657 8658 int 8659 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8660 { 8661 int rval = QLA_SUCCESS; 8662 int rval2; 8663 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8664 struct qla_hw_data *ha = vha->hw; 8665 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8666 8667 if (!vha->vp_idx) 8668 return -EINVAL; 8669 8670 rval = qla2x00_fw_ready(base_vha); 8671 8672 if (rval == QLA_SUCCESS) { 8673 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8674 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8675 } 8676 8677 vha->flags.management_server_logged_in = 0; 8678 8679 /* Login to SNS first */ 8680 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8681 BIT_1); 8682 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8683 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8684 ql_dbg(ql_dbg_init, vha, 0x0120, 8685 "Failed SNS login: loop_id=%x, rval2=%d\n", 8686 NPH_SNS, rval2); 8687 else 8688 ql_dbg(ql_dbg_init, vha, 0x0103, 8689 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8690 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8691 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8692 return (QLA_FUNCTION_FAILED); 8693 } 8694 8695 atomic_set(&vha->loop_down_timer, 0); 8696 atomic_set(&vha->loop_state, LOOP_UP); 8697 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8698 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8699 rval = qla2x00_loop_resync(base_vha); 8700 8701 return rval; 8702 } 8703 8704 /* 84XX Support **************************************************************/ 8705 8706 static LIST_HEAD(qla_cs84xx_list); 8707 static DEFINE_MUTEX(qla_cs84xx_mutex); 8708 8709 static struct qla_chip_state_84xx * 8710 qla84xx_get_chip(struct scsi_qla_host *vha) 8711 { 8712 struct qla_chip_state_84xx *cs84xx; 8713 struct qla_hw_data *ha = vha->hw; 8714 8715 mutex_lock(&qla_cs84xx_mutex); 8716 8717 /* Find any shared 84xx chip. */ 8718 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8719 if (cs84xx->bus == ha->pdev->bus) { 8720 kref_get(&cs84xx->kref); 8721 goto done; 8722 } 8723 } 8724 8725 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8726 if (!cs84xx) 8727 goto done; 8728 8729 kref_init(&cs84xx->kref); 8730 spin_lock_init(&cs84xx->access_lock); 8731 mutex_init(&cs84xx->fw_update_mutex); 8732 cs84xx->bus = ha->pdev->bus; 8733 8734 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8735 done: 8736 mutex_unlock(&qla_cs84xx_mutex); 8737 return cs84xx; 8738 } 8739 8740 static void 8741 __qla84xx_chip_release(struct kref *kref) 8742 { 8743 struct qla_chip_state_84xx *cs84xx = 8744 container_of(kref, struct qla_chip_state_84xx, kref); 8745 8746 mutex_lock(&qla_cs84xx_mutex); 8747 list_del(&cs84xx->list); 8748 mutex_unlock(&qla_cs84xx_mutex); 8749 kfree(cs84xx); 8750 } 8751 8752 void 8753 qla84xx_put_chip(struct scsi_qla_host *vha) 8754 { 8755 struct qla_hw_data *ha = vha->hw; 8756 8757 if (ha->cs84xx) 8758 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8759 } 8760 8761 static int 8762 qla84xx_init_chip(scsi_qla_host_t *vha) 8763 { 8764 int rval; 8765 uint16_t status[2]; 8766 struct qla_hw_data *ha = vha->hw; 8767 8768 mutex_lock(&ha->cs84xx->fw_update_mutex); 8769 8770 rval = qla84xx_verify_chip(vha, status); 8771 8772 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8773 8774 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8775 QLA_SUCCESS; 8776 } 8777 8778 /* 81XX Support **************************************************************/ 8779 8780 int 8781 qla81xx_nvram_config(scsi_qla_host_t *vha) 8782 { 8783 int rval; 8784 struct init_cb_81xx *icb; 8785 struct nvram_81xx *nv; 8786 __le32 *dptr; 8787 uint8_t *dptr1, *dptr2; 8788 uint32_t chksum; 8789 uint16_t cnt; 8790 struct qla_hw_data *ha = vha->hw; 8791 uint32_t faddr; 8792 struct active_regions active_regions = { }; 8793 8794 rval = QLA_SUCCESS; 8795 icb = (struct init_cb_81xx *)ha->init_cb; 8796 nv = ha->nvram; 8797 8798 /* Determine NVRAM starting address. */ 8799 ha->nvram_size = sizeof(*nv); 8800 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8801 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8802 ha->vpd_size = FA_VPD_SIZE_82XX; 8803 8804 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8805 qla28xx_get_aux_images(vha, &active_regions); 8806 8807 /* Get VPD data into cache */ 8808 ha->vpd = ha->nvram + VPD_OFFSET; 8809 8810 faddr = ha->flt_region_vpd; 8811 if (IS_QLA28XX(ha)) { 8812 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8813 faddr = ha->flt_region_vpd_sec; 8814 ql_dbg(ql_dbg_init, vha, 0x0110, 8815 "Loading %s nvram image.\n", 8816 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8817 "primary" : "secondary"); 8818 } 8819 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8820 8821 /* Get NVRAM data into cache and calculate checksum. */ 8822 faddr = ha->flt_region_nvram; 8823 if (IS_QLA28XX(ha)) { 8824 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8825 faddr = ha->flt_region_nvram_sec; 8826 } 8827 ql_dbg(ql_dbg_init, vha, 0x0110, 8828 "Loading %s nvram image.\n", 8829 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8830 "primary" : "secondary"); 8831 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8832 8833 dptr = (__force __le32 *)nv; 8834 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8835 chksum += le32_to_cpu(*dptr); 8836 8837 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8838 "Contents of NVRAM:\n"); 8839 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8840 nv, ha->nvram_size); 8841 8842 /* Bad NVRAM data, set defaults parameters. */ 8843 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 8844 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 8845 /* Reset NVRAM data. */ 8846 ql_log(ql_log_info, vha, 0x0073, 8847 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 8848 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 8849 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 8850 ql_log(ql_log_info, vha, 0x0074, 8851 "Falling back to functioning (yet invalid -- WWPN) " 8852 "defaults.\n"); 8853 8854 /* 8855 * Set default initialization control block. 8856 */ 8857 memset(nv, 0, ha->nvram_size); 8858 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8859 nv->version = cpu_to_le16(ICB_VERSION); 8860 nv->frame_payload_size = cpu_to_le16(2048); 8861 nv->execution_throttle = cpu_to_le16(0xFFFF); 8862 nv->exchange_count = cpu_to_le16(0); 8863 nv->port_name[0] = 0x21; 8864 nv->port_name[1] = 0x00 + ha->port_no + 1; 8865 nv->port_name[2] = 0x00; 8866 nv->port_name[3] = 0xe0; 8867 nv->port_name[4] = 0x8b; 8868 nv->port_name[5] = 0x1c; 8869 nv->port_name[6] = 0x55; 8870 nv->port_name[7] = 0x86; 8871 nv->node_name[0] = 0x20; 8872 nv->node_name[1] = 0x00; 8873 nv->node_name[2] = 0x00; 8874 nv->node_name[3] = 0xe0; 8875 nv->node_name[4] = 0x8b; 8876 nv->node_name[5] = 0x1c; 8877 nv->node_name[6] = 0x55; 8878 nv->node_name[7] = 0x86; 8879 nv->login_retry_count = cpu_to_le16(8); 8880 nv->interrupt_delay_timer = cpu_to_le16(0); 8881 nv->login_timeout = cpu_to_le16(0); 8882 nv->firmware_options_1 = 8883 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8884 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8885 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8886 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8887 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8888 nv->efi_parameters = cpu_to_le32(0); 8889 nv->reset_delay = 5; 8890 nv->max_luns_per_target = cpu_to_le16(128); 8891 nv->port_down_retry_count = cpu_to_le16(30); 8892 nv->link_down_timeout = cpu_to_le16(180); 8893 nv->enode_mac[0] = 0x00; 8894 nv->enode_mac[1] = 0xC0; 8895 nv->enode_mac[2] = 0xDD; 8896 nv->enode_mac[3] = 0x04; 8897 nv->enode_mac[4] = 0x05; 8898 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8899 8900 rval = 1; 8901 } 8902 8903 if (IS_T10_PI_CAPABLE(ha)) 8904 nv->frame_payload_size &= cpu_to_le16(~7); 8905 8906 qlt_81xx_config_nvram_stage1(vha, nv); 8907 8908 /* Reset Initialization control block */ 8909 memset(icb, 0, ha->init_cb_size); 8910 8911 /* Copy 1st segment. */ 8912 dptr1 = (uint8_t *)icb; 8913 dptr2 = (uint8_t *)&nv->version; 8914 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8915 while (cnt--) 8916 *dptr1++ = *dptr2++; 8917 8918 icb->login_retry_count = nv->login_retry_count; 8919 8920 /* Copy 2nd segment. */ 8921 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8922 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8923 cnt = (uint8_t *)&icb->reserved_5 - 8924 (uint8_t *)&icb->interrupt_delay_timer; 8925 while (cnt--) 8926 *dptr1++ = *dptr2++; 8927 8928 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8929 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8930 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8931 icb->enode_mac[0] = 0x00; 8932 icb->enode_mac[1] = 0xC0; 8933 icb->enode_mac[2] = 0xDD; 8934 icb->enode_mac[3] = 0x04; 8935 icb->enode_mac[4] = 0x05; 8936 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8937 } 8938 8939 /* Use extended-initialization control block. */ 8940 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8941 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8942 /* 8943 * Setup driver NVRAM options. 8944 */ 8945 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8946 "QLE8XXX"); 8947 8948 qlt_81xx_config_nvram_stage2(vha, icb); 8949 8950 /* Use alternate WWN? */ 8951 if (nv->host_p & cpu_to_le32(BIT_15)) { 8952 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8953 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8954 } 8955 8956 /* Prepare nodename */ 8957 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8958 /* 8959 * Firmware will apply the following mask if the nodename was 8960 * not provided. 8961 */ 8962 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8963 icb->node_name[0] &= 0xF0; 8964 } 8965 8966 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) { 8967 if ((nv->enhanced_features & BIT_7) == 0) 8968 ha->flags.scm_supported_a = 1; 8969 } 8970 8971 /* Set host adapter parameters. */ 8972 ha->flags.disable_risc_code_load = 0; 8973 ha->flags.enable_lip_reset = 0; 8974 ha->flags.enable_lip_full_login = 8975 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 8976 ha->flags.enable_target_reset = 8977 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8978 ha->flags.enable_led_scheme = 0; 8979 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8980 8981 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8982 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8983 8984 /* save HBA serial number */ 8985 ha->serial0 = icb->port_name[5]; 8986 ha->serial1 = icb->port_name[6]; 8987 ha->serial2 = icb->port_name[7]; 8988 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8989 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8990 8991 icb->execution_throttle = cpu_to_le16(0xFFFF); 8992 8993 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8994 8995 /* Set minimum login_timeout to 4 seconds. */ 8996 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8997 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8998 if (le16_to_cpu(nv->login_timeout) < 4) 8999 nv->login_timeout = cpu_to_le16(4); 9000 ha->login_timeout = le16_to_cpu(nv->login_timeout); 9001 9002 /* Set minimum RATOV to 100 tenths of a second. */ 9003 ha->r_a_tov = 100; 9004 9005 ha->loop_reset_delay = nv->reset_delay; 9006 9007 /* Link Down Timeout = 0: 9008 * 9009 * When Port Down timer expires we will start returning 9010 * I/O's to OS with "DID_NO_CONNECT". 9011 * 9012 * Link Down Timeout != 0: 9013 * 9014 * The driver waits for the link to come up after link down 9015 * before returning I/Os to OS with "DID_NO_CONNECT". 9016 */ 9017 if (le16_to_cpu(nv->link_down_timeout) == 0) { 9018 ha->loop_down_abort_time = 9019 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 9020 } else { 9021 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 9022 ha->loop_down_abort_time = 9023 (LOOP_DOWN_TIME - ha->link_down_timeout); 9024 } 9025 9026 /* Need enough time to try and get the port back. */ 9027 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 9028 if (qlport_down_retry) 9029 ha->port_down_retry_count = qlport_down_retry; 9030 9031 /* Set login_retry_count */ 9032 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 9033 if (ha->port_down_retry_count == 9034 le16_to_cpu(nv->port_down_retry_count) && 9035 ha->port_down_retry_count > 3) 9036 ha->login_retry_count = ha->port_down_retry_count; 9037 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 9038 ha->login_retry_count = ha->port_down_retry_count; 9039 if (ql2xloginretrycount) 9040 ha->login_retry_count = ql2xloginretrycount; 9041 9042 /* if not running MSI-X we need handshaking on interrupts */ 9043 if (!vha->hw->flags.msix_enabled && 9044 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 9045 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 9046 9047 /* Enable ZIO. */ 9048 if (!vha->flags.init_done) { 9049 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 9050 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 9051 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 9052 le16_to_cpu(icb->interrupt_delay_timer) : 2; 9053 } 9054 icb->firmware_options_2 &= cpu_to_le32( 9055 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 9056 vha->flags.process_response_queue = 0; 9057 if (ha->zio_mode != QLA_ZIO_DISABLED) { 9058 ha->zio_mode = QLA_ZIO_MODE_6; 9059 9060 ql_log(ql_log_info, vha, 0x0075, 9061 "ZIO mode %d enabled; timer delay (%d us).\n", 9062 ha->zio_mode, 9063 ha->zio_timer * 100); 9064 9065 icb->firmware_options_2 |= cpu_to_le32( 9066 (uint32_t)ha->zio_mode); 9067 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 9068 vha->flags.process_response_queue = 1; 9069 } 9070 9071 /* enable RIDA Format2 */ 9072 icb->firmware_options_3 |= cpu_to_le32(BIT_0); 9073 9074 /* N2N: driver will initiate Login instead of FW */ 9075 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 9076 9077 /* Determine NVMe/FCP priority for target ports */ 9078 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 9079 9080 if (rval) { 9081 ql_log(ql_log_warn, vha, 0x0076, 9082 "NVRAM configuration failed.\n"); 9083 } 9084 return (rval); 9085 } 9086 9087 int 9088 qla82xx_restart_isp(scsi_qla_host_t *vha) 9089 { 9090 int status, rval; 9091 struct qla_hw_data *ha = vha->hw; 9092 struct scsi_qla_host *vp, *tvp; 9093 unsigned long flags; 9094 9095 status = qla2x00_init_rings(vha); 9096 if (!status) { 9097 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9098 ha->flags.chip_reset_done = 1; 9099 9100 status = qla2x00_fw_ready(vha); 9101 if (!status) { 9102 /* Issue a marker after FW becomes ready. */ 9103 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 9104 vha->flags.online = 1; 9105 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 9106 } 9107 9108 /* if no cable then assume it's good */ 9109 if ((vha->device_flags & DFLG_NO_CABLE)) 9110 status = 0; 9111 } 9112 9113 if (!status) { 9114 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9115 9116 if (!atomic_read(&vha->loop_down_timer)) { 9117 /* 9118 * Issue marker command only when we are going 9119 * to start the I/O . 9120 */ 9121 vha->marker_needed = 1; 9122 } 9123 9124 ha->isp_ops->enable_intrs(ha); 9125 9126 ha->isp_abort_cnt = 0; 9127 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 9128 9129 /* Update the firmware version */ 9130 status = qla82xx_check_md_needed(vha); 9131 9132 if (ha->fce) { 9133 ha->flags.fce_enabled = 1; 9134 memset(ha->fce, 0, 9135 fce_calc_size(ha->fce_bufs)); 9136 rval = qla2x00_enable_fce_trace(vha, 9137 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 9138 &ha->fce_bufs); 9139 if (rval) { 9140 ql_log(ql_log_warn, vha, 0x8001, 9141 "Unable to reinitialize FCE (%d).\n", 9142 rval); 9143 ha->flags.fce_enabled = 0; 9144 } 9145 } 9146 9147 if (ha->eft) { 9148 memset(ha->eft, 0, EFT_SIZE); 9149 rval = qla2x00_enable_eft_trace(vha, 9150 ha->eft_dma, EFT_NUM_BUFFERS); 9151 if (rval) { 9152 ql_log(ql_log_warn, vha, 0x8010, 9153 "Unable to reinitialize EFT (%d).\n", 9154 rval); 9155 } 9156 } 9157 } 9158 9159 if (!status) { 9160 ql_dbg(ql_dbg_taskm, vha, 0x8011, 9161 "qla82xx_restart_isp succeeded.\n"); 9162 9163 spin_lock_irqsave(&ha->vport_slock, flags); 9164 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 9165 if (vp->vp_idx) { 9166 atomic_inc(&vp->vref_count); 9167 spin_unlock_irqrestore(&ha->vport_slock, flags); 9168 9169 qla2x00_vp_abort_isp(vp); 9170 9171 spin_lock_irqsave(&ha->vport_slock, flags); 9172 atomic_dec(&vp->vref_count); 9173 } 9174 } 9175 spin_unlock_irqrestore(&ha->vport_slock, flags); 9176 9177 } else { 9178 ql_log(ql_log_warn, vha, 0x8016, 9179 "qla82xx_restart_isp **** FAILED ****.\n"); 9180 } 9181 9182 return status; 9183 } 9184 9185 /* 9186 * qla24xx_get_fcp_prio 9187 * Gets the fcp cmd priority value for the logged in port. 9188 * Looks for a match of the port descriptors within 9189 * each of the fcp prio config entries. If a match is found, 9190 * the tag (priority) value is returned. 9191 * 9192 * Input: 9193 * vha = scsi host structure pointer. 9194 * fcport = port structure pointer. 9195 * 9196 * Return: 9197 * non-zero (if found) 9198 * -1 (if not found) 9199 * 9200 * Context: 9201 * Kernel context 9202 */ 9203 static int 9204 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9205 { 9206 int i, entries; 9207 uint8_t pid_match, wwn_match; 9208 int priority; 9209 uint32_t pid1, pid2; 9210 uint64_t wwn1, wwn2; 9211 struct qla_fcp_prio_entry *pri_entry; 9212 struct qla_hw_data *ha = vha->hw; 9213 9214 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 9215 return -1; 9216 9217 priority = -1; 9218 entries = ha->fcp_prio_cfg->num_entries; 9219 pri_entry = &ha->fcp_prio_cfg->entry[0]; 9220 9221 for (i = 0; i < entries; i++) { 9222 pid_match = wwn_match = 0; 9223 9224 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 9225 pri_entry++; 9226 continue; 9227 } 9228 9229 /* check source pid for a match */ 9230 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 9231 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 9232 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 9233 if (pid1 == INVALID_PORT_ID) 9234 pid_match++; 9235 else if (pid1 == pid2) 9236 pid_match++; 9237 } 9238 9239 /* check destination pid for a match */ 9240 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 9241 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 9242 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 9243 if (pid1 == INVALID_PORT_ID) 9244 pid_match++; 9245 else if (pid1 == pid2) 9246 pid_match++; 9247 } 9248 9249 /* check source WWN for a match */ 9250 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 9251 wwn1 = wwn_to_u64(vha->port_name); 9252 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 9253 if (wwn2 == (uint64_t)-1) 9254 wwn_match++; 9255 else if (wwn1 == wwn2) 9256 wwn_match++; 9257 } 9258 9259 /* check destination WWN for a match */ 9260 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 9261 wwn1 = wwn_to_u64(fcport->port_name); 9262 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 9263 if (wwn2 == (uint64_t)-1) 9264 wwn_match++; 9265 else if (wwn1 == wwn2) 9266 wwn_match++; 9267 } 9268 9269 if (pid_match == 2 || wwn_match == 2) { 9270 /* Found a matching entry */ 9271 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 9272 priority = pri_entry->tag; 9273 break; 9274 } 9275 9276 pri_entry++; 9277 } 9278 9279 return priority; 9280 } 9281 9282 /* 9283 * qla24xx_update_fcport_fcp_prio 9284 * Activates fcp priority for the logged in fc port 9285 * 9286 * Input: 9287 * vha = scsi host structure pointer. 9288 * fcp = port structure pointer. 9289 * 9290 * Return: 9291 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9292 * 9293 * Context: 9294 * Kernel context. 9295 */ 9296 int 9297 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9298 { 9299 int ret; 9300 int priority; 9301 uint16_t mb[5]; 9302 9303 if (fcport->port_type != FCT_TARGET || 9304 fcport->loop_id == FC_NO_LOOP_ID) 9305 return QLA_FUNCTION_FAILED; 9306 9307 priority = qla24xx_get_fcp_prio(vha, fcport); 9308 if (priority < 0) 9309 return QLA_FUNCTION_FAILED; 9310 9311 if (IS_P3P_TYPE(vha->hw)) { 9312 fcport->fcp_prio = priority & 0xf; 9313 return QLA_SUCCESS; 9314 } 9315 9316 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 9317 if (ret == QLA_SUCCESS) { 9318 if (fcport->fcp_prio != priority) 9319 ql_dbg(ql_dbg_user, vha, 0x709e, 9320 "Updated FCP_CMND priority - value=%d loop_id=%d " 9321 "port_id=%02x%02x%02x.\n", priority, 9322 fcport->loop_id, fcport->d_id.b.domain, 9323 fcport->d_id.b.area, fcport->d_id.b.al_pa); 9324 fcport->fcp_prio = priority & 0xf; 9325 } else 9326 ql_dbg(ql_dbg_user, vha, 0x704f, 9327 "Unable to update FCP_CMND priority - ret=0x%x for " 9328 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 9329 fcport->d_id.b.domain, fcport->d_id.b.area, 9330 fcport->d_id.b.al_pa); 9331 return ret; 9332 } 9333 9334 /* 9335 * qla24xx_update_all_fcp_prio 9336 * Activates fcp priority for all the logged in ports 9337 * 9338 * Input: 9339 * ha = adapter block pointer. 9340 * 9341 * Return: 9342 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9343 * 9344 * Context: 9345 * Kernel context. 9346 */ 9347 int 9348 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 9349 { 9350 int ret; 9351 fc_port_t *fcport; 9352 9353 ret = QLA_FUNCTION_FAILED; 9354 /* We need to set priority for all logged in ports */ 9355 list_for_each_entry(fcport, &vha->vp_fcports, list) 9356 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 9357 9358 return ret; 9359 } 9360 9361 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 9362 int vp_idx, bool startqp) 9363 { 9364 int rsp_id = 0; 9365 int req_id = 0; 9366 int i; 9367 struct qla_hw_data *ha = vha->hw; 9368 uint16_t qpair_id = 0; 9369 struct qla_qpair *qpair = NULL; 9370 struct qla_msix_entry *msix; 9371 9372 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 9373 ql_log(ql_log_warn, vha, 0x00181, 9374 "FW/Driver is not multi-queue capable.\n"); 9375 return NULL; 9376 } 9377 9378 if (ql2xmqsupport || ql2xnvmeenable) { 9379 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 9380 if (qpair == NULL) { 9381 ql_log(ql_log_warn, vha, 0x0182, 9382 "Failed to allocate memory for queue pair.\n"); 9383 return NULL; 9384 } 9385 9386 qpair->hw = vha->hw; 9387 qpair->vha = vha; 9388 qpair->qp_lock_ptr = &qpair->qp_lock; 9389 spin_lock_init(&qpair->qp_lock); 9390 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 9391 9392 /* Assign available que pair id */ 9393 mutex_lock(&ha->mq_lock); 9394 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 9395 if (ha->num_qpairs >= ha->max_qpairs) { 9396 mutex_unlock(&ha->mq_lock); 9397 ql_log(ql_log_warn, vha, 0x0183, 9398 "No resources to create additional q pair.\n"); 9399 goto fail_qid_map; 9400 } 9401 ha->num_qpairs++; 9402 set_bit(qpair_id, ha->qpair_qid_map); 9403 ha->queue_pair_map[qpair_id] = qpair; 9404 qpair->id = qpair_id; 9405 qpair->vp_idx = vp_idx; 9406 qpair->fw_started = ha->flags.fw_started; 9407 INIT_LIST_HEAD(&qpair->hints_list); 9408 qpair->chip_reset = ha->base_qpair->chip_reset; 9409 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 9410 qpair->enable_explicit_conf = 9411 ha->base_qpair->enable_explicit_conf; 9412 9413 for (i = 0; i < ha->msix_count; i++) { 9414 msix = &ha->msix_entries[i]; 9415 if (msix->in_use) 9416 continue; 9417 qpair->msix = msix; 9418 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 9419 "Vector %x selected for qpair\n", msix->vector); 9420 break; 9421 } 9422 if (!qpair->msix) { 9423 ql_log(ql_log_warn, vha, 0x0184, 9424 "Out of MSI-X vectors!.\n"); 9425 goto fail_msix; 9426 } 9427 9428 qpair->msix->in_use = 1; 9429 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 9430 qpair->pdev = ha->pdev; 9431 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 9432 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 9433 9434 mutex_unlock(&ha->mq_lock); 9435 9436 /* Create response queue first */ 9437 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 9438 if (!rsp_id) { 9439 ql_log(ql_log_warn, vha, 0x0185, 9440 "Failed to create response queue.\n"); 9441 goto fail_rsp; 9442 } 9443 9444 qpair->rsp = ha->rsp_q_map[rsp_id]; 9445 9446 /* Create request queue */ 9447 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 9448 startqp); 9449 if (!req_id) { 9450 ql_log(ql_log_warn, vha, 0x0186, 9451 "Failed to create request queue.\n"); 9452 goto fail_req; 9453 } 9454 9455 qpair->req = ha->req_q_map[req_id]; 9456 qpair->rsp->req = qpair->req; 9457 qpair->rsp->qpair = qpair; 9458 /* init qpair to this cpu. Will adjust at run time. */ 9459 qla_cpu_update(qpair, raw_smp_processor_id()); 9460 9461 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 9462 if (ha->fw_attributes & BIT_4) 9463 qpair->difdix_supported = 1; 9464 } 9465 9466 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 9467 if (!qpair->srb_mempool) { 9468 ql_log(ql_log_warn, vha, 0xd036, 9469 "Failed to create srb mempool for qpair %d\n", 9470 qpair->id); 9471 goto fail_mempool; 9472 } 9473 9474 /* Mark as online */ 9475 qpair->online = 1; 9476 9477 if (!vha->flags.qpairs_available) 9478 vha->flags.qpairs_available = 1; 9479 9480 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 9481 "Request/Response queue pair created, id %d\n", 9482 qpair->id); 9483 ql_dbg(ql_dbg_init, vha, 0x0187, 9484 "Request/Response queue pair created, id %d\n", 9485 qpair->id); 9486 } 9487 return qpair; 9488 9489 fail_mempool: 9490 fail_req: 9491 qla25xx_delete_rsp_que(vha, qpair->rsp); 9492 fail_rsp: 9493 mutex_lock(&ha->mq_lock); 9494 qpair->msix->in_use = 0; 9495 list_del(&qpair->qp_list_elem); 9496 if (list_empty(&vha->qp_list)) 9497 vha->flags.qpairs_available = 0; 9498 fail_msix: 9499 ha->queue_pair_map[qpair_id] = NULL; 9500 clear_bit(qpair_id, ha->qpair_qid_map); 9501 ha->num_qpairs--; 9502 mutex_unlock(&ha->mq_lock); 9503 fail_qid_map: 9504 kfree(qpair); 9505 return NULL; 9506 } 9507 9508 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9509 { 9510 int ret = QLA_FUNCTION_FAILED; 9511 struct qla_hw_data *ha = qpair->hw; 9512 9513 qpair->delete_in_progress = 1; 9514 9515 ret = qla25xx_delete_req_que(vha, qpair->req); 9516 if (ret != QLA_SUCCESS) 9517 goto fail; 9518 9519 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9520 if (ret != QLA_SUCCESS) 9521 goto fail; 9522 9523 mutex_lock(&ha->mq_lock); 9524 ha->queue_pair_map[qpair->id] = NULL; 9525 clear_bit(qpair->id, ha->qpair_qid_map); 9526 ha->num_qpairs--; 9527 list_del(&qpair->qp_list_elem); 9528 if (list_empty(&vha->qp_list)) { 9529 vha->flags.qpairs_available = 0; 9530 vha->flags.qpairs_req_created = 0; 9531 vha->flags.qpairs_rsp_created = 0; 9532 } 9533 mempool_destroy(qpair->srb_mempool); 9534 kfree(qpair); 9535 mutex_unlock(&ha->mq_lock); 9536 9537 return QLA_SUCCESS; 9538 fail: 9539 return ret; 9540 } 9541 9542 uint64_t 9543 qla2x00_count_set_bits(uint32_t num) 9544 { 9545 /* Brian Kernighan's Algorithm */ 9546 u64 count = 0; 9547 9548 while (num) { 9549 num &= (num - 1); 9550 count++; 9551 } 9552 return count; 9553 } 9554 9555 uint64_t 9556 qla2x00_get_num_tgts(scsi_qla_host_t *vha) 9557 { 9558 fc_port_t *f, *tf; 9559 u64 count = 0; 9560 9561 f = NULL; 9562 tf = NULL; 9563 9564 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 9565 if (f->port_type != FCT_TARGET) 9566 continue; 9567 count++; 9568 } 9569 return count; 9570 } 9571 9572 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags) 9573 { 9574 scsi_qla_host_t *vha = shost_priv(host); 9575 fc_port_t *fcport = NULL; 9576 unsigned long int_flags; 9577 9578 if (flags & QLA2XX_HW_ERROR) 9579 vha->hw_err_cnt = 0; 9580 if (flags & QLA2XX_SHT_LNK_DWN) 9581 vha->short_link_down_cnt = 0; 9582 if (flags & QLA2XX_INT_ERR) 9583 vha->interface_err_cnt = 0; 9584 if (flags & QLA2XX_CMD_TIMEOUT) 9585 vha->cmd_timeout_cnt = 0; 9586 if (flags & QLA2XX_RESET_CMD_ERR) 9587 vha->reset_cmd_err_cnt = 0; 9588 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9589 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9590 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9591 fcport->tgt_short_link_down_cnt = 0; 9592 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9593 } 9594 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9595 } 9596 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9597 return 0; 9598 } 9599 9600 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags) 9601 { 9602 return qla2xxx_reset_stats(host, flags); 9603 } 9604 9605 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags) 9606 { 9607 return qla2xxx_reset_stats(host, flags); 9608 } 9609 9610 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags, 9611 void *data, u64 size) 9612 { 9613 scsi_qla_host_t *vha = shost_priv(host); 9614 struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data; 9615 struct ql_vnd_stats *rsp_data = &resp->stats; 9616 u64 ini_entry_count = 0; 9617 u64 i = 0; 9618 u64 entry_count = 0; 9619 u64 num_tgt = 0; 9620 u32 tmp_stat_type = 0; 9621 fc_port_t *fcport = NULL; 9622 unsigned long int_flags; 9623 9624 /* Copy stat type to work on it */ 9625 tmp_stat_type = flags; 9626 9627 if (tmp_stat_type & BIT_17) { 9628 num_tgt = qla2x00_get_num_tgts(vha); 9629 /* unset BIT_17 */ 9630 tmp_stat_type &= ~(1 << 17); 9631 } 9632 ini_entry_count = qla2x00_count_set_bits(tmp_stat_type); 9633 9634 entry_count = ini_entry_count + num_tgt; 9635 9636 rsp_data->entry_count = entry_count; 9637 9638 i = 0; 9639 if (flags & QLA2XX_HW_ERROR) { 9640 rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR; 9641 rsp_data->entry[i].tgt_num = 0x0; 9642 rsp_data->entry[i].cnt = vha->hw_err_cnt; 9643 i++; 9644 } 9645 9646 if (flags & QLA2XX_SHT_LNK_DWN) { 9647 rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN; 9648 rsp_data->entry[i].tgt_num = 0x0; 9649 rsp_data->entry[i].cnt = vha->short_link_down_cnt; 9650 i++; 9651 } 9652 9653 if (flags & QLA2XX_INT_ERR) { 9654 rsp_data->entry[i].stat_type = QLA2XX_INT_ERR; 9655 rsp_data->entry[i].tgt_num = 0x0; 9656 rsp_data->entry[i].cnt = vha->interface_err_cnt; 9657 i++; 9658 } 9659 9660 if (flags & QLA2XX_CMD_TIMEOUT) { 9661 rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT; 9662 rsp_data->entry[i].tgt_num = 0x0; 9663 rsp_data->entry[i].cnt = vha->cmd_timeout_cnt; 9664 i++; 9665 } 9666 9667 if (flags & QLA2XX_RESET_CMD_ERR) { 9668 rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR; 9669 rsp_data->entry[i].tgt_num = 0x0; 9670 rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt; 9671 i++; 9672 } 9673 9674 /* i will continue from previous loop, as target 9675 * entries are after initiator 9676 */ 9677 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9678 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9679 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9680 if (fcport->port_type != FCT_TARGET) 9681 continue; 9682 if (!fcport->rport) 9683 continue; 9684 rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN; 9685 rsp_data->entry[i].tgt_num = fcport->rport->number; 9686 rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt; 9687 i++; 9688 } 9689 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9690 } 9691 resp->status = EXT_STATUS_OK; 9692 9693 return 0; 9694 } 9695 9696 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags, 9697 struct fc_rport *rport, void *data, u64 size) 9698 { 9699 struct ql_vnd_tgt_stats_resp *tgt_data = data; 9700 fc_port_t *fcport = *(fc_port_t **)rport->dd_data; 9701 9702 tgt_data->status = 0; 9703 tgt_data->stats.entry_count = 1; 9704 tgt_data->stats.entry[0].stat_type = flags; 9705 tgt_data->stats.entry[0].tgt_num = rport->number; 9706 tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt; 9707 9708 return 0; 9709 } 9710 9711 int qla2xxx_disable_port(struct Scsi_Host *host) 9712 { 9713 scsi_qla_host_t *vha = shost_priv(host); 9714 9715 vha->hw->flags.port_isolated = 1; 9716 9717 if (qla2x00_isp_reg_stat(vha->hw)) { 9718 ql_log(ql_log_info, vha, 0x9006, 9719 "PCI/Register disconnect, exiting.\n"); 9720 qla_pci_set_eeh_busy(vha); 9721 return FAILED; 9722 } 9723 if (qla2x00_chip_is_down(vha)) 9724 return 0; 9725 9726 if (vha->flags.online) { 9727 qla2x00_abort_isp_cleanup(vha); 9728 qla2x00_wait_for_sess_deletion(vha); 9729 } 9730 9731 return 0; 9732 } 9733 9734 int qla2xxx_enable_port(struct Scsi_Host *host) 9735 { 9736 scsi_qla_host_t *vha = shost_priv(host); 9737 9738 if (qla2x00_isp_reg_stat(vha->hw)) { 9739 ql_log(ql_log_info, vha, 0x9001, 9740 "PCI/Register disconnect, exiting.\n"); 9741 qla_pci_set_eeh_busy(vha); 9742 return FAILED; 9743 } 9744 9745 vha->hw->flags.port_isolated = 0; 9746 /* Set the flag to 1, so that isp_abort can proceed */ 9747 vha->flags.online = 1; 9748 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 9749 qla2xxx_wake_dpc(vha); 9750 9751 return 0; 9752 } 9753