1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #include "qla_def.h" 7 #include "qla_gbl.h" 8 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/vmalloc.h> 12 13 #include "qla_devtbl.h" 14 15 #ifdef CONFIG_SPARC 16 #include <asm/prom.h> 17 #endif 18 19 #include "qla_target.h" 20 21 /* 22 * QLogic ISP2x00 Hardware Support Function Prototypes. 23 */ 24 static int qla2x00_isp_firmware(scsi_qla_host_t *); 25 static int qla2x00_setup_chip(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 32 static int qla2x00_restart_isp(scsi_qla_host_t *); 33 34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 35 static int qla84xx_init_chip(scsi_qla_host_t *); 36 static int qla25xx_init_queues(struct qla_hw_data *); 37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 38 struct event_arg *ea); 39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 40 struct event_arg *); 41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(struct timer_list *t) 47 { 48 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 49 struct srb_iocb *iocb; 50 scsi_qla_host_t *vha = sp->vha; 51 52 WARN_ON(irqs_disabled()); 53 iocb = &sp->u.iocb_cmd; 54 iocb->timeout(sp); 55 56 /* ref: TMR */ 57 kref_put(&sp->cmd_kref, qla2x00_sp_release); 58 59 if (vha && qla2x00_isp_reg_stat(vha->hw)) { 60 ql_log(ql_log_info, vha, 0x9008, 61 "PCI/Register disconnect.\n"); 62 qla_pci_set_eeh_busy(vha); 63 } 64 } 65 66 void qla2x00_sp_free(srb_t *sp) 67 { 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 69 70 del_timer(&iocb->timer); 71 qla2x00_rel_sp(sp); 72 } 73 74 void qla2xxx_rel_done_warning(srb_t *sp, int res) 75 { 76 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp); 77 } 78 79 void qla2xxx_rel_free_warning(srb_t *sp) 80 { 81 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp); 82 } 83 84 /* Asynchronous Login/Logout Routines -------------------------------------- */ 85 86 unsigned long 87 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 88 { 89 unsigned long tmo; 90 struct qla_hw_data *ha = vha->hw; 91 92 /* Firmware should use switch negotiated r_a_tov for timeout. */ 93 tmo = ha->r_a_tov / 10 * 2; 94 if (IS_QLAFX00(ha)) { 95 tmo = FX00_DEF_RATOV * 2; 96 } else if (!IS_FWI2_CAPABLE(ha)) { 97 /* 98 * Except for earlier ISPs where the timeout is seeded from the 99 * initialization control block. 100 */ 101 tmo = ha->login_timeout; 102 } 103 return tmo; 104 } 105 106 static void qla24xx_abort_iocb_timeout(void *data) 107 { 108 srb_t *sp = data; 109 struct srb_iocb *abt = &sp->u.iocb_cmd; 110 struct qla_qpair *qpair = sp->qpair; 111 u32 handle; 112 unsigned long flags; 113 int sp_found = 0, cmdsp_found = 0; 114 115 if (sp->cmd_sp) 116 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 117 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 118 sp->cmd_sp->handle, sp->cmd_sp->type, 119 sp->handle, sp->type); 120 else 121 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 122 "Abort timeout 2 - hdl=%x, type=%x\n", 123 sp->handle, sp->type); 124 125 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 126 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 127 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 128 sp->cmd_sp)) { 129 qpair->req->outstanding_cmds[handle] = NULL; 130 cmdsp_found = 1; 131 qla_put_fw_resources(qpair, &sp->cmd_sp->iores); 132 } 133 134 /* removing the abort */ 135 if (qpair->req->outstanding_cmds[handle] == sp) { 136 qpair->req->outstanding_cmds[handle] = NULL; 137 sp_found = 1; 138 qla_put_fw_resources(qpair, &sp->iores); 139 break; 140 } 141 } 142 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 143 144 if (cmdsp_found && sp->cmd_sp) { 145 /* 146 * This done function should take care of 147 * original command ref: INIT 148 */ 149 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 150 } 151 152 if (sp_found) { 153 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT); 154 sp->done(sp, QLA_OS_TIMER_EXPIRED); 155 } 156 } 157 158 static void qla24xx_abort_sp_done(srb_t *sp, int res) 159 { 160 struct srb_iocb *abt = &sp->u.iocb_cmd; 161 srb_t *orig_sp = sp->cmd_sp; 162 163 if (orig_sp) 164 qla_wait_nvme_release_cmd_kref(orig_sp); 165 166 if (sp->flags & SRB_WAKEUP_ON_COMP) 167 complete(&abt->u.abt.comp); 168 else 169 /* ref: INIT */ 170 kref_put(&sp->cmd_kref, qla2x00_sp_release); 171 } 172 173 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 174 { 175 scsi_qla_host_t *vha = cmd_sp->vha; 176 struct srb_iocb *abt_iocb; 177 srb_t *sp; 178 int rval = QLA_FUNCTION_FAILED; 179 180 /* ref: INIT for ABTS command */ 181 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 182 GFP_ATOMIC); 183 if (!sp) 184 return QLA_MEMORY_ALLOC_FAILED; 185 186 qla_vha_mark_busy(vha); 187 abt_iocb = &sp->u.iocb_cmd; 188 sp->type = SRB_ABT_CMD; 189 sp->name = "abort"; 190 sp->qpair = cmd_sp->qpair; 191 sp->cmd_sp = cmd_sp; 192 if (wait) 193 sp->flags = SRB_WAKEUP_ON_COMP; 194 195 init_completion(&abt_iocb->u.abt.comp); 196 /* FW can send 2 x ABTS's timeout/20s */ 197 qla2x00_init_async_sp(sp, 42, qla24xx_abort_sp_done); 198 sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout; 199 200 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 201 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 202 203 ql_dbg(ql_dbg_async, vha, 0x507c, 204 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 205 cmd_sp->type); 206 207 rval = qla2x00_start_sp(sp); 208 if (rval != QLA_SUCCESS) { 209 /* ref: INIT */ 210 kref_put(&sp->cmd_kref, qla2x00_sp_release); 211 return rval; 212 } 213 214 if (wait) { 215 wait_for_completion(&abt_iocb->u.abt.comp); 216 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 217 QLA_SUCCESS : QLA_ERR_FROM_FW; 218 /* ref: INIT */ 219 kref_put(&sp->cmd_kref, qla2x00_sp_release); 220 } 221 222 return rval; 223 } 224 225 void 226 qla2x00_async_iocb_timeout(void *data) 227 { 228 srb_t *sp = data; 229 fc_port_t *fcport = sp->fcport; 230 struct srb_iocb *lio = &sp->u.iocb_cmd; 231 int rc, h; 232 unsigned long flags; 233 234 if (fcport) { 235 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 236 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 237 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 238 239 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 240 } else { 241 pr_info("Async-%s timeout - hdl=%x.\n", 242 sp->name, sp->handle); 243 } 244 245 switch (sp->type) { 246 case SRB_LOGIN_CMD: 247 rc = qla24xx_async_abort_cmd(sp, false); 248 if (rc) { 249 /* Retry as needed. */ 250 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 251 lio->u.logio.data[1] = 252 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 253 QLA_LOGIO_LOGIN_RETRIED : 0; 254 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 255 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 256 h++) { 257 if (sp->qpair->req->outstanding_cmds[h] == 258 sp) { 259 sp->qpair->req->outstanding_cmds[h] = 260 NULL; 261 break; 262 } 263 } 264 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 265 sp->done(sp, QLA_FUNCTION_TIMEOUT); 266 } 267 break; 268 case SRB_LOGOUT_CMD: 269 case SRB_CT_PTHRU_CMD: 270 case SRB_MB_IOCB: 271 case SRB_NACK_PLOGI: 272 case SRB_NACK_PRLI: 273 case SRB_NACK_LOGO: 274 case SRB_CTRL_VP: 275 default: 276 rc = qla24xx_async_abort_cmd(sp, false); 277 if (rc) { 278 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 279 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 280 h++) { 281 if (sp->qpair->req->outstanding_cmds[h] == 282 sp) { 283 sp->qpair->req->outstanding_cmds[h] = 284 NULL; 285 break; 286 } 287 } 288 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 289 sp->done(sp, QLA_FUNCTION_TIMEOUT); 290 } 291 break; 292 } 293 } 294 295 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 296 { 297 struct scsi_qla_host *vha = sp->vha; 298 struct srb_iocb *lio = &sp->u.iocb_cmd; 299 struct event_arg ea; 300 301 ql_dbg(ql_dbg_disc, vha, 0x20dd, 302 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 303 304 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 305 306 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 307 memset(&ea, 0, sizeof(ea)); 308 ea.fcport = sp->fcport; 309 ea.data[0] = lio->u.logio.data[0]; 310 ea.data[1] = lio->u.logio.data[1]; 311 ea.iop[0] = lio->u.logio.iop[0]; 312 ea.iop[1] = lio->u.logio.iop[1]; 313 ea.sp = sp; 314 if (res) 315 ea.data[0] = MBS_COMMAND_ERROR; 316 qla24xx_handle_plogi_done_event(vha, &ea); 317 } 318 319 /* ref: INIT */ 320 kref_put(&sp->cmd_kref, qla2x00_sp_release); 321 } 322 323 int 324 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 325 uint16_t *data) 326 { 327 srb_t *sp; 328 struct srb_iocb *lio; 329 int rval = QLA_FUNCTION_FAILED; 330 331 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 332 fcport->loop_id == FC_NO_LOOP_ID) { 333 ql_log(ql_log_warn, vha, 0xffff, 334 "%s: %8phC - not sending command.\n", 335 __func__, fcport->port_name); 336 return rval; 337 } 338 339 /* ref: INIT */ 340 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 341 if (!sp) 342 goto done; 343 344 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 345 fcport->flags |= FCF_ASYNC_SENT; 346 fcport->logout_completed = 0; 347 348 sp->type = SRB_LOGIN_CMD; 349 sp->name = "login"; 350 sp->gen1 = fcport->rscn_gen; 351 sp->gen2 = fcport->login_gen; 352 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 353 qla2x00_async_login_sp_done); 354 355 lio = &sp->u.iocb_cmd; 356 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) { 357 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 358 } else { 359 if (vha->hw->flags.edif_enabled && 360 DBELL_ACTIVE(vha)) { 361 lio->u.logio.flags |= 362 (SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI); 363 } else { 364 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 365 } 366 } 367 368 if (NVME_TARGET(vha->hw, fcport)) 369 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 370 371 rval = qla2x00_start_sp(sp); 372 373 ql_dbg(ql_dbg_disc, vha, 0x2072, 374 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 375 fcport->port_name, sp->handle, fcport->loop_id, 376 fcport->d_id.b24, fcport->login_retry, 377 lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : ""); 378 379 if (rval != QLA_SUCCESS) { 380 fcport->flags |= FCF_LOGIN_NEEDED; 381 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 382 goto done_free_sp; 383 } 384 385 return rval; 386 387 done_free_sp: 388 /* ref: INIT */ 389 kref_put(&sp->cmd_kref, qla2x00_sp_release); 390 fcport->flags &= ~FCF_ASYNC_SENT; 391 done: 392 fcport->flags &= ~FCF_ASYNC_ACTIVE; 393 394 /* 395 * async login failed. Could be due to iocb/exchange resource 396 * being low. Set state DELETED for re-login process to start again. 397 */ 398 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 399 return rval; 400 } 401 402 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 403 { 404 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 405 sp->fcport->login_gen++; 406 qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]); 407 /* ref: INIT */ 408 kref_put(&sp->cmd_kref, qla2x00_sp_release); 409 } 410 411 int 412 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 413 { 414 srb_t *sp; 415 int rval = QLA_FUNCTION_FAILED; 416 417 fcport->flags |= FCF_ASYNC_SENT; 418 /* ref: INIT */ 419 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 420 if (!sp) 421 goto done; 422 423 sp->type = SRB_LOGOUT_CMD; 424 sp->name = "logout"; 425 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 426 qla2x00_async_logout_sp_done), 427 428 ql_dbg(ql_dbg_disc, vha, 0x2070, 429 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n", 430 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 431 fcport->d_id.b.area, fcport->d_id.b.al_pa, 432 fcport->port_name, fcport->explicit_logout); 433 434 rval = qla2x00_start_sp(sp); 435 if (rval != QLA_SUCCESS) 436 goto done_free_sp; 437 return rval; 438 439 done_free_sp: 440 /* ref: INIT */ 441 kref_put(&sp->cmd_kref, qla2x00_sp_release); 442 done: 443 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 444 return rval; 445 } 446 447 void 448 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 449 uint16_t *data) 450 { 451 fcport->flags &= ~FCF_ASYNC_ACTIVE; 452 /* Don't re-login in target mode */ 453 if (!fcport->tgt_session) 454 qla2x00_mark_device_lost(vha, fcport, 1); 455 qlt_logo_completion_handler(fcport, data[0]); 456 } 457 458 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 459 { 460 struct srb_iocb *lio = &sp->u.iocb_cmd; 461 struct scsi_qla_host *vha = sp->vha; 462 463 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 464 if (!test_bit(UNLOADING, &vha->dpc_flags)) 465 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 466 lio->u.logio.data); 467 /* ref: INIT */ 468 kref_put(&sp->cmd_kref, qla2x00_sp_release); 469 } 470 471 int 472 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 473 { 474 srb_t *sp; 475 int rval; 476 477 rval = QLA_FUNCTION_FAILED; 478 /* ref: INIT */ 479 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 480 if (!sp) 481 goto done; 482 483 sp->type = SRB_PRLO_CMD; 484 sp->name = "prlo"; 485 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 486 qla2x00_async_prlo_sp_done); 487 488 ql_dbg(ql_dbg_disc, vha, 0x2070, 489 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 490 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 491 fcport->d_id.b.area, fcport->d_id.b.al_pa); 492 493 rval = qla2x00_start_sp(sp); 494 if (rval != QLA_SUCCESS) 495 goto done_free_sp; 496 497 return rval; 498 499 done_free_sp: 500 /* ref: INIT */ 501 kref_put(&sp->cmd_kref, qla2x00_sp_release); 502 done: 503 fcport->flags &= ~FCF_ASYNC_ACTIVE; 504 return rval; 505 } 506 507 static 508 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 509 { 510 struct fc_port *fcport = ea->fcport; 511 512 ql_dbg(ql_dbg_disc, vha, 0x20d2, 513 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 514 __func__, fcport->port_name, fcport->disc_state, 515 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 516 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 517 518 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 519 ea->data[0]); 520 521 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 522 ql_dbg(ql_dbg_disc, vha, 0x2066, 523 "%s %8phC: adisc fail: post delete\n", 524 __func__, ea->fcport->port_name); 525 /* deleted = 0 & logout_on_delete = force fw cleanup */ 526 fcport->deleted = 0; 527 fcport->logout_on_delete = 1; 528 qlt_schedule_sess_for_deletion(ea->fcport); 529 return; 530 } 531 532 if (ea->fcport->disc_state == DSC_DELETE_PEND) 533 return; 534 535 if (ea->sp->gen2 != ea->fcport->login_gen) { 536 /* target side must have changed it. */ 537 ql_dbg(ql_dbg_disc, vha, 0x20d3, 538 "%s %8phC generation changed\n", 539 __func__, ea->fcport->port_name); 540 return; 541 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 542 qla_rscn_replay(fcport); 543 qlt_schedule_sess_for_deletion(fcport); 544 return; 545 } 546 547 __qla24xx_handle_gpdb_event(vha, ea); 548 } 549 550 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 551 { 552 struct qla_work_evt *e; 553 554 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 555 if (!e) 556 return QLA_FUNCTION_FAILED; 557 558 e->u.fcport.fcport = fcport; 559 fcport->flags |= FCF_ASYNC_ACTIVE; 560 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 561 return qla2x00_post_work(vha, e); 562 } 563 564 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 565 { 566 struct scsi_qla_host *vha = sp->vha; 567 struct event_arg ea; 568 struct srb_iocb *lio = &sp->u.iocb_cmd; 569 570 ql_dbg(ql_dbg_disc, vha, 0x2066, 571 "Async done-%s res %x %8phC\n", 572 sp->name, res, sp->fcport->port_name); 573 574 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 575 576 memset(&ea, 0, sizeof(ea)); 577 ea.rc = res; 578 ea.data[0] = lio->u.logio.data[0]; 579 ea.data[1] = lio->u.logio.data[1]; 580 ea.iop[0] = lio->u.logio.iop[0]; 581 ea.iop[1] = lio->u.logio.iop[1]; 582 ea.fcport = sp->fcport; 583 ea.sp = sp; 584 if (res) 585 ea.data[0] = MBS_COMMAND_ERROR; 586 587 qla24xx_handle_adisc_event(vha, &ea); 588 /* ref: INIT */ 589 kref_put(&sp->cmd_kref, qla2x00_sp_release); 590 } 591 592 int 593 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 594 uint16_t *data) 595 { 596 srb_t *sp; 597 struct srb_iocb *lio; 598 int rval = QLA_FUNCTION_FAILED; 599 600 if (IS_SESSION_DELETED(fcport)) { 601 ql_log(ql_log_warn, vha, 0xffff, 602 "%s: %8phC is being delete - not sending command.\n", 603 __func__, fcport->port_name); 604 fcport->flags &= ~FCF_ASYNC_ACTIVE; 605 return rval; 606 } 607 608 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 609 return rval; 610 611 fcport->flags |= FCF_ASYNC_SENT; 612 /* ref: INIT */ 613 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 614 if (!sp) 615 goto done; 616 617 sp->type = SRB_ADISC_CMD; 618 sp->name = "adisc"; 619 sp->gen1 = fcport->rscn_gen; 620 sp->gen2 = fcport->login_gen; 621 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 622 qla2x00_async_adisc_sp_done); 623 624 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) { 625 lio = &sp->u.iocb_cmd; 626 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 627 } 628 629 ql_dbg(ql_dbg_disc, vha, 0x206f, 630 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 631 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 632 633 rval = qla2x00_start_sp(sp); 634 if (rval != QLA_SUCCESS) 635 goto done_free_sp; 636 637 return rval; 638 639 done_free_sp: 640 /* ref: INIT */ 641 kref_put(&sp->cmd_kref, qla2x00_sp_release); 642 done: 643 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 644 qla2x00_post_async_adisc_work(vha, fcport, data); 645 return rval; 646 } 647 648 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 649 { 650 struct qla_hw_data *ha = vha->hw; 651 652 if (IS_FWI2_CAPABLE(ha)) 653 return loop_id > NPH_LAST_HANDLE; 654 655 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 656 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 657 } 658 659 /** 660 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 661 * @vha: adapter state pointer. 662 * @dev: port structure pointer. 663 * 664 * Returns: 665 * qla2x00 local function return status code. 666 * 667 * Context: 668 * Kernel context. 669 */ 670 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 671 { 672 int rval; 673 struct qla_hw_data *ha = vha->hw; 674 unsigned long flags = 0; 675 676 rval = QLA_SUCCESS; 677 678 spin_lock_irqsave(&ha->vport_slock, flags); 679 680 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 681 if (dev->loop_id >= LOOPID_MAP_SIZE || 682 qla2x00_is_reserved_id(vha, dev->loop_id)) { 683 dev->loop_id = FC_NO_LOOP_ID; 684 rval = QLA_FUNCTION_FAILED; 685 } else { 686 set_bit(dev->loop_id, ha->loop_id_map); 687 } 688 spin_unlock_irqrestore(&ha->vport_slock, flags); 689 690 if (rval == QLA_SUCCESS) 691 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 692 "Assigning new loopid=%x, portid=%x.\n", 693 dev->loop_id, dev->d_id.b24); 694 else 695 ql_log(ql_log_warn, dev->vha, 0x2087, 696 "No loop_id's available, portid=%x.\n", 697 dev->d_id.b24); 698 699 return rval; 700 } 701 702 void qla2x00_clear_loop_id(fc_port_t *fcport) 703 { 704 struct qla_hw_data *ha = fcport->vha->hw; 705 706 if (fcport->loop_id == FC_NO_LOOP_ID || 707 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 708 return; 709 710 clear_bit(fcport->loop_id, ha->loop_id_map); 711 fcport->loop_id = FC_NO_LOOP_ID; 712 } 713 714 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 715 struct event_arg *ea) 716 { 717 fc_port_t *fcport, *conflict_fcport; 718 struct get_name_list_extended *e; 719 u16 i, n, found = 0, loop_id; 720 port_id_t id; 721 u64 wwn; 722 u16 data[2]; 723 u8 current_login_state, nvme_cls; 724 725 fcport = ea->fcport; 726 ql_dbg(ql_dbg_disc, vha, 0xffff, 727 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n", 728 __func__, fcport->port_name, fcport->disc_state, 729 fcport->fw_login_state, ea->rc, 730 fcport->login_gen, fcport->last_login_gen, 731 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable); 732 733 if (fcport->disc_state == DSC_DELETE_PEND) 734 return; 735 736 if (ea->rc) { /* rval */ 737 if (fcport->login_retry == 0) { 738 ql_dbg(ql_dbg_disc, vha, 0x20de, 739 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 740 fcport->port_name, fcport->login_retry); 741 } 742 return; 743 } 744 745 if (fcport->last_rscn_gen != fcport->rscn_gen) { 746 qla_rscn_replay(fcport); 747 qlt_schedule_sess_for_deletion(fcport); 748 return; 749 } else if (fcport->last_login_gen != fcport->login_gen) { 750 ql_dbg(ql_dbg_disc, vha, 0x20e0, 751 "%s %8phC login gen changed\n", 752 __func__, fcport->port_name); 753 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 754 return; 755 } 756 757 n = ea->data[0] / sizeof(struct get_name_list_extended); 758 759 ql_dbg(ql_dbg_disc, vha, 0x20e1, 760 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 761 __func__, __LINE__, fcport->port_name, n, 762 fcport->d_id.b.domain, fcport->d_id.b.area, 763 fcport->d_id.b.al_pa, fcport->loop_id); 764 765 for (i = 0; i < n; i++) { 766 e = &vha->gnl.l[i]; 767 wwn = wwn_to_u64(e->port_name); 768 id.b.domain = e->port_id[2]; 769 id.b.area = e->port_id[1]; 770 id.b.al_pa = e->port_id[0]; 771 id.b.rsvd_1 = 0; 772 773 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 774 continue; 775 776 if (IS_SW_RESV_ADDR(id)) 777 continue; 778 779 found = 1; 780 781 loop_id = le16_to_cpu(e->nport_handle); 782 loop_id = (loop_id & 0x7fff); 783 nvme_cls = e->current_login_state >> 4; 784 current_login_state = e->current_login_state & 0xf; 785 786 if (PRLI_PHASE(nvme_cls)) { 787 current_login_state = nvme_cls; 788 fcport->fc4_type &= ~FS_FC4TYPE_FCP; 789 fcport->fc4_type |= FS_FC4TYPE_NVME; 790 } else if (PRLI_PHASE(current_login_state)) { 791 fcport->fc4_type |= FS_FC4TYPE_FCP; 792 fcport->fc4_type &= ~FS_FC4TYPE_NVME; 793 } 794 795 ql_dbg(ql_dbg_disc, vha, 0x20e2, 796 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 797 __func__, fcport->port_name, 798 e->current_login_state, fcport->fw_login_state, 799 fcport->fc4_type, id.b24, fcport->d_id.b24, 800 loop_id, fcport->loop_id); 801 802 switch (fcport->disc_state) { 803 case DSC_DELETE_PEND: 804 case DSC_DELETED: 805 break; 806 default: 807 if ((id.b24 != fcport->d_id.b24 && 808 fcport->d_id.b24 && 809 fcport->loop_id != FC_NO_LOOP_ID) || 810 (fcport->loop_id != FC_NO_LOOP_ID && 811 fcport->loop_id != loop_id)) { 812 ql_dbg(ql_dbg_disc, vha, 0x20e3, 813 "%s %d %8phC post del sess\n", 814 __func__, __LINE__, fcport->port_name); 815 if (fcport->n2n_flag) 816 fcport->d_id.b24 = 0; 817 qlt_schedule_sess_for_deletion(fcport); 818 return; 819 } 820 break; 821 } 822 823 fcport->loop_id = loop_id; 824 if (fcport->n2n_flag) 825 fcport->d_id.b24 = id.b24; 826 827 wwn = wwn_to_u64(fcport->port_name); 828 qlt_find_sess_invalidate_other(vha, wwn, 829 id, loop_id, &conflict_fcport); 830 831 if (conflict_fcport) { 832 /* 833 * Another share fcport share the same loop_id & 834 * nport id. Conflict fcport needs to finish 835 * cleanup before this fcport can proceed to login. 836 */ 837 conflict_fcport->conflict = fcport; 838 fcport->login_pause = 1; 839 } 840 841 switch (vha->hw->current_topology) { 842 default: 843 switch (current_login_state) { 844 case DSC_LS_PRLI_COMP: 845 ql_dbg(ql_dbg_disc, 846 vha, 0x20e4, "%s %d %8phC post gpdb\n", 847 __func__, __LINE__, fcport->port_name); 848 849 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 850 fcport->port_type = FCT_INITIATOR; 851 else 852 fcport->port_type = FCT_TARGET; 853 data[0] = data[1] = 0; 854 qla2x00_post_async_adisc_work(vha, fcport, 855 data); 856 break; 857 case DSC_LS_PLOGI_COMP: 858 if (vha->hw->flags.edif_enabled) { 859 /* check to see if App support Secure */ 860 qla24xx_post_gpdb_work(vha, fcport, 0); 861 break; 862 } 863 fallthrough; 864 case DSC_LS_PORT_UNAVAIL: 865 default: 866 if (fcport->loop_id == FC_NO_LOOP_ID) { 867 qla2x00_find_new_loop_id(vha, fcport); 868 fcport->fw_login_state = 869 DSC_LS_PORT_UNAVAIL; 870 } 871 ql_dbg(ql_dbg_disc, vha, 0x20e5, 872 "%s %d %8phC\n", __func__, __LINE__, 873 fcport->port_name); 874 qla24xx_fcport_handle_login(vha, fcport); 875 break; 876 } 877 break; 878 case ISP_CFG_N: 879 fcport->fw_login_state = current_login_state; 880 fcport->d_id = id; 881 switch (current_login_state) { 882 case DSC_LS_PRLI_PEND: 883 /* 884 * In the middle of PRLI. Let it finish. 885 * Allow relogin code to recheck state again 886 * with GNL. Push disc_state back to DELETED 887 * so GNL can go out again 888 */ 889 qla2x00_set_fcport_disc_state(fcport, 890 DSC_DELETED); 891 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 892 break; 893 case DSC_LS_PRLI_COMP: 894 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 895 fcport->port_type = FCT_INITIATOR; 896 else 897 fcport->port_type = FCT_TARGET; 898 899 data[0] = data[1] = 0; 900 qla2x00_post_async_adisc_work(vha, fcport, 901 data); 902 break; 903 case DSC_LS_PLOGI_COMP: 904 if (vha->hw->flags.edif_enabled && 905 DBELL_ACTIVE(vha)) { 906 /* check to see if App support secure or not */ 907 qla24xx_post_gpdb_work(vha, fcport, 0); 908 break; 909 } 910 if (fcport_is_bigger(fcport)) { 911 /* local adapter is smaller */ 912 if (fcport->loop_id != FC_NO_LOOP_ID) 913 qla2x00_clear_loop_id(fcport); 914 915 fcport->loop_id = loop_id; 916 qla24xx_fcport_handle_login(vha, 917 fcport); 918 break; 919 } 920 fallthrough; 921 default: 922 if (fcport_is_smaller(fcport)) { 923 /* local adapter is bigger */ 924 if (fcport->loop_id != FC_NO_LOOP_ID) 925 qla2x00_clear_loop_id(fcport); 926 927 fcport->loop_id = loop_id; 928 qla24xx_fcport_handle_login(vha, 929 fcport); 930 } 931 break; 932 } 933 break; 934 } /* switch (ha->current_topology) */ 935 } 936 937 if (!found) { 938 switch (vha->hw->current_topology) { 939 case ISP_CFG_F: 940 case ISP_CFG_FL: 941 for (i = 0; i < n; i++) { 942 e = &vha->gnl.l[i]; 943 id.b.domain = e->port_id[0]; 944 id.b.area = e->port_id[1]; 945 id.b.al_pa = e->port_id[2]; 946 id.b.rsvd_1 = 0; 947 loop_id = le16_to_cpu(e->nport_handle); 948 949 if (fcport->d_id.b24 == id.b24) { 950 conflict_fcport = 951 qla2x00_find_fcport_by_wwpn(vha, 952 e->port_name, 0); 953 if (conflict_fcport) { 954 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 955 vha, 0x20e5, 956 "%s %d %8phC post del sess\n", 957 __func__, __LINE__, 958 conflict_fcport->port_name); 959 qlt_schedule_sess_for_deletion 960 (conflict_fcport); 961 } 962 } 963 /* 964 * FW already picked this loop id for 965 * another fcport 966 */ 967 if (fcport->loop_id == loop_id) 968 fcport->loop_id = FC_NO_LOOP_ID; 969 } 970 qla24xx_fcport_handle_login(vha, fcport); 971 break; 972 case ISP_CFG_N: 973 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 974 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 975 if (fcport->n2n_link_reset_cnt < 2) { 976 fcport->n2n_link_reset_cnt++; 977 /* 978 * remote port is not sending PLOGI. 979 * Reset link to kick start his state 980 * machine 981 */ 982 set_bit(N2N_LINK_RESET, 983 &vha->dpc_flags); 984 } else { 985 if (fcport->n2n_chip_reset < 1) { 986 ql_log(ql_log_info, vha, 0x705d, 987 "Chip reset to bring laser down"); 988 set_bit(ISP_ABORT_NEEDED, 989 &vha->dpc_flags); 990 fcport->n2n_chip_reset++; 991 } else { 992 ql_log(ql_log_info, vha, 0x705d, 993 "Remote port %8ph is not coming back\n", 994 fcport->port_name); 995 fcport->scan_state = 0; 996 } 997 } 998 qla2xxx_wake_dpc(vha); 999 } else { 1000 /* 1001 * report port suppose to do PLOGI. Give him 1002 * more time. FW will catch it. 1003 */ 1004 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1005 } 1006 break; 1007 case ISP_CFG_NL: 1008 qla24xx_fcport_handle_login(vha, fcport); 1009 break; 1010 default: 1011 break; 1012 } 1013 } 1014 } /* gnl_event */ 1015 1016 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 1017 { 1018 struct scsi_qla_host *vha = sp->vha; 1019 unsigned long flags; 1020 struct fc_port *fcport = NULL, *tf; 1021 u16 i, n = 0, loop_id; 1022 struct event_arg ea; 1023 struct get_name_list_extended *e; 1024 u64 wwn; 1025 struct list_head h; 1026 bool found = false; 1027 1028 ql_dbg(ql_dbg_disc, vha, 0x20e7, 1029 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 1030 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 1031 sp->u.iocb_cmd.u.mbx.in_mb[2]); 1032 1033 1034 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 1035 memset(&ea, 0, sizeof(ea)); 1036 ea.sp = sp; 1037 ea.rc = res; 1038 1039 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 1040 sizeof(struct get_name_list_extended)) { 1041 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 1042 sizeof(struct get_name_list_extended); 1043 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 1044 } 1045 1046 for (i = 0; i < n; i++) { 1047 e = &vha->gnl.l[i]; 1048 loop_id = le16_to_cpu(e->nport_handle); 1049 /* mask out reserve bit */ 1050 loop_id = (loop_id & 0x7fff); 1051 set_bit(loop_id, vha->hw->loop_id_map); 1052 wwn = wwn_to_u64(e->port_name); 1053 1054 ql_dbg(ql_dbg_disc, vha, 0x20e8, 1055 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 1056 __func__, &wwn, e->port_id[2], e->port_id[1], 1057 e->port_id[0], e->current_login_state, e->last_login_state, 1058 (loop_id & 0x7fff)); 1059 } 1060 1061 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1062 1063 INIT_LIST_HEAD(&h); 1064 fcport = tf = NULL; 1065 if (!list_empty(&vha->gnl.fcports)) 1066 list_splice_init(&vha->gnl.fcports, &h); 1067 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1068 1069 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1070 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1071 list_del_init(&fcport->gnl_entry); 1072 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1073 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1074 ea.fcport = fcport; 1075 1076 qla24xx_handle_gnl_done_event(vha, &ea); 1077 } 1078 1079 /* create new fcport if fw has knowledge of new sessions */ 1080 for (i = 0; i < n; i++) { 1081 port_id_t id; 1082 u64 wwnn; 1083 1084 e = &vha->gnl.l[i]; 1085 wwn = wwn_to_u64(e->port_name); 1086 1087 found = false; 1088 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1089 if (!memcmp((u8 *)&wwn, fcport->port_name, 1090 WWN_SIZE)) { 1091 found = true; 1092 break; 1093 } 1094 } 1095 1096 id.b.domain = e->port_id[2]; 1097 id.b.area = e->port_id[1]; 1098 id.b.al_pa = e->port_id[0]; 1099 id.b.rsvd_1 = 0; 1100 1101 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1102 ql_dbg(ql_dbg_disc, vha, 0x2065, 1103 "%s %d %8phC %06x post new sess\n", 1104 __func__, __LINE__, (u8 *)&wwn, id.b24); 1105 wwnn = wwn_to_u64(e->node_name); 1106 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1107 (u8 *)&wwnn, NULL, 0); 1108 } 1109 } 1110 1111 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1112 vha->gnl.sent = 0; 1113 if (!list_empty(&vha->gnl.fcports)) { 1114 /* retrigger gnl */ 1115 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports, 1116 gnl_entry) { 1117 list_del_init(&fcport->gnl_entry); 1118 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1119 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS) 1120 break; 1121 } 1122 } 1123 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1124 1125 /* ref: INIT */ 1126 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1127 } 1128 1129 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1130 { 1131 srb_t *sp; 1132 int rval = QLA_FUNCTION_FAILED; 1133 unsigned long flags; 1134 u16 *mb; 1135 1136 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1137 return rval; 1138 1139 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1140 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1141 1142 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1143 fcport->flags |= FCF_ASYNC_SENT; 1144 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1145 fcport->last_rscn_gen = fcport->rscn_gen; 1146 fcport->last_login_gen = fcport->login_gen; 1147 1148 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1149 if (vha->gnl.sent) { 1150 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1151 return QLA_SUCCESS; 1152 } 1153 vha->gnl.sent = 1; 1154 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1155 1156 /* ref: INIT */ 1157 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1158 if (!sp) 1159 goto done; 1160 1161 sp->type = SRB_MB_IOCB; 1162 sp->name = "gnlist"; 1163 sp->gen1 = fcport->rscn_gen; 1164 sp->gen2 = fcport->login_gen; 1165 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1166 qla24xx_async_gnl_sp_done); 1167 1168 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1169 mb[0] = MBC_PORT_NODE_NAME_LIST; 1170 mb[1] = BIT_2 | BIT_3; 1171 mb[2] = MSW(vha->gnl.ldma); 1172 mb[3] = LSW(vha->gnl.ldma); 1173 mb[6] = MSW(MSD(vha->gnl.ldma)); 1174 mb[7] = LSW(MSD(vha->gnl.ldma)); 1175 mb[8] = vha->gnl.size; 1176 mb[9] = vha->vp_idx; 1177 1178 ql_dbg(ql_dbg_disc, vha, 0x20da, 1179 "Async-%s - OUT WWPN %8phC hndl %x\n", 1180 sp->name, fcport->port_name, sp->handle); 1181 1182 rval = qla2x00_start_sp(sp); 1183 if (rval != QLA_SUCCESS) 1184 goto done_free_sp; 1185 1186 return rval; 1187 1188 done_free_sp: 1189 /* ref: INIT */ 1190 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1191 done: 1192 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT); 1193 return rval; 1194 } 1195 1196 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1197 { 1198 struct qla_work_evt *e; 1199 1200 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1201 if (!e) 1202 return QLA_FUNCTION_FAILED; 1203 1204 e->u.fcport.fcport = fcport; 1205 fcport->flags |= FCF_ASYNC_ACTIVE; 1206 return qla2x00_post_work(vha, e); 1207 } 1208 1209 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1210 { 1211 struct scsi_qla_host *vha = sp->vha; 1212 struct qla_hw_data *ha = vha->hw; 1213 fc_port_t *fcport = sp->fcport; 1214 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1215 struct event_arg ea; 1216 1217 ql_dbg(ql_dbg_disc, vha, 0x20db, 1218 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1219 sp->name, res, fcport->port_name, mb[1], mb[2]); 1220 1221 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1222 1223 if (res == QLA_FUNCTION_TIMEOUT) 1224 goto done; 1225 1226 memset(&ea, 0, sizeof(ea)); 1227 ea.fcport = fcport; 1228 ea.sp = sp; 1229 1230 qla24xx_handle_gpdb_event(vha, &ea); 1231 1232 done: 1233 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1234 sp->u.iocb_cmd.u.mbx.in_dma); 1235 1236 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1237 } 1238 1239 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1240 { 1241 struct qla_work_evt *e; 1242 1243 if (vha->host->active_mode == MODE_TARGET) 1244 return QLA_FUNCTION_FAILED; 1245 1246 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1247 if (!e) 1248 return QLA_FUNCTION_FAILED; 1249 1250 e->u.fcport.fcport = fcport; 1251 1252 return qla2x00_post_work(vha, e); 1253 } 1254 1255 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1256 { 1257 struct scsi_qla_host *vha = sp->vha; 1258 struct srb_iocb *lio = &sp->u.iocb_cmd; 1259 struct event_arg ea; 1260 1261 ql_dbg(ql_dbg_disc, vha, 0x2129, 1262 "%s %8phC res %x\n", __func__, 1263 sp->fcport->port_name, res); 1264 1265 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1266 1267 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1268 memset(&ea, 0, sizeof(ea)); 1269 ea.fcport = sp->fcport; 1270 ea.data[0] = lio->u.logio.data[0]; 1271 ea.data[1] = lio->u.logio.data[1]; 1272 ea.iop[0] = lio->u.logio.iop[0]; 1273 ea.iop[1] = lio->u.logio.iop[1]; 1274 ea.sp = sp; 1275 if (res == QLA_OS_TIMER_EXPIRED) 1276 ea.data[0] = QLA_OS_TIMER_EXPIRED; 1277 else if (res) 1278 ea.data[0] = MBS_COMMAND_ERROR; 1279 1280 qla24xx_handle_prli_done_event(vha, &ea); 1281 } 1282 1283 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1284 } 1285 1286 int 1287 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1288 { 1289 srb_t *sp; 1290 struct srb_iocb *lio; 1291 int rval = QLA_FUNCTION_FAILED; 1292 1293 if (!vha->flags.online) { 1294 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1295 __func__, __LINE__, fcport->port_name); 1296 return rval; 1297 } 1298 1299 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1300 fcport->fw_login_state == DSC_LS_PRLI_PEND) && 1301 qla_dual_mode_enabled(vha)) { 1302 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1303 __func__, __LINE__, fcport->port_name); 1304 return rval; 1305 } 1306 1307 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1308 if (!sp) 1309 return rval; 1310 1311 fcport->flags |= FCF_ASYNC_SENT; 1312 fcport->logout_completed = 0; 1313 1314 sp->type = SRB_PRLI_CMD; 1315 sp->name = "prli"; 1316 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1317 qla2x00_async_prli_sp_done); 1318 1319 lio = &sp->u.iocb_cmd; 1320 lio->u.logio.flags = 0; 1321 1322 if (NVME_TARGET(vha->hw, fcport)) 1323 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1324 1325 ql_dbg(ql_dbg_disc, vha, 0x211b, 1326 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n", 1327 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1328 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority, 1329 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp"); 1330 1331 rval = qla2x00_start_sp(sp); 1332 if (rval != QLA_SUCCESS) { 1333 fcport->flags |= FCF_LOGIN_NEEDED; 1334 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1335 goto done_free_sp; 1336 } 1337 1338 return rval; 1339 1340 done_free_sp: 1341 /* ref: INIT */ 1342 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1343 fcport->flags &= ~FCF_ASYNC_SENT; 1344 return rval; 1345 } 1346 1347 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1348 { 1349 struct qla_work_evt *e; 1350 1351 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1352 if (!e) 1353 return QLA_FUNCTION_FAILED; 1354 1355 e->u.fcport.fcport = fcport; 1356 e->u.fcport.opt = opt; 1357 fcport->flags |= FCF_ASYNC_ACTIVE; 1358 return qla2x00_post_work(vha, e); 1359 } 1360 1361 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1362 { 1363 srb_t *sp; 1364 struct srb_iocb *mbx; 1365 int rval = QLA_FUNCTION_FAILED; 1366 u16 *mb; 1367 dma_addr_t pd_dma; 1368 struct port_database_24xx *pd; 1369 struct qla_hw_data *ha = vha->hw; 1370 1371 if (IS_SESSION_DELETED(fcport)) { 1372 ql_log(ql_log_warn, vha, 0xffff, 1373 "%s: %8phC is being delete - not sending command.\n", 1374 __func__, fcport->port_name); 1375 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1376 return rval; 1377 } 1378 1379 if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) { 1380 ql_log(ql_log_warn, vha, 0xffff, 1381 "%s: %8phC online %d flags %x - not sending command.\n", 1382 __func__, fcport->port_name, vha->flags.online, fcport->flags); 1383 goto done; 1384 } 1385 1386 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1387 if (!sp) 1388 goto done; 1389 1390 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB); 1391 1392 fcport->flags |= FCF_ASYNC_SENT; 1393 sp->type = SRB_MB_IOCB; 1394 sp->name = "gpdb"; 1395 sp->gen1 = fcport->rscn_gen; 1396 sp->gen2 = fcport->login_gen; 1397 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1398 qla24xx_async_gpdb_sp_done); 1399 1400 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1401 if (pd == NULL) { 1402 ql_log(ql_log_warn, vha, 0xd043, 1403 "Failed to allocate port database structure.\n"); 1404 goto done_free_sp; 1405 } 1406 1407 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1408 mb[0] = MBC_GET_PORT_DATABASE; 1409 mb[1] = fcport->loop_id; 1410 mb[2] = MSW(pd_dma); 1411 mb[3] = LSW(pd_dma); 1412 mb[6] = MSW(MSD(pd_dma)); 1413 mb[7] = LSW(MSD(pd_dma)); 1414 mb[9] = vha->vp_idx; 1415 mb[10] = opt; 1416 1417 mbx = &sp->u.iocb_cmd; 1418 mbx->u.mbx.in = (void *)pd; 1419 mbx->u.mbx.in_dma = pd_dma; 1420 1421 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1422 "Async-%s %8phC hndl %x opt %x\n", 1423 sp->name, fcport->port_name, sp->handle, opt); 1424 1425 rval = qla2x00_start_sp(sp); 1426 if (rval != QLA_SUCCESS) 1427 goto done_free_sp; 1428 return rval; 1429 1430 done_free_sp: 1431 if (pd) 1432 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1433 1434 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1435 fcport->flags &= ~FCF_ASYNC_SENT; 1436 done: 1437 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1438 qla24xx_post_gpdb_work(vha, fcport, opt); 1439 return rval; 1440 } 1441 1442 static 1443 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1444 { 1445 unsigned long flags; 1446 1447 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1448 ea->fcport->login_gen++; 1449 ea->fcport->deleted = 0; 1450 ea->fcport->logout_on_delete = 1; 1451 1452 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1453 vha->fcport_count++; 1454 ea->fcport->login_succ = 1; 1455 1456 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1457 qla24xx_sched_upd_fcport(ea->fcport); 1458 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1459 } else if (ea->fcport->login_succ) { 1460 /* 1461 * We have an existing session. A late RSCN delivery 1462 * must have triggered the session to be re-validate. 1463 * Session is still valid. 1464 */ 1465 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1466 "%s %d %8phC session revalidate success\n", 1467 __func__, __LINE__, ea->fcport->port_name); 1468 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE); 1469 } 1470 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1471 } 1472 1473 static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport, 1474 struct port_database_24xx *pd) 1475 { 1476 int rc = 0; 1477 1478 if (pd->secure_login) { 1479 ql_dbg(ql_dbg_disc, vha, 0x104d, 1480 "Secure Login established on %8phC\n", 1481 fcport->port_name); 1482 fcport->flags |= FCF_FCSP_DEVICE; 1483 } else { 1484 ql_dbg(ql_dbg_disc, vha, 0x104d, 1485 "non-Secure Login %8phC", 1486 fcport->port_name); 1487 fcport->flags &= ~FCF_FCSP_DEVICE; 1488 } 1489 if (vha->hw->flags.edif_enabled) { 1490 if (fcport->flags & FCF_FCSP_DEVICE) { 1491 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND); 1492 /* Start edif prli timer & ring doorbell for app */ 1493 fcport->edif.rx_sa_set = 0; 1494 fcport->edif.tx_sa_set = 0; 1495 fcport->edif.rx_sa_pending = 0; 1496 fcport->edif.tx_sa_pending = 0; 1497 1498 qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE, 1499 fcport->d_id.b24); 1500 1501 if (DBELL_ACTIVE(vha)) { 1502 ql_dbg(ql_dbg_disc, vha, 0x20ef, 1503 "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n", 1504 __func__, __LINE__, fcport->port_name); 1505 fcport->edif.app_sess_online = 1; 1506 1507 qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED, 1508 fcport->d_id.b24, 0, fcport); 1509 } 1510 1511 rc = 1; 1512 } else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 1513 ql_dbg(ql_dbg_disc, vha, 0x2117, 1514 "%s %d %8phC post prli\n", 1515 __func__, __LINE__, fcport->port_name); 1516 qla24xx_post_prli_work(vha, fcport); 1517 rc = 1; 1518 } 1519 } 1520 return rc; 1521 } 1522 1523 static 1524 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1525 { 1526 fc_port_t *fcport = ea->fcport; 1527 struct port_database_24xx *pd; 1528 struct srb *sp = ea->sp; 1529 uint8_t ls; 1530 1531 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1532 1533 fcport->flags &= ~FCF_ASYNC_SENT; 1534 1535 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1536 "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__, 1537 fcport->port_name, fcport->disc_state, pd->current_login_state, 1538 fcport->fc4_type, ea->rc); 1539 1540 if (fcport->disc_state == DSC_DELETE_PEND) { 1541 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n", 1542 __func__, __LINE__, fcport->port_name); 1543 return; 1544 } 1545 1546 if (NVME_TARGET(vha->hw, fcport)) 1547 ls = pd->current_login_state >> 4; 1548 else 1549 ls = pd->current_login_state & 0xf; 1550 1551 if (ea->sp->gen2 != fcport->login_gen) { 1552 /* target side must have changed it. */ 1553 1554 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1555 "%s %8phC generation changed\n", 1556 __func__, fcport->port_name); 1557 return; 1558 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1559 qla_rscn_replay(fcport); 1560 qlt_schedule_sess_for_deletion(fcport); 1561 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1562 __func__, __LINE__, fcport->port_name, ls); 1563 return; 1564 } 1565 1566 switch (ls) { 1567 case PDS_PRLI_COMPLETE: 1568 __qla24xx_parse_gpdb(vha, fcport, pd); 1569 break; 1570 case PDS_PLOGI_COMPLETE: 1571 if (qla_chk_secure_login(vha, fcport, pd)) { 1572 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1573 __func__, __LINE__, fcport->port_name, ls); 1574 return; 1575 } 1576 fallthrough; 1577 case PDS_PLOGI_PENDING: 1578 case PDS_PRLI_PENDING: 1579 case PDS_PRLI2_PENDING: 1580 /* Set discovery state back to GNL to Relogin attempt */ 1581 if (qla_dual_mode_enabled(vha) || 1582 qla_ini_mode_enabled(vha)) { 1583 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1584 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1585 } 1586 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1587 __func__, __LINE__, fcport->port_name, ls); 1588 return; 1589 case PDS_LOGO_PENDING: 1590 case PDS_PORT_UNAVAILABLE: 1591 default: 1592 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1593 __func__, __LINE__, fcport->port_name); 1594 qlt_schedule_sess_for_deletion(fcport); 1595 return; 1596 } 1597 __qla24xx_handle_gpdb_event(vha, ea); 1598 } /* gpdb event */ 1599 1600 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1601 { 1602 u8 login = 0; 1603 int rc; 1604 1605 ql_dbg(ql_dbg_disc, vha, 0x307b, 1606 "%s %8phC DS %d LS %d lid %d retries=%d\n", 1607 __func__, fcport->port_name, fcport->disc_state, 1608 fcport->fw_login_state, fcport->loop_id, fcport->login_retry); 1609 1610 if (qla_tgt_mode_enabled(vha)) 1611 return; 1612 1613 if (qla_dual_mode_enabled(vha)) { 1614 if (N2N_TOPO(vha->hw)) { 1615 u64 mywwn, wwn; 1616 1617 mywwn = wwn_to_u64(vha->port_name); 1618 wwn = wwn_to_u64(fcport->port_name); 1619 if (mywwn > wwn) 1620 login = 1; 1621 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1622 && time_after_eq(jiffies, 1623 fcport->plogi_nack_done_deadline)) 1624 login = 1; 1625 } else { 1626 login = 1; 1627 } 1628 } else { 1629 /* initiator mode */ 1630 login = 1; 1631 } 1632 1633 if (login && fcport->login_retry) { 1634 fcport->login_retry--; 1635 if (fcport->loop_id == FC_NO_LOOP_ID) { 1636 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1637 rc = qla2x00_find_new_loop_id(vha, fcport); 1638 if (rc) { 1639 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1640 "%s %d %8phC post del sess - out of loopid\n", 1641 __func__, __LINE__, fcport->port_name); 1642 fcport->scan_state = 0; 1643 qlt_schedule_sess_for_deletion(fcport); 1644 return; 1645 } 1646 } 1647 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1648 "%s %d %8phC post login\n", 1649 __func__, __LINE__, fcport->port_name); 1650 qla2x00_post_async_login_work(vha, fcport, NULL); 1651 } 1652 } 1653 1654 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1655 { 1656 u16 data[2]; 1657 u16 sec; 1658 1659 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1660 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n", 1661 __func__, fcport->port_name, fcport->disc_state, 1662 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1663 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1664 fcport->login_gen, fcport->loop_id, fcport->scan_state, 1665 fcport->fc4_type); 1666 1667 if (fcport->scan_state != QLA_FCPORT_FOUND || 1668 fcport->disc_state == DSC_DELETE_PEND) 1669 return 0; 1670 1671 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1672 qla_dual_mode_enabled(vha) && 1673 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1674 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1675 return 0; 1676 1677 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1678 !N2N_TOPO(vha->hw)) { 1679 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1680 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1681 return 0; 1682 } 1683 } 1684 1685 /* Target won't initiate port login if fabric is present */ 1686 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1687 return 0; 1688 1689 if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) { 1690 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1691 return 0; 1692 } 1693 1694 switch (fcport->disc_state) { 1695 case DSC_DELETED: 1696 switch (vha->hw->current_topology) { 1697 case ISP_CFG_N: 1698 if (fcport_is_smaller(fcport)) { 1699 /* this adapter is bigger */ 1700 if (fcport->login_retry) { 1701 if (fcport->loop_id == FC_NO_LOOP_ID) { 1702 qla2x00_find_new_loop_id(vha, 1703 fcport); 1704 fcport->fw_login_state = 1705 DSC_LS_PORT_UNAVAIL; 1706 } 1707 fcport->login_retry--; 1708 qla_post_els_plogi_work(vha, fcport); 1709 } else { 1710 ql_log(ql_log_info, vha, 0x705d, 1711 "Unable to reach remote port %8phC", 1712 fcport->port_name); 1713 } 1714 } else { 1715 qla24xx_post_gnl_work(vha, fcport); 1716 } 1717 break; 1718 default: 1719 if (fcport->loop_id == FC_NO_LOOP_ID) { 1720 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1721 "%s %d %8phC post gnl\n", 1722 __func__, __LINE__, fcport->port_name); 1723 qla24xx_post_gnl_work(vha, fcport); 1724 } else { 1725 qla_chk_n2n_b4_login(vha, fcport); 1726 } 1727 break; 1728 } 1729 break; 1730 1731 case DSC_GNL: 1732 switch (vha->hw->current_topology) { 1733 case ISP_CFG_N: 1734 if ((fcport->current_login_state & 0xf) == 0x6) { 1735 ql_dbg(ql_dbg_disc, vha, 0x2118, 1736 "%s %d %8phC post GPDB work\n", 1737 __func__, __LINE__, fcport->port_name); 1738 fcport->chip_reset = 1739 vha->hw->base_qpair->chip_reset; 1740 qla24xx_post_gpdb_work(vha, fcport, 0); 1741 } else { 1742 ql_dbg(ql_dbg_disc, vha, 0x2118, 1743 "%s %d %8phC post %s PRLI\n", 1744 __func__, __LINE__, fcport->port_name, 1745 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1746 "FC"); 1747 qla24xx_post_prli_work(vha, fcport); 1748 } 1749 break; 1750 default: 1751 if (fcport->login_pause) { 1752 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1753 "%s %d %8phC exit\n", 1754 __func__, __LINE__, 1755 fcport->port_name); 1756 fcport->last_rscn_gen = fcport->rscn_gen; 1757 fcport->last_login_gen = fcport->login_gen; 1758 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1759 break; 1760 } 1761 qla_chk_n2n_b4_login(vha, fcport); 1762 break; 1763 } 1764 break; 1765 1766 case DSC_LOGIN_FAILED: 1767 if (N2N_TOPO(vha->hw)) 1768 qla_chk_n2n_b4_login(vha, fcport); 1769 else 1770 qlt_schedule_sess_for_deletion(fcport); 1771 break; 1772 1773 case DSC_LOGIN_COMPLETE: 1774 /* recheck login state */ 1775 data[0] = data[1] = 0; 1776 qla2x00_post_async_adisc_work(vha, fcport, data); 1777 break; 1778 1779 case DSC_LOGIN_PEND: 1780 if (vha->hw->flags.edif_enabled) 1781 break; 1782 1783 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1784 ql_dbg(ql_dbg_disc, vha, 0x2118, 1785 "%s %d %8phC post %s PRLI\n", 1786 __func__, __LINE__, fcport->port_name, 1787 NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC"); 1788 qla24xx_post_prli_work(vha, fcport); 1789 } 1790 break; 1791 1792 case DSC_UPD_FCPORT: 1793 sec = jiffies_to_msecs(jiffies - 1794 fcport->jiffies_at_registration)/1000; 1795 if (fcport->sec_since_registration < sec && sec && 1796 !(sec % 60)) { 1797 fcport->sec_since_registration = sec; 1798 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1799 "%s %8phC - Slow Rport registration(%d Sec)\n", 1800 __func__, fcport->port_name, sec); 1801 } 1802 1803 if (fcport->next_disc_state != DSC_DELETE_PEND) 1804 fcport->next_disc_state = DSC_ADISC; 1805 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1806 break; 1807 1808 default: 1809 break; 1810 } 1811 1812 return 0; 1813 } 1814 1815 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1816 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1817 { 1818 struct qla_work_evt *e; 1819 1820 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1821 if (!e) 1822 return QLA_FUNCTION_FAILED; 1823 1824 e->u.new_sess.id = *id; 1825 e->u.new_sess.pla = pla; 1826 e->u.new_sess.fc4_type = fc4_type; 1827 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1828 if (node_name) 1829 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1830 1831 return qla2x00_post_work(vha, e); 1832 } 1833 1834 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1835 { 1836 fc_port_t *fcport; 1837 unsigned long flags; 1838 1839 switch (ea->id.b.rsvd_1) { 1840 case RSCN_PORT_ADDR: 1841 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1842 if (fcport) { 1843 if (ql2xfc2target && 1844 fcport->flags & FCF_FCP2_DEVICE && 1845 atomic_read(&fcport->state) == FCS_ONLINE) { 1846 ql_dbg(ql_dbg_disc, vha, 0x2115, 1847 "Delaying session delete for FCP2 portid=%06x %8phC ", 1848 fcport->d_id.b24, fcport->port_name); 1849 return; 1850 } 1851 1852 if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) { 1853 /* 1854 * On ipsec start by remote port, Target port 1855 * may use RSCN to trigger initiator to 1856 * relogin. If driver is already in the 1857 * process of a relogin, then ignore the RSCN 1858 * and allow the current relogin to continue. 1859 * This reduces thrashing of the connection. 1860 */ 1861 if (atomic_read(&fcport->state) == FCS_ONLINE) { 1862 /* 1863 * If state = online, then set scan_needed=1 to do relogin. 1864 * Otherwise we're already in the middle of a relogin 1865 */ 1866 fcport->scan_needed = 1; 1867 fcport->rscn_gen++; 1868 } 1869 } else { 1870 fcport->scan_needed = 1; 1871 fcport->rscn_gen++; 1872 } 1873 } 1874 break; 1875 case RSCN_AREA_ADDR: 1876 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1877 if (fcport->flags & FCF_FCP2_DEVICE && 1878 atomic_read(&fcport->state) == FCS_ONLINE) 1879 continue; 1880 1881 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) { 1882 fcport->scan_needed = 1; 1883 fcport->rscn_gen++; 1884 } 1885 } 1886 break; 1887 case RSCN_DOM_ADDR: 1888 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1889 if (fcport->flags & FCF_FCP2_DEVICE && 1890 atomic_read(&fcport->state) == FCS_ONLINE) 1891 continue; 1892 1893 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) { 1894 fcport->scan_needed = 1; 1895 fcport->rscn_gen++; 1896 } 1897 } 1898 break; 1899 case RSCN_FAB_ADDR: 1900 default: 1901 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1902 if (fcport->flags & FCF_FCP2_DEVICE && 1903 atomic_read(&fcport->state) == FCS_ONLINE) 1904 continue; 1905 1906 fcport->scan_needed = 1; 1907 fcport->rscn_gen++; 1908 } 1909 break; 1910 } 1911 1912 spin_lock_irqsave(&vha->work_lock, flags); 1913 if (vha->scan.scan_flags == 0) { 1914 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1915 vha->scan.scan_flags |= SF_QUEUED; 1916 schedule_delayed_work(&vha->scan.scan_work, 5); 1917 } 1918 spin_unlock_irqrestore(&vha->work_lock, flags); 1919 } 1920 1921 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1922 struct event_arg *ea) 1923 { 1924 fc_port_t *fcport = ea->fcport; 1925 1926 if (test_bit(UNLOADING, &vha->dpc_flags)) 1927 return; 1928 1929 ql_dbg(ql_dbg_disc, vha, 0x2102, 1930 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1931 __func__, fcport->port_name, fcport->disc_state, 1932 fcport->fw_login_state, fcport->login_pause, 1933 fcport->deleted, fcport->conflict, 1934 fcport->last_rscn_gen, fcport->rscn_gen, 1935 fcport->last_login_gen, fcport->login_gen, 1936 fcport->flags); 1937 1938 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1939 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1940 __func__, __LINE__, fcport->port_name); 1941 qla24xx_post_gnl_work(vha, fcport); 1942 return; 1943 } 1944 1945 qla24xx_fcport_handle_login(vha, fcport); 1946 } 1947 1948 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1949 struct event_arg *ea) 1950 { 1951 if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) && 1952 vha->hw->flags.edif_enabled) { 1953 /* check to see if App support Secure */ 1954 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1955 return; 1956 } 1957 1958 /* for pure Target Mode, PRLI will not be initiated */ 1959 if (vha->host->active_mode == MODE_TARGET) 1960 return; 1961 1962 ql_dbg(ql_dbg_disc, vha, 0x2118, 1963 "%s %d %8phC post PRLI\n", 1964 __func__, __LINE__, ea->fcport->port_name); 1965 qla24xx_post_prli_work(vha, ea->fcport); 1966 } 1967 1968 /* 1969 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1970 * to be consumed by the fcport 1971 */ 1972 void qla_rscn_replay(fc_port_t *fcport) 1973 { 1974 struct event_arg ea; 1975 1976 switch (fcport->disc_state) { 1977 case DSC_DELETE_PEND: 1978 return; 1979 default: 1980 break; 1981 } 1982 1983 if (fcport->scan_needed) { 1984 memset(&ea, 0, sizeof(ea)); 1985 ea.id = fcport->d_id; 1986 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1987 qla2x00_handle_rscn(fcport->vha, &ea); 1988 } 1989 } 1990 1991 static void 1992 qla2x00_tmf_iocb_timeout(void *data) 1993 { 1994 srb_t *sp = data; 1995 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1996 int rc, h; 1997 unsigned long flags; 1998 1999 if (sp->type == SRB_MARKER) { 2000 complete(&tmf->u.tmf.comp); 2001 return; 2002 } 2003 2004 rc = qla24xx_async_abort_cmd(sp, false); 2005 if (rc) { 2006 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 2007 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 2008 if (sp->qpair->req->outstanding_cmds[h] == sp) { 2009 sp->qpair->req->outstanding_cmds[h] = NULL; 2010 qla_put_fw_resources(sp->qpair, &sp->iores); 2011 break; 2012 } 2013 } 2014 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 2015 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT); 2016 tmf->u.tmf.data = QLA_FUNCTION_FAILED; 2017 complete(&tmf->u.tmf.comp); 2018 } 2019 } 2020 2021 static void qla_marker_sp_done(srb_t *sp, int res) 2022 { 2023 struct srb_iocb *tmf = &sp->u.iocb_cmd; 2024 2025 if (res != QLA_SUCCESS) 2026 ql_dbg(ql_dbg_taskm, sp->vha, 0x8004, 2027 "Async-marker fail hdl=%x portid=%06x ctrl=%x lun=%lld qp=%d.\n", 2028 sp->handle, sp->fcport->d_id.b24, sp->u.iocb_cmd.u.tmf.flags, 2029 sp->u.iocb_cmd.u.tmf.lun, sp->qpair->id); 2030 2031 sp->u.iocb_cmd.u.tmf.data = res; 2032 complete(&tmf->u.tmf.comp); 2033 } 2034 2035 #define START_SP_W_RETRIES(_sp, _rval) \ 2036 {\ 2037 int cnt = 5; \ 2038 do { \ 2039 _rval = qla2x00_start_sp(_sp); \ 2040 if (_rval == EAGAIN) \ 2041 msleep(1); \ 2042 else \ 2043 break; \ 2044 cnt--; \ 2045 } while (cnt); \ 2046 } 2047 2048 /** 2049 * qla26xx_marker: send marker IOCB and wait for the completion of it. 2050 * @arg: pointer to argument list. 2051 * It is assume caller will provide an fcport pointer and modifier 2052 */ 2053 static int 2054 qla26xx_marker(struct tmf_arg *arg) 2055 { 2056 struct scsi_qla_host *vha = arg->vha; 2057 struct srb_iocb *tm_iocb; 2058 srb_t *sp; 2059 int rval = QLA_FUNCTION_FAILED; 2060 fc_port_t *fcport = arg->fcport; 2061 2062 if (TMF_NOT_READY(arg->fcport)) { 2063 ql_dbg(ql_dbg_taskm, vha, 0x8039, 2064 "FC port not ready for marker loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n", 2065 fcport->loop_id, fcport->d_id.b24, 2066 arg->modifier, arg->lun, arg->qpair->id); 2067 return QLA_SUSPENDED; 2068 } 2069 2070 /* ref: INIT */ 2071 sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL); 2072 if (!sp) 2073 goto done; 2074 2075 sp->type = SRB_MARKER; 2076 sp->name = "marker"; 2077 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), qla_marker_sp_done); 2078 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout; 2079 2080 tm_iocb = &sp->u.iocb_cmd; 2081 init_completion(&tm_iocb->u.tmf.comp); 2082 tm_iocb->u.tmf.modifier = arg->modifier; 2083 tm_iocb->u.tmf.lun = arg->lun; 2084 tm_iocb->u.tmf.loop_id = fcport->loop_id; 2085 tm_iocb->u.tmf.vp_index = vha->vp_idx; 2086 2087 START_SP_W_RETRIES(sp, rval); 2088 2089 ql_dbg(ql_dbg_taskm, vha, 0x8006, 2090 "Async-marker hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n", 2091 sp->handle, fcport->loop_id, fcport->d_id.b24, 2092 arg->modifier, arg->lun, sp->qpair->id, rval); 2093 2094 if (rval != QLA_SUCCESS) { 2095 ql_log(ql_log_warn, vha, 0x8031, 2096 "Marker IOCB send failure (%x).\n", rval); 2097 goto done_free_sp; 2098 } 2099 2100 wait_for_completion(&tm_iocb->u.tmf.comp); 2101 rval = tm_iocb->u.tmf.data; 2102 2103 if (rval != QLA_SUCCESS) { 2104 ql_log(ql_log_warn, vha, 0x8019, 2105 "Marker failed hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n", 2106 sp->handle, fcport->loop_id, fcport->d_id.b24, 2107 arg->modifier, arg->lun, sp->qpair->id, rval); 2108 } 2109 2110 done_free_sp: 2111 /* ref: INIT */ 2112 kref_put(&sp->cmd_kref, qla2x00_sp_release); 2113 done: 2114 return rval; 2115 } 2116 2117 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 2118 { 2119 struct srb_iocb *tmf = &sp->u.iocb_cmd; 2120 2121 if (res) 2122 tmf->u.tmf.data = res; 2123 complete(&tmf->u.tmf.comp); 2124 } 2125 2126 static int 2127 __qla2x00_async_tm_cmd(struct tmf_arg *arg) 2128 { 2129 struct scsi_qla_host *vha = arg->vha; 2130 struct srb_iocb *tm_iocb; 2131 srb_t *sp; 2132 int rval = QLA_FUNCTION_FAILED; 2133 2134 fc_port_t *fcport = arg->fcport; 2135 2136 if (TMF_NOT_READY(arg->fcport)) { 2137 ql_dbg(ql_dbg_taskm, vha, 0x8032, 2138 "FC port not ready for TM command loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n", 2139 fcport->loop_id, fcport->d_id.b24, 2140 arg->modifier, arg->lun, arg->qpair->id); 2141 return QLA_SUSPENDED; 2142 } 2143 2144 /* ref: INIT */ 2145 sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL); 2146 if (!sp) 2147 goto done; 2148 2149 qla_vha_mark_busy(vha); 2150 sp->type = SRB_TM_CMD; 2151 sp->name = "tmf"; 2152 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), 2153 qla2x00_tmf_sp_done); 2154 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout; 2155 2156 tm_iocb = &sp->u.iocb_cmd; 2157 init_completion(&tm_iocb->u.tmf.comp); 2158 tm_iocb->u.tmf.flags = arg->flags; 2159 tm_iocb->u.tmf.lun = arg->lun; 2160 2161 START_SP_W_RETRIES(sp, rval); 2162 2163 ql_dbg(ql_dbg_taskm, vha, 0x802f, 2164 "Async-tmf hdl=%x loop-id=%x portid=%06x ctrl=%x lun=%lld qp=%d rval=%x.\n", 2165 sp->handle, fcport->loop_id, fcport->d_id.b24, 2166 arg->flags, arg->lun, sp->qpair->id, rval); 2167 2168 if (rval != QLA_SUCCESS) 2169 goto done_free_sp; 2170 wait_for_completion(&tm_iocb->u.tmf.comp); 2171 2172 rval = tm_iocb->u.tmf.data; 2173 2174 if (rval != QLA_SUCCESS) { 2175 ql_log(ql_log_warn, vha, 0x8030, 2176 "TM IOCB failed (%x).\n", rval); 2177 } 2178 2179 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) 2180 rval = qla26xx_marker(arg); 2181 2182 done_free_sp: 2183 /* ref: INIT */ 2184 kref_put(&sp->cmd_kref, qla2x00_sp_release); 2185 done: 2186 return rval; 2187 } 2188 2189 static void qla_put_tmf(fc_port_t *fcport) 2190 { 2191 struct scsi_qla_host *vha = fcport->vha; 2192 struct qla_hw_data *ha = vha->hw; 2193 unsigned long flags; 2194 2195 spin_lock_irqsave(&ha->tgt.sess_lock, flags); 2196 fcport->active_tmf--; 2197 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); 2198 } 2199 2200 static 2201 int qla_get_tmf(fc_port_t *fcport) 2202 { 2203 struct scsi_qla_host *vha = fcport->vha; 2204 struct qla_hw_data *ha = vha->hw; 2205 unsigned long flags; 2206 int rc = 0; 2207 LIST_HEAD(tmf_elem); 2208 2209 spin_lock_irqsave(&ha->tgt.sess_lock, flags); 2210 list_add_tail(&tmf_elem, &fcport->tmf_pending); 2211 2212 while (fcport->active_tmf >= MAX_ACTIVE_TMF) { 2213 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); 2214 2215 msleep(1); 2216 2217 spin_lock_irqsave(&ha->tgt.sess_lock, flags); 2218 if (TMF_NOT_READY(fcport)) { 2219 ql_log(ql_log_warn, vha, 0x802c, 2220 "Unable to acquire TM resource due to disruption.\n"); 2221 rc = EIO; 2222 break; 2223 } 2224 if (fcport->active_tmf < MAX_ACTIVE_TMF && 2225 list_is_first(&tmf_elem, &fcport->tmf_pending)) 2226 break; 2227 } 2228 2229 list_del(&tmf_elem); 2230 2231 if (!rc) 2232 fcport->active_tmf++; 2233 2234 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); 2235 2236 return rc; 2237 } 2238 2239 int 2240 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint64_t lun, 2241 uint32_t tag) 2242 { 2243 struct scsi_qla_host *vha = fcport->vha; 2244 struct qla_qpair *qpair; 2245 struct tmf_arg a; 2246 int i, rval = QLA_SUCCESS; 2247 2248 if (TMF_NOT_READY(fcport)) 2249 return QLA_SUSPENDED; 2250 2251 a.vha = fcport->vha; 2252 a.fcport = fcport; 2253 a.lun = lun; 2254 if (flags & (TCF_LUN_RESET|TCF_ABORT_TASK_SET|TCF_CLEAR_TASK_SET|TCF_CLEAR_ACA)) { 2255 a.modifier = MK_SYNC_ID_LUN; 2256 2257 if (qla_get_tmf(fcport)) 2258 return QLA_FUNCTION_FAILED; 2259 } else { 2260 a.modifier = MK_SYNC_ID; 2261 } 2262 2263 if (vha->hw->mqenable) { 2264 for (i = 0; i < vha->hw->num_qpairs; i++) { 2265 qpair = vha->hw->queue_pair_map[i]; 2266 if (!qpair) 2267 continue; 2268 2269 if (TMF_NOT_READY(fcport)) { 2270 ql_log(ql_log_warn, vha, 0x8026, 2271 "Unable to send TM due to disruption.\n"); 2272 rval = QLA_SUSPENDED; 2273 break; 2274 } 2275 2276 a.qpair = qpair; 2277 a.flags = flags|TCF_NOTMCMD_TO_TARGET; 2278 rval = __qla2x00_async_tm_cmd(&a); 2279 if (rval) 2280 break; 2281 } 2282 } 2283 2284 if (rval) 2285 goto bailout; 2286 2287 a.qpair = vha->hw->base_qpair; 2288 a.flags = flags; 2289 rval = __qla2x00_async_tm_cmd(&a); 2290 2291 bailout: 2292 if (a.modifier == MK_SYNC_ID_LUN) 2293 qla_put_tmf(fcport); 2294 2295 return rval; 2296 } 2297 2298 int 2299 qla24xx_async_abort_command(srb_t *sp) 2300 { 2301 unsigned long flags = 0; 2302 2303 uint32_t handle; 2304 fc_port_t *fcport = sp->fcport; 2305 struct qla_qpair *qpair = sp->qpair; 2306 struct scsi_qla_host *vha = fcport->vha; 2307 struct req_que *req = qpair->req; 2308 2309 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 2310 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 2311 if (req->outstanding_cmds[handle] == sp) 2312 break; 2313 } 2314 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 2315 2316 if (handle == req->num_outstanding_cmds) { 2317 /* Command not found. */ 2318 return QLA_ERR_NOT_FOUND; 2319 } 2320 if (sp->type == SRB_FXIOCB_DCMD) 2321 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 2322 FXDISC_ABORT_IOCTL); 2323 2324 return qla24xx_async_abort_cmd(sp, true); 2325 } 2326 2327 static void 2328 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2329 { 2330 struct srb *sp; 2331 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2332 ea->data[0]); 2333 2334 switch (ea->data[0]) { 2335 case MBS_COMMAND_COMPLETE: 2336 ql_dbg(ql_dbg_disc, vha, 0x2118, 2337 "%s %d %8phC post gpdb\n", 2338 __func__, __LINE__, ea->fcport->port_name); 2339 2340 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2341 ea->fcport->logout_on_delete = 1; 2342 ea->fcport->nvme_prli_service_param = ea->iop[0]; 2343 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 2344 ea->fcport->nvme_first_burst_size = 2345 (ea->iop[1] & 0xffff) * 512; 2346 else 2347 ea->fcport->nvme_first_burst_size = 0; 2348 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2349 break; 2350 default: 2351 sp = ea->sp; 2352 ql_dbg(ql_dbg_disc, vha, 0x2118, 2353 "%s %d %8phC priority %s, fc4type %x prev try %s\n", 2354 __func__, __LINE__, ea->fcport->port_name, 2355 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ? 2356 "FCP" : "NVMe", ea->fcport->fc4_type, 2357 (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ? 2358 "NVME" : "FCP"); 2359 2360 if (NVME_FCP_TARGET(ea->fcport)) { 2361 if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) 2362 ea->fcport->do_prli_nvme = 0; 2363 else 2364 ea->fcport->do_prli_nvme = 1; 2365 } else { 2366 ea->fcport->do_prli_nvme = 0; 2367 } 2368 2369 if (N2N_TOPO(vha->hw)) { 2370 if (ea->fcport->n2n_link_reset_cnt == 2371 vha->hw->login_retry_count && 2372 ea->fcport->flags & FCF_FCSP_DEVICE) { 2373 /* remote authentication app just started */ 2374 ea->fcport->n2n_link_reset_cnt = 0; 2375 } 2376 2377 if (ea->fcport->n2n_link_reset_cnt < 2378 vha->hw->login_retry_count) { 2379 ea->fcport->n2n_link_reset_cnt++; 2380 vha->relogin_jif = jiffies + 2 * HZ; 2381 /* 2382 * PRLI failed. Reset link to kick start 2383 * state machine 2384 */ 2385 set_bit(N2N_LINK_RESET, &vha->dpc_flags); 2386 qla2xxx_wake_dpc(vha); 2387 } else { 2388 ql_log(ql_log_warn, vha, 0x2119, 2389 "%s %d %8phC Unable to reconnect\n", 2390 __func__, __LINE__, 2391 ea->fcport->port_name); 2392 } 2393 } else { 2394 /* 2395 * switch connect. login failed. Take connection down 2396 * and allow relogin to retrigger 2397 */ 2398 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2399 ea->fcport->keep_nport_handle = 0; 2400 ea->fcport->logout_on_delete = 1; 2401 qlt_schedule_sess_for_deletion(ea->fcport); 2402 } 2403 break; 2404 } 2405 } 2406 2407 void 2408 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2409 { 2410 port_id_t cid; /* conflict Nport id */ 2411 u16 lid; 2412 struct fc_port *conflict_fcport; 2413 unsigned long flags; 2414 struct fc_port *fcport = ea->fcport; 2415 2416 ql_dbg(ql_dbg_disc, vha, 0xffff, 2417 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 2418 __func__, fcport->port_name, fcport->disc_state, 2419 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 2420 ea->sp->gen1, fcport->rscn_gen, 2421 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 2422 2423 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 2424 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 2425 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2426 "%s %d %8phC Remote is trying to login\n", 2427 __func__, __LINE__, fcport->port_name); 2428 return; 2429 } 2430 2431 if ((fcport->disc_state == DSC_DELETE_PEND) || 2432 (fcport->disc_state == DSC_DELETED)) { 2433 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2434 return; 2435 } 2436 2437 if (ea->sp->gen2 != fcport->login_gen) { 2438 /* target side must have changed it. */ 2439 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2440 "%s %8phC generation changed\n", 2441 __func__, fcport->port_name); 2442 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2443 return; 2444 } else if (ea->sp->gen1 != fcport->rscn_gen) { 2445 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2446 "%s %8phC RSCN generation changed\n", 2447 __func__, fcport->port_name); 2448 qla_rscn_replay(fcport); 2449 qlt_schedule_sess_for_deletion(fcport); 2450 return; 2451 } 2452 2453 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2454 ea->data[0]); 2455 2456 switch (ea->data[0]) { 2457 case MBS_COMMAND_COMPLETE: 2458 /* 2459 * Driver must validate login state - If PRLI not complete, 2460 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 2461 * requests. 2462 */ 2463 if (vha->hw->flags.edif_enabled) { 2464 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2465 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2466 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2467 ea->fcport->logout_on_delete = 1; 2468 ea->fcport->send_els_logo = 0; 2469 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 2470 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2471 2472 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2473 } else { 2474 if (NVME_TARGET(vha->hw, fcport)) { 2475 ql_dbg(ql_dbg_disc, vha, 0x2117, 2476 "%s %d %8phC post prli\n", 2477 __func__, __LINE__, fcport->port_name); 2478 qla24xx_post_prli_work(vha, fcport); 2479 } else { 2480 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2481 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n", 2482 __func__, __LINE__, fcport->port_name, 2483 fcport->loop_id, fcport->d_id.b24); 2484 2485 set_bit(fcport->loop_id, vha->hw->loop_id_map); 2486 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2487 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2488 fcport->logout_on_delete = 1; 2489 fcport->send_els_logo = 0; 2490 fcport->fw_login_state = DSC_LS_PRLI_COMP; 2491 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2492 2493 qla24xx_post_gpdb_work(vha, fcport, 0); 2494 } 2495 } 2496 break; 2497 case MBS_COMMAND_ERROR: 2498 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2499 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2500 2501 qlt_schedule_sess_for_deletion(ea->fcport); 2502 break; 2503 case MBS_LOOP_ID_USED: 2504 /* data[1] = IO PARAM 1 = nport ID */ 2505 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2506 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2507 cid.b.al_pa = ea->iop[1] & 0xff; 2508 cid.b.rsvd_1 = 0; 2509 2510 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2511 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2512 __func__, __LINE__, ea->fcport->port_name, 2513 ea->fcport->loop_id, cid.b24); 2514 2515 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2516 ea->fcport->loop_id = FC_NO_LOOP_ID; 2517 qla24xx_post_gnl_work(vha, ea->fcport); 2518 break; 2519 case MBS_PORT_ID_USED: 2520 lid = ea->iop[1] & 0xffff; 2521 qlt_find_sess_invalidate_other(vha, 2522 wwn_to_u64(ea->fcport->port_name), 2523 ea->fcport->d_id, lid, &conflict_fcport); 2524 2525 if (conflict_fcport) { 2526 /* 2527 * Another fcport share the same loop_id/nport id. 2528 * Conflict fcport needs to finish cleanup before this 2529 * fcport can proceed to login. 2530 */ 2531 conflict_fcport->conflict = ea->fcport; 2532 ea->fcport->login_pause = 1; 2533 2534 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2535 "%s %d %8phC NPortId %06x inuse with loopid 0x%x.\n", 2536 __func__, __LINE__, ea->fcport->port_name, 2537 ea->fcport->d_id.b24, lid); 2538 } else { 2539 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2540 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2541 __func__, __LINE__, ea->fcport->port_name, 2542 ea->fcport->d_id.b24, lid); 2543 2544 qla2x00_clear_loop_id(ea->fcport); 2545 set_bit(lid, vha->hw->loop_id_map); 2546 ea->fcport->loop_id = lid; 2547 ea->fcport->keep_nport_handle = 0; 2548 ea->fcport->logout_on_delete = 1; 2549 qlt_schedule_sess_for_deletion(ea->fcport); 2550 } 2551 break; 2552 } 2553 return; 2554 } 2555 2556 /****************************************************************************/ 2557 /* QLogic ISP2x00 Hardware Support Functions. */ 2558 /****************************************************************************/ 2559 2560 static int 2561 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2562 { 2563 int rval = QLA_SUCCESS; 2564 struct qla_hw_data *ha = vha->hw; 2565 uint32_t idc_major_ver, idc_minor_ver; 2566 uint16_t config[4]; 2567 2568 qla83xx_idc_lock(vha, 0); 2569 2570 /* SV: TODO: Assign initialization timeout from 2571 * flash-info / other param 2572 */ 2573 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2574 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2575 2576 /* Set our fcoe function presence */ 2577 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2578 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2579 "Error while setting DRV-Presence.\n"); 2580 rval = QLA_FUNCTION_FAILED; 2581 goto exit; 2582 } 2583 2584 /* Decide the reset ownership */ 2585 qla83xx_reset_ownership(vha); 2586 2587 /* 2588 * On first protocol driver load: 2589 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2590 * register. 2591 * Others: Check compatibility with current IDC Major version. 2592 */ 2593 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2594 if (ha->flags.nic_core_reset_owner) { 2595 /* Set IDC Major version */ 2596 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2597 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2598 2599 /* Clearing IDC-Lock-Recovery register */ 2600 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2601 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2602 /* 2603 * Clear further IDC participation if we are not compatible with 2604 * the current IDC Major Version. 2605 */ 2606 ql_log(ql_log_warn, vha, 0xb07d, 2607 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2608 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2609 __qla83xx_clear_drv_presence(vha); 2610 rval = QLA_FUNCTION_FAILED; 2611 goto exit; 2612 } 2613 /* Each function sets its supported Minor version. */ 2614 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2615 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2616 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2617 2618 if (ha->flags.nic_core_reset_owner) { 2619 memset(config, 0, sizeof(config)); 2620 if (!qla81xx_get_port_config(vha, config)) 2621 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2622 QLA8XXX_DEV_READY); 2623 } 2624 2625 rval = qla83xx_idc_state_handler(vha); 2626 2627 exit: 2628 qla83xx_idc_unlock(vha, 0); 2629 2630 return rval; 2631 } 2632 2633 /* 2634 * qla2x00_initialize_adapter 2635 * Initialize board. 2636 * 2637 * Input: 2638 * ha = adapter block pointer. 2639 * 2640 * Returns: 2641 * 0 = success 2642 */ 2643 int 2644 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2645 { 2646 int rval; 2647 struct qla_hw_data *ha = vha->hw; 2648 struct req_que *req = ha->req_q_map[0]; 2649 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2650 2651 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2652 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2653 2654 /* Clear adapter flags. */ 2655 vha->flags.online = 0; 2656 ha->flags.chip_reset_done = 0; 2657 vha->flags.reset_active = 0; 2658 ha->flags.pci_channel_io_perm_failure = 0; 2659 ha->flags.eeh_busy = 0; 2660 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2661 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2662 atomic_set(&vha->loop_state, LOOP_DOWN); 2663 vha->device_flags = DFLG_NO_CABLE; 2664 vha->dpc_flags = 0; 2665 vha->flags.management_server_logged_in = 0; 2666 vha->marker_needed = 0; 2667 ha->isp_abort_cnt = 0; 2668 ha->beacon_blink_led = 0; 2669 2670 set_bit(0, ha->req_qid_map); 2671 set_bit(0, ha->rsp_qid_map); 2672 2673 ql_dbg(ql_dbg_init, vha, 0x0040, 2674 "Configuring PCI space...\n"); 2675 rval = ha->isp_ops->pci_config(vha); 2676 if (rval) { 2677 ql_log(ql_log_warn, vha, 0x0044, 2678 "Unable to configure PCI space.\n"); 2679 return (rval); 2680 } 2681 2682 ha->isp_ops->reset_chip(vha); 2683 2684 /* Check for secure flash support */ 2685 if (IS_QLA28XX(ha)) { 2686 if (rd_reg_word(®->mailbox12) & BIT_0) 2687 ha->flags.secure_adapter = 1; 2688 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n", 2689 (ha->flags.secure_adapter) ? "Yes" : "No"); 2690 } 2691 2692 2693 rval = qla2xxx_get_flash_info(vha); 2694 if (rval) { 2695 ql_log(ql_log_fatal, vha, 0x004f, 2696 "Unable to validate FLASH data.\n"); 2697 return rval; 2698 } 2699 2700 if (IS_QLA8044(ha)) { 2701 qla8044_read_reset_template(vha); 2702 2703 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2704 * If DONRESET_BIT0 is set, drivers should not set dev_state 2705 * to NEED_RESET. But if NEED_RESET is set, drivers should 2706 * should honor the reset. */ 2707 if (ql2xdontresethba == 1) 2708 qla8044_set_idc_dontreset(vha); 2709 } 2710 2711 ha->isp_ops->get_flash_version(vha, req->ring); 2712 ql_dbg(ql_dbg_init, vha, 0x0061, 2713 "Configure NVRAM parameters...\n"); 2714 2715 /* Let priority default to FCP, can be overridden by nvram_config */ 2716 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2717 2718 ha->isp_ops->nvram_config(vha); 2719 2720 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2721 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2722 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2723 2724 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2725 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2726 2727 if (ha->flags.disable_serdes) { 2728 /* Mask HBA via NVRAM settings? */ 2729 ql_log(ql_log_info, vha, 0x0077, 2730 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2731 return QLA_FUNCTION_FAILED; 2732 } 2733 2734 ql_dbg(ql_dbg_init, vha, 0x0078, 2735 "Verifying loaded RISC code...\n"); 2736 2737 /* If smartsan enabled then require fdmi and rdp enabled */ 2738 if (ql2xsmartsan) { 2739 ql2xfdmienable = 1; 2740 ql2xrdpenable = 1; 2741 } 2742 2743 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2744 rval = ha->isp_ops->chip_diag(vha); 2745 if (rval) 2746 return (rval); 2747 rval = qla2x00_setup_chip(vha); 2748 if (rval) 2749 return (rval); 2750 } 2751 2752 if (IS_QLA84XX(ha)) { 2753 ha->cs84xx = qla84xx_get_chip(vha); 2754 if (!ha->cs84xx) { 2755 ql_log(ql_log_warn, vha, 0x00d0, 2756 "Unable to configure ISP84XX.\n"); 2757 return QLA_FUNCTION_FAILED; 2758 } 2759 } 2760 2761 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2762 rval = qla2x00_init_rings(vha); 2763 2764 /* No point in continuing if firmware initialization failed. */ 2765 if (rval != QLA_SUCCESS) 2766 return rval; 2767 2768 ha->flags.chip_reset_done = 1; 2769 2770 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2771 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2772 rval = qla84xx_init_chip(vha); 2773 if (rval != QLA_SUCCESS) { 2774 ql_log(ql_log_warn, vha, 0x00d4, 2775 "Unable to initialize ISP84XX.\n"); 2776 qla84xx_put_chip(vha); 2777 } 2778 } 2779 2780 /* Load the NIC Core f/w if we are the first protocol driver. */ 2781 if (IS_QLA8031(ha)) { 2782 rval = qla83xx_nic_core_fw_load(vha); 2783 if (rval) 2784 ql_log(ql_log_warn, vha, 0x0124, 2785 "Error in initializing NIC Core f/w.\n"); 2786 } 2787 2788 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2789 qla24xx_read_fcp_prio_cfg(vha); 2790 2791 if (IS_P3P_TYPE(ha)) 2792 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2793 else 2794 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2795 2796 return (rval); 2797 } 2798 2799 /** 2800 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2801 * @vha: HA context 2802 * 2803 * Returns 0 on success. 2804 */ 2805 int 2806 qla2100_pci_config(scsi_qla_host_t *vha) 2807 { 2808 uint16_t w; 2809 unsigned long flags; 2810 struct qla_hw_data *ha = vha->hw; 2811 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2812 2813 pci_set_master(ha->pdev); 2814 pci_try_set_mwi(ha->pdev); 2815 2816 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2817 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2818 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2819 2820 pci_disable_rom(ha->pdev); 2821 2822 /* Get PCI bus information. */ 2823 spin_lock_irqsave(&ha->hardware_lock, flags); 2824 ha->pci_attr = rd_reg_word(®->ctrl_status); 2825 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2826 2827 return QLA_SUCCESS; 2828 } 2829 2830 /** 2831 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2832 * @vha: HA context 2833 * 2834 * Returns 0 on success. 2835 */ 2836 int 2837 qla2300_pci_config(scsi_qla_host_t *vha) 2838 { 2839 uint16_t w; 2840 unsigned long flags = 0; 2841 uint32_t cnt; 2842 struct qla_hw_data *ha = vha->hw; 2843 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2844 2845 pci_set_master(ha->pdev); 2846 pci_try_set_mwi(ha->pdev); 2847 2848 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2849 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2850 2851 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2852 w &= ~PCI_COMMAND_INTX_DISABLE; 2853 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2854 2855 /* 2856 * If this is a 2300 card and not 2312, reset the 2857 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2858 * the 2310 also reports itself as a 2300 so we need to get the 2859 * fb revision level -- a 6 indicates it really is a 2300 and 2860 * not a 2310. 2861 */ 2862 if (IS_QLA2300(ha)) { 2863 spin_lock_irqsave(&ha->hardware_lock, flags); 2864 2865 /* Pause RISC. */ 2866 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2867 for (cnt = 0; cnt < 30000; cnt++) { 2868 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) 2869 break; 2870 2871 udelay(10); 2872 } 2873 2874 /* Select FPM registers. */ 2875 wrt_reg_word(®->ctrl_status, 0x20); 2876 rd_reg_word(®->ctrl_status); 2877 2878 /* Get the fb rev level */ 2879 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2880 2881 if (ha->fb_rev == FPM_2300) 2882 pci_clear_mwi(ha->pdev); 2883 2884 /* Deselect FPM registers. */ 2885 wrt_reg_word(®->ctrl_status, 0x0); 2886 rd_reg_word(®->ctrl_status); 2887 2888 /* Release RISC module. */ 2889 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2890 for (cnt = 0; cnt < 30000; cnt++) { 2891 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0) 2892 break; 2893 2894 udelay(10); 2895 } 2896 2897 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2898 } 2899 2900 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2901 2902 pci_disable_rom(ha->pdev); 2903 2904 /* Get PCI bus information. */ 2905 spin_lock_irqsave(&ha->hardware_lock, flags); 2906 ha->pci_attr = rd_reg_word(®->ctrl_status); 2907 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2908 2909 return QLA_SUCCESS; 2910 } 2911 2912 /** 2913 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2914 * @vha: HA context 2915 * 2916 * Returns 0 on success. 2917 */ 2918 int 2919 qla24xx_pci_config(scsi_qla_host_t *vha) 2920 { 2921 uint16_t w; 2922 unsigned long flags = 0; 2923 struct qla_hw_data *ha = vha->hw; 2924 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2925 2926 pci_set_master(ha->pdev); 2927 pci_try_set_mwi(ha->pdev); 2928 2929 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2930 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2931 w &= ~PCI_COMMAND_INTX_DISABLE; 2932 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2933 2934 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2935 2936 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2937 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2938 pcix_set_mmrbc(ha->pdev, 2048); 2939 2940 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2941 if (pci_is_pcie(ha->pdev)) 2942 pcie_set_readrq(ha->pdev, 4096); 2943 2944 pci_disable_rom(ha->pdev); 2945 2946 ha->chip_revision = ha->pdev->revision; 2947 2948 /* Get PCI bus information. */ 2949 spin_lock_irqsave(&ha->hardware_lock, flags); 2950 ha->pci_attr = rd_reg_dword(®->ctrl_status); 2951 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2952 2953 return QLA_SUCCESS; 2954 } 2955 2956 /** 2957 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2958 * @vha: HA context 2959 * 2960 * Returns 0 on success. 2961 */ 2962 int 2963 qla25xx_pci_config(scsi_qla_host_t *vha) 2964 { 2965 uint16_t w; 2966 struct qla_hw_data *ha = vha->hw; 2967 2968 pci_set_master(ha->pdev); 2969 pci_try_set_mwi(ha->pdev); 2970 2971 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2972 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2973 w &= ~PCI_COMMAND_INTX_DISABLE; 2974 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2975 2976 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2977 if (pci_is_pcie(ha->pdev)) 2978 pcie_set_readrq(ha->pdev, 4096); 2979 2980 pci_disable_rom(ha->pdev); 2981 2982 ha->chip_revision = ha->pdev->revision; 2983 2984 return QLA_SUCCESS; 2985 } 2986 2987 /** 2988 * qla2x00_isp_firmware() - Choose firmware image. 2989 * @vha: HA context 2990 * 2991 * Returns 0 on success. 2992 */ 2993 static int 2994 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2995 { 2996 int rval; 2997 uint16_t loop_id, topo, sw_cap; 2998 uint8_t domain, area, al_pa; 2999 struct qla_hw_data *ha = vha->hw; 3000 3001 /* Assume loading risc code */ 3002 rval = QLA_FUNCTION_FAILED; 3003 3004 if (ha->flags.disable_risc_code_load) { 3005 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 3006 3007 /* Verify checksum of loaded RISC code. */ 3008 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 3009 if (rval == QLA_SUCCESS) { 3010 /* And, verify we are not in ROM code. */ 3011 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 3012 &area, &domain, &topo, &sw_cap); 3013 } 3014 } 3015 3016 if (rval) 3017 ql_dbg(ql_dbg_init, vha, 0x007a, 3018 "**** Load RISC code ****.\n"); 3019 3020 return (rval); 3021 } 3022 3023 /** 3024 * qla2x00_reset_chip() - Reset ISP chip. 3025 * @vha: HA context 3026 * 3027 * Returns 0 on success. 3028 */ 3029 int 3030 qla2x00_reset_chip(scsi_qla_host_t *vha) 3031 { 3032 unsigned long flags = 0; 3033 struct qla_hw_data *ha = vha->hw; 3034 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3035 uint32_t cnt; 3036 uint16_t cmd; 3037 int rval = QLA_FUNCTION_FAILED; 3038 3039 if (unlikely(pci_channel_offline(ha->pdev))) 3040 return rval; 3041 3042 ha->isp_ops->disable_intrs(ha); 3043 3044 spin_lock_irqsave(&ha->hardware_lock, flags); 3045 3046 /* Turn off master enable */ 3047 cmd = 0; 3048 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 3049 cmd &= ~PCI_COMMAND_MASTER; 3050 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 3051 3052 if (!IS_QLA2100(ha)) { 3053 /* Pause RISC. */ 3054 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 3055 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 3056 for (cnt = 0; cnt < 30000; cnt++) { 3057 if ((rd_reg_word(®->hccr) & 3058 HCCR_RISC_PAUSE) != 0) 3059 break; 3060 udelay(100); 3061 } 3062 } else { 3063 rd_reg_word(®->hccr); /* PCI Posting. */ 3064 udelay(10); 3065 } 3066 3067 /* Select FPM registers. */ 3068 wrt_reg_word(®->ctrl_status, 0x20); 3069 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 3070 3071 /* FPM Soft Reset. */ 3072 wrt_reg_word(®->fpm_diag_config, 0x100); 3073 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 3074 3075 /* Toggle Fpm Reset. */ 3076 if (!IS_QLA2200(ha)) { 3077 wrt_reg_word(®->fpm_diag_config, 0x0); 3078 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 3079 } 3080 3081 /* Select frame buffer registers. */ 3082 wrt_reg_word(®->ctrl_status, 0x10); 3083 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 3084 3085 /* Reset frame buffer FIFOs. */ 3086 if (IS_QLA2200(ha)) { 3087 WRT_FB_CMD_REG(ha, reg, 0xa000); 3088 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 3089 } else { 3090 WRT_FB_CMD_REG(ha, reg, 0x00fc); 3091 3092 /* Read back fb_cmd until zero or 3 seconds max */ 3093 for (cnt = 0; cnt < 3000; cnt++) { 3094 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 3095 break; 3096 udelay(100); 3097 } 3098 } 3099 3100 /* Select RISC module registers. */ 3101 wrt_reg_word(®->ctrl_status, 0); 3102 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 3103 3104 /* Reset RISC processor. */ 3105 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3106 rd_reg_word(®->hccr); /* PCI Posting. */ 3107 3108 /* Release RISC processor. */ 3109 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3110 rd_reg_word(®->hccr); /* PCI Posting. */ 3111 } 3112 3113 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 3114 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT); 3115 3116 /* Reset ISP chip. */ 3117 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 3118 3119 /* Wait for RISC to recover from reset. */ 3120 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3121 /* 3122 * It is necessary to for a delay here since the card doesn't 3123 * respond to PCI reads during a reset. On some architectures 3124 * this will result in an MCA. 3125 */ 3126 udelay(20); 3127 for (cnt = 30000; cnt; cnt--) { 3128 if ((rd_reg_word(®->ctrl_status) & 3129 CSR_ISP_SOFT_RESET) == 0) 3130 break; 3131 udelay(100); 3132 } 3133 } else 3134 udelay(10); 3135 3136 /* Reset RISC processor. */ 3137 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3138 3139 wrt_reg_word(®->semaphore, 0); 3140 3141 /* Release RISC processor. */ 3142 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3143 rd_reg_word(®->hccr); /* PCI Posting. */ 3144 3145 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3146 for (cnt = 0; cnt < 30000; cnt++) { 3147 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 3148 break; 3149 3150 udelay(100); 3151 } 3152 } else 3153 udelay(100); 3154 3155 /* Turn on master enable */ 3156 cmd |= PCI_COMMAND_MASTER; 3157 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 3158 3159 /* Disable RISC pause on FPM parity error. */ 3160 if (!IS_QLA2100(ha)) { 3161 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 3162 rd_reg_word(®->hccr); /* PCI Posting. */ 3163 } 3164 3165 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3166 3167 return QLA_SUCCESS; 3168 } 3169 3170 /** 3171 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 3172 * @vha: HA context 3173 * 3174 * Returns 0 on success. 3175 */ 3176 static int 3177 qla81xx_reset_mpi(scsi_qla_host_t *vha) 3178 { 3179 uint16_t mb[4] = {0x1010, 0, 1, 0}; 3180 3181 if (!IS_QLA81XX(vha->hw)) 3182 return QLA_SUCCESS; 3183 3184 return qla81xx_write_mpi_register(vha, mb); 3185 } 3186 3187 static int 3188 qla_chk_risc_recovery(scsi_qla_host_t *vha) 3189 { 3190 struct qla_hw_data *ha = vha->hw; 3191 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3192 __le16 __iomem *mbptr = ®->mailbox0; 3193 int i; 3194 u16 mb[32]; 3195 int rc = QLA_SUCCESS; 3196 3197 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3198 return rc; 3199 3200 /* this check is only valid after RISC reset */ 3201 mb[0] = rd_reg_word(mbptr); 3202 mbptr++; 3203 if (mb[0] == 0xf) { 3204 rc = QLA_FUNCTION_FAILED; 3205 3206 for (i = 1; i < 32; i++) { 3207 mb[i] = rd_reg_word(mbptr); 3208 mbptr++; 3209 } 3210 3211 ql_log(ql_log_warn, vha, 0x1015, 3212 "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3213 mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]); 3214 ql_log(ql_log_warn, vha, 0x1015, 3215 "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3216 mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14], 3217 mb[15]); 3218 ql_log(ql_log_warn, vha, 0x1015, 3219 "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3220 mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22], 3221 mb[23]); 3222 ql_log(ql_log_warn, vha, 0x1015, 3223 "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3224 mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30], 3225 mb[31]); 3226 } 3227 return rc; 3228 } 3229 3230 /** 3231 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 3232 * @vha: HA context 3233 * 3234 * Returns 0 on success. 3235 */ 3236 static inline int 3237 qla24xx_reset_risc(scsi_qla_host_t *vha) 3238 { 3239 unsigned long flags = 0; 3240 struct qla_hw_data *ha = vha->hw; 3241 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3242 uint32_t cnt; 3243 uint16_t wd; 3244 static int abts_cnt; /* ISP abort retry counts */ 3245 int rval = QLA_SUCCESS; 3246 int print = 1; 3247 3248 spin_lock_irqsave(&ha->hardware_lock, flags); 3249 3250 /* Reset RISC. */ 3251 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3252 for (cnt = 0; cnt < 30000; cnt++) { 3253 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 3254 break; 3255 3256 udelay(10); 3257 } 3258 3259 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)) 3260 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 3261 3262 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 3263 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 3264 rd_reg_dword(®->hccr), 3265 rd_reg_dword(®->ctrl_status), 3266 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)); 3267 3268 wrt_reg_dword(®->ctrl_status, 3269 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3270 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 3271 3272 udelay(100); 3273 3274 /* Wait for firmware to complete NVRAM accesses. */ 3275 rd_reg_word(®->mailbox0); 3276 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 && 3277 rval == QLA_SUCCESS; cnt--) { 3278 barrier(); 3279 if (cnt) 3280 udelay(5); 3281 else 3282 rval = QLA_FUNCTION_TIMEOUT; 3283 } 3284 3285 if (rval == QLA_SUCCESS) 3286 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 3287 3288 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 3289 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 3290 rd_reg_dword(®->hccr), 3291 rd_reg_word(®->mailbox0)); 3292 3293 /* Wait for soft-reset to complete. */ 3294 rd_reg_dword(®->ctrl_status); 3295 for (cnt = 0; cnt < 60; cnt++) { 3296 barrier(); 3297 if ((rd_reg_dword(®->ctrl_status) & 3298 CSRX_ISP_SOFT_RESET) == 0) 3299 break; 3300 3301 udelay(5); 3302 } 3303 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 3304 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 3305 3306 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 3307 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 3308 rd_reg_dword(®->hccr), 3309 rd_reg_dword(®->ctrl_status)); 3310 3311 /* If required, do an MPI FW reset now */ 3312 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 3313 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 3314 if (++abts_cnt < 5) { 3315 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3316 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 3317 } else { 3318 /* 3319 * We exhausted the ISP abort retries. We have to 3320 * set the board offline. 3321 */ 3322 abts_cnt = 0; 3323 vha->flags.online = 0; 3324 } 3325 } 3326 } 3327 3328 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 3329 rd_reg_dword(®->hccr); 3330 3331 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 3332 rd_reg_dword(®->hccr); 3333 3334 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET); 3335 mdelay(10); 3336 rd_reg_dword(®->hccr); 3337 3338 wd = rd_reg_word(®->mailbox0); 3339 for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) { 3340 barrier(); 3341 if (cnt) { 3342 mdelay(1); 3343 if (print && qla_chk_risc_recovery(vha)) 3344 print = 0; 3345 3346 wd = rd_reg_word(®->mailbox0); 3347 } else { 3348 rval = QLA_FUNCTION_TIMEOUT; 3349 3350 ql_log(ql_log_warn, vha, 0x015e, 3351 "RISC reset timeout\n"); 3352 } 3353 } 3354 3355 if (rval == QLA_SUCCESS) 3356 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 3357 3358 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 3359 "Host Risc 0x%x, mailbox0 0x%x\n", 3360 rd_reg_dword(®->hccr), 3361 rd_reg_word(®->mailbox0)); 3362 3363 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3364 3365 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 3366 "Driver in %s mode\n", 3367 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 3368 3369 if (IS_NOPOLLING_TYPE(ha)) 3370 ha->isp_ops->enable_intrs(ha); 3371 3372 return rval; 3373 } 3374 3375 static void 3376 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 3377 { 3378 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3379 3380 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3381 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET); 3382 } 3383 3384 static void 3385 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 3386 { 3387 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3388 3389 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3390 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); 3391 } 3392 3393 static void 3394 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 3395 { 3396 uint32_t wd32 = 0; 3397 uint delta_msec = 100; 3398 uint elapsed_msec = 0; 3399 uint timeout_msec; 3400 ulong n; 3401 3402 if (vha->hw->pdev->subsystem_device != 0x0175 && 3403 vha->hw->pdev->subsystem_device != 0x0240) 3404 return; 3405 3406 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 3407 udelay(100); 3408 3409 attempt: 3410 timeout_msec = TIMEOUT_SEMAPHORE; 3411 n = timeout_msec / delta_msec; 3412 while (n--) { 3413 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 3414 qla25xx_read_risc_sema_reg(vha, &wd32); 3415 if (wd32 & RISC_SEMAPHORE) 3416 break; 3417 msleep(delta_msec); 3418 elapsed_msec += delta_msec; 3419 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3420 goto force; 3421 } 3422 3423 if (!(wd32 & RISC_SEMAPHORE)) 3424 goto force; 3425 3426 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3427 goto acquired; 3428 3429 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 3430 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 3431 n = timeout_msec / delta_msec; 3432 while (n--) { 3433 qla25xx_read_risc_sema_reg(vha, &wd32); 3434 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3435 break; 3436 msleep(delta_msec); 3437 elapsed_msec += delta_msec; 3438 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3439 goto force; 3440 } 3441 3442 if (wd32 & RISC_SEMAPHORE_FORCE) 3443 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 3444 3445 goto attempt; 3446 3447 force: 3448 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 3449 3450 acquired: 3451 return; 3452 } 3453 3454 /** 3455 * qla24xx_reset_chip() - Reset ISP24xx chip. 3456 * @vha: HA context 3457 * 3458 * Returns 0 on success. 3459 */ 3460 int 3461 qla24xx_reset_chip(scsi_qla_host_t *vha) 3462 { 3463 struct qla_hw_data *ha = vha->hw; 3464 int rval = QLA_FUNCTION_FAILED; 3465 3466 if (pci_channel_offline(ha->pdev) && 3467 ha->flags.pci_channel_io_perm_failure) { 3468 return rval; 3469 } 3470 3471 ha->isp_ops->disable_intrs(ha); 3472 3473 qla25xx_manipulate_risc_semaphore(vha); 3474 3475 /* Perform RISC reset. */ 3476 rval = qla24xx_reset_risc(vha); 3477 3478 return rval; 3479 } 3480 3481 /** 3482 * qla2x00_chip_diag() - Test chip for proper operation. 3483 * @vha: HA context 3484 * 3485 * Returns 0 on success. 3486 */ 3487 int 3488 qla2x00_chip_diag(scsi_qla_host_t *vha) 3489 { 3490 int rval; 3491 struct qla_hw_data *ha = vha->hw; 3492 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3493 unsigned long flags = 0; 3494 uint16_t data; 3495 uint32_t cnt; 3496 uint16_t mb[5]; 3497 struct req_que *req = ha->req_q_map[0]; 3498 3499 /* Assume a failed state */ 3500 rval = QLA_FUNCTION_FAILED; 3501 3502 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 3503 ®->flash_address); 3504 3505 spin_lock_irqsave(&ha->hardware_lock, flags); 3506 3507 /* Reset ISP chip. */ 3508 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 3509 3510 /* 3511 * We need to have a delay here since the card will not respond while 3512 * in reset causing an MCA on some architectures. 3513 */ 3514 udelay(20); 3515 data = qla2x00_debounce_register(®->ctrl_status); 3516 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 3517 udelay(5); 3518 data = rd_reg_word(®->ctrl_status); 3519 barrier(); 3520 } 3521 3522 if (!cnt) 3523 goto chip_diag_failed; 3524 3525 ql_dbg(ql_dbg_init, vha, 0x007c, 3526 "Reset register cleared by chip reset.\n"); 3527 3528 /* Reset RISC processor. */ 3529 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3530 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3531 3532 /* Workaround for QLA2312 PCI parity error */ 3533 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3534 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 3535 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 3536 udelay(5); 3537 data = RD_MAILBOX_REG(ha, reg, 0); 3538 barrier(); 3539 } 3540 } else 3541 udelay(10); 3542 3543 if (!cnt) 3544 goto chip_diag_failed; 3545 3546 /* Check product ID of chip */ 3547 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3548 3549 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3550 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3551 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3552 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3553 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3554 mb[3] != PROD_ID_3) { 3555 ql_log(ql_log_warn, vha, 0x0062, 3556 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3557 mb[1], mb[2], mb[3]); 3558 3559 goto chip_diag_failed; 3560 } 3561 ha->product_id[0] = mb[1]; 3562 ha->product_id[1] = mb[2]; 3563 ha->product_id[2] = mb[3]; 3564 ha->product_id[3] = mb[4]; 3565 3566 /* Adjust fw RISC transfer size */ 3567 if (req->length > 1024) 3568 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3569 else 3570 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3571 req->length; 3572 3573 if (IS_QLA2200(ha) && 3574 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3575 /* Limit firmware transfer size with a 2200A */ 3576 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3577 3578 ha->device_type |= DT_ISP2200A; 3579 ha->fw_transfer_size = 128; 3580 } 3581 3582 /* Wrap Incoming Mailboxes Test. */ 3583 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3584 3585 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3586 rval = qla2x00_mbx_reg_test(vha); 3587 if (rval) 3588 ql_log(ql_log_warn, vha, 0x0080, 3589 "Failed mailbox send register test.\n"); 3590 else 3591 /* Flag a successful rval */ 3592 rval = QLA_SUCCESS; 3593 spin_lock_irqsave(&ha->hardware_lock, flags); 3594 3595 chip_diag_failed: 3596 if (rval) 3597 ql_log(ql_log_info, vha, 0x0081, 3598 "Chip diagnostics **** FAILED ****.\n"); 3599 3600 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3601 3602 return (rval); 3603 } 3604 3605 /** 3606 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3607 * @vha: HA context 3608 * 3609 * Returns 0 on success. 3610 */ 3611 int 3612 qla24xx_chip_diag(scsi_qla_host_t *vha) 3613 { 3614 int rval; 3615 struct qla_hw_data *ha = vha->hw; 3616 struct req_que *req = ha->req_q_map[0]; 3617 3618 if (IS_P3P_TYPE(ha)) 3619 return QLA_SUCCESS; 3620 3621 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3622 3623 rval = qla2x00_mbx_reg_test(vha); 3624 if (rval) { 3625 ql_log(ql_log_warn, vha, 0x0082, 3626 "Failed mailbox send register test.\n"); 3627 } else { 3628 /* Flag a successful rval */ 3629 rval = QLA_SUCCESS; 3630 } 3631 3632 return rval; 3633 } 3634 3635 static void 3636 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3637 { 3638 int rval; 3639 dma_addr_t tc_dma; 3640 void *tc; 3641 struct qla_hw_data *ha = vha->hw; 3642 3643 if (!IS_FWI2_CAPABLE(ha)) 3644 return; 3645 3646 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3647 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3648 return; 3649 3650 if (ha->fce) { 3651 ql_dbg(ql_dbg_init, vha, 0x00bd, 3652 "%s: FCE Mem is already allocated.\n", 3653 __func__); 3654 return; 3655 } 3656 3657 /* Allocate memory for Fibre Channel Event Buffer. */ 3658 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3659 GFP_KERNEL); 3660 if (!tc) { 3661 ql_log(ql_log_warn, vha, 0x00be, 3662 "Unable to allocate (%d KB) for FCE.\n", 3663 FCE_SIZE / 1024); 3664 return; 3665 } 3666 3667 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3668 ha->fce_mb, &ha->fce_bufs); 3669 if (rval) { 3670 ql_log(ql_log_warn, vha, 0x00bf, 3671 "Unable to initialize FCE (%d).\n", rval); 3672 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3673 return; 3674 } 3675 3676 ql_dbg(ql_dbg_init, vha, 0x00c0, 3677 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3678 3679 ha->flags.fce_enabled = 1; 3680 ha->fce_dma = tc_dma; 3681 ha->fce = tc; 3682 } 3683 3684 static void 3685 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3686 { 3687 int rval; 3688 dma_addr_t tc_dma; 3689 void *tc; 3690 struct qla_hw_data *ha = vha->hw; 3691 3692 if (!IS_FWI2_CAPABLE(ha)) 3693 return; 3694 3695 if (ha->eft) { 3696 ql_dbg(ql_dbg_init, vha, 0x00bd, 3697 "%s: EFT Mem is already allocated.\n", 3698 __func__); 3699 return; 3700 } 3701 3702 /* Allocate memory for Extended Trace Buffer. */ 3703 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3704 GFP_KERNEL); 3705 if (!tc) { 3706 ql_log(ql_log_warn, vha, 0x00c1, 3707 "Unable to allocate (%d KB) for EFT.\n", 3708 EFT_SIZE / 1024); 3709 return; 3710 } 3711 3712 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3713 if (rval) { 3714 ql_log(ql_log_warn, vha, 0x00c2, 3715 "Unable to initialize EFT (%d).\n", rval); 3716 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3717 return; 3718 } 3719 3720 ql_dbg(ql_dbg_init, vha, 0x00c3, 3721 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3722 3723 ha->eft_dma = tc_dma; 3724 ha->eft = tc; 3725 } 3726 3727 static void 3728 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3729 { 3730 qla2x00_init_fce_trace(vha); 3731 qla2x00_init_eft_trace(vha); 3732 } 3733 3734 void 3735 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3736 { 3737 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3738 eft_size, fce_size, mq_size; 3739 struct qla_hw_data *ha = vha->hw; 3740 struct req_que *req = ha->req_q_map[0]; 3741 struct rsp_que *rsp = ha->rsp_q_map[0]; 3742 struct qla2xxx_fw_dump *fw_dump; 3743 3744 if (ha->fw_dump) { 3745 ql_dbg(ql_dbg_init, vha, 0x00bd, 3746 "Firmware dump already allocated.\n"); 3747 return; 3748 } 3749 3750 ha->fw_dumped = 0; 3751 ha->fw_dump_cap_flags = 0; 3752 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3753 req_q_size = rsp_q_size = 0; 3754 3755 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3756 fixed_size = sizeof(struct qla2100_fw_dump); 3757 } else if (IS_QLA23XX(ha)) { 3758 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3759 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3760 sizeof(uint16_t); 3761 } else if (IS_FWI2_CAPABLE(ha)) { 3762 if (IS_QLA83XX(ha)) 3763 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3764 else if (IS_QLA81XX(ha)) 3765 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3766 else if (IS_QLA25XX(ha)) 3767 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3768 else 3769 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3770 3771 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3772 sizeof(uint32_t); 3773 if (ha->mqenable) { 3774 if (!IS_QLA83XX(ha)) 3775 mq_size = sizeof(struct qla2xxx_mq_chain); 3776 /* 3777 * Allocate maximum buffer size for all queues - Q0. 3778 * Resizing must be done at end-of-dump processing. 3779 */ 3780 mq_size += (ha->max_req_queues - 1) * 3781 (req->length * sizeof(request_t)); 3782 mq_size += (ha->max_rsp_queues - 1) * 3783 (rsp->length * sizeof(response_t)); 3784 } 3785 if (ha->tgt.atio_ring) 3786 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3787 3788 qla2x00_init_fce_trace(vha); 3789 if (ha->fce) 3790 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3791 qla2x00_init_eft_trace(vha); 3792 if (ha->eft) 3793 eft_size = EFT_SIZE; 3794 } 3795 3796 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3797 struct fwdt *fwdt = ha->fwdt; 3798 uint j; 3799 3800 for (j = 0; j < 2; j++, fwdt++) { 3801 if (!fwdt->template) { 3802 ql_dbg(ql_dbg_init, vha, 0x00ba, 3803 "-> fwdt%u no template\n", j); 3804 continue; 3805 } 3806 ql_dbg(ql_dbg_init, vha, 0x00fa, 3807 "-> fwdt%u calculating fwdump size...\n", j); 3808 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3809 vha, fwdt->template); 3810 ql_dbg(ql_dbg_init, vha, 0x00fa, 3811 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3812 j, fwdt->dump_size); 3813 dump_size += fwdt->dump_size; 3814 } 3815 /* Add space for spare MPI fw dump. */ 3816 dump_size += ha->fwdt[1].dump_size; 3817 } else { 3818 req_q_size = req->length * sizeof(request_t); 3819 rsp_q_size = rsp->length * sizeof(response_t); 3820 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3821 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3822 + eft_size; 3823 ha->chain_offset = dump_size; 3824 dump_size += mq_size + fce_size; 3825 if (ha->exchoffld_buf) 3826 dump_size += sizeof(struct qla2xxx_offld_chain) + 3827 ha->exchoffld_size; 3828 if (ha->exlogin_buf) 3829 dump_size += sizeof(struct qla2xxx_offld_chain) + 3830 ha->exlogin_size; 3831 } 3832 3833 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3834 3835 ql_dbg(ql_dbg_init, vha, 0x00c5, 3836 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3837 __func__, dump_size, ha->fw_dump_len, 3838 ha->fw_dump_alloc_len); 3839 3840 fw_dump = vmalloc(dump_size); 3841 if (!fw_dump) { 3842 ql_log(ql_log_warn, vha, 0x00c4, 3843 "Unable to allocate (%d KB) for firmware dump.\n", 3844 dump_size / 1024); 3845 } else { 3846 mutex_lock(&ha->optrom_mutex); 3847 if (ha->fw_dumped) { 3848 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3849 vfree(ha->fw_dump); 3850 ha->fw_dump = fw_dump; 3851 ha->fw_dump_alloc_len = dump_size; 3852 ql_dbg(ql_dbg_init, vha, 0x00c5, 3853 "Re-Allocated (%d KB) and save firmware dump.\n", 3854 dump_size / 1024); 3855 } else { 3856 vfree(ha->fw_dump); 3857 ha->fw_dump = fw_dump; 3858 3859 ha->fw_dump_len = ha->fw_dump_alloc_len = 3860 dump_size; 3861 ql_dbg(ql_dbg_init, vha, 0x00c5, 3862 "Allocated (%d KB) for firmware dump.\n", 3863 dump_size / 1024); 3864 3865 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3866 ha->mpi_fw_dump = (char *)fw_dump + 3867 ha->fwdt[1].dump_size; 3868 mutex_unlock(&ha->optrom_mutex); 3869 return; 3870 } 3871 3872 ha->fw_dump->signature[0] = 'Q'; 3873 ha->fw_dump->signature[1] = 'L'; 3874 ha->fw_dump->signature[2] = 'G'; 3875 ha->fw_dump->signature[3] = 'C'; 3876 ha->fw_dump->version = htonl(1); 3877 3878 ha->fw_dump->fixed_size = htonl(fixed_size); 3879 ha->fw_dump->mem_size = htonl(mem_size); 3880 ha->fw_dump->req_q_size = htonl(req_q_size); 3881 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3882 3883 ha->fw_dump->eft_size = htonl(eft_size); 3884 ha->fw_dump->eft_addr_l = 3885 htonl(LSD(ha->eft_dma)); 3886 ha->fw_dump->eft_addr_h = 3887 htonl(MSD(ha->eft_dma)); 3888 3889 ha->fw_dump->header_size = 3890 htonl(offsetof 3891 (struct qla2xxx_fw_dump, isp)); 3892 } 3893 mutex_unlock(&ha->optrom_mutex); 3894 } 3895 } 3896 } 3897 3898 static int 3899 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3900 { 3901 #define MPS_MASK 0xe0 3902 int rval; 3903 uint16_t dc; 3904 uint32_t dw; 3905 3906 if (!IS_QLA81XX(vha->hw)) 3907 return QLA_SUCCESS; 3908 3909 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3910 if (rval != QLA_SUCCESS) { 3911 ql_log(ql_log_warn, vha, 0x0105, 3912 "Unable to acquire semaphore.\n"); 3913 goto done; 3914 } 3915 3916 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3917 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3918 if (rval != QLA_SUCCESS) { 3919 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3920 goto done_release; 3921 } 3922 3923 dc &= MPS_MASK; 3924 if (dc == (dw & MPS_MASK)) 3925 goto done_release; 3926 3927 dw &= ~MPS_MASK; 3928 dw |= dc; 3929 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3930 if (rval != QLA_SUCCESS) { 3931 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3932 } 3933 3934 done_release: 3935 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3936 if (rval != QLA_SUCCESS) { 3937 ql_log(ql_log_warn, vha, 0x006d, 3938 "Unable to release semaphore.\n"); 3939 } 3940 3941 done: 3942 return rval; 3943 } 3944 3945 int 3946 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3947 { 3948 /* Don't try to reallocate the array */ 3949 if (req->outstanding_cmds) 3950 return QLA_SUCCESS; 3951 3952 if (!IS_FWI2_CAPABLE(ha)) 3953 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3954 else { 3955 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3956 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3957 else 3958 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3959 } 3960 3961 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3962 sizeof(srb_t *), 3963 GFP_KERNEL); 3964 3965 if (!req->outstanding_cmds) { 3966 /* 3967 * Try to allocate a minimal size just so we can get through 3968 * initialization. 3969 */ 3970 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3971 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3972 sizeof(srb_t *), 3973 GFP_KERNEL); 3974 3975 if (!req->outstanding_cmds) { 3976 ql_log(ql_log_fatal, NULL, 0x0126, 3977 "Failed to allocate memory for " 3978 "outstanding_cmds for req_que %p.\n", req); 3979 req->num_outstanding_cmds = 0; 3980 return QLA_FUNCTION_FAILED; 3981 } 3982 } 3983 3984 return QLA_SUCCESS; 3985 } 3986 3987 #define PRINT_FIELD(_field, _flag, _str) { \ 3988 if (a0->_field & _flag) {\ 3989 if (p) {\ 3990 strcat(ptr, "|");\ 3991 ptr++;\ 3992 leftover--;\ 3993 } \ 3994 len = snprintf(ptr, leftover, "%s", _str); \ 3995 p = 1;\ 3996 leftover -= len;\ 3997 ptr += len; \ 3998 } \ 3999 } 4000 4001 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 4002 { 4003 #define STR_LEN 64 4004 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 4005 u8 str[STR_LEN], *ptr, p; 4006 int leftover, len; 4007 4008 memset(str, 0, STR_LEN); 4009 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 4010 ql_dbg(ql_dbg_init, vha, 0x015a, 4011 "SFP MFG Name: %s\n", str); 4012 4013 memset(str, 0, STR_LEN); 4014 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 4015 ql_dbg(ql_dbg_init, vha, 0x015c, 4016 "SFP Part Name: %s\n", str); 4017 4018 /* media */ 4019 memset(str, 0, STR_LEN); 4020 ptr = str; 4021 leftover = STR_LEN; 4022 p = len = 0; 4023 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 4024 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 4025 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 4026 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 4027 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 4028 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 4029 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 4030 ql_dbg(ql_dbg_init, vha, 0x0160, 4031 "SFP Media: %s\n", str); 4032 4033 /* link length */ 4034 memset(str, 0, STR_LEN); 4035 ptr = str; 4036 leftover = STR_LEN; 4037 p = len = 0; 4038 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 4039 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 4040 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 4041 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 4042 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 4043 ql_dbg(ql_dbg_init, vha, 0x0196, 4044 "SFP Link Length: %s\n", str); 4045 4046 memset(str, 0, STR_LEN); 4047 ptr = str; 4048 leftover = STR_LEN; 4049 p = len = 0; 4050 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 4051 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 4052 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 4053 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 4054 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 4055 ql_dbg(ql_dbg_init, vha, 0x016e, 4056 "SFP FC Link Tech: %s\n", str); 4057 4058 if (a0->length_km) 4059 ql_dbg(ql_dbg_init, vha, 0x016f, 4060 "SFP Distant: %d km\n", a0->length_km); 4061 if (a0->length_100m) 4062 ql_dbg(ql_dbg_init, vha, 0x0170, 4063 "SFP Distant: %d m\n", a0->length_100m*100); 4064 if (a0->length_50um_10m) 4065 ql_dbg(ql_dbg_init, vha, 0x0189, 4066 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 4067 if (a0->length_62um_10m) 4068 ql_dbg(ql_dbg_init, vha, 0x018a, 4069 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 4070 if (a0->length_om4_10m) 4071 ql_dbg(ql_dbg_init, vha, 0x0194, 4072 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 4073 if (a0->length_om3_10m) 4074 ql_dbg(ql_dbg_init, vha, 0x0195, 4075 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 4076 } 4077 4078 4079 /** 4080 * qla24xx_detect_sfp() 4081 * 4082 * @vha: adapter state pointer. 4083 * 4084 * @return 4085 * 0 -- Configure firmware to use short-range settings -- normal 4086 * buffer-to-buffer credits. 4087 * 4088 * 1 -- Configure firmware to use long-range settings -- extra 4089 * buffer-to-buffer credits should be allocated with 4090 * ha->lr_distance containing distance settings from NVRAM or SFP 4091 * (if supported). 4092 */ 4093 int 4094 qla24xx_detect_sfp(scsi_qla_host_t *vha) 4095 { 4096 int rc, used_nvram; 4097 struct sff_8247_a0 *a; 4098 struct qla_hw_data *ha = vha->hw; 4099 struct nvram_81xx *nv = ha->nvram; 4100 #define LR_DISTANCE_UNKNOWN 2 4101 static const char * const types[] = { "Short", "Long" }; 4102 static const char * const lengths[] = { "(10km)", "(5km)", "" }; 4103 u8 ll = 0; 4104 4105 /* Seed with NVRAM settings. */ 4106 used_nvram = 0; 4107 ha->flags.lr_detected = 0; 4108 if (IS_BPM_RANGE_CAPABLE(ha) && 4109 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) { 4110 used_nvram = 1; 4111 ha->flags.lr_detected = 1; 4112 ha->lr_distance = 4113 (nv->enhanced_features >> LR_DIST_NV_POS) 4114 & LR_DIST_NV_MASK; 4115 } 4116 4117 if (!IS_BPM_ENABLED(vha)) 4118 goto out; 4119 /* Determine SR/LR capabilities of SFP/Transceiver. */ 4120 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 4121 if (rc) 4122 goto out; 4123 4124 used_nvram = 0; 4125 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 4126 qla2xxx_print_sfp_info(vha); 4127 4128 ha->flags.lr_detected = 0; 4129 ll = a->fc_ll_cc7; 4130 if (ll & FC_LL_VL || ll & FC_LL_L) { 4131 /* Long range, track length. */ 4132 ha->flags.lr_detected = 1; 4133 4134 if (a->length_km > 5 || a->length_100m > 50) 4135 ha->lr_distance = LR_DISTANCE_10K; 4136 else 4137 ha->lr_distance = LR_DISTANCE_5K; 4138 } 4139 4140 out: 4141 ql_dbg(ql_dbg_async, vha, 0x507b, 4142 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n", 4143 types[ha->flags.lr_detected], 4144 ha->flags.lr_detected ? lengths[ha->lr_distance] : 4145 lengths[LR_DISTANCE_UNKNOWN], 4146 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance); 4147 return ha->flags.lr_detected; 4148 } 4149 4150 void qla_init_iocb_limit(scsi_qla_host_t *vha) 4151 { 4152 u16 i, num_qps; 4153 u32 limit; 4154 struct qla_hw_data *ha = vha->hw; 4155 4156 num_qps = ha->num_qpairs + 1; 4157 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100; 4158 4159 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count; 4160 ha->base_qpair->fwres.iocbs_limit = limit; 4161 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps; 4162 ha->base_qpair->fwres.iocbs_used = 0; 4163 4164 ha->base_qpair->fwres.exch_total = ha->orig_fw_xcb_count; 4165 ha->base_qpair->fwres.exch_limit = (ha->orig_fw_xcb_count * 4166 QLA_IOCB_PCT_LIMIT) / 100; 4167 ha->base_qpair->fwres.exch_used = 0; 4168 4169 for (i = 0; i < ha->max_qpairs; i++) { 4170 if (ha->queue_pair_map[i]) { 4171 ha->queue_pair_map[i]->fwres.iocbs_total = 4172 ha->orig_fw_iocb_count; 4173 ha->queue_pair_map[i]->fwres.iocbs_limit = limit; 4174 ha->queue_pair_map[i]->fwres.iocbs_qp_limit = 4175 limit / num_qps; 4176 ha->queue_pair_map[i]->fwres.iocbs_used = 0; 4177 ha->queue_pair_map[i]->fwres.exch_total = ha->orig_fw_xcb_count; 4178 ha->queue_pair_map[i]->fwres.exch_limit = 4179 (ha->orig_fw_xcb_count * QLA_IOCB_PCT_LIMIT) / 100; 4180 ha->queue_pair_map[i]->fwres.exch_used = 0; 4181 } 4182 } 4183 } 4184 4185 /** 4186 * qla2x00_setup_chip() - Load and start RISC firmware. 4187 * @vha: HA context 4188 * 4189 * Returns 0 on success. 4190 */ 4191 static int 4192 qla2x00_setup_chip(scsi_qla_host_t *vha) 4193 { 4194 int rval; 4195 uint32_t srisc_address = 0; 4196 struct qla_hw_data *ha = vha->hw; 4197 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4198 unsigned long flags; 4199 uint16_t fw_major_version; 4200 int done_once = 0; 4201 4202 if (IS_P3P_TYPE(ha)) { 4203 rval = ha->isp_ops->load_risc(vha, &srisc_address); 4204 if (rval == QLA_SUCCESS) { 4205 qla2x00_stop_firmware(vha); 4206 goto enable_82xx_npiv; 4207 } else 4208 goto failed; 4209 } 4210 4211 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 4212 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 4213 spin_lock_irqsave(&ha->hardware_lock, flags); 4214 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 4215 rd_reg_word(®->hccr); 4216 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4217 } 4218 4219 qla81xx_mpi_sync(vha); 4220 4221 execute_fw_with_lr: 4222 /* Load firmware sequences */ 4223 rval = ha->isp_ops->load_risc(vha, &srisc_address); 4224 if (rval == QLA_SUCCESS) { 4225 ql_dbg(ql_dbg_init, vha, 0x00c9, 4226 "Verifying Checksum of loaded RISC code.\n"); 4227 4228 rval = qla2x00_verify_checksum(vha, srisc_address); 4229 if (rval == QLA_SUCCESS) { 4230 /* Start firmware execution. */ 4231 ql_dbg(ql_dbg_init, vha, 0x00ca, 4232 "Starting firmware.\n"); 4233 4234 if (ql2xexlogins) 4235 ha->flags.exlogins_enabled = 1; 4236 4237 if (qla_is_exch_offld_enabled(vha)) 4238 ha->flags.exchoffld_enabled = 1; 4239 4240 rval = qla2x00_execute_fw(vha, srisc_address); 4241 /* Retrieve firmware information. */ 4242 if (rval == QLA_SUCCESS) { 4243 /* Enable BPM support? */ 4244 if (!done_once++ && qla24xx_detect_sfp(vha)) { 4245 ql_dbg(ql_dbg_init, vha, 0x00ca, 4246 "Re-starting firmware -- BPM.\n"); 4247 /* Best-effort - re-init. */ 4248 ha->isp_ops->reset_chip(vha); 4249 ha->isp_ops->chip_diag(vha); 4250 goto execute_fw_with_lr; 4251 } 4252 4253 if (IS_ZIO_THRESHOLD_CAPABLE(ha)) 4254 qla27xx_set_zio_threshold(vha, 4255 ha->last_zio_threshold); 4256 4257 rval = qla2x00_set_exlogins_buffer(vha); 4258 if (rval != QLA_SUCCESS) 4259 goto failed; 4260 4261 rval = qla2x00_set_exchoffld_buffer(vha); 4262 if (rval != QLA_SUCCESS) 4263 goto failed; 4264 4265 enable_82xx_npiv: 4266 fw_major_version = ha->fw_major_version; 4267 if (IS_P3P_TYPE(ha)) 4268 qla82xx_check_md_needed(vha); 4269 else 4270 rval = qla2x00_get_fw_version(vha); 4271 if (rval != QLA_SUCCESS) 4272 goto failed; 4273 ha->flags.npiv_supported = 0; 4274 if (IS_QLA2XXX_MIDTYPE(ha) && 4275 (ha->fw_attributes & BIT_2)) { 4276 ha->flags.npiv_supported = 1; 4277 if ((!ha->max_npiv_vports) || 4278 ((ha->max_npiv_vports + 1) % 4279 MIN_MULTI_ID_FABRIC)) 4280 ha->max_npiv_vports = 4281 MIN_MULTI_ID_FABRIC - 1; 4282 } 4283 qla2x00_get_resource_cnts(vha); 4284 qla_init_iocb_limit(vha); 4285 4286 /* 4287 * Allocate the array of outstanding commands 4288 * now that we know the firmware resources. 4289 */ 4290 rval = qla2x00_alloc_outstanding_cmds(ha, 4291 vha->req); 4292 if (rval != QLA_SUCCESS) 4293 goto failed; 4294 4295 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 4296 qla2x00_alloc_offload_mem(vha); 4297 4298 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 4299 qla2x00_alloc_fw_dump(vha); 4300 4301 } else { 4302 goto failed; 4303 } 4304 } else { 4305 ql_log(ql_log_fatal, vha, 0x00cd, 4306 "ISP Firmware failed checksum.\n"); 4307 goto failed; 4308 } 4309 4310 /* Enable PUREX PASSTHRU */ 4311 if (ql2xrdpenable || ha->flags.scm_supported_f || 4312 ha->flags.edif_enabled) 4313 qla25xx_set_els_cmds_supported(vha); 4314 } else 4315 goto failed; 4316 4317 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 4318 /* Enable proper parity. */ 4319 spin_lock_irqsave(&ha->hardware_lock, flags); 4320 if (IS_QLA2300(ha)) 4321 /* SRAM parity */ 4322 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1); 4323 else 4324 /* SRAM, Instruction RAM and GP RAM parity */ 4325 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7); 4326 rd_reg_word(®->hccr); 4327 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4328 } 4329 4330 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 4331 ha->flags.fac_supported = 1; 4332 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 4333 uint32_t size; 4334 4335 rval = qla81xx_fac_get_sector_size(vha, &size); 4336 if (rval == QLA_SUCCESS) { 4337 ha->flags.fac_supported = 1; 4338 ha->fdt_block_size = size << 2; 4339 } else { 4340 ql_log(ql_log_warn, vha, 0x00ce, 4341 "Unsupported FAC firmware (%d.%02d.%02d).\n", 4342 ha->fw_major_version, ha->fw_minor_version, 4343 ha->fw_subminor_version); 4344 4345 if (IS_QLA83XX(ha)) { 4346 ha->flags.fac_supported = 0; 4347 rval = QLA_SUCCESS; 4348 } 4349 } 4350 } 4351 failed: 4352 if (rval) { 4353 ql_log(ql_log_fatal, vha, 0x00cf, 4354 "Setup chip ****FAILED****.\n"); 4355 } 4356 4357 return (rval); 4358 } 4359 4360 /** 4361 * qla2x00_init_response_q_entries() - Initializes response queue entries. 4362 * @rsp: response queue 4363 * 4364 * Beginning of request ring has initialization control block already built 4365 * by nvram config routine. 4366 * 4367 * Returns 0 on success. 4368 */ 4369 void 4370 qla2x00_init_response_q_entries(struct rsp_que *rsp) 4371 { 4372 uint16_t cnt; 4373 response_t *pkt; 4374 4375 rsp->ring_ptr = rsp->ring; 4376 rsp->ring_index = 0; 4377 rsp->status_srb = NULL; 4378 pkt = rsp->ring_ptr; 4379 for (cnt = 0; cnt < rsp->length; cnt++) { 4380 pkt->signature = RESPONSE_PROCESSED; 4381 pkt++; 4382 } 4383 } 4384 4385 /** 4386 * qla2x00_update_fw_options() - Read and process firmware options. 4387 * @vha: HA context 4388 * 4389 * Returns 0 on success. 4390 */ 4391 void 4392 qla2x00_update_fw_options(scsi_qla_host_t *vha) 4393 { 4394 uint16_t swing, emphasis, tx_sens, rx_sens; 4395 struct qla_hw_data *ha = vha->hw; 4396 4397 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 4398 qla2x00_get_fw_options(vha, ha->fw_options); 4399 4400 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4401 return; 4402 4403 /* Serial Link options. */ 4404 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 4405 "Serial link options.\n"); 4406 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 4407 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 4408 4409 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 4410 if (ha->fw_seriallink_options[3] & BIT_2) { 4411 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 4412 4413 /* 1G settings */ 4414 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 4415 emphasis = (ha->fw_seriallink_options[2] & 4416 (BIT_4 | BIT_3)) >> 3; 4417 tx_sens = ha->fw_seriallink_options[0] & 4418 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4419 rx_sens = (ha->fw_seriallink_options[0] & 4420 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4421 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 4422 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4423 if (rx_sens == 0x0) 4424 rx_sens = 0x3; 4425 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 4426 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4427 ha->fw_options[10] |= BIT_5 | 4428 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4429 (tx_sens & (BIT_1 | BIT_0)); 4430 4431 /* 2G settings */ 4432 swing = (ha->fw_seriallink_options[2] & 4433 (BIT_7 | BIT_6 | BIT_5)) >> 5; 4434 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 4435 tx_sens = ha->fw_seriallink_options[1] & 4436 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4437 rx_sens = (ha->fw_seriallink_options[1] & 4438 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4439 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 4440 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4441 if (rx_sens == 0x0) 4442 rx_sens = 0x3; 4443 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 4444 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4445 ha->fw_options[11] |= BIT_5 | 4446 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4447 (tx_sens & (BIT_1 | BIT_0)); 4448 } 4449 4450 /* FCP2 options. */ 4451 /* Return command IOCBs without waiting for an ABTS to complete. */ 4452 ha->fw_options[3] |= BIT_13; 4453 4454 /* LED scheme. */ 4455 if (ha->flags.enable_led_scheme) 4456 ha->fw_options[2] |= BIT_12; 4457 4458 /* Detect ISP6312. */ 4459 if (IS_QLA6312(ha)) 4460 ha->fw_options[2] |= BIT_13; 4461 4462 /* Set Retry FLOGI in case of P2P connection */ 4463 if (ha->operating_mode == P2P) { 4464 ha->fw_options[2] |= BIT_3; 4465 ql_dbg(ql_dbg_disc, vha, 0x2100, 4466 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4467 __func__, ha->fw_options[2]); 4468 } 4469 4470 /* Update firmware options. */ 4471 qla2x00_set_fw_options(vha, ha->fw_options); 4472 } 4473 4474 void 4475 qla24xx_update_fw_options(scsi_qla_host_t *vha) 4476 { 4477 int rval; 4478 struct qla_hw_data *ha = vha->hw; 4479 4480 if (IS_P3P_TYPE(ha)) 4481 return; 4482 4483 /* Hold status IOCBs until ABTS response received. */ 4484 if (ql2xfwholdabts) 4485 ha->fw_options[3] |= BIT_12; 4486 4487 /* Set Retry FLOGI in case of P2P connection */ 4488 if (ha->operating_mode == P2P) { 4489 ha->fw_options[2] |= BIT_3; 4490 ql_dbg(ql_dbg_disc, vha, 0x2101, 4491 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4492 __func__, ha->fw_options[2]); 4493 } 4494 4495 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 4496 if (ql2xmvasynctoatio && !ha->flags.edif_enabled && 4497 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 4498 if (qla_tgt_mode_enabled(vha) || 4499 qla_dual_mode_enabled(vha)) 4500 ha->fw_options[2] |= BIT_11; 4501 else 4502 ha->fw_options[2] &= ~BIT_11; 4503 } 4504 4505 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4506 IS_QLA28XX(ha)) { 4507 /* 4508 * Tell FW to track each exchange to prevent 4509 * driver from using stale exchange. 4510 */ 4511 if (qla_tgt_mode_enabled(vha) || 4512 qla_dual_mode_enabled(vha)) 4513 ha->fw_options[2] |= BIT_4; 4514 else 4515 ha->fw_options[2] &= ~(BIT_4); 4516 4517 /* Reserve 1/2 of emergency exchanges for ELS.*/ 4518 if (qla2xuseresexchforels) 4519 ha->fw_options[2] |= BIT_8; 4520 else 4521 ha->fw_options[2] &= ~BIT_8; 4522 4523 /* 4524 * N2N: set Secure=1 for PLOGI ACC and 4525 * fw shal not send PRLI after PLOGI Acc 4526 */ 4527 if (ha->flags.edif_enabled && 4528 DBELL_ACTIVE(vha)) { 4529 ha->fw_options[3] |= BIT_15; 4530 ha->flags.n2n_fw_acc_sec = 1; 4531 } else { 4532 ha->fw_options[3] &= ~BIT_15; 4533 ha->flags.n2n_fw_acc_sec = 0; 4534 } 4535 } 4536 4537 if (ql2xrdpenable || ha->flags.scm_supported_f || 4538 ha->flags.edif_enabled) 4539 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB; 4540 4541 /* Enable Async 8130/8131 events -- transceiver insertion/removal */ 4542 if (IS_BPM_RANGE_CAPABLE(ha)) 4543 ha->fw_options[3] |= BIT_10; 4544 4545 ql_dbg(ql_dbg_init, vha, 0x00e8, 4546 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 4547 __func__, ha->fw_options[1], ha->fw_options[2], 4548 ha->fw_options[3], vha->host->active_mode); 4549 4550 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 4551 qla2x00_set_fw_options(vha, ha->fw_options); 4552 4553 /* Update Serial Link options. */ 4554 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 4555 return; 4556 4557 rval = qla2x00_set_serdes_params(vha, 4558 le16_to_cpu(ha->fw_seriallink_options24[1]), 4559 le16_to_cpu(ha->fw_seriallink_options24[2]), 4560 le16_to_cpu(ha->fw_seriallink_options24[3])); 4561 if (rval != QLA_SUCCESS) { 4562 ql_log(ql_log_warn, vha, 0x0104, 4563 "Unable to update Serial Link options (%x).\n", rval); 4564 } 4565 } 4566 4567 void 4568 qla2x00_config_rings(struct scsi_qla_host *vha) 4569 { 4570 struct qla_hw_data *ha = vha->hw; 4571 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4572 struct req_que *req = ha->req_q_map[0]; 4573 struct rsp_que *rsp = ha->rsp_q_map[0]; 4574 4575 /* Setup ring parameters in initialization control block. */ 4576 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 4577 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 4578 ha->init_cb->request_q_length = cpu_to_le16(req->length); 4579 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 4580 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 4581 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 4582 4583 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0); 4584 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0); 4585 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0); 4586 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0); 4587 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 4588 } 4589 4590 void 4591 qla24xx_config_rings(struct scsi_qla_host *vha) 4592 { 4593 struct qla_hw_data *ha = vha->hw; 4594 device_reg_t *reg = ISP_QUE_REG(ha, 0); 4595 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 4596 struct qla_msix_entry *msix; 4597 struct init_cb_24xx *icb; 4598 uint16_t rid = 0; 4599 struct req_que *req = ha->req_q_map[0]; 4600 struct rsp_que *rsp = ha->rsp_q_map[0]; 4601 4602 /* Setup ring parameters in initialization control block. */ 4603 icb = (struct init_cb_24xx *)ha->init_cb; 4604 icb->request_q_outpointer = cpu_to_le16(0); 4605 icb->response_q_inpointer = cpu_to_le16(0); 4606 icb->request_q_length = cpu_to_le16(req->length); 4607 icb->response_q_length = cpu_to_le16(rsp->length); 4608 put_unaligned_le64(req->dma, &icb->request_q_address); 4609 put_unaligned_le64(rsp->dma, &icb->response_q_address); 4610 4611 /* Setup ATIO queue dma pointers for target mode */ 4612 icb->atio_q_inpointer = cpu_to_le16(0); 4613 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 4614 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 4615 4616 if (IS_SHADOW_REG_CAPABLE(ha)) 4617 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 4618 4619 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4620 IS_QLA28XX(ha)) { 4621 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 4622 icb->rid = cpu_to_le16(rid); 4623 if (ha->flags.msix_enabled) { 4624 msix = &ha->msix_entries[1]; 4625 ql_dbg(ql_dbg_init, vha, 0x0019, 4626 "Registering vector 0x%x for base que.\n", 4627 msix->entry); 4628 icb->msix = cpu_to_le16(msix->entry); 4629 } 4630 /* Use alternate PCI bus number */ 4631 if (MSB(rid)) 4632 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 4633 /* Use alternate PCI devfn */ 4634 if (LSB(rid)) 4635 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 4636 4637 /* Use Disable MSIX Handshake mode for capable adapters */ 4638 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 4639 (ha->flags.msix_enabled)) { 4640 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 4641 ha->flags.disable_msix_handshake = 1; 4642 ql_dbg(ql_dbg_init, vha, 0x00fe, 4643 "MSIX Handshake Disable Mode turned on.\n"); 4644 } else { 4645 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 4646 } 4647 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4648 4649 wrt_reg_dword(®->isp25mq.req_q_in, 0); 4650 wrt_reg_dword(®->isp25mq.req_q_out, 0); 4651 wrt_reg_dword(®->isp25mq.rsp_q_in, 0); 4652 wrt_reg_dword(®->isp25mq.rsp_q_out, 0); 4653 } else { 4654 wrt_reg_dword(®->isp24.req_q_in, 0); 4655 wrt_reg_dword(®->isp24.req_q_out, 0); 4656 wrt_reg_dword(®->isp24.rsp_q_in, 0); 4657 wrt_reg_dword(®->isp24.rsp_q_out, 0); 4658 } 4659 4660 qlt_24xx_config_rings(vha); 4661 4662 /* If the user has configured the speed, set it here */ 4663 if (ha->set_data_rate) { 4664 ql_dbg(ql_dbg_init, vha, 0x00fd, 4665 "Speed set by user : %s Gbps \n", 4666 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4667 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13); 4668 } 4669 4670 /* PCI posting */ 4671 rd_reg_word(&ioreg->hccr); 4672 } 4673 4674 /** 4675 * qla2x00_init_rings() - Initializes firmware. 4676 * @vha: HA context 4677 * 4678 * Beginning of request ring has initialization control block already built 4679 * by nvram config routine. 4680 * 4681 * Returns 0 on success. 4682 */ 4683 int 4684 qla2x00_init_rings(scsi_qla_host_t *vha) 4685 { 4686 int rval; 4687 unsigned long flags = 0; 4688 int cnt, que; 4689 struct qla_hw_data *ha = vha->hw; 4690 struct req_que *req; 4691 struct rsp_que *rsp; 4692 struct mid_init_cb_24xx *mid_init_cb = 4693 (struct mid_init_cb_24xx *) ha->init_cb; 4694 4695 spin_lock_irqsave(&ha->hardware_lock, flags); 4696 4697 /* Clear outstanding commands array. */ 4698 for (que = 0; que < ha->max_req_queues; que++) { 4699 req = ha->req_q_map[que]; 4700 if (!req || !test_bit(que, ha->req_qid_map)) 4701 continue; 4702 req->out_ptr = (uint16_t *)(req->ring + req->length); 4703 *req->out_ptr = 0; 4704 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4705 req->outstanding_cmds[cnt] = NULL; 4706 4707 req->current_outstanding_cmd = 1; 4708 4709 /* Initialize firmware. */ 4710 req->ring_ptr = req->ring; 4711 req->ring_index = 0; 4712 req->cnt = req->length; 4713 } 4714 4715 for (que = 0; que < ha->max_rsp_queues; que++) { 4716 rsp = ha->rsp_q_map[que]; 4717 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4718 continue; 4719 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length); 4720 *rsp->in_ptr = 0; 4721 /* Initialize response queue entries */ 4722 if (IS_QLAFX00(ha)) 4723 qlafx00_init_response_q_entries(rsp); 4724 else 4725 qla2x00_init_response_q_entries(rsp); 4726 } 4727 4728 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4729 ha->tgt.atio_ring_index = 0; 4730 /* Initialize ATIO queue entries */ 4731 qlt_init_atio_q_entries(vha); 4732 4733 ha->isp_ops->config_rings(vha); 4734 4735 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4736 4737 if (IS_QLAFX00(ha)) { 4738 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4739 goto next_check; 4740 } 4741 4742 /* Update any ISP specific firmware options before initialization. */ 4743 ha->isp_ops->update_fw_options(vha); 4744 4745 ql_dbg(ql_dbg_init, vha, 0x00d1, 4746 "Issue init firmware FW opt 1-3= %08x %08x %08x.\n", 4747 le32_to_cpu(mid_init_cb->init_cb.firmware_options_1), 4748 le32_to_cpu(mid_init_cb->init_cb.firmware_options_2), 4749 le32_to_cpu(mid_init_cb->init_cb.firmware_options_3)); 4750 4751 if (ha->flags.npiv_supported) { 4752 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4753 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4754 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4755 } 4756 4757 if (IS_FWI2_CAPABLE(ha)) { 4758 mid_init_cb->options = cpu_to_le16(BIT_1); 4759 mid_init_cb->init_cb.execution_throttle = 4760 cpu_to_le16(ha->cur_fw_xcb_count); 4761 ha->flags.dport_enabled = 4762 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4763 BIT_7) != 0; 4764 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4765 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4766 /* FA-WWPN Status */ 4767 ha->flags.fawwpn_enabled = 4768 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4769 BIT_6) != 0; 4770 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4771 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4772 /* Init_cb will be reused for other command(s). Save a backup copy of port_name */ 4773 memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE); 4774 } 4775 4776 /* ELS pass through payload is limit by frame size. */ 4777 if (ha->flags.edif_enabled) 4778 mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD); 4779 4780 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4781 next_check: 4782 if (rval) { 4783 ql_log(ql_log_fatal, vha, 0x00d2, 4784 "Init Firmware **** FAILED ****.\n"); 4785 } else { 4786 ql_dbg(ql_dbg_init, vha, 0x00d3, 4787 "Init Firmware -- success.\n"); 4788 QLA_FW_STARTED(ha); 4789 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4790 } 4791 4792 return (rval); 4793 } 4794 4795 /** 4796 * qla2x00_fw_ready() - Waits for firmware ready. 4797 * @vha: HA context 4798 * 4799 * Returns 0 on success. 4800 */ 4801 static int 4802 qla2x00_fw_ready(scsi_qla_host_t *vha) 4803 { 4804 int rval; 4805 unsigned long wtime, mtime, cs84xx_time; 4806 uint16_t min_wait; /* Minimum wait time if loop is down */ 4807 uint16_t wait_time; /* Wait time if loop is coming ready */ 4808 uint16_t state[6]; 4809 struct qla_hw_data *ha = vha->hw; 4810 4811 if (IS_QLAFX00(vha->hw)) 4812 return qlafx00_fw_ready(vha); 4813 4814 /* Time to wait for loop down */ 4815 if (IS_P3P_TYPE(ha)) 4816 min_wait = 30; 4817 else 4818 min_wait = 20; 4819 4820 /* 4821 * Firmware should take at most one RATOV to login, plus 5 seconds for 4822 * our own processing. 4823 */ 4824 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4825 wait_time = min_wait; 4826 } 4827 4828 /* Min wait time if loop down */ 4829 mtime = jiffies + (min_wait * HZ); 4830 4831 /* wait time before firmware ready */ 4832 wtime = jiffies + (wait_time * HZ); 4833 4834 /* Wait for ISP to finish LIP */ 4835 if (!vha->flags.init_done) 4836 ql_log(ql_log_info, vha, 0x801e, 4837 "Waiting for LIP to complete.\n"); 4838 4839 do { 4840 memset(state, -1, sizeof(state)); 4841 rval = qla2x00_get_firmware_state(vha, state); 4842 if (rval == QLA_SUCCESS) { 4843 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4844 vha->device_flags &= ~DFLG_NO_CABLE; 4845 } 4846 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4847 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4848 "fw_state=%x 84xx=%x.\n", state[0], 4849 state[2]); 4850 if ((state[2] & FSTATE_LOGGED_IN) && 4851 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4852 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4853 "Sending verify iocb.\n"); 4854 4855 cs84xx_time = jiffies; 4856 rval = qla84xx_init_chip(vha); 4857 if (rval != QLA_SUCCESS) { 4858 ql_log(ql_log_warn, 4859 vha, 0x8007, 4860 "Init chip failed.\n"); 4861 break; 4862 } 4863 4864 /* Add time taken to initialize. */ 4865 cs84xx_time = jiffies - cs84xx_time; 4866 wtime += cs84xx_time; 4867 mtime += cs84xx_time; 4868 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4869 "Increasing wait time by %ld. " 4870 "New time %ld.\n", cs84xx_time, 4871 wtime); 4872 } 4873 } else if (state[0] == FSTATE_READY) { 4874 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4875 "F/W Ready - OK.\n"); 4876 4877 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4878 &ha->login_timeout, &ha->r_a_tov); 4879 4880 rval = QLA_SUCCESS; 4881 break; 4882 } 4883 4884 rval = QLA_FUNCTION_FAILED; 4885 4886 if (atomic_read(&vha->loop_down_timer) && 4887 state[0] != FSTATE_READY) { 4888 /* Loop down. Timeout on min_wait for states 4889 * other than Wait for Login. 4890 */ 4891 if (time_after_eq(jiffies, mtime)) { 4892 ql_log(ql_log_info, vha, 0x8038, 4893 "Cable is unplugged...\n"); 4894 4895 vha->device_flags |= DFLG_NO_CABLE; 4896 break; 4897 } 4898 } 4899 } else { 4900 /* Mailbox cmd failed. Timeout on min_wait. */ 4901 if (time_after_eq(jiffies, mtime) || 4902 ha->flags.isp82xx_fw_hung) 4903 break; 4904 } 4905 4906 if (time_after_eq(jiffies, wtime)) 4907 break; 4908 4909 /* Delay for a while */ 4910 msleep(500); 4911 } while (1); 4912 4913 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4914 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4915 state[1], state[2], state[3], state[4], state[5], jiffies); 4916 4917 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4918 ql_log(ql_log_warn, vha, 0x803b, 4919 "Firmware ready **** FAILED ****.\n"); 4920 } 4921 4922 return (rval); 4923 } 4924 4925 /* 4926 * qla2x00_configure_hba 4927 * Setup adapter context. 4928 * 4929 * Input: 4930 * ha = adapter state pointer. 4931 * 4932 * Returns: 4933 * 0 = success 4934 * 4935 * Context: 4936 * Kernel context. 4937 */ 4938 static int 4939 qla2x00_configure_hba(scsi_qla_host_t *vha) 4940 { 4941 int rval; 4942 uint16_t loop_id; 4943 uint16_t topo; 4944 uint16_t sw_cap; 4945 uint8_t al_pa; 4946 uint8_t area; 4947 uint8_t domain; 4948 char connect_type[22]; 4949 struct qla_hw_data *ha = vha->hw; 4950 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4951 port_id_t id; 4952 unsigned long flags; 4953 4954 /* Get host addresses. */ 4955 rval = qla2x00_get_adapter_id(vha, 4956 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4957 if (rval != QLA_SUCCESS) { 4958 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4959 IS_CNA_CAPABLE(ha) || 4960 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4961 ql_dbg(ql_dbg_disc, vha, 0x2008, 4962 "Loop is in a transition state.\n"); 4963 } else { 4964 ql_log(ql_log_warn, vha, 0x2009, 4965 "Unable to get host loop ID.\n"); 4966 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4967 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4968 ql_log(ql_log_warn, vha, 0x1151, 4969 "Doing link init.\n"); 4970 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4971 return rval; 4972 } 4973 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4974 } 4975 return (rval); 4976 } 4977 4978 if (topo == 4) { 4979 ql_log(ql_log_info, vha, 0x200a, 4980 "Cannot get topology - retrying.\n"); 4981 return (QLA_FUNCTION_FAILED); 4982 } 4983 4984 vha->loop_id = loop_id; 4985 4986 /* initialize */ 4987 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4988 ha->operating_mode = LOOP; 4989 4990 switch (topo) { 4991 case 0: 4992 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4993 ha->switch_cap = 0; 4994 ha->current_topology = ISP_CFG_NL; 4995 strcpy(connect_type, "(Loop)"); 4996 break; 4997 4998 case 1: 4999 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 5000 ha->switch_cap = sw_cap; 5001 ha->current_topology = ISP_CFG_FL; 5002 strcpy(connect_type, "(FL_Port)"); 5003 break; 5004 5005 case 2: 5006 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 5007 ha->switch_cap = 0; 5008 ha->operating_mode = P2P; 5009 ha->current_topology = ISP_CFG_N; 5010 strcpy(connect_type, "(N_Port-to-N_Port)"); 5011 break; 5012 5013 case 3: 5014 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 5015 ha->switch_cap = sw_cap; 5016 ha->operating_mode = P2P; 5017 ha->current_topology = ISP_CFG_F; 5018 strcpy(connect_type, "(F_Port)"); 5019 break; 5020 5021 default: 5022 ql_dbg(ql_dbg_disc, vha, 0x200f, 5023 "HBA in unknown topology %x, using NL.\n", topo); 5024 ha->switch_cap = 0; 5025 ha->current_topology = ISP_CFG_NL; 5026 strcpy(connect_type, "(Loop)"); 5027 break; 5028 } 5029 5030 /* Save Host port and loop ID. */ 5031 /* byte order - Big Endian */ 5032 id.b.domain = domain; 5033 id.b.area = area; 5034 id.b.al_pa = al_pa; 5035 id.b.rsvd_1 = 0; 5036 spin_lock_irqsave(&ha->hardware_lock, flags); 5037 if (vha->hw->flags.edif_enabled) { 5038 if (topo != 2) 5039 qla_update_host_map(vha, id); 5040 } else if (!(topo == 2 && ha->flags.n2n_bigger)) 5041 qla_update_host_map(vha, id); 5042 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5043 5044 if (!vha->flags.init_done) 5045 ql_log(ql_log_info, vha, 0x2010, 5046 "Topology - %s, Host Loop address 0x%x.\n", 5047 connect_type, vha->loop_id); 5048 5049 return(rval); 5050 } 5051 5052 inline void 5053 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 5054 const char *def) 5055 { 5056 char *st, *en; 5057 uint16_t index; 5058 uint64_t zero[2] = { 0 }; 5059 struct qla_hw_data *ha = vha->hw; 5060 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 5061 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 5062 5063 if (len > sizeof(zero)) 5064 len = sizeof(zero); 5065 if (memcmp(model, &zero, len) != 0) { 5066 memcpy(ha->model_number, model, len); 5067 st = en = ha->model_number; 5068 en += len - 1; 5069 while (en > st) { 5070 if (*en != 0x20 && *en != 0x00) 5071 break; 5072 *en-- = '\0'; 5073 } 5074 5075 index = (ha->pdev->subsystem_device & 0xff); 5076 if (use_tbl && 5077 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 5078 index < QLA_MODEL_NAMES) 5079 strscpy(ha->model_desc, 5080 qla2x00_model_name[index * 2 + 1], 5081 sizeof(ha->model_desc)); 5082 } else { 5083 index = (ha->pdev->subsystem_device & 0xff); 5084 if (use_tbl && 5085 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 5086 index < QLA_MODEL_NAMES) { 5087 strscpy(ha->model_number, 5088 qla2x00_model_name[index * 2], 5089 sizeof(ha->model_number)); 5090 strscpy(ha->model_desc, 5091 qla2x00_model_name[index * 2 + 1], 5092 sizeof(ha->model_desc)); 5093 } else { 5094 strscpy(ha->model_number, def, 5095 sizeof(ha->model_number)); 5096 } 5097 } 5098 if (IS_FWI2_CAPABLE(ha)) 5099 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 5100 sizeof(ha->model_desc)); 5101 } 5102 5103 /* On sparc systems, obtain port and node WWN from firmware 5104 * properties. 5105 */ 5106 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 5107 { 5108 #ifdef CONFIG_SPARC 5109 struct qla_hw_data *ha = vha->hw; 5110 struct pci_dev *pdev = ha->pdev; 5111 struct device_node *dp = pci_device_to_OF_node(pdev); 5112 const u8 *val; 5113 int len; 5114 5115 val = of_get_property(dp, "port-wwn", &len); 5116 if (val && len >= WWN_SIZE) 5117 memcpy(nv->port_name, val, WWN_SIZE); 5118 5119 val = of_get_property(dp, "node-wwn", &len); 5120 if (val && len >= WWN_SIZE) 5121 memcpy(nv->node_name, val, WWN_SIZE); 5122 #endif 5123 } 5124 5125 /* 5126 * NVRAM configuration for ISP 2xxx 5127 * 5128 * Input: 5129 * ha = adapter block pointer. 5130 * 5131 * Output: 5132 * initialization control block in response_ring 5133 * host adapters parameters in host adapter block 5134 * 5135 * Returns: 5136 * 0 = success. 5137 */ 5138 int 5139 qla2x00_nvram_config(scsi_qla_host_t *vha) 5140 { 5141 int rval; 5142 uint8_t chksum = 0; 5143 uint16_t cnt; 5144 uint8_t *dptr1, *dptr2; 5145 struct qla_hw_data *ha = vha->hw; 5146 init_cb_t *icb = ha->init_cb; 5147 nvram_t *nv = ha->nvram; 5148 uint8_t *ptr = ha->nvram; 5149 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 5150 5151 rval = QLA_SUCCESS; 5152 5153 /* Determine NVRAM starting address. */ 5154 ha->nvram_size = sizeof(*nv); 5155 ha->nvram_base = 0; 5156 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 5157 if ((rd_reg_word(®->ctrl_status) >> 14) == 1) 5158 ha->nvram_base = 0x80; 5159 5160 /* Get NVRAM data and calculate checksum. */ 5161 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 5162 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 5163 chksum += *ptr++; 5164 5165 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 5166 "Contents of NVRAM.\n"); 5167 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 5168 nv, ha->nvram_size); 5169 5170 /* Bad NVRAM data, set defaults parameters. */ 5171 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 5172 nv->nvram_version < 1) { 5173 /* Reset NVRAM data. */ 5174 ql_log(ql_log_warn, vha, 0x0064, 5175 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 5176 chksum, nv->id, nv->nvram_version); 5177 ql_log(ql_log_warn, vha, 0x0065, 5178 "Falling back to " 5179 "functioning (yet invalid -- WWPN) defaults.\n"); 5180 5181 /* 5182 * Set default initialization control block. 5183 */ 5184 memset(nv, 0, ha->nvram_size); 5185 nv->parameter_block_version = ICB_VERSION; 5186 5187 if (IS_QLA23XX(ha)) { 5188 nv->firmware_options[0] = BIT_2 | BIT_1; 5189 nv->firmware_options[1] = BIT_7 | BIT_5; 5190 nv->add_firmware_options[0] = BIT_5; 5191 nv->add_firmware_options[1] = BIT_5 | BIT_4; 5192 nv->frame_payload_size = cpu_to_le16(2048); 5193 nv->special_options[1] = BIT_7; 5194 } else if (IS_QLA2200(ha)) { 5195 nv->firmware_options[0] = BIT_2 | BIT_1; 5196 nv->firmware_options[1] = BIT_7 | BIT_5; 5197 nv->add_firmware_options[0] = BIT_5; 5198 nv->add_firmware_options[1] = BIT_5 | BIT_4; 5199 nv->frame_payload_size = cpu_to_le16(1024); 5200 } else if (IS_QLA2100(ha)) { 5201 nv->firmware_options[0] = BIT_3 | BIT_1; 5202 nv->firmware_options[1] = BIT_5; 5203 nv->frame_payload_size = cpu_to_le16(1024); 5204 } 5205 5206 nv->max_iocb_allocation = cpu_to_le16(256); 5207 nv->execution_throttle = cpu_to_le16(16); 5208 nv->retry_count = 8; 5209 nv->retry_delay = 1; 5210 5211 nv->port_name[0] = 33; 5212 nv->port_name[3] = 224; 5213 nv->port_name[4] = 139; 5214 5215 qla2xxx_nvram_wwn_from_ofw(vha, nv); 5216 5217 nv->login_timeout = 4; 5218 5219 /* 5220 * Set default host adapter parameters 5221 */ 5222 nv->host_p[1] = BIT_2; 5223 nv->reset_delay = 5; 5224 nv->port_down_retry_count = 8; 5225 nv->max_luns_per_target = cpu_to_le16(8); 5226 nv->link_down_timeout = 60; 5227 5228 rval = 1; 5229 } 5230 5231 /* Reset Initialization control block */ 5232 memset(icb, 0, ha->init_cb_size); 5233 5234 /* 5235 * Setup driver NVRAM options. 5236 */ 5237 nv->firmware_options[0] |= (BIT_6 | BIT_1); 5238 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 5239 nv->firmware_options[1] |= (BIT_5 | BIT_0); 5240 nv->firmware_options[1] &= ~BIT_4; 5241 5242 if (IS_QLA23XX(ha)) { 5243 nv->firmware_options[0] |= BIT_2; 5244 nv->firmware_options[0] &= ~BIT_3; 5245 nv->special_options[0] &= ~BIT_6; 5246 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 5247 5248 if (IS_QLA2300(ha)) { 5249 if (ha->fb_rev == FPM_2310) { 5250 strcpy(ha->model_number, "QLA2310"); 5251 } else { 5252 strcpy(ha->model_number, "QLA2300"); 5253 } 5254 } else { 5255 qla2x00_set_model_info(vha, nv->model_number, 5256 sizeof(nv->model_number), "QLA23xx"); 5257 } 5258 } else if (IS_QLA2200(ha)) { 5259 nv->firmware_options[0] |= BIT_2; 5260 /* 5261 * 'Point-to-point preferred, else loop' is not a safe 5262 * connection mode setting. 5263 */ 5264 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 5265 (BIT_5 | BIT_4)) { 5266 /* Force 'loop preferred, else point-to-point'. */ 5267 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 5268 nv->add_firmware_options[0] |= BIT_5; 5269 } 5270 strcpy(ha->model_number, "QLA22xx"); 5271 } else /*if (IS_QLA2100(ha))*/ { 5272 strcpy(ha->model_number, "QLA2100"); 5273 } 5274 5275 /* 5276 * Copy over NVRAM RISC parameter block to initialization control block. 5277 */ 5278 dptr1 = (uint8_t *)icb; 5279 dptr2 = (uint8_t *)&nv->parameter_block_version; 5280 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 5281 while (cnt--) 5282 *dptr1++ = *dptr2++; 5283 5284 /* Copy 2nd half. */ 5285 dptr1 = (uint8_t *)icb->add_firmware_options; 5286 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 5287 while (cnt--) 5288 *dptr1++ = *dptr2++; 5289 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 5290 /* Use alternate WWN? */ 5291 if (nv->host_p[1] & BIT_7) { 5292 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5293 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5294 } 5295 5296 /* Prepare nodename */ 5297 if ((icb->firmware_options[1] & BIT_6) == 0) { 5298 /* 5299 * Firmware will apply the following mask if the nodename was 5300 * not provided. 5301 */ 5302 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5303 icb->node_name[0] &= 0xF0; 5304 } 5305 5306 /* 5307 * Set host adapter parameters. 5308 */ 5309 5310 /* 5311 * BIT_7 in the host-parameters section allows for modification to 5312 * internal driver logging. 5313 */ 5314 if (nv->host_p[0] & BIT_7) 5315 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 5316 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 5317 /* Always load RISC code on non ISP2[12]00 chips. */ 5318 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 5319 ha->flags.disable_risc_code_load = 0; 5320 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 5321 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 5322 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 5323 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 5324 ha->flags.disable_serdes = 0; 5325 5326 ha->operating_mode = 5327 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 5328 5329 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 5330 sizeof(ha->fw_seriallink_options)); 5331 5332 /* save HBA serial number */ 5333 ha->serial0 = icb->port_name[5]; 5334 ha->serial1 = icb->port_name[6]; 5335 ha->serial2 = icb->port_name[7]; 5336 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5337 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5338 5339 icb->execution_throttle = cpu_to_le16(0xFFFF); 5340 5341 ha->retry_count = nv->retry_count; 5342 5343 /* Set minimum login_timeout to 4 seconds. */ 5344 if (nv->login_timeout != ql2xlogintimeout) 5345 nv->login_timeout = ql2xlogintimeout; 5346 if (nv->login_timeout < 4) 5347 nv->login_timeout = 4; 5348 ha->login_timeout = nv->login_timeout; 5349 5350 /* Set minimum RATOV to 100 tenths of a second. */ 5351 ha->r_a_tov = 100; 5352 5353 ha->loop_reset_delay = nv->reset_delay; 5354 5355 /* Link Down Timeout = 0: 5356 * 5357 * When Port Down timer expires we will start returning 5358 * I/O's to OS with "DID_NO_CONNECT". 5359 * 5360 * Link Down Timeout != 0: 5361 * 5362 * The driver waits for the link to come up after link down 5363 * before returning I/Os to OS with "DID_NO_CONNECT". 5364 */ 5365 if (nv->link_down_timeout == 0) { 5366 ha->loop_down_abort_time = 5367 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5368 } else { 5369 ha->link_down_timeout = nv->link_down_timeout; 5370 ha->loop_down_abort_time = 5371 (LOOP_DOWN_TIME - ha->link_down_timeout); 5372 } 5373 5374 /* 5375 * Need enough time to try and get the port back. 5376 */ 5377 ha->port_down_retry_count = nv->port_down_retry_count; 5378 if (qlport_down_retry) 5379 ha->port_down_retry_count = qlport_down_retry; 5380 /* Set login_retry_count */ 5381 ha->login_retry_count = nv->retry_count; 5382 if (ha->port_down_retry_count == nv->port_down_retry_count && 5383 ha->port_down_retry_count > 3) 5384 ha->login_retry_count = ha->port_down_retry_count; 5385 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5386 ha->login_retry_count = ha->port_down_retry_count; 5387 if (ql2xloginretrycount) 5388 ha->login_retry_count = ql2xloginretrycount; 5389 5390 icb->lun_enables = cpu_to_le16(0); 5391 icb->command_resource_count = 0; 5392 icb->immediate_notify_resource_count = 0; 5393 icb->timeout = cpu_to_le16(0); 5394 5395 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 5396 /* Enable RIO */ 5397 icb->firmware_options[0] &= ~BIT_3; 5398 icb->add_firmware_options[0] &= 5399 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5400 icb->add_firmware_options[0] |= BIT_2; 5401 icb->response_accumulation_timer = 3; 5402 icb->interrupt_delay_timer = 5; 5403 5404 vha->flags.process_response_queue = 1; 5405 } else { 5406 /* Enable ZIO. */ 5407 if (!vha->flags.init_done) { 5408 ha->zio_mode = icb->add_firmware_options[0] & 5409 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5410 ha->zio_timer = icb->interrupt_delay_timer ? 5411 icb->interrupt_delay_timer : 2; 5412 } 5413 icb->add_firmware_options[0] &= 5414 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5415 vha->flags.process_response_queue = 0; 5416 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5417 ha->zio_mode = QLA_ZIO_MODE_6; 5418 5419 ql_log(ql_log_info, vha, 0x0068, 5420 "ZIO mode %d enabled; timer delay (%d us).\n", 5421 ha->zio_mode, ha->zio_timer * 100); 5422 5423 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 5424 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 5425 vha->flags.process_response_queue = 1; 5426 } 5427 } 5428 5429 if (rval) { 5430 ql_log(ql_log_warn, vha, 0x0069, 5431 "NVRAM configuration failed.\n"); 5432 } 5433 return (rval); 5434 } 5435 5436 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 5437 { 5438 int old_state; 5439 5440 old_state = atomic_read(&fcport->state); 5441 atomic_set(&fcport->state, state); 5442 5443 /* Don't print state transitions during initial allocation of fcport */ 5444 if (old_state && old_state != state) { 5445 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 5446 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 5447 fcport->port_name, port_state_str[old_state], 5448 port_state_str[state], fcport->d_id.b.domain, 5449 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5450 } 5451 } 5452 5453 /** 5454 * qla2x00_alloc_fcport() - Allocate a generic fcport. 5455 * @vha: HA context 5456 * @flags: allocation flags 5457 * 5458 * Returns a pointer to the allocated fcport, or NULL, if none available. 5459 */ 5460 fc_port_t * 5461 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 5462 { 5463 fc_port_t *fcport; 5464 5465 fcport = kzalloc(sizeof(fc_port_t), flags); 5466 if (!fcport) 5467 return NULL; 5468 5469 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 5470 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 5471 flags); 5472 if (!fcport->ct_desc.ct_sns) { 5473 ql_log(ql_log_warn, vha, 0xd049, 5474 "Failed to allocate ct_sns request.\n"); 5475 kfree(fcport); 5476 return NULL; 5477 } 5478 5479 /* Setup fcport template structure. */ 5480 fcport->vha = vha; 5481 fcport->port_type = FCT_UNKNOWN; 5482 fcport->loop_id = FC_NO_LOOP_ID; 5483 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 5484 fcport->supported_classes = FC_COS_UNSPECIFIED; 5485 fcport->fp_speed = PORT_SPEED_UNKNOWN; 5486 5487 fcport->disc_state = DSC_DELETED; 5488 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 5489 fcport->deleted = QLA_SESS_DELETED; 5490 fcport->login_retry = vha->hw->login_retry_count; 5491 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 5492 fcport->logout_on_delete = 1; 5493 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5494 fcport->tgt_short_link_down_cnt = 0; 5495 fcport->dev_loss_tmo = 0; 5496 5497 if (!fcport->ct_desc.ct_sns) { 5498 ql_log(ql_log_warn, vha, 0xd049, 5499 "Failed to allocate ct_sns request.\n"); 5500 kfree(fcport); 5501 return NULL; 5502 } 5503 5504 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 5505 INIT_WORK(&fcport->free_work, qlt_free_session_done); 5506 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 5507 INIT_LIST_HEAD(&fcport->gnl_entry); 5508 INIT_LIST_HEAD(&fcport->list); 5509 INIT_LIST_HEAD(&fcport->tmf_pending); 5510 5511 INIT_LIST_HEAD(&fcport->sess_cmd_list); 5512 spin_lock_init(&fcport->sess_cmd_lock); 5513 5514 spin_lock_init(&fcport->edif.sa_list_lock); 5515 INIT_LIST_HEAD(&fcport->edif.tx_sa_list); 5516 INIT_LIST_HEAD(&fcport->edif.rx_sa_list); 5517 5518 spin_lock_init(&fcport->edif.indx_list_lock); 5519 INIT_LIST_HEAD(&fcport->edif.edif_indx_list); 5520 5521 return fcport; 5522 } 5523 5524 void 5525 qla2x00_free_fcport(fc_port_t *fcport) 5526 { 5527 if (fcport->ct_desc.ct_sns) { 5528 dma_free_coherent(&fcport->vha->hw->pdev->dev, 5529 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 5530 fcport->ct_desc.ct_sns_dma); 5531 5532 fcport->ct_desc.ct_sns = NULL; 5533 } 5534 5535 qla_edif_flush_sa_ctl_lists(fcport); 5536 list_del(&fcport->list); 5537 qla2x00_clear_loop_id(fcport); 5538 5539 qla_edif_list_del(fcport); 5540 5541 kfree(fcport); 5542 } 5543 5544 static void qla_get_login_template(scsi_qla_host_t *vha) 5545 { 5546 struct qla_hw_data *ha = vha->hw; 5547 int rval; 5548 u32 *bp, sz; 5549 __be32 *q; 5550 5551 memset(ha->init_cb, 0, ha->init_cb_size); 5552 sz = min_t(int, sizeof(struct fc_els_csp), ha->init_cb_size); 5553 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 5554 ha->init_cb, sz); 5555 if (rval != QLA_SUCCESS) { 5556 ql_dbg(ql_dbg_init, vha, 0x00d1, 5557 "PLOGI ELS param read fail.\n"); 5558 return; 5559 } 5560 q = (__be32 *)&ha->plogi_els_payld.fl_csp; 5561 5562 bp = (uint32_t *)ha->init_cb; 5563 cpu_to_be32_array(q, bp, sz / 4); 5564 ha->flags.plogi_template_valid = 1; 5565 } 5566 5567 /* 5568 * qla2x00_configure_loop 5569 * Updates Fibre Channel Device Database with what is actually on loop. 5570 * 5571 * Input: 5572 * ha = adapter block pointer. 5573 * 5574 * Returns: 5575 * 0 = success. 5576 * 1 = error. 5577 * 2 = database was full and device was not configured. 5578 */ 5579 static int 5580 qla2x00_configure_loop(scsi_qla_host_t *vha) 5581 { 5582 int rval; 5583 unsigned long flags, save_flags; 5584 struct qla_hw_data *ha = vha->hw; 5585 5586 rval = QLA_SUCCESS; 5587 5588 /* Get Initiator ID */ 5589 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 5590 rval = qla2x00_configure_hba(vha); 5591 if (rval != QLA_SUCCESS) { 5592 ql_dbg(ql_dbg_disc, vha, 0x2013, 5593 "Unable to configure HBA.\n"); 5594 return (rval); 5595 } 5596 } 5597 5598 save_flags = flags = vha->dpc_flags; 5599 ql_dbg(ql_dbg_disc, vha, 0x2014, 5600 "Configure loop -- dpc flags = 0x%lx.\n", flags); 5601 5602 /* 5603 * If we have both an RSCN and PORT UPDATE pending then handle them 5604 * both at the same time. 5605 */ 5606 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5607 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 5608 5609 qla2x00_get_data_rate(vha); 5610 qla_get_login_template(vha); 5611 5612 /* Determine what we need to do */ 5613 if ((ha->current_topology == ISP_CFG_FL || 5614 ha->current_topology == ISP_CFG_F) && 5615 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 5616 5617 set_bit(RSCN_UPDATE, &flags); 5618 clear_bit(LOCAL_LOOP_UPDATE, &flags); 5619 5620 } else if (ha->current_topology == ISP_CFG_NL || 5621 ha->current_topology == ISP_CFG_N) { 5622 clear_bit(RSCN_UPDATE, &flags); 5623 set_bit(LOCAL_LOOP_UPDATE, &flags); 5624 } else if (!vha->flags.online || 5625 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 5626 set_bit(RSCN_UPDATE, &flags); 5627 set_bit(LOCAL_LOOP_UPDATE, &flags); 5628 } 5629 5630 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 5631 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5632 ql_dbg(ql_dbg_disc, vha, 0x2015, 5633 "Loop resync needed, failing.\n"); 5634 rval = QLA_FUNCTION_FAILED; 5635 } else 5636 rval = qla2x00_configure_local_loop(vha); 5637 } 5638 5639 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 5640 if (LOOP_TRANSITION(vha)) { 5641 ql_dbg(ql_dbg_disc, vha, 0x2099, 5642 "Needs RSCN update and loop transition.\n"); 5643 rval = QLA_FUNCTION_FAILED; 5644 } 5645 else 5646 rval = qla2x00_configure_fabric(vha); 5647 } 5648 5649 if (rval == QLA_SUCCESS) { 5650 if (atomic_read(&vha->loop_down_timer) || 5651 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5652 rval = QLA_FUNCTION_FAILED; 5653 } else { 5654 atomic_set(&vha->loop_state, LOOP_READY); 5655 ql_dbg(ql_dbg_disc, vha, 0x2069, 5656 "LOOP READY.\n"); 5657 ha->flags.fw_init_done = 1; 5658 5659 /* 5660 * use link up to wake up app to get ready for 5661 * authentication. 5662 */ 5663 if (ha->flags.edif_enabled && DBELL_INACTIVE(vha)) 5664 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, 5665 ha->link_data_rate); 5666 5667 /* 5668 * Process any ATIO queue entries that came in 5669 * while we weren't online. 5670 */ 5671 if (qla_tgt_mode_enabled(vha) || 5672 qla_dual_mode_enabled(vha)) { 5673 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 5674 qlt_24xx_process_atio_queue(vha, 0); 5675 spin_unlock_irqrestore(&ha->tgt.atio_lock, 5676 flags); 5677 } 5678 } 5679 } 5680 5681 if (rval) { 5682 ql_dbg(ql_dbg_disc, vha, 0x206a, 5683 "%s *** FAILED ***.\n", __func__); 5684 } else { 5685 ql_dbg(ql_dbg_disc, vha, 0x206b, 5686 "%s: exiting normally. local port wwpn %8phN id %06x)\n", 5687 __func__, vha->port_name, vha->d_id.b24); 5688 } 5689 5690 /* Restore state if a resync event occurred during processing */ 5691 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5692 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5693 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5694 if (test_bit(RSCN_UPDATE, &save_flags)) { 5695 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5696 } 5697 } 5698 5699 return (rval); 5700 } 5701 5702 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha) 5703 { 5704 unsigned long flags; 5705 fc_port_t *fcport; 5706 5707 ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__); 5708 5709 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) 5710 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 5711 5712 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5713 if (fcport->n2n_flag) { 5714 qla24xx_fcport_handle_login(vha, fcport); 5715 return QLA_SUCCESS; 5716 } 5717 } 5718 5719 spin_lock_irqsave(&vha->work_lock, flags); 5720 vha->scan.scan_retry++; 5721 spin_unlock_irqrestore(&vha->work_lock, flags); 5722 5723 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5724 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5725 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5726 } 5727 return QLA_FUNCTION_FAILED; 5728 } 5729 5730 static void 5731 qla_reinitialize_link(scsi_qla_host_t *vha) 5732 { 5733 int rval; 5734 5735 atomic_set(&vha->loop_state, LOOP_DOWN); 5736 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 5737 rval = qla2x00_full_login_lip(vha); 5738 if (rval == QLA_SUCCESS) { 5739 ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n"); 5740 } else { 5741 ql_dbg(ql_dbg_disc, vha, 0xd051, 5742 "Link reinitialization failed (%d)\n", rval); 5743 } 5744 } 5745 5746 /* 5747 * qla2x00_configure_local_loop 5748 * Updates Fibre Channel Device Database with local loop devices. 5749 * 5750 * Input: 5751 * ha = adapter block pointer. 5752 * 5753 * Returns: 5754 * 0 = success. 5755 */ 5756 static int 5757 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5758 { 5759 int rval, rval2; 5760 int found; 5761 fc_port_t *fcport, *new_fcport; 5762 uint16_t index; 5763 uint16_t entries; 5764 struct gid_list_info *gid; 5765 uint16_t loop_id; 5766 uint8_t domain, area, al_pa; 5767 struct qla_hw_data *ha = vha->hw; 5768 unsigned long flags; 5769 5770 /* Inititae N2N login. */ 5771 if (N2N_TOPO(ha)) 5772 return qla2x00_configure_n2n_loop(vha); 5773 5774 new_fcport = NULL; 5775 entries = MAX_FIBRE_DEVICES_LOOP; 5776 5777 /* Get list of logged in devices. */ 5778 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5779 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5780 &entries); 5781 if (rval != QLA_SUCCESS) 5782 goto err; 5783 5784 ql_dbg(ql_dbg_disc, vha, 0x2011, 5785 "Entries in ID list (%d).\n", entries); 5786 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5787 ha->gid_list, entries * sizeof(*ha->gid_list)); 5788 5789 if (entries == 0) { 5790 spin_lock_irqsave(&vha->work_lock, flags); 5791 vha->scan.scan_retry++; 5792 spin_unlock_irqrestore(&vha->work_lock, flags); 5793 5794 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5795 u8 loop_map_entries = 0; 5796 int rc; 5797 5798 rc = qla2x00_get_fcal_position_map(vha, NULL, 5799 &loop_map_entries); 5800 if (rc == QLA_SUCCESS && loop_map_entries > 1) { 5801 /* 5802 * There are devices that are still not logged 5803 * in. Reinitialize to give them a chance. 5804 */ 5805 qla_reinitialize_link(vha); 5806 return QLA_FUNCTION_FAILED; 5807 } 5808 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5809 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5810 } 5811 } else { 5812 vha->scan.scan_retry = 0; 5813 } 5814 5815 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5816 fcport->scan_state = QLA_FCPORT_SCAN; 5817 } 5818 5819 /* Allocate temporary fcport for any new fcports discovered. */ 5820 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5821 if (new_fcport == NULL) { 5822 ql_log(ql_log_warn, vha, 0x2012, 5823 "Memory allocation failed for fcport.\n"); 5824 rval = QLA_MEMORY_ALLOC_FAILED; 5825 goto err; 5826 } 5827 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5828 5829 /* Add devices to port list. */ 5830 gid = ha->gid_list; 5831 for (index = 0; index < entries; index++) { 5832 domain = gid->domain; 5833 area = gid->area; 5834 al_pa = gid->al_pa; 5835 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5836 loop_id = gid->loop_id_2100; 5837 else 5838 loop_id = le16_to_cpu(gid->loop_id); 5839 gid = (void *)gid + ha->gid_list_info_size; 5840 5841 /* Bypass reserved domain fields. */ 5842 if ((domain & 0xf0) == 0xf0) 5843 continue; 5844 5845 /* Bypass if not same domain and area of adapter. */ 5846 if (area && domain && ((area != vha->d_id.b.area) || 5847 (domain != vha->d_id.b.domain)) && 5848 (ha->current_topology == ISP_CFG_NL)) 5849 continue; 5850 5851 5852 /* Bypass invalid local loop ID. */ 5853 if (loop_id > LAST_LOCAL_LOOP_ID) 5854 continue; 5855 5856 memset(new_fcport->port_name, 0, WWN_SIZE); 5857 5858 /* Fill in member data. */ 5859 new_fcport->d_id.b.domain = domain; 5860 new_fcport->d_id.b.area = area; 5861 new_fcport->d_id.b.al_pa = al_pa; 5862 new_fcport->loop_id = loop_id; 5863 new_fcport->scan_state = QLA_FCPORT_FOUND; 5864 5865 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5866 if (rval2 != QLA_SUCCESS) { 5867 ql_dbg(ql_dbg_disc, vha, 0x2097, 5868 "Failed to retrieve fcport information " 5869 "-- get_port_database=%x, loop_id=0x%04x.\n", 5870 rval2, new_fcport->loop_id); 5871 /* Skip retry if N2N */ 5872 if (ha->current_topology != ISP_CFG_N) { 5873 ql_dbg(ql_dbg_disc, vha, 0x2105, 5874 "Scheduling resync.\n"); 5875 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5876 continue; 5877 } 5878 } 5879 5880 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5881 /* Check for matching device in port list. */ 5882 found = 0; 5883 fcport = NULL; 5884 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5885 if (memcmp(new_fcport->port_name, fcport->port_name, 5886 WWN_SIZE)) 5887 continue; 5888 5889 fcport->flags &= ~FCF_FABRIC_DEVICE; 5890 fcport->loop_id = new_fcport->loop_id; 5891 fcport->port_type = new_fcport->port_type; 5892 fcport->d_id.b24 = new_fcport->d_id.b24; 5893 memcpy(fcport->node_name, new_fcport->node_name, 5894 WWN_SIZE); 5895 fcport->scan_state = QLA_FCPORT_FOUND; 5896 if (fcport->login_retry == 0) { 5897 fcport->login_retry = vha->hw->login_retry_count; 5898 ql_dbg(ql_dbg_disc, vha, 0x2135, 5899 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n", 5900 fcport->port_name, fcport->loop_id, 5901 fcport->login_retry); 5902 } 5903 found++; 5904 break; 5905 } 5906 5907 if (!found) { 5908 /* New device, add to fcports list. */ 5909 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5910 5911 /* Allocate a new replacement fcport. */ 5912 fcport = new_fcport; 5913 5914 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5915 5916 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5917 5918 if (new_fcport == NULL) { 5919 ql_log(ql_log_warn, vha, 0xd031, 5920 "Failed to allocate memory for fcport.\n"); 5921 rval = QLA_MEMORY_ALLOC_FAILED; 5922 goto err; 5923 } 5924 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5925 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5926 } 5927 5928 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5929 5930 /* Base iIDMA settings on HBA port speed. */ 5931 fcport->fp_speed = ha->link_data_rate; 5932 } 5933 5934 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5935 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5936 break; 5937 5938 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5939 if ((qla_dual_mode_enabled(vha) || 5940 qla_ini_mode_enabled(vha)) && 5941 atomic_read(&fcport->state) == FCS_ONLINE) { 5942 qla2x00_mark_device_lost(vha, fcport, 5943 ql2xplogiabsentdevice); 5944 if (fcport->loop_id != FC_NO_LOOP_ID && 5945 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5946 fcport->port_type != FCT_INITIATOR && 5947 fcport->port_type != FCT_BROADCAST) { 5948 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5949 "%s %d %8phC post del sess\n", 5950 __func__, __LINE__, 5951 fcport->port_name); 5952 5953 qlt_schedule_sess_for_deletion(fcport); 5954 continue; 5955 } 5956 } 5957 } 5958 5959 if (fcport->scan_state == QLA_FCPORT_FOUND) 5960 qla24xx_fcport_handle_login(vha, fcport); 5961 } 5962 5963 qla2x00_free_fcport(new_fcport); 5964 5965 return rval; 5966 5967 err: 5968 ql_dbg(ql_dbg_disc, vha, 0x2098, 5969 "Configure local loop error exit: rval=%x.\n", rval); 5970 return rval; 5971 } 5972 5973 static void 5974 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5975 { 5976 int rval; 5977 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5978 struct qla_hw_data *ha = vha->hw; 5979 5980 if (!IS_IIDMA_CAPABLE(ha)) 5981 return; 5982 5983 if (atomic_read(&fcport->state) != FCS_ONLINE) 5984 return; 5985 5986 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5987 fcport->fp_speed > ha->link_data_rate || 5988 !ha->flags.gpsc_supported) 5989 return; 5990 5991 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5992 mb); 5993 if (rval != QLA_SUCCESS) { 5994 ql_dbg(ql_dbg_disc, vha, 0x2004, 5995 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5996 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5997 } else { 5998 ql_dbg(ql_dbg_disc, vha, 0x2005, 5999 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 6000 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 6001 fcport->fp_speed, fcport->port_name); 6002 } 6003 } 6004 6005 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 6006 { 6007 qla2x00_iidma_fcport(vha, fcport); 6008 qla24xx_update_fcport_fcp_prio(vha, fcport); 6009 } 6010 6011 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 6012 { 6013 struct qla_work_evt *e; 6014 6015 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 6016 if (!e) 6017 return QLA_FUNCTION_FAILED; 6018 6019 e->u.fcport.fcport = fcport; 6020 return qla2x00_post_work(vha, e); 6021 } 6022 6023 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 6024 static void 6025 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 6026 { 6027 struct fc_rport_identifiers rport_ids; 6028 struct fc_rport *rport; 6029 unsigned long flags; 6030 6031 if (atomic_read(&fcport->state) == FCS_ONLINE) 6032 return; 6033 6034 rport_ids.node_name = wwn_to_u64(fcport->node_name); 6035 rport_ids.port_name = wwn_to_u64(fcport->port_name); 6036 rport_ids.port_id = fcport->d_id.b.domain << 16 | 6037 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 6038 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 6039 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 6040 if (!rport) { 6041 ql_log(ql_log_warn, vha, 0x2006, 6042 "Unable to allocate fc remote port.\n"); 6043 return; 6044 } 6045 6046 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 6047 *((fc_port_t **)rport->dd_data) = fcport; 6048 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 6049 fcport->dev_loss_tmo = rport->dev_loss_tmo; 6050 6051 rport->supported_classes = fcport->supported_classes; 6052 6053 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 6054 if (fcport->port_type == FCT_INITIATOR) 6055 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 6056 if (fcport->port_type == FCT_TARGET) 6057 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 6058 if (fcport->port_type & FCT_NVME_INITIATOR) 6059 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 6060 if (fcport->port_type & FCT_NVME_TARGET) 6061 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 6062 if (fcport->port_type & FCT_NVME_DISCOVERY) 6063 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 6064 6065 fc_remote_port_rolechg(rport, rport_ids.roles); 6066 6067 ql_dbg(ql_dbg_disc, vha, 0x20ee, 6068 "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n", 6069 __func__, fcport->port_name, vha->host_no, 6070 rport->scsi_target_id, rport, 6071 (fcport->port_type == FCT_TARGET) ? "tgt" : 6072 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 6073 } 6074 6075 /* 6076 * qla2x00_update_fcport 6077 * Updates device on list. 6078 * 6079 * Input: 6080 * ha = adapter block pointer. 6081 * fcport = port structure pointer. 6082 * 6083 * Return: 6084 * 0 - Success 6085 * BIT_0 - error 6086 * 6087 * Context: 6088 * Kernel context. 6089 */ 6090 void 6091 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 6092 { 6093 if (IS_SW_RESV_ADDR(fcport->d_id)) 6094 return; 6095 6096 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 6097 __func__, fcport->port_name); 6098 6099 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT); 6100 fcport->login_retry = vha->hw->login_retry_count; 6101 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6102 fcport->deleted = 0; 6103 if (vha->hw->current_topology == ISP_CFG_NL) 6104 fcport->logout_on_delete = 0; 6105 else 6106 fcport->logout_on_delete = 1; 6107 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 6108 6109 if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) { 6110 fcport->tgt_short_link_down_cnt++; 6111 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 6112 } 6113 6114 switch (vha->hw->current_topology) { 6115 case ISP_CFG_N: 6116 case ISP_CFG_NL: 6117 fcport->keep_nport_handle = 1; 6118 break; 6119 default: 6120 break; 6121 } 6122 6123 qla2x00_iidma_fcport(vha, fcport); 6124 6125 qla2x00_dfs_create_rport(vha, fcport); 6126 6127 qla24xx_update_fcport_fcp_prio(vha, fcport); 6128 6129 switch (vha->host->active_mode) { 6130 case MODE_INITIATOR: 6131 qla2x00_reg_remote_port(vha, fcport); 6132 break; 6133 case MODE_TARGET: 6134 if (!vha->vha_tgt.qla_tgt->tgt_stop && 6135 !vha->vha_tgt.qla_tgt->tgt_stopped) 6136 qlt_fc_port_added(vha, fcport); 6137 break; 6138 case MODE_DUAL: 6139 qla2x00_reg_remote_port(vha, fcport); 6140 if (!vha->vha_tgt.qla_tgt->tgt_stop && 6141 !vha->vha_tgt.qla_tgt->tgt_stopped) 6142 qlt_fc_port_added(vha, fcport); 6143 break; 6144 default: 6145 break; 6146 } 6147 6148 if (NVME_TARGET(vha->hw, fcport)) 6149 qla_nvme_register_remote(vha, fcport); 6150 6151 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 6152 6153 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 6154 if (fcport->id_changed) { 6155 fcport->id_changed = 0; 6156 ql_dbg(ql_dbg_disc, vha, 0x20d7, 6157 "%s %d %8phC post gfpnid fcp_cnt %d\n", 6158 __func__, __LINE__, fcport->port_name, 6159 vha->fcport_count); 6160 qla24xx_post_gfpnid_work(vha, fcport); 6161 } else { 6162 ql_dbg(ql_dbg_disc, vha, 0x20d7, 6163 "%s %d %8phC post gpsc fcp_cnt %d\n", 6164 __func__, __LINE__, fcport->port_name, 6165 vha->fcport_count); 6166 qla24xx_post_gpsc_work(vha, fcport); 6167 } 6168 } 6169 6170 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 6171 } 6172 6173 void qla_register_fcport_fn(struct work_struct *work) 6174 { 6175 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 6176 u32 rscn_gen = fcport->rscn_gen; 6177 u16 data[2]; 6178 6179 if (IS_SW_RESV_ADDR(fcport->d_id)) 6180 return; 6181 6182 qla2x00_update_fcport(fcport->vha, fcport); 6183 6184 ql_dbg(ql_dbg_disc, fcport->vha, 0x911e, 6185 "%s rscn gen %d/%d next DS %d\n", __func__, 6186 rscn_gen, fcport->rscn_gen, fcport->next_disc_state); 6187 6188 if (rscn_gen != fcport->rscn_gen) { 6189 /* RSCN(s) came in while registration */ 6190 switch (fcport->next_disc_state) { 6191 case DSC_DELETE_PEND: 6192 qlt_schedule_sess_for_deletion(fcport); 6193 break; 6194 case DSC_ADISC: 6195 data[0] = data[1] = 0; 6196 qla2x00_post_async_adisc_work(fcport->vha, fcport, 6197 data); 6198 break; 6199 default: 6200 break; 6201 } 6202 } 6203 } 6204 6205 /* 6206 * qla2x00_configure_fabric 6207 * Setup SNS devices with loop ID's. 6208 * 6209 * Input: 6210 * ha = adapter block pointer. 6211 * 6212 * Returns: 6213 * 0 = success. 6214 * BIT_0 = error 6215 */ 6216 static int 6217 qla2x00_configure_fabric(scsi_qla_host_t *vha) 6218 { 6219 int rval; 6220 fc_port_t *fcport; 6221 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6222 uint16_t loop_id; 6223 struct qla_hw_data *ha = vha->hw; 6224 int discovery_gen; 6225 6226 /* If FL port exists, then SNS is present */ 6227 if (IS_FWI2_CAPABLE(ha)) 6228 loop_id = NPH_F_PORT; 6229 else 6230 loop_id = SNS_FL_PORT; 6231 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 6232 if (rval != QLA_SUCCESS) { 6233 ql_dbg(ql_dbg_disc, vha, 0x20a0, 6234 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 6235 6236 vha->device_flags &= ~SWITCH_FOUND; 6237 return (QLA_SUCCESS); 6238 } 6239 vha->device_flags |= SWITCH_FOUND; 6240 6241 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0); 6242 if (rval != QLA_SUCCESS) 6243 ql_dbg(ql_dbg_disc, vha, 0x20ff, 6244 "Failed to get Fabric Port Name\n"); 6245 6246 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 6247 rval = qla2x00_send_change_request(vha, 0x3, 0); 6248 if (rval != QLA_SUCCESS) 6249 ql_log(ql_log_warn, vha, 0x121, 6250 "Failed to enable receiving of RSCN requests: 0x%x.\n", 6251 rval); 6252 } 6253 6254 do { 6255 qla2x00_mgmt_svr_login(vha); 6256 6257 /* Ensure we are logged into the SNS. */ 6258 loop_id = NPH_SNS_LID(ha); 6259 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 6260 0xfc, mb, BIT_1|BIT_0); 6261 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 6262 ql_dbg(ql_dbg_disc, vha, 0x20a1, 6263 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 6264 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 6265 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6266 return rval; 6267 } 6268 6269 /* FDMI support. */ 6270 if (ql2xfdmienable && 6271 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 6272 qla2x00_fdmi_register(vha); 6273 6274 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 6275 if (qla2x00_rft_id(vha)) { 6276 /* EMPTY */ 6277 ql_dbg(ql_dbg_disc, vha, 0x20a2, 6278 "Register FC-4 TYPE failed.\n"); 6279 if (test_bit(LOOP_RESYNC_NEEDED, 6280 &vha->dpc_flags)) 6281 break; 6282 } 6283 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 6284 /* EMPTY */ 6285 ql_dbg(ql_dbg_disc, vha, 0x209a, 6286 "Register FC-4 Features failed.\n"); 6287 if (test_bit(LOOP_RESYNC_NEEDED, 6288 &vha->dpc_flags)) 6289 break; 6290 } 6291 if (vha->flags.nvme_enabled) { 6292 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 6293 ql_dbg(ql_dbg_disc, vha, 0x2049, 6294 "Register NVME FC Type Features failed.\n"); 6295 } 6296 } 6297 if (qla2x00_rnn_id(vha)) { 6298 /* EMPTY */ 6299 ql_dbg(ql_dbg_disc, vha, 0x2104, 6300 "Register Node Name failed.\n"); 6301 if (test_bit(LOOP_RESYNC_NEEDED, 6302 &vha->dpc_flags)) 6303 break; 6304 } else if (qla2x00_rsnn_nn(vha)) { 6305 /* EMPTY */ 6306 ql_dbg(ql_dbg_disc, vha, 0x209b, 6307 "Register Symbolic Node Name failed.\n"); 6308 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6309 break; 6310 } 6311 } 6312 6313 6314 /* Mark the time right before querying FW for connected ports. 6315 * This process is long, asynchronous and by the time it's done, 6316 * collected information might not be accurate anymore. E.g. 6317 * disconnected port might have re-connected and a brand new 6318 * session has been created. In this case session's generation 6319 * will be newer than discovery_gen. */ 6320 qlt_do_generation_tick(vha, &discovery_gen); 6321 6322 if (USE_ASYNC_SCAN(ha)) { 6323 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 6324 NULL); 6325 if (rval) 6326 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6327 } else { 6328 list_for_each_entry(fcport, &vha->vp_fcports, list) 6329 fcport->scan_state = QLA_FCPORT_SCAN; 6330 6331 rval = qla2x00_find_all_fabric_devs(vha); 6332 } 6333 if (rval != QLA_SUCCESS) 6334 break; 6335 } while (0); 6336 6337 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 6338 qla_nvme_register_hba(vha); 6339 6340 if (rval) 6341 ql_dbg(ql_dbg_disc, vha, 0x2068, 6342 "Configure fabric error exit rval=%d.\n", rval); 6343 6344 return (rval); 6345 } 6346 6347 /* 6348 * qla2x00_find_all_fabric_devs 6349 * 6350 * Input: 6351 * ha = adapter block pointer. 6352 * dev = database device entry pointer. 6353 * 6354 * Returns: 6355 * 0 = success. 6356 * 6357 * Context: 6358 * Kernel context. 6359 */ 6360 static int 6361 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 6362 { 6363 int rval; 6364 uint16_t loop_id; 6365 fc_port_t *fcport, *new_fcport; 6366 int found; 6367 6368 sw_info_t *swl; 6369 int swl_idx; 6370 int first_dev, last_dev; 6371 port_id_t wrap = {}, nxt_d_id; 6372 struct qla_hw_data *ha = vha->hw; 6373 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6374 unsigned long flags; 6375 6376 rval = QLA_SUCCESS; 6377 6378 /* Try GID_PT to get device list, else GAN. */ 6379 if (!ha->swl) 6380 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 6381 GFP_KERNEL); 6382 swl = ha->swl; 6383 if (!swl) { 6384 /*EMPTY*/ 6385 ql_dbg(ql_dbg_disc, vha, 0x209c, 6386 "GID_PT allocations failed, fallback on GA_NXT.\n"); 6387 } else { 6388 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 6389 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 6390 swl = NULL; 6391 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6392 return rval; 6393 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 6394 swl = NULL; 6395 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6396 return rval; 6397 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 6398 swl = NULL; 6399 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6400 return rval; 6401 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 6402 swl = NULL; 6403 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6404 return rval; 6405 } 6406 6407 /* If other queries succeeded probe for FC-4 type */ 6408 if (swl) { 6409 qla2x00_gff_id(vha, swl); 6410 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6411 return rval; 6412 } 6413 } 6414 swl_idx = 0; 6415 6416 /* Allocate temporary fcport for any new fcports discovered. */ 6417 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6418 if (new_fcport == NULL) { 6419 ql_log(ql_log_warn, vha, 0x209d, 6420 "Failed to allocate memory for fcport.\n"); 6421 return (QLA_MEMORY_ALLOC_FAILED); 6422 } 6423 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6424 /* Set start port ID scan at adapter ID. */ 6425 first_dev = 1; 6426 last_dev = 0; 6427 6428 /* Starting free loop ID. */ 6429 loop_id = ha->min_external_loopid; 6430 for (; loop_id <= ha->max_loop_id; loop_id++) { 6431 if (qla2x00_is_reserved_id(vha, loop_id)) 6432 continue; 6433 6434 if (ha->current_topology == ISP_CFG_FL && 6435 (atomic_read(&vha->loop_down_timer) || 6436 LOOP_TRANSITION(vha))) { 6437 atomic_set(&vha->loop_down_timer, 0); 6438 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6439 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 6440 break; 6441 } 6442 6443 if (swl != NULL) { 6444 if (last_dev) { 6445 wrap.b24 = new_fcport->d_id.b24; 6446 } else { 6447 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 6448 memcpy(new_fcport->node_name, 6449 swl[swl_idx].node_name, WWN_SIZE); 6450 memcpy(new_fcport->port_name, 6451 swl[swl_idx].port_name, WWN_SIZE); 6452 memcpy(new_fcport->fabric_port_name, 6453 swl[swl_idx].fabric_port_name, WWN_SIZE); 6454 new_fcport->fp_speed = swl[swl_idx].fp_speed; 6455 new_fcport->fc4_type = swl[swl_idx].fc4_type; 6456 6457 new_fcport->nvme_flag = 0; 6458 if (vha->flags.nvme_enabled && 6459 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 6460 ql_log(ql_log_info, vha, 0x2131, 6461 "FOUND: NVME port %8phC as FC Type 28h\n", 6462 new_fcport->port_name); 6463 } 6464 6465 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 6466 last_dev = 1; 6467 } 6468 swl_idx++; 6469 } 6470 } else { 6471 /* Send GA_NXT to the switch */ 6472 rval = qla2x00_ga_nxt(vha, new_fcport); 6473 if (rval != QLA_SUCCESS) { 6474 ql_log(ql_log_warn, vha, 0x209e, 6475 "SNS scan failed -- assuming " 6476 "zero-entry result.\n"); 6477 rval = QLA_SUCCESS; 6478 break; 6479 } 6480 } 6481 6482 /* If wrap on switch device list, exit. */ 6483 if (first_dev) { 6484 wrap.b24 = new_fcport->d_id.b24; 6485 first_dev = 0; 6486 } else if (new_fcport->d_id.b24 == wrap.b24) { 6487 ql_dbg(ql_dbg_disc, vha, 0x209f, 6488 "Device wrap (%02x%02x%02x).\n", 6489 new_fcport->d_id.b.domain, 6490 new_fcport->d_id.b.area, 6491 new_fcport->d_id.b.al_pa); 6492 break; 6493 } 6494 6495 /* Bypass if same physical adapter. */ 6496 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 6497 continue; 6498 6499 /* Bypass virtual ports of the same host. */ 6500 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 6501 continue; 6502 6503 /* Bypass if same domain and area of adapter. */ 6504 if (((new_fcport->d_id.b24 & 0xffff00) == 6505 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 6506 ISP_CFG_FL) 6507 continue; 6508 6509 /* Bypass reserved domain fields. */ 6510 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 6511 continue; 6512 6513 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 6514 if (ql2xgffidenable && 6515 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 6516 new_fcport->fc4_type != 0)) 6517 continue; 6518 6519 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 6520 6521 /* Locate matching device in database. */ 6522 found = 0; 6523 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6524 if (memcmp(new_fcport->port_name, fcport->port_name, 6525 WWN_SIZE)) 6526 continue; 6527 6528 fcport->scan_state = QLA_FCPORT_FOUND; 6529 6530 found++; 6531 6532 /* Update port state. */ 6533 memcpy(fcport->fabric_port_name, 6534 new_fcport->fabric_port_name, WWN_SIZE); 6535 fcport->fp_speed = new_fcport->fp_speed; 6536 6537 /* 6538 * If address the same and state FCS_ONLINE 6539 * (or in target mode), nothing changed. 6540 */ 6541 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 6542 (atomic_read(&fcport->state) == FCS_ONLINE || 6543 (vha->host->active_mode == MODE_TARGET))) { 6544 break; 6545 } 6546 6547 if (fcport->login_retry == 0) 6548 fcport->login_retry = 6549 vha->hw->login_retry_count; 6550 /* 6551 * If device was not a fabric device before. 6552 */ 6553 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 6554 fcport->d_id.b24 = new_fcport->d_id.b24; 6555 qla2x00_clear_loop_id(fcport); 6556 fcport->flags |= (FCF_FABRIC_DEVICE | 6557 FCF_LOGIN_NEEDED); 6558 break; 6559 } 6560 6561 /* 6562 * Port ID changed or device was marked to be updated; 6563 * Log it out if still logged in and mark it for 6564 * relogin later. 6565 */ 6566 if (qla_tgt_mode_enabled(base_vha)) { 6567 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 6568 "port changed FC ID, %8phC" 6569 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 6570 fcport->port_name, 6571 fcport->d_id.b.domain, 6572 fcport->d_id.b.area, 6573 fcport->d_id.b.al_pa, 6574 fcport->loop_id, 6575 new_fcport->d_id.b.domain, 6576 new_fcport->d_id.b.area, 6577 new_fcport->d_id.b.al_pa); 6578 fcport->d_id.b24 = new_fcport->d_id.b24; 6579 break; 6580 } 6581 6582 fcport->d_id.b24 = new_fcport->d_id.b24; 6583 fcport->flags |= FCF_LOGIN_NEEDED; 6584 break; 6585 } 6586 6587 if (found && NVME_TARGET(vha->hw, fcport)) { 6588 if (fcport->disc_state == DSC_DELETE_PEND) { 6589 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 6590 vha->fcport_count--; 6591 fcport->login_succ = 0; 6592 } 6593 } 6594 6595 if (found) { 6596 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6597 continue; 6598 } 6599 /* If device was not in our fcports list, then add it. */ 6600 new_fcport->scan_state = QLA_FCPORT_FOUND; 6601 list_add_tail(&new_fcport->list, &vha->vp_fcports); 6602 6603 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6604 6605 6606 /* Allocate a new replacement fcport. */ 6607 nxt_d_id.b24 = new_fcport->d_id.b24; 6608 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6609 if (new_fcport == NULL) { 6610 ql_log(ql_log_warn, vha, 0xd032, 6611 "Memory allocation failed for fcport.\n"); 6612 return (QLA_MEMORY_ALLOC_FAILED); 6613 } 6614 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6615 new_fcport->d_id.b24 = nxt_d_id.b24; 6616 } 6617 6618 qla2x00_free_fcport(new_fcport); 6619 6620 /* 6621 * Logout all previous fabric dev marked lost, except FCP2 devices. 6622 */ 6623 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6624 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6625 break; 6626 6627 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 6628 continue; 6629 6630 if (fcport->scan_state == QLA_FCPORT_SCAN) { 6631 if ((qla_dual_mode_enabled(vha) || 6632 qla_ini_mode_enabled(vha)) && 6633 atomic_read(&fcport->state) == FCS_ONLINE) { 6634 qla2x00_mark_device_lost(vha, fcport, 6635 ql2xplogiabsentdevice); 6636 if (fcport->loop_id != FC_NO_LOOP_ID && 6637 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 6638 fcport->port_type != FCT_INITIATOR && 6639 fcport->port_type != FCT_BROADCAST) { 6640 ql_dbg(ql_dbg_disc, vha, 0x20f0, 6641 "%s %d %8phC post del sess\n", 6642 __func__, __LINE__, 6643 fcport->port_name); 6644 qlt_schedule_sess_for_deletion(fcport); 6645 continue; 6646 } 6647 } 6648 } 6649 6650 if (fcport->scan_state == QLA_FCPORT_FOUND && 6651 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 6652 qla24xx_fcport_handle_login(vha, fcport); 6653 } 6654 return (rval); 6655 } 6656 6657 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 6658 int 6659 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 6660 { 6661 int loop_id = FC_NO_LOOP_ID; 6662 int lid = NPH_MGMT_SERVER - vha->vp_idx; 6663 unsigned long flags; 6664 struct qla_hw_data *ha = vha->hw; 6665 6666 if (vha->vp_idx == 0) { 6667 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 6668 return NPH_MGMT_SERVER; 6669 } 6670 6671 /* pick id from high and work down to low */ 6672 spin_lock_irqsave(&ha->vport_slock, flags); 6673 for (; lid > 0; lid--) { 6674 if (!test_bit(lid, vha->hw->loop_id_map)) { 6675 set_bit(lid, vha->hw->loop_id_map); 6676 loop_id = lid; 6677 break; 6678 } 6679 } 6680 spin_unlock_irqrestore(&ha->vport_slock, flags); 6681 6682 return loop_id; 6683 } 6684 6685 /* 6686 * qla2x00_fabric_login 6687 * Issue fabric login command. 6688 * 6689 * Input: 6690 * ha = adapter block pointer. 6691 * device = pointer to FC device type structure. 6692 * 6693 * Returns: 6694 * 0 - Login successfully 6695 * 1 - Login failed 6696 * 2 - Initiator device 6697 * 3 - Fatal error 6698 */ 6699 int 6700 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 6701 uint16_t *next_loopid) 6702 { 6703 int rval; 6704 int retry; 6705 uint16_t tmp_loopid; 6706 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6707 struct qla_hw_data *ha = vha->hw; 6708 6709 retry = 0; 6710 tmp_loopid = 0; 6711 6712 for (;;) { 6713 ql_dbg(ql_dbg_disc, vha, 0x2000, 6714 "Trying Fabric Login w/loop id 0x%04x for port " 6715 "%02x%02x%02x.\n", 6716 fcport->loop_id, fcport->d_id.b.domain, 6717 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6718 6719 /* Login fcport on switch. */ 6720 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 6721 fcport->d_id.b.domain, fcport->d_id.b.area, 6722 fcport->d_id.b.al_pa, mb, BIT_0); 6723 if (rval != QLA_SUCCESS) { 6724 return rval; 6725 } 6726 if (mb[0] == MBS_PORT_ID_USED) { 6727 /* 6728 * Device has another loop ID. The firmware team 6729 * recommends the driver perform an implicit login with 6730 * the specified ID again. The ID we just used is save 6731 * here so we return with an ID that can be tried by 6732 * the next login. 6733 */ 6734 retry++; 6735 tmp_loopid = fcport->loop_id; 6736 fcport->loop_id = mb[1]; 6737 6738 ql_dbg(ql_dbg_disc, vha, 0x2001, 6739 "Fabric Login: port in use - next loop " 6740 "id=0x%04x, port id= %02x%02x%02x.\n", 6741 fcport->loop_id, fcport->d_id.b.domain, 6742 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6743 6744 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6745 /* 6746 * Login succeeded. 6747 */ 6748 if (retry) { 6749 /* A retry occurred before. */ 6750 *next_loopid = tmp_loopid; 6751 } else { 6752 /* 6753 * No retry occurred before. Just increment the 6754 * ID value for next login. 6755 */ 6756 *next_loopid = (fcport->loop_id + 1); 6757 } 6758 6759 if (mb[1] & BIT_0) { 6760 fcport->port_type = FCT_INITIATOR; 6761 } else { 6762 fcport->port_type = FCT_TARGET; 6763 if (mb[1] & BIT_1) { 6764 fcport->flags |= FCF_FCP2_DEVICE; 6765 } 6766 } 6767 6768 if (mb[10] & BIT_0) 6769 fcport->supported_classes |= FC_COS_CLASS2; 6770 if (mb[10] & BIT_1) 6771 fcport->supported_classes |= FC_COS_CLASS3; 6772 6773 if (IS_FWI2_CAPABLE(ha)) { 6774 if (mb[10] & BIT_7) 6775 fcport->flags |= 6776 FCF_CONF_COMP_SUPPORTED; 6777 } 6778 6779 rval = QLA_SUCCESS; 6780 break; 6781 } else if (mb[0] == MBS_LOOP_ID_USED) { 6782 /* 6783 * Loop ID already used, try next loop ID. 6784 */ 6785 fcport->loop_id++; 6786 rval = qla2x00_find_new_loop_id(vha, fcport); 6787 if (rval != QLA_SUCCESS) { 6788 /* Ran out of loop IDs to use */ 6789 break; 6790 } 6791 } else if (mb[0] == MBS_COMMAND_ERROR) { 6792 /* 6793 * Firmware possibly timed out during login. If NO 6794 * retries are left to do then the device is declared 6795 * dead. 6796 */ 6797 *next_loopid = fcport->loop_id; 6798 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6799 fcport->d_id.b.domain, fcport->d_id.b.area, 6800 fcport->d_id.b.al_pa); 6801 qla2x00_mark_device_lost(vha, fcport, 1); 6802 6803 rval = 1; 6804 break; 6805 } else { 6806 /* 6807 * unrecoverable / not handled error 6808 */ 6809 ql_dbg(ql_dbg_disc, vha, 0x2002, 6810 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6811 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6812 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6813 fcport->loop_id, jiffies); 6814 6815 *next_loopid = fcport->loop_id; 6816 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6817 fcport->d_id.b.domain, fcport->d_id.b.area, 6818 fcport->d_id.b.al_pa); 6819 qla2x00_clear_loop_id(fcport); 6820 fcport->login_retry = 0; 6821 6822 rval = 3; 6823 break; 6824 } 6825 } 6826 6827 return (rval); 6828 } 6829 6830 /* 6831 * qla2x00_local_device_login 6832 * Issue local device login command. 6833 * 6834 * Input: 6835 * ha = adapter block pointer. 6836 * loop_id = loop id of device to login to. 6837 * 6838 * Returns (Where's the #define!!!!): 6839 * 0 - Login successfully 6840 * 1 - Login failed 6841 * 3 - Fatal error 6842 */ 6843 int 6844 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6845 { 6846 int rval; 6847 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6848 6849 memset(mb, 0, sizeof(mb)); 6850 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6851 if (rval == QLA_SUCCESS) { 6852 /* Interrogate mailbox registers for any errors */ 6853 if (mb[0] == MBS_COMMAND_ERROR) 6854 rval = 1; 6855 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6856 /* device not in PCB table */ 6857 rval = 3; 6858 } 6859 6860 return (rval); 6861 } 6862 6863 /* 6864 * qla2x00_loop_resync 6865 * Resync with fibre channel devices. 6866 * 6867 * Input: 6868 * ha = adapter block pointer. 6869 * 6870 * Returns: 6871 * 0 = success 6872 */ 6873 int 6874 qla2x00_loop_resync(scsi_qla_host_t *vha) 6875 { 6876 int rval = QLA_SUCCESS; 6877 uint32_t wait_time; 6878 6879 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6880 if (vha->flags.online) { 6881 if (!(rval = qla2x00_fw_ready(vha))) { 6882 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6883 wait_time = 256; 6884 do { 6885 if (!IS_QLAFX00(vha->hw)) { 6886 /* 6887 * Issue a marker after FW becomes 6888 * ready. 6889 */ 6890 qla2x00_marker(vha, vha->hw->base_qpair, 6891 0, 0, MK_SYNC_ALL); 6892 vha->marker_needed = 0; 6893 } 6894 6895 /* Remap devices on Loop. */ 6896 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6897 6898 if (IS_QLAFX00(vha->hw)) 6899 qlafx00_configure_devices(vha); 6900 else 6901 qla2x00_configure_loop(vha); 6902 6903 wait_time--; 6904 } while (!atomic_read(&vha->loop_down_timer) && 6905 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6906 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6907 &vha->dpc_flags))); 6908 } 6909 } 6910 6911 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6912 return (QLA_FUNCTION_FAILED); 6913 6914 if (rval) 6915 ql_dbg(ql_dbg_disc, vha, 0x206c, 6916 "%s *** FAILED ***.\n", __func__); 6917 6918 return (rval); 6919 } 6920 6921 /* 6922 * qla2x00_perform_loop_resync 6923 * Description: This function will set the appropriate flags and call 6924 * qla2x00_loop_resync. If successful loop will be resynced 6925 * Arguments : scsi_qla_host_t pointer 6926 * returm : Success or Failure 6927 */ 6928 6929 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6930 { 6931 int32_t rval = 0; 6932 6933 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6934 /*Configure the flags so that resync happens properly*/ 6935 atomic_set(&ha->loop_down_timer, 0); 6936 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6937 atomic_set(&ha->loop_state, LOOP_UP); 6938 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6939 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6940 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6941 6942 rval = qla2x00_loop_resync(ha); 6943 } else 6944 atomic_set(&ha->loop_state, LOOP_DEAD); 6945 6946 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6947 } 6948 6949 return rval; 6950 } 6951 6952 /* Assumes idc_lock always held on entry */ 6953 void 6954 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6955 { 6956 struct qla_hw_data *ha = vha->hw; 6957 uint32_t drv_presence, drv_presence_mask; 6958 uint32_t dev_part_info1, dev_part_info2, class_type; 6959 uint32_t class_type_mask = 0x3; 6960 uint16_t fcoe_other_function = 0xffff, i; 6961 6962 if (IS_QLA8044(ha)) { 6963 drv_presence = qla8044_rd_direct(vha, 6964 QLA8044_CRB_DRV_ACTIVE_INDEX); 6965 dev_part_info1 = qla8044_rd_direct(vha, 6966 QLA8044_CRB_DEV_PART_INFO_INDEX); 6967 dev_part_info2 = qla8044_rd_direct(vha, 6968 QLA8044_CRB_DEV_PART_INFO2); 6969 } else { 6970 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6971 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6972 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6973 } 6974 for (i = 0; i < 8; i++) { 6975 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6976 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6977 (i != ha->portnum)) { 6978 fcoe_other_function = i; 6979 break; 6980 } 6981 } 6982 if (fcoe_other_function == 0xffff) { 6983 for (i = 0; i < 8; i++) { 6984 class_type = ((dev_part_info2 >> (i * 4)) & 6985 class_type_mask); 6986 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6987 ((i + 8) != ha->portnum)) { 6988 fcoe_other_function = i + 8; 6989 break; 6990 } 6991 } 6992 } 6993 /* 6994 * Prepare drv-presence mask based on fcoe functions present. 6995 * However consider only valid physical fcoe function numbers (0-15). 6996 */ 6997 drv_presence_mask = ~((1 << (ha->portnum)) | 6998 ((fcoe_other_function == 0xffff) ? 6999 0 : (1 << (fcoe_other_function)))); 7000 7001 /* We are the reset owner iff: 7002 * - No other protocol drivers present. 7003 * - This is the lowest among fcoe functions. */ 7004 if (!(drv_presence & drv_presence_mask) && 7005 (ha->portnum < fcoe_other_function)) { 7006 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 7007 "This host is Reset owner.\n"); 7008 ha->flags.nic_core_reset_owner = 1; 7009 } 7010 } 7011 7012 static int 7013 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 7014 { 7015 int rval = QLA_SUCCESS; 7016 struct qla_hw_data *ha = vha->hw; 7017 uint32_t drv_ack; 7018 7019 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 7020 if (rval == QLA_SUCCESS) { 7021 drv_ack |= (1 << ha->portnum); 7022 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 7023 } 7024 7025 return rval; 7026 } 7027 7028 static int 7029 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 7030 { 7031 int rval = QLA_SUCCESS; 7032 struct qla_hw_data *ha = vha->hw; 7033 uint32_t drv_ack; 7034 7035 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 7036 if (rval == QLA_SUCCESS) { 7037 drv_ack &= ~(1 << ha->portnum); 7038 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 7039 } 7040 7041 return rval; 7042 } 7043 7044 /* Assumes idc-lock always held on entry */ 7045 void 7046 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 7047 { 7048 struct qla_hw_data *ha = vha->hw; 7049 uint32_t idc_audit_reg = 0, duration_secs = 0; 7050 7051 switch (audit_type) { 7052 case IDC_AUDIT_TIMESTAMP: 7053 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 7054 idc_audit_reg = (ha->portnum) | 7055 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 7056 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 7057 break; 7058 7059 case IDC_AUDIT_COMPLETION: 7060 duration_secs = ((jiffies_to_msecs(jiffies) - 7061 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 7062 idc_audit_reg = (ha->portnum) | 7063 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 7064 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 7065 break; 7066 7067 default: 7068 ql_log(ql_log_warn, vha, 0xb078, 7069 "Invalid audit type specified.\n"); 7070 break; 7071 } 7072 } 7073 7074 /* Assumes idc_lock always held on entry */ 7075 static int 7076 qla83xx_initiating_reset(scsi_qla_host_t *vha) 7077 { 7078 struct qla_hw_data *ha = vha->hw; 7079 uint32_t idc_control, dev_state; 7080 7081 __qla83xx_get_idc_control(vha, &idc_control); 7082 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 7083 ql_log(ql_log_info, vha, 0xb080, 7084 "NIC Core reset has been disabled. idc-control=0x%x\n", 7085 idc_control); 7086 return QLA_FUNCTION_FAILED; 7087 } 7088 7089 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 7090 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 7091 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 7092 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 7093 QLA8XXX_DEV_NEED_RESET); 7094 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 7095 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 7096 } else { 7097 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", 7098 qdev_state(dev_state)); 7099 7100 /* SV: XXX: Is timeout required here? */ 7101 /* Wait for IDC state change READY -> NEED_RESET */ 7102 while (dev_state == QLA8XXX_DEV_READY) { 7103 qla83xx_idc_unlock(vha, 0); 7104 msleep(200); 7105 qla83xx_idc_lock(vha, 0); 7106 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 7107 } 7108 } 7109 7110 /* Send IDC ack by writing to drv-ack register */ 7111 __qla83xx_set_drv_ack(vha); 7112 7113 return QLA_SUCCESS; 7114 } 7115 7116 int 7117 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 7118 { 7119 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 7120 } 7121 7122 int 7123 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 7124 { 7125 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 7126 } 7127 7128 static int 7129 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 7130 { 7131 uint32_t drv_presence = 0; 7132 struct qla_hw_data *ha = vha->hw; 7133 7134 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 7135 if (drv_presence & (1 << ha->portnum)) 7136 return QLA_SUCCESS; 7137 else 7138 return QLA_TEST_FAILED; 7139 } 7140 7141 int 7142 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 7143 { 7144 int rval = QLA_SUCCESS; 7145 struct qla_hw_data *ha = vha->hw; 7146 7147 ql_dbg(ql_dbg_p3p, vha, 0xb058, 7148 "Entered %s().\n", __func__); 7149 7150 if (vha->device_flags & DFLG_DEV_FAILED) { 7151 ql_log(ql_log_warn, vha, 0xb059, 7152 "Device in unrecoverable FAILED state.\n"); 7153 return QLA_FUNCTION_FAILED; 7154 } 7155 7156 qla83xx_idc_lock(vha, 0); 7157 7158 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 7159 ql_log(ql_log_warn, vha, 0xb05a, 7160 "Function=0x%x has been removed from IDC participation.\n", 7161 ha->portnum); 7162 rval = QLA_FUNCTION_FAILED; 7163 goto exit; 7164 } 7165 7166 qla83xx_reset_ownership(vha); 7167 7168 rval = qla83xx_initiating_reset(vha); 7169 7170 /* 7171 * Perform reset if we are the reset-owner, 7172 * else wait till IDC state changes to READY/FAILED. 7173 */ 7174 if (rval == QLA_SUCCESS) { 7175 rval = qla83xx_idc_state_handler(vha); 7176 7177 if (rval == QLA_SUCCESS) 7178 ha->flags.nic_core_hung = 0; 7179 __qla83xx_clear_drv_ack(vha); 7180 } 7181 7182 exit: 7183 qla83xx_idc_unlock(vha, 0); 7184 7185 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 7186 7187 return rval; 7188 } 7189 7190 int 7191 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 7192 { 7193 struct qla_hw_data *ha = vha->hw; 7194 int rval = QLA_FUNCTION_FAILED; 7195 7196 if (!IS_MCTP_CAPABLE(ha)) { 7197 /* This message can be removed from the final version */ 7198 ql_log(ql_log_info, vha, 0x506d, 7199 "This board is not MCTP capable\n"); 7200 return rval; 7201 } 7202 7203 if (!ha->mctp_dump) { 7204 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 7205 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 7206 7207 if (!ha->mctp_dump) { 7208 ql_log(ql_log_warn, vha, 0x506e, 7209 "Failed to allocate memory for mctp dump\n"); 7210 return rval; 7211 } 7212 } 7213 7214 #define MCTP_DUMP_STR_ADDR 0x00000000 7215 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 7216 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 7217 if (rval != QLA_SUCCESS) { 7218 ql_log(ql_log_warn, vha, 0x506f, 7219 "Failed to capture mctp dump\n"); 7220 } else { 7221 ql_log(ql_log_info, vha, 0x5070, 7222 "Mctp dump capture for host (%ld/%p).\n", 7223 vha->host_no, ha->mctp_dump); 7224 ha->mctp_dumped = 1; 7225 } 7226 7227 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 7228 ha->flags.nic_core_reset_hdlr_active = 1; 7229 rval = qla83xx_restart_nic_firmware(vha); 7230 if (rval) 7231 /* NIC Core reset failed. */ 7232 ql_log(ql_log_warn, vha, 0x5071, 7233 "Failed to restart nic firmware\n"); 7234 else 7235 ql_dbg(ql_dbg_p3p, vha, 0xb084, 7236 "Restarted NIC firmware successfully.\n"); 7237 ha->flags.nic_core_reset_hdlr_active = 0; 7238 } 7239 7240 return rval; 7241 7242 } 7243 7244 /* 7245 * qla2x00_quiesce_io 7246 * Description: This function will block the new I/Os 7247 * Its not aborting any I/Os as context 7248 * is not destroyed during quiescence 7249 * Arguments: scsi_qla_host_t 7250 * return : void 7251 */ 7252 void 7253 qla2x00_quiesce_io(scsi_qla_host_t *vha) 7254 { 7255 struct qla_hw_data *ha = vha->hw; 7256 struct scsi_qla_host *vp, *tvp; 7257 unsigned long flags; 7258 7259 ql_dbg(ql_dbg_dpc, vha, 0x401d, 7260 "Quiescing I/O - ha=%p.\n", ha); 7261 7262 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 7263 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7264 atomic_set(&vha->loop_state, LOOP_DOWN); 7265 qla2x00_mark_all_devices_lost(vha); 7266 7267 spin_lock_irqsave(&ha->vport_slock, flags); 7268 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7269 atomic_inc(&vp->vref_count); 7270 spin_unlock_irqrestore(&ha->vport_slock, flags); 7271 7272 qla2x00_mark_all_devices_lost(vp); 7273 7274 spin_lock_irqsave(&ha->vport_slock, flags); 7275 atomic_dec(&vp->vref_count); 7276 } 7277 spin_unlock_irqrestore(&ha->vport_slock, flags); 7278 } else { 7279 if (!atomic_read(&vha->loop_down_timer)) 7280 atomic_set(&vha->loop_down_timer, 7281 LOOP_DOWN_TIME); 7282 } 7283 /* Wait for pending cmds to complete */ 7284 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 7285 != QLA_SUCCESS); 7286 } 7287 7288 void 7289 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 7290 { 7291 struct qla_hw_data *ha = vha->hw; 7292 struct scsi_qla_host *vp, *tvp; 7293 unsigned long flags; 7294 fc_port_t *fcport; 7295 u16 i; 7296 7297 /* For ISP82XX, driver waits for completion of the commands. 7298 * online flag should be set. 7299 */ 7300 if (!(IS_P3P_TYPE(ha))) 7301 vha->flags.online = 0; 7302 ha->flags.chip_reset_done = 0; 7303 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 7304 vha->qla_stats.total_isp_aborts++; 7305 7306 ql_log(ql_log_info, vha, 0x00af, 7307 "Performing ISP error recovery - ha=%p.\n", ha); 7308 7309 ha->flags.purge_mbox = 1; 7310 /* For ISP82XX, reset_chip is just disabling interrupts. 7311 * Driver waits for the completion of the commands. 7312 * the interrupts need to be enabled. 7313 */ 7314 if (!(IS_P3P_TYPE(ha))) 7315 ha->isp_ops->reset_chip(vha); 7316 7317 ha->link_data_rate = PORT_SPEED_UNKNOWN; 7318 SAVE_TOPO(ha); 7319 ha->flags.rida_fmt2 = 0; 7320 ha->flags.n2n_ae = 0; 7321 ha->flags.lip_ae = 0; 7322 ha->current_topology = 0; 7323 QLA_FW_STOPPED(ha); 7324 ha->flags.fw_init_done = 0; 7325 ha->chip_reset++; 7326 ha->base_qpair->chip_reset = ha->chip_reset; 7327 ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0; 7328 ha->base_qpair->prev_completion_cnt = 0; 7329 for (i = 0; i < ha->max_qpairs; i++) { 7330 if (ha->queue_pair_map[i]) { 7331 ha->queue_pair_map[i]->chip_reset = 7332 ha->base_qpair->chip_reset; 7333 ha->queue_pair_map[i]->cmd_cnt = 7334 ha->queue_pair_map[i]->cmd_completion_cnt = 0; 7335 ha->base_qpair->prev_completion_cnt = 0; 7336 } 7337 } 7338 7339 /* purge MBox commands */ 7340 if (atomic_read(&ha->num_pend_mbx_stage3)) { 7341 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 7342 complete(&ha->mbx_intr_comp); 7343 } 7344 7345 i = 0; 7346 while (atomic_read(&ha->num_pend_mbx_stage3) || 7347 atomic_read(&ha->num_pend_mbx_stage2) || 7348 atomic_read(&ha->num_pend_mbx_stage1)) { 7349 msleep(20); 7350 i++; 7351 if (i > 50) 7352 break; 7353 } 7354 ha->flags.purge_mbox = 0; 7355 7356 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 7357 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7358 atomic_set(&vha->loop_state, LOOP_DOWN); 7359 qla2x00_mark_all_devices_lost(vha); 7360 7361 spin_lock_irqsave(&ha->vport_slock, flags); 7362 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7363 atomic_inc(&vp->vref_count); 7364 spin_unlock_irqrestore(&ha->vport_slock, flags); 7365 7366 qla2x00_mark_all_devices_lost(vp); 7367 7368 spin_lock_irqsave(&ha->vport_slock, flags); 7369 atomic_dec(&vp->vref_count); 7370 } 7371 spin_unlock_irqrestore(&ha->vport_slock, flags); 7372 } else { 7373 if (!atomic_read(&vha->loop_down_timer)) 7374 atomic_set(&vha->loop_down_timer, 7375 LOOP_DOWN_TIME); 7376 } 7377 7378 /* Clear all async request states across all VPs. */ 7379 list_for_each_entry(fcport, &vha->vp_fcports, list) { 7380 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7381 fcport->scan_state = 0; 7382 } 7383 spin_lock_irqsave(&ha->vport_slock, flags); 7384 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7385 atomic_inc(&vp->vref_count); 7386 spin_unlock_irqrestore(&ha->vport_slock, flags); 7387 7388 list_for_each_entry(fcport, &vp->vp_fcports, list) 7389 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7390 7391 spin_lock_irqsave(&ha->vport_slock, flags); 7392 atomic_dec(&vp->vref_count); 7393 } 7394 spin_unlock_irqrestore(&ha->vport_slock, flags); 7395 7396 /* Make sure for ISP 82XX IO DMA is complete */ 7397 if (IS_P3P_TYPE(ha)) { 7398 qla82xx_chip_reset_cleanup(vha); 7399 ql_log(ql_log_info, vha, 0x00b4, 7400 "Done chip reset cleanup.\n"); 7401 7402 /* Done waiting for pending commands. Reset online flag */ 7403 vha->flags.online = 0; 7404 } 7405 7406 /* Requeue all commands in outstanding command list. */ 7407 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 7408 /* memory barrier */ 7409 wmb(); 7410 } 7411 7412 /* 7413 * qla2x00_abort_isp 7414 * Resets ISP and aborts all outstanding commands. 7415 * 7416 * Input: 7417 * ha = adapter block pointer. 7418 * 7419 * Returns: 7420 * 0 = success 7421 */ 7422 int 7423 qla2x00_abort_isp(scsi_qla_host_t *vha) 7424 { 7425 int rval; 7426 uint8_t status = 0; 7427 struct qla_hw_data *ha = vha->hw; 7428 struct scsi_qla_host *vp, *tvp; 7429 struct req_que *req = ha->req_q_map[0]; 7430 unsigned long flags; 7431 7432 if (vha->flags.online) { 7433 qla2x00_abort_isp_cleanup(vha); 7434 7435 vha->dport_status |= DPORT_DIAG_CHIP_RESET_IN_PROGRESS; 7436 vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS; 7437 7438 if (vha->hw->flags.port_isolated) 7439 return status; 7440 7441 if (qla2x00_isp_reg_stat(ha)) { 7442 ql_log(ql_log_info, vha, 0x803f, 7443 "ISP Abort - ISP reg disconnect, exiting.\n"); 7444 return status; 7445 } 7446 7447 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 7448 ha->flags.chip_reset_done = 1; 7449 vha->flags.online = 1; 7450 status = 0; 7451 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7452 return status; 7453 } 7454 7455 if (IS_QLA8031(ha)) { 7456 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 7457 "Clearing fcoe driver presence.\n"); 7458 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 7459 ql_dbg(ql_dbg_p3p, vha, 0xb073, 7460 "Error while clearing DRV-Presence.\n"); 7461 } 7462 7463 if (unlikely(pci_channel_offline(ha->pdev) && 7464 ha->flags.pci_channel_io_perm_failure)) { 7465 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7466 status = 0; 7467 return status; 7468 } 7469 7470 switch (vha->qlini_mode) { 7471 case QLA2XXX_INI_MODE_DISABLED: 7472 if (!qla_tgt_mode_enabled(vha)) 7473 return 0; 7474 break; 7475 case QLA2XXX_INI_MODE_DUAL: 7476 if (!qla_dual_mode_enabled(vha) && 7477 !qla_ini_mode_enabled(vha)) 7478 return 0; 7479 break; 7480 case QLA2XXX_INI_MODE_ENABLED: 7481 default: 7482 break; 7483 } 7484 7485 ha->isp_ops->get_flash_version(vha, req->ring); 7486 7487 if (qla2x00_isp_reg_stat(ha)) { 7488 ql_log(ql_log_info, vha, 0x803f, 7489 "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n"); 7490 return status; 7491 } 7492 ha->isp_ops->nvram_config(vha); 7493 7494 if (qla2x00_isp_reg_stat(ha)) { 7495 ql_log(ql_log_info, vha, 0x803f, 7496 "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n"); 7497 return status; 7498 } 7499 if (!qla2x00_restart_isp(vha)) { 7500 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7501 7502 if (!atomic_read(&vha->loop_down_timer)) { 7503 /* 7504 * Issue marker command only when we are going 7505 * to start the I/O . 7506 */ 7507 vha->marker_needed = 1; 7508 } 7509 7510 vha->flags.online = 1; 7511 7512 ha->isp_ops->enable_intrs(ha); 7513 7514 ha->isp_abort_cnt = 0; 7515 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7516 7517 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 7518 qla2x00_get_fw_version(vha); 7519 if (ha->fce) { 7520 ha->flags.fce_enabled = 1; 7521 memset(ha->fce, 0, 7522 fce_calc_size(ha->fce_bufs)); 7523 rval = qla2x00_enable_fce_trace(vha, 7524 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 7525 &ha->fce_bufs); 7526 if (rval) { 7527 ql_log(ql_log_warn, vha, 0x8033, 7528 "Unable to reinitialize FCE " 7529 "(%d).\n", rval); 7530 ha->flags.fce_enabled = 0; 7531 } 7532 } 7533 7534 if (ha->eft) { 7535 memset(ha->eft, 0, EFT_SIZE); 7536 rval = qla2x00_enable_eft_trace(vha, 7537 ha->eft_dma, EFT_NUM_BUFFERS); 7538 if (rval) { 7539 ql_log(ql_log_warn, vha, 0x8034, 7540 "Unable to reinitialize EFT " 7541 "(%d).\n", rval); 7542 } 7543 } 7544 } else { /* failed the ISP abort */ 7545 vha->flags.online = 1; 7546 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 7547 if (ha->isp_abort_cnt == 0) { 7548 ql_log(ql_log_fatal, vha, 0x8035, 7549 "ISP error recover failed - " 7550 "board disabled.\n"); 7551 /* 7552 * The next call disables the board 7553 * completely. 7554 */ 7555 qla2x00_abort_isp_cleanup(vha); 7556 vha->flags.online = 0; 7557 clear_bit(ISP_ABORT_RETRY, 7558 &vha->dpc_flags); 7559 status = 0; 7560 } else { /* schedule another ISP abort */ 7561 ha->isp_abort_cnt--; 7562 ql_dbg(ql_dbg_taskm, vha, 0x8020, 7563 "ISP abort - retry remaining %d.\n", 7564 ha->isp_abort_cnt); 7565 status = 1; 7566 } 7567 } else { 7568 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 7569 ql_dbg(ql_dbg_taskm, vha, 0x8021, 7570 "ISP error recovery - retrying (%d) " 7571 "more times.\n", ha->isp_abort_cnt); 7572 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7573 status = 1; 7574 } 7575 } 7576 7577 } 7578 7579 if (vha->hw->flags.port_isolated) { 7580 qla2x00_abort_isp_cleanup(vha); 7581 return status; 7582 } 7583 7584 if (!status) { 7585 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 7586 qla2x00_configure_hba(vha); 7587 spin_lock_irqsave(&ha->vport_slock, flags); 7588 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7589 if (vp->vp_idx) { 7590 atomic_inc(&vp->vref_count); 7591 spin_unlock_irqrestore(&ha->vport_slock, flags); 7592 7593 qla2x00_vp_abort_isp(vp); 7594 7595 spin_lock_irqsave(&ha->vport_slock, flags); 7596 atomic_dec(&vp->vref_count); 7597 } 7598 } 7599 spin_unlock_irqrestore(&ha->vport_slock, flags); 7600 7601 if (IS_QLA8031(ha)) { 7602 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 7603 "Setting back fcoe driver presence.\n"); 7604 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 7605 ql_dbg(ql_dbg_p3p, vha, 0xb074, 7606 "Error while setting DRV-Presence.\n"); 7607 } 7608 } else { 7609 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 7610 __func__); 7611 } 7612 7613 return(status); 7614 } 7615 7616 /* 7617 * qla2x00_restart_isp 7618 * restarts the ISP after a reset 7619 * 7620 * Input: 7621 * ha = adapter block pointer. 7622 * 7623 * Returns: 7624 * 0 = success 7625 */ 7626 static int 7627 qla2x00_restart_isp(scsi_qla_host_t *vha) 7628 { 7629 int status; 7630 struct qla_hw_data *ha = vha->hw; 7631 7632 /* If firmware needs to be loaded */ 7633 if (qla2x00_isp_firmware(vha)) { 7634 vha->flags.online = 0; 7635 status = ha->isp_ops->chip_diag(vha); 7636 if (status) 7637 return status; 7638 status = qla2x00_setup_chip(vha); 7639 if (status) 7640 return status; 7641 } 7642 7643 status = qla2x00_init_rings(vha); 7644 if (status) 7645 return status; 7646 7647 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7648 ha->flags.chip_reset_done = 1; 7649 7650 /* Initialize the queues in use */ 7651 qla25xx_init_queues(ha); 7652 7653 status = qla2x00_fw_ready(vha); 7654 if (status) { 7655 /* if no cable then assume it's good */ 7656 return vha->device_flags & DFLG_NO_CABLE ? 0 : status; 7657 } 7658 7659 /* Issue a marker after FW becomes ready. */ 7660 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7661 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7662 7663 return 0; 7664 } 7665 7666 static int 7667 qla25xx_init_queues(struct qla_hw_data *ha) 7668 { 7669 struct rsp_que *rsp = NULL; 7670 struct req_que *req = NULL; 7671 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7672 int ret = -1; 7673 int i; 7674 7675 for (i = 1; i < ha->max_rsp_queues; i++) { 7676 rsp = ha->rsp_q_map[i]; 7677 if (rsp && test_bit(i, ha->rsp_qid_map)) { 7678 rsp->options &= ~BIT_0; 7679 ret = qla25xx_init_rsp_que(base_vha, rsp); 7680 if (ret != QLA_SUCCESS) 7681 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 7682 "%s Rsp que: %d init failed.\n", 7683 __func__, rsp->id); 7684 else 7685 ql_dbg(ql_dbg_init, base_vha, 0x0100, 7686 "%s Rsp que: %d inited.\n", 7687 __func__, rsp->id); 7688 } 7689 } 7690 for (i = 1; i < ha->max_req_queues; i++) { 7691 req = ha->req_q_map[i]; 7692 if (req && test_bit(i, ha->req_qid_map)) { 7693 /* Clear outstanding commands array. */ 7694 req->options &= ~BIT_0; 7695 ret = qla25xx_init_req_que(base_vha, req); 7696 if (ret != QLA_SUCCESS) 7697 ql_dbg(ql_dbg_init, base_vha, 0x0101, 7698 "%s Req que: %d init failed.\n", 7699 __func__, req->id); 7700 else 7701 ql_dbg(ql_dbg_init, base_vha, 0x0102, 7702 "%s Req que: %d inited.\n", 7703 __func__, req->id); 7704 } 7705 } 7706 return ret; 7707 } 7708 7709 /* 7710 * qla2x00_reset_adapter 7711 * Reset adapter. 7712 * 7713 * Input: 7714 * ha = adapter block pointer. 7715 */ 7716 int 7717 qla2x00_reset_adapter(scsi_qla_host_t *vha) 7718 { 7719 unsigned long flags = 0; 7720 struct qla_hw_data *ha = vha->hw; 7721 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7722 7723 vha->flags.online = 0; 7724 ha->isp_ops->disable_intrs(ha); 7725 7726 spin_lock_irqsave(&ha->hardware_lock, flags); 7727 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 7728 rd_reg_word(®->hccr); /* PCI Posting. */ 7729 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 7730 rd_reg_word(®->hccr); /* PCI Posting. */ 7731 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7732 7733 return QLA_SUCCESS; 7734 } 7735 7736 int 7737 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7738 { 7739 unsigned long flags = 0; 7740 struct qla_hw_data *ha = vha->hw; 7741 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7742 7743 if (IS_P3P_TYPE(ha)) 7744 return QLA_SUCCESS; 7745 7746 vha->flags.online = 0; 7747 ha->isp_ops->disable_intrs(ha); 7748 7749 spin_lock_irqsave(&ha->hardware_lock, flags); 7750 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 7751 rd_reg_dword(®->hccr); 7752 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 7753 rd_reg_dword(®->hccr); 7754 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7755 7756 if (IS_NOPOLLING_TYPE(ha)) 7757 ha->isp_ops->enable_intrs(ha); 7758 7759 return QLA_SUCCESS; 7760 } 7761 7762 /* On sparc systems, obtain port and node WWN from firmware 7763 * properties. 7764 */ 7765 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7766 struct nvram_24xx *nv) 7767 { 7768 #ifdef CONFIG_SPARC 7769 struct qla_hw_data *ha = vha->hw; 7770 struct pci_dev *pdev = ha->pdev; 7771 struct device_node *dp = pci_device_to_OF_node(pdev); 7772 const u8 *val; 7773 int len; 7774 7775 val = of_get_property(dp, "port-wwn", &len); 7776 if (val && len >= WWN_SIZE) 7777 memcpy(nv->port_name, val, WWN_SIZE); 7778 7779 val = of_get_property(dp, "node-wwn", &len); 7780 if (val && len >= WWN_SIZE) 7781 memcpy(nv->node_name, val, WWN_SIZE); 7782 #endif 7783 } 7784 7785 int 7786 qla24xx_nvram_config(scsi_qla_host_t *vha) 7787 { 7788 int rval; 7789 struct init_cb_24xx *icb; 7790 struct nvram_24xx *nv; 7791 __le32 *dptr; 7792 uint8_t *dptr1, *dptr2; 7793 uint32_t chksum; 7794 uint16_t cnt; 7795 struct qla_hw_data *ha = vha->hw; 7796 7797 rval = QLA_SUCCESS; 7798 icb = (struct init_cb_24xx *)ha->init_cb; 7799 nv = ha->nvram; 7800 7801 /* Determine NVRAM starting address. */ 7802 if (ha->port_no == 0) { 7803 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7804 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7805 } else { 7806 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7807 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7808 } 7809 7810 ha->nvram_size = sizeof(*nv); 7811 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7812 7813 /* Get VPD data into cache */ 7814 ha->vpd = ha->nvram + VPD_OFFSET; 7815 ha->isp_ops->read_nvram(vha, ha->vpd, 7816 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7817 7818 /* Get NVRAM data into cache and calculate checksum. */ 7819 dptr = (__force __le32 *)nv; 7820 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7821 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7822 chksum += le32_to_cpu(*dptr); 7823 7824 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7825 "Contents of NVRAM\n"); 7826 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7827 nv, ha->nvram_size); 7828 7829 /* Bad NVRAM data, set defaults parameters. */ 7830 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7831 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7832 /* Reset NVRAM data. */ 7833 ql_log(ql_log_warn, vha, 0x006b, 7834 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7835 chksum, nv->id, nv->nvram_version); 7836 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7837 ql_log(ql_log_warn, vha, 0x006c, 7838 "Falling back to functioning (yet invalid -- WWPN) " 7839 "defaults.\n"); 7840 7841 /* 7842 * Set default initialization control block. 7843 */ 7844 memset(nv, 0, ha->nvram_size); 7845 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7846 nv->version = cpu_to_le16(ICB_VERSION); 7847 nv->frame_payload_size = cpu_to_le16(2048); 7848 nv->execution_throttle = cpu_to_le16(0xFFFF); 7849 nv->exchange_count = cpu_to_le16(0); 7850 nv->hard_address = cpu_to_le16(124); 7851 nv->port_name[0] = 0x21; 7852 nv->port_name[1] = 0x00 + ha->port_no + 1; 7853 nv->port_name[2] = 0x00; 7854 nv->port_name[3] = 0xe0; 7855 nv->port_name[4] = 0x8b; 7856 nv->port_name[5] = 0x1c; 7857 nv->port_name[6] = 0x55; 7858 nv->port_name[7] = 0x86; 7859 nv->node_name[0] = 0x20; 7860 nv->node_name[1] = 0x00; 7861 nv->node_name[2] = 0x00; 7862 nv->node_name[3] = 0xe0; 7863 nv->node_name[4] = 0x8b; 7864 nv->node_name[5] = 0x1c; 7865 nv->node_name[6] = 0x55; 7866 nv->node_name[7] = 0x86; 7867 qla24xx_nvram_wwn_from_ofw(vha, nv); 7868 nv->login_retry_count = cpu_to_le16(8); 7869 nv->interrupt_delay_timer = cpu_to_le16(0); 7870 nv->login_timeout = cpu_to_le16(0); 7871 nv->firmware_options_1 = 7872 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7873 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7874 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7875 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7876 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7877 nv->efi_parameters = cpu_to_le32(0); 7878 nv->reset_delay = 5; 7879 nv->max_luns_per_target = cpu_to_le16(128); 7880 nv->port_down_retry_count = cpu_to_le16(30); 7881 nv->link_down_timeout = cpu_to_le16(30); 7882 7883 rval = 1; 7884 } 7885 7886 if (qla_tgt_mode_enabled(vha)) { 7887 /* Don't enable full login after initial LIP */ 7888 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7889 /* Don't enable LIP full login for initiator */ 7890 nv->host_p &= cpu_to_le32(~BIT_10); 7891 } 7892 7893 qlt_24xx_config_nvram_stage1(vha, nv); 7894 7895 /* Reset Initialization control block */ 7896 memset(icb, 0, ha->init_cb_size); 7897 7898 /* Copy 1st segment. */ 7899 dptr1 = (uint8_t *)icb; 7900 dptr2 = (uint8_t *)&nv->version; 7901 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7902 while (cnt--) 7903 *dptr1++ = *dptr2++; 7904 7905 icb->login_retry_count = nv->login_retry_count; 7906 icb->link_down_on_nos = nv->link_down_on_nos; 7907 7908 /* Copy 2nd segment. */ 7909 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7910 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7911 cnt = (uint8_t *)&icb->reserved_3 - 7912 (uint8_t *)&icb->interrupt_delay_timer; 7913 while (cnt--) 7914 *dptr1++ = *dptr2++; 7915 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7916 /* 7917 * Setup driver NVRAM options. 7918 */ 7919 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7920 "QLA2462"); 7921 7922 qlt_24xx_config_nvram_stage2(vha, icb); 7923 7924 if (nv->host_p & cpu_to_le32(BIT_15)) { 7925 /* Use alternate WWN? */ 7926 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7927 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7928 } 7929 7930 /* Prepare nodename */ 7931 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7932 /* 7933 * Firmware will apply the following mask if the nodename was 7934 * not provided. 7935 */ 7936 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7937 icb->node_name[0] &= 0xF0; 7938 } 7939 7940 /* Set host adapter parameters. */ 7941 ha->flags.disable_risc_code_load = 0; 7942 ha->flags.enable_lip_reset = 0; 7943 ha->flags.enable_lip_full_login = 7944 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7945 ha->flags.enable_target_reset = 7946 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7947 ha->flags.enable_led_scheme = 0; 7948 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7949 7950 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7951 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7952 7953 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7954 sizeof(ha->fw_seriallink_options24)); 7955 7956 /* save HBA serial number */ 7957 ha->serial0 = icb->port_name[5]; 7958 ha->serial1 = icb->port_name[6]; 7959 ha->serial2 = icb->port_name[7]; 7960 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7961 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7962 7963 icb->execution_throttle = cpu_to_le16(0xFFFF); 7964 7965 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7966 7967 /* Set minimum login_timeout to 4 seconds. */ 7968 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7969 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7970 if (le16_to_cpu(nv->login_timeout) < 4) 7971 nv->login_timeout = cpu_to_le16(4); 7972 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7973 7974 /* Set minimum RATOV to 100 tenths of a second. */ 7975 ha->r_a_tov = 100; 7976 7977 ha->loop_reset_delay = nv->reset_delay; 7978 7979 /* Link Down Timeout = 0: 7980 * 7981 * When Port Down timer expires we will start returning 7982 * I/O's to OS with "DID_NO_CONNECT". 7983 * 7984 * Link Down Timeout != 0: 7985 * 7986 * The driver waits for the link to come up after link down 7987 * before returning I/Os to OS with "DID_NO_CONNECT". 7988 */ 7989 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7990 ha->loop_down_abort_time = 7991 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7992 } else { 7993 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7994 ha->loop_down_abort_time = 7995 (LOOP_DOWN_TIME - ha->link_down_timeout); 7996 } 7997 7998 /* Need enough time to try and get the port back. */ 7999 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8000 if (qlport_down_retry) 8001 ha->port_down_retry_count = qlport_down_retry; 8002 8003 /* Set login_retry_count */ 8004 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8005 if (ha->port_down_retry_count == 8006 le16_to_cpu(nv->port_down_retry_count) && 8007 ha->port_down_retry_count > 3) 8008 ha->login_retry_count = ha->port_down_retry_count; 8009 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8010 ha->login_retry_count = ha->port_down_retry_count; 8011 if (ql2xloginretrycount) 8012 ha->login_retry_count = ql2xloginretrycount; 8013 8014 /* N2N: driver will initiate Login instead of FW */ 8015 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 8016 8017 /* Enable ZIO. */ 8018 if (!vha->flags.init_done) { 8019 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8020 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8021 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8022 le16_to_cpu(icb->interrupt_delay_timer) : 2; 8023 } 8024 icb->firmware_options_2 &= cpu_to_le32( 8025 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8026 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8027 ha->zio_mode = QLA_ZIO_MODE_6; 8028 8029 ql_log(ql_log_info, vha, 0x006f, 8030 "ZIO mode %d enabled; timer delay (%d us).\n", 8031 ha->zio_mode, ha->zio_timer * 100); 8032 8033 icb->firmware_options_2 |= cpu_to_le32( 8034 (uint32_t)ha->zio_mode); 8035 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8036 } 8037 8038 if (rval) { 8039 ql_log(ql_log_warn, vha, 0x0070, 8040 "NVRAM configuration failed.\n"); 8041 } 8042 return (rval); 8043 } 8044 8045 static void 8046 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 8047 struct qla27xx_image_status *image_status) 8048 { 8049 ql_dbg(ql_dbg_init, vha, 0x018b, 8050 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 8051 name, "status", 8052 image_status->image_status_mask, 8053 le16_to_cpu(image_status->generation), 8054 image_status->ver_major, 8055 image_status->ver_minor, 8056 image_status->bitmap, 8057 le32_to_cpu(image_status->checksum), 8058 le32_to_cpu(image_status->signature)); 8059 } 8060 8061 static bool 8062 qla28xx_check_aux_image_status_signature( 8063 struct qla27xx_image_status *image_status) 8064 { 8065 ulong signature = le32_to_cpu(image_status->signature); 8066 8067 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 8068 } 8069 8070 static bool 8071 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 8072 { 8073 ulong signature = le32_to_cpu(image_status->signature); 8074 8075 return 8076 signature != QLA27XX_IMG_STATUS_SIGN && 8077 signature != QLA28XX_IMG_STATUS_SIGN; 8078 } 8079 8080 static ulong 8081 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 8082 { 8083 __le32 *p = (__force __le32 *)image_status; 8084 uint n = sizeof(*image_status) / sizeof(*p); 8085 uint32_t sum = 0; 8086 8087 for ( ; n--; p++) 8088 sum += le32_to_cpup(p); 8089 8090 return sum; 8091 } 8092 8093 static inline uint 8094 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 8095 { 8096 return aux->bitmap & bitmask ? 8097 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 8098 } 8099 8100 static void 8101 qla28xx_component_status( 8102 struct active_regions *active_regions, struct qla27xx_image_status *aux) 8103 { 8104 active_regions->aux.board_config = 8105 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 8106 8107 active_regions->aux.vpd_nvram = 8108 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 8109 8110 active_regions->aux.npiv_config_0_1 = 8111 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 8112 8113 active_regions->aux.npiv_config_2_3 = 8114 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 8115 8116 active_regions->aux.nvme_params = 8117 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NVME_PARAMS); 8118 } 8119 8120 static int 8121 qla27xx_compare_image_generation( 8122 struct qla27xx_image_status *pri_image_status, 8123 struct qla27xx_image_status *sec_image_status) 8124 { 8125 /* calculate generation delta as uint16 (this accounts for wrap) */ 8126 int16_t delta = 8127 le16_to_cpu(pri_image_status->generation) - 8128 le16_to_cpu(sec_image_status->generation); 8129 8130 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 8131 8132 return delta; 8133 } 8134 8135 void 8136 qla28xx_get_aux_images( 8137 struct scsi_qla_host *vha, struct active_regions *active_regions) 8138 { 8139 struct qla_hw_data *ha = vha->hw; 8140 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 8141 bool valid_pri_image = false, valid_sec_image = false; 8142 bool active_pri_image = false, active_sec_image = false; 8143 8144 if (!ha->flt_region_aux_img_status_pri) { 8145 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 8146 goto check_sec_image; 8147 } 8148 8149 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status, 8150 ha->flt_region_aux_img_status_pri, 8151 sizeof(pri_aux_image_status) >> 2); 8152 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 8153 8154 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 8155 ql_dbg(ql_dbg_init, vha, 0x018b, 8156 "Primary aux image signature (%#x) not valid\n", 8157 le32_to_cpu(pri_aux_image_status.signature)); 8158 goto check_sec_image; 8159 } 8160 8161 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 8162 ql_dbg(ql_dbg_init, vha, 0x018c, 8163 "Primary aux image checksum failed\n"); 8164 goto check_sec_image; 8165 } 8166 8167 valid_pri_image = true; 8168 8169 if (pri_aux_image_status.image_status_mask & 1) { 8170 ql_dbg(ql_dbg_init, vha, 0x018d, 8171 "Primary aux image is active\n"); 8172 active_pri_image = true; 8173 } 8174 8175 check_sec_image: 8176 if (!ha->flt_region_aux_img_status_sec) { 8177 ql_dbg(ql_dbg_init, vha, 0x018a, 8178 "Secondary aux image not addressed\n"); 8179 goto check_valid_image; 8180 } 8181 8182 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status, 8183 ha->flt_region_aux_img_status_sec, 8184 sizeof(sec_aux_image_status) >> 2); 8185 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 8186 8187 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 8188 ql_dbg(ql_dbg_init, vha, 0x018b, 8189 "Secondary aux image signature (%#x) not valid\n", 8190 le32_to_cpu(sec_aux_image_status.signature)); 8191 goto check_valid_image; 8192 } 8193 8194 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 8195 ql_dbg(ql_dbg_init, vha, 0x018c, 8196 "Secondary aux image checksum failed\n"); 8197 goto check_valid_image; 8198 } 8199 8200 valid_sec_image = true; 8201 8202 if (sec_aux_image_status.image_status_mask & 1) { 8203 ql_dbg(ql_dbg_init, vha, 0x018d, 8204 "Secondary aux image is active\n"); 8205 active_sec_image = true; 8206 } 8207 8208 check_valid_image: 8209 if (valid_pri_image && active_pri_image && 8210 valid_sec_image && active_sec_image) { 8211 if (qla27xx_compare_image_generation(&pri_aux_image_status, 8212 &sec_aux_image_status) >= 0) { 8213 qla28xx_component_status(active_regions, 8214 &pri_aux_image_status); 8215 } else { 8216 qla28xx_component_status(active_regions, 8217 &sec_aux_image_status); 8218 } 8219 } else if (valid_pri_image && active_pri_image) { 8220 qla28xx_component_status(active_regions, &pri_aux_image_status); 8221 } else if (valid_sec_image && active_sec_image) { 8222 qla28xx_component_status(active_regions, &sec_aux_image_status); 8223 } 8224 8225 ql_dbg(ql_dbg_init, vha, 0x018f, 8226 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u, NVME=%u\n", 8227 active_regions->aux.board_config, 8228 active_regions->aux.vpd_nvram, 8229 active_regions->aux.npiv_config_0_1, 8230 active_regions->aux.npiv_config_2_3, 8231 active_regions->aux.nvme_params); 8232 } 8233 8234 void 8235 qla27xx_get_active_image(struct scsi_qla_host *vha, 8236 struct active_regions *active_regions) 8237 { 8238 struct qla_hw_data *ha = vha->hw; 8239 struct qla27xx_image_status pri_image_status, sec_image_status; 8240 bool valid_pri_image = false, valid_sec_image = false; 8241 bool active_pri_image = false, active_sec_image = false; 8242 8243 if (!ha->flt_region_img_status_pri) { 8244 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 8245 goto check_sec_image; 8246 } 8247 8248 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status, 8249 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 8250 QLA_SUCCESS) { 8251 WARN_ON_ONCE(true); 8252 goto check_sec_image; 8253 } 8254 qla27xx_print_image(vha, "Primary image", &pri_image_status); 8255 8256 if (qla27xx_check_image_status_signature(&pri_image_status)) { 8257 ql_dbg(ql_dbg_init, vha, 0x018b, 8258 "Primary image signature (%#x) not valid\n", 8259 le32_to_cpu(pri_image_status.signature)); 8260 goto check_sec_image; 8261 } 8262 8263 if (qla27xx_image_status_checksum(&pri_image_status)) { 8264 ql_dbg(ql_dbg_init, vha, 0x018c, 8265 "Primary image checksum failed\n"); 8266 goto check_sec_image; 8267 } 8268 8269 valid_pri_image = true; 8270 8271 if (pri_image_status.image_status_mask & 1) { 8272 ql_dbg(ql_dbg_init, vha, 0x018d, 8273 "Primary image is active\n"); 8274 active_pri_image = true; 8275 } 8276 8277 check_sec_image: 8278 if (!ha->flt_region_img_status_sec) { 8279 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 8280 goto check_valid_image; 8281 } 8282 8283 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 8284 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 8285 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 8286 8287 if (qla27xx_check_image_status_signature(&sec_image_status)) { 8288 ql_dbg(ql_dbg_init, vha, 0x018b, 8289 "Secondary image signature (%#x) not valid\n", 8290 le32_to_cpu(sec_image_status.signature)); 8291 goto check_valid_image; 8292 } 8293 8294 if (qla27xx_image_status_checksum(&sec_image_status)) { 8295 ql_dbg(ql_dbg_init, vha, 0x018c, 8296 "Secondary image checksum failed\n"); 8297 goto check_valid_image; 8298 } 8299 8300 valid_sec_image = true; 8301 8302 if (sec_image_status.image_status_mask & 1) { 8303 ql_dbg(ql_dbg_init, vha, 0x018d, 8304 "Secondary image is active\n"); 8305 active_sec_image = true; 8306 } 8307 8308 check_valid_image: 8309 if (valid_pri_image && active_pri_image) 8310 active_regions->global = QLA27XX_PRIMARY_IMAGE; 8311 8312 if (valid_sec_image && active_sec_image) { 8313 if (!active_regions->global || 8314 qla27xx_compare_image_generation( 8315 &pri_image_status, &sec_image_status) < 0) { 8316 active_regions->global = QLA27XX_SECONDARY_IMAGE; 8317 } 8318 } 8319 8320 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 8321 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 8322 "default (boot/fw)" : 8323 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 8324 "primary" : 8325 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 8326 "secondary" : "invalid", 8327 active_regions->global); 8328 } 8329 8330 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 8331 { 8332 return 8333 !(dword[4] | dword[5] | dword[6] | dword[7]) || 8334 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 8335 } 8336 8337 static int 8338 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 8339 uint32_t faddr) 8340 { 8341 int rval; 8342 uint templates, segments, fragment; 8343 ulong i; 8344 uint j; 8345 ulong dlen; 8346 uint32_t *dcode; 8347 uint32_t risc_addr, risc_size, risc_attr = 0; 8348 struct qla_hw_data *ha = vha->hw; 8349 struct req_que *req = ha->req_q_map[0]; 8350 struct fwdt *fwdt = ha->fwdt; 8351 8352 ql_dbg(ql_dbg_init, vha, 0x008b, 8353 "FW: Loading firmware from flash (%x).\n", faddr); 8354 8355 dcode = (uint32_t *)req->ring; 8356 qla24xx_read_flash_data(vha, dcode, faddr, 8); 8357 if (qla24xx_risc_firmware_invalid(dcode)) { 8358 ql_log(ql_log_fatal, vha, 0x008c, 8359 "Unable to verify the integrity of flash firmware " 8360 "image.\n"); 8361 ql_log(ql_log_fatal, vha, 0x008d, 8362 "Firmware data: %08x %08x %08x %08x.\n", 8363 dcode[0], dcode[1], dcode[2], dcode[3]); 8364 8365 return QLA_FUNCTION_FAILED; 8366 } 8367 8368 dcode = (uint32_t *)req->ring; 8369 *srisc_addr = 0; 8370 segments = FA_RISC_CODE_SEGMENTS; 8371 for (j = 0; j < segments; j++) { 8372 ql_dbg(ql_dbg_init, vha, 0x008d, 8373 "-> Loading segment %u...\n", j); 8374 qla24xx_read_flash_data(vha, dcode, faddr, 10); 8375 risc_addr = be32_to_cpu((__force __be32)dcode[2]); 8376 risc_size = be32_to_cpu((__force __be32)dcode[3]); 8377 if (!*srisc_addr) { 8378 *srisc_addr = risc_addr; 8379 risc_attr = be32_to_cpu((__force __be32)dcode[9]); 8380 } 8381 8382 dlen = ha->fw_transfer_size >> 2; 8383 for (fragment = 0; risc_size; fragment++) { 8384 if (dlen > risc_size) 8385 dlen = risc_size; 8386 8387 ql_dbg(ql_dbg_init, vha, 0x008e, 8388 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 8389 fragment, risc_addr, faddr, dlen); 8390 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 8391 for (i = 0; i < dlen; i++) 8392 dcode[i] = swab32(dcode[i]); 8393 8394 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8395 if (rval) { 8396 ql_log(ql_log_fatal, vha, 0x008f, 8397 "-> Failed load firmware fragment %u.\n", 8398 fragment); 8399 return QLA_FUNCTION_FAILED; 8400 } 8401 8402 faddr += dlen; 8403 risc_addr += dlen; 8404 risc_size -= dlen; 8405 } 8406 } 8407 8408 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8409 return QLA_SUCCESS; 8410 8411 templates = (risc_attr & BIT_9) ? 2 : 1; 8412 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 8413 for (j = 0; j < templates; j++, fwdt++) { 8414 vfree(fwdt->template); 8415 fwdt->template = NULL; 8416 fwdt->length = 0; 8417 8418 dcode = (uint32_t *)req->ring; 8419 qla24xx_read_flash_data(vha, dcode, faddr, 7); 8420 risc_size = be32_to_cpu((__force __be32)dcode[2]); 8421 ql_dbg(ql_dbg_init, vha, 0x0161, 8422 "-> fwdt%u template array at %#x (%#x dwords)\n", 8423 j, faddr, risc_size); 8424 if (!risc_size || !~risc_size) { 8425 ql_dbg(ql_dbg_init, vha, 0x0162, 8426 "-> fwdt%u failed to read array\n", j); 8427 goto failed; 8428 } 8429 8430 /* skip header and ignore checksum */ 8431 faddr += 7; 8432 risc_size -= 8; 8433 8434 ql_dbg(ql_dbg_init, vha, 0x0163, 8435 "-> fwdt%u template allocate template %#x words...\n", 8436 j, risc_size); 8437 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8438 if (!fwdt->template) { 8439 ql_log(ql_log_warn, vha, 0x0164, 8440 "-> fwdt%u failed allocate template.\n", j); 8441 goto failed; 8442 } 8443 8444 dcode = fwdt->template; 8445 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 8446 8447 if (!qla27xx_fwdt_template_valid(dcode)) { 8448 ql_log(ql_log_warn, vha, 0x0165, 8449 "-> fwdt%u failed template validate\n", j); 8450 goto failed; 8451 } 8452 8453 dlen = qla27xx_fwdt_template_size(dcode); 8454 ql_dbg(ql_dbg_init, vha, 0x0166, 8455 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8456 j, dlen, dlen / sizeof(*dcode)); 8457 if (dlen > risc_size * sizeof(*dcode)) { 8458 ql_log(ql_log_warn, vha, 0x0167, 8459 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8460 j, dlen - risc_size * sizeof(*dcode)); 8461 goto failed; 8462 } 8463 8464 fwdt->length = dlen; 8465 ql_dbg(ql_dbg_init, vha, 0x0168, 8466 "-> fwdt%u loaded template ok\n", j); 8467 8468 faddr += risc_size + 1; 8469 } 8470 8471 return QLA_SUCCESS; 8472 8473 failed: 8474 vfree(fwdt->template); 8475 fwdt->template = NULL; 8476 fwdt->length = 0; 8477 8478 return QLA_SUCCESS; 8479 } 8480 8481 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 8482 8483 int 8484 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8485 { 8486 int rval; 8487 int i, fragment; 8488 uint16_t *wcode; 8489 __be16 *fwcode; 8490 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 8491 struct fw_blob *blob; 8492 struct qla_hw_data *ha = vha->hw; 8493 struct req_que *req = ha->req_q_map[0]; 8494 8495 /* Load firmware blob. */ 8496 blob = qla2x00_request_firmware(vha); 8497 if (!blob) { 8498 ql_log(ql_log_info, vha, 0x0083, 8499 "Firmware image unavailable.\n"); 8500 ql_log(ql_log_info, vha, 0x0084, 8501 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 8502 return QLA_FUNCTION_FAILED; 8503 } 8504 8505 rval = QLA_SUCCESS; 8506 8507 wcode = (uint16_t *)req->ring; 8508 *srisc_addr = 0; 8509 fwcode = (__force __be16 *)blob->fw->data; 8510 fwclen = 0; 8511 8512 /* Validate firmware image by checking version. */ 8513 if (blob->fw->size < 8 * sizeof(uint16_t)) { 8514 ql_log(ql_log_fatal, vha, 0x0085, 8515 "Unable to verify integrity of firmware image (%zd).\n", 8516 blob->fw->size); 8517 goto fail_fw_integrity; 8518 } 8519 for (i = 0; i < 4; i++) 8520 wcode[i] = be16_to_cpu(fwcode[i + 4]); 8521 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 8522 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 8523 wcode[2] == 0 && wcode[3] == 0)) { 8524 ql_log(ql_log_fatal, vha, 0x0086, 8525 "Unable to verify integrity of firmware image.\n"); 8526 ql_log(ql_log_fatal, vha, 0x0087, 8527 "Firmware data: %04x %04x %04x %04x.\n", 8528 wcode[0], wcode[1], wcode[2], wcode[3]); 8529 goto fail_fw_integrity; 8530 } 8531 8532 seg = blob->segs; 8533 while (*seg && rval == QLA_SUCCESS) { 8534 risc_addr = *seg; 8535 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 8536 risc_size = be16_to_cpu(fwcode[3]); 8537 8538 /* Validate firmware image size. */ 8539 fwclen += risc_size * sizeof(uint16_t); 8540 if (blob->fw->size < fwclen) { 8541 ql_log(ql_log_fatal, vha, 0x0088, 8542 "Unable to verify integrity of firmware image " 8543 "(%zd).\n", blob->fw->size); 8544 goto fail_fw_integrity; 8545 } 8546 8547 fragment = 0; 8548 while (risc_size > 0 && rval == QLA_SUCCESS) { 8549 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 8550 if (wlen > risc_size) 8551 wlen = risc_size; 8552 ql_dbg(ql_dbg_init, vha, 0x0089, 8553 "Loading risc segment@ risc addr %x number of " 8554 "words 0x%x.\n", risc_addr, wlen); 8555 8556 for (i = 0; i < wlen; i++) 8557 wcode[i] = swab16((__force u32)fwcode[i]); 8558 8559 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 8560 wlen); 8561 if (rval) { 8562 ql_log(ql_log_fatal, vha, 0x008a, 8563 "Failed to load segment %d of firmware.\n", 8564 fragment); 8565 break; 8566 } 8567 8568 fwcode += wlen; 8569 risc_addr += wlen; 8570 risc_size -= wlen; 8571 fragment++; 8572 } 8573 8574 /* Next segment. */ 8575 seg++; 8576 } 8577 return rval; 8578 8579 fail_fw_integrity: 8580 return QLA_FUNCTION_FAILED; 8581 } 8582 8583 static int 8584 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8585 { 8586 int rval; 8587 uint templates, segments, fragment; 8588 uint32_t *dcode; 8589 ulong dlen; 8590 uint32_t risc_addr, risc_size, risc_attr = 0; 8591 ulong i; 8592 uint j; 8593 struct fw_blob *blob; 8594 __be32 *fwcode; 8595 struct qla_hw_data *ha = vha->hw; 8596 struct req_que *req = ha->req_q_map[0]; 8597 struct fwdt *fwdt = ha->fwdt; 8598 8599 ql_dbg(ql_dbg_init, vha, 0x0090, 8600 "-> FW: Loading via request-firmware.\n"); 8601 8602 blob = qla2x00_request_firmware(vha); 8603 if (!blob) { 8604 ql_log(ql_log_warn, vha, 0x0092, 8605 "-> Firmware file not found.\n"); 8606 8607 return QLA_FUNCTION_FAILED; 8608 } 8609 8610 fwcode = (__force __be32 *)blob->fw->data; 8611 dcode = (__force uint32_t *)fwcode; 8612 if (qla24xx_risc_firmware_invalid(dcode)) { 8613 ql_log(ql_log_fatal, vha, 0x0093, 8614 "Unable to verify integrity of firmware image (%zd).\n", 8615 blob->fw->size); 8616 ql_log(ql_log_fatal, vha, 0x0095, 8617 "Firmware data: %08x %08x %08x %08x.\n", 8618 dcode[0], dcode[1], dcode[2], dcode[3]); 8619 return QLA_FUNCTION_FAILED; 8620 } 8621 8622 dcode = (uint32_t *)req->ring; 8623 *srisc_addr = 0; 8624 segments = FA_RISC_CODE_SEGMENTS; 8625 for (j = 0; j < segments; j++) { 8626 ql_dbg(ql_dbg_init, vha, 0x0096, 8627 "-> Loading segment %u...\n", j); 8628 risc_addr = be32_to_cpu(fwcode[2]); 8629 risc_size = be32_to_cpu(fwcode[3]); 8630 8631 if (!*srisc_addr) { 8632 *srisc_addr = risc_addr; 8633 risc_attr = be32_to_cpu(fwcode[9]); 8634 } 8635 8636 dlen = ha->fw_transfer_size >> 2; 8637 for (fragment = 0; risc_size; fragment++) { 8638 if (dlen > risc_size) 8639 dlen = risc_size; 8640 8641 ql_dbg(ql_dbg_init, vha, 0x0097, 8642 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 8643 fragment, risc_addr, 8644 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 8645 dlen); 8646 8647 for (i = 0; i < dlen; i++) 8648 dcode[i] = swab32((__force u32)fwcode[i]); 8649 8650 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8651 if (rval) { 8652 ql_log(ql_log_fatal, vha, 0x0098, 8653 "-> Failed load firmware fragment %u.\n", 8654 fragment); 8655 return QLA_FUNCTION_FAILED; 8656 } 8657 8658 fwcode += dlen; 8659 risc_addr += dlen; 8660 risc_size -= dlen; 8661 } 8662 } 8663 8664 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8665 return QLA_SUCCESS; 8666 8667 templates = (risc_attr & BIT_9) ? 2 : 1; 8668 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 8669 for (j = 0; j < templates; j++, fwdt++) { 8670 vfree(fwdt->template); 8671 fwdt->template = NULL; 8672 fwdt->length = 0; 8673 8674 risc_size = be32_to_cpu(fwcode[2]); 8675 ql_dbg(ql_dbg_init, vha, 0x0171, 8676 "-> fwdt%u template array at %#x (%#x dwords)\n", 8677 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 8678 risc_size); 8679 if (!risc_size || !~risc_size) { 8680 ql_dbg(ql_dbg_init, vha, 0x0172, 8681 "-> fwdt%u failed to read array\n", j); 8682 goto failed; 8683 } 8684 8685 /* skip header and ignore checksum */ 8686 fwcode += 7; 8687 risc_size -= 8; 8688 8689 ql_dbg(ql_dbg_init, vha, 0x0173, 8690 "-> fwdt%u template allocate template %#x words...\n", 8691 j, risc_size); 8692 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8693 if (!fwdt->template) { 8694 ql_log(ql_log_warn, vha, 0x0174, 8695 "-> fwdt%u failed allocate template.\n", j); 8696 goto failed; 8697 } 8698 8699 dcode = fwdt->template; 8700 for (i = 0; i < risc_size; i++) 8701 dcode[i] = (__force u32)fwcode[i]; 8702 8703 if (!qla27xx_fwdt_template_valid(dcode)) { 8704 ql_log(ql_log_warn, vha, 0x0175, 8705 "-> fwdt%u failed template validate\n", j); 8706 goto failed; 8707 } 8708 8709 dlen = qla27xx_fwdt_template_size(dcode); 8710 ql_dbg(ql_dbg_init, vha, 0x0176, 8711 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8712 j, dlen, dlen / sizeof(*dcode)); 8713 if (dlen > risc_size * sizeof(*dcode)) { 8714 ql_log(ql_log_warn, vha, 0x0177, 8715 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8716 j, dlen - risc_size * sizeof(*dcode)); 8717 goto failed; 8718 } 8719 8720 fwdt->length = dlen; 8721 ql_dbg(ql_dbg_init, vha, 0x0178, 8722 "-> fwdt%u loaded template ok\n", j); 8723 8724 fwcode += risc_size + 1; 8725 } 8726 8727 return QLA_SUCCESS; 8728 8729 failed: 8730 vfree(fwdt->template); 8731 fwdt->template = NULL; 8732 fwdt->length = 0; 8733 8734 return QLA_SUCCESS; 8735 } 8736 8737 int 8738 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8739 { 8740 int rval; 8741 8742 if (ql2xfwloadbin == 1) 8743 return qla81xx_load_risc(vha, srisc_addr); 8744 8745 /* 8746 * FW Load priority: 8747 * 1) Firmware via request-firmware interface (.bin file). 8748 * 2) Firmware residing in flash. 8749 */ 8750 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8751 if (rval == QLA_SUCCESS) 8752 return rval; 8753 8754 return qla24xx_load_risc_flash(vha, srisc_addr, 8755 vha->hw->flt_region_fw); 8756 } 8757 8758 int 8759 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8760 { 8761 int rval; 8762 struct qla_hw_data *ha = vha->hw; 8763 struct active_regions active_regions = { }; 8764 8765 if (ql2xfwloadbin == 2) 8766 goto try_blob_fw; 8767 8768 /* FW Load priority: 8769 * 1) Firmware residing in flash. 8770 * 2) Firmware via request-firmware interface (.bin file). 8771 * 3) Golden-Firmware residing in flash -- (limited operation). 8772 */ 8773 8774 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8775 goto try_primary_fw; 8776 8777 qla27xx_get_active_image(vha, &active_regions); 8778 8779 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8780 goto try_primary_fw; 8781 8782 ql_dbg(ql_dbg_init, vha, 0x008b, 8783 "Loading secondary firmware image.\n"); 8784 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8785 if (!rval) 8786 return rval; 8787 8788 try_primary_fw: 8789 ql_dbg(ql_dbg_init, vha, 0x008b, 8790 "Loading primary firmware image.\n"); 8791 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8792 if (!rval) 8793 return rval; 8794 8795 try_blob_fw: 8796 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8797 if (!rval || !ha->flt_region_gold_fw) 8798 return rval; 8799 8800 ql_log(ql_log_info, vha, 0x0099, 8801 "Attempting to fallback to golden firmware.\n"); 8802 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8803 if (rval) 8804 return rval; 8805 8806 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8807 ha->flags.running_gold_fw = 1; 8808 return rval; 8809 } 8810 8811 void 8812 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8813 { 8814 int ret, retries; 8815 struct qla_hw_data *ha = vha->hw; 8816 8817 if (ha->flags.pci_channel_io_perm_failure) 8818 return; 8819 if (!IS_FWI2_CAPABLE(ha)) 8820 return; 8821 if (!ha->fw_major_version) 8822 return; 8823 if (!ha->flags.fw_started) 8824 return; 8825 8826 ret = qla2x00_stop_firmware(vha); 8827 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8828 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8829 ha->isp_ops->reset_chip(vha); 8830 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8831 continue; 8832 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8833 continue; 8834 ql_log(ql_log_info, vha, 0x8015, 8835 "Attempting retry of stop-firmware command.\n"); 8836 ret = qla2x00_stop_firmware(vha); 8837 } 8838 8839 QLA_FW_STOPPED(ha); 8840 ha->flags.fw_init_done = 0; 8841 } 8842 8843 int 8844 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8845 { 8846 int rval = QLA_SUCCESS; 8847 int rval2; 8848 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8849 struct qla_hw_data *ha = vha->hw; 8850 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8851 8852 if (!vha->vp_idx) 8853 return -EINVAL; 8854 8855 rval = qla2x00_fw_ready(base_vha); 8856 8857 if (rval == QLA_SUCCESS) { 8858 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8859 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8860 } 8861 8862 vha->flags.management_server_logged_in = 0; 8863 8864 /* Login to SNS first */ 8865 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8866 BIT_1); 8867 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8868 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8869 ql_dbg(ql_dbg_init, vha, 0x0120, 8870 "Failed SNS login: loop_id=%x, rval2=%d\n", 8871 NPH_SNS, rval2); 8872 else 8873 ql_dbg(ql_dbg_init, vha, 0x0103, 8874 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8875 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8876 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8877 return (QLA_FUNCTION_FAILED); 8878 } 8879 8880 atomic_set(&vha->loop_down_timer, 0); 8881 atomic_set(&vha->loop_state, LOOP_UP); 8882 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8883 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8884 rval = qla2x00_loop_resync(base_vha); 8885 8886 return rval; 8887 } 8888 8889 /* 84XX Support **************************************************************/ 8890 8891 static LIST_HEAD(qla_cs84xx_list); 8892 static DEFINE_MUTEX(qla_cs84xx_mutex); 8893 8894 static struct qla_chip_state_84xx * 8895 qla84xx_get_chip(struct scsi_qla_host *vha) 8896 { 8897 struct qla_chip_state_84xx *cs84xx; 8898 struct qla_hw_data *ha = vha->hw; 8899 8900 mutex_lock(&qla_cs84xx_mutex); 8901 8902 /* Find any shared 84xx chip. */ 8903 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8904 if (cs84xx->bus == ha->pdev->bus) { 8905 kref_get(&cs84xx->kref); 8906 goto done; 8907 } 8908 } 8909 8910 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8911 if (!cs84xx) 8912 goto done; 8913 8914 kref_init(&cs84xx->kref); 8915 spin_lock_init(&cs84xx->access_lock); 8916 mutex_init(&cs84xx->fw_update_mutex); 8917 cs84xx->bus = ha->pdev->bus; 8918 8919 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8920 done: 8921 mutex_unlock(&qla_cs84xx_mutex); 8922 return cs84xx; 8923 } 8924 8925 static void 8926 __qla84xx_chip_release(struct kref *kref) 8927 { 8928 struct qla_chip_state_84xx *cs84xx = 8929 container_of(kref, struct qla_chip_state_84xx, kref); 8930 8931 mutex_lock(&qla_cs84xx_mutex); 8932 list_del(&cs84xx->list); 8933 mutex_unlock(&qla_cs84xx_mutex); 8934 kfree(cs84xx); 8935 } 8936 8937 void 8938 qla84xx_put_chip(struct scsi_qla_host *vha) 8939 { 8940 struct qla_hw_data *ha = vha->hw; 8941 8942 if (ha->cs84xx) 8943 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8944 } 8945 8946 static int 8947 qla84xx_init_chip(scsi_qla_host_t *vha) 8948 { 8949 int rval; 8950 uint16_t status[2]; 8951 struct qla_hw_data *ha = vha->hw; 8952 8953 mutex_lock(&ha->cs84xx->fw_update_mutex); 8954 8955 rval = qla84xx_verify_chip(vha, status); 8956 8957 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8958 8959 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8960 QLA_SUCCESS; 8961 } 8962 8963 /* 81XX Support **************************************************************/ 8964 8965 int 8966 qla81xx_nvram_config(scsi_qla_host_t *vha) 8967 { 8968 int rval; 8969 struct init_cb_81xx *icb; 8970 struct nvram_81xx *nv; 8971 __le32 *dptr; 8972 uint8_t *dptr1, *dptr2; 8973 uint32_t chksum; 8974 uint16_t cnt; 8975 struct qla_hw_data *ha = vha->hw; 8976 uint32_t faddr; 8977 struct active_regions active_regions = { }; 8978 8979 rval = QLA_SUCCESS; 8980 icb = (struct init_cb_81xx *)ha->init_cb; 8981 nv = ha->nvram; 8982 8983 /* Determine NVRAM starting address. */ 8984 ha->nvram_size = sizeof(*nv); 8985 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8986 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8987 ha->vpd_size = FA_VPD_SIZE_82XX; 8988 8989 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8990 qla28xx_get_aux_images(vha, &active_regions); 8991 8992 /* Get VPD data into cache */ 8993 ha->vpd = ha->nvram + VPD_OFFSET; 8994 8995 faddr = ha->flt_region_vpd; 8996 if (IS_QLA28XX(ha)) { 8997 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8998 faddr = ha->flt_region_vpd_sec; 8999 ql_dbg(ql_dbg_init, vha, 0x0110, 9000 "Loading %s nvram image.\n", 9001 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 9002 "primary" : "secondary"); 9003 } 9004 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 9005 9006 /* Get NVRAM data into cache and calculate checksum. */ 9007 faddr = ha->flt_region_nvram; 9008 if (IS_QLA28XX(ha)) { 9009 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 9010 faddr = ha->flt_region_nvram_sec; 9011 } 9012 ql_dbg(ql_dbg_init, vha, 0x0110, 9013 "Loading %s nvram image.\n", 9014 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 9015 "primary" : "secondary"); 9016 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 9017 9018 dptr = (__force __le32 *)nv; 9019 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 9020 chksum += le32_to_cpu(*dptr); 9021 9022 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 9023 "Contents of NVRAM:\n"); 9024 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 9025 nv, ha->nvram_size); 9026 9027 /* Bad NVRAM data, set defaults parameters. */ 9028 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 9029 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 9030 /* Reset NVRAM data. */ 9031 ql_log(ql_log_info, vha, 0x0073, 9032 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 9033 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 9034 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 9035 ql_log(ql_log_info, vha, 0x0074, 9036 "Falling back to functioning (yet invalid -- WWPN) " 9037 "defaults.\n"); 9038 9039 /* 9040 * Set default initialization control block. 9041 */ 9042 memset(nv, 0, ha->nvram_size); 9043 nv->nvram_version = cpu_to_le16(ICB_VERSION); 9044 nv->version = cpu_to_le16(ICB_VERSION); 9045 nv->frame_payload_size = cpu_to_le16(2048); 9046 nv->execution_throttle = cpu_to_le16(0xFFFF); 9047 nv->exchange_count = cpu_to_le16(0); 9048 nv->port_name[0] = 0x21; 9049 nv->port_name[1] = 0x00 + ha->port_no + 1; 9050 nv->port_name[2] = 0x00; 9051 nv->port_name[3] = 0xe0; 9052 nv->port_name[4] = 0x8b; 9053 nv->port_name[5] = 0x1c; 9054 nv->port_name[6] = 0x55; 9055 nv->port_name[7] = 0x86; 9056 nv->node_name[0] = 0x20; 9057 nv->node_name[1] = 0x00; 9058 nv->node_name[2] = 0x00; 9059 nv->node_name[3] = 0xe0; 9060 nv->node_name[4] = 0x8b; 9061 nv->node_name[5] = 0x1c; 9062 nv->node_name[6] = 0x55; 9063 nv->node_name[7] = 0x86; 9064 nv->login_retry_count = cpu_to_le16(8); 9065 nv->interrupt_delay_timer = cpu_to_le16(0); 9066 nv->login_timeout = cpu_to_le16(0); 9067 nv->firmware_options_1 = 9068 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 9069 nv->firmware_options_2 = cpu_to_le32(2 << 4); 9070 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 9071 nv->firmware_options_3 = cpu_to_le32(2 << 13); 9072 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 9073 nv->efi_parameters = cpu_to_le32(0); 9074 nv->reset_delay = 5; 9075 nv->max_luns_per_target = cpu_to_le16(128); 9076 nv->port_down_retry_count = cpu_to_le16(30); 9077 nv->link_down_timeout = cpu_to_le16(180); 9078 nv->enode_mac[0] = 0x00; 9079 nv->enode_mac[1] = 0xC0; 9080 nv->enode_mac[2] = 0xDD; 9081 nv->enode_mac[3] = 0x04; 9082 nv->enode_mac[4] = 0x05; 9083 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 9084 9085 rval = 1; 9086 } 9087 9088 if (IS_T10_PI_CAPABLE(ha)) 9089 nv->frame_payload_size &= cpu_to_le16(~7); 9090 9091 qlt_81xx_config_nvram_stage1(vha, nv); 9092 9093 /* Reset Initialization control block */ 9094 memset(icb, 0, ha->init_cb_size); 9095 9096 /* Copy 1st segment. */ 9097 dptr1 = (uint8_t *)icb; 9098 dptr2 = (uint8_t *)&nv->version; 9099 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 9100 while (cnt--) 9101 *dptr1++ = *dptr2++; 9102 9103 icb->login_retry_count = nv->login_retry_count; 9104 9105 /* Copy 2nd segment. */ 9106 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 9107 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 9108 cnt = (uint8_t *)&icb->reserved_5 - 9109 (uint8_t *)&icb->interrupt_delay_timer; 9110 while (cnt--) 9111 *dptr1++ = *dptr2++; 9112 9113 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 9114 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 9115 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 9116 icb->enode_mac[0] = 0x00; 9117 icb->enode_mac[1] = 0xC0; 9118 icb->enode_mac[2] = 0xDD; 9119 icb->enode_mac[3] = 0x04; 9120 icb->enode_mac[4] = 0x05; 9121 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 9122 } 9123 9124 /* Use extended-initialization control block. */ 9125 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 9126 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 9127 /* 9128 * Setup driver NVRAM options. 9129 */ 9130 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 9131 "QLE8XXX"); 9132 9133 qlt_81xx_config_nvram_stage2(vha, icb); 9134 9135 /* Use alternate WWN? */ 9136 if (nv->host_p & cpu_to_le32(BIT_15)) { 9137 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 9138 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 9139 } 9140 9141 /* Prepare nodename */ 9142 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 9143 /* 9144 * Firmware will apply the following mask if the nodename was 9145 * not provided. 9146 */ 9147 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 9148 icb->node_name[0] &= 0xF0; 9149 } 9150 9151 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) { 9152 if ((nv->enhanced_features & BIT_7) == 0) 9153 ha->flags.scm_supported_a = 1; 9154 } 9155 9156 /* Set host adapter parameters. */ 9157 ha->flags.disable_risc_code_load = 0; 9158 ha->flags.enable_lip_reset = 0; 9159 ha->flags.enable_lip_full_login = 9160 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 9161 ha->flags.enable_target_reset = 9162 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 9163 ha->flags.enable_led_scheme = 0; 9164 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 9165 9166 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 9167 (BIT_6 | BIT_5 | BIT_4)) >> 4; 9168 9169 /* save HBA serial number */ 9170 ha->serial0 = icb->port_name[5]; 9171 ha->serial1 = icb->port_name[6]; 9172 ha->serial2 = icb->port_name[7]; 9173 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 9174 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 9175 9176 icb->execution_throttle = cpu_to_le16(0xFFFF); 9177 9178 ha->retry_count = le16_to_cpu(nv->login_retry_count); 9179 9180 /* Set minimum login_timeout to 4 seconds. */ 9181 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 9182 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 9183 if (le16_to_cpu(nv->login_timeout) < 4) 9184 nv->login_timeout = cpu_to_le16(4); 9185 ha->login_timeout = le16_to_cpu(nv->login_timeout); 9186 9187 /* Set minimum RATOV to 100 tenths of a second. */ 9188 ha->r_a_tov = 100; 9189 9190 ha->loop_reset_delay = nv->reset_delay; 9191 9192 /* Link Down Timeout = 0: 9193 * 9194 * When Port Down timer expires we will start returning 9195 * I/O's to OS with "DID_NO_CONNECT". 9196 * 9197 * Link Down Timeout != 0: 9198 * 9199 * The driver waits for the link to come up after link down 9200 * before returning I/Os to OS with "DID_NO_CONNECT". 9201 */ 9202 if (le16_to_cpu(nv->link_down_timeout) == 0) { 9203 ha->loop_down_abort_time = 9204 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 9205 } else { 9206 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 9207 ha->loop_down_abort_time = 9208 (LOOP_DOWN_TIME - ha->link_down_timeout); 9209 } 9210 9211 /* Need enough time to try and get the port back. */ 9212 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 9213 if (qlport_down_retry) 9214 ha->port_down_retry_count = qlport_down_retry; 9215 9216 /* Set login_retry_count */ 9217 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 9218 if (ha->port_down_retry_count == 9219 le16_to_cpu(nv->port_down_retry_count) && 9220 ha->port_down_retry_count > 3) 9221 ha->login_retry_count = ha->port_down_retry_count; 9222 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 9223 ha->login_retry_count = ha->port_down_retry_count; 9224 if (ql2xloginretrycount) 9225 ha->login_retry_count = ql2xloginretrycount; 9226 9227 /* if not running MSI-X we need handshaking on interrupts */ 9228 if (!vha->hw->flags.msix_enabled && 9229 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 9230 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 9231 9232 /* Enable ZIO. */ 9233 if (!vha->flags.init_done) { 9234 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 9235 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 9236 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 9237 le16_to_cpu(icb->interrupt_delay_timer) : 2; 9238 } 9239 icb->firmware_options_2 &= cpu_to_le32( 9240 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 9241 vha->flags.process_response_queue = 0; 9242 if (ha->zio_mode != QLA_ZIO_DISABLED) { 9243 ha->zio_mode = QLA_ZIO_MODE_6; 9244 9245 ql_log(ql_log_info, vha, 0x0075, 9246 "ZIO mode %d enabled; timer delay (%d us).\n", 9247 ha->zio_mode, 9248 ha->zio_timer * 100); 9249 9250 icb->firmware_options_2 |= cpu_to_le32( 9251 (uint32_t)ha->zio_mode); 9252 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 9253 vha->flags.process_response_queue = 1; 9254 } 9255 9256 /* enable RIDA Format2 */ 9257 icb->firmware_options_3 |= cpu_to_le32(BIT_0); 9258 9259 /* N2N: driver will initiate Login instead of FW */ 9260 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 9261 9262 /* Determine NVMe/FCP priority for target ports */ 9263 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 9264 9265 if (rval) { 9266 ql_log(ql_log_warn, vha, 0x0076, 9267 "NVRAM configuration failed.\n"); 9268 } 9269 return (rval); 9270 } 9271 9272 int 9273 qla82xx_restart_isp(scsi_qla_host_t *vha) 9274 { 9275 int status, rval; 9276 struct qla_hw_data *ha = vha->hw; 9277 struct scsi_qla_host *vp, *tvp; 9278 unsigned long flags; 9279 9280 status = qla2x00_init_rings(vha); 9281 if (!status) { 9282 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9283 ha->flags.chip_reset_done = 1; 9284 9285 status = qla2x00_fw_ready(vha); 9286 if (!status) { 9287 /* Issue a marker after FW becomes ready. */ 9288 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 9289 vha->flags.online = 1; 9290 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 9291 } 9292 9293 /* if no cable then assume it's good */ 9294 if ((vha->device_flags & DFLG_NO_CABLE)) 9295 status = 0; 9296 } 9297 9298 if (!status) { 9299 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9300 9301 if (!atomic_read(&vha->loop_down_timer)) { 9302 /* 9303 * Issue marker command only when we are going 9304 * to start the I/O . 9305 */ 9306 vha->marker_needed = 1; 9307 } 9308 9309 ha->isp_ops->enable_intrs(ha); 9310 9311 ha->isp_abort_cnt = 0; 9312 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 9313 9314 /* Update the firmware version */ 9315 status = qla82xx_check_md_needed(vha); 9316 9317 if (ha->fce) { 9318 ha->flags.fce_enabled = 1; 9319 memset(ha->fce, 0, 9320 fce_calc_size(ha->fce_bufs)); 9321 rval = qla2x00_enable_fce_trace(vha, 9322 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 9323 &ha->fce_bufs); 9324 if (rval) { 9325 ql_log(ql_log_warn, vha, 0x8001, 9326 "Unable to reinitialize FCE (%d).\n", 9327 rval); 9328 ha->flags.fce_enabled = 0; 9329 } 9330 } 9331 9332 if (ha->eft) { 9333 memset(ha->eft, 0, EFT_SIZE); 9334 rval = qla2x00_enable_eft_trace(vha, 9335 ha->eft_dma, EFT_NUM_BUFFERS); 9336 if (rval) { 9337 ql_log(ql_log_warn, vha, 0x8010, 9338 "Unable to reinitialize EFT (%d).\n", 9339 rval); 9340 } 9341 } 9342 } 9343 9344 if (!status) { 9345 ql_dbg(ql_dbg_taskm, vha, 0x8011, 9346 "qla82xx_restart_isp succeeded.\n"); 9347 9348 spin_lock_irqsave(&ha->vport_slock, flags); 9349 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 9350 if (vp->vp_idx) { 9351 atomic_inc(&vp->vref_count); 9352 spin_unlock_irqrestore(&ha->vport_slock, flags); 9353 9354 qla2x00_vp_abort_isp(vp); 9355 9356 spin_lock_irqsave(&ha->vport_slock, flags); 9357 atomic_dec(&vp->vref_count); 9358 } 9359 } 9360 spin_unlock_irqrestore(&ha->vport_slock, flags); 9361 9362 } else { 9363 ql_log(ql_log_warn, vha, 0x8016, 9364 "qla82xx_restart_isp **** FAILED ****.\n"); 9365 } 9366 9367 return status; 9368 } 9369 9370 /* 9371 * qla24xx_get_fcp_prio 9372 * Gets the fcp cmd priority value for the logged in port. 9373 * Looks for a match of the port descriptors within 9374 * each of the fcp prio config entries. If a match is found, 9375 * the tag (priority) value is returned. 9376 * 9377 * Input: 9378 * vha = scsi host structure pointer. 9379 * fcport = port structure pointer. 9380 * 9381 * Return: 9382 * non-zero (if found) 9383 * -1 (if not found) 9384 * 9385 * Context: 9386 * Kernel context 9387 */ 9388 static int 9389 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9390 { 9391 int i, entries; 9392 uint8_t pid_match, wwn_match; 9393 int priority; 9394 uint32_t pid1, pid2; 9395 uint64_t wwn1, wwn2; 9396 struct qla_fcp_prio_entry *pri_entry; 9397 struct qla_hw_data *ha = vha->hw; 9398 9399 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 9400 return -1; 9401 9402 priority = -1; 9403 entries = ha->fcp_prio_cfg->num_entries; 9404 pri_entry = &ha->fcp_prio_cfg->entry[0]; 9405 9406 for (i = 0; i < entries; i++) { 9407 pid_match = wwn_match = 0; 9408 9409 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 9410 pri_entry++; 9411 continue; 9412 } 9413 9414 /* check source pid for a match */ 9415 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 9416 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 9417 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 9418 if (pid1 == INVALID_PORT_ID) 9419 pid_match++; 9420 else if (pid1 == pid2) 9421 pid_match++; 9422 } 9423 9424 /* check destination pid for a match */ 9425 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 9426 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 9427 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 9428 if (pid1 == INVALID_PORT_ID) 9429 pid_match++; 9430 else if (pid1 == pid2) 9431 pid_match++; 9432 } 9433 9434 /* check source WWN for a match */ 9435 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 9436 wwn1 = wwn_to_u64(vha->port_name); 9437 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 9438 if (wwn2 == (uint64_t)-1) 9439 wwn_match++; 9440 else if (wwn1 == wwn2) 9441 wwn_match++; 9442 } 9443 9444 /* check destination WWN for a match */ 9445 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 9446 wwn1 = wwn_to_u64(fcport->port_name); 9447 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 9448 if (wwn2 == (uint64_t)-1) 9449 wwn_match++; 9450 else if (wwn1 == wwn2) 9451 wwn_match++; 9452 } 9453 9454 if (pid_match == 2 || wwn_match == 2) { 9455 /* Found a matching entry */ 9456 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 9457 priority = pri_entry->tag; 9458 break; 9459 } 9460 9461 pri_entry++; 9462 } 9463 9464 return priority; 9465 } 9466 9467 /* 9468 * qla24xx_update_fcport_fcp_prio 9469 * Activates fcp priority for the logged in fc port 9470 * 9471 * Input: 9472 * vha = scsi host structure pointer. 9473 * fcp = port structure pointer. 9474 * 9475 * Return: 9476 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9477 * 9478 * Context: 9479 * Kernel context. 9480 */ 9481 int 9482 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9483 { 9484 int ret; 9485 int priority; 9486 uint16_t mb[5]; 9487 9488 if (fcport->port_type != FCT_TARGET || 9489 fcport->loop_id == FC_NO_LOOP_ID) 9490 return QLA_FUNCTION_FAILED; 9491 9492 priority = qla24xx_get_fcp_prio(vha, fcport); 9493 if (priority < 0) 9494 return QLA_FUNCTION_FAILED; 9495 9496 if (IS_P3P_TYPE(vha->hw)) { 9497 fcport->fcp_prio = priority & 0xf; 9498 return QLA_SUCCESS; 9499 } 9500 9501 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 9502 if (ret == QLA_SUCCESS) { 9503 if (fcport->fcp_prio != priority) 9504 ql_dbg(ql_dbg_user, vha, 0x709e, 9505 "Updated FCP_CMND priority - value=%d loop_id=%d " 9506 "port_id=%02x%02x%02x.\n", priority, 9507 fcport->loop_id, fcport->d_id.b.domain, 9508 fcport->d_id.b.area, fcport->d_id.b.al_pa); 9509 fcport->fcp_prio = priority & 0xf; 9510 } else 9511 ql_dbg(ql_dbg_user, vha, 0x704f, 9512 "Unable to update FCP_CMND priority - ret=0x%x for " 9513 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 9514 fcport->d_id.b.domain, fcport->d_id.b.area, 9515 fcport->d_id.b.al_pa); 9516 return ret; 9517 } 9518 9519 /* 9520 * qla24xx_update_all_fcp_prio 9521 * Activates fcp priority for all the logged in ports 9522 * 9523 * Input: 9524 * ha = adapter block pointer. 9525 * 9526 * Return: 9527 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9528 * 9529 * Context: 9530 * Kernel context. 9531 */ 9532 int 9533 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 9534 { 9535 int ret; 9536 fc_port_t *fcport; 9537 9538 ret = QLA_FUNCTION_FAILED; 9539 /* We need to set priority for all logged in ports */ 9540 list_for_each_entry(fcport, &vha->vp_fcports, list) 9541 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 9542 9543 return ret; 9544 } 9545 9546 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 9547 int vp_idx, bool startqp) 9548 { 9549 int rsp_id = 0; 9550 int req_id = 0; 9551 int i; 9552 struct qla_hw_data *ha = vha->hw; 9553 uint16_t qpair_id = 0; 9554 struct qla_qpair *qpair = NULL; 9555 struct qla_msix_entry *msix; 9556 9557 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 9558 ql_log(ql_log_warn, vha, 0x00181, 9559 "FW/Driver is not multi-queue capable.\n"); 9560 return NULL; 9561 } 9562 9563 if (ql2xmqsupport || ql2xnvmeenable) { 9564 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 9565 if (qpair == NULL) { 9566 ql_log(ql_log_warn, vha, 0x0182, 9567 "Failed to allocate memory for queue pair.\n"); 9568 return NULL; 9569 } 9570 9571 qpair->hw = vha->hw; 9572 qpair->vha = vha; 9573 qpair->qp_lock_ptr = &qpair->qp_lock; 9574 spin_lock_init(&qpair->qp_lock); 9575 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 9576 9577 /* Assign available que pair id */ 9578 mutex_lock(&ha->mq_lock); 9579 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 9580 if (ha->num_qpairs >= ha->max_qpairs) { 9581 mutex_unlock(&ha->mq_lock); 9582 ql_log(ql_log_warn, vha, 0x0183, 9583 "No resources to create additional q pair.\n"); 9584 goto fail_qid_map; 9585 } 9586 ha->num_qpairs++; 9587 set_bit(qpair_id, ha->qpair_qid_map); 9588 ha->queue_pair_map[qpair_id] = qpair; 9589 qpair->id = qpair_id; 9590 qpair->vp_idx = vp_idx; 9591 qpair->fw_started = ha->flags.fw_started; 9592 INIT_LIST_HEAD(&qpair->hints_list); 9593 qpair->chip_reset = ha->base_qpair->chip_reset; 9594 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 9595 qpair->enable_explicit_conf = 9596 ha->base_qpair->enable_explicit_conf; 9597 9598 for (i = 0; i < ha->msix_count; i++) { 9599 msix = &ha->msix_entries[i]; 9600 if (msix->in_use) 9601 continue; 9602 qpair->msix = msix; 9603 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 9604 "Vector %x selected for qpair\n", msix->vector); 9605 break; 9606 } 9607 if (!qpair->msix) { 9608 ql_log(ql_log_warn, vha, 0x0184, 9609 "Out of MSI-X vectors!.\n"); 9610 goto fail_msix; 9611 } 9612 9613 qpair->msix->in_use = 1; 9614 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 9615 qpair->pdev = ha->pdev; 9616 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 9617 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 9618 9619 mutex_unlock(&ha->mq_lock); 9620 9621 /* Create response queue first */ 9622 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 9623 if (!rsp_id) { 9624 ql_log(ql_log_warn, vha, 0x0185, 9625 "Failed to create response queue.\n"); 9626 goto fail_rsp; 9627 } 9628 9629 qpair->rsp = ha->rsp_q_map[rsp_id]; 9630 9631 /* Create request queue */ 9632 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 9633 startqp); 9634 if (!req_id) { 9635 ql_log(ql_log_warn, vha, 0x0186, 9636 "Failed to create request queue.\n"); 9637 goto fail_req; 9638 } 9639 9640 qpair->req = ha->req_q_map[req_id]; 9641 qpair->rsp->req = qpair->req; 9642 qpair->rsp->qpair = qpair; 9643 9644 if (!qpair->cpu_mapped) 9645 qla_cpu_update(qpair, raw_smp_processor_id()); 9646 9647 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 9648 if (ha->fw_attributes & BIT_4) 9649 qpair->difdix_supported = 1; 9650 } 9651 9652 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 9653 if (!qpair->srb_mempool) { 9654 ql_log(ql_log_warn, vha, 0xd036, 9655 "Failed to create srb mempool for qpair %d\n", 9656 qpair->id); 9657 goto fail_mempool; 9658 } 9659 9660 if (qla_create_buf_pool(vha, qpair)) { 9661 ql_log(ql_log_warn, vha, 0xd036, 9662 "Failed to initialize buf pool for qpair %d\n", 9663 qpair->id); 9664 goto fail_bufpool; 9665 } 9666 9667 /* Mark as online */ 9668 qpair->online = 1; 9669 9670 if (!vha->flags.qpairs_available) 9671 vha->flags.qpairs_available = 1; 9672 9673 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 9674 "Request/Response queue pair created, id %d\n", 9675 qpair->id); 9676 ql_dbg(ql_dbg_init, vha, 0x0187, 9677 "Request/Response queue pair created, id %d\n", 9678 qpair->id); 9679 } 9680 return qpair; 9681 9682 fail_bufpool: 9683 mempool_destroy(qpair->srb_mempool); 9684 fail_mempool: 9685 qla25xx_delete_req_que(vha, qpair->req); 9686 fail_req: 9687 qla25xx_delete_rsp_que(vha, qpair->rsp); 9688 fail_rsp: 9689 mutex_lock(&ha->mq_lock); 9690 qpair->msix->in_use = 0; 9691 list_del(&qpair->qp_list_elem); 9692 if (list_empty(&vha->qp_list)) 9693 vha->flags.qpairs_available = 0; 9694 fail_msix: 9695 ha->queue_pair_map[qpair_id] = NULL; 9696 clear_bit(qpair_id, ha->qpair_qid_map); 9697 ha->num_qpairs--; 9698 mutex_unlock(&ha->mq_lock); 9699 fail_qid_map: 9700 kfree(qpair); 9701 return NULL; 9702 } 9703 9704 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9705 { 9706 int ret = QLA_FUNCTION_FAILED; 9707 struct qla_hw_data *ha = qpair->hw; 9708 9709 qpair->delete_in_progress = 1; 9710 9711 qla_free_buf_pool(qpair); 9712 9713 ret = qla25xx_delete_req_que(vha, qpair->req); 9714 if (ret != QLA_SUCCESS) 9715 goto fail; 9716 9717 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9718 if (ret != QLA_SUCCESS) 9719 goto fail; 9720 9721 mutex_lock(&ha->mq_lock); 9722 ha->queue_pair_map[qpair->id] = NULL; 9723 clear_bit(qpair->id, ha->qpair_qid_map); 9724 ha->num_qpairs--; 9725 list_del(&qpair->qp_list_elem); 9726 if (list_empty(&vha->qp_list)) { 9727 vha->flags.qpairs_available = 0; 9728 vha->flags.qpairs_req_created = 0; 9729 vha->flags.qpairs_rsp_created = 0; 9730 } 9731 mempool_destroy(qpair->srb_mempool); 9732 kfree(qpair); 9733 mutex_unlock(&ha->mq_lock); 9734 9735 return QLA_SUCCESS; 9736 fail: 9737 return ret; 9738 } 9739 9740 uint64_t 9741 qla2x00_count_set_bits(uint32_t num) 9742 { 9743 /* Brian Kernighan's Algorithm */ 9744 u64 count = 0; 9745 9746 while (num) { 9747 num &= (num - 1); 9748 count++; 9749 } 9750 return count; 9751 } 9752 9753 uint64_t 9754 qla2x00_get_num_tgts(scsi_qla_host_t *vha) 9755 { 9756 fc_port_t *f, *tf; 9757 u64 count = 0; 9758 9759 f = NULL; 9760 tf = NULL; 9761 9762 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 9763 if (f->port_type != FCT_TARGET) 9764 continue; 9765 count++; 9766 } 9767 return count; 9768 } 9769 9770 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags) 9771 { 9772 scsi_qla_host_t *vha = shost_priv(host); 9773 fc_port_t *fcport = NULL; 9774 unsigned long int_flags; 9775 9776 if (flags & QLA2XX_HW_ERROR) 9777 vha->hw_err_cnt = 0; 9778 if (flags & QLA2XX_SHT_LNK_DWN) 9779 vha->short_link_down_cnt = 0; 9780 if (flags & QLA2XX_INT_ERR) 9781 vha->interface_err_cnt = 0; 9782 if (flags & QLA2XX_CMD_TIMEOUT) 9783 vha->cmd_timeout_cnt = 0; 9784 if (flags & QLA2XX_RESET_CMD_ERR) 9785 vha->reset_cmd_err_cnt = 0; 9786 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9787 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9788 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9789 fcport->tgt_short_link_down_cnt = 0; 9790 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9791 } 9792 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9793 } 9794 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9795 return 0; 9796 } 9797 9798 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags) 9799 { 9800 return qla2xxx_reset_stats(host, flags); 9801 } 9802 9803 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags) 9804 { 9805 return qla2xxx_reset_stats(host, flags); 9806 } 9807 9808 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags, 9809 void *data, u64 size) 9810 { 9811 scsi_qla_host_t *vha = shost_priv(host); 9812 struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data; 9813 struct ql_vnd_stats *rsp_data = &resp->stats; 9814 u64 ini_entry_count = 0; 9815 u64 i = 0; 9816 u64 entry_count = 0; 9817 u64 num_tgt = 0; 9818 u32 tmp_stat_type = 0; 9819 fc_port_t *fcport = NULL; 9820 unsigned long int_flags; 9821 9822 /* Copy stat type to work on it */ 9823 tmp_stat_type = flags; 9824 9825 if (tmp_stat_type & BIT_17) { 9826 num_tgt = qla2x00_get_num_tgts(vha); 9827 /* unset BIT_17 */ 9828 tmp_stat_type &= ~(1 << 17); 9829 } 9830 ini_entry_count = qla2x00_count_set_bits(tmp_stat_type); 9831 9832 entry_count = ini_entry_count + num_tgt; 9833 9834 rsp_data->entry_count = entry_count; 9835 9836 i = 0; 9837 if (flags & QLA2XX_HW_ERROR) { 9838 rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR; 9839 rsp_data->entry[i].tgt_num = 0x0; 9840 rsp_data->entry[i].cnt = vha->hw_err_cnt; 9841 i++; 9842 } 9843 9844 if (flags & QLA2XX_SHT_LNK_DWN) { 9845 rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN; 9846 rsp_data->entry[i].tgt_num = 0x0; 9847 rsp_data->entry[i].cnt = vha->short_link_down_cnt; 9848 i++; 9849 } 9850 9851 if (flags & QLA2XX_INT_ERR) { 9852 rsp_data->entry[i].stat_type = QLA2XX_INT_ERR; 9853 rsp_data->entry[i].tgt_num = 0x0; 9854 rsp_data->entry[i].cnt = vha->interface_err_cnt; 9855 i++; 9856 } 9857 9858 if (flags & QLA2XX_CMD_TIMEOUT) { 9859 rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT; 9860 rsp_data->entry[i].tgt_num = 0x0; 9861 rsp_data->entry[i].cnt = vha->cmd_timeout_cnt; 9862 i++; 9863 } 9864 9865 if (flags & QLA2XX_RESET_CMD_ERR) { 9866 rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR; 9867 rsp_data->entry[i].tgt_num = 0x0; 9868 rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt; 9869 i++; 9870 } 9871 9872 /* i will continue from previous loop, as target 9873 * entries are after initiator 9874 */ 9875 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9876 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9877 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9878 if (fcport->port_type != FCT_TARGET) 9879 continue; 9880 if (!fcport->rport) 9881 continue; 9882 rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN; 9883 rsp_data->entry[i].tgt_num = fcport->rport->number; 9884 rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt; 9885 i++; 9886 } 9887 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9888 } 9889 resp->status = EXT_STATUS_OK; 9890 9891 return 0; 9892 } 9893 9894 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags, 9895 struct fc_rport *rport, void *data, u64 size) 9896 { 9897 struct ql_vnd_tgt_stats_resp *tgt_data = data; 9898 fc_port_t *fcport = *(fc_port_t **)rport->dd_data; 9899 9900 tgt_data->status = 0; 9901 tgt_data->stats.entry_count = 1; 9902 tgt_data->stats.entry[0].stat_type = flags; 9903 tgt_data->stats.entry[0].tgt_num = rport->number; 9904 tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt; 9905 9906 return 0; 9907 } 9908 9909 int qla2xxx_disable_port(struct Scsi_Host *host) 9910 { 9911 scsi_qla_host_t *vha = shost_priv(host); 9912 9913 vha->hw->flags.port_isolated = 1; 9914 9915 if (qla2x00_isp_reg_stat(vha->hw)) { 9916 ql_log(ql_log_info, vha, 0x9006, 9917 "PCI/Register disconnect, exiting.\n"); 9918 qla_pci_set_eeh_busy(vha); 9919 return FAILED; 9920 } 9921 if (qla2x00_chip_is_down(vha)) 9922 return 0; 9923 9924 if (vha->flags.online) { 9925 qla2x00_abort_isp_cleanup(vha); 9926 qla2x00_wait_for_sess_deletion(vha); 9927 } 9928 9929 return 0; 9930 } 9931 9932 int qla2xxx_enable_port(struct Scsi_Host *host) 9933 { 9934 scsi_qla_host_t *vha = shost_priv(host); 9935 9936 if (qla2x00_isp_reg_stat(vha->hw)) { 9937 ql_log(ql_log_info, vha, 0x9001, 9938 "PCI/Register disconnect, exiting.\n"); 9939 qla_pci_set_eeh_busy(vha); 9940 return FAILED; 9941 } 9942 9943 vha->hw->flags.port_isolated = 0; 9944 /* Set the flag to 1, so that isp_abort can proceed */ 9945 vha->flags.online = 1; 9946 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 9947 qla2xxx_wake_dpc(vha); 9948 9949 return 0; 9950 } 9951