1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); 34 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, 35 uint16_t *); 36 37 static int qla2x00_restart_isp(scsi_qla_host_t *); 38 39 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 40 static int qla84xx_init_chip(scsi_qla_host_t *); 41 static int qla25xx_init_queues(struct qla_hw_data *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(unsigned long __data) 47 { 48 srb_t *sp = (srb_t *)__data; 49 struct srb_iocb *iocb; 50 fc_port_t *fcport = sp->fcport; 51 struct qla_hw_data *ha = fcport->vha->hw; 52 struct req_que *req; 53 unsigned long flags; 54 55 spin_lock_irqsave(&ha->hardware_lock, flags); 56 req = ha->req_q_map[0]; 57 req->outstanding_cmds[sp->handle] = NULL; 58 iocb = &sp->u.iocb_cmd; 59 iocb->timeout(sp); 60 sp->free(fcport->vha, sp); 61 spin_unlock_irqrestore(&ha->hardware_lock, flags); 62 } 63 64 void 65 qla2x00_sp_free(void *data, void *ptr) 66 { 67 srb_t *sp = (srb_t *)ptr; 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 69 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 70 71 del_timer(&iocb->timer); 72 qla2x00_rel_sp(vha, sp); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (IS_QLAFX00(ha)) { 86 tmo = FX00_DEF_RATOV * 2; 87 } else if (!IS_FWI2_CAPABLE(ha)) { 88 /* 89 * Except for earlier ISPs where the timeout is seeded from the 90 * initialization control block. 91 */ 92 tmo = ha->login_timeout; 93 } 94 return tmo; 95 } 96 97 static void 98 qla2x00_async_iocb_timeout(void *data) 99 { 100 srb_t *sp = (srb_t *)data; 101 fc_port_t *fcport = sp->fcport; 102 103 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 104 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n", 105 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area, 106 fcport->d_id.b.al_pa); 107 108 fcport->flags &= ~FCF_ASYNC_SENT; 109 if (sp->type == SRB_LOGIN_CMD) { 110 struct srb_iocb *lio = &sp->u.iocb_cmd; 111 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); 112 /* Retry as needed. */ 113 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 114 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 115 QLA_LOGIO_LOGIN_RETRIED : 0; 116 qla2x00_post_async_login_done_work(fcport->vha, fcport, 117 lio->u.logio.data); 118 } else if (sp->type == SRB_LOGOUT_CMD) { 119 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT); 120 } 121 } 122 123 static void 124 qla2x00_async_login_sp_done(void *data, void *ptr, int res) 125 { 126 srb_t *sp = (srb_t *)ptr; 127 struct srb_iocb *lio = &sp->u.iocb_cmd; 128 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 129 130 if (!test_bit(UNLOADING, &vha->dpc_flags)) 131 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, 132 lio->u.logio.data); 133 sp->free(sp->fcport->vha, sp); 134 } 135 136 int 137 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 138 uint16_t *data) 139 { 140 srb_t *sp; 141 struct srb_iocb *lio; 142 int rval; 143 144 rval = QLA_FUNCTION_FAILED; 145 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 146 if (!sp) 147 goto done; 148 149 sp->type = SRB_LOGIN_CMD; 150 sp->name = "login"; 151 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 152 153 lio = &sp->u.iocb_cmd; 154 lio->timeout = qla2x00_async_iocb_timeout; 155 sp->done = qla2x00_async_login_sp_done; 156 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 157 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 158 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 159 rval = qla2x00_start_sp(sp); 160 if (rval != QLA_SUCCESS) { 161 fcport->flags &= ~FCF_ASYNC_SENT; 162 fcport->flags |= FCF_LOGIN_NEEDED; 163 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 164 goto done_free_sp; 165 } 166 167 ql_dbg(ql_dbg_disc, vha, 0x2072, 168 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x " 169 "retries=%d.\n", sp->handle, fcport->loop_id, 170 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 171 fcport->login_retry); 172 return rval; 173 174 done_free_sp: 175 sp->free(fcport->vha, sp); 176 done: 177 return rval; 178 } 179 180 static void 181 qla2x00_async_logout_sp_done(void *data, void *ptr, int res) 182 { 183 srb_t *sp = (srb_t *)ptr; 184 struct srb_iocb *lio = &sp->u.iocb_cmd; 185 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 186 187 if (!test_bit(UNLOADING, &vha->dpc_flags)) 188 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, 189 lio->u.logio.data); 190 sp->free(sp->fcport->vha, sp); 191 } 192 193 int 194 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 195 { 196 srb_t *sp; 197 struct srb_iocb *lio; 198 int rval; 199 200 rval = QLA_FUNCTION_FAILED; 201 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 202 if (!sp) 203 goto done; 204 205 sp->type = SRB_LOGOUT_CMD; 206 sp->name = "logout"; 207 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 208 209 lio = &sp->u.iocb_cmd; 210 lio->timeout = qla2x00_async_iocb_timeout; 211 sp->done = qla2x00_async_logout_sp_done; 212 rval = qla2x00_start_sp(sp); 213 if (rval != QLA_SUCCESS) 214 goto done_free_sp; 215 216 ql_dbg(ql_dbg_disc, vha, 0x2070, 217 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 218 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 219 fcport->d_id.b.area, fcport->d_id.b.al_pa); 220 return rval; 221 222 done_free_sp: 223 sp->free(fcport->vha, sp); 224 done: 225 return rval; 226 } 227 228 static void 229 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res) 230 { 231 srb_t *sp = (srb_t *)ptr; 232 struct srb_iocb *lio = &sp->u.iocb_cmd; 233 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 234 235 if (!test_bit(UNLOADING, &vha->dpc_flags)) 236 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, 237 lio->u.logio.data); 238 sp->free(sp->fcport->vha, sp); 239 } 240 241 int 242 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 243 uint16_t *data) 244 { 245 srb_t *sp; 246 struct srb_iocb *lio; 247 int rval; 248 249 rval = QLA_FUNCTION_FAILED; 250 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 251 if (!sp) 252 goto done; 253 254 sp->type = SRB_ADISC_CMD; 255 sp->name = "adisc"; 256 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 257 258 lio = &sp->u.iocb_cmd; 259 lio->timeout = qla2x00_async_iocb_timeout; 260 sp->done = qla2x00_async_adisc_sp_done; 261 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 262 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 263 rval = qla2x00_start_sp(sp); 264 if (rval != QLA_SUCCESS) 265 goto done_free_sp; 266 267 ql_dbg(ql_dbg_disc, vha, 0x206f, 268 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", 269 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 270 fcport->d_id.b.area, fcport->d_id.b.al_pa); 271 return rval; 272 273 done_free_sp: 274 sp->free(fcport->vha, sp); 275 done: 276 return rval; 277 } 278 279 static void 280 qla2x00_tmf_iocb_timeout(void *data) 281 { 282 srb_t *sp = (srb_t *)data; 283 struct srb_iocb *tmf = &sp->u.iocb_cmd; 284 285 tmf->u.tmf.comp_status = CS_TIMEOUT; 286 complete(&tmf->u.tmf.comp); 287 } 288 289 static void 290 qla2x00_tmf_sp_done(void *data, void *ptr, int res) 291 { 292 srb_t *sp = (srb_t *)ptr; 293 struct srb_iocb *tmf = &sp->u.iocb_cmd; 294 complete(&tmf->u.tmf.comp); 295 } 296 297 int 298 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 299 uint32_t tag) 300 { 301 struct scsi_qla_host *vha = fcport->vha; 302 struct srb_iocb *tm_iocb; 303 srb_t *sp; 304 int rval = QLA_FUNCTION_FAILED; 305 306 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 307 if (!sp) 308 goto done; 309 310 tm_iocb = &sp->u.iocb_cmd; 311 sp->type = SRB_TM_CMD; 312 sp->name = "tmf"; 313 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 314 tm_iocb->u.tmf.flags = flags; 315 tm_iocb->u.tmf.lun = lun; 316 tm_iocb->u.tmf.data = tag; 317 sp->done = qla2x00_tmf_sp_done; 318 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 319 init_completion(&tm_iocb->u.tmf.comp); 320 321 rval = qla2x00_start_sp(sp); 322 if (rval != QLA_SUCCESS) 323 goto done_free_sp; 324 325 ql_dbg(ql_dbg_taskm, vha, 0x802f, 326 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 327 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 328 fcport->d_id.b.area, fcport->d_id.b.al_pa); 329 330 wait_for_completion(&tm_iocb->u.tmf.comp); 331 332 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 333 QLA_SUCCESS : QLA_FUNCTION_FAILED; 334 335 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) { 336 ql_dbg(ql_dbg_taskm, vha, 0x8030, 337 "TM IOCB failed (%x).\n", rval); 338 } 339 340 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 341 flags = tm_iocb->u.tmf.flags; 342 lun = (uint16_t)tm_iocb->u.tmf.lun; 343 344 /* Issue Marker IOCB */ 345 qla2x00_marker(vha, vha->hw->req_q_map[0], 346 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 347 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 348 } 349 350 done_free_sp: 351 sp->free(vha, sp); 352 done: 353 return rval; 354 } 355 356 static void 357 qla24xx_abort_iocb_timeout(void *data) 358 { 359 srb_t *sp = (srb_t *)data; 360 struct srb_iocb *abt = &sp->u.iocb_cmd; 361 362 abt->u.abt.comp_status = CS_TIMEOUT; 363 complete(&abt->u.abt.comp); 364 } 365 366 static void 367 qla24xx_abort_sp_done(void *data, void *ptr, int res) 368 { 369 srb_t *sp = (srb_t *)ptr; 370 struct srb_iocb *abt = &sp->u.iocb_cmd; 371 372 complete(&abt->u.abt.comp); 373 } 374 375 static int 376 qla24xx_async_abort_cmd(srb_t *cmd_sp) 377 { 378 scsi_qla_host_t *vha = cmd_sp->fcport->vha; 379 fc_port_t *fcport = cmd_sp->fcport; 380 struct srb_iocb *abt_iocb; 381 srb_t *sp; 382 int rval = QLA_FUNCTION_FAILED; 383 384 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 385 if (!sp) 386 goto done; 387 388 abt_iocb = &sp->u.iocb_cmd; 389 sp->type = SRB_ABT_CMD; 390 sp->name = "abort"; 391 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 392 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 393 sp->done = qla24xx_abort_sp_done; 394 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 395 init_completion(&abt_iocb->u.abt.comp); 396 397 rval = qla2x00_start_sp(sp); 398 if (rval != QLA_SUCCESS) 399 goto done_free_sp; 400 401 ql_dbg(ql_dbg_async, vha, 0x507c, 402 "Abort command issued - hdl=%x, target_id=%x\n", 403 cmd_sp->handle, fcport->tgt_id); 404 405 wait_for_completion(&abt_iocb->u.abt.comp); 406 407 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 408 QLA_SUCCESS : QLA_FUNCTION_FAILED; 409 410 done_free_sp: 411 sp->free(vha, sp); 412 done: 413 return rval; 414 } 415 416 int 417 qla24xx_async_abort_command(srb_t *sp) 418 { 419 unsigned long flags = 0; 420 421 uint32_t handle; 422 fc_port_t *fcport = sp->fcport; 423 struct scsi_qla_host *vha = fcport->vha; 424 struct qla_hw_data *ha = vha->hw; 425 struct req_que *req = vha->req; 426 427 spin_lock_irqsave(&ha->hardware_lock, flags); 428 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 429 if (req->outstanding_cmds[handle] == sp) 430 break; 431 } 432 spin_unlock_irqrestore(&ha->hardware_lock, flags); 433 if (handle == req->num_outstanding_cmds) { 434 /* Command not found. */ 435 return QLA_FUNCTION_FAILED; 436 } 437 if (sp->type == SRB_FXIOCB_DCMD) 438 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 439 FXDISC_ABORT_IOCTL); 440 441 return qla24xx_async_abort_cmd(sp); 442 } 443 444 void 445 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, 446 uint16_t *data) 447 { 448 int rval; 449 450 switch (data[0]) { 451 case MBS_COMMAND_COMPLETE: 452 /* 453 * Driver must validate login state - If PRLI not complete, 454 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 455 * requests. 456 */ 457 rval = qla2x00_get_port_database(vha, fcport, 0); 458 if (rval == QLA_NOT_LOGGED_IN) { 459 fcport->flags &= ~FCF_ASYNC_SENT; 460 fcport->flags |= FCF_LOGIN_NEEDED; 461 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 462 break; 463 } 464 465 if (rval != QLA_SUCCESS) { 466 qla2x00_post_async_logout_work(vha, fcport, NULL); 467 qla2x00_post_async_login_work(vha, fcport, NULL); 468 break; 469 } 470 if (fcport->flags & FCF_FCP2_DEVICE) { 471 qla2x00_post_async_adisc_work(vha, fcport, data); 472 break; 473 } 474 qla2x00_update_fcport(vha, fcport); 475 break; 476 case MBS_COMMAND_ERROR: 477 fcport->flags &= ~FCF_ASYNC_SENT; 478 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 479 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 480 else 481 qla2x00_mark_device_lost(vha, fcport, 1, 0); 482 break; 483 case MBS_PORT_ID_USED: 484 fcport->loop_id = data[1]; 485 qla2x00_post_async_logout_work(vha, fcport, NULL); 486 qla2x00_post_async_login_work(vha, fcport, NULL); 487 break; 488 case MBS_LOOP_ID_USED: 489 fcport->loop_id++; 490 rval = qla2x00_find_new_loop_id(vha, fcport); 491 if (rval != QLA_SUCCESS) { 492 fcport->flags &= ~FCF_ASYNC_SENT; 493 qla2x00_mark_device_lost(vha, fcport, 1, 0); 494 break; 495 } 496 qla2x00_post_async_login_work(vha, fcport, NULL); 497 break; 498 } 499 return; 500 } 501 502 void 503 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 504 uint16_t *data) 505 { 506 /* Don't re-login in target mode */ 507 if (!fcport->tgt_session) 508 qla2x00_mark_device_lost(vha, fcport, 1, 0); 509 qlt_logo_completion_handler(fcport, data[0]); 510 return; 511 } 512 513 void 514 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 515 uint16_t *data) 516 { 517 if (data[0] == MBS_COMMAND_COMPLETE) { 518 qla2x00_update_fcport(vha, fcport); 519 520 return; 521 } 522 523 /* Retry login. */ 524 fcport->flags &= ~FCF_ASYNC_SENT; 525 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 526 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 527 else 528 qla2x00_mark_device_lost(vha, fcport, 1, 0); 529 530 return; 531 } 532 533 /****************************************************************************/ 534 /* QLogic ISP2x00 Hardware Support Functions. */ 535 /****************************************************************************/ 536 537 static int 538 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 539 { 540 int rval = QLA_SUCCESS; 541 struct qla_hw_data *ha = vha->hw; 542 uint32_t idc_major_ver, idc_minor_ver; 543 uint16_t config[4]; 544 545 qla83xx_idc_lock(vha, 0); 546 547 /* SV: TODO: Assign initialization timeout from 548 * flash-info / other param 549 */ 550 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 551 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 552 553 /* Set our fcoe function presence */ 554 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 555 ql_dbg(ql_dbg_p3p, vha, 0xb077, 556 "Error while setting DRV-Presence.\n"); 557 rval = QLA_FUNCTION_FAILED; 558 goto exit; 559 } 560 561 /* Decide the reset ownership */ 562 qla83xx_reset_ownership(vha); 563 564 /* 565 * On first protocol driver load: 566 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 567 * register. 568 * Others: Check compatibility with current IDC Major version. 569 */ 570 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 571 if (ha->flags.nic_core_reset_owner) { 572 /* Set IDC Major version */ 573 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 574 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 575 576 /* Clearing IDC-Lock-Recovery register */ 577 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 578 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 579 /* 580 * Clear further IDC participation if we are not compatible with 581 * the current IDC Major Version. 582 */ 583 ql_log(ql_log_warn, vha, 0xb07d, 584 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 585 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 586 __qla83xx_clear_drv_presence(vha); 587 rval = QLA_FUNCTION_FAILED; 588 goto exit; 589 } 590 /* Each function sets its supported Minor version. */ 591 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 592 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 593 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 594 595 if (ha->flags.nic_core_reset_owner) { 596 memset(config, 0, sizeof(config)); 597 if (!qla81xx_get_port_config(vha, config)) 598 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 599 QLA8XXX_DEV_READY); 600 } 601 602 rval = qla83xx_idc_state_handler(vha); 603 604 exit: 605 qla83xx_idc_unlock(vha, 0); 606 607 return rval; 608 } 609 610 /* 611 * qla2x00_initialize_adapter 612 * Initialize board. 613 * 614 * Input: 615 * ha = adapter block pointer. 616 * 617 * Returns: 618 * 0 = success 619 */ 620 int 621 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 622 { 623 int rval; 624 struct qla_hw_data *ha = vha->hw; 625 struct req_que *req = ha->req_q_map[0]; 626 627 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 628 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 629 630 /* Clear adapter flags. */ 631 vha->flags.online = 0; 632 ha->flags.chip_reset_done = 0; 633 vha->flags.reset_active = 0; 634 ha->flags.pci_channel_io_perm_failure = 0; 635 ha->flags.eeh_busy = 0; 636 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 637 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 638 atomic_set(&vha->loop_state, LOOP_DOWN); 639 vha->device_flags = DFLG_NO_CABLE; 640 vha->dpc_flags = 0; 641 vha->flags.management_server_logged_in = 0; 642 vha->marker_needed = 0; 643 ha->isp_abort_cnt = 0; 644 ha->beacon_blink_led = 0; 645 646 set_bit(0, ha->req_qid_map); 647 set_bit(0, ha->rsp_qid_map); 648 649 ql_dbg(ql_dbg_init, vha, 0x0040, 650 "Configuring PCI space...\n"); 651 rval = ha->isp_ops->pci_config(vha); 652 if (rval) { 653 ql_log(ql_log_warn, vha, 0x0044, 654 "Unable to configure PCI space.\n"); 655 return (rval); 656 } 657 658 ha->isp_ops->reset_chip(vha); 659 660 rval = qla2xxx_get_flash_info(vha); 661 if (rval) { 662 ql_log(ql_log_fatal, vha, 0x004f, 663 "Unable to validate FLASH data.\n"); 664 return rval; 665 } 666 667 if (IS_QLA8044(ha)) { 668 qla8044_read_reset_template(vha); 669 670 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 671 * If DONRESET_BIT0 is set, drivers should not set dev_state 672 * to NEED_RESET. But if NEED_RESET is set, drivers should 673 * should honor the reset. */ 674 if (ql2xdontresethba == 1) 675 qla8044_set_idc_dontreset(vha); 676 } 677 678 ha->isp_ops->get_flash_version(vha, req->ring); 679 ql_dbg(ql_dbg_init, vha, 0x0061, 680 "Configure NVRAM parameters...\n"); 681 682 ha->isp_ops->nvram_config(vha); 683 684 if (ha->flags.disable_serdes) { 685 /* Mask HBA via NVRAM settings? */ 686 ql_log(ql_log_info, vha, 0x0077, 687 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 688 return QLA_FUNCTION_FAILED; 689 } 690 691 ql_dbg(ql_dbg_init, vha, 0x0078, 692 "Verifying loaded RISC code...\n"); 693 694 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 695 rval = ha->isp_ops->chip_diag(vha); 696 if (rval) 697 return (rval); 698 rval = qla2x00_setup_chip(vha); 699 if (rval) 700 return (rval); 701 } 702 703 if (IS_QLA84XX(ha)) { 704 ha->cs84xx = qla84xx_get_chip(vha); 705 if (!ha->cs84xx) { 706 ql_log(ql_log_warn, vha, 0x00d0, 707 "Unable to configure ISP84XX.\n"); 708 return QLA_FUNCTION_FAILED; 709 } 710 } 711 712 if (qla_ini_mode_enabled(vha)) 713 rval = qla2x00_init_rings(vha); 714 715 ha->flags.chip_reset_done = 1; 716 717 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 718 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 719 rval = qla84xx_init_chip(vha); 720 if (rval != QLA_SUCCESS) { 721 ql_log(ql_log_warn, vha, 0x00d4, 722 "Unable to initialize ISP84XX.\n"); 723 qla84xx_put_chip(vha); 724 } 725 } 726 727 /* Load the NIC Core f/w if we are the first protocol driver. */ 728 if (IS_QLA8031(ha)) { 729 rval = qla83xx_nic_core_fw_load(vha); 730 if (rval) 731 ql_log(ql_log_warn, vha, 0x0124, 732 "Error in initializing NIC Core f/w.\n"); 733 } 734 735 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 736 qla24xx_read_fcp_prio_cfg(vha); 737 738 if (IS_P3P_TYPE(ha)) 739 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 740 else 741 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 742 743 return (rval); 744 } 745 746 /** 747 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 748 * @ha: HA context 749 * 750 * Returns 0 on success. 751 */ 752 int 753 qla2100_pci_config(scsi_qla_host_t *vha) 754 { 755 uint16_t w; 756 unsigned long flags; 757 struct qla_hw_data *ha = vha->hw; 758 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 759 760 pci_set_master(ha->pdev); 761 pci_try_set_mwi(ha->pdev); 762 763 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 764 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 765 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 766 767 pci_disable_rom(ha->pdev); 768 769 /* Get PCI bus information. */ 770 spin_lock_irqsave(&ha->hardware_lock, flags); 771 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 772 spin_unlock_irqrestore(&ha->hardware_lock, flags); 773 774 return QLA_SUCCESS; 775 } 776 777 /** 778 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 779 * @ha: HA context 780 * 781 * Returns 0 on success. 782 */ 783 int 784 qla2300_pci_config(scsi_qla_host_t *vha) 785 { 786 uint16_t w; 787 unsigned long flags = 0; 788 uint32_t cnt; 789 struct qla_hw_data *ha = vha->hw; 790 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 791 792 pci_set_master(ha->pdev); 793 pci_try_set_mwi(ha->pdev); 794 795 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 796 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 797 798 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 799 w &= ~PCI_COMMAND_INTX_DISABLE; 800 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 801 802 /* 803 * If this is a 2300 card and not 2312, reset the 804 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 805 * the 2310 also reports itself as a 2300 so we need to get the 806 * fb revision level -- a 6 indicates it really is a 2300 and 807 * not a 2310. 808 */ 809 if (IS_QLA2300(ha)) { 810 spin_lock_irqsave(&ha->hardware_lock, flags); 811 812 /* Pause RISC. */ 813 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 814 for (cnt = 0; cnt < 30000; cnt++) { 815 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 816 break; 817 818 udelay(10); 819 } 820 821 /* Select FPM registers. */ 822 WRT_REG_WORD(®->ctrl_status, 0x20); 823 RD_REG_WORD(®->ctrl_status); 824 825 /* Get the fb rev level */ 826 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 827 828 if (ha->fb_rev == FPM_2300) 829 pci_clear_mwi(ha->pdev); 830 831 /* Deselect FPM registers. */ 832 WRT_REG_WORD(®->ctrl_status, 0x0); 833 RD_REG_WORD(®->ctrl_status); 834 835 /* Release RISC module. */ 836 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 837 for (cnt = 0; cnt < 30000; cnt++) { 838 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 839 break; 840 841 udelay(10); 842 } 843 844 spin_unlock_irqrestore(&ha->hardware_lock, flags); 845 } 846 847 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 848 849 pci_disable_rom(ha->pdev); 850 851 /* Get PCI bus information. */ 852 spin_lock_irqsave(&ha->hardware_lock, flags); 853 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 854 spin_unlock_irqrestore(&ha->hardware_lock, flags); 855 856 return QLA_SUCCESS; 857 } 858 859 /** 860 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 861 * @ha: HA context 862 * 863 * Returns 0 on success. 864 */ 865 int 866 qla24xx_pci_config(scsi_qla_host_t *vha) 867 { 868 uint16_t w; 869 unsigned long flags = 0; 870 struct qla_hw_data *ha = vha->hw; 871 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 872 873 pci_set_master(ha->pdev); 874 pci_try_set_mwi(ha->pdev); 875 876 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 877 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 878 w &= ~PCI_COMMAND_INTX_DISABLE; 879 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 880 881 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 882 883 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 884 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 885 pcix_set_mmrbc(ha->pdev, 2048); 886 887 /* PCIe -- adjust Maximum Read Request Size (2048). */ 888 if (pci_is_pcie(ha->pdev)) 889 pcie_set_readrq(ha->pdev, 4096); 890 891 pci_disable_rom(ha->pdev); 892 893 ha->chip_revision = ha->pdev->revision; 894 895 /* Get PCI bus information. */ 896 spin_lock_irqsave(&ha->hardware_lock, flags); 897 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 898 spin_unlock_irqrestore(&ha->hardware_lock, flags); 899 900 return QLA_SUCCESS; 901 } 902 903 /** 904 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 905 * @ha: HA context 906 * 907 * Returns 0 on success. 908 */ 909 int 910 qla25xx_pci_config(scsi_qla_host_t *vha) 911 { 912 uint16_t w; 913 struct qla_hw_data *ha = vha->hw; 914 915 pci_set_master(ha->pdev); 916 pci_try_set_mwi(ha->pdev); 917 918 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 919 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 920 w &= ~PCI_COMMAND_INTX_DISABLE; 921 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 922 923 /* PCIe -- adjust Maximum Read Request Size (2048). */ 924 if (pci_is_pcie(ha->pdev)) 925 pcie_set_readrq(ha->pdev, 4096); 926 927 pci_disable_rom(ha->pdev); 928 929 ha->chip_revision = ha->pdev->revision; 930 931 return QLA_SUCCESS; 932 } 933 934 /** 935 * qla2x00_isp_firmware() - Choose firmware image. 936 * @ha: HA context 937 * 938 * Returns 0 on success. 939 */ 940 static int 941 qla2x00_isp_firmware(scsi_qla_host_t *vha) 942 { 943 int rval; 944 uint16_t loop_id, topo, sw_cap; 945 uint8_t domain, area, al_pa; 946 struct qla_hw_data *ha = vha->hw; 947 948 /* Assume loading risc code */ 949 rval = QLA_FUNCTION_FAILED; 950 951 if (ha->flags.disable_risc_code_load) { 952 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 953 954 /* Verify checksum of loaded RISC code. */ 955 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 956 if (rval == QLA_SUCCESS) { 957 /* And, verify we are not in ROM code. */ 958 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 959 &area, &domain, &topo, &sw_cap); 960 } 961 } 962 963 if (rval) 964 ql_dbg(ql_dbg_init, vha, 0x007a, 965 "**** Load RISC code ****.\n"); 966 967 return (rval); 968 } 969 970 /** 971 * qla2x00_reset_chip() - Reset ISP chip. 972 * @ha: HA context 973 * 974 * Returns 0 on success. 975 */ 976 void 977 qla2x00_reset_chip(scsi_qla_host_t *vha) 978 { 979 unsigned long flags = 0; 980 struct qla_hw_data *ha = vha->hw; 981 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 982 uint32_t cnt; 983 uint16_t cmd; 984 985 if (unlikely(pci_channel_offline(ha->pdev))) 986 return; 987 988 ha->isp_ops->disable_intrs(ha); 989 990 spin_lock_irqsave(&ha->hardware_lock, flags); 991 992 /* Turn off master enable */ 993 cmd = 0; 994 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 995 cmd &= ~PCI_COMMAND_MASTER; 996 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 997 998 if (!IS_QLA2100(ha)) { 999 /* Pause RISC. */ 1000 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 1001 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 1002 for (cnt = 0; cnt < 30000; cnt++) { 1003 if ((RD_REG_WORD(®->hccr) & 1004 HCCR_RISC_PAUSE) != 0) 1005 break; 1006 udelay(100); 1007 } 1008 } else { 1009 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1010 udelay(10); 1011 } 1012 1013 /* Select FPM registers. */ 1014 WRT_REG_WORD(®->ctrl_status, 0x20); 1015 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1016 1017 /* FPM Soft Reset. */ 1018 WRT_REG_WORD(®->fpm_diag_config, 0x100); 1019 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 1020 1021 /* Toggle Fpm Reset. */ 1022 if (!IS_QLA2200(ha)) { 1023 WRT_REG_WORD(®->fpm_diag_config, 0x0); 1024 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 1025 } 1026 1027 /* Select frame buffer registers. */ 1028 WRT_REG_WORD(®->ctrl_status, 0x10); 1029 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1030 1031 /* Reset frame buffer FIFOs. */ 1032 if (IS_QLA2200(ha)) { 1033 WRT_FB_CMD_REG(ha, reg, 0xa000); 1034 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 1035 } else { 1036 WRT_FB_CMD_REG(ha, reg, 0x00fc); 1037 1038 /* Read back fb_cmd until zero or 3 seconds max */ 1039 for (cnt = 0; cnt < 3000; cnt++) { 1040 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 1041 break; 1042 udelay(100); 1043 } 1044 } 1045 1046 /* Select RISC module registers. */ 1047 WRT_REG_WORD(®->ctrl_status, 0); 1048 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1049 1050 /* Reset RISC processor. */ 1051 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1052 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1053 1054 /* Release RISC processor. */ 1055 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1056 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1057 } 1058 1059 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 1060 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 1061 1062 /* Reset ISP chip. */ 1063 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1064 1065 /* Wait for RISC to recover from reset. */ 1066 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1067 /* 1068 * It is necessary to for a delay here since the card doesn't 1069 * respond to PCI reads during a reset. On some architectures 1070 * this will result in an MCA. 1071 */ 1072 udelay(20); 1073 for (cnt = 30000; cnt; cnt--) { 1074 if ((RD_REG_WORD(®->ctrl_status) & 1075 CSR_ISP_SOFT_RESET) == 0) 1076 break; 1077 udelay(100); 1078 } 1079 } else 1080 udelay(10); 1081 1082 /* Reset RISC processor. */ 1083 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1084 1085 WRT_REG_WORD(®->semaphore, 0); 1086 1087 /* Release RISC processor. */ 1088 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1089 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1090 1091 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1092 for (cnt = 0; cnt < 30000; cnt++) { 1093 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 1094 break; 1095 1096 udelay(100); 1097 } 1098 } else 1099 udelay(100); 1100 1101 /* Turn on master enable */ 1102 cmd |= PCI_COMMAND_MASTER; 1103 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 1104 1105 /* Disable RISC pause on FPM parity error. */ 1106 if (!IS_QLA2100(ha)) { 1107 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 1108 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1109 } 1110 1111 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1112 } 1113 1114 /** 1115 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 1116 * 1117 * Returns 0 on success. 1118 */ 1119 static int 1120 qla81xx_reset_mpi(scsi_qla_host_t *vha) 1121 { 1122 uint16_t mb[4] = {0x1010, 0, 1, 0}; 1123 1124 if (!IS_QLA81XX(vha->hw)) 1125 return QLA_SUCCESS; 1126 1127 return qla81xx_write_mpi_register(vha, mb); 1128 } 1129 1130 /** 1131 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 1132 * @ha: HA context 1133 * 1134 * Returns 0 on success. 1135 */ 1136 static inline int 1137 qla24xx_reset_risc(scsi_qla_host_t *vha) 1138 { 1139 unsigned long flags = 0; 1140 struct qla_hw_data *ha = vha->hw; 1141 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1142 uint32_t cnt; 1143 uint16_t wd; 1144 static int abts_cnt; /* ISP abort retry counts */ 1145 int rval = QLA_SUCCESS; 1146 1147 spin_lock_irqsave(&ha->hardware_lock, flags); 1148 1149 /* Reset RISC. */ 1150 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1151 for (cnt = 0; cnt < 30000; cnt++) { 1152 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 1153 break; 1154 1155 udelay(10); 1156 } 1157 1158 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 1159 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 1160 1161 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 1162 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 1163 RD_REG_DWORD(®->hccr), 1164 RD_REG_DWORD(®->ctrl_status), 1165 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 1166 1167 WRT_REG_DWORD(®->ctrl_status, 1168 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1169 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 1170 1171 udelay(100); 1172 1173 /* Wait for firmware to complete NVRAM accesses. */ 1174 RD_REG_WORD(®->mailbox0); 1175 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 1176 rval == QLA_SUCCESS; cnt--) { 1177 barrier(); 1178 if (cnt) 1179 udelay(5); 1180 else 1181 rval = QLA_FUNCTION_TIMEOUT; 1182 } 1183 1184 if (rval == QLA_SUCCESS) 1185 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 1186 1187 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 1188 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 1189 RD_REG_DWORD(®->hccr), 1190 RD_REG_DWORD(®->mailbox0)); 1191 1192 /* Wait for soft-reset to complete. */ 1193 RD_REG_DWORD(®->ctrl_status); 1194 for (cnt = 0; cnt < 6000000; cnt++) { 1195 barrier(); 1196 if ((RD_REG_DWORD(®->ctrl_status) & 1197 CSRX_ISP_SOFT_RESET) == 0) 1198 break; 1199 1200 udelay(5); 1201 } 1202 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 1203 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 1204 1205 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 1206 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 1207 RD_REG_DWORD(®->hccr), 1208 RD_REG_DWORD(®->ctrl_status)); 1209 1210 /* If required, do an MPI FW reset now */ 1211 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 1212 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 1213 if (++abts_cnt < 5) { 1214 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1215 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 1216 } else { 1217 /* 1218 * We exhausted the ISP abort retries. We have to 1219 * set the board offline. 1220 */ 1221 abts_cnt = 0; 1222 vha->flags.online = 0; 1223 } 1224 } 1225 } 1226 1227 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 1228 RD_REG_DWORD(®->hccr); 1229 1230 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 1231 RD_REG_DWORD(®->hccr); 1232 1233 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 1234 RD_REG_DWORD(®->hccr); 1235 1236 RD_REG_WORD(®->mailbox0); 1237 for (cnt = 6000000; RD_REG_WORD(®->mailbox0) != 0 && 1238 rval == QLA_SUCCESS; cnt--) { 1239 barrier(); 1240 if (cnt) 1241 udelay(5); 1242 else 1243 rval = QLA_FUNCTION_TIMEOUT; 1244 } 1245 if (rval == QLA_SUCCESS) 1246 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 1247 1248 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 1249 "Host Risc 0x%x, mailbox0 0x%x\n", 1250 RD_REG_DWORD(®->hccr), 1251 RD_REG_WORD(®->mailbox0)); 1252 1253 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1254 1255 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 1256 "Driver in %s mode\n", 1257 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 1258 1259 if (IS_NOPOLLING_TYPE(ha)) 1260 ha->isp_ops->enable_intrs(ha); 1261 1262 return rval; 1263 } 1264 1265 static void 1266 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 1267 { 1268 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 1269 1270 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 1271 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 1272 1273 } 1274 1275 static void 1276 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 1277 { 1278 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 1279 1280 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 1281 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 1282 } 1283 1284 static void 1285 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 1286 { 1287 uint32_t wd32 = 0; 1288 uint delta_msec = 100; 1289 uint elapsed_msec = 0; 1290 uint timeout_msec; 1291 ulong n; 1292 1293 if (vha->hw->pdev->subsystem_device != 0x0175 && 1294 vha->hw->pdev->subsystem_device != 0x0240) 1295 return; 1296 1297 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 1298 udelay(100); 1299 1300 attempt: 1301 timeout_msec = TIMEOUT_SEMAPHORE; 1302 n = timeout_msec / delta_msec; 1303 while (n--) { 1304 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 1305 qla25xx_read_risc_sema_reg(vha, &wd32); 1306 if (wd32 & RISC_SEMAPHORE) 1307 break; 1308 msleep(delta_msec); 1309 elapsed_msec += delta_msec; 1310 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 1311 goto force; 1312 } 1313 1314 if (!(wd32 & RISC_SEMAPHORE)) 1315 goto force; 1316 1317 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 1318 goto acquired; 1319 1320 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 1321 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 1322 n = timeout_msec / delta_msec; 1323 while (n--) { 1324 qla25xx_read_risc_sema_reg(vha, &wd32); 1325 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 1326 break; 1327 msleep(delta_msec); 1328 elapsed_msec += delta_msec; 1329 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 1330 goto force; 1331 } 1332 1333 if (wd32 & RISC_SEMAPHORE_FORCE) 1334 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 1335 1336 goto attempt; 1337 1338 force: 1339 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 1340 1341 acquired: 1342 return; 1343 } 1344 1345 /** 1346 * qla24xx_reset_chip() - Reset ISP24xx chip. 1347 * @ha: HA context 1348 * 1349 * Returns 0 on success. 1350 */ 1351 void 1352 qla24xx_reset_chip(scsi_qla_host_t *vha) 1353 { 1354 struct qla_hw_data *ha = vha->hw; 1355 1356 if (pci_channel_offline(ha->pdev) && 1357 ha->flags.pci_channel_io_perm_failure) { 1358 return; 1359 } 1360 1361 ha->isp_ops->disable_intrs(ha); 1362 1363 qla25xx_manipulate_risc_semaphore(vha); 1364 1365 /* Perform RISC reset. */ 1366 qla24xx_reset_risc(vha); 1367 } 1368 1369 /** 1370 * qla2x00_chip_diag() - Test chip for proper operation. 1371 * @ha: HA context 1372 * 1373 * Returns 0 on success. 1374 */ 1375 int 1376 qla2x00_chip_diag(scsi_qla_host_t *vha) 1377 { 1378 int rval; 1379 struct qla_hw_data *ha = vha->hw; 1380 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1381 unsigned long flags = 0; 1382 uint16_t data; 1383 uint32_t cnt; 1384 uint16_t mb[5]; 1385 struct req_que *req = ha->req_q_map[0]; 1386 1387 /* Assume a failed state */ 1388 rval = QLA_FUNCTION_FAILED; 1389 1390 ql_dbg(ql_dbg_init, vha, 0x007b, 1391 "Testing device at %lx.\n", (u_long)®->flash_address); 1392 1393 spin_lock_irqsave(&ha->hardware_lock, flags); 1394 1395 /* Reset ISP chip. */ 1396 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1397 1398 /* 1399 * We need to have a delay here since the card will not respond while 1400 * in reset causing an MCA on some architectures. 1401 */ 1402 udelay(20); 1403 data = qla2x00_debounce_register(®->ctrl_status); 1404 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 1405 udelay(5); 1406 data = RD_REG_WORD(®->ctrl_status); 1407 barrier(); 1408 } 1409 1410 if (!cnt) 1411 goto chip_diag_failed; 1412 1413 ql_dbg(ql_dbg_init, vha, 0x007c, 1414 "Reset register cleared by chip reset.\n"); 1415 1416 /* Reset RISC processor. */ 1417 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1418 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1419 1420 /* Workaround for QLA2312 PCI parity error */ 1421 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1422 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 1423 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 1424 udelay(5); 1425 data = RD_MAILBOX_REG(ha, reg, 0); 1426 barrier(); 1427 } 1428 } else 1429 udelay(10); 1430 1431 if (!cnt) 1432 goto chip_diag_failed; 1433 1434 /* Check product ID of chip */ 1435 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); 1436 1437 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 1438 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 1439 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 1440 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 1441 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 1442 mb[3] != PROD_ID_3) { 1443 ql_log(ql_log_warn, vha, 0x0062, 1444 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 1445 mb[1], mb[2], mb[3]); 1446 1447 goto chip_diag_failed; 1448 } 1449 ha->product_id[0] = mb[1]; 1450 ha->product_id[1] = mb[2]; 1451 ha->product_id[2] = mb[3]; 1452 ha->product_id[3] = mb[4]; 1453 1454 /* Adjust fw RISC transfer size */ 1455 if (req->length > 1024) 1456 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 1457 else 1458 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1459 req->length; 1460 1461 if (IS_QLA2200(ha) && 1462 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 1463 /* Limit firmware transfer size with a 2200A */ 1464 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 1465 1466 ha->device_type |= DT_ISP2200A; 1467 ha->fw_transfer_size = 128; 1468 } 1469 1470 /* Wrap Incoming Mailboxes Test. */ 1471 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1472 1473 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 1474 rval = qla2x00_mbx_reg_test(vha); 1475 if (rval) 1476 ql_log(ql_log_warn, vha, 0x0080, 1477 "Failed mailbox send register test.\n"); 1478 else 1479 /* Flag a successful rval */ 1480 rval = QLA_SUCCESS; 1481 spin_lock_irqsave(&ha->hardware_lock, flags); 1482 1483 chip_diag_failed: 1484 if (rval) 1485 ql_log(ql_log_info, vha, 0x0081, 1486 "Chip diagnostics **** FAILED ****.\n"); 1487 1488 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1489 1490 return (rval); 1491 } 1492 1493 /** 1494 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 1495 * @ha: HA context 1496 * 1497 * Returns 0 on success. 1498 */ 1499 int 1500 qla24xx_chip_diag(scsi_qla_host_t *vha) 1501 { 1502 int rval; 1503 struct qla_hw_data *ha = vha->hw; 1504 struct req_que *req = ha->req_q_map[0]; 1505 1506 if (IS_P3P_TYPE(ha)) 1507 return QLA_SUCCESS; 1508 1509 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 1510 1511 rval = qla2x00_mbx_reg_test(vha); 1512 if (rval) { 1513 ql_log(ql_log_warn, vha, 0x0082, 1514 "Failed mailbox send register test.\n"); 1515 } else { 1516 /* Flag a successful rval */ 1517 rval = QLA_SUCCESS; 1518 } 1519 1520 return rval; 1521 } 1522 1523 void 1524 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 1525 { 1526 int rval; 1527 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 1528 eft_size, fce_size, mq_size; 1529 dma_addr_t tc_dma; 1530 void *tc; 1531 struct qla_hw_data *ha = vha->hw; 1532 struct req_que *req = ha->req_q_map[0]; 1533 struct rsp_que *rsp = ha->rsp_q_map[0]; 1534 1535 if (ha->fw_dump) { 1536 ql_dbg(ql_dbg_init, vha, 0x00bd, 1537 "Firmware dump already allocated.\n"); 1538 return; 1539 } 1540 1541 ha->fw_dumped = 0; 1542 ha->fw_dump_cap_flags = 0; 1543 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 1544 req_q_size = rsp_q_size = 0; 1545 1546 if (IS_QLA27XX(ha)) 1547 goto try_fce; 1548 1549 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 1550 fixed_size = sizeof(struct qla2100_fw_dump); 1551 } else if (IS_QLA23XX(ha)) { 1552 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 1553 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 1554 sizeof(uint16_t); 1555 } else if (IS_FWI2_CAPABLE(ha)) { 1556 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 1557 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 1558 else if (IS_QLA81XX(ha)) 1559 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 1560 else if (IS_QLA25XX(ha)) 1561 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 1562 else 1563 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 1564 1565 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 1566 sizeof(uint32_t); 1567 if (ha->mqenable) { 1568 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 1569 mq_size = sizeof(struct qla2xxx_mq_chain); 1570 /* 1571 * Allocate maximum buffer size for all queues. 1572 * Resizing must be done at end-of-dump processing. 1573 */ 1574 mq_size += ha->max_req_queues * 1575 (req->length * sizeof(request_t)); 1576 mq_size += ha->max_rsp_queues * 1577 (rsp->length * sizeof(response_t)); 1578 } 1579 if (ha->tgt.atio_ring) 1580 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 1581 /* Allocate memory for Fibre Channel Event Buffer. */ 1582 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 1583 !IS_QLA27XX(ha)) 1584 goto try_eft; 1585 1586 try_fce: 1587 if (ha->fce) 1588 dma_free_coherent(&ha->pdev->dev, 1589 FCE_SIZE, ha->fce, ha->fce_dma); 1590 1591 /* Allocate memory for Fibre Channel Event Buffer. */ 1592 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 1593 GFP_KERNEL); 1594 if (!tc) { 1595 ql_log(ql_log_warn, vha, 0x00be, 1596 "Unable to allocate (%d KB) for FCE.\n", 1597 FCE_SIZE / 1024); 1598 goto try_eft; 1599 } 1600 1601 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 1602 ha->fce_mb, &ha->fce_bufs); 1603 if (rval) { 1604 ql_log(ql_log_warn, vha, 0x00bf, 1605 "Unable to initialize FCE (%d).\n", rval); 1606 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 1607 tc_dma); 1608 ha->flags.fce_enabled = 0; 1609 goto try_eft; 1610 } 1611 ql_dbg(ql_dbg_init, vha, 0x00c0, 1612 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 1613 1614 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 1615 ha->flags.fce_enabled = 1; 1616 ha->fce_dma = tc_dma; 1617 ha->fce = tc; 1618 1619 try_eft: 1620 if (ha->eft) 1621 dma_free_coherent(&ha->pdev->dev, 1622 EFT_SIZE, ha->eft, ha->eft_dma); 1623 1624 /* Allocate memory for Extended Trace Buffer. */ 1625 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 1626 GFP_KERNEL); 1627 if (!tc) { 1628 ql_log(ql_log_warn, vha, 0x00c1, 1629 "Unable to allocate (%d KB) for EFT.\n", 1630 EFT_SIZE / 1024); 1631 goto cont_alloc; 1632 } 1633 1634 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 1635 if (rval) { 1636 ql_log(ql_log_warn, vha, 0x00c2, 1637 "Unable to initialize EFT (%d).\n", rval); 1638 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 1639 tc_dma); 1640 goto cont_alloc; 1641 } 1642 ql_dbg(ql_dbg_init, vha, 0x00c3, 1643 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 1644 1645 eft_size = EFT_SIZE; 1646 ha->eft_dma = tc_dma; 1647 ha->eft = tc; 1648 } 1649 1650 cont_alloc: 1651 if (IS_QLA27XX(ha)) { 1652 if (!ha->fw_dump_template) { 1653 ql_log(ql_log_warn, vha, 0x00ba, 1654 "Failed missing fwdump template\n"); 1655 return; 1656 } 1657 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 1658 ql_dbg(ql_dbg_init, vha, 0x00fa, 1659 "-> allocating fwdump (%x bytes)...\n", dump_size); 1660 goto allocate; 1661 } 1662 1663 req_q_size = req->length * sizeof(request_t); 1664 rsp_q_size = rsp->length * sizeof(response_t); 1665 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 1666 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 1667 ha->chain_offset = dump_size; 1668 dump_size += mq_size + fce_size; 1669 1670 allocate: 1671 ha->fw_dump = vmalloc(dump_size); 1672 if (!ha->fw_dump) { 1673 ql_log(ql_log_warn, vha, 0x00c4, 1674 "Unable to allocate (%d KB) for firmware dump.\n", 1675 dump_size / 1024); 1676 1677 if (ha->fce) { 1678 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 1679 ha->fce_dma); 1680 ha->fce = NULL; 1681 ha->fce_dma = 0; 1682 } 1683 1684 if (ha->eft) { 1685 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, 1686 ha->eft_dma); 1687 ha->eft = NULL; 1688 ha->eft_dma = 0; 1689 } 1690 return; 1691 } 1692 ha->fw_dump_len = dump_size; 1693 ql_dbg(ql_dbg_init, vha, 0x00c5, 1694 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); 1695 1696 if (IS_QLA27XX(ha)) 1697 return; 1698 1699 ha->fw_dump->signature[0] = 'Q'; 1700 ha->fw_dump->signature[1] = 'L'; 1701 ha->fw_dump->signature[2] = 'G'; 1702 ha->fw_dump->signature[3] = 'C'; 1703 ha->fw_dump->version = htonl(1); 1704 1705 ha->fw_dump->fixed_size = htonl(fixed_size); 1706 ha->fw_dump->mem_size = htonl(mem_size); 1707 ha->fw_dump->req_q_size = htonl(req_q_size); 1708 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 1709 1710 ha->fw_dump->eft_size = htonl(eft_size); 1711 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 1712 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 1713 1714 ha->fw_dump->header_size = 1715 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 1716 } 1717 1718 static int 1719 qla81xx_mpi_sync(scsi_qla_host_t *vha) 1720 { 1721 #define MPS_MASK 0xe0 1722 int rval; 1723 uint16_t dc; 1724 uint32_t dw; 1725 1726 if (!IS_QLA81XX(vha->hw)) 1727 return QLA_SUCCESS; 1728 1729 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 1730 if (rval != QLA_SUCCESS) { 1731 ql_log(ql_log_warn, vha, 0x0105, 1732 "Unable to acquire semaphore.\n"); 1733 goto done; 1734 } 1735 1736 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 1737 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 1738 if (rval != QLA_SUCCESS) { 1739 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 1740 goto done_release; 1741 } 1742 1743 dc &= MPS_MASK; 1744 if (dc == (dw & MPS_MASK)) 1745 goto done_release; 1746 1747 dw &= ~MPS_MASK; 1748 dw |= dc; 1749 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 1750 if (rval != QLA_SUCCESS) { 1751 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 1752 } 1753 1754 done_release: 1755 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 1756 if (rval != QLA_SUCCESS) { 1757 ql_log(ql_log_warn, vha, 0x006d, 1758 "Unable to release semaphore.\n"); 1759 } 1760 1761 done: 1762 return rval; 1763 } 1764 1765 int 1766 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 1767 { 1768 /* Don't try to reallocate the array */ 1769 if (req->outstanding_cmds) 1770 return QLA_SUCCESS; 1771 1772 if (!IS_FWI2_CAPABLE(ha) || (ha->mqiobase && 1773 (ql2xmultique_tag || ql2xmaxqueues > 1))) 1774 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 1775 else { 1776 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 1777 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 1778 else 1779 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 1780 } 1781 1782 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 1783 req->num_outstanding_cmds, GFP_KERNEL); 1784 1785 if (!req->outstanding_cmds) { 1786 /* 1787 * Try to allocate a minimal size just so we can get through 1788 * initialization. 1789 */ 1790 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 1791 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 1792 req->num_outstanding_cmds, GFP_KERNEL); 1793 1794 if (!req->outstanding_cmds) { 1795 ql_log(ql_log_fatal, NULL, 0x0126, 1796 "Failed to allocate memory for " 1797 "outstanding_cmds for req_que %p.\n", req); 1798 req->num_outstanding_cmds = 0; 1799 return QLA_FUNCTION_FAILED; 1800 } 1801 } 1802 1803 return QLA_SUCCESS; 1804 } 1805 1806 /** 1807 * qla2x00_setup_chip() - Load and start RISC firmware. 1808 * @ha: HA context 1809 * 1810 * Returns 0 on success. 1811 */ 1812 static int 1813 qla2x00_setup_chip(scsi_qla_host_t *vha) 1814 { 1815 int rval; 1816 uint32_t srisc_address = 0; 1817 struct qla_hw_data *ha = vha->hw; 1818 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1819 unsigned long flags; 1820 uint16_t fw_major_version; 1821 1822 if (IS_P3P_TYPE(ha)) { 1823 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1824 if (rval == QLA_SUCCESS) { 1825 qla2x00_stop_firmware(vha); 1826 goto enable_82xx_npiv; 1827 } else 1828 goto failed; 1829 } 1830 1831 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1832 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 1833 spin_lock_irqsave(&ha->hardware_lock, flags); 1834 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 1835 RD_REG_WORD(®->hccr); 1836 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1837 } 1838 1839 qla81xx_mpi_sync(vha); 1840 1841 /* Load firmware sequences */ 1842 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1843 if (rval == QLA_SUCCESS) { 1844 ql_dbg(ql_dbg_init, vha, 0x00c9, 1845 "Verifying Checksum of loaded RISC code.\n"); 1846 1847 rval = qla2x00_verify_checksum(vha, srisc_address); 1848 if (rval == QLA_SUCCESS) { 1849 /* Start firmware execution. */ 1850 ql_dbg(ql_dbg_init, vha, 0x00ca, 1851 "Starting firmware.\n"); 1852 1853 if (ql2xexlogins) 1854 ha->flags.exlogins_enabled = 1; 1855 1856 if (ql2xexchoffld) 1857 ha->flags.exchoffld_enabled = 1; 1858 1859 rval = qla2x00_execute_fw(vha, srisc_address); 1860 /* Retrieve firmware information. */ 1861 if (rval == QLA_SUCCESS) { 1862 rval = qla2x00_set_exlogins_buffer(vha); 1863 if (rval != QLA_SUCCESS) 1864 goto failed; 1865 1866 rval = qla2x00_set_exchoffld_buffer(vha); 1867 if (rval != QLA_SUCCESS) 1868 goto failed; 1869 1870 enable_82xx_npiv: 1871 fw_major_version = ha->fw_major_version; 1872 if (IS_P3P_TYPE(ha)) 1873 qla82xx_check_md_needed(vha); 1874 else 1875 rval = qla2x00_get_fw_version(vha); 1876 if (rval != QLA_SUCCESS) 1877 goto failed; 1878 ha->flags.npiv_supported = 0; 1879 if (IS_QLA2XXX_MIDTYPE(ha) && 1880 (ha->fw_attributes & BIT_2)) { 1881 ha->flags.npiv_supported = 1; 1882 if ((!ha->max_npiv_vports) || 1883 ((ha->max_npiv_vports + 1) % 1884 MIN_MULTI_ID_FABRIC)) 1885 ha->max_npiv_vports = 1886 MIN_MULTI_ID_FABRIC - 1; 1887 } 1888 qla2x00_get_resource_cnts(vha); 1889 1890 /* 1891 * Allocate the array of outstanding commands 1892 * now that we know the firmware resources. 1893 */ 1894 rval = qla2x00_alloc_outstanding_cmds(ha, 1895 vha->req); 1896 if (rval != QLA_SUCCESS) 1897 goto failed; 1898 1899 if (!fw_major_version && ql2xallocfwdump 1900 && !(IS_P3P_TYPE(ha))) 1901 qla2x00_alloc_fw_dump(vha); 1902 } else { 1903 goto failed; 1904 } 1905 } else { 1906 ql_log(ql_log_fatal, vha, 0x00cd, 1907 "ISP Firmware failed checksum.\n"); 1908 goto failed; 1909 } 1910 } else 1911 goto failed; 1912 1913 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1914 /* Enable proper parity. */ 1915 spin_lock_irqsave(&ha->hardware_lock, flags); 1916 if (IS_QLA2300(ha)) 1917 /* SRAM parity */ 1918 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 1919 else 1920 /* SRAM, Instruction RAM and GP RAM parity */ 1921 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 1922 RD_REG_WORD(®->hccr); 1923 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1924 } 1925 1926 if (IS_QLA27XX(ha)) 1927 ha->flags.fac_supported = 1; 1928 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 1929 uint32_t size; 1930 1931 rval = qla81xx_fac_get_sector_size(vha, &size); 1932 if (rval == QLA_SUCCESS) { 1933 ha->flags.fac_supported = 1; 1934 ha->fdt_block_size = size << 2; 1935 } else { 1936 ql_log(ql_log_warn, vha, 0x00ce, 1937 "Unsupported FAC firmware (%d.%02d.%02d).\n", 1938 ha->fw_major_version, ha->fw_minor_version, 1939 ha->fw_subminor_version); 1940 1941 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 1942 ha->flags.fac_supported = 0; 1943 rval = QLA_SUCCESS; 1944 } 1945 } 1946 } 1947 failed: 1948 if (rval) { 1949 ql_log(ql_log_fatal, vha, 0x00cf, 1950 "Setup chip ****FAILED****.\n"); 1951 } 1952 1953 return (rval); 1954 } 1955 1956 /** 1957 * qla2x00_init_response_q_entries() - Initializes response queue entries. 1958 * @ha: HA context 1959 * 1960 * Beginning of request ring has initialization control block already built 1961 * by nvram config routine. 1962 * 1963 * Returns 0 on success. 1964 */ 1965 void 1966 qla2x00_init_response_q_entries(struct rsp_que *rsp) 1967 { 1968 uint16_t cnt; 1969 response_t *pkt; 1970 1971 rsp->ring_ptr = rsp->ring; 1972 rsp->ring_index = 0; 1973 rsp->status_srb = NULL; 1974 pkt = rsp->ring_ptr; 1975 for (cnt = 0; cnt < rsp->length; cnt++) { 1976 pkt->signature = RESPONSE_PROCESSED; 1977 pkt++; 1978 } 1979 } 1980 1981 /** 1982 * qla2x00_update_fw_options() - Read and process firmware options. 1983 * @ha: HA context 1984 * 1985 * Returns 0 on success. 1986 */ 1987 void 1988 qla2x00_update_fw_options(scsi_qla_host_t *vha) 1989 { 1990 uint16_t swing, emphasis, tx_sens, rx_sens; 1991 struct qla_hw_data *ha = vha->hw; 1992 1993 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 1994 qla2x00_get_fw_options(vha, ha->fw_options); 1995 1996 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 1997 return; 1998 1999 /* Serial Link options. */ 2000 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 2001 "Serial link options.\n"); 2002 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 2003 (uint8_t *)&ha->fw_seriallink_options, 2004 sizeof(ha->fw_seriallink_options)); 2005 2006 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 2007 if (ha->fw_seriallink_options[3] & BIT_2) { 2008 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 2009 2010 /* 1G settings */ 2011 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 2012 emphasis = (ha->fw_seriallink_options[2] & 2013 (BIT_4 | BIT_3)) >> 3; 2014 tx_sens = ha->fw_seriallink_options[0] & 2015 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2016 rx_sens = (ha->fw_seriallink_options[0] & 2017 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 2018 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 2019 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 2020 if (rx_sens == 0x0) 2021 rx_sens = 0x3; 2022 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 2023 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2024 ha->fw_options[10] |= BIT_5 | 2025 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 2026 (tx_sens & (BIT_1 | BIT_0)); 2027 2028 /* 2G settings */ 2029 swing = (ha->fw_seriallink_options[2] & 2030 (BIT_7 | BIT_6 | BIT_5)) >> 5; 2031 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 2032 tx_sens = ha->fw_seriallink_options[1] & 2033 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2034 rx_sens = (ha->fw_seriallink_options[1] & 2035 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 2036 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 2037 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 2038 if (rx_sens == 0x0) 2039 rx_sens = 0x3; 2040 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 2041 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2042 ha->fw_options[11] |= BIT_5 | 2043 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 2044 (tx_sens & (BIT_1 | BIT_0)); 2045 } 2046 2047 /* FCP2 options. */ 2048 /* Return command IOCBs without waiting for an ABTS to complete. */ 2049 ha->fw_options[3] |= BIT_13; 2050 2051 /* LED scheme. */ 2052 if (ha->flags.enable_led_scheme) 2053 ha->fw_options[2] |= BIT_12; 2054 2055 /* Detect ISP6312. */ 2056 if (IS_QLA6312(ha)) 2057 ha->fw_options[2] |= BIT_13; 2058 2059 /* Set Retry FLOGI in case of P2P connection */ 2060 if (ha->operating_mode == P2P) { 2061 ha->fw_options[2] |= BIT_3; 2062 ql_dbg(ql_dbg_disc, vha, 0x2100, 2063 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 2064 __func__, ha->fw_options[2]); 2065 } 2066 2067 /* Update firmware options. */ 2068 qla2x00_set_fw_options(vha, ha->fw_options); 2069 } 2070 2071 void 2072 qla24xx_update_fw_options(scsi_qla_host_t *vha) 2073 { 2074 int rval; 2075 struct qla_hw_data *ha = vha->hw; 2076 2077 if (IS_P3P_TYPE(ha)) 2078 return; 2079 2080 /* Hold status IOCBs until ABTS response received. */ 2081 if (ql2xfwholdabts) 2082 ha->fw_options[3] |= BIT_12; 2083 2084 /* Set Retry FLOGI in case of P2P connection */ 2085 if (ha->operating_mode == P2P) { 2086 ha->fw_options[2] |= BIT_3; 2087 ql_dbg(ql_dbg_disc, vha, 0x2101, 2088 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 2089 __func__, ha->fw_options[2]); 2090 } 2091 2092 /* Update Serial Link options. */ 2093 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 2094 return; 2095 2096 rval = qla2x00_set_serdes_params(vha, 2097 le16_to_cpu(ha->fw_seriallink_options24[1]), 2098 le16_to_cpu(ha->fw_seriallink_options24[2]), 2099 le16_to_cpu(ha->fw_seriallink_options24[3])); 2100 if (rval != QLA_SUCCESS) { 2101 ql_log(ql_log_warn, vha, 0x0104, 2102 "Unable to update Serial Link options (%x).\n", rval); 2103 } 2104 } 2105 2106 void 2107 qla2x00_config_rings(struct scsi_qla_host *vha) 2108 { 2109 struct qla_hw_data *ha = vha->hw; 2110 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2111 struct req_que *req = ha->req_q_map[0]; 2112 struct rsp_que *rsp = ha->rsp_q_map[0]; 2113 2114 /* Setup ring parameters in initialization control block. */ 2115 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 2116 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 2117 ha->init_cb->request_q_length = cpu_to_le16(req->length); 2118 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 2119 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 2120 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 2121 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 2122 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 2123 2124 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 2125 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 2126 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 2127 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 2128 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 2129 } 2130 2131 void 2132 qla24xx_config_rings(struct scsi_qla_host *vha) 2133 { 2134 struct qla_hw_data *ha = vha->hw; 2135 device_reg_t *reg = ISP_QUE_REG(ha, 0); 2136 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 2137 struct qla_msix_entry *msix; 2138 struct init_cb_24xx *icb; 2139 uint16_t rid = 0; 2140 struct req_que *req = ha->req_q_map[0]; 2141 struct rsp_que *rsp = ha->rsp_q_map[0]; 2142 2143 /* Setup ring parameters in initialization control block. */ 2144 icb = (struct init_cb_24xx *)ha->init_cb; 2145 icb->request_q_outpointer = cpu_to_le16(0); 2146 icb->response_q_inpointer = cpu_to_le16(0); 2147 icb->request_q_length = cpu_to_le16(req->length); 2148 icb->response_q_length = cpu_to_le16(rsp->length); 2149 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 2150 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 2151 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 2152 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 2153 2154 /* Setup ATIO queue dma pointers for target mode */ 2155 icb->atio_q_inpointer = cpu_to_le16(0); 2156 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 2157 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 2158 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 2159 2160 if (IS_SHADOW_REG_CAPABLE(ha)) 2161 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 2162 2163 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 2164 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 2165 icb->rid = cpu_to_le16(rid); 2166 if (ha->flags.msix_enabled) { 2167 msix = &ha->msix_entries[1]; 2168 ql_dbg(ql_dbg_init, vha, 0x00fd, 2169 "Registering vector 0x%x for base que.\n", 2170 msix->entry); 2171 icb->msix = cpu_to_le16(msix->entry); 2172 } 2173 /* Use alternate PCI bus number */ 2174 if (MSB(rid)) 2175 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 2176 /* Use alternate PCI devfn */ 2177 if (LSB(rid)) 2178 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 2179 2180 /* Use Disable MSIX Handshake mode for capable adapters */ 2181 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 2182 (ha->flags.msix_enabled)) { 2183 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 2184 ha->flags.disable_msix_handshake = 1; 2185 ql_dbg(ql_dbg_init, vha, 0x00fe, 2186 "MSIX Handshake Disable Mode turned on.\n"); 2187 } else { 2188 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 2189 } 2190 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 2191 2192 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 2193 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 2194 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 2195 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 2196 } else { 2197 WRT_REG_DWORD(®->isp24.req_q_in, 0); 2198 WRT_REG_DWORD(®->isp24.req_q_out, 0); 2199 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 2200 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 2201 } 2202 qlt_24xx_config_rings(vha); 2203 2204 /* PCI posting */ 2205 RD_REG_DWORD(&ioreg->hccr); 2206 } 2207 2208 /** 2209 * qla2x00_init_rings() - Initializes firmware. 2210 * @ha: HA context 2211 * 2212 * Beginning of request ring has initialization control block already built 2213 * by nvram config routine. 2214 * 2215 * Returns 0 on success. 2216 */ 2217 int 2218 qla2x00_init_rings(scsi_qla_host_t *vha) 2219 { 2220 int rval; 2221 unsigned long flags = 0; 2222 int cnt, que; 2223 struct qla_hw_data *ha = vha->hw; 2224 struct req_que *req; 2225 struct rsp_que *rsp; 2226 struct mid_init_cb_24xx *mid_init_cb = 2227 (struct mid_init_cb_24xx *) ha->init_cb; 2228 2229 spin_lock_irqsave(&ha->hardware_lock, flags); 2230 2231 /* Clear outstanding commands array. */ 2232 for (que = 0; que < ha->max_req_queues; que++) { 2233 req = ha->req_q_map[que]; 2234 if (!req || !test_bit(que, ha->req_qid_map)) 2235 continue; 2236 req->out_ptr = (void *)(req->ring + req->length); 2237 *req->out_ptr = 0; 2238 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 2239 req->outstanding_cmds[cnt] = NULL; 2240 2241 req->current_outstanding_cmd = 1; 2242 2243 /* Initialize firmware. */ 2244 req->ring_ptr = req->ring; 2245 req->ring_index = 0; 2246 req->cnt = req->length; 2247 } 2248 2249 for (que = 0; que < ha->max_rsp_queues; que++) { 2250 rsp = ha->rsp_q_map[que]; 2251 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 2252 continue; 2253 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 2254 *rsp->in_ptr = 0; 2255 /* Initialize response queue entries */ 2256 if (IS_QLAFX00(ha)) 2257 qlafx00_init_response_q_entries(rsp); 2258 else 2259 qla2x00_init_response_q_entries(rsp); 2260 } 2261 2262 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 2263 ha->tgt.atio_ring_index = 0; 2264 /* Initialize ATIO queue entries */ 2265 qlt_init_atio_q_entries(vha); 2266 2267 ha->isp_ops->config_rings(vha); 2268 2269 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2270 2271 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 2272 2273 if (IS_QLAFX00(ha)) { 2274 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 2275 goto next_check; 2276 } 2277 2278 /* Update any ISP specific firmware options before initialization. */ 2279 ha->isp_ops->update_fw_options(vha); 2280 2281 if (ha->flags.npiv_supported) { 2282 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 2283 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 2284 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 2285 } 2286 2287 if (IS_FWI2_CAPABLE(ha)) { 2288 mid_init_cb->options = cpu_to_le16(BIT_1); 2289 mid_init_cb->init_cb.execution_throttle = 2290 cpu_to_le16(ha->cur_fw_xcb_count); 2291 ha->flags.dport_enabled = 2292 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 2293 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 2294 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 2295 /* FA-WWPN Status */ 2296 ha->flags.fawwpn_enabled = 2297 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 2298 ql_dbg(ql_dbg_init, vha, 0x0141, "FA-WWPN Support: %s.\n", 2299 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 2300 } 2301 2302 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 2303 next_check: 2304 if (rval) { 2305 ql_log(ql_log_fatal, vha, 0x00d2, 2306 "Init Firmware **** FAILED ****.\n"); 2307 } else { 2308 ql_dbg(ql_dbg_init, vha, 0x00d3, 2309 "Init Firmware -- success.\n"); 2310 } 2311 2312 return (rval); 2313 } 2314 2315 /** 2316 * qla2x00_fw_ready() - Waits for firmware ready. 2317 * @ha: HA context 2318 * 2319 * Returns 0 on success. 2320 */ 2321 static int 2322 qla2x00_fw_ready(scsi_qla_host_t *vha) 2323 { 2324 int rval; 2325 unsigned long wtime, mtime, cs84xx_time; 2326 uint16_t min_wait; /* Minimum wait time if loop is down */ 2327 uint16_t wait_time; /* Wait time if loop is coming ready */ 2328 uint16_t state[6]; 2329 struct qla_hw_data *ha = vha->hw; 2330 2331 if (IS_QLAFX00(vha->hw)) 2332 return qlafx00_fw_ready(vha); 2333 2334 rval = QLA_SUCCESS; 2335 2336 /* Time to wait for loop down */ 2337 if (IS_P3P_TYPE(ha)) 2338 min_wait = 30; 2339 else 2340 min_wait = 20; 2341 2342 /* 2343 * Firmware should take at most one RATOV to login, plus 5 seconds for 2344 * our own processing. 2345 */ 2346 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 2347 wait_time = min_wait; 2348 } 2349 2350 /* Min wait time if loop down */ 2351 mtime = jiffies + (min_wait * HZ); 2352 2353 /* wait time before firmware ready */ 2354 wtime = jiffies + (wait_time * HZ); 2355 2356 /* Wait for ISP to finish LIP */ 2357 if (!vha->flags.init_done) 2358 ql_log(ql_log_info, vha, 0x801e, 2359 "Waiting for LIP to complete.\n"); 2360 2361 do { 2362 memset(state, -1, sizeof(state)); 2363 rval = qla2x00_get_firmware_state(vha, state); 2364 if (rval == QLA_SUCCESS) { 2365 if (state[0] < FSTATE_LOSS_OF_SYNC) { 2366 vha->device_flags &= ~DFLG_NO_CABLE; 2367 } 2368 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 2369 ql_dbg(ql_dbg_taskm, vha, 0x801f, 2370 "fw_state=%x 84xx=%x.\n", state[0], 2371 state[2]); 2372 if ((state[2] & FSTATE_LOGGED_IN) && 2373 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 2374 ql_dbg(ql_dbg_taskm, vha, 0x8028, 2375 "Sending verify iocb.\n"); 2376 2377 cs84xx_time = jiffies; 2378 rval = qla84xx_init_chip(vha); 2379 if (rval != QLA_SUCCESS) { 2380 ql_log(ql_log_warn, 2381 vha, 0x8007, 2382 "Init chip failed.\n"); 2383 break; 2384 } 2385 2386 /* Add time taken to initialize. */ 2387 cs84xx_time = jiffies - cs84xx_time; 2388 wtime += cs84xx_time; 2389 mtime += cs84xx_time; 2390 ql_dbg(ql_dbg_taskm, vha, 0x8008, 2391 "Increasing wait time by %ld. " 2392 "New time %ld.\n", cs84xx_time, 2393 wtime); 2394 } 2395 } else if (state[0] == FSTATE_READY) { 2396 ql_dbg(ql_dbg_taskm, vha, 0x8037, 2397 "F/W Ready - OK.\n"); 2398 2399 qla2x00_get_retry_cnt(vha, &ha->retry_count, 2400 &ha->login_timeout, &ha->r_a_tov); 2401 2402 rval = QLA_SUCCESS; 2403 break; 2404 } 2405 2406 rval = QLA_FUNCTION_FAILED; 2407 2408 if (atomic_read(&vha->loop_down_timer) && 2409 state[0] != FSTATE_READY) { 2410 /* Loop down. Timeout on min_wait for states 2411 * other than Wait for Login. 2412 */ 2413 if (time_after_eq(jiffies, mtime)) { 2414 ql_log(ql_log_info, vha, 0x8038, 2415 "Cable is unplugged...\n"); 2416 2417 vha->device_flags |= DFLG_NO_CABLE; 2418 break; 2419 } 2420 } 2421 } else { 2422 /* Mailbox cmd failed. Timeout on min_wait. */ 2423 if (time_after_eq(jiffies, mtime) || 2424 ha->flags.isp82xx_fw_hung) 2425 break; 2426 } 2427 2428 if (time_after_eq(jiffies, wtime)) 2429 break; 2430 2431 /* Delay for a while */ 2432 msleep(500); 2433 } while (1); 2434 2435 ql_dbg(ql_dbg_taskm, vha, 0x803a, 2436 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 2437 state[1], state[2], state[3], state[4], state[5], jiffies); 2438 2439 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 2440 ql_log(ql_log_warn, vha, 0x803b, 2441 "Firmware ready **** FAILED ****.\n"); 2442 } 2443 2444 return (rval); 2445 } 2446 2447 /* 2448 * qla2x00_configure_hba 2449 * Setup adapter context. 2450 * 2451 * Input: 2452 * ha = adapter state pointer. 2453 * 2454 * Returns: 2455 * 0 = success 2456 * 2457 * Context: 2458 * Kernel context. 2459 */ 2460 static int 2461 qla2x00_configure_hba(scsi_qla_host_t *vha) 2462 { 2463 int rval; 2464 uint16_t loop_id; 2465 uint16_t topo; 2466 uint16_t sw_cap; 2467 uint8_t al_pa; 2468 uint8_t area; 2469 uint8_t domain; 2470 char connect_type[22]; 2471 struct qla_hw_data *ha = vha->hw; 2472 unsigned long flags; 2473 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 2474 2475 /* Get host addresses. */ 2476 rval = qla2x00_get_adapter_id(vha, 2477 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 2478 if (rval != QLA_SUCCESS) { 2479 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 2480 IS_CNA_CAPABLE(ha) || 2481 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 2482 ql_dbg(ql_dbg_disc, vha, 0x2008, 2483 "Loop is in a transition state.\n"); 2484 } else { 2485 ql_log(ql_log_warn, vha, 0x2009, 2486 "Unable to get host loop ID.\n"); 2487 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 2488 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 2489 ql_log(ql_log_warn, vha, 0x1151, 2490 "Doing link init.\n"); 2491 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 2492 return rval; 2493 } 2494 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2495 } 2496 return (rval); 2497 } 2498 2499 if (topo == 4) { 2500 ql_log(ql_log_info, vha, 0x200a, 2501 "Cannot get topology - retrying.\n"); 2502 return (QLA_FUNCTION_FAILED); 2503 } 2504 2505 vha->loop_id = loop_id; 2506 2507 /* initialize */ 2508 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 2509 ha->operating_mode = LOOP; 2510 ha->switch_cap = 0; 2511 2512 switch (topo) { 2513 case 0: 2514 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 2515 ha->current_topology = ISP_CFG_NL; 2516 strcpy(connect_type, "(Loop)"); 2517 break; 2518 2519 case 1: 2520 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 2521 ha->switch_cap = sw_cap; 2522 ha->current_topology = ISP_CFG_FL; 2523 strcpy(connect_type, "(FL_Port)"); 2524 break; 2525 2526 case 2: 2527 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 2528 ha->operating_mode = P2P; 2529 ha->current_topology = ISP_CFG_N; 2530 strcpy(connect_type, "(N_Port-to-N_Port)"); 2531 break; 2532 2533 case 3: 2534 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 2535 ha->switch_cap = sw_cap; 2536 ha->operating_mode = P2P; 2537 ha->current_topology = ISP_CFG_F; 2538 strcpy(connect_type, "(F_Port)"); 2539 break; 2540 2541 default: 2542 ql_dbg(ql_dbg_disc, vha, 0x200f, 2543 "HBA in unknown topology %x, using NL.\n", topo); 2544 ha->current_topology = ISP_CFG_NL; 2545 strcpy(connect_type, "(Loop)"); 2546 break; 2547 } 2548 2549 /* Save Host port and loop ID. */ 2550 /* byte order - Big Endian */ 2551 vha->d_id.b.domain = domain; 2552 vha->d_id.b.area = area; 2553 vha->d_id.b.al_pa = al_pa; 2554 2555 spin_lock_irqsave(&ha->vport_slock, flags); 2556 qlt_update_vp_map(vha, SET_AL_PA); 2557 spin_unlock_irqrestore(&ha->vport_slock, flags); 2558 2559 if (!vha->flags.init_done) 2560 ql_log(ql_log_info, vha, 0x2010, 2561 "Topology - %s, Host Loop address 0x%x.\n", 2562 connect_type, vha->loop_id); 2563 2564 return(rval); 2565 } 2566 2567 inline void 2568 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 2569 char *def) 2570 { 2571 char *st, *en; 2572 uint16_t index; 2573 struct qla_hw_data *ha = vha->hw; 2574 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 2575 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 2576 2577 if (memcmp(model, BINZERO, len) != 0) { 2578 strncpy(ha->model_number, model, len); 2579 st = en = ha->model_number; 2580 en += len - 1; 2581 while (en > st) { 2582 if (*en != 0x20 && *en != 0x00) 2583 break; 2584 *en-- = '\0'; 2585 } 2586 2587 index = (ha->pdev->subsystem_device & 0xff); 2588 if (use_tbl && 2589 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2590 index < QLA_MODEL_NAMES) 2591 strncpy(ha->model_desc, 2592 qla2x00_model_name[index * 2 + 1], 2593 sizeof(ha->model_desc) - 1); 2594 } else { 2595 index = (ha->pdev->subsystem_device & 0xff); 2596 if (use_tbl && 2597 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2598 index < QLA_MODEL_NAMES) { 2599 strcpy(ha->model_number, 2600 qla2x00_model_name[index * 2]); 2601 strncpy(ha->model_desc, 2602 qla2x00_model_name[index * 2 + 1], 2603 sizeof(ha->model_desc) - 1); 2604 } else { 2605 strcpy(ha->model_number, def); 2606 } 2607 } 2608 if (IS_FWI2_CAPABLE(ha)) 2609 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 2610 sizeof(ha->model_desc)); 2611 } 2612 2613 /* On sparc systems, obtain port and node WWN from firmware 2614 * properties. 2615 */ 2616 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 2617 { 2618 #ifdef CONFIG_SPARC 2619 struct qla_hw_data *ha = vha->hw; 2620 struct pci_dev *pdev = ha->pdev; 2621 struct device_node *dp = pci_device_to_OF_node(pdev); 2622 const u8 *val; 2623 int len; 2624 2625 val = of_get_property(dp, "port-wwn", &len); 2626 if (val && len >= WWN_SIZE) 2627 memcpy(nv->port_name, val, WWN_SIZE); 2628 2629 val = of_get_property(dp, "node-wwn", &len); 2630 if (val && len >= WWN_SIZE) 2631 memcpy(nv->node_name, val, WWN_SIZE); 2632 #endif 2633 } 2634 2635 /* 2636 * NVRAM configuration for ISP 2xxx 2637 * 2638 * Input: 2639 * ha = adapter block pointer. 2640 * 2641 * Output: 2642 * initialization control block in response_ring 2643 * host adapters parameters in host adapter block 2644 * 2645 * Returns: 2646 * 0 = success. 2647 */ 2648 int 2649 qla2x00_nvram_config(scsi_qla_host_t *vha) 2650 { 2651 int rval; 2652 uint8_t chksum = 0; 2653 uint16_t cnt; 2654 uint8_t *dptr1, *dptr2; 2655 struct qla_hw_data *ha = vha->hw; 2656 init_cb_t *icb = ha->init_cb; 2657 nvram_t *nv = ha->nvram; 2658 uint8_t *ptr = ha->nvram; 2659 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2660 2661 rval = QLA_SUCCESS; 2662 2663 /* Determine NVRAM starting address. */ 2664 ha->nvram_size = sizeof(nvram_t); 2665 ha->nvram_base = 0; 2666 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 2667 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 2668 ha->nvram_base = 0x80; 2669 2670 /* Get NVRAM data and calculate checksum. */ 2671 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 2672 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 2673 chksum += *ptr++; 2674 2675 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 2676 "Contents of NVRAM.\n"); 2677 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 2678 (uint8_t *)nv, ha->nvram_size); 2679 2680 /* Bad NVRAM data, set defaults parameters. */ 2681 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 2682 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 2683 /* Reset NVRAM data. */ 2684 ql_log(ql_log_warn, vha, 0x0064, 2685 "Inconsistent NVRAM " 2686 "detected: checksum=0x%x id=%c version=0x%x.\n", 2687 chksum, nv->id[0], nv->nvram_version); 2688 ql_log(ql_log_warn, vha, 0x0065, 2689 "Falling back to " 2690 "functioning (yet invalid -- WWPN) defaults.\n"); 2691 2692 /* 2693 * Set default initialization control block. 2694 */ 2695 memset(nv, 0, ha->nvram_size); 2696 nv->parameter_block_version = ICB_VERSION; 2697 2698 if (IS_QLA23XX(ha)) { 2699 nv->firmware_options[0] = BIT_2 | BIT_1; 2700 nv->firmware_options[1] = BIT_7 | BIT_5; 2701 nv->add_firmware_options[0] = BIT_5; 2702 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2703 nv->frame_payload_size = 2048; 2704 nv->special_options[1] = BIT_7; 2705 } else if (IS_QLA2200(ha)) { 2706 nv->firmware_options[0] = BIT_2 | BIT_1; 2707 nv->firmware_options[1] = BIT_7 | BIT_5; 2708 nv->add_firmware_options[0] = BIT_5; 2709 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2710 nv->frame_payload_size = 1024; 2711 } else if (IS_QLA2100(ha)) { 2712 nv->firmware_options[0] = BIT_3 | BIT_1; 2713 nv->firmware_options[1] = BIT_5; 2714 nv->frame_payload_size = 1024; 2715 } 2716 2717 nv->max_iocb_allocation = cpu_to_le16(256); 2718 nv->execution_throttle = cpu_to_le16(16); 2719 nv->retry_count = 8; 2720 nv->retry_delay = 1; 2721 2722 nv->port_name[0] = 33; 2723 nv->port_name[3] = 224; 2724 nv->port_name[4] = 139; 2725 2726 qla2xxx_nvram_wwn_from_ofw(vha, nv); 2727 2728 nv->login_timeout = 4; 2729 2730 /* 2731 * Set default host adapter parameters 2732 */ 2733 nv->host_p[1] = BIT_2; 2734 nv->reset_delay = 5; 2735 nv->port_down_retry_count = 8; 2736 nv->max_luns_per_target = cpu_to_le16(8); 2737 nv->link_down_timeout = 60; 2738 2739 rval = 1; 2740 } 2741 2742 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 2743 /* 2744 * The SN2 does not provide BIOS emulation which means you can't change 2745 * potentially bogus BIOS settings. Force the use of default settings 2746 * for link rate and frame size. Hope that the rest of the settings 2747 * are valid. 2748 */ 2749 if (ia64_platform_is("sn2")) { 2750 nv->frame_payload_size = 2048; 2751 if (IS_QLA23XX(ha)) 2752 nv->special_options[1] = BIT_7; 2753 } 2754 #endif 2755 2756 /* Reset Initialization control block */ 2757 memset(icb, 0, ha->init_cb_size); 2758 2759 /* 2760 * Setup driver NVRAM options. 2761 */ 2762 nv->firmware_options[0] |= (BIT_6 | BIT_1); 2763 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 2764 nv->firmware_options[1] |= (BIT_5 | BIT_0); 2765 nv->firmware_options[1] &= ~BIT_4; 2766 2767 if (IS_QLA23XX(ha)) { 2768 nv->firmware_options[0] |= BIT_2; 2769 nv->firmware_options[0] &= ~BIT_3; 2770 nv->special_options[0] &= ~BIT_6; 2771 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 2772 2773 if (IS_QLA2300(ha)) { 2774 if (ha->fb_rev == FPM_2310) { 2775 strcpy(ha->model_number, "QLA2310"); 2776 } else { 2777 strcpy(ha->model_number, "QLA2300"); 2778 } 2779 } else { 2780 qla2x00_set_model_info(vha, nv->model_number, 2781 sizeof(nv->model_number), "QLA23xx"); 2782 } 2783 } else if (IS_QLA2200(ha)) { 2784 nv->firmware_options[0] |= BIT_2; 2785 /* 2786 * 'Point-to-point preferred, else loop' is not a safe 2787 * connection mode setting. 2788 */ 2789 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 2790 (BIT_5 | BIT_4)) { 2791 /* Force 'loop preferred, else point-to-point'. */ 2792 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 2793 nv->add_firmware_options[0] |= BIT_5; 2794 } 2795 strcpy(ha->model_number, "QLA22xx"); 2796 } else /*if (IS_QLA2100(ha))*/ { 2797 strcpy(ha->model_number, "QLA2100"); 2798 } 2799 2800 /* 2801 * Copy over NVRAM RISC parameter block to initialization control block. 2802 */ 2803 dptr1 = (uint8_t *)icb; 2804 dptr2 = (uint8_t *)&nv->parameter_block_version; 2805 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 2806 while (cnt--) 2807 *dptr1++ = *dptr2++; 2808 2809 /* Copy 2nd half. */ 2810 dptr1 = (uint8_t *)icb->add_firmware_options; 2811 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 2812 while (cnt--) 2813 *dptr1++ = *dptr2++; 2814 2815 /* Use alternate WWN? */ 2816 if (nv->host_p[1] & BIT_7) { 2817 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 2818 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 2819 } 2820 2821 /* Prepare nodename */ 2822 if ((icb->firmware_options[1] & BIT_6) == 0) { 2823 /* 2824 * Firmware will apply the following mask if the nodename was 2825 * not provided. 2826 */ 2827 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 2828 icb->node_name[0] &= 0xF0; 2829 } 2830 2831 /* 2832 * Set host adapter parameters. 2833 */ 2834 2835 /* 2836 * BIT_7 in the host-parameters section allows for modification to 2837 * internal driver logging. 2838 */ 2839 if (nv->host_p[0] & BIT_7) 2840 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 2841 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 2842 /* Always load RISC code on non ISP2[12]00 chips. */ 2843 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 2844 ha->flags.disable_risc_code_load = 0; 2845 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 2846 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 2847 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 2848 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 2849 ha->flags.disable_serdes = 0; 2850 2851 ha->operating_mode = 2852 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 2853 2854 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 2855 sizeof(ha->fw_seriallink_options)); 2856 2857 /* save HBA serial number */ 2858 ha->serial0 = icb->port_name[5]; 2859 ha->serial1 = icb->port_name[6]; 2860 ha->serial2 = icb->port_name[7]; 2861 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 2862 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 2863 2864 icb->execution_throttle = cpu_to_le16(0xFFFF); 2865 2866 ha->retry_count = nv->retry_count; 2867 2868 /* Set minimum login_timeout to 4 seconds. */ 2869 if (nv->login_timeout != ql2xlogintimeout) 2870 nv->login_timeout = ql2xlogintimeout; 2871 if (nv->login_timeout < 4) 2872 nv->login_timeout = 4; 2873 ha->login_timeout = nv->login_timeout; 2874 2875 /* Set minimum RATOV to 100 tenths of a second. */ 2876 ha->r_a_tov = 100; 2877 2878 ha->loop_reset_delay = nv->reset_delay; 2879 2880 /* Link Down Timeout = 0: 2881 * 2882 * When Port Down timer expires we will start returning 2883 * I/O's to OS with "DID_NO_CONNECT". 2884 * 2885 * Link Down Timeout != 0: 2886 * 2887 * The driver waits for the link to come up after link down 2888 * before returning I/Os to OS with "DID_NO_CONNECT". 2889 */ 2890 if (nv->link_down_timeout == 0) { 2891 ha->loop_down_abort_time = 2892 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 2893 } else { 2894 ha->link_down_timeout = nv->link_down_timeout; 2895 ha->loop_down_abort_time = 2896 (LOOP_DOWN_TIME - ha->link_down_timeout); 2897 } 2898 2899 /* 2900 * Need enough time to try and get the port back. 2901 */ 2902 ha->port_down_retry_count = nv->port_down_retry_count; 2903 if (qlport_down_retry) 2904 ha->port_down_retry_count = qlport_down_retry; 2905 /* Set login_retry_count */ 2906 ha->login_retry_count = nv->retry_count; 2907 if (ha->port_down_retry_count == nv->port_down_retry_count && 2908 ha->port_down_retry_count > 3) 2909 ha->login_retry_count = ha->port_down_retry_count; 2910 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 2911 ha->login_retry_count = ha->port_down_retry_count; 2912 if (ql2xloginretrycount) 2913 ha->login_retry_count = ql2xloginretrycount; 2914 2915 icb->lun_enables = cpu_to_le16(0); 2916 icb->command_resource_count = 0; 2917 icb->immediate_notify_resource_count = 0; 2918 icb->timeout = cpu_to_le16(0); 2919 2920 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2921 /* Enable RIO */ 2922 icb->firmware_options[0] &= ~BIT_3; 2923 icb->add_firmware_options[0] &= 2924 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2925 icb->add_firmware_options[0] |= BIT_2; 2926 icb->response_accumulation_timer = 3; 2927 icb->interrupt_delay_timer = 5; 2928 2929 vha->flags.process_response_queue = 1; 2930 } else { 2931 /* Enable ZIO. */ 2932 if (!vha->flags.init_done) { 2933 ha->zio_mode = icb->add_firmware_options[0] & 2934 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2935 ha->zio_timer = icb->interrupt_delay_timer ? 2936 icb->interrupt_delay_timer: 2; 2937 } 2938 icb->add_firmware_options[0] &= 2939 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2940 vha->flags.process_response_queue = 0; 2941 if (ha->zio_mode != QLA_ZIO_DISABLED) { 2942 ha->zio_mode = QLA_ZIO_MODE_6; 2943 2944 ql_log(ql_log_info, vha, 0x0068, 2945 "ZIO mode %d enabled; timer delay (%d us).\n", 2946 ha->zio_mode, ha->zio_timer * 100); 2947 2948 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 2949 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 2950 vha->flags.process_response_queue = 1; 2951 } 2952 } 2953 2954 if (rval) { 2955 ql_log(ql_log_warn, vha, 0x0069, 2956 "NVRAM configuration failed.\n"); 2957 } 2958 return (rval); 2959 } 2960 2961 static void 2962 qla2x00_rport_del(void *data) 2963 { 2964 fc_port_t *fcport = data; 2965 struct fc_rport *rport; 2966 unsigned long flags; 2967 2968 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2969 rport = fcport->drport ? fcport->drport: fcport->rport; 2970 fcport->drport = NULL; 2971 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2972 if (rport) 2973 fc_remote_port_delete(rport); 2974 } 2975 2976 /** 2977 * qla2x00_alloc_fcport() - Allocate a generic fcport. 2978 * @ha: HA context 2979 * @flags: allocation flags 2980 * 2981 * Returns a pointer to the allocated fcport, or NULL, if none available. 2982 */ 2983 fc_port_t * 2984 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 2985 { 2986 fc_port_t *fcport; 2987 2988 fcport = kzalloc(sizeof(fc_port_t), flags); 2989 if (!fcport) 2990 return NULL; 2991 2992 /* Setup fcport template structure. */ 2993 fcport->vha = vha; 2994 fcport->port_type = FCT_UNKNOWN; 2995 fcport->loop_id = FC_NO_LOOP_ID; 2996 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 2997 fcport->supported_classes = FC_COS_UNSPECIFIED; 2998 2999 return fcport; 3000 } 3001 3002 /* 3003 * qla2x00_configure_loop 3004 * Updates Fibre Channel Device Database with what is actually on loop. 3005 * 3006 * Input: 3007 * ha = adapter block pointer. 3008 * 3009 * Returns: 3010 * 0 = success. 3011 * 1 = error. 3012 * 2 = database was full and device was not configured. 3013 */ 3014 static int 3015 qla2x00_configure_loop(scsi_qla_host_t *vha) 3016 { 3017 int rval; 3018 unsigned long flags, save_flags; 3019 struct qla_hw_data *ha = vha->hw; 3020 rval = QLA_SUCCESS; 3021 3022 /* Get Initiator ID */ 3023 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 3024 rval = qla2x00_configure_hba(vha); 3025 if (rval != QLA_SUCCESS) { 3026 ql_dbg(ql_dbg_disc, vha, 0x2013, 3027 "Unable to configure HBA.\n"); 3028 return (rval); 3029 } 3030 } 3031 3032 save_flags = flags = vha->dpc_flags; 3033 ql_dbg(ql_dbg_disc, vha, 0x2014, 3034 "Configure loop -- dpc flags = 0x%lx.\n", flags); 3035 3036 /* 3037 * If we have both an RSCN and PORT UPDATE pending then handle them 3038 * both at the same time. 3039 */ 3040 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3041 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 3042 3043 qla2x00_get_data_rate(vha); 3044 3045 /* Determine what we need to do */ 3046 if (ha->current_topology == ISP_CFG_FL && 3047 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 3048 3049 set_bit(RSCN_UPDATE, &flags); 3050 3051 } else if (ha->current_topology == ISP_CFG_F && 3052 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 3053 3054 set_bit(RSCN_UPDATE, &flags); 3055 clear_bit(LOCAL_LOOP_UPDATE, &flags); 3056 3057 } else if (ha->current_topology == ISP_CFG_N) { 3058 clear_bit(RSCN_UPDATE, &flags); 3059 3060 } else if (!vha->flags.online || 3061 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 3062 3063 set_bit(RSCN_UPDATE, &flags); 3064 set_bit(LOCAL_LOOP_UPDATE, &flags); 3065 } 3066 3067 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 3068 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 3069 ql_dbg(ql_dbg_disc, vha, 0x2015, 3070 "Loop resync needed, failing.\n"); 3071 rval = QLA_FUNCTION_FAILED; 3072 } else 3073 rval = qla2x00_configure_local_loop(vha); 3074 } 3075 3076 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 3077 if (LOOP_TRANSITION(vha)) { 3078 ql_dbg(ql_dbg_disc, vha, 0x201e, 3079 "Needs RSCN update and loop transition.\n"); 3080 rval = QLA_FUNCTION_FAILED; 3081 } 3082 else 3083 rval = qla2x00_configure_fabric(vha); 3084 } 3085 3086 if (rval == QLA_SUCCESS) { 3087 if (atomic_read(&vha->loop_down_timer) || 3088 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 3089 rval = QLA_FUNCTION_FAILED; 3090 } else { 3091 atomic_set(&vha->loop_state, LOOP_READY); 3092 ql_dbg(ql_dbg_disc, vha, 0x2069, 3093 "LOOP READY.\n"); 3094 3095 /* 3096 * Process any ATIO queue entries that came in 3097 * while we weren't online. 3098 */ 3099 if (qla_tgt_mode_enabled(vha)) { 3100 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) { 3101 spin_lock_irqsave(&ha->tgt.atio_lock, 3102 flags); 3103 qlt_24xx_process_atio_queue(vha, 0); 3104 spin_unlock_irqrestore( 3105 &ha->tgt.atio_lock, flags); 3106 } else { 3107 spin_lock_irqsave(&ha->hardware_lock, 3108 flags); 3109 qlt_24xx_process_atio_queue(vha, 1); 3110 spin_unlock_irqrestore( 3111 &ha->hardware_lock, flags); 3112 } 3113 } 3114 } 3115 } 3116 3117 if (rval) { 3118 ql_dbg(ql_dbg_disc, vha, 0x206a, 3119 "%s *** FAILED ***.\n", __func__); 3120 } else { 3121 ql_dbg(ql_dbg_disc, vha, 0x206b, 3122 "%s: exiting normally.\n", __func__); 3123 } 3124 3125 /* Restore state if a resync event occurred during processing */ 3126 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 3127 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 3128 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3129 if (test_bit(RSCN_UPDATE, &save_flags)) { 3130 set_bit(RSCN_UPDATE, &vha->dpc_flags); 3131 } 3132 } 3133 3134 return (rval); 3135 } 3136 3137 3138 3139 /* 3140 * qla2x00_configure_local_loop 3141 * Updates Fibre Channel Device Database with local loop devices. 3142 * 3143 * Input: 3144 * ha = adapter block pointer. 3145 * 3146 * Returns: 3147 * 0 = success. 3148 */ 3149 static int 3150 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 3151 { 3152 int rval, rval2; 3153 int found_devs; 3154 int found; 3155 fc_port_t *fcport, *new_fcport; 3156 3157 uint16_t index; 3158 uint16_t entries; 3159 char *id_iter; 3160 uint16_t loop_id; 3161 uint8_t domain, area, al_pa; 3162 struct qla_hw_data *ha = vha->hw; 3163 3164 found_devs = 0; 3165 new_fcport = NULL; 3166 entries = MAX_FIBRE_DEVICES_LOOP; 3167 3168 /* Get list of logged in devices. */ 3169 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 3170 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 3171 &entries); 3172 if (rval != QLA_SUCCESS) 3173 goto cleanup_allocation; 3174 3175 ql_dbg(ql_dbg_disc, vha, 0x2017, 3176 "Entries in ID list (%d).\n", entries); 3177 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 3178 (uint8_t *)ha->gid_list, 3179 entries * sizeof(struct gid_list_info)); 3180 3181 /* Allocate temporary fcport for any new fcports discovered. */ 3182 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3183 if (new_fcport == NULL) { 3184 ql_log(ql_log_warn, vha, 0x2018, 3185 "Memory allocation failed for fcport.\n"); 3186 rval = QLA_MEMORY_ALLOC_FAILED; 3187 goto cleanup_allocation; 3188 } 3189 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 3190 3191 /* 3192 * Mark local devices that were present with FCF_DEVICE_LOST for now. 3193 */ 3194 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3195 if (atomic_read(&fcport->state) == FCS_ONLINE && 3196 fcport->port_type != FCT_BROADCAST && 3197 (fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3198 3199 ql_dbg(ql_dbg_disc, vha, 0x2019, 3200 "Marking port lost loop_id=0x%04x.\n", 3201 fcport->loop_id); 3202 3203 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 3204 } 3205 } 3206 3207 /* Add devices to port list. */ 3208 id_iter = (char *)ha->gid_list; 3209 for (index = 0; index < entries; index++) { 3210 domain = ((struct gid_list_info *)id_iter)->domain; 3211 area = ((struct gid_list_info *)id_iter)->area; 3212 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 3213 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3214 loop_id = (uint16_t) 3215 ((struct gid_list_info *)id_iter)->loop_id_2100; 3216 else 3217 loop_id = le16_to_cpu( 3218 ((struct gid_list_info *)id_iter)->loop_id); 3219 id_iter += ha->gid_list_info_size; 3220 3221 /* Bypass reserved domain fields. */ 3222 if ((domain & 0xf0) == 0xf0) 3223 continue; 3224 3225 /* Bypass if not same domain and area of adapter. */ 3226 if (area && domain && 3227 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 3228 continue; 3229 3230 /* Bypass invalid local loop ID. */ 3231 if (loop_id > LAST_LOCAL_LOOP_ID) 3232 continue; 3233 3234 memset(new_fcport, 0, sizeof(fc_port_t)); 3235 3236 /* Fill in member data. */ 3237 new_fcport->d_id.b.domain = domain; 3238 new_fcport->d_id.b.area = area; 3239 new_fcport->d_id.b.al_pa = al_pa; 3240 new_fcport->loop_id = loop_id; 3241 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 3242 if (rval2 != QLA_SUCCESS) { 3243 ql_dbg(ql_dbg_disc, vha, 0x201a, 3244 "Failed to retrieve fcport information " 3245 "-- get_port_database=%x, loop_id=0x%04x.\n", 3246 rval2, new_fcport->loop_id); 3247 ql_dbg(ql_dbg_disc, vha, 0x201b, 3248 "Scheduling resync.\n"); 3249 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3250 continue; 3251 } 3252 3253 /* Check for matching device in port list. */ 3254 found = 0; 3255 fcport = NULL; 3256 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3257 if (memcmp(new_fcport->port_name, fcport->port_name, 3258 WWN_SIZE)) 3259 continue; 3260 3261 fcport->flags &= ~FCF_FABRIC_DEVICE; 3262 fcport->loop_id = new_fcport->loop_id; 3263 fcport->port_type = new_fcport->port_type; 3264 fcport->d_id.b24 = new_fcport->d_id.b24; 3265 memcpy(fcport->node_name, new_fcport->node_name, 3266 WWN_SIZE); 3267 3268 found++; 3269 break; 3270 } 3271 3272 if (!found) { 3273 /* New device, add to fcports list. */ 3274 list_add_tail(&new_fcport->list, &vha->vp_fcports); 3275 3276 /* Allocate a new replacement fcport. */ 3277 fcport = new_fcport; 3278 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3279 if (new_fcport == NULL) { 3280 ql_log(ql_log_warn, vha, 0x201c, 3281 "Failed to allocate memory for fcport.\n"); 3282 rval = QLA_MEMORY_ALLOC_FAILED; 3283 goto cleanup_allocation; 3284 } 3285 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 3286 } 3287 3288 /* Base iIDMA settings on HBA port speed. */ 3289 fcport->fp_speed = ha->link_data_rate; 3290 3291 qla2x00_update_fcport(vha, fcport); 3292 3293 found_devs++; 3294 } 3295 3296 cleanup_allocation: 3297 kfree(new_fcport); 3298 3299 if (rval != QLA_SUCCESS) { 3300 ql_dbg(ql_dbg_disc, vha, 0x201d, 3301 "Configure local loop error exit: rval=%x.\n", rval); 3302 } 3303 3304 return (rval); 3305 } 3306 3307 static void 3308 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 3309 { 3310 int rval; 3311 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3312 struct qla_hw_data *ha = vha->hw; 3313 3314 if (!IS_IIDMA_CAPABLE(ha)) 3315 return; 3316 3317 if (atomic_read(&fcport->state) != FCS_ONLINE) 3318 return; 3319 3320 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 3321 fcport->fp_speed > ha->link_data_rate) 3322 return; 3323 3324 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 3325 mb); 3326 if (rval != QLA_SUCCESS) { 3327 ql_dbg(ql_dbg_disc, vha, 0x2004, 3328 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 3329 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 3330 } else { 3331 ql_dbg(ql_dbg_disc, vha, 0x2005, 3332 "iIDMA adjusted to %s GB/s on %8phN.\n", 3333 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 3334 fcport->port_name); 3335 } 3336 } 3337 3338 static void 3339 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 3340 { 3341 struct fc_rport_identifiers rport_ids; 3342 struct fc_rport *rport; 3343 unsigned long flags; 3344 3345 rport_ids.node_name = wwn_to_u64(fcport->node_name); 3346 rport_ids.port_name = wwn_to_u64(fcport->port_name); 3347 rport_ids.port_id = fcport->d_id.b.domain << 16 | 3348 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 3349 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 3350 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 3351 if (!rport) { 3352 ql_log(ql_log_warn, vha, 0x2006, 3353 "Unable to allocate fc remote port.\n"); 3354 return; 3355 } 3356 /* 3357 * Create target mode FC NEXUS in qla_target.c if target mode is 3358 * enabled.. 3359 */ 3360 3361 qlt_fc_port_added(vha, fcport); 3362 3363 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 3364 *((fc_port_t **)rport->dd_data) = fcport; 3365 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 3366 3367 rport->supported_classes = fcport->supported_classes; 3368 3369 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 3370 if (fcport->port_type == FCT_INITIATOR) 3371 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 3372 if (fcport->port_type == FCT_TARGET) 3373 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 3374 fc_remote_port_rolechg(rport, rport_ids.roles); 3375 } 3376 3377 /* 3378 * qla2x00_update_fcport 3379 * Updates device on list. 3380 * 3381 * Input: 3382 * ha = adapter block pointer. 3383 * fcport = port structure pointer. 3384 * 3385 * Return: 3386 * 0 - Success 3387 * BIT_0 - error 3388 * 3389 * Context: 3390 * Kernel context. 3391 */ 3392 void 3393 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 3394 { 3395 fcport->vha = vha; 3396 3397 if (IS_QLAFX00(vha->hw)) { 3398 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 3399 goto reg_port; 3400 } 3401 fcport->login_retry = 0; 3402 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 3403 3404 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 3405 qla2x00_iidma_fcport(vha, fcport); 3406 qla24xx_update_fcport_fcp_prio(vha, fcport); 3407 3408 reg_port: 3409 if (qla_ini_mode_enabled(vha)) 3410 qla2x00_reg_remote_port(vha, fcport); 3411 else { 3412 /* 3413 * Create target mode FC NEXUS in qla_target.c 3414 */ 3415 qlt_fc_port_added(vha, fcport); 3416 } 3417 } 3418 3419 /* 3420 * qla2x00_configure_fabric 3421 * Setup SNS devices with loop ID's. 3422 * 3423 * Input: 3424 * ha = adapter block pointer. 3425 * 3426 * Returns: 3427 * 0 = success. 3428 * BIT_0 = error 3429 */ 3430 static int 3431 qla2x00_configure_fabric(scsi_qla_host_t *vha) 3432 { 3433 int rval; 3434 fc_port_t *fcport, *fcptemp; 3435 uint16_t next_loopid; 3436 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3437 uint16_t loop_id; 3438 LIST_HEAD(new_fcports); 3439 struct qla_hw_data *ha = vha->hw; 3440 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 3441 int discovery_gen; 3442 3443 /* If FL port exists, then SNS is present */ 3444 if (IS_FWI2_CAPABLE(ha)) 3445 loop_id = NPH_F_PORT; 3446 else 3447 loop_id = SNS_FL_PORT; 3448 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 3449 if (rval != QLA_SUCCESS) { 3450 ql_dbg(ql_dbg_disc, vha, 0x201f, 3451 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 3452 3453 vha->device_flags &= ~SWITCH_FOUND; 3454 return (QLA_SUCCESS); 3455 } 3456 vha->device_flags |= SWITCH_FOUND; 3457 3458 do { 3459 /* FDMI support. */ 3460 if (ql2xfdmienable && 3461 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 3462 qla2x00_fdmi_register(vha); 3463 3464 /* Ensure we are logged into the SNS. */ 3465 if (IS_FWI2_CAPABLE(ha)) 3466 loop_id = NPH_SNS; 3467 else 3468 loop_id = SIMPLE_NAME_SERVER; 3469 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 3470 0xfc, mb, BIT_1|BIT_0); 3471 if (rval != QLA_SUCCESS) { 3472 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3473 return rval; 3474 } 3475 if (mb[0] != MBS_COMMAND_COMPLETE) { 3476 ql_dbg(ql_dbg_disc, vha, 0x2042, 3477 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 3478 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], 3479 mb[2], mb[6], mb[7]); 3480 return (QLA_SUCCESS); 3481 } 3482 3483 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 3484 if (qla2x00_rft_id(vha)) { 3485 /* EMPTY */ 3486 ql_dbg(ql_dbg_disc, vha, 0x2045, 3487 "Register FC-4 TYPE failed.\n"); 3488 } 3489 if (qla2x00_rff_id(vha)) { 3490 /* EMPTY */ 3491 ql_dbg(ql_dbg_disc, vha, 0x2049, 3492 "Register FC-4 Features failed.\n"); 3493 } 3494 if (qla2x00_rnn_id(vha)) { 3495 /* EMPTY */ 3496 ql_dbg(ql_dbg_disc, vha, 0x204f, 3497 "Register Node Name failed.\n"); 3498 } else if (qla2x00_rsnn_nn(vha)) { 3499 /* EMPTY */ 3500 ql_dbg(ql_dbg_disc, vha, 0x2053, 3501 "Register Symobilic Node Name failed.\n"); 3502 } 3503 } 3504 3505 #define QLA_FCPORT_SCAN 1 3506 #define QLA_FCPORT_FOUND 2 3507 3508 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3509 fcport->scan_state = QLA_FCPORT_SCAN; 3510 } 3511 3512 /* Mark the time right before querying FW for connected ports. 3513 * This process is long, asynchronous and by the time it's done, 3514 * collected information might not be accurate anymore. E.g. 3515 * disconnected port might have re-connected and a brand new 3516 * session has been created. In this case session's generation 3517 * will be newer than discovery_gen. */ 3518 qlt_do_generation_tick(vha, &discovery_gen); 3519 3520 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); 3521 if (rval != QLA_SUCCESS) 3522 break; 3523 3524 /* 3525 * Logout all previous fabric devices marked lost, except 3526 * FCP2 devices. 3527 */ 3528 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3529 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3530 break; 3531 3532 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 3533 continue; 3534 3535 if (fcport->scan_state == QLA_FCPORT_SCAN) { 3536 if (qla_ini_mode_enabled(base_vha) && 3537 atomic_read(&fcport->state) == FCS_ONLINE) { 3538 qla2x00_mark_device_lost(vha, fcport, 3539 ql2xplogiabsentdevice, 0); 3540 if (fcport->loop_id != FC_NO_LOOP_ID && 3541 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3542 fcport->port_type != FCT_INITIATOR && 3543 fcport->port_type != FCT_BROADCAST) { 3544 ha->isp_ops->fabric_logout(vha, 3545 fcport->loop_id, 3546 fcport->d_id.b.domain, 3547 fcport->d_id.b.area, 3548 fcport->d_id.b.al_pa); 3549 qla2x00_clear_loop_id(fcport); 3550 } 3551 } else if (!qla_ini_mode_enabled(base_vha)) { 3552 /* 3553 * In target mode, explicitly kill 3554 * sessions and log out of devices 3555 * that are gone, so that we don't 3556 * end up with an initiator using the 3557 * wrong ACL (if the fabric recycles 3558 * an FC address and we have a stale 3559 * session around) and so that we don't 3560 * report initiators that are no longer 3561 * on the fabric. 3562 */ 3563 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf077, 3564 "port gone, logging out/killing session: " 3565 "%8phC state 0x%x flags 0x%x fc4_type 0x%x " 3566 "scan_state %d\n", 3567 fcport->port_name, 3568 atomic_read(&fcport->state), 3569 fcport->flags, fcport->fc4_type, 3570 fcport->scan_state); 3571 qlt_fc_port_deleted(vha, fcport, 3572 discovery_gen); 3573 } 3574 } 3575 } 3576 3577 /* Starting free loop ID. */ 3578 next_loopid = ha->min_external_loopid; 3579 3580 /* 3581 * Scan through our port list and login entries that need to be 3582 * logged in. 3583 */ 3584 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3585 if (atomic_read(&vha->loop_down_timer) || 3586 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3587 break; 3588 3589 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 3590 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 3591 continue; 3592 3593 /* 3594 * If we're not an initiator, skip looking for devices 3595 * and logging in. There's no reason for us to do it, 3596 * and it seems to actively cause problems in target 3597 * mode if we race with the initiator logging into us 3598 * (we might get the "port ID used" status back from 3599 * our login command and log out the initiator, which 3600 * seems to cause havoc). 3601 */ 3602 if (!qla_ini_mode_enabled(base_vha)) { 3603 if (fcport->scan_state == QLA_FCPORT_FOUND) { 3604 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf078, 3605 "port %8phC state 0x%x flags 0x%x fc4_type 0x%x " 3606 "scan_state %d (initiator mode disabled; skipping " 3607 "login)\n", fcport->port_name, 3608 atomic_read(&fcport->state), 3609 fcport->flags, fcport->fc4_type, 3610 fcport->scan_state); 3611 } 3612 continue; 3613 } 3614 3615 if (fcport->loop_id == FC_NO_LOOP_ID) { 3616 fcport->loop_id = next_loopid; 3617 rval = qla2x00_find_new_loop_id( 3618 base_vha, fcport); 3619 if (rval != QLA_SUCCESS) { 3620 /* Ran out of IDs to use */ 3621 break; 3622 } 3623 } 3624 /* Login and update database */ 3625 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3626 } 3627 3628 /* Exit if out of loop IDs. */ 3629 if (rval != QLA_SUCCESS) { 3630 break; 3631 } 3632 3633 /* 3634 * Login and add the new devices to our port list. 3635 */ 3636 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3637 if (atomic_read(&vha->loop_down_timer) || 3638 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3639 break; 3640 3641 /* 3642 * If we're not an initiator, skip looking for devices 3643 * and logging in. There's no reason for us to do it, 3644 * and it seems to actively cause problems in target 3645 * mode if we race with the initiator logging into us 3646 * (we might get the "port ID used" status back from 3647 * our login command and log out the initiator, which 3648 * seems to cause havoc). 3649 */ 3650 if (qla_ini_mode_enabled(base_vha)) { 3651 /* Find a new loop ID to use. */ 3652 fcport->loop_id = next_loopid; 3653 rval = qla2x00_find_new_loop_id(base_vha, 3654 fcport); 3655 if (rval != QLA_SUCCESS) { 3656 /* Ran out of IDs to use */ 3657 break; 3658 } 3659 3660 /* Login and update database */ 3661 qla2x00_fabric_dev_login(vha, fcport, 3662 &next_loopid); 3663 } else { 3664 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf079, 3665 "new port %8phC state 0x%x flags 0x%x fc4_type " 3666 "0x%x scan_state %d (initiator mode disabled; " 3667 "skipping login)\n", 3668 fcport->port_name, 3669 atomic_read(&fcport->state), 3670 fcport->flags, fcport->fc4_type, 3671 fcport->scan_state); 3672 } 3673 3674 list_move_tail(&fcport->list, &vha->vp_fcports); 3675 } 3676 } while (0); 3677 3678 /* Free all new device structures not processed. */ 3679 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3680 list_del(&fcport->list); 3681 kfree(fcport); 3682 } 3683 3684 if (rval) { 3685 ql_dbg(ql_dbg_disc, vha, 0x2068, 3686 "Configure fabric error exit rval=%d.\n", rval); 3687 } 3688 3689 return (rval); 3690 } 3691 3692 /* 3693 * qla2x00_find_all_fabric_devs 3694 * 3695 * Input: 3696 * ha = adapter block pointer. 3697 * dev = database device entry pointer. 3698 * 3699 * Returns: 3700 * 0 = success. 3701 * 3702 * Context: 3703 * Kernel context. 3704 */ 3705 static int 3706 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, 3707 struct list_head *new_fcports) 3708 { 3709 int rval; 3710 uint16_t loop_id; 3711 fc_port_t *fcport, *new_fcport, *fcptemp; 3712 int found; 3713 3714 sw_info_t *swl; 3715 int swl_idx; 3716 int first_dev, last_dev; 3717 port_id_t wrap = {}, nxt_d_id; 3718 struct qla_hw_data *ha = vha->hw; 3719 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 3720 3721 rval = QLA_SUCCESS; 3722 3723 /* Try GID_PT to get device list, else GAN. */ 3724 if (!ha->swl) 3725 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 3726 GFP_KERNEL); 3727 swl = ha->swl; 3728 if (!swl) { 3729 /*EMPTY*/ 3730 ql_dbg(ql_dbg_disc, vha, 0x2054, 3731 "GID_PT allocations failed, fallback on GA_NXT.\n"); 3732 } else { 3733 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 3734 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 3735 swl = NULL; 3736 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 3737 swl = NULL; 3738 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 3739 swl = NULL; 3740 } else if (ql2xiidmaenable && 3741 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { 3742 qla2x00_gpsc(vha, swl); 3743 } 3744 3745 /* If other queries succeeded probe for FC-4 type */ 3746 if (swl) 3747 qla2x00_gff_id(vha, swl); 3748 } 3749 swl_idx = 0; 3750 3751 /* Allocate temporary fcport for any new fcports discovered. */ 3752 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3753 if (new_fcport == NULL) { 3754 ql_log(ql_log_warn, vha, 0x205e, 3755 "Failed to allocate memory for fcport.\n"); 3756 return (QLA_MEMORY_ALLOC_FAILED); 3757 } 3758 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3759 /* Set start port ID scan at adapter ID. */ 3760 first_dev = 1; 3761 last_dev = 0; 3762 3763 /* Starting free loop ID. */ 3764 loop_id = ha->min_external_loopid; 3765 for (; loop_id <= ha->max_loop_id; loop_id++) { 3766 if (qla2x00_is_reserved_id(vha, loop_id)) 3767 continue; 3768 3769 if (ha->current_topology == ISP_CFG_FL && 3770 (atomic_read(&vha->loop_down_timer) || 3771 LOOP_TRANSITION(vha))) { 3772 atomic_set(&vha->loop_down_timer, 0); 3773 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3774 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3775 break; 3776 } 3777 3778 if (swl != NULL) { 3779 if (last_dev) { 3780 wrap.b24 = new_fcport->d_id.b24; 3781 } else { 3782 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 3783 memcpy(new_fcport->node_name, 3784 swl[swl_idx].node_name, WWN_SIZE); 3785 memcpy(new_fcport->port_name, 3786 swl[swl_idx].port_name, WWN_SIZE); 3787 memcpy(new_fcport->fabric_port_name, 3788 swl[swl_idx].fabric_port_name, WWN_SIZE); 3789 new_fcport->fp_speed = swl[swl_idx].fp_speed; 3790 new_fcport->fc4_type = swl[swl_idx].fc4_type; 3791 3792 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 3793 last_dev = 1; 3794 } 3795 swl_idx++; 3796 } 3797 } else { 3798 /* Send GA_NXT to the switch */ 3799 rval = qla2x00_ga_nxt(vha, new_fcport); 3800 if (rval != QLA_SUCCESS) { 3801 ql_log(ql_log_warn, vha, 0x2064, 3802 "SNS scan failed -- assuming " 3803 "zero-entry result.\n"); 3804 list_for_each_entry_safe(fcport, fcptemp, 3805 new_fcports, list) { 3806 list_del(&fcport->list); 3807 kfree(fcport); 3808 } 3809 rval = QLA_SUCCESS; 3810 break; 3811 } 3812 } 3813 3814 /* If wrap on switch device list, exit. */ 3815 if (first_dev) { 3816 wrap.b24 = new_fcport->d_id.b24; 3817 first_dev = 0; 3818 } else if (new_fcport->d_id.b24 == wrap.b24) { 3819 ql_dbg(ql_dbg_disc, vha, 0x2065, 3820 "Device wrap (%02x%02x%02x).\n", 3821 new_fcport->d_id.b.domain, 3822 new_fcport->d_id.b.area, 3823 new_fcport->d_id.b.al_pa); 3824 break; 3825 } 3826 3827 /* Bypass if same physical adapter. */ 3828 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 3829 continue; 3830 3831 /* Bypass virtual ports of the same host. */ 3832 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 3833 continue; 3834 3835 /* Bypass if same domain and area of adapter. */ 3836 if (((new_fcport->d_id.b24 & 0xffff00) == 3837 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 3838 ISP_CFG_FL) 3839 continue; 3840 3841 /* Bypass reserved domain fields. */ 3842 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 3843 continue; 3844 3845 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 3846 if (ql2xgffidenable && 3847 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 3848 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 3849 continue; 3850 3851 /* Locate matching device in database. */ 3852 found = 0; 3853 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3854 if (memcmp(new_fcport->port_name, fcport->port_name, 3855 WWN_SIZE)) 3856 continue; 3857 3858 fcport->scan_state = QLA_FCPORT_FOUND; 3859 3860 found++; 3861 3862 /* Update port state. */ 3863 memcpy(fcport->fabric_port_name, 3864 new_fcport->fabric_port_name, WWN_SIZE); 3865 fcport->fp_speed = new_fcport->fp_speed; 3866 3867 /* 3868 * If address the same and state FCS_ONLINE 3869 * (or in target mode), nothing changed. 3870 */ 3871 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 3872 (atomic_read(&fcport->state) == FCS_ONLINE || 3873 !qla_ini_mode_enabled(base_vha))) { 3874 break; 3875 } 3876 3877 /* 3878 * If device was not a fabric device before. 3879 */ 3880 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3881 fcport->d_id.b24 = new_fcport->d_id.b24; 3882 qla2x00_clear_loop_id(fcport); 3883 fcport->flags |= (FCF_FABRIC_DEVICE | 3884 FCF_LOGIN_NEEDED); 3885 break; 3886 } 3887 3888 /* 3889 * Port ID changed or device was marked to be updated; 3890 * Log it out if still logged in and mark it for 3891 * relogin later. 3892 */ 3893 if (!qla_ini_mode_enabled(base_vha)) { 3894 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 3895 "port changed FC ID, %8phC" 3896 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 3897 fcport->port_name, 3898 fcport->d_id.b.domain, 3899 fcport->d_id.b.area, 3900 fcport->d_id.b.al_pa, 3901 fcport->loop_id, 3902 new_fcport->d_id.b.domain, 3903 new_fcport->d_id.b.area, 3904 new_fcport->d_id.b.al_pa); 3905 fcport->d_id.b24 = new_fcport->d_id.b24; 3906 break; 3907 } 3908 3909 fcport->d_id.b24 = new_fcport->d_id.b24; 3910 fcport->flags |= FCF_LOGIN_NEEDED; 3911 if (fcport->loop_id != FC_NO_LOOP_ID && 3912 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3913 (fcport->flags & FCF_ASYNC_SENT) == 0 && 3914 fcport->port_type != FCT_INITIATOR && 3915 fcport->port_type != FCT_BROADCAST) { 3916 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3917 fcport->d_id.b.domain, fcport->d_id.b.area, 3918 fcport->d_id.b.al_pa); 3919 qla2x00_clear_loop_id(fcport); 3920 } 3921 3922 break; 3923 } 3924 3925 if (found) 3926 continue; 3927 /* If device was not in our fcports list, then add it. */ 3928 new_fcport->scan_state = QLA_FCPORT_FOUND; 3929 list_add_tail(&new_fcport->list, new_fcports); 3930 3931 /* Allocate a new replacement fcport. */ 3932 nxt_d_id.b24 = new_fcport->d_id.b24; 3933 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3934 if (new_fcport == NULL) { 3935 ql_log(ql_log_warn, vha, 0x2066, 3936 "Memory allocation failed for fcport.\n"); 3937 return (QLA_MEMORY_ALLOC_FAILED); 3938 } 3939 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3940 new_fcport->d_id.b24 = nxt_d_id.b24; 3941 } 3942 3943 kfree(new_fcport); 3944 3945 return (rval); 3946 } 3947 3948 /* 3949 * qla2x00_find_new_loop_id 3950 * Scan through our port list and find a new usable loop ID. 3951 * 3952 * Input: 3953 * ha: adapter state pointer. 3954 * dev: port structure pointer. 3955 * 3956 * Returns: 3957 * qla2x00 local function return status code. 3958 * 3959 * Context: 3960 * Kernel context. 3961 */ 3962 int 3963 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 3964 { 3965 int rval; 3966 struct qla_hw_data *ha = vha->hw; 3967 unsigned long flags = 0; 3968 3969 rval = QLA_SUCCESS; 3970 3971 spin_lock_irqsave(&ha->vport_slock, flags); 3972 3973 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 3974 LOOPID_MAP_SIZE); 3975 if (dev->loop_id >= LOOPID_MAP_SIZE || 3976 qla2x00_is_reserved_id(vha, dev->loop_id)) { 3977 dev->loop_id = FC_NO_LOOP_ID; 3978 rval = QLA_FUNCTION_FAILED; 3979 } else 3980 set_bit(dev->loop_id, ha->loop_id_map); 3981 3982 spin_unlock_irqrestore(&ha->vport_slock, flags); 3983 3984 if (rval == QLA_SUCCESS) 3985 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 3986 "Assigning new loopid=%x, portid=%x.\n", 3987 dev->loop_id, dev->d_id.b24); 3988 else 3989 ql_log(ql_log_warn, dev->vha, 0x2087, 3990 "No loop_id's available, portid=%x.\n", 3991 dev->d_id.b24); 3992 3993 return (rval); 3994 } 3995 3996 /* 3997 * qla2x00_fabric_dev_login 3998 * Login fabric target device and update FC port database. 3999 * 4000 * Input: 4001 * ha: adapter state pointer. 4002 * fcport: port structure list pointer. 4003 * next_loopid: contains value of a new loop ID that can be used 4004 * by the next login attempt. 4005 * 4006 * Returns: 4007 * qla2x00 local function return status code. 4008 * 4009 * Context: 4010 * Kernel context. 4011 */ 4012 static int 4013 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, 4014 uint16_t *next_loopid) 4015 { 4016 int rval; 4017 uint8_t opts; 4018 struct qla_hw_data *ha = vha->hw; 4019 4020 rval = QLA_SUCCESS; 4021 4022 if (IS_ALOGIO_CAPABLE(ha)) { 4023 if (fcport->flags & FCF_ASYNC_SENT) 4024 return rval; 4025 fcport->flags |= FCF_ASYNC_SENT; 4026 rval = qla2x00_post_async_login_work(vha, fcport, NULL); 4027 if (!rval) 4028 return rval; 4029 } 4030 4031 fcport->flags &= ~FCF_ASYNC_SENT; 4032 rval = qla2x00_fabric_login(vha, fcport, next_loopid); 4033 if (rval == QLA_SUCCESS) { 4034 /* Send an ADISC to FCP2 devices.*/ 4035 opts = 0; 4036 if (fcport->flags & FCF_FCP2_DEVICE) 4037 opts |= BIT_1; 4038 rval = qla2x00_get_port_database(vha, fcport, opts); 4039 if (rval != QLA_SUCCESS) { 4040 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 4041 fcport->d_id.b.domain, fcport->d_id.b.area, 4042 fcport->d_id.b.al_pa); 4043 qla2x00_mark_device_lost(vha, fcport, 1, 0); 4044 } else { 4045 qla2x00_update_fcport(vha, fcport); 4046 } 4047 } else { 4048 /* Retry Login. */ 4049 qla2x00_mark_device_lost(vha, fcport, 1, 0); 4050 } 4051 4052 return (rval); 4053 } 4054 4055 /* 4056 * qla2x00_fabric_login 4057 * Issue fabric login command. 4058 * 4059 * Input: 4060 * ha = adapter block pointer. 4061 * device = pointer to FC device type structure. 4062 * 4063 * Returns: 4064 * 0 - Login successfully 4065 * 1 - Login failed 4066 * 2 - Initiator device 4067 * 3 - Fatal error 4068 */ 4069 int 4070 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 4071 uint16_t *next_loopid) 4072 { 4073 int rval; 4074 int retry; 4075 uint16_t tmp_loopid; 4076 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4077 struct qla_hw_data *ha = vha->hw; 4078 4079 retry = 0; 4080 tmp_loopid = 0; 4081 4082 for (;;) { 4083 ql_dbg(ql_dbg_disc, vha, 0x2000, 4084 "Trying Fabric Login w/loop id 0x%04x for port " 4085 "%02x%02x%02x.\n", 4086 fcport->loop_id, fcport->d_id.b.domain, 4087 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4088 4089 /* Login fcport on switch. */ 4090 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 4091 fcport->d_id.b.domain, fcport->d_id.b.area, 4092 fcport->d_id.b.al_pa, mb, BIT_0); 4093 if (rval != QLA_SUCCESS) { 4094 return rval; 4095 } 4096 if (mb[0] == MBS_PORT_ID_USED) { 4097 /* 4098 * Device has another loop ID. The firmware team 4099 * recommends the driver perform an implicit login with 4100 * the specified ID again. The ID we just used is save 4101 * here so we return with an ID that can be tried by 4102 * the next login. 4103 */ 4104 retry++; 4105 tmp_loopid = fcport->loop_id; 4106 fcport->loop_id = mb[1]; 4107 4108 ql_dbg(ql_dbg_disc, vha, 0x2001, 4109 "Fabric Login: port in use - next loop " 4110 "id=0x%04x, port id= %02x%02x%02x.\n", 4111 fcport->loop_id, fcport->d_id.b.domain, 4112 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4113 4114 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 4115 /* 4116 * Login succeeded. 4117 */ 4118 if (retry) { 4119 /* A retry occurred before. */ 4120 *next_loopid = tmp_loopid; 4121 } else { 4122 /* 4123 * No retry occurred before. Just increment the 4124 * ID value for next login. 4125 */ 4126 *next_loopid = (fcport->loop_id + 1); 4127 } 4128 4129 if (mb[1] & BIT_0) { 4130 fcport->port_type = FCT_INITIATOR; 4131 } else { 4132 fcport->port_type = FCT_TARGET; 4133 if (mb[1] & BIT_1) { 4134 fcport->flags |= FCF_FCP2_DEVICE; 4135 } 4136 } 4137 4138 if (mb[10] & BIT_0) 4139 fcport->supported_classes |= FC_COS_CLASS2; 4140 if (mb[10] & BIT_1) 4141 fcport->supported_classes |= FC_COS_CLASS3; 4142 4143 if (IS_FWI2_CAPABLE(ha)) { 4144 if (mb[10] & BIT_7) 4145 fcport->flags |= 4146 FCF_CONF_COMP_SUPPORTED; 4147 } 4148 4149 rval = QLA_SUCCESS; 4150 break; 4151 } else if (mb[0] == MBS_LOOP_ID_USED) { 4152 /* 4153 * Loop ID already used, try next loop ID. 4154 */ 4155 fcport->loop_id++; 4156 rval = qla2x00_find_new_loop_id(vha, fcport); 4157 if (rval != QLA_SUCCESS) { 4158 /* Ran out of loop IDs to use */ 4159 break; 4160 } 4161 } else if (mb[0] == MBS_COMMAND_ERROR) { 4162 /* 4163 * Firmware possibly timed out during login. If NO 4164 * retries are left to do then the device is declared 4165 * dead. 4166 */ 4167 *next_loopid = fcport->loop_id; 4168 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 4169 fcport->d_id.b.domain, fcport->d_id.b.area, 4170 fcport->d_id.b.al_pa); 4171 qla2x00_mark_device_lost(vha, fcport, 1, 0); 4172 4173 rval = 1; 4174 break; 4175 } else { 4176 /* 4177 * unrecoverable / not handled error 4178 */ 4179 ql_dbg(ql_dbg_disc, vha, 0x2002, 4180 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 4181 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 4182 fcport->d_id.b.area, fcport->d_id.b.al_pa, 4183 fcport->loop_id, jiffies); 4184 4185 *next_loopid = fcport->loop_id; 4186 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 4187 fcport->d_id.b.domain, fcport->d_id.b.area, 4188 fcport->d_id.b.al_pa); 4189 qla2x00_clear_loop_id(fcport); 4190 fcport->login_retry = 0; 4191 4192 rval = 3; 4193 break; 4194 } 4195 } 4196 4197 return (rval); 4198 } 4199 4200 /* 4201 * qla2x00_local_device_login 4202 * Issue local device login command. 4203 * 4204 * Input: 4205 * ha = adapter block pointer. 4206 * loop_id = loop id of device to login to. 4207 * 4208 * Returns (Where's the #define!!!!): 4209 * 0 - Login successfully 4210 * 1 - Login failed 4211 * 3 - Fatal error 4212 */ 4213 int 4214 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 4215 { 4216 int rval; 4217 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4218 4219 memset(mb, 0, sizeof(mb)); 4220 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 4221 if (rval == QLA_SUCCESS) { 4222 /* Interrogate mailbox registers for any errors */ 4223 if (mb[0] == MBS_COMMAND_ERROR) 4224 rval = 1; 4225 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 4226 /* device not in PCB table */ 4227 rval = 3; 4228 } 4229 4230 return (rval); 4231 } 4232 4233 /* 4234 * qla2x00_loop_resync 4235 * Resync with fibre channel devices. 4236 * 4237 * Input: 4238 * ha = adapter block pointer. 4239 * 4240 * Returns: 4241 * 0 = success 4242 */ 4243 int 4244 qla2x00_loop_resync(scsi_qla_host_t *vha) 4245 { 4246 int rval = QLA_SUCCESS; 4247 uint32_t wait_time; 4248 struct req_que *req; 4249 struct rsp_que *rsp; 4250 4251 if (vha->hw->flags.cpu_affinity_enabled) 4252 req = vha->hw->req_q_map[0]; 4253 else 4254 req = vha->req; 4255 rsp = req->rsp; 4256 4257 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4258 if (vha->flags.online) { 4259 if (!(rval = qla2x00_fw_ready(vha))) { 4260 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 4261 wait_time = 256; 4262 do { 4263 if (!IS_QLAFX00(vha->hw)) { 4264 /* 4265 * Issue a marker after FW becomes 4266 * ready. 4267 */ 4268 qla2x00_marker(vha, req, rsp, 0, 0, 4269 MK_SYNC_ALL); 4270 vha->marker_needed = 0; 4271 } 4272 4273 /* Remap devices on Loop. */ 4274 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4275 4276 if (IS_QLAFX00(vha->hw)) 4277 qlafx00_configure_devices(vha); 4278 else 4279 qla2x00_configure_loop(vha); 4280 4281 wait_time--; 4282 } while (!atomic_read(&vha->loop_down_timer) && 4283 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4284 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 4285 &vha->dpc_flags))); 4286 } 4287 } 4288 4289 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4290 return (QLA_FUNCTION_FAILED); 4291 4292 if (rval) 4293 ql_dbg(ql_dbg_disc, vha, 0x206c, 4294 "%s *** FAILED ***.\n", __func__); 4295 4296 return (rval); 4297 } 4298 4299 /* 4300 * qla2x00_perform_loop_resync 4301 * Description: This function will set the appropriate flags and call 4302 * qla2x00_loop_resync. If successful loop will be resynced 4303 * Arguments : scsi_qla_host_t pointer 4304 * returm : Success or Failure 4305 */ 4306 4307 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 4308 { 4309 int32_t rval = 0; 4310 4311 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 4312 /*Configure the flags so that resync happens properly*/ 4313 atomic_set(&ha->loop_down_timer, 0); 4314 if (!(ha->device_flags & DFLG_NO_CABLE)) { 4315 atomic_set(&ha->loop_state, LOOP_UP); 4316 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 4317 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 4318 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 4319 4320 rval = qla2x00_loop_resync(ha); 4321 } else 4322 atomic_set(&ha->loop_state, LOOP_DEAD); 4323 4324 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 4325 } 4326 4327 return rval; 4328 } 4329 4330 void 4331 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 4332 { 4333 fc_port_t *fcport; 4334 struct scsi_qla_host *vha; 4335 struct qla_hw_data *ha = base_vha->hw; 4336 unsigned long flags; 4337 4338 spin_lock_irqsave(&ha->vport_slock, flags); 4339 /* Go with deferred removal of rport references. */ 4340 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 4341 atomic_inc(&vha->vref_count); 4342 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4343 if (fcport->drport && 4344 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 4345 spin_unlock_irqrestore(&ha->vport_slock, flags); 4346 qla2x00_rport_del(fcport); 4347 4348 /* 4349 * Release the target mode FC NEXUS in 4350 * qla_target.c, if target mod is enabled. 4351 */ 4352 qlt_fc_port_deleted(vha, fcport, 4353 base_vha->total_fcport_update_gen); 4354 4355 spin_lock_irqsave(&ha->vport_slock, flags); 4356 } 4357 } 4358 atomic_dec(&vha->vref_count); 4359 } 4360 spin_unlock_irqrestore(&ha->vport_slock, flags); 4361 } 4362 4363 /* Assumes idc_lock always held on entry */ 4364 void 4365 qla83xx_reset_ownership(scsi_qla_host_t *vha) 4366 { 4367 struct qla_hw_data *ha = vha->hw; 4368 uint32_t drv_presence, drv_presence_mask; 4369 uint32_t dev_part_info1, dev_part_info2, class_type; 4370 uint32_t class_type_mask = 0x3; 4371 uint16_t fcoe_other_function = 0xffff, i; 4372 4373 if (IS_QLA8044(ha)) { 4374 drv_presence = qla8044_rd_direct(vha, 4375 QLA8044_CRB_DRV_ACTIVE_INDEX); 4376 dev_part_info1 = qla8044_rd_direct(vha, 4377 QLA8044_CRB_DEV_PART_INFO_INDEX); 4378 dev_part_info2 = qla8044_rd_direct(vha, 4379 QLA8044_CRB_DEV_PART_INFO2); 4380 } else { 4381 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 4382 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 4383 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 4384 } 4385 for (i = 0; i < 8; i++) { 4386 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 4387 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 4388 (i != ha->portnum)) { 4389 fcoe_other_function = i; 4390 break; 4391 } 4392 } 4393 if (fcoe_other_function == 0xffff) { 4394 for (i = 0; i < 8; i++) { 4395 class_type = ((dev_part_info2 >> (i * 4)) & 4396 class_type_mask); 4397 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 4398 ((i + 8) != ha->portnum)) { 4399 fcoe_other_function = i + 8; 4400 break; 4401 } 4402 } 4403 } 4404 /* 4405 * Prepare drv-presence mask based on fcoe functions present. 4406 * However consider only valid physical fcoe function numbers (0-15). 4407 */ 4408 drv_presence_mask = ~((1 << (ha->portnum)) | 4409 ((fcoe_other_function == 0xffff) ? 4410 0 : (1 << (fcoe_other_function)))); 4411 4412 /* We are the reset owner iff: 4413 * - No other protocol drivers present. 4414 * - This is the lowest among fcoe functions. */ 4415 if (!(drv_presence & drv_presence_mask) && 4416 (ha->portnum < fcoe_other_function)) { 4417 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 4418 "This host is Reset owner.\n"); 4419 ha->flags.nic_core_reset_owner = 1; 4420 } 4421 } 4422 4423 static int 4424 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 4425 { 4426 int rval = QLA_SUCCESS; 4427 struct qla_hw_data *ha = vha->hw; 4428 uint32_t drv_ack; 4429 4430 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 4431 if (rval == QLA_SUCCESS) { 4432 drv_ack |= (1 << ha->portnum); 4433 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 4434 } 4435 4436 return rval; 4437 } 4438 4439 static int 4440 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 4441 { 4442 int rval = QLA_SUCCESS; 4443 struct qla_hw_data *ha = vha->hw; 4444 uint32_t drv_ack; 4445 4446 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 4447 if (rval == QLA_SUCCESS) { 4448 drv_ack &= ~(1 << ha->portnum); 4449 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 4450 } 4451 4452 return rval; 4453 } 4454 4455 static const char * 4456 qla83xx_dev_state_to_string(uint32_t dev_state) 4457 { 4458 switch (dev_state) { 4459 case QLA8XXX_DEV_COLD: 4460 return "COLD/RE-INIT"; 4461 case QLA8XXX_DEV_INITIALIZING: 4462 return "INITIALIZING"; 4463 case QLA8XXX_DEV_READY: 4464 return "READY"; 4465 case QLA8XXX_DEV_NEED_RESET: 4466 return "NEED RESET"; 4467 case QLA8XXX_DEV_NEED_QUIESCENT: 4468 return "NEED QUIESCENT"; 4469 case QLA8XXX_DEV_FAILED: 4470 return "FAILED"; 4471 case QLA8XXX_DEV_QUIESCENT: 4472 return "QUIESCENT"; 4473 default: 4474 return "Unknown"; 4475 } 4476 } 4477 4478 /* Assumes idc-lock always held on entry */ 4479 void 4480 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 4481 { 4482 struct qla_hw_data *ha = vha->hw; 4483 uint32_t idc_audit_reg = 0, duration_secs = 0; 4484 4485 switch (audit_type) { 4486 case IDC_AUDIT_TIMESTAMP: 4487 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 4488 idc_audit_reg = (ha->portnum) | 4489 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 4490 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 4491 break; 4492 4493 case IDC_AUDIT_COMPLETION: 4494 duration_secs = ((jiffies_to_msecs(jiffies) - 4495 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 4496 idc_audit_reg = (ha->portnum) | 4497 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 4498 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 4499 break; 4500 4501 default: 4502 ql_log(ql_log_warn, vha, 0xb078, 4503 "Invalid audit type specified.\n"); 4504 break; 4505 } 4506 } 4507 4508 /* Assumes idc_lock always held on entry */ 4509 static int 4510 qla83xx_initiating_reset(scsi_qla_host_t *vha) 4511 { 4512 struct qla_hw_data *ha = vha->hw; 4513 uint32_t idc_control, dev_state; 4514 4515 __qla83xx_get_idc_control(vha, &idc_control); 4516 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 4517 ql_log(ql_log_info, vha, 0xb080, 4518 "NIC Core reset has been disabled. idc-control=0x%x\n", 4519 idc_control); 4520 return QLA_FUNCTION_FAILED; 4521 } 4522 4523 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 4524 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 4525 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 4526 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 4527 QLA8XXX_DEV_NEED_RESET); 4528 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 4529 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 4530 } else { 4531 const char *state = qla83xx_dev_state_to_string(dev_state); 4532 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 4533 4534 /* SV: XXX: Is timeout required here? */ 4535 /* Wait for IDC state change READY -> NEED_RESET */ 4536 while (dev_state == QLA8XXX_DEV_READY) { 4537 qla83xx_idc_unlock(vha, 0); 4538 msleep(200); 4539 qla83xx_idc_lock(vha, 0); 4540 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 4541 } 4542 } 4543 4544 /* Send IDC ack by writing to drv-ack register */ 4545 __qla83xx_set_drv_ack(vha); 4546 4547 return QLA_SUCCESS; 4548 } 4549 4550 int 4551 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 4552 { 4553 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 4554 } 4555 4556 int 4557 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 4558 { 4559 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 4560 } 4561 4562 static int 4563 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 4564 { 4565 uint32_t drv_presence = 0; 4566 struct qla_hw_data *ha = vha->hw; 4567 4568 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 4569 if (drv_presence & (1 << ha->portnum)) 4570 return QLA_SUCCESS; 4571 else 4572 return QLA_TEST_FAILED; 4573 } 4574 4575 int 4576 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 4577 { 4578 int rval = QLA_SUCCESS; 4579 struct qla_hw_data *ha = vha->hw; 4580 4581 ql_dbg(ql_dbg_p3p, vha, 0xb058, 4582 "Entered %s().\n", __func__); 4583 4584 if (vha->device_flags & DFLG_DEV_FAILED) { 4585 ql_log(ql_log_warn, vha, 0xb059, 4586 "Device in unrecoverable FAILED state.\n"); 4587 return QLA_FUNCTION_FAILED; 4588 } 4589 4590 qla83xx_idc_lock(vha, 0); 4591 4592 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 4593 ql_log(ql_log_warn, vha, 0xb05a, 4594 "Function=0x%x has been removed from IDC participation.\n", 4595 ha->portnum); 4596 rval = QLA_FUNCTION_FAILED; 4597 goto exit; 4598 } 4599 4600 qla83xx_reset_ownership(vha); 4601 4602 rval = qla83xx_initiating_reset(vha); 4603 4604 /* 4605 * Perform reset if we are the reset-owner, 4606 * else wait till IDC state changes to READY/FAILED. 4607 */ 4608 if (rval == QLA_SUCCESS) { 4609 rval = qla83xx_idc_state_handler(vha); 4610 4611 if (rval == QLA_SUCCESS) 4612 ha->flags.nic_core_hung = 0; 4613 __qla83xx_clear_drv_ack(vha); 4614 } 4615 4616 exit: 4617 qla83xx_idc_unlock(vha, 0); 4618 4619 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 4620 4621 return rval; 4622 } 4623 4624 int 4625 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 4626 { 4627 struct qla_hw_data *ha = vha->hw; 4628 int rval = QLA_FUNCTION_FAILED; 4629 4630 if (!IS_MCTP_CAPABLE(ha)) { 4631 /* This message can be removed from the final version */ 4632 ql_log(ql_log_info, vha, 0x506d, 4633 "This board is not MCTP capable\n"); 4634 return rval; 4635 } 4636 4637 if (!ha->mctp_dump) { 4638 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 4639 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 4640 4641 if (!ha->mctp_dump) { 4642 ql_log(ql_log_warn, vha, 0x506e, 4643 "Failed to allocate memory for mctp dump\n"); 4644 return rval; 4645 } 4646 } 4647 4648 #define MCTP_DUMP_STR_ADDR 0x00000000 4649 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 4650 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 4651 if (rval != QLA_SUCCESS) { 4652 ql_log(ql_log_warn, vha, 0x506f, 4653 "Failed to capture mctp dump\n"); 4654 } else { 4655 ql_log(ql_log_info, vha, 0x5070, 4656 "Mctp dump capture for host (%ld/%p).\n", 4657 vha->host_no, ha->mctp_dump); 4658 ha->mctp_dumped = 1; 4659 } 4660 4661 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 4662 ha->flags.nic_core_reset_hdlr_active = 1; 4663 rval = qla83xx_restart_nic_firmware(vha); 4664 if (rval) 4665 /* NIC Core reset failed. */ 4666 ql_log(ql_log_warn, vha, 0x5071, 4667 "Failed to restart nic firmware\n"); 4668 else 4669 ql_dbg(ql_dbg_p3p, vha, 0xb084, 4670 "Restarted NIC firmware successfully.\n"); 4671 ha->flags.nic_core_reset_hdlr_active = 0; 4672 } 4673 4674 return rval; 4675 4676 } 4677 4678 /* 4679 * qla2x00_quiesce_io 4680 * Description: This function will block the new I/Os 4681 * Its not aborting any I/Os as context 4682 * is not destroyed during quiescence 4683 * Arguments: scsi_qla_host_t 4684 * return : void 4685 */ 4686 void 4687 qla2x00_quiesce_io(scsi_qla_host_t *vha) 4688 { 4689 struct qla_hw_data *ha = vha->hw; 4690 struct scsi_qla_host *vp; 4691 4692 ql_dbg(ql_dbg_dpc, vha, 0x401d, 4693 "Quiescing I/O - ha=%p.\n", ha); 4694 4695 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 4696 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 4697 atomic_set(&vha->loop_state, LOOP_DOWN); 4698 qla2x00_mark_all_devices_lost(vha, 0); 4699 list_for_each_entry(vp, &ha->vp_list, list) 4700 qla2x00_mark_all_devices_lost(vp, 0); 4701 } else { 4702 if (!atomic_read(&vha->loop_down_timer)) 4703 atomic_set(&vha->loop_down_timer, 4704 LOOP_DOWN_TIME); 4705 } 4706 /* Wait for pending cmds to complete */ 4707 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 4708 } 4709 4710 void 4711 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 4712 { 4713 struct qla_hw_data *ha = vha->hw; 4714 struct scsi_qla_host *vp; 4715 unsigned long flags; 4716 fc_port_t *fcport; 4717 4718 /* For ISP82XX, driver waits for completion of the commands. 4719 * online flag should be set. 4720 */ 4721 if (!(IS_P3P_TYPE(ha))) 4722 vha->flags.online = 0; 4723 ha->flags.chip_reset_done = 0; 4724 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4725 vha->qla_stats.total_isp_aborts++; 4726 4727 ql_log(ql_log_info, vha, 0x00af, 4728 "Performing ISP error recovery - ha=%p.\n", ha); 4729 4730 /* For ISP82XX, reset_chip is just disabling interrupts. 4731 * Driver waits for the completion of the commands. 4732 * the interrupts need to be enabled. 4733 */ 4734 if (!(IS_P3P_TYPE(ha))) 4735 ha->isp_ops->reset_chip(vha); 4736 4737 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 4738 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 4739 atomic_set(&vha->loop_state, LOOP_DOWN); 4740 qla2x00_mark_all_devices_lost(vha, 0); 4741 4742 spin_lock_irqsave(&ha->vport_slock, flags); 4743 list_for_each_entry(vp, &ha->vp_list, list) { 4744 atomic_inc(&vp->vref_count); 4745 spin_unlock_irqrestore(&ha->vport_slock, flags); 4746 4747 qla2x00_mark_all_devices_lost(vp, 0); 4748 4749 spin_lock_irqsave(&ha->vport_slock, flags); 4750 atomic_dec(&vp->vref_count); 4751 } 4752 spin_unlock_irqrestore(&ha->vport_slock, flags); 4753 } else { 4754 if (!atomic_read(&vha->loop_down_timer)) 4755 atomic_set(&vha->loop_down_timer, 4756 LOOP_DOWN_TIME); 4757 } 4758 4759 /* Clear all async request states across all VPs. */ 4760 list_for_each_entry(fcport, &vha->vp_fcports, list) 4761 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4762 spin_lock_irqsave(&ha->vport_slock, flags); 4763 list_for_each_entry(vp, &ha->vp_list, list) { 4764 atomic_inc(&vp->vref_count); 4765 spin_unlock_irqrestore(&ha->vport_slock, flags); 4766 4767 list_for_each_entry(fcport, &vp->vp_fcports, list) 4768 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4769 4770 spin_lock_irqsave(&ha->vport_slock, flags); 4771 atomic_dec(&vp->vref_count); 4772 } 4773 spin_unlock_irqrestore(&ha->vport_slock, flags); 4774 4775 if (!ha->flags.eeh_busy) { 4776 /* Make sure for ISP 82XX IO DMA is complete */ 4777 if (IS_P3P_TYPE(ha)) { 4778 qla82xx_chip_reset_cleanup(vha); 4779 ql_log(ql_log_info, vha, 0x00b4, 4780 "Done chip reset cleanup.\n"); 4781 4782 /* Done waiting for pending commands. 4783 * Reset the online flag. 4784 */ 4785 vha->flags.online = 0; 4786 } 4787 4788 /* Requeue all commands in outstanding command list. */ 4789 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 4790 } 4791 4792 ha->chip_reset++; 4793 /* memory barrier */ 4794 wmb(); 4795 } 4796 4797 /* 4798 * qla2x00_abort_isp 4799 * Resets ISP and aborts all outstanding commands. 4800 * 4801 * Input: 4802 * ha = adapter block pointer. 4803 * 4804 * Returns: 4805 * 0 = success 4806 */ 4807 int 4808 qla2x00_abort_isp(scsi_qla_host_t *vha) 4809 { 4810 int rval; 4811 uint8_t status = 0; 4812 struct qla_hw_data *ha = vha->hw; 4813 struct scsi_qla_host *vp; 4814 struct req_que *req = ha->req_q_map[0]; 4815 unsigned long flags; 4816 4817 if (vha->flags.online) { 4818 qla2x00_abort_isp_cleanup(vha); 4819 4820 if (IS_QLA8031(ha)) { 4821 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 4822 "Clearing fcoe driver presence.\n"); 4823 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 4824 ql_dbg(ql_dbg_p3p, vha, 0xb073, 4825 "Error while clearing DRV-Presence.\n"); 4826 } 4827 4828 if (unlikely(pci_channel_offline(ha->pdev) && 4829 ha->flags.pci_channel_io_perm_failure)) { 4830 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4831 status = 0; 4832 return status; 4833 } 4834 4835 ha->isp_ops->get_flash_version(vha, req->ring); 4836 4837 ha->isp_ops->nvram_config(vha); 4838 4839 if (!qla2x00_restart_isp(vha)) { 4840 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4841 4842 if (!atomic_read(&vha->loop_down_timer)) { 4843 /* 4844 * Issue marker command only when we are going 4845 * to start the I/O . 4846 */ 4847 vha->marker_needed = 1; 4848 } 4849 4850 vha->flags.online = 1; 4851 4852 ha->isp_ops->enable_intrs(ha); 4853 4854 ha->isp_abort_cnt = 0; 4855 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4856 4857 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 4858 qla2x00_get_fw_version(vha); 4859 if (ha->fce) { 4860 ha->flags.fce_enabled = 1; 4861 memset(ha->fce, 0, 4862 fce_calc_size(ha->fce_bufs)); 4863 rval = qla2x00_enable_fce_trace(vha, 4864 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 4865 &ha->fce_bufs); 4866 if (rval) { 4867 ql_log(ql_log_warn, vha, 0x8033, 4868 "Unable to reinitialize FCE " 4869 "(%d).\n", rval); 4870 ha->flags.fce_enabled = 0; 4871 } 4872 } 4873 4874 if (ha->eft) { 4875 memset(ha->eft, 0, EFT_SIZE); 4876 rval = qla2x00_enable_eft_trace(vha, 4877 ha->eft_dma, EFT_NUM_BUFFERS); 4878 if (rval) { 4879 ql_log(ql_log_warn, vha, 0x8034, 4880 "Unable to reinitialize EFT " 4881 "(%d).\n", rval); 4882 } 4883 } 4884 } else { /* failed the ISP abort */ 4885 vha->flags.online = 1; 4886 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 4887 if (ha->isp_abort_cnt == 0) { 4888 ql_log(ql_log_fatal, vha, 0x8035, 4889 "ISP error recover failed - " 4890 "board disabled.\n"); 4891 /* 4892 * The next call disables the board 4893 * completely. 4894 */ 4895 ha->isp_ops->reset_adapter(vha); 4896 vha->flags.online = 0; 4897 clear_bit(ISP_ABORT_RETRY, 4898 &vha->dpc_flags); 4899 status = 0; 4900 } else { /* schedule another ISP abort */ 4901 ha->isp_abort_cnt--; 4902 ql_dbg(ql_dbg_taskm, vha, 0x8020, 4903 "ISP abort - retry remaining %d.\n", 4904 ha->isp_abort_cnt); 4905 status = 1; 4906 } 4907 } else { 4908 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 4909 ql_dbg(ql_dbg_taskm, vha, 0x8021, 4910 "ISP error recovery - retrying (%d) " 4911 "more times.\n", ha->isp_abort_cnt); 4912 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4913 status = 1; 4914 } 4915 } 4916 4917 } 4918 4919 if (!status) { 4920 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 4921 4922 spin_lock_irqsave(&ha->vport_slock, flags); 4923 list_for_each_entry(vp, &ha->vp_list, list) { 4924 if (vp->vp_idx) { 4925 atomic_inc(&vp->vref_count); 4926 spin_unlock_irqrestore(&ha->vport_slock, flags); 4927 4928 qla2x00_vp_abort_isp(vp); 4929 4930 spin_lock_irqsave(&ha->vport_slock, flags); 4931 atomic_dec(&vp->vref_count); 4932 } 4933 } 4934 spin_unlock_irqrestore(&ha->vport_slock, flags); 4935 4936 if (IS_QLA8031(ha)) { 4937 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 4938 "Setting back fcoe driver presence.\n"); 4939 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 4940 ql_dbg(ql_dbg_p3p, vha, 0xb074, 4941 "Error while setting DRV-Presence.\n"); 4942 } 4943 } else { 4944 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 4945 __func__); 4946 } 4947 4948 return(status); 4949 } 4950 4951 /* 4952 * qla2x00_restart_isp 4953 * restarts the ISP after a reset 4954 * 4955 * Input: 4956 * ha = adapter block pointer. 4957 * 4958 * Returns: 4959 * 0 = success 4960 */ 4961 static int 4962 qla2x00_restart_isp(scsi_qla_host_t *vha) 4963 { 4964 int status = 0; 4965 struct qla_hw_data *ha = vha->hw; 4966 struct req_que *req = ha->req_q_map[0]; 4967 struct rsp_que *rsp = ha->rsp_q_map[0]; 4968 4969 /* If firmware needs to be loaded */ 4970 if (qla2x00_isp_firmware(vha)) { 4971 vha->flags.online = 0; 4972 status = ha->isp_ops->chip_diag(vha); 4973 if (!status) 4974 status = qla2x00_setup_chip(vha); 4975 } 4976 4977 if (!status && !(status = qla2x00_init_rings(vha))) { 4978 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4979 ha->flags.chip_reset_done = 1; 4980 4981 /* Initialize the queues in use */ 4982 qla25xx_init_queues(ha); 4983 4984 status = qla2x00_fw_ready(vha); 4985 if (!status) { 4986 /* Issue a marker after FW becomes ready. */ 4987 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 4988 4989 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4990 } 4991 4992 /* if no cable then assume it's good */ 4993 if ((vha->device_flags & DFLG_NO_CABLE)) 4994 status = 0; 4995 } 4996 return (status); 4997 } 4998 4999 static int 5000 qla25xx_init_queues(struct qla_hw_data *ha) 5001 { 5002 struct rsp_que *rsp = NULL; 5003 struct req_que *req = NULL; 5004 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5005 int ret = -1; 5006 int i; 5007 5008 for (i = 1; i < ha->max_rsp_queues; i++) { 5009 rsp = ha->rsp_q_map[i]; 5010 if (rsp && test_bit(i, ha->rsp_qid_map)) { 5011 rsp->options &= ~BIT_0; 5012 ret = qla25xx_init_rsp_que(base_vha, rsp); 5013 if (ret != QLA_SUCCESS) 5014 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 5015 "%s Rsp que: %d init failed.\n", 5016 __func__, rsp->id); 5017 else 5018 ql_dbg(ql_dbg_init, base_vha, 0x0100, 5019 "%s Rsp que: %d inited.\n", 5020 __func__, rsp->id); 5021 } 5022 } 5023 for (i = 1; i < ha->max_req_queues; i++) { 5024 req = ha->req_q_map[i]; 5025 if (req && test_bit(i, ha->req_qid_map)) { 5026 /* Clear outstanding commands array. */ 5027 req->options &= ~BIT_0; 5028 ret = qla25xx_init_req_que(base_vha, req); 5029 if (ret != QLA_SUCCESS) 5030 ql_dbg(ql_dbg_init, base_vha, 0x0101, 5031 "%s Req que: %d init failed.\n", 5032 __func__, req->id); 5033 else 5034 ql_dbg(ql_dbg_init, base_vha, 0x0102, 5035 "%s Req que: %d inited.\n", 5036 __func__, req->id); 5037 } 5038 } 5039 return ret; 5040 } 5041 5042 /* 5043 * qla2x00_reset_adapter 5044 * Reset adapter. 5045 * 5046 * Input: 5047 * ha = adapter block pointer. 5048 */ 5049 void 5050 qla2x00_reset_adapter(scsi_qla_host_t *vha) 5051 { 5052 unsigned long flags = 0; 5053 struct qla_hw_data *ha = vha->hw; 5054 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 5055 5056 vha->flags.online = 0; 5057 ha->isp_ops->disable_intrs(ha); 5058 5059 spin_lock_irqsave(&ha->hardware_lock, flags); 5060 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 5061 RD_REG_WORD(®->hccr); /* PCI Posting. */ 5062 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 5063 RD_REG_WORD(®->hccr); /* PCI Posting. */ 5064 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5065 } 5066 5067 void 5068 qla24xx_reset_adapter(scsi_qla_host_t *vha) 5069 { 5070 unsigned long flags = 0; 5071 struct qla_hw_data *ha = vha->hw; 5072 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 5073 5074 if (IS_P3P_TYPE(ha)) 5075 return; 5076 5077 vha->flags.online = 0; 5078 ha->isp_ops->disable_intrs(ha); 5079 5080 spin_lock_irqsave(&ha->hardware_lock, flags); 5081 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 5082 RD_REG_DWORD(®->hccr); 5083 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 5084 RD_REG_DWORD(®->hccr); 5085 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5086 5087 if (IS_NOPOLLING_TYPE(ha)) 5088 ha->isp_ops->enable_intrs(ha); 5089 } 5090 5091 /* On sparc systems, obtain port and node WWN from firmware 5092 * properties. 5093 */ 5094 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 5095 struct nvram_24xx *nv) 5096 { 5097 #ifdef CONFIG_SPARC 5098 struct qla_hw_data *ha = vha->hw; 5099 struct pci_dev *pdev = ha->pdev; 5100 struct device_node *dp = pci_device_to_OF_node(pdev); 5101 const u8 *val; 5102 int len; 5103 5104 val = of_get_property(dp, "port-wwn", &len); 5105 if (val && len >= WWN_SIZE) 5106 memcpy(nv->port_name, val, WWN_SIZE); 5107 5108 val = of_get_property(dp, "node-wwn", &len); 5109 if (val && len >= WWN_SIZE) 5110 memcpy(nv->node_name, val, WWN_SIZE); 5111 #endif 5112 } 5113 5114 int 5115 qla24xx_nvram_config(scsi_qla_host_t *vha) 5116 { 5117 int rval; 5118 struct init_cb_24xx *icb; 5119 struct nvram_24xx *nv; 5120 uint32_t *dptr; 5121 uint8_t *dptr1, *dptr2; 5122 uint32_t chksum; 5123 uint16_t cnt; 5124 struct qla_hw_data *ha = vha->hw; 5125 5126 rval = QLA_SUCCESS; 5127 icb = (struct init_cb_24xx *)ha->init_cb; 5128 nv = ha->nvram; 5129 5130 /* Determine NVRAM starting address. */ 5131 if (ha->port_no == 0) { 5132 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 5133 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 5134 } else { 5135 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 5136 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 5137 } 5138 5139 ha->nvram_size = sizeof(struct nvram_24xx); 5140 ha->vpd_size = FA_NVRAM_VPD_SIZE; 5141 5142 /* Get VPD data into cache */ 5143 ha->vpd = ha->nvram + VPD_OFFSET; 5144 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 5145 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 5146 5147 /* Get NVRAM data into cache and calculate checksum. */ 5148 dptr = (uint32_t *)nv; 5149 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 5150 ha->nvram_size); 5151 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 5152 chksum += le32_to_cpu(*dptr); 5153 5154 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 5155 "Contents of NVRAM\n"); 5156 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 5157 (uint8_t *)nv, ha->nvram_size); 5158 5159 /* Bad NVRAM data, set defaults parameters. */ 5160 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 5161 || nv->id[3] != ' ' || 5162 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 5163 /* Reset NVRAM data. */ 5164 ql_log(ql_log_warn, vha, 0x006b, 5165 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 5166 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 5167 ql_log(ql_log_warn, vha, 0x006c, 5168 "Falling back to functioning (yet invalid -- WWPN) " 5169 "defaults.\n"); 5170 5171 /* 5172 * Set default initialization control block. 5173 */ 5174 memset(nv, 0, ha->nvram_size); 5175 nv->nvram_version = cpu_to_le16(ICB_VERSION); 5176 nv->version = cpu_to_le16(ICB_VERSION); 5177 nv->frame_payload_size = 2048; 5178 nv->execution_throttle = cpu_to_le16(0xFFFF); 5179 nv->exchange_count = cpu_to_le16(0); 5180 nv->hard_address = cpu_to_le16(124); 5181 nv->port_name[0] = 0x21; 5182 nv->port_name[1] = 0x00 + ha->port_no + 1; 5183 nv->port_name[2] = 0x00; 5184 nv->port_name[3] = 0xe0; 5185 nv->port_name[4] = 0x8b; 5186 nv->port_name[5] = 0x1c; 5187 nv->port_name[6] = 0x55; 5188 nv->port_name[7] = 0x86; 5189 nv->node_name[0] = 0x20; 5190 nv->node_name[1] = 0x00; 5191 nv->node_name[2] = 0x00; 5192 nv->node_name[3] = 0xe0; 5193 nv->node_name[4] = 0x8b; 5194 nv->node_name[5] = 0x1c; 5195 nv->node_name[6] = 0x55; 5196 nv->node_name[7] = 0x86; 5197 qla24xx_nvram_wwn_from_ofw(vha, nv); 5198 nv->login_retry_count = cpu_to_le16(8); 5199 nv->interrupt_delay_timer = cpu_to_le16(0); 5200 nv->login_timeout = cpu_to_le16(0); 5201 nv->firmware_options_1 = 5202 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 5203 nv->firmware_options_2 = cpu_to_le32(2 << 4); 5204 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 5205 nv->firmware_options_3 = cpu_to_le32(2 << 13); 5206 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 5207 nv->efi_parameters = cpu_to_le32(0); 5208 nv->reset_delay = 5; 5209 nv->max_luns_per_target = cpu_to_le16(128); 5210 nv->port_down_retry_count = cpu_to_le16(30); 5211 nv->link_down_timeout = cpu_to_le16(30); 5212 5213 rval = 1; 5214 } 5215 5216 if (!qla_ini_mode_enabled(vha)) { 5217 /* Don't enable full login after initial LIP */ 5218 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 5219 /* Don't enable LIP full login for initiator */ 5220 nv->host_p &= cpu_to_le32(~BIT_10); 5221 } 5222 5223 qlt_24xx_config_nvram_stage1(vha, nv); 5224 5225 /* Reset Initialization control block */ 5226 memset(icb, 0, ha->init_cb_size); 5227 5228 /* Copy 1st segment. */ 5229 dptr1 = (uint8_t *)icb; 5230 dptr2 = (uint8_t *)&nv->version; 5231 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 5232 while (cnt--) 5233 *dptr1++ = *dptr2++; 5234 5235 icb->login_retry_count = nv->login_retry_count; 5236 icb->link_down_on_nos = nv->link_down_on_nos; 5237 5238 /* Copy 2nd segment. */ 5239 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 5240 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 5241 cnt = (uint8_t *)&icb->reserved_3 - 5242 (uint8_t *)&icb->interrupt_delay_timer; 5243 while (cnt--) 5244 *dptr1++ = *dptr2++; 5245 5246 /* 5247 * Setup driver NVRAM options. 5248 */ 5249 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 5250 "QLA2462"); 5251 5252 qlt_24xx_config_nvram_stage2(vha, icb); 5253 5254 if (nv->host_p & cpu_to_le32(BIT_15)) { 5255 /* Use alternate WWN? */ 5256 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5257 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5258 } 5259 5260 /* Prepare nodename */ 5261 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 5262 /* 5263 * Firmware will apply the following mask if the nodename was 5264 * not provided. 5265 */ 5266 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5267 icb->node_name[0] &= 0xF0; 5268 } 5269 5270 /* Set host adapter parameters. */ 5271 ha->flags.disable_risc_code_load = 0; 5272 ha->flags.enable_lip_reset = 0; 5273 ha->flags.enable_lip_full_login = 5274 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 5275 ha->flags.enable_target_reset = 5276 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 5277 ha->flags.enable_led_scheme = 0; 5278 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 5279 5280 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 5281 (BIT_6 | BIT_5 | BIT_4)) >> 4; 5282 5283 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 5284 sizeof(ha->fw_seriallink_options24)); 5285 5286 /* save HBA serial number */ 5287 ha->serial0 = icb->port_name[5]; 5288 ha->serial1 = icb->port_name[6]; 5289 ha->serial2 = icb->port_name[7]; 5290 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5291 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5292 5293 icb->execution_throttle = cpu_to_le16(0xFFFF); 5294 5295 ha->retry_count = le16_to_cpu(nv->login_retry_count); 5296 5297 /* Set minimum login_timeout to 4 seconds. */ 5298 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 5299 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 5300 if (le16_to_cpu(nv->login_timeout) < 4) 5301 nv->login_timeout = cpu_to_le16(4); 5302 ha->login_timeout = le16_to_cpu(nv->login_timeout); 5303 5304 /* Set minimum RATOV to 100 tenths of a second. */ 5305 ha->r_a_tov = 100; 5306 5307 ha->loop_reset_delay = nv->reset_delay; 5308 5309 /* Link Down Timeout = 0: 5310 * 5311 * When Port Down timer expires we will start returning 5312 * I/O's to OS with "DID_NO_CONNECT". 5313 * 5314 * Link Down Timeout != 0: 5315 * 5316 * The driver waits for the link to come up after link down 5317 * before returning I/Os to OS with "DID_NO_CONNECT". 5318 */ 5319 if (le16_to_cpu(nv->link_down_timeout) == 0) { 5320 ha->loop_down_abort_time = 5321 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5322 } else { 5323 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 5324 ha->loop_down_abort_time = 5325 (LOOP_DOWN_TIME - ha->link_down_timeout); 5326 } 5327 5328 /* Need enough time to try and get the port back. */ 5329 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 5330 if (qlport_down_retry) 5331 ha->port_down_retry_count = qlport_down_retry; 5332 5333 /* Set login_retry_count */ 5334 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 5335 if (ha->port_down_retry_count == 5336 le16_to_cpu(nv->port_down_retry_count) && 5337 ha->port_down_retry_count > 3) 5338 ha->login_retry_count = ha->port_down_retry_count; 5339 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5340 ha->login_retry_count = ha->port_down_retry_count; 5341 if (ql2xloginretrycount) 5342 ha->login_retry_count = ql2xloginretrycount; 5343 5344 /* Enable ZIO. */ 5345 if (!vha->flags.init_done) { 5346 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 5347 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5348 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 5349 le16_to_cpu(icb->interrupt_delay_timer): 2; 5350 } 5351 icb->firmware_options_2 &= cpu_to_le32( 5352 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 5353 vha->flags.process_response_queue = 0; 5354 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5355 ha->zio_mode = QLA_ZIO_MODE_6; 5356 5357 ql_log(ql_log_info, vha, 0x006f, 5358 "ZIO mode %d enabled; timer delay (%d us).\n", 5359 ha->zio_mode, ha->zio_timer * 100); 5360 5361 icb->firmware_options_2 |= cpu_to_le32( 5362 (uint32_t)ha->zio_mode); 5363 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 5364 vha->flags.process_response_queue = 1; 5365 } 5366 5367 if (rval) { 5368 ql_log(ql_log_warn, vha, 0x0070, 5369 "NVRAM configuration failed.\n"); 5370 } 5371 return (rval); 5372 } 5373 5374 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 5375 { 5376 struct qla27xx_image_status pri_image_status, sec_image_status; 5377 uint8_t valid_pri_image, valid_sec_image; 5378 uint32_t *wptr; 5379 uint32_t cnt, chksum, size; 5380 struct qla_hw_data *ha = vha->hw; 5381 5382 valid_pri_image = valid_sec_image = 1; 5383 ha->active_image = 0; 5384 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 5385 5386 if (!ha->flt_region_img_status_pri) { 5387 valid_pri_image = 0; 5388 goto check_sec_image; 5389 } 5390 5391 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 5392 ha->flt_region_img_status_pri, size); 5393 5394 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 5395 ql_dbg(ql_dbg_init, vha, 0x018b, 5396 "Primary image signature (0x%x) not valid\n", 5397 pri_image_status.signature); 5398 valid_pri_image = 0; 5399 goto check_sec_image; 5400 } 5401 5402 wptr = (uint32_t *)(&pri_image_status); 5403 cnt = size; 5404 5405 for (chksum = 0; cnt--; wptr++) 5406 chksum += le32_to_cpu(*wptr); 5407 if (chksum) { 5408 ql_dbg(ql_dbg_init, vha, 0x018c, 5409 "Checksum validation failed for primary image (0x%x)\n", 5410 chksum); 5411 valid_pri_image = 0; 5412 } 5413 5414 check_sec_image: 5415 if (!ha->flt_region_img_status_sec) { 5416 valid_sec_image = 0; 5417 goto check_valid_image; 5418 } 5419 5420 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 5421 ha->flt_region_img_status_sec, size); 5422 5423 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 5424 ql_dbg(ql_dbg_init, vha, 0x018d, 5425 "Secondary image signature(0x%x) not valid\n", 5426 sec_image_status.signature); 5427 valid_sec_image = 0; 5428 goto check_valid_image; 5429 } 5430 5431 wptr = (uint32_t *)(&sec_image_status); 5432 cnt = size; 5433 for (chksum = 0; cnt--; wptr++) 5434 chksum += le32_to_cpu(*wptr); 5435 if (chksum) { 5436 ql_dbg(ql_dbg_init, vha, 0x018e, 5437 "Checksum validation failed for secondary image (0x%x)\n", 5438 chksum); 5439 valid_sec_image = 0; 5440 } 5441 5442 check_valid_image: 5443 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 5444 ha->active_image = QLA27XX_PRIMARY_IMAGE; 5445 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 5446 if (!ha->active_image || 5447 pri_image_status.generation_number < 5448 sec_image_status.generation_number) 5449 ha->active_image = QLA27XX_SECONDARY_IMAGE; 5450 } 5451 5452 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n", 5453 ha->active_image == 0 ? "default bootld and fw" : 5454 ha->active_image == 1 ? "primary" : 5455 ha->active_image == 2 ? "secondary" : 5456 "Invalid"); 5457 5458 return ha->active_image; 5459 } 5460 5461 static int 5462 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 5463 uint32_t faddr) 5464 { 5465 int rval = QLA_SUCCESS; 5466 int segments, fragment; 5467 uint32_t *dcode, dlen; 5468 uint32_t risc_addr; 5469 uint32_t risc_size; 5470 uint32_t i; 5471 struct qla_hw_data *ha = vha->hw; 5472 struct req_que *req = ha->req_q_map[0]; 5473 5474 ql_dbg(ql_dbg_init, vha, 0x008b, 5475 "FW: Loading firmware from flash (%x).\n", faddr); 5476 5477 rval = QLA_SUCCESS; 5478 5479 segments = FA_RISC_CODE_SEGMENTS; 5480 dcode = (uint32_t *)req->ring; 5481 *srisc_addr = 0; 5482 5483 if (IS_QLA27XX(ha) && 5484 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 5485 faddr = ha->flt_region_fw_sec; 5486 5487 /* Validate firmware image by checking version. */ 5488 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 5489 for (i = 0; i < 4; i++) 5490 dcode[i] = be32_to_cpu(dcode[i]); 5491 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 5492 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 5493 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 5494 dcode[3] == 0)) { 5495 ql_log(ql_log_fatal, vha, 0x008c, 5496 "Unable to verify the integrity of flash firmware " 5497 "image.\n"); 5498 ql_log(ql_log_fatal, vha, 0x008d, 5499 "Firmware data: %08x %08x %08x %08x.\n", 5500 dcode[0], dcode[1], dcode[2], dcode[3]); 5501 5502 return QLA_FUNCTION_FAILED; 5503 } 5504 5505 while (segments && rval == QLA_SUCCESS) { 5506 /* Read segment's load information. */ 5507 qla24xx_read_flash_data(vha, dcode, faddr, 4); 5508 5509 risc_addr = be32_to_cpu(dcode[2]); 5510 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 5511 risc_size = be32_to_cpu(dcode[3]); 5512 5513 fragment = 0; 5514 while (risc_size > 0 && rval == QLA_SUCCESS) { 5515 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 5516 if (dlen > risc_size) 5517 dlen = risc_size; 5518 5519 ql_dbg(ql_dbg_init, vha, 0x008e, 5520 "Loading risc segment@ risc addr %x " 5521 "number of dwords 0x%x offset 0x%x.\n", 5522 risc_addr, dlen, faddr); 5523 5524 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 5525 for (i = 0; i < dlen; i++) 5526 dcode[i] = swab32(dcode[i]); 5527 5528 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5529 dlen); 5530 if (rval) { 5531 ql_log(ql_log_fatal, vha, 0x008f, 5532 "Failed to load segment %d of firmware.\n", 5533 fragment); 5534 return QLA_FUNCTION_FAILED; 5535 } 5536 5537 faddr += dlen; 5538 risc_addr += dlen; 5539 risc_size -= dlen; 5540 fragment++; 5541 } 5542 5543 /* Next segment. */ 5544 segments--; 5545 } 5546 5547 if (!IS_QLA27XX(ha)) 5548 return rval; 5549 5550 if (ha->fw_dump_template) 5551 vfree(ha->fw_dump_template); 5552 ha->fw_dump_template = NULL; 5553 ha->fw_dump_template_len = 0; 5554 5555 ql_dbg(ql_dbg_init, vha, 0x0161, 5556 "Loading fwdump template from %x\n", faddr); 5557 qla24xx_read_flash_data(vha, dcode, faddr, 7); 5558 risc_size = be32_to_cpu(dcode[2]); 5559 ql_dbg(ql_dbg_init, vha, 0x0162, 5560 "-> array size %x dwords\n", risc_size); 5561 if (risc_size == 0 || risc_size == ~0) 5562 goto default_template; 5563 5564 dlen = (risc_size - 8) * sizeof(*dcode); 5565 ql_dbg(ql_dbg_init, vha, 0x0163, 5566 "-> template allocating %x bytes...\n", dlen); 5567 ha->fw_dump_template = vmalloc(dlen); 5568 if (!ha->fw_dump_template) { 5569 ql_log(ql_log_warn, vha, 0x0164, 5570 "Failed fwdump template allocate %x bytes.\n", risc_size); 5571 goto default_template; 5572 } 5573 5574 faddr += 7; 5575 risc_size -= 8; 5576 dcode = ha->fw_dump_template; 5577 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 5578 for (i = 0; i < risc_size; i++) 5579 dcode[i] = le32_to_cpu(dcode[i]); 5580 5581 if (!qla27xx_fwdt_template_valid(dcode)) { 5582 ql_log(ql_log_warn, vha, 0x0165, 5583 "Failed fwdump template validate\n"); 5584 goto default_template; 5585 } 5586 5587 dlen = qla27xx_fwdt_template_size(dcode); 5588 ql_dbg(ql_dbg_init, vha, 0x0166, 5589 "-> template size %x bytes\n", dlen); 5590 if (dlen > risc_size * sizeof(*dcode)) { 5591 ql_log(ql_log_warn, vha, 0x0167, 5592 "Failed fwdump template exceeds array by %x bytes\n", 5593 (uint32_t)(dlen - risc_size * sizeof(*dcode))); 5594 goto default_template; 5595 } 5596 ha->fw_dump_template_len = dlen; 5597 return rval; 5598 5599 default_template: 5600 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 5601 if (ha->fw_dump_template) 5602 vfree(ha->fw_dump_template); 5603 ha->fw_dump_template = NULL; 5604 ha->fw_dump_template_len = 0; 5605 5606 dlen = qla27xx_fwdt_template_default_size(); 5607 ql_dbg(ql_dbg_init, vha, 0x0169, 5608 "-> template allocating %x bytes...\n", dlen); 5609 ha->fw_dump_template = vmalloc(dlen); 5610 if (!ha->fw_dump_template) { 5611 ql_log(ql_log_warn, vha, 0x016a, 5612 "Failed fwdump template allocate %x bytes.\n", risc_size); 5613 goto failed_template; 5614 } 5615 5616 dcode = ha->fw_dump_template; 5617 risc_size = dlen / sizeof(*dcode); 5618 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 5619 for (i = 0; i < risc_size; i++) 5620 dcode[i] = be32_to_cpu(dcode[i]); 5621 5622 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 5623 ql_log(ql_log_warn, vha, 0x016b, 5624 "Failed fwdump template validate\n"); 5625 goto failed_template; 5626 } 5627 5628 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 5629 ql_dbg(ql_dbg_init, vha, 0x016c, 5630 "-> template size %x bytes\n", dlen); 5631 ha->fw_dump_template_len = dlen; 5632 return rval; 5633 5634 failed_template: 5635 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 5636 if (ha->fw_dump_template) 5637 vfree(ha->fw_dump_template); 5638 ha->fw_dump_template = NULL; 5639 ha->fw_dump_template_len = 0; 5640 return rval; 5641 } 5642 5643 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 5644 5645 int 5646 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5647 { 5648 int rval; 5649 int i, fragment; 5650 uint16_t *wcode, *fwcode; 5651 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 5652 struct fw_blob *blob; 5653 struct qla_hw_data *ha = vha->hw; 5654 struct req_que *req = ha->req_q_map[0]; 5655 5656 /* Load firmware blob. */ 5657 blob = qla2x00_request_firmware(vha); 5658 if (!blob) { 5659 ql_log(ql_log_info, vha, 0x0083, 5660 "Firmware image unavailable.\n"); 5661 ql_log(ql_log_info, vha, 0x0084, 5662 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 5663 return QLA_FUNCTION_FAILED; 5664 } 5665 5666 rval = QLA_SUCCESS; 5667 5668 wcode = (uint16_t *)req->ring; 5669 *srisc_addr = 0; 5670 fwcode = (uint16_t *)blob->fw->data; 5671 fwclen = 0; 5672 5673 /* Validate firmware image by checking version. */ 5674 if (blob->fw->size < 8 * sizeof(uint16_t)) { 5675 ql_log(ql_log_fatal, vha, 0x0085, 5676 "Unable to verify integrity of firmware image (%Zd).\n", 5677 blob->fw->size); 5678 goto fail_fw_integrity; 5679 } 5680 for (i = 0; i < 4; i++) 5681 wcode[i] = be16_to_cpu(fwcode[i + 4]); 5682 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 5683 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 5684 wcode[2] == 0 && wcode[3] == 0)) { 5685 ql_log(ql_log_fatal, vha, 0x0086, 5686 "Unable to verify integrity of firmware image.\n"); 5687 ql_log(ql_log_fatal, vha, 0x0087, 5688 "Firmware data: %04x %04x %04x %04x.\n", 5689 wcode[0], wcode[1], wcode[2], wcode[3]); 5690 goto fail_fw_integrity; 5691 } 5692 5693 seg = blob->segs; 5694 while (*seg && rval == QLA_SUCCESS) { 5695 risc_addr = *seg; 5696 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 5697 risc_size = be16_to_cpu(fwcode[3]); 5698 5699 /* Validate firmware image size. */ 5700 fwclen += risc_size * sizeof(uint16_t); 5701 if (blob->fw->size < fwclen) { 5702 ql_log(ql_log_fatal, vha, 0x0088, 5703 "Unable to verify integrity of firmware image " 5704 "(%Zd).\n", blob->fw->size); 5705 goto fail_fw_integrity; 5706 } 5707 5708 fragment = 0; 5709 while (risc_size > 0 && rval == QLA_SUCCESS) { 5710 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 5711 if (wlen > risc_size) 5712 wlen = risc_size; 5713 ql_dbg(ql_dbg_init, vha, 0x0089, 5714 "Loading risc segment@ risc addr %x number of " 5715 "words 0x%x.\n", risc_addr, wlen); 5716 5717 for (i = 0; i < wlen; i++) 5718 wcode[i] = swab16(fwcode[i]); 5719 5720 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5721 wlen); 5722 if (rval) { 5723 ql_log(ql_log_fatal, vha, 0x008a, 5724 "Failed to load segment %d of firmware.\n", 5725 fragment); 5726 break; 5727 } 5728 5729 fwcode += wlen; 5730 risc_addr += wlen; 5731 risc_size -= wlen; 5732 fragment++; 5733 } 5734 5735 /* Next segment. */ 5736 seg++; 5737 } 5738 return rval; 5739 5740 fail_fw_integrity: 5741 return QLA_FUNCTION_FAILED; 5742 } 5743 5744 static int 5745 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5746 { 5747 int rval; 5748 int segments, fragment; 5749 uint32_t *dcode, dlen; 5750 uint32_t risc_addr; 5751 uint32_t risc_size; 5752 uint32_t i; 5753 struct fw_blob *blob; 5754 const uint32_t *fwcode; 5755 uint32_t fwclen; 5756 struct qla_hw_data *ha = vha->hw; 5757 struct req_que *req = ha->req_q_map[0]; 5758 5759 /* Load firmware blob. */ 5760 blob = qla2x00_request_firmware(vha); 5761 if (!blob) { 5762 ql_log(ql_log_warn, vha, 0x0090, 5763 "Firmware image unavailable.\n"); 5764 ql_log(ql_log_warn, vha, 0x0091, 5765 "Firmware images can be retrieved from: " 5766 QLA_FW_URL ".\n"); 5767 5768 return QLA_FUNCTION_FAILED; 5769 } 5770 5771 ql_dbg(ql_dbg_init, vha, 0x0092, 5772 "FW: Loading via request-firmware.\n"); 5773 5774 rval = QLA_SUCCESS; 5775 5776 segments = FA_RISC_CODE_SEGMENTS; 5777 dcode = (uint32_t *)req->ring; 5778 *srisc_addr = 0; 5779 fwcode = (uint32_t *)blob->fw->data; 5780 fwclen = 0; 5781 5782 /* Validate firmware image by checking version. */ 5783 if (blob->fw->size < 8 * sizeof(uint32_t)) { 5784 ql_log(ql_log_fatal, vha, 0x0093, 5785 "Unable to verify integrity of firmware image (%Zd).\n", 5786 blob->fw->size); 5787 return QLA_FUNCTION_FAILED; 5788 } 5789 for (i = 0; i < 4; i++) 5790 dcode[i] = be32_to_cpu(fwcode[i + 4]); 5791 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 5792 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 5793 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 5794 dcode[3] == 0)) { 5795 ql_log(ql_log_fatal, vha, 0x0094, 5796 "Unable to verify integrity of firmware image (%Zd).\n", 5797 blob->fw->size); 5798 ql_log(ql_log_fatal, vha, 0x0095, 5799 "Firmware data: %08x %08x %08x %08x.\n", 5800 dcode[0], dcode[1], dcode[2], dcode[3]); 5801 return QLA_FUNCTION_FAILED; 5802 } 5803 5804 while (segments && rval == QLA_SUCCESS) { 5805 risc_addr = be32_to_cpu(fwcode[2]); 5806 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 5807 risc_size = be32_to_cpu(fwcode[3]); 5808 5809 /* Validate firmware image size. */ 5810 fwclen += risc_size * sizeof(uint32_t); 5811 if (blob->fw->size < fwclen) { 5812 ql_log(ql_log_fatal, vha, 0x0096, 5813 "Unable to verify integrity of firmware image " 5814 "(%Zd).\n", blob->fw->size); 5815 return QLA_FUNCTION_FAILED; 5816 } 5817 5818 fragment = 0; 5819 while (risc_size > 0 && rval == QLA_SUCCESS) { 5820 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 5821 if (dlen > risc_size) 5822 dlen = risc_size; 5823 5824 ql_dbg(ql_dbg_init, vha, 0x0097, 5825 "Loading risc segment@ risc addr %x " 5826 "number of dwords 0x%x.\n", risc_addr, dlen); 5827 5828 for (i = 0; i < dlen; i++) 5829 dcode[i] = swab32(fwcode[i]); 5830 5831 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5832 dlen); 5833 if (rval) { 5834 ql_log(ql_log_fatal, vha, 0x0098, 5835 "Failed to load segment %d of firmware.\n", 5836 fragment); 5837 return QLA_FUNCTION_FAILED; 5838 } 5839 5840 fwcode += dlen; 5841 risc_addr += dlen; 5842 risc_size -= dlen; 5843 fragment++; 5844 } 5845 5846 /* Next segment. */ 5847 segments--; 5848 } 5849 5850 if (!IS_QLA27XX(ha)) 5851 return rval; 5852 5853 if (ha->fw_dump_template) 5854 vfree(ha->fw_dump_template); 5855 ha->fw_dump_template = NULL; 5856 ha->fw_dump_template_len = 0; 5857 5858 ql_dbg(ql_dbg_init, vha, 0x171, 5859 "Loading fwdump template from %x\n", 5860 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 5861 risc_size = be32_to_cpu(fwcode[2]); 5862 ql_dbg(ql_dbg_init, vha, 0x172, 5863 "-> array size %x dwords\n", risc_size); 5864 if (risc_size == 0 || risc_size == ~0) 5865 goto default_template; 5866 5867 dlen = (risc_size - 8) * sizeof(*fwcode); 5868 ql_dbg(ql_dbg_init, vha, 0x0173, 5869 "-> template allocating %x bytes...\n", dlen); 5870 ha->fw_dump_template = vmalloc(dlen); 5871 if (!ha->fw_dump_template) { 5872 ql_log(ql_log_warn, vha, 0x0174, 5873 "Failed fwdump template allocate %x bytes.\n", risc_size); 5874 goto default_template; 5875 } 5876 5877 fwcode += 7; 5878 risc_size -= 8; 5879 dcode = ha->fw_dump_template; 5880 for (i = 0; i < risc_size; i++) 5881 dcode[i] = le32_to_cpu(fwcode[i]); 5882 5883 if (!qla27xx_fwdt_template_valid(dcode)) { 5884 ql_log(ql_log_warn, vha, 0x0175, 5885 "Failed fwdump template validate\n"); 5886 goto default_template; 5887 } 5888 5889 dlen = qla27xx_fwdt_template_size(dcode); 5890 ql_dbg(ql_dbg_init, vha, 0x0176, 5891 "-> template size %x bytes\n", dlen); 5892 if (dlen > risc_size * sizeof(*fwcode)) { 5893 ql_log(ql_log_warn, vha, 0x0177, 5894 "Failed fwdump template exceeds array by %x bytes\n", 5895 (uint32_t)(dlen - risc_size * sizeof(*fwcode))); 5896 goto default_template; 5897 } 5898 ha->fw_dump_template_len = dlen; 5899 return rval; 5900 5901 default_template: 5902 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 5903 if (ha->fw_dump_template) 5904 vfree(ha->fw_dump_template); 5905 ha->fw_dump_template = NULL; 5906 ha->fw_dump_template_len = 0; 5907 5908 dlen = qla27xx_fwdt_template_default_size(); 5909 ql_dbg(ql_dbg_init, vha, 0x0179, 5910 "-> template allocating %x bytes...\n", dlen); 5911 ha->fw_dump_template = vmalloc(dlen); 5912 if (!ha->fw_dump_template) { 5913 ql_log(ql_log_warn, vha, 0x017a, 5914 "Failed fwdump template allocate %x bytes.\n", risc_size); 5915 goto failed_template; 5916 } 5917 5918 dcode = ha->fw_dump_template; 5919 risc_size = dlen / sizeof(*fwcode); 5920 fwcode = qla27xx_fwdt_template_default(); 5921 for (i = 0; i < risc_size; i++) 5922 dcode[i] = be32_to_cpu(fwcode[i]); 5923 5924 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 5925 ql_log(ql_log_warn, vha, 0x017b, 5926 "Failed fwdump template validate\n"); 5927 goto failed_template; 5928 } 5929 5930 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 5931 ql_dbg(ql_dbg_init, vha, 0x017c, 5932 "-> template size %x bytes\n", dlen); 5933 ha->fw_dump_template_len = dlen; 5934 return rval; 5935 5936 failed_template: 5937 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 5938 if (ha->fw_dump_template) 5939 vfree(ha->fw_dump_template); 5940 ha->fw_dump_template = NULL; 5941 ha->fw_dump_template_len = 0; 5942 return rval; 5943 } 5944 5945 int 5946 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5947 { 5948 int rval; 5949 5950 if (ql2xfwloadbin == 1) 5951 return qla81xx_load_risc(vha, srisc_addr); 5952 5953 /* 5954 * FW Load priority: 5955 * 1) Firmware via request-firmware interface (.bin file). 5956 * 2) Firmware residing in flash. 5957 */ 5958 rval = qla24xx_load_risc_blob(vha, srisc_addr); 5959 if (rval == QLA_SUCCESS) 5960 return rval; 5961 5962 return qla24xx_load_risc_flash(vha, srisc_addr, 5963 vha->hw->flt_region_fw); 5964 } 5965 5966 int 5967 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5968 { 5969 int rval; 5970 struct qla_hw_data *ha = vha->hw; 5971 5972 if (ql2xfwloadbin == 2) 5973 goto try_blob_fw; 5974 5975 /* 5976 * FW Load priority: 5977 * 1) Firmware residing in flash. 5978 * 2) Firmware via request-firmware interface (.bin file). 5979 * 3) Golden-Firmware residing in flash -- limited operation. 5980 */ 5981 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 5982 if (rval == QLA_SUCCESS) 5983 return rval; 5984 5985 try_blob_fw: 5986 rval = qla24xx_load_risc_blob(vha, srisc_addr); 5987 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 5988 return rval; 5989 5990 ql_log(ql_log_info, vha, 0x0099, 5991 "Attempting to fallback to golden firmware.\n"); 5992 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 5993 if (rval != QLA_SUCCESS) 5994 return rval; 5995 5996 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 5997 ha->flags.running_gold_fw = 1; 5998 return rval; 5999 } 6000 6001 void 6002 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 6003 { 6004 int ret, retries; 6005 struct qla_hw_data *ha = vha->hw; 6006 6007 if (ha->flags.pci_channel_io_perm_failure) 6008 return; 6009 if (!IS_FWI2_CAPABLE(ha)) 6010 return; 6011 if (!ha->fw_major_version) 6012 return; 6013 6014 ret = qla2x00_stop_firmware(vha); 6015 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 6016 ret != QLA_INVALID_COMMAND && retries ; retries--) { 6017 ha->isp_ops->reset_chip(vha); 6018 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 6019 continue; 6020 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 6021 continue; 6022 ql_log(ql_log_info, vha, 0x8015, 6023 "Attempting retry of stop-firmware command.\n"); 6024 ret = qla2x00_stop_firmware(vha); 6025 } 6026 } 6027 6028 int 6029 qla24xx_configure_vhba(scsi_qla_host_t *vha) 6030 { 6031 int rval = QLA_SUCCESS; 6032 int rval2; 6033 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6034 struct qla_hw_data *ha = vha->hw; 6035 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6036 struct req_que *req; 6037 struct rsp_que *rsp; 6038 6039 if (!vha->vp_idx) 6040 return -EINVAL; 6041 6042 rval = qla2x00_fw_ready(base_vha); 6043 if (ha->flags.cpu_affinity_enabled) 6044 req = ha->req_q_map[0]; 6045 else 6046 req = vha->req; 6047 rsp = req->rsp; 6048 6049 if (rval == QLA_SUCCESS) { 6050 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6051 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6052 } 6053 6054 vha->flags.management_server_logged_in = 0; 6055 6056 /* Login to SNS first */ 6057 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 6058 BIT_1); 6059 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 6060 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 6061 ql_dbg(ql_dbg_init, vha, 0x0120, 6062 "Failed SNS login: loop_id=%x, rval2=%d\n", 6063 NPH_SNS, rval2); 6064 else 6065 ql_dbg(ql_dbg_init, vha, 0x0103, 6066 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 6067 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 6068 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 6069 return (QLA_FUNCTION_FAILED); 6070 } 6071 6072 atomic_set(&vha->loop_down_timer, 0); 6073 atomic_set(&vha->loop_state, LOOP_UP); 6074 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6075 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 6076 rval = qla2x00_loop_resync(base_vha); 6077 6078 return rval; 6079 } 6080 6081 /* 84XX Support **************************************************************/ 6082 6083 static LIST_HEAD(qla_cs84xx_list); 6084 static DEFINE_MUTEX(qla_cs84xx_mutex); 6085 6086 static struct qla_chip_state_84xx * 6087 qla84xx_get_chip(struct scsi_qla_host *vha) 6088 { 6089 struct qla_chip_state_84xx *cs84xx; 6090 struct qla_hw_data *ha = vha->hw; 6091 6092 mutex_lock(&qla_cs84xx_mutex); 6093 6094 /* Find any shared 84xx chip. */ 6095 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 6096 if (cs84xx->bus == ha->pdev->bus) { 6097 kref_get(&cs84xx->kref); 6098 goto done; 6099 } 6100 } 6101 6102 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 6103 if (!cs84xx) 6104 goto done; 6105 6106 kref_init(&cs84xx->kref); 6107 spin_lock_init(&cs84xx->access_lock); 6108 mutex_init(&cs84xx->fw_update_mutex); 6109 cs84xx->bus = ha->pdev->bus; 6110 6111 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 6112 done: 6113 mutex_unlock(&qla_cs84xx_mutex); 6114 return cs84xx; 6115 } 6116 6117 static void 6118 __qla84xx_chip_release(struct kref *kref) 6119 { 6120 struct qla_chip_state_84xx *cs84xx = 6121 container_of(kref, struct qla_chip_state_84xx, kref); 6122 6123 mutex_lock(&qla_cs84xx_mutex); 6124 list_del(&cs84xx->list); 6125 mutex_unlock(&qla_cs84xx_mutex); 6126 kfree(cs84xx); 6127 } 6128 6129 void 6130 qla84xx_put_chip(struct scsi_qla_host *vha) 6131 { 6132 struct qla_hw_data *ha = vha->hw; 6133 if (ha->cs84xx) 6134 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 6135 } 6136 6137 static int 6138 qla84xx_init_chip(scsi_qla_host_t *vha) 6139 { 6140 int rval; 6141 uint16_t status[2]; 6142 struct qla_hw_data *ha = vha->hw; 6143 6144 mutex_lock(&ha->cs84xx->fw_update_mutex); 6145 6146 rval = qla84xx_verify_chip(vha, status); 6147 6148 mutex_unlock(&ha->cs84xx->fw_update_mutex); 6149 6150 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 6151 QLA_SUCCESS; 6152 } 6153 6154 /* 81XX Support **************************************************************/ 6155 6156 int 6157 qla81xx_nvram_config(scsi_qla_host_t *vha) 6158 { 6159 int rval; 6160 struct init_cb_81xx *icb; 6161 struct nvram_81xx *nv; 6162 uint32_t *dptr; 6163 uint8_t *dptr1, *dptr2; 6164 uint32_t chksum; 6165 uint16_t cnt; 6166 struct qla_hw_data *ha = vha->hw; 6167 6168 rval = QLA_SUCCESS; 6169 icb = (struct init_cb_81xx *)ha->init_cb; 6170 nv = ha->nvram; 6171 6172 /* Determine NVRAM starting address. */ 6173 ha->nvram_size = sizeof(struct nvram_81xx); 6174 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6175 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 6176 ha->vpd_size = FA_VPD_SIZE_82XX; 6177 6178 /* Get VPD data into cache */ 6179 ha->vpd = ha->nvram + VPD_OFFSET; 6180 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 6181 ha->vpd_size); 6182 6183 /* Get NVRAM data into cache and calculate checksum. */ 6184 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 6185 ha->nvram_size); 6186 dptr = (uint32_t *)nv; 6187 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6188 chksum += le32_to_cpu(*dptr); 6189 6190 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 6191 "Contents of NVRAM:\n"); 6192 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 6193 (uint8_t *)nv, ha->nvram_size); 6194 6195 /* Bad NVRAM data, set defaults parameters. */ 6196 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6197 || nv->id[3] != ' ' || 6198 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6199 /* Reset NVRAM data. */ 6200 ql_log(ql_log_info, vha, 0x0073, 6201 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6202 "version=0x%x.\n", chksum, nv->id[0], 6203 le16_to_cpu(nv->nvram_version)); 6204 ql_log(ql_log_info, vha, 0x0074, 6205 "Falling back to functioning (yet invalid -- WWPN) " 6206 "defaults.\n"); 6207 6208 /* 6209 * Set default initialization control block. 6210 */ 6211 memset(nv, 0, ha->nvram_size); 6212 nv->nvram_version = cpu_to_le16(ICB_VERSION); 6213 nv->version = cpu_to_le16(ICB_VERSION); 6214 nv->frame_payload_size = 2048; 6215 nv->execution_throttle = cpu_to_le16(0xFFFF); 6216 nv->exchange_count = cpu_to_le16(0); 6217 nv->port_name[0] = 0x21; 6218 nv->port_name[1] = 0x00 + ha->port_no + 1; 6219 nv->port_name[2] = 0x00; 6220 nv->port_name[3] = 0xe0; 6221 nv->port_name[4] = 0x8b; 6222 nv->port_name[5] = 0x1c; 6223 nv->port_name[6] = 0x55; 6224 nv->port_name[7] = 0x86; 6225 nv->node_name[0] = 0x20; 6226 nv->node_name[1] = 0x00; 6227 nv->node_name[2] = 0x00; 6228 nv->node_name[3] = 0xe0; 6229 nv->node_name[4] = 0x8b; 6230 nv->node_name[5] = 0x1c; 6231 nv->node_name[6] = 0x55; 6232 nv->node_name[7] = 0x86; 6233 nv->login_retry_count = cpu_to_le16(8); 6234 nv->interrupt_delay_timer = cpu_to_le16(0); 6235 nv->login_timeout = cpu_to_le16(0); 6236 nv->firmware_options_1 = 6237 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6238 nv->firmware_options_2 = cpu_to_le32(2 << 4); 6239 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 6240 nv->firmware_options_3 = cpu_to_le32(2 << 13); 6241 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 6242 nv->efi_parameters = cpu_to_le32(0); 6243 nv->reset_delay = 5; 6244 nv->max_luns_per_target = cpu_to_le16(128); 6245 nv->port_down_retry_count = cpu_to_le16(30); 6246 nv->link_down_timeout = cpu_to_le16(180); 6247 nv->enode_mac[0] = 0x00; 6248 nv->enode_mac[1] = 0xC0; 6249 nv->enode_mac[2] = 0xDD; 6250 nv->enode_mac[3] = 0x04; 6251 nv->enode_mac[4] = 0x05; 6252 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 6253 6254 rval = 1; 6255 } 6256 6257 if (IS_T10_PI_CAPABLE(ha)) 6258 nv->frame_payload_size &= ~7; 6259 6260 qlt_81xx_config_nvram_stage1(vha, nv); 6261 6262 /* Reset Initialization control block */ 6263 memset(icb, 0, ha->init_cb_size); 6264 6265 /* Copy 1st segment. */ 6266 dptr1 = (uint8_t *)icb; 6267 dptr2 = (uint8_t *)&nv->version; 6268 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6269 while (cnt--) 6270 *dptr1++ = *dptr2++; 6271 6272 icb->login_retry_count = nv->login_retry_count; 6273 6274 /* Copy 2nd segment. */ 6275 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6276 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6277 cnt = (uint8_t *)&icb->reserved_5 - 6278 (uint8_t *)&icb->interrupt_delay_timer; 6279 while (cnt--) 6280 *dptr1++ = *dptr2++; 6281 6282 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 6283 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 6284 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 6285 icb->enode_mac[0] = 0x00; 6286 icb->enode_mac[1] = 0xC0; 6287 icb->enode_mac[2] = 0xDD; 6288 icb->enode_mac[3] = 0x04; 6289 icb->enode_mac[4] = 0x05; 6290 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 6291 } 6292 6293 /* Use extended-initialization control block. */ 6294 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 6295 6296 /* 6297 * Setup driver NVRAM options. 6298 */ 6299 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6300 "QLE8XXX"); 6301 6302 qlt_81xx_config_nvram_stage2(vha, icb); 6303 6304 /* Use alternate WWN? */ 6305 if (nv->host_p & cpu_to_le32(BIT_15)) { 6306 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6307 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6308 } 6309 6310 /* Prepare nodename */ 6311 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 6312 /* 6313 * Firmware will apply the following mask if the nodename was 6314 * not provided. 6315 */ 6316 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6317 icb->node_name[0] &= 0xF0; 6318 } 6319 6320 /* Set host adapter parameters. */ 6321 ha->flags.disable_risc_code_load = 0; 6322 ha->flags.enable_lip_reset = 0; 6323 ha->flags.enable_lip_full_login = 6324 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6325 ha->flags.enable_target_reset = 6326 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6327 ha->flags.enable_led_scheme = 0; 6328 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6329 6330 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6331 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6332 6333 /* save HBA serial number */ 6334 ha->serial0 = icb->port_name[5]; 6335 ha->serial1 = icb->port_name[6]; 6336 ha->serial2 = icb->port_name[7]; 6337 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6338 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6339 6340 icb->execution_throttle = cpu_to_le16(0xFFFF); 6341 6342 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6343 6344 /* Set minimum login_timeout to 4 seconds. */ 6345 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6346 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6347 if (le16_to_cpu(nv->login_timeout) < 4) 6348 nv->login_timeout = cpu_to_le16(4); 6349 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6350 6351 /* Set minimum RATOV to 100 tenths of a second. */ 6352 ha->r_a_tov = 100; 6353 6354 ha->loop_reset_delay = nv->reset_delay; 6355 6356 /* Link Down Timeout = 0: 6357 * 6358 * When Port Down timer expires we will start returning 6359 * I/O's to OS with "DID_NO_CONNECT". 6360 * 6361 * Link Down Timeout != 0: 6362 * 6363 * The driver waits for the link to come up after link down 6364 * before returning I/Os to OS with "DID_NO_CONNECT". 6365 */ 6366 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6367 ha->loop_down_abort_time = 6368 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6369 } else { 6370 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6371 ha->loop_down_abort_time = 6372 (LOOP_DOWN_TIME - ha->link_down_timeout); 6373 } 6374 6375 /* Need enough time to try and get the port back. */ 6376 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6377 if (qlport_down_retry) 6378 ha->port_down_retry_count = qlport_down_retry; 6379 6380 /* Set login_retry_count */ 6381 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6382 if (ha->port_down_retry_count == 6383 le16_to_cpu(nv->port_down_retry_count) && 6384 ha->port_down_retry_count > 3) 6385 ha->login_retry_count = ha->port_down_retry_count; 6386 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6387 ha->login_retry_count = ha->port_down_retry_count; 6388 if (ql2xloginretrycount) 6389 ha->login_retry_count = ql2xloginretrycount; 6390 6391 /* if not running MSI-X we need handshaking on interrupts */ 6392 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 6393 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 6394 6395 /* Enable ZIO. */ 6396 if (!vha->flags.init_done) { 6397 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6398 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6399 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6400 le16_to_cpu(icb->interrupt_delay_timer): 2; 6401 } 6402 icb->firmware_options_2 &= cpu_to_le32( 6403 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6404 vha->flags.process_response_queue = 0; 6405 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6406 ha->zio_mode = QLA_ZIO_MODE_6; 6407 6408 ql_log(ql_log_info, vha, 0x0075, 6409 "ZIO mode %d enabled; timer delay (%d us).\n", 6410 ha->zio_mode, 6411 ha->zio_timer * 100); 6412 6413 icb->firmware_options_2 |= cpu_to_le32( 6414 (uint32_t)ha->zio_mode); 6415 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6416 vha->flags.process_response_queue = 1; 6417 } 6418 6419 if (rval) { 6420 ql_log(ql_log_warn, vha, 0x0076, 6421 "NVRAM configuration failed.\n"); 6422 } 6423 return (rval); 6424 } 6425 6426 int 6427 qla82xx_restart_isp(scsi_qla_host_t *vha) 6428 { 6429 int status, rval; 6430 struct qla_hw_data *ha = vha->hw; 6431 struct req_que *req = ha->req_q_map[0]; 6432 struct rsp_que *rsp = ha->rsp_q_map[0]; 6433 struct scsi_qla_host *vp; 6434 unsigned long flags; 6435 6436 status = qla2x00_init_rings(vha); 6437 if (!status) { 6438 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6439 ha->flags.chip_reset_done = 1; 6440 6441 status = qla2x00_fw_ready(vha); 6442 if (!status) { 6443 /* Issue a marker after FW becomes ready. */ 6444 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6445 vha->flags.online = 1; 6446 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6447 } 6448 6449 /* if no cable then assume it's good */ 6450 if ((vha->device_flags & DFLG_NO_CABLE)) 6451 status = 0; 6452 } 6453 6454 if (!status) { 6455 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6456 6457 if (!atomic_read(&vha->loop_down_timer)) { 6458 /* 6459 * Issue marker command only when we are going 6460 * to start the I/O . 6461 */ 6462 vha->marker_needed = 1; 6463 } 6464 6465 ha->isp_ops->enable_intrs(ha); 6466 6467 ha->isp_abort_cnt = 0; 6468 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6469 6470 /* Update the firmware version */ 6471 status = qla82xx_check_md_needed(vha); 6472 6473 if (ha->fce) { 6474 ha->flags.fce_enabled = 1; 6475 memset(ha->fce, 0, 6476 fce_calc_size(ha->fce_bufs)); 6477 rval = qla2x00_enable_fce_trace(vha, 6478 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6479 &ha->fce_bufs); 6480 if (rval) { 6481 ql_log(ql_log_warn, vha, 0x8001, 6482 "Unable to reinitialize FCE (%d).\n", 6483 rval); 6484 ha->flags.fce_enabled = 0; 6485 } 6486 } 6487 6488 if (ha->eft) { 6489 memset(ha->eft, 0, EFT_SIZE); 6490 rval = qla2x00_enable_eft_trace(vha, 6491 ha->eft_dma, EFT_NUM_BUFFERS); 6492 if (rval) { 6493 ql_log(ql_log_warn, vha, 0x8010, 6494 "Unable to reinitialize EFT (%d).\n", 6495 rval); 6496 } 6497 } 6498 } 6499 6500 if (!status) { 6501 ql_dbg(ql_dbg_taskm, vha, 0x8011, 6502 "qla82xx_restart_isp succeeded.\n"); 6503 6504 spin_lock_irqsave(&ha->vport_slock, flags); 6505 list_for_each_entry(vp, &ha->vp_list, list) { 6506 if (vp->vp_idx) { 6507 atomic_inc(&vp->vref_count); 6508 spin_unlock_irqrestore(&ha->vport_slock, flags); 6509 6510 qla2x00_vp_abort_isp(vp); 6511 6512 spin_lock_irqsave(&ha->vport_slock, flags); 6513 atomic_dec(&vp->vref_count); 6514 } 6515 } 6516 spin_unlock_irqrestore(&ha->vport_slock, flags); 6517 6518 } else { 6519 ql_log(ql_log_warn, vha, 0x8016, 6520 "qla82xx_restart_isp **** FAILED ****.\n"); 6521 } 6522 6523 return status; 6524 } 6525 6526 void 6527 qla81xx_update_fw_options(scsi_qla_host_t *vha) 6528 { 6529 struct qla_hw_data *ha = vha->hw; 6530 6531 /* Hold status IOCBs until ABTS response received. */ 6532 if (ql2xfwholdabts) 6533 ha->fw_options[3] |= BIT_12; 6534 6535 /* Set Retry FLOGI in case of P2P connection */ 6536 if (ha->operating_mode == P2P) { 6537 ha->fw_options[2] |= BIT_3; 6538 ql_dbg(ql_dbg_disc, vha, 0x2103, 6539 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 6540 __func__, ha->fw_options[2]); 6541 } 6542 6543 if (!ql2xetsenable) 6544 goto out; 6545 6546 /* Enable ETS Burst. */ 6547 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 6548 ha->fw_options[2] |= BIT_9; 6549 out: 6550 qla2x00_set_fw_options(vha, ha->fw_options); 6551 } 6552 6553 /* 6554 * qla24xx_get_fcp_prio 6555 * Gets the fcp cmd priority value for the logged in port. 6556 * Looks for a match of the port descriptors within 6557 * each of the fcp prio config entries. If a match is found, 6558 * the tag (priority) value is returned. 6559 * 6560 * Input: 6561 * vha = scsi host structure pointer. 6562 * fcport = port structure pointer. 6563 * 6564 * Return: 6565 * non-zero (if found) 6566 * -1 (if not found) 6567 * 6568 * Context: 6569 * Kernel context 6570 */ 6571 static int 6572 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 6573 { 6574 int i, entries; 6575 uint8_t pid_match, wwn_match; 6576 int priority; 6577 uint32_t pid1, pid2; 6578 uint64_t wwn1, wwn2; 6579 struct qla_fcp_prio_entry *pri_entry; 6580 struct qla_hw_data *ha = vha->hw; 6581 6582 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 6583 return -1; 6584 6585 priority = -1; 6586 entries = ha->fcp_prio_cfg->num_entries; 6587 pri_entry = &ha->fcp_prio_cfg->entry[0]; 6588 6589 for (i = 0; i < entries; i++) { 6590 pid_match = wwn_match = 0; 6591 6592 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 6593 pri_entry++; 6594 continue; 6595 } 6596 6597 /* check source pid for a match */ 6598 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 6599 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 6600 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 6601 if (pid1 == INVALID_PORT_ID) 6602 pid_match++; 6603 else if (pid1 == pid2) 6604 pid_match++; 6605 } 6606 6607 /* check destination pid for a match */ 6608 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 6609 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 6610 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 6611 if (pid1 == INVALID_PORT_ID) 6612 pid_match++; 6613 else if (pid1 == pid2) 6614 pid_match++; 6615 } 6616 6617 /* check source WWN for a match */ 6618 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 6619 wwn1 = wwn_to_u64(vha->port_name); 6620 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 6621 if (wwn2 == (uint64_t)-1) 6622 wwn_match++; 6623 else if (wwn1 == wwn2) 6624 wwn_match++; 6625 } 6626 6627 /* check destination WWN for a match */ 6628 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 6629 wwn1 = wwn_to_u64(fcport->port_name); 6630 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 6631 if (wwn2 == (uint64_t)-1) 6632 wwn_match++; 6633 else if (wwn1 == wwn2) 6634 wwn_match++; 6635 } 6636 6637 if (pid_match == 2 || wwn_match == 2) { 6638 /* Found a matching entry */ 6639 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 6640 priority = pri_entry->tag; 6641 break; 6642 } 6643 6644 pri_entry++; 6645 } 6646 6647 return priority; 6648 } 6649 6650 /* 6651 * qla24xx_update_fcport_fcp_prio 6652 * Activates fcp priority for the logged in fc port 6653 * 6654 * Input: 6655 * vha = scsi host structure pointer. 6656 * fcp = port structure pointer. 6657 * 6658 * Return: 6659 * QLA_SUCCESS or QLA_FUNCTION_FAILED 6660 * 6661 * Context: 6662 * Kernel context. 6663 */ 6664 int 6665 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 6666 { 6667 int ret; 6668 int priority; 6669 uint16_t mb[5]; 6670 6671 if (fcport->port_type != FCT_TARGET || 6672 fcport->loop_id == FC_NO_LOOP_ID) 6673 return QLA_FUNCTION_FAILED; 6674 6675 priority = qla24xx_get_fcp_prio(vha, fcport); 6676 if (priority < 0) 6677 return QLA_FUNCTION_FAILED; 6678 6679 if (IS_P3P_TYPE(vha->hw)) { 6680 fcport->fcp_prio = priority & 0xf; 6681 return QLA_SUCCESS; 6682 } 6683 6684 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 6685 if (ret == QLA_SUCCESS) { 6686 if (fcport->fcp_prio != priority) 6687 ql_dbg(ql_dbg_user, vha, 0x709e, 6688 "Updated FCP_CMND priority - value=%d loop_id=%d " 6689 "port_id=%02x%02x%02x.\n", priority, 6690 fcport->loop_id, fcport->d_id.b.domain, 6691 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6692 fcport->fcp_prio = priority & 0xf; 6693 } else 6694 ql_dbg(ql_dbg_user, vha, 0x704f, 6695 "Unable to update FCP_CMND priority - ret=0x%x for " 6696 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 6697 fcport->d_id.b.domain, fcport->d_id.b.area, 6698 fcport->d_id.b.al_pa); 6699 return ret; 6700 } 6701 6702 /* 6703 * qla24xx_update_all_fcp_prio 6704 * Activates fcp priority for all the logged in ports 6705 * 6706 * Input: 6707 * ha = adapter block pointer. 6708 * 6709 * Return: 6710 * QLA_SUCCESS or QLA_FUNCTION_FAILED 6711 * 6712 * Context: 6713 * Kernel context. 6714 */ 6715 int 6716 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 6717 { 6718 int ret; 6719 fc_port_t *fcport; 6720 6721 ret = QLA_FUNCTION_FAILED; 6722 /* We need to set priority for all logged in ports */ 6723 list_for_each_entry(fcport, &vha->vp_fcports, list) 6724 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 6725 6726 return ret; 6727 } 6728