1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 struct req_que *req; 54 unsigned long flags; 55 56 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 57 req = sp->qpair->req; 58 req->outstanding_cmds[sp->handle] = NULL; 59 iocb = &sp->u.iocb_cmd; 60 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 61 iocb->timeout(sp); 62 } 63 64 void 65 qla2x00_sp_free(void *ptr) 66 { 67 srb_t *sp = ptr; 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 69 70 del_timer(&iocb->timer); 71 qla2x00_rel_sp(sp); 72 } 73 74 /* Asynchronous Login/Logout Routines -------------------------------------- */ 75 76 unsigned long 77 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 78 { 79 unsigned long tmo; 80 struct qla_hw_data *ha = vha->hw; 81 82 /* Firmware should use switch negotiated r_a_tov for timeout. */ 83 tmo = ha->r_a_tov / 10 * 2; 84 if (IS_QLAFX00(ha)) { 85 tmo = FX00_DEF_RATOV * 2; 86 } else if (!IS_FWI2_CAPABLE(ha)) { 87 /* 88 * Except for earlier ISPs where the timeout is seeded from the 89 * initialization control block. 90 */ 91 tmo = ha->login_timeout; 92 } 93 return tmo; 94 } 95 96 void 97 qla2x00_async_iocb_timeout(void *data) 98 { 99 srb_t *sp = data; 100 fc_port_t *fcport = sp->fcport; 101 struct srb_iocb *lio = &sp->u.iocb_cmd; 102 int rc, h; 103 unsigned long flags; 104 105 if (fcport) { 106 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 107 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 108 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 109 110 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 111 } else { 112 pr_info("Async-%s timeout - hdl=%x.\n", 113 sp->name, sp->handle); 114 } 115 116 switch (sp->type) { 117 case SRB_LOGIN_CMD: 118 rc = qla24xx_async_abort_cmd(sp, false); 119 if (rc) { 120 /* Retry as needed. */ 121 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 122 lio->u.logio.data[1] = 123 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 124 QLA_LOGIO_LOGIN_RETRIED : 0; 125 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 126 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 127 h++) { 128 if (sp->qpair->req->outstanding_cmds[h] == 129 sp) { 130 sp->qpair->req->outstanding_cmds[h] = 131 NULL; 132 break; 133 } 134 } 135 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 136 sp->done(sp, QLA_FUNCTION_TIMEOUT); 137 } 138 break; 139 case SRB_LOGOUT_CMD: 140 case SRB_CT_PTHRU_CMD: 141 case SRB_MB_IOCB: 142 case SRB_NACK_PLOGI: 143 case SRB_NACK_PRLI: 144 case SRB_NACK_LOGO: 145 case SRB_CTRL_VP: 146 rc = qla24xx_async_abort_cmd(sp, false); 147 if (rc) { 148 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 149 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 150 h++) { 151 if (sp->qpair->req->outstanding_cmds[h] == 152 sp) { 153 sp->qpair->req->outstanding_cmds[h] = 154 NULL; 155 break; 156 } 157 } 158 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 159 sp->done(sp, QLA_FUNCTION_TIMEOUT); 160 } 161 break; 162 } 163 } 164 165 static void 166 qla2x00_async_login_sp_done(void *ptr, int res) 167 { 168 srb_t *sp = ptr; 169 struct scsi_qla_host *vha = sp->vha; 170 struct srb_iocb *lio = &sp->u.iocb_cmd; 171 struct event_arg ea; 172 173 ql_dbg(ql_dbg_disc, vha, 0x20dd, 174 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 175 176 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 177 178 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 179 memset(&ea, 0, sizeof(ea)); 180 ea.event = FCME_PLOGI_DONE; 181 ea.fcport = sp->fcport; 182 ea.data[0] = lio->u.logio.data[0]; 183 ea.data[1] = lio->u.logio.data[1]; 184 ea.iop[0] = lio->u.logio.iop[0]; 185 ea.iop[1] = lio->u.logio.iop[1]; 186 ea.sp = sp; 187 qla2x00_fcport_event_handler(vha, &ea); 188 } 189 190 sp->free(sp); 191 } 192 193 static inline bool 194 fcport_is_smaller(fc_port_t *fcport) 195 { 196 if (wwn_to_u64(fcport->port_name) < 197 wwn_to_u64(fcport->vha->port_name)) 198 return true; 199 else 200 return false; 201 } 202 203 static inline bool 204 fcport_is_bigger(fc_port_t *fcport) 205 { 206 return !fcport_is_smaller(fcport); 207 } 208 209 int 210 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 211 uint16_t *data) 212 { 213 srb_t *sp; 214 struct srb_iocb *lio; 215 int rval = QLA_FUNCTION_FAILED; 216 217 if (!vha->flags.online) 218 goto done; 219 220 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 221 if (!sp) 222 goto done; 223 224 fcport->flags |= FCF_ASYNC_SENT; 225 fcport->logout_completed = 0; 226 227 fcport->disc_state = DSC_LOGIN_PEND; 228 sp->type = SRB_LOGIN_CMD; 229 sp->name = "login"; 230 sp->gen1 = fcport->rscn_gen; 231 sp->gen2 = fcport->login_gen; 232 233 lio = &sp->u.iocb_cmd; 234 lio->timeout = qla2x00_async_iocb_timeout; 235 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 236 237 sp->done = qla2x00_async_login_sp_done; 238 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) { 239 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 240 } else { 241 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 242 243 if (fcport->fc4f_nvme) 244 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 245 246 } 247 248 rval = qla2x00_start_sp(sp); 249 if (rval != QLA_SUCCESS) { 250 fcport->flags |= FCF_LOGIN_NEEDED; 251 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 252 goto done_free_sp; 253 } 254 255 ql_dbg(ql_dbg_disc, vha, 0x2072, 256 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 257 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 258 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 259 fcport->login_retry); 260 return rval; 261 262 done_free_sp: 263 sp->free(sp); 264 fcport->flags &= ~FCF_ASYNC_SENT; 265 done: 266 fcport->flags &= ~FCF_ASYNC_ACTIVE; 267 return rval; 268 } 269 270 static void 271 qla2x00_async_logout_sp_done(void *ptr, int res) 272 { 273 srb_t *sp = ptr; 274 275 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 276 sp->fcport->login_gen++; 277 qlt_logo_completion_handler(sp->fcport, res); 278 sp->free(sp); 279 } 280 281 int 282 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 283 { 284 srb_t *sp; 285 struct srb_iocb *lio; 286 int rval = QLA_FUNCTION_FAILED; 287 288 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 289 return rval; 290 291 fcport->flags |= FCF_ASYNC_SENT; 292 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 293 if (!sp) 294 goto done; 295 296 sp->type = SRB_LOGOUT_CMD; 297 sp->name = "logout"; 298 299 lio = &sp->u.iocb_cmd; 300 lio->timeout = qla2x00_async_iocb_timeout; 301 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 302 303 sp->done = qla2x00_async_logout_sp_done; 304 rval = qla2x00_start_sp(sp); 305 if (rval != QLA_SUCCESS) 306 goto done_free_sp; 307 308 ql_dbg(ql_dbg_disc, vha, 0x2070, 309 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 310 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 311 fcport->d_id.b.area, fcport->d_id.b.al_pa, 312 fcport->port_name); 313 return rval; 314 315 done_free_sp: 316 sp->free(sp); 317 done: 318 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 319 return rval; 320 } 321 322 void 323 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 324 uint16_t *data) 325 { 326 fcport->flags &= ~FCF_ASYNC_ACTIVE; 327 /* Don't re-login in target mode */ 328 if (!fcport->tgt_session) 329 qla2x00_mark_device_lost(vha, fcport, 1, 0); 330 qlt_logo_completion_handler(fcport, data[0]); 331 } 332 333 static void 334 qla2x00_async_prlo_sp_done(void *s, int res) 335 { 336 srb_t *sp = (srb_t *)s; 337 struct srb_iocb *lio = &sp->u.iocb_cmd; 338 struct scsi_qla_host *vha = sp->vha; 339 340 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 341 if (!test_bit(UNLOADING, &vha->dpc_flags)) 342 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 343 lio->u.logio.data); 344 sp->free(sp); 345 } 346 347 int 348 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 349 { 350 srb_t *sp; 351 struct srb_iocb *lio; 352 int rval; 353 354 rval = QLA_FUNCTION_FAILED; 355 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 356 if (!sp) 357 goto done; 358 359 sp->type = SRB_PRLO_CMD; 360 sp->name = "prlo"; 361 362 lio = &sp->u.iocb_cmd; 363 lio->timeout = qla2x00_async_iocb_timeout; 364 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 365 366 sp->done = qla2x00_async_prlo_sp_done; 367 rval = qla2x00_start_sp(sp); 368 if (rval != QLA_SUCCESS) 369 goto done_free_sp; 370 371 ql_dbg(ql_dbg_disc, vha, 0x2070, 372 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 373 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 374 fcport->d_id.b.area, fcport->d_id.b.al_pa); 375 return rval; 376 377 done_free_sp: 378 sp->free(sp); 379 done: 380 fcport->flags &= ~FCF_ASYNC_ACTIVE; 381 return rval; 382 } 383 384 static 385 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 386 { 387 struct fc_port *fcport = ea->fcport; 388 389 ql_dbg(ql_dbg_disc, vha, 0x20d2, 390 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 391 __func__, fcport->port_name, fcport->disc_state, 392 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 393 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 394 395 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 396 ql_dbg(ql_dbg_disc, vha, 0x2066, 397 "%s %8phC: adisc fail: post delete\n", 398 __func__, ea->fcport->port_name); 399 qlt_schedule_sess_for_deletion(ea->fcport); 400 return; 401 } 402 403 if (ea->fcport->disc_state == DSC_DELETE_PEND) 404 return; 405 406 if (ea->sp->gen2 != ea->fcport->login_gen) { 407 /* target side must have changed it. */ 408 ql_dbg(ql_dbg_disc, vha, 0x20d3, 409 "%s %8phC generation changed\n", 410 __func__, ea->fcport->port_name); 411 return; 412 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 413 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 414 __func__, __LINE__, ea->fcport->port_name); 415 qla24xx_post_gidpn_work(vha, ea->fcport); 416 return; 417 } 418 419 __qla24xx_handle_gpdb_event(vha, ea); 420 } 421 422 int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 423 { 424 struct qla_work_evt *e; 425 426 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 427 if (!e) 428 return QLA_FUNCTION_FAILED; 429 430 e->u.fcport.fcport = fcport; 431 fcport->flags |= FCF_ASYNC_ACTIVE; 432 return qla2x00_post_work(vha, e); 433 } 434 435 static void 436 qla2x00_async_adisc_sp_done(void *ptr, int res) 437 { 438 srb_t *sp = ptr; 439 struct scsi_qla_host *vha = sp->vha; 440 struct event_arg ea; 441 struct srb_iocb *lio = &sp->u.iocb_cmd; 442 443 ql_dbg(ql_dbg_disc, vha, 0x2066, 444 "Async done-%s res %x %8phC\n", 445 sp->name, res, sp->fcport->port_name); 446 447 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 448 449 memset(&ea, 0, sizeof(ea)); 450 ea.event = FCME_ADISC_DONE; 451 ea.rc = res; 452 ea.data[0] = lio->u.logio.data[0]; 453 ea.data[1] = lio->u.logio.data[1]; 454 ea.iop[0] = lio->u.logio.iop[0]; 455 ea.iop[1] = lio->u.logio.iop[1]; 456 ea.fcport = sp->fcport; 457 ea.sp = sp; 458 459 qla2x00_fcport_event_handler(vha, &ea); 460 461 sp->free(sp); 462 } 463 464 int 465 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 466 uint16_t *data) 467 { 468 srb_t *sp; 469 struct srb_iocb *lio; 470 int rval; 471 472 rval = QLA_FUNCTION_FAILED; 473 fcport->flags |= FCF_ASYNC_SENT; 474 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 475 if (!sp) 476 goto done; 477 478 sp->type = SRB_ADISC_CMD; 479 sp->name = "adisc"; 480 481 lio = &sp->u.iocb_cmd; 482 lio->timeout = qla2x00_async_iocb_timeout; 483 sp->gen1 = fcport->rscn_gen; 484 sp->gen2 = fcport->login_gen; 485 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 486 487 sp->done = qla2x00_async_adisc_sp_done; 488 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 489 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 490 rval = qla2x00_start_sp(sp); 491 if (rval != QLA_SUCCESS) 492 goto done_free_sp; 493 494 ql_dbg(ql_dbg_disc, vha, 0x206f, 495 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 496 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 497 return rval; 498 499 done_free_sp: 500 sp->free(sp); 501 done: 502 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 503 qla2x00_post_async_adisc_work(vha, fcport, data); 504 return rval; 505 } 506 507 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 508 struct event_arg *ea) 509 { 510 fc_port_t *fcport, *conflict_fcport; 511 struct get_name_list_extended *e; 512 u16 i, n, found = 0, loop_id; 513 port_id_t id; 514 u64 wwn; 515 u16 data[2]; 516 u8 current_login_state; 517 518 fcport = ea->fcport; 519 ql_dbg(ql_dbg_disc, vha, 0xffff, 520 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 521 __func__, fcport->port_name, fcport->disc_state, 522 fcport->fw_login_state, ea->rc, 523 fcport->login_gen, fcport->last_login_gen, 524 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 525 526 if (fcport->disc_state == DSC_DELETE_PEND) 527 return; 528 529 if (ea->rc) { /* rval */ 530 if (fcport->login_retry == 0) { 531 ql_dbg(ql_dbg_disc, vha, 0x20de, 532 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 533 fcport->port_name, fcport->login_retry); 534 } 535 return; 536 } 537 538 if (fcport->last_rscn_gen != fcport->rscn_gen) { 539 ql_dbg(ql_dbg_disc, vha, 0x20df, 540 "%s %8phC rscn gen changed rscn %d|%d \n", 541 __func__, fcport->port_name, 542 fcport->last_rscn_gen, fcport->rscn_gen); 543 qla24xx_post_gidpn_work(vha, fcport); 544 return; 545 } else if (fcport->last_login_gen != fcport->login_gen) { 546 ql_dbg(ql_dbg_disc, vha, 0x20e0, 547 "%s %8phC login gen changed\n", 548 __func__, fcport->port_name); 549 return; 550 } 551 552 n = ea->data[0] / sizeof(struct get_name_list_extended); 553 554 ql_dbg(ql_dbg_disc, vha, 0x20e1, 555 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 556 __func__, __LINE__, fcport->port_name, n, 557 fcport->d_id.b.domain, fcport->d_id.b.area, 558 fcport->d_id.b.al_pa, fcport->loop_id); 559 560 for (i = 0; i < n; i++) { 561 e = &vha->gnl.l[i]; 562 wwn = wwn_to_u64(e->port_name); 563 id.b.domain = e->port_id[2]; 564 id.b.area = e->port_id[1]; 565 id.b.al_pa = e->port_id[0]; 566 id.b.rsvd_1 = 0; 567 568 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 569 continue; 570 571 if (IS_SW_RESV_ADDR(id)) 572 continue; 573 574 found = 1; 575 576 loop_id = le16_to_cpu(e->nport_handle); 577 loop_id = (loop_id & 0x7fff); 578 if (fcport->fc4f_nvme) 579 current_login_state = e->current_login_state >> 4; 580 else 581 current_login_state = e->current_login_state & 0xf; 582 583 584 ql_dbg(ql_dbg_disc, vha, 0x20e2, 585 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 586 __func__, fcport->port_name, 587 e->current_login_state, fcport->fw_login_state, 588 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa, 589 fcport->d_id.b.domain, fcport->d_id.b.area, 590 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 591 592 switch (fcport->disc_state) { 593 case DSC_DELETE_PEND: 594 case DSC_DELETED: 595 break; 596 default: 597 if ((id.b24 != fcport->d_id.b24 && 598 fcport->d_id.b24) || 599 (fcport->loop_id != FC_NO_LOOP_ID && 600 fcport->loop_id != loop_id)) { 601 ql_dbg(ql_dbg_disc, vha, 0x20e3, 602 "%s %d %8phC post del sess\n", 603 __func__, __LINE__, fcport->port_name); 604 qlt_schedule_sess_for_deletion(fcport); 605 return; 606 } 607 break; 608 } 609 610 fcport->loop_id = loop_id; 611 612 wwn = wwn_to_u64(fcport->port_name); 613 qlt_find_sess_invalidate_other(vha, wwn, 614 id, loop_id, &conflict_fcport); 615 616 if (conflict_fcport) { 617 /* 618 * Another share fcport share the same loop_id & 619 * nport id. Conflict fcport needs to finish 620 * cleanup before this fcport can proceed to login. 621 */ 622 conflict_fcport->conflict = fcport; 623 fcport->login_pause = 1; 624 } 625 626 switch (vha->hw->current_topology) { 627 default: 628 switch (current_login_state) { 629 case DSC_LS_PRLI_COMP: 630 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 631 vha, 0x20e4, "%s %d %8phC post gpdb\n", 632 __func__, __LINE__, fcport->port_name); 633 634 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 635 fcport->port_type = FCT_INITIATOR; 636 else 637 fcport->port_type = FCT_TARGET; 638 data[0] = data[1] = 0; 639 qla2x00_post_async_adisc_work(vha, fcport, 640 data); 641 break; 642 case DSC_LS_PORT_UNAVAIL: 643 default: 644 if (fcport->loop_id != FC_NO_LOOP_ID) 645 qla2x00_clear_loop_id(fcport); 646 647 fcport->loop_id = loop_id; 648 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 649 qla24xx_fcport_handle_login(vha, fcport); 650 break; 651 } 652 break; 653 case ISP_CFG_N: 654 fcport->fw_login_state = current_login_state; 655 fcport->d_id = id; 656 switch (current_login_state) { 657 case DSC_LS_PRLI_COMP: 658 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 659 fcport->port_type = FCT_INITIATOR; 660 else 661 fcport->port_type = FCT_TARGET; 662 663 data[0] = data[1] = 0; 664 qla2x00_post_async_adisc_work(vha, fcport, 665 data); 666 break; 667 case DSC_LS_PLOGI_COMP: 668 if (fcport_is_bigger(fcport)) { 669 /* local adapter is smaller */ 670 if (fcport->loop_id != FC_NO_LOOP_ID) 671 qla2x00_clear_loop_id(fcport); 672 673 fcport->loop_id = loop_id; 674 qla24xx_fcport_handle_login(vha, 675 fcport); 676 break; 677 } 678 /* drop through */ 679 default: 680 if (fcport_is_smaller(fcport)) { 681 /* local adapter is bigger */ 682 if (fcport->loop_id != FC_NO_LOOP_ID) 683 qla2x00_clear_loop_id(fcport); 684 685 fcport->loop_id = loop_id; 686 qla24xx_fcport_handle_login(vha, 687 fcport); 688 } 689 break; 690 } 691 break; 692 } /* switch (ha->current_topology) */ 693 } 694 695 if (!found) { 696 switch (vha->hw->current_topology) { 697 case ISP_CFG_F: 698 case ISP_CFG_FL: 699 for (i = 0; i < n; i++) { 700 e = &vha->gnl.l[i]; 701 id.b.domain = e->port_id[0]; 702 id.b.area = e->port_id[1]; 703 id.b.al_pa = e->port_id[2]; 704 id.b.rsvd_1 = 0; 705 loop_id = le16_to_cpu(e->nport_handle); 706 707 if (fcport->d_id.b24 == id.b24) { 708 conflict_fcport = 709 qla2x00_find_fcport_by_wwpn(vha, 710 e->port_name, 0); 711 if (conflict_fcport) { 712 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 713 vha, 0x20e5, 714 "%s %d %8phC post del sess\n", 715 __func__, __LINE__, 716 conflict_fcport->port_name); 717 qlt_schedule_sess_for_deletion 718 (conflict_fcport); 719 } 720 } 721 /* 722 * FW already picked this loop id for 723 * another fcport 724 */ 725 if (fcport->loop_id == loop_id) 726 fcport->loop_id = FC_NO_LOOP_ID; 727 } 728 qla24xx_fcport_handle_login(vha, fcport); 729 break; 730 case ISP_CFG_N: 731 fcport->disc_state = DSC_DELETED; 732 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 733 if (fcport->n2n_link_reset_cnt < 2) { 734 fcport->n2n_link_reset_cnt++; 735 /* 736 * remote port is not sending PLOGI. 737 * Reset link to kick start his state 738 * machine 739 */ 740 set_bit(N2N_LINK_RESET, 741 &vha->dpc_flags); 742 } else { 743 if (fcport->n2n_chip_reset < 1) { 744 ql_log(ql_log_info, vha, 0x705d, 745 "Chip reset to bring laser down"); 746 set_bit(ISP_ABORT_NEEDED, 747 &vha->dpc_flags); 748 fcport->n2n_chip_reset++; 749 } else { 750 ql_log(ql_log_info, vha, 0x705d, 751 "Remote port %8ph is not coming back\n", 752 fcport->port_name); 753 fcport->scan_state = 0; 754 } 755 } 756 qla2xxx_wake_dpc(vha); 757 } else { 758 /* 759 * report port suppose to do PLOGI. Give him 760 * more time. FW will catch it. 761 */ 762 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 763 } 764 break; 765 default: 766 break; 767 } 768 } 769 } /* gnl_event */ 770 771 static void 772 qla24xx_async_gnl_sp_done(void *s, int res) 773 { 774 struct srb *sp = s; 775 struct scsi_qla_host *vha = sp->vha; 776 unsigned long flags; 777 struct fc_port *fcport = NULL, *tf; 778 u16 i, n = 0, loop_id; 779 struct event_arg ea; 780 struct get_name_list_extended *e; 781 u64 wwn; 782 struct list_head h; 783 bool found = false; 784 785 ql_dbg(ql_dbg_disc, vha, 0x20e7, 786 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 787 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 788 sp->u.iocb_cmd.u.mbx.in_mb[2]); 789 790 memset(&ea, 0, sizeof(ea)); 791 ea.sp = sp; 792 ea.rc = res; 793 ea.event = FCME_GNL_DONE; 794 795 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 796 sizeof(struct get_name_list_extended)) { 797 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 798 sizeof(struct get_name_list_extended); 799 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 800 } 801 802 for (i = 0; i < n; i++) { 803 e = &vha->gnl.l[i]; 804 loop_id = le16_to_cpu(e->nport_handle); 805 /* mask out reserve bit */ 806 loop_id = (loop_id & 0x7fff); 807 set_bit(loop_id, vha->hw->loop_id_map); 808 wwn = wwn_to_u64(e->port_name); 809 810 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 811 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 812 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 813 e->port_id[0], e->current_login_state, e->last_login_state, 814 (loop_id & 0x7fff)); 815 } 816 817 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 818 819 INIT_LIST_HEAD(&h); 820 fcport = tf = NULL; 821 if (!list_empty(&vha->gnl.fcports)) 822 list_splice_init(&vha->gnl.fcports, &h); 823 824 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 825 list_del_init(&fcport->gnl_entry); 826 spin_lock(&vha->hw->tgt.sess_lock); 827 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 828 spin_unlock(&vha->hw->tgt.sess_lock); 829 ea.fcport = fcport; 830 831 qla2x00_fcport_event_handler(vha, &ea); 832 } 833 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 834 835 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 836 /* create new fcport if fw has knowledge of new sessions */ 837 for (i = 0; i < n; i++) { 838 port_id_t id; 839 u64 wwnn; 840 841 e = &vha->gnl.l[i]; 842 wwn = wwn_to_u64(e->port_name); 843 844 found = false; 845 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 846 if (!memcmp((u8 *)&wwn, fcport->port_name, 847 WWN_SIZE)) { 848 found = true; 849 break; 850 } 851 } 852 853 id.b.domain = e->port_id[2]; 854 id.b.area = e->port_id[1]; 855 id.b.al_pa = e->port_id[0]; 856 id.b.rsvd_1 = 0; 857 858 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 859 ql_dbg(ql_dbg_disc, vha, 0x2065, 860 "%s %d %8phC %06x post new sess\n", 861 __func__, __LINE__, (u8 *)&wwn, id.b24); 862 wwnn = wwn_to_u64(e->node_name); 863 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 864 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 865 } 866 } 867 868 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 869 870 sp->free(sp); 871 } 872 873 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 874 { 875 srb_t *sp; 876 struct srb_iocb *mbx; 877 int rval = QLA_FUNCTION_FAILED; 878 unsigned long flags; 879 u16 *mb; 880 881 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 882 return rval; 883 884 ql_dbg(ql_dbg_disc, vha, 0x20d9, 885 "Async-gnlist WWPN %8phC \n", fcport->port_name); 886 887 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 888 if (!list_empty(&fcport->gnl_entry)) { 889 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 890 rval = QLA_SUCCESS; 891 goto done; 892 } 893 894 spin_lock(&vha->hw->tgt.sess_lock); 895 fcport->disc_state = DSC_GNL; 896 fcport->last_rscn_gen = fcport->rscn_gen; 897 fcport->last_login_gen = fcport->login_gen; 898 spin_unlock(&vha->hw->tgt.sess_lock); 899 900 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 901 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 902 903 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 904 if (!sp) 905 goto done; 906 907 fcport->flags |= FCF_ASYNC_SENT; 908 sp->type = SRB_MB_IOCB; 909 sp->name = "gnlist"; 910 sp->gen1 = fcport->rscn_gen; 911 sp->gen2 = fcport->login_gen; 912 913 mbx = &sp->u.iocb_cmd; 914 mbx->timeout = qla2x00_async_iocb_timeout; 915 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 916 917 mb = sp->u.iocb_cmd.u.mbx.out_mb; 918 mb[0] = MBC_PORT_NODE_NAME_LIST; 919 mb[1] = BIT_2 | BIT_3; 920 mb[2] = MSW(vha->gnl.ldma); 921 mb[3] = LSW(vha->gnl.ldma); 922 mb[6] = MSW(MSD(vha->gnl.ldma)); 923 mb[7] = LSW(MSD(vha->gnl.ldma)); 924 mb[8] = vha->gnl.size; 925 mb[9] = vha->vp_idx; 926 927 sp->done = qla24xx_async_gnl_sp_done; 928 929 rval = qla2x00_start_sp(sp); 930 if (rval != QLA_SUCCESS) 931 goto done_free_sp; 932 933 ql_dbg(ql_dbg_disc, vha, 0x20da, 934 "Async-%s - OUT WWPN %8phC hndl %x\n", 935 sp->name, fcport->port_name, sp->handle); 936 937 return rval; 938 939 done_free_sp: 940 sp->free(sp); 941 fcport->flags &= ~FCF_ASYNC_SENT; 942 done: 943 return rval; 944 } 945 946 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 947 { 948 struct qla_work_evt *e; 949 950 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 951 if (!e) 952 return QLA_FUNCTION_FAILED; 953 954 e->u.fcport.fcport = fcport; 955 fcport->flags |= FCF_ASYNC_ACTIVE; 956 return qla2x00_post_work(vha, e); 957 } 958 959 static 960 void qla24xx_async_gpdb_sp_done(void *s, int res) 961 { 962 struct srb *sp = s; 963 struct scsi_qla_host *vha = sp->vha; 964 struct qla_hw_data *ha = vha->hw; 965 fc_port_t *fcport = sp->fcport; 966 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 967 struct event_arg ea; 968 969 ql_dbg(ql_dbg_disc, vha, 0x20db, 970 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 971 sp->name, res, fcport->port_name, mb[1], mb[2]); 972 973 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 974 975 memset(&ea, 0, sizeof(ea)); 976 ea.event = FCME_GPDB_DONE; 977 ea.fcport = fcport; 978 ea.sp = sp; 979 980 qla2x00_fcport_event_handler(vha, &ea); 981 982 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 983 sp->u.iocb_cmd.u.mbx.in_dma); 984 985 sp->free(sp); 986 } 987 988 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 989 { 990 struct qla_work_evt *e; 991 992 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 993 if (!e) 994 return QLA_FUNCTION_FAILED; 995 996 e->u.fcport.fcport = fcport; 997 998 return qla2x00_post_work(vha, e); 999 } 1000 1001 static void 1002 qla2x00_async_prli_sp_done(void *ptr, int res) 1003 { 1004 srb_t *sp = ptr; 1005 struct scsi_qla_host *vha = sp->vha; 1006 struct srb_iocb *lio = &sp->u.iocb_cmd; 1007 struct event_arg ea; 1008 1009 ql_dbg(ql_dbg_disc, vha, 0x2129, 1010 "%s %8phC res %d \n", __func__, 1011 sp->fcport->port_name, res); 1012 1013 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1014 1015 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1016 memset(&ea, 0, sizeof(ea)); 1017 ea.event = FCME_PRLI_DONE; 1018 ea.fcport = sp->fcport; 1019 ea.data[0] = lio->u.logio.data[0]; 1020 ea.data[1] = lio->u.logio.data[1]; 1021 ea.iop[0] = lio->u.logio.iop[0]; 1022 ea.iop[1] = lio->u.logio.iop[1]; 1023 ea.sp = sp; 1024 1025 qla2x00_fcport_event_handler(vha, &ea); 1026 } 1027 1028 sp->free(sp); 1029 } 1030 1031 int 1032 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1033 { 1034 srb_t *sp; 1035 struct srb_iocb *lio; 1036 int rval = QLA_FUNCTION_FAILED; 1037 1038 if (!vha->flags.online) 1039 return rval; 1040 1041 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1042 fcport->fw_login_state == DSC_LS_PRLI_PEND) 1043 return rval; 1044 1045 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1046 if (!sp) 1047 return rval; 1048 1049 fcport->flags |= FCF_ASYNC_SENT; 1050 fcport->logout_completed = 0; 1051 1052 sp->type = SRB_PRLI_CMD; 1053 sp->name = "prli"; 1054 1055 lio = &sp->u.iocb_cmd; 1056 lio->timeout = qla2x00_async_iocb_timeout; 1057 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1058 1059 sp->done = qla2x00_async_prli_sp_done; 1060 lio->u.logio.flags = 0; 1061 1062 if (fcport->fc4f_nvme) 1063 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1064 1065 rval = qla2x00_start_sp(sp); 1066 if (rval != QLA_SUCCESS) { 1067 fcport->flags |= FCF_LOGIN_NEEDED; 1068 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1069 goto done_free_sp; 1070 } 1071 1072 ql_dbg(ql_dbg_disc, vha, 0x211b, 1073 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 1074 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1075 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc"); 1076 1077 return rval; 1078 1079 done_free_sp: 1080 sp->free(sp); 1081 fcport->flags &= ~FCF_ASYNC_SENT; 1082 return rval; 1083 } 1084 1085 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1086 { 1087 struct qla_work_evt *e; 1088 1089 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1090 if (!e) 1091 return QLA_FUNCTION_FAILED; 1092 1093 e->u.fcport.fcport = fcport; 1094 e->u.fcport.opt = opt; 1095 fcport->flags |= FCF_ASYNC_ACTIVE; 1096 return qla2x00_post_work(vha, e); 1097 } 1098 1099 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1100 { 1101 srb_t *sp; 1102 struct srb_iocb *mbx; 1103 int rval = QLA_FUNCTION_FAILED; 1104 u16 *mb; 1105 dma_addr_t pd_dma; 1106 struct port_database_24xx *pd; 1107 struct qla_hw_data *ha = vha->hw; 1108 1109 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1110 return rval; 1111 1112 fcport->disc_state = DSC_GPDB; 1113 1114 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1115 if (!sp) 1116 goto done; 1117 1118 fcport->flags |= FCF_ASYNC_SENT; 1119 sp->type = SRB_MB_IOCB; 1120 sp->name = "gpdb"; 1121 sp->gen1 = fcport->rscn_gen; 1122 sp->gen2 = fcport->login_gen; 1123 1124 mbx = &sp->u.iocb_cmd; 1125 mbx->timeout = qla2x00_async_iocb_timeout; 1126 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1127 1128 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1129 if (pd == NULL) { 1130 ql_log(ql_log_warn, vha, 0xd043, 1131 "Failed to allocate port database structure.\n"); 1132 goto done_free_sp; 1133 } 1134 1135 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1136 mb[0] = MBC_GET_PORT_DATABASE; 1137 mb[1] = fcport->loop_id; 1138 mb[2] = MSW(pd_dma); 1139 mb[3] = LSW(pd_dma); 1140 mb[6] = MSW(MSD(pd_dma)); 1141 mb[7] = LSW(MSD(pd_dma)); 1142 mb[9] = vha->vp_idx; 1143 mb[10] = opt; 1144 1145 mbx->u.mbx.in = (void *)pd; 1146 mbx->u.mbx.in_dma = pd_dma; 1147 1148 sp->done = qla24xx_async_gpdb_sp_done; 1149 1150 rval = qla2x00_start_sp(sp); 1151 if (rval != QLA_SUCCESS) 1152 goto done_free_sp; 1153 1154 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1155 "Async-%s %8phC hndl %x opt %x\n", 1156 sp->name, fcport->port_name, sp->handle, opt); 1157 1158 return rval; 1159 1160 done_free_sp: 1161 if (pd) 1162 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1163 1164 sp->free(sp); 1165 fcport->flags &= ~FCF_ASYNC_SENT; 1166 done: 1167 qla24xx_post_gpdb_work(vha, fcport, opt); 1168 return rval; 1169 } 1170 1171 static 1172 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1173 { 1174 unsigned long flags; 1175 1176 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1177 ea->fcport->login_gen++; 1178 ea->fcport->deleted = 0; 1179 ea->fcport->logout_on_delete = 1; 1180 1181 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1182 vha->fcport_count++; 1183 ea->fcport->login_succ = 1; 1184 1185 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1186 "%s %d %8phC post upd_fcport fcp_cnt %d\n", 1187 __func__, __LINE__, ea->fcport->port_name, 1188 vha->fcport_count); 1189 qla24xx_post_upd_fcport_work(vha, ea->fcport); 1190 } else if (ea->fcport->login_succ) { 1191 /* 1192 * We have an existing session. A late RSCN delivery 1193 * must have triggered the session to be re-validate. 1194 * Session is still valid. 1195 */ 1196 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1197 "%s %d %8phC session revalidate success\n", 1198 __func__, __LINE__, ea->fcport->port_name); 1199 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1200 } 1201 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1202 } 1203 1204 static 1205 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1206 { 1207 fc_port_t *fcport = ea->fcport; 1208 struct port_database_24xx *pd; 1209 struct srb *sp = ea->sp; 1210 uint8_t ls; 1211 1212 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1213 1214 fcport->flags &= ~FCF_ASYNC_SENT; 1215 1216 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1217 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name, 1218 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme, 1219 ea->rc); 1220 1221 if (fcport->disc_state == DSC_DELETE_PEND) 1222 return; 1223 1224 if (fcport->fc4f_nvme) 1225 ls = pd->current_login_state >> 4; 1226 else 1227 ls = pd->current_login_state & 0xf; 1228 1229 switch (ls) { 1230 case PDS_PRLI_COMPLETE: 1231 __qla24xx_parse_gpdb(vha, fcport, pd); 1232 break; 1233 case PDS_PLOGI_PENDING: 1234 case PDS_PLOGI_COMPLETE: 1235 case PDS_PRLI_PENDING: 1236 case PDS_PRLI2_PENDING: 1237 /* Set discovery state back to GNL to Relogin attempt */ 1238 if (qla_dual_mode_enabled(vha) || 1239 qla_ini_mode_enabled(vha)) { 1240 fcport->disc_state = DSC_GNL; 1241 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1242 } 1243 return; 1244 case PDS_LOGO_PENDING: 1245 case PDS_PORT_UNAVAILABLE: 1246 default: 1247 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1248 __func__, __LINE__, fcport->port_name); 1249 qlt_schedule_sess_for_deletion(fcport); 1250 return; 1251 } 1252 __qla24xx_handle_gpdb_event(vha, ea); 1253 } /* gpdb event */ 1254 1255 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1256 { 1257 u8 login = 0; 1258 int rc; 1259 1260 if (qla_tgt_mode_enabled(vha)) 1261 return; 1262 1263 if (qla_dual_mode_enabled(vha)) { 1264 if (N2N_TOPO(vha->hw)) { 1265 u64 mywwn, wwn; 1266 1267 mywwn = wwn_to_u64(vha->port_name); 1268 wwn = wwn_to_u64(fcport->port_name); 1269 if (mywwn > wwn) 1270 login = 1; 1271 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1272 && time_after_eq(jiffies, 1273 fcport->plogi_nack_done_deadline)) 1274 login = 1; 1275 } else { 1276 login = 1; 1277 } 1278 } else { 1279 /* initiator mode */ 1280 login = 1; 1281 } 1282 1283 if (login) { 1284 if (fcport->loop_id == FC_NO_LOOP_ID) { 1285 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1286 rc = qla2x00_find_new_loop_id(vha, fcport); 1287 if (rc) { 1288 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1289 "%s %d %8phC post del sess - out of loopid\n", 1290 __func__, __LINE__, fcport->port_name); 1291 fcport->scan_state = 0; 1292 qlt_schedule_sess_for_deletion(fcport); 1293 return; 1294 } 1295 } 1296 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1297 "%s %d %8phC post login\n", 1298 __func__, __LINE__, fcport->port_name); 1299 qla2x00_post_async_login_work(vha, fcport, NULL); 1300 } 1301 } 1302 1303 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1304 { 1305 u16 data[2]; 1306 u64 wwn; 1307 1308 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1309 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n", 1310 __func__, fcport->port_name, fcport->disc_state, 1311 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1312 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1313 fcport->login_gen, fcport->login_retry, 1314 fcport->loop_id, fcport->scan_state); 1315 1316 if (fcport->scan_state != QLA_FCPORT_FOUND) 1317 return 0; 1318 1319 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1320 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1321 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1322 return 0; 1323 1324 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1325 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1326 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1327 return 0; 1328 } 1329 } 1330 1331 /* for pure Target Mode. Login will not be initiated */ 1332 if (vha->host->active_mode == MODE_TARGET) 1333 return 0; 1334 1335 if (fcport->flags & FCF_ASYNC_SENT) { 1336 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1337 return 0; 1338 } 1339 1340 switch (fcport->disc_state) { 1341 case DSC_DELETED: 1342 wwn = wwn_to_u64(fcport->node_name); 1343 switch (vha->hw->current_topology) { 1344 case ISP_CFG_N: 1345 if (fcport_is_smaller(fcport)) { 1346 /* this adapter is bigger */ 1347 if (fcport->login_retry) { 1348 if (fcport->loop_id == FC_NO_LOOP_ID) { 1349 qla2x00_find_new_loop_id(vha, 1350 fcport); 1351 fcport->fw_login_state = 1352 DSC_LS_PORT_UNAVAIL; 1353 } 1354 fcport->login_retry--; 1355 qla_post_els_plogi_work(vha, fcport); 1356 } else { 1357 ql_log(ql_log_info, vha, 0x705d, 1358 "Unable to reach remote port %8phC", 1359 fcport->port_name); 1360 } 1361 } else { 1362 qla24xx_post_gnl_work(vha, fcport); 1363 } 1364 break; 1365 default: 1366 if (wwn == 0) { 1367 ql_dbg(ql_dbg_disc, vha, 0xffff, 1368 "%s %d %8phC post GNNID\n", 1369 __func__, __LINE__, fcport->port_name); 1370 qla24xx_post_gnnid_work(vha, fcport); 1371 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1372 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1373 "%s %d %8phC post gnl\n", 1374 __func__, __LINE__, fcport->port_name); 1375 qla24xx_post_gnl_work(vha, fcport); 1376 } else { 1377 qla_chk_n2n_b4_login(vha, fcport); 1378 } 1379 break; 1380 } 1381 break; 1382 1383 case DSC_GNL: 1384 switch (vha->hw->current_topology) { 1385 case ISP_CFG_N: 1386 if ((fcport->current_login_state & 0xf) == 0x6) { 1387 ql_dbg(ql_dbg_disc, vha, 0x2118, 1388 "%s %d %8phC post GPDB work\n", 1389 __func__, __LINE__, fcport->port_name); 1390 fcport->chip_reset = 1391 vha->hw->base_qpair->chip_reset; 1392 qla24xx_post_gpdb_work(vha, fcport, 0); 1393 } else { 1394 ql_dbg(ql_dbg_disc, vha, 0x2118, 1395 "%s %d %8phC post NVMe PRLI\n", 1396 __func__, __LINE__, fcport->port_name); 1397 qla24xx_post_prli_work(vha, fcport); 1398 } 1399 break; 1400 default: 1401 if (fcport->login_pause) { 1402 fcport->last_rscn_gen = fcport->rscn_gen; 1403 fcport->last_login_gen = fcport->login_gen; 1404 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1405 break; 1406 } 1407 qla_chk_n2n_b4_login(vha, fcport); 1408 break; 1409 } 1410 break; 1411 1412 case DSC_LOGIN_FAILED: 1413 fcport->login_retry--; 1414 ql_dbg(ql_dbg_disc, vha, 0x20d0, 1415 "%s %d %8phC post gidpn\n", 1416 __func__, __LINE__, fcport->port_name); 1417 if (N2N_TOPO(vha->hw)) 1418 qla_chk_n2n_b4_login(vha, fcport); 1419 else 1420 qla24xx_post_gidpn_work(vha, fcport); 1421 break; 1422 1423 case DSC_LOGIN_COMPLETE: 1424 /* recheck login state */ 1425 ql_dbg(ql_dbg_disc, vha, 0x20d1, 1426 "%s %d %8phC post adisc\n", 1427 __func__, __LINE__, fcport->port_name); 1428 fcport->login_retry--; 1429 data[0] = data[1] = 0; 1430 qla2x00_post_async_adisc_work(vha, fcport, data); 1431 break; 1432 1433 case DSC_LOGIN_PEND: 1434 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1435 qla24xx_post_prli_work(vha, fcport); 1436 break; 1437 1438 default: 1439 break; 1440 } 1441 1442 return 0; 1443 } 1444 1445 static 1446 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1447 { 1448 fcport->rscn_gen++; 1449 1450 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1451 "%s %8phC DS %d LS %d\n", 1452 __func__, fcport->port_name, fcport->disc_state, 1453 fcport->fw_login_state); 1454 1455 if (fcport->flags & FCF_ASYNC_SENT) 1456 return; 1457 1458 switch (fcport->disc_state) { 1459 case DSC_DELETED: 1460 case DSC_LOGIN_COMPLETE: 1461 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1462 break; 1463 default: 1464 break; 1465 } 1466 } 1467 1468 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1469 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1470 { 1471 struct qla_work_evt *e; 1472 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1473 if (!e) 1474 return QLA_FUNCTION_FAILED; 1475 1476 e->u.new_sess.id = *id; 1477 e->u.new_sess.pla = pla; 1478 e->u.new_sess.fc4_type = fc4_type; 1479 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1480 if (node_name) 1481 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1482 1483 return qla2x00_post_work(vha, e); 1484 } 1485 1486 static 1487 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1488 struct event_arg *ea) 1489 { 1490 fc_port_t *fcport = ea->fcport; 1491 1492 ql_dbg(ql_dbg_disc, vha, 0x2102, 1493 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1494 __func__, fcport->port_name, fcport->disc_state, 1495 fcport->fw_login_state, fcport->login_pause, 1496 fcport->deleted, fcport->conflict, 1497 fcport->last_rscn_gen, fcport->rscn_gen, 1498 fcport->last_login_gen, fcport->login_gen, 1499 fcport->flags); 1500 1501 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1502 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1503 return; 1504 1505 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1506 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1507 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1508 return; 1509 } 1510 } 1511 1512 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1513 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1514 __func__, __LINE__, fcport->port_name); 1515 1516 qla24xx_post_gidpn_work(vha, fcport); 1517 return; 1518 } 1519 1520 qla24xx_fcport_handle_login(vha, fcport); 1521 } 1522 1523 1524 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, struct event_arg *ea) 1525 { 1526 ql_dbg(ql_dbg_disc, vha, 0x2118, 1527 "%s %d %8phC post PRLI\n", 1528 __func__, __LINE__, ea->fcport->port_name); 1529 qla24xx_post_prli_work(vha, ea->fcport); 1530 } 1531 1532 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1533 { 1534 fc_port_t *f, *tf; 1535 uint32_t id = 0, mask, rid; 1536 unsigned long flags; 1537 fc_port_t *fcport; 1538 1539 switch (ea->event) { 1540 case FCME_RELOGIN: 1541 if (test_bit(UNLOADING, &vha->dpc_flags)) 1542 return; 1543 1544 qla24xx_handle_relogin_event(vha, ea); 1545 break; 1546 case FCME_RSCN: 1547 if (test_bit(UNLOADING, &vha->dpc_flags)) 1548 return; 1549 switch (ea->id.b.rsvd_1) { 1550 case RSCN_PORT_ADDR: 1551 fcport = qla2x00_find_fcport_by_nportid 1552 (vha, &ea->id, 1); 1553 if (fcport) 1554 fcport->rscn_rcvd = 1; 1555 1556 spin_lock_irqsave(&vha->work_lock, flags); 1557 if (vha->scan.scan_flags == 0) { 1558 ql_dbg(ql_dbg_disc, vha, 0xffff, 1559 "%s: schedule\n", __func__); 1560 vha->scan.scan_flags |= SF_QUEUED; 1561 schedule_delayed_work(&vha->scan.scan_work, 5); 1562 } 1563 spin_unlock_irqrestore(&vha->work_lock, flags); 1564 1565 break; 1566 case RSCN_AREA_ADDR: 1567 case RSCN_DOM_ADDR: 1568 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1569 mask = 0xffff00; 1570 ql_dbg(ql_dbg_async, vha, 0x5044, 1571 "RSCN: Area 0x%06x was affected\n", 1572 ea->id.b24); 1573 } else { 1574 mask = 0xff0000; 1575 ql_dbg(ql_dbg_async, vha, 0x507a, 1576 "RSCN: Domain 0x%06x was affected\n", 1577 ea->id.b24); 1578 } 1579 1580 rid = ea->id.b24 & mask; 1581 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1582 list) { 1583 id = f->d_id.b24 & mask; 1584 if (rid == id) { 1585 ea->fcport = f; 1586 qla24xx_handle_rscn_event(f, ea); 1587 } 1588 } 1589 break; 1590 case RSCN_FAB_ADDR: 1591 default: 1592 ql_log(ql_log_warn, vha, 0xd045, 1593 "RSCN: Fabric was affected. Addr format %d\n", 1594 ea->id.b.rsvd_1); 1595 qla2x00_mark_all_devices_lost(vha, 1); 1596 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1597 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1598 } 1599 break; 1600 case FCME_GIDPN_DONE: 1601 qla24xx_handle_gidpn_event(vha, ea); 1602 break; 1603 case FCME_GNL_DONE: 1604 qla24xx_handle_gnl_done_event(vha, ea); 1605 break; 1606 case FCME_GPSC_DONE: 1607 qla24xx_handle_gpsc_event(vha, ea); 1608 break; 1609 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1610 qla24xx_handle_plogi_done_event(vha, ea); 1611 break; 1612 case FCME_PRLI_DONE: 1613 qla24xx_handle_prli_done_event(vha, ea); 1614 break; 1615 case FCME_GPDB_DONE: 1616 qla24xx_handle_gpdb_event(vha, ea); 1617 break; 1618 case FCME_GPNID_DONE: 1619 qla24xx_handle_gpnid_event(vha, ea); 1620 break; 1621 case FCME_GFFID_DONE: 1622 qla24xx_handle_gffid_event(vha, ea); 1623 break; 1624 case FCME_ADISC_DONE: 1625 qla24xx_handle_adisc_event(vha, ea); 1626 break; 1627 case FCME_GNNID_DONE: 1628 qla24xx_handle_gnnid_event(vha, ea); 1629 break; 1630 case FCME_GFPNID_DONE: 1631 qla24xx_handle_gfpnid_event(vha, ea); 1632 break; 1633 case FCME_ELS_PLOGI_DONE: 1634 qla_handle_els_plogi_done(vha, ea); 1635 break; 1636 default: 1637 BUG_ON(1); 1638 break; 1639 } 1640 } 1641 1642 static void 1643 qla2x00_tmf_iocb_timeout(void *data) 1644 { 1645 srb_t *sp = data; 1646 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1647 1648 tmf->u.tmf.comp_status = CS_TIMEOUT; 1649 complete(&tmf->u.tmf.comp); 1650 } 1651 1652 static void 1653 qla2x00_tmf_sp_done(void *ptr, int res) 1654 { 1655 srb_t *sp = ptr; 1656 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1657 1658 complete(&tmf->u.tmf.comp); 1659 } 1660 1661 int 1662 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1663 uint32_t tag) 1664 { 1665 struct scsi_qla_host *vha = fcport->vha; 1666 struct srb_iocb *tm_iocb; 1667 srb_t *sp; 1668 int rval = QLA_FUNCTION_FAILED; 1669 1670 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1671 if (!sp) 1672 goto done; 1673 1674 tm_iocb = &sp->u.iocb_cmd; 1675 sp->type = SRB_TM_CMD; 1676 sp->name = "tmf"; 1677 1678 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1679 init_completion(&tm_iocb->u.tmf.comp); 1680 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1681 1682 tm_iocb->u.tmf.flags = flags; 1683 tm_iocb->u.tmf.lun = lun; 1684 tm_iocb->u.tmf.data = tag; 1685 sp->done = qla2x00_tmf_sp_done; 1686 1687 rval = qla2x00_start_sp(sp); 1688 if (rval != QLA_SUCCESS) 1689 goto done_free_sp; 1690 1691 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1692 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1693 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1694 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1695 1696 wait_for_completion(&tm_iocb->u.tmf.comp); 1697 1698 rval = tm_iocb->u.tmf.data; 1699 1700 if (rval != QLA_SUCCESS) { 1701 ql_log(ql_log_warn, vha, 0x8030, 1702 "TM IOCB failed (%x).\n", rval); 1703 } 1704 1705 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1706 flags = tm_iocb->u.tmf.flags; 1707 lun = (uint16_t)tm_iocb->u.tmf.lun; 1708 1709 /* Issue Marker IOCB */ 1710 qla2x00_marker(vha, vha->hw->req_q_map[0], 1711 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1712 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1713 } 1714 1715 done_free_sp: 1716 sp->free(sp); 1717 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1718 done: 1719 return rval; 1720 } 1721 1722 static void 1723 qla24xx_abort_iocb_timeout(void *data) 1724 { 1725 srb_t *sp = data; 1726 struct srb_iocb *abt = &sp->u.iocb_cmd; 1727 1728 abt->u.abt.comp_status = CS_TIMEOUT; 1729 sp->done(sp, QLA_FUNCTION_TIMEOUT); 1730 } 1731 1732 static void 1733 qla24xx_abort_sp_done(void *ptr, int res) 1734 { 1735 srb_t *sp = ptr; 1736 struct srb_iocb *abt = &sp->u.iocb_cmd; 1737 1738 if (del_timer(&sp->u.iocb_cmd.timer)) { 1739 if (sp->flags & SRB_WAKEUP_ON_COMP) 1740 complete(&abt->u.abt.comp); 1741 else 1742 sp->free(sp); 1743 } 1744 } 1745 1746 int 1747 qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 1748 { 1749 scsi_qla_host_t *vha = cmd_sp->vha; 1750 fc_port_t *fcport = cmd_sp->fcport; 1751 struct srb_iocb *abt_iocb; 1752 srb_t *sp; 1753 int rval = QLA_FUNCTION_FAILED; 1754 1755 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1756 if (!sp) 1757 goto done; 1758 1759 abt_iocb = &sp->u.iocb_cmd; 1760 sp->type = SRB_ABT_CMD; 1761 sp->name = "abort"; 1762 if (wait) 1763 sp->flags = SRB_WAKEUP_ON_COMP; 1764 1765 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1766 init_completion(&abt_iocb->u.abt.comp); 1767 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1768 1769 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1770 1771 if (vha->flags.qpairs_available && cmd_sp->qpair) 1772 abt_iocb->u.abt.req_que_no = 1773 cpu_to_le16(cmd_sp->qpair->req->id); 1774 else 1775 abt_iocb->u.abt.req_que_no = cpu_to_le16(vha->req->id); 1776 1777 sp->done = qla24xx_abort_sp_done; 1778 1779 rval = qla2x00_start_sp(sp); 1780 if (rval != QLA_SUCCESS) 1781 goto done_free_sp; 1782 1783 ql_dbg(ql_dbg_async, vha, 0x507c, 1784 "Abort command issued - hdl=%x, target_id=%x\n", 1785 cmd_sp->handle, fcport->tgt_id); 1786 1787 if (wait) { 1788 wait_for_completion(&abt_iocb->u.abt.comp); 1789 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1790 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1791 } 1792 1793 done_free_sp: 1794 sp->free(sp); 1795 done: 1796 return rval; 1797 } 1798 1799 int 1800 qla24xx_async_abort_command(srb_t *sp) 1801 { 1802 unsigned long flags = 0; 1803 1804 uint32_t handle; 1805 fc_port_t *fcport = sp->fcport; 1806 struct scsi_qla_host *vha = fcport->vha; 1807 struct qla_hw_data *ha = vha->hw; 1808 struct req_que *req = vha->req; 1809 1810 if (vha->flags.qpairs_available && sp->qpair) 1811 req = sp->qpair->req; 1812 1813 spin_lock_irqsave(&ha->hardware_lock, flags); 1814 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1815 if (req->outstanding_cmds[handle] == sp) 1816 break; 1817 } 1818 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1819 if (handle == req->num_outstanding_cmds) { 1820 /* Command not found. */ 1821 return QLA_FUNCTION_FAILED; 1822 } 1823 if (sp->type == SRB_FXIOCB_DCMD) 1824 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1825 FXDISC_ABORT_IOCTL); 1826 1827 return qla24xx_async_abort_cmd(sp, true); 1828 } 1829 1830 static void 1831 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1832 { 1833 switch (ea->data[0]) { 1834 case MBS_COMMAND_COMPLETE: 1835 ql_dbg(ql_dbg_disc, vha, 0x2118, 1836 "%s %d %8phC post gpdb\n", 1837 __func__, __LINE__, ea->fcport->port_name); 1838 1839 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1840 ea->fcport->logout_on_delete = 1; 1841 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1842 break; 1843 default: 1844 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1845 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1846 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1847 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1848 break; 1849 } 1850 1851 if (ea->fcport->n2n_flag) { 1852 ql_dbg(ql_dbg_disc, vha, 0x2118, 1853 "%s %d %8phC post fc4 prli\n", 1854 __func__, __LINE__, ea->fcport->port_name); 1855 ea->fcport->fc4f_nvme = 0; 1856 ea->fcport->n2n_flag = 0; 1857 qla24xx_post_prli_work(vha, ea->fcport); 1858 } 1859 ql_dbg(ql_dbg_disc, vha, 0x2119, 1860 "%s %d %8phC unhandle event of %x\n", 1861 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1862 break; 1863 } 1864 } 1865 1866 static void 1867 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1868 { 1869 port_id_t cid; /* conflict Nport id */ 1870 u16 lid; 1871 struct fc_port *conflict_fcport; 1872 unsigned long flags; 1873 struct fc_port *fcport = ea->fcport; 1874 1875 ql_dbg(ql_dbg_disc, vha, 0xffff, 1876 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1877 __func__, fcport->port_name, fcport->disc_state, 1878 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1879 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1, 1880 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1881 1882 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1883 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1884 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1885 "%s %d %8phC Remote is trying to login\n", 1886 __func__, __LINE__, fcport->port_name); 1887 return; 1888 } 1889 1890 if (fcport->disc_state == DSC_DELETE_PEND) 1891 return; 1892 1893 if (ea->sp->gen2 != fcport->login_gen) { 1894 /* target side must have changed it. */ 1895 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1896 "%s %8phC generation changed\n", 1897 __func__, fcport->port_name); 1898 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1899 return; 1900 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1901 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 1902 __func__, __LINE__, fcport->port_name); 1903 qla24xx_post_gidpn_work(vha, fcport); 1904 return; 1905 } 1906 1907 switch (ea->data[0]) { 1908 case MBS_COMMAND_COMPLETE: 1909 /* 1910 * Driver must validate login state - If PRLI not complete, 1911 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1912 * requests. 1913 */ 1914 if (ea->fcport->fc4f_nvme) { 1915 ql_dbg(ql_dbg_disc, vha, 0x2117, 1916 "%s %d %8phC post prli\n", 1917 __func__, __LINE__, ea->fcport->port_name); 1918 qla24xx_post_prli_work(vha, ea->fcport); 1919 } else { 1920 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1921 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1922 __func__, __LINE__, ea->fcport->port_name, 1923 ea->fcport->loop_id, ea->fcport->d_id.b24); 1924 1925 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1926 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1927 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1928 ea->fcport->logout_on_delete = 1; 1929 ea->fcport->send_els_logo = 0; 1930 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1931 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1932 1933 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1934 } 1935 break; 1936 case MBS_COMMAND_ERROR: 1937 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1938 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1939 1940 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1941 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1942 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1943 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1944 else 1945 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1946 break; 1947 case MBS_LOOP_ID_USED: 1948 /* data[1] = IO PARAM 1 = nport ID */ 1949 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1950 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1951 cid.b.al_pa = ea->iop[1] & 0xff; 1952 cid.b.rsvd_1 = 0; 1953 1954 ql_dbg(ql_dbg_disc, vha, 0x20ec, 1955 "%s %d %8phC LoopID 0x%x in use post gnl\n", 1956 __func__, __LINE__, ea->fcport->port_name, 1957 ea->fcport->loop_id); 1958 1959 if (IS_SW_RESV_ADDR(cid)) { 1960 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1961 ea->fcport->loop_id = FC_NO_LOOP_ID; 1962 } else { 1963 qla2x00_clear_loop_id(ea->fcport); 1964 } 1965 qla24xx_post_gnl_work(vha, ea->fcport); 1966 break; 1967 case MBS_PORT_ID_USED: 1968 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1969 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n", 1970 __func__, __LINE__, ea->fcport->port_name, 1971 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area, 1972 ea->fcport->d_id.b.al_pa); 1973 1974 lid = ea->iop[1] & 0xffff; 1975 qlt_find_sess_invalidate_other(vha, 1976 wwn_to_u64(ea->fcport->port_name), 1977 ea->fcport->d_id, lid, &conflict_fcport); 1978 1979 if (conflict_fcport) { 1980 /* 1981 * Another fcport share the same loop_id/nport id. 1982 * Conflict fcport needs to finish cleanup before this 1983 * fcport can proceed to login. 1984 */ 1985 conflict_fcport->conflict = ea->fcport; 1986 ea->fcport->login_pause = 1; 1987 1988 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1989 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 1990 __func__, __LINE__, ea->fcport->port_name, 1991 ea->fcport->d_id.b24, lid); 1992 qla2x00_clear_loop_id(ea->fcport); 1993 qla24xx_post_gidpn_work(vha, ea->fcport); 1994 } else { 1995 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1996 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 1997 __func__, __LINE__, ea->fcport->port_name, 1998 ea->fcport->d_id.b24, lid); 1999 2000 qla2x00_clear_loop_id(ea->fcport); 2001 set_bit(lid, vha->hw->loop_id_map); 2002 ea->fcport->loop_id = lid; 2003 ea->fcport->keep_nport_handle = 0; 2004 qlt_schedule_sess_for_deletion(ea->fcport); 2005 } 2006 break; 2007 } 2008 return; 2009 } 2010 2011 void 2012 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 2013 uint16_t *data) 2014 { 2015 qlt_logo_completion_handler(fcport, data[0]); 2016 fcport->login_gen++; 2017 fcport->flags &= ~FCF_ASYNC_ACTIVE; 2018 return; 2019 } 2020 2021 void 2022 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 2023 uint16_t *data) 2024 { 2025 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 2026 if (data[0] == MBS_COMMAND_COMPLETE) { 2027 qla2x00_update_fcport(vha, fcport); 2028 2029 return; 2030 } 2031 2032 /* Retry login. */ 2033 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 2034 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2035 else 2036 qla2x00_mark_device_lost(vha, fcport, 1, 0); 2037 2038 return; 2039 } 2040 2041 /****************************************************************************/ 2042 /* QLogic ISP2x00 Hardware Support Functions. */ 2043 /****************************************************************************/ 2044 2045 static int 2046 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2047 { 2048 int rval = QLA_SUCCESS; 2049 struct qla_hw_data *ha = vha->hw; 2050 uint32_t idc_major_ver, idc_minor_ver; 2051 uint16_t config[4]; 2052 2053 qla83xx_idc_lock(vha, 0); 2054 2055 /* SV: TODO: Assign initialization timeout from 2056 * flash-info / other param 2057 */ 2058 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2059 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2060 2061 /* Set our fcoe function presence */ 2062 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2063 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2064 "Error while setting DRV-Presence.\n"); 2065 rval = QLA_FUNCTION_FAILED; 2066 goto exit; 2067 } 2068 2069 /* Decide the reset ownership */ 2070 qla83xx_reset_ownership(vha); 2071 2072 /* 2073 * On first protocol driver load: 2074 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2075 * register. 2076 * Others: Check compatibility with current IDC Major version. 2077 */ 2078 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2079 if (ha->flags.nic_core_reset_owner) { 2080 /* Set IDC Major version */ 2081 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2082 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2083 2084 /* Clearing IDC-Lock-Recovery register */ 2085 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2086 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2087 /* 2088 * Clear further IDC participation if we are not compatible with 2089 * the current IDC Major Version. 2090 */ 2091 ql_log(ql_log_warn, vha, 0xb07d, 2092 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2093 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2094 __qla83xx_clear_drv_presence(vha); 2095 rval = QLA_FUNCTION_FAILED; 2096 goto exit; 2097 } 2098 /* Each function sets its supported Minor version. */ 2099 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2100 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2101 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2102 2103 if (ha->flags.nic_core_reset_owner) { 2104 memset(config, 0, sizeof(config)); 2105 if (!qla81xx_get_port_config(vha, config)) 2106 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2107 QLA8XXX_DEV_READY); 2108 } 2109 2110 rval = qla83xx_idc_state_handler(vha); 2111 2112 exit: 2113 qla83xx_idc_unlock(vha, 0); 2114 2115 return rval; 2116 } 2117 2118 /* 2119 * qla2x00_initialize_adapter 2120 * Initialize board. 2121 * 2122 * Input: 2123 * ha = adapter block pointer. 2124 * 2125 * Returns: 2126 * 0 = success 2127 */ 2128 int 2129 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2130 { 2131 int rval; 2132 struct qla_hw_data *ha = vha->hw; 2133 struct req_que *req = ha->req_q_map[0]; 2134 2135 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2136 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2137 2138 /* Clear adapter flags. */ 2139 vha->flags.online = 0; 2140 ha->flags.chip_reset_done = 0; 2141 vha->flags.reset_active = 0; 2142 ha->flags.pci_channel_io_perm_failure = 0; 2143 ha->flags.eeh_busy = 0; 2144 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2145 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2146 atomic_set(&vha->loop_state, LOOP_DOWN); 2147 vha->device_flags = DFLG_NO_CABLE; 2148 vha->dpc_flags = 0; 2149 vha->flags.management_server_logged_in = 0; 2150 vha->marker_needed = 0; 2151 ha->isp_abort_cnt = 0; 2152 ha->beacon_blink_led = 0; 2153 2154 set_bit(0, ha->req_qid_map); 2155 set_bit(0, ha->rsp_qid_map); 2156 2157 ql_dbg(ql_dbg_init, vha, 0x0040, 2158 "Configuring PCI space...\n"); 2159 rval = ha->isp_ops->pci_config(vha); 2160 if (rval) { 2161 ql_log(ql_log_warn, vha, 0x0044, 2162 "Unable to configure PCI space.\n"); 2163 return (rval); 2164 } 2165 2166 ha->isp_ops->reset_chip(vha); 2167 2168 rval = qla2xxx_get_flash_info(vha); 2169 if (rval) { 2170 ql_log(ql_log_fatal, vha, 0x004f, 2171 "Unable to validate FLASH data.\n"); 2172 return rval; 2173 } 2174 2175 if (IS_QLA8044(ha)) { 2176 qla8044_read_reset_template(vha); 2177 2178 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2179 * If DONRESET_BIT0 is set, drivers should not set dev_state 2180 * to NEED_RESET. But if NEED_RESET is set, drivers should 2181 * should honor the reset. */ 2182 if (ql2xdontresethba == 1) 2183 qla8044_set_idc_dontreset(vha); 2184 } 2185 2186 ha->isp_ops->get_flash_version(vha, req->ring); 2187 ql_dbg(ql_dbg_init, vha, 0x0061, 2188 "Configure NVRAM parameters...\n"); 2189 2190 ha->isp_ops->nvram_config(vha); 2191 2192 if (ha->flags.disable_serdes) { 2193 /* Mask HBA via NVRAM settings? */ 2194 ql_log(ql_log_info, vha, 0x0077, 2195 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2196 return QLA_FUNCTION_FAILED; 2197 } 2198 2199 ql_dbg(ql_dbg_init, vha, 0x0078, 2200 "Verifying loaded RISC code...\n"); 2201 2202 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2203 rval = ha->isp_ops->chip_diag(vha); 2204 if (rval) 2205 return (rval); 2206 rval = qla2x00_setup_chip(vha); 2207 if (rval) 2208 return (rval); 2209 } 2210 2211 if (IS_QLA84XX(ha)) { 2212 ha->cs84xx = qla84xx_get_chip(vha); 2213 if (!ha->cs84xx) { 2214 ql_log(ql_log_warn, vha, 0x00d0, 2215 "Unable to configure ISP84XX.\n"); 2216 return QLA_FUNCTION_FAILED; 2217 } 2218 } 2219 2220 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2221 rval = qla2x00_init_rings(vha); 2222 2223 ha->flags.chip_reset_done = 1; 2224 2225 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2226 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2227 rval = qla84xx_init_chip(vha); 2228 if (rval != QLA_SUCCESS) { 2229 ql_log(ql_log_warn, vha, 0x00d4, 2230 "Unable to initialize ISP84XX.\n"); 2231 qla84xx_put_chip(vha); 2232 } 2233 } 2234 2235 /* Load the NIC Core f/w if we are the first protocol driver. */ 2236 if (IS_QLA8031(ha)) { 2237 rval = qla83xx_nic_core_fw_load(vha); 2238 if (rval) 2239 ql_log(ql_log_warn, vha, 0x0124, 2240 "Error in initializing NIC Core f/w.\n"); 2241 } 2242 2243 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2244 qla24xx_read_fcp_prio_cfg(vha); 2245 2246 if (IS_P3P_TYPE(ha)) 2247 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2248 else 2249 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2250 2251 return (rval); 2252 } 2253 2254 /** 2255 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2256 * @vha: HA context 2257 * 2258 * Returns 0 on success. 2259 */ 2260 int 2261 qla2100_pci_config(scsi_qla_host_t *vha) 2262 { 2263 uint16_t w; 2264 unsigned long flags; 2265 struct qla_hw_data *ha = vha->hw; 2266 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2267 2268 pci_set_master(ha->pdev); 2269 pci_try_set_mwi(ha->pdev); 2270 2271 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2272 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2273 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2274 2275 pci_disable_rom(ha->pdev); 2276 2277 /* Get PCI bus information. */ 2278 spin_lock_irqsave(&ha->hardware_lock, flags); 2279 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2280 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2281 2282 return QLA_SUCCESS; 2283 } 2284 2285 /** 2286 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2287 * @vha: HA context 2288 * 2289 * Returns 0 on success. 2290 */ 2291 int 2292 qla2300_pci_config(scsi_qla_host_t *vha) 2293 { 2294 uint16_t w; 2295 unsigned long flags = 0; 2296 uint32_t cnt; 2297 struct qla_hw_data *ha = vha->hw; 2298 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2299 2300 pci_set_master(ha->pdev); 2301 pci_try_set_mwi(ha->pdev); 2302 2303 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2304 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2305 2306 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2307 w &= ~PCI_COMMAND_INTX_DISABLE; 2308 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2309 2310 /* 2311 * If this is a 2300 card and not 2312, reset the 2312 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2313 * the 2310 also reports itself as a 2300 so we need to get the 2314 * fb revision level -- a 6 indicates it really is a 2300 and 2315 * not a 2310. 2316 */ 2317 if (IS_QLA2300(ha)) { 2318 spin_lock_irqsave(&ha->hardware_lock, flags); 2319 2320 /* Pause RISC. */ 2321 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2322 for (cnt = 0; cnt < 30000; cnt++) { 2323 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2324 break; 2325 2326 udelay(10); 2327 } 2328 2329 /* Select FPM registers. */ 2330 WRT_REG_WORD(®->ctrl_status, 0x20); 2331 RD_REG_WORD(®->ctrl_status); 2332 2333 /* Get the fb rev level */ 2334 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2335 2336 if (ha->fb_rev == FPM_2300) 2337 pci_clear_mwi(ha->pdev); 2338 2339 /* Deselect FPM registers. */ 2340 WRT_REG_WORD(®->ctrl_status, 0x0); 2341 RD_REG_WORD(®->ctrl_status); 2342 2343 /* Release RISC module. */ 2344 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2345 for (cnt = 0; cnt < 30000; cnt++) { 2346 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2347 break; 2348 2349 udelay(10); 2350 } 2351 2352 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2353 } 2354 2355 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2356 2357 pci_disable_rom(ha->pdev); 2358 2359 /* Get PCI bus information. */ 2360 spin_lock_irqsave(&ha->hardware_lock, flags); 2361 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2362 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2363 2364 return QLA_SUCCESS; 2365 } 2366 2367 /** 2368 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2369 * @vha: HA context 2370 * 2371 * Returns 0 on success. 2372 */ 2373 int 2374 qla24xx_pci_config(scsi_qla_host_t *vha) 2375 { 2376 uint16_t w; 2377 unsigned long flags = 0; 2378 struct qla_hw_data *ha = vha->hw; 2379 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2380 2381 pci_set_master(ha->pdev); 2382 pci_try_set_mwi(ha->pdev); 2383 2384 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2385 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2386 w &= ~PCI_COMMAND_INTX_DISABLE; 2387 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2388 2389 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2390 2391 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2392 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2393 pcix_set_mmrbc(ha->pdev, 2048); 2394 2395 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2396 if (pci_is_pcie(ha->pdev)) 2397 pcie_set_readrq(ha->pdev, 4096); 2398 2399 pci_disable_rom(ha->pdev); 2400 2401 ha->chip_revision = ha->pdev->revision; 2402 2403 /* Get PCI bus information. */ 2404 spin_lock_irqsave(&ha->hardware_lock, flags); 2405 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2406 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2407 2408 return QLA_SUCCESS; 2409 } 2410 2411 /** 2412 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2413 * @vha: HA context 2414 * 2415 * Returns 0 on success. 2416 */ 2417 int 2418 qla25xx_pci_config(scsi_qla_host_t *vha) 2419 { 2420 uint16_t w; 2421 struct qla_hw_data *ha = vha->hw; 2422 2423 pci_set_master(ha->pdev); 2424 pci_try_set_mwi(ha->pdev); 2425 2426 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2427 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2428 w &= ~PCI_COMMAND_INTX_DISABLE; 2429 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2430 2431 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2432 if (pci_is_pcie(ha->pdev)) 2433 pcie_set_readrq(ha->pdev, 4096); 2434 2435 pci_disable_rom(ha->pdev); 2436 2437 ha->chip_revision = ha->pdev->revision; 2438 2439 return QLA_SUCCESS; 2440 } 2441 2442 /** 2443 * qla2x00_isp_firmware() - Choose firmware image. 2444 * @vha: HA context 2445 * 2446 * Returns 0 on success. 2447 */ 2448 static int 2449 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2450 { 2451 int rval; 2452 uint16_t loop_id, topo, sw_cap; 2453 uint8_t domain, area, al_pa; 2454 struct qla_hw_data *ha = vha->hw; 2455 2456 /* Assume loading risc code */ 2457 rval = QLA_FUNCTION_FAILED; 2458 2459 if (ha->flags.disable_risc_code_load) { 2460 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2461 2462 /* Verify checksum of loaded RISC code. */ 2463 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2464 if (rval == QLA_SUCCESS) { 2465 /* And, verify we are not in ROM code. */ 2466 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2467 &area, &domain, &topo, &sw_cap); 2468 } 2469 } 2470 2471 if (rval) 2472 ql_dbg(ql_dbg_init, vha, 0x007a, 2473 "**** Load RISC code ****.\n"); 2474 2475 return (rval); 2476 } 2477 2478 /** 2479 * qla2x00_reset_chip() - Reset ISP chip. 2480 * @vha: HA context 2481 * 2482 * Returns 0 on success. 2483 */ 2484 void 2485 qla2x00_reset_chip(scsi_qla_host_t *vha) 2486 { 2487 unsigned long flags = 0; 2488 struct qla_hw_data *ha = vha->hw; 2489 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2490 uint32_t cnt; 2491 uint16_t cmd; 2492 2493 if (unlikely(pci_channel_offline(ha->pdev))) 2494 return; 2495 2496 ha->isp_ops->disable_intrs(ha); 2497 2498 spin_lock_irqsave(&ha->hardware_lock, flags); 2499 2500 /* Turn off master enable */ 2501 cmd = 0; 2502 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2503 cmd &= ~PCI_COMMAND_MASTER; 2504 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2505 2506 if (!IS_QLA2100(ha)) { 2507 /* Pause RISC. */ 2508 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2509 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2510 for (cnt = 0; cnt < 30000; cnt++) { 2511 if ((RD_REG_WORD(®->hccr) & 2512 HCCR_RISC_PAUSE) != 0) 2513 break; 2514 udelay(100); 2515 } 2516 } else { 2517 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2518 udelay(10); 2519 } 2520 2521 /* Select FPM registers. */ 2522 WRT_REG_WORD(®->ctrl_status, 0x20); 2523 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2524 2525 /* FPM Soft Reset. */ 2526 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2527 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2528 2529 /* Toggle Fpm Reset. */ 2530 if (!IS_QLA2200(ha)) { 2531 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2532 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2533 } 2534 2535 /* Select frame buffer registers. */ 2536 WRT_REG_WORD(®->ctrl_status, 0x10); 2537 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2538 2539 /* Reset frame buffer FIFOs. */ 2540 if (IS_QLA2200(ha)) { 2541 WRT_FB_CMD_REG(ha, reg, 0xa000); 2542 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2543 } else { 2544 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2545 2546 /* Read back fb_cmd until zero or 3 seconds max */ 2547 for (cnt = 0; cnt < 3000; cnt++) { 2548 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2549 break; 2550 udelay(100); 2551 } 2552 } 2553 2554 /* Select RISC module registers. */ 2555 WRT_REG_WORD(®->ctrl_status, 0); 2556 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2557 2558 /* Reset RISC processor. */ 2559 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2560 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2561 2562 /* Release RISC processor. */ 2563 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2564 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2565 } 2566 2567 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2568 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2569 2570 /* Reset ISP chip. */ 2571 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2572 2573 /* Wait for RISC to recover from reset. */ 2574 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2575 /* 2576 * It is necessary to for a delay here since the card doesn't 2577 * respond to PCI reads during a reset. On some architectures 2578 * this will result in an MCA. 2579 */ 2580 udelay(20); 2581 for (cnt = 30000; cnt; cnt--) { 2582 if ((RD_REG_WORD(®->ctrl_status) & 2583 CSR_ISP_SOFT_RESET) == 0) 2584 break; 2585 udelay(100); 2586 } 2587 } else 2588 udelay(10); 2589 2590 /* Reset RISC processor. */ 2591 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2592 2593 WRT_REG_WORD(®->semaphore, 0); 2594 2595 /* Release RISC processor. */ 2596 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2597 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2598 2599 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2600 for (cnt = 0; cnt < 30000; cnt++) { 2601 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2602 break; 2603 2604 udelay(100); 2605 } 2606 } else 2607 udelay(100); 2608 2609 /* Turn on master enable */ 2610 cmd |= PCI_COMMAND_MASTER; 2611 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2612 2613 /* Disable RISC pause on FPM parity error. */ 2614 if (!IS_QLA2100(ha)) { 2615 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2616 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2617 } 2618 2619 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2620 } 2621 2622 /** 2623 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2624 * @vha: HA context 2625 * 2626 * Returns 0 on success. 2627 */ 2628 static int 2629 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2630 { 2631 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2632 2633 if (!IS_QLA81XX(vha->hw)) 2634 return QLA_SUCCESS; 2635 2636 return qla81xx_write_mpi_register(vha, mb); 2637 } 2638 2639 /** 2640 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2641 * @vha: HA context 2642 * 2643 * Returns 0 on success. 2644 */ 2645 static inline int 2646 qla24xx_reset_risc(scsi_qla_host_t *vha) 2647 { 2648 unsigned long flags = 0; 2649 struct qla_hw_data *ha = vha->hw; 2650 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2651 uint32_t cnt; 2652 uint16_t wd; 2653 static int abts_cnt; /* ISP abort retry counts */ 2654 int rval = QLA_SUCCESS; 2655 2656 spin_lock_irqsave(&ha->hardware_lock, flags); 2657 2658 /* Reset RISC. */ 2659 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2660 for (cnt = 0; cnt < 30000; cnt++) { 2661 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2662 break; 2663 2664 udelay(10); 2665 } 2666 2667 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2668 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2669 2670 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2671 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2672 RD_REG_DWORD(®->hccr), 2673 RD_REG_DWORD(®->ctrl_status), 2674 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2675 2676 WRT_REG_DWORD(®->ctrl_status, 2677 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2678 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2679 2680 udelay(100); 2681 2682 /* Wait for firmware to complete NVRAM accesses. */ 2683 RD_REG_WORD(®->mailbox0); 2684 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2685 rval == QLA_SUCCESS; cnt--) { 2686 barrier(); 2687 if (cnt) 2688 udelay(5); 2689 else 2690 rval = QLA_FUNCTION_TIMEOUT; 2691 } 2692 2693 if (rval == QLA_SUCCESS) 2694 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2695 2696 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2697 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2698 RD_REG_DWORD(®->hccr), 2699 RD_REG_DWORD(®->mailbox0)); 2700 2701 /* Wait for soft-reset to complete. */ 2702 RD_REG_DWORD(®->ctrl_status); 2703 for (cnt = 0; cnt < 60; cnt++) { 2704 barrier(); 2705 if ((RD_REG_DWORD(®->ctrl_status) & 2706 CSRX_ISP_SOFT_RESET) == 0) 2707 break; 2708 2709 udelay(5); 2710 } 2711 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2712 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2713 2714 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2715 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2716 RD_REG_DWORD(®->hccr), 2717 RD_REG_DWORD(®->ctrl_status)); 2718 2719 /* If required, do an MPI FW reset now */ 2720 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2721 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2722 if (++abts_cnt < 5) { 2723 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2724 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2725 } else { 2726 /* 2727 * We exhausted the ISP abort retries. We have to 2728 * set the board offline. 2729 */ 2730 abts_cnt = 0; 2731 vha->flags.online = 0; 2732 } 2733 } 2734 } 2735 2736 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2737 RD_REG_DWORD(®->hccr); 2738 2739 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2740 RD_REG_DWORD(®->hccr); 2741 2742 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2743 RD_REG_DWORD(®->hccr); 2744 2745 RD_REG_WORD(®->mailbox0); 2746 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2747 rval == QLA_SUCCESS; cnt--) { 2748 barrier(); 2749 if (cnt) 2750 udelay(5); 2751 else 2752 rval = QLA_FUNCTION_TIMEOUT; 2753 } 2754 if (rval == QLA_SUCCESS) 2755 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2756 2757 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2758 "Host Risc 0x%x, mailbox0 0x%x\n", 2759 RD_REG_DWORD(®->hccr), 2760 RD_REG_WORD(®->mailbox0)); 2761 2762 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2763 2764 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2765 "Driver in %s mode\n", 2766 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2767 2768 if (IS_NOPOLLING_TYPE(ha)) 2769 ha->isp_ops->enable_intrs(ha); 2770 2771 return rval; 2772 } 2773 2774 static void 2775 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2776 { 2777 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2778 2779 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2780 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2781 2782 } 2783 2784 static void 2785 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2786 { 2787 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2788 2789 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2790 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2791 } 2792 2793 static void 2794 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2795 { 2796 uint32_t wd32 = 0; 2797 uint delta_msec = 100; 2798 uint elapsed_msec = 0; 2799 uint timeout_msec; 2800 ulong n; 2801 2802 if (vha->hw->pdev->subsystem_device != 0x0175 && 2803 vha->hw->pdev->subsystem_device != 0x0240) 2804 return; 2805 2806 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2807 udelay(100); 2808 2809 attempt: 2810 timeout_msec = TIMEOUT_SEMAPHORE; 2811 n = timeout_msec / delta_msec; 2812 while (n--) { 2813 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2814 qla25xx_read_risc_sema_reg(vha, &wd32); 2815 if (wd32 & RISC_SEMAPHORE) 2816 break; 2817 msleep(delta_msec); 2818 elapsed_msec += delta_msec; 2819 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2820 goto force; 2821 } 2822 2823 if (!(wd32 & RISC_SEMAPHORE)) 2824 goto force; 2825 2826 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2827 goto acquired; 2828 2829 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2830 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2831 n = timeout_msec / delta_msec; 2832 while (n--) { 2833 qla25xx_read_risc_sema_reg(vha, &wd32); 2834 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2835 break; 2836 msleep(delta_msec); 2837 elapsed_msec += delta_msec; 2838 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2839 goto force; 2840 } 2841 2842 if (wd32 & RISC_SEMAPHORE_FORCE) 2843 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2844 2845 goto attempt; 2846 2847 force: 2848 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2849 2850 acquired: 2851 return; 2852 } 2853 2854 /** 2855 * qla24xx_reset_chip() - Reset ISP24xx chip. 2856 * @vha: HA context 2857 * 2858 * Returns 0 on success. 2859 */ 2860 void 2861 qla24xx_reset_chip(scsi_qla_host_t *vha) 2862 { 2863 struct qla_hw_data *ha = vha->hw; 2864 2865 if (pci_channel_offline(ha->pdev) && 2866 ha->flags.pci_channel_io_perm_failure) { 2867 return; 2868 } 2869 2870 ha->isp_ops->disable_intrs(ha); 2871 2872 qla25xx_manipulate_risc_semaphore(vha); 2873 2874 /* Perform RISC reset. */ 2875 qla24xx_reset_risc(vha); 2876 } 2877 2878 /** 2879 * qla2x00_chip_diag() - Test chip for proper operation. 2880 * @vha: HA context 2881 * 2882 * Returns 0 on success. 2883 */ 2884 int 2885 qla2x00_chip_diag(scsi_qla_host_t *vha) 2886 { 2887 int rval; 2888 struct qla_hw_data *ha = vha->hw; 2889 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2890 unsigned long flags = 0; 2891 uint16_t data; 2892 uint32_t cnt; 2893 uint16_t mb[5]; 2894 struct req_que *req = ha->req_q_map[0]; 2895 2896 /* Assume a failed state */ 2897 rval = QLA_FUNCTION_FAILED; 2898 2899 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2900 ®->flash_address); 2901 2902 spin_lock_irqsave(&ha->hardware_lock, flags); 2903 2904 /* Reset ISP chip. */ 2905 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2906 2907 /* 2908 * We need to have a delay here since the card will not respond while 2909 * in reset causing an MCA on some architectures. 2910 */ 2911 udelay(20); 2912 data = qla2x00_debounce_register(®->ctrl_status); 2913 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2914 udelay(5); 2915 data = RD_REG_WORD(®->ctrl_status); 2916 barrier(); 2917 } 2918 2919 if (!cnt) 2920 goto chip_diag_failed; 2921 2922 ql_dbg(ql_dbg_init, vha, 0x007c, 2923 "Reset register cleared by chip reset.\n"); 2924 2925 /* Reset RISC processor. */ 2926 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2927 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2928 2929 /* Workaround for QLA2312 PCI parity error */ 2930 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2931 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2932 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2933 udelay(5); 2934 data = RD_MAILBOX_REG(ha, reg, 0); 2935 barrier(); 2936 } 2937 } else 2938 udelay(10); 2939 2940 if (!cnt) 2941 goto chip_diag_failed; 2942 2943 /* Check product ID of chip */ 2944 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2945 2946 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2947 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2948 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2949 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2950 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2951 mb[3] != PROD_ID_3) { 2952 ql_log(ql_log_warn, vha, 0x0062, 2953 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2954 mb[1], mb[2], mb[3]); 2955 2956 goto chip_diag_failed; 2957 } 2958 ha->product_id[0] = mb[1]; 2959 ha->product_id[1] = mb[2]; 2960 ha->product_id[2] = mb[3]; 2961 ha->product_id[3] = mb[4]; 2962 2963 /* Adjust fw RISC transfer size */ 2964 if (req->length > 1024) 2965 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2966 else 2967 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2968 req->length; 2969 2970 if (IS_QLA2200(ha) && 2971 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2972 /* Limit firmware transfer size with a 2200A */ 2973 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2974 2975 ha->device_type |= DT_ISP2200A; 2976 ha->fw_transfer_size = 128; 2977 } 2978 2979 /* Wrap Incoming Mailboxes Test. */ 2980 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2981 2982 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2983 rval = qla2x00_mbx_reg_test(vha); 2984 if (rval) 2985 ql_log(ql_log_warn, vha, 0x0080, 2986 "Failed mailbox send register test.\n"); 2987 else 2988 /* Flag a successful rval */ 2989 rval = QLA_SUCCESS; 2990 spin_lock_irqsave(&ha->hardware_lock, flags); 2991 2992 chip_diag_failed: 2993 if (rval) 2994 ql_log(ql_log_info, vha, 0x0081, 2995 "Chip diagnostics **** FAILED ****.\n"); 2996 2997 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2998 2999 return (rval); 3000 } 3001 3002 /** 3003 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3004 * @vha: HA context 3005 * 3006 * Returns 0 on success. 3007 */ 3008 int 3009 qla24xx_chip_diag(scsi_qla_host_t *vha) 3010 { 3011 int rval; 3012 struct qla_hw_data *ha = vha->hw; 3013 struct req_que *req = ha->req_q_map[0]; 3014 3015 if (IS_P3P_TYPE(ha)) 3016 return QLA_SUCCESS; 3017 3018 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3019 3020 rval = qla2x00_mbx_reg_test(vha); 3021 if (rval) { 3022 ql_log(ql_log_warn, vha, 0x0082, 3023 "Failed mailbox send register test.\n"); 3024 } else { 3025 /* Flag a successful rval */ 3026 rval = QLA_SUCCESS; 3027 } 3028 3029 return rval; 3030 } 3031 3032 static void 3033 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3034 { 3035 int rval; 3036 dma_addr_t tc_dma; 3037 void *tc; 3038 struct qla_hw_data *ha = vha->hw; 3039 3040 if (ha->eft) { 3041 ql_dbg(ql_dbg_init, vha, 0x00bd, 3042 "%s: Offload Mem is already allocated.\n", 3043 __func__); 3044 return; 3045 } 3046 3047 if (IS_FWI2_CAPABLE(ha)) { 3048 /* Allocate memory for Fibre Channel Event Buffer. */ 3049 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3050 !IS_QLA27XX(ha)) 3051 goto try_eft; 3052 3053 if (ha->fce) 3054 dma_free_coherent(&ha->pdev->dev, 3055 FCE_SIZE, ha->fce, ha->fce_dma); 3056 3057 /* Allocate memory for Fibre Channel Event Buffer. */ 3058 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3059 GFP_KERNEL); 3060 if (!tc) { 3061 ql_log(ql_log_warn, vha, 0x00be, 3062 "Unable to allocate (%d KB) for FCE.\n", 3063 FCE_SIZE / 1024); 3064 goto try_eft; 3065 } 3066 3067 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3068 ha->fce_mb, &ha->fce_bufs); 3069 if (rval) { 3070 ql_log(ql_log_warn, vha, 0x00bf, 3071 "Unable to initialize FCE (%d).\n", rval); 3072 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 3073 tc_dma); 3074 ha->flags.fce_enabled = 0; 3075 goto try_eft; 3076 } 3077 ql_dbg(ql_dbg_init, vha, 0x00c0, 3078 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 3079 3080 ha->flags.fce_enabled = 1; 3081 ha->fce_dma = tc_dma; 3082 ha->fce = tc; 3083 3084 try_eft: 3085 if (ha->eft) 3086 dma_free_coherent(&ha->pdev->dev, 3087 EFT_SIZE, ha->eft, ha->eft_dma); 3088 3089 /* Allocate memory for Extended Trace Buffer. */ 3090 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3091 GFP_KERNEL); 3092 if (!tc) { 3093 ql_log(ql_log_warn, vha, 0x00c1, 3094 "Unable to allocate (%d KB) for EFT.\n", 3095 EFT_SIZE / 1024); 3096 goto eft_err; 3097 } 3098 3099 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3100 if (rval) { 3101 ql_log(ql_log_warn, vha, 0x00c2, 3102 "Unable to initialize EFT (%d).\n", rval); 3103 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 3104 tc_dma); 3105 goto eft_err; 3106 } 3107 ql_dbg(ql_dbg_init, vha, 0x00c3, 3108 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3109 3110 ha->eft_dma = tc_dma; 3111 ha->eft = tc; 3112 } 3113 3114 eft_err: 3115 return; 3116 } 3117 3118 void 3119 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3120 { 3121 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3122 eft_size, fce_size, mq_size; 3123 struct qla_hw_data *ha = vha->hw; 3124 struct req_que *req = ha->req_q_map[0]; 3125 struct rsp_que *rsp = ha->rsp_q_map[0]; 3126 struct qla2xxx_fw_dump *fw_dump; 3127 3128 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3129 req_q_size = rsp_q_size = 0; 3130 3131 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3132 fixed_size = sizeof(struct qla2100_fw_dump); 3133 } else if (IS_QLA23XX(ha)) { 3134 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3135 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3136 sizeof(uint16_t); 3137 } else if (IS_FWI2_CAPABLE(ha)) { 3138 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 3139 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3140 else if (IS_QLA81XX(ha)) 3141 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3142 else if (IS_QLA25XX(ha)) 3143 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3144 else 3145 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3146 3147 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3148 sizeof(uint32_t); 3149 if (ha->mqenable) { 3150 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 3151 mq_size = sizeof(struct qla2xxx_mq_chain); 3152 /* 3153 * Allocate maximum buffer size for all queues. 3154 * Resizing must be done at end-of-dump processing. 3155 */ 3156 mq_size += ha->max_req_queues * 3157 (req->length * sizeof(request_t)); 3158 mq_size += ha->max_rsp_queues * 3159 (rsp->length * sizeof(response_t)); 3160 } 3161 if (ha->tgt.atio_ring) 3162 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3163 /* Allocate memory for Fibre Channel Event Buffer. */ 3164 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3165 !IS_QLA27XX(ha)) 3166 goto try_eft; 3167 3168 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3169 try_eft: 3170 ql_dbg(ql_dbg_init, vha, 0x00c3, 3171 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3172 eft_size = EFT_SIZE; 3173 } 3174 3175 if (IS_QLA27XX(ha)) { 3176 if (!ha->fw_dump_template) { 3177 ql_log(ql_log_warn, vha, 0x00ba, 3178 "Failed missing fwdump template\n"); 3179 return; 3180 } 3181 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 3182 ql_dbg(ql_dbg_init, vha, 0x00fa, 3183 "-> allocating fwdump (%x bytes)...\n", dump_size); 3184 goto allocate; 3185 } 3186 3187 req_q_size = req->length * sizeof(request_t); 3188 rsp_q_size = rsp->length * sizeof(response_t); 3189 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3190 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 3191 ha->chain_offset = dump_size; 3192 dump_size += mq_size + fce_size; 3193 3194 if (ha->exchoffld_buf) 3195 dump_size += sizeof(struct qla2xxx_offld_chain) + 3196 ha->exchoffld_size; 3197 if (ha->exlogin_buf) 3198 dump_size += sizeof(struct qla2xxx_offld_chain) + 3199 ha->exlogin_size; 3200 3201 allocate: 3202 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 3203 fw_dump = vmalloc(dump_size); 3204 if (!fw_dump) { 3205 ql_log(ql_log_warn, vha, 0x00c4, 3206 "Unable to allocate (%d KB) for firmware dump.\n", 3207 dump_size / 1024); 3208 } else { 3209 if (ha->fw_dump) 3210 vfree(ha->fw_dump); 3211 ha->fw_dump = fw_dump; 3212 3213 ha->fw_dump_len = dump_size; 3214 ql_dbg(ql_dbg_init, vha, 0x00c5, 3215 "Allocated (%d KB) for firmware dump.\n", 3216 dump_size / 1024); 3217 3218 if (IS_QLA27XX(ha)) 3219 return; 3220 3221 ha->fw_dump->signature[0] = 'Q'; 3222 ha->fw_dump->signature[1] = 'L'; 3223 ha->fw_dump->signature[2] = 'G'; 3224 ha->fw_dump->signature[3] = 'C'; 3225 ha->fw_dump->version = htonl(1); 3226 3227 ha->fw_dump->fixed_size = htonl(fixed_size); 3228 ha->fw_dump->mem_size = htonl(mem_size); 3229 ha->fw_dump->req_q_size = htonl(req_q_size); 3230 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3231 3232 ha->fw_dump->eft_size = htonl(eft_size); 3233 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3234 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3235 3236 ha->fw_dump->header_size = 3237 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3238 } 3239 } 3240 } 3241 3242 static int 3243 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3244 { 3245 #define MPS_MASK 0xe0 3246 int rval; 3247 uint16_t dc; 3248 uint32_t dw; 3249 3250 if (!IS_QLA81XX(vha->hw)) 3251 return QLA_SUCCESS; 3252 3253 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3254 if (rval != QLA_SUCCESS) { 3255 ql_log(ql_log_warn, vha, 0x0105, 3256 "Unable to acquire semaphore.\n"); 3257 goto done; 3258 } 3259 3260 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3261 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3262 if (rval != QLA_SUCCESS) { 3263 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3264 goto done_release; 3265 } 3266 3267 dc &= MPS_MASK; 3268 if (dc == (dw & MPS_MASK)) 3269 goto done_release; 3270 3271 dw &= ~MPS_MASK; 3272 dw |= dc; 3273 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3274 if (rval != QLA_SUCCESS) { 3275 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3276 } 3277 3278 done_release: 3279 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3280 if (rval != QLA_SUCCESS) { 3281 ql_log(ql_log_warn, vha, 0x006d, 3282 "Unable to release semaphore.\n"); 3283 } 3284 3285 done: 3286 return rval; 3287 } 3288 3289 int 3290 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3291 { 3292 /* Don't try to reallocate the array */ 3293 if (req->outstanding_cmds) 3294 return QLA_SUCCESS; 3295 3296 if (!IS_FWI2_CAPABLE(ha)) 3297 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3298 else { 3299 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3300 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3301 else 3302 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3303 } 3304 3305 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3306 sizeof(srb_t *), 3307 GFP_KERNEL); 3308 3309 if (!req->outstanding_cmds) { 3310 /* 3311 * Try to allocate a minimal size just so we can get through 3312 * initialization. 3313 */ 3314 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3315 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3316 sizeof(srb_t *), 3317 GFP_KERNEL); 3318 3319 if (!req->outstanding_cmds) { 3320 ql_log(ql_log_fatal, NULL, 0x0126, 3321 "Failed to allocate memory for " 3322 "outstanding_cmds for req_que %p.\n", req); 3323 req->num_outstanding_cmds = 0; 3324 return QLA_FUNCTION_FAILED; 3325 } 3326 } 3327 3328 return QLA_SUCCESS; 3329 } 3330 3331 #define PRINT_FIELD(_field, _flag, _str) { \ 3332 if (a0->_field & _flag) {\ 3333 if (p) {\ 3334 strcat(ptr, "|");\ 3335 ptr++;\ 3336 leftover--;\ 3337 } \ 3338 len = snprintf(ptr, leftover, "%s", _str); \ 3339 p = 1;\ 3340 leftover -= len;\ 3341 ptr += len; \ 3342 } \ 3343 } 3344 3345 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3346 { 3347 #define STR_LEN 64 3348 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3349 u8 str[STR_LEN], *ptr, p; 3350 int leftover, len; 3351 3352 memset(str, 0, STR_LEN); 3353 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3354 ql_dbg(ql_dbg_init, vha, 0x015a, 3355 "SFP MFG Name: %s\n", str); 3356 3357 memset(str, 0, STR_LEN); 3358 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3359 ql_dbg(ql_dbg_init, vha, 0x015c, 3360 "SFP Part Name: %s\n", str); 3361 3362 /* media */ 3363 memset(str, 0, STR_LEN); 3364 ptr = str; 3365 leftover = STR_LEN; 3366 p = len = 0; 3367 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3368 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3369 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3370 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3371 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3372 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3373 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3374 ql_dbg(ql_dbg_init, vha, 0x0160, 3375 "SFP Media: %s\n", str); 3376 3377 /* link length */ 3378 memset(str, 0, STR_LEN); 3379 ptr = str; 3380 leftover = STR_LEN; 3381 p = len = 0; 3382 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3383 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3384 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3385 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3386 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3387 ql_dbg(ql_dbg_init, vha, 0x0196, 3388 "SFP Link Length: %s\n", str); 3389 3390 memset(str, 0, STR_LEN); 3391 ptr = str; 3392 leftover = STR_LEN; 3393 p = len = 0; 3394 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3395 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3396 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3397 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3398 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3399 ql_dbg(ql_dbg_init, vha, 0x016e, 3400 "SFP FC Link Tech: %s\n", str); 3401 3402 if (a0->length_km) 3403 ql_dbg(ql_dbg_init, vha, 0x016f, 3404 "SFP Distant: %d km\n", a0->length_km); 3405 if (a0->length_100m) 3406 ql_dbg(ql_dbg_init, vha, 0x0170, 3407 "SFP Distant: %d m\n", a0->length_100m*100); 3408 if (a0->length_50um_10m) 3409 ql_dbg(ql_dbg_init, vha, 0x0189, 3410 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3411 if (a0->length_62um_10m) 3412 ql_dbg(ql_dbg_init, vha, 0x018a, 3413 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3414 if (a0->length_om4_10m) 3415 ql_dbg(ql_dbg_init, vha, 0x0194, 3416 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3417 if (a0->length_om3_10m) 3418 ql_dbg(ql_dbg_init, vha, 0x0195, 3419 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3420 } 3421 3422 3423 /* 3424 * Return Code: 3425 * QLA_SUCCESS: no action 3426 * QLA_INTERFACE_ERROR: SFP is not there. 3427 * QLA_FUNCTION_FAILED: detected New SFP 3428 */ 3429 int 3430 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3431 { 3432 int rc = QLA_SUCCESS; 3433 struct sff_8247_a0 *a; 3434 struct qla_hw_data *ha = vha->hw; 3435 3436 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3437 goto out; 3438 3439 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3440 if (rc) 3441 goto out; 3442 3443 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3444 qla2xxx_print_sfp_info(vha); 3445 3446 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3447 /* long range */ 3448 ha->flags.detected_lr_sfp = 1; 3449 3450 if (a->length_km > 5 || a->length_100m > 50) 3451 ha->long_range_distance = LR_DISTANCE_10K; 3452 else 3453 ha->long_range_distance = LR_DISTANCE_5K; 3454 3455 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3456 ql_dbg(ql_dbg_async, vha, 0x507b, 3457 "Detected Long Range SFP.\n"); 3458 } else { 3459 /* short range */ 3460 ha->flags.detected_lr_sfp = 0; 3461 if (ha->flags.using_lr_setting) 3462 ql_dbg(ql_dbg_async, vha, 0x5084, 3463 "Detected Short Range SFP.\n"); 3464 } 3465 3466 if (!vha->flags.init_done) 3467 rc = QLA_SUCCESS; 3468 out: 3469 return rc; 3470 } 3471 3472 /** 3473 * qla2x00_setup_chip() - Load and start RISC firmware. 3474 * @vha: HA context 3475 * 3476 * Returns 0 on success. 3477 */ 3478 static int 3479 qla2x00_setup_chip(scsi_qla_host_t *vha) 3480 { 3481 int rval; 3482 uint32_t srisc_address = 0; 3483 struct qla_hw_data *ha = vha->hw; 3484 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3485 unsigned long flags; 3486 uint16_t fw_major_version; 3487 3488 if (IS_P3P_TYPE(ha)) { 3489 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3490 if (rval == QLA_SUCCESS) { 3491 qla2x00_stop_firmware(vha); 3492 goto enable_82xx_npiv; 3493 } else 3494 goto failed; 3495 } 3496 3497 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3498 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3499 spin_lock_irqsave(&ha->hardware_lock, flags); 3500 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3501 RD_REG_WORD(®->hccr); 3502 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3503 } 3504 3505 qla81xx_mpi_sync(vha); 3506 3507 /* Load firmware sequences */ 3508 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3509 if (rval == QLA_SUCCESS) { 3510 ql_dbg(ql_dbg_init, vha, 0x00c9, 3511 "Verifying Checksum of loaded RISC code.\n"); 3512 3513 rval = qla2x00_verify_checksum(vha, srisc_address); 3514 if (rval == QLA_SUCCESS) { 3515 /* Start firmware execution. */ 3516 ql_dbg(ql_dbg_init, vha, 0x00ca, 3517 "Starting firmware.\n"); 3518 3519 if (ql2xexlogins) 3520 ha->flags.exlogins_enabled = 1; 3521 3522 if (qla_is_exch_offld_enabled(vha)) 3523 ha->flags.exchoffld_enabled = 1; 3524 3525 rval = qla2x00_execute_fw(vha, srisc_address); 3526 /* Retrieve firmware information. */ 3527 if (rval == QLA_SUCCESS) { 3528 qla24xx_detect_sfp(vha); 3529 3530 rval = qla2x00_set_exlogins_buffer(vha); 3531 if (rval != QLA_SUCCESS) 3532 goto failed; 3533 3534 rval = qla2x00_set_exchoffld_buffer(vha); 3535 if (rval != QLA_SUCCESS) 3536 goto failed; 3537 3538 enable_82xx_npiv: 3539 fw_major_version = ha->fw_major_version; 3540 if (IS_P3P_TYPE(ha)) 3541 qla82xx_check_md_needed(vha); 3542 else 3543 rval = qla2x00_get_fw_version(vha); 3544 if (rval != QLA_SUCCESS) 3545 goto failed; 3546 ha->flags.npiv_supported = 0; 3547 if (IS_QLA2XXX_MIDTYPE(ha) && 3548 (ha->fw_attributes & BIT_2)) { 3549 ha->flags.npiv_supported = 1; 3550 if ((!ha->max_npiv_vports) || 3551 ((ha->max_npiv_vports + 1) % 3552 MIN_MULTI_ID_FABRIC)) 3553 ha->max_npiv_vports = 3554 MIN_MULTI_ID_FABRIC - 1; 3555 } 3556 qla2x00_get_resource_cnts(vha); 3557 3558 /* 3559 * Allocate the array of outstanding commands 3560 * now that we know the firmware resources. 3561 */ 3562 rval = qla2x00_alloc_outstanding_cmds(ha, 3563 vha->req); 3564 if (rval != QLA_SUCCESS) 3565 goto failed; 3566 3567 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3568 qla2x00_alloc_offload_mem(vha); 3569 3570 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3571 qla2x00_alloc_fw_dump(vha); 3572 3573 } else { 3574 goto failed; 3575 } 3576 } else { 3577 ql_log(ql_log_fatal, vha, 0x00cd, 3578 "ISP Firmware failed checksum.\n"); 3579 goto failed; 3580 } 3581 } else 3582 goto failed; 3583 3584 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3585 /* Enable proper parity. */ 3586 spin_lock_irqsave(&ha->hardware_lock, flags); 3587 if (IS_QLA2300(ha)) 3588 /* SRAM parity */ 3589 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3590 else 3591 /* SRAM, Instruction RAM and GP RAM parity */ 3592 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3593 RD_REG_WORD(®->hccr); 3594 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3595 } 3596 3597 if (IS_QLA27XX(ha)) 3598 ha->flags.fac_supported = 1; 3599 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3600 uint32_t size; 3601 3602 rval = qla81xx_fac_get_sector_size(vha, &size); 3603 if (rval == QLA_SUCCESS) { 3604 ha->flags.fac_supported = 1; 3605 ha->fdt_block_size = size << 2; 3606 } else { 3607 ql_log(ql_log_warn, vha, 0x00ce, 3608 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3609 ha->fw_major_version, ha->fw_minor_version, 3610 ha->fw_subminor_version); 3611 3612 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3613 ha->flags.fac_supported = 0; 3614 rval = QLA_SUCCESS; 3615 } 3616 } 3617 } 3618 failed: 3619 if (rval) { 3620 ql_log(ql_log_fatal, vha, 0x00cf, 3621 "Setup chip ****FAILED****.\n"); 3622 } 3623 3624 return (rval); 3625 } 3626 3627 /** 3628 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3629 * @rsp: response queue 3630 * 3631 * Beginning of request ring has initialization control block already built 3632 * by nvram config routine. 3633 * 3634 * Returns 0 on success. 3635 */ 3636 void 3637 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3638 { 3639 uint16_t cnt; 3640 response_t *pkt; 3641 3642 rsp->ring_ptr = rsp->ring; 3643 rsp->ring_index = 0; 3644 rsp->status_srb = NULL; 3645 pkt = rsp->ring_ptr; 3646 for (cnt = 0; cnt < rsp->length; cnt++) { 3647 pkt->signature = RESPONSE_PROCESSED; 3648 pkt++; 3649 } 3650 } 3651 3652 /** 3653 * qla2x00_update_fw_options() - Read and process firmware options. 3654 * @vha: HA context 3655 * 3656 * Returns 0 on success. 3657 */ 3658 void 3659 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3660 { 3661 uint16_t swing, emphasis, tx_sens, rx_sens; 3662 struct qla_hw_data *ha = vha->hw; 3663 3664 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3665 qla2x00_get_fw_options(vha, ha->fw_options); 3666 3667 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3668 return; 3669 3670 /* Serial Link options. */ 3671 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3672 "Serial link options.\n"); 3673 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3674 (uint8_t *)&ha->fw_seriallink_options, 3675 sizeof(ha->fw_seriallink_options)); 3676 3677 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3678 if (ha->fw_seriallink_options[3] & BIT_2) { 3679 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3680 3681 /* 1G settings */ 3682 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3683 emphasis = (ha->fw_seriallink_options[2] & 3684 (BIT_4 | BIT_3)) >> 3; 3685 tx_sens = ha->fw_seriallink_options[0] & 3686 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3687 rx_sens = (ha->fw_seriallink_options[0] & 3688 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3689 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3690 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3691 if (rx_sens == 0x0) 3692 rx_sens = 0x3; 3693 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3694 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3695 ha->fw_options[10] |= BIT_5 | 3696 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3697 (tx_sens & (BIT_1 | BIT_0)); 3698 3699 /* 2G settings */ 3700 swing = (ha->fw_seriallink_options[2] & 3701 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3702 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3703 tx_sens = ha->fw_seriallink_options[1] & 3704 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3705 rx_sens = (ha->fw_seriallink_options[1] & 3706 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3707 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3708 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3709 if (rx_sens == 0x0) 3710 rx_sens = 0x3; 3711 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3712 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3713 ha->fw_options[11] |= BIT_5 | 3714 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3715 (tx_sens & (BIT_1 | BIT_0)); 3716 } 3717 3718 /* FCP2 options. */ 3719 /* Return command IOCBs without waiting for an ABTS to complete. */ 3720 ha->fw_options[3] |= BIT_13; 3721 3722 /* LED scheme. */ 3723 if (ha->flags.enable_led_scheme) 3724 ha->fw_options[2] |= BIT_12; 3725 3726 /* Detect ISP6312. */ 3727 if (IS_QLA6312(ha)) 3728 ha->fw_options[2] |= BIT_13; 3729 3730 /* Set Retry FLOGI in case of P2P connection */ 3731 if (ha->operating_mode == P2P) { 3732 ha->fw_options[2] |= BIT_3; 3733 ql_dbg(ql_dbg_disc, vha, 0x2100, 3734 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3735 __func__, ha->fw_options[2]); 3736 } 3737 3738 /* Update firmware options. */ 3739 qla2x00_set_fw_options(vha, ha->fw_options); 3740 } 3741 3742 void 3743 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3744 { 3745 int rval; 3746 struct qla_hw_data *ha = vha->hw; 3747 3748 if (IS_P3P_TYPE(ha)) 3749 return; 3750 3751 /* Hold status IOCBs until ABTS response received. */ 3752 if (ql2xfwholdabts) 3753 ha->fw_options[3] |= BIT_12; 3754 3755 /* Set Retry FLOGI in case of P2P connection */ 3756 if (ha->operating_mode == P2P) { 3757 ha->fw_options[2] |= BIT_3; 3758 ql_dbg(ql_dbg_disc, vha, 0x2101, 3759 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3760 __func__, ha->fw_options[2]); 3761 } 3762 3763 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3764 if (ql2xmvasynctoatio && 3765 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3766 if (qla_tgt_mode_enabled(vha) || 3767 qla_dual_mode_enabled(vha)) 3768 ha->fw_options[2] |= BIT_11; 3769 else 3770 ha->fw_options[2] &= ~BIT_11; 3771 } 3772 3773 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3774 /* 3775 * Tell FW to track each exchange to prevent 3776 * driver from using stale exchange. 3777 */ 3778 if (qla_tgt_mode_enabled(vha) || 3779 qla_dual_mode_enabled(vha)) 3780 ha->fw_options[2] |= BIT_4; 3781 else 3782 ha->fw_options[2] &= ~BIT_4; 3783 3784 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3785 if (qla2xuseresexchforels) 3786 ha->fw_options[2] |= BIT_8; 3787 else 3788 ha->fw_options[2] &= ~BIT_8; 3789 } 3790 3791 ql_dbg(ql_dbg_init, vha, 0x00e8, 3792 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3793 __func__, ha->fw_options[1], ha->fw_options[2], 3794 ha->fw_options[3], vha->host->active_mode); 3795 3796 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3797 qla2x00_set_fw_options(vha, ha->fw_options); 3798 3799 /* Update Serial Link options. */ 3800 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3801 return; 3802 3803 rval = qla2x00_set_serdes_params(vha, 3804 le16_to_cpu(ha->fw_seriallink_options24[1]), 3805 le16_to_cpu(ha->fw_seriallink_options24[2]), 3806 le16_to_cpu(ha->fw_seriallink_options24[3])); 3807 if (rval != QLA_SUCCESS) { 3808 ql_log(ql_log_warn, vha, 0x0104, 3809 "Unable to update Serial Link options (%x).\n", rval); 3810 } 3811 } 3812 3813 void 3814 qla2x00_config_rings(struct scsi_qla_host *vha) 3815 { 3816 struct qla_hw_data *ha = vha->hw; 3817 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3818 struct req_que *req = ha->req_q_map[0]; 3819 struct rsp_que *rsp = ha->rsp_q_map[0]; 3820 3821 /* Setup ring parameters in initialization control block. */ 3822 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3823 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3824 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3825 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3826 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3827 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3828 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3829 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3830 3831 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3832 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3833 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3834 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3835 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3836 } 3837 3838 void 3839 qla24xx_config_rings(struct scsi_qla_host *vha) 3840 { 3841 struct qla_hw_data *ha = vha->hw; 3842 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3843 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3844 struct qla_msix_entry *msix; 3845 struct init_cb_24xx *icb; 3846 uint16_t rid = 0; 3847 struct req_que *req = ha->req_q_map[0]; 3848 struct rsp_que *rsp = ha->rsp_q_map[0]; 3849 3850 /* Setup ring parameters in initialization control block. */ 3851 icb = (struct init_cb_24xx *)ha->init_cb; 3852 icb->request_q_outpointer = cpu_to_le16(0); 3853 icb->response_q_inpointer = cpu_to_le16(0); 3854 icb->request_q_length = cpu_to_le16(req->length); 3855 icb->response_q_length = cpu_to_le16(rsp->length); 3856 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3857 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3858 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3859 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3860 3861 /* Setup ATIO queue dma pointers for target mode */ 3862 icb->atio_q_inpointer = cpu_to_le16(0); 3863 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3864 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3865 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3866 3867 if (IS_SHADOW_REG_CAPABLE(ha)) 3868 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3869 3870 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3871 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3872 icb->rid = cpu_to_le16(rid); 3873 if (ha->flags.msix_enabled) { 3874 msix = &ha->msix_entries[1]; 3875 ql_dbg(ql_dbg_init, vha, 0x0019, 3876 "Registering vector 0x%x for base que.\n", 3877 msix->entry); 3878 icb->msix = cpu_to_le16(msix->entry); 3879 } 3880 /* Use alternate PCI bus number */ 3881 if (MSB(rid)) 3882 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3883 /* Use alternate PCI devfn */ 3884 if (LSB(rid)) 3885 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3886 3887 /* Use Disable MSIX Handshake mode for capable adapters */ 3888 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3889 (ha->flags.msix_enabled)) { 3890 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3891 ha->flags.disable_msix_handshake = 1; 3892 ql_dbg(ql_dbg_init, vha, 0x00fe, 3893 "MSIX Handshake Disable Mode turned on.\n"); 3894 } else { 3895 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3896 } 3897 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3898 3899 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3900 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3901 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3902 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3903 } else { 3904 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3905 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3906 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3907 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3908 } 3909 qlt_24xx_config_rings(vha); 3910 3911 /* PCI posting */ 3912 RD_REG_DWORD(&ioreg->hccr); 3913 } 3914 3915 /** 3916 * qla2x00_init_rings() - Initializes firmware. 3917 * @vha: HA context 3918 * 3919 * Beginning of request ring has initialization control block already built 3920 * by nvram config routine. 3921 * 3922 * Returns 0 on success. 3923 */ 3924 int 3925 qla2x00_init_rings(scsi_qla_host_t *vha) 3926 { 3927 int rval; 3928 unsigned long flags = 0; 3929 int cnt, que; 3930 struct qla_hw_data *ha = vha->hw; 3931 struct req_que *req; 3932 struct rsp_que *rsp; 3933 struct mid_init_cb_24xx *mid_init_cb = 3934 (struct mid_init_cb_24xx *) ha->init_cb; 3935 3936 spin_lock_irqsave(&ha->hardware_lock, flags); 3937 3938 /* Clear outstanding commands array. */ 3939 for (que = 0; que < ha->max_req_queues; que++) { 3940 req = ha->req_q_map[que]; 3941 if (!req || !test_bit(que, ha->req_qid_map)) 3942 continue; 3943 req->out_ptr = (void *)(req->ring + req->length); 3944 *req->out_ptr = 0; 3945 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3946 req->outstanding_cmds[cnt] = NULL; 3947 3948 req->current_outstanding_cmd = 1; 3949 3950 /* Initialize firmware. */ 3951 req->ring_ptr = req->ring; 3952 req->ring_index = 0; 3953 req->cnt = req->length; 3954 } 3955 3956 for (que = 0; que < ha->max_rsp_queues; que++) { 3957 rsp = ha->rsp_q_map[que]; 3958 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 3959 continue; 3960 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 3961 *rsp->in_ptr = 0; 3962 /* Initialize response queue entries */ 3963 if (IS_QLAFX00(ha)) 3964 qlafx00_init_response_q_entries(rsp); 3965 else 3966 qla2x00_init_response_q_entries(rsp); 3967 } 3968 3969 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 3970 ha->tgt.atio_ring_index = 0; 3971 /* Initialize ATIO queue entries */ 3972 qlt_init_atio_q_entries(vha); 3973 3974 ha->isp_ops->config_rings(vha); 3975 3976 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3977 3978 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 3979 3980 if (IS_QLAFX00(ha)) { 3981 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 3982 goto next_check; 3983 } 3984 3985 /* Update any ISP specific firmware options before initialization. */ 3986 ha->isp_ops->update_fw_options(vha); 3987 3988 if (ha->flags.npiv_supported) { 3989 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 3990 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 3991 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 3992 } 3993 3994 if (IS_FWI2_CAPABLE(ha)) { 3995 mid_init_cb->options = cpu_to_le16(BIT_1); 3996 mid_init_cb->init_cb.execution_throttle = 3997 cpu_to_le16(ha->cur_fw_xcb_count); 3998 ha->flags.dport_enabled = 3999 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 4000 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4001 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4002 /* FA-WWPN Status */ 4003 ha->flags.fawwpn_enabled = 4004 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 4005 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4006 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4007 } 4008 4009 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4010 next_check: 4011 if (rval) { 4012 ql_log(ql_log_fatal, vha, 0x00d2, 4013 "Init Firmware **** FAILED ****.\n"); 4014 } else { 4015 ql_dbg(ql_dbg_init, vha, 0x00d3, 4016 "Init Firmware -- success.\n"); 4017 QLA_FW_STARTED(ha); 4018 } 4019 4020 return (rval); 4021 } 4022 4023 /** 4024 * qla2x00_fw_ready() - Waits for firmware ready. 4025 * @vha: HA context 4026 * 4027 * Returns 0 on success. 4028 */ 4029 static int 4030 qla2x00_fw_ready(scsi_qla_host_t *vha) 4031 { 4032 int rval; 4033 unsigned long wtime, mtime, cs84xx_time; 4034 uint16_t min_wait; /* Minimum wait time if loop is down */ 4035 uint16_t wait_time; /* Wait time if loop is coming ready */ 4036 uint16_t state[6]; 4037 struct qla_hw_data *ha = vha->hw; 4038 4039 if (IS_QLAFX00(vha->hw)) 4040 return qlafx00_fw_ready(vha); 4041 4042 rval = QLA_SUCCESS; 4043 4044 /* Time to wait for loop down */ 4045 if (IS_P3P_TYPE(ha)) 4046 min_wait = 30; 4047 else 4048 min_wait = 20; 4049 4050 /* 4051 * Firmware should take at most one RATOV to login, plus 5 seconds for 4052 * our own processing. 4053 */ 4054 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4055 wait_time = min_wait; 4056 } 4057 4058 /* Min wait time if loop down */ 4059 mtime = jiffies + (min_wait * HZ); 4060 4061 /* wait time before firmware ready */ 4062 wtime = jiffies + (wait_time * HZ); 4063 4064 /* Wait for ISP to finish LIP */ 4065 if (!vha->flags.init_done) 4066 ql_log(ql_log_info, vha, 0x801e, 4067 "Waiting for LIP to complete.\n"); 4068 4069 do { 4070 memset(state, -1, sizeof(state)); 4071 rval = qla2x00_get_firmware_state(vha, state); 4072 if (rval == QLA_SUCCESS) { 4073 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4074 vha->device_flags &= ~DFLG_NO_CABLE; 4075 } 4076 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4077 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4078 "fw_state=%x 84xx=%x.\n", state[0], 4079 state[2]); 4080 if ((state[2] & FSTATE_LOGGED_IN) && 4081 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4082 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4083 "Sending verify iocb.\n"); 4084 4085 cs84xx_time = jiffies; 4086 rval = qla84xx_init_chip(vha); 4087 if (rval != QLA_SUCCESS) { 4088 ql_log(ql_log_warn, 4089 vha, 0x8007, 4090 "Init chip failed.\n"); 4091 break; 4092 } 4093 4094 /* Add time taken to initialize. */ 4095 cs84xx_time = jiffies - cs84xx_time; 4096 wtime += cs84xx_time; 4097 mtime += cs84xx_time; 4098 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4099 "Increasing wait time by %ld. " 4100 "New time %ld.\n", cs84xx_time, 4101 wtime); 4102 } 4103 } else if (state[0] == FSTATE_READY) { 4104 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4105 "F/W Ready - OK.\n"); 4106 4107 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4108 &ha->login_timeout, &ha->r_a_tov); 4109 4110 rval = QLA_SUCCESS; 4111 break; 4112 } 4113 4114 rval = QLA_FUNCTION_FAILED; 4115 4116 if (atomic_read(&vha->loop_down_timer) && 4117 state[0] != FSTATE_READY) { 4118 /* Loop down. Timeout on min_wait for states 4119 * other than Wait for Login. 4120 */ 4121 if (time_after_eq(jiffies, mtime)) { 4122 ql_log(ql_log_info, vha, 0x8038, 4123 "Cable is unplugged...\n"); 4124 4125 vha->device_flags |= DFLG_NO_CABLE; 4126 break; 4127 } 4128 } 4129 } else { 4130 /* Mailbox cmd failed. Timeout on min_wait. */ 4131 if (time_after_eq(jiffies, mtime) || 4132 ha->flags.isp82xx_fw_hung) 4133 break; 4134 } 4135 4136 if (time_after_eq(jiffies, wtime)) 4137 break; 4138 4139 /* Delay for a while */ 4140 msleep(500); 4141 } while (1); 4142 4143 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4144 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4145 state[1], state[2], state[3], state[4], state[5], jiffies); 4146 4147 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4148 ql_log(ql_log_warn, vha, 0x803b, 4149 "Firmware ready **** FAILED ****.\n"); 4150 } 4151 4152 return (rval); 4153 } 4154 4155 /* 4156 * qla2x00_configure_hba 4157 * Setup adapter context. 4158 * 4159 * Input: 4160 * ha = adapter state pointer. 4161 * 4162 * Returns: 4163 * 0 = success 4164 * 4165 * Context: 4166 * Kernel context. 4167 */ 4168 static int 4169 qla2x00_configure_hba(scsi_qla_host_t *vha) 4170 { 4171 int rval; 4172 uint16_t loop_id; 4173 uint16_t topo; 4174 uint16_t sw_cap; 4175 uint8_t al_pa; 4176 uint8_t area; 4177 uint8_t domain; 4178 char connect_type[22]; 4179 struct qla_hw_data *ha = vha->hw; 4180 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4181 port_id_t id; 4182 unsigned long flags; 4183 4184 /* Get host addresses. */ 4185 rval = qla2x00_get_adapter_id(vha, 4186 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4187 if (rval != QLA_SUCCESS) { 4188 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4189 IS_CNA_CAPABLE(ha) || 4190 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4191 ql_dbg(ql_dbg_disc, vha, 0x2008, 4192 "Loop is in a transition state.\n"); 4193 } else { 4194 ql_log(ql_log_warn, vha, 0x2009, 4195 "Unable to get host loop ID.\n"); 4196 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4197 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4198 ql_log(ql_log_warn, vha, 0x1151, 4199 "Doing link init.\n"); 4200 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4201 return rval; 4202 } 4203 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4204 } 4205 return (rval); 4206 } 4207 4208 if (topo == 4) { 4209 ql_log(ql_log_info, vha, 0x200a, 4210 "Cannot get topology - retrying.\n"); 4211 return (QLA_FUNCTION_FAILED); 4212 } 4213 4214 vha->loop_id = loop_id; 4215 4216 /* initialize */ 4217 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4218 ha->operating_mode = LOOP; 4219 ha->switch_cap = 0; 4220 4221 switch (topo) { 4222 case 0: 4223 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4224 ha->current_topology = ISP_CFG_NL; 4225 strcpy(connect_type, "(Loop)"); 4226 break; 4227 4228 case 1: 4229 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4230 ha->switch_cap = sw_cap; 4231 ha->current_topology = ISP_CFG_FL; 4232 strcpy(connect_type, "(FL_Port)"); 4233 break; 4234 4235 case 2: 4236 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4237 ha->operating_mode = P2P; 4238 ha->current_topology = ISP_CFG_N; 4239 strcpy(connect_type, "(N_Port-to-N_Port)"); 4240 break; 4241 4242 case 3: 4243 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4244 ha->switch_cap = sw_cap; 4245 ha->operating_mode = P2P; 4246 ha->current_topology = ISP_CFG_F; 4247 strcpy(connect_type, "(F_Port)"); 4248 break; 4249 4250 default: 4251 ql_dbg(ql_dbg_disc, vha, 0x200f, 4252 "HBA in unknown topology %x, using NL.\n", topo); 4253 ha->current_topology = ISP_CFG_NL; 4254 strcpy(connect_type, "(Loop)"); 4255 break; 4256 } 4257 4258 /* Save Host port and loop ID. */ 4259 /* byte order - Big Endian */ 4260 id.b.domain = domain; 4261 id.b.area = area; 4262 id.b.al_pa = al_pa; 4263 id.b.rsvd_1 = 0; 4264 spin_lock_irqsave(&ha->hardware_lock, flags); 4265 if (!(topo == 2 && ha->flags.n2n_bigger)) 4266 qlt_update_host_map(vha, id); 4267 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4268 4269 if (!vha->flags.init_done) 4270 ql_log(ql_log_info, vha, 0x2010, 4271 "Topology - %s, Host Loop address 0x%x.\n", 4272 connect_type, vha->loop_id); 4273 4274 return(rval); 4275 } 4276 4277 inline void 4278 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4279 char *def) 4280 { 4281 char *st, *en; 4282 uint16_t index; 4283 struct qla_hw_data *ha = vha->hw; 4284 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4285 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4286 4287 if (memcmp(model, BINZERO, len) != 0) { 4288 strncpy(ha->model_number, model, len); 4289 st = en = ha->model_number; 4290 en += len - 1; 4291 while (en > st) { 4292 if (*en != 0x20 && *en != 0x00) 4293 break; 4294 *en-- = '\0'; 4295 } 4296 4297 index = (ha->pdev->subsystem_device & 0xff); 4298 if (use_tbl && 4299 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4300 index < QLA_MODEL_NAMES) 4301 strncpy(ha->model_desc, 4302 qla2x00_model_name[index * 2 + 1], 4303 sizeof(ha->model_desc) - 1); 4304 } else { 4305 index = (ha->pdev->subsystem_device & 0xff); 4306 if (use_tbl && 4307 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4308 index < QLA_MODEL_NAMES) { 4309 strcpy(ha->model_number, 4310 qla2x00_model_name[index * 2]); 4311 strncpy(ha->model_desc, 4312 qla2x00_model_name[index * 2 + 1], 4313 sizeof(ha->model_desc) - 1); 4314 } else { 4315 strcpy(ha->model_number, def); 4316 } 4317 } 4318 if (IS_FWI2_CAPABLE(ha)) 4319 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4320 sizeof(ha->model_desc)); 4321 } 4322 4323 /* On sparc systems, obtain port and node WWN from firmware 4324 * properties. 4325 */ 4326 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4327 { 4328 #ifdef CONFIG_SPARC 4329 struct qla_hw_data *ha = vha->hw; 4330 struct pci_dev *pdev = ha->pdev; 4331 struct device_node *dp = pci_device_to_OF_node(pdev); 4332 const u8 *val; 4333 int len; 4334 4335 val = of_get_property(dp, "port-wwn", &len); 4336 if (val && len >= WWN_SIZE) 4337 memcpy(nv->port_name, val, WWN_SIZE); 4338 4339 val = of_get_property(dp, "node-wwn", &len); 4340 if (val && len >= WWN_SIZE) 4341 memcpy(nv->node_name, val, WWN_SIZE); 4342 #endif 4343 } 4344 4345 /* 4346 * NVRAM configuration for ISP 2xxx 4347 * 4348 * Input: 4349 * ha = adapter block pointer. 4350 * 4351 * Output: 4352 * initialization control block in response_ring 4353 * host adapters parameters in host adapter block 4354 * 4355 * Returns: 4356 * 0 = success. 4357 */ 4358 int 4359 qla2x00_nvram_config(scsi_qla_host_t *vha) 4360 { 4361 int rval; 4362 uint8_t chksum = 0; 4363 uint16_t cnt; 4364 uint8_t *dptr1, *dptr2; 4365 struct qla_hw_data *ha = vha->hw; 4366 init_cb_t *icb = ha->init_cb; 4367 nvram_t *nv = ha->nvram; 4368 uint8_t *ptr = ha->nvram; 4369 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4370 4371 rval = QLA_SUCCESS; 4372 4373 /* Determine NVRAM starting address. */ 4374 ha->nvram_size = sizeof(nvram_t); 4375 ha->nvram_base = 0; 4376 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4377 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4378 ha->nvram_base = 0x80; 4379 4380 /* Get NVRAM data and calculate checksum. */ 4381 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4382 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4383 chksum += *ptr++; 4384 4385 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4386 "Contents of NVRAM.\n"); 4387 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4388 (uint8_t *)nv, ha->nvram_size); 4389 4390 /* Bad NVRAM data, set defaults parameters. */ 4391 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4392 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4393 /* Reset NVRAM data. */ 4394 ql_log(ql_log_warn, vha, 0x0064, 4395 "Inconsistent NVRAM " 4396 "detected: checksum=0x%x id=%c version=0x%x.\n", 4397 chksum, nv->id[0], nv->nvram_version); 4398 ql_log(ql_log_warn, vha, 0x0065, 4399 "Falling back to " 4400 "functioning (yet invalid -- WWPN) defaults.\n"); 4401 4402 /* 4403 * Set default initialization control block. 4404 */ 4405 memset(nv, 0, ha->nvram_size); 4406 nv->parameter_block_version = ICB_VERSION; 4407 4408 if (IS_QLA23XX(ha)) { 4409 nv->firmware_options[0] = BIT_2 | BIT_1; 4410 nv->firmware_options[1] = BIT_7 | BIT_5; 4411 nv->add_firmware_options[0] = BIT_5; 4412 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4413 nv->frame_payload_size = 2048; 4414 nv->special_options[1] = BIT_7; 4415 } else if (IS_QLA2200(ha)) { 4416 nv->firmware_options[0] = BIT_2 | BIT_1; 4417 nv->firmware_options[1] = BIT_7 | BIT_5; 4418 nv->add_firmware_options[0] = BIT_5; 4419 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4420 nv->frame_payload_size = 1024; 4421 } else if (IS_QLA2100(ha)) { 4422 nv->firmware_options[0] = BIT_3 | BIT_1; 4423 nv->firmware_options[1] = BIT_5; 4424 nv->frame_payload_size = 1024; 4425 } 4426 4427 nv->max_iocb_allocation = cpu_to_le16(256); 4428 nv->execution_throttle = cpu_to_le16(16); 4429 nv->retry_count = 8; 4430 nv->retry_delay = 1; 4431 4432 nv->port_name[0] = 33; 4433 nv->port_name[3] = 224; 4434 nv->port_name[4] = 139; 4435 4436 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4437 4438 nv->login_timeout = 4; 4439 4440 /* 4441 * Set default host adapter parameters 4442 */ 4443 nv->host_p[1] = BIT_2; 4444 nv->reset_delay = 5; 4445 nv->port_down_retry_count = 8; 4446 nv->max_luns_per_target = cpu_to_le16(8); 4447 nv->link_down_timeout = 60; 4448 4449 rval = 1; 4450 } 4451 4452 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4453 /* 4454 * The SN2 does not provide BIOS emulation which means you can't change 4455 * potentially bogus BIOS settings. Force the use of default settings 4456 * for link rate and frame size. Hope that the rest of the settings 4457 * are valid. 4458 */ 4459 if (ia64_platform_is("sn2")) { 4460 nv->frame_payload_size = 2048; 4461 if (IS_QLA23XX(ha)) 4462 nv->special_options[1] = BIT_7; 4463 } 4464 #endif 4465 4466 /* Reset Initialization control block */ 4467 memset(icb, 0, ha->init_cb_size); 4468 4469 /* 4470 * Setup driver NVRAM options. 4471 */ 4472 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4473 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4474 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4475 nv->firmware_options[1] &= ~BIT_4; 4476 4477 if (IS_QLA23XX(ha)) { 4478 nv->firmware_options[0] |= BIT_2; 4479 nv->firmware_options[0] &= ~BIT_3; 4480 nv->special_options[0] &= ~BIT_6; 4481 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4482 4483 if (IS_QLA2300(ha)) { 4484 if (ha->fb_rev == FPM_2310) { 4485 strcpy(ha->model_number, "QLA2310"); 4486 } else { 4487 strcpy(ha->model_number, "QLA2300"); 4488 } 4489 } else { 4490 qla2x00_set_model_info(vha, nv->model_number, 4491 sizeof(nv->model_number), "QLA23xx"); 4492 } 4493 } else if (IS_QLA2200(ha)) { 4494 nv->firmware_options[0] |= BIT_2; 4495 /* 4496 * 'Point-to-point preferred, else loop' is not a safe 4497 * connection mode setting. 4498 */ 4499 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4500 (BIT_5 | BIT_4)) { 4501 /* Force 'loop preferred, else point-to-point'. */ 4502 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4503 nv->add_firmware_options[0] |= BIT_5; 4504 } 4505 strcpy(ha->model_number, "QLA22xx"); 4506 } else /*if (IS_QLA2100(ha))*/ { 4507 strcpy(ha->model_number, "QLA2100"); 4508 } 4509 4510 /* 4511 * Copy over NVRAM RISC parameter block to initialization control block. 4512 */ 4513 dptr1 = (uint8_t *)icb; 4514 dptr2 = (uint8_t *)&nv->parameter_block_version; 4515 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4516 while (cnt--) 4517 *dptr1++ = *dptr2++; 4518 4519 /* Copy 2nd half. */ 4520 dptr1 = (uint8_t *)icb->add_firmware_options; 4521 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4522 while (cnt--) 4523 *dptr1++ = *dptr2++; 4524 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4525 /* Use alternate WWN? */ 4526 if (nv->host_p[1] & BIT_7) { 4527 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4528 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4529 } 4530 4531 /* Prepare nodename */ 4532 if ((icb->firmware_options[1] & BIT_6) == 0) { 4533 /* 4534 * Firmware will apply the following mask if the nodename was 4535 * not provided. 4536 */ 4537 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4538 icb->node_name[0] &= 0xF0; 4539 } 4540 4541 /* 4542 * Set host adapter parameters. 4543 */ 4544 4545 /* 4546 * BIT_7 in the host-parameters section allows for modification to 4547 * internal driver logging. 4548 */ 4549 if (nv->host_p[0] & BIT_7) 4550 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4551 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4552 /* Always load RISC code on non ISP2[12]00 chips. */ 4553 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4554 ha->flags.disable_risc_code_load = 0; 4555 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4556 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4557 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4558 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4559 ha->flags.disable_serdes = 0; 4560 4561 ha->operating_mode = 4562 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4563 4564 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4565 sizeof(ha->fw_seriallink_options)); 4566 4567 /* save HBA serial number */ 4568 ha->serial0 = icb->port_name[5]; 4569 ha->serial1 = icb->port_name[6]; 4570 ha->serial2 = icb->port_name[7]; 4571 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4572 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4573 4574 icb->execution_throttle = cpu_to_le16(0xFFFF); 4575 4576 ha->retry_count = nv->retry_count; 4577 4578 /* Set minimum login_timeout to 4 seconds. */ 4579 if (nv->login_timeout != ql2xlogintimeout) 4580 nv->login_timeout = ql2xlogintimeout; 4581 if (nv->login_timeout < 4) 4582 nv->login_timeout = 4; 4583 ha->login_timeout = nv->login_timeout; 4584 4585 /* Set minimum RATOV to 100 tenths of a second. */ 4586 ha->r_a_tov = 100; 4587 4588 ha->loop_reset_delay = nv->reset_delay; 4589 4590 /* Link Down Timeout = 0: 4591 * 4592 * When Port Down timer expires we will start returning 4593 * I/O's to OS with "DID_NO_CONNECT". 4594 * 4595 * Link Down Timeout != 0: 4596 * 4597 * The driver waits for the link to come up after link down 4598 * before returning I/Os to OS with "DID_NO_CONNECT". 4599 */ 4600 if (nv->link_down_timeout == 0) { 4601 ha->loop_down_abort_time = 4602 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4603 } else { 4604 ha->link_down_timeout = nv->link_down_timeout; 4605 ha->loop_down_abort_time = 4606 (LOOP_DOWN_TIME - ha->link_down_timeout); 4607 } 4608 4609 /* 4610 * Need enough time to try and get the port back. 4611 */ 4612 ha->port_down_retry_count = nv->port_down_retry_count; 4613 if (qlport_down_retry) 4614 ha->port_down_retry_count = qlport_down_retry; 4615 /* Set login_retry_count */ 4616 ha->login_retry_count = nv->retry_count; 4617 if (ha->port_down_retry_count == nv->port_down_retry_count && 4618 ha->port_down_retry_count > 3) 4619 ha->login_retry_count = ha->port_down_retry_count; 4620 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4621 ha->login_retry_count = ha->port_down_retry_count; 4622 if (ql2xloginretrycount) 4623 ha->login_retry_count = ql2xloginretrycount; 4624 4625 icb->lun_enables = cpu_to_le16(0); 4626 icb->command_resource_count = 0; 4627 icb->immediate_notify_resource_count = 0; 4628 icb->timeout = cpu_to_le16(0); 4629 4630 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4631 /* Enable RIO */ 4632 icb->firmware_options[0] &= ~BIT_3; 4633 icb->add_firmware_options[0] &= 4634 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4635 icb->add_firmware_options[0] |= BIT_2; 4636 icb->response_accumulation_timer = 3; 4637 icb->interrupt_delay_timer = 5; 4638 4639 vha->flags.process_response_queue = 1; 4640 } else { 4641 /* Enable ZIO. */ 4642 if (!vha->flags.init_done) { 4643 ha->zio_mode = icb->add_firmware_options[0] & 4644 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4645 ha->zio_timer = icb->interrupt_delay_timer ? 4646 icb->interrupt_delay_timer: 2; 4647 } 4648 icb->add_firmware_options[0] &= 4649 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4650 vha->flags.process_response_queue = 0; 4651 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4652 ha->zio_mode = QLA_ZIO_MODE_6; 4653 4654 ql_log(ql_log_info, vha, 0x0068, 4655 "ZIO mode %d enabled; timer delay (%d us).\n", 4656 ha->zio_mode, ha->zio_timer * 100); 4657 4658 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4659 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4660 vha->flags.process_response_queue = 1; 4661 } 4662 } 4663 4664 if (rval) { 4665 ql_log(ql_log_warn, vha, 0x0069, 4666 "NVRAM configuration failed.\n"); 4667 } 4668 return (rval); 4669 } 4670 4671 static void 4672 qla2x00_rport_del(void *data) 4673 { 4674 fc_port_t *fcport = data; 4675 struct fc_rport *rport; 4676 unsigned long flags; 4677 4678 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4679 rport = fcport->drport ? fcport->drport: fcport->rport; 4680 fcport->drport = NULL; 4681 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4682 if (rport) { 4683 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4684 "%s %8phN. rport %p roles %x\n", 4685 __func__, fcport->port_name, rport, 4686 rport->roles); 4687 4688 fc_remote_port_delete(rport); 4689 } 4690 } 4691 4692 /** 4693 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4694 * @vha: HA context 4695 * @flags: allocation flags 4696 * 4697 * Returns a pointer to the allocated fcport, or NULL, if none available. 4698 */ 4699 fc_port_t * 4700 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4701 { 4702 fc_port_t *fcport; 4703 4704 fcport = kzalloc(sizeof(fc_port_t), flags); 4705 if (!fcport) 4706 return NULL; 4707 4708 /* Setup fcport template structure. */ 4709 fcport->vha = vha; 4710 fcport->port_type = FCT_UNKNOWN; 4711 fcport->loop_id = FC_NO_LOOP_ID; 4712 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4713 fcport->supported_classes = FC_COS_UNSPECIFIED; 4714 4715 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4716 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4717 flags); 4718 fcport->disc_state = DSC_DELETED; 4719 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4720 fcport->deleted = QLA_SESS_DELETED; 4721 fcport->login_retry = vha->hw->login_retry_count; 4722 fcport->logout_on_delete = 1; 4723 4724 if (!fcport->ct_desc.ct_sns) { 4725 ql_log(ql_log_warn, vha, 0xd049, 4726 "Failed to allocate ct_sns request.\n"); 4727 kfree(fcport); 4728 fcport = NULL; 4729 } 4730 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4731 INIT_LIST_HEAD(&fcport->gnl_entry); 4732 INIT_LIST_HEAD(&fcport->list); 4733 4734 return fcport; 4735 } 4736 4737 void 4738 qla2x00_free_fcport(fc_port_t *fcport) 4739 { 4740 if (fcport->ct_desc.ct_sns) { 4741 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4742 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4743 fcport->ct_desc.ct_sns_dma); 4744 4745 fcport->ct_desc.ct_sns = NULL; 4746 } 4747 kfree(fcport); 4748 } 4749 4750 /* 4751 * qla2x00_configure_loop 4752 * Updates Fibre Channel Device Database with what is actually on loop. 4753 * 4754 * Input: 4755 * ha = adapter block pointer. 4756 * 4757 * Returns: 4758 * 0 = success. 4759 * 1 = error. 4760 * 2 = database was full and device was not configured. 4761 */ 4762 static int 4763 qla2x00_configure_loop(scsi_qla_host_t *vha) 4764 { 4765 int rval; 4766 unsigned long flags, save_flags; 4767 struct qla_hw_data *ha = vha->hw; 4768 rval = QLA_SUCCESS; 4769 4770 /* Get Initiator ID */ 4771 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4772 rval = qla2x00_configure_hba(vha); 4773 if (rval != QLA_SUCCESS) { 4774 ql_dbg(ql_dbg_disc, vha, 0x2013, 4775 "Unable to configure HBA.\n"); 4776 return (rval); 4777 } 4778 } 4779 4780 save_flags = flags = vha->dpc_flags; 4781 ql_dbg(ql_dbg_disc, vha, 0x2014, 4782 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4783 4784 /* 4785 * If we have both an RSCN and PORT UPDATE pending then handle them 4786 * both at the same time. 4787 */ 4788 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4789 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4790 4791 qla2x00_get_data_rate(vha); 4792 4793 /* Determine what we need to do */ 4794 if (ha->current_topology == ISP_CFG_FL && 4795 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4796 4797 set_bit(RSCN_UPDATE, &flags); 4798 4799 } else if (ha->current_topology == ISP_CFG_F && 4800 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4801 4802 set_bit(RSCN_UPDATE, &flags); 4803 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4804 4805 } else if (ha->current_topology == ISP_CFG_N) { 4806 clear_bit(RSCN_UPDATE, &flags); 4807 if (qla_tgt_mode_enabled(vha)) { 4808 /* allow the other side to start the login */ 4809 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4810 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4811 } 4812 } else if (ha->current_topology == ISP_CFG_NL) { 4813 clear_bit(RSCN_UPDATE, &flags); 4814 set_bit(LOCAL_LOOP_UPDATE, &flags); 4815 } else if (!vha->flags.online || 4816 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4817 set_bit(RSCN_UPDATE, &flags); 4818 set_bit(LOCAL_LOOP_UPDATE, &flags); 4819 } 4820 4821 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4822 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4823 ql_dbg(ql_dbg_disc, vha, 0x2015, 4824 "Loop resync needed, failing.\n"); 4825 rval = QLA_FUNCTION_FAILED; 4826 } else 4827 rval = qla2x00_configure_local_loop(vha); 4828 } 4829 4830 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4831 if (LOOP_TRANSITION(vha)) { 4832 ql_dbg(ql_dbg_disc, vha, 0x2099, 4833 "Needs RSCN update and loop transition.\n"); 4834 rval = QLA_FUNCTION_FAILED; 4835 } 4836 else 4837 rval = qla2x00_configure_fabric(vha); 4838 } 4839 4840 if (rval == QLA_SUCCESS) { 4841 if (atomic_read(&vha->loop_down_timer) || 4842 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4843 rval = QLA_FUNCTION_FAILED; 4844 } else { 4845 atomic_set(&vha->loop_state, LOOP_READY); 4846 ql_dbg(ql_dbg_disc, vha, 0x2069, 4847 "LOOP READY.\n"); 4848 ha->flags.fw_init_done = 1; 4849 4850 /* 4851 * Process any ATIO queue entries that came in 4852 * while we weren't online. 4853 */ 4854 if (qla_tgt_mode_enabled(vha) || 4855 qla_dual_mode_enabled(vha)) { 4856 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) { 4857 spin_lock_irqsave(&ha->tgt.atio_lock, 4858 flags); 4859 qlt_24xx_process_atio_queue(vha, 0); 4860 spin_unlock_irqrestore( 4861 &ha->tgt.atio_lock, flags); 4862 } else { 4863 spin_lock_irqsave(&ha->hardware_lock, 4864 flags); 4865 qlt_24xx_process_atio_queue(vha, 1); 4866 spin_unlock_irqrestore( 4867 &ha->hardware_lock, flags); 4868 } 4869 } 4870 } 4871 } 4872 4873 if (rval) { 4874 ql_dbg(ql_dbg_disc, vha, 0x206a, 4875 "%s *** FAILED ***.\n", __func__); 4876 } else { 4877 ql_dbg(ql_dbg_disc, vha, 0x206b, 4878 "%s: exiting normally.\n", __func__); 4879 } 4880 4881 /* Restore state if a resync event occurred during processing */ 4882 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4883 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4884 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4885 if (test_bit(RSCN_UPDATE, &save_flags)) { 4886 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4887 } 4888 } 4889 4890 return (rval); 4891 } 4892 4893 /* 4894 * qla2x00_configure_local_loop 4895 * Updates Fibre Channel Device Database with local loop devices. 4896 * 4897 * Input: 4898 * ha = adapter block pointer. 4899 * 4900 * Returns: 4901 * 0 = success. 4902 */ 4903 static int 4904 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4905 { 4906 int rval, rval2; 4907 int found_devs; 4908 int found; 4909 fc_port_t *fcport, *new_fcport; 4910 4911 uint16_t index; 4912 uint16_t entries; 4913 char *id_iter; 4914 uint16_t loop_id; 4915 uint8_t domain, area, al_pa; 4916 struct qla_hw_data *ha = vha->hw; 4917 unsigned long flags; 4918 4919 /* Inititae N2N login. */ 4920 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4921 /* borrowing */ 4922 u32 *bp, i, sz; 4923 4924 memset(ha->init_cb, 0, ha->init_cb_size); 4925 sz = min_t(int, sizeof(struct els_plogi_payload), 4926 ha->init_cb_size); 4927 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 4928 (void *)ha->init_cb, sz); 4929 if (rval == QLA_SUCCESS) { 4930 bp = (uint32_t *)ha->init_cb; 4931 for (i = 0; i < sz/4 ; i++, bp++) 4932 *bp = cpu_to_be32(*bp); 4933 4934 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb, 4935 sizeof(ha->plogi_els_payld.data)); 4936 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4937 } else { 4938 ql_dbg(ql_dbg_init, vha, 0x00d1, 4939 "PLOGI ELS param read fail.\n"); 4940 } 4941 return QLA_SUCCESS; 4942 } 4943 4944 found_devs = 0; 4945 new_fcport = NULL; 4946 entries = MAX_FIBRE_DEVICES_LOOP; 4947 4948 /* Get list of logged in devices. */ 4949 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4950 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4951 &entries); 4952 if (rval != QLA_SUCCESS) 4953 goto cleanup_allocation; 4954 4955 ql_dbg(ql_dbg_disc, vha, 0x2011, 4956 "Entries in ID list (%d).\n", entries); 4957 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 4958 (uint8_t *)ha->gid_list, 4959 entries * sizeof(struct gid_list_info)); 4960 4961 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4962 fcport->scan_state = QLA_FCPORT_SCAN; 4963 } 4964 4965 /* Allocate temporary fcport for any new fcports discovered. */ 4966 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4967 if (new_fcport == NULL) { 4968 ql_log(ql_log_warn, vha, 0x2012, 4969 "Memory allocation failed for fcport.\n"); 4970 rval = QLA_MEMORY_ALLOC_FAILED; 4971 goto cleanup_allocation; 4972 } 4973 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4974 4975 /* Add devices to port list. */ 4976 id_iter = (char *)ha->gid_list; 4977 for (index = 0; index < entries; index++) { 4978 domain = ((struct gid_list_info *)id_iter)->domain; 4979 area = ((struct gid_list_info *)id_iter)->area; 4980 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 4981 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4982 loop_id = (uint16_t) 4983 ((struct gid_list_info *)id_iter)->loop_id_2100; 4984 else 4985 loop_id = le16_to_cpu( 4986 ((struct gid_list_info *)id_iter)->loop_id); 4987 id_iter += ha->gid_list_info_size; 4988 4989 /* Bypass reserved domain fields. */ 4990 if ((domain & 0xf0) == 0xf0) 4991 continue; 4992 4993 /* Bypass if not same domain and area of adapter. */ 4994 if (area && domain && 4995 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 4996 continue; 4997 4998 /* Bypass invalid local loop ID. */ 4999 if (loop_id > LAST_LOCAL_LOOP_ID) 5000 continue; 5001 5002 memset(new_fcport->port_name, 0, WWN_SIZE); 5003 5004 /* Fill in member data. */ 5005 new_fcport->d_id.b.domain = domain; 5006 new_fcport->d_id.b.area = area; 5007 new_fcport->d_id.b.al_pa = al_pa; 5008 new_fcport->loop_id = loop_id; 5009 new_fcport->scan_state = QLA_FCPORT_FOUND; 5010 5011 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5012 if (rval2 != QLA_SUCCESS) { 5013 ql_dbg(ql_dbg_disc, vha, 0x2097, 5014 "Failed to retrieve fcport information " 5015 "-- get_port_database=%x, loop_id=0x%04x.\n", 5016 rval2, new_fcport->loop_id); 5017 /* Skip retry if N2N */ 5018 if (ha->current_topology != ISP_CFG_N) { 5019 ql_dbg(ql_dbg_disc, vha, 0x2105, 5020 "Scheduling resync.\n"); 5021 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5022 continue; 5023 } 5024 } 5025 5026 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5027 /* Check for matching device in port list. */ 5028 found = 0; 5029 fcport = NULL; 5030 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5031 if (memcmp(new_fcport->port_name, fcport->port_name, 5032 WWN_SIZE)) 5033 continue; 5034 5035 fcport->flags &= ~FCF_FABRIC_DEVICE; 5036 fcport->loop_id = new_fcport->loop_id; 5037 fcport->port_type = new_fcport->port_type; 5038 fcport->d_id.b24 = new_fcport->d_id.b24; 5039 memcpy(fcport->node_name, new_fcport->node_name, 5040 WWN_SIZE); 5041 fcport->scan_state = QLA_FCPORT_FOUND; 5042 found++; 5043 break; 5044 } 5045 5046 if (!found) { 5047 /* New device, add to fcports list. */ 5048 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5049 5050 /* Allocate a new replacement fcport. */ 5051 fcport = new_fcport; 5052 5053 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5054 5055 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5056 5057 if (new_fcport == NULL) { 5058 ql_log(ql_log_warn, vha, 0xd031, 5059 "Failed to allocate memory for fcport.\n"); 5060 rval = QLA_MEMORY_ALLOC_FAILED; 5061 goto cleanup_allocation; 5062 } 5063 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5064 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5065 } 5066 5067 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5068 5069 /* Base iIDMA settings on HBA port speed. */ 5070 fcport->fp_speed = ha->link_data_rate; 5071 5072 found_devs++; 5073 } 5074 5075 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5076 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5077 break; 5078 5079 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5080 if ((qla_dual_mode_enabled(vha) || 5081 qla_ini_mode_enabled(vha)) && 5082 atomic_read(&fcport->state) == FCS_ONLINE) { 5083 qla2x00_mark_device_lost(vha, fcport, 5084 ql2xplogiabsentdevice, 0); 5085 if (fcport->loop_id != FC_NO_LOOP_ID && 5086 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5087 fcport->port_type != FCT_INITIATOR && 5088 fcport->port_type != FCT_BROADCAST) { 5089 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5090 "%s %d %8phC post del sess\n", 5091 __func__, __LINE__, 5092 fcport->port_name); 5093 5094 qlt_schedule_sess_for_deletion(fcport); 5095 continue; 5096 } 5097 } 5098 } 5099 5100 if (fcport->scan_state == QLA_FCPORT_FOUND) 5101 qla24xx_fcport_handle_login(vha, fcport); 5102 } 5103 5104 cleanup_allocation: 5105 kfree(new_fcport); 5106 5107 if (rval != QLA_SUCCESS) { 5108 ql_dbg(ql_dbg_disc, vha, 0x2098, 5109 "Configure local loop error exit: rval=%x.\n", rval); 5110 } 5111 5112 return (rval); 5113 } 5114 5115 static void 5116 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5117 { 5118 int rval; 5119 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5120 struct qla_hw_data *ha = vha->hw; 5121 5122 if (!IS_IIDMA_CAPABLE(ha)) 5123 return; 5124 5125 if (atomic_read(&fcport->state) != FCS_ONLINE) 5126 return; 5127 5128 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5129 fcport->fp_speed > ha->link_data_rate || 5130 !ha->flags.gpsc_supported) 5131 return; 5132 5133 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5134 mb); 5135 if (rval != QLA_SUCCESS) { 5136 ql_dbg(ql_dbg_disc, vha, 0x2004, 5137 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5138 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5139 } else { 5140 ql_dbg(ql_dbg_disc, vha, 0x2005, 5141 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5142 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5143 fcport->fp_speed, fcport->port_name); 5144 } 5145 } 5146 5147 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5148 { 5149 qla2x00_iidma_fcport(vha, fcport); 5150 qla24xx_update_fcport_fcp_prio(vha, fcport); 5151 } 5152 5153 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5154 { 5155 struct qla_work_evt *e; 5156 5157 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5158 if (!e) 5159 return QLA_FUNCTION_FAILED; 5160 5161 e->u.fcport.fcport = fcport; 5162 return qla2x00_post_work(vha, e); 5163 } 5164 5165 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5166 static void 5167 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5168 { 5169 struct fc_rport_identifiers rport_ids; 5170 struct fc_rport *rport; 5171 unsigned long flags; 5172 5173 if (atomic_read(&fcport->state) == FCS_ONLINE) 5174 return; 5175 5176 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5177 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5178 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5179 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5180 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5181 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5182 if (!rport) { 5183 ql_log(ql_log_warn, vha, 0x2006, 5184 "Unable to allocate fc remote port.\n"); 5185 return; 5186 } 5187 5188 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5189 *((fc_port_t **)rport->dd_data) = fcport; 5190 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5191 5192 rport->supported_classes = fcport->supported_classes; 5193 5194 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5195 if (fcport->port_type == FCT_INITIATOR) 5196 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5197 if (fcport->port_type == FCT_TARGET) 5198 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5199 5200 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5201 "%s %8phN. rport %p is %s mode\n", 5202 __func__, fcport->port_name, rport, 5203 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5204 5205 fc_remote_port_rolechg(rport, rport_ids.roles); 5206 } 5207 5208 /* 5209 * qla2x00_update_fcport 5210 * Updates device on list. 5211 * 5212 * Input: 5213 * ha = adapter block pointer. 5214 * fcport = port structure pointer. 5215 * 5216 * Return: 5217 * 0 - Success 5218 * BIT_0 - error 5219 * 5220 * Context: 5221 * Kernel context. 5222 */ 5223 void 5224 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5225 { 5226 fcport->vha = vha; 5227 5228 if (IS_SW_RESV_ADDR(fcport->d_id)) 5229 return; 5230 5231 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5232 fcport->disc_state = DSC_LOGIN_COMPLETE; 5233 fcport->deleted = 0; 5234 fcport->logout_on_delete = 1; 5235 fcport->login_retry = vha->hw->login_retry_count; 5236 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5237 5238 qla2x00_iidma_fcport(vha, fcport); 5239 5240 switch (vha->hw->current_topology) { 5241 case ISP_CFG_N: 5242 case ISP_CFG_NL: 5243 fcport->keep_nport_handle = 1; 5244 break; 5245 default: 5246 break; 5247 } 5248 5249 if (fcport->fc4f_nvme) { 5250 qla_nvme_register_remote(vha, fcport); 5251 fcport->disc_state = DSC_LOGIN_COMPLETE; 5252 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5253 return; 5254 } 5255 5256 qla24xx_update_fcport_fcp_prio(vha, fcport); 5257 5258 switch (vha->host->active_mode) { 5259 case MODE_INITIATOR: 5260 qla2x00_reg_remote_port(vha, fcport); 5261 break; 5262 case MODE_TARGET: 5263 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5264 !vha->vha_tgt.qla_tgt->tgt_stopped) 5265 qlt_fc_port_added(vha, fcport); 5266 break; 5267 case MODE_DUAL: 5268 qla2x00_reg_remote_port(vha, fcport); 5269 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5270 !vha->vha_tgt.qla_tgt->tgt_stopped) 5271 qlt_fc_port_added(vha, fcport); 5272 break; 5273 default: 5274 break; 5275 } 5276 5277 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5278 if (fcport->id_changed) { 5279 fcport->id_changed = 0; 5280 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5281 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5282 __func__, __LINE__, fcport->port_name, 5283 vha->fcport_count); 5284 qla24xx_post_gfpnid_work(vha, fcport); 5285 } else { 5286 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5287 "%s %d %8phC post gpsc fcp_cnt %d\n", 5288 __func__, __LINE__, fcport->port_name, 5289 vha->fcport_count); 5290 qla24xx_post_gpsc_work(vha, fcport); 5291 } 5292 } 5293 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5294 } 5295 5296 /* 5297 * qla2x00_configure_fabric 5298 * Setup SNS devices with loop ID's. 5299 * 5300 * Input: 5301 * ha = adapter block pointer. 5302 * 5303 * Returns: 5304 * 0 = success. 5305 * BIT_0 = error 5306 */ 5307 static int 5308 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5309 { 5310 int rval; 5311 fc_port_t *fcport; 5312 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5313 uint16_t loop_id; 5314 LIST_HEAD(new_fcports); 5315 struct qla_hw_data *ha = vha->hw; 5316 int discovery_gen; 5317 5318 /* If FL port exists, then SNS is present */ 5319 if (IS_FWI2_CAPABLE(ha)) 5320 loop_id = NPH_F_PORT; 5321 else 5322 loop_id = SNS_FL_PORT; 5323 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5324 if (rval != QLA_SUCCESS) { 5325 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5326 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5327 5328 vha->device_flags &= ~SWITCH_FOUND; 5329 return (QLA_SUCCESS); 5330 } 5331 vha->device_flags |= SWITCH_FOUND; 5332 5333 5334 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5335 rval = qla2x00_send_change_request(vha, 0x3, 0); 5336 if (rval != QLA_SUCCESS) 5337 ql_log(ql_log_warn, vha, 0x121, 5338 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5339 rval); 5340 } 5341 5342 5343 do { 5344 qla2x00_mgmt_svr_login(vha); 5345 5346 /* FDMI support. */ 5347 if (ql2xfdmienable && 5348 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5349 qla2x00_fdmi_register(vha); 5350 5351 /* Ensure we are logged into the SNS. */ 5352 loop_id = NPH_SNS_LID(ha); 5353 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5354 0xfc, mb, BIT_1|BIT_0); 5355 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5356 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5357 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5358 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5359 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5360 return rval; 5361 } 5362 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5363 if (qla2x00_rft_id(vha)) { 5364 /* EMPTY */ 5365 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5366 "Register FC-4 TYPE failed.\n"); 5367 if (test_bit(LOOP_RESYNC_NEEDED, 5368 &vha->dpc_flags)) 5369 break; 5370 } 5371 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5372 /* EMPTY */ 5373 ql_dbg(ql_dbg_disc, vha, 0x209a, 5374 "Register FC-4 Features failed.\n"); 5375 if (test_bit(LOOP_RESYNC_NEEDED, 5376 &vha->dpc_flags)) 5377 break; 5378 } 5379 if (vha->flags.nvme_enabled) { 5380 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5381 ql_dbg(ql_dbg_disc, vha, 0x2049, 5382 "Register NVME FC Type Features failed.\n"); 5383 } 5384 } 5385 if (qla2x00_rnn_id(vha)) { 5386 /* EMPTY */ 5387 ql_dbg(ql_dbg_disc, vha, 0x2104, 5388 "Register Node Name failed.\n"); 5389 if (test_bit(LOOP_RESYNC_NEEDED, 5390 &vha->dpc_flags)) 5391 break; 5392 } else if (qla2x00_rsnn_nn(vha)) { 5393 /* EMPTY */ 5394 ql_dbg(ql_dbg_disc, vha, 0x209b, 5395 "Register Symbolic Node Name failed.\n"); 5396 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5397 break; 5398 } 5399 } 5400 5401 5402 /* Mark the time right before querying FW for connected ports. 5403 * This process is long, asynchronous and by the time it's done, 5404 * collected information might not be accurate anymore. E.g. 5405 * disconnected port might have re-connected and a brand new 5406 * session has been created. In this case session's generation 5407 * will be newer than discovery_gen. */ 5408 qlt_do_generation_tick(vha, &discovery_gen); 5409 5410 if (USE_ASYNC_SCAN(ha)) { 5411 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5412 NULL); 5413 if (rval) 5414 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5415 } else { 5416 list_for_each_entry(fcport, &vha->vp_fcports, list) 5417 fcport->scan_state = QLA_FCPORT_SCAN; 5418 5419 rval = qla2x00_find_all_fabric_devs(vha); 5420 } 5421 if (rval != QLA_SUCCESS) 5422 break; 5423 } while (0); 5424 5425 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5426 qla_nvme_register_hba(vha); 5427 5428 if (rval) 5429 ql_dbg(ql_dbg_disc, vha, 0x2068, 5430 "Configure fabric error exit rval=%d.\n", rval); 5431 5432 return (rval); 5433 } 5434 5435 /* 5436 * qla2x00_find_all_fabric_devs 5437 * 5438 * Input: 5439 * ha = adapter block pointer. 5440 * dev = database device entry pointer. 5441 * 5442 * Returns: 5443 * 0 = success. 5444 * 5445 * Context: 5446 * Kernel context. 5447 */ 5448 static int 5449 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5450 { 5451 int rval; 5452 uint16_t loop_id; 5453 fc_port_t *fcport, *new_fcport; 5454 int found; 5455 5456 sw_info_t *swl; 5457 int swl_idx; 5458 int first_dev, last_dev; 5459 port_id_t wrap = {}, nxt_d_id; 5460 struct qla_hw_data *ha = vha->hw; 5461 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5462 unsigned long flags; 5463 5464 rval = QLA_SUCCESS; 5465 5466 /* Try GID_PT to get device list, else GAN. */ 5467 if (!ha->swl) 5468 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5469 GFP_KERNEL); 5470 swl = ha->swl; 5471 if (!swl) { 5472 /*EMPTY*/ 5473 ql_dbg(ql_dbg_disc, vha, 0x209c, 5474 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5475 } else { 5476 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5477 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5478 swl = NULL; 5479 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5480 return rval; 5481 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5482 swl = NULL; 5483 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5484 return rval; 5485 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5486 swl = NULL; 5487 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5488 return rval; 5489 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5490 swl = NULL; 5491 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5492 return rval; 5493 } 5494 5495 /* If other queries succeeded probe for FC-4 type */ 5496 if (swl) { 5497 qla2x00_gff_id(vha, swl); 5498 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5499 return rval; 5500 } 5501 } 5502 swl_idx = 0; 5503 5504 /* Allocate temporary fcport for any new fcports discovered. */ 5505 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5506 if (new_fcport == NULL) { 5507 ql_log(ql_log_warn, vha, 0x209d, 5508 "Failed to allocate memory for fcport.\n"); 5509 return (QLA_MEMORY_ALLOC_FAILED); 5510 } 5511 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5512 /* Set start port ID scan at adapter ID. */ 5513 first_dev = 1; 5514 last_dev = 0; 5515 5516 /* Starting free loop ID. */ 5517 loop_id = ha->min_external_loopid; 5518 for (; loop_id <= ha->max_loop_id; loop_id++) { 5519 if (qla2x00_is_reserved_id(vha, loop_id)) 5520 continue; 5521 5522 if (ha->current_topology == ISP_CFG_FL && 5523 (atomic_read(&vha->loop_down_timer) || 5524 LOOP_TRANSITION(vha))) { 5525 atomic_set(&vha->loop_down_timer, 0); 5526 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5527 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5528 break; 5529 } 5530 5531 if (swl != NULL) { 5532 if (last_dev) { 5533 wrap.b24 = new_fcport->d_id.b24; 5534 } else { 5535 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5536 memcpy(new_fcport->node_name, 5537 swl[swl_idx].node_name, WWN_SIZE); 5538 memcpy(new_fcport->port_name, 5539 swl[swl_idx].port_name, WWN_SIZE); 5540 memcpy(new_fcport->fabric_port_name, 5541 swl[swl_idx].fabric_port_name, WWN_SIZE); 5542 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5543 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5544 5545 new_fcport->nvme_flag = 0; 5546 new_fcport->fc4f_nvme = 0; 5547 if (vha->flags.nvme_enabled && 5548 swl[swl_idx].fc4f_nvme) { 5549 new_fcport->fc4f_nvme = 5550 swl[swl_idx].fc4f_nvme; 5551 ql_log(ql_log_info, vha, 0x2131, 5552 "FOUND: NVME port %8phC as FC Type 28h\n", 5553 new_fcport->port_name); 5554 } 5555 5556 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5557 last_dev = 1; 5558 } 5559 swl_idx++; 5560 } 5561 } else { 5562 /* Send GA_NXT to the switch */ 5563 rval = qla2x00_ga_nxt(vha, new_fcport); 5564 if (rval != QLA_SUCCESS) { 5565 ql_log(ql_log_warn, vha, 0x209e, 5566 "SNS scan failed -- assuming " 5567 "zero-entry result.\n"); 5568 rval = QLA_SUCCESS; 5569 break; 5570 } 5571 } 5572 5573 /* If wrap on switch device list, exit. */ 5574 if (first_dev) { 5575 wrap.b24 = new_fcport->d_id.b24; 5576 first_dev = 0; 5577 } else if (new_fcport->d_id.b24 == wrap.b24) { 5578 ql_dbg(ql_dbg_disc, vha, 0x209f, 5579 "Device wrap (%02x%02x%02x).\n", 5580 new_fcport->d_id.b.domain, 5581 new_fcport->d_id.b.area, 5582 new_fcport->d_id.b.al_pa); 5583 break; 5584 } 5585 5586 /* Bypass if same physical adapter. */ 5587 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5588 continue; 5589 5590 /* Bypass virtual ports of the same host. */ 5591 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5592 continue; 5593 5594 /* Bypass if same domain and area of adapter. */ 5595 if (((new_fcport->d_id.b24 & 0xffff00) == 5596 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5597 ISP_CFG_FL) 5598 continue; 5599 5600 /* Bypass reserved domain fields. */ 5601 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5602 continue; 5603 5604 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5605 if (ql2xgffidenable && 5606 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5607 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5608 continue; 5609 5610 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5611 5612 /* Locate matching device in database. */ 5613 found = 0; 5614 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5615 if (memcmp(new_fcport->port_name, fcport->port_name, 5616 WWN_SIZE)) 5617 continue; 5618 5619 fcport->scan_state = QLA_FCPORT_FOUND; 5620 5621 found++; 5622 5623 /* Update port state. */ 5624 memcpy(fcport->fabric_port_name, 5625 new_fcport->fabric_port_name, WWN_SIZE); 5626 fcport->fp_speed = new_fcport->fp_speed; 5627 5628 /* 5629 * If address the same and state FCS_ONLINE 5630 * (or in target mode), nothing changed. 5631 */ 5632 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5633 (atomic_read(&fcport->state) == FCS_ONLINE || 5634 (vha->host->active_mode == MODE_TARGET))) { 5635 break; 5636 } 5637 5638 /* 5639 * If device was not a fabric device before. 5640 */ 5641 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5642 fcport->d_id.b24 = new_fcport->d_id.b24; 5643 qla2x00_clear_loop_id(fcport); 5644 fcport->flags |= (FCF_FABRIC_DEVICE | 5645 FCF_LOGIN_NEEDED); 5646 break; 5647 } 5648 5649 /* 5650 * Port ID changed or device was marked to be updated; 5651 * Log it out if still logged in and mark it for 5652 * relogin later. 5653 */ 5654 if (qla_tgt_mode_enabled(base_vha)) { 5655 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5656 "port changed FC ID, %8phC" 5657 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5658 fcport->port_name, 5659 fcport->d_id.b.domain, 5660 fcport->d_id.b.area, 5661 fcport->d_id.b.al_pa, 5662 fcport->loop_id, 5663 new_fcport->d_id.b.domain, 5664 new_fcport->d_id.b.area, 5665 new_fcport->d_id.b.al_pa); 5666 fcport->d_id.b24 = new_fcport->d_id.b24; 5667 break; 5668 } 5669 5670 fcport->d_id.b24 = new_fcport->d_id.b24; 5671 fcport->flags |= FCF_LOGIN_NEEDED; 5672 break; 5673 } 5674 5675 if (fcport->fc4f_nvme) { 5676 if (fcport->disc_state == DSC_DELETE_PEND) { 5677 fcport->disc_state = DSC_GNL; 5678 vha->fcport_count--; 5679 fcport->login_succ = 0; 5680 } 5681 } 5682 5683 if (found) { 5684 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5685 continue; 5686 } 5687 /* If device was not in our fcports list, then add it. */ 5688 new_fcport->scan_state = QLA_FCPORT_FOUND; 5689 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5690 5691 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5692 5693 5694 /* Allocate a new replacement fcport. */ 5695 nxt_d_id.b24 = new_fcport->d_id.b24; 5696 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5697 if (new_fcport == NULL) { 5698 ql_log(ql_log_warn, vha, 0xd032, 5699 "Memory allocation failed for fcport.\n"); 5700 return (QLA_MEMORY_ALLOC_FAILED); 5701 } 5702 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5703 new_fcport->d_id.b24 = nxt_d_id.b24; 5704 } 5705 5706 qla2x00_free_fcport(new_fcport); 5707 5708 /* 5709 * Logout all previous fabric dev marked lost, except FCP2 devices. 5710 */ 5711 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5712 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5713 break; 5714 5715 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5716 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5717 continue; 5718 5719 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5720 if ((qla_dual_mode_enabled(vha) || 5721 qla_ini_mode_enabled(vha)) && 5722 atomic_read(&fcport->state) == FCS_ONLINE) { 5723 qla2x00_mark_device_lost(vha, fcport, 5724 ql2xplogiabsentdevice, 0); 5725 if (fcport->loop_id != FC_NO_LOOP_ID && 5726 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5727 fcport->port_type != FCT_INITIATOR && 5728 fcport->port_type != FCT_BROADCAST) { 5729 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5730 "%s %d %8phC post del sess\n", 5731 __func__, __LINE__, 5732 fcport->port_name); 5733 qlt_schedule_sess_for_deletion(fcport); 5734 continue; 5735 } 5736 } 5737 } 5738 5739 if (fcport->scan_state == QLA_FCPORT_FOUND) 5740 qla24xx_fcport_handle_login(vha, fcport); 5741 } 5742 return (rval); 5743 } 5744 5745 /* 5746 * qla2x00_find_new_loop_id 5747 * Scan through our port list and find a new usable loop ID. 5748 * 5749 * Input: 5750 * ha: adapter state pointer. 5751 * dev: port structure pointer. 5752 * 5753 * Returns: 5754 * qla2x00 local function return status code. 5755 * 5756 * Context: 5757 * Kernel context. 5758 */ 5759 int 5760 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5761 { 5762 int rval; 5763 struct qla_hw_data *ha = vha->hw; 5764 unsigned long flags = 0; 5765 5766 rval = QLA_SUCCESS; 5767 5768 spin_lock_irqsave(&ha->vport_slock, flags); 5769 5770 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5771 LOOPID_MAP_SIZE); 5772 if (dev->loop_id >= LOOPID_MAP_SIZE || 5773 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5774 dev->loop_id = FC_NO_LOOP_ID; 5775 rval = QLA_FUNCTION_FAILED; 5776 } else 5777 set_bit(dev->loop_id, ha->loop_id_map); 5778 5779 spin_unlock_irqrestore(&ha->vport_slock, flags); 5780 5781 if (rval == QLA_SUCCESS) 5782 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5783 "Assigning new loopid=%x, portid=%x.\n", 5784 dev->loop_id, dev->d_id.b24); 5785 else 5786 ql_log(ql_log_warn, dev->vha, 0x2087, 5787 "No loop_id's available, portid=%x.\n", 5788 dev->d_id.b24); 5789 5790 return (rval); 5791 } 5792 5793 5794 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 5795 int 5796 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 5797 { 5798 int loop_id = FC_NO_LOOP_ID; 5799 int lid = NPH_MGMT_SERVER - vha->vp_idx; 5800 unsigned long flags; 5801 struct qla_hw_data *ha = vha->hw; 5802 5803 if (vha->vp_idx == 0) { 5804 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 5805 return NPH_MGMT_SERVER; 5806 } 5807 5808 /* pick id from high and work down to low */ 5809 spin_lock_irqsave(&ha->vport_slock, flags); 5810 for (; lid > 0; lid--) { 5811 if (!test_bit(lid, vha->hw->loop_id_map)) { 5812 set_bit(lid, vha->hw->loop_id_map); 5813 loop_id = lid; 5814 break; 5815 } 5816 } 5817 spin_unlock_irqrestore(&ha->vport_slock, flags); 5818 5819 return loop_id; 5820 } 5821 5822 /* 5823 * qla2x00_fabric_login 5824 * Issue fabric login command. 5825 * 5826 * Input: 5827 * ha = adapter block pointer. 5828 * device = pointer to FC device type structure. 5829 * 5830 * Returns: 5831 * 0 - Login successfully 5832 * 1 - Login failed 5833 * 2 - Initiator device 5834 * 3 - Fatal error 5835 */ 5836 int 5837 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5838 uint16_t *next_loopid) 5839 { 5840 int rval; 5841 int retry; 5842 uint16_t tmp_loopid; 5843 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5844 struct qla_hw_data *ha = vha->hw; 5845 5846 retry = 0; 5847 tmp_loopid = 0; 5848 5849 for (;;) { 5850 ql_dbg(ql_dbg_disc, vha, 0x2000, 5851 "Trying Fabric Login w/loop id 0x%04x for port " 5852 "%02x%02x%02x.\n", 5853 fcport->loop_id, fcport->d_id.b.domain, 5854 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5855 5856 /* Login fcport on switch. */ 5857 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5858 fcport->d_id.b.domain, fcport->d_id.b.area, 5859 fcport->d_id.b.al_pa, mb, BIT_0); 5860 if (rval != QLA_SUCCESS) { 5861 return rval; 5862 } 5863 if (mb[0] == MBS_PORT_ID_USED) { 5864 /* 5865 * Device has another loop ID. The firmware team 5866 * recommends the driver perform an implicit login with 5867 * the specified ID again. The ID we just used is save 5868 * here so we return with an ID that can be tried by 5869 * the next login. 5870 */ 5871 retry++; 5872 tmp_loopid = fcport->loop_id; 5873 fcport->loop_id = mb[1]; 5874 5875 ql_dbg(ql_dbg_disc, vha, 0x2001, 5876 "Fabric Login: port in use - next loop " 5877 "id=0x%04x, port id= %02x%02x%02x.\n", 5878 fcport->loop_id, fcport->d_id.b.domain, 5879 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5880 5881 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5882 /* 5883 * Login succeeded. 5884 */ 5885 if (retry) { 5886 /* A retry occurred before. */ 5887 *next_loopid = tmp_loopid; 5888 } else { 5889 /* 5890 * No retry occurred before. Just increment the 5891 * ID value for next login. 5892 */ 5893 *next_loopid = (fcport->loop_id + 1); 5894 } 5895 5896 if (mb[1] & BIT_0) { 5897 fcport->port_type = FCT_INITIATOR; 5898 } else { 5899 fcport->port_type = FCT_TARGET; 5900 if (mb[1] & BIT_1) { 5901 fcport->flags |= FCF_FCP2_DEVICE; 5902 } 5903 } 5904 5905 if (mb[10] & BIT_0) 5906 fcport->supported_classes |= FC_COS_CLASS2; 5907 if (mb[10] & BIT_1) 5908 fcport->supported_classes |= FC_COS_CLASS3; 5909 5910 if (IS_FWI2_CAPABLE(ha)) { 5911 if (mb[10] & BIT_7) 5912 fcport->flags |= 5913 FCF_CONF_COMP_SUPPORTED; 5914 } 5915 5916 rval = QLA_SUCCESS; 5917 break; 5918 } else if (mb[0] == MBS_LOOP_ID_USED) { 5919 /* 5920 * Loop ID already used, try next loop ID. 5921 */ 5922 fcport->loop_id++; 5923 rval = qla2x00_find_new_loop_id(vha, fcport); 5924 if (rval != QLA_SUCCESS) { 5925 /* Ran out of loop IDs to use */ 5926 break; 5927 } 5928 } else if (mb[0] == MBS_COMMAND_ERROR) { 5929 /* 5930 * Firmware possibly timed out during login. If NO 5931 * retries are left to do then the device is declared 5932 * dead. 5933 */ 5934 *next_loopid = fcport->loop_id; 5935 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5936 fcport->d_id.b.domain, fcport->d_id.b.area, 5937 fcport->d_id.b.al_pa); 5938 qla2x00_mark_device_lost(vha, fcport, 1, 0); 5939 5940 rval = 1; 5941 break; 5942 } else { 5943 /* 5944 * unrecoverable / not handled error 5945 */ 5946 ql_dbg(ql_dbg_disc, vha, 0x2002, 5947 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 5948 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 5949 fcport->d_id.b.area, fcport->d_id.b.al_pa, 5950 fcport->loop_id, jiffies); 5951 5952 *next_loopid = fcport->loop_id; 5953 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5954 fcport->d_id.b.domain, fcport->d_id.b.area, 5955 fcport->d_id.b.al_pa); 5956 qla2x00_clear_loop_id(fcport); 5957 fcport->login_retry = 0; 5958 5959 rval = 3; 5960 break; 5961 } 5962 } 5963 5964 return (rval); 5965 } 5966 5967 /* 5968 * qla2x00_local_device_login 5969 * Issue local device login command. 5970 * 5971 * Input: 5972 * ha = adapter block pointer. 5973 * loop_id = loop id of device to login to. 5974 * 5975 * Returns (Where's the #define!!!!): 5976 * 0 - Login successfully 5977 * 1 - Login failed 5978 * 3 - Fatal error 5979 */ 5980 int 5981 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 5982 { 5983 int rval; 5984 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5985 5986 memset(mb, 0, sizeof(mb)); 5987 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 5988 if (rval == QLA_SUCCESS) { 5989 /* Interrogate mailbox registers for any errors */ 5990 if (mb[0] == MBS_COMMAND_ERROR) 5991 rval = 1; 5992 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 5993 /* device not in PCB table */ 5994 rval = 3; 5995 } 5996 5997 return (rval); 5998 } 5999 6000 /* 6001 * qla2x00_loop_resync 6002 * Resync with fibre channel devices. 6003 * 6004 * Input: 6005 * ha = adapter block pointer. 6006 * 6007 * Returns: 6008 * 0 = success 6009 */ 6010 int 6011 qla2x00_loop_resync(scsi_qla_host_t *vha) 6012 { 6013 int rval = QLA_SUCCESS; 6014 uint32_t wait_time; 6015 struct req_que *req; 6016 struct rsp_que *rsp; 6017 6018 req = vha->req; 6019 rsp = req->rsp; 6020 6021 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6022 if (vha->flags.online) { 6023 if (!(rval = qla2x00_fw_ready(vha))) { 6024 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6025 wait_time = 256; 6026 do { 6027 if (!IS_QLAFX00(vha->hw)) { 6028 /* 6029 * Issue a marker after FW becomes 6030 * ready. 6031 */ 6032 qla2x00_marker(vha, req, rsp, 0, 0, 6033 MK_SYNC_ALL); 6034 vha->marker_needed = 0; 6035 } 6036 6037 /* Remap devices on Loop. */ 6038 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6039 6040 if (IS_QLAFX00(vha->hw)) 6041 qlafx00_configure_devices(vha); 6042 else 6043 qla2x00_configure_loop(vha); 6044 6045 wait_time--; 6046 } while (!atomic_read(&vha->loop_down_timer) && 6047 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6048 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6049 &vha->dpc_flags))); 6050 } 6051 } 6052 6053 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6054 return (QLA_FUNCTION_FAILED); 6055 6056 if (rval) 6057 ql_dbg(ql_dbg_disc, vha, 0x206c, 6058 "%s *** FAILED ***.\n", __func__); 6059 6060 return (rval); 6061 } 6062 6063 /* 6064 * qla2x00_perform_loop_resync 6065 * Description: This function will set the appropriate flags and call 6066 * qla2x00_loop_resync. If successful loop will be resynced 6067 * Arguments : scsi_qla_host_t pointer 6068 * returm : Success or Failure 6069 */ 6070 6071 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6072 { 6073 int32_t rval = 0; 6074 6075 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6076 /*Configure the flags so that resync happens properly*/ 6077 atomic_set(&ha->loop_down_timer, 0); 6078 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6079 atomic_set(&ha->loop_state, LOOP_UP); 6080 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6081 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6082 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6083 6084 rval = qla2x00_loop_resync(ha); 6085 } else 6086 atomic_set(&ha->loop_state, LOOP_DEAD); 6087 6088 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6089 } 6090 6091 return rval; 6092 } 6093 6094 void 6095 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6096 { 6097 fc_port_t *fcport; 6098 struct scsi_qla_host *vha; 6099 struct qla_hw_data *ha = base_vha->hw; 6100 unsigned long flags; 6101 6102 spin_lock_irqsave(&ha->vport_slock, flags); 6103 /* Go with deferred removal of rport references. */ 6104 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6105 atomic_inc(&vha->vref_count); 6106 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6107 if (fcport->drport && 6108 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6109 spin_unlock_irqrestore(&ha->vport_slock, flags); 6110 qla2x00_rport_del(fcport); 6111 6112 spin_lock_irqsave(&ha->vport_slock, flags); 6113 } 6114 } 6115 atomic_dec(&vha->vref_count); 6116 wake_up(&vha->vref_waitq); 6117 } 6118 spin_unlock_irqrestore(&ha->vport_slock, flags); 6119 } 6120 6121 /* Assumes idc_lock always held on entry */ 6122 void 6123 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6124 { 6125 struct qla_hw_data *ha = vha->hw; 6126 uint32_t drv_presence, drv_presence_mask; 6127 uint32_t dev_part_info1, dev_part_info2, class_type; 6128 uint32_t class_type_mask = 0x3; 6129 uint16_t fcoe_other_function = 0xffff, i; 6130 6131 if (IS_QLA8044(ha)) { 6132 drv_presence = qla8044_rd_direct(vha, 6133 QLA8044_CRB_DRV_ACTIVE_INDEX); 6134 dev_part_info1 = qla8044_rd_direct(vha, 6135 QLA8044_CRB_DEV_PART_INFO_INDEX); 6136 dev_part_info2 = qla8044_rd_direct(vha, 6137 QLA8044_CRB_DEV_PART_INFO2); 6138 } else { 6139 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6140 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6141 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6142 } 6143 for (i = 0; i < 8; i++) { 6144 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6145 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6146 (i != ha->portnum)) { 6147 fcoe_other_function = i; 6148 break; 6149 } 6150 } 6151 if (fcoe_other_function == 0xffff) { 6152 for (i = 0; i < 8; i++) { 6153 class_type = ((dev_part_info2 >> (i * 4)) & 6154 class_type_mask); 6155 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6156 ((i + 8) != ha->portnum)) { 6157 fcoe_other_function = i + 8; 6158 break; 6159 } 6160 } 6161 } 6162 /* 6163 * Prepare drv-presence mask based on fcoe functions present. 6164 * However consider only valid physical fcoe function numbers (0-15). 6165 */ 6166 drv_presence_mask = ~((1 << (ha->portnum)) | 6167 ((fcoe_other_function == 0xffff) ? 6168 0 : (1 << (fcoe_other_function)))); 6169 6170 /* We are the reset owner iff: 6171 * - No other protocol drivers present. 6172 * - This is the lowest among fcoe functions. */ 6173 if (!(drv_presence & drv_presence_mask) && 6174 (ha->portnum < fcoe_other_function)) { 6175 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6176 "This host is Reset owner.\n"); 6177 ha->flags.nic_core_reset_owner = 1; 6178 } 6179 } 6180 6181 static int 6182 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6183 { 6184 int rval = QLA_SUCCESS; 6185 struct qla_hw_data *ha = vha->hw; 6186 uint32_t drv_ack; 6187 6188 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6189 if (rval == QLA_SUCCESS) { 6190 drv_ack |= (1 << ha->portnum); 6191 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6192 } 6193 6194 return rval; 6195 } 6196 6197 static int 6198 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6199 { 6200 int rval = QLA_SUCCESS; 6201 struct qla_hw_data *ha = vha->hw; 6202 uint32_t drv_ack; 6203 6204 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6205 if (rval == QLA_SUCCESS) { 6206 drv_ack &= ~(1 << ha->portnum); 6207 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6208 } 6209 6210 return rval; 6211 } 6212 6213 static const char * 6214 qla83xx_dev_state_to_string(uint32_t dev_state) 6215 { 6216 switch (dev_state) { 6217 case QLA8XXX_DEV_COLD: 6218 return "COLD/RE-INIT"; 6219 case QLA8XXX_DEV_INITIALIZING: 6220 return "INITIALIZING"; 6221 case QLA8XXX_DEV_READY: 6222 return "READY"; 6223 case QLA8XXX_DEV_NEED_RESET: 6224 return "NEED RESET"; 6225 case QLA8XXX_DEV_NEED_QUIESCENT: 6226 return "NEED QUIESCENT"; 6227 case QLA8XXX_DEV_FAILED: 6228 return "FAILED"; 6229 case QLA8XXX_DEV_QUIESCENT: 6230 return "QUIESCENT"; 6231 default: 6232 return "Unknown"; 6233 } 6234 } 6235 6236 /* Assumes idc-lock always held on entry */ 6237 void 6238 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6239 { 6240 struct qla_hw_data *ha = vha->hw; 6241 uint32_t idc_audit_reg = 0, duration_secs = 0; 6242 6243 switch (audit_type) { 6244 case IDC_AUDIT_TIMESTAMP: 6245 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6246 idc_audit_reg = (ha->portnum) | 6247 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6248 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6249 break; 6250 6251 case IDC_AUDIT_COMPLETION: 6252 duration_secs = ((jiffies_to_msecs(jiffies) - 6253 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6254 idc_audit_reg = (ha->portnum) | 6255 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6256 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6257 break; 6258 6259 default: 6260 ql_log(ql_log_warn, vha, 0xb078, 6261 "Invalid audit type specified.\n"); 6262 break; 6263 } 6264 } 6265 6266 /* Assumes idc_lock always held on entry */ 6267 static int 6268 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6269 { 6270 struct qla_hw_data *ha = vha->hw; 6271 uint32_t idc_control, dev_state; 6272 6273 __qla83xx_get_idc_control(vha, &idc_control); 6274 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6275 ql_log(ql_log_info, vha, 0xb080, 6276 "NIC Core reset has been disabled. idc-control=0x%x\n", 6277 idc_control); 6278 return QLA_FUNCTION_FAILED; 6279 } 6280 6281 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6282 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6283 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6284 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6285 QLA8XXX_DEV_NEED_RESET); 6286 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6287 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6288 } else { 6289 const char *state = qla83xx_dev_state_to_string(dev_state); 6290 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6291 6292 /* SV: XXX: Is timeout required here? */ 6293 /* Wait for IDC state change READY -> NEED_RESET */ 6294 while (dev_state == QLA8XXX_DEV_READY) { 6295 qla83xx_idc_unlock(vha, 0); 6296 msleep(200); 6297 qla83xx_idc_lock(vha, 0); 6298 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6299 } 6300 } 6301 6302 /* Send IDC ack by writing to drv-ack register */ 6303 __qla83xx_set_drv_ack(vha); 6304 6305 return QLA_SUCCESS; 6306 } 6307 6308 int 6309 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6310 { 6311 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6312 } 6313 6314 int 6315 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6316 { 6317 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6318 } 6319 6320 static int 6321 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6322 { 6323 uint32_t drv_presence = 0; 6324 struct qla_hw_data *ha = vha->hw; 6325 6326 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6327 if (drv_presence & (1 << ha->portnum)) 6328 return QLA_SUCCESS; 6329 else 6330 return QLA_TEST_FAILED; 6331 } 6332 6333 int 6334 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6335 { 6336 int rval = QLA_SUCCESS; 6337 struct qla_hw_data *ha = vha->hw; 6338 6339 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6340 "Entered %s().\n", __func__); 6341 6342 if (vha->device_flags & DFLG_DEV_FAILED) { 6343 ql_log(ql_log_warn, vha, 0xb059, 6344 "Device in unrecoverable FAILED state.\n"); 6345 return QLA_FUNCTION_FAILED; 6346 } 6347 6348 qla83xx_idc_lock(vha, 0); 6349 6350 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6351 ql_log(ql_log_warn, vha, 0xb05a, 6352 "Function=0x%x has been removed from IDC participation.\n", 6353 ha->portnum); 6354 rval = QLA_FUNCTION_FAILED; 6355 goto exit; 6356 } 6357 6358 qla83xx_reset_ownership(vha); 6359 6360 rval = qla83xx_initiating_reset(vha); 6361 6362 /* 6363 * Perform reset if we are the reset-owner, 6364 * else wait till IDC state changes to READY/FAILED. 6365 */ 6366 if (rval == QLA_SUCCESS) { 6367 rval = qla83xx_idc_state_handler(vha); 6368 6369 if (rval == QLA_SUCCESS) 6370 ha->flags.nic_core_hung = 0; 6371 __qla83xx_clear_drv_ack(vha); 6372 } 6373 6374 exit: 6375 qla83xx_idc_unlock(vha, 0); 6376 6377 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6378 6379 return rval; 6380 } 6381 6382 int 6383 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6384 { 6385 struct qla_hw_data *ha = vha->hw; 6386 int rval = QLA_FUNCTION_FAILED; 6387 6388 if (!IS_MCTP_CAPABLE(ha)) { 6389 /* This message can be removed from the final version */ 6390 ql_log(ql_log_info, vha, 0x506d, 6391 "This board is not MCTP capable\n"); 6392 return rval; 6393 } 6394 6395 if (!ha->mctp_dump) { 6396 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6397 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6398 6399 if (!ha->mctp_dump) { 6400 ql_log(ql_log_warn, vha, 0x506e, 6401 "Failed to allocate memory for mctp dump\n"); 6402 return rval; 6403 } 6404 } 6405 6406 #define MCTP_DUMP_STR_ADDR 0x00000000 6407 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6408 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6409 if (rval != QLA_SUCCESS) { 6410 ql_log(ql_log_warn, vha, 0x506f, 6411 "Failed to capture mctp dump\n"); 6412 } else { 6413 ql_log(ql_log_info, vha, 0x5070, 6414 "Mctp dump capture for host (%ld/%p).\n", 6415 vha->host_no, ha->mctp_dump); 6416 ha->mctp_dumped = 1; 6417 } 6418 6419 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6420 ha->flags.nic_core_reset_hdlr_active = 1; 6421 rval = qla83xx_restart_nic_firmware(vha); 6422 if (rval) 6423 /* NIC Core reset failed. */ 6424 ql_log(ql_log_warn, vha, 0x5071, 6425 "Failed to restart nic firmware\n"); 6426 else 6427 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6428 "Restarted NIC firmware successfully.\n"); 6429 ha->flags.nic_core_reset_hdlr_active = 0; 6430 } 6431 6432 return rval; 6433 6434 } 6435 6436 /* 6437 * qla2x00_quiesce_io 6438 * Description: This function will block the new I/Os 6439 * Its not aborting any I/Os as context 6440 * is not destroyed during quiescence 6441 * Arguments: scsi_qla_host_t 6442 * return : void 6443 */ 6444 void 6445 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6446 { 6447 struct qla_hw_data *ha = vha->hw; 6448 struct scsi_qla_host *vp; 6449 6450 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6451 "Quiescing I/O - ha=%p.\n", ha); 6452 6453 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6454 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6455 atomic_set(&vha->loop_state, LOOP_DOWN); 6456 qla2x00_mark_all_devices_lost(vha, 0); 6457 list_for_each_entry(vp, &ha->vp_list, list) 6458 qla2x00_mark_all_devices_lost(vp, 0); 6459 } else { 6460 if (!atomic_read(&vha->loop_down_timer)) 6461 atomic_set(&vha->loop_down_timer, 6462 LOOP_DOWN_TIME); 6463 } 6464 /* Wait for pending cmds to complete */ 6465 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6466 } 6467 6468 void 6469 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6470 { 6471 struct qla_hw_data *ha = vha->hw; 6472 struct scsi_qla_host *vp; 6473 unsigned long flags; 6474 fc_port_t *fcport; 6475 u16 i; 6476 6477 /* For ISP82XX, driver waits for completion of the commands. 6478 * online flag should be set. 6479 */ 6480 if (!(IS_P3P_TYPE(ha))) 6481 vha->flags.online = 0; 6482 ha->flags.chip_reset_done = 0; 6483 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6484 vha->qla_stats.total_isp_aborts++; 6485 6486 ql_log(ql_log_info, vha, 0x00af, 6487 "Performing ISP error recovery - ha=%p.\n", ha); 6488 6489 ha->flags.purge_mbox = 1; 6490 /* For ISP82XX, reset_chip is just disabling interrupts. 6491 * Driver waits for the completion of the commands. 6492 * the interrupts need to be enabled. 6493 */ 6494 if (!(IS_P3P_TYPE(ha))) 6495 ha->isp_ops->reset_chip(vha); 6496 6497 SAVE_TOPO(ha); 6498 ha->flags.rida_fmt2 = 0; 6499 ha->flags.n2n_ae = 0; 6500 ha->flags.lip_ae = 0; 6501 ha->current_topology = 0; 6502 ha->flags.fw_started = 0; 6503 ha->flags.fw_init_done = 0; 6504 ha->chip_reset++; 6505 ha->base_qpair->chip_reset = ha->chip_reset; 6506 for (i = 0; i < ha->max_qpairs; i++) { 6507 if (ha->queue_pair_map[i]) 6508 ha->queue_pair_map[i]->chip_reset = 6509 ha->base_qpair->chip_reset; 6510 } 6511 6512 /* purge MBox commands */ 6513 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6514 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6515 complete(&ha->mbx_intr_comp); 6516 } 6517 6518 i = 0; 6519 while (atomic_read(&ha->num_pend_mbx_stage3) || 6520 atomic_read(&ha->num_pend_mbx_stage2) || 6521 atomic_read(&ha->num_pend_mbx_stage1)) { 6522 msleep(20); 6523 i++; 6524 if (i > 50) 6525 break; 6526 } 6527 ha->flags.purge_mbox = 0; 6528 6529 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6530 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6531 atomic_set(&vha->loop_state, LOOP_DOWN); 6532 qla2x00_mark_all_devices_lost(vha, 0); 6533 6534 spin_lock_irqsave(&ha->vport_slock, flags); 6535 list_for_each_entry(vp, &ha->vp_list, list) { 6536 atomic_inc(&vp->vref_count); 6537 spin_unlock_irqrestore(&ha->vport_slock, flags); 6538 6539 qla2x00_mark_all_devices_lost(vp, 0); 6540 6541 spin_lock_irqsave(&ha->vport_slock, flags); 6542 atomic_dec(&vp->vref_count); 6543 } 6544 spin_unlock_irqrestore(&ha->vport_slock, flags); 6545 } else { 6546 if (!atomic_read(&vha->loop_down_timer)) 6547 atomic_set(&vha->loop_down_timer, 6548 LOOP_DOWN_TIME); 6549 } 6550 6551 /* Clear all async request states across all VPs. */ 6552 list_for_each_entry(fcport, &vha->vp_fcports, list) 6553 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6554 spin_lock_irqsave(&ha->vport_slock, flags); 6555 list_for_each_entry(vp, &ha->vp_list, list) { 6556 atomic_inc(&vp->vref_count); 6557 spin_unlock_irqrestore(&ha->vport_slock, flags); 6558 6559 list_for_each_entry(fcport, &vp->vp_fcports, list) 6560 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6561 6562 spin_lock_irqsave(&ha->vport_slock, flags); 6563 atomic_dec(&vp->vref_count); 6564 } 6565 spin_unlock_irqrestore(&ha->vport_slock, flags); 6566 6567 if (!ha->flags.eeh_busy) { 6568 /* Make sure for ISP 82XX IO DMA is complete */ 6569 if (IS_P3P_TYPE(ha)) { 6570 qla82xx_chip_reset_cleanup(vha); 6571 ql_log(ql_log_info, vha, 0x00b4, 6572 "Done chip reset cleanup.\n"); 6573 6574 /* Done waiting for pending commands. 6575 * Reset the online flag. 6576 */ 6577 vha->flags.online = 0; 6578 } 6579 6580 /* Requeue all commands in outstanding command list. */ 6581 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6582 } 6583 /* memory barrier */ 6584 wmb(); 6585 } 6586 6587 /* 6588 * qla2x00_abort_isp 6589 * Resets ISP and aborts all outstanding commands. 6590 * 6591 * Input: 6592 * ha = adapter block pointer. 6593 * 6594 * Returns: 6595 * 0 = success 6596 */ 6597 int 6598 qla2x00_abort_isp(scsi_qla_host_t *vha) 6599 { 6600 int rval; 6601 uint8_t status = 0; 6602 struct qla_hw_data *ha = vha->hw; 6603 struct scsi_qla_host *vp; 6604 struct req_que *req = ha->req_q_map[0]; 6605 unsigned long flags; 6606 6607 if (vha->flags.online) { 6608 qla2x00_abort_isp_cleanup(vha); 6609 6610 if (IS_QLA8031(ha)) { 6611 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6612 "Clearing fcoe driver presence.\n"); 6613 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6614 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6615 "Error while clearing DRV-Presence.\n"); 6616 } 6617 6618 if (unlikely(pci_channel_offline(ha->pdev) && 6619 ha->flags.pci_channel_io_perm_failure)) { 6620 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6621 status = 0; 6622 return status; 6623 } 6624 6625 ha->isp_ops->get_flash_version(vha, req->ring); 6626 6627 ha->isp_ops->nvram_config(vha); 6628 6629 if (!qla2x00_restart_isp(vha)) { 6630 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6631 6632 if (!atomic_read(&vha->loop_down_timer)) { 6633 /* 6634 * Issue marker command only when we are going 6635 * to start the I/O . 6636 */ 6637 vha->marker_needed = 1; 6638 } 6639 6640 vha->flags.online = 1; 6641 6642 ha->isp_ops->enable_intrs(ha); 6643 6644 ha->isp_abort_cnt = 0; 6645 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6646 6647 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6648 qla2x00_get_fw_version(vha); 6649 if (ha->fce) { 6650 ha->flags.fce_enabled = 1; 6651 memset(ha->fce, 0, 6652 fce_calc_size(ha->fce_bufs)); 6653 rval = qla2x00_enable_fce_trace(vha, 6654 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6655 &ha->fce_bufs); 6656 if (rval) { 6657 ql_log(ql_log_warn, vha, 0x8033, 6658 "Unable to reinitialize FCE " 6659 "(%d).\n", rval); 6660 ha->flags.fce_enabled = 0; 6661 } 6662 } 6663 6664 if (ha->eft) { 6665 memset(ha->eft, 0, EFT_SIZE); 6666 rval = qla2x00_enable_eft_trace(vha, 6667 ha->eft_dma, EFT_NUM_BUFFERS); 6668 if (rval) { 6669 ql_log(ql_log_warn, vha, 0x8034, 6670 "Unable to reinitialize EFT " 6671 "(%d).\n", rval); 6672 } 6673 } 6674 } else { /* failed the ISP abort */ 6675 vha->flags.online = 1; 6676 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6677 if (ha->isp_abort_cnt == 0) { 6678 ql_log(ql_log_fatal, vha, 0x8035, 6679 "ISP error recover failed - " 6680 "board disabled.\n"); 6681 /* 6682 * The next call disables the board 6683 * completely. 6684 */ 6685 ha->isp_ops->reset_adapter(vha); 6686 vha->flags.online = 0; 6687 clear_bit(ISP_ABORT_RETRY, 6688 &vha->dpc_flags); 6689 status = 0; 6690 } else { /* schedule another ISP abort */ 6691 ha->isp_abort_cnt--; 6692 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6693 "ISP abort - retry remaining %d.\n", 6694 ha->isp_abort_cnt); 6695 status = 1; 6696 } 6697 } else { 6698 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6699 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6700 "ISP error recovery - retrying (%d) " 6701 "more times.\n", ha->isp_abort_cnt); 6702 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6703 status = 1; 6704 } 6705 } 6706 6707 } 6708 6709 if (!status) { 6710 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6711 qla2x00_configure_hba(vha); 6712 spin_lock_irqsave(&ha->vport_slock, flags); 6713 list_for_each_entry(vp, &ha->vp_list, list) { 6714 if (vp->vp_idx) { 6715 atomic_inc(&vp->vref_count); 6716 spin_unlock_irqrestore(&ha->vport_slock, flags); 6717 6718 qla2x00_vp_abort_isp(vp); 6719 6720 spin_lock_irqsave(&ha->vport_slock, flags); 6721 atomic_dec(&vp->vref_count); 6722 } 6723 } 6724 spin_unlock_irqrestore(&ha->vport_slock, flags); 6725 6726 if (IS_QLA8031(ha)) { 6727 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6728 "Setting back fcoe driver presence.\n"); 6729 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6730 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6731 "Error while setting DRV-Presence.\n"); 6732 } 6733 } else { 6734 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6735 __func__); 6736 } 6737 6738 return(status); 6739 } 6740 6741 /* 6742 * qla2x00_restart_isp 6743 * restarts the ISP after a reset 6744 * 6745 * Input: 6746 * ha = adapter block pointer. 6747 * 6748 * Returns: 6749 * 0 = success 6750 */ 6751 static int 6752 qla2x00_restart_isp(scsi_qla_host_t *vha) 6753 { 6754 int status = 0; 6755 struct qla_hw_data *ha = vha->hw; 6756 struct req_que *req = ha->req_q_map[0]; 6757 struct rsp_que *rsp = ha->rsp_q_map[0]; 6758 6759 /* If firmware needs to be loaded */ 6760 if (qla2x00_isp_firmware(vha)) { 6761 vha->flags.online = 0; 6762 status = ha->isp_ops->chip_diag(vha); 6763 if (!status) 6764 status = qla2x00_setup_chip(vha); 6765 } 6766 6767 if (!status && !(status = qla2x00_init_rings(vha))) { 6768 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6769 ha->flags.chip_reset_done = 1; 6770 6771 /* Initialize the queues in use */ 6772 qla25xx_init_queues(ha); 6773 6774 status = qla2x00_fw_ready(vha); 6775 if (!status) { 6776 /* Issue a marker after FW becomes ready. */ 6777 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6778 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6779 } 6780 6781 /* if no cable then assume it's good */ 6782 if ((vha->device_flags & DFLG_NO_CABLE)) 6783 status = 0; 6784 } 6785 return (status); 6786 } 6787 6788 static int 6789 qla25xx_init_queues(struct qla_hw_data *ha) 6790 { 6791 struct rsp_que *rsp = NULL; 6792 struct req_que *req = NULL; 6793 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6794 int ret = -1; 6795 int i; 6796 6797 for (i = 1; i < ha->max_rsp_queues; i++) { 6798 rsp = ha->rsp_q_map[i]; 6799 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6800 rsp->options &= ~BIT_0; 6801 ret = qla25xx_init_rsp_que(base_vha, rsp); 6802 if (ret != QLA_SUCCESS) 6803 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6804 "%s Rsp que: %d init failed.\n", 6805 __func__, rsp->id); 6806 else 6807 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6808 "%s Rsp que: %d inited.\n", 6809 __func__, rsp->id); 6810 } 6811 } 6812 for (i = 1; i < ha->max_req_queues; i++) { 6813 req = ha->req_q_map[i]; 6814 if (req && test_bit(i, ha->req_qid_map)) { 6815 /* Clear outstanding commands array. */ 6816 req->options &= ~BIT_0; 6817 ret = qla25xx_init_req_que(base_vha, req); 6818 if (ret != QLA_SUCCESS) 6819 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6820 "%s Req que: %d init failed.\n", 6821 __func__, req->id); 6822 else 6823 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6824 "%s Req que: %d inited.\n", 6825 __func__, req->id); 6826 } 6827 } 6828 return ret; 6829 } 6830 6831 /* 6832 * qla2x00_reset_adapter 6833 * Reset adapter. 6834 * 6835 * Input: 6836 * ha = adapter block pointer. 6837 */ 6838 void 6839 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6840 { 6841 unsigned long flags = 0; 6842 struct qla_hw_data *ha = vha->hw; 6843 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6844 6845 vha->flags.online = 0; 6846 ha->isp_ops->disable_intrs(ha); 6847 6848 spin_lock_irqsave(&ha->hardware_lock, flags); 6849 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6850 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6851 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6852 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6853 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6854 } 6855 6856 void 6857 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6858 { 6859 unsigned long flags = 0; 6860 struct qla_hw_data *ha = vha->hw; 6861 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6862 6863 if (IS_P3P_TYPE(ha)) 6864 return; 6865 6866 vha->flags.online = 0; 6867 ha->isp_ops->disable_intrs(ha); 6868 6869 spin_lock_irqsave(&ha->hardware_lock, flags); 6870 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6871 RD_REG_DWORD(®->hccr); 6872 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6873 RD_REG_DWORD(®->hccr); 6874 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6875 6876 if (IS_NOPOLLING_TYPE(ha)) 6877 ha->isp_ops->enable_intrs(ha); 6878 } 6879 6880 /* On sparc systems, obtain port and node WWN from firmware 6881 * properties. 6882 */ 6883 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6884 struct nvram_24xx *nv) 6885 { 6886 #ifdef CONFIG_SPARC 6887 struct qla_hw_data *ha = vha->hw; 6888 struct pci_dev *pdev = ha->pdev; 6889 struct device_node *dp = pci_device_to_OF_node(pdev); 6890 const u8 *val; 6891 int len; 6892 6893 val = of_get_property(dp, "port-wwn", &len); 6894 if (val && len >= WWN_SIZE) 6895 memcpy(nv->port_name, val, WWN_SIZE); 6896 6897 val = of_get_property(dp, "node-wwn", &len); 6898 if (val && len >= WWN_SIZE) 6899 memcpy(nv->node_name, val, WWN_SIZE); 6900 #endif 6901 } 6902 6903 int 6904 qla24xx_nvram_config(scsi_qla_host_t *vha) 6905 { 6906 int rval; 6907 struct init_cb_24xx *icb; 6908 struct nvram_24xx *nv; 6909 uint32_t *dptr; 6910 uint8_t *dptr1, *dptr2; 6911 uint32_t chksum; 6912 uint16_t cnt; 6913 struct qla_hw_data *ha = vha->hw; 6914 6915 rval = QLA_SUCCESS; 6916 icb = (struct init_cb_24xx *)ha->init_cb; 6917 nv = ha->nvram; 6918 6919 /* Determine NVRAM starting address. */ 6920 if (ha->port_no == 0) { 6921 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 6922 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 6923 } else { 6924 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 6925 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 6926 } 6927 6928 ha->nvram_size = sizeof(struct nvram_24xx); 6929 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6930 6931 /* Get VPD data into cache */ 6932 ha->vpd = ha->nvram + VPD_OFFSET; 6933 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 6934 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 6935 6936 /* Get NVRAM data into cache and calculate checksum. */ 6937 dptr = (uint32_t *)nv; 6938 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 6939 ha->nvram_size); 6940 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6941 chksum += le32_to_cpu(*dptr); 6942 6943 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 6944 "Contents of NVRAM\n"); 6945 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 6946 (uint8_t *)nv, ha->nvram_size); 6947 6948 /* Bad NVRAM data, set defaults parameters. */ 6949 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6950 || nv->id[3] != ' ' || 6951 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6952 /* Reset NVRAM data. */ 6953 ql_log(ql_log_warn, vha, 0x006b, 6954 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6955 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 6956 ql_log(ql_log_warn, vha, 0x006c, 6957 "Falling back to functioning (yet invalid -- WWPN) " 6958 "defaults.\n"); 6959 6960 /* 6961 * Set default initialization control block. 6962 */ 6963 memset(nv, 0, ha->nvram_size); 6964 nv->nvram_version = cpu_to_le16(ICB_VERSION); 6965 nv->version = cpu_to_le16(ICB_VERSION); 6966 nv->frame_payload_size = 2048; 6967 nv->execution_throttle = cpu_to_le16(0xFFFF); 6968 nv->exchange_count = cpu_to_le16(0); 6969 nv->hard_address = cpu_to_le16(124); 6970 nv->port_name[0] = 0x21; 6971 nv->port_name[1] = 0x00 + ha->port_no + 1; 6972 nv->port_name[2] = 0x00; 6973 nv->port_name[3] = 0xe0; 6974 nv->port_name[4] = 0x8b; 6975 nv->port_name[5] = 0x1c; 6976 nv->port_name[6] = 0x55; 6977 nv->port_name[7] = 0x86; 6978 nv->node_name[0] = 0x20; 6979 nv->node_name[1] = 0x00; 6980 nv->node_name[2] = 0x00; 6981 nv->node_name[3] = 0xe0; 6982 nv->node_name[4] = 0x8b; 6983 nv->node_name[5] = 0x1c; 6984 nv->node_name[6] = 0x55; 6985 nv->node_name[7] = 0x86; 6986 qla24xx_nvram_wwn_from_ofw(vha, nv); 6987 nv->login_retry_count = cpu_to_le16(8); 6988 nv->interrupt_delay_timer = cpu_to_le16(0); 6989 nv->login_timeout = cpu_to_le16(0); 6990 nv->firmware_options_1 = 6991 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6992 nv->firmware_options_2 = cpu_to_le32(2 << 4); 6993 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 6994 nv->firmware_options_3 = cpu_to_le32(2 << 13); 6995 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 6996 nv->efi_parameters = cpu_to_le32(0); 6997 nv->reset_delay = 5; 6998 nv->max_luns_per_target = cpu_to_le16(128); 6999 nv->port_down_retry_count = cpu_to_le16(30); 7000 nv->link_down_timeout = cpu_to_le16(30); 7001 7002 rval = 1; 7003 } 7004 7005 if (qla_tgt_mode_enabled(vha)) { 7006 /* Don't enable full login after initial LIP */ 7007 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7008 /* Don't enable LIP full login for initiator */ 7009 nv->host_p &= cpu_to_le32(~BIT_10); 7010 } 7011 7012 qlt_24xx_config_nvram_stage1(vha, nv); 7013 7014 /* Reset Initialization control block */ 7015 memset(icb, 0, ha->init_cb_size); 7016 7017 /* Copy 1st segment. */ 7018 dptr1 = (uint8_t *)icb; 7019 dptr2 = (uint8_t *)&nv->version; 7020 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7021 while (cnt--) 7022 *dptr1++ = *dptr2++; 7023 7024 icb->login_retry_count = nv->login_retry_count; 7025 icb->link_down_on_nos = nv->link_down_on_nos; 7026 7027 /* Copy 2nd segment. */ 7028 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7029 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7030 cnt = (uint8_t *)&icb->reserved_3 - 7031 (uint8_t *)&icb->interrupt_delay_timer; 7032 while (cnt--) 7033 *dptr1++ = *dptr2++; 7034 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7035 /* 7036 * Setup driver NVRAM options. 7037 */ 7038 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7039 "QLA2462"); 7040 7041 qlt_24xx_config_nvram_stage2(vha, icb); 7042 7043 if (nv->host_p & cpu_to_le32(BIT_15)) { 7044 /* Use alternate WWN? */ 7045 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7046 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7047 } 7048 7049 /* Prepare nodename */ 7050 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7051 /* 7052 * Firmware will apply the following mask if the nodename was 7053 * not provided. 7054 */ 7055 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7056 icb->node_name[0] &= 0xF0; 7057 } 7058 7059 /* Set host adapter parameters. */ 7060 ha->flags.disable_risc_code_load = 0; 7061 ha->flags.enable_lip_reset = 0; 7062 ha->flags.enable_lip_full_login = 7063 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7064 ha->flags.enable_target_reset = 7065 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7066 ha->flags.enable_led_scheme = 0; 7067 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7068 7069 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7070 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7071 7072 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7073 sizeof(ha->fw_seriallink_options24)); 7074 7075 /* save HBA serial number */ 7076 ha->serial0 = icb->port_name[5]; 7077 ha->serial1 = icb->port_name[6]; 7078 ha->serial2 = icb->port_name[7]; 7079 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7080 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7081 7082 icb->execution_throttle = cpu_to_le16(0xFFFF); 7083 7084 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7085 7086 /* Set minimum login_timeout to 4 seconds. */ 7087 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7088 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7089 if (le16_to_cpu(nv->login_timeout) < 4) 7090 nv->login_timeout = cpu_to_le16(4); 7091 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7092 7093 /* Set minimum RATOV to 100 tenths of a second. */ 7094 ha->r_a_tov = 100; 7095 7096 ha->loop_reset_delay = nv->reset_delay; 7097 7098 /* Link Down Timeout = 0: 7099 * 7100 * When Port Down timer expires we will start returning 7101 * I/O's to OS with "DID_NO_CONNECT". 7102 * 7103 * Link Down Timeout != 0: 7104 * 7105 * The driver waits for the link to come up after link down 7106 * before returning I/Os to OS with "DID_NO_CONNECT". 7107 */ 7108 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7109 ha->loop_down_abort_time = 7110 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7111 } else { 7112 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7113 ha->loop_down_abort_time = 7114 (LOOP_DOWN_TIME - ha->link_down_timeout); 7115 } 7116 7117 /* Need enough time to try and get the port back. */ 7118 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7119 if (qlport_down_retry) 7120 ha->port_down_retry_count = qlport_down_retry; 7121 7122 /* Set login_retry_count */ 7123 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7124 if (ha->port_down_retry_count == 7125 le16_to_cpu(nv->port_down_retry_count) && 7126 ha->port_down_retry_count > 3) 7127 ha->login_retry_count = ha->port_down_retry_count; 7128 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7129 ha->login_retry_count = ha->port_down_retry_count; 7130 if (ql2xloginretrycount) 7131 ha->login_retry_count = ql2xloginretrycount; 7132 7133 /* N2N: driver will initiate Login instead of FW */ 7134 icb->firmware_options_3 |= BIT_8; 7135 7136 /* Enable ZIO. */ 7137 if (!vha->flags.init_done) { 7138 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7139 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7140 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7141 le16_to_cpu(icb->interrupt_delay_timer): 2; 7142 } 7143 icb->firmware_options_2 &= cpu_to_le32( 7144 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7145 vha->flags.process_response_queue = 0; 7146 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7147 ha->zio_mode = QLA_ZIO_MODE_6; 7148 7149 ql_log(ql_log_info, vha, 0x006f, 7150 "ZIO mode %d enabled; timer delay (%d us).\n", 7151 ha->zio_mode, ha->zio_timer * 100); 7152 7153 icb->firmware_options_2 |= cpu_to_le32( 7154 (uint32_t)ha->zio_mode); 7155 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7156 vha->flags.process_response_queue = 1; 7157 } 7158 7159 if (rval) { 7160 ql_log(ql_log_warn, vha, 0x0070, 7161 "NVRAM configuration failed.\n"); 7162 } 7163 return (rval); 7164 } 7165 7166 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 7167 { 7168 struct qla27xx_image_status pri_image_status, sec_image_status; 7169 uint8_t valid_pri_image, valid_sec_image; 7170 uint32_t *wptr; 7171 uint32_t cnt, chksum, size; 7172 struct qla_hw_data *ha = vha->hw; 7173 7174 valid_pri_image = valid_sec_image = 1; 7175 ha->active_image = 0; 7176 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 7177 7178 if (!ha->flt_region_img_status_pri) { 7179 valid_pri_image = 0; 7180 goto check_sec_image; 7181 } 7182 7183 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 7184 ha->flt_region_img_status_pri, size); 7185 7186 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7187 ql_dbg(ql_dbg_init, vha, 0x018b, 7188 "Primary image signature (0x%x) not valid\n", 7189 pri_image_status.signature); 7190 valid_pri_image = 0; 7191 goto check_sec_image; 7192 } 7193 7194 wptr = (uint32_t *)(&pri_image_status); 7195 cnt = size; 7196 7197 for (chksum = 0; cnt--; wptr++) 7198 chksum += le32_to_cpu(*wptr); 7199 7200 if (chksum) { 7201 ql_dbg(ql_dbg_init, vha, 0x018c, 7202 "Checksum validation failed for primary image (0x%x)\n", 7203 chksum); 7204 valid_pri_image = 0; 7205 } 7206 7207 check_sec_image: 7208 if (!ha->flt_region_img_status_sec) { 7209 valid_sec_image = 0; 7210 goto check_valid_image; 7211 } 7212 7213 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7214 ha->flt_region_img_status_sec, size); 7215 7216 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7217 ql_dbg(ql_dbg_init, vha, 0x018d, 7218 "Secondary image signature(0x%x) not valid\n", 7219 sec_image_status.signature); 7220 valid_sec_image = 0; 7221 goto check_valid_image; 7222 } 7223 7224 wptr = (uint32_t *)(&sec_image_status); 7225 cnt = size; 7226 for (chksum = 0; cnt--; wptr++) 7227 chksum += le32_to_cpu(*wptr); 7228 if (chksum) { 7229 ql_dbg(ql_dbg_init, vha, 0x018e, 7230 "Checksum validation failed for secondary image (0x%x)\n", 7231 chksum); 7232 valid_sec_image = 0; 7233 } 7234 7235 check_valid_image: 7236 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7237 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7238 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7239 if (!ha->active_image || 7240 pri_image_status.generation_number < 7241 sec_image_status.generation_number) 7242 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7243 } 7244 7245 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n", 7246 ha->active_image == 0 ? "default bootld and fw" : 7247 ha->active_image == 1 ? "primary" : 7248 ha->active_image == 2 ? "secondary" : 7249 "Invalid"); 7250 7251 return ha->active_image; 7252 } 7253 7254 static int 7255 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7256 uint32_t faddr) 7257 { 7258 int rval = QLA_SUCCESS; 7259 int segments, fragment; 7260 uint32_t *dcode, dlen; 7261 uint32_t risc_addr; 7262 uint32_t risc_size; 7263 uint32_t i; 7264 struct qla_hw_data *ha = vha->hw; 7265 struct req_que *req = ha->req_q_map[0]; 7266 7267 ql_dbg(ql_dbg_init, vha, 0x008b, 7268 "FW: Loading firmware from flash (%x).\n", faddr); 7269 7270 rval = QLA_SUCCESS; 7271 7272 segments = FA_RISC_CODE_SEGMENTS; 7273 dcode = (uint32_t *)req->ring; 7274 *srisc_addr = 0; 7275 7276 if (IS_QLA27XX(ha) && 7277 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7278 faddr = ha->flt_region_fw_sec; 7279 7280 /* Validate firmware image by checking version. */ 7281 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7282 for (i = 0; i < 4; i++) 7283 dcode[i] = be32_to_cpu(dcode[i]); 7284 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7285 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7286 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7287 dcode[3] == 0)) { 7288 ql_log(ql_log_fatal, vha, 0x008c, 7289 "Unable to verify the integrity of flash firmware " 7290 "image.\n"); 7291 ql_log(ql_log_fatal, vha, 0x008d, 7292 "Firmware data: %08x %08x %08x %08x.\n", 7293 dcode[0], dcode[1], dcode[2], dcode[3]); 7294 7295 return QLA_FUNCTION_FAILED; 7296 } 7297 7298 while (segments && rval == QLA_SUCCESS) { 7299 /* Read segment's load information. */ 7300 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7301 7302 risc_addr = be32_to_cpu(dcode[2]); 7303 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7304 risc_size = be32_to_cpu(dcode[3]); 7305 7306 fragment = 0; 7307 while (risc_size > 0 && rval == QLA_SUCCESS) { 7308 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7309 if (dlen > risc_size) 7310 dlen = risc_size; 7311 7312 ql_dbg(ql_dbg_init, vha, 0x008e, 7313 "Loading risc segment@ risc addr %x " 7314 "number of dwords 0x%x offset 0x%x.\n", 7315 risc_addr, dlen, faddr); 7316 7317 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7318 for (i = 0; i < dlen; i++) 7319 dcode[i] = swab32(dcode[i]); 7320 7321 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7322 dlen); 7323 if (rval) { 7324 ql_log(ql_log_fatal, vha, 0x008f, 7325 "Failed to load segment %d of firmware.\n", 7326 fragment); 7327 return QLA_FUNCTION_FAILED; 7328 } 7329 7330 faddr += dlen; 7331 risc_addr += dlen; 7332 risc_size -= dlen; 7333 fragment++; 7334 } 7335 7336 /* Next segment. */ 7337 segments--; 7338 } 7339 7340 if (!IS_QLA27XX(ha)) 7341 return rval; 7342 7343 if (ha->fw_dump_template) 7344 vfree(ha->fw_dump_template); 7345 ha->fw_dump_template = NULL; 7346 ha->fw_dump_template_len = 0; 7347 7348 ql_dbg(ql_dbg_init, vha, 0x0161, 7349 "Loading fwdump template from %x\n", faddr); 7350 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7351 risc_size = be32_to_cpu(dcode[2]); 7352 ql_dbg(ql_dbg_init, vha, 0x0162, 7353 "-> array size %x dwords\n", risc_size); 7354 if (risc_size == 0 || risc_size == ~0) 7355 goto default_template; 7356 7357 dlen = (risc_size - 8) * sizeof(*dcode); 7358 ql_dbg(ql_dbg_init, vha, 0x0163, 7359 "-> template allocating %x bytes...\n", dlen); 7360 ha->fw_dump_template = vmalloc(dlen); 7361 if (!ha->fw_dump_template) { 7362 ql_log(ql_log_warn, vha, 0x0164, 7363 "Failed fwdump template allocate %x bytes.\n", risc_size); 7364 goto default_template; 7365 } 7366 7367 faddr += 7; 7368 risc_size -= 8; 7369 dcode = ha->fw_dump_template; 7370 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7371 for (i = 0; i < risc_size; i++) 7372 dcode[i] = le32_to_cpu(dcode[i]); 7373 7374 if (!qla27xx_fwdt_template_valid(dcode)) { 7375 ql_log(ql_log_warn, vha, 0x0165, 7376 "Failed fwdump template validate\n"); 7377 goto default_template; 7378 } 7379 7380 dlen = qla27xx_fwdt_template_size(dcode); 7381 ql_dbg(ql_dbg_init, vha, 0x0166, 7382 "-> template size %x bytes\n", dlen); 7383 if (dlen > risc_size * sizeof(*dcode)) { 7384 ql_log(ql_log_warn, vha, 0x0167, 7385 "Failed fwdump template exceeds array by %zx bytes\n", 7386 (size_t)(dlen - risc_size * sizeof(*dcode))); 7387 goto default_template; 7388 } 7389 ha->fw_dump_template_len = dlen; 7390 return rval; 7391 7392 default_template: 7393 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7394 if (ha->fw_dump_template) 7395 vfree(ha->fw_dump_template); 7396 ha->fw_dump_template = NULL; 7397 ha->fw_dump_template_len = 0; 7398 7399 dlen = qla27xx_fwdt_template_default_size(); 7400 ql_dbg(ql_dbg_init, vha, 0x0169, 7401 "-> template allocating %x bytes...\n", dlen); 7402 ha->fw_dump_template = vmalloc(dlen); 7403 if (!ha->fw_dump_template) { 7404 ql_log(ql_log_warn, vha, 0x016a, 7405 "Failed fwdump template allocate %x bytes.\n", risc_size); 7406 goto failed_template; 7407 } 7408 7409 dcode = ha->fw_dump_template; 7410 risc_size = dlen / sizeof(*dcode); 7411 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7412 for (i = 0; i < risc_size; i++) 7413 dcode[i] = be32_to_cpu(dcode[i]); 7414 7415 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7416 ql_log(ql_log_warn, vha, 0x016b, 7417 "Failed fwdump template validate\n"); 7418 goto failed_template; 7419 } 7420 7421 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7422 ql_dbg(ql_dbg_init, vha, 0x016c, 7423 "-> template size %x bytes\n", dlen); 7424 ha->fw_dump_template_len = dlen; 7425 return rval; 7426 7427 failed_template: 7428 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7429 if (ha->fw_dump_template) 7430 vfree(ha->fw_dump_template); 7431 ha->fw_dump_template = NULL; 7432 ha->fw_dump_template_len = 0; 7433 return rval; 7434 } 7435 7436 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7437 7438 int 7439 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7440 { 7441 int rval; 7442 int i, fragment; 7443 uint16_t *wcode, *fwcode; 7444 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7445 struct fw_blob *blob; 7446 struct qla_hw_data *ha = vha->hw; 7447 struct req_que *req = ha->req_q_map[0]; 7448 7449 /* Load firmware blob. */ 7450 blob = qla2x00_request_firmware(vha); 7451 if (!blob) { 7452 ql_log(ql_log_info, vha, 0x0083, 7453 "Firmware image unavailable.\n"); 7454 ql_log(ql_log_info, vha, 0x0084, 7455 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7456 return QLA_FUNCTION_FAILED; 7457 } 7458 7459 rval = QLA_SUCCESS; 7460 7461 wcode = (uint16_t *)req->ring; 7462 *srisc_addr = 0; 7463 fwcode = (uint16_t *)blob->fw->data; 7464 fwclen = 0; 7465 7466 /* Validate firmware image by checking version. */ 7467 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7468 ql_log(ql_log_fatal, vha, 0x0085, 7469 "Unable to verify integrity of firmware image (%zd).\n", 7470 blob->fw->size); 7471 goto fail_fw_integrity; 7472 } 7473 for (i = 0; i < 4; i++) 7474 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7475 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7476 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7477 wcode[2] == 0 && wcode[3] == 0)) { 7478 ql_log(ql_log_fatal, vha, 0x0086, 7479 "Unable to verify integrity of firmware image.\n"); 7480 ql_log(ql_log_fatal, vha, 0x0087, 7481 "Firmware data: %04x %04x %04x %04x.\n", 7482 wcode[0], wcode[1], wcode[2], wcode[3]); 7483 goto fail_fw_integrity; 7484 } 7485 7486 seg = blob->segs; 7487 while (*seg && rval == QLA_SUCCESS) { 7488 risc_addr = *seg; 7489 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7490 risc_size = be16_to_cpu(fwcode[3]); 7491 7492 /* Validate firmware image size. */ 7493 fwclen += risc_size * sizeof(uint16_t); 7494 if (blob->fw->size < fwclen) { 7495 ql_log(ql_log_fatal, vha, 0x0088, 7496 "Unable to verify integrity of firmware image " 7497 "(%zd).\n", blob->fw->size); 7498 goto fail_fw_integrity; 7499 } 7500 7501 fragment = 0; 7502 while (risc_size > 0 && rval == QLA_SUCCESS) { 7503 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7504 if (wlen > risc_size) 7505 wlen = risc_size; 7506 ql_dbg(ql_dbg_init, vha, 0x0089, 7507 "Loading risc segment@ risc addr %x number of " 7508 "words 0x%x.\n", risc_addr, wlen); 7509 7510 for (i = 0; i < wlen; i++) 7511 wcode[i] = swab16(fwcode[i]); 7512 7513 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7514 wlen); 7515 if (rval) { 7516 ql_log(ql_log_fatal, vha, 0x008a, 7517 "Failed to load segment %d of firmware.\n", 7518 fragment); 7519 break; 7520 } 7521 7522 fwcode += wlen; 7523 risc_addr += wlen; 7524 risc_size -= wlen; 7525 fragment++; 7526 } 7527 7528 /* Next segment. */ 7529 seg++; 7530 } 7531 return rval; 7532 7533 fail_fw_integrity: 7534 return QLA_FUNCTION_FAILED; 7535 } 7536 7537 static int 7538 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7539 { 7540 int rval; 7541 int segments, fragment; 7542 uint32_t *dcode, dlen; 7543 uint32_t risc_addr; 7544 uint32_t risc_size; 7545 uint32_t i; 7546 struct fw_blob *blob; 7547 const uint32_t *fwcode; 7548 uint32_t fwclen; 7549 struct qla_hw_data *ha = vha->hw; 7550 struct req_que *req = ha->req_q_map[0]; 7551 7552 /* Load firmware blob. */ 7553 blob = qla2x00_request_firmware(vha); 7554 if (!blob) { 7555 ql_log(ql_log_warn, vha, 0x0090, 7556 "Firmware image unavailable.\n"); 7557 ql_log(ql_log_warn, vha, 0x0091, 7558 "Firmware images can be retrieved from: " 7559 QLA_FW_URL ".\n"); 7560 7561 return QLA_FUNCTION_FAILED; 7562 } 7563 7564 ql_dbg(ql_dbg_init, vha, 0x0092, 7565 "FW: Loading via request-firmware.\n"); 7566 7567 rval = QLA_SUCCESS; 7568 7569 segments = FA_RISC_CODE_SEGMENTS; 7570 dcode = (uint32_t *)req->ring; 7571 *srisc_addr = 0; 7572 fwcode = (uint32_t *)blob->fw->data; 7573 fwclen = 0; 7574 7575 /* Validate firmware image by checking version. */ 7576 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7577 ql_log(ql_log_fatal, vha, 0x0093, 7578 "Unable to verify integrity of firmware image (%zd).\n", 7579 blob->fw->size); 7580 return QLA_FUNCTION_FAILED; 7581 } 7582 for (i = 0; i < 4; i++) 7583 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7584 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7585 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7586 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7587 dcode[3] == 0)) { 7588 ql_log(ql_log_fatal, vha, 0x0094, 7589 "Unable to verify integrity of firmware image (%zd).\n", 7590 blob->fw->size); 7591 ql_log(ql_log_fatal, vha, 0x0095, 7592 "Firmware data: %08x %08x %08x %08x.\n", 7593 dcode[0], dcode[1], dcode[2], dcode[3]); 7594 return QLA_FUNCTION_FAILED; 7595 } 7596 7597 while (segments && rval == QLA_SUCCESS) { 7598 risc_addr = be32_to_cpu(fwcode[2]); 7599 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7600 risc_size = be32_to_cpu(fwcode[3]); 7601 7602 /* Validate firmware image size. */ 7603 fwclen += risc_size * sizeof(uint32_t); 7604 if (blob->fw->size < fwclen) { 7605 ql_log(ql_log_fatal, vha, 0x0096, 7606 "Unable to verify integrity of firmware image " 7607 "(%zd).\n", blob->fw->size); 7608 return QLA_FUNCTION_FAILED; 7609 } 7610 7611 fragment = 0; 7612 while (risc_size > 0 && rval == QLA_SUCCESS) { 7613 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7614 if (dlen > risc_size) 7615 dlen = risc_size; 7616 7617 ql_dbg(ql_dbg_init, vha, 0x0097, 7618 "Loading risc segment@ risc addr %x " 7619 "number of dwords 0x%x.\n", risc_addr, dlen); 7620 7621 for (i = 0; i < dlen; i++) 7622 dcode[i] = swab32(fwcode[i]); 7623 7624 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7625 dlen); 7626 if (rval) { 7627 ql_log(ql_log_fatal, vha, 0x0098, 7628 "Failed to load segment %d of firmware.\n", 7629 fragment); 7630 return QLA_FUNCTION_FAILED; 7631 } 7632 7633 fwcode += dlen; 7634 risc_addr += dlen; 7635 risc_size -= dlen; 7636 fragment++; 7637 } 7638 7639 /* Next segment. */ 7640 segments--; 7641 } 7642 7643 if (!IS_QLA27XX(ha)) 7644 return rval; 7645 7646 if (ha->fw_dump_template) 7647 vfree(ha->fw_dump_template); 7648 ha->fw_dump_template = NULL; 7649 ha->fw_dump_template_len = 0; 7650 7651 ql_dbg(ql_dbg_init, vha, 0x171, 7652 "Loading fwdump template from %x\n", 7653 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7654 risc_size = be32_to_cpu(fwcode[2]); 7655 ql_dbg(ql_dbg_init, vha, 0x172, 7656 "-> array size %x dwords\n", risc_size); 7657 if (risc_size == 0 || risc_size == ~0) 7658 goto default_template; 7659 7660 dlen = (risc_size - 8) * sizeof(*fwcode); 7661 ql_dbg(ql_dbg_init, vha, 0x0173, 7662 "-> template allocating %x bytes...\n", dlen); 7663 ha->fw_dump_template = vmalloc(dlen); 7664 if (!ha->fw_dump_template) { 7665 ql_log(ql_log_warn, vha, 0x0174, 7666 "Failed fwdump template allocate %x bytes.\n", risc_size); 7667 goto default_template; 7668 } 7669 7670 fwcode += 7; 7671 risc_size -= 8; 7672 dcode = ha->fw_dump_template; 7673 for (i = 0; i < risc_size; i++) 7674 dcode[i] = le32_to_cpu(fwcode[i]); 7675 7676 if (!qla27xx_fwdt_template_valid(dcode)) { 7677 ql_log(ql_log_warn, vha, 0x0175, 7678 "Failed fwdump template validate\n"); 7679 goto default_template; 7680 } 7681 7682 dlen = qla27xx_fwdt_template_size(dcode); 7683 ql_dbg(ql_dbg_init, vha, 0x0176, 7684 "-> template size %x bytes\n", dlen); 7685 if (dlen > risc_size * sizeof(*fwcode)) { 7686 ql_log(ql_log_warn, vha, 0x0177, 7687 "Failed fwdump template exceeds array by %zx bytes\n", 7688 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7689 goto default_template; 7690 } 7691 ha->fw_dump_template_len = dlen; 7692 return rval; 7693 7694 default_template: 7695 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7696 if (ha->fw_dump_template) 7697 vfree(ha->fw_dump_template); 7698 ha->fw_dump_template = NULL; 7699 ha->fw_dump_template_len = 0; 7700 7701 dlen = qla27xx_fwdt_template_default_size(); 7702 ql_dbg(ql_dbg_init, vha, 0x0179, 7703 "-> template allocating %x bytes...\n", dlen); 7704 ha->fw_dump_template = vmalloc(dlen); 7705 if (!ha->fw_dump_template) { 7706 ql_log(ql_log_warn, vha, 0x017a, 7707 "Failed fwdump template allocate %x bytes.\n", risc_size); 7708 goto failed_template; 7709 } 7710 7711 dcode = ha->fw_dump_template; 7712 risc_size = dlen / sizeof(*fwcode); 7713 fwcode = qla27xx_fwdt_template_default(); 7714 for (i = 0; i < risc_size; i++) 7715 dcode[i] = be32_to_cpu(fwcode[i]); 7716 7717 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7718 ql_log(ql_log_warn, vha, 0x017b, 7719 "Failed fwdump template validate\n"); 7720 goto failed_template; 7721 } 7722 7723 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7724 ql_dbg(ql_dbg_init, vha, 0x017c, 7725 "-> template size %x bytes\n", dlen); 7726 ha->fw_dump_template_len = dlen; 7727 return rval; 7728 7729 failed_template: 7730 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7731 if (ha->fw_dump_template) 7732 vfree(ha->fw_dump_template); 7733 ha->fw_dump_template = NULL; 7734 ha->fw_dump_template_len = 0; 7735 return rval; 7736 } 7737 7738 int 7739 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7740 { 7741 int rval; 7742 7743 if (ql2xfwloadbin == 1) 7744 return qla81xx_load_risc(vha, srisc_addr); 7745 7746 /* 7747 * FW Load priority: 7748 * 1) Firmware via request-firmware interface (.bin file). 7749 * 2) Firmware residing in flash. 7750 */ 7751 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7752 if (rval == QLA_SUCCESS) 7753 return rval; 7754 7755 return qla24xx_load_risc_flash(vha, srisc_addr, 7756 vha->hw->flt_region_fw); 7757 } 7758 7759 int 7760 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7761 { 7762 int rval; 7763 struct qla_hw_data *ha = vha->hw; 7764 7765 if (ql2xfwloadbin == 2) 7766 goto try_blob_fw; 7767 7768 /* 7769 * FW Load priority: 7770 * 1) Firmware residing in flash. 7771 * 2) Firmware via request-firmware interface (.bin file). 7772 * 3) Golden-Firmware residing in flash -- limited operation. 7773 */ 7774 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7775 if (rval == QLA_SUCCESS) 7776 return rval; 7777 7778 try_blob_fw: 7779 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7780 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7781 return rval; 7782 7783 ql_log(ql_log_info, vha, 0x0099, 7784 "Attempting to fallback to golden firmware.\n"); 7785 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7786 if (rval != QLA_SUCCESS) 7787 return rval; 7788 7789 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7790 ha->flags.running_gold_fw = 1; 7791 return rval; 7792 } 7793 7794 void 7795 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7796 { 7797 int ret, retries; 7798 struct qla_hw_data *ha = vha->hw; 7799 7800 if (ha->flags.pci_channel_io_perm_failure) 7801 return; 7802 if (!IS_FWI2_CAPABLE(ha)) 7803 return; 7804 if (!ha->fw_major_version) 7805 return; 7806 if (!ha->flags.fw_started) 7807 return; 7808 7809 ret = qla2x00_stop_firmware(vha); 7810 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7811 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7812 ha->isp_ops->reset_chip(vha); 7813 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7814 continue; 7815 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7816 continue; 7817 ql_log(ql_log_info, vha, 0x8015, 7818 "Attempting retry of stop-firmware command.\n"); 7819 ret = qla2x00_stop_firmware(vha); 7820 } 7821 7822 QLA_FW_STOPPED(ha); 7823 ha->flags.fw_init_done = 0; 7824 } 7825 7826 int 7827 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7828 { 7829 int rval = QLA_SUCCESS; 7830 int rval2; 7831 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7832 struct qla_hw_data *ha = vha->hw; 7833 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7834 struct req_que *req; 7835 struct rsp_que *rsp; 7836 7837 if (!vha->vp_idx) 7838 return -EINVAL; 7839 7840 rval = qla2x00_fw_ready(base_vha); 7841 if (vha->qpair) 7842 req = vha->qpair->req; 7843 else 7844 req = ha->req_q_map[0]; 7845 rsp = req->rsp; 7846 7847 if (rval == QLA_SUCCESS) { 7848 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7849 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7850 } 7851 7852 vha->flags.management_server_logged_in = 0; 7853 7854 /* Login to SNS first */ 7855 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7856 BIT_1); 7857 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7858 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7859 ql_dbg(ql_dbg_init, vha, 0x0120, 7860 "Failed SNS login: loop_id=%x, rval2=%d\n", 7861 NPH_SNS, rval2); 7862 else 7863 ql_dbg(ql_dbg_init, vha, 0x0103, 7864 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7865 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7866 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7867 return (QLA_FUNCTION_FAILED); 7868 } 7869 7870 atomic_set(&vha->loop_down_timer, 0); 7871 atomic_set(&vha->loop_state, LOOP_UP); 7872 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7873 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7874 rval = qla2x00_loop_resync(base_vha); 7875 7876 return rval; 7877 } 7878 7879 /* 84XX Support **************************************************************/ 7880 7881 static LIST_HEAD(qla_cs84xx_list); 7882 static DEFINE_MUTEX(qla_cs84xx_mutex); 7883 7884 static struct qla_chip_state_84xx * 7885 qla84xx_get_chip(struct scsi_qla_host *vha) 7886 { 7887 struct qla_chip_state_84xx *cs84xx; 7888 struct qla_hw_data *ha = vha->hw; 7889 7890 mutex_lock(&qla_cs84xx_mutex); 7891 7892 /* Find any shared 84xx chip. */ 7893 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7894 if (cs84xx->bus == ha->pdev->bus) { 7895 kref_get(&cs84xx->kref); 7896 goto done; 7897 } 7898 } 7899 7900 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 7901 if (!cs84xx) 7902 goto done; 7903 7904 kref_init(&cs84xx->kref); 7905 spin_lock_init(&cs84xx->access_lock); 7906 mutex_init(&cs84xx->fw_update_mutex); 7907 cs84xx->bus = ha->pdev->bus; 7908 7909 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 7910 done: 7911 mutex_unlock(&qla_cs84xx_mutex); 7912 return cs84xx; 7913 } 7914 7915 static void 7916 __qla84xx_chip_release(struct kref *kref) 7917 { 7918 struct qla_chip_state_84xx *cs84xx = 7919 container_of(kref, struct qla_chip_state_84xx, kref); 7920 7921 mutex_lock(&qla_cs84xx_mutex); 7922 list_del(&cs84xx->list); 7923 mutex_unlock(&qla_cs84xx_mutex); 7924 kfree(cs84xx); 7925 } 7926 7927 void 7928 qla84xx_put_chip(struct scsi_qla_host *vha) 7929 { 7930 struct qla_hw_data *ha = vha->hw; 7931 if (ha->cs84xx) 7932 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 7933 } 7934 7935 static int 7936 qla84xx_init_chip(scsi_qla_host_t *vha) 7937 { 7938 int rval; 7939 uint16_t status[2]; 7940 struct qla_hw_data *ha = vha->hw; 7941 7942 mutex_lock(&ha->cs84xx->fw_update_mutex); 7943 7944 rval = qla84xx_verify_chip(vha, status); 7945 7946 mutex_unlock(&ha->cs84xx->fw_update_mutex); 7947 7948 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 7949 QLA_SUCCESS; 7950 } 7951 7952 /* 81XX Support **************************************************************/ 7953 7954 int 7955 qla81xx_nvram_config(scsi_qla_host_t *vha) 7956 { 7957 int rval; 7958 struct init_cb_81xx *icb; 7959 struct nvram_81xx *nv; 7960 uint32_t *dptr; 7961 uint8_t *dptr1, *dptr2; 7962 uint32_t chksum; 7963 uint16_t cnt; 7964 struct qla_hw_data *ha = vha->hw; 7965 7966 rval = QLA_SUCCESS; 7967 icb = (struct init_cb_81xx *)ha->init_cb; 7968 nv = ha->nvram; 7969 7970 /* Determine NVRAM starting address. */ 7971 ha->nvram_size = sizeof(struct nvram_81xx); 7972 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7973 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 7974 ha->vpd_size = FA_VPD_SIZE_82XX; 7975 7976 /* Get VPD data into cache */ 7977 ha->vpd = ha->nvram + VPD_OFFSET; 7978 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 7979 ha->vpd_size); 7980 7981 /* Get NVRAM data into cache and calculate checksum. */ 7982 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 7983 ha->nvram_size); 7984 dptr = (uint32_t *)nv; 7985 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7986 chksum += le32_to_cpu(*dptr); 7987 7988 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 7989 "Contents of NVRAM:\n"); 7990 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 7991 (uint8_t *)nv, ha->nvram_size); 7992 7993 /* Bad NVRAM data, set defaults parameters. */ 7994 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7995 || nv->id[3] != ' ' || 7996 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7997 /* Reset NVRAM data. */ 7998 ql_log(ql_log_info, vha, 0x0073, 7999 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 8000 "version=0x%x.\n", chksum, nv->id[0], 8001 le16_to_cpu(nv->nvram_version)); 8002 ql_log(ql_log_info, vha, 0x0074, 8003 "Falling back to functioning (yet invalid -- WWPN) " 8004 "defaults.\n"); 8005 8006 /* 8007 * Set default initialization control block. 8008 */ 8009 memset(nv, 0, ha->nvram_size); 8010 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8011 nv->version = cpu_to_le16(ICB_VERSION); 8012 nv->frame_payload_size = 2048; 8013 nv->execution_throttle = cpu_to_le16(0xFFFF); 8014 nv->exchange_count = cpu_to_le16(0); 8015 nv->port_name[0] = 0x21; 8016 nv->port_name[1] = 0x00 + ha->port_no + 1; 8017 nv->port_name[2] = 0x00; 8018 nv->port_name[3] = 0xe0; 8019 nv->port_name[4] = 0x8b; 8020 nv->port_name[5] = 0x1c; 8021 nv->port_name[6] = 0x55; 8022 nv->port_name[7] = 0x86; 8023 nv->node_name[0] = 0x20; 8024 nv->node_name[1] = 0x00; 8025 nv->node_name[2] = 0x00; 8026 nv->node_name[3] = 0xe0; 8027 nv->node_name[4] = 0x8b; 8028 nv->node_name[5] = 0x1c; 8029 nv->node_name[6] = 0x55; 8030 nv->node_name[7] = 0x86; 8031 nv->login_retry_count = cpu_to_le16(8); 8032 nv->interrupt_delay_timer = cpu_to_le16(0); 8033 nv->login_timeout = cpu_to_le16(0); 8034 nv->firmware_options_1 = 8035 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8036 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8037 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8038 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8039 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8040 nv->efi_parameters = cpu_to_le32(0); 8041 nv->reset_delay = 5; 8042 nv->max_luns_per_target = cpu_to_le16(128); 8043 nv->port_down_retry_count = cpu_to_le16(30); 8044 nv->link_down_timeout = cpu_to_le16(180); 8045 nv->enode_mac[0] = 0x00; 8046 nv->enode_mac[1] = 0xC0; 8047 nv->enode_mac[2] = 0xDD; 8048 nv->enode_mac[3] = 0x04; 8049 nv->enode_mac[4] = 0x05; 8050 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8051 8052 rval = 1; 8053 } 8054 8055 if (IS_T10_PI_CAPABLE(ha)) 8056 nv->frame_payload_size &= ~7; 8057 8058 qlt_81xx_config_nvram_stage1(vha, nv); 8059 8060 /* Reset Initialization control block */ 8061 memset(icb, 0, ha->init_cb_size); 8062 8063 /* Copy 1st segment. */ 8064 dptr1 = (uint8_t *)icb; 8065 dptr2 = (uint8_t *)&nv->version; 8066 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8067 while (cnt--) 8068 *dptr1++ = *dptr2++; 8069 8070 icb->login_retry_count = nv->login_retry_count; 8071 8072 /* Copy 2nd segment. */ 8073 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8074 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8075 cnt = (uint8_t *)&icb->reserved_5 - 8076 (uint8_t *)&icb->interrupt_delay_timer; 8077 while (cnt--) 8078 *dptr1++ = *dptr2++; 8079 8080 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8081 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8082 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8083 icb->enode_mac[0] = 0x00; 8084 icb->enode_mac[1] = 0xC0; 8085 icb->enode_mac[2] = 0xDD; 8086 icb->enode_mac[3] = 0x04; 8087 icb->enode_mac[4] = 0x05; 8088 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8089 } 8090 8091 /* Use extended-initialization control block. */ 8092 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8093 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8094 /* 8095 * Setup driver NVRAM options. 8096 */ 8097 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8098 "QLE8XXX"); 8099 8100 qlt_81xx_config_nvram_stage2(vha, icb); 8101 8102 /* Use alternate WWN? */ 8103 if (nv->host_p & cpu_to_le32(BIT_15)) { 8104 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8105 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8106 } 8107 8108 /* Prepare nodename */ 8109 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8110 /* 8111 * Firmware will apply the following mask if the nodename was 8112 * not provided. 8113 */ 8114 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8115 icb->node_name[0] &= 0xF0; 8116 } 8117 8118 /* Set host adapter parameters. */ 8119 ha->flags.disable_risc_code_load = 0; 8120 ha->flags.enable_lip_reset = 0; 8121 ha->flags.enable_lip_full_login = 8122 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 8123 ha->flags.enable_target_reset = 8124 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 8125 ha->flags.enable_led_scheme = 0; 8126 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 8127 8128 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8129 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8130 8131 /* save HBA serial number */ 8132 ha->serial0 = icb->port_name[5]; 8133 ha->serial1 = icb->port_name[6]; 8134 ha->serial2 = icb->port_name[7]; 8135 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8136 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8137 8138 icb->execution_throttle = cpu_to_le16(0xFFFF); 8139 8140 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8141 8142 /* Set minimum login_timeout to 4 seconds. */ 8143 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8144 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8145 if (le16_to_cpu(nv->login_timeout) < 4) 8146 nv->login_timeout = cpu_to_le16(4); 8147 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8148 8149 /* Set minimum RATOV to 100 tenths of a second. */ 8150 ha->r_a_tov = 100; 8151 8152 ha->loop_reset_delay = nv->reset_delay; 8153 8154 /* Link Down Timeout = 0: 8155 * 8156 * When Port Down timer expires we will start returning 8157 * I/O's to OS with "DID_NO_CONNECT". 8158 * 8159 * Link Down Timeout != 0: 8160 * 8161 * The driver waits for the link to come up after link down 8162 * before returning I/Os to OS with "DID_NO_CONNECT". 8163 */ 8164 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8165 ha->loop_down_abort_time = 8166 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8167 } else { 8168 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8169 ha->loop_down_abort_time = 8170 (LOOP_DOWN_TIME - ha->link_down_timeout); 8171 } 8172 8173 /* Need enough time to try and get the port back. */ 8174 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8175 if (qlport_down_retry) 8176 ha->port_down_retry_count = qlport_down_retry; 8177 8178 /* Set login_retry_count */ 8179 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8180 if (ha->port_down_retry_count == 8181 le16_to_cpu(nv->port_down_retry_count) && 8182 ha->port_down_retry_count > 3) 8183 ha->login_retry_count = ha->port_down_retry_count; 8184 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8185 ha->login_retry_count = ha->port_down_retry_count; 8186 if (ql2xloginretrycount) 8187 ha->login_retry_count = ql2xloginretrycount; 8188 8189 /* if not running MSI-X we need handshaking on interrupts */ 8190 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8191 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8192 8193 /* Enable ZIO. */ 8194 if (!vha->flags.init_done) { 8195 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8196 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8197 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8198 le16_to_cpu(icb->interrupt_delay_timer): 2; 8199 } 8200 icb->firmware_options_2 &= cpu_to_le32( 8201 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8202 vha->flags.process_response_queue = 0; 8203 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8204 ha->zio_mode = QLA_ZIO_MODE_6; 8205 8206 ql_log(ql_log_info, vha, 0x0075, 8207 "ZIO mode %d enabled; timer delay (%d us).\n", 8208 ha->zio_mode, 8209 ha->zio_timer * 100); 8210 8211 icb->firmware_options_2 |= cpu_to_le32( 8212 (uint32_t)ha->zio_mode); 8213 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8214 vha->flags.process_response_queue = 1; 8215 } 8216 8217 /* enable RIDA Format2 */ 8218 icb->firmware_options_3 |= BIT_0; 8219 8220 /* N2N: driver will initiate Login instead of FW */ 8221 icb->firmware_options_3 |= BIT_8; 8222 8223 if (IS_QLA27XX(ha)) { 8224 icb->firmware_options_3 |= BIT_8; 8225 ql_dbg(ql_log_info, vha, 0x0075, 8226 "Enabling direct connection.\n"); 8227 } 8228 8229 if (rval) { 8230 ql_log(ql_log_warn, vha, 0x0076, 8231 "NVRAM configuration failed.\n"); 8232 } 8233 return (rval); 8234 } 8235 8236 int 8237 qla82xx_restart_isp(scsi_qla_host_t *vha) 8238 { 8239 int status, rval; 8240 struct qla_hw_data *ha = vha->hw; 8241 struct req_que *req = ha->req_q_map[0]; 8242 struct rsp_que *rsp = ha->rsp_q_map[0]; 8243 struct scsi_qla_host *vp; 8244 unsigned long flags; 8245 8246 status = qla2x00_init_rings(vha); 8247 if (!status) { 8248 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8249 ha->flags.chip_reset_done = 1; 8250 8251 status = qla2x00_fw_ready(vha); 8252 if (!status) { 8253 /* Issue a marker after FW becomes ready. */ 8254 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8255 vha->flags.online = 1; 8256 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8257 } 8258 8259 /* if no cable then assume it's good */ 8260 if ((vha->device_flags & DFLG_NO_CABLE)) 8261 status = 0; 8262 } 8263 8264 if (!status) { 8265 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8266 8267 if (!atomic_read(&vha->loop_down_timer)) { 8268 /* 8269 * Issue marker command only when we are going 8270 * to start the I/O . 8271 */ 8272 vha->marker_needed = 1; 8273 } 8274 8275 ha->isp_ops->enable_intrs(ha); 8276 8277 ha->isp_abort_cnt = 0; 8278 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8279 8280 /* Update the firmware version */ 8281 status = qla82xx_check_md_needed(vha); 8282 8283 if (ha->fce) { 8284 ha->flags.fce_enabled = 1; 8285 memset(ha->fce, 0, 8286 fce_calc_size(ha->fce_bufs)); 8287 rval = qla2x00_enable_fce_trace(vha, 8288 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8289 &ha->fce_bufs); 8290 if (rval) { 8291 ql_log(ql_log_warn, vha, 0x8001, 8292 "Unable to reinitialize FCE (%d).\n", 8293 rval); 8294 ha->flags.fce_enabled = 0; 8295 } 8296 } 8297 8298 if (ha->eft) { 8299 memset(ha->eft, 0, EFT_SIZE); 8300 rval = qla2x00_enable_eft_trace(vha, 8301 ha->eft_dma, EFT_NUM_BUFFERS); 8302 if (rval) { 8303 ql_log(ql_log_warn, vha, 0x8010, 8304 "Unable to reinitialize EFT (%d).\n", 8305 rval); 8306 } 8307 } 8308 } 8309 8310 if (!status) { 8311 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8312 "qla82xx_restart_isp succeeded.\n"); 8313 8314 spin_lock_irqsave(&ha->vport_slock, flags); 8315 list_for_each_entry(vp, &ha->vp_list, list) { 8316 if (vp->vp_idx) { 8317 atomic_inc(&vp->vref_count); 8318 spin_unlock_irqrestore(&ha->vport_slock, flags); 8319 8320 qla2x00_vp_abort_isp(vp); 8321 8322 spin_lock_irqsave(&ha->vport_slock, flags); 8323 atomic_dec(&vp->vref_count); 8324 } 8325 } 8326 spin_unlock_irqrestore(&ha->vport_slock, flags); 8327 8328 } else { 8329 ql_log(ql_log_warn, vha, 0x8016, 8330 "qla82xx_restart_isp **** FAILED ****.\n"); 8331 } 8332 8333 return status; 8334 } 8335 8336 void 8337 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8338 { 8339 struct qla_hw_data *ha = vha->hw; 8340 8341 /* Hold status IOCBs until ABTS response received. */ 8342 if (ql2xfwholdabts) 8343 ha->fw_options[3] |= BIT_12; 8344 8345 /* Set Retry FLOGI in case of P2P connection */ 8346 if (ha->operating_mode == P2P) { 8347 ha->fw_options[2] |= BIT_3; 8348 ql_dbg(ql_dbg_disc, vha, 0x2103, 8349 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8350 __func__, ha->fw_options[2]); 8351 } 8352 8353 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8354 if (ql2xmvasynctoatio) { 8355 if (qla_tgt_mode_enabled(vha) || 8356 qla_dual_mode_enabled(vha)) 8357 ha->fw_options[2] |= BIT_11; 8358 else 8359 ha->fw_options[2] &= ~BIT_11; 8360 } 8361 8362 if (qla_tgt_mode_enabled(vha) || 8363 qla_dual_mode_enabled(vha)) { 8364 /* FW auto send SCSI status during */ 8365 ha->fw_options[1] |= BIT_8; 8366 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8367 8368 /* FW perform Exchange validation */ 8369 ha->fw_options[2] |= BIT_4; 8370 } else { 8371 ha->fw_options[1] &= ~BIT_8; 8372 ha->fw_options[10] &= 0x00ff; 8373 8374 ha->fw_options[2] &= ~BIT_4; 8375 } 8376 8377 if (ql2xetsenable) { 8378 /* Enable ETS Burst. */ 8379 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8380 ha->fw_options[2] |= BIT_9; 8381 } 8382 8383 ql_dbg(ql_dbg_init, vha, 0x00e9, 8384 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8385 __func__, ha->fw_options[1], ha->fw_options[2], 8386 ha->fw_options[3], vha->host->active_mode); 8387 8388 qla2x00_set_fw_options(vha, ha->fw_options); 8389 } 8390 8391 /* 8392 * qla24xx_get_fcp_prio 8393 * Gets the fcp cmd priority value for the logged in port. 8394 * Looks for a match of the port descriptors within 8395 * each of the fcp prio config entries. If a match is found, 8396 * the tag (priority) value is returned. 8397 * 8398 * Input: 8399 * vha = scsi host structure pointer. 8400 * fcport = port structure pointer. 8401 * 8402 * Return: 8403 * non-zero (if found) 8404 * -1 (if not found) 8405 * 8406 * Context: 8407 * Kernel context 8408 */ 8409 static int 8410 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8411 { 8412 int i, entries; 8413 uint8_t pid_match, wwn_match; 8414 int priority; 8415 uint32_t pid1, pid2; 8416 uint64_t wwn1, wwn2; 8417 struct qla_fcp_prio_entry *pri_entry; 8418 struct qla_hw_data *ha = vha->hw; 8419 8420 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8421 return -1; 8422 8423 priority = -1; 8424 entries = ha->fcp_prio_cfg->num_entries; 8425 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8426 8427 for (i = 0; i < entries; i++) { 8428 pid_match = wwn_match = 0; 8429 8430 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8431 pri_entry++; 8432 continue; 8433 } 8434 8435 /* check source pid for a match */ 8436 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8437 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8438 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8439 if (pid1 == INVALID_PORT_ID) 8440 pid_match++; 8441 else if (pid1 == pid2) 8442 pid_match++; 8443 } 8444 8445 /* check destination pid for a match */ 8446 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8447 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8448 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8449 if (pid1 == INVALID_PORT_ID) 8450 pid_match++; 8451 else if (pid1 == pid2) 8452 pid_match++; 8453 } 8454 8455 /* check source WWN for a match */ 8456 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8457 wwn1 = wwn_to_u64(vha->port_name); 8458 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8459 if (wwn2 == (uint64_t)-1) 8460 wwn_match++; 8461 else if (wwn1 == wwn2) 8462 wwn_match++; 8463 } 8464 8465 /* check destination WWN for a match */ 8466 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8467 wwn1 = wwn_to_u64(fcport->port_name); 8468 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8469 if (wwn2 == (uint64_t)-1) 8470 wwn_match++; 8471 else if (wwn1 == wwn2) 8472 wwn_match++; 8473 } 8474 8475 if (pid_match == 2 || wwn_match == 2) { 8476 /* Found a matching entry */ 8477 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8478 priority = pri_entry->tag; 8479 break; 8480 } 8481 8482 pri_entry++; 8483 } 8484 8485 return priority; 8486 } 8487 8488 /* 8489 * qla24xx_update_fcport_fcp_prio 8490 * Activates fcp priority for the logged in fc port 8491 * 8492 * Input: 8493 * vha = scsi host structure pointer. 8494 * fcp = port structure pointer. 8495 * 8496 * Return: 8497 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8498 * 8499 * Context: 8500 * Kernel context. 8501 */ 8502 int 8503 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8504 { 8505 int ret; 8506 int priority; 8507 uint16_t mb[5]; 8508 8509 if (fcport->port_type != FCT_TARGET || 8510 fcport->loop_id == FC_NO_LOOP_ID) 8511 return QLA_FUNCTION_FAILED; 8512 8513 priority = qla24xx_get_fcp_prio(vha, fcport); 8514 if (priority < 0) 8515 return QLA_FUNCTION_FAILED; 8516 8517 if (IS_P3P_TYPE(vha->hw)) { 8518 fcport->fcp_prio = priority & 0xf; 8519 return QLA_SUCCESS; 8520 } 8521 8522 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8523 if (ret == QLA_SUCCESS) { 8524 if (fcport->fcp_prio != priority) 8525 ql_dbg(ql_dbg_user, vha, 0x709e, 8526 "Updated FCP_CMND priority - value=%d loop_id=%d " 8527 "port_id=%02x%02x%02x.\n", priority, 8528 fcport->loop_id, fcport->d_id.b.domain, 8529 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8530 fcport->fcp_prio = priority & 0xf; 8531 } else 8532 ql_dbg(ql_dbg_user, vha, 0x704f, 8533 "Unable to update FCP_CMND priority - ret=0x%x for " 8534 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8535 fcport->d_id.b.domain, fcport->d_id.b.area, 8536 fcport->d_id.b.al_pa); 8537 return ret; 8538 } 8539 8540 /* 8541 * qla24xx_update_all_fcp_prio 8542 * Activates fcp priority for all the logged in ports 8543 * 8544 * Input: 8545 * ha = adapter block pointer. 8546 * 8547 * Return: 8548 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8549 * 8550 * Context: 8551 * Kernel context. 8552 */ 8553 int 8554 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8555 { 8556 int ret; 8557 fc_port_t *fcport; 8558 8559 ret = QLA_FUNCTION_FAILED; 8560 /* We need to set priority for all logged in ports */ 8561 list_for_each_entry(fcport, &vha->vp_fcports, list) 8562 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8563 8564 return ret; 8565 } 8566 8567 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8568 int vp_idx, bool startqp) 8569 { 8570 int rsp_id = 0; 8571 int req_id = 0; 8572 int i; 8573 struct qla_hw_data *ha = vha->hw; 8574 uint16_t qpair_id = 0; 8575 struct qla_qpair *qpair = NULL; 8576 struct qla_msix_entry *msix; 8577 8578 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8579 ql_log(ql_log_warn, vha, 0x00181, 8580 "FW/Driver is not multi-queue capable.\n"); 8581 return NULL; 8582 } 8583 8584 if (ql2xmqsupport || ql2xnvmeenable) { 8585 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8586 if (qpair == NULL) { 8587 ql_log(ql_log_warn, vha, 0x0182, 8588 "Failed to allocate memory for queue pair.\n"); 8589 return NULL; 8590 } 8591 memset(qpair, 0, sizeof(struct qla_qpair)); 8592 8593 qpair->hw = vha->hw; 8594 qpair->vha = vha; 8595 qpair->qp_lock_ptr = &qpair->qp_lock; 8596 spin_lock_init(&qpair->qp_lock); 8597 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8598 8599 /* Assign available que pair id */ 8600 mutex_lock(&ha->mq_lock); 8601 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8602 if (ha->num_qpairs >= ha->max_qpairs) { 8603 mutex_unlock(&ha->mq_lock); 8604 ql_log(ql_log_warn, vha, 0x0183, 8605 "No resources to create additional q pair.\n"); 8606 goto fail_qid_map; 8607 } 8608 ha->num_qpairs++; 8609 set_bit(qpair_id, ha->qpair_qid_map); 8610 ha->queue_pair_map[qpair_id] = qpair; 8611 qpair->id = qpair_id; 8612 qpair->vp_idx = vp_idx; 8613 qpair->fw_started = ha->flags.fw_started; 8614 INIT_LIST_HEAD(&qpair->hints_list); 8615 qpair->chip_reset = ha->base_qpair->chip_reset; 8616 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8617 qpair->enable_explicit_conf = 8618 ha->base_qpair->enable_explicit_conf; 8619 8620 for (i = 0; i < ha->msix_count; i++) { 8621 msix = &ha->msix_entries[i]; 8622 if (msix->in_use) 8623 continue; 8624 qpair->msix = msix; 8625 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8626 "Vector %x selected for qpair\n", msix->vector); 8627 break; 8628 } 8629 if (!qpair->msix) { 8630 ql_log(ql_log_warn, vha, 0x0184, 8631 "Out of MSI-X vectors!.\n"); 8632 goto fail_msix; 8633 } 8634 8635 qpair->msix->in_use = 1; 8636 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8637 qpair->pdev = ha->pdev; 8638 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8639 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8640 8641 mutex_unlock(&ha->mq_lock); 8642 8643 /* Create response queue first */ 8644 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8645 if (!rsp_id) { 8646 ql_log(ql_log_warn, vha, 0x0185, 8647 "Failed to create response queue.\n"); 8648 goto fail_rsp; 8649 } 8650 8651 qpair->rsp = ha->rsp_q_map[rsp_id]; 8652 8653 /* Create request queue */ 8654 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8655 startqp); 8656 if (!req_id) { 8657 ql_log(ql_log_warn, vha, 0x0186, 8658 "Failed to create request queue.\n"); 8659 goto fail_req; 8660 } 8661 8662 qpair->req = ha->req_q_map[req_id]; 8663 qpair->rsp->req = qpair->req; 8664 qpair->rsp->qpair = qpair; 8665 /* init qpair to this cpu. Will adjust at run time. */ 8666 qla_cpu_update(qpair, smp_processor_id()); 8667 8668 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8669 if (ha->fw_attributes & BIT_4) 8670 qpair->difdix_supported = 1; 8671 } 8672 8673 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8674 if (!qpair->srb_mempool) { 8675 ql_log(ql_log_warn, vha, 0xd036, 8676 "Failed to create srb mempool for qpair %d\n", 8677 qpair->id); 8678 goto fail_mempool; 8679 } 8680 8681 /* Mark as online */ 8682 qpair->online = 1; 8683 8684 if (!vha->flags.qpairs_available) 8685 vha->flags.qpairs_available = 1; 8686 8687 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8688 "Request/Response queue pair created, id %d\n", 8689 qpair->id); 8690 ql_dbg(ql_dbg_init, vha, 0x0187, 8691 "Request/Response queue pair created, id %d\n", 8692 qpair->id); 8693 } 8694 return qpair; 8695 8696 fail_mempool: 8697 fail_req: 8698 qla25xx_delete_rsp_que(vha, qpair->rsp); 8699 fail_rsp: 8700 mutex_lock(&ha->mq_lock); 8701 qpair->msix->in_use = 0; 8702 list_del(&qpair->qp_list_elem); 8703 if (list_empty(&vha->qp_list)) 8704 vha->flags.qpairs_available = 0; 8705 fail_msix: 8706 ha->queue_pair_map[qpair_id] = NULL; 8707 clear_bit(qpair_id, ha->qpair_qid_map); 8708 ha->num_qpairs--; 8709 mutex_unlock(&ha->mq_lock); 8710 fail_qid_map: 8711 kfree(qpair); 8712 return NULL; 8713 } 8714 8715 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8716 { 8717 int ret = QLA_FUNCTION_FAILED; 8718 struct qla_hw_data *ha = qpair->hw; 8719 8720 qpair->delete_in_progress = 1; 8721 while (atomic_read(&qpair->ref_count)) 8722 msleep(500); 8723 8724 ret = qla25xx_delete_req_que(vha, qpair->req); 8725 if (ret != QLA_SUCCESS) 8726 goto fail; 8727 8728 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8729 if (ret != QLA_SUCCESS) 8730 goto fail; 8731 8732 mutex_lock(&ha->mq_lock); 8733 ha->queue_pair_map[qpair->id] = NULL; 8734 clear_bit(qpair->id, ha->qpair_qid_map); 8735 ha->num_qpairs--; 8736 list_del(&qpair->qp_list_elem); 8737 if (list_empty(&vha->qp_list)) { 8738 vha->flags.qpairs_available = 0; 8739 vha->flags.qpairs_req_created = 0; 8740 vha->flags.qpairs_rsp_created = 0; 8741 } 8742 mempool_destroy(qpair->srb_mempool); 8743 kfree(qpair); 8744 mutex_unlock(&ha->mq_lock); 8745 8746 return QLA_SUCCESS; 8747 fail: 8748 return ret; 8749 } 8750