1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 scsi_qla_host_t *vha = sp->vha; 54 struct req_que *req; 55 unsigned long flags; 56 57 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 58 req = vha->hw->req_q_map[0]; 59 req->outstanding_cmds[sp->handle] = NULL; 60 iocb = &sp->u.iocb_cmd; 61 iocb->timeout(sp); 62 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 63 } 64 65 void 66 qla2x00_sp_free(void *ptr) 67 { 68 srb_t *sp = ptr; 69 struct srb_iocb *iocb = &sp->u.iocb_cmd; 70 71 del_timer(&iocb->timer); 72 qla2x00_rel_sp(sp); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (IS_QLAFX00(ha)) { 86 tmo = FX00_DEF_RATOV * 2; 87 } else if (!IS_FWI2_CAPABLE(ha)) { 88 /* 89 * Except for earlier ISPs where the timeout is seeded from the 90 * initialization control block. 91 */ 92 tmo = ha->login_timeout; 93 } 94 return tmo; 95 } 96 97 void 98 qla2x00_async_iocb_timeout(void *data) 99 { 100 srb_t *sp = data; 101 fc_port_t *fcport = sp->fcport; 102 struct srb_iocb *lio = &sp->u.iocb_cmd; 103 104 if (fcport) { 105 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 106 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 107 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 108 109 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 110 } else { 111 pr_info("Async-%s timeout - hdl=%x.\n", 112 sp->name, sp->handle); 113 } 114 115 switch (sp->type) { 116 case SRB_LOGIN_CMD: 117 /* Retry as needed. */ 118 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 119 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 120 QLA_LOGIO_LOGIN_RETRIED : 0; 121 sp->done(sp, QLA_FUNCTION_TIMEOUT); 122 break; 123 case SRB_LOGOUT_CMD: 124 case SRB_CT_PTHRU_CMD: 125 case SRB_MB_IOCB: 126 case SRB_NACK_PLOGI: 127 case SRB_NACK_PRLI: 128 case SRB_NACK_LOGO: 129 case SRB_CTRL_VP: 130 sp->done(sp, QLA_FUNCTION_TIMEOUT); 131 break; 132 } 133 } 134 135 static void 136 qla2x00_async_login_sp_done(void *ptr, int res) 137 { 138 srb_t *sp = ptr; 139 struct scsi_qla_host *vha = sp->vha; 140 struct srb_iocb *lio = &sp->u.iocb_cmd; 141 struct event_arg ea; 142 143 ql_dbg(ql_dbg_disc, vha, 0x20dd, 144 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 145 146 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 147 148 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 149 memset(&ea, 0, sizeof(ea)); 150 ea.event = FCME_PLOGI_DONE; 151 ea.fcport = sp->fcport; 152 ea.data[0] = lio->u.logio.data[0]; 153 ea.data[1] = lio->u.logio.data[1]; 154 ea.iop[0] = lio->u.logio.iop[0]; 155 ea.iop[1] = lio->u.logio.iop[1]; 156 ea.sp = sp; 157 qla2x00_fcport_event_handler(vha, &ea); 158 } 159 160 sp->free(sp); 161 } 162 163 int 164 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 165 uint16_t *data) 166 { 167 srb_t *sp; 168 struct srb_iocb *lio; 169 int rval = QLA_FUNCTION_FAILED; 170 171 if (!vha->flags.online) 172 goto done; 173 174 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 175 if (!sp) 176 goto done; 177 178 fcport->flags |= FCF_ASYNC_SENT; 179 fcport->logout_completed = 0; 180 181 fcport->disc_state = DSC_LOGIN_PEND; 182 sp->type = SRB_LOGIN_CMD; 183 sp->name = "login"; 184 sp->gen1 = fcport->rscn_gen; 185 sp->gen2 = fcport->login_gen; 186 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 187 188 lio = &sp->u.iocb_cmd; 189 lio->timeout = qla2x00_async_iocb_timeout; 190 sp->done = qla2x00_async_login_sp_done; 191 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 192 193 if (fcport->fc4f_nvme) 194 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 195 196 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 197 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 198 rval = qla2x00_start_sp(sp); 199 if (rval != QLA_SUCCESS) { 200 fcport->flags |= FCF_LOGIN_NEEDED; 201 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 202 goto done_free_sp; 203 } 204 205 ql_dbg(ql_dbg_disc, vha, 0x2072, 206 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 207 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 208 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 209 fcport->login_retry); 210 return rval; 211 212 done_free_sp: 213 sp->free(sp); 214 fcport->flags &= ~FCF_ASYNC_SENT; 215 done: 216 fcport->flags &= ~FCF_ASYNC_ACTIVE; 217 return rval; 218 } 219 220 static void 221 qla2x00_async_logout_sp_done(void *ptr, int res) 222 { 223 srb_t *sp = ptr; 224 225 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 226 sp->fcport->login_gen++; 227 qlt_logo_completion_handler(sp->fcport, res); 228 sp->free(sp); 229 } 230 231 int 232 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 233 { 234 srb_t *sp; 235 struct srb_iocb *lio; 236 int rval = QLA_FUNCTION_FAILED; 237 238 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 239 return rval; 240 241 fcport->flags |= FCF_ASYNC_SENT; 242 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 243 if (!sp) 244 goto done; 245 246 sp->type = SRB_LOGOUT_CMD; 247 sp->name = "logout"; 248 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 249 250 lio = &sp->u.iocb_cmd; 251 lio->timeout = qla2x00_async_iocb_timeout; 252 sp->done = qla2x00_async_logout_sp_done; 253 rval = qla2x00_start_sp(sp); 254 if (rval != QLA_SUCCESS) 255 goto done_free_sp; 256 257 ql_dbg(ql_dbg_disc, vha, 0x2070, 258 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 259 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 260 fcport->d_id.b.area, fcport->d_id.b.al_pa, 261 fcport->port_name); 262 return rval; 263 264 done_free_sp: 265 sp->free(sp); 266 done: 267 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 268 return rval; 269 } 270 271 void 272 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 273 uint16_t *data) 274 { 275 fcport->flags &= ~FCF_ASYNC_ACTIVE; 276 /* Don't re-login in target mode */ 277 if (!fcport->tgt_session) 278 qla2x00_mark_device_lost(vha, fcport, 1, 0); 279 qlt_logo_completion_handler(fcport, data[0]); 280 } 281 282 static void 283 qla2x00_async_prlo_sp_done(void *s, int res) 284 { 285 srb_t *sp = (srb_t *)s; 286 struct srb_iocb *lio = &sp->u.iocb_cmd; 287 struct scsi_qla_host *vha = sp->vha; 288 289 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 290 if (!test_bit(UNLOADING, &vha->dpc_flags)) 291 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 292 lio->u.logio.data); 293 sp->free(sp); 294 } 295 296 int 297 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 298 { 299 srb_t *sp; 300 struct srb_iocb *lio; 301 int rval; 302 303 rval = QLA_FUNCTION_FAILED; 304 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 305 if (!sp) 306 goto done; 307 308 sp->type = SRB_PRLO_CMD; 309 sp->name = "prlo"; 310 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 311 312 lio = &sp->u.iocb_cmd; 313 lio->timeout = qla2x00_async_iocb_timeout; 314 sp->done = qla2x00_async_prlo_sp_done; 315 rval = qla2x00_start_sp(sp); 316 if (rval != QLA_SUCCESS) 317 goto done_free_sp; 318 319 ql_dbg(ql_dbg_disc, vha, 0x2070, 320 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 321 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 322 fcport->d_id.b.area, fcport->d_id.b.al_pa); 323 return rval; 324 325 done_free_sp: 326 sp->free(sp); 327 done: 328 fcport->flags &= ~FCF_ASYNC_ACTIVE; 329 return rval; 330 } 331 332 static 333 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 334 { 335 struct fc_port *fcport = ea->fcport; 336 337 ql_dbg(ql_dbg_disc, vha, 0x20d2, 338 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 339 __func__, fcport->port_name, fcport->disc_state, 340 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 341 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 342 343 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 344 ql_dbg(ql_dbg_disc, vha, 0x2066, 345 "%s %8phC: adisc fail: post delete\n", 346 __func__, ea->fcport->port_name); 347 qlt_schedule_sess_for_deletion(ea->fcport); 348 return; 349 } 350 351 if (ea->fcport->disc_state == DSC_DELETE_PEND) 352 return; 353 354 if (ea->sp->gen2 != ea->fcport->login_gen) { 355 /* target side must have changed it. */ 356 ql_dbg(ql_dbg_disc, vha, 0x20d3, 357 "%s %8phC generation changed\n", 358 __func__, ea->fcport->port_name); 359 return; 360 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 361 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 362 __func__, __LINE__, ea->fcport->port_name); 363 qla24xx_post_gidpn_work(vha, ea->fcport); 364 return; 365 } 366 367 __qla24xx_handle_gpdb_event(vha, ea); 368 } 369 370 static void 371 qla2x00_async_adisc_sp_done(void *ptr, int res) 372 { 373 srb_t *sp = ptr; 374 struct scsi_qla_host *vha = sp->vha; 375 struct event_arg ea; 376 struct srb_iocb *lio = &sp->u.iocb_cmd; 377 378 ql_dbg(ql_dbg_disc, vha, 0x2066, 379 "Async done-%s res %x %8phC\n", 380 sp->name, res, sp->fcport->port_name); 381 382 sp->fcport->flags &= ~FCF_ASYNC_SENT; 383 384 memset(&ea, 0, sizeof(ea)); 385 ea.event = FCME_ADISC_DONE; 386 ea.rc = res; 387 ea.data[0] = lio->u.logio.data[0]; 388 ea.data[1] = lio->u.logio.data[1]; 389 ea.iop[0] = lio->u.logio.iop[0]; 390 ea.iop[1] = lio->u.logio.iop[1]; 391 ea.fcport = sp->fcport; 392 ea.sp = sp; 393 394 qla2x00_fcport_event_handler(vha, &ea); 395 396 sp->free(sp); 397 } 398 399 int 400 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 401 uint16_t *data) 402 { 403 srb_t *sp; 404 struct srb_iocb *lio; 405 int rval; 406 407 rval = QLA_FUNCTION_FAILED; 408 fcport->flags |= FCF_ASYNC_SENT; 409 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 410 if (!sp) 411 goto done; 412 413 sp->type = SRB_ADISC_CMD; 414 sp->name = "adisc"; 415 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 416 417 lio = &sp->u.iocb_cmd; 418 lio->timeout = qla2x00_async_iocb_timeout; 419 sp->done = qla2x00_async_adisc_sp_done; 420 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 421 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 422 rval = qla2x00_start_sp(sp); 423 if (rval != QLA_SUCCESS) 424 goto done_free_sp; 425 426 ql_dbg(ql_dbg_disc, vha, 0x206f, 427 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 428 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 429 return rval; 430 431 done_free_sp: 432 sp->free(sp); 433 done: 434 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 435 qla2x00_post_async_adisc_work(vha, fcport, data); 436 return rval; 437 } 438 439 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 440 struct event_arg *ea) 441 { 442 fc_port_t *fcport, *conflict_fcport; 443 struct get_name_list_extended *e; 444 u16 i, n, found = 0, loop_id; 445 port_id_t id; 446 u64 wwn; 447 u16 data[2]; 448 u8 current_login_state; 449 450 fcport = ea->fcport; 451 ql_dbg(ql_dbg_disc, vha, 0xffff, 452 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 453 __func__, fcport->port_name, fcport->disc_state, 454 fcport->fw_login_state, ea->rc, 455 fcport->login_gen, fcport->last_login_gen, 456 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 457 458 if (fcport->disc_state == DSC_DELETE_PEND) 459 return; 460 461 if (ea->rc) { /* rval */ 462 if (fcport->login_retry == 0) { 463 fcport->login_retry = vha->hw->login_retry_count; 464 ql_dbg(ql_dbg_disc, vha, 0x20de, 465 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 466 fcport->port_name, fcport->login_retry); 467 } 468 return; 469 } 470 471 if (fcport->last_rscn_gen != fcport->rscn_gen) { 472 ql_dbg(ql_dbg_disc, vha, 0x20df, 473 "%s %8phC rscn gen changed rscn %d|%d \n", 474 __func__, fcport->port_name, 475 fcport->last_rscn_gen, fcport->rscn_gen); 476 qla24xx_post_gidpn_work(vha, fcport); 477 return; 478 } else if (fcport->last_login_gen != fcport->login_gen) { 479 ql_dbg(ql_dbg_disc, vha, 0x20e0, 480 "%s %8phC login gen changed\n", 481 __func__, fcport->port_name); 482 return; 483 } 484 485 n = ea->data[0] / sizeof(struct get_name_list_extended); 486 487 ql_dbg(ql_dbg_disc, vha, 0x20e1, 488 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 489 __func__, __LINE__, fcport->port_name, n, 490 fcport->d_id.b.domain, fcport->d_id.b.area, 491 fcport->d_id.b.al_pa, fcport->loop_id); 492 493 for (i = 0; i < n; i++) { 494 e = &vha->gnl.l[i]; 495 wwn = wwn_to_u64(e->port_name); 496 497 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 498 continue; 499 500 found = 1; 501 id.b.domain = e->port_id[2]; 502 id.b.area = e->port_id[1]; 503 id.b.al_pa = e->port_id[0]; 504 id.b.rsvd_1 = 0; 505 506 loop_id = le16_to_cpu(e->nport_handle); 507 loop_id = (loop_id & 0x7fff); 508 509 ql_dbg(ql_dbg_disc, vha, 0x20e2, 510 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 511 __func__, fcport->port_name, 512 e->current_login_state, fcport->fw_login_state, 513 id.b.domain, id.b.area, id.b.al_pa, 514 fcport->d_id.b.domain, fcport->d_id.b.area, 515 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 516 517 if ((id.b24 != fcport->d_id.b24) || 518 ((fcport->loop_id != FC_NO_LOOP_ID) && 519 (fcport->loop_id != loop_id))) { 520 ql_dbg(ql_dbg_disc, vha, 0x20e3, 521 "%s %d %8phC post del sess\n", 522 __func__, __LINE__, fcport->port_name); 523 qlt_schedule_sess_for_deletion(fcport); 524 return; 525 } 526 527 fcport->loop_id = loop_id; 528 529 wwn = wwn_to_u64(fcport->port_name); 530 qlt_find_sess_invalidate_other(vha, wwn, 531 id, loop_id, &conflict_fcport); 532 533 if (conflict_fcport) { 534 /* 535 * Another share fcport share the same loop_id & 536 * nport id. Conflict fcport needs to finish 537 * cleanup before this fcport can proceed to login. 538 */ 539 conflict_fcport->conflict = fcport; 540 fcport->login_pause = 1; 541 } 542 543 if (fcport->fc4f_nvme) 544 current_login_state = e->current_login_state >> 4; 545 else 546 current_login_state = e->current_login_state & 0xf; 547 548 switch (current_login_state) { 549 case DSC_LS_PRLI_COMP: 550 ql_dbg(ql_dbg_disc, vha, 0x20e4, 551 "%s %d %8phC post gpdb\n", 552 __func__, __LINE__, fcport->port_name); 553 554 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 555 fcport->port_type = FCT_INITIATOR; 556 else 557 fcport->port_type = FCT_TARGET; 558 559 data[0] = data[1] = 0; 560 qla2x00_post_async_adisc_work(vha, fcport, data); 561 break; 562 case DSC_LS_PORT_UNAVAIL: 563 default: 564 if (fcport->loop_id == FC_NO_LOOP_ID) { 565 qla2x00_find_new_loop_id(vha, fcport); 566 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 567 } 568 ql_dbg(ql_dbg_disc, vha, 0x20e5, 569 "%s %d %8phC\n", 570 __func__, __LINE__, fcport->port_name); 571 qla24xx_fcport_handle_login(vha, fcport); 572 break; 573 } 574 } 575 576 if (!found) { 577 /* fw has no record of this port */ 578 for (i = 0; i < n; i++) { 579 e = &vha->gnl.l[i]; 580 id.b.domain = e->port_id[0]; 581 id.b.area = e->port_id[1]; 582 id.b.al_pa = e->port_id[2]; 583 id.b.rsvd_1 = 0; 584 loop_id = le16_to_cpu(e->nport_handle); 585 586 if (fcport->d_id.b24 == id.b24) { 587 conflict_fcport = 588 qla2x00_find_fcport_by_wwpn(vha, 589 e->port_name, 0); 590 ql_dbg(ql_dbg_disc, vha, 0x20e6, 591 "%s %d %8phC post del sess\n", 592 __func__, __LINE__, 593 conflict_fcport->port_name); 594 qlt_schedule_sess_for_deletion 595 (conflict_fcport); 596 } 597 598 /* FW already picked this loop id for another fcport */ 599 if (fcport->loop_id == loop_id) 600 fcport->loop_id = FC_NO_LOOP_ID; 601 } 602 qla24xx_fcport_handle_login(vha, fcport); 603 } 604 } /* gnl_event */ 605 606 static void 607 qla24xx_async_gnl_sp_done(void *s, int res) 608 { 609 struct srb *sp = s; 610 struct scsi_qla_host *vha = sp->vha; 611 unsigned long flags; 612 struct fc_port *fcport = NULL, *tf; 613 u16 i, n = 0, loop_id; 614 struct event_arg ea; 615 struct get_name_list_extended *e; 616 u64 wwn; 617 struct list_head h; 618 bool found = false; 619 620 ql_dbg(ql_dbg_disc, vha, 0x20e7, 621 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 622 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 623 sp->u.iocb_cmd.u.mbx.in_mb[2]); 624 625 memset(&ea, 0, sizeof(ea)); 626 ea.sp = sp; 627 ea.rc = res; 628 ea.event = FCME_GNL_DONE; 629 630 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 631 sizeof(struct get_name_list_extended)) { 632 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 633 sizeof(struct get_name_list_extended); 634 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 635 } 636 637 for (i = 0; i < n; i++) { 638 e = &vha->gnl.l[i]; 639 loop_id = le16_to_cpu(e->nport_handle); 640 /* mask out reserve bit */ 641 loop_id = (loop_id & 0x7fff); 642 set_bit(loop_id, vha->hw->loop_id_map); 643 wwn = wwn_to_u64(e->port_name); 644 645 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 646 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 647 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 648 e->port_id[0], e->current_login_state, e->last_login_state, 649 (loop_id & 0x7fff)); 650 } 651 652 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 653 654 INIT_LIST_HEAD(&h); 655 fcport = tf = NULL; 656 if (!list_empty(&vha->gnl.fcports)) 657 list_splice_init(&vha->gnl.fcports, &h); 658 659 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 660 list_del_init(&fcport->gnl_entry); 661 spin_lock(&vha->hw->tgt.sess_lock); 662 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 663 spin_unlock(&vha->hw->tgt.sess_lock); 664 ea.fcport = fcport; 665 666 qla2x00_fcport_event_handler(vha, &ea); 667 } 668 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 669 670 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 671 /* create new fcport if fw has knowledge of new sessions */ 672 for (i = 0; i < n; i++) { 673 port_id_t id; 674 u64 wwnn; 675 676 e = &vha->gnl.l[i]; 677 wwn = wwn_to_u64(e->port_name); 678 679 found = false; 680 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 681 if (!memcmp((u8 *)&wwn, fcport->port_name, 682 WWN_SIZE)) { 683 found = true; 684 break; 685 } 686 } 687 688 id.b.domain = e->port_id[2]; 689 id.b.area = e->port_id[1]; 690 id.b.al_pa = e->port_id[0]; 691 id.b.rsvd_1 = 0; 692 693 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 694 ql_dbg(ql_dbg_disc, vha, 0x2065, 695 "%s %d %8phC %06x post new sess\n", 696 __func__, __LINE__, (u8 *)&wwn, id.b24); 697 wwnn = wwn_to_u64(e->node_name); 698 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 699 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 700 } 701 } 702 703 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 704 705 sp->free(sp); 706 } 707 708 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 709 { 710 srb_t *sp; 711 struct srb_iocb *mbx; 712 int rval = QLA_FUNCTION_FAILED; 713 unsigned long flags; 714 u16 *mb; 715 716 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 717 return rval; 718 719 ql_dbg(ql_dbg_disc, vha, 0x20d9, 720 "Async-gnlist WWPN %8phC \n", fcport->port_name); 721 722 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 723 if (!list_empty(&fcport->gnl_entry)) { 724 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 725 rval = QLA_SUCCESS; 726 goto done; 727 } 728 729 spin_lock(&vha->hw->tgt.sess_lock); 730 fcport->disc_state = DSC_GNL; 731 fcport->last_rscn_gen = fcport->rscn_gen; 732 fcport->last_login_gen = fcport->login_gen; 733 spin_unlock(&vha->hw->tgt.sess_lock); 734 735 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 736 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 737 738 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 739 if (!sp) 740 goto done; 741 742 fcport->flags |= FCF_ASYNC_SENT; 743 sp->type = SRB_MB_IOCB; 744 sp->name = "gnlist"; 745 sp->gen1 = fcport->rscn_gen; 746 sp->gen2 = fcport->login_gen; 747 748 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 749 750 mb = sp->u.iocb_cmd.u.mbx.out_mb; 751 mb[0] = MBC_PORT_NODE_NAME_LIST; 752 mb[1] = BIT_2 | BIT_3; 753 mb[2] = MSW(vha->gnl.ldma); 754 mb[3] = LSW(vha->gnl.ldma); 755 mb[6] = MSW(MSD(vha->gnl.ldma)); 756 mb[7] = LSW(MSD(vha->gnl.ldma)); 757 mb[8] = vha->gnl.size; 758 mb[9] = vha->vp_idx; 759 760 mbx = &sp->u.iocb_cmd; 761 mbx->timeout = qla2x00_async_iocb_timeout; 762 763 sp->done = qla24xx_async_gnl_sp_done; 764 765 rval = qla2x00_start_sp(sp); 766 if (rval != QLA_SUCCESS) 767 goto done_free_sp; 768 769 ql_dbg(ql_dbg_disc, vha, 0x20da, 770 "Async-%s - OUT WWPN %8phC hndl %x\n", 771 sp->name, fcport->port_name, sp->handle); 772 773 return rval; 774 775 done_free_sp: 776 sp->free(sp); 777 fcport->flags &= ~FCF_ASYNC_SENT; 778 done: 779 return rval; 780 } 781 782 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 783 { 784 struct qla_work_evt *e; 785 786 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 787 if (!e) 788 return QLA_FUNCTION_FAILED; 789 790 e->u.fcport.fcport = fcport; 791 fcport->flags |= FCF_ASYNC_ACTIVE; 792 return qla2x00_post_work(vha, e); 793 } 794 795 static 796 void qla24xx_async_gpdb_sp_done(void *s, int res) 797 { 798 struct srb *sp = s; 799 struct scsi_qla_host *vha = sp->vha; 800 struct qla_hw_data *ha = vha->hw; 801 fc_port_t *fcport = sp->fcport; 802 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 803 struct event_arg ea; 804 805 ql_dbg(ql_dbg_disc, vha, 0x20db, 806 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 807 sp->name, res, fcport->port_name, mb[1], mb[2]); 808 809 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 810 811 memset(&ea, 0, sizeof(ea)); 812 ea.event = FCME_GPDB_DONE; 813 ea.fcport = fcport; 814 ea.sp = sp; 815 816 qla2x00_fcport_event_handler(vha, &ea); 817 818 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 819 sp->u.iocb_cmd.u.mbx.in_dma); 820 821 sp->free(sp); 822 } 823 824 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 825 { 826 struct qla_work_evt *e; 827 828 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 829 if (!e) 830 return QLA_FUNCTION_FAILED; 831 832 e->u.fcport.fcport = fcport; 833 834 return qla2x00_post_work(vha, e); 835 } 836 837 static void 838 qla2x00_async_prli_sp_done(void *ptr, int res) 839 { 840 srb_t *sp = ptr; 841 struct scsi_qla_host *vha = sp->vha; 842 struct srb_iocb *lio = &sp->u.iocb_cmd; 843 struct event_arg ea; 844 845 ql_dbg(ql_dbg_disc, vha, 0x2129, 846 "%s %8phC res %d \n", __func__, 847 sp->fcport->port_name, res); 848 849 sp->fcport->flags &= ~FCF_ASYNC_SENT; 850 851 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 852 memset(&ea, 0, sizeof(ea)); 853 ea.event = FCME_PRLI_DONE; 854 ea.fcport = sp->fcport; 855 ea.data[0] = lio->u.logio.data[0]; 856 ea.data[1] = lio->u.logio.data[1]; 857 ea.iop[0] = lio->u.logio.iop[0]; 858 ea.iop[1] = lio->u.logio.iop[1]; 859 ea.sp = sp; 860 861 qla2x00_fcport_event_handler(vha, &ea); 862 } 863 864 sp->free(sp); 865 } 866 867 int 868 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 869 { 870 srb_t *sp; 871 struct srb_iocb *lio; 872 int rval = QLA_FUNCTION_FAILED; 873 874 if (!vha->flags.online) 875 return rval; 876 877 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 878 fcport->fw_login_state == DSC_LS_PRLI_PEND) 879 return rval; 880 881 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 882 if (!sp) 883 return rval; 884 885 fcport->flags |= FCF_ASYNC_SENT; 886 fcport->logout_completed = 0; 887 888 sp->type = SRB_PRLI_CMD; 889 sp->name = "prli"; 890 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 891 892 lio = &sp->u.iocb_cmd; 893 lio->timeout = qla2x00_async_iocb_timeout; 894 sp->done = qla2x00_async_prli_sp_done; 895 lio->u.logio.flags = 0; 896 897 if (fcport->fc4f_nvme) 898 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 899 900 rval = qla2x00_start_sp(sp); 901 if (rval != QLA_SUCCESS) { 902 fcport->flags |= FCF_LOGIN_NEEDED; 903 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 904 goto done_free_sp; 905 } 906 907 ql_dbg(ql_dbg_disc, vha, 0x211b, 908 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n", 909 fcport->port_name, sp->handle, fcport->loop_id, 910 fcport->d_id.b24, fcport->login_retry); 911 912 return rval; 913 914 done_free_sp: 915 sp->free(sp); 916 fcport->flags &= ~FCF_ASYNC_SENT; 917 return rval; 918 } 919 920 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 921 { 922 struct qla_work_evt *e; 923 924 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 925 if (!e) 926 return QLA_FUNCTION_FAILED; 927 928 e->u.fcport.fcport = fcport; 929 e->u.fcport.opt = opt; 930 fcport->flags |= FCF_ASYNC_ACTIVE; 931 return qla2x00_post_work(vha, e); 932 } 933 934 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 935 { 936 srb_t *sp; 937 struct srb_iocb *mbx; 938 int rval = QLA_FUNCTION_FAILED; 939 u16 *mb; 940 dma_addr_t pd_dma; 941 struct port_database_24xx *pd; 942 struct qla_hw_data *ha = vha->hw; 943 944 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 945 return rval; 946 947 fcport->disc_state = DSC_GPDB; 948 949 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 950 if (!sp) 951 goto done; 952 953 fcport->flags |= FCF_ASYNC_SENT; 954 sp->type = SRB_MB_IOCB; 955 sp->name = "gpdb"; 956 sp->gen1 = fcport->rscn_gen; 957 sp->gen2 = fcport->login_gen; 958 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 959 960 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 961 if (pd == NULL) { 962 ql_log(ql_log_warn, vha, 0xd043, 963 "Failed to allocate port database structure.\n"); 964 goto done_free_sp; 965 } 966 967 mb = sp->u.iocb_cmd.u.mbx.out_mb; 968 mb[0] = MBC_GET_PORT_DATABASE; 969 mb[1] = fcport->loop_id; 970 mb[2] = MSW(pd_dma); 971 mb[3] = LSW(pd_dma); 972 mb[6] = MSW(MSD(pd_dma)); 973 mb[7] = LSW(MSD(pd_dma)); 974 mb[9] = vha->vp_idx; 975 mb[10] = opt; 976 977 mbx = &sp->u.iocb_cmd; 978 mbx->timeout = qla2x00_async_iocb_timeout; 979 mbx->u.mbx.in = (void *)pd; 980 mbx->u.mbx.in_dma = pd_dma; 981 982 sp->done = qla24xx_async_gpdb_sp_done; 983 984 rval = qla2x00_start_sp(sp); 985 if (rval != QLA_SUCCESS) 986 goto done_free_sp; 987 988 ql_dbg(ql_dbg_disc, vha, 0x20dc, 989 "Async-%s %8phC hndl %x opt %x\n", 990 sp->name, fcport->port_name, sp->handle, opt); 991 992 return rval; 993 994 done_free_sp: 995 if (pd) 996 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 997 998 sp->free(sp); 999 fcport->flags &= ~FCF_ASYNC_SENT; 1000 done: 1001 qla24xx_post_gpdb_work(vha, fcport, opt); 1002 return rval; 1003 } 1004 1005 static 1006 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1007 { 1008 unsigned long flags; 1009 1010 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1011 ea->fcport->login_gen++; 1012 ea->fcport->deleted = 0; 1013 ea->fcport->logout_on_delete = 1; 1014 1015 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1016 vha->fcport_count++; 1017 ea->fcport->login_succ = 1; 1018 1019 if (!IS_IIDMA_CAPABLE(vha->hw) || 1020 !vha->hw->flags.gpsc_supported) { 1021 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1022 "%s %d %8phC post upd_fcport fcp_cnt %d\n", 1023 __func__, __LINE__, ea->fcport->port_name, 1024 vha->fcport_count); 1025 1026 qla24xx_post_upd_fcport_work(vha, ea->fcport); 1027 } else { 1028 if (ea->fcport->id_changed) { 1029 ea->fcport->id_changed = 0; 1030 ql_dbg(ql_dbg_disc, vha, 0x20d7, 1031 "%s %d %8phC post gfpnid fcp_cnt %d\n", 1032 __func__, __LINE__, ea->fcport->port_name, 1033 vha->fcport_count); 1034 qla24xx_post_gfpnid_work(vha, ea->fcport); 1035 } else { 1036 ql_dbg(ql_dbg_disc, vha, 0x20d7, 1037 "%s %d %8phC post gpsc fcp_cnt %d\n", 1038 __func__, __LINE__, ea->fcport->port_name, 1039 vha->fcport_count); 1040 qla24xx_post_gpsc_work(vha, ea->fcport); 1041 } 1042 } 1043 } else if (ea->fcport->login_succ) { 1044 /* 1045 * We have an existing session. A late RSCN delivery 1046 * must have triggered the session to be re-validate. 1047 * Session is still valid. 1048 */ 1049 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1050 "%s %d %8phC session revalidate success\n", 1051 __func__, __LINE__, ea->fcport->port_name); 1052 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1053 } 1054 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1055 } 1056 1057 static 1058 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1059 { 1060 fc_port_t *fcport = ea->fcport; 1061 struct port_database_24xx *pd; 1062 struct srb *sp = ea->sp; 1063 uint8_t ls; 1064 1065 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1066 1067 fcport->flags &= ~FCF_ASYNC_SENT; 1068 1069 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1070 "%s %8phC DS %d LS %d rc %d\n", __func__, fcport->port_name, 1071 fcport->disc_state, pd->current_login_state, ea->rc); 1072 1073 if (fcport->disc_state == DSC_DELETE_PEND) 1074 return; 1075 1076 if (fcport->fc4f_nvme) 1077 ls = pd->current_login_state >> 4; 1078 else 1079 ls = pd->current_login_state & 0xf; 1080 1081 switch (ls) { 1082 case PDS_PRLI_COMPLETE: 1083 __qla24xx_parse_gpdb(vha, fcport, pd); 1084 break; 1085 case PDS_PLOGI_PENDING: 1086 case PDS_PLOGI_COMPLETE: 1087 case PDS_PRLI_PENDING: 1088 case PDS_PRLI2_PENDING: 1089 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC relogin needed\n", 1090 __func__, __LINE__, fcport->port_name); 1091 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1092 return; 1093 case PDS_LOGO_PENDING: 1094 case PDS_PORT_UNAVAILABLE: 1095 default: 1096 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1097 __func__, __LINE__, fcport->port_name); 1098 qlt_schedule_sess_for_deletion(fcport); 1099 return; 1100 } 1101 __qla24xx_handle_gpdb_event(vha, ea); 1102 } /* gpdb event */ 1103 1104 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1105 { 1106 u8 login = 0; 1107 int rc; 1108 1109 if (qla_tgt_mode_enabled(vha)) 1110 return; 1111 1112 if (qla_dual_mode_enabled(vha)) { 1113 if (N2N_TOPO(vha->hw)) { 1114 u64 mywwn, wwn; 1115 1116 mywwn = wwn_to_u64(vha->port_name); 1117 wwn = wwn_to_u64(fcport->port_name); 1118 if (mywwn > wwn) 1119 login = 1; 1120 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1121 && time_after_eq(jiffies, 1122 fcport->plogi_nack_done_deadline)) 1123 login = 1; 1124 } else { 1125 login = 1; 1126 } 1127 } else { 1128 /* initiator mode */ 1129 login = 1; 1130 } 1131 1132 if (login) { 1133 if (fcport->loop_id == FC_NO_LOOP_ID) { 1134 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1135 rc = qla2x00_find_new_loop_id(vha, fcport); 1136 if (rc) { 1137 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1138 "%s %d %8phC post del sess - out of loopid\n", 1139 __func__, __LINE__, fcport->port_name); 1140 fcport->scan_state = 0; 1141 qlt_schedule_sess_for_deletion(fcport); 1142 return; 1143 } 1144 } 1145 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1146 "%s %d %8phC post login\n", 1147 __func__, __LINE__, fcport->port_name); 1148 qla2x00_post_async_login_work(vha, fcport, NULL); 1149 } 1150 } 1151 1152 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1153 { 1154 u16 data[2]; 1155 u64 wwn; 1156 1157 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1158 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n", 1159 __func__, fcport->port_name, fcport->disc_state, 1160 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1161 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1162 fcport->login_gen, fcport->login_retry, 1163 fcport->loop_id, fcport->scan_state); 1164 1165 if (fcport->login_retry == 0) 1166 return 0; 1167 1168 if (fcport->scan_state != QLA_FCPORT_FOUND) 1169 return 0; 1170 1171 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1172 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1173 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1174 return 0; 1175 1176 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1177 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1178 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1179 return 0; 1180 } 1181 } 1182 1183 /* for pure Target Mode. Login will not be initiated */ 1184 if (vha->host->active_mode == MODE_TARGET) 1185 return 0; 1186 1187 if (fcport->flags & FCF_ASYNC_SENT) { 1188 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1189 return 0; 1190 } 1191 1192 fcport->login_retry--; 1193 1194 switch (fcport->disc_state) { 1195 case DSC_DELETED: 1196 wwn = wwn_to_u64(fcport->node_name); 1197 if (wwn == 0) { 1198 ql_dbg(ql_dbg_disc, vha, 0xffff, 1199 "%s %d %8phC post GNNID\n", 1200 __func__, __LINE__, fcport->port_name); 1201 qla24xx_post_gnnid_work(vha, fcport); 1202 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1203 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1204 "%s %d %8phC post gnl\n", 1205 __func__, __LINE__, fcport->port_name); 1206 qla24xx_post_gnl_work(vha, fcport); 1207 } else { 1208 qla_chk_n2n_b4_login(vha, fcport); 1209 } 1210 break; 1211 1212 case DSC_GNL: 1213 if (fcport->login_pause) { 1214 fcport->last_rscn_gen = fcport->rscn_gen; 1215 fcport->last_login_gen = fcport->login_gen; 1216 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1217 break; 1218 } 1219 1220 qla_chk_n2n_b4_login(vha, fcport); 1221 break; 1222 1223 case DSC_LOGIN_FAILED: 1224 ql_dbg(ql_dbg_disc, vha, 0x20d0, 1225 "%s %d %8phC post gidpn\n", 1226 __func__, __LINE__, fcport->port_name); 1227 if (N2N_TOPO(vha->hw)) 1228 qla_chk_n2n_b4_login(vha, fcport); 1229 else 1230 qla24xx_post_gidpn_work(vha, fcport); 1231 break; 1232 1233 case DSC_LOGIN_COMPLETE: 1234 /* recheck login state */ 1235 ql_dbg(ql_dbg_disc, vha, 0x20d1, 1236 "%s %d %8phC post adisc\n", 1237 __func__, __LINE__, fcport->port_name); 1238 data[0] = data[1] = 0; 1239 qla2x00_post_async_adisc_work(vha, fcport, data); 1240 break; 1241 1242 case DSC_LOGIN_PEND: 1243 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1244 qla24xx_post_prli_work(vha, fcport); 1245 break; 1246 1247 default: 1248 break; 1249 } 1250 1251 return 0; 1252 } 1253 1254 static 1255 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1256 { 1257 fcport->rscn_gen++; 1258 1259 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1260 "%s %8phC DS %d LS %d\n", 1261 __func__, fcport->port_name, fcport->disc_state, 1262 fcport->fw_login_state); 1263 1264 if (fcport->flags & FCF_ASYNC_SENT) 1265 return; 1266 1267 switch (fcport->disc_state) { 1268 case DSC_DELETED: 1269 case DSC_LOGIN_COMPLETE: 1270 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1271 break; 1272 default: 1273 break; 1274 } 1275 } 1276 1277 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1278 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1279 { 1280 struct qla_work_evt *e; 1281 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1282 if (!e) 1283 return QLA_FUNCTION_FAILED; 1284 1285 e->u.new_sess.id = *id; 1286 e->u.new_sess.pla = pla; 1287 e->u.new_sess.fc4_type = fc4_type; 1288 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1289 if (node_name) 1290 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1291 1292 return qla2x00_post_work(vha, e); 1293 } 1294 1295 static 1296 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1297 struct event_arg *ea) 1298 { 1299 fc_port_t *fcport = ea->fcport; 1300 1301 ql_dbg(ql_dbg_disc, vha, 0x2102, 1302 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1303 __func__, fcport->port_name, fcport->disc_state, 1304 fcport->fw_login_state, fcport->login_pause, 1305 fcport->deleted, fcport->conflict, 1306 fcport->last_rscn_gen, fcport->rscn_gen, 1307 fcport->last_login_gen, fcport->login_gen, 1308 fcport->flags); 1309 1310 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1311 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1312 return; 1313 1314 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1315 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1316 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1317 return; 1318 } 1319 } 1320 1321 if (fcport->flags & FCF_ASYNC_SENT) { 1322 fcport->login_retry++; 1323 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1324 return; 1325 } 1326 1327 if (fcport->disc_state == DSC_DELETE_PEND) { 1328 fcport->login_retry++; 1329 return; 1330 } 1331 1332 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1333 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1334 __func__, __LINE__, fcport->port_name); 1335 1336 qla24xx_post_gidpn_work(vha, fcport); 1337 return; 1338 } 1339 1340 qla24xx_fcport_handle_login(vha, fcport); 1341 } 1342 1343 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1344 { 1345 fc_port_t *f, *tf; 1346 uint32_t id = 0, mask, rid; 1347 unsigned long flags; 1348 1349 switch (ea->event) { 1350 case FCME_RSCN: 1351 case FCME_GIDPN_DONE: 1352 case FCME_GPSC_DONE: 1353 case FCME_GPNID_DONE: 1354 case FCME_GNNID_DONE: 1355 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) || 1356 test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags)) 1357 return; 1358 break; 1359 default: 1360 break; 1361 } 1362 1363 switch (ea->event) { 1364 case FCME_RELOGIN: 1365 if (test_bit(UNLOADING, &vha->dpc_flags)) 1366 return; 1367 1368 qla24xx_handle_relogin_event(vha, ea); 1369 break; 1370 case FCME_RSCN: 1371 if (test_bit(UNLOADING, &vha->dpc_flags)) 1372 return; 1373 switch (ea->id.b.rsvd_1) { 1374 case RSCN_PORT_ADDR: 1375 spin_lock_irqsave(&vha->work_lock, flags); 1376 if (vha->scan.scan_flags == 0) { 1377 ql_dbg(ql_dbg_disc, vha, 0xffff, 1378 "%s: schedule\n", __func__); 1379 vha->scan.scan_flags |= SF_QUEUED; 1380 schedule_delayed_work(&vha->scan.scan_work, 5); 1381 } 1382 spin_unlock_irqrestore(&vha->work_lock, flags); 1383 1384 break; 1385 case RSCN_AREA_ADDR: 1386 case RSCN_DOM_ADDR: 1387 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1388 mask = 0xffff00; 1389 ql_dbg(ql_dbg_async, vha, 0x5044, 1390 "RSCN: Area 0x%06x was affected\n", 1391 ea->id.b24); 1392 } else { 1393 mask = 0xff0000; 1394 ql_dbg(ql_dbg_async, vha, 0x507a, 1395 "RSCN: Domain 0x%06x was affected\n", 1396 ea->id.b24); 1397 } 1398 1399 rid = ea->id.b24 & mask; 1400 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1401 list) { 1402 id = f->d_id.b24 & mask; 1403 if (rid == id) { 1404 ea->fcport = f; 1405 qla24xx_handle_rscn_event(f, ea); 1406 } 1407 } 1408 break; 1409 case RSCN_FAB_ADDR: 1410 default: 1411 ql_log(ql_log_warn, vha, 0xd045, 1412 "RSCN: Fabric was affected. Addr format %d\n", 1413 ea->id.b.rsvd_1); 1414 qla2x00_mark_all_devices_lost(vha, 1); 1415 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1416 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1417 } 1418 break; 1419 case FCME_GIDPN_DONE: 1420 qla24xx_handle_gidpn_event(vha, ea); 1421 break; 1422 case FCME_GNL_DONE: 1423 qla24xx_handle_gnl_done_event(vha, ea); 1424 break; 1425 case FCME_GPSC_DONE: 1426 qla24xx_handle_gpsc_event(vha, ea); 1427 break; 1428 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1429 qla24xx_handle_plogi_done_event(vha, ea); 1430 break; 1431 case FCME_PRLI_DONE: 1432 qla24xx_handle_prli_done_event(vha, ea); 1433 break; 1434 case FCME_GPDB_DONE: 1435 qla24xx_handle_gpdb_event(vha, ea); 1436 break; 1437 case FCME_GPNID_DONE: 1438 qla24xx_handle_gpnid_event(vha, ea); 1439 break; 1440 case FCME_GFFID_DONE: 1441 qla24xx_handle_gffid_event(vha, ea); 1442 break; 1443 case FCME_ADISC_DONE: 1444 qla24xx_handle_adisc_event(vha, ea); 1445 break; 1446 case FCME_GNNID_DONE: 1447 qla24xx_handle_gnnid_event(vha, ea); 1448 break; 1449 case FCME_GFPNID_DONE: 1450 qla24xx_handle_gfpnid_event(vha, ea); 1451 break; 1452 default: 1453 BUG_ON(1); 1454 break; 1455 } 1456 } 1457 1458 static void 1459 qla2x00_tmf_iocb_timeout(void *data) 1460 { 1461 srb_t *sp = data; 1462 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1463 1464 tmf->u.tmf.comp_status = CS_TIMEOUT; 1465 complete(&tmf->u.tmf.comp); 1466 } 1467 1468 static void 1469 qla2x00_tmf_sp_done(void *ptr, int res) 1470 { 1471 srb_t *sp = ptr; 1472 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1473 1474 complete(&tmf->u.tmf.comp); 1475 } 1476 1477 int 1478 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1479 uint32_t tag) 1480 { 1481 struct scsi_qla_host *vha = fcport->vha; 1482 struct srb_iocb *tm_iocb; 1483 srb_t *sp; 1484 int rval = QLA_FUNCTION_FAILED; 1485 1486 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1487 if (!sp) 1488 goto done; 1489 1490 tm_iocb = &sp->u.iocb_cmd; 1491 sp->type = SRB_TM_CMD; 1492 sp->name = "tmf"; 1493 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1494 tm_iocb->u.tmf.flags = flags; 1495 tm_iocb->u.tmf.lun = lun; 1496 tm_iocb->u.tmf.data = tag; 1497 sp->done = qla2x00_tmf_sp_done; 1498 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1499 init_completion(&tm_iocb->u.tmf.comp); 1500 1501 rval = qla2x00_start_sp(sp); 1502 if (rval != QLA_SUCCESS) 1503 goto done_free_sp; 1504 1505 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1506 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1507 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1508 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1509 1510 wait_for_completion(&tm_iocb->u.tmf.comp); 1511 1512 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 1513 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1514 1515 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) { 1516 ql_dbg(ql_dbg_taskm, vha, 0x8030, 1517 "TM IOCB failed (%x).\n", rval); 1518 } 1519 1520 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1521 flags = tm_iocb->u.tmf.flags; 1522 lun = (uint16_t)tm_iocb->u.tmf.lun; 1523 1524 /* Issue Marker IOCB */ 1525 qla2x00_marker(vha, vha->hw->req_q_map[0], 1526 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1527 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1528 } 1529 1530 done_free_sp: 1531 sp->free(sp); 1532 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1533 done: 1534 return rval; 1535 } 1536 1537 static void 1538 qla24xx_abort_iocb_timeout(void *data) 1539 { 1540 srb_t *sp = data; 1541 struct srb_iocb *abt = &sp->u.iocb_cmd; 1542 1543 abt->u.abt.comp_status = CS_TIMEOUT; 1544 complete(&abt->u.abt.comp); 1545 } 1546 1547 static void 1548 qla24xx_abort_sp_done(void *ptr, int res) 1549 { 1550 srb_t *sp = ptr; 1551 struct srb_iocb *abt = &sp->u.iocb_cmd; 1552 1553 del_timer(&sp->u.iocb_cmd.timer); 1554 complete(&abt->u.abt.comp); 1555 } 1556 1557 int 1558 qla24xx_async_abort_cmd(srb_t *cmd_sp) 1559 { 1560 scsi_qla_host_t *vha = cmd_sp->vha; 1561 fc_port_t *fcport = cmd_sp->fcport; 1562 struct srb_iocb *abt_iocb; 1563 srb_t *sp; 1564 int rval = QLA_FUNCTION_FAILED; 1565 1566 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1567 if (!sp) 1568 goto done; 1569 1570 abt_iocb = &sp->u.iocb_cmd; 1571 sp->type = SRB_ABT_CMD; 1572 sp->name = "abort"; 1573 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1574 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1575 1576 if (vha->flags.qpairs_available && cmd_sp->qpair) 1577 abt_iocb->u.abt.req_que_no = 1578 cpu_to_le16(cmd_sp->qpair->req->id); 1579 else 1580 abt_iocb->u.abt.req_que_no = cpu_to_le16(vha->req->id); 1581 1582 sp->done = qla24xx_abort_sp_done; 1583 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1584 init_completion(&abt_iocb->u.abt.comp); 1585 1586 rval = qla2x00_start_sp(sp); 1587 if (rval != QLA_SUCCESS) 1588 goto done_free_sp; 1589 1590 ql_dbg(ql_dbg_async, vha, 0x507c, 1591 "Abort command issued - hdl=%x, target_id=%x\n", 1592 cmd_sp->handle, fcport->tgt_id); 1593 1594 wait_for_completion(&abt_iocb->u.abt.comp); 1595 1596 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1597 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1598 1599 done_free_sp: 1600 sp->free(sp); 1601 done: 1602 return rval; 1603 } 1604 1605 int 1606 qla24xx_async_abort_command(srb_t *sp) 1607 { 1608 unsigned long flags = 0; 1609 1610 uint32_t handle; 1611 fc_port_t *fcport = sp->fcport; 1612 struct scsi_qla_host *vha = fcport->vha; 1613 struct qla_hw_data *ha = vha->hw; 1614 struct req_que *req = vha->req; 1615 1616 if (vha->flags.qpairs_available && sp->qpair) 1617 req = sp->qpair->req; 1618 1619 spin_lock_irqsave(&ha->hardware_lock, flags); 1620 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1621 if (req->outstanding_cmds[handle] == sp) 1622 break; 1623 } 1624 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1625 if (handle == req->num_outstanding_cmds) { 1626 /* Command not found. */ 1627 return QLA_FUNCTION_FAILED; 1628 } 1629 if (sp->type == SRB_FXIOCB_DCMD) 1630 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1631 FXDISC_ABORT_IOCTL); 1632 1633 return qla24xx_async_abort_cmd(sp); 1634 } 1635 1636 static void 1637 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1638 { 1639 switch (ea->data[0]) { 1640 case MBS_COMMAND_COMPLETE: 1641 ql_dbg(ql_dbg_disc, vha, 0x2118, 1642 "%s %d %8phC post gpdb\n", 1643 __func__, __LINE__, ea->fcport->port_name); 1644 1645 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1646 ea->fcport->logout_on_delete = 1; 1647 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1648 break; 1649 default: 1650 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1651 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1652 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1653 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1654 break; 1655 } 1656 1657 if (ea->fcport->n2n_flag) { 1658 ql_dbg(ql_dbg_disc, vha, 0x2118, 1659 "%s %d %8phC post fc4 prli\n", 1660 __func__, __LINE__, ea->fcport->port_name); 1661 ea->fcport->fc4f_nvme = 0; 1662 ea->fcport->n2n_flag = 0; 1663 qla24xx_post_prli_work(vha, ea->fcport); 1664 } 1665 ql_dbg(ql_dbg_disc, vha, 0x2119, 1666 "%s %d %8phC unhandle event of %x\n", 1667 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1668 break; 1669 } 1670 } 1671 1672 static void 1673 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1674 { 1675 port_id_t cid; /* conflict Nport id */ 1676 u16 lid; 1677 struct fc_port *conflict_fcport; 1678 unsigned long flags; 1679 struct fc_port *fcport = ea->fcport; 1680 1681 ql_dbg(ql_dbg_disc, vha, 0xffff, 1682 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1683 __func__, fcport->port_name, fcport->disc_state, 1684 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1685 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1, 1686 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1687 1688 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1689 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1690 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1691 "%s %d %8phC Remote is trying to login\n", 1692 __func__, __LINE__, fcport->port_name); 1693 return; 1694 } 1695 1696 if (fcport->disc_state == DSC_DELETE_PEND) 1697 return; 1698 1699 if (ea->sp->gen2 != fcport->login_gen) { 1700 /* target side must have changed it. */ 1701 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1702 "%s %8phC generation changed\n", 1703 __func__, fcport->port_name); 1704 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1705 return; 1706 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1707 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 1708 __func__, __LINE__, fcport->port_name); 1709 qla24xx_post_gidpn_work(vha, fcport); 1710 return; 1711 } 1712 1713 switch (ea->data[0]) { 1714 case MBS_COMMAND_COMPLETE: 1715 /* 1716 * Driver must validate login state - If PRLI not complete, 1717 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1718 * requests. 1719 */ 1720 if (ea->fcport->fc4f_nvme) { 1721 ql_dbg(ql_dbg_disc, vha, 0x2117, 1722 "%s %d %8phC post prli\n", 1723 __func__, __LINE__, ea->fcport->port_name); 1724 qla24xx_post_prli_work(vha, ea->fcport); 1725 } else { 1726 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1727 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1728 __func__, __LINE__, ea->fcport->port_name, 1729 ea->fcport->loop_id, ea->fcport->d_id.b24); 1730 1731 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1732 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1733 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1734 ea->fcport->logout_on_delete = 1; 1735 ea->fcport->send_els_logo = 0; 1736 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1737 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1738 1739 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1740 } 1741 break; 1742 case MBS_COMMAND_ERROR: 1743 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1744 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1745 1746 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1747 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1748 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1749 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1750 else 1751 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1752 break; 1753 case MBS_LOOP_ID_USED: 1754 /* data[1] = IO PARAM 1 = nport ID */ 1755 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1756 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1757 cid.b.al_pa = ea->iop[1] & 0xff; 1758 cid.b.rsvd_1 = 0; 1759 1760 ql_dbg(ql_dbg_disc, vha, 0x20ec, 1761 "%s %d %8phC LoopID 0x%x in use post gnl\n", 1762 __func__, __LINE__, ea->fcport->port_name, 1763 ea->fcport->loop_id); 1764 1765 if (IS_SW_RESV_ADDR(cid)) { 1766 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1767 ea->fcport->loop_id = FC_NO_LOOP_ID; 1768 } else { 1769 qla2x00_clear_loop_id(ea->fcport); 1770 } 1771 qla24xx_post_gnl_work(vha, ea->fcport); 1772 break; 1773 case MBS_PORT_ID_USED: 1774 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1775 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n", 1776 __func__, __LINE__, ea->fcport->port_name, 1777 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area, 1778 ea->fcport->d_id.b.al_pa); 1779 1780 lid = ea->iop[1] & 0xffff; 1781 qlt_find_sess_invalidate_other(vha, 1782 wwn_to_u64(ea->fcport->port_name), 1783 ea->fcport->d_id, lid, &conflict_fcport); 1784 1785 if (conflict_fcport) { 1786 /* 1787 * Another fcport share the same loop_id/nport id. 1788 * Conflict fcport needs to finish cleanup before this 1789 * fcport can proceed to login. 1790 */ 1791 conflict_fcport->conflict = ea->fcport; 1792 ea->fcport->login_pause = 1; 1793 1794 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1795 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 1796 __func__, __LINE__, ea->fcport->port_name, 1797 ea->fcport->d_id.b24, lid); 1798 qla2x00_clear_loop_id(ea->fcport); 1799 qla24xx_post_gidpn_work(vha, ea->fcport); 1800 } else { 1801 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1802 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 1803 __func__, __LINE__, ea->fcport->port_name, 1804 ea->fcport->d_id.b24, lid); 1805 1806 qla2x00_clear_loop_id(ea->fcport); 1807 set_bit(lid, vha->hw->loop_id_map); 1808 ea->fcport->loop_id = lid; 1809 ea->fcport->keep_nport_handle = 0; 1810 qlt_schedule_sess_for_deletion(ea->fcport); 1811 } 1812 break; 1813 } 1814 return; 1815 } 1816 1817 void 1818 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1819 uint16_t *data) 1820 { 1821 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1822 qlt_logo_completion_handler(fcport, data[0]); 1823 fcport->login_gen++; 1824 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1825 return; 1826 } 1827 1828 void 1829 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1830 uint16_t *data) 1831 { 1832 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1833 if (data[0] == MBS_COMMAND_COMPLETE) { 1834 qla2x00_update_fcport(vha, fcport); 1835 1836 return; 1837 } 1838 1839 /* Retry login. */ 1840 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 1841 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1842 else 1843 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1844 1845 return; 1846 } 1847 1848 /****************************************************************************/ 1849 /* QLogic ISP2x00 Hardware Support Functions. */ 1850 /****************************************************************************/ 1851 1852 static int 1853 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 1854 { 1855 int rval = QLA_SUCCESS; 1856 struct qla_hw_data *ha = vha->hw; 1857 uint32_t idc_major_ver, idc_minor_ver; 1858 uint16_t config[4]; 1859 1860 qla83xx_idc_lock(vha, 0); 1861 1862 /* SV: TODO: Assign initialization timeout from 1863 * flash-info / other param 1864 */ 1865 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 1866 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 1867 1868 /* Set our fcoe function presence */ 1869 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 1870 ql_dbg(ql_dbg_p3p, vha, 0xb077, 1871 "Error while setting DRV-Presence.\n"); 1872 rval = QLA_FUNCTION_FAILED; 1873 goto exit; 1874 } 1875 1876 /* Decide the reset ownership */ 1877 qla83xx_reset_ownership(vha); 1878 1879 /* 1880 * On first protocol driver load: 1881 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 1882 * register. 1883 * Others: Check compatibility with current IDC Major version. 1884 */ 1885 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 1886 if (ha->flags.nic_core_reset_owner) { 1887 /* Set IDC Major version */ 1888 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 1889 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 1890 1891 /* Clearing IDC-Lock-Recovery register */ 1892 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 1893 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 1894 /* 1895 * Clear further IDC participation if we are not compatible with 1896 * the current IDC Major Version. 1897 */ 1898 ql_log(ql_log_warn, vha, 0xb07d, 1899 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 1900 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 1901 __qla83xx_clear_drv_presence(vha); 1902 rval = QLA_FUNCTION_FAILED; 1903 goto exit; 1904 } 1905 /* Each function sets its supported Minor version. */ 1906 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 1907 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 1908 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 1909 1910 if (ha->flags.nic_core_reset_owner) { 1911 memset(config, 0, sizeof(config)); 1912 if (!qla81xx_get_port_config(vha, config)) 1913 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 1914 QLA8XXX_DEV_READY); 1915 } 1916 1917 rval = qla83xx_idc_state_handler(vha); 1918 1919 exit: 1920 qla83xx_idc_unlock(vha, 0); 1921 1922 return rval; 1923 } 1924 1925 /* 1926 * qla2x00_initialize_adapter 1927 * Initialize board. 1928 * 1929 * Input: 1930 * ha = adapter block pointer. 1931 * 1932 * Returns: 1933 * 0 = success 1934 */ 1935 int 1936 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 1937 { 1938 int rval; 1939 struct qla_hw_data *ha = vha->hw; 1940 struct req_que *req = ha->req_q_map[0]; 1941 1942 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 1943 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 1944 1945 /* Clear adapter flags. */ 1946 vha->flags.online = 0; 1947 ha->flags.chip_reset_done = 0; 1948 vha->flags.reset_active = 0; 1949 ha->flags.pci_channel_io_perm_failure = 0; 1950 ha->flags.eeh_busy = 0; 1951 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 1952 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1953 atomic_set(&vha->loop_state, LOOP_DOWN); 1954 vha->device_flags = DFLG_NO_CABLE; 1955 vha->dpc_flags = 0; 1956 vha->flags.management_server_logged_in = 0; 1957 vha->marker_needed = 0; 1958 ha->isp_abort_cnt = 0; 1959 ha->beacon_blink_led = 0; 1960 1961 set_bit(0, ha->req_qid_map); 1962 set_bit(0, ha->rsp_qid_map); 1963 1964 ql_dbg(ql_dbg_init, vha, 0x0040, 1965 "Configuring PCI space...\n"); 1966 rval = ha->isp_ops->pci_config(vha); 1967 if (rval) { 1968 ql_log(ql_log_warn, vha, 0x0044, 1969 "Unable to configure PCI space.\n"); 1970 return (rval); 1971 } 1972 1973 ha->isp_ops->reset_chip(vha); 1974 1975 rval = qla2xxx_get_flash_info(vha); 1976 if (rval) { 1977 ql_log(ql_log_fatal, vha, 0x004f, 1978 "Unable to validate FLASH data.\n"); 1979 return rval; 1980 } 1981 1982 if (IS_QLA8044(ha)) { 1983 qla8044_read_reset_template(vha); 1984 1985 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 1986 * If DONRESET_BIT0 is set, drivers should not set dev_state 1987 * to NEED_RESET. But if NEED_RESET is set, drivers should 1988 * should honor the reset. */ 1989 if (ql2xdontresethba == 1) 1990 qla8044_set_idc_dontreset(vha); 1991 } 1992 1993 ha->isp_ops->get_flash_version(vha, req->ring); 1994 ql_dbg(ql_dbg_init, vha, 0x0061, 1995 "Configure NVRAM parameters...\n"); 1996 1997 ha->isp_ops->nvram_config(vha); 1998 1999 if (ha->flags.disable_serdes) { 2000 /* Mask HBA via NVRAM settings? */ 2001 ql_log(ql_log_info, vha, 0x0077, 2002 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2003 return QLA_FUNCTION_FAILED; 2004 } 2005 2006 ql_dbg(ql_dbg_init, vha, 0x0078, 2007 "Verifying loaded RISC code...\n"); 2008 2009 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2010 rval = ha->isp_ops->chip_diag(vha); 2011 if (rval) 2012 return (rval); 2013 rval = qla2x00_setup_chip(vha); 2014 if (rval) 2015 return (rval); 2016 } 2017 2018 if (IS_QLA84XX(ha)) { 2019 ha->cs84xx = qla84xx_get_chip(vha); 2020 if (!ha->cs84xx) { 2021 ql_log(ql_log_warn, vha, 0x00d0, 2022 "Unable to configure ISP84XX.\n"); 2023 return QLA_FUNCTION_FAILED; 2024 } 2025 } 2026 2027 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2028 rval = qla2x00_init_rings(vha); 2029 2030 ha->flags.chip_reset_done = 1; 2031 2032 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2033 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2034 rval = qla84xx_init_chip(vha); 2035 if (rval != QLA_SUCCESS) { 2036 ql_log(ql_log_warn, vha, 0x00d4, 2037 "Unable to initialize ISP84XX.\n"); 2038 qla84xx_put_chip(vha); 2039 } 2040 } 2041 2042 /* Load the NIC Core f/w if we are the first protocol driver. */ 2043 if (IS_QLA8031(ha)) { 2044 rval = qla83xx_nic_core_fw_load(vha); 2045 if (rval) 2046 ql_log(ql_log_warn, vha, 0x0124, 2047 "Error in initializing NIC Core f/w.\n"); 2048 } 2049 2050 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2051 qla24xx_read_fcp_prio_cfg(vha); 2052 2053 if (IS_P3P_TYPE(ha)) 2054 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2055 else 2056 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2057 2058 return (rval); 2059 } 2060 2061 /** 2062 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2063 * @vha: HA context 2064 * 2065 * Returns 0 on success. 2066 */ 2067 int 2068 qla2100_pci_config(scsi_qla_host_t *vha) 2069 { 2070 uint16_t w; 2071 unsigned long flags; 2072 struct qla_hw_data *ha = vha->hw; 2073 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2074 2075 pci_set_master(ha->pdev); 2076 pci_try_set_mwi(ha->pdev); 2077 2078 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2079 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2080 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2081 2082 pci_disable_rom(ha->pdev); 2083 2084 /* Get PCI bus information. */ 2085 spin_lock_irqsave(&ha->hardware_lock, flags); 2086 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2087 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2088 2089 return QLA_SUCCESS; 2090 } 2091 2092 /** 2093 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2094 * @vha: HA context 2095 * 2096 * Returns 0 on success. 2097 */ 2098 int 2099 qla2300_pci_config(scsi_qla_host_t *vha) 2100 { 2101 uint16_t w; 2102 unsigned long flags = 0; 2103 uint32_t cnt; 2104 struct qla_hw_data *ha = vha->hw; 2105 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2106 2107 pci_set_master(ha->pdev); 2108 pci_try_set_mwi(ha->pdev); 2109 2110 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2111 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2112 2113 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2114 w &= ~PCI_COMMAND_INTX_DISABLE; 2115 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2116 2117 /* 2118 * If this is a 2300 card and not 2312, reset the 2119 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2120 * the 2310 also reports itself as a 2300 so we need to get the 2121 * fb revision level -- a 6 indicates it really is a 2300 and 2122 * not a 2310. 2123 */ 2124 if (IS_QLA2300(ha)) { 2125 spin_lock_irqsave(&ha->hardware_lock, flags); 2126 2127 /* Pause RISC. */ 2128 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2129 for (cnt = 0; cnt < 30000; cnt++) { 2130 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2131 break; 2132 2133 udelay(10); 2134 } 2135 2136 /* Select FPM registers. */ 2137 WRT_REG_WORD(®->ctrl_status, 0x20); 2138 RD_REG_WORD(®->ctrl_status); 2139 2140 /* Get the fb rev level */ 2141 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2142 2143 if (ha->fb_rev == FPM_2300) 2144 pci_clear_mwi(ha->pdev); 2145 2146 /* Deselect FPM registers. */ 2147 WRT_REG_WORD(®->ctrl_status, 0x0); 2148 RD_REG_WORD(®->ctrl_status); 2149 2150 /* Release RISC module. */ 2151 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2152 for (cnt = 0; cnt < 30000; cnt++) { 2153 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2154 break; 2155 2156 udelay(10); 2157 } 2158 2159 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2160 } 2161 2162 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2163 2164 pci_disable_rom(ha->pdev); 2165 2166 /* Get PCI bus information. */ 2167 spin_lock_irqsave(&ha->hardware_lock, flags); 2168 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2169 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2170 2171 return QLA_SUCCESS; 2172 } 2173 2174 /** 2175 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2176 * @vha: HA context 2177 * 2178 * Returns 0 on success. 2179 */ 2180 int 2181 qla24xx_pci_config(scsi_qla_host_t *vha) 2182 { 2183 uint16_t w; 2184 unsigned long flags = 0; 2185 struct qla_hw_data *ha = vha->hw; 2186 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2187 2188 pci_set_master(ha->pdev); 2189 pci_try_set_mwi(ha->pdev); 2190 2191 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2192 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2193 w &= ~PCI_COMMAND_INTX_DISABLE; 2194 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2195 2196 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2197 2198 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2199 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2200 pcix_set_mmrbc(ha->pdev, 2048); 2201 2202 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2203 if (pci_is_pcie(ha->pdev)) 2204 pcie_set_readrq(ha->pdev, 4096); 2205 2206 pci_disable_rom(ha->pdev); 2207 2208 ha->chip_revision = ha->pdev->revision; 2209 2210 /* Get PCI bus information. */ 2211 spin_lock_irqsave(&ha->hardware_lock, flags); 2212 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2213 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2214 2215 return QLA_SUCCESS; 2216 } 2217 2218 /** 2219 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2220 * @vha: HA context 2221 * 2222 * Returns 0 on success. 2223 */ 2224 int 2225 qla25xx_pci_config(scsi_qla_host_t *vha) 2226 { 2227 uint16_t w; 2228 struct qla_hw_data *ha = vha->hw; 2229 2230 pci_set_master(ha->pdev); 2231 pci_try_set_mwi(ha->pdev); 2232 2233 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2234 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2235 w &= ~PCI_COMMAND_INTX_DISABLE; 2236 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2237 2238 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2239 if (pci_is_pcie(ha->pdev)) 2240 pcie_set_readrq(ha->pdev, 4096); 2241 2242 pci_disable_rom(ha->pdev); 2243 2244 ha->chip_revision = ha->pdev->revision; 2245 2246 return QLA_SUCCESS; 2247 } 2248 2249 /** 2250 * qla2x00_isp_firmware() - Choose firmware image. 2251 * @vha: HA context 2252 * 2253 * Returns 0 on success. 2254 */ 2255 static int 2256 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2257 { 2258 int rval; 2259 uint16_t loop_id, topo, sw_cap; 2260 uint8_t domain, area, al_pa; 2261 struct qla_hw_data *ha = vha->hw; 2262 2263 /* Assume loading risc code */ 2264 rval = QLA_FUNCTION_FAILED; 2265 2266 if (ha->flags.disable_risc_code_load) { 2267 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2268 2269 /* Verify checksum of loaded RISC code. */ 2270 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2271 if (rval == QLA_SUCCESS) { 2272 /* And, verify we are not in ROM code. */ 2273 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2274 &area, &domain, &topo, &sw_cap); 2275 } 2276 } 2277 2278 if (rval) 2279 ql_dbg(ql_dbg_init, vha, 0x007a, 2280 "**** Load RISC code ****.\n"); 2281 2282 return (rval); 2283 } 2284 2285 /** 2286 * qla2x00_reset_chip() - Reset ISP chip. 2287 * @vha: HA context 2288 * 2289 * Returns 0 on success. 2290 */ 2291 void 2292 qla2x00_reset_chip(scsi_qla_host_t *vha) 2293 { 2294 unsigned long flags = 0; 2295 struct qla_hw_data *ha = vha->hw; 2296 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2297 uint32_t cnt; 2298 uint16_t cmd; 2299 2300 if (unlikely(pci_channel_offline(ha->pdev))) 2301 return; 2302 2303 ha->isp_ops->disable_intrs(ha); 2304 2305 spin_lock_irqsave(&ha->hardware_lock, flags); 2306 2307 /* Turn off master enable */ 2308 cmd = 0; 2309 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2310 cmd &= ~PCI_COMMAND_MASTER; 2311 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2312 2313 if (!IS_QLA2100(ha)) { 2314 /* Pause RISC. */ 2315 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2316 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2317 for (cnt = 0; cnt < 30000; cnt++) { 2318 if ((RD_REG_WORD(®->hccr) & 2319 HCCR_RISC_PAUSE) != 0) 2320 break; 2321 udelay(100); 2322 } 2323 } else { 2324 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2325 udelay(10); 2326 } 2327 2328 /* Select FPM registers. */ 2329 WRT_REG_WORD(®->ctrl_status, 0x20); 2330 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2331 2332 /* FPM Soft Reset. */ 2333 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2334 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2335 2336 /* Toggle Fpm Reset. */ 2337 if (!IS_QLA2200(ha)) { 2338 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2339 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2340 } 2341 2342 /* Select frame buffer registers. */ 2343 WRT_REG_WORD(®->ctrl_status, 0x10); 2344 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2345 2346 /* Reset frame buffer FIFOs. */ 2347 if (IS_QLA2200(ha)) { 2348 WRT_FB_CMD_REG(ha, reg, 0xa000); 2349 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2350 } else { 2351 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2352 2353 /* Read back fb_cmd until zero or 3 seconds max */ 2354 for (cnt = 0; cnt < 3000; cnt++) { 2355 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2356 break; 2357 udelay(100); 2358 } 2359 } 2360 2361 /* Select RISC module registers. */ 2362 WRT_REG_WORD(®->ctrl_status, 0); 2363 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2364 2365 /* Reset RISC processor. */ 2366 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2367 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2368 2369 /* Release RISC processor. */ 2370 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2371 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2372 } 2373 2374 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2375 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2376 2377 /* Reset ISP chip. */ 2378 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2379 2380 /* Wait for RISC to recover from reset. */ 2381 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2382 /* 2383 * It is necessary to for a delay here since the card doesn't 2384 * respond to PCI reads during a reset. On some architectures 2385 * this will result in an MCA. 2386 */ 2387 udelay(20); 2388 for (cnt = 30000; cnt; cnt--) { 2389 if ((RD_REG_WORD(®->ctrl_status) & 2390 CSR_ISP_SOFT_RESET) == 0) 2391 break; 2392 udelay(100); 2393 } 2394 } else 2395 udelay(10); 2396 2397 /* Reset RISC processor. */ 2398 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2399 2400 WRT_REG_WORD(®->semaphore, 0); 2401 2402 /* Release RISC processor. */ 2403 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2404 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2405 2406 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2407 for (cnt = 0; cnt < 30000; cnt++) { 2408 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2409 break; 2410 2411 udelay(100); 2412 } 2413 } else 2414 udelay(100); 2415 2416 /* Turn on master enable */ 2417 cmd |= PCI_COMMAND_MASTER; 2418 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2419 2420 /* Disable RISC pause on FPM parity error. */ 2421 if (!IS_QLA2100(ha)) { 2422 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2423 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2424 } 2425 2426 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2427 } 2428 2429 /** 2430 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2431 * @vha: HA context 2432 * 2433 * Returns 0 on success. 2434 */ 2435 static int 2436 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2437 { 2438 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2439 2440 if (!IS_QLA81XX(vha->hw)) 2441 return QLA_SUCCESS; 2442 2443 return qla81xx_write_mpi_register(vha, mb); 2444 } 2445 2446 /** 2447 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2448 * @vha: HA context 2449 * 2450 * Returns 0 on success. 2451 */ 2452 static inline int 2453 qla24xx_reset_risc(scsi_qla_host_t *vha) 2454 { 2455 unsigned long flags = 0; 2456 struct qla_hw_data *ha = vha->hw; 2457 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2458 uint32_t cnt; 2459 uint16_t wd; 2460 static int abts_cnt; /* ISP abort retry counts */ 2461 int rval = QLA_SUCCESS; 2462 2463 spin_lock_irqsave(&ha->hardware_lock, flags); 2464 2465 /* Reset RISC. */ 2466 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2467 for (cnt = 0; cnt < 30000; cnt++) { 2468 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2469 break; 2470 2471 udelay(10); 2472 } 2473 2474 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2475 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2476 2477 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2478 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2479 RD_REG_DWORD(®->hccr), 2480 RD_REG_DWORD(®->ctrl_status), 2481 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2482 2483 WRT_REG_DWORD(®->ctrl_status, 2484 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2485 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2486 2487 udelay(100); 2488 2489 /* Wait for firmware to complete NVRAM accesses. */ 2490 RD_REG_WORD(®->mailbox0); 2491 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2492 rval == QLA_SUCCESS; cnt--) { 2493 barrier(); 2494 if (cnt) 2495 udelay(5); 2496 else 2497 rval = QLA_FUNCTION_TIMEOUT; 2498 } 2499 2500 if (rval == QLA_SUCCESS) 2501 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2502 2503 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2504 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2505 RD_REG_DWORD(®->hccr), 2506 RD_REG_DWORD(®->mailbox0)); 2507 2508 /* Wait for soft-reset to complete. */ 2509 RD_REG_DWORD(®->ctrl_status); 2510 for (cnt = 0; cnt < 60; cnt++) { 2511 barrier(); 2512 if ((RD_REG_DWORD(®->ctrl_status) & 2513 CSRX_ISP_SOFT_RESET) == 0) 2514 break; 2515 2516 udelay(5); 2517 } 2518 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2519 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2520 2521 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2522 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2523 RD_REG_DWORD(®->hccr), 2524 RD_REG_DWORD(®->ctrl_status)); 2525 2526 /* If required, do an MPI FW reset now */ 2527 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2528 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2529 if (++abts_cnt < 5) { 2530 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2531 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2532 } else { 2533 /* 2534 * We exhausted the ISP abort retries. We have to 2535 * set the board offline. 2536 */ 2537 abts_cnt = 0; 2538 vha->flags.online = 0; 2539 } 2540 } 2541 } 2542 2543 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2544 RD_REG_DWORD(®->hccr); 2545 2546 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2547 RD_REG_DWORD(®->hccr); 2548 2549 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2550 RD_REG_DWORD(®->hccr); 2551 2552 RD_REG_WORD(®->mailbox0); 2553 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2554 rval == QLA_SUCCESS; cnt--) { 2555 barrier(); 2556 if (cnt) 2557 udelay(5); 2558 else 2559 rval = QLA_FUNCTION_TIMEOUT; 2560 } 2561 if (rval == QLA_SUCCESS) 2562 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2563 2564 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2565 "Host Risc 0x%x, mailbox0 0x%x\n", 2566 RD_REG_DWORD(®->hccr), 2567 RD_REG_WORD(®->mailbox0)); 2568 2569 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2570 2571 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2572 "Driver in %s mode\n", 2573 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2574 2575 if (IS_NOPOLLING_TYPE(ha)) 2576 ha->isp_ops->enable_intrs(ha); 2577 2578 return rval; 2579 } 2580 2581 static void 2582 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2583 { 2584 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2585 2586 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2587 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2588 2589 } 2590 2591 static void 2592 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2593 { 2594 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2595 2596 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2597 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2598 } 2599 2600 static void 2601 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2602 { 2603 uint32_t wd32 = 0; 2604 uint delta_msec = 100; 2605 uint elapsed_msec = 0; 2606 uint timeout_msec; 2607 ulong n; 2608 2609 if (vha->hw->pdev->subsystem_device != 0x0175 && 2610 vha->hw->pdev->subsystem_device != 0x0240) 2611 return; 2612 2613 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2614 udelay(100); 2615 2616 attempt: 2617 timeout_msec = TIMEOUT_SEMAPHORE; 2618 n = timeout_msec / delta_msec; 2619 while (n--) { 2620 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2621 qla25xx_read_risc_sema_reg(vha, &wd32); 2622 if (wd32 & RISC_SEMAPHORE) 2623 break; 2624 msleep(delta_msec); 2625 elapsed_msec += delta_msec; 2626 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2627 goto force; 2628 } 2629 2630 if (!(wd32 & RISC_SEMAPHORE)) 2631 goto force; 2632 2633 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2634 goto acquired; 2635 2636 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2637 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2638 n = timeout_msec / delta_msec; 2639 while (n--) { 2640 qla25xx_read_risc_sema_reg(vha, &wd32); 2641 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2642 break; 2643 msleep(delta_msec); 2644 elapsed_msec += delta_msec; 2645 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2646 goto force; 2647 } 2648 2649 if (wd32 & RISC_SEMAPHORE_FORCE) 2650 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2651 2652 goto attempt; 2653 2654 force: 2655 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2656 2657 acquired: 2658 return; 2659 } 2660 2661 /** 2662 * qla24xx_reset_chip() - Reset ISP24xx chip. 2663 * @vha: HA context 2664 * 2665 * Returns 0 on success. 2666 */ 2667 void 2668 qla24xx_reset_chip(scsi_qla_host_t *vha) 2669 { 2670 struct qla_hw_data *ha = vha->hw; 2671 2672 if (pci_channel_offline(ha->pdev) && 2673 ha->flags.pci_channel_io_perm_failure) { 2674 return; 2675 } 2676 2677 ha->isp_ops->disable_intrs(ha); 2678 2679 qla25xx_manipulate_risc_semaphore(vha); 2680 2681 /* Perform RISC reset. */ 2682 qla24xx_reset_risc(vha); 2683 } 2684 2685 /** 2686 * qla2x00_chip_diag() - Test chip for proper operation. 2687 * @vha: HA context 2688 * 2689 * Returns 0 on success. 2690 */ 2691 int 2692 qla2x00_chip_diag(scsi_qla_host_t *vha) 2693 { 2694 int rval; 2695 struct qla_hw_data *ha = vha->hw; 2696 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2697 unsigned long flags = 0; 2698 uint16_t data; 2699 uint32_t cnt; 2700 uint16_t mb[5]; 2701 struct req_que *req = ha->req_q_map[0]; 2702 2703 /* Assume a failed state */ 2704 rval = QLA_FUNCTION_FAILED; 2705 2706 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2707 ®->flash_address); 2708 2709 spin_lock_irqsave(&ha->hardware_lock, flags); 2710 2711 /* Reset ISP chip. */ 2712 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2713 2714 /* 2715 * We need to have a delay here since the card will not respond while 2716 * in reset causing an MCA on some architectures. 2717 */ 2718 udelay(20); 2719 data = qla2x00_debounce_register(®->ctrl_status); 2720 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2721 udelay(5); 2722 data = RD_REG_WORD(®->ctrl_status); 2723 barrier(); 2724 } 2725 2726 if (!cnt) 2727 goto chip_diag_failed; 2728 2729 ql_dbg(ql_dbg_init, vha, 0x007c, 2730 "Reset register cleared by chip reset.\n"); 2731 2732 /* Reset RISC processor. */ 2733 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2734 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2735 2736 /* Workaround for QLA2312 PCI parity error */ 2737 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2738 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2739 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2740 udelay(5); 2741 data = RD_MAILBOX_REG(ha, reg, 0); 2742 barrier(); 2743 } 2744 } else 2745 udelay(10); 2746 2747 if (!cnt) 2748 goto chip_diag_failed; 2749 2750 /* Check product ID of chip */ 2751 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2752 2753 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2754 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2755 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2756 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2757 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2758 mb[3] != PROD_ID_3) { 2759 ql_log(ql_log_warn, vha, 0x0062, 2760 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2761 mb[1], mb[2], mb[3]); 2762 2763 goto chip_diag_failed; 2764 } 2765 ha->product_id[0] = mb[1]; 2766 ha->product_id[1] = mb[2]; 2767 ha->product_id[2] = mb[3]; 2768 ha->product_id[3] = mb[4]; 2769 2770 /* Adjust fw RISC transfer size */ 2771 if (req->length > 1024) 2772 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2773 else 2774 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2775 req->length; 2776 2777 if (IS_QLA2200(ha) && 2778 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2779 /* Limit firmware transfer size with a 2200A */ 2780 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2781 2782 ha->device_type |= DT_ISP2200A; 2783 ha->fw_transfer_size = 128; 2784 } 2785 2786 /* Wrap Incoming Mailboxes Test. */ 2787 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2788 2789 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2790 rval = qla2x00_mbx_reg_test(vha); 2791 if (rval) 2792 ql_log(ql_log_warn, vha, 0x0080, 2793 "Failed mailbox send register test.\n"); 2794 else 2795 /* Flag a successful rval */ 2796 rval = QLA_SUCCESS; 2797 spin_lock_irqsave(&ha->hardware_lock, flags); 2798 2799 chip_diag_failed: 2800 if (rval) 2801 ql_log(ql_log_info, vha, 0x0081, 2802 "Chip diagnostics **** FAILED ****.\n"); 2803 2804 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2805 2806 return (rval); 2807 } 2808 2809 /** 2810 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 2811 * @vha: HA context 2812 * 2813 * Returns 0 on success. 2814 */ 2815 int 2816 qla24xx_chip_diag(scsi_qla_host_t *vha) 2817 { 2818 int rval; 2819 struct qla_hw_data *ha = vha->hw; 2820 struct req_que *req = ha->req_q_map[0]; 2821 2822 if (IS_P3P_TYPE(ha)) 2823 return QLA_SUCCESS; 2824 2825 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 2826 2827 rval = qla2x00_mbx_reg_test(vha); 2828 if (rval) { 2829 ql_log(ql_log_warn, vha, 0x0082, 2830 "Failed mailbox send register test.\n"); 2831 } else { 2832 /* Flag a successful rval */ 2833 rval = QLA_SUCCESS; 2834 } 2835 2836 return rval; 2837 } 2838 2839 static void 2840 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 2841 { 2842 int rval; 2843 dma_addr_t tc_dma; 2844 void *tc; 2845 struct qla_hw_data *ha = vha->hw; 2846 2847 if (ha->eft) { 2848 ql_dbg(ql_dbg_init, vha, 0x00bd, 2849 "%s: Offload Mem is already allocated.\n", 2850 __func__); 2851 return; 2852 } 2853 2854 if (IS_FWI2_CAPABLE(ha)) { 2855 /* Allocate memory for Fibre Channel Event Buffer. */ 2856 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2857 !IS_QLA27XX(ha)) 2858 goto try_eft; 2859 2860 if (ha->fce) 2861 dma_free_coherent(&ha->pdev->dev, 2862 FCE_SIZE, ha->fce, ha->fce_dma); 2863 2864 /* Allocate memory for Fibre Channel Event Buffer. */ 2865 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 2866 GFP_KERNEL); 2867 if (!tc) { 2868 ql_log(ql_log_warn, vha, 0x00be, 2869 "Unable to allocate (%d KB) for FCE.\n", 2870 FCE_SIZE / 1024); 2871 goto try_eft; 2872 } 2873 2874 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 2875 ha->fce_mb, &ha->fce_bufs); 2876 if (rval) { 2877 ql_log(ql_log_warn, vha, 0x00bf, 2878 "Unable to initialize FCE (%d).\n", rval); 2879 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 2880 tc_dma); 2881 ha->flags.fce_enabled = 0; 2882 goto try_eft; 2883 } 2884 ql_dbg(ql_dbg_init, vha, 0x00c0, 2885 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 2886 2887 ha->flags.fce_enabled = 1; 2888 ha->fce_dma = tc_dma; 2889 ha->fce = tc; 2890 2891 try_eft: 2892 if (ha->eft) 2893 dma_free_coherent(&ha->pdev->dev, 2894 EFT_SIZE, ha->eft, ha->eft_dma); 2895 2896 /* Allocate memory for Extended Trace Buffer. */ 2897 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 2898 GFP_KERNEL); 2899 if (!tc) { 2900 ql_log(ql_log_warn, vha, 0x00c1, 2901 "Unable to allocate (%d KB) for EFT.\n", 2902 EFT_SIZE / 1024); 2903 goto eft_err; 2904 } 2905 2906 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 2907 if (rval) { 2908 ql_log(ql_log_warn, vha, 0x00c2, 2909 "Unable to initialize EFT (%d).\n", rval); 2910 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 2911 tc_dma); 2912 goto eft_err; 2913 } 2914 ql_dbg(ql_dbg_init, vha, 0x00c3, 2915 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2916 2917 ha->eft_dma = tc_dma; 2918 ha->eft = tc; 2919 } 2920 2921 eft_err: 2922 return; 2923 } 2924 2925 void 2926 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 2927 { 2928 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 2929 eft_size, fce_size, mq_size; 2930 struct qla_hw_data *ha = vha->hw; 2931 struct req_que *req = ha->req_q_map[0]; 2932 struct rsp_que *rsp = ha->rsp_q_map[0]; 2933 struct qla2xxx_fw_dump *fw_dump; 2934 2935 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 2936 req_q_size = rsp_q_size = 0; 2937 2938 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2939 fixed_size = sizeof(struct qla2100_fw_dump); 2940 } else if (IS_QLA23XX(ha)) { 2941 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 2942 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 2943 sizeof(uint16_t); 2944 } else if (IS_FWI2_CAPABLE(ha)) { 2945 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 2946 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 2947 else if (IS_QLA81XX(ha)) 2948 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 2949 else if (IS_QLA25XX(ha)) 2950 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 2951 else 2952 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 2953 2954 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 2955 sizeof(uint32_t); 2956 if (ha->mqenable) { 2957 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 2958 mq_size = sizeof(struct qla2xxx_mq_chain); 2959 /* 2960 * Allocate maximum buffer size for all queues. 2961 * Resizing must be done at end-of-dump processing. 2962 */ 2963 mq_size += ha->max_req_queues * 2964 (req->length * sizeof(request_t)); 2965 mq_size += ha->max_rsp_queues * 2966 (rsp->length * sizeof(response_t)); 2967 } 2968 if (ha->tgt.atio_ring) 2969 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 2970 /* Allocate memory for Fibre Channel Event Buffer. */ 2971 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2972 !IS_QLA27XX(ha)) 2973 goto try_eft; 2974 2975 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 2976 try_eft: 2977 ql_dbg(ql_dbg_init, vha, 0x00c3, 2978 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2979 eft_size = EFT_SIZE; 2980 } 2981 2982 if (IS_QLA27XX(ha)) { 2983 if (!ha->fw_dump_template) { 2984 ql_log(ql_log_warn, vha, 0x00ba, 2985 "Failed missing fwdump template\n"); 2986 return; 2987 } 2988 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 2989 ql_dbg(ql_dbg_init, vha, 0x00fa, 2990 "-> allocating fwdump (%x bytes)...\n", dump_size); 2991 goto allocate; 2992 } 2993 2994 req_q_size = req->length * sizeof(request_t); 2995 rsp_q_size = rsp->length * sizeof(response_t); 2996 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 2997 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 2998 ha->chain_offset = dump_size; 2999 dump_size += mq_size + fce_size; 3000 3001 if (ha->exchoffld_buf) 3002 dump_size += sizeof(struct qla2xxx_offld_chain) + 3003 ha->exchoffld_size; 3004 if (ha->exlogin_buf) 3005 dump_size += sizeof(struct qla2xxx_offld_chain) + 3006 ha->exlogin_size; 3007 3008 allocate: 3009 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 3010 fw_dump = vmalloc(dump_size); 3011 if (!fw_dump) { 3012 ql_log(ql_log_warn, vha, 0x00c4, 3013 "Unable to allocate (%d KB) for firmware dump.\n", 3014 dump_size / 1024); 3015 } else { 3016 if (ha->fw_dump) 3017 vfree(ha->fw_dump); 3018 ha->fw_dump = fw_dump; 3019 3020 ha->fw_dump_len = dump_size; 3021 ql_dbg(ql_dbg_init, vha, 0x00c5, 3022 "Allocated (%d KB) for firmware dump.\n", 3023 dump_size / 1024); 3024 3025 if (IS_QLA27XX(ha)) 3026 return; 3027 3028 ha->fw_dump->signature[0] = 'Q'; 3029 ha->fw_dump->signature[1] = 'L'; 3030 ha->fw_dump->signature[2] = 'G'; 3031 ha->fw_dump->signature[3] = 'C'; 3032 ha->fw_dump->version = htonl(1); 3033 3034 ha->fw_dump->fixed_size = htonl(fixed_size); 3035 ha->fw_dump->mem_size = htonl(mem_size); 3036 ha->fw_dump->req_q_size = htonl(req_q_size); 3037 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3038 3039 ha->fw_dump->eft_size = htonl(eft_size); 3040 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3041 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3042 3043 ha->fw_dump->header_size = 3044 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3045 } 3046 } 3047 } 3048 3049 static int 3050 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3051 { 3052 #define MPS_MASK 0xe0 3053 int rval; 3054 uint16_t dc; 3055 uint32_t dw; 3056 3057 if (!IS_QLA81XX(vha->hw)) 3058 return QLA_SUCCESS; 3059 3060 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3061 if (rval != QLA_SUCCESS) { 3062 ql_log(ql_log_warn, vha, 0x0105, 3063 "Unable to acquire semaphore.\n"); 3064 goto done; 3065 } 3066 3067 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3068 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3069 if (rval != QLA_SUCCESS) { 3070 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3071 goto done_release; 3072 } 3073 3074 dc &= MPS_MASK; 3075 if (dc == (dw & MPS_MASK)) 3076 goto done_release; 3077 3078 dw &= ~MPS_MASK; 3079 dw |= dc; 3080 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3081 if (rval != QLA_SUCCESS) { 3082 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3083 } 3084 3085 done_release: 3086 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3087 if (rval != QLA_SUCCESS) { 3088 ql_log(ql_log_warn, vha, 0x006d, 3089 "Unable to release semaphore.\n"); 3090 } 3091 3092 done: 3093 return rval; 3094 } 3095 3096 int 3097 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3098 { 3099 /* Don't try to reallocate the array */ 3100 if (req->outstanding_cmds) 3101 return QLA_SUCCESS; 3102 3103 if (!IS_FWI2_CAPABLE(ha)) 3104 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3105 else { 3106 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3107 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3108 else 3109 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3110 } 3111 3112 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 3113 req->num_outstanding_cmds, GFP_KERNEL); 3114 3115 if (!req->outstanding_cmds) { 3116 /* 3117 * Try to allocate a minimal size just so we can get through 3118 * initialization. 3119 */ 3120 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3121 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 3122 req->num_outstanding_cmds, GFP_KERNEL); 3123 3124 if (!req->outstanding_cmds) { 3125 ql_log(ql_log_fatal, NULL, 0x0126, 3126 "Failed to allocate memory for " 3127 "outstanding_cmds for req_que %p.\n", req); 3128 req->num_outstanding_cmds = 0; 3129 return QLA_FUNCTION_FAILED; 3130 } 3131 } 3132 3133 return QLA_SUCCESS; 3134 } 3135 3136 #define PRINT_FIELD(_field, _flag, _str) { \ 3137 if (a0->_field & _flag) {\ 3138 if (p) {\ 3139 strcat(ptr, "|");\ 3140 ptr++;\ 3141 leftover--;\ 3142 } \ 3143 len = snprintf(ptr, leftover, "%s", _str); \ 3144 p = 1;\ 3145 leftover -= len;\ 3146 ptr += len; \ 3147 } \ 3148 } 3149 3150 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3151 { 3152 #define STR_LEN 64 3153 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3154 u8 str[STR_LEN], *ptr, p; 3155 int leftover, len; 3156 3157 memset(str, 0, STR_LEN); 3158 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3159 ql_dbg(ql_dbg_init, vha, 0x015a, 3160 "SFP MFG Name: %s\n", str); 3161 3162 memset(str, 0, STR_LEN); 3163 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3164 ql_dbg(ql_dbg_init, vha, 0x015c, 3165 "SFP Part Name: %s\n", str); 3166 3167 /* media */ 3168 memset(str, 0, STR_LEN); 3169 ptr = str; 3170 leftover = STR_LEN; 3171 p = len = 0; 3172 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3173 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3174 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3175 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3176 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3177 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3178 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3179 ql_dbg(ql_dbg_init, vha, 0x0160, 3180 "SFP Media: %s\n", str); 3181 3182 /* link length */ 3183 memset(str, 0, STR_LEN); 3184 ptr = str; 3185 leftover = STR_LEN; 3186 p = len = 0; 3187 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3188 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3189 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3190 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3191 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3192 ql_dbg(ql_dbg_init, vha, 0x0196, 3193 "SFP Link Length: %s\n", str); 3194 3195 memset(str, 0, STR_LEN); 3196 ptr = str; 3197 leftover = STR_LEN; 3198 p = len = 0; 3199 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3200 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3201 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3202 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3203 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3204 ql_dbg(ql_dbg_init, vha, 0x016e, 3205 "SFP FC Link Tech: %s\n", str); 3206 3207 if (a0->length_km) 3208 ql_dbg(ql_dbg_init, vha, 0x016f, 3209 "SFP Distant: %d km\n", a0->length_km); 3210 if (a0->length_100m) 3211 ql_dbg(ql_dbg_init, vha, 0x0170, 3212 "SFP Distant: %d m\n", a0->length_100m*100); 3213 if (a0->length_50um_10m) 3214 ql_dbg(ql_dbg_init, vha, 0x0189, 3215 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3216 if (a0->length_62um_10m) 3217 ql_dbg(ql_dbg_init, vha, 0x018a, 3218 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3219 if (a0->length_om4_10m) 3220 ql_dbg(ql_dbg_init, vha, 0x0194, 3221 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3222 if (a0->length_om3_10m) 3223 ql_dbg(ql_dbg_init, vha, 0x0195, 3224 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3225 } 3226 3227 3228 /* 3229 * Return Code: 3230 * QLA_SUCCESS: no action 3231 * QLA_INTERFACE_ERROR: SFP is not there. 3232 * QLA_FUNCTION_FAILED: detected New SFP 3233 */ 3234 int 3235 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3236 { 3237 int rc = QLA_SUCCESS; 3238 struct sff_8247_a0 *a; 3239 struct qla_hw_data *ha = vha->hw; 3240 3241 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3242 goto out; 3243 3244 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3245 if (rc) 3246 goto out; 3247 3248 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3249 qla2xxx_print_sfp_info(vha); 3250 3251 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3252 /* long range */ 3253 ha->flags.detected_lr_sfp = 1; 3254 3255 if (a->length_km > 5 || a->length_100m > 50) 3256 ha->long_range_distance = LR_DISTANCE_10K; 3257 else 3258 ha->long_range_distance = LR_DISTANCE_5K; 3259 3260 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3261 ql_dbg(ql_dbg_async, vha, 0x507b, 3262 "Detected Long Range SFP.\n"); 3263 } else { 3264 /* short range */ 3265 ha->flags.detected_lr_sfp = 0; 3266 if (ha->flags.using_lr_setting) 3267 ql_dbg(ql_dbg_async, vha, 0x5084, 3268 "Detected Short Range SFP.\n"); 3269 } 3270 3271 if (!vha->flags.init_done) 3272 rc = QLA_SUCCESS; 3273 out: 3274 return rc; 3275 } 3276 3277 /** 3278 * qla2x00_setup_chip() - Load and start RISC firmware. 3279 * @vha: HA context 3280 * 3281 * Returns 0 on success. 3282 */ 3283 static int 3284 qla2x00_setup_chip(scsi_qla_host_t *vha) 3285 { 3286 int rval; 3287 uint32_t srisc_address = 0; 3288 struct qla_hw_data *ha = vha->hw; 3289 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3290 unsigned long flags; 3291 uint16_t fw_major_version; 3292 3293 if (IS_P3P_TYPE(ha)) { 3294 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3295 if (rval == QLA_SUCCESS) { 3296 qla2x00_stop_firmware(vha); 3297 goto enable_82xx_npiv; 3298 } else 3299 goto failed; 3300 } 3301 3302 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3303 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3304 spin_lock_irqsave(&ha->hardware_lock, flags); 3305 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3306 RD_REG_WORD(®->hccr); 3307 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3308 } 3309 3310 qla81xx_mpi_sync(vha); 3311 3312 /* Load firmware sequences */ 3313 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3314 if (rval == QLA_SUCCESS) { 3315 ql_dbg(ql_dbg_init, vha, 0x00c9, 3316 "Verifying Checksum of loaded RISC code.\n"); 3317 3318 rval = qla2x00_verify_checksum(vha, srisc_address); 3319 if (rval == QLA_SUCCESS) { 3320 /* Start firmware execution. */ 3321 ql_dbg(ql_dbg_init, vha, 0x00ca, 3322 "Starting firmware.\n"); 3323 3324 if (ql2xexlogins) 3325 ha->flags.exlogins_enabled = 1; 3326 3327 if (qla_is_exch_offld_enabled(vha)) 3328 ha->flags.exchoffld_enabled = 1; 3329 3330 rval = qla2x00_execute_fw(vha, srisc_address); 3331 /* Retrieve firmware information. */ 3332 if (rval == QLA_SUCCESS) { 3333 qla24xx_detect_sfp(vha); 3334 3335 rval = qla2x00_set_exlogins_buffer(vha); 3336 if (rval != QLA_SUCCESS) 3337 goto failed; 3338 3339 rval = qla2x00_set_exchoffld_buffer(vha); 3340 if (rval != QLA_SUCCESS) 3341 goto failed; 3342 3343 enable_82xx_npiv: 3344 fw_major_version = ha->fw_major_version; 3345 if (IS_P3P_TYPE(ha)) 3346 qla82xx_check_md_needed(vha); 3347 else 3348 rval = qla2x00_get_fw_version(vha); 3349 if (rval != QLA_SUCCESS) 3350 goto failed; 3351 ha->flags.npiv_supported = 0; 3352 if (IS_QLA2XXX_MIDTYPE(ha) && 3353 (ha->fw_attributes & BIT_2)) { 3354 ha->flags.npiv_supported = 1; 3355 if ((!ha->max_npiv_vports) || 3356 ((ha->max_npiv_vports + 1) % 3357 MIN_MULTI_ID_FABRIC)) 3358 ha->max_npiv_vports = 3359 MIN_MULTI_ID_FABRIC - 1; 3360 } 3361 qla2x00_get_resource_cnts(vha); 3362 3363 /* 3364 * Allocate the array of outstanding commands 3365 * now that we know the firmware resources. 3366 */ 3367 rval = qla2x00_alloc_outstanding_cmds(ha, 3368 vha->req); 3369 if (rval != QLA_SUCCESS) 3370 goto failed; 3371 3372 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3373 qla2x00_alloc_offload_mem(vha); 3374 3375 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3376 qla2x00_alloc_fw_dump(vha); 3377 3378 } else { 3379 goto failed; 3380 } 3381 } else { 3382 ql_log(ql_log_fatal, vha, 0x00cd, 3383 "ISP Firmware failed checksum.\n"); 3384 goto failed; 3385 } 3386 } else 3387 goto failed; 3388 3389 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3390 /* Enable proper parity. */ 3391 spin_lock_irqsave(&ha->hardware_lock, flags); 3392 if (IS_QLA2300(ha)) 3393 /* SRAM parity */ 3394 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3395 else 3396 /* SRAM, Instruction RAM and GP RAM parity */ 3397 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3398 RD_REG_WORD(®->hccr); 3399 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3400 } 3401 3402 if (IS_QLA27XX(ha)) 3403 ha->flags.fac_supported = 1; 3404 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3405 uint32_t size; 3406 3407 rval = qla81xx_fac_get_sector_size(vha, &size); 3408 if (rval == QLA_SUCCESS) { 3409 ha->flags.fac_supported = 1; 3410 ha->fdt_block_size = size << 2; 3411 } else { 3412 ql_log(ql_log_warn, vha, 0x00ce, 3413 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3414 ha->fw_major_version, ha->fw_minor_version, 3415 ha->fw_subminor_version); 3416 3417 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3418 ha->flags.fac_supported = 0; 3419 rval = QLA_SUCCESS; 3420 } 3421 } 3422 } 3423 failed: 3424 if (rval) { 3425 ql_log(ql_log_fatal, vha, 0x00cf, 3426 "Setup chip ****FAILED****.\n"); 3427 } 3428 3429 return (rval); 3430 } 3431 3432 /** 3433 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3434 * @rsp: response queue 3435 * 3436 * Beginning of request ring has initialization control block already built 3437 * by nvram config routine. 3438 * 3439 * Returns 0 on success. 3440 */ 3441 void 3442 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3443 { 3444 uint16_t cnt; 3445 response_t *pkt; 3446 3447 rsp->ring_ptr = rsp->ring; 3448 rsp->ring_index = 0; 3449 rsp->status_srb = NULL; 3450 pkt = rsp->ring_ptr; 3451 for (cnt = 0; cnt < rsp->length; cnt++) { 3452 pkt->signature = RESPONSE_PROCESSED; 3453 pkt++; 3454 } 3455 } 3456 3457 /** 3458 * qla2x00_update_fw_options() - Read and process firmware options. 3459 * @vha: HA context 3460 * 3461 * Returns 0 on success. 3462 */ 3463 void 3464 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3465 { 3466 uint16_t swing, emphasis, tx_sens, rx_sens; 3467 struct qla_hw_data *ha = vha->hw; 3468 3469 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3470 qla2x00_get_fw_options(vha, ha->fw_options); 3471 3472 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3473 return; 3474 3475 /* Serial Link options. */ 3476 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3477 "Serial link options.\n"); 3478 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3479 (uint8_t *)&ha->fw_seriallink_options, 3480 sizeof(ha->fw_seriallink_options)); 3481 3482 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3483 if (ha->fw_seriallink_options[3] & BIT_2) { 3484 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3485 3486 /* 1G settings */ 3487 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3488 emphasis = (ha->fw_seriallink_options[2] & 3489 (BIT_4 | BIT_3)) >> 3; 3490 tx_sens = ha->fw_seriallink_options[0] & 3491 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3492 rx_sens = (ha->fw_seriallink_options[0] & 3493 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3494 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3495 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3496 if (rx_sens == 0x0) 3497 rx_sens = 0x3; 3498 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3499 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3500 ha->fw_options[10] |= BIT_5 | 3501 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3502 (tx_sens & (BIT_1 | BIT_0)); 3503 3504 /* 2G settings */ 3505 swing = (ha->fw_seriallink_options[2] & 3506 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3507 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3508 tx_sens = ha->fw_seriallink_options[1] & 3509 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3510 rx_sens = (ha->fw_seriallink_options[1] & 3511 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3512 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3513 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3514 if (rx_sens == 0x0) 3515 rx_sens = 0x3; 3516 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3517 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3518 ha->fw_options[11] |= BIT_5 | 3519 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3520 (tx_sens & (BIT_1 | BIT_0)); 3521 } 3522 3523 /* FCP2 options. */ 3524 /* Return command IOCBs without waiting for an ABTS to complete. */ 3525 ha->fw_options[3] |= BIT_13; 3526 3527 /* LED scheme. */ 3528 if (ha->flags.enable_led_scheme) 3529 ha->fw_options[2] |= BIT_12; 3530 3531 /* Detect ISP6312. */ 3532 if (IS_QLA6312(ha)) 3533 ha->fw_options[2] |= BIT_13; 3534 3535 /* Set Retry FLOGI in case of P2P connection */ 3536 if (ha->operating_mode == P2P) { 3537 ha->fw_options[2] |= BIT_3; 3538 ql_dbg(ql_dbg_disc, vha, 0x2100, 3539 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3540 __func__, ha->fw_options[2]); 3541 } 3542 3543 /* Update firmware options. */ 3544 qla2x00_set_fw_options(vha, ha->fw_options); 3545 } 3546 3547 void 3548 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3549 { 3550 int rval; 3551 struct qla_hw_data *ha = vha->hw; 3552 3553 if (IS_P3P_TYPE(ha)) 3554 return; 3555 3556 /* Hold status IOCBs until ABTS response received. */ 3557 if (ql2xfwholdabts) 3558 ha->fw_options[3] |= BIT_12; 3559 3560 /* Set Retry FLOGI in case of P2P connection */ 3561 if (ha->operating_mode == P2P) { 3562 ha->fw_options[2] |= BIT_3; 3563 ql_dbg(ql_dbg_disc, vha, 0x2101, 3564 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3565 __func__, ha->fw_options[2]); 3566 } 3567 3568 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3569 if (ql2xmvasynctoatio && 3570 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3571 if (qla_tgt_mode_enabled(vha) || 3572 qla_dual_mode_enabled(vha)) 3573 ha->fw_options[2] |= BIT_11; 3574 else 3575 ha->fw_options[2] &= ~BIT_11; 3576 } 3577 3578 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3579 /* 3580 * Tell FW to track each exchange to prevent 3581 * driver from using stale exchange. 3582 */ 3583 if (qla_tgt_mode_enabled(vha) || 3584 qla_dual_mode_enabled(vha)) 3585 ha->fw_options[2] |= BIT_4; 3586 else 3587 ha->fw_options[2] &= ~BIT_4; 3588 3589 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3590 if (qla2xuseresexchforels) 3591 ha->fw_options[2] |= BIT_8; 3592 else 3593 ha->fw_options[2] &= ~BIT_8; 3594 } 3595 3596 ql_dbg(ql_dbg_init, vha, 0x00e8, 3597 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3598 __func__, ha->fw_options[1], ha->fw_options[2], 3599 ha->fw_options[3], vha->host->active_mode); 3600 3601 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3602 qla2x00_set_fw_options(vha, ha->fw_options); 3603 3604 /* Update Serial Link options. */ 3605 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3606 return; 3607 3608 rval = qla2x00_set_serdes_params(vha, 3609 le16_to_cpu(ha->fw_seriallink_options24[1]), 3610 le16_to_cpu(ha->fw_seriallink_options24[2]), 3611 le16_to_cpu(ha->fw_seriallink_options24[3])); 3612 if (rval != QLA_SUCCESS) { 3613 ql_log(ql_log_warn, vha, 0x0104, 3614 "Unable to update Serial Link options (%x).\n", rval); 3615 } 3616 } 3617 3618 void 3619 qla2x00_config_rings(struct scsi_qla_host *vha) 3620 { 3621 struct qla_hw_data *ha = vha->hw; 3622 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3623 struct req_que *req = ha->req_q_map[0]; 3624 struct rsp_que *rsp = ha->rsp_q_map[0]; 3625 3626 /* Setup ring parameters in initialization control block. */ 3627 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3628 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3629 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3630 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3631 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3632 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3633 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3634 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3635 3636 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3637 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3638 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3639 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3640 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3641 } 3642 3643 void 3644 qla24xx_config_rings(struct scsi_qla_host *vha) 3645 { 3646 struct qla_hw_data *ha = vha->hw; 3647 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3648 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3649 struct qla_msix_entry *msix; 3650 struct init_cb_24xx *icb; 3651 uint16_t rid = 0; 3652 struct req_que *req = ha->req_q_map[0]; 3653 struct rsp_que *rsp = ha->rsp_q_map[0]; 3654 3655 /* Setup ring parameters in initialization control block. */ 3656 icb = (struct init_cb_24xx *)ha->init_cb; 3657 icb->request_q_outpointer = cpu_to_le16(0); 3658 icb->response_q_inpointer = cpu_to_le16(0); 3659 icb->request_q_length = cpu_to_le16(req->length); 3660 icb->response_q_length = cpu_to_le16(rsp->length); 3661 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3662 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3663 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3664 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3665 3666 /* Setup ATIO queue dma pointers for target mode */ 3667 icb->atio_q_inpointer = cpu_to_le16(0); 3668 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3669 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3670 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3671 3672 if (IS_SHADOW_REG_CAPABLE(ha)) 3673 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3674 3675 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3676 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3677 icb->rid = cpu_to_le16(rid); 3678 if (ha->flags.msix_enabled) { 3679 msix = &ha->msix_entries[1]; 3680 ql_dbg(ql_dbg_init, vha, 0x0019, 3681 "Registering vector 0x%x for base que.\n", 3682 msix->entry); 3683 icb->msix = cpu_to_le16(msix->entry); 3684 } 3685 /* Use alternate PCI bus number */ 3686 if (MSB(rid)) 3687 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3688 /* Use alternate PCI devfn */ 3689 if (LSB(rid)) 3690 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3691 3692 /* Use Disable MSIX Handshake mode for capable adapters */ 3693 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3694 (ha->flags.msix_enabled)) { 3695 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3696 ha->flags.disable_msix_handshake = 1; 3697 ql_dbg(ql_dbg_init, vha, 0x00fe, 3698 "MSIX Handshake Disable Mode turned on.\n"); 3699 } else { 3700 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3701 } 3702 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3703 3704 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3705 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3706 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3707 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3708 } else { 3709 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3710 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3711 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3712 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3713 } 3714 qlt_24xx_config_rings(vha); 3715 3716 /* PCI posting */ 3717 RD_REG_DWORD(&ioreg->hccr); 3718 } 3719 3720 /** 3721 * qla2x00_init_rings() - Initializes firmware. 3722 * @vha: HA context 3723 * 3724 * Beginning of request ring has initialization control block already built 3725 * by nvram config routine. 3726 * 3727 * Returns 0 on success. 3728 */ 3729 int 3730 qla2x00_init_rings(scsi_qla_host_t *vha) 3731 { 3732 int rval; 3733 unsigned long flags = 0; 3734 int cnt, que; 3735 struct qla_hw_data *ha = vha->hw; 3736 struct req_que *req; 3737 struct rsp_que *rsp; 3738 struct mid_init_cb_24xx *mid_init_cb = 3739 (struct mid_init_cb_24xx *) ha->init_cb; 3740 3741 spin_lock_irqsave(&ha->hardware_lock, flags); 3742 3743 /* Clear outstanding commands array. */ 3744 for (que = 0; que < ha->max_req_queues; que++) { 3745 req = ha->req_q_map[que]; 3746 if (!req || !test_bit(que, ha->req_qid_map)) 3747 continue; 3748 req->out_ptr = (void *)(req->ring + req->length); 3749 *req->out_ptr = 0; 3750 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3751 req->outstanding_cmds[cnt] = NULL; 3752 3753 req->current_outstanding_cmd = 1; 3754 3755 /* Initialize firmware. */ 3756 req->ring_ptr = req->ring; 3757 req->ring_index = 0; 3758 req->cnt = req->length; 3759 } 3760 3761 for (que = 0; que < ha->max_rsp_queues; que++) { 3762 rsp = ha->rsp_q_map[que]; 3763 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 3764 continue; 3765 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 3766 *rsp->in_ptr = 0; 3767 /* Initialize response queue entries */ 3768 if (IS_QLAFX00(ha)) 3769 qlafx00_init_response_q_entries(rsp); 3770 else 3771 qla2x00_init_response_q_entries(rsp); 3772 } 3773 3774 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 3775 ha->tgt.atio_ring_index = 0; 3776 /* Initialize ATIO queue entries */ 3777 qlt_init_atio_q_entries(vha); 3778 3779 ha->isp_ops->config_rings(vha); 3780 3781 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3782 3783 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 3784 3785 if (IS_QLAFX00(ha)) { 3786 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 3787 goto next_check; 3788 } 3789 3790 /* Update any ISP specific firmware options before initialization. */ 3791 ha->isp_ops->update_fw_options(vha); 3792 3793 if (ha->flags.npiv_supported) { 3794 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 3795 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 3796 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 3797 } 3798 3799 if (IS_FWI2_CAPABLE(ha)) { 3800 mid_init_cb->options = cpu_to_le16(BIT_1); 3801 mid_init_cb->init_cb.execution_throttle = 3802 cpu_to_le16(ha->cur_fw_xcb_count); 3803 ha->flags.dport_enabled = 3804 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 3805 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 3806 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 3807 /* FA-WWPN Status */ 3808 ha->flags.fawwpn_enabled = 3809 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 3810 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 3811 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 3812 } 3813 3814 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 3815 next_check: 3816 if (rval) { 3817 ql_log(ql_log_fatal, vha, 0x00d2, 3818 "Init Firmware **** FAILED ****.\n"); 3819 } else { 3820 ql_dbg(ql_dbg_init, vha, 0x00d3, 3821 "Init Firmware -- success.\n"); 3822 QLA_FW_STARTED(ha); 3823 } 3824 3825 return (rval); 3826 } 3827 3828 /** 3829 * qla2x00_fw_ready() - Waits for firmware ready. 3830 * @vha: HA context 3831 * 3832 * Returns 0 on success. 3833 */ 3834 static int 3835 qla2x00_fw_ready(scsi_qla_host_t *vha) 3836 { 3837 int rval; 3838 unsigned long wtime, mtime, cs84xx_time; 3839 uint16_t min_wait; /* Minimum wait time if loop is down */ 3840 uint16_t wait_time; /* Wait time if loop is coming ready */ 3841 uint16_t state[6]; 3842 struct qla_hw_data *ha = vha->hw; 3843 3844 if (IS_QLAFX00(vha->hw)) 3845 return qlafx00_fw_ready(vha); 3846 3847 rval = QLA_SUCCESS; 3848 3849 /* Time to wait for loop down */ 3850 if (IS_P3P_TYPE(ha)) 3851 min_wait = 30; 3852 else 3853 min_wait = 20; 3854 3855 /* 3856 * Firmware should take at most one RATOV to login, plus 5 seconds for 3857 * our own processing. 3858 */ 3859 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 3860 wait_time = min_wait; 3861 } 3862 3863 /* Min wait time if loop down */ 3864 mtime = jiffies + (min_wait * HZ); 3865 3866 /* wait time before firmware ready */ 3867 wtime = jiffies + (wait_time * HZ); 3868 3869 /* Wait for ISP to finish LIP */ 3870 if (!vha->flags.init_done) 3871 ql_log(ql_log_info, vha, 0x801e, 3872 "Waiting for LIP to complete.\n"); 3873 3874 do { 3875 memset(state, -1, sizeof(state)); 3876 rval = qla2x00_get_firmware_state(vha, state); 3877 if (rval == QLA_SUCCESS) { 3878 if (state[0] < FSTATE_LOSS_OF_SYNC) { 3879 vha->device_flags &= ~DFLG_NO_CABLE; 3880 } 3881 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 3882 ql_dbg(ql_dbg_taskm, vha, 0x801f, 3883 "fw_state=%x 84xx=%x.\n", state[0], 3884 state[2]); 3885 if ((state[2] & FSTATE_LOGGED_IN) && 3886 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 3887 ql_dbg(ql_dbg_taskm, vha, 0x8028, 3888 "Sending verify iocb.\n"); 3889 3890 cs84xx_time = jiffies; 3891 rval = qla84xx_init_chip(vha); 3892 if (rval != QLA_SUCCESS) { 3893 ql_log(ql_log_warn, 3894 vha, 0x8007, 3895 "Init chip failed.\n"); 3896 break; 3897 } 3898 3899 /* Add time taken to initialize. */ 3900 cs84xx_time = jiffies - cs84xx_time; 3901 wtime += cs84xx_time; 3902 mtime += cs84xx_time; 3903 ql_dbg(ql_dbg_taskm, vha, 0x8008, 3904 "Increasing wait time by %ld. " 3905 "New time %ld.\n", cs84xx_time, 3906 wtime); 3907 } 3908 } else if (state[0] == FSTATE_READY) { 3909 ql_dbg(ql_dbg_taskm, vha, 0x8037, 3910 "F/W Ready - OK.\n"); 3911 3912 qla2x00_get_retry_cnt(vha, &ha->retry_count, 3913 &ha->login_timeout, &ha->r_a_tov); 3914 3915 rval = QLA_SUCCESS; 3916 break; 3917 } 3918 3919 rval = QLA_FUNCTION_FAILED; 3920 3921 if (atomic_read(&vha->loop_down_timer) && 3922 state[0] != FSTATE_READY) { 3923 /* Loop down. Timeout on min_wait for states 3924 * other than Wait for Login. 3925 */ 3926 if (time_after_eq(jiffies, mtime)) { 3927 ql_log(ql_log_info, vha, 0x8038, 3928 "Cable is unplugged...\n"); 3929 3930 vha->device_flags |= DFLG_NO_CABLE; 3931 break; 3932 } 3933 } 3934 } else { 3935 /* Mailbox cmd failed. Timeout on min_wait. */ 3936 if (time_after_eq(jiffies, mtime) || 3937 ha->flags.isp82xx_fw_hung) 3938 break; 3939 } 3940 3941 if (time_after_eq(jiffies, wtime)) 3942 break; 3943 3944 /* Delay for a while */ 3945 msleep(500); 3946 } while (1); 3947 3948 ql_dbg(ql_dbg_taskm, vha, 0x803a, 3949 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 3950 state[1], state[2], state[3], state[4], state[5], jiffies); 3951 3952 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 3953 ql_log(ql_log_warn, vha, 0x803b, 3954 "Firmware ready **** FAILED ****.\n"); 3955 } 3956 3957 return (rval); 3958 } 3959 3960 /* 3961 * qla2x00_configure_hba 3962 * Setup adapter context. 3963 * 3964 * Input: 3965 * ha = adapter state pointer. 3966 * 3967 * Returns: 3968 * 0 = success 3969 * 3970 * Context: 3971 * Kernel context. 3972 */ 3973 static int 3974 qla2x00_configure_hba(scsi_qla_host_t *vha) 3975 { 3976 int rval; 3977 uint16_t loop_id; 3978 uint16_t topo; 3979 uint16_t sw_cap; 3980 uint8_t al_pa; 3981 uint8_t area; 3982 uint8_t domain; 3983 char connect_type[22]; 3984 struct qla_hw_data *ha = vha->hw; 3985 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 3986 port_id_t id; 3987 unsigned long flags; 3988 3989 /* Get host addresses. */ 3990 rval = qla2x00_get_adapter_id(vha, 3991 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 3992 if (rval != QLA_SUCCESS) { 3993 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 3994 IS_CNA_CAPABLE(ha) || 3995 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 3996 ql_dbg(ql_dbg_disc, vha, 0x2008, 3997 "Loop is in a transition state.\n"); 3998 } else { 3999 ql_log(ql_log_warn, vha, 0x2009, 4000 "Unable to get host loop ID.\n"); 4001 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4002 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4003 ql_log(ql_log_warn, vha, 0x1151, 4004 "Doing link init.\n"); 4005 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4006 return rval; 4007 } 4008 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4009 } 4010 return (rval); 4011 } 4012 4013 if (topo == 4) { 4014 ql_log(ql_log_info, vha, 0x200a, 4015 "Cannot get topology - retrying.\n"); 4016 return (QLA_FUNCTION_FAILED); 4017 } 4018 4019 vha->loop_id = loop_id; 4020 4021 /* initialize */ 4022 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4023 ha->operating_mode = LOOP; 4024 ha->switch_cap = 0; 4025 4026 switch (topo) { 4027 case 0: 4028 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4029 ha->current_topology = ISP_CFG_NL; 4030 strcpy(connect_type, "(Loop)"); 4031 break; 4032 4033 case 1: 4034 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4035 ha->switch_cap = sw_cap; 4036 ha->current_topology = ISP_CFG_FL; 4037 strcpy(connect_type, "(FL_Port)"); 4038 break; 4039 4040 case 2: 4041 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4042 ha->operating_mode = P2P; 4043 ha->current_topology = ISP_CFG_N; 4044 strcpy(connect_type, "(N_Port-to-N_Port)"); 4045 break; 4046 4047 case 3: 4048 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4049 ha->switch_cap = sw_cap; 4050 ha->operating_mode = P2P; 4051 ha->current_topology = ISP_CFG_F; 4052 strcpy(connect_type, "(F_Port)"); 4053 break; 4054 4055 default: 4056 ql_dbg(ql_dbg_disc, vha, 0x200f, 4057 "HBA in unknown topology %x, using NL.\n", topo); 4058 ha->current_topology = ISP_CFG_NL; 4059 strcpy(connect_type, "(Loop)"); 4060 break; 4061 } 4062 4063 /* Save Host port and loop ID. */ 4064 /* byte order - Big Endian */ 4065 id.b.domain = domain; 4066 id.b.area = area; 4067 id.b.al_pa = al_pa; 4068 id.b.rsvd_1 = 0; 4069 spin_lock_irqsave(&ha->hardware_lock, flags); 4070 qlt_update_host_map(vha, id); 4071 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4072 4073 if (!vha->flags.init_done) 4074 ql_log(ql_log_info, vha, 0x2010, 4075 "Topology - %s, Host Loop address 0x%x.\n", 4076 connect_type, vha->loop_id); 4077 4078 return(rval); 4079 } 4080 4081 inline void 4082 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4083 char *def) 4084 { 4085 char *st, *en; 4086 uint16_t index; 4087 struct qla_hw_data *ha = vha->hw; 4088 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4089 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4090 4091 if (memcmp(model, BINZERO, len) != 0) { 4092 strncpy(ha->model_number, model, len); 4093 st = en = ha->model_number; 4094 en += len - 1; 4095 while (en > st) { 4096 if (*en != 0x20 && *en != 0x00) 4097 break; 4098 *en-- = '\0'; 4099 } 4100 4101 index = (ha->pdev->subsystem_device & 0xff); 4102 if (use_tbl && 4103 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4104 index < QLA_MODEL_NAMES) 4105 strncpy(ha->model_desc, 4106 qla2x00_model_name[index * 2 + 1], 4107 sizeof(ha->model_desc) - 1); 4108 } else { 4109 index = (ha->pdev->subsystem_device & 0xff); 4110 if (use_tbl && 4111 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4112 index < QLA_MODEL_NAMES) { 4113 strcpy(ha->model_number, 4114 qla2x00_model_name[index * 2]); 4115 strncpy(ha->model_desc, 4116 qla2x00_model_name[index * 2 + 1], 4117 sizeof(ha->model_desc) - 1); 4118 } else { 4119 strcpy(ha->model_number, def); 4120 } 4121 } 4122 if (IS_FWI2_CAPABLE(ha)) 4123 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4124 sizeof(ha->model_desc)); 4125 } 4126 4127 /* On sparc systems, obtain port and node WWN from firmware 4128 * properties. 4129 */ 4130 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4131 { 4132 #ifdef CONFIG_SPARC 4133 struct qla_hw_data *ha = vha->hw; 4134 struct pci_dev *pdev = ha->pdev; 4135 struct device_node *dp = pci_device_to_OF_node(pdev); 4136 const u8 *val; 4137 int len; 4138 4139 val = of_get_property(dp, "port-wwn", &len); 4140 if (val && len >= WWN_SIZE) 4141 memcpy(nv->port_name, val, WWN_SIZE); 4142 4143 val = of_get_property(dp, "node-wwn", &len); 4144 if (val && len >= WWN_SIZE) 4145 memcpy(nv->node_name, val, WWN_SIZE); 4146 #endif 4147 } 4148 4149 /* 4150 * NVRAM configuration for ISP 2xxx 4151 * 4152 * Input: 4153 * ha = adapter block pointer. 4154 * 4155 * Output: 4156 * initialization control block in response_ring 4157 * host adapters parameters in host adapter block 4158 * 4159 * Returns: 4160 * 0 = success. 4161 */ 4162 int 4163 qla2x00_nvram_config(scsi_qla_host_t *vha) 4164 { 4165 int rval; 4166 uint8_t chksum = 0; 4167 uint16_t cnt; 4168 uint8_t *dptr1, *dptr2; 4169 struct qla_hw_data *ha = vha->hw; 4170 init_cb_t *icb = ha->init_cb; 4171 nvram_t *nv = ha->nvram; 4172 uint8_t *ptr = ha->nvram; 4173 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4174 4175 rval = QLA_SUCCESS; 4176 4177 /* Determine NVRAM starting address. */ 4178 ha->nvram_size = sizeof(nvram_t); 4179 ha->nvram_base = 0; 4180 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4181 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4182 ha->nvram_base = 0x80; 4183 4184 /* Get NVRAM data and calculate checksum. */ 4185 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4186 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4187 chksum += *ptr++; 4188 4189 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4190 "Contents of NVRAM.\n"); 4191 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4192 (uint8_t *)nv, ha->nvram_size); 4193 4194 /* Bad NVRAM data, set defaults parameters. */ 4195 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4196 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4197 /* Reset NVRAM data. */ 4198 ql_log(ql_log_warn, vha, 0x0064, 4199 "Inconsistent NVRAM " 4200 "detected: checksum=0x%x id=%c version=0x%x.\n", 4201 chksum, nv->id[0], nv->nvram_version); 4202 ql_log(ql_log_warn, vha, 0x0065, 4203 "Falling back to " 4204 "functioning (yet invalid -- WWPN) defaults.\n"); 4205 4206 /* 4207 * Set default initialization control block. 4208 */ 4209 memset(nv, 0, ha->nvram_size); 4210 nv->parameter_block_version = ICB_VERSION; 4211 4212 if (IS_QLA23XX(ha)) { 4213 nv->firmware_options[0] = BIT_2 | BIT_1; 4214 nv->firmware_options[1] = BIT_7 | BIT_5; 4215 nv->add_firmware_options[0] = BIT_5; 4216 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4217 nv->frame_payload_size = 2048; 4218 nv->special_options[1] = BIT_7; 4219 } else if (IS_QLA2200(ha)) { 4220 nv->firmware_options[0] = BIT_2 | BIT_1; 4221 nv->firmware_options[1] = BIT_7 | BIT_5; 4222 nv->add_firmware_options[0] = BIT_5; 4223 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4224 nv->frame_payload_size = 1024; 4225 } else if (IS_QLA2100(ha)) { 4226 nv->firmware_options[0] = BIT_3 | BIT_1; 4227 nv->firmware_options[1] = BIT_5; 4228 nv->frame_payload_size = 1024; 4229 } 4230 4231 nv->max_iocb_allocation = cpu_to_le16(256); 4232 nv->execution_throttle = cpu_to_le16(16); 4233 nv->retry_count = 8; 4234 nv->retry_delay = 1; 4235 4236 nv->port_name[0] = 33; 4237 nv->port_name[3] = 224; 4238 nv->port_name[4] = 139; 4239 4240 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4241 4242 nv->login_timeout = 4; 4243 4244 /* 4245 * Set default host adapter parameters 4246 */ 4247 nv->host_p[1] = BIT_2; 4248 nv->reset_delay = 5; 4249 nv->port_down_retry_count = 8; 4250 nv->max_luns_per_target = cpu_to_le16(8); 4251 nv->link_down_timeout = 60; 4252 4253 rval = 1; 4254 } 4255 4256 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4257 /* 4258 * The SN2 does not provide BIOS emulation which means you can't change 4259 * potentially bogus BIOS settings. Force the use of default settings 4260 * for link rate and frame size. Hope that the rest of the settings 4261 * are valid. 4262 */ 4263 if (ia64_platform_is("sn2")) { 4264 nv->frame_payload_size = 2048; 4265 if (IS_QLA23XX(ha)) 4266 nv->special_options[1] = BIT_7; 4267 } 4268 #endif 4269 4270 /* Reset Initialization control block */ 4271 memset(icb, 0, ha->init_cb_size); 4272 4273 /* 4274 * Setup driver NVRAM options. 4275 */ 4276 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4277 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4278 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4279 nv->firmware_options[1] &= ~BIT_4; 4280 4281 if (IS_QLA23XX(ha)) { 4282 nv->firmware_options[0] |= BIT_2; 4283 nv->firmware_options[0] &= ~BIT_3; 4284 nv->special_options[0] &= ~BIT_6; 4285 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4286 4287 if (IS_QLA2300(ha)) { 4288 if (ha->fb_rev == FPM_2310) { 4289 strcpy(ha->model_number, "QLA2310"); 4290 } else { 4291 strcpy(ha->model_number, "QLA2300"); 4292 } 4293 } else { 4294 qla2x00_set_model_info(vha, nv->model_number, 4295 sizeof(nv->model_number), "QLA23xx"); 4296 } 4297 } else if (IS_QLA2200(ha)) { 4298 nv->firmware_options[0] |= BIT_2; 4299 /* 4300 * 'Point-to-point preferred, else loop' is not a safe 4301 * connection mode setting. 4302 */ 4303 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4304 (BIT_5 | BIT_4)) { 4305 /* Force 'loop preferred, else point-to-point'. */ 4306 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4307 nv->add_firmware_options[0] |= BIT_5; 4308 } 4309 strcpy(ha->model_number, "QLA22xx"); 4310 } else /*if (IS_QLA2100(ha))*/ { 4311 strcpy(ha->model_number, "QLA2100"); 4312 } 4313 4314 /* 4315 * Copy over NVRAM RISC parameter block to initialization control block. 4316 */ 4317 dptr1 = (uint8_t *)icb; 4318 dptr2 = (uint8_t *)&nv->parameter_block_version; 4319 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4320 while (cnt--) 4321 *dptr1++ = *dptr2++; 4322 4323 /* Copy 2nd half. */ 4324 dptr1 = (uint8_t *)icb->add_firmware_options; 4325 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4326 while (cnt--) 4327 *dptr1++ = *dptr2++; 4328 4329 /* Use alternate WWN? */ 4330 if (nv->host_p[1] & BIT_7) { 4331 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4332 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4333 } 4334 4335 /* Prepare nodename */ 4336 if ((icb->firmware_options[1] & BIT_6) == 0) { 4337 /* 4338 * Firmware will apply the following mask if the nodename was 4339 * not provided. 4340 */ 4341 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4342 icb->node_name[0] &= 0xF0; 4343 } 4344 4345 /* 4346 * Set host adapter parameters. 4347 */ 4348 4349 /* 4350 * BIT_7 in the host-parameters section allows for modification to 4351 * internal driver logging. 4352 */ 4353 if (nv->host_p[0] & BIT_7) 4354 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4355 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4356 /* Always load RISC code on non ISP2[12]00 chips. */ 4357 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4358 ha->flags.disable_risc_code_load = 0; 4359 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4360 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4361 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4362 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4363 ha->flags.disable_serdes = 0; 4364 4365 ha->operating_mode = 4366 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4367 4368 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4369 sizeof(ha->fw_seriallink_options)); 4370 4371 /* save HBA serial number */ 4372 ha->serial0 = icb->port_name[5]; 4373 ha->serial1 = icb->port_name[6]; 4374 ha->serial2 = icb->port_name[7]; 4375 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4376 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4377 4378 icb->execution_throttle = cpu_to_le16(0xFFFF); 4379 4380 ha->retry_count = nv->retry_count; 4381 4382 /* Set minimum login_timeout to 4 seconds. */ 4383 if (nv->login_timeout != ql2xlogintimeout) 4384 nv->login_timeout = ql2xlogintimeout; 4385 if (nv->login_timeout < 4) 4386 nv->login_timeout = 4; 4387 ha->login_timeout = nv->login_timeout; 4388 4389 /* Set minimum RATOV to 100 tenths of a second. */ 4390 ha->r_a_tov = 100; 4391 4392 ha->loop_reset_delay = nv->reset_delay; 4393 4394 /* Link Down Timeout = 0: 4395 * 4396 * When Port Down timer expires we will start returning 4397 * I/O's to OS with "DID_NO_CONNECT". 4398 * 4399 * Link Down Timeout != 0: 4400 * 4401 * The driver waits for the link to come up after link down 4402 * before returning I/Os to OS with "DID_NO_CONNECT". 4403 */ 4404 if (nv->link_down_timeout == 0) { 4405 ha->loop_down_abort_time = 4406 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4407 } else { 4408 ha->link_down_timeout = nv->link_down_timeout; 4409 ha->loop_down_abort_time = 4410 (LOOP_DOWN_TIME - ha->link_down_timeout); 4411 } 4412 4413 /* 4414 * Need enough time to try and get the port back. 4415 */ 4416 ha->port_down_retry_count = nv->port_down_retry_count; 4417 if (qlport_down_retry) 4418 ha->port_down_retry_count = qlport_down_retry; 4419 /* Set login_retry_count */ 4420 ha->login_retry_count = nv->retry_count; 4421 if (ha->port_down_retry_count == nv->port_down_retry_count && 4422 ha->port_down_retry_count > 3) 4423 ha->login_retry_count = ha->port_down_retry_count; 4424 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4425 ha->login_retry_count = ha->port_down_retry_count; 4426 if (ql2xloginretrycount) 4427 ha->login_retry_count = ql2xloginretrycount; 4428 4429 icb->lun_enables = cpu_to_le16(0); 4430 icb->command_resource_count = 0; 4431 icb->immediate_notify_resource_count = 0; 4432 icb->timeout = cpu_to_le16(0); 4433 4434 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4435 /* Enable RIO */ 4436 icb->firmware_options[0] &= ~BIT_3; 4437 icb->add_firmware_options[0] &= 4438 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4439 icb->add_firmware_options[0] |= BIT_2; 4440 icb->response_accumulation_timer = 3; 4441 icb->interrupt_delay_timer = 5; 4442 4443 vha->flags.process_response_queue = 1; 4444 } else { 4445 /* Enable ZIO. */ 4446 if (!vha->flags.init_done) { 4447 ha->zio_mode = icb->add_firmware_options[0] & 4448 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4449 ha->zio_timer = icb->interrupt_delay_timer ? 4450 icb->interrupt_delay_timer: 2; 4451 } 4452 icb->add_firmware_options[0] &= 4453 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4454 vha->flags.process_response_queue = 0; 4455 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4456 ha->zio_mode = QLA_ZIO_MODE_6; 4457 4458 ql_log(ql_log_info, vha, 0x0068, 4459 "ZIO mode %d enabled; timer delay (%d us).\n", 4460 ha->zio_mode, ha->zio_timer * 100); 4461 4462 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4463 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4464 vha->flags.process_response_queue = 1; 4465 } 4466 } 4467 4468 if (rval) { 4469 ql_log(ql_log_warn, vha, 0x0069, 4470 "NVRAM configuration failed.\n"); 4471 } 4472 return (rval); 4473 } 4474 4475 static void 4476 qla2x00_rport_del(void *data) 4477 { 4478 fc_port_t *fcport = data; 4479 struct fc_rport *rport; 4480 unsigned long flags; 4481 4482 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4483 rport = fcport->drport ? fcport->drport: fcport->rport; 4484 fcport->drport = NULL; 4485 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4486 if (rport) { 4487 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4488 "%s %8phN. rport %p roles %x\n", 4489 __func__, fcport->port_name, rport, 4490 rport->roles); 4491 4492 fc_remote_port_delete(rport); 4493 } 4494 } 4495 4496 /** 4497 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4498 * @vha: HA context 4499 * @flags: allocation flags 4500 * 4501 * Returns a pointer to the allocated fcport, or NULL, if none available. 4502 */ 4503 fc_port_t * 4504 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4505 { 4506 fc_port_t *fcport; 4507 4508 fcport = kzalloc(sizeof(fc_port_t), flags); 4509 if (!fcport) 4510 return NULL; 4511 4512 /* Setup fcport template structure. */ 4513 fcport->vha = vha; 4514 fcport->port_type = FCT_UNKNOWN; 4515 fcport->loop_id = FC_NO_LOOP_ID; 4516 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4517 fcport->supported_classes = FC_COS_UNSPECIFIED; 4518 4519 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4520 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4521 flags); 4522 fcport->disc_state = DSC_DELETED; 4523 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4524 fcport->deleted = QLA_SESS_DELETED; 4525 fcport->login_retry = vha->hw->login_retry_count; 4526 fcport->login_retry = 5; 4527 fcport->logout_on_delete = 1; 4528 4529 if (!fcport->ct_desc.ct_sns) { 4530 ql_log(ql_log_warn, vha, 0xd049, 4531 "Failed to allocate ct_sns request.\n"); 4532 kfree(fcport); 4533 fcport = NULL; 4534 } 4535 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4536 INIT_LIST_HEAD(&fcport->gnl_entry); 4537 INIT_LIST_HEAD(&fcport->list); 4538 4539 return fcport; 4540 } 4541 4542 void 4543 qla2x00_free_fcport(fc_port_t *fcport) 4544 { 4545 if (fcport->ct_desc.ct_sns) { 4546 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4547 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4548 fcport->ct_desc.ct_sns_dma); 4549 4550 fcport->ct_desc.ct_sns = NULL; 4551 } 4552 kfree(fcport); 4553 } 4554 4555 /* 4556 * qla2x00_configure_loop 4557 * Updates Fibre Channel Device Database with what is actually on loop. 4558 * 4559 * Input: 4560 * ha = adapter block pointer. 4561 * 4562 * Returns: 4563 * 0 = success. 4564 * 1 = error. 4565 * 2 = database was full and device was not configured. 4566 */ 4567 static int 4568 qla2x00_configure_loop(scsi_qla_host_t *vha) 4569 { 4570 int rval; 4571 unsigned long flags, save_flags; 4572 struct qla_hw_data *ha = vha->hw; 4573 rval = QLA_SUCCESS; 4574 4575 /* Get Initiator ID */ 4576 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4577 rval = qla2x00_configure_hba(vha); 4578 if (rval != QLA_SUCCESS) { 4579 ql_dbg(ql_dbg_disc, vha, 0x2013, 4580 "Unable to configure HBA.\n"); 4581 return (rval); 4582 } 4583 } 4584 4585 save_flags = flags = vha->dpc_flags; 4586 ql_dbg(ql_dbg_disc, vha, 0x2014, 4587 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4588 4589 /* 4590 * If we have both an RSCN and PORT UPDATE pending then handle them 4591 * both at the same time. 4592 */ 4593 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4594 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4595 4596 qla2x00_get_data_rate(vha); 4597 4598 /* Determine what we need to do */ 4599 if (ha->current_topology == ISP_CFG_FL && 4600 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4601 4602 set_bit(RSCN_UPDATE, &flags); 4603 4604 } else if (ha->current_topology == ISP_CFG_F && 4605 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4606 4607 set_bit(RSCN_UPDATE, &flags); 4608 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4609 4610 } else if (ha->current_topology == ISP_CFG_N) { 4611 clear_bit(RSCN_UPDATE, &flags); 4612 if (ha->flags.rida_fmt2) { 4613 /* With Rida Format 2, the login is already triggered. 4614 * We know who is on the other side of the wire. 4615 * No need to login to do login to find out or drop into 4616 * qla2x00_configure_local_loop(). 4617 */ 4618 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4619 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4620 } else { 4621 if (qla_tgt_mode_enabled(vha)) { 4622 /* allow the other side to start the login */ 4623 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4624 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4625 } 4626 } 4627 } else if (ha->current_topology == ISP_CFG_NL) { 4628 clear_bit(RSCN_UPDATE, &flags); 4629 set_bit(LOCAL_LOOP_UPDATE, &flags); 4630 } else if (!vha->flags.online || 4631 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4632 set_bit(RSCN_UPDATE, &flags); 4633 set_bit(LOCAL_LOOP_UPDATE, &flags); 4634 } 4635 4636 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4637 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4638 ql_dbg(ql_dbg_disc, vha, 0x2015, 4639 "Loop resync needed, failing.\n"); 4640 rval = QLA_FUNCTION_FAILED; 4641 } else 4642 rval = qla2x00_configure_local_loop(vha); 4643 } 4644 4645 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4646 if (LOOP_TRANSITION(vha)) { 4647 ql_dbg(ql_dbg_disc, vha, 0x2099, 4648 "Needs RSCN update and loop transition.\n"); 4649 rval = QLA_FUNCTION_FAILED; 4650 } 4651 else 4652 rval = qla2x00_configure_fabric(vha); 4653 } 4654 4655 if (rval == QLA_SUCCESS) { 4656 if (atomic_read(&vha->loop_down_timer) || 4657 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4658 rval = QLA_FUNCTION_FAILED; 4659 } else { 4660 atomic_set(&vha->loop_state, LOOP_READY); 4661 ql_dbg(ql_dbg_disc, vha, 0x2069, 4662 "LOOP READY.\n"); 4663 ha->flags.fw_init_done = 1; 4664 4665 /* 4666 * Process any ATIO queue entries that came in 4667 * while we weren't online. 4668 */ 4669 if (qla_tgt_mode_enabled(vha) || 4670 qla_dual_mode_enabled(vha)) { 4671 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) { 4672 spin_lock_irqsave(&ha->tgt.atio_lock, 4673 flags); 4674 qlt_24xx_process_atio_queue(vha, 0); 4675 spin_unlock_irqrestore( 4676 &ha->tgt.atio_lock, flags); 4677 } else { 4678 spin_lock_irqsave(&ha->hardware_lock, 4679 flags); 4680 qlt_24xx_process_atio_queue(vha, 1); 4681 spin_unlock_irqrestore( 4682 &ha->hardware_lock, flags); 4683 } 4684 } 4685 } 4686 } 4687 4688 if (rval) { 4689 ql_dbg(ql_dbg_disc, vha, 0x206a, 4690 "%s *** FAILED ***.\n", __func__); 4691 } else { 4692 ql_dbg(ql_dbg_disc, vha, 0x206b, 4693 "%s: exiting normally.\n", __func__); 4694 } 4695 4696 /* Restore state if a resync event occurred during processing */ 4697 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4698 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4699 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4700 if (test_bit(RSCN_UPDATE, &save_flags)) { 4701 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4702 } 4703 } 4704 4705 return (rval); 4706 } 4707 4708 /* 4709 * N2N Login 4710 * Updates Fibre Channel Device Database with local loop devices. 4711 * 4712 * Input: 4713 * ha = adapter block pointer. 4714 * 4715 * Returns: 4716 */ 4717 static int qla24xx_n2n_handle_login(struct scsi_qla_host *vha, 4718 fc_port_t *fcport) 4719 { 4720 struct qla_hw_data *ha = vha->hw; 4721 int res = QLA_SUCCESS, rval; 4722 int greater_wwpn = 0; 4723 int logged_in = 0; 4724 4725 if (ha->current_topology != ISP_CFG_N) 4726 return res; 4727 4728 if (wwn_to_u64(vha->port_name) > 4729 wwn_to_u64(vha->n2n_port_name)) { 4730 ql_dbg(ql_dbg_disc, vha, 0x2002, 4731 "HBA WWPN is greater %llx > target %llx\n", 4732 wwn_to_u64(vha->port_name), 4733 wwn_to_u64(vha->n2n_port_name)); 4734 greater_wwpn = 1; 4735 fcport->d_id.b24 = vha->n2n_id; 4736 } 4737 4738 fcport->loop_id = vha->loop_id; 4739 fcport->fc4f_nvme = 0; 4740 fcport->query = 1; 4741 4742 ql_dbg(ql_dbg_disc, vha, 0x4001, 4743 "Initiate N2N login handler: HBA port_id=%06x loopid=%d\n", 4744 fcport->d_id.b24, vha->loop_id); 4745 4746 /* Fill in member data. */ 4747 if (!greater_wwpn) { 4748 rval = qla2x00_get_port_database(vha, fcport, 0); 4749 ql_dbg(ql_dbg_disc, vha, 0x1051, 4750 "Remote login-state (%x/%x) port_id=%06x loop_id=%x, rval=%d\n", 4751 fcport->current_login_state, fcport->last_login_state, 4752 fcport->d_id.b24, fcport->loop_id, rval); 4753 4754 if (((fcport->current_login_state & 0xf) == 0x4) || 4755 ((fcport->current_login_state & 0xf) == 0x6)) 4756 logged_in = 1; 4757 } 4758 4759 if (logged_in || greater_wwpn) { 4760 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 4761 qla_nvme_register_hba(vha); 4762 4763 /* Set connected N_Port d_id */ 4764 if (vha->flags.nvme_enabled) 4765 fcport->fc4f_nvme = 1; 4766 4767 fcport->scan_state = QLA_FCPORT_FOUND; 4768 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4769 fcport->disc_state = DSC_GNL; 4770 fcport->n2n_flag = 1; 4771 fcport->flags = 3; 4772 vha->hw->flags.gpsc_supported = 0; 4773 4774 if (greater_wwpn) { 4775 ql_dbg(ql_dbg_disc, vha, 0x20e5, 4776 "%s %d PLOGI ELS %8phC\n", 4777 __func__, __LINE__, fcport->port_name); 4778 4779 res = qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI, 4780 fcport, fcport->d_id); 4781 } 4782 4783 if (res != QLA_SUCCESS) { 4784 ql_log(ql_log_info, vha, 0xd04d, 4785 "PLOGI Failed: portid=%06x - retrying\n", 4786 fcport->d_id.b24); 4787 res = QLA_SUCCESS; 4788 } else { 4789 /* State 0x6 means FCP PRLI complete */ 4790 if ((fcport->current_login_state & 0xf) == 0x6) { 4791 ql_dbg(ql_dbg_disc, vha, 0x2118, 4792 "%s %d %8phC post GPDB work\n", 4793 __func__, __LINE__, fcport->port_name); 4794 fcport->chip_reset = 4795 vha->hw->base_qpair->chip_reset; 4796 qla24xx_post_gpdb_work(vha, fcport, 0); 4797 } else { 4798 ql_dbg(ql_dbg_disc, vha, 0x2118, 4799 "%s %d %8phC post NVMe PRLI\n", 4800 __func__, __LINE__, fcport->port_name); 4801 qla24xx_post_prli_work(vha, fcport); 4802 } 4803 } 4804 } else { 4805 /* Wait for next database change */ 4806 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags); 4807 } 4808 4809 return res; 4810 } 4811 4812 /* 4813 * qla2x00_configure_local_loop 4814 * Updates Fibre Channel Device Database with local loop devices. 4815 * 4816 * Input: 4817 * ha = adapter block pointer. 4818 * 4819 * Returns: 4820 * 0 = success. 4821 */ 4822 static int 4823 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4824 { 4825 int rval, rval2; 4826 int found_devs; 4827 int found; 4828 fc_port_t *fcport, *new_fcport; 4829 4830 uint16_t index; 4831 uint16_t entries; 4832 char *id_iter; 4833 uint16_t loop_id; 4834 uint8_t domain, area, al_pa; 4835 struct qla_hw_data *ha = vha->hw; 4836 unsigned long flags; 4837 4838 found_devs = 0; 4839 new_fcport = NULL; 4840 entries = MAX_FIBRE_DEVICES_LOOP; 4841 4842 /* Get list of logged in devices. */ 4843 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4844 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4845 &entries); 4846 if (rval != QLA_SUCCESS) 4847 goto cleanup_allocation; 4848 4849 ql_dbg(ql_dbg_disc, vha, 0x2011, 4850 "Entries in ID list (%d).\n", entries); 4851 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 4852 (uint8_t *)ha->gid_list, 4853 entries * sizeof(struct gid_list_info)); 4854 4855 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4856 fcport->scan_state = QLA_FCPORT_SCAN; 4857 } 4858 4859 /* Allocate temporary fcport for any new fcports discovered. */ 4860 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4861 if (new_fcport == NULL) { 4862 ql_log(ql_log_warn, vha, 0x2012, 4863 "Memory allocation failed for fcport.\n"); 4864 rval = QLA_MEMORY_ALLOC_FAILED; 4865 goto cleanup_allocation; 4866 } 4867 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4868 4869 /* Inititae N2N login. */ 4870 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4871 rval = qla24xx_n2n_handle_login(vha, new_fcport); 4872 if (rval != QLA_SUCCESS) 4873 goto cleanup_allocation; 4874 return QLA_SUCCESS; 4875 } 4876 4877 /* Add devices to port list. */ 4878 id_iter = (char *)ha->gid_list; 4879 for (index = 0; index < entries; index++) { 4880 domain = ((struct gid_list_info *)id_iter)->domain; 4881 area = ((struct gid_list_info *)id_iter)->area; 4882 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 4883 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4884 loop_id = (uint16_t) 4885 ((struct gid_list_info *)id_iter)->loop_id_2100; 4886 else 4887 loop_id = le16_to_cpu( 4888 ((struct gid_list_info *)id_iter)->loop_id); 4889 id_iter += ha->gid_list_info_size; 4890 4891 /* Bypass reserved domain fields. */ 4892 if ((domain & 0xf0) == 0xf0) 4893 continue; 4894 4895 /* Bypass if not same domain and area of adapter. */ 4896 if (area && domain && 4897 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 4898 continue; 4899 4900 /* Bypass invalid local loop ID. */ 4901 if (loop_id > LAST_LOCAL_LOOP_ID) 4902 continue; 4903 4904 memset(new_fcport->port_name, 0, WWN_SIZE); 4905 4906 /* Fill in member data. */ 4907 new_fcport->d_id.b.domain = domain; 4908 new_fcport->d_id.b.area = area; 4909 new_fcport->d_id.b.al_pa = al_pa; 4910 new_fcport->loop_id = loop_id; 4911 new_fcport->scan_state = QLA_FCPORT_FOUND; 4912 4913 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 4914 if (rval2 != QLA_SUCCESS) { 4915 ql_dbg(ql_dbg_disc, vha, 0x2097, 4916 "Failed to retrieve fcport information " 4917 "-- get_port_database=%x, loop_id=0x%04x.\n", 4918 rval2, new_fcport->loop_id); 4919 /* Skip retry if N2N */ 4920 if (ha->current_topology != ISP_CFG_N) { 4921 ql_dbg(ql_dbg_disc, vha, 0x2105, 4922 "Scheduling resync.\n"); 4923 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4924 continue; 4925 } 4926 } 4927 4928 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4929 /* Check for matching device in port list. */ 4930 found = 0; 4931 fcport = NULL; 4932 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4933 if (memcmp(new_fcport->port_name, fcport->port_name, 4934 WWN_SIZE)) 4935 continue; 4936 4937 fcport->flags &= ~FCF_FABRIC_DEVICE; 4938 fcport->loop_id = new_fcport->loop_id; 4939 fcport->port_type = new_fcport->port_type; 4940 fcport->d_id.b24 = new_fcport->d_id.b24; 4941 memcpy(fcport->node_name, new_fcport->node_name, 4942 WWN_SIZE); 4943 fcport->scan_state = QLA_FCPORT_FOUND; 4944 found++; 4945 break; 4946 } 4947 4948 if (!found) { 4949 /* New device, add to fcports list. */ 4950 list_add_tail(&new_fcport->list, &vha->vp_fcports); 4951 4952 /* Allocate a new replacement fcport. */ 4953 fcport = new_fcport; 4954 4955 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4956 4957 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4958 4959 if (new_fcport == NULL) { 4960 ql_log(ql_log_warn, vha, 0xd031, 4961 "Failed to allocate memory for fcport.\n"); 4962 rval = QLA_MEMORY_ALLOC_FAILED; 4963 goto cleanup_allocation; 4964 } 4965 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4966 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4967 } 4968 4969 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4970 4971 /* Base iIDMA settings on HBA port speed. */ 4972 fcport->fp_speed = ha->link_data_rate; 4973 4974 found_devs++; 4975 } 4976 4977 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4978 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 4979 break; 4980 4981 if (fcport->scan_state == QLA_FCPORT_SCAN) { 4982 if ((qla_dual_mode_enabled(vha) || 4983 qla_ini_mode_enabled(vha)) && 4984 atomic_read(&fcport->state) == FCS_ONLINE) { 4985 qla2x00_mark_device_lost(vha, fcport, 4986 ql2xplogiabsentdevice, 0); 4987 if (fcport->loop_id != FC_NO_LOOP_ID && 4988 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 4989 fcport->port_type != FCT_INITIATOR && 4990 fcport->port_type != FCT_BROADCAST) { 4991 ql_dbg(ql_dbg_disc, vha, 0x20f0, 4992 "%s %d %8phC post del sess\n", 4993 __func__, __LINE__, 4994 fcport->port_name); 4995 4996 qlt_schedule_sess_for_deletion(fcport); 4997 continue; 4998 } 4999 } 5000 } 5001 5002 if (fcport->scan_state == QLA_FCPORT_FOUND) 5003 qla24xx_fcport_handle_login(vha, fcport); 5004 } 5005 5006 cleanup_allocation: 5007 kfree(new_fcport); 5008 5009 if (rval != QLA_SUCCESS) { 5010 ql_dbg(ql_dbg_disc, vha, 0x2098, 5011 "Configure local loop error exit: rval=%x.\n", rval); 5012 } 5013 5014 return (rval); 5015 } 5016 5017 static void 5018 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5019 { 5020 int rval; 5021 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5022 struct qla_hw_data *ha = vha->hw; 5023 5024 if (!IS_IIDMA_CAPABLE(ha)) 5025 return; 5026 5027 if (atomic_read(&fcport->state) != FCS_ONLINE) 5028 return; 5029 5030 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5031 fcport->fp_speed > ha->link_data_rate) 5032 return; 5033 5034 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5035 mb); 5036 if (rval != QLA_SUCCESS) { 5037 ql_dbg(ql_dbg_disc, vha, 0x2004, 5038 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5039 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5040 } else { 5041 ql_dbg(ql_dbg_disc, vha, 0x2005, 5042 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5043 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5044 fcport->fp_speed, fcport->port_name); 5045 } 5046 } 5047 5048 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5049 static void 5050 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5051 { 5052 struct fc_rport_identifiers rport_ids; 5053 struct fc_rport *rport; 5054 unsigned long flags; 5055 5056 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5057 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5058 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5059 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5060 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5061 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5062 if (!rport) { 5063 ql_log(ql_log_warn, vha, 0x2006, 5064 "Unable to allocate fc remote port.\n"); 5065 return; 5066 } 5067 5068 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5069 *((fc_port_t **)rport->dd_data) = fcport; 5070 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5071 5072 rport->supported_classes = fcport->supported_classes; 5073 5074 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5075 if (fcport->port_type == FCT_INITIATOR) 5076 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5077 if (fcport->port_type == FCT_TARGET) 5078 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5079 5080 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5081 "%s %8phN. rport %p is %s mode\n", 5082 __func__, fcport->port_name, rport, 5083 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5084 5085 fc_remote_port_rolechg(rport, rport_ids.roles); 5086 } 5087 5088 /* 5089 * qla2x00_update_fcport 5090 * Updates device on list. 5091 * 5092 * Input: 5093 * ha = adapter block pointer. 5094 * fcport = port structure pointer. 5095 * 5096 * Return: 5097 * 0 - Success 5098 * BIT_0 - error 5099 * 5100 * Context: 5101 * Kernel context. 5102 */ 5103 void 5104 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5105 { 5106 fcport->vha = vha; 5107 5108 if (IS_SW_RESV_ADDR(fcport->d_id)) 5109 return; 5110 5111 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5112 __func__, fcport->port_name); 5113 5114 if (IS_QLAFX00(vha->hw)) { 5115 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5116 goto reg_port; 5117 } 5118 fcport->login_retry = 0; 5119 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5120 fcport->disc_state = DSC_LOGIN_COMPLETE; 5121 fcport->deleted = 0; 5122 fcport->logout_on_delete = 1; 5123 5124 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5125 qla2x00_iidma_fcport(vha, fcport); 5126 5127 if (fcport->fc4f_nvme) { 5128 qla_nvme_register_remote(vha, fcport); 5129 return; 5130 } 5131 5132 qla24xx_update_fcport_fcp_prio(vha, fcport); 5133 5134 reg_port: 5135 switch (vha->host->active_mode) { 5136 case MODE_INITIATOR: 5137 qla2x00_reg_remote_port(vha, fcport); 5138 break; 5139 case MODE_TARGET: 5140 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5141 !vha->vha_tgt.qla_tgt->tgt_stopped) 5142 qlt_fc_port_added(vha, fcport); 5143 break; 5144 case MODE_DUAL: 5145 qla2x00_reg_remote_port(vha, fcport); 5146 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5147 !vha->vha_tgt.qla_tgt->tgt_stopped) 5148 qlt_fc_port_added(vha, fcport); 5149 break; 5150 default: 5151 break; 5152 } 5153 } 5154 5155 /* 5156 * qla2x00_configure_fabric 5157 * Setup SNS devices with loop ID's. 5158 * 5159 * Input: 5160 * ha = adapter block pointer. 5161 * 5162 * Returns: 5163 * 0 = success. 5164 * BIT_0 = error 5165 */ 5166 static int 5167 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5168 { 5169 int rval; 5170 fc_port_t *fcport; 5171 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5172 uint16_t loop_id; 5173 LIST_HEAD(new_fcports); 5174 struct qla_hw_data *ha = vha->hw; 5175 int discovery_gen; 5176 5177 /* If FL port exists, then SNS is present */ 5178 if (IS_FWI2_CAPABLE(ha)) 5179 loop_id = NPH_F_PORT; 5180 else 5181 loop_id = SNS_FL_PORT; 5182 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5183 if (rval != QLA_SUCCESS) { 5184 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5185 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5186 5187 vha->device_flags &= ~SWITCH_FOUND; 5188 return (QLA_SUCCESS); 5189 } 5190 vha->device_flags |= SWITCH_FOUND; 5191 5192 5193 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5194 rval = qla2x00_send_change_request(vha, 0x3, 0); 5195 if (rval != QLA_SUCCESS) 5196 ql_log(ql_log_warn, vha, 0x121, 5197 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5198 rval); 5199 } 5200 5201 5202 do { 5203 qla2x00_mgmt_svr_login(vha); 5204 5205 /* FDMI support. */ 5206 if (ql2xfdmienable && 5207 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5208 qla2x00_fdmi_register(vha); 5209 5210 /* Ensure we are logged into the SNS. */ 5211 loop_id = NPH_SNS_LID(ha); 5212 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5213 0xfc, mb, BIT_1|BIT_0); 5214 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5215 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5216 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5217 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5218 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5219 return rval; 5220 } 5221 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5222 if (qla2x00_rft_id(vha)) { 5223 /* EMPTY */ 5224 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5225 "Register FC-4 TYPE failed.\n"); 5226 if (test_bit(LOOP_RESYNC_NEEDED, 5227 &vha->dpc_flags)) 5228 break; 5229 } 5230 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5231 /* EMPTY */ 5232 ql_dbg(ql_dbg_disc, vha, 0x209a, 5233 "Register FC-4 Features failed.\n"); 5234 if (test_bit(LOOP_RESYNC_NEEDED, 5235 &vha->dpc_flags)) 5236 break; 5237 } 5238 if (vha->flags.nvme_enabled) { 5239 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5240 ql_dbg(ql_dbg_disc, vha, 0x2049, 5241 "Register NVME FC Type Features failed.\n"); 5242 } 5243 } 5244 if (qla2x00_rnn_id(vha)) { 5245 /* EMPTY */ 5246 ql_dbg(ql_dbg_disc, vha, 0x2104, 5247 "Register Node Name failed.\n"); 5248 if (test_bit(LOOP_RESYNC_NEEDED, 5249 &vha->dpc_flags)) 5250 break; 5251 } else if (qla2x00_rsnn_nn(vha)) { 5252 /* EMPTY */ 5253 ql_dbg(ql_dbg_disc, vha, 0x209b, 5254 "Register Symbolic Node Name failed.\n"); 5255 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5256 break; 5257 } 5258 } 5259 5260 5261 /* Mark the time right before querying FW for connected ports. 5262 * This process is long, asynchronous and by the time it's done, 5263 * collected information might not be accurate anymore. E.g. 5264 * disconnected port might have re-connected and a brand new 5265 * session has been created. In this case session's generation 5266 * will be newer than discovery_gen. */ 5267 qlt_do_generation_tick(vha, &discovery_gen); 5268 5269 if (USE_ASYNC_SCAN(ha)) { 5270 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5271 NULL); 5272 if (rval) 5273 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5274 } else { 5275 list_for_each_entry(fcport, &vha->vp_fcports, list) 5276 fcport->scan_state = QLA_FCPORT_SCAN; 5277 5278 rval = qla2x00_find_all_fabric_devs(vha); 5279 } 5280 if (rval != QLA_SUCCESS) 5281 break; 5282 } while (0); 5283 5284 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5285 qla_nvme_register_hba(vha); 5286 5287 if (rval) 5288 ql_dbg(ql_dbg_disc, vha, 0x2068, 5289 "Configure fabric error exit rval=%d.\n", rval); 5290 5291 return (rval); 5292 } 5293 5294 /* 5295 * qla2x00_find_all_fabric_devs 5296 * 5297 * Input: 5298 * ha = adapter block pointer. 5299 * dev = database device entry pointer. 5300 * 5301 * Returns: 5302 * 0 = success. 5303 * 5304 * Context: 5305 * Kernel context. 5306 */ 5307 static int 5308 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5309 { 5310 int rval; 5311 uint16_t loop_id; 5312 fc_port_t *fcport, *new_fcport; 5313 int found; 5314 5315 sw_info_t *swl; 5316 int swl_idx; 5317 int first_dev, last_dev; 5318 port_id_t wrap = {}, nxt_d_id; 5319 struct qla_hw_data *ha = vha->hw; 5320 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5321 unsigned long flags; 5322 5323 rval = QLA_SUCCESS; 5324 5325 /* Try GID_PT to get device list, else GAN. */ 5326 if (!ha->swl) 5327 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5328 GFP_KERNEL); 5329 swl = ha->swl; 5330 if (!swl) { 5331 /*EMPTY*/ 5332 ql_dbg(ql_dbg_disc, vha, 0x209c, 5333 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5334 } else { 5335 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5336 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5337 swl = NULL; 5338 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5339 return rval; 5340 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5341 swl = NULL; 5342 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5343 return rval; 5344 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5345 swl = NULL; 5346 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5347 return rval; 5348 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5349 swl = NULL; 5350 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5351 return rval; 5352 } 5353 5354 /* If other queries succeeded probe for FC-4 type */ 5355 if (swl) { 5356 qla2x00_gff_id(vha, swl); 5357 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5358 return rval; 5359 } 5360 } 5361 swl_idx = 0; 5362 5363 /* Allocate temporary fcport for any new fcports discovered. */ 5364 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5365 if (new_fcport == NULL) { 5366 ql_log(ql_log_warn, vha, 0x209d, 5367 "Failed to allocate memory for fcport.\n"); 5368 return (QLA_MEMORY_ALLOC_FAILED); 5369 } 5370 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5371 /* Set start port ID scan at adapter ID. */ 5372 first_dev = 1; 5373 last_dev = 0; 5374 5375 /* Starting free loop ID. */ 5376 loop_id = ha->min_external_loopid; 5377 for (; loop_id <= ha->max_loop_id; loop_id++) { 5378 if (qla2x00_is_reserved_id(vha, loop_id)) 5379 continue; 5380 5381 if (ha->current_topology == ISP_CFG_FL && 5382 (atomic_read(&vha->loop_down_timer) || 5383 LOOP_TRANSITION(vha))) { 5384 atomic_set(&vha->loop_down_timer, 0); 5385 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5386 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5387 break; 5388 } 5389 5390 if (swl != NULL) { 5391 if (last_dev) { 5392 wrap.b24 = new_fcport->d_id.b24; 5393 } else { 5394 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5395 memcpy(new_fcport->node_name, 5396 swl[swl_idx].node_name, WWN_SIZE); 5397 memcpy(new_fcport->port_name, 5398 swl[swl_idx].port_name, WWN_SIZE); 5399 memcpy(new_fcport->fabric_port_name, 5400 swl[swl_idx].fabric_port_name, WWN_SIZE); 5401 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5402 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5403 5404 new_fcport->nvme_flag = 0; 5405 new_fcport->fc4f_nvme = 0; 5406 if (vha->flags.nvme_enabled && 5407 swl[swl_idx].fc4f_nvme) { 5408 new_fcport->fc4f_nvme = 5409 swl[swl_idx].fc4f_nvme; 5410 ql_log(ql_log_info, vha, 0x2131, 5411 "FOUND: NVME port %8phC as FC Type 28h\n", 5412 new_fcport->port_name); 5413 } 5414 5415 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5416 last_dev = 1; 5417 } 5418 swl_idx++; 5419 } 5420 } else { 5421 /* Send GA_NXT to the switch */ 5422 rval = qla2x00_ga_nxt(vha, new_fcport); 5423 if (rval != QLA_SUCCESS) { 5424 ql_log(ql_log_warn, vha, 0x209e, 5425 "SNS scan failed -- assuming " 5426 "zero-entry result.\n"); 5427 rval = QLA_SUCCESS; 5428 break; 5429 } 5430 } 5431 5432 /* If wrap on switch device list, exit. */ 5433 if (first_dev) { 5434 wrap.b24 = new_fcport->d_id.b24; 5435 first_dev = 0; 5436 } else if (new_fcport->d_id.b24 == wrap.b24) { 5437 ql_dbg(ql_dbg_disc, vha, 0x209f, 5438 "Device wrap (%02x%02x%02x).\n", 5439 new_fcport->d_id.b.domain, 5440 new_fcport->d_id.b.area, 5441 new_fcport->d_id.b.al_pa); 5442 break; 5443 } 5444 5445 /* Bypass if same physical adapter. */ 5446 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5447 continue; 5448 5449 /* Bypass virtual ports of the same host. */ 5450 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5451 continue; 5452 5453 /* Bypass if same domain and area of adapter. */ 5454 if (((new_fcport->d_id.b24 & 0xffff00) == 5455 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5456 ISP_CFG_FL) 5457 continue; 5458 5459 /* Bypass reserved domain fields. */ 5460 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5461 continue; 5462 5463 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5464 if (ql2xgffidenable && 5465 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5466 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5467 continue; 5468 5469 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5470 5471 /* Locate matching device in database. */ 5472 found = 0; 5473 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5474 if (memcmp(new_fcport->port_name, fcport->port_name, 5475 WWN_SIZE)) 5476 continue; 5477 5478 fcport->scan_state = QLA_FCPORT_FOUND; 5479 5480 found++; 5481 5482 /* Update port state. */ 5483 memcpy(fcport->fabric_port_name, 5484 new_fcport->fabric_port_name, WWN_SIZE); 5485 fcport->fp_speed = new_fcport->fp_speed; 5486 5487 /* 5488 * If address the same and state FCS_ONLINE 5489 * (or in target mode), nothing changed. 5490 */ 5491 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5492 (atomic_read(&fcport->state) == FCS_ONLINE || 5493 (vha->host->active_mode == MODE_TARGET))) { 5494 break; 5495 } 5496 5497 /* 5498 * If device was not a fabric device before. 5499 */ 5500 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5501 fcport->d_id.b24 = new_fcport->d_id.b24; 5502 qla2x00_clear_loop_id(fcport); 5503 fcport->flags |= (FCF_FABRIC_DEVICE | 5504 FCF_LOGIN_NEEDED); 5505 break; 5506 } 5507 5508 /* 5509 * Port ID changed or device was marked to be updated; 5510 * Log it out if still logged in and mark it for 5511 * relogin later. 5512 */ 5513 if (qla_tgt_mode_enabled(base_vha)) { 5514 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5515 "port changed FC ID, %8phC" 5516 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5517 fcport->port_name, 5518 fcport->d_id.b.domain, 5519 fcport->d_id.b.area, 5520 fcport->d_id.b.al_pa, 5521 fcport->loop_id, 5522 new_fcport->d_id.b.domain, 5523 new_fcport->d_id.b.area, 5524 new_fcport->d_id.b.al_pa); 5525 fcport->d_id.b24 = new_fcport->d_id.b24; 5526 break; 5527 } 5528 5529 fcport->d_id.b24 = new_fcport->d_id.b24; 5530 fcport->flags |= FCF_LOGIN_NEEDED; 5531 break; 5532 } 5533 5534 if (fcport->fc4f_nvme) { 5535 if (fcport->disc_state == DSC_DELETE_PEND) { 5536 fcport->disc_state = DSC_GNL; 5537 vha->fcport_count--; 5538 fcport->login_succ = 0; 5539 } 5540 } 5541 5542 if (found) { 5543 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5544 continue; 5545 } 5546 /* If device was not in our fcports list, then add it. */ 5547 new_fcport->scan_state = QLA_FCPORT_FOUND; 5548 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5549 5550 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5551 5552 5553 /* Allocate a new replacement fcport. */ 5554 nxt_d_id.b24 = new_fcport->d_id.b24; 5555 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5556 if (new_fcport == NULL) { 5557 ql_log(ql_log_warn, vha, 0xd032, 5558 "Memory allocation failed for fcport.\n"); 5559 return (QLA_MEMORY_ALLOC_FAILED); 5560 } 5561 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5562 new_fcport->d_id.b24 = nxt_d_id.b24; 5563 } 5564 5565 qla2x00_free_fcport(new_fcport); 5566 5567 /* 5568 * Logout all previous fabric dev marked lost, except FCP2 devices. 5569 */ 5570 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5571 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5572 break; 5573 5574 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5575 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5576 continue; 5577 5578 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5579 if ((qla_dual_mode_enabled(vha) || 5580 qla_ini_mode_enabled(vha)) && 5581 atomic_read(&fcport->state) == FCS_ONLINE) { 5582 qla2x00_mark_device_lost(vha, fcport, 5583 ql2xplogiabsentdevice, 0); 5584 if (fcport->loop_id != FC_NO_LOOP_ID && 5585 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5586 fcport->port_type != FCT_INITIATOR && 5587 fcport->port_type != FCT_BROADCAST) { 5588 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5589 "%s %d %8phC post del sess\n", 5590 __func__, __LINE__, 5591 fcport->port_name); 5592 qlt_schedule_sess_for_deletion(fcport); 5593 continue; 5594 } 5595 } 5596 } 5597 5598 if (fcport->scan_state == QLA_FCPORT_FOUND) 5599 qla24xx_fcport_handle_login(vha, fcport); 5600 } 5601 return (rval); 5602 } 5603 5604 /* 5605 * qla2x00_find_new_loop_id 5606 * Scan through our port list and find a new usable loop ID. 5607 * 5608 * Input: 5609 * ha: adapter state pointer. 5610 * dev: port structure pointer. 5611 * 5612 * Returns: 5613 * qla2x00 local function return status code. 5614 * 5615 * Context: 5616 * Kernel context. 5617 */ 5618 int 5619 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5620 { 5621 int rval; 5622 struct qla_hw_data *ha = vha->hw; 5623 unsigned long flags = 0; 5624 5625 rval = QLA_SUCCESS; 5626 5627 spin_lock_irqsave(&ha->vport_slock, flags); 5628 5629 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5630 LOOPID_MAP_SIZE); 5631 if (dev->loop_id >= LOOPID_MAP_SIZE || 5632 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5633 dev->loop_id = FC_NO_LOOP_ID; 5634 rval = QLA_FUNCTION_FAILED; 5635 } else 5636 set_bit(dev->loop_id, ha->loop_id_map); 5637 5638 spin_unlock_irqrestore(&ha->vport_slock, flags); 5639 5640 if (rval == QLA_SUCCESS) 5641 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5642 "Assigning new loopid=%x, portid=%x.\n", 5643 dev->loop_id, dev->d_id.b24); 5644 else 5645 ql_log(ql_log_warn, dev->vha, 0x2087, 5646 "No loop_id's available, portid=%x.\n", 5647 dev->d_id.b24); 5648 5649 return (rval); 5650 } 5651 5652 5653 /* 5654 * qla2x00_fabric_login 5655 * Issue fabric login command. 5656 * 5657 * Input: 5658 * ha = adapter block pointer. 5659 * device = pointer to FC device type structure. 5660 * 5661 * Returns: 5662 * 0 - Login successfully 5663 * 1 - Login failed 5664 * 2 - Initiator device 5665 * 3 - Fatal error 5666 */ 5667 int 5668 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5669 uint16_t *next_loopid) 5670 { 5671 int rval; 5672 int retry; 5673 uint16_t tmp_loopid; 5674 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5675 struct qla_hw_data *ha = vha->hw; 5676 5677 retry = 0; 5678 tmp_loopid = 0; 5679 5680 for (;;) { 5681 ql_dbg(ql_dbg_disc, vha, 0x2000, 5682 "Trying Fabric Login w/loop id 0x%04x for port " 5683 "%02x%02x%02x.\n", 5684 fcport->loop_id, fcport->d_id.b.domain, 5685 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5686 5687 /* Login fcport on switch. */ 5688 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5689 fcport->d_id.b.domain, fcport->d_id.b.area, 5690 fcport->d_id.b.al_pa, mb, BIT_0); 5691 if (rval != QLA_SUCCESS) { 5692 return rval; 5693 } 5694 if (mb[0] == MBS_PORT_ID_USED) { 5695 /* 5696 * Device has another loop ID. The firmware team 5697 * recommends the driver perform an implicit login with 5698 * the specified ID again. The ID we just used is save 5699 * here so we return with an ID that can be tried by 5700 * the next login. 5701 */ 5702 retry++; 5703 tmp_loopid = fcport->loop_id; 5704 fcport->loop_id = mb[1]; 5705 5706 ql_dbg(ql_dbg_disc, vha, 0x2001, 5707 "Fabric Login: port in use - next loop " 5708 "id=0x%04x, port id= %02x%02x%02x.\n", 5709 fcport->loop_id, fcport->d_id.b.domain, 5710 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5711 5712 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5713 /* 5714 * Login succeeded. 5715 */ 5716 if (retry) { 5717 /* A retry occurred before. */ 5718 *next_loopid = tmp_loopid; 5719 } else { 5720 /* 5721 * No retry occurred before. Just increment the 5722 * ID value for next login. 5723 */ 5724 *next_loopid = (fcport->loop_id + 1); 5725 } 5726 5727 if (mb[1] & BIT_0) { 5728 fcport->port_type = FCT_INITIATOR; 5729 } else { 5730 fcport->port_type = FCT_TARGET; 5731 if (mb[1] & BIT_1) { 5732 fcport->flags |= FCF_FCP2_DEVICE; 5733 } 5734 } 5735 5736 if (mb[10] & BIT_0) 5737 fcport->supported_classes |= FC_COS_CLASS2; 5738 if (mb[10] & BIT_1) 5739 fcport->supported_classes |= FC_COS_CLASS3; 5740 5741 if (IS_FWI2_CAPABLE(ha)) { 5742 if (mb[10] & BIT_7) 5743 fcport->flags |= 5744 FCF_CONF_COMP_SUPPORTED; 5745 } 5746 5747 rval = QLA_SUCCESS; 5748 break; 5749 } else if (mb[0] == MBS_LOOP_ID_USED) { 5750 /* 5751 * Loop ID already used, try next loop ID. 5752 */ 5753 fcport->loop_id++; 5754 rval = qla2x00_find_new_loop_id(vha, fcport); 5755 if (rval != QLA_SUCCESS) { 5756 /* Ran out of loop IDs to use */ 5757 break; 5758 } 5759 } else if (mb[0] == MBS_COMMAND_ERROR) { 5760 /* 5761 * Firmware possibly timed out during login. If NO 5762 * retries are left to do then the device is declared 5763 * dead. 5764 */ 5765 *next_loopid = fcport->loop_id; 5766 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5767 fcport->d_id.b.domain, fcport->d_id.b.area, 5768 fcport->d_id.b.al_pa); 5769 qla2x00_mark_device_lost(vha, fcport, 1, 0); 5770 5771 rval = 1; 5772 break; 5773 } else { 5774 /* 5775 * unrecoverable / not handled error 5776 */ 5777 ql_dbg(ql_dbg_disc, vha, 0x2002, 5778 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 5779 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 5780 fcport->d_id.b.area, fcport->d_id.b.al_pa, 5781 fcport->loop_id, jiffies); 5782 5783 *next_loopid = fcport->loop_id; 5784 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5785 fcport->d_id.b.domain, fcport->d_id.b.area, 5786 fcport->d_id.b.al_pa); 5787 qla2x00_clear_loop_id(fcport); 5788 fcport->login_retry = 0; 5789 5790 rval = 3; 5791 break; 5792 } 5793 } 5794 5795 return (rval); 5796 } 5797 5798 /* 5799 * qla2x00_local_device_login 5800 * Issue local device login command. 5801 * 5802 * Input: 5803 * ha = adapter block pointer. 5804 * loop_id = loop id of device to login to. 5805 * 5806 * Returns (Where's the #define!!!!): 5807 * 0 - Login successfully 5808 * 1 - Login failed 5809 * 3 - Fatal error 5810 */ 5811 int 5812 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 5813 { 5814 int rval; 5815 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5816 5817 memset(mb, 0, sizeof(mb)); 5818 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 5819 if (rval == QLA_SUCCESS) { 5820 /* Interrogate mailbox registers for any errors */ 5821 if (mb[0] == MBS_COMMAND_ERROR) 5822 rval = 1; 5823 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 5824 /* device not in PCB table */ 5825 rval = 3; 5826 } 5827 5828 return (rval); 5829 } 5830 5831 /* 5832 * qla2x00_loop_resync 5833 * Resync with fibre channel devices. 5834 * 5835 * Input: 5836 * ha = adapter block pointer. 5837 * 5838 * Returns: 5839 * 0 = success 5840 */ 5841 int 5842 qla2x00_loop_resync(scsi_qla_host_t *vha) 5843 { 5844 int rval = QLA_SUCCESS; 5845 uint32_t wait_time; 5846 struct req_que *req; 5847 struct rsp_que *rsp; 5848 5849 req = vha->req; 5850 rsp = req->rsp; 5851 5852 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5853 if (vha->flags.online) { 5854 if (!(rval = qla2x00_fw_ready(vha))) { 5855 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5856 wait_time = 256; 5857 do { 5858 if (!IS_QLAFX00(vha->hw)) { 5859 /* 5860 * Issue a marker after FW becomes 5861 * ready. 5862 */ 5863 qla2x00_marker(vha, req, rsp, 0, 0, 5864 MK_SYNC_ALL); 5865 vha->marker_needed = 0; 5866 } 5867 5868 /* Remap devices on Loop. */ 5869 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5870 5871 if (IS_QLAFX00(vha->hw)) 5872 qlafx00_configure_devices(vha); 5873 else 5874 qla2x00_configure_loop(vha); 5875 5876 wait_time--; 5877 } while (!atomic_read(&vha->loop_down_timer) && 5878 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5879 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 5880 &vha->dpc_flags))); 5881 } 5882 } 5883 5884 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5885 return (QLA_FUNCTION_FAILED); 5886 5887 if (rval) 5888 ql_dbg(ql_dbg_disc, vha, 0x206c, 5889 "%s *** FAILED ***.\n", __func__); 5890 5891 return (rval); 5892 } 5893 5894 /* 5895 * qla2x00_perform_loop_resync 5896 * Description: This function will set the appropriate flags and call 5897 * qla2x00_loop_resync. If successful loop will be resynced 5898 * Arguments : scsi_qla_host_t pointer 5899 * returm : Success or Failure 5900 */ 5901 5902 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 5903 { 5904 int32_t rval = 0; 5905 5906 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 5907 /*Configure the flags so that resync happens properly*/ 5908 atomic_set(&ha->loop_down_timer, 0); 5909 if (!(ha->device_flags & DFLG_NO_CABLE)) { 5910 atomic_set(&ha->loop_state, LOOP_UP); 5911 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 5912 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 5913 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 5914 5915 rval = qla2x00_loop_resync(ha); 5916 } else 5917 atomic_set(&ha->loop_state, LOOP_DEAD); 5918 5919 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 5920 } 5921 5922 return rval; 5923 } 5924 5925 void 5926 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 5927 { 5928 fc_port_t *fcport; 5929 struct scsi_qla_host *vha; 5930 struct qla_hw_data *ha = base_vha->hw; 5931 unsigned long flags; 5932 5933 spin_lock_irqsave(&ha->vport_slock, flags); 5934 /* Go with deferred removal of rport references. */ 5935 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 5936 atomic_inc(&vha->vref_count); 5937 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5938 if (fcport->drport && 5939 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 5940 spin_unlock_irqrestore(&ha->vport_slock, flags); 5941 qla2x00_rport_del(fcport); 5942 5943 spin_lock_irqsave(&ha->vport_slock, flags); 5944 } 5945 } 5946 atomic_dec(&vha->vref_count); 5947 wake_up(&vha->vref_waitq); 5948 } 5949 spin_unlock_irqrestore(&ha->vport_slock, flags); 5950 } 5951 5952 /* Assumes idc_lock always held on entry */ 5953 void 5954 qla83xx_reset_ownership(scsi_qla_host_t *vha) 5955 { 5956 struct qla_hw_data *ha = vha->hw; 5957 uint32_t drv_presence, drv_presence_mask; 5958 uint32_t dev_part_info1, dev_part_info2, class_type; 5959 uint32_t class_type_mask = 0x3; 5960 uint16_t fcoe_other_function = 0xffff, i; 5961 5962 if (IS_QLA8044(ha)) { 5963 drv_presence = qla8044_rd_direct(vha, 5964 QLA8044_CRB_DRV_ACTIVE_INDEX); 5965 dev_part_info1 = qla8044_rd_direct(vha, 5966 QLA8044_CRB_DEV_PART_INFO_INDEX); 5967 dev_part_info2 = qla8044_rd_direct(vha, 5968 QLA8044_CRB_DEV_PART_INFO2); 5969 } else { 5970 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 5971 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 5972 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 5973 } 5974 for (i = 0; i < 8; i++) { 5975 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 5976 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5977 (i != ha->portnum)) { 5978 fcoe_other_function = i; 5979 break; 5980 } 5981 } 5982 if (fcoe_other_function == 0xffff) { 5983 for (i = 0; i < 8; i++) { 5984 class_type = ((dev_part_info2 >> (i * 4)) & 5985 class_type_mask); 5986 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5987 ((i + 8) != ha->portnum)) { 5988 fcoe_other_function = i + 8; 5989 break; 5990 } 5991 } 5992 } 5993 /* 5994 * Prepare drv-presence mask based on fcoe functions present. 5995 * However consider only valid physical fcoe function numbers (0-15). 5996 */ 5997 drv_presence_mask = ~((1 << (ha->portnum)) | 5998 ((fcoe_other_function == 0xffff) ? 5999 0 : (1 << (fcoe_other_function)))); 6000 6001 /* We are the reset owner iff: 6002 * - No other protocol drivers present. 6003 * - This is the lowest among fcoe functions. */ 6004 if (!(drv_presence & drv_presence_mask) && 6005 (ha->portnum < fcoe_other_function)) { 6006 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6007 "This host is Reset owner.\n"); 6008 ha->flags.nic_core_reset_owner = 1; 6009 } 6010 } 6011 6012 static int 6013 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6014 { 6015 int rval = QLA_SUCCESS; 6016 struct qla_hw_data *ha = vha->hw; 6017 uint32_t drv_ack; 6018 6019 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6020 if (rval == QLA_SUCCESS) { 6021 drv_ack |= (1 << ha->portnum); 6022 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6023 } 6024 6025 return rval; 6026 } 6027 6028 static int 6029 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6030 { 6031 int rval = QLA_SUCCESS; 6032 struct qla_hw_data *ha = vha->hw; 6033 uint32_t drv_ack; 6034 6035 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6036 if (rval == QLA_SUCCESS) { 6037 drv_ack &= ~(1 << ha->portnum); 6038 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6039 } 6040 6041 return rval; 6042 } 6043 6044 static const char * 6045 qla83xx_dev_state_to_string(uint32_t dev_state) 6046 { 6047 switch (dev_state) { 6048 case QLA8XXX_DEV_COLD: 6049 return "COLD/RE-INIT"; 6050 case QLA8XXX_DEV_INITIALIZING: 6051 return "INITIALIZING"; 6052 case QLA8XXX_DEV_READY: 6053 return "READY"; 6054 case QLA8XXX_DEV_NEED_RESET: 6055 return "NEED RESET"; 6056 case QLA8XXX_DEV_NEED_QUIESCENT: 6057 return "NEED QUIESCENT"; 6058 case QLA8XXX_DEV_FAILED: 6059 return "FAILED"; 6060 case QLA8XXX_DEV_QUIESCENT: 6061 return "QUIESCENT"; 6062 default: 6063 return "Unknown"; 6064 } 6065 } 6066 6067 /* Assumes idc-lock always held on entry */ 6068 void 6069 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6070 { 6071 struct qla_hw_data *ha = vha->hw; 6072 uint32_t idc_audit_reg = 0, duration_secs = 0; 6073 6074 switch (audit_type) { 6075 case IDC_AUDIT_TIMESTAMP: 6076 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6077 idc_audit_reg = (ha->portnum) | 6078 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6079 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6080 break; 6081 6082 case IDC_AUDIT_COMPLETION: 6083 duration_secs = ((jiffies_to_msecs(jiffies) - 6084 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6085 idc_audit_reg = (ha->portnum) | 6086 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6087 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6088 break; 6089 6090 default: 6091 ql_log(ql_log_warn, vha, 0xb078, 6092 "Invalid audit type specified.\n"); 6093 break; 6094 } 6095 } 6096 6097 /* Assumes idc_lock always held on entry */ 6098 static int 6099 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6100 { 6101 struct qla_hw_data *ha = vha->hw; 6102 uint32_t idc_control, dev_state; 6103 6104 __qla83xx_get_idc_control(vha, &idc_control); 6105 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6106 ql_log(ql_log_info, vha, 0xb080, 6107 "NIC Core reset has been disabled. idc-control=0x%x\n", 6108 idc_control); 6109 return QLA_FUNCTION_FAILED; 6110 } 6111 6112 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6113 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6114 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6115 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6116 QLA8XXX_DEV_NEED_RESET); 6117 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6118 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6119 } else { 6120 const char *state = qla83xx_dev_state_to_string(dev_state); 6121 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6122 6123 /* SV: XXX: Is timeout required here? */ 6124 /* Wait for IDC state change READY -> NEED_RESET */ 6125 while (dev_state == QLA8XXX_DEV_READY) { 6126 qla83xx_idc_unlock(vha, 0); 6127 msleep(200); 6128 qla83xx_idc_lock(vha, 0); 6129 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6130 } 6131 } 6132 6133 /* Send IDC ack by writing to drv-ack register */ 6134 __qla83xx_set_drv_ack(vha); 6135 6136 return QLA_SUCCESS; 6137 } 6138 6139 int 6140 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6141 { 6142 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6143 } 6144 6145 int 6146 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6147 { 6148 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6149 } 6150 6151 static int 6152 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6153 { 6154 uint32_t drv_presence = 0; 6155 struct qla_hw_data *ha = vha->hw; 6156 6157 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6158 if (drv_presence & (1 << ha->portnum)) 6159 return QLA_SUCCESS; 6160 else 6161 return QLA_TEST_FAILED; 6162 } 6163 6164 int 6165 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6166 { 6167 int rval = QLA_SUCCESS; 6168 struct qla_hw_data *ha = vha->hw; 6169 6170 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6171 "Entered %s().\n", __func__); 6172 6173 if (vha->device_flags & DFLG_DEV_FAILED) { 6174 ql_log(ql_log_warn, vha, 0xb059, 6175 "Device in unrecoverable FAILED state.\n"); 6176 return QLA_FUNCTION_FAILED; 6177 } 6178 6179 qla83xx_idc_lock(vha, 0); 6180 6181 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6182 ql_log(ql_log_warn, vha, 0xb05a, 6183 "Function=0x%x has been removed from IDC participation.\n", 6184 ha->portnum); 6185 rval = QLA_FUNCTION_FAILED; 6186 goto exit; 6187 } 6188 6189 qla83xx_reset_ownership(vha); 6190 6191 rval = qla83xx_initiating_reset(vha); 6192 6193 /* 6194 * Perform reset if we are the reset-owner, 6195 * else wait till IDC state changes to READY/FAILED. 6196 */ 6197 if (rval == QLA_SUCCESS) { 6198 rval = qla83xx_idc_state_handler(vha); 6199 6200 if (rval == QLA_SUCCESS) 6201 ha->flags.nic_core_hung = 0; 6202 __qla83xx_clear_drv_ack(vha); 6203 } 6204 6205 exit: 6206 qla83xx_idc_unlock(vha, 0); 6207 6208 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6209 6210 return rval; 6211 } 6212 6213 int 6214 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6215 { 6216 struct qla_hw_data *ha = vha->hw; 6217 int rval = QLA_FUNCTION_FAILED; 6218 6219 if (!IS_MCTP_CAPABLE(ha)) { 6220 /* This message can be removed from the final version */ 6221 ql_log(ql_log_info, vha, 0x506d, 6222 "This board is not MCTP capable\n"); 6223 return rval; 6224 } 6225 6226 if (!ha->mctp_dump) { 6227 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6228 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6229 6230 if (!ha->mctp_dump) { 6231 ql_log(ql_log_warn, vha, 0x506e, 6232 "Failed to allocate memory for mctp dump\n"); 6233 return rval; 6234 } 6235 } 6236 6237 #define MCTP_DUMP_STR_ADDR 0x00000000 6238 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6239 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6240 if (rval != QLA_SUCCESS) { 6241 ql_log(ql_log_warn, vha, 0x506f, 6242 "Failed to capture mctp dump\n"); 6243 } else { 6244 ql_log(ql_log_info, vha, 0x5070, 6245 "Mctp dump capture for host (%ld/%p).\n", 6246 vha->host_no, ha->mctp_dump); 6247 ha->mctp_dumped = 1; 6248 } 6249 6250 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6251 ha->flags.nic_core_reset_hdlr_active = 1; 6252 rval = qla83xx_restart_nic_firmware(vha); 6253 if (rval) 6254 /* NIC Core reset failed. */ 6255 ql_log(ql_log_warn, vha, 0x5071, 6256 "Failed to restart nic firmware\n"); 6257 else 6258 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6259 "Restarted NIC firmware successfully.\n"); 6260 ha->flags.nic_core_reset_hdlr_active = 0; 6261 } 6262 6263 return rval; 6264 6265 } 6266 6267 /* 6268 * qla2x00_quiesce_io 6269 * Description: This function will block the new I/Os 6270 * Its not aborting any I/Os as context 6271 * is not destroyed during quiescence 6272 * Arguments: scsi_qla_host_t 6273 * return : void 6274 */ 6275 void 6276 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6277 { 6278 struct qla_hw_data *ha = vha->hw; 6279 struct scsi_qla_host *vp; 6280 6281 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6282 "Quiescing I/O - ha=%p.\n", ha); 6283 6284 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6285 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6286 atomic_set(&vha->loop_state, LOOP_DOWN); 6287 qla2x00_mark_all_devices_lost(vha, 0); 6288 list_for_each_entry(vp, &ha->vp_list, list) 6289 qla2x00_mark_all_devices_lost(vp, 0); 6290 } else { 6291 if (!atomic_read(&vha->loop_down_timer)) 6292 atomic_set(&vha->loop_down_timer, 6293 LOOP_DOWN_TIME); 6294 } 6295 /* Wait for pending cmds to complete */ 6296 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6297 } 6298 6299 void 6300 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6301 { 6302 struct qla_hw_data *ha = vha->hw; 6303 struct scsi_qla_host *vp; 6304 unsigned long flags; 6305 fc_port_t *fcport; 6306 u16 i; 6307 6308 /* For ISP82XX, driver waits for completion of the commands. 6309 * online flag should be set. 6310 */ 6311 if (!(IS_P3P_TYPE(ha))) 6312 vha->flags.online = 0; 6313 ha->flags.chip_reset_done = 0; 6314 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6315 vha->qla_stats.total_isp_aborts++; 6316 6317 ql_log(ql_log_info, vha, 0x00af, 6318 "Performing ISP error recovery - ha=%p.\n", ha); 6319 6320 /* For ISP82XX, reset_chip is just disabling interrupts. 6321 * Driver waits for the completion of the commands. 6322 * the interrupts need to be enabled. 6323 */ 6324 if (!(IS_P3P_TYPE(ha))) 6325 ha->isp_ops->reset_chip(vha); 6326 6327 SAVE_TOPO(ha); 6328 ha->flags.rida_fmt2 = 0; 6329 ha->flags.n2n_ae = 0; 6330 ha->flags.lip_ae = 0; 6331 ha->current_topology = 0; 6332 ha->flags.fw_started = 0; 6333 ha->flags.fw_init_done = 0; 6334 ha->base_qpair->chip_reset++; 6335 for (i = 0; i < ha->max_qpairs; i++) { 6336 if (ha->queue_pair_map[i]) 6337 ha->queue_pair_map[i]->chip_reset = 6338 ha->base_qpair->chip_reset; 6339 } 6340 6341 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6342 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6343 atomic_set(&vha->loop_state, LOOP_DOWN); 6344 qla2x00_mark_all_devices_lost(vha, 0); 6345 6346 spin_lock_irqsave(&ha->vport_slock, flags); 6347 list_for_each_entry(vp, &ha->vp_list, list) { 6348 atomic_inc(&vp->vref_count); 6349 spin_unlock_irqrestore(&ha->vport_slock, flags); 6350 6351 qla2x00_mark_all_devices_lost(vp, 0); 6352 6353 spin_lock_irqsave(&ha->vport_slock, flags); 6354 atomic_dec(&vp->vref_count); 6355 } 6356 spin_unlock_irqrestore(&ha->vport_slock, flags); 6357 } else { 6358 if (!atomic_read(&vha->loop_down_timer)) 6359 atomic_set(&vha->loop_down_timer, 6360 LOOP_DOWN_TIME); 6361 } 6362 6363 /* Clear all async request states across all VPs. */ 6364 list_for_each_entry(fcport, &vha->vp_fcports, list) 6365 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6366 spin_lock_irqsave(&ha->vport_slock, flags); 6367 list_for_each_entry(vp, &ha->vp_list, list) { 6368 atomic_inc(&vp->vref_count); 6369 spin_unlock_irqrestore(&ha->vport_slock, flags); 6370 6371 list_for_each_entry(fcport, &vp->vp_fcports, list) 6372 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6373 6374 spin_lock_irqsave(&ha->vport_slock, flags); 6375 atomic_dec(&vp->vref_count); 6376 } 6377 spin_unlock_irqrestore(&ha->vport_slock, flags); 6378 6379 if (!ha->flags.eeh_busy) { 6380 /* Make sure for ISP 82XX IO DMA is complete */ 6381 if (IS_P3P_TYPE(ha)) { 6382 qla82xx_chip_reset_cleanup(vha); 6383 ql_log(ql_log_info, vha, 0x00b4, 6384 "Done chip reset cleanup.\n"); 6385 6386 /* Done waiting for pending commands. 6387 * Reset the online flag. 6388 */ 6389 vha->flags.online = 0; 6390 } 6391 6392 /* Requeue all commands in outstanding command list. */ 6393 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6394 } 6395 /* memory barrier */ 6396 wmb(); 6397 } 6398 6399 /* 6400 * qla2x00_abort_isp 6401 * Resets ISP and aborts all outstanding commands. 6402 * 6403 * Input: 6404 * ha = adapter block pointer. 6405 * 6406 * Returns: 6407 * 0 = success 6408 */ 6409 int 6410 qla2x00_abort_isp(scsi_qla_host_t *vha) 6411 { 6412 int rval; 6413 uint8_t status = 0; 6414 struct qla_hw_data *ha = vha->hw; 6415 struct scsi_qla_host *vp; 6416 struct req_que *req = ha->req_q_map[0]; 6417 unsigned long flags; 6418 6419 if (vha->flags.online) { 6420 qla2x00_abort_isp_cleanup(vha); 6421 6422 if (IS_QLA8031(ha)) { 6423 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6424 "Clearing fcoe driver presence.\n"); 6425 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6426 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6427 "Error while clearing DRV-Presence.\n"); 6428 } 6429 6430 if (unlikely(pci_channel_offline(ha->pdev) && 6431 ha->flags.pci_channel_io_perm_failure)) { 6432 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6433 status = 0; 6434 return status; 6435 } 6436 6437 ha->isp_ops->get_flash_version(vha, req->ring); 6438 6439 ha->isp_ops->nvram_config(vha); 6440 6441 if (!qla2x00_restart_isp(vha)) { 6442 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6443 6444 if (!atomic_read(&vha->loop_down_timer)) { 6445 /* 6446 * Issue marker command only when we are going 6447 * to start the I/O . 6448 */ 6449 vha->marker_needed = 1; 6450 } 6451 6452 vha->flags.online = 1; 6453 6454 ha->isp_ops->enable_intrs(ha); 6455 6456 ha->isp_abort_cnt = 0; 6457 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6458 6459 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6460 qla2x00_get_fw_version(vha); 6461 if (ha->fce) { 6462 ha->flags.fce_enabled = 1; 6463 memset(ha->fce, 0, 6464 fce_calc_size(ha->fce_bufs)); 6465 rval = qla2x00_enable_fce_trace(vha, 6466 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6467 &ha->fce_bufs); 6468 if (rval) { 6469 ql_log(ql_log_warn, vha, 0x8033, 6470 "Unable to reinitialize FCE " 6471 "(%d).\n", rval); 6472 ha->flags.fce_enabled = 0; 6473 } 6474 } 6475 6476 if (ha->eft) { 6477 memset(ha->eft, 0, EFT_SIZE); 6478 rval = qla2x00_enable_eft_trace(vha, 6479 ha->eft_dma, EFT_NUM_BUFFERS); 6480 if (rval) { 6481 ql_log(ql_log_warn, vha, 0x8034, 6482 "Unable to reinitialize EFT " 6483 "(%d).\n", rval); 6484 } 6485 } 6486 } else { /* failed the ISP abort */ 6487 vha->flags.online = 1; 6488 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6489 if (ha->isp_abort_cnt == 0) { 6490 ql_log(ql_log_fatal, vha, 0x8035, 6491 "ISP error recover failed - " 6492 "board disabled.\n"); 6493 /* 6494 * The next call disables the board 6495 * completely. 6496 */ 6497 ha->isp_ops->reset_adapter(vha); 6498 vha->flags.online = 0; 6499 clear_bit(ISP_ABORT_RETRY, 6500 &vha->dpc_flags); 6501 status = 0; 6502 } else { /* schedule another ISP abort */ 6503 ha->isp_abort_cnt--; 6504 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6505 "ISP abort - retry remaining %d.\n", 6506 ha->isp_abort_cnt); 6507 status = 1; 6508 } 6509 } else { 6510 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6511 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6512 "ISP error recovery - retrying (%d) " 6513 "more times.\n", ha->isp_abort_cnt); 6514 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6515 status = 1; 6516 } 6517 } 6518 6519 } 6520 6521 if (!status) { 6522 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6523 qla2x00_configure_hba(vha); 6524 spin_lock_irqsave(&ha->vport_slock, flags); 6525 list_for_each_entry(vp, &ha->vp_list, list) { 6526 if (vp->vp_idx) { 6527 atomic_inc(&vp->vref_count); 6528 spin_unlock_irqrestore(&ha->vport_slock, flags); 6529 6530 qla2x00_vp_abort_isp(vp); 6531 6532 spin_lock_irqsave(&ha->vport_slock, flags); 6533 atomic_dec(&vp->vref_count); 6534 } 6535 } 6536 spin_unlock_irqrestore(&ha->vport_slock, flags); 6537 6538 if (IS_QLA8031(ha)) { 6539 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6540 "Setting back fcoe driver presence.\n"); 6541 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6542 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6543 "Error while setting DRV-Presence.\n"); 6544 } 6545 } else { 6546 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6547 __func__); 6548 } 6549 6550 return(status); 6551 } 6552 6553 /* 6554 * qla2x00_restart_isp 6555 * restarts the ISP after a reset 6556 * 6557 * Input: 6558 * ha = adapter block pointer. 6559 * 6560 * Returns: 6561 * 0 = success 6562 */ 6563 static int 6564 qla2x00_restart_isp(scsi_qla_host_t *vha) 6565 { 6566 int status = 0; 6567 struct qla_hw_data *ha = vha->hw; 6568 struct req_que *req = ha->req_q_map[0]; 6569 struct rsp_que *rsp = ha->rsp_q_map[0]; 6570 6571 /* If firmware needs to be loaded */ 6572 if (qla2x00_isp_firmware(vha)) { 6573 vha->flags.online = 0; 6574 status = ha->isp_ops->chip_diag(vha); 6575 if (!status) 6576 status = qla2x00_setup_chip(vha); 6577 } 6578 6579 if (!status && !(status = qla2x00_init_rings(vha))) { 6580 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6581 ha->flags.chip_reset_done = 1; 6582 6583 /* Initialize the queues in use */ 6584 qla25xx_init_queues(ha); 6585 6586 status = qla2x00_fw_ready(vha); 6587 if (!status) { 6588 /* Issue a marker after FW becomes ready. */ 6589 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6590 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6591 } 6592 6593 /* if no cable then assume it's good */ 6594 if ((vha->device_flags & DFLG_NO_CABLE)) 6595 status = 0; 6596 } 6597 return (status); 6598 } 6599 6600 static int 6601 qla25xx_init_queues(struct qla_hw_data *ha) 6602 { 6603 struct rsp_que *rsp = NULL; 6604 struct req_que *req = NULL; 6605 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6606 int ret = -1; 6607 int i; 6608 6609 for (i = 1; i < ha->max_rsp_queues; i++) { 6610 rsp = ha->rsp_q_map[i]; 6611 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6612 rsp->options &= ~BIT_0; 6613 ret = qla25xx_init_rsp_que(base_vha, rsp); 6614 if (ret != QLA_SUCCESS) 6615 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6616 "%s Rsp que: %d init failed.\n", 6617 __func__, rsp->id); 6618 else 6619 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6620 "%s Rsp que: %d inited.\n", 6621 __func__, rsp->id); 6622 } 6623 } 6624 for (i = 1; i < ha->max_req_queues; i++) { 6625 req = ha->req_q_map[i]; 6626 if (req && test_bit(i, ha->req_qid_map)) { 6627 /* Clear outstanding commands array. */ 6628 req->options &= ~BIT_0; 6629 ret = qla25xx_init_req_que(base_vha, req); 6630 if (ret != QLA_SUCCESS) 6631 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6632 "%s Req que: %d init failed.\n", 6633 __func__, req->id); 6634 else 6635 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6636 "%s Req que: %d inited.\n", 6637 __func__, req->id); 6638 } 6639 } 6640 return ret; 6641 } 6642 6643 /* 6644 * qla2x00_reset_adapter 6645 * Reset adapter. 6646 * 6647 * Input: 6648 * ha = adapter block pointer. 6649 */ 6650 void 6651 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6652 { 6653 unsigned long flags = 0; 6654 struct qla_hw_data *ha = vha->hw; 6655 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6656 6657 vha->flags.online = 0; 6658 ha->isp_ops->disable_intrs(ha); 6659 6660 spin_lock_irqsave(&ha->hardware_lock, flags); 6661 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6662 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6663 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6664 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6665 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6666 } 6667 6668 void 6669 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6670 { 6671 unsigned long flags = 0; 6672 struct qla_hw_data *ha = vha->hw; 6673 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6674 6675 if (IS_P3P_TYPE(ha)) 6676 return; 6677 6678 vha->flags.online = 0; 6679 ha->isp_ops->disable_intrs(ha); 6680 6681 spin_lock_irqsave(&ha->hardware_lock, flags); 6682 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6683 RD_REG_DWORD(®->hccr); 6684 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6685 RD_REG_DWORD(®->hccr); 6686 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6687 6688 if (IS_NOPOLLING_TYPE(ha)) 6689 ha->isp_ops->enable_intrs(ha); 6690 } 6691 6692 /* On sparc systems, obtain port and node WWN from firmware 6693 * properties. 6694 */ 6695 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6696 struct nvram_24xx *nv) 6697 { 6698 #ifdef CONFIG_SPARC 6699 struct qla_hw_data *ha = vha->hw; 6700 struct pci_dev *pdev = ha->pdev; 6701 struct device_node *dp = pci_device_to_OF_node(pdev); 6702 const u8 *val; 6703 int len; 6704 6705 val = of_get_property(dp, "port-wwn", &len); 6706 if (val && len >= WWN_SIZE) 6707 memcpy(nv->port_name, val, WWN_SIZE); 6708 6709 val = of_get_property(dp, "node-wwn", &len); 6710 if (val && len >= WWN_SIZE) 6711 memcpy(nv->node_name, val, WWN_SIZE); 6712 #endif 6713 } 6714 6715 int 6716 qla24xx_nvram_config(scsi_qla_host_t *vha) 6717 { 6718 int rval; 6719 struct init_cb_24xx *icb; 6720 struct nvram_24xx *nv; 6721 uint32_t *dptr; 6722 uint8_t *dptr1, *dptr2; 6723 uint32_t chksum; 6724 uint16_t cnt; 6725 struct qla_hw_data *ha = vha->hw; 6726 6727 rval = QLA_SUCCESS; 6728 icb = (struct init_cb_24xx *)ha->init_cb; 6729 nv = ha->nvram; 6730 6731 /* Determine NVRAM starting address. */ 6732 if (ha->port_no == 0) { 6733 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 6734 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 6735 } else { 6736 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 6737 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 6738 } 6739 6740 ha->nvram_size = sizeof(struct nvram_24xx); 6741 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6742 6743 /* Get VPD data into cache */ 6744 ha->vpd = ha->nvram + VPD_OFFSET; 6745 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 6746 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 6747 6748 /* Get NVRAM data into cache and calculate checksum. */ 6749 dptr = (uint32_t *)nv; 6750 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 6751 ha->nvram_size); 6752 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6753 chksum += le32_to_cpu(*dptr); 6754 6755 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 6756 "Contents of NVRAM\n"); 6757 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 6758 (uint8_t *)nv, ha->nvram_size); 6759 6760 /* Bad NVRAM data, set defaults parameters. */ 6761 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6762 || nv->id[3] != ' ' || 6763 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6764 /* Reset NVRAM data. */ 6765 ql_log(ql_log_warn, vha, 0x006b, 6766 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6767 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 6768 ql_log(ql_log_warn, vha, 0x006c, 6769 "Falling back to functioning (yet invalid -- WWPN) " 6770 "defaults.\n"); 6771 6772 /* 6773 * Set default initialization control block. 6774 */ 6775 memset(nv, 0, ha->nvram_size); 6776 nv->nvram_version = cpu_to_le16(ICB_VERSION); 6777 nv->version = cpu_to_le16(ICB_VERSION); 6778 nv->frame_payload_size = 2048; 6779 nv->execution_throttle = cpu_to_le16(0xFFFF); 6780 nv->exchange_count = cpu_to_le16(0); 6781 nv->hard_address = cpu_to_le16(124); 6782 nv->port_name[0] = 0x21; 6783 nv->port_name[1] = 0x00 + ha->port_no + 1; 6784 nv->port_name[2] = 0x00; 6785 nv->port_name[3] = 0xe0; 6786 nv->port_name[4] = 0x8b; 6787 nv->port_name[5] = 0x1c; 6788 nv->port_name[6] = 0x55; 6789 nv->port_name[7] = 0x86; 6790 nv->node_name[0] = 0x20; 6791 nv->node_name[1] = 0x00; 6792 nv->node_name[2] = 0x00; 6793 nv->node_name[3] = 0xe0; 6794 nv->node_name[4] = 0x8b; 6795 nv->node_name[5] = 0x1c; 6796 nv->node_name[6] = 0x55; 6797 nv->node_name[7] = 0x86; 6798 qla24xx_nvram_wwn_from_ofw(vha, nv); 6799 nv->login_retry_count = cpu_to_le16(8); 6800 nv->interrupt_delay_timer = cpu_to_le16(0); 6801 nv->login_timeout = cpu_to_le16(0); 6802 nv->firmware_options_1 = 6803 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6804 nv->firmware_options_2 = cpu_to_le32(2 << 4); 6805 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 6806 nv->firmware_options_3 = cpu_to_le32(2 << 13); 6807 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 6808 nv->efi_parameters = cpu_to_le32(0); 6809 nv->reset_delay = 5; 6810 nv->max_luns_per_target = cpu_to_le16(128); 6811 nv->port_down_retry_count = cpu_to_le16(30); 6812 nv->link_down_timeout = cpu_to_le16(30); 6813 6814 rval = 1; 6815 } 6816 6817 if (qla_tgt_mode_enabled(vha)) { 6818 /* Don't enable full login after initial LIP */ 6819 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 6820 /* Don't enable LIP full login for initiator */ 6821 nv->host_p &= cpu_to_le32(~BIT_10); 6822 } 6823 6824 qlt_24xx_config_nvram_stage1(vha, nv); 6825 6826 /* Reset Initialization control block */ 6827 memset(icb, 0, ha->init_cb_size); 6828 6829 /* Copy 1st segment. */ 6830 dptr1 = (uint8_t *)icb; 6831 dptr2 = (uint8_t *)&nv->version; 6832 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6833 while (cnt--) 6834 *dptr1++ = *dptr2++; 6835 6836 icb->login_retry_count = nv->login_retry_count; 6837 icb->link_down_on_nos = nv->link_down_on_nos; 6838 6839 /* Copy 2nd segment. */ 6840 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6841 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6842 cnt = (uint8_t *)&icb->reserved_3 - 6843 (uint8_t *)&icb->interrupt_delay_timer; 6844 while (cnt--) 6845 *dptr1++ = *dptr2++; 6846 6847 /* 6848 * Setup driver NVRAM options. 6849 */ 6850 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6851 "QLA2462"); 6852 6853 qlt_24xx_config_nvram_stage2(vha, icb); 6854 6855 if (nv->host_p & cpu_to_le32(BIT_15)) { 6856 /* Use alternate WWN? */ 6857 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6858 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6859 } 6860 6861 /* Prepare nodename */ 6862 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 6863 /* 6864 * Firmware will apply the following mask if the nodename was 6865 * not provided. 6866 */ 6867 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6868 icb->node_name[0] &= 0xF0; 6869 } 6870 6871 /* Set host adapter parameters. */ 6872 ha->flags.disable_risc_code_load = 0; 6873 ha->flags.enable_lip_reset = 0; 6874 ha->flags.enable_lip_full_login = 6875 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6876 ha->flags.enable_target_reset = 6877 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6878 ha->flags.enable_led_scheme = 0; 6879 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6880 6881 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6882 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6883 6884 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 6885 sizeof(ha->fw_seriallink_options24)); 6886 6887 /* save HBA serial number */ 6888 ha->serial0 = icb->port_name[5]; 6889 ha->serial1 = icb->port_name[6]; 6890 ha->serial2 = icb->port_name[7]; 6891 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6892 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6893 6894 icb->execution_throttle = cpu_to_le16(0xFFFF); 6895 6896 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6897 6898 /* Set minimum login_timeout to 4 seconds. */ 6899 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6900 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6901 if (le16_to_cpu(nv->login_timeout) < 4) 6902 nv->login_timeout = cpu_to_le16(4); 6903 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6904 6905 /* Set minimum RATOV to 100 tenths of a second. */ 6906 ha->r_a_tov = 100; 6907 6908 ha->loop_reset_delay = nv->reset_delay; 6909 6910 /* Link Down Timeout = 0: 6911 * 6912 * When Port Down timer expires we will start returning 6913 * I/O's to OS with "DID_NO_CONNECT". 6914 * 6915 * Link Down Timeout != 0: 6916 * 6917 * The driver waits for the link to come up after link down 6918 * before returning I/Os to OS with "DID_NO_CONNECT". 6919 */ 6920 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6921 ha->loop_down_abort_time = 6922 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6923 } else { 6924 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6925 ha->loop_down_abort_time = 6926 (LOOP_DOWN_TIME - ha->link_down_timeout); 6927 } 6928 6929 /* Need enough time to try and get the port back. */ 6930 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6931 if (qlport_down_retry) 6932 ha->port_down_retry_count = qlport_down_retry; 6933 6934 /* Set login_retry_count */ 6935 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6936 if (ha->port_down_retry_count == 6937 le16_to_cpu(nv->port_down_retry_count) && 6938 ha->port_down_retry_count > 3) 6939 ha->login_retry_count = ha->port_down_retry_count; 6940 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6941 ha->login_retry_count = ha->port_down_retry_count; 6942 if (ql2xloginretrycount) 6943 ha->login_retry_count = ql2xloginretrycount; 6944 6945 /* Enable ZIO. */ 6946 if (!vha->flags.init_done) { 6947 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6948 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6949 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6950 le16_to_cpu(icb->interrupt_delay_timer): 2; 6951 } 6952 icb->firmware_options_2 &= cpu_to_le32( 6953 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6954 vha->flags.process_response_queue = 0; 6955 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6956 ha->zio_mode = QLA_ZIO_MODE_6; 6957 6958 ql_log(ql_log_info, vha, 0x006f, 6959 "ZIO mode %d enabled; timer delay (%d us).\n", 6960 ha->zio_mode, ha->zio_timer * 100); 6961 6962 icb->firmware_options_2 |= cpu_to_le32( 6963 (uint32_t)ha->zio_mode); 6964 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6965 vha->flags.process_response_queue = 1; 6966 } 6967 6968 if (rval) { 6969 ql_log(ql_log_warn, vha, 0x0070, 6970 "NVRAM configuration failed.\n"); 6971 } 6972 return (rval); 6973 } 6974 6975 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 6976 { 6977 struct qla27xx_image_status pri_image_status, sec_image_status; 6978 uint8_t valid_pri_image, valid_sec_image; 6979 uint32_t *wptr; 6980 uint32_t cnt, chksum, size; 6981 struct qla_hw_data *ha = vha->hw; 6982 6983 valid_pri_image = valid_sec_image = 1; 6984 ha->active_image = 0; 6985 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 6986 6987 if (!ha->flt_region_img_status_pri) { 6988 valid_pri_image = 0; 6989 goto check_sec_image; 6990 } 6991 6992 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 6993 ha->flt_region_img_status_pri, size); 6994 6995 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 6996 ql_dbg(ql_dbg_init, vha, 0x018b, 6997 "Primary image signature (0x%x) not valid\n", 6998 pri_image_status.signature); 6999 valid_pri_image = 0; 7000 goto check_sec_image; 7001 } 7002 7003 wptr = (uint32_t *)(&pri_image_status); 7004 cnt = size; 7005 7006 for (chksum = 0; cnt--; wptr++) 7007 chksum += le32_to_cpu(*wptr); 7008 7009 if (chksum) { 7010 ql_dbg(ql_dbg_init, vha, 0x018c, 7011 "Checksum validation failed for primary image (0x%x)\n", 7012 chksum); 7013 valid_pri_image = 0; 7014 } 7015 7016 check_sec_image: 7017 if (!ha->flt_region_img_status_sec) { 7018 valid_sec_image = 0; 7019 goto check_valid_image; 7020 } 7021 7022 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7023 ha->flt_region_img_status_sec, size); 7024 7025 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7026 ql_dbg(ql_dbg_init, vha, 0x018d, 7027 "Secondary image signature(0x%x) not valid\n", 7028 sec_image_status.signature); 7029 valid_sec_image = 0; 7030 goto check_valid_image; 7031 } 7032 7033 wptr = (uint32_t *)(&sec_image_status); 7034 cnt = size; 7035 for (chksum = 0; cnt--; wptr++) 7036 chksum += le32_to_cpu(*wptr); 7037 if (chksum) { 7038 ql_dbg(ql_dbg_init, vha, 0x018e, 7039 "Checksum validation failed for secondary image (0x%x)\n", 7040 chksum); 7041 valid_sec_image = 0; 7042 } 7043 7044 check_valid_image: 7045 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7046 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7047 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7048 if (!ha->active_image || 7049 pri_image_status.generation_number < 7050 sec_image_status.generation_number) 7051 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7052 } 7053 7054 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n", 7055 ha->active_image == 0 ? "default bootld and fw" : 7056 ha->active_image == 1 ? "primary" : 7057 ha->active_image == 2 ? "secondary" : 7058 "Invalid"); 7059 7060 return ha->active_image; 7061 } 7062 7063 static int 7064 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7065 uint32_t faddr) 7066 { 7067 int rval = QLA_SUCCESS; 7068 int segments, fragment; 7069 uint32_t *dcode, dlen; 7070 uint32_t risc_addr; 7071 uint32_t risc_size; 7072 uint32_t i; 7073 struct qla_hw_data *ha = vha->hw; 7074 struct req_que *req = ha->req_q_map[0]; 7075 7076 ql_dbg(ql_dbg_init, vha, 0x008b, 7077 "FW: Loading firmware from flash (%x).\n", faddr); 7078 7079 rval = QLA_SUCCESS; 7080 7081 segments = FA_RISC_CODE_SEGMENTS; 7082 dcode = (uint32_t *)req->ring; 7083 *srisc_addr = 0; 7084 7085 if (IS_QLA27XX(ha) && 7086 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7087 faddr = ha->flt_region_fw_sec; 7088 7089 /* Validate firmware image by checking version. */ 7090 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7091 for (i = 0; i < 4; i++) 7092 dcode[i] = be32_to_cpu(dcode[i]); 7093 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7094 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7095 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7096 dcode[3] == 0)) { 7097 ql_log(ql_log_fatal, vha, 0x008c, 7098 "Unable to verify the integrity of flash firmware " 7099 "image.\n"); 7100 ql_log(ql_log_fatal, vha, 0x008d, 7101 "Firmware data: %08x %08x %08x %08x.\n", 7102 dcode[0], dcode[1], dcode[2], dcode[3]); 7103 7104 return QLA_FUNCTION_FAILED; 7105 } 7106 7107 while (segments && rval == QLA_SUCCESS) { 7108 /* Read segment's load information. */ 7109 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7110 7111 risc_addr = be32_to_cpu(dcode[2]); 7112 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7113 risc_size = be32_to_cpu(dcode[3]); 7114 7115 fragment = 0; 7116 while (risc_size > 0 && rval == QLA_SUCCESS) { 7117 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7118 if (dlen > risc_size) 7119 dlen = risc_size; 7120 7121 ql_dbg(ql_dbg_init, vha, 0x008e, 7122 "Loading risc segment@ risc addr %x " 7123 "number of dwords 0x%x offset 0x%x.\n", 7124 risc_addr, dlen, faddr); 7125 7126 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7127 for (i = 0; i < dlen; i++) 7128 dcode[i] = swab32(dcode[i]); 7129 7130 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7131 dlen); 7132 if (rval) { 7133 ql_log(ql_log_fatal, vha, 0x008f, 7134 "Failed to load segment %d of firmware.\n", 7135 fragment); 7136 return QLA_FUNCTION_FAILED; 7137 } 7138 7139 faddr += dlen; 7140 risc_addr += dlen; 7141 risc_size -= dlen; 7142 fragment++; 7143 } 7144 7145 /* Next segment. */ 7146 segments--; 7147 } 7148 7149 if (!IS_QLA27XX(ha)) 7150 return rval; 7151 7152 if (ha->fw_dump_template) 7153 vfree(ha->fw_dump_template); 7154 ha->fw_dump_template = NULL; 7155 ha->fw_dump_template_len = 0; 7156 7157 ql_dbg(ql_dbg_init, vha, 0x0161, 7158 "Loading fwdump template from %x\n", faddr); 7159 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7160 risc_size = be32_to_cpu(dcode[2]); 7161 ql_dbg(ql_dbg_init, vha, 0x0162, 7162 "-> array size %x dwords\n", risc_size); 7163 if (risc_size == 0 || risc_size == ~0) 7164 goto default_template; 7165 7166 dlen = (risc_size - 8) * sizeof(*dcode); 7167 ql_dbg(ql_dbg_init, vha, 0x0163, 7168 "-> template allocating %x bytes...\n", dlen); 7169 ha->fw_dump_template = vmalloc(dlen); 7170 if (!ha->fw_dump_template) { 7171 ql_log(ql_log_warn, vha, 0x0164, 7172 "Failed fwdump template allocate %x bytes.\n", risc_size); 7173 goto default_template; 7174 } 7175 7176 faddr += 7; 7177 risc_size -= 8; 7178 dcode = ha->fw_dump_template; 7179 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7180 for (i = 0; i < risc_size; i++) 7181 dcode[i] = le32_to_cpu(dcode[i]); 7182 7183 if (!qla27xx_fwdt_template_valid(dcode)) { 7184 ql_log(ql_log_warn, vha, 0x0165, 7185 "Failed fwdump template validate\n"); 7186 goto default_template; 7187 } 7188 7189 dlen = qla27xx_fwdt_template_size(dcode); 7190 ql_dbg(ql_dbg_init, vha, 0x0166, 7191 "-> template size %x bytes\n", dlen); 7192 if (dlen > risc_size * sizeof(*dcode)) { 7193 ql_log(ql_log_warn, vha, 0x0167, 7194 "Failed fwdump template exceeds array by %zx bytes\n", 7195 (size_t)(dlen - risc_size * sizeof(*dcode))); 7196 goto default_template; 7197 } 7198 ha->fw_dump_template_len = dlen; 7199 return rval; 7200 7201 default_template: 7202 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7203 if (ha->fw_dump_template) 7204 vfree(ha->fw_dump_template); 7205 ha->fw_dump_template = NULL; 7206 ha->fw_dump_template_len = 0; 7207 7208 dlen = qla27xx_fwdt_template_default_size(); 7209 ql_dbg(ql_dbg_init, vha, 0x0169, 7210 "-> template allocating %x bytes...\n", dlen); 7211 ha->fw_dump_template = vmalloc(dlen); 7212 if (!ha->fw_dump_template) { 7213 ql_log(ql_log_warn, vha, 0x016a, 7214 "Failed fwdump template allocate %x bytes.\n", risc_size); 7215 goto failed_template; 7216 } 7217 7218 dcode = ha->fw_dump_template; 7219 risc_size = dlen / sizeof(*dcode); 7220 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7221 for (i = 0; i < risc_size; i++) 7222 dcode[i] = be32_to_cpu(dcode[i]); 7223 7224 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7225 ql_log(ql_log_warn, vha, 0x016b, 7226 "Failed fwdump template validate\n"); 7227 goto failed_template; 7228 } 7229 7230 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7231 ql_dbg(ql_dbg_init, vha, 0x016c, 7232 "-> template size %x bytes\n", dlen); 7233 ha->fw_dump_template_len = dlen; 7234 return rval; 7235 7236 failed_template: 7237 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7238 if (ha->fw_dump_template) 7239 vfree(ha->fw_dump_template); 7240 ha->fw_dump_template = NULL; 7241 ha->fw_dump_template_len = 0; 7242 return rval; 7243 } 7244 7245 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7246 7247 int 7248 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7249 { 7250 int rval; 7251 int i, fragment; 7252 uint16_t *wcode, *fwcode; 7253 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7254 struct fw_blob *blob; 7255 struct qla_hw_data *ha = vha->hw; 7256 struct req_que *req = ha->req_q_map[0]; 7257 7258 /* Load firmware blob. */ 7259 blob = qla2x00_request_firmware(vha); 7260 if (!blob) { 7261 ql_log(ql_log_info, vha, 0x0083, 7262 "Firmware image unavailable.\n"); 7263 ql_log(ql_log_info, vha, 0x0084, 7264 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7265 return QLA_FUNCTION_FAILED; 7266 } 7267 7268 rval = QLA_SUCCESS; 7269 7270 wcode = (uint16_t *)req->ring; 7271 *srisc_addr = 0; 7272 fwcode = (uint16_t *)blob->fw->data; 7273 fwclen = 0; 7274 7275 /* Validate firmware image by checking version. */ 7276 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7277 ql_log(ql_log_fatal, vha, 0x0085, 7278 "Unable to verify integrity of firmware image (%zd).\n", 7279 blob->fw->size); 7280 goto fail_fw_integrity; 7281 } 7282 for (i = 0; i < 4; i++) 7283 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7284 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7285 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7286 wcode[2] == 0 && wcode[3] == 0)) { 7287 ql_log(ql_log_fatal, vha, 0x0086, 7288 "Unable to verify integrity of firmware image.\n"); 7289 ql_log(ql_log_fatal, vha, 0x0087, 7290 "Firmware data: %04x %04x %04x %04x.\n", 7291 wcode[0], wcode[1], wcode[2], wcode[3]); 7292 goto fail_fw_integrity; 7293 } 7294 7295 seg = blob->segs; 7296 while (*seg && rval == QLA_SUCCESS) { 7297 risc_addr = *seg; 7298 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7299 risc_size = be16_to_cpu(fwcode[3]); 7300 7301 /* Validate firmware image size. */ 7302 fwclen += risc_size * sizeof(uint16_t); 7303 if (blob->fw->size < fwclen) { 7304 ql_log(ql_log_fatal, vha, 0x0088, 7305 "Unable to verify integrity of firmware image " 7306 "(%zd).\n", blob->fw->size); 7307 goto fail_fw_integrity; 7308 } 7309 7310 fragment = 0; 7311 while (risc_size > 0 && rval == QLA_SUCCESS) { 7312 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7313 if (wlen > risc_size) 7314 wlen = risc_size; 7315 ql_dbg(ql_dbg_init, vha, 0x0089, 7316 "Loading risc segment@ risc addr %x number of " 7317 "words 0x%x.\n", risc_addr, wlen); 7318 7319 for (i = 0; i < wlen; i++) 7320 wcode[i] = swab16(fwcode[i]); 7321 7322 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7323 wlen); 7324 if (rval) { 7325 ql_log(ql_log_fatal, vha, 0x008a, 7326 "Failed to load segment %d of firmware.\n", 7327 fragment); 7328 break; 7329 } 7330 7331 fwcode += wlen; 7332 risc_addr += wlen; 7333 risc_size -= wlen; 7334 fragment++; 7335 } 7336 7337 /* Next segment. */ 7338 seg++; 7339 } 7340 return rval; 7341 7342 fail_fw_integrity: 7343 return QLA_FUNCTION_FAILED; 7344 } 7345 7346 static int 7347 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7348 { 7349 int rval; 7350 int segments, fragment; 7351 uint32_t *dcode, dlen; 7352 uint32_t risc_addr; 7353 uint32_t risc_size; 7354 uint32_t i; 7355 struct fw_blob *blob; 7356 const uint32_t *fwcode; 7357 uint32_t fwclen; 7358 struct qla_hw_data *ha = vha->hw; 7359 struct req_que *req = ha->req_q_map[0]; 7360 7361 /* Load firmware blob. */ 7362 blob = qla2x00_request_firmware(vha); 7363 if (!blob) { 7364 ql_log(ql_log_warn, vha, 0x0090, 7365 "Firmware image unavailable.\n"); 7366 ql_log(ql_log_warn, vha, 0x0091, 7367 "Firmware images can be retrieved from: " 7368 QLA_FW_URL ".\n"); 7369 7370 return QLA_FUNCTION_FAILED; 7371 } 7372 7373 ql_dbg(ql_dbg_init, vha, 0x0092, 7374 "FW: Loading via request-firmware.\n"); 7375 7376 rval = QLA_SUCCESS; 7377 7378 segments = FA_RISC_CODE_SEGMENTS; 7379 dcode = (uint32_t *)req->ring; 7380 *srisc_addr = 0; 7381 fwcode = (uint32_t *)blob->fw->data; 7382 fwclen = 0; 7383 7384 /* Validate firmware image by checking version. */ 7385 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7386 ql_log(ql_log_fatal, vha, 0x0093, 7387 "Unable to verify integrity of firmware image (%zd).\n", 7388 blob->fw->size); 7389 return QLA_FUNCTION_FAILED; 7390 } 7391 for (i = 0; i < 4; i++) 7392 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7393 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7394 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7395 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7396 dcode[3] == 0)) { 7397 ql_log(ql_log_fatal, vha, 0x0094, 7398 "Unable to verify integrity of firmware image (%zd).\n", 7399 blob->fw->size); 7400 ql_log(ql_log_fatal, vha, 0x0095, 7401 "Firmware data: %08x %08x %08x %08x.\n", 7402 dcode[0], dcode[1], dcode[2], dcode[3]); 7403 return QLA_FUNCTION_FAILED; 7404 } 7405 7406 while (segments && rval == QLA_SUCCESS) { 7407 risc_addr = be32_to_cpu(fwcode[2]); 7408 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7409 risc_size = be32_to_cpu(fwcode[3]); 7410 7411 /* Validate firmware image size. */ 7412 fwclen += risc_size * sizeof(uint32_t); 7413 if (blob->fw->size < fwclen) { 7414 ql_log(ql_log_fatal, vha, 0x0096, 7415 "Unable to verify integrity of firmware image " 7416 "(%zd).\n", blob->fw->size); 7417 return QLA_FUNCTION_FAILED; 7418 } 7419 7420 fragment = 0; 7421 while (risc_size > 0 && rval == QLA_SUCCESS) { 7422 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7423 if (dlen > risc_size) 7424 dlen = risc_size; 7425 7426 ql_dbg(ql_dbg_init, vha, 0x0097, 7427 "Loading risc segment@ risc addr %x " 7428 "number of dwords 0x%x.\n", risc_addr, dlen); 7429 7430 for (i = 0; i < dlen; i++) 7431 dcode[i] = swab32(fwcode[i]); 7432 7433 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7434 dlen); 7435 if (rval) { 7436 ql_log(ql_log_fatal, vha, 0x0098, 7437 "Failed to load segment %d of firmware.\n", 7438 fragment); 7439 return QLA_FUNCTION_FAILED; 7440 } 7441 7442 fwcode += dlen; 7443 risc_addr += dlen; 7444 risc_size -= dlen; 7445 fragment++; 7446 } 7447 7448 /* Next segment. */ 7449 segments--; 7450 } 7451 7452 if (!IS_QLA27XX(ha)) 7453 return rval; 7454 7455 if (ha->fw_dump_template) 7456 vfree(ha->fw_dump_template); 7457 ha->fw_dump_template = NULL; 7458 ha->fw_dump_template_len = 0; 7459 7460 ql_dbg(ql_dbg_init, vha, 0x171, 7461 "Loading fwdump template from %x\n", 7462 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7463 risc_size = be32_to_cpu(fwcode[2]); 7464 ql_dbg(ql_dbg_init, vha, 0x172, 7465 "-> array size %x dwords\n", risc_size); 7466 if (risc_size == 0 || risc_size == ~0) 7467 goto default_template; 7468 7469 dlen = (risc_size - 8) * sizeof(*fwcode); 7470 ql_dbg(ql_dbg_init, vha, 0x0173, 7471 "-> template allocating %x bytes...\n", dlen); 7472 ha->fw_dump_template = vmalloc(dlen); 7473 if (!ha->fw_dump_template) { 7474 ql_log(ql_log_warn, vha, 0x0174, 7475 "Failed fwdump template allocate %x bytes.\n", risc_size); 7476 goto default_template; 7477 } 7478 7479 fwcode += 7; 7480 risc_size -= 8; 7481 dcode = ha->fw_dump_template; 7482 for (i = 0; i < risc_size; i++) 7483 dcode[i] = le32_to_cpu(fwcode[i]); 7484 7485 if (!qla27xx_fwdt_template_valid(dcode)) { 7486 ql_log(ql_log_warn, vha, 0x0175, 7487 "Failed fwdump template validate\n"); 7488 goto default_template; 7489 } 7490 7491 dlen = qla27xx_fwdt_template_size(dcode); 7492 ql_dbg(ql_dbg_init, vha, 0x0176, 7493 "-> template size %x bytes\n", dlen); 7494 if (dlen > risc_size * sizeof(*fwcode)) { 7495 ql_log(ql_log_warn, vha, 0x0177, 7496 "Failed fwdump template exceeds array by %zx bytes\n", 7497 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7498 goto default_template; 7499 } 7500 ha->fw_dump_template_len = dlen; 7501 return rval; 7502 7503 default_template: 7504 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7505 if (ha->fw_dump_template) 7506 vfree(ha->fw_dump_template); 7507 ha->fw_dump_template = NULL; 7508 ha->fw_dump_template_len = 0; 7509 7510 dlen = qla27xx_fwdt_template_default_size(); 7511 ql_dbg(ql_dbg_init, vha, 0x0179, 7512 "-> template allocating %x bytes...\n", dlen); 7513 ha->fw_dump_template = vmalloc(dlen); 7514 if (!ha->fw_dump_template) { 7515 ql_log(ql_log_warn, vha, 0x017a, 7516 "Failed fwdump template allocate %x bytes.\n", risc_size); 7517 goto failed_template; 7518 } 7519 7520 dcode = ha->fw_dump_template; 7521 risc_size = dlen / sizeof(*fwcode); 7522 fwcode = qla27xx_fwdt_template_default(); 7523 for (i = 0; i < risc_size; i++) 7524 dcode[i] = be32_to_cpu(fwcode[i]); 7525 7526 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7527 ql_log(ql_log_warn, vha, 0x017b, 7528 "Failed fwdump template validate\n"); 7529 goto failed_template; 7530 } 7531 7532 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7533 ql_dbg(ql_dbg_init, vha, 0x017c, 7534 "-> template size %x bytes\n", dlen); 7535 ha->fw_dump_template_len = dlen; 7536 return rval; 7537 7538 failed_template: 7539 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7540 if (ha->fw_dump_template) 7541 vfree(ha->fw_dump_template); 7542 ha->fw_dump_template = NULL; 7543 ha->fw_dump_template_len = 0; 7544 return rval; 7545 } 7546 7547 int 7548 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7549 { 7550 int rval; 7551 7552 if (ql2xfwloadbin == 1) 7553 return qla81xx_load_risc(vha, srisc_addr); 7554 7555 /* 7556 * FW Load priority: 7557 * 1) Firmware via request-firmware interface (.bin file). 7558 * 2) Firmware residing in flash. 7559 */ 7560 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7561 if (rval == QLA_SUCCESS) 7562 return rval; 7563 7564 return qla24xx_load_risc_flash(vha, srisc_addr, 7565 vha->hw->flt_region_fw); 7566 } 7567 7568 int 7569 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7570 { 7571 int rval; 7572 struct qla_hw_data *ha = vha->hw; 7573 7574 if (ql2xfwloadbin == 2) 7575 goto try_blob_fw; 7576 7577 /* 7578 * FW Load priority: 7579 * 1) Firmware residing in flash. 7580 * 2) Firmware via request-firmware interface (.bin file). 7581 * 3) Golden-Firmware residing in flash -- limited operation. 7582 */ 7583 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7584 if (rval == QLA_SUCCESS) 7585 return rval; 7586 7587 try_blob_fw: 7588 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7589 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7590 return rval; 7591 7592 ql_log(ql_log_info, vha, 0x0099, 7593 "Attempting to fallback to golden firmware.\n"); 7594 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7595 if (rval != QLA_SUCCESS) 7596 return rval; 7597 7598 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7599 ha->flags.running_gold_fw = 1; 7600 return rval; 7601 } 7602 7603 void 7604 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7605 { 7606 int ret, retries; 7607 struct qla_hw_data *ha = vha->hw; 7608 7609 if (ha->flags.pci_channel_io_perm_failure) 7610 return; 7611 if (!IS_FWI2_CAPABLE(ha)) 7612 return; 7613 if (!ha->fw_major_version) 7614 return; 7615 if (!ha->flags.fw_started) 7616 return; 7617 7618 ret = qla2x00_stop_firmware(vha); 7619 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7620 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7621 ha->isp_ops->reset_chip(vha); 7622 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7623 continue; 7624 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7625 continue; 7626 ql_log(ql_log_info, vha, 0x8015, 7627 "Attempting retry of stop-firmware command.\n"); 7628 ret = qla2x00_stop_firmware(vha); 7629 } 7630 7631 QLA_FW_STOPPED(ha); 7632 ha->flags.fw_init_done = 0; 7633 } 7634 7635 int 7636 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7637 { 7638 int rval = QLA_SUCCESS; 7639 int rval2; 7640 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7641 struct qla_hw_data *ha = vha->hw; 7642 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7643 struct req_que *req; 7644 struct rsp_que *rsp; 7645 7646 if (!vha->vp_idx) 7647 return -EINVAL; 7648 7649 rval = qla2x00_fw_ready(base_vha); 7650 if (vha->qpair) 7651 req = vha->qpair->req; 7652 else 7653 req = ha->req_q_map[0]; 7654 rsp = req->rsp; 7655 7656 if (rval == QLA_SUCCESS) { 7657 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7658 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7659 } 7660 7661 vha->flags.management_server_logged_in = 0; 7662 7663 /* Login to SNS first */ 7664 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7665 BIT_1); 7666 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7667 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7668 ql_dbg(ql_dbg_init, vha, 0x0120, 7669 "Failed SNS login: loop_id=%x, rval2=%d\n", 7670 NPH_SNS, rval2); 7671 else 7672 ql_dbg(ql_dbg_init, vha, 0x0103, 7673 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7674 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7675 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7676 return (QLA_FUNCTION_FAILED); 7677 } 7678 7679 atomic_set(&vha->loop_down_timer, 0); 7680 atomic_set(&vha->loop_state, LOOP_UP); 7681 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7682 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7683 rval = qla2x00_loop_resync(base_vha); 7684 7685 return rval; 7686 } 7687 7688 /* 84XX Support **************************************************************/ 7689 7690 static LIST_HEAD(qla_cs84xx_list); 7691 static DEFINE_MUTEX(qla_cs84xx_mutex); 7692 7693 static struct qla_chip_state_84xx * 7694 qla84xx_get_chip(struct scsi_qla_host *vha) 7695 { 7696 struct qla_chip_state_84xx *cs84xx; 7697 struct qla_hw_data *ha = vha->hw; 7698 7699 mutex_lock(&qla_cs84xx_mutex); 7700 7701 /* Find any shared 84xx chip. */ 7702 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7703 if (cs84xx->bus == ha->pdev->bus) { 7704 kref_get(&cs84xx->kref); 7705 goto done; 7706 } 7707 } 7708 7709 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 7710 if (!cs84xx) 7711 goto done; 7712 7713 kref_init(&cs84xx->kref); 7714 spin_lock_init(&cs84xx->access_lock); 7715 mutex_init(&cs84xx->fw_update_mutex); 7716 cs84xx->bus = ha->pdev->bus; 7717 7718 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 7719 done: 7720 mutex_unlock(&qla_cs84xx_mutex); 7721 return cs84xx; 7722 } 7723 7724 static void 7725 __qla84xx_chip_release(struct kref *kref) 7726 { 7727 struct qla_chip_state_84xx *cs84xx = 7728 container_of(kref, struct qla_chip_state_84xx, kref); 7729 7730 mutex_lock(&qla_cs84xx_mutex); 7731 list_del(&cs84xx->list); 7732 mutex_unlock(&qla_cs84xx_mutex); 7733 kfree(cs84xx); 7734 } 7735 7736 void 7737 qla84xx_put_chip(struct scsi_qla_host *vha) 7738 { 7739 struct qla_hw_data *ha = vha->hw; 7740 if (ha->cs84xx) 7741 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 7742 } 7743 7744 static int 7745 qla84xx_init_chip(scsi_qla_host_t *vha) 7746 { 7747 int rval; 7748 uint16_t status[2]; 7749 struct qla_hw_data *ha = vha->hw; 7750 7751 mutex_lock(&ha->cs84xx->fw_update_mutex); 7752 7753 rval = qla84xx_verify_chip(vha, status); 7754 7755 mutex_unlock(&ha->cs84xx->fw_update_mutex); 7756 7757 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 7758 QLA_SUCCESS; 7759 } 7760 7761 /* 81XX Support **************************************************************/ 7762 7763 int 7764 qla81xx_nvram_config(scsi_qla_host_t *vha) 7765 { 7766 int rval; 7767 struct init_cb_81xx *icb; 7768 struct nvram_81xx *nv; 7769 uint32_t *dptr; 7770 uint8_t *dptr1, *dptr2; 7771 uint32_t chksum; 7772 uint16_t cnt; 7773 struct qla_hw_data *ha = vha->hw; 7774 7775 rval = QLA_SUCCESS; 7776 icb = (struct init_cb_81xx *)ha->init_cb; 7777 nv = ha->nvram; 7778 7779 /* Determine NVRAM starting address. */ 7780 ha->nvram_size = sizeof(struct nvram_81xx); 7781 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7782 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 7783 ha->vpd_size = FA_VPD_SIZE_82XX; 7784 7785 /* Get VPD data into cache */ 7786 ha->vpd = ha->nvram + VPD_OFFSET; 7787 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 7788 ha->vpd_size); 7789 7790 /* Get NVRAM data into cache and calculate checksum. */ 7791 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 7792 ha->nvram_size); 7793 dptr = (uint32_t *)nv; 7794 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7795 chksum += le32_to_cpu(*dptr); 7796 7797 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 7798 "Contents of NVRAM:\n"); 7799 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 7800 (uint8_t *)nv, ha->nvram_size); 7801 7802 /* Bad NVRAM data, set defaults parameters. */ 7803 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7804 || nv->id[3] != ' ' || 7805 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7806 /* Reset NVRAM data. */ 7807 ql_log(ql_log_info, vha, 0x0073, 7808 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 7809 "version=0x%x.\n", chksum, nv->id[0], 7810 le16_to_cpu(nv->nvram_version)); 7811 ql_log(ql_log_info, vha, 0x0074, 7812 "Falling back to functioning (yet invalid -- WWPN) " 7813 "defaults.\n"); 7814 7815 /* 7816 * Set default initialization control block. 7817 */ 7818 memset(nv, 0, ha->nvram_size); 7819 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7820 nv->version = cpu_to_le16(ICB_VERSION); 7821 nv->frame_payload_size = 2048; 7822 nv->execution_throttle = cpu_to_le16(0xFFFF); 7823 nv->exchange_count = cpu_to_le16(0); 7824 nv->port_name[0] = 0x21; 7825 nv->port_name[1] = 0x00 + ha->port_no + 1; 7826 nv->port_name[2] = 0x00; 7827 nv->port_name[3] = 0xe0; 7828 nv->port_name[4] = 0x8b; 7829 nv->port_name[5] = 0x1c; 7830 nv->port_name[6] = 0x55; 7831 nv->port_name[7] = 0x86; 7832 nv->node_name[0] = 0x20; 7833 nv->node_name[1] = 0x00; 7834 nv->node_name[2] = 0x00; 7835 nv->node_name[3] = 0xe0; 7836 nv->node_name[4] = 0x8b; 7837 nv->node_name[5] = 0x1c; 7838 nv->node_name[6] = 0x55; 7839 nv->node_name[7] = 0x86; 7840 nv->login_retry_count = cpu_to_le16(8); 7841 nv->interrupt_delay_timer = cpu_to_le16(0); 7842 nv->login_timeout = cpu_to_le16(0); 7843 nv->firmware_options_1 = 7844 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7845 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7846 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7847 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7848 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7849 nv->efi_parameters = cpu_to_le32(0); 7850 nv->reset_delay = 5; 7851 nv->max_luns_per_target = cpu_to_le16(128); 7852 nv->port_down_retry_count = cpu_to_le16(30); 7853 nv->link_down_timeout = cpu_to_le16(180); 7854 nv->enode_mac[0] = 0x00; 7855 nv->enode_mac[1] = 0xC0; 7856 nv->enode_mac[2] = 0xDD; 7857 nv->enode_mac[3] = 0x04; 7858 nv->enode_mac[4] = 0x05; 7859 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 7860 7861 rval = 1; 7862 } 7863 7864 if (IS_T10_PI_CAPABLE(ha)) 7865 nv->frame_payload_size &= ~7; 7866 7867 qlt_81xx_config_nvram_stage1(vha, nv); 7868 7869 /* Reset Initialization control block */ 7870 memset(icb, 0, ha->init_cb_size); 7871 7872 /* Copy 1st segment. */ 7873 dptr1 = (uint8_t *)icb; 7874 dptr2 = (uint8_t *)&nv->version; 7875 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7876 while (cnt--) 7877 *dptr1++ = *dptr2++; 7878 7879 icb->login_retry_count = nv->login_retry_count; 7880 7881 /* Copy 2nd segment. */ 7882 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7883 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7884 cnt = (uint8_t *)&icb->reserved_5 - 7885 (uint8_t *)&icb->interrupt_delay_timer; 7886 while (cnt--) 7887 *dptr1++ = *dptr2++; 7888 7889 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 7890 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 7891 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 7892 icb->enode_mac[0] = 0x00; 7893 icb->enode_mac[1] = 0xC0; 7894 icb->enode_mac[2] = 0xDD; 7895 icb->enode_mac[3] = 0x04; 7896 icb->enode_mac[4] = 0x05; 7897 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 7898 } 7899 7900 /* Use extended-initialization control block. */ 7901 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 7902 7903 /* 7904 * Setup driver NVRAM options. 7905 */ 7906 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7907 "QLE8XXX"); 7908 7909 qlt_81xx_config_nvram_stage2(vha, icb); 7910 7911 /* Use alternate WWN? */ 7912 if (nv->host_p & cpu_to_le32(BIT_15)) { 7913 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7914 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7915 } 7916 7917 /* Prepare nodename */ 7918 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7919 /* 7920 * Firmware will apply the following mask if the nodename was 7921 * not provided. 7922 */ 7923 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7924 icb->node_name[0] &= 0xF0; 7925 } 7926 7927 /* Set host adapter parameters. */ 7928 ha->flags.disable_risc_code_load = 0; 7929 ha->flags.enable_lip_reset = 0; 7930 ha->flags.enable_lip_full_login = 7931 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7932 ha->flags.enable_target_reset = 7933 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7934 ha->flags.enable_led_scheme = 0; 7935 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7936 7937 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7938 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7939 7940 /* save HBA serial number */ 7941 ha->serial0 = icb->port_name[5]; 7942 ha->serial1 = icb->port_name[6]; 7943 ha->serial2 = icb->port_name[7]; 7944 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7945 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7946 7947 icb->execution_throttle = cpu_to_le16(0xFFFF); 7948 7949 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7950 7951 /* Set minimum login_timeout to 4 seconds. */ 7952 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7953 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7954 if (le16_to_cpu(nv->login_timeout) < 4) 7955 nv->login_timeout = cpu_to_le16(4); 7956 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7957 7958 /* Set minimum RATOV to 100 tenths of a second. */ 7959 ha->r_a_tov = 100; 7960 7961 ha->loop_reset_delay = nv->reset_delay; 7962 7963 /* Link Down Timeout = 0: 7964 * 7965 * When Port Down timer expires we will start returning 7966 * I/O's to OS with "DID_NO_CONNECT". 7967 * 7968 * Link Down Timeout != 0: 7969 * 7970 * The driver waits for the link to come up after link down 7971 * before returning I/Os to OS with "DID_NO_CONNECT". 7972 */ 7973 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7974 ha->loop_down_abort_time = 7975 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7976 } else { 7977 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7978 ha->loop_down_abort_time = 7979 (LOOP_DOWN_TIME - ha->link_down_timeout); 7980 } 7981 7982 /* Need enough time to try and get the port back. */ 7983 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7984 if (qlport_down_retry) 7985 ha->port_down_retry_count = qlport_down_retry; 7986 7987 /* Set login_retry_count */ 7988 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7989 if (ha->port_down_retry_count == 7990 le16_to_cpu(nv->port_down_retry_count) && 7991 ha->port_down_retry_count > 3) 7992 ha->login_retry_count = ha->port_down_retry_count; 7993 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7994 ha->login_retry_count = ha->port_down_retry_count; 7995 if (ql2xloginretrycount) 7996 ha->login_retry_count = ql2xloginretrycount; 7997 7998 /* if not running MSI-X we need handshaking on interrupts */ 7999 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8000 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8001 8002 /* Enable ZIO. */ 8003 if (!vha->flags.init_done) { 8004 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8005 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8006 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8007 le16_to_cpu(icb->interrupt_delay_timer): 2; 8008 } 8009 icb->firmware_options_2 &= cpu_to_le32( 8010 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8011 vha->flags.process_response_queue = 0; 8012 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8013 ha->zio_mode = QLA_ZIO_MODE_6; 8014 8015 ql_log(ql_log_info, vha, 0x0075, 8016 "ZIO mode %d enabled; timer delay (%d us).\n", 8017 ha->zio_mode, 8018 ha->zio_timer * 100); 8019 8020 icb->firmware_options_2 |= cpu_to_le32( 8021 (uint32_t)ha->zio_mode); 8022 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8023 vha->flags.process_response_queue = 1; 8024 } 8025 8026 /* enable RIDA Format2 */ 8027 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 8028 icb->firmware_options_3 |= BIT_0; 8029 8030 if (IS_QLA27XX(ha)) { 8031 icb->firmware_options_3 |= BIT_8; 8032 ql_dbg(ql_log_info, vha, 0x0075, 8033 "Enabling direct connection.\n"); 8034 } 8035 8036 if (rval) { 8037 ql_log(ql_log_warn, vha, 0x0076, 8038 "NVRAM configuration failed.\n"); 8039 } 8040 return (rval); 8041 } 8042 8043 int 8044 qla82xx_restart_isp(scsi_qla_host_t *vha) 8045 { 8046 int status, rval; 8047 struct qla_hw_data *ha = vha->hw; 8048 struct req_que *req = ha->req_q_map[0]; 8049 struct rsp_que *rsp = ha->rsp_q_map[0]; 8050 struct scsi_qla_host *vp; 8051 unsigned long flags; 8052 8053 status = qla2x00_init_rings(vha); 8054 if (!status) { 8055 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8056 ha->flags.chip_reset_done = 1; 8057 8058 status = qla2x00_fw_ready(vha); 8059 if (!status) { 8060 /* Issue a marker after FW becomes ready. */ 8061 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8062 vha->flags.online = 1; 8063 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8064 } 8065 8066 /* if no cable then assume it's good */ 8067 if ((vha->device_flags & DFLG_NO_CABLE)) 8068 status = 0; 8069 } 8070 8071 if (!status) { 8072 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8073 8074 if (!atomic_read(&vha->loop_down_timer)) { 8075 /* 8076 * Issue marker command only when we are going 8077 * to start the I/O . 8078 */ 8079 vha->marker_needed = 1; 8080 } 8081 8082 ha->isp_ops->enable_intrs(ha); 8083 8084 ha->isp_abort_cnt = 0; 8085 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8086 8087 /* Update the firmware version */ 8088 status = qla82xx_check_md_needed(vha); 8089 8090 if (ha->fce) { 8091 ha->flags.fce_enabled = 1; 8092 memset(ha->fce, 0, 8093 fce_calc_size(ha->fce_bufs)); 8094 rval = qla2x00_enable_fce_trace(vha, 8095 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8096 &ha->fce_bufs); 8097 if (rval) { 8098 ql_log(ql_log_warn, vha, 0x8001, 8099 "Unable to reinitialize FCE (%d).\n", 8100 rval); 8101 ha->flags.fce_enabled = 0; 8102 } 8103 } 8104 8105 if (ha->eft) { 8106 memset(ha->eft, 0, EFT_SIZE); 8107 rval = qla2x00_enable_eft_trace(vha, 8108 ha->eft_dma, EFT_NUM_BUFFERS); 8109 if (rval) { 8110 ql_log(ql_log_warn, vha, 0x8010, 8111 "Unable to reinitialize EFT (%d).\n", 8112 rval); 8113 } 8114 } 8115 } 8116 8117 if (!status) { 8118 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8119 "qla82xx_restart_isp succeeded.\n"); 8120 8121 spin_lock_irqsave(&ha->vport_slock, flags); 8122 list_for_each_entry(vp, &ha->vp_list, list) { 8123 if (vp->vp_idx) { 8124 atomic_inc(&vp->vref_count); 8125 spin_unlock_irqrestore(&ha->vport_slock, flags); 8126 8127 qla2x00_vp_abort_isp(vp); 8128 8129 spin_lock_irqsave(&ha->vport_slock, flags); 8130 atomic_dec(&vp->vref_count); 8131 } 8132 } 8133 spin_unlock_irqrestore(&ha->vport_slock, flags); 8134 8135 } else { 8136 ql_log(ql_log_warn, vha, 0x8016, 8137 "qla82xx_restart_isp **** FAILED ****.\n"); 8138 } 8139 8140 return status; 8141 } 8142 8143 void 8144 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8145 { 8146 struct qla_hw_data *ha = vha->hw; 8147 8148 /* Hold status IOCBs until ABTS response received. */ 8149 if (ql2xfwholdabts) 8150 ha->fw_options[3] |= BIT_12; 8151 8152 /* Set Retry FLOGI in case of P2P connection */ 8153 if (ha->operating_mode == P2P) { 8154 ha->fw_options[2] |= BIT_3; 8155 ql_dbg(ql_dbg_disc, vha, 0x2103, 8156 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8157 __func__, ha->fw_options[2]); 8158 } 8159 8160 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8161 if (ql2xmvasynctoatio) { 8162 if (qla_tgt_mode_enabled(vha) || 8163 qla_dual_mode_enabled(vha)) 8164 ha->fw_options[2] |= BIT_11; 8165 else 8166 ha->fw_options[2] &= ~BIT_11; 8167 } 8168 8169 if (qla_tgt_mode_enabled(vha) || 8170 qla_dual_mode_enabled(vha)) { 8171 /* FW auto send SCSI status during */ 8172 ha->fw_options[1] |= BIT_8; 8173 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8174 8175 /* FW perform Exchange validation */ 8176 ha->fw_options[2] |= BIT_4; 8177 } else { 8178 ha->fw_options[1] &= ~BIT_8; 8179 ha->fw_options[10] &= 0x00ff; 8180 8181 ha->fw_options[2] &= ~BIT_4; 8182 } 8183 8184 if (ql2xetsenable) { 8185 /* Enable ETS Burst. */ 8186 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8187 ha->fw_options[2] |= BIT_9; 8188 } 8189 8190 ql_dbg(ql_dbg_init, vha, 0x00e9, 8191 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8192 __func__, ha->fw_options[1], ha->fw_options[2], 8193 ha->fw_options[3], vha->host->active_mode); 8194 8195 qla2x00_set_fw_options(vha, ha->fw_options); 8196 } 8197 8198 /* 8199 * qla24xx_get_fcp_prio 8200 * Gets the fcp cmd priority value for the logged in port. 8201 * Looks for a match of the port descriptors within 8202 * each of the fcp prio config entries. If a match is found, 8203 * the tag (priority) value is returned. 8204 * 8205 * Input: 8206 * vha = scsi host structure pointer. 8207 * fcport = port structure pointer. 8208 * 8209 * Return: 8210 * non-zero (if found) 8211 * -1 (if not found) 8212 * 8213 * Context: 8214 * Kernel context 8215 */ 8216 static int 8217 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8218 { 8219 int i, entries; 8220 uint8_t pid_match, wwn_match; 8221 int priority; 8222 uint32_t pid1, pid2; 8223 uint64_t wwn1, wwn2; 8224 struct qla_fcp_prio_entry *pri_entry; 8225 struct qla_hw_data *ha = vha->hw; 8226 8227 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8228 return -1; 8229 8230 priority = -1; 8231 entries = ha->fcp_prio_cfg->num_entries; 8232 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8233 8234 for (i = 0; i < entries; i++) { 8235 pid_match = wwn_match = 0; 8236 8237 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8238 pri_entry++; 8239 continue; 8240 } 8241 8242 /* check source pid for a match */ 8243 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8244 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8245 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8246 if (pid1 == INVALID_PORT_ID) 8247 pid_match++; 8248 else if (pid1 == pid2) 8249 pid_match++; 8250 } 8251 8252 /* check destination pid for a match */ 8253 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8254 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8255 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8256 if (pid1 == INVALID_PORT_ID) 8257 pid_match++; 8258 else if (pid1 == pid2) 8259 pid_match++; 8260 } 8261 8262 /* check source WWN for a match */ 8263 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8264 wwn1 = wwn_to_u64(vha->port_name); 8265 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8266 if (wwn2 == (uint64_t)-1) 8267 wwn_match++; 8268 else if (wwn1 == wwn2) 8269 wwn_match++; 8270 } 8271 8272 /* check destination WWN for a match */ 8273 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8274 wwn1 = wwn_to_u64(fcport->port_name); 8275 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8276 if (wwn2 == (uint64_t)-1) 8277 wwn_match++; 8278 else if (wwn1 == wwn2) 8279 wwn_match++; 8280 } 8281 8282 if (pid_match == 2 || wwn_match == 2) { 8283 /* Found a matching entry */ 8284 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8285 priority = pri_entry->tag; 8286 break; 8287 } 8288 8289 pri_entry++; 8290 } 8291 8292 return priority; 8293 } 8294 8295 /* 8296 * qla24xx_update_fcport_fcp_prio 8297 * Activates fcp priority for the logged in fc port 8298 * 8299 * Input: 8300 * vha = scsi host structure pointer. 8301 * fcp = port structure pointer. 8302 * 8303 * Return: 8304 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8305 * 8306 * Context: 8307 * Kernel context. 8308 */ 8309 int 8310 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8311 { 8312 int ret; 8313 int priority; 8314 uint16_t mb[5]; 8315 8316 if (fcport->port_type != FCT_TARGET || 8317 fcport->loop_id == FC_NO_LOOP_ID) 8318 return QLA_FUNCTION_FAILED; 8319 8320 priority = qla24xx_get_fcp_prio(vha, fcport); 8321 if (priority < 0) 8322 return QLA_FUNCTION_FAILED; 8323 8324 if (IS_P3P_TYPE(vha->hw)) { 8325 fcport->fcp_prio = priority & 0xf; 8326 return QLA_SUCCESS; 8327 } 8328 8329 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8330 if (ret == QLA_SUCCESS) { 8331 if (fcport->fcp_prio != priority) 8332 ql_dbg(ql_dbg_user, vha, 0x709e, 8333 "Updated FCP_CMND priority - value=%d loop_id=%d " 8334 "port_id=%02x%02x%02x.\n", priority, 8335 fcport->loop_id, fcport->d_id.b.domain, 8336 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8337 fcport->fcp_prio = priority & 0xf; 8338 } else 8339 ql_dbg(ql_dbg_user, vha, 0x704f, 8340 "Unable to update FCP_CMND priority - ret=0x%x for " 8341 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8342 fcport->d_id.b.domain, fcport->d_id.b.area, 8343 fcport->d_id.b.al_pa); 8344 return ret; 8345 } 8346 8347 /* 8348 * qla24xx_update_all_fcp_prio 8349 * Activates fcp priority for all the logged in ports 8350 * 8351 * Input: 8352 * ha = adapter block pointer. 8353 * 8354 * Return: 8355 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8356 * 8357 * Context: 8358 * Kernel context. 8359 */ 8360 int 8361 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8362 { 8363 int ret; 8364 fc_port_t *fcport; 8365 8366 ret = QLA_FUNCTION_FAILED; 8367 /* We need to set priority for all logged in ports */ 8368 list_for_each_entry(fcport, &vha->vp_fcports, list) 8369 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8370 8371 return ret; 8372 } 8373 8374 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8375 int vp_idx, bool startqp) 8376 { 8377 int rsp_id = 0; 8378 int req_id = 0; 8379 int i; 8380 struct qla_hw_data *ha = vha->hw; 8381 uint16_t qpair_id = 0; 8382 struct qla_qpair *qpair = NULL; 8383 struct qla_msix_entry *msix; 8384 8385 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8386 ql_log(ql_log_warn, vha, 0x00181, 8387 "FW/Driver is not multi-queue capable.\n"); 8388 return NULL; 8389 } 8390 8391 if (ql2xmqsupport || ql2xnvmeenable) { 8392 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8393 if (qpair == NULL) { 8394 ql_log(ql_log_warn, vha, 0x0182, 8395 "Failed to allocate memory for queue pair.\n"); 8396 return NULL; 8397 } 8398 memset(qpair, 0, sizeof(struct qla_qpair)); 8399 8400 qpair->hw = vha->hw; 8401 qpair->vha = vha; 8402 qpair->qp_lock_ptr = &qpair->qp_lock; 8403 spin_lock_init(&qpair->qp_lock); 8404 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8405 8406 /* Assign available que pair id */ 8407 mutex_lock(&ha->mq_lock); 8408 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8409 if (ha->num_qpairs >= ha->max_qpairs) { 8410 mutex_unlock(&ha->mq_lock); 8411 ql_log(ql_log_warn, vha, 0x0183, 8412 "No resources to create additional q pair.\n"); 8413 goto fail_qid_map; 8414 } 8415 ha->num_qpairs++; 8416 set_bit(qpair_id, ha->qpair_qid_map); 8417 ha->queue_pair_map[qpair_id] = qpair; 8418 qpair->id = qpair_id; 8419 qpair->vp_idx = vp_idx; 8420 qpair->fw_started = ha->flags.fw_started; 8421 INIT_LIST_HEAD(&qpair->hints_list); 8422 qpair->chip_reset = ha->base_qpair->chip_reset; 8423 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8424 qpair->enable_explicit_conf = 8425 ha->base_qpair->enable_explicit_conf; 8426 8427 for (i = 0; i < ha->msix_count; i++) { 8428 msix = &ha->msix_entries[i]; 8429 if (msix->in_use) 8430 continue; 8431 qpair->msix = msix; 8432 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8433 "Vector %x selected for qpair\n", msix->vector); 8434 break; 8435 } 8436 if (!qpair->msix) { 8437 ql_log(ql_log_warn, vha, 0x0184, 8438 "Out of MSI-X vectors!.\n"); 8439 goto fail_msix; 8440 } 8441 8442 qpair->msix->in_use = 1; 8443 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8444 qpair->pdev = ha->pdev; 8445 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8446 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8447 8448 mutex_unlock(&ha->mq_lock); 8449 8450 /* Create response queue first */ 8451 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8452 if (!rsp_id) { 8453 ql_log(ql_log_warn, vha, 0x0185, 8454 "Failed to create response queue.\n"); 8455 goto fail_rsp; 8456 } 8457 8458 qpair->rsp = ha->rsp_q_map[rsp_id]; 8459 8460 /* Create request queue */ 8461 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8462 startqp); 8463 if (!req_id) { 8464 ql_log(ql_log_warn, vha, 0x0186, 8465 "Failed to create request queue.\n"); 8466 goto fail_req; 8467 } 8468 8469 qpair->req = ha->req_q_map[req_id]; 8470 qpair->rsp->req = qpair->req; 8471 qpair->rsp->qpair = qpair; 8472 /* init qpair to this cpu. Will adjust at run time. */ 8473 qla_cpu_update(qpair, smp_processor_id()); 8474 8475 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8476 if (ha->fw_attributes & BIT_4) 8477 qpair->difdix_supported = 1; 8478 } 8479 8480 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8481 if (!qpair->srb_mempool) { 8482 ql_log(ql_log_warn, vha, 0xd036, 8483 "Failed to create srb mempool for qpair %d\n", 8484 qpair->id); 8485 goto fail_mempool; 8486 } 8487 8488 /* Mark as online */ 8489 qpair->online = 1; 8490 8491 if (!vha->flags.qpairs_available) 8492 vha->flags.qpairs_available = 1; 8493 8494 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8495 "Request/Response queue pair created, id %d\n", 8496 qpair->id); 8497 ql_dbg(ql_dbg_init, vha, 0x0187, 8498 "Request/Response queue pair created, id %d\n", 8499 qpair->id); 8500 } 8501 return qpair; 8502 8503 fail_mempool: 8504 fail_req: 8505 qla25xx_delete_rsp_que(vha, qpair->rsp); 8506 fail_rsp: 8507 mutex_lock(&ha->mq_lock); 8508 qpair->msix->in_use = 0; 8509 list_del(&qpair->qp_list_elem); 8510 if (list_empty(&vha->qp_list)) 8511 vha->flags.qpairs_available = 0; 8512 fail_msix: 8513 ha->queue_pair_map[qpair_id] = NULL; 8514 clear_bit(qpair_id, ha->qpair_qid_map); 8515 ha->num_qpairs--; 8516 mutex_unlock(&ha->mq_lock); 8517 fail_qid_map: 8518 kfree(qpair); 8519 return NULL; 8520 } 8521 8522 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8523 { 8524 int ret = QLA_FUNCTION_FAILED; 8525 struct qla_hw_data *ha = qpair->hw; 8526 8527 qpair->delete_in_progress = 1; 8528 while (atomic_read(&qpair->ref_count)) 8529 msleep(500); 8530 8531 ret = qla25xx_delete_req_que(vha, qpair->req); 8532 if (ret != QLA_SUCCESS) 8533 goto fail; 8534 8535 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8536 if (ret != QLA_SUCCESS) 8537 goto fail; 8538 8539 mutex_lock(&ha->mq_lock); 8540 ha->queue_pair_map[qpair->id] = NULL; 8541 clear_bit(qpair->id, ha->qpair_qid_map); 8542 ha->num_qpairs--; 8543 list_del(&qpair->qp_list_elem); 8544 if (list_empty(&vha->qp_list)) { 8545 vha->flags.qpairs_available = 0; 8546 vha->flags.qpairs_req_created = 0; 8547 vha->flags.qpairs_rsp_created = 0; 8548 } 8549 mempool_destroy(qpair->srb_mempool); 8550 kfree(qpair); 8551 mutex_unlock(&ha->mq_lock); 8552 8553 return QLA_SUCCESS; 8554 fail: 8555 return ret; 8556 } 8557