xref: /openbmc/linux/drivers/scsi/qla2xxx/qla_init.c (revision a9d85efb)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * QLogic Fibre Channel HBA Driver
4  * Copyright (c)  2003-2014 QLogic Corporation
5  */
6 #include "qla_def.h"
7 #include "qla_gbl.h"
8 
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/vmalloc.h>
12 
13 #include "qla_devtbl.h"
14 
15 #ifdef CONFIG_SPARC
16 #include <asm/prom.h>
17 #endif
18 
19 #include "qla_target.h"
20 
21 /*
22 *  QLogic ISP2x00 Hardware Support Function Prototypes.
23 */
24 static int qla2x00_isp_firmware(scsi_qla_host_t *);
25 static int qla2x00_setup_chip(scsi_qla_host_t *);
26 static int qla2x00_fw_ready(scsi_qla_host_t *);
27 static int qla2x00_configure_hba(scsi_qla_host_t *);
28 static int qla2x00_configure_loop(scsi_qla_host_t *);
29 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_fabric(scsi_qla_host_t *);
31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
32 static int qla2x00_restart_isp(scsi_qla_host_t *);
33 
34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
35 static int qla84xx_init_chip(scsi_qla_host_t *);
36 static int qla25xx_init_queues(struct qla_hw_data *);
37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
38 				      struct event_arg *ea);
39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
40     struct event_arg *);
41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
42 
43 /* SRB Extensions ---------------------------------------------------------- */
44 
45 void
46 qla2x00_sp_timeout(struct timer_list *t)
47 {
48 	srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
49 	struct srb_iocb *iocb;
50 
51 	WARN_ON(irqs_disabled());
52 	iocb = &sp->u.iocb_cmd;
53 	iocb->timeout(sp);
54 }
55 
56 void qla2x00_sp_free(srb_t *sp)
57 {
58 	struct srb_iocb *iocb = &sp->u.iocb_cmd;
59 
60 	del_timer(&iocb->timer);
61 	qla2x00_rel_sp(sp);
62 }
63 
64 void qla2xxx_rel_done_warning(srb_t *sp, int res)
65 {
66 	WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
67 }
68 
69 void qla2xxx_rel_free_warning(srb_t *sp)
70 {
71 	WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
72 }
73 
74 /* Asynchronous Login/Logout Routines -------------------------------------- */
75 
76 unsigned long
77 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
78 {
79 	unsigned long tmo;
80 	struct qla_hw_data *ha = vha->hw;
81 
82 	/* Firmware should use switch negotiated r_a_tov for timeout. */
83 	tmo = ha->r_a_tov / 10 * 2;
84 	if (IS_QLAFX00(ha)) {
85 		tmo = FX00_DEF_RATOV * 2;
86 	} else if (!IS_FWI2_CAPABLE(ha)) {
87 		/*
88 		 * Except for earlier ISPs where the timeout is seeded from the
89 		 * initialization control block.
90 		 */
91 		tmo = ha->login_timeout;
92 	}
93 	return tmo;
94 }
95 
96 static void qla24xx_abort_iocb_timeout(void *data)
97 {
98 	srb_t *sp = data;
99 	struct srb_iocb *abt = &sp->u.iocb_cmd;
100 	struct qla_qpair *qpair = sp->qpair;
101 	u32 handle;
102 	unsigned long flags;
103 
104 	if (sp->cmd_sp)
105 		ql_dbg(ql_dbg_async, sp->vha, 0x507c,
106 		    "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
107 		    sp->cmd_sp->handle, sp->cmd_sp->type,
108 		    sp->handle, sp->type);
109 	else
110 		ql_dbg(ql_dbg_async, sp->vha, 0x507c,
111 		    "Abort timeout 2 - hdl=%x, type=%x\n",
112 		    sp->handle, sp->type);
113 
114 	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
115 	for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
116 		if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
117 		    sp->cmd_sp))
118 			qpair->req->outstanding_cmds[handle] = NULL;
119 
120 		/* removing the abort */
121 		if (qpair->req->outstanding_cmds[handle] == sp) {
122 			qpair->req->outstanding_cmds[handle] = NULL;
123 			break;
124 		}
125 	}
126 	spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
127 
128 	if (sp->cmd_sp)
129 		sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
130 
131 	abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
132 	sp->done(sp, QLA_OS_TIMER_EXPIRED);
133 }
134 
135 static void qla24xx_abort_sp_done(srb_t *sp, int res)
136 {
137 	struct srb_iocb *abt = &sp->u.iocb_cmd;
138 	srb_t *orig_sp = sp->cmd_sp;
139 
140 	if (orig_sp)
141 		qla_wait_nvme_release_cmd_kref(orig_sp);
142 
143 	del_timer(&sp->u.iocb_cmd.timer);
144 	if (sp->flags & SRB_WAKEUP_ON_COMP)
145 		complete(&abt->u.abt.comp);
146 	else
147 		sp->free(sp);
148 }
149 
150 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
151 {
152 	scsi_qla_host_t *vha = cmd_sp->vha;
153 	struct srb_iocb *abt_iocb;
154 	srb_t *sp;
155 	int rval = QLA_FUNCTION_FAILED;
156 
157 	sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
158 				  GFP_ATOMIC);
159 	if (!sp)
160 		return QLA_MEMORY_ALLOC_FAILED;
161 
162 	abt_iocb = &sp->u.iocb_cmd;
163 	sp->type = SRB_ABT_CMD;
164 	sp->name = "abort";
165 	sp->qpair = cmd_sp->qpair;
166 	sp->cmd_sp = cmd_sp;
167 	if (wait)
168 		sp->flags = SRB_WAKEUP_ON_COMP;
169 
170 	abt_iocb->timeout = qla24xx_abort_iocb_timeout;
171 	init_completion(&abt_iocb->u.abt.comp);
172 	/* FW can send 2 x ABTS's timeout/20s */
173 	qla2x00_init_timer(sp, 42);
174 
175 	abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
176 	abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
177 
178 	sp->done = qla24xx_abort_sp_done;
179 
180 	ql_dbg(ql_dbg_async, vha, 0x507c,
181 	       "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
182 	       cmd_sp->type);
183 
184 	rval = qla2x00_start_sp(sp);
185 	if (rval != QLA_SUCCESS) {
186 		sp->free(sp);
187 		return rval;
188 	}
189 
190 	if (wait) {
191 		wait_for_completion(&abt_iocb->u.abt.comp);
192 		rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
193 			QLA_SUCCESS : QLA_ERR_FROM_FW;
194 		sp->free(sp);
195 	}
196 
197 	return rval;
198 }
199 
200 void
201 qla2x00_async_iocb_timeout(void *data)
202 {
203 	srb_t *sp = data;
204 	fc_port_t *fcport = sp->fcport;
205 	struct srb_iocb *lio = &sp->u.iocb_cmd;
206 	int rc, h;
207 	unsigned long flags;
208 
209 	if (fcport) {
210 		ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
211 		    "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
212 		    sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
213 
214 		fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
215 	} else {
216 		pr_info("Async-%s timeout - hdl=%x.\n",
217 		    sp->name, sp->handle);
218 	}
219 
220 	switch (sp->type) {
221 	case SRB_LOGIN_CMD:
222 		rc = qla24xx_async_abort_cmd(sp, false);
223 		if (rc) {
224 			/* Retry as needed. */
225 			lio->u.logio.data[0] = MBS_COMMAND_ERROR;
226 			lio->u.logio.data[1] =
227 				lio->u.logio.flags & SRB_LOGIN_RETRIED ?
228 				QLA_LOGIO_LOGIN_RETRIED : 0;
229 			spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
230 			for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
231 			    h++) {
232 				if (sp->qpair->req->outstanding_cmds[h] ==
233 				    sp) {
234 					sp->qpair->req->outstanding_cmds[h] =
235 					    NULL;
236 					break;
237 				}
238 			}
239 			spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
240 			sp->done(sp, QLA_FUNCTION_TIMEOUT);
241 		}
242 		break;
243 	case SRB_LOGOUT_CMD:
244 	case SRB_CT_PTHRU_CMD:
245 	case SRB_MB_IOCB:
246 	case SRB_NACK_PLOGI:
247 	case SRB_NACK_PRLI:
248 	case SRB_NACK_LOGO:
249 	case SRB_CTRL_VP:
250 	default:
251 		rc = qla24xx_async_abort_cmd(sp, false);
252 		if (rc) {
253 			spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
254 			for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
255 			    h++) {
256 				if (sp->qpair->req->outstanding_cmds[h] ==
257 				    sp) {
258 					sp->qpair->req->outstanding_cmds[h] =
259 					    NULL;
260 					break;
261 				}
262 			}
263 			spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
264 			sp->done(sp, QLA_FUNCTION_TIMEOUT);
265 		}
266 		break;
267 	}
268 }
269 
270 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
271 {
272 	struct scsi_qla_host *vha = sp->vha;
273 	struct srb_iocb *lio = &sp->u.iocb_cmd;
274 	struct event_arg ea;
275 
276 	ql_dbg(ql_dbg_disc, vha, 0x20dd,
277 	    "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
278 
279 	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
280 
281 	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
282 		memset(&ea, 0, sizeof(ea));
283 		ea.fcport = sp->fcport;
284 		ea.data[0] = lio->u.logio.data[0];
285 		ea.data[1] = lio->u.logio.data[1];
286 		ea.iop[0] = lio->u.logio.iop[0];
287 		ea.iop[1] = lio->u.logio.iop[1];
288 		ea.sp = sp;
289 		qla24xx_handle_plogi_done_event(vha, &ea);
290 	}
291 
292 	sp->free(sp);
293 }
294 
295 int
296 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
297     uint16_t *data)
298 {
299 	srb_t *sp;
300 	struct srb_iocb *lio;
301 	int rval = QLA_FUNCTION_FAILED;
302 
303 	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
304 	    fcport->loop_id == FC_NO_LOOP_ID) {
305 		ql_log(ql_log_warn, vha, 0xffff,
306 		    "%s: %8phC - not sending command.\n",
307 		    __func__, fcport->port_name);
308 		return rval;
309 	}
310 
311 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
312 	if (!sp)
313 		goto done;
314 
315 	qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
316 	fcport->flags |= FCF_ASYNC_SENT;
317 	fcport->logout_completed = 0;
318 
319 	sp->type = SRB_LOGIN_CMD;
320 	sp->name = "login";
321 	sp->gen1 = fcport->rscn_gen;
322 	sp->gen2 = fcport->login_gen;
323 
324 	lio = &sp->u.iocb_cmd;
325 	lio->timeout = qla2x00_async_iocb_timeout;
326 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
327 
328 	sp->done = qla2x00_async_login_sp_done;
329 	if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) {
330 		lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
331 	} else {
332 		if (vha->hw->flags.edif_enabled &&
333 		    vha->e_dbell.db_flags & EDB_ACTIVE) {
334 			lio->u.logio.flags |=
335 				(SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI);
336 			ql_dbg(ql_dbg_disc, vha, 0x2072,
337 			    "Async-login: w/ FCSP %8phC hdl=%x, loopid=%x portid=%06x\n",
338 			    fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24);
339 		} else {
340 			lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
341 		}
342 	}
343 
344 	if (NVME_TARGET(vha->hw, fcport))
345 		lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
346 
347 	ql_dbg(ql_dbg_disc, vha, 0x2072,
348 	       "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n",
349 	       fcport->port_name, sp->handle, fcport->loop_id,
350 	       fcport->d_id.b24, fcport->login_retry);
351 
352 	rval = qla2x00_start_sp(sp);
353 	if (rval != QLA_SUCCESS) {
354 		fcport->flags |= FCF_LOGIN_NEEDED;
355 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
356 		goto done_free_sp;
357 	}
358 
359 	return rval;
360 
361 done_free_sp:
362 	sp->free(sp);
363 	fcport->flags &= ~FCF_ASYNC_SENT;
364 done:
365 	fcport->flags &= ~FCF_ASYNC_ACTIVE;
366 	return rval;
367 }
368 
369 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
370 {
371 	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
372 	sp->fcport->login_gen++;
373 	qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]);
374 	sp->free(sp);
375 }
376 
377 int
378 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
379 {
380 	srb_t *sp;
381 	struct srb_iocb *lio;
382 	int rval = QLA_FUNCTION_FAILED;
383 
384 	fcport->flags |= FCF_ASYNC_SENT;
385 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
386 	if (!sp)
387 		goto done;
388 
389 	sp->type = SRB_LOGOUT_CMD;
390 	sp->name = "logout";
391 
392 	lio = &sp->u.iocb_cmd;
393 	lio->timeout = qla2x00_async_iocb_timeout;
394 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
395 
396 	sp->done = qla2x00_async_logout_sp_done;
397 
398 	ql_dbg(ql_dbg_disc, vha, 0x2070,
399 	    "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n",
400 	    sp->handle, fcport->loop_id, fcport->d_id.b.domain,
401 		fcport->d_id.b.area, fcport->d_id.b.al_pa,
402 		fcport->port_name, fcport->explicit_logout);
403 
404 	rval = qla2x00_start_sp(sp);
405 	if (rval != QLA_SUCCESS)
406 		goto done_free_sp;
407 	return rval;
408 
409 done_free_sp:
410 	sp->free(sp);
411 done:
412 	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
413 	return rval;
414 }
415 
416 void
417 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
418     uint16_t *data)
419 {
420 	fcport->flags &= ~FCF_ASYNC_ACTIVE;
421 	/* Don't re-login in target mode */
422 	if (!fcport->tgt_session)
423 		qla2x00_mark_device_lost(vha, fcport, 1);
424 	qlt_logo_completion_handler(fcport, data[0]);
425 }
426 
427 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
428 {
429 	struct srb_iocb *lio = &sp->u.iocb_cmd;
430 	struct scsi_qla_host *vha = sp->vha;
431 
432 	sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
433 	if (!test_bit(UNLOADING, &vha->dpc_flags))
434 		qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
435 		    lio->u.logio.data);
436 	sp->free(sp);
437 }
438 
439 int
440 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
441 {
442 	srb_t *sp;
443 	struct srb_iocb *lio;
444 	int rval;
445 
446 	rval = QLA_FUNCTION_FAILED;
447 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
448 	if (!sp)
449 		goto done;
450 
451 	sp->type = SRB_PRLO_CMD;
452 	sp->name = "prlo";
453 
454 	lio = &sp->u.iocb_cmd;
455 	lio->timeout = qla2x00_async_iocb_timeout;
456 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
457 
458 	sp->done = qla2x00_async_prlo_sp_done;
459 
460 	ql_dbg(ql_dbg_disc, vha, 0x2070,
461 	    "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
462 	    sp->handle, fcport->loop_id, fcport->d_id.b.domain,
463 	    fcport->d_id.b.area, fcport->d_id.b.al_pa);
464 
465 	rval = qla2x00_start_sp(sp);
466 	if (rval != QLA_SUCCESS)
467 		goto done_free_sp;
468 
469 	return rval;
470 
471 done_free_sp:
472 	sp->free(sp);
473 done:
474 	fcport->flags &= ~FCF_ASYNC_ACTIVE;
475 	return rval;
476 }
477 
478 static
479 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
480 {
481 	struct fc_port *fcport = ea->fcport;
482 
483 	ql_dbg(ql_dbg_disc, vha, 0x20d2,
484 	    "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
485 	    __func__, fcport->port_name, fcport->disc_state,
486 	    fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
487 	    fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
488 
489 	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
490 		  ea->data[0]);
491 
492 	if (ea->data[0] != MBS_COMMAND_COMPLETE) {
493 		ql_dbg(ql_dbg_disc, vha, 0x2066,
494 		    "%s %8phC: adisc fail: post delete\n",
495 		    __func__, ea->fcport->port_name);
496 		/* deleted = 0 & logout_on_delete = force fw cleanup */
497 		fcport->deleted = 0;
498 		fcport->logout_on_delete = 1;
499 		qlt_schedule_sess_for_deletion(ea->fcport);
500 		return;
501 	}
502 
503 	if (ea->fcport->disc_state == DSC_DELETE_PEND)
504 		return;
505 
506 	if (ea->sp->gen2 != ea->fcport->login_gen) {
507 		/* target side must have changed it. */
508 		ql_dbg(ql_dbg_disc, vha, 0x20d3,
509 		    "%s %8phC generation changed\n",
510 		    __func__, ea->fcport->port_name);
511 		return;
512 	} else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
513 		qla_rscn_replay(fcport);
514 		qlt_schedule_sess_for_deletion(fcport);
515 		return;
516 	}
517 
518 	__qla24xx_handle_gpdb_event(vha, ea);
519 }
520 
521 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
522 {
523 	struct qla_work_evt *e;
524 
525 	e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
526 	if (!e)
527 		return QLA_FUNCTION_FAILED;
528 
529 	e->u.fcport.fcport = fcport;
530 	fcport->flags |= FCF_ASYNC_ACTIVE;
531 	qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
532 	return qla2x00_post_work(vha, e);
533 }
534 
535 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
536 {
537 	struct scsi_qla_host *vha = sp->vha;
538 	struct event_arg ea;
539 	struct srb_iocb *lio = &sp->u.iocb_cmd;
540 
541 	ql_dbg(ql_dbg_disc, vha, 0x2066,
542 	    "Async done-%s res %x %8phC\n",
543 	    sp->name, res, sp->fcport->port_name);
544 
545 	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
546 
547 	memset(&ea, 0, sizeof(ea));
548 	ea.rc = res;
549 	ea.data[0] = lio->u.logio.data[0];
550 	ea.data[1] = lio->u.logio.data[1];
551 	ea.iop[0] = lio->u.logio.iop[0];
552 	ea.iop[1] = lio->u.logio.iop[1];
553 	ea.fcport = sp->fcport;
554 	ea.sp = sp;
555 
556 	qla24xx_handle_adisc_event(vha, &ea);
557 
558 	sp->free(sp);
559 }
560 
561 int
562 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
563     uint16_t *data)
564 {
565 	srb_t *sp;
566 	struct srb_iocb *lio;
567 	int rval = QLA_FUNCTION_FAILED;
568 
569 	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
570 		return rval;
571 
572 	fcport->flags |= FCF_ASYNC_SENT;
573 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
574 	if (!sp)
575 		goto done;
576 
577 	sp->type = SRB_ADISC_CMD;
578 	sp->name = "adisc";
579 
580 	lio = &sp->u.iocb_cmd;
581 	lio->timeout = qla2x00_async_iocb_timeout;
582 	sp->gen1 = fcport->rscn_gen;
583 	sp->gen2 = fcport->login_gen;
584 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
585 
586 	sp->done = qla2x00_async_adisc_sp_done;
587 	if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
588 		lio->u.logio.flags |= SRB_LOGIN_RETRIED;
589 
590 	ql_dbg(ql_dbg_disc, vha, 0x206f,
591 	    "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
592 	    sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
593 
594 	rval = qla2x00_start_sp(sp);
595 	if (rval != QLA_SUCCESS)
596 		goto done_free_sp;
597 
598 	return rval;
599 
600 done_free_sp:
601 	sp->free(sp);
602 done:
603 	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
604 	qla2x00_post_async_adisc_work(vha, fcport, data);
605 	return rval;
606 }
607 
608 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
609 {
610 	struct qla_hw_data *ha = vha->hw;
611 
612 	if (IS_FWI2_CAPABLE(ha))
613 		return loop_id > NPH_LAST_HANDLE;
614 
615 	return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
616 		loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
617 }
618 
619 /**
620  * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
621  * @vha: adapter state pointer.
622  * @dev: port structure pointer.
623  *
624  * Returns:
625  *	qla2x00 local function return status code.
626  *
627  * Context:
628  *	Kernel context.
629  */
630 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
631 {
632 	int	rval;
633 	struct qla_hw_data *ha = vha->hw;
634 	unsigned long flags = 0;
635 
636 	rval = QLA_SUCCESS;
637 
638 	spin_lock_irqsave(&ha->vport_slock, flags);
639 
640 	dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
641 	if (dev->loop_id >= LOOPID_MAP_SIZE ||
642 	    qla2x00_is_reserved_id(vha, dev->loop_id)) {
643 		dev->loop_id = FC_NO_LOOP_ID;
644 		rval = QLA_FUNCTION_FAILED;
645 	} else {
646 		set_bit(dev->loop_id, ha->loop_id_map);
647 	}
648 	spin_unlock_irqrestore(&ha->vport_slock, flags);
649 
650 	if (rval == QLA_SUCCESS)
651 		ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
652 		       "Assigning new loopid=%x, portid=%x.\n",
653 		       dev->loop_id, dev->d_id.b24);
654 	else
655 		ql_log(ql_log_warn, dev->vha, 0x2087,
656 		       "No loop_id's available, portid=%x.\n",
657 		       dev->d_id.b24);
658 
659 	return rval;
660 }
661 
662 void qla2x00_clear_loop_id(fc_port_t *fcport)
663 {
664 	struct qla_hw_data *ha = fcport->vha->hw;
665 
666 	if (fcport->loop_id == FC_NO_LOOP_ID ||
667 	    qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
668 		return;
669 
670 	clear_bit(fcport->loop_id, ha->loop_id_map);
671 	fcport->loop_id = FC_NO_LOOP_ID;
672 }
673 
674 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
675 	struct event_arg *ea)
676 {
677 	fc_port_t *fcport, *conflict_fcport;
678 	struct get_name_list_extended *e;
679 	u16 i, n, found = 0, loop_id;
680 	port_id_t id;
681 	u64 wwn;
682 	u16 data[2];
683 	u8 current_login_state, nvme_cls;
684 
685 	fcport = ea->fcport;
686 	ql_dbg(ql_dbg_disc, vha, 0xffff,
687 	    "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n",
688 	    __func__, fcport->port_name, fcport->disc_state,
689 	    fcport->fw_login_state, ea->rc,
690 	    fcport->login_gen, fcport->last_login_gen,
691 	    fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable);
692 
693 	if (fcport->disc_state == DSC_DELETE_PEND)
694 		return;
695 
696 	if (ea->rc) { /* rval */
697 		if (fcport->login_retry == 0) {
698 			ql_dbg(ql_dbg_disc, vha, 0x20de,
699 			    "GNL failed Port login retry %8phN, retry cnt=%d.\n",
700 			    fcport->port_name, fcport->login_retry);
701 		}
702 		return;
703 	}
704 
705 	if (fcport->last_rscn_gen != fcport->rscn_gen) {
706 		qla_rscn_replay(fcport);
707 		qlt_schedule_sess_for_deletion(fcport);
708 		return;
709 	} else if (fcport->last_login_gen != fcport->login_gen) {
710 		ql_dbg(ql_dbg_disc, vha, 0x20e0,
711 		    "%s %8phC login gen changed\n",
712 		    __func__, fcport->port_name);
713 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
714 		return;
715 	}
716 
717 	n = ea->data[0] / sizeof(struct get_name_list_extended);
718 
719 	ql_dbg(ql_dbg_disc, vha, 0x20e1,
720 	    "%s %d %8phC n %d %02x%02x%02x lid %d \n",
721 	    __func__, __LINE__, fcport->port_name, n,
722 	    fcport->d_id.b.domain, fcport->d_id.b.area,
723 	    fcport->d_id.b.al_pa, fcport->loop_id);
724 
725 	for (i = 0; i < n; i++) {
726 		e = &vha->gnl.l[i];
727 		wwn = wwn_to_u64(e->port_name);
728 		id.b.domain = e->port_id[2];
729 		id.b.area = e->port_id[1];
730 		id.b.al_pa = e->port_id[0];
731 		id.b.rsvd_1 = 0;
732 
733 		if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
734 			continue;
735 
736 		if (IS_SW_RESV_ADDR(id))
737 			continue;
738 
739 		found = 1;
740 
741 		loop_id = le16_to_cpu(e->nport_handle);
742 		loop_id = (loop_id & 0x7fff);
743 		nvme_cls = e->current_login_state >> 4;
744 		current_login_state = e->current_login_state & 0xf;
745 
746 		if (PRLI_PHASE(nvme_cls)) {
747 			current_login_state = nvme_cls;
748 			fcport->fc4_type &= ~FS_FC4TYPE_FCP;
749 			fcport->fc4_type |= FS_FC4TYPE_NVME;
750 		} else if (PRLI_PHASE(current_login_state)) {
751 			fcport->fc4_type |= FS_FC4TYPE_FCP;
752 			fcport->fc4_type &= ~FS_FC4TYPE_NVME;
753 		}
754 
755 		ql_dbg(ql_dbg_disc, vha, 0x20e2,
756 		    "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
757 		    __func__, fcport->port_name,
758 		    e->current_login_state, fcport->fw_login_state,
759 		    fcport->fc4_type, id.b24, fcport->d_id.b24,
760 		    loop_id, fcport->loop_id);
761 
762 		switch (fcport->disc_state) {
763 		case DSC_DELETE_PEND:
764 		case DSC_DELETED:
765 			break;
766 		default:
767 			if ((id.b24 != fcport->d_id.b24 &&
768 			    fcport->d_id.b24 &&
769 			    fcport->loop_id != FC_NO_LOOP_ID) ||
770 			    (fcport->loop_id != FC_NO_LOOP_ID &&
771 				fcport->loop_id != loop_id)) {
772 				ql_dbg(ql_dbg_disc, vha, 0x20e3,
773 				    "%s %d %8phC post del sess\n",
774 				    __func__, __LINE__, fcport->port_name);
775 				if (fcport->n2n_flag)
776 					fcport->d_id.b24 = 0;
777 				qlt_schedule_sess_for_deletion(fcport);
778 				return;
779 			}
780 			break;
781 		}
782 
783 		fcport->loop_id = loop_id;
784 		if (fcport->n2n_flag)
785 			fcport->d_id.b24 = id.b24;
786 
787 		wwn = wwn_to_u64(fcport->port_name);
788 		qlt_find_sess_invalidate_other(vha, wwn,
789 			id, loop_id, &conflict_fcport);
790 
791 		if (conflict_fcport) {
792 			/*
793 			 * Another share fcport share the same loop_id &
794 			 * nport id. Conflict fcport needs to finish
795 			 * cleanup before this fcport can proceed to login.
796 			 */
797 			conflict_fcport->conflict = fcport;
798 			fcport->login_pause = 1;
799 		}
800 
801 		switch (vha->hw->current_topology) {
802 		default:
803 			switch (current_login_state) {
804 			case DSC_LS_PRLI_COMP:
805 				ql_dbg(ql_dbg_disc,
806 				    vha, 0x20e4, "%s %d %8phC post gpdb\n",
807 				    __func__, __LINE__, fcport->port_name);
808 
809 				if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
810 					fcport->port_type = FCT_INITIATOR;
811 				else
812 					fcport->port_type = FCT_TARGET;
813 				data[0] = data[1] = 0;
814 				qla2x00_post_async_adisc_work(vha, fcport,
815 				    data);
816 				break;
817 			case DSC_LS_PLOGI_COMP:
818 				if (vha->hw->flags.edif_enabled) {
819 					/* check to see if App support Secure */
820 					qla24xx_post_gpdb_work(vha, fcport, 0);
821 					break;
822 				}
823 				fallthrough;
824 			case DSC_LS_PORT_UNAVAIL:
825 			default:
826 				if (fcport->loop_id == FC_NO_LOOP_ID) {
827 					qla2x00_find_new_loop_id(vha, fcport);
828 					fcport->fw_login_state =
829 					    DSC_LS_PORT_UNAVAIL;
830 				}
831 				ql_dbg(ql_dbg_disc, vha, 0x20e5,
832 				    "%s %d %8phC\n", __func__, __LINE__,
833 				    fcport->port_name);
834 				qla24xx_fcport_handle_login(vha, fcport);
835 				break;
836 			}
837 			break;
838 		case ISP_CFG_N:
839 			fcport->fw_login_state = current_login_state;
840 			fcport->d_id = id;
841 			switch (current_login_state) {
842 			case DSC_LS_PRLI_PEND:
843 				/*
844 				 * In the middle of PRLI. Let it finish.
845 				 * Allow relogin code to recheck state again
846 				 * with GNL. Push disc_state back to DELETED
847 				 * so GNL can go out again
848 				 */
849 				qla2x00_set_fcport_disc_state(fcport,
850 				    DSC_DELETED);
851 				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
852 				break;
853 			case DSC_LS_PRLI_COMP:
854 				if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
855 					fcport->port_type = FCT_INITIATOR;
856 				else
857 					fcport->port_type = FCT_TARGET;
858 
859 				data[0] = data[1] = 0;
860 				qla2x00_post_async_adisc_work(vha, fcport,
861 				    data);
862 				break;
863 			case DSC_LS_PLOGI_COMP:
864 				if (vha->hw->flags.edif_enabled &&
865 				    vha->e_dbell.db_flags & EDB_ACTIVE) {
866 					/* check to see if App support secure or not */
867 					qla24xx_post_gpdb_work(vha, fcport, 0);
868 					break;
869 				}
870 				if (fcport_is_bigger(fcport)) {
871 					/* local adapter is smaller */
872 					if (fcport->loop_id != FC_NO_LOOP_ID)
873 						qla2x00_clear_loop_id(fcport);
874 
875 					fcport->loop_id = loop_id;
876 					qla24xx_fcport_handle_login(vha,
877 					    fcport);
878 					break;
879 				}
880 				fallthrough;
881 			default:
882 				if (fcport_is_smaller(fcport)) {
883 					/* local adapter is bigger */
884 					if (fcport->loop_id != FC_NO_LOOP_ID)
885 						qla2x00_clear_loop_id(fcport);
886 
887 					fcport->loop_id = loop_id;
888 					qla24xx_fcport_handle_login(vha,
889 					    fcport);
890 				}
891 				break;
892 			}
893 			break;
894 		} /* switch (ha->current_topology) */
895 	}
896 
897 	if (!found) {
898 		switch (vha->hw->current_topology) {
899 		case ISP_CFG_F:
900 		case ISP_CFG_FL:
901 			for (i = 0; i < n; i++) {
902 				e = &vha->gnl.l[i];
903 				id.b.domain = e->port_id[0];
904 				id.b.area = e->port_id[1];
905 				id.b.al_pa = e->port_id[2];
906 				id.b.rsvd_1 = 0;
907 				loop_id = le16_to_cpu(e->nport_handle);
908 
909 				if (fcport->d_id.b24 == id.b24) {
910 					conflict_fcport =
911 					    qla2x00_find_fcport_by_wwpn(vha,
912 						e->port_name, 0);
913 					if (conflict_fcport) {
914 						ql_dbg(ql_dbg_disc + ql_dbg_verbose,
915 						    vha, 0x20e5,
916 						    "%s %d %8phC post del sess\n",
917 						    __func__, __LINE__,
918 						    conflict_fcport->port_name);
919 						qlt_schedule_sess_for_deletion
920 							(conflict_fcport);
921 					}
922 				}
923 				/*
924 				 * FW already picked this loop id for
925 				 * another fcport
926 				 */
927 				if (fcport->loop_id == loop_id)
928 					fcport->loop_id = FC_NO_LOOP_ID;
929 			}
930 			qla24xx_fcport_handle_login(vha, fcport);
931 			break;
932 		case ISP_CFG_N:
933 			qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
934 			if (time_after_eq(jiffies, fcport->dm_login_expire)) {
935 				if (fcport->n2n_link_reset_cnt < 2) {
936 					fcport->n2n_link_reset_cnt++;
937 					/*
938 					 * remote port is not sending PLOGI.
939 					 * Reset link to kick start his state
940 					 * machine
941 					 */
942 					set_bit(N2N_LINK_RESET,
943 					    &vha->dpc_flags);
944 				} else {
945 					if (fcport->n2n_chip_reset < 1) {
946 						ql_log(ql_log_info, vha, 0x705d,
947 						    "Chip reset to bring laser down");
948 						set_bit(ISP_ABORT_NEEDED,
949 						    &vha->dpc_flags);
950 						fcport->n2n_chip_reset++;
951 					} else {
952 						ql_log(ql_log_info, vha, 0x705d,
953 						    "Remote port %8ph is not coming back\n",
954 						    fcport->port_name);
955 						fcport->scan_state = 0;
956 					}
957 				}
958 				qla2xxx_wake_dpc(vha);
959 			} else {
960 				/*
961 				 * report port suppose to do PLOGI. Give him
962 				 * more time. FW will catch it.
963 				 */
964 				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
965 			}
966 			break;
967 		default:
968 			break;
969 		}
970 	}
971 } /* gnl_event */
972 
973 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
974 {
975 	struct scsi_qla_host *vha = sp->vha;
976 	unsigned long flags;
977 	struct fc_port *fcport = NULL, *tf;
978 	u16 i, n = 0, loop_id;
979 	struct event_arg ea;
980 	struct get_name_list_extended *e;
981 	u64 wwn;
982 	struct list_head h;
983 	bool found = false;
984 
985 	ql_dbg(ql_dbg_disc, vha, 0x20e7,
986 	    "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
987 	    sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
988 	    sp->u.iocb_cmd.u.mbx.in_mb[2]);
989 
990 	if (res == QLA_FUNCTION_TIMEOUT)
991 		return;
992 
993 	sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
994 	memset(&ea, 0, sizeof(ea));
995 	ea.sp = sp;
996 	ea.rc = res;
997 
998 	if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
999 	    sizeof(struct get_name_list_extended)) {
1000 		n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
1001 		    sizeof(struct get_name_list_extended);
1002 		ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
1003 	}
1004 
1005 	for (i = 0; i < n; i++) {
1006 		e = &vha->gnl.l[i];
1007 		loop_id = le16_to_cpu(e->nport_handle);
1008 		/* mask out reserve bit */
1009 		loop_id = (loop_id & 0x7fff);
1010 		set_bit(loop_id, vha->hw->loop_id_map);
1011 		wwn = wwn_to_u64(e->port_name);
1012 
1013 		ql_dbg(ql_dbg_disc, vha, 0x20e8,
1014 		    "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1015 		    __func__, &wwn, e->port_id[2], e->port_id[1],
1016 		    e->port_id[0], e->current_login_state, e->last_login_state,
1017 		    (loop_id & 0x7fff));
1018 	}
1019 
1020 	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1021 
1022 	INIT_LIST_HEAD(&h);
1023 	fcport = tf = NULL;
1024 	if (!list_empty(&vha->gnl.fcports))
1025 		list_splice_init(&vha->gnl.fcports, &h);
1026 	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1027 
1028 	list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1029 		list_del_init(&fcport->gnl_entry);
1030 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1031 		fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1032 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1033 		ea.fcport = fcport;
1034 
1035 		qla24xx_handle_gnl_done_event(vha, &ea);
1036 	}
1037 
1038 	/* create new fcport if fw has knowledge of new sessions */
1039 	for (i = 0; i < n; i++) {
1040 		port_id_t id;
1041 		u64 wwnn;
1042 
1043 		e = &vha->gnl.l[i];
1044 		wwn = wwn_to_u64(e->port_name);
1045 
1046 		found = false;
1047 		list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1048 			if (!memcmp((u8 *)&wwn, fcport->port_name,
1049 			    WWN_SIZE)) {
1050 				found = true;
1051 				break;
1052 			}
1053 		}
1054 
1055 		id.b.domain = e->port_id[2];
1056 		id.b.area = e->port_id[1];
1057 		id.b.al_pa = e->port_id[0];
1058 		id.b.rsvd_1 = 0;
1059 
1060 		if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1061 			ql_dbg(ql_dbg_disc, vha, 0x2065,
1062 			    "%s %d %8phC %06x post new sess\n",
1063 			    __func__, __LINE__, (u8 *)&wwn, id.b24);
1064 			wwnn = wwn_to_u64(e->node_name);
1065 			qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1066 			    (u8 *)&wwnn, NULL, 0);
1067 		}
1068 	}
1069 
1070 	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1071 	vha->gnl.sent = 0;
1072 	if (!list_empty(&vha->gnl.fcports)) {
1073 		/* retrigger gnl */
1074 		list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1075 		    gnl_entry) {
1076 			list_del_init(&fcport->gnl_entry);
1077 			fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1078 			if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1079 				break;
1080 		}
1081 	}
1082 	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1083 
1084 	sp->free(sp);
1085 }
1086 
1087 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1088 {
1089 	srb_t *sp;
1090 	struct srb_iocb *mbx;
1091 	int rval = QLA_FUNCTION_FAILED;
1092 	unsigned long flags;
1093 	u16 *mb;
1094 
1095 	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1096 		return rval;
1097 
1098 	ql_dbg(ql_dbg_disc, vha, 0x20d9,
1099 	    "Async-gnlist WWPN %8phC \n", fcport->port_name);
1100 
1101 	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1102 	fcport->flags |= FCF_ASYNC_SENT;
1103 	qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1104 	fcport->last_rscn_gen = fcport->rscn_gen;
1105 	fcport->last_login_gen = fcport->login_gen;
1106 
1107 	list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1108 	if (vha->gnl.sent) {
1109 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1110 		return QLA_SUCCESS;
1111 	}
1112 	vha->gnl.sent = 1;
1113 	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1114 
1115 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1116 	if (!sp)
1117 		goto done;
1118 
1119 	sp->type = SRB_MB_IOCB;
1120 	sp->name = "gnlist";
1121 	sp->gen1 = fcport->rscn_gen;
1122 	sp->gen2 = fcport->login_gen;
1123 
1124 	mbx = &sp->u.iocb_cmd;
1125 	mbx->timeout = qla2x00_async_iocb_timeout;
1126 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
1127 
1128 	mb = sp->u.iocb_cmd.u.mbx.out_mb;
1129 	mb[0] = MBC_PORT_NODE_NAME_LIST;
1130 	mb[1] = BIT_2 | BIT_3;
1131 	mb[2] = MSW(vha->gnl.ldma);
1132 	mb[3] = LSW(vha->gnl.ldma);
1133 	mb[6] = MSW(MSD(vha->gnl.ldma));
1134 	mb[7] = LSW(MSD(vha->gnl.ldma));
1135 	mb[8] = vha->gnl.size;
1136 	mb[9] = vha->vp_idx;
1137 
1138 	sp->done = qla24xx_async_gnl_sp_done;
1139 
1140 	ql_dbg(ql_dbg_disc, vha, 0x20da,
1141 	    "Async-%s - OUT WWPN %8phC hndl %x\n",
1142 	    sp->name, fcport->port_name, sp->handle);
1143 
1144 	rval = qla2x00_start_sp(sp);
1145 	if (rval != QLA_SUCCESS)
1146 		goto done_free_sp;
1147 
1148 	return rval;
1149 
1150 done_free_sp:
1151 	sp->free(sp);
1152 done:
1153 	fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT);
1154 	return rval;
1155 }
1156 
1157 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1158 {
1159 	struct qla_work_evt *e;
1160 
1161 	e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1162 	if (!e)
1163 		return QLA_FUNCTION_FAILED;
1164 
1165 	e->u.fcport.fcport = fcport;
1166 	fcport->flags |= FCF_ASYNC_ACTIVE;
1167 	return qla2x00_post_work(vha, e);
1168 }
1169 
1170 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1171 {
1172 	struct scsi_qla_host *vha = sp->vha;
1173 	struct qla_hw_data *ha = vha->hw;
1174 	fc_port_t *fcport = sp->fcport;
1175 	u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1176 	struct event_arg ea;
1177 
1178 	ql_dbg(ql_dbg_disc, vha, 0x20db,
1179 	    "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1180 	    sp->name, res, fcport->port_name, mb[1], mb[2]);
1181 
1182 	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1183 
1184 	if (res == QLA_FUNCTION_TIMEOUT)
1185 		goto done;
1186 
1187 	memset(&ea, 0, sizeof(ea));
1188 	ea.fcport = fcport;
1189 	ea.sp = sp;
1190 
1191 	qla24xx_handle_gpdb_event(vha, &ea);
1192 
1193 done:
1194 	dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1195 		sp->u.iocb_cmd.u.mbx.in_dma);
1196 
1197 	sp->free(sp);
1198 }
1199 
1200 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1201 {
1202 	struct qla_work_evt *e;
1203 
1204 	if (vha->host->active_mode == MODE_TARGET)
1205 		return QLA_FUNCTION_FAILED;
1206 
1207 	e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1208 	if (!e)
1209 		return QLA_FUNCTION_FAILED;
1210 
1211 	e->u.fcport.fcport = fcport;
1212 
1213 	return qla2x00_post_work(vha, e);
1214 }
1215 
1216 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1217 {
1218 	struct scsi_qla_host *vha = sp->vha;
1219 	struct srb_iocb *lio = &sp->u.iocb_cmd;
1220 	struct event_arg ea;
1221 
1222 	ql_dbg(ql_dbg_disc, vha, 0x2129,
1223 	    "%s %8phC res %x\n", __func__,
1224 	    sp->fcport->port_name, res);
1225 
1226 	sp->fcport->flags &= ~FCF_ASYNC_SENT;
1227 
1228 	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1229 		memset(&ea, 0, sizeof(ea));
1230 		ea.fcport = sp->fcport;
1231 		ea.data[0] = lio->u.logio.data[0];
1232 		ea.data[1] = lio->u.logio.data[1];
1233 		ea.iop[0] = lio->u.logio.iop[0];
1234 		ea.iop[1] = lio->u.logio.iop[1];
1235 		ea.sp = sp;
1236 		if (res == QLA_OS_TIMER_EXPIRED)
1237 			ea.data[0] = QLA_OS_TIMER_EXPIRED;
1238 
1239 		qla24xx_handle_prli_done_event(vha, &ea);
1240 	}
1241 
1242 	sp->free(sp);
1243 }
1244 
1245 int
1246 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1247 {
1248 	srb_t *sp;
1249 	struct srb_iocb *lio;
1250 	int rval = QLA_FUNCTION_FAILED;
1251 
1252 	if (!vha->flags.online) {
1253 		ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1254 		    __func__, __LINE__, fcport->port_name);
1255 		return rval;
1256 	}
1257 
1258 	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1259 	    fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1260 	    qla_dual_mode_enabled(vha)) {
1261 		ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1262 		    __func__, __LINE__, fcport->port_name);
1263 		return rval;
1264 	}
1265 
1266 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1267 	if (!sp)
1268 		return rval;
1269 
1270 	fcport->flags |= FCF_ASYNC_SENT;
1271 	fcport->logout_completed = 0;
1272 
1273 	sp->type = SRB_PRLI_CMD;
1274 	sp->name = "prli";
1275 
1276 	lio = &sp->u.iocb_cmd;
1277 	lio->timeout = qla2x00_async_iocb_timeout;
1278 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1279 
1280 	sp->done = qla2x00_async_prli_sp_done;
1281 	lio->u.logio.flags = 0;
1282 
1283 	if (NVME_TARGET(vha->hw, fcport))
1284 		lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1285 
1286 	ql_dbg(ql_dbg_disc, vha, 0x211b,
1287 	    "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
1288 	    fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1289 	    fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
1290 	    NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
1291 
1292 	rval = qla2x00_start_sp(sp);
1293 	if (rval != QLA_SUCCESS) {
1294 		fcport->flags |= FCF_LOGIN_NEEDED;
1295 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1296 		goto done_free_sp;
1297 	}
1298 
1299 	return rval;
1300 
1301 done_free_sp:
1302 	sp->free(sp);
1303 	fcport->flags &= ~FCF_ASYNC_SENT;
1304 	return rval;
1305 }
1306 
1307 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1308 {
1309 	struct qla_work_evt *e;
1310 
1311 	e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1312 	if (!e)
1313 		return QLA_FUNCTION_FAILED;
1314 
1315 	e->u.fcport.fcport = fcport;
1316 	e->u.fcport.opt = opt;
1317 	fcport->flags |= FCF_ASYNC_ACTIVE;
1318 	return qla2x00_post_work(vha, e);
1319 }
1320 
1321 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1322 {
1323 	srb_t *sp;
1324 	struct srb_iocb *mbx;
1325 	int rval = QLA_FUNCTION_FAILED;
1326 	u16 *mb;
1327 	dma_addr_t pd_dma;
1328 	struct port_database_24xx *pd;
1329 	struct qla_hw_data *ha = vha->hw;
1330 
1331 	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
1332 	    fcport->loop_id == FC_NO_LOOP_ID) {
1333 		ql_log(ql_log_warn, vha, 0xffff,
1334 		    "%s: %8phC - not sending command.\n",
1335 		    __func__, fcport->port_name);
1336 		return rval;
1337 	}
1338 
1339 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1340 	if (!sp)
1341 		goto done;
1342 
1343 	qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1344 
1345 	fcport->flags |= FCF_ASYNC_SENT;
1346 	sp->type = SRB_MB_IOCB;
1347 	sp->name = "gpdb";
1348 	sp->gen1 = fcport->rscn_gen;
1349 	sp->gen2 = fcport->login_gen;
1350 
1351 	mbx = &sp->u.iocb_cmd;
1352 	mbx->timeout = qla2x00_async_iocb_timeout;
1353 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1354 
1355 	pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1356 	if (pd == NULL) {
1357 		ql_log(ql_log_warn, vha, 0xd043,
1358 		    "Failed to allocate port database structure.\n");
1359 		goto done_free_sp;
1360 	}
1361 
1362 	mb = sp->u.iocb_cmd.u.mbx.out_mb;
1363 	mb[0] = MBC_GET_PORT_DATABASE;
1364 	mb[1] = fcport->loop_id;
1365 	mb[2] = MSW(pd_dma);
1366 	mb[3] = LSW(pd_dma);
1367 	mb[6] = MSW(MSD(pd_dma));
1368 	mb[7] = LSW(MSD(pd_dma));
1369 	mb[9] = vha->vp_idx;
1370 	mb[10] = opt;
1371 
1372 	mbx->u.mbx.in = pd;
1373 	mbx->u.mbx.in_dma = pd_dma;
1374 
1375 	sp->done = qla24xx_async_gpdb_sp_done;
1376 
1377 	ql_dbg(ql_dbg_disc, vha, 0x20dc,
1378 	    "Async-%s %8phC hndl %x opt %x\n",
1379 	    sp->name, fcport->port_name, sp->handle, opt);
1380 
1381 	rval = qla2x00_start_sp(sp);
1382 	if (rval != QLA_SUCCESS)
1383 		goto done_free_sp;
1384 	return rval;
1385 
1386 done_free_sp:
1387 	if (pd)
1388 		dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1389 
1390 	sp->free(sp);
1391 	fcport->flags &= ~FCF_ASYNC_SENT;
1392 done:
1393 	fcport->flags &= ~FCF_ASYNC_ACTIVE;
1394 	qla24xx_post_gpdb_work(vha, fcport, opt);
1395 	return rval;
1396 }
1397 
1398 static
1399 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1400 {
1401 	unsigned long flags;
1402 
1403 	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1404 	ea->fcport->login_gen++;
1405 	ea->fcport->deleted = 0;
1406 	ea->fcport->logout_on_delete = 1;
1407 
1408 	if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1409 		vha->fcport_count++;
1410 		ea->fcport->login_succ = 1;
1411 
1412 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1413 		qla24xx_sched_upd_fcport(ea->fcport);
1414 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1415 	} else if (ea->fcport->login_succ) {
1416 		/*
1417 		 * We have an existing session. A late RSCN delivery
1418 		 * must have triggered the session to be re-validate.
1419 		 * Session is still valid.
1420 		 */
1421 		ql_dbg(ql_dbg_disc, vha, 0x20d6,
1422 		    "%s %d %8phC session revalidate success\n",
1423 		    __func__, __LINE__, ea->fcport->port_name);
1424 		qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1425 	}
1426 	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1427 }
1428 
1429 static int	qla_chk_secure_login(scsi_qla_host_t	*vha, fc_port_t *fcport,
1430 	struct port_database_24xx *pd)
1431 {
1432 	int rc = 0;
1433 
1434 	if (pd->secure_login) {
1435 		ql_dbg(ql_dbg_disc, vha, 0x104d,
1436 		    "Secure Login established on %8phC\n",
1437 		    fcport->port_name);
1438 		fcport->flags |= FCF_FCSP_DEVICE;
1439 	} else {
1440 		ql_dbg(ql_dbg_disc, vha, 0x104d,
1441 		    "non-Secure Login %8phC",
1442 		    fcport->port_name);
1443 		fcport->flags &= ~FCF_FCSP_DEVICE;
1444 	}
1445 	if (vha->hw->flags.edif_enabled) {
1446 		if (fcport->flags & FCF_FCSP_DEVICE) {
1447 			qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND);
1448 			/* Start edif prli timer & ring doorbell for app */
1449 			fcport->edif.rx_sa_set = 0;
1450 			fcport->edif.tx_sa_set = 0;
1451 			fcport->edif.rx_sa_pending = 0;
1452 			fcport->edif.tx_sa_pending = 0;
1453 
1454 			qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE,
1455 			    fcport->d_id.b24);
1456 
1457 			if (vha->e_dbell.db_flags ==  EDB_ACTIVE) {
1458 				ql_dbg(ql_dbg_disc, vha, 0x20ef,
1459 				    "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n",
1460 				    __func__, __LINE__, fcport->port_name);
1461 				fcport->edif.app_started = 1;
1462 				fcport->edif.app_sess_online = 1;
1463 
1464 				qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED,
1465 				    fcport->d_id.b24, 0, fcport);
1466 			}
1467 
1468 			rc = 1;
1469 		} else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
1470 			ql_dbg(ql_dbg_disc, vha, 0x2117,
1471 			    "%s %d %8phC post prli\n",
1472 			    __func__, __LINE__, fcport->port_name);
1473 			qla24xx_post_prli_work(vha, fcport);
1474 			rc = 1;
1475 		}
1476 	}
1477 	return rc;
1478 }
1479 
1480 static
1481 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1482 {
1483 	fc_port_t *fcport = ea->fcport;
1484 	struct port_database_24xx *pd;
1485 	struct srb *sp = ea->sp;
1486 	uint8_t	ls;
1487 
1488 	pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1489 
1490 	fcport->flags &= ~FCF_ASYNC_SENT;
1491 
1492 	ql_dbg(ql_dbg_disc, vha, 0x20d2,
1493 	    "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__,
1494 	    fcport->port_name, fcport->disc_state, pd->current_login_state,
1495 	    fcport->fc4_type, ea->rc);
1496 
1497 	if (fcport->disc_state == DSC_DELETE_PEND) {
1498 		ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n",
1499 		       __func__, __LINE__, fcport->port_name);
1500 		return;
1501 	}
1502 
1503 	if (NVME_TARGET(vha->hw, fcport))
1504 		ls = pd->current_login_state >> 4;
1505 	else
1506 		ls = pd->current_login_state & 0xf;
1507 
1508 	if (ea->sp->gen2 != fcport->login_gen) {
1509 		/* target side must have changed it. */
1510 
1511 		ql_dbg(ql_dbg_disc, vha, 0x20d3,
1512 		    "%s %8phC generation changed\n",
1513 		    __func__, fcport->port_name);
1514 		return;
1515 	} else if (ea->sp->gen1 != fcport->rscn_gen) {
1516 		qla_rscn_replay(fcport);
1517 		qlt_schedule_sess_for_deletion(fcport);
1518 		ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1519 		       __func__, __LINE__, fcport->port_name, ls);
1520 		return;
1521 	}
1522 
1523 	switch (ls) {
1524 	case PDS_PRLI_COMPLETE:
1525 		__qla24xx_parse_gpdb(vha, fcport, pd);
1526 		break;
1527 	case PDS_PLOGI_COMPLETE:
1528 		if (qla_chk_secure_login(vha, fcport, pd)) {
1529 			ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1530 			       __func__, __LINE__, fcport->port_name, ls);
1531 			return;
1532 		}
1533 		fallthrough;
1534 	case PDS_PLOGI_PENDING:
1535 	case PDS_PRLI_PENDING:
1536 	case PDS_PRLI2_PENDING:
1537 		/* Set discovery state back to GNL to Relogin attempt */
1538 		if (qla_dual_mode_enabled(vha) ||
1539 		    qla_ini_mode_enabled(vha)) {
1540 			qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1541 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1542 		}
1543 		ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1544 		       __func__, __LINE__, fcport->port_name, ls);
1545 		return;
1546 	case PDS_LOGO_PENDING:
1547 	case PDS_PORT_UNAVAILABLE:
1548 	default:
1549 		ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1550 		    __func__, __LINE__, fcport->port_name);
1551 		qlt_schedule_sess_for_deletion(fcport);
1552 		return;
1553 	}
1554 	__qla24xx_handle_gpdb_event(vha, ea);
1555 } /* gpdb event */
1556 
1557 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1558 {
1559 	u8 login = 0;
1560 	int rc;
1561 
1562 	if (qla_tgt_mode_enabled(vha))
1563 		return;
1564 
1565 	if (qla_dual_mode_enabled(vha)) {
1566 		if (N2N_TOPO(vha->hw)) {
1567 			u64 mywwn, wwn;
1568 
1569 			mywwn = wwn_to_u64(vha->port_name);
1570 			wwn = wwn_to_u64(fcport->port_name);
1571 			if (mywwn > wwn)
1572 				login = 1;
1573 			else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1574 			    && time_after_eq(jiffies,
1575 				    fcport->plogi_nack_done_deadline))
1576 				login = 1;
1577 		} else {
1578 			login = 1;
1579 		}
1580 	} else {
1581 		/* initiator mode */
1582 		login = 1;
1583 	}
1584 
1585 	if (login && fcport->login_retry) {
1586 		fcport->login_retry--;
1587 		if (fcport->loop_id == FC_NO_LOOP_ID) {
1588 			fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1589 			rc = qla2x00_find_new_loop_id(vha, fcport);
1590 			if (rc) {
1591 				ql_dbg(ql_dbg_disc, vha, 0x20e6,
1592 				    "%s %d %8phC post del sess - out of loopid\n",
1593 				    __func__, __LINE__, fcport->port_name);
1594 				fcport->scan_state = 0;
1595 				qlt_schedule_sess_for_deletion(fcport);
1596 				return;
1597 			}
1598 		}
1599 		ql_dbg(ql_dbg_disc, vha, 0x20bf,
1600 		    "%s %d %8phC post login\n",
1601 		    __func__, __LINE__, fcport->port_name);
1602 		qla2x00_post_async_login_work(vha, fcport, NULL);
1603 	}
1604 }
1605 
1606 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1607 {
1608 	u16 data[2];
1609 	u64 wwn;
1610 	u16 sec;
1611 
1612 	ql_dbg(ql_dbg_disc, vha, 0x20d8,
1613 	    "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n",
1614 	    __func__, fcport->port_name, fcport->disc_state,
1615 	    fcport->fw_login_state, fcport->login_pause, fcport->flags,
1616 	    fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1617 	    fcport->login_gen, fcport->loop_id, fcport->scan_state,
1618 	    fcport->fc4_type);
1619 
1620 	if (fcport->scan_state != QLA_FCPORT_FOUND)
1621 		return 0;
1622 
1623 	if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1624 	    qla_dual_mode_enabled(vha) &&
1625 	    ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1626 	     (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1627 		return 0;
1628 
1629 	if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1630 	    !N2N_TOPO(vha->hw)) {
1631 		if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1632 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1633 			return 0;
1634 		}
1635 	}
1636 
1637 	/* Target won't initiate port login if fabric is present */
1638 	if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1639 		return 0;
1640 
1641 	if (fcport->flags & FCF_ASYNC_SENT) {
1642 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1643 		return 0;
1644 	}
1645 
1646 	switch (fcport->disc_state) {
1647 	case DSC_DELETED:
1648 		wwn = wwn_to_u64(fcport->node_name);
1649 		switch (vha->hw->current_topology) {
1650 		case ISP_CFG_N:
1651 			if (fcport_is_smaller(fcport)) {
1652 				/* this adapter is bigger */
1653 				if (fcport->login_retry) {
1654 					if (fcport->loop_id == FC_NO_LOOP_ID) {
1655 						qla2x00_find_new_loop_id(vha,
1656 						    fcport);
1657 						fcport->fw_login_state =
1658 						    DSC_LS_PORT_UNAVAIL;
1659 					}
1660 					fcport->login_retry--;
1661 					qla_post_els_plogi_work(vha, fcport);
1662 				} else {
1663 					ql_log(ql_log_info, vha, 0x705d,
1664 					    "Unable to reach remote port %8phC",
1665 					    fcport->port_name);
1666 				}
1667 			} else {
1668 				qla24xx_post_gnl_work(vha, fcport);
1669 			}
1670 			break;
1671 		default:
1672 			if (wwn == 0)    {
1673 				ql_dbg(ql_dbg_disc, vha, 0xffff,
1674 				    "%s %d %8phC post GNNID\n",
1675 				    __func__, __LINE__, fcport->port_name);
1676 				qla24xx_post_gnnid_work(vha, fcport);
1677 			} else if (fcport->loop_id == FC_NO_LOOP_ID) {
1678 				ql_dbg(ql_dbg_disc, vha, 0x20bd,
1679 				    "%s %d %8phC post gnl\n",
1680 				    __func__, __LINE__, fcport->port_name);
1681 				qla24xx_post_gnl_work(vha, fcport);
1682 			} else {
1683 				qla_chk_n2n_b4_login(vha, fcport);
1684 			}
1685 			break;
1686 		}
1687 		break;
1688 
1689 	case DSC_GNL:
1690 		switch (vha->hw->current_topology) {
1691 		case ISP_CFG_N:
1692 			if ((fcport->current_login_state & 0xf) == 0x6) {
1693 				ql_dbg(ql_dbg_disc, vha, 0x2118,
1694 				    "%s %d %8phC post GPDB work\n",
1695 				    __func__, __LINE__, fcport->port_name);
1696 				fcport->chip_reset =
1697 					vha->hw->base_qpair->chip_reset;
1698 				qla24xx_post_gpdb_work(vha, fcport, 0);
1699 			}  else {
1700 				ql_dbg(ql_dbg_disc, vha, 0x2118,
1701 				    "%s %d %8phC post %s PRLI\n",
1702 				    __func__, __LINE__, fcport->port_name,
1703 				    NVME_TARGET(vha->hw, fcport) ? "NVME" :
1704 				    "FC");
1705 				qla24xx_post_prli_work(vha, fcport);
1706 			}
1707 			break;
1708 		default:
1709 			if (fcport->login_pause) {
1710 				ql_dbg(ql_dbg_disc, vha, 0x20d8,
1711 				    "%s %d %8phC exit\n",
1712 				    __func__, __LINE__,
1713 				    fcport->port_name);
1714 				fcport->last_rscn_gen = fcport->rscn_gen;
1715 				fcport->last_login_gen = fcport->login_gen;
1716 				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1717 				break;
1718 			}
1719 			qla_chk_n2n_b4_login(vha, fcport);
1720 			break;
1721 		}
1722 		break;
1723 
1724 	case DSC_LOGIN_FAILED:
1725 		if (N2N_TOPO(vha->hw))
1726 			qla_chk_n2n_b4_login(vha, fcport);
1727 		else
1728 			qlt_schedule_sess_for_deletion(fcport);
1729 		break;
1730 
1731 	case DSC_LOGIN_COMPLETE:
1732 		/* recheck login state */
1733 		data[0] = data[1] = 0;
1734 		qla2x00_post_async_adisc_work(vha, fcport, data);
1735 		break;
1736 
1737 	case DSC_LOGIN_PEND:
1738 		if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1739 			qla24xx_post_prli_work(vha, fcport);
1740 		break;
1741 
1742 	case DSC_UPD_FCPORT:
1743 		sec =  jiffies_to_msecs(jiffies -
1744 		    fcport->jiffies_at_registration)/1000;
1745 		if (fcport->sec_since_registration < sec && sec &&
1746 		    !(sec % 60)) {
1747 			fcport->sec_since_registration = sec;
1748 			ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1749 			    "%s %8phC - Slow Rport registration(%d Sec)\n",
1750 			    __func__, fcport->port_name, sec);
1751 		}
1752 
1753 		if (fcport->next_disc_state != DSC_DELETE_PEND)
1754 			fcport->next_disc_state = DSC_ADISC;
1755 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1756 		break;
1757 
1758 	default:
1759 		break;
1760 	}
1761 
1762 	return 0;
1763 }
1764 
1765 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1766     u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1767 {
1768 	struct qla_work_evt *e;
1769 
1770 	e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1771 	if (!e)
1772 		return QLA_FUNCTION_FAILED;
1773 
1774 	e->u.new_sess.id = *id;
1775 	e->u.new_sess.pla = pla;
1776 	e->u.new_sess.fc4_type = fc4_type;
1777 	memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1778 	if (node_name)
1779 		memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1780 
1781 	return qla2x00_post_work(vha, e);
1782 }
1783 
1784 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1785 {
1786 	fc_port_t *fcport;
1787 	unsigned long flags;
1788 
1789 	fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1790 	if (fcport) {
1791 		if (fcport->flags & FCF_FCP2_DEVICE) {
1792 			ql_dbg(ql_dbg_disc, vha, 0x2115,
1793 			       "Delaying session delete for FCP2 portid=%06x %8phC ",
1794 			       fcport->d_id.b24, fcport->port_name);
1795 			return;
1796 		}
1797 		fcport->scan_needed = 1;
1798 		fcport->rscn_gen++;
1799 	}
1800 
1801 	spin_lock_irqsave(&vha->work_lock, flags);
1802 	if (vha->scan.scan_flags == 0) {
1803 		ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1804 		vha->scan.scan_flags |= SF_QUEUED;
1805 		schedule_delayed_work(&vha->scan.scan_work, 5);
1806 	}
1807 	spin_unlock_irqrestore(&vha->work_lock, flags);
1808 }
1809 
1810 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1811 	struct event_arg *ea)
1812 {
1813 	fc_port_t *fcport = ea->fcport;
1814 
1815 	if (test_bit(UNLOADING, &vha->dpc_flags))
1816 		return;
1817 
1818 	ql_dbg(ql_dbg_disc, vha, 0x2102,
1819 	    "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1820 	    __func__, fcport->port_name, fcport->disc_state,
1821 	    fcport->fw_login_state, fcport->login_pause,
1822 	    fcport->deleted, fcport->conflict,
1823 	    fcport->last_rscn_gen, fcport->rscn_gen,
1824 	    fcport->last_login_gen, fcport->login_gen,
1825 	    fcport->flags);
1826 
1827 	if (fcport->last_rscn_gen != fcport->rscn_gen) {
1828 		ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1829 		    __func__, __LINE__, fcport->port_name);
1830 		qla24xx_post_gnl_work(vha, fcport);
1831 		return;
1832 	}
1833 
1834 	qla24xx_fcport_handle_login(vha, fcport);
1835 }
1836 
1837 void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1838 				      struct event_arg *ea)
1839 {
1840 	if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) &&
1841 	    vha->hw->flags.edif_enabled) {
1842 		/* check to see if App support Secure */
1843 		qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1844 		return;
1845 	}
1846 
1847 	/* for pure Target Mode, PRLI will not be initiated */
1848 	if (vha->host->active_mode == MODE_TARGET)
1849 		return;
1850 
1851 	ql_dbg(ql_dbg_disc, vha, 0x2118,
1852 	    "%s %d %8phC post PRLI\n",
1853 	    __func__, __LINE__, ea->fcport->port_name);
1854 	qla24xx_post_prli_work(vha, ea->fcport);
1855 }
1856 
1857 /*
1858  * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1859  * to be consumed by the fcport
1860  */
1861 void qla_rscn_replay(fc_port_t *fcport)
1862 {
1863 	struct event_arg ea;
1864 
1865 	switch (fcport->disc_state) {
1866 	case DSC_DELETE_PEND:
1867 		return;
1868 	default:
1869 		break;
1870 	}
1871 
1872 	if (fcport->scan_needed) {
1873 		memset(&ea, 0, sizeof(ea));
1874 		ea.id = fcport->d_id;
1875 		ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1876 		qla2x00_handle_rscn(fcport->vha, &ea);
1877 	}
1878 }
1879 
1880 static void
1881 qla2x00_tmf_iocb_timeout(void *data)
1882 {
1883 	srb_t *sp = data;
1884 	struct srb_iocb *tmf = &sp->u.iocb_cmd;
1885 	int rc, h;
1886 	unsigned long flags;
1887 
1888 	rc = qla24xx_async_abort_cmd(sp, false);
1889 	if (rc) {
1890 		spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
1891 		for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
1892 			if (sp->qpair->req->outstanding_cmds[h] == sp) {
1893 				sp->qpair->req->outstanding_cmds[h] = NULL;
1894 				break;
1895 			}
1896 		}
1897 		spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
1898 		tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
1899 		tmf->u.tmf.data = QLA_FUNCTION_FAILED;
1900 		complete(&tmf->u.tmf.comp);
1901 	}
1902 }
1903 
1904 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
1905 {
1906 	struct srb_iocb *tmf = &sp->u.iocb_cmd;
1907 
1908 	complete(&tmf->u.tmf.comp);
1909 }
1910 
1911 int
1912 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1913 	uint32_t tag)
1914 {
1915 	struct scsi_qla_host *vha = fcport->vha;
1916 	struct srb_iocb *tm_iocb;
1917 	srb_t *sp;
1918 	int rval = QLA_FUNCTION_FAILED;
1919 
1920 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1921 	if (!sp)
1922 		goto done;
1923 
1924 	tm_iocb = &sp->u.iocb_cmd;
1925 	sp->type = SRB_TM_CMD;
1926 	sp->name = "tmf";
1927 
1928 	tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1929 	init_completion(&tm_iocb->u.tmf.comp);
1930 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1931 
1932 	tm_iocb->u.tmf.flags = flags;
1933 	tm_iocb->u.tmf.lun = lun;
1934 	tm_iocb->u.tmf.data = tag;
1935 	sp->done = qla2x00_tmf_sp_done;
1936 
1937 	ql_dbg(ql_dbg_taskm, vha, 0x802f,
1938 	    "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1939 	    sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1940 	    fcport->d_id.b.area, fcport->d_id.b.al_pa);
1941 
1942 	rval = qla2x00_start_sp(sp);
1943 	if (rval != QLA_SUCCESS)
1944 		goto done_free_sp;
1945 	wait_for_completion(&tm_iocb->u.tmf.comp);
1946 
1947 	rval = tm_iocb->u.tmf.data;
1948 
1949 	if (rval != QLA_SUCCESS) {
1950 		ql_log(ql_log_warn, vha, 0x8030,
1951 		    "TM IOCB failed (%x).\n", rval);
1952 	}
1953 
1954 	if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1955 		flags = tm_iocb->u.tmf.flags;
1956 		lun = (uint16_t)tm_iocb->u.tmf.lun;
1957 
1958 		/* Issue Marker IOCB */
1959 		qla2x00_marker(vha, vha->hw->base_qpair,
1960 		    fcport->loop_id, lun,
1961 		    flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1962 	}
1963 
1964 done_free_sp:
1965 	sp->free(sp);
1966 	fcport->flags &= ~FCF_ASYNC_SENT;
1967 done:
1968 	return rval;
1969 }
1970 
1971 int
1972 qla24xx_async_abort_command(srb_t *sp)
1973 {
1974 	unsigned long   flags = 0;
1975 
1976 	uint32_t	handle;
1977 	fc_port_t	*fcport = sp->fcport;
1978 	struct qla_qpair *qpair = sp->qpair;
1979 	struct scsi_qla_host *vha = fcport->vha;
1980 	struct req_que *req = qpair->req;
1981 
1982 	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1983 	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1984 		if (req->outstanding_cmds[handle] == sp)
1985 			break;
1986 	}
1987 	spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1988 
1989 	if (handle == req->num_outstanding_cmds) {
1990 		/* Command not found. */
1991 		return QLA_ERR_NOT_FOUND;
1992 	}
1993 	if (sp->type == SRB_FXIOCB_DCMD)
1994 		return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1995 		    FXDISC_ABORT_IOCTL);
1996 
1997 	return qla24xx_async_abort_cmd(sp, true);
1998 }
1999 
2000 static void
2001 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2002 {
2003 	struct srb *sp;
2004 	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2005 		  ea->data[0]);
2006 
2007 	switch (ea->data[0]) {
2008 	case MBS_COMMAND_COMPLETE:
2009 		ql_dbg(ql_dbg_disc, vha, 0x2118,
2010 		    "%s %d %8phC post gpdb\n",
2011 		    __func__, __LINE__, ea->fcport->port_name);
2012 
2013 		ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2014 		ea->fcport->logout_on_delete = 1;
2015 		ea->fcport->nvme_prli_service_param = ea->iop[0];
2016 		if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
2017 			ea->fcport->nvme_first_burst_size =
2018 			    (ea->iop[1] & 0xffff) * 512;
2019 		else
2020 			ea->fcport->nvme_first_burst_size = 0;
2021 		qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2022 		break;
2023 	default:
2024 		if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
2025 		    (ea->iop[1] == 0x50000)) {   /* reson 5=busy expl:0x0 */
2026 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2027 			ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
2028 			break;
2029 		}
2030 
2031 		sp = ea->sp;
2032 		ql_dbg(ql_dbg_disc, vha, 0x2118,
2033 		       "%s %d %8phC priority %s, fc4type %x prev try %s\n",
2034 		       __func__, __LINE__, ea->fcport->port_name,
2035 		       vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
2036 		       "FCP" : "NVMe", ea->fcport->fc4_type,
2037 		       (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ?
2038 			"NVME" : "FCP");
2039 
2040 		if (NVME_FCP_TARGET(ea->fcport)) {
2041 			if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI)
2042 				ea->fcport->do_prli_nvme = 0;
2043 			else
2044 				ea->fcport->do_prli_nvme = 1;
2045 		} else {
2046 			ea->fcport->do_prli_nvme = 0;
2047 		}
2048 
2049 		if (N2N_TOPO(vha->hw)) {
2050 			if (ea->fcport->n2n_link_reset_cnt <
2051 			    vha->hw->login_retry_count) {
2052 				ea->fcport->n2n_link_reset_cnt++;
2053 				vha->relogin_jif = jiffies + 2 * HZ;
2054 				/*
2055 				 * PRLI failed. Reset link to kick start
2056 				 * state machine
2057 				 */
2058 				set_bit(N2N_LINK_RESET, &vha->dpc_flags);
2059 				qla2xxx_wake_dpc(vha);
2060 			} else {
2061 				ql_log(ql_log_warn, vha, 0x2119,
2062 				       "%s %d %8phC Unable to reconnect\n",
2063 				       __func__, __LINE__,
2064 				       ea->fcport->port_name);
2065 			}
2066 		} else {
2067 			/*
2068 			 * switch connect. login failed. Take connection down
2069 			 * and allow relogin to retrigger
2070 			 */
2071 			ea->fcport->flags &= ~FCF_ASYNC_SENT;
2072 			ea->fcport->keep_nport_handle = 0;
2073 			ea->fcport->logout_on_delete = 1;
2074 			qlt_schedule_sess_for_deletion(ea->fcport);
2075 		}
2076 		break;
2077 	}
2078 }
2079 
2080 void
2081 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2082 {
2083 	port_id_t cid;	/* conflict Nport id */
2084 	u16 lid;
2085 	struct fc_port *conflict_fcport;
2086 	unsigned long flags;
2087 	struct fc_port *fcport = ea->fcport;
2088 
2089 	ql_dbg(ql_dbg_disc, vha, 0xffff,
2090 	    "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
2091 	    __func__, fcport->port_name, fcport->disc_state,
2092 	    fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
2093 	    ea->sp->gen1, fcport->rscn_gen,
2094 	    ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
2095 
2096 	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
2097 	    (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
2098 		ql_dbg(ql_dbg_disc, vha, 0x20ea,
2099 		    "%s %d %8phC Remote is trying to login\n",
2100 		    __func__, __LINE__, fcport->port_name);
2101 		return;
2102 	}
2103 
2104 	if ((fcport->disc_state == DSC_DELETE_PEND) ||
2105 	    (fcport->disc_state == DSC_DELETED)) {
2106 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2107 		return;
2108 	}
2109 
2110 	if (ea->sp->gen2 != fcport->login_gen) {
2111 		/* target side must have changed it. */
2112 		ql_dbg(ql_dbg_disc, vha, 0x20d3,
2113 		    "%s %8phC generation changed\n",
2114 		    __func__, fcport->port_name);
2115 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2116 		return;
2117 	} else if (ea->sp->gen1 != fcport->rscn_gen) {
2118 		ql_dbg(ql_dbg_disc, vha, 0x20d3,
2119 		    "%s %8phC RSCN generation changed\n",
2120 		    __func__, fcport->port_name);
2121 		qla_rscn_replay(fcport);
2122 		qlt_schedule_sess_for_deletion(fcport);
2123 		return;
2124 	}
2125 
2126 	WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2127 		  ea->data[0]);
2128 
2129 	switch (ea->data[0]) {
2130 	case MBS_COMMAND_COMPLETE:
2131 		/*
2132 		 * Driver must validate login state - If PRLI not complete,
2133 		 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2134 		 * requests.
2135 		 */
2136 		if (vha->hw->flags.edif_enabled) {
2137 			set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2138 			spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2139 			ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2140 			ea->fcport->logout_on_delete = 1;
2141 			ea->fcport->send_els_logo = 0;
2142 			ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
2143 			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2144 
2145 			qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2146 		} else {
2147 			if (NVME_TARGET(vha->hw, fcport)) {
2148 				ql_dbg(ql_dbg_disc, vha, 0x2117,
2149 				    "%s %d %8phC post prli\n",
2150 				    __func__, __LINE__, fcport->port_name);
2151 				qla24xx_post_prli_work(vha, fcport);
2152 			} else {
2153 				ql_dbg(ql_dbg_disc, vha, 0x20ea,
2154 				    "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2155 				    __func__, __LINE__, fcport->port_name,
2156 				    fcport->loop_id, fcport->d_id.b24);
2157 
2158 				set_bit(fcport->loop_id, vha->hw->loop_id_map);
2159 				spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2160 				fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2161 				fcport->logout_on_delete = 1;
2162 				fcport->send_els_logo = 0;
2163 				fcport->fw_login_state = DSC_LS_PRLI_COMP;
2164 				spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2165 
2166 				qla24xx_post_gpdb_work(vha, fcport, 0);
2167 			}
2168 		}
2169 		break;
2170 	case MBS_COMMAND_ERROR:
2171 		ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2172 		    __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2173 
2174 		ea->fcport->flags &= ~FCF_ASYNC_SENT;
2175 		qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_FAILED);
2176 		if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
2177 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2178 		else
2179 			qla2x00_mark_device_lost(vha, ea->fcport, 1);
2180 		break;
2181 	case MBS_LOOP_ID_USED:
2182 		/* data[1] = IO PARAM 1 = nport ID  */
2183 		cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2184 		cid.b.area   = (ea->iop[1] >>  8) & 0xff;
2185 		cid.b.al_pa  = ea->iop[1] & 0xff;
2186 		cid.b.rsvd_1 = 0;
2187 
2188 		ql_dbg(ql_dbg_disc, vha, 0x20ec,
2189 		    "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2190 		    __func__, __LINE__, ea->fcport->port_name,
2191 		    ea->fcport->loop_id, cid.b24);
2192 
2193 		set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2194 		ea->fcport->loop_id = FC_NO_LOOP_ID;
2195 		qla24xx_post_gnl_work(vha, ea->fcport);
2196 		break;
2197 	case MBS_PORT_ID_USED:
2198 		lid = ea->iop[1] & 0xffff;
2199 		qlt_find_sess_invalidate_other(vha,
2200 		    wwn_to_u64(ea->fcport->port_name),
2201 		    ea->fcport->d_id, lid, &conflict_fcport);
2202 
2203 		if (conflict_fcport) {
2204 			/*
2205 			 * Another fcport share the same loop_id/nport id.
2206 			 * Conflict fcport needs to finish cleanup before this
2207 			 * fcport can proceed to login.
2208 			 */
2209 			conflict_fcport->conflict = ea->fcport;
2210 			ea->fcport->login_pause = 1;
2211 
2212 			ql_dbg(ql_dbg_disc, vha, 0x20ed,
2213 			    "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2214 			    __func__, __LINE__, ea->fcport->port_name,
2215 			    ea->fcport->d_id.b24, lid);
2216 		} else {
2217 			ql_dbg(ql_dbg_disc, vha, 0x20ed,
2218 			    "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2219 			    __func__, __LINE__, ea->fcport->port_name,
2220 			    ea->fcport->d_id.b24, lid);
2221 
2222 			qla2x00_clear_loop_id(ea->fcport);
2223 			set_bit(lid, vha->hw->loop_id_map);
2224 			ea->fcport->loop_id = lid;
2225 			ea->fcport->keep_nport_handle = 0;
2226 			ea->fcport->logout_on_delete = 1;
2227 			qlt_schedule_sess_for_deletion(ea->fcport);
2228 		}
2229 		break;
2230 	}
2231 	return;
2232 }
2233 
2234 /****************************************************************************/
2235 /*                QLogic ISP2x00 Hardware Support Functions.                */
2236 /****************************************************************************/
2237 
2238 static int
2239 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2240 {
2241 	int rval = QLA_SUCCESS;
2242 	struct qla_hw_data *ha = vha->hw;
2243 	uint32_t idc_major_ver, idc_minor_ver;
2244 	uint16_t config[4];
2245 
2246 	qla83xx_idc_lock(vha, 0);
2247 
2248 	/* SV: TODO: Assign initialization timeout from
2249 	 * flash-info / other param
2250 	 */
2251 	ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2252 	ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2253 
2254 	/* Set our fcoe function presence */
2255 	if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2256 		ql_dbg(ql_dbg_p3p, vha, 0xb077,
2257 		    "Error while setting DRV-Presence.\n");
2258 		rval = QLA_FUNCTION_FAILED;
2259 		goto exit;
2260 	}
2261 
2262 	/* Decide the reset ownership */
2263 	qla83xx_reset_ownership(vha);
2264 
2265 	/*
2266 	 * On first protocol driver load:
2267 	 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2268 	 * register.
2269 	 * Others: Check compatibility with current IDC Major version.
2270 	 */
2271 	qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2272 	if (ha->flags.nic_core_reset_owner) {
2273 		/* Set IDC Major version */
2274 		idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2275 		qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2276 
2277 		/* Clearing IDC-Lock-Recovery register */
2278 		qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2279 	} else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2280 		/*
2281 		 * Clear further IDC participation if we are not compatible with
2282 		 * the current IDC Major Version.
2283 		 */
2284 		ql_log(ql_log_warn, vha, 0xb07d,
2285 		    "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2286 		    idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2287 		__qla83xx_clear_drv_presence(vha);
2288 		rval = QLA_FUNCTION_FAILED;
2289 		goto exit;
2290 	}
2291 	/* Each function sets its supported Minor version. */
2292 	qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2293 	idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2294 	qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2295 
2296 	if (ha->flags.nic_core_reset_owner) {
2297 		memset(config, 0, sizeof(config));
2298 		if (!qla81xx_get_port_config(vha, config))
2299 			qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2300 			    QLA8XXX_DEV_READY);
2301 	}
2302 
2303 	rval = qla83xx_idc_state_handler(vha);
2304 
2305 exit:
2306 	qla83xx_idc_unlock(vha, 0);
2307 
2308 	return rval;
2309 }
2310 
2311 /*
2312 * qla2x00_initialize_adapter
2313 *      Initialize board.
2314 *
2315 * Input:
2316 *      ha = adapter block pointer.
2317 *
2318 * Returns:
2319 *      0 = success
2320 */
2321 int
2322 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2323 {
2324 	int	rval;
2325 	struct qla_hw_data *ha = vha->hw;
2326 	struct req_que *req = ha->req_q_map[0];
2327 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2328 
2329 	memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2330 	memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2331 
2332 	/* Clear adapter flags. */
2333 	vha->flags.online = 0;
2334 	ha->flags.chip_reset_done = 0;
2335 	vha->flags.reset_active = 0;
2336 	ha->flags.pci_channel_io_perm_failure = 0;
2337 	ha->flags.eeh_busy = 0;
2338 	vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2339 	atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2340 	atomic_set(&vha->loop_state, LOOP_DOWN);
2341 	vha->device_flags = DFLG_NO_CABLE;
2342 	vha->dpc_flags = 0;
2343 	vha->flags.management_server_logged_in = 0;
2344 	vha->marker_needed = 0;
2345 	ha->isp_abort_cnt = 0;
2346 	ha->beacon_blink_led = 0;
2347 
2348 	set_bit(0, ha->req_qid_map);
2349 	set_bit(0, ha->rsp_qid_map);
2350 
2351 	ql_dbg(ql_dbg_init, vha, 0x0040,
2352 	    "Configuring PCI space...\n");
2353 	rval = ha->isp_ops->pci_config(vha);
2354 	if (rval) {
2355 		ql_log(ql_log_warn, vha, 0x0044,
2356 		    "Unable to configure PCI space.\n");
2357 		return (rval);
2358 	}
2359 
2360 	ha->isp_ops->reset_chip(vha);
2361 
2362 	/* Check for secure flash support */
2363 	if (IS_QLA28XX(ha)) {
2364 		if (rd_reg_word(&reg->mailbox12) & BIT_0)
2365 			ha->flags.secure_adapter = 1;
2366 		ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
2367 		    (ha->flags.secure_adapter) ? "Yes" : "No");
2368 	}
2369 
2370 
2371 	rval = qla2xxx_get_flash_info(vha);
2372 	if (rval) {
2373 		ql_log(ql_log_fatal, vha, 0x004f,
2374 		    "Unable to validate FLASH data.\n");
2375 		return rval;
2376 	}
2377 
2378 	if (IS_QLA8044(ha)) {
2379 		qla8044_read_reset_template(vha);
2380 
2381 		/* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2382 		 * If DONRESET_BIT0 is set, drivers should not set dev_state
2383 		 * to NEED_RESET. But if NEED_RESET is set, drivers should
2384 		 * should honor the reset. */
2385 		if (ql2xdontresethba == 1)
2386 			qla8044_set_idc_dontreset(vha);
2387 	}
2388 
2389 	ha->isp_ops->get_flash_version(vha, req->ring);
2390 	ql_dbg(ql_dbg_init, vha, 0x0061,
2391 	    "Configure NVRAM parameters...\n");
2392 
2393 	/* Let priority default to FCP, can be overridden by nvram_config */
2394 	ha->fc4_type_priority = FC4_PRIORITY_FCP;
2395 
2396 	ha->isp_ops->nvram_config(vha);
2397 
2398 	if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2399 	    ha->fc4_type_priority != FC4_PRIORITY_NVME)
2400 		ha->fc4_type_priority = FC4_PRIORITY_FCP;
2401 
2402 	ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
2403 	       ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2404 
2405 	if (ha->flags.disable_serdes) {
2406 		/* Mask HBA via NVRAM settings? */
2407 		ql_log(ql_log_info, vha, 0x0077,
2408 		    "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2409 		return QLA_FUNCTION_FAILED;
2410 	}
2411 
2412 	ql_dbg(ql_dbg_init, vha, 0x0078,
2413 	    "Verifying loaded RISC code...\n");
2414 
2415 	/* If smartsan enabled then require fdmi and rdp enabled */
2416 	if (ql2xsmartsan) {
2417 		ql2xfdmienable = 1;
2418 		ql2xrdpenable = 1;
2419 	}
2420 
2421 	if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2422 		rval = ha->isp_ops->chip_diag(vha);
2423 		if (rval)
2424 			return (rval);
2425 		rval = qla2x00_setup_chip(vha);
2426 		if (rval)
2427 			return (rval);
2428 	}
2429 
2430 	if (IS_QLA84XX(ha)) {
2431 		ha->cs84xx = qla84xx_get_chip(vha);
2432 		if (!ha->cs84xx) {
2433 			ql_log(ql_log_warn, vha, 0x00d0,
2434 			    "Unable to configure ISP84XX.\n");
2435 			return QLA_FUNCTION_FAILED;
2436 		}
2437 	}
2438 
2439 	if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2440 		rval = qla2x00_init_rings(vha);
2441 
2442 	/* No point in continuing if firmware initialization failed. */
2443 	if (rval != QLA_SUCCESS)
2444 		return rval;
2445 
2446 	ha->flags.chip_reset_done = 1;
2447 
2448 	if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2449 		/* Issue verify 84xx FW IOCB to complete 84xx initialization */
2450 		rval = qla84xx_init_chip(vha);
2451 		if (rval != QLA_SUCCESS) {
2452 			ql_log(ql_log_warn, vha, 0x00d4,
2453 			    "Unable to initialize ISP84XX.\n");
2454 			qla84xx_put_chip(vha);
2455 		}
2456 	}
2457 
2458 	/* Load the NIC Core f/w if we are the first protocol driver. */
2459 	if (IS_QLA8031(ha)) {
2460 		rval = qla83xx_nic_core_fw_load(vha);
2461 		if (rval)
2462 			ql_log(ql_log_warn, vha, 0x0124,
2463 			    "Error in initializing NIC Core f/w.\n");
2464 	}
2465 
2466 	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2467 		qla24xx_read_fcp_prio_cfg(vha);
2468 
2469 	if (IS_P3P_TYPE(ha))
2470 		qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2471 	else
2472 		qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2473 
2474 	return (rval);
2475 }
2476 
2477 /**
2478  * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2479  * @vha: HA context
2480  *
2481  * Returns 0 on success.
2482  */
2483 int
2484 qla2100_pci_config(scsi_qla_host_t *vha)
2485 {
2486 	uint16_t w;
2487 	unsigned long flags;
2488 	struct qla_hw_data *ha = vha->hw;
2489 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2490 
2491 	pci_set_master(ha->pdev);
2492 	pci_try_set_mwi(ha->pdev);
2493 
2494 	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2495 	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2496 	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2497 
2498 	pci_disable_rom(ha->pdev);
2499 
2500 	/* Get PCI bus information. */
2501 	spin_lock_irqsave(&ha->hardware_lock, flags);
2502 	ha->pci_attr = rd_reg_word(&reg->ctrl_status);
2503 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2504 
2505 	return QLA_SUCCESS;
2506 }
2507 
2508 /**
2509  * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2510  * @vha: HA context
2511  *
2512  * Returns 0 on success.
2513  */
2514 int
2515 qla2300_pci_config(scsi_qla_host_t *vha)
2516 {
2517 	uint16_t	w;
2518 	unsigned long   flags = 0;
2519 	uint32_t	cnt;
2520 	struct qla_hw_data *ha = vha->hw;
2521 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2522 
2523 	pci_set_master(ha->pdev);
2524 	pci_try_set_mwi(ha->pdev);
2525 
2526 	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2527 	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2528 
2529 	if (IS_QLA2322(ha) || IS_QLA6322(ha))
2530 		w &= ~PCI_COMMAND_INTX_DISABLE;
2531 	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2532 
2533 	/*
2534 	 * If this is a 2300 card and not 2312, reset the
2535 	 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2536 	 * the 2310 also reports itself as a 2300 so we need to get the
2537 	 * fb revision level -- a 6 indicates it really is a 2300 and
2538 	 * not a 2310.
2539 	 */
2540 	if (IS_QLA2300(ha)) {
2541 		spin_lock_irqsave(&ha->hardware_lock, flags);
2542 
2543 		/* Pause RISC. */
2544 		wrt_reg_word(&reg->hccr, HCCR_PAUSE_RISC);
2545 		for (cnt = 0; cnt < 30000; cnt++) {
2546 			if ((rd_reg_word(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
2547 				break;
2548 
2549 			udelay(10);
2550 		}
2551 
2552 		/* Select FPM registers. */
2553 		wrt_reg_word(&reg->ctrl_status, 0x20);
2554 		rd_reg_word(&reg->ctrl_status);
2555 
2556 		/* Get the fb rev level */
2557 		ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2558 
2559 		if (ha->fb_rev == FPM_2300)
2560 			pci_clear_mwi(ha->pdev);
2561 
2562 		/* Deselect FPM registers. */
2563 		wrt_reg_word(&reg->ctrl_status, 0x0);
2564 		rd_reg_word(&reg->ctrl_status);
2565 
2566 		/* Release RISC module. */
2567 		wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
2568 		for (cnt = 0; cnt < 30000; cnt++) {
2569 			if ((rd_reg_word(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
2570 				break;
2571 
2572 			udelay(10);
2573 		}
2574 
2575 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
2576 	}
2577 
2578 	pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2579 
2580 	pci_disable_rom(ha->pdev);
2581 
2582 	/* Get PCI bus information. */
2583 	spin_lock_irqsave(&ha->hardware_lock, flags);
2584 	ha->pci_attr = rd_reg_word(&reg->ctrl_status);
2585 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2586 
2587 	return QLA_SUCCESS;
2588 }
2589 
2590 /**
2591  * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2592  * @vha: HA context
2593  *
2594  * Returns 0 on success.
2595  */
2596 int
2597 qla24xx_pci_config(scsi_qla_host_t *vha)
2598 {
2599 	uint16_t w;
2600 	unsigned long flags = 0;
2601 	struct qla_hw_data *ha = vha->hw;
2602 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2603 
2604 	pci_set_master(ha->pdev);
2605 	pci_try_set_mwi(ha->pdev);
2606 
2607 	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2608 	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2609 	w &= ~PCI_COMMAND_INTX_DISABLE;
2610 	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2611 
2612 	pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2613 
2614 	/* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2615 	if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2616 		pcix_set_mmrbc(ha->pdev, 2048);
2617 
2618 	/* PCIe -- adjust Maximum Read Request Size (2048). */
2619 	if (pci_is_pcie(ha->pdev))
2620 		pcie_set_readrq(ha->pdev, 4096);
2621 
2622 	pci_disable_rom(ha->pdev);
2623 
2624 	ha->chip_revision = ha->pdev->revision;
2625 
2626 	/* Get PCI bus information. */
2627 	spin_lock_irqsave(&ha->hardware_lock, flags);
2628 	ha->pci_attr = rd_reg_dword(&reg->ctrl_status);
2629 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2630 
2631 	return QLA_SUCCESS;
2632 }
2633 
2634 /**
2635  * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2636  * @vha: HA context
2637  *
2638  * Returns 0 on success.
2639  */
2640 int
2641 qla25xx_pci_config(scsi_qla_host_t *vha)
2642 {
2643 	uint16_t w;
2644 	struct qla_hw_data *ha = vha->hw;
2645 
2646 	pci_set_master(ha->pdev);
2647 	pci_try_set_mwi(ha->pdev);
2648 
2649 	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2650 	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2651 	w &= ~PCI_COMMAND_INTX_DISABLE;
2652 	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2653 
2654 	/* PCIe -- adjust Maximum Read Request Size (2048). */
2655 	if (pci_is_pcie(ha->pdev))
2656 		pcie_set_readrq(ha->pdev, 4096);
2657 
2658 	pci_disable_rom(ha->pdev);
2659 
2660 	ha->chip_revision = ha->pdev->revision;
2661 
2662 	return QLA_SUCCESS;
2663 }
2664 
2665 /**
2666  * qla2x00_isp_firmware() - Choose firmware image.
2667  * @vha: HA context
2668  *
2669  * Returns 0 on success.
2670  */
2671 static int
2672 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2673 {
2674 	int  rval;
2675 	uint16_t loop_id, topo, sw_cap;
2676 	uint8_t domain, area, al_pa;
2677 	struct qla_hw_data *ha = vha->hw;
2678 
2679 	/* Assume loading risc code */
2680 	rval = QLA_FUNCTION_FAILED;
2681 
2682 	if (ha->flags.disable_risc_code_load) {
2683 		ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2684 
2685 		/* Verify checksum of loaded RISC code. */
2686 		rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2687 		if (rval == QLA_SUCCESS) {
2688 			/* And, verify we are not in ROM code. */
2689 			rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2690 			    &area, &domain, &topo, &sw_cap);
2691 		}
2692 	}
2693 
2694 	if (rval)
2695 		ql_dbg(ql_dbg_init, vha, 0x007a,
2696 		    "**** Load RISC code ****.\n");
2697 
2698 	return (rval);
2699 }
2700 
2701 /**
2702  * qla2x00_reset_chip() - Reset ISP chip.
2703  * @vha: HA context
2704  *
2705  * Returns 0 on success.
2706  */
2707 int
2708 qla2x00_reset_chip(scsi_qla_host_t *vha)
2709 {
2710 	unsigned long   flags = 0;
2711 	struct qla_hw_data *ha = vha->hw;
2712 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2713 	uint32_t	cnt;
2714 	uint16_t	cmd;
2715 	int rval = QLA_FUNCTION_FAILED;
2716 
2717 	if (unlikely(pci_channel_offline(ha->pdev)))
2718 		return rval;
2719 
2720 	ha->isp_ops->disable_intrs(ha);
2721 
2722 	spin_lock_irqsave(&ha->hardware_lock, flags);
2723 
2724 	/* Turn off master enable */
2725 	cmd = 0;
2726 	pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2727 	cmd &= ~PCI_COMMAND_MASTER;
2728 	pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2729 
2730 	if (!IS_QLA2100(ha)) {
2731 		/* Pause RISC. */
2732 		wrt_reg_word(&reg->hccr, HCCR_PAUSE_RISC);
2733 		if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2734 			for (cnt = 0; cnt < 30000; cnt++) {
2735 				if ((rd_reg_word(&reg->hccr) &
2736 				    HCCR_RISC_PAUSE) != 0)
2737 					break;
2738 				udelay(100);
2739 			}
2740 		} else {
2741 			rd_reg_word(&reg->hccr);	/* PCI Posting. */
2742 			udelay(10);
2743 		}
2744 
2745 		/* Select FPM registers. */
2746 		wrt_reg_word(&reg->ctrl_status, 0x20);
2747 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */
2748 
2749 		/* FPM Soft Reset. */
2750 		wrt_reg_word(&reg->fpm_diag_config, 0x100);
2751 		rd_reg_word(&reg->fpm_diag_config);	/* PCI Posting. */
2752 
2753 		/* Toggle Fpm Reset. */
2754 		if (!IS_QLA2200(ha)) {
2755 			wrt_reg_word(&reg->fpm_diag_config, 0x0);
2756 			rd_reg_word(&reg->fpm_diag_config); /* PCI Posting. */
2757 		}
2758 
2759 		/* Select frame buffer registers. */
2760 		wrt_reg_word(&reg->ctrl_status, 0x10);
2761 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */
2762 
2763 		/* Reset frame buffer FIFOs. */
2764 		if (IS_QLA2200(ha)) {
2765 			WRT_FB_CMD_REG(ha, reg, 0xa000);
2766 			RD_FB_CMD_REG(ha, reg);		/* PCI Posting. */
2767 		} else {
2768 			WRT_FB_CMD_REG(ha, reg, 0x00fc);
2769 
2770 			/* Read back fb_cmd until zero or 3 seconds max */
2771 			for (cnt = 0; cnt < 3000; cnt++) {
2772 				if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2773 					break;
2774 				udelay(100);
2775 			}
2776 		}
2777 
2778 		/* Select RISC module registers. */
2779 		wrt_reg_word(&reg->ctrl_status, 0);
2780 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */
2781 
2782 		/* Reset RISC processor. */
2783 		wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
2784 		rd_reg_word(&reg->hccr);		/* PCI Posting. */
2785 
2786 		/* Release RISC processor. */
2787 		wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
2788 		rd_reg_word(&reg->hccr);		/* PCI Posting. */
2789 	}
2790 
2791 	wrt_reg_word(&reg->hccr, HCCR_CLR_RISC_INT);
2792 	wrt_reg_word(&reg->hccr, HCCR_CLR_HOST_INT);
2793 
2794 	/* Reset ISP chip. */
2795 	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2796 
2797 	/* Wait for RISC to recover from reset. */
2798 	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2799 		/*
2800 		 * It is necessary to for a delay here since the card doesn't
2801 		 * respond to PCI reads during a reset. On some architectures
2802 		 * this will result in an MCA.
2803 		 */
2804 		udelay(20);
2805 		for (cnt = 30000; cnt; cnt--) {
2806 			if ((rd_reg_word(&reg->ctrl_status) &
2807 			    CSR_ISP_SOFT_RESET) == 0)
2808 				break;
2809 			udelay(100);
2810 		}
2811 	} else
2812 		udelay(10);
2813 
2814 	/* Reset RISC processor. */
2815 	wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
2816 
2817 	wrt_reg_word(&reg->semaphore, 0);
2818 
2819 	/* Release RISC processor. */
2820 	wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
2821 	rd_reg_word(&reg->hccr);			/* PCI Posting. */
2822 
2823 	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2824 		for (cnt = 0; cnt < 30000; cnt++) {
2825 			if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2826 				break;
2827 
2828 			udelay(100);
2829 		}
2830 	} else
2831 		udelay(100);
2832 
2833 	/* Turn on master enable */
2834 	cmd |= PCI_COMMAND_MASTER;
2835 	pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2836 
2837 	/* Disable RISC pause on FPM parity error. */
2838 	if (!IS_QLA2100(ha)) {
2839 		wrt_reg_word(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2840 		rd_reg_word(&reg->hccr);		/* PCI Posting. */
2841 	}
2842 
2843 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2844 
2845 	return QLA_SUCCESS;
2846 }
2847 
2848 /**
2849  * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2850  * @vha: HA context
2851  *
2852  * Returns 0 on success.
2853  */
2854 static int
2855 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2856 {
2857 	uint16_t mb[4] = {0x1010, 0, 1, 0};
2858 
2859 	if (!IS_QLA81XX(vha->hw))
2860 		return QLA_SUCCESS;
2861 
2862 	return qla81xx_write_mpi_register(vha, mb);
2863 }
2864 
2865 static int
2866 qla_chk_risc_recovery(scsi_qla_host_t *vha)
2867 {
2868 	struct qla_hw_data *ha = vha->hw;
2869 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2870 	__le16 __iomem *mbptr = &reg->mailbox0;
2871 	int i;
2872 	u16 mb[32];
2873 	int rc = QLA_SUCCESS;
2874 
2875 	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
2876 		return rc;
2877 
2878 	/* this check is only valid after RISC reset */
2879 	mb[0] = rd_reg_word(mbptr);
2880 	mbptr++;
2881 	if (mb[0] == 0xf) {
2882 		rc = QLA_FUNCTION_FAILED;
2883 
2884 		for (i = 1; i < 32; i++) {
2885 			mb[i] = rd_reg_word(mbptr);
2886 			mbptr++;
2887 		}
2888 
2889 		ql_log(ql_log_warn, vha, 0x1015,
2890 		       "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
2891 		       mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]);
2892 		ql_log(ql_log_warn, vha, 0x1015,
2893 		       "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
2894 		       mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14],
2895 		       mb[15]);
2896 		ql_log(ql_log_warn, vha, 0x1015,
2897 		       "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
2898 		       mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22],
2899 		       mb[23]);
2900 		ql_log(ql_log_warn, vha, 0x1015,
2901 		       "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
2902 		       mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30],
2903 		       mb[31]);
2904 	}
2905 	return rc;
2906 }
2907 
2908 /**
2909  * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2910  * @vha: HA context
2911  *
2912  * Returns 0 on success.
2913  */
2914 static inline int
2915 qla24xx_reset_risc(scsi_qla_host_t *vha)
2916 {
2917 	unsigned long flags = 0;
2918 	struct qla_hw_data *ha = vha->hw;
2919 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2920 	uint32_t cnt;
2921 	uint16_t wd;
2922 	static int abts_cnt; /* ISP abort retry counts */
2923 	int rval = QLA_SUCCESS;
2924 	int print = 1;
2925 
2926 	spin_lock_irqsave(&ha->hardware_lock, flags);
2927 
2928 	/* Reset RISC. */
2929 	wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2930 	for (cnt = 0; cnt < 30000; cnt++) {
2931 		if ((rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2932 			break;
2933 
2934 		udelay(10);
2935 	}
2936 
2937 	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2938 		set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2939 
2940 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2941 	    "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2942 	    rd_reg_dword(&reg->hccr),
2943 	    rd_reg_dword(&reg->ctrl_status),
2944 	    (rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2945 
2946 	wrt_reg_dword(&reg->ctrl_status,
2947 	    CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2948 	pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2949 
2950 	udelay(100);
2951 
2952 	/* Wait for firmware to complete NVRAM accesses. */
2953 	rd_reg_word(&reg->mailbox0);
2954 	for (cnt = 10000; rd_reg_word(&reg->mailbox0) != 0 &&
2955 	    rval == QLA_SUCCESS; cnt--) {
2956 		barrier();
2957 		if (cnt)
2958 			udelay(5);
2959 		else
2960 			rval = QLA_FUNCTION_TIMEOUT;
2961 	}
2962 
2963 	if (rval == QLA_SUCCESS)
2964 		set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2965 
2966 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2967 	    "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2968 	    rd_reg_dword(&reg->hccr),
2969 	    rd_reg_word(&reg->mailbox0));
2970 
2971 	/* Wait for soft-reset to complete. */
2972 	rd_reg_dword(&reg->ctrl_status);
2973 	for (cnt = 0; cnt < 60; cnt++) {
2974 		barrier();
2975 		if ((rd_reg_dword(&reg->ctrl_status) &
2976 		    CSRX_ISP_SOFT_RESET) == 0)
2977 			break;
2978 
2979 		udelay(5);
2980 	}
2981 	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2982 		set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2983 
2984 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2985 	    "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2986 	    rd_reg_dword(&reg->hccr),
2987 	    rd_reg_dword(&reg->ctrl_status));
2988 
2989 	/* If required, do an MPI FW reset now */
2990 	if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2991 		if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2992 			if (++abts_cnt < 5) {
2993 				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2994 				set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2995 			} else {
2996 				/*
2997 				 * We exhausted the ISP abort retries. We have to
2998 				 * set the board offline.
2999 				 */
3000 				abts_cnt = 0;
3001 				vha->flags.online = 0;
3002 			}
3003 		}
3004 	}
3005 
3006 	wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);
3007 	rd_reg_dword(&reg->hccr);
3008 
3009 	wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);
3010 	rd_reg_dword(&reg->hccr);
3011 
3012 	wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_RESET);
3013 	mdelay(10);
3014 	rd_reg_dword(&reg->hccr);
3015 
3016 	wd = rd_reg_word(&reg->mailbox0);
3017 	for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) {
3018 		barrier();
3019 		if (cnt) {
3020 			mdelay(1);
3021 			if (print && qla_chk_risc_recovery(vha))
3022 				print = 0;
3023 
3024 			wd = rd_reg_word(&reg->mailbox0);
3025 		} else {
3026 			rval = QLA_FUNCTION_TIMEOUT;
3027 
3028 			ql_log(ql_log_warn, vha, 0x015e,
3029 			       "RISC reset timeout\n");
3030 		}
3031 	}
3032 
3033 	if (rval == QLA_SUCCESS)
3034 		set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
3035 
3036 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
3037 	    "Host Risc 0x%x, mailbox0 0x%x\n",
3038 	    rd_reg_dword(&reg->hccr),
3039 	     rd_reg_word(&reg->mailbox0));
3040 
3041 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3042 
3043 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
3044 	    "Driver in %s mode\n",
3045 	    IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
3046 
3047 	if (IS_NOPOLLING_TYPE(ha))
3048 		ha->isp_ops->enable_intrs(ha);
3049 
3050 	return rval;
3051 }
3052 
3053 static void
3054 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
3055 {
3056 	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3057 
3058 	wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3059 	*data = rd_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
3060 }
3061 
3062 static void
3063 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
3064 {
3065 	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3066 
3067 	wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3068 	wrt_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
3069 }
3070 
3071 static void
3072 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
3073 {
3074 	uint32_t wd32 = 0;
3075 	uint delta_msec = 100;
3076 	uint elapsed_msec = 0;
3077 	uint timeout_msec;
3078 	ulong n;
3079 
3080 	if (vha->hw->pdev->subsystem_device != 0x0175 &&
3081 	    vha->hw->pdev->subsystem_device != 0x0240)
3082 		return;
3083 
3084 	wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
3085 	udelay(100);
3086 
3087 attempt:
3088 	timeout_msec = TIMEOUT_SEMAPHORE;
3089 	n = timeout_msec / delta_msec;
3090 	while (n--) {
3091 		qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
3092 		qla25xx_read_risc_sema_reg(vha, &wd32);
3093 		if (wd32 & RISC_SEMAPHORE)
3094 			break;
3095 		msleep(delta_msec);
3096 		elapsed_msec += delta_msec;
3097 		if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3098 			goto force;
3099 	}
3100 
3101 	if (!(wd32 & RISC_SEMAPHORE))
3102 		goto force;
3103 
3104 	if (!(wd32 & RISC_SEMAPHORE_FORCE))
3105 		goto acquired;
3106 
3107 	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
3108 	timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
3109 	n = timeout_msec / delta_msec;
3110 	while (n--) {
3111 		qla25xx_read_risc_sema_reg(vha, &wd32);
3112 		if (!(wd32 & RISC_SEMAPHORE_FORCE))
3113 			break;
3114 		msleep(delta_msec);
3115 		elapsed_msec += delta_msec;
3116 		if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3117 			goto force;
3118 	}
3119 
3120 	if (wd32 & RISC_SEMAPHORE_FORCE)
3121 		qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
3122 
3123 	goto attempt;
3124 
3125 force:
3126 	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
3127 
3128 acquired:
3129 	return;
3130 }
3131 
3132 /**
3133  * qla24xx_reset_chip() - Reset ISP24xx chip.
3134  * @vha: HA context
3135  *
3136  * Returns 0 on success.
3137  */
3138 int
3139 qla24xx_reset_chip(scsi_qla_host_t *vha)
3140 {
3141 	struct qla_hw_data *ha = vha->hw;
3142 	int rval = QLA_FUNCTION_FAILED;
3143 
3144 	if (pci_channel_offline(ha->pdev) &&
3145 	    ha->flags.pci_channel_io_perm_failure) {
3146 		return rval;
3147 	}
3148 
3149 	ha->isp_ops->disable_intrs(ha);
3150 
3151 	qla25xx_manipulate_risc_semaphore(vha);
3152 
3153 	/* Perform RISC reset. */
3154 	rval = qla24xx_reset_risc(vha);
3155 
3156 	return rval;
3157 }
3158 
3159 /**
3160  * qla2x00_chip_diag() - Test chip for proper operation.
3161  * @vha: HA context
3162  *
3163  * Returns 0 on success.
3164  */
3165 int
3166 qla2x00_chip_diag(scsi_qla_host_t *vha)
3167 {
3168 	int		rval;
3169 	struct qla_hw_data *ha = vha->hw;
3170 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3171 	unsigned long	flags = 0;
3172 	uint16_t	data;
3173 	uint32_t	cnt;
3174 	uint16_t	mb[5];
3175 	struct req_que *req = ha->req_q_map[0];
3176 
3177 	/* Assume a failed state */
3178 	rval = QLA_FUNCTION_FAILED;
3179 
3180 	ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
3181 	       &reg->flash_address);
3182 
3183 	spin_lock_irqsave(&ha->hardware_lock, flags);
3184 
3185 	/* Reset ISP chip. */
3186 	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
3187 
3188 	/*
3189 	 * We need to have a delay here since the card will not respond while
3190 	 * in reset causing an MCA on some architectures.
3191 	 */
3192 	udelay(20);
3193 	data = qla2x00_debounce_register(&reg->ctrl_status);
3194 	for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3195 		udelay(5);
3196 		data = rd_reg_word(&reg->ctrl_status);
3197 		barrier();
3198 	}
3199 
3200 	if (!cnt)
3201 		goto chip_diag_failed;
3202 
3203 	ql_dbg(ql_dbg_init, vha, 0x007c,
3204 	    "Reset register cleared by chip reset.\n");
3205 
3206 	/* Reset RISC processor. */
3207 	wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
3208 	wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
3209 
3210 	/* Workaround for QLA2312 PCI parity error */
3211 	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3212 		data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3213 		for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3214 			udelay(5);
3215 			data = RD_MAILBOX_REG(ha, reg, 0);
3216 			barrier();
3217 		}
3218 	} else
3219 		udelay(10);
3220 
3221 	if (!cnt)
3222 		goto chip_diag_failed;
3223 
3224 	/* Check product ID of chip */
3225 	ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
3226 
3227 	mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3228 	mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3229 	mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3230 	mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3231 	if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3232 	    mb[3] != PROD_ID_3) {
3233 		ql_log(ql_log_warn, vha, 0x0062,
3234 		    "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3235 		    mb[1], mb[2], mb[3]);
3236 
3237 		goto chip_diag_failed;
3238 	}
3239 	ha->product_id[0] = mb[1];
3240 	ha->product_id[1] = mb[2];
3241 	ha->product_id[2] = mb[3];
3242 	ha->product_id[3] = mb[4];
3243 
3244 	/* Adjust fw RISC transfer size */
3245 	if (req->length > 1024)
3246 		ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3247 	else
3248 		ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3249 		    req->length;
3250 
3251 	if (IS_QLA2200(ha) &&
3252 	    RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3253 		/* Limit firmware transfer size with a 2200A */
3254 		ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3255 
3256 		ha->device_type |= DT_ISP2200A;
3257 		ha->fw_transfer_size = 128;
3258 	}
3259 
3260 	/* Wrap Incoming Mailboxes Test. */
3261 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3262 
3263 	ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3264 	rval = qla2x00_mbx_reg_test(vha);
3265 	if (rval)
3266 		ql_log(ql_log_warn, vha, 0x0080,
3267 		    "Failed mailbox send register test.\n");
3268 	else
3269 		/* Flag a successful rval */
3270 		rval = QLA_SUCCESS;
3271 	spin_lock_irqsave(&ha->hardware_lock, flags);
3272 
3273 chip_diag_failed:
3274 	if (rval)
3275 		ql_log(ql_log_info, vha, 0x0081,
3276 		    "Chip diagnostics **** FAILED ****.\n");
3277 
3278 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3279 
3280 	return (rval);
3281 }
3282 
3283 /**
3284  * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3285  * @vha: HA context
3286  *
3287  * Returns 0 on success.
3288  */
3289 int
3290 qla24xx_chip_diag(scsi_qla_host_t *vha)
3291 {
3292 	int rval;
3293 	struct qla_hw_data *ha = vha->hw;
3294 	struct req_que *req = ha->req_q_map[0];
3295 
3296 	if (IS_P3P_TYPE(ha))
3297 		return QLA_SUCCESS;
3298 
3299 	ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3300 
3301 	rval = qla2x00_mbx_reg_test(vha);
3302 	if (rval) {
3303 		ql_log(ql_log_warn, vha, 0x0082,
3304 		    "Failed mailbox send register test.\n");
3305 	} else {
3306 		/* Flag a successful rval */
3307 		rval = QLA_SUCCESS;
3308 	}
3309 
3310 	return rval;
3311 }
3312 
3313 static void
3314 qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3315 {
3316 	int rval;
3317 	dma_addr_t tc_dma;
3318 	void *tc;
3319 	struct qla_hw_data *ha = vha->hw;
3320 
3321 	if (!IS_FWI2_CAPABLE(ha))
3322 		return;
3323 
3324 	if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3325 	    !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3326 		return;
3327 
3328 	if (ha->fce) {
3329 		ql_dbg(ql_dbg_init, vha, 0x00bd,
3330 		       "%s: FCE Mem is already allocated.\n",
3331 		       __func__);
3332 		return;
3333 	}
3334 
3335 	/* Allocate memory for Fibre Channel Event Buffer. */
3336 	tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3337 				GFP_KERNEL);
3338 	if (!tc) {
3339 		ql_log(ql_log_warn, vha, 0x00be,
3340 		       "Unable to allocate (%d KB) for FCE.\n",
3341 		       FCE_SIZE / 1024);
3342 		return;
3343 	}
3344 
3345 	rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3346 					ha->fce_mb, &ha->fce_bufs);
3347 	if (rval) {
3348 		ql_log(ql_log_warn, vha, 0x00bf,
3349 		       "Unable to initialize FCE (%d).\n", rval);
3350 		dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
3351 		return;
3352 	}
3353 
3354 	ql_dbg(ql_dbg_init, vha, 0x00c0,
3355 	       "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3356 
3357 	ha->flags.fce_enabled = 1;
3358 	ha->fce_dma = tc_dma;
3359 	ha->fce = tc;
3360 }
3361 
3362 static void
3363 qla2x00_init_eft_trace(scsi_qla_host_t *vha)
3364 {
3365 	int rval;
3366 	dma_addr_t tc_dma;
3367 	void *tc;
3368 	struct qla_hw_data *ha = vha->hw;
3369 
3370 	if (!IS_FWI2_CAPABLE(ha))
3371 		return;
3372 
3373 	if (ha->eft) {
3374 		ql_dbg(ql_dbg_init, vha, 0x00bd,
3375 		    "%s: EFT Mem is already allocated.\n",
3376 		    __func__);
3377 		return;
3378 	}
3379 
3380 	/* Allocate memory for Extended Trace Buffer. */
3381 	tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3382 				GFP_KERNEL);
3383 	if (!tc) {
3384 		ql_log(ql_log_warn, vha, 0x00c1,
3385 		       "Unable to allocate (%d KB) for EFT.\n",
3386 		       EFT_SIZE / 1024);
3387 		return;
3388 	}
3389 
3390 	rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3391 	if (rval) {
3392 		ql_log(ql_log_warn, vha, 0x00c2,
3393 		       "Unable to initialize EFT (%d).\n", rval);
3394 		dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
3395 		return;
3396 	}
3397 
3398 	ql_dbg(ql_dbg_init, vha, 0x00c3,
3399 	       "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3400 
3401 	ha->eft_dma = tc_dma;
3402 	ha->eft = tc;
3403 }
3404 
3405 static void
3406 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3407 {
3408 	qla2x00_init_fce_trace(vha);
3409 	qla2x00_init_eft_trace(vha);
3410 }
3411 
3412 void
3413 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3414 {
3415 	uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3416 	    eft_size, fce_size, mq_size;
3417 	struct qla_hw_data *ha = vha->hw;
3418 	struct req_que *req = ha->req_q_map[0];
3419 	struct rsp_que *rsp = ha->rsp_q_map[0];
3420 	struct qla2xxx_fw_dump *fw_dump;
3421 
3422 	dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3423 	req_q_size = rsp_q_size = 0;
3424 
3425 	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3426 		fixed_size = sizeof(struct qla2100_fw_dump);
3427 	} else if (IS_QLA23XX(ha)) {
3428 		fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3429 		mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3430 		    sizeof(uint16_t);
3431 	} else if (IS_FWI2_CAPABLE(ha)) {
3432 		if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
3433 			fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3434 		else if (IS_QLA81XX(ha))
3435 			fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3436 		else if (IS_QLA25XX(ha))
3437 			fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3438 		else
3439 			fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3440 
3441 		mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3442 		    sizeof(uint32_t);
3443 		if (ha->mqenable) {
3444 			if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) &&
3445 			    !IS_QLA28XX(ha))
3446 				mq_size = sizeof(struct qla2xxx_mq_chain);
3447 			/*
3448 			 * Allocate maximum buffer size for all queues - Q0.
3449 			 * Resizing must be done at end-of-dump processing.
3450 			 */
3451 			mq_size += (ha->max_req_queues - 1) *
3452 			    (req->length * sizeof(request_t));
3453 			mq_size += (ha->max_rsp_queues - 1) *
3454 			    (rsp->length * sizeof(response_t));
3455 		}
3456 		if (ha->tgt.atio_ring)
3457 			mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3458 
3459 		qla2x00_init_fce_trace(vha);
3460 		if (ha->fce)
3461 			fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3462 		qla2x00_init_eft_trace(vha);
3463 		if (ha->eft)
3464 			eft_size = EFT_SIZE;
3465 	}
3466 
3467 	if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3468 		struct fwdt *fwdt = ha->fwdt;
3469 		uint j;
3470 
3471 		for (j = 0; j < 2; j++, fwdt++) {
3472 			if (!fwdt->template) {
3473 				ql_dbg(ql_dbg_init, vha, 0x00ba,
3474 				    "-> fwdt%u no template\n", j);
3475 				continue;
3476 			}
3477 			ql_dbg(ql_dbg_init, vha, 0x00fa,
3478 			    "-> fwdt%u calculating fwdump size...\n", j);
3479 			fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3480 			    vha, fwdt->template);
3481 			ql_dbg(ql_dbg_init, vha, 0x00fa,
3482 			    "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3483 			    j, fwdt->dump_size);
3484 			dump_size += fwdt->dump_size;
3485 		}
3486 		/* Add space for spare MPI fw dump. */
3487 		dump_size += ha->fwdt[1].dump_size;
3488 	} else {
3489 		req_q_size = req->length * sizeof(request_t);
3490 		rsp_q_size = rsp->length * sizeof(response_t);
3491 		dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3492 		dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3493 			+ eft_size;
3494 		ha->chain_offset = dump_size;
3495 		dump_size += mq_size + fce_size;
3496 		if (ha->exchoffld_buf)
3497 			dump_size += sizeof(struct qla2xxx_offld_chain) +
3498 				ha->exchoffld_size;
3499 		if (ha->exlogin_buf)
3500 			dump_size += sizeof(struct qla2xxx_offld_chain) +
3501 				ha->exlogin_size;
3502 	}
3503 
3504 	if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3505 
3506 		ql_dbg(ql_dbg_init, vha, 0x00c5,
3507 		    "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3508 		    __func__, dump_size, ha->fw_dump_len,
3509 		    ha->fw_dump_alloc_len);
3510 
3511 		fw_dump = vmalloc(dump_size);
3512 		if (!fw_dump) {
3513 			ql_log(ql_log_warn, vha, 0x00c4,
3514 			    "Unable to allocate (%d KB) for firmware dump.\n",
3515 			    dump_size / 1024);
3516 		} else {
3517 			mutex_lock(&ha->optrom_mutex);
3518 			if (ha->fw_dumped) {
3519 				memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3520 				vfree(ha->fw_dump);
3521 				ha->fw_dump = fw_dump;
3522 				ha->fw_dump_alloc_len =  dump_size;
3523 				ql_dbg(ql_dbg_init, vha, 0x00c5,
3524 				    "Re-Allocated (%d KB) and save firmware dump.\n",
3525 				    dump_size / 1024);
3526 			} else {
3527 				vfree(ha->fw_dump);
3528 				ha->fw_dump = fw_dump;
3529 
3530 				ha->fw_dump_len = ha->fw_dump_alloc_len =
3531 				    dump_size;
3532 				ql_dbg(ql_dbg_init, vha, 0x00c5,
3533 				    "Allocated (%d KB) for firmware dump.\n",
3534 				    dump_size / 1024);
3535 
3536 				if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3537 					ha->mpi_fw_dump = (char *)fw_dump +
3538 						ha->fwdt[1].dump_size;
3539 					mutex_unlock(&ha->optrom_mutex);
3540 					return;
3541 				}
3542 
3543 				ha->fw_dump->signature[0] = 'Q';
3544 				ha->fw_dump->signature[1] = 'L';
3545 				ha->fw_dump->signature[2] = 'G';
3546 				ha->fw_dump->signature[3] = 'C';
3547 				ha->fw_dump->version = htonl(1);
3548 
3549 				ha->fw_dump->fixed_size = htonl(fixed_size);
3550 				ha->fw_dump->mem_size = htonl(mem_size);
3551 				ha->fw_dump->req_q_size = htonl(req_q_size);
3552 				ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3553 
3554 				ha->fw_dump->eft_size = htonl(eft_size);
3555 				ha->fw_dump->eft_addr_l =
3556 				    htonl(LSD(ha->eft_dma));
3557 				ha->fw_dump->eft_addr_h =
3558 				    htonl(MSD(ha->eft_dma));
3559 
3560 				ha->fw_dump->header_size =
3561 					htonl(offsetof
3562 					    (struct qla2xxx_fw_dump, isp));
3563 			}
3564 			mutex_unlock(&ha->optrom_mutex);
3565 		}
3566 	}
3567 }
3568 
3569 static int
3570 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3571 {
3572 #define MPS_MASK	0xe0
3573 	int rval;
3574 	uint16_t dc;
3575 	uint32_t dw;
3576 
3577 	if (!IS_QLA81XX(vha->hw))
3578 		return QLA_SUCCESS;
3579 
3580 	rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3581 	if (rval != QLA_SUCCESS) {
3582 		ql_log(ql_log_warn, vha, 0x0105,
3583 		    "Unable to acquire semaphore.\n");
3584 		goto done;
3585 	}
3586 
3587 	pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3588 	rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3589 	if (rval != QLA_SUCCESS) {
3590 		ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3591 		goto done_release;
3592 	}
3593 
3594 	dc &= MPS_MASK;
3595 	if (dc == (dw & MPS_MASK))
3596 		goto done_release;
3597 
3598 	dw &= ~MPS_MASK;
3599 	dw |= dc;
3600 	rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3601 	if (rval != QLA_SUCCESS) {
3602 		ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3603 	}
3604 
3605 done_release:
3606 	rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3607 	if (rval != QLA_SUCCESS) {
3608 		ql_log(ql_log_warn, vha, 0x006d,
3609 		    "Unable to release semaphore.\n");
3610 	}
3611 
3612 done:
3613 	return rval;
3614 }
3615 
3616 int
3617 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3618 {
3619 	/* Don't try to reallocate the array */
3620 	if (req->outstanding_cmds)
3621 		return QLA_SUCCESS;
3622 
3623 	if (!IS_FWI2_CAPABLE(ha))
3624 		req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3625 	else {
3626 		if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3627 			req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3628 		else
3629 			req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3630 	}
3631 
3632 	req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3633 					sizeof(srb_t *),
3634 					GFP_KERNEL);
3635 
3636 	if (!req->outstanding_cmds) {
3637 		/*
3638 		 * Try to allocate a minimal size just so we can get through
3639 		 * initialization.
3640 		 */
3641 		req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3642 		req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3643 						sizeof(srb_t *),
3644 						GFP_KERNEL);
3645 
3646 		if (!req->outstanding_cmds) {
3647 			ql_log(ql_log_fatal, NULL, 0x0126,
3648 			    "Failed to allocate memory for "
3649 			    "outstanding_cmds for req_que %p.\n", req);
3650 			req->num_outstanding_cmds = 0;
3651 			return QLA_FUNCTION_FAILED;
3652 		}
3653 	}
3654 
3655 	return QLA_SUCCESS;
3656 }
3657 
3658 #define PRINT_FIELD(_field, _flag, _str) {		\
3659 	if (a0->_field & _flag) {\
3660 		if (p) {\
3661 			strcat(ptr, "|");\
3662 			ptr++;\
3663 			leftover--;\
3664 		} \
3665 		len = snprintf(ptr, leftover, "%s", _str);	\
3666 		p = 1;\
3667 		leftover -= len;\
3668 		ptr += len; \
3669 	} \
3670 }
3671 
3672 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3673 {
3674 #define STR_LEN 64
3675 	struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3676 	u8 str[STR_LEN], *ptr, p;
3677 	int leftover, len;
3678 
3679 	memset(str, 0, STR_LEN);
3680 	snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3681 	ql_dbg(ql_dbg_init, vha, 0x015a,
3682 	    "SFP MFG Name: %s\n", str);
3683 
3684 	memset(str, 0, STR_LEN);
3685 	snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3686 	ql_dbg(ql_dbg_init, vha, 0x015c,
3687 	    "SFP Part Name: %s\n", str);
3688 
3689 	/* media */
3690 	memset(str, 0, STR_LEN);
3691 	ptr = str;
3692 	leftover = STR_LEN;
3693 	p = len = 0;
3694 	PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3695 	PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3696 	PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3697 	PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3698 	PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3699 	PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3700 	PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3701 	ql_dbg(ql_dbg_init, vha, 0x0160,
3702 	    "SFP Media: %s\n", str);
3703 
3704 	/* link length */
3705 	memset(str, 0, STR_LEN);
3706 	ptr = str;
3707 	leftover = STR_LEN;
3708 	p = len = 0;
3709 	PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3710 	PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3711 	PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3712 	PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3713 	PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3714 	ql_dbg(ql_dbg_init, vha, 0x0196,
3715 	    "SFP Link Length: %s\n", str);
3716 
3717 	memset(str, 0, STR_LEN);
3718 	ptr = str;
3719 	leftover = STR_LEN;
3720 	p = len = 0;
3721 	PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3722 	PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3723 	PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3724 	PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3725 	PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3726 	ql_dbg(ql_dbg_init, vha, 0x016e,
3727 	    "SFP FC Link Tech: %s\n", str);
3728 
3729 	if (a0->length_km)
3730 		ql_dbg(ql_dbg_init, vha, 0x016f,
3731 		    "SFP Distant: %d km\n", a0->length_km);
3732 	if (a0->length_100m)
3733 		ql_dbg(ql_dbg_init, vha, 0x0170,
3734 		    "SFP Distant: %d m\n", a0->length_100m*100);
3735 	if (a0->length_50um_10m)
3736 		ql_dbg(ql_dbg_init, vha, 0x0189,
3737 		    "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3738 	if (a0->length_62um_10m)
3739 		ql_dbg(ql_dbg_init, vha, 0x018a,
3740 		  "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3741 	if (a0->length_om4_10m)
3742 		ql_dbg(ql_dbg_init, vha, 0x0194,
3743 		    "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3744 	if (a0->length_om3_10m)
3745 		ql_dbg(ql_dbg_init, vha, 0x0195,
3746 		    "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3747 }
3748 
3749 
3750 /**
3751  * qla24xx_detect_sfp()
3752  *
3753  * @vha: adapter state pointer.
3754  *
3755  * @return
3756  *	0 -- Configure firmware to use short-range settings -- normal
3757  *	     buffer-to-buffer credits.
3758  *
3759  *	1 -- Configure firmware to use long-range settings -- extra
3760  *	     buffer-to-buffer credits should be allocated with
3761  *	     ha->lr_distance containing distance settings from NVRAM or SFP
3762  *	     (if supported).
3763  */
3764 int
3765 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3766 {
3767 	int rc, used_nvram;
3768 	struct sff_8247_a0 *a;
3769 	struct qla_hw_data *ha = vha->hw;
3770 	struct nvram_81xx *nv = ha->nvram;
3771 #define LR_DISTANCE_UNKNOWN	2
3772 	static const char * const types[] = { "Short", "Long" };
3773 	static const char * const lengths[] = { "(10km)", "(5km)", "" };
3774 	u8 ll = 0;
3775 
3776 	/* Seed with NVRAM settings. */
3777 	used_nvram = 0;
3778 	ha->flags.lr_detected = 0;
3779 	if (IS_BPM_RANGE_CAPABLE(ha) &&
3780 	    (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
3781 		used_nvram = 1;
3782 		ha->flags.lr_detected = 1;
3783 		ha->lr_distance =
3784 		    (nv->enhanced_features >> LR_DIST_NV_POS)
3785 		     & LR_DIST_NV_MASK;
3786 	}
3787 
3788 	if (!IS_BPM_ENABLED(vha))
3789 		goto out;
3790 	/* Determine SR/LR capabilities of SFP/Transceiver. */
3791 	rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3792 	if (rc)
3793 		goto out;
3794 
3795 	used_nvram = 0;
3796 	a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3797 	qla2xxx_print_sfp_info(vha);
3798 
3799 	ha->flags.lr_detected = 0;
3800 	ll = a->fc_ll_cc7;
3801 	if (ll & FC_LL_VL || ll & FC_LL_L) {
3802 		/* Long range, track length. */
3803 		ha->flags.lr_detected = 1;
3804 
3805 		if (a->length_km > 5 || a->length_100m > 50)
3806 			ha->lr_distance = LR_DISTANCE_10K;
3807 		else
3808 			ha->lr_distance = LR_DISTANCE_5K;
3809 	}
3810 
3811 out:
3812 	ql_dbg(ql_dbg_async, vha, 0x507b,
3813 	    "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
3814 	    types[ha->flags.lr_detected],
3815 	    ha->flags.lr_detected ? lengths[ha->lr_distance] :
3816 	       lengths[LR_DISTANCE_UNKNOWN],
3817 	    used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
3818 	return ha->flags.lr_detected;
3819 }
3820 
3821 void qla_init_iocb_limit(scsi_qla_host_t *vha)
3822 {
3823 	u16 i, num_qps;
3824 	u32 limit;
3825 	struct qla_hw_data *ha = vha->hw;
3826 
3827 	num_qps = ha->num_qpairs + 1;
3828 	limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
3829 
3830 	ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
3831 	ha->base_qpair->fwres.iocbs_limit = limit;
3832 	ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps;
3833 	ha->base_qpair->fwres.iocbs_used = 0;
3834 	for (i = 0; i < ha->max_qpairs; i++) {
3835 		if (ha->queue_pair_map[i])  {
3836 			ha->queue_pair_map[i]->fwres.iocbs_total =
3837 				ha->orig_fw_iocb_count;
3838 			ha->queue_pair_map[i]->fwres.iocbs_limit = limit;
3839 			ha->queue_pair_map[i]->fwres.iocbs_qp_limit =
3840 				limit / num_qps;
3841 			ha->queue_pair_map[i]->fwres.iocbs_used = 0;
3842 		}
3843 	}
3844 }
3845 
3846 /**
3847  * qla2x00_setup_chip() - Load and start RISC firmware.
3848  * @vha: HA context
3849  *
3850  * Returns 0 on success.
3851  */
3852 static int
3853 qla2x00_setup_chip(scsi_qla_host_t *vha)
3854 {
3855 	int rval;
3856 	uint32_t srisc_address = 0;
3857 	struct qla_hw_data *ha = vha->hw;
3858 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3859 	unsigned long flags;
3860 	uint16_t fw_major_version;
3861 	int done_once = 0;
3862 
3863 	if (IS_P3P_TYPE(ha)) {
3864 		rval = ha->isp_ops->load_risc(vha, &srisc_address);
3865 		if (rval == QLA_SUCCESS) {
3866 			qla2x00_stop_firmware(vha);
3867 			goto enable_82xx_npiv;
3868 		} else
3869 			goto failed;
3870 	}
3871 
3872 	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3873 		/* Disable SRAM, Instruction RAM and GP RAM parity.  */
3874 		spin_lock_irqsave(&ha->hardware_lock, flags);
3875 		wrt_reg_word(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3876 		rd_reg_word(&reg->hccr);
3877 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
3878 	}
3879 
3880 	qla81xx_mpi_sync(vha);
3881 
3882 execute_fw_with_lr:
3883 	/* Load firmware sequences */
3884 	rval = ha->isp_ops->load_risc(vha, &srisc_address);
3885 	if (rval == QLA_SUCCESS) {
3886 		ql_dbg(ql_dbg_init, vha, 0x00c9,
3887 		    "Verifying Checksum of loaded RISC code.\n");
3888 
3889 		rval = qla2x00_verify_checksum(vha, srisc_address);
3890 		if (rval == QLA_SUCCESS) {
3891 			/* Start firmware execution. */
3892 			ql_dbg(ql_dbg_init, vha, 0x00ca,
3893 			    "Starting firmware.\n");
3894 
3895 			if (ql2xexlogins)
3896 				ha->flags.exlogins_enabled = 1;
3897 
3898 			if (qla_is_exch_offld_enabled(vha))
3899 				ha->flags.exchoffld_enabled = 1;
3900 
3901 			rval = qla2x00_execute_fw(vha, srisc_address);
3902 			/* Retrieve firmware information. */
3903 			if (rval == QLA_SUCCESS) {
3904 				/* Enable BPM support? */
3905 				if (!done_once++ && qla24xx_detect_sfp(vha)) {
3906 					ql_dbg(ql_dbg_init, vha, 0x00ca,
3907 					    "Re-starting firmware -- BPM.\n");
3908 					/* Best-effort - re-init. */
3909 					ha->isp_ops->reset_chip(vha);
3910 					ha->isp_ops->chip_diag(vha);
3911 					goto execute_fw_with_lr;
3912 				}
3913 
3914 				if (IS_ZIO_THRESHOLD_CAPABLE(ha))
3915 					qla27xx_set_zio_threshold(vha,
3916 					    ha->last_zio_threshold);
3917 
3918 				rval = qla2x00_set_exlogins_buffer(vha);
3919 				if (rval != QLA_SUCCESS)
3920 					goto failed;
3921 
3922 				rval = qla2x00_set_exchoffld_buffer(vha);
3923 				if (rval != QLA_SUCCESS)
3924 					goto failed;
3925 
3926 enable_82xx_npiv:
3927 				fw_major_version = ha->fw_major_version;
3928 				if (IS_P3P_TYPE(ha))
3929 					qla82xx_check_md_needed(vha);
3930 				else
3931 					rval = qla2x00_get_fw_version(vha);
3932 				if (rval != QLA_SUCCESS)
3933 					goto failed;
3934 				ha->flags.npiv_supported = 0;
3935 				if (IS_QLA2XXX_MIDTYPE(ha) &&
3936 					 (ha->fw_attributes & BIT_2)) {
3937 					ha->flags.npiv_supported = 1;
3938 					if ((!ha->max_npiv_vports) ||
3939 					    ((ha->max_npiv_vports + 1) %
3940 					    MIN_MULTI_ID_FABRIC))
3941 						ha->max_npiv_vports =
3942 						    MIN_MULTI_ID_FABRIC - 1;
3943 				}
3944 				qla2x00_get_resource_cnts(vha);
3945 				qla_init_iocb_limit(vha);
3946 
3947 				/*
3948 				 * Allocate the array of outstanding commands
3949 				 * now that we know the firmware resources.
3950 				 */
3951 				rval = qla2x00_alloc_outstanding_cmds(ha,
3952 				    vha->req);
3953 				if (rval != QLA_SUCCESS)
3954 					goto failed;
3955 
3956 				if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3957 					qla2x00_alloc_offload_mem(vha);
3958 
3959 				if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3960 					qla2x00_alloc_fw_dump(vha);
3961 
3962 			} else {
3963 				goto failed;
3964 			}
3965 		} else {
3966 			ql_log(ql_log_fatal, vha, 0x00cd,
3967 			    "ISP Firmware failed checksum.\n");
3968 			goto failed;
3969 		}
3970 
3971 		/* Enable PUREX PASSTHRU */
3972 		if (ql2xrdpenable || ha->flags.scm_supported_f ||
3973 		    ha->flags.edif_enabled)
3974 			qla25xx_set_els_cmds_supported(vha);
3975 	} else
3976 		goto failed;
3977 
3978 	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3979 		/* Enable proper parity. */
3980 		spin_lock_irqsave(&ha->hardware_lock, flags);
3981 		if (IS_QLA2300(ha))
3982 			/* SRAM parity */
3983 			wrt_reg_word(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3984 		else
3985 			/* SRAM, Instruction RAM and GP RAM parity */
3986 			wrt_reg_word(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3987 		rd_reg_word(&reg->hccr);
3988 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
3989 	}
3990 
3991 	if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
3992 		ha->flags.fac_supported = 1;
3993 	else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3994 		uint32_t size;
3995 
3996 		rval = qla81xx_fac_get_sector_size(vha, &size);
3997 		if (rval == QLA_SUCCESS) {
3998 			ha->flags.fac_supported = 1;
3999 			ha->fdt_block_size = size << 2;
4000 		} else {
4001 			ql_log(ql_log_warn, vha, 0x00ce,
4002 			    "Unsupported FAC firmware (%d.%02d.%02d).\n",
4003 			    ha->fw_major_version, ha->fw_minor_version,
4004 			    ha->fw_subminor_version);
4005 
4006 			if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4007 			    IS_QLA28XX(ha)) {
4008 				ha->flags.fac_supported = 0;
4009 				rval = QLA_SUCCESS;
4010 			}
4011 		}
4012 	}
4013 failed:
4014 	if (rval) {
4015 		ql_log(ql_log_fatal, vha, 0x00cf,
4016 		    "Setup chip ****FAILED****.\n");
4017 	}
4018 
4019 	return (rval);
4020 }
4021 
4022 /**
4023  * qla2x00_init_response_q_entries() - Initializes response queue entries.
4024  * @rsp: response queue
4025  *
4026  * Beginning of request ring has initialization control block already built
4027  * by nvram config routine.
4028  *
4029  * Returns 0 on success.
4030  */
4031 void
4032 qla2x00_init_response_q_entries(struct rsp_que *rsp)
4033 {
4034 	uint16_t cnt;
4035 	response_t *pkt;
4036 
4037 	rsp->ring_ptr = rsp->ring;
4038 	rsp->ring_index    = 0;
4039 	rsp->status_srb = NULL;
4040 	pkt = rsp->ring_ptr;
4041 	for (cnt = 0; cnt < rsp->length; cnt++) {
4042 		pkt->signature = RESPONSE_PROCESSED;
4043 		pkt++;
4044 	}
4045 }
4046 
4047 /**
4048  * qla2x00_update_fw_options() - Read and process firmware options.
4049  * @vha: HA context
4050  *
4051  * Returns 0 on success.
4052  */
4053 void
4054 qla2x00_update_fw_options(scsi_qla_host_t *vha)
4055 {
4056 	uint16_t swing, emphasis, tx_sens, rx_sens;
4057 	struct qla_hw_data *ha = vha->hw;
4058 
4059 	memset(ha->fw_options, 0, sizeof(ha->fw_options));
4060 	qla2x00_get_fw_options(vha, ha->fw_options);
4061 
4062 	if (IS_QLA2100(ha) || IS_QLA2200(ha))
4063 		return;
4064 
4065 	/* Serial Link options. */
4066 	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
4067 	    "Serial link options.\n");
4068 	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
4069 	    ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
4070 
4071 	ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
4072 	if (ha->fw_seriallink_options[3] & BIT_2) {
4073 		ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
4074 
4075 		/*  1G settings */
4076 		swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
4077 		emphasis = (ha->fw_seriallink_options[2] &
4078 		    (BIT_4 | BIT_3)) >> 3;
4079 		tx_sens = ha->fw_seriallink_options[0] &
4080 		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4081 		rx_sens = (ha->fw_seriallink_options[0] &
4082 		    (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4083 		ha->fw_options[10] = (emphasis << 14) | (swing << 8);
4084 		if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4085 			if (rx_sens == 0x0)
4086 				rx_sens = 0x3;
4087 			ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
4088 		} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4089 			ha->fw_options[10] |= BIT_5 |
4090 			    ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4091 			    (tx_sens & (BIT_1 | BIT_0));
4092 
4093 		/*  2G settings */
4094 		swing = (ha->fw_seriallink_options[2] &
4095 		    (BIT_7 | BIT_6 | BIT_5)) >> 5;
4096 		emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
4097 		tx_sens = ha->fw_seriallink_options[1] &
4098 		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4099 		rx_sens = (ha->fw_seriallink_options[1] &
4100 		    (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4101 		ha->fw_options[11] = (emphasis << 14) | (swing << 8);
4102 		if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4103 			if (rx_sens == 0x0)
4104 				rx_sens = 0x3;
4105 			ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
4106 		} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4107 			ha->fw_options[11] |= BIT_5 |
4108 			    ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4109 			    (tx_sens & (BIT_1 | BIT_0));
4110 	}
4111 
4112 	/* FCP2 options. */
4113 	/*  Return command IOCBs without waiting for an ABTS to complete. */
4114 	ha->fw_options[3] |= BIT_13;
4115 
4116 	/* LED scheme. */
4117 	if (ha->flags.enable_led_scheme)
4118 		ha->fw_options[2] |= BIT_12;
4119 
4120 	/* Detect ISP6312. */
4121 	if (IS_QLA6312(ha))
4122 		ha->fw_options[2] |= BIT_13;
4123 
4124 	/* Set Retry FLOGI in case of P2P connection */
4125 	if (ha->operating_mode == P2P) {
4126 		ha->fw_options[2] |= BIT_3;
4127 		ql_dbg(ql_dbg_disc, vha, 0x2100,
4128 		    "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4129 			__func__, ha->fw_options[2]);
4130 	}
4131 
4132 	/* Update firmware options. */
4133 	qla2x00_set_fw_options(vha, ha->fw_options);
4134 }
4135 
4136 void
4137 qla24xx_update_fw_options(scsi_qla_host_t *vha)
4138 {
4139 	int rval;
4140 	struct qla_hw_data *ha = vha->hw;
4141 
4142 	if (IS_P3P_TYPE(ha))
4143 		return;
4144 
4145 	/*  Hold status IOCBs until ABTS response received. */
4146 	if (ql2xfwholdabts)
4147 		ha->fw_options[3] |= BIT_12;
4148 
4149 	/* Set Retry FLOGI in case of P2P connection */
4150 	if (ha->operating_mode == P2P) {
4151 		ha->fw_options[2] |= BIT_3;
4152 		ql_dbg(ql_dbg_disc, vha, 0x2101,
4153 		    "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4154 			__func__, ha->fw_options[2]);
4155 	}
4156 
4157 	/* Move PUREX, ABTS RX & RIDA to ATIOQ */
4158 	if (ql2xmvasynctoatio && !ha->flags.edif_enabled &&
4159 	    (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
4160 		if (qla_tgt_mode_enabled(vha) ||
4161 		    qla_dual_mode_enabled(vha))
4162 			ha->fw_options[2] |= BIT_11;
4163 		else
4164 			ha->fw_options[2] &= ~BIT_11;
4165 	}
4166 
4167 	if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4168 	    IS_QLA28XX(ha)) {
4169 		/*
4170 		 * Tell FW to track each exchange to prevent
4171 		 * driver from using stale exchange.
4172 		 */
4173 		if (qla_tgt_mode_enabled(vha) ||
4174 		    qla_dual_mode_enabled(vha))
4175 			ha->fw_options[2] |= BIT_4;
4176 		else
4177 			ha->fw_options[2] &= ~(BIT_4);
4178 
4179 		/* Reserve 1/2 of emergency exchanges for ELS.*/
4180 		if (qla2xuseresexchforels)
4181 			ha->fw_options[2] |= BIT_8;
4182 		else
4183 			ha->fw_options[2] &= ~BIT_8;
4184 
4185 		/*
4186 		 * N2N: set Secure=1 for PLOGI ACC and
4187 		 * fw shal not send PRLI after PLOGI Acc
4188 		 */
4189 		if (ha->flags.edif_enabled &&
4190 		    vha->e_dbell.db_flags & EDB_ACTIVE) {
4191 			ha->fw_options[3] |= BIT_15;
4192 			ha->flags.n2n_fw_acc_sec = 1;
4193 		} else {
4194 			ha->fw_options[3] &= ~BIT_15;
4195 			ha->flags.n2n_fw_acc_sec = 0;
4196 		}
4197 	}
4198 
4199 	if (ql2xrdpenable || ha->flags.scm_supported_f ||
4200 	    ha->flags.edif_enabled)
4201 		ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
4202 
4203 	/* Enable Async 8130/8131 events -- transceiver insertion/removal */
4204 	if (IS_BPM_RANGE_CAPABLE(ha))
4205 		ha->fw_options[3] |= BIT_10;
4206 
4207 	ql_dbg(ql_dbg_init, vha, 0x00e8,
4208 	    "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
4209 	    __func__, ha->fw_options[1], ha->fw_options[2],
4210 	    ha->fw_options[3], vha->host->active_mode);
4211 
4212 	if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
4213 		qla2x00_set_fw_options(vha, ha->fw_options);
4214 
4215 	/* Update Serial Link options. */
4216 	if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
4217 		return;
4218 
4219 	rval = qla2x00_set_serdes_params(vha,
4220 	    le16_to_cpu(ha->fw_seriallink_options24[1]),
4221 	    le16_to_cpu(ha->fw_seriallink_options24[2]),
4222 	    le16_to_cpu(ha->fw_seriallink_options24[3]));
4223 	if (rval != QLA_SUCCESS) {
4224 		ql_log(ql_log_warn, vha, 0x0104,
4225 		    "Unable to update Serial Link options (%x).\n", rval);
4226 	}
4227 }
4228 
4229 void
4230 qla2x00_config_rings(struct scsi_qla_host *vha)
4231 {
4232 	struct qla_hw_data *ha = vha->hw;
4233 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4234 	struct req_que *req = ha->req_q_map[0];
4235 	struct rsp_que *rsp = ha->rsp_q_map[0];
4236 
4237 	/* Setup ring parameters in initialization control block. */
4238 	ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4239 	ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4240 	ha->init_cb->request_q_length = cpu_to_le16(req->length);
4241 	ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4242 	put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
4243 	put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
4244 
4245 	wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0);
4246 	wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0);
4247 	wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0);
4248 	wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0);
4249 	rd_reg_word(ISP_RSP_Q_OUT(ha, reg));		/* PCI Posting. */
4250 }
4251 
4252 void
4253 qla24xx_config_rings(struct scsi_qla_host *vha)
4254 {
4255 	struct qla_hw_data *ha = vha->hw;
4256 	device_reg_t *reg = ISP_QUE_REG(ha, 0);
4257 	struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4258 	struct qla_msix_entry *msix;
4259 	struct init_cb_24xx *icb;
4260 	uint16_t rid = 0;
4261 	struct req_que *req = ha->req_q_map[0];
4262 	struct rsp_que *rsp = ha->rsp_q_map[0];
4263 
4264 	/* Setup ring parameters in initialization control block. */
4265 	icb = (struct init_cb_24xx *)ha->init_cb;
4266 	icb->request_q_outpointer = cpu_to_le16(0);
4267 	icb->response_q_inpointer = cpu_to_le16(0);
4268 	icb->request_q_length = cpu_to_le16(req->length);
4269 	icb->response_q_length = cpu_to_le16(rsp->length);
4270 	put_unaligned_le64(req->dma, &icb->request_q_address);
4271 	put_unaligned_le64(rsp->dma, &icb->response_q_address);
4272 
4273 	/* Setup ATIO queue dma pointers for target mode */
4274 	icb->atio_q_inpointer = cpu_to_le16(0);
4275 	icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4276 	put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
4277 
4278 	if (IS_SHADOW_REG_CAPABLE(ha))
4279 		icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4280 
4281 	if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4282 	    IS_QLA28XX(ha)) {
4283 		icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4284 		icb->rid = cpu_to_le16(rid);
4285 		if (ha->flags.msix_enabled) {
4286 			msix = &ha->msix_entries[1];
4287 			ql_dbg(ql_dbg_init, vha, 0x0019,
4288 			    "Registering vector 0x%x for base que.\n",
4289 			    msix->entry);
4290 			icb->msix = cpu_to_le16(msix->entry);
4291 		}
4292 		/* Use alternate PCI bus number */
4293 		if (MSB(rid))
4294 			icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4295 		/* Use alternate PCI devfn */
4296 		if (LSB(rid))
4297 			icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4298 
4299 		/* Use Disable MSIX Handshake mode for capable adapters */
4300 		if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4301 		    (ha->flags.msix_enabled)) {
4302 			icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4303 			ha->flags.disable_msix_handshake = 1;
4304 			ql_dbg(ql_dbg_init, vha, 0x00fe,
4305 			    "MSIX Handshake Disable Mode turned on.\n");
4306 		} else {
4307 			icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4308 		}
4309 		icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4310 
4311 		wrt_reg_dword(&reg->isp25mq.req_q_in, 0);
4312 		wrt_reg_dword(&reg->isp25mq.req_q_out, 0);
4313 		wrt_reg_dword(&reg->isp25mq.rsp_q_in, 0);
4314 		wrt_reg_dword(&reg->isp25mq.rsp_q_out, 0);
4315 	} else {
4316 		wrt_reg_dword(&reg->isp24.req_q_in, 0);
4317 		wrt_reg_dword(&reg->isp24.req_q_out, 0);
4318 		wrt_reg_dword(&reg->isp24.rsp_q_in, 0);
4319 		wrt_reg_dword(&reg->isp24.rsp_q_out, 0);
4320 	}
4321 
4322 	qlt_24xx_config_rings(vha);
4323 
4324 	/* If the user has configured the speed, set it here */
4325 	if (ha->set_data_rate) {
4326 		ql_dbg(ql_dbg_init, vha, 0x00fd,
4327 		    "Speed set by user : %s Gbps \n",
4328 		    qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4329 		icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
4330 	}
4331 
4332 	/* PCI posting */
4333 	rd_reg_word(&ioreg->hccr);
4334 }
4335 
4336 /**
4337  * qla2x00_init_rings() - Initializes firmware.
4338  * @vha: HA context
4339  *
4340  * Beginning of request ring has initialization control block already built
4341  * by nvram config routine.
4342  *
4343  * Returns 0 on success.
4344  */
4345 int
4346 qla2x00_init_rings(scsi_qla_host_t *vha)
4347 {
4348 	int	rval;
4349 	unsigned long flags = 0;
4350 	int cnt, que;
4351 	struct qla_hw_data *ha = vha->hw;
4352 	struct req_que *req;
4353 	struct rsp_que *rsp;
4354 	struct mid_init_cb_24xx *mid_init_cb =
4355 	    (struct mid_init_cb_24xx *) ha->init_cb;
4356 
4357 	spin_lock_irqsave(&ha->hardware_lock, flags);
4358 
4359 	/* Clear outstanding commands array. */
4360 	for (que = 0; que < ha->max_req_queues; que++) {
4361 		req = ha->req_q_map[que];
4362 		if (!req || !test_bit(que, ha->req_qid_map))
4363 			continue;
4364 		req->out_ptr = (uint16_t *)(req->ring + req->length);
4365 		*req->out_ptr = 0;
4366 		for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4367 			req->outstanding_cmds[cnt] = NULL;
4368 
4369 		req->current_outstanding_cmd = 1;
4370 
4371 		/* Initialize firmware. */
4372 		req->ring_ptr  = req->ring;
4373 		req->ring_index    = 0;
4374 		req->cnt      = req->length;
4375 	}
4376 
4377 	for (que = 0; que < ha->max_rsp_queues; que++) {
4378 		rsp = ha->rsp_q_map[que];
4379 		if (!rsp || !test_bit(que, ha->rsp_qid_map))
4380 			continue;
4381 		rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
4382 		*rsp->in_ptr = 0;
4383 		/* Initialize response queue entries */
4384 		if (IS_QLAFX00(ha))
4385 			qlafx00_init_response_q_entries(rsp);
4386 		else
4387 			qla2x00_init_response_q_entries(rsp);
4388 	}
4389 
4390 	ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4391 	ha->tgt.atio_ring_index = 0;
4392 	/* Initialize ATIO queue entries */
4393 	qlt_init_atio_q_entries(vha);
4394 
4395 	ha->isp_ops->config_rings(vha);
4396 
4397 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
4398 
4399 	if (IS_QLAFX00(ha)) {
4400 		rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4401 		goto next_check;
4402 	}
4403 
4404 	/* Update any ISP specific firmware options before initialization. */
4405 	ha->isp_ops->update_fw_options(vha);
4406 
4407 	ql_dbg(ql_dbg_init, vha, 0x00d1,
4408 	       "Issue init firmware FW opt 1-3= %08x %08x %08x.\n",
4409 	       le32_to_cpu(mid_init_cb->init_cb.firmware_options_1),
4410 	       le32_to_cpu(mid_init_cb->init_cb.firmware_options_2),
4411 	       le32_to_cpu(mid_init_cb->init_cb.firmware_options_3));
4412 
4413 	if (ha->flags.npiv_supported) {
4414 		if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4415 			ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4416 		mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4417 	}
4418 
4419 	if (IS_FWI2_CAPABLE(ha)) {
4420 		mid_init_cb->options = cpu_to_le16(BIT_1);
4421 		mid_init_cb->init_cb.execution_throttle =
4422 		    cpu_to_le16(ha->cur_fw_xcb_count);
4423 		ha->flags.dport_enabled =
4424 			(le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4425 			 BIT_7) != 0;
4426 		ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4427 		    (ha->flags.dport_enabled) ? "enabled" : "disabled");
4428 		/* FA-WWPN Status */
4429 		ha->flags.fawwpn_enabled =
4430 			(le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4431 			 BIT_6) != 0;
4432 		ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4433 		    (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4434 	}
4435 
4436 	rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4437 next_check:
4438 	if (rval) {
4439 		ql_log(ql_log_fatal, vha, 0x00d2,
4440 		    "Init Firmware **** FAILED ****.\n");
4441 	} else {
4442 		ql_dbg(ql_dbg_init, vha, 0x00d3,
4443 		    "Init Firmware -- success.\n");
4444 		QLA_FW_STARTED(ha);
4445 		vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4446 	}
4447 
4448 	return (rval);
4449 }
4450 
4451 /**
4452  * qla2x00_fw_ready() - Waits for firmware ready.
4453  * @vha: HA context
4454  *
4455  * Returns 0 on success.
4456  */
4457 static int
4458 qla2x00_fw_ready(scsi_qla_host_t *vha)
4459 {
4460 	int		rval;
4461 	unsigned long	wtime, mtime, cs84xx_time;
4462 	uint16_t	min_wait;	/* Minimum wait time if loop is down */
4463 	uint16_t	wait_time;	/* Wait time if loop is coming ready */
4464 	uint16_t	state[6];
4465 	struct qla_hw_data *ha = vha->hw;
4466 
4467 	if (IS_QLAFX00(vha->hw))
4468 		return qlafx00_fw_ready(vha);
4469 
4470 	/* Time to wait for loop down */
4471 	if (IS_P3P_TYPE(ha))
4472 		min_wait = 30;
4473 	else
4474 		min_wait = 20;
4475 
4476 	/*
4477 	 * Firmware should take at most one RATOV to login, plus 5 seconds for
4478 	 * our own processing.
4479 	 */
4480 	if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4481 		wait_time = min_wait;
4482 	}
4483 
4484 	/* Min wait time if loop down */
4485 	mtime = jiffies + (min_wait * HZ);
4486 
4487 	/* wait time before firmware ready */
4488 	wtime = jiffies + (wait_time * HZ);
4489 
4490 	/* Wait for ISP to finish LIP */
4491 	if (!vha->flags.init_done)
4492 		ql_log(ql_log_info, vha, 0x801e,
4493 		    "Waiting for LIP to complete.\n");
4494 
4495 	do {
4496 		memset(state, -1, sizeof(state));
4497 		rval = qla2x00_get_firmware_state(vha, state);
4498 		if (rval == QLA_SUCCESS) {
4499 			if (state[0] < FSTATE_LOSS_OF_SYNC) {
4500 				vha->device_flags &= ~DFLG_NO_CABLE;
4501 			}
4502 			if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4503 				ql_dbg(ql_dbg_taskm, vha, 0x801f,
4504 				    "fw_state=%x 84xx=%x.\n", state[0],
4505 				    state[2]);
4506 				if ((state[2] & FSTATE_LOGGED_IN) &&
4507 				     (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4508 					ql_dbg(ql_dbg_taskm, vha, 0x8028,
4509 					    "Sending verify iocb.\n");
4510 
4511 					cs84xx_time = jiffies;
4512 					rval = qla84xx_init_chip(vha);
4513 					if (rval != QLA_SUCCESS) {
4514 						ql_log(ql_log_warn,
4515 						    vha, 0x8007,
4516 						    "Init chip failed.\n");
4517 						break;
4518 					}
4519 
4520 					/* Add time taken to initialize. */
4521 					cs84xx_time = jiffies - cs84xx_time;
4522 					wtime += cs84xx_time;
4523 					mtime += cs84xx_time;
4524 					ql_dbg(ql_dbg_taskm, vha, 0x8008,
4525 					    "Increasing wait time by %ld. "
4526 					    "New time %ld.\n", cs84xx_time,
4527 					    wtime);
4528 				}
4529 			} else if (state[0] == FSTATE_READY) {
4530 				ql_dbg(ql_dbg_taskm, vha, 0x8037,
4531 				    "F/W Ready - OK.\n");
4532 
4533 				qla2x00_get_retry_cnt(vha, &ha->retry_count,
4534 				    &ha->login_timeout, &ha->r_a_tov);
4535 
4536 				rval = QLA_SUCCESS;
4537 				break;
4538 			}
4539 
4540 			rval = QLA_FUNCTION_FAILED;
4541 
4542 			if (atomic_read(&vha->loop_down_timer) &&
4543 			    state[0] != FSTATE_READY) {
4544 				/* Loop down. Timeout on min_wait for states
4545 				 * other than Wait for Login.
4546 				 */
4547 				if (time_after_eq(jiffies, mtime)) {
4548 					ql_log(ql_log_info, vha, 0x8038,
4549 					    "Cable is unplugged...\n");
4550 
4551 					vha->device_flags |= DFLG_NO_CABLE;
4552 					break;
4553 				}
4554 			}
4555 		} else {
4556 			/* Mailbox cmd failed. Timeout on min_wait. */
4557 			if (time_after_eq(jiffies, mtime) ||
4558 				ha->flags.isp82xx_fw_hung)
4559 				break;
4560 		}
4561 
4562 		if (time_after_eq(jiffies, wtime))
4563 			break;
4564 
4565 		/* Delay for a while */
4566 		msleep(500);
4567 	} while (1);
4568 
4569 	ql_dbg(ql_dbg_taskm, vha, 0x803a,
4570 	    "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4571 	    state[1], state[2], state[3], state[4], state[5], jiffies);
4572 
4573 	if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4574 		ql_log(ql_log_warn, vha, 0x803b,
4575 		    "Firmware ready **** FAILED ****.\n");
4576 	}
4577 
4578 	return (rval);
4579 }
4580 
4581 /*
4582 *  qla2x00_configure_hba
4583 *      Setup adapter context.
4584 *
4585 * Input:
4586 *      ha = adapter state pointer.
4587 *
4588 * Returns:
4589 *      0 = success
4590 *
4591 * Context:
4592 *      Kernel context.
4593 */
4594 static int
4595 qla2x00_configure_hba(scsi_qla_host_t *vha)
4596 {
4597 	int       rval;
4598 	uint16_t      loop_id;
4599 	uint16_t      topo;
4600 	uint16_t      sw_cap;
4601 	uint8_t       al_pa;
4602 	uint8_t       area;
4603 	uint8_t       domain;
4604 	char		connect_type[22];
4605 	struct qla_hw_data *ha = vha->hw;
4606 	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4607 	port_id_t id;
4608 	unsigned long flags;
4609 
4610 	/* Get host addresses. */
4611 	rval = qla2x00_get_adapter_id(vha,
4612 	    &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4613 	if (rval != QLA_SUCCESS) {
4614 		if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4615 		    IS_CNA_CAPABLE(ha) ||
4616 		    (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4617 			ql_dbg(ql_dbg_disc, vha, 0x2008,
4618 			    "Loop is in a transition state.\n");
4619 		} else {
4620 			ql_log(ql_log_warn, vha, 0x2009,
4621 			    "Unable to get host loop ID.\n");
4622 			if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4623 			    (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4624 				ql_log(ql_log_warn, vha, 0x1151,
4625 				    "Doing link init.\n");
4626 				if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4627 					return rval;
4628 			}
4629 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4630 		}
4631 		return (rval);
4632 	}
4633 
4634 	if (topo == 4) {
4635 		ql_log(ql_log_info, vha, 0x200a,
4636 		    "Cannot get topology - retrying.\n");
4637 		return (QLA_FUNCTION_FAILED);
4638 	}
4639 
4640 	vha->loop_id = loop_id;
4641 
4642 	/* initialize */
4643 	ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4644 	ha->operating_mode = LOOP;
4645 
4646 	switch (topo) {
4647 	case 0:
4648 		ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4649 		ha->switch_cap = 0;
4650 		ha->current_topology = ISP_CFG_NL;
4651 		strcpy(connect_type, "(Loop)");
4652 		break;
4653 
4654 	case 1:
4655 		ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4656 		ha->switch_cap = sw_cap;
4657 		ha->current_topology = ISP_CFG_FL;
4658 		strcpy(connect_type, "(FL_Port)");
4659 		break;
4660 
4661 	case 2:
4662 		ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4663 		ha->switch_cap = 0;
4664 		ha->operating_mode = P2P;
4665 		ha->current_topology = ISP_CFG_N;
4666 		strcpy(connect_type, "(N_Port-to-N_Port)");
4667 		break;
4668 
4669 	case 3:
4670 		ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4671 		ha->switch_cap = sw_cap;
4672 		ha->operating_mode = P2P;
4673 		ha->current_topology = ISP_CFG_F;
4674 		strcpy(connect_type, "(F_Port)");
4675 		break;
4676 
4677 	default:
4678 		ql_dbg(ql_dbg_disc, vha, 0x200f,
4679 		    "HBA in unknown topology %x, using NL.\n", topo);
4680 		ha->switch_cap = 0;
4681 		ha->current_topology = ISP_CFG_NL;
4682 		strcpy(connect_type, "(Loop)");
4683 		break;
4684 	}
4685 
4686 	/* Save Host port and loop ID. */
4687 	/* byte order - Big Endian */
4688 	id.b.domain = domain;
4689 	id.b.area = area;
4690 	id.b.al_pa = al_pa;
4691 	id.b.rsvd_1 = 0;
4692 	spin_lock_irqsave(&ha->hardware_lock, flags);
4693 	if (vha->hw->flags.edif_enabled) {
4694 		if (topo != 2)
4695 			qlt_update_host_map(vha, id);
4696 	} else if (!(topo == 2 && ha->flags.n2n_bigger))
4697 		qlt_update_host_map(vha, id);
4698 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
4699 
4700 	if (!vha->flags.init_done)
4701 		ql_log(ql_log_info, vha, 0x2010,
4702 		    "Topology - %s, Host Loop address 0x%x.\n",
4703 		    connect_type, vha->loop_id);
4704 
4705 	return(rval);
4706 }
4707 
4708 inline void
4709 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4710 		       const char *def)
4711 {
4712 	char *st, *en;
4713 	uint16_t index;
4714 	uint64_t zero[2] = { 0 };
4715 	struct qla_hw_data *ha = vha->hw;
4716 	int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4717 	    !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4718 
4719 	if (len > sizeof(zero))
4720 		len = sizeof(zero);
4721 	if (memcmp(model, &zero, len) != 0) {
4722 		memcpy(ha->model_number, model, len);
4723 		st = en = ha->model_number;
4724 		en += len - 1;
4725 		while (en > st) {
4726 			if (*en != 0x20 && *en != 0x00)
4727 				break;
4728 			*en-- = '\0';
4729 		}
4730 
4731 		index = (ha->pdev->subsystem_device & 0xff);
4732 		if (use_tbl &&
4733 		    ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4734 		    index < QLA_MODEL_NAMES)
4735 			strlcpy(ha->model_desc,
4736 			    qla2x00_model_name[index * 2 + 1],
4737 			    sizeof(ha->model_desc));
4738 	} else {
4739 		index = (ha->pdev->subsystem_device & 0xff);
4740 		if (use_tbl &&
4741 		    ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4742 		    index < QLA_MODEL_NAMES) {
4743 			strlcpy(ha->model_number,
4744 				qla2x00_model_name[index * 2],
4745 				sizeof(ha->model_number));
4746 			strlcpy(ha->model_desc,
4747 			    qla2x00_model_name[index * 2 + 1],
4748 			    sizeof(ha->model_desc));
4749 		} else {
4750 			strlcpy(ha->model_number, def,
4751 				sizeof(ha->model_number));
4752 		}
4753 	}
4754 	if (IS_FWI2_CAPABLE(ha))
4755 		qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4756 		    sizeof(ha->model_desc));
4757 }
4758 
4759 /* On sparc systems, obtain port and node WWN from firmware
4760  * properties.
4761  */
4762 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4763 {
4764 #ifdef CONFIG_SPARC
4765 	struct qla_hw_data *ha = vha->hw;
4766 	struct pci_dev *pdev = ha->pdev;
4767 	struct device_node *dp = pci_device_to_OF_node(pdev);
4768 	const u8 *val;
4769 	int len;
4770 
4771 	val = of_get_property(dp, "port-wwn", &len);
4772 	if (val && len >= WWN_SIZE)
4773 		memcpy(nv->port_name, val, WWN_SIZE);
4774 
4775 	val = of_get_property(dp, "node-wwn", &len);
4776 	if (val && len >= WWN_SIZE)
4777 		memcpy(nv->node_name, val, WWN_SIZE);
4778 #endif
4779 }
4780 
4781 /*
4782 * NVRAM configuration for ISP 2xxx
4783 *
4784 * Input:
4785 *      ha                = adapter block pointer.
4786 *
4787 * Output:
4788 *      initialization control block in response_ring
4789 *      host adapters parameters in host adapter block
4790 *
4791 * Returns:
4792 *      0 = success.
4793 */
4794 int
4795 qla2x00_nvram_config(scsi_qla_host_t *vha)
4796 {
4797 	int             rval;
4798 	uint8_t         chksum = 0;
4799 	uint16_t        cnt;
4800 	uint8_t         *dptr1, *dptr2;
4801 	struct qla_hw_data *ha = vha->hw;
4802 	init_cb_t       *icb = ha->init_cb;
4803 	nvram_t         *nv = ha->nvram;
4804 	uint8_t         *ptr = ha->nvram;
4805 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4806 
4807 	rval = QLA_SUCCESS;
4808 
4809 	/* Determine NVRAM starting address. */
4810 	ha->nvram_size = sizeof(*nv);
4811 	ha->nvram_base = 0;
4812 	if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4813 		if ((rd_reg_word(&reg->ctrl_status) >> 14) == 1)
4814 			ha->nvram_base = 0x80;
4815 
4816 	/* Get NVRAM data and calculate checksum. */
4817 	ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4818 	for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4819 		chksum += *ptr++;
4820 
4821 	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4822 	    "Contents of NVRAM.\n");
4823 	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4824 	    nv, ha->nvram_size);
4825 
4826 	/* Bad NVRAM data, set defaults parameters. */
4827 	if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
4828 	    nv->nvram_version < 1) {
4829 		/* Reset NVRAM data. */
4830 		ql_log(ql_log_warn, vha, 0x0064,
4831 		    "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
4832 		    chksum, nv->id, nv->nvram_version);
4833 		ql_log(ql_log_warn, vha, 0x0065,
4834 		    "Falling back to "
4835 		    "functioning (yet invalid -- WWPN) defaults.\n");
4836 
4837 		/*
4838 		 * Set default initialization control block.
4839 		 */
4840 		memset(nv, 0, ha->nvram_size);
4841 		nv->parameter_block_version = ICB_VERSION;
4842 
4843 		if (IS_QLA23XX(ha)) {
4844 			nv->firmware_options[0] = BIT_2 | BIT_1;
4845 			nv->firmware_options[1] = BIT_7 | BIT_5;
4846 			nv->add_firmware_options[0] = BIT_5;
4847 			nv->add_firmware_options[1] = BIT_5 | BIT_4;
4848 			nv->frame_payload_size = cpu_to_le16(2048);
4849 			nv->special_options[1] = BIT_7;
4850 		} else if (IS_QLA2200(ha)) {
4851 			nv->firmware_options[0] = BIT_2 | BIT_1;
4852 			nv->firmware_options[1] = BIT_7 | BIT_5;
4853 			nv->add_firmware_options[0] = BIT_5;
4854 			nv->add_firmware_options[1] = BIT_5 | BIT_4;
4855 			nv->frame_payload_size = cpu_to_le16(1024);
4856 		} else if (IS_QLA2100(ha)) {
4857 			nv->firmware_options[0] = BIT_3 | BIT_1;
4858 			nv->firmware_options[1] = BIT_5;
4859 			nv->frame_payload_size = cpu_to_le16(1024);
4860 		}
4861 
4862 		nv->max_iocb_allocation = cpu_to_le16(256);
4863 		nv->execution_throttle = cpu_to_le16(16);
4864 		nv->retry_count = 8;
4865 		nv->retry_delay = 1;
4866 
4867 		nv->port_name[0] = 33;
4868 		nv->port_name[3] = 224;
4869 		nv->port_name[4] = 139;
4870 
4871 		qla2xxx_nvram_wwn_from_ofw(vha, nv);
4872 
4873 		nv->login_timeout = 4;
4874 
4875 		/*
4876 		 * Set default host adapter parameters
4877 		 */
4878 		nv->host_p[1] = BIT_2;
4879 		nv->reset_delay = 5;
4880 		nv->port_down_retry_count = 8;
4881 		nv->max_luns_per_target = cpu_to_le16(8);
4882 		nv->link_down_timeout = 60;
4883 
4884 		rval = 1;
4885 	}
4886 
4887 	/* Reset Initialization control block */
4888 	memset(icb, 0, ha->init_cb_size);
4889 
4890 	/*
4891 	 * Setup driver NVRAM options.
4892 	 */
4893 	nv->firmware_options[0] |= (BIT_6 | BIT_1);
4894 	nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4895 	nv->firmware_options[1] |= (BIT_5 | BIT_0);
4896 	nv->firmware_options[1] &= ~BIT_4;
4897 
4898 	if (IS_QLA23XX(ha)) {
4899 		nv->firmware_options[0] |= BIT_2;
4900 		nv->firmware_options[0] &= ~BIT_3;
4901 		nv->special_options[0] &= ~BIT_6;
4902 		nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4903 
4904 		if (IS_QLA2300(ha)) {
4905 			if (ha->fb_rev == FPM_2310) {
4906 				strcpy(ha->model_number, "QLA2310");
4907 			} else {
4908 				strcpy(ha->model_number, "QLA2300");
4909 			}
4910 		} else {
4911 			qla2x00_set_model_info(vha, nv->model_number,
4912 			    sizeof(nv->model_number), "QLA23xx");
4913 		}
4914 	} else if (IS_QLA2200(ha)) {
4915 		nv->firmware_options[0] |= BIT_2;
4916 		/*
4917 		 * 'Point-to-point preferred, else loop' is not a safe
4918 		 * connection mode setting.
4919 		 */
4920 		if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4921 		    (BIT_5 | BIT_4)) {
4922 			/* Force 'loop preferred, else point-to-point'. */
4923 			nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4924 			nv->add_firmware_options[0] |= BIT_5;
4925 		}
4926 		strcpy(ha->model_number, "QLA22xx");
4927 	} else /*if (IS_QLA2100(ha))*/ {
4928 		strcpy(ha->model_number, "QLA2100");
4929 	}
4930 
4931 	/*
4932 	 * Copy over NVRAM RISC parameter block to initialization control block.
4933 	 */
4934 	dptr1 = (uint8_t *)icb;
4935 	dptr2 = (uint8_t *)&nv->parameter_block_version;
4936 	cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4937 	while (cnt--)
4938 		*dptr1++ = *dptr2++;
4939 
4940 	/* Copy 2nd half. */
4941 	dptr1 = (uint8_t *)icb->add_firmware_options;
4942 	cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4943 	while (cnt--)
4944 		*dptr1++ = *dptr2++;
4945 	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4946 	/* Use alternate WWN? */
4947 	if (nv->host_p[1] & BIT_7) {
4948 		memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4949 		memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4950 	}
4951 
4952 	/* Prepare nodename */
4953 	if ((icb->firmware_options[1] & BIT_6) == 0) {
4954 		/*
4955 		 * Firmware will apply the following mask if the nodename was
4956 		 * not provided.
4957 		 */
4958 		memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4959 		icb->node_name[0] &= 0xF0;
4960 	}
4961 
4962 	/*
4963 	 * Set host adapter parameters.
4964 	 */
4965 
4966 	/*
4967 	 * BIT_7 in the host-parameters section allows for modification to
4968 	 * internal driver logging.
4969 	 */
4970 	if (nv->host_p[0] & BIT_7)
4971 		ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4972 	ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4973 	/* Always load RISC code on non ISP2[12]00 chips. */
4974 	if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4975 		ha->flags.disable_risc_code_load = 0;
4976 	ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4977 	ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4978 	ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4979 	ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4980 	ha->flags.disable_serdes = 0;
4981 
4982 	ha->operating_mode =
4983 	    (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4984 
4985 	memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4986 	    sizeof(ha->fw_seriallink_options));
4987 
4988 	/* save HBA serial number */
4989 	ha->serial0 = icb->port_name[5];
4990 	ha->serial1 = icb->port_name[6];
4991 	ha->serial2 = icb->port_name[7];
4992 	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4993 	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4994 
4995 	icb->execution_throttle = cpu_to_le16(0xFFFF);
4996 
4997 	ha->retry_count = nv->retry_count;
4998 
4999 	/* Set minimum login_timeout to 4 seconds. */
5000 	if (nv->login_timeout != ql2xlogintimeout)
5001 		nv->login_timeout = ql2xlogintimeout;
5002 	if (nv->login_timeout < 4)
5003 		nv->login_timeout = 4;
5004 	ha->login_timeout = nv->login_timeout;
5005 
5006 	/* Set minimum RATOV to 100 tenths of a second. */
5007 	ha->r_a_tov = 100;
5008 
5009 	ha->loop_reset_delay = nv->reset_delay;
5010 
5011 	/* Link Down Timeout = 0:
5012 	 *
5013 	 * 	When Port Down timer expires we will start returning
5014 	 *	I/O's to OS with "DID_NO_CONNECT".
5015 	 *
5016 	 * Link Down Timeout != 0:
5017 	 *
5018 	 *	 The driver waits for the link to come up after link down
5019 	 *	 before returning I/Os to OS with "DID_NO_CONNECT".
5020 	 */
5021 	if (nv->link_down_timeout == 0) {
5022 		ha->loop_down_abort_time =
5023 		    (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5024 	} else {
5025 		ha->link_down_timeout =	 nv->link_down_timeout;
5026 		ha->loop_down_abort_time =
5027 		    (LOOP_DOWN_TIME - ha->link_down_timeout);
5028 	}
5029 
5030 	/*
5031 	 * Need enough time to try and get the port back.
5032 	 */
5033 	ha->port_down_retry_count = nv->port_down_retry_count;
5034 	if (qlport_down_retry)
5035 		ha->port_down_retry_count = qlport_down_retry;
5036 	/* Set login_retry_count */
5037 	ha->login_retry_count  = nv->retry_count;
5038 	if (ha->port_down_retry_count == nv->port_down_retry_count &&
5039 	    ha->port_down_retry_count > 3)
5040 		ha->login_retry_count = ha->port_down_retry_count;
5041 	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5042 		ha->login_retry_count = ha->port_down_retry_count;
5043 	if (ql2xloginretrycount)
5044 		ha->login_retry_count = ql2xloginretrycount;
5045 
5046 	icb->lun_enables = cpu_to_le16(0);
5047 	icb->command_resource_count = 0;
5048 	icb->immediate_notify_resource_count = 0;
5049 	icb->timeout = cpu_to_le16(0);
5050 
5051 	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5052 		/* Enable RIO */
5053 		icb->firmware_options[0] &= ~BIT_3;
5054 		icb->add_firmware_options[0] &=
5055 		    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5056 		icb->add_firmware_options[0] |= BIT_2;
5057 		icb->response_accumulation_timer = 3;
5058 		icb->interrupt_delay_timer = 5;
5059 
5060 		vha->flags.process_response_queue = 1;
5061 	} else {
5062 		/* Enable ZIO. */
5063 		if (!vha->flags.init_done) {
5064 			ha->zio_mode = icb->add_firmware_options[0] &
5065 			    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5066 			ha->zio_timer = icb->interrupt_delay_timer ?
5067 			    icb->interrupt_delay_timer : 2;
5068 		}
5069 		icb->add_firmware_options[0] &=
5070 		    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5071 		vha->flags.process_response_queue = 0;
5072 		if (ha->zio_mode != QLA_ZIO_DISABLED) {
5073 			ha->zio_mode = QLA_ZIO_MODE_6;
5074 
5075 			ql_log(ql_log_info, vha, 0x0068,
5076 			    "ZIO mode %d enabled; timer delay (%d us).\n",
5077 			    ha->zio_mode, ha->zio_timer * 100);
5078 
5079 			icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
5080 			icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
5081 			vha->flags.process_response_queue = 1;
5082 		}
5083 	}
5084 
5085 	if (rval) {
5086 		ql_log(ql_log_warn, vha, 0x0069,
5087 		    "NVRAM configuration failed.\n");
5088 	}
5089 	return (rval);
5090 }
5091 
5092 static void
5093 qla2x00_rport_del(void *data)
5094 {
5095 	fc_port_t *fcport = data;
5096 	struct fc_rport *rport;
5097 	unsigned long flags;
5098 
5099 	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5100 	rport = fcport->drport ? fcport->drport : fcport->rport;
5101 	fcport->drport = NULL;
5102 	spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5103 	if (rport) {
5104 		ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
5105 		    "%s %8phN. rport %p roles %x\n",
5106 		    __func__, fcport->port_name, rport,
5107 		    rport->roles);
5108 
5109 		fc_remote_port_delete(rport);
5110 	}
5111 }
5112 
5113 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
5114 {
5115 	int old_state;
5116 
5117 	old_state = atomic_read(&fcport->state);
5118 	atomic_set(&fcport->state, state);
5119 
5120 	/* Don't print state transitions during initial allocation of fcport */
5121 	if (old_state && old_state != state) {
5122 		ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
5123 		       "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
5124 		       fcport->port_name, port_state_str[old_state],
5125 		       port_state_str[state], fcport->d_id.b.domain,
5126 		       fcport->d_id.b.area, fcport->d_id.b.al_pa);
5127 	}
5128 }
5129 
5130 /**
5131  * qla2x00_alloc_fcport() - Allocate a generic fcport.
5132  * @vha: HA context
5133  * @flags: allocation flags
5134  *
5135  * Returns a pointer to the allocated fcport, or NULL, if none available.
5136  */
5137 fc_port_t *
5138 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
5139 {
5140 	fc_port_t *fcport;
5141 
5142 	fcport = kzalloc(sizeof(fc_port_t), flags);
5143 	if (!fcport)
5144 		return NULL;
5145 
5146 	fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
5147 		sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
5148 		flags);
5149 	if (!fcport->ct_desc.ct_sns) {
5150 		ql_log(ql_log_warn, vha, 0xd049,
5151 		    "Failed to allocate ct_sns request.\n");
5152 		kfree(fcport);
5153 		return NULL;
5154 	}
5155 
5156 	/* Setup fcport template structure. */
5157 	fcport->vha = vha;
5158 	fcport->port_type = FCT_UNKNOWN;
5159 	fcport->loop_id = FC_NO_LOOP_ID;
5160 	qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
5161 	fcport->supported_classes = FC_COS_UNSPECIFIED;
5162 	fcport->fp_speed = PORT_SPEED_UNKNOWN;
5163 
5164 	fcport->disc_state = DSC_DELETED;
5165 	fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
5166 	fcport->deleted = QLA_SESS_DELETED;
5167 	fcport->login_retry = vha->hw->login_retry_count;
5168 	fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5169 	fcport->logout_on_delete = 1;
5170 	fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
5171 	fcport->tgt_short_link_down_cnt = 0;
5172 	fcport->dev_loss_tmo = 0;
5173 
5174 	if (!fcport->ct_desc.ct_sns) {
5175 		ql_log(ql_log_warn, vha, 0xd049,
5176 		    "Failed to allocate ct_sns request.\n");
5177 		kfree(fcport);
5178 		return NULL;
5179 	}
5180 
5181 	INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
5182 	INIT_WORK(&fcport->free_work, qlt_free_session_done);
5183 	INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
5184 	INIT_LIST_HEAD(&fcport->gnl_entry);
5185 	INIT_LIST_HEAD(&fcport->list);
5186 
5187 	INIT_LIST_HEAD(&fcport->sess_cmd_list);
5188 	spin_lock_init(&fcport->sess_cmd_lock);
5189 
5190 	spin_lock_init(&fcport->edif.sa_list_lock);
5191 	INIT_LIST_HEAD(&fcport->edif.tx_sa_list);
5192 	INIT_LIST_HEAD(&fcport->edif.rx_sa_list);
5193 
5194 	if (vha->e_dbell.db_flags == EDB_ACTIVE)
5195 		fcport->edif.app_started = 1;
5196 
5197 	spin_lock_init(&fcport->edif.indx_list_lock);
5198 	INIT_LIST_HEAD(&fcport->edif.edif_indx_list);
5199 
5200 	return fcport;
5201 }
5202 
5203 void
5204 qla2x00_free_fcport(fc_port_t *fcport)
5205 {
5206 	if (fcport->ct_desc.ct_sns) {
5207 		dma_free_coherent(&fcport->vha->hw->pdev->dev,
5208 			sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
5209 			fcport->ct_desc.ct_sns_dma);
5210 
5211 		fcport->ct_desc.ct_sns = NULL;
5212 	}
5213 
5214 	qla_edif_flush_sa_ctl_lists(fcport);
5215 	list_del(&fcport->list);
5216 	qla2x00_clear_loop_id(fcport);
5217 
5218 	qla_edif_list_del(fcport);
5219 
5220 	kfree(fcport);
5221 }
5222 
5223 static void qla_get_login_template(scsi_qla_host_t *vha)
5224 {
5225 	struct qla_hw_data *ha = vha->hw;
5226 	int rval;
5227 	u32 *bp, sz;
5228 	__be32 *q;
5229 
5230 	memset(ha->init_cb, 0, ha->init_cb_size);
5231 	sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
5232 	rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5233 					    ha->init_cb, sz);
5234 	if (rval != QLA_SUCCESS) {
5235 		ql_dbg(ql_dbg_init, vha, 0x00d1,
5236 		       "PLOGI ELS param read fail.\n");
5237 		return;
5238 	}
5239 	q = (__be32 *)&ha->plogi_els_payld.fl_csp;
5240 
5241 	bp = (uint32_t *)ha->init_cb;
5242 	cpu_to_be32_array(q, bp, sz / 4);
5243 	ha->flags.plogi_template_valid = 1;
5244 }
5245 
5246 /*
5247  * qla2x00_configure_loop
5248  *      Updates Fibre Channel Device Database with what is actually on loop.
5249  *
5250  * Input:
5251  *      ha                = adapter block pointer.
5252  *
5253  * Returns:
5254  *      0 = success.
5255  *      1 = error.
5256  *      2 = database was full and device was not configured.
5257  */
5258 static int
5259 qla2x00_configure_loop(scsi_qla_host_t *vha)
5260 {
5261 	int  rval;
5262 	unsigned long flags, save_flags;
5263 	struct qla_hw_data *ha = vha->hw;
5264 
5265 	rval = QLA_SUCCESS;
5266 
5267 	/* Get Initiator ID */
5268 	if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
5269 		rval = qla2x00_configure_hba(vha);
5270 		if (rval != QLA_SUCCESS) {
5271 			ql_dbg(ql_dbg_disc, vha, 0x2013,
5272 			    "Unable to configure HBA.\n");
5273 			return (rval);
5274 		}
5275 	}
5276 
5277 	save_flags = flags = vha->dpc_flags;
5278 	ql_dbg(ql_dbg_disc, vha, 0x2014,
5279 	    "Configure loop -- dpc flags = 0x%lx.\n", flags);
5280 
5281 	/*
5282 	 * If we have both an RSCN and PORT UPDATE pending then handle them
5283 	 * both at the same time.
5284 	 */
5285 	clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5286 	clear_bit(RSCN_UPDATE, &vha->dpc_flags);
5287 
5288 	qla2x00_get_data_rate(vha);
5289 	qla_get_login_template(vha);
5290 
5291 	/* Determine what we need to do */
5292 	if ((ha->current_topology == ISP_CFG_FL ||
5293 	    ha->current_topology == ISP_CFG_F) &&
5294 	    (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5295 
5296 		set_bit(RSCN_UPDATE, &flags);
5297 		clear_bit(LOCAL_LOOP_UPDATE, &flags);
5298 
5299 	} else if (ha->current_topology == ISP_CFG_NL ||
5300 		   ha->current_topology == ISP_CFG_N) {
5301 		clear_bit(RSCN_UPDATE, &flags);
5302 		set_bit(LOCAL_LOOP_UPDATE, &flags);
5303 	} else if (!vha->flags.online ||
5304 	    (test_bit(ABORT_ISP_ACTIVE, &flags))) {
5305 		set_bit(RSCN_UPDATE, &flags);
5306 		set_bit(LOCAL_LOOP_UPDATE, &flags);
5307 	}
5308 
5309 	if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5310 		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5311 			ql_dbg(ql_dbg_disc, vha, 0x2015,
5312 			    "Loop resync needed, failing.\n");
5313 			rval = QLA_FUNCTION_FAILED;
5314 		} else
5315 			rval = qla2x00_configure_local_loop(vha);
5316 	}
5317 
5318 	if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5319 		if (LOOP_TRANSITION(vha)) {
5320 			ql_dbg(ql_dbg_disc, vha, 0x2099,
5321 			    "Needs RSCN update and loop transition.\n");
5322 			rval = QLA_FUNCTION_FAILED;
5323 		}
5324 		else
5325 			rval = qla2x00_configure_fabric(vha);
5326 	}
5327 
5328 	if (rval == QLA_SUCCESS) {
5329 		if (atomic_read(&vha->loop_down_timer) ||
5330 		    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5331 			rval = QLA_FUNCTION_FAILED;
5332 		} else {
5333 			atomic_set(&vha->loop_state, LOOP_READY);
5334 			ql_dbg(ql_dbg_disc, vha, 0x2069,
5335 			    "LOOP READY.\n");
5336 			ha->flags.fw_init_done = 1;
5337 
5338 			if (ha->flags.edif_enabled &&
5339 			    !(vha->e_dbell.db_flags & EDB_ACTIVE) &&
5340 			    N2N_TOPO(vha->hw)) {
5341 				/*
5342 				 * use port online to wake up app to get ready
5343 				 * for authentication
5344 				 */
5345 				qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE, 0);
5346 			}
5347 
5348 			/*
5349 			 * Process any ATIO queue entries that came in
5350 			 * while we weren't online.
5351 			 */
5352 			if (qla_tgt_mode_enabled(vha) ||
5353 			    qla_dual_mode_enabled(vha)) {
5354 				spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5355 				qlt_24xx_process_atio_queue(vha, 0);
5356 				spin_unlock_irqrestore(&ha->tgt.atio_lock,
5357 				    flags);
5358 			}
5359 		}
5360 	}
5361 
5362 	if (rval) {
5363 		ql_dbg(ql_dbg_disc, vha, 0x206a,
5364 		    "%s *** FAILED ***.\n", __func__);
5365 	} else {
5366 		ql_dbg(ql_dbg_disc, vha, 0x206b,
5367 		    "%s: exiting normally. local port wwpn %8phN id %06x)\n",
5368 		    __func__, vha->port_name, vha->d_id.b24);
5369 	}
5370 
5371 	/* Restore state if a resync event occurred during processing */
5372 	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5373 		if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5374 			set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5375 		if (test_bit(RSCN_UPDATE, &save_flags)) {
5376 			set_bit(RSCN_UPDATE, &vha->dpc_flags);
5377 		}
5378 	}
5379 
5380 	return (rval);
5381 }
5382 
5383 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
5384 {
5385 	unsigned long flags;
5386 	fc_port_t *fcport;
5387 
5388 	ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__);
5389 
5390 	if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags))
5391 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5392 
5393 	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5394 		if (fcport->n2n_flag) {
5395 			qla24xx_fcport_handle_login(vha, fcport);
5396 			return QLA_SUCCESS;
5397 		}
5398 	}
5399 
5400 	spin_lock_irqsave(&vha->work_lock, flags);
5401 	vha->scan.scan_retry++;
5402 	spin_unlock_irqrestore(&vha->work_lock, flags);
5403 
5404 	if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5405 		set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5406 		set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5407 	}
5408 	return QLA_FUNCTION_FAILED;
5409 }
5410 
5411 /*
5412  * qla2x00_configure_local_loop
5413  *	Updates Fibre Channel Device Database with local loop devices.
5414  *
5415  * Input:
5416  *	ha = adapter block pointer.
5417  *
5418  * Returns:
5419  *	0 = success.
5420  */
5421 static int
5422 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5423 {
5424 	int		rval, rval2;
5425 	int		found_devs;
5426 	int		found;
5427 	fc_port_t	*fcport, *new_fcport;
5428 	uint16_t	index;
5429 	uint16_t	entries;
5430 	struct gid_list_info *gid;
5431 	uint16_t	loop_id;
5432 	uint8_t		domain, area, al_pa;
5433 	struct qla_hw_data *ha = vha->hw;
5434 	unsigned long flags;
5435 
5436 	/* Inititae N2N login. */
5437 	if (N2N_TOPO(ha))
5438 		return qla2x00_configure_n2n_loop(vha);
5439 
5440 	found_devs = 0;
5441 	new_fcport = NULL;
5442 	entries = MAX_FIBRE_DEVICES_LOOP;
5443 
5444 	/* Get list of logged in devices. */
5445 	memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5446 	rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5447 	    &entries);
5448 	if (rval != QLA_SUCCESS)
5449 		goto err;
5450 
5451 	ql_dbg(ql_dbg_disc, vha, 0x2011,
5452 	    "Entries in ID list (%d).\n", entries);
5453 	ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5454 	    ha->gid_list, entries * sizeof(*ha->gid_list));
5455 
5456 	if (entries == 0) {
5457 		spin_lock_irqsave(&vha->work_lock, flags);
5458 		vha->scan.scan_retry++;
5459 		spin_unlock_irqrestore(&vha->work_lock, flags);
5460 
5461 		if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5462 			set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5463 			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5464 		}
5465 	} else {
5466 		vha->scan.scan_retry = 0;
5467 	}
5468 
5469 	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5470 		fcport->scan_state = QLA_FCPORT_SCAN;
5471 	}
5472 
5473 	/* Allocate temporary fcport for any new fcports discovered. */
5474 	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5475 	if (new_fcport == NULL) {
5476 		ql_log(ql_log_warn, vha, 0x2012,
5477 		    "Memory allocation failed for fcport.\n");
5478 		rval = QLA_MEMORY_ALLOC_FAILED;
5479 		goto err;
5480 	}
5481 	new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5482 
5483 	/* Add devices to port list. */
5484 	gid = ha->gid_list;
5485 	for (index = 0; index < entries; index++) {
5486 		domain = gid->domain;
5487 		area = gid->area;
5488 		al_pa = gid->al_pa;
5489 		if (IS_QLA2100(ha) || IS_QLA2200(ha))
5490 			loop_id = gid->loop_id_2100;
5491 		else
5492 			loop_id = le16_to_cpu(gid->loop_id);
5493 		gid = (void *)gid + ha->gid_list_info_size;
5494 
5495 		/* Bypass reserved domain fields. */
5496 		if ((domain & 0xf0) == 0xf0)
5497 			continue;
5498 
5499 		/* Bypass if not same domain and area of adapter. */
5500 		if (area && domain && ((area != vha->d_id.b.area) ||
5501 		    (domain != vha->d_id.b.domain)) &&
5502 		    (ha->current_topology == ISP_CFG_NL))
5503 			continue;
5504 
5505 
5506 		/* Bypass invalid local loop ID. */
5507 		if (loop_id > LAST_LOCAL_LOOP_ID)
5508 			continue;
5509 
5510 		memset(new_fcport->port_name, 0, WWN_SIZE);
5511 
5512 		/* Fill in member data. */
5513 		new_fcport->d_id.b.domain = domain;
5514 		new_fcport->d_id.b.area = area;
5515 		new_fcport->d_id.b.al_pa = al_pa;
5516 		new_fcport->loop_id = loop_id;
5517 		new_fcport->scan_state = QLA_FCPORT_FOUND;
5518 
5519 		rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5520 		if (rval2 != QLA_SUCCESS) {
5521 			ql_dbg(ql_dbg_disc, vha, 0x2097,
5522 			    "Failed to retrieve fcport information "
5523 			    "-- get_port_database=%x, loop_id=0x%04x.\n",
5524 			    rval2, new_fcport->loop_id);
5525 			/* Skip retry if N2N */
5526 			if (ha->current_topology != ISP_CFG_N) {
5527 				ql_dbg(ql_dbg_disc, vha, 0x2105,
5528 				    "Scheduling resync.\n");
5529 				set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5530 				continue;
5531 			}
5532 		}
5533 
5534 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5535 		/* Check for matching device in port list. */
5536 		found = 0;
5537 		fcport = NULL;
5538 		list_for_each_entry(fcport, &vha->vp_fcports, list) {
5539 			if (memcmp(new_fcport->port_name, fcport->port_name,
5540 			    WWN_SIZE))
5541 				continue;
5542 
5543 			fcport->flags &= ~FCF_FABRIC_DEVICE;
5544 			fcport->loop_id = new_fcport->loop_id;
5545 			fcport->port_type = new_fcport->port_type;
5546 			fcport->d_id.b24 = new_fcport->d_id.b24;
5547 			memcpy(fcport->node_name, new_fcport->node_name,
5548 			    WWN_SIZE);
5549 			fcport->scan_state = QLA_FCPORT_FOUND;
5550 			found++;
5551 			break;
5552 		}
5553 
5554 		if (!found) {
5555 			/* New device, add to fcports list. */
5556 			list_add_tail(&new_fcport->list, &vha->vp_fcports);
5557 
5558 			/* Allocate a new replacement fcport. */
5559 			fcport = new_fcport;
5560 
5561 			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5562 
5563 			new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5564 
5565 			if (new_fcport == NULL) {
5566 				ql_log(ql_log_warn, vha, 0xd031,
5567 				    "Failed to allocate memory for fcport.\n");
5568 				rval = QLA_MEMORY_ALLOC_FAILED;
5569 				goto err;
5570 			}
5571 			spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5572 			new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5573 		}
5574 
5575 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5576 
5577 		/* Base iIDMA settings on HBA port speed. */
5578 		fcport->fp_speed = ha->link_data_rate;
5579 
5580 		found_devs++;
5581 	}
5582 
5583 	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5584 		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5585 			break;
5586 
5587 		if (fcport->scan_state == QLA_FCPORT_SCAN) {
5588 			if ((qla_dual_mode_enabled(vha) ||
5589 			    qla_ini_mode_enabled(vha)) &&
5590 			    atomic_read(&fcport->state) == FCS_ONLINE) {
5591 				qla2x00_mark_device_lost(vha, fcport,
5592 					ql2xplogiabsentdevice);
5593 				if (fcport->loop_id != FC_NO_LOOP_ID &&
5594 				    (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5595 				    fcport->port_type != FCT_INITIATOR &&
5596 				    fcport->port_type != FCT_BROADCAST) {
5597 					ql_dbg(ql_dbg_disc, vha, 0x20f0,
5598 					    "%s %d %8phC post del sess\n",
5599 					    __func__, __LINE__,
5600 					    fcport->port_name);
5601 
5602 					qlt_schedule_sess_for_deletion(fcport);
5603 					continue;
5604 				}
5605 			}
5606 		}
5607 
5608 		if (fcport->scan_state == QLA_FCPORT_FOUND)
5609 			qla24xx_fcport_handle_login(vha, fcport);
5610 	}
5611 
5612 	qla2x00_free_fcport(new_fcport);
5613 
5614 	return rval;
5615 
5616 err:
5617 	ql_dbg(ql_dbg_disc, vha, 0x2098,
5618 	       "Configure local loop error exit: rval=%x.\n", rval);
5619 	return rval;
5620 }
5621 
5622 static void
5623 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5624 {
5625 	int rval;
5626 	uint16_t mb[MAILBOX_REGISTER_COUNT];
5627 	struct qla_hw_data *ha = vha->hw;
5628 
5629 	if (!IS_IIDMA_CAPABLE(ha))
5630 		return;
5631 
5632 	if (atomic_read(&fcport->state) != FCS_ONLINE)
5633 		return;
5634 
5635 	if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5636 	    fcport->fp_speed > ha->link_data_rate ||
5637 	    !ha->flags.gpsc_supported)
5638 		return;
5639 
5640 	rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5641 	    mb);
5642 	if (rval != QLA_SUCCESS) {
5643 		ql_dbg(ql_dbg_disc, vha, 0x2004,
5644 		    "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5645 		    fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5646 	} else {
5647 		ql_dbg(ql_dbg_disc, vha, 0x2005,
5648 		    "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5649 		    qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5650 		    fcport->fp_speed, fcport->port_name);
5651 	}
5652 }
5653 
5654 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5655 {
5656 	qla2x00_iidma_fcport(vha, fcport);
5657 	qla24xx_update_fcport_fcp_prio(vha, fcport);
5658 }
5659 
5660 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5661 {
5662 	struct qla_work_evt *e;
5663 
5664 	e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5665 	if (!e)
5666 		return QLA_FUNCTION_FAILED;
5667 
5668 	e->u.fcport.fcport = fcport;
5669 	return qla2x00_post_work(vha, e);
5670 }
5671 
5672 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5673 static void
5674 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5675 {
5676 	struct fc_rport_identifiers rport_ids;
5677 	struct fc_rport *rport;
5678 	unsigned long flags;
5679 
5680 	if (atomic_read(&fcport->state) == FCS_ONLINE)
5681 		return;
5682 
5683 	rport_ids.node_name = wwn_to_u64(fcport->node_name);
5684 	rport_ids.port_name = wwn_to_u64(fcport->port_name);
5685 	rport_ids.port_id = fcport->d_id.b.domain << 16 |
5686 	    fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5687 	rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5688 	fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5689 	if (!rport) {
5690 		ql_log(ql_log_warn, vha, 0x2006,
5691 		    "Unable to allocate fc remote port.\n");
5692 		return;
5693 	}
5694 
5695 	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5696 	*((fc_port_t **)rport->dd_data) = fcport;
5697 	spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5698 	fcport->dev_loss_tmo = rport->dev_loss_tmo;
5699 
5700 	rport->supported_classes = fcport->supported_classes;
5701 
5702 	rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5703 	if (fcport->port_type == FCT_INITIATOR)
5704 		rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
5705 	if (fcport->port_type == FCT_TARGET)
5706 		rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
5707 	if (fcport->port_type & FCT_NVME_INITIATOR)
5708 		rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
5709 	if (fcport->port_type & FCT_NVME_TARGET)
5710 		rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
5711 	if (fcport->port_type & FCT_NVME_DISCOVERY)
5712 		rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
5713 
5714 	fc_remote_port_rolechg(rport, rport_ids.roles);
5715 
5716 	ql_dbg(ql_dbg_disc, vha, 0x20ee,
5717 	    "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n",
5718 	    __func__, fcport->port_name, vha->host_no,
5719 	    rport->scsi_target_id, rport,
5720 	    (fcport->port_type == FCT_TARGET) ? "tgt" :
5721 	    ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
5722 }
5723 
5724 /*
5725  * qla2x00_update_fcport
5726  *	Updates device on list.
5727  *
5728  * Input:
5729  *	ha = adapter block pointer.
5730  *	fcport = port structure pointer.
5731  *
5732  * Return:
5733  *	0  - Success
5734  *  BIT_0 - error
5735  *
5736  * Context:
5737  *	Kernel context.
5738  */
5739 void
5740 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5741 {
5742 	if (IS_SW_RESV_ADDR(fcport->d_id))
5743 		return;
5744 
5745 	ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5746 	    __func__, fcport->port_name);
5747 
5748 	qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5749 	fcport->login_retry = vha->hw->login_retry_count;
5750 	fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5751 	fcport->deleted = 0;
5752 	if (vha->hw->current_topology == ISP_CFG_NL)
5753 		fcport->logout_on_delete = 0;
5754 	else
5755 		fcport->logout_on_delete = 1;
5756 	fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5757 
5758 	if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) {
5759 		fcport->tgt_short_link_down_cnt++;
5760 		fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
5761 	}
5762 
5763 	switch (vha->hw->current_topology) {
5764 	case ISP_CFG_N:
5765 	case ISP_CFG_NL:
5766 		fcport->keep_nport_handle = 1;
5767 		break;
5768 	default:
5769 		break;
5770 	}
5771 
5772 	qla2x00_iidma_fcport(vha, fcport);
5773 
5774 	qla2x00_dfs_create_rport(vha, fcport);
5775 
5776 	if (NVME_TARGET(vha->hw, fcport)) {
5777 		qla_nvme_register_remote(vha, fcport);
5778 		qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5779 		qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5780 		return;
5781 	}
5782 
5783 	qla24xx_update_fcport_fcp_prio(vha, fcport);
5784 
5785 	switch (vha->host->active_mode) {
5786 	case MODE_INITIATOR:
5787 		qla2x00_reg_remote_port(vha, fcport);
5788 		break;
5789 	case MODE_TARGET:
5790 		if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5791 			!vha->vha_tgt.qla_tgt->tgt_stopped)
5792 			qlt_fc_port_added(vha, fcport);
5793 		break;
5794 	case MODE_DUAL:
5795 		qla2x00_reg_remote_port(vha, fcport);
5796 		if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5797 			!vha->vha_tgt.qla_tgt->tgt_stopped)
5798 			qlt_fc_port_added(vha, fcport);
5799 		break;
5800 	default:
5801 		break;
5802 	}
5803 
5804 	qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5805 
5806 	if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5807 		if (fcport->id_changed) {
5808 			fcport->id_changed = 0;
5809 			ql_dbg(ql_dbg_disc, vha, 0x20d7,
5810 			    "%s %d %8phC post gfpnid fcp_cnt %d\n",
5811 			    __func__, __LINE__, fcport->port_name,
5812 			    vha->fcport_count);
5813 			qla24xx_post_gfpnid_work(vha, fcport);
5814 		} else {
5815 			ql_dbg(ql_dbg_disc, vha, 0x20d7,
5816 			    "%s %d %8phC post gpsc fcp_cnt %d\n",
5817 			    __func__, __LINE__, fcport->port_name,
5818 			    vha->fcport_count);
5819 			qla24xx_post_gpsc_work(vha, fcport);
5820 		}
5821 	}
5822 
5823 	qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5824 }
5825 
5826 void qla_register_fcport_fn(struct work_struct *work)
5827 {
5828 	fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5829 	u32 rscn_gen = fcport->rscn_gen;
5830 	u16 data[2];
5831 
5832 	if (IS_SW_RESV_ADDR(fcport->d_id))
5833 		return;
5834 
5835 	qla2x00_update_fcport(fcport->vha, fcport);
5836 
5837 	if (rscn_gen != fcport->rscn_gen) {
5838 		/* RSCN(s) came in while registration */
5839 		switch (fcport->next_disc_state) {
5840 		case DSC_DELETE_PEND:
5841 			qlt_schedule_sess_for_deletion(fcport);
5842 			break;
5843 		case DSC_ADISC:
5844 			data[0] = data[1] = 0;
5845 			qla2x00_post_async_adisc_work(fcport->vha, fcport,
5846 			    data);
5847 			break;
5848 		default:
5849 			break;
5850 		}
5851 	}
5852 }
5853 
5854 /*
5855  * qla2x00_configure_fabric
5856  *      Setup SNS devices with loop ID's.
5857  *
5858  * Input:
5859  *      ha = adapter block pointer.
5860  *
5861  * Returns:
5862  *      0 = success.
5863  *      BIT_0 = error
5864  */
5865 static int
5866 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5867 {
5868 	int	rval;
5869 	fc_port_t	*fcport;
5870 	uint16_t	mb[MAILBOX_REGISTER_COUNT];
5871 	uint16_t	loop_id;
5872 	LIST_HEAD(new_fcports);
5873 	struct qla_hw_data *ha = vha->hw;
5874 	int		discovery_gen;
5875 
5876 	/* If FL port exists, then SNS is present */
5877 	if (IS_FWI2_CAPABLE(ha))
5878 		loop_id = NPH_F_PORT;
5879 	else
5880 		loop_id = SNS_FL_PORT;
5881 	rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5882 	if (rval != QLA_SUCCESS) {
5883 		ql_dbg(ql_dbg_disc, vha, 0x20a0,
5884 		    "MBX_GET_PORT_NAME failed, No FL Port.\n");
5885 
5886 		vha->device_flags &= ~SWITCH_FOUND;
5887 		return (QLA_SUCCESS);
5888 	}
5889 	vha->device_flags |= SWITCH_FOUND;
5890 
5891 	rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
5892 	if (rval != QLA_SUCCESS)
5893 		ql_dbg(ql_dbg_disc, vha, 0x20ff,
5894 		    "Failed to get Fabric Port Name\n");
5895 
5896 	if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5897 		rval = qla2x00_send_change_request(vha, 0x3, 0);
5898 		if (rval != QLA_SUCCESS)
5899 			ql_log(ql_log_warn, vha, 0x121,
5900 			    "Failed to enable receiving of RSCN requests: 0x%x.\n",
5901 			    rval);
5902 	}
5903 
5904 	do {
5905 		qla2x00_mgmt_svr_login(vha);
5906 
5907 		/* Ensure we are logged into the SNS. */
5908 		loop_id = NPH_SNS_LID(ha);
5909 		rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5910 		    0xfc, mb, BIT_1|BIT_0);
5911 		if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5912 			ql_dbg(ql_dbg_disc, vha, 0x20a1,
5913 			    "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5914 			    loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5915 			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5916 			return rval;
5917 		}
5918 
5919 		/* FDMI support. */
5920 		if (ql2xfdmienable &&
5921 		    test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5922 			qla2x00_fdmi_register(vha);
5923 
5924 		if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5925 			if (qla2x00_rft_id(vha)) {
5926 				/* EMPTY */
5927 				ql_dbg(ql_dbg_disc, vha, 0x20a2,
5928 				    "Register FC-4 TYPE failed.\n");
5929 				if (test_bit(LOOP_RESYNC_NEEDED,
5930 				    &vha->dpc_flags))
5931 					break;
5932 			}
5933 			if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5934 				/* EMPTY */
5935 				ql_dbg(ql_dbg_disc, vha, 0x209a,
5936 				    "Register FC-4 Features failed.\n");
5937 				if (test_bit(LOOP_RESYNC_NEEDED,
5938 				    &vha->dpc_flags))
5939 					break;
5940 			}
5941 			if (vha->flags.nvme_enabled) {
5942 				if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5943 					ql_dbg(ql_dbg_disc, vha, 0x2049,
5944 					    "Register NVME FC Type Features failed.\n");
5945 				}
5946 			}
5947 			if (qla2x00_rnn_id(vha)) {
5948 				/* EMPTY */
5949 				ql_dbg(ql_dbg_disc, vha, 0x2104,
5950 				    "Register Node Name failed.\n");
5951 				if (test_bit(LOOP_RESYNC_NEEDED,
5952 				    &vha->dpc_flags))
5953 					break;
5954 			} else if (qla2x00_rsnn_nn(vha)) {
5955 				/* EMPTY */
5956 				ql_dbg(ql_dbg_disc, vha, 0x209b,
5957 				    "Register Symbolic Node Name failed.\n");
5958 				if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5959 					break;
5960 			}
5961 		}
5962 
5963 
5964 		/* Mark the time right before querying FW for connected ports.
5965 		 * This process is long, asynchronous and by the time it's done,
5966 		 * collected information might not be accurate anymore. E.g.
5967 		 * disconnected port might have re-connected and a brand new
5968 		 * session has been created. In this case session's generation
5969 		 * will be newer than discovery_gen. */
5970 		qlt_do_generation_tick(vha, &discovery_gen);
5971 
5972 		if (USE_ASYNC_SCAN(ha)) {
5973 			rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5974 			    NULL);
5975 			if (rval)
5976 				set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5977 		} else  {
5978 			list_for_each_entry(fcport, &vha->vp_fcports, list)
5979 				fcport->scan_state = QLA_FCPORT_SCAN;
5980 
5981 			rval = qla2x00_find_all_fabric_devs(vha);
5982 		}
5983 		if (rval != QLA_SUCCESS)
5984 			break;
5985 	} while (0);
5986 
5987 	if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5988 		qla_nvme_register_hba(vha);
5989 
5990 	if (rval)
5991 		ql_dbg(ql_dbg_disc, vha, 0x2068,
5992 		    "Configure fabric error exit rval=%d.\n", rval);
5993 
5994 	return (rval);
5995 }
5996 
5997 /*
5998  * qla2x00_find_all_fabric_devs
5999  *
6000  * Input:
6001  *	ha = adapter block pointer.
6002  *	dev = database device entry pointer.
6003  *
6004  * Returns:
6005  *	0 = success.
6006  *
6007  * Context:
6008  *	Kernel context.
6009  */
6010 static int
6011 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
6012 {
6013 	int		rval;
6014 	uint16_t	loop_id;
6015 	fc_port_t	*fcport, *new_fcport;
6016 	int		found;
6017 
6018 	sw_info_t	*swl;
6019 	int		swl_idx;
6020 	int		first_dev, last_dev;
6021 	port_id_t	wrap = {}, nxt_d_id;
6022 	struct qla_hw_data *ha = vha->hw;
6023 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6024 	unsigned long flags;
6025 
6026 	rval = QLA_SUCCESS;
6027 
6028 	/* Try GID_PT to get device list, else GAN. */
6029 	if (!ha->swl)
6030 		ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
6031 		    GFP_KERNEL);
6032 	swl = ha->swl;
6033 	if (!swl) {
6034 		/*EMPTY*/
6035 		ql_dbg(ql_dbg_disc, vha, 0x209c,
6036 		    "GID_PT allocations failed, fallback on GA_NXT.\n");
6037 	} else {
6038 		memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
6039 		if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
6040 			swl = NULL;
6041 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6042 				return rval;
6043 		} else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
6044 			swl = NULL;
6045 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6046 				return rval;
6047 		} else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
6048 			swl = NULL;
6049 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6050 				return rval;
6051 		} else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
6052 			swl = NULL;
6053 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6054 				return rval;
6055 		}
6056 
6057 		/* If other queries succeeded probe for FC-4 type */
6058 		if (swl) {
6059 			qla2x00_gff_id(vha, swl);
6060 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6061 				return rval;
6062 		}
6063 	}
6064 	swl_idx = 0;
6065 
6066 	/* Allocate temporary fcport for any new fcports discovered. */
6067 	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6068 	if (new_fcport == NULL) {
6069 		ql_log(ql_log_warn, vha, 0x209d,
6070 		    "Failed to allocate memory for fcport.\n");
6071 		return (QLA_MEMORY_ALLOC_FAILED);
6072 	}
6073 	new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6074 	/* Set start port ID scan at adapter ID. */
6075 	first_dev = 1;
6076 	last_dev = 0;
6077 
6078 	/* Starting free loop ID. */
6079 	loop_id = ha->min_external_loopid;
6080 	for (; loop_id <= ha->max_loop_id; loop_id++) {
6081 		if (qla2x00_is_reserved_id(vha, loop_id))
6082 			continue;
6083 
6084 		if (ha->current_topology == ISP_CFG_FL &&
6085 		    (atomic_read(&vha->loop_down_timer) ||
6086 		     LOOP_TRANSITION(vha))) {
6087 			atomic_set(&vha->loop_down_timer, 0);
6088 			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6089 			set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
6090 			break;
6091 		}
6092 
6093 		if (swl != NULL) {
6094 			if (last_dev) {
6095 				wrap.b24 = new_fcport->d_id.b24;
6096 			} else {
6097 				new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
6098 				memcpy(new_fcport->node_name,
6099 				    swl[swl_idx].node_name, WWN_SIZE);
6100 				memcpy(new_fcport->port_name,
6101 				    swl[swl_idx].port_name, WWN_SIZE);
6102 				memcpy(new_fcport->fabric_port_name,
6103 				    swl[swl_idx].fabric_port_name, WWN_SIZE);
6104 				new_fcport->fp_speed = swl[swl_idx].fp_speed;
6105 				new_fcport->fc4_type = swl[swl_idx].fc4_type;
6106 
6107 				new_fcport->nvme_flag = 0;
6108 				if (vha->flags.nvme_enabled &&
6109 				    swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
6110 					ql_log(ql_log_info, vha, 0x2131,
6111 					    "FOUND: NVME port %8phC as FC Type 28h\n",
6112 					    new_fcport->port_name);
6113 				}
6114 
6115 				if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
6116 					last_dev = 1;
6117 				}
6118 				swl_idx++;
6119 			}
6120 		} else {
6121 			/* Send GA_NXT to the switch */
6122 			rval = qla2x00_ga_nxt(vha, new_fcport);
6123 			if (rval != QLA_SUCCESS) {
6124 				ql_log(ql_log_warn, vha, 0x209e,
6125 				    "SNS scan failed -- assuming "
6126 				    "zero-entry result.\n");
6127 				rval = QLA_SUCCESS;
6128 				break;
6129 			}
6130 		}
6131 
6132 		/* If wrap on switch device list, exit. */
6133 		if (first_dev) {
6134 			wrap.b24 = new_fcport->d_id.b24;
6135 			first_dev = 0;
6136 		} else if (new_fcport->d_id.b24 == wrap.b24) {
6137 			ql_dbg(ql_dbg_disc, vha, 0x209f,
6138 			    "Device wrap (%02x%02x%02x).\n",
6139 			    new_fcport->d_id.b.domain,
6140 			    new_fcport->d_id.b.area,
6141 			    new_fcport->d_id.b.al_pa);
6142 			break;
6143 		}
6144 
6145 		/* Bypass if same physical adapter. */
6146 		if (new_fcport->d_id.b24 == base_vha->d_id.b24)
6147 			continue;
6148 
6149 		/* Bypass virtual ports of the same host. */
6150 		if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
6151 			continue;
6152 
6153 		/* Bypass if same domain and area of adapter. */
6154 		if (((new_fcport->d_id.b24 & 0xffff00) ==
6155 		    (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
6156 			ISP_CFG_FL)
6157 			    continue;
6158 
6159 		/* Bypass reserved domain fields. */
6160 		if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
6161 			continue;
6162 
6163 		/* Bypass ports whose FCP-4 type is not FCP_SCSI */
6164 		if (ql2xgffidenable &&
6165 		    (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
6166 		    new_fcport->fc4_type != 0))
6167 			continue;
6168 
6169 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6170 
6171 		/* Locate matching device in database. */
6172 		found = 0;
6173 		list_for_each_entry(fcport, &vha->vp_fcports, list) {
6174 			if (memcmp(new_fcport->port_name, fcport->port_name,
6175 			    WWN_SIZE))
6176 				continue;
6177 
6178 			fcport->scan_state = QLA_FCPORT_FOUND;
6179 
6180 			found++;
6181 
6182 			/* Update port state. */
6183 			memcpy(fcport->fabric_port_name,
6184 			    new_fcport->fabric_port_name, WWN_SIZE);
6185 			fcport->fp_speed = new_fcport->fp_speed;
6186 
6187 			/*
6188 			 * If address the same and state FCS_ONLINE
6189 			 * (or in target mode), nothing changed.
6190 			 */
6191 			if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
6192 			    (atomic_read(&fcport->state) == FCS_ONLINE ||
6193 			     (vha->host->active_mode == MODE_TARGET))) {
6194 				break;
6195 			}
6196 
6197 			if (fcport->login_retry == 0)
6198 				fcport->login_retry =
6199 					vha->hw->login_retry_count;
6200 			/*
6201 			 * If device was not a fabric device before.
6202 			 */
6203 			if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
6204 				fcport->d_id.b24 = new_fcport->d_id.b24;
6205 				qla2x00_clear_loop_id(fcport);
6206 				fcport->flags |= (FCF_FABRIC_DEVICE |
6207 				    FCF_LOGIN_NEEDED);
6208 				break;
6209 			}
6210 
6211 			/*
6212 			 * Port ID changed or device was marked to be updated;
6213 			 * Log it out if still logged in and mark it for
6214 			 * relogin later.
6215 			 */
6216 			if (qla_tgt_mode_enabled(base_vha)) {
6217 				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
6218 					 "port changed FC ID, %8phC"
6219 					 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
6220 					 fcport->port_name,
6221 					 fcport->d_id.b.domain,
6222 					 fcport->d_id.b.area,
6223 					 fcport->d_id.b.al_pa,
6224 					 fcport->loop_id,
6225 					 new_fcport->d_id.b.domain,
6226 					 new_fcport->d_id.b.area,
6227 					 new_fcport->d_id.b.al_pa);
6228 				fcport->d_id.b24 = new_fcport->d_id.b24;
6229 				break;
6230 			}
6231 
6232 			fcport->d_id.b24 = new_fcport->d_id.b24;
6233 			fcport->flags |= FCF_LOGIN_NEEDED;
6234 			break;
6235 		}
6236 
6237 		if (found && NVME_TARGET(vha->hw, fcport)) {
6238 			if (fcport->disc_state == DSC_DELETE_PEND) {
6239 				qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
6240 				vha->fcport_count--;
6241 				fcport->login_succ = 0;
6242 			}
6243 		}
6244 
6245 		if (found) {
6246 			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6247 			continue;
6248 		}
6249 		/* If device was not in our fcports list, then add it. */
6250 		new_fcport->scan_state = QLA_FCPORT_FOUND;
6251 		list_add_tail(&new_fcport->list, &vha->vp_fcports);
6252 
6253 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6254 
6255 
6256 		/* Allocate a new replacement fcport. */
6257 		nxt_d_id.b24 = new_fcport->d_id.b24;
6258 		new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6259 		if (new_fcport == NULL) {
6260 			ql_log(ql_log_warn, vha, 0xd032,
6261 			    "Memory allocation failed for fcport.\n");
6262 			return (QLA_MEMORY_ALLOC_FAILED);
6263 		}
6264 		new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6265 		new_fcport->d_id.b24 = nxt_d_id.b24;
6266 	}
6267 
6268 	qla2x00_free_fcport(new_fcport);
6269 
6270 	/*
6271 	 * Logout all previous fabric dev marked lost, except FCP2 devices.
6272 	 */
6273 	list_for_each_entry(fcport, &vha->vp_fcports, list) {
6274 		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6275 			break;
6276 
6277 		if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
6278 			continue;
6279 
6280 		if (fcport->scan_state == QLA_FCPORT_SCAN) {
6281 			if ((qla_dual_mode_enabled(vha) ||
6282 			    qla_ini_mode_enabled(vha)) &&
6283 			    atomic_read(&fcport->state) == FCS_ONLINE) {
6284 				qla2x00_mark_device_lost(vha, fcport,
6285 					ql2xplogiabsentdevice);
6286 				if (fcport->loop_id != FC_NO_LOOP_ID &&
6287 				    (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6288 				    fcport->port_type != FCT_INITIATOR &&
6289 				    fcport->port_type != FCT_BROADCAST) {
6290 					ql_dbg(ql_dbg_disc, vha, 0x20f0,
6291 					    "%s %d %8phC post del sess\n",
6292 					    __func__, __LINE__,
6293 					    fcport->port_name);
6294 					qlt_schedule_sess_for_deletion(fcport);
6295 					continue;
6296 				}
6297 			}
6298 		}
6299 
6300 		if (fcport->scan_state == QLA_FCPORT_FOUND &&
6301 		    (fcport->flags & FCF_LOGIN_NEEDED) != 0)
6302 			qla24xx_fcport_handle_login(vha, fcport);
6303 	}
6304 	return (rval);
6305 }
6306 
6307 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6308 int
6309 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6310 {
6311 	int loop_id = FC_NO_LOOP_ID;
6312 	int lid = NPH_MGMT_SERVER - vha->vp_idx;
6313 	unsigned long flags;
6314 	struct qla_hw_data *ha = vha->hw;
6315 
6316 	if (vha->vp_idx == 0) {
6317 		set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
6318 		return NPH_MGMT_SERVER;
6319 	}
6320 
6321 	/* pick id from high and work down to low */
6322 	spin_lock_irqsave(&ha->vport_slock, flags);
6323 	for (; lid > 0; lid--) {
6324 		if (!test_bit(lid, vha->hw->loop_id_map)) {
6325 			set_bit(lid, vha->hw->loop_id_map);
6326 			loop_id = lid;
6327 			break;
6328 		}
6329 	}
6330 	spin_unlock_irqrestore(&ha->vport_slock, flags);
6331 
6332 	return loop_id;
6333 }
6334 
6335 /*
6336  * qla2x00_fabric_login
6337  *	Issue fabric login command.
6338  *
6339  * Input:
6340  *	ha = adapter block pointer.
6341  *	device = pointer to FC device type structure.
6342  *
6343  * Returns:
6344  *      0 - Login successfully
6345  *      1 - Login failed
6346  *      2 - Initiator device
6347  *      3 - Fatal error
6348  */
6349 int
6350 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6351     uint16_t *next_loopid)
6352 {
6353 	int	rval;
6354 	int	retry;
6355 	uint16_t tmp_loopid;
6356 	uint16_t mb[MAILBOX_REGISTER_COUNT];
6357 	struct qla_hw_data *ha = vha->hw;
6358 
6359 	retry = 0;
6360 	tmp_loopid = 0;
6361 
6362 	for (;;) {
6363 		ql_dbg(ql_dbg_disc, vha, 0x2000,
6364 		    "Trying Fabric Login w/loop id 0x%04x for port "
6365 		    "%02x%02x%02x.\n",
6366 		    fcport->loop_id, fcport->d_id.b.domain,
6367 		    fcport->d_id.b.area, fcport->d_id.b.al_pa);
6368 
6369 		/* Login fcport on switch. */
6370 		rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6371 		    fcport->d_id.b.domain, fcport->d_id.b.area,
6372 		    fcport->d_id.b.al_pa, mb, BIT_0);
6373 		if (rval != QLA_SUCCESS) {
6374 			return rval;
6375 		}
6376 		if (mb[0] == MBS_PORT_ID_USED) {
6377 			/*
6378 			 * Device has another loop ID.  The firmware team
6379 			 * recommends the driver perform an implicit login with
6380 			 * the specified ID again. The ID we just used is save
6381 			 * here so we return with an ID that can be tried by
6382 			 * the next login.
6383 			 */
6384 			retry++;
6385 			tmp_loopid = fcport->loop_id;
6386 			fcport->loop_id = mb[1];
6387 
6388 			ql_dbg(ql_dbg_disc, vha, 0x2001,
6389 			    "Fabric Login: port in use - next loop "
6390 			    "id=0x%04x, port id= %02x%02x%02x.\n",
6391 			    fcport->loop_id, fcport->d_id.b.domain,
6392 			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
6393 
6394 		} else if (mb[0] == MBS_COMMAND_COMPLETE) {
6395 			/*
6396 			 * Login succeeded.
6397 			 */
6398 			if (retry) {
6399 				/* A retry occurred before. */
6400 				*next_loopid = tmp_loopid;
6401 			} else {
6402 				/*
6403 				 * No retry occurred before. Just increment the
6404 				 * ID value for next login.
6405 				 */
6406 				*next_loopid = (fcport->loop_id + 1);
6407 			}
6408 
6409 			if (mb[1] & BIT_0) {
6410 				fcport->port_type = FCT_INITIATOR;
6411 			} else {
6412 				fcport->port_type = FCT_TARGET;
6413 				if (mb[1] & BIT_1) {
6414 					fcport->flags |= FCF_FCP2_DEVICE;
6415 				}
6416 			}
6417 
6418 			if (mb[10] & BIT_0)
6419 				fcport->supported_classes |= FC_COS_CLASS2;
6420 			if (mb[10] & BIT_1)
6421 				fcport->supported_classes |= FC_COS_CLASS3;
6422 
6423 			if (IS_FWI2_CAPABLE(ha)) {
6424 				if (mb[10] & BIT_7)
6425 					fcport->flags |=
6426 					    FCF_CONF_COMP_SUPPORTED;
6427 			}
6428 
6429 			rval = QLA_SUCCESS;
6430 			break;
6431 		} else if (mb[0] == MBS_LOOP_ID_USED) {
6432 			/*
6433 			 * Loop ID already used, try next loop ID.
6434 			 */
6435 			fcport->loop_id++;
6436 			rval = qla2x00_find_new_loop_id(vha, fcport);
6437 			if (rval != QLA_SUCCESS) {
6438 				/* Ran out of loop IDs to use */
6439 				break;
6440 			}
6441 		} else if (mb[0] == MBS_COMMAND_ERROR) {
6442 			/*
6443 			 * Firmware possibly timed out during login. If NO
6444 			 * retries are left to do then the device is declared
6445 			 * dead.
6446 			 */
6447 			*next_loopid = fcport->loop_id;
6448 			ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6449 			    fcport->d_id.b.domain, fcport->d_id.b.area,
6450 			    fcport->d_id.b.al_pa);
6451 			qla2x00_mark_device_lost(vha, fcport, 1);
6452 
6453 			rval = 1;
6454 			break;
6455 		} else {
6456 			/*
6457 			 * unrecoverable / not handled error
6458 			 */
6459 			ql_dbg(ql_dbg_disc, vha, 0x2002,
6460 			    "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6461 			    "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6462 			    fcport->d_id.b.area, fcport->d_id.b.al_pa,
6463 			    fcport->loop_id, jiffies);
6464 
6465 			*next_loopid = fcport->loop_id;
6466 			ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6467 			    fcport->d_id.b.domain, fcport->d_id.b.area,
6468 			    fcport->d_id.b.al_pa);
6469 			qla2x00_clear_loop_id(fcport);
6470 			fcport->login_retry = 0;
6471 
6472 			rval = 3;
6473 			break;
6474 		}
6475 	}
6476 
6477 	return (rval);
6478 }
6479 
6480 /*
6481  * qla2x00_local_device_login
6482  *	Issue local device login command.
6483  *
6484  * Input:
6485  *	ha = adapter block pointer.
6486  *	loop_id = loop id of device to login to.
6487  *
6488  * Returns (Where's the #define!!!!):
6489  *      0 - Login successfully
6490  *      1 - Login failed
6491  *      3 - Fatal error
6492  */
6493 int
6494 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6495 {
6496 	int		rval;
6497 	uint16_t	mb[MAILBOX_REGISTER_COUNT];
6498 
6499 	memset(mb, 0, sizeof(mb));
6500 	rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6501 	if (rval == QLA_SUCCESS) {
6502 		/* Interrogate mailbox registers for any errors */
6503 		if (mb[0] == MBS_COMMAND_ERROR)
6504 			rval = 1;
6505 		else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6506 			/* device not in PCB table */
6507 			rval = 3;
6508 	}
6509 
6510 	return (rval);
6511 }
6512 
6513 /*
6514  *  qla2x00_loop_resync
6515  *      Resync with fibre channel devices.
6516  *
6517  * Input:
6518  *      ha = adapter block pointer.
6519  *
6520  * Returns:
6521  *      0 = success
6522  */
6523 int
6524 qla2x00_loop_resync(scsi_qla_host_t *vha)
6525 {
6526 	int rval = QLA_SUCCESS;
6527 	uint32_t wait_time;
6528 
6529 	clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6530 	if (vha->flags.online) {
6531 		if (!(rval = qla2x00_fw_ready(vha))) {
6532 			/* Wait at most MAX_TARGET RSCNs for a stable link. */
6533 			wait_time = 256;
6534 			do {
6535 				if (!IS_QLAFX00(vha->hw)) {
6536 					/*
6537 					 * Issue a marker after FW becomes
6538 					 * ready.
6539 					 */
6540 					qla2x00_marker(vha, vha->hw->base_qpair,
6541 					    0, 0, MK_SYNC_ALL);
6542 					vha->marker_needed = 0;
6543 				}
6544 
6545 				/* Remap devices on Loop. */
6546 				clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6547 
6548 				if (IS_QLAFX00(vha->hw))
6549 					qlafx00_configure_devices(vha);
6550 				else
6551 					qla2x00_configure_loop(vha);
6552 
6553 				wait_time--;
6554 			} while (!atomic_read(&vha->loop_down_timer) &&
6555 				!(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6556 				&& wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6557 				&vha->dpc_flags)));
6558 		}
6559 	}
6560 
6561 	if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6562 		return (QLA_FUNCTION_FAILED);
6563 
6564 	if (rval)
6565 		ql_dbg(ql_dbg_disc, vha, 0x206c,
6566 		    "%s *** FAILED ***.\n", __func__);
6567 
6568 	return (rval);
6569 }
6570 
6571 /*
6572 * qla2x00_perform_loop_resync
6573 * Description: This function will set the appropriate flags and call
6574 *              qla2x00_loop_resync. If successful loop will be resynced
6575 * Arguments : scsi_qla_host_t pointer
6576 * returm    : Success or Failure
6577 */
6578 
6579 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6580 {
6581 	int32_t rval = 0;
6582 
6583 	if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6584 		/*Configure the flags so that resync happens properly*/
6585 		atomic_set(&ha->loop_down_timer, 0);
6586 		if (!(ha->device_flags & DFLG_NO_CABLE)) {
6587 			atomic_set(&ha->loop_state, LOOP_UP);
6588 			set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6589 			set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6590 			set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6591 
6592 			rval = qla2x00_loop_resync(ha);
6593 		} else
6594 			atomic_set(&ha->loop_state, LOOP_DEAD);
6595 
6596 		clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6597 	}
6598 
6599 	return rval;
6600 }
6601 
6602 void
6603 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6604 {
6605 	fc_port_t *fcport;
6606 	struct scsi_qla_host *vha, *tvp;
6607 	struct qla_hw_data *ha = base_vha->hw;
6608 	unsigned long flags;
6609 
6610 	spin_lock_irqsave(&ha->vport_slock, flags);
6611 	/* Go with deferred removal of rport references. */
6612 	list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) {
6613 		atomic_inc(&vha->vref_count);
6614 		list_for_each_entry(fcport, &vha->vp_fcports, list) {
6615 			if (fcport->drport &&
6616 			    atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6617 				spin_unlock_irqrestore(&ha->vport_slock, flags);
6618 				qla2x00_rport_del(fcport);
6619 
6620 				spin_lock_irqsave(&ha->vport_slock, flags);
6621 			}
6622 		}
6623 		atomic_dec(&vha->vref_count);
6624 		wake_up(&vha->vref_waitq);
6625 	}
6626 	spin_unlock_irqrestore(&ha->vport_slock, flags);
6627 }
6628 
6629 /* Assumes idc_lock always held on entry */
6630 void
6631 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6632 {
6633 	struct qla_hw_data *ha = vha->hw;
6634 	uint32_t drv_presence, drv_presence_mask;
6635 	uint32_t dev_part_info1, dev_part_info2, class_type;
6636 	uint32_t class_type_mask = 0x3;
6637 	uint16_t fcoe_other_function = 0xffff, i;
6638 
6639 	if (IS_QLA8044(ha)) {
6640 		drv_presence = qla8044_rd_direct(vha,
6641 		    QLA8044_CRB_DRV_ACTIVE_INDEX);
6642 		dev_part_info1 = qla8044_rd_direct(vha,
6643 		    QLA8044_CRB_DEV_PART_INFO_INDEX);
6644 		dev_part_info2 = qla8044_rd_direct(vha,
6645 		    QLA8044_CRB_DEV_PART_INFO2);
6646 	} else {
6647 		qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6648 		qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6649 		qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6650 	}
6651 	for (i = 0; i < 8; i++) {
6652 		class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6653 		if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6654 		    (i != ha->portnum)) {
6655 			fcoe_other_function = i;
6656 			break;
6657 		}
6658 	}
6659 	if (fcoe_other_function == 0xffff) {
6660 		for (i = 0; i < 8; i++) {
6661 			class_type = ((dev_part_info2 >> (i * 4)) &
6662 			    class_type_mask);
6663 			if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6664 			    ((i + 8) != ha->portnum)) {
6665 				fcoe_other_function = i + 8;
6666 				break;
6667 			}
6668 		}
6669 	}
6670 	/*
6671 	 * Prepare drv-presence mask based on fcoe functions present.
6672 	 * However consider only valid physical fcoe function numbers (0-15).
6673 	 */
6674 	drv_presence_mask = ~((1 << (ha->portnum)) |
6675 			((fcoe_other_function == 0xffff) ?
6676 			 0 : (1 << (fcoe_other_function))));
6677 
6678 	/* We are the reset owner iff:
6679 	 *    - No other protocol drivers present.
6680 	 *    - This is the lowest among fcoe functions. */
6681 	if (!(drv_presence & drv_presence_mask) &&
6682 			(ha->portnum < fcoe_other_function)) {
6683 		ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6684 		    "This host is Reset owner.\n");
6685 		ha->flags.nic_core_reset_owner = 1;
6686 	}
6687 }
6688 
6689 static int
6690 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6691 {
6692 	int rval = QLA_SUCCESS;
6693 	struct qla_hw_data *ha = vha->hw;
6694 	uint32_t drv_ack;
6695 
6696 	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6697 	if (rval == QLA_SUCCESS) {
6698 		drv_ack |= (1 << ha->portnum);
6699 		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6700 	}
6701 
6702 	return rval;
6703 }
6704 
6705 static int
6706 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6707 {
6708 	int rval = QLA_SUCCESS;
6709 	struct qla_hw_data *ha = vha->hw;
6710 	uint32_t drv_ack;
6711 
6712 	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6713 	if (rval == QLA_SUCCESS) {
6714 		drv_ack &= ~(1 << ha->portnum);
6715 		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6716 	}
6717 
6718 	return rval;
6719 }
6720 
6721 static const char *
6722 qla83xx_dev_state_to_string(uint32_t dev_state)
6723 {
6724 	switch (dev_state) {
6725 	case QLA8XXX_DEV_COLD:
6726 		return "COLD/RE-INIT";
6727 	case QLA8XXX_DEV_INITIALIZING:
6728 		return "INITIALIZING";
6729 	case QLA8XXX_DEV_READY:
6730 		return "READY";
6731 	case QLA8XXX_DEV_NEED_RESET:
6732 		return "NEED RESET";
6733 	case QLA8XXX_DEV_NEED_QUIESCENT:
6734 		return "NEED QUIESCENT";
6735 	case QLA8XXX_DEV_FAILED:
6736 		return "FAILED";
6737 	case QLA8XXX_DEV_QUIESCENT:
6738 		return "QUIESCENT";
6739 	default:
6740 		return "Unknown";
6741 	}
6742 }
6743 
6744 /* Assumes idc-lock always held on entry */
6745 void
6746 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6747 {
6748 	struct qla_hw_data *ha = vha->hw;
6749 	uint32_t idc_audit_reg = 0, duration_secs = 0;
6750 
6751 	switch (audit_type) {
6752 	case IDC_AUDIT_TIMESTAMP:
6753 		ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6754 		idc_audit_reg = (ha->portnum) |
6755 		    (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6756 		qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6757 		break;
6758 
6759 	case IDC_AUDIT_COMPLETION:
6760 		duration_secs = ((jiffies_to_msecs(jiffies) -
6761 		    jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6762 		idc_audit_reg = (ha->portnum) |
6763 		    (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6764 		qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6765 		break;
6766 
6767 	default:
6768 		ql_log(ql_log_warn, vha, 0xb078,
6769 		    "Invalid audit type specified.\n");
6770 		break;
6771 	}
6772 }
6773 
6774 /* Assumes idc_lock always held on entry */
6775 static int
6776 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6777 {
6778 	struct qla_hw_data *ha = vha->hw;
6779 	uint32_t  idc_control, dev_state;
6780 
6781 	__qla83xx_get_idc_control(vha, &idc_control);
6782 	if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6783 		ql_log(ql_log_info, vha, 0xb080,
6784 		    "NIC Core reset has been disabled. idc-control=0x%x\n",
6785 		    idc_control);
6786 		return QLA_FUNCTION_FAILED;
6787 	}
6788 
6789 	/* Set NEED-RESET iff in READY state and we are the reset-owner */
6790 	qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6791 	if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6792 		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6793 		    QLA8XXX_DEV_NEED_RESET);
6794 		ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6795 		qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6796 	} else {
6797 		const char *state = qla83xx_dev_state_to_string(dev_state);
6798 
6799 		ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6800 
6801 		/* SV: XXX: Is timeout required here? */
6802 		/* Wait for IDC state change READY -> NEED_RESET */
6803 		while (dev_state == QLA8XXX_DEV_READY) {
6804 			qla83xx_idc_unlock(vha, 0);
6805 			msleep(200);
6806 			qla83xx_idc_lock(vha, 0);
6807 			qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6808 		}
6809 	}
6810 
6811 	/* Send IDC ack by writing to drv-ack register */
6812 	__qla83xx_set_drv_ack(vha);
6813 
6814 	return QLA_SUCCESS;
6815 }
6816 
6817 int
6818 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6819 {
6820 	return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6821 }
6822 
6823 int
6824 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6825 {
6826 	return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6827 }
6828 
6829 static int
6830 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6831 {
6832 	uint32_t drv_presence = 0;
6833 	struct qla_hw_data *ha = vha->hw;
6834 
6835 	qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6836 	if (drv_presence & (1 << ha->portnum))
6837 		return QLA_SUCCESS;
6838 	else
6839 		return QLA_TEST_FAILED;
6840 }
6841 
6842 int
6843 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6844 {
6845 	int rval = QLA_SUCCESS;
6846 	struct qla_hw_data *ha = vha->hw;
6847 
6848 	ql_dbg(ql_dbg_p3p, vha, 0xb058,
6849 	    "Entered  %s().\n", __func__);
6850 
6851 	if (vha->device_flags & DFLG_DEV_FAILED) {
6852 		ql_log(ql_log_warn, vha, 0xb059,
6853 		    "Device in unrecoverable FAILED state.\n");
6854 		return QLA_FUNCTION_FAILED;
6855 	}
6856 
6857 	qla83xx_idc_lock(vha, 0);
6858 
6859 	if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6860 		ql_log(ql_log_warn, vha, 0xb05a,
6861 		    "Function=0x%x has been removed from IDC participation.\n",
6862 		    ha->portnum);
6863 		rval = QLA_FUNCTION_FAILED;
6864 		goto exit;
6865 	}
6866 
6867 	qla83xx_reset_ownership(vha);
6868 
6869 	rval = qla83xx_initiating_reset(vha);
6870 
6871 	/*
6872 	 * Perform reset if we are the reset-owner,
6873 	 * else wait till IDC state changes to READY/FAILED.
6874 	 */
6875 	if (rval == QLA_SUCCESS) {
6876 		rval = qla83xx_idc_state_handler(vha);
6877 
6878 		if (rval == QLA_SUCCESS)
6879 			ha->flags.nic_core_hung = 0;
6880 		__qla83xx_clear_drv_ack(vha);
6881 	}
6882 
6883 exit:
6884 	qla83xx_idc_unlock(vha, 0);
6885 
6886 	ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6887 
6888 	return rval;
6889 }
6890 
6891 int
6892 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6893 {
6894 	struct qla_hw_data *ha = vha->hw;
6895 	int rval = QLA_FUNCTION_FAILED;
6896 
6897 	if (!IS_MCTP_CAPABLE(ha)) {
6898 		/* This message can be removed from the final version */
6899 		ql_log(ql_log_info, vha, 0x506d,
6900 		    "This board is not MCTP capable\n");
6901 		return rval;
6902 	}
6903 
6904 	if (!ha->mctp_dump) {
6905 		ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6906 		    MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6907 
6908 		if (!ha->mctp_dump) {
6909 			ql_log(ql_log_warn, vha, 0x506e,
6910 			    "Failed to allocate memory for mctp dump\n");
6911 			return rval;
6912 		}
6913 	}
6914 
6915 #define MCTP_DUMP_STR_ADDR	0x00000000
6916 	rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6917 	    MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6918 	if (rval != QLA_SUCCESS) {
6919 		ql_log(ql_log_warn, vha, 0x506f,
6920 		    "Failed to capture mctp dump\n");
6921 	} else {
6922 		ql_log(ql_log_info, vha, 0x5070,
6923 		    "Mctp dump capture for host (%ld/%p).\n",
6924 		    vha->host_no, ha->mctp_dump);
6925 		ha->mctp_dumped = 1;
6926 	}
6927 
6928 	if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6929 		ha->flags.nic_core_reset_hdlr_active = 1;
6930 		rval = qla83xx_restart_nic_firmware(vha);
6931 		if (rval)
6932 			/* NIC Core reset failed. */
6933 			ql_log(ql_log_warn, vha, 0x5071,
6934 			    "Failed to restart nic firmware\n");
6935 		else
6936 			ql_dbg(ql_dbg_p3p, vha, 0xb084,
6937 			    "Restarted NIC firmware successfully.\n");
6938 		ha->flags.nic_core_reset_hdlr_active = 0;
6939 	}
6940 
6941 	return rval;
6942 
6943 }
6944 
6945 /*
6946 * qla2x00_quiesce_io
6947 * Description: This function will block the new I/Os
6948 *              Its not aborting any I/Os as context
6949 *              is not destroyed during quiescence
6950 * Arguments: scsi_qla_host_t
6951 * return   : void
6952 */
6953 void
6954 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6955 {
6956 	struct qla_hw_data *ha = vha->hw;
6957 	struct scsi_qla_host *vp, *tvp;
6958 	unsigned long flags;
6959 
6960 	ql_dbg(ql_dbg_dpc, vha, 0x401d,
6961 	    "Quiescing I/O - ha=%p.\n", ha);
6962 
6963 	atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6964 	if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6965 		atomic_set(&vha->loop_state, LOOP_DOWN);
6966 		qla2x00_mark_all_devices_lost(vha);
6967 
6968 		spin_lock_irqsave(&ha->vport_slock, flags);
6969 		list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
6970 			atomic_inc(&vp->vref_count);
6971 			spin_unlock_irqrestore(&ha->vport_slock, flags);
6972 
6973 			qla2x00_mark_all_devices_lost(vp);
6974 
6975 			spin_lock_irqsave(&ha->vport_slock, flags);
6976 			atomic_dec(&vp->vref_count);
6977 		}
6978 		spin_unlock_irqrestore(&ha->vport_slock, flags);
6979 	} else {
6980 		if (!atomic_read(&vha->loop_down_timer))
6981 			atomic_set(&vha->loop_down_timer,
6982 					LOOP_DOWN_TIME);
6983 	}
6984 	/* Wait for pending cmds to complete */
6985 	WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
6986 		     != QLA_SUCCESS);
6987 }
6988 
6989 void
6990 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6991 {
6992 	struct qla_hw_data *ha = vha->hw;
6993 	struct scsi_qla_host *vp, *tvp;
6994 	unsigned long flags;
6995 	fc_port_t *fcport;
6996 	u16 i;
6997 
6998 	/* For ISP82XX, driver waits for completion of the commands.
6999 	 * online flag should be set.
7000 	 */
7001 	if (!(IS_P3P_TYPE(ha)))
7002 		vha->flags.online = 0;
7003 	ha->flags.chip_reset_done = 0;
7004 	clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
7005 	vha->qla_stats.total_isp_aborts++;
7006 
7007 	ql_log(ql_log_info, vha, 0x00af,
7008 	    "Performing ISP error recovery - ha=%p.\n", ha);
7009 
7010 	ha->flags.purge_mbox = 1;
7011 	/* For ISP82XX, reset_chip is just disabling interrupts.
7012 	 * Driver waits for the completion of the commands.
7013 	 * the interrupts need to be enabled.
7014 	 */
7015 	if (!(IS_P3P_TYPE(ha)))
7016 		ha->isp_ops->reset_chip(vha);
7017 
7018 	ha->link_data_rate = PORT_SPEED_UNKNOWN;
7019 	SAVE_TOPO(ha);
7020 	ha->flags.rida_fmt2 = 0;
7021 	ha->flags.n2n_ae = 0;
7022 	ha->flags.lip_ae = 0;
7023 	ha->current_topology = 0;
7024 	QLA_FW_STOPPED(ha);
7025 	ha->flags.fw_init_done = 0;
7026 	ha->chip_reset++;
7027 	ha->base_qpair->chip_reset = ha->chip_reset;
7028 	ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0;
7029 	for (i = 0; i < ha->max_qpairs; i++) {
7030 		if (ha->queue_pair_map[i]) {
7031 			ha->queue_pair_map[i]->chip_reset =
7032 				ha->base_qpair->chip_reset;
7033 			ha->queue_pair_map[i]->cmd_cnt =
7034 			    ha->queue_pair_map[i]->cmd_completion_cnt = 0;
7035 		}
7036 	}
7037 
7038 	/* purge MBox commands */
7039 	if (atomic_read(&ha->num_pend_mbx_stage3)) {
7040 		clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
7041 		complete(&ha->mbx_intr_comp);
7042 	}
7043 
7044 	i = 0;
7045 	while (atomic_read(&ha->num_pend_mbx_stage3) ||
7046 	    atomic_read(&ha->num_pend_mbx_stage2) ||
7047 	    atomic_read(&ha->num_pend_mbx_stage1)) {
7048 		msleep(20);
7049 		i++;
7050 		if (i > 50)
7051 			break;
7052 	}
7053 	ha->flags.purge_mbox = 0;
7054 
7055 	atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
7056 	if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
7057 		atomic_set(&vha->loop_state, LOOP_DOWN);
7058 		qla2x00_mark_all_devices_lost(vha);
7059 
7060 		spin_lock_irqsave(&ha->vport_slock, flags);
7061 		list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7062 			atomic_inc(&vp->vref_count);
7063 			spin_unlock_irqrestore(&ha->vport_slock, flags);
7064 
7065 			qla2x00_mark_all_devices_lost(vp);
7066 
7067 			spin_lock_irqsave(&ha->vport_slock, flags);
7068 			atomic_dec(&vp->vref_count);
7069 		}
7070 		spin_unlock_irqrestore(&ha->vport_slock, flags);
7071 	} else {
7072 		if (!atomic_read(&vha->loop_down_timer))
7073 			atomic_set(&vha->loop_down_timer,
7074 			    LOOP_DOWN_TIME);
7075 	}
7076 
7077 	/* Clear all async request states across all VPs. */
7078 	list_for_each_entry(fcport, &vha->vp_fcports, list) {
7079 		fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7080 		fcport->scan_state = 0;
7081 	}
7082 	spin_lock_irqsave(&ha->vport_slock, flags);
7083 	list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7084 		atomic_inc(&vp->vref_count);
7085 		spin_unlock_irqrestore(&ha->vport_slock, flags);
7086 
7087 		list_for_each_entry(fcport, &vp->vp_fcports, list)
7088 			fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7089 
7090 		spin_lock_irqsave(&ha->vport_slock, flags);
7091 		atomic_dec(&vp->vref_count);
7092 	}
7093 	spin_unlock_irqrestore(&ha->vport_slock, flags);
7094 
7095 	/* Make sure for ISP 82XX IO DMA is complete */
7096 	if (IS_P3P_TYPE(ha)) {
7097 		qla82xx_chip_reset_cleanup(vha);
7098 		ql_log(ql_log_info, vha, 0x00b4,
7099 		       "Done chip reset cleanup.\n");
7100 
7101 		/* Done waiting for pending commands. Reset online flag */
7102 		vha->flags.online = 0;
7103 	}
7104 
7105 	/* Requeue all commands in outstanding command list. */
7106 	qla2x00_abort_all_cmds(vha, DID_RESET << 16);
7107 	/* memory barrier */
7108 	wmb();
7109 }
7110 
7111 /*
7112 *  qla2x00_abort_isp
7113 *      Resets ISP and aborts all outstanding commands.
7114 *
7115 * Input:
7116 *      ha           = adapter block pointer.
7117 *
7118 * Returns:
7119 *      0 = success
7120 */
7121 int
7122 qla2x00_abort_isp(scsi_qla_host_t *vha)
7123 {
7124 	int rval;
7125 	uint8_t        status = 0;
7126 	struct qla_hw_data *ha = vha->hw;
7127 	struct scsi_qla_host *vp, *tvp;
7128 	struct req_que *req = ha->req_q_map[0];
7129 	unsigned long flags;
7130 
7131 	if (vha->flags.online) {
7132 		qla2x00_abort_isp_cleanup(vha);
7133 
7134 		if (vha->hw->flags.port_isolated)
7135 			return status;
7136 
7137 		if (qla2x00_isp_reg_stat(ha)) {
7138 			ql_log(ql_log_info, vha, 0x803f,
7139 			       "ISP Abort - ISP reg disconnect, exiting.\n");
7140 			return status;
7141 		}
7142 
7143 		if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
7144 			ha->flags.chip_reset_done = 1;
7145 			vha->flags.online = 1;
7146 			status = 0;
7147 			clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7148 			return status;
7149 		}
7150 
7151 		if (IS_QLA8031(ha)) {
7152 			ql_dbg(ql_dbg_p3p, vha, 0xb05c,
7153 			    "Clearing fcoe driver presence.\n");
7154 			if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
7155 				ql_dbg(ql_dbg_p3p, vha, 0xb073,
7156 				    "Error while clearing DRV-Presence.\n");
7157 		}
7158 
7159 		if (unlikely(pci_channel_offline(ha->pdev) &&
7160 		    ha->flags.pci_channel_io_perm_failure)) {
7161 			clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7162 			status = 0;
7163 			return status;
7164 		}
7165 
7166 		switch (vha->qlini_mode) {
7167 		case QLA2XXX_INI_MODE_DISABLED:
7168 			if (!qla_tgt_mode_enabled(vha))
7169 				return 0;
7170 			break;
7171 		case QLA2XXX_INI_MODE_DUAL:
7172 			if (!qla_dual_mode_enabled(vha) &&
7173 			    !qla_ini_mode_enabled(vha))
7174 				return 0;
7175 			break;
7176 		case QLA2XXX_INI_MODE_ENABLED:
7177 		default:
7178 			break;
7179 		}
7180 
7181 		ha->isp_ops->get_flash_version(vha, req->ring);
7182 
7183 		if (qla2x00_isp_reg_stat(ha)) {
7184 			ql_log(ql_log_info, vha, 0x803f,
7185 			       "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n");
7186 			return status;
7187 		}
7188 		ha->isp_ops->nvram_config(vha);
7189 
7190 		if (qla2x00_isp_reg_stat(ha)) {
7191 			ql_log(ql_log_info, vha, 0x803f,
7192 			       "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n");
7193 			return status;
7194 		}
7195 		if (!qla2x00_restart_isp(vha)) {
7196 			clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7197 
7198 			if (!atomic_read(&vha->loop_down_timer)) {
7199 				/*
7200 				 * Issue marker command only when we are going
7201 				 * to start the I/O .
7202 				 */
7203 				vha->marker_needed = 1;
7204 			}
7205 
7206 			vha->flags.online = 1;
7207 
7208 			ha->isp_ops->enable_intrs(ha);
7209 
7210 			ha->isp_abort_cnt = 0;
7211 			clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7212 
7213 			if (IS_QLA81XX(ha) || IS_QLA8031(ha))
7214 				qla2x00_get_fw_version(vha);
7215 			if (ha->fce) {
7216 				ha->flags.fce_enabled = 1;
7217 				memset(ha->fce, 0,
7218 				    fce_calc_size(ha->fce_bufs));
7219 				rval = qla2x00_enable_fce_trace(vha,
7220 				    ha->fce_dma, ha->fce_bufs, ha->fce_mb,
7221 				    &ha->fce_bufs);
7222 				if (rval) {
7223 					ql_log(ql_log_warn, vha, 0x8033,
7224 					    "Unable to reinitialize FCE "
7225 					    "(%d).\n", rval);
7226 					ha->flags.fce_enabled = 0;
7227 				}
7228 			}
7229 
7230 			if (ha->eft) {
7231 				memset(ha->eft, 0, EFT_SIZE);
7232 				rval = qla2x00_enable_eft_trace(vha,
7233 				    ha->eft_dma, EFT_NUM_BUFFERS);
7234 				if (rval) {
7235 					ql_log(ql_log_warn, vha, 0x8034,
7236 					    "Unable to reinitialize EFT "
7237 					    "(%d).\n", rval);
7238 				}
7239 			}
7240 		} else {	/* failed the ISP abort */
7241 			vha->flags.online = 1;
7242 			if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
7243 				if (ha->isp_abort_cnt == 0) {
7244 					ql_log(ql_log_fatal, vha, 0x8035,
7245 					    "ISP error recover failed - "
7246 					    "board disabled.\n");
7247 					/*
7248 					 * The next call disables the board
7249 					 * completely.
7250 					 */
7251 					qla2x00_abort_isp_cleanup(vha);
7252 					vha->flags.online = 0;
7253 					clear_bit(ISP_ABORT_RETRY,
7254 					    &vha->dpc_flags);
7255 					status = 0;
7256 				} else { /* schedule another ISP abort */
7257 					ha->isp_abort_cnt--;
7258 					ql_dbg(ql_dbg_taskm, vha, 0x8020,
7259 					    "ISP abort - retry remaining %d.\n",
7260 					    ha->isp_abort_cnt);
7261 					status = 1;
7262 				}
7263 			} else {
7264 				ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7265 				ql_dbg(ql_dbg_taskm, vha, 0x8021,
7266 				    "ISP error recovery - retrying (%d) "
7267 				    "more times.\n", ha->isp_abort_cnt);
7268 				set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7269 				status = 1;
7270 			}
7271 		}
7272 
7273 	}
7274 
7275 	if (vha->hw->flags.port_isolated) {
7276 		qla2x00_abort_isp_cleanup(vha);
7277 		return status;
7278 	}
7279 
7280 	if (!status) {
7281 		ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
7282 		qla2x00_configure_hba(vha);
7283 		spin_lock_irqsave(&ha->vport_slock, flags);
7284 		list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7285 			if (vp->vp_idx) {
7286 				atomic_inc(&vp->vref_count);
7287 				spin_unlock_irqrestore(&ha->vport_slock, flags);
7288 
7289 				qla2x00_vp_abort_isp(vp);
7290 
7291 				spin_lock_irqsave(&ha->vport_slock, flags);
7292 				atomic_dec(&vp->vref_count);
7293 			}
7294 		}
7295 		spin_unlock_irqrestore(&ha->vport_slock, flags);
7296 
7297 		if (IS_QLA8031(ha)) {
7298 			ql_dbg(ql_dbg_p3p, vha, 0xb05d,
7299 			    "Setting back fcoe driver presence.\n");
7300 			if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
7301 				ql_dbg(ql_dbg_p3p, vha, 0xb074,
7302 				    "Error while setting DRV-Presence.\n");
7303 		}
7304 	} else {
7305 		ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
7306 		       __func__);
7307 	}
7308 
7309 	return(status);
7310 }
7311 
7312 /*
7313 *  qla2x00_restart_isp
7314 *      restarts the ISP after a reset
7315 *
7316 * Input:
7317 *      ha = adapter block pointer.
7318 *
7319 * Returns:
7320 *      0 = success
7321 */
7322 static int
7323 qla2x00_restart_isp(scsi_qla_host_t *vha)
7324 {
7325 	int status;
7326 	struct qla_hw_data *ha = vha->hw;
7327 
7328 	/* If firmware needs to be loaded */
7329 	if (qla2x00_isp_firmware(vha)) {
7330 		vha->flags.online = 0;
7331 		status = ha->isp_ops->chip_diag(vha);
7332 		if (status)
7333 			return status;
7334 		status = qla2x00_setup_chip(vha);
7335 		if (status)
7336 			return status;
7337 	}
7338 
7339 	status = qla2x00_init_rings(vha);
7340 	if (status)
7341 		return status;
7342 
7343 	clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7344 	ha->flags.chip_reset_done = 1;
7345 
7346 	/* Initialize the queues in use */
7347 	qla25xx_init_queues(ha);
7348 
7349 	status = qla2x00_fw_ready(vha);
7350 	if (status) {
7351 		/* if no cable then assume it's good */
7352 		return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
7353 	}
7354 
7355 	/* Issue a marker after FW becomes ready. */
7356 	qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7357 	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7358 
7359 	return 0;
7360 }
7361 
7362 static int
7363 qla25xx_init_queues(struct qla_hw_data *ha)
7364 {
7365 	struct rsp_que *rsp = NULL;
7366 	struct req_que *req = NULL;
7367 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7368 	int ret = -1;
7369 	int i;
7370 
7371 	for (i = 1; i < ha->max_rsp_queues; i++) {
7372 		rsp = ha->rsp_q_map[i];
7373 		if (rsp && test_bit(i, ha->rsp_qid_map)) {
7374 			rsp->options &= ~BIT_0;
7375 			ret = qla25xx_init_rsp_que(base_vha, rsp);
7376 			if (ret != QLA_SUCCESS)
7377 				ql_dbg(ql_dbg_init, base_vha, 0x00ff,
7378 				    "%s Rsp que: %d init failed.\n",
7379 				    __func__, rsp->id);
7380 			else
7381 				ql_dbg(ql_dbg_init, base_vha, 0x0100,
7382 				    "%s Rsp que: %d inited.\n",
7383 				    __func__, rsp->id);
7384 		}
7385 	}
7386 	for (i = 1; i < ha->max_req_queues; i++) {
7387 		req = ha->req_q_map[i];
7388 		if (req && test_bit(i, ha->req_qid_map)) {
7389 			/* Clear outstanding commands array. */
7390 			req->options &= ~BIT_0;
7391 			ret = qla25xx_init_req_que(base_vha, req);
7392 			if (ret != QLA_SUCCESS)
7393 				ql_dbg(ql_dbg_init, base_vha, 0x0101,
7394 				    "%s Req que: %d init failed.\n",
7395 				    __func__, req->id);
7396 			else
7397 				ql_dbg(ql_dbg_init, base_vha, 0x0102,
7398 				    "%s Req que: %d inited.\n",
7399 				    __func__, req->id);
7400 		}
7401 	}
7402 	return ret;
7403 }
7404 
7405 /*
7406 * qla2x00_reset_adapter
7407 *      Reset adapter.
7408 *
7409 * Input:
7410 *      ha = adapter block pointer.
7411 */
7412 int
7413 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7414 {
7415 	unsigned long flags = 0;
7416 	struct qla_hw_data *ha = vha->hw;
7417 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7418 
7419 	vha->flags.online = 0;
7420 	ha->isp_ops->disable_intrs(ha);
7421 
7422 	spin_lock_irqsave(&ha->hardware_lock, flags);
7423 	wrt_reg_word(&reg->hccr, HCCR_RESET_RISC);
7424 	rd_reg_word(&reg->hccr);			/* PCI Posting. */
7425 	wrt_reg_word(&reg->hccr, HCCR_RELEASE_RISC);
7426 	rd_reg_word(&reg->hccr);			/* PCI Posting. */
7427 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
7428 
7429 	return QLA_SUCCESS;
7430 }
7431 
7432 int
7433 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7434 {
7435 	unsigned long flags = 0;
7436 	struct qla_hw_data *ha = vha->hw;
7437 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7438 
7439 	if (IS_P3P_TYPE(ha))
7440 		return QLA_SUCCESS;
7441 
7442 	vha->flags.online = 0;
7443 	ha->isp_ops->disable_intrs(ha);
7444 
7445 	spin_lock_irqsave(&ha->hardware_lock, flags);
7446 	wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);
7447 	rd_reg_dword(&reg->hccr);
7448 	wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);
7449 	rd_reg_dword(&reg->hccr);
7450 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
7451 
7452 	if (IS_NOPOLLING_TYPE(ha))
7453 		ha->isp_ops->enable_intrs(ha);
7454 
7455 	return QLA_SUCCESS;
7456 }
7457 
7458 /* On sparc systems, obtain port and node WWN from firmware
7459  * properties.
7460  */
7461 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7462 	struct nvram_24xx *nv)
7463 {
7464 #ifdef CONFIG_SPARC
7465 	struct qla_hw_data *ha = vha->hw;
7466 	struct pci_dev *pdev = ha->pdev;
7467 	struct device_node *dp = pci_device_to_OF_node(pdev);
7468 	const u8 *val;
7469 	int len;
7470 
7471 	val = of_get_property(dp, "port-wwn", &len);
7472 	if (val && len >= WWN_SIZE)
7473 		memcpy(nv->port_name, val, WWN_SIZE);
7474 
7475 	val = of_get_property(dp, "node-wwn", &len);
7476 	if (val && len >= WWN_SIZE)
7477 		memcpy(nv->node_name, val, WWN_SIZE);
7478 #endif
7479 }
7480 
7481 int
7482 qla24xx_nvram_config(scsi_qla_host_t *vha)
7483 {
7484 	int   rval;
7485 	struct init_cb_24xx *icb;
7486 	struct nvram_24xx *nv;
7487 	__le32 *dptr;
7488 	uint8_t  *dptr1, *dptr2;
7489 	uint32_t chksum;
7490 	uint16_t cnt;
7491 	struct qla_hw_data *ha = vha->hw;
7492 
7493 	rval = QLA_SUCCESS;
7494 	icb = (struct init_cb_24xx *)ha->init_cb;
7495 	nv = ha->nvram;
7496 
7497 	/* Determine NVRAM starting address. */
7498 	if (ha->port_no == 0) {
7499 		ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7500 		ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7501 	} else {
7502 		ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7503 		ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7504 	}
7505 
7506 	ha->nvram_size = sizeof(*nv);
7507 	ha->vpd_size = FA_NVRAM_VPD_SIZE;
7508 
7509 	/* Get VPD data into cache */
7510 	ha->vpd = ha->nvram + VPD_OFFSET;
7511 	ha->isp_ops->read_nvram(vha, ha->vpd,
7512 	    ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7513 
7514 	/* Get NVRAM data into cache and calculate checksum. */
7515 	dptr = (__force __le32 *)nv;
7516 	ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7517 	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7518 		chksum += le32_to_cpu(*dptr);
7519 
7520 	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7521 	    "Contents of NVRAM\n");
7522 	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7523 	    nv, ha->nvram_size);
7524 
7525 	/* Bad NVRAM data, set defaults parameters. */
7526 	if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7527 	    le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7528 		/* Reset NVRAM data. */
7529 		ql_log(ql_log_warn, vha, 0x006b,
7530 		    "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7531 		    chksum, nv->id, nv->nvram_version);
7532 		ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7533 		ql_log(ql_log_warn, vha, 0x006c,
7534 		    "Falling back to functioning (yet invalid -- WWPN) "
7535 		    "defaults.\n");
7536 
7537 		/*
7538 		 * Set default initialization control block.
7539 		 */
7540 		memset(nv, 0, ha->nvram_size);
7541 		nv->nvram_version = cpu_to_le16(ICB_VERSION);
7542 		nv->version = cpu_to_le16(ICB_VERSION);
7543 		nv->frame_payload_size = cpu_to_le16(2048);
7544 		nv->execution_throttle = cpu_to_le16(0xFFFF);
7545 		nv->exchange_count = cpu_to_le16(0);
7546 		nv->hard_address = cpu_to_le16(124);
7547 		nv->port_name[0] = 0x21;
7548 		nv->port_name[1] = 0x00 + ha->port_no + 1;
7549 		nv->port_name[2] = 0x00;
7550 		nv->port_name[3] = 0xe0;
7551 		nv->port_name[4] = 0x8b;
7552 		nv->port_name[5] = 0x1c;
7553 		nv->port_name[6] = 0x55;
7554 		nv->port_name[7] = 0x86;
7555 		nv->node_name[0] = 0x20;
7556 		nv->node_name[1] = 0x00;
7557 		nv->node_name[2] = 0x00;
7558 		nv->node_name[3] = 0xe0;
7559 		nv->node_name[4] = 0x8b;
7560 		nv->node_name[5] = 0x1c;
7561 		nv->node_name[6] = 0x55;
7562 		nv->node_name[7] = 0x86;
7563 		qla24xx_nvram_wwn_from_ofw(vha, nv);
7564 		nv->login_retry_count = cpu_to_le16(8);
7565 		nv->interrupt_delay_timer = cpu_to_le16(0);
7566 		nv->login_timeout = cpu_to_le16(0);
7567 		nv->firmware_options_1 =
7568 		    cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7569 		nv->firmware_options_2 = cpu_to_le32(2 << 4);
7570 		nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7571 		nv->firmware_options_3 = cpu_to_le32(2 << 13);
7572 		nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7573 		nv->efi_parameters = cpu_to_le32(0);
7574 		nv->reset_delay = 5;
7575 		nv->max_luns_per_target = cpu_to_le16(128);
7576 		nv->port_down_retry_count = cpu_to_le16(30);
7577 		nv->link_down_timeout = cpu_to_le16(30);
7578 
7579 		rval = 1;
7580 	}
7581 
7582 	if (qla_tgt_mode_enabled(vha)) {
7583 		/* Don't enable full login after initial LIP */
7584 		nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7585 		/* Don't enable LIP full login for initiator */
7586 		nv->host_p &= cpu_to_le32(~BIT_10);
7587 	}
7588 
7589 	qlt_24xx_config_nvram_stage1(vha, nv);
7590 
7591 	/* Reset Initialization control block */
7592 	memset(icb, 0, ha->init_cb_size);
7593 
7594 	/* Copy 1st segment. */
7595 	dptr1 = (uint8_t *)icb;
7596 	dptr2 = (uint8_t *)&nv->version;
7597 	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7598 	while (cnt--)
7599 		*dptr1++ = *dptr2++;
7600 
7601 	icb->login_retry_count = nv->login_retry_count;
7602 	icb->link_down_on_nos = nv->link_down_on_nos;
7603 
7604 	/* Copy 2nd segment. */
7605 	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7606 	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7607 	cnt = (uint8_t *)&icb->reserved_3 -
7608 	    (uint8_t *)&icb->interrupt_delay_timer;
7609 	while (cnt--)
7610 		*dptr1++ = *dptr2++;
7611 	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7612 	/*
7613 	 * Setup driver NVRAM options.
7614 	 */
7615 	qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7616 	    "QLA2462");
7617 
7618 	qlt_24xx_config_nvram_stage2(vha, icb);
7619 
7620 	if (nv->host_p & cpu_to_le32(BIT_15)) {
7621 		/* Use alternate WWN? */
7622 		memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7623 		memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7624 	}
7625 
7626 	/* Prepare nodename */
7627 	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7628 		/*
7629 		 * Firmware will apply the following mask if the nodename was
7630 		 * not provided.
7631 		 */
7632 		memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7633 		icb->node_name[0] &= 0xF0;
7634 	}
7635 
7636 	/* Set host adapter parameters. */
7637 	ha->flags.disable_risc_code_load = 0;
7638 	ha->flags.enable_lip_reset = 0;
7639 	ha->flags.enable_lip_full_login =
7640 	    le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7641 	ha->flags.enable_target_reset =
7642 	    le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7643 	ha->flags.enable_led_scheme = 0;
7644 	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7645 
7646 	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7647 	    (BIT_6 | BIT_5 | BIT_4)) >> 4;
7648 
7649 	memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7650 	    sizeof(ha->fw_seriallink_options24));
7651 
7652 	/* save HBA serial number */
7653 	ha->serial0 = icb->port_name[5];
7654 	ha->serial1 = icb->port_name[6];
7655 	ha->serial2 = icb->port_name[7];
7656 	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7657 	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7658 
7659 	icb->execution_throttle = cpu_to_le16(0xFFFF);
7660 
7661 	ha->retry_count = le16_to_cpu(nv->login_retry_count);
7662 
7663 	/* Set minimum login_timeout to 4 seconds. */
7664 	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7665 		nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7666 	if (le16_to_cpu(nv->login_timeout) < 4)
7667 		nv->login_timeout = cpu_to_le16(4);
7668 	ha->login_timeout = le16_to_cpu(nv->login_timeout);
7669 
7670 	/* Set minimum RATOV to 100 tenths of a second. */
7671 	ha->r_a_tov = 100;
7672 
7673 	ha->loop_reset_delay = nv->reset_delay;
7674 
7675 	/* Link Down Timeout = 0:
7676 	 *
7677 	 * 	When Port Down timer expires we will start returning
7678 	 *	I/O's to OS with "DID_NO_CONNECT".
7679 	 *
7680 	 * Link Down Timeout != 0:
7681 	 *
7682 	 *	 The driver waits for the link to come up after link down
7683 	 *	 before returning I/Os to OS with "DID_NO_CONNECT".
7684 	 */
7685 	if (le16_to_cpu(nv->link_down_timeout) == 0) {
7686 		ha->loop_down_abort_time =
7687 		    (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7688 	} else {
7689 		ha->link_down_timeout =	le16_to_cpu(nv->link_down_timeout);
7690 		ha->loop_down_abort_time =
7691 		    (LOOP_DOWN_TIME - ha->link_down_timeout);
7692 	}
7693 
7694 	/* Need enough time to try and get the port back. */
7695 	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7696 	if (qlport_down_retry)
7697 		ha->port_down_retry_count = qlport_down_retry;
7698 
7699 	/* Set login_retry_count */
7700 	ha->login_retry_count  = le16_to_cpu(nv->login_retry_count);
7701 	if (ha->port_down_retry_count ==
7702 	    le16_to_cpu(nv->port_down_retry_count) &&
7703 	    ha->port_down_retry_count > 3)
7704 		ha->login_retry_count = ha->port_down_retry_count;
7705 	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7706 		ha->login_retry_count = ha->port_down_retry_count;
7707 	if (ql2xloginretrycount)
7708 		ha->login_retry_count = ql2xloginretrycount;
7709 
7710 	/* N2N: driver will initiate Login instead of FW */
7711 	icb->firmware_options_3 |= cpu_to_le32(BIT_8);
7712 
7713 	/* Enable ZIO. */
7714 	if (!vha->flags.init_done) {
7715 		ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7716 		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7717 		ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7718 		    le16_to_cpu(icb->interrupt_delay_timer) : 2;
7719 	}
7720 	icb->firmware_options_2 &= cpu_to_le32(
7721 	    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7722 	if (ha->zio_mode != QLA_ZIO_DISABLED) {
7723 		ha->zio_mode = QLA_ZIO_MODE_6;
7724 
7725 		ql_log(ql_log_info, vha, 0x006f,
7726 		    "ZIO mode %d enabled; timer delay (%d us).\n",
7727 		    ha->zio_mode, ha->zio_timer * 100);
7728 
7729 		icb->firmware_options_2 |= cpu_to_le32(
7730 		    (uint32_t)ha->zio_mode);
7731 		icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7732 	}
7733 
7734 	if (rval) {
7735 		ql_log(ql_log_warn, vha, 0x0070,
7736 		    "NVRAM configuration failed.\n");
7737 	}
7738 	return (rval);
7739 }
7740 
7741 static void
7742 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
7743     struct qla27xx_image_status *image_status)
7744 {
7745 	ql_dbg(ql_dbg_init, vha, 0x018b,
7746 	    "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
7747 	    name, "status",
7748 	    image_status->image_status_mask,
7749 	    le16_to_cpu(image_status->generation),
7750 	    image_status->ver_major,
7751 	    image_status->ver_minor,
7752 	    image_status->bitmap,
7753 	    le32_to_cpu(image_status->checksum),
7754 	    le32_to_cpu(image_status->signature));
7755 }
7756 
7757 static bool
7758 qla28xx_check_aux_image_status_signature(
7759     struct qla27xx_image_status *image_status)
7760 {
7761 	ulong signature = le32_to_cpu(image_status->signature);
7762 
7763 	return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
7764 }
7765 
7766 static bool
7767 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
7768 {
7769 	ulong signature = le32_to_cpu(image_status->signature);
7770 
7771 	return
7772 	    signature != QLA27XX_IMG_STATUS_SIGN &&
7773 	    signature != QLA28XX_IMG_STATUS_SIGN;
7774 }
7775 
7776 static ulong
7777 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
7778 {
7779 	__le32 *p = (__force __le32 *)image_status;
7780 	uint n = sizeof(*image_status) / sizeof(*p);
7781 	uint32_t sum = 0;
7782 
7783 	for ( ; n--; p++)
7784 		sum += le32_to_cpup(p);
7785 
7786 	return sum;
7787 }
7788 
7789 static inline uint
7790 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
7791 {
7792 	return aux->bitmap & bitmask ?
7793 	    QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
7794 }
7795 
7796 static void
7797 qla28xx_component_status(
7798     struct active_regions *active_regions, struct qla27xx_image_status *aux)
7799 {
7800 	active_regions->aux.board_config =
7801 	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
7802 
7803 	active_regions->aux.vpd_nvram =
7804 	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
7805 
7806 	active_regions->aux.npiv_config_0_1 =
7807 	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
7808 
7809 	active_regions->aux.npiv_config_2_3 =
7810 	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
7811 }
7812 
7813 static int
7814 qla27xx_compare_image_generation(
7815     struct qla27xx_image_status *pri_image_status,
7816     struct qla27xx_image_status *sec_image_status)
7817 {
7818 	/* calculate generation delta as uint16 (this accounts for wrap) */
7819 	int16_t delta =
7820 	    le16_to_cpu(pri_image_status->generation) -
7821 	    le16_to_cpu(sec_image_status->generation);
7822 
7823 	ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
7824 
7825 	return delta;
7826 }
7827 
7828 void
7829 qla28xx_get_aux_images(
7830 	struct scsi_qla_host *vha, struct active_regions *active_regions)
7831 {
7832 	struct qla_hw_data *ha = vha->hw;
7833 	struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
7834 	bool valid_pri_image = false, valid_sec_image = false;
7835 	bool active_pri_image = false, active_sec_image = false;
7836 
7837 	if (!ha->flt_region_aux_img_status_pri) {
7838 		ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
7839 		goto check_sec_image;
7840 	}
7841 
7842 	qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
7843 	    ha->flt_region_aux_img_status_pri,
7844 	    sizeof(pri_aux_image_status) >> 2);
7845 	qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
7846 
7847 	if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
7848 		ql_dbg(ql_dbg_init, vha, 0x018b,
7849 		    "Primary aux image signature (%#x) not valid\n",
7850 		    le32_to_cpu(pri_aux_image_status.signature));
7851 		goto check_sec_image;
7852 	}
7853 
7854 	if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
7855 		ql_dbg(ql_dbg_init, vha, 0x018c,
7856 		    "Primary aux image checksum failed\n");
7857 		goto check_sec_image;
7858 	}
7859 
7860 	valid_pri_image = true;
7861 
7862 	if (pri_aux_image_status.image_status_mask & 1) {
7863 		ql_dbg(ql_dbg_init, vha, 0x018d,
7864 		    "Primary aux image is active\n");
7865 		active_pri_image = true;
7866 	}
7867 
7868 check_sec_image:
7869 	if (!ha->flt_region_aux_img_status_sec) {
7870 		ql_dbg(ql_dbg_init, vha, 0x018a,
7871 		    "Secondary aux image not addressed\n");
7872 		goto check_valid_image;
7873 	}
7874 
7875 	qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
7876 	    ha->flt_region_aux_img_status_sec,
7877 	    sizeof(sec_aux_image_status) >> 2);
7878 	qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
7879 
7880 	if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
7881 		ql_dbg(ql_dbg_init, vha, 0x018b,
7882 		    "Secondary aux image signature (%#x) not valid\n",
7883 		    le32_to_cpu(sec_aux_image_status.signature));
7884 		goto check_valid_image;
7885 	}
7886 
7887 	if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
7888 		ql_dbg(ql_dbg_init, vha, 0x018c,
7889 		    "Secondary aux image checksum failed\n");
7890 		goto check_valid_image;
7891 	}
7892 
7893 	valid_sec_image = true;
7894 
7895 	if (sec_aux_image_status.image_status_mask & 1) {
7896 		ql_dbg(ql_dbg_init, vha, 0x018d,
7897 		    "Secondary aux image is active\n");
7898 		active_sec_image = true;
7899 	}
7900 
7901 check_valid_image:
7902 	if (valid_pri_image && active_pri_image &&
7903 	    valid_sec_image && active_sec_image) {
7904 		if (qla27xx_compare_image_generation(&pri_aux_image_status,
7905 		    &sec_aux_image_status) >= 0) {
7906 			qla28xx_component_status(active_regions,
7907 			    &pri_aux_image_status);
7908 		} else {
7909 			qla28xx_component_status(active_regions,
7910 			    &sec_aux_image_status);
7911 		}
7912 	} else if (valid_pri_image && active_pri_image) {
7913 		qla28xx_component_status(active_regions, &pri_aux_image_status);
7914 	} else if (valid_sec_image && active_sec_image) {
7915 		qla28xx_component_status(active_regions, &sec_aux_image_status);
7916 	}
7917 
7918 	ql_dbg(ql_dbg_init, vha, 0x018f,
7919 	    "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
7920 	    active_regions->aux.board_config,
7921 	    active_regions->aux.vpd_nvram,
7922 	    active_regions->aux.npiv_config_0_1,
7923 	    active_regions->aux.npiv_config_2_3);
7924 }
7925 
7926 void
7927 qla27xx_get_active_image(struct scsi_qla_host *vha,
7928     struct active_regions *active_regions)
7929 {
7930 	struct qla_hw_data *ha = vha->hw;
7931 	struct qla27xx_image_status pri_image_status, sec_image_status;
7932 	bool valid_pri_image = false, valid_sec_image = false;
7933 	bool active_pri_image = false, active_sec_image = false;
7934 
7935 	if (!ha->flt_region_img_status_pri) {
7936 		ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
7937 		goto check_sec_image;
7938 	}
7939 
7940 	if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
7941 	    ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
7942 	    QLA_SUCCESS) {
7943 		WARN_ON_ONCE(true);
7944 		goto check_sec_image;
7945 	}
7946 	qla27xx_print_image(vha, "Primary image", &pri_image_status);
7947 
7948 	if (qla27xx_check_image_status_signature(&pri_image_status)) {
7949 		ql_dbg(ql_dbg_init, vha, 0x018b,
7950 		    "Primary image signature (%#x) not valid\n",
7951 		    le32_to_cpu(pri_image_status.signature));
7952 		goto check_sec_image;
7953 	}
7954 
7955 	if (qla27xx_image_status_checksum(&pri_image_status)) {
7956 		ql_dbg(ql_dbg_init, vha, 0x018c,
7957 		    "Primary image checksum failed\n");
7958 		goto check_sec_image;
7959 	}
7960 
7961 	valid_pri_image = true;
7962 
7963 	if (pri_image_status.image_status_mask & 1) {
7964 		ql_dbg(ql_dbg_init, vha, 0x018d,
7965 		    "Primary image is active\n");
7966 		active_pri_image = true;
7967 	}
7968 
7969 check_sec_image:
7970 	if (!ha->flt_region_img_status_sec) {
7971 		ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
7972 		goto check_valid_image;
7973 	}
7974 
7975 	qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7976 	    ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
7977 	qla27xx_print_image(vha, "Secondary image", &sec_image_status);
7978 
7979 	if (qla27xx_check_image_status_signature(&sec_image_status)) {
7980 		ql_dbg(ql_dbg_init, vha, 0x018b,
7981 		    "Secondary image signature (%#x) not valid\n",
7982 		    le32_to_cpu(sec_image_status.signature));
7983 		goto check_valid_image;
7984 	}
7985 
7986 	if (qla27xx_image_status_checksum(&sec_image_status)) {
7987 		ql_dbg(ql_dbg_init, vha, 0x018c,
7988 		    "Secondary image checksum failed\n");
7989 		goto check_valid_image;
7990 	}
7991 
7992 	valid_sec_image = true;
7993 
7994 	if (sec_image_status.image_status_mask & 1) {
7995 		ql_dbg(ql_dbg_init, vha, 0x018d,
7996 		    "Secondary image is active\n");
7997 		active_sec_image = true;
7998 	}
7999 
8000 check_valid_image:
8001 	if (valid_pri_image && active_pri_image)
8002 		active_regions->global = QLA27XX_PRIMARY_IMAGE;
8003 
8004 	if (valid_sec_image && active_sec_image) {
8005 		if (!active_regions->global ||
8006 		    qla27xx_compare_image_generation(
8007 			&pri_image_status, &sec_image_status) < 0) {
8008 			active_regions->global = QLA27XX_SECONDARY_IMAGE;
8009 		}
8010 	}
8011 
8012 	ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
8013 	    active_regions->global == QLA27XX_DEFAULT_IMAGE ?
8014 		"default (boot/fw)" :
8015 	    active_regions->global == QLA27XX_PRIMARY_IMAGE ?
8016 		"primary" :
8017 	    active_regions->global == QLA27XX_SECONDARY_IMAGE ?
8018 		"secondary" : "invalid",
8019 	    active_regions->global);
8020 }
8021 
8022 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
8023 {
8024 	return
8025 	    !(dword[4] | dword[5] | dword[6] | dword[7]) ||
8026 	    !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
8027 }
8028 
8029 static int
8030 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
8031     uint32_t faddr)
8032 {
8033 	int rval;
8034 	uint templates, segments, fragment;
8035 	ulong i;
8036 	uint j;
8037 	ulong dlen;
8038 	uint32_t *dcode;
8039 	uint32_t risc_addr, risc_size, risc_attr = 0;
8040 	struct qla_hw_data *ha = vha->hw;
8041 	struct req_que *req = ha->req_q_map[0];
8042 	struct fwdt *fwdt = ha->fwdt;
8043 
8044 	ql_dbg(ql_dbg_init, vha, 0x008b,
8045 	    "FW: Loading firmware from flash (%x).\n", faddr);
8046 
8047 	dcode = (uint32_t *)req->ring;
8048 	qla24xx_read_flash_data(vha, dcode, faddr, 8);
8049 	if (qla24xx_risc_firmware_invalid(dcode)) {
8050 		ql_log(ql_log_fatal, vha, 0x008c,
8051 		    "Unable to verify the integrity of flash firmware "
8052 		    "image.\n");
8053 		ql_log(ql_log_fatal, vha, 0x008d,
8054 		    "Firmware data: %08x %08x %08x %08x.\n",
8055 		    dcode[0], dcode[1], dcode[2], dcode[3]);
8056 
8057 		return QLA_FUNCTION_FAILED;
8058 	}
8059 
8060 	dcode = (uint32_t *)req->ring;
8061 	*srisc_addr = 0;
8062 	segments = FA_RISC_CODE_SEGMENTS;
8063 	for (j = 0; j < segments; j++) {
8064 		ql_dbg(ql_dbg_init, vha, 0x008d,
8065 		    "-> Loading segment %u...\n", j);
8066 		qla24xx_read_flash_data(vha, dcode, faddr, 10);
8067 		risc_addr = be32_to_cpu((__force __be32)dcode[2]);
8068 		risc_size = be32_to_cpu((__force __be32)dcode[3]);
8069 		if (!*srisc_addr) {
8070 			*srisc_addr = risc_addr;
8071 			risc_attr = be32_to_cpu((__force __be32)dcode[9]);
8072 		}
8073 
8074 		dlen = ha->fw_transfer_size >> 2;
8075 		for (fragment = 0; risc_size; fragment++) {
8076 			if (dlen > risc_size)
8077 				dlen = risc_size;
8078 
8079 			ql_dbg(ql_dbg_init, vha, 0x008e,
8080 			    "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
8081 			    fragment, risc_addr, faddr, dlen);
8082 			qla24xx_read_flash_data(vha, dcode, faddr, dlen);
8083 			for (i = 0; i < dlen; i++)
8084 				dcode[i] = swab32(dcode[i]);
8085 
8086 			rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8087 			if (rval) {
8088 				ql_log(ql_log_fatal, vha, 0x008f,
8089 				    "-> Failed load firmware fragment %u.\n",
8090 				    fragment);
8091 				return QLA_FUNCTION_FAILED;
8092 			}
8093 
8094 			faddr += dlen;
8095 			risc_addr += dlen;
8096 			risc_size -= dlen;
8097 		}
8098 	}
8099 
8100 	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8101 		return QLA_SUCCESS;
8102 
8103 	templates = (risc_attr & BIT_9) ? 2 : 1;
8104 	ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
8105 	for (j = 0; j < templates; j++, fwdt++) {
8106 		vfree(fwdt->template);
8107 		fwdt->template = NULL;
8108 		fwdt->length = 0;
8109 
8110 		dcode = (uint32_t *)req->ring;
8111 		qla24xx_read_flash_data(vha, dcode, faddr, 7);
8112 		risc_size = be32_to_cpu((__force __be32)dcode[2]);
8113 		ql_dbg(ql_dbg_init, vha, 0x0161,
8114 		    "-> fwdt%u template array at %#x (%#x dwords)\n",
8115 		    j, faddr, risc_size);
8116 		if (!risc_size || !~risc_size) {
8117 			ql_dbg(ql_dbg_init, vha, 0x0162,
8118 			    "-> fwdt%u failed to read array\n", j);
8119 			goto failed;
8120 		}
8121 
8122 		/* skip header and ignore checksum */
8123 		faddr += 7;
8124 		risc_size -= 8;
8125 
8126 		ql_dbg(ql_dbg_init, vha, 0x0163,
8127 		    "-> fwdt%u template allocate template %#x words...\n",
8128 		    j, risc_size);
8129 		fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8130 		if (!fwdt->template) {
8131 			ql_log(ql_log_warn, vha, 0x0164,
8132 			    "-> fwdt%u failed allocate template.\n", j);
8133 			goto failed;
8134 		}
8135 
8136 		dcode = fwdt->template;
8137 		qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
8138 
8139 		if (!qla27xx_fwdt_template_valid(dcode)) {
8140 			ql_log(ql_log_warn, vha, 0x0165,
8141 			    "-> fwdt%u failed template validate\n", j);
8142 			goto failed;
8143 		}
8144 
8145 		dlen = qla27xx_fwdt_template_size(dcode);
8146 		ql_dbg(ql_dbg_init, vha, 0x0166,
8147 		    "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8148 		    j, dlen, dlen / sizeof(*dcode));
8149 		if (dlen > risc_size * sizeof(*dcode)) {
8150 			ql_log(ql_log_warn, vha, 0x0167,
8151 			    "-> fwdt%u template exceeds array (%-lu bytes)\n",
8152 			    j, dlen - risc_size * sizeof(*dcode));
8153 			goto failed;
8154 		}
8155 
8156 		fwdt->length = dlen;
8157 		ql_dbg(ql_dbg_init, vha, 0x0168,
8158 		    "-> fwdt%u loaded template ok\n", j);
8159 
8160 		faddr += risc_size + 1;
8161 	}
8162 
8163 	return QLA_SUCCESS;
8164 
8165 failed:
8166 	vfree(fwdt->template);
8167 	fwdt->template = NULL;
8168 	fwdt->length = 0;
8169 
8170 	return QLA_SUCCESS;
8171 }
8172 
8173 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
8174 
8175 int
8176 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8177 {
8178 	int	rval;
8179 	int	i, fragment;
8180 	uint16_t *wcode;
8181 	__be16	 *fwcode;
8182 	uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
8183 	struct fw_blob *blob;
8184 	struct qla_hw_data *ha = vha->hw;
8185 	struct req_que *req = ha->req_q_map[0];
8186 
8187 	/* Load firmware blob. */
8188 	blob = qla2x00_request_firmware(vha);
8189 	if (!blob) {
8190 		ql_log(ql_log_info, vha, 0x0083,
8191 		    "Firmware image unavailable.\n");
8192 		ql_log(ql_log_info, vha, 0x0084,
8193 		    "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
8194 		return QLA_FUNCTION_FAILED;
8195 	}
8196 
8197 	rval = QLA_SUCCESS;
8198 
8199 	wcode = (uint16_t *)req->ring;
8200 	*srisc_addr = 0;
8201 	fwcode = (__force __be16 *)blob->fw->data;
8202 	fwclen = 0;
8203 
8204 	/* Validate firmware image by checking version. */
8205 	if (blob->fw->size < 8 * sizeof(uint16_t)) {
8206 		ql_log(ql_log_fatal, vha, 0x0085,
8207 		    "Unable to verify integrity of firmware image (%zd).\n",
8208 		    blob->fw->size);
8209 		goto fail_fw_integrity;
8210 	}
8211 	for (i = 0; i < 4; i++)
8212 		wcode[i] = be16_to_cpu(fwcode[i + 4]);
8213 	if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
8214 	    wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
8215 		wcode[2] == 0 && wcode[3] == 0)) {
8216 		ql_log(ql_log_fatal, vha, 0x0086,
8217 		    "Unable to verify integrity of firmware image.\n");
8218 		ql_log(ql_log_fatal, vha, 0x0087,
8219 		    "Firmware data: %04x %04x %04x %04x.\n",
8220 		    wcode[0], wcode[1], wcode[2], wcode[3]);
8221 		goto fail_fw_integrity;
8222 	}
8223 
8224 	seg = blob->segs;
8225 	while (*seg && rval == QLA_SUCCESS) {
8226 		risc_addr = *seg;
8227 		*srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
8228 		risc_size = be16_to_cpu(fwcode[3]);
8229 
8230 		/* Validate firmware image size. */
8231 		fwclen += risc_size * sizeof(uint16_t);
8232 		if (blob->fw->size < fwclen) {
8233 			ql_log(ql_log_fatal, vha, 0x0088,
8234 			    "Unable to verify integrity of firmware image "
8235 			    "(%zd).\n", blob->fw->size);
8236 			goto fail_fw_integrity;
8237 		}
8238 
8239 		fragment = 0;
8240 		while (risc_size > 0 && rval == QLA_SUCCESS) {
8241 			wlen = (uint16_t)(ha->fw_transfer_size >> 1);
8242 			if (wlen > risc_size)
8243 				wlen = risc_size;
8244 			ql_dbg(ql_dbg_init, vha, 0x0089,
8245 			    "Loading risc segment@ risc addr %x number of "
8246 			    "words 0x%x.\n", risc_addr, wlen);
8247 
8248 			for (i = 0; i < wlen; i++)
8249 				wcode[i] = swab16((__force u32)fwcode[i]);
8250 
8251 			rval = qla2x00_load_ram(vha, req->dma, risc_addr,
8252 			    wlen);
8253 			if (rval) {
8254 				ql_log(ql_log_fatal, vha, 0x008a,
8255 				    "Failed to load segment %d of firmware.\n",
8256 				    fragment);
8257 				break;
8258 			}
8259 
8260 			fwcode += wlen;
8261 			risc_addr += wlen;
8262 			risc_size -= wlen;
8263 			fragment++;
8264 		}
8265 
8266 		/* Next segment. */
8267 		seg++;
8268 	}
8269 	return rval;
8270 
8271 fail_fw_integrity:
8272 	return QLA_FUNCTION_FAILED;
8273 }
8274 
8275 static int
8276 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8277 {
8278 	int	rval;
8279 	uint templates, segments, fragment;
8280 	uint32_t *dcode;
8281 	ulong dlen;
8282 	uint32_t risc_addr, risc_size, risc_attr = 0;
8283 	ulong i;
8284 	uint j;
8285 	struct fw_blob *blob;
8286 	__be32 *fwcode;
8287 	struct qla_hw_data *ha = vha->hw;
8288 	struct req_que *req = ha->req_q_map[0];
8289 	struct fwdt *fwdt = ha->fwdt;
8290 
8291 	ql_dbg(ql_dbg_init, vha, 0x0090,
8292 	    "-> FW: Loading via request-firmware.\n");
8293 
8294 	blob = qla2x00_request_firmware(vha);
8295 	if (!blob) {
8296 		ql_log(ql_log_warn, vha, 0x0092,
8297 		    "-> Firmware file not found.\n");
8298 
8299 		return QLA_FUNCTION_FAILED;
8300 	}
8301 
8302 	fwcode = (__force __be32 *)blob->fw->data;
8303 	dcode = (__force uint32_t *)fwcode;
8304 	if (qla24xx_risc_firmware_invalid(dcode)) {
8305 		ql_log(ql_log_fatal, vha, 0x0093,
8306 		    "Unable to verify integrity of firmware image (%zd).\n",
8307 		    blob->fw->size);
8308 		ql_log(ql_log_fatal, vha, 0x0095,
8309 		    "Firmware data: %08x %08x %08x %08x.\n",
8310 		    dcode[0], dcode[1], dcode[2], dcode[3]);
8311 		return QLA_FUNCTION_FAILED;
8312 	}
8313 
8314 	dcode = (uint32_t *)req->ring;
8315 	*srisc_addr = 0;
8316 	segments = FA_RISC_CODE_SEGMENTS;
8317 	for (j = 0; j < segments; j++) {
8318 		ql_dbg(ql_dbg_init, vha, 0x0096,
8319 		    "-> Loading segment %u...\n", j);
8320 		risc_addr = be32_to_cpu(fwcode[2]);
8321 		risc_size = be32_to_cpu(fwcode[3]);
8322 
8323 		if (!*srisc_addr) {
8324 			*srisc_addr = risc_addr;
8325 			risc_attr = be32_to_cpu(fwcode[9]);
8326 		}
8327 
8328 		dlen = ha->fw_transfer_size >> 2;
8329 		for (fragment = 0; risc_size; fragment++) {
8330 			if (dlen > risc_size)
8331 				dlen = risc_size;
8332 
8333 			ql_dbg(ql_dbg_init, vha, 0x0097,
8334 			    "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
8335 			    fragment, risc_addr,
8336 			    (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
8337 			    dlen);
8338 
8339 			for (i = 0; i < dlen; i++)
8340 				dcode[i] = swab32((__force u32)fwcode[i]);
8341 
8342 			rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8343 			if (rval) {
8344 				ql_log(ql_log_fatal, vha, 0x0098,
8345 				    "-> Failed load firmware fragment %u.\n",
8346 				    fragment);
8347 				return QLA_FUNCTION_FAILED;
8348 			}
8349 
8350 			fwcode += dlen;
8351 			risc_addr += dlen;
8352 			risc_size -= dlen;
8353 		}
8354 	}
8355 
8356 	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8357 		return QLA_SUCCESS;
8358 
8359 	templates = (risc_attr & BIT_9) ? 2 : 1;
8360 	ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
8361 	for (j = 0; j < templates; j++, fwdt++) {
8362 		vfree(fwdt->template);
8363 		fwdt->template = NULL;
8364 		fwdt->length = 0;
8365 
8366 		risc_size = be32_to_cpu(fwcode[2]);
8367 		ql_dbg(ql_dbg_init, vha, 0x0171,
8368 		    "-> fwdt%u template array at %#x (%#x dwords)\n",
8369 		    j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8370 		    risc_size);
8371 		if (!risc_size || !~risc_size) {
8372 			ql_dbg(ql_dbg_init, vha, 0x0172,
8373 			    "-> fwdt%u failed to read array\n", j);
8374 			goto failed;
8375 		}
8376 
8377 		/* skip header and ignore checksum */
8378 		fwcode += 7;
8379 		risc_size -= 8;
8380 
8381 		ql_dbg(ql_dbg_init, vha, 0x0173,
8382 		    "-> fwdt%u template allocate template %#x words...\n",
8383 		    j, risc_size);
8384 		fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8385 		if (!fwdt->template) {
8386 			ql_log(ql_log_warn, vha, 0x0174,
8387 			    "-> fwdt%u failed allocate template.\n", j);
8388 			goto failed;
8389 		}
8390 
8391 		dcode = fwdt->template;
8392 		for (i = 0; i < risc_size; i++)
8393 			dcode[i] = (__force u32)fwcode[i];
8394 
8395 		if (!qla27xx_fwdt_template_valid(dcode)) {
8396 			ql_log(ql_log_warn, vha, 0x0175,
8397 			    "-> fwdt%u failed template validate\n", j);
8398 			goto failed;
8399 		}
8400 
8401 		dlen = qla27xx_fwdt_template_size(dcode);
8402 		ql_dbg(ql_dbg_init, vha, 0x0176,
8403 		    "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8404 		    j, dlen, dlen / sizeof(*dcode));
8405 		if (dlen > risc_size * sizeof(*dcode)) {
8406 			ql_log(ql_log_warn, vha, 0x0177,
8407 			    "-> fwdt%u template exceeds array (%-lu bytes)\n",
8408 			    j, dlen - risc_size * sizeof(*dcode));
8409 			goto failed;
8410 		}
8411 
8412 		fwdt->length = dlen;
8413 		ql_dbg(ql_dbg_init, vha, 0x0178,
8414 		    "-> fwdt%u loaded template ok\n", j);
8415 
8416 		fwcode += risc_size + 1;
8417 	}
8418 
8419 	return QLA_SUCCESS;
8420 
8421 failed:
8422 	vfree(fwdt->template);
8423 	fwdt->template = NULL;
8424 	fwdt->length = 0;
8425 
8426 	return QLA_SUCCESS;
8427 }
8428 
8429 int
8430 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8431 {
8432 	int rval;
8433 
8434 	if (ql2xfwloadbin == 1)
8435 		return qla81xx_load_risc(vha, srisc_addr);
8436 
8437 	/*
8438 	 * FW Load priority:
8439 	 * 1) Firmware via request-firmware interface (.bin file).
8440 	 * 2) Firmware residing in flash.
8441 	 */
8442 	rval = qla24xx_load_risc_blob(vha, srisc_addr);
8443 	if (rval == QLA_SUCCESS)
8444 		return rval;
8445 
8446 	return qla24xx_load_risc_flash(vha, srisc_addr,
8447 	    vha->hw->flt_region_fw);
8448 }
8449 
8450 int
8451 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8452 {
8453 	int rval;
8454 	struct qla_hw_data *ha = vha->hw;
8455 	struct active_regions active_regions = { };
8456 
8457 	if (ql2xfwloadbin == 2)
8458 		goto try_blob_fw;
8459 
8460 	/* FW Load priority:
8461 	 * 1) Firmware residing in flash.
8462 	 * 2) Firmware via request-firmware interface (.bin file).
8463 	 * 3) Golden-Firmware residing in flash -- (limited operation).
8464 	 */
8465 
8466 	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8467 		goto try_primary_fw;
8468 
8469 	qla27xx_get_active_image(vha, &active_regions);
8470 
8471 	if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8472 		goto try_primary_fw;
8473 
8474 	ql_dbg(ql_dbg_init, vha, 0x008b,
8475 	    "Loading secondary firmware image.\n");
8476 	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8477 	if (!rval)
8478 		return rval;
8479 
8480 try_primary_fw:
8481 	ql_dbg(ql_dbg_init, vha, 0x008b,
8482 	    "Loading primary firmware image.\n");
8483 	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8484 	if (!rval)
8485 		return rval;
8486 
8487 try_blob_fw:
8488 	rval = qla24xx_load_risc_blob(vha, srisc_addr);
8489 	if (!rval || !ha->flt_region_gold_fw)
8490 		return rval;
8491 
8492 	ql_log(ql_log_info, vha, 0x0099,
8493 	    "Attempting to fallback to golden firmware.\n");
8494 	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8495 	if (rval)
8496 		return rval;
8497 
8498 	ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8499 	ha->flags.running_gold_fw = 1;
8500 	return rval;
8501 }
8502 
8503 void
8504 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8505 {
8506 	int ret, retries;
8507 	struct qla_hw_data *ha = vha->hw;
8508 
8509 	if (ha->flags.pci_channel_io_perm_failure)
8510 		return;
8511 	if (!IS_FWI2_CAPABLE(ha))
8512 		return;
8513 	if (!ha->fw_major_version)
8514 		return;
8515 	if (!ha->flags.fw_started)
8516 		return;
8517 
8518 	ret = qla2x00_stop_firmware(vha);
8519 	for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8520 	    ret != QLA_INVALID_COMMAND && retries ; retries--) {
8521 		ha->isp_ops->reset_chip(vha);
8522 		if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8523 			continue;
8524 		if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8525 			continue;
8526 		ql_log(ql_log_info, vha, 0x8015,
8527 		    "Attempting retry of stop-firmware command.\n");
8528 		ret = qla2x00_stop_firmware(vha);
8529 	}
8530 
8531 	QLA_FW_STOPPED(ha);
8532 	ha->flags.fw_init_done = 0;
8533 }
8534 
8535 int
8536 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8537 {
8538 	int rval = QLA_SUCCESS;
8539 	int rval2;
8540 	uint16_t mb[MAILBOX_REGISTER_COUNT];
8541 	struct qla_hw_data *ha = vha->hw;
8542 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8543 
8544 	if (!vha->vp_idx)
8545 		return -EINVAL;
8546 
8547 	rval = qla2x00_fw_ready(base_vha);
8548 
8549 	if (rval == QLA_SUCCESS) {
8550 		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8551 		qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8552 	}
8553 
8554 	vha->flags.management_server_logged_in = 0;
8555 
8556 	/* Login to SNS first */
8557 	rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8558 	    BIT_1);
8559 	if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8560 		if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8561 			ql_dbg(ql_dbg_init, vha, 0x0120,
8562 			    "Failed SNS login: loop_id=%x, rval2=%d\n",
8563 			    NPH_SNS, rval2);
8564 		else
8565 			ql_dbg(ql_dbg_init, vha, 0x0103,
8566 			    "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8567 			    "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8568 			    NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8569 		return (QLA_FUNCTION_FAILED);
8570 	}
8571 
8572 	atomic_set(&vha->loop_down_timer, 0);
8573 	atomic_set(&vha->loop_state, LOOP_UP);
8574 	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8575 	set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
8576 	rval = qla2x00_loop_resync(base_vha);
8577 
8578 	return rval;
8579 }
8580 
8581 /* 84XX Support **************************************************************/
8582 
8583 static LIST_HEAD(qla_cs84xx_list);
8584 static DEFINE_MUTEX(qla_cs84xx_mutex);
8585 
8586 static struct qla_chip_state_84xx *
8587 qla84xx_get_chip(struct scsi_qla_host *vha)
8588 {
8589 	struct qla_chip_state_84xx *cs84xx;
8590 	struct qla_hw_data *ha = vha->hw;
8591 
8592 	mutex_lock(&qla_cs84xx_mutex);
8593 
8594 	/* Find any shared 84xx chip. */
8595 	list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8596 		if (cs84xx->bus == ha->pdev->bus) {
8597 			kref_get(&cs84xx->kref);
8598 			goto done;
8599 		}
8600 	}
8601 
8602 	cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
8603 	if (!cs84xx)
8604 		goto done;
8605 
8606 	kref_init(&cs84xx->kref);
8607 	spin_lock_init(&cs84xx->access_lock);
8608 	mutex_init(&cs84xx->fw_update_mutex);
8609 	cs84xx->bus = ha->pdev->bus;
8610 
8611 	list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8612 done:
8613 	mutex_unlock(&qla_cs84xx_mutex);
8614 	return cs84xx;
8615 }
8616 
8617 static void
8618 __qla84xx_chip_release(struct kref *kref)
8619 {
8620 	struct qla_chip_state_84xx *cs84xx =
8621 	    container_of(kref, struct qla_chip_state_84xx, kref);
8622 
8623 	mutex_lock(&qla_cs84xx_mutex);
8624 	list_del(&cs84xx->list);
8625 	mutex_unlock(&qla_cs84xx_mutex);
8626 	kfree(cs84xx);
8627 }
8628 
8629 void
8630 qla84xx_put_chip(struct scsi_qla_host *vha)
8631 {
8632 	struct qla_hw_data *ha = vha->hw;
8633 
8634 	if (ha->cs84xx)
8635 		kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8636 }
8637 
8638 static int
8639 qla84xx_init_chip(scsi_qla_host_t *vha)
8640 {
8641 	int rval;
8642 	uint16_t status[2];
8643 	struct qla_hw_data *ha = vha->hw;
8644 
8645 	mutex_lock(&ha->cs84xx->fw_update_mutex);
8646 
8647 	rval = qla84xx_verify_chip(vha, status);
8648 
8649 	mutex_unlock(&ha->cs84xx->fw_update_mutex);
8650 
8651 	return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
8652 	    QLA_SUCCESS;
8653 }
8654 
8655 /* 81XX Support **************************************************************/
8656 
8657 int
8658 qla81xx_nvram_config(scsi_qla_host_t *vha)
8659 {
8660 	int   rval;
8661 	struct init_cb_81xx *icb;
8662 	struct nvram_81xx *nv;
8663 	__le32 *dptr;
8664 	uint8_t  *dptr1, *dptr2;
8665 	uint32_t chksum;
8666 	uint16_t cnt;
8667 	struct qla_hw_data *ha = vha->hw;
8668 	uint32_t faddr;
8669 	struct active_regions active_regions = { };
8670 
8671 	rval = QLA_SUCCESS;
8672 	icb = (struct init_cb_81xx *)ha->init_cb;
8673 	nv = ha->nvram;
8674 
8675 	/* Determine NVRAM starting address. */
8676 	ha->nvram_size = sizeof(*nv);
8677 	ha->vpd_size = FA_NVRAM_VPD_SIZE;
8678 	if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8679 		ha->vpd_size = FA_VPD_SIZE_82XX;
8680 
8681 	if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
8682 		qla28xx_get_aux_images(vha, &active_regions);
8683 
8684 	/* Get VPD data into cache */
8685 	ha->vpd = ha->nvram + VPD_OFFSET;
8686 
8687 	faddr = ha->flt_region_vpd;
8688 	if (IS_QLA28XX(ha)) {
8689 		if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8690 			faddr = ha->flt_region_vpd_sec;
8691 		ql_dbg(ql_dbg_init, vha, 0x0110,
8692 		    "Loading %s nvram image.\n",
8693 		    active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8694 		    "primary" : "secondary");
8695 	}
8696 	ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
8697 
8698 	/* Get NVRAM data into cache and calculate checksum. */
8699 	faddr = ha->flt_region_nvram;
8700 	if (IS_QLA28XX(ha)) {
8701 		if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8702 			faddr = ha->flt_region_nvram_sec;
8703 	}
8704 	ql_dbg(ql_dbg_init, vha, 0x0110,
8705 	    "Loading %s nvram image.\n",
8706 	    active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8707 	    "primary" : "secondary");
8708 	ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
8709 
8710 	dptr = (__force __le32 *)nv;
8711 	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8712 		chksum += le32_to_cpu(*dptr);
8713 
8714 	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8715 	    "Contents of NVRAM:\n");
8716 	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8717 	    nv, ha->nvram_size);
8718 
8719 	/* Bad NVRAM data, set defaults parameters. */
8720 	if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
8721 	    le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8722 		/* Reset NVRAM data. */
8723 		ql_log(ql_log_info, vha, 0x0073,
8724 		    "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
8725 		    chksum, nv->id, le16_to_cpu(nv->nvram_version));
8726 		ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8727 		ql_log(ql_log_info, vha, 0x0074,
8728 		    "Falling back to functioning (yet invalid -- WWPN) "
8729 		    "defaults.\n");
8730 
8731 		/*
8732 		 * Set default initialization control block.
8733 		 */
8734 		memset(nv, 0, ha->nvram_size);
8735 		nv->nvram_version = cpu_to_le16(ICB_VERSION);
8736 		nv->version = cpu_to_le16(ICB_VERSION);
8737 		nv->frame_payload_size = cpu_to_le16(2048);
8738 		nv->execution_throttle = cpu_to_le16(0xFFFF);
8739 		nv->exchange_count = cpu_to_le16(0);
8740 		nv->port_name[0] = 0x21;
8741 		nv->port_name[1] = 0x00 + ha->port_no + 1;
8742 		nv->port_name[2] = 0x00;
8743 		nv->port_name[3] = 0xe0;
8744 		nv->port_name[4] = 0x8b;
8745 		nv->port_name[5] = 0x1c;
8746 		nv->port_name[6] = 0x55;
8747 		nv->port_name[7] = 0x86;
8748 		nv->node_name[0] = 0x20;
8749 		nv->node_name[1] = 0x00;
8750 		nv->node_name[2] = 0x00;
8751 		nv->node_name[3] = 0xe0;
8752 		nv->node_name[4] = 0x8b;
8753 		nv->node_name[5] = 0x1c;
8754 		nv->node_name[6] = 0x55;
8755 		nv->node_name[7] = 0x86;
8756 		nv->login_retry_count = cpu_to_le16(8);
8757 		nv->interrupt_delay_timer = cpu_to_le16(0);
8758 		nv->login_timeout = cpu_to_le16(0);
8759 		nv->firmware_options_1 =
8760 		    cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8761 		nv->firmware_options_2 = cpu_to_le32(2 << 4);
8762 		nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8763 		nv->firmware_options_3 = cpu_to_le32(2 << 13);
8764 		nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8765 		nv->efi_parameters = cpu_to_le32(0);
8766 		nv->reset_delay = 5;
8767 		nv->max_luns_per_target = cpu_to_le16(128);
8768 		nv->port_down_retry_count = cpu_to_le16(30);
8769 		nv->link_down_timeout = cpu_to_le16(180);
8770 		nv->enode_mac[0] = 0x00;
8771 		nv->enode_mac[1] = 0xC0;
8772 		nv->enode_mac[2] = 0xDD;
8773 		nv->enode_mac[3] = 0x04;
8774 		nv->enode_mac[4] = 0x05;
8775 		nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8776 
8777 		rval = 1;
8778 	}
8779 
8780 	if (IS_T10_PI_CAPABLE(ha))
8781 		nv->frame_payload_size &= cpu_to_le16(~7);
8782 
8783 	qlt_81xx_config_nvram_stage1(vha, nv);
8784 
8785 	/* Reset Initialization control block */
8786 	memset(icb, 0, ha->init_cb_size);
8787 
8788 	/* Copy 1st segment. */
8789 	dptr1 = (uint8_t *)icb;
8790 	dptr2 = (uint8_t *)&nv->version;
8791 	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8792 	while (cnt--)
8793 		*dptr1++ = *dptr2++;
8794 
8795 	icb->login_retry_count = nv->login_retry_count;
8796 
8797 	/* Copy 2nd segment. */
8798 	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8799 	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8800 	cnt = (uint8_t *)&icb->reserved_5 -
8801 	    (uint8_t *)&icb->interrupt_delay_timer;
8802 	while (cnt--)
8803 		*dptr1++ = *dptr2++;
8804 
8805 	memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8806 	/* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8807 	if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8808 		icb->enode_mac[0] = 0x00;
8809 		icb->enode_mac[1] = 0xC0;
8810 		icb->enode_mac[2] = 0xDD;
8811 		icb->enode_mac[3] = 0x04;
8812 		icb->enode_mac[4] = 0x05;
8813 		icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8814 	}
8815 
8816 	/* Use extended-initialization control block. */
8817 	memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8818 	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8819 	/*
8820 	 * Setup driver NVRAM options.
8821 	 */
8822 	qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8823 	    "QLE8XXX");
8824 
8825 	qlt_81xx_config_nvram_stage2(vha, icb);
8826 
8827 	/* Use alternate WWN? */
8828 	if (nv->host_p & cpu_to_le32(BIT_15)) {
8829 		memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8830 		memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8831 	}
8832 
8833 	/* Prepare nodename */
8834 	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8835 		/*
8836 		 * Firmware will apply the following mask if the nodename was
8837 		 * not provided.
8838 		 */
8839 		memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8840 		icb->node_name[0] &= 0xF0;
8841 	}
8842 
8843 	if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
8844 		if ((nv->enhanced_features & BIT_7) == 0)
8845 			ha->flags.scm_supported_a = 1;
8846 	}
8847 
8848 	/* Set host adapter parameters. */
8849 	ha->flags.disable_risc_code_load = 0;
8850 	ha->flags.enable_lip_reset = 0;
8851 	ha->flags.enable_lip_full_login =
8852 	    le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8853 	ha->flags.enable_target_reset =
8854 	    le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8855 	ha->flags.enable_led_scheme = 0;
8856 	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8857 
8858 	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8859 	    (BIT_6 | BIT_5 | BIT_4)) >> 4;
8860 
8861 	/* save HBA serial number */
8862 	ha->serial0 = icb->port_name[5];
8863 	ha->serial1 = icb->port_name[6];
8864 	ha->serial2 = icb->port_name[7];
8865 	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8866 	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8867 
8868 	icb->execution_throttle = cpu_to_le16(0xFFFF);
8869 
8870 	ha->retry_count = le16_to_cpu(nv->login_retry_count);
8871 
8872 	/* Set minimum login_timeout to 4 seconds. */
8873 	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8874 		nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8875 	if (le16_to_cpu(nv->login_timeout) < 4)
8876 		nv->login_timeout = cpu_to_le16(4);
8877 	ha->login_timeout = le16_to_cpu(nv->login_timeout);
8878 
8879 	/* Set minimum RATOV to 100 tenths of a second. */
8880 	ha->r_a_tov = 100;
8881 
8882 	ha->loop_reset_delay = nv->reset_delay;
8883 
8884 	/* Link Down Timeout = 0:
8885 	 *
8886 	 *	When Port Down timer expires we will start returning
8887 	 *	I/O's to OS with "DID_NO_CONNECT".
8888 	 *
8889 	 * Link Down Timeout != 0:
8890 	 *
8891 	 *	 The driver waits for the link to come up after link down
8892 	 *	 before returning I/Os to OS with "DID_NO_CONNECT".
8893 	 */
8894 	if (le16_to_cpu(nv->link_down_timeout) == 0) {
8895 		ha->loop_down_abort_time =
8896 		    (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8897 	} else {
8898 		ha->link_down_timeout =	le16_to_cpu(nv->link_down_timeout);
8899 		ha->loop_down_abort_time =
8900 		    (LOOP_DOWN_TIME - ha->link_down_timeout);
8901 	}
8902 
8903 	/* Need enough time to try and get the port back. */
8904 	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8905 	if (qlport_down_retry)
8906 		ha->port_down_retry_count = qlport_down_retry;
8907 
8908 	/* Set login_retry_count */
8909 	ha->login_retry_count  = le16_to_cpu(nv->login_retry_count);
8910 	if (ha->port_down_retry_count ==
8911 	    le16_to_cpu(nv->port_down_retry_count) &&
8912 	    ha->port_down_retry_count > 3)
8913 		ha->login_retry_count = ha->port_down_retry_count;
8914 	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8915 		ha->login_retry_count = ha->port_down_retry_count;
8916 	if (ql2xloginretrycount)
8917 		ha->login_retry_count = ql2xloginretrycount;
8918 
8919 	/* if not running MSI-X we need handshaking on interrupts */
8920 	if (!vha->hw->flags.msix_enabled &&
8921 	    (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
8922 		icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8923 
8924 	/* Enable ZIO. */
8925 	if (!vha->flags.init_done) {
8926 		ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8927 		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8928 		ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8929 		    le16_to_cpu(icb->interrupt_delay_timer) : 2;
8930 	}
8931 	icb->firmware_options_2 &= cpu_to_le32(
8932 	    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8933 	vha->flags.process_response_queue = 0;
8934 	if (ha->zio_mode != QLA_ZIO_DISABLED) {
8935 		ha->zio_mode = QLA_ZIO_MODE_6;
8936 
8937 		ql_log(ql_log_info, vha, 0x0075,
8938 		    "ZIO mode %d enabled; timer delay (%d us).\n",
8939 		    ha->zio_mode,
8940 		    ha->zio_timer * 100);
8941 
8942 		icb->firmware_options_2 |= cpu_to_le32(
8943 		    (uint32_t)ha->zio_mode);
8944 		icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8945 		vha->flags.process_response_queue = 1;
8946 	}
8947 
8948 	 /* enable RIDA Format2 */
8949 	icb->firmware_options_3 |= cpu_to_le32(BIT_0);
8950 
8951 	/* N2N: driver will initiate Login instead of FW */
8952 	icb->firmware_options_3 |= cpu_to_le32(BIT_8);
8953 
8954 	/* Determine NVMe/FCP priority for target ports */
8955 	ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
8956 
8957 	if (rval) {
8958 		ql_log(ql_log_warn, vha, 0x0076,
8959 		    "NVRAM configuration failed.\n");
8960 	}
8961 	return (rval);
8962 }
8963 
8964 int
8965 qla82xx_restart_isp(scsi_qla_host_t *vha)
8966 {
8967 	int status, rval;
8968 	struct qla_hw_data *ha = vha->hw;
8969 	struct scsi_qla_host *vp, *tvp;
8970 	unsigned long flags;
8971 
8972 	status = qla2x00_init_rings(vha);
8973 	if (!status) {
8974 		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8975 		ha->flags.chip_reset_done = 1;
8976 
8977 		status = qla2x00_fw_ready(vha);
8978 		if (!status) {
8979 			/* Issue a marker after FW becomes ready. */
8980 			qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8981 			vha->flags.online = 1;
8982 			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8983 		}
8984 
8985 		/* if no cable then assume it's good */
8986 		if ((vha->device_flags & DFLG_NO_CABLE))
8987 			status = 0;
8988 	}
8989 
8990 	if (!status) {
8991 		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8992 
8993 		if (!atomic_read(&vha->loop_down_timer)) {
8994 			/*
8995 			 * Issue marker command only when we are going
8996 			 * to start the I/O .
8997 			 */
8998 			vha->marker_needed = 1;
8999 		}
9000 
9001 		ha->isp_ops->enable_intrs(ha);
9002 
9003 		ha->isp_abort_cnt = 0;
9004 		clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
9005 
9006 		/* Update the firmware version */
9007 		status = qla82xx_check_md_needed(vha);
9008 
9009 		if (ha->fce) {
9010 			ha->flags.fce_enabled = 1;
9011 			memset(ha->fce, 0,
9012 			    fce_calc_size(ha->fce_bufs));
9013 			rval = qla2x00_enable_fce_trace(vha,
9014 			    ha->fce_dma, ha->fce_bufs, ha->fce_mb,
9015 			    &ha->fce_bufs);
9016 			if (rval) {
9017 				ql_log(ql_log_warn, vha, 0x8001,
9018 				    "Unable to reinitialize FCE (%d).\n",
9019 				    rval);
9020 				ha->flags.fce_enabled = 0;
9021 			}
9022 		}
9023 
9024 		if (ha->eft) {
9025 			memset(ha->eft, 0, EFT_SIZE);
9026 			rval = qla2x00_enable_eft_trace(vha,
9027 			    ha->eft_dma, EFT_NUM_BUFFERS);
9028 			if (rval) {
9029 				ql_log(ql_log_warn, vha, 0x8010,
9030 				    "Unable to reinitialize EFT (%d).\n",
9031 				    rval);
9032 			}
9033 		}
9034 	}
9035 
9036 	if (!status) {
9037 		ql_dbg(ql_dbg_taskm, vha, 0x8011,
9038 		    "qla82xx_restart_isp succeeded.\n");
9039 
9040 		spin_lock_irqsave(&ha->vport_slock, flags);
9041 		list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
9042 			if (vp->vp_idx) {
9043 				atomic_inc(&vp->vref_count);
9044 				spin_unlock_irqrestore(&ha->vport_slock, flags);
9045 
9046 				qla2x00_vp_abort_isp(vp);
9047 
9048 				spin_lock_irqsave(&ha->vport_slock, flags);
9049 				atomic_dec(&vp->vref_count);
9050 			}
9051 		}
9052 		spin_unlock_irqrestore(&ha->vport_slock, flags);
9053 
9054 	} else {
9055 		ql_log(ql_log_warn, vha, 0x8016,
9056 		    "qla82xx_restart_isp **** FAILED ****.\n");
9057 	}
9058 
9059 	return status;
9060 }
9061 
9062 /*
9063  * qla24xx_get_fcp_prio
9064  *	Gets the fcp cmd priority value for the logged in port.
9065  *	Looks for a match of the port descriptors within
9066  *	each of the fcp prio config entries. If a match is found,
9067  *	the tag (priority) value is returned.
9068  *
9069  * Input:
9070  *	vha = scsi host structure pointer.
9071  *	fcport = port structure pointer.
9072  *
9073  * Return:
9074  *	non-zero (if found)
9075  *	-1 (if not found)
9076  *
9077  * Context:
9078  * 	Kernel context
9079  */
9080 static int
9081 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9082 {
9083 	int i, entries;
9084 	uint8_t pid_match, wwn_match;
9085 	int priority;
9086 	uint32_t pid1, pid2;
9087 	uint64_t wwn1, wwn2;
9088 	struct qla_fcp_prio_entry *pri_entry;
9089 	struct qla_hw_data *ha = vha->hw;
9090 
9091 	if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
9092 		return -1;
9093 
9094 	priority = -1;
9095 	entries = ha->fcp_prio_cfg->num_entries;
9096 	pri_entry = &ha->fcp_prio_cfg->entry[0];
9097 
9098 	for (i = 0; i < entries; i++) {
9099 		pid_match = wwn_match = 0;
9100 
9101 		if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
9102 			pri_entry++;
9103 			continue;
9104 		}
9105 
9106 		/* check source pid for a match */
9107 		if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
9108 			pid1 = pri_entry->src_pid & INVALID_PORT_ID;
9109 			pid2 = vha->d_id.b24 & INVALID_PORT_ID;
9110 			if (pid1 == INVALID_PORT_ID)
9111 				pid_match++;
9112 			else if (pid1 == pid2)
9113 				pid_match++;
9114 		}
9115 
9116 		/* check destination pid for a match */
9117 		if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
9118 			pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
9119 			pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
9120 			if (pid1 == INVALID_PORT_ID)
9121 				pid_match++;
9122 			else if (pid1 == pid2)
9123 				pid_match++;
9124 		}
9125 
9126 		/* check source WWN for a match */
9127 		if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
9128 			wwn1 = wwn_to_u64(vha->port_name);
9129 			wwn2 = wwn_to_u64(pri_entry->src_wwpn);
9130 			if (wwn2 == (uint64_t)-1)
9131 				wwn_match++;
9132 			else if (wwn1 == wwn2)
9133 				wwn_match++;
9134 		}
9135 
9136 		/* check destination WWN for a match */
9137 		if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
9138 			wwn1 = wwn_to_u64(fcport->port_name);
9139 			wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
9140 			if (wwn2 == (uint64_t)-1)
9141 				wwn_match++;
9142 			else if (wwn1 == wwn2)
9143 				wwn_match++;
9144 		}
9145 
9146 		if (pid_match == 2 || wwn_match == 2) {
9147 			/* Found a matching entry */
9148 			if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
9149 				priority = pri_entry->tag;
9150 			break;
9151 		}
9152 
9153 		pri_entry++;
9154 	}
9155 
9156 	return priority;
9157 }
9158 
9159 /*
9160  * qla24xx_update_fcport_fcp_prio
9161  *	Activates fcp priority for the logged in fc port
9162  *
9163  * Input:
9164  *	vha = scsi host structure pointer.
9165  *	fcp = port structure pointer.
9166  *
9167  * Return:
9168  *	QLA_SUCCESS or QLA_FUNCTION_FAILED
9169  *
9170  * Context:
9171  *	Kernel context.
9172  */
9173 int
9174 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9175 {
9176 	int ret;
9177 	int priority;
9178 	uint16_t mb[5];
9179 
9180 	if (fcport->port_type != FCT_TARGET ||
9181 	    fcport->loop_id == FC_NO_LOOP_ID)
9182 		return QLA_FUNCTION_FAILED;
9183 
9184 	priority = qla24xx_get_fcp_prio(vha, fcport);
9185 	if (priority < 0)
9186 		return QLA_FUNCTION_FAILED;
9187 
9188 	if (IS_P3P_TYPE(vha->hw)) {
9189 		fcport->fcp_prio = priority & 0xf;
9190 		return QLA_SUCCESS;
9191 	}
9192 
9193 	ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
9194 	if (ret == QLA_SUCCESS) {
9195 		if (fcport->fcp_prio != priority)
9196 			ql_dbg(ql_dbg_user, vha, 0x709e,
9197 			    "Updated FCP_CMND priority - value=%d loop_id=%d "
9198 			    "port_id=%02x%02x%02x.\n", priority,
9199 			    fcport->loop_id, fcport->d_id.b.domain,
9200 			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
9201 		fcport->fcp_prio = priority & 0xf;
9202 	} else
9203 		ql_dbg(ql_dbg_user, vha, 0x704f,
9204 		    "Unable to update FCP_CMND priority - ret=0x%x for "
9205 		    "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
9206 		    fcport->d_id.b.domain, fcport->d_id.b.area,
9207 		    fcport->d_id.b.al_pa);
9208 	return  ret;
9209 }
9210 
9211 /*
9212  * qla24xx_update_all_fcp_prio
9213  *	Activates fcp priority for all the logged in ports
9214  *
9215  * Input:
9216  *	ha = adapter block pointer.
9217  *
9218  * Return:
9219  *	QLA_SUCCESS or QLA_FUNCTION_FAILED
9220  *
9221  * Context:
9222  *	Kernel context.
9223  */
9224 int
9225 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
9226 {
9227 	int ret;
9228 	fc_port_t *fcport;
9229 
9230 	ret = QLA_FUNCTION_FAILED;
9231 	/* We need to set priority for all logged in ports */
9232 	list_for_each_entry(fcport, &vha->vp_fcports, list)
9233 		ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
9234 
9235 	return ret;
9236 }
9237 
9238 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
9239 	int vp_idx, bool startqp)
9240 {
9241 	int rsp_id = 0;
9242 	int  req_id = 0;
9243 	int i;
9244 	struct qla_hw_data *ha = vha->hw;
9245 	uint16_t qpair_id = 0;
9246 	struct qla_qpair *qpair = NULL;
9247 	struct qla_msix_entry *msix;
9248 
9249 	if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
9250 		ql_log(ql_log_warn, vha, 0x00181,
9251 		    "FW/Driver is not multi-queue capable.\n");
9252 		return NULL;
9253 	}
9254 
9255 	if (ql2xmqsupport || ql2xnvmeenable) {
9256 		qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
9257 		if (qpair == NULL) {
9258 			ql_log(ql_log_warn, vha, 0x0182,
9259 			    "Failed to allocate memory for queue pair.\n");
9260 			return NULL;
9261 		}
9262 
9263 		qpair->hw = vha->hw;
9264 		qpair->vha = vha;
9265 		qpair->qp_lock_ptr = &qpair->qp_lock;
9266 		spin_lock_init(&qpair->qp_lock);
9267 		qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
9268 
9269 		/* Assign available que pair id */
9270 		mutex_lock(&ha->mq_lock);
9271 		qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
9272 		if (ha->num_qpairs >= ha->max_qpairs) {
9273 			mutex_unlock(&ha->mq_lock);
9274 			ql_log(ql_log_warn, vha, 0x0183,
9275 			    "No resources to create additional q pair.\n");
9276 			goto fail_qid_map;
9277 		}
9278 		ha->num_qpairs++;
9279 		set_bit(qpair_id, ha->qpair_qid_map);
9280 		ha->queue_pair_map[qpair_id] = qpair;
9281 		qpair->id = qpair_id;
9282 		qpair->vp_idx = vp_idx;
9283 		qpair->fw_started = ha->flags.fw_started;
9284 		INIT_LIST_HEAD(&qpair->hints_list);
9285 		qpair->chip_reset = ha->base_qpair->chip_reset;
9286 		qpair->enable_class_2 = ha->base_qpair->enable_class_2;
9287 		qpair->enable_explicit_conf =
9288 		    ha->base_qpair->enable_explicit_conf;
9289 
9290 		for (i = 0; i < ha->msix_count; i++) {
9291 			msix = &ha->msix_entries[i];
9292 			if (msix->in_use)
9293 				continue;
9294 			qpair->msix = msix;
9295 			ql_dbg(ql_dbg_multiq, vha, 0xc00f,
9296 			    "Vector %x selected for qpair\n", msix->vector);
9297 			break;
9298 		}
9299 		if (!qpair->msix) {
9300 			ql_log(ql_log_warn, vha, 0x0184,
9301 			    "Out of MSI-X vectors!.\n");
9302 			goto fail_msix;
9303 		}
9304 
9305 		qpair->msix->in_use = 1;
9306 		list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
9307 		qpair->pdev = ha->pdev;
9308 		if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
9309 			qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
9310 
9311 		mutex_unlock(&ha->mq_lock);
9312 
9313 		/* Create response queue first */
9314 		rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
9315 		if (!rsp_id) {
9316 			ql_log(ql_log_warn, vha, 0x0185,
9317 			    "Failed to create response queue.\n");
9318 			goto fail_rsp;
9319 		}
9320 
9321 		qpair->rsp = ha->rsp_q_map[rsp_id];
9322 
9323 		/* Create request queue */
9324 		req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
9325 		    startqp);
9326 		if (!req_id) {
9327 			ql_log(ql_log_warn, vha, 0x0186,
9328 			    "Failed to create request queue.\n");
9329 			goto fail_req;
9330 		}
9331 
9332 		qpair->req = ha->req_q_map[req_id];
9333 		qpair->rsp->req = qpair->req;
9334 		qpair->rsp->qpair = qpair;
9335 		/* init qpair to this cpu. Will adjust at run time. */
9336 		qla_cpu_update(qpair, smp_processor_id());
9337 
9338 		if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
9339 			if (ha->fw_attributes & BIT_4)
9340 				qpair->difdix_supported = 1;
9341 		}
9342 
9343 		qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9344 		if (!qpair->srb_mempool) {
9345 			ql_log(ql_log_warn, vha, 0xd036,
9346 			    "Failed to create srb mempool for qpair %d\n",
9347 			    qpair->id);
9348 			goto fail_mempool;
9349 		}
9350 
9351 		/* Mark as online */
9352 		qpair->online = 1;
9353 
9354 		if (!vha->flags.qpairs_available)
9355 			vha->flags.qpairs_available = 1;
9356 
9357 		ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9358 		    "Request/Response queue pair created, id %d\n",
9359 		    qpair->id);
9360 		ql_dbg(ql_dbg_init, vha, 0x0187,
9361 		    "Request/Response queue pair created, id %d\n",
9362 		    qpair->id);
9363 	}
9364 	return qpair;
9365 
9366 fail_mempool:
9367 fail_req:
9368 	qla25xx_delete_rsp_que(vha, qpair->rsp);
9369 fail_rsp:
9370 	mutex_lock(&ha->mq_lock);
9371 	qpair->msix->in_use = 0;
9372 	list_del(&qpair->qp_list_elem);
9373 	if (list_empty(&vha->qp_list))
9374 		vha->flags.qpairs_available = 0;
9375 fail_msix:
9376 	ha->queue_pair_map[qpair_id] = NULL;
9377 	clear_bit(qpair_id, ha->qpair_qid_map);
9378 	ha->num_qpairs--;
9379 	mutex_unlock(&ha->mq_lock);
9380 fail_qid_map:
9381 	kfree(qpair);
9382 	return NULL;
9383 }
9384 
9385 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9386 {
9387 	int ret = QLA_FUNCTION_FAILED;
9388 	struct qla_hw_data *ha = qpair->hw;
9389 
9390 	qpair->delete_in_progress = 1;
9391 
9392 	ret = qla25xx_delete_req_que(vha, qpair->req);
9393 	if (ret != QLA_SUCCESS)
9394 		goto fail;
9395 
9396 	ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9397 	if (ret != QLA_SUCCESS)
9398 		goto fail;
9399 
9400 	mutex_lock(&ha->mq_lock);
9401 	ha->queue_pair_map[qpair->id] = NULL;
9402 	clear_bit(qpair->id, ha->qpair_qid_map);
9403 	ha->num_qpairs--;
9404 	list_del(&qpair->qp_list_elem);
9405 	if (list_empty(&vha->qp_list)) {
9406 		vha->flags.qpairs_available = 0;
9407 		vha->flags.qpairs_req_created = 0;
9408 		vha->flags.qpairs_rsp_created = 0;
9409 	}
9410 	mempool_destroy(qpair->srb_mempool);
9411 	kfree(qpair);
9412 	mutex_unlock(&ha->mq_lock);
9413 
9414 	return QLA_SUCCESS;
9415 fail:
9416 	return ret;
9417 }
9418 
9419 uint64_t
9420 qla2x00_count_set_bits(uint32_t num)
9421 {
9422 	/* Brian Kernighan's Algorithm */
9423 	u64 count = 0;
9424 
9425 	while (num) {
9426 		num &= (num - 1);
9427 		count++;
9428 	}
9429 	return count;
9430 }
9431 
9432 uint64_t
9433 qla2x00_get_num_tgts(scsi_qla_host_t *vha)
9434 {
9435 	fc_port_t *f, *tf;
9436 	u64 count = 0;
9437 
9438 	f = NULL;
9439 	tf = NULL;
9440 
9441 	list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
9442 		if (f->port_type != FCT_TARGET)
9443 			continue;
9444 		count++;
9445 	}
9446 	return count;
9447 }
9448 
9449 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags)
9450 {
9451 	scsi_qla_host_t *vha = shost_priv(host);
9452 	fc_port_t *fcport = NULL;
9453 	unsigned long int_flags;
9454 
9455 	if (flags & QLA2XX_HW_ERROR)
9456 		vha->hw_err_cnt = 0;
9457 	if (flags & QLA2XX_SHT_LNK_DWN)
9458 		vha->short_link_down_cnt = 0;
9459 	if (flags & QLA2XX_INT_ERR)
9460 		vha->interface_err_cnt = 0;
9461 	if (flags & QLA2XX_CMD_TIMEOUT)
9462 		vha->cmd_timeout_cnt = 0;
9463 	if (flags & QLA2XX_RESET_CMD_ERR)
9464 		vha->reset_cmd_err_cnt = 0;
9465 	if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
9466 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
9467 		list_for_each_entry(fcport, &vha->vp_fcports, list) {
9468 			fcport->tgt_short_link_down_cnt = 0;
9469 			fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9470 		}
9471 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
9472 	}
9473 	vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9474 	return 0;
9475 }
9476 
9477 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags)
9478 {
9479 	return qla2xxx_reset_stats(host, flags);
9480 }
9481 
9482 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags)
9483 {
9484 	return qla2xxx_reset_stats(host, flags);
9485 }
9486 
9487 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags,
9488 			  void *data, u64 size)
9489 {
9490 	scsi_qla_host_t *vha = shost_priv(host);
9491 	struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data;
9492 	struct ql_vnd_stats *rsp_data = &resp->stats;
9493 	u64 ini_entry_count = 0;
9494 	u64 i = 0;
9495 	u64 entry_count = 0;
9496 	u64 num_tgt = 0;
9497 	u32 tmp_stat_type = 0;
9498 	fc_port_t *fcport = NULL;
9499 	unsigned long int_flags;
9500 
9501 	/* Copy stat type to work on it */
9502 	tmp_stat_type = flags;
9503 
9504 	if (tmp_stat_type & BIT_17) {
9505 		num_tgt = qla2x00_get_num_tgts(vha);
9506 		/* unset BIT_17 */
9507 		tmp_stat_type &= ~(1 << 17);
9508 	}
9509 	ini_entry_count = qla2x00_count_set_bits(tmp_stat_type);
9510 
9511 	entry_count = ini_entry_count + num_tgt;
9512 
9513 	rsp_data->entry_count = entry_count;
9514 
9515 	i = 0;
9516 	if (flags & QLA2XX_HW_ERROR) {
9517 		rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR;
9518 		rsp_data->entry[i].tgt_num = 0x0;
9519 		rsp_data->entry[i].cnt = vha->hw_err_cnt;
9520 		i++;
9521 	}
9522 
9523 	if (flags & QLA2XX_SHT_LNK_DWN) {
9524 		rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN;
9525 		rsp_data->entry[i].tgt_num = 0x0;
9526 		rsp_data->entry[i].cnt = vha->short_link_down_cnt;
9527 		i++;
9528 	}
9529 
9530 	if (flags & QLA2XX_INT_ERR) {
9531 		rsp_data->entry[i].stat_type = QLA2XX_INT_ERR;
9532 		rsp_data->entry[i].tgt_num = 0x0;
9533 		rsp_data->entry[i].cnt = vha->interface_err_cnt;
9534 		i++;
9535 	}
9536 
9537 	if (flags & QLA2XX_CMD_TIMEOUT) {
9538 		rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT;
9539 		rsp_data->entry[i].tgt_num = 0x0;
9540 		rsp_data->entry[i].cnt = vha->cmd_timeout_cnt;
9541 		i++;
9542 	}
9543 
9544 	if (flags & QLA2XX_RESET_CMD_ERR) {
9545 		rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR;
9546 		rsp_data->entry[i].tgt_num = 0x0;
9547 		rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt;
9548 		i++;
9549 	}
9550 
9551 	/* i will continue from previous loop, as target
9552 	 * entries are after initiator
9553 	 */
9554 	if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
9555 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
9556 		list_for_each_entry(fcport, &vha->vp_fcports, list) {
9557 			if (fcport->port_type != FCT_TARGET)
9558 				continue;
9559 			if (!fcport->rport)
9560 				continue;
9561 			rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN;
9562 			rsp_data->entry[i].tgt_num = fcport->rport->number;
9563 			rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt;
9564 			i++;
9565 		}
9566 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
9567 	}
9568 	resp->status = EXT_STATUS_OK;
9569 
9570 	return 0;
9571 }
9572 
9573 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags,
9574 			  struct fc_rport *rport, void *data, u64 size)
9575 {
9576 	struct ql_vnd_tgt_stats_resp *tgt_data = data;
9577 	fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
9578 
9579 	tgt_data->status = 0;
9580 	tgt_data->stats.entry_count = 1;
9581 	tgt_data->stats.entry[0].stat_type = flags;
9582 	tgt_data->stats.entry[0].tgt_num = rport->number;
9583 	tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt;
9584 
9585 	return 0;
9586 }
9587 
9588 int qla2xxx_disable_port(struct Scsi_Host *host)
9589 {
9590 	scsi_qla_host_t *vha = shost_priv(host);
9591 
9592 	vha->hw->flags.port_isolated = 1;
9593 
9594 	if (qla2x00_chip_is_down(vha))
9595 		return 0;
9596 
9597 	if (vha->flags.online) {
9598 		qla2x00_abort_isp_cleanup(vha);
9599 		qla2x00_wait_for_sess_deletion(vha);
9600 	}
9601 
9602 	return 0;
9603 }
9604 
9605 int qla2xxx_enable_port(struct Scsi_Host *host)
9606 {
9607 	scsi_qla_host_t *vha = shost_priv(host);
9608 
9609 	vha->hw->flags.port_isolated = 0;
9610 	/* Set the flag to 1, so that isp_abort can proceed */
9611 	vha->flags.online = 1;
9612 	set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
9613 	qla2xxx_wake_dpc(vha);
9614 
9615 	return 0;
9616 }
9617