1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 scsi_qla_host_t *vha = sp->vha; 54 struct req_que *req; 55 unsigned long flags; 56 57 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 58 req = vha->hw->req_q_map[0]; 59 req->outstanding_cmds[sp->handle] = NULL; 60 iocb = &sp->u.iocb_cmd; 61 iocb->timeout(sp); 62 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 63 } 64 65 void 66 qla2x00_sp_free(void *ptr) 67 { 68 srb_t *sp = ptr; 69 struct srb_iocb *iocb = &sp->u.iocb_cmd; 70 71 del_timer(&iocb->timer); 72 qla2x00_rel_sp(sp); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (IS_QLAFX00(ha)) { 86 tmo = FX00_DEF_RATOV * 2; 87 } else if (!IS_FWI2_CAPABLE(ha)) { 88 /* 89 * Except for earlier ISPs where the timeout is seeded from the 90 * initialization control block. 91 */ 92 tmo = ha->login_timeout; 93 } 94 return tmo; 95 } 96 97 void 98 qla2x00_async_iocb_timeout(void *data) 99 { 100 srb_t *sp = data; 101 fc_port_t *fcport = sp->fcport; 102 struct srb_iocb *lio = &sp->u.iocb_cmd; 103 104 if (fcport) { 105 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 106 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 107 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 108 109 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 110 } else { 111 pr_info("Async-%s timeout - hdl=%x.\n", 112 sp->name, sp->handle); 113 } 114 115 switch (sp->type) { 116 case SRB_LOGIN_CMD: 117 /* Retry as needed. */ 118 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 119 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 120 QLA_LOGIO_LOGIN_RETRIED : 0; 121 sp->done(sp, QLA_FUNCTION_TIMEOUT); 122 break; 123 case SRB_LOGOUT_CMD: 124 case SRB_CT_PTHRU_CMD: 125 case SRB_MB_IOCB: 126 case SRB_NACK_PLOGI: 127 case SRB_NACK_PRLI: 128 case SRB_NACK_LOGO: 129 case SRB_CTRL_VP: 130 sp->done(sp, QLA_FUNCTION_TIMEOUT); 131 break; 132 } 133 } 134 135 static void 136 qla2x00_async_login_sp_done(void *ptr, int res) 137 { 138 srb_t *sp = ptr; 139 struct scsi_qla_host *vha = sp->vha; 140 struct srb_iocb *lio = &sp->u.iocb_cmd; 141 struct event_arg ea; 142 143 ql_dbg(ql_dbg_disc, vha, 0x20dd, 144 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 145 146 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 147 148 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 149 memset(&ea, 0, sizeof(ea)); 150 ea.event = FCME_PLOGI_DONE; 151 ea.fcport = sp->fcport; 152 ea.data[0] = lio->u.logio.data[0]; 153 ea.data[1] = lio->u.logio.data[1]; 154 ea.iop[0] = lio->u.logio.iop[0]; 155 ea.iop[1] = lio->u.logio.iop[1]; 156 ea.sp = sp; 157 qla2x00_fcport_event_handler(vha, &ea); 158 } 159 160 sp->free(sp); 161 } 162 163 int 164 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 165 uint16_t *data) 166 { 167 srb_t *sp; 168 struct srb_iocb *lio; 169 int rval = QLA_FUNCTION_FAILED; 170 171 if (!vha->flags.online) 172 goto done; 173 174 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 175 if (!sp) 176 goto done; 177 178 fcport->flags |= FCF_ASYNC_SENT; 179 fcport->logout_completed = 0; 180 181 fcport->disc_state = DSC_LOGIN_PEND; 182 sp->type = SRB_LOGIN_CMD; 183 sp->name = "login"; 184 sp->gen1 = fcport->rscn_gen; 185 sp->gen2 = fcport->login_gen; 186 187 lio = &sp->u.iocb_cmd; 188 lio->timeout = qla2x00_async_iocb_timeout; 189 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 190 191 sp->done = qla2x00_async_login_sp_done; 192 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 193 194 if (fcport->fc4f_nvme) 195 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 196 197 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 198 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 199 rval = qla2x00_start_sp(sp); 200 if (rval != QLA_SUCCESS) { 201 fcport->flags |= FCF_LOGIN_NEEDED; 202 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 203 goto done_free_sp; 204 } 205 206 ql_dbg(ql_dbg_disc, vha, 0x2072, 207 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 208 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 209 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 210 fcport->login_retry); 211 return rval; 212 213 done_free_sp: 214 sp->free(sp); 215 fcport->flags &= ~FCF_ASYNC_SENT; 216 done: 217 fcport->flags &= ~FCF_ASYNC_ACTIVE; 218 return rval; 219 } 220 221 static void 222 qla2x00_async_logout_sp_done(void *ptr, int res) 223 { 224 srb_t *sp = ptr; 225 226 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 227 sp->fcport->login_gen++; 228 qlt_logo_completion_handler(sp->fcport, res); 229 sp->free(sp); 230 } 231 232 int 233 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 234 { 235 srb_t *sp; 236 struct srb_iocb *lio; 237 int rval = QLA_FUNCTION_FAILED; 238 239 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 240 return rval; 241 242 fcport->flags |= FCF_ASYNC_SENT; 243 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 244 if (!sp) 245 goto done; 246 247 sp->type = SRB_LOGOUT_CMD; 248 sp->name = "logout"; 249 250 lio = &sp->u.iocb_cmd; 251 lio->timeout = qla2x00_async_iocb_timeout; 252 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 253 254 sp->done = qla2x00_async_logout_sp_done; 255 rval = qla2x00_start_sp(sp); 256 if (rval != QLA_SUCCESS) 257 goto done_free_sp; 258 259 ql_dbg(ql_dbg_disc, vha, 0x2070, 260 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 261 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 262 fcport->d_id.b.area, fcport->d_id.b.al_pa, 263 fcport->port_name); 264 return rval; 265 266 done_free_sp: 267 sp->free(sp); 268 done: 269 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 270 return rval; 271 } 272 273 void 274 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 275 uint16_t *data) 276 { 277 fcport->flags &= ~FCF_ASYNC_ACTIVE; 278 /* Don't re-login in target mode */ 279 if (!fcport->tgt_session) 280 qla2x00_mark_device_lost(vha, fcport, 1, 0); 281 qlt_logo_completion_handler(fcport, data[0]); 282 } 283 284 static void 285 qla2x00_async_prlo_sp_done(void *s, int res) 286 { 287 srb_t *sp = (srb_t *)s; 288 struct srb_iocb *lio = &sp->u.iocb_cmd; 289 struct scsi_qla_host *vha = sp->vha; 290 291 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 292 if (!test_bit(UNLOADING, &vha->dpc_flags)) 293 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 294 lio->u.logio.data); 295 sp->free(sp); 296 } 297 298 int 299 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 300 { 301 srb_t *sp; 302 struct srb_iocb *lio; 303 int rval; 304 305 rval = QLA_FUNCTION_FAILED; 306 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 307 if (!sp) 308 goto done; 309 310 sp->type = SRB_PRLO_CMD; 311 sp->name = "prlo"; 312 313 lio = &sp->u.iocb_cmd; 314 lio->timeout = qla2x00_async_iocb_timeout; 315 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 316 317 sp->done = qla2x00_async_prlo_sp_done; 318 rval = qla2x00_start_sp(sp); 319 if (rval != QLA_SUCCESS) 320 goto done_free_sp; 321 322 ql_dbg(ql_dbg_disc, vha, 0x2070, 323 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 324 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 325 fcport->d_id.b.area, fcport->d_id.b.al_pa); 326 return rval; 327 328 done_free_sp: 329 sp->free(sp); 330 done: 331 fcport->flags &= ~FCF_ASYNC_ACTIVE; 332 return rval; 333 } 334 335 static 336 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 337 { 338 struct fc_port *fcport = ea->fcport; 339 340 ql_dbg(ql_dbg_disc, vha, 0x20d2, 341 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 342 __func__, fcport->port_name, fcport->disc_state, 343 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 344 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 345 346 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 347 ql_dbg(ql_dbg_disc, vha, 0x2066, 348 "%s %8phC: adisc fail: post delete\n", 349 __func__, ea->fcport->port_name); 350 qlt_schedule_sess_for_deletion(ea->fcport); 351 return; 352 } 353 354 if (ea->fcport->disc_state == DSC_DELETE_PEND) 355 return; 356 357 if (ea->sp->gen2 != ea->fcport->login_gen) { 358 /* target side must have changed it. */ 359 ql_dbg(ql_dbg_disc, vha, 0x20d3, 360 "%s %8phC generation changed\n", 361 __func__, ea->fcport->port_name); 362 return; 363 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 364 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 365 __func__, __LINE__, ea->fcport->port_name); 366 qla24xx_post_gidpn_work(vha, ea->fcport); 367 return; 368 } 369 370 __qla24xx_handle_gpdb_event(vha, ea); 371 } 372 373 static void 374 qla2x00_async_adisc_sp_done(void *ptr, int res) 375 { 376 srb_t *sp = ptr; 377 struct scsi_qla_host *vha = sp->vha; 378 struct event_arg ea; 379 struct srb_iocb *lio = &sp->u.iocb_cmd; 380 381 ql_dbg(ql_dbg_disc, vha, 0x2066, 382 "Async done-%s res %x %8phC\n", 383 sp->name, res, sp->fcport->port_name); 384 385 sp->fcport->flags &= ~FCF_ASYNC_SENT; 386 387 memset(&ea, 0, sizeof(ea)); 388 ea.event = FCME_ADISC_DONE; 389 ea.rc = res; 390 ea.data[0] = lio->u.logio.data[0]; 391 ea.data[1] = lio->u.logio.data[1]; 392 ea.iop[0] = lio->u.logio.iop[0]; 393 ea.iop[1] = lio->u.logio.iop[1]; 394 ea.fcport = sp->fcport; 395 ea.sp = sp; 396 397 qla2x00_fcport_event_handler(vha, &ea); 398 399 sp->free(sp); 400 } 401 402 int 403 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 404 uint16_t *data) 405 { 406 srb_t *sp; 407 struct srb_iocb *lio; 408 int rval; 409 410 rval = QLA_FUNCTION_FAILED; 411 fcport->flags |= FCF_ASYNC_SENT; 412 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 413 if (!sp) 414 goto done; 415 416 sp->type = SRB_ADISC_CMD; 417 sp->name = "adisc"; 418 419 lio = &sp->u.iocb_cmd; 420 lio->timeout = qla2x00_async_iocb_timeout; 421 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 422 423 sp->done = qla2x00_async_adisc_sp_done; 424 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 425 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 426 rval = qla2x00_start_sp(sp); 427 if (rval != QLA_SUCCESS) 428 goto done_free_sp; 429 430 ql_dbg(ql_dbg_disc, vha, 0x206f, 431 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 432 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 433 return rval; 434 435 done_free_sp: 436 sp->free(sp); 437 done: 438 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 439 qla2x00_post_async_adisc_work(vha, fcport, data); 440 return rval; 441 } 442 443 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 444 struct event_arg *ea) 445 { 446 fc_port_t *fcport, *conflict_fcport; 447 struct get_name_list_extended *e; 448 u16 i, n, found = 0, loop_id; 449 port_id_t id; 450 u64 wwn; 451 u16 data[2]; 452 u8 current_login_state; 453 454 fcport = ea->fcport; 455 ql_dbg(ql_dbg_disc, vha, 0xffff, 456 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 457 __func__, fcport->port_name, fcport->disc_state, 458 fcport->fw_login_state, ea->rc, 459 fcport->login_gen, fcport->last_login_gen, 460 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 461 462 if (fcport->disc_state == DSC_DELETE_PEND) 463 return; 464 465 if (ea->rc) { /* rval */ 466 if (fcport->login_retry == 0) { 467 fcport->login_retry = vha->hw->login_retry_count; 468 ql_dbg(ql_dbg_disc, vha, 0x20de, 469 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 470 fcport->port_name, fcport->login_retry); 471 } 472 return; 473 } 474 475 if (fcport->last_rscn_gen != fcport->rscn_gen) { 476 ql_dbg(ql_dbg_disc, vha, 0x20df, 477 "%s %8phC rscn gen changed rscn %d|%d \n", 478 __func__, fcport->port_name, 479 fcport->last_rscn_gen, fcport->rscn_gen); 480 qla24xx_post_gidpn_work(vha, fcport); 481 return; 482 } else if (fcport->last_login_gen != fcport->login_gen) { 483 ql_dbg(ql_dbg_disc, vha, 0x20e0, 484 "%s %8phC login gen changed\n", 485 __func__, fcport->port_name); 486 return; 487 } 488 489 n = ea->data[0] / sizeof(struct get_name_list_extended); 490 491 ql_dbg(ql_dbg_disc, vha, 0x20e1, 492 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 493 __func__, __LINE__, fcport->port_name, n, 494 fcport->d_id.b.domain, fcport->d_id.b.area, 495 fcport->d_id.b.al_pa, fcport->loop_id); 496 497 for (i = 0; i < n; i++) { 498 e = &vha->gnl.l[i]; 499 wwn = wwn_to_u64(e->port_name); 500 501 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 502 continue; 503 504 found = 1; 505 id.b.domain = e->port_id[2]; 506 id.b.area = e->port_id[1]; 507 id.b.al_pa = e->port_id[0]; 508 id.b.rsvd_1 = 0; 509 510 loop_id = le16_to_cpu(e->nport_handle); 511 loop_id = (loop_id & 0x7fff); 512 513 ql_dbg(ql_dbg_disc, vha, 0x20e2, 514 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 515 __func__, fcport->port_name, 516 e->current_login_state, fcport->fw_login_state, 517 id.b.domain, id.b.area, id.b.al_pa, 518 fcport->d_id.b.domain, fcport->d_id.b.area, 519 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 520 521 if ((id.b24 != fcport->d_id.b24) || 522 ((fcport->loop_id != FC_NO_LOOP_ID) && 523 (fcport->loop_id != loop_id))) { 524 ql_dbg(ql_dbg_disc, vha, 0x20e3, 525 "%s %d %8phC post del sess\n", 526 __func__, __LINE__, fcport->port_name); 527 qlt_schedule_sess_for_deletion(fcport); 528 return; 529 } 530 531 fcport->loop_id = loop_id; 532 533 wwn = wwn_to_u64(fcport->port_name); 534 qlt_find_sess_invalidate_other(vha, wwn, 535 id, loop_id, &conflict_fcport); 536 537 if (conflict_fcport) { 538 /* 539 * Another share fcport share the same loop_id & 540 * nport id. Conflict fcport needs to finish 541 * cleanup before this fcport can proceed to login. 542 */ 543 conflict_fcport->conflict = fcport; 544 fcport->login_pause = 1; 545 } 546 547 if (fcport->fc4f_nvme) 548 current_login_state = e->current_login_state >> 4; 549 else 550 current_login_state = e->current_login_state & 0xf; 551 552 switch (current_login_state) { 553 case DSC_LS_PRLI_COMP: 554 ql_dbg(ql_dbg_disc, vha, 0x20e4, 555 "%s %d %8phC post gpdb\n", 556 __func__, __LINE__, fcport->port_name); 557 558 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 559 fcport->port_type = FCT_INITIATOR; 560 else 561 fcport->port_type = FCT_TARGET; 562 563 data[0] = data[1] = 0; 564 qla2x00_post_async_adisc_work(vha, fcport, data); 565 break; 566 case DSC_LS_PORT_UNAVAIL: 567 default: 568 if (fcport->loop_id == FC_NO_LOOP_ID) { 569 qla2x00_find_new_loop_id(vha, fcport); 570 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 571 } 572 ql_dbg(ql_dbg_disc, vha, 0x20e5, 573 "%s %d %8phC\n", 574 __func__, __LINE__, fcport->port_name); 575 qla24xx_fcport_handle_login(vha, fcport); 576 break; 577 } 578 } 579 580 if (!found) { 581 /* fw has no record of this port */ 582 for (i = 0; i < n; i++) { 583 e = &vha->gnl.l[i]; 584 id.b.domain = e->port_id[0]; 585 id.b.area = e->port_id[1]; 586 id.b.al_pa = e->port_id[2]; 587 id.b.rsvd_1 = 0; 588 loop_id = le16_to_cpu(e->nport_handle); 589 590 if (fcport->d_id.b24 == id.b24) { 591 conflict_fcport = 592 qla2x00_find_fcport_by_wwpn(vha, 593 e->port_name, 0); 594 ql_dbg(ql_dbg_disc, vha, 0x20e6, 595 "%s %d %8phC post del sess\n", 596 __func__, __LINE__, 597 conflict_fcport->port_name); 598 qlt_schedule_sess_for_deletion 599 (conflict_fcport); 600 } 601 602 /* FW already picked this loop id for another fcport */ 603 if (fcport->loop_id == loop_id) 604 fcport->loop_id = FC_NO_LOOP_ID; 605 } 606 qla24xx_fcport_handle_login(vha, fcport); 607 } 608 } /* gnl_event */ 609 610 static void 611 qla24xx_async_gnl_sp_done(void *s, int res) 612 { 613 struct srb *sp = s; 614 struct scsi_qla_host *vha = sp->vha; 615 unsigned long flags; 616 struct fc_port *fcport = NULL, *tf; 617 u16 i, n = 0, loop_id; 618 struct event_arg ea; 619 struct get_name_list_extended *e; 620 u64 wwn; 621 struct list_head h; 622 bool found = false; 623 624 ql_dbg(ql_dbg_disc, vha, 0x20e7, 625 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 626 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 627 sp->u.iocb_cmd.u.mbx.in_mb[2]); 628 629 memset(&ea, 0, sizeof(ea)); 630 ea.sp = sp; 631 ea.rc = res; 632 ea.event = FCME_GNL_DONE; 633 634 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 635 sizeof(struct get_name_list_extended)) { 636 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 637 sizeof(struct get_name_list_extended); 638 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 639 } 640 641 for (i = 0; i < n; i++) { 642 e = &vha->gnl.l[i]; 643 loop_id = le16_to_cpu(e->nport_handle); 644 /* mask out reserve bit */ 645 loop_id = (loop_id & 0x7fff); 646 set_bit(loop_id, vha->hw->loop_id_map); 647 wwn = wwn_to_u64(e->port_name); 648 649 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 650 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 651 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 652 e->port_id[0], e->current_login_state, e->last_login_state, 653 (loop_id & 0x7fff)); 654 } 655 656 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 657 658 INIT_LIST_HEAD(&h); 659 fcport = tf = NULL; 660 if (!list_empty(&vha->gnl.fcports)) 661 list_splice_init(&vha->gnl.fcports, &h); 662 663 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 664 list_del_init(&fcport->gnl_entry); 665 spin_lock(&vha->hw->tgt.sess_lock); 666 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 667 spin_unlock(&vha->hw->tgt.sess_lock); 668 ea.fcport = fcport; 669 670 qla2x00_fcport_event_handler(vha, &ea); 671 } 672 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 673 674 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 675 /* create new fcport if fw has knowledge of new sessions */ 676 for (i = 0; i < n; i++) { 677 port_id_t id; 678 u64 wwnn; 679 680 e = &vha->gnl.l[i]; 681 wwn = wwn_to_u64(e->port_name); 682 683 found = false; 684 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 685 if (!memcmp((u8 *)&wwn, fcport->port_name, 686 WWN_SIZE)) { 687 found = true; 688 break; 689 } 690 } 691 692 id.b.domain = e->port_id[2]; 693 id.b.area = e->port_id[1]; 694 id.b.al_pa = e->port_id[0]; 695 id.b.rsvd_1 = 0; 696 697 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 698 ql_dbg(ql_dbg_disc, vha, 0x2065, 699 "%s %d %8phC %06x post new sess\n", 700 __func__, __LINE__, (u8 *)&wwn, id.b24); 701 wwnn = wwn_to_u64(e->node_name); 702 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 703 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 704 } 705 } 706 707 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 708 709 sp->free(sp); 710 } 711 712 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 713 { 714 srb_t *sp; 715 struct srb_iocb *mbx; 716 int rval = QLA_FUNCTION_FAILED; 717 unsigned long flags; 718 u16 *mb; 719 720 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 721 return rval; 722 723 ql_dbg(ql_dbg_disc, vha, 0x20d9, 724 "Async-gnlist WWPN %8phC \n", fcport->port_name); 725 726 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 727 if (!list_empty(&fcport->gnl_entry)) { 728 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 729 rval = QLA_SUCCESS; 730 goto done; 731 } 732 733 spin_lock(&vha->hw->tgt.sess_lock); 734 fcport->disc_state = DSC_GNL; 735 fcport->last_rscn_gen = fcport->rscn_gen; 736 fcport->last_login_gen = fcport->login_gen; 737 spin_unlock(&vha->hw->tgt.sess_lock); 738 739 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 740 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 741 742 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 743 if (!sp) 744 goto done; 745 746 fcport->flags |= FCF_ASYNC_SENT; 747 sp->type = SRB_MB_IOCB; 748 sp->name = "gnlist"; 749 sp->gen1 = fcport->rscn_gen; 750 sp->gen2 = fcport->login_gen; 751 752 mbx = &sp->u.iocb_cmd; 753 mbx->timeout = qla2x00_async_iocb_timeout; 754 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 755 756 mb = sp->u.iocb_cmd.u.mbx.out_mb; 757 mb[0] = MBC_PORT_NODE_NAME_LIST; 758 mb[1] = BIT_2 | BIT_3; 759 mb[2] = MSW(vha->gnl.ldma); 760 mb[3] = LSW(vha->gnl.ldma); 761 mb[6] = MSW(MSD(vha->gnl.ldma)); 762 mb[7] = LSW(MSD(vha->gnl.ldma)); 763 mb[8] = vha->gnl.size; 764 mb[9] = vha->vp_idx; 765 766 sp->done = qla24xx_async_gnl_sp_done; 767 768 rval = qla2x00_start_sp(sp); 769 if (rval != QLA_SUCCESS) 770 goto done_free_sp; 771 772 ql_dbg(ql_dbg_disc, vha, 0x20da, 773 "Async-%s - OUT WWPN %8phC hndl %x\n", 774 sp->name, fcport->port_name, sp->handle); 775 776 return rval; 777 778 done_free_sp: 779 sp->free(sp); 780 fcport->flags &= ~FCF_ASYNC_SENT; 781 done: 782 return rval; 783 } 784 785 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 786 { 787 struct qla_work_evt *e; 788 789 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 790 if (!e) 791 return QLA_FUNCTION_FAILED; 792 793 e->u.fcport.fcport = fcport; 794 fcport->flags |= FCF_ASYNC_ACTIVE; 795 return qla2x00_post_work(vha, e); 796 } 797 798 static 799 void qla24xx_async_gpdb_sp_done(void *s, int res) 800 { 801 struct srb *sp = s; 802 struct scsi_qla_host *vha = sp->vha; 803 struct qla_hw_data *ha = vha->hw; 804 fc_port_t *fcport = sp->fcport; 805 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 806 struct event_arg ea; 807 808 ql_dbg(ql_dbg_disc, vha, 0x20db, 809 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 810 sp->name, res, fcport->port_name, mb[1], mb[2]); 811 812 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 813 814 memset(&ea, 0, sizeof(ea)); 815 ea.event = FCME_GPDB_DONE; 816 ea.fcport = fcport; 817 ea.sp = sp; 818 819 qla2x00_fcport_event_handler(vha, &ea); 820 821 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 822 sp->u.iocb_cmd.u.mbx.in_dma); 823 824 sp->free(sp); 825 } 826 827 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 828 { 829 struct qla_work_evt *e; 830 831 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 832 if (!e) 833 return QLA_FUNCTION_FAILED; 834 835 e->u.fcport.fcport = fcport; 836 837 return qla2x00_post_work(vha, e); 838 } 839 840 static void 841 qla2x00_async_prli_sp_done(void *ptr, int res) 842 { 843 srb_t *sp = ptr; 844 struct scsi_qla_host *vha = sp->vha; 845 struct srb_iocb *lio = &sp->u.iocb_cmd; 846 struct event_arg ea; 847 848 ql_dbg(ql_dbg_disc, vha, 0x2129, 849 "%s %8phC res %d \n", __func__, 850 sp->fcport->port_name, res); 851 852 sp->fcport->flags &= ~FCF_ASYNC_SENT; 853 854 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 855 memset(&ea, 0, sizeof(ea)); 856 ea.event = FCME_PRLI_DONE; 857 ea.fcport = sp->fcport; 858 ea.data[0] = lio->u.logio.data[0]; 859 ea.data[1] = lio->u.logio.data[1]; 860 ea.iop[0] = lio->u.logio.iop[0]; 861 ea.iop[1] = lio->u.logio.iop[1]; 862 ea.sp = sp; 863 864 qla2x00_fcport_event_handler(vha, &ea); 865 } 866 867 sp->free(sp); 868 } 869 870 int 871 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 872 { 873 srb_t *sp; 874 struct srb_iocb *lio; 875 int rval = QLA_FUNCTION_FAILED; 876 877 if (!vha->flags.online) 878 return rval; 879 880 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 881 fcport->fw_login_state == DSC_LS_PRLI_PEND) 882 return rval; 883 884 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 885 if (!sp) 886 return rval; 887 888 fcport->flags |= FCF_ASYNC_SENT; 889 fcport->logout_completed = 0; 890 891 sp->type = SRB_PRLI_CMD; 892 sp->name = "prli"; 893 894 lio = &sp->u.iocb_cmd; 895 lio->timeout = qla2x00_async_iocb_timeout; 896 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 897 898 sp->done = qla2x00_async_prli_sp_done; 899 lio->u.logio.flags = 0; 900 901 if (fcport->fc4f_nvme) 902 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 903 904 rval = qla2x00_start_sp(sp); 905 if (rval != QLA_SUCCESS) { 906 fcport->flags |= FCF_LOGIN_NEEDED; 907 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 908 goto done_free_sp; 909 } 910 911 ql_dbg(ql_dbg_disc, vha, 0x211b, 912 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n", 913 fcport->port_name, sp->handle, fcport->loop_id, 914 fcport->d_id.b24, fcport->login_retry); 915 916 return rval; 917 918 done_free_sp: 919 sp->free(sp); 920 fcport->flags &= ~FCF_ASYNC_SENT; 921 return rval; 922 } 923 924 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 925 { 926 struct qla_work_evt *e; 927 928 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 929 if (!e) 930 return QLA_FUNCTION_FAILED; 931 932 e->u.fcport.fcport = fcport; 933 e->u.fcport.opt = opt; 934 fcport->flags |= FCF_ASYNC_ACTIVE; 935 return qla2x00_post_work(vha, e); 936 } 937 938 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 939 { 940 srb_t *sp; 941 struct srb_iocb *mbx; 942 int rval = QLA_FUNCTION_FAILED; 943 u16 *mb; 944 dma_addr_t pd_dma; 945 struct port_database_24xx *pd; 946 struct qla_hw_data *ha = vha->hw; 947 948 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 949 return rval; 950 951 fcport->disc_state = DSC_GPDB; 952 953 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 954 if (!sp) 955 goto done; 956 957 fcport->flags |= FCF_ASYNC_SENT; 958 sp->type = SRB_MB_IOCB; 959 sp->name = "gpdb"; 960 sp->gen1 = fcport->rscn_gen; 961 sp->gen2 = fcport->login_gen; 962 963 mbx = &sp->u.iocb_cmd; 964 mbx->timeout = qla2x00_async_iocb_timeout; 965 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 966 967 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 968 if (pd == NULL) { 969 ql_log(ql_log_warn, vha, 0xd043, 970 "Failed to allocate port database structure.\n"); 971 goto done_free_sp; 972 } 973 974 mb = sp->u.iocb_cmd.u.mbx.out_mb; 975 mb[0] = MBC_GET_PORT_DATABASE; 976 mb[1] = fcport->loop_id; 977 mb[2] = MSW(pd_dma); 978 mb[3] = LSW(pd_dma); 979 mb[6] = MSW(MSD(pd_dma)); 980 mb[7] = LSW(MSD(pd_dma)); 981 mb[9] = vha->vp_idx; 982 mb[10] = opt; 983 984 mbx->u.mbx.in = (void *)pd; 985 mbx->u.mbx.in_dma = pd_dma; 986 987 sp->done = qla24xx_async_gpdb_sp_done; 988 989 rval = qla2x00_start_sp(sp); 990 if (rval != QLA_SUCCESS) 991 goto done_free_sp; 992 993 ql_dbg(ql_dbg_disc, vha, 0x20dc, 994 "Async-%s %8phC hndl %x opt %x\n", 995 sp->name, fcport->port_name, sp->handle, opt); 996 997 return rval; 998 999 done_free_sp: 1000 if (pd) 1001 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1002 1003 sp->free(sp); 1004 fcport->flags &= ~FCF_ASYNC_SENT; 1005 done: 1006 qla24xx_post_gpdb_work(vha, fcport, opt); 1007 return rval; 1008 } 1009 1010 static 1011 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1012 { 1013 unsigned long flags; 1014 1015 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1016 ea->fcport->login_gen++; 1017 ea->fcport->deleted = 0; 1018 ea->fcport->logout_on_delete = 1; 1019 1020 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1021 vha->fcport_count++; 1022 ea->fcport->login_succ = 1; 1023 1024 if (!IS_IIDMA_CAPABLE(vha->hw) || 1025 !vha->hw->flags.gpsc_supported) { 1026 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1027 "%s %d %8phC post upd_fcport fcp_cnt %d\n", 1028 __func__, __LINE__, ea->fcport->port_name, 1029 vha->fcport_count); 1030 1031 qla24xx_post_upd_fcport_work(vha, ea->fcport); 1032 } else { 1033 if (ea->fcport->id_changed) { 1034 ea->fcport->id_changed = 0; 1035 ql_dbg(ql_dbg_disc, vha, 0x20d7, 1036 "%s %d %8phC post gfpnid fcp_cnt %d\n", 1037 __func__, __LINE__, ea->fcport->port_name, 1038 vha->fcport_count); 1039 qla24xx_post_gfpnid_work(vha, ea->fcport); 1040 } else { 1041 ql_dbg(ql_dbg_disc, vha, 0x20d7, 1042 "%s %d %8phC post gpsc fcp_cnt %d\n", 1043 __func__, __LINE__, ea->fcport->port_name, 1044 vha->fcport_count); 1045 qla24xx_post_gpsc_work(vha, ea->fcport); 1046 } 1047 } 1048 } else if (ea->fcport->login_succ) { 1049 /* 1050 * We have an existing session. A late RSCN delivery 1051 * must have triggered the session to be re-validate. 1052 * Session is still valid. 1053 */ 1054 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1055 "%s %d %8phC session revalidate success\n", 1056 __func__, __LINE__, ea->fcport->port_name); 1057 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1058 } 1059 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1060 } 1061 1062 static 1063 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1064 { 1065 fc_port_t *fcport = ea->fcport; 1066 struct port_database_24xx *pd; 1067 struct srb *sp = ea->sp; 1068 uint8_t ls; 1069 1070 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1071 1072 fcport->flags &= ~FCF_ASYNC_SENT; 1073 1074 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1075 "%s %8phC DS %d LS %d rc %d\n", __func__, fcport->port_name, 1076 fcport->disc_state, pd->current_login_state, ea->rc); 1077 1078 if (fcport->disc_state == DSC_DELETE_PEND) 1079 return; 1080 1081 if (fcport->fc4f_nvme) 1082 ls = pd->current_login_state >> 4; 1083 else 1084 ls = pd->current_login_state & 0xf; 1085 1086 switch (ls) { 1087 case PDS_PRLI_COMPLETE: 1088 __qla24xx_parse_gpdb(vha, fcport, pd); 1089 break; 1090 case PDS_PLOGI_PENDING: 1091 case PDS_PLOGI_COMPLETE: 1092 case PDS_PRLI_PENDING: 1093 case PDS_PRLI2_PENDING: 1094 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC relogin needed\n", 1095 __func__, __LINE__, fcport->port_name); 1096 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1097 return; 1098 case PDS_LOGO_PENDING: 1099 case PDS_PORT_UNAVAILABLE: 1100 default: 1101 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1102 __func__, __LINE__, fcport->port_name); 1103 qlt_schedule_sess_for_deletion(fcport); 1104 return; 1105 } 1106 __qla24xx_handle_gpdb_event(vha, ea); 1107 } /* gpdb event */ 1108 1109 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1110 { 1111 u8 login = 0; 1112 int rc; 1113 1114 if (qla_tgt_mode_enabled(vha)) 1115 return; 1116 1117 if (qla_dual_mode_enabled(vha)) { 1118 if (N2N_TOPO(vha->hw)) { 1119 u64 mywwn, wwn; 1120 1121 mywwn = wwn_to_u64(vha->port_name); 1122 wwn = wwn_to_u64(fcport->port_name); 1123 if (mywwn > wwn) 1124 login = 1; 1125 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1126 && time_after_eq(jiffies, 1127 fcport->plogi_nack_done_deadline)) 1128 login = 1; 1129 } else { 1130 login = 1; 1131 } 1132 } else { 1133 /* initiator mode */ 1134 login = 1; 1135 } 1136 1137 if (login) { 1138 if (fcport->loop_id == FC_NO_LOOP_ID) { 1139 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1140 rc = qla2x00_find_new_loop_id(vha, fcport); 1141 if (rc) { 1142 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1143 "%s %d %8phC post del sess - out of loopid\n", 1144 __func__, __LINE__, fcport->port_name); 1145 fcport->scan_state = 0; 1146 qlt_schedule_sess_for_deletion(fcport); 1147 return; 1148 } 1149 } 1150 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1151 "%s %d %8phC post login\n", 1152 __func__, __LINE__, fcport->port_name); 1153 qla2x00_post_async_login_work(vha, fcport, NULL); 1154 } 1155 } 1156 1157 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1158 { 1159 u16 data[2]; 1160 u64 wwn; 1161 1162 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1163 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n", 1164 __func__, fcport->port_name, fcport->disc_state, 1165 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1166 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1167 fcport->login_gen, fcport->login_retry, 1168 fcport->loop_id, fcport->scan_state); 1169 1170 if (fcport->login_retry == 0) 1171 return 0; 1172 1173 if (fcport->scan_state != QLA_FCPORT_FOUND) 1174 return 0; 1175 1176 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1177 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1178 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1179 return 0; 1180 1181 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1182 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1183 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1184 return 0; 1185 } 1186 } 1187 1188 /* for pure Target Mode. Login will not be initiated */ 1189 if (vha->host->active_mode == MODE_TARGET) 1190 return 0; 1191 1192 if (fcport->flags & FCF_ASYNC_SENT) { 1193 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1194 return 0; 1195 } 1196 1197 fcport->login_retry--; 1198 1199 switch (fcport->disc_state) { 1200 case DSC_DELETED: 1201 wwn = wwn_to_u64(fcport->node_name); 1202 if (wwn == 0) { 1203 ql_dbg(ql_dbg_disc, vha, 0xffff, 1204 "%s %d %8phC post GNNID\n", 1205 __func__, __LINE__, fcport->port_name); 1206 qla24xx_post_gnnid_work(vha, fcport); 1207 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1208 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1209 "%s %d %8phC post gnl\n", 1210 __func__, __LINE__, fcport->port_name); 1211 qla24xx_post_gnl_work(vha, fcport); 1212 } else { 1213 qla_chk_n2n_b4_login(vha, fcport); 1214 } 1215 break; 1216 1217 case DSC_GNL: 1218 if (fcport->login_pause) { 1219 fcport->last_rscn_gen = fcport->rscn_gen; 1220 fcport->last_login_gen = fcport->login_gen; 1221 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1222 break; 1223 } 1224 1225 qla_chk_n2n_b4_login(vha, fcport); 1226 break; 1227 1228 case DSC_LOGIN_FAILED: 1229 ql_dbg(ql_dbg_disc, vha, 0x20d0, 1230 "%s %d %8phC post gidpn\n", 1231 __func__, __LINE__, fcport->port_name); 1232 if (N2N_TOPO(vha->hw)) 1233 qla_chk_n2n_b4_login(vha, fcport); 1234 else 1235 qla24xx_post_gidpn_work(vha, fcport); 1236 break; 1237 1238 case DSC_LOGIN_COMPLETE: 1239 /* recheck login state */ 1240 ql_dbg(ql_dbg_disc, vha, 0x20d1, 1241 "%s %d %8phC post adisc\n", 1242 __func__, __LINE__, fcport->port_name); 1243 data[0] = data[1] = 0; 1244 qla2x00_post_async_adisc_work(vha, fcport, data); 1245 break; 1246 1247 case DSC_LOGIN_PEND: 1248 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1249 qla24xx_post_prli_work(vha, fcport); 1250 break; 1251 1252 default: 1253 break; 1254 } 1255 1256 return 0; 1257 } 1258 1259 static 1260 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1261 { 1262 fcport->rscn_gen++; 1263 1264 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1265 "%s %8phC DS %d LS %d\n", 1266 __func__, fcport->port_name, fcport->disc_state, 1267 fcport->fw_login_state); 1268 1269 if (fcport->flags & FCF_ASYNC_SENT) 1270 return; 1271 1272 switch (fcport->disc_state) { 1273 case DSC_DELETED: 1274 case DSC_LOGIN_COMPLETE: 1275 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1276 break; 1277 default: 1278 break; 1279 } 1280 } 1281 1282 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1283 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1284 { 1285 struct qla_work_evt *e; 1286 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1287 if (!e) 1288 return QLA_FUNCTION_FAILED; 1289 1290 e->u.new_sess.id = *id; 1291 e->u.new_sess.pla = pla; 1292 e->u.new_sess.fc4_type = fc4_type; 1293 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1294 if (node_name) 1295 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1296 1297 return qla2x00_post_work(vha, e); 1298 } 1299 1300 static 1301 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1302 struct event_arg *ea) 1303 { 1304 fc_port_t *fcport = ea->fcport; 1305 1306 ql_dbg(ql_dbg_disc, vha, 0x2102, 1307 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1308 __func__, fcport->port_name, fcport->disc_state, 1309 fcport->fw_login_state, fcport->login_pause, 1310 fcport->deleted, fcport->conflict, 1311 fcport->last_rscn_gen, fcport->rscn_gen, 1312 fcport->last_login_gen, fcport->login_gen, 1313 fcport->flags); 1314 1315 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1316 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1317 return; 1318 1319 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1320 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1321 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1322 return; 1323 } 1324 } 1325 1326 if (fcport->flags & FCF_ASYNC_SENT) { 1327 fcport->login_retry++; 1328 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1329 return; 1330 } 1331 1332 if (fcport->disc_state == DSC_DELETE_PEND) { 1333 fcport->login_retry++; 1334 return; 1335 } 1336 1337 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1338 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1339 __func__, __LINE__, fcport->port_name); 1340 1341 qla24xx_post_gidpn_work(vha, fcport); 1342 return; 1343 } 1344 1345 qla24xx_fcport_handle_login(vha, fcport); 1346 } 1347 1348 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1349 { 1350 fc_port_t *f, *tf; 1351 uint32_t id = 0, mask, rid; 1352 unsigned long flags; 1353 1354 switch (ea->event) { 1355 case FCME_RSCN: 1356 case FCME_GIDPN_DONE: 1357 case FCME_GPSC_DONE: 1358 case FCME_GPNID_DONE: 1359 case FCME_GNNID_DONE: 1360 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) || 1361 test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags)) 1362 return; 1363 break; 1364 default: 1365 break; 1366 } 1367 1368 switch (ea->event) { 1369 case FCME_RELOGIN: 1370 if (test_bit(UNLOADING, &vha->dpc_flags)) 1371 return; 1372 1373 qla24xx_handle_relogin_event(vha, ea); 1374 break; 1375 case FCME_RSCN: 1376 if (test_bit(UNLOADING, &vha->dpc_flags)) 1377 return; 1378 switch (ea->id.b.rsvd_1) { 1379 case RSCN_PORT_ADDR: 1380 spin_lock_irqsave(&vha->work_lock, flags); 1381 if (vha->scan.scan_flags == 0) { 1382 ql_dbg(ql_dbg_disc, vha, 0xffff, 1383 "%s: schedule\n", __func__); 1384 vha->scan.scan_flags |= SF_QUEUED; 1385 schedule_delayed_work(&vha->scan.scan_work, 5); 1386 } 1387 spin_unlock_irqrestore(&vha->work_lock, flags); 1388 1389 break; 1390 case RSCN_AREA_ADDR: 1391 case RSCN_DOM_ADDR: 1392 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1393 mask = 0xffff00; 1394 ql_dbg(ql_dbg_async, vha, 0x5044, 1395 "RSCN: Area 0x%06x was affected\n", 1396 ea->id.b24); 1397 } else { 1398 mask = 0xff0000; 1399 ql_dbg(ql_dbg_async, vha, 0x507a, 1400 "RSCN: Domain 0x%06x was affected\n", 1401 ea->id.b24); 1402 } 1403 1404 rid = ea->id.b24 & mask; 1405 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1406 list) { 1407 id = f->d_id.b24 & mask; 1408 if (rid == id) { 1409 ea->fcport = f; 1410 qla24xx_handle_rscn_event(f, ea); 1411 } 1412 } 1413 break; 1414 case RSCN_FAB_ADDR: 1415 default: 1416 ql_log(ql_log_warn, vha, 0xd045, 1417 "RSCN: Fabric was affected. Addr format %d\n", 1418 ea->id.b.rsvd_1); 1419 qla2x00_mark_all_devices_lost(vha, 1); 1420 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1421 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1422 } 1423 break; 1424 case FCME_GIDPN_DONE: 1425 qla24xx_handle_gidpn_event(vha, ea); 1426 break; 1427 case FCME_GNL_DONE: 1428 qla24xx_handle_gnl_done_event(vha, ea); 1429 break; 1430 case FCME_GPSC_DONE: 1431 qla24xx_handle_gpsc_event(vha, ea); 1432 break; 1433 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1434 qla24xx_handle_plogi_done_event(vha, ea); 1435 break; 1436 case FCME_PRLI_DONE: 1437 qla24xx_handle_prli_done_event(vha, ea); 1438 break; 1439 case FCME_GPDB_DONE: 1440 qla24xx_handle_gpdb_event(vha, ea); 1441 break; 1442 case FCME_GPNID_DONE: 1443 qla24xx_handle_gpnid_event(vha, ea); 1444 break; 1445 case FCME_GFFID_DONE: 1446 qla24xx_handle_gffid_event(vha, ea); 1447 break; 1448 case FCME_ADISC_DONE: 1449 qla24xx_handle_adisc_event(vha, ea); 1450 break; 1451 case FCME_GNNID_DONE: 1452 qla24xx_handle_gnnid_event(vha, ea); 1453 break; 1454 case FCME_GFPNID_DONE: 1455 qla24xx_handle_gfpnid_event(vha, ea); 1456 break; 1457 default: 1458 BUG_ON(1); 1459 break; 1460 } 1461 } 1462 1463 static void 1464 qla2x00_tmf_iocb_timeout(void *data) 1465 { 1466 srb_t *sp = data; 1467 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1468 1469 tmf->u.tmf.comp_status = CS_TIMEOUT; 1470 complete(&tmf->u.tmf.comp); 1471 } 1472 1473 static void 1474 qla2x00_tmf_sp_done(void *ptr, int res) 1475 { 1476 srb_t *sp = ptr; 1477 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1478 1479 complete(&tmf->u.tmf.comp); 1480 } 1481 1482 int 1483 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1484 uint32_t tag) 1485 { 1486 struct scsi_qla_host *vha = fcport->vha; 1487 struct srb_iocb *tm_iocb; 1488 srb_t *sp; 1489 int rval = QLA_FUNCTION_FAILED; 1490 1491 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1492 if (!sp) 1493 goto done; 1494 1495 tm_iocb = &sp->u.iocb_cmd; 1496 sp->type = SRB_TM_CMD; 1497 sp->name = "tmf"; 1498 1499 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1500 init_completion(&tm_iocb->u.tmf.comp); 1501 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1502 1503 tm_iocb->u.tmf.flags = flags; 1504 tm_iocb->u.tmf.lun = lun; 1505 tm_iocb->u.tmf.data = tag; 1506 sp->done = qla2x00_tmf_sp_done; 1507 1508 rval = qla2x00_start_sp(sp); 1509 if (rval != QLA_SUCCESS) 1510 goto done_free_sp; 1511 1512 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1513 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1514 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1515 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1516 1517 wait_for_completion(&tm_iocb->u.tmf.comp); 1518 1519 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 1520 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1521 1522 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) { 1523 ql_dbg(ql_dbg_taskm, vha, 0x8030, 1524 "TM IOCB failed (%x).\n", rval); 1525 } 1526 1527 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1528 flags = tm_iocb->u.tmf.flags; 1529 lun = (uint16_t)tm_iocb->u.tmf.lun; 1530 1531 /* Issue Marker IOCB */ 1532 qla2x00_marker(vha, vha->hw->req_q_map[0], 1533 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1534 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1535 } 1536 1537 done_free_sp: 1538 sp->free(sp); 1539 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1540 done: 1541 return rval; 1542 } 1543 1544 static void 1545 qla24xx_abort_iocb_timeout(void *data) 1546 { 1547 srb_t *sp = data; 1548 struct srb_iocb *abt = &sp->u.iocb_cmd; 1549 1550 abt->u.abt.comp_status = CS_TIMEOUT; 1551 complete(&abt->u.abt.comp); 1552 } 1553 1554 static void 1555 qla24xx_abort_sp_done(void *ptr, int res) 1556 { 1557 srb_t *sp = ptr; 1558 struct srb_iocb *abt = &sp->u.iocb_cmd; 1559 1560 if (del_timer(&sp->u.iocb_cmd.timer)) 1561 complete(&abt->u.abt.comp); 1562 } 1563 1564 int 1565 qla24xx_async_abort_cmd(srb_t *cmd_sp) 1566 { 1567 scsi_qla_host_t *vha = cmd_sp->vha; 1568 fc_port_t *fcport = cmd_sp->fcport; 1569 struct srb_iocb *abt_iocb; 1570 srb_t *sp; 1571 int rval = QLA_FUNCTION_FAILED; 1572 1573 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1574 if (!sp) 1575 goto done; 1576 1577 abt_iocb = &sp->u.iocb_cmd; 1578 sp->type = SRB_ABT_CMD; 1579 sp->name = "abort"; 1580 1581 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1582 init_completion(&abt_iocb->u.abt.comp); 1583 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1584 1585 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1586 1587 if (vha->flags.qpairs_available && cmd_sp->qpair) 1588 abt_iocb->u.abt.req_que_no = 1589 cpu_to_le16(cmd_sp->qpair->req->id); 1590 else 1591 abt_iocb->u.abt.req_que_no = cpu_to_le16(vha->req->id); 1592 1593 sp->done = qla24xx_abort_sp_done; 1594 1595 rval = qla2x00_start_sp(sp); 1596 if (rval != QLA_SUCCESS) 1597 goto done_free_sp; 1598 1599 ql_dbg(ql_dbg_async, vha, 0x507c, 1600 "Abort command issued - hdl=%x, target_id=%x\n", 1601 cmd_sp->handle, fcport->tgt_id); 1602 1603 wait_for_completion(&abt_iocb->u.abt.comp); 1604 1605 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1606 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1607 1608 done_free_sp: 1609 sp->free(sp); 1610 done: 1611 return rval; 1612 } 1613 1614 int 1615 qla24xx_async_abort_command(srb_t *sp) 1616 { 1617 unsigned long flags = 0; 1618 1619 uint32_t handle; 1620 fc_port_t *fcport = sp->fcport; 1621 struct scsi_qla_host *vha = fcport->vha; 1622 struct qla_hw_data *ha = vha->hw; 1623 struct req_que *req = vha->req; 1624 1625 if (vha->flags.qpairs_available && sp->qpair) 1626 req = sp->qpair->req; 1627 1628 spin_lock_irqsave(&ha->hardware_lock, flags); 1629 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1630 if (req->outstanding_cmds[handle] == sp) 1631 break; 1632 } 1633 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1634 if (handle == req->num_outstanding_cmds) { 1635 /* Command not found. */ 1636 return QLA_FUNCTION_FAILED; 1637 } 1638 if (sp->type == SRB_FXIOCB_DCMD) 1639 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1640 FXDISC_ABORT_IOCTL); 1641 1642 return qla24xx_async_abort_cmd(sp); 1643 } 1644 1645 static void 1646 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1647 { 1648 switch (ea->data[0]) { 1649 case MBS_COMMAND_COMPLETE: 1650 ql_dbg(ql_dbg_disc, vha, 0x2118, 1651 "%s %d %8phC post gpdb\n", 1652 __func__, __LINE__, ea->fcport->port_name); 1653 1654 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1655 ea->fcport->logout_on_delete = 1; 1656 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1657 break; 1658 default: 1659 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1660 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1661 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1662 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1663 break; 1664 } 1665 1666 if (ea->fcport->n2n_flag) { 1667 ql_dbg(ql_dbg_disc, vha, 0x2118, 1668 "%s %d %8phC post fc4 prli\n", 1669 __func__, __LINE__, ea->fcport->port_name); 1670 ea->fcport->fc4f_nvme = 0; 1671 ea->fcport->n2n_flag = 0; 1672 qla24xx_post_prli_work(vha, ea->fcport); 1673 } 1674 ql_dbg(ql_dbg_disc, vha, 0x2119, 1675 "%s %d %8phC unhandle event of %x\n", 1676 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1677 break; 1678 } 1679 } 1680 1681 static void 1682 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1683 { 1684 port_id_t cid; /* conflict Nport id */ 1685 u16 lid; 1686 struct fc_port *conflict_fcport; 1687 unsigned long flags; 1688 struct fc_port *fcport = ea->fcport; 1689 1690 ql_dbg(ql_dbg_disc, vha, 0xffff, 1691 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1692 __func__, fcport->port_name, fcport->disc_state, 1693 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1694 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1, 1695 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1696 1697 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1698 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1699 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1700 "%s %d %8phC Remote is trying to login\n", 1701 __func__, __LINE__, fcport->port_name); 1702 return; 1703 } 1704 1705 if (fcport->disc_state == DSC_DELETE_PEND) 1706 return; 1707 1708 if (ea->sp->gen2 != fcport->login_gen) { 1709 /* target side must have changed it. */ 1710 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1711 "%s %8phC generation changed\n", 1712 __func__, fcport->port_name); 1713 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1714 return; 1715 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1716 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 1717 __func__, __LINE__, fcport->port_name); 1718 qla24xx_post_gidpn_work(vha, fcport); 1719 return; 1720 } 1721 1722 switch (ea->data[0]) { 1723 case MBS_COMMAND_COMPLETE: 1724 /* 1725 * Driver must validate login state - If PRLI not complete, 1726 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1727 * requests. 1728 */ 1729 if (ea->fcport->fc4f_nvme) { 1730 ql_dbg(ql_dbg_disc, vha, 0x2117, 1731 "%s %d %8phC post prli\n", 1732 __func__, __LINE__, ea->fcport->port_name); 1733 qla24xx_post_prli_work(vha, ea->fcport); 1734 } else { 1735 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1736 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1737 __func__, __LINE__, ea->fcport->port_name, 1738 ea->fcport->loop_id, ea->fcport->d_id.b24); 1739 1740 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1741 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1742 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1743 ea->fcport->logout_on_delete = 1; 1744 ea->fcport->send_els_logo = 0; 1745 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1746 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1747 1748 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1749 } 1750 break; 1751 case MBS_COMMAND_ERROR: 1752 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1753 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1754 1755 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1756 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1757 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1758 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1759 else 1760 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1761 break; 1762 case MBS_LOOP_ID_USED: 1763 /* data[1] = IO PARAM 1 = nport ID */ 1764 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1765 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1766 cid.b.al_pa = ea->iop[1] & 0xff; 1767 cid.b.rsvd_1 = 0; 1768 1769 ql_dbg(ql_dbg_disc, vha, 0x20ec, 1770 "%s %d %8phC LoopID 0x%x in use post gnl\n", 1771 __func__, __LINE__, ea->fcport->port_name, 1772 ea->fcport->loop_id); 1773 1774 if (IS_SW_RESV_ADDR(cid)) { 1775 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1776 ea->fcport->loop_id = FC_NO_LOOP_ID; 1777 } else { 1778 qla2x00_clear_loop_id(ea->fcport); 1779 } 1780 qla24xx_post_gnl_work(vha, ea->fcport); 1781 break; 1782 case MBS_PORT_ID_USED: 1783 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1784 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n", 1785 __func__, __LINE__, ea->fcport->port_name, 1786 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area, 1787 ea->fcport->d_id.b.al_pa); 1788 1789 lid = ea->iop[1] & 0xffff; 1790 qlt_find_sess_invalidate_other(vha, 1791 wwn_to_u64(ea->fcport->port_name), 1792 ea->fcport->d_id, lid, &conflict_fcport); 1793 1794 if (conflict_fcport) { 1795 /* 1796 * Another fcport share the same loop_id/nport id. 1797 * Conflict fcport needs to finish cleanup before this 1798 * fcport can proceed to login. 1799 */ 1800 conflict_fcport->conflict = ea->fcport; 1801 ea->fcport->login_pause = 1; 1802 1803 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1804 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 1805 __func__, __LINE__, ea->fcport->port_name, 1806 ea->fcport->d_id.b24, lid); 1807 qla2x00_clear_loop_id(ea->fcport); 1808 qla24xx_post_gidpn_work(vha, ea->fcport); 1809 } else { 1810 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1811 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 1812 __func__, __LINE__, ea->fcport->port_name, 1813 ea->fcport->d_id.b24, lid); 1814 1815 qla2x00_clear_loop_id(ea->fcport); 1816 set_bit(lid, vha->hw->loop_id_map); 1817 ea->fcport->loop_id = lid; 1818 ea->fcport->keep_nport_handle = 0; 1819 qlt_schedule_sess_for_deletion(ea->fcport); 1820 } 1821 break; 1822 } 1823 return; 1824 } 1825 1826 void 1827 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1828 uint16_t *data) 1829 { 1830 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1831 qlt_logo_completion_handler(fcport, data[0]); 1832 fcport->login_gen++; 1833 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1834 return; 1835 } 1836 1837 void 1838 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1839 uint16_t *data) 1840 { 1841 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1842 if (data[0] == MBS_COMMAND_COMPLETE) { 1843 qla2x00_update_fcport(vha, fcport); 1844 1845 return; 1846 } 1847 1848 /* Retry login. */ 1849 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 1850 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1851 else 1852 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1853 1854 return; 1855 } 1856 1857 /****************************************************************************/ 1858 /* QLogic ISP2x00 Hardware Support Functions. */ 1859 /****************************************************************************/ 1860 1861 static int 1862 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 1863 { 1864 int rval = QLA_SUCCESS; 1865 struct qla_hw_data *ha = vha->hw; 1866 uint32_t idc_major_ver, idc_minor_ver; 1867 uint16_t config[4]; 1868 1869 qla83xx_idc_lock(vha, 0); 1870 1871 /* SV: TODO: Assign initialization timeout from 1872 * flash-info / other param 1873 */ 1874 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 1875 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 1876 1877 /* Set our fcoe function presence */ 1878 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 1879 ql_dbg(ql_dbg_p3p, vha, 0xb077, 1880 "Error while setting DRV-Presence.\n"); 1881 rval = QLA_FUNCTION_FAILED; 1882 goto exit; 1883 } 1884 1885 /* Decide the reset ownership */ 1886 qla83xx_reset_ownership(vha); 1887 1888 /* 1889 * On first protocol driver load: 1890 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 1891 * register. 1892 * Others: Check compatibility with current IDC Major version. 1893 */ 1894 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 1895 if (ha->flags.nic_core_reset_owner) { 1896 /* Set IDC Major version */ 1897 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 1898 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 1899 1900 /* Clearing IDC-Lock-Recovery register */ 1901 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 1902 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 1903 /* 1904 * Clear further IDC participation if we are not compatible with 1905 * the current IDC Major Version. 1906 */ 1907 ql_log(ql_log_warn, vha, 0xb07d, 1908 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 1909 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 1910 __qla83xx_clear_drv_presence(vha); 1911 rval = QLA_FUNCTION_FAILED; 1912 goto exit; 1913 } 1914 /* Each function sets its supported Minor version. */ 1915 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 1916 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 1917 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 1918 1919 if (ha->flags.nic_core_reset_owner) { 1920 memset(config, 0, sizeof(config)); 1921 if (!qla81xx_get_port_config(vha, config)) 1922 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 1923 QLA8XXX_DEV_READY); 1924 } 1925 1926 rval = qla83xx_idc_state_handler(vha); 1927 1928 exit: 1929 qla83xx_idc_unlock(vha, 0); 1930 1931 return rval; 1932 } 1933 1934 /* 1935 * qla2x00_initialize_adapter 1936 * Initialize board. 1937 * 1938 * Input: 1939 * ha = adapter block pointer. 1940 * 1941 * Returns: 1942 * 0 = success 1943 */ 1944 int 1945 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 1946 { 1947 int rval; 1948 struct qla_hw_data *ha = vha->hw; 1949 struct req_que *req = ha->req_q_map[0]; 1950 1951 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 1952 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 1953 1954 /* Clear adapter flags. */ 1955 vha->flags.online = 0; 1956 ha->flags.chip_reset_done = 0; 1957 vha->flags.reset_active = 0; 1958 ha->flags.pci_channel_io_perm_failure = 0; 1959 ha->flags.eeh_busy = 0; 1960 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 1961 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1962 atomic_set(&vha->loop_state, LOOP_DOWN); 1963 vha->device_flags = DFLG_NO_CABLE; 1964 vha->dpc_flags = 0; 1965 vha->flags.management_server_logged_in = 0; 1966 vha->marker_needed = 0; 1967 ha->isp_abort_cnt = 0; 1968 ha->beacon_blink_led = 0; 1969 1970 set_bit(0, ha->req_qid_map); 1971 set_bit(0, ha->rsp_qid_map); 1972 1973 ql_dbg(ql_dbg_init, vha, 0x0040, 1974 "Configuring PCI space...\n"); 1975 rval = ha->isp_ops->pci_config(vha); 1976 if (rval) { 1977 ql_log(ql_log_warn, vha, 0x0044, 1978 "Unable to configure PCI space.\n"); 1979 return (rval); 1980 } 1981 1982 ha->isp_ops->reset_chip(vha); 1983 1984 rval = qla2xxx_get_flash_info(vha); 1985 if (rval) { 1986 ql_log(ql_log_fatal, vha, 0x004f, 1987 "Unable to validate FLASH data.\n"); 1988 return rval; 1989 } 1990 1991 if (IS_QLA8044(ha)) { 1992 qla8044_read_reset_template(vha); 1993 1994 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 1995 * If DONRESET_BIT0 is set, drivers should not set dev_state 1996 * to NEED_RESET. But if NEED_RESET is set, drivers should 1997 * should honor the reset. */ 1998 if (ql2xdontresethba == 1) 1999 qla8044_set_idc_dontreset(vha); 2000 } 2001 2002 ha->isp_ops->get_flash_version(vha, req->ring); 2003 ql_dbg(ql_dbg_init, vha, 0x0061, 2004 "Configure NVRAM parameters...\n"); 2005 2006 ha->isp_ops->nvram_config(vha); 2007 2008 if (ha->flags.disable_serdes) { 2009 /* Mask HBA via NVRAM settings? */ 2010 ql_log(ql_log_info, vha, 0x0077, 2011 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2012 return QLA_FUNCTION_FAILED; 2013 } 2014 2015 ql_dbg(ql_dbg_init, vha, 0x0078, 2016 "Verifying loaded RISC code...\n"); 2017 2018 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2019 rval = ha->isp_ops->chip_diag(vha); 2020 if (rval) 2021 return (rval); 2022 rval = qla2x00_setup_chip(vha); 2023 if (rval) 2024 return (rval); 2025 } 2026 2027 if (IS_QLA84XX(ha)) { 2028 ha->cs84xx = qla84xx_get_chip(vha); 2029 if (!ha->cs84xx) { 2030 ql_log(ql_log_warn, vha, 0x00d0, 2031 "Unable to configure ISP84XX.\n"); 2032 return QLA_FUNCTION_FAILED; 2033 } 2034 } 2035 2036 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2037 rval = qla2x00_init_rings(vha); 2038 2039 ha->flags.chip_reset_done = 1; 2040 2041 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2042 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2043 rval = qla84xx_init_chip(vha); 2044 if (rval != QLA_SUCCESS) { 2045 ql_log(ql_log_warn, vha, 0x00d4, 2046 "Unable to initialize ISP84XX.\n"); 2047 qla84xx_put_chip(vha); 2048 } 2049 } 2050 2051 /* Load the NIC Core f/w if we are the first protocol driver. */ 2052 if (IS_QLA8031(ha)) { 2053 rval = qla83xx_nic_core_fw_load(vha); 2054 if (rval) 2055 ql_log(ql_log_warn, vha, 0x0124, 2056 "Error in initializing NIC Core f/w.\n"); 2057 } 2058 2059 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2060 qla24xx_read_fcp_prio_cfg(vha); 2061 2062 if (IS_P3P_TYPE(ha)) 2063 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2064 else 2065 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2066 2067 return (rval); 2068 } 2069 2070 /** 2071 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2072 * @vha: HA context 2073 * 2074 * Returns 0 on success. 2075 */ 2076 int 2077 qla2100_pci_config(scsi_qla_host_t *vha) 2078 { 2079 uint16_t w; 2080 unsigned long flags; 2081 struct qla_hw_data *ha = vha->hw; 2082 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2083 2084 pci_set_master(ha->pdev); 2085 pci_try_set_mwi(ha->pdev); 2086 2087 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2088 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2089 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2090 2091 pci_disable_rom(ha->pdev); 2092 2093 /* Get PCI bus information. */ 2094 spin_lock_irqsave(&ha->hardware_lock, flags); 2095 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2096 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2097 2098 return QLA_SUCCESS; 2099 } 2100 2101 /** 2102 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2103 * @vha: HA context 2104 * 2105 * Returns 0 on success. 2106 */ 2107 int 2108 qla2300_pci_config(scsi_qla_host_t *vha) 2109 { 2110 uint16_t w; 2111 unsigned long flags = 0; 2112 uint32_t cnt; 2113 struct qla_hw_data *ha = vha->hw; 2114 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2115 2116 pci_set_master(ha->pdev); 2117 pci_try_set_mwi(ha->pdev); 2118 2119 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2120 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2121 2122 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2123 w &= ~PCI_COMMAND_INTX_DISABLE; 2124 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2125 2126 /* 2127 * If this is a 2300 card and not 2312, reset the 2128 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2129 * the 2310 also reports itself as a 2300 so we need to get the 2130 * fb revision level -- a 6 indicates it really is a 2300 and 2131 * not a 2310. 2132 */ 2133 if (IS_QLA2300(ha)) { 2134 spin_lock_irqsave(&ha->hardware_lock, flags); 2135 2136 /* Pause RISC. */ 2137 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2138 for (cnt = 0; cnt < 30000; cnt++) { 2139 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2140 break; 2141 2142 udelay(10); 2143 } 2144 2145 /* Select FPM registers. */ 2146 WRT_REG_WORD(®->ctrl_status, 0x20); 2147 RD_REG_WORD(®->ctrl_status); 2148 2149 /* Get the fb rev level */ 2150 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2151 2152 if (ha->fb_rev == FPM_2300) 2153 pci_clear_mwi(ha->pdev); 2154 2155 /* Deselect FPM registers. */ 2156 WRT_REG_WORD(®->ctrl_status, 0x0); 2157 RD_REG_WORD(®->ctrl_status); 2158 2159 /* Release RISC module. */ 2160 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2161 for (cnt = 0; cnt < 30000; cnt++) { 2162 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2163 break; 2164 2165 udelay(10); 2166 } 2167 2168 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2169 } 2170 2171 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2172 2173 pci_disable_rom(ha->pdev); 2174 2175 /* Get PCI bus information. */ 2176 spin_lock_irqsave(&ha->hardware_lock, flags); 2177 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2178 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2179 2180 return QLA_SUCCESS; 2181 } 2182 2183 /** 2184 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2185 * @vha: HA context 2186 * 2187 * Returns 0 on success. 2188 */ 2189 int 2190 qla24xx_pci_config(scsi_qla_host_t *vha) 2191 { 2192 uint16_t w; 2193 unsigned long flags = 0; 2194 struct qla_hw_data *ha = vha->hw; 2195 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2196 2197 pci_set_master(ha->pdev); 2198 pci_try_set_mwi(ha->pdev); 2199 2200 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2201 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2202 w &= ~PCI_COMMAND_INTX_DISABLE; 2203 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2204 2205 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2206 2207 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2208 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2209 pcix_set_mmrbc(ha->pdev, 2048); 2210 2211 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2212 if (pci_is_pcie(ha->pdev)) 2213 pcie_set_readrq(ha->pdev, 4096); 2214 2215 pci_disable_rom(ha->pdev); 2216 2217 ha->chip_revision = ha->pdev->revision; 2218 2219 /* Get PCI bus information. */ 2220 spin_lock_irqsave(&ha->hardware_lock, flags); 2221 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2222 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2223 2224 return QLA_SUCCESS; 2225 } 2226 2227 /** 2228 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2229 * @vha: HA context 2230 * 2231 * Returns 0 on success. 2232 */ 2233 int 2234 qla25xx_pci_config(scsi_qla_host_t *vha) 2235 { 2236 uint16_t w; 2237 struct qla_hw_data *ha = vha->hw; 2238 2239 pci_set_master(ha->pdev); 2240 pci_try_set_mwi(ha->pdev); 2241 2242 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2243 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2244 w &= ~PCI_COMMAND_INTX_DISABLE; 2245 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2246 2247 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2248 if (pci_is_pcie(ha->pdev)) 2249 pcie_set_readrq(ha->pdev, 4096); 2250 2251 pci_disable_rom(ha->pdev); 2252 2253 ha->chip_revision = ha->pdev->revision; 2254 2255 return QLA_SUCCESS; 2256 } 2257 2258 /** 2259 * qla2x00_isp_firmware() - Choose firmware image. 2260 * @vha: HA context 2261 * 2262 * Returns 0 on success. 2263 */ 2264 static int 2265 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2266 { 2267 int rval; 2268 uint16_t loop_id, topo, sw_cap; 2269 uint8_t domain, area, al_pa; 2270 struct qla_hw_data *ha = vha->hw; 2271 2272 /* Assume loading risc code */ 2273 rval = QLA_FUNCTION_FAILED; 2274 2275 if (ha->flags.disable_risc_code_load) { 2276 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2277 2278 /* Verify checksum of loaded RISC code. */ 2279 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2280 if (rval == QLA_SUCCESS) { 2281 /* And, verify we are not in ROM code. */ 2282 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2283 &area, &domain, &topo, &sw_cap); 2284 } 2285 } 2286 2287 if (rval) 2288 ql_dbg(ql_dbg_init, vha, 0x007a, 2289 "**** Load RISC code ****.\n"); 2290 2291 return (rval); 2292 } 2293 2294 /** 2295 * qla2x00_reset_chip() - Reset ISP chip. 2296 * @vha: HA context 2297 * 2298 * Returns 0 on success. 2299 */ 2300 void 2301 qla2x00_reset_chip(scsi_qla_host_t *vha) 2302 { 2303 unsigned long flags = 0; 2304 struct qla_hw_data *ha = vha->hw; 2305 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2306 uint32_t cnt; 2307 uint16_t cmd; 2308 2309 if (unlikely(pci_channel_offline(ha->pdev))) 2310 return; 2311 2312 ha->isp_ops->disable_intrs(ha); 2313 2314 spin_lock_irqsave(&ha->hardware_lock, flags); 2315 2316 /* Turn off master enable */ 2317 cmd = 0; 2318 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2319 cmd &= ~PCI_COMMAND_MASTER; 2320 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2321 2322 if (!IS_QLA2100(ha)) { 2323 /* Pause RISC. */ 2324 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2325 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2326 for (cnt = 0; cnt < 30000; cnt++) { 2327 if ((RD_REG_WORD(®->hccr) & 2328 HCCR_RISC_PAUSE) != 0) 2329 break; 2330 udelay(100); 2331 } 2332 } else { 2333 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2334 udelay(10); 2335 } 2336 2337 /* Select FPM registers. */ 2338 WRT_REG_WORD(®->ctrl_status, 0x20); 2339 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2340 2341 /* FPM Soft Reset. */ 2342 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2343 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2344 2345 /* Toggle Fpm Reset. */ 2346 if (!IS_QLA2200(ha)) { 2347 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2348 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2349 } 2350 2351 /* Select frame buffer registers. */ 2352 WRT_REG_WORD(®->ctrl_status, 0x10); 2353 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2354 2355 /* Reset frame buffer FIFOs. */ 2356 if (IS_QLA2200(ha)) { 2357 WRT_FB_CMD_REG(ha, reg, 0xa000); 2358 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2359 } else { 2360 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2361 2362 /* Read back fb_cmd until zero or 3 seconds max */ 2363 for (cnt = 0; cnt < 3000; cnt++) { 2364 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2365 break; 2366 udelay(100); 2367 } 2368 } 2369 2370 /* Select RISC module registers. */ 2371 WRT_REG_WORD(®->ctrl_status, 0); 2372 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2373 2374 /* Reset RISC processor. */ 2375 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2376 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2377 2378 /* Release RISC processor. */ 2379 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2380 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2381 } 2382 2383 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2384 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2385 2386 /* Reset ISP chip. */ 2387 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2388 2389 /* Wait for RISC to recover from reset. */ 2390 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2391 /* 2392 * It is necessary to for a delay here since the card doesn't 2393 * respond to PCI reads during a reset. On some architectures 2394 * this will result in an MCA. 2395 */ 2396 udelay(20); 2397 for (cnt = 30000; cnt; cnt--) { 2398 if ((RD_REG_WORD(®->ctrl_status) & 2399 CSR_ISP_SOFT_RESET) == 0) 2400 break; 2401 udelay(100); 2402 } 2403 } else 2404 udelay(10); 2405 2406 /* Reset RISC processor. */ 2407 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2408 2409 WRT_REG_WORD(®->semaphore, 0); 2410 2411 /* Release RISC processor. */ 2412 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2413 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2414 2415 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2416 for (cnt = 0; cnt < 30000; cnt++) { 2417 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2418 break; 2419 2420 udelay(100); 2421 } 2422 } else 2423 udelay(100); 2424 2425 /* Turn on master enable */ 2426 cmd |= PCI_COMMAND_MASTER; 2427 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2428 2429 /* Disable RISC pause on FPM parity error. */ 2430 if (!IS_QLA2100(ha)) { 2431 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2432 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2433 } 2434 2435 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2436 } 2437 2438 /** 2439 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2440 * @vha: HA context 2441 * 2442 * Returns 0 on success. 2443 */ 2444 static int 2445 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2446 { 2447 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2448 2449 if (!IS_QLA81XX(vha->hw)) 2450 return QLA_SUCCESS; 2451 2452 return qla81xx_write_mpi_register(vha, mb); 2453 } 2454 2455 /** 2456 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2457 * @vha: HA context 2458 * 2459 * Returns 0 on success. 2460 */ 2461 static inline int 2462 qla24xx_reset_risc(scsi_qla_host_t *vha) 2463 { 2464 unsigned long flags = 0; 2465 struct qla_hw_data *ha = vha->hw; 2466 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2467 uint32_t cnt; 2468 uint16_t wd; 2469 static int abts_cnt; /* ISP abort retry counts */ 2470 int rval = QLA_SUCCESS; 2471 2472 spin_lock_irqsave(&ha->hardware_lock, flags); 2473 2474 /* Reset RISC. */ 2475 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2476 for (cnt = 0; cnt < 30000; cnt++) { 2477 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2478 break; 2479 2480 udelay(10); 2481 } 2482 2483 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2484 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2485 2486 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2487 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2488 RD_REG_DWORD(®->hccr), 2489 RD_REG_DWORD(®->ctrl_status), 2490 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2491 2492 WRT_REG_DWORD(®->ctrl_status, 2493 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2494 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2495 2496 udelay(100); 2497 2498 /* Wait for firmware to complete NVRAM accesses. */ 2499 RD_REG_WORD(®->mailbox0); 2500 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2501 rval == QLA_SUCCESS; cnt--) { 2502 barrier(); 2503 if (cnt) 2504 udelay(5); 2505 else 2506 rval = QLA_FUNCTION_TIMEOUT; 2507 } 2508 2509 if (rval == QLA_SUCCESS) 2510 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2511 2512 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2513 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2514 RD_REG_DWORD(®->hccr), 2515 RD_REG_DWORD(®->mailbox0)); 2516 2517 /* Wait for soft-reset to complete. */ 2518 RD_REG_DWORD(®->ctrl_status); 2519 for (cnt = 0; cnt < 60; cnt++) { 2520 barrier(); 2521 if ((RD_REG_DWORD(®->ctrl_status) & 2522 CSRX_ISP_SOFT_RESET) == 0) 2523 break; 2524 2525 udelay(5); 2526 } 2527 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2528 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2529 2530 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2531 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2532 RD_REG_DWORD(®->hccr), 2533 RD_REG_DWORD(®->ctrl_status)); 2534 2535 /* If required, do an MPI FW reset now */ 2536 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2537 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2538 if (++abts_cnt < 5) { 2539 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2540 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2541 } else { 2542 /* 2543 * We exhausted the ISP abort retries. We have to 2544 * set the board offline. 2545 */ 2546 abts_cnt = 0; 2547 vha->flags.online = 0; 2548 } 2549 } 2550 } 2551 2552 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2553 RD_REG_DWORD(®->hccr); 2554 2555 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2556 RD_REG_DWORD(®->hccr); 2557 2558 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2559 RD_REG_DWORD(®->hccr); 2560 2561 RD_REG_WORD(®->mailbox0); 2562 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2563 rval == QLA_SUCCESS; cnt--) { 2564 barrier(); 2565 if (cnt) 2566 udelay(5); 2567 else 2568 rval = QLA_FUNCTION_TIMEOUT; 2569 } 2570 if (rval == QLA_SUCCESS) 2571 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2572 2573 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2574 "Host Risc 0x%x, mailbox0 0x%x\n", 2575 RD_REG_DWORD(®->hccr), 2576 RD_REG_WORD(®->mailbox0)); 2577 2578 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2579 2580 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2581 "Driver in %s mode\n", 2582 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2583 2584 if (IS_NOPOLLING_TYPE(ha)) 2585 ha->isp_ops->enable_intrs(ha); 2586 2587 return rval; 2588 } 2589 2590 static void 2591 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2592 { 2593 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2594 2595 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2596 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2597 2598 } 2599 2600 static void 2601 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2602 { 2603 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2604 2605 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2606 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2607 } 2608 2609 static void 2610 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2611 { 2612 uint32_t wd32 = 0; 2613 uint delta_msec = 100; 2614 uint elapsed_msec = 0; 2615 uint timeout_msec; 2616 ulong n; 2617 2618 if (vha->hw->pdev->subsystem_device != 0x0175 && 2619 vha->hw->pdev->subsystem_device != 0x0240) 2620 return; 2621 2622 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2623 udelay(100); 2624 2625 attempt: 2626 timeout_msec = TIMEOUT_SEMAPHORE; 2627 n = timeout_msec / delta_msec; 2628 while (n--) { 2629 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2630 qla25xx_read_risc_sema_reg(vha, &wd32); 2631 if (wd32 & RISC_SEMAPHORE) 2632 break; 2633 msleep(delta_msec); 2634 elapsed_msec += delta_msec; 2635 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2636 goto force; 2637 } 2638 2639 if (!(wd32 & RISC_SEMAPHORE)) 2640 goto force; 2641 2642 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2643 goto acquired; 2644 2645 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2646 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2647 n = timeout_msec / delta_msec; 2648 while (n--) { 2649 qla25xx_read_risc_sema_reg(vha, &wd32); 2650 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2651 break; 2652 msleep(delta_msec); 2653 elapsed_msec += delta_msec; 2654 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2655 goto force; 2656 } 2657 2658 if (wd32 & RISC_SEMAPHORE_FORCE) 2659 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2660 2661 goto attempt; 2662 2663 force: 2664 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2665 2666 acquired: 2667 return; 2668 } 2669 2670 /** 2671 * qla24xx_reset_chip() - Reset ISP24xx chip. 2672 * @vha: HA context 2673 * 2674 * Returns 0 on success. 2675 */ 2676 void 2677 qla24xx_reset_chip(scsi_qla_host_t *vha) 2678 { 2679 struct qla_hw_data *ha = vha->hw; 2680 2681 if (pci_channel_offline(ha->pdev) && 2682 ha->flags.pci_channel_io_perm_failure) { 2683 return; 2684 } 2685 2686 ha->isp_ops->disable_intrs(ha); 2687 2688 qla25xx_manipulate_risc_semaphore(vha); 2689 2690 /* Perform RISC reset. */ 2691 qla24xx_reset_risc(vha); 2692 } 2693 2694 /** 2695 * qla2x00_chip_diag() - Test chip for proper operation. 2696 * @vha: HA context 2697 * 2698 * Returns 0 on success. 2699 */ 2700 int 2701 qla2x00_chip_diag(scsi_qla_host_t *vha) 2702 { 2703 int rval; 2704 struct qla_hw_data *ha = vha->hw; 2705 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2706 unsigned long flags = 0; 2707 uint16_t data; 2708 uint32_t cnt; 2709 uint16_t mb[5]; 2710 struct req_que *req = ha->req_q_map[0]; 2711 2712 /* Assume a failed state */ 2713 rval = QLA_FUNCTION_FAILED; 2714 2715 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2716 ®->flash_address); 2717 2718 spin_lock_irqsave(&ha->hardware_lock, flags); 2719 2720 /* Reset ISP chip. */ 2721 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2722 2723 /* 2724 * We need to have a delay here since the card will not respond while 2725 * in reset causing an MCA on some architectures. 2726 */ 2727 udelay(20); 2728 data = qla2x00_debounce_register(®->ctrl_status); 2729 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2730 udelay(5); 2731 data = RD_REG_WORD(®->ctrl_status); 2732 barrier(); 2733 } 2734 2735 if (!cnt) 2736 goto chip_diag_failed; 2737 2738 ql_dbg(ql_dbg_init, vha, 0x007c, 2739 "Reset register cleared by chip reset.\n"); 2740 2741 /* Reset RISC processor. */ 2742 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2743 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2744 2745 /* Workaround for QLA2312 PCI parity error */ 2746 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2747 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2748 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2749 udelay(5); 2750 data = RD_MAILBOX_REG(ha, reg, 0); 2751 barrier(); 2752 } 2753 } else 2754 udelay(10); 2755 2756 if (!cnt) 2757 goto chip_diag_failed; 2758 2759 /* Check product ID of chip */ 2760 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2761 2762 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2763 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2764 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2765 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2766 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2767 mb[3] != PROD_ID_3) { 2768 ql_log(ql_log_warn, vha, 0x0062, 2769 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2770 mb[1], mb[2], mb[3]); 2771 2772 goto chip_diag_failed; 2773 } 2774 ha->product_id[0] = mb[1]; 2775 ha->product_id[1] = mb[2]; 2776 ha->product_id[2] = mb[3]; 2777 ha->product_id[3] = mb[4]; 2778 2779 /* Adjust fw RISC transfer size */ 2780 if (req->length > 1024) 2781 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2782 else 2783 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2784 req->length; 2785 2786 if (IS_QLA2200(ha) && 2787 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2788 /* Limit firmware transfer size with a 2200A */ 2789 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2790 2791 ha->device_type |= DT_ISP2200A; 2792 ha->fw_transfer_size = 128; 2793 } 2794 2795 /* Wrap Incoming Mailboxes Test. */ 2796 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2797 2798 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2799 rval = qla2x00_mbx_reg_test(vha); 2800 if (rval) 2801 ql_log(ql_log_warn, vha, 0x0080, 2802 "Failed mailbox send register test.\n"); 2803 else 2804 /* Flag a successful rval */ 2805 rval = QLA_SUCCESS; 2806 spin_lock_irqsave(&ha->hardware_lock, flags); 2807 2808 chip_diag_failed: 2809 if (rval) 2810 ql_log(ql_log_info, vha, 0x0081, 2811 "Chip diagnostics **** FAILED ****.\n"); 2812 2813 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2814 2815 return (rval); 2816 } 2817 2818 /** 2819 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 2820 * @vha: HA context 2821 * 2822 * Returns 0 on success. 2823 */ 2824 int 2825 qla24xx_chip_diag(scsi_qla_host_t *vha) 2826 { 2827 int rval; 2828 struct qla_hw_data *ha = vha->hw; 2829 struct req_que *req = ha->req_q_map[0]; 2830 2831 if (IS_P3P_TYPE(ha)) 2832 return QLA_SUCCESS; 2833 2834 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 2835 2836 rval = qla2x00_mbx_reg_test(vha); 2837 if (rval) { 2838 ql_log(ql_log_warn, vha, 0x0082, 2839 "Failed mailbox send register test.\n"); 2840 } else { 2841 /* Flag a successful rval */ 2842 rval = QLA_SUCCESS; 2843 } 2844 2845 return rval; 2846 } 2847 2848 static void 2849 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 2850 { 2851 int rval; 2852 dma_addr_t tc_dma; 2853 void *tc; 2854 struct qla_hw_data *ha = vha->hw; 2855 2856 if (ha->eft) { 2857 ql_dbg(ql_dbg_init, vha, 0x00bd, 2858 "%s: Offload Mem is already allocated.\n", 2859 __func__); 2860 return; 2861 } 2862 2863 if (IS_FWI2_CAPABLE(ha)) { 2864 /* Allocate memory for Fibre Channel Event Buffer. */ 2865 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2866 !IS_QLA27XX(ha)) 2867 goto try_eft; 2868 2869 if (ha->fce) 2870 dma_free_coherent(&ha->pdev->dev, 2871 FCE_SIZE, ha->fce, ha->fce_dma); 2872 2873 /* Allocate memory for Fibre Channel Event Buffer. */ 2874 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 2875 GFP_KERNEL); 2876 if (!tc) { 2877 ql_log(ql_log_warn, vha, 0x00be, 2878 "Unable to allocate (%d KB) for FCE.\n", 2879 FCE_SIZE / 1024); 2880 goto try_eft; 2881 } 2882 2883 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 2884 ha->fce_mb, &ha->fce_bufs); 2885 if (rval) { 2886 ql_log(ql_log_warn, vha, 0x00bf, 2887 "Unable to initialize FCE (%d).\n", rval); 2888 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 2889 tc_dma); 2890 ha->flags.fce_enabled = 0; 2891 goto try_eft; 2892 } 2893 ql_dbg(ql_dbg_init, vha, 0x00c0, 2894 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 2895 2896 ha->flags.fce_enabled = 1; 2897 ha->fce_dma = tc_dma; 2898 ha->fce = tc; 2899 2900 try_eft: 2901 if (ha->eft) 2902 dma_free_coherent(&ha->pdev->dev, 2903 EFT_SIZE, ha->eft, ha->eft_dma); 2904 2905 /* Allocate memory for Extended Trace Buffer. */ 2906 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 2907 GFP_KERNEL); 2908 if (!tc) { 2909 ql_log(ql_log_warn, vha, 0x00c1, 2910 "Unable to allocate (%d KB) for EFT.\n", 2911 EFT_SIZE / 1024); 2912 goto eft_err; 2913 } 2914 2915 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 2916 if (rval) { 2917 ql_log(ql_log_warn, vha, 0x00c2, 2918 "Unable to initialize EFT (%d).\n", rval); 2919 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 2920 tc_dma); 2921 goto eft_err; 2922 } 2923 ql_dbg(ql_dbg_init, vha, 0x00c3, 2924 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2925 2926 ha->eft_dma = tc_dma; 2927 ha->eft = tc; 2928 } 2929 2930 eft_err: 2931 return; 2932 } 2933 2934 void 2935 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 2936 { 2937 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 2938 eft_size, fce_size, mq_size; 2939 struct qla_hw_data *ha = vha->hw; 2940 struct req_que *req = ha->req_q_map[0]; 2941 struct rsp_que *rsp = ha->rsp_q_map[0]; 2942 struct qla2xxx_fw_dump *fw_dump; 2943 2944 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 2945 req_q_size = rsp_q_size = 0; 2946 2947 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2948 fixed_size = sizeof(struct qla2100_fw_dump); 2949 } else if (IS_QLA23XX(ha)) { 2950 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 2951 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 2952 sizeof(uint16_t); 2953 } else if (IS_FWI2_CAPABLE(ha)) { 2954 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 2955 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 2956 else if (IS_QLA81XX(ha)) 2957 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 2958 else if (IS_QLA25XX(ha)) 2959 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 2960 else 2961 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 2962 2963 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 2964 sizeof(uint32_t); 2965 if (ha->mqenable) { 2966 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 2967 mq_size = sizeof(struct qla2xxx_mq_chain); 2968 /* 2969 * Allocate maximum buffer size for all queues. 2970 * Resizing must be done at end-of-dump processing. 2971 */ 2972 mq_size += ha->max_req_queues * 2973 (req->length * sizeof(request_t)); 2974 mq_size += ha->max_rsp_queues * 2975 (rsp->length * sizeof(response_t)); 2976 } 2977 if (ha->tgt.atio_ring) 2978 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 2979 /* Allocate memory for Fibre Channel Event Buffer. */ 2980 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2981 !IS_QLA27XX(ha)) 2982 goto try_eft; 2983 2984 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 2985 try_eft: 2986 ql_dbg(ql_dbg_init, vha, 0x00c3, 2987 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2988 eft_size = EFT_SIZE; 2989 } 2990 2991 if (IS_QLA27XX(ha)) { 2992 if (!ha->fw_dump_template) { 2993 ql_log(ql_log_warn, vha, 0x00ba, 2994 "Failed missing fwdump template\n"); 2995 return; 2996 } 2997 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 2998 ql_dbg(ql_dbg_init, vha, 0x00fa, 2999 "-> allocating fwdump (%x bytes)...\n", dump_size); 3000 goto allocate; 3001 } 3002 3003 req_q_size = req->length * sizeof(request_t); 3004 rsp_q_size = rsp->length * sizeof(response_t); 3005 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3006 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 3007 ha->chain_offset = dump_size; 3008 dump_size += mq_size + fce_size; 3009 3010 if (ha->exchoffld_buf) 3011 dump_size += sizeof(struct qla2xxx_offld_chain) + 3012 ha->exchoffld_size; 3013 if (ha->exlogin_buf) 3014 dump_size += sizeof(struct qla2xxx_offld_chain) + 3015 ha->exlogin_size; 3016 3017 allocate: 3018 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 3019 fw_dump = vmalloc(dump_size); 3020 if (!fw_dump) { 3021 ql_log(ql_log_warn, vha, 0x00c4, 3022 "Unable to allocate (%d KB) for firmware dump.\n", 3023 dump_size / 1024); 3024 } else { 3025 if (ha->fw_dump) 3026 vfree(ha->fw_dump); 3027 ha->fw_dump = fw_dump; 3028 3029 ha->fw_dump_len = dump_size; 3030 ql_dbg(ql_dbg_init, vha, 0x00c5, 3031 "Allocated (%d KB) for firmware dump.\n", 3032 dump_size / 1024); 3033 3034 if (IS_QLA27XX(ha)) 3035 return; 3036 3037 ha->fw_dump->signature[0] = 'Q'; 3038 ha->fw_dump->signature[1] = 'L'; 3039 ha->fw_dump->signature[2] = 'G'; 3040 ha->fw_dump->signature[3] = 'C'; 3041 ha->fw_dump->version = htonl(1); 3042 3043 ha->fw_dump->fixed_size = htonl(fixed_size); 3044 ha->fw_dump->mem_size = htonl(mem_size); 3045 ha->fw_dump->req_q_size = htonl(req_q_size); 3046 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3047 3048 ha->fw_dump->eft_size = htonl(eft_size); 3049 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3050 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3051 3052 ha->fw_dump->header_size = 3053 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3054 } 3055 } 3056 } 3057 3058 static int 3059 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3060 { 3061 #define MPS_MASK 0xe0 3062 int rval; 3063 uint16_t dc; 3064 uint32_t dw; 3065 3066 if (!IS_QLA81XX(vha->hw)) 3067 return QLA_SUCCESS; 3068 3069 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3070 if (rval != QLA_SUCCESS) { 3071 ql_log(ql_log_warn, vha, 0x0105, 3072 "Unable to acquire semaphore.\n"); 3073 goto done; 3074 } 3075 3076 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3077 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3078 if (rval != QLA_SUCCESS) { 3079 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3080 goto done_release; 3081 } 3082 3083 dc &= MPS_MASK; 3084 if (dc == (dw & MPS_MASK)) 3085 goto done_release; 3086 3087 dw &= ~MPS_MASK; 3088 dw |= dc; 3089 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3090 if (rval != QLA_SUCCESS) { 3091 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3092 } 3093 3094 done_release: 3095 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3096 if (rval != QLA_SUCCESS) { 3097 ql_log(ql_log_warn, vha, 0x006d, 3098 "Unable to release semaphore.\n"); 3099 } 3100 3101 done: 3102 return rval; 3103 } 3104 3105 int 3106 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3107 { 3108 /* Don't try to reallocate the array */ 3109 if (req->outstanding_cmds) 3110 return QLA_SUCCESS; 3111 3112 if (!IS_FWI2_CAPABLE(ha)) 3113 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3114 else { 3115 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3116 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3117 else 3118 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3119 } 3120 3121 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 3122 req->num_outstanding_cmds, GFP_KERNEL); 3123 3124 if (!req->outstanding_cmds) { 3125 /* 3126 * Try to allocate a minimal size just so we can get through 3127 * initialization. 3128 */ 3129 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3130 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 3131 req->num_outstanding_cmds, GFP_KERNEL); 3132 3133 if (!req->outstanding_cmds) { 3134 ql_log(ql_log_fatal, NULL, 0x0126, 3135 "Failed to allocate memory for " 3136 "outstanding_cmds for req_que %p.\n", req); 3137 req->num_outstanding_cmds = 0; 3138 return QLA_FUNCTION_FAILED; 3139 } 3140 } 3141 3142 return QLA_SUCCESS; 3143 } 3144 3145 #define PRINT_FIELD(_field, _flag, _str) { \ 3146 if (a0->_field & _flag) {\ 3147 if (p) {\ 3148 strcat(ptr, "|");\ 3149 ptr++;\ 3150 leftover--;\ 3151 } \ 3152 len = snprintf(ptr, leftover, "%s", _str); \ 3153 p = 1;\ 3154 leftover -= len;\ 3155 ptr += len; \ 3156 } \ 3157 } 3158 3159 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3160 { 3161 #define STR_LEN 64 3162 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3163 u8 str[STR_LEN], *ptr, p; 3164 int leftover, len; 3165 3166 memset(str, 0, STR_LEN); 3167 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3168 ql_dbg(ql_dbg_init, vha, 0x015a, 3169 "SFP MFG Name: %s\n", str); 3170 3171 memset(str, 0, STR_LEN); 3172 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3173 ql_dbg(ql_dbg_init, vha, 0x015c, 3174 "SFP Part Name: %s\n", str); 3175 3176 /* media */ 3177 memset(str, 0, STR_LEN); 3178 ptr = str; 3179 leftover = STR_LEN; 3180 p = len = 0; 3181 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3182 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3183 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3184 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3185 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3186 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3187 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3188 ql_dbg(ql_dbg_init, vha, 0x0160, 3189 "SFP Media: %s\n", str); 3190 3191 /* link length */ 3192 memset(str, 0, STR_LEN); 3193 ptr = str; 3194 leftover = STR_LEN; 3195 p = len = 0; 3196 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3197 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3198 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3199 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3200 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3201 ql_dbg(ql_dbg_init, vha, 0x0196, 3202 "SFP Link Length: %s\n", str); 3203 3204 memset(str, 0, STR_LEN); 3205 ptr = str; 3206 leftover = STR_LEN; 3207 p = len = 0; 3208 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3209 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3210 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3211 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3212 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3213 ql_dbg(ql_dbg_init, vha, 0x016e, 3214 "SFP FC Link Tech: %s\n", str); 3215 3216 if (a0->length_km) 3217 ql_dbg(ql_dbg_init, vha, 0x016f, 3218 "SFP Distant: %d km\n", a0->length_km); 3219 if (a0->length_100m) 3220 ql_dbg(ql_dbg_init, vha, 0x0170, 3221 "SFP Distant: %d m\n", a0->length_100m*100); 3222 if (a0->length_50um_10m) 3223 ql_dbg(ql_dbg_init, vha, 0x0189, 3224 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3225 if (a0->length_62um_10m) 3226 ql_dbg(ql_dbg_init, vha, 0x018a, 3227 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3228 if (a0->length_om4_10m) 3229 ql_dbg(ql_dbg_init, vha, 0x0194, 3230 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3231 if (a0->length_om3_10m) 3232 ql_dbg(ql_dbg_init, vha, 0x0195, 3233 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3234 } 3235 3236 3237 /* 3238 * Return Code: 3239 * QLA_SUCCESS: no action 3240 * QLA_INTERFACE_ERROR: SFP is not there. 3241 * QLA_FUNCTION_FAILED: detected New SFP 3242 */ 3243 int 3244 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3245 { 3246 int rc = QLA_SUCCESS; 3247 struct sff_8247_a0 *a; 3248 struct qla_hw_data *ha = vha->hw; 3249 3250 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3251 goto out; 3252 3253 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3254 if (rc) 3255 goto out; 3256 3257 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3258 qla2xxx_print_sfp_info(vha); 3259 3260 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3261 /* long range */ 3262 ha->flags.detected_lr_sfp = 1; 3263 3264 if (a->length_km > 5 || a->length_100m > 50) 3265 ha->long_range_distance = LR_DISTANCE_10K; 3266 else 3267 ha->long_range_distance = LR_DISTANCE_5K; 3268 3269 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3270 ql_dbg(ql_dbg_async, vha, 0x507b, 3271 "Detected Long Range SFP.\n"); 3272 } else { 3273 /* short range */ 3274 ha->flags.detected_lr_sfp = 0; 3275 if (ha->flags.using_lr_setting) 3276 ql_dbg(ql_dbg_async, vha, 0x5084, 3277 "Detected Short Range SFP.\n"); 3278 } 3279 3280 if (!vha->flags.init_done) 3281 rc = QLA_SUCCESS; 3282 out: 3283 return rc; 3284 } 3285 3286 /** 3287 * qla2x00_setup_chip() - Load and start RISC firmware. 3288 * @vha: HA context 3289 * 3290 * Returns 0 on success. 3291 */ 3292 static int 3293 qla2x00_setup_chip(scsi_qla_host_t *vha) 3294 { 3295 int rval; 3296 uint32_t srisc_address = 0; 3297 struct qla_hw_data *ha = vha->hw; 3298 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3299 unsigned long flags; 3300 uint16_t fw_major_version; 3301 3302 if (IS_P3P_TYPE(ha)) { 3303 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3304 if (rval == QLA_SUCCESS) { 3305 qla2x00_stop_firmware(vha); 3306 goto enable_82xx_npiv; 3307 } else 3308 goto failed; 3309 } 3310 3311 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3312 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3313 spin_lock_irqsave(&ha->hardware_lock, flags); 3314 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3315 RD_REG_WORD(®->hccr); 3316 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3317 } 3318 3319 qla81xx_mpi_sync(vha); 3320 3321 /* Load firmware sequences */ 3322 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3323 if (rval == QLA_SUCCESS) { 3324 ql_dbg(ql_dbg_init, vha, 0x00c9, 3325 "Verifying Checksum of loaded RISC code.\n"); 3326 3327 rval = qla2x00_verify_checksum(vha, srisc_address); 3328 if (rval == QLA_SUCCESS) { 3329 /* Start firmware execution. */ 3330 ql_dbg(ql_dbg_init, vha, 0x00ca, 3331 "Starting firmware.\n"); 3332 3333 if (ql2xexlogins) 3334 ha->flags.exlogins_enabled = 1; 3335 3336 if (qla_is_exch_offld_enabled(vha)) 3337 ha->flags.exchoffld_enabled = 1; 3338 3339 rval = qla2x00_execute_fw(vha, srisc_address); 3340 /* Retrieve firmware information. */ 3341 if (rval == QLA_SUCCESS) { 3342 qla24xx_detect_sfp(vha); 3343 3344 rval = qla2x00_set_exlogins_buffer(vha); 3345 if (rval != QLA_SUCCESS) 3346 goto failed; 3347 3348 rval = qla2x00_set_exchoffld_buffer(vha); 3349 if (rval != QLA_SUCCESS) 3350 goto failed; 3351 3352 enable_82xx_npiv: 3353 fw_major_version = ha->fw_major_version; 3354 if (IS_P3P_TYPE(ha)) 3355 qla82xx_check_md_needed(vha); 3356 else 3357 rval = qla2x00_get_fw_version(vha); 3358 if (rval != QLA_SUCCESS) 3359 goto failed; 3360 ha->flags.npiv_supported = 0; 3361 if (IS_QLA2XXX_MIDTYPE(ha) && 3362 (ha->fw_attributes & BIT_2)) { 3363 ha->flags.npiv_supported = 1; 3364 if ((!ha->max_npiv_vports) || 3365 ((ha->max_npiv_vports + 1) % 3366 MIN_MULTI_ID_FABRIC)) 3367 ha->max_npiv_vports = 3368 MIN_MULTI_ID_FABRIC - 1; 3369 } 3370 qla2x00_get_resource_cnts(vha); 3371 3372 /* 3373 * Allocate the array of outstanding commands 3374 * now that we know the firmware resources. 3375 */ 3376 rval = qla2x00_alloc_outstanding_cmds(ha, 3377 vha->req); 3378 if (rval != QLA_SUCCESS) 3379 goto failed; 3380 3381 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3382 qla2x00_alloc_offload_mem(vha); 3383 3384 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3385 qla2x00_alloc_fw_dump(vha); 3386 3387 } else { 3388 goto failed; 3389 } 3390 } else { 3391 ql_log(ql_log_fatal, vha, 0x00cd, 3392 "ISP Firmware failed checksum.\n"); 3393 goto failed; 3394 } 3395 } else 3396 goto failed; 3397 3398 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3399 /* Enable proper parity. */ 3400 spin_lock_irqsave(&ha->hardware_lock, flags); 3401 if (IS_QLA2300(ha)) 3402 /* SRAM parity */ 3403 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3404 else 3405 /* SRAM, Instruction RAM and GP RAM parity */ 3406 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3407 RD_REG_WORD(®->hccr); 3408 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3409 } 3410 3411 if (IS_QLA27XX(ha)) 3412 ha->flags.fac_supported = 1; 3413 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3414 uint32_t size; 3415 3416 rval = qla81xx_fac_get_sector_size(vha, &size); 3417 if (rval == QLA_SUCCESS) { 3418 ha->flags.fac_supported = 1; 3419 ha->fdt_block_size = size << 2; 3420 } else { 3421 ql_log(ql_log_warn, vha, 0x00ce, 3422 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3423 ha->fw_major_version, ha->fw_minor_version, 3424 ha->fw_subminor_version); 3425 3426 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3427 ha->flags.fac_supported = 0; 3428 rval = QLA_SUCCESS; 3429 } 3430 } 3431 } 3432 failed: 3433 if (rval) { 3434 ql_log(ql_log_fatal, vha, 0x00cf, 3435 "Setup chip ****FAILED****.\n"); 3436 } 3437 3438 return (rval); 3439 } 3440 3441 /** 3442 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3443 * @rsp: response queue 3444 * 3445 * Beginning of request ring has initialization control block already built 3446 * by nvram config routine. 3447 * 3448 * Returns 0 on success. 3449 */ 3450 void 3451 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3452 { 3453 uint16_t cnt; 3454 response_t *pkt; 3455 3456 rsp->ring_ptr = rsp->ring; 3457 rsp->ring_index = 0; 3458 rsp->status_srb = NULL; 3459 pkt = rsp->ring_ptr; 3460 for (cnt = 0; cnt < rsp->length; cnt++) { 3461 pkt->signature = RESPONSE_PROCESSED; 3462 pkt++; 3463 } 3464 } 3465 3466 /** 3467 * qla2x00_update_fw_options() - Read and process firmware options. 3468 * @vha: HA context 3469 * 3470 * Returns 0 on success. 3471 */ 3472 void 3473 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3474 { 3475 uint16_t swing, emphasis, tx_sens, rx_sens; 3476 struct qla_hw_data *ha = vha->hw; 3477 3478 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3479 qla2x00_get_fw_options(vha, ha->fw_options); 3480 3481 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3482 return; 3483 3484 /* Serial Link options. */ 3485 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3486 "Serial link options.\n"); 3487 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3488 (uint8_t *)&ha->fw_seriallink_options, 3489 sizeof(ha->fw_seriallink_options)); 3490 3491 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3492 if (ha->fw_seriallink_options[3] & BIT_2) { 3493 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3494 3495 /* 1G settings */ 3496 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3497 emphasis = (ha->fw_seriallink_options[2] & 3498 (BIT_4 | BIT_3)) >> 3; 3499 tx_sens = ha->fw_seriallink_options[0] & 3500 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3501 rx_sens = (ha->fw_seriallink_options[0] & 3502 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3503 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3504 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3505 if (rx_sens == 0x0) 3506 rx_sens = 0x3; 3507 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3508 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3509 ha->fw_options[10] |= BIT_5 | 3510 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3511 (tx_sens & (BIT_1 | BIT_0)); 3512 3513 /* 2G settings */ 3514 swing = (ha->fw_seriallink_options[2] & 3515 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3516 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3517 tx_sens = ha->fw_seriallink_options[1] & 3518 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3519 rx_sens = (ha->fw_seriallink_options[1] & 3520 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3521 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3522 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3523 if (rx_sens == 0x0) 3524 rx_sens = 0x3; 3525 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3526 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3527 ha->fw_options[11] |= BIT_5 | 3528 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3529 (tx_sens & (BIT_1 | BIT_0)); 3530 } 3531 3532 /* FCP2 options. */ 3533 /* Return command IOCBs without waiting for an ABTS to complete. */ 3534 ha->fw_options[3] |= BIT_13; 3535 3536 /* LED scheme. */ 3537 if (ha->flags.enable_led_scheme) 3538 ha->fw_options[2] |= BIT_12; 3539 3540 /* Detect ISP6312. */ 3541 if (IS_QLA6312(ha)) 3542 ha->fw_options[2] |= BIT_13; 3543 3544 /* Set Retry FLOGI in case of P2P connection */ 3545 if (ha->operating_mode == P2P) { 3546 ha->fw_options[2] |= BIT_3; 3547 ql_dbg(ql_dbg_disc, vha, 0x2100, 3548 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3549 __func__, ha->fw_options[2]); 3550 } 3551 3552 /* Update firmware options. */ 3553 qla2x00_set_fw_options(vha, ha->fw_options); 3554 } 3555 3556 void 3557 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3558 { 3559 int rval; 3560 struct qla_hw_data *ha = vha->hw; 3561 3562 if (IS_P3P_TYPE(ha)) 3563 return; 3564 3565 /* Hold status IOCBs until ABTS response received. */ 3566 if (ql2xfwholdabts) 3567 ha->fw_options[3] |= BIT_12; 3568 3569 /* Set Retry FLOGI in case of P2P connection */ 3570 if (ha->operating_mode == P2P) { 3571 ha->fw_options[2] |= BIT_3; 3572 ql_dbg(ql_dbg_disc, vha, 0x2101, 3573 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3574 __func__, ha->fw_options[2]); 3575 } 3576 3577 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3578 if (ql2xmvasynctoatio && 3579 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3580 if (qla_tgt_mode_enabled(vha) || 3581 qla_dual_mode_enabled(vha)) 3582 ha->fw_options[2] |= BIT_11; 3583 else 3584 ha->fw_options[2] &= ~BIT_11; 3585 } 3586 3587 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3588 /* 3589 * Tell FW to track each exchange to prevent 3590 * driver from using stale exchange. 3591 */ 3592 if (qla_tgt_mode_enabled(vha) || 3593 qla_dual_mode_enabled(vha)) 3594 ha->fw_options[2] |= BIT_4; 3595 else 3596 ha->fw_options[2] &= ~BIT_4; 3597 3598 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3599 if (qla2xuseresexchforels) 3600 ha->fw_options[2] |= BIT_8; 3601 else 3602 ha->fw_options[2] &= ~BIT_8; 3603 } 3604 3605 ql_dbg(ql_dbg_init, vha, 0x00e8, 3606 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3607 __func__, ha->fw_options[1], ha->fw_options[2], 3608 ha->fw_options[3], vha->host->active_mode); 3609 3610 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3611 qla2x00_set_fw_options(vha, ha->fw_options); 3612 3613 /* Update Serial Link options. */ 3614 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3615 return; 3616 3617 rval = qla2x00_set_serdes_params(vha, 3618 le16_to_cpu(ha->fw_seriallink_options24[1]), 3619 le16_to_cpu(ha->fw_seriallink_options24[2]), 3620 le16_to_cpu(ha->fw_seriallink_options24[3])); 3621 if (rval != QLA_SUCCESS) { 3622 ql_log(ql_log_warn, vha, 0x0104, 3623 "Unable to update Serial Link options (%x).\n", rval); 3624 } 3625 } 3626 3627 void 3628 qla2x00_config_rings(struct scsi_qla_host *vha) 3629 { 3630 struct qla_hw_data *ha = vha->hw; 3631 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3632 struct req_que *req = ha->req_q_map[0]; 3633 struct rsp_que *rsp = ha->rsp_q_map[0]; 3634 3635 /* Setup ring parameters in initialization control block. */ 3636 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3637 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3638 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3639 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3640 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3641 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3642 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3643 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3644 3645 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3646 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3647 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3648 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3649 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3650 } 3651 3652 void 3653 qla24xx_config_rings(struct scsi_qla_host *vha) 3654 { 3655 struct qla_hw_data *ha = vha->hw; 3656 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3657 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3658 struct qla_msix_entry *msix; 3659 struct init_cb_24xx *icb; 3660 uint16_t rid = 0; 3661 struct req_que *req = ha->req_q_map[0]; 3662 struct rsp_que *rsp = ha->rsp_q_map[0]; 3663 3664 /* Setup ring parameters in initialization control block. */ 3665 icb = (struct init_cb_24xx *)ha->init_cb; 3666 icb->request_q_outpointer = cpu_to_le16(0); 3667 icb->response_q_inpointer = cpu_to_le16(0); 3668 icb->request_q_length = cpu_to_le16(req->length); 3669 icb->response_q_length = cpu_to_le16(rsp->length); 3670 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3671 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3672 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3673 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3674 3675 /* Setup ATIO queue dma pointers for target mode */ 3676 icb->atio_q_inpointer = cpu_to_le16(0); 3677 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3678 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3679 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3680 3681 if (IS_SHADOW_REG_CAPABLE(ha)) 3682 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3683 3684 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3685 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3686 icb->rid = cpu_to_le16(rid); 3687 if (ha->flags.msix_enabled) { 3688 msix = &ha->msix_entries[1]; 3689 ql_dbg(ql_dbg_init, vha, 0x0019, 3690 "Registering vector 0x%x for base que.\n", 3691 msix->entry); 3692 icb->msix = cpu_to_le16(msix->entry); 3693 } 3694 /* Use alternate PCI bus number */ 3695 if (MSB(rid)) 3696 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3697 /* Use alternate PCI devfn */ 3698 if (LSB(rid)) 3699 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3700 3701 /* Use Disable MSIX Handshake mode for capable adapters */ 3702 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3703 (ha->flags.msix_enabled)) { 3704 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3705 ha->flags.disable_msix_handshake = 1; 3706 ql_dbg(ql_dbg_init, vha, 0x00fe, 3707 "MSIX Handshake Disable Mode turned on.\n"); 3708 } else { 3709 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3710 } 3711 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3712 3713 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3714 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3715 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3716 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3717 } else { 3718 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3719 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3720 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3721 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3722 } 3723 qlt_24xx_config_rings(vha); 3724 3725 /* PCI posting */ 3726 RD_REG_DWORD(&ioreg->hccr); 3727 } 3728 3729 /** 3730 * qla2x00_init_rings() - Initializes firmware. 3731 * @vha: HA context 3732 * 3733 * Beginning of request ring has initialization control block already built 3734 * by nvram config routine. 3735 * 3736 * Returns 0 on success. 3737 */ 3738 int 3739 qla2x00_init_rings(scsi_qla_host_t *vha) 3740 { 3741 int rval; 3742 unsigned long flags = 0; 3743 int cnt, que; 3744 struct qla_hw_data *ha = vha->hw; 3745 struct req_que *req; 3746 struct rsp_que *rsp; 3747 struct mid_init_cb_24xx *mid_init_cb = 3748 (struct mid_init_cb_24xx *) ha->init_cb; 3749 3750 spin_lock_irqsave(&ha->hardware_lock, flags); 3751 3752 /* Clear outstanding commands array. */ 3753 for (que = 0; que < ha->max_req_queues; que++) { 3754 req = ha->req_q_map[que]; 3755 if (!req || !test_bit(que, ha->req_qid_map)) 3756 continue; 3757 req->out_ptr = (void *)(req->ring + req->length); 3758 *req->out_ptr = 0; 3759 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3760 req->outstanding_cmds[cnt] = NULL; 3761 3762 req->current_outstanding_cmd = 1; 3763 3764 /* Initialize firmware. */ 3765 req->ring_ptr = req->ring; 3766 req->ring_index = 0; 3767 req->cnt = req->length; 3768 } 3769 3770 for (que = 0; que < ha->max_rsp_queues; que++) { 3771 rsp = ha->rsp_q_map[que]; 3772 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 3773 continue; 3774 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 3775 *rsp->in_ptr = 0; 3776 /* Initialize response queue entries */ 3777 if (IS_QLAFX00(ha)) 3778 qlafx00_init_response_q_entries(rsp); 3779 else 3780 qla2x00_init_response_q_entries(rsp); 3781 } 3782 3783 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 3784 ha->tgt.atio_ring_index = 0; 3785 /* Initialize ATIO queue entries */ 3786 qlt_init_atio_q_entries(vha); 3787 3788 ha->isp_ops->config_rings(vha); 3789 3790 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3791 3792 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 3793 3794 if (IS_QLAFX00(ha)) { 3795 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 3796 goto next_check; 3797 } 3798 3799 /* Update any ISP specific firmware options before initialization. */ 3800 ha->isp_ops->update_fw_options(vha); 3801 3802 if (ha->flags.npiv_supported) { 3803 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 3804 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 3805 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 3806 } 3807 3808 if (IS_FWI2_CAPABLE(ha)) { 3809 mid_init_cb->options = cpu_to_le16(BIT_1); 3810 mid_init_cb->init_cb.execution_throttle = 3811 cpu_to_le16(ha->cur_fw_xcb_count); 3812 ha->flags.dport_enabled = 3813 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 3814 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 3815 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 3816 /* FA-WWPN Status */ 3817 ha->flags.fawwpn_enabled = 3818 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 3819 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 3820 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 3821 } 3822 3823 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 3824 next_check: 3825 if (rval) { 3826 ql_log(ql_log_fatal, vha, 0x00d2, 3827 "Init Firmware **** FAILED ****.\n"); 3828 } else { 3829 ql_dbg(ql_dbg_init, vha, 0x00d3, 3830 "Init Firmware -- success.\n"); 3831 QLA_FW_STARTED(ha); 3832 } 3833 3834 return (rval); 3835 } 3836 3837 /** 3838 * qla2x00_fw_ready() - Waits for firmware ready. 3839 * @vha: HA context 3840 * 3841 * Returns 0 on success. 3842 */ 3843 static int 3844 qla2x00_fw_ready(scsi_qla_host_t *vha) 3845 { 3846 int rval; 3847 unsigned long wtime, mtime, cs84xx_time; 3848 uint16_t min_wait; /* Minimum wait time if loop is down */ 3849 uint16_t wait_time; /* Wait time if loop is coming ready */ 3850 uint16_t state[6]; 3851 struct qla_hw_data *ha = vha->hw; 3852 3853 if (IS_QLAFX00(vha->hw)) 3854 return qlafx00_fw_ready(vha); 3855 3856 rval = QLA_SUCCESS; 3857 3858 /* Time to wait for loop down */ 3859 if (IS_P3P_TYPE(ha)) 3860 min_wait = 30; 3861 else 3862 min_wait = 20; 3863 3864 /* 3865 * Firmware should take at most one RATOV to login, plus 5 seconds for 3866 * our own processing. 3867 */ 3868 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 3869 wait_time = min_wait; 3870 } 3871 3872 /* Min wait time if loop down */ 3873 mtime = jiffies + (min_wait * HZ); 3874 3875 /* wait time before firmware ready */ 3876 wtime = jiffies + (wait_time * HZ); 3877 3878 /* Wait for ISP to finish LIP */ 3879 if (!vha->flags.init_done) 3880 ql_log(ql_log_info, vha, 0x801e, 3881 "Waiting for LIP to complete.\n"); 3882 3883 do { 3884 memset(state, -1, sizeof(state)); 3885 rval = qla2x00_get_firmware_state(vha, state); 3886 if (rval == QLA_SUCCESS) { 3887 if (state[0] < FSTATE_LOSS_OF_SYNC) { 3888 vha->device_flags &= ~DFLG_NO_CABLE; 3889 } 3890 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 3891 ql_dbg(ql_dbg_taskm, vha, 0x801f, 3892 "fw_state=%x 84xx=%x.\n", state[0], 3893 state[2]); 3894 if ((state[2] & FSTATE_LOGGED_IN) && 3895 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 3896 ql_dbg(ql_dbg_taskm, vha, 0x8028, 3897 "Sending verify iocb.\n"); 3898 3899 cs84xx_time = jiffies; 3900 rval = qla84xx_init_chip(vha); 3901 if (rval != QLA_SUCCESS) { 3902 ql_log(ql_log_warn, 3903 vha, 0x8007, 3904 "Init chip failed.\n"); 3905 break; 3906 } 3907 3908 /* Add time taken to initialize. */ 3909 cs84xx_time = jiffies - cs84xx_time; 3910 wtime += cs84xx_time; 3911 mtime += cs84xx_time; 3912 ql_dbg(ql_dbg_taskm, vha, 0x8008, 3913 "Increasing wait time by %ld. " 3914 "New time %ld.\n", cs84xx_time, 3915 wtime); 3916 } 3917 } else if (state[0] == FSTATE_READY) { 3918 ql_dbg(ql_dbg_taskm, vha, 0x8037, 3919 "F/W Ready - OK.\n"); 3920 3921 qla2x00_get_retry_cnt(vha, &ha->retry_count, 3922 &ha->login_timeout, &ha->r_a_tov); 3923 3924 rval = QLA_SUCCESS; 3925 break; 3926 } 3927 3928 rval = QLA_FUNCTION_FAILED; 3929 3930 if (atomic_read(&vha->loop_down_timer) && 3931 state[0] != FSTATE_READY) { 3932 /* Loop down. Timeout on min_wait for states 3933 * other than Wait for Login. 3934 */ 3935 if (time_after_eq(jiffies, mtime)) { 3936 ql_log(ql_log_info, vha, 0x8038, 3937 "Cable is unplugged...\n"); 3938 3939 vha->device_flags |= DFLG_NO_CABLE; 3940 break; 3941 } 3942 } 3943 } else { 3944 /* Mailbox cmd failed. Timeout on min_wait. */ 3945 if (time_after_eq(jiffies, mtime) || 3946 ha->flags.isp82xx_fw_hung) 3947 break; 3948 } 3949 3950 if (time_after_eq(jiffies, wtime)) 3951 break; 3952 3953 /* Delay for a while */ 3954 msleep(500); 3955 } while (1); 3956 3957 ql_dbg(ql_dbg_taskm, vha, 0x803a, 3958 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 3959 state[1], state[2], state[3], state[4], state[5], jiffies); 3960 3961 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 3962 ql_log(ql_log_warn, vha, 0x803b, 3963 "Firmware ready **** FAILED ****.\n"); 3964 } 3965 3966 return (rval); 3967 } 3968 3969 /* 3970 * qla2x00_configure_hba 3971 * Setup adapter context. 3972 * 3973 * Input: 3974 * ha = adapter state pointer. 3975 * 3976 * Returns: 3977 * 0 = success 3978 * 3979 * Context: 3980 * Kernel context. 3981 */ 3982 static int 3983 qla2x00_configure_hba(scsi_qla_host_t *vha) 3984 { 3985 int rval; 3986 uint16_t loop_id; 3987 uint16_t topo; 3988 uint16_t sw_cap; 3989 uint8_t al_pa; 3990 uint8_t area; 3991 uint8_t domain; 3992 char connect_type[22]; 3993 struct qla_hw_data *ha = vha->hw; 3994 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 3995 port_id_t id; 3996 unsigned long flags; 3997 3998 /* Get host addresses. */ 3999 rval = qla2x00_get_adapter_id(vha, 4000 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4001 if (rval != QLA_SUCCESS) { 4002 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4003 IS_CNA_CAPABLE(ha) || 4004 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4005 ql_dbg(ql_dbg_disc, vha, 0x2008, 4006 "Loop is in a transition state.\n"); 4007 } else { 4008 ql_log(ql_log_warn, vha, 0x2009, 4009 "Unable to get host loop ID.\n"); 4010 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4011 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4012 ql_log(ql_log_warn, vha, 0x1151, 4013 "Doing link init.\n"); 4014 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4015 return rval; 4016 } 4017 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4018 } 4019 return (rval); 4020 } 4021 4022 if (topo == 4) { 4023 ql_log(ql_log_info, vha, 0x200a, 4024 "Cannot get topology - retrying.\n"); 4025 return (QLA_FUNCTION_FAILED); 4026 } 4027 4028 vha->loop_id = loop_id; 4029 4030 /* initialize */ 4031 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4032 ha->operating_mode = LOOP; 4033 ha->switch_cap = 0; 4034 4035 switch (topo) { 4036 case 0: 4037 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4038 ha->current_topology = ISP_CFG_NL; 4039 strcpy(connect_type, "(Loop)"); 4040 break; 4041 4042 case 1: 4043 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4044 ha->switch_cap = sw_cap; 4045 ha->current_topology = ISP_CFG_FL; 4046 strcpy(connect_type, "(FL_Port)"); 4047 break; 4048 4049 case 2: 4050 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4051 ha->operating_mode = P2P; 4052 ha->current_topology = ISP_CFG_N; 4053 strcpy(connect_type, "(N_Port-to-N_Port)"); 4054 break; 4055 4056 case 3: 4057 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4058 ha->switch_cap = sw_cap; 4059 ha->operating_mode = P2P; 4060 ha->current_topology = ISP_CFG_F; 4061 strcpy(connect_type, "(F_Port)"); 4062 break; 4063 4064 default: 4065 ql_dbg(ql_dbg_disc, vha, 0x200f, 4066 "HBA in unknown topology %x, using NL.\n", topo); 4067 ha->current_topology = ISP_CFG_NL; 4068 strcpy(connect_type, "(Loop)"); 4069 break; 4070 } 4071 4072 /* Save Host port and loop ID. */ 4073 /* byte order - Big Endian */ 4074 id.b.domain = domain; 4075 id.b.area = area; 4076 id.b.al_pa = al_pa; 4077 id.b.rsvd_1 = 0; 4078 spin_lock_irqsave(&ha->hardware_lock, flags); 4079 qlt_update_host_map(vha, id); 4080 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4081 4082 if (!vha->flags.init_done) 4083 ql_log(ql_log_info, vha, 0x2010, 4084 "Topology - %s, Host Loop address 0x%x.\n", 4085 connect_type, vha->loop_id); 4086 4087 return(rval); 4088 } 4089 4090 inline void 4091 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4092 char *def) 4093 { 4094 char *st, *en; 4095 uint16_t index; 4096 struct qla_hw_data *ha = vha->hw; 4097 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4098 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4099 4100 if (memcmp(model, BINZERO, len) != 0) { 4101 strncpy(ha->model_number, model, len); 4102 st = en = ha->model_number; 4103 en += len - 1; 4104 while (en > st) { 4105 if (*en != 0x20 && *en != 0x00) 4106 break; 4107 *en-- = '\0'; 4108 } 4109 4110 index = (ha->pdev->subsystem_device & 0xff); 4111 if (use_tbl && 4112 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4113 index < QLA_MODEL_NAMES) 4114 strncpy(ha->model_desc, 4115 qla2x00_model_name[index * 2 + 1], 4116 sizeof(ha->model_desc) - 1); 4117 } else { 4118 index = (ha->pdev->subsystem_device & 0xff); 4119 if (use_tbl && 4120 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4121 index < QLA_MODEL_NAMES) { 4122 strcpy(ha->model_number, 4123 qla2x00_model_name[index * 2]); 4124 strncpy(ha->model_desc, 4125 qla2x00_model_name[index * 2 + 1], 4126 sizeof(ha->model_desc) - 1); 4127 } else { 4128 strcpy(ha->model_number, def); 4129 } 4130 } 4131 if (IS_FWI2_CAPABLE(ha)) 4132 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4133 sizeof(ha->model_desc)); 4134 } 4135 4136 /* On sparc systems, obtain port and node WWN from firmware 4137 * properties. 4138 */ 4139 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4140 { 4141 #ifdef CONFIG_SPARC 4142 struct qla_hw_data *ha = vha->hw; 4143 struct pci_dev *pdev = ha->pdev; 4144 struct device_node *dp = pci_device_to_OF_node(pdev); 4145 const u8 *val; 4146 int len; 4147 4148 val = of_get_property(dp, "port-wwn", &len); 4149 if (val && len >= WWN_SIZE) 4150 memcpy(nv->port_name, val, WWN_SIZE); 4151 4152 val = of_get_property(dp, "node-wwn", &len); 4153 if (val && len >= WWN_SIZE) 4154 memcpy(nv->node_name, val, WWN_SIZE); 4155 #endif 4156 } 4157 4158 /* 4159 * NVRAM configuration for ISP 2xxx 4160 * 4161 * Input: 4162 * ha = adapter block pointer. 4163 * 4164 * Output: 4165 * initialization control block in response_ring 4166 * host adapters parameters in host adapter block 4167 * 4168 * Returns: 4169 * 0 = success. 4170 */ 4171 int 4172 qla2x00_nvram_config(scsi_qla_host_t *vha) 4173 { 4174 int rval; 4175 uint8_t chksum = 0; 4176 uint16_t cnt; 4177 uint8_t *dptr1, *dptr2; 4178 struct qla_hw_data *ha = vha->hw; 4179 init_cb_t *icb = ha->init_cb; 4180 nvram_t *nv = ha->nvram; 4181 uint8_t *ptr = ha->nvram; 4182 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4183 4184 rval = QLA_SUCCESS; 4185 4186 /* Determine NVRAM starting address. */ 4187 ha->nvram_size = sizeof(nvram_t); 4188 ha->nvram_base = 0; 4189 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4190 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4191 ha->nvram_base = 0x80; 4192 4193 /* Get NVRAM data and calculate checksum. */ 4194 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4195 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4196 chksum += *ptr++; 4197 4198 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4199 "Contents of NVRAM.\n"); 4200 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4201 (uint8_t *)nv, ha->nvram_size); 4202 4203 /* Bad NVRAM data, set defaults parameters. */ 4204 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4205 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4206 /* Reset NVRAM data. */ 4207 ql_log(ql_log_warn, vha, 0x0064, 4208 "Inconsistent NVRAM " 4209 "detected: checksum=0x%x id=%c version=0x%x.\n", 4210 chksum, nv->id[0], nv->nvram_version); 4211 ql_log(ql_log_warn, vha, 0x0065, 4212 "Falling back to " 4213 "functioning (yet invalid -- WWPN) defaults.\n"); 4214 4215 /* 4216 * Set default initialization control block. 4217 */ 4218 memset(nv, 0, ha->nvram_size); 4219 nv->parameter_block_version = ICB_VERSION; 4220 4221 if (IS_QLA23XX(ha)) { 4222 nv->firmware_options[0] = BIT_2 | BIT_1; 4223 nv->firmware_options[1] = BIT_7 | BIT_5; 4224 nv->add_firmware_options[0] = BIT_5; 4225 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4226 nv->frame_payload_size = 2048; 4227 nv->special_options[1] = BIT_7; 4228 } else if (IS_QLA2200(ha)) { 4229 nv->firmware_options[0] = BIT_2 | BIT_1; 4230 nv->firmware_options[1] = BIT_7 | BIT_5; 4231 nv->add_firmware_options[0] = BIT_5; 4232 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4233 nv->frame_payload_size = 1024; 4234 } else if (IS_QLA2100(ha)) { 4235 nv->firmware_options[0] = BIT_3 | BIT_1; 4236 nv->firmware_options[1] = BIT_5; 4237 nv->frame_payload_size = 1024; 4238 } 4239 4240 nv->max_iocb_allocation = cpu_to_le16(256); 4241 nv->execution_throttle = cpu_to_le16(16); 4242 nv->retry_count = 8; 4243 nv->retry_delay = 1; 4244 4245 nv->port_name[0] = 33; 4246 nv->port_name[3] = 224; 4247 nv->port_name[4] = 139; 4248 4249 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4250 4251 nv->login_timeout = 4; 4252 4253 /* 4254 * Set default host adapter parameters 4255 */ 4256 nv->host_p[1] = BIT_2; 4257 nv->reset_delay = 5; 4258 nv->port_down_retry_count = 8; 4259 nv->max_luns_per_target = cpu_to_le16(8); 4260 nv->link_down_timeout = 60; 4261 4262 rval = 1; 4263 } 4264 4265 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4266 /* 4267 * The SN2 does not provide BIOS emulation which means you can't change 4268 * potentially bogus BIOS settings. Force the use of default settings 4269 * for link rate and frame size. Hope that the rest of the settings 4270 * are valid. 4271 */ 4272 if (ia64_platform_is("sn2")) { 4273 nv->frame_payload_size = 2048; 4274 if (IS_QLA23XX(ha)) 4275 nv->special_options[1] = BIT_7; 4276 } 4277 #endif 4278 4279 /* Reset Initialization control block */ 4280 memset(icb, 0, ha->init_cb_size); 4281 4282 /* 4283 * Setup driver NVRAM options. 4284 */ 4285 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4286 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4287 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4288 nv->firmware_options[1] &= ~BIT_4; 4289 4290 if (IS_QLA23XX(ha)) { 4291 nv->firmware_options[0] |= BIT_2; 4292 nv->firmware_options[0] &= ~BIT_3; 4293 nv->special_options[0] &= ~BIT_6; 4294 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4295 4296 if (IS_QLA2300(ha)) { 4297 if (ha->fb_rev == FPM_2310) { 4298 strcpy(ha->model_number, "QLA2310"); 4299 } else { 4300 strcpy(ha->model_number, "QLA2300"); 4301 } 4302 } else { 4303 qla2x00_set_model_info(vha, nv->model_number, 4304 sizeof(nv->model_number), "QLA23xx"); 4305 } 4306 } else if (IS_QLA2200(ha)) { 4307 nv->firmware_options[0] |= BIT_2; 4308 /* 4309 * 'Point-to-point preferred, else loop' is not a safe 4310 * connection mode setting. 4311 */ 4312 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4313 (BIT_5 | BIT_4)) { 4314 /* Force 'loop preferred, else point-to-point'. */ 4315 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4316 nv->add_firmware_options[0] |= BIT_5; 4317 } 4318 strcpy(ha->model_number, "QLA22xx"); 4319 } else /*if (IS_QLA2100(ha))*/ { 4320 strcpy(ha->model_number, "QLA2100"); 4321 } 4322 4323 /* 4324 * Copy over NVRAM RISC parameter block to initialization control block. 4325 */ 4326 dptr1 = (uint8_t *)icb; 4327 dptr2 = (uint8_t *)&nv->parameter_block_version; 4328 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4329 while (cnt--) 4330 *dptr1++ = *dptr2++; 4331 4332 /* Copy 2nd half. */ 4333 dptr1 = (uint8_t *)icb->add_firmware_options; 4334 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4335 while (cnt--) 4336 *dptr1++ = *dptr2++; 4337 4338 /* Use alternate WWN? */ 4339 if (nv->host_p[1] & BIT_7) { 4340 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4341 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4342 } 4343 4344 /* Prepare nodename */ 4345 if ((icb->firmware_options[1] & BIT_6) == 0) { 4346 /* 4347 * Firmware will apply the following mask if the nodename was 4348 * not provided. 4349 */ 4350 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4351 icb->node_name[0] &= 0xF0; 4352 } 4353 4354 /* 4355 * Set host adapter parameters. 4356 */ 4357 4358 /* 4359 * BIT_7 in the host-parameters section allows for modification to 4360 * internal driver logging. 4361 */ 4362 if (nv->host_p[0] & BIT_7) 4363 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4364 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4365 /* Always load RISC code on non ISP2[12]00 chips. */ 4366 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4367 ha->flags.disable_risc_code_load = 0; 4368 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4369 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4370 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4371 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4372 ha->flags.disable_serdes = 0; 4373 4374 ha->operating_mode = 4375 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4376 4377 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4378 sizeof(ha->fw_seriallink_options)); 4379 4380 /* save HBA serial number */ 4381 ha->serial0 = icb->port_name[5]; 4382 ha->serial1 = icb->port_name[6]; 4383 ha->serial2 = icb->port_name[7]; 4384 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4385 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4386 4387 icb->execution_throttle = cpu_to_le16(0xFFFF); 4388 4389 ha->retry_count = nv->retry_count; 4390 4391 /* Set minimum login_timeout to 4 seconds. */ 4392 if (nv->login_timeout != ql2xlogintimeout) 4393 nv->login_timeout = ql2xlogintimeout; 4394 if (nv->login_timeout < 4) 4395 nv->login_timeout = 4; 4396 ha->login_timeout = nv->login_timeout; 4397 4398 /* Set minimum RATOV to 100 tenths of a second. */ 4399 ha->r_a_tov = 100; 4400 4401 ha->loop_reset_delay = nv->reset_delay; 4402 4403 /* Link Down Timeout = 0: 4404 * 4405 * When Port Down timer expires we will start returning 4406 * I/O's to OS with "DID_NO_CONNECT". 4407 * 4408 * Link Down Timeout != 0: 4409 * 4410 * The driver waits for the link to come up after link down 4411 * before returning I/Os to OS with "DID_NO_CONNECT". 4412 */ 4413 if (nv->link_down_timeout == 0) { 4414 ha->loop_down_abort_time = 4415 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4416 } else { 4417 ha->link_down_timeout = nv->link_down_timeout; 4418 ha->loop_down_abort_time = 4419 (LOOP_DOWN_TIME - ha->link_down_timeout); 4420 } 4421 4422 /* 4423 * Need enough time to try and get the port back. 4424 */ 4425 ha->port_down_retry_count = nv->port_down_retry_count; 4426 if (qlport_down_retry) 4427 ha->port_down_retry_count = qlport_down_retry; 4428 /* Set login_retry_count */ 4429 ha->login_retry_count = nv->retry_count; 4430 if (ha->port_down_retry_count == nv->port_down_retry_count && 4431 ha->port_down_retry_count > 3) 4432 ha->login_retry_count = ha->port_down_retry_count; 4433 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4434 ha->login_retry_count = ha->port_down_retry_count; 4435 if (ql2xloginretrycount) 4436 ha->login_retry_count = ql2xloginretrycount; 4437 4438 icb->lun_enables = cpu_to_le16(0); 4439 icb->command_resource_count = 0; 4440 icb->immediate_notify_resource_count = 0; 4441 icb->timeout = cpu_to_le16(0); 4442 4443 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4444 /* Enable RIO */ 4445 icb->firmware_options[0] &= ~BIT_3; 4446 icb->add_firmware_options[0] &= 4447 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4448 icb->add_firmware_options[0] |= BIT_2; 4449 icb->response_accumulation_timer = 3; 4450 icb->interrupt_delay_timer = 5; 4451 4452 vha->flags.process_response_queue = 1; 4453 } else { 4454 /* Enable ZIO. */ 4455 if (!vha->flags.init_done) { 4456 ha->zio_mode = icb->add_firmware_options[0] & 4457 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4458 ha->zio_timer = icb->interrupt_delay_timer ? 4459 icb->interrupt_delay_timer: 2; 4460 } 4461 icb->add_firmware_options[0] &= 4462 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4463 vha->flags.process_response_queue = 0; 4464 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4465 ha->zio_mode = QLA_ZIO_MODE_6; 4466 4467 ql_log(ql_log_info, vha, 0x0068, 4468 "ZIO mode %d enabled; timer delay (%d us).\n", 4469 ha->zio_mode, ha->zio_timer * 100); 4470 4471 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4472 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4473 vha->flags.process_response_queue = 1; 4474 } 4475 } 4476 4477 if (rval) { 4478 ql_log(ql_log_warn, vha, 0x0069, 4479 "NVRAM configuration failed.\n"); 4480 } 4481 return (rval); 4482 } 4483 4484 static void 4485 qla2x00_rport_del(void *data) 4486 { 4487 fc_port_t *fcport = data; 4488 struct fc_rport *rport; 4489 unsigned long flags; 4490 4491 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4492 rport = fcport->drport ? fcport->drport: fcport->rport; 4493 fcport->drport = NULL; 4494 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4495 if (rport) { 4496 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4497 "%s %8phN. rport %p roles %x\n", 4498 __func__, fcport->port_name, rport, 4499 rport->roles); 4500 4501 fc_remote_port_delete(rport); 4502 } 4503 } 4504 4505 /** 4506 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4507 * @vha: HA context 4508 * @flags: allocation flags 4509 * 4510 * Returns a pointer to the allocated fcport, or NULL, if none available. 4511 */ 4512 fc_port_t * 4513 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4514 { 4515 fc_port_t *fcport; 4516 4517 fcport = kzalloc(sizeof(fc_port_t), flags); 4518 if (!fcport) 4519 return NULL; 4520 4521 /* Setup fcport template structure. */ 4522 fcport->vha = vha; 4523 fcport->port_type = FCT_UNKNOWN; 4524 fcport->loop_id = FC_NO_LOOP_ID; 4525 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4526 fcport->supported_classes = FC_COS_UNSPECIFIED; 4527 4528 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4529 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4530 flags); 4531 fcport->disc_state = DSC_DELETED; 4532 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4533 fcport->deleted = QLA_SESS_DELETED; 4534 fcport->login_retry = vha->hw->login_retry_count; 4535 fcport->login_retry = 5; 4536 fcport->logout_on_delete = 1; 4537 4538 if (!fcport->ct_desc.ct_sns) { 4539 ql_log(ql_log_warn, vha, 0xd049, 4540 "Failed to allocate ct_sns request.\n"); 4541 kfree(fcport); 4542 fcport = NULL; 4543 } 4544 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4545 INIT_LIST_HEAD(&fcport->gnl_entry); 4546 INIT_LIST_HEAD(&fcport->list); 4547 4548 return fcport; 4549 } 4550 4551 void 4552 qla2x00_free_fcport(fc_port_t *fcport) 4553 { 4554 if (fcport->ct_desc.ct_sns) { 4555 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4556 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4557 fcport->ct_desc.ct_sns_dma); 4558 4559 fcport->ct_desc.ct_sns = NULL; 4560 } 4561 kfree(fcport); 4562 } 4563 4564 /* 4565 * qla2x00_configure_loop 4566 * Updates Fibre Channel Device Database with what is actually on loop. 4567 * 4568 * Input: 4569 * ha = adapter block pointer. 4570 * 4571 * Returns: 4572 * 0 = success. 4573 * 1 = error. 4574 * 2 = database was full and device was not configured. 4575 */ 4576 static int 4577 qla2x00_configure_loop(scsi_qla_host_t *vha) 4578 { 4579 int rval; 4580 unsigned long flags, save_flags; 4581 struct qla_hw_data *ha = vha->hw; 4582 rval = QLA_SUCCESS; 4583 4584 /* Get Initiator ID */ 4585 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4586 rval = qla2x00_configure_hba(vha); 4587 if (rval != QLA_SUCCESS) { 4588 ql_dbg(ql_dbg_disc, vha, 0x2013, 4589 "Unable to configure HBA.\n"); 4590 return (rval); 4591 } 4592 } 4593 4594 save_flags = flags = vha->dpc_flags; 4595 ql_dbg(ql_dbg_disc, vha, 0x2014, 4596 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4597 4598 /* 4599 * If we have both an RSCN and PORT UPDATE pending then handle them 4600 * both at the same time. 4601 */ 4602 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4603 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4604 4605 qla2x00_get_data_rate(vha); 4606 4607 /* Determine what we need to do */ 4608 if (ha->current_topology == ISP_CFG_FL && 4609 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4610 4611 set_bit(RSCN_UPDATE, &flags); 4612 4613 } else if (ha->current_topology == ISP_CFG_F && 4614 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4615 4616 set_bit(RSCN_UPDATE, &flags); 4617 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4618 4619 } else if (ha->current_topology == ISP_CFG_N) { 4620 clear_bit(RSCN_UPDATE, &flags); 4621 if (ha->flags.rida_fmt2) { 4622 /* With Rida Format 2, the login is already triggered. 4623 * We know who is on the other side of the wire. 4624 * No need to login to do login to find out or drop into 4625 * qla2x00_configure_local_loop(). 4626 */ 4627 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4628 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4629 } else { 4630 if (qla_tgt_mode_enabled(vha)) { 4631 /* allow the other side to start the login */ 4632 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4633 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4634 } 4635 } 4636 } else if (ha->current_topology == ISP_CFG_NL) { 4637 clear_bit(RSCN_UPDATE, &flags); 4638 set_bit(LOCAL_LOOP_UPDATE, &flags); 4639 } else if (!vha->flags.online || 4640 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4641 set_bit(RSCN_UPDATE, &flags); 4642 set_bit(LOCAL_LOOP_UPDATE, &flags); 4643 } 4644 4645 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4646 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4647 ql_dbg(ql_dbg_disc, vha, 0x2015, 4648 "Loop resync needed, failing.\n"); 4649 rval = QLA_FUNCTION_FAILED; 4650 } else 4651 rval = qla2x00_configure_local_loop(vha); 4652 } 4653 4654 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4655 if (LOOP_TRANSITION(vha)) { 4656 ql_dbg(ql_dbg_disc, vha, 0x2099, 4657 "Needs RSCN update and loop transition.\n"); 4658 rval = QLA_FUNCTION_FAILED; 4659 } 4660 else 4661 rval = qla2x00_configure_fabric(vha); 4662 } 4663 4664 if (rval == QLA_SUCCESS) { 4665 if (atomic_read(&vha->loop_down_timer) || 4666 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4667 rval = QLA_FUNCTION_FAILED; 4668 } else { 4669 atomic_set(&vha->loop_state, LOOP_READY); 4670 ql_dbg(ql_dbg_disc, vha, 0x2069, 4671 "LOOP READY.\n"); 4672 ha->flags.fw_init_done = 1; 4673 4674 /* 4675 * Process any ATIO queue entries that came in 4676 * while we weren't online. 4677 */ 4678 if (qla_tgt_mode_enabled(vha) || 4679 qla_dual_mode_enabled(vha)) { 4680 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) { 4681 spin_lock_irqsave(&ha->tgt.atio_lock, 4682 flags); 4683 qlt_24xx_process_atio_queue(vha, 0); 4684 spin_unlock_irqrestore( 4685 &ha->tgt.atio_lock, flags); 4686 } else { 4687 spin_lock_irqsave(&ha->hardware_lock, 4688 flags); 4689 qlt_24xx_process_atio_queue(vha, 1); 4690 spin_unlock_irqrestore( 4691 &ha->hardware_lock, flags); 4692 } 4693 } 4694 } 4695 } 4696 4697 if (rval) { 4698 ql_dbg(ql_dbg_disc, vha, 0x206a, 4699 "%s *** FAILED ***.\n", __func__); 4700 } else { 4701 ql_dbg(ql_dbg_disc, vha, 0x206b, 4702 "%s: exiting normally.\n", __func__); 4703 } 4704 4705 /* Restore state if a resync event occurred during processing */ 4706 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4707 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4708 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4709 if (test_bit(RSCN_UPDATE, &save_flags)) { 4710 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4711 } 4712 } 4713 4714 return (rval); 4715 } 4716 4717 /* 4718 * N2N Login 4719 * Updates Fibre Channel Device Database with local loop devices. 4720 * 4721 * Input: 4722 * ha = adapter block pointer. 4723 * 4724 * Returns: 4725 */ 4726 static int qla24xx_n2n_handle_login(struct scsi_qla_host *vha, 4727 fc_port_t *fcport) 4728 { 4729 struct qla_hw_data *ha = vha->hw; 4730 int res = QLA_SUCCESS, rval; 4731 int greater_wwpn = 0; 4732 int logged_in = 0; 4733 4734 if (ha->current_topology != ISP_CFG_N) 4735 return res; 4736 4737 if (wwn_to_u64(vha->port_name) > 4738 wwn_to_u64(vha->n2n_port_name)) { 4739 ql_dbg(ql_dbg_disc, vha, 0x2002, 4740 "HBA WWPN is greater %llx > target %llx\n", 4741 wwn_to_u64(vha->port_name), 4742 wwn_to_u64(vha->n2n_port_name)); 4743 greater_wwpn = 1; 4744 fcport->d_id.b24 = vha->n2n_id; 4745 } 4746 4747 fcport->loop_id = vha->loop_id; 4748 fcport->fc4f_nvme = 0; 4749 fcport->query = 1; 4750 4751 ql_dbg(ql_dbg_disc, vha, 0x4001, 4752 "Initiate N2N login handler: HBA port_id=%06x loopid=%d\n", 4753 fcport->d_id.b24, vha->loop_id); 4754 4755 /* Fill in member data. */ 4756 if (!greater_wwpn) { 4757 rval = qla2x00_get_port_database(vha, fcport, 0); 4758 ql_dbg(ql_dbg_disc, vha, 0x1051, 4759 "Remote login-state (%x/%x) port_id=%06x loop_id=%x, rval=%d\n", 4760 fcport->current_login_state, fcport->last_login_state, 4761 fcport->d_id.b24, fcport->loop_id, rval); 4762 4763 if (((fcport->current_login_state & 0xf) == 0x4) || 4764 ((fcport->current_login_state & 0xf) == 0x6)) 4765 logged_in = 1; 4766 } 4767 4768 if (logged_in || greater_wwpn) { 4769 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 4770 qla_nvme_register_hba(vha); 4771 4772 /* Set connected N_Port d_id */ 4773 if (vha->flags.nvme_enabled) 4774 fcport->fc4f_nvme = 1; 4775 4776 fcport->scan_state = QLA_FCPORT_FOUND; 4777 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4778 fcport->disc_state = DSC_GNL; 4779 fcport->n2n_flag = 1; 4780 fcport->flags = 3; 4781 vha->hw->flags.gpsc_supported = 0; 4782 4783 if (greater_wwpn) { 4784 ql_dbg(ql_dbg_disc, vha, 0x20e5, 4785 "%s %d PLOGI ELS %8phC\n", 4786 __func__, __LINE__, fcport->port_name); 4787 4788 res = qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI, 4789 fcport, fcport->d_id); 4790 } 4791 4792 if (res != QLA_SUCCESS) { 4793 ql_log(ql_log_info, vha, 0xd04d, 4794 "PLOGI Failed: portid=%06x - retrying\n", 4795 fcport->d_id.b24); 4796 res = QLA_SUCCESS; 4797 } else { 4798 /* State 0x6 means FCP PRLI complete */ 4799 if ((fcport->current_login_state & 0xf) == 0x6) { 4800 ql_dbg(ql_dbg_disc, vha, 0x2118, 4801 "%s %d %8phC post GPDB work\n", 4802 __func__, __LINE__, fcport->port_name); 4803 fcport->chip_reset = 4804 vha->hw->base_qpair->chip_reset; 4805 qla24xx_post_gpdb_work(vha, fcport, 0); 4806 } else { 4807 ql_dbg(ql_dbg_disc, vha, 0x2118, 4808 "%s %d %8phC post NVMe PRLI\n", 4809 __func__, __LINE__, fcport->port_name); 4810 qla24xx_post_prli_work(vha, fcport); 4811 } 4812 } 4813 } else { 4814 /* Wait for next database change */ 4815 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags); 4816 } 4817 4818 return res; 4819 } 4820 4821 /* 4822 * qla2x00_configure_local_loop 4823 * Updates Fibre Channel Device Database with local loop devices. 4824 * 4825 * Input: 4826 * ha = adapter block pointer. 4827 * 4828 * Returns: 4829 * 0 = success. 4830 */ 4831 static int 4832 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4833 { 4834 int rval, rval2; 4835 int found_devs; 4836 int found; 4837 fc_port_t *fcport, *new_fcport; 4838 4839 uint16_t index; 4840 uint16_t entries; 4841 char *id_iter; 4842 uint16_t loop_id; 4843 uint8_t domain, area, al_pa; 4844 struct qla_hw_data *ha = vha->hw; 4845 unsigned long flags; 4846 4847 found_devs = 0; 4848 new_fcport = NULL; 4849 entries = MAX_FIBRE_DEVICES_LOOP; 4850 4851 /* Get list of logged in devices. */ 4852 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4853 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4854 &entries); 4855 if (rval != QLA_SUCCESS) 4856 goto cleanup_allocation; 4857 4858 ql_dbg(ql_dbg_disc, vha, 0x2011, 4859 "Entries in ID list (%d).\n", entries); 4860 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 4861 (uint8_t *)ha->gid_list, 4862 entries * sizeof(struct gid_list_info)); 4863 4864 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4865 fcport->scan_state = QLA_FCPORT_SCAN; 4866 } 4867 4868 /* Allocate temporary fcport for any new fcports discovered. */ 4869 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4870 if (new_fcport == NULL) { 4871 ql_log(ql_log_warn, vha, 0x2012, 4872 "Memory allocation failed for fcport.\n"); 4873 rval = QLA_MEMORY_ALLOC_FAILED; 4874 goto cleanup_allocation; 4875 } 4876 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4877 4878 /* Inititae N2N login. */ 4879 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4880 rval = qla24xx_n2n_handle_login(vha, new_fcport); 4881 if (rval != QLA_SUCCESS) 4882 goto cleanup_allocation; 4883 return QLA_SUCCESS; 4884 } 4885 4886 /* Add devices to port list. */ 4887 id_iter = (char *)ha->gid_list; 4888 for (index = 0; index < entries; index++) { 4889 domain = ((struct gid_list_info *)id_iter)->domain; 4890 area = ((struct gid_list_info *)id_iter)->area; 4891 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 4892 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4893 loop_id = (uint16_t) 4894 ((struct gid_list_info *)id_iter)->loop_id_2100; 4895 else 4896 loop_id = le16_to_cpu( 4897 ((struct gid_list_info *)id_iter)->loop_id); 4898 id_iter += ha->gid_list_info_size; 4899 4900 /* Bypass reserved domain fields. */ 4901 if ((domain & 0xf0) == 0xf0) 4902 continue; 4903 4904 /* Bypass if not same domain and area of adapter. */ 4905 if (area && domain && 4906 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 4907 continue; 4908 4909 /* Bypass invalid local loop ID. */ 4910 if (loop_id > LAST_LOCAL_LOOP_ID) 4911 continue; 4912 4913 memset(new_fcport->port_name, 0, WWN_SIZE); 4914 4915 /* Fill in member data. */ 4916 new_fcport->d_id.b.domain = domain; 4917 new_fcport->d_id.b.area = area; 4918 new_fcport->d_id.b.al_pa = al_pa; 4919 new_fcport->loop_id = loop_id; 4920 new_fcport->scan_state = QLA_FCPORT_FOUND; 4921 4922 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 4923 if (rval2 != QLA_SUCCESS) { 4924 ql_dbg(ql_dbg_disc, vha, 0x2097, 4925 "Failed to retrieve fcport information " 4926 "-- get_port_database=%x, loop_id=0x%04x.\n", 4927 rval2, new_fcport->loop_id); 4928 /* Skip retry if N2N */ 4929 if (ha->current_topology != ISP_CFG_N) { 4930 ql_dbg(ql_dbg_disc, vha, 0x2105, 4931 "Scheduling resync.\n"); 4932 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4933 continue; 4934 } 4935 } 4936 4937 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4938 /* Check for matching device in port list. */ 4939 found = 0; 4940 fcport = NULL; 4941 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4942 if (memcmp(new_fcport->port_name, fcport->port_name, 4943 WWN_SIZE)) 4944 continue; 4945 4946 fcport->flags &= ~FCF_FABRIC_DEVICE; 4947 fcport->loop_id = new_fcport->loop_id; 4948 fcport->port_type = new_fcport->port_type; 4949 fcport->d_id.b24 = new_fcport->d_id.b24; 4950 memcpy(fcport->node_name, new_fcport->node_name, 4951 WWN_SIZE); 4952 fcport->scan_state = QLA_FCPORT_FOUND; 4953 found++; 4954 break; 4955 } 4956 4957 if (!found) { 4958 /* New device, add to fcports list. */ 4959 list_add_tail(&new_fcport->list, &vha->vp_fcports); 4960 4961 /* Allocate a new replacement fcport. */ 4962 fcport = new_fcport; 4963 4964 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4965 4966 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4967 4968 if (new_fcport == NULL) { 4969 ql_log(ql_log_warn, vha, 0xd031, 4970 "Failed to allocate memory for fcport.\n"); 4971 rval = QLA_MEMORY_ALLOC_FAILED; 4972 goto cleanup_allocation; 4973 } 4974 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4975 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4976 } 4977 4978 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4979 4980 /* Base iIDMA settings on HBA port speed. */ 4981 fcport->fp_speed = ha->link_data_rate; 4982 4983 found_devs++; 4984 } 4985 4986 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4987 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 4988 break; 4989 4990 if (fcport->scan_state == QLA_FCPORT_SCAN) { 4991 if ((qla_dual_mode_enabled(vha) || 4992 qla_ini_mode_enabled(vha)) && 4993 atomic_read(&fcport->state) == FCS_ONLINE) { 4994 qla2x00_mark_device_lost(vha, fcport, 4995 ql2xplogiabsentdevice, 0); 4996 if (fcport->loop_id != FC_NO_LOOP_ID && 4997 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 4998 fcport->port_type != FCT_INITIATOR && 4999 fcport->port_type != FCT_BROADCAST) { 5000 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5001 "%s %d %8phC post del sess\n", 5002 __func__, __LINE__, 5003 fcport->port_name); 5004 5005 qlt_schedule_sess_for_deletion(fcport); 5006 continue; 5007 } 5008 } 5009 } 5010 5011 if (fcport->scan_state == QLA_FCPORT_FOUND) 5012 qla24xx_fcport_handle_login(vha, fcport); 5013 } 5014 5015 cleanup_allocation: 5016 kfree(new_fcport); 5017 5018 if (rval != QLA_SUCCESS) { 5019 ql_dbg(ql_dbg_disc, vha, 0x2098, 5020 "Configure local loop error exit: rval=%x.\n", rval); 5021 } 5022 5023 return (rval); 5024 } 5025 5026 static void 5027 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5028 { 5029 int rval; 5030 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5031 struct qla_hw_data *ha = vha->hw; 5032 5033 if (!IS_IIDMA_CAPABLE(ha)) 5034 return; 5035 5036 if (atomic_read(&fcport->state) != FCS_ONLINE) 5037 return; 5038 5039 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5040 fcport->fp_speed > ha->link_data_rate) 5041 return; 5042 5043 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5044 mb); 5045 if (rval != QLA_SUCCESS) { 5046 ql_dbg(ql_dbg_disc, vha, 0x2004, 5047 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5048 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5049 } else { 5050 ql_dbg(ql_dbg_disc, vha, 0x2005, 5051 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5052 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5053 fcport->fp_speed, fcport->port_name); 5054 } 5055 } 5056 5057 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5058 static void 5059 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5060 { 5061 struct fc_rport_identifiers rport_ids; 5062 struct fc_rport *rport; 5063 unsigned long flags; 5064 5065 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5066 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5067 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5068 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5069 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5070 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5071 if (!rport) { 5072 ql_log(ql_log_warn, vha, 0x2006, 5073 "Unable to allocate fc remote port.\n"); 5074 return; 5075 } 5076 5077 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5078 *((fc_port_t **)rport->dd_data) = fcport; 5079 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5080 5081 rport->supported_classes = fcport->supported_classes; 5082 5083 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5084 if (fcport->port_type == FCT_INITIATOR) 5085 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5086 if (fcport->port_type == FCT_TARGET) 5087 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5088 5089 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5090 "%s %8phN. rport %p is %s mode\n", 5091 __func__, fcport->port_name, rport, 5092 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5093 5094 fc_remote_port_rolechg(rport, rport_ids.roles); 5095 } 5096 5097 /* 5098 * qla2x00_update_fcport 5099 * Updates device on list. 5100 * 5101 * Input: 5102 * ha = adapter block pointer. 5103 * fcport = port structure pointer. 5104 * 5105 * Return: 5106 * 0 - Success 5107 * BIT_0 - error 5108 * 5109 * Context: 5110 * Kernel context. 5111 */ 5112 void 5113 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5114 { 5115 fcport->vha = vha; 5116 5117 if (IS_SW_RESV_ADDR(fcport->d_id)) 5118 return; 5119 5120 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5121 __func__, fcport->port_name); 5122 5123 if (IS_QLAFX00(vha->hw)) { 5124 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5125 goto reg_port; 5126 } 5127 fcport->login_retry = 0; 5128 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5129 fcport->disc_state = DSC_LOGIN_COMPLETE; 5130 fcport->deleted = 0; 5131 fcport->logout_on_delete = 1; 5132 5133 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5134 qla2x00_iidma_fcport(vha, fcport); 5135 5136 if (fcport->fc4f_nvme) { 5137 qla_nvme_register_remote(vha, fcport); 5138 return; 5139 } 5140 5141 qla24xx_update_fcport_fcp_prio(vha, fcport); 5142 5143 reg_port: 5144 switch (vha->host->active_mode) { 5145 case MODE_INITIATOR: 5146 qla2x00_reg_remote_port(vha, fcport); 5147 break; 5148 case MODE_TARGET: 5149 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5150 !vha->vha_tgt.qla_tgt->tgt_stopped) 5151 qlt_fc_port_added(vha, fcport); 5152 break; 5153 case MODE_DUAL: 5154 qla2x00_reg_remote_port(vha, fcport); 5155 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5156 !vha->vha_tgt.qla_tgt->tgt_stopped) 5157 qlt_fc_port_added(vha, fcport); 5158 break; 5159 default: 5160 break; 5161 } 5162 } 5163 5164 /* 5165 * qla2x00_configure_fabric 5166 * Setup SNS devices with loop ID's. 5167 * 5168 * Input: 5169 * ha = adapter block pointer. 5170 * 5171 * Returns: 5172 * 0 = success. 5173 * BIT_0 = error 5174 */ 5175 static int 5176 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5177 { 5178 int rval; 5179 fc_port_t *fcport; 5180 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5181 uint16_t loop_id; 5182 LIST_HEAD(new_fcports); 5183 struct qla_hw_data *ha = vha->hw; 5184 int discovery_gen; 5185 5186 /* If FL port exists, then SNS is present */ 5187 if (IS_FWI2_CAPABLE(ha)) 5188 loop_id = NPH_F_PORT; 5189 else 5190 loop_id = SNS_FL_PORT; 5191 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5192 if (rval != QLA_SUCCESS) { 5193 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5194 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5195 5196 vha->device_flags &= ~SWITCH_FOUND; 5197 return (QLA_SUCCESS); 5198 } 5199 vha->device_flags |= SWITCH_FOUND; 5200 5201 5202 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5203 rval = qla2x00_send_change_request(vha, 0x3, 0); 5204 if (rval != QLA_SUCCESS) 5205 ql_log(ql_log_warn, vha, 0x121, 5206 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5207 rval); 5208 } 5209 5210 5211 do { 5212 qla2x00_mgmt_svr_login(vha); 5213 5214 /* FDMI support. */ 5215 if (ql2xfdmienable && 5216 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5217 qla2x00_fdmi_register(vha); 5218 5219 /* Ensure we are logged into the SNS. */ 5220 loop_id = NPH_SNS_LID(ha); 5221 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5222 0xfc, mb, BIT_1|BIT_0); 5223 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5224 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5225 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5226 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5227 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5228 return rval; 5229 } 5230 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5231 if (qla2x00_rft_id(vha)) { 5232 /* EMPTY */ 5233 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5234 "Register FC-4 TYPE failed.\n"); 5235 if (test_bit(LOOP_RESYNC_NEEDED, 5236 &vha->dpc_flags)) 5237 break; 5238 } 5239 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5240 /* EMPTY */ 5241 ql_dbg(ql_dbg_disc, vha, 0x209a, 5242 "Register FC-4 Features failed.\n"); 5243 if (test_bit(LOOP_RESYNC_NEEDED, 5244 &vha->dpc_flags)) 5245 break; 5246 } 5247 if (vha->flags.nvme_enabled) { 5248 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5249 ql_dbg(ql_dbg_disc, vha, 0x2049, 5250 "Register NVME FC Type Features failed.\n"); 5251 } 5252 } 5253 if (qla2x00_rnn_id(vha)) { 5254 /* EMPTY */ 5255 ql_dbg(ql_dbg_disc, vha, 0x2104, 5256 "Register Node Name failed.\n"); 5257 if (test_bit(LOOP_RESYNC_NEEDED, 5258 &vha->dpc_flags)) 5259 break; 5260 } else if (qla2x00_rsnn_nn(vha)) { 5261 /* EMPTY */ 5262 ql_dbg(ql_dbg_disc, vha, 0x209b, 5263 "Register Symbolic Node Name failed.\n"); 5264 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5265 break; 5266 } 5267 } 5268 5269 5270 /* Mark the time right before querying FW for connected ports. 5271 * This process is long, asynchronous and by the time it's done, 5272 * collected information might not be accurate anymore. E.g. 5273 * disconnected port might have re-connected and a brand new 5274 * session has been created. In this case session's generation 5275 * will be newer than discovery_gen. */ 5276 qlt_do_generation_tick(vha, &discovery_gen); 5277 5278 if (USE_ASYNC_SCAN(ha)) { 5279 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5280 NULL); 5281 if (rval) 5282 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5283 } else { 5284 list_for_each_entry(fcport, &vha->vp_fcports, list) 5285 fcport->scan_state = QLA_FCPORT_SCAN; 5286 5287 rval = qla2x00_find_all_fabric_devs(vha); 5288 } 5289 if (rval != QLA_SUCCESS) 5290 break; 5291 } while (0); 5292 5293 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5294 qla_nvme_register_hba(vha); 5295 5296 if (rval) 5297 ql_dbg(ql_dbg_disc, vha, 0x2068, 5298 "Configure fabric error exit rval=%d.\n", rval); 5299 5300 return (rval); 5301 } 5302 5303 /* 5304 * qla2x00_find_all_fabric_devs 5305 * 5306 * Input: 5307 * ha = adapter block pointer. 5308 * dev = database device entry pointer. 5309 * 5310 * Returns: 5311 * 0 = success. 5312 * 5313 * Context: 5314 * Kernel context. 5315 */ 5316 static int 5317 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5318 { 5319 int rval; 5320 uint16_t loop_id; 5321 fc_port_t *fcport, *new_fcport; 5322 int found; 5323 5324 sw_info_t *swl; 5325 int swl_idx; 5326 int first_dev, last_dev; 5327 port_id_t wrap = {}, nxt_d_id; 5328 struct qla_hw_data *ha = vha->hw; 5329 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5330 unsigned long flags; 5331 5332 rval = QLA_SUCCESS; 5333 5334 /* Try GID_PT to get device list, else GAN. */ 5335 if (!ha->swl) 5336 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5337 GFP_KERNEL); 5338 swl = ha->swl; 5339 if (!swl) { 5340 /*EMPTY*/ 5341 ql_dbg(ql_dbg_disc, vha, 0x209c, 5342 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5343 } else { 5344 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5345 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5346 swl = NULL; 5347 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5348 return rval; 5349 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5350 swl = NULL; 5351 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5352 return rval; 5353 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5354 swl = NULL; 5355 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5356 return rval; 5357 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5358 swl = NULL; 5359 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5360 return rval; 5361 } 5362 5363 /* If other queries succeeded probe for FC-4 type */ 5364 if (swl) { 5365 qla2x00_gff_id(vha, swl); 5366 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5367 return rval; 5368 } 5369 } 5370 swl_idx = 0; 5371 5372 /* Allocate temporary fcport for any new fcports discovered. */ 5373 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5374 if (new_fcport == NULL) { 5375 ql_log(ql_log_warn, vha, 0x209d, 5376 "Failed to allocate memory for fcport.\n"); 5377 return (QLA_MEMORY_ALLOC_FAILED); 5378 } 5379 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5380 /* Set start port ID scan at adapter ID. */ 5381 first_dev = 1; 5382 last_dev = 0; 5383 5384 /* Starting free loop ID. */ 5385 loop_id = ha->min_external_loopid; 5386 for (; loop_id <= ha->max_loop_id; loop_id++) { 5387 if (qla2x00_is_reserved_id(vha, loop_id)) 5388 continue; 5389 5390 if (ha->current_topology == ISP_CFG_FL && 5391 (atomic_read(&vha->loop_down_timer) || 5392 LOOP_TRANSITION(vha))) { 5393 atomic_set(&vha->loop_down_timer, 0); 5394 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5395 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5396 break; 5397 } 5398 5399 if (swl != NULL) { 5400 if (last_dev) { 5401 wrap.b24 = new_fcport->d_id.b24; 5402 } else { 5403 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5404 memcpy(new_fcport->node_name, 5405 swl[swl_idx].node_name, WWN_SIZE); 5406 memcpy(new_fcport->port_name, 5407 swl[swl_idx].port_name, WWN_SIZE); 5408 memcpy(new_fcport->fabric_port_name, 5409 swl[swl_idx].fabric_port_name, WWN_SIZE); 5410 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5411 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5412 5413 new_fcport->nvme_flag = 0; 5414 new_fcport->fc4f_nvme = 0; 5415 if (vha->flags.nvme_enabled && 5416 swl[swl_idx].fc4f_nvme) { 5417 new_fcport->fc4f_nvme = 5418 swl[swl_idx].fc4f_nvme; 5419 ql_log(ql_log_info, vha, 0x2131, 5420 "FOUND: NVME port %8phC as FC Type 28h\n", 5421 new_fcport->port_name); 5422 } 5423 5424 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5425 last_dev = 1; 5426 } 5427 swl_idx++; 5428 } 5429 } else { 5430 /* Send GA_NXT to the switch */ 5431 rval = qla2x00_ga_nxt(vha, new_fcport); 5432 if (rval != QLA_SUCCESS) { 5433 ql_log(ql_log_warn, vha, 0x209e, 5434 "SNS scan failed -- assuming " 5435 "zero-entry result.\n"); 5436 rval = QLA_SUCCESS; 5437 break; 5438 } 5439 } 5440 5441 /* If wrap on switch device list, exit. */ 5442 if (first_dev) { 5443 wrap.b24 = new_fcport->d_id.b24; 5444 first_dev = 0; 5445 } else if (new_fcport->d_id.b24 == wrap.b24) { 5446 ql_dbg(ql_dbg_disc, vha, 0x209f, 5447 "Device wrap (%02x%02x%02x).\n", 5448 new_fcport->d_id.b.domain, 5449 new_fcport->d_id.b.area, 5450 new_fcport->d_id.b.al_pa); 5451 break; 5452 } 5453 5454 /* Bypass if same physical adapter. */ 5455 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5456 continue; 5457 5458 /* Bypass virtual ports of the same host. */ 5459 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5460 continue; 5461 5462 /* Bypass if same domain and area of adapter. */ 5463 if (((new_fcport->d_id.b24 & 0xffff00) == 5464 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5465 ISP_CFG_FL) 5466 continue; 5467 5468 /* Bypass reserved domain fields. */ 5469 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5470 continue; 5471 5472 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5473 if (ql2xgffidenable && 5474 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5475 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5476 continue; 5477 5478 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5479 5480 /* Locate matching device in database. */ 5481 found = 0; 5482 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5483 if (memcmp(new_fcport->port_name, fcport->port_name, 5484 WWN_SIZE)) 5485 continue; 5486 5487 fcport->scan_state = QLA_FCPORT_FOUND; 5488 5489 found++; 5490 5491 /* Update port state. */ 5492 memcpy(fcport->fabric_port_name, 5493 new_fcport->fabric_port_name, WWN_SIZE); 5494 fcport->fp_speed = new_fcport->fp_speed; 5495 5496 /* 5497 * If address the same and state FCS_ONLINE 5498 * (or in target mode), nothing changed. 5499 */ 5500 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5501 (atomic_read(&fcport->state) == FCS_ONLINE || 5502 (vha->host->active_mode == MODE_TARGET))) { 5503 break; 5504 } 5505 5506 /* 5507 * If device was not a fabric device before. 5508 */ 5509 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5510 fcport->d_id.b24 = new_fcport->d_id.b24; 5511 qla2x00_clear_loop_id(fcport); 5512 fcport->flags |= (FCF_FABRIC_DEVICE | 5513 FCF_LOGIN_NEEDED); 5514 break; 5515 } 5516 5517 /* 5518 * Port ID changed or device was marked to be updated; 5519 * Log it out if still logged in and mark it for 5520 * relogin later. 5521 */ 5522 if (qla_tgt_mode_enabled(base_vha)) { 5523 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5524 "port changed FC ID, %8phC" 5525 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5526 fcport->port_name, 5527 fcport->d_id.b.domain, 5528 fcport->d_id.b.area, 5529 fcport->d_id.b.al_pa, 5530 fcport->loop_id, 5531 new_fcport->d_id.b.domain, 5532 new_fcport->d_id.b.area, 5533 new_fcport->d_id.b.al_pa); 5534 fcport->d_id.b24 = new_fcport->d_id.b24; 5535 break; 5536 } 5537 5538 fcport->d_id.b24 = new_fcport->d_id.b24; 5539 fcport->flags |= FCF_LOGIN_NEEDED; 5540 break; 5541 } 5542 5543 if (fcport->fc4f_nvme) { 5544 if (fcport->disc_state == DSC_DELETE_PEND) { 5545 fcport->disc_state = DSC_GNL; 5546 vha->fcport_count--; 5547 fcport->login_succ = 0; 5548 } 5549 } 5550 5551 if (found) { 5552 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5553 continue; 5554 } 5555 /* If device was not in our fcports list, then add it. */ 5556 new_fcport->scan_state = QLA_FCPORT_FOUND; 5557 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5558 5559 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5560 5561 5562 /* Allocate a new replacement fcport. */ 5563 nxt_d_id.b24 = new_fcport->d_id.b24; 5564 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5565 if (new_fcport == NULL) { 5566 ql_log(ql_log_warn, vha, 0xd032, 5567 "Memory allocation failed for fcport.\n"); 5568 return (QLA_MEMORY_ALLOC_FAILED); 5569 } 5570 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5571 new_fcport->d_id.b24 = nxt_d_id.b24; 5572 } 5573 5574 qla2x00_free_fcport(new_fcport); 5575 5576 /* 5577 * Logout all previous fabric dev marked lost, except FCP2 devices. 5578 */ 5579 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5580 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5581 break; 5582 5583 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5584 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5585 continue; 5586 5587 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5588 if ((qla_dual_mode_enabled(vha) || 5589 qla_ini_mode_enabled(vha)) && 5590 atomic_read(&fcport->state) == FCS_ONLINE) { 5591 qla2x00_mark_device_lost(vha, fcport, 5592 ql2xplogiabsentdevice, 0); 5593 if (fcport->loop_id != FC_NO_LOOP_ID && 5594 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5595 fcport->port_type != FCT_INITIATOR && 5596 fcport->port_type != FCT_BROADCAST) { 5597 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5598 "%s %d %8phC post del sess\n", 5599 __func__, __LINE__, 5600 fcport->port_name); 5601 qlt_schedule_sess_for_deletion(fcport); 5602 continue; 5603 } 5604 } 5605 } 5606 5607 if (fcport->scan_state == QLA_FCPORT_FOUND) 5608 qla24xx_fcport_handle_login(vha, fcport); 5609 } 5610 return (rval); 5611 } 5612 5613 /* 5614 * qla2x00_find_new_loop_id 5615 * Scan through our port list and find a new usable loop ID. 5616 * 5617 * Input: 5618 * ha: adapter state pointer. 5619 * dev: port structure pointer. 5620 * 5621 * Returns: 5622 * qla2x00 local function return status code. 5623 * 5624 * Context: 5625 * Kernel context. 5626 */ 5627 int 5628 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5629 { 5630 int rval; 5631 struct qla_hw_data *ha = vha->hw; 5632 unsigned long flags = 0; 5633 5634 rval = QLA_SUCCESS; 5635 5636 spin_lock_irqsave(&ha->vport_slock, flags); 5637 5638 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5639 LOOPID_MAP_SIZE); 5640 if (dev->loop_id >= LOOPID_MAP_SIZE || 5641 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5642 dev->loop_id = FC_NO_LOOP_ID; 5643 rval = QLA_FUNCTION_FAILED; 5644 } else 5645 set_bit(dev->loop_id, ha->loop_id_map); 5646 5647 spin_unlock_irqrestore(&ha->vport_slock, flags); 5648 5649 if (rval == QLA_SUCCESS) 5650 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5651 "Assigning new loopid=%x, portid=%x.\n", 5652 dev->loop_id, dev->d_id.b24); 5653 else 5654 ql_log(ql_log_warn, dev->vha, 0x2087, 5655 "No loop_id's available, portid=%x.\n", 5656 dev->d_id.b24); 5657 5658 return (rval); 5659 } 5660 5661 5662 /* 5663 * qla2x00_fabric_login 5664 * Issue fabric login command. 5665 * 5666 * Input: 5667 * ha = adapter block pointer. 5668 * device = pointer to FC device type structure. 5669 * 5670 * Returns: 5671 * 0 - Login successfully 5672 * 1 - Login failed 5673 * 2 - Initiator device 5674 * 3 - Fatal error 5675 */ 5676 int 5677 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5678 uint16_t *next_loopid) 5679 { 5680 int rval; 5681 int retry; 5682 uint16_t tmp_loopid; 5683 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5684 struct qla_hw_data *ha = vha->hw; 5685 5686 retry = 0; 5687 tmp_loopid = 0; 5688 5689 for (;;) { 5690 ql_dbg(ql_dbg_disc, vha, 0x2000, 5691 "Trying Fabric Login w/loop id 0x%04x for port " 5692 "%02x%02x%02x.\n", 5693 fcport->loop_id, fcport->d_id.b.domain, 5694 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5695 5696 /* Login fcport on switch. */ 5697 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5698 fcport->d_id.b.domain, fcport->d_id.b.area, 5699 fcport->d_id.b.al_pa, mb, BIT_0); 5700 if (rval != QLA_SUCCESS) { 5701 return rval; 5702 } 5703 if (mb[0] == MBS_PORT_ID_USED) { 5704 /* 5705 * Device has another loop ID. The firmware team 5706 * recommends the driver perform an implicit login with 5707 * the specified ID again. The ID we just used is save 5708 * here so we return with an ID that can be tried by 5709 * the next login. 5710 */ 5711 retry++; 5712 tmp_loopid = fcport->loop_id; 5713 fcport->loop_id = mb[1]; 5714 5715 ql_dbg(ql_dbg_disc, vha, 0x2001, 5716 "Fabric Login: port in use - next loop " 5717 "id=0x%04x, port id= %02x%02x%02x.\n", 5718 fcport->loop_id, fcport->d_id.b.domain, 5719 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5720 5721 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5722 /* 5723 * Login succeeded. 5724 */ 5725 if (retry) { 5726 /* A retry occurred before. */ 5727 *next_loopid = tmp_loopid; 5728 } else { 5729 /* 5730 * No retry occurred before. Just increment the 5731 * ID value for next login. 5732 */ 5733 *next_loopid = (fcport->loop_id + 1); 5734 } 5735 5736 if (mb[1] & BIT_0) { 5737 fcport->port_type = FCT_INITIATOR; 5738 } else { 5739 fcport->port_type = FCT_TARGET; 5740 if (mb[1] & BIT_1) { 5741 fcport->flags |= FCF_FCP2_DEVICE; 5742 } 5743 } 5744 5745 if (mb[10] & BIT_0) 5746 fcport->supported_classes |= FC_COS_CLASS2; 5747 if (mb[10] & BIT_1) 5748 fcport->supported_classes |= FC_COS_CLASS3; 5749 5750 if (IS_FWI2_CAPABLE(ha)) { 5751 if (mb[10] & BIT_7) 5752 fcport->flags |= 5753 FCF_CONF_COMP_SUPPORTED; 5754 } 5755 5756 rval = QLA_SUCCESS; 5757 break; 5758 } else if (mb[0] == MBS_LOOP_ID_USED) { 5759 /* 5760 * Loop ID already used, try next loop ID. 5761 */ 5762 fcport->loop_id++; 5763 rval = qla2x00_find_new_loop_id(vha, fcport); 5764 if (rval != QLA_SUCCESS) { 5765 /* Ran out of loop IDs to use */ 5766 break; 5767 } 5768 } else if (mb[0] == MBS_COMMAND_ERROR) { 5769 /* 5770 * Firmware possibly timed out during login. If NO 5771 * retries are left to do then the device is declared 5772 * dead. 5773 */ 5774 *next_loopid = fcport->loop_id; 5775 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5776 fcport->d_id.b.domain, fcport->d_id.b.area, 5777 fcport->d_id.b.al_pa); 5778 qla2x00_mark_device_lost(vha, fcport, 1, 0); 5779 5780 rval = 1; 5781 break; 5782 } else { 5783 /* 5784 * unrecoverable / not handled error 5785 */ 5786 ql_dbg(ql_dbg_disc, vha, 0x2002, 5787 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 5788 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 5789 fcport->d_id.b.area, fcport->d_id.b.al_pa, 5790 fcport->loop_id, jiffies); 5791 5792 *next_loopid = fcport->loop_id; 5793 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5794 fcport->d_id.b.domain, fcport->d_id.b.area, 5795 fcport->d_id.b.al_pa); 5796 qla2x00_clear_loop_id(fcport); 5797 fcport->login_retry = 0; 5798 5799 rval = 3; 5800 break; 5801 } 5802 } 5803 5804 return (rval); 5805 } 5806 5807 /* 5808 * qla2x00_local_device_login 5809 * Issue local device login command. 5810 * 5811 * Input: 5812 * ha = adapter block pointer. 5813 * loop_id = loop id of device to login to. 5814 * 5815 * Returns (Where's the #define!!!!): 5816 * 0 - Login successfully 5817 * 1 - Login failed 5818 * 3 - Fatal error 5819 */ 5820 int 5821 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 5822 { 5823 int rval; 5824 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5825 5826 memset(mb, 0, sizeof(mb)); 5827 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 5828 if (rval == QLA_SUCCESS) { 5829 /* Interrogate mailbox registers for any errors */ 5830 if (mb[0] == MBS_COMMAND_ERROR) 5831 rval = 1; 5832 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 5833 /* device not in PCB table */ 5834 rval = 3; 5835 } 5836 5837 return (rval); 5838 } 5839 5840 /* 5841 * qla2x00_loop_resync 5842 * Resync with fibre channel devices. 5843 * 5844 * Input: 5845 * ha = adapter block pointer. 5846 * 5847 * Returns: 5848 * 0 = success 5849 */ 5850 int 5851 qla2x00_loop_resync(scsi_qla_host_t *vha) 5852 { 5853 int rval = QLA_SUCCESS; 5854 uint32_t wait_time; 5855 struct req_que *req; 5856 struct rsp_que *rsp; 5857 5858 req = vha->req; 5859 rsp = req->rsp; 5860 5861 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5862 if (vha->flags.online) { 5863 if (!(rval = qla2x00_fw_ready(vha))) { 5864 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5865 wait_time = 256; 5866 do { 5867 if (!IS_QLAFX00(vha->hw)) { 5868 /* 5869 * Issue a marker after FW becomes 5870 * ready. 5871 */ 5872 qla2x00_marker(vha, req, rsp, 0, 0, 5873 MK_SYNC_ALL); 5874 vha->marker_needed = 0; 5875 } 5876 5877 /* Remap devices on Loop. */ 5878 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5879 5880 if (IS_QLAFX00(vha->hw)) 5881 qlafx00_configure_devices(vha); 5882 else 5883 qla2x00_configure_loop(vha); 5884 5885 wait_time--; 5886 } while (!atomic_read(&vha->loop_down_timer) && 5887 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5888 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 5889 &vha->dpc_flags))); 5890 } 5891 } 5892 5893 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5894 return (QLA_FUNCTION_FAILED); 5895 5896 if (rval) 5897 ql_dbg(ql_dbg_disc, vha, 0x206c, 5898 "%s *** FAILED ***.\n", __func__); 5899 5900 return (rval); 5901 } 5902 5903 /* 5904 * qla2x00_perform_loop_resync 5905 * Description: This function will set the appropriate flags and call 5906 * qla2x00_loop_resync. If successful loop will be resynced 5907 * Arguments : scsi_qla_host_t pointer 5908 * returm : Success or Failure 5909 */ 5910 5911 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 5912 { 5913 int32_t rval = 0; 5914 5915 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 5916 /*Configure the flags so that resync happens properly*/ 5917 atomic_set(&ha->loop_down_timer, 0); 5918 if (!(ha->device_flags & DFLG_NO_CABLE)) { 5919 atomic_set(&ha->loop_state, LOOP_UP); 5920 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 5921 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 5922 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 5923 5924 rval = qla2x00_loop_resync(ha); 5925 } else 5926 atomic_set(&ha->loop_state, LOOP_DEAD); 5927 5928 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 5929 } 5930 5931 return rval; 5932 } 5933 5934 void 5935 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 5936 { 5937 fc_port_t *fcport; 5938 struct scsi_qla_host *vha; 5939 struct qla_hw_data *ha = base_vha->hw; 5940 unsigned long flags; 5941 5942 spin_lock_irqsave(&ha->vport_slock, flags); 5943 /* Go with deferred removal of rport references. */ 5944 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 5945 atomic_inc(&vha->vref_count); 5946 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5947 if (fcport->drport && 5948 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 5949 spin_unlock_irqrestore(&ha->vport_slock, flags); 5950 qla2x00_rport_del(fcport); 5951 5952 spin_lock_irqsave(&ha->vport_slock, flags); 5953 } 5954 } 5955 atomic_dec(&vha->vref_count); 5956 wake_up(&vha->vref_waitq); 5957 } 5958 spin_unlock_irqrestore(&ha->vport_slock, flags); 5959 } 5960 5961 /* Assumes idc_lock always held on entry */ 5962 void 5963 qla83xx_reset_ownership(scsi_qla_host_t *vha) 5964 { 5965 struct qla_hw_data *ha = vha->hw; 5966 uint32_t drv_presence, drv_presence_mask; 5967 uint32_t dev_part_info1, dev_part_info2, class_type; 5968 uint32_t class_type_mask = 0x3; 5969 uint16_t fcoe_other_function = 0xffff, i; 5970 5971 if (IS_QLA8044(ha)) { 5972 drv_presence = qla8044_rd_direct(vha, 5973 QLA8044_CRB_DRV_ACTIVE_INDEX); 5974 dev_part_info1 = qla8044_rd_direct(vha, 5975 QLA8044_CRB_DEV_PART_INFO_INDEX); 5976 dev_part_info2 = qla8044_rd_direct(vha, 5977 QLA8044_CRB_DEV_PART_INFO2); 5978 } else { 5979 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 5980 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 5981 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 5982 } 5983 for (i = 0; i < 8; i++) { 5984 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 5985 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5986 (i != ha->portnum)) { 5987 fcoe_other_function = i; 5988 break; 5989 } 5990 } 5991 if (fcoe_other_function == 0xffff) { 5992 for (i = 0; i < 8; i++) { 5993 class_type = ((dev_part_info2 >> (i * 4)) & 5994 class_type_mask); 5995 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5996 ((i + 8) != ha->portnum)) { 5997 fcoe_other_function = i + 8; 5998 break; 5999 } 6000 } 6001 } 6002 /* 6003 * Prepare drv-presence mask based on fcoe functions present. 6004 * However consider only valid physical fcoe function numbers (0-15). 6005 */ 6006 drv_presence_mask = ~((1 << (ha->portnum)) | 6007 ((fcoe_other_function == 0xffff) ? 6008 0 : (1 << (fcoe_other_function)))); 6009 6010 /* We are the reset owner iff: 6011 * - No other protocol drivers present. 6012 * - This is the lowest among fcoe functions. */ 6013 if (!(drv_presence & drv_presence_mask) && 6014 (ha->portnum < fcoe_other_function)) { 6015 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6016 "This host is Reset owner.\n"); 6017 ha->flags.nic_core_reset_owner = 1; 6018 } 6019 } 6020 6021 static int 6022 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6023 { 6024 int rval = QLA_SUCCESS; 6025 struct qla_hw_data *ha = vha->hw; 6026 uint32_t drv_ack; 6027 6028 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6029 if (rval == QLA_SUCCESS) { 6030 drv_ack |= (1 << ha->portnum); 6031 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6032 } 6033 6034 return rval; 6035 } 6036 6037 static int 6038 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6039 { 6040 int rval = QLA_SUCCESS; 6041 struct qla_hw_data *ha = vha->hw; 6042 uint32_t drv_ack; 6043 6044 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6045 if (rval == QLA_SUCCESS) { 6046 drv_ack &= ~(1 << ha->portnum); 6047 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6048 } 6049 6050 return rval; 6051 } 6052 6053 static const char * 6054 qla83xx_dev_state_to_string(uint32_t dev_state) 6055 { 6056 switch (dev_state) { 6057 case QLA8XXX_DEV_COLD: 6058 return "COLD/RE-INIT"; 6059 case QLA8XXX_DEV_INITIALIZING: 6060 return "INITIALIZING"; 6061 case QLA8XXX_DEV_READY: 6062 return "READY"; 6063 case QLA8XXX_DEV_NEED_RESET: 6064 return "NEED RESET"; 6065 case QLA8XXX_DEV_NEED_QUIESCENT: 6066 return "NEED QUIESCENT"; 6067 case QLA8XXX_DEV_FAILED: 6068 return "FAILED"; 6069 case QLA8XXX_DEV_QUIESCENT: 6070 return "QUIESCENT"; 6071 default: 6072 return "Unknown"; 6073 } 6074 } 6075 6076 /* Assumes idc-lock always held on entry */ 6077 void 6078 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6079 { 6080 struct qla_hw_data *ha = vha->hw; 6081 uint32_t idc_audit_reg = 0, duration_secs = 0; 6082 6083 switch (audit_type) { 6084 case IDC_AUDIT_TIMESTAMP: 6085 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6086 idc_audit_reg = (ha->portnum) | 6087 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6088 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6089 break; 6090 6091 case IDC_AUDIT_COMPLETION: 6092 duration_secs = ((jiffies_to_msecs(jiffies) - 6093 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6094 idc_audit_reg = (ha->portnum) | 6095 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6096 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6097 break; 6098 6099 default: 6100 ql_log(ql_log_warn, vha, 0xb078, 6101 "Invalid audit type specified.\n"); 6102 break; 6103 } 6104 } 6105 6106 /* Assumes idc_lock always held on entry */ 6107 static int 6108 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6109 { 6110 struct qla_hw_data *ha = vha->hw; 6111 uint32_t idc_control, dev_state; 6112 6113 __qla83xx_get_idc_control(vha, &idc_control); 6114 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6115 ql_log(ql_log_info, vha, 0xb080, 6116 "NIC Core reset has been disabled. idc-control=0x%x\n", 6117 idc_control); 6118 return QLA_FUNCTION_FAILED; 6119 } 6120 6121 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6122 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6123 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6124 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6125 QLA8XXX_DEV_NEED_RESET); 6126 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6127 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6128 } else { 6129 const char *state = qla83xx_dev_state_to_string(dev_state); 6130 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6131 6132 /* SV: XXX: Is timeout required here? */ 6133 /* Wait for IDC state change READY -> NEED_RESET */ 6134 while (dev_state == QLA8XXX_DEV_READY) { 6135 qla83xx_idc_unlock(vha, 0); 6136 msleep(200); 6137 qla83xx_idc_lock(vha, 0); 6138 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6139 } 6140 } 6141 6142 /* Send IDC ack by writing to drv-ack register */ 6143 __qla83xx_set_drv_ack(vha); 6144 6145 return QLA_SUCCESS; 6146 } 6147 6148 int 6149 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6150 { 6151 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6152 } 6153 6154 int 6155 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6156 { 6157 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6158 } 6159 6160 static int 6161 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6162 { 6163 uint32_t drv_presence = 0; 6164 struct qla_hw_data *ha = vha->hw; 6165 6166 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6167 if (drv_presence & (1 << ha->portnum)) 6168 return QLA_SUCCESS; 6169 else 6170 return QLA_TEST_FAILED; 6171 } 6172 6173 int 6174 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6175 { 6176 int rval = QLA_SUCCESS; 6177 struct qla_hw_data *ha = vha->hw; 6178 6179 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6180 "Entered %s().\n", __func__); 6181 6182 if (vha->device_flags & DFLG_DEV_FAILED) { 6183 ql_log(ql_log_warn, vha, 0xb059, 6184 "Device in unrecoverable FAILED state.\n"); 6185 return QLA_FUNCTION_FAILED; 6186 } 6187 6188 qla83xx_idc_lock(vha, 0); 6189 6190 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6191 ql_log(ql_log_warn, vha, 0xb05a, 6192 "Function=0x%x has been removed from IDC participation.\n", 6193 ha->portnum); 6194 rval = QLA_FUNCTION_FAILED; 6195 goto exit; 6196 } 6197 6198 qla83xx_reset_ownership(vha); 6199 6200 rval = qla83xx_initiating_reset(vha); 6201 6202 /* 6203 * Perform reset if we are the reset-owner, 6204 * else wait till IDC state changes to READY/FAILED. 6205 */ 6206 if (rval == QLA_SUCCESS) { 6207 rval = qla83xx_idc_state_handler(vha); 6208 6209 if (rval == QLA_SUCCESS) 6210 ha->flags.nic_core_hung = 0; 6211 __qla83xx_clear_drv_ack(vha); 6212 } 6213 6214 exit: 6215 qla83xx_idc_unlock(vha, 0); 6216 6217 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6218 6219 return rval; 6220 } 6221 6222 int 6223 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6224 { 6225 struct qla_hw_data *ha = vha->hw; 6226 int rval = QLA_FUNCTION_FAILED; 6227 6228 if (!IS_MCTP_CAPABLE(ha)) { 6229 /* This message can be removed from the final version */ 6230 ql_log(ql_log_info, vha, 0x506d, 6231 "This board is not MCTP capable\n"); 6232 return rval; 6233 } 6234 6235 if (!ha->mctp_dump) { 6236 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6237 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6238 6239 if (!ha->mctp_dump) { 6240 ql_log(ql_log_warn, vha, 0x506e, 6241 "Failed to allocate memory for mctp dump\n"); 6242 return rval; 6243 } 6244 } 6245 6246 #define MCTP_DUMP_STR_ADDR 0x00000000 6247 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6248 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6249 if (rval != QLA_SUCCESS) { 6250 ql_log(ql_log_warn, vha, 0x506f, 6251 "Failed to capture mctp dump\n"); 6252 } else { 6253 ql_log(ql_log_info, vha, 0x5070, 6254 "Mctp dump capture for host (%ld/%p).\n", 6255 vha->host_no, ha->mctp_dump); 6256 ha->mctp_dumped = 1; 6257 } 6258 6259 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6260 ha->flags.nic_core_reset_hdlr_active = 1; 6261 rval = qla83xx_restart_nic_firmware(vha); 6262 if (rval) 6263 /* NIC Core reset failed. */ 6264 ql_log(ql_log_warn, vha, 0x5071, 6265 "Failed to restart nic firmware\n"); 6266 else 6267 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6268 "Restarted NIC firmware successfully.\n"); 6269 ha->flags.nic_core_reset_hdlr_active = 0; 6270 } 6271 6272 return rval; 6273 6274 } 6275 6276 /* 6277 * qla2x00_quiesce_io 6278 * Description: This function will block the new I/Os 6279 * Its not aborting any I/Os as context 6280 * is not destroyed during quiescence 6281 * Arguments: scsi_qla_host_t 6282 * return : void 6283 */ 6284 void 6285 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6286 { 6287 struct qla_hw_data *ha = vha->hw; 6288 struct scsi_qla_host *vp; 6289 6290 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6291 "Quiescing I/O - ha=%p.\n", ha); 6292 6293 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6294 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6295 atomic_set(&vha->loop_state, LOOP_DOWN); 6296 qla2x00_mark_all_devices_lost(vha, 0); 6297 list_for_each_entry(vp, &ha->vp_list, list) 6298 qla2x00_mark_all_devices_lost(vp, 0); 6299 } else { 6300 if (!atomic_read(&vha->loop_down_timer)) 6301 atomic_set(&vha->loop_down_timer, 6302 LOOP_DOWN_TIME); 6303 } 6304 /* Wait for pending cmds to complete */ 6305 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6306 } 6307 6308 void 6309 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6310 { 6311 struct qla_hw_data *ha = vha->hw; 6312 struct scsi_qla_host *vp; 6313 unsigned long flags; 6314 fc_port_t *fcport; 6315 u16 i; 6316 6317 /* For ISP82XX, driver waits for completion of the commands. 6318 * online flag should be set. 6319 */ 6320 if (!(IS_P3P_TYPE(ha))) 6321 vha->flags.online = 0; 6322 ha->flags.chip_reset_done = 0; 6323 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6324 vha->qla_stats.total_isp_aborts++; 6325 6326 ql_log(ql_log_info, vha, 0x00af, 6327 "Performing ISP error recovery - ha=%p.\n", ha); 6328 6329 /* For ISP82XX, reset_chip is just disabling interrupts. 6330 * Driver waits for the completion of the commands. 6331 * the interrupts need to be enabled. 6332 */ 6333 if (!(IS_P3P_TYPE(ha))) 6334 ha->isp_ops->reset_chip(vha); 6335 6336 SAVE_TOPO(ha); 6337 ha->flags.rida_fmt2 = 0; 6338 ha->flags.n2n_ae = 0; 6339 ha->flags.lip_ae = 0; 6340 ha->current_topology = 0; 6341 ha->flags.fw_started = 0; 6342 ha->flags.fw_init_done = 0; 6343 ha->base_qpair->chip_reset++; 6344 for (i = 0; i < ha->max_qpairs; i++) { 6345 if (ha->queue_pair_map[i]) 6346 ha->queue_pair_map[i]->chip_reset = 6347 ha->base_qpair->chip_reset; 6348 } 6349 6350 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6351 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6352 atomic_set(&vha->loop_state, LOOP_DOWN); 6353 qla2x00_mark_all_devices_lost(vha, 0); 6354 6355 spin_lock_irqsave(&ha->vport_slock, flags); 6356 list_for_each_entry(vp, &ha->vp_list, list) { 6357 atomic_inc(&vp->vref_count); 6358 spin_unlock_irqrestore(&ha->vport_slock, flags); 6359 6360 qla2x00_mark_all_devices_lost(vp, 0); 6361 6362 spin_lock_irqsave(&ha->vport_slock, flags); 6363 atomic_dec(&vp->vref_count); 6364 } 6365 spin_unlock_irqrestore(&ha->vport_slock, flags); 6366 } else { 6367 if (!atomic_read(&vha->loop_down_timer)) 6368 atomic_set(&vha->loop_down_timer, 6369 LOOP_DOWN_TIME); 6370 } 6371 6372 /* Clear all async request states across all VPs. */ 6373 list_for_each_entry(fcport, &vha->vp_fcports, list) 6374 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6375 spin_lock_irqsave(&ha->vport_slock, flags); 6376 list_for_each_entry(vp, &ha->vp_list, list) { 6377 atomic_inc(&vp->vref_count); 6378 spin_unlock_irqrestore(&ha->vport_slock, flags); 6379 6380 list_for_each_entry(fcport, &vp->vp_fcports, list) 6381 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6382 6383 spin_lock_irqsave(&ha->vport_slock, flags); 6384 atomic_dec(&vp->vref_count); 6385 } 6386 spin_unlock_irqrestore(&ha->vport_slock, flags); 6387 6388 if (!ha->flags.eeh_busy) { 6389 /* Make sure for ISP 82XX IO DMA is complete */ 6390 if (IS_P3P_TYPE(ha)) { 6391 qla82xx_chip_reset_cleanup(vha); 6392 ql_log(ql_log_info, vha, 0x00b4, 6393 "Done chip reset cleanup.\n"); 6394 6395 /* Done waiting for pending commands. 6396 * Reset the online flag. 6397 */ 6398 vha->flags.online = 0; 6399 } 6400 6401 /* Requeue all commands in outstanding command list. */ 6402 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6403 } 6404 /* memory barrier */ 6405 wmb(); 6406 } 6407 6408 /* 6409 * qla2x00_abort_isp 6410 * Resets ISP and aborts all outstanding commands. 6411 * 6412 * Input: 6413 * ha = adapter block pointer. 6414 * 6415 * Returns: 6416 * 0 = success 6417 */ 6418 int 6419 qla2x00_abort_isp(scsi_qla_host_t *vha) 6420 { 6421 int rval; 6422 uint8_t status = 0; 6423 struct qla_hw_data *ha = vha->hw; 6424 struct scsi_qla_host *vp; 6425 struct req_que *req = ha->req_q_map[0]; 6426 unsigned long flags; 6427 6428 if (vha->flags.online) { 6429 qla2x00_abort_isp_cleanup(vha); 6430 6431 if (IS_QLA8031(ha)) { 6432 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6433 "Clearing fcoe driver presence.\n"); 6434 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6435 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6436 "Error while clearing DRV-Presence.\n"); 6437 } 6438 6439 if (unlikely(pci_channel_offline(ha->pdev) && 6440 ha->flags.pci_channel_io_perm_failure)) { 6441 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6442 status = 0; 6443 return status; 6444 } 6445 6446 ha->isp_ops->get_flash_version(vha, req->ring); 6447 6448 ha->isp_ops->nvram_config(vha); 6449 6450 if (!qla2x00_restart_isp(vha)) { 6451 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6452 6453 if (!atomic_read(&vha->loop_down_timer)) { 6454 /* 6455 * Issue marker command only when we are going 6456 * to start the I/O . 6457 */ 6458 vha->marker_needed = 1; 6459 } 6460 6461 vha->flags.online = 1; 6462 6463 ha->isp_ops->enable_intrs(ha); 6464 6465 ha->isp_abort_cnt = 0; 6466 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6467 6468 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6469 qla2x00_get_fw_version(vha); 6470 if (ha->fce) { 6471 ha->flags.fce_enabled = 1; 6472 memset(ha->fce, 0, 6473 fce_calc_size(ha->fce_bufs)); 6474 rval = qla2x00_enable_fce_trace(vha, 6475 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6476 &ha->fce_bufs); 6477 if (rval) { 6478 ql_log(ql_log_warn, vha, 0x8033, 6479 "Unable to reinitialize FCE " 6480 "(%d).\n", rval); 6481 ha->flags.fce_enabled = 0; 6482 } 6483 } 6484 6485 if (ha->eft) { 6486 memset(ha->eft, 0, EFT_SIZE); 6487 rval = qla2x00_enable_eft_trace(vha, 6488 ha->eft_dma, EFT_NUM_BUFFERS); 6489 if (rval) { 6490 ql_log(ql_log_warn, vha, 0x8034, 6491 "Unable to reinitialize EFT " 6492 "(%d).\n", rval); 6493 } 6494 } 6495 } else { /* failed the ISP abort */ 6496 vha->flags.online = 1; 6497 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6498 if (ha->isp_abort_cnt == 0) { 6499 ql_log(ql_log_fatal, vha, 0x8035, 6500 "ISP error recover failed - " 6501 "board disabled.\n"); 6502 /* 6503 * The next call disables the board 6504 * completely. 6505 */ 6506 ha->isp_ops->reset_adapter(vha); 6507 vha->flags.online = 0; 6508 clear_bit(ISP_ABORT_RETRY, 6509 &vha->dpc_flags); 6510 status = 0; 6511 } else { /* schedule another ISP abort */ 6512 ha->isp_abort_cnt--; 6513 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6514 "ISP abort - retry remaining %d.\n", 6515 ha->isp_abort_cnt); 6516 status = 1; 6517 } 6518 } else { 6519 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6520 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6521 "ISP error recovery - retrying (%d) " 6522 "more times.\n", ha->isp_abort_cnt); 6523 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6524 status = 1; 6525 } 6526 } 6527 6528 } 6529 6530 if (!status) { 6531 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6532 qla2x00_configure_hba(vha); 6533 spin_lock_irqsave(&ha->vport_slock, flags); 6534 list_for_each_entry(vp, &ha->vp_list, list) { 6535 if (vp->vp_idx) { 6536 atomic_inc(&vp->vref_count); 6537 spin_unlock_irqrestore(&ha->vport_slock, flags); 6538 6539 qla2x00_vp_abort_isp(vp); 6540 6541 spin_lock_irqsave(&ha->vport_slock, flags); 6542 atomic_dec(&vp->vref_count); 6543 } 6544 } 6545 spin_unlock_irqrestore(&ha->vport_slock, flags); 6546 6547 if (IS_QLA8031(ha)) { 6548 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6549 "Setting back fcoe driver presence.\n"); 6550 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6551 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6552 "Error while setting DRV-Presence.\n"); 6553 } 6554 } else { 6555 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6556 __func__); 6557 } 6558 6559 return(status); 6560 } 6561 6562 /* 6563 * qla2x00_restart_isp 6564 * restarts the ISP after a reset 6565 * 6566 * Input: 6567 * ha = adapter block pointer. 6568 * 6569 * Returns: 6570 * 0 = success 6571 */ 6572 static int 6573 qla2x00_restart_isp(scsi_qla_host_t *vha) 6574 { 6575 int status = 0; 6576 struct qla_hw_data *ha = vha->hw; 6577 struct req_que *req = ha->req_q_map[0]; 6578 struct rsp_que *rsp = ha->rsp_q_map[0]; 6579 6580 /* If firmware needs to be loaded */ 6581 if (qla2x00_isp_firmware(vha)) { 6582 vha->flags.online = 0; 6583 status = ha->isp_ops->chip_diag(vha); 6584 if (!status) 6585 status = qla2x00_setup_chip(vha); 6586 } 6587 6588 if (!status && !(status = qla2x00_init_rings(vha))) { 6589 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6590 ha->flags.chip_reset_done = 1; 6591 6592 /* Initialize the queues in use */ 6593 qla25xx_init_queues(ha); 6594 6595 status = qla2x00_fw_ready(vha); 6596 if (!status) { 6597 /* Issue a marker after FW becomes ready. */ 6598 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6599 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6600 } 6601 6602 /* if no cable then assume it's good */ 6603 if ((vha->device_flags & DFLG_NO_CABLE)) 6604 status = 0; 6605 } 6606 return (status); 6607 } 6608 6609 static int 6610 qla25xx_init_queues(struct qla_hw_data *ha) 6611 { 6612 struct rsp_que *rsp = NULL; 6613 struct req_que *req = NULL; 6614 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6615 int ret = -1; 6616 int i; 6617 6618 for (i = 1; i < ha->max_rsp_queues; i++) { 6619 rsp = ha->rsp_q_map[i]; 6620 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6621 rsp->options &= ~BIT_0; 6622 ret = qla25xx_init_rsp_que(base_vha, rsp); 6623 if (ret != QLA_SUCCESS) 6624 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6625 "%s Rsp que: %d init failed.\n", 6626 __func__, rsp->id); 6627 else 6628 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6629 "%s Rsp que: %d inited.\n", 6630 __func__, rsp->id); 6631 } 6632 } 6633 for (i = 1; i < ha->max_req_queues; i++) { 6634 req = ha->req_q_map[i]; 6635 if (req && test_bit(i, ha->req_qid_map)) { 6636 /* Clear outstanding commands array. */ 6637 req->options &= ~BIT_0; 6638 ret = qla25xx_init_req_que(base_vha, req); 6639 if (ret != QLA_SUCCESS) 6640 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6641 "%s Req que: %d init failed.\n", 6642 __func__, req->id); 6643 else 6644 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6645 "%s Req que: %d inited.\n", 6646 __func__, req->id); 6647 } 6648 } 6649 return ret; 6650 } 6651 6652 /* 6653 * qla2x00_reset_adapter 6654 * Reset adapter. 6655 * 6656 * Input: 6657 * ha = adapter block pointer. 6658 */ 6659 void 6660 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6661 { 6662 unsigned long flags = 0; 6663 struct qla_hw_data *ha = vha->hw; 6664 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6665 6666 vha->flags.online = 0; 6667 ha->isp_ops->disable_intrs(ha); 6668 6669 spin_lock_irqsave(&ha->hardware_lock, flags); 6670 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6671 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6672 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6673 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6674 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6675 } 6676 6677 void 6678 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6679 { 6680 unsigned long flags = 0; 6681 struct qla_hw_data *ha = vha->hw; 6682 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6683 6684 if (IS_P3P_TYPE(ha)) 6685 return; 6686 6687 vha->flags.online = 0; 6688 ha->isp_ops->disable_intrs(ha); 6689 6690 spin_lock_irqsave(&ha->hardware_lock, flags); 6691 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6692 RD_REG_DWORD(®->hccr); 6693 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6694 RD_REG_DWORD(®->hccr); 6695 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6696 6697 if (IS_NOPOLLING_TYPE(ha)) 6698 ha->isp_ops->enable_intrs(ha); 6699 } 6700 6701 /* On sparc systems, obtain port and node WWN from firmware 6702 * properties. 6703 */ 6704 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6705 struct nvram_24xx *nv) 6706 { 6707 #ifdef CONFIG_SPARC 6708 struct qla_hw_data *ha = vha->hw; 6709 struct pci_dev *pdev = ha->pdev; 6710 struct device_node *dp = pci_device_to_OF_node(pdev); 6711 const u8 *val; 6712 int len; 6713 6714 val = of_get_property(dp, "port-wwn", &len); 6715 if (val && len >= WWN_SIZE) 6716 memcpy(nv->port_name, val, WWN_SIZE); 6717 6718 val = of_get_property(dp, "node-wwn", &len); 6719 if (val && len >= WWN_SIZE) 6720 memcpy(nv->node_name, val, WWN_SIZE); 6721 #endif 6722 } 6723 6724 int 6725 qla24xx_nvram_config(scsi_qla_host_t *vha) 6726 { 6727 int rval; 6728 struct init_cb_24xx *icb; 6729 struct nvram_24xx *nv; 6730 uint32_t *dptr; 6731 uint8_t *dptr1, *dptr2; 6732 uint32_t chksum; 6733 uint16_t cnt; 6734 struct qla_hw_data *ha = vha->hw; 6735 6736 rval = QLA_SUCCESS; 6737 icb = (struct init_cb_24xx *)ha->init_cb; 6738 nv = ha->nvram; 6739 6740 /* Determine NVRAM starting address. */ 6741 if (ha->port_no == 0) { 6742 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 6743 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 6744 } else { 6745 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 6746 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 6747 } 6748 6749 ha->nvram_size = sizeof(struct nvram_24xx); 6750 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6751 6752 /* Get VPD data into cache */ 6753 ha->vpd = ha->nvram + VPD_OFFSET; 6754 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 6755 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 6756 6757 /* Get NVRAM data into cache and calculate checksum. */ 6758 dptr = (uint32_t *)nv; 6759 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 6760 ha->nvram_size); 6761 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6762 chksum += le32_to_cpu(*dptr); 6763 6764 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 6765 "Contents of NVRAM\n"); 6766 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 6767 (uint8_t *)nv, ha->nvram_size); 6768 6769 /* Bad NVRAM data, set defaults parameters. */ 6770 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6771 || nv->id[3] != ' ' || 6772 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6773 /* Reset NVRAM data. */ 6774 ql_log(ql_log_warn, vha, 0x006b, 6775 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6776 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 6777 ql_log(ql_log_warn, vha, 0x006c, 6778 "Falling back to functioning (yet invalid -- WWPN) " 6779 "defaults.\n"); 6780 6781 /* 6782 * Set default initialization control block. 6783 */ 6784 memset(nv, 0, ha->nvram_size); 6785 nv->nvram_version = cpu_to_le16(ICB_VERSION); 6786 nv->version = cpu_to_le16(ICB_VERSION); 6787 nv->frame_payload_size = 2048; 6788 nv->execution_throttle = cpu_to_le16(0xFFFF); 6789 nv->exchange_count = cpu_to_le16(0); 6790 nv->hard_address = cpu_to_le16(124); 6791 nv->port_name[0] = 0x21; 6792 nv->port_name[1] = 0x00 + ha->port_no + 1; 6793 nv->port_name[2] = 0x00; 6794 nv->port_name[3] = 0xe0; 6795 nv->port_name[4] = 0x8b; 6796 nv->port_name[5] = 0x1c; 6797 nv->port_name[6] = 0x55; 6798 nv->port_name[7] = 0x86; 6799 nv->node_name[0] = 0x20; 6800 nv->node_name[1] = 0x00; 6801 nv->node_name[2] = 0x00; 6802 nv->node_name[3] = 0xe0; 6803 nv->node_name[4] = 0x8b; 6804 nv->node_name[5] = 0x1c; 6805 nv->node_name[6] = 0x55; 6806 nv->node_name[7] = 0x86; 6807 qla24xx_nvram_wwn_from_ofw(vha, nv); 6808 nv->login_retry_count = cpu_to_le16(8); 6809 nv->interrupt_delay_timer = cpu_to_le16(0); 6810 nv->login_timeout = cpu_to_le16(0); 6811 nv->firmware_options_1 = 6812 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6813 nv->firmware_options_2 = cpu_to_le32(2 << 4); 6814 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 6815 nv->firmware_options_3 = cpu_to_le32(2 << 13); 6816 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 6817 nv->efi_parameters = cpu_to_le32(0); 6818 nv->reset_delay = 5; 6819 nv->max_luns_per_target = cpu_to_le16(128); 6820 nv->port_down_retry_count = cpu_to_le16(30); 6821 nv->link_down_timeout = cpu_to_le16(30); 6822 6823 rval = 1; 6824 } 6825 6826 if (qla_tgt_mode_enabled(vha)) { 6827 /* Don't enable full login after initial LIP */ 6828 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 6829 /* Don't enable LIP full login for initiator */ 6830 nv->host_p &= cpu_to_le32(~BIT_10); 6831 } 6832 6833 qlt_24xx_config_nvram_stage1(vha, nv); 6834 6835 /* Reset Initialization control block */ 6836 memset(icb, 0, ha->init_cb_size); 6837 6838 /* Copy 1st segment. */ 6839 dptr1 = (uint8_t *)icb; 6840 dptr2 = (uint8_t *)&nv->version; 6841 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6842 while (cnt--) 6843 *dptr1++ = *dptr2++; 6844 6845 icb->login_retry_count = nv->login_retry_count; 6846 icb->link_down_on_nos = nv->link_down_on_nos; 6847 6848 /* Copy 2nd segment. */ 6849 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6850 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6851 cnt = (uint8_t *)&icb->reserved_3 - 6852 (uint8_t *)&icb->interrupt_delay_timer; 6853 while (cnt--) 6854 *dptr1++ = *dptr2++; 6855 6856 /* 6857 * Setup driver NVRAM options. 6858 */ 6859 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6860 "QLA2462"); 6861 6862 qlt_24xx_config_nvram_stage2(vha, icb); 6863 6864 if (nv->host_p & cpu_to_le32(BIT_15)) { 6865 /* Use alternate WWN? */ 6866 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6867 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6868 } 6869 6870 /* Prepare nodename */ 6871 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 6872 /* 6873 * Firmware will apply the following mask if the nodename was 6874 * not provided. 6875 */ 6876 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6877 icb->node_name[0] &= 0xF0; 6878 } 6879 6880 /* Set host adapter parameters. */ 6881 ha->flags.disable_risc_code_load = 0; 6882 ha->flags.enable_lip_reset = 0; 6883 ha->flags.enable_lip_full_login = 6884 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6885 ha->flags.enable_target_reset = 6886 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6887 ha->flags.enable_led_scheme = 0; 6888 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6889 6890 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6891 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6892 6893 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 6894 sizeof(ha->fw_seriallink_options24)); 6895 6896 /* save HBA serial number */ 6897 ha->serial0 = icb->port_name[5]; 6898 ha->serial1 = icb->port_name[6]; 6899 ha->serial2 = icb->port_name[7]; 6900 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6901 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6902 6903 icb->execution_throttle = cpu_to_le16(0xFFFF); 6904 6905 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6906 6907 /* Set minimum login_timeout to 4 seconds. */ 6908 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6909 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6910 if (le16_to_cpu(nv->login_timeout) < 4) 6911 nv->login_timeout = cpu_to_le16(4); 6912 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6913 6914 /* Set minimum RATOV to 100 tenths of a second. */ 6915 ha->r_a_tov = 100; 6916 6917 ha->loop_reset_delay = nv->reset_delay; 6918 6919 /* Link Down Timeout = 0: 6920 * 6921 * When Port Down timer expires we will start returning 6922 * I/O's to OS with "DID_NO_CONNECT". 6923 * 6924 * Link Down Timeout != 0: 6925 * 6926 * The driver waits for the link to come up after link down 6927 * before returning I/Os to OS with "DID_NO_CONNECT". 6928 */ 6929 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6930 ha->loop_down_abort_time = 6931 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6932 } else { 6933 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6934 ha->loop_down_abort_time = 6935 (LOOP_DOWN_TIME - ha->link_down_timeout); 6936 } 6937 6938 /* Need enough time to try and get the port back. */ 6939 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6940 if (qlport_down_retry) 6941 ha->port_down_retry_count = qlport_down_retry; 6942 6943 /* Set login_retry_count */ 6944 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6945 if (ha->port_down_retry_count == 6946 le16_to_cpu(nv->port_down_retry_count) && 6947 ha->port_down_retry_count > 3) 6948 ha->login_retry_count = ha->port_down_retry_count; 6949 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6950 ha->login_retry_count = ha->port_down_retry_count; 6951 if (ql2xloginretrycount) 6952 ha->login_retry_count = ql2xloginretrycount; 6953 6954 /* Enable ZIO. */ 6955 if (!vha->flags.init_done) { 6956 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6957 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6958 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6959 le16_to_cpu(icb->interrupt_delay_timer): 2; 6960 } 6961 icb->firmware_options_2 &= cpu_to_le32( 6962 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6963 vha->flags.process_response_queue = 0; 6964 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6965 ha->zio_mode = QLA_ZIO_MODE_6; 6966 6967 ql_log(ql_log_info, vha, 0x006f, 6968 "ZIO mode %d enabled; timer delay (%d us).\n", 6969 ha->zio_mode, ha->zio_timer * 100); 6970 6971 icb->firmware_options_2 |= cpu_to_le32( 6972 (uint32_t)ha->zio_mode); 6973 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6974 vha->flags.process_response_queue = 1; 6975 } 6976 6977 if (rval) { 6978 ql_log(ql_log_warn, vha, 0x0070, 6979 "NVRAM configuration failed.\n"); 6980 } 6981 return (rval); 6982 } 6983 6984 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 6985 { 6986 struct qla27xx_image_status pri_image_status, sec_image_status; 6987 uint8_t valid_pri_image, valid_sec_image; 6988 uint32_t *wptr; 6989 uint32_t cnt, chksum, size; 6990 struct qla_hw_data *ha = vha->hw; 6991 6992 valid_pri_image = valid_sec_image = 1; 6993 ha->active_image = 0; 6994 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 6995 6996 if (!ha->flt_region_img_status_pri) { 6997 valid_pri_image = 0; 6998 goto check_sec_image; 6999 } 7000 7001 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 7002 ha->flt_region_img_status_pri, size); 7003 7004 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7005 ql_dbg(ql_dbg_init, vha, 0x018b, 7006 "Primary image signature (0x%x) not valid\n", 7007 pri_image_status.signature); 7008 valid_pri_image = 0; 7009 goto check_sec_image; 7010 } 7011 7012 wptr = (uint32_t *)(&pri_image_status); 7013 cnt = size; 7014 7015 for (chksum = 0; cnt--; wptr++) 7016 chksum += le32_to_cpu(*wptr); 7017 7018 if (chksum) { 7019 ql_dbg(ql_dbg_init, vha, 0x018c, 7020 "Checksum validation failed for primary image (0x%x)\n", 7021 chksum); 7022 valid_pri_image = 0; 7023 } 7024 7025 check_sec_image: 7026 if (!ha->flt_region_img_status_sec) { 7027 valid_sec_image = 0; 7028 goto check_valid_image; 7029 } 7030 7031 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7032 ha->flt_region_img_status_sec, size); 7033 7034 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7035 ql_dbg(ql_dbg_init, vha, 0x018d, 7036 "Secondary image signature(0x%x) not valid\n", 7037 sec_image_status.signature); 7038 valid_sec_image = 0; 7039 goto check_valid_image; 7040 } 7041 7042 wptr = (uint32_t *)(&sec_image_status); 7043 cnt = size; 7044 for (chksum = 0; cnt--; wptr++) 7045 chksum += le32_to_cpu(*wptr); 7046 if (chksum) { 7047 ql_dbg(ql_dbg_init, vha, 0x018e, 7048 "Checksum validation failed for secondary image (0x%x)\n", 7049 chksum); 7050 valid_sec_image = 0; 7051 } 7052 7053 check_valid_image: 7054 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7055 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7056 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7057 if (!ha->active_image || 7058 pri_image_status.generation_number < 7059 sec_image_status.generation_number) 7060 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7061 } 7062 7063 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n", 7064 ha->active_image == 0 ? "default bootld and fw" : 7065 ha->active_image == 1 ? "primary" : 7066 ha->active_image == 2 ? "secondary" : 7067 "Invalid"); 7068 7069 return ha->active_image; 7070 } 7071 7072 static int 7073 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7074 uint32_t faddr) 7075 { 7076 int rval = QLA_SUCCESS; 7077 int segments, fragment; 7078 uint32_t *dcode, dlen; 7079 uint32_t risc_addr; 7080 uint32_t risc_size; 7081 uint32_t i; 7082 struct qla_hw_data *ha = vha->hw; 7083 struct req_que *req = ha->req_q_map[0]; 7084 7085 ql_dbg(ql_dbg_init, vha, 0x008b, 7086 "FW: Loading firmware from flash (%x).\n", faddr); 7087 7088 rval = QLA_SUCCESS; 7089 7090 segments = FA_RISC_CODE_SEGMENTS; 7091 dcode = (uint32_t *)req->ring; 7092 *srisc_addr = 0; 7093 7094 if (IS_QLA27XX(ha) && 7095 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7096 faddr = ha->flt_region_fw_sec; 7097 7098 /* Validate firmware image by checking version. */ 7099 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7100 for (i = 0; i < 4; i++) 7101 dcode[i] = be32_to_cpu(dcode[i]); 7102 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7103 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7104 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7105 dcode[3] == 0)) { 7106 ql_log(ql_log_fatal, vha, 0x008c, 7107 "Unable to verify the integrity of flash firmware " 7108 "image.\n"); 7109 ql_log(ql_log_fatal, vha, 0x008d, 7110 "Firmware data: %08x %08x %08x %08x.\n", 7111 dcode[0], dcode[1], dcode[2], dcode[3]); 7112 7113 return QLA_FUNCTION_FAILED; 7114 } 7115 7116 while (segments && rval == QLA_SUCCESS) { 7117 /* Read segment's load information. */ 7118 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7119 7120 risc_addr = be32_to_cpu(dcode[2]); 7121 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7122 risc_size = be32_to_cpu(dcode[3]); 7123 7124 fragment = 0; 7125 while (risc_size > 0 && rval == QLA_SUCCESS) { 7126 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7127 if (dlen > risc_size) 7128 dlen = risc_size; 7129 7130 ql_dbg(ql_dbg_init, vha, 0x008e, 7131 "Loading risc segment@ risc addr %x " 7132 "number of dwords 0x%x offset 0x%x.\n", 7133 risc_addr, dlen, faddr); 7134 7135 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7136 for (i = 0; i < dlen; i++) 7137 dcode[i] = swab32(dcode[i]); 7138 7139 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7140 dlen); 7141 if (rval) { 7142 ql_log(ql_log_fatal, vha, 0x008f, 7143 "Failed to load segment %d of firmware.\n", 7144 fragment); 7145 return QLA_FUNCTION_FAILED; 7146 } 7147 7148 faddr += dlen; 7149 risc_addr += dlen; 7150 risc_size -= dlen; 7151 fragment++; 7152 } 7153 7154 /* Next segment. */ 7155 segments--; 7156 } 7157 7158 if (!IS_QLA27XX(ha)) 7159 return rval; 7160 7161 if (ha->fw_dump_template) 7162 vfree(ha->fw_dump_template); 7163 ha->fw_dump_template = NULL; 7164 ha->fw_dump_template_len = 0; 7165 7166 ql_dbg(ql_dbg_init, vha, 0x0161, 7167 "Loading fwdump template from %x\n", faddr); 7168 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7169 risc_size = be32_to_cpu(dcode[2]); 7170 ql_dbg(ql_dbg_init, vha, 0x0162, 7171 "-> array size %x dwords\n", risc_size); 7172 if (risc_size == 0 || risc_size == ~0) 7173 goto default_template; 7174 7175 dlen = (risc_size - 8) * sizeof(*dcode); 7176 ql_dbg(ql_dbg_init, vha, 0x0163, 7177 "-> template allocating %x bytes...\n", dlen); 7178 ha->fw_dump_template = vmalloc(dlen); 7179 if (!ha->fw_dump_template) { 7180 ql_log(ql_log_warn, vha, 0x0164, 7181 "Failed fwdump template allocate %x bytes.\n", risc_size); 7182 goto default_template; 7183 } 7184 7185 faddr += 7; 7186 risc_size -= 8; 7187 dcode = ha->fw_dump_template; 7188 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7189 for (i = 0; i < risc_size; i++) 7190 dcode[i] = le32_to_cpu(dcode[i]); 7191 7192 if (!qla27xx_fwdt_template_valid(dcode)) { 7193 ql_log(ql_log_warn, vha, 0x0165, 7194 "Failed fwdump template validate\n"); 7195 goto default_template; 7196 } 7197 7198 dlen = qla27xx_fwdt_template_size(dcode); 7199 ql_dbg(ql_dbg_init, vha, 0x0166, 7200 "-> template size %x bytes\n", dlen); 7201 if (dlen > risc_size * sizeof(*dcode)) { 7202 ql_log(ql_log_warn, vha, 0x0167, 7203 "Failed fwdump template exceeds array by %zx bytes\n", 7204 (size_t)(dlen - risc_size * sizeof(*dcode))); 7205 goto default_template; 7206 } 7207 ha->fw_dump_template_len = dlen; 7208 return rval; 7209 7210 default_template: 7211 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7212 if (ha->fw_dump_template) 7213 vfree(ha->fw_dump_template); 7214 ha->fw_dump_template = NULL; 7215 ha->fw_dump_template_len = 0; 7216 7217 dlen = qla27xx_fwdt_template_default_size(); 7218 ql_dbg(ql_dbg_init, vha, 0x0169, 7219 "-> template allocating %x bytes...\n", dlen); 7220 ha->fw_dump_template = vmalloc(dlen); 7221 if (!ha->fw_dump_template) { 7222 ql_log(ql_log_warn, vha, 0x016a, 7223 "Failed fwdump template allocate %x bytes.\n", risc_size); 7224 goto failed_template; 7225 } 7226 7227 dcode = ha->fw_dump_template; 7228 risc_size = dlen / sizeof(*dcode); 7229 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7230 for (i = 0; i < risc_size; i++) 7231 dcode[i] = be32_to_cpu(dcode[i]); 7232 7233 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7234 ql_log(ql_log_warn, vha, 0x016b, 7235 "Failed fwdump template validate\n"); 7236 goto failed_template; 7237 } 7238 7239 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7240 ql_dbg(ql_dbg_init, vha, 0x016c, 7241 "-> template size %x bytes\n", dlen); 7242 ha->fw_dump_template_len = dlen; 7243 return rval; 7244 7245 failed_template: 7246 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7247 if (ha->fw_dump_template) 7248 vfree(ha->fw_dump_template); 7249 ha->fw_dump_template = NULL; 7250 ha->fw_dump_template_len = 0; 7251 return rval; 7252 } 7253 7254 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7255 7256 int 7257 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7258 { 7259 int rval; 7260 int i, fragment; 7261 uint16_t *wcode, *fwcode; 7262 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7263 struct fw_blob *blob; 7264 struct qla_hw_data *ha = vha->hw; 7265 struct req_que *req = ha->req_q_map[0]; 7266 7267 /* Load firmware blob. */ 7268 blob = qla2x00_request_firmware(vha); 7269 if (!blob) { 7270 ql_log(ql_log_info, vha, 0x0083, 7271 "Firmware image unavailable.\n"); 7272 ql_log(ql_log_info, vha, 0x0084, 7273 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7274 return QLA_FUNCTION_FAILED; 7275 } 7276 7277 rval = QLA_SUCCESS; 7278 7279 wcode = (uint16_t *)req->ring; 7280 *srisc_addr = 0; 7281 fwcode = (uint16_t *)blob->fw->data; 7282 fwclen = 0; 7283 7284 /* Validate firmware image by checking version. */ 7285 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7286 ql_log(ql_log_fatal, vha, 0x0085, 7287 "Unable to verify integrity of firmware image (%zd).\n", 7288 blob->fw->size); 7289 goto fail_fw_integrity; 7290 } 7291 for (i = 0; i < 4; i++) 7292 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7293 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7294 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7295 wcode[2] == 0 && wcode[3] == 0)) { 7296 ql_log(ql_log_fatal, vha, 0x0086, 7297 "Unable to verify integrity of firmware image.\n"); 7298 ql_log(ql_log_fatal, vha, 0x0087, 7299 "Firmware data: %04x %04x %04x %04x.\n", 7300 wcode[0], wcode[1], wcode[2], wcode[3]); 7301 goto fail_fw_integrity; 7302 } 7303 7304 seg = blob->segs; 7305 while (*seg && rval == QLA_SUCCESS) { 7306 risc_addr = *seg; 7307 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7308 risc_size = be16_to_cpu(fwcode[3]); 7309 7310 /* Validate firmware image size. */ 7311 fwclen += risc_size * sizeof(uint16_t); 7312 if (blob->fw->size < fwclen) { 7313 ql_log(ql_log_fatal, vha, 0x0088, 7314 "Unable to verify integrity of firmware image " 7315 "(%zd).\n", blob->fw->size); 7316 goto fail_fw_integrity; 7317 } 7318 7319 fragment = 0; 7320 while (risc_size > 0 && rval == QLA_SUCCESS) { 7321 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7322 if (wlen > risc_size) 7323 wlen = risc_size; 7324 ql_dbg(ql_dbg_init, vha, 0x0089, 7325 "Loading risc segment@ risc addr %x number of " 7326 "words 0x%x.\n", risc_addr, wlen); 7327 7328 for (i = 0; i < wlen; i++) 7329 wcode[i] = swab16(fwcode[i]); 7330 7331 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7332 wlen); 7333 if (rval) { 7334 ql_log(ql_log_fatal, vha, 0x008a, 7335 "Failed to load segment %d of firmware.\n", 7336 fragment); 7337 break; 7338 } 7339 7340 fwcode += wlen; 7341 risc_addr += wlen; 7342 risc_size -= wlen; 7343 fragment++; 7344 } 7345 7346 /* Next segment. */ 7347 seg++; 7348 } 7349 return rval; 7350 7351 fail_fw_integrity: 7352 return QLA_FUNCTION_FAILED; 7353 } 7354 7355 static int 7356 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7357 { 7358 int rval; 7359 int segments, fragment; 7360 uint32_t *dcode, dlen; 7361 uint32_t risc_addr; 7362 uint32_t risc_size; 7363 uint32_t i; 7364 struct fw_blob *blob; 7365 const uint32_t *fwcode; 7366 uint32_t fwclen; 7367 struct qla_hw_data *ha = vha->hw; 7368 struct req_que *req = ha->req_q_map[0]; 7369 7370 /* Load firmware blob. */ 7371 blob = qla2x00_request_firmware(vha); 7372 if (!blob) { 7373 ql_log(ql_log_warn, vha, 0x0090, 7374 "Firmware image unavailable.\n"); 7375 ql_log(ql_log_warn, vha, 0x0091, 7376 "Firmware images can be retrieved from: " 7377 QLA_FW_URL ".\n"); 7378 7379 return QLA_FUNCTION_FAILED; 7380 } 7381 7382 ql_dbg(ql_dbg_init, vha, 0x0092, 7383 "FW: Loading via request-firmware.\n"); 7384 7385 rval = QLA_SUCCESS; 7386 7387 segments = FA_RISC_CODE_SEGMENTS; 7388 dcode = (uint32_t *)req->ring; 7389 *srisc_addr = 0; 7390 fwcode = (uint32_t *)blob->fw->data; 7391 fwclen = 0; 7392 7393 /* Validate firmware image by checking version. */ 7394 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7395 ql_log(ql_log_fatal, vha, 0x0093, 7396 "Unable to verify integrity of firmware image (%zd).\n", 7397 blob->fw->size); 7398 return QLA_FUNCTION_FAILED; 7399 } 7400 for (i = 0; i < 4; i++) 7401 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7402 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7403 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7404 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7405 dcode[3] == 0)) { 7406 ql_log(ql_log_fatal, vha, 0x0094, 7407 "Unable to verify integrity of firmware image (%zd).\n", 7408 blob->fw->size); 7409 ql_log(ql_log_fatal, vha, 0x0095, 7410 "Firmware data: %08x %08x %08x %08x.\n", 7411 dcode[0], dcode[1], dcode[2], dcode[3]); 7412 return QLA_FUNCTION_FAILED; 7413 } 7414 7415 while (segments && rval == QLA_SUCCESS) { 7416 risc_addr = be32_to_cpu(fwcode[2]); 7417 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7418 risc_size = be32_to_cpu(fwcode[3]); 7419 7420 /* Validate firmware image size. */ 7421 fwclen += risc_size * sizeof(uint32_t); 7422 if (blob->fw->size < fwclen) { 7423 ql_log(ql_log_fatal, vha, 0x0096, 7424 "Unable to verify integrity of firmware image " 7425 "(%zd).\n", blob->fw->size); 7426 return QLA_FUNCTION_FAILED; 7427 } 7428 7429 fragment = 0; 7430 while (risc_size > 0 && rval == QLA_SUCCESS) { 7431 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7432 if (dlen > risc_size) 7433 dlen = risc_size; 7434 7435 ql_dbg(ql_dbg_init, vha, 0x0097, 7436 "Loading risc segment@ risc addr %x " 7437 "number of dwords 0x%x.\n", risc_addr, dlen); 7438 7439 for (i = 0; i < dlen; i++) 7440 dcode[i] = swab32(fwcode[i]); 7441 7442 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7443 dlen); 7444 if (rval) { 7445 ql_log(ql_log_fatal, vha, 0x0098, 7446 "Failed to load segment %d of firmware.\n", 7447 fragment); 7448 return QLA_FUNCTION_FAILED; 7449 } 7450 7451 fwcode += dlen; 7452 risc_addr += dlen; 7453 risc_size -= dlen; 7454 fragment++; 7455 } 7456 7457 /* Next segment. */ 7458 segments--; 7459 } 7460 7461 if (!IS_QLA27XX(ha)) 7462 return rval; 7463 7464 if (ha->fw_dump_template) 7465 vfree(ha->fw_dump_template); 7466 ha->fw_dump_template = NULL; 7467 ha->fw_dump_template_len = 0; 7468 7469 ql_dbg(ql_dbg_init, vha, 0x171, 7470 "Loading fwdump template from %x\n", 7471 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7472 risc_size = be32_to_cpu(fwcode[2]); 7473 ql_dbg(ql_dbg_init, vha, 0x172, 7474 "-> array size %x dwords\n", risc_size); 7475 if (risc_size == 0 || risc_size == ~0) 7476 goto default_template; 7477 7478 dlen = (risc_size - 8) * sizeof(*fwcode); 7479 ql_dbg(ql_dbg_init, vha, 0x0173, 7480 "-> template allocating %x bytes...\n", dlen); 7481 ha->fw_dump_template = vmalloc(dlen); 7482 if (!ha->fw_dump_template) { 7483 ql_log(ql_log_warn, vha, 0x0174, 7484 "Failed fwdump template allocate %x bytes.\n", risc_size); 7485 goto default_template; 7486 } 7487 7488 fwcode += 7; 7489 risc_size -= 8; 7490 dcode = ha->fw_dump_template; 7491 for (i = 0; i < risc_size; i++) 7492 dcode[i] = le32_to_cpu(fwcode[i]); 7493 7494 if (!qla27xx_fwdt_template_valid(dcode)) { 7495 ql_log(ql_log_warn, vha, 0x0175, 7496 "Failed fwdump template validate\n"); 7497 goto default_template; 7498 } 7499 7500 dlen = qla27xx_fwdt_template_size(dcode); 7501 ql_dbg(ql_dbg_init, vha, 0x0176, 7502 "-> template size %x bytes\n", dlen); 7503 if (dlen > risc_size * sizeof(*fwcode)) { 7504 ql_log(ql_log_warn, vha, 0x0177, 7505 "Failed fwdump template exceeds array by %zx bytes\n", 7506 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7507 goto default_template; 7508 } 7509 ha->fw_dump_template_len = dlen; 7510 return rval; 7511 7512 default_template: 7513 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7514 if (ha->fw_dump_template) 7515 vfree(ha->fw_dump_template); 7516 ha->fw_dump_template = NULL; 7517 ha->fw_dump_template_len = 0; 7518 7519 dlen = qla27xx_fwdt_template_default_size(); 7520 ql_dbg(ql_dbg_init, vha, 0x0179, 7521 "-> template allocating %x bytes...\n", dlen); 7522 ha->fw_dump_template = vmalloc(dlen); 7523 if (!ha->fw_dump_template) { 7524 ql_log(ql_log_warn, vha, 0x017a, 7525 "Failed fwdump template allocate %x bytes.\n", risc_size); 7526 goto failed_template; 7527 } 7528 7529 dcode = ha->fw_dump_template; 7530 risc_size = dlen / sizeof(*fwcode); 7531 fwcode = qla27xx_fwdt_template_default(); 7532 for (i = 0; i < risc_size; i++) 7533 dcode[i] = be32_to_cpu(fwcode[i]); 7534 7535 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7536 ql_log(ql_log_warn, vha, 0x017b, 7537 "Failed fwdump template validate\n"); 7538 goto failed_template; 7539 } 7540 7541 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7542 ql_dbg(ql_dbg_init, vha, 0x017c, 7543 "-> template size %x bytes\n", dlen); 7544 ha->fw_dump_template_len = dlen; 7545 return rval; 7546 7547 failed_template: 7548 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7549 if (ha->fw_dump_template) 7550 vfree(ha->fw_dump_template); 7551 ha->fw_dump_template = NULL; 7552 ha->fw_dump_template_len = 0; 7553 return rval; 7554 } 7555 7556 int 7557 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7558 { 7559 int rval; 7560 7561 if (ql2xfwloadbin == 1) 7562 return qla81xx_load_risc(vha, srisc_addr); 7563 7564 /* 7565 * FW Load priority: 7566 * 1) Firmware via request-firmware interface (.bin file). 7567 * 2) Firmware residing in flash. 7568 */ 7569 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7570 if (rval == QLA_SUCCESS) 7571 return rval; 7572 7573 return qla24xx_load_risc_flash(vha, srisc_addr, 7574 vha->hw->flt_region_fw); 7575 } 7576 7577 int 7578 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7579 { 7580 int rval; 7581 struct qla_hw_data *ha = vha->hw; 7582 7583 if (ql2xfwloadbin == 2) 7584 goto try_blob_fw; 7585 7586 /* 7587 * FW Load priority: 7588 * 1) Firmware residing in flash. 7589 * 2) Firmware via request-firmware interface (.bin file). 7590 * 3) Golden-Firmware residing in flash -- limited operation. 7591 */ 7592 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7593 if (rval == QLA_SUCCESS) 7594 return rval; 7595 7596 try_blob_fw: 7597 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7598 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7599 return rval; 7600 7601 ql_log(ql_log_info, vha, 0x0099, 7602 "Attempting to fallback to golden firmware.\n"); 7603 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7604 if (rval != QLA_SUCCESS) 7605 return rval; 7606 7607 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7608 ha->flags.running_gold_fw = 1; 7609 return rval; 7610 } 7611 7612 void 7613 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7614 { 7615 int ret, retries; 7616 struct qla_hw_data *ha = vha->hw; 7617 7618 if (ha->flags.pci_channel_io_perm_failure) 7619 return; 7620 if (!IS_FWI2_CAPABLE(ha)) 7621 return; 7622 if (!ha->fw_major_version) 7623 return; 7624 if (!ha->flags.fw_started) 7625 return; 7626 7627 ret = qla2x00_stop_firmware(vha); 7628 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7629 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7630 ha->isp_ops->reset_chip(vha); 7631 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7632 continue; 7633 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7634 continue; 7635 ql_log(ql_log_info, vha, 0x8015, 7636 "Attempting retry of stop-firmware command.\n"); 7637 ret = qla2x00_stop_firmware(vha); 7638 } 7639 7640 QLA_FW_STOPPED(ha); 7641 ha->flags.fw_init_done = 0; 7642 } 7643 7644 int 7645 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7646 { 7647 int rval = QLA_SUCCESS; 7648 int rval2; 7649 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7650 struct qla_hw_data *ha = vha->hw; 7651 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7652 struct req_que *req; 7653 struct rsp_que *rsp; 7654 7655 if (!vha->vp_idx) 7656 return -EINVAL; 7657 7658 rval = qla2x00_fw_ready(base_vha); 7659 if (vha->qpair) 7660 req = vha->qpair->req; 7661 else 7662 req = ha->req_q_map[0]; 7663 rsp = req->rsp; 7664 7665 if (rval == QLA_SUCCESS) { 7666 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7667 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7668 } 7669 7670 vha->flags.management_server_logged_in = 0; 7671 7672 /* Login to SNS first */ 7673 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7674 BIT_1); 7675 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7676 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7677 ql_dbg(ql_dbg_init, vha, 0x0120, 7678 "Failed SNS login: loop_id=%x, rval2=%d\n", 7679 NPH_SNS, rval2); 7680 else 7681 ql_dbg(ql_dbg_init, vha, 0x0103, 7682 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7683 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7684 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7685 return (QLA_FUNCTION_FAILED); 7686 } 7687 7688 atomic_set(&vha->loop_down_timer, 0); 7689 atomic_set(&vha->loop_state, LOOP_UP); 7690 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7691 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7692 rval = qla2x00_loop_resync(base_vha); 7693 7694 return rval; 7695 } 7696 7697 /* 84XX Support **************************************************************/ 7698 7699 static LIST_HEAD(qla_cs84xx_list); 7700 static DEFINE_MUTEX(qla_cs84xx_mutex); 7701 7702 static struct qla_chip_state_84xx * 7703 qla84xx_get_chip(struct scsi_qla_host *vha) 7704 { 7705 struct qla_chip_state_84xx *cs84xx; 7706 struct qla_hw_data *ha = vha->hw; 7707 7708 mutex_lock(&qla_cs84xx_mutex); 7709 7710 /* Find any shared 84xx chip. */ 7711 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7712 if (cs84xx->bus == ha->pdev->bus) { 7713 kref_get(&cs84xx->kref); 7714 goto done; 7715 } 7716 } 7717 7718 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 7719 if (!cs84xx) 7720 goto done; 7721 7722 kref_init(&cs84xx->kref); 7723 spin_lock_init(&cs84xx->access_lock); 7724 mutex_init(&cs84xx->fw_update_mutex); 7725 cs84xx->bus = ha->pdev->bus; 7726 7727 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 7728 done: 7729 mutex_unlock(&qla_cs84xx_mutex); 7730 return cs84xx; 7731 } 7732 7733 static void 7734 __qla84xx_chip_release(struct kref *kref) 7735 { 7736 struct qla_chip_state_84xx *cs84xx = 7737 container_of(kref, struct qla_chip_state_84xx, kref); 7738 7739 mutex_lock(&qla_cs84xx_mutex); 7740 list_del(&cs84xx->list); 7741 mutex_unlock(&qla_cs84xx_mutex); 7742 kfree(cs84xx); 7743 } 7744 7745 void 7746 qla84xx_put_chip(struct scsi_qla_host *vha) 7747 { 7748 struct qla_hw_data *ha = vha->hw; 7749 if (ha->cs84xx) 7750 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 7751 } 7752 7753 static int 7754 qla84xx_init_chip(scsi_qla_host_t *vha) 7755 { 7756 int rval; 7757 uint16_t status[2]; 7758 struct qla_hw_data *ha = vha->hw; 7759 7760 mutex_lock(&ha->cs84xx->fw_update_mutex); 7761 7762 rval = qla84xx_verify_chip(vha, status); 7763 7764 mutex_unlock(&ha->cs84xx->fw_update_mutex); 7765 7766 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 7767 QLA_SUCCESS; 7768 } 7769 7770 /* 81XX Support **************************************************************/ 7771 7772 int 7773 qla81xx_nvram_config(scsi_qla_host_t *vha) 7774 { 7775 int rval; 7776 struct init_cb_81xx *icb; 7777 struct nvram_81xx *nv; 7778 uint32_t *dptr; 7779 uint8_t *dptr1, *dptr2; 7780 uint32_t chksum; 7781 uint16_t cnt; 7782 struct qla_hw_data *ha = vha->hw; 7783 7784 rval = QLA_SUCCESS; 7785 icb = (struct init_cb_81xx *)ha->init_cb; 7786 nv = ha->nvram; 7787 7788 /* Determine NVRAM starting address. */ 7789 ha->nvram_size = sizeof(struct nvram_81xx); 7790 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7791 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 7792 ha->vpd_size = FA_VPD_SIZE_82XX; 7793 7794 /* Get VPD data into cache */ 7795 ha->vpd = ha->nvram + VPD_OFFSET; 7796 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 7797 ha->vpd_size); 7798 7799 /* Get NVRAM data into cache and calculate checksum. */ 7800 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 7801 ha->nvram_size); 7802 dptr = (uint32_t *)nv; 7803 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7804 chksum += le32_to_cpu(*dptr); 7805 7806 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 7807 "Contents of NVRAM:\n"); 7808 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 7809 (uint8_t *)nv, ha->nvram_size); 7810 7811 /* Bad NVRAM data, set defaults parameters. */ 7812 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7813 || nv->id[3] != ' ' || 7814 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7815 /* Reset NVRAM data. */ 7816 ql_log(ql_log_info, vha, 0x0073, 7817 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 7818 "version=0x%x.\n", chksum, nv->id[0], 7819 le16_to_cpu(nv->nvram_version)); 7820 ql_log(ql_log_info, vha, 0x0074, 7821 "Falling back to functioning (yet invalid -- WWPN) " 7822 "defaults.\n"); 7823 7824 /* 7825 * Set default initialization control block. 7826 */ 7827 memset(nv, 0, ha->nvram_size); 7828 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7829 nv->version = cpu_to_le16(ICB_VERSION); 7830 nv->frame_payload_size = 2048; 7831 nv->execution_throttle = cpu_to_le16(0xFFFF); 7832 nv->exchange_count = cpu_to_le16(0); 7833 nv->port_name[0] = 0x21; 7834 nv->port_name[1] = 0x00 + ha->port_no + 1; 7835 nv->port_name[2] = 0x00; 7836 nv->port_name[3] = 0xe0; 7837 nv->port_name[4] = 0x8b; 7838 nv->port_name[5] = 0x1c; 7839 nv->port_name[6] = 0x55; 7840 nv->port_name[7] = 0x86; 7841 nv->node_name[0] = 0x20; 7842 nv->node_name[1] = 0x00; 7843 nv->node_name[2] = 0x00; 7844 nv->node_name[3] = 0xe0; 7845 nv->node_name[4] = 0x8b; 7846 nv->node_name[5] = 0x1c; 7847 nv->node_name[6] = 0x55; 7848 nv->node_name[7] = 0x86; 7849 nv->login_retry_count = cpu_to_le16(8); 7850 nv->interrupt_delay_timer = cpu_to_le16(0); 7851 nv->login_timeout = cpu_to_le16(0); 7852 nv->firmware_options_1 = 7853 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7854 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7855 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7856 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7857 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7858 nv->efi_parameters = cpu_to_le32(0); 7859 nv->reset_delay = 5; 7860 nv->max_luns_per_target = cpu_to_le16(128); 7861 nv->port_down_retry_count = cpu_to_le16(30); 7862 nv->link_down_timeout = cpu_to_le16(180); 7863 nv->enode_mac[0] = 0x00; 7864 nv->enode_mac[1] = 0xC0; 7865 nv->enode_mac[2] = 0xDD; 7866 nv->enode_mac[3] = 0x04; 7867 nv->enode_mac[4] = 0x05; 7868 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 7869 7870 rval = 1; 7871 } 7872 7873 if (IS_T10_PI_CAPABLE(ha)) 7874 nv->frame_payload_size &= ~7; 7875 7876 qlt_81xx_config_nvram_stage1(vha, nv); 7877 7878 /* Reset Initialization control block */ 7879 memset(icb, 0, ha->init_cb_size); 7880 7881 /* Copy 1st segment. */ 7882 dptr1 = (uint8_t *)icb; 7883 dptr2 = (uint8_t *)&nv->version; 7884 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7885 while (cnt--) 7886 *dptr1++ = *dptr2++; 7887 7888 icb->login_retry_count = nv->login_retry_count; 7889 7890 /* Copy 2nd segment. */ 7891 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7892 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7893 cnt = (uint8_t *)&icb->reserved_5 - 7894 (uint8_t *)&icb->interrupt_delay_timer; 7895 while (cnt--) 7896 *dptr1++ = *dptr2++; 7897 7898 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 7899 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 7900 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 7901 icb->enode_mac[0] = 0x00; 7902 icb->enode_mac[1] = 0xC0; 7903 icb->enode_mac[2] = 0xDD; 7904 icb->enode_mac[3] = 0x04; 7905 icb->enode_mac[4] = 0x05; 7906 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 7907 } 7908 7909 /* Use extended-initialization control block. */ 7910 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 7911 7912 /* 7913 * Setup driver NVRAM options. 7914 */ 7915 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7916 "QLE8XXX"); 7917 7918 qlt_81xx_config_nvram_stage2(vha, icb); 7919 7920 /* Use alternate WWN? */ 7921 if (nv->host_p & cpu_to_le32(BIT_15)) { 7922 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7923 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7924 } 7925 7926 /* Prepare nodename */ 7927 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7928 /* 7929 * Firmware will apply the following mask if the nodename was 7930 * not provided. 7931 */ 7932 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7933 icb->node_name[0] &= 0xF0; 7934 } 7935 7936 /* Set host adapter parameters. */ 7937 ha->flags.disable_risc_code_load = 0; 7938 ha->flags.enable_lip_reset = 0; 7939 ha->flags.enable_lip_full_login = 7940 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7941 ha->flags.enable_target_reset = 7942 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7943 ha->flags.enable_led_scheme = 0; 7944 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7945 7946 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7947 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7948 7949 /* save HBA serial number */ 7950 ha->serial0 = icb->port_name[5]; 7951 ha->serial1 = icb->port_name[6]; 7952 ha->serial2 = icb->port_name[7]; 7953 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7954 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7955 7956 icb->execution_throttle = cpu_to_le16(0xFFFF); 7957 7958 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7959 7960 /* Set minimum login_timeout to 4 seconds. */ 7961 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7962 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7963 if (le16_to_cpu(nv->login_timeout) < 4) 7964 nv->login_timeout = cpu_to_le16(4); 7965 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7966 7967 /* Set minimum RATOV to 100 tenths of a second. */ 7968 ha->r_a_tov = 100; 7969 7970 ha->loop_reset_delay = nv->reset_delay; 7971 7972 /* Link Down Timeout = 0: 7973 * 7974 * When Port Down timer expires we will start returning 7975 * I/O's to OS with "DID_NO_CONNECT". 7976 * 7977 * Link Down Timeout != 0: 7978 * 7979 * The driver waits for the link to come up after link down 7980 * before returning I/Os to OS with "DID_NO_CONNECT". 7981 */ 7982 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7983 ha->loop_down_abort_time = 7984 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7985 } else { 7986 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7987 ha->loop_down_abort_time = 7988 (LOOP_DOWN_TIME - ha->link_down_timeout); 7989 } 7990 7991 /* Need enough time to try and get the port back. */ 7992 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7993 if (qlport_down_retry) 7994 ha->port_down_retry_count = qlport_down_retry; 7995 7996 /* Set login_retry_count */ 7997 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7998 if (ha->port_down_retry_count == 7999 le16_to_cpu(nv->port_down_retry_count) && 8000 ha->port_down_retry_count > 3) 8001 ha->login_retry_count = ha->port_down_retry_count; 8002 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8003 ha->login_retry_count = ha->port_down_retry_count; 8004 if (ql2xloginretrycount) 8005 ha->login_retry_count = ql2xloginretrycount; 8006 8007 /* if not running MSI-X we need handshaking on interrupts */ 8008 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8009 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8010 8011 /* Enable ZIO. */ 8012 if (!vha->flags.init_done) { 8013 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8014 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8015 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8016 le16_to_cpu(icb->interrupt_delay_timer): 2; 8017 } 8018 icb->firmware_options_2 &= cpu_to_le32( 8019 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8020 vha->flags.process_response_queue = 0; 8021 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8022 ha->zio_mode = QLA_ZIO_MODE_6; 8023 8024 ql_log(ql_log_info, vha, 0x0075, 8025 "ZIO mode %d enabled; timer delay (%d us).\n", 8026 ha->zio_mode, 8027 ha->zio_timer * 100); 8028 8029 icb->firmware_options_2 |= cpu_to_le32( 8030 (uint32_t)ha->zio_mode); 8031 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8032 vha->flags.process_response_queue = 1; 8033 } 8034 8035 /* enable RIDA Format2 */ 8036 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 8037 icb->firmware_options_3 |= BIT_0; 8038 8039 if (IS_QLA27XX(ha)) { 8040 icb->firmware_options_3 |= BIT_8; 8041 ql_dbg(ql_log_info, vha, 0x0075, 8042 "Enabling direct connection.\n"); 8043 } 8044 8045 if (rval) { 8046 ql_log(ql_log_warn, vha, 0x0076, 8047 "NVRAM configuration failed.\n"); 8048 } 8049 return (rval); 8050 } 8051 8052 int 8053 qla82xx_restart_isp(scsi_qla_host_t *vha) 8054 { 8055 int status, rval; 8056 struct qla_hw_data *ha = vha->hw; 8057 struct req_que *req = ha->req_q_map[0]; 8058 struct rsp_que *rsp = ha->rsp_q_map[0]; 8059 struct scsi_qla_host *vp; 8060 unsigned long flags; 8061 8062 status = qla2x00_init_rings(vha); 8063 if (!status) { 8064 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8065 ha->flags.chip_reset_done = 1; 8066 8067 status = qla2x00_fw_ready(vha); 8068 if (!status) { 8069 /* Issue a marker after FW becomes ready. */ 8070 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8071 vha->flags.online = 1; 8072 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8073 } 8074 8075 /* if no cable then assume it's good */ 8076 if ((vha->device_flags & DFLG_NO_CABLE)) 8077 status = 0; 8078 } 8079 8080 if (!status) { 8081 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8082 8083 if (!atomic_read(&vha->loop_down_timer)) { 8084 /* 8085 * Issue marker command only when we are going 8086 * to start the I/O . 8087 */ 8088 vha->marker_needed = 1; 8089 } 8090 8091 ha->isp_ops->enable_intrs(ha); 8092 8093 ha->isp_abort_cnt = 0; 8094 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8095 8096 /* Update the firmware version */ 8097 status = qla82xx_check_md_needed(vha); 8098 8099 if (ha->fce) { 8100 ha->flags.fce_enabled = 1; 8101 memset(ha->fce, 0, 8102 fce_calc_size(ha->fce_bufs)); 8103 rval = qla2x00_enable_fce_trace(vha, 8104 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8105 &ha->fce_bufs); 8106 if (rval) { 8107 ql_log(ql_log_warn, vha, 0x8001, 8108 "Unable to reinitialize FCE (%d).\n", 8109 rval); 8110 ha->flags.fce_enabled = 0; 8111 } 8112 } 8113 8114 if (ha->eft) { 8115 memset(ha->eft, 0, EFT_SIZE); 8116 rval = qla2x00_enable_eft_trace(vha, 8117 ha->eft_dma, EFT_NUM_BUFFERS); 8118 if (rval) { 8119 ql_log(ql_log_warn, vha, 0x8010, 8120 "Unable to reinitialize EFT (%d).\n", 8121 rval); 8122 } 8123 } 8124 } 8125 8126 if (!status) { 8127 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8128 "qla82xx_restart_isp succeeded.\n"); 8129 8130 spin_lock_irqsave(&ha->vport_slock, flags); 8131 list_for_each_entry(vp, &ha->vp_list, list) { 8132 if (vp->vp_idx) { 8133 atomic_inc(&vp->vref_count); 8134 spin_unlock_irqrestore(&ha->vport_slock, flags); 8135 8136 qla2x00_vp_abort_isp(vp); 8137 8138 spin_lock_irqsave(&ha->vport_slock, flags); 8139 atomic_dec(&vp->vref_count); 8140 } 8141 } 8142 spin_unlock_irqrestore(&ha->vport_slock, flags); 8143 8144 } else { 8145 ql_log(ql_log_warn, vha, 0x8016, 8146 "qla82xx_restart_isp **** FAILED ****.\n"); 8147 } 8148 8149 return status; 8150 } 8151 8152 void 8153 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8154 { 8155 struct qla_hw_data *ha = vha->hw; 8156 8157 /* Hold status IOCBs until ABTS response received. */ 8158 if (ql2xfwholdabts) 8159 ha->fw_options[3] |= BIT_12; 8160 8161 /* Set Retry FLOGI in case of P2P connection */ 8162 if (ha->operating_mode == P2P) { 8163 ha->fw_options[2] |= BIT_3; 8164 ql_dbg(ql_dbg_disc, vha, 0x2103, 8165 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8166 __func__, ha->fw_options[2]); 8167 } 8168 8169 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8170 if (ql2xmvasynctoatio) { 8171 if (qla_tgt_mode_enabled(vha) || 8172 qla_dual_mode_enabled(vha)) 8173 ha->fw_options[2] |= BIT_11; 8174 else 8175 ha->fw_options[2] &= ~BIT_11; 8176 } 8177 8178 if (qla_tgt_mode_enabled(vha) || 8179 qla_dual_mode_enabled(vha)) { 8180 /* FW auto send SCSI status during */ 8181 ha->fw_options[1] |= BIT_8; 8182 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8183 8184 /* FW perform Exchange validation */ 8185 ha->fw_options[2] |= BIT_4; 8186 } else { 8187 ha->fw_options[1] &= ~BIT_8; 8188 ha->fw_options[10] &= 0x00ff; 8189 8190 ha->fw_options[2] &= ~BIT_4; 8191 } 8192 8193 if (ql2xetsenable) { 8194 /* Enable ETS Burst. */ 8195 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8196 ha->fw_options[2] |= BIT_9; 8197 } 8198 8199 ql_dbg(ql_dbg_init, vha, 0x00e9, 8200 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8201 __func__, ha->fw_options[1], ha->fw_options[2], 8202 ha->fw_options[3], vha->host->active_mode); 8203 8204 qla2x00_set_fw_options(vha, ha->fw_options); 8205 } 8206 8207 /* 8208 * qla24xx_get_fcp_prio 8209 * Gets the fcp cmd priority value for the logged in port. 8210 * Looks for a match of the port descriptors within 8211 * each of the fcp prio config entries. If a match is found, 8212 * the tag (priority) value is returned. 8213 * 8214 * Input: 8215 * vha = scsi host structure pointer. 8216 * fcport = port structure pointer. 8217 * 8218 * Return: 8219 * non-zero (if found) 8220 * -1 (if not found) 8221 * 8222 * Context: 8223 * Kernel context 8224 */ 8225 static int 8226 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8227 { 8228 int i, entries; 8229 uint8_t pid_match, wwn_match; 8230 int priority; 8231 uint32_t pid1, pid2; 8232 uint64_t wwn1, wwn2; 8233 struct qla_fcp_prio_entry *pri_entry; 8234 struct qla_hw_data *ha = vha->hw; 8235 8236 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8237 return -1; 8238 8239 priority = -1; 8240 entries = ha->fcp_prio_cfg->num_entries; 8241 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8242 8243 for (i = 0; i < entries; i++) { 8244 pid_match = wwn_match = 0; 8245 8246 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8247 pri_entry++; 8248 continue; 8249 } 8250 8251 /* check source pid for a match */ 8252 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8253 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8254 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8255 if (pid1 == INVALID_PORT_ID) 8256 pid_match++; 8257 else if (pid1 == pid2) 8258 pid_match++; 8259 } 8260 8261 /* check destination pid for a match */ 8262 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8263 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8264 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8265 if (pid1 == INVALID_PORT_ID) 8266 pid_match++; 8267 else if (pid1 == pid2) 8268 pid_match++; 8269 } 8270 8271 /* check source WWN for a match */ 8272 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8273 wwn1 = wwn_to_u64(vha->port_name); 8274 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8275 if (wwn2 == (uint64_t)-1) 8276 wwn_match++; 8277 else if (wwn1 == wwn2) 8278 wwn_match++; 8279 } 8280 8281 /* check destination WWN for a match */ 8282 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8283 wwn1 = wwn_to_u64(fcport->port_name); 8284 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8285 if (wwn2 == (uint64_t)-1) 8286 wwn_match++; 8287 else if (wwn1 == wwn2) 8288 wwn_match++; 8289 } 8290 8291 if (pid_match == 2 || wwn_match == 2) { 8292 /* Found a matching entry */ 8293 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8294 priority = pri_entry->tag; 8295 break; 8296 } 8297 8298 pri_entry++; 8299 } 8300 8301 return priority; 8302 } 8303 8304 /* 8305 * qla24xx_update_fcport_fcp_prio 8306 * Activates fcp priority for the logged in fc port 8307 * 8308 * Input: 8309 * vha = scsi host structure pointer. 8310 * fcp = port structure pointer. 8311 * 8312 * Return: 8313 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8314 * 8315 * Context: 8316 * Kernel context. 8317 */ 8318 int 8319 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8320 { 8321 int ret; 8322 int priority; 8323 uint16_t mb[5]; 8324 8325 if (fcport->port_type != FCT_TARGET || 8326 fcport->loop_id == FC_NO_LOOP_ID) 8327 return QLA_FUNCTION_FAILED; 8328 8329 priority = qla24xx_get_fcp_prio(vha, fcport); 8330 if (priority < 0) 8331 return QLA_FUNCTION_FAILED; 8332 8333 if (IS_P3P_TYPE(vha->hw)) { 8334 fcport->fcp_prio = priority & 0xf; 8335 return QLA_SUCCESS; 8336 } 8337 8338 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8339 if (ret == QLA_SUCCESS) { 8340 if (fcport->fcp_prio != priority) 8341 ql_dbg(ql_dbg_user, vha, 0x709e, 8342 "Updated FCP_CMND priority - value=%d loop_id=%d " 8343 "port_id=%02x%02x%02x.\n", priority, 8344 fcport->loop_id, fcport->d_id.b.domain, 8345 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8346 fcport->fcp_prio = priority & 0xf; 8347 } else 8348 ql_dbg(ql_dbg_user, vha, 0x704f, 8349 "Unable to update FCP_CMND priority - ret=0x%x for " 8350 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8351 fcport->d_id.b.domain, fcport->d_id.b.area, 8352 fcport->d_id.b.al_pa); 8353 return ret; 8354 } 8355 8356 /* 8357 * qla24xx_update_all_fcp_prio 8358 * Activates fcp priority for all the logged in ports 8359 * 8360 * Input: 8361 * ha = adapter block pointer. 8362 * 8363 * Return: 8364 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8365 * 8366 * Context: 8367 * Kernel context. 8368 */ 8369 int 8370 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8371 { 8372 int ret; 8373 fc_port_t *fcport; 8374 8375 ret = QLA_FUNCTION_FAILED; 8376 /* We need to set priority for all logged in ports */ 8377 list_for_each_entry(fcport, &vha->vp_fcports, list) 8378 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8379 8380 return ret; 8381 } 8382 8383 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8384 int vp_idx, bool startqp) 8385 { 8386 int rsp_id = 0; 8387 int req_id = 0; 8388 int i; 8389 struct qla_hw_data *ha = vha->hw; 8390 uint16_t qpair_id = 0; 8391 struct qla_qpair *qpair = NULL; 8392 struct qla_msix_entry *msix; 8393 8394 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8395 ql_log(ql_log_warn, vha, 0x00181, 8396 "FW/Driver is not multi-queue capable.\n"); 8397 return NULL; 8398 } 8399 8400 if (ql2xmqsupport || ql2xnvmeenable) { 8401 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8402 if (qpair == NULL) { 8403 ql_log(ql_log_warn, vha, 0x0182, 8404 "Failed to allocate memory for queue pair.\n"); 8405 return NULL; 8406 } 8407 memset(qpair, 0, sizeof(struct qla_qpair)); 8408 8409 qpair->hw = vha->hw; 8410 qpair->vha = vha; 8411 qpair->qp_lock_ptr = &qpair->qp_lock; 8412 spin_lock_init(&qpair->qp_lock); 8413 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8414 8415 /* Assign available que pair id */ 8416 mutex_lock(&ha->mq_lock); 8417 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8418 if (ha->num_qpairs >= ha->max_qpairs) { 8419 mutex_unlock(&ha->mq_lock); 8420 ql_log(ql_log_warn, vha, 0x0183, 8421 "No resources to create additional q pair.\n"); 8422 goto fail_qid_map; 8423 } 8424 ha->num_qpairs++; 8425 set_bit(qpair_id, ha->qpair_qid_map); 8426 ha->queue_pair_map[qpair_id] = qpair; 8427 qpair->id = qpair_id; 8428 qpair->vp_idx = vp_idx; 8429 qpair->fw_started = ha->flags.fw_started; 8430 INIT_LIST_HEAD(&qpair->hints_list); 8431 qpair->chip_reset = ha->base_qpair->chip_reset; 8432 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8433 qpair->enable_explicit_conf = 8434 ha->base_qpair->enable_explicit_conf; 8435 8436 for (i = 0; i < ha->msix_count; i++) { 8437 msix = &ha->msix_entries[i]; 8438 if (msix->in_use) 8439 continue; 8440 qpair->msix = msix; 8441 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8442 "Vector %x selected for qpair\n", msix->vector); 8443 break; 8444 } 8445 if (!qpair->msix) { 8446 ql_log(ql_log_warn, vha, 0x0184, 8447 "Out of MSI-X vectors!.\n"); 8448 goto fail_msix; 8449 } 8450 8451 qpair->msix->in_use = 1; 8452 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8453 qpair->pdev = ha->pdev; 8454 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8455 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8456 8457 mutex_unlock(&ha->mq_lock); 8458 8459 /* Create response queue first */ 8460 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8461 if (!rsp_id) { 8462 ql_log(ql_log_warn, vha, 0x0185, 8463 "Failed to create response queue.\n"); 8464 goto fail_rsp; 8465 } 8466 8467 qpair->rsp = ha->rsp_q_map[rsp_id]; 8468 8469 /* Create request queue */ 8470 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8471 startqp); 8472 if (!req_id) { 8473 ql_log(ql_log_warn, vha, 0x0186, 8474 "Failed to create request queue.\n"); 8475 goto fail_req; 8476 } 8477 8478 qpair->req = ha->req_q_map[req_id]; 8479 qpair->rsp->req = qpair->req; 8480 qpair->rsp->qpair = qpair; 8481 /* init qpair to this cpu. Will adjust at run time. */ 8482 qla_cpu_update(qpair, smp_processor_id()); 8483 8484 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8485 if (ha->fw_attributes & BIT_4) 8486 qpair->difdix_supported = 1; 8487 } 8488 8489 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8490 if (!qpair->srb_mempool) { 8491 ql_log(ql_log_warn, vha, 0xd036, 8492 "Failed to create srb mempool for qpair %d\n", 8493 qpair->id); 8494 goto fail_mempool; 8495 } 8496 8497 /* Mark as online */ 8498 qpair->online = 1; 8499 8500 if (!vha->flags.qpairs_available) 8501 vha->flags.qpairs_available = 1; 8502 8503 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8504 "Request/Response queue pair created, id %d\n", 8505 qpair->id); 8506 ql_dbg(ql_dbg_init, vha, 0x0187, 8507 "Request/Response queue pair created, id %d\n", 8508 qpair->id); 8509 } 8510 return qpair; 8511 8512 fail_mempool: 8513 fail_req: 8514 qla25xx_delete_rsp_que(vha, qpair->rsp); 8515 fail_rsp: 8516 mutex_lock(&ha->mq_lock); 8517 qpair->msix->in_use = 0; 8518 list_del(&qpair->qp_list_elem); 8519 if (list_empty(&vha->qp_list)) 8520 vha->flags.qpairs_available = 0; 8521 fail_msix: 8522 ha->queue_pair_map[qpair_id] = NULL; 8523 clear_bit(qpair_id, ha->qpair_qid_map); 8524 ha->num_qpairs--; 8525 mutex_unlock(&ha->mq_lock); 8526 fail_qid_map: 8527 kfree(qpair); 8528 return NULL; 8529 } 8530 8531 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8532 { 8533 int ret = QLA_FUNCTION_FAILED; 8534 struct qla_hw_data *ha = qpair->hw; 8535 8536 qpair->delete_in_progress = 1; 8537 while (atomic_read(&qpair->ref_count)) 8538 msleep(500); 8539 8540 ret = qla25xx_delete_req_que(vha, qpair->req); 8541 if (ret != QLA_SUCCESS) 8542 goto fail; 8543 8544 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8545 if (ret != QLA_SUCCESS) 8546 goto fail; 8547 8548 mutex_lock(&ha->mq_lock); 8549 ha->queue_pair_map[qpair->id] = NULL; 8550 clear_bit(qpair->id, ha->qpair_qid_map); 8551 ha->num_qpairs--; 8552 list_del(&qpair->qp_list_elem); 8553 if (list_empty(&vha->qp_list)) { 8554 vha->flags.qpairs_available = 0; 8555 vha->flags.qpairs_req_created = 0; 8556 vha->flags.qpairs_rsp_created = 0; 8557 } 8558 mempool_destroy(qpair->srb_mempool); 8559 kfree(qpair); 8560 mutex_unlock(&ha->mq_lock); 8561 8562 return QLA_SUCCESS; 8563 fail: 8564 return ret; 8565 } 8566