1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); 34 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, 35 uint16_t *); 36 37 static int qla2x00_restart_isp(scsi_qla_host_t *); 38 39 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 40 static int qla84xx_init_chip(scsi_qla_host_t *); 41 static int qla25xx_init_queues(struct qla_hw_data *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(unsigned long __data) 47 { 48 srb_t *sp = (srb_t *)__data; 49 struct srb_iocb *iocb; 50 fc_port_t *fcport = sp->fcport; 51 struct qla_hw_data *ha = fcport->vha->hw; 52 struct req_que *req; 53 unsigned long flags; 54 55 spin_lock_irqsave(&ha->hardware_lock, flags); 56 req = ha->req_q_map[0]; 57 req->outstanding_cmds[sp->handle] = NULL; 58 iocb = &sp->u.iocb_cmd; 59 iocb->timeout(sp); 60 sp->free(fcport->vha, sp); 61 spin_unlock_irqrestore(&ha->hardware_lock, flags); 62 } 63 64 void 65 qla2x00_sp_free(void *data, void *ptr) 66 { 67 srb_t *sp = (srb_t *)ptr; 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 69 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 70 71 del_timer(&iocb->timer); 72 qla2x00_rel_sp(vha, sp); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (IS_QLAFX00(ha)) { 86 tmo = FX00_DEF_RATOV * 2; 87 } else if (!IS_FWI2_CAPABLE(ha)) { 88 /* 89 * Except for earlier ISPs where the timeout is seeded from the 90 * initialization control block. 91 */ 92 tmo = ha->login_timeout; 93 } 94 return tmo; 95 } 96 97 static void 98 qla2x00_async_iocb_timeout(void *data) 99 { 100 srb_t *sp = (srb_t *)data; 101 fc_port_t *fcport = sp->fcport; 102 103 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 104 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n", 105 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area, 106 fcport->d_id.b.al_pa); 107 108 fcport->flags &= ~FCF_ASYNC_SENT; 109 if (sp->type == SRB_LOGIN_CMD) { 110 struct srb_iocb *lio = &sp->u.iocb_cmd; 111 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); 112 /* Retry as needed. */ 113 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 114 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 115 QLA_LOGIO_LOGIN_RETRIED : 0; 116 qla2x00_post_async_login_done_work(fcport->vha, fcport, 117 lio->u.logio.data); 118 } else if (sp->type == SRB_LOGOUT_CMD) { 119 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT); 120 } 121 } 122 123 static void 124 qla2x00_async_login_sp_done(void *data, void *ptr, int res) 125 { 126 srb_t *sp = (srb_t *)ptr; 127 struct srb_iocb *lio = &sp->u.iocb_cmd; 128 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 129 130 if (!test_bit(UNLOADING, &vha->dpc_flags)) 131 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, 132 lio->u.logio.data); 133 sp->free(sp->fcport->vha, sp); 134 } 135 136 int 137 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 138 uint16_t *data) 139 { 140 srb_t *sp; 141 struct srb_iocb *lio; 142 int rval; 143 144 rval = QLA_FUNCTION_FAILED; 145 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 146 if (!sp) 147 goto done; 148 149 sp->type = SRB_LOGIN_CMD; 150 sp->name = "login"; 151 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 152 153 lio = &sp->u.iocb_cmd; 154 lio->timeout = qla2x00_async_iocb_timeout; 155 sp->done = qla2x00_async_login_sp_done; 156 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 157 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 158 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 159 rval = qla2x00_start_sp(sp); 160 if (rval != QLA_SUCCESS) 161 goto done_free_sp; 162 163 ql_dbg(ql_dbg_disc, vha, 0x2072, 164 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x " 165 "retries=%d.\n", sp->handle, fcport->loop_id, 166 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 167 fcport->login_retry); 168 return rval; 169 170 done_free_sp: 171 sp->free(fcport->vha, sp); 172 done: 173 return rval; 174 } 175 176 static void 177 qla2x00_async_logout_sp_done(void *data, void *ptr, int res) 178 { 179 srb_t *sp = (srb_t *)ptr; 180 struct srb_iocb *lio = &sp->u.iocb_cmd; 181 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 182 183 if (!test_bit(UNLOADING, &vha->dpc_flags)) 184 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, 185 lio->u.logio.data); 186 sp->free(sp->fcport->vha, sp); 187 } 188 189 int 190 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 191 { 192 srb_t *sp; 193 struct srb_iocb *lio; 194 int rval; 195 196 rval = QLA_FUNCTION_FAILED; 197 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 198 if (!sp) 199 goto done; 200 201 sp->type = SRB_LOGOUT_CMD; 202 sp->name = "logout"; 203 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 204 205 lio = &sp->u.iocb_cmd; 206 lio->timeout = qla2x00_async_iocb_timeout; 207 sp->done = qla2x00_async_logout_sp_done; 208 rval = qla2x00_start_sp(sp); 209 if (rval != QLA_SUCCESS) 210 goto done_free_sp; 211 212 ql_dbg(ql_dbg_disc, vha, 0x2070, 213 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 214 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 215 fcport->d_id.b.area, fcport->d_id.b.al_pa); 216 return rval; 217 218 done_free_sp: 219 sp->free(fcport->vha, sp); 220 done: 221 return rval; 222 } 223 224 static void 225 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res) 226 { 227 srb_t *sp = (srb_t *)ptr; 228 struct srb_iocb *lio = &sp->u.iocb_cmd; 229 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 230 231 if (!test_bit(UNLOADING, &vha->dpc_flags)) 232 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, 233 lio->u.logio.data); 234 sp->free(sp->fcport->vha, sp); 235 } 236 237 int 238 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 239 uint16_t *data) 240 { 241 srb_t *sp; 242 struct srb_iocb *lio; 243 int rval; 244 245 rval = QLA_FUNCTION_FAILED; 246 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 247 if (!sp) 248 goto done; 249 250 sp->type = SRB_ADISC_CMD; 251 sp->name = "adisc"; 252 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 253 254 lio = &sp->u.iocb_cmd; 255 lio->timeout = qla2x00_async_iocb_timeout; 256 sp->done = qla2x00_async_adisc_sp_done; 257 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 258 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 259 rval = qla2x00_start_sp(sp); 260 if (rval != QLA_SUCCESS) 261 goto done_free_sp; 262 263 ql_dbg(ql_dbg_disc, vha, 0x206f, 264 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", 265 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 266 fcport->d_id.b.area, fcport->d_id.b.al_pa); 267 return rval; 268 269 done_free_sp: 270 sp->free(fcport->vha, sp); 271 done: 272 return rval; 273 } 274 275 static void 276 qla2x00_tmf_iocb_timeout(void *data) 277 { 278 srb_t *sp = (srb_t *)data; 279 struct srb_iocb *tmf = &sp->u.iocb_cmd; 280 281 tmf->u.tmf.comp_status = CS_TIMEOUT; 282 complete(&tmf->u.tmf.comp); 283 } 284 285 static void 286 qla2x00_tmf_sp_done(void *data, void *ptr, int res) 287 { 288 srb_t *sp = (srb_t *)ptr; 289 struct srb_iocb *tmf = &sp->u.iocb_cmd; 290 complete(&tmf->u.tmf.comp); 291 } 292 293 int 294 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 295 uint32_t tag) 296 { 297 struct scsi_qla_host *vha = fcport->vha; 298 struct srb_iocb *tm_iocb; 299 srb_t *sp; 300 int rval = QLA_FUNCTION_FAILED; 301 302 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 303 if (!sp) 304 goto done; 305 306 tm_iocb = &sp->u.iocb_cmd; 307 sp->type = SRB_TM_CMD; 308 sp->name = "tmf"; 309 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 310 tm_iocb->u.tmf.flags = flags; 311 tm_iocb->u.tmf.lun = lun; 312 tm_iocb->u.tmf.data = tag; 313 sp->done = qla2x00_tmf_sp_done; 314 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 315 init_completion(&tm_iocb->u.tmf.comp); 316 317 rval = qla2x00_start_sp(sp); 318 if (rval != QLA_SUCCESS) 319 goto done_free_sp; 320 321 ql_dbg(ql_dbg_taskm, vha, 0x802f, 322 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 323 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 324 fcport->d_id.b.area, fcport->d_id.b.al_pa); 325 326 wait_for_completion(&tm_iocb->u.tmf.comp); 327 328 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 329 QLA_SUCCESS : QLA_FUNCTION_FAILED; 330 331 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) { 332 ql_dbg(ql_dbg_taskm, vha, 0x8030, 333 "TM IOCB failed (%x).\n", rval); 334 } 335 336 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 337 flags = tm_iocb->u.tmf.flags; 338 lun = (uint16_t)tm_iocb->u.tmf.lun; 339 340 /* Issue Marker IOCB */ 341 qla2x00_marker(vha, vha->hw->req_q_map[0], 342 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 343 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 344 } 345 346 done_free_sp: 347 sp->free(vha, sp); 348 done: 349 return rval; 350 } 351 352 static void 353 qla24xx_abort_iocb_timeout(void *data) 354 { 355 srb_t *sp = (srb_t *)data; 356 struct srb_iocb *abt = &sp->u.iocb_cmd; 357 358 abt->u.abt.comp_status = CS_TIMEOUT; 359 complete(&abt->u.abt.comp); 360 } 361 362 static void 363 qla24xx_abort_sp_done(void *data, void *ptr, int res) 364 { 365 srb_t *sp = (srb_t *)ptr; 366 struct srb_iocb *abt = &sp->u.iocb_cmd; 367 368 complete(&abt->u.abt.comp); 369 } 370 371 static int 372 qla24xx_async_abort_cmd(srb_t *cmd_sp) 373 { 374 scsi_qla_host_t *vha = cmd_sp->fcport->vha; 375 fc_port_t *fcport = cmd_sp->fcport; 376 struct srb_iocb *abt_iocb; 377 srb_t *sp; 378 int rval = QLA_FUNCTION_FAILED; 379 380 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 381 if (!sp) 382 goto done; 383 384 abt_iocb = &sp->u.iocb_cmd; 385 sp->type = SRB_ABT_CMD; 386 sp->name = "abort"; 387 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 388 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 389 sp->done = qla24xx_abort_sp_done; 390 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 391 init_completion(&abt_iocb->u.abt.comp); 392 393 rval = qla2x00_start_sp(sp); 394 if (rval != QLA_SUCCESS) 395 goto done_free_sp; 396 397 ql_dbg(ql_dbg_async, vha, 0x507c, 398 "Abort command issued - hdl=%x, target_id=%x\n", 399 cmd_sp->handle, fcport->tgt_id); 400 401 wait_for_completion(&abt_iocb->u.abt.comp); 402 403 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 404 QLA_SUCCESS : QLA_FUNCTION_FAILED; 405 406 done_free_sp: 407 sp->free(vha, sp); 408 done: 409 return rval; 410 } 411 412 int 413 qla24xx_async_abort_command(srb_t *sp) 414 { 415 unsigned long flags = 0; 416 417 uint32_t handle; 418 fc_port_t *fcport = sp->fcport; 419 struct scsi_qla_host *vha = fcport->vha; 420 struct qla_hw_data *ha = vha->hw; 421 struct req_que *req = vha->req; 422 423 spin_lock_irqsave(&ha->hardware_lock, flags); 424 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 425 if (req->outstanding_cmds[handle] == sp) 426 break; 427 } 428 spin_unlock_irqrestore(&ha->hardware_lock, flags); 429 if (handle == req->num_outstanding_cmds) { 430 /* Command not found. */ 431 return QLA_FUNCTION_FAILED; 432 } 433 if (sp->type == SRB_FXIOCB_DCMD) 434 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 435 FXDISC_ABORT_IOCTL); 436 437 return qla24xx_async_abort_cmd(sp); 438 } 439 440 void 441 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, 442 uint16_t *data) 443 { 444 int rval; 445 446 switch (data[0]) { 447 case MBS_COMMAND_COMPLETE: 448 /* 449 * Driver must validate login state - If PRLI not complete, 450 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 451 * requests. 452 */ 453 rval = qla2x00_get_port_database(vha, fcport, 0); 454 if (rval == QLA_NOT_LOGGED_IN) { 455 fcport->flags &= ~FCF_ASYNC_SENT; 456 fcport->flags |= FCF_LOGIN_NEEDED; 457 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 458 break; 459 } 460 461 if (rval != QLA_SUCCESS) { 462 qla2x00_post_async_logout_work(vha, fcport, NULL); 463 qla2x00_post_async_login_work(vha, fcport, NULL); 464 break; 465 } 466 if (fcport->flags & FCF_FCP2_DEVICE) { 467 qla2x00_post_async_adisc_work(vha, fcport, data); 468 break; 469 } 470 qla2x00_update_fcport(vha, fcport); 471 break; 472 case MBS_COMMAND_ERROR: 473 fcport->flags &= ~FCF_ASYNC_SENT; 474 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 475 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 476 else 477 qla2x00_mark_device_lost(vha, fcport, 1, 0); 478 break; 479 case MBS_PORT_ID_USED: 480 fcport->loop_id = data[1]; 481 qla2x00_post_async_logout_work(vha, fcport, NULL); 482 qla2x00_post_async_login_work(vha, fcport, NULL); 483 break; 484 case MBS_LOOP_ID_USED: 485 fcport->loop_id++; 486 rval = qla2x00_find_new_loop_id(vha, fcport); 487 if (rval != QLA_SUCCESS) { 488 fcport->flags &= ~FCF_ASYNC_SENT; 489 qla2x00_mark_device_lost(vha, fcport, 1, 0); 490 break; 491 } 492 qla2x00_post_async_login_work(vha, fcport, NULL); 493 break; 494 } 495 return; 496 } 497 498 void 499 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 500 uint16_t *data) 501 { 502 /* Don't re-login in target mode */ 503 if (!fcport->tgt_session) 504 qla2x00_mark_device_lost(vha, fcport, 1, 0); 505 qlt_logo_completion_handler(fcport, data[0]); 506 return; 507 } 508 509 void 510 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 511 uint16_t *data) 512 { 513 if (data[0] == MBS_COMMAND_COMPLETE) { 514 qla2x00_update_fcport(vha, fcport); 515 516 return; 517 } 518 519 /* Retry login. */ 520 fcport->flags &= ~FCF_ASYNC_SENT; 521 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 522 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 523 else 524 qla2x00_mark_device_lost(vha, fcport, 1, 0); 525 526 return; 527 } 528 529 /****************************************************************************/ 530 /* QLogic ISP2x00 Hardware Support Functions. */ 531 /****************************************************************************/ 532 533 static int 534 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 535 { 536 int rval = QLA_SUCCESS; 537 struct qla_hw_data *ha = vha->hw; 538 uint32_t idc_major_ver, idc_minor_ver; 539 uint16_t config[4]; 540 541 qla83xx_idc_lock(vha, 0); 542 543 /* SV: TODO: Assign initialization timeout from 544 * flash-info / other param 545 */ 546 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 547 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 548 549 /* Set our fcoe function presence */ 550 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 551 ql_dbg(ql_dbg_p3p, vha, 0xb077, 552 "Error while setting DRV-Presence.\n"); 553 rval = QLA_FUNCTION_FAILED; 554 goto exit; 555 } 556 557 /* Decide the reset ownership */ 558 qla83xx_reset_ownership(vha); 559 560 /* 561 * On first protocol driver load: 562 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 563 * register. 564 * Others: Check compatibility with current IDC Major version. 565 */ 566 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 567 if (ha->flags.nic_core_reset_owner) { 568 /* Set IDC Major version */ 569 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 570 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 571 572 /* Clearing IDC-Lock-Recovery register */ 573 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 574 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 575 /* 576 * Clear further IDC participation if we are not compatible with 577 * the current IDC Major Version. 578 */ 579 ql_log(ql_log_warn, vha, 0xb07d, 580 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 581 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 582 __qla83xx_clear_drv_presence(vha); 583 rval = QLA_FUNCTION_FAILED; 584 goto exit; 585 } 586 /* Each function sets its supported Minor version. */ 587 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 588 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 589 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 590 591 if (ha->flags.nic_core_reset_owner) { 592 memset(config, 0, sizeof(config)); 593 if (!qla81xx_get_port_config(vha, config)) 594 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 595 QLA8XXX_DEV_READY); 596 } 597 598 rval = qla83xx_idc_state_handler(vha); 599 600 exit: 601 qla83xx_idc_unlock(vha, 0); 602 603 return rval; 604 } 605 606 /* 607 * qla2x00_initialize_adapter 608 * Initialize board. 609 * 610 * Input: 611 * ha = adapter block pointer. 612 * 613 * Returns: 614 * 0 = success 615 */ 616 int 617 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 618 { 619 int rval; 620 struct qla_hw_data *ha = vha->hw; 621 struct req_que *req = ha->req_q_map[0]; 622 623 /* Clear adapter flags. */ 624 vha->flags.online = 0; 625 ha->flags.chip_reset_done = 0; 626 vha->flags.reset_active = 0; 627 ha->flags.pci_channel_io_perm_failure = 0; 628 ha->flags.eeh_busy = 0; 629 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 630 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 631 atomic_set(&vha->loop_state, LOOP_DOWN); 632 vha->device_flags = DFLG_NO_CABLE; 633 vha->dpc_flags = 0; 634 vha->flags.management_server_logged_in = 0; 635 vha->marker_needed = 0; 636 ha->isp_abort_cnt = 0; 637 ha->beacon_blink_led = 0; 638 639 set_bit(0, ha->req_qid_map); 640 set_bit(0, ha->rsp_qid_map); 641 642 ql_dbg(ql_dbg_init, vha, 0x0040, 643 "Configuring PCI space...\n"); 644 rval = ha->isp_ops->pci_config(vha); 645 if (rval) { 646 ql_log(ql_log_warn, vha, 0x0044, 647 "Unable to configure PCI space.\n"); 648 return (rval); 649 } 650 651 ha->isp_ops->reset_chip(vha); 652 653 rval = qla2xxx_get_flash_info(vha); 654 if (rval) { 655 ql_log(ql_log_fatal, vha, 0x004f, 656 "Unable to validate FLASH data.\n"); 657 return rval; 658 } 659 660 if (IS_QLA8044(ha)) { 661 qla8044_read_reset_template(vha); 662 663 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 664 * If DONRESET_BIT0 is set, drivers should not set dev_state 665 * to NEED_RESET. But if NEED_RESET is set, drivers should 666 * should honor the reset. */ 667 if (ql2xdontresethba == 1) 668 qla8044_set_idc_dontreset(vha); 669 } 670 671 ha->isp_ops->get_flash_version(vha, req->ring); 672 ql_dbg(ql_dbg_init, vha, 0x0061, 673 "Configure NVRAM parameters...\n"); 674 675 ha->isp_ops->nvram_config(vha); 676 677 if (ha->flags.disable_serdes) { 678 /* Mask HBA via NVRAM settings? */ 679 ql_log(ql_log_info, vha, 0x0077, 680 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 681 return QLA_FUNCTION_FAILED; 682 } 683 684 ql_dbg(ql_dbg_init, vha, 0x0078, 685 "Verifying loaded RISC code...\n"); 686 687 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 688 rval = ha->isp_ops->chip_diag(vha); 689 if (rval) 690 return (rval); 691 rval = qla2x00_setup_chip(vha); 692 if (rval) 693 return (rval); 694 } 695 696 if (IS_QLA84XX(ha)) { 697 ha->cs84xx = qla84xx_get_chip(vha); 698 if (!ha->cs84xx) { 699 ql_log(ql_log_warn, vha, 0x00d0, 700 "Unable to configure ISP84XX.\n"); 701 return QLA_FUNCTION_FAILED; 702 } 703 } 704 705 if (qla_ini_mode_enabled(vha)) 706 rval = qla2x00_init_rings(vha); 707 708 ha->flags.chip_reset_done = 1; 709 710 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 711 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 712 rval = qla84xx_init_chip(vha); 713 if (rval != QLA_SUCCESS) { 714 ql_log(ql_log_warn, vha, 0x00d4, 715 "Unable to initialize ISP84XX.\n"); 716 qla84xx_put_chip(vha); 717 } 718 } 719 720 /* Load the NIC Core f/w if we are the first protocol driver. */ 721 if (IS_QLA8031(ha)) { 722 rval = qla83xx_nic_core_fw_load(vha); 723 if (rval) 724 ql_log(ql_log_warn, vha, 0x0124, 725 "Error in initializing NIC Core f/w.\n"); 726 } 727 728 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 729 qla24xx_read_fcp_prio_cfg(vha); 730 731 if (IS_P3P_TYPE(ha)) 732 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 733 else 734 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 735 736 return (rval); 737 } 738 739 /** 740 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 741 * @ha: HA context 742 * 743 * Returns 0 on success. 744 */ 745 int 746 qla2100_pci_config(scsi_qla_host_t *vha) 747 { 748 uint16_t w; 749 unsigned long flags; 750 struct qla_hw_data *ha = vha->hw; 751 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 752 753 pci_set_master(ha->pdev); 754 pci_try_set_mwi(ha->pdev); 755 756 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 757 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 758 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 759 760 pci_disable_rom(ha->pdev); 761 762 /* Get PCI bus information. */ 763 spin_lock_irqsave(&ha->hardware_lock, flags); 764 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 765 spin_unlock_irqrestore(&ha->hardware_lock, flags); 766 767 return QLA_SUCCESS; 768 } 769 770 /** 771 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 772 * @ha: HA context 773 * 774 * Returns 0 on success. 775 */ 776 int 777 qla2300_pci_config(scsi_qla_host_t *vha) 778 { 779 uint16_t w; 780 unsigned long flags = 0; 781 uint32_t cnt; 782 struct qla_hw_data *ha = vha->hw; 783 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 784 785 pci_set_master(ha->pdev); 786 pci_try_set_mwi(ha->pdev); 787 788 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 789 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 790 791 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 792 w &= ~PCI_COMMAND_INTX_DISABLE; 793 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 794 795 /* 796 * If this is a 2300 card and not 2312, reset the 797 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 798 * the 2310 also reports itself as a 2300 so we need to get the 799 * fb revision level -- a 6 indicates it really is a 2300 and 800 * not a 2310. 801 */ 802 if (IS_QLA2300(ha)) { 803 spin_lock_irqsave(&ha->hardware_lock, flags); 804 805 /* Pause RISC. */ 806 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 807 for (cnt = 0; cnt < 30000; cnt++) { 808 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 809 break; 810 811 udelay(10); 812 } 813 814 /* Select FPM registers. */ 815 WRT_REG_WORD(®->ctrl_status, 0x20); 816 RD_REG_WORD(®->ctrl_status); 817 818 /* Get the fb rev level */ 819 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 820 821 if (ha->fb_rev == FPM_2300) 822 pci_clear_mwi(ha->pdev); 823 824 /* Deselect FPM registers. */ 825 WRT_REG_WORD(®->ctrl_status, 0x0); 826 RD_REG_WORD(®->ctrl_status); 827 828 /* Release RISC module. */ 829 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 830 for (cnt = 0; cnt < 30000; cnt++) { 831 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 832 break; 833 834 udelay(10); 835 } 836 837 spin_unlock_irqrestore(&ha->hardware_lock, flags); 838 } 839 840 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 841 842 pci_disable_rom(ha->pdev); 843 844 /* Get PCI bus information. */ 845 spin_lock_irqsave(&ha->hardware_lock, flags); 846 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 847 spin_unlock_irqrestore(&ha->hardware_lock, flags); 848 849 return QLA_SUCCESS; 850 } 851 852 /** 853 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 854 * @ha: HA context 855 * 856 * Returns 0 on success. 857 */ 858 int 859 qla24xx_pci_config(scsi_qla_host_t *vha) 860 { 861 uint16_t w; 862 unsigned long flags = 0; 863 struct qla_hw_data *ha = vha->hw; 864 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 865 866 pci_set_master(ha->pdev); 867 pci_try_set_mwi(ha->pdev); 868 869 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 870 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 871 w &= ~PCI_COMMAND_INTX_DISABLE; 872 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 873 874 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 875 876 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 877 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 878 pcix_set_mmrbc(ha->pdev, 2048); 879 880 /* PCIe -- adjust Maximum Read Request Size (2048). */ 881 if (pci_is_pcie(ha->pdev)) 882 pcie_set_readrq(ha->pdev, 4096); 883 884 pci_disable_rom(ha->pdev); 885 886 ha->chip_revision = ha->pdev->revision; 887 888 /* Get PCI bus information. */ 889 spin_lock_irqsave(&ha->hardware_lock, flags); 890 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 891 spin_unlock_irqrestore(&ha->hardware_lock, flags); 892 893 return QLA_SUCCESS; 894 } 895 896 /** 897 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 898 * @ha: HA context 899 * 900 * Returns 0 on success. 901 */ 902 int 903 qla25xx_pci_config(scsi_qla_host_t *vha) 904 { 905 uint16_t w; 906 struct qla_hw_data *ha = vha->hw; 907 908 pci_set_master(ha->pdev); 909 pci_try_set_mwi(ha->pdev); 910 911 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 912 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 913 w &= ~PCI_COMMAND_INTX_DISABLE; 914 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 915 916 /* PCIe -- adjust Maximum Read Request Size (2048). */ 917 if (pci_is_pcie(ha->pdev)) 918 pcie_set_readrq(ha->pdev, 4096); 919 920 pci_disable_rom(ha->pdev); 921 922 ha->chip_revision = ha->pdev->revision; 923 924 return QLA_SUCCESS; 925 } 926 927 /** 928 * qla2x00_isp_firmware() - Choose firmware image. 929 * @ha: HA context 930 * 931 * Returns 0 on success. 932 */ 933 static int 934 qla2x00_isp_firmware(scsi_qla_host_t *vha) 935 { 936 int rval; 937 uint16_t loop_id, topo, sw_cap; 938 uint8_t domain, area, al_pa; 939 struct qla_hw_data *ha = vha->hw; 940 941 /* Assume loading risc code */ 942 rval = QLA_FUNCTION_FAILED; 943 944 if (ha->flags.disable_risc_code_load) { 945 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 946 947 /* Verify checksum of loaded RISC code. */ 948 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 949 if (rval == QLA_SUCCESS) { 950 /* And, verify we are not in ROM code. */ 951 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 952 &area, &domain, &topo, &sw_cap); 953 } 954 } 955 956 if (rval) 957 ql_dbg(ql_dbg_init, vha, 0x007a, 958 "**** Load RISC code ****.\n"); 959 960 return (rval); 961 } 962 963 /** 964 * qla2x00_reset_chip() - Reset ISP chip. 965 * @ha: HA context 966 * 967 * Returns 0 on success. 968 */ 969 void 970 qla2x00_reset_chip(scsi_qla_host_t *vha) 971 { 972 unsigned long flags = 0; 973 struct qla_hw_data *ha = vha->hw; 974 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 975 uint32_t cnt; 976 uint16_t cmd; 977 978 if (unlikely(pci_channel_offline(ha->pdev))) 979 return; 980 981 ha->isp_ops->disable_intrs(ha); 982 983 spin_lock_irqsave(&ha->hardware_lock, flags); 984 985 /* Turn off master enable */ 986 cmd = 0; 987 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 988 cmd &= ~PCI_COMMAND_MASTER; 989 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 990 991 if (!IS_QLA2100(ha)) { 992 /* Pause RISC. */ 993 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 994 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 995 for (cnt = 0; cnt < 30000; cnt++) { 996 if ((RD_REG_WORD(®->hccr) & 997 HCCR_RISC_PAUSE) != 0) 998 break; 999 udelay(100); 1000 } 1001 } else { 1002 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1003 udelay(10); 1004 } 1005 1006 /* Select FPM registers. */ 1007 WRT_REG_WORD(®->ctrl_status, 0x20); 1008 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1009 1010 /* FPM Soft Reset. */ 1011 WRT_REG_WORD(®->fpm_diag_config, 0x100); 1012 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 1013 1014 /* Toggle Fpm Reset. */ 1015 if (!IS_QLA2200(ha)) { 1016 WRT_REG_WORD(®->fpm_diag_config, 0x0); 1017 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 1018 } 1019 1020 /* Select frame buffer registers. */ 1021 WRT_REG_WORD(®->ctrl_status, 0x10); 1022 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1023 1024 /* Reset frame buffer FIFOs. */ 1025 if (IS_QLA2200(ha)) { 1026 WRT_FB_CMD_REG(ha, reg, 0xa000); 1027 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 1028 } else { 1029 WRT_FB_CMD_REG(ha, reg, 0x00fc); 1030 1031 /* Read back fb_cmd until zero or 3 seconds max */ 1032 for (cnt = 0; cnt < 3000; cnt++) { 1033 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 1034 break; 1035 udelay(100); 1036 } 1037 } 1038 1039 /* Select RISC module registers. */ 1040 WRT_REG_WORD(®->ctrl_status, 0); 1041 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1042 1043 /* Reset RISC processor. */ 1044 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1045 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1046 1047 /* Release RISC processor. */ 1048 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1049 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1050 } 1051 1052 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 1053 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 1054 1055 /* Reset ISP chip. */ 1056 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1057 1058 /* Wait for RISC to recover from reset. */ 1059 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1060 /* 1061 * It is necessary to for a delay here since the card doesn't 1062 * respond to PCI reads during a reset. On some architectures 1063 * this will result in an MCA. 1064 */ 1065 udelay(20); 1066 for (cnt = 30000; cnt; cnt--) { 1067 if ((RD_REG_WORD(®->ctrl_status) & 1068 CSR_ISP_SOFT_RESET) == 0) 1069 break; 1070 udelay(100); 1071 } 1072 } else 1073 udelay(10); 1074 1075 /* Reset RISC processor. */ 1076 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1077 1078 WRT_REG_WORD(®->semaphore, 0); 1079 1080 /* Release RISC processor. */ 1081 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1082 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1083 1084 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1085 for (cnt = 0; cnt < 30000; cnt++) { 1086 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 1087 break; 1088 1089 udelay(100); 1090 } 1091 } else 1092 udelay(100); 1093 1094 /* Turn on master enable */ 1095 cmd |= PCI_COMMAND_MASTER; 1096 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 1097 1098 /* Disable RISC pause on FPM parity error. */ 1099 if (!IS_QLA2100(ha)) { 1100 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 1101 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1102 } 1103 1104 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1105 } 1106 1107 /** 1108 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 1109 * 1110 * Returns 0 on success. 1111 */ 1112 static int 1113 qla81xx_reset_mpi(scsi_qla_host_t *vha) 1114 { 1115 uint16_t mb[4] = {0x1010, 0, 1, 0}; 1116 1117 if (!IS_QLA81XX(vha->hw)) 1118 return QLA_SUCCESS; 1119 1120 return qla81xx_write_mpi_register(vha, mb); 1121 } 1122 1123 /** 1124 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 1125 * @ha: HA context 1126 * 1127 * Returns 0 on success. 1128 */ 1129 static inline int 1130 qla24xx_reset_risc(scsi_qla_host_t *vha) 1131 { 1132 unsigned long flags = 0; 1133 struct qla_hw_data *ha = vha->hw; 1134 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1135 uint32_t cnt; 1136 uint16_t wd; 1137 static int abts_cnt; /* ISP abort retry counts */ 1138 int rval = QLA_SUCCESS; 1139 1140 spin_lock_irqsave(&ha->hardware_lock, flags); 1141 1142 /* Reset RISC. */ 1143 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1144 for (cnt = 0; cnt < 30000; cnt++) { 1145 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 1146 break; 1147 1148 udelay(10); 1149 } 1150 1151 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 1152 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 1153 1154 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 1155 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 1156 RD_REG_DWORD(®->hccr), 1157 RD_REG_DWORD(®->ctrl_status), 1158 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 1159 1160 WRT_REG_DWORD(®->ctrl_status, 1161 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1162 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 1163 1164 udelay(100); 1165 1166 /* Wait for firmware to complete NVRAM accesses. */ 1167 RD_REG_WORD(®->mailbox0); 1168 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 1169 rval == QLA_SUCCESS; cnt--) { 1170 barrier(); 1171 if (cnt) 1172 udelay(5); 1173 else 1174 rval = QLA_FUNCTION_TIMEOUT; 1175 } 1176 1177 if (rval == QLA_SUCCESS) 1178 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 1179 1180 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 1181 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 1182 RD_REG_DWORD(®->hccr), 1183 RD_REG_DWORD(®->mailbox0)); 1184 1185 /* Wait for soft-reset to complete. */ 1186 RD_REG_DWORD(®->ctrl_status); 1187 for (cnt = 0; cnt < 6000000; cnt++) { 1188 barrier(); 1189 if ((RD_REG_DWORD(®->ctrl_status) & 1190 CSRX_ISP_SOFT_RESET) == 0) 1191 break; 1192 1193 udelay(5); 1194 } 1195 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 1196 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 1197 1198 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 1199 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 1200 RD_REG_DWORD(®->hccr), 1201 RD_REG_DWORD(®->ctrl_status)); 1202 1203 /* If required, do an MPI FW reset now */ 1204 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 1205 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 1206 if (++abts_cnt < 5) { 1207 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1208 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 1209 } else { 1210 /* 1211 * We exhausted the ISP abort retries. We have to 1212 * set the board offline. 1213 */ 1214 abts_cnt = 0; 1215 vha->flags.online = 0; 1216 } 1217 } 1218 } 1219 1220 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 1221 RD_REG_DWORD(®->hccr); 1222 1223 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 1224 RD_REG_DWORD(®->hccr); 1225 1226 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 1227 RD_REG_DWORD(®->hccr); 1228 1229 RD_REG_WORD(®->mailbox0); 1230 for (cnt = 6000000; RD_REG_WORD(®->mailbox0) != 0 && 1231 rval == QLA_SUCCESS; cnt--) { 1232 barrier(); 1233 if (cnt) 1234 udelay(5); 1235 else 1236 rval = QLA_FUNCTION_TIMEOUT; 1237 } 1238 if (rval == QLA_SUCCESS) 1239 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 1240 1241 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 1242 "Host Risc 0x%x, mailbox0 0x%x\n", 1243 RD_REG_DWORD(®->hccr), 1244 RD_REG_WORD(®->mailbox0)); 1245 1246 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1247 1248 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 1249 "Driver in %s mode\n", 1250 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 1251 1252 if (IS_NOPOLLING_TYPE(ha)) 1253 ha->isp_ops->enable_intrs(ha); 1254 1255 return rval; 1256 } 1257 1258 static void 1259 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 1260 { 1261 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 1262 1263 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 1264 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 1265 1266 } 1267 1268 static void 1269 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 1270 { 1271 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 1272 1273 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 1274 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 1275 } 1276 1277 static void 1278 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 1279 { 1280 uint32_t wd32 = 0; 1281 uint delta_msec = 100; 1282 uint elapsed_msec = 0; 1283 uint timeout_msec; 1284 ulong n; 1285 1286 if (vha->hw->pdev->subsystem_device != 0x0175 && 1287 vha->hw->pdev->subsystem_device != 0x0240) 1288 return; 1289 1290 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 1291 udelay(100); 1292 1293 attempt: 1294 timeout_msec = TIMEOUT_SEMAPHORE; 1295 n = timeout_msec / delta_msec; 1296 while (n--) { 1297 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 1298 qla25xx_read_risc_sema_reg(vha, &wd32); 1299 if (wd32 & RISC_SEMAPHORE) 1300 break; 1301 msleep(delta_msec); 1302 elapsed_msec += delta_msec; 1303 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 1304 goto force; 1305 } 1306 1307 if (!(wd32 & RISC_SEMAPHORE)) 1308 goto force; 1309 1310 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 1311 goto acquired; 1312 1313 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 1314 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 1315 n = timeout_msec / delta_msec; 1316 while (n--) { 1317 qla25xx_read_risc_sema_reg(vha, &wd32); 1318 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 1319 break; 1320 msleep(delta_msec); 1321 elapsed_msec += delta_msec; 1322 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 1323 goto force; 1324 } 1325 1326 if (wd32 & RISC_SEMAPHORE_FORCE) 1327 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 1328 1329 goto attempt; 1330 1331 force: 1332 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 1333 1334 acquired: 1335 return; 1336 } 1337 1338 /** 1339 * qla24xx_reset_chip() - Reset ISP24xx chip. 1340 * @ha: HA context 1341 * 1342 * Returns 0 on success. 1343 */ 1344 void 1345 qla24xx_reset_chip(scsi_qla_host_t *vha) 1346 { 1347 struct qla_hw_data *ha = vha->hw; 1348 1349 if (pci_channel_offline(ha->pdev) && 1350 ha->flags.pci_channel_io_perm_failure) { 1351 return; 1352 } 1353 1354 ha->isp_ops->disable_intrs(ha); 1355 1356 qla25xx_manipulate_risc_semaphore(vha); 1357 1358 /* Perform RISC reset. */ 1359 qla24xx_reset_risc(vha); 1360 } 1361 1362 /** 1363 * qla2x00_chip_diag() - Test chip for proper operation. 1364 * @ha: HA context 1365 * 1366 * Returns 0 on success. 1367 */ 1368 int 1369 qla2x00_chip_diag(scsi_qla_host_t *vha) 1370 { 1371 int rval; 1372 struct qla_hw_data *ha = vha->hw; 1373 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1374 unsigned long flags = 0; 1375 uint16_t data; 1376 uint32_t cnt; 1377 uint16_t mb[5]; 1378 struct req_que *req = ha->req_q_map[0]; 1379 1380 /* Assume a failed state */ 1381 rval = QLA_FUNCTION_FAILED; 1382 1383 ql_dbg(ql_dbg_init, vha, 0x007b, 1384 "Testing device at %lx.\n", (u_long)®->flash_address); 1385 1386 spin_lock_irqsave(&ha->hardware_lock, flags); 1387 1388 /* Reset ISP chip. */ 1389 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1390 1391 /* 1392 * We need to have a delay here since the card will not respond while 1393 * in reset causing an MCA on some architectures. 1394 */ 1395 udelay(20); 1396 data = qla2x00_debounce_register(®->ctrl_status); 1397 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 1398 udelay(5); 1399 data = RD_REG_WORD(®->ctrl_status); 1400 barrier(); 1401 } 1402 1403 if (!cnt) 1404 goto chip_diag_failed; 1405 1406 ql_dbg(ql_dbg_init, vha, 0x007c, 1407 "Reset register cleared by chip reset.\n"); 1408 1409 /* Reset RISC processor. */ 1410 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1411 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1412 1413 /* Workaround for QLA2312 PCI parity error */ 1414 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1415 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 1416 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 1417 udelay(5); 1418 data = RD_MAILBOX_REG(ha, reg, 0); 1419 barrier(); 1420 } 1421 } else 1422 udelay(10); 1423 1424 if (!cnt) 1425 goto chip_diag_failed; 1426 1427 /* Check product ID of chip */ 1428 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); 1429 1430 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 1431 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 1432 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 1433 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 1434 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 1435 mb[3] != PROD_ID_3) { 1436 ql_log(ql_log_warn, vha, 0x0062, 1437 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 1438 mb[1], mb[2], mb[3]); 1439 1440 goto chip_diag_failed; 1441 } 1442 ha->product_id[0] = mb[1]; 1443 ha->product_id[1] = mb[2]; 1444 ha->product_id[2] = mb[3]; 1445 ha->product_id[3] = mb[4]; 1446 1447 /* Adjust fw RISC transfer size */ 1448 if (req->length > 1024) 1449 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 1450 else 1451 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1452 req->length; 1453 1454 if (IS_QLA2200(ha) && 1455 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 1456 /* Limit firmware transfer size with a 2200A */ 1457 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 1458 1459 ha->device_type |= DT_ISP2200A; 1460 ha->fw_transfer_size = 128; 1461 } 1462 1463 /* Wrap Incoming Mailboxes Test. */ 1464 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1465 1466 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 1467 rval = qla2x00_mbx_reg_test(vha); 1468 if (rval) 1469 ql_log(ql_log_warn, vha, 0x0080, 1470 "Failed mailbox send register test.\n"); 1471 else 1472 /* Flag a successful rval */ 1473 rval = QLA_SUCCESS; 1474 spin_lock_irqsave(&ha->hardware_lock, flags); 1475 1476 chip_diag_failed: 1477 if (rval) 1478 ql_log(ql_log_info, vha, 0x0081, 1479 "Chip diagnostics **** FAILED ****.\n"); 1480 1481 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1482 1483 return (rval); 1484 } 1485 1486 /** 1487 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 1488 * @ha: HA context 1489 * 1490 * Returns 0 on success. 1491 */ 1492 int 1493 qla24xx_chip_diag(scsi_qla_host_t *vha) 1494 { 1495 int rval; 1496 struct qla_hw_data *ha = vha->hw; 1497 struct req_que *req = ha->req_q_map[0]; 1498 1499 if (IS_P3P_TYPE(ha)) 1500 return QLA_SUCCESS; 1501 1502 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 1503 1504 rval = qla2x00_mbx_reg_test(vha); 1505 if (rval) { 1506 ql_log(ql_log_warn, vha, 0x0082, 1507 "Failed mailbox send register test.\n"); 1508 } else { 1509 /* Flag a successful rval */ 1510 rval = QLA_SUCCESS; 1511 } 1512 1513 return rval; 1514 } 1515 1516 void 1517 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 1518 { 1519 int rval; 1520 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 1521 eft_size, fce_size, mq_size; 1522 dma_addr_t tc_dma; 1523 void *tc; 1524 struct qla_hw_data *ha = vha->hw; 1525 struct req_que *req = ha->req_q_map[0]; 1526 struct rsp_que *rsp = ha->rsp_q_map[0]; 1527 1528 if (ha->fw_dump) { 1529 ql_dbg(ql_dbg_init, vha, 0x00bd, 1530 "Firmware dump already allocated.\n"); 1531 return; 1532 } 1533 1534 ha->fw_dumped = 0; 1535 ha->fw_dump_cap_flags = 0; 1536 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 1537 req_q_size = rsp_q_size = 0; 1538 1539 if (IS_QLA27XX(ha)) 1540 goto try_fce; 1541 1542 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 1543 fixed_size = sizeof(struct qla2100_fw_dump); 1544 } else if (IS_QLA23XX(ha)) { 1545 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 1546 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 1547 sizeof(uint16_t); 1548 } else if (IS_FWI2_CAPABLE(ha)) { 1549 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 1550 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 1551 else if (IS_QLA81XX(ha)) 1552 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 1553 else if (IS_QLA25XX(ha)) 1554 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 1555 else 1556 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 1557 1558 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 1559 sizeof(uint32_t); 1560 if (ha->mqenable) { 1561 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 1562 mq_size = sizeof(struct qla2xxx_mq_chain); 1563 /* 1564 * Allocate maximum buffer size for all queues. 1565 * Resizing must be done at end-of-dump processing. 1566 */ 1567 mq_size += ha->max_req_queues * 1568 (req->length * sizeof(request_t)); 1569 mq_size += ha->max_rsp_queues * 1570 (rsp->length * sizeof(response_t)); 1571 } 1572 if (ha->tgt.atio_ring) 1573 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 1574 /* Allocate memory for Fibre Channel Event Buffer. */ 1575 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 1576 !IS_QLA27XX(ha)) 1577 goto try_eft; 1578 1579 try_fce: 1580 if (ha->fce) 1581 dma_free_coherent(&ha->pdev->dev, 1582 FCE_SIZE, ha->fce, ha->fce_dma); 1583 1584 /* Allocate memory for Fibre Channel Event Buffer. */ 1585 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 1586 GFP_KERNEL); 1587 if (!tc) { 1588 ql_log(ql_log_warn, vha, 0x00be, 1589 "Unable to allocate (%d KB) for FCE.\n", 1590 FCE_SIZE / 1024); 1591 goto try_eft; 1592 } 1593 1594 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 1595 ha->fce_mb, &ha->fce_bufs); 1596 if (rval) { 1597 ql_log(ql_log_warn, vha, 0x00bf, 1598 "Unable to initialize FCE (%d).\n", rval); 1599 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 1600 tc_dma); 1601 ha->flags.fce_enabled = 0; 1602 goto try_eft; 1603 } 1604 ql_dbg(ql_dbg_init, vha, 0x00c0, 1605 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 1606 1607 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 1608 ha->flags.fce_enabled = 1; 1609 ha->fce_dma = tc_dma; 1610 ha->fce = tc; 1611 1612 try_eft: 1613 if (ha->eft) 1614 dma_free_coherent(&ha->pdev->dev, 1615 EFT_SIZE, ha->eft, ha->eft_dma); 1616 1617 /* Allocate memory for Extended Trace Buffer. */ 1618 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 1619 GFP_KERNEL); 1620 if (!tc) { 1621 ql_log(ql_log_warn, vha, 0x00c1, 1622 "Unable to allocate (%d KB) for EFT.\n", 1623 EFT_SIZE / 1024); 1624 goto cont_alloc; 1625 } 1626 1627 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 1628 if (rval) { 1629 ql_log(ql_log_warn, vha, 0x00c2, 1630 "Unable to initialize EFT (%d).\n", rval); 1631 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 1632 tc_dma); 1633 goto cont_alloc; 1634 } 1635 ql_dbg(ql_dbg_init, vha, 0x00c3, 1636 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 1637 1638 eft_size = EFT_SIZE; 1639 ha->eft_dma = tc_dma; 1640 ha->eft = tc; 1641 } 1642 1643 cont_alloc: 1644 if (IS_QLA27XX(ha)) { 1645 if (!ha->fw_dump_template) { 1646 ql_log(ql_log_warn, vha, 0x00ba, 1647 "Failed missing fwdump template\n"); 1648 return; 1649 } 1650 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 1651 ql_dbg(ql_dbg_init, vha, 0x00fa, 1652 "-> allocating fwdump (%x bytes)...\n", dump_size); 1653 goto allocate; 1654 } 1655 1656 req_q_size = req->length * sizeof(request_t); 1657 rsp_q_size = rsp->length * sizeof(response_t); 1658 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 1659 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 1660 ha->chain_offset = dump_size; 1661 dump_size += mq_size + fce_size; 1662 1663 allocate: 1664 ha->fw_dump = vmalloc(dump_size); 1665 if (!ha->fw_dump) { 1666 ql_log(ql_log_warn, vha, 0x00c4, 1667 "Unable to allocate (%d KB) for firmware dump.\n", 1668 dump_size / 1024); 1669 1670 if (ha->fce) { 1671 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 1672 ha->fce_dma); 1673 ha->fce = NULL; 1674 ha->fce_dma = 0; 1675 } 1676 1677 if (ha->eft) { 1678 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, 1679 ha->eft_dma); 1680 ha->eft = NULL; 1681 ha->eft_dma = 0; 1682 } 1683 return; 1684 } 1685 ha->fw_dump_len = dump_size; 1686 ql_dbg(ql_dbg_init, vha, 0x00c5, 1687 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); 1688 1689 if (IS_QLA27XX(ha)) 1690 return; 1691 1692 ha->fw_dump->signature[0] = 'Q'; 1693 ha->fw_dump->signature[1] = 'L'; 1694 ha->fw_dump->signature[2] = 'G'; 1695 ha->fw_dump->signature[3] = 'C'; 1696 ha->fw_dump->version = htonl(1); 1697 1698 ha->fw_dump->fixed_size = htonl(fixed_size); 1699 ha->fw_dump->mem_size = htonl(mem_size); 1700 ha->fw_dump->req_q_size = htonl(req_q_size); 1701 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 1702 1703 ha->fw_dump->eft_size = htonl(eft_size); 1704 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 1705 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 1706 1707 ha->fw_dump->header_size = 1708 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 1709 } 1710 1711 static int 1712 qla81xx_mpi_sync(scsi_qla_host_t *vha) 1713 { 1714 #define MPS_MASK 0xe0 1715 int rval; 1716 uint16_t dc; 1717 uint32_t dw; 1718 1719 if (!IS_QLA81XX(vha->hw)) 1720 return QLA_SUCCESS; 1721 1722 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 1723 if (rval != QLA_SUCCESS) { 1724 ql_log(ql_log_warn, vha, 0x0105, 1725 "Unable to acquire semaphore.\n"); 1726 goto done; 1727 } 1728 1729 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 1730 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 1731 if (rval != QLA_SUCCESS) { 1732 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 1733 goto done_release; 1734 } 1735 1736 dc &= MPS_MASK; 1737 if (dc == (dw & MPS_MASK)) 1738 goto done_release; 1739 1740 dw &= ~MPS_MASK; 1741 dw |= dc; 1742 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 1743 if (rval != QLA_SUCCESS) { 1744 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 1745 } 1746 1747 done_release: 1748 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 1749 if (rval != QLA_SUCCESS) { 1750 ql_log(ql_log_warn, vha, 0x006d, 1751 "Unable to release semaphore.\n"); 1752 } 1753 1754 done: 1755 return rval; 1756 } 1757 1758 int 1759 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 1760 { 1761 /* Don't try to reallocate the array */ 1762 if (req->outstanding_cmds) 1763 return QLA_SUCCESS; 1764 1765 if (!IS_FWI2_CAPABLE(ha) || (ha->mqiobase && 1766 (ql2xmultique_tag || ql2xmaxqueues > 1))) 1767 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 1768 else { 1769 if (ha->fw_xcb_count <= ha->fw_iocb_count) 1770 req->num_outstanding_cmds = ha->fw_xcb_count; 1771 else 1772 req->num_outstanding_cmds = ha->fw_iocb_count; 1773 } 1774 1775 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 1776 req->num_outstanding_cmds, GFP_KERNEL); 1777 1778 if (!req->outstanding_cmds) { 1779 /* 1780 * Try to allocate a minimal size just so we can get through 1781 * initialization. 1782 */ 1783 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 1784 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 1785 req->num_outstanding_cmds, GFP_KERNEL); 1786 1787 if (!req->outstanding_cmds) { 1788 ql_log(ql_log_fatal, NULL, 0x0126, 1789 "Failed to allocate memory for " 1790 "outstanding_cmds for req_que %p.\n", req); 1791 req->num_outstanding_cmds = 0; 1792 return QLA_FUNCTION_FAILED; 1793 } 1794 } 1795 1796 return QLA_SUCCESS; 1797 } 1798 1799 /** 1800 * qla2x00_setup_chip() - Load and start RISC firmware. 1801 * @ha: HA context 1802 * 1803 * Returns 0 on success. 1804 */ 1805 static int 1806 qla2x00_setup_chip(scsi_qla_host_t *vha) 1807 { 1808 int rval; 1809 uint32_t srisc_address = 0; 1810 struct qla_hw_data *ha = vha->hw; 1811 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1812 unsigned long flags; 1813 uint16_t fw_major_version; 1814 1815 if (IS_P3P_TYPE(ha)) { 1816 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1817 if (rval == QLA_SUCCESS) { 1818 qla2x00_stop_firmware(vha); 1819 goto enable_82xx_npiv; 1820 } else 1821 goto failed; 1822 } 1823 1824 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1825 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 1826 spin_lock_irqsave(&ha->hardware_lock, flags); 1827 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 1828 RD_REG_WORD(®->hccr); 1829 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1830 } 1831 1832 qla81xx_mpi_sync(vha); 1833 1834 /* Load firmware sequences */ 1835 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1836 if (rval == QLA_SUCCESS) { 1837 ql_dbg(ql_dbg_init, vha, 0x00c9, 1838 "Verifying Checksum of loaded RISC code.\n"); 1839 1840 rval = qla2x00_verify_checksum(vha, srisc_address); 1841 if (rval == QLA_SUCCESS) { 1842 /* Start firmware execution. */ 1843 ql_dbg(ql_dbg_init, vha, 0x00ca, 1844 "Starting firmware.\n"); 1845 1846 rval = qla2x00_execute_fw(vha, srisc_address); 1847 /* Retrieve firmware information. */ 1848 if (rval == QLA_SUCCESS) { 1849 enable_82xx_npiv: 1850 fw_major_version = ha->fw_major_version; 1851 if (IS_P3P_TYPE(ha)) 1852 qla82xx_check_md_needed(vha); 1853 else 1854 rval = qla2x00_get_fw_version(vha); 1855 if (rval != QLA_SUCCESS) 1856 goto failed; 1857 ha->flags.npiv_supported = 0; 1858 if (IS_QLA2XXX_MIDTYPE(ha) && 1859 (ha->fw_attributes & BIT_2)) { 1860 ha->flags.npiv_supported = 1; 1861 if ((!ha->max_npiv_vports) || 1862 ((ha->max_npiv_vports + 1) % 1863 MIN_MULTI_ID_FABRIC)) 1864 ha->max_npiv_vports = 1865 MIN_MULTI_ID_FABRIC - 1; 1866 } 1867 qla2x00_get_resource_cnts(vha, NULL, 1868 &ha->fw_xcb_count, NULL, &ha->fw_iocb_count, 1869 &ha->max_npiv_vports, NULL); 1870 1871 /* 1872 * Allocate the array of outstanding commands 1873 * now that we know the firmware resources. 1874 */ 1875 rval = qla2x00_alloc_outstanding_cmds(ha, 1876 vha->req); 1877 if (rval != QLA_SUCCESS) 1878 goto failed; 1879 1880 if (!fw_major_version && ql2xallocfwdump 1881 && !(IS_P3P_TYPE(ha))) 1882 qla2x00_alloc_fw_dump(vha); 1883 } else { 1884 goto failed; 1885 } 1886 } else { 1887 ql_log(ql_log_fatal, vha, 0x00cd, 1888 "ISP Firmware failed checksum.\n"); 1889 goto failed; 1890 } 1891 } else 1892 goto failed; 1893 1894 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1895 /* Enable proper parity. */ 1896 spin_lock_irqsave(&ha->hardware_lock, flags); 1897 if (IS_QLA2300(ha)) 1898 /* SRAM parity */ 1899 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 1900 else 1901 /* SRAM, Instruction RAM and GP RAM parity */ 1902 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 1903 RD_REG_WORD(®->hccr); 1904 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1905 } 1906 1907 if (IS_QLA27XX(ha)) 1908 ha->flags.fac_supported = 1; 1909 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 1910 uint32_t size; 1911 1912 rval = qla81xx_fac_get_sector_size(vha, &size); 1913 if (rval == QLA_SUCCESS) { 1914 ha->flags.fac_supported = 1; 1915 ha->fdt_block_size = size << 2; 1916 } else { 1917 ql_log(ql_log_warn, vha, 0x00ce, 1918 "Unsupported FAC firmware (%d.%02d.%02d).\n", 1919 ha->fw_major_version, ha->fw_minor_version, 1920 ha->fw_subminor_version); 1921 1922 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 1923 ha->flags.fac_supported = 0; 1924 rval = QLA_SUCCESS; 1925 } 1926 } 1927 } 1928 failed: 1929 if (rval) { 1930 ql_log(ql_log_fatal, vha, 0x00cf, 1931 "Setup chip ****FAILED****.\n"); 1932 } 1933 1934 return (rval); 1935 } 1936 1937 /** 1938 * qla2x00_init_response_q_entries() - Initializes response queue entries. 1939 * @ha: HA context 1940 * 1941 * Beginning of request ring has initialization control block already built 1942 * by nvram config routine. 1943 * 1944 * Returns 0 on success. 1945 */ 1946 void 1947 qla2x00_init_response_q_entries(struct rsp_que *rsp) 1948 { 1949 uint16_t cnt; 1950 response_t *pkt; 1951 1952 rsp->ring_ptr = rsp->ring; 1953 rsp->ring_index = 0; 1954 rsp->status_srb = NULL; 1955 pkt = rsp->ring_ptr; 1956 for (cnt = 0; cnt < rsp->length; cnt++) { 1957 pkt->signature = RESPONSE_PROCESSED; 1958 pkt++; 1959 } 1960 } 1961 1962 /** 1963 * qla2x00_update_fw_options() - Read and process firmware options. 1964 * @ha: HA context 1965 * 1966 * Returns 0 on success. 1967 */ 1968 void 1969 qla2x00_update_fw_options(scsi_qla_host_t *vha) 1970 { 1971 uint16_t swing, emphasis, tx_sens, rx_sens; 1972 struct qla_hw_data *ha = vha->hw; 1973 1974 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 1975 qla2x00_get_fw_options(vha, ha->fw_options); 1976 1977 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 1978 return; 1979 1980 /* Serial Link options. */ 1981 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 1982 "Serial link options.\n"); 1983 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 1984 (uint8_t *)&ha->fw_seriallink_options, 1985 sizeof(ha->fw_seriallink_options)); 1986 1987 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 1988 if (ha->fw_seriallink_options[3] & BIT_2) { 1989 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 1990 1991 /* 1G settings */ 1992 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 1993 emphasis = (ha->fw_seriallink_options[2] & 1994 (BIT_4 | BIT_3)) >> 3; 1995 tx_sens = ha->fw_seriallink_options[0] & 1996 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1997 rx_sens = (ha->fw_seriallink_options[0] & 1998 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1999 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 2000 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 2001 if (rx_sens == 0x0) 2002 rx_sens = 0x3; 2003 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 2004 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2005 ha->fw_options[10] |= BIT_5 | 2006 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 2007 (tx_sens & (BIT_1 | BIT_0)); 2008 2009 /* 2G settings */ 2010 swing = (ha->fw_seriallink_options[2] & 2011 (BIT_7 | BIT_6 | BIT_5)) >> 5; 2012 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 2013 tx_sens = ha->fw_seriallink_options[1] & 2014 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2015 rx_sens = (ha->fw_seriallink_options[1] & 2016 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 2017 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 2018 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 2019 if (rx_sens == 0x0) 2020 rx_sens = 0x3; 2021 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 2022 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2023 ha->fw_options[11] |= BIT_5 | 2024 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 2025 (tx_sens & (BIT_1 | BIT_0)); 2026 } 2027 2028 /* FCP2 options. */ 2029 /* Return command IOCBs without waiting for an ABTS to complete. */ 2030 ha->fw_options[3] |= BIT_13; 2031 2032 /* LED scheme. */ 2033 if (ha->flags.enable_led_scheme) 2034 ha->fw_options[2] |= BIT_12; 2035 2036 /* Detect ISP6312. */ 2037 if (IS_QLA6312(ha)) 2038 ha->fw_options[2] |= BIT_13; 2039 2040 /* Update firmware options. */ 2041 qla2x00_set_fw_options(vha, ha->fw_options); 2042 } 2043 2044 void 2045 qla24xx_update_fw_options(scsi_qla_host_t *vha) 2046 { 2047 int rval; 2048 struct qla_hw_data *ha = vha->hw; 2049 2050 if (IS_P3P_TYPE(ha)) 2051 return; 2052 2053 /* Update Serial Link options. */ 2054 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 2055 return; 2056 2057 rval = qla2x00_set_serdes_params(vha, 2058 le16_to_cpu(ha->fw_seriallink_options24[1]), 2059 le16_to_cpu(ha->fw_seriallink_options24[2]), 2060 le16_to_cpu(ha->fw_seriallink_options24[3])); 2061 if (rval != QLA_SUCCESS) { 2062 ql_log(ql_log_warn, vha, 0x0104, 2063 "Unable to update Serial Link options (%x).\n", rval); 2064 } 2065 } 2066 2067 void 2068 qla2x00_config_rings(struct scsi_qla_host *vha) 2069 { 2070 struct qla_hw_data *ha = vha->hw; 2071 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2072 struct req_que *req = ha->req_q_map[0]; 2073 struct rsp_que *rsp = ha->rsp_q_map[0]; 2074 2075 /* Setup ring parameters in initialization control block. */ 2076 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 2077 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 2078 ha->init_cb->request_q_length = cpu_to_le16(req->length); 2079 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 2080 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 2081 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 2082 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 2083 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 2084 2085 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 2086 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 2087 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 2088 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 2089 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 2090 } 2091 2092 void 2093 qla24xx_config_rings(struct scsi_qla_host *vha) 2094 { 2095 struct qla_hw_data *ha = vha->hw; 2096 device_reg_t *reg = ISP_QUE_REG(ha, 0); 2097 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 2098 struct qla_msix_entry *msix; 2099 struct init_cb_24xx *icb; 2100 uint16_t rid = 0; 2101 struct req_que *req = ha->req_q_map[0]; 2102 struct rsp_que *rsp = ha->rsp_q_map[0]; 2103 2104 /* Setup ring parameters in initialization control block. */ 2105 icb = (struct init_cb_24xx *)ha->init_cb; 2106 icb->request_q_outpointer = cpu_to_le16(0); 2107 icb->response_q_inpointer = cpu_to_le16(0); 2108 icb->request_q_length = cpu_to_le16(req->length); 2109 icb->response_q_length = cpu_to_le16(rsp->length); 2110 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 2111 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 2112 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 2113 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 2114 2115 /* Setup ATIO queue dma pointers for target mode */ 2116 icb->atio_q_inpointer = cpu_to_le16(0); 2117 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 2118 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 2119 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 2120 2121 if (IS_SHADOW_REG_CAPABLE(ha)) 2122 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 2123 2124 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 2125 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 2126 icb->rid = cpu_to_le16(rid); 2127 if (ha->flags.msix_enabled) { 2128 msix = &ha->msix_entries[1]; 2129 ql_dbg(ql_dbg_init, vha, 0x00fd, 2130 "Registering vector 0x%x for base que.\n", 2131 msix->entry); 2132 icb->msix = cpu_to_le16(msix->entry); 2133 } 2134 /* Use alternate PCI bus number */ 2135 if (MSB(rid)) 2136 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 2137 /* Use alternate PCI devfn */ 2138 if (LSB(rid)) 2139 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 2140 2141 /* Use Disable MSIX Handshake mode for capable adapters */ 2142 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 2143 (ha->flags.msix_enabled)) { 2144 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 2145 ha->flags.disable_msix_handshake = 1; 2146 ql_dbg(ql_dbg_init, vha, 0x00fe, 2147 "MSIX Handshake Disable Mode turned on.\n"); 2148 } else { 2149 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 2150 } 2151 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 2152 2153 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 2154 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 2155 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 2156 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 2157 } else { 2158 WRT_REG_DWORD(®->isp24.req_q_in, 0); 2159 WRT_REG_DWORD(®->isp24.req_q_out, 0); 2160 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 2161 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 2162 } 2163 qlt_24xx_config_rings(vha); 2164 2165 /* PCI posting */ 2166 RD_REG_DWORD(&ioreg->hccr); 2167 } 2168 2169 /** 2170 * qla2x00_init_rings() - Initializes firmware. 2171 * @ha: HA context 2172 * 2173 * Beginning of request ring has initialization control block already built 2174 * by nvram config routine. 2175 * 2176 * Returns 0 on success. 2177 */ 2178 int 2179 qla2x00_init_rings(scsi_qla_host_t *vha) 2180 { 2181 int rval; 2182 unsigned long flags = 0; 2183 int cnt, que; 2184 struct qla_hw_data *ha = vha->hw; 2185 struct req_que *req; 2186 struct rsp_que *rsp; 2187 struct mid_init_cb_24xx *mid_init_cb = 2188 (struct mid_init_cb_24xx *) ha->init_cb; 2189 2190 spin_lock_irqsave(&ha->hardware_lock, flags); 2191 2192 /* Clear outstanding commands array. */ 2193 for (que = 0; que < ha->max_req_queues; que++) { 2194 req = ha->req_q_map[que]; 2195 if (!req) 2196 continue; 2197 req->out_ptr = (void *)(req->ring + req->length); 2198 *req->out_ptr = 0; 2199 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 2200 req->outstanding_cmds[cnt] = NULL; 2201 2202 req->current_outstanding_cmd = 1; 2203 2204 /* Initialize firmware. */ 2205 req->ring_ptr = req->ring; 2206 req->ring_index = 0; 2207 req->cnt = req->length; 2208 } 2209 2210 for (que = 0; que < ha->max_rsp_queues; que++) { 2211 rsp = ha->rsp_q_map[que]; 2212 if (!rsp) 2213 continue; 2214 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 2215 *rsp->in_ptr = 0; 2216 /* Initialize response queue entries */ 2217 if (IS_QLAFX00(ha)) 2218 qlafx00_init_response_q_entries(rsp); 2219 else 2220 qla2x00_init_response_q_entries(rsp); 2221 } 2222 2223 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 2224 ha->tgt.atio_ring_index = 0; 2225 /* Initialize ATIO queue entries */ 2226 qlt_init_atio_q_entries(vha); 2227 2228 ha->isp_ops->config_rings(vha); 2229 2230 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2231 2232 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 2233 2234 if (IS_QLAFX00(ha)) { 2235 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 2236 goto next_check; 2237 } 2238 2239 /* Update any ISP specific firmware options before initialization. */ 2240 ha->isp_ops->update_fw_options(vha); 2241 2242 if (ha->flags.npiv_supported) { 2243 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 2244 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 2245 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 2246 } 2247 2248 if (IS_FWI2_CAPABLE(ha)) { 2249 mid_init_cb->options = cpu_to_le16(BIT_1); 2250 mid_init_cb->init_cb.execution_throttle = 2251 cpu_to_le16(ha->fw_xcb_count); 2252 /* D-Port Status */ 2253 if (IS_DPORT_CAPABLE(ha)) 2254 mid_init_cb->init_cb.firmware_options_1 |= 2255 cpu_to_le16(BIT_7); 2256 /* Enable FA-WWPN */ 2257 ha->flags.fawwpn_enabled = 2258 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) ? 1 : 0; 2259 ql_dbg(ql_dbg_init, vha, 0x0141, "FA-WWPN Support: %s.\n", 2260 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 2261 } 2262 2263 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 2264 next_check: 2265 if (rval) { 2266 ql_log(ql_log_fatal, vha, 0x00d2, 2267 "Init Firmware **** FAILED ****.\n"); 2268 } else { 2269 ql_dbg(ql_dbg_init, vha, 0x00d3, 2270 "Init Firmware -- success.\n"); 2271 } 2272 2273 return (rval); 2274 } 2275 2276 /** 2277 * qla2x00_fw_ready() - Waits for firmware ready. 2278 * @ha: HA context 2279 * 2280 * Returns 0 on success. 2281 */ 2282 static int 2283 qla2x00_fw_ready(scsi_qla_host_t *vha) 2284 { 2285 int rval; 2286 unsigned long wtime, mtime, cs84xx_time; 2287 uint16_t min_wait; /* Minimum wait time if loop is down */ 2288 uint16_t wait_time; /* Wait time if loop is coming ready */ 2289 uint16_t state[6]; 2290 struct qla_hw_data *ha = vha->hw; 2291 2292 if (IS_QLAFX00(vha->hw)) 2293 return qlafx00_fw_ready(vha); 2294 2295 rval = QLA_SUCCESS; 2296 2297 /* Time to wait for loop down */ 2298 if (IS_P3P_TYPE(ha)) 2299 min_wait = 30; 2300 else 2301 min_wait = 20; 2302 2303 /* 2304 * Firmware should take at most one RATOV to login, plus 5 seconds for 2305 * our own processing. 2306 */ 2307 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 2308 wait_time = min_wait; 2309 } 2310 2311 /* Min wait time if loop down */ 2312 mtime = jiffies + (min_wait * HZ); 2313 2314 /* wait time before firmware ready */ 2315 wtime = jiffies + (wait_time * HZ); 2316 2317 /* Wait for ISP to finish LIP */ 2318 if (!vha->flags.init_done) 2319 ql_log(ql_log_info, vha, 0x801e, 2320 "Waiting for LIP to complete.\n"); 2321 2322 do { 2323 memset(state, -1, sizeof(state)); 2324 rval = qla2x00_get_firmware_state(vha, state); 2325 if (rval == QLA_SUCCESS) { 2326 if (state[0] < FSTATE_LOSS_OF_SYNC) { 2327 vha->device_flags &= ~DFLG_NO_CABLE; 2328 } 2329 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 2330 ql_dbg(ql_dbg_taskm, vha, 0x801f, 2331 "fw_state=%x 84xx=%x.\n", state[0], 2332 state[2]); 2333 if ((state[2] & FSTATE_LOGGED_IN) && 2334 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 2335 ql_dbg(ql_dbg_taskm, vha, 0x8028, 2336 "Sending verify iocb.\n"); 2337 2338 cs84xx_time = jiffies; 2339 rval = qla84xx_init_chip(vha); 2340 if (rval != QLA_SUCCESS) { 2341 ql_log(ql_log_warn, 2342 vha, 0x8007, 2343 "Init chip failed.\n"); 2344 break; 2345 } 2346 2347 /* Add time taken to initialize. */ 2348 cs84xx_time = jiffies - cs84xx_time; 2349 wtime += cs84xx_time; 2350 mtime += cs84xx_time; 2351 ql_dbg(ql_dbg_taskm, vha, 0x8008, 2352 "Increasing wait time by %ld. " 2353 "New time %ld.\n", cs84xx_time, 2354 wtime); 2355 } 2356 } else if (state[0] == FSTATE_READY) { 2357 ql_dbg(ql_dbg_taskm, vha, 0x8037, 2358 "F/W Ready - OK.\n"); 2359 2360 qla2x00_get_retry_cnt(vha, &ha->retry_count, 2361 &ha->login_timeout, &ha->r_a_tov); 2362 2363 rval = QLA_SUCCESS; 2364 break; 2365 } 2366 2367 rval = QLA_FUNCTION_FAILED; 2368 2369 if (atomic_read(&vha->loop_down_timer) && 2370 state[0] != FSTATE_READY) { 2371 /* Loop down. Timeout on min_wait for states 2372 * other than Wait for Login. 2373 */ 2374 if (time_after_eq(jiffies, mtime)) { 2375 ql_log(ql_log_info, vha, 0x8038, 2376 "Cable is unplugged...\n"); 2377 2378 vha->device_flags |= DFLG_NO_CABLE; 2379 break; 2380 } 2381 } 2382 } else { 2383 /* Mailbox cmd failed. Timeout on min_wait. */ 2384 if (time_after_eq(jiffies, mtime) || 2385 ha->flags.isp82xx_fw_hung) 2386 break; 2387 } 2388 2389 if (time_after_eq(jiffies, wtime)) 2390 break; 2391 2392 /* Delay for a while */ 2393 msleep(500); 2394 } while (1); 2395 2396 ql_dbg(ql_dbg_taskm, vha, 0x803a, 2397 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 2398 state[1], state[2], state[3], state[4], state[5], jiffies); 2399 2400 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 2401 ql_log(ql_log_warn, vha, 0x803b, 2402 "Firmware ready **** FAILED ****.\n"); 2403 } 2404 2405 return (rval); 2406 } 2407 2408 /* 2409 * qla2x00_configure_hba 2410 * Setup adapter context. 2411 * 2412 * Input: 2413 * ha = adapter state pointer. 2414 * 2415 * Returns: 2416 * 0 = success 2417 * 2418 * Context: 2419 * Kernel context. 2420 */ 2421 static int 2422 qla2x00_configure_hba(scsi_qla_host_t *vha) 2423 { 2424 int rval; 2425 uint16_t loop_id; 2426 uint16_t topo; 2427 uint16_t sw_cap; 2428 uint8_t al_pa; 2429 uint8_t area; 2430 uint8_t domain; 2431 char connect_type[22]; 2432 struct qla_hw_data *ha = vha->hw; 2433 unsigned long flags; 2434 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 2435 2436 /* Get host addresses. */ 2437 rval = qla2x00_get_adapter_id(vha, 2438 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 2439 if (rval != QLA_SUCCESS) { 2440 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 2441 IS_CNA_CAPABLE(ha) || 2442 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 2443 ql_dbg(ql_dbg_disc, vha, 0x2008, 2444 "Loop is in a transition state.\n"); 2445 } else { 2446 ql_log(ql_log_warn, vha, 0x2009, 2447 "Unable to get host loop ID.\n"); 2448 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 2449 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 2450 ql_log(ql_log_warn, vha, 0x1151, 2451 "Doing link init.\n"); 2452 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 2453 return rval; 2454 } 2455 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2456 } 2457 return (rval); 2458 } 2459 2460 if (topo == 4) { 2461 ql_log(ql_log_info, vha, 0x200a, 2462 "Cannot get topology - retrying.\n"); 2463 return (QLA_FUNCTION_FAILED); 2464 } 2465 2466 vha->loop_id = loop_id; 2467 2468 /* initialize */ 2469 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 2470 ha->operating_mode = LOOP; 2471 ha->switch_cap = 0; 2472 2473 switch (topo) { 2474 case 0: 2475 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 2476 ha->current_topology = ISP_CFG_NL; 2477 strcpy(connect_type, "(Loop)"); 2478 break; 2479 2480 case 1: 2481 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 2482 ha->switch_cap = sw_cap; 2483 ha->current_topology = ISP_CFG_FL; 2484 strcpy(connect_type, "(FL_Port)"); 2485 break; 2486 2487 case 2: 2488 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 2489 ha->operating_mode = P2P; 2490 ha->current_topology = ISP_CFG_N; 2491 strcpy(connect_type, "(N_Port-to-N_Port)"); 2492 break; 2493 2494 case 3: 2495 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 2496 ha->switch_cap = sw_cap; 2497 ha->operating_mode = P2P; 2498 ha->current_topology = ISP_CFG_F; 2499 strcpy(connect_type, "(F_Port)"); 2500 break; 2501 2502 default: 2503 ql_dbg(ql_dbg_disc, vha, 0x200f, 2504 "HBA in unknown topology %x, using NL.\n", topo); 2505 ha->current_topology = ISP_CFG_NL; 2506 strcpy(connect_type, "(Loop)"); 2507 break; 2508 } 2509 2510 /* Save Host port and loop ID. */ 2511 /* byte order - Big Endian */ 2512 vha->d_id.b.domain = domain; 2513 vha->d_id.b.area = area; 2514 vha->d_id.b.al_pa = al_pa; 2515 2516 spin_lock_irqsave(&ha->vport_slock, flags); 2517 qlt_update_vp_map(vha, SET_AL_PA); 2518 spin_unlock_irqrestore(&ha->vport_slock, flags); 2519 2520 if (!vha->flags.init_done) 2521 ql_log(ql_log_info, vha, 0x2010, 2522 "Topology - %s, Host Loop address 0x%x.\n", 2523 connect_type, vha->loop_id); 2524 2525 return(rval); 2526 } 2527 2528 inline void 2529 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 2530 char *def) 2531 { 2532 char *st, *en; 2533 uint16_t index; 2534 struct qla_hw_data *ha = vha->hw; 2535 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 2536 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 2537 2538 if (memcmp(model, BINZERO, len) != 0) { 2539 strncpy(ha->model_number, model, len); 2540 st = en = ha->model_number; 2541 en += len - 1; 2542 while (en > st) { 2543 if (*en != 0x20 && *en != 0x00) 2544 break; 2545 *en-- = '\0'; 2546 } 2547 2548 index = (ha->pdev->subsystem_device & 0xff); 2549 if (use_tbl && 2550 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2551 index < QLA_MODEL_NAMES) 2552 strncpy(ha->model_desc, 2553 qla2x00_model_name[index * 2 + 1], 2554 sizeof(ha->model_desc) - 1); 2555 } else { 2556 index = (ha->pdev->subsystem_device & 0xff); 2557 if (use_tbl && 2558 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2559 index < QLA_MODEL_NAMES) { 2560 strcpy(ha->model_number, 2561 qla2x00_model_name[index * 2]); 2562 strncpy(ha->model_desc, 2563 qla2x00_model_name[index * 2 + 1], 2564 sizeof(ha->model_desc) - 1); 2565 } else { 2566 strcpy(ha->model_number, def); 2567 } 2568 } 2569 if (IS_FWI2_CAPABLE(ha)) 2570 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 2571 sizeof(ha->model_desc)); 2572 } 2573 2574 /* On sparc systems, obtain port and node WWN from firmware 2575 * properties. 2576 */ 2577 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 2578 { 2579 #ifdef CONFIG_SPARC 2580 struct qla_hw_data *ha = vha->hw; 2581 struct pci_dev *pdev = ha->pdev; 2582 struct device_node *dp = pci_device_to_OF_node(pdev); 2583 const u8 *val; 2584 int len; 2585 2586 val = of_get_property(dp, "port-wwn", &len); 2587 if (val && len >= WWN_SIZE) 2588 memcpy(nv->port_name, val, WWN_SIZE); 2589 2590 val = of_get_property(dp, "node-wwn", &len); 2591 if (val && len >= WWN_SIZE) 2592 memcpy(nv->node_name, val, WWN_SIZE); 2593 #endif 2594 } 2595 2596 /* 2597 * NVRAM configuration for ISP 2xxx 2598 * 2599 * Input: 2600 * ha = adapter block pointer. 2601 * 2602 * Output: 2603 * initialization control block in response_ring 2604 * host adapters parameters in host adapter block 2605 * 2606 * Returns: 2607 * 0 = success. 2608 */ 2609 int 2610 qla2x00_nvram_config(scsi_qla_host_t *vha) 2611 { 2612 int rval; 2613 uint8_t chksum = 0; 2614 uint16_t cnt; 2615 uint8_t *dptr1, *dptr2; 2616 struct qla_hw_data *ha = vha->hw; 2617 init_cb_t *icb = ha->init_cb; 2618 nvram_t *nv = ha->nvram; 2619 uint8_t *ptr = ha->nvram; 2620 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2621 2622 rval = QLA_SUCCESS; 2623 2624 /* Determine NVRAM starting address. */ 2625 ha->nvram_size = sizeof(nvram_t); 2626 ha->nvram_base = 0; 2627 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 2628 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 2629 ha->nvram_base = 0x80; 2630 2631 /* Get NVRAM data and calculate checksum. */ 2632 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 2633 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 2634 chksum += *ptr++; 2635 2636 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 2637 "Contents of NVRAM.\n"); 2638 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 2639 (uint8_t *)nv, ha->nvram_size); 2640 2641 /* Bad NVRAM data, set defaults parameters. */ 2642 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 2643 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 2644 /* Reset NVRAM data. */ 2645 ql_log(ql_log_warn, vha, 0x0064, 2646 "Inconsistent NVRAM " 2647 "detected: checksum=0x%x id=%c version=0x%x.\n", 2648 chksum, nv->id[0], nv->nvram_version); 2649 ql_log(ql_log_warn, vha, 0x0065, 2650 "Falling back to " 2651 "functioning (yet invalid -- WWPN) defaults.\n"); 2652 2653 /* 2654 * Set default initialization control block. 2655 */ 2656 memset(nv, 0, ha->nvram_size); 2657 nv->parameter_block_version = ICB_VERSION; 2658 2659 if (IS_QLA23XX(ha)) { 2660 nv->firmware_options[0] = BIT_2 | BIT_1; 2661 nv->firmware_options[1] = BIT_7 | BIT_5; 2662 nv->add_firmware_options[0] = BIT_5; 2663 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2664 nv->frame_payload_size = 2048; 2665 nv->special_options[1] = BIT_7; 2666 } else if (IS_QLA2200(ha)) { 2667 nv->firmware_options[0] = BIT_2 | BIT_1; 2668 nv->firmware_options[1] = BIT_7 | BIT_5; 2669 nv->add_firmware_options[0] = BIT_5; 2670 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2671 nv->frame_payload_size = 1024; 2672 } else if (IS_QLA2100(ha)) { 2673 nv->firmware_options[0] = BIT_3 | BIT_1; 2674 nv->firmware_options[1] = BIT_5; 2675 nv->frame_payload_size = 1024; 2676 } 2677 2678 nv->max_iocb_allocation = cpu_to_le16(256); 2679 nv->execution_throttle = cpu_to_le16(16); 2680 nv->retry_count = 8; 2681 nv->retry_delay = 1; 2682 2683 nv->port_name[0] = 33; 2684 nv->port_name[3] = 224; 2685 nv->port_name[4] = 139; 2686 2687 qla2xxx_nvram_wwn_from_ofw(vha, nv); 2688 2689 nv->login_timeout = 4; 2690 2691 /* 2692 * Set default host adapter parameters 2693 */ 2694 nv->host_p[1] = BIT_2; 2695 nv->reset_delay = 5; 2696 nv->port_down_retry_count = 8; 2697 nv->max_luns_per_target = cpu_to_le16(8); 2698 nv->link_down_timeout = 60; 2699 2700 rval = 1; 2701 } 2702 2703 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 2704 /* 2705 * The SN2 does not provide BIOS emulation which means you can't change 2706 * potentially bogus BIOS settings. Force the use of default settings 2707 * for link rate and frame size. Hope that the rest of the settings 2708 * are valid. 2709 */ 2710 if (ia64_platform_is("sn2")) { 2711 nv->frame_payload_size = 2048; 2712 if (IS_QLA23XX(ha)) 2713 nv->special_options[1] = BIT_7; 2714 } 2715 #endif 2716 2717 /* Reset Initialization control block */ 2718 memset(icb, 0, ha->init_cb_size); 2719 2720 /* 2721 * Setup driver NVRAM options. 2722 */ 2723 nv->firmware_options[0] |= (BIT_6 | BIT_1); 2724 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 2725 nv->firmware_options[1] |= (BIT_5 | BIT_0); 2726 nv->firmware_options[1] &= ~BIT_4; 2727 2728 if (IS_QLA23XX(ha)) { 2729 nv->firmware_options[0] |= BIT_2; 2730 nv->firmware_options[0] &= ~BIT_3; 2731 nv->special_options[0] &= ~BIT_6; 2732 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 2733 2734 if (IS_QLA2300(ha)) { 2735 if (ha->fb_rev == FPM_2310) { 2736 strcpy(ha->model_number, "QLA2310"); 2737 } else { 2738 strcpy(ha->model_number, "QLA2300"); 2739 } 2740 } else { 2741 qla2x00_set_model_info(vha, nv->model_number, 2742 sizeof(nv->model_number), "QLA23xx"); 2743 } 2744 } else if (IS_QLA2200(ha)) { 2745 nv->firmware_options[0] |= BIT_2; 2746 /* 2747 * 'Point-to-point preferred, else loop' is not a safe 2748 * connection mode setting. 2749 */ 2750 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 2751 (BIT_5 | BIT_4)) { 2752 /* Force 'loop preferred, else point-to-point'. */ 2753 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 2754 nv->add_firmware_options[0] |= BIT_5; 2755 } 2756 strcpy(ha->model_number, "QLA22xx"); 2757 } else /*if (IS_QLA2100(ha))*/ { 2758 strcpy(ha->model_number, "QLA2100"); 2759 } 2760 2761 /* 2762 * Copy over NVRAM RISC parameter block to initialization control block. 2763 */ 2764 dptr1 = (uint8_t *)icb; 2765 dptr2 = (uint8_t *)&nv->parameter_block_version; 2766 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 2767 while (cnt--) 2768 *dptr1++ = *dptr2++; 2769 2770 /* Copy 2nd half. */ 2771 dptr1 = (uint8_t *)icb->add_firmware_options; 2772 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 2773 while (cnt--) 2774 *dptr1++ = *dptr2++; 2775 2776 /* Use alternate WWN? */ 2777 if (nv->host_p[1] & BIT_7) { 2778 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 2779 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 2780 } 2781 2782 /* Prepare nodename */ 2783 if ((icb->firmware_options[1] & BIT_6) == 0) { 2784 /* 2785 * Firmware will apply the following mask if the nodename was 2786 * not provided. 2787 */ 2788 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 2789 icb->node_name[0] &= 0xF0; 2790 } 2791 2792 /* 2793 * Set host adapter parameters. 2794 */ 2795 2796 /* 2797 * BIT_7 in the host-parameters section allows for modification to 2798 * internal driver logging. 2799 */ 2800 if (nv->host_p[0] & BIT_7) 2801 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 2802 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 2803 /* Always load RISC code on non ISP2[12]00 chips. */ 2804 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 2805 ha->flags.disable_risc_code_load = 0; 2806 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 2807 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 2808 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 2809 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 2810 ha->flags.disable_serdes = 0; 2811 2812 ha->operating_mode = 2813 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 2814 2815 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 2816 sizeof(ha->fw_seriallink_options)); 2817 2818 /* save HBA serial number */ 2819 ha->serial0 = icb->port_name[5]; 2820 ha->serial1 = icb->port_name[6]; 2821 ha->serial2 = icb->port_name[7]; 2822 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 2823 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 2824 2825 icb->execution_throttle = cpu_to_le16(0xFFFF); 2826 2827 ha->retry_count = nv->retry_count; 2828 2829 /* Set minimum login_timeout to 4 seconds. */ 2830 if (nv->login_timeout != ql2xlogintimeout) 2831 nv->login_timeout = ql2xlogintimeout; 2832 if (nv->login_timeout < 4) 2833 nv->login_timeout = 4; 2834 ha->login_timeout = nv->login_timeout; 2835 icb->login_timeout = nv->login_timeout; 2836 2837 /* Set minimum RATOV to 100 tenths of a second. */ 2838 ha->r_a_tov = 100; 2839 2840 ha->loop_reset_delay = nv->reset_delay; 2841 2842 /* Link Down Timeout = 0: 2843 * 2844 * When Port Down timer expires we will start returning 2845 * I/O's to OS with "DID_NO_CONNECT". 2846 * 2847 * Link Down Timeout != 0: 2848 * 2849 * The driver waits for the link to come up after link down 2850 * before returning I/Os to OS with "DID_NO_CONNECT". 2851 */ 2852 if (nv->link_down_timeout == 0) { 2853 ha->loop_down_abort_time = 2854 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 2855 } else { 2856 ha->link_down_timeout = nv->link_down_timeout; 2857 ha->loop_down_abort_time = 2858 (LOOP_DOWN_TIME - ha->link_down_timeout); 2859 } 2860 2861 /* 2862 * Need enough time to try and get the port back. 2863 */ 2864 ha->port_down_retry_count = nv->port_down_retry_count; 2865 if (qlport_down_retry) 2866 ha->port_down_retry_count = qlport_down_retry; 2867 /* Set login_retry_count */ 2868 ha->login_retry_count = nv->retry_count; 2869 if (ha->port_down_retry_count == nv->port_down_retry_count && 2870 ha->port_down_retry_count > 3) 2871 ha->login_retry_count = ha->port_down_retry_count; 2872 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 2873 ha->login_retry_count = ha->port_down_retry_count; 2874 if (ql2xloginretrycount) 2875 ha->login_retry_count = ql2xloginretrycount; 2876 2877 icb->lun_enables = cpu_to_le16(0); 2878 icb->command_resource_count = 0; 2879 icb->immediate_notify_resource_count = 0; 2880 icb->timeout = cpu_to_le16(0); 2881 2882 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2883 /* Enable RIO */ 2884 icb->firmware_options[0] &= ~BIT_3; 2885 icb->add_firmware_options[0] &= 2886 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2887 icb->add_firmware_options[0] |= BIT_2; 2888 icb->response_accumulation_timer = 3; 2889 icb->interrupt_delay_timer = 5; 2890 2891 vha->flags.process_response_queue = 1; 2892 } else { 2893 /* Enable ZIO. */ 2894 if (!vha->flags.init_done) { 2895 ha->zio_mode = icb->add_firmware_options[0] & 2896 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2897 ha->zio_timer = icb->interrupt_delay_timer ? 2898 icb->interrupt_delay_timer: 2; 2899 } 2900 icb->add_firmware_options[0] &= 2901 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2902 vha->flags.process_response_queue = 0; 2903 if (ha->zio_mode != QLA_ZIO_DISABLED) { 2904 ha->zio_mode = QLA_ZIO_MODE_6; 2905 2906 ql_log(ql_log_info, vha, 0x0068, 2907 "ZIO mode %d enabled; timer delay (%d us).\n", 2908 ha->zio_mode, ha->zio_timer * 100); 2909 2910 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 2911 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 2912 vha->flags.process_response_queue = 1; 2913 } 2914 } 2915 2916 if (rval) { 2917 ql_log(ql_log_warn, vha, 0x0069, 2918 "NVRAM configuration failed.\n"); 2919 } 2920 return (rval); 2921 } 2922 2923 static void 2924 qla2x00_rport_del(void *data) 2925 { 2926 fc_port_t *fcport = data; 2927 struct fc_rport *rport; 2928 unsigned long flags; 2929 2930 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2931 rport = fcport->drport ? fcport->drport: fcport->rport; 2932 fcport->drport = NULL; 2933 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2934 if (rport) 2935 fc_remote_port_delete(rport); 2936 } 2937 2938 /** 2939 * qla2x00_alloc_fcport() - Allocate a generic fcport. 2940 * @ha: HA context 2941 * @flags: allocation flags 2942 * 2943 * Returns a pointer to the allocated fcport, or NULL, if none available. 2944 */ 2945 fc_port_t * 2946 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 2947 { 2948 fc_port_t *fcport; 2949 2950 fcport = kzalloc(sizeof(fc_port_t), flags); 2951 if (!fcport) 2952 return NULL; 2953 2954 /* Setup fcport template structure. */ 2955 fcport->vha = vha; 2956 fcport->port_type = FCT_UNKNOWN; 2957 fcport->loop_id = FC_NO_LOOP_ID; 2958 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 2959 fcport->supported_classes = FC_COS_UNSPECIFIED; 2960 2961 return fcport; 2962 } 2963 2964 /* 2965 * qla2x00_configure_loop 2966 * Updates Fibre Channel Device Database with what is actually on loop. 2967 * 2968 * Input: 2969 * ha = adapter block pointer. 2970 * 2971 * Returns: 2972 * 0 = success. 2973 * 1 = error. 2974 * 2 = database was full and device was not configured. 2975 */ 2976 static int 2977 qla2x00_configure_loop(scsi_qla_host_t *vha) 2978 { 2979 int rval; 2980 unsigned long flags, save_flags; 2981 struct qla_hw_data *ha = vha->hw; 2982 rval = QLA_SUCCESS; 2983 2984 /* Get Initiator ID */ 2985 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 2986 rval = qla2x00_configure_hba(vha); 2987 if (rval != QLA_SUCCESS) { 2988 ql_dbg(ql_dbg_disc, vha, 0x2013, 2989 "Unable to configure HBA.\n"); 2990 return (rval); 2991 } 2992 } 2993 2994 save_flags = flags = vha->dpc_flags; 2995 ql_dbg(ql_dbg_disc, vha, 0x2014, 2996 "Configure loop -- dpc flags = 0x%lx.\n", flags); 2997 2998 /* 2999 * If we have both an RSCN and PORT UPDATE pending then handle them 3000 * both at the same time. 3001 */ 3002 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3003 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 3004 3005 qla2x00_get_data_rate(vha); 3006 3007 /* Determine what we need to do */ 3008 if (ha->current_topology == ISP_CFG_FL && 3009 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 3010 3011 set_bit(RSCN_UPDATE, &flags); 3012 3013 } else if (ha->current_topology == ISP_CFG_F && 3014 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 3015 3016 set_bit(RSCN_UPDATE, &flags); 3017 clear_bit(LOCAL_LOOP_UPDATE, &flags); 3018 3019 } else if (ha->current_topology == ISP_CFG_N) { 3020 clear_bit(RSCN_UPDATE, &flags); 3021 3022 } else if (!vha->flags.online || 3023 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 3024 3025 set_bit(RSCN_UPDATE, &flags); 3026 set_bit(LOCAL_LOOP_UPDATE, &flags); 3027 } 3028 3029 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 3030 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 3031 ql_dbg(ql_dbg_disc, vha, 0x2015, 3032 "Loop resync needed, failing.\n"); 3033 rval = QLA_FUNCTION_FAILED; 3034 } else 3035 rval = qla2x00_configure_local_loop(vha); 3036 } 3037 3038 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 3039 if (LOOP_TRANSITION(vha)) { 3040 ql_dbg(ql_dbg_disc, vha, 0x201e, 3041 "Needs RSCN update and loop transition.\n"); 3042 rval = QLA_FUNCTION_FAILED; 3043 } 3044 else 3045 rval = qla2x00_configure_fabric(vha); 3046 } 3047 3048 if (rval == QLA_SUCCESS) { 3049 if (atomic_read(&vha->loop_down_timer) || 3050 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 3051 rval = QLA_FUNCTION_FAILED; 3052 } else { 3053 atomic_set(&vha->loop_state, LOOP_READY); 3054 ql_dbg(ql_dbg_disc, vha, 0x2069, 3055 "LOOP READY.\n"); 3056 } 3057 } 3058 3059 if (rval) { 3060 ql_dbg(ql_dbg_disc, vha, 0x206a, 3061 "%s *** FAILED ***.\n", __func__); 3062 } else { 3063 ql_dbg(ql_dbg_disc, vha, 0x206b, 3064 "%s: exiting normally.\n", __func__); 3065 } 3066 3067 /* Restore state if a resync event occurred during processing */ 3068 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 3069 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 3070 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3071 if (test_bit(RSCN_UPDATE, &save_flags)) { 3072 set_bit(RSCN_UPDATE, &vha->dpc_flags); 3073 } 3074 } 3075 3076 return (rval); 3077 } 3078 3079 3080 3081 /* 3082 * qla2x00_configure_local_loop 3083 * Updates Fibre Channel Device Database with local loop devices. 3084 * 3085 * Input: 3086 * ha = adapter block pointer. 3087 * 3088 * Returns: 3089 * 0 = success. 3090 */ 3091 static int 3092 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 3093 { 3094 int rval, rval2; 3095 int found_devs; 3096 int found; 3097 fc_port_t *fcport, *new_fcport; 3098 3099 uint16_t index; 3100 uint16_t entries; 3101 char *id_iter; 3102 uint16_t loop_id; 3103 uint8_t domain, area, al_pa; 3104 struct qla_hw_data *ha = vha->hw; 3105 3106 found_devs = 0; 3107 new_fcport = NULL; 3108 entries = MAX_FIBRE_DEVICES_LOOP; 3109 3110 /* Get list of logged in devices. */ 3111 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 3112 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 3113 &entries); 3114 if (rval != QLA_SUCCESS) 3115 goto cleanup_allocation; 3116 3117 ql_dbg(ql_dbg_disc, vha, 0x2017, 3118 "Entries in ID list (%d).\n", entries); 3119 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 3120 (uint8_t *)ha->gid_list, 3121 entries * sizeof(struct gid_list_info)); 3122 3123 /* Allocate temporary fcport for any new fcports discovered. */ 3124 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3125 if (new_fcport == NULL) { 3126 ql_log(ql_log_warn, vha, 0x2018, 3127 "Memory allocation failed for fcport.\n"); 3128 rval = QLA_MEMORY_ALLOC_FAILED; 3129 goto cleanup_allocation; 3130 } 3131 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 3132 3133 /* 3134 * Mark local devices that were present with FCF_DEVICE_LOST for now. 3135 */ 3136 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3137 if (atomic_read(&fcport->state) == FCS_ONLINE && 3138 fcport->port_type != FCT_BROADCAST && 3139 (fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3140 3141 ql_dbg(ql_dbg_disc, vha, 0x2019, 3142 "Marking port lost loop_id=0x%04x.\n", 3143 fcport->loop_id); 3144 3145 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 3146 } 3147 } 3148 3149 /* Add devices to port list. */ 3150 id_iter = (char *)ha->gid_list; 3151 for (index = 0; index < entries; index++) { 3152 domain = ((struct gid_list_info *)id_iter)->domain; 3153 area = ((struct gid_list_info *)id_iter)->area; 3154 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 3155 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3156 loop_id = (uint16_t) 3157 ((struct gid_list_info *)id_iter)->loop_id_2100; 3158 else 3159 loop_id = le16_to_cpu( 3160 ((struct gid_list_info *)id_iter)->loop_id); 3161 id_iter += ha->gid_list_info_size; 3162 3163 /* Bypass reserved domain fields. */ 3164 if ((domain & 0xf0) == 0xf0) 3165 continue; 3166 3167 /* Bypass if not same domain and area of adapter. */ 3168 if (area && domain && 3169 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 3170 continue; 3171 3172 /* Bypass invalid local loop ID. */ 3173 if (loop_id > LAST_LOCAL_LOOP_ID) 3174 continue; 3175 3176 memset(new_fcport, 0, sizeof(fc_port_t)); 3177 3178 /* Fill in member data. */ 3179 new_fcport->d_id.b.domain = domain; 3180 new_fcport->d_id.b.area = area; 3181 new_fcport->d_id.b.al_pa = al_pa; 3182 new_fcport->loop_id = loop_id; 3183 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 3184 if (rval2 != QLA_SUCCESS) { 3185 ql_dbg(ql_dbg_disc, vha, 0x201a, 3186 "Failed to retrieve fcport information " 3187 "-- get_port_database=%x, loop_id=0x%04x.\n", 3188 rval2, new_fcport->loop_id); 3189 ql_dbg(ql_dbg_disc, vha, 0x201b, 3190 "Scheduling resync.\n"); 3191 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3192 continue; 3193 } 3194 3195 /* Check for matching device in port list. */ 3196 found = 0; 3197 fcport = NULL; 3198 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3199 if (memcmp(new_fcport->port_name, fcport->port_name, 3200 WWN_SIZE)) 3201 continue; 3202 3203 fcport->flags &= ~FCF_FABRIC_DEVICE; 3204 fcport->loop_id = new_fcport->loop_id; 3205 fcport->port_type = new_fcport->port_type; 3206 fcport->d_id.b24 = new_fcport->d_id.b24; 3207 memcpy(fcport->node_name, new_fcport->node_name, 3208 WWN_SIZE); 3209 3210 found++; 3211 break; 3212 } 3213 3214 if (!found) { 3215 /* New device, add to fcports list. */ 3216 list_add_tail(&new_fcport->list, &vha->vp_fcports); 3217 3218 /* Allocate a new replacement fcport. */ 3219 fcport = new_fcport; 3220 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3221 if (new_fcport == NULL) { 3222 ql_log(ql_log_warn, vha, 0x201c, 3223 "Failed to allocate memory for fcport.\n"); 3224 rval = QLA_MEMORY_ALLOC_FAILED; 3225 goto cleanup_allocation; 3226 } 3227 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 3228 } 3229 3230 /* Base iIDMA settings on HBA port speed. */ 3231 fcport->fp_speed = ha->link_data_rate; 3232 3233 qla2x00_update_fcport(vha, fcport); 3234 3235 found_devs++; 3236 } 3237 3238 cleanup_allocation: 3239 kfree(new_fcport); 3240 3241 if (rval != QLA_SUCCESS) { 3242 ql_dbg(ql_dbg_disc, vha, 0x201d, 3243 "Configure local loop error exit: rval=%x.\n", rval); 3244 } 3245 3246 return (rval); 3247 } 3248 3249 static void 3250 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 3251 { 3252 int rval; 3253 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3254 struct qla_hw_data *ha = vha->hw; 3255 3256 if (!IS_IIDMA_CAPABLE(ha)) 3257 return; 3258 3259 if (atomic_read(&fcport->state) != FCS_ONLINE) 3260 return; 3261 3262 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 3263 fcport->fp_speed > ha->link_data_rate) 3264 return; 3265 3266 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 3267 mb); 3268 if (rval != QLA_SUCCESS) { 3269 ql_dbg(ql_dbg_disc, vha, 0x2004, 3270 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 3271 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 3272 } else { 3273 ql_dbg(ql_dbg_disc, vha, 0x2005, 3274 "iIDMA adjusted to %s GB/s on %8phN.\n", 3275 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 3276 fcport->port_name); 3277 } 3278 } 3279 3280 static void 3281 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 3282 { 3283 struct fc_rport_identifiers rport_ids; 3284 struct fc_rport *rport; 3285 unsigned long flags; 3286 3287 rport_ids.node_name = wwn_to_u64(fcport->node_name); 3288 rport_ids.port_name = wwn_to_u64(fcport->port_name); 3289 rport_ids.port_id = fcport->d_id.b.domain << 16 | 3290 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 3291 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 3292 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 3293 if (!rport) { 3294 ql_log(ql_log_warn, vha, 0x2006, 3295 "Unable to allocate fc remote port.\n"); 3296 return; 3297 } 3298 /* 3299 * Create target mode FC NEXUS in qla_target.c if target mode is 3300 * enabled.. 3301 */ 3302 3303 qlt_fc_port_added(vha, fcport); 3304 3305 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 3306 *((fc_port_t **)rport->dd_data) = fcport; 3307 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 3308 3309 rport->supported_classes = fcport->supported_classes; 3310 3311 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 3312 if (fcport->port_type == FCT_INITIATOR) 3313 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 3314 if (fcport->port_type == FCT_TARGET) 3315 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 3316 fc_remote_port_rolechg(rport, rport_ids.roles); 3317 } 3318 3319 /* 3320 * qla2x00_update_fcport 3321 * Updates device on list. 3322 * 3323 * Input: 3324 * ha = adapter block pointer. 3325 * fcport = port structure pointer. 3326 * 3327 * Return: 3328 * 0 - Success 3329 * BIT_0 - error 3330 * 3331 * Context: 3332 * Kernel context. 3333 */ 3334 void 3335 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 3336 { 3337 fcport->vha = vha; 3338 3339 if (IS_QLAFX00(vha->hw)) { 3340 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 3341 goto reg_port; 3342 } 3343 fcport->login_retry = 0; 3344 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 3345 3346 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 3347 qla2x00_iidma_fcport(vha, fcport); 3348 qla24xx_update_fcport_fcp_prio(vha, fcport); 3349 3350 reg_port: 3351 if (qla_ini_mode_enabled(vha)) 3352 qla2x00_reg_remote_port(vha, fcport); 3353 else { 3354 /* 3355 * Create target mode FC NEXUS in qla_target.c 3356 */ 3357 qlt_fc_port_added(vha, fcport); 3358 } 3359 } 3360 3361 /* 3362 * qla2x00_configure_fabric 3363 * Setup SNS devices with loop ID's. 3364 * 3365 * Input: 3366 * ha = adapter block pointer. 3367 * 3368 * Returns: 3369 * 0 = success. 3370 * BIT_0 = error 3371 */ 3372 static int 3373 qla2x00_configure_fabric(scsi_qla_host_t *vha) 3374 { 3375 int rval; 3376 fc_port_t *fcport, *fcptemp; 3377 uint16_t next_loopid; 3378 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3379 uint16_t loop_id; 3380 LIST_HEAD(new_fcports); 3381 struct qla_hw_data *ha = vha->hw; 3382 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 3383 int discovery_gen; 3384 3385 /* If FL port exists, then SNS is present */ 3386 if (IS_FWI2_CAPABLE(ha)) 3387 loop_id = NPH_F_PORT; 3388 else 3389 loop_id = SNS_FL_PORT; 3390 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 3391 if (rval != QLA_SUCCESS) { 3392 ql_dbg(ql_dbg_disc, vha, 0x201f, 3393 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 3394 3395 vha->device_flags &= ~SWITCH_FOUND; 3396 return (QLA_SUCCESS); 3397 } 3398 vha->device_flags |= SWITCH_FOUND; 3399 3400 do { 3401 /* FDMI support. */ 3402 if (ql2xfdmienable && 3403 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 3404 qla2x00_fdmi_register(vha); 3405 3406 /* Ensure we are logged into the SNS. */ 3407 if (IS_FWI2_CAPABLE(ha)) 3408 loop_id = NPH_SNS; 3409 else 3410 loop_id = SIMPLE_NAME_SERVER; 3411 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 3412 0xfc, mb, BIT_1|BIT_0); 3413 if (rval != QLA_SUCCESS) { 3414 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3415 return rval; 3416 } 3417 if (mb[0] != MBS_COMMAND_COMPLETE) { 3418 ql_dbg(ql_dbg_disc, vha, 0x2042, 3419 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 3420 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], 3421 mb[2], mb[6], mb[7]); 3422 return (QLA_SUCCESS); 3423 } 3424 3425 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 3426 if (qla2x00_rft_id(vha)) { 3427 /* EMPTY */ 3428 ql_dbg(ql_dbg_disc, vha, 0x2045, 3429 "Register FC-4 TYPE failed.\n"); 3430 } 3431 if (qla2x00_rff_id(vha)) { 3432 /* EMPTY */ 3433 ql_dbg(ql_dbg_disc, vha, 0x2049, 3434 "Register FC-4 Features failed.\n"); 3435 } 3436 if (qla2x00_rnn_id(vha)) { 3437 /* EMPTY */ 3438 ql_dbg(ql_dbg_disc, vha, 0x204f, 3439 "Register Node Name failed.\n"); 3440 } else if (qla2x00_rsnn_nn(vha)) { 3441 /* EMPTY */ 3442 ql_dbg(ql_dbg_disc, vha, 0x2053, 3443 "Register Symobilic Node Name failed.\n"); 3444 } 3445 } 3446 3447 #define QLA_FCPORT_SCAN 1 3448 #define QLA_FCPORT_FOUND 2 3449 3450 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3451 fcport->scan_state = QLA_FCPORT_SCAN; 3452 } 3453 3454 /* Mark the time right before querying FW for connected ports. 3455 * This process is long, asynchronous and by the time it's done, 3456 * collected information might not be accurate anymore. E.g. 3457 * disconnected port might have re-connected and a brand new 3458 * session has been created. In this case session's generation 3459 * will be newer than discovery_gen. */ 3460 qlt_do_generation_tick(vha, &discovery_gen); 3461 3462 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); 3463 if (rval != QLA_SUCCESS) 3464 break; 3465 3466 /* 3467 * Logout all previous fabric devices marked lost, except 3468 * FCP2 devices. 3469 */ 3470 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3471 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3472 break; 3473 3474 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 3475 continue; 3476 3477 if (fcport->scan_state == QLA_FCPORT_SCAN) { 3478 if (qla_ini_mode_enabled(base_vha) && 3479 atomic_read(&fcport->state) == FCS_ONLINE) { 3480 qla2x00_mark_device_lost(vha, fcport, 3481 ql2xplogiabsentdevice, 0); 3482 if (fcport->loop_id != FC_NO_LOOP_ID && 3483 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3484 fcport->port_type != FCT_INITIATOR && 3485 fcport->port_type != FCT_BROADCAST) { 3486 ha->isp_ops->fabric_logout(vha, 3487 fcport->loop_id, 3488 fcport->d_id.b.domain, 3489 fcport->d_id.b.area, 3490 fcport->d_id.b.al_pa); 3491 qla2x00_clear_loop_id(fcport); 3492 } 3493 } else if (!qla_ini_mode_enabled(base_vha)) { 3494 /* 3495 * In target mode, explicitly kill 3496 * sessions and log out of devices 3497 * that are gone, so that we don't 3498 * end up with an initiator using the 3499 * wrong ACL (if the fabric recycles 3500 * an FC address and we have a stale 3501 * session around) and so that we don't 3502 * report initiators that are no longer 3503 * on the fabric. 3504 */ 3505 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf077, 3506 "port gone, logging out/killing session: " 3507 "%8phC state 0x%x flags 0x%x fc4_type 0x%x " 3508 "scan_state %d\n", 3509 fcport->port_name, 3510 atomic_read(&fcport->state), 3511 fcport->flags, fcport->fc4_type, 3512 fcport->scan_state); 3513 qlt_fc_port_deleted(vha, fcport, 3514 discovery_gen); 3515 } 3516 } 3517 } 3518 3519 /* Starting free loop ID. */ 3520 next_loopid = ha->min_external_loopid; 3521 3522 /* 3523 * Scan through our port list and login entries that need to be 3524 * logged in. 3525 */ 3526 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3527 if (atomic_read(&vha->loop_down_timer) || 3528 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3529 break; 3530 3531 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 3532 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 3533 continue; 3534 3535 /* 3536 * If we're not an initiator, skip looking for devices 3537 * and logging in. There's no reason for us to do it, 3538 * and it seems to actively cause problems in target 3539 * mode if we race with the initiator logging into us 3540 * (we might get the "port ID used" status back from 3541 * our login command and log out the initiator, which 3542 * seems to cause havoc). 3543 */ 3544 if (!qla_ini_mode_enabled(base_vha)) { 3545 if (fcport->scan_state == QLA_FCPORT_FOUND) { 3546 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf078, 3547 "port %8phC state 0x%x flags 0x%x fc4_type 0x%x " 3548 "scan_state %d (initiator mode disabled; skipping " 3549 "login)\n", fcport->port_name, 3550 atomic_read(&fcport->state), 3551 fcport->flags, fcport->fc4_type, 3552 fcport->scan_state); 3553 } 3554 continue; 3555 } 3556 3557 if (fcport->loop_id == FC_NO_LOOP_ID) { 3558 fcport->loop_id = next_loopid; 3559 rval = qla2x00_find_new_loop_id( 3560 base_vha, fcport); 3561 if (rval != QLA_SUCCESS) { 3562 /* Ran out of IDs to use */ 3563 break; 3564 } 3565 } 3566 /* Login and update database */ 3567 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3568 } 3569 3570 /* Exit if out of loop IDs. */ 3571 if (rval != QLA_SUCCESS) { 3572 break; 3573 } 3574 3575 /* 3576 * Login and add the new devices to our port list. 3577 */ 3578 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3579 if (atomic_read(&vha->loop_down_timer) || 3580 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3581 break; 3582 3583 /* 3584 * If we're not an initiator, skip looking for devices 3585 * and logging in. There's no reason for us to do it, 3586 * and it seems to actively cause problems in target 3587 * mode if we race with the initiator logging into us 3588 * (we might get the "port ID used" status back from 3589 * our login command and log out the initiator, which 3590 * seems to cause havoc). 3591 */ 3592 if (qla_ini_mode_enabled(base_vha)) { 3593 /* Find a new loop ID to use. */ 3594 fcport->loop_id = next_loopid; 3595 rval = qla2x00_find_new_loop_id(base_vha, 3596 fcport); 3597 if (rval != QLA_SUCCESS) { 3598 /* Ran out of IDs to use */ 3599 break; 3600 } 3601 3602 /* Login and update database */ 3603 qla2x00_fabric_dev_login(vha, fcport, 3604 &next_loopid); 3605 } else { 3606 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf079, 3607 "new port %8phC state 0x%x flags 0x%x fc4_type " 3608 "0x%x scan_state %d (initiator mode disabled; " 3609 "skipping login)\n", 3610 fcport->port_name, 3611 atomic_read(&fcport->state), 3612 fcport->flags, fcport->fc4_type, 3613 fcport->scan_state); 3614 } 3615 3616 list_move_tail(&fcport->list, &vha->vp_fcports); 3617 } 3618 } while (0); 3619 3620 /* Free all new device structures not processed. */ 3621 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3622 list_del(&fcport->list); 3623 kfree(fcport); 3624 } 3625 3626 if (rval) { 3627 ql_dbg(ql_dbg_disc, vha, 0x2068, 3628 "Configure fabric error exit rval=%d.\n", rval); 3629 } 3630 3631 return (rval); 3632 } 3633 3634 /* 3635 * qla2x00_find_all_fabric_devs 3636 * 3637 * Input: 3638 * ha = adapter block pointer. 3639 * dev = database device entry pointer. 3640 * 3641 * Returns: 3642 * 0 = success. 3643 * 3644 * Context: 3645 * Kernel context. 3646 */ 3647 static int 3648 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, 3649 struct list_head *new_fcports) 3650 { 3651 int rval; 3652 uint16_t loop_id; 3653 fc_port_t *fcport, *new_fcport, *fcptemp; 3654 int found; 3655 3656 sw_info_t *swl; 3657 int swl_idx; 3658 int first_dev, last_dev; 3659 port_id_t wrap = {}, nxt_d_id; 3660 struct qla_hw_data *ha = vha->hw; 3661 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 3662 3663 rval = QLA_SUCCESS; 3664 3665 /* Try GID_PT to get device list, else GAN. */ 3666 if (!ha->swl) 3667 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 3668 GFP_KERNEL); 3669 swl = ha->swl; 3670 if (!swl) { 3671 /*EMPTY*/ 3672 ql_dbg(ql_dbg_disc, vha, 0x2054, 3673 "GID_PT allocations failed, fallback on GA_NXT.\n"); 3674 } else { 3675 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 3676 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 3677 swl = NULL; 3678 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 3679 swl = NULL; 3680 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 3681 swl = NULL; 3682 } else if (ql2xiidmaenable && 3683 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { 3684 qla2x00_gpsc(vha, swl); 3685 } 3686 3687 /* If other queries succeeded probe for FC-4 type */ 3688 if (swl) 3689 qla2x00_gff_id(vha, swl); 3690 } 3691 swl_idx = 0; 3692 3693 /* Allocate temporary fcport for any new fcports discovered. */ 3694 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3695 if (new_fcport == NULL) { 3696 ql_log(ql_log_warn, vha, 0x205e, 3697 "Failed to allocate memory for fcport.\n"); 3698 return (QLA_MEMORY_ALLOC_FAILED); 3699 } 3700 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3701 /* Set start port ID scan at adapter ID. */ 3702 first_dev = 1; 3703 last_dev = 0; 3704 3705 /* Starting free loop ID. */ 3706 loop_id = ha->min_external_loopid; 3707 for (; loop_id <= ha->max_loop_id; loop_id++) { 3708 if (qla2x00_is_reserved_id(vha, loop_id)) 3709 continue; 3710 3711 if (ha->current_topology == ISP_CFG_FL && 3712 (atomic_read(&vha->loop_down_timer) || 3713 LOOP_TRANSITION(vha))) { 3714 atomic_set(&vha->loop_down_timer, 0); 3715 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3716 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3717 break; 3718 } 3719 3720 if (swl != NULL) { 3721 if (last_dev) { 3722 wrap.b24 = new_fcport->d_id.b24; 3723 } else { 3724 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 3725 memcpy(new_fcport->node_name, 3726 swl[swl_idx].node_name, WWN_SIZE); 3727 memcpy(new_fcport->port_name, 3728 swl[swl_idx].port_name, WWN_SIZE); 3729 memcpy(new_fcport->fabric_port_name, 3730 swl[swl_idx].fabric_port_name, WWN_SIZE); 3731 new_fcport->fp_speed = swl[swl_idx].fp_speed; 3732 new_fcport->fc4_type = swl[swl_idx].fc4_type; 3733 3734 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 3735 last_dev = 1; 3736 } 3737 swl_idx++; 3738 } 3739 } else { 3740 /* Send GA_NXT to the switch */ 3741 rval = qla2x00_ga_nxt(vha, new_fcport); 3742 if (rval != QLA_SUCCESS) { 3743 ql_log(ql_log_warn, vha, 0x2064, 3744 "SNS scan failed -- assuming " 3745 "zero-entry result.\n"); 3746 list_for_each_entry_safe(fcport, fcptemp, 3747 new_fcports, list) { 3748 list_del(&fcport->list); 3749 kfree(fcport); 3750 } 3751 rval = QLA_SUCCESS; 3752 break; 3753 } 3754 } 3755 3756 /* If wrap on switch device list, exit. */ 3757 if (first_dev) { 3758 wrap.b24 = new_fcport->d_id.b24; 3759 first_dev = 0; 3760 } else if (new_fcport->d_id.b24 == wrap.b24) { 3761 ql_dbg(ql_dbg_disc, vha, 0x2065, 3762 "Device wrap (%02x%02x%02x).\n", 3763 new_fcport->d_id.b.domain, 3764 new_fcport->d_id.b.area, 3765 new_fcport->d_id.b.al_pa); 3766 break; 3767 } 3768 3769 /* Bypass if same physical adapter. */ 3770 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 3771 continue; 3772 3773 /* Bypass virtual ports of the same host. */ 3774 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 3775 continue; 3776 3777 /* Bypass if same domain and area of adapter. */ 3778 if (((new_fcport->d_id.b24 & 0xffff00) == 3779 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 3780 ISP_CFG_FL) 3781 continue; 3782 3783 /* Bypass reserved domain fields. */ 3784 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 3785 continue; 3786 3787 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 3788 if (ql2xgffidenable && 3789 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 3790 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 3791 continue; 3792 3793 /* Locate matching device in database. */ 3794 found = 0; 3795 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3796 if (memcmp(new_fcport->port_name, fcport->port_name, 3797 WWN_SIZE)) 3798 continue; 3799 3800 fcport->scan_state = QLA_FCPORT_FOUND; 3801 3802 found++; 3803 3804 /* Update port state. */ 3805 memcpy(fcport->fabric_port_name, 3806 new_fcport->fabric_port_name, WWN_SIZE); 3807 fcport->fp_speed = new_fcport->fp_speed; 3808 3809 /* 3810 * If address the same and state FCS_ONLINE 3811 * (or in target mode), nothing changed. 3812 */ 3813 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 3814 (atomic_read(&fcport->state) == FCS_ONLINE || 3815 !qla_ini_mode_enabled(base_vha))) { 3816 break; 3817 } 3818 3819 /* 3820 * If device was not a fabric device before. 3821 */ 3822 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3823 fcport->d_id.b24 = new_fcport->d_id.b24; 3824 qla2x00_clear_loop_id(fcport); 3825 fcport->flags |= (FCF_FABRIC_DEVICE | 3826 FCF_LOGIN_NEEDED); 3827 break; 3828 } 3829 3830 /* 3831 * Port ID changed or device was marked to be updated; 3832 * Log it out if still logged in and mark it for 3833 * relogin later. 3834 */ 3835 if (!qla_ini_mode_enabled(base_vha)) { 3836 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 3837 "port changed FC ID, %8phC" 3838 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 3839 fcport->port_name, 3840 fcport->d_id.b.domain, 3841 fcport->d_id.b.area, 3842 fcport->d_id.b.al_pa, 3843 fcport->loop_id, 3844 new_fcport->d_id.b.domain, 3845 new_fcport->d_id.b.area, 3846 new_fcport->d_id.b.al_pa); 3847 fcport->d_id.b24 = new_fcport->d_id.b24; 3848 break; 3849 } 3850 3851 fcport->d_id.b24 = new_fcport->d_id.b24; 3852 fcport->flags |= FCF_LOGIN_NEEDED; 3853 if (fcport->loop_id != FC_NO_LOOP_ID && 3854 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3855 (fcport->flags & FCF_ASYNC_SENT) == 0 && 3856 fcport->port_type != FCT_INITIATOR && 3857 fcport->port_type != FCT_BROADCAST) { 3858 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3859 fcport->d_id.b.domain, fcport->d_id.b.area, 3860 fcport->d_id.b.al_pa); 3861 qla2x00_clear_loop_id(fcport); 3862 } 3863 3864 break; 3865 } 3866 3867 if (found) 3868 continue; 3869 /* If device was not in our fcports list, then add it. */ 3870 new_fcport->scan_state = QLA_FCPORT_FOUND; 3871 list_add_tail(&new_fcport->list, new_fcports); 3872 3873 /* Allocate a new replacement fcport. */ 3874 nxt_d_id.b24 = new_fcport->d_id.b24; 3875 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3876 if (new_fcport == NULL) { 3877 ql_log(ql_log_warn, vha, 0x2066, 3878 "Memory allocation failed for fcport.\n"); 3879 return (QLA_MEMORY_ALLOC_FAILED); 3880 } 3881 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3882 new_fcport->d_id.b24 = nxt_d_id.b24; 3883 } 3884 3885 kfree(new_fcport); 3886 3887 return (rval); 3888 } 3889 3890 /* 3891 * qla2x00_find_new_loop_id 3892 * Scan through our port list and find a new usable loop ID. 3893 * 3894 * Input: 3895 * ha: adapter state pointer. 3896 * dev: port structure pointer. 3897 * 3898 * Returns: 3899 * qla2x00 local function return status code. 3900 * 3901 * Context: 3902 * Kernel context. 3903 */ 3904 int 3905 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 3906 { 3907 int rval; 3908 struct qla_hw_data *ha = vha->hw; 3909 unsigned long flags = 0; 3910 3911 rval = QLA_SUCCESS; 3912 3913 spin_lock_irqsave(&ha->vport_slock, flags); 3914 3915 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 3916 LOOPID_MAP_SIZE); 3917 if (dev->loop_id >= LOOPID_MAP_SIZE || 3918 qla2x00_is_reserved_id(vha, dev->loop_id)) { 3919 dev->loop_id = FC_NO_LOOP_ID; 3920 rval = QLA_FUNCTION_FAILED; 3921 } else 3922 set_bit(dev->loop_id, ha->loop_id_map); 3923 3924 spin_unlock_irqrestore(&ha->vport_slock, flags); 3925 3926 if (rval == QLA_SUCCESS) 3927 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 3928 "Assigning new loopid=%x, portid=%x.\n", 3929 dev->loop_id, dev->d_id.b24); 3930 else 3931 ql_log(ql_log_warn, dev->vha, 0x2087, 3932 "No loop_id's available, portid=%x.\n", 3933 dev->d_id.b24); 3934 3935 return (rval); 3936 } 3937 3938 /* 3939 * qla2x00_fabric_dev_login 3940 * Login fabric target device and update FC port database. 3941 * 3942 * Input: 3943 * ha: adapter state pointer. 3944 * fcport: port structure list pointer. 3945 * next_loopid: contains value of a new loop ID that can be used 3946 * by the next login attempt. 3947 * 3948 * Returns: 3949 * qla2x00 local function return status code. 3950 * 3951 * Context: 3952 * Kernel context. 3953 */ 3954 static int 3955 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3956 uint16_t *next_loopid) 3957 { 3958 int rval; 3959 uint8_t opts; 3960 struct qla_hw_data *ha = vha->hw; 3961 3962 rval = QLA_SUCCESS; 3963 3964 if (IS_ALOGIO_CAPABLE(ha)) { 3965 if (fcport->flags & FCF_ASYNC_SENT) 3966 return rval; 3967 fcport->flags |= FCF_ASYNC_SENT; 3968 rval = qla2x00_post_async_login_work(vha, fcport, NULL); 3969 if (!rval) 3970 return rval; 3971 } 3972 3973 fcport->flags &= ~FCF_ASYNC_SENT; 3974 rval = qla2x00_fabric_login(vha, fcport, next_loopid); 3975 if (rval == QLA_SUCCESS) { 3976 /* Send an ADISC to FCP2 devices.*/ 3977 opts = 0; 3978 if (fcport->flags & FCF_FCP2_DEVICE) 3979 opts |= BIT_1; 3980 rval = qla2x00_get_port_database(vha, fcport, opts); 3981 if (rval != QLA_SUCCESS) { 3982 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3983 fcport->d_id.b.domain, fcport->d_id.b.area, 3984 fcport->d_id.b.al_pa); 3985 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3986 } else { 3987 qla2x00_update_fcport(vha, fcport); 3988 } 3989 } else { 3990 /* Retry Login. */ 3991 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3992 } 3993 3994 return (rval); 3995 } 3996 3997 /* 3998 * qla2x00_fabric_login 3999 * Issue fabric login command. 4000 * 4001 * Input: 4002 * ha = adapter block pointer. 4003 * device = pointer to FC device type structure. 4004 * 4005 * Returns: 4006 * 0 - Login successfully 4007 * 1 - Login failed 4008 * 2 - Initiator device 4009 * 3 - Fatal error 4010 */ 4011 int 4012 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 4013 uint16_t *next_loopid) 4014 { 4015 int rval; 4016 int retry; 4017 uint16_t tmp_loopid; 4018 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4019 struct qla_hw_data *ha = vha->hw; 4020 4021 retry = 0; 4022 tmp_loopid = 0; 4023 4024 for (;;) { 4025 ql_dbg(ql_dbg_disc, vha, 0x2000, 4026 "Trying Fabric Login w/loop id 0x%04x for port " 4027 "%02x%02x%02x.\n", 4028 fcport->loop_id, fcport->d_id.b.domain, 4029 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4030 4031 /* Login fcport on switch. */ 4032 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 4033 fcport->d_id.b.domain, fcport->d_id.b.area, 4034 fcport->d_id.b.al_pa, mb, BIT_0); 4035 if (rval != QLA_SUCCESS) { 4036 return rval; 4037 } 4038 if (mb[0] == MBS_PORT_ID_USED) { 4039 /* 4040 * Device has another loop ID. The firmware team 4041 * recommends the driver perform an implicit login with 4042 * the specified ID again. The ID we just used is save 4043 * here so we return with an ID that can be tried by 4044 * the next login. 4045 */ 4046 retry++; 4047 tmp_loopid = fcport->loop_id; 4048 fcport->loop_id = mb[1]; 4049 4050 ql_dbg(ql_dbg_disc, vha, 0x2001, 4051 "Fabric Login: port in use - next loop " 4052 "id=0x%04x, port id= %02x%02x%02x.\n", 4053 fcport->loop_id, fcport->d_id.b.domain, 4054 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4055 4056 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 4057 /* 4058 * Login succeeded. 4059 */ 4060 if (retry) { 4061 /* A retry occurred before. */ 4062 *next_loopid = tmp_loopid; 4063 } else { 4064 /* 4065 * No retry occurred before. Just increment the 4066 * ID value for next login. 4067 */ 4068 *next_loopid = (fcport->loop_id + 1); 4069 } 4070 4071 if (mb[1] & BIT_0) { 4072 fcport->port_type = FCT_INITIATOR; 4073 } else { 4074 fcport->port_type = FCT_TARGET; 4075 if (mb[1] & BIT_1) { 4076 fcport->flags |= FCF_FCP2_DEVICE; 4077 } 4078 } 4079 4080 if (mb[10] & BIT_0) 4081 fcport->supported_classes |= FC_COS_CLASS2; 4082 if (mb[10] & BIT_1) 4083 fcport->supported_classes |= FC_COS_CLASS3; 4084 4085 if (IS_FWI2_CAPABLE(ha)) { 4086 if (mb[10] & BIT_7) 4087 fcport->flags |= 4088 FCF_CONF_COMP_SUPPORTED; 4089 } 4090 4091 rval = QLA_SUCCESS; 4092 break; 4093 } else if (mb[0] == MBS_LOOP_ID_USED) { 4094 /* 4095 * Loop ID already used, try next loop ID. 4096 */ 4097 fcport->loop_id++; 4098 rval = qla2x00_find_new_loop_id(vha, fcport); 4099 if (rval != QLA_SUCCESS) { 4100 /* Ran out of loop IDs to use */ 4101 break; 4102 } 4103 } else if (mb[0] == MBS_COMMAND_ERROR) { 4104 /* 4105 * Firmware possibly timed out during login. If NO 4106 * retries are left to do then the device is declared 4107 * dead. 4108 */ 4109 *next_loopid = fcport->loop_id; 4110 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 4111 fcport->d_id.b.domain, fcport->d_id.b.area, 4112 fcport->d_id.b.al_pa); 4113 qla2x00_mark_device_lost(vha, fcport, 1, 0); 4114 4115 rval = 1; 4116 break; 4117 } else { 4118 /* 4119 * unrecoverable / not handled error 4120 */ 4121 ql_dbg(ql_dbg_disc, vha, 0x2002, 4122 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 4123 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 4124 fcport->d_id.b.area, fcport->d_id.b.al_pa, 4125 fcport->loop_id, jiffies); 4126 4127 *next_loopid = fcport->loop_id; 4128 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 4129 fcport->d_id.b.domain, fcport->d_id.b.area, 4130 fcport->d_id.b.al_pa); 4131 qla2x00_clear_loop_id(fcport); 4132 fcport->login_retry = 0; 4133 4134 rval = 3; 4135 break; 4136 } 4137 } 4138 4139 return (rval); 4140 } 4141 4142 /* 4143 * qla2x00_local_device_login 4144 * Issue local device login command. 4145 * 4146 * Input: 4147 * ha = adapter block pointer. 4148 * loop_id = loop id of device to login to. 4149 * 4150 * Returns (Where's the #define!!!!): 4151 * 0 - Login successfully 4152 * 1 - Login failed 4153 * 3 - Fatal error 4154 */ 4155 int 4156 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 4157 { 4158 int rval; 4159 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4160 4161 memset(mb, 0, sizeof(mb)); 4162 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 4163 if (rval == QLA_SUCCESS) { 4164 /* Interrogate mailbox registers for any errors */ 4165 if (mb[0] == MBS_COMMAND_ERROR) 4166 rval = 1; 4167 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 4168 /* device not in PCB table */ 4169 rval = 3; 4170 } 4171 4172 return (rval); 4173 } 4174 4175 /* 4176 * qla2x00_loop_resync 4177 * Resync with fibre channel devices. 4178 * 4179 * Input: 4180 * ha = adapter block pointer. 4181 * 4182 * Returns: 4183 * 0 = success 4184 */ 4185 int 4186 qla2x00_loop_resync(scsi_qla_host_t *vha) 4187 { 4188 int rval = QLA_SUCCESS; 4189 uint32_t wait_time; 4190 struct req_que *req; 4191 struct rsp_que *rsp; 4192 4193 if (vha->hw->flags.cpu_affinity_enabled) 4194 req = vha->hw->req_q_map[0]; 4195 else 4196 req = vha->req; 4197 rsp = req->rsp; 4198 4199 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4200 if (vha->flags.online) { 4201 if (!(rval = qla2x00_fw_ready(vha))) { 4202 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 4203 wait_time = 256; 4204 do { 4205 if (!IS_QLAFX00(vha->hw)) { 4206 /* 4207 * Issue a marker after FW becomes 4208 * ready. 4209 */ 4210 qla2x00_marker(vha, req, rsp, 0, 0, 4211 MK_SYNC_ALL); 4212 vha->marker_needed = 0; 4213 } 4214 4215 /* Remap devices on Loop. */ 4216 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4217 4218 if (IS_QLAFX00(vha->hw)) 4219 qlafx00_configure_devices(vha); 4220 else 4221 qla2x00_configure_loop(vha); 4222 4223 wait_time--; 4224 } while (!atomic_read(&vha->loop_down_timer) && 4225 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4226 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 4227 &vha->dpc_flags))); 4228 } 4229 } 4230 4231 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4232 return (QLA_FUNCTION_FAILED); 4233 4234 if (rval) 4235 ql_dbg(ql_dbg_disc, vha, 0x206c, 4236 "%s *** FAILED ***.\n", __func__); 4237 4238 return (rval); 4239 } 4240 4241 /* 4242 * qla2x00_perform_loop_resync 4243 * Description: This function will set the appropriate flags and call 4244 * qla2x00_loop_resync. If successful loop will be resynced 4245 * Arguments : scsi_qla_host_t pointer 4246 * returm : Success or Failure 4247 */ 4248 4249 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 4250 { 4251 int32_t rval = 0; 4252 4253 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 4254 /*Configure the flags so that resync happens properly*/ 4255 atomic_set(&ha->loop_down_timer, 0); 4256 if (!(ha->device_flags & DFLG_NO_CABLE)) { 4257 atomic_set(&ha->loop_state, LOOP_UP); 4258 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 4259 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 4260 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 4261 4262 rval = qla2x00_loop_resync(ha); 4263 } else 4264 atomic_set(&ha->loop_state, LOOP_DEAD); 4265 4266 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 4267 } 4268 4269 return rval; 4270 } 4271 4272 void 4273 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 4274 { 4275 fc_port_t *fcport; 4276 struct scsi_qla_host *vha; 4277 struct qla_hw_data *ha = base_vha->hw; 4278 unsigned long flags; 4279 4280 spin_lock_irqsave(&ha->vport_slock, flags); 4281 /* Go with deferred removal of rport references. */ 4282 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 4283 atomic_inc(&vha->vref_count); 4284 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4285 if (fcport->drport && 4286 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 4287 spin_unlock_irqrestore(&ha->vport_slock, flags); 4288 qla2x00_rport_del(fcport); 4289 4290 /* 4291 * Release the target mode FC NEXUS in 4292 * qla_target.c, if target mod is enabled. 4293 */ 4294 qlt_fc_port_deleted(vha, fcport, 4295 base_vha->total_fcport_update_gen); 4296 4297 spin_lock_irqsave(&ha->vport_slock, flags); 4298 } 4299 } 4300 atomic_dec(&vha->vref_count); 4301 } 4302 spin_unlock_irqrestore(&ha->vport_slock, flags); 4303 } 4304 4305 /* Assumes idc_lock always held on entry */ 4306 void 4307 qla83xx_reset_ownership(scsi_qla_host_t *vha) 4308 { 4309 struct qla_hw_data *ha = vha->hw; 4310 uint32_t drv_presence, drv_presence_mask; 4311 uint32_t dev_part_info1, dev_part_info2, class_type; 4312 uint32_t class_type_mask = 0x3; 4313 uint16_t fcoe_other_function = 0xffff, i; 4314 4315 if (IS_QLA8044(ha)) { 4316 drv_presence = qla8044_rd_direct(vha, 4317 QLA8044_CRB_DRV_ACTIVE_INDEX); 4318 dev_part_info1 = qla8044_rd_direct(vha, 4319 QLA8044_CRB_DEV_PART_INFO_INDEX); 4320 dev_part_info2 = qla8044_rd_direct(vha, 4321 QLA8044_CRB_DEV_PART_INFO2); 4322 } else { 4323 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 4324 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 4325 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 4326 } 4327 for (i = 0; i < 8; i++) { 4328 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 4329 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 4330 (i != ha->portnum)) { 4331 fcoe_other_function = i; 4332 break; 4333 } 4334 } 4335 if (fcoe_other_function == 0xffff) { 4336 for (i = 0; i < 8; i++) { 4337 class_type = ((dev_part_info2 >> (i * 4)) & 4338 class_type_mask); 4339 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 4340 ((i + 8) != ha->portnum)) { 4341 fcoe_other_function = i + 8; 4342 break; 4343 } 4344 } 4345 } 4346 /* 4347 * Prepare drv-presence mask based on fcoe functions present. 4348 * However consider only valid physical fcoe function numbers (0-15). 4349 */ 4350 drv_presence_mask = ~((1 << (ha->portnum)) | 4351 ((fcoe_other_function == 0xffff) ? 4352 0 : (1 << (fcoe_other_function)))); 4353 4354 /* We are the reset owner iff: 4355 * - No other protocol drivers present. 4356 * - This is the lowest among fcoe functions. */ 4357 if (!(drv_presence & drv_presence_mask) && 4358 (ha->portnum < fcoe_other_function)) { 4359 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 4360 "This host is Reset owner.\n"); 4361 ha->flags.nic_core_reset_owner = 1; 4362 } 4363 } 4364 4365 static int 4366 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 4367 { 4368 int rval = QLA_SUCCESS; 4369 struct qla_hw_data *ha = vha->hw; 4370 uint32_t drv_ack; 4371 4372 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 4373 if (rval == QLA_SUCCESS) { 4374 drv_ack |= (1 << ha->portnum); 4375 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 4376 } 4377 4378 return rval; 4379 } 4380 4381 static int 4382 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 4383 { 4384 int rval = QLA_SUCCESS; 4385 struct qla_hw_data *ha = vha->hw; 4386 uint32_t drv_ack; 4387 4388 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 4389 if (rval == QLA_SUCCESS) { 4390 drv_ack &= ~(1 << ha->portnum); 4391 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 4392 } 4393 4394 return rval; 4395 } 4396 4397 static const char * 4398 qla83xx_dev_state_to_string(uint32_t dev_state) 4399 { 4400 switch (dev_state) { 4401 case QLA8XXX_DEV_COLD: 4402 return "COLD/RE-INIT"; 4403 case QLA8XXX_DEV_INITIALIZING: 4404 return "INITIALIZING"; 4405 case QLA8XXX_DEV_READY: 4406 return "READY"; 4407 case QLA8XXX_DEV_NEED_RESET: 4408 return "NEED RESET"; 4409 case QLA8XXX_DEV_NEED_QUIESCENT: 4410 return "NEED QUIESCENT"; 4411 case QLA8XXX_DEV_FAILED: 4412 return "FAILED"; 4413 case QLA8XXX_DEV_QUIESCENT: 4414 return "QUIESCENT"; 4415 default: 4416 return "Unknown"; 4417 } 4418 } 4419 4420 /* Assumes idc-lock always held on entry */ 4421 void 4422 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 4423 { 4424 struct qla_hw_data *ha = vha->hw; 4425 uint32_t idc_audit_reg = 0, duration_secs = 0; 4426 4427 switch (audit_type) { 4428 case IDC_AUDIT_TIMESTAMP: 4429 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 4430 idc_audit_reg = (ha->portnum) | 4431 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 4432 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 4433 break; 4434 4435 case IDC_AUDIT_COMPLETION: 4436 duration_secs = ((jiffies_to_msecs(jiffies) - 4437 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 4438 idc_audit_reg = (ha->portnum) | 4439 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 4440 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 4441 break; 4442 4443 default: 4444 ql_log(ql_log_warn, vha, 0xb078, 4445 "Invalid audit type specified.\n"); 4446 break; 4447 } 4448 } 4449 4450 /* Assumes idc_lock always held on entry */ 4451 static int 4452 qla83xx_initiating_reset(scsi_qla_host_t *vha) 4453 { 4454 struct qla_hw_data *ha = vha->hw; 4455 uint32_t idc_control, dev_state; 4456 4457 __qla83xx_get_idc_control(vha, &idc_control); 4458 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 4459 ql_log(ql_log_info, vha, 0xb080, 4460 "NIC Core reset has been disabled. idc-control=0x%x\n", 4461 idc_control); 4462 return QLA_FUNCTION_FAILED; 4463 } 4464 4465 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 4466 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 4467 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 4468 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 4469 QLA8XXX_DEV_NEED_RESET); 4470 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 4471 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 4472 } else { 4473 const char *state = qla83xx_dev_state_to_string(dev_state); 4474 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 4475 4476 /* SV: XXX: Is timeout required here? */ 4477 /* Wait for IDC state change READY -> NEED_RESET */ 4478 while (dev_state == QLA8XXX_DEV_READY) { 4479 qla83xx_idc_unlock(vha, 0); 4480 msleep(200); 4481 qla83xx_idc_lock(vha, 0); 4482 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 4483 } 4484 } 4485 4486 /* Send IDC ack by writing to drv-ack register */ 4487 __qla83xx_set_drv_ack(vha); 4488 4489 return QLA_SUCCESS; 4490 } 4491 4492 int 4493 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 4494 { 4495 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 4496 } 4497 4498 int 4499 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 4500 { 4501 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 4502 } 4503 4504 static int 4505 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 4506 { 4507 uint32_t drv_presence = 0; 4508 struct qla_hw_data *ha = vha->hw; 4509 4510 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 4511 if (drv_presence & (1 << ha->portnum)) 4512 return QLA_SUCCESS; 4513 else 4514 return QLA_TEST_FAILED; 4515 } 4516 4517 int 4518 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 4519 { 4520 int rval = QLA_SUCCESS; 4521 struct qla_hw_data *ha = vha->hw; 4522 4523 ql_dbg(ql_dbg_p3p, vha, 0xb058, 4524 "Entered %s().\n", __func__); 4525 4526 if (vha->device_flags & DFLG_DEV_FAILED) { 4527 ql_log(ql_log_warn, vha, 0xb059, 4528 "Device in unrecoverable FAILED state.\n"); 4529 return QLA_FUNCTION_FAILED; 4530 } 4531 4532 qla83xx_idc_lock(vha, 0); 4533 4534 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 4535 ql_log(ql_log_warn, vha, 0xb05a, 4536 "Function=0x%x has been removed from IDC participation.\n", 4537 ha->portnum); 4538 rval = QLA_FUNCTION_FAILED; 4539 goto exit; 4540 } 4541 4542 qla83xx_reset_ownership(vha); 4543 4544 rval = qla83xx_initiating_reset(vha); 4545 4546 /* 4547 * Perform reset if we are the reset-owner, 4548 * else wait till IDC state changes to READY/FAILED. 4549 */ 4550 if (rval == QLA_SUCCESS) { 4551 rval = qla83xx_idc_state_handler(vha); 4552 4553 if (rval == QLA_SUCCESS) 4554 ha->flags.nic_core_hung = 0; 4555 __qla83xx_clear_drv_ack(vha); 4556 } 4557 4558 exit: 4559 qla83xx_idc_unlock(vha, 0); 4560 4561 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 4562 4563 return rval; 4564 } 4565 4566 int 4567 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 4568 { 4569 struct qla_hw_data *ha = vha->hw; 4570 int rval = QLA_FUNCTION_FAILED; 4571 4572 if (!IS_MCTP_CAPABLE(ha)) { 4573 /* This message can be removed from the final version */ 4574 ql_log(ql_log_info, vha, 0x506d, 4575 "This board is not MCTP capable\n"); 4576 return rval; 4577 } 4578 4579 if (!ha->mctp_dump) { 4580 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 4581 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 4582 4583 if (!ha->mctp_dump) { 4584 ql_log(ql_log_warn, vha, 0x506e, 4585 "Failed to allocate memory for mctp dump\n"); 4586 return rval; 4587 } 4588 } 4589 4590 #define MCTP_DUMP_STR_ADDR 0x00000000 4591 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 4592 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 4593 if (rval != QLA_SUCCESS) { 4594 ql_log(ql_log_warn, vha, 0x506f, 4595 "Failed to capture mctp dump\n"); 4596 } else { 4597 ql_log(ql_log_info, vha, 0x5070, 4598 "Mctp dump capture for host (%ld/%p).\n", 4599 vha->host_no, ha->mctp_dump); 4600 ha->mctp_dumped = 1; 4601 } 4602 4603 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 4604 ha->flags.nic_core_reset_hdlr_active = 1; 4605 rval = qla83xx_restart_nic_firmware(vha); 4606 if (rval) 4607 /* NIC Core reset failed. */ 4608 ql_log(ql_log_warn, vha, 0x5071, 4609 "Failed to restart nic firmware\n"); 4610 else 4611 ql_dbg(ql_dbg_p3p, vha, 0xb084, 4612 "Restarted NIC firmware successfully.\n"); 4613 ha->flags.nic_core_reset_hdlr_active = 0; 4614 } 4615 4616 return rval; 4617 4618 } 4619 4620 /* 4621 * qla2x00_quiesce_io 4622 * Description: This function will block the new I/Os 4623 * Its not aborting any I/Os as context 4624 * is not destroyed during quiescence 4625 * Arguments: scsi_qla_host_t 4626 * return : void 4627 */ 4628 void 4629 qla2x00_quiesce_io(scsi_qla_host_t *vha) 4630 { 4631 struct qla_hw_data *ha = vha->hw; 4632 struct scsi_qla_host *vp; 4633 4634 ql_dbg(ql_dbg_dpc, vha, 0x401d, 4635 "Quiescing I/O - ha=%p.\n", ha); 4636 4637 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 4638 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 4639 atomic_set(&vha->loop_state, LOOP_DOWN); 4640 qla2x00_mark_all_devices_lost(vha, 0); 4641 list_for_each_entry(vp, &ha->vp_list, list) 4642 qla2x00_mark_all_devices_lost(vp, 0); 4643 } else { 4644 if (!atomic_read(&vha->loop_down_timer)) 4645 atomic_set(&vha->loop_down_timer, 4646 LOOP_DOWN_TIME); 4647 } 4648 /* Wait for pending cmds to complete */ 4649 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 4650 } 4651 4652 void 4653 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 4654 { 4655 struct qla_hw_data *ha = vha->hw; 4656 struct scsi_qla_host *vp; 4657 unsigned long flags; 4658 fc_port_t *fcport; 4659 4660 /* For ISP82XX, driver waits for completion of the commands. 4661 * online flag should be set. 4662 */ 4663 if (!(IS_P3P_TYPE(ha))) 4664 vha->flags.online = 0; 4665 ha->flags.chip_reset_done = 0; 4666 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4667 vha->qla_stats.total_isp_aborts++; 4668 4669 ql_log(ql_log_info, vha, 0x00af, 4670 "Performing ISP error recovery - ha=%p.\n", ha); 4671 4672 /* For ISP82XX, reset_chip is just disabling interrupts. 4673 * Driver waits for the completion of the commands. 4674 * the interrupts need to be enabled. 4675 */ 4676 if (!(IS_P3P_TYPE(ha))) 4677 ha->isp_ops->reset_chip(vha); 4678 4679 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 4680 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 4681 atomic_set(&vha->loop_state, LOOP_DOWN); 4682 qla2x00_mark_all_devices_lost(vha, 0); 4683 4684 spin_lock_irqsave(&ha->vport_slock, flags); 4685 list_for_each_entry(vp, &ha->vp_list, list) { 4686 atomic_inc(&vp->vref_count); 4687 spin_unlock_irqrestore(&ha->vport_slock, flags); 4688 4689 qla2x00_mark_all_devices_lost(vp, 0); 4690 4691 spin_lock_irqsave(&ha->vport_slock, flags); 4692 atomic_dec(&vp->vref_count); 4693 } 4694 spin_unlock_irqrestore(&ha->vport_slock, flags); 4695 } else { 4696 if (!atomic_read(&vha->loop_down_timer)) 4697 atomic_set(&vha->loop_down_timer, 4698 LOOP_DOWN_TIME); 4699 } 4700 4701 /* Clear all async request states across all VPs. */ 4702 list_for_each_entry(fcport, &vha->vp_fcports, list) 4703 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4704 spin_lock_irqsave(&ha->vport_slock, flags); 4705 list_for_each_entry(vp, &ha->vp_list, list) { 4706 atomic_inc(&vp->vref_count); 4707 spin_unlock_irqrestore(&ha->vport_slock, flags); 4708 4709 list_for_each_entry(fcport, &vp->vp_fcports, list) 4710 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4711 4712 spin_lock_irqsave(&ha->vport_slock, flags); 4713 atomic_dec(&vp->vref_count); 4714 } 4715 spin_unlock_irqrestore(&ha->vport_slock, flags); 4716 4717 if (!ha->flags.eeh_busy) { 4718 /* Make sure for ISP 82XX IO DMA is complete */ 4719 if (IS_P3P_TYPE(ha)) { 4720 qla82xx_chip_reset_cleanup(vha); 4721 ql_log(ql_log_info, vha, 0x00b4, 4722 "Done chip reset cleanup.\n"); 4723 4724 /* Done waiting for pending commands. 4725 * Reset the online flag. 4726 */ 4727 vha->flags.online = 0; 4728 } 4729 4730 /* Requeue all commands in outstanding command list. */ 4731 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 4732 } 4733 4734 ha->chip_reset++; 4735 /* memory barrier */ 4736 wmb(); 4737 } 4738 4739 /* 4740 * qla2x00_abort_isp 4741 * Resets ISP and aborts all outstanding commands. 4742 * 4743 * Input: 4744 * ha = adapter block pointer. 4745 * 4746 * Returns: 4747 * 0 = success 4748 */ 4749 int 4750 qla2x00_abort_isp(scsi_qla_host_t *vha) 4751 { 4752 int rval; 4753 uint8_t status = 0; 4754 struct qla_hw_data *ha = vha->hw; 4755 struct scsi_qla_host *vp; 4756 struct req_que *req = ha->req_q_map[0]; 4757 unsigned long flags; 4758 4759 if (vha->flags.online) { 4760 qla2x00_abort_isp_cleanup(vha); 4761 4762 if (IS_QLA8031(ha)) { 4763 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 4764 "Clearing fcoe driver presence.\n"); 4765 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 4766 ql_dbg(ql_dbg_p3p, vha, 0xb073, 4767 "Error while clearing DRV-Presence.\n"); 4768 } 4769 4770 if (unlikely(pci_channel_offline(ha->pdev) && 4771 ha->flags.pci_channel_io_perm_failure)) { 4772 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4773 status = 0; 4774 return status; 4775 } 4776 4777 ha->isp_ops->get_flash_version(vha, req->ring); 4778 4779 ha->isp_ops->nvram_config(vha); 4780 4781 if (!qla2x00_restart_isp(vha)) { 4782 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4783 4784 if (!atomic_read(&vha->loop_down_timer)) { 4785 /* 4786 * Issue marker command only when we are going 4787 * to start the I/O . 4788 */ 4789 vha->marker_needed = 1; 4790 } 4791 4792 vha->flags.online = 1; 4793 4794 ha->isp_ops->enable_intrs(ha); 4795 4796 ha->isp_abort_cnt = 0; 4797 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4798 4799 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 4800 qla2x00_get_fw_version(vha); 4801 if (ha->fce) { 4802 ha->flags.fce_enabled = 1; 4803 memset(ha->fce, 0, 4804 fce_calc_size(ha->fce_bufs)); 4805 rval = qla2x00_enable_fce_trace(vha, 4806 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 4807 &ha->fce_bufs); 4808 if (rval) { 4809 ql_log(ql_log_warn, vha, 0x8033, 4810 "Unable to reinitialize FCE " 4811 "(%d).\n", rval); 4812 ha->flags.fce_enabled = 0; 4813 } 4814 } 4815 4816 if (ha->eft) { 4817 memset(ha->eft, 0, EFT_SIZE); 4818 rval = qla2x00_enable_eft_trace(vha, 4819 ha->eft_dma, EFT_NUM_BUFFERS); 4820 if (rval) { 4821 ql_log(ql_log_warn, vha, 0x8034, 4822 "Unable to reinitialize EFT " 4823 "(%d).\n", rval); 4824 } 4825 } 4826 } else { /* failed the ISP abort */ 4827 vha->flags.online = 1; 4828 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 4829 if (ha->isp_abort_cnt == 0) { 4830 ql_log(ql_log_fatal, vha, 0x8035, 4831 "ISP error recover failed - " 4832 "board disabled.\n"); 4833 /* 4834 * The next call disables the board 4835 * completely. 4836 */ 4837 ha->isp_ops->reset_adapter(vha); 4838 vha->flags.online = 0; 4839 clear_bit(ISP_ABORT_RETRY, 4840 &vha->dpc_flags); 4841 status = 0; 4842 } else { /* schedule another ISP abort */ 4843 ha->isp_abort_cnt--; 4844 ql_dbg(ql_dbg_taskm, vha, 0x8020, 4845 "ISP abort - retry remaining %d.\n", 4846 ha->isp_abort_cnt); 4847 status = 1; 4848 } 4849 } else { 4850 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 4851 ql_dbg(ql_dbg_taskm, vha, 0x8021, 4852 "ISP error recovery - retrying (%d) " 4853 "more times.\n", ha->isp_abort_cnt); 4854 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4855 status = 1; 4856 } 4857 } 4858 4859 } 4860 4861 if (!status) { 4862 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 4863 4864 spin_lock_irqsave(&ha->vport_slock, flags); 4865 list_for_each_entry(vp, &ha->vp_list, list) { 4866 if (vp->vp_idx) { 4867 atomic_inc(&vp->vref_count); 4868 spin_unlock_irqrestore(&ha->vport_slock, flags); 4869 4870 qla2x00_vp_abort_isp(vp); 4871 4872 spin_lock_irqsave(&ha->vport_slock, flags); 4873 atomic_dec(&vp->vref_count); 4874 } 4875 } 4876 spin_unlock_irqrestore(&ha->vport_slock, flags); 4877 4878 if (IS_QLA8031(ha)) { 4879 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 4880 "Setting back fcoe driver presence.\n"); 4881 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 4882 ql_dbg(ql_dbg_p3p, vha, 0xb074, 4883 "Error while setting DRV-Presence.\n"); 4884 } 4885 } else { 4886 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 4887 __func__); 4888 } 4889 4890 return(status); 4891 } 4892 4893 /* 4894 * qla2x00_restart_isp 4895 * restarts the ISP after a reset 4896 * 4897 * Input: 4898 * ha = adapter block pointer. 4899 * 4900 * Returns: 4901 * 0 = success 4902 */ 4903 static int 4904 qla2x00_restart_isp(scsi_qla_host_t *vha) 4905 { 4906 int status = 0; 4907 struct qla_hw_data *ha = vha->hw; 4908 struct req_que *req = ha->req_q_map[0]; 4909 struct rsp_que *rsp = ha->rsp_q_map[0]; 4910 unsigned long flags; 4911 4912 /* If firmware needs to be loaded */ 4913 if (qla2x00_isp_firmware(vha)) { 4914 vha->flags.online = 0; 4915 status = ha->isp_ops->chip_diag(vha); 4916 if (!status) 4917 status = qla2x00_setup_chip(vha); 4918 } 4919 4920 if (!status && !(status = qla2x00_init_rings(vha))) { 4921 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4922 ha->flags.chip_reset_done = 1; 4923 4924 /* Initialize the queues in use */ 4925 qla25xx_init_queues(ha); 4926 4927 status = qla2x00_fw_ready(vha); 4928 if (!status) { 4929 /* Issue a marker after FW becomes ready. */ 4930 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 4931 4932 vha->flags.online = 1; 4933 4934 /* 4935 * Process any ATIO queue entries that came in 4936 * while we weren't online. 4937 */ 4938 spin_lock_irqsave(&ha->hardware_lock, flags); 4939 if (qla_tgt_mode_enabled(vha)) 4940 qlt_24xx_process_atio_queue(vha); 4941 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4942 4943 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4944 } 4945 4946 /* if no cable then assume it's good */ 4947 if ((vha->device_flags & DFLG_NO_CABLE)) 4948 status = 0; 4949 } 4950 return (status); 4951 } 4952 4953 static int 4954 qla25xx_init_queues(struct qla_hw_data *ha) 4955 { 4956 struct rsp_que *rsp = NULL; 4957 struct req_que *req = NULL; 4958 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 4959 int ret = -1; 4960 int i; 4961 4962 for (i = 1; i < ha->max_rsp_queues; i++) { 4963 rsp = ha->rsp_q_map[i]; 4964 if (rsp) { 4965 rsp->options &= ~BIT_0; 4966 ret = qla25xx_init_rsp_que(base_vha, rsp); 4967 if (ret != QLA_SUCCESS) 4968 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 4969 "%s Rsp que: %d init failed.\n", 4970 __func__, rsp->id); 4971 else 4972 ql_dbg(ql_dbg_init, base_vha, 0x0100, 4973 "%s Rsp que: %d inited.\n", 4974 __func__, rsp->id); 4975 } 4976 } 4977 for (i = 1; i < ha->max_req_queues; i++) { 4978 req = ha->req_q_map[i]; 4979 if (req) { 4980 /* Clear outstanding commands array. */ 4981 req->options &= ~BIT_0; 4982 ret = qla25xx_init_req_que(base_vha, req); 4983 if (ret != QLA_SUCCESS) 4984 ql_dbg(ql_dbg_init, base_vha, 0x0101, 4985 "%s Req que: %d init failed.\n", 4986 __func__, req->id); 4987 else 4988 ql_dbg(ql_dbg_init, base_vha, 0x0102, 4989 "%s Req que: %d inited.\n", 4990 __func__, req->id); 4991 } 4992 } 4993 return ret; 4994 } 4995 4996 /* 4997 * qla2x00_reset_adapter 4998 * Reset adapter. 4999 * 5000 * Input: 5001 * ha = adapter block pointer. 5002 */ 5003 void 5004 qla2x00_reset_adapter(scsi_qla_host_t *vha) 5005 { 5006 unsigned long flags = 0; 5007 struct qla_hw_data *ha = vha->hw; 5008 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 5009 5010 vha->flags.online = 0; 5011 ha->isp_ops->disable_intrs(ha); 5012 5013 spin_lock_irqsave(&ha->hardware_lock, flags); 5014 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 5015 RD_REG_WORD(®->hccr); /* PCI Posting. */ 5016 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 5017 RD_REG_WORD(®->hccr); /* PCI Posting. */ 5018 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5019 } 5020 5021 void 5022 qla24xx_reset_adapter(scsi_qla_host_t *vha) 5023 { 5024 unsigned long flags = 0; 5025 struct qla_hw_data *ha = vha->hw; 5026 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 5027 5028 if (IS_P3P_TYPE(ha)) 5029 return; 5030 5031 vha->flags.online = 0; 5032 ha->isp_ops->disable_intrs(ha); 5033 5034 spin_lock_irqsave(&ha->hardware_lock, flags); 5035 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 5036 RD_REG_DWORD(®->hccr); 5037 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 5038 RD_REG_DWORD(®->hccr); 5039 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5040 5041 if (IS_NOPOLLING_TYPE(ha)) 5042 ha->isp_ops->enable_intrs(ha); 5043 } 5044 5045 /* On sparc systems, obtain port and node WWN from firmware 5046 * properties. 5047 */ 5048 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 5049 struct nvram_24xx *nv) 5050 { 5051 #ifdef CONFIG_SPARC 5052 struct qla_hw_data *ha = vha->hw; 5053 struct pci_dev *pdev = ha->pdev; 5054 struct device_node *dp = pci_device_to_OF_node(pdev); 5055 const u8 *val; 5056 int len; 5057 5058 val = of_get_property(dp, "port-wwn", &len); 5059 if (val && len >= WWN_SIZE) 5060 memcpy(nv->port_name, val, WWN_SIZE); 5061 5062 val = of_get_property(dp, "node-wwn", &len); 5063 if (val && len >= WWN_SIZE) 5064 memcpy(nv->node_name, val, WWN_SIZE); 5065 #endif 5066 } 5067 5068 int 5069 qla24xx_nvram_config(scsi_qla_host_t *vha) 5070 { 5071 int rval; 5072 struct init_cb_24xx *icb; 5073 struct nvram_24xx *nv; 5074 uint32_t *dptr; 5075 uint8_t *dptr1, *dptr2; 5076 uint32_t chksum; 5077 uint16_t cnt; 5078 struct qla_hw_data *ha = vha->hw; 5079 5080 rval = QLA_SUCCESS; 5081 icb = (struct init_cb_24xx *)ha->init_cb; 5082 nv = ha->nvram; 5083 5084 /* Determine NVRAM starting address. */ 5085 if (ha->port_no == 0) { 5086 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 5087 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 5088 } else { 5089 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 5090 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 5091 } 5092 5093 ha->nvram_size = sizeof(struct nvram_24xx); 5094 ha->vpd_size = FA_NVRAM_VPD_SIZE; 5095 5096 /* Get VPD data into cache */ 5097 ha->vpd = ha->nvram + VPD_OFFSET; 5098 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 5099 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 5100 5101 /* Get NVRAM data into cache and calculate checksum. */ 5102 dptr = (uint32_t *)nv; 5103 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 5104 ha->nvram_size); 5105 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 5106 chksum += le32_to_cpu(*dptr++); 5107 5108 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 5109 "Contents of NVRAM\n"); 5110 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 5111 (uint8_t *)nv, ha->nvram_size); 5112 5113 /* Bad NVRAM data, set defaults parameters. */ 5114 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 5115 || nv->id[3] != ' ' || 5116 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 5117 /* Reset NVRAM data. */ 5118 ql_log(ql_log_warn, vha, 0x006b, 5119 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 5120 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 5121 ql_log(ql_log_warn, vha, 0x006c, 5122 "Falling back to functioning (yet invalid -- WWPN) " 5123 "defaults.\n"); 5124 5125 /* 5126 * Set default initialization control block. 5127 */ 5128 memset(nv, 0, ha->nvram_size); 5129 nv->nvram_version = cpu_to_le16(ICB_VERSION); 5130 nv->version = cpu_to_le16(ICB_VERSION); 5131 nv->frame_payload_size = 2048; 5132 nv->execution_throttle = cpu_to_le16(0xFFFF); 5133 nv->exchange_count = cpu_to_le16(0); 5134 nv->hard_address = cpu_to_le16(124); 5135 nv->port_name[0] = 0x21; 5136 nv->port_name[1] = 0x00 + ha->port_no + 1; 5137 nv->port_name[2] = 0x00; 5138 nv->port_name[3] = 0xe0; 5139 nv->port_name[4] = 0x8b; 5140 nv->port_name[5] = 0x1c; 5141 nv->port_name[6] = 0x55; 5142 nv->port_name[7] = 0x86; 5143 nv->node_name[0] = 0x20; 5144 nv->node_name[1] = 0x00; 5145 nv->node_name[2] = 0x00; 5146 nv->node_name[3] = 0xe0; 5147 nv->node_name[4] = 0x8b; 5148 nv->node_name[5] = 0x1c; 5149 nv->node_name[6] = 0x55; 5150 nv->node_name[7] = 0x86; 5151 qla24xx_nvram_wwn_from_ofw(vha, nv); 5152 nv->login_retry_count = cpu_to_le16(8); 5153 nv->interrupt_delay_timer = cpu_to_le16(0); 5154 nv->login_timeout = cpu_to_le16(0); 5155 nv->firmware_options_1 = 5156 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 5157 nv->firmware_options_2 = cpu_to_le32(2 << 4); 5158 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 5159 nv->firmware_options_3 = cpu_to_le32(2 << 13); 5160 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 5161 nv->efi_parameters = cpu_to_le32(0); 5162 nv->reset_delay = 5; 5163 nv->max_luns_per_target = cpu_to_le16(128); 5164 nv->port_down_retry_count = cpu_to_le16(30); 5165 nv->link_down_timeout = cpu_to_le16(30); 5166 5167 rval = 1; 5168 } 5169 5170 if (!qla_ini_mode_enabled(vha)) { 5171 /* Don't enable full login after initial LIP */ 5172 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 5173 /* Don't enable LIP full login for initiator */ 5174 nv->host_p &= cpu_to_le32(~BIT_10); 5175 } 5176 5177 qlt_24xx_config_nvram_stage1(vha, nv); 5178 5179 /* Reset Initialization control block */ 5180 memset(icb, 0, ha->init_cb_size); 5181 5182 /* Copy 1st segment. */ 5183 dptr1 = (uint8_t *)icb; 5184 dptr2 = (uint8_t *)&nv->version; 5185 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 5186 while (cnt--) 5187 *dptr1++ = *dptr2++; 5188 5189 icb->login_retry_count = nv->login_retry_count; 5190 icb->link_down_on_nos = nv->link_down_on_nos; 5191 5192 /* Copy 2nd segment. */ 5193 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 5194 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 5195 cnt = (uint8_t *)&icb->reserved_3 - 5196 (uint8_t *)&icb->interrupt_delay_timer; 5197 while (cnt--) 5198 *dptr1++ = *dptr2++; 5199 5200 /* 5201 * Setup driver NVRAM options. 5202 */ 5203 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 5204 "QLA2462"); 5205 5206 qlt_24xx_config_nvram_stage2(vha, icb); 5207 5208 if (nv->host_p & cpu_to_le32(BIT_15)) { 5209 /* Use alternate WWN? */ 5210 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5211 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5212 } 5213 5214 /* Prepare nodename */ 5215 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 5216 /* 5217 * Firmware will apply the following mask if the nodename was 5218 * not provided. 5219 */ 5220 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5221 icb->node_name[0] &= 0xF0; 5222 } 5223 5224 /* Set host adapter parameters. */ 5225 ha->flags.disable_risc_code_load = 0; 5226 ha->flags.enable_lip_reset = 0; 5227 ha->flags.enable_lip_full_login = 5228 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 5229 ha->flags.enable_target_reset = 5230 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 5231 ha->flags.enable_led_scheme = 0; 5232 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 5233 5234 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 5235 (BIT_6 | BIT_5 | BIT_4)) >> 4; 5236 5237 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 5238 sizeof(ha->fw_seriallink_options24)); 5239 5240 /* save HBA serial number */ 5241 ha->serial0 = icb->port_name[5]; 5242 ha->serial1 = icb->port_name[6]; 5243 ha->serial2 = icb->port_name[7]; 5244 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5245 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5246 5247 icb->execution_throttle = cpu_to_le16(0xFFFF); 5248 5249 ha->retry_count = le16_to_cpu(nv->login_retry_count); 5250 5251 /* Set minimum login_timeout to 4 seconds. */ 5252 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 5253 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 5254 if (le16_to_cpu(nv->login_timeout) < 4) 5255 nv->login_timeout = cpu_to_le16(4); 5256 ha->login_timeout = le16_to_cpu(nv->login_timeout); 5257 icb->login_timeout = nv->login_timeout; 5258 5259 /* Set minimum RATOV to 100 tenths of a second. */ 5260 ha->r_a_tov = 100; 5261 5262 ha->loop_reset_delay = nv->reset_delay; 5263 5264 /* Link Down Timeout = 0: 5265 * 5266 * When Port Down timer expires we will start returning 5267 * I/O's to OS with "DID_NO_CONNECT". 5268 * 5269 * Link Down Timeout != 0: 5270 * 5271 * The driver waits for the link to come up after link down 5272 * before returning I/Os to OS with "DID_NO_CONNECT". 5273 */ 5274 if (le16_to_cpu(nv->link_down_timeout) == 0) { 5275 ha->loop_down_abort_time = 5276 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5277 } else { 5278 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 5279 ha->loop_down_abort_time = 5280 (LOOP_DOWN_TIME - ha->link_down_timeout); 5281 } 5282 5283 /* Need enough time to try and get the port back. */ 5284 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 5285 if (qlport_down_retry) 5286 ha->port_down_retry_count = qlport_down_retry; 5287 5288 /* Set login_retry_count */ 5289 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 5290 if (ha->port_down_retry_count == 5291 le16_to_cpu(nv->port_down_retry_count) && 5292 ha->port_down_retry_count > 3) 5293 ha->login_retry_count = ha->port_down_retry_count; 5294 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5295 ha->login_retry_count = ha->port_down_retry_count; 5296 if (ql2xloginretrycount) 5297 ha->login_retry_count = ql2xloginretrycount; 5298 5299 /* Enable ZIO. */ 5300 if (!vha->flags.init_done) { 5301 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 5302 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5303 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 5304 le16_to_cpu(icb->interrupt_delay_timer): 2; 5305 } 5306 icb->firmware_options_2 &= cpu_to_le32( 5307 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 5308 vha->flags.process_response_queue = 0; 5309 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5310 ha->zio_mode = QLA_ZIO_MODE_6; 5311 5312 ql_log(ql_log_info, vha, 0x006f, 5313 "ZIO mode %d enabled; timer delay (%d us).\n", 5314 ha->zio_mode, ha->zio_timer * 100); 5315 5316 icb->firmware_options_2 |= cpu_to_le32( 5317 (uint32_t)ha->zio_mode); 5318 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 5319 vha->flags.process_response_queue = 1; 5320 } 5321 5322 if (rval) { 5323 ql_log(ql_log_warn, vha, 0x0070, 5324 "NVRAM configuration failed.\n"); 5325 } 5326 return (rval); 5327 } 5328 5329 static int 5330 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 5331 uint32_t faddr) 5332 { 5333 int rval = QLA_SUCCESS; 5334 int segments, fragment; 5335 uint32_t *dcode, dlen; 5336 uint32_t risc_addr; 5337 uint32_t risc_size; 5338 uint32_t i; 5339 struct qla_hw_data *ha = vha->hw; 5340 struct req_que *req = ha->req_q_map[0]; 5341 5342 ql_dbg(ql_dbg_init, vha, 0x008b, 5343 "FW: Loading firmware from flash (%x).\n", faddr); 5344 5345 rval = QLA_SUCCESS; 5346 5347 segments = FA_RISC_CODE_SEGMENTS; 5348 dcode = (uint32_t *)req->ring; 5349 *srisc_addr = 0; 5350 5351 /* Validate firmware image by checking version. */ 5352 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 5353 for (i = 0; i < 4; i++) 5354 dcode[i] = be32_to_cpu(dcode[i]); 5355 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 5356 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 5357 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 5358 dcode[3] == 0)) { 5359 ql_log(ql_log_fatal, vha, 0x008c, 5360 "Unable to verify the integrity of flash firmware " 5361 "image.\n"); 5362 ql_log(ql_log_fatal, vha, 0x008d, 5363 "Firmware data: %08x %08x %08x %08x.\n", 5364 dcode[0], dcode[1], dcode[2], dcode[3]); 5365 5366 return QLA_FUNCTION_FAILED; 5367 } 5368 5369 while (segments && rval == QLA_SUCCESS) { 5370 /* Read segment's load information. */ 5371 qla24xx_read_flash_data(vha, dcode, faddr, 4); 5372 5373 risc_addr = be32_to_cpu(dcode[2]); 5374 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 5375 risc_size = be32_to_cpu(dcode[3]); 5376 5377 fragment = 0; 5378 while (risc_size > 0 && rval == QLA_SUCCESS) { 5379 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 5380 if (dlen > risc_size) 5381 dlen = risc_size; 5382 5383 ql_dbg(ql_dbg_init, vha, 0x008e, 5384 "Loading risc segment@ risc addr %x " 5385 "number of dwords 0x%x offset 0x%x.\n", 5386 risc_addr, dlen, faddr); 5387 5388 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 5389 for (i = 0; i < dlen; i++) 5390 dcode[i] = swab32(dcode[i]); 5391 5392 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5393 dlen); 5394 if (rval) { 5395 ql_log(ql_log_fatal, vha, 0x008f, 5396 "Failed to load segment %d of firmware.\n", 5397 fragment); 5398 return QLA_FUNCTION_FAILED; 5399 } 5400 5401 faddr += dlen; 5402 risc_addr += dlen; 5403 risc_size -= dlen; 5404 fragment++; 5405 } 5406 5407 /* Next segment. */ 5408 segments--; 5409 } 5410 5411 if (!IS_QLA27XX(ha)) 5412 return rval; 5413 5414 if (ha->fw_dump_template) 5415 vfree(ha->fw_dump_template); 5416 ha->fw_dump_template = NULL; 5417 ha->fw_dump_template_len = 0; 5418 5419 ql_dbg(ql_dbg_init, vha, 0x0161, 5420 "Loading fwdump template from %x\n", faddr); 5421 qla24xx_read_flash_data(vha, dcode, faddr, 7); 5422 risc_size = be32_to_cpu(dcode[2]); 5423 ql_dbg(ql_dbg_init, vha, 0x0162, 5424 "-> array size %x dwords\n", risc_size); 5425 if (risc_size == 0 || risc_size == ~0) 5426 goto default_template; 5427 5428 dlen = (risc_size - 8) * sizeof(*dcode); 5429 ql_dbg(ql_dbg_init, vha, 0x0163, 5430 "-> template allocating %x bytes...\n", dlen); 5431 ha->fw_dump_template = vmalloc(dlen); 5432 if (!ha->fw_dump_template) { 5433 ql_log(ql_log_warn, vha, 0x0164, 5434 "Failed fwdump template allocate %x bytes.\n", risc_size); 5435 goto default_template; 5436 } 5437 5438 faddr += 7; 5439 risc_size -= 8; 5440 dcode = ha->fw_dump_template; 5441 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 5442 for (i = 0; i < risc_size; i++) 5443 dcode[i] = le32_to_cpu(dcode[i]); 5444 5445 if (!qla27xx_fwdt_template_valid(dcode)) { 5446 ql_log(ql_log_warn, vha, 0x0165, 5447 "Failed fwdump template validate\n"); 5448 goto default_template; 5449 } 5450 5451 dlen = qla27xx_fwdt_template_size(dcode); 5452 ql_dbg(ql_dbg_init, vha, 0x0166, 5453 "-> template size %x bytes\n", dlen); 5454 if (dlen > risc_size * sizeof(*dcode)) { 5455 ql_log(ql_log_warn, vha, 0x0167, 5456 "Failed fwdump template exceeds array by %x bytes\n", 5457 (uint32_t)(dlen - risc_size * sizeof(*dcode))); 5458 goto default_template; 5459 } 5460 ha->fw_dump_template_len = dlen; 5461 return rval; 5462 5463 default_template: 5464 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 5465 if (ha->fw_dump_template) 5466 vfree(ha->fw_dump_template); 5467 ha->fw_dump_template = NULL; 5468 ha->fw_dump_template_len = 0; 5469 5470 dlen = qla27xx_fwdt_template_default_size(); 5471 ql_dbg(ql_dbg_init, vha, 0x0169, 5472 "-> template allocating %x bytes...\n", dlen); 5473 ha->fw_dump_template = vmalloc(dlen); 5474 if (!ha->fw_dump_template) { 5475 ql_log(ql_log_warn, vha, 0x016a, 5476 "Failed fwdump template allocate %x bytes.\n", risc_size); 5477 goto failed_template; 5478 } 5479 5480 dcode = ha->fw_dump_template; 5481 risc_size = dlen / sizeof(*dcode); 5482 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 5483 for (i = 0; i < risc_size; i++) 5484 dcode[i] = be32_to_cpu(dcode[i]); 5485 5486 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 5487 ql_log(ql_log_warn, vha, 0x016b, 5488 "Failed fwdump template validate\n"); 5489 goto failed_template; 5490 } 5491 5492 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 5493 ql_dbg(ql_dbg_init, vha, 0x016c, 5494 "-> template size %x bytes\n", dlen); 5495 ha->fw_dump_template_len = dlen; 5496 return rval; 5497 5498 failed_template: 5499 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 5500 if (ha->fw_dump_template) 5501 vfree(ha->fw_dump_template); 5502 ha->fw_dump_template = NULL; 5503 ha->fw_dump_template_len = 0; 5504 return rval; 5505 } 5506 5507 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 5508 5509 int 5510 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5511 { 5512 int rval; 5513 int i, fragment; 5514 uint16_t *wcode, *fwcode; 5515 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 5516 struct fw_blob *blob; 5517 struct qla_hw_data *ha = vha->hw; 5518 struct req_que *req = ha->req_q_map[0]; 5519 5520 /* Load firmware blob. */ 5521 blob = qla2x00_request_firmware(vha); 5522 if (!blob) { 5523 ql_log(ql_log_info, vha, 0x0083, 5524 "Firmware image unavailable.\n"); 5525 ql_log(ql_log_info, vha, 0x0084, 5526 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 5527 return QLA_FUNCTION_FAILED; 5528 } 5529 5530 rval = QLA_SUCCESS; 5531 5532 wcode = (uint16_t *)req->ring; 5533 *srisc_addr = 0; 5534 fwcode = (uint16_t *)blob->fw->data; 5535 fwclen = 0; 5536 5537 /* Validate firmware image by checking version. */ 5538 if (blob->fw->size < 8 * sizeof(uint16_t)) { 5539 ql_log(ql_log_fatal, vha, 0x0085, 5540 "Unable to verify integrity of firmware image (%Zd).\n", 5541 blob->fw->size); 5542 goto fail_fw_integrity; 5543 } 5544 for (i = 0; i < 4; i++) 5545 wcode[i] = be16_to_cpu(fwcode[i + 4]); 5546 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 5547 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 5548 wcode[2] == 0 && wcode[3] == 0)) { 5549 ql_log(ql_log_fatal, vha, 0x0086, 5550 "Unable to verify integrity of firmware image.\n"); 5551 ql_log(ql_log_fatal, vha, 0x0087, 5552 "Firmware data: %04x %04x %04x %04x.\n", 5553 wcode[0], wcode[1], wcode[2], wcode[3]); 5554 goto fail_fw_integrity; 5555 } 5556 5557 seg = blob->segs; 5558 while (*seg && rval == QLA_SUCCESS) { 5559 risc_addr = *seg; 5560 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 5561 risc_size = be16_to_cpu(fwcode[3]); 5562 5563 /* Validate firmware image size. */ 5564 fwclen += risc_size * sizeof(uint16_t); 5565 if (blob->fw->size < fwclen) { 5566 ql_log(ql_log_fatal, vha, 0x0088, 5567 "Unable to verify integrity of firmware image " 5568 "(%Zd).\n", blob->fw->size); 5569 goto fail_fw_integrity; 5570 } 5571 5572 fragment = 0; 5573 while (risc_size > 0 && rval == QLA_SUCCESS) { 5574 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 5575 if (wlen > risc_size) 5576 wlen = risc_size; 5577 ql_dbg(ql_dbg_init, vha, 0x0089, 5578 "Loading risc segment@ risc addr %x number of " 5579 "words 0x%x.\n", risc_addr, wlen); 5580 5581 for (i = 0; i < wlen; i++) 5582 wcode[i] = swab16(fwcode[i]); 5583 5584 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5585 wlen); 5586 if (rval) { 5587 ql_log(ql_log_fatal, vha, 0x008a, 5588 "Failed to load segment %d of firmware.\n", 5589 fragment); 5590 break; 5591 } 5592 5593 fwcode += wlen; 5594 risc_addr += wlen; 5595 risc_size -= wlen; 5596 fragment++; 5597 } 5598 5599 /* Next segment. */ 5600 seg++; 5601 } 5602 return rval; 5603 5604 fail_fw_integrity: 5605 return QLA_FUNCTION_FAILED; 5606 } 5607 5608 static int 5609 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5610 { 5611 int rval; 5612 int segments, fragment; 5613 uint32_t *dcode, dlen; 5614 uint32_t risc_addr; 5615 uint32_t risc_size; 5616 uint32_t i; 5617 struct fw_blob *blob; 5618 const uint32_t *fwcode; 5619 uint32_t fwclen; 5620 struct qla_hw_data *ha = vha->hw; 5621 struct req_que *req = ha->req_q_map[0]; 5622 5623 /* Load firmware blob. */ 5624 blob = qla2x00_request_firmware(vha); 5625 if (!blob) { 5626 ql_log(ql_log_warn, vha, 0x0090, 5627 "Firmware image unavailable.\n"); 5628 ql_log(ql_log_warn, vha, 0x0091, 5629 "Firmware images can be retrieved from: " 5630 QLA_FW_URL ".\n"); 5631 5632 return QLA_FUNCTION_FAILED; 5633 } 5634 5635 ql_dbg(ql_dbg_init, vha, 0x0092, 5636 "FW: Loading via request-firmware.\n"); 5637 5638 rval = QLA_SUCCESS; 5639 5640 segments = FA_RISC_CODE_SEGMENTS; 5641 dcode = (uint32_t *)req->ring; 5642 *srisc_addr = 0; 5643 fwcode = (uint32_t *)blob->fw->data; 5644 fwclen = 0; 5645 5646 /* Validate firmware image by checking version. */ 5647 if (blob->fw->size < 8 * sizeof(uint32_t)) { 5648 ql_log(ql_log_fatal, vha, 0x0093, 5649 "Unable to verify integrity of firmware image (%Zd).\n", 5650 blob->fw->size); 5651 return QLA_FUNCTION_FAILED; 5652 } 5653 for (i = 0; i < 4; i++) 5654 dcode[i] = be32_to_cpu(fwcode[i + 4]); 5655 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 5656 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 5657 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 5658 dcode[3] == 0)) { 5659 ql_log(ql_log_fatal, vha, 0x0094, 5660 "Unable to verify integrity of firmware image (%Zd).\n", 5661 blob->fw->size); 5662 ql_log(ql_log_fatal, vha, 0x0095, 5663 "Firmware data: %08x %08x %08x %08x.\n", 5664 dcode[0], dcode[1], dcode[2], dcode[3]); 5665 return QLA_FUNCTION_FAILED; 5666 } 5667 5668 while (segments && rval == QLA_SUCCESS) { 5669 risc_addr = be32_to_cpu(fwcode[2]); 5670 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 5671 risc_size = be32_to_cpu(fwcode[3]); 5672 5673 /* Validate firmware image size. */ 5674 fwclen += risc_size * sizeof(uint32_t); 5675 if (blob->fw->size < fwclen) { 5676 ql_log(ql_log_fatal, vha, 0x0096, 5677 "Unable to verify integrity of firmware image " 5678 "(%Zd).\n", blob->fw->size); 5679 return QLA_FUNCTION_FAILED; 5680 } 5681 5682 fragment = 0; 5683 while (risc_size > 0 && rval == QLA_SUCCESS) { 5684 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 5685 if (dlen > risc_size) 5686 dlen = risc_size; 5687 5688 ql_dbg(ql_dbg_init, vha, 0x0097, 5689 "Loading risc segment@ risc addr %x " 5690 "number of dwords 0x%x.\n", risc_addr, dlen); 5691 5692 for (i = 0; i < dlen; i++) 5693 dcode[i] = swab32(fwcode[i]); 5694 5695 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5696 dlen); 5697 if (rval) { 5698 ql_log(ql_log_fatal, vha, 0x0098, 5699 "Failed to load segment %d of firmware.\n", 5700 fragment); 5701 return QLA_FUNCTION_FAILED; 5702 } 5703 5704 fwcode += dlen; 5705 risc_addr += dlen; 5706 risc_size -= dlen; 5707 fragment++; 5708 } 5709 5710 /* Next segment. */ 5711 segments--; 5712 } 5713 5714 if (!IS_QLA27XX(ha)) 5715 return rval; 5716 5717 if (ha->fw_dump_template) 5718 vfree(ha->fw_dump_template); 5719 ha->fw_dump_template = NULL; 5720 ha->fw_dump_template_len = 0; 5721 5722 ql_dbg(ql_dbg_init, vha, 0x171, 5723 "Loading fwdump template from %x\n", 5724 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 5725 risc_size = be32_to_cpu(fwcode[2]); 5726 ql_dbg(ql_dbg_init, vha, 0x172, 5727 "-> array size %x dwords\n", risc_size); 5728 if (risc_size == 0 || risc_size == ~0) 5729 goto default_template; 5730 5731 dlen = (risc_size - 8) * sizeof(*fwcode); 5732 ql_dbg(ql_dbg_init, vha, 0x0173, 5733 "-> template allocating %x bytes...\n", dlen); 5734 ha->fw_dump_template = vmalloc(dlen); 5735 if (!ha->fw_dump_template) { 5736 ql_log(ql_log_warn, vha, 0x0174, 5737 "Failed fwdump template allocate %x bytes.\n", risc_size); 5738 goto default_template; 5739 } 5740 5741 fwcode += 7; 5742 risc_size -= 8; 5743 dcode = ha->fw_dump_template; 5744 for (i = 0; i < risc_size; i++) 5745 dcode[i] = le32_to_cpu(fwcode[i]); 5746 5747 if (!qla27xx_fwdt_template_valid(dcode)) { 5748 ql_log(ql_log_warn, vha, 0x0175, 5749 "Failed fwdump template validate\n"); 5750 goto default_template; 5751 } 5752 5753 dlen = qla27xx_fwdt_template_size(dcode); 5754 ql_dbg(ql_dbg_init, vha, 0x0176, 5755 "-> template size %x bytes\n", dlen); 5756 if (dlen > risc_size * sizeof(*fwcode)) { 5757 ql_log(ql_log_warn, vha, 0x0177, 5758 "Failed fwdump template exceeds array by %x bytes\n", 5759 (uint32_t)(dlen - risc_size * sizeof(*fwcode))); 5760 goto default_template; 5761 } 5762 ha->fw_dump_template_len = dlen; 5763 return rval; 5764 5765 default_template: 5766 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 5767 if (ha->fw_dump_template) 5768 vfree(ha->fw_dump_template); 5769 ha->fw_dump_template = NULL; 5770 ha->fw_dump_template_len = 0; 5771 5772 dlen = qla27xx_fwdt_template_default_size(); 5773 ql_dbg(ql_dbg_init, vha, 0x0179, 5774 "-> template allocating %x bytes...\n", dlen); 5775 ha->fw_dump_template = vmalloc(dlen); 5776 if (!ha->fw_dump_template) { 5777 ql_log(ql_log_warn, vha, 0x017a, 5778 "Failed fwdump template allocate %x bytes.\n", risc_size); 5779 goto failed_template; 5780 } 5781 5782 dcode = ha->fw_dump_template; 5783 risc_size = dlen / sizeof(*fwcode); 5784 fwcode = qla27xx_fwdt_template_default(); 5785 for (i = 0; i < risc_size; i++) 5786 dcode[i] = be32_to_cpu(fwcode[i]); 5787 5788 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 5789 ql_log(ql_log_warn, vha, 0x017b, 5790 "Failed fwdump template validate\n"); 5791 goto failed_template; 5792 } 5793 5794 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 5795 ql_dbg(ql_dbg_init, vha, 0x017c, 5796 "-> template size %x bytes\n", dlen); 5797 ha->fw_dump_template_len = dlen; 5798 return rval; 5799 5800 failed_template: 5801 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 5802 if (ha->fw_dump_template) 5803 vfree(ha->fw_dump_template); 5804 ha->fw_dump_template = NULL; 5805 ha->fw_dump_template_len = 0; 5806 return rval; 5807 } 5808 5809 int 5810 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5811 { 5812 int rval; 5813 5814 if (ql2xfwloadbin == 1) 5815 return qla81xx_load_risc(vha, srisc_addr); 5816 5817 /* 5818 * FW Load priority: 5819 * 1) Firmware via request-firmware interface (.bin file). 5820 * 2) Firmware residing in flash. 5821 */ 5822 rval = qla24xx_load_risc_blob(vha, srisc_addr); 5823 if (rval == QLA_SUCCESS) 5824 return rval; 5825 5826 return qla24xx_load_risc_flash(vha, srisc_addr, 5827 vha->hw->flt_region_fw); 5828 } 5829 5830 int 5831 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5832 { 5833 int rval; 5834 struct qla_hw_data *ha = vha->hw; 5835 5836 if (ql2xfwloadbin == 2) 5837 goto try_blob_fw; 5838 5839 /* 5840 * FW Load priority: 5841 * 1) Firmware residing in flash. 5842 * 2) Firmware via request-firmware interface (.bin file). 5843 * 3) Golden-Firmware residing in flash -- limited operation. 5844 */ 5845 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 5846 if (rval == QLA_SUCCESS) 5847 return rval; 5848 5849 try_blob_fw: 5850 rval = qla24xx_load_risc_blob(vha, srisc_addr); 5851 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 5852 return rval; 5853 5854 ql_log(ql_log_info, vha, 0x0099, 5855 "Attempting to fallback to golden firmware.\n"); 5856 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 5857 if (rval != QLA_SUCCESS) 5858 return rval; 5859 5860 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 5861 ha->flags.running_gold_fw = 1; 5862 return rval; 5863 } 5864 5865 void 5866 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 5867 { 5868 int ret, retries; 5869 struct qla_hw_data *ha = vha->hw; 5870 5871 if (ha->flags.pci_channel_io_perm_failure) 5872 return; 5873 if (!IS_FWI2_CAPABLE(ha)) 5874 return; 5875 if (!ha->fw_major_version) 5876 return; 5877 5878 ret = qla2x00_stop_firmware(vha); 5879 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 5880 ret != QLA_INVALID_COMMAND && retries ; retries--) { 5881 ha->isp_ops->reset_chip(vha); 5882 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 5883 continue; 5884 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 5885 continue; 5886 ql_log(ql_log_info, vha, 0x8015, 5887 "Attempting retry of stop-firmware command.\n"); 5888 ret = qla2x00_stop_firmware(vha); 5889 } 5890 } 5891 5892 int 5893 qla24xx_configure_vhba(scsi_qla_host_t *vha) 5894 { 5895 int rval = QLA_SUCCESS; 5896 int rval2; 5897 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5898 struct qla_hw_data *ha = vha->hw; 5899 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5900 struct req_que *req; 5901 struct rsp_que *rsp; 5902 5903 if (!vha->vp_idx) 5904 return -EINVAL; 5905 5906 rval = qla2x00_fw_ready(base_vha); 5907 if (ha->flags.cpu_affinity_enabled) 5908 req = ha->req_q_map[0]; 5909 else 5910 req = vha->req; 5911 rsp = req->rsp; 5912 5913 if (rval == QLA_SUCCESS) { 5914 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5915 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5916 } 5917 5918 vha->flags.management_server_logged_in = 0; 5919 5920 /* Login to SNS first */ 5921 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 5922 BIT_1); 5923 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5924 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 5925 ql_dbg(ql_dbg_init, vha, 0x0120, 5926 "Failed SNS login: loop_id=%x, rval2=%d\n", 5927 NPH_SNS, rval2); 5928 else 5929 ql_dbg(ql_dbg_init, vha, 0x0103, 5930 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 5931 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 5932 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 5933 return (QLA_FUNCTION_FAILED); 5934 } 5935 5936 atomic_set(&vha->loop_down_timer, 0); 5937 atomic_set(&vha->loop_state, LOOP_UP); 5938 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5939 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5940 rval = qla2x00_loop_resync(base_vha); 5941 5942 return rval; 5943 } 5944 5945 /* 84XX Support **************************************************************/ 5946 5947 static LIST_HEAD(qla_cs84xx_list); 5948 static DEFINE_MUTEX(qla_cs84xx_mutex); 5949 5950 static struct qla_chip_state_84xx * 5951 qla84xx_get_chip(struct scsi_qla_host *vha) 5952 { 5953 struct qla_chip_state_84xx *cs84xx; 5954 struct qla_hw_data *ha = vha->hw; 5955 5956 mutex_lock(&qla_cs84xx_mutex); 5957 5958 /* Find any shared 84xx chip. */ 5959 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 5960 if (cs84xx->bus == ha->pdev->bus) { 5961 kref_get(&cs84xx->kref); 5962 goto done; 5963 } 5964 } 5965 5966 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 5967 if (!cs84xx) 5968 goto done; 5969 5970 kref_init(&cs84xx->kref); 5971 spin_lock_init(&cs84xx->access_lock); 5972 mutex_init(&cs84xx->fw_update_mutex); 5973 cs84xx->bus = ha->pdev->bus; 5974 5975 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 5976 done: 5977 mutex_unlock(&qla_cs84xx_mutex); 5978 return cs84xx; 5979 } 5980 5981 static void 5982 __qla84xx_chip_release(struct kref *kref) 5983 { 5984 struct qla_chip_state_84xx *cs84xx = 5985 container_of(kref, struct qla_chip_state_84xx, kref); 5986 5987 mutex_lock(&qla_cs84xx_mutex); 5988 list_del(&cs84xx->list); 5989 mutex_unlock(&qla_cs84xx_mutex); 5990 kfree(cs84xx); 5991 } 5992 5993 void 5994 qla84xx_put_chip(struct scsi_qla_host *vha) 5995 { 5996 struct qla_hw_data *ha = vha->hw; 5997 if (ha->cs84xx) 5998 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 5999 } 6000 6001 static int 6002 qla84xx_init_chip(scsi_qla_host_t *vha) 6003 { 6004 int rval; 6005 uint16_t status[2]; 6006 struct qla_hw_data *ha = vha->hw; 6007 6008 mutex_lock(&ha->cs84xx->fw_update_mutex); 6009 6010 rval = qla84xx_verify_chip(vha, status); 6011 6012 mutex_unlock(&ha->cs84xx->fw_update_mutex); 6013 6014 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 6015 QLA_SUCCESS; 6016 } 6017 6018 /* 81XX Support **************************************************************/ 6019 6020 int 6021 qla81xx_nvram_config(scsi_qla_host_t *vha) 6022 { 6023 int rval; 6024 struct init_cb_81xx *icb; 6025 struct nvram_81xx *nv; 6026 uint32_t *dptr; 6027 uint8_t *dptr1, *dptr2; 6028 uint32_t chksum; 6029 uint16_t cnt; 6030 struct qla_hw_data *ha = vha->hw; 6031 6032 rval = QLA_SUCCESS; 6033 icb = (struct init_cb_81xx *)ha->init_cb; 6034 nv = ha->nvram; 6035 6036 /* Determine NVRAM starting address. */ 6037 ha->nvram_size = sizeof(struct nvram_81xx); 6038 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6039 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 6040 ha->vpd_size = FA_VPD_SIZE_82XX; 6041 6042 /* Get VPD data into cache */ 6043 ha->vpd = ha->nvram + VPD_OFFSET; 6044 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 6045 ha->vpd_size); 6046 6047 /* Get NVRAM data into cache and calculate checksum. */ 6048 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 6049 ha->nvram_size); 6050 dptr = (uint32_t *)nv; 6051 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 6052 chksum += le32_to_cpu(*dptr++); 6053 6054 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 6055 "Contents of NVRAM:\n"); 6056 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 6057 (uint8_t *)nv, ha->nvram_size); 6058 6059 /* Bad NVRAM data, set defaults parameters. */ 6060 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6061 || nv->id[3] != ' ' || 6062 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6063 /* Reset NVRAM data. */ 6064 ql_log(ql_log_info, vha, 0x0073, 6065 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6066 "version=0x%x.\n", chksum, nv->id[0], 6067 le16_to_cpu(nv->nvram_version)); 6068 ql_log(ql_log_info, vha, 0x0074, 6069 "Falling back to functioning (yet invalid -- WWPN) " 6070 "defaults.\n"); 6071 6072 /* 6073 * Set default initialization control block. 6074 */ 6075 memset(nv, 0, ha->nvram_size); 6076 nv->nvram_version = cpu_to_le16(ICB_VERSION); 6077 nv->version = cpu_to_le16(ICB_VERSION); 6078 nv->frame_payload_size = 2048; 6079 nv->execution_throttle = cpu_to_le16(0xFFFF); 6080 nv->exchange_count = cpu_to_le16(0); 6081 nv->port_name[0] = 0x21; 6082 nv->port_name[1] = 0x00 + ha->port_no + 1; 6083 nv->port_name[2] = 0x00; 6084 nv->port_name[3] = 0xe0; 6085 nv->port_name[4] = 0x8b; 6086 nv->port_name[5] = 0x1c; 6087 nv->port_name[6] = 0x55; 6088 nv->port_name[7] = 0x86; 6089 nv->node_name[0] = 0x20; 6090 nv->node_name[1] = 0x00; 6091 nv->node_name[2] = 0x00; 6092 nv->node_name[3] = 0xe0; 6093 nv->node_name[4] = 0x8b; 6094 nv->node_name[5] = 0x1c; 6095 nv->node_name[6] = 0x55; 6096 nv->node_name[7] = 0x86; 6097 nv->login_retry_count = cpu_to_le16(8); 6098 nv->interrupt_delay_timer = cpu_to_le16(0); 6099 nv->login_timeout = cpu_to_le16(0); 6100 nv->firmware_options_1 = 6101 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6102 nv->firmware_options_2 = cpu_to_le32(2 << 4); 6103 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 6104 nv->firmware_options_3 = cpu_to_le32(2 << 13); 6105 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 6106 nv->efi_parameters = cpu_to_le32(0); 6107 nv->reset_delay = 5; 6108 nv->max_luns_per_target = cpu_to_le16(128); 6109 nv->port_down_retry_count = cpu_to_le16(30); 6110 nv->link_down_timeout = cpu_to_le16(180); 6111 nv->enode_mac[0] = 0x00; 6112 nv->enode_mac[1] = 0xC0; 6113 nv->enode_mac[2] = 0xDD; 6114 nv->enode_mac[3] = 0x04; 6115 nv->enode_mac[4] = 0x05; 6116 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 6117 6118 rval = 1; 6119 } 6120 6121 if (IS_T10_PI_CAPABLE(ha)) 6122 nv->frame_payload_size &= ~7; 6123 6124 qlt_81xx_config_nvram_stage1(vha, nv); 6125 6126 /* Reset Initialization control block */ 6127 memset(icb, 0, ha->init_cb_size); 6128 6129 /* Copy 1st segment. */ 6130 dptr1 = (uint8_t *)icb; 6131 dptr2 = (uint8_t *)&nv->version; 6132 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6133 while (cnt--) 6134 *dptr1++ = *dptr2++; 6135 6136 icb->login_retry_count = nv->login_retry_count; 6137 6138 /* Copy 2nd segment. */ 6139 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6140 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6141 cnt = (uint8_t *)&icb->reserved_5 - 6142 (uint8_t *)&icb->interrupt_delay_timer; 6143 while (cnt--) 6144 *dptr1++ = *dptr2++; 6145 6146 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 6147 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 6148 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 6149 icb->enode_mac[0] = 0x00; 6150 icb->enode_mac[1] = 0xC0; 6151 icb->enode_mac[2] = 0xDD; 6152 icb->enode_mac[3] = 0x04; 6153 icb->enode_mac[4] = 0x05; 6154 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 6155 } 6156 6157 /* Use extended-initialization control block. */ 6158 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 6159 6160 /* 6161 * Setup driver NVRAM options. 6162 */ 6163 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6164 "QLE8XXX"); 6165 6166 qlt_81xx_config_nvram_stage2(vha, icb); 6167 6168 /* Use alternate WWN? */ 6169 if (nv->host_p & cpu_to_le32(BIT_15)) { 6170 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6171 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6172 } 6173 6174 /* Prepare nodename */ 6175 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 6176 /* 6177 * Firmware will apply the following mask if the nodename was 6178 * not provided. 6179 */ 6180 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6181 icb->node_name[0] &= 0xF0; 6182 } 6183 6184 /* Set host adapter parameters. */ 6185 ha->flags.disable_risc_code_load = 0; 6186 ha->flags.enable_lip_reset = 0; 6187 ha->flags.enable_lip_full_login = 6188 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6189 ha->flags.enable_target_reset = 6190 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6191 ha->flags.enable_led_scheme = 0; 6192 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6193 6194 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6195 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6196 6197 /* save HBA serial number */ 6198 ha->serial0 = icb->port_name[5]; 6199 ha->serial1 = icb->port_name[6]; 6200 ha->serial2 = icb->port_name[7]; 6201 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6202 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6203 6204 icb->execution_throttle = cpu_to_le16(0xFFFF); 6205 6206 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6207 6208 /* Set minimum login_timeout to 4 seconds. */ 6209 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6210 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6211 if (le16_to_cpu(nv->login_timeout) < 4) 6212 nv->login_timeout = cpu_to_le16(4); 6213 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6214 icb->login_timeout = nv->login_timeout; 6215 6216 /* Set minimum RATOV to 100 tenths of a second. */ 6217 ha->r_a_tov = 100; 6218 6219 ha->loop_reset_delay = nv->reset_delay; 6220 6221 /* Link Down Timeout = 0: 6222 * 6223 * When Port Down timer expires we will start returning 6224 * I/O's to OS with "DID_NO_CONNECT". 6225 * 6226 * Link Down Timeout != 0: 6227 * 6228 * The driver waits for the link to come up after link down 6229 * before returning I/Os to OS with "DID_NO_CONNECT". 6230 */ 6231 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6232 ha->loop_down_abort_time = 6233 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6234 } else { 6235 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6236 ha->loop_down_abort_time = 6237 (LOOP_DOWN_TIME - ha->link_down_timeout); 6238 } 6239 6240 /* Need enough time to try and get the port back. */ 6241 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6242 if (qlport_down_retry) 6243 ha->port_down_retry_count = qlport_down_retry; 6244 6245 /* Set login_retry_count */ 6246 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6247 if (ha->port_down_retry_count == 6248 le16_to_cpu(nv->port_down_retry_count) && 6249 ha->port_down_retry_count > 3) 6250 ha->login_retry_count = ha->port_down_retry_count; 6251 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6252 ha->login_retry_count = ha->port_down_retry_count; 6253 if (ql2xloginretrycount) 6254 ha->login_retry_count = ql2xloginretrycount; 6255 6256 /* if not running MSI-X we need handshaking on interrupts */ 6257 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 6258 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 6259 6260 /* Enable ZIO. */ 6261 if (!vha->flags.init_done) { 6262 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6263 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6264 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6265 le16_to_cpu(icb->interrupt_delay_timer): 2; 6266 } 6267 icb->firmware_options_2 &= cpu_to_le32( 6268 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6269 vha->flags.process_response_queue = 0; 6270 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6271 ha->zio_mode = QLA_ZIO_MODE_6; 6272 6273 ql_log(ql_log_info, vha, 0x0075, 6274 "ZIO mode %d enabled; timer delay (%d us).\n", 6275 ha->zio_mode, 6276 ha->zio_timer * 100); 6277 6278 icb->firmware_options_2 |= cpu_to_le32( 6279 (uint32_t)ha->zio_mode); 6280 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6281 vha->flags.process_response_queue = 1; 6282 } 6283 6284 if (rval) { 6285 ql_log(ql_log_warn, vha, 0x0076, 6286 "NVRAM configuration failed.\n"); 6287 } 6288 return (rval); 6289 } 6290 6291 int 6292 qla82xx_restart_isp(scsi_qla_host_t *vha) 6293 { 6294 int status, rval; 6295 struct qla_hw_data *ha = vha->hw; 6296 struct req_que *req = ha->req_q_map[0]; 6297 struct rsp_que *rsp = ha->rsp_q_map[0]; 6298 struct scsi_qla_host *vp; 6299 unsigned long flags; 6300 6301 status = qla2x00_init_rings(vha); 6302 if (!status) { 6303 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6304 ha->flags.chip_reset_done = 1; 6305 6306 status = qla2x00_fw_ready(vha); 6307 if (!status) { 6308 /* Issue a marker after FW becomes ready. */ 6309 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6310 vha->flags.online = 1; 6311 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6312 } 6313 6314 /* if no cable then assume it's good */ 6315 if ((vha->device_flags & DFLG_NO_CABLE)) 6316 status = 0; 6317 } 6318 6319 if (!status) { 6320 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6321 6322 if (!atomic_read(&vha->loop_down_timer)) { 6323 /* 6324 * Issue marker command only when we are going 6325 * to start the I/O . 6326 */ 6327 vha->marker_needed = 1; 6328 } 6329 6330 ha->isp_ops->enable_intrs(ha); 6331 6332 ha->isp_abort_cnt = 0; 6333 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6334 6335 /* Update the firmware version */ 6336 status = qla82xx_check_md_needed(vha); 6337 6338 if (ha->fce) { 6339 ha->flags.fce_enabled = 1; 6340 memset(ha->fce, 0, 6341 fce_calc_size(ha->fce_bufs)); 6342 rval = qla2x00_enable_fce_trace(vha, 6343 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6344 &ha->fce_bufs); 6345 if (rval) { 6346 ql_log(ql_log_warn, vha, 0x8001, 6347 "Unable to reinitialize FCE (%d).\n", 6348 rval); 6349 ha->flags.fce_enabled = 0; 6350 } 6351 } 6352 6353 if (ha->eft) { 6354 memset(ha->eft, 0, EFT_SIZE); 6355 rval = qla2x00_enable_eft_trace(vha, 6356 ha->eft_dma, EFT_NUM_BUFFERS); 6357 if (rval) { 6358 ql_log(ql_log_warn, vha, 0x8010, 6359 "Unable to reinitialize EFT (%d).\n", 6360 rval); 6361 } 6362 } 6363 } 6364 6365 if (!status) { 6366 ql_dbg(ql_dbg_taskm, vha, 0x8011, 6367 "qla82xx_restart_isp succeeded.\n"); 6368 6369 spin_lock_irqsave(&ha->vport_slock, flags); 6370 list_for_each_entry(vp, &ha->vp_list, list) { 6371 if (vp->vp_idx) { 6372 atomic_inc(&vp->vref_count); 6373 spin_unlock_irqrestore(&ha->vport_slock, flags); 6374 6375 qla2x00_vp_abort_isp(vp); 6376 6377 spin_lock_irqsave(&ha->vport_slock, flags); 6378 atomic_dec(&vp->vref_count); 6379 } 6380 } 6381 spin_unlock_irqrestore(&ha->vport_slock, flags); 6382 6383 } else { 6384 ql_log(ql_log_warn, vha, 0x8016, 6385 "qla82xx_restart_isp **** FAILED ****.\n"); 6386 } 6387 6388 return status; 6389 } 6390 6391 void 6392 qla81xx_update_fw_options(scsi_qla_host_t *vha) 6393 { 6394 struct qla_hw_data *ha = vha->hw; 6395 6396 if (!ql2xetsenable) 6397 return; 6398 6399 /* Enable ETS Burst. */ 6400 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 6401 ha->fw_options[2] |= BIT_9; 6402 qla2x00_set_fw_options(vha, ha->fw_options); 6403 } 6404 6405 /* 6406 * qla24xx_get_fcp_prio 6407 * Gets the fcp cmd priority value for the logged in port. 6408 * Looks for a match of the port descriptors within 6409 * each of the fcp prio config entries. If a match is found, 6410 * the tag (priority) value is returned. 6411 * 6412 * Input: 6413 * vha = scsi host structure pointer. 6414 * fcport = port structure pointer. 6415 * 6416 * Return: 6417 * non-zero (if found) 6418 * -1 (if not found) 6419 * 6420 * Context: 6421 * Kernel context 6422 */ 6423 static int 6424 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 6425 { 6426 int i, entries; 6427 uint8_t pid_match, wwn_match; 6428 int priority; 6429 uint32_t pid1, pid2; 6430 uint64_t wwn1, wwn2; 6431 struct qla_fcp_prio_entry *pri_entry; 6432 struct qla_hw_data *ha = vha->hw; 6433 6434 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 6435 return -1; 6436 6437 priority = -1; 6438 entries = ha->fcp_prio_cfg->num_entries; 6439 pri_entry = &ha->fcp_prio_cfg->entry[0]; 6440 6441 for (i = 0; i < entries; i++) { 6442 pid_match = wwn_match = 0; 6443 6444 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 6445 pri_entry++; 6446 continue; 6447 } 6448 6449 /* check source pid for a match */ 6450 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 6451 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 6452 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 6453 if (pid1 == INVALID_PORT_ID) 6454 pid_match++; 6455 else if (pid1 == pid2) 6456 pid_match++; 6457 } 6458 6459 /* check destination pid for a match */ 6460 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 6461 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 6462 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 6463 if (pid1 == INVALID_PORT_ID) 6464 pid_match++; 6465 else if (pid1 == pid2) 6466 pid_match++; 6467 } 6468 6469 /* check source WWN for a match */ 6470 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 6471 wwn1 = wwn_to_u64(vha->port_name); 6472 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 6473 if (wwn2 == (uint64_t)-1) 6474 wwn_match++; 6475 else if (wwn1 == wwn2) 6476 wwn_match++; 6477 } 6478 6479 /* check destination WWN for a match */ 6480 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 6481 wwn1 = wwn_to_u64(fcport->port_name); 6482 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 6483 if (wwn2 == (uint64_t)-1) 6484 wwn_match++; 6485 else if (wwn1 == wwn2) 6486 wwn_match++; 6487 } 6488 6489 if (pid_match == 2 || wwn_match == 2) { 6490 /* Found a matching entry */ 6491 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 6492 priority = pri_entry->tag; 6493 break; 6494 } 6495 6496 pri_entry++; 6497 } 6498 6499 return priority; 6500 } 6501 6502 /* 6503 * qla24xx_update_fcport_fcp_prio 6504 * Activates fcp priority for the logged in fc port 6505 * 6506 * Input: 6507 * vha = scsi host structure pointer. 6508 * fcp = port structure pointer. 6509 * 6510 * Return: 6511 * QLA_SUCCESS or QLA_FUNCTION_FAILED 6512 * 6513 * Context: 6514 * Kernel context. 6515 */ 6516 int 6517 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 6518 { 6519 int ret; 6520 int priority; 6521 uint16_t mb[5]; 6522 6523 if (fcport->port_type != FCT_TARGET || 6524 fcport->loop_id == FC_NO_LOOP_ID) 6525 return QLA_FUNCTION_FAILED; 6526 6527 priority = qla24xx_get_fcp_prio(vha, fcport); 6528 if (priority < 0) 6529 return QLA_FUNCTION_FAILED; 6530 6531 if (IS_P3P_TYPE(vha->hw)) { 6532 fcport->fcp_prio = priority & 0xf; 6533 return QLA_SUCCESS; 6534 } 6535 6536 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 6537 if (ret == QLA_SUCCESS) { 6538 if (fcport->fcp_prio != priority) 6539 ql_dbg(ql_dbg_user, vha, 0x709e, 6540 "Updated FCP_CMND priority - value=%d loop_id=%d " 6541 "port_id=%02x%02x%02x.\n", priority, 6542 fcport->loop_id, fcport->d_id.b.domain, 6543 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6544 fcport->fcp_prio = priority & 0xf; 6545 } else 6546 ql_dbg(ql_dbg_user, vha, 0x704f, 6547 "Unable to update FCP_CMND priority - ret=0x%x for " 6548 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 6549 fcport->d_id.b.domain, fcport->d_id.b.area, 6550 fcport->d_id.b.al_pa); 6551 return ret; 6552 } 6553 6554 /* 6555 * qla24xx_update_all_fcp_prio 6556 * Activates fcp priority for all the logged in ports 6557 * 6558 * Input: 6559 * ha = adapter block pointer. 6560 * 6561 * Return: 6562 * QLA_SUCCESS or QLA_FUNCTION_FAILED 6563 * 6564 * Context: 6565 * Kernel context. 6566 */ 6567 int 6568 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 6569 { 6570 int ret; 6571 fc_port_t *fcport; 6572 6573 ret = QLA_FUNCTION_FAILED; 6574 /* We need to set priority for all logged in ports */ 6575 list_for_each_entry(fcport, &vha->vp_fcports, list) 6576 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 6577 6578 return ret; 6579 } 6580