1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #include "qla_def.h" 7 #include "qla_gbl.h" 8 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/vmalloc.h> 12 13 #include "qla_devtbl.h" 14 15 #ifdef CONFIG_SPARC 16 #include <asm/prom.h> 17 #endif 18 19 #include "qla_target.h" 20 21 /* 22 * QLogic ISP2x00 Hardware Support Function Prototypes. 23 */ 24 static int qla2x00_isp_firmware(scsi_qla_host_t *); 25 static int qla2x00_setup_chip(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 32 static int qla2x00_restart_isp(scsi_qla_host_t *); 33 34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 35 static int qla84xx_init_chip(scsi_qla_host_t *); 36 static int qla25xx_init_queues(struct qla_hw_data *); 37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 38 struct event_arg *ea); 39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 40 struct event_arg *); 41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(struct timer_list *t) 47 { 48 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 49 struct srb_iocb *iocb; 50 scsi_qla_host_t *vha = sp->vha; 51 52 WARN_ON(irqs_disabled()); 53 iocb = &sp->u.iocb_cmd; 54 iocb->timeout(sp); 55 56 /* ref: TMR */ 57 kref_put(&sp->cmd_kref, qla2x00_sp_release); 58 59 if (vha && qla2x00_isp_reg_stat(vha->hw)) { 60 ql_log(ql_log_info, vha, 0x9008, 61 "PCI/Register disconnect.\n"); 62 qla_pci_set_eeh_busy(vha); 63 } 64 } 65 66 void qla2x00_sp_free(srb_t *sp) 67 { 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 69 70 del_timer(&iocb->timer); 71 qla2x00_rel_sp(sp); 72 } 73 74 void qla2xxx_rel_done_warning(srb_t *sp, int res) 75 { 76 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp); 77 } 78 79 void qla2xxx_rel_free_warning(srb_t *sp) 80 { 81 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp); 82 } 83 84 /* Asynchronous Login/Logout Routines -------------------------------------- */ 85 86 unsigned long 87 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 88 { 89 unsigned long tmo; 90 struct qla_hw_data *ha = vha->hw; 91 92 /* Firmware should use switch negotiated r_a_tov for timeout. */ 93 tmo = ha->r_a_tov / 10 * 2; 94 if (IS_QLAFX00(ha)) { 95 tmo = FX00_DEF_RATOV * 2; 96 } else if (!IS_FWI2_CAPABLE(ha)) { 97 /* 98 * Except for earlier ISPs where the timeout is seeded from the 99 * initialization control block. 100 */ 101 tmo = ha->login_timeout; 102 } 103 return tmo; 104 } 105 106 static void qla24xx_abort_iocb_timeout(void *data) 107 { 108 srb_t *sp = data; 109 struct srb_iocb *abt = &sp->u.iocb_cmd; 110 struct qla_qpair *qpair = sp->qpair; 111 u32 handle; 112 unsigned long flags; 113 int sp_found = 0, cmdsp_found = 0; 114 115 if (sp->cmd_sp) 116 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 117 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 118 sp->cmd_sp->handle, sp->cmd_sp->type, 119 sp->handle, sp->type); 120 else 121 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 122 "Abort timeout 2 - hdl=%x, type=%x\n", 123 sp->handle, sp->type); 124 125 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 126 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 127 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 128 sp->cmd_sp)) { 129 qpair->req->outstanding_cmds[handle] = NULL; 130 cmdsp_found = 1; 131 qla_put_fw_resources(qpair, &sp->cmd_sp->iores); 132 } 133 134 /* removing the abort */ 135 if (qpair->req->outstanding_cmds[handle] == sp) { 136 qpair->req->outstanding_cmds[handle] = NULL; 137 sp_found = 1; 138 qla_put_fw_resources(qpair, &sp->iores); 139 break; 140 } 141 } 142 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 143 144 if (cmdsp_found && sp->cmd_sp) { 145 /* 146 * This done function should take care of 147 * original command ref: INIT 148 */ 149 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 150 } 151 152 if (sp_found) { 153 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT); 154 sp->done(sp, QLA_OS_TIMER_EXPIRED); 155 } 156 } 157 158 static void qla24xx_abort_sp_done(srb_t *sp, int res) 159 { 160 struct srb_iocb *abt = &sp->u.iocb_cmd; 161 srb_t *orig_sp = sp->cmd_sp; 162 163 if (orig_sp) 164 qla_wait_nvme_release_cmd_kref(orig_sp); 165 166 if (sp->flags & SRB_WAKEUP_ON_COMP) 167 complete(&abt->u.abt.comp); 168 else 169 /* ref: INIT */ 170 kref_put(&sp->cmd_kref, qla2x00_sp_release); 171 } 172 173 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 174 { 175 scsi_qla_host_t *vha = cmd_sp->vha; 176 struct srb_iocb *abt_iocb; 177 srb_t *sp; 178 int rval = QLA_FUNCTION_FAILED; 179 180 /* ref: INIT for ABTS command */ 181 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 182 GFP_ATOMIC); 183 if (!sp) 184 return QLA_MEMORY_ALLOC_FAILED; 185 186 qla_vha_mark_busy(vha); 187 abt_iocb = &sp->u.iocb_cmd; 188 sp->type = SRB_ABT_CMD; 189 sp->name = "abort"; 190 sp->qpair = cmd_sp->qpair; 191 sp->cmd_sp = cmd_sp; 192 if (wait) 193 sp->flags = SRB_WAKEUP_ON_COMP; 194 195 init_completion(&abt_iocb->u.abt.comp); 196 /* FW can send 2 x ABTS's timeout/20s */ 197 qla2x00_init_async_sp(sp, 42, qla24xx_abort_sp_done); 198 sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout; 199 200 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 201 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 202 203 ql_dbg(ql_dbg_async, vha, 0x507c, 204 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 205 cmd_sp->type); 206 207 rval = qla2x00_start_sp(sp); 208 if (rval != QLA_SUCCESS) { 209 /* ref: INIT */ 210 kref_put(&sp->cmd_kref, qla2x00_sp_release); 211 return rval; 212 } 213 214 if (wait) { 215 wait_for_completion(&abt_iocb->u.abt.comp); 216 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 217 QLA_SUCCESS : QLA_ERR_FROM_FW; 218 /* ref: INIT */ 219 kref_put(&sp->cmd_kref, qla2x00_sp_release); 220 } 221 222 return rval; 223 } 224 225 void 226 qla2x00_async_iocb_timeout(void *data) 227 { 228 srb_t *sp = data; 229 fc_port_t *fcport = sp->fcport; 230 struct srb_iocb *lio = &sp->u.iocb_cmd; 231 int rc, h; 232 unsigned long flags; 233 234 if (fcport) { 235 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 236 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 237 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 238 239 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 240 } else { 241 pr_info("Async-%s timeout - hdl=%x.\n", 242 sp->name, sp->handle); 243 } 244 245 switch (sp->type) { 246 case SRB_LOGIN_CMD: 247 rc = qla24xx_async_abort_cmd(sp, false); 248 if (rc) { 249 /* Retry as needed. */ 250 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 251 lio->u.logio.data[1] = 252 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 253 QLA_LOGIO_LOGIN_RETRIED : 0; 254 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 255 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 256 h++) { 257 if (sp->qpair->req->outstanding_cmds[h] == 258 sp) { 259 sp->qpair->req->outstanding_cmds[h] = 260 NULL; 261 break; 262 } 263 } 264 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 265 sp->done(sp, QLA_FUNCTION_TIMEOUT); 266 } 267 break; 268 case SRB_LOGOUT_CMD: 269 case SRB_CT_PTHRU_CMD: 270 case SRB_MB_IOCB: 271 case SRB_NACK_PLOGI: 272 case SRB_NACK_PRLI: 273 case SRB_NACK_LOGO: 274 case SRB_CTRL_VP: 275 default: 276 rc = qla24xx_async_abort_cmd(sp, false); 277 if (rc) { 278 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 279 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 280 h++) { 281 if (sp->qpair->req->outstanding_cmds[h] == 282 sp) { 283 sp->qpair->req->outstanding_cmds[h] = 284 NULL; 285 break; 286 } 287 } 288 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 289 sp->done(sp, QLA_FUNCTION_TIMEOUT); 290 } 291 break; 292 } 293 } 294 295 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 296 { 297 struct scsi_qla_host *vha = sp->vha; 298 struct srb_iocb *lio = &sp->u.iocb_cmd; 299 struct event_arg ea; 300 301 ql_dbg(ql_dbg_disc, vha, 0x20dd, 302 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 303 304 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 305 306 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 307 memset(&ea, 0, sizeof(ea)); 308 ea.fcport = sp->fcport; 309 ea.data[0] = lio->u.logio.data[0]; 310 ea.data[1] = lio->u.logio.data[1]; 311 ea.iop[0] = lio->u.logio.iop[0]; 312 ea.iop[1] = lio->u.logio.iop[1]; 313 ea.sp = sp; 314 if (res) 315 ea.data[0] = MBS_COMMAND_ERROR; 316 qla24xx_handle_plogi_done_event(vha, &ea); 317 } 318 319 /* ref: INIT */ 320 kref_put(&sp->cmd_kref, qla2x00_sp_release); 321 } 322 323 int 324 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 325 uint16_t *data) 326 { 327 srb_t *sp; 328 struct srb_iocb *lio; 329 int rval = QLA_FUNCTION_FAILED; 330 331 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 332 fcport->loop_id == FC_NO_LOOP_ID) { 333 ql_log(ql_log_warn, vha, 0xffff, 334 "%s: %8phC - not sending command.\n", 335 __func__, fcport->port_name); 336 return rval; 337 } 338 339 /* ref: INIT */ 340 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 341 if (!sp) 342 goto done; 343 344 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 345 fcport->flags |= FCF_ASYNC_SENT; 346 fcport->logout_completed = 0; 347 348 sp->type = SRB_LOGIN_CMD; 349 sp->name = "login"; 350 sp->gen1 = fcport->rscn_gen; 351 sp->gen2 = fcport->login_gen; 352 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 353 qla2x00_async_login_sp_done); 354 355 lio = &sp->u.iocb_cmd; 356 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) { 357 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 358 } else { 359 if (vha->hw->flags.edif_enabled && 360 DBELL_ACTIVE(vha)) { 361 lio->u.logio.flags |= 362 (SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI); 363 } else { 364 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 365 } 366 } 367 368 if (NVME_TARGET(vha->hw, fcport)) 369 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 370 371 rval = qla2x00_start_sp(sp); 372 373 ql_dbg(ql_dbg_disc, vha, 0x2072, 374 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 375 fcport->port_name, sp->handle, fcport->loop_id, 376 fcport->d_id.b24, fcport->login_retry, 377 lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : ""); 378 379 if (rval != QLA_SUCCESS) { 380 fcport->flags |= FCF_LOGIN_NEEDED; 381 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 382 goto done_free_sp; 383 } 384 385 return rval; 386 387 done_free_sp: 388 /* ref: INIT */ 389 kref_put(&sp->cmd_kref, qla2x00_sp_release); 390 fcport->flags &= ~FCF_ASYNC_SENT; 391 done: 392 fcport->flags &= ~FCF_ASYNC_ACTIVE; 393 394 /* 395 * async login failed. Could be due to iocb/exchange resource 396 * being low. Set state DELETED for re-login process to start again. 397 */ 398 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 399 return rval; 400 } 401 402 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 403 { 404 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 405 sp->fcport->login_gen++; 406 qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]); 407 /* ref: INIT */ 408 kref_put(&sp->cmd_kref, qla2x00_sp_release); 409 } 410 411 int 412 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 413 { 414 srb_t *sp; 415 int rval = QLA_FUNCTION_FAILED; 416 417 fcport->flags |= FCF_ASYNC_SENT; 418 /* ref: INIT */ 419 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 420 if (!sp) 421 goto done; 422 423 sp->type = SRB_LOGOUT_CMD; 424 sp->name = "logout"; 425 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 426 qla2x00_async_logout_sp_done), 427 428 ql_dbg(ql_dbg_disc, vha, 0x2070, 429 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n", 430 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 431 fcport->d_id.b.area, fcport->d_id.b.al_pa, 432 fcport->port_name, fcport->explicit_logout); 433 434 rval = qla2x00_start_sp(sp); 435 if (rval != QLA_SUCCESS) 436 goto done_free_sp; 437 return rval; 438 439 done_free_sp: 440 /* ref: INIT */ 441 kref_put(&sp->cmd_kref, qla2x00_sp_release); 442 done: 443 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 444 return rval; 445 } 446 447 void 448 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 449 uint16_t *data) 450 { 451 fcport->flags &= ~FCF_ASYNC_ACTIVE; 452 /* Don't re-login in target mode */ 453 if (!fcport->tgt_session) 454 qla2x00_mark_device_lost(vha, fcport, 1); 455 qlt_logo_completion_handler(fcport, data[0]); 456 } 457 458 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 459 { 460 struct srb_iocb *lio = &sp->u.iocb_cmd; 461 struct scsi_qla_host *vha = sp->vha; 462 463 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 464 if (!test_bit(UNLOADING, &vha->dpc_flags)) 465 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 466 lio->u.logio.data); 467 /* ref: INIT */ 468 kref_put(&sp->cmd_kref, qla2x00_sp_release); 469 } 470 471 int 472 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 473 { 474 srb_t *sp; 475 int rval; 476 477 rval = QLA_FUNCTION_FAILED; 478 /* ref: INIT */ 479 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 480 if (!sp) 481 goto done; 482 483 sp->type = SRB_PRLO_CMD; 484 sp->name = "prlo"; 485 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 486 qla2x00_async_prlo_sp_done); 487 488 ql_dbg(ql_dbg_disc, vha, 0x2070, 489 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 490 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 491 fcport->d_id.b.area, fcport->d_id.b.al_pa); 492 493 rval = qla2x00_start_sp(sp); 494 if (rval != QLA_SUCCESS) 495 goto done_free_sp; 496 497 return rval; 498 499 done_free_sp: 500 /* ref: INIT */ 501 kref_put(&sp->cmd_kref, qla2x00_sp_release); 502 done: 503 fcport->flags &= ~FCF_ASYNC_ACTIVE; 504 return rval; 505 } 506 507 static 508 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 509 { 510 struct fc_port *fcport = ea->fcport; 511 512 ql_dbg(ql_dbg_disc, vha, 0x20d2, 513 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 514 __func__, fcport->port_name, fcport->disc_state, 515 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 516 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 517 518 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 519 ea->data[0]); 520 521 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 522 ql_dbg(ql_dbg_disc, vha, 0x2066, 523 "%s %8phC: adisc fail: post delete\n", 524 __func__, ea->fcport->port_name); 525 /* deleted = 0 & logout_on_delete = force fw cleanup */ 526 fcport->deleted = 0; 527 fcport->logout_on_delete = 1; 528 qlt_schedule_sess_for_deletion(ea->fcport); 529 return; 530 } 531 532 if (ea->fcport->disc_state == DSC_DELETE_PEND) 533 return; 534 535 if (ea->sp->gen2 != ea->fcport->login_gen) { 536 /* target side must have changed it. */ 537 ql_dbg(ql_dbg_disc, vha, 0x20d3, 538 "%s %8phC generation changed\n", 539 __func__, ea->fcport->port_name); 540 return; 541 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 542 qla_rscn_replay(fcport); 543 qlt_schedule_sess_for_deletion(fcport); 544 return; 545 } 546 547 __qla24xx_handle_gpdb_event(vha, ea); 548 } 549 550 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 551 { 552 struct qla_work_evt *e; 553 554 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 555 if (!e) 556 return QLA_FUNCTION_FAILED; 557 558 e->u.fcport.fcport = fcport; 559 fcport->flags |= FCF_ASYNC_ACTIVE; 560 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 561 return qla2x00_post_work(vha, e); 562 } 563 564 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 565 { 566 struct scsi_qla_host *vha = sp->vha; 567 struct event_arg ea; 568 struct srb_iocb *lio = &sp->u.iocb_cmd; 569 570 ql_dbg(ql_dbg_disc, vha, 0x2066, 571 "Async done-%s res %x %8phC\n", 572 sp->name, res, sp->fcport->port_name); 573 574 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 575 576 memset(&ea, 0, sizeof(ea)); 577 ea.rc = res; 578 ea.data[0] = lio->u.logio.data[0]; 579 ea.data[1] = lio->u.logio.data[1]; 580 ea.iop[0] = lio->u.logio.iop[0]; 581 ea.iop[1] = lio->u.logio.iop[1]; 582 ea.fcport = sp->fcport; 583 ea.sp = sp; 584 if (res) 585 ea.data[0] = MBS_COMMAND_ERROR; 586 587 qla24xx_handle_adisc_event(vha, &ea); 588 /* ref: INIT */ 589 kref_put(&sp->cmd_kref, qla2x00_sp_release); 590 } 591 592 int 593 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 594 uint16_t *data) 595 { 596 srb_t *sp; 597 struct srb_iocb *lio; 598 int rval = QLA_FUNCTION_FAILED; 599 600 if (IS_SESSION_DELETED(fcport)) { 601 ql_log(ql_log_warn, vha, 0xffff, 602 "%s: %8phC is being delete - not sending command.\n", 603 __func__, fcport->port_name); 604 fcport->flags &= ~FCF_ASYNC_ACTIVE; 605 return rval; 606 } 607 608 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 609 return rval; 610 611 fcport->flags |= FCF_ASYNC_SENT; 612 /* ref: INIT */ 613 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 614 if (!sp) 615 goto done; 616 617 sp->type = SRB_ADISC_CMD; 618 sp->name = "adisc"; 619 sp->gen1 = fcport->rscn_gen; 620 sp->gen2 = fcport->login_gen; 621 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 622 qla2x00_async_adisc_sp_done); 623 624 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) { 625 lio = &sp->u.iocb_cmd; 626 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 627 } 628 629 ql_dbg(ql_dbg_disc, vha, 0x206f, 630 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 631 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 632 633 rval = qla2x00_start_sp(sp); 634 if (rval != QLA_SUCCESS) 635 goto done_free_sp; 636 637 return rval; 638 639 done_free_sp: 640 /* ref: INIT */ 641 kref_put(&sp->cmd_kref, qla2x00_sp_release); 642 done: 643 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 644 qla2x00_post_async_adisc_work(vha, fcport, data); 645 return rval; 646 } 647 648 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 649 { 650 struct qla_hw_data *ha = vha->hw; 651 652 if (IS_FWI2_CAPABLE(ha)) 653 return loop_id > NPH_LAST_HANDLE; 654 655 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 656 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 657 } 658 659 /** 660 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 661 * @vha: adapter state pointer. 662 * @dev: port structure pointer. 663 * 664 * Returns: 665 * qla2x00 local function return status code. 666 * 667 * Context: 668 * Kernel context. 669 */ 670 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 671 { 672 int rval; 673 struct qla_hw_data *ha = vha->hw; 674 unsigned long flags = 0; 675 676 rval = QLA_SUCCESS; 677 678 spin_lock_irqsave(&ha->vport_slock, flags); 679 680 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 681 if (dev->loop_id >= LOOPID_MAP_SIZE || 682 qla2x00_is_reserved_id(vha, dev->loop_id)) { 683 dev->loop_id = FC_NO_LOOP_ID; 684 rval = QLA_FUNCTION_FAILED; 685 } else { 686 set_bit(dev->loop_id, ha->loop_id_map); 687 } 688 spin_unlock_irqrestore(&ha->vport_slock, flags); 689 690 if (rval == QLA_SUCCESS) 691 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 692 "Assigning new loopid=%x, portid=%x.\n", 693 dev->loop_id, dev->d_id.b24); 694 else 695 ql_log(ql_log_warn, dev->vha, 0x2087, 696 "No loop_id's available, portid=%x.\n", 697 dev->d_id.b24); 698 699 return rval; 700 } 701 702 void qla2x00_clear_loop_id(fc_port_t *fcport) 703 { 704 struct qla_hw_data *ha = fcport->vha->hw; 705 706 if (fcport->loop_id == FC_NO_LOOP_ID || 707 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 708 return; 709 710 clear_bit(fcport->loop_id, ha->loop_id_map); 711 fcport->loop_id = FC_NO_LOOP_ID; 712 } 713 714 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 715 struct event_arg *ea) 716 { 717 fc_port_t *fcport, *conflict_fcport; 718 struct get_name_list_extended *e; 719 u16 i, n, found = 0, loop_id; 720 port_id_t id; 721 u64 wwn; 722 u16 data[2]; 723 u8 current_login_state, nvme_cls; 724 725 fcport = ea->fcport; 726 ql_dbg(ql_dbg_disc, vha, 0xffff, 727 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n", 728 __func__, fcport->port_name, fcport->disc_state, 729 fcport->fw_login_state, ea->rc, 730 fcport->login_gen, fcport->last_login_gen, 731 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable); 732 733 if (fcport->disc_state == DSC_DELETE_PEND) 734 return; 735 736 if (ea->rc) { /* rval */ 737 if (fcport->login_retry == 0) { 738 ql_dbg(ql_dbg_disc, vha, 0x20de, 739 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 740 fcport->port_name, fcport->login_retry); 741 } 742 return; 743 } 744 745 if (fcport->last_rscn_gen != fcport->rscn_gen) { 746 qla_rscn_replay(fcport); 747 qlt_schedule_sess_for_deletion(fcport); 748 return; 749 } else if (fcport->last_login_gen != fcport->login_gen) { 750 ql_dbg(ql_dbg_disc, vha, 0x20e0, 751 "%s %8phC login gen changed\n", 752 __func__, fcport->port_name); 753 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 754 return; 755 } 756 757 n = ea->data[0] / sizeof(struct get_name_list_extended); 758 759 ql_dbg(ql_dbg_disc, vha, 0x20e1, 760 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 761 __func__, __LINE__, fcport->port_name, n, 762 fcport->d_id.b.domain, fcport->d_id.b.area, 763 fcport->d_id.b.al_pa, fcport->loop_id); 764 765 for (i = 0; i < n; i++) { 766 e = &vha->gnl.l[i]; 767 wwn = wwn_to_u64(e->port_name); 768 id.b.domain = e->port_id[2]; 769 id.b.area = e->port_id[1]; 770 id.b.al_pa = e->port_id[0]; 771 id.b.rsvd_1 = 0; 772 773 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 774 continue; 775 776 if (IS_SW_RESV_ADDR(id)) 777 continue; 778 779 found = 1; 780 781 loop_id = le16_to_cpu(e->nport_handle); 782 loop_id = (loop_id & 0x7fff); 783 nvme_cls = e->current_login_state >> 4; 784 current_login_state = e->current_login_state & 0xf; 785 786 if (PRLI_PHASE(nvme_cls)) { 787 current_login_state = nvme_cls; 788 fcport->fc4_type &= ~FS_FC4TYPE_FCP; 789 fcport->fc4_type |= FS_FC4TYPE_NVME; 790 } else if (PRLI_PHASE(current_login_state)) { 791 fcport->fc4_type |= FS_FC4TYPE_FCP; 792 fcport->fc4_type &= ~FS_FC4TYPE_NVME; 793 } 794 795 ql_dbg(ql_dbg_disc, vha, 0x20e2, 796 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 797 __func__, fcport->port_name, 798 e->current_login_state, fcport->fw_login_state, 799 fcport->fc4_type, id.b24, fcport->d_id.b24, 800 loop_id, fcport->loop_id); 801 802 switch (fcport->disc_state) { 803 case DSC_DELETE_PEND: 804 case DSC_DELETED: 805 break; 806 default: 807 if ((id.b24 != fcport->d_id.b24 && 808 fcport->d_id.b24 && 809 fcport->loop_id != FC_NO_LOOP_ID) || 810 (fcport->loop_id != FC_NO_LOOP_ID && 811 fcport->loop_id != loop_id)) { 812 ql_dbg(ql_dbg_disc, vha, 0x20e3, 813 "%s %d %8phC post del sess\n", 814 __func__, __LINE__, fcport->port_name); 815 if (fcport->n2n_flag) 816 fcport->d_id.b24 = 0; 817 qlt_schedule_sess_for_deletion(fcport); 818 return; 819 } 820 break; 821 } 822 823 fcport->loop_id = loop_id; 824 if (fcport->n2n_flag) 825 fcport->d_id.b24 = id.b24; 826 827 wwn = wwn_to_u64(fcport->port_name); 828 qlt_find_sess_invalidate_other(vha, wwn, 829 id, loop_id, &conflict_fcport); 830 831 if (conflict_fcport) { 832 /* 833 * Another share fcport share the same loop_id & 834 * nport id. Conflict fcport needs to finish 835 * cleanup before this fcport can proceed to login. 836 */ 837 conflict_fcport->conflict = fcport; 838 fcport->login_pause = 1; 839 } 840 841 switch (vha->hw->current_topology) { 842 default: 843 switch (current_login_state) { 844 case DSC_LS_PRLI_COMP: 845 ql_dbg(ql_dbg_disc, 846 vha, 0x20e4, "%s %d %8phC post gpdb\n", 847 __func__, __LINE__, fcport->port_name); 848 849 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 850 fcport->port_type = FCT_INITIATOR; 851 else 852 fcport->port_type = FCT_TARGET; 853 data[0] = data[1] = 0; 854 qla2x00_post_async_adisc_work(vha, fcport, 855 data); 856 break; 857 case DSC_LS_PLOGI_COMP: 858 if (vha->hw->flags.edif_enabled) { 859 /* check to see if App support Secure */ 860 qla24xx_post_gpdb_work(vha, fcport, 0); 861 break; 862 } 863 fallthrough; 864 case DSC_LS_PORT_UNAVAIL: 865 default: 866 if (fcport->loop_id == FC_NO_LOOP_ID) { 867 qla2x00_find_new_loop_id(vha, fcport); 868 fcport->fw_login_state = 869 DSC_LS_PORT_UNAVAIL; 870 } 871 ql_dbg(ql_dbg_disc, vha, 0x20e5, 872 "%s %d %8phC\n", __func__, __LINE__, 873 fcport->port_name); 874 qla24xx_fcport_handle_login(vha, fcport); 875 break; 876 } 877 break; 878 case ISP_CFG_N: 879 fcport->fw_login_state = current_login_state; 880 fcport->d_id = id; 881 switch (current_login_state) { 882 case DSC_LS_PRLI_PEND: 883 /* 884 * In the middle of PRLI. Let it finish. 885 * Allow relogin code to recheck state again 886 * with GNL. Push disc_state back to DELETED 887 * so GNL can go out again 888 */ 889 qla2x00_set_fcport_disc_state(fcport, 890 DSC_DELETED); 891 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 892 break; 893 case DSC_LS_PRLI_COMP: 894 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 895 fcport->port_type = FCT_INITIATOR; 896 else 897 fcport->port_type = FCT_TARGET; 898 899 data[0] = data[1] = 0; 900 qla2x00_post_async_adisc_work(vha, fcport, 901 data); 902 break; 903 case DSC_LS_PLOGI_COMP: 904 if (vha->hw->flags.edif_enabled && 905 DBELL_ACTIVE(vha)) { 906 /* check to see if App support secure or not */ 907 qla24xx_post_gpdb_work(vha, fcport, 0); 908 break; 909 } 910 if (fcport_is_bigger(fcport)) { 911 /* local adapter is smaller */ 912 if (fcport->loop_id != FC_NO_LOOP_ID) 913 qla2x00_clear_loop_id(fcport); 914 915 fcport->loop_id = loop_id; 916 qla24xx_fcport_handle_login(vha, 917 fcport); 918 break; 919 } 920 fallthrough; 921 default: 922 if (fcport_is_smaller(fcport)) { 923 /* local adapter is bigger */ 924 if (fcport->loop_id != FC_NO_LOOP_ID) 925 qla2x00_clear_loop_id(fcport); 926 927 fcport->loop_id = loop_id; 928 qla24xx_fcport_handle_login(vha, 929 fcport); 930 } 931 break; 932 } 933 break; 934 } /* switch (ha->current_topology) */ 935 } 936 937 if (!found) { 938 switch (vha->hw->current_topology) { 939 case ISP_CFG_F: 940 case ISP_CFG_FL: 941 for (i = 0; i < n; i++) { 942 e = &vha->gnl.l[i]; 943 id.b.domain = e->port_id[0]; 944 id.b.area = e->port_id[1]; 945 id.b.al_pa = e->port_id[2]; 946 id.b.rsvd_1 = 0; 947 loop_id = le16_to_cpu(e->nport_handle); 948 949 if (fcport->d_id.b24 == id.b24) { 950 conflict_fcport = 951 qla2x00_find_fcport_by_wwpn(vha, 952 e->port_name, 0); 953 if (conflict_fcport) { 954 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 955 vha, 0x20e5, 956 "%s %d %8phC post del sess\n", 957 __func__, __LINE__, 958 conflict_fcport->port_name); 959 qlt_schedule_sess_for_deletion 960 (conflict_fcport); 961 } 962 } 963 /* 964 * FW already picked this loop id for 965 * another fcport 966 */ 967 if (fcport->loop_id == loop_id) 968 fcport->loop_id = FC_NO_LOOP_ID; 969 } 970 qla24xx_fcport_handle_login(vha, fcport); 971 break; 972 case ISP_CFG_N: 973 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 974 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 975 if (fcport->n2n_link_reset_cnt < 2) { 976 fcport->n2n_link_reset_cnt++; 977 /* 978 * remote port is not sending PLOGI. 979 * Reset link to kick start his state 980 * machine 981 */ 982 set_bit(N2N_LINK_RESET, 983 &vha->dpc_flags); 984 } else { 985 if (fcport->n2n_chip_reset < 1) { 986 ql_log(ql_log_info, vha, 0x705d, 987 "Chip reset to bring laser down"); 988 set_bit(ISP_ABORT_NEEDED, 989 &vha->dpc_flags); 990 fcport->n2n_chip_reset++; 991 } else { 992 ql_log(ql_log_info, vha, 0x705d, 993 "Remote port %8ph is not coming back\n", 994 fcport->port_name); 995 fcport->scan_state = 0; 996 } 997 } 998 qla2xxx_wake_dpc(vha); 999 } else { 1000 /* 1001 * report port suppose to do PLOGI. Give him 1002 * more time. FW will catch it. 1003 */ 1004 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1005 } 1006 break; 1007 case ISP_CFG_NL: 1008 qla24xx_fcport_handle_login(vha, fcport); 1009 break; 1010 default: 1011 break; 1012 } 1013 } 1014 } /* gnl_event */ 1015 1016 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 1017 { 1018 struct scsi_qla_host *vha = sp->vha; 1019 unsigned long flags; 1020 struct fc_port *fcport = NULL, *tf; 1021 u16 i, n = 0, loop_id; 1022 struct event_arg ea; 1023 struct get_name_list_extended *e; 1024 u64 wwn; 1025 struct list_head h; 1026 bool found = false; 1027 1028 ql_dbg(ql_dbg_disc, vha, 0x20e7, 1029 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 1030 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 1031 sp->u.iocb_cmd.u.mbx.in_mb[2]); 1032 1033 1034 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 1035 memset(&ea, 0, sizeof(ea)); 1036 ea.sp = sp; 1037 ea.rc = res; 1038 1039 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 1040 sizeof(struct get_name_list_extended)) { 1041 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 1042 sizeof(struct get_name_list_extended); 1043 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 1044 } 1045 1046 for (i = 0; i < n; i++) { 1047 e = &vha->gnl.l[i]; 1048 loop_id = le16_to_cpu(e->nport_handle); 1049 /* mask out reserve bit */ 1050 loop_id = (loop_id & 0x7fff); 1051 set_bit(loop_id, vha->hw->loop_id_map); 1052 wwn = wwn_to_u64(e->port_name); 1053 1054 ql_dbg(ql_dbg_disc, vha, 0x20e8, 1055 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 1056 __func__, &wwn, e->port_id[2], e->port_id[1], 1057 e->port_id[0], e->current_login_state, e->last_login_state, 1058 (loop_id & 0x7fff)); 1059 } 1060 1061 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1062 1063 INIT_LIST_HEAD(&h); 1064 fcport = tf = NULL; 1065 if (!list_empty(&vha->gnl.fcports)) 1066 list_splice_init(&vha->gnl.fcports, &h); 1067 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1068 1069 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1070 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1071 list_del_init(&fcport->gnl_entry); 1072 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1073 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1074 ea.fcport = fcport; 1075 1076 qla24xx_handle_gnl_done_event(vha, &ea); 1077 } 1078 1079 /* create new fcport if fw has knowledge of new sessions */ 1080 for (i = 0; i < n; i++) { 1081 port_id_t id; 1082 u64 wwnn; 1083 1084 e = &vha->gnl.l[i]; 1085 wwn = wwn_to_u64(e->port_name); 1086 1087 found = false; 1088 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1089 if (!memcmp((u8 *)&wwn, fcport->port_name, 1090 WWN_SIZE)) { 1091 found = true; 1092 break; 1093 } 1094 } 1095 1096 id.b.domain = e->port_id[2]; 1097 id.b.area = e->port_id[1]; 1098 id.b.al_pa = e->port_id[0]; 1099 id.b.rsvd_1 = 0; 1100 1101 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1102 ql_dbg(ql_dbg_disc, vha, 0x2065, 1103 "%s %d %8phC %06x post new sess\n", 1104 __func__, __LINE__, (u8 *)&wwn, id.b24); 1105 wwnn = wwn_to_u64(e->node_name); 1106 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1107 (u8 *)&wwnn, NULL, 0); 1108 } 1109 } 1110 1111 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1112 vha->gnl.sent = 0; 1113 if (!list_empty(&vha->gnl.fcports)) { 1114 /* retrigger gnl */ 1115 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports, 1116 gnl_entry) { 1117 list_del_init(&fcport->gnl_entry); 1118 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1119 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS) 1120 break; 1121 } 1122 } 1123 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1124 1125 /* ref: INIT */ 1126 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1127 } 1128 1129 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1130 { 1131 srb_t *sp; 1132 int rval = QLA_FUNCTION_FAILED; 1133 unsigned long flags; 1134 u16 *mb; 1135 1136 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1137 return rval; 1138 1139 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1140 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1141 1142 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1143 fcport->flags |= FCF_ASYNC_SENT; 1144 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1145 fcport->last_rscn_gen = fcport->rscn_gen; 1146 fcport->last_login_gen = fcport->login_gen; 1147 1148 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1149 if (vha->gnl.sent) { 1150 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1151 return QLA_SUCCESS; 1152 } 1153 vha->gnl.sent = 1; 1154 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1155 1156 /* ref: INIT */ 1157 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1158 if (!sp) 1159 goto done; 1160 1161 sp->type = SRB_MB_IOCB; 1162 sp->name = "gnlist"; 1163 sp->gen1 = fcport->rscn_gen; 1164 sp->gen2 = fcport->login_gen; 1165 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1166 qla24xx_async_gnl_sp_done); 1167 1168 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1169 mb[0] = MBC_PORT_NODE_NAME_LIST; 1170 mb[1] = BIT_2 | BIT_3; 1171 mb[2] = MSW(vha->gnl.ldma); 1172 mb[3] = LSW(vha->gnl.ldma); 1173 mb[6] = MSW(MSD(vha->gnl.ldma)); 1174 mb[7] = LSW(MSD(vha->gnl.ldma)); 1175 mb[8] = vha->gnl.size; 1176 mb[9] = vha->vp_idx; 1177 1178 ql_dbg(ql_dbg_disc, vha, 0x20da, 1179 "Async-%s - OUT WWPN %8phC hndl %x\n", 1180 sp->name, fcport->port_name, sp->handle); 1181 1182 rval = qla2x00_start_sp(sp); 1183 if (rval != QLA_SUCCESS) 1184 goto done_free_sp; 1185 1186 return rval; 1187 1188 done_free_sp: 1189 /* ref: INIT */ 1190 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1191 done: 1192 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT); 1193 return rval; 1194 } 1195 1196 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1197 { 1198 struct qla_work_evt *e; 1199 1200 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1201 if (!e) 1202 return QLA_FUNCTION_FAILED; 1203 1204 e->u.fcport.fcport = fcport; 1205 fcport->flags |= FCF_ASYNC_ACTIVE; 1206 return qla2x00_post_work(vha, e); 1207 } 1208 1209 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1210 { 1211 struct scsi_qla_host *vha = sp->vha; 1212 struct qla_hw_data *ha = vha->hw; 1213 fc_port_t *fcport = sp->fcport; 1214 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1215 struct event_arg ea; 1216 1217 ql_dbg(ql_dbg_disc, vha, 0x20db, 1218 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1219 sp->name, res, fcport->port_name, mb[1], mb[2]); 1220 1221 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1222 1223 if (res == QLA_FUNCTION_TIMEOUT) 1224 goto done; 1225 1226 memset(&ea, 0, sizeof(ea)); 1227 ea.fcport = fcport; 1228 ea.sp = sp; 1229 1230 qla24xx_handle_gpdb_event(vha, &ea); 1231 1232 done: 1233 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1234 sp->u.iocb_cmd.u.mbx.in_dma); 1235 1236 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1237 } 1238 1239 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1240 { 1241 struct qla_work_evt *e; 1242 1243 if (vha->host->active_mode == MODE_TARGET) 1244 return QLA_FUNCTION_FAILED; 1245 1246 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1247 if (!e) 1248 return QLA_FUNCTION_FAILED; 1249 1250 e->u.fcport.fcport = fcport; 1251 1252 return qla2x00_post_work(vha, e); 1253 } 1254 1255 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1256 { 1257 struct scsi_qla_host *vha = sp->vha; 1258 struct srb_iocb *lio = &sp->u.iocb_cmd; 1259 struct event_arg ea; 1260 1261 ql_dbg(ql_dbg_disc, vha, 0x2129, 1262 "%s %8phC res %x\n", __func__, 1263 sp->fcport->port_name, res); 1264 1265 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1266 1267 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1268 memset(&ea, 0, sizeof(ea)); 1269 ea.fcport = sp->fcport; 1270 ea.data[0] = lio->u.logio.data[0]; 1271 ea.data[1] = lio->u.logio.data[1]; 1272 ea.iop[0] = lio->u.logio.iop[0]; 1273 ea.iop[1] = lio->u.logio.iop[1]; 1274 ea.sp = sp; 1275 if (res == QLA_OS_TIMER_EXPIRED) 1276 ea.data[0] = QLA_OS_TIMER_EXPIRED; 1277 else if (res) 1278 ea.data[0] = MBS_COMMAND_ERROR; 1279 1280 qla24xx_handle_prli_done_event(vha, &ea); 1281 } 1282 1283 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1284 } 1285 1286 int 1287 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1288 { 1289 srb_t *sp; 1290 struct srb_iocb *lio; 1291 int rval = QLA_FUNCTION_FAILED; 1292 1293 if (!vha->flags.online) { 1294 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1295 __func__, __LINE__, fcport->port_name); 1296 return rval; 1297 } 1298 1299 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1300 fcport->fw_login_state == DSC_LS_PRLI_PEND) && 1301 qla_dual_mode_enabled(vha)) { 1302 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1303 __func__, __LINE__, fcport->port_name); 1304 return rval; 1305 } 1306 1307 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1308 if (!sp) 1309 return rval; 1310 1311 fcport->flags |= FCF_ASYNC_SENT; 1312 fcport->logout_completed = 0; 1313 1314 sp->type = SRB_PRLI_CMD; 1315 sp->name = "prli"; 1316 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1317 qla2x00_async_prli_sp_done); 1318 1319 lio = &sp->u.iocb_cmd; 1320 lio->u.logio.flags = 0; 1321 1322 if (NVME_TARGET(vha->hw, fcport)) 1323 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1324 1325 ql_dbg(ql_dbg_disc, vha, 0x211b, 1326 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n", 1327 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1328 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority, 1329 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp"); 1330 1331 rval = qla2x00_start_sp(sp); 1332 if (rval != QLA_SUCCESS) { 1333 fcport->flags |= FCF_LOGIN_NEEDED; 1334 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1335 goto done_free_sp; 1336 } 1337 1338 return rval; 1339 1340 done_free_sp: 1341 /* ref: INIT */ 1342 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1343 fcport->flags &= ~FCF_ASYNC_SENT; 1344 return rval; 1345 } 1346 1347 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1348 { 1349 struct qla_work_evt *e; 1350 1351 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1352 if (!e) 1353 return QLA_FUNCTION_FAILED; 1354 1355 e->u.fcport.fcport = fcport; 1356 e->u.fcport.opt = opt; 1357 fcport->flags |= FCF_ASYNC_ACTIVE; 1358 return qla2x00_post_work(vha, e); 1359 } 1360 1361 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1362 { 1363 srb_t *sp; 1364 struct srb_iocb *mbx; 1365 int rval = QLA_FUNCTION_FAILED; 1366 u16 *mb; 1367 dma_addr_t pd_dma; 1368 struct port_database_24xx *pd; 1369 struct qla_hw_data *ha = vha->hw; 1370 1371 if (IS_SESSION_DELETED(fcport)) { 1372 ql_log(ql_log_warn, vha, 0xffff, 1373 "%s: %8phC is being delete - not sending command.\n", 1374 __func__, fcport->port_name); 1375 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1376 return rval; 1377 } 1378 1379 if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) { 1380 ql_log(ql_log_warn, vha, 0xffff, 1381 "%s: %8phC online %d flags %x - not sending command.\n", 1382 __func__, fcport->port_name, vha->flags.online, fcport->flags); 1383 goto done; 1384 } 1385 1386 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1387 if (!sp) 1388 goto done; 1389 1390 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB); 1391 1392 fcport->flags |= FCF_ASYNC_SENT; 1393 sp->type = SRB_MB_IOCB; 1394 sp->name = "gpdb"; 1395 sp->gen1 = fcport->rscn_gen; 1396 sp->gen2 = fcport->login_gen; 1397 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1398 qla24xx_async_gpdb_sp_done); 1399 1400 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1401 if (pd == NULL) { 1402 ql_log(ql_log_warn, vha, 0xd043, 1403 "Failed to allocate port database structure.\n"); 1404 goto done_free_sp; 1405 } 1406 1407 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1408 mb[0] = MBC_GET_PORT_DATABASE; 1409 mb[1] = fcport->loop_id; 1410 mb[2] = MSW(pd_dma); 1411 mb[3] = LSW(pd_dma); 1412 mb[6] = MSW(MSD(pd_dma)); 1413 mb[7] = LSW(MSD(pd_dma)); 1414 mb[9] = vha->vp_idx; 1415 mb[10] = opt; 1416 1417 mbx = &sp->u.iocb_cmd; 1418 mbx->u.mbx.in = (void *)pd; 1419 mbx->u.mbx.in_dma = pd_dma; 1420 1421 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1422 "Async-%s %8phC hndl %x opt %x\n", 1423 sp->name, fcport->port_name, sp->handle, opt); 1424 1425 rval = qla2x00_start_sp(sp); 1426 if (rval != QLA_SUCCESS) 1427 goto done_free_sp; 1428 return rval; 1429 1430 done_free_sp: 1431 if (pd) 1432 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1433 1434 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1435 fcport->flags &= ~FCF_ASYNC_SENT; 1436 done: 1437 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1438 qla24xx_post_gpdb_work(vha, fcport, opt); 1439 return rval; 1440 } 1441 1442 static 1443 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1444 { 1445 unsigned long flags; 1446 1447 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1448 ea->fcport->login_gen++; 1449 ea->fcport->deleted = 0; 1450 ea->fcport->logout_on_delete = 1; 1451 1452 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1453 vha->fcport_count++; 1454 ea->fcport->login_succ = 1; 1455 1456 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1457 qla24xx_sched_upd_fcport(ea->fcport); 1458 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1459 } else if (ea->fcport->login_succ) { 1460 /* 1461 * We have an existing session. A late RSCN delivery 1462 * must have triggered the session to be re-validate. 1463 * Session is still valid. 1464 */ 1465 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1466 "%s %d %8phC session revalidate success\n", 1467 __func__, __LINE__, ea->fcport->port_name); 1468 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE); 1469 } 1470 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1471 } 1472 1473 static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport, 1474 struct port_database_24xx *pd) 1475 { 1476 int rc = 0; 1477 1478 if (pd->secure_login) { 1479 ql_dbg(ql_dbg_disc, vha, 0x104d, 1480 "Secure Login established on %8phC\n", 1481 fcport->port_name); 1482 fcport->flags |= FCF_FCSP_DEVICE; 1483 } else { 1484 ql_dbg(ql_dbg_disc, vha, 0x104d, 1485 "non-Secure Login %8phC", 1486 fcport->port_name); 1487 fcport->flags &= ~FCF_FCSP_DEVICE; 1488 } 1489 if (vha->hw->flags.edif_enabled) { 1490 if (fcport->flags & FCF_FCSP_DEVICE) { 1491 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND); 1492 /* Start edif prli timer & ring doorbell for app */ 1493 fcport->edif.rx_sa_set = 0; 1494 fcport->edif.tx_sa_set = 0; 1495 fcport->edif.rx_sa_pending = 0; 1496 fcport->edif.tx_sa_pending = 0; 1497 1498 qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE, 1499 fcport->d_id.b24); 1500 1501 if (DBELL_ACTIVE(vha)) { 1502 ql_dbg(ql_dbg_disc, vha, 0x20ef, 1503 "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n", 1504 __func__, __LINE__, fcport->port_name); 1505 fcport->edif.app_sess_online = 1; 1506 1507 qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED, 1508 fcport->d_id.b24, 0, fcport); 1509 } 1510 1511 rc = 1; 1512 } else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 1513 ql_dbg(ql_dbg_disc, vha, 0x2117, 1514 "%s %d %8phC post prli\n", 1515 __func__, __LINE__, fcport->port_name); 1516 qla24xx_post_prli_work(vha, fcport); 1517 rc = 1; 1518 } 1519 } 1520 return rc; 1521 } 1522 1523 static 1524 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1525 { 1526 fc_port_t *fcport = ea->fcport; 1527 struct port_database_24xx *pd; 1528 struct srb *sp = ea->sp; 1529 uint8_t ls; 1530 1531 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1532 1533 fcport->flags &= ~FCF_ASYNC_SENT; 1534 1535 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1536 "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__, 1537 fcport->port_name, fcport->disc_state, pd->current_login_state, 1538 fcport->fc4_type, ea->rc); 1539 1540 if (fcport->disc_state == DSC_DELETE_PEND) { 1541 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n", 1542 __func__, __LINE__, fcport->port_name); 1543 return; 1544 } 1545 1546 if (NVME_TARGET(vha->hw, fcport)) 1547 ls = pd->current_login_state >> 4; 1548 else 1549 ls = pd->current_login_state & 0xf; 1550 1551 if (ea->sp->gen2 != fcport->login_gen) { 1552 /* target side must have changed it. */ 1553 1554 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1555 "%s %8phC generation changed\n", 1556 __func__, fcport->port_name); 1557 return; 1558 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1559 qla_rscn_replay(fcport); 1560 qlt_schedule_sess_for_deletion(fcport); 1561 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1562 __func__, __LINE__, fcport->port_name, ls); 1563 return; 1564 } 1565 1566 switch (ls) { 1567 case PDS_PRLI_COMPLETE: 1568 __qla24xx_parse_gpdb(vha, fcport, pd); 1569 break; 1570 case PDS_PLOGI_COMPLETE: 1571 if (qla_chk_secure_login(vha, fcport, pd)) { 1572 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1573 __func__, __LINE__, fcport->port_name, ls); 1574 return; 1575 } 1576 fallthrough; 1577 case PDS_PLOGI_PENDING: 1578 case PDS_PRLI_PENDING: 1579 case PDS_PRLI2_PENDING: 1580 /* Set discovery state back to GNL to Relogin attempt */ 1581 if (qla_dual_mode_enabled(vha) || 1582 qla_ini_mode_enabled(vha)) { 1583 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1584 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1585 } 1586 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1587 __func__, __LINE__, fcport->port_name, ls); 1588 return; 1589 case PDS_LOGO_PENDING: 1590 case PDS_PORT_UNAVAILABLE: 1591 default: 1592 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1593 __func__, __LINE__, fcport->port_name); 1594 qlt_schedule_sess_for_deletion(fcport); 1595 return; 1596 } 1597 __qla24xx_handle_gpdb_event(vha, ea); 1598 } /* gpdb event */ 1599 1600 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1601 { 1602 u8 login = 0; 1603 int rc; 1604 1605 ql_dbg(ql_dbg_disc, vha, 0x307b, 1606 "%s %8phC DS %d LS %d lid %d retries=%d\n", 1607 __func__, fcport->port_name, fcport->disc_state, 1608 fcport->fw_login_state, fcport->loop_id, fcport->login_retry); 1609 1610 if (qla_tgt_mode_enabled(vha)) 1611 return; 1612 1613 if (qla_dual_mode_enabled(vha)) { 1614 if (N2N_TOPO(vha->hw)) { 1615 u64 mywwn, wwn; 1616 1617 mywwn = wwn_to_u64(vha->port_name); 1618 wwn = wwn_to_u64(fcport->port_name); 1619 if (mywwn > wwn) 1620 login = 1; 1621 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1622 && time_after_eq(jiffies, 1623 fcport->plogi_nack_done_deadline)) 1624 login = 1; 1625 } else { 1626 login = 1; 1627 } 1628 } else { 1629 /* initiator mode */ 1630 login = 1; 1631 } 1632 1633 if (login && fcport->login_retry) { 1634 fcport->login_retry--; 1635 if (fcport->loop_id == FC_NO_LOOP_ID) { 1636 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1637 rc = qla2x00_find_new_loop_id(vha, fcport); 1638 if (rc) { 1639 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1640 "%s %d %8phC post del sess - out of loopid\n", 1641 __func__, __LINE__, fcport->port_name); 1642 fcport->scan_state = 0; 1643 qlt_schedule_sess_for_deletion(fcport); 1644 return; 1645 } 1646 } 1647 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1648 "%s %d %8phC post login\n", 1649 __func__, __LINE__, fcport->port_name); 1650 qla2x00_post_async_login_work(vha, fcport, NULL); 1651 } 1652 } 1653 1654 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1655 { 1656 u16 data[2]; 1657 u16 sec; 1658 1659 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1660 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n", 1661 __func__, fcport->port_name, fcport->disc_state, 1662 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1663 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1664 fcport->login_gen, fcport->loop_id, fcport->scan_state, 1665 fcport->fc4_type); 1666 1667 if (fcport->scan_state != QLA_FCPORT_FOUND || 1668 fcport->disc_state == DSC_DELETE_PEND) 1669 return 0; 1670 1671 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1672 qla_dual_mode_enabled(vha) && 1673 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1674 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1675 return 0; 1676 1677 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1678 !N2N_TOPO(vha->hw)) { 1679 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1680 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1681 return 0; 1682 } 1683 } 1684 1685 /* Target won't initiate port login if fabric is present */ 1686 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1687 return 0; 1688 1689 if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) { 1690 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1691 return 0; 1692 } 1693 1694 switch (fcport->disc_state) { 1695 case DSC_DELETED: 1696 switch (vha->hw->current_topology) { 1697 case ISP_CFG_N: 1698 if (fcport_is_smaller(fcport)) { 1699 /* this adapter is bigger */ 1700 if (fcport->login_retry) { 1701 if (fcport->loop_id == FC_NO_LOOP_ID) { 1702 qla2x00_find_new_loop_id(vha, 1703 fcport); 1704 fcport->fw_login_state = 1705 DSC_LS_PORT_UNAVAIL; 1706 } 1707 fcport->login_retry--; 1708 qla_post_els_plogi_work(vha, fcport); 1709 } else { 1710 ql_log(ql_log_info, vha, 0x705d, 1711 "Unable to reach remote port %8phC", 1712 fcport->port_name); 1713 } 1714 } else { 1715 qla24xx_post_gnl_work(vha, fcport); 1716 } 1717 break; 1718 default: 1719 if (fcport->loop_id == FC_NO_LOOP_ID) { 1720 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1721 "%s %d %8phC post gnl\n", 1722 __func__, __LINE__, fcport->port_name); 1723 qla24xx_post_gnl_work(vha, fcport); 1724 } else { 1725 qla_chk_n2n_b4_login(vha, fcport); 1726 } 1727 break; 1728 } 1729 break; 1730 1731 case DSC_GNL: 1732 switch (vha->hw->current_topology) { 1733 case ISP_CFG_N: 1734 if ((fcport->current_login_state & 0xf) == 0x6) { 1735 ql_dbg(ql_dbg_disc, vha, 0x2118, 1736 "%s %d %8phC post GPDB work\n", 1737 __func__, __LINE__, fcport->port_name); 1738 fcport->chip_reset = 1739 vha->hw->base_qpair->chip_reset; 1740 qla24xx_post_gpdb_work(vha, fcport, 0); 1741 } else { 1742 ql_dbg(ql_dbg_disc, vha, 0x2118, 1743 "%s %d %8phC post %s PRLI\n", 1744 __func__, __LINE__, fcport->port_name, 1745 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1746 "FC"); 1747 qla24xx_post_prli_work(vha, fcport); 1748 } 1749 break; 1750 default: 1751 if (fcport->login_pause) { 1752 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1753 "%s %d %8phC exit\n", 1754 __func__, __LINE__, 1755 fcport->port_name); 1756 fcport->last_rscn_gen = fcport->rscn_gen; 1757 fcport->last_login_gen = fcport->login_gen; 1758 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1759 break; 1760 } 1761 qla_chk_n2n_b4_login(vha, fcport); 1762 break; 1763 } 1764 break; 1765 1766 case DSC_LOGIN_FAILED: 1767 if (N2N_TOPO(vha->hw)) 1768 qla_chk_n2n_b4_login(vha, fcport); 1769 else 1770 qlt_schedule_sess_for_deletion(fcport); 1771 break; 1772 1773 case DSC_LOGIN_COMPLETE: 1774 /* recheck login state */ 1775 data[0] = data[1] = 0; 1776 qla2x00_post_async_adisc_work(vha, fcport, data); 1777 break; 1778 1779 case DSC_LOGIN_PEND: 1780 if (vha->hw->flags.edif_enabled) 1781 break; 1782 1783 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1784 ql_dbg(ql_dbg_disc, vha, 0x2118, 1785 "%s %d %8phC post %s PRLI\n", 1786 __func__, __LINE__, fcport->port_name, 1787 NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC"); 1788 qla24xx_post_prli_work(vha, fcport); 1789 } 1790 break; 1791 1792 case DSC_UPD_FCPORT: 1793 sec = jiffies_to_msecs(jiffies - 1794 fcport->jiffies_at_registration)/1000; 1795 if (fcport->sec_since_registration < sec && sec && 1796 !(sec % 60)) { 1797 fcport->sec_since_registration = sec; 1798 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1799 "%s %8phC - Slow Rport registration(%d Sec)\n", 1800 __func__, fcport->port_name, sec); 1801 } 1802 1803 if (fcport->next_disc_state != DSC_DELETE_PEND) 1804 fcport->next_disc_state = DSC_ADISC; 1805 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1806 break; 1807 1808 default: 1809 break; 1810 } 1811 1812 return 0; 1813 } 1814 1815 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1816 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1817 { 1818 struct qla_work_evt *e; 1819 1820 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1821 if (!e) 1822 return QLA_FUNCTION_FAILED; 1823 1824 e->u.new_sess.id = *id; 1825 e->u.new_sess.pla = pla; 1826 e->u.new_sess.fc4_type = fc4_type; 1827 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1828 if (node_name) 1829 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1830 1831 return qla2x00_post_work(vha, e); 1832 } 1833 1834 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1835 { 1836 fc_port_t *fcport; 1837 unsigned long flags; 1838 1839 switch (ea->id.b.rsvd_1) { 1840 case RSCN_PORT_ADDR: 1841 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1842 if (fcport) { 1843 if (ql2xfc2target && 1844 fcport->flags & FCF_FCP2_DEVICE && 1845 atomic_read(&fcport->state) == FCS_ONLINE) { 1846 ql_dbg(ql_dbg_disc, vha, 0x2115, 1847 "Delaying session delete for FCP2 portid=%06x %8phC ", 1848 fcport->d_id.b24, fcport->port_name); 1849 return; 1850 } 1851 1852 if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) { 1853 /* 1854 * On ipsec start by remote port, Target port 1855 * may use RSCN to trigger initiator to 1856 * relogin. If driver is already in the 1857 * process of a relogin, then ignore the RSCN 1858 * and allow the current relogin to continue. 1859 * This reduces thrashing of the connection. 1860 */ 1861 if (atomic_read(&fcport->state) == FCS_ONLINE) { 1862 /* 1863 * If state = online, then set scan_needed=1 to do relogin. 1864 * Otherwise we're already in the middle of a relogin 1865 */ 1866 fcport->scan_needed = 1; 1867 fcport->rscn_gen++; 1868 } 1869 } else { 1870 fcport->scan_needed = 1; 1871 fcport->rscn_gen++; 1872 } 1873 } 1874 break; 1875 case RSCN_AREA_ADDR: 1876 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1877 if (fcport->flags & FCF_FCP2_DEVICE && 1878 atomic_read(&fcport->state) == FCS_ONLINE) 1879 continue; 1880 1881 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) { 1882 fcport->scan_needed = 1; 1883 fcport->rscn_gen++; 1884 } 1885 } 1886 break; 1887 case RSCN_DOM_ADDR: 1888 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1889 if (fcport->flags & FCF_FCP2_DEVICE && 1890 atomic_read(&fcport->state) == FCS_ONLINE) 1891 continue; 1892 1893 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) { 1894 fcport->scan_needed = 1; 1895 fcport->rscn_gen++; 1896 } 1897 } 1898 break; 1899 case RSCN_FAB_ADDR: 1900 default: 1901 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1902 if (fcport->flags & FCF_FCP2_DEVICE && 1903 atomic_read(&fcport->state) == FCS_ONLINE) 1904 continue; 1905 1906 fcport->scan_needed = 1; 1907 fcport->rscn_gen++; 1908 } 1909 break; 1910 } 1911 1912 spin_lock_irqsave(&vha->work_lock, flags); 1913 if (vha->scan.scan_flags == 0) { 1914 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1915 vha->scan.scan_flags |= SF_QUEUED; 1916 schedule_delayed_work(&vha->scan.scan_work, 5); 1917 } 1918 spin_unlock_irqrestore(&vha->work_lock, flags); 1919 } 1920 1921 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1922 struct event_arg *ea) 1923 { 1924 fc_port_t *fcport = ea->fcport; 1925 1926 if (test_bit(UNLOADING, &vha->dpc_flags)) 1927 return; 1928 1929 ql_dbg(ql_dbg_disc, vha, 0x2102, 1930 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1931 __func__, fcport->port_name, fcport->disc_state, 1932 fcport->fw_login_state, fcport->login_pause, 1933 fcport->deleted, fcport->conflict, 1934 fcport->last_rscn_gen, fcport->rscn_gen, 1935 fcport->last_login_gen, fcport->login_gen, 1936 fcport->flags); 1937 1938 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1939 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1940 __func__, __LINE__, fcport->port_name); 1941 qla24xx_post_gnl_work(vha, fcport); 1942 return; 1943 } 1944 1945 qla24xx_fcport_handle_login(vha, fcport); 1946 } 1947 1948 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1949 struct event_arg *ea) 1950 { 1951 if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) && 1952 vha->hw->flags.edif_enabled) { 1953 /* check to see if App support Secure */ 1954 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1955 return; 1956 } 1957 1958 /* for pure Target Mode, PRLI will not be initiated */ 1959 if (vha->host->active_mode == MODE_TARGET) 1960 return; 1961 1962 ql_dbg(ql_dbg_disc, vha, 0x2118, 1963 "%s %d %8phC post PRLI\n", 1964 __func__, __LINE__, ea->fcport->port_name); 1965 qla24xx_post_prli_work(vha, ea->fcport); 1966 } 1967 1968 /* 1969 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1970 * to be consumed by the fcport 1971 */ 1972 void qla_rscn_replay(fc_port_t *fcport) 1973 { 1974 struct event_arg ea; 1975 1976 switch (fcport->disc_state) { 1977 case DSC_DELETE_PEND: 1978 return; 1979 default: 1980 break; 1981 } 1982 1983 if (fcport->scan_needed) { 1984 memset(&ea, 0, sizeof(ea)); 1985 ea.id = fcport->d_id; 1986 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1987 qla2x00_handle_rscn(fcport->vha, &ea); 1988 } 1989 } 1990 1991 static void 1992 qla2x00_tmf_iocb_timeout(void *data) 1993 { 1994 srb_t *sp = data; 1995 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1996 int rc, h; 1997 unsigned long flags; 1998 1999 rc = qla24xx_async_abort_cmd(sp, false); 2000 if (rc) { 2001 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 2002 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 2003 if (sp->qpair->req->outstanding_cmds[h] == sp) { 2004 sp->qpair->req->outstanding_cmds[h] = NULL; 2005 qla_put_fw_resources(sp->qpair, &sp->iores); 2006 break; 2007 } 2008 } 2009 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 2010 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT); 2011 tmf->u.tmf.data = QLA_FUNCTION_FAILED; 2012 complete(&tmf->u.tmf.comp); 2013 } 2014 } 2015 2016 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 2017 { 2018 struct srb_iocb *tmf = &sp->u.iocb_cmd; 2019 2020 complete(&tmf->u.tmf.comp); 2021 } 2022 2023 int 2024 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 2025 uint32_t tag) 2026 { 2027 struct scsi_qla_host *vha = fcport->vha; 2028 struct srb_iocb *tm_iocb; 2029 srb_t *sp; 2030 int rval = QLA_FUNCTION_FAILED; 2031 2032 /* ref: INIT */ 2033 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 2034 if (!sp) 2035 goto done; 2036 2037 qla_vha_mark_busy(vha); 2038 sp->type = SRB_TM_CMD; 2039 sp->name = "tmf"; 2040 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), 2041 qla2x00_tmf_sp_done); 2042 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout; 2043 2044 tm_iocb = &sp->u.iocb_cmd; 2045 init_completion(&tm_iocb->u.tmf.comp); 2046 tm_iocb->u.tmf.flags = flags; 2047 tm_iocb->u.tmf.lun = lun; 2048 2049 ql_dbg(ql_dbg_taskm, vha, 0x802f, 2050 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 2051 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 2052 fcport->d_id.b.area, fcport->d_id.b.al_pa); 2053 2054 rval = qla2x00_start_sp(sp); 2055 if (rval != QLA_SUCCESS) 2056 goto done_free_sp; 2057 wait_for_completion(&tm_iocb->u.tmf.comp); 2058 2059 rval = tm_iocb->u.tmf.data; 2060 2061 if (rval != QLA_SUCCESS) { 2062 ql_log(ql_log_warn, vha, 0x8030, 2063 "TM IOCB failed (%x).\n", rval); 2064 } 2065 2066 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 2067 flags = tm_iocb->u.tmf.flags; 2068 lun = (uint16_t)tm_iocb->u.tmf.lun; 2069 2070 /* Issue Marker IOCB */ 2071 qla2x00_marker(vha, vha->hw->base_qpair, 2072 fcport->loop_id, lun, 2073 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 2074 } 2075 2076 done_free_sp: 2077 /* ref: INIT */ 2078 kref_put(&sp->cmd_kref, qla2x00_sp_release); 2079 done: 2080 return rval; 2081 } 2082 2083 int 2084 qla24xx_async_abort_command(srb_t *sp) 2085 { 2086 unsigned long flags = 0; 2087 2088 uint32_t handle; 2089 fc_port_t *fcport = sp->fcport; 2090 struct qla_qpair *qpair = sp->qpair; 2091 struct scsi_qla_host *vha = fcport->vha; 2092 struct req_que *req = qpair->req; 2093 2094 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 2095 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 2096 if (req->outstanding_cmds[handle] == sp) 2097 break; 2098 } 2099 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 2100 2101 if (handle == req->num_outstanding_cmds) { 2102 /* Command not found. */ 2103 return QLA_ERR_NOT_FOUND; 2104 } 2105 if (sp->type == SRB_FXIOCB_DCMD) 2106 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 2107 FXDISC_ABORT_IOCTL); 2108 2109 return qla24xx_async_abort_cmd(sp, true); 2110 } 2111 2112 static void 2113 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2114 { 2115 struct srb *sp; 2116 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2117 ea->data[0]); 2118 2119 switch (ea->data[0]) { 2120 case MBS_COMMAND_COMPLETE: 2121 ql_dbg(ql_dbg_disc, vha, 0x2118, 2122 "%s %d %8phC post gpdb\n", 2123 __func__, __LINE__, ea->fcport->port_name); 2124 2125 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2126 ea->fcport->logout_on_delete = 1; 2127 ea->fcport->nvme_prli_service_param = ea->iop[0]; 2128 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 2129 ea->fcport->nvme_first_burst_size = 2130 (ea->iop[1] & 0xffff) * 512; 2131 else 2132 ea->fcport->nvme_first_burst_size = 0; 2133 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2134 break; 2135 default: 2136 sp = ea->sp; 2137 ql_dbg(ql_dbg_disc, vha, 0x2118, 2138 "%s %d %8phC priority %s, fc4type %x prev try %s\n", 2139 __func__, __LINE__, ea->fcport->port_name, 2140 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ? 2141 "FCP" : "NVMe", ea->fcport->fc4_type, 2142 (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ? 2143 "NVME" : "FCP"); 2144 2145 if (NVME_FCP_TARGET(ea->fcport)) { 2146 if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) 2147 ea->fcport->do_prli_nvme = 0; 2148 else 2149 ea->fcport->do_prli_nvme = 1; 2150 } else { 2151 ea->fcport->do_prli_nvme = 0; 2152 } 2153 2154 if (N2N_TOPO(vha->hw)) { 2155 if (ea->fcport->n2n_link_reset_cnt == 2156 vha->hw->login_retry_count && 2157 ea->fcport->flags & FCF_FCSP_DEVICE) { 2158 /* remote authentication app just started */ 2159 ea->fcport->n2n_link_reset_cnt = 0; 2160 } 2161 2162 if (ea->fcport->n2n_link_reset_cnt < 2163 vha->hw->login_retry_count) { 2164 ea->fcport->n2n_link_reset_cnt++; 2165 vha->relogin_jif = jiffies + 2 * HZ; 2166 /* 2167 * PRLI failed. Reset link to kick start 2168 * state machine 2169 */ 2170 set_bit(N2N_LINK_RESET, &vha->dpc_flags); 2171 qla2xxx_wake_dpc(vha); 2172 } else { 2173 ql_log(ql_log_warn, vha, 0x2119, 2174 "%s %d %8phC Unable to reconnect\n", 2175 __func__, __LINE__, 2176 ea->fcport->port_name); 2177 } 2178 } else { 2179 /* 2180 * switch connect. login failed. Take connection down 2181 * and allow relogin to retrigger 2182 */ 2183 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2184 ea->fcport->keep_nport_handle = 0; 2185 ea->fcport->logout_on_delete = 1; 2186 qlt_schedule_sess_for_deletion(ea->fcport); 2187 } 2188 break; 2189 } 2190 } 2191 2192 void 2193 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2194 { 2195 port_id_t cid; /* conflict Nport id */ 2196 u16 lid; 2197 struct fc_port *conflict_fcport; 2198 unsigned long flags; 2199 struct fc_port *fcport = ea->fcport; 2200 2201 ql_dbg(ql_dbg_disc, vha, 0xffff, 2202 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 2203 __func__, fcport->port_name, fcport->disc_state, 2204 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 2205 ea->sp->gen1, fcport->rscn_gen, 2206 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 2207 2208 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 2209 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 2210 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2211 "%s %d %8phC Remote is trying to login\n", 2212 __func__, __LINE__, fcport->port_name); 2213 return; 2214 } 2215 2216 if ((fcport->disc_state == DSC_DELETE_PEND) || 2217 (fcport->disc_state == DSC_DELETED)) { 2218 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2219 return; 2220 } 2221 2222 if (ea->sp->gen2 != fcport->login_gen) { 2223 /* target side must have changed it. */ 2224 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2225 "%s %8phC generation changed\n", 2226 __func__, fcport->port_name); 2227 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2228 return; 2229 } else if (ea->sp->gen1 != fcport->rscn_gen) { 2230 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2231 "%s %8phC RSCN generation changed\n", 2232 __func__, fcport->port_name); 2233 qla_rscn_replay(fcport); 2234 qlt_schedule_sess_for_deletion(fcport); 2235 return; 2236 } 2237 2238 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2239 ea->data[0]); 2240 2241 switch (ea->data[0]) { 2242 case MBS_COMMAND_COMPLETE: 2243 /* 2244 * Driver must validate login state - If PRLI not complete, 2245 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 2246 * requests. 2247 */ 2248 if (vha->hw->flags.edif_enabled) { 2249 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2250 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2251 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2252 ea->fcport->logout_on_delete = 1; 2253 ea->fcport->send_els_logo = 0; 2254 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 2255 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2256 2257 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2258 } else { 2259 if (NVME_TARGET(vha->hw, fcport)) { 2260 ql_dbg(ql_dbg_disc, vha, 0x2117, 2261 "%s %d %8phC post prli\n", 2262 __func__, __LINE__, fcport->port_name); 2263 qla24xx_post_prli_work(vha, fcport); 2264 } else { 2265 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2266 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n", 2267 __func__, __LINE__, fcport->port_name, 2268 fcport->loop_id, fcport->d_id.b24); 2269 2270 set_bit(fcport->loop_id, vha->hw->loop_id_map); 2271 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2272 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2273 fcport->logout_on_delete = 1; 2274 fcport->send_els_logo = 0; 2275 fcport->fw_login_state = DSC_LS_PRLI_COMP; 2276 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2277 2278 qla24xx_post_gpdb_work(vha, fcport, 0); 2279 } 2280 } 2281 break; 2282 case MBS_COMMAND_ERROR: 2283 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2284 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2285 2286 qlt_schedule_sess_for_deletion(ea->fcport); 2287 break; 2288 case MBS_LOOP_ID_USED: 2289 /* data[1] = IO PARAM 1 = nport ID */ 2290 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2291 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2292 cid.b.al_pa = ea->iop[1] & 0xff; 2293 cid.b.rsvd_1 = 0; 2294 2295 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2296 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2297 __func__, __LINE__, ea->fcport->port_name, 2298 ea->fcport->loop_id, cid.b24); 2299 2300 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2301 ea->fcport->loop_id = FC_NO_LOOP_ID; 2302 qla24xx_post_gnl_work(vha, ea->fcport); 2303 break; 2304 case MBS_PORT_ID_USED: 2305 lid = ea->iop[1] & 0xffff; 2306 qlt_find_sess_invalidate_other(vha, 2307 wwn_to_u64(ea->fcport->port_name), 2308 ea->fcport->d_id, lid, &conflict_fcport); 2309 2310 if (conflict_fcport) { 2311 /* 2312 * Another fcport share the same loop_id/nport id. 2313 * Conflict fcport needs to finish cleanup before this 2314 * fcport can proceed to login. 2315 */ 2316 conflict_fcport->conflict = ea->fcport; 2317 ea->fcport->login_pause = 1; 2318 2319 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2320 "%s %d %8phC NPortId %06x inuse with loopid 0x%x.\n", 2321 __func__, __LINE__, ea->fcport->port_name, 2322 ea->fcport->d_id.b24, lid); 2323 } else { 2324 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2325 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2326 __func__, __LINE__, ea->fcport->port_name, 2327 ea->fcport->d_id.b24, lid); 2328 2329 qla2x00_clear_loop_id(ea->fcport); 2330 set_bit(lid, vha->hw->loop_id_map); 2331 ea->fcport->loop_id = lid; 2332 ea->fcport->keep_nport_handle = 0; 2333 ea->fcport->logout_on_delete = 1; 2334 qlt_schedule_sess_for_deletion(ea->fcport); 2335 } 2336 break; 2337 } 2338 return; 2339 } 2340 2341 /****************************************************************************/ 2342 /* QLogic ISP2x00 Hardware Support Functions. */ 2343 /****************************************************************************/ 2344 2345 static int 2346 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2347 { 2348 int rval = QLA_SUCCESS; 2349 struct qla_hw_data *ha = vha->hw; 2350 uint32_t idc_major_ver, idc_minor_ver; 2351 uint16_t config[4]; 2352 2353 qla83xx_idc_lock(vha, 0); 2354 2355 /* SV: TODO: Assign initialization timeout from 2356 * flash-info / other param 2357 */ 2358 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2359 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2360 2361 /* Set our fcoe function presence */ 2362 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2363 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2364 "Error while setting DRV-Presence.\n"); 2365 rval = QLA_FUNCTION_FAILED; 2366 goto exit; 2367 } 2368 2369 /* Decide the reset ownership */ 2370 qla83xx_reset_ownership(vha); 2371 2372 /* 2373 * On first protocol driver load: 2374 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2375 * register. 2376 * Others: Check compatibility with current IDC Major version. 2377 */ 2378 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2379 if (ha->flags.nic_core_reset_owner) { 2380 /* Set IDC Major version */ 2381 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2382 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2383 2384 /* Clearing IDC-Lock-Recovery register */ 2385 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2386 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2387 /* 2388 * Clear further IDC participation if we are not compatible with 2389 * the current IDC Major Version. 2390 */ 2391 ql_log(ql_log_warn, vha, 0xb07d, 2392 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2393 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2394 __qla83xx_clear_drv_presence(vha); 2395 rval = QLA_FUNCTION_FAILED; 2396 goto exit; 2397 } 2398 /* Each function sets its supported Minor version. */ 2399 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2400 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2401 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2402 2403 if (ha->flags.nic_core_reset_owner) { 2404 memset(config, 0, sizeof(config)); 2405 if (!qla81xx_get_port_config(vha, config)) 2406 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2407 QLA8XXX_DEV_READY); 2408 } 2409 2410 rval = qla83xx_idc_state_handler(vha); 2411 2412 exit: 2413 qla83xx_idc_unlock(vha, 0); 2414 2415 return rval; 2416 } 2417 2418 /* 2419 * qla2x00_initialize_adapter 2420 * Initialize board. 2421 * 2422 * Input: 2423 * ha = adapter block pointer. 2424 * 2425 * Returns: 2426 * 0 = success 2427 */ 2428 int 2429 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2430 { 2431 int rval; 2432 struct qla_hw_data *ha = vha->hw; 2433 struct req_que *req = ha->req_q_map[0]; 2434 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2435 2436 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2437 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2438 2439 /* Clear adapter flags. */ 2440 vha->flags.online = 0; 2441 ha->flags.chip_reset_done = 0; 2442 vha->flags.reset_active = 0; 2443 ha->flags.pci_channel_io_perm_failure = 0; 2444 ha->flags.eeh_busy = 0; 2445 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2446 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2447 atomic_set(&vha->loop_state, LOOP_DOWN); 2448 vha->device_flags = DFLG_NO_CABLE; 2449 vha->dpc_flags = 0; 2450 vha->flags.management_server_logged_in = 0; 2451 vha->marker_needed = 0; 2452 ha->isp_abort_cnt = 0; 2453 ha->beacon_blink_led = 0; 2454 2455 set_bit(0, ha->req_qid_map); 2456 set_bit(0, ha->rsp_qid_map); 2457 2458 ql_dbg(ql_dbg_init, vha, 0x0040, 2459 "Configuring PCI space...\n"); 2460 rval = ha->isp_ops->pci_config(vha); 2461 if (rval) { 2462 ql_log(ql_log_warn, vha, 0x0044, 2463 "Unable to configure PCI space.\n"); 2464 return (rval); 2465 } 2466 2467 ha->isp_ops->reset_chip(vha); 2468 2469 /* Check for secure flash support */ 2470 if (IS_QLA28XX(ha)) { 2471 if (rd_reg_word(®->mailbox12) & BIT_0) 2472 ha->flags.secure_adapter = 1; 2473 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n", 2474 (ha->flags.secure_adapter) ? "Yes" : "No"); 2475 } 2476 2477 2478 rval = qla2xxx_get_flash_info(vha); 2479 if (rval) { 2480 ql_log(ql_log_fatal, vha, 0x004f, 2481 "Unable to validate FLASH data.\n"); 2482 return rval; 2483 } 2484 2485 if (IS_QLA8044(ha)) { 2486 qla8044_read_reset_template(vha); 2487 2488 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2489 * If DONRESET_BIT0 is set, drivers should not set dev_state 2490 * to NEED_RESET. But if NEED_RESET is set, drivers should 2491 * should honor the reset. */ 2492 if (ql2xdontresethba == 1) 2493 qla8044_set_idc_dontreset(vha); 2494 } 2495 2496 ha->isp_ops->get_flash_version(vha, req->ring); 2497 ql_dbg(ql_dbg_init, vha, 0x0061, 2498 "Configure NVRAM parameters...\n"); 2499 2500 /* Let priority default to FCP, can be overridden by nvram_config */ 2501 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2502 2503 ha->isp_ops->nvram_config(vha); 2504 2505 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2506 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2507 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2508 2509 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2510 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2511 2512 if (ha->flags.disable_serdes) { 2513 /* Mask HBA via NVRAM settings? */ 2514 ql_log(ql_log_info, vha, 0x0077, 2515 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2516 return QLA_FUNCTION_FAILED; 2517 } 2518 2519 ql_dbg(ql_dbg_init, vha, 0x0078, 2520 "Verifying loaded RISC code...\n"); 2521 2522 /* If smartsan enabled then require fdmi and rdp enabled */ 2523 if (ql2xsmartsan) { 2524 ql2xfdmienable = 1; 2525 ql2xrdpenable = 1; 2526 } 2527 2528 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2529 rval = ha->isp_ops->chip_diag(vha); 2530 if (rval) 2531 return (rval); 2532 rval = qla2x00_setup_chip(vha); 2533 if (rval) 2534 return (rval); 2535 } 2536 2537 if (IS_QLA84XX(ha)) { 2538 ha->cs84xx = qla84xx_get_chip(vha); 2539 if (!ha->cs84xx) { 2540 ql_log(ql_log_warn, vha, 0x00d0, 2541 "Unable to configure ISP84XX.\n"); 2542 return QLA_FUNCTION_FAILED; 2543 } 2544 } 2545 2546 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2547 rval = qla2x00_init_rings(vha); 2548 2549 /* No point in continuing if firmware initialization failed. */ 2550 if (rval != QLA_SUCCESS) 2551 return rval; 2552 2553 ha->flags.chip_reset_done = 1; 2554 2555 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2556 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2557 rval = qla84xx_init_chip(vha); 2558 if (rval != QLA_SUCCESS) { 2559 ql_log(ql_log_warn, vha, 0x00d4, 2560 "Unable to initialize ISP84XX.\n"); 2561 qla84xx_put_chip(vha); 2562 } 2563 } 2564 2565 /* Load the NIC Core f/w if we are the first protocol driver. */ 2566 if (IS_QLA8031(ha)) { 2567 rval = qla83xx_nic_core_fw_load(vha); 2568 if (rval) 2569 ql_log(ql_log_warn, vha, 0x0124, 2570 "Error in initializing NIC Core f/w.\n"); 2571 } 2572 2573 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2574 qla24xx_read_fcp_prio_cfg(vha); 2575 2576 if (IS_P3P_TYPE(ha)) 2577 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2578 else 2579 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2580 2581 return (rval); 2582 } 2583 2584 /** 2585 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2586 * @vha: HA context 2587 * 2588 * Returns 0 on success. 2589 */ 2590 int 2591 qla2100_pci_config(scsi_qla_host_t *vha) 2592 { 2593 uint16_t w; 2594 unsigned long flags; 2595 struct qla_hw_data *ha = vha->hw; 2596 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2597 2598 pci_set_master(ha->pdev); 2599 pci_try_set_mwi(ha->pdev); 2600 2601 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2602 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2603 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2604 2605 pci_disable_rom(ha->pdev); 2606 2607 /* Get PCI bus information. */ 2608 spin_lock_irqsave(&ha->hardware_lock, flags); 2609 ha->pci_attr = rd_reg_word(®->ctrl_status); 2610 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2611 2612 return QLA_SUCCESS; 2613 } 2614 2615 /** 2616 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2617 * @vha: HA context 2618 * 2619 * Returns 0 on success. 2620 */ 2621 int 2622 qla2300_pci_config(scsi_qla_host_t *vha) 2623 { 2624 uint16_t w; 2625 unsigned long flags = 0; 2626 uint32_t cnt; 2627 struct qla_hw_data *ha = vha->hw; 2628 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2629 2630 pci_set_master(ha->pdev); 2631 pci_try_set_mwi(ha->pdev); 2632 2633 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2634 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2635 2636 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2637 w &= ~PCI_COMMAND_INTX_DISABLE; 2638 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2639 2640 /* 2641 * If this is a 2300 card and not 2312, reset the 2642 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2643 * the 2310 also reports itself as a 2300 so we need to get the 2644 * fb revision level -- a 6 indicates it really is a 2300 and 2645 * not a 2310. 2646 */ 2647 if (IS_QLA2300(ha)) { 2648 spin_lock_irqsave(&ha->hardware_lock, flags); 2649 2650 /* Pause RISC. */ 2651 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2652 for (cnt = 0; cnt < 30000; cnt++) { 2653 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) 2654 break; 2655 2656 udelay(10); 2657 } 2658 2659 /* Select FPM registers. */ 2660 wrt_reg_word(®->ctrl_status, 0x20); 2661 rd_reg_word(®->ctrl_status); 2662 2663 /* Get the fb rev level */ 2664 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2665 2666 if (ha->fb_rev == FPM_2300) 2667 pci_clear_mwi(ha->pdev); 2668 2669 /* Deselect FPM registers. */ 2670 wrt_reg_word(®->ctrl_status, 0x0); 2671 rd_reg_word(®->ctrl_status); 2672 2673 /* Release RISC module. */ 2674 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2675 for (cnt = 0; cnt < 30000; cnt++) { 2676 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0) 2677 break; 2678 2679 udelay(10); 2680 } 2681 2682 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2683 } 2684 2685 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2686 2687 pci_disable_rom(ha->pdev); 2688 2689 /* Get PCI bus information. */ 2690 spin_lock_irqsave(&ha->hardware_lock, flags); 2691 ha->pci_attr = rd_reg_word(®->ctrl_status); 2692 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2693 2694 return QLA_SUCCESS; 2695 } 2696 2697 /** 2698 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2699 * @vha: HA context 2700 * 2701 * Returns 0 on success. 2702 */ 2703 int 2704 qla24xx_pci_config(scsi_qla_host_t *vha) 2705 { 2706 uint16_t w; 2707 unsigned long flags = 0; 2708 struct qla_hw_data *ha = vha->hw; 2709 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2710 2711 pci_set_master(ha->pdev); 2712 pci_try_set_mwi(ha->pdev); 2713 2714 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2715 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2716 w &= ~PCI_COMMAND_INTX_DISABLE; 2717 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2718 2719 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2720 2721 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2722 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2723 pcix_set_mmrbc(ha->pdev, 2048); 2724 2725 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2726 if (pci_is_pcie(ha->pdev)) 2727 pcie_set_readrq(ha->pdev, 4096); 2728 2729 pci_disable_rom(ha->pdev); 2730 2731 ha->chip_revision = ha->pdev->revision; 2732 2733 /* Get PCI bus information. */ 2734 spin_lock_irqsave(&ha->hardware_lock, flags); 2735 ha->pci_attr = rd_reg_dword(®->ctrl_status); 2736 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2737 2738 return QLA_SUCCESS; 2739 } 2740 2741 /** 2742 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2743 * @vha: HA context 2744 * 2745 * Returns 0 on success. 2746 */ 2747 int 2748 qla25xx_pci_config(scsi_qla_host_t *vha) 2749 { 2750 uint16_t w; 2751 struct qla_hw_data *ha = vha->hw; 2752 2753 pci_set_master(ha->pdev); 2754 pci_try_set_mwi(ha->pdev); 2755 2756 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2757 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2758 w &= ~PCI_COMMAND_INTX_DISABLE; 2759 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2760 2761 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2762 if (pci_is_pcie(ha->pdev)) 2763 pcie_set_readrq(ha->pdev, 4096); 2764 2765 pci_disable_rom(ha->pdev); 2766 2767 ha->chip_revision = ha->pdev->revision; 2768 2769 return QLA_SUCCESS; 2770 } 2771 2772 /** 2773 * qla2x00_isp_firmware() - Choose firmware image. 2774 * @vha: HA context 2775 * 2776 * Returns 0 on success. 2777 */ 2778 static int 2779 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2780 { 2781 int rval; 2782 uint16_t loop_id, topo, sw_cap; 2783 uint8_t domain, area, al_pa; 2784 struct qla_hw_data *ha = vha->hw; 2785 2786 /* Assume loading risc code */ 2787 rval = QLA_FUNCTION_FAILED; 2788 2789 if (ha->flags.disable_risc_code_load) { 2790 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2791 2792 /* Verify checksum of loaded RISC code. */ 2793 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2794 if (rval == QLA_SUCCESS) { 2795 /* And, verify we are not in ROM code. */ 2796 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2797 &area, &domain, &topo, &sw_cap); 2798 } 2799 } 2800 2801 if (rval) 2802 ql_dbg(ql_dbg_init, vha, 0x007a, 2803 "**** Load RISC code ****.\n"); 2804 2805 return (rval); 2806 } 2807 2808 /** 2809 * qla2x00_reset_chip() - Reset ISP chip. 2810 * @vha: HA context 2811 * 2812 * Returns 0 on success. 2813 */ 2814 int 2815 qla2x00_reset_chip(scsi_qla_host_t *vha) 2816 { 2817 unsigned long flags = 0; 2818 struct qla_hw_data *ha = vha->hw; 2819 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2820 uint32_t cnt; 2821 uint16_t cmd; 2822 int rval = QLA_FUNCTION_FAILED; 2823 2824 if (unlikely(pci_channel_offline(ha->pdev))) 2825 return rval; 2826 2827 ha->isp_ops->disable_intrs(ha); 2828 2829 spin_lock_irqsave(&ha->hardware_lock, flags); 2830 2831 /* Turn off master enable */ 2832 cmd = 0; 2833 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2834 cmd &= ~PCI_COMMAND_MASTER; 2835 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2836 2837 if (!IS_QLA2100(ha)) { 2838 /* Pause RISC. */ 2839 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2840 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2841 for (cnt = 0; cnt < 30000; cnt++) { 2842 if ((rd_reg_word(®->hccr) & 2843 HCCR_RISC_PAUSE) != 0) 2844 break; 2845 udelay(100); 2846 } 2847 } else { 2848 rd_reg_word(®->hccr); /* PCI Posting. */ 2849 udelay(10); 2850 } 2851 2852 /* Select FPM registers. */ 2853 wrt_reg_word(®->ctrl_status, 0x20); 2854 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2855 2856 /* FPM Soft Reset. */ 2857 wrt_reg_word(®->fpm_diag_config, 0x100); 2858 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2859 2860 /* Toggle Fpm Reset. */ 2861 if (!IS_QLA2200(ha)) { 2862 wrt_reg_word(®->fpm_diag_config, 0x0); 2863 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2864 } 2865 2866 /* Select frame buffer registers. */ 2867 wrt_reg_word(®->ctrl_status, 0x10); 2868 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2869 2870 /* Reset frame buffer FIFOs. */ 2871 if (IS_QLA2200(ha)) { 2872 WRT_FB_CMD_REG(ha, reg, 0xa000); 2873 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2874 } else { 2875 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2876 2877 /* Read back fb_cmd until zero or 3 seconds max */ 2878 for (cnt = 0; cnt < 3000; cnt++) { 2879 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2880 break; 2881 udelay(100); 2882 } 2883 } 2884 2885 /* Select RISC module registers. */ 2886 wrt_reg_word(®->ctrl_status, 0); 2887 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2888 2889 /* Reset RISC processor. */ 2890 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2891 rd_reg_word(®->hccr); /* PCI Posting. */ 2892 2893 /* Release RISC processor. */ 2894 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2895 rd_reg_word(®->hccr); /* PCI Posting. */ 2896 } 2897 2898 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 2899 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT); 2900 2901 /* Reset ISP chip. */ 2902 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 2903 2904 /* Wait for RISC to recover from reset. */ 2905 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2906 /* 2907 * It is necessary to for a delay here since the card doesn't 2908 * respond to PCI reads during a reset. On some architectures 2909 * this will result in an MCA. 2910 */ 2911 udelay(20); 2912 for (cnt = 30000; cnt; cnt--) { 2913 if ((rd_reg_word(®->ctrl_status) & 2914 CSR_ISP_SOFT_RESET) == 0) 2915 break; 2916 udelay(100); 2917 } 2918 } else 2919 udelay(10); 2920 2921 /* Reset RISC processor. */ 2922 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2923 2924 wrt_reg_word(®->semaphore, 0); 2925 2926 /* Release RISC processor. */ 2927 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2928 rd_reg_word(®->hccr); /* PCI Posting. */ 2929 2930 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2931 for (cnt = 0; cnt < 30000; cnt++) { 2932 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2933 break; 2934 2935 udelay(100); 2936 } 2937 } else 2938 udelay(100); 2939 2940 /* Turn on master enable */ 2941 cmd |= PCI_COMMAND_MASTER; 2942 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2943 2944 /* Disable RISC pause on FPM parity error. */ 2945 if (!IS_QLA2100(ha)) { 2946 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2947 rd_reg_word(®->hccr); /* PCI Posting. */ 2948 } 2949 2950 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2951 2952 return QLA_SUCCESS; 2953 } 2954 2955 /** 2956 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2957 * @vha: HA context 2958 * 2959 * Returns 0 on success. 2960 */ 2961 static int 2962 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2963 { 2964 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2965 2966 if (!IS_QLA81XX(vha->hw)) 2967 return QLA_SUCCESS; 2968 2969 return qla81xx_write_mpi_register(vha, mb); 2970 } 2971 2972 static int 2973 qla_chk_risc_recovery(scsi_qla_host_t *vha) 2974 { 2975 struct qla_hw_data *ha = vha->hw; 2976 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2977 __le16 __iomem *mbptr = ®->mailbox0; 2978 int i; 2979 u16 mb[32]; 2980 int rc = QLA_SUCCESS; 2981 2982 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 2983 return rc; 2984 2985 /* this check is only valid after RISC reset */ 2986 mb[0] = rd_reg_word(mbptr); 2987 mbptr++; 2988 if (mb[0] == 0xf) { 2989 rc = QLA_FUNCTION_FAILED; 2990 2991 for (i = 1; i < 32; i++) { 2992 mb[i] = rd_reg_word(mbptr); 2993 mbptr++; 2994 } 2995 2996 ql_log(ql_log_warn, vha, 0x1015, 2997 "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2998 mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]); 2999 ql_log(ql_log_warn, vha, 0x1015, 3000 "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3001 mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14], 3002 mb[15]); 3003 ql_log(ql_log_warn, vha, 0x1015, 3004 "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3005 mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22], 3006 mb[23]); 3007 ql_log(ql_log_warn, vha, 0x1015, 3008 "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 3009 mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30], 3010 mb[31]); 3011 } 3012 return rc; 3013 } 3014 3015 /** 3016 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 3017 * @vha: HA context 3018 * 3019 * Returns 0 on success. 3020 */ 3021 static inline int 3022 qla24xx_reset_risc(scsi_qla_host_t *vha) 3023 { 3024 unsigned long flags = 0; 3025 struct qla_hw_data *ha = vha->hw; 3026 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 3027 uint32_t cnt; 3028 uint16_t wd; 3029 static int abts_cnt; /* ISP abort retry counts */ 3030 int rval = QLA_SUCCESS; 3031 int print = 1; 3032 3033 spin_lock_irqsave(&ha->hardware_lock, flags); 3034 3035 /* Reset RISC. */ 3036 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3037 for (cnt = 0; cnt < 30000; cnt++) { 3038 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 3039 break; 3040 3041 udelay(10); 3042 } 3043 3044 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)) 3045 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 3046 3047 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 3048 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 3049 rd_reg_dword(®->hccr), 3050 rd_reg_dword(®->ctrl_status), 3051 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)); 3052 3053 wrt_reg_dword(®->ctrl_status, 3054 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3055 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 3056 3057 udelay(100); 3058 3059 /* Wait for firmware to complete NVRAM accesses. */ 3060 rd_reg_word(®->mailbox0); 3061 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 && 3062 rval == QLA_SUCCESS; cnt--) { 3063 barrier(); 3064 if (cnt) 3065 udelay(5); 3066 else 3067 rval = QLA_FUNCTION_TIMEOUT; 3068 } 3069 3070 if (rval == QLA_SUCCESS) 3071 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 3072 3073 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 3074 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 3075 rd_reg_dword(®->hccr), 3076 rd_reg_word(®->mailbox0)); 3077 3078 /* Wait for soft-reset to complete. */ 3079 rd_reg_dword(®->ctrl_status); 3080 for (cnt = 0; cnt < 60; cnt++) { 3081 barrier(); 3082 if ((rd_reg_dword(®->ctrl_status) & 3083 CSRX_ISP_SOFT_RESET) == 0) 3084 break; 3085 3086 udelay(5); 3087 } 3088 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 3089 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 3090 3091 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 3092 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 3093 rd_reg_dword(®->hccr), 3094 rd_reg_dword(®->ctrl_status)); 3095 3096 /* If required, do an MPI FW reset now */ 3097 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 3098 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 3099 if (++abts_cnt < 5) { 3100 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3101 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 3102 } else { 3103 /* 3104 * We exhausted the ISP abort retries. We have to 3105 * set the board offline. 3106 */ 3107 abts_cnt = 0; 3108 vha->flags.online = 0; 3109 } 3110 } 3111 } 3112 3113 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 3114 rd_reg_dword(®->hccr); 3115 3116 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 3117 rd_reg_dword(®->hccr); 3118 3119 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET); 3120 mdelay(10); 3121 rd_reg_dword(®->hccr); 3122 3123 wd = rd_reg_word(®->mailbox0); 3124 for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) { 3125 barrier(); 3126 if (cnt) { 3127 mdelay(1); 3128 if (print && qla_chk_risc_recovery(vha)) 3129 print = 0; 3130 3131 wd = rd_reg_word(®->mailbox0); 3132 } else { 3133 rval = QLA_FUNCTION_TIMEOUT; 3134 3135 ql_log(ql_log_warn, vha, 0x015e, 3136 "RISC reset timeout\n"); 3137 } 3138 } 3139 3140 if (rval == QLA_SUCCESS) 3141 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 3142 3143 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 3144 "Host Risc 0x%x, mailbox0 0x%x\n", 3145 rd_reg_dword(®->hccr), 3146 rd_reg_word(®->mailbox0)); 3147 3148 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3149 3150 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 3151 "Driver in %s mode\n", 3152 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 3153 3154 if (IS_NOPOLLING_TYPE(ha)) 3155 ha->isp_ops->enable_intrs(ha); 3156 3157 return rval; 3158 } 3159 3160 static void 3161 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 3162 { 3163 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3164 3165 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3166 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET); 3167 } 3168 3169 static void 3170 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 3171 { 3172 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3173 3174 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3175 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); 3176 } 3177 3178 static void 3179 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 3180 { 3181 uint32_t wd32 = 0; 3182 uint delta_msec = 100; 3183 uint elapsed_msec = 0; 3184 uint timeout_msec; 3185 ulong n; 3186 3187 if (vha->hw->pdev->subsystem_device != 0x0175 && 3188 vha->hw->pdev->subsystem_device != 0x0240) 3189 return; 3190 3191 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 3192 udelay(100); 3193 3194 attempt: 3195 timeout_msec = TIMEOUT_SEMAPHORE; 3196 n = timeout_msec / delta_msec; 3197 while (n--) { 3198 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 3199 qla25xx_read_risc_sema_reg(vha, &wd32); 3200 if (wd32 & RISC_SEMAPHORE) 3201 break; 3202 msleep(delta_msec); 3203 elapsed_msec += delta_msec; 3204 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3205 goto force; 3206 } 3207 3208 if (!(wd32 & RISC_SEMAPHORE)) 3209 goto force; 3210 3211 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3212 goto acquired; 3213 3214 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 3215 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 3216 n = timeout_msec / delta_msec; 3217 while (n--) { 3218 qla25xx_read_risc_sema_reg(vha, &wd32); 3219 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3220 break; 3221 msleep(delta_msec); 3222 elapsed_msec += delta_msec; 3223 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3224 goto force; 3225 } 3226 3227 if (wd32 & RISC_SEMAPHORE_FORCE) 3228 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 3229 3230 goto attempt; 3231 3232 force: 3233 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 3234 3235 acquired: 3236 return; 3237 } 3238 3239 /** 3240 * qla24xx_reset_chip() - Reset ISP24xx chip. 3241 * @vha: HA context 3242 * 3243 * Returns 0 on success. 3244 */ 3245 int 3246 qla24xx_reset_chip(scsi_qla_host_t *vha) 3247 { 3248 struct qla_hw_data *ha = vha->hw; 3249 int rval = QLA_FUNCTION_FAILED; 3250 3251 if (pci_channel_offline(ha->pdev) && 3252 ha->flags.pci_channel_io_perm_failure) { 3253 return rval; 3254 } 3255 3256 ha->isp_ops->disable_intrs(ha); 3257 3258 qla25xx_manipulate_risc_semaphore(vha); 3259 3260 /* Perform RISC reset. */ 3261 rval = qla24xx_reset_risc(vha); 3262 3263 return rval; 3264 } 3265 3266 /** 3267 * qla2x00_chip_diag() - Test chip for proper operation. 3268 * @vha: HA context 3269 * 3270 * Returns 0 on success. 3271 */ 3272 int 3273 qla2x00_chip_diag(scsi_qla_host_t *vha) 3274 { 3275 int rval; 3276 struct qla_hw_data *ha = vha->hw; 3277 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3278 unsigned long flags = 0; 3279 uint16_t data; 3280 uint32_t cnt; 3281 uint16_t mb[5]; 3282 struct req_que *req = ha->req_q_map[0]; 3283 3284 /* Assume a failed state */ 3285 rval = QLA_FUNCTION_FAILED; 3286 3287 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 3288 ®->flash_address); 3289 3290 spin_lock_irqsave(&ha->hardware_lock, flags); 3291 3292 /* Reset ISP chip. */ 3293 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 3294 3295 /* 3296 * We need to have a delay here since the card will not respond while 3297 * in reset causing an MCA on some architectures. 3298 */ 3299 udelay(20); 3300 data = qla2x00_debounce_register(®->ctrl_status); 3301 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 3302 udelay(5); 3303 data = rd_reg_word(®->ctrl_status); 3304 barrier(); 3305 } 3306 3307 if (!cnt) 3308 goto chip_diag_failed; 3309 3310 ql_dbg(ql_dbg_init, vha, 0x007c, 3311 "Reset register cleared by chip reset.\n"); 3312 3313 /* Reset RISC processor. */ 3314 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3315 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3316 3317 /* Workaround for QLA2312 PCI parity error */ 3318 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3319 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 3320 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 3321 udelay(5); 3322 data = RD_MAILBOX_REG(ha, reg, 0); 3323 barrier(); 3324 } 3325 } else 3326 udelay(10); 3327 3328 if (!cnt) 3329 goto chip_diag_failed; 3330 3331 /* Check product ID of chip */ 3332 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3333 3334 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3335 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3336 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3337 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3338 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3339 mb[3] != PROD_ID_3) { 3340 ql_log(ql_log_warn, vha, 0x0062, 3341 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3342 mb[1], mb[2], mb[3]); 3343 3344 goto chip_diag_failed; 3345 } 3346 ha->product_id[0] = mb[1]; 3347 ha->product_id[1] = mb[2]; 3348 ha->product_id[2] = mb[3]; 3349 ha->product_id[3] = mb[4]; 3350 3351 /* Adjust fw RISC transfer size */ 3352 if (req->length > 1024) 3353 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3354 else 3355 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3356 req->length; 3357 3358 if (IS_QLA2200(ha) && 3359 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3360 /* Limit firmware transfer size with a 2200A */ 3361 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3362 3363 ha->device_type |= DT_ISP2200A; 3364 ha->fw_transfer_size = 128; 3365 } 3366 3367 /* Wrap Incoming Mailboxes Test. */ 3368 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3369 3370 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3371 rval = qla2x00_mbx_reg_test(vha); 3372 if (rval) 3373 ql_log(ql_log_warn, vha, 0x0080, 3374 "Failed mailbox send register test.\n"); 3375 else 3376 /* Flag a successful rval */ 3377 rval = QLA_SUCCESS; 3378 spin_lock_irqsave(&ha->hardware_lock, flags); 3379 3380 chip_diag_failed: 3381 if (rval) 3382 ql_log(ql_log_info, vha, 0x0081, 3383 "Chip diagnostics **** FAILED ****.\n"); 3384 3385 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3386 3387 return (rval); 3388 } 3389 3390 /** 3391 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3392 * @vha: HA context 3393 * 3394 * Returns 0 on success. 3395 */ 3396 int 3397 qla24xx_chip_diag(scsi_qla_host_t *vha) 3398 { 3399 int rval; 3400 struct qla_hw_data *ha = vha->hw; 3401 struct req_que *req = ha->req_q_map[0]; 3402 3403 if (IS_P3P_TYPE(ha)) 3404 return QLA_SUCCESS; 3405 3406 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3407 3408 rval = qla2x00_mbx_reg_test(vha); 3409 if (rval) { 3410 ql_log(ql_log_warn, vha, 0x0082, 3411 "Failed mailbox send register test.\n"); 3412 } else { 3413 /* Flag a successful rval */ 3414 rval = QLA_SUCCESS; 3415 } 3416 3417 return rval; 3418 } 3419 3420 static void 3421 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3422 { 3423 int rval; 3424 dma_addr_t tc_dma; 3425 void *tc; 3426 struct qla_hw_data *ha = vha->hw; 3427 3428 if (!IS_FWI2_CAPABLE(ha)) 3429 return; 3430 3431 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3432 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3433 return; 3434 3435 if (ha->fce) { 3436 ql_dbg(ql_dbg_init, vha, 0x00bd, 3437 "%s: FCE Mem is already allocated.\n", 3438 __func__); 3439 return; 3440 } 3441 3442 /* Allocate memory for Fibre Channel Event Buffer. */ 3443 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3444 GFP_KERNEL); 3445 if (!tc) { 3446 ql_log(ql_log_warn, vha, 0x00be, 3447 "Unable to allocate (%d KB) for FCE.\n", 3448 FCE_SIZE / 1024); 3449 return; 3450 } 3451 3452 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3453 ha->fce_mb, &ha->fce_bufs); 3454 if (rval) { 3455 ql_log(ql_log_warn, vha, 0x00bf, 3456 "Unable to initialize FCE (%d).\n", rval); 3457 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3458 return; 3459 } 3460 3461 ql_dbg(ql_dbg_init, vha, 0x00c0, 3462 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3463 3464 ha->flags.fce_enabled = 1; 3465 ha->fce_dma = tc_dma; 3466 ha->fce = tc; 3467 } 3468 3469 static void 3470 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3471 { 3472 int rval; 3473 dma_addr_t tc_dma; 3474 void *tc; 3475 struct qla_hw_data *ha = vha->hw; 3476 3477 if (!IS_FWI2_CAPABLE(ha)) 3478 return; 3479 3480 if (ha->eft) { 3481 ql_dbg(ql_dbg_init, vha, 0x00bd, 3482 "%s: EFT Mem is already allocated.\n", 3483 __func__); 3484 return; 3485 } 3486 3487 /* Allocate memory for Extended Trace Buffer. */ 3488 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3489 GFP_KERNEL); 3490 if (!tc) { 3491 ql_log(ql_log_warn, vha, 0x00c1, 3492 "Unable to allocate (%d KB) for EFT.\n", 3493 EFT_SIZE / 1024); 3494 return; 3495 } 3496 3497 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3498 if (rval) { 3499 ql_log(ql_log_warn, vha, 0x00c2, 3500 "Unable to initialize EFT (%d).\n", rval); 3501 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3502 return; 3503 } 3504 3505 ql_dbg(ql_dbg_init, vha, 0x00c3, 3506 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3507 3508 ha->eft_dma = tc_dma; 3509 ha->eft = tc; 3510 } 3511 3512 static void 3513 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3514 { 3515 qla2x00_init_fce_trace(vha); 3516 qla2x00_init_eft_trace(vha); 3517 } 3518 3519 void 3520 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3521 { 3522 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3523 eft_size, fce_size, mq_size; 3524 struct qla_hw_data *ha = vha->hw; 3525 struct req_que *req = ha->req_q_map[0]; 3526 struct rsp_que *rsp = ha->rsp_q_map[0]; 3527 struct qla2xxx_fw_dump *fw_dump; 3528 3529 if (ha->fw_dump) { 3530 ql_dbg(ql_dbg_init, vha, 0x00bd, 3531 "Firmware dump already allocated.\n"); 3532 return; 3533 } 3534 3535 ha->fw_dumped = 0; 3536 ha->fw_dump_cap_flags = 0; 3537 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3538 req_q_size = rsp_q_size = 0; 3539 3540 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3541 fixed_size = sizeof(struct qla2100_fw_dump); 3542 } else if (IS_QLA23XX(ha)) { 3543 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3544 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3545 sizeof(uint16_t); 3546 } else if (IS_FWI2_CAPABLE(ha)) { 3547 if (IS_QLA83XX(ha)) 3548 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3549 else if (IS_QLA81XX(ha)) 3550 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3551 else if (IS_QLA25XX(ha)) 3552 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3553 else 3554 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3555 3556 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3557 sizeof(uint32_t); 3558 if (ha->mqenable) { 3559 if (!IS_QLA83XX(ha)) 3560 mq_size = sizeof(struct qla2xxx_mq_chain); 3561 /* 3562 * Allocate maximum buffer size for all queues - Q0. 3563 * Resizing must be done at end-of-dump processing. 3564 */ 3565 mq_size += (ha->max_req_queues - 1) * 3566 (req->length * sizeof(request_t)); 3567 mq_size += (ha->max_rsp_queues - 1) * 3568 (rsp->length * sizeof(response_t)); 3569 } 3570 if (ha->tgt.atio_ring) 3571 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3572 3573 qla2x00_init_fce_trace(vha); 3574 if (ha->fce) 3575 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3576 qla2x00_init_eft_trace(vha); 3577 if (ha->eft) 3578 eft_size = EFT_SIZE; 3579 } 3580 3581 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3582 struct fwdt *fwdt = ha->fwdt; 3583 uint j; 3584 3585 for (j = 0; j < 2; j++, fwdt++) { 3586 if (!fwdt->template) { 3587 ql_dbg(ql_dbg_init, vha, 0x00ba, 3588 "-> fwdt%u no template\n", j); 3589 continue; 3590 } 3591 ql_dbg(ql_dbg_init, vha, 0x00fa, 3592 "-> fwdt%u calculating fwdump size...\n", j); 3593 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3594 vha, fwdt->template); 3595 ql_dbg(ql_dbg_init, vha, 0x00fa, 3596 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3597 j, fwdt->dump_size); 3598 dump_size += fwdt->dump_size; 3599 } 3600 /* Add space for spare MPI fw dump. */ 3601 dump_size += ha->fwdt[1].dump_size; 3602 } else { 3603 req_q_size = req->length * sizeof(request_t); 3604 rsp_q_size = rsp->length * sizeof(response_t); 3605 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3606 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3607 + eft_size; 3608 ha->chain_offset = dump_size; 3609 dump_size += mq_size + fce_size; 3610 if (ha->exchoffld_buf) 3611 dump_size += sizeof(struct qla2xxx_offld_chain) + 3612 ha->exchoffld_size; 3613 if (ha->exlogin_buf) 3614 dump_size += sizeof(struct qla2xxx_offld_chain) + 3615 ha->exlogin_size; 3616 } 3617 3618 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3619 3620 ql_dbg(ql_dbg_init, vha, 0x00c5, 3621 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3622 __func__, dump_size, ha->fw_dump_len, 3623 ha->fw_dump_alloc_len); 3624 3625 fw_dump = vmalloc(dump_size); 3626 if (!fw_dump) { 3627 ql_log(ql_log_warn, vha, 0x00c4, 3628 "Unable to allocate (%d KB) for firmware dump.\n", 3629 dump_size / 1024); 3630 } else { 3631 mutex_lock(&ha->optrom_mutex); 3632 if (ha->fw_dumped) { 3633 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3634 vfree(ha->fw_dump); 3635 ha->fw_dump = fw_dump; 3636 ha->fw_dump_alloc_len = dump_size; 3637 ql_dbg(ql_dbg_init, vha, 0x00c5, 3638 "Re-Allocated (%d KB) and save firmware dump.\n", 3639 dump_size / 1024); 3640 } else { 3641 vfree(ha->fw_dump); 3642 ha->fw_dump = fw_dump; 3643 3644 ha->fw_dump_len = ha->fw_dump_alloc_len = 3645 dump_size; 3646 ql_dbg(ql_dbg_init, vha, 0x00c5, 3647 "Allocated (%d KB) for firmware dump.\n", 3648 dump_size / 1024); 3649 3650 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3651 ha->mpi_fw_dump = (char *)fw_dump + 3652 ha->fwdt[1].dump_size; 3653 mutex_unlock(&ha->optrom_mutex); 3654 return; 3655 } 3656 3657 ha->fw_dump->signature[0] = 'Q'; 3658 ha->fw_dump->signature[1] = 'L'; 3659 ha->fw_dump->signature[2] = 'G'; 3660 ha->fw_dump->signature[3] = 'C'; 3661 ha->fw_dump->version = htonl(1); 3662 3663 ha->fw_dump->fixed_size = htonl(fixed_size); 3664 ha->fw_dump->mem_size = htonl(mem_size); 3665 ha->fw_dump->req_q_size = htonl(req_q_size); 3666 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3667 3668 ha->fw_dump->eft_size = htonl(eft_size); 3669 ha->fw_dump->eft_addr_l = 3670 htonl(LSD(ha->eft_dma)); 3671 ha->fw_dump->eft_addr_h = 3672 htonl(MSD(ha->eft_dma)); 3673 3674 ha->fw_dump->header_size = 3675 htonl(offsetof 3676 (struct qla2xxx_fw_dump, isp)); 3677 } 3678 mutex_unlock(&ha->optrom_mutex); 3679 } 3680 } 3681 } 3682 3683 static int 3684 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3685 { 3686 #define MPS_MASK 0xe0 3687 int rval; 3688 uint16_t dc; 3689 uint32_t dw; 3690 3691 if (!IS_QLA81XX(vha->hw)) 3692 return QLA_SUCCESS; 3693 3694 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3695 if (rval != QLA_SUCCESS) { 3696 ql_log(ql_log_warn, vha, 0x0105, 3697 "Unable to acquire semaphore.\n"); 3698 goto done; 3699 } 3700 3701 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3702 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3703 if (rval != QLA_SUCCESS) { 3704 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3705 goto done_release; 3706 } 3707 3708 dc &= MPS_MASK; 3709 if (dc == (dw & MPS_MASK)) 3710 goto done_release; 3711 3712 dw &= ~MPS_MASK; 3713 dw |= dc; 3714 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3715 if (rval != QLA_SUCCESS) { 3716 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3717 } 3718 3719 done_release: 3720 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3721 if (rval != QLA_SUCCESS) { 3722 ql_log(ql_log_warn, vha, 0x006d, 3723 "Unable to release semaphore.\n"); 3724 } 3725 3726 done: 3727 return rval; 3728 } 3729 3730 int 3731 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3732 { 3733 /* Don't try to reallocate the array */ 3734 if (req->outstanding_cmds) 3735 return QLA_SUCCESS; 3736 3737 if (!IS_FWI2_CAPABLE(ha)) 3738 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3739 else { 3740 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3741 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3742 else 3743 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3744 } 3745 3746 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3747 sizeof(srb_t *), 3748 GFP_KERNEL); 3749 3750 if (!req->outstanding_cmds) { 3751 /* 3752 * Try to allocate a minimal size just so we can get through 3753 * initialization. 3754 */ 3755 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3756 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3757 sizeof(srb_t *), 3758 GFP_KERNEL); 3759 3760 if (!req->outstanding_cmds) { 3761 ql_log(ql_log_fatal, NULL, 0x0126, 3762 "Failed to allocate memory for " 3763 "outstanding_cmds for req_que %p.\n", req); 3764 req->num_outstanding_cmds = 0; 3765 return QLA_FUNCTION_FAILED; 3766 } 3767 } 3768 3769 return QLA_SUCCESS; 3770 } 3771 3772 #define PRINT_FIELD(_field, _flag, _str) { \ 3773 if (a0->_field & _flag) {\ 3774 if (p) {\ 3775 strcat(ptr, "|");\ 3776 ptr++;\ 3777 leftover--;\ 3778 } \ 3779 len = snprintf(ptr, leftover, "%s", _str); \ 3780 p = 1;\ 3781 leftover -= len;\ 3782 ptr += len; \ 3783 } \ 3784 } 3785 3786 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3787 { 3788 #define STR_LEN 64 3789 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3790 u8 str[STR_LEN], *ptr, p; 3791 int leftover, len; 3792 3793 memset(str, 0, STR_LEN); 3794 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3795 ql_dbg(ql_dbg_init, vha, 0x015a, 3796 "SFP MFG Name: %s\n", str); 3797 3798 memset(str, 0, STR_LEN); 3799 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3800 ql_dbg(ql_dbg_init, vha, 0x015c, 3801 "SFP Part Name: %s\n", str); 3802 3803 /* media */ 3804 memset(str, 0, STR_LEN); 3805 ptr = str; 3806 leftover = STR_LEN; 3807 p = len = 0; 3808 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3809 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3810 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3811 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3812 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3813 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3814 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3815 ql_dbg(ql_dbg_init, vha, 0x0160, 3816 "SFP Media: %s\n", str); 3817 3818 /* link length */ 3819 memset(str, 0, STR_LEN); 3820 ptr = str; 3821 leftover = STR_LEN; 3822 p = len = 0; 3823 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3824 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3825 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3826 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3827 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3828 ql_dbg(ql_dbg_init, vha, 0x0196, 3829 "SFP Link Length: %s\n", str); 3830 3831 memset(str, 0, STR_LEN); 3832 ptr = str; 3833 leftover = STR_LEN; 3834 p = len = 0; 3835 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3836 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3837 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3838 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3839 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3840 ql_dbg(ql_dbg_init, vha, 0x016e, 3841 "SFP FC Link Tech: %s\n", str); 3842 3843 if (a0->length_km) 3844 ql_dbg(ql_dbg_init, vha, 0x016f, 3845 "SFP Distant: %d km\n", a0->length_km); 3846 if (a0->length_100m) 3847 ql_dbg(ql_dbg_init, vha, 0x0170, 3848 "SFP Distant: %d m\n", a0->length_100m*100); 3849 if (a0->length_50um_10m) 3850 ql_dbg(ql_dbg_init, vha, 0x0189, 3851 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3852 if (a0->length_62um_10m) 3853 ql_dbg(ql_dbg_init, vha, 0x018a, 3854 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3855 if (a0->length_om4_10m) 3856 ql_dbg(ql_dbg_init, vha, 0x0194, 3857 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3858 if (a0->length_om3_10m) 3859 ql_dbg(ql_dbg_init, vha, 0x0195, 3860 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3861 } 3862 3863 3864 /** 3865 * qla24xx_detect_sfp() 3866 * 3867 * @vha: adapter state pointer. 3868 * 3869 * @return 3870 * 0 -- Configure firmware to use short-range settings -- normal 3871 * buffer-to-buffer credits. 3872 * 3873 * 1 -- Configure firmware to use long-range settings -- extra 3874 * buffer-to-buffer credits should be allocated with 3875 * ha->lr_distance containing distance settings from NVRAM or SFP 3876 * (if supported). 3877 */ 3878 int 3879 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3880 { 3881 int rc, used_nvram; 3882 struct sff_8247_a0 *a; 3883 struct qla_hw_data *ha = vha->hw; 3884 struct nvram_81xx *nv = ha->nvram; 3885 #define LR_DISTANCE_UNKNOWN 2 3886 static const char * const types[] = { "Short", "Long" }; 3887 static const char * const lengths[] = { "(10km)", "(5km)", "" }; 3888 u8 ll = 0; 3889 3890 /* Seed with NVRAM settings. */ 3891 used_nvram = 0; 3892 ha->flags.lr_detected = 0; 3893 if (IS_BPM_RANGE_CAPABLE(ha) && 3894 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) { 3895 used_nvram = 1; 3896 ha->flags.lr_detected = 1; 3897 ha->lr_distance = 3898 (nv->enhanced_features >> LR_DIST_NV_POS) 3899 & LR_DIST_NV_MASK; 3900 } 3901 3902 if (!IS_BPM_ENABLED(vha)) 3903 goto out; 3904 /* Determine SR/LR capabilities of SFP/Transceiver. */ 3905 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3906 if (rc) 3907 goto out; 3908 3909 used_nvram = 0; 3910 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3911 qla2xxx_print_sfp_info(vha); 3912 3913 ha->flags.lr_detected = 0; 3914 ll = a->fc_ll_cc7; 3915 if (ll & FC_LL_VL || ll & FC_LL_L) { 3916 /* Long range, track length. */ 3917 ha->flags.lr_detected = 1; 3918 3919 if (a->length_km > 5 || a->length_100m > 50) 3920 ha->lr_distance = LR_DISTANCE_10K; 3921 else 3922 ha->lr_distance = LR_DISTANCE_5K; 3923 } 3924 3925 out: 3926 ql_dbg(ql_dbg_async, vha, 0x507b, 3927 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n", 3928 types[ha->flags.lr_detected], 3929 ha->flags.lr_detected ? lengths[ha->lr_distance] : 3930 lengths[LR_DISTANCE_UNKNOWN], 3931 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance); 3932 return ha->flags.lr_detected; 3933 } 3934 3935 void qla_init_iocb_limit(scsi_qla_host_t *vha) 3936 { 3937 u16 i, num_qps; 3938 u32 limit; 3939 struct qla_hw_data *ha = vha->hw; 3940 3941 num_qps = ha->num_qpairs + 1; 3942 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100; 3943 3944 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count; 3945 ha->base_qpair->fwres.iocbs_limit = limit; 3946 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps; 3947 ha->base_qpair->fwres.iocbs_used = 0; 3948 3949 ha->base_qpair->fwres.exch_total = ha->orig_fw_xcb_count; 3950 ha->base_qpair->fwres.exch_limit = (ha->orig_fw_xcb_count * 3951 QLA_IOCB_PCT_LIMIT) / 100; 3952 ha->base_qpair->fwres.exch_used = 0; 3953 3954 for (i = 0; i < ha->max_qpairs; i++) { 3955 if (ha->queue_pair_map[i]) { 3956 ha->queue_pair_map[i]->fwres.iocbs_total = 3957 ha->orig_fw_iocb_count; 3958 ha->queue_pair_map[i]->fwres.iocbs_limit = limit; 3959 ha->queue_pair_map[i]->fwres.iocbs_qp_limit = 3960 limit / num_qps; 3961 ha->queue_pair_map[i]->fwres.iocbs_used = 0; 3962 ha->queue_pair_map[i]->fwres.exch_total = ha->orig_fw_xcb_count; 3963 ha->queue_pair_map[i]->fwres.exch_limit = 3964 (ha->orig_fw_xcb_count * QLA_IOCB_PCT_LIMIT) / 100; 3965 ha->queue_pair_map[i]->fwres.exch_used = 0; 3966 } 3967 } 3968 } 3969 3970 /** 3971 * qla2x00_setup_chip() - Load and start RISC firmware. 3972 * @vha: HA context 3973 * 3974 * Returns 0 on success. 3975 */ 3976 static int 3977 qla2x00_setup_chip(scsi_qla_host_t *vha) 3978 { 3979 int rval; 3980 uint32_t srisc_address = 0; 3981 struct qla_hw_data *ha = vha->hw; 3982 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3983 unsigned long flags; 3984 uint16_t fw_major_version; 3985 int done_once = 0; 3986 3987 if (IS_P3P_TYPE(ha)) { 3988 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3989 if (rval == QLA_SUCCESS) { 3990 qla2x00_stop_firmware(vha); 3991 goto enable_82xx_npiv; 3992 } else 3993 goto failed; 3994 } 3995 3996 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3997 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3998 spin_lock_irqsave(&ha->hardware_lock, flags); 3999 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 4000 rd_reg_word(®->hccr); 4001 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4002 } 4003 4004 qla81xx_mpi_sync(vha); 4005 4006 execute_fw_with_lr: 4007 /* Load firmware sequences */ 4008 rval = ha->isp_ops->load_risc(vha, &srisc_address); 4009 if (rval == QLA_SUCCESS) { 4010 ql_dbg(ql_dbg_init, vha, 0x00c9, 4011 "Verifying Checksum of loaded RISC code.\n"); 4012 4013 rval = qla2x00_verify_checksum(vha, srisc_address); 4014 if (rval == QLA_SUCCESS) { 4015 /* Start firmware execution. */ 4016 ql_dbg(ql_dbg_init, vha, 0x00ca, 4017 "Starting firmware.\n"); 4018 4019 if (ql2xexlogins) 4020 ha->flags.exlogins_enabled = 1; 4021 4022 if (qla_is_exch_offld_enabled(vha)) 4023 ha->flags.exchoffld_enabled = 1; 4024 4025 rval = qla2x00_execute_fw(vha, srisc_address); 4026 /* Retrieve firmware information. */ 4027 if (rval == QLA_SUCCESS) { 4028 /* Enable BPM support? */ 4029 if (!done_once++ && qla24xx_detect_sfp(vha)) { 4030 ql_dbg(ql_dbg_init, vha, 0x00ca, 4031 "Re-starting firmware -- BPM.\n"); 4032 /* Best-effort - re-init. */ 4033 ha->isp_ops->reset_chip(vha); 4034 ha->isp_ops->chip_diag(vha); 4035 goto execute_fw_with_lr; 4036 } 4037 4038 if (IS_ZIO_THRESHOLD_CAPABLE(ha)) 4039 qla27xx_set_zio_threshold(vha, 4040 ha->last_zio_threshold); 4041 4042 rval = qla2x00_set_exlogins_buffer(vha); 4043 if (rval != QLA_SUCCESS) 4044 goto failed; 4045 4046 rval = qla2x00_set_exchoffld_buffer(vha); 4047 if (rval != QLA_SUCCESS) 4048 goto failed; 4049 4050 enable_82xx_npiv: 4051 fw_major_version = ha->fw_major_version; 4052 if (IS_P3P_TYPE(ha)) 4053 qla82xx_check_md_needed(vha); 4054 else 4055 rval = qla2x00_get_fw_version(vha); 4056 if (rval != QLA_SUCCESS) 4057 goto failed; 4058 ha->flags.npiv_supported = 0; 4059 if (IS_QLA2XXX_MIDTYPE(ha) && 4060 (ha->fw_attributes & BIT_2)) { 4061 ha->flags.npiv_supported = 1; 4062 if ((!ha->max_npiv_vports) || 4063 ((ha->max_npiv_vports + 1) % 4064 MIN_MULTI_ID_FABRIC)) 4065 ha->max_npiv_vports = 4066 MIN_MULTI_ID_FABRIC - 1; 4067 } 4068 qla2x00_get_resource_cnts(vha); 4069 qla_init_iocb_limit(vha); 4070 4071 /* 4072 * Allocate the array of outstanding commands 4073 * now that we know the firmware resources. 4074 */ 4075 rval = qla2x00_alloc_outstanding_cmds(ha, 4076 vha->req); 4077 if (rval != QLA_SUCCESS) 4078 goto failed; 4079 4080 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 4081 qla2x00_alloc_offload_mem(vha); 4082 4083 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 4084 qla2x00_alloc_fw_dump(vha); 4085 4086 } else { 4087 goto failed; 4088 } 4089 } else { 4090 ql_log(ql_log_fatal, vha, 0x00cd, 4091 "ISP Firmware failed checksum.\n"); 4092 goto failed; 4093 } 4094 4095 /* Enable PUREX PASSTHRU */ 4096 if (ql2xrdpenable || ha->flags.scm_supported_f || 4097 ha->flags.edif_enabled) 4098 qla25xx_set_els_cmds_supported(vha); 4099 } else 4100 goto failed; 4101 4102 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 4103 /* Enable proper parity. */ 4104 spin_lock_irqsave(&ha->hardware_lock, flags); 4105 if (IS_QLA2300(ha)) 4106 /* SRAM parity */ 4107 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1); 4108 else 4109 /* SRAM, Instruction RAM and GP RAM parity */ 4110 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7); 4111 rd_reg_word(®->hccr); 4112 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4113 } 4114 4115 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 4116 ha->flags.fac_supported = 1; 4117 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 4118 uint32_t size; 4119 4120 rval = qla81xx_fac_get_sector_size(vha, &size); 4121 if (rval == QLA_SUCCESS) { 4122 ha->flags.fac_supported = 1; 4123 ha->fdt_block_size = size << 2; 4124 } else { 4125 ql_log(ql_log_warn, vha, 0x00ce, 4126 "Unsupported FAC firmware (%d.%02d.%02d).\n", 4127 ha->fw_major_version, ha->fw_minor_version, 4128 ha->fw_subminor_version); 4129 4130 if (IS_QLA83XX(ha)) { 4131 ha->flags.fac_supported = 0; 4132 rval = QLA_SUCCESS; 4133 } 4134 } 4135 } 4136 failed: 4137 if (rval) { 4138 ql_log(ql_log_fatal, vha, 0x00cf, 4139 "Setup chip ****FAILED****.\n"); 4140 } 4141 4142 return (rval); 4143 } 4144 4145 /** 4146 * qla2x00_init_response_q_entries() - Initializes response queue entries. 4147 * @rsp: response queue 4148 * 4149 * Beginning of request ring has initialization control block already built 4150 * by nvram config routine. 4151 * 4152 * Returns 0 on success. 4153 */ 4154 void 4155 qla2x00_init_response_q_entries(struct rsp_que *rsp) 4156 { 4157 uint16_t cnt; 4158 response_t *pkt; 4159 4160 rsp->ring_ptr = rsp->ring; 4161 rsp->ring_index = 0; 4162 rsp->status_srb = NULL; 4163 pkt = rsp->ring_ptr; 4164 for (cnt = 0; cnt < rsp->length; cnt++) { 4165 pkt->signature = RESPONSE_PROCESSED; 4166 pkt++; 4167 } 4168 } 4169 4170 /** 4171 * qla2x00_update_fw_options() - Read and process firmware options. 4172 * @vha: HA context 4173 * 4174 * Returns 0 on success. 4175 */ 4176 void 4177 qla2x00_update_fw_options(scsi_qla_host_t *vha) 4178 { 4179 uint16_t swing, emphasis, tx_sens, rx_sens; 4180 struct qla_hw_data *ha = vha->hw; 4181 4182 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 4183 qla2x00_get_fw_options(vha, ha->fw_options); 4184 4185 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4186 return; 4187 4188 /* Serial Link options. */ 4189 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 4190 "Serial link options.\n"); 4191 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 4192 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 4193 4194 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 4195 if (ha->fw_seriallink_options[3] & BIT_2) { 4196 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 4197 4198 /* 1G settings */ 4199 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 4200 emphasis = (ha->fw_seriallink_options[2] & 4201 (BIT_4 | BIT_3)) >> 3; 4202 tx_sens = ha->fw_seriallink_options[0] & 4203 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4204 rx_sens = (ha->fw_seriallink_options[0] & 4205 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4206 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 4207 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4208 if (rx_sens == 0x0) 4209 rx_sens = 0x3; 4210 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 4211 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4212 ha->fw_options[10] |= BIT_5 | 4213 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4214 (tx_sens & (BIT_1 | BIT_0)); 4215 4216 /* 2G settings */ 4217 swing = (ha->fw_seriallink_options[2] & 4218 (BIT_7 | BIT_6 | BIT_5)) >> 5; 4219 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 4220 tx_sens = ha->fw_seriallink_options[1] & 4221 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4222 rx_sens = (ha->fw_seriallink_options[1] & 4223 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4224 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 4225 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4226 if (rx_sens == 0x0) 4227 rx_sens = 0x3; 4228 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 4229 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4230 ha->fw_options[11] |= BIT_5 | 4231 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4232 (tx_sens & (BIT_1 | BIT_0)); 4233 } 4234 4235 /* FCP2 options. */ 4236 /* Return command IOCBs without waiting for an ABTS to complete. */ 4237 ha->fw_options[3] |= BIT_13; 4238 4239 /* LED scheme. */ 4240 if (ha->flags.enable_led_scheme) 4241 ha->fw_options[2] |= BIT_12; 4242 4243 /* Detect ISP6312. */ 4244 if (IS_QLA6312(ha)) 4245 ha->fw_options[2] |= BIT_13; 4246 4247 /* Set Retry FLOGI in case of P2P connection */ 4248 if (ha->operating_mode == P2P) { 4249 ha->fw_options[2] |= BIT_3; 4250 ql_dbg(ql_dbg_disc, vha, 0x2100, 4251 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4252 __func__, ha->fw_options[2]); 4253 } 4254 4255 /* Update firmware options. */ 4256 qla2x00_set_fw_options(vha, ha->fw_options); 4257 } 4258 4259 void 4260 qla24xx_update_fw_options(scsi_qla_host_t *vha) 4261 { 4262 int rval; 4263 struct qla_hw_data *ha = vha->hw; 4264 4265 if (IS_P3P_TYPE(ha)) 4266 return; 4267 4268 /* Hold status IOCBs until ABTS response received. */ 4269 if (ql2xfwholdabts) 4270 ha->fw_options[3] |= BIT_12; 4271 4272 /* Set Retry FLOGI in case of P2P connection */ 4273 if (ha->operating_mode == P2P) { 4274 ha->fw_options[2] |= BIT_3; 4275 ql_dbg(ql_dbg_disc, vha, 0x2101, 4276 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4277 __func__, ha->fw_options[2]); 4278 } 4279 4280 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 4281 if (ql2xmvasynctoatio && !ha->flags.edif_enabled && 4282 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 4283 if (qla_tgt_mode_enabled(vha) || 4284 qla_dual_mode_enabled(vha)) 4285 ha->fw_options[2] |= BIT_11; 4286 else 4287 ha->fw_options[2] &= ~BIT_11; 4288 } 4289 4290 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4291 IS_QLA28XX(ha)) { 4292 /* 4293 * Tell FW to track each exchange to prevent 4294 * driver from using stale exchange. 4295 */ 4296 if (qla_tgt_mode_enabled(vha) || 4297 qla_dual_mode_enabled(vha)) 4298 ha->fw_options[2] |= BIT_4; 4299 else 4300 ha->fw_options[2] &= ~(BIT_4); 4301 4302 /* Reserve 1/2 of emergency exchanges for ELS.*/ 4303 if (qla2xuseresexchforels) 4304 ha->fw_options[2] |= BIT_8; 4305 else 4306 ha->fw_options[2] &= ~BIT_8; 4307 4308 /* 4309 * N2N: set Secure=1 for PLOGI ACC and 4310 * fw shal not send PRLI after PLOGI Acc 4311 */ 4312 if (ha->flags.edif_enabled && 4313 DBELL_ACTIVE(vha)) { 4314 ha->fw_options[3] |= BIT_15; 4315 ha->flags.n2n_fw_acc_sec = 1; 4316 } else { 4317 ha->fw_options[3] &= ~BIT_15; 4318 ha->flags.n2n_fw_acc_sec = 0; 4319 } 4320 } 4321 4322 if (ql2xrdpenable || ha->flags.scm_supported_f || 4323 ha->flags.edif_enabled) 4324 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB; 4325 4326 /* Enable Async 8130/8131 events -- transceiver insertion/removal */ 4327 if (IS_BPM_RANGE_CAPABLE(ha)) 4328 ha->fw_options[3] |= BIT_10; 4329 4330 ql_dbg(ql_dbg_init, vha, 0x00e8, 4331 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 4332 __func__, ha->fw_options[1], ha->fw_options[2], 4333 ha->fw_options[3], vha->host->active_mode); 4334 4335 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 4336 qla2x00_set_fw_options(vha, ha->fw_options); 4337 4338 /* Update Serial Link options. */ 4339 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 4340 return; 4341 4342 rval = qla2x00_set_serdes_params(vha, 4343 le16_to_cpu(ha->fw_seriallink_options24[1]), 4344 le16_to_cpu(ha->fw_seriallink_options24[2]), 4345 le16_to_cpu(ha->fw_seriallink_options24[3])); 4346 if (rval != QLA_SUCCESS) { 4347 ql_log(ql_log_warn, vha, 0x0104, 4348 "Unable to update Serial Link options (%x).\n", rval); 4349 } 4350 } 4351 4352 void 4353 qla2x00_config_rings(struct scsi_qla_host *vha) 4354 { 4355 struct qla_hw_data *ha = vha->hw; 4356 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4357 struct req_que *req = ha->req_q_map[0]; 4358 struct rsp_que *rsp = ha->rsp_q_map[0]; 4359 4360 /* Setup ring parameters in initialization control block. */ 4361 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 4362 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 4363 ha->init_cb->request_q_length = cpu_to_le16(req->length); 4364 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 4365 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 4366 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 4367 4368 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0); 4369 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0); 4370 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0); 4371 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0); 4372 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 4373 } 4374 4375 void 4376 qla24xx_config_rings(struct scsi_qla_host *vha) 4377 { 4378 struct qla_hw_data *ha = vha->hw; 4379 device_reg_t *reg = ISP_QUE_REG(ha, 0); 4380 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 4381 struct qla_msix_entry *msix; 4382 struct init_cb_24xx *icb; 4383 uint16_t rid = 0; 4384 struct req_que *req = ha->req_q_map[0]; 4385 struct rsp_que *rsp = ha->rsp_q_map[0]; 4386 4387 /* Setup ring parameters in initialization control block. */ 4388 icb = (struct init_cb_24xx *)ha->init_cb; 4389 icb->request_q_outpointer = cpu_to_le16(0); 4390 icb->response_q_inpointer = cpu_to_le16(0); 4391 icb->request_q_length = cpu_to_le16(req->length); 4392 icb->response_q_length = cpu_to_le16(rsp->length); 4393 put_unaligned_le64(req->dma, &icb->request_q_address); 4394 put_unaligned_le64(rsp->dma, &icb->response_q_address); 4395 4396 /* Setup ATIO queue dma pointers for target mode */ 4397 icb->atio_q_inpointer = cpu_to_le16(0); 4398 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 4399 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 4400 4401 if (IS_SHADOW_REG_CAPABLE(ha)) 4402 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 4403 4404 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4405 IS_QLA28XX(ha)) { 4406 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 4407 icb->rid = cpu_to_le16(rid); 4408 if (ha->flags.msix_enabled) { 4409 msix = &ha->msix_entries[1]; 4410 ql_dbg(ql_dbg_init, vha, 0x0019, 4411 "Registering vector 0x%x for base que.\n", 4412 msix->entry); 4413 icb->msix = cpu_to_le16(msix->entry); 4414 } 4415 /* Use alternate PCI bus number */ 4416 if (MSB(rid)) 4417 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 4418 /* Use alternate PCI devfn */ 4419 if (LSB(rid)) 4420 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 4421 4422 /* Use Disable MSIX Handshake mode for capable adapters */ 4423 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 4424 (ha->flags.msix_enabled)) { 4425 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 4426 ha->flags.disable_msix_handshake = 1; 4427 ql_dbg(ql_dbg_init, vha, 0x00fe, 4428 "MSIX Handshake Disable Mode turned on.\n"); 4429 } else { 4430 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 4431 } 4432 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4433 4434 wrt_reg_dword(®->isp25mq.req_q_in, 0); 4435 wrt_reg_dword(®->isp25mq.req_q_out, 0); 4436 wrt_reg_dword(®->isp25mq.rsp_q_in, 0); 4437 wrt_reg_dword(®->isp25mq.rsp_q_out, 0); 4438 } else { 4439 wrt_reg_dword(®->isp24.req_q_in, 0); 4440 wrt_reg_dword(®->isp24.req_q_out, 0); 4441 wrt_reg_dword(®->isp24.rsp_q_in, 0); 4442 wrt_reg_dword(®->isp24.rsp_q_out, 0); 4443 } 4444 4445 qlt_24xx_config_rings(vha); 4446 4447 /* If the user has configured the speed, set it here */ 4448 if (ha->set_data_rate) { 4449 ql_dbg(ql_dbg_init, vha, 0x00fd, 4450 "Speed set by user : %s Gbps \n", 4451 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4452 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13); 4453 } 4454 4455 /* PCI posting */ 4456 rd_reg_word(&ioreg->hccr); 4457 } 4458 4459 /** 4460 * qla2x00_init_rings() - Initializes firmware. 4461 * @vha: HA context 4462 * 4463 * Beginning of request ring has initialization control block already built 4464 * by nvram config routine. 4465 * 4466 * Returns 0 on success. 4467 */ 4468 int 4469 qla2x00_init_rings(scsi_qla_host_t *vha) 4470 { 4471 int rval; 4472 unsigned long flags = 0; 4473 int cnt, que; 4474 struct qla_hw_data *ha = vha->hw; 4475 struct req_que *req; 4476 struct rsp_que *rsp; 4477 struct mid_init_cb_24xx *mid_init_cb = 4478 (struct mid_init_cb_24xx *) ha->init_cb; 4479 4480 spin_lock_irqsave(&ha->hardware_lock, flags); 4481 4482 /* Clear outstanding commands array. */ 4483 for (que = 0; que < ha->max_req_queues; que++) { 4484 req = ha->req_q_map[que]; 4485 if (!req || !test_bit(que, ha->req_qid_map)) 4486 continue; 4487 req->out_ptr = (uint16_t *)(req->ring + req->length); 4488 *req->out_ptr = 0; 4489 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4490 req->outstanding_cmds[cnt] = NULL; 4491 4492 req->current_outstanding_cmd = 1; 4493 4494 /* Initialize firmware. */ 4495 req->ring_ptr = req->ring; 4496 req->ring_index = 0; 4497 req->cnt = req->length; 4498 } 4499 4500 for (que = 0; que < ha->max_rsp_queues; que++) { 4501 rsp = ha->rsp_q_map[que]; 4502 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4503 continue; 4504 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length); 4505 *rsp->in_ptr = 0; 4506 /* Initialize response queue entries */ 4507 if (IS_QLAFX00(ha)) 4508 qlafx00_init_response_q_entries(rsp); 4509 else 4510 qla2x00_init_response_q_entries(rsp); 4511 } 4512 4513 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4514 ha->tgt.atio_ring_index = 0; 4515 /* Initialize ATIO queue entries */ 4516 qlt_init_atio_q_entries(vha); 4517 4518 ha->isp_ops->config_rings(vha); 4519 4520 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4521 4522 if (IS_QLAFX00(ha)) { 4523 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4524 goto next_check; 4525 } 4526 4527 /* Update any ISP specific firmware options before initialization. */ 4528 ha->isp_ops->update_fw_options(vha); 4529 4530 ql_dbg(ql_dbg_init, vha, 0x00d1, 4531 "Issue init firmware FW opt 1-3= %08x %08x %08x.\n", 4532 le32_to_cpu(mid_init_cb->init_cb.firmware_options_1), 4533 le32_to_cpu(mid_init_cb->init_cb.firmware_options_2), 4534 le32_to_cpu(mid_init_cb->init_cb.firmware_options_3)); 4535 4536 if (ha->flags.npiv_supported) { 4537 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4538 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4539 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4540 } 4541 4542 if (IS_FWI2_CAPABLE(ha)) { 4543 mid_init_cb->options = cpu_to_le16(BIT_1); 4544 mid_init_cb->init_cb.execution_throttle = 4545 cpu_to_le16(ha->cur_fw_xcb_count); 4546 ha->flags.dport_enabled = 4547 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4548 BIT_7) != 0; 4549 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4550 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4551 /* FA-WWPN Status */ 4552 ha->flags.fawwpn_enabled = 4553 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4554 BIT_6) != 0; 4555 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4556 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4557 /* Init_cb will be reused for other command(s). Save a backup copy of port_name */ 4558 memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE); 4559 } 4560 4561 /* ELS pass through payload is limit by frame size. */ 4562 if (ha->flags.edif_enabled) 4563 mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD); 4564 4565 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4566 next_check: 4567 if (rval) { 4568 ql_log(ql_log_fatal, vha, 0x00d2, 4569 "Init Firmware **** FAILED ****.\n"); 4570 } else { 4571 ql_dbg(ql_dbg_init, vha, 0x00d3, 4572 "Init Firmware -- success.\n"); 4573 QLA_FW_STARTED(ha); 4574 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4575 } 4576 4577 return (rval); 4578 } 4579 4580 /** 4581 * qla2x00_fw_ready() - Waits for firmware ready. 4582 * @vha: HA context 4583 * 4584 * Returns 0 on success. 4585 */ 4586 static int 4587 qla2x00_fw_ready(scsi_qla_host_t *vha) 4588 { 4589 int rval; 4590 unsigned long wtime, mtime, cs84xx_time; 4591 uint16_t min_wait; /* Minimum wait time if loop is down */ 4592 uint16_t wait_time; /* Wait time if loop is coming ready */ 4593 uint16_t state[6]; 4594 struct qla_hw_data *ha = vha->hw; 4595 4596 if (IS_QLAFX00(vha->hw)) 4597 return qlafx00_fw_ready(vha); 4598 4599 /* Time to wait for loop down */ 4600 if (IS_P3P_TYPE(ha)) 4601 min_wait = 30; 4602 else 4603 min_wait = 20; 4604 4605 /* 4606 * Firmware should take at most one RATOV to login, plus 5 seconds for 4607 * our own processing. 4608 */ 4609 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4610 wait_time = min_wait; 4611 } 4612 4613 /* Min wait time if loop down */ 4614 mtime = jiffies + (min_wait * HZ); 4615 4616 /* wait time before firmware ready */ 4617 wtime = jiffies + (wait_time * HZ); 4618 4619 /* Wait for ISP to finish LIP */ 4620 if (!vha->flags.init_done) 4621 ql_log(ql_log_info, vha, 0x801e, 4622 "Waiting for LIP to complete.\n"); 4623 4624 do { 4625 memset(state, -1, sizeof(state)); 4626 rval = qla2x00_get_firmware_state(vha, state); 4627 if (rval == QLA_SUCCESS) { 4628 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4629 vha->device_flags &= ~DFLG_NO_CABLE; 4630 } 4631 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4632 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4633 "fw_state=%x 84xx=%x.\n", state[0], 4634 state[2]); 4635 if ((state[2] & FSTATE_LOGGED_IN) && 4636 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4637 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4638 "Sending verify iocb.\n"); 4639 4640 cs84xx_time = jiffies; 4641 rval = qla84xx_init_chip(vha); 4642 if (rval != QLA_SUCCESS) { 4643 ql_log(ql_log_warn, 4644 vha, 0x8007, 4645 "Init chip failed.\n"); 4646 break; 4647 } 4648 4649 /* Add time taken to initialize. */ 4650 cs84xx_time = jiffies - cs84xx_time; 4651 wtime += cs84xx_time; 4652 mtime += cs84xx_time; 4653 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4654 "Increasing wait time by %ld. " 4655 "New time %ld.\n", cs84xx_time, 4656 wtime); 4657 } 4658 } else if (state[0] == FSTATE_READY) { 4659 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4660 "F/W Ready - OK.\n"); 4661 4662 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4663 &ha->login_timeout, &ha->r_a_tov); 4664 4665 rval = QLA_SUCCESS; 4666 break; 4667 } 4668 4669 rval = QLA_FUNCTION_FAILED; 4670 4671 if (atomic_read(&vha->loop_down_timer) && 4672 state[0] != FSTATE_READY) { 4673 /* Loop down. Timeout on min_wait for states 4674 * other than Wait for Login. 4675 */ 4676 if (time_after_eq(jiffies, mtime)) { 4677 ql_log(ql_log_info, vha, 0x8038, 4678 "Cable is unplugged...\n"); 4679 4680 vha->device_flags |= DFLG_NO_CABLE; 4681 break; 4682 } 4683 } 4684 } else { 4685 /* Mailbox cmd failed. Timeout on min_wait. */ 4686 if (time_after_eq(jiffies, mtime) || 4687 ha->flags.isp82xx_fw_hung) 4688 break; 4689 } 4690 4691 if (time_after_eq(jiffies, wtime)) 4692 break; 4693 4694 /* Delay for a while */ 4695 msleep(500); 4696 } while (1); 4697 4698 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4699 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4700 state[1], state[2], state[3], state[4], state[5], jiffies); 4701 4702 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4703 ql_log(ql_log_warn, vha, 0x803b, 4704 "Firmware ready **** FAILED ****.\n"); 4705 } 4706 4707 return (rval); 4708 } 4709 4710 /* 4711 * qla2x00_configure_hba 4712 * Setup adapter context. 4713 * 4714 * Input: 4715 * ha = adapter state pointer. 4716 * 4717 * Returns: 4718 * 0 = success 4719 * 4720 * Context: 4721 * Kernel context. 4722 */ 4723 static int 4724 qla2x00_configure_hba(scsi_qla_host_t *vha) 4725 { 4726 int rval; 4727 uint16_t loop_id; 4728 uint16_t topo; 4729 uint16_t sw_cap; 4730 uint8_t al_pa; 4731 uint8_t area; 4732 uint8_t domain; 4733 char connect_type[22]; 4734 struct qla_hw_data *ha = vha->hw; 4735 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4736 port_id_t id; 4737 unsigned long flags; 4738 4739 /* Get host addresses. */ 4740 rval = qla2x00_get_adapter_id(vha, 4741 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4742 if (rval != QLA_SUCCESS) { 4743 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4744 IS_CNA_CAPABLE(ha) || 4745 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4746 ql_dbg(ql_dbg_disc, vha, 0x2008, 4747 "Loop is in a transition state.\n"); 4748 } else { 4749 ql_log(ql_log_warn, vha, 0x2009, 4750 "Unable to get host loop ID.\n"); 4751 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4752 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4753 ql_log(ql_log_warn, vha, 0x1151, 4754 "Doing link init.\n"); 4755 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4756 return rval; 4757 } 4758 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4759 } 4760 return (rval); 4761 } 4762 4763 if (topo == 4) { 4764 ql_log(ql_log_info, vha, 0x200a, 4765 "Cannot get topology - retrying.\n"); 4766 return (QLA_FUNCTION_FAILED); 4767 } 4768 4769 vha->loop_id = loop_id; 4770 4771 /* initialize */ 4772 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4773 ha->operating_mode = LOOP; 4774 4775 switch (topo) { 4776 case 0: 4777 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4778 ha->switch_cap = 0; 4779 ha->current_topology = ISP_CFG_NL; 4780 strcpy(connect_type, "(Loop)"); 4781 break; 4782 4783 case 1: 4784 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4785 ha->switch_cap = sw_cap; 4786 ha->current_topology = ISP_CFG_FL; 4787 strcpy(connect_type, "(FL_Port)"); 4788 break; 4789 4790 case 2: 4791 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4792 ha->switch_cap = 0; 4793 ha->operating_mode = P2P; 4794 ha->current_topology = ISP_CFG_N; 4795 strcpy(connect_type, "(N_Port-to-N_Port)"); 4796 break; 4797 4798 case 3: 4799 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4800 ha->switch_cap = sw_cap; 4801 ha->operating_mode = P2P; 4802 ha->current_topology = ISP_CFG_F; 4803 strcpy(connect_type, "(F_Port)"); 4804 break; 4805 4806 default: 4807 ql_dbg(ql_dbg_disc, vha, 0x200f, 4808 "HBA in unknown topology %x, using NL.\n", topo); 4809 ha->switch_cap = 0; 4810 ha->current_topology = ISP_CFG_NL; 4811 strcpy(connect_type, "(Loop)"); 4812 break; 4813 } 4814 4815 /* Save Host port and loop ID. */ 4816 /* byte order - Big Endian */ 4817 id.b.domain = domain; 4818 id.b.area = area; 4819 id.b.al_pa = al_pa; 4820 id.b.rsvd_1 = 0; 4821 spin_lock_irqsave(&ha->hardware_lock, flags); 4822 if (vha->hw->flags.edif_enabled) { 4823 if (topo != 2) 4824 qla_update_host_map(vha, id); 4825 } else if (!(topo == 2 && ha->flags.n2n_bigger)) 4826 qla_update_host_map(vha, id); 4827 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4828 4829 if (!vha->flags.init_done) 4830 ql_log(ql_log_info, vha, 0x2010, 4831 "Topology - %s, Host Loop address 0x%x.\n", 4832 connect_type, vha->loop_id); 4833 4834 return(rval); 4835 } 4836 4837 inline void 4838 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4839 const char *def) 4840 { 4841 char *st, *en; 4842 uint16_t index; 4843 uint64_t zero[2] = { 0 }; 4844 struct qla_hw_data *ha = vha->hw; 4845 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4846 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4847 4848 if (len > sizeof(zero)) 4849 len = sizeof(zero); 4850 if (memcmp(model, &zero, len) != 0) { 4851 memcpy(ha->model_number, model, len); 4852 st = en = ha->model_number; 4853 en += len - 1; 4854 while (en > st) { 4855 if (*en != 0x20 && *en != 0x00) 4856 break; 4857 *en-- = '\0'; 4858 } 4859 4860 index = (ha->pdev->subsystem_device & 0xff); 4861 if (use_tbl && 4862 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4863 index < QLA_MODEL_NAMES) 4864 strlcpy(ha->model_desc, 4865 qla2x00_model_name[index * 2 + 1], 4866 sizeof(ha->model_desc)); 4867 } else { 4868 index = (ha->pdev->subsystem_device & 0xff); 4869 if (use_tbl && 4870 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4871 index < QLA_MODEL_NAMES) { 4872 strlcpy(ha->model_number, 4873 qla2x00_model_name[index * 2], 4874 sizeof(ha->model_number)); 4875 strlcpy(ha->model_desc, 4876 qla2x00_model_name[index * 2 + 1], 4877 sizeof(ha->model_desc)); 4878 } else { 4879 strlcpy(ha->model_number, def, 4880 sizeof(ha->model_number)); 4881 } 4882 } 4883 if (IS_FWI2_CAPABLE(ha)) 4884 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4885 sizeof(ha->model_desc)); 4886 } 4887 4888 /* On sparc systems, obtain port and node WWN from firmware 4889 * properties. 4890 */ 4891 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4892 { 4893 #ifdef CONFIG_SPARC 4894 struct qla_hw_data *ha = vha->hw; 4895 struct pci_dev *pdev = ha->pdev; 4896 struct device_node *dp = pci_device_to_OF_node(pdev); 4897 const u8 *val; 4898 int len; 4899 4900 val = of_get_property(dp, "port-wwn", &len); 4901 if (val && len >= WWN_SIZE) 4902 memcpy(nv->port_name, val, WWN_SIZE); 4903 4904 val = of_get_property(dp, "node-wwn", &len); 4905 if (val && len >= WWN_SIZE) 4906 memcpy(nv->node_name, val, WWN_SIZE); 4907 #endif 4908 } 4909 4910 /* 4911 * NVRAM configuration for ISP 2xxx 4912 * 4913 * Input: 4914 * ha = adapter block pointer. 4915 * 4916 * Output: 4917 * initialization control block in response_ring 4918 * host adapters parameters in host adapter block 4919 * 4920 * Returns: 4921 * 0 = success. 4922 */ 4923 int 4924 qla2x00_nvram_config(scsi_qla_host_t *vha) 4925 { 4926 int rval; 4927 uint8_t chksum = 0; 4928 uint16_t cnt; 4929 uint8_t *dptr1, *dptr2; 4930 struct qla_hw_data *ha = vha->hw; 4931 init_cb_t *icb = ha->init_cb; 4932 nvram_t *nv = ha->nvram; 4933 uint8_t *ptr = ha->nvram; 4934 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4935 4936 rval = QLA_SUCCESS; 4937 4938 /* Determine NVRAM starting address. */ 4939 ha->nvram_size = sizeof(*nv); 4940 ha->nvram_base = 0; 4941 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4942 if ((rd_reg_word(®->ctrl_status) >> 14) == 1) 4943 ha->nvram_base = 0x80; 4944 4945 /* Get NVRAM data and calculate checksum. */ 4946 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4947 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4948 chksum += *ptr++; 4949 4950 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4951 "Contents of NVRAM.\n"); 4952 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4953 nv, ha->nvram_size); 4954 4955 /* Bad NVRAM data, set defaults parameters. */ 4956 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 4957 nv->nvram_version < 1) { 4958 /* Reset NVRAM data. */ 4959 ql_log(ql_log_warn, vha, 0x0064, 4960 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 4961 chksum, nv->id, nv->nvram_version); 4962 ql_log(ql_log_warn, vha, 0x0065, 4963 "Falling back to " 4964 "functioning (yet invalid -- WWPN) defaults.\n"); 4965 4966 /* 4967 * Set default initialization control block. 4968 */ 4969 memset(nv, 0, ha->nvram_size); 4970 nv->parameter_block_version = ICB_VERSION; 4971 4972 if (IS_QLA23XX(ha)) { 4973 nv->firmware_options[0] = BIT_2 | BIT_1; 4974 nv->firmware_options[1] = BIT_7 | BIT_5; 4975 nv->add_firmware_options[0] = BIT_5; 4976 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4977 nv->frame_payload_size = cpu_to_le16(2048); 4978 nv->special_options[1] = BIT_7; 4979 } else if (IS_QLA2200(ha)) { 4980 nv->firmware_options[0] = BIT_2 | BIT_1; 4981 nv->firmware_options[1] = BIT_7 | BIT_5; 4982 nv->add_firmware_options[0] = BIT_5; 4983 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4984 nv->frame_payload_size = cpu_to_le16(1024); 4985 } else if (IS_QLA2100(ha)) { 4986 nv->firmware_options[0] = BIT_3 | BIT_1; 4987 nv->firmware_options[1] = BIT_5; 4988 nv->frame_payload_size = cpu_to_le16(1024); 4989 } 4990 4991 nv->max_iocb_allocation = cpu_to_le16(256); 4992 nv->execution_throttle = cpu_to_le16(16); 4993 nv->retry_count = 8; 4994 nv->retry_delay = 1; 4995 4996 nv->port_name[0] = 33; 4997 nv->port_name[3] = 224; 4998 nv->port_name[4] = 139; 4999 5000 qla2xxx_nvram_wwn_from_ofw(vha, nv); 5001 5002 nv->login_timeout = 4; 5003 5004 /* 5005 * Set default host adapter parameters 5006 */ 5007 nv->host_p[1] = BIT_2; 5008 nv->reset_delay = 5; 5009 nv->port_down_retry_count = 8; 5010 nv->max_luns_per_target = cpu_to_le16(8); 5011 nv->link_down_timeout = 60; 5012 5013 rval = 1; 5014 } 5015 5016 /* Reset Initialization control block */ 5017 memset(icb, 0, ha->init_cb_size); 5018 5019 /* 5020 * Setup driver NVRAM options. 5021 */ 5022 nv->firmware_options[0] |= (BIT_6 | BIT_1); 5023 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 5024 nv->firmware_options[1] |= (BIT_5 | BIT_0); 5025 nv->firmware_options[1] &= ~BIT_4; 5026 5027 if (IS_QLA23XX(ha)) { 5028 nv->firmware_options[0] |= BIT_2; 5029 nv->firmware_options[0] &= ~BIT_3; 5030 nv->special_options[0] &= ~BIT_6; 5031 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 5032 5033 if (IS_QLA2300(ha)) { 5034 if (ha->fb_rev == FPM_2310) { 5035 strcpy(ha->model_number, "QLA2310"); 5036 } else { 5037 strcpy(ha->model_number, "QLA2300"); 5038 } 5039 } else { 5040 qla2x00_set_model_info(vha, nv->model_number, 5041 sizeof(nv->model_number), "QLA23xx"); 5042 } 5043 } else if (IS_QLA2200(ha)) { 5044 nv->firmware_options[0] |= BIT_2; 5045 /* 5046 * 'Point-to-point preferred, else loop' is not a safe 5047 * connection mode setting. 5048 */ 5049 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 5050 (BIT_5 | BIT_4)) { 5051 /* Force 'loop preferred, else point-to-point'. */ 5052 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 5053 nv->add_firmware_options[0] |= BIT_5; 5054 } 5055 strcpy(ha->model_number, "QLA22xx"); 5056 } else /*if (IS_QLA2100(ha))*/ { 5057 strcpy(ha->model_number, "QLA2100"); 5058 } 5059 5060 /* 5061 * Copy over NVRAM RISC parameter block to initialization control block. 5062 */ 5063 dptr1 = (uint8_t *)icb; 5064 dptr2 = (uint8_t *)&nv->parameter_block_version; 5065 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 5066 while (cnt--) 5067 *dptr1++ = *dptr2++; 5068 5069 /* Copy 2nd half. */ 5070 dptr1 = (uint8_t *)icb->add_firmware_options; 5071 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 5072 while (cnt--) 5073 *dptr1++ = *dptr2++; 5074 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 5075 /* Use alternate WWN? */ 5076 if (nv->host_p[1] & BIT_7) { 5077 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5078 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5079 } 5080 5081 /* Prepare nodename */ 5082 if ((icb->firmware_options[1] & BIT_6) == 0) { 5083 /* 5084 * Firmware will apply the following mask if the nodename was 5085 * not provided. 5086 */ 5087 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5088 icb->node_name[0] &= 0xF0; 5089 } 5090 5091 /* 5092 * Set host adapter parameters. 5093 */ 5094 5095 /* 5096 * BIT_7 in the host-parameters section allows for modification to 5097 * internal driver logging. 5098 */ 5099 if (nv->host_p[0] & BIT_7) 5100 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 5101 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 5102 /* Always load RISC code on non ISP2[12]00 chips. */ 5103 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 5104 ha->flags.disable_risc_code_load = 0; 5105 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 5106 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 5107 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 5108 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 5109 ha->flags.disable_serdes = 0; 5110 5111 ha->operating_mode = 5112 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 5113 5114 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 5115 sizeof(ha->fw_seriallink_options)); 5116 5117 /* save HBA serial number */ 5118 ha->serial0 = icb->port_name[5]; 5119 ha->serial1 = icb->port_name[6]; 5120 ha->serial2 = icb->port_name[7]; 5121 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5122 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5123 5124 icb->execution_throttle = cpu_to_le16(0xFFFF); 5125 5126 ha->retry_count = nv->retry_count; 5127 5128 /* Set minimum login_timeout to 4 seconds. */ 5129 if (nv->login_timeout != ql2xlogintimeout) 5130 nv->login_timeout = ql2xlogintimeout; 5131 if (nv->login_timeout < 4) 5132 nv->login_timeout = 4; 5133 ha->login_timeout = nv->login_timeout; 5134 5135 /* Set minimum RATOV to 100 tenths of a second. */ 5136 ha->r_a_tov = 100; 5137 5138 ha->loop_reset_delay = nv->reset_delay; 5139 5140 /* Link Down Timeout = 0: 5141 * 5142 * When Port Down timer expires we will start returning 5143 * I/O's to OS with "DID_NO_CONNECT". 5144 * 5145 * Link Down Timeout != 0: 5146 * 5147 * The driver waits for the link to come up after link down 5148 * before returning I/Os to OS with "DID_NO_CONNECT". 5149 */ 5150 if (nv->link_down_timeout == 0) { 5151 ha->loop_down_abort_time = 5152 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5153 } else { 5154 ha->link_down_timeout = nv->link_down_timeout; 5155 ha->loop_down_abort_time = 5156 (LOOP_DOWN_TIME - ha->link_down_timeout); 5157 } 5158 5159 /* 5160 * Need enough time to try and get the port back. 5161 */ 5162 ha->port_down_retry_count = nv->port_down_retry_count; 5163 if (qlport_down_retry) 5164 ha->port_down_retry_count = qlport_down_retry; 5165 /* Set login_retry_count */ 5166 ha->login_retry_count = nv->retry_count; 5167 if (ha->port_down_retry_count == nv->port_down_retry_count && 5168 ha->port_down_retry_count > 3) 5169 ha->login_retry_count = ha->port_down_retry_count; 5170 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5171 ha->login_retry_count = ha->port_down_retry_count; 5172 if (ql2xloginretrycount) 5173 ha->login_retry_count = ql2xloginretrycount; 5174 5175 icb->lun_enables = cpu_to_le16(0); 5176 icb->command_resource_count = 0; 5177 icb->immediate_notify_resource_count = 0; 5178 icb->timeout = cpu_to_le16(0); 5179 5180 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 5181 /* Enable RIO */ 5182 icb->firmware_options[0] &= ~BIT_3; 5183 icb->add_firmware_options[0] &= 5184 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5185 icb->add_firmware_options[0] |= BIT_2; 5186 icb->response_accumulation_timer = 3; 5187 icb->interrupt_delay_timer = 5; 5188 5189 vha->flags.process_response_queue = 1; 5190 } else { 5191 /* Enable ZIO. */ 5192 if (!vha->flags.init_done) { 5193 ha->zio_mode = icb->add_firmware_options[0] & 5194 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5195 ha->zio_timer = icb->interrupt_delay_timer ? 5196 icb->interrupt_delay_timer : 2; 5197 } 5198 icb->add_firmware_options[0] &= 5199 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5200 vha->flags.process_response_queue = 0; 5201 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5202 ha->zio_mode = QLA_ZIO_MODE_6; 5203 5204 ql_log(ql_log_info, vha, 0x0068, 5205 "ZIO mode %d enabled; timer delay (%d us).\n", 5206 ha->zio_mode, ha->zio_timer * 100); 5207 5208 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 5209 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 5210 vha->flags.process_response_queue = 1; 5211 } 5212 } 5213 5214 if (rval) { 5215 ql_log(ql_log_warn, vha, 0x0069, 5216 "NVRAM configuration failed.\n"); 5217 } 5218 return (rval); 5219 } 5220 5221 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 5222 { 5223 int old_state; 5224 5225 old_state = atomic_read(&fcport->state); 5226 atomic_set(&fcport->state, state); 5227 5228 /* Don't print state transitions during initial allocation of fcport */ 5229 if (old_state && old_state != state) { 5230 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 5231 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 5232 fcport->port_name, port_state_str[old_state], 5233 port_state_str[state], fcport->d_id.b.domain, 5234 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5235 } 5236 } 5237 5238 /** 5239 * qla2x00_alloc_fcport() - Allocate a generic fcport. 5240 * @vha: HA context 5241 * @flags: allocation flags 5242 * 5243 * Returns a pointer to the allocated fcport, or NULL, if none available. 5244 */ 5245 fc_port_t * 5246 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 5247 { 5248 fc_port_t *fcport; 5249 5250 fcport = kzalloc(sizeof(fc_port_t), flags); 5251 if (!fcport) 5252 return NULL; 5253 5254 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 5255 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 5256 flags); 5257 if (!fcport->ct_desc.ct_sns) { 5258 ql_log(ql_log_warn, vha, 0xd049, 5259 "Failed to allocate ct_sns request.\n"); 5260 kfree(fcport); 5261 return NULL; 5262 } 5263 5264 /* Setup fcport template structure. */ 5265 fcport->vha = vha; 5266 fcport->port_type = FCT_UNKNOWN; 5267 fcport->loop_id = FC_NO_LOOP_ID; 5268 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 5269 fcport->supported_classes = FC_COS_UNSPECIFIED; 5270 fcport->fp_speed = PORT_SPEED_UNKNOWN; 5271 5272 fcport->disc_state = DSC_DELETED; 5273 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 5274 fcport->deleted = QLA_SESS_DELETED; 5275 fcport->login_retry = vha->hw->login_retry_count; 5276 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 5277 fcport->logout_on_delete = 1; 5278 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5279 fcport->tgt_short_link_down_cnt = 0; 5280 fcport->dev_loss_tmo = 0; 5281 5282 if (!fcport->ct_desc.ct_sns) { 5283 ql_log(ql_log_warn, vha, 0xd049, 5284 "Failed to allocate ct_sns request.\n"); 5285 kfree(fcport); 5286 return NULL; 5287 } 5288 5289 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 5290 INIT_WORK(&fcport->free_work, qlt_free_session_done); 5291 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 5292 INIT_LIST_HEAD(&fcport->gnl_entry); 5293 INIT_LIST_HEAD(&fcport->list); 5294 5295 INIT_LIST_HEAD(&fcport->sess_cmd_list); 5296 spin_lock_init(&fcport->sess_cmd_lock); 5297 5298 spin_lock_init(&fcport->edif.sa_list_lock); 5299 INIT_LIST_HEAD(&fcport->edif.tx_sa_list); 5300 INIT_LIST_HEAD(&fcport->edif.rx_sa_list); 5301 5302 spin_lock_init(&fcport->edif.indx_list_lock); 5303 INIT_LIST_HEAD(&fcport->edif.edif_indx_list); 5304 5305 return fcport; 5306 } 5307 5308 void 5309 qla2x00_free_fcport(fc_port_t *fcport) 5310 { 5311 if (fcport->ct_desc.ct_sns) { 5312 dma_free_coherent(&fcport->vha->hw->pdev->dev, 5313 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 5314 fcport->ct_desc.ct_sns_dma); 5315 5316 fcport->ct_desc.ct_sns = NULL; 5317 } 5318 5319 qla_edif_flush_sa_ctl_lists(fcport); 5320 list_del(&fcport->list); 5321 qla2x00_clear_loop_id(fcport); 5322 5323 qla_edif_list_del(fcport); 5324 5325 kfree(fcport); 5326 } 5327 5328 static void qla_get_login_template(scsi_qla_host_t *vha) 5329 { 5330 struct qla_hw_data *ha = vha->hw; 5331 int rval; 5332 u32 *bp, sz; 5333 __be32 *q; 5334 5335 memset(ha->init_cb, 0, ha->init_cb_size); 5336 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size); 5337 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 5338 ha->init_cb, sz); 5339 if (rval != QLA_SUCCESS) { 5340 ql_dbg(ql_dbg_init, vha, 0x00d1, 5341 "PLOGI ELS param read fail.\n"); 5342 return; 5343 } 5344 q = (__be32 *)&ha->plogi_els_payld.fl_csp; 5345 5346 bp = (uint32_t *)ha->init_cb; 5347 cpu_to_be32_array(q, bp, sz / 4); 5348 ha->flags.plogi_template_valid = 1; 5349 } 5350 5351 /* 5352 * qla2x00_configure_loop 5353 * Updates Fibre Channel Device Database with what is actually on loop. 5354 * 5355 * Input: 5356 * ha = adapter block pointer. 5357 * 5358 * Returns: 5359 * 0 = success. 5360 * 1 = error. 5361 * 2 = database was full and device was not configured. 5362 */ 5363 static int 5364 qla2x00_configure_loop(scsi_qla_host_t *vha) 5365 { 5366 int rval; 5367 unsigned long flags, save_flags; 5368 struct qla_hw_data *ha = vha->hw; 5369 5370 rval = QLA_SUCCESS; 5371 5372 /* Get Initiator ID */ 5373 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 5374 rval = qla2x00_configure_hba(vha); 5375 if (rval != QLA_SUCCESS) { 5376 ql_dbg(ql_dbg_disc, vha, 0x2013, 5377 "Unable to configure HBA.\n"); 5378 return (rval); 5379 } 5380 } 5381 5382 save_flags = flags = vha->dpc_flags; 5383 ql_dbg(ql_dbg_disc, vha, 0x2014, 5384 "Configure loop -- dpc flags = 0x%lx.\n", flags); 5385 5386 /* 5387 * If we have both an RSCN and PORT UPDATE pending then handle them 5388 * both at the same time. 5389 */ 5390 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5391 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 5392 5393 qla2x00_get_data_rate(vha); 5394 qla_get_login_template(vha); 5395 5396 /* Determine what we need to do */ 5397 if ((ha->current_topology == ISP_CFG_FL || 5398 ha->current_topology == ISP_CFG_F) && 5399 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 5400 5401 set_bit(RSCN_UPDATE, &flags); 5402 clear_bit(LOCAL_LOOP_UPDATE, &flags); 5403 5404 } else if (ha->current_topology == ISP_CFG_NL || 5405 ha->current_topology == ISP_CFG_N) { 5406 clear_bit(RSCN_UPDATE, &flags); 5407 set_bit(LOCAL_LOOP_UPDATE, &flags); 5408 } else if (!vha->flags.online || 5409 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 5410 set_bit(RSCN_UPDATE, &flags); 5411 set_bit(LOCAL_LOOP_UPDATE, &flags); 5412 } 5413 5414 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 5415 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5416 ql_dbg(ql_dbg_disc, vha, 0x2015, 5417 "Loop resync needed, failing.\n"); 5418 rval = QLA_FUNCTION_FAILED; 5419 } else 5420 rval = qla2x00_configure_local_loop(vha); 5421 } 5422 5423 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 5424 if (LOOP_TRANSITION(vha)) { 5425 ql_dbg(ql_dbg_disc, vha, 0x2099, 5426 "Needs RSCN update and loop transition.\n"); 5427 rval = QLA_FUNCTION_FAILED; 5428 } 5429 else 5430 rval = qla2x00_configure_fabric(vha); 5431 } 5432 5433 if (rval == QLA_SUCCESS) { 5434 if (atomic_read(&vha->loop_down_timer) || 5435 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5436 rval = QLA_FUNCTION_FAILED; 5437 } else { 5438 atomic_set(&vha->loop_state, LOOP_READY); 5439 ql_dbg(ql_dbg_disc, vha, 0x2069, 5440 "LOOP READY.\n"); 5441 ha->flags.fw_init_done = 1; 5442 5443 /* 5444 * use link up to wake up app to get ready for 5445 * authentication. 5446 */ 5447 if (ha->flags.edif_enabled && DBELL_INACTIVE(vha)) 5448 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, 5449 ha->link_data_rate); 5450 5451 /* 5452 * Process any ATIO queue entries that came in 5453 * while we weren't online. 5454 */ 5455 if (qla_tgt_mode_enabled(vha) || 5456 qla_dual_mode_enabled(vha)) { 5457 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 5458 qlt_24xx_process_atio_queue(vha, 0); 5459 spin_unlock_irqrestore(&ha->tgt.atio_lock, 5460 flags); 5461 } 5462 } 5463 } 5464 5465 if (rval) { 5466 ql_dbg(ql_dbg_disc, vha, 0x206a, 5467 "%s *** FAILED ***.\n", __func__); 5468 } else { 5469 ql_dbg(ql_dbg_disc, vha, 0x206b, 5470 "%s: exiting normally. local port wwpn %8phN id %06x)\n", 5471 __func__, vha->port_name, vha->d_id.b24); 5472 } 5473 5474 /* Restore state if a resync event occurred during processing */ 5475 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5476 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5477 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5478 if (test_bit(RSCN_UPDATE, &save_flags)) { 5479 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5480 } 5481 } 5482 5483 return (rval); 5484 } 5485 5486 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha) 5487 { 5488 unsigned long flags; 5489 fc_port_t *fcport; 5490 5491 ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__); 5492 5493 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) 5494 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 5495 5496 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5497 if (fcport->n2n_flag) { 5498 qla24xx_fcport_handle_login(vha, fcport); 5499 return QLA_SUCCESS; 5500 } 5501 } 5502 5503 spin_lock_irqsave(&vha->work_lock, flags); 5504 vha->scan.scan_retry++; 5505 spin_unlock_irqrestore(&vha->work_lock, flags); 5506 5507 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5508 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5509 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5510 } 5511 return QLA_FUNCTION_FAILED; 5512 } 5513 5514 static void 5515 qla_reinitialize_link(scsi_qla_host_t *vha) 5516 { 5517 int rval; 5518 5519 atomic_set(&vha->loop_state, LOOP_DOWN); 5520 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 5521 rval = qla2x00_full_login_lip(vha); 5522 if (rval == QLA_SUCCESS) { 5523 ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n"); 5524 } else { 5525 ql_dbg(ql_dbg_disc, vha, 0xd051, 5526 "Link reinitialization failed (%d)\n", rval); 5527 } 5528 } 5529 5530 /* 5531 * qla2x00_configure_local_loop 5532 * Updates Fibre Channel Device Database with local loop devices. 5533 * 5534 * Input: 5535 * ha = adapter block pointer. 5536 * 5537 * Returns: 5538 * 0 = success. 5539 */ 5540 static int 5541 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5542 { 5543 int rval, rval2; 5544 int found; 5545 fc_port_t *fcport, *new_fcport; 5546 uint16_t index; 5547 uint16_t entries; 5548 struct gid_list_info *gid; 5549 uint16_t loop_id; 5550 uint8_t domain, area, al_pa; 5551 struct qla_hw_data *ha = vha->hw; 5552 unsigned long flags; 5553 5554 /* Inititae N2N login. */ 5555 if (N2N_TOPO(ha)) 5556 return qla2x00_configure_n2n_loop(vha); 5557 5558 new_fcport = NULL; 5559 entries = MAX_FIBRE_DEVICES_LOOP; 5560 5561 /* Get list of logged in devices. */ 5562 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5563 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5564 &entries); 5565 if (rval != QLA_SUCCESS) 5566 goto err; 5567 5568 ql_dbg(ql_dbg_disc, vha, 0x2011, 5569 "Entries in ID list (%d).\n", entries); 5570 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5571 ha->gid_list, entries * sizeof(*ha->gid_list)); 5572 5573 if (entries == 0) { 5574 spin_lock_irqsave(&vha->work_lock, flags); 5575 vha->scan.scan_retry++; 5576 spin_unlock_irqrestore(&vha->work_lock, flags); 5577 5578 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5579 u8 loop_map_entries = 0; 5580 int rc; 5581 5582 rc = qla2x00_get_fcal_position_map(vha, NULL, 5583 &loop_map_entries); 5584 if (rc == QLA_SUCCESS && loop_map_entries > 1) { 5585 /* 5586 * There are devices that are still not logged 5587 * in. Reinitialize to give them a chance. 5588 */ 5589 qla_reinitialize_link(vha); 5590 return QLA_FUNCTION_FAILED; 5591 } 5592 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5593 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5594 } 5595 } else { 5596 vha->scan.scan_retry = 0; 5597 } 5598 5599 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5600 fcport->scan_state = QLA_FCPORT_SCAN; 5601 } 5602 5603 /* Allocate temporary fcport for any new fcports discovered. */ 5604 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5605 if (new_fcport == NULL) { 5606 ql_log(ql_log_warn, vha, 0x2012, 5607 "Memory allocation failed for fcport.\n"); 5608 rval = QLA_MEMORY_ALLOC_FAILED; 5609 goto err; 5610 } 5611 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5612 5613 /* Add devices to port list. */ 5614 gid = ha->gid_list; 5615 for (index = 0; index < entries; index++) { 5616 domain = gid->domain; 5617 area = gid->area; 5618 al_pa = gid->al_pa; 5619 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5620 loop_id = gid->loop_id_2100; 5621 else 5622 loop_id = le16_to_cpu(gid->loop_id); 5623 gid = (void *)gid + ha->gid_list_info_size; 5624 5625 /* Bypass reserved domain fields. */ 5626 if ((domain & 0xf0) == 0xf0) 5627 continue; 5628 5629 /* Bypass if not same domain and area of adapter. */ 5630 if (area && domain && ((area != vha->d_id.b.area) || 5631 (domain != vha->d_id.b.domain)) && 5632 (ha->current_topology == ISP_CFG_NL)) 5633 continue; 5634 5635 5636 /* Bypass invalid local loop ID. */ 5637 if (loop_id > LAST_LOCAL_LOOP_ID) 5638 continue; 5639 5640 memset(new_fcport->port_name, 0, WWN_SIZE); 5641 5642 /* Fill in member data. */ 5643 new_fcport->d_id.b.domain = domain; 5644 new_fcport->d_id.b.area = area; 5645 new_fcport->d_id.b.al_pa = al_pa; 5646 new_fcport->loop_id = loop_id; 5647 new_fcport->scan_state = QLA_FCPORT_FOUND; 5648 5649 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5650 if (rval2 != QLA_SUCCESS) { 5651 ql_dbg(ql_dbg_disc, vha, 0x2097, 5652 "Failed to retrieve fcport information " 5653 "-- get_port_database=%x, loop_id=0x%04x.\n", 5654 rval2, new_fcport->loop_id); 5655 /* Skip retry if N2N */ 5656 if (ha->current_topology != ISP_CFG_N) { 5657 ql_dbg(ql_dbg_disc, vha, 0x2105, 5658 "Scheduling resync.\n"); 5659 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5660 continue; 5661 } 5662 } 5663 5664 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5665 /* Check for matching device in port list. */ 5666 found = 0; 5667 fcport = NULL; 5668 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5669 if (memcmp(new_fcport->port_name, fcport->port_name, 5670 WWN_SIZE)) 5671 continue; 5672 5673 fcport->flags &= ~FCF_FABRIC_DEVICE; 5674 fcport->loop_id = new_fcport->loop_id; 5675 fcport->port_type = new_fcport->port_type; 5676 fcport->d_id.b24 = new_fcport->d_id.b24; 5677 memcpy(fcport->node_name, new_fcport->node_name, 5678 WWN_SIZE); 5679 fcport->scan_state = QLA_FCPORT_FOUND; 5680 if (fcport->login_retry == 0) { 5681 fcport->login_retry = vha->hw->login_retry_count; 5682 ql_dbg(ql_dbg_disc, vha, 0x2135, 5683 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n", 5684 fcport->port_name, fcport->loop_id, 5685 fcport->login_retry); 5686 } 5687 found++; 5688 break; 5689 } 5690 5691 if (!found) { 5692 /* New device, add to fcports list. */ 5693 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5694 5695 /* Allocate a new replacement fcport. */ 5696 fcport = new_fcport; 5697 5698 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5699 5700 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5701 5702 if (new_fcport == NULL) { 5703 ql_log(ql_log_warn, vha, 0xd031, 5704 "Failed to allocate memory for fcport.\n"); 5705 rval = QLA_MEMORY_ALLOC_FAILED; 5706 goto err; 5707 } 5708 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5709 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5710 } 5711 5712 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5713 5714 /* Base iIDMA settings on HBA port speed. */ 5715 fcport->fp_speed = ha->link_data_rate; 5716 } 5717 5718 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5719 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5720 break; 5721 5722 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5723 if ((qla_dual_mode_enabled(vha) || 5724 qla_ini_mode_enabled(vha)) && 5725 atomic_read(&fcport->state) == FCS_ONLINE) { 5726 qla2x00_mark_device_lost(vha, fcport, 5727 ql2xplogiabsentdevice); 5728 if (fcport->loop_id != FC_NO_LOOP_ID && 5729 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5730 fcport->port_type != FCT_INITIATOR && 5731 fcport->port_type != FCT_BROADCAST) { 5732 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5733 "%s %d %8phC post del sess\n", 5734 __func__, __LINE__, 5735 fcport->port_name); 5736 5737 qlt_schedule_sess_for_deletion(fcport); 5738 continue; 5739 } 5740 } 5741 } 5742 5743 if (fcport->scan_state == QLA_FCPORT_FOUND) 5744 qla24xx_fcport_handle_login(vha, fcport); 5745 } 5746 5747 qla2x00_free_fcport(new_fcport); 5748 5749 return rval; 5750 5751 err: 5752 ql_dbg(ql_dbg_disc, vha, 0x2098, 5753 "Configure local loop error exit: rval=%x.\n", rval); 5754 return rval; 5755 } 5756 5757 static void 5758 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5759 { 5760 int rval; 5761 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5762 struct qla_hw_data *ha = vha->hw; 5763 5764 if (!IS_IIDMA_CAPABLE(ha)) 5765 return; 5766 5767 if (atomic_read(&fcport->state) != FCS_ONLINE) 5768 return; 5769 5770 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5771 fcport->fp_speed > ha->link_data_rate || 5772 !ha->flags.gpsc_supported) 5773 return; 5774 5775 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5776 mb); 5777 if (rval != QLA_SUCCESS) { 5778 ql_dbg(ql_dbg_disc, vha, 0x2004, 5779 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5780 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5781 } else { 5782 ql_dbg(ql_dbg_disc, vha, 0x2005, 5783 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5784 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5785 fcport->fp_speed, fcport->port_name); 5786 } 5787 } 5788 5789 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5790 { 5791 qla2x00_iidma_fcport(vha, fcport); 5792 qla24xx_update_fcport_fcp_prio(vha, fcport); 5793 } 5794 5795 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5796 { 5797 struct qla_work_evt *e; 5798 5799 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5800 if (!e) 5801 return QLA_FUNCTION_FAILED; 5802 5803 e->u.fcport.fcport = fcport; 5804 return qla2x00_post_work(vha, e); 5805 } 5806 5807 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5808 static void 5809 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5810 { 5811 struct fc_rport_identifiers rport_ids; 5812 struct fc_rport *rport; 5813 unsigned long flags; 5814 5815 if (atomic_read(&fcport->state) == FCS_ONLINE) 5816 return; 5817 5818 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5819 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5820 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5821 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5822 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5823 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5824 if (!rport) { 5825 ql_log(ql_log_warn, vha, 0x2006, 5826 "Unable to allocate fc remote port.\n"); 5827 return; 5828 } 5829 5830 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5831 *((fc_port_t **)rport->dd_data) = fcport; 5832 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5833 fcport->dev_loss_tmo = rport->dev_loss_tmo; 5834 5835 rport->supported_classes = fcport->supported_classes; 5836 5837 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 5838 if (fcport->port_type == FCT_INITIATOR) 5839 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 5840 if (fcport->port_type == FCT_TARGET) 5841 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 5842 if (fcport->port_type & FCT_NVME_INITIATOR) 5843 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 5844 if (fcport->port_type & FCT_NVME_TARGET) 5845 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 5846 if (fcport->port_type & FCT_NVME_DISCOVERY) 5847 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 5848 5849 fc_remote_port_rolechg(rport, rport_ids.roles); 5850 5851 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5852 "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n", 5853 __func__, fcport->port_name, vha->host_no, 5854 rport->scsi_target_id, rport, 5855 (fcport->port_type == FCT_TARGET) ? "tgt" : 5856 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5857 } 5858 5859 /* 5860 * qla2x00_update_fcport 5861 * Updates device on list. 5862 * 5863 * Input: 5864 * ha = adapter block pointer. 5865 * fcport = port structure pointer. 5866 * 5867 * Return: 5868 * 0 - Success 5869 * BIT_0 - error 5870 * 5871 * Context: 5872 * Kernel context. 5873 */ 5874 void 5875 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5876 { 5877 if (IS_SW_RESV_ADDR(fcport->d_id)) 5878 return; 5879 5880 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5881 __func__, fcport->port_name); 5882 5883 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT); 5884 fcport->login_retry = vha->hw->login_retry_count; 5885 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5886 fcport->deleted = 0; 5887 if (vha->hw->current_topology == ISP_CFG_NL) 5888 fcport->logout_on_delete = 0; 5889 else 5890 fcport->logout_on_delete = 1; 5891 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5892 5893 if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) { 5894 fcport->tgt_short_link_down_cnt++; 5895 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5896 } 5897 5898 switch (vha->hw->current_topology) { 5899 case ISP_CFG_N: 5900 case ISP_CFG_NL: 5901 fcport->keep_nport_handle = 1; 5902 break; 5903 default: 5904 break; 5905 } 5906 5907 qla2x00_iidma_fcport(vha, fcport); 5908 5909 qla2x00_dfs_create_rport(vha, fcport); 5910 5911 qla24xx_update_fcport_fcp_prio(vha, fcport); 5912 5913 switch (vha->host->active_mode) { 5914 case MODE_INITIATOR: 5915 qla2x00_reg_remote_port(vha, fcport); 5916 break; 5917 case MODE_TARGET: 5918 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5919 !vha->vha_tgt.qla_tgt->tgt_stopped) 5920 qlt_fc_port_added(vha, fcport); 5921 break; 5922 case MODE_DUAL: 5923 qla2x00_reg_remote_port(vha, fcport); 5924 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5925 !vha->vha_tgt.qla_tgt->tgt_stopped) 5926 qlt_fc_port_added(vha, fcport); 5927 break; 5928 default: 5929 break; 5930 } 5931 5932 if (NVME_TARGET(vha->hw, fcport)) 5933 qla_nvme_register_remote(vha, fcport); 5934 5935 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5936 5937 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5938 if (fcport->id_changed) { 5939 fcport->id_changed = 0; 5940 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5941 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5942 __func__, __LINE__, fcport->port_name, 5943 vha->fcport_count); 5944 qla24xx_post_gfpnid_work(vha, fcport); 5945 } else { 5946 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5947 "%s %d %8phC post gpsc fcp_cnt %d\n", 5948 __func__, __LINE__, fcport->port_name, 5949 vha->fcport_count); 5950 qla24xx_post_gpsc_work(vha, fcport); 5951 } 5952 } 5953 5954 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5955 } 5956 5957 void qla_register_fcport_fn(struct work_struct *work) 5958 { 5959 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5960 u32 rscn_gen = fcport->rscn_gen; 5961 u16 data[2]; 5962 5963 if (IS_SW_RESV_ADDR(fcport->d_id)) 5964 return; 5965 5966 qla2x00_update_fcport(fcport->vha, fcport); 5967 5968 ql_dbg(ql_dbg_disc, fcport->vha, 0x911e, 5969 "%s rscn gen %d/%d next DS %d\n", __func__, 5970 rscn_gen, fcport->rscn_gen, fcport->next_disc_state); 5971 5972 if (rscn_gen != fcport->rscn_gen) { 5973 /* RSCN(s) came in while registration */ 5974 switch (fcport->next_disc_state) { 5975 case DSC_DELETE_PEND: 5976 qlt_schedule_sess_for_deletion(fcport); 5977 break; 5978 case DSC_ADISC: 5979 data[0] = data[1] = 0; 5980 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5981 data); 5982 break; 5983 default: 5984 break; 5985 } 5986 } 5987 } 5988 5989 /* 5990 * qla2x00_configure_fabric 5991 * Setup SNS devices with loop ID's. 5992 * 5993 * Input: 5994 * ha = adapter block pointer. 5995 * 5996 * Returns: 5997 * 0 = success. 5998 * BIT_0 = error 5999 */ 6000 static int 6001 qla2x00_configure_fabric(scsi_qla_host_t *vha) 6002 { 6003 int rval; 6004 fc_port_t *fcport; 6005 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6006 uint16_t loop_id; 6007 LIST_HEAD(new_fcports); 6008 struct qla_hw_data *ha = vha->hw; 6009 int discovery_gen; 6010 6011 /* If FL port exists, then SNS is present */ 6012 if (IS_FWI2_CAPABLE(ha)) 6013 loop_id = NPH_F_PORT; 6014 else 6015 loop_id = SNS_FL_PORT; 6016 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 6017 if (rval != QLA_SUCCESS) { 6018 ql_dbg(ql_dbg_disc, vha, 0x20a0, 6019 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 6020 6021 vha->device_flags &= ~SWITCH_FOUND; 6022 return (QLA_SUCCESS); 6023 } 6024 vha->device_flags |= SWITCH_FOUND; 6025 6026 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0); 6027 if (rval != QLA_SUCCESS) 6028 ql_dbg(ql_dbg_disc, vha, 0x20ff, 6029 "Failed to get Fabric Port Name\n"); 6030 6031 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 6032 rval = qla2x00_send_change_request(vha, 0x3, 0); 6033 if (rval != QLA_SUCCESS) 6034 ql_log(ql_log_warn, vha, 0x121, 6035 "Failed to enable receiving of RSCN requests: 0x%x.\n", 6036 rval); 6037 } 6038 6039 do { 6040 qla2x00_mgmt_svr_login(vha); 6041 6042 /* Ensure we are logged into the SNS. */ 6043 loop_id = NPH_SNS_LID(ha); 6044 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 6045 0xfc, mb, BIT_1|BIT_0); 6046 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 6047 ql_dbg(ql_dbg_disc, vha, 0x20a1, 6048 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 6049 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 6050 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6051 return rval; 6052 } 6053 6054 /* FDMI support. */ 6055 if (ql2xfdmienable && 6056 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 6057 qla2x00_fdmi_register(vha); 6058 6059 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 6060 if (qla2x00_rft_id(vha)) { 6061 /* EMPTY */ 6062 ql_dbg(ql_dbg_disc, vha, 0x20a2, 6063 "Register FC-4 TYPE failed.\n"); 6064 if (test_bit(LOOP_RESYNC_NEEDED, 6065 &vha->dpc_flags)) 6066 break; 6067 } 6068 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 6069 /* EMPTY */ 6070 ql_dbg(ql_dbg_disc, vha, 0x209a, 6071 "Register FC-4 Features failed.\n"); 6072 if (test_bit(LOOP_RESYNC_NEEDED, 6073 &vha->dpc_flags)) 6074 break; 6075 } 6076 if (vha->flags.nvme_enabled) { 6077 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 6078 ql_dbg(ql_dbg_disc, vha, 0x2049, 6079 "Register NVME FC Type Features failed.\n"); 6080 } 6081 } 6082 if (qla2x00_rnn_id(vha)) { 6083 /* EMPTY */ 6084 ql_dbg(ql_dbg_disc, vha, 0x2104, 6085 "Register Node Name failed.\n"); 6086 if (test_bit(LOOP_RESYNC_NEEDED, 6087 &vha->dpc_flags)) 6088 break; 6089 } else if (qla2x00_rsnn_nn(vha)) { 6090 /* EMPTY */ 6091 ql_dbg(ql_dbg_disc, vha, 0x209b, 6092 "Register Symbolic Node Name failed.\n"); 6093 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6094 break; 6095 } 6096 } 6097 6098 6099 /* Mark the time right before querying FW for connected ports. 6100 * This process is long, asynchronous and by the time it's done, 6101 * collected information might not be accurate anymore. E.g. 6102 * disconnected port might have re-connected and a brand new 6103 * session has been created. In this case session's generation 6104 * will be newer than discovery_gen. */ 6105 qlt_do_generation_tick(vha, &discovery_gen); 6106 6107 if (USE_ASYNC_SCAN(ha)) { 6108 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 6109 NULL); 6110 if (rval) 6111 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6112 } else { 6113 list_for_each_entry(fcport, &vha->vp_fcports, list) 6114 fcport->scan_state = QLA_FCPORT_SCAN; 6115 6116 rval = qla2x00_find_all_fabric_devs(vha); 6117 } 6118 if (rval != QLA_SUCCESS) 6119 break; 6120 } while (0); 6121 6122 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 6123 qla_nvme_register_hba(vha); 6124 6125 if (rval) 6126 ql_dbg(ql_dbg_disc, vha, 0x2068, 6127 "Configure fabric error exit rval=%d.\n", rval); 6128 6129 return (rval); 6130 } 6131 6132 /* 6133 * qla2x00_find_all_fabric_devs 6134 * 6135 * Input: 6136 * ha = adapter block pointer. 6137 * dev = database device entry pointer. 6138 * 6139 * Returns: 6140 * 0 = success. 6141 * 6142 * Context: 6143 * Kernel context. 6144 */ 6145 static int 6146 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 6147 { 6148 int rval; 6149 uint16_t loop_id; 6150 fc_port_t *fcport, *new_fcport; 6151 int found; 6152 6153 sw_info_t *swl; 6154 int swl_idx; 6155 int first_dev, last_dev; 6156 port_id_t wrap = {}, nxt_d_id; 6157 struct qla_hw_data *ha = vha->hw; 6158 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6159 unsigned long flags; 6160 6161 rval = QLA_SUCCESS; 6162 6163 /* Try GID_PT to get device list, else GAN. */ 6164 if (!ha->swl) 6165 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 6166 GFP_KERNEL); 6167 swl = ha->swl; 6168 if (!swl) { 6169 /*EMPTY*/ 6170 ql_dbg(ql_dbg_disc, vha, 0x209c, 6171 "GID_PT allocations failed, fallback on GA_NXT.\n"); 6172 } else { 6173 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 6174 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 6175 swl = NULL; 6176 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6177 return rval; 6178 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 6179 swl = NULL; 6180 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6181 return rval; 6182 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 6183 swl = NULL; 6184 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6185 return rval; 6186 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 6187 swl = NULL; 6188 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6189 return rval; 6190 } 6191 6192 /* If other queries succeeded probe for FC-4 type */ 6193 if (swl) { 6194 qla2x00_gff_id(vha, swl); 6195 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6196 return rval; 6197 } 6198 } 6199 swl_idx = 0; 6200 6201 /* Allocate temporary fcport for any new fcports discovered. */ 6202 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6203 if (new_fcport == NULL) { 6204 ql_log(ql_log_warn, vha, 0x209d, 6205 "Failed to allocate memory for fcport.\n"); 6206 return (QLA_MEMORY_ALLOC_FAILED); 6207 } 6208 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6209 /* Set start port ID scan at adapter ID. */ 6210 first_dev = 1; 6211 last_dev = 0; 6212 6213 /* Starting free loop ID. */ 6214 loop_id = ha->min_external_loopid; 6215 for (; loop_id <= ha->max_loop_id; loop_id++) { 6216 if (qla2x00_is_reserved_id(vha, loop_id)) 6217 continue; 6218 6219 if (ha->current_topology == ISP_CFG_FL && 6220 (atomic_read(&vha->loop_down_timer) || 6221 LOOP_TRANSITION(vha))) { 6222 atomic_set(&vha->loop_down_timer, 0); 6223 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6224 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 6225 break; 6226 } 6227 6228 if (swl != NULL) { 6229 if (last_dev) { 6230 wrap.b24 = new_fcport->d_id.b24; 6231 } else { 6232 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 6233 memcpy(new_fcport->node_name, 6234 swl[swl_idx].node_name, WWN_SIZE); 6235 memcpy(new_fcport->port_name, 6236 swl[swl_idx].port_name, WWN_SIZE); 6237 memcpy(new_fcport->fabric_port_name, 6238 swl[swl_idx].fabric_port_name, WWN_SIZE); 6239 new_fcport->fp_speed = swl[swl_idx].fp_speed; 6240 new_fcport->fc4_type = swl[swl_idx].fc4_type; 6241 6242 new_fcport->nvme_flag = 0; 6243 if (vha->flags.nvme_enabled && 6244 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 6245 ql_log(ql_log_info, vha, 0x2131, 6246 "FOUND: NVME port %8phC as FC Type 28h\n", 6247 new_fcport->port_name); 6248 } 6249 6250 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 6251 last_dev = 1; 6252 } 6253 swl_idx++; 6254 } 6255 } else { 6256 /* Send GA_NXT to the switch */ 6257 rval = qla2x00_ga_nxt(vha, new_fcport); 6258 if (rval != QLA_SUCCESS) { 6259 ql_log(ql_log_warn, vha, 0x209e, 6260 "SNS scan failed -- assuming " 6261 "zero-entry result.\n"); 6262 rval = QLA_SUCCESS; 6263 break; 6264 } 6265 } 6266 6267 /* If wrap on switch device list, exit. */ 6268 if (first_dev) { 6269 wrap.b24 = new_fcport->d_id.b24; 6270 first_dev = 0; 6271 } else if (new_fcport->d_id.b24 == wrap.b24) { 6272 ql_dbg(ql_dbg_disc, vha, 0x209f, 6273 "Device wrap (%02x%02x%02x).\n", 6274 new_fcport->d_id.b.domain, 6275 new_fcport->d_id.b.area, 6276 new_fcport->d_id.b.al_pa); 6277 break; 6278 } 6279 6280 /* Bypass if same physical adapter. */ 6281 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 6282 continue; 6283 6284 /* Bypass virtual ports of the same host. */ 6285 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 6286 continue; 6287 6288 /* Bypass if same domain and area of adapter. */ 6289 if (((new_fcport->d_id.b24 & 0xffff00) == 6290 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 6291 ISP_CFG_FL) 6292 continue; 6293 6294 /* Bypass reserved domain fields. */ 6295 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 6296 continue; 6297 6298 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 6299 if (ql2xgffidenable && 6300 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 6301 new_fcport->fc4_type != 0)) 6302 continue; 6303 6304 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 6305 6306 /* Locate matching device in database. */ 6307 found = 0; 6308 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6309 if (memcmp(new_fcport->port_name, fcport->port_name, 6310 WWN_SIZE)) 6311 continue; 6312 6313 fcport->scan_state = QLA_FCPORT_FOUND; 6314 6315 found++; 6316 6317 /* Update port state. */ 6318 memcpy(fcport->fabric_port_name, 6319 new_fcport->fabric_port_name, WWN_SIZE); 6320 fcport->fp_speed = new_fcport->fp_speed; 6321 6322 /* 6323 * If address the same and state FCS_ONLINE 6324 * (or in target mode), nothing changed. 6325 */ 6326 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 6327 (atomic_read(&fcport->state) == FCS_ONLINE || 6328 (vha->host->active_mode == MODE_TARGET))) { 6329 break; 6330 } 6331 6332 if (fcport->login_retry == 0) 6333 fcport->login_retry = 6334 vha->hw->login_retry_count; 6335 /* 6336 * If device was not a fabric device before. 6337 */ 6338 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 6339 fcport->d_id.b24 = new_fcport->d_id.b24; 6340 qla2x00_clear_loop_id(fcport); 6341 fcport->flags |= (FCF_FABRIC_DEVICE | 6342 FCF_LOGIN_NEEDED); 6343 break; 6344 } 6345 6346 /* 6347 * Port ID changed or device was marked to be updated; 6348 * Log it out if still logged in and mark it for 6349 * relogin later. 6350 */ 6351 if (qla_tgt_mode_enabled(base_vha)) { 6352 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 6353 "port changed FC ID, %8phC" 6354 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 6355 fcport->port_name, 6356 fcport->d_id.b.domain, 6357 fcport->d_id.b.area, 6358 fcport->d_id.b.al_pa, 6359 fcport->loop_id, 6360 new_fcport->d_id.b.domain, 6361 new_fcport->d_id.b.area, 6362 new_fcport->d_id.b.al_pa); 6363 fcport->d_id.b24 = new_fcport->d_id.b24; 6364 break; 6365 } 6366 6367 fcport->d_id.b24 = new_fcport->d_id.b24; 6368 fcport->flags |= FCF_LOGIN_NEEDED; 6369 break; 6370 } 6371 6372 if (found && NVME_TARGET(vha->hw, fcport)) { 6373 if (fcport->disc_state == DSC_DELETE_PEND) { 6374 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 6375 vha->fcport_count--; 6376 fcport->login_succ = 0; 6377 } 6378 } 6379 6380 if (found) { 6381 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6382 continue; 6383 } 6384 /* If device was not in our fcports list, then add it. */ 6385 new_fcport->scan_state = QLA_FCPORT_FOUND; 6386 list_add_tail(&new_fcport->list, &vha->vp_fcports); 6387 6388 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6389 6390 6391 /* Allocate a new replacement fcport. */ 6392 nxt_d_id.b24 = new_fcport->d_id.b24; 6393 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6394 if (new_fcport == NULL) { 6395 ql_log(ql_log_warn, vha, 0xd032, 6396 "Memory allocation failed for fcport.\n"); 6397 return (QLA_MEMORY_ALLOC_FAILED); 6398 } 6399 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6400 new_fcport->d_id.b24 = nxt_d_id.b24; 6401 } 6402 6403 qla2x00_free_fcport(new_fcport); 6404 6405 /* 6406 * Logout all previous fabric dev marked lost, except FCP2 devices. 6407 */ 6408 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6409 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6410 break; 6411 6412 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 6413 continue; 6414 6415 if (fcport->scan_state == QLA_FCPORT_SCAN) { 6416 if ((qla_dual_mode_enabled(vha) || 6417 qla_ini_mode_enabled(vha)) && 6418 atomic_read(&fcport->state) == FCS_ONLINE) { 6419 qla2x00_mark_device_lost(vha, fcport, 6420 ql2xplogiabsentdevice); 6421 if (fcport->loop_id != FC_NO_LOOP_ID && 6422 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 6423 fcport->port_type != FCT_INITIATOR && 6424 fcport->port_type != FCT_BROADCAST) { 6425 ql_dbg(ql_dbg_disc, vha, 0x20f0, 6426 "%s %d %8phC post del sess\n", 6427 __func__, __LINE__, 6428 fcport->port_name); 6429 qlt_schedule_sess_for_deletion(fcport); 6430 continue; 6431 } 6432 } 6433 } 6434 6435 if (fcport->scan_state == QLA_FCPORT_FOUND && 6436 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 6437 qla24xx_fcport_handle_login(vha, fcport); 6438 } 6439 return (rval); 6440 } 6441 6442 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 6443 int 6444 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 6445 { 6446 int loop_id = FC_NO_LOOP_ID; 6447 int lid = NPH_MGMT_SERVER - vha->vp_idx; 6448 unsigned long flags; 6449 struct qla_hw_data *ha = vha->hw; 6450 6451 if (vha->vp_idx == 0) { 6452 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 6453 return NPH_MGMT_SERVER; 6454 } 6455 6456 /* pick id from high and work down to low */ 6457 spin_lock_irqsave(&ha->vport_slock, flags); 6458 for (; lid > 0; lid--) { 6459 if (!test_bit(lid, vha->hw->loop_id_map)) { 6460 set_bit(lid, vha->hw->loop_id_map); 6461 loop_id = lid; 6462 break; 6463 } 6464 } 6465 spin_unlock_irqrestore(&ha->vport_slock, flags); 6466 6467 return loop_id; 6468 } 6469 6470 /* 6471 * qla2x00_fabric_login 6472 * Issue fabric login command. 6473 * 6474 * Input: 6475 * ha = adapter block pointer. 6476 * device = pointer to FC device type structure. 6477 * 6478 * Returns: 6479 * 0 - Login successfully 6480 * 1 - Login failed 6481 * 2 - Initiator device 6482 * 3 - Fatal error 6483 */ 6484 int 6485 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 6486 uint16_t *next_loopid) 6487 { 6488 int rval; 6489 int retry; 6490 uint16_t tmp_loopid; 6491 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6492 struct qla_hw_data *ha = vha->hw; 6493 6494 retry = 0; 6495 tmp_loopid = 0; 6496 6497 for (;;) { 6498 ql_dbg(ql_dbg_disc, vha, 0x2000, 6499 "Trying Fabric Login w/loop id 0x%04x for port " 6500 "%02x%02x%02x.\n", 6501 fcport->loop_id, fcport->d_id.b.domain, 6502 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6503 6504 /* Login fcport on switch. */ 6505 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 6506 fcport->d_id.b.domain, fcport->d_id.b.area, 6507 fcport->d_id.b.al_pa, mb, BIT_0); 6508 if (rval != QLA_SUCCESS) { 6509 return rval; 6510 } 6511 if (mb[0] == MBS_PORT_ID_USED) { 6512 /* 6513 * Device has another loop ID. The firmware team 6514 * recommends the driver perform an implicit login with 6515 * the specified ID again. The ID we just used is save 6516 * here so we return with an ID that can be tried by 6517 * the next login. 6518 */ 6519 retry++; 6520 tmp_loopid = fcport->loop_id; 6521 fcport->loop_id = mb[1]; 6522 6523 ql_dbg(ql_dbg_disc, vha, 0x2001, 6524 "Fabric Login: port in use - next loop " 6525 "id=0x%04x, port id= %02x%02x%02x.\n", 6526 fcport->loop_id, fcport->d_id.b.domain, 6527 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6528 6529 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6530 /* 6531 * Login succeeded. 6532 */ 6533 if (retry) { 6534 /* A retry occurred before. */ 6535 *next_loopid = tmp_loopid; 6536 } else { 6537 /* 6538 * No retry occurred before. Just increment the 6539 * ID value for next login. 6540 */ 6541 *next_loopid = (fcport->loop_id + 1); 6542 } 6543 6544 if (mb[1] & BIT_0) { 6545 fcport->port_type = FCT_INITIATOR; 6546 } else { 6547 fcport->port_type = FCT_TARGET; 6548 if (mb[1] & BIT_1) { 6549 fcport->flags |= FCF_FCP2_DEVICE; 6550 } 6551 } 6552 6553 if (mb[10] & BIT_0) 6554 fcport->supported_classes |= FC_COS_CLASS2; 6555 if (mb[10] & BIT_1) 6556 fcport->supported_classes |= FC_COS_CLASS3; 6557 6558 if (IS_FWI2_CAPABLE(ha)) { 6559 if (mb[10] & BIT_7) 6560 fcport->flags |= 6561 FCF_CONF_COMP_SUPPORTED; 6562 } 6563 6564 rval = QLA_SUCCESS; 6565 break; 6566 } else if (mb[0] == MBS_LOOP_ID_USED) { 6567 /* 6568 * Loop ID already used, try next loop ID. 6569 */ 6570 fcport->loop_id++; 6571 rval = qla2x00_find_new_loop_id(vha, fcport); 6572 if (rval != QLA_SUCCESS) { 6573 /* Ran out of loop IDs to use */ 6574 break; 6575 } 6576 } else if (mb[0] == MBS_COMMAND_ERROR) { 6577 /* 6578 * Firmware possibly timed out during login. If NO 6579 * retries are left to do then the device is declared 6580 * dead. 6581 */ 6582 *next_loopid = fcport->loop_id; 6583 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6584 fcport->d_id.b.domain, fcport->d_id.b.area, 6585 fcport->d_id.b.al_pa); 6586 qla2x00_mark_device_lost(vha, fcport, 1); 6587 6588 rval = 1; 6589 break; 6590 } else { 6591 /* 6592 * unrecoverable / not handled error 6593 */ 6594 ql_dbg(ql_dbg_disc, vha, 0x2002, 6595 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6596 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6597 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6598 fcport->loop_id, jiffies); 6599 6600 *next_loopid = fcport->loop_id; 6601 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6602 fcport->d_id.b.domain, fcport->d_id.b.area, 6603 fcport->d_id.b.al_pa); 6604 qla2x00_clear_loop_id(fcport); 6605 fcport->login_retry = 0; 6606 6607 rval = 3; 6608 break; 6609 } 6610 } 6611 6612 return (rval); 6613 } 6614 6615 /* 6616 * qla2x00_local_device_login 6617 * Issue local device login command. 6618 * 6619 * Input: 6620 * ha = adapter block pointer. 6621 * loop_id = loop id of device to login to. 6622 * 6623 * Returns (Where's the #define!!!!): 6624 * 0 - Login successfully 6625 * 1 - Login failed 6626 * 3 - Fatal error 6627 */ 6628 int 6629 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6630 { 6631 int rval; 6632 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6633 6634 memset(mb, 0, sizeof(mb)); 6635 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6636 if (rval == QLA_SUCCESS) { 6637 /* Interrogate mailbox registers for any errors */ 6638 if (mb[0] == MBS_COMMAND_ERROR) 6639 rval = 1; 6640 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6641 /* device not in PCB table */ 6642 rval = 3; 6643 } 6644 6645 return (rval); 6646 } 6647 6648 /* 6649 * qla2x00_loop_resync 6650 * Resync with fibre channel devices. 6651 * 6652 * Input: 6653 * ha = adapter block pointer. 6654 * 6655 * Returns: 6656 * 0 = success 6657 */ 6658 int 6659 qla2x00_loop_resync(scsi_qla_host_t *vha) 6660 { 6661 int rval = QLA_SUCCESS; 6662 uint32_t wait_time; 6663 6664 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6665 if (vha->flags.online) { 6666 if (!(rval = qla2x00_fw_ready(vha))) { 6667 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6668 wait_time = 256; 6669 do { 6670 if (!IS_QLAFX00(vha->hw)) { 6671 /* 6672 * Issue a marker after FW becomes 6673 * ready. 6674 */ 6675 qla2x00_marker(vha, vha->hw->base_qpair, 6676 0, 0, MK_SYNC_ALL); 6677 vha->marker_needed = 0; 6678 } 6679 6680 /* Remap devices on Loop. */ 6681 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6682 6683 if (IS_QLAFX00(vha->hw)) 6684 qlafx00_configure_devices(vha); 6685 else 6686 qla2x00_configure_loop(vha); 6687 6688 wait_time--; 6689 } while (!atomic_read(&vha->loop_down_timer) && 6690 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6691 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6692 &vha->dpc_flags))); 6693 } 6694 } 6695 6696 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6697 return (QLA_FUNCTION_FAILED); 6698 6699 if (rval) 6700 ql_dbg(ql_dbg_disc, vha, 0x206c, 6701 "%s *** FAILED ***.\n", __func__); 6702 6703 return (rval); 6704 } 6705 6706 /* 6707 * qla2x00_perform_loop_resync 6708 * Description: This function will set the appropriate flags and call 6709 * qla2x00_loop_resync. If successful loop will be resynced 6710 * Arguments : scsi_qla_host_t pointer 6711 * returm : Success or Failure 6712 */ 6713 6714 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6715 { 6716 int32_t rval = 0; 6717 6718 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6719 /*Configure the flags so that resync happens properly*/ 6720 atomic_set(&ha->loop_down_timer, 0); 6721 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6722 atomic_set(&ha->loop_state, LOOP_UP); 6723 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6724 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6725 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6726 6727 rval = qla2x00_loop_resync(ha); 6728 } else 6729 atomic_set(&ha->loop_state, LOOP_DEAD); 6730 6731 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6732 } 6733 6734 return rval; 6735 } 6736 6737 /* Assumes idc_lock always held on entry */ 6738 void 6739 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6740 { 6741 struct qla_hw_data *ha = vha->hw; 6742 uint32_t drv_presence, drv_presence_mask; 6743 uint32_t dev_part_info1, dev_part_info2, class_type; 6744 uint32_t class_type_mask = 0x3; 6745 uint16_t fcoe_other_function = 0xffff, i; 6746 6747 if (IS_QLA8044(ha)) { 6748 drv_presence = qla8044_rd_direct(vha, 6749 QLA8044_CRB_DRV_ACTIVE_INDEX); 6750 dev_part_info1 = qla8044_rd_direct(vha, 6751 QLA8044_CRB_DEV_PART_INFO_INDEX); 6752 dev_part_info2 = qla8044_rd_direct(vha, 6753 QLA8044_CRB_DEV_PART_INFO2); 6754 } else { 6755 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6756 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6757 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6758 } 6759 for (i = 0; i < 8; i++) { 6760 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6761 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6762 (i != ha->portnum)) { 6763 fcoe_other_function = i; 6764 break; 6765 } 6766 } 6767 if (fcoe_other_function == 0xffff) { 6768 for (i = 0; i < 8; i++) { 6769 class_type = ((dev_part_info2 >> (i * 4)) & 6770 class_type_mask); 6771 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6772 ((i + 8) != ha->portnum)) { 6773 fcoe_other_function = i + 8; 6774 break; 6775 } 6776 } 6777 } 6778 /* 6779 * Prepare drv-presence mask based on fcoe functions present. 6780 * However consider only valid physical fcoe function numbers (0-15). 6781 */ 6782 drv_presence_mask = ~((1 << (ha->portnum)) | 6783 ((fcoe_other_function == 0xffff) ? 6784 0 : (1 << (fcoe_other_function)))); 6785 6786 /* We are the reset owner iff: 6787 * - No other protocol drivers present. 6788 * - This is the lowest among fcoe functions. */ 6789 if (!(drv_presence & drv_presence_mask) && 6790 (ha->portnum < fcoe_other_function)) { 6791 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6792 "This host is Reset owner.\n"); 6793 ha->flags.nic_core_reset_owner = 1; 6794 } 6795 } 6796 6797 static int 6798 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6799 { 6800 int rval = QLA_SUCCESS; 6801 struct qla_hw_data *ha = vha->hw; 6802 uint32_t drv_ack; 6803 6804 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6805 if (rval == QLA_SUCCESS) { 6806 drv_ack |= (1 << ha->portnum); 6807 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6808 } 6809 6810 return rval; 6811 } 6812 6813 static int 6814 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6815 { 6816 int rval = QLA_SUCCESS; 6817 struct qla_hw_data *ha = vha->hw; 6818 uint32_t drv_ack; 6819 6820 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6821 if (rval == QLA_SUCCESS) { 6822 drv_ack &= ~(1 << ha->portnum); 6823 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6824 } 6825 6826 return rval; 6827 } 6828 6829 /* Assumes idc-lock always held on entry */ 6830 void 6831 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6832 { 6833 struct qla_hw_data *ha = vha->hw; 6834 uint32_t idc_audit_reg = 0, duration_secs = 0; 6835 6836 switch (audit_type) { 6837 case IDC_AUDIT_TIMESTAMP: 6838 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6839 idc_audit_reg = (ha->portnum) | 6840 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6841 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6842 break; 6843 6844 case IDC_AUDIT_COMPLETION: 6845 duration_secs = ((jiffies_to_msecs(jiffies) - 6846 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6847 idc_audit_reg = (ha->portnum) | 6848 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6849 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6850 break; 6851 6852 default: 6853 ql_log(ql_log_warn, vha, 0xb078, 6854 "Invalid audit type specified.\n"); 6855 break; 6856 } 6857 } 6858 6859 /* Assumes idc_lock always held on entry */ 6860 static int 6861 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6862 { 6863 struct qla_hw_data *ha = vha->hw; 6864 uint32_t idc_control, dev_state; 6865 6866 __qla83xx_get_idc_control(vha, &idc_control); 6867 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6868 ql_log(ql_log_info, vha, 0xb080, 6869 "NIC Core reset has been disabled. idc-control=0x%x\n", 6870 idc_control); 6871 return QLA_FUNCTION_FAILED; 6872 } 6873 6874 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6875 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6876 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6877 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6878 QLA8XXX_DEV_NEED_RESET); 6879 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6880 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6881 } else { 6882 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", 6883 qdev_state(dev_state)); 6884 6885 /* SV: XXX: Is timeout required here? */ 6886 /* Wait for IDC state change READY -> NEED_RESET */ 6887 while (dev_state == QLA8XXX_DEV_READY) { 6888 qla83xx_idc_unlock(vha, 0); 6889 msleep(200); 6890 qla83xx_idc_lock(vha, 0); 6891 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6892 } 6893 } 6894 6895 /* Send IDC ack by writing to drv-ack register */ 6896 __qla83xx_set_drv_ack(vha); 6897 6898 return QLA_SUCCESS; 6899 } 6900 6901 int 6902 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6903 { 6904 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6905 } 6906 6907 int 6908 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6909 { 6910 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6911 } 6912 6913 static int 6914 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6915 { 6916 uint32_t drv_presence = 0; 6917 struct qla_hw_data *ha = vha->hw; 6918 6919 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6920 if (drv_presence & (1 << ha->portnum)) 6921 return QLA_SUCCESS; 6922 else 6923 return QLA_TEST_FAILED; 6924 } 6925 6926 int 6927 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6928 { 6929 int rval = QLA_SUCCESS; 6930 struct qla_hw_data *ha = vha->hw; 6931 6932 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6933 "Entered %s().\n", __func__); 6934 6935 if (vha->device_flags & DFLG_DEV_FAILED) { 6936 ql_log(ql_log_warn, vha, 0xb059, 6937 "Device in unrecoverable FAILED state.\n"); 6938 return QLA_FUNCTION_FAILED; 6939 } 6940 6941 qla83xx_idc_lock(vha, 0); 6942 6943 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6944 ql_log(ql_log_warn, vha, 0xb05a, 6945 "Function=0x%x has been removed from IDC participation.\n", 6946 ha->portnum); 6947 rval = QLA_FUNCTION_FAILED; 6948 goto exit; 6949 } 6950 6951 qla83xx_reset_ownership(vha); 6952 6953 rval = qla83xx_initiating_reset(vha); 6954 6955 /* 6956 * Perform reset if we are the reset-owner, 6957 * else wait till IDC state changes to READY/FAILED. 6958 */ 6959 if (rval == QLA_SUCCESS) { 6960 rval = qla83xx_idc_state_handler(vha); 6961 6962 if (rval == QLA_SUCCESS) 6963 ha->flags.nic_core_hung = 0; 6964 __qla83xx_clear_drv_ack(vha); 6965 } 6966 6967 exit: 6968 qla83xx_idc_unlock(vha, 0); 6969 6970 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6971 6972 return rval; 6973 } 6974 6975 int 6976 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6977 { 6978 struct qla_hw_data *ha = vha->hw; 6979 int rval = QLA_FUNCTION_FAILED; 6980 6981 if (!IS_MCTP_CAPABLE(ha)) { 6982 /* This message can be removed from the final version */ 6983 ql_log(ql_log_info, vha, 0x506d, 6984 "This board is not MCTP capable\n"); 6985 return rval; 6986 } 6987 6988 if (!ha->mctp_dump) { 6989 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6990 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6991 6992 if (!ha->mctp_dump) { 6993 ql_log(ql_log_warn, vha, 0x506e, 6994 "Failed to allocate memory for mctp dump\n"); 6995 return rval; 6996 } 6997 } 6998 6999 #define MCTP_DUMP_STR_ADDR 0x00000000 7000 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 7001 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 7002 if (rval != QLA_SUCCESS) { 7003 ql_log(ql_log_warn, vha, 0x506f, 7004 "Failed to capture mctp dump\n"); 7005 } else { 7006 ql_log(ql_log_info, vha, 0x5070, 7007 "Mctp dump capture for host (%ld/%p).\n", 7008 vha->host_no, ha->mctp_dump); 7009 ha->mctp_dumped = 1; 7010 } 7011 7012 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 7013 ha->flags.nic_core_reset_hdlr_active = 1; 7014 rval = qla83xx_restart_nic_firmware(vha); 7015 if (rval) 7016 /* NIC Core reset failed. */ 7017 ql_log(ql_log_warn, vha, 0x5071, 7018 "Failed to restart nic firmware\n"); 7019 else 7020 ql_dbg(ql_dbg_p3p, vha, 0xb084, 7021 "Restarted NIC firmware successfully.\n"); 7022 ha->flags.nic_core_reset_hdlr_active = 0; 7023 } 7024 7025 return rval; 7026 7027 } 7028 7029 /* 7030 * qla2x00_quiesce_io 7031 * Description: This function will block the new I/Os 7032 * Its not aborting any I/Os as context 7033 * is not destroyed during quiescence 7034 * Arguments: scsi_qla_host_t 7035 * return : void 7036 */ 7037 void 7038 qla2x00_quiesce_io(scsi_qla_host_t *vha) 7039 { 7040 struct qla_hw_data *ha = vha->hw; 7041 struct scsi_qla_host *vp, *tvp; 7042 unsigned long flags; 7043 7044 ql_dbg(ql_dbg_dpc, vha, 0x401d, 7045 "Quiescing I/O - ha=%p.\n", ha); 7046 7047 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 7048 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7049 atomic_set(&vha->loop_state, LOOP_DOWN); 7050 qla2x00_mark_all_devices_lost(vha); 7051 7052 spin_lock_irqsave(&ha->vport_slock, flags); 7053 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7054 atomic_inc(&vp->vref_count); 7055 spin_unlock_irqrestore(&ha->vport_slock, flags); 7056 7057 qla2x00_mark_all_devices_lost(vp); 7058 7059 spin_lock_irqsave(&ha->vport_slock, flags); 7060 atomic_dec(&vp->vref_count); 7061 } 7062 spin_unlock_irqrestore(&ha->vport_slock, flags); 7063 } else { 7064 if (!atomic_read(&vha->loop_down_timer)) 7065 atomic_set(&vha->loop_down_timer, 7066 LOOP_DOWN_TIME); 7067 } 7068 /* Wait for pending cmds to complete */ 7069 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 7070 != QLA_SUCCESS); 7071 } 7072 7073 void 7074 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 7075 { 7076 struct qla_hw_data *ha = vha->hw; 7077 struct scsi_qla_host *vp, *tvp; 7078 unsigned long flags; 7079 fc_port_t *fcport; 7080 u16 i; 7081 7082 /* For ISP82XX, driver waits for completion of the commands. 7083 * online flag should be set. 7084 */ 7085 if (!(IS_P3P_TYPE(ha))) 7086 vha->flags.online = 0; 7087 ha->flags.chip_reset_done = 0; 7088 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 7089 vha->qla_stats.total_isp_aborts++; 7090 7091 ql_log(ql_log_info, vha, 0x00af, 7092 "Performing ISP error recovery - ha=%p.\n", ha); 7093 7094 ha->flags.purge_mbox = 1; 7095 /* For ISP82XX, reset_chip is just disabling interrupts. 7096 * Driver waits for the completion of the commands. 7097 * the interrupts need to be enabled. 7098 */ 7099 if (!(IS_P3P_TYPE(ha))) 7100 ha->isp_ops->reset_chip(vha); 7101 7102 ha->link_data_rate = PORT_SPEED_UNKNOWN; 7103 SAVE_TOPO(ha); 7104 ha->flags.rida_fmt2 = 0; 7105 ha->flags.n2n_ae = 0; 7106 ha->flags.lip_ae = 0; 7107 ha->current_topology = 0; 7108 QLA_FW_STOPPED(ha); 7109 ha->flags.fw_init_done = 0; 7110 ha->chip_reset++; 7111 ha->base_qpair->chip_reset = ha->chip_reset; 7112 ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0; 7113 ha->base_qpair->prev_completion_cnt = 0; 7114 for (i = 0; i < ha->max_qpairs; i++) { 7115 if (ha->queue_pair_map[i]) { 7116 ha->queue_pair_map[i]->chip_reset = 7117 ha->base_qpair->chip_reset; 7118 ha->queue_pair_map[i]->cmd_cnt = 7119 ha->queue_pair_map[i]->cmd_completion_cnt = 0; 7120 ha->base_qpair->prev_completion_cnt = 0; 7121 } 7122 } 7123 7124 /* purge MBox commands */ 7125 if (atomic_read(&ha->num_pend_mbx_stage3)) { 7126 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 7127 complete(&ha->mbx_intr_comp); 7128 } 7129 7130 i = 0; 7131 while (atomic_read(&ha->num_pend_mbx_stage3) || 7132 atomic_read(&ha->num_pend_mbx_stage2) || 7133 atomic_read(&ha->num_pend_mbx_stage1)) { 7134 msleep(20); 7135 i++; 7136 if (i > 50) 7137 break; 7138 } 7139 ha->flags.purge_mbox = 0; 7140 7141 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 7142 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7143 atomic_set(&vha->loop_state, LOOP_DOWN); 7144 qla2x00_mark_all_devices_lost(vha); 7145 7146 spin_lock_irqsave(&ha->vport_slock, flags); 7147 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7148 atomic_inc(&vp->vref_count); 7149 spin_unlock_irqrestore(&ha->vport_slock, flags); 7150 7151 qla2x00_mark_all_devices_lost(vp); 7152 7153 spin_lock_irqsave(&ha->vport_slock, flags); 7154 atomic_dec(&vp->vref_count); 7155 } 7156 spin_unlock_irqrestore(&ha->vport_slock, flags); 7157 } else { 7158 if (!atomic_read(&vha->loop_down_timer)) 7159 atomic_set(&vha->loop_down_timer, 7160 LOOP_DOWN_TIME); 7161 } 7162 7163 /* Clear all async request states across all VPs. */ 7164 list_for_each_entry(fcport, &vha->vp_fcports, list) { 7165 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7166 fcport->scan_state = 0; 7167 } 7168 spin_lock_irqsave(&ha->vport_slock, flags); 7169 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7170 atomic_inc(&vp->vref_count); 7171 spin_unlock_irqrestore(&ha->vport_slock, flags); 7172 7173 list_for_each_entry(fcport, &vp->vp_fcports, list) 7174 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7175 7176 spin_lock_irqsave(&ha->vport_slock, flags); 7177 atomic_dec(&vp->vref_count); 7178 } 7179 spin_unlock_irqrestore(&ha->vport_slock, flags); 7180 7181 /* Make sure for ISP 82XX IO DMA is complete */ 7182 if (IS_P3P_TYPE(ha)) { 7183 qla82xx_chip_reset_cleanup(vha); 7184 ql_log(ql_log_info, vha, 0x00b4, 7185 "Done chip reset cleanup.\n"); 7186 7187 /* Done waiting for pending commands. Reset online flag */ 7188 vha->flags.online = 0; 7189 } 7190 7191 /* Requeue all commands in outstanding command list. */ 7192 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 7193 /* memory barrier */ 7194 wmb(); 7195 } 7196 7197 /* 7198 * qla2x00_abort_isp 7199 * Resets ISP and aborts all outstanding commands. 7200 * 7201 * Input: 7202 * ha = adapter block pointer. 7203 * 7204 * Returns: 7205 * 0 = success 7206 */ 7207 int 7208 qla2x00_abort_isp(scsi_qla_host_t *vha) 7209 { 7210 int rval; 7211 uint8_t status = 0; 7212 struct qla_hw_data *ha = vha->hw; 7213 struct scsi_qla_host *vp, *tvp; 7214 struct req_que *req = ha->req_q_map[0]; 7215 unsigned long flags; 7216 7217 if (vha->flags.online) { 7218 qla2x00_abort_isp_cleanup(vha); 7219 7220 vha->dport_status |= DPORT_DIAG_CHIP_RESET_IN_PROGRESS; 7221 vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS; 7222 7223 if (vha->hw->flags.port_isolated) 7224 return status; 7225 7226 if (qla2x00_isp_reg_stat(ha)) { 7227 ql_log(ql_log_info, vha, 0x803f, 7228 "ISP Abort - ISP reg disconnect, exiting.\n"); 7229 return status; 7230 } 7231 7232 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 7233 ha->flags.chip_reset_done = 1; 7234 vha->flags.online = 1; 7235 status = 0; 7236 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7237 return status; 7238 } 7239 7240 if (IS_QLA8031(ha)) { 7241 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 7242 "Clearing fcoe driver presence.\n"); 7243 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 7244 ql_dbg(ql_dbg_p3p, vha, 0xb073, 7245 "Error while clearing DRV-Presence.\n"); 7246 } 7247 7248 if (unlikely(pci_channel_offline(ha->pdev) && 7249 ha->flags.pci_channel_io_perm_failure)) { 7250 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7251 status = 0; 7252 return status; 7253 } 7254 7255 switch (vha->qlini_mode) { 7256 case QLA2XXX_INI_MODE_DISABLED: 7257 if (!qla_tgt_mode_enabled(vha)) 7258 return 0; 7259 break; 7260 case QLA2XXX_INI_MODE_DUAL: 7261 if (!qla_dual_mode_enabled(vha) && 7262 !qla_ini_mode_enabled(vha)) 7263 return 0; 7264 break; 7265 case QLA2XXX_INI_MODE_ENABLED: 7266 default: 7267 break; 7268 } 7269 7270 ha->isp_ops->get_flash_version(vha, req->ring); 7271 7272 if (qla2x00_isp_reg_stat(ha)) { 7273 ql_log(ql_log_info, vha, 0x803f, 7274 "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n"); 7275 return status; 7276 } 7277 ha->isp_ops->nvram_config(vha); 7278 7279 if (qla2x00_isp_reg_stat(ha)) { 7280 ql_log(ql_log_info, vha, 0x803f, 7281 "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n"); 7282 return status; 7283 } 7284 if (!qla2x00_restart_isp(vha)) { 7285 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7286 7287 if (!atomic_read(&vha->loop_down_timer)) { 7288 /* 7289 * Issue marker command only when we are going 7290 * to start the I/O . 7291 */ 7292 vha->marker_needed = 1; 7293 } 7294 7295 vha->flags.online = 1; 7296 7297 ha->isp_ops->enable_intrs(ha); 7298 7299 ha->isp_abort_cnt = 0; 7300 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7301 7302 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 7303 qla2x00_get_fw_version(vha); 7304 if (ha->fce) { 7305 ha->flags.fce_enabled = 1; 7306 memset(ha->fce, 0, 7307 fce_calc_size(ha->fce_bufs)); 7308 rval = qla2x00_enable_fce_trace(vha, 7309 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 7310 &ha->fce_bufs); 7311 if (rval) { 7312 ql_log(ql_log_warn, vha, 0x8033, 7313 "Unable to reinitialize FCE " 7314 "(%d).\n", rval); 7315 ha->flags.fce_enabled = 0; 7316 } 7317 } 7318 7319 if (ha->eft) { 7320 memset(ha->eft, 0, EFT_SIZE); 7321 rval = qla2x00_enable_eft_trace(vha, 7322 ha->eft_dma, EFT_NUM_BUFFERS); 7323 if (rval) { 7324 ql_log(ql_log_warn, vha, 0x8034, 7325 "Unable to reinitialize EFT " 7326 "(%d).\n", rval); 7327 } 7328 } 7329 } else { /* failed the ISP abort */ 7330 vha->flags.online = 1; 7331 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 7332 if (ha->isp_abort_cnt == 0) { 7333 ql_log(ql_log_fatal, vha, 0x8035, 7334 "ISP error recover failed - " 7335 "board disabled.\n"); 7336 /* 7337 * The next call disables the board 7338 * completely. 7339 */ 7340 qla2x00_abort_isp_cleanup(vha); 7341 vha->flags.online = 0; 7342 clear_bit(ISP_ABORT_RETRY, 7343 &vha->dpc_flags); 7344 status = 0; 7345 } else { /* schedule another ISP abort */ 7346 ha->isp_abort_cnt--; 7347 ql_dbg(ql_dbg_taskm, vha, 0x8020, 7348 "ISP abort - retry remaining %d.\n", 7349 ha->isp_abort_cnt); 7350 status = 1; 7351 } 7352 } else { 7353 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 7354 ql_dbg(ql_dbg_taskm, vha, 0x8021, 7355 "ISP error recovery - retrying (%d) " 7356 "more times.\n", ha->isp_abort_cnt); 7357 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7358 status = 1; 7359 } 7360 } 7361 7362 } 7363 7364 if (vha->hw->flags.port_isolated) { 7365 qla2x00_abort_isp_cleanup(vha); 7366 return status; 7367 } 7368 7369 if (!status) { 7370 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 7371 qla2x00_configure_hba(vha); 7372 spin_lock_irqsave(&ha->vport_slock, flags); 7373 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7374 if (vp->vp_idx) { 7375 atomic_inc(&vp->vref_count); 7376 spin_unlock_irqrestore(&ha->vport_slock, flags); 7377 7378 qla2x00_vp_abort_isp(vp); 7379 7380 spin_lock_irqsave(&ha->vport_slock, flags); 7381 atomic_dec(&vp->vref_count); 7382 } 7383 } 7384 spin_unlock_irqrestore(&ha->vport_slock, flags); 7385 7386 if (IS_QLA8031(ha)) { 7387 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 7388 "Setting back fcoe driver presence.\n"); 7389 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 7390 ql_dbg(ql_dbg_p3p, vha, 0xb074, 7391 "Error while setting DRV-Presence.\n"); 7392 } 7393 } else { 7394 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 7395 __func__); 7396 } 7397 7398 return(status); 7399 } 7400 7401 /* 7402 * qla2x00_restart_isp 7403 * restarts the ISP after a reset 7404 * 7405 * Input: 7406 * ha = adapter block pointer. 7407 * 7408 * Returns: 7409 * 0 = success 7410 */ 7411 static int 7412 qla2x00_restart_isp(scsi_qla_host_t *vha) 7413 { 7414 int status; 7415 struct qla_hw_data *ha = vha->hw; 7416 7417 /* If firmware needs to be loaded */ 7418 if (qla2x00_isp_firmware(vha)) { 7419 vha->flags.online = 0; 7420 status = ha->isp_ops->chip_diag(vha); 7421 if (status) 7422 return status; 7423 status = qla2x00_setup_chip(vha); 7424 if (status) 7425 return status; 7426 } 7427 7428 status = qla2x00_init_rings(vha); 7429 if (status) 7430 return status; 7431 7432 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7433 ha->flags.chip_reset_done = 1; 7434 7435 /* Initialize the queues in use */ 7436 qla25xx_init_queues(ha); 7437 7438 status = qla2x00_fw_ready(vha); 7439 if (status) { 7440 /* if no cable then assume it's good */ 7441 return vha->device_flags & DFLG_NO_CABLE ? 0 : status; 7442 } 7443 7444 /* Issue a marker after FW becomes ready. */ 7445 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7446 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7447 7448 return 0; 7449 } 7450 7451 static int 7452 qla25xx_init_queues(struct qla_hw_data *ha) 7453 { 7454 struct rsp_que *rsp = NULL; 7455 struct req_que *req = NULL; 7456 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7457 int ret = -1; 7458 int i; 7459 7460 for (i = 1; i < ha->max_rsp_queues; i++) { 7461 rsp = ha->rsp_q_map[i]; 7462 if (rsp && test_bit(i, ha->rsp_qid_map)) { 7463 rsp->options &= ~BIT_0; 7464 ret = qla25xx_init_rsp_que(base_vha, rsp); 7465 if (ret != QLA_SUCCESS) 7466 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 7467 "%s Rsp que: %d init failed.\n", 7468 __func__, rsp->id); 7469 else 7470 ql_dbg(ql_dbg_init, base_vha, 0x0100, 7471 "%s Rsp que: %d inited.\n", 7472 __func__, rsp->id); 7473 } 7474 } 7475 for (i = 1; i < ha->max_req_queues; i++) { 7476 req = ha->req_q_map[i]; 7477 if (req && test_bit(i, ha->req_qid_map)) { 7478 /* Clear outstanding commands array. */ 7479 req->options &= ~BIT_0; 7480 ret = qla25xx_init_req_que(base_vha, req); 7481 if (ret != QLA_SUCCESS) 7482 ql_dbg(ql_dbg_init, base_vha, 0x0101, 7483 "%s Req que: %d init failed.\n", 7484 __func__, req->id); 7485 else 7486 ql_dbg(ql_dbg_init, base_vha, 0x0102, 7487 "%s Req que: %d inited.\n", 7488 __func__, req->id); 7489 } 7490 } 7491 return ret; 7492 } 7493 7494 /* 7495 * qla2x00_reset_adapter 7496 * Reset adapter. 7497 * 7498 * Input: 7499 * ha = adapter block pointer. 7500 */ 7501 int 7502 qla2x00_reset_adapter(scsi_qla_host_t *vha) 7503 { 7504 unsigned long flags = 0; 7505 struct qla_hw_data *ha = vha->hw; 7506 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7507 7508 vha->flags.online = 0; 7509 ha->isp_ops->disable_intrs(ha); 7510 7511 spin_lock_irqsave(&ha->hardware_lock, flags); 7512 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 7513 rd_reg_word(®->hccr); /* PCI Posting. */ 7514 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 7515 rd_reg_word(®->hccr); /* PCI Posting. */ 7516 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7517 7518 return QLA_SUCCESS; 7519 } 7520 7521 int 7522 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7523 { 7524 unsigned long flags = 0; 7525 struct qla_hw_data *ha = vha->hw; 7526 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7527 7528 if (IS_P3P_TYPE(ha)) 7529 return QLA_SUCCESS; 7530 7531 vha->flags.online = 0; 7532 ha->isp_ops->disable_intrs(ha); 7533 7534 spin_lock_irqsave(&ha->hardware_lock, flags); 7535 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 7536 rd_reg_dword(®->hccr); 7537 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 7538 rd_reg_dword(®->hccr); 7539 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7540 7541 if (IS_NOPOLLING_TYPE(ha)) 7542 ha->isp_ops->enable_intrs(ha); 7543 7544 return QLA_SUCCESS; 7545 } 7546 7547 /* On sparc systems, obtain port and node WWN from firmware 7548 * properties. 7549 */ 7550 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7551 struct nvram_24xx *nv) 7552 { 7553 #ifdef CONFIG_SPARC 7554 struct qla_hw_data *ha = vha->hw; 7555 struct pci_dev *pdev = ha->pdev; 7556 struct device_node *dp = pci_device_to_OF_node(pdev); 7557 const u8 *val; 7558 int len; 7559 7560 val = of_get_property(dp, "port-wwn", &len); 7561 if (val && len >= WWN_SIZE) 7562 memcpy(nv->port_name, val, WWN_SIZE); 7563 7564 val = of_get_property(dp, "node-wwn", &len); 7565 if (val && len >= WWN_SIZE) 7566 memcpy(nv->node_name, val, WWN_SIZE); 7567 #endif 7568 } 7569 7570 int 7571 qla24xx_nvram_config(scsi_qla_host_t *vha) 7572 { 7573 int rval; 7574 struct init_cb_24xx *icb; 7575 struct nvram_24xx *nv; 7576 __le32 *dptr; 7577 uint8_t *dptr1, *dptr2; 7578 uint32_t chksum; 7579 uint16_t cnt; 7580 struct qla_hw_data *ha = vha->hw; 7581 7582 rval = QLA_SUCCESS; 7583 icb = (struct init_cb_24xx *)ha->init_cb; 7584 nv = ha->nvram; 7585 7586 /* Determine NVRAM starting address. */ 7587 if (ha->port_no == 0) { 7588 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7589 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7590 } else { 7591 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7592 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7593 } 7594 7595 ha->nvram_size = sizeof(*nv); 7596 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7597 7598 /* Get VPD data into cache */ 7599 ha->vpd = ha->nvram + VPD_OFFSET; 7600 ha->isp_ops->read_nvram(vha, ha->vpd, 7601 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7602 7603 /* Get NVRAM data into cache and calculate checksum. */ 7604 dptr = (__force __le32 *)nv; 7605 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7606 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7607 chksum += le32_to_cpu(*dptr); 7608 7609 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7610 "Contents of NVRAM\n"); 7611 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7612 nv, ha->nvram_size); 7613 7614 /* Bad NVRAM data, set defaults parameters. */ 7615 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7616 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7617 /* Reset NVRAM data. */ 7618 ql_log(ql_log_warn, vha, 0x006b, 7619 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7620 chksum, nv->id, nv->nvram_version); 7621 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7622 ql_log(ql_log_warn, vha, 0x006c, 7623 "Falling back to functioning (yet invalid -- WWPN) " 7624 "defaults.\n"); 7625 7626 /* 7627 * Set default initialization control block. 7628 */ 7629 memset(nv, 0, ha->nvram_size); 7630 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7631 nv->version = cpu_to_le16(ICB_VERSION); 7632 nv->frame_payload_size = cpu_to_le16(2048); 7633 nv->execution_throttle = cpu_to_le16(0xFFFF); 7634 nv->exchange_count = cpu_to_le16(0); 7635 nv->hard_address = cpu_to_le16(124); 7636 nv->port_name[0] = 0x21; 7637 nv->port_name[1] = 0x00 + ha->port_no + 1; 7638 nv->port_name[2] = 0x00; 7639 nv->port_name[3] = 0xe0; 7640 nv->port_name[4] = 0x8b; 7641 nv->port_name[5] = 0x1c; 7642 nv->port_name[6] = 0x55; 7643 nv->port_name[7] = 0x86; 7644 nv->node_name[0] = 0x20; 7645 nv->node_name[1] = 0x00; 7646 nv->node_name[2] = 0x00; 7647 nv->node_name[3] = 0xe0; 7648 nv->node_name[4] = 0x8b; 7649 nv->node_name[5] = 0x1c; 7650 nv->node_name[6] = 0x55; 7651 nv->node_name[7] = 0x86; 7652 qla24xx_nvram_wwn_from_ofw(vha, nv); 7653 nv->login_retry_count = cpu_to_le16(8); 7654 nv->interrupt_delay_timer = cpu_to_le16(0); 7655 nv->login_timeout = cpu_to_le16(0); 7656 nv->firmware_options_1 = 7657 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7658 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7659 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7660 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7661 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7662 nv->efi_parameters = cpu_to_le32(0); 7663 nv->reset_delay = 5; 7664 nv->max_luns_per_target = cpu_to_le16(128); 7665 nv->port_down_retry_count = cpu_to_le16(30); 7666 nv->link_down_timeout = cpu_to_le16(30); 7667 7668 rval = 1; 7669 } 7670 7671 if (qla_tgt_mode_enabled(vha)) { 7672 /* Don't enable full login after initial LIP */ 7673 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7674 /* Don't enable LIP full login for initiator */ 7675 nv->host_p &= cpu_to_le32(~BIT_10); 7676 } 7677 7678 qlt_24xx_config_nvram_stage1(vha, nv); 7679 7680 /* Reset Initialization control block */ 7681 memset(icb, 0, ha->init_cb_size); 7682 7683 /* Copy 1st segment. */ 7684 dptr1 = (uint8_t *)icb; 7685 dptr2 = (uint8_t *)&nv->version; 7686 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7687 while (cnt--) 7688 *dptr1++ = *dptr2++; 7689 7690 icb->login_retry_count = nv->login_retry_count; 7691 icb->link_down_on_nos = nv->link_down_on_nos; 7692 7693 /* Copy 2nd segment. */ 7694 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7695 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7696 cnt = (uint8_t *)&icb->reserved_3 - 7697 (uint8_t *)&icb->interrupt_delay_timer; 7698 while (cnt--) 7699 *dptr1++ = *dptr2++; 7700 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7701 /* 7702 * Setup driver NVRAM options. 7703 */ 7704 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7705 "QLA2462"); 7706 7707 qlt_24xx_config_nvram_stage2(vha, icb); 7708 7709 if (nv->host_p & cpu_to_le32(BIT_15)) { 7710 /* Use alternate WWN? */ 7711 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7712 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7713 } 7714 7715 /* Prepare nodename */ 7716 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7717 /* 7718 * Firmware will apply the following mask if the nodename was 7719 * not provided. 7720 */ 7721 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7722 icb->node_name[0] &= 0xF0; 7723 } 7724 7725 /* Set host adapter parameters. */ 7726 ha->flags.disable_risc_code_load = 0; 7727 ha->flags.enable_lip_reset = 0; 7728 ha->flags.enable_lip_full_login = 7729 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7730 ha->flags.enable_target_reset = 7731 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7732 ha->flags.enable_led_scheme = 0; 7733 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7734 7735 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7736 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7737 7738 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7739 sizeof(ha->fw_seriallink_options24)); 7740 7741 /* save HBA serial number */ 7742 ha->serial0 = icb->port_name[5]; 7743 ha->serial1 = icb->port_name[6]; 7744 ha->serial2 = icb->port_name[7]; 7745 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7746 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7747 7748 icb->execution_throttle = cpu_to_le16(0xFFFF); 7749 7750 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7751 7752 /* Set minimum login_timeout to 4 seconds. */ 7753 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7754 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7755 if (le16_to_cpu(nv->login_timeout) < 4) 7756 nv->login_timeout = cpu_to_le16(4); 7757 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7758 7759 /* Set minimum RATOV to 100 tenths of a second. */ 7760 ha->r_a_tov = 100; 7761 7762 ha->loop_reset_delay = nv->reset_delay; 7763 7764 /* Link Down Timeout = 0: 7765 * 7766 * When Port Down timer expires we will start returning 7767 * I/O's to OS with "DID_NO_CONNECT". 7768 * 7769 * Link Down Timeout != 0: 7770 * 7771 * The driver waits for the link to come up after link down 7772 * before returning I/Os to OS with "DID_NO_CONNECT". 7773 */ 7774 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7775 ha->loop_down_abort_time = 7776 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7777 } else { 7778 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7779 ha->loop_down_abort_time = 7780 (LOOP_DOWN_TIME - ha->link_down_timeout); 7781 } 7782 7783 /* Need enough time to try and get the port back. */ 7784 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7785 if (qlport_down_retry) 7786 ha->port_down_retry_count = qlport_down_retry; 7787 7788 /* Set login_retry_count */ 7789 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7790 if (ha->port_down_retry_count == 7791 le16_to_cpu(nv->port_down_retry_count) && 7792 ha->port_down_retry_count > 3) 7793 ha->login_retry_count = ha->port_down_retry_count; 7794 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7795 ha->login_retry_count = ha->port_down_retry_count; 7796 if (ql2xloginretrycount) 7797 ha->login_retry_count = ql2xloginretrycount; 7798 7799 /* N2N: driver will initiate Login instead of FW */ 7800 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 7801 7802 /* Enable ZIO. */ 7803 if (!vha->flags.init_done) { 7804 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7805 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7806 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7807 le16_to_cpu(icb->interrupt_delay_timer) : 2; 7808 } 7809 icb->firmware_options_2 &= cpu_to_le32( 7810 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7811 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7812 ha->zio_mode = QLA_ZIO_MODE_6; 7813 7814 ql_log(ql_log_info, vha, 0x006f, 7815 "ZIO mode %d enabled; timer delay (%d us).\n", 7816 ha->zio_mode, ha->zio_timer * 100); 7817 7818 icb->firmware_options_2 |= cpu_to_le32( 7819 (uint32_t)ha->zio_mode); 7820 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7821 } 7822 7823 if (rval) { 7824 ql_log(ql_log_warn, vha, 0x0070, 7825 "NVRAM configuration failed.\n"); 7826 } 7827 return (rval); 7828 } 7829 7830 static void 7831 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 7832 struct qla27xx_image_status *image_status) 7833 { 7834 ql_dbg(ql_dbg_init, vha, 0x018b, 7835 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 7836 name, "status", 7837 image_status->image_status_mask, 7838 le16_to_cpu(image_status->generation), 7839 image_status->ver_major, 7840 image_status->ver_minor, 7841 image_status->bitmap, 7842 le32_to_cpu(image_status->checksum), 7843 le32_to_cpu(image_status->signature)); 7844 } 7845 7846 static bool 7847 qla28xx_check_aux_image_status_signature( 7848 struct qla27xx_image_status *image_status) 7849 { 7850 ulong signature = le32_to_cpu(image_status->signature); 7851 7852 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 7853 } 7854 7855 static bool 7856 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 7857 { 7858 ulong signature = le32_to_cpu(image_status->signature); 7859 7860 return 7861 signature != QLA27XX_IMG_STATUS_SIGN && 7862 signature != QLA28XX_IMG_STATUS_SIGN; 7863 } 7864 7865 static ulong 7866 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 7867 { 7868 __le32 *p = (__force __le32 *)image_status; 7869 uint n = sizeof(*image_status) / sizeof(*p); 7870 uint32_t sum = 0; 7871 7872 for ( ; n--; p++) 7873 sum += le32_to_cpup(p); 7874 7875 return sum; 7876 } 7877 7878 static inline uint 7879 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 7880 { 7881 return aux->bitmap & bitmask ? 7882 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 7883 } 7884 7885 static void 7886 qla28xx_component_status( 7887 struct active_regions *active_regions, struct qla27xx_image_status *aux) 7888 { 7889 active_regions->aux.board_config = 7890 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 7891 7892 active_regions->aux.vpd_nvram = 7893 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 7894 7895 active_regions->aux.npiv_config_0_1 = 7896 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 7897 7898 active_regions->aux.npiv_config_2_3 = 7899 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 7900 7901 active_regions->aux.nvme_params = 7902 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NVME_PARAMS); 7903 } 7904 7905 static int 7906 qla27xx_compare_image_generation( 7907 struct qla27xx_image_status *pri_image_status, 7908 struct qla27xx_image_status *sec_image_status) 7909 { 7910 /* calculate generation delta as uint16 (this accounts for wrap) */ 7911 int16_t delta = 7912 le16_to_cpu(pri_image_status->generation) - 7913 le16_to_cpu(sec_image_status->generation); 7914 7915 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 7916 7917 return delta; 7918 } 7919 7920 void 7921 qla28xx_get_aux_images( 7922 struct scsi_qla_host *vha, struct active_regions *active_regions) 7923 { 7924 struct qla_hw_data *ha = vha->hw; 7925 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 7926 bool valid_pri_image = false, valid_sec_image = false; 7927 bool active_pri_image = false, active_sec_image = false; 7928 7929 if (!ha->flt_region_aux_img_status_pri) { 7930 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 7931 goto check_sec_image; 7932 } 7933 7934 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status, 7935 ha->flt_region_aux_img_status_pri, 7936 sizeof(pri_aux_image_status) >> 2); 7937 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 7938 7939 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 7940 ql_dbg(ql_dbg_init, vha, 0x018b, 7941 "Primary aux image signature (%#x) not valid\n", 7942 le32_to_cpu(pri_aux_image_status.signature)); 7943 goto check_sec_image; 7944 } 7945 7946 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 7947 ql_dbg(ql_dbg_init, vha, 0x018c, 7948 "Primary aux image checksum failed\n"); 7949 goto check_sec_image; 7950 } 7951 7952 valid_pri_image = true; 7953 7954 if (pri_aux_image_status.image_status_mask & 1) { 7955 ql_dbg(ql_dbg_init, vha, 0x018d, 7956 "Primary aux image is active\n"); 7957 active_pri_image = true; 7958 } 7959 7960 check_sec_image: 7961 if (!ha->flt_region_aux_img_status_sec) { 7962 ql_dbg(ql_dbg_init, vha, 0x018a, 7963 "Secondary aux image not addressed\n"); 7964 goto check_valid_image; 7965 } 7966 7967 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status, 7968 ha->flt_region_aux_img_status_sec, 7969 sizeof(sec_aux_image_status) >> 2); 7970 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 7971 7972 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 7973 ql_dbg(ql_dbg_init, vha, 0x018b, 7974 "Secondary aux image signature (%#x) not valid\n", 7975 le32_to_cpu(sec_aux_image_status.signature)); 7976 goto check_valid_image; 7977 } 7978 7979 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 7980 ql_dbg(ql_dbg_init, vha, 0x018c, 7981 "Secondary aux image checksum failed\n"); 7982 goto check_valid_image; 7983 } 7984 7985 valid_sec_image = true; 7986 7987 if (sec_aux_image_status.image_status_mask & 1) { 7988 ql_dbg(ql_dbg_init, vha, 0x018d, 7989 "Secondary aux image is active\n"); 7990 active_sec_image = true; 7991 } 7992 7993 check_valid_image: 7994 if (valid_pri_image && active_pri_image && 7995 valid_sec_image && active_sec_image) { 7996 if (qla27xx_compare_image_generation(&pri_aux_image_status, 7997 &sec_aux_image_status) >= 0) { 7998 qla28xx_component_status(active_regions, 7999 &pri_aux_image_status); 8000 } else { 8001 qla28xx_component_status(active_regions, 8002 &sec_aux_image_status); 8003 } 8004 } else if (valid_pri_image && active_pri_image) { 8005 qla28xx_component_status(active_regions, &pri_aux_image_status); 8006 } else if (valid_sec_image && active_sec_image) { 8007 qla28xx_component_status(active_regions, &sec_aux_image_status); 8008 } 8009 8010 ql_dbg(ql_dbg_init, vha, 0x018f, 8011 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u, NVME=%u\n", 8012 active_regions->aux.board_config, 8013 active_regions->aux.vpd_nvram, 8014 active_regions->aux.npiv_config_0_1, 8015 active_regions->aux.npiv_config_2_3, 8016 active_regions->aux.nvme_params); 8017 } 8018 8019 void 8020 qla27xx_get_active_image(struct scsi_qla_host *vha, 8021 struct active_regions *active_regions) 8022 { 8023 struct qla_hw_data *ha = vha->hw; 8024 struct qla27xx_image_status pri_image_status, sec_image_status; 8025 bool valid_pri_image = false, valid_sec_image = false; 8026 bool active_pri_image = false, active_sec_image = false; 8027 8028 if (!ha->flt_region_img_status_pri) { 8029 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 8030 goto check_sec_image; 8031 } 8032 8033 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status, 8034 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 8035 QLA_SUCCESS) { 8036 WARN_ON_ONCE(true); 8037 goto check_sec_image; 8038 } 8039 qla27xx_print_image(vha, "Primary image", &pri_image_status); 8040 8041 if (qla27xx_check_image_status_signature(&pri_image_status)) { 8042 ql_dbg(ql_dbg_init, vha, 0x018b, 8043 "Primary image signature (%#x) not valid\n", 8044 le32_to_cpu(pri_image_status.signature)); 8045 goto check_sec_image; 8046 } 8047 8048 if (qla27xx_image_status_checksum(&pri_image_status)) { 8049 ql_dbg(ql_dbg_init, vha, 0x018c, 8050 "Primary image checksum failed\n"); 8051 goto check_sec_image; 8052 } 8053 8054 valid_pri_image = true; 8055 8056 if (pri_image_status.image_status_mask & 1) { 8057 ql_dbg(ql_dbg_init, vha, 0x018d, 8058 "Primary image is active\n"); 8059 active_pri_image = true; 8060 } 8061 8062 check_sec_image: 8063 if (!ha->flt_region_img_status_sec) { 8064 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 8065 goto check_valid_image; 8066 } 8067 8068 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 8069 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 8070 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 8071 8072 if (qla27xx_check_image_status_signature(&sec_image_status)) { 8073 ql_dbg(ql_dbg_init, vha, 0x018b, 8074 "Secondary image signature (%#x) not valid\n", 8075 le32_to_cpu(sec_image_status.signature)); 8076 goto check_valid_image; 8077 } 8078 8079 if (qla27xx_image_status_checksum(&sec_image_status)) { 8080 ql_dbg(ql_dbg_init, vha, 0x018c, 8081 "Secondary image checksum failed\n"); 8082 goto check_valid_image; 8083 } 8084 8085 valid_sec_image = true; 8086 8087 if (sec_image_status.image_status_mask & 1) { 8088 ql_dbg(ql_dbg_init, vha, 0x018d, 8089 "Secondary image is active\n"); 8090 active_sec_image = true; 8091 } 8092 8093 check_valid_image: 8094 if (valid_pri_image && active_pri_image) 8095 active_regions->global = QLA27XX_PRIMARY_IMAGE; 8096 8097 if (valid_sec_image && active_sec_image) { 8098 if (!active_regions->global || 8099 qla27xx_compare_image_generation( 8100 &pri_image_status, &sec_image_status) < 0) { 8101 active_regions->global = QLA27XX_SECONDARY_IMAGE; 8102 } 8103 } 8104 8105 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 8106 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 8107 "default (boot/fw)" : 8108 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 8109 "primary" : 8110 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 8111 "secondary" : "invalid", 8112 active_regions->global); 8113 } 8114 8115 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 8116 { 8117 return 8118 !(dword[4] | dword[5] | dword[6] | dword[7]) || 8119 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 8120 } 8121 8122 static int 8123 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 8124 uint32_t faddr) 8125 { 8126 int rval; 8127 uint templates, segments, fragment; 8128 ulong i; 8129 uint j; 8130 ulong dlen; 8131 uint32_t *dcode; 8132 uint32_t risc_addr, risc_size, risc_attr = 0; 8133 struct qla_hw_data *ha = vha->hw; 8134 struct req_que *req = ha->req_q_map[0]; 8135 struct fwdt *fwdt = ha->fwdt; 8136 8137 ql_dbg(ql_dbg_init, vha, 0x008b, 8138 "FW: Loading firmware from flash (%x).\n", faddr); 8139 8140 dcode = (uint32_t *)req->ring; 8141 qla24xx_read_flash_data(vha, dcode, faddr, 8); 8142 if (qla24xx_risc_firmware_invalid(dcode)) { 8143 ql_log(ql_log_fatal, vha, 0x008c, 8144 "Unable to verify the integrity of flash firmware " 8145 "image.\n"); 8146 ql_log(ql_log_fatal, vha, 0x008d, 8147 "Firmware data: %08x %08x %08x %08x.\n", 8148 dcode[0], dcode[1], dcode[2], dcode[3]); 8149 8150 return QLA_FUNCTION_FAILED; 8151 } 8152 8153 dcode = (uint32_t *)req->ring; 8154 *srisc_addr = 0; 8155 segments = FA_RISC_CODE_SEGMENTS; 8156 for (j = 0; j < segments; j++) { 8157 ql_dbg(ql_dbg_init, vha, 0x008d, 8158 "-> Loading segment %u...\n", j); 8159 qla24xx_read_flash_data(vha, dcode, faddr, 10); 8160 risc_addr = be32_to_cpu((__force __be32)dcode[2]); 8161 risc_size = be32_to_cpu((__force __be32)dcode[3]); 8162 if (!*srisc_addr) { 8163 *srisc_addr = risc_addr; 8164 risc_attr = be32_to_cpu((__force __be32)dcode[9]); 8165 } 8166 8167 dlen = ha->fw_transfer_size >> 2; 8168 for (fragment = 0; risc_size; fragment++) { 8169 if (dlen > risc_size) 8170 dlen = risc_size; 8171 8172 ql_dbg(ql_dbg_init, vha, 0x008e, 8173 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 8174 fragment, risc_addr, faddr, dlen); 8175 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 8176 for (i = 0; i < dlen; i++) 8177 dcode[i] = swab32(dcode[i]); 8178 8179 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8180 if (rval) { 8181 ql_log(ql_log_fatal, vha, 0x008f, 8182 "-> Failed load firmware fragment %u.\n", 8183 fragment); 8184 return QLA_FUNCTION_FAILED; 8185 } 8186 8187 faddr += dlen; 8188 risc_addr += dlen; 8189 risc_size -= dlen; 8190 } 8191 } 8192 8193 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8194 return QLA_SUCCESS; 8195 8196 templates = (risc_attr & BIT_9) ? 2 : 1; 8197 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 8198 for (j = 0; j < templates; j++, fwdt++) { 8199 vfree(fwdt->template); 8200 fwdt->template = NULL; 8201 fwdt->length = 0; 8202 8203 dcode = (uint32_t *)req->ring; 8204 qla24xx_read_flash_data(vha, dcode, faddr, 7); 8205 risc_size = be32_to_cpu((__force __be32)dcode[2]); 8206 ql_dbg(ql_dbg_init, vha, 0x0161, 8207 "-> fwdt%u template array at %#x (%#x dwords)\n", 8208 j, faddr, risc_size); 8209 if (!risc_size || !~risc_size) { 8210 ql_dbg(ql_dbg_init, vha, 0x0162, 8211 "-> fwdt%u failed to read array\n", j); 8212 goto failed; 8213 } 8214 8215 /* skip header and ignore checksum */ 8216 faddr += 7; 8217 risc_size -= 8; 8218 8219 ql_dbg(ql_dbg_init, vha, 0x0163, 8220 "-> fwdt%u template allocate template %#x words...\n", 8221 j, risc_size); 8222 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8223 if (!fwdt->template) { 8224 ql_log(ql_log_warn, vha, 0x0164, 8225 "-> fwdt%u failed allocate template.\n", j); 8226 goto failed; 8227 } 8228 8229 dcode = fwdt->template; 8230 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 8231 8232 if (!qla27xx_fwdt_template_valid(dcode)) { 8233 ql_log(ql_log_warn, vha, 0x0165, 8234 "-> fwdt%u failed template validate\n", j); 8235 goto failed; 8236 } 8237 8238 dlen = qla27xx_fwdt_template_size(dcode); 8239 ql_dbg(ql_dbg_init, vha, 0x0166, 8240 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8241 j, dlen, dlen / sizeof(*dcode)); 8242 if (dlen > risc_size * sizeof(*dcode)) { 8243 ql_log(ql_log_warn, vha, 0x0167, 8244 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8245 j, dlen - risc_size * sizeof(*dcode)); 8246 goto failed; 8247 } 8248 8249 fwdt->length = dlen; 8250 ql_dbg(ql_dbg_init, vha, 0x0168, 8251 "-> fwdt%u loaded template ok\n", j); 8252 8253 faddr += risc_size + 1; 8254 } 8255 8256 return QLA_SUCCESS; 8257 8258 failed: 8259 vfree(fwdt->template); 8260 fwdt->template = NULL; 8261 fwdt->length = 0; 8262 8263 return QLA_SUCCESS; 8264 } 8265 8266 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 8267 8268 int 8269 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8270 { 8271 int rval; 8272 int i, fragment; 8273 uint16_t *wcode; 8274 __be16 *fwcode; 8275 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 8276 struct fw_blob *blob; 8277 struct qla_hw_data *ha = vha->hw; 8278 struct req_que *req = ha->req_q_map[0]; 8279 8280 /* Load firmware blob. */ 8281 blob = qla2x00_request_firmware(vha); 8282 if (!blob) { 8283 ql_log(ql_log_info, vha, 0x0083, 8284 "Firmware image unavailable.\n"); 8285 ql_log(ql_log_info, vha, 0x0084, 8286 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 8287 return QLA_FUNCTION_FAILED; 8288 } 8289 8290 rval = QLA_SUCCESS; 8291 8292 wcode = (uint16_t *)req->ring; 8293 *srisc_addr = 0; 8294 fwcode = (__force __be16 *)blob->fw->data; 8295 fwclen = 0; 8296 8297 /* Validate firmware image by checking version. */ 8298 if (blob->fw->size < 8 * sizeof(uint16_t)) { 8299 ql_log(ql_log_fatal, vha, 0x0085, 8300 "Unable to verify integrity of firmware image (%zd).\n", 8301 blob->fw->size); 8302 goto fail_fw_integrity; 8303 } 8304 for (i = 0; i < 4; i++) 8305 wcode[i] = be16_to_cpu(fwcode[i + 4]); 8306 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 8307 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 8308 wcode[2] == 0 && wcode[3] == 0)) { 8309 ql_log(ql_log_fatal, vha, 0x0086, 8310 "Unable to verify integrity of firmware image.\n"); 8311 ql_log(ql_log_fatal, vha, 0x0087, 8312 "Firmware data: %04x %04x %04x %04x.\n", 8313 wcode[0], wcode[1], wcode[2], wcode[3]); 8314 goto fail_fw_integrity; 8315 } 8316 8317 seg = blob->segs; 8318 while (*seg && rval == QLA_SUCCESS) { 8319 risc_addr = *seg; 8320 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 8321 risc_size = be16_to_cpu(fwcode[3]); 8322 8323 /* Validate firmware image size. */ 8324 fwclen += risc_size * sizeof(uint16_t); 8325 if (blob->fw->size < fwclen) { 8326 ql_log(ql_log_fatal, vha, 0x0088, 8327 "Unable to verify integrity of firmware image " 8328 "(%zd).\n", blob->fw->size); 8329 goto fail_fw_integrity; 8330 } 8331 8332 fragment = 0; 8333 while (risc_size > 0 && rval == QLA_SUCCESS) { 8334 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 8335 if (wlen > risc_size) 8336 wlen = risc_size; 8337 ql_dbg(ql_dbg_init, vha, 0x0089, 8338 "Loading risc segment@ risc addr %x number of " 8339 "words 0x%x.\n", risc_addr, wlen); 8340 8341 for (i = 0; i < wlen; i++) 8342 wcode[i] = swab16((__force u32)fwcode[i]); 8343 8344 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 8345 wlen); 8346 if (rval) { 8347 ql_log(ql_log_fatal, vha, 0x008a, 8348 "Failed to load segment %d of firmware.\n", 8349 fragment); 8350 break; 8351 } 8352 8353 fwcode += wlen; 8354 risc_addr += wlen; 8355 risc_size -= wlen; 8356 fragment++; 8357 } 8358 8359 /* Next segment. */ 8360 seg++; 8361 } 8362 return rval; 8363 8364 fail_fw_integrity: 8365 return QLA_FUNCTION_FAILED; 8366 } 8367 8368 static int 8369 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8370 { 8371 int rval; 8372 uint templates, segments, fragment; 8373 uint32_t *dcode; 8374 ulong dlen; 8375 uint32_t risc_addr, risc_size, risc_attr = 0; 8376 ulong i; 8377 uint j; 8378 struct fw_blob *blob; 8379 __be32 *fwcode; 8380 struct qla_hw_data *ha = vha->hw; 8381 struct req_que *req = ha->req_q_map[0]; 8382 struct fwdt *fwdt = ha->fwdt; 8383 8384 ql_dbg(ql_dbg_init, vha, 0x0090, 8385 "-> FW: Loading via request-firmware.\n"); 8386 8387 blob = qla2x00_request_firmware(vha); 8388 if (!blob) { 8389 ql_log(ql_log_warn, vha, 0x0092, 8390 "-> Firmware file not found.\n"); 8391 8392 return QLA_FUNCTION_FAILED; 8393 } 8394 8395 fwcode = (__force __be32 *)blob->fw->data; 8396 dcode = (__force uint32_t *)fwcode; 8397 if (qla24xx_risc_firmware_invalid(dcode)) { 8398 ql_log(ql_log_fatal, vha, 0x0093, 8399 "Unable to verify integrity of firmware image (%zd).\n", 8400 blob->fw->size); 8401 ql_log(ql_log_fatal, vha, 0x0095, 8402 "Firmware data: %08x %08x %08x %08x.\n", 8403 dcode[0], dcode[1], dcode[2], dcode[3]); 8404 return QLA_FUNCTION_FAILED; 8405 } 8406 8407 dcode = (uint32_t *)req->ring; 8408 *srisc_addr = 0; 8409 segments = FA_RISC_CODE_SEGMENTS; 8410 for (j = 0; j < segments; j++) { 8411 ql_dbg(ql_dbg_init, vha, 0x0096, 8412 "-> Loading segment %u...\n", j); 8413 risc_addr = be32_to_cpu(fwcode[2]); 8414 risc_size = be32_to_cpu(fwcode[3]); 8415 8416 if (!*srisc_addr) { 8417 *srisc_addr = risc_addr; 8418 risc_attr = be32_to_cpu(fwcode[9]); 8419 } 8420 8421 dlen = ha->fw_transfer_size >> 2; 8422 for (fragment = 0; risc_size; fragment++) { 8423 if (dlen > risc_size) 8424 dlen = risc_size; 8425 8426 ql_dbg(ql_dbg_init, vha, 0x0097, 8427 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 8428 fragment, risc_addr, 8429 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 8430 dlen); 8431 8432 for (i = 0; i < dlen; i++) 8433 dcode[i] = swab32((__force u32)fwcode[i]); 8434 8435 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8436 if (rval) { 8437 ql_log(ql_log_fatal, vha, 0x0098, 8438 "-> Failed load firmware fragment %u.\n", 8439 fragment); 8440 return QLA_FUNCTION_FAILED; 8441 } 8442 8443 fwcode += dlen; 8444 risc_addr += dlen; 8445 risc_size -= dlen; 8446 } 8447 } 8448 8449 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8450 return QLA_SUCCESS; 8451 8452 templates = (risc_attr & BIT_9) ? 2 : 1; 8453 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 8454 for (j = 0; j < templates; j++, fwdt++) { 8455 vfree(fwdt->template); 8456 fwdt->template = NULL; 8457 fwdt->length = 0; 8458 8459 risc_size = be32_to_cpu(fwcode[2]); 8460 ql_dbg(ql_dbg_init, vha, 0x0171, 8461 "-> fwdt%u template array at %#x (%#x dwords)\n", 8462 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 8463 risc_size); 8464 if (!risc_size || !~risc_size) { 8465 ql_dbg(ql_dbg_init, vha, 0x0172, 8466 "-> fwdt%u failed to read array\n", j); 8467 goto failed; 8468 } 8469 8470 /* skip header and ignore checksum */ 8471 fwcode += 7; 8472 risc_size -= 8; 8473 8474 ql_dbg(ql_dbg_init, vha, 0x0173, 8475 "-> fwdt%u template allocate template %#x words...\n", 8476 j, risc_size); 8477 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8478 if (!fwdt->template) { 8479 ql_log(ql_log_warn, vha, 0x0174, 8480 "-> fwdt%u failed allocate template.\n", j); 8481 goto failed; 8482 } 8483 8484 dcode = fwdt->template; 8485 for (i = 0; i < risc_size; i++) 8486 dcode[i] = (__force u32)fwcode[i]; 8487 8488 if (!qla27xx_fwdt_template_valid(dcode)) { 8489 ql_log(ql_log_warn, vha, 0x0175, 8490 "-> fwdt%u failed template validate\n", j); 8491 goto failed; 8492 } 8493 8494 dlen = qla27xx_fwdt_template_size(dcode); 8495 ql_dbg(ql_dbg_init, vha, 0x0176, 8496 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8497 j, dlen, dlen / sizeof(*dcode)); 8498 if (dlen > risc_size * sizeof(*dcode)) { 8499 ql_log(ql_log_warn, vha, 0x0177, 8500 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8501 j, dlen - risc_size * sizeof(*dcode)); 8502 goto failed; 8503 } 8504 8505 fwdt->length = dlen; 8506 ql_dbg(ql_dbg_init, vha, 0x0178, 8507 "-> fwdt%u loaded template ok\n", j); 8508 8509 fwcode += risc_size + 1; 8510 } 8511 8512 return QLA_SUCCESS; 8513 8514 failed: 8515 vfree(fwdt->template); 8516 fwdt->template = NULL; 8517 fwdt->length = 0; 8518 8519 return QLA_SUCCESS; 8520 } 8521 8522 int 8523 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8524 { 8525 int rval; 8526 8527 if (ql2xfwloadbin == 1) 8528 return qla81xx_load_risc(vha, srisc_addr); 8529 8530 /* 8531 * FW Load priority: 8532 * 1) Firmware via request-firmware interface (.bin file). 8533 * 2) Firmware residing in flash. 8534 */ 8535 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8536 if (rval == QLA_SUCCESS) 8537 return rval; 8538 8539 return qla24xx_load_risc_flash(vha, srisc_addr, 8540 vha->hw->flt_region_fw); 8541 } 8542 8543 int 8544 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8545 { 8546 int rval; 8547 struct qla_hw_data *ha = vha->hw; 8548 struct active_regions active_regions = { }; 8549 8550 if (ql2xfwloadbin == 2) 8551 goto try_blob_fw; 8552 8553 /* FW Load priority: 8554 * 1) Firmware residing in flash. 8555 * 2) Firmware via request-firmware interface (.bin file). 8556 * 3) Golden-Firmware residing in flash -- (limited operation). 8557 */ 8558 8559 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8560 goto try_primary_fw; 8561 8562 qla27xx_get_active_image(vha, &active_regions); 8563 8564 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8565 goto try_primary_fw; 8566 8567 ql_dbg(ql_dbg_init, vha, 0x008b, 8568 "Loading secondary firmware image.\n"); 8569 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8570 if (!rval) 8571 return rval; 8572 8573 try_primary_fw: 8574 ql_dbg(ql_dbg_init, vha, 0x008b, 8575 "Loading primary firmware image.\n"); 8576 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8577 if (!rval) 8578 return rval; 8579 8580 try_blob_fw: 8581 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8582 if (!rval || !ha->flt_region_gold_fw) 8583 return rval; 8584 8585 ql_log(ql_log_info, vha, 0x0099, 8586 "Attempting to fallback to golden firmware.\n"); 8587 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8588 if (rval) 8589 return rval; 8590 8591 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8592 ha->flags.running_gold_fw = 1; 8593 return rval; 8594 } 8595 8596 void 8597 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8598 { 8599 int ret, retries; 8600 struct qla_hw_data *ha = vha->hw; 8601 8602 if (ha->flags.pci_channel_io_perm_failure) 8603 return; 8604 if (!IS_FWI2_CAPABLE(ha)) 8605 return; 8606 if (!ha->fw_major_version) 8607 return; 8608 if (!ha->flags.fw_started) 8609 return; 8610 8611 ret = qla2x00_stop_firmware(vha); 8612 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8613 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8614 ha->isp_ops->reset_chip(vha); 8615 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8616 continue; 8617 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8618 continue; 8619 ql_log(ql_log_info, vha, 0x8015, 8620 "Attempting retry of stop-firmware command.\n"); 8621 ret = qla2x00_stop_firmware(vha); 8622 } 8623 8624 QLA_FW_STOPPED(ha); 8625 ha->flags.fw_init_done = 0; 8626 } 8627 8628 int 8629 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8630 { 8631 int rval = QLA_SUCCESS; 8632 int rval2; 8633 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8634 struct qla_hw_data *ha = vha->hw; 8635 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8636 8637 if (!vha->vp_idx) 8638 return -EINVAL; 8639 8640 rval = qla2x00_fw_ready(base_vha); 8641 8642 if (rval == QLA_SUCCESS) { 8643 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8644 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8645 } 8646 8647 vha->flags.management_server_logged_in = 0; 8648 8649 /* Login to SNS first */ 8650 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8651 BIT_1); 8652 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8653 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8654 ql_dbg(ql_dbg_init, vha, 0x0120, 8655 "Failed SNS login: loop_id=%x, rval2=%d\n", 8656 NPH_SNS, rval2); 8657 else 8658 ql_dbg(ql_dbg_init, vha, 0x0103, 8659 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8660 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8661 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8662 return (QLA_FUNCTION_FAILED); 8663 } 8664 8665 atomic_set(&vha->loop_down_timer, 0); 8666 atomic_set(&vha->loop_state, LOOP_UP); 8667 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8668 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8669 rval = qla2x00_loop_resync(base_vha); 8670 8671 return rval; 8672 } 8673 8674 /* 84XX Support **************************************************************/ 8675 8676 static LIST_HEAD(qla_cs84xx_list); 8677 static DEFINE_MUTEX(qla_cs84xx_mutex); 8678 8679 static struct qla_chip_state_84xx * 8680 qla84xx_get_chip(struct scsi_qla_host *vha) 8681 { 8682 struct qla_chip_state_84xx *cs84xx; 8683 struct qla_hw_data *ha = vha->hw; 8684 8685 mutex_lock(&qla_cs84xx_mutex); 8686 8687 /* Find any shared 84xx chip. */ 8688 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8689 if (cs84xx->bus == ha->pdev->bus) { 8690 kref_get(&cs84xx->kref); 8691 goto done; 8692 } 8693 } 8694 8695 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8696 if (!cs84xx) 8697 goto done; 8698 8699 kref_init(&cs84xx->kref); 8700 spin_lock_init(&cs84xx->access_lock); 8701 mutex_init(&cs84xx->fw_update_mutex); 8702 cs84xx->bus = ha->pdev->bus; 8703 8704 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8705 done: 8706 mutex_unlock(&qla_cs84xx_mutex); 8707 return cs84xx; 8708 } 8709 8710 static void 8711 __qla84xx_chip_release(struct kref *kref) 8712 { 8713 struct qla_chip_state_84xx *cs84xx = 8714 container_of(kref, struct qla_chip_state_84xx, kref); 8715 8716 mutex_lock(&qla_cs84xx_mutex); 8717 list_del(&cs84xx->list); 8718 mutex_unlock(&qla_cs84xx_mutex); 8719 kfree(cs84xx); 8720 } 8721 8722 void 8723 qla84xx_put_chip(struct scsi_qla_host *vha) 8724 { 8725 struct qla_hw_data *ha = vha->hw; 8726 8727 if (ha->cs84xx) 8728 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8729 } 8730 8731 static int 8732 qla84xx_init_chip(scsi_qla_host_t *vha) 8733 { 8734 int rval; 8735 uint16_t status[2]; 8736 struct qla_hw_data *ha = vha->hw; 8737 8738 mutex_lock(&ha->cs84xx->fw_update_mutex); 8739 8740 rval = qla84xx_verify_chip(vha, status); 8741 8742 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8743 8744 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8745 QLA_SUCCESS; 8746 } 8747 8748 /* 81XX Support **************************************************************/ 8749 8750 int 8751 qla81xx_nvram_config(scsi_qla_host_t *vha) 8752 { 8753 int rval; 8754 struct init_cb_81xx *icb; 8755 struct nvram_81xx *nv; 8756 __le32 *dptr; 8757 uint8_t *dptr1, *dptr2; 8758 uint32_t chksum; 8759 uint16_t cnt; 8760 struct qla_hw_data *ha = vha->hw; 8761 uint32_t faddr; 8762 struct active_regions active_regions = { }; 8763 8764 rval = QLA_SUCCESS; 8765 icb = (struct init_cb_81xx *)ha->init_cb; 8766 nv = ha->nvram; 8767 8768 /* Determine NVRAM starting address. */ 8769 ha->nvram_size = sizeof(*nv); 8770 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8771 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8772 ha->vpd_size = FA_VPD_SIZE_82XX; 8773 8774 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8775 qla28xx_get_aux_images(vha, &active_regions); 8776 8777 /* Get VPD data into cache */ 8778 ha->vpd = ha->nvram + VPD_OFFSET; 8779 8780 faddr = ha->flt_region_vpd; 8781 if (IS_QLA28XX(ha)) { 8782 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8783 faddr = ha->flt_region_vpd_sec; 8784 ql_dbg(ql_dbg_init, vha, 0x0110, 8785 "Loading %s nvram image.\n", 8786 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8787 "primary" : "secondary"); 8788 } 8789 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8790 8791 /* Get NVRAM data into cache and calculate checksum. */ 8792 faddr = ha->flt_region_nvram; 8793 if (IS_QLA28XX(ha)) { 8794 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8795 faddr = ha->flt_region_nvram_sec; 8796 } 8797 ql_dbg(ql_dbg_init, vha, 0x0110, 8798 "Loading %s nvram image.\n", 8799 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8800 "primary" : "secondary"); 8801 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8802 8803 dptr = (__force __le32 *)nv; 8804 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8805 chksum += le32_to_cpu(*dptr); 8806 8807 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8808 "Contents of NVRAM:\n"); 8809 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8810 nv, ha->nvram_size); 8811 8812 /* Bad NVRAM data, set defaults parameters. */ 8813 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 8814 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 8815 /* Reset NVRAM data. */ 8816 ql_log(ql_log_info, vha, 0x0073, 8817 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 8818 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 8819 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 8820 ql_log(ql_log_info, vha, 0x0074, 8821 "Falling back to functioning (yet invalid -- WWPN) " 8822 "defaults.\n"); 8823 8824 /* 8825 * Set default initialization control block. 8826 */ 8827 memset(nv, 0, ha->nvram_size); 8828 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8829 nv->version = cpu_to_le16(ICB_VERSION); 8830 nv->frame_payload_size = cpu_to_le16(2048); 8831 nv->execution_throttle = cpu_to_le16(0xFFFF); 8832 nv->exchange_count = cpu_to_le16(0); 8833 nv->port_name[0] = 0x21; 8834 nv->port_name[1] = 0x00 + ha->port_no + 1; 8835 nv->port_name[2] = 0x00; 8836 nv->port_name[3] = 0xe0; 8837 nv->port_name[4] = 0x8b; 8838 nv->port_name[5] = 0x1c; 8839 nv->port_name[6] = 0x55; 8840 nv->port_name[7] = 0x86; 8841 nv->node_name[0] = 0x20; 8842 nv->node_name[1] = 0x00; 8843 nv->node_name[2] = 0x00; 8844 nv->node_name[3] = 0xe0; 8845 nv->node_name[4] = 0x8b; 8846 nv->node_name[5] = 0x1c; 8847 nv->node_name[6] = 0x55; 8848 nv->node_name[7] = 0x86; 8849 nv->login_retry_count = cpu_to_le16(8); 8850 nv->interrupt_delay_timer = cpu_to_le16(0); 8851 nv->login_timeout = cpu_to_le16(0); 8852 nv->firmware_options_1 = 8853 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8854 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8855 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8856 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8857 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8858 nv->efi_parameters = cpu_to_le32(0); 8859 nv->reset_delay = 5; 8860 nv->max_luns_per_target = cpu_to_le16(128); 8861 nv->port_down_retry_count = cpu_to_le16(30); 8862 nv->link_down_timeout = cpu_to_le16(180); 8863 nv->enode_mac[0] = 0x00; 8864 nv->enode_mac[1] = 0xC0; 8865 nv->enode_mac[2] = 0xDD; 8866 nv->enode_mac[3] = 0x04; 8867 nv->enode_mac[4] = 0x05; 8868 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8869 8870 rval = 1; 8871 } 8872 8873 if (IS_T10_PI_CAPABLE(ha)) 8874 nv->frame_payload_size &= cpu_to_le16(~7); 8875 8876 qlt_81xx_config_nvram_stage1(vha, nv); 8877 8878 /* Reset Initialization control block */ 8879 memset(icb, 0, ha->init_cb_size); 8880 8881 /* Copy 1st segment. */ 8882 dptr1 = (uint8_t *)icb; 8883 dptr2 = (uint8_t *)&nv->version; 8884 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8885 while (cnt--) 8886 *dptr1++ = *dptr2++; 8887 8888 icb->login_retry_count = nv->login_retry_count; 8889 8890 /* Copy 2nd segment. */ 8891 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8892 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8893 cnt = (uint8_t *)&icb->reserved_5 - 8894 (uint8_t *)&icb->interrupt_delay_timer; 8895 while (cnt--) 8896 *dptr1++ = *dptr2++; 8897 8898 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8899 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8900 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8901 icb->enode_mac[0] = 0x00; 8902 icb->enode_mac[1] = 0xC0; 8903 icb->enode_mac[2] = 0xDD; 8904 icb->enode_mac[3] = 0x04; 8905 icb->enode_mac[4] = 0x05; 8906 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8907 } 8908 8909 /* Use extended-initialization control block. */ 8910 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8911 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8912 /* 8913 * Setup driver NVRAM options. 8914 */ 8915 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8916 "QLE8XXX"); 8917 8918 qlt_81xx_config_nvram_stage2(vha, icb); 8919 8920 /* Use alternate WWN? */ 8921 if (nv->host_p & cpu_to_le32(BIT_15)) { 8922 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8923 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8924 } 8925 8926 /* Prepare nodename */ 8927 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8928 /* 8929 * Firmware will apply the following mask if the nodename was 8930 * not provided. 8931 */ 8932 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8933 icb->node_name[0] &= 0xF0; 8934 } 8935 8936 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) { 8937 if ((nv->enhanced_features & BIT_7) == 0) 8938 ha->flags.scm_supported_a = 1; 8939 } 8940 8941 /* Set host adapter parameters. */ 8942 ha->flags.disable_risc_code_load = 0; 8943 ha->flags.enable_lip_reset = 0; 8944 ha->flags.enable_lip_full_login = 8945 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 8946 ha->flags.enable_target_reset = 8947 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8948 ha->flags.enable_led_scheme = 0; 8949 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8950 8951 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8952 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8953 8954 /* save HBA serial number */ 8955 ha->serial0 = icb->port_name[5]; 8956 ha->serial1 = icb->port_name[6]; 8957 ha->serial2 = icb->port_name[7]; 8958 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8959 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8960 8961 icb->execution_throttle = cpu_to_le16(0xFFFF); 8962 8963 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8964 8965 /* Set minimum login_timeout to 4 seconds. */ 8966 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8967 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8968 if (le16_to_cpu(nv->login_timeout) < 4) 8969 nv->login_timeout = cpu_to_le16(4); 8970 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8971 8972 /* Set minimum RATOV to 100 tenths of a second. */ 8973 ha->r_a_tov = 100; 8974 8975 ha->loop_reset_delay = nv->reset_delay; 8976 8977 /* Link Down Timeout = 0: 8978 * 8979 * When Port Down timer expires we will start returning 8980 * I/O's to OS with "DID_NO_CONNECT". 8981 * 8982 * Link Down Timeout != 0: 8983 * 8984 * The driver waits for the link to come up after link down 8985 * before returning I/Os to OS with "DID_NO_CONNECT". 8986 */ 8987 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8988 ha->loop_down_abort_time = 8989 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8990 } else { 8991 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8992 ha->loop_down_abort_time = 8993 (LOOP_DOWN_TIME - ha->link_down_timeout); 8994 } 8995 8996 /* Need enough time to try and get the port back. */ 8997 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8998 if (qlport_down_retry) 8999 ha->port_down_retry_count = qlport_down_retry; 9000 9001 /* Set login_retry_count */ 9002 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 9003 if (ha->port_down_retry_count == 9004 le16_to_cpu(nv->port_down_retry_count) && 9005 ha->port_down_retry_count > 3) 9006 ha->login_retry_count = ha->port_down_retry_count; 9007 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 9008 ha->login_retry_count = ha->port_down_retry_count; 9009 if (ql2xloginretrycount) 9010 ha->login_retry_count = ql2xloginretrycount; 9011 9012 /* if not running MSI-X we need handshaking on interrupts */ 9013 if (!vha->hw->flags.msix_enabled && 9014 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 9015 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 9016 9017 /* Enable ZIO. */ 9018 if (!vha->flags.init_done) { 9019 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 9020 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 9021 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 9022 le16_to_cpu(icb->interrupt_delay_timer) : 2; 9023 } 9024 icb->firmware_options_2 &= cpu_to_le32( 9025 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 9026 vha->flags.process_response_queue = 0; 9027 if (ha->zio_mode != QLA_ZIO_DISABLED) { 9028 ha->zio_mode = QLA_ZIO_MODE_6; 9029 9030 ql_log(ql_log_info, vha, 0x0075, 9031 "ZIO mode %d enabled; timer delay (%d us).\n", 9032 ha->zio_mode, 9033 ha->zio_timer * 100); 9034 9035 icb->firmware_options_2 |= cpu_to_le32( 9036 (uint32_t)ha->zio_mode); 9037 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 9038 vha->flags.process_response_queue = 1; 9039 } 9040 9041 /* enable RIDA Format2 */ 9042 icb->firmware_options_3 |= cpu_to_le32(BIT_0); 9043 9044 /* N2N: driver will initiate Login instead of FW */ 9045 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 9046 9047 /* Determine NVMe/FCP priority for target ports */ 9048 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 9049 9050 if (rval) { 9051 ql_log(ql_log_warn, vha, 0x0076, 9052 "NVRAM configuration failed.\n"); 9053 } 9054 return (rval); 9055 } 9056 9057 int 9058 qla82xx_restart_isp(scsi_qla_host_t *vha) 9059 { 9060 int status, rval; 9061 struct qla_hw_data *ha = vha->hw; 9062 struct scsi_qla_host *vp, *tvp; 9063 unsigned long flags; 9064 9065 status = qla2x00_init_rings(vha); 9066 if (!status) { 9067 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9068 ha->flags.chip_reset_done = 1; 9069 9070 status = qla2x00_fw_ready(vha); 9071 if (!status) { 9072 /* Issue a marker after FW becomes ready. */ 9073 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 9074 vha->flags.online = 1; 9075 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 9076 } 9077 9078 /* if no cable then assume it's good */ 9079 if ((vha->device_flags & DFLG_NO_CABLE)) 9080 status = 0; 9081 } 9082 9083 if (!status) { 9084 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9085 9086 if (!atomic_read(&vha->loop_down_timer)) { 9087 /* 9088 * Issue marker command only when we are going 9089 * to start the I/O . 9090 */ 9091 vha->marker_needed = 1; 9092 } 9093 9094 ha->isp_ops->enable_intrs(ha); 9095 9096 ha->isp_abort_cnt = 0; 9097 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 9098 9099 /* Update the firmware version */ 9100 status = qla82xx_check_md_needed(vha); 9101 9102 if (ha->fce) { 9103 ha->flags.fce_enabled = 1; 9104 memset(ha->fce, 0, 9105 fce_calc_size(ha->fce_bufs)); 9106 rval = qla2x00_enable_fce_trace(vha, 9107 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 9108 &ha->fce_bufs); 9109 if (rval) { 9110 ql_log(ql_log_warn, vha, 0x8001, 9111 "Unable to reinitialize FCE (%d).\n", 9112 rval); 9113 ha->flags.fce_enabled = 0; 9114 } 9115 } 9116 9117 if (ha->eft) { 9118 memset(ha->eft, 0, EFT_SIZE); 9119 rval = qla2x00_enable_eft_trace(vha, 9120 ha->eft_dma, EFT_NUM_BUFFERS); 9121 if (rval) { 9122 ql_log(ql_log_warn, vha, 0x8010, 9123 "Unable to reinitialize EFT (%d).\n", 9124 rval); 9125 } 9126 } 9127 } 9128 9129 if (!status) { 9130 ql_dbg(ql_dbg_taskm, vha, 0x8011, 9131 "qla82xx_restart_isp succeeded.\n"); 9132 9133 spin_lock_irqsave(&ha->vport_slock, flags); 9134 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 9135 if (vp->vp_idx) { 9136 atomic_inc(&vp->vref_count); 9137 spin_unlock_irqrestore(&ha->vport_slock, flags); 9138 9139 qla2x00_vp_abort_isp(vp); 9140 9141 spin_lock_irqsave(&ha->vport_slock, flags); 9142 atomic_dec(&vp->vref_count); 9143 } 9144 } 9145 spin_unlock_irqrestore(&ha->vport_slock, flags); 9146 9147 } else { 9148 ql_log(ql_log_warn, vha, 0x8016, 9149 "qla82xx_restart_isp **** FAILED ****.\n"); 9150 } 9151 9152 return status; 9153 } 9154 9155 /* 9156 * qla24xx_get_fcp_prio 9157 * Gets the fcp cmd priority value for the logged in port. 9158 * Looks for a match of the port descriptors within 9159 * each of the fcp prio config entries. If a match is found, 9160 * the tag (priority) value is returned. 9161 * 9162 * Input: 9163 * vha = scsi host structure pointer. 9164 * fcport = port structure pointer. 9165 * 9166 * Return: 9167 * non-zero (if found) 9168 * -1 (if not found) 9169 * 9170 * Context: 9171 * Kernel context 9172 */ 9173 static int 9174 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9175 { 9176 int i, entries; 9177 uint8_t pid_match, wwn_match; 9178 int priority; 9179 uint32_t pid1, pid2; 9180 uint64_t wwn1, wwn2; 9181 struct qla_fcp_prio_entry *pri_entry; 9182 struct qla_hw_data *ha = vha->hw; 9183 9184 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 9185 return -1; 9186 9187 priority = -1; 9188 entries = ha->fcp_prio_cfg->num_entries; 9189 pri_entry = &ha->fcp_prio_cfg->entry[0]; 9190 9191 for (i = 0; i < entries; i++) { 9192 pid_match = wwn_match = 0; 9193 9194 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 9195 pri_entry++; 9196 continue; 9197 } 9198 9199 /* check source pid for a match */ 9200 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 9201 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 9202 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 9203 if (pid1 == INVALID_PORT_ID) 9204 pid_match++; 9205 else if (pid1 == pid2) 9206 pid_match++; 9207 } 9208 9209 /* check destination pid for a match */ 9210 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 9211 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 9212 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 9213 if (pid1 == INVALID_PORT_ID) 9214 pid_match++; 9215 else if (pid1 == pid2) 9216 pid_match++; 9217 } 9218 9219 /* check source WWN for a match */ 9220 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 9221 wwn1 = wwn_to_u64(vha->port_name); 9222 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 9223 if (wwn2 == (uint64_t)-1) 9224 wwn_match++; 9225 else if (wwn1 == wwn2) 9226 wwn_match++; 9227 } 9228 9229 /* check destination WWN for a match */ 9230 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 9231 wwn1 = wwn_to_u64(fcport->port_name); 9232 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 9233 if (wwn2 == (uint64_t)-1) 9234 wwn_match++; 9235 else if (wwn1 == wwn2) 9236 wwn_match++; 9237 } 9238 9239 if (pid_match == 2 || wwn_match == 2) { 9240 /* Found a matching entry */ 9241 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 9242 priority = pri_entry->tag; 9243 break; 9244 } 9245 9246 pri_entry++; 9247 } 9248 9249 return priority; 9250 } 9251 9252 /* 9253 * qla24xx_update_fcport_fcp_prio 9254 * Activates fcp priority for the logged in fc port 9255 * 9256 * Input: 9257 * vha = scsi host structure pointer. 9258 * fcp = port structure pointer. 9259 * 9260 * Return: 9261 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9262 * 9263 * Context: 9264 * Kernel context. 9265 */ 9266 int 9267 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9268 { 9269 int ret; 9270 int priority; 9271 uint16_t mb[5]; 9272 9273 if (fcport->port_type != FCT_TARGET || 9274 fcport->loop_id == FC_NO_LOOP_ID) 9275 return QLA_FUNCTION_FAILED; 9276 9277 priority = qla24xx_get_fcp_prio(vha, fcport); 9278 if (priority < 0) 9279 return QLA_FUNCTION_FAILED; 9280 9281 if (IS_P3P_TYPE(vha->hw)) { 9282 fcport->fcp_prio = priority & 0xf; 9283 return QLA_SUCCESS; 9284 } 9285 9286 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 9287 if (ret == QLA_SUCCESS) { 9288 if (fcport->fcp_prio != priority) 9289 ql_dbg(ql_dbg_user, vha, 0x709e, 9290 "Updated FCP_CMND priority - value=%d loop_id=%d " 9291 "port_id=%02x%02x%02x.\n", priority, 9292 fcport->loop_id, fcport->d_id.b.domain, 9293 fcport->d_id.b.area, fcport->d_id.b.al_pa); 9294 fcport->fcp_prio = priority & 0xf; 9295 } else 9296 ql_dbg(ql_dbg_user, vha, 0x704f, 9297 "Unable to update FCP_CMND priority - ret=0x%x for " 9298 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 9299 fcport->d_id.b.domain, fcport->d_id.b.area, 9300 fcport->d_id.b.al_pa); 9301 return ret; 9302 } 9303 9304 /* 9305 * qla24xx_update_all_fcp_prio 9306 * Activates fcp priority for all the logged in ports 9307 * 9308 * Input: 9309 * ha = adapter block pointer. 9310 * 9311 * Return: 9312 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9313 * 9314 * Context: 9315 * Kernel context. 9316 */ 9317 int 9318 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 9319 { 9320 int ret; 9321 fc_port_t *fcport; 9322 9323 ret = QLA_FUNCTION_FAILED; 9324 /* We need to set priority for all logged in ports */ 9325 list_for_each_entry(fcport, &vha->vp_fcports, list) 9326 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 9327 9328 return ret; 9329 } 9330 9331 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 9332 int vp_idx, bool startqp) 9333 { 9334 int rsp_id = 0; 9335 int req_id = 0; 9336 int i; 9337 struct qla_hw_data *ha = vha->hw; 9338 uint16_t qpair_id = 0; 9339 struct qla_qpair *qpair = NULL; 9340 struct qla_msix_entry *msix; 9341 9342 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 9343 ql_log(ql_log_warn, vha, 0x00181, 9344 "FW/Driver is not multi-queue capable.\n"); 9345 return NULL; 9346 } 9347 9348 if (ql2xmqsupport || ql2xnvmeenable) { 9349 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 9350 if (qpair == NULL) { 9351 ql_log(ql_log_warn, vha, 0x0182, 9352 "Failed to allocate memory for queue pair.\n"); 9353 return NULL; 9354 } 9355 9356 qpair->hw = vha->hw; 9357 qpair->vha = vha; 9358 qpair->qp_lock_ptr = &qpair->qp_lock; 9359 spin_lock_init(&qpair->qp_lock); 9360 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 9361 9362 /* Assign available que pair id */ 9363 mutex_lock(&ha->mq_lock); 9364 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 9365 if (ha->num_qpairs >= ha->max_qpairs) { 9366 mutex_unlock(&ha->mq_lock); 9367 ql_log(ql_log_warn, vha, 0x0183, 9368 "No resources to create additional q pair.\n"); 9369 goto fail_qid_map; 9370 } 9371 ha->num_qpairs++; 9372 set_bit(qpair_id, ha->qpair_qid_map); 9373 ha->queue_pair_map[qpair_id] = qpair; 9374 qpair->id = qpair_id; 9375 qpair->vp_idx = vp_idx; 9376 qpair->fw_started = ha->flags.fw_started; 9377 INIT_LIST_HEAD(&qpair->hints_list); 9378 qpair->chip_reset = ha->base_qpair->chip_reset; 9379 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 9380 qpair->enable_explicit_conf = 9381 ha->base_qpair->enable_explicit_conf; 9382 9383 for (i = 0; i < ha->msix_count; i++) { 9384 msix = &ha->msix_entries[i]; 9385 if (msix->in_use) 9386 continue; 9387 qpair->msix = msix; 9388 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 9389 "Vector %x selected for qpair\n", msix->vector); 9390 break; 9391 } 9392 if (!qpair->msix) { 9393 ql_log(ql_log_warn, vha, 0x0184, 9394 "Out of MSI-X vectors!.\n"); 9395 goto fail_msix; 9396 } 9397 9398 qpair->msix->in_use = 1; 9399 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 9400 qpair->pdev = ha->pdev; 9401 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 9402 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 9403 9404 mutex_unlock(&ha->mq_lock); 9405 9406 /* Create response queue first */ 9407 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 9408 if (!rsp_id) { 9409 ql_log(ql_log_warn, vha, 0x0185, 9410 "Failed to create response queue.\n"); 9411 goto fail_rsp; 9412 } 9413 9414 qpair->rsp = ha->rsp_q_map[rsp_id]; 9415 9416 /* Create request queue */ 9417 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 9418 startqp); 9419 if (!req_id) { 9420 ql_log(ql_log_warn, vha, 0x0186, 9421 "Failed to create request queue.\n"); 9422 goto fail_req; 9423 } 9424 9425 qpair->req = ha->req_q_map[req_id]; 9426 qpair->rsp->req = qpair->req; 9427 qpair->rsp->qpair = qpair; 9428 9429 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 9430 if (ha->fw_attributes & BIT_4) 9431 qpair->difdix_supported = 1; 9432 } 9433 9434 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 9435 if (!qpair->srb_mempool) { 9436 ql_log(ql_log_warn, vha, 0xd036, 9437 "Failed to create srb mempool for qpair %d\n", 9438 qpair->id); 9439 goto fail_mempool; 9440 } 9441 9442 if (qla_create_buf_pool(vha, qpair)) { 9443 ql_log(ql_log_warn, vha, 0xd036, 9444 "Failed to initialize buf pool for qpair %d\n", 9445 qpair->id); 9446 goto fail_bufpool; 9447 } 9448 9449 /* Mark as online */ 9450 qpair->online = 1; 9451 9452 if (!vha->flags.qpairs_available) 9453 vha->flags.qpairs_available = 1; 9454 9455 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 9456 "Request/Response queue pair created, id %d\n", 9457 qpair->id); 9458 ql_dbg(ql_dbg_init, vha, 0x0187, 9459 "Request/Response queue pair created, id %d\n", 9460 qpair->id); 9461 } 9462 return qpair; 9463 9464 fail_bufpool: 9465 mempool_destroy(qpair->srb_mempool); 9466 fail_mempool: 9467 qla25xx_delete_req_que(vha, qpair->req); 9468 fail_req: 9469 qla25xx_delete_rsp_que(vha, qpair->rsp); 9470 fail_rsp: 9471 mutex_lock(&ha->mq_lock); 9472 qpair->msix->in_use = 0; 9473 list_del(&qpair->qp_list_elem); 9474 if (list_empty(&vha->qp_list)) 9475 vha->flags.qpairs_available = 0; 9476 fail_msix: 9477 ha->queue_pair_map[qpair_id] = NULL; 9478 clear_bit(qpair_id, ha->qpair_qid_map); 9479 ha->num_qpairs--; 9480 mutex_unlock(&ha->mq_lock); 9481 fail_qid_map: 9482 kfree(qpair); 9483 return NULL; 9484 } 9485 9486 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9487 { 9488 int ret = QLA_FUNCTION_FAILED; 9489 struct qla_hw_data *ha = qpair->hw; 9490 9491 qpair->delete_in_progress = 1; 9492 9493 qla_free_buf_pool(qpair); 9494 9495 ret = qla25xx_delete_req_que(vha, qpair->req); 9496 if (ret != QLA_SUCCESS) 9497 goto fail; 9498 9499 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9500 if (ret != QLA_SUCCESS) 9501 goto fail; 9502 9503 mutex_lock(&ha->mq_lock); 9504 ha->queue_pair_map[qpair->id] = NULL; 9505 clear_bit(qpair->id, ha->qpair_qid_map); 9506 ha->num_qpairs--; 9507 list_del(&qpair->qp_list_elem); 9508 if (list_empty(&vha->qp_list)) { 9509 vha->flags.qpairs_available = 0; 9510 vha->flags.qpairs_req_created = 0; 9511 vha->flags.qpairs_rsp_created = 0; 9512 } 9513 mempool_destroy(qpair->srb_mempool); 9514 kfree(qpair); 9515 mutex_unlock(&ha->mq_lock); 9516 9517 return QLA_SUCCESS; 9518 fail: 9519 return ret; 9520 } 9521 9522 uint64_t 9523 qla2x00_count_set_bits(uint32_t num) 9524 { 9525 /* Brian Kernighan's Algorithm */ 9526 u64 count = 0; 9527 9528 while (num) { 9529 num &= (num - 1); 9530 count++; 9531 } 9532 return count; 9533 } 9534 9535 uint64_t 9536 qla2x00_get_num_tgts(scsi_qla_host_t *vha) 9537 { 9538 fc_port_t *f, *tf; 9539 u64 count = 0; 9540 9541 f = NULL; 9542 tf = NULL; 9543 9544 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 9545 if (f->port_type != FCT_TARGET) 9546 continue; 9547 count++; 9548 } 9549 return count; 9550 } 9551 9552 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags) 9553 { 9554 scsi_qla_host_t *vha = shost_priv(host); 9555 fc_port_t *fcport = NULL; 9556 unsigned long int_flags; 9557 9558 if (flags & QLA2XX_HW_ERROR) 9559 vha->hw_err_cnt = 0; 9560 if (flags & QLA2XX_SHT_LNK_DWN) 9561 vha->short_link_down_cnt = 0; 9562 if (flags & QLA2XX_INT_ERR) 9563 vha->interface_err_cnt = 0; 9564 if (flags & QLA2XX_CMD_TIMEOUT) 9565 vha->cmd_timeout_cnt = 0; 9566 if (flags & QLA2XX_RESET_CMD_ERR) 9567 vha->reset_cmd_err_cnt = 0; 9568 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9569 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9570 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9571 fcport->tgt_short_link_down_cnt = 0; 9572 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9573 } 9574 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9575 } 9576 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9577 return 0; 9578 } 9579 9580 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags) 9581 { 9582 return qla2xxx_reset_stats(host, flags); 9583 } 9584 9585 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags) 9586 { 9587 return qla2xxx_reset_stats(host, flags); 9588 } 9589 9590 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags, 9591 void *data, u64 size) 9592 { 9593 scsi_qla_host_t *vha = shost_priv(host); 9594 struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data; 9595 struct ql_vnd_stats *rsp_data = &resp->stats; 9596 u64 ini_entry_count = 0; 9597 u64 i = 0; 9598 u64 entry_count = 0; 9599 u64 num_tgt = 0; 9600 u32 tmp_stat_type = 0; 9601 fc_port_t *fcport = NULL; 9602 unsigned long int_flags; 9603 9604 /* Copy stat type to work on it */ 9605 tmp_stat_type = flags; 9606 9607 if (tmp_stat_type & BIT_17) { 9608 num_tgt = qla2x00_get_num_tgts(vha); 9609 /* unset BIT_17 */ 9610 tmp_stat_type &= ~(1 << 17); 9611 } 9612 ini_entry_count = qla2x00_count_set_bits(tmp_stat_type); 9613 9614 entry_count = ini_entry_count + num_tgt; 9615 9616 rsp_data->entry_count = entry_count; 9617 9618 i = 0; 9619 if (flags & QLA2XX_HW_ERROR) { 9620 rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR; 9621 rsp_data->entry[i].tgt_num = 0x0; 9622 rsp_data->entry[i].cnt = vha->hw_err_cnt; 9623 i++; 9624 } 9625 9626 if (flags & QLA2XX_SHT_LNK_DWN) { 9627 rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN; 9628 rsp_data->entry[i].tgt_num = 0x0; 9629 rsp_data->entry[i].cnt = vha->short_link_down_cnt; 9630 i++; 9631 } 9632 9633 if (flags & QLA2XX_INT_ERR) { 9634 rsp_data->entry[i].stat_type = QLA2XX_INT_ERR; 9635 rsp_data->entry[i].tgt_num = 0x0; 9636 rsp_data->entry[i].cnt = vha->interface_err_cnt; 9637 i++; 9638 } 9639 9640 if (flags & QLA2XX_CMD_TIMEOUT) { 9641 rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT; 9642 rsp_data->entry[i].tgt_num = 0x0; 9643 rsp_data->entry[i].cnt = vha->cmd_timeout_cnt; 9644 i++; 9645 } 9646 9647 if (flags & QLA2XX_RESET_CMD_ERR) { 9648 rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR; 9649 rsp_data->entry[i].tgt_num = 0x0; 9650 rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt; 9651 i++; 9652 } 9653 9654 /* i will continue from previous loop, as target 9655 * entries are after initiator 9656 */ 9657 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9658 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9659 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9660 if (fcport->port_type != FCT_TARGET) 9661 continue; 9662 if (!fcport->rport) 9663 continue; 9664 rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN; 9665 rsp_data->entry[i].tgt_num = fcport->rport->number; 9666 rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt; 9667 i++; 9668 } 9669 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9670 } 9671 resp->status = EXT_STATUS_OK; 9672 9673 return 0; 9674 } 9675 9676 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags, 9677 struct fc_rport *rport, void *data, u64 size) 9678 { 9679 struct ql_vnd_tgt_stats_resp *tgt_data = data; 9680 fc_port_t *fcport = *(fc_port_t **)rport->dd_data; 9681 9682 tgt_data->status = 0; 9683 tgt_data->stats.entry_count = 1; 9684 tgt_data->stats.entry[0].stat_type = flags; 9685 tgt_data->stats.entry[0].tgt_num = rport->number; 9686 tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt; 9687 9688 return 0; 9689 } 9690 9691 int qla2xxx_disable_port(struct Scsi_Host *host) 9692 { 9693 scsi_qla_host_t *vha = shost_priv(host); 9694 9695 vha->hw->flags.port_isolated = 1; 9696 9697 if (qla2x00_isp_reg_stat(vha->hw)) { 9698 ql_log(ql_log_info, vha, 0x9006, 9699 "PCI/Register disconnect, exiting.\n"); 9700 qla_pci_set_eeh_busy(vha); 9701 return FAILED; 9702 } 9703 if (qla2x00_chip_is_down(vha)) 9704 return 0; 9705 9706 if (vha->flags.online) { 9707 qla2x00_abort_isp_cleanup(vha); 9708 qla2x00_wait_for_sess_deletion(vha); 9709 } 9710 9711 return 0; 9712 } 9713 9714 int qla2xxx_enable_port(struct Scsi_Host *host) 9715 { 9716 scsi_qla_host_t *vha = shost_priv(host); 9717 9718 if (qla2x00_isp_reg_stat(vha->hw)) { 9719 ql_log(ql_log_info, vha, 0x9001, 9720 "PCI/Register disconnect, exiting.\n"); 9721 qla_pci_set_eeh_busy(vha); 9722 return FAILED; 9723 } 9724 9725 vha->hw->flags.port_isolated = 0; 9726 /* Set the flag to 1, so that isp_abort can proceed */ 9727 vha->flags.online = 1; 9728 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 9729 qla2xxx_wake_dpc(vha); 9730 9731 return 0; 9732 } 9733