xref: /openbmc/linux/drivers/scsi/qla2xxx/qla_init.c (revision 9726bfcd)
1 /*
2  * QLogic Fibre Channel HBA Driver
3  * Copyright (c)  2003-2014 QLogic Corporation
4  *
5  * See LICENSE.qla2xxx for copyright and licensing details.
6  */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9 
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13 
14 #include "qla_devtbl.h"
15 
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19 
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22 
23 /*
24 *  QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
34 static int qla2x00_restart_isp(scsi_qla_host_t *);
35 
36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37 static int qla84xx_init_chip(scsi_qla_host_t *);
38 static int qla25xx_init_queues(struct qla_hw_data *);
39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41     struct event_arg *);
42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43     struct event_arg *);
44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
45 
46 /* SRB Extensions ---------------------------------------------------------- */
47 
48 void
49 qla2x00_sp_timeout(struct timer_list *t)
50 {
51 	srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
52 	struct srb_iocb *iocb;
53 	struct req_que *req;
54 	unsigned long flags;
55 	struct qla_hw_data *ha = sp->vha->hw;
56 
57 	WARN_ON_ONCE(irqs_disabled());
58 	spin_lock_irqsave(&ha->hardware_lock, flags);
59 	req = sp->qpair->req;
60 	req->outstanding_cmds[sp->handle] = NULL;
61 	iocb = &sp->u.iocb_cmd;
62 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
63 	iocb->timeout(sp);
64 }
65 
66 void
67 qla2x00_sp_free(void *ptr)
68 {
69 	srb_t *sp = ptr;
70 	struct srb_iocb *iocb = &sp->u.iocb_cmd;
71 
72 	del_timer(&iocb->timer);
73 	qla2x00_rel_sp(sp);
74 }
75 
76 /* Asynchronous Login/Logout Routines -------------------------------------- */
77 
78 unsigned long
79 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
80 {
81 	unsigned long tmo;
82 	struct qla_hw_data *ha = vha->hw;
83 
84 	/* Firmware should use switch negotiated r_a_tov for timeout. */
85 	tmo = ha->r_a_tov / 10 * 2;
86 	if (IS_QLAFX00(ha)) {
87 		tmo = FX00_DEF_RATOV * 2;
88 	} else if (!IS_FWI2_CAPABLE(ha)) {
89 		/*
90 		 * Except for earlier ISPs where the timeout is seeded from the
91 		 * initialization control block.
92 		 */
93 		tmo = ha->login_timeout;
94 	}
95 	return tmo;
96 }
97 
98 static void qla24xx_abort_iocb_timeout(void *data)
99 {
100 	srb_t *sp = data;
101 	struct srb_iocb *abt = &sp->u.iocb_cmd;
102 
103 	abt->u.abt.comp_status = CS_TIMEOUT;
104 	sp->done(sp, QLA_FUNCTION_TIMEOUT);
105 }
106 
107 static void qla24xx_abort_sp_done(void *ptr, int res)
108 {
109 	srb_t *sp = ptr;
110 	struct srb_iocb *abt = &sp->u.iocb_cmd;
111 
112 	if (del_timer(&sp->u.iocb_cmd.timer)) {
113 		if (sp->flags & SRB_WAKEUP_ON_COMP)
114 			complete(&abt->u.abt.comp);
115 		else
116 			sp->free(sp);
117 	}
118 }
119 
120 static int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
121 {
122 	scsi_qla_host_t *vha = cmd_sp->vha;
123 	struct srb_iocb *abt_iocb;
124 	srb_t *sp;
125 	int rval = QLA_FUNCTION_FAILED;
126 
127 	sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
128 				  GFP_ATOMIC);
129 	if (!sp)
130 		goto done;
131 
132 	abt_iocb = &sp->u.iocb_cmd;
133 	sp->type = SRB_ABT_CMD;
134 	sp->name = "abort";
135 	sp->qpair = cmd_sp->qpair;
136 	if (wait)
137 		sp->flags = SRB_WAKEUP_ON_COMP;
138 
139 	abt_iocb->timeout = qla24xx_abort_iocb_timeout;
140 	init_completion(&abt_iocb->u.abt.comp);
141 	/* FW can send 2 x ABTS's timeout/20s */
142 	qla2x00_init_timer(sp, 42);
143 
144 	abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
145 	abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
146 
147 	sp->done = qla24xx_abort_sp_done;
148 
149 	ql_dbg(ql_dbg_async, vha, 0x507c,
150 	       "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
151 	       cmd_sp->type);
152 
153 	rval = qla2x00_start_sp(sp);
154 	if (rval != QLA_SUCCESS)
155 		goto done_free_sp;
156 
157 	if (wait) {
158 		wait_for_completion(&abt_iocb->u.abt.comp);
159 		rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
160 			QLA_SUCCESS : QLA_FUNCTION_FAILED;
161 	} else {
162 		goto done;
163 	}
164 
165 done_free_sp:
166 	sp->free(sp);
167 done:
168 	return rval;
169 }
170 
171 void
172 qla2x00_async_iocb_timeout(void *data)
173 {
174 	srb_t *sp = data;
175 	fc_port_t *fcport = sp->fcport;
176 	struct srb_iocb *lio = &sp->u.iocb_cmd;
177 	int rc, h;
178 	unsigned long flags;
179 
180 	if (fcport) {
181 		ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
182 		    "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
183 		    sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
184 
185 		fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
186 	} else {
187 		pr_info("Async-%s timeout - hdl=%x.\n",
188 		    sp->name, sp->handle);
189 	}
190 
191 	switch (sp->type) {
192 	case SRB_LOGIN_CMD:
193 		rc = qla24xx_async_abort_cmd(sp, false);
194 		if (rc) {
195 			/* Retry as needed. */
196 			lio->u.logio.data[0] = MBS_COMMAND_ERROR;
197 			lio->u.logio.data[1] =
198 				lio->u.logio.flags & SRB_LOGIN_RETRIED ?
199 				QLA_LOGIO_LOGIN_RETRIED : 0;
200 			spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
201 			for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
202 			    h++) {
203 				if (sp->qpair->req->outstanding_cmds[h] ==
204 				    sp) {
205 					sp->qpair->req->outstanding_cmds[h] =
206 					    NULL;
207 					break;
208 				}
209 			}
210 			spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
211 			sp->done(sp, QLA_FUNCTION_TIMEOUT);
212 		}
213 		break;
214 	case SRB_LOGOUT_CMD:
215 	case SRB_CT_PTHRU_CMD:
216 	case SRB_MB_IOCB:
217 	case SRB_NACK_PLOGI:
218 	case SRB_NACK_PRLI:
219 	case SRB_NACK_LOGO:
220 	case SRB_CTRL_VP:
221 		rc = qla24xx_async_abort_cmd(sp, false);
222 		if (rc) {
223 			spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
224 			for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
225 			    h++) {
226 				if (sp->qpair->req->outstanding_cmds[h] ==
227 				    sp) {
228 					sp->qpair->req->outstanding_cmds[h] =
229 					    NULL;
230 					break;
231 				}
232 			}
233 			spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
234 			sp->done(sp, QLA_FUNCTION_TIMEOUT);
235 		}
236 		break;
237 	}
238 }
239 
240 static void
241 qla2x00_async_login_sp_done(void *ptr, int res)
242 {
243 	srb_t *sp = ptr;
244 	struct scsi_qla_host *vha = sp->vha;
245 	struct srb_iocb *lio = &sp->u.iocb_cmd;
246 	struct event_arg ea;
247 
248 	ql_dbg(ql_dbg_disc, vha, 0x20dd,
249 	    "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
250 
251 	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
252 
253 	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
254 		memset(&ea, 0, sizeof(ea));
255 		ea.event = FCME_PLOGI_DONE;
256 		ea.fcport = sp->fcport;
257 		ea.data[0] = lio->u.logio.data[0];
258 		ea.data[1] = lio->u.logio.data[1];
259 		ea.iop[0] = lio->u.logio.iop[0];
260 		ea.iop[1] = lio->u.logio.iop[1];
261 		ea.sp = sp;
262 		qla2x00_fcport_event_handler(vha, &ea);
263 	}
264 
265 	sp->free(sp);
266 }
267 
268 static inline bool
269 fcport_is_smaller(fc_port_t *fcport)
270 {
271 	if (wwn_to_u64(fcport->port_name) <
272 	    wwn_to_u64(fcport->vha->port_name))
273 		return true;
274 	else
275 		return false;
276 }
277 
278 static inline bool
279 fcport_is_bigger(fc_port_t *fcport)
280 {
281 	return !fcport_is_smaller(fcport);
282 }
283 
284 int
285 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
286     uint16_t *data)
287 {
288 	srb_t *sp;
289 	struct srb_iocb *lio;
290 	int rval = QLA_FUNCTION_FAILED;
291 
292 	if (!vha->flags.online)
293 		goto done;
294 
295 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
296 	if (!sp)
297 		goto done;
298 
299 	fcport->flags |= FCF_ASYNC_SENT;
300 	fcport->logout_completed = 0;
301 
302 	fcport->disc_state = DSC_LOGIN_PEND;
303 	sp->type = SRB_LOGIN_CMD;
304 	sp->name = "login";
305 	sp->gen1 = fcport->rscn_gen;
306 	sp->gen2 = fcport->login_gen;
307 
308 	lio = &sp->u.iocb_cmd;
309 	lio->timeout = qla2x00_async_iocb_timeout;
310 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
311 
312 	sp->done = qla2x00_async_login_sp_done;
313 	if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
314 		lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
315 	else
316 		lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
317 
318 	if (fcport->fc4f_nvme)
319 		lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
320 
321 	ql_dbg(ql_dbg_disc, vha, 0x2072,
322 	    "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
323 		"retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
324 	    fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
325 	    fcport->login_retry);
326 
327 	rval = qla2x00_start_sp(sp);
328 	if (rval != QLA_SUCCESS) {
329 		fcport->flags |= FCF_LOGIN_NEEDED;
330 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
331 		goto done_free_sp;
332 	}
333 
334 	return rval;
335 
336 done_free_sp:
337 	sp->free(sp);
338 	fcport->flags &= ~FCF_ASYNC_SENT;
339 done:
340 	fcport->flags &= ~FCF_ASYNC_ACTIVE;
341 	return rval;
342 }
343 
344 static void
345 qla2x00_async_logout_sp_done(void *ptr, int res)
346 {
347 	srb_t *sp = ptr;
348 
349 	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
350 	sp->fcport->login_gen++;
351 	qlt_logo_completion_handler(sp->fcport, res);
352 	sp->free(sp);
353 }
354 
355 int
356 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
357 {
358 	srb_t *sp;
359 	struct srb_iocb *lio;
360 	int rval = QLA_FUNCTION_FAILED;
361 
362 	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
363 		return rval;
364 
365 	fcport->flags |= FCF_ASYNC_SENT;
366 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
367 	if (!sp)
368 		goto done;
369 
370 	sp->type = SRB_LOGOUT_CMD;
371 	sp->name = "logout";
372 
373 	lio = &sp->u.iocb_cmd;
374 	lio->timeout = qla2x00_async_iocb_timeout;
375 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
376 
377 	sp->done = qla2x00_async_logout_sp_done;
378 
379 	ql_dbg(ql_dbg_disc, vha, 0x2070,
380 	    "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
381 	    sp->handle, fcport->loop_id, fcport->d_id.b.domain,
382 		fcport->d_id.b.area, fcport->d_id.b.al_pa,
383 		fcport->port_name);
384 
385 	rval = qla2x00_start_sp(sp);
386 	if (rval != QLA_SUCCESS)
387 		goto done_free_sp;
388 	return rval;
389 
390 done_free_sp:
391 	sp->free(sp);
392 done:
393 	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
394 	return rval;
395 }
396 
397 void
398 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
399     uint16_t *data)
400 {
401 	fcport->flags &= ~FCF_ASYNC_ACTIVE;
402 	/* Don't re-login in target mode */
403 	if (!fcport->tgt_session)
404 		qla2x00_mark_device_lost(vha, fcport, 1, 0);
405 	qlt_logo_completion_handler(fcport, data[0]);
406 }
407 
408 static void
409 qla2x00_async_prlo_sp_done(void *s, int res)
410 {
411 	srb_t *sp = (srb_t *)s;
412 	struct srb_iocb *lio = &sp->u.iocb_cmd;
413 	struct scsi_qla_host *vha = sp->vha;
414 
415 	sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
416 	if (!test_bit(UNLOADING, &vha->dpc_flags))
417 		qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
418 		    lio->u.logio.data);
419 	sp->free(sp);
420 }
421 
422 int
423 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
424 {
425 	srb_t *sp;
426 	struct srb_iocb *lio;
427 	int rval;
428 
429 	rval = QLA_FUNCTION_FAILED;
430 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
431 	if (!sp)
432 		goto done;
433 
434 	sp->type = SRB_PRLO_CMD;
435 	sp->name = "prlo";
436 
437 	lio = &sp->u.iocb_cmd;
438 	lio->timeout = qla2x00_async_iocb_timeout;
439 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
440 
441 	sp->done = qla2x00_async_prlo_sp_done;
442 
443 	ql_dbg(ql_dbg_disc, vha, 0x2070,
444 	    "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
445 	    sp->handle, fcport->loop_id, fcport->d_id.b.domain,
446 	    fcport->d_id.b.area, fcport->d_id.b.al_pa);
447 
448 	rval = qla2x00_start_sp(sp);
449 	if (rval != QLA_SUCCESS)
450 		goto done_free_sp;
451 
452 	return rval;
453 
454 done_free_sp:
455 	sp->free(sp);
456 done:
457 	fcport->flags &= ~FCF_ASYNC_ACTIVE;
458 	return rval;
459 }
460 
461 static
462 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
463 {
464 	struct fc_port *fcport = ea->fcport;
465 
466 	ql_dbg(ql_dbg_disc, vha, 0x20d2,
467 	    "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
468 	    __func__, fcport->port_name, fcport->disc_state,
469 	    fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
470 	    fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
471 
472 	if (ea->data[0] != MBS_COMMAND_COMPLETE) {
473 		ql_dbg(ql_dbg_disc, vha, 0x2066,
474 		    "%s %8phC: adisc fail: post delete\n",
475 		    __func__, ea->fcport->port_name);
476 		/* deleted = 0 & logout_on_delete = force fw cleanup */
477 		fcport->deleted = 0;
478 		fcport->logout_on_delete = 1;
479 		qlt_schedule_sess_for_deletion(ea->fcport);
480 		return;
481 	}
482 
483 	if (ea->fcport->disc_state == DSC_DELETE_PEND)
484 		return;
485 
486 	if (ea->sp->gen2 != ea->fcport->login_gen) {
487 		/* target side must have changed it. */
488 		ql_dbg(ql_dbg_disc, vha, 0x20d3,
489 		    "%s %8phC generation changed\n",
490 		    __func__, ea->fcport->port_name);
491 		return;
492 	} else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
493 		qla_rscn_replay(fcport);
494 		qlt_schedule_sess_for_deletion(fcport);
495 		return;
496 	}
497 
498 	__qla24xx_handle_gpdb_event(vha, ea);
499 }
500 
501 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
502 {
503 	struct qla_work_evt *e;
504 
505 	e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
506 	if (!e)
507 		return QLA_FUNCTION_FAILED;
508 
509 	e->u.fcport.fcport = fcport;
510 	fcport->flags |= FCF_ASYNC_ACTIVE;
511 	return qla2x00_post_work(vha, e);
512 }
513 
514 static void
515 qla2x00_async_adisc_sp_done(void *ptr, int res)
516 {
517 	srb_t *sp = ptr;
518 	struct scsi_qla_host *vha = sp->vha;
519 	struct event_arg ea;
520 	struct srb_iocb *lio = &sp->u.iocb_cmd;
521 
522 	ql_dbg(ql_dbg_disc, vha, 0x2066,
523 	    "Async done-%s res %x %8phC\n",
524 	    sp->name, res, sp->fcport->port_name);
525 
526 	sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
527 
528 	memset(&ea, 0, sizeof(ea));
529 	ea.event = FCME_ADISC_DONE;
530 	ea.rc = res;
531 	ea.data[0] = lio->u.logio.data[0];
532 	ea.data[1] = lio->u.logio.data[1];
533 	ea.iop[0] = lio->u.logio.iop[0];
534 	ea.iop[1] = lio->u.logio.iop[1];
535 	ea.fcport = sp->fcport;
536 	ea.sp = sp;
537 
538 	qla2x00_fcport_event_handler(vha, &ea);
539 
540 	sp->free(sp);
541 }
542 
543 int
544 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
545     uint16_t *data)
546 {
547 	srb_t *sp;
548 	struct srb_iocb *lio;
549 	int rval = QLA_FUNCTION_FAILED;
550 
551 	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
552 		return rval;
553 
554 	fcport->flags |= FCF_ASYNC_SENT;
555 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
556 	if (!sp)
557 		goto done;
558 
559 	sp->type = SRB_ADISC_CMD;
560 	sp->name = "adisc";
561 
562 	lio = &sp->u.iocb_cmd;
563 	lio->timeout = qla2x00_async_iocb_timeout;
564 	sp->gen1 = fcport->rscn_gen;
565 	sp->gen2 = fcport->login_gen;
566 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
567 
568 	sp->done = qla2x00_async_adisc_sp_done;
569 	if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
570 		lio->u.logio.flags |= SRB_LOGIN_RETRIED;
571 
572 	ql_dbg(ql_dbg_disc, vha, 0x206f,
573 	    "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
574 	    sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
575 
576 	rval = qla2x00_start_sp(sp);
577 	if (rval != QLA_SUCCESS)
578 		goto done_free_sp;
579 
580 	return rval;
581 
582 done_free_sp:
583 	sp->free(sp);
584 done:
585 	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
586 	qla2x00_post_async_adisc_work(vha, fcport, data);
587 	return rval;
588 }
589 
590 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
591 {
592 	struct qla_hw_data *ha = vha->hw;
593 
594 	if (IS_FWI2_CAPABLE(ha))
595 		return loop_id > NPH_LAST_HANDLE;
596 
597 	return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
598 		loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
599 }
600 
601 /**
602  * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
603  * @vha: adapter state pointer.
604  * @dev: port structure pointer.
605  *
606  * Returns:
607  *	qla2x00 local function return status code.
608  *
609  * Context:
610  *	Kernel context.
611  */
612 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
613 {
614 	int	rval;
615 	struct qla_hw_data *ha = vha->hw;
616 	unsigned long flags = 0;
617 
618 	rval = QLA_SUCCESS;
619 
620 	spin_lock_irqsave(&ha->vport_slock, flags);
621 
622 	dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
623 	if (dev->loop_id >= LOOPID_MAP_SIZE ||
624 	    qla2x00_is_reserved_id(vha, dev->loop_id)) {
625 		dev->loop_id = FC_NO_LOOP_ID;
626 		rval = QLA_FUNCTION_FAILED;
627 	} else {
628 		set_bit(dev->loop_id, ha->loop_id_map);
629 	}
630 	spin_unlock_irqrestore(&ha->vport_slock, flags);
631 
632 	if (rval == QLA_SUCCESS)
633 		ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
634 		       "Assigning new loopid=%x, portid=%x.\n",
635 		       dev->loop_id, dev->d_id.b24);
636 	else
637 		ql_log(ql_log_warn, dev->vha, 0x2087,
638 		       "No loop_id's available, portid=%x.\n",
639 		       dev->d_id.b24);
640 
641 	return rval;
642 }
643 
644 void qla2x00_clear_loop_id(fc_port_t *fcport)
645 {
646 	struct qla_hw_data *ha = fcport->vha->hw;
647 
648 	if (fcport->loop_id == FC_NO_LOOP_ID ||
649 	    qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
650 		return;
651 
652 	clear_bit(fcport->loop_id, ha->loop_id_map);
653 	fcport->loop_id = FC_NO_LOOP_ID;
654 }
655 
656 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
657 	struct event_arg *ea)
658 {
659 	fc_port_t *fcport, *conflict_fcport;
660 	struct get_name_list_extended *e;
661 	u16 i, n, found = 0, loop_id;
662 	port_id_t id;
663 	u64 wwn;
664 	u16 data[2];
665 	u8 current_login_state;
666 
667 	fcport = ea->fcport;
668 	ql_dbg(ql_dbg_disc, vha, 0xffff,
669 	    "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
670 	    __func__, fcport->port_name, fcport->disc_state,
671 	    fcport->fw_login_state, ea->rc,
672 	    fcport->login_gen, fcport->last_login_gen,
673 	    fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
674 
675 	if (fcport->disc_state == DSC_DELETE_PEND)
676 		return;
677 
678 	if (ea->rc) { /* rval */
679 		if (fcport->login_retry == 0) {
680 			ql_dbg(ql_dbg_disc, vha, 0x20de,
681 			    "GNL failed Port login retry %8phN, retry cnt=%d.\n",
682 			    fcport->port_name, fcport->login_retry);
683 		}
684 		return;
685 	}
686 
687 	if (fcport->last_rscn_gen != fcport->rscn_gen) {
688 		qla_rscn_replay(fcport);
689 		qlt_schedule_sess_for_deletion(fcport);
690 		return;
691 	} else if (fcport->last_login_gen != fcport->login_gen) {
692 		ql_dbg(ql_dbg_disc, vha, 0x20e0,
693 		    "%s %8phC login gen changed\n",
694 		    __func__, fcport->port_name);
695 		return;
696 	}
697 
698 	n = ea->data[0] / sizeof(struct get_name_list_extended);
699 
700 	ql_dbg(ql_dbg_disc, vha, 0x20e1,
701 	    "%s %d %8phC n %d %02x%02x%02x lid %d \n",
702 	    __func__, __LINE__, fcport->port_name, n,
703 	    fcport->d_id.b.domain, fcport->d_id.b.area,
704 	    fcport->d_id.b.al_pa, fcport->loop_id);
705 
706 	for (i = 0; i < n; i++) {
707 		e = &vha->gnl.l[i];
708 		wwn = wwn_to_u64(e->port_name);
709 		id.b.domain = e->port_id[2];
710 		id.b.area = e->port_id[1];
711 		id.b.al_pa = e->port_id[0];
712 		id.b.rsvd_1 = 0;
713 
714 		if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
715 			continue;
716 
717 		if (IS_SW_RESV_ADDR(id))
718 			continue;
719 
720 		found = 1;
721 
722 		loop_id = le16_to_cpu(e->nport_handle);
723 		loop_id = (loop_id & 0x7fff);
724 		if  (fcport->fc4f_nvme)
725 			current_login_state = e->current_login_state >> 4;
726 		else
727 			current_login_state = e->current_login_state & 0xf;
728 
729 
730 		ql_dbg(ql_dbg_disc, vha, 0x20e2,
731 		    "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
732 		    __func__, fcport->port_name,
733 		    e->current_login_state, fcport->fw_login_state,
734 		    fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa,
735 		    fcport->d_id.b.domain, fcport->d_id.b.area,
736 		    fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
737 
738 		switch (fcport->disc_state) {
739 		case DSC_DELETE_PEND:
740 		case DSC_DELETED:
741 			break;
742 		default:
743 			if ((id.b24 != fcport->d_id.b24 &&
744 			    fcport->d_id.b24) ||
745 			    (fcport->loop_id != FC_NO_LOOP_ID &&
746 				fcport->loop_id != loop_id)) {
747 				ql_dbg(ql_dbg_disc, vha, 0x20e3,
748 				    "%s %d %8phC post del sess\n",
749 				    __func__, __LINE__, fcport->port_name);
750 				qlt_schedule_sess_for_deletion(fcport);
751 				return;
752 			}
753 			break;
754 		}
755 
756 		fcport->loop_id = loop_id;
757 
758 		wwn = wwn_to_u64(fcport->port_name);
759 		qlt_find_sess_invalidate_other(vha, wwn,
760 			id, loop_id, &conflict_fcport);
761 
762 		if (conflict_fcport) {
763 			/*
764 			 * Another share fcport share the same loop_id &
765 			 * nport id. Conflict fcport needs to finish
766 			 * cleanup before this fcport can proceed to login.
767 			 */
768 			conflict_fcport->conflict = fcport;
769 			fcport->login_pause = 1;
770 		}
771 
772 		switch (vha->hw->current_topology) {
773 		default:
774 			switch (current_login_state) {
775 			case DSC_LS_PRLI_COMP:
776 				ql_dbg(ql_dbg_disc + ql_dbg_verbose,
777 				    vha, 0x20e4, "%s %d %8phC post gpdb\n",
778 				    __func__, __LINE__, fcport->port_name);
779 
780 				if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
781 					fcport->port_type = FCT_INITIATOR;
782 				else
783 					fcport->port_type = FCT_TARGET;
784 				data[0] = data[1] = 0;
785 				qla2x00_post_async_adisc_work(vha, fcport,
786 				    data);
787 				break;
788 			case DSC_LS_PORT_UNAVAIL:
789 			default:
790 				if (fcport->loop_id == FC_NO_LOOP_ID) {
791 					qla2x00_find_new_loop_id(vha, fcport);
792 					fcport->fw_login_state =
793 					    DSC_LS_PORT_UNAVAIL;
794 				}
795 				ql_dbg(ql_dbg_disc, vha, 0x20e5,
796 				    "%s %d %8phC\n", __func__, __LINE__,
797 				    fcport->port_name);
798 				qla24xx_fcport_handle_login(vha, fcport);
799 				break;
800 			}
801 			break;
802 		case ISP_CFG_N:
803 			fcport->fw_login_state = current_login_state;
804 			fcport->d_id = id;
805 			switch (current_login_state) {
806 			case DSC_LS_PRLI_COMP:
807 				if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
808 					fcport->port_type = FCT_INITIATOR;
809 				else
810 					fcport->port_type = FCT_TARGET;
811 
812 				data[0] = data[1] = 0;
813 				qla2x00_post_async_adisc_work(vha, fcport,
814 				    data);
815 				break;
816 			case DSC_LS_PLOGI_COMP:
817 				if (fcport_is_bigger(fcport)) {
818 					/* local adapter is smaller */
819 					if (fcport->loop_id != FC_NO_LOOP_ID)
820 						qla2x00_clear_loop_id(fcport);
821 
822 					fcport->loop_id = loop_id;
823 					qla24xx_fcport_handle_login(vha,
824 					    fcport);
825 					break;
826 				}
827 				/* fall through */
828 			default:
829 				if (fcport_is_smaller(fcport)) {
830 					/* local adapter is bigger */
831 					if (fcport->loop_id != FC_NO_LOOP_ID)
832 						qla2x00_clear_loop_id(fcport);
833 
834 					fcport->loop_id = loop_id;
835 					qla24xx_fcport_handle_login(vha,
836 					    fcport);
837 				}
838 				break;
839 			}
840 			break;
841 		} /* switch (ha->current_topology) */
842 	}
843 
844 	if (!found) {
845 		switch (vha->hw->current_topology) {
846 		case ISP_CFG_F:
847 		case ISP_CFG_FL:
848 			for (i = 0; i < n; i++) {
849 				e = &vha->gnl.l[i];
850 				id.b.domain = e->port_id[0];
851 				id.b.area = e->port_id[1];
852 				id.b.al_pa = e->port_id[2];
853 				id.b.rsvd_1 = 0;
854 				loop_id = le16_to_cpu(e->nport_handle);
855 
856 				if (fcport->d_id.b24 == id.b24) {
857 					conflict_fcport =
858 					    qla2x00_find_fcport_by_wwpn(vha,
859 						e->port_name, 0);
860 					if (conflict_fcport) {
861 						ql_dbg(ql_dbg_disc + ql_dbg_verbose,
862 						    vha, 0x20e5,
863 						    "%s %d %8phC post del sess\n",
864 						    __func__, __LINE__,
865 						    conflict_fcport->port_name);
866 						qlt_schedule_sess_for_deletion
867 							(conflict_fcport);
868 					}
869 				}
870 				/*
871 				 * FW already picked this loop id for
872 				 * another fcport
873 				 */
874 				if (fcport->loop_id == loop_id)
875 					fcport->loop_id = FC_NO_LOOP_ID;
876 			}
877 			qla24xx_fcport_handle_login(vha, fcport);
878 			break;
879 		case ISP_CFG_N:
880 			fcport->disc_state = DSC_DELETED;
881 			if (time_after_eq(jiffies, fcport->dm_login_expire)) {
882 				if (fcport->n2n_link_reset_cnt < 2) {
883 					fcport->n2n_link_reset_cnt++;
884 					/*
885 					 * remote port is not sending PLOGI.
886 					 * Reset link to kick start his state
887 					 * machine
888 					 */
889 					set_bit(N2N_LINK_RESET,
890 					    &vha->dpc_flags);
891 				} else {
892 					if (fcport->n2n_chip_reset < 1) {
893 						ql_log(ql_log_info, vha, 0x705d,
894 						    "Chip reset to bring laser down");
895 						set_bit(ISP_ABORT_NEEDED,
896 						    &vha->dpc_flags);
897 						fcport->n2n_chip_reset++;
898 					} else {
899 						ql_log(ql_log_info, vha, 0x705d,
900 						    "Remote port %8ph is not coming back\n",
901 						    fcport->port_name);
902 						fcport->scan_state = 0;
903 					}
904 				}
905 				qla2xxx_wake_dpc(vha);
906 			} else {
907 				/*
908 				 * report port suppose to do PLOGI. Give him
909 				 * more time. FW will catch it.
910 				 */
911 				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
912 			}
913 			break;
914 		default:
915 			break;
916 		}
917 	}
918 } /* gnl_event */
919 
920 static void
921 qla24xx_async_gnl_sp_done(void *s, int res)
922 {
923 	struct srb *sp = s;
924 	struct scsi_qla_host *vha = sp->vha;
925 	unsigned long flags;
926 	struct fc_port *fcport = NULL, *tf;
927 	u16 i, n = 0, loop_id;
928 	struct event_arg ea;
929 	struct get_name_list_extended *e;
930 	u64 wwn;
931 	struct list_head h;
932 	bool found = false;
933 
934 	ql_dbg(ql_dbg_disc, vha, 0x20e7,
935 	    "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
936 	    sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
937 	    sp->u.iocb_cmd.u.mbx.in_mb[2]);
938 
939 	if (res == QLA_FUNCTION_TIMEOUT)
940 		return;
941 
942 	sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
943 	memset(&ea, 0, sizeof(ea));
944 	ea.sp = sp;
945 	ea.rc = res;
946 	ea.event = FCME_GNL_DONE;
947 
948 	if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
949 	    sizeof(struct get_name_list_extended)) {
950 		n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
951 		    sizeof(struct get_name_list_extended);
952 		ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
953 	}
954 
955 	for (i = 0; i < n; i++) {
956 		e = &vha->gnl.l[i];
957 		loop_id = le16_to_cpu(e->nport_handle);
958 		/* mask out reserve bit */
959 		loop_id = (loop_id & 0x7fff);
960 		set_bit(loop_id, vha->hw->loop_id_map);
961 		wwn = wwn_to_u64(e->port_name);
962 
963 		ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
964 		    "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
965 		    __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
966 		    e->port_id[0], e->current_login_state, e->last_login_state,
967 		    (loop_id & 0x7fff));
968 	}
969 
970 	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
971 
972 	INIT_LIST_HEAD(&h);
973 	fcport = tf = NULL;
974 	if (!list_empty(&vha->gnl.fcports))
975 		list_splice_init(&vha->gnl.fcports, &h);
976 	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
977 
978 	list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
979 		list_del_init(&fcport->gnl_entry);
980 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
981 		fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
982 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
983 		ea.fcport = fcport;
984 
985 		qla2x00_fcport_event_handler(vha, &ea);
986 	}
987 
988 	/* create new fcport if fw has knowledge of new sessions */
989 	for (i = 0; i < n; i++) {
990 		port_id_t id;
991 		u64 wwnn;
992 
993 		e = &vha->gnl.l[i];
994 		wwn = wwn_to_u64(e->port_name);
995 
996 		found = false;
997 		list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
998 			if (!memcmp((u8 *)&wwn, fcport->port_name,
999 			    WWN_SIZE)) {
1000 				found = true;
1001 				break;
1002 			}
1003 		}
1004 
1005 		id.b.domain = e->port_id[2];
1006 		id.b.area = e->port_id[1];
1007 		id.b.al_pa = e->port_id[0];
1008 		id.b.rsvd_1 = 0;
1009 
1010 		if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1011 			ql_dbg(ql_dbg_disc, vha, 0x2065,
1012 			    "%s %d %8phC %06x post new sess\n",
1013 			    __func__, __LINE__, (u8 *)&wwn, id.b24);
1014 			wwnn = wwn_to_u64(e->node_name);
1015 			qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1016 			    (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
1017 		}
1018 	}
1019 
1020 	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1021 	vha->gnl.sent = 0;
1022 	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1023 
1024 	sp->free(sp);
1025 }
1026 
1027 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1028 {
1029 	srb_t *sp;
1030 	struct srb_iocb *mbx;
1031 	int rval = QLA_FUNCTION_FAILED;
1032 	unsigned long flags;
1033 	u16 *mb;
1034 
1035 	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1036 		return rval;
1037 
1038 	ql_dbg(ql_dbg_disc, vha, 0x20d9,
1039 	    "Async-gnlist WWPN %8phC \n", fcport->port_name);
1040 
1041 	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1042 	fcport->flags |= FCF_ASYNC_SENT;
1043 	fcport->disc_state = DSC_GNL;
1044 	fcport->last_rscn_gen = fcport->rscn_gen;
1045 	fcport->last_login_gen = fcport->login_gen;
1046 
1047 	list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1048 	if (vha->gnl.sent) {
1049 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1050 		return QLA_SUCCESS;
1051 	}
1052 	vha->gnl.sent = 1;
1053 	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1054 
1055 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1056 	if (!sp)
1057 		goto done;
1058 
1059 	sp->type = SRB_MB_IOCB;
1060 	sp->name = "gnlist";
1061 	sp->gen1 = fcport->rscn_gen;
1062 	sp->gen2 = fcport->login_gen;
1063 
1064 	mbx = &sp->u.iocb_cmd;
1065 	mbx->timeout = qla2x00_async_iocb_timeout;
1066 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
1067 
1068 	mb = sp->u.iocb_cmd.u.mbx.out_mb;
1069 	mb[0] = MBC_PORT_NODE_NAME_LIST;
1070 	mb[1] = BIT_2 | BIT_3;
1071 	mb[2] = MSW(vha->gnl.ldma);
1072 	mb[3] = LSW(vha->gnl.ldma);
1073 	mb[6] = MSW(MSD(vha->gnl.ldma));
1074 	mb[7] = LSW(MSD(vha->gnl.ldma));
1075 	mb[8] = vha->gnl.size;
1076 	mb[9] = vha->vp_idx;
1077 
1078 	sp->done = qla24xx_async_gnl_sp_done;
1079 
1080 	ql_dbg(ql_dbg_disc, vha, 0x20da,
1081 	    "Async-%s - OUT WWPN %8phC hndl %x\n",
1082 	    sp->name, fcport->port_name, sp->handle);
1083 
1084 	rval = qla2x00_start_sp(sp);
1085 	if (rval != QLA_SUCCESS)
1086 		goto done_free_sp;
1087 
1088 	return rval;
1089 
1090 done_free_sp:
1091 	sp->free(sp);
1092 	fcport->flags &= ~FCF_ASYNC_SENT;
1093 done:
1094 	return rval;
1095 }
1096 
1097 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1098 {
1099 	struct qla_work_evt *e;
1100 
1101 	e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1102 	if (!e)
1103 		return QLA_FUNCTION_FAILED;
1104 
1105 	e->u.fcport.fcport = fcport;
1106 	fcport->flags |= FCF_ASYNC_ACTIVE;
1107 	return qla2x00_post_work(vha, e);
1108 }
1109 
1110 static
1111 void qla24xx_async_gpdb_sp_done(void *s, int res)
1112 {
1113 	struct srb *sp = s;
1114 	struct scsi_qla_host *vha = sp->vha;
1115 	struct qla_hw_data *ha = vha->hw;
1116 	fc_port_t *fcport = sp->fcport;
1117 	u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1118 	struct event_arg ea;
1119 
1120 	ql_dbg(ql_dbg_disc, vha, 0x20db,
1121 	    "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1122 	    sp->name, res, fcport->port_name, mb[1], mb[2]);
1123 
1124 	if (res == QLA_FUNCTION_TIMEOUT) {
1125 		dma_pool_free(sp->vha->hw->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1126 			sp->u.iocb_cmd.u.mbx.in_dma);
1127 		return;
1128 	}
1129 
1130 	fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1131 	memset(&ea, 0, sizeof(ea));
1132 	ea.event = FCME_GPDB_DONE;
1133 	ea.fcport = fcport;
1134 	ea.sp = sp;
1135 
1136 	qla2x00_fcport_event_handler(vha, &ea);
1137 
1138 	dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1139 		sp->u.iocb_cmd.u.mbx.in_dma);
1140 
1141 	sp->free(sp);
1142 }
1143 
1144 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1145 {
1146 	struct qla_work_evt *e;
1147 
1148 	e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1149 	if (!e)
1150 		return QLA_FUNCTION_FAILED;
1151 
1152 	e->u.fcport.fcport = fcport;
1153 
1154 	return qla2x00_post_work(vha, e);
1155 }
1156 
1157 static void
1158 qla2x00_async_prli_sp_done(void *ptr, int res)
1159 {
1160 	srb_t *sp = ptr;
1161 	struct scsi_qla_host *vha = sp->vha;
1162 	struct srb_iocb *lio = &sp->u.iocb_cmd;
1163 	struct event_arg ea;
1164 
1165 	ql_dbg(ql_dbg_disc, vha, 0x2129,
1166 	    "%s %8phC res %d \n", __func__,
1167 	    sp->fcport->port_name, res);
1168 
1169 	sp->fcport->flags &= ~FCF_ASYNC_SENT;
1170 
1171 	if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1172 		memset(&ea, 0, sizeof(ea));
1173 		ea.event = FCME_PRLI_DONE;
1174 		ea.fcport = sp->fcport;
1175 		ea.data[0] = lio->u.logio.data[0];
1176 		ea.data[1] = lio->u.logio.data[1];
1177 		ea.iop[0] = lio->u.logio.iop[0];
1178 		ea.iop[1] = lio->u.logio.iop[1];
1179 		ea.sp = sp;
1180 
1181 		qla2x00_fcport_event_handler(vha, &ea);
1182 	}
1183 
1184 	sp->free(sp);
1185 }
1186 
1187 int
1188 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1189 {
1190 	srb_t *sp;
1191 	struct srb_iocb *lio;
1192 	int rval = QLA_FUNCTION_FAILED;
1193 
1194 	if (!vha->flags.online)
1195 		return rval;
1196 
1197 	if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1198 	    fcport->fw_login_state == DSC_LS_PRLI_PEND)
1199 		return rval;
1200 
1201 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1202 	if (!sp)
1203 		return rval;
1204 
1205 	fcport->flags |= FCF_ASYNC_SENT;
1206 	fcport->logout_completed = 0;
1207 
1208 	sp->type = SRB_PRLI_CMD;
1209 	sp->name = "prli";
1210 
1211 	lio = &sp->u.iocb_cmd;
1212 	lio->timeout = qla2x00_async_iocb_timeout;
1213 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1214 
1215 	sp->done = qla2x00_async_prli_sp_done;
1216 	lio->u.logio.flags = 0;
1217 
1218 	if  (fcport->fc4f_nvme)
1219 		lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1220 
1221 	ql_dbg(ql_dbg_disc, vha, 0x211b,
1222 	    "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1223 	    fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1224 	    fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc");
1225 
1226 	rval = qla2x00_start_sp(sp);
1227 	if (rval != QLA_SUCCESS) {
1228 		fcport->flags |= FCF_LOGIN_NEEDED;
1229 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1230 		goto done_free_sp;
1231 	}
1232 
1233 	return rval;
1234 
1235 done_free_sp:
1236 	sp->free(sp);
1237 	fcport->flags &= ~FCF_ASYNC_SENT;
1238 	return rval;
1239 }
1240 
1241 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1242 {
1243 	struct qla_work_evt *e;
1244 
1245 	e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1246 	if (!e)
1247 		return QLA_FUNCTION_FAILED;
1248 
1249 	e->u.fcport.fcport = fcport;
1250 	e->u.fcport.opt = opt;
1251 	fcport->flags |= FCF_ASYNC_ACTIVE;
1252 	return qla2x00_post_work(vha, e);
1253 }
1254 
1255 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1256 {
1257 	srb_t *sp;
1258 	struct srb_iocb *mbx;
1259 	int rval = QLA_FUNCTION_FAILED;
1260 	u16 *mb;
1261 	dma_addr_t pd_dma;
1262 	struct port_database_24xx *pd;
1263 	struct qla_hw_data *ha = vha->hw;
1264 
1265 	if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1266 		return rval;
1267 
1268 	fcport->disc_state = DSC_GPDB;
1269 
1270 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1271 	if (!sp)
1272 		goto done;
1273 
1274 	fcport->flags |= FCF_ASYNC_SENT;
1275 	sp->type = SRB_MB_IOCB;
1276 	sp->name = "gpdb";
1277 	sp->gen1 = fcport->rscn_gen;
1278 	sp->gen2 = fcport->login_gen;
1279 
1280 	mbx = &sp->u.iocb_cmd;
1281 	mbx->timeout = qla2x00_async_iocb_timeout;
1282 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1283 
1284 	pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1285 	if (pd == NULL) {
1286 		ql_log(ql_log_warn, vha, 0xd043,
1287 		    "Failed to allocate port database structure.\n");
1288 		goto done_free_sp;
1289 	}
1290 
1291 	mb = sp->u.iocb_cmd.u.mbx.out_mb;
1292 	mb[0] = MBC_GET_PORT_DATABASE;
1293 	mb[1] = fcport->loop_id;
1294 	mb[2] = MSW(pd_dma);
1295 	mb[3] = LSW(pd_dma);
1296 	mb[6] = MSW(MSD(pd_dma));
1297 	mb[7] = LSW(MSD(pd_dma));
1298 	mb[9] = vha->vp_idx;
1299 	mb[10] = opt;
1300 
1301 	mbx->u.mbx.in = (void *)pd;
1302 	mbx->u.mbx.in_dma = pd_dma;
1303 
1304 	sp->done = qla24xx_async_gpdb_sp_done;
1305 
1306 	ql_dbg(ql_dbg_disc, vha, 0x20dc,
1307 	    "Async-%s %8phC hndl %x opt %x\n",
1308 	    sp->name, fcport->port_name, sp->handle, opt);
1309 
1310 	rval = qla2x00_start_sp(sp);
1311 	if (rval != QLA_SUCCESS)
1312 		goto done_free_sp;
1313 	return rval;
1314 
1315 done_free_sp:
1316 	if (pd)
1317 		dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1318 
1319 	sp->free(sp);
1320 	fcport->flags &= ~FCF_ASYNC_SENT;
1321 done:
1322 	qla24xx_post_gpdb_work(vha, fcport, opt);
1323 	return rval;
1324 }
1325 
1326 static
1327 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1328 {
1329 	unsigned long flags;
1330 
1331 	spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1332 	ea->fcport->login_gen++;
1333 	ea->fcport->deleted = 0;
1334 	ea->fcport->logout_on_delete = 1;
1335 
1336 	if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1337 		vha->fcport_count++;
1338 		ea->fcport->login_succ = 1;
1339 
1340 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1341 		qla24xx_sched_upd_fcport(ea->fcport);
1342 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1343 	} else if (ea->fcport->login_succ) {
1344 		/*
1345 		 * We have an existing session. A late RSCN delivery
1346 		 * must have triggered the session to be re-validate.
1347 		 * Session is still valid.
1348 		 */
1349 		ql_dbg(ql_dbg_disc, vha, 0x20d6,
1350 		    "%s %d %8phC session revalidate success\n",
1351 		    __func__, __LINE__, ea->fcport->port_name);
1352 		ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
1353 	}
1354 	spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1355 }
1356 
1357 static
1358 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1359 {
1360 	fc_port_t *fcport = ea->fcport;
1361 	struct port_database_24xx *pd;
1362 	struct srb *sp = ea->sp;
1363 	uint8_t	ls;
1364 
1365 	pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1366 
1367 	fcport->flags &= ~FCF_ASYNC_SENT;
1368 
1369 	ql_dbg(ql_dbg_disc, vha, 0x20d2,
1370 	    "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name,
1371 	    fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme,
1372 	    ea->rc);
1373 
1374 	if (fcport->disc_state == DSC_DELETE_PEND)
1375 		return;
1376 
1377 	if (fcport->fc4f_nvme)
1378 		ls = pd->current_login_state >> 4;
1379 	else
1380 		ls = pd->current_login_state & 0xf;
1381 
1382 	if (ea->sp->gen2 != fcport->login_gen) {
1383 		/* target side must have changed it. */
1384 
1385 		ql_dbg(ql_dbg_disc, vha, 0x20d3,
1386 		    "%s %8phC generation changed\n",
1387 		    __func__, fcport->port_name);
1388 		return;
1389 	} else if (ea->sp->gen1 != fcport->rscn_gen) {
1390 		qla_rscn_replay(fcport);
1391 		qlt_schedule_sess_for_deletion(fcport);
1392 		return;
1393 	}
1394 
1395 	switch (ls) {
1396 	case PDS_PRLI_COMPLETE:
1397 		__qla24xx_parse_gpdb(vha, fcport, pd);
1398 		break;
1399 	case PDS_PLOGI_PENDING:
1400 	case PDS_PLOGI_COMPLETE:
1401 	case PDS_PRLI_PENDING:
1402 	case PDS_PRLI2_PENDING:
1403 		/* Set discovery state back to GNL to Relogin attempt */
1404 		if (qla_dual_mode_enabled(vha) ||
1405 		    qla_ini_mode_enabled(vha)) {
1406 			fcport->disc_state = DSC_GNL;
1407 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1408 		}
1409 		return;
1410 	case PDS_LOGO_PENDING:
1411 	case PDS_PORT_UNAVAILABLE:
1412 	default:
1413 		ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1414 		    __func__, __LINE__, fcport->port_name);
1415 		qlt_schedule_sess_for_deletion(fcport);
1416 		return;
1417 	}
1418 	__qla24xx_handle_gpdb_event(vha, ea);
1419 } /* gpdb event */
1420 
1421 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1422 {
1423 	u8 login = 0;
1424 	int rc;
1425 
1426 	if (qla_tgt_mode_enabled(vha))
1427 		return;
1428 
1429 	if (qla_dual_mode_enabled(vha)) {
1430 		if (N2N_TOPO(vha->hw)) {
1431 			u64 mywwn, wwn;
1432 
1433 			mywwn = wwn_to_u64(vha->port_name);
1434 			wwn = wwn_to_u64(fcport->port_name);
1435 			if (mywwn > wwn)
1436 				login = 1;
1437 			else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1438 			    && time_after_eq(jiffies,
1439 				    fcport->plogi_nack_done_deadline))
1440 				login = 1;
1441 		} else {
1442 			login = 1;
1443 		}
1444 	} else {
1445 		/* initiator mode */
1446 		login = 1;
1447 	}
1448 
1449 	if (login && fcport->login_retry) {
1450 		fcport->login_retry--;
1451 		if (fcport->loop_id == FC_NO_LOOP_ID) {
1452 			fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1453 			rc = qla2x00_find_new_loop_id(vha, fcport);
1454 			if (rc) {
1455 				ql_dbg(ql_dbg_disc, vha, 0x20e6,
1456 				    "%s %d %8phC post del sess - out of loopid\n",
1457 				    __func__, __LINE__, fcport->port_name);
1458 				fcport->scan_state = 0;
1459 				qlt_schedule_sess_for_deletion(fcport);
1460 				return;
1461 			}
1462 		}
1463 		ql_dbg(ql_dbg_disc, vha, 0x20bf,
1464 		    "%s %d %8phC post login\n",
1465 		    __func__, __LINE__, fcport->port_name);
1466 		qla2x00_post_async_login_work(vha, fcport, NULL);
1467 	}
1468 }
1469 
1470 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1471 {
1472 	u16 data[2];
1473 	u64 wwn;
1474 	u16 sec;
1475 
1476 	ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8,
1477 	    "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
1478 	    __func__, fcport->port_name, fcport->disc_state,
1479 	    fcport->fw_login_state, fcport->login_pause, fcport->flags,
1480 	    fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1481 	    fcport->login_gen, fcport->loop_id, fcport->scan_state);
1482 
1483 	if (fcport->scan_state != QLA_FCPORT_FOUND)
1484 		return 0;
1485 
1486 	if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1487 	    ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1488 	     (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1489 		return 0;
1490 
1491 	if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1492 		if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1493 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1494 			return 0;
1495 		}
1496 	}
1497 
1498 	/* for pure Target Mode. Login will not be initiated */
1499 	if (vha->host->active_mode == MODE_TARGET)
1500 		return 0;
1501 
1502 	if (fcport->flags & FCF_ASYNC_SENT) {
1503 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1504 		return 0;
1505 	}
1506 
1507 	switch (fcport->disc_state) {
1508 	case DSC_DELETED:
1509 		wwn = wwn_to_u64(fcport->node_name);
1510 		switch (vha->hw->current_topology) {
1511 		case ISP_CFG_N:
1512 			if (fcport_is_smaller(fcport)) {
1513 				/* this adapter is bigger */
1514 				if (fcport->login_retry) {
1515 					if (fcport->loop_id == FC_NO_LOOP_ID) {
1516 						qla2x00_find_new_loop_id(vha,
1517 						    fcport);
1518 						fcport->fw_login_state =
1519 						    DSC_LS_PORT_UNAVAIL;
1520 					}
1521 					fcport->login_retry--;
1522 					qla_post_els_plogi_work(vha, fcport);
1523 				} else {
1524 					ql_log(ql_log_info, vha, 0x705d,
1525 					    "Unable to reach remote port %8phC",
1526 					    fcport->port_name);
1527 				}
1528 			} else {
1529 				qla24xx_post_gnl_work(vha, fcport);
1530 			}
1531 			break;
1532 		default:
1533 			if (wwn == 0)    {
1534 				ql_dbg(ql_dbg_disc, vha, 0xffff,
1535 				    "%s %d %8phC post GNNID\n",
1536 				    __func__, __LINE__, fcport->port_name);
1537 				qla24xx_post_gnnid_work(vha, fcport);
1538 			} else if (fcport->loop_id == FC_NO_LOOP_ID) {
1539 				ql_dbg(ql_dbg_disc, vha, 0x20bd,
1540 				    "%s %d %8phC post gnl\n",
1541 				    __func__, __LINE__, fcport->port_name);
1542 				qla24xx_post_gnl_work(vha, fcport);
1543 			} else {
1544 				qla_chk_n2n_b4_login(vha, fcport);
1545 			}
1546 			break;
1547 		}
1548 		break;
1549 
1550 	case DSC_GNL:
1551 		switch (vha->hw->current_topology) {
1552 		case ISP_CFG_N:
1553 			if ((fcport->current_login_state & 0xf) == 0x6) {
1554 				ql_dbg(ql_dbg_disc, vha, 0x2118,
1555 				    "%s %d %8phC post GPDB work\n",
1556 				    __func__, __LINE__, fcport->port_name);
1557 				fcport->chip_reset =
1558 					vha->hw->base_qpair->chip_reset;
1559 				qla24xx_post_gpdb_work(vha, fcport, 0);
1560 			}  else {
1561 				ql_dbg(ql_dbg_disc, vha, 0x2118,
1562 				    "%s %d %8phC post NVMe PRLI\n",
1563 				    __func__, __LINE__, fcport->port_name);
1564 				qla24xx_post_prli_work(vha, fcport);
1565 			}
1566 			break;
1567 		default:
1568 			if (fcport->login_pause) {
1569 				fcport->last_rscn_gen = fcport->rscn_gen;
1570 				fcport->last_login_gen = fcport->login_gen;
1571 				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1572 				break;
1573 			}
1574 			qla_chk_n2n_b4_login(vha, fcport);
1575 			break;
1576 		}
1577 		break;
1578 
1579 	case DSC_LOGIN_FAILED:
1580 		if (N2N_TOPO(vha->hw))
1581 			qla_chk_n2n_b4_login(vha, fcport);
1582 		else
1583 			qlt_schedule_sess_for_deletion(fcport);
1584 		break;
1585 
1586 	case DSC_LOGIN_COMPLETE:
1587 		/* recheck login state */
1588 		data[0] = data[1] = 0;
1589 		qla2x00_post_async_adisc_work(vha, fcport, data);
1590 		break;
1591 
1592 	case DSC_LOGIN_PEND:
1593 		if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1594 			qla24xx_post_prli_work(vha, fcport);
1595 		break;
1596 
1597 	case DSC_UPD_FCPORT:
1598 		sec =  jiffies_to_msecs(jiffies -
1599 		    fcport->jiffies_at_registration)/1000;
1600 		if (fcport->sec_since_registration < sec && sec &&
1601 		    !(sec % 60)) {
1602 			fcport->sec_since_registration = sec;
1603 			ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1604 			    "%s %8phC - Slow Rport registration(%d Sec)\n",
1605 			    __func__, fcport->port_name, sec);
1606 		}
1607 
1608 		if (fcport->next_disc_state != DSC_DELETE_PEND)
1609 			fcport->next_disc_state = DSC_ADISC;
1610 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1611 		break;
1612 
1613 	default:
1614 		break;
1615 	}
1616 
1617 	return 0;
1618 }
1619 
1620 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1621     u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1622 {
1623 	struct qla_work_evt *e;
1624 
1625 	e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1626 	if (!e)
1627 		return QLA_FUNCTION_FAILED;
1628 
1629 	e->u.new_sess.id = *id;
1630 	e->u.new_sess.pla = pla;
1631 	e->u.new_sess.fc4_type = fc4_type;
1632 	memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1633 	if (node_name)
1634 		memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1635 
1636 	return qla2x00_post_work(vha, e);
1637 }
1638 
1639 static
1640 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1641 	struct event_arg *ea)
1642 {
1643 	fc_port_t *fcport = ea->fcport;
1644 
1645 	ql_dbg(ql_dbg_disc, vha, 0x2102,
1646 	    "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1647 	    __func__, fcport->port_name, fcport->disc_state,
1648 	    fcport->fw_login_state, fcport->login_pause,
1649 	    fcport->deleted, fcport->conflict,
1650 	    fcport->last_rscn_gen, fcport->rscn_gen,
1651 	    fcport->last_login_gen, fcport->login_gen,
1652 	    fcport->flags);
1653 
1654 	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1655 	    (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1656 		return;
1657 
1658 	if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1659 		if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1660 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1661 			return;
1662 		}
1663 	}
1664 
1665 	if (fcport->last_rscn_gen != fcport->rscn_gen) {
1666 		ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
1667 		    __func__, __LINE__, fcport->port_name);
1668 
1669 		return;
1670 	}
1671 
1672 	qla24xx_fcport_handle_login(vha, fcport);
1673 }
1674 
1675 
1676 static void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1677 				      struct event_arg *ea)
1678 {
1679 	ql_dbg(ql_dbg_disc, vha, 0x2118,
1680 	    "%s %d %8phC post PRLI\n",
1681 	    __func__, __LINE__, ea->fcport->port_name);
1682 	qla24xx_post_prli_work(vha, ea->fcport);
1683 }
1684 
1685 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
1686 {
1687 	fc_port_t *fcport;
1688 
1689 	switch (ea->event) {
1690 	case FCME_RELOGIN:
1691 		if (test_bit(UNLOADING, &vha->dpc_flags))
1692 			return;
1693 
1694 		qla24xx_handle_relogin_event(vha, ea);
1695 		break;
1696 	case FCME_RSCN:
1697 		if (test_bit(UNLOADING, &vha->dpc_flags))
1698 			return;
1699 		{
1700 			unsigned long flags;
1701 
1702 			fcport = qla2x00_find_fcport_by_nportid
1703 				(vha, &ea->id, 1);
1704 			if (fcport) {
1705 				fcport->scan_needed = 1;
1706 				fcport->rscn_gen++;
1707 			}
1708 
1709 			spin_lock_irqsave(&vha->work_lock, flags);
1710 			if (vha->scan.scan_flags == 0) {
1711 				ql_dbg(ql_dbg_disc, vha, 0xffff,
1712 				    "%s: schedule\n", __func__);
1713 				vha->scan.scan_flags |= SF_QUEUED;
1714 				schedule_delayed_work(&vha->scan.scan_work, 5);
1715 			}
1716 			spin_unlock_irqrestore(&vha->work_lock, flags);
1717 		}
1718 		break;
1719 	case FCME_GNL_DONE:
1720 		qla24xx_handle_gnl_done_event(vha, ea);
1721 		break;
1722 	case FCME_GPSC_DONE:
1723 		qla24xx_handle_gpsc_event(vha, ea);
1724 		break;
1725 	case FCME_PLOGI_DONE:	/* Initiator side sent LLIOCB */
1726 		qla24xx_handle_plogi_done_event(vha, ea);
1727 		break;
1728 	case FCME_PRLI_DONE:
1729 		qla24xx_handle_prli_done_event(vha, ea);
1730 		break;
1731 	case FCME_GPDB_DONE:
1732 		qla24xx_handle_gpdb_event(vha, ea);
1733 		break;
1734 	case FCME_GPNID_DONE:
1735 		qla24xx_handle_gpnid_event(vha, ea);
1736 		break;
1737 	case FCME_GFFID_DONE:
1738 		qla24xx_handle_gffid_event(vha, ea);
1739 		break;
1740 	case FCME_ADISC_DONE:
1741 		qla24xx_handle_adisc_event(vha, ea);
1742 		break;
1743 	case FCME_GNNID_DONE:
1744 		qla24xx_handle_gnnid_event(vha, ea);
1745 		break;
1746 	case FCME_GFPNID_DONE:
1747 		qla24xx_handle_gfpnid_event(vha, ea);
1748 		break;
1749 	case FCME_ELS_PLOGI_DONE:
1750 		qla_handle_els_plogi_done(vha, ea);
1751 		break;
1752 	default:
1753 		BUG_ON(1);
1754 		break;
1755 	}
1756 }
1757 
1758 /*
1759  * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1760  * to be consumed by the fcport
1761  */
1762 void qla_rscn_replay(fc_port_t *fcport)
1763 {
1764 	struct event_arg ea;
1765 
1766 	switch (fcport->disc_state) {
1767 	case DSC_DELETE_PEND:
1768 		return;
1769 	default:
1770 		break;
1771 	}
1772 
1773 	if (fcport->scan_needed) {
1774 		memset(&ea, 0, sizeof(ea));
1775 		ea.event = FCME_RSCN;
1776 		ea.id = fcport->d_id;
1777 		ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1778 		qla2x00_fcport_event_handler(fcport->vha, &ea);
1779 	}
1780 }
1781 
1782 static void
1783 qla2x00_tmf_iocb_timeout(void *data)
1784 {
1785 	srb_t *sp = data;
1786 	struct srb_iocb *tmf = &sp->u.iocb_cmd;
1787 
1788 	tmf->u.tmf.comp_status = CS_TIMEOUT;
1789 	complete(&tmf->u.tmf.comp);
1790 }
1791 
1792 static void
1793 qla2x00_tmf_sp_done(void *ptr, int res)
1794 {
1795 	srb_t *sp = ptr;
1796 	struct srb_iocb *tmf = &sp->u.iocb_cmd;
1797 
1798 	complete(&tmf->u.tmf.comp);
1799 }
1800 
1801 int
1802 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1803 	uint32_t tag)
1804 {
1805 	struct scsi_qla_host *vha = fcport->vha;
1806 	struct srb_iocb *tm_iocb;
1807 	srb_t *sp;
1808 	int rval = QLA_FUNCTION_FAILED;
1809 
1810 	sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1811 	if (!sp)
1812 		goto done;
1813 
1814 	tm_iocb = &sp->u.iocb_cmd;
1815 	sp->type = SRB_TM_CMD;
1816 	sp->name = "tmf";
1817 
1818 	tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1819 	init_completion(&tm_iocb->u.tmf.comp);
1820 	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1821 
1822 	tm_iocb->u.tmf.flags = flags;
1823 	tm_iocb->u.tmf.lun = lun;
1824 	tm_iocb->u.tmf.data = tag;
1825 	sp->done = qla2x00_tmf_sp_done;
1826 
1827 	ql_dbg(ql_dbg_taskm, vha, 0x802f,
1828 	    "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1829 	    sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1830 	    fcport->d_id.b.area, fcport->d_id.b.al_pa);
1831 
1832 	rval = qla2x00_start_sp(sp);
1833 	if (rval != QLA_SUCCESS)
1834 		goto done_free_sp;
1835 	wait_for_completion(&tm_iocb->u.tmf.comp);
1836 
1837 	rval = tm_iocb->u.tmf.data;
1838 
1839 	if (rval != QLA_SUCCESS) {
1840 		ql_log(ql_log_warn, vha, 0x8030,
1841 		    "TM IOCB failed (%x).\n", rval);
1842 	}
1843 
1844 	if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1845 		flags = tm_iocb->u.tmf.flags;
1846 		lun = (uint16_t)tm_iocb->u.tmf.lun;
1847 
1848 		/* Issue Marker IOCB */
1849 		qla2x00_marker(vha, vha->hw->base_qpair,
1850 		    fcport->loop_id, lun,
1851 		    flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1852 	}
1853 
1854 done_free_sp:
1855 	sp->free(sp);
1856 	fcport->flags &= ~FCF_ASYNC_SENT;
1857 done:
1858 	return rval;
1859 }
1860 
1861 int
1862 qla24xx_async_abort_command(srb_t *sp)
1863 {
1864 	unsigned long   flags = 0;
1865 
1866 	uint32_t	handle;
1867 	fc_port_t	*fcport = sp->fcport;
1868 	struct qla_qpair *qpair = sp->qpair;
1869 	struct scsi_qla_host *vha = fcport->vha;
1870 	struct req_que *req = qpair->req;
1871 
1872 	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1873 	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1874 		if (req->outstanding_cmds[handle] == sp)
1875 			break;
1876 	}
1877 	spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1878 
1879 	if (handle == req->num_outstanding_cmds) {
1880 		/* Command not found. */
1881 		return QLA_FUNCTION_FAILED;
1882 	}
1883 	if (sp->type == SRB_FXIOCB_DCMD)
1884 		return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1885 		    FXDISC_ABORT_IOCTL);
1886 
1887 	return qla24xx_async_abort_cmd(sp, true);
1888 }
1889 
1890 static void
1891 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1892 {
1893 	switch (ea->data[0]) {
1894 	case MBS_COMMAND_COMPLETE:
1895 		ql_dbg(ql_dbg_disc, vha, 0x2118,
1896 		    "%s %d %8phC post gpdb\n",
1897 		    __func__, __LINE__, ea->fcport->port_name);
1898 
1899 		ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1900 		ea->fcport->logout_on_delete = 1;
1901 		ea->fcport->nvme_prli_service_param = ea->iop[0];
1902 		if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
1903 			ea->fcport->nvme_first_burst_size =
1904 			    (ea->iop[1] & 0xffff) * 512;
1905 		else
1906 			ea->fcport->nvme_first_burst_size = 0;
1907 		qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1908 		break;
1909 	default:
1910 		if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1911 		    (ea->iop[1] == 0x50000)) {   /* reson 5=busy expl:0x0 */
1912 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1913 			ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1914 			break;
1915 		}
1916 
1917 		if (ea->fcport->n2n_flag) {
1918 			ql_dbg(ql_dbg_disc, vha, 0x2118,
1919 				"%s %d %8phC post fc4 prli\n",
1920 				__func__, __LINE__, ea->fcport->port_name);
1921 			ea->fcport->fc4f_nvme = 0;
1922 			ea->fcport->n2n_flag = 0;
1923 			qla24xx_post_prli_work(vha, ea->fcport);
1924 		}
1925 		ql_dbg(ql_dbg_disc, vha, 0x2119,
1926 		    "%s %d %8phC unhandle event of %x\n",
1927 		    __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1928 		break;
1929 	}
1930 }
1931 
1932 static void
1933 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1934 {
1935 	port_id_t cid;	/* conflict Nport id */
1936 	u16 lid;
1937 	struct fc_port *conflict_fcport;
1938 	unsigned long flags;
1939 	struct fc_port *fcport = ea->fcport;
1940 
1941 	ql_dbg(ql_dbg_disc, vha, 0xffff,
1942 	    "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1943 	    __func__, fcport->port_name, fcport->disc_state,
1944 	    fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1945 	    ea->sp->gen1, fcport->rscn_gen,
1946 	    ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1947 
1948 	if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1949 	    (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1950 		ql_dbg(ql_dbg_disc, vha, 0x20ea,
1951 		    "%s %d %8phC Remote is trying to login\n",
1952 		    __func__, __LINE__, fcport->port_name);
1953 		return;
1954 	}
1955 
1956 	if (fcport->disc_state == DSC_DELETE_PEND)
1957 		return;
1958 
1959 	if (ea->sp->gen2 != fcport->login_gen) {
1960 		/* target side must have changed it. */
1961 		ql_dbg(ql_dbg_disc, vha, 0x20d3,
1962 		    "%s %8phC generation changed\n",
1963 		    __func__, fcport->port_name);
1964 		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1965 		return;
1966 	} else if (ea->sp->gen1 != fcport->rscn_gen) {
1967 		ql_dbg(ql_dbg_disc, vha, 0x20d3,
1968 		    "%s %8phC RSCN generation changed\n",
1969 		    __func__, fcport->port_name);
1970 		qla_rscn_replay(fcport);
1971 		qlt_schedule_sess_for_deletion(fcport);
1972 		return;
1973 	}
1974 
1975 	switch (ea->data[0]) {
1976 	case MBS_COMMAND_COMPLETE:
1977 		/*
1978 		 * Driver must validate login state - If PRLI not complete,
1979 		 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1980 		 * requests.
1981 		 */
1982 		if (ea->fcport->fc4f_nvme) {
1983 			ql_dbg(ql_dbg_disc, vha, 0x2117,
1984 				"%s %d %8phC post prli\n",
1985 				__func__, __LINE__, ea->fcport->port_name);
1986 			qla24xx_post_prli_work(vha, ea->fcport);
1987 		} else {
1988 			ql_dbg(ql_dbg_disc, vha, 0x20ea,
1989 			    "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1990 			    __func__, __LINE__, ea->fcport->port_name,
1991 			    ea->fcport->loop_id, ea->fcport->d_id.b24);
1992 
1993 			set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1994 			spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1995 			ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1996 			ea->fcport->logout_on_delete = 1;
1997 			ea->fcport->send_els_logo = 0;
1998 			ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
1999 			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2000 
2001 			qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2002 		}
2003 		break;
2004 	case MBS_COMMAND_ERROR:
2005 		ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2006 		    __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2007 
2008 		ea->fcport->flags &= ~FCF_ASYNC_SENT;
2009 		ea->fcport->disc_state = DSC_LOGIN_FAILED;
2010 		if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
2011 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2012 		else
2013 			qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
2014 		break;
2015 	case MBS_LOOP_ID_USED:
2016 		/* data[1] = IO PARAM 1 = nport ID  */
2017 		cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2018 		cid.b.area   = (ea->iop[1] >>  8) & 0xff;
2019 		cid.b.al_pa  = ea->iop[1] & 0xff;
2020 		cid.b.rsvd_1 = 0;
2021 
2022 		ql_dbg(ql_dbg_disc, vha, 0x20ec,
2023 		    "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2024 		    __func__, __LINE__, ea->fcport->port_name,
2025 		    ea->fcport->loop_id, cid.b24);
2026 
2027 		set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2028 		ea->fcport->loop_id = FC_NO_LOOP_ID;
2029 		qla24xx_post_gnl_work(vha, ea->fcport);
2030 		break;
2031 	case MBS_PORT_ID_USED:
2032 		lid = ea->iop[1] & 0xffff;
2033 		qlt_find_sess_invalidate_other(vha,
2034 		    wwn_to_u64(ea->fcport->port_name),
2035 		    ea->fcport->d_id, lid, &conflict_fcport);
2036 
2037 		if (conflict_fcport) {
2038 			/*
2039 			 * Another fcport share the same loop_id/nport id.
2040 			 * Conflict fcport needs to finish cleanup before this
2041 			 * fcport can proceed to login.
2042 			 */
2043 			conflict_fcport->conflict = ea->fcport;
2044 			ea->fcport->login_pause = 1;
2045 
2046 			ql_dbg(ql_dbg_disc, vha, 0x20ed,
2047 			    "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2048 			    __func__, __LINE__, ea->fcport->port_name,
2049 			    ea->fcport->d_id.b24, lid);
2050 		} else {
2051 			ql_dbg(ql_dbg_disc, vha, 0x20ed,
2052 			    "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2053 			    __func__, __LINE__, ea->fcport->port_name,
2054 			    ea->fcport->d_id.b24, lid);
2055 
2056 			qla2x00_clear_loop_id(ea->fcport);
2057 			set_bit(lid, vha->hw->loop_id_map);
2058 			ea->fcport->loop_id = lid;
2059 			ea->fcport->keep_nport_handle = 0;
2060 			qlt_schedule_sess_for_deletion(ea->fcport);
2061 		}
2062 		break;
2063 	}
2064 	return;
2065 }
2066 
2067 void
2068 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
2069     uint16_t *data)
2070 {
2071 	qlt_logo_completion_handler(fcport, data[0]);
2072 	fcport->login_gen++;
2073 	fcport->flags &= ~FCF_ASYNC_ACTIVE;
2074 	return;
2075 }
2076 
2077 /****************************************************************************/
2078 /*                QLogic ISP2x00 Hardware Support Functions.                */
2079 /****************************************************************************/
2080 
2081 static int
2082 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2083 {
2084 	int rval = QLA_SUCCESS;
2085 	struct qla_hw_data *ha = vha->hw;
2086 	uint32_t idc_major_ver, idc_minor_ver;
2087 	uint16_t config[4];
2088 
2089 	qla83xx_idc_lock(vha, 0);
2090 
2091 	/* SV: TODO: Assign initialization timeout from
2092 	 * flash-info / other param
2093 	 */
2094 	ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2095 	ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2096 
2097 	/* Set our fcoe function presence */
2098 	if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2099 		ql_dbg(ql_dbg_p3p, vha, 0xb077,
2100 		    "Error while setting DRV-Presence.\n");
2101 		rval = QLA_FUNCTION_FAILED;
2102 		goto exit;
2103 	}
2104 
2105 	/* Decide the reset ownership */
2106 	qla83xx_reset_ownership(vha);
2107 
2108 	/*
2109 	 * On first protocol driver load:
2110 	 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2111 	 * register.
2112 	 * Others: Check compatibility with current IDC Major version.
2113 	 */
2114 	qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2115 	if (ha->flags.nic_core_reset_owner) {
2116 		/* Set IDC Major version */
2117 		idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2118 		qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2119 
2120 		/* Clearing IDC-Lock-Recovery register */
2121 		qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2122 	} else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2123 		/*
2124 		 * Clear further IDC participation if we are not compatible with
2125 		 * the current IDC Major Version.
2126 		 */
2127 		ql_log(ql_log_warn, vha, 0xb07d,
2128 		    "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2129 		    idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2130 		__qla83xx_clear_drv_presence(vha);
2131 		rval = QLA_FUNCTION_FAILED;
2132 		goto exit;
2133 	}
2134 	/* Each function sets its supported Minor version. */
2135 	qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2136 	idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2137 	qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2138 
2139 	if (ha->flags.nic_core_reset_owner) {
2140 		memset(config, 0, sizeof(config));
2141 		if (!qla81xx_get_port_config(vha, config))
2142 			qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2143 			    QLA8XXX_DEV_READY);
2144 	}
2145 
2146 	rval = qla83xx_idc_state_handler(vha);
2147 
2148 exit:
2149 	qla83xx_idc_unlock(vha, 0);
2150 
2151 	return rval;
2152 }
2153 
2154 /*
2155 * qla2x00_initialize_adapter
2156 *      Initialize board.
2157 *
2158 * Input:
2159 *      ha = adapter block pointer.
2160 *
2161 * Returns:
2162 *      0 = success
2163 */
2164 int
2165 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2166 {
2167 	int	rval;
2168 	struct qla_hw_data *ha = vha->hw;
2169 	struct req_que *req = ha->req_q_map[0];
2170 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2171 
2172 	memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2173 	memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2174 
2175 	/* Clear adapter flags. */
2176 	vha->flags.online = 0;
2177 	ha->flags.chip_reset_done = 0;
2178 	vha->flags.reset_active = 0;
2179 	ha->flags.pci_channel_io_perm_failure = 0;
2180 	ha->flags.eeh_busy = 0;
2181 	vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2182 	atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2183 	atomic_set(&vha->loop_state, LOOP_DOWN);
2184 	vha->device_flags = DFLG_NO_CABLE;
2185 	vha->dpc_flags = 0;
2186 	vha->flags.management_server_logged_in = 0;
2187 	vha->marker_needed = 0;
2188 	ha->isp_abort_cnt = 0;
2189 	ha->beacon_blink_led = 0;
2190 
2191 	set_bit(0, ha->req_qid_map);
2192 	set_bit(0, ha->rsp_qid_map);
2193 
2194 	ql_dbg(ql_dbg_init, vha, 0x0040,
2195 	    "Configuring PCI space...\n");
2196 	rval = ha->isp_ops->pci_config(vha);
2197 	if (rval) {
2198 		ql_log(ql_log_warn, vha, 0x0044,
2199 		    "Unable to configure PCI space.\n");
2200 		return (rval);
2201 	}
2202 
2203 	ha->isp_ops->reset_chip(vha);
2204 
2205 	/* Check for secure flash support */
2206 	if (IS_QLA28XX(ha)) {
2207 		if (RD_REG_DWORD(&reg->mailbox12) & BIT_0) {
2208 			ql_log(ql_log_info, vha, 0xffff, "Adapter is Secure\n");
2209 			ha->flags.secure_adapter = 1;
2210 		}
2211 	}
2212 
2213 
2214 	rval = qla2xxx_get_flash_info(vha);
2215 	if (rval) {
2216 		ql_log(ql_log_fatal, vha, 0x004f,
2217 		    "Unable to validate FLASH data.\n");
2218 		return rval;
2219 	}
2220 
2221 	if (IS_QLA8044(ha)) {
2222 		qla8044_read_reset_template(vha);
2223 
2224 		/* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2225 		 * If DONRESET_BIT0 is set, drivers should not set dev_state
2226 		 * to NEED_RESET. But if NEED_RESET is set, drivers should
2227 		 * should honor the reset. */
2228 		if (ql2xdontresethba == 1)
2229 			qla8044_set_idc_dontreset(vha);
2230 	}
2231 
2232 	ha->isp_ops->get_flash_version(vha, req->ring);
2233 	ql_dbg(ql_dbg_init, vha, 0x0061,
2234 	    "Configure NVRAM parameters...\n");
2235 
2236 	ha->isp_ops->nvram_config(vha);
2237 
2238 	if (ha->flags.disable_serdes) {
2239 		/* Mask HBA via NVRAM settings? */
2240 		ql_log(ql_log_info, vha, 0x0077,
2241 		    "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2242 		return QLA_FUNCTION_FAILED;
2243 	}
2244 
2245 	ql_dbg(ql_dbg_init, vha, 0x0078,
2246 	    "Verifying loaded RISC code...\n");
2247 
2248 	if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2249 		rval = ha->isp_ops->chip_diag(vha);
2250 		if (rval)
2251 			return (rval);
2252 		rval = qla2x00_setup_chip(vha);
2253 		if (rval)
2254 			return (rval);
2255 	}
2256 
2257 	if (IS_QLA84XX(ha)) {
2258 		ha->cs84xx = qla84xx_get_chip(vha);
2259 		if (!ha->cs84xx) {
2260 			ql_log(ql_log_warn, vha, 0x00d0,
2261 			    "Unable to configure ISP84XX.\n");
2262 			return QLA_FUNCTION_FAILED;
2263 		}
2264 	}
2265 
2266 	if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2267 		rval = qla2x00_init_rings(vha);
2268 
2269 	ha->flags.chip_reset_done = 1;
2270 
2271 	if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2272 		/* Issue verify 84xx FW IOCB to complete 84xx initialization */
2273 		rval = qla84xx_init_chip(vha);
2274 		if (rval != QLA_SUCCESS) {
2275 			ql_log(ql_log_warn, vha, 0x00d4,
2276 			    "Unable to initialize ISP84XX.\n");
2277 			qla84xx_put_chip(vha);
2278 		}
2279 	}
2280 
2281 	/* Load the NIC Core f/w if we are the first protocol driver. */
2282 	if (IS_QLA8031(ha)) {
2283 		rval = qla83xx_nic_core_fw_load(vha);
2284 		if (rval)
2285 			ql_log(ql_log_warn, vha, 0x0124,
2286 			    "Error in initializing NIC Core f/w.\n");
2287 	}
2288 
2289 	if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2290 		qla24xx_read_fcp_prio_cfg(vha);
2291 
2292 	if (IS_P3P_TYPE(ha))
2293 		qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2294 	else
2295 		qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2296 
2297 	return (rval);
2298 }
2299 
2300 /**
2301  * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2302  * @vha: HA context
2303  *
2304  * Returns 0 on success.
2305  */
2306 int
2307 qla2100_pci_config(scsi_qla_host_t *vha)
2308 {
2309 	uint16_t w;
2310 	unsigned long flags;
2311 	struct qla_hw_data *ha = vha->hw;
2312 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2313 
2314 	pci_set_master(ha->pdev);
2315 	pci_try_set_mwi(ha->pdev);
2316 
2317 	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2318 	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2319 	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2320 
2321 	pci_disable_rom(ha->pdev);
2322 
2323 	/* Get PCI bus information. */
2324 	spin_lock_irqsave(&ha->hardware_lock, flags);
2325 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2326 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2327 
2328 	return QLA_SUCCESS;
2329 }
2330 
2331 /**
2332  * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2333  * @vha: HA context
2334  *
2335  * Returns 0 on success.
2336  */
2337 int
2338 qla2300_pci_config(scsi_qla_host_t *vha)
2339 {
2340 	uint16_t	w;
2341 	unsigned long   flags = 0;
2342 	uint32_t	cnt;
2343 	struct qla_hw_data *ha = vha->hw;
2344 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2345 
2346 	pci_set_master(ha->pdev);
2347 	pci_try_set_mwi(ha->pdev);
2348 
2349 	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2350 	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2351 
2352 	if (IS_QLA2322(ha) || IS_QLA6322(ha))
2353 		w &= ~PCI_COMMAND_INTX_DISABLE;
2354 	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2355 
2356 	/*
2357 	 * If this is a 2300 card and not 2312, reset the
2358 	 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2359 	 * the 2310 also reports itself as a 2300 so we need to get the
2360 	 * fb revision level -- a 6 indicates it really is a 2300 and
2361 	 * not a 2310.
2362 	 */
2363 	if (IS_QLA2300(ha)) {
2364 		spin_lock_irqsave(&ha->hardware_lock, flags);
2365 
2366 		/* Pause RISC. */
2367 		WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2368 		for (cnt = 0; cnt < 30000; cnt++) {
2369 			if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
2370 				break;
2371 
2372 			udelay(10);
2373 		}
2374 
2375 		/* Select FPM registers. */
2376 		WRT_REG_WORD(&reg->ctrl_status, 0x20);
2377 		RD_REG_WORD(&reg->ctrl_status);
2378 
2379 		/* Get the fb rev level */
2380 		ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2381 
2382 		if (ha->fb_rev == FPM_2300)
2383 			pci_clear_mwi(ha->pdev);
2384 
2385 		/* Deselect FPM registers. */
2386 		WRT_REG_WORD(&reg->ctrl_status, 0x0);
2387 		RD_REG_WORD(&reg->ctrl_status);
2388 
2389 		/* Release RISC module. */
2390 		WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2391 		for (cnt = 0; cnt < 30000; cnt++) {
2392 			if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
2393 				break;
2394 
2395 			udelay(10);
2396 		}
2397 
2398 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
2399 	}
2400 
2401 	pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2402 
2403 	pci_disable_rom(ha->pdev);
2404 
2405 	/* Get PCI bus information. */
2406 	spin_lock_irqsave(&ha->hardware_lock, flags);
2407 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2408 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2409 
2410 	return QLA_SUCCESS;
2411 }
2412 
2413 /**
2414  * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2415  * @vha: HA context
2416  *
2417  * Returns 0 on success.
2418  */
2419 int
2420 qla24xx_pci_config(scsi_qla_host_t *vha)
2421 {
2422 	uint16_t w;
2423 	unsigned long flags = 0;
2424 	struct qla_hw_data *ha = vha->hw;
2425 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2426 
2427 	pci_set_master(ha->pdev);
2428 	pci_try_set_mwi(ha->pdev);
2429 
2430 	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2431 	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2432 	w &= ~PCI_COMMAND_INTX_DISABLE;
2433 	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2434 
2435 	pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2436 
2437 	/* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2438 	if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2439 		pcix_set_mmrbc(ha->pdev, 2048);
2440 
2441 	/* PCIe -- adjust Maximum Read Request Size (2048). */
2442 	if (pci_is_pcie(ha->pdev))
2443 		pcie_set_readrq(ha->pdev, 4096);
2444 
2445 	pci_disable_rom(ha->pdev);
2446 
2447 	ha->chip_revision = ha->pdev->revision;
2448 
2449 	/* Get PCI bus information. */
2450 	spin_lock_irqsave(&ha->hardware_lock, flags);
2451 	ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
2452 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2453 
2454 	return QLA_SUCCESS;
2455 }
2456 
2457 /**
2458  * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2459  * @vha: HA context
2460  *
2461  * Returns 0 on success.
2462  */
2463 int
2464 qla25xx_pci_config(scsi_qla_host_t *vha)
2465 {
2466 	uint16_t w;
2467 	struct qla_hw_data *ha = vha->hw;
2468 
2469 	pci_set_master(ha->pdev);
2470 	pci_try_set_mwi(ha->pdev);
2471 
2472 	pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2473 	w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2474 	w &= ~PCI_COMMAND_INTX_DISABLE;
2475 	pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2476 
2477 	/* PCIe -- adjust Maximum Read Request Size (2048). */
2478 	if (pci_is_pcie(ha->pdev))
2479 		pcie_set_readrq(ha->pdev, 4096);
2480 
2481 	pci_disable_rom(ha->pdev);
2482 
2483 	ha->chip_revision = ha->pdev->revision;
2484 
2485 	return QLA_SUCCESS;
2486 }
2487 
2488 /**
2489  * qla2x00_isp_firmware() - Choose firmware image.
2490  * @vha: HA context
2491  *
2492  * Returns 0 on success.
2493  */
2494 static int
2495 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2496 {
2497 	int  rval;
2498 	uint16_t loop_id, topo, sw_cap;
2499 	uint8_t domain, area, al_pa;
2500 	struct qla_hw_data *ha = vha->hw;
2501 
2502 	/* Assume loading risc code */
2503 	rval = QLA_FUNCTION_FAILED;
2504 
2505 	if (ha->flags.disable_risc_code_load) {
2506 		ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2507 
2508 		/* Verify checksum of loaded RISC code. */
2509 		rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2510 		if (rval == QLA_SUCCESS) {
2511 			/* And, verify we are not in ROM code. */
2512 			rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2513 			    &area, &domain, &topo, &sw_cap);
2514 		}
2515 	}
2516 
2517 	if (rval)
2518 		ql_dbg(ql_dbg_init, vha, 0x007a,
2519 		    "**** Load RISC code ****.\n");
2520 
2521 	return (rval);
2522 }
2523 
2524 /**
2525  * qla2x00_reset_chip() - Reset ISP chip.
2526  * @vha: HA context
2527  *
2528  * Returns 0 on success.
2529  */
2530 int
2531 qla2x00_reset_chip(scsi_qla_host_t *vha)
2532 {
2533 	unsigned long   flags = 0;
2534 	struct qla_hw_data *ha = vha->hw;
2535 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2536 	uint32_t	cnt;
2537 	uint16_t	cmd;
2538 	int rval = QLA_FUNCTION_FAILED;
2539 
2540 	if (unlikely(pci_channel_offline(ha->pdev)))
2541 		return rval;
2542 
2543 	ha->isp_ops->disable_intrs(ha);
2544 
2545 	spin_lock_irqsave(&ha->hardware_lock, flags);
2546 
2547 	/* Turn off master enable */
2548 	cmd = 0;
2549 	pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2550 	cmd &= ~PCI_COMMAND_MASTER;
2551 	pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2552 
2553 	if (!IS_QLA2100(ha)) {
2554 		/* Pause RISC. */
2555 		WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2556 		if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2557 			for (cnt = 0; cnt < 30000; cnt++) {
2558 				if ((RD_REG_WORD(&reg->hccr) &
2559 				    HCCR_RISC_PAUSE) != 0)
2560 					break;
2561 				udelay(100);
2562 			}
2563 		} else {
2564 			RD_REG_WORD(&reg->hccr);	/* PCI Posting. */
2565 			udelay(10);
2566 		}
2567 
2568 		/* Select FPM registers. */
2569 		WRT_REG_WORD(&reg->ctrl_status, 0x20);
2570 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */
2571 
2572 		/* FPM Soft Reset. */
2573 		WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2574 		RD_REG_WORD(&reg->fpm_diag_config);	/* PCI Posting. */
2575 
2576 		/* Toggle Fpm Reset. */
2577 		if (!IS_QLA2200(ha)) {
2578 			WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2579 			RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2580 		}
2581 
2582 		/* Select frame buffer registers. */
2583 		WRT_REG_WORD(&reg->ctrl_status, 0x10);
2584 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */
2585 
2586 		/* Reset frame buffer FIFOs. */
2587 		if (IS_QLA2200(ha)) {
2588 			WRT_FB_CMD_REG(ha, reg, 0xa000);
2589 			RD_FB_CMD_REG(ha, reg);		/* PCI Posting. */
2590 		} else {
2591 			WRT_FB_CMD_REG(ha, reg, 0x00fc);
2592 
2593 			/* Read back fb_cmd until zero or 3 seconds max */
2594 			for (cnt = 0; cnt < 3000; cnt++) {
2595 				if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2596 					break;
2597 				udelay(100);
2598 			}
2599 		}
2600 
2601 		/* Select RISC module registers. */
2602 		WRT_REG_WORD(&reg->ctrl_status, 0);
2603 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */
2604 
2605 		/* Reset RISC processor. */
2606 		WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2607 		RD_REG_WORD(&reg->hccr);		/* PCI Posting. */
2608 
2609 		/* Release RISC processor. */
2610 		WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2611 		RD_REG_WORD(&reg->hccr);		/* PCI Posting. */
2612 	}
2613 
2614 	WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2615 	WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
2616 
2617 	/* Reset ISP chip. */
2618 	WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2619 
2620 	/* Wait for RISC to recover from reset. */
2621 	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2622 		/*
2623 		 * It is necessary to for a delay here since the card doesn't
2624 		 * respond to PCI reads during a reset. On some architectures
2625 		 * this will result in an MCA.
2626 		 */
2627 		udelay(20);
2628 		for (cnt = 30000; cnt; cnt--) {
2629 			if ((RD_REG_WORD(&reg->ctrl_status) &
2630 			    CSR_ISP_SOFT_RESET) == 0)
2631 				break;
2632 			udelay(100);
2633 		}
2634 	} else
2635 		udelay(10);
2636 
2637 	/* Reset RISC processor. */
2638 	WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2639 
2640 	WRT_REG_WORD(&reg->semaphore, 0);
2641 
2642 	/* Release RISC processor. */
2643 	WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2644 	RD_REG_WORD(&reg->hccr);			/* PCI Posting. */
2645 
2646 	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2647 		for (cnt = 0; cnt < 30000; cnt++) {
2648 			if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2649 				break;
2650 
2651 			udelay(100);
2652 		}
2653 	} else
2654 		udelay(100);
2655 
2656 	/* Turn on master enable */
2657 	cmd |= PCI_COMMAND_MASTER;
2658 	pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2659 
2660 	/* Disable RISC pause on FPM parity error. */
2661 	if (!IS_QLA2100(ha)) {
2662 		WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2663 		RD_REG_WORD(&reg->hccr);		/* PCI Posting. */
2664 	}
2665 
2666 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2667 
2668 	return QLA_SUCCESS;
2669 }
2670 
2671 /**
2672  * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2673  * @vha: HA context
2674  *
2675  * Returns 0 on success.
2676  */
2677 static int
2678 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2679 {
2680 	uint16_t mb[4] = {0x1010, 0, 1, 0};
2681 
2682 	if (!IS_QLA81XX(vha->hw))
2683 		return QLA_SUCCESS;
2684 
2685 	return qla81xx_write_mpi_register(vha, mb);
2686 }
2687 
2688 /**
2689  * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2690  * @vha: HA context
2691  *
2692  * Returns 0 on success.
2693  */
2694 static inline int
2695 qla24xx_reset_risc(scsi_qla_host_t *vha)
2696 {
2697 	unsigned long flags = 0;
2698 	struct qla_hw_data *ha = vha->hw;
2699 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2700 	uint32_t cnt;
2701 	uint16_t wd;
2702 	static int abts_cnt; /* ISP abort retry counts */
2703 	int rval = QLA_SUCCESS;
2704 
2705 	spin_lock_irqsave(&ha->hardware_lock, flags);
2706 
2707 	/* Reset RISC. */
2708 	WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2709 	for (cnt = 0; cnt < 30000; cnt++) {
2710 		if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2711 			break;
2712 
2713 		udelay(10);
2714 	}
2715 
2716 	if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2717 		set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2718 
2719 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2720 	    "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2721 	    RD_REG_DWORD(&reg->hccr),
2722 	    RD_REG_DWORD(&reg->ctrl_status),
2723 	    (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2724 
2725 	WRT_REG_DWORD(&reg->ctrl_status,
2726 	    CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2727 	pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2728 
2729 	udelay(100);
2730 
2731 	/* Wait for firmware to complete NVRAM accesses. */
2732 	RD_REG_WORD(&reg->mailbox0);
2733 	for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2734 	    rval == QLA_SUCCESS; cnt--) {
2735 		barrier();
2736 		if (cnt)
2737 			udelay(5);
2738 		else
2739 			rval = QLA_FUNCTION_TIMEOUT;
2740 	}
2741 
2742 	if (rval == QLA_SUCCESS)
2743 		set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2744 
2745 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2746 	    "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2747 	    RD_REG_DWORD(&reg->hccr),
2748 	    RD_REG_DWORD(&reg->mailbox0));
2749 
2750 	/* Wait for soft-reset to complete. */
2751 	RD_REG_DWORD(&reg->ctrl_status);
2752 	for (cnt = 0; cnt < 60; cnt++) {
2753 		barrier();
2754 		if ((RD_REG_DWORD(&reg->ctrl_status) &
2755 		    CSRX_ISP_SOFT_RESET) == 0)
2756 			break;
2757 
2758 		udelay(5);
2759 	}
2760 	if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2761 		set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2762 
2763 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2764 	    "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2765 	    RD_REG_DWORD(&reg->hccr),
2766 	    RD_REG_DWORD(&reg->ctrl_status));
2767 
2768 	/* If required, do an MPI FW reset now */
2769 	if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2770 		if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2771 			if (++abts_cnt < 5) {
2772 				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2773 				set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2774 			} else {
2775 				/*
2776 				 * We exhausted the ISP abort retries. We have to
2777 				 * set the board offline.
2778 				 */
2779 				abts_cnt = 0;
2780 				vha->flags.online = 0;
2781 			}
2782 		}
2783 	}
2784 
2785 	WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2786 	RD_REG_DWORD(&reg->hccr);
2787 
2788 	WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2789 	RD_REG_DWORD(&reg->hccr);
2790 
2791 	WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2792 	RD_REG_DWORD(&reg->hccr);
2793 
2794 	RD_REG_WORD(&reg->mailbox0);
2795 	for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
2796 	    rval == QLA_SUCCESS; cnt--) {
2797 		barrier();
2798 		if (cnt)
2799 			udelay(5);
2800 		else
2801 			rval = QLA_FUNCTION_TIMEOUT;
2802 	}
2803 	if (rval == QLA_SUCCESS)
2804 		set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2805 
2806 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2807 	    "Host Risc 0x%x, mailbox0 0x%x\n",
2808 	    RD_REG_DWORD(&reg->hccr),
2809 	     RD_REG_WORD(&reg->mailbox0));
2810 
2811 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
2812 
2813 	ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2814 	    "Driver in %s mode\n",
2815 	    IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2816 
2817 	if (IS_NOPOLLING_TYPE(ha))
2818 		ha->isp_ops->enable_intrs(ha);
2819 
2820 	return rval;
2821 }
2822 
2823 static void
2824 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2825 {
2826 	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2827 
2828 	WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2829 	*data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2830 
2831 }
2832 
2833 static void
2834 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2835 {
2836 	struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2837 
2838 	WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2839 	WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2840 }
2841 
2842 static void
2843 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2844 {
2845 	uint32_t wd32 = 0;
2846 	uint delta_msec = 100;
2847 	uint elapsed_msec = 0;
2848 	uint timeout_msec;
2849 	ulong n;
2850 
2851 	if (vha->hw->pdev->subsystem_device != 0x0175 &&
2852 	    vha->hw->pdev->subsystem_device != 0x0240)
2853 		return;
2854 
2855 	WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2856 	udelay(100);
2857 
2858 attempt:
2859 	timeout_msec = TIMEOUT_SEMAPHORE;
2860 	n = timeout_msec / delta_msec;
2861 	while (n--) {
2862 		qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2863 		qla25xx_read_risc_sema_reg(vha, &wd32);
2864 		if (wd32 & RISC_SEMAPHORE)
2865 			break;
2866 		msleep(delta_msec);
2867 		elapsed_msec += delta_msec;
2868 		if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2869 			goto force;
2870 	}
2871 
2872 	if (!(wd32 & RISC_SEMAPHORE))
2873 		goto force;
2874 
2875 	if (!(wd32 & RISC_SEMAPHORE_FORCE))
2876 		goto acquired;
2877 
2878 	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2879 	timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2880 	n = timeout_msec / delta_msec;
2881 	while (n--) {
2882 		qla25xx_read_risc_sema_reg(vha, &wd32);
2883 		if (!(wd32 & RISC_SEMAPHORE_FORCE))
2884 			break;
2885 		msleep(delta_msec);
2886 		elapsed_msec += delta_msec;
2887 		if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2888 			goto force;
2889 	}
2890 
2891 	if (wd32 & RISC_SEMAPHORE_FORCE)
2892 		qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2893 
2894 	goto attempt;
2895 
2896 force:
2897 	qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2898 
2899 acquired:
2900 	return;
2901 }
2902 
2903 /**
2904  * qla24xx_reset_chip() - Reset ISP24xx chip.
2905  * @vha: HA context
2906  *
2907  * Returns 0 on success.
2908  */
2909 int
2910 qla24xx_reset_chip(scsi_qla_host_t *vha)
2911 {
2912 	struct qla_hw_data *ha = vha->hw;
2913 	int rval = QLA_FUNCTION_FAILED;
2914 
2915 	if (pci_channel_offline(ha->pdev) &&
2916 	    ha->flags.pci_channel_io_perm_failure) {
2917 		return rval;
2918 	}
2919 
2920 	ha->isp_ops->disable_intrs(ha);
2921 
2922 	qla25xx_manipulate_risc_semaphore(vha);
2923 
2924 	/* Perform RISC reset. */
2925 	rval = qla24xx_reset_risc(vha);
2926 
2927 	return rval;
2928 }
2929 
2930 /**
2931  * qla2x00_chip_diag() - Test chip for proper operation.
2932  * @vha: HA context
2933  *
2934  * Returns 0 on success.
2935  */
2936 int
2937 qla2x00_chip_diag(scsi_qla_host_t *vha)
2938 {
2939 	int		rval;
2940 	struct qla_hw_data *ha = vha->hw;
2941 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2942 	unsigned long	flags = 0;
2943 	uint16_t	data;
2944 	uint32_t	cnt;
2945 	uint16_t	mb[5];
2946 	struct req_que *req = ha->req_q_map[0];
2947 
2948 	/* Assume a failed state */
2949 	rval = QLA_FUNCTION_FAILED;
2950 
2951 	ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2952 	       &reg->flash_address);
2953 
2954 	spin_lock_irqsave(&ha->hardware_lock, flags);
2955 
2956 	/* Reset ISP chip. */
2957 	WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2958 
2959 	/*
2960 	 * We need to have a delay here since the card will not respond while
2961 	 * in reset causing an MCA on some architectures.
2962 	 */
2963 	udelay(20);
2964 	data = qla2x00_debounce_register(&reg->ctrl_status);
2965 	for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2966 		udelay(5);
2967 		data = RD_REG_WORD(&reg->ctrl_status);
2968 		barrier();
2969 	}
2970 
2971 	if (!cnt)
2972 		goto chip_diag_failed;
2973 
2974 	ql_dbg(ql_dbg_init, vha, 0x007c,
2975 	    "Reset register cleared by chip reset.\n");
2976 
2977 	/* Reset RISC processor. */
2978 	WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2979 	WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2980 
2981 	/* Workaround for QLA2312 PCI parity error */
2982 	if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2983 		data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2984 		for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2985 			udelay(5);
2986 			data = RD_MAILBOX_REG(ha, reg, 0);
2987 			barrier();
2988 		}
2989 	} else
2990 		udelay(10);
2991 
2992 	if (!cnt)
2993 		goto chip_diag_failed;
2994 
2995 	/* Check product ID of chip */
2996 	ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
2997 
2998 	mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2999 	mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3000 	mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3001 	mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3002 	if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3003 	    mb[3] != PROD_ID_3) {
3004 		ql_log(ql_log_warn, vha, 0x0062,
3005 		    "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3006 		    mb[1], mb[2], mb[3]);
3007 
3008 		goto chip_diag_failed;
3009 	}
3010 	ha->product_id[0] = mb[1];
3011 	ha->product_id[1] = mb[2];
3012 	ha->product_id[2] = mb[3];
3013 	ha->product_id[3] = mb[4];
3014 
3015 	/* Adjust fw RISC transfer size */
3016 	if (req->length > 1024)
3017 		ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3018 	else
3019 		ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3020 		    req->length;
3021 
3022 	if (IS_QLA2200(ha) &&
3023 	    RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3024 		/* Limit firmware transfer size with a 2200A */
3025 		ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3026 
3027 		ha->device_type |= DT_ISP2200A;
3028 		ha->fw_transfer_size = 128;
3029 	}
3030 
3031 	/* Wrap Incoming Mailboxes Test. */
3032 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3033 
3034 	ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3035 	rval = qla2x00_mbx_reg_test(vha);
3036 	if (rval)
3037 		ql_log(ql_log_warn, vha, 0x0080,
3038 		    "Failed mailbox send register test.\n");
3039 	else
3040 		/* Flag a successful rval */
3041 		rval = QLA_SUCCESS;
3042 	spin_lock_irqsave(&ha->hardware_lock, flags);
3043 
3044 chip_diag_failed:
3045 	if (rval)
3046 		ql_log(ql_log_info, vha, 0x0081,
3047 		    "Chip diagnostics **** FAILED ****.\n");
3048 
3049 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
3050 
3051 	return (rval);
3052 }
3053 
3054 /**
3055  * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3056  * @vha: HA context
3057  *
3058  * Returns 0 on success.
3059  */
3060 int
3061 qla24xx_chip_diag(scsi_qla_host_t *vha)
3062 {
3063 	int rval;
3064 	struct qla_hw_data *ha = vha->hw;
3065 	struct req_que *req = ha->req_q_map[0];
3066 
3067 	if (IS_P3P_TYPE(ha))
3068 		return QLA_SUCCESS;
3069 
3070 	ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3071 
3072 	rval = qla2x00_mbx_reg_test(vha);
3073 	if (rval) {
3074 		ql_log(ql_log_warn, vha, 0x0082,
3075 		    "Failed mailbox send register test.\n");
3076 	} else {
3077 		/* Flag a successful rval */
3078 		rval = QLA_SUCCESS;
3079 	}
3080 
3081 	return rval;
3082 }
3083 
3084 static void
3085 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3086 {
3087 	int rval;
3088 	dma_addr_t tc_dma;
3089 	void *tc;
3090 	struct qla_hw_data *ha = vha->hw;
3091 
3092 	if (ha->eft) {
3093 		ql_dbg(ql_dbg_init, vha, 0x00bd,
3094 		    "%s: Offload Mem is already allocated.\n",
3095 		    __func__);
3096 		return;
3097 	}
3098 
3099 	if (IS_FWI2_CAPABLE(ha)) {
3100 		/* Allocate memory for Fibre Channel Event Buffer. */
3101 		if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3102 		    !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3103 			goto try_eft;
3104 
3105 		if (ha->fce)
3106 			dma_free_coherent(&ha->pdev->dev,
3107 			    FCE_SIZE, ha->fce, ha->fce_dma);
3108 
3109 		/* Allocate memory for Fibre Channel Event Buffer. */
3110 		tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3111 					GFP_KERNEL);
3112 		if (!tc) {
3113 			ql_log(ql_log_warn, vha, 0x00be,
3114 			    "Unable to allocate (%d KB) for FCE.\n",
3115 			    FCE_SIZE / 1024);
3116 			goto try_eft;
3117 		}
3118 
3119 		rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3120 		    ha->fce_mb, &ha->fce_bufs);
3121 		if (rval) {
3122 			ql_log(ql_log_warn, vha, 0x00bf,
3123 			    "Unable to initialize FCE (%d).\n", rval);
3124 			dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
3125 			    tc_dma);
3126 			ha->flags.fce_enabled = 0;
3127 			goto try_eft;
3128 		}
3129 		ql_dbg(ql_dbg_init, vha, 0x00c0,
3130 		    "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
3131 
3132 		ha->flags.fce_enabled = 1;
3133 		ha->fce_dma = tc_dma;
3134 		ha->fce = tc;
3135 
3136 try_eft:
3137 		if (ha->eft)
3138 			dma_free_coherent(&ha->pdev->dev,
3139 			    EFT_SIZE, ha->eft, ha->eft_dma);
3140 
3141 		/* Allocate memory for Extended Trace Buffer. */
3142 		tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3143 					GFP_KERNEL);
3144 		if (!tc) {
3145 			ql_log(ql_log_warn, vha, 0x00c1,
3146 			    "Unable to allocate (%d KB) for EFT.\n",
3147 			    EFT_SIZE / 1024);
3148 			goto eft_err;
3149 		}
3150 
3151 		rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3152 		if (rval) {
3153 			ql_log(ql_log_warn, vha, 0x00c2,
3154 			    "Unable to initialize EFT (%d).\n", rval);
3155 			dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
3156 			    tc_dma);
3157 			goto eft_err;
3158 		}
3159 		ql_dbg(ql_dbg_init, vha, 0x00c3,
3160 		    "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3161 
3162 		ha->eft_dma = tc_dma;
3163 		ha->eft = tc;
3164 	}
3165 
3166 eft_err:
3167 	return;
3168 }
3169 
3170 void
3171 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3172 {
3173 	int rval;
3174 	uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3175 	    eft_size, fce_size, mq_size;
3176 	struct qla_hw_data *ha = vha->hw;
3177 	struct req_que *req = ha->req_q_map[0];
3178 	struct rsp_que *rsp = ha->rsp_q_map[0];
3179 	struct qla2xxx_fw_dump *fw_dump;
3180 	dma_addr_t tc_dma;
3181 	void *tc;
3182 
3183 	dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3184 	req_q_size = rsp_q_size = 0;
3185 
3186 	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3187 		fixed_size = sizeof(struct qla2100_fw_dump);
3188 	} else if (IS_QLA23XX(ha)) {
3189 		fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3190 		mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3191 		    sizeof(uint16_t);
3192 	} else if (IS_FWI2_CAPABLE(ha)) {
3193 		if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
3194 			fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3195 		else if (IS_QLA81XX(ha))
3196 			fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3197 		else if (IS_QLA25XX(ha))
3198 			fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3199 		else
3200 			fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3201 
3202 		mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3203 		    sizeof(uint32_t);
3204 		if (ha->mqenable) {
3205 			if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) &&
3206 			    !IS_QLA28XX(ha))
3207 				mq_size = sizeof(struct qla2xxx_mq_chain);
3208 			/*
3209 			 * Allocate maximum buffer size for all queues - Q0.
3210 			 * Resizing must be done at end-of-dump processing.
3211 			 */
3212 			mq_size += (ha->max_req_queues - 1) *
3213 			    (req->length * sizeof(request_t));
3214 			mq_size += (ha->max_rsp_queues - 1) *
3215 			    (rsp->length * sizeof(response_t));
3216 		}
3217 		if (ha->tgt.atio_ring)
3218 			mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3219 		/* Allocate memory for Fibre Channel Event Buffer. */
3220 		if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3221 		    !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3222 			goto try_eft;
3223 
3224 		fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3225 try_eft:
3226 		if (ha->eft)
3227 			dma_free_coherent(&ha->pdev->dev,
3228 			    EFT_SIZE, ha->eft, ha->eft_dma);
3229 
3230 		/* Allocate memory for Extended Trace Buffer. */
3231 		tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3232 					 GFP_KERNEL);
3233 		if (!tc) {
3234 			ql_log(ql_log_warn, vha, 0x00c1,
3235 			    "Unable to allocate (%d KB) for EFT.\n",
3236 			    EFT_SIZE / 1024);
3237 			goto allocate;
3238 		}
3239 
3240 		rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3241 		if (rval) {
3242 			ql_log(ql_log_warn, vha, 0x00c2,
3243 			    "Unable to initialize EFT (%d).\n", rval);
3244 			dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
3245 			    tc_dma);
3246 		}
3247 		ql_dbg(ql_dbg_init, vha, 0x00c3,
3248 		    "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3249 		eft_size = EFT_SIZE;
3250 	}
3251 
3252 	if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3253 		struct fwdt *fwdt = ha->fwdt;
3254 		uint j;
3255 
3256 		for (j = 0; j < 2; j++, fwdt++) {
3257 			if (!fwdt->template) {
3258 				ql_log(ql_log_warn, vha, 0x00ba,
3259 				    "-> fwdt%u no template\n", j);
3260 				continue;
3261 			}
3262 			ql_dbg(ql_dbg_init, vha, 0x00fa,
3263 			    "-> fwdt%u calculating fwdump size...\n", j);
3264 			fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3265 			    vha, fwdt->template);
3266 			ql_dbg(ql_dbg_init, vha, 0x00fa,
3267 			    "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3268 			    j, fwdt->dump_size);
3269 			dump_size += fwdt->dump_size;
3270 		}
3271 		goto allocate;
3272 	}
3273 
3274 	req_q_size = req->length * sizeof(request_t);
3275 	rsp_q_size = rsp->length * sizeof(response_t);
3276 	dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3277 	dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
3278 	ha->chain_offset = dump_size;
3279 	dump_size += mq_size + fce_size;
3280 
3281 	if (ha->exchoffld_buf)
3282 		dump_size += sizeof(struct qla2xxx_offld_chain) +
3283 			ha->exchoffld_size;
3284 	if (ha->exlogin_buf)
3285 		dump_size += sizeof(struct qla2xxx_offld_chain) +
3286 			ha->exlogin_size;
3287 
3288 allocate:
3289 	if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3290 
3291 		ql_dbg(ql_dbg_init, vha, 0x00c5,
3292 		    "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3293 		    __func__, dump_size, ha->fw_dump_len,
3294 		    ha->fw_dump_alloc_len);
3295 
3296 		fw_dump = vmalloc(dump_size);
3297 		if (!fw_dump) {
3298 			ql_log(ql_log_warn, vha, 0x00c4,
3299 			    "Unable to allocate (%d KB) for firmware dump.\n",
3300 			    dump_size / 1024);
3301 		} else {
3302 			mutex_lock(&ha->optrom_mutex);
3303 			if (ha->fw_dumped) {
3304 				memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3305 				vfree(ha->fw_dump);
3306 				ha->fw_dump = fw_dump;
3307 				ha->fw_dump_alloc_len =  dump_size;
3308 				ql_dbg(ql_dbg_init, vha, 0x00c5,
3309 				    "Re-Allocated (%d KB) and save firmware dump.\n",
3310 				    dump_size / 1024);
3311 			} else {
3312 				if (ha->fw_dump)
3313 					vfree(ha->fw_dump);
3314 				ha->fw_dump = fw_dump;
3315 
3316 				ha->fw_dump_len = ha->fw_dump_alloc_len =
3317 				    dump_size;
3318 				ql_dbg(ql_dbg_init, vha, 0x00c5,
3319 				    "Allocated (%d KB) for firmware dump.\n",
3320 				    dump_size / 1024);
3321 
3322 				if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3323 					mutex_unlock(&ha->optrom_mutex);
3324 					return;
3325 				}
3326 
3327 				ha->fw_dump->signature[0] = 'Q';
3328 				ha->fw_dump->signature[1] = 'L';
3329 				ha->fw_dump->signature[2] = 'G';
3330 				ha->fw_dump->signature[3] = 'C';
3331 				ha->fw_dump->version = htonl(1);
3332 
3333 				ha->fw_dump->fixed_size = htonl(fixed_size);
3334 				ha->fw_dump->mem_size = htonl(mem_size);
3335 				ha->fw_dump->req_q_size = htonl(req_q_size);
3336 				ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3337 
3338 				ha->fw_dump->eft_size = htonl(eft_size);
3339 				ha->fw_dump->eft_addr_l =
3340 				    htonl(LSD(ha->eft_dma));
3341 				ha->fw_dump->eft_addr_h =
3342 				    htonl(MSD(ha->eft_dma));
3343 
3344 				ha->fw_dump->header_size =
3345 					htonl(offsetof
3346 					    (struct qla2xxx_fw_dump, isp));
3347 			}
3348 			mutex_unlock(&ha->optrom_mutex);
3349 		}
3350 	}
3351 }
3352 
3353 static int
3354 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3355 {
3356 #define MPS_MASK	0xe0
3357 	int rval;
3358 	uint16_t dc;
3359 	uint32_t dw;
3360 
3361 	if (!IS_QLA81XX(vha->hw))
3362 		return QLA_SUCCESS;
3363 
3364 	rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3365 	if (rval != QLA_SUCCESS) {
3366 		ql_log(ql_log_warn, vha, 0x0105,
3367 		    "Unable to acquire semaphore.\n");
3368 		goto done;
3369 	}
3370 
3371 	pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3372 	rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3373 	if (rval != QLA_SUCCESS) {
3374 		ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3375 		goto done_release;
3376 	}
3377 
3378 	dc &= MPS_MASK;
3379 	if (dc == (dw & MPS_MASK))
3380 		goto done_release;
3381 
3382 	dw &= ~MPS_MASK;
3383 	dw |= dc;
3384 	rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3385 	if (rval != QLA_SUCCESS) {
3386 		ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3387 	}
3388 
3389 done_release:
3390 	rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3391 	if (rval != QLA_SUCCESS) {
3392 		ql_log(ql_log_warn, vha, 0x006d,
3393 		    "Unable to release semaphore.\n");
3394 	}
3395 
3396 done:
3397 	return rval;
3398 }
3399 
3400 int
3401 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3402 {
3403 	/* Don't try to reallocate the array */
3404 	if (req->outstanding_cmds)
3405 		return QLA_SUCCESS;
3406 
3407 	if (!IS_FWI2_CAPABLE(ha))
3408 		req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3409 	else {
3410 		if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3411 			req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3412 		else
3413 			req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3414 	}
3415 
3416 	req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3417 					sizeof(srb_t *),
3418 					GFP_KERNEL);
3419 
3420 	if (!req->outstanding_cmds) {
3421 		/*
3422 		 * Try to allocate a minimal size just so we can get through
3423 		 * initialization.
3424 		 */
3425 		req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3426 		req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3427 						sizeof(srb_t *),
3428 						GFP_KERNEL);
3429 
3430 		if (!req->outstanding_cmds) {
3431 			ql_log(ql_log_fatal, NULL, 0x0126,
3432 			    "Failed to allocate memory for "
3433 			    "outstanding_cmds for req_que %p.\n", req);
3434 			req->num_outstanding_cmds = 0;
3435 			return QLA_FUNCTION_FAILED;
3436 		}
3437 	}
3438 
3439 	return QLA_SUCCESS;
3440 }
3441 
3442 #define PRINT_FIELD(_field, _flag, _str) {		\
3443 	if (a0->_field & _flag) {\
3444 		if (p) {\
3445 			strcat(ptr, "|");\
3446 			ptr++;\
3447 			leftover--;\
3448 		} \
3449 		len = snprintf(ptr, leftover, "%s", _str);	\
3450 		p = 1;\
3451 		leftover -= len;\
3452 		ptr += len; \
3453 	} \
3454 }
3455 
3456 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3457 {
3458 #define STR_LEN 64
3459 	struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3460 	u8 str[STR_LEN], *ptr, p;
3461 	int leftover, len;
3462 
3463 	memset(str, 0, STR_LEN);
3464 	snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3465 	ql_dbg(ql_dbg_init, vha, 0x015a,
3466 	    "SFP MFG Name: %s\n", str);
3467 
3468 	memset(str, 0, STR_LEN);
3469 	snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3470 	ql_dbg(ql_dbg_init, vha, 0x015c,
3471 	    "SFP Part Name: %s\n", str);
3472 
3473 	/* media */
3474 	memset(str, 0, STR_LEN);
3475 	ptr = str;
3476 	leftover = STR_LEN;
3477 	p = len = 0;
3478 	PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3479 	PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3480 	PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3481 	PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3482 	PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3483 	PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3484 	PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3485 	ql_dbg(ql_dbg_init, vha, 0x0160,
3486 	    "SFP Media: %s\n", str);
3487 
3488 	/* link length */
3489 	memset(str, 0, STR_LEN);
3490 	ptr = str;
3491 	leftover = STR_LEN;
3492 	p = len = 0;
3493 	PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3494 	PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3495 	PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3496 	PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3497 	PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3498 	ql_dbg(ql_dbg_init, vha, 0x0196,
3499 	    "SFP Link Length: %s\n", str);
3500 
3501 	memset(str, 0, STR_LEN);
3502 	ptr = str;
3503 	leftover = STR_LEN;
3504 	p = len = 0;
3505 	PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3506 	PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3507 	PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3508 	PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3509 	PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3510 	ql_dbg(ql_dbg_init, vha, 0x016e,
3511 	    "SFP FC Link Tech: %s\n", str);
3512 
3513 	if (a0->length_km)
3514 		ql_dbg(ql_dbg_init, vha, 0x016f,
3515 		    "SFP Distant: %d km\n", a0->length_km);
3516 	if (a0->length_100m)
3517 		ql_dbg(ql_dbg_init, vha, 0x0170,
3518 		    "SFP Distant: %d m\n", a0->length_100m*100);
3519 	if (a0->length_50um_10m)
3520 		ql_dbg(ql_dbg_init, vha, 0x0189,
3521 		    "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3522 	if (a0->length_62um_10m)
3523 		ql_dbg(ql_dbg_init, vha, 0x018a,
3524 		  "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3525 	if (a0->length_om4_10m)
3526 		ql_dbg(ql_dbg_init, vha, 0x0194,
3527 		    "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3528 	if (a0->length_om3_10m)
3529 		ql_dbg(ql_dbg_init, vha, 0x0195,
3530 		    "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3531 }
3532 
3533 
3534 /*
3535  * Return Code:
3536  *   QLA_SUCCESS: no action
3537  *   QLA_INTERFACE_ERROR: SFP is not there.
3538  *   QLA_FUNCTION_FAILED: detected New SFP
3539  */
3540 int
3541 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3542 {
3543 	int rc = QLA_SUCCESS;
3544 	struct sff_8247_a0 *a;
3545 	struct qla_hw_data *ha = vha->hw;
3546 
3547 	if (!AUTO_DETECT_SFP_SUPPORT(vha))
3548 		goto out;
3549 
3550 	rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3551 	if (rc)
3552 		goto out;
3553 
3554 	a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3555 	qla2xxx_print_sfp_info(vha);
3556 
3557 	if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3558 		/* long range */
3559 		ha->flags.detected_lr_sfp = 1;
3560 
3561 		if (a->length_km > 5 || a->length_100m > 50)
3562 			ha->long_range_distance = LR_DISTANCE_10K;
3563 		else
3564 			ha->long_range_distance = LR_DISTANCE_5K;
3565 
3566 		if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3567 			ql_dbg(ql_dbg_async, vha, 0x507b,
3568 			    "Detected Long Range SFP.\n");
3569 	} else {
3570 		/* short range */
3571 		ha->flags.detected_lr_sfp = 0;
3572 		if (ha->flags.using_lr_setting)
3573 			ql_dbg(ql_dbg_async, vha, 0x5084,
3574 			    "Detected Short Range SFP.\n");
3575 	}
3576 
3577 	if (!vha->flags.init_done)
3578 		rc = QLA_SUCCESS;
3579 out:
3580 	return rc;
3581 }
3582 
3583 /**
3584  * qla2x00_setup_chip() - Load and start RISC firmware.
3585  * @vha: HA context
3586  *
3587  * Returns 0 on success.
3588  */
3589 static int
3590 qla2x00_setup_chip(scsi_qla_host_t *vha)
3591 {
3592 	int rval;
3593 	uint32_t srisc_address = 0;
3594 	struct qla_hw_data *ha = vha->hw;
3595 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3596 	unsigned long flags;
3597 	uint16_t fw_major_version;
3598 
3599 	if (IS_P3P_TYPE(ha)) {
3600 		rval = ha->isp_ops->load_risc(vha, &srisc_address);
3601 		if (rval == QLA_SUCCESS) {
3602 			qla2x00_stop_firmware(vha);
3603 			goto enable_82xx_npiv;
3604 		} else
3605 			goto failed;
3606 	}
3607 
3608 	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3609 		/* Disable SRAM, Instruction RAM and GP RAM parity.  */
3610 		spin_lock_irqsave(&ha->hardware_lock, flags);
3611 		WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3612 		RD_REG_WORD(&reg->hccr);
3613 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
3614 	}
3615 
3616 	qla81xx_mpi_sync(vha);
3617 
3618 	/* Load firmware sequences */
3619 	rval = ha->isp_ops->load_risc(vha, &srisc_address);
3620 	if (rval == QLA_SUCCESS) {
3621 		ql_dbg(ql_dbg_init, vha, 0x00c9,
3622 		    "Verifying Checksum of loaded RISC code.\n");
3623 
3624 		rval = qla2x00_verify_checksum(vha, srisc_address);
3625 		if (rval == QLA_SUCCESS) {
3626 			/* Start firmware execution. */
3627 			ql_dbg(ql_dbg_init, vha, 0x00ca,
3628 			    "Starting firmware.\n");
3629 
3630 			if (ql2xexlogins)
3631 				ha->flags.exlogins_enabled = 1;
3632 
3633 			if (qla_is_exch_offld_enabled(vha))
3634 				ha->flags.exchoffld_enabled = 1;
3635 
3636 			rval = qla2x00_execute_fw(vha, srisc_address);
3637 			/* Retrieve firmware information. */
3638 			if (rval == QLA_SUCCESS) {
3639 				qla24xx_detect_sfp(vha);
3640 
3641 				if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3642 				    IS_QLA28XX(ha)) &&
3643 				    (ha->zio_mode == QLA_ZIO_MODE_6))
3644 					qla27xx_set_zio_threshold(vha,
3645 					    ha->last_zio_threshold);
3646 
3647 				rval = qla2x00_set_exlogins_buffer(vha);
3648 				if (rval != QLA_SUCCESS)
3649 					goto failed;
3650 
3651 				rval = qla2x00_set_exchoffld_buffer(vha);
3652 				if (rval != QLA_SUCCESS)
3653 					goto failed;
3654 
3655 enable_82xx_npiv:
3656 				fw_major_version = ha->fw_major_version;
3657 				if (IS_P3P_TYPE(ha))
3658 					qla82xx_check_md_needed(vha);
3659 				else
3660 					rval = qla2x00_get_fw_version(vha);
3661 				if (rval != QLA_SUCCESS)
3662 					goto failed;
3663 				ha->flags.npiv_supported = 0;
3664 				if (IS_QLA2XXX_MIDTYPE(ha) &&
3665 					 (ha->fw_attributes & BIT_2)) {
3666 					ha->flags.npiv_supported = 1;
3667 					if ((!ha->max_npiv_vports) ||
3668 					    ((ha->max_npiv_vports + 1) %
3669 					    MIN_MULTI_ID_FABRIC))
3670 						ha->max_npiv_vports =
3671 						    MIN_MULTI_ID_FABRIC - 1;
3672 				}
3673 				qla2x00_get_resource_cnts(vha);
3674 
3675 				/*
3676 				 * Allocate the array of outstanding commands
3677 				 * now that we know the firmware resources.
3678 				 */
3679 				rval = qla2x00_alloc_outstanding_cmds(ha,
3680 				    vha->req);
3681 				if (rval != QLA_SUCCESS)
3682 					goto failed;
3683 
3684 				if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3685 					qla2x00_alloc_offload_mem(vha);
3686 
3687 				if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3688 					qla2x00_alloc_fw_dump(vha);
3689 
3690 			} else {
3691 				goto failed;
3692 			}
3693 		} else {
3694 			ql_log(ql_log_fatal, vha, 0x00cd,
3695 			    "ISP Firmware failed checksum.\n");
3696 			goto failed;
3697 		}
3698 	} else
3699 		goto failed;
3700 
3701 	if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3702 		/* Enable proper parity. */
3703 		spin_lock_irqsave(&ha->hardware_lock, flags);
3704 		if (IS_QLA2300(ha))
3705 			/* SRAM parity */
3706 			WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3707 		else
3708 			/* SRAM, Instruction RAM and GP RAM parity */
3709 			WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3710 		RD_REG_WORD(&reg->hccr);
3711 		spin_unlock_irqrestore(&ha->hardware_lock, flags);
3712 	}
3713 
3714 	if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
3715 		ha->flags.fac_supported = 1;
3716 	else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3717 		uint32_t size;
3718 
3719 		rval = qla81xx_fac_get_sector_size(vha, &size);
3720 		if (rval == QLA_SUCCESS) {
3721 			ha->flags.fac_supported = 1;
3722 			ha->fdt_block_size = size << 2;
3723 		} else {
3724 			ql_log(ql_log_warn, vha, 0x00ce,
3725 			    "Unsupported FAC firmware (%d.%02d.%02d).\n",
3726 			    ha->fw_major_version, ha->fw_minor_version,
3727 			    ha->fw_subminor_version);
3728 
3729 			if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3730 			    IS_QLA28XX(ha)) {
3731 				ha->flags.fac_supported = 0;
3732 				rval = QLA_SUCCESS;
3733 			}
3734 		}
3735 	}
3736 failed:
3737 	if (rval) {
3738 		ql_log(ql_log_fatal, vha, 0x00cf,
3739 		    "Setup chip ****FAILED****.\n");
3740 	}
3741 
3742 	return (rval);
3743 }
3744 
3745 /**
3746  * qla2x00_init_response_q_entries() - Initializes response queue entries.
3747  * @rsp: response queue
3748  *
3749  * Beginning of request ring has initialization control block already built
3750  * by nvram config routine.
3751  *
3752  * Returns 0 on success.
3753  */
3754 void
3755 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3756 {
3757 	uint16_t cnt;
3758 	response_t *pkt;
3759 
3760 	rsp->ring_ptr = rsp->ring;
3761 	rsp->ring_index    = 0;
3762 	rsp->status_srb = NULL;
3763 	pkt = rsp->ring_ptr;
3764 	for (cnt = 0; cnt < rsp->length; cnt++) {
3765 		pkt->signature = RESPONSE_PROCESSED;
3766 		pkt++;
3767 	}
3768 }
3769 
3770 /**
3771  * qla2x00_update_fw_options() - Read and process firmware options.
3772  * @vha: HA context
3773  *
3774  * Returns 0 on success.
3775  */
3776 void
3777 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3778 {
3779 	uint16_t swing, emphasis, tx_sens, rx_sens;
3780 	struct qla_hw_data *ha = vha->hw;
3781 
3782 	memset(ha->fw_options, 0, sizeof(ha->fw_options));
3783 	qla2x00_get_fw_options(vha, ha->fw_options);
3784 
3785 	if (IS_QLA2100(ha) || IS_QLA2200(ha))
3786 		return;
3787 
3788 	/* Serial Link options. */
3789 	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3790 	    "Serial link options.\n");
3791 	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3792 	    ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
3793 
3794 	ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3795 	if (ha->fw_seriallink_options[3] & BIT_2) {
3796 		ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3797 
3798 		/*  1G settings */
3799 		swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3800 		emphasis = (ha->fw_seriallink_options[2] &
3801 		    (BIT_4 | BIT_3)) >> 3;
3802 		tx_sens = ha->fw_seriallink_options[0] &
3803 		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3804 		rx_sens = (ha->fw_seriallink_options[0] &
3805 		    (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3806 		ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3807 		if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3808 			if (rx_sens == 0x0)
3809 				rx_sens = 0x3;
3810 			ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3811 		} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3812 			ha->fw_options[10] |= BIT_5 |
3813 			    ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3814 			    (tx_sens & (BIT_1 | BIT_0));
3815 
3816 		/*  2G settings */
3817 		swing = (ha->fw_seriallink_options[2] &
3818 		    (BIT_7 | BIT_6 | BIT_5)) >> 5;
3819 		emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3820 		tx_sens = ha->fw_seriallink_options[1] &
3821 		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3822 		rx_sens = (ha->fw_seriallink_options[1] &
3823 		    (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3824 		ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3825 		if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3826 			if (rx_sens == 0x0)
3827 				rx_sens = 0x3;
3828 			ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3829 		} else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3830 			ha->fw_options[11] |= BIT_5 |
3831 			    ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3832 			    (tx_sens & (BIT_1 | BIT_0));
3833 	}
3834 
3835 	/* FCP2 options. */
3836 	/*  Return command IOCBs without waiting for an ABTS to complete. */
3837 	ha->fw_options[3] |= BIT_13;
3838 
3839 	/* LED scheme. */
3840 	if (ha->flags.enable_led_scheme)
3841 		ha->fw_options[2] |= BIT_12;
3842 
3843 	/* Detect ISP6312. */
3844 	if (IS_QLA6312(ha))
3845 		ha->fw_options[2] |= BIT_13;
3846 
3847 	/* Set Retry FLOGI in case of P2P connection */
3848 	if (ha->operating_mode == P2P) {
3849 		ha->fw_options[2] |= BIT_3;
3850 		ql_dbg(ql_dbg_disc, vha, 0x2100,
3851 		    "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3852 			__func__, ha->fw_options[2]);
3853 	}
3854 
3855 	/* Update firmware options. */
3856 	qla2x00_set_fw_options(vha, ha->fw_options);
3857 }
3858 
3859 void
3860 qla24xx_update_fw_options(scsi_qla_host_t *vha)
3861 {
3862 	int rval;
3863 	struct qla_hw_data *ha = vha->hw;
3864 
3865 	if (IS_P3P_TYPE(ha))
3866 		return;
3867 
3868 	/*  Hold status IOCBs until ABTS response received. */
3869 	if (ql2xfwholdabts)
3870 		ha->fw_options[3] |= BIT_12;
3871 
3872 	/* Set Retry FLOGI in case of P2P connection */
3873 	if (ha->operating_mode == P2P) {
3874 		ha->fw_options[2] |= BIT_3;
3875 		ql_dbg(ql_dbg_disc, vha, 0x2101,
3876 		    "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3877 			__func__, ha->fw_options[2]);
3878 	}
3879 
3880 	/* Move PUREX, ABTS RX & RIDA to ATIOQ */
3881 	if (ql2xmvasynctoatio &&
3882 	    (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
3883 		if (qla_tgt_mode_enabled(vha) ||
3884 		    qla_dual_mode_enabled(vha))
3885 			ha->fw_options[2] |= BIT_11;
3886 		else
3887 			ha->fw_options[2] &= ~BIT_11;
3888 	}
3889 
3890 	if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3891 	    IS_QLA28XX(ha)) {
3892 		/*
3893 		 * Tell FW to track each exchange to prevent
3894 		 * driver from using stale exchange.
3895 		 */
3896 		if (qla_tgt_mode_enabled(vha) ||
3897 		    qla_dual_mode_enabled(vha))
3898 			ha->fw_options[2] |= BIT_4;
3899 		else
3900 			ha->fw_options[2] &= ~BIT_4;
3901 
3902 		/* Reserve 1/2 of emergency exchanges for ELS.*/
3903 		if (qla2xuseresexchforels)
3904 			ha->fw_options[2] |= BIT_8;
3905 		else
3906 			ha->fw_options[2] &= ~BIT_8;
3907 	}
3908 
3909 	ql_dbg(ql_dbg_init, vha, 0x00e8,
3910 	    "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3911 	    __func__, ha->fw_options[1], ha->fw_options[2],
3912 	    ha->fw_options[3], vha->host->active_mode);
3913 
3914 	if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3915 		qla2x00_set_fw_options(vha, ha->fw_options);
3916 
3917 	/* Update Serial Link options. */
3918 	if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
3919 		return;
3920 
3921 	rval = qla2x00_set_serdes_params(vha,
3922 	    le16_to_cpu(ha->fw_seriallink_options24[1]),
3923 	    le16_to_cpu(ha->fw_seriallink_options24[2]),
3924 	    le16_to_cpu(ha->fw_seriallink_options24[3]));
3925 	if (rval != QLA_SUCCESS) {
3926 		ql_log(ql_log_warn, vha, 0x0104,
3927 		    "Unable to update Serial Link options (%x).\n", rval);
3928 	}
3929 }
3930 
3931 void
3932 qla2x00_config_rings(struct scsi_qla_host *vha)
3933 {
3934 	struct qla_hw_data *ha = vha->hw;
3935 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3936 	struct req_que *req = ha->req_q_map[0];
3937 	struct rsp_que *rsp = ha->rsp_q_map[0];
3938 
3939 	/* Setup ring parameters in initialization control block. */
3940 	ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3941 	ha->init_cb->response_q_inpointer = cpu_to_le16(0);
3942 	ha->init_cb->request_q_length = cpu_to_le16(req->length);
3943 	ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3944 	put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
3945 	put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
3946 
3947 	WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3948 	WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3949 	WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3950 	WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3951 	RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg));		/* PCI Posting. */
3952 }
3953 
3954 void
3955 qla24xx_config_rings(struct scsi_qla_host *vha)
3956 {
3957 	struct qla_hw_data *ha = vha->hw;
3958 	device_reg_t *reg = ISP_QUE_REG(ha, 0);
3959 	struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3960 	struct qla_msix_entry *msix;
3961 	struct init_cb_24xx *icb;
3962 	uint16_t rid = 0;
3963 	struct req_que *req = ha->req_q_map[0];
3964 	struct rsp_que *rsp = ha->rsp_q_map[0];
3965 
3966 	/* Setup ring parameters in initialization control block. */
3967 	icb = (struct init_cb_24xx *)ha->init_cb;
3968 	icb->request_q_outpointer = cpu_to_le16(0);
3969 	icb->response_q_inpointer = cpu_to_le16(0);
3970 	icb->request_q_length = cpu_to_le16(req->length);
3971 	icb->response_q_length = cpu_to_le16(rsp->length);
3972 	put_unaligned_le64(req->dma, &icb->request_q_address);
3973 	put_unaligned_le64(rsp->dma, &icb->response_q_address);
3974 
3975 	/* Setup ATIO queue dma pointers for target mode */
3976 	icb->atio_q_inpointer = cpu_to_le16(0);
3977 	icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3978 	put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
3979 
3980 	if (IS_SHADOW_REG_CAPABLE(ha))
3981 		icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
3982 
3983 	if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3984 	    IS_QLA28XX(ha)) {
3985 		icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3986 		icb->rid = cpu_to_le16(rid);
3987 		if (ha->flags.msix_enabled) {
3988 			msix = &ha->msix_entries[1];
3989 			ql_dbg(ql_dbg_init, vha, 0x0019,
3990 			    "Registering vector 0x%x for base que.\n",
3991 			    msix->entry);
3992 			icb->msix = cpu_to_le16(msix->entry);
3993 		}
3994 		/* Use alternate PCI bus number */
3995 		if (MSB(rid))
3996 			icb->firmware_options_2 |= cpu_to_le32(BIT_19);
3997 		/* Use alternate PCI devfn */
3998 		if (LSB(rid))
3999 			icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4000 
4001 		/* Use Disable MSIX Handshake mode for capable adapters */
4002 		if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4003 		    (ha->flags.msix_enabled)) {
4004 			icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4005 			ha->flags.disable_msix_handshake = 1;
4006 			ql_dbg(ql_dbg_init, vha, 0x00fe,
4007 			    "MSIX Handshake Disable Mode turned on.\n");
4008 		} else {
4009 			icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4010 		}
4011 		icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4012 
4013 		WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
4014 		WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
4015 		WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
4016 		WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
4017 	} else {
4018 		WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
4019 		WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
4020 		WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
4021 		WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
4022 	}
4023 
4024 	qlt_24xx_config_rings(vha);
4025 
4026 	/* If the user has configured the speed, set it here */
4027 	if (ha->set_data_rate) {
4028 		ql_dbg(ql_dbg_init, vha, 0x00fd,
4029 		    "Speed set by user : %s Gbps \n",
4030 		    qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4031 		icb->firmware_options_3 = (ha->set_data_rate << 13);
4032 	}
4033 
4034 	/* PCI posting */
4035 	RD_REG_DWORD(&ioreg->hccr);
4036 }
4037 
4038 /**
4039  * qla2x00_init_rings() - Initializes firmware.
4040  * @vha: HA context
4041  *
4042  * Beginning of request ring has initialization control block already built
4043  * by nvram config routine.
4044  *
4045  * Returns 0 on success.
4046  */
4047 int
4048 qla2x00_init_rings(scsi_qla_host_t *vha)
4049 {
4050 	int	rval;
4051 	unsigned long flags = 0;
4052 	int cnt, que;
4053 	struct qla_hw_data *ha = vha->hw;
4054 	struct req_que *req;
4055 	struct rsp_que *rsp;
4056 	struct mid_init_cb_24xx *mid_init_cb =
4057 	    (struct mid_init_cb_24xx *) ha->init_cb;
4058 
4059 	spin_lock_irqsave(&ha->hardware_lock, flags);
4060 
4061 	/* Clear outstanding commands array. */
4062 	for (que = 0; que < ha->max_req_queues; que++) {
4063 		req = ha->req_q_map[que];
4064 		if (!req || !test_bit(que, ha->req_qid_map))
4065 			continue;
4066 		req->out_ptr = (void *)(req->ring + req->length);
4067 		*req->out_ptr = 0;
4068 		for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4069 			req->outstanding_cmds[cnt] = NULL;
4070 
4071 		req->current_outstanding_cmd = 1;
4072 
4073 		/* Initialize firmware. */
4074 		req->ring_ptr  = req->ring;
4075 		req->ring_index    = 0;
4076 		req->cnt      = req->length;
4077 	}
4078 
4079 	for (que = 0; que < ha->max_rsp_queues; que++) {
4080 		rsp = ha->rsp_q_map[que];
4081 		if (!rsp || !test_bit(que, ha->rsp_qid_map))
4082 			continue;
4083 		rsp->in_ptr = (void *)(rsp->ring + rsp->length);
4084 		*rsp->in_ptr = 0;
4085 		/* Initialize response queue entries */
4086 		if (IS_QLAFX00(ha))
4087 			qlafx00_init_response_q_entries(rsp);
4088 		else
4089 			qla2x00_init_response_q_entries(rsp);
4090 	}
4091 
4092 	ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4093 	ha->tgt.atio_ring_index = 0;
4094 	/* Initialize ATIO queue entries */
4095 	qlt_init_atio_q_entries(vha);
4096 
4097 	ha->isp_ops->config_rings(vha);
4098 
4099 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
4100 
4101 	ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4102 
4103 	if (IS_QLAFX00(ha)) {
4104 		rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4105 		goto next_check;
4106 	}
4107 
4108 	/* Update any ISP specific firmware options before initialization. */
4109 	ha->isp_ops->update_fw_options(vha);
4110 
4111 	if (ha->flags.npiv_supported) {
4112 		if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4113 			ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4114 		mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4115 	}
4116 
4117 	if (IS_FWI2_CAPABLE(ha)) {
4118 		mid_init_cb->options = cpu_to_le16(BIT_1);
4119 		mid_init_cb->init_cb.execution_throttle =
4120 		    cpu_to_le16(ha->cur_fw_xcb_count);
4121 		ha->flags.dport_enabled =
4122 		    (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
4123 		ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4124 		    (ha->flags.dport_enabled) ? "enabled" : "disabled");
4125 		/* FA-WWPN Status */
4126 		ha->flags.fawwpn_enabled =
4127 		    (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
4128 		ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4129 		    (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4130 	}
4131 
4132 	rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4133 next_check:
4134 	if (rval) {
4135 		ql_log(ql_log_fatal, vha, 0x00d2,
4136 		    "Init Firmware **** FAILED ****.\n");
4137 	} else {
4138 		ql_dbg(ql_dbg_init, vha, 0x00d3,
4139 		    "Init Firmware -- success.\n");
4140 		QLA_FW_STARTED(ha);
4141 		vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4142 	}
4143 
4144 	return (rval);
4145 }
4146 
4147 /**
4148  * qla2x00_fw_ready() - Waits for firmware ready.
4149  * @vha: HA context
4150  *
4151  * Returns 0 on success.
4152  */
4153 static int
4154 qla2x00_fw_ready(scsi_qla_host_t *vha)
4155 {
4156 	int		rval;
4157 	unsigned long	wtime, mtime, cs84xx_time;
4158 	uint16_t	min_wait;	/* Minimum wait time if loop is down */
4159 	uint16_t	wait_time;	/* Wait time if loop is coming ready */
4160 	uint16_t	state[6];
4161 	struct qla_hw_data *ha = vha->hw;
4162 
4163 	if (IS_QLAFX00(vha->hw))
4164 		return qlafx00_fw_ready(vha);
4165 
4166 	rval = QLA_SUCCESS;
4167 
4168 	/* Time to wait for loop down */
4169 	if (IS_P3P_TYPE(ha))
4170 		min_wait = 30;
4171 	else
4172 		min_wait = 20;
4173 
4174 	/*
4175 	 * Firmware should take at most one RATOV to login, plus 5 seconds for
4176 	 * our own processing.
4177 	 */
4178 	if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4179 		wait_time = min_wait;
4180 	}
4181 
4182 	/* Min wait time if loop down */
4183 	mtime = jiffies + (min_wait * HZ);
4184 
4185 	/* wait time before firmware ready */
4186 	wtime = jiffies + (wait_time * HZ);
4187 
4188 	/* Wait for ISP to finish LIP */
4189 	if (!vha->flags.init_done)
4190 		ql_log(ql_log_info, vha, 0x801e,
4191 		    "Waiting for LIP to complete.\n");
4192 
4193 	do {
4194 		memset(state, -1, sizeof(state));
4195 		rval = qla2x00_get_firmware_state(vha, state);
4196 		if (rval == QLA_SUCCESS) {
4197 			if (state[0] < FSTATE_LOSS_OF_SYNC) {
4198 				vha->device_flags &= ~DFLG_NO_CABLE;
4199 			}
4200 			if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4201 				ql_dbg(ql_dbg_taskm, vha, 0x801f,
4202 				    "fw_state=%x 84xx=%x.\n", state[0],
4203 				    state[2]);
4204 				if ((state[2] & FSTATE_LOGGED_IN) &&
4205 				     (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4206 					ql_dbg(ql_dbg_taskm, vha, 0x8028,
4207 					    "Sending verify iocb.\n");
4208 
4209 					cs84xx_time = jiffies;
4210 					rval = qla84xx_init_chip(vha);
4211 					if (rval != QLA_SUCCESS) {
4212 						ql_log(ql_log_warn,
4213 						    vha, 0x8007,
4214 						    "Init chip failed.\n");
4215 						break;
4216 					}
4217 
4218 					/* Add time taken to initialize. */
4219 					cs84xx_time = jiffies - cs84xx_time;
4220 					wtime += cs84xx_time;
4221 					mtime += cs84xx_time;
4222 					ql_dbg(ql_dbg_taskm, vha, 0x8008,
4223 					    "Increasing wait time by %ld. "
4224 					    "New time %ld.\n", cs84xx_time,
4225 					    wtime);
4226 				}
4227 			} else if (state[0] == FSTATE_READY) {
4228 				ql_dbg(ql_dbg_taskm, vha, 0x8037,
4229 				    "F/W Ready - OK.\n");
4230 
4231 				qla2x00_get_retry_cnt(vha, &ha->retry_count,
4232 				    &ha->login_timeout, &ha->r_a_tov);
4233 
4234 				rval = QLA_SUCCESS;
4235 				break;
4236 			}
4237 
4238 			rval = QLA_FUNCTION_FAILED;
4239 
4240 			if (atomic_read(&vha->loop_down_timer) &&
4241 			    state[0] != FSTATE_READY) {
4242 				/* Loop down. Timeout on min_wait for states
4243 				 * other than Wait for Login.
4244 				 */
4245 				if (time_after_eq(jiffies, mtime)) {
4246 					ql_log(ql_log_info, vha, 0x8038,
4247 					    "Cable is unplugged...\n");
4248 
4249 					vha->device_flags |= DFLG_NO_CABLE;
4250 					break;
4251 				}
4252 			}
4253 		} else {
4254 			/* Mailbox cmd failed. Timeout on min_wait. */
4255 			if (time_after_eq(jiffies, mtime) ||
4256 				ha->flags.isp82xx_fw_hung)
4257 				break;
4258 		}
4259 
4260 		if (time_after_eq(jiffies, wtime))
4261 			break;
4262 
4263 		/* Delay for a while */
4264 		msleep(500);
4265 	} while (1);
4266 
4267 	ql_dbg(ql_dbg_taskm, vha, 0x803a,
4268 	    "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4269 	    state[1], state[2], state[3], state[4], state[5], jiffies);
4270 
4271 	if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4272 		ql_log(ql_log_warn, vha, 0x803b,
4273 		    "Firmware ready **** FAILED ****.\n");
4274 	}
4275 
4276 	return (rval);
4277 }
4278 
4279 /*
4280 *  qla2x00_configure_hba
4281 *      Setup adapter context.
4282 *
4283 * Input:
4284 *      ha = adapter state pointer.
4285 *
4286 * Returns:
4287 *      0 = success
4288 *
4289 * Context:
4290 *      Kernel context.
4291 */
4292 static int
4293 qla2x00_configure_hba(scsi_qla_host_t *vha)
4294 {
4295 	int       rval;
4296 	uint16_t      loop_id;
4297 	uint16_t      topo;
4298 	uint16_t      sw_cap;
4299 	uint8_t       al_pa;
4300 	uint8_t       area;
4301 	uint8_t       domain;
4302 	char		connect_type[22];
4303 	struct qla_hw_data *ha = vha->hw;
4304 	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4305 	port_id_t id;
4306 	unsigned long flags;
4307 
4308 	/* Get host addresses. */
4309 	rval = qla2x00_get_adapter_id(vha,
4310 	    &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4311 	if (rval != QLA_SUCCESS) {
4312 		if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4313 		    IS_CNA_CAPABLE(ha) ||
4314 		    (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4315 			ql_dbg(ql_dbg_disc, vha, 0x2008,
4316 			    "Loop is in a transition state.\n");
4317 		} else {
4318 			ql_log(ql_log_warn, vha, 0x2009,
4319 			    "Unable to get host loop ID.\n");
4320 			if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4321 			    (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4322 				ql_log(ql_log_warn, vha, 0x1151,
4323 				    "Doing link init.\n");
4324 				if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4325 					return rval;
4326 			}
4327 			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4328 		}
4329 		return (rval);
4330 	}
4331 
4332 	if (topo == 4) {
4333 		ql_log(ql_log_info, vha, 0x200a,
4334 		    "Cannot get topology - retrying.\n");
4335 		return (QLA_FUNCTION_FAILED);
4336 	}
4337 
4338 	vha->loop_id = loop_id;
4339 
4340 	/* initialize */
4341 	ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4342 	ha->operating_mode = LOOP;
4343 	ha->switch_cap = 0;
4344 
4345 	switch (topo) {
4346 	case 0:
4347 		ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4348 		ha->current_topology = ISP_CFG_NL;
4349 		strcpy(connect_type, "(Loop)");
4350 		break;
4351 
4352 	case 1:
4353 		ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4354 		ha->switch_cap = sw_cap;
4355 		ha->current_topology = ISP_CFG_FL;
4356 		strcpy(connect_type, "(FL_Port)");
4357 		break;
4358 
4359 	case 2:
4360 		ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4361 		ha->operating_mode = P2P;
4362 		ha->current_topology = ISP_CFG_N;
4363 		strcpy(connect_type, "(N_Port-to-N_Port)");
4364 		break;
4365 
4366 	case 3:
4367 		ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4368 		ha->switch_cap = sw_cap;
4369 		ha->operating_mode = P2P;
4370 		ha->current_topology = ISP_CFG_F;
4371 		strcpy(connect_type, "(F_Port)");
4372 		break;
4373 
4374 	default:
4375 		ql_dbg(ql_dbg_disc, vha, 0x200f,
4376 		    "HBA in unknown topology %x, using NL.\n", topo);
4377 		ha->current_topology = ISP_CFG_NL;
4378 		strcpy(connect_type, "(Loop)");
4379 		break;
4380 	}
4381 
4382 	/* Save Host port and loop ID. */
4383 	/* byte order - Big Endian */
4384 	id.b.domain = domain;
4385 	id.b.area = area;
4386 	id.b.al_pa = al_pa;
4387 	id.b.rsvd_1 = 0;
4388 	spin_lock_irqsave(&ha->hardware_lock, flags);
4389 	if (!(topo == 2 && ha->flags.n2n_bigger))
4390 		qlt_update_host_map(vha, id);
4391 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
4392 
4393 	if (!vha->flags.init_done)
4394 		ql_log(ql_log_info, vha, 0x2010,
4395 		    "Topology - %s, Host Loop address 0x%x.\n",
4396 		    connect_type, vha->loop_id);
4397 
4398 	return(rval);
4399 }
4400 
4401 inline void
4402 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4403 	char *def)
4404 {
4405 	char *st, *en;
4406 	uint16_t index;
4407 	uint64_t zero[2] = { 0 };
4408 	struct qla_hw_data *ha = vha->hw;
4409 	int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4410 	    !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4411 
4412 	if (len > sizeof(zero))
4413 		len = sizeof(zero);
4414 	if (memcmp(model, &zero, len) != 0) {
4415 		strncpy(ha->model_number, model, len);
4416 		st = en = ha->model_number;
4417 		en += len - 1;
4418 		while (en > st) {
4419 			if (*en != 0x20 && *en != 0x00)
4420 				break;
4421 			*en-- = '\0';
4422 		}
4423 
4424 		index = (ha->pdev->subsystem_device & 0xff);
4425 		if (use_tbl &&
4426 		    ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4427 		    index < QLA_MODEL_NAMES)
4428 			strncpy(ha->model_desc,
4429 			    qla2x00_model_name[index * 2 + 1],
4430 			    sizeof(ha->model_desc) - 1);
4431 	} else {
4432 		index = (ha->pdev->subsystem_device & 0xff);
4433 		if (use_tbl &&
4434 		    ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4435 		    index < QLA_MODEL_NAMES) {
4436 			strcpy(ha->model_number,
4437 			    qla2x00_model_name[index * 2]);
4438 			strncpy(ha->model_desc,
4439 			    qla2x00_model_name[index * 2 + 1],
4440 			    sizeof(ha->model_desc) - 1);
4441 		} else {
4442 			strcpy(ha->model_number, def);
4443 		}
4444 	}
4445 	if (IS_FWI2_CAPABLE(ha))
4446 		qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4447 		    sizeof(ha->model_desc));
4448 }
4449 
4450 /* On sparc systems, obtain port and node WWN from firmware
4451  * properties.
4452  */
4453 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4454 {
4455 #ifdef CONFIG_SPARC
4456 	struct qla_hw_data *ha = vha->hw;
4457 	struct pci_dev *pdev = ha->pdev;
4458 	struct device_node *dp = pci_device_to_OF_node(pdev);
4459 	const u8 *val;
4460 	int len;
4461 
4462 	val = of_get_property(dp, "port-wwn", &len);
4463 	if (val && len >= WWN_SIZE)
4464 		memcpy(nv->port_name, val, WWN_SIZE);
4465 
4466 	val = of_get_property(dp, "node-wwn", &len);
4467 	if (val && len >= WWN_SIZE)
4468 		memcpy(nv->node_name, val, WWN_SIZE);
4469 #endif
4470 }
4471 
4472 /*
4473 * NVRAM configuration for ISP 2xxx
4474 *
4475 * Input:
4476 *      ha                = adapter block pointer.
4477 *
4478 * Output:
4479 *      initialization control block in response_ring
4480 *      host adapters parameters in host adapter block
4481 *
4482 * Returns:
4483 *      0 = success.
4484 */
4485 int
4486 qla2x00_nvram_config(scsi_qla_host_t *vha)
4487 {
4488 	int             rval;
4489 	uint8_t         chksum = 0;
4490 	uint16_t        cnt;
4491 	uint8_t         *dptr1, *dptr2;
4492 	struct qla_hw_data *ha = vha->hw;
4493 	init_cb_t       *icb = ha->init_cb;
4494 	nvram_t         *nv = ha->nvram;
4495 	uint8_t         *ptr = ha->nvram;
4496 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4497 
4498 	rval = QLA_SUCCESS;
4499 
4500 	/* Determine NVRAM starting address. */
4501 	ha->nvram_size = sizeof(*nv);
4502 	ha->nvram_base = 0;
4503 	if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4504 		if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
4505 			ha->nvram_base = 0x80;
4506 
4507 	/* Get NVRAM data and calculate checksum. */
4508 	ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4509 	for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4510 		chksum += *ptr++;
4511 
4512 	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4513 	    "Contents of NVRAM.\n");
4514 	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4515 	    nv, ha->nvram_size);
4516 
4517 	/* Bad NVRAM data, set defaults parameters. */
4518 	if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
4519 	    nv->nvram_version < 1) {
4520 		/* Reset NVRAM data. */
4521 		ql_log(ql_log_warn, vha, 0x0064,
4522 		    "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
4523 		    chksum, nv->id, nv->nvram_version);
4524 		ql_log(ql_log_warn, vha, 0x0065,
4525 		    "Falling back to "
4526 		    "functioning (yet invalid -- WWPN) defaults.\n");
4527 
4528 		/*
4529 		 * Set default initialization control block.
4530 		 */
4531 		memset(nv, 0, ha->nvram_size);
4532 		nv->parameter_block_version = ICB_VERSION;
4533 
4534 		if (IS_QLA23XX(ha)) {
4535 			nv->firmware_options[0] = BIT_2 | BIT_1;
4536 			nv->firmware_options[1] = BIT_7 | BIT_5;
4537 			nv->add_firmware_options[0] = BIT_5;
4538 			nv->add_firmware_options[1] = BIT_5 | BIT_4;
4539 			nv->frame_payload_size = 2048;
4540 			nv->special_options[1] = BIT_7;
4541 		} else if (IS_QLA2200(ha)) {
4542 			nv->firmware_options[0] = BIT_2 | BIT_1;
4543 			nv->firmware_options[1] = BIT_7 | BIT_5;
4544 			nv->add_firmware_options[0] = BIT_5;
4545 			nv->add_firmware_options[1] = BIT_5 | BIT_4;
4546 			nv->frame_payload_size = 1024;
4547 		} else if (IS_QLA2100(ha)) {
4548 			nv->firmware_options[0] = BIT_3 | BIT_1;
4549 			nv->firmware_options[1] = BIT_5;
4550 			nv->frame_payload_size = 1024;
4551 		}
4552 
4553 		nv->max_iocb_allocation = cpu_to_le16(256);
4554 		nv->execution_throttle = cpu_to_le16(16);
4555 		nv->retry_count = 8;
4556 		nv->retry_delay = 1;
4557 
4558 		nv->port_name[0] = 33;
4559 		nv->port_name[3] = 224;
4560 		nv->port_name[4] = 139;
4561 
4562 		qla2xxx_nvram_wwn_from_ofw(vha, nv);
4563 
4564 		nv->login_timeout = 4;
4565 
4566 		/*
4567 		 * Set default host adapter parameters
4568 		 */
4569 		nv->host_p[1] = BIT_2;
4570 		nv->reset_delay = 5;
4571 		nv->port_down_retry_count = 8;
4572 		nv->max_luns_per_target = cpu_to_le16(8);
4573 		nv->link_down_timeout = 60;
4574 
4575 		rval = 1;
4576 	}
4577 
4578 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
4579 	/*
4580 	 * The SN2 does not provide BIOS emulation which means you can't change
4581 	 * potentially bogus BIOS settings. Force the use of default settings
4582 	 * for link rate and frame size.  Hope that the rest of the settings
4583 	 * are valid.
4584 	 */
4585 	if (ia64_platform_is("sn2")) {
4586 		nv->frame_payload_size = 2048;
4587 		if (IS_QLA23XX(ha))
4588 			nv->special_options[1] = BIT_7;
4589 	}
4590 #endif
4591 
4592 	/* Reset Initialization control block */
4593 	memset(icb, 0, ha->init_cb_size);
4594 
4595 	/*
4596 	 * Setup driver NVRAM options.
4597 	 */
4598 	nv->firmware_options[0] |= (BIT_6 | BIT_1);
4599 	nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4600 	nv->firmware_options[1] |= (BIT_5 | BIT_0);
4601 	nv->firmware_options[1] &= ~BIT_4;
4602 
4603 	if (IS_QLA23XX(ha)) {
4604 		nv->firmware_options[0] |= BIT_2;
4605 		nv->firmware_options[0] &= ~BIT_3;
4606 		nv->special_options[0] &= ~BIT_6;
4607 		nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4608 
4609 		if (IS_QLA2300(ha)) {
4610 			if (ha->fb_rev == FPM_2310) {
4611 				strcpy(ha->model_number, "QLA2310");
4612 			} else {
4613 				strcpy(ha->model_number, "QLA2300");
4614 			}
4615 		} else {
4616 			qla2x00_set_model_info(vha, nv->model_number,
4617 			    sizeof(nv->model_number), "QLA23xx");
4618 		}
4619 	} else if (IS_QLA2200(ha)) {
4620 		nv->firmware_options[0] |= BIT_2;
4621 		/*
4622 		 * 'Point-to-point preferred, else loop' is not a safe
4623 		 * connection mode setting.
4624 		 */
4625 		if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4626 		    (BIT_5 | BIT_4)) {
4627 			/* Force 'loop preferred, else point-to-point'. */
4628 			nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4629 			nv->add_firmware_options[0] |= BIT_5;
4630 		}
4631 		strcpy(ha->model_number, "QLA22xx");
4632 	} else /*if (IS_QLA2100(ha))*/ {
4633 		strcpy(ha->model_number, "QLA2100");
4634 	}
4635 
4636 	/*
4637 	 * Copy over NVRAM RISC parameter block to initialization control block.
4638 	 */
4639 	dptr1 = (uint8_t *)icb;
4640 	dptr2 = (uint8_t *)&nv->parameter_block_version;
4641 	cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4642 	while (cnt--)
4643 		*dptr1++ = *dptr2++;
4644 
4645 	/* Copy 2nd half. */
4646 	dptr1 = (uint8_t *)icb->add_firmware_options;
4647 	cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4648 	while (cnt--)
4649 		*dptr1++ = *dptr2++;
4650 	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4651 	/* Use alternate WWN? */
4652 	if (nv->host_p[1] & BIT_7) {
4653 		memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4654 		memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4655 	}
4656 
4657 	/* Prepare nodename */
4658 	if ((icb->firmware_options[1] & BIT_6) == 0) {
4659 		/*
4660 		 * Firmware will apply the following mask if the nodename was
4661 		 * not provided.
4662 		 */
4663 		memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4664 		icb->node_name[0] &= 0xF0;
4665 	}
4666 
4667 	/*
4668 	 * Set host adapter parameters.
4669 	 */
4670 
4671 	/*
4672 	 * BIT_7 in the host-parameters section allows for modification to
4673 	 * internal driver logging.
4674 	 */
4675 	if (nv->host_p[0] & BIT_7)
4676 		ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4677 	ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4678 	/* Always load RISC code on non ISP2[12]00 chips. */
4679 	if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4680 		ha->flags.disable_risc_code_load = 0;
4681 	ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4682 	ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4683 	ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4684 	ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4685 	ha->flags.disable_serdes = 0;
4686 
4687 	ha->operating_mode =
4688 	    (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4689 
4690 	memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4691 	    sizeof(ha->fw_seriallink_options));
4692 
4693 	/* save HBA serial number */
4694 	ha->serial0 = icb->port_name[5];
4695 	ha->serial1 = icb->port_name[6];
4696 	ha->serial2 = icb->port_name[7];
4697 	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4698 	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4699 
4700 	icb->execution_throttle = cpu_to_le16(0xFFFF);
4701 
4702 	ha->retry_count = nv->retry_count;
4703 
4704 	/* Set minimum login_timeout to 4 seconds. */
4705 	if (nv->login_timeout != ql2xlogintimeout)
4706 		nv->login_timeout = ql2xlogintimeout;
4707 	if (nv->login_timeout < 4)
4708 		nv->login_timeout = 4;
4709 	ha->login_timeout = nv->login_timeout;
4710 
4711 	/* Set minimum RATOV to 100 tenths of a second. */
4712 	ha->r_a_tov = 100;
4713 
4714 	ha->loop_reset_delay = nv->reset_delay;
4715 
4716 	/* Link Down Timeout = 0:
4717 	 *
4718 	 * 	When Port Down timer expires we will start returning
4719 	 *	I/O's to OS with "DID_NO_CONNECT".
4720 	 *
4721 	 * Link Down Timeout != 0:
4722 	 *
4723 	 *	 The driver waits for the link to come up after link down
4724 	 *	 before returning I/Os to OS with "DID_NO_CONNECT".
4725 	 */
4726 	if (nv->link_down_timeout == 0) {
4727 		ha->loop_down_abort_time =
4728 		    (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4729 	} else {
4730 		ha->link_down_timeout =	 nv->link_down_timeout;
4731 		ha->loop_down_abort_time =
4732 		    (LOOP_DOWN_TIME - ha->link_down_timeout);
4733 	}
4734 
4735 	/*
4736 	 * Need enough time to try and get the port back.
4737 	 */
4738 	ha->port_down_retry_count = nv->port_down_retry_count;
4739 	if (qlport_down_retry)
4740 		ha->port_down_retry_count = qlport_down_retry;
4741 	/* Set login_retry_count */
4742 	ha->login_retry_count  = nv->retry_count;
4743 	if (ha->port_down_retry_count == nv->port_down_retry_count &&
4744 	    ha->port_down_retry_count > 3)
4745 		ha->login_retry_count = ha->port_down_retry_count;
4746 	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4747 		ha->login_retry_count = ha->port_down_retry_count;
4748 	if (ql2xloginretrycount)
4749 		ha->login_retry_count = ql2xloginretrycount;
4750 
4751 	icb->lun_enables = cpu_to_le16(0);
4752 	icb->command_resource_count = 0;
4753 	icb->immediate_notify_resource_count = 0;
4754 	icb->timeout = cpu_to_le16(0);
4755 
4756 	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4757 		/* Enable RIO */
4758 		icb->firmware_options[0] &= ~BIT_3;
4759 		icb->add_firmware_options[0] &=
4760 		    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4761 		icb->add_firmware_options[0] |= BIT_2;
4762 		icb->response_accumulation_timer = 3;
4763 		icb->interrupt_delay_timer = 5;
4764 
4765 		vha->flags.process_response_queue = 1;
4766 	} else {
4767 		/* Enable ZIO. */
4768 		if (!vha->flags.init_done) {
4769 			ha->zio_mode = icb->add_firmware_options[0] &
4770 			    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4771 			ha->zio_timer = icb->interrupt_delay_timer ?
4772 			    icb->interrupt_delay_timer : 2;
4773 		}
4774 		icb->add_firmware_options[0] &=
4775 		    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4776 		vha->flags.process_response_queue = 0;
4777 		if (ha->zio_mode != QLA_ZIO_DISABLED) {
4778 			ha->zio_mode = QLA_ZIO_MODE_6;
4779 
4780 			ql_log(ql_log_info, vha, 0x0068,
4781 			    "ZIO mode %d enabled; timer delay (%d us).\n",
4782 			    ha->zio_mode, ha->zio_timer * 100);
4783 
4784 			icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4785 			icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4786 			vha->flags.process_response_queue = 1;
4787 		}
4788 	}
4789 
4790 	if (rval) {
4791 		ql_log(ql_log_warn, vha, 0x0069,
4792 		    "NVRAM configuration failed.\n");
4793 	}
4794 	return (rval);
4795 }
4796 
4797 static void
4798 qla2x00_rport_del(void *data)
4799 {
4800 	fc_port_t *fcport = data;
4801 	struct fc_rport *rport;
4802 	unsigned long flags;
4803 
4804 	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4805 	rport = fcport->drport ? fcport->drport : fcport->rport;
4806 	fcport->drport = NULL;
4807 	spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4808 	if (rport) {
4809 		ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4810 		    "%s %8phN. rport %p roles %x\n",
4811 		    __func__, fcport->port_name, rport,
4812 		    rport->roles);
4813 
4814 		fc_remote_port_delete(rport);
4815 	}
4816 }
4817 
4818 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
4819 {
4820 	int old_state;
4821 
4822 	old_state = atomic_read(&fcport->state);
4823 	atomic_set(&fcport->state, state);
4824 
4825 	/* Don't print state transitions during initial allocation of fcport */
4826 	if (old_state && old_state != state) {
4827 		ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
4828 		       "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
4829 		       fcport->port_name, port_state_str[old_state],
4830 		       port_state_str[state], fcport->d_id.b.domain,
4831 		       fcport->d_id.b.area, fcport->d_id.b.al_pa);
4832 	}
4833 }
4834 
4835 /**
4836  * qla2x00_alloc_fcport() - Allocate a generic fcport.
4837  * @vha: HA context
4838  * @flags: allocation flags
4839  *
4840  * Returns a pointer to the allocated fcport, or NULL, if none available.
4841  */
4842 fc_port_t *
4843 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
4844 {
4845 	fc_port_t *fcport;
4846 
4847 	fcport = kzalloc(sizeof(fc_port_t), flags);
4848 	if (!fcport)
4849 		return NULL;
4850 
4851 	fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4852 		sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4853 		flags);
4854 	if (!fcport->ct_desc.ct_sns) {
4855 		ql_log(ql_log_warn, vha, 0xd049,
4856 		    "Failed to allocate ct_sns request.\n");
4857 		kfree(fcport);
4858 		return NULL;
4859 	}
4860 
4861 	/* Setup fcport template structure. */
4862 	fcport->vha = vha;
4863 	fcport->port_type = FCT_UNKNOWN;
4864 	fcport->loop_id = FC_NO_LOOP_ID;
4865 	qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
4866 	fcport->supported_classes = FC_COS_UNSPECIFIED;
4867 	fcport->fp_speed = PORT_SPEED_UNKNOWN;
4868 
4869 	fcport->disc_state = DSC_DELETED;
4870 	fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4871 	fcport->deleted = QLA_SESS_DELETED;
4872 	fcport->login_retry = vha->hw->login_retry_count;
4873 	fcport->chip_reset = vha->hw->base_qpair->chip_reset;
4874 	fcport->logout_on_delete = 1;
4875 
4876 	if (!fcport->ct_desc.ct_sns) {
4877 		ql_log(ql_log_warn, vha, 0xd049,
4878 		    "Failed to allocate ct_sns request.\n");
4879 		kfree(fcport);
4880 		return NULL;
4881 	}
4882 
4883 	INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4884 	INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
4885 	INIT_LIST_HEAD(&fcport->gnl_entry);
4886 	INIT_LIST_HEAD(&fcport->list);
4887 
4888 	return fcport;
4889 }
4890 
4891 void
4892 qla2x00_free_fcport(fc_port_t *fcport)
4893 {
4894 	if (fcport->ct_desc.ct_sns) {
4895 		dma_free_coherent(&fcport->vha->hw->pdev->dev,
4896 			sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4897 			fcport->ct_desc.ct_sns_dma);
4898 
4899 		fcport->ct_desc.ct_sns = NULL;
4900 	}
4901 	list_del(&fcport->list);
4902 	qla2x00_clear_loop_id(fcport);
4903 	kfree(fcport);
4904 }
4905 
4906 /*
4907  * qla2x00_configure_loop
4908  *      Updates Fibre Channel Device Database with what is actually on loop.
4909  *
4910  * Input:
4911  *      ha                = adapter block pointer.
4912  *
4913  * Returns:
4914  *      0 = success.
4915  *      1 = error.
4916  *      2 = database was full and device was not configured.
4917  */
4918 static int
4919 qla2x00_configure_loop(scsi_qla_host_t *vha)
4920 {
4921 	int  rval;
4922 	unsigned long flags, save_flags;
4923 	struct qla_hw_data *ha = vha->hw;
4924 
4925 	rval = QLA_SUCCESS;
4926 
4927 	/* Get Initiator ID */
4928 	if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4929 		rval = qla2x00_configure_hba(vha);
4930 		if (rval != QLA_SUCCESS) {
4931 			ql_dbg(ql_dbg_disc, vha, 0x2013,
4932 			    "Unable to configure HBA.\n");
4933 			return (rval);
4934 		}
4935 	}
4936 
4937 	save_flags = flags = vha->dpc_flags;
4938 	ql_dbg(ql_dbg_disc, vha, 0x2014,
4939 	    "Configure loop -- dpc flags = 0x%lx.\n", flags);
4940 
4941 	/*
4942 	 * If we have both an RSCN and PORT UPDATE pending then handle them
4943 	 * both at the same time.
4944 	 */
4945 	clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4946 	clear_bit(RSCN_UPDATE, &vha->dpc_flags);
4947 
4948 	qla2x00_get_data_rate(vha);
4949 
4950 	/* Determine what we need to do */
4951 	if (ha->current_topology == ISP_CFG_FL &&
4952 	    (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4953 
4954 		set_bit(RSCN_UPDATE, &flags);
4955 
4956 	} else if (ha->current_topology == ISP_CFG_F &&
4957 	    (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4958 
4959 		set_bit(RSCN_UPDATE, &flags);
4960 		clear_bit(LOCAL_LOOP_UPDATE, &flags);
4961 
4962 	} else if (ha->current_topology == ISP_CFG_N) {
4963 		clear_bit(RSCN_UPDATE, &flags);
4964 		if (qla_tgt_mode_enabled(vha)) {
4965 			/* allow the other side to start the login */
4966 			clear_bit(LOCAL_LOOP_UPDATE, &flags);
4967 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4968 		}
4969 	} else if (ha->current_topology == ISP_CFG_NL) {
4970 		clear_bit(RSCN_UPDATE, &flags);
4971 		set_bit(LOCAL_LOOP_UPDATE, &flags);
4972 	} else if (!vha->flags.online ||
4973 	    (test_bit(ABORT_ISP_ACTIVE, &flags))) {
4974 		set_bit(RSCN_UPDATE, &flags);
4975 		set_bit(LOCAL_LOOP_UPDATE, &flags);
4976 	}
4977 
4978 	if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
4979 		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4980 			ql_dbg(ql_dbg_disc, vha, 0x2015,
4981 			    "Loop resync needed, failing.\n");
4982 			rval = QLA_FUNCTION_FAILED;
4983 		} else
4984 			rval = qla2x00_configure_local_loop(vha);
4985 	}
4986 
4987 	if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
4988 		if (LOOP_TRANSITION(vha)) {
4989 			ql_dbg(ql_dbg_disc, vha, 0x2099,
4990 			    "Needs RSCN update and loop transition.\n");
4991 			rval = QLA_FUNCTION_FAILED;
4992 		}
4993 		else
4994 			rval = qla2x00_configure_fabric(vha);
4995 	}
4996 
4997 	if (rval == QLA_SUCCESS) {
4998 		if (atomic_read(&vha->loop_down_timer) ||
4999 		    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5000 			rval = QLA_FUNCTION_FAILED;
5001 		} else {
5002 			atomic_set(&vha->loop_state, LOOP_READY);
5003 			ql_dbg(ql_dbg_disc, vha, 0x2069,
5004 			    "LOOP READY.\n");
5005 			ha->flags.fw_init_done = 1;
5006 
5007 			/*
5008 			 * Process any ATIO queue entries that came in
5009 			 * while we weren't online.
5010 			 */
5011 			if (qla_tgt_mode_enabled(vha) ||
5012 			    qla_dual_mode_enabled(vha)) {
5013 				spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5014 				qlt_24xx_process_atio_queue(vha, 0);
5015 				spin_unlock_irqrestore(&ha->tgt.atio_lock,
5016 				    flags);
5017 			}
5018 		}
5019 	}
5020 
5021 	if (rval) {
5022 		ql_dbg(ql_dbg_disc, vha, 0x206a,
5023 		    "%s *** FAILED ***.\n", __func__);
5024 	} else {
5025 		ql_dbg(ql_dbg_disc, vha, 0x206b,
5026 		    "%s: exiting normally.\n", __func__);
5027 	}
5028 
5029 	/* Restore state if a resync event occurred during processing */
5030 	if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5031 		if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5032 			set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5033 		if (test_bit(RSCN_UPDATE, &save_flags)) {
5034 			set_bit(RSCN_UPDATE, &vha->dpc_flags);
5035 		}
5036 	}
5037 
5038 	return (rval);
5039 }
5040 
5041 /*
5042  * qla2x00_configure_local_loop
5043  *	Updates Fibre Channel Device Database with local loop devices.
5044  *
5045  * Input:
5046  *	ha = adapter block pointer.
5047  *
5048  * Returns:
5049  *	0 = success.
5050  */
5051 static int
5052 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5053 {
5054 	int		rval, rval2;
5055 	int		found_devs;
5056 	int		found;
5057 	fc_port_t	*fcport, *new_fcport;
5058 
5059 	uint16_t	index;
5060 	uint16_t	entries;
5061 	char		*id_iter;
5062 	uint16_t	loop_id;
5063 	uint8_t		domain, area, al_pa;
5064 	struct qla_hw_data *ha = vha->hw;
5065 	unsigned long flags;
5066 
5067 	/* Inititae N2N login. */
5068 	if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
5069 		/* borrowing */
5070 		u32 *bp, i, sz;
5071 
5072 		memset(ha->init_cb, 0, ha->init_cb_size);
5073 		sz = min_t(int, sizeof(struct els_plogi_payload),
5074 		    ha->init_cb_size);
5075 		rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5076 		    (void *)ha->init_cb, sz);
5077 		if (rval == QLA_SUCCESS) {
5078 			bp = (uint32_t *)ha->init_cb;
5079 			for (i = 0; i < sz/4 ; i++, bp++)
5080 				*bp = cpu_to_be32(*bp);
5081 
5082 			memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb,
5083 			    sizeof(ha->plogi_els_payld.data));
5084 			set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5085 		} else {
5086 			ql_dbg(ql_dbg_init, vha, 0x00d1,
5087 			    "PLOGI ELS param read fail.\n");
5088 		}
5089 		return QLA_SUCCESS;
5090 	}
5091 
5092 	found_devs = 0;
5093 	new_fcport = NULL;
5094 	entries = MAX_FIBRE_DEVICES_LOOP;
5095 
5096 	/* Get list of logged in devices. */
5097 	memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5098 	rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5099 	    &entries);
5100 	if (rval != QLA_SUCCESS)
5101 		goto cleanup_allocation;
5102 
5103 	ql_dbg(ql_dbg_disc, vha, 0x2011,
5104 	    "Entries in ID list (%d).\n", entries);
5105 	ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5106 	    ha->gid_list, entries * sizeof(*ha->gid_list));
5107 
5108 	if (entries == 0) {
5109 		spin_lock_irqsave(&vha->work_lock, flags);
5110 		vha->scan.scan_retry++;
5111 		spin_unlock_irqrestore(&vha->work_lock, flags);
5112 
5113 		if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5114 			set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5115 			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5116 		}
5117 	} else {
5118 		vha->scan.scan_retry = 0;
5119 	}
5120 
5121 	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5122 		fcport->scan_state = QLA_FCPORT_SCAN;
5123 	}
5124 
5125 	/* Allocate temporary fcport for any new fcports discovered. */
5126 	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5127 	if (new_fcport == NULL) {
5128 		ql_log(ql_log_warn, vha, 0x2012,
5129 		    "Memory allocation failed for fcport.\n");
5130 		rval = QLA_MEMORY_ALLOC_FAILED;
5131 		goto cleanup_allocation;
5132 	}
5133 	new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5134 
5135 	/* Add devices to port list. */
5136 	id_iter = (char *)ha->gid_list;
5137 	for (index = 0; index < entries; index++) {
5138 		domain = ((struct gid_list_info *)id_iter)->domain;
5139 		area = ((struct gid_list_info *)id_iter)->area;
5140 		al_pa = ((struct gid_list_info *)id_iter)->al_pa;
5141 		if (IS_QLA2100(ha) || IS_QLA2200(ha))
5142 			loop_id = (uint16_t)
5143 			    ((struct gid_list_info *)id_iter)->loop_id_2100;
5144 		else
5145 			loop_id = le16_to_cpu(
5146 			    ((struct gid_list_info *)id_iter)->loop_id);
5147 		id_iter += ha->gid_list_info_size;
5148 
5149 		/* Bypass reserved domain fields. */
5150 		if ((domain & 0xf0) == 0xf0)
5151 			continue;
5152 
5153 		/* Bypass if not same domain and area of adapter. */
5154 		if (area && domain && ((area != vha->d_id.b.area) ||
5155 		    (domain != vha->d_id.b.domain)) &&
5156 		    (ha->current_topology == ISP_CFG_NL))
5157 			continue;
5158 
5159 
5160 		/* Bypass invalid local loop ID. */
5161 		if (loop_id > LAST_LOCAL_LOOP_ID)
5162 			continue;
5163 
5164 		memset(new_fcport->port_name, 0, WWN_SIZE);
5165 
5166 		/* Fill in member data. */
5167 		new_fcport->d_id.b.domain = domain;
5168 		new_fcport->d_id.b.area = area;
5169 		new_fcport->d_id.b.al_pa = al_pa;
5170 		new_fcport->loop_id = loop_id;
5171 		new_fcport->scan_state = QLA_FCPORT_FOUND;
5172 
5173 		rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5174 		if (rval2 != QLA_SUCCESS) {
5175 			ql_dbg(ql_dbg_disc, vha, 0x2097,
5176 			    "Failed to retrieve fcport information "
5177 			    "-- get_port_database=%x, loop_id=0x%04x.\n",
5178 			    rval2, new_fcport->loop_id);
5179 			/* Skip retry if N2N */
5180 			if (ha->current_topology != ISP_CFG_N) {
5181 				ql_dbg(ql_dbg_disc, vha, 0x2105,
5182 				    "Scheduling resync.\n");
5183 				set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5184 				continue;
5185 			}
5186 		}
5187 
5188 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5189 		/* Check for matching device in port list. */
5190 		found = 0;
5191 		fcport = NULL;
5192 		list_for_each_entry(fcport, &vha->vp_fcports, list) {
5193 			if (memcmp(new_fcport->port_name, fcport->port_name,
5194 			    WWN_SIZE))
5195 				continue;
5196 
5197 			fcport->flags &= ~FCF_FABRIC_DEVICE;
5198 			fcport->loop_id = new_fcport->loop_id;
5199 			fcport->port_type = new_fcport->port_type;
5200 			fcport->d_id.b24 = new_fcport->d_id.b24;
5201 			memcpy(fcport->node_name, new_fcport->node_name,
5202 			    WWN_SIZE);
5203 			fcport->scan_state = QLA_FCPORT_FOUND;
5204 			found++;
5205 			break;
5206 		}
5207 
5208 		if (!found) {
5209 			/* New device, add to fcports list. */
5210 			list_add_tail(&new_fcport->list, &vha->vp_fcports);
5211 
5212 			/* Allocate a new replacement fcport. */
5213 			fcport = new_fcport;
5214 
5215 			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5216 
5217 			new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5218 
5219 			if (new_fcport == NULL) {
5220 				ql_log(ql_log_warn, vha, 0xd031,
5221 				    "Failed to allocate memory for fcport.\n");
5222 				rval = QLA_MEMORY_ALLOC_FAILED;
5223 				goto cleanup_allocation;
5224 			}
5225 			spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5226 			new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5227 		}
5228 
5229 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5230 
5231 		/* Base iIDMA settings on HBA port speed. */
5232 		fcport->fp_speed = ha->link_data_rate;
5233 
5234 		found_devs++;
5235 	}
5236 
5237 	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5238 		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5239 			break;
5240 
5241 		if (fcport->scan_state == QLA_FCPORT_SCAN) {
5242 			if ((qla_dual_mode_enabled(vha) ||
5243 			    qla_ini_mode_enabled(vha)) &&
5244 			    atomic_read(&fcport->state) == FCS_ONLINE) {
5245 				qla2x00_mark_device_lost(vha, fcport,
5246 					ql2xplogiabsentdevice, 0);
5247 				if (fcport->loop_id != FC_NO_LOOP_ID &&
5248 				    (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5249 				    fcport->port_type != FCT_INITIATOR &&
5250 				    fcport->port_type != FCT_BROADCAST) {
5251 					ql_dbg(ql_dbg_disc, vha, 0x20f0,
5252 					    "%s %d %8phC post del sess\n",
5253 					    __func__, __LINE__,
5254 					    fcport->port_name);
5255 
5256 					qlt_schedule_sess_for_deletion(fcport);
5257 					continue;
5258 				}
5259 			}
5260 		}
5261 
5262 		if (fcport->scan_state == QLA_FCPORT_FOUND)
5263 			qla24xx_fcport_handle_login(vha, fcport);
5264 	}
5265 
5266 cleanup_allocation:
5267 	kfree(new_fcport);
5268 
5269 	if (rval != QLA_SUCCESS) {
5270 		ql_dbg(ql_dbg_disc, vha, 0x2098,
5271 		    "Configure local loop error exit: rval=%x.\n", rval);
5272 	}
5273 
5274 	return (rval);
5275 }
5276 
5277 static void
5278 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5279 {
5280 	int rval;
5281 	uint16_t mb[MAILBOX_REGISTER_COUNT];
5282 	struct qla_hw_data *ha = vha->hw;
5283 
5284 	if (!IS_IIDMA_CAPABLE(ha))
5285 		return;
5286 
5287 	if (atomic_read(&fcport->state) != FCS_ONLINE)
5288 		return;
5289 
5290 	if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5291 	    fcport->fp_speed > ha->link_data_rate ||
5292 	    !ha->flags.gpsc_supported)
5293 		return;
5294 
5295 	rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5296 	    mb);
5297 	if (rval != QLA_SUCCESS) {
5298 		ql_dbg(ql_dbg_disc, vha, 0x2004,
5299 		    "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5300 		    fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5301 	} else {
5302 		ql_dbg(ql_dbg_disc, vha, 0x2005,
5303 		    "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5304 		    qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5305 		    fcport->fp_speed, fcport->port_name);
5306 	}
5307 }
5308 
5309 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5310 {
5311 	qla2x00_iidma_fcport(vha, fcport);
5312 	qla24xx_update_fcport_fcp_prio(vha, fcport);
5313 }
5314 
5315 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5316 {
5317 	struct qla_work_evt *e;
5318 
5319 	e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5320 	if (!e)
5321 		return QLA_FUNCTION_FAILED;
5322 
5323 	e->u.fcport.fcport = fcport;
5324 	return qla2x00_post_work(vha, e);
5325 }
5326 
5327 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5328 static void
5329 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5330 {
5331 	struct fc_rport_identifiers rport_ids;
5332 	struct fc_rport *rport;
5333 	unsigned long flags;
5334 
5335 	if (atomic_read(&fcport->state) == FCS_ONLINE)
5336 		return;
5337 
5338 	rport_ids.node_name = wwn_to_u64(fcport->node_name);
5339 	rport_ids.port_name = wwn_to_u64(fcport->port_name);
5340 	rport_ids.port_id = fcport->d_id.b.domain << 16 |
5341 	    fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5342 	rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5343 	fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5344 	if (!rport) {
5345 		ql_log(ql_log_warn, vha, 0x2006,
5346 		    "Unable to allocate fc remote port.\n");
5347 		return;
5348 	}
5349 
5350 	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5351 	*((fc_port_t **)rport->dd_data) = fcport;
5352 	spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5353 
5354 	rport->supported_classes = fcport->supported_classes;
5355 
5356 	rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5357 	if (fcport->port_type == FCT_INITIATOR)
5358 		rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
5359 	if (fcport->port_type == FCT_TARGET)
5360 		rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
5361 	if (fcport->port_type & FCT_NVME_INITIATOR)
5362 		rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
5363 	if (fcport->port_type & FCT_NVME_TARGET)
5364 		rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
5365 	if (fcport->port_type & FCT_NVME_DISCOVERY)
5366 		rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
5367 
5368 	ql_dbg(ql_dbg_disc, vha, 0x20ee,
5369 	    "%s %8phN. rport %p is %s mode\n",
5370 	    __func__, fcport->port_name, rport,
5371 	    (fcport->port_type == FCT_TARGET) ? "tgt" :
5372 	    ((fcport->port_type & FCT_NVME) ? "nvme" :"ini"));
5373 
5374 	fc_remote_port_rolechg(rport, rport_ids.roles);
5375 }
5376 
5377 /*
5378  * qla2x00_update_fcport
5379  *	Updates device on list.
5380  *
5381  * Input:
5382  *	ha = adapter block pointer.
5383  *	fcport = port structure pointer.
5384  *
5385  * Return:
5386  *	0  - Success
5387  *  BIT_0 - error
5388  *
5389  * Context:
5390  *	Kernel context.
5391  */
5392 void
5393 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5394 {
5395 	if (IS_SW_RESV_ADDR(fcport->d_id))
5396 		return;
5397 
5398 	ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5399 	    __func__, fcport->port_name);
5400 
5401 	fcport->disc_state = DSC_UPD_FCPORT;
5402 	fcport->login_retry = vha->hw->login_retry_count;
5403 	fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5404 	fcport->deleted = 0;
5405 	fcport->logout_on_delete = 1;
5406 	fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5407 
5408 	switch (vha->hw->current_topology) {
5409 	case ISP_CFG_N:
5410 	case ISP_CFG_NL:
5411 		fcport->keep_nport_handle = 1;
5412 		break;
5413 	default:
5414 		break;
5415 	}
5416 
5417 	qla2x00_iidma_fcport(vha, fcport);
5418 
5419 	if (fcport->fc4f_nvme) {
5420 		qla_nvme_register_remote(vha, fcport);
5421 		fcport->disc_state = DSC_LOGIN_COMPLETE;
5422 		qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5423 		return;
5424 	}
5425 
5426 	qla24xx_update_fcport_fcp_prio(vha, fcport);
5427 
5428 	switch (vha->host->active_mode) {
5429 	case MODE_INITIATOR:
5430 		qla2x00_reg_remote_port(vha, fcport);
5431 		break;
5432 	case MODE_TARGET:
5433 		if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5434 			!vha->vha_tgt.qla_tgt->tgt_stopped)
5435 			qlt_fc_port_added(vha, fcport);
5436 		break;
5437 	case MODE_DUAL:
5438 		qla2x00_reg_remote_port(vha, fcport);
5439 		if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5440 			!vha->vha_tgt.qla_tgt->tgt_stopped)
5441 			qlt_fc_port_added(vha, fcport);
5442 		break;
5443 	default:
5444 		break;
5445 	}
5446 
5447 	qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5448 
5449 	if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5450 		if (fcport->id_changed) {
5451 			fcport->id_changed = 0;
5452 			ql_dbg(ql_dbg_disc, vha, 0x20d7,
5453 			    "%s %d %8phC post gfpnid fcp_cnt %d\n",
5454 			    __func__, __LINE__, fcport->port_name,
5455 			    vha->fcport_count);
5456 			qla24xx_post_gfpnid_work(vha, fcport);
5457 		} else {
5458 			ql_dbg(ql_dbg_disc, vha, 0x20d7,
5459 			    "%s %d %8phC post gpsc fcp_cnt %d\n",
5460 			    __func__, __LINE__, fcport->port_name,
5461 			    vha->fcport_count);
5462 			qla24xx_post_gpsc_work(vha, fcport);
5463 		}
5464 	}
5465 
5466 	fcport->disc_state = DSC_LOGIN_COMPLETE;
5467 }
5468 
5469 void qla_register_fcport_fn(struct work_struct *work)
5470 {
5471 	fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5472 	u32 rscn_gen = fcport->rscn_gen;
5473 	u16 data[2];
5474 
5475 	if (IS_SW_RESV_ADDR(fcport->d_id))
5476 		return;
5477 
5478 	qla2x00_update_fcport(fcport->vha, fcport);
5479 
5480 	if (rscn_gen != fcport->rscn_gen) {
5481 		/* RSCN(s) came in while registration */
5482 		switch (fcport->next_disc_state) {
5483 		case DSC_DELETE_PEND:
5484 			qlt_schedule_sess_for_deletion(fcport);
5485 			break;
5486 		case DSC_ADISC:
5487 			data[0] = data[1] = 0;
5488 			qla2x00_post_async_adisc_work(fcport->vha, fcport,
5489 			    data);
5490 			break;
5491 		default:
5492 			break;
5493 		}
5494 	}
5495 }
5496 
5497 /*
5498  * qla2x00_configure_fabric
5499  *      Setup SNS devices with loop ID's.
5500  *
5501  * Input:
5502  *      ha = adapter block pointer.
5503  *
5504  * Returns:
5505  *      0 = success.
5506  *      BIT_0 = error
5507  */
5508 static int
5509 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5510 {
5511 	int	rval;
5512 	fc_port_t	*fcport;
5513 	uint16_t	mb[MAILBOX_REGISTER_COUNT];
5514 	uint16_t	loop_id;
5515 	LIST_HEAD(new_fcports);
5516 	struct qla_hw_data *ha = vha->hw;
5517 	int		discovery_gen;
5518 
5519 	/* If FL port exists, then SNS is present */
5520 	if (IS_FWI2_CAPABLE(ha))
5521 		loop_id = NPH_F_PORT;
5522 	else
5523 		loop_id = SNS_FL_PORT;
5524 	rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5525 	if (rval != QLA_SUCCESS) {
5526 		ql_dbg(ql_dbg_disc, vha, 0x20a0,
5527 		    "MBX_GET_PORT_NAME failed, No FL Port.\n");
5528 
5529 		vha->device_flags &= ~SWITCH_FOUND;
5530 		return (QLA_SUCCESS);
5531 	}
5532 	vha->device_flags |= SWITCH_FOUND;
5533 
5534 
5535 	if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5536 		rval = qla2x00_send_change_request(vha, 0x3, 0);
5537 		if (rval != QLA_SUCCESS)
5538 			ql_log(ql_log_warn, vha, 0x121,
5539 				"Failed to enable receiving of RSCN requests: 0x%x.\n",
5540 				rval);
5541 	}
5542 
5543 
5544 	do {
5545 		qla2x00_mgmt_svr_login(vha);
5546 
5547 		/* FDMI support. */
5548 		if (ql2xfdmienable &&
5549 		    test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5550 			qla2x00_fdmi_register(vha);
5551 
5552 		/* Ensure we are logged into the SNS. */
5553 		loop_id = NPH_SNS_LID(ha);
5554 		rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5555 		    0xfc, mb, BIT_1|BIT_0);
5556 		if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5557 			ql_dbg(ql_dbg_disc, vha, 0x20a1,
5558 			    "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5559 			    loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5560 			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5561 			return rval;
5562 		}
5563 		if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5564 			if (qla2x00_rft_id(vha)) {
5565 				/* EMPTY */
5566 				ql_dbg(ql_dbg_disc, vha, 0x20a2,
5567 				    "Register FC-4 TYPE failed.\n");
5568 				if (test_bit(LOOP_RESYNC_NEEDED,
5569 				    &vha->dpc_flags))
5570 					break;
5571 			}
5572 			if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5573 				/* EMPTY */
5574 				ql_dbg(ql_dbg_disc, vha, 0x209a,
5575 				    "Register FC-4 Features failed.\n");
5576 				if (test_bit(LOOP_RESYNC_NEEDED,
5577 				    &vha->dpc_flags))
5578 					break;
5579 			}
5580 			if (vha->flags.nvme_enabled) {
5581 				if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5582 					ql_dbg(ql_dbg_disc, vha, 0x2049,
5583 					    "Register NVME FC Type Features failed.\n");
5584 				}
5585 			}
5586 			if (qla2x00_rnn_id(vha)) {
5587 				/* EMPTY */
5588 				ql_dbg(ql_dbg_disc, vha, 0x2104,
5589 				    "Register Node Name failed.\n");
5590 				if (test_bit(LOOP_RESYNC_NEEDED,
5591 				    &vha->dpc_flags))
5592 					break;
5593 			} else if (qla2x00_rsnn_nn(vha)) {
5594 				/* EMPTY */
5595 				ql_dbg(ql_dbg_disc, vha, 0x209b,
5596 				    "Register Symbolic Node Name failed.\n");
5597 				if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5598 					break;
5599 			}
5600 		}
5601 
5602 
5603 		/* Mark the time right before querying FW for connected ports.
5604 		 * This process is long, asynchronous and by the time it's done,
5605 		 * collected information might not be accurate anymore. E.g.
5606 		 * disconnected port might have re-connected and a brand new
5607 		 * session has been created. In this case session's generation
5608 		 * will be newer than discovery_gen. */
5609 		qlt_do_generation_tick(vha, &discovery_gen);
5610 
5611 		if (USE_ASYNC_SCAN(ha)) {
5612 			rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5613 			    NULL);
5614 			if (rval)
5615 				set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5616 		} else  {
5617 			list_for_each_entry(fcport, &vha->vp_fcports, list)
5618 				fcport->scan_state = QLA_FCPORT_SCAN;
5619 
5620 			rval = qla2x00_find_all_fabric_devs(vha);
5621 		}
5622 		if (rval != QLA_SUCCESS)
5623 			break;
5624 	} while (0);
5625 
5626 	if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5627 		qla_nvme_register_hba(vha);
5628 
5629 	if (rval)
5630 		ql_dbg(ql_dbg_disc, vha, 0x2068,
5631 		    "Configure fabric error exit rval=%d.\n", rval);
5632 
5633 	return (rval);
5634 }
5635 
5636 /*
5637  * qla2x00_find_all_fabric_devs
5638  *
5639  * Input:
5640  *	ha = adapter block pointer.
5641  *	dev = database device entry pointer.
5642  *
5643  * Returns:
5644  *	0 = success.
5645  *
5646  * Context:
5647  *	Kernel context.
5648  */
5649 static int
5650 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5651 {
5652 	int		rval;
5653 	uint16_t	loop_id;
5654 	fc_port_t	*fcport, *new_fcport;
5655 	int		found;
5656 
5657 	sw_info_t	*swl;
5658 	int		swl_idx;
5659 	int		first_dev, last_dev;
5660 	port_id_t	wrap = {}, nxt_d_id;
5661 	struct qla_hw_data *ha = vha->hw;
5662 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5663 	unsigned long flags;
5664 
5665 	rval = QLA_SUCCESS;
5666 
5667 	/* Try GID_PT to get device list, else GAN. */
5668 	if (!ha->swl)
5669 		ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5670 		    GFP_KERNEL);
5671 	swl = ha->swl;
5672 	if (!swl) {
5673 		/*EMPTY*/
5674 		ql_dbg(ql_dbg_disc, vha, 0x209c,
5675 		    "GID_PT allocations failed, fallback on GA_NXT.\n");
5676 	} else {
5677 		memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5678 		if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5679 			swl = NULL;
5680 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5681 				return rval;
5682 		} else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5683 			swl = NULL;
5684 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5685 				return rval;
5686 		} else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5687 			swl = NULL;
5688 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5689 				return rval;
5690 		} else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5691 			swl = NULL;
5692 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5693 				return rval;
5694 		}
5695 
5696 		/* If other queries succeeded probe for FC-4 type */
5697 		if (swl) {
5698 			qla2x00_gff_id(vha, swl);
5699 			if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5700 				return rval;
5701 		}
5702 	}
5703 	swl_idx = 0;
5704 
5705 	/* Allocate temporary fcport for any new fcports discovered. */
5706 	new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5707 	if (new_fcport == NULL) {
5708 		ql_log(ql_log_warn, vha, 0x209d,
5709 		    "Failed to allocate memory for fcport.\n");
5710 		return (QLA_MEMORY_ALLOC_FAILED);
5711 	}
5712 	new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5713 	/* Set start port ID scan at adapter ID. */
5714 	first_dev = 1;
5715 	last_dev = 0;
5716 
5717 	/* Starting free loop ID. */
5718 	loop_id = ha->min_external_loopid;
5719 	for (; loop_id <= ha->max_loop_id; loop_id++) {
5720 		if (qla2x00_is_reserved_id(vha, loop_id))
5721 			continue;
5722 
5723 		if (ha->current_topology == ISP_CFG_FL &&
5724 		    (atomic_read(&vha->loop_down_timer) ||
5725 		     LOOP_TRANSITION(vha))) {
5726 			atomic_set(&vha->loop_down_timer, 0);
5727 			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5728 			set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5729 			break;
5730 		}
5731 
5732 		if (swl != NULL) {
5733 			if (last_dev) {
5734 				wrap.b24 = new_fcport->d_id.b24;
5735 			} else {
5736 				new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5737 				memcpy(new_fcport->node_name,
5738 				    swl[swl_idx].node_name, WWN_SIZE);
5739 				memcpy(new_fcport->port_name,
5740 				    swl[swl_idx].port_name, WWN_SIZE);
5741 				memcpy(new_fcport->fabric_port_name,
5742 				    swl[swl_idx].fabric_port_name, WWN_SIZE);
5743 				new_fcport->fp_speed = swl[swl_idx].fp_speed;
5744 				new_fcport->fc4_type = swl[swl_idx].fc4_type;
5745 
5746 				new_fcport->nvme_flag = 0;
5747 				new_fcport->fc4f_nvme = 0;
5748 				if (vha->flags.nvme_enabled &&
5749 				    swl[swl_idx].fc4f_nvme) {
5750 					new_fcport->fc4f_nvme =
5751 					    swl[swl_idx].fc4f_nvme;
5752 					ql_log(ql_log_info, vha, 0x2131,
5753 					    "FOUND: NVME port %8phC as FC Type 28h\n",
5754 					    new_fcport->port_name);
5755 				}
5756 
5757 				if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5758 					last_dev = 1;
5759 				}
5760 				swl_idx++;
5761 			}
5762 		} else {
5763 			/* Send GA_NXT to the switch */
5764 			rval = qla2x00_ga_nxt(vha, new_fcport);
5765 			if (rval != QLA_SUCCESS) {
5766 				ql_log(ql_log_warn, vha, 0x209e,
5767 				    "SNS scan failed -- assuming "
5768 				    "zero-entry result.\n");
5769 				rval = QLA_SUCCESS;
5770 				break;
5771 			}
5772 		}
5773 
5774 		/* If wrap on switch device list, exit. */
5775 		if (first_dev) {
5776 			wrap.b24 = new_fcport->d_id.b24;
5777 			first_dev = 0;
5778 		} else if (new_fcport->d_id.b24 == wrap.b24) {
5779 			ql_dbg(ql_dbg_disc, vha, 0x209f,
5780 			    "Device wrap (%02x%02x%02x).\n",
5781 			    new_fcport->d_id.b.domain,
5782 			    new_fcport->d_id.b.area,
5783 			    new_fcport->d_id.b.al_pa);
5784 			break;
5785 		}
5786 
5787 		/* Bypass if same physical adapter. */
5788 		if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5789 			continue;
5790 
5791 		/* Bypass virtual ports of the same host. */
5792 		if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5793 			continue;
5794 
5795 		/* Bypass if same domain and area of adapter. */
5796 		if (((new_fcport->d_id.b24 & 0xffff00) ==
5797 		    (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5798 			ISP_CFG_FL)
5799 			    continue;
5800 
5801 		/* Bypass reserved domain fields. */
5802 		if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5803 			continue;
5804 
5805 		/* Bypass ports whose FCP-4 type is not FCP_SCSI */
5806 		if (ql2xgffidenable &&
5807 		    (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5808 		    new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
5809 			continue;
5810 
5811 		spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5812 
5813 		/* Locate matching device in database. */
5814 		found = 0;
5815 		list_for_each_entry(fcport, &vha->vp_fcports, list) {
5816 			if (memcmp(new_fcport->port_name, fcport->port_name,
5817 			    WWN_SIZE))
5818 				continue;
5819 
5820 			fcport->scan_state = QLA_FCPORT_FOUND;
5821 
5822 			found++;
5823 
5824 			/* Update port state. */
5825 			memcpy(fcport->fabric_port_name,
5826 			    new_fcport->fabric_port_name, WWN_SIZE);
5827 			fcport->fp_speed = new_fcport->fp_speed;
5828 
5829 			/*
5830 			 * If address the same and state FCS_ONLINE
5831 			 * (or in target mode), nothing changed.
5832 			 */
5833 			if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
5834 			    (atomic_read(&fcport->state) == FCS_ONLINE ||
5835 			     (vha->host->active_mode == MODE_TARGET))) {
5836 				break;
5837 			}
5838 
5839 			/*
5840 			 * If device was not a fabric device before.
5841 			 */
5842 			if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5843 				fcport->d_id.b24 = new_fcport->d_id.b24;
5844 				qla2x00_clear_loop_id(fcport);
5845 				fcport->flags |= (FCF_FABRIC_DEVICE |
5846 				    FCF_LOGIN_NEEDED);
5847 				break;
5848 			}
5849 
5850 			/*
5851 			 * Port ID changed or device was marked to be updated;
5852 			 * Log it out if still logged in and mark it for
5853 			 * relogin later.
5854 			 */
5855 			if (qla_tgt_mode_enabled(base_vha)) {
5856 				ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5857 					 "port changed FC ID, %8phC"
5858 					 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5859 					 fcport->port_name,
5860 					 fcport->d_id.b.domain,
5861 					 fcport->d_id.b.area,
5862 					 fcport->d_id.b.al_pa,
5863 					 fcport->loop_id,
5864 					 new_fcport->d_id.b.domain,
5865 					 new_fcport->d_id.b.area,
5866 					 new_fcport->d_id.b.al_pa);
5867 				fcport->d_id.b24 = new_fcport->d_id.b24;
5868 				break;
5869 			}
5870 
5871 			fcport->d_id.b24 = new_fcport->d_id.b24;
5872 			fcport->flags |= FCF_LOGIN_NEEDED;
5873 			break;
5874 		}
5875 
5876 		if (fcport->fc4f_nvme) {
5877 			if (fcport->disc_state == DSC_DELETE_PEND) {
5878 				fcport->disc_state = DSC_GNL;
5879 				vha->fcport_count--;
5880 				fcport->login_succ = 0;
5881 			}
5882 		}
5883 
5884 		if (found) {
5885 			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5886 			continue;
5887 		}
5888 		/* If device was not in our fcports list, then add it. */
5889 		new_fcport->scan_state = QLA_FCPORT_FOUND;
5890 		list_add_tail(&new_fcport->list, &vha->vp_fcports);
5891 
5892 		spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5893 
5894 
5895 		/* Allocate a new replacement fcport. */
5896 		nxt_d_id.b24 = new_fcport->d_id.b24;
5897 		new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5898 		if (new_fcport == NULL) {
5899 			ql_log(ql_log_warn, vha, 0xd032,
5900 			    "Memory allocation failed for fcport.\n");
5901 			return (QLA_MEMORY_ALLOC_FAILED);
5902 		}
5903 		new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5904 		new_fcport->d_id.b24 = nxt_d_id.b24;
5905 	}
5906 
5907 	qla2x00_free_fcport(new_fcport);
5908 
5909 	/*
5910 	 * Logout all previous fabric dev marked lost, except FCP2 devices.
5911 	 */
5912 	list_for_each_entry(fcport, &vha->vp_fcports, list) {
5913 		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5914 			break;
5915 
5916 		if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
5917 		    (fcport->flags & FCF_LOGIN_NEEDED) == 0)
5918 			continue;
5919 
5920 		if (fcport->scan_state == QLA_FCPORT_SCAN) {
5921 			if ((qla_dual_mode_enabled(vha) ||
5922 			    qla_ini_mode_enabled(vha)) &&
5923 			    atomic_read(&fcport->state) == FCS_ONLINE) {
5924 				qla2x00_mark_device_lost(vha, fcport,
5925 					ql2xplogiabsentdevice, 0);
5926 				if (fcport->loop_id != FC_NO_LOOP_ID &&
5927 				    (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5928 				    fcport->port_type != FCT_INITIATOR &&
5929 				    fcport->port_type != FCT_BROADCAST) {
5930 					ql_dbg(ql_dbg_disc, vha, 0x20f0,
5931 					    "%s %d %8phC post del sess\n",
5932 					    __func__, __LINE__,
5933 					    fcport->port_name);
5934 					qlt_schedule_sess_for_deletion(fcport);
5935 					continue;
5936 				}
5937 			}
5938 		}
5939 
5940 		if (fcport->scan_state == QLA_FCPORT_FOUND)
5941 			qla24xx_fcport_handle_login(vha, fcport);
5942 	}
5943 	return (rval);
5944 }
5945 
5946 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
5947 int
5948 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
5949 {
5950 	int loop_id = FC_NO_LOOP_ID;
5951 	int lid = NPH_MGMT_SERVER - vha->vp_idx;
5952 	unsigned long flags;
5953 	struct qla_hw_data *ha = vha->hw;
5954 
5955 	if (vha->vp_idx == 0) {
5956 		set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
5957 		return NPH_MGMT_SERVER;
5958 	}
5959 
5960 	/* pick id from high and work down to low */
5961 	spin_lock_irqsave(&ha->vport_slock, flags);
5962 	for (; lid > 0; lid--) {
5963 		if (!test_bit(lid, vha->hw->loop_id_map)) {
5964 			set_bit(lid, vha->hw->loop_id_map);
5965 			loop_id = lid;
5966 			break;
5967 		}
5968 	}
5969 	spin_unlock_irqrestore(&ha->vport_slock, flags);
5970 
5971 	return loop_id;
5972 }
5973 
5974 /*
5975  * qla2x00_fabric_login
5976  *	Issue fabric login command.
5977  *
5978  * Input:
5979  *	ha = adapter block pointer.
5980  *	device = pointer to FC device type structure.
5981  *
5982  * Returns:
5983  *      0 - Login successfully
5984  *      1 - Login failed
5985  *      2 - Initiator device
5986  *      3 - Fatal error
5987  */
5988 int
5989 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
5990     uint16_t *next_loopid)
5991 {
5992 	int	rval;
5993 	int	retry;
5994 	uint16_t tmp_loopid;
5995 	uint16_t mb[MAILBOX_REGISTER_COUNT];
5996 	struct qla_hw_data *ha = vha->hw;
5997 
5998 	retry = 0;
5999 	tmp_loopid = 0;
6000 
6001 	for (;;) {
6002 		ql_dbg(ql_dbg_disc, vha, 0x2000,
6003 		    "Trying Fabric Login w/loop id 0x%04x for port "
6004 		    "%02x%02x%02x.\n",
6005 		    fcport->loop_id, fcport->d_id.b.domain,
6006 		    fcport->d_id.b.area, fcport->d_id.b.al_pa);
6007 
6008 		/* Login fcport on switch. */
6009 		rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6010 		    fcport->d_id.b.domain, fcport->d_id.b.area,
6011 		    fcport->d_id.b.al_pa, mb, BIT_0);
6012 		if (rval != QLA_SUCCESS) {
6013 			return rval;
6014 		}
6015 		if (mb[0] == MBS_PORT_ID_USED) {
6016 			/*
6017 			 * Device has another loop ID.  The firmware team
6018 			 * recommends the driver perform an implicit login with
6019 			 * the specified ID again. The ID we just used is save
6020 			 * here so we return with an ID that can be tried by
6021 			 * the next login.
6022 			 */
6023 			retry++;
6024 			tmp_loopid = fcport->loop_id;
6025 			fcport->loop_id = mb[1];
6026 
6027 			ql_dbg(ql_dbg_disc, vha, 0x2001,
6028 			    "Fabric Login: port in use - next loop "
6029 			    "id=0x%04x, port id= %02x%02x%02x.\n",
6030 			    fcport->loop_id, fcport->d_id.b.domain,
6031 			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
6032 
6033 		} else if (mb[0] == MBS_COMMAND_COMPLETE) {
6034 			/*
6035 			 * Login succeeded.
6036 			 */
6037 			if (retry) {
6038 				/* A retry occurred before. */
6039 				*next_loopid = tmp_loopid;
6040 			} else {
6041 				/*
6042 				 * No retry occurred before. Just increment the
6043 				 * ID value for next login.
6044 				 */
6045 				*next_loopid = (fcport->loop_id + 1);
6046 			}
6047 
6048 			if (mb[1] & BIT_0) {
6049 				fcport->port_type = FCT_INITIATOR;
6050 			} else {
6051 				fcport->port_type = FCT_TARGET;
6052 				if (mb[1] & BIT_1) {
6053 					fcport->flags |= FCF_FCP2_DEVICE;
6054 				}
6055 			}
6056 
6057 			if (mb[10] & BIT_0)
6058 				fcport->supported_classes |= FC_COS_CLASS2;
6059 			if (mb[10] & BIT_1)
6060 				fcport->supported_classes |= FC_COS_CLASS3;
6061 
6062 			if (IS_FWI2_CAPABLE(ha)) {
6063 				if (mb[10] & BIT_7)
6064 					fcport->flags |=
6065 					    FCF_CONF_COMP_SUPPORTED;
6066 			}
6067 
6068 			rval = QLA_SUCCESS;
6069 			break;
6070 		} else if (mb[0] == MBS_LOOP_ID_USED) {
6071 			/*
6072 			 * Loop ID already used, try next loop ID.
6073 			 */
6074 			fcport->loop_id++;
6075 			rval = qla2x00_find_new_loop_id(vha, fcport);
6076 			if (rval != QLA_SUCCESS) {
6077 				/* Ran out of loop IDs to use */
6078 				break;
6079 			}
6080 		} else if (mb[0] == MBS_COMMAND_ERROR) {
6081 			/*
6082 			 * Firmware possibly timed out during login. If NO
6083 			 * retries are left to do then the device is declared
6084 			 * dead.
6085 			 */
6086 			*next_loopid = fcport->loop_id;
6087 			ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6088 			    fcport->d_id.b.domain, fcport->d_id.b.area,
6089 			    fcport->d_id.b.al_pa);
6090 			qla2x00_mark_device_lost(vha, fcport, 1, 0);
6091 
6092 			rval = 1;
6093 			break;
6094 		} else {
6095 			/*
6096 			 * unrecoverable / not handled error
6097 			 */
6098 			ql_dbg(ql_dbg_disc, vha, 0x2002,
6099 			    "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6100 			    "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6101 			    fcport->d_id.b.area, fcport->d_id.b.al_pa,
6102 			    fcport->loop_id, jiffies);
6103 
6104 			*next_loopid = fcport->loop_id;
6105 			ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6106 			    fcport->d_id.b.domain, fcport->d_id.b.area,
6107 			    fcport->d_id.b.al_pa);
6108 			qla2x00_clear_loop_id(fcport);
6109 			fcport->login_retry = 0;
6110 
6111 			rval = 3;
6112 			break;
6113 		}
6114 	}
6115 
6116 	return (rval);
6117 }
6118 
6119 /*
6120  * qla2x00_local_device_login
6121  *	Issue local device login command.
6122  *
6123  * Input:
6124  *	ha = adapter block pointer.
6125  *	loop_id = loop id of device to login to.
6126  *
6127  * Returns (Where's the #define!!!!):
6128  *      0 - Login successfully
6129  *      1 - Login failed
6130  *      3 - Fatal error
6131  */
6132 int
6133 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6134 {
6135 	int		rval;
6136 	uint16_t	mb[MAILBOX_REGISTER_COUNT];
6137 
6138 	memset(mb, 0, sizeof(mb));
6139 	rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6140 	if (rval == QLA_SUCCESS) {
6141 		/* Interrogate mailbox registers for any errors */
6142 		if (mb[0] == MBS_COMMAND_ERROR)
6143 			rval = 1;
6144 		else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6145 			/* device not in PCB table */
6146 			rval = 3;
6147 	}
6148 
6149 	return (rval);
6150 }
6151 
6152 /*
6153  *  qla2x00_loop_resync
6154  *      Resync with fibre channel devices.
6155  *
6156  * Input:
6157  *      ha = adapter block pointer.
6158  *
6159  * Returns:
6160  *      0 = success
6161  */
6162 int
6163 qla2x00_loop_resync(scsi_qla_host_t *vha)
6164 {
6165 	int rval = QLA_SUCCESS;
6166 	uint32_t wait_time;
6167 
6168 	clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6169 	if (vha->flags.online) {
6170 		if (!(rval = qla2x00_fw_ready(vha))) {
6171 			/* Wait at most MAX_TARGET RSCNs for a stable link. */
6172 			wait_time = 256;
6173 			do {
6174 				if (!IS_QLAFX00(vha->hw)) {
6175 					/*
6176 					 * Issue a marker after FW becomes
6177 					 * ready.
6178 					 */
6179 					qla2x00_marker(vha, vha->hw->base_qpair,
6180 					    0, 0, MK_SYNC_ALL);
6181 					vha->marker_needed = 0;
6182 				}
6183 
6184 				/* Remap devices on Loop. */
6185 				clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6186 
6187 				if (IS_QLAFX00(vha->hw))
6188 					qlafx00_configure_devices(vha);
6189 				else
6190 					qla2x00_configure_loop(vha);
6191 
6192 				wait_time--;
6193 			} while (!atomic_read(&vha->loop_down_timer) &&
6194 				!(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6195 				&& wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6196 				&vha->dpc_flags)));
6197 		}
6198 	}
6199 
6200 	if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6201 		return (QLA_FUNCTION_FAILED);
6202 
6203 	if (rval)
6204 		ql_dbg(ql_dbg_disc, vha, 0x206c,
6205 		    "%s *** FAILED ***.\n", __func__);
6206 
6207 	return (rval);
6208 }
6209 
6210 /*
6211 * qla2x00_perform_loop_resync
6212 * Description: This function will set the appropriate flags and call
6213 *              qla2x00_loop_resync. If successful loop will be resynced
6214 * Arguments : scsi_qla_host_t pointer
6215 * returm    : Success or Failure
6216 */
6217 
6218 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6219 {
6220 	int32_t rval = 0;
6221 
6222 	if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6223 		/*Configure the flags so that resync happens properly*/
6224 		atomic_set(&ha->loop_down_timer, 0);
6225 		if (!(ha->device_flags & DFLG_NO_CABLE)) {
6226 			atomic_set(&ha->loop_state, LOOP_UP);
6227 			set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6228 			set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6229 			set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6230 
6231 			rval = qla2x00_loop_resync(ha);
6232 		} else
6233 			atomic_set(&ha->loop_state, LOOP_DEAD);
6234 
6235 		clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6236 	}
6237 
6238 	return rval;
6239 }
6240 
6241 void
6242 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6243 {
6244 	fc_port_t *fcport;
6245 	struct scsi_qla_host *vha;
6246 	struct qla_hw_data *ha = base_vha->hw;
6247 	unsigned long flags;
6248 
6249 	spin_lock_irqsave(&ha->vport_slock, flags);
6250 	/* Go with deferred removal of rport references. */
6251 	list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6252 		atomic_inc(&vha->vref_count);
6253 		list_for_each_entry(fcport, &vha->vp_fcports, list) {
6254 			if (fcport->drport &&
6255 			    atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6256 				spin_unlock_irqrestore(&ha->vport_slock, flags);
6257 				qla2x00_rport_del(fcport);
6258 
6259 				spin_lock_irqsave(&ha->vport_slock, flags);
6260 			}
6261 		}
6262 		atomic_dec(&vha->vref_count);
6263 		wake_up(&vha->vref_waitq);
6264 	}
6265 	spin_unlock_irqrestore(&ha->vport_slock, flags);
6266 }
6267 
6268 /* Assumes idc_lock always held on entry */
6269 void
6270 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6271 {
6272 	struct qla_hw_data *ha = vha->hw;
6273 	uint32_t drv_presence, drv_presence_mask;
6274 	uint32_t dev_part_info1, dev_part_info2, class_type;
6275 	uint32_t class_type_mask = 0x3;
6276 	uint16_t fcoe_other_function = 0xffff, i;
6277 
6278 	if (IS_QLA8044(ha)) {
6279 		drv_presence = qla8044_rd_direct(vha,
6280 		    QLA8044_CRB_DRV_ACTIVE_INDEX);
6281 		dev_part_info1 = qla8044_rd_direct(vha,
6282 		    QLA8044_CRB_DEV_PART_INFO_INDEX);
6283 		dev_part_info2 = qla8044_rd_direct(vha,
6284 		    QLA8044_CRB_DEV_PART_INFO2);
6285 	} else {
6286 		qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6287 		qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6288 		qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6289 	}
6290 	for (i = 0; i < 8; i++) {
6291 		class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6292 		if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6293 		    (i != ha->portnum)) {
6294 			fcoe_other_function = i;
6295 			break;
6296 		}
6297 	}
6298 	if (fcoe_other_function == 0xffff) {
6299 		for (i = 0; i < 8; i++) {
6300 			class_type = ((dev_part_info2 >> (i * 4)) &
6301 			    class_type_mask);
6302 			if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6303 			    ((i + 8) != ha->portnum)) {
6304 				fcoe_other_function = i + 8;
6305 				break;
6306 			}
6307 		}
6308 	}
6309 	/*
6310 	 * Prepare drv-presence mask based on fcoe functions present.
6311 	 * However consider only valid physical fcoe function numbers (0-15).
6312 	 */
6313 	drv_presence_mask = ~((1 << (ha->portnum)) |
6314 			((fcoe_other_function == 0xffff) ?
6315 			 0 : (1 << (fcoe_other_function))));
6316 
6317 	/* We are the reset owner iff:
6318 	 *    - No other protocol drivers present.
6319 	 *    - This is the lowest among fcoe functions. */
6320 	if (!(drv_presence & drv_presence_mask) &&
6321 			(ha->portnum < fcoe_other_function)) {
6322 		ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6323 		    "This host is Reset owner.\n");
6324 		ha->flags.nic_core_reset_owner = 1;
6325 	}
6326 }
6327 
6328 static int
6329 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6330 {
6331 	int rval = QLA_SUCCESS;
6332 	struct qla_hw_data *ha = vha->hw;
6333 	uint32_t drv_ack;
6334 
6335 	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6336 	if (rval == QLA_SUCCESS) {
6337 		drv_ack |= (1 << ha->portnum);
6338 		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6339 	}
6340 
6341 	return rval;
6342 }
6343 
6344 static int
6345 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6346 {
6347 	int rval = QLA_SUCCESS;
6348 	struct qla_hw_data *ha = vha->hw;
6349 	uint32_t drv_ack;
6350 
6351 	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6352 	if (rval == QLA_SUCCESS) {
6353 		drv_ack &= ~(1 << ha->portnum);
6354 		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6355 	}
6356 
6357 	return rval;
6358 }
6359 
6360 static const char *
6361 qla83xx_dev_state_to_string(uint32_t dev_state)
6362 {
6363 	switch (dev_state) {
6364 	case QLA8XXX_DEV_COLD:
6365 		return "COLD/RE-INIT";
6366 	case QLA8XXX_DEV_INITIALIZING:
6367 		return "INITIALIZING";
6368 	case QLA8XXX_DEV_READY:
6369 		return "READY";
6370 	case QLA8XXX_DEV_NEED_RESET:
6371 		return "NEED RESET";
6372 	case QLA8XXX_DEV_NEED_QUIESCENT:
6373 		return "NEED QUIESCENT";
6374 	case QLA8XXX_DEV_FAILED:
6375 		return "FAILED";
6376 	case QLA8XXX_DEV_QUIESCENT:
6377 		return "QUIESCENT";
6378 	default:
6379 		return "Unknown";
6380 	}
6381 }
6382 
6383 /* Assumes idc-lock always held on entry */
6384 void
6385 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6386 {
6387 	struct qla_hw_data *ha = vha->hw;
6388 	uint32_t idc_audit_reg = 0, duration_secs = 0;
6389 
6390 	switch (audit_type) {
6391 	case IDC_AUDIT_TIMESTAMP:
6392 		ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6393 		idc_audit_reg = (ha->portnum) |
6394 		    (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6395 		qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6396 		break;
6397 
6398 	case IDC_AUDIT_COMPLETION:
6399 		duration_secs = ((jiffies_to_msecs(jiffies) -
6400 		    jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6401 		idc_audit_reg = (ha->portnum) |
6402 		    (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6403 		qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6404 		break;
6405 
6406 	default:
6407 		ql_log(ql_log_warn, vha, 0xb078,
6408 		    "Invalid audit type specified.\n");
6409 		break;
6410 	}
6411 }
6412 
6413 /* Assumes idc_lock always held on entry */
6414 static int
6415 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6416 {
6417 	struct qla_hw_data *ha = vha->hw;
6418 	uint32_t  idc_control, dev_state;
6419 
6420 	__qla83xx_get_idc_control(vha, &idc_control);
6421 	if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6422 		ql_log(ql_log_info, vha, 0xb080,
6423 		    "NIC Core reset has been disabled. idc-control=0x%x\n",
6424 		    idc_control);
6425 		return QLA_FUNCTION_FAILED;
6426 	}
6427 
6428 	/* Set NEED-RESET iff in READY state and we are the reset-owner */
6429 	qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6430 	if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6431 		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6432 		    QLA8XXX_DEV_NEED_RESET);
6433 		ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6434 		qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6435 	} else {
6436 		const char *state = qla83xx_dev_state_to_string(dev_state);
6437 
6438 		ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6439 
6440 		/* SV: XXX: Is timeout required here? */
6441 		/* Wait for IDC state change READY -> NEED_RESET */
6442 		while (dev_state == QLA8XXX_DEV_READY) {
6443 			qla83xx_idc_unlock(vha, 0);
6444 			msleep(200);
6445 			qla83xx_idc_lock(vha, 0);
6446 			qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6447 		}
6448 	}
6449 
6450 	/* Send IDC ack by writing to drv-ack register */
6451 	__qla83xx_set_drv_ack(vha);
6452 
6453 	return QLA_SUCCESS;
6454 }
6455 
6456 int
6457 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6458 {
6459 	return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6460 }
6461 
6462 int
6463 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6464 {
6465 	return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6466 }
6467 
6468 static int
6469 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6470 {
6471 	uint32_t drv_presence = 0;
6472 	struct qla_hw_data *ha = vha->hw;
6473 
6474 	qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6475 	if (drv_presence & (1 << ha->portnum))
6476 		return QLA_SUCCESS;
6477 	else
6478 		return QLA_TEST_FAILED;
6479 }
6480 
6481 int
6482 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6483 {
6484 	int rval = QLA_SUCCESS;
6485 	struct qla_hw_data *ha = vha->hw;
6486 
6487 	ql_dbg(ql_dbg_p3p, vha, 0xb058,
6488 	    "Entered  %s().\n", __func__);
6489 
6490 	if (vha->device_flags & DFLG_DEV_FAILED) {
6491 		ql_log(ql_log_warn, vha, 0xb059,
6492 		    "Device in unrecoverable FAILED state.\n");
6493 		return QLA_FUNCTION_FAILED;
6494 	}
6495 
6496 	qla83xx_idc_lock(vha, 0);
6497 
6498 	if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6499 		ql_log(ql_log_warn, vha, 0xb05a,
6500 		    "Function=0x%x has been removed from IDC participation.\n",
6501 		    ha->portnum);
6502 		rval = QLA_FUNCTION_FAILED;
6503 		goto exit;
6504 	}
6505 
6506 	qla83xx_reset_ownership(vha);
6507 
6508 	rval = qla83xx_initiating_reset(vha);
6509 
6510 	/*
6511 	 * Perform reset if we are the reset-owner,
6512 	 * else wait till IDC state changes to READY/FAILED.
6513 	 */
6514 	if (rval == QLA_SUCCESS) {
6515 		rval = qla83xx_idc_state_handler(vha);
6516 
6517 		if (rval == QLA_SUCCESS)
6518 			ha->flags.nic_core_hung = 0;
6519 		__qla83xx_clear_drv_ack(vha);
6520 	}
6521 
6522 exit:
6523 	qla83xx_idc_unlock(vha, 0);
6524 
6525 	ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6526 
6527 	return rval;
6528 }
6529 
6530 int
6531 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6532 {
6533 	struct qla_hw_data *ha = vha->hw;
6534 	int rval = QLA_FUNCTION_FAILED;
6535 
6536 	if (!IS_MCTP_CAPABLE(ha)) {
6537 		/* This message can be removed from the final version */
6538 		ql_log(ql_log_info, vha, 0x506d,
6539 		    "This board is not MCTP capable\n");
6540 		return rval;
6541 	}
6542 
6543 	if (!ha->mctp_dump) {
6544 		ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6545 		    MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6546 
6547 		if (!ha->mctp_dump) {
6548 			ql_log(ql_log_warn, vha, 0x506e,
6549 			    "Failed to allocate memory for mctp dump\n");
6550 			return rval;
6551 		}
6552 	}
6553 
6554 #define MCTP_DUMP_STR_ADDR	0x00000000
6555 	rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6556 	    MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6557 	if (rval != QLA_SUCCESS) {
6558 		ql_log(ql_log_warn, vha, 0x506f,
6559 		    "Failed to capture mctp dump\n");
6560 	} else {
6561 		ql_log(ql_log_info, vha, 0x5070,
6562 		    "Mctp dump capture for host (%ld/%p).\n",
6563 		    vha->host_no, ha->mctp_dump);
6564 		ha->mctp_dumped = 1;
6565 	}
6566 
6567 	if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6568 		ha->flags.nic_core_reset_hdlr_active = 1;
6569 		rval = qla83xx_restart_nic_firmware(vha);
6570 		if (rval)
6571 			/* NIC Core reset failed. */
6572 			ql_log(ql_log_warn, vha, 0x5071,
6573 			    "Failed to restart nic firmware\n");
6574 		else
6575 			ql_dbg(ql_dbg_p3p, vha, 0xb084,
6576 			    "Restarted NIC firmware successfully.\n");
6577 		ha->flags.nic_core_reset_hdlr_active = 0;
6578 	}
6579 
6580 	return rval;
6581 
6582 }
6583 
6584 /*
6585 * qla2x00_quiesce_io
6586 * Description: This function will block the new I/Os
6587 *              Its not aborting any I/Os as context
6588 *              is not destroyed during quiescence
6589 * Arguments: scsi_qla_host_t
6590 * return   : void
6591 */
6592 void
6593 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6594 {
6595 	struct qla_hw_data *ha = vha->hw;
6596 	struct scsi_qla_host *vp;
6597 
6598 	ql_dbg(ql_dbg_dpc, vha, 0x401d,
6599 	    "Quiescing I/O - ha=%p.\n", ha);
6600 
6601 	atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6602 	if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6603 		atomic_set(&vha->loop_state, LOOP_DOWN);
6604 		qla2x00_mark_all_devices_lost(vha, 0);
6605 		list_for_each_entry(vp, &ha->vp_list, list)
6606 			qla2x00_mark_all_devices_lost(vp, 0);
6607 	} else {
6608 		if (!atomic_read(&vha->loop_down_timer))
6609 			atomic_set(&vha->loop_down_timer,
6610 					LOOP_DOWN_TIME);
6611 	}
6612 	/* Wait for pending cmds to complete */
6613 	qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
6614 }
6615 
6616 void
6617 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6618 {
6619 	struct qla_hw_data *ha = vha->hw;
6620 	struct scsi_qla_host *vp;
6621 	unsigned long flags;
6622 	fc_port_t *fcport;
6623 	u16 i;
6624 
6625 	/* For ISP82XX, driver waits for completion of the commands.
6626 	 * online flag should be set.
6627 	 */
6628 	if (!(IS_P3P_TYPE(ha)))
6629 		vha->flags.online = 0;
6630 	ha->flags.chip_reset_done = 0;
6631 	clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6632 	vha->qla_stats.total_isp_aborts++;
6633 
6634 	ql_log(ql_log_info, vha, 0x00af,
6635 	    "Performing ISP error recovery - ha=%p.\n", ha);
6636 
6637 	ha->flags.purge_mbox = 1;
6638 	/* For ISP82XX, reset_chip is just disabling interrupts.
6639 	 * Driver waits for the completion of the commands.
6640 	 * the interrupts need to be enabled.
6641 	 */
6642 	if (!(IS_P3P_TYPE(ha)))
6643 		ha->isp_ops->reset_chip(vha);
6644 
6645 	ha->link_data_rate = PORT_SPEED_UNKNOWN;
6646 	SAVE_TOPO(ha);
6647 	ha->flags.rida_fmt2 = 0;
6648 	ha->flags.n2n_ae = 0;
6649 	ha->flags.lip_ae = 0;
6650 	ha->current_topology = 0;
6651 	ha->flags.fw_started = 0;
6652 	ha->flags.fw_init_done = 0;
6653 	ha->chip_reset++;
6654 	ha->base_qpair->chip_reset = ha->chip_reset;
6655 	for (i = 0; i < ha->max_qpairs; i++) {
6656 		if (ha->queue_pair_map[i])
6657 			ha->queue_pair_map[i]->chip_reset =
6658 				ha->base_qpair->chip_reset;
6659 	}
6660 
6661 	/* purge MBox commands */
6662 	if (atomic_read(&ha->num_pend_mbx_stage3)) {
6663 		clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6664 		complete(&ha->mbx_intr_comp);
6665 	}
6666 
6667 	i = 0;
6668 	while (atomic_read(&ha->num_pend_mbx_stage3) ||
6669 	    atomic_read(&ha->num_pend_mbx_stage2) ||
6670 	    atomic_read(&ha->num_pend_mbx_stage1)) {
6671 		msleep(20);
6672 		i++;
6673 		if (i > 50)
6674 			break;
6675 	}
6676 	ha->flags.purge_mbox = 0;
6677 
6678 	atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6679 	if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6680 		atomic_set(&vha->loop_state, LOOP_DOWN);
6681 		qla2x00_mark_all_devices_lost(vha, 0);
6682 
6683 		spin_lock_irqsave(&ha->vport_slock, flags);
6684 		list_for_each_entry(vp, &ha->vp_list, list) {
6685 			atomic_inc(&vp->vref_count);
6686 			spin_unlock_irqrestore(&ha->vport_slock, flags);
6687 
6688 			qla2x00_mark_all_devices_lost(vp, 0);
6689 
6690 			spin_lock_irqsave(&ha->vport_slock, flags);
6691 			atomic_dec(&vp->vref_count);
6692 		}
6693 		spin_unlock_irqrestore(&ha->vport_slock, flags);
6694 	} else {
6695 		if (!atomic_read(&vha->loop_down_timer))
6696 			atomic_set(&vha->loop_down_timer,
6697 			    LOOP_DOWN_TIME);
6698 	}
6699 
6700 	/* Clear all async request states across all VPs. */
6701 	list_for_each_entry(fcport, &vha->vp_fcports, list)
6702 		fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6703 	spin_lock_irqsave(&ha->vport_slock, flags);
6704 	list_for_each_entry(vp, &ha->vp_list, list) {
6705 		atomic_inc(&vp->vref_count);
6706 		spin_unlock_irqrestore(&ha->vport_slock, flags);
6707 
6708 		list_for_each_entry(fcport, &vp->vp_fcports, list)
6709 			fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6710 
6711 		spin_lock_irqsave(&ha->vport_slock, flags);
6712 		atomic_dec(&vp->vref_count);
6713 	}
6714 	spin_unlock_irqrestore(&ha->vport_slock, flags);
6715 
6716 	if (!ha->flags.eeh_busy) {
6717 		/* Make sure for ISP 82XX IO DMA is complete */
6718 		if (IS_P3P_TYPE(ha)) {
6719 			qla82xx_chip_reset_cleanup(vha);
6720 			ql_log(ql_log_info, vha, 0x00b4,
6721 			    "Done chip reset cleanup.\n");
6722 
6723 			/* Done waiting for pending commands.
6724 			 * Reset the online flag.
6725 			 */
6726 			vha->flags.online = 0;
6727 		}
6728 
6729 		/* Requeue all commands in outstanding command list. */
6730 		qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6731 	}
6732 	/* memory barrier */
6733 	wmb();
6734 }
6735 
6736 /*
6737 *  qla2x00_abort_isp
6738 *      Resets ISP and aborts all outstanding commands.
6739 *
6740 * Input:
6741 *      ha           = adapter block pointer.
6742 *
6743 * Returns:
6744 *      0 = success
6745 */
6746 int
6747 qla2x00_abort_isp(scsi_qla_host_t *vha)
6748 {
6749 	int rval;
6750 	uint8_t        status = 0;
6751 	struct qla_hw_data *ha = vha->hw;
6752 	struct scsi_qla_host *vp;
6753 	struct req_que *req = ha->req_q_map[0];
6754 	unsigned long flags;
6755 
6756 	if (vha->flags.online) {
6757 		qla2x00_abort_isp_cleanup(vha);
6758 
6759 		if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
6760 			ha->flags.chip_reset_done = 1;
6761 			vha->flags.online = 1;
6762 			status = 0;
6763 			clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6764 			return status;
6765 		}
6766 
6767 		if (IS_QLA8031(ha)) {
6768 			ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6769 			    "Clearing fcoe driver presence.\n");
6770 			if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6771 				ql_dbg(ql_dbg_p3p, vha, 0xb073,
6772 				    "Error while clearing DRV-Presence.\n");
6773 		}
6774 
6775 		if (unlikely(pci_channel_offline(ha->pdev) &&
6776 		    ha->flags.pci_channel_io_perm_failure)) {
6777 			clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6778 			status = 0;
6779 			return status;
6780 		}
6781 
6782 		switch (vha->qlini_mode) {
6783 		case QLA2XXX_INI_MODE_DISABLED:
6784 			if (!qla_tgt_mode_enabled(vha))
6785 				return 0;
6786 			break;
6787 		case QLA2XXX_INI_MODE_DUAL:
6788 			if (!qla_dual_mode_enabled(vha))
6789 				return 0;
6790 			break;
6791 		case QLA2XXX_INI_MODE_ENABLED:
6792 		default:
6793 			break;
6794 		}
6795 
6796 		ha->isp_ops->get_flash_version(vha, req->ring);
6797 
6798 		ha->isp_ops->nvram_config(vha);
6799 
6800 		if (!qla2x00_restart_isp(vha)) {
6801 			clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6802 
6803 			if (!atomic_read(&vha->loop_down_timer)) {
6804 				/*
6805 				 * Issue marker command only when we are going
6806 				 * to start the I/O .
6807 				 */
6808 				vha->marker_needed = 1;
6809 			}
6810 
6811 			vha->flags.online = 1;
6812 
6813 			ha->isp_ops->enable_intrs(ha);
6814 
6815 			ha->isp_abort_cnt = 0;
6816 			clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6817 
6818 			if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6819 				qla2x00_get_fw_version(vha);
6820 			if (ha->fce) {
6821 				ha->flags.fce_enabled = 1;
6822 				memset(ha->fce, 0,
6823 				    fce_calc_size(ha->fce_bufs));
6824 				rval = qla2x00_enable_fce_trace(vha,
6825 				    ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6826 				    &ha->fce_bufs);
6827 				if (rval) {
6828 					ql_log(ql_log_warn, vha, 0x8033,
6829 					    "Unable to reinitialize FCE "
6830 					    "(%d).\n", rval);
6831 					ha->flags.fce_enabled = 0;
6832 				}
6833 			}
6834 
6835 			if (ha->eft) {
6836 				memset(ha->eft, 0, EFT_SIZE);
6837 				rval = qla2x00_enable_eft_trace(vha,
6838 				    ha->eft_dma, EFT_NUM_BUFFERS);
6839 				if (rval) {
6840 					ql_log(ql_log_warn, vha, 0x8034,
6841 					    "Unable to reinitialize EFT "
6842 					    "(%d).\n", rval);
6843 				}
6844 			}
6845 		} else {	/* failed the ISP abort */
6846 			vha->flags.online = 1;
6847 			if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
6848 				if (ha->isp_abort_cnt == 0) {
6849 					ql_log(ql_log_fatal, vha, 0x8035,
6850 					    "ISP error recover failed - "
6851 					    "board disabled.\n");
6852 					/*
6853 					 * The next call disables the board
6854 					 * completely.
6855 					 */
6856 					qla2x00_abort_isp_cleanup(vha);
6857 					vha->flags.online = 0;
6858 					clear_bit(ISP_ABORT_RETRY,
6859 					    &vha->dpc_flags);
6860 					status = 0;
6861 				} else { /* schedule another ISP abort */
6862 					ha->isp_abort_cnt--;
6863 					ql_dbg(ql_dbg_taskm, vha, 0x8020,
6864 					    "ISP abort - retry remaining %d.\n",
6865 					    ha->isp_abort_cnt);
6866 					status = 1;
6867 				}
6868 			} else {
6869 				ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
6870 				ql_dbg(ql_dbg_taskm, vha, 0x8021,
6871 				    "ISP error recovery - retrying (%d) "
6872 				    "more times.\n", ha->isp_abort_cnt);
6873 				set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6874 				status = 1;
6875 			}
6876 		}
6877 
6878 	}
6879 
6880 	if (!status) {
6881 		ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
6882 		qla2x00_configure_hba(vha);
6883 		spin_lock_irqsave(&ha->vport_slock, flags);
6884 		list_for_each_entry(vp, &ha->vp_list, list) {
6885 			if (vp->vp_idx) {
6886 				atomic_inc(&vp->vref_count);
6887 				spin_unlock_irqrestore(&ha->vport_slock, flags);
6888 
6889 				qla2x00_vp_abort_isp(vp);
6890 
6891 				spin_lock_irqsave(&ha->vport_slock, flags);
6892 				atomic_dec(&vp->vref_count);
6893 			}
6894 		}
6895 		spin_unlock_irqrestore(&ha->vport_slock, flags);
6896 
6897 		if (IS_QLA8031(ha)) {
6898 			ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6899 			    "Setting back fcoe driver presence.\n");
6900 			if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6901 				ql_dbg(ql_dbg_p3p, vha, 0xb074,
6902 				    "Error while setting DRV-Presence.\n");
6903 		}
6904 	} else {
6905 		ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6906 		       __func__);
6907 	}
6908 
6909 	return(status);
6910 }
6911 
6912 /*
6913 *  qla2x00_restart_isp
6914 *      restarts the ISP after a reset
6915 *
6916 * Input:
6917 *      ha = adapter block pointer.
6918 *
6919 * Returns:
6920 *      0 = success
6921 */
6922 static int
6923 qla2x00_restart_isp(scsi_qla_host_t *vha)
6924 {
6925 	int status = 0;
6926 	struct qla_hw_data *ha = vha->hw;
6927 
6928 	/* If firmware needs to be loaded */
6929 	if (qla2x00_isp_firmware(vha)) {
6930 		vha->flags.online = 0;
6931 		status = ha->isp_ops->chip_diag(vha);
6932 		if (!status)
6933 			status = qla2x00_setup_chip(vha);
6934 	}
6935 
6936 	if (!status && !(status = qla2x00_init_rings(vha))) {
6937 		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6938 		ha->flags.chip_reset_done = 1;
6939 
6940 		/* Initialize the queues in use */
6941 		qla25xx_init_queues(ha);
6942 
6943 		status = qla2x00_fw_ready(vha);
6944 		if (!status) {
6945 			/* Issue a marker after FW becomes ready. */
6946 			qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
6947 			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6948 		}
6949 
6950 		/* if no cable then assume it's good */
6951 		if ((vha->device_flags & DFLG_NO_CABLE))
6952 			status = 0;
6953 	}
6954 	return (status);
6955 }
6956 
6957 static int
6958 qla25xx_init_queues(struct qla_hw_data *ha)
6959 {
6960 	struct rsp_que *rsp = NULL;
6961 	struct req_que *req = NULL;
6962 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6963 	int ret = -1;
6964 	int i;
6965 
6966 	for (i = 1; i < ha->max_rsp_queues; i++) {
6967 		rsp = ha->rsp_q_map[i];
6968 		if (rsp && test_bit(i, ha->rsp_qid_map)) {
6969 			rsp->options &= ~BIT_0;
6970 			ret = qla25xx_init_rsp_que(base_vha, rsp);
6971 			if (ret != QLA_SUCCESS)
6972 				ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6973 				    "%s Rsp que: %d init failed.\n",
6974 				    __func__, rsp->id);
6975 			else
6976 				ql_dbg(ql_dbg_init, base_vha, 0x0100,
6977 				    "%s Rsp que: %d inited.\n",
6978 				    __func__, rsp->id);
6979 		}
6980 	}
6981 	for (i = 1; i < ha->max_req_queues; i++) {
6982 		req = ha->req_q_map[i];
6983 		if (req && test_bit(i, ha->req_qid_map)) {
6984 			/* Clear outstanding commands array. */
6985 			req->options &= ~BIT_0;
6986 			ret = qla25xx_init_req_que(base_vha, req);
6987 			if (ret != QLA_SUCCESS)
6988 				ql_dbg(ql_dbg_init, base_vha, 0x0101,
6989 				    "%s Req que: %d init failed.\n",
6990 				    __func__, req->id);
6991 			else
6992 				ql_dbg(ql_dbg_init, base_vha, 0x0102,
6993 				    "%s Req que: %d inited.\n",
6994 				    __func__, req->id);
6995 		}
6996 	}
6997 	return ret;
6998 }
6999 
7000 /*
7001 * qla2x00_reset_adapter
7002 *      Reset adapter.
7003 *
7004 * Input:
7005 *      ha = adapter block pointer.
7006 */
7007 int
7008 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7009 {
7010 	unsigned long flags = 0;
7011 	struct qla_hw_data *ha = vha->hw;
7012 	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7013 
7014 	vha->flags.online = 0;
7015 	ha->isp_ops->disable_intrs(ha);
7016 
7017 	spin_lock_irqsave(&ha->hardware_lock, flags);
7018 	WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
7019 	RD_REG_WORD(&reg->hccr);			/* PCI Posting. */
7020 	WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
7021 	RD_REG_WORD(&reg->hccr);			/* PCI Posting. */
7022 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
7023 
7024 	return QLA_SUCCESS;
7025 }
7026 
7027 int
7028 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7029 {
7030 	unsigned long flags = 0;
7031 	struct qla_hw_data *ha = vha->hw;
7032 	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7033 	int rval = QLA_SUCCESS;
7034 
7035 	if (IS_P3P_TYPE(ha))
7036 		return rval;
7037 
7038 	vha->flags.online = 0;
7039 	ha->isp_ops->disable_intrs(ha);
7040 
7041 	spin_lock_irqsave(&ha->hardware_lock, flags);
7042 	WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
7043 	RD_REG_DWORD(&reg->hccr);
7044 	WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
7045 	RD_REG_DWORD(&reg->hccr);
7046 	spin_unlock_irqrestore(&ha->hardware_lock, flags);
7047 
7048 	if (IS_NOPOLLING_TYPE(ha))
7049 		ha->isp_ops->enable_intrs(ha);
7050 
7051 	return rval;
7052 }
7053 
7054 /* On sparc systems, obtain port and node WWN from firmware
7055  * properties.
7056  */
7057 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7058 	struct nvram_24xx *nv)
7059 {
7060 #ifdef CONFIG_SPARC
7061 	struct qla_hw_data *ha = vha->hw;
7062 	struct pci_dev *pdev = ha->pdev;
7063 	struct device_node *dp = pci_device_to_OF_node(pdev);
7064 	const u8 *val;
7065 	int len;
7066 
7067 	val = of_get_property(dp, "port-wwn", &len);
7068 	if (val && len >= WWN_SIZE)
7069 		memcpy(nv->port_name, val, WWN_SIZE);
7070 
7071 	val = of_get_property(dp, "node-wwn", &len);
7072 	if (val && len >= WWN_SIZE)
7073 		memcpy(nv->node_name, val, WWN_SIZE);
7074 #endif
7075 }
7076 
7077 int
7078 qla24xx_nvram_config(scsi_qla_host_t *vha)
7079 {
7080 	int   rval;
7081 	struct init_cb_24xx *icb;
7082 	struct nvram_24xx *nv;
7083 	uint32_t *dptr;
7084 	uint8_t  *dptr1, *dptr2;
7085 	uint32_t chksum;
7086 	uint16_t cnt;
7087 	struct qla_hw_data *ha = vha->hw;
7088 
7089 	rval = QLA_SUCCESS;
7090 	icb = (struct init_cb_24xx *)ha->init_cb;
7091 	nv = ha->nvram;
7092 
7093 	/* Determine NVRAM starting address. */
7094 	if (ha->port_no == 0) {
7095 		ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7096 		ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7097 	} else {
7098 		ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7099 		ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7100 	}
7101 
7102 	ha->nvram_size = sizeof(*nv);
7103 	ha->vpd_size = FA_NVRAM_VPD_SIZE;
7104 
7105 	/* Get VPD data into cache */
7106 	ha->vpd = ha->nvram + VPD_OFFSET;
7107 	ha->isp_ops->read_nvram(vha, ha->vpd,
7108 	    ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7109 
7110 	/* Get NVRAM data into cache and calculate checksum. */
7111 	dptr = (uint32_t *)nv;
7112 	ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7113 	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7114 		chksum += le32_to_cpu(*dptr);
7115 
7116 	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7117 	    "Contents of NVRAM\n");
7118 	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7119 	    nv, ha->nvram_size);
7120 
7121 	/* Bad NVRAM data, set defaults parameters. */
7122 	if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7123 	    le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7124 		/* Reset NVRAM data. */
7125 		ql_log(ql_log_warn, vha, 0x006b,
7126 		    "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7127 		    chksum, nv->id, nv->nvram_version);
7128 		ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7129 		ql_log(ql_log_warn, vha, 0x006c,
7130 		    "Falling back to functioning (yet invalid -- WWPN) "
7131 		    "defaults.\n");
7132 
7133 		/*
7134 		 * Set default initialization control block.
7135 		 */
7136 		memset(nv, 0, ha->nvram_size);
7137 		nv->nvram_version = cpu_to_le16(ICB_VERSION);
7138 		nv->version = cpu_to_le16(ICB_VERSION);
7139 		nv->frame_payload_size = 2048;
7140 		nv->execution_throttle = cpu_to_le16(0xFFFF);
7141 		nv->exchange_count = cpu_to_le16(0);
7142 		nv->hard_address = cpu_to_le16(124);
7143 		nv->port_name[0] = 0x21;
7144 		nv->port_name[1] = 0x00 + ha->port_no + 1;
7145 		nv->port_name[2] = 0x00;
7146 		nv->port_name[3] = 0xe0;
7147 		nv->port_name[4] = 0x8b;
7148 		nv->port_name[5] = 0x1c;
7149 		nv->port_name[6] = 0x55;
7150 		nv->port_name[7] = 0x86;
7151 		nv->node_name[0] = 0x20;
7152 		nv->node_name[1] = 0x00;
7153 		nv->node_name[2] = 0x00;
7154 		nv->node_name[3] = 0xe0;
7155 		nv->node_name[4] = 0x8b;
7156 		nv->node_name[5] = 0x1c;
7157 		nv->node_name[6] = 0x55;
7158 		nv->node_name[7] = 0x86;
7159 		qla24xx_nvram_wwn_from_ofw(vha, nv);
7160 		nv->login_retry_count = cpu_to_le16(8);
7161 		nv->interrupt_delay_timer = cpu_to_le16(0);
7162 		nv->login_timeout = cpu_to_le16(0);
7163 		nv->firmware_options_1 =
7164 		    cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7165 		nv->firmware_options_2 = cpu_to_le32(2 << 4);
7166 		nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7167 		nv->firmware_options_3 = cpu_to_le32(2 << 13);
7168 		nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7169 		nv->efi_parameters = cpu_to_le32(0);
7170 		nv->reset_delay = 5;
7171 		nv->max_luns_per_target = cpu_to_le16(128);
7172 		nv->port_down_retry_count = cpu_to_le16(30);
7173 		nv->link_down_timeout = cpu_to_le16(30);
7174 
7175 		rval = 1;
7176 	}
7177 
7178 	if (qla_tgt_mode_enabled(vha)) {
7179 		/* Don't enable full login after initial LIP */
7180 		nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7181 		/* Don't enable LIP full login for initiator */
7182 		nv->host_p &= cpu_to_le32(~BIT_10);
7183 	}
7184 
7185 	qlt_24xx_config_nvram_stage1(vha, nv);
7186 
7187 	/* Reset Initialization control block */
7188 	memset(icb, 0, ha->init_cb_size);
7189 
7190 	/* Copy 1st segment. */
7191 	dptr1 = (uint8_t *)icb;
7192 	dptr2 = (uint8_t *)&nv->version;
7193 	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7194 	while (cnt--)
7195 		*dptr1++ = *dptr2++;
7196 
7197 	icb->login_retry_count = nv->login_retry_count;
7198 	icb->link_down_on_nos = nv->link_down_on_nos;
7199 
7200 	/* Copy 2nd segment. */
7201 	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7202 	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7203 	cnt = (uint8_t *)&icb->reserved_3 -
7204 	    (uint8_t *)&icb->interrupt_delay_timer;
7205 	while (cnt--)
7206 		*dptr1++ = *dptr2++;
7207 	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7208 	/*
7209 	 * Setup driver NVRAM options.
7210 	 */
7211 	qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7212 	    "QLA2462");
7213 
7214 	qlt_24xx_config_nvram_stage2(vha, icb);
7215 
7216 	if (nv->host_p & cpu_to_le32(BIT_15)) {
7217 		/* Use alternate WWN? */
7218 		memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7219 		memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7220 	}
7221 
7222 	/* Prepare nodename */
7223 	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7224 		/*
7225 		 * Firmware will apply the following mask if the nodename was
7226 		 * not provided.
7227 		 */
7228 		memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7229 		icb->node_name[0] &= 0xF0;
7230 	}
7231 
7232 	/* Set host adapter parameters. */
7233 	ha->flags.disable_risc_code_load = 0;
7234 	ha->flags.enable_lip_reset = 0;
7235 	ha->flags.enable_lip_full_login =
7236 	    le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7237 	ha->flags.enable_target_reset =
7238 	    le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7239 	ha->flags.enable_led_scheme = 0;
7240 	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7241 
7242 	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7243 	    (BIT_6 | BIT_5 | BIT_4)) >> 4;
7244 
7245 	memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7246 	    sizeof(ha->fw_seriallink_options24));
7247 
7248 	/* save HBA serial number */
7249 	ha->serial0 = icb->port_name[5];
7250 	ha->serial1 = icb->port_name[6];
7251 	ha->serial2 = icb->port_name[7];
7252 	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7253 	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7254 
7255 	icb->execution_throttle = cpu_to_le16(0xFFFF);
7256 
7257 	ha->retry_count = le16_to_cpu(nv->login_retry_count);
7258 
7259 	/* Set minimum login_timeout to 4 seconds. */
7260 	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7261 		nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7262 	if (le16_to_cpu(nv->login_timeout) < 4)
7263 		nv->login_timeout = cpu_to_le16(4);
7264 	ha->login_timeout = le16_to_cpu(nv->login_timeout);
7265 
7266 	/* Set minimum RATOV to 100 tenths of a second. */
7267 	ha->r_a_tov = 100;
7268 
7269 	ha->loop_reset_delay = nv->reset_delay;
7270 
7271 	/* Link Down Timeout = 0:
7272 	 *
7273 	 * 	When Port Down timer expires we will start returning
7274 	 *	I/O's to OS with "DID_NO_CONNECT".
7275 	 *
7276 	 * Link Down Timeout != 0:
7277 	 *
7278 	 *	 The driver waits for the link to come up after link down
7279 	 *	 before returning I/Os to OS with "DID_NO_CONNECT".
7280 	 */
7281 	if (le16_to_cpu(nv->link_down_timeout) == 0) {
7282 		ha->loop_down_abort_time =
7283 		    (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7284 	} else {
7285 		ha->link_down_timeout =	le16_to_cpu(nv->link_down_timeout);
7286 		ha->loop_down_abort_time =
7287 		    (LOOP_DOWN_TIME - ha->link_down_timeout);
7288 	}
7289 
7290 	/* Need enough time to try and get the port back. */
7291 	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7292 	if (qlport_down_retry)
7293 		ha->port_down_retry_count = qlport_down_retry;
7294 
7295 	/* Set login_retry_count */
7296 	ha->login_retry_count  = le16_to_cpu(nv->login_retry_count);
7297 	if (ha->port_down_retry_count ==
7298 	    le16_to_cpu(nv->port_down_retry_count) &&
7299 	    ha->port_down_retry_count > 3)
7300 		ha->login_retry_count = ha->port_down_retry_count;
7301 	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7302 		ha->login_retry_count = ha->port_down_retry_count;
7303 	if (ql2xloginretrycount)
7304 		ha->login_retry_count = ql2xloginretrycount;
7305 
7306 	/* N2N: driver will initiate Login instead of FW */
7307 	icb->firmware_options_3 |= BIT_8;
7308 
7309 	/* Enable ZIO. */
7310 	if (!vha->flags.init_done) {
7311 		ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7312 		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7313 		ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7314 		    le16_to_cpu(icb->interrupt_delay_timer) : 2;
7315 	}
7316 	icb->firmware_options_2 &= cpu_to_le32(
7317 	    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7318 	if (ha->zio_mode != QLA_ZIO_DISABLED) {
7319 		ha->zio_mode = QLA_ZIO_MODE_6;
7320 
7321 		ql_log(ql_log_info, vha, 0x006f,
7322 		    "ZIO mode %d enabled; timer delay (%d us).\n",
7323 		    ha->zio_mode, ha->zio_timer * 100);
7324 
7325 		icb->firmware_options_2 |= cpu_to_le32(
7326 		    (uint32_t)ha->zio_mode);
7327 		icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7328 	}
7329 
7330 	if (rval) {
7331 		ql_log(ql_log_warn, vha, 0x0070,
7332 		    "NVRAM configuration failed.\n");
7333 	}
7334 	return (rval);
7335 }
7336 
7337 static void
7338 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
7339     struct qla27xx_image_status *image_status)
7340 {
7341 	ql_dbg(ql_dbg_init, vha, 0x018b,
7342 	    "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
7343 	    name, "status",
7344 	    image_status->image_status_mask,
7345 	    le16_to_cpu(image_status->generation),
7346 	    image_status->ver_major,
7347 	    image_status->ver_minor,
7348 	    image_status->bitmap,
7349 	    le32_to_cpu(image_status->checksum),
7350 	    le32_to_cpu(image_status->signature));
7351 }
7352 
7353 static bool
7354 qla28xx_check_aux_image_status_signature(
7355     struct qla27xx_image_status *image_status)
7356 {
7357 	ulong signature = le32_to_cpu(image_status->signature);
7358 
7359 	return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
7360 }
7361 
7362 static bool
7363 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
7364 {
7365 	ulong signature = le32_to_cpu(image_status->signature);
7366 
7367 	return
7368 	    signature != QLA27XX_IMG_STATUS_SIGN &&
7369 	    signature != QLA28XX_IMG_STATUS_SIGN;
7370 }
7371 
7372 static ulong
7373 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
7374 {
7375 	uint32_t *p = (void *)image_status;
7376 	uint n = sizeof(*image_status) / sizeof(*p);
7377 	uint32_t sum = 0;
7378 
7379 	for ( ; n--; p++)
7380 		sum += le32_to_cpup(p);
7381 
7382 	return sum;
7383 }
7384 
7385 static inline uint
7386 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
7387 {
7388 	return aux->bitmap & bitmask ?
7389 	    QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
7390 }
7391 
7392 static void
7393 qla28xx_component_status(
7394     struct active_regions *active_regions, struct qla27xx_image_status *aux)
7395 {
7396 	active_regions->aux.board_config =
7397 	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
7398 
7399 	active_regions->aux.vpd_nvram =
7400 	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
7401 
7402 	active_regions->aux.npiv_config_0_1 =
7403 	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
7404 
7405 	active_regions->aux.npiv_config_2_3 =
7406 	    qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
7407 }
7408 
7409 static int
7410 qla27xx_compare_image_generation(
7411     struct qla27xx_image_status *pri_image_status,
7412     struct qla27xx_image_status *sec_image_status)
7413 {
7414 	/* calculate generation delta as uint16 (this accounts for wrap) */
7415 	int16_t delta =
7416 	    le16_to_cpu(pri_image_status->generation) -
7417 	    le16_to_cpu(sec_image_status->generation);
7418 
7419 	ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
7420 
7421 	return delta;
7422 }
7423 
7424 void
7425 qla28xx_get_aux_images(
7426 	struct scsi_qla_host *vha, struct active_regions *active_regions)
7427 {
7428 	struct qla_hw_data *ha = vha->hw;
7429 	struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
7430 	bool valid_pri_image = false, valid_sec_image = false;
7431 	bool active_pri_image = false, active_sec_image = false;
7432 
7433 	if (!ha->flt_region_aux_img_status_pri) {
7434 		ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
7435 		goto check_sec_image;
7436 	}
7437 
7438 	qla24xx_read_flash_data(vha, (void *)&pri_aux_image_status,
7439 	    ha->flt_region_aux_img_status_pri,
7440 	    sizeof(pri_aux_image_status) >> 2);
7441 	qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
7442 
7443 	if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
7444 		ql_dbg(ql_dbg_init, vha, 0x018b,
7445 		    "Primary aux image signature (%#x) not valid\n",
7446 		    le32_to_cpu(pri_aux_image_status.signature));
7447 		goto check_sec_image;
7448 	}
7449 
7450 	if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
7451 		ql_dbg(ql_dbg_init, vha, 0x018c,
7452 		    "Primary aux image checksum failed\n");
7453 		goto check_sec_image;
7454 	}
7455 
7456 	valid_pri_image = true;
7457 
7458 	if (pri_aux_image_status.image_status_mask & 1) {
7459 		ql_dbg(ql_dbg_init, vha, 0x018d,
7460 		    "Primary aux image is active\n");
7461 		active_pri_image = true;
7462 	}
7463 
7464 check_sec_image:
7465 	if (!ha->flt_region_aux_img_status_sec) {
7466 		ql_dbg(ql_dbg_init, vha, 0x018a,
7467 		    "Secondary aux image not addressed\n");
7468 		goto check_valid_image;
7469 	}
7470 
7471 	qla24xx_read_flash_data(vha, (void *)&sec_aux_image_status,
7472 	    ha->flt_region_aux_img_status_sec,
7473 	    sizeof(sec_aux_image_status) >> 2);
7474 	qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
7475 
7476 	if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
7477 		ql_dbg(ql_dbg_init, vha, 0x018b,
7478 		    "Secondary aux image signature (%#x) not valid\n",
7479 		    le32_to_cpu(sec_aux_image_status.signature));
7480 		goto check_valid_image;
7481 	}
7482 
7483 	if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
7484 		ql_dbg(ql_dbg_init, vha, 0x018c,
7485 		    "Secondary aux image checksum failed\n");
7486 		goto check_valid_image;
7487 	}
7488 
7489 	valid_sec_image = true;
7490 
7491 	if (sec_aux_image_status.image_status_mask & 1) {
7492 		ql_dbg(ql_dbg_init, vha, 0x018d,
7493 		    "Secondary aux image is active\n");
7494 		active_sec_image = true;
7495 	}
7496 
7497 check_valid_image:
7498 	if (valid_pri_image && active_pri_image &&
7499 	    valid_sec_image && active_sec_image) {
7500 		if (qla27xx_compare_image_generation(&pri_aux_image_status,
7501 		    &sec_aux_image_status) >= 0) {
7502 			qla28xx_component_status(active_regions,
7503 			    &pri_aux_image_status);
7504 		} else {
7505 			qla28xx_component_status(active_regions,
7506 			    &sec_aux_image_status);
7507 		}
7508 	} else if (valid_pri_image && active_pri_image) {
7509 		qla28xx_component_status(active_regions, &pri_aux_image_status);
7510 	} else if (valid_sec_image && active_sec_image) {
7511 		qla28xx_component_status(active_regions, &sec_aux_image_status);
7512 	}
7513 
7514 	ql_dbg(ql_dbg_init, vha, 0x018f,
7515 	    "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
7516 	    active_regions->aux.board_config,
7517 	    active_regions->aux.vpd_nvram,
7518 	    active_regions->aux.npiv_config_0_1,
7519 	    active_regions->aux.npiv_config_2_3);
7520 }
7521 
7522 void
7523 qla27xx_get_active_image(struct scsi_qla_host *vha,
7524     struct active_regions *active_regions)
7525 {
7526 	struct qla_hw_data *ha = vha->hw;
7527 	struct qla27xx_image_status pri_image_status, sec_image_status;
7528 	bool valid_pri_image = false, valid_sec_image = false;
7529 	bool active_pri_image = false, active_sec_image = false;
7530 
7531 	if (!ha->flt_region_img_status_pri) {
7532 		ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
7533 		goto check_sec_image;
7534 	}
7535 
7536 	qla24xx_read_flash_data(vha, (void *)(&pri_image_status),
7537 	    ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2);
7538 	qla27xx_print_image(vha, "Primary image", &pri_image_status);
7539 
7540 	if (qla27xx_check_image_status_signature(&pri_image_status)) {
7541 		ql_dbg(ql_dbg_init, vha, 0x018b,
7542 		    "Primary image signature (%#x) not valid\n",
7543 		    le32_to_cpu(pri_image_status.signature));
7544 		goto check_sec_image;
7545 	}
7546 
7547 	if (qla27xx_image_status_checksum(&pri_image_status)) {
7548 		ql_dbg(ql_dbg_init, vha, 0x018c,
7549 		    "Primary image checksum failed\n");
7550 		goto check_sec_image;
7551 	}
7552 
7553 	valid_pri_image = true;
7554 
7555 	if (pri_image_status.image_status_mask & 1) {
7556 		ql_dbg(ql_dbg_init, vha, 0x018d,
7557 		    "Primary image is active\n");
7558 		active_pri_image = true;
7559 	}
7560 
7561 check_sec_image:
7562 	if (!ha->flt_region_img_status_sec) {
7563 		ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
7564 		goto check_valid_image;
7565 	}
7566 
7567 	qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7568 	    ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
7569 	qla27xx_print_image(vha, "Secondary image", &sec_image_status);
7570 
7571 	if (qla27xx_check_image_status_signature(&sec_image_status)) {
7572 		ql_dbg(ql_dbg_init, vha, 0x018b,
7573 		    "Secondary image signature (%#x) not valid\n",
7574 		    le32_to_cpu(sec_image_status.signature));
7575 		goto check_valid_image;
7576 	}
7577 
7578 	if (qla27xx_image_status_checksum(&sec_image_status)) {
7579 		ql_dbg(ql_dbg_init, vha, 0x018c,
7580 		    "Secondary image checksum failed\n");
7581 		goto check_valid_image;
7582 	}
7583 
7584 	valid_sec_image = true;
7585 
7586 	if (sec_image_status.image_status_mask & 1) {
7587 		ql_dbg(ql_dbg_init, vha, 0x018d,
7588 		    "Secondary image is active\n");
7589 		active_sec_image = true;
7590 	}
7591 
7592 check_valid_image:
7593 	if (valid_pri_image && active_pri_image)
7594 		active_regions->global = QLA27XX_PRIMARY_IMAGE;
7595 
7596 	if (valid_sec_image && active_sec_image) {
7597 		if (!active_regions->global ||
7598 		    qla27xx_compare_image_generation(
7599 			&pri_image_status, &sec_image_status) < 0) {
7600 			active_regions->global = QLA27XX_SECONDARY_IMAGE;
7601 		}
7602 	}
7603 
7604 	ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
7605 	    active_regions->global == QLA27XX_DEFAULT_IMAGE ?
7606 		"default (boot/fw)" :
7607 	    active_regions->global == QLA27XX_PRIMARY_IMAGE ?
7608 		"primary" :
7609 	    active_regions->global == QLA27XX_SECONDARY_IMAGE ?
7610 		"secondary" : "invalid",
7611 	    active_regions->global);
7612 }
7613 
7614 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
7615 {
7616 	return
7617 	    !(dword[4] | dword[5] | dword[6] | dword[7]) ||
7618 	    !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
7619 }
7620 
7621 static int
7622 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7623     uint32_t faddr)
7624 {
7625 	int rval;
7626 	uint templates, segments, fragment;
7627 	ulong i;
7628 	uint j;
7629 	ulong dlen;
7630 	uint32_t *dcode;
7631 	uint32_t risc_addr, risc_size, risc_attr = 0;
7632 	struct qla_hw_data *ha = vha->hw;
7633 	struct req_que *req = ha->req_q_map[0];
7634 	struct fwdt *fwdt = ha->fwdt;
7635 
7636 	ql_dbg(ql_dbg_init, vha, 0x008b,
7637 	    "FW: Loading firmware from flash (%x).\n", faddr);
7638 
7639 	dcode = (void *)req->ring;
7640 	qla24xx_read_flash_data(vha, dcode, faddr, 8);
7641 	if (qla24xx_risc_firmware_invalid(dcode)) {
7642 		ql_log(ql_log_fatal, vha, 0x008c,
7643 		    "Unable to verify the integrity of flash firmware "
7644 		    "image.\n");
7645 		ql_log(ql_log_fatal, vha, 0x008d,
7646 		    "Firmware data: %08x %08x %08x %08x.\n",
7647 		    dcode[0], dcode[1], dcode[2], dcode[3]);
7648 
7649 		return QLA_FUNCTION_FAILED;
7650 	}
7651 
7652 	dcode = (void *)req->ring;
7653 	*srisc_addr = 0;
7654 	segments = FA_RISC_CODE_SEGMENTS;
7655 	for (j = 0; j < segments; j++) {
7656 		ql_dbg(ql_dbg_init, vha, 0x008d,
7657 		    "-> Loading segment %u...\n", j);
7658 		qla24xx_read_flash_data(vha, dcode, faddr, 10);
7659 		risc_addr = be32_to_cpu(dcode[2]);
7660 		risc_size = be32_to_cpu(dcode[3]);
7661 		if (!*srisc_addr) {
7662 			*srisc_addr = risc_addr;
7663 			risc_attr = be32_to_cpu(dcode[9]);
7664 		}
7665 
7666 		dlen = ha->fw_transfer_size >> 2;
7667 		for (fragment = 0; risc_size; fragment++) {
7668 			if (dlen > risc_size)
7669 				dlen = risc_size;
7670 
7671 			ql_dbg(ql_dbg_init, vha, 0x008e,
7672 			    "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
7673 			    fragment, risc_addr, faddr, dlen);
7674 			qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7675 			for (i = 0; i < dlen; i++)
7676 				dcode[i] = swab32(dcode[i]);
7677 
7678 			rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7679 			if (rval) {
7680 				ql_log(ql_log_fatal, vha, 0x008f,
7681 				    "-> Failed load firmware fragment %u.\n",
7682 				    fragment);
7683 				return QLA_FUNCTION_FAILED;
7684 			}
7685 
7686 			faddr += dlen;
7687 			risc_addr += dlen;
7688 			risc_size -= dlen;
7689 		}
7690 	}
7691 
7692 	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7693 		return QLA_SUCCESS;
7694 
7695 	templates = (risc_attr & BIT_9) ? 2 : 1;
7696 	ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
7697 	for (j = 0; j < templates; j++, fwdt++) {
7698 		if (fwdt->template)
7699 			vfree(fwdt->template);
7700 		fwdt->template = NULL;
7701 		fwdt->length = 0;
7702 
7703 		dcode = (void *)req->ring;
7704 		qla24xx_read_flash_data(vha, dcode, faddr, 7);
7705 		risc_size = be32_to_cpu(dcode[2]);
7706 		ql_dbg(ql_dbg_init, vha, 0x0161,
7707 		    "-> fwdt%u template array at %#x (%#x dwords)\n",
7708 		    j, faddr, risc_size);
7709 		if (!risc_size || !~risc_size) {
7710 			ql_dbg(ql_dbg_init, vha, 0x0162,
7711 			    "-> fwdt%u failed to read array\n", j);
7712 			goto failed;
7713 		}
7714 
7715 		/* skip header and ignore checksum */
7716 		faddr += 7;
7717 		risc_size -= 8;
7718 
7719 		ql_dbg(ql_dbg_init, vha, 0x0163,
7720 		    "-> fwdt%u template allocate template %#x words...\n",
7721 		    j, risc_size);
7722 		fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7723 		if (!fwdt->template) {
7724 			ql_log(ql_log_warn, vha, 0x0164,
7725 			    "-> fwdt%u failed allocate template.\n", j);
7726 			goto failed;
7727 		}
7728 
7729 		dcode = fwdt->template;
7730 		qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7731 
7732 		if (!qla27xx_fwdt_template_valid(dcode)) {
7733 			ql_log(ql_log_warn, vha, 0x0165,
7734 			    "-> fwdt%u failed template validate\n", j);
7735 			goto failed;
7736 		}
7737 
7738 		dlen = qla27xx_fwdt_template_size(dcode);
7739 		ql_dbg(ql_dbg_init, vha, 0x0166,
7740 		    "-> fwdt%u template size %#lx bytes (%#lx words)\n",
7741 		    j, dlen, dlen / sizeof(*dcode));
7742 		if (dlen > risc_size * sizeof(*dcode)) {
7743 			ql_log(ql_log_warn, vha, 0x0167,
7744 			    "-> fwdt%u template exceeds array (%-lu bytes)\n",
7745 			    j, dlen - risc_size * sizeof(*dcode));
7746 			goto failed;
7747 		}
7748 
7749 		fwdt->length = dlen;
7750 		ql_dbg(ql_dbg_init, vha, 0x0168,
7751 		    "-> fwdt%u loaded template ok\n", j);
7752 
7753 		faddr += risc_size + 1;
7754 	}
7755 
7756 	return QLA_SUCCESS;
7757 
7758 failed:
7759 	if (fwdt->template)
7760 		vfree(fwdt->template);
7761 	fwdt->template = NULL;
7762 	fwdt->length = 0;
7763 
7764 	return QLA_SUCCESS;
7765 }
7766 
7767 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7768 
7769 int
7770 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7771 {
7772 	int	rval;
7773 	int	i, fragment;
7774 	uint16_t *wcode, *fwcode;
7775 	uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7776 	struct fw_blob *blob;
7777 	struct qla_hw_data *ha = vha->hw;
7778 	struct req_que *req = ha->req_q_map[0];
7779 
7780 	/* Load firmware blob. */
7781 	blob = qla2x00_request_firmware(vha);
7782 	if (!blob) {
7783 		ql_log(ql_log_info, vha, 0x0083,
7784 		    "Firmware image unavailable.\n");
7785 		ql_log(ql_log_info, vha, 0x0084,
7786 		    "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7787 		return QLA_FUNCTION_FAILED;
7788 	}
7789 
7790 	rval = QLA_SUCCESS;
7791 
7792 	wcode = (uint16_t *)req->ring;
7793 	*srisc_addr = 0;
7794 	fwcode = (uint16_t *)blob->fw->data;
7795 	fwclen = 0;
7796 
7797 	/* Validate firmware image by checking version. */
7798 	if (blob->fw->size < 8 * sizeof(uint16_t)) {
7799 		ql_log(ql_log_fatal, vha, 0x0085,
7800 		    "Unable to verify integrity of firmware image (%zd).\n",
7801 		    blob->fw->size);
7802 		goto fail_fw_integrity;
7803 	}
7804 	for (i = 0; i < 4; i++)
7805 		wcode[i] = be16_to_cpu(fwcode[i + 4]);
7806 	if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7807 	    wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7808 		wcode[2] == 0 && wcode[3] == 0)) {
7809 		ql_log(ql_log_fatal, vha, 0x0086,
7810 		    "Unable to verify integrity of firmware image.\n");
7811 		ql_log(ql_log_fatal, vha, 0x0087,
7812 		    "Firmware data: %04x %04x %04x %04x.\n",
7813 		    wcode[0], wcode[1], wcode[2], wcode[3]);
7814 		goto fail_fw_integrity;
7815 	}
7816 
7817 	seg = blob->segs;
7818 	while (*seg && rval == QLA_SUCCESS) {
7819 		risc_addr = *seg;
7820 		*srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7821 		risc_size = be16_to_cpu(fwcode[3]);
7822 
7823 		/* Validate firmware image size. */
7824 		fwclen += risc_size * sizeof(uint16_t);
7825 		if (blob->fw->size < fwclen) {
7826 			ql_log(ql_log_fatal, vha, 0x0088,
7827 			    "Unable to verify integrity of firmware image "
7828 			    "(%zd).\n", blob->fw->size);
7829 			goto fail_fw_integrity;
7830 		}
7831 
7832 		fragment = 0;
7833 		while (risc_size > 0 && rval == QLA_SUCCESS) {
7834 			wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7835 			if (wlen > risc_size)
7836 				wlen = risc_size;
7837 			ql_dbg(ql_dbg_init, vha, 0x0089,
7838 			    "Loading risc segment@ risc addr %x number of "
7839 			    "words 0x%x.\n", risc_addr, wlen);
7840 
7841 			for (i = 0; i < wlen; i++)
7842 				wcode[i] = swab16(fwcode[i]);
7843 
7844 			rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7845 			    wlen);
7846 			if (rval) {
7847 				ql_log(ql_log_fatal, vha, 0x008a,
7848 				    "Failed to load segment %d of firmware.\n",
7849 				    fragment);
7850 				break;
7851 			}
7852 
7853 			fwcode += wlen;
7854 			risc_addr += wlen;
7855 			risc_size -= wlen;
7856 			fragment++;
7857 		}
7858 
7859 		/* Next segment. */
7860 		seg++;
7861 	}
7862 	return rval;
7863 
7864 fail_fw_integrity:
7865 	return QLA_FUNCTION_FAILED;
7866 }
7867 
7868 static int
7869 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7870 {
7871 	int	rval;
7872 	uint templates, segments, fragment;
7873 	uint32_t *dcode;
7874 	ulong dlen;
7875 	uint32_t risc_addr, risc_size, risc_attr = 0;
7876 	ulong i;
7877 	uint j;
7878 	struct fw_blob *blob;
7879 	uint32_t *fwcode;
7880 	struct qla_hw_data *ha = vha->hw;
7881 	struct req_que *req = ha->req_q_map[0];
7882 	struct fwdt *fwdt = ha->fwdt;
7883 
7884 	ql_dbg(ql_dbg_init, vha, 0x0090,
7885 	    "-> FW: Loading via request-firmware.\n");
7886 
7887 	blob = qla2x00_request_firmware(vha);
7888 	if (!blob) {
7889 		ql_log(ql_log_warn, vha, 0x0092,
7890 		    "-> Firmware file not found.\n");
7891 
7892 		return QLA_FUNCTION_FAILED;
7893 	}
7894 
7895 	fwcode = (void *)blob->fw->data;
7896 	dcode = fwcode;
7897 	if (qla24xx_risc_firmware_invalid(dcode)) {
7898 		ql_log(ql_log_fatal, vha, 0x0093,
7899 		    "Unable to verify integrity of firmware image (%zd).\n",
7900 		    blob->fw->size);
7901 		ql_log(ql_log_fatal, vha, 0x0095,
7902 		    "Firmware data: %08x %08x %08x %08x.\n",
7903 		    dcode[0], dcode[1], dcode[2], dcode[3]);
7904 		return QLA_FUNCTION_FAILED;
7905 	}
7906 
7907 	dcode = (void *)req->ring;
7908 	*srisc_addr = 0;
7909 	segments = FA_RISC_CODE_SEGMENTS;
7910 	for (j = 0; j < segments; j++) {
7911 		ql_dbg(ql_dbg_init, vha, 0x0096,
7912 		    "-> Loading segment %u...\n", j);
7913 		risc_addr = be32_to_cpu(fwcode[2]);
7914 		risc_size = be32_to_cpu(fwcode[3]);
7915 
7916 		if (!*srisc_addr) {
7917 			*srisc_addr = risc_addr;
7918 			risc_attr = be32_to_cpu(fwcode[9]);
7919 		}
7920 
7921 		dlen = ha->fw_transfer_size >> 2;
7922 		for (fragment = 0; risc_size; fragment++) {
7923 			if (dlen > risc_size)
7924 				dlen = risc_size;
7925 
7926 			ql_dbg(ql_dbg_init, vha, 0x0097,
7927 			    "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
7928 			    fragment, risc_addr,
7929 			    (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
7930 			    dlen);
7931 
7932 			for (i = 0; i < dlen; i++)
7933 				dcode[i] = swab32(fwcode[i]);
7934 
7935 			rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7936 			if (rval) {
7937 				ql_log(ql_log_fatal, vha, 0x0098,
7938 				    "-> Failed load firmware fragment %u.\n",
7939 				    fragment);
7940 				return QLA_FUNCTION_FAILED;
7941 			}
7942 
7943 			fwcode += dlen;
7944 			risc_addr += dlen;
7945 			risc_size -= dlen;
7946 		}
7947 	}
7948 
7949 	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7950 		return QLA_SUCCESS;
7951 
7952 	templates = (risc_attr & BIT_9) ? 2 : 1;
7953 	ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
7954 	for (j = 0; j < templates; j++, fwdt++) {
7955 		if (fwdt->template)
7956 			vfree(fwdt->template);
7957 		fwdt->template = NULL;
7958 		fwdt->length = 0;
7959 
7960 		risc_size = be32_to_cpu(fwcode[2]);
7961 		ql_dbg(ql_dbg_init, vha, 0x0171,
7962 		    "-> fwdt%u template array at %#x (%#x dwords)\n",
7963 		    j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
7964 		    risc_size);
7965 		if (!risc_size || !~risc_size) {
7966 			ql_dbg(ql_dbg_init, vha, 0x0172,
7967 			    "-> fwdt%u failed to read array\n", j);
7968 			goto failed;
7969 		}
7970 
7971 		/* skip header and ignore checksum */
7972 		fwcode += 7;
7973 		risc_size -= 8;
7974 
7975 		ql_dbg(ql_dbg_init, vha, 0x0173,
7976 		    "-> fwdt%u template allocate template %#x words...\n",
7977 		    j, risc_size);
7978 		fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7979 		if (!fwdt->template) {
7980 			ql_log(ql_log_warn, vha, 0x0174,
7981 			    "-> fwdt%u failed allocate template.\n", j);
7982 			goto failed;
7983 		}
7984 
7985 		dcode = fwdt->template;
7986 		for (i = 0; i < risc_size; i++)
7987 			dcode[i] = fwcode[i];
7988 
7989 		if (!qla27xx_fwdt_template_valid(dcode)) {
7990 			ql_log(ql_log_warn, vha, 0x0175,
7991 			    "-> fwdt%u failed template validate\n", j);
7992 			goto failed;
7993 		}
7994 
7995 		dlen = qla27xx_fwdt_template_size(dcode);
7996 		ql_dbg(ql_dbg_init, vha, 0x0176,
7997 		    "-> fwdt%u template size %#lx bytes (%#lx words)\n",
7998 		    j, dlen, dlen / sizeof(*dcode));
7999 		if (dlen > risc_size * sizeof(*dcode)) {
8000 			ql_log(ql_log_warn, vha, 0x0177,
8001 			    "-> fwdt%u template exceeds array (%-lu bytes)\n",
8002 			    j, dlen - risc_size * sizeof(*dcode));
8003 			goto failed;
8004 		}
8005 
8006 		fwdt->length = dlen;
8007 		ql_dbg(ql_dbg_init, vha, 0x0178,
8008 		    "-> fwdt%u loaded template ok\n", j);
8009 
8010 		fwcode += risc_size + 1;
8011 	}
8012 
8013 	return QLA_SUCCESS;
8014 
8015 failed:
8016 	if (fwdt->template)
8017 		vfree(fwdt->template);
8018 	fwdt->template = NULL;
8019 	fwdt->length = 0;
8020 
8021 	return QLA_SUCCESS;
8022 }
8023 
8024 int
8025 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8026 {
8027 	int rval;
8028 
8029 	if (ql2xfwloadbin == 1)
8030 		return qla81xx_load_risc(vha, srisc_addr);
8031 
8032 	/*
8033 	 * FW Load priority:
8034 	 * 1) Firmware via request-firmware interface (.bin file).
8035 	 * 2) Firmware residing in flash.
8036 	 */
8037 	rval = qla24xx_load_risc_blob(vha, srisc_addr);
8038 	if (rval == QLA_SUCCESS)
8039 		return rval;
8040 
8041 	return qla24xx_load_risc_flash(vha, srisc_addr,
8042 	    vha->hw->flt_region_fw);
8043 }
8044 
8045 int
8046 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8047 {
8048 	int rval;
8049 	struct qla_hw_data *ha = vha->hw;
8050 	struct active_regions active_regions = { };
8051 
8052 	if (ql2xfwloadbin == 2)
8053 		goto try_blob_fw;
8054 
8055 	/* FW Load priority:
8056 	 * 1) Firmware residing in flash.
8057 	 * 2) Firmware via request-firmware interface (.bin file).
8058 	 * 3) Golden-Firmware residing in flash -- (limited operation).
8059 	 */
8060 
8061 	if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8062 		goto try_primary_fw;
8063 
8064 	qla27xx_get_active_image(vha, &active_regions);
8065 
8066 	if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8067 		goto try_primary_fw;
8068 
8069 	ql_dbg(ql_dbg_init, vha, 0x008b,
8070 	    "Loading secondary firmware image.\n");
8071 	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8072 	if (!rval)
8073 		return rval;
8074 
8075 try_primary_fw:
8076 	ql_dbg(ql_dbg_init, vha, 0x008b,
8077 	    "Loading primary firmware image.\n");
8078 	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8079 	if (!rval)
8080 		return rval;
8081 
8082 try_blob_fw:
8083 	rval = qla24xx_load_risc_blob(vha, srisc_addr);
8084 	if (!rval || !ha->flt_region_gold_fw)
8085 		return rval;
8086 
8087 	ql_log(ql_log_info, vha, 0x0099,
8088 	    "Attempting to fallback to golden firmware.\n");
8089 	rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8090 	if (rval)
8091 		return rval;
8092 
8093 	ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8094 	ha->flags.running_gold_fw = 1;
8095 	return rval;
8096 }
8097 
8098 void
8099 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8100 {
8101 	int ret, retries;
8102 	struct qla_hw_data *ha = vha->hw;
8103 
8104 	if (ha->flags.pci_channel_io_perm_failure)
8105 		return;
8106 	if (!IS_FWI2_CAPABLE(ha))
8107 		return;
8108 	if (!ha->fw_major_version)
8109 		return;
8110 	if (!ha->flags.fw_started)
8111 		return;
8112 
8113 	ret = qla2x00_stop_firmware(vha);
8114 	for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8115 	    ret != QLA_INVALID_COMMAND && retries ; retries--) {
8116 		ha->isp_ops->reset_chip(vha);
8117 		if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8118 			continue;
8119 		if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8120 			continue;
8121 		ql_log(ql_log_info, vha, 0x8015,
8122 		    "Attempting retry of stop-firmware command.\n");
8123 		ret = qla2x00_stop_firmware(vha);
8124 	}
8125 
8126 	QLA_FW_STOPPED(ha);
8127 	ha->flags.fw_init_done = 0;
8128 }
8129 
8130 int
8131 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8132 {
8133 	int rval = QLA_SUCCESS;
8134 	int rval2;
8135 	uint16_t mb[MAILBOX_REGISTER_COUNT];
8136 	struct qla_hw_data *ha = vha->hw;
8137 	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8138 
8139 	if (!vha->vp_idx)
8140 		return -EINVAL;
8141 
8142 	rval = qla2x00_fw_ready(base_vha);
8143 
8144 	if (rval == QLA_SUCCESS) {
8145 		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8146 		qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8147 	}
8148 
8149 	vha->flags.management_server_logged_in = 0;
8150 
8151 	/* Login to SNS first */
8152 	rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8153 	    BIT_1);
8154 	if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8155 		if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8156 			ql_dbg(ql_dbg_init, vha, 0x0120,
8157 			    "Failed SNS login: loop_id=%x, rval2=%d\n",
8158 			    NPH_SNS, rval2);
8159 		else
8160 			ql_dbg(ql_dbg_init, vha, 0x0103,
8161 			    "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8162 			    "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8163 			    NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8164 		return (QLA_FUNCTION_FAILED);
8165 	}
8166 
8167 	atomic_set(&vha->loop_down_timer, 0);
8168 	atomic_set(&vha->loop_state, LOOP_UP);
8169 	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8170 	set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
8171 	rval = qla2x00_loop_resync(base_vha);
8172 
8173 	return rval;
8174 }
8175 
8176 /* 84XX Support **************************************************************/
8177 
8178 static LIST_HEAD(qla_cs84xx_list);
8179 static DEFINE_MUTEX(qla_cs84xx_mutex);
8180 
8181 static struct qla_chip_state_84xx *
8182 qla84xx_get_chip(struct scsi_qla_host *vha)
8183 {
8184 	struct qla_chip_state_84xx *cs84xx;
8185 	struct qla_hw_data *ha = vha->hw;
8186 
8187 	mutex_lock(&qla_cs84xx_mutex);
8188 
8189 	/* Find any shared 84xx chip. */
8190 	list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8191 		if (cs84xx->bus == ha->pdev->bus) {
8192 			kref_get(&cs84xx->kref);
8193 			goto done;
8194 		}
8195 	}
8196 
8197 	cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
8198 	if (!cs84xx)
8199 		goto done;
8200 
8201 	kref_init(&cs84xx->kref);
8202 	spin_lock_init(&cs84xx->access_lock);
8203 	mutex_init(&cs84xx->fw_update_mutex);
8204 	cs84xx->bus = ha->pdev->bus;
8205 
8206 	list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8207 done:
8208 	mutex_unlock(&qla_cs84xx_mutex);
8209 	return cs84xx;
8210 }
8211 
8212 static void
8213 __qla84xx_chip_release(struct kref *kref)
8214 {
8215 	struct qla_chip_state_84xx *cs84xx =
8216 	    container_of(kref, struct qla_chip_state_84xx, kref);
8217 
8218 	mutex_lock(&qla_cs84xx_mutex);
8219 	list_del(&cs84xx->list);
8220 	mutex_unlock(&qla_cs84xx_mutex);
8221 	kfree(cs84xx);
8222 }
8223 
8224 void
8225 qla84xx_put_chip(struct scsi_qla_host *vha)
8226 {
8227 	struct qla_hw_data *ha = vha->hw;
8228 
8229 	if (ha->cs84xx)
8230 		kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8231 }
8232 
8233 static int
8234 qla84xx_init_chip(scsi_qla_host_t *vha)
8235 {
8236 	int rval;
8237 	uint16_t status[2];
8238 	struct qla_hw_data *ha = vha->hw;
8239 
8240 	mutex_lock(&ha->cs84xx->fw_update_mutex);
8241 
8242 	rval = qla84xx_verify_chip(vha, status);
8243 
8244 	mutex_unlock(&ha->cs84xx->fw_update_mutex);
8245 
8246 	return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
8247 	    QLA_SUCCESS;
8248 }
8249 
8250 /* 81XX Support **************************************************************/
8251 
8252 int
8253 qla81xx_nvram_config(scsi_qla_host_t *vha)
8254 {
8255 	int   rval;
8256 	struct init_cb_81xx *icb;
8257 	struct nvram_81xx *nv;
8258 	uint32_t *dptr;
8259 	uint8_t  *dptr1, *dptr2;
8260 	uint32_t chksum;
8261 	uint16_t cnt;
8262 	struct qla_hw_data *ha = vha->hw;
8263 	uint32_t faddr;
8264 	struct active_regions active_regions = { };
8265 
8266 	rval = QLA_SUCCESS;
8267 	icb = (struct init_cb_81xx *)ha->init_cb;
8268 	nv = ha->nvram;
8269 
8270 	/* Determine NVRAM starting address. */
8271 	ha->nvram_size = sizeof(*nv);
8272 	ha->vpd_size = FA_NVRAM_VPD_SIZE;
8273 	if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8274 		ha->vpd_size = FA_VPD_SIZE_82XX;
8275 
8276 	if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
8277 		qla28xx_get_aux_images(vha, &active_regions);
8278 
8279 	/* Get VPD data into cache */
8280 	ha->vpd = ha->nvram + VPD_OFFSET;
8281 
8282 	faddr = ha->flt_region_vpd;
8283 	if (IS_QLA28XX(ha)) {
8284 		if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8285 			faddr = ha->flt_region_vpd_sec;
8286 		ql_dbg(ql_dbg_init, vha, 0x0110,
8287 		    "Loading %s nvram image.\n",
8288 		    active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8289 		    "primary" : "secondary");
8290 	}
8291 	qla24xx_read_flash_data(vha, ha->vpd, faddr, ha->vpd_size >> 2);
8292 
8293 	/* Get NVRAM data into cache and calculate checksum. */
8294 	faddr = ha->flt_region_nvram;
8295 	if (IS_QLA28XX(ha)) {
8296 		if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8297 			faddr = ha->flt_region_nvram_sec;
8298 	}
8299 	ql_dbg(ql_dbg_init, vha, 0x0110,
8300 	    "Loading %s nvram image.\n",
8301 	    active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8302 	    "primary" : "secondary");
8303 	qla24xx_read_flash_data(vha, ha->nvram, faddr, ha->nvram_size >> 2);
8304 
8305 	dptr = (uint32_t *)nv;
8306 	for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8307 		chksum += le32_to_cpu(*dptr);
8308 
8309 	ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8310 	    "Contents of NVRAM:\n");
8311 	ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8312 	    nv, ha->nvram_size);
8313 
8314 	/* Bad NVRAM data, set defaults parameters. */
8315 	if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
8316 	    le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8317 		/* Reset NVRAM data. */
8318 		ql_log(ql_log_info, vha, 0x0073,
8319 		    "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
8320 		    chksum, nv->id, le16_to_cpu(nv->nvram_version));
8321 		ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8322 		ql_log(ql_log_info, vha, 0x0074,
8323 		    "Falling back to functioning (yet invalid -- WWPN) "
8324 		    "defaults.\n");
8325 
8326 		/*
8327 		 * Set default initialization control block.
8328 		 */
8329 		memset(nv, 0, ha->nvram_size);
8330 		nv->nvram_version = cpu_to_le16(ICB_VERSION);
8331 		nv->version = cpu_to_le16(ICB_VERSION);
8332 		nv->frame_payload_size = 2048;
8333 		nv->execution_throttle = cpu_to_le16(0xFFFF);
8334 		nv->exchange_count = cpu_to_le16(0);
8335 		nv->port_name[0] = 0x21;
8336 		nv->port_name[1] = 0x00 + ha->port_no + 1;
8337 		nv->port_name[2] = 0x00;
8338 		nv->port_name[3] = 0xe0;
8339 		nv->port_name[4] = 0x8b;
8340 		nv->port_name[5] = 0x1c;
8341 		nv->port_name[6] = 0x55;
8342 		nv->port_name[7] = 0x86;
8343 		nv->node_name[0] = 0x20;
8344 		nv->node_name[1] = 0x00;
8345 		nv->node_name[2] = 0x00;
8346 		nv->node_name[3] = 0xe0;
8347 		nv->node_name[4] = 0x8b;
8348 		nv->node_name[5] = 0x1c;
8349 		nv->node_name[6] = 0x55;
8350 		nv->node_name[7] = 0x86;
8351 		nv->login_retry_count = cpu_to_le16(8);
8352 		nv->interrupt_delay_timer = cpu_to_le16(0);
8353 		nv->login_timeout = cpu_to_le16(0);
8354 		nv->firmware_options_1 =
8355 		    cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8356 		nv->firmware_options_2 = cpu_to_le32(2 << 4);
8357 		nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8358 		nv->firmware_options_3 = cpu_to_le32(2 << 13);
8359 		nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8360 		nv->efi_parameters = cpu_to_le32(0);
8361 		nv->reset_delay = 5;
8362 		nv->max_luns_per_target = cpu_to_le16(128);
8363 		nv->port_down_retry_count = cpu_to_le16(30);
8364 		nv->link_down_timeout = cpu_to_le16(180);
8365 		nv->enode_mac[0] = 0x00;
8366 		nv->enode_mac[1] = 0xC0;
8367 		nv->enode_mac[2] = 0xDD;
8368 		nv->enode_mac[3] = 0x04;
8369 		nv->enode_mac[4] = 0x05;
8370 		nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8371 
8372 		rval = 1;
8373 	}
8374 
8375 	if (IS_T10_PI_CAPABLE(ha))
8376 		nv->frame_payload_size &= ~7;
8377 
8378 	qlt_81xx_config_nvram_stage1(vha, nv);
8379 
8380 	/* Reset Initialization control block */
8381 	memset(icb, 0, ha->init_cb_size);
8382 
8383 	/* Copy 1st segment. */
8384 	dptr1 = (uint8_t *)icb;
8385 	dptr2 = (uint8_t *)&nv->version;
8386 	cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8387 	while (cnt--)
8388 		*dptr1++ = *dptr2++;
8389 
8390 	icb->login_retry_count = nv->login_retry_count;
8391 
8392 	/* Copy 2nd segment. */
8393 	dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8394 	dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8395 	cnt = (uint8_t *)&icb->reserved_5 -
8396 	    (uint8_t *)&icb->interrupt_delay_timer;
8397 	while (cnt--)
8398 		*dptr1++ = *dptr2++;
8399 
8400 	memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8401 	/* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8402 	if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8403 		icb->enode_mac[0] = 0x00;
8404 		icb->enode_mac[1] = 0xC0;
8405 		icb->enode_mac[2] = 0xDD;
8406 		icb->enode_mac[3] = 0x04;
8407 		icb->enode_mac[4] = 0x05;
8408 		icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8409 	}
8410 
8411 	/* Use extended-initialization control block. */
8412 	memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8413 	ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8414 	/*
8415 	 * Setup driver NVRAM options.
8416 	 */
8417 	qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8418 	    "QLE8XXX");
8419 
8420 	qlt_81xx_config_nvram_stage2(vha, icb);
8421 
8422 	/* Use alternate WWN? */
8423 	if (nv->host_p & cpu_to_le32(BIT_15)) {
8424 		memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8425 		memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8426 	}
8427 
8428 	/* Prepare nodename */
8429 	if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8430 		/*
8431 		 * Firmware will apply the following mask if the nodename was
8432 		 * not provided.
8433 		 */
8434 		memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8435 		icb->node_name[0] &= 0xF0;
8436 	}
8437 
8438 	/* Set host adapter parameters. */
8439 	ha->flags.disable_risc_code_load = 0;
8440 	ha->flags.enable_lip_reset = 0;
8441 	ha->flags.enable_lip_full_login =
8442 	    le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8443 	ha->flags.enable_target_reset =
8444 	    le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8445 	ha->flags.enable_led_scheme = 0;
8446 	ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8447 
8448 	ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8449 	    (BIT_6 | BIT_5 | BIT_4)) >> 4;
8450 
8451 	/* save HBA serial number */
8452 	ha->serial0 = icb->port_name[5];
8453 	ha->serial1 = icb->port_name[6];
8454 	ha->serial2 = icb->port_name[7];
8455 	memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8456 	memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8457 
8458 	icb->execution_throttle = cpu_to_le16(0xFFFF);
8459 
8460 	ha->retry_count = le16_to_cpu(nv->login_retry_count);
8461 
8462 	/* Set minimum login_timeout to 4 seconds. */
8463 	if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8464 		nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8465 	if (le16_to_cpu(nv->login_timeout) < 4)
8466 		nv->login_timeout = cpu_to_le16(4);
8467 	ha->login_timeout = le16_to_cpu(nv->login_timeout);
8468 
8469 	/* Set minimum RATOV to 100 tenths of a second. */
8470 	ha->r_a_tov = 100;
8471 
8472 	ha->loop_reset_delay = nv->reset_delay;
8473 
8474 	/* Link Down Timeout = 0:
8475 	 *
8476 	 *	When Port Down timer expires we will start returning
8477 	 *	I/O's to OS with "DID_NO_CONNECT".
8478 	 *
8479 	 * Link Down Timeout != 0:
8480 	 *
8481 	 *	 The driver waits for the link to come up after link down
8482 	 *	 before returning I/Os to OS with "DID_NO_CONNECT".
8483 	 */
8484 	if (le16_to_cpu(nv->link_down_timeout) == 0) {
8485 		ha->loop_down_abort_time =
8486 		    (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8487 	} else {
8488 		ha->link_down_timeout =	le16_to_cpu(nv->link_down_timeout);
8489 		ha->loop_down_abort_time =
8490 		    (LOOP_DOWN_TIME - ha->link_down_timeout);
8491 	}
8492 
8493 	/* Need enough time to try and get the port back. */
8494 	ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8495 	if (qlport_down_retry)
8496 		ha->port_down_retry_count = qlport_down_retry;
8497 
8498 	/* Set login_retry_count */
8499 	ha->login_retry_count  = le16_to_cpu(nv->login_retry_count);
8500 	if (ha->port_down_retry_count ==
8501 	    le16_to_cpu(nv->port_down_retry_count) &&
8502 	    ha->port_down_retry_count > 3)
8503 		ha->login_retry_count = ha->port_down_retry_count;
8504 	else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8505 		ha->login_retry_count = ha->port_down_retry_count;
8506 	if (ql2xloginretrycount)
8507 		ha->login_retry_count = ql2xloginretrycount;
8508 
8509 	/* if not running MSI-X we need handshaking on interrupts */
8510 	if (!vha->hw->flags.msix_enabled &&
8511 	    (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
8512 		icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8513 
8514 	/* Enable ZIO. */
8515 	if (!vha->flags.init_done) {
8516 		ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8517 		    (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8518 		ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8519 		    le16_to_cpu(icb->interrupt_delay_timer) : 2;
8520 	}
8521 	icb->firmware_options_2 &= cpu_to_le32(
8522 	    ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8523 	vha->flags.process_response_queue = 0;
8524 	if (ha->zio_mode != QLA_ZIO_DISABLED) {
8525 		ha->zio_mode = QLA_ZIO_MODE_6;
8526 
8527 		ql_log(ql_log_info, vha, 0x0075,
8528 		    "ZIO mode %d enabled; timer delay (%d us).\n",
8529 		    ha->zio_mode,
8530 		    ha->zio_timer * 100);
8531 
8532 		icb->firmware_options_2 |= cpu_to_le32(
8533 		    (uint32_t)ha->zio_mode);
8534 		icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8535 		vha->flags.process_response_queue = 1;
8536 	}
8537 
8538 	 /* enable RIDA Format2 */
8539 	icb->firmware_options_3 |= BIT_0;
8540 
8541 	/* N2N: driver will initiate Login instead of FW */
8542 	icb->firmware_options_3 |= BIT_8;
8543 
8544 	if (rval) {
8545 		ql_log(ql_log_warn, vha, 0x0076,
8546 		    "NVRAM configuration failed.\n");
8547 	}
8548 	return (rval);
8549 }
8550 
8551 int
8552 qla82xx_restart_isp(scsi_qla_host_t *vha)
8553 {
8554 	int status, rval;
8555 	struct qla_hw_data *ha = vha->hw;
8556 	struct scsi_qla_host *vp;
8557 	unsigned long flags;
8558 
8559 	status = qla2x00_init_rings(vha);
8560 	if (!status) {
8561 		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8562 		ha->flags.chip_reset_done = 1;
8563 
8564 		status = qla2x00_fw_ready(vha);
8565 		if (!status) {
8566 			/* Issue a marker after FW becomes ready. */
8567 			qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8568 			vha->flags.online = 1;
8569 			set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8570 		}
8571 
8572 		/* if no cable then assume it's good */
8573 		if ((vha->device_flags & DFLG_NO_CABLE))
8574 			status = 0;
8575 	}
8576 
8577 	if (!status) {
8578 		clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8579 
8580 		if (!atomic_read(&vha->loop_down_timer)) {
8581 			/*
8582 			 * Issue marker command only when we are going
8583 			 * to start the I/O .
8584 			 */
8585 			vha->marker_needed = 1;
8586 		}
8587 
8588 		ha->isp_ops->enable_intrs(ha);
8589 
8590 		ha->isp_abort_cnt = 0;
8591 		clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8592 
8593 		/* Update the firmware version */
8594 		status = qla82xx_check_md_needed(vha);
8595 
8596 		if (ha->fce) {
8597 			ha->flags.fce_enabled = 1;
8598 			memset(ha->fce, 0,
8599 			    fce_calc_size(ha->fce_bufs));
8600 			rval = qla2x00_enable_fce_trace(vha,
8601 			    ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8602 			    &ha->fce_bufs);
8603 			if (rval) {
8604 				ql_log(ql_log_warn, vha, 0x8001,
8605 				    "Unable to reinitialize FCE (%d).\n",
8606 				    rval);
8607 				ha->flags.fce_enabled = 0;
8608 			}
8609 		}
8610 
8611 		if (ha->eft) {
8612 			memset(ha->eft, 0, EFT_SIZE);
8613 			rval = qla2x00_enable_eft_trace(vha,
8614 			    ha->eft_dma, EFT_NUM_BUFFERS);
8615 			if (rval) {
8616 				ql_log(ql_log_warn, vha, 0x8010,
8617 				    "Unable to reinitialize EFT (%d).\n",
8618 				    rval);
8619 			}
8620 		}
8621 	}
8622 
8623 	if (!status) {
8624 		ql_dbg(ql_dbg_taskm, vha, 0x8011,
8625 		    "qla82xx_restart_isp succeeded.\n");
8626 
8627 		spin_lock_irqsave(&ha->vport_slock, flags);
8628 		list_for_each_entry(vp, &ha->vp_list, list) {
8629 			if (vp->vp_idx) {
8630 				atomic_inc(&vp->vref_count);
8631 				spin_unlock_irqrestore(&ha->vport_slock, flags);
8632 
8633 				qla2x00_vp_abort_isp(vp);
8634 
8635 				spin_lock_irqsave(&ha->vport_slock, flags);
8636 				atomic_dec(&vp->vref_count);
8637 			}
8638 		}
8639 		spin_unlock_irqrestore(&ha->vport_slock, flags);
8640 
8641 	} else {
8642 		ql_log(ql_log_warn, vha, 0x8016,
8643 		    "qla82xx_restart_isp **** FAILED ****.\n");
8644 	}
8645 
8646 	return status;
8647 }
8648 
8649 void
8650 qla81xx_update_fw_options(scsi_qla_host_t *vha)
8651 {
8652 	struct qla_hw_data *ha = vha->hw;
8653 
8654 	/*  Hold status IOCBs until ABTS response received. */
8655 	if (ql2xfwholdabts)
8656 		ha->fw_options[3] |= BIT_12;
8657 
8658 	/* Set Retry FLOGI in case of P2P connection */
8659 	if (ha->operating_mode == P2P) {
8660 		ha->fw_options[2] |= BIT_3;
8661 		ql_dbg(ql_dbg_disc, vha, 0x2103,
8662 		    "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8663 			__func__, ha->fw_options[2]);
8664 	}
8665 
8666 	/* Move PUREX, ABTS RX & RIDA to ATIOQ */
8667 	if (ql2xmvasynctoatio) {
8668 		if (qla_tgt_mode_enabled(vha) ||
8669 		    qla_dual_mode_enabled(vha))
8670 			ha->fw_options[2] |= BIT_11;
8671 		else
8672 			ha->fw_options[2] &= ~BIT_11;
8673 	}
8674 
8675 	if (qla_tgt_mode_enabled(vha) ||
8676 	    qla_dual_mode_enabled(vha)) {
8677 		/* FW auto send SCSI status during */
8678 		ha->fw_options[1] |= BIT_8;
8679 		ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8680 
8681 		/* FW perform Exchange validation */
8682 		ha->fw_options[2] |= BIT_4;
8683 	} else {
8684 		ha->fw_options[1]  &= ~BIT_8;
8685 		ha->fw_options[10] &= 0x00ff;
8686 
8687 		ha->fw_options[2] &= ~BIT_4;
8688 	}
8689 
8690 	if (ql2xetsenable) {
8691 		/* Enable ETS Burst. */
8692 		memset(ha->fw_options, 0, sizeof(ha->fw_options));
8693 		ha->fw_options[2] |= BIT_9;
8694 	}
8695 
8696 	ql_dbg(ql_dbg_init, vha, 0x00e9,
8697 	    "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8698 	    __func__, ha->fw_options[1], ha->fw_options[2],
8699 	    ha->fw_options[3], vha->host->active_mode);
8700 
8701 	qla2x00_set_fw_options(vha, ha->fw_options);
8702 }
8703 
8704 /*
8705  * qla24xx_get_fcp_prio
8706  *	Gets the fcp cmd priority value for the logged in port.
8707  *	Looks for a match of the port descriptors within
8708  *	each of the fcp prio config entries. If a match is found,
8709  *	the tag (priority) value is returned.
8710  *
8711  * Input:
8712  *	vha = scsi host structure pointer.
8713  *	fcport = port structure pointer.
8714  *
8715  * Return:
8716  *	non-zero (if found)
8717  *	-1 (if not found)
8718  *
8719  * Context:
8720  * 	Kernel context
8721  */
8722 static int
8723 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8724 {
8725 	int i, entries;
8726 	uint8_t pid_match, wwn_match;
8727 	int priority;
8728 	uint32_t pid1, pid2;
8729 	uint64_t wwn1, wwn2;
8730 	struct qla_fcp_prio_entry *pri_entry;
8731 	struct qla_hw_data *ha = vha->hw;
8732 
8733 	if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8734 		return -1;
8735 
8736 	priority = -1;
8737 	entries = ha->fcp_prio_cfg->num_entries;
8738 	pri_entry = &ha->fcp_prio_cfg->entry[0];
8739 
8740 	for (i = 0; i < entries; i++) {
8741 		pid_match = wwn_match = 0;
8742 
8743 		if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8744 			pri_entry++;
8745 			continue;
8746 		}
8747 
8748 		/* check source pid for a match */
8749 		if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8750 			pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8751 			pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8752 			if (pid1 == INVALID_PORT_ID)
8753 				pid_match++;
8754 			else if (pid1 == pid2)
8755 				pid_match++;
8756 		}
8757 
8758 		/* check destination pid for a match */
8759 		if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8760 			pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8761 			pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8762 			if (pid1 == INVALID_PORT_ID)
8763 				pid_match++;
8764 			else if (pid1 == pid2)
8765 				pid_match++;
8766 		}
8767 
8768 		/* check source WWN for a match */
8769 		if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8770 			wwn1 = wwn_to_u64(vha->port_name);
8771 			wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8772 			if (wwn2 == (uint64_t)-1)
8773 				wwn_match++;
8774 			else if (wwn1 == wwn2)
8775 				wwn_match++;
8776 		}
8777 
8778 		/* check destination WWN for a match */
8779 		if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8780 			wwn1 = wwn_to_u64(fcport->port_name);
8781 			wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8782 			if (wwn2 == (uint64_t)-1)
8783 				wwn_match++;
8784 			else if (wwn1 == wwn2)
8785 				wwn_match++;
8786 		}
8787 
8788 		if (pid_match == 2 || wwn_match == 2) {
8789 			/* Found a matching entry */
8790 			if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8791 				priority = pri_entry->tag;
8792 			break;
8793 		}
8794 
8795 		pri_entry++;
8796 	}
8797 
8798 	return priority;
8799 }
8800 
8801 /*
8802  * qla24xx_update_fcport_fcp_prio
8803  *	Activates fcp priority for the logged in fc port
8804  *
8805  * Input:
8806  *	vha = scsi host structure pointer.
8807  *	fcp = port structure pointer.
8808  *
8809  * Return:
8810  *	QLA_SUCCESS or QLA_FUNCTION_FAILED
8811  *
8812  * Context:
8813  *	Kernel context.
8814  */
8815 int
8816 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8817 {
8818 	int ret;
8819 	int priority;
8820 	uint16_t mb[5];
8821 
8822 	if (fcport->port_type != FCT_TARGET ||
8823 	    fcport->loop_id == FC_NO_LOOP_ID)
8824 		return QLA_FUNCTION_FAILED;
8825 
8826 	priority = qla24xx_get_fcp_prio(vha, fcport);
8827 	if (priority < 0)
8828 		return QLA_FUNCTION_FAILED;
8829 
8830 	if (IS_P3P_TYPE(vha->hw)) {
8831 		fcport->fcp_prio = priority & 0xf;
8832 		return QLA_SUCCESS;
8833 	}
8834 
8835 	ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8836 	if (ret == QLA_SUCCESS) {
8837 		if (fcport->fcp_prio != priority)
8838 			ql_dbg(ql_dbg_user, vha, 0x709e,
8839 			    "Updated FCP_CMND priority - value=%d loop_id=%d "
8840 			    "port_id=%02x%02x%02x.\n", priority,
8841 			    fcport->loop_id, fcport->d_id.b.domain,
8842 			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
8843 		fcport->fcp_prio = priority & 0xf;
8844 	} else
8845 		ql_dbg(ql_dbg_user, vha, 0x704f,
8846 		    "Unable to update FCP_CMND priority - ret=0x%x for "
8847 		    "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8848 		    fcport->d_id.b.domain, fcport->d_id.b.area,
8849 		    fcport->d_id.b.al_pa);
8850 	return  ret;
8851 }
8852 
8853 /*
8854  * qla24xx_update_all_fcp_prio
8855  *	Activates fcp priority for all the logged in ports
8856  *
8857  * Input:
8858  *	ha = adapter block pointer.
8859  *
8860  * Return:
8861  *	QLA_SUCCESS or QLA_FUNCTION_FAILED
8862  *
8863  * Context:
8864  *	Kernel context.
8865  */
8866 int
8867 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8868 {
8869 	int ret;
8870 	fc_port_t *fcport;
8871 
8872 	ret = QLA_FUNCTION_FAILED;
8873 	/* We need to set priority for all logged in ports */
8874 	list_for_each_entry(fcport, &vha->vp_fcports, list)
8875 		ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8876 
8877 	return ret;
8878 }
8879 
8880 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8881 	int vp_idx, bool startqp)
8882 {
8883 	int rsp_id = 0;
8884 	int  req_id = 0;
8885 	int i;
8886 	struct qla_hw_data *ha = vha->hw;
8887 	uint16_t qpair_id = 0;
8888 	struct qla_qpair *qpair = NULL;
8889 	struct qla_msix_entry *msix;
8890 
8891 	if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8892 		ql_log(ql_log_warn, vha, 0x00181,
8893 		    "FW/Driver is not multi-queue capable.\n");
8894 		return NULL;
8895 	}
8896 
8897 	if (ql2xmqsupport || ql2xnvmeenable) {
8898 		qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8899 		if (qpair == NULL) {
8900 			ql_log(ql_log_warn, vha, 0x0182,
8901 			    "Failed to allocate memory for queue pair.\n");
8902 			return NULL;
8903 		}
8904 
8905 		qpair->hw = vha->hw;
8906 		qpair->vha = vha;
8907 		qpair->qp_lock_ptr = &qpair->qp_lock;
8908 		spin_lock_init(&qpair->qp_lock);
8909 		qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
8910 
8911 		/* Assign available que pair id */
8912 		mutex_lock(&ha->mq_lock);
8913 		qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
8914 		if (ha->num_qpairs >= ha->max_qpairs) {
8915 			mutex_unlock(&ha->mq_lock);
8916 			ql_log(ql_log_warn, vha, 0x0183,
8917 			    "No resources to create additional q pair.\n");
8918 			goto fail_qid_map;
8919 		}
8920 		ha->num_qpairs++;
8921 		set_bit(qpair_id, ha->qpair_qid_map);
8922 		ha->queue_pair_map[qpair_id] = qpair;
8923 		qpair->id = qpair_id;
8924 		qpair->vp_idx = vp_idx;
8925 		qpair->fw_started = ha->flags.fw_started;
8926 		INIT_LIST_HEAD(&qpair->hints_list);
8927 		qpair->chip_reset = ha->base_qpair->chip_reset;
8928 		qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8929 		qpair->enable_explicit_conf =
8930 		    ha->base_qpair->enable_explicit_conf;
8931 
8932 		for (i = 0; i < ha->msix_count; i++) {
8933 			msix = &ha->msix_entries[i];
8934 			if (msix->in_use)
8935 				continue;
8936 			qpair->msix = msix;
8937 			ql_dbg(ql_dbg_multiq, vha, 0xc00f,
8938 			    "Vector %x selected for qpair\n", msix->vector);
8939 			break;
8940 		}
8941 		if (!qpair->msix) {
8942 			ql_log(ql_log_warn, vha, 0x0184,
8943 			    "Out of MSI-X vectors!.\n");
8944 			goto fail_msix;
8945 		}
8946 
8947 		qpair->msix->in_use = 1;
8948 		list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8949 		qpair->pdev = ha->pdev;
8950 		if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
8951 			qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
8952 
8953 		mutex_unlock(&ha->mq_lock);
8954 
8955 		/* Create response queue first */
8956 		rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
8957 		if (!rsp_id) {
8958 			ql_log(ql_log_warn, vha, 0x0185,
8959 			    "Failed to create response queue.\n");
8960 			goto fail_rsp;
8961 		}
8962 
8963 		qpair->rsp = ha->rsp_q_map[rsp_id];
8964 
8965 		/* Create request queue */
8966 		req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8967 		    startqp);
8968 		if (!req_id) {
8969 			ql_log(ql_log_warn, vha, 0x0186,
8970 			    "Failed to create request queue.\n");
8971 			goto fail_req;
8972 		}
8973 
8974 		qpair->req = ha->req_q_map[req_id];
8975 		qpair->rsp->req = qpair->req;
8976 		qpair->rsp->qpair = qpair;
8977 		/* init qpair to this cpu. Will adjust at run time. */
8978 		qla_cpu_update(qpair, smp_processor_id());
8979 
8980 		if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8981 			if (ha->fw_attributes & BIT_4)
8982 				qpair->difdix_supported = 1;
8983 		}
8984 
8985 		qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8986 		if (!qpair->srb_mempool) {
8987 			ql_log(ql_log_warn, vha, 0xd036,
8988 			    "Failed to create srb mempool for qpair %d\n",
8989 			    qpair->id);
8990 			goto fail_mempool;
8991 		}
8992 
8993 		/* Mark as online */
8994 		qpair->online = 1;
8995 
8996 		if (!vha->flags.qpairs_available)
8997 			vha->flags.qpairs_available = 1;
8998 
8999 		ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9000 		    "Request/Response queue pair created, id %d\n",
9001 		    qpair->id);
9002 		ql_dbg(ql_dbg_init, vha, 0x0187,
9003 		    "Request/Response queue pair created, id %d\n",
9004 		    qpair->id);
9005 	}
9006 	return qpair;
9007 
9008 fail_mempool:
9009 fail_req:
9010 	qla25xx_delete_rsp_que(vha, qpair->rsp);
9011 fail_rsp:
9012 	mutex_lock(&ha->mq_lock);
9013 	qpair->msix->in_use = 0;
9014 	list_del(&qpair->qp_list_elem);
9015 	if (list_empty(&vha->qp_list))
9016 		vha->flags.qpairs_available = 0;
9017 fail_msix:
9018 	ha->queue_pair_map[qpair_id] = NULL;
9019 	clear_bit(qpair_id, ha->qpair_qid_map);
9020 	ha->num_qpairs--;
9021 	mutex_unlock(&ha->mq_lock);
9022 fail_qid_map:
9023 	kfree(qpair);
9024 	return NULL;
9025 }
9026 
9027 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9028 {
9029 	int ret = QLA_FUNCTION_FAILED;
9030 	struct qla_hw_data *ha = qpair->hw;
9031 
9032 	qpair->delete_in_progress = 1;
9033 	while (atomic_read(&qpair->ref_count))
9034 		msleep(500);
9035 
9036 	ret = qla25xx_delete_req_que(vha, qpair->req);
9037 	if (ret != QLA_SUCCESS)
9038 		goto fail;
9039 
9040 	ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9041 	if (ret != QLA_SUCCESS)
9042 		goto fail;
9043 
9044 	mutex_lock(&ha->mq_lock);
9045 	ha->queue_pair_map[qpair->id] = NULL;
9046 	clear_bit(qpair->id, ha->qpair_qid_map);
9047 	ha->num_qpairs--;
9048 	list_del(&qpair->qp_list_elem);
9049 	if (list_empty(&vha->qp_list)) {
9050 		vha->flags.qpairs_available = 0;
9051 		vha->flags.qpairs_req_created = 0;
9052 		vha->flags.qpairs_rsp_created = 0;
9053 	}
9054 	mempool_destroy(qpair->srb_mempool);
9055 	kfree(qpair);
9056 	mutex_unlock(&ha->mq_lock);
9057 
9058 	return QLA_SUCCESS;
9059 fail:
9060 	return ret;
9061 }
9062