1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 scsi_qla_host_t *vha = sp->vha; 54 struct req_que *req; 55 unsigned long flags; 56 57 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 58 req = vha->hw->req_q_map[0]; 59 req->outstanding_cmds[sp->handle] = NULL; 60 iocb = &sp->u.iocb_cmd; 61 iocb->timeout(sp); 62 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 63 } 64 65 void 66 qla2x00_sp_free(void *ptr) 67 { 68 srb_t *sp = ptr; 69 struct srb_iocb *iocb = &sp->u.iocb_cmd; 70 71 del_timer(&iocb->timer); 72 qla2x00_rel_sp(sp); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (IS_QLAFX00(ha)) { 86 tmo = FX00_DEF_RATOV * 2; 87 } else if (!IS_FWI2_CAPABLE(ha)) { 88 /* 89 * Except for earlier ISPs where the timeout is seeded from the 90 * initialization control block. 91 */ 92 tmo = ha->login_timeout; 93 } 94 return tmo; 95 } 96 97 void 98 qla2x00_async_iocb_timeout(void *data) 99 { 100 srb_t *sp = data; 101 fc_port_t *fcport = sp->fcport; 102 struct srb_iocb *lio = &sp->u.iocb_cmd; 103 104 if (fcport) { 105 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 106 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 107 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 108 109 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 110 } else { 111 pr_info("Async-%s timeout - hdl=%x.\n", 112 sp->name, sp->handle); 113 } 114 115 switch (sp->type) { 116 case SRB_LOGIN_CMD: 117 /* Retry as needed. */ 118 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 119 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 120 QLA_LOGIO_LOGIN_RETRIED : 0; 121 sp->done(sp, QLA_FUNCTION_TIMEOUT); 122 break; 123 case SRB_LOGOUT_CMD: 124 case SRB_CT_PTHRU_CMD: 125 case SRB_MB_IOCB: 126 case SRB_NACK_PLOGI: 127 case SRB_NACK_PRLI: 128 case SRB_NACK_LOGO: 129 case SRB_CTRL_VP: 130 sp->done(sp, QLA_FUNCTION_TIMEOUT); 131 break; 132 } 133 } 134 135 static void 136 qla2x00_async_login_sp_done(void *ptr, int res) 137 { 138 srb_t *sp = ptr; 139 struct scsi_qla_host *vha = sp->vha; 140 struct srb_iocb *lio = &sp->u.iocb_cmd; 141 struct event_arg ea; 142 143 ql_dbg(ql_dbg_disc, vha, 0x20dd, 144 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 145 146 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 147 148 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 149 memset(&ea, 0, sizeof(ea)); 150 ea.event = FCME_PLOGI_DONE; 151 ea.fcport = sp->fcport; 152 ea.data[0] = lio->u.logio.data[0]; 153 ea.data[1] = lio->u.logio.data[1]; 154 ea.iop[0] = lio->u.logio.iop[0]; 155 ea.iop[1] = lio->u.logio.iop[1]; 156 ea.sp = sp; 157 qla2x00_fcport_event_handler(vha, &ea); 158 } 159 160 sp->free(sp); 161 } 162 163 int 164 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 165 uint16_t *data) 166 { 167 srb_t *sp; 168 struct srb_iocb *lio; 169 int rval = QLA_FUNCTION_FAILED; 170 171 if (!vha->flags.online) 172 goto done; 173 174 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 175 if (!sp) 176 goto done; 177 178 fcport->flags |= FCF_ASYNC_SENT; 179 fcport->logout_completed = 0; 180 181 fcport->disc_state = DSC_LOGIN_PEND; 182 sp->type = SRB_LOGIN_CMD; 183 sp->name = "login"; 184 sp->gen1 = fcport->rscn_gen; 185 sp->gen2 = fcport->login_gen; 186 187 lio = &sp->u.iocb_cmd; 188 lio->timeout = qla2x00_async_iocb_timeout; 189 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 190 191 sp->done = qla2x00_async_login_sp_done; 192 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 193 194 if (fcport->fc4f_nvme) 195 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 196 197 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 198 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 199 rval = qla2x00_start_sp(sp); 200 if (rval != QLA_SUCCESS) { 201 fcport->flags |= FCF_LOGIN_NEEDED; 202 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 203 goto done_free_sp; 204 } 205 206 ql_dbg(ql_dbg_disc, vha, 0x2072, 207 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 208 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 209 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 210 fcport->login_retry); 211 return rval; 212 213 done_free_sp: 214 sp->free(sp); 215 fcport->flags &= ~FCF_ASYNC_SENT; 216 done: 217 fcport->flags &= ~FCF_ASYNC_ACTIVE; 218 return rval; 219 } 220 221 static void 222 qla2x00_async_logout_sp_done(void *ptr, int res) 223 { 224 srb_t *sp = ptr; 225 226 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 227 sp->fcport->login_gen++; 228 qlt_logo_completion_handler(sp->fcport, res); 229 sp->free(sp); 230 } 231 232 int 233 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 234 { 235 srb_t *sp; 236 struct srb_iocb *lio; 237 int rval = QLA_FUNCTION_FAILED; 238 239 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 240 return rval; 241 242 fcport->flags |= FCF_ASYNC_SENT; 243 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 244 if (!sp) 245 goto done; 246 247 sp->type = SRB_LOGOUT_CMD; 248 sp->name = "logout"; 249 250 lio = &sp->u.iocb_cmd; 251 lio->timeout = qla2x00_async_iocb_timeout; 252 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 253 254 sp->done = qla2x00_async_logout_sp_done; 255 rval = qla2x00_start_sp(sp); 256 if (rval != QLA_SUCCESS) 257 goto done_free_sp; 258 259 ql_dbg(ql_dbg_disc, vha, 0x2070, 260 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 261 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 262 fcport->d_id.b.area, fcport->d_id.b.al_pa, 263 fcport->port_name); 264 return rval; 265 266 done_free_sp: 267 sp->free(sp); 268 done: 269 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 270 return rval; 271 } 272 273 void 274 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 275 uint16_t *data) 276 { 277 fcport->flags &= ~FCF_ASYNC_ACTIVE; 278 /* Don't re-login in target mode */ 279 if (!fcport->tgt_session) 280 qla2x00_mark_device_lost(vha, fcport, 1, 0); 281 qlt_logo_completion_handler(fcport, data[0]); 282 } 283 284 static void 285 qla2x00_async_prlo_sp_done(void *s, int res) 286 { 287 srb_t *sp = (srb_t *)s; 288 struct srb_iocb *lio = &sp->u.iocb_cmd; 289 struct scsi_qla_host *vha = sp->vha; 290 291 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 292 if (!test_bit(UNLOADING, &vha->dpc_flags)) 293 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 294 lio->u.logio.data); 295 sp->free(sp); 296 } 297 298 int 299 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 300 { 301 srb_t *sp; 302 struct srb_iocb *lio; 303 int rval; 304 305 rval = QLA_FUNCTION_FAILED; 306 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 307 if (!sp) 308 goto done; 309 310 sp->type = SRB_PRLO_CMD; 311 sp->name = "prlo"; 312 313 lio = &sp->u.iocb_cmd; 314 lio->timeout = qla2x00_async_iocb_timeout; 315 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 316 317 sp->done = qla2x00_async_prlo_sp_done; 318 rval = qla2x00_start_sp(sp); 319 if (rval != QLA_SUCCESS) 320 goto done_free_sp; 321 322 ql_dbg(ql_dbg_disc, vha, 0x2070, 323 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 324 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 325 fcport->d_id.b.area, fcport->d_id.b.al_pa); 326 return rval; 327 328 done_free_sp: 329 sp->free(sp); 330 done: 331 fcport->flags &= ~FCF_ASYNC_ACTIVE; 332 return rval; 333 } 334 335 static 336 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 337 { 338 struct fc_port *fcport = ea->fcport; 339 340 ql_dbg(ql_dbg_disc, vha, 0x20d2, 341 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 342 __func__, fcport->port_name, fcport->disc_state, 343 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 344 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 345 346 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 347 ql_dbg(ql_dbg_disc, vha, 0x2066, 348 "%s %8phC: adisc fail: post delete\n", 349 __func__, ea->fcport->port_name); 350 qlt_schedule_sess_for_deletion(ea->fcport); 351 return; 352 } 353 354 if (ea->fcport->disc_state == DSC_DELETE_PEND) 355 return; 356 357 if (ea->sp->gen2 != ea->fcport->login_gen) { 358 /* target side must have changed it. */ 359 ql_dbg(ql_dbg_disc, vha, 0x20d3, 360 "%s %8phC generation changed\n", 361 __func__, ea->fcport->port_name); 362 return; 363 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 364 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 365 __func__, __LINE__, ea->fcport->port_name); 366 qla24xx_post_gidpn_work(vha, ea->fcport); 367 return; 368 } 369 370 __qla24xx_handle_gpdb_event(vha, ea); 371 } 372 373 static void 374 qla2x00_async_adisc_sp_done(void *ptr, int res) 375 { 376 srb_t *sp = ptr; 377 struct scsi_qla_host *vha = sp->vha; 378 struct event_arg ea; 379 struct srb_iocb *lio = &sp->u.iocb_cmd; 380 381 ql_dbg(ql_dbg_disc, vha, 0x2066, 382 "Async done-%s res %x %8phC\n", 383 sp->name, res, sp->fcport->port_name); 384 385 sp->fcport->flags &= ~FCF_ASYNC_SENT; 386 387 memset(&ea, 0, sizeof(ea)); 388 ea.event = FCME_ADISC_DONE; 389 ea.rc = res; 390 ea.data[0] = lio->u.logio.data[0]; 391 ea.data[1] = lio->u.logio.data[1]; 392 ea.iop[0] = lio->u.logio.iop[0]; 393 ea.iop[1] = lio->u.logio.iop[1]; 394 ea.fcport = sp->fcport; 395 ea.sp = sp; 396 397 qla2x00_fcport_event_handler(vha, &ea); 398 399 sp->free(sp); 400 } 401 402 int 403 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 404 uint16_t *data) 405 { 406 srb_t *sp; 407 struct srb_iocb *lio; 408 int rval; 409 410 rval = QLA_FUNCTION_FAILED; 411 fcport->flags |= FCF_ASYNC_SENT; 412 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 413 if (!sp) 414 goto done; 415 416 sp->type = SRB_ADISC_CMD; 417 sp->name = "adisc"; 418 419 lio = &sp->u.iocb_cmd; 420 lio->timeout = qla2x00_async_iocb_timeout; 421 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 422 423 sp->done = qla2x00_async_adisc_sp_done; 424 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 425 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 426 rval = qla2x00_start_sp(sp); 427 if (rval != QLA_SUCCESS) 428 goto done_free_sp; 429 430 ql_dbg(ql_dbg_disc, vha, 0x206f, 431 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 432 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 433 return rval; 434 435 done_free_sp: 436 sp->free(sp); 437 done: 438 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 439 qla2x00_post_async_adisc_work(vha, fcport, data); 440 return rval; 441 } 442 443 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 444 struct event_arg *ea) 445 { 446 fc_port_t *fcport, *conflict_fcport; 447 struct get_name_list_extended *e; 448 u16 i, n, found = 0, loop_id; 449 port_id_t id; 450 u64 wwn; 451 u16 data[2]; 452 u8 current_login_state; 453 454 fcport = ea->fcport; 455 ql_dbg(ql_dbg_disc, vha, 0xffff, 456 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 457 __func__, fcport->port_name, fcport->disc_state, 458 fcport->fw_login_state, ea->rc, 459 fcport->login_gen, fcport->last_login_gen, 460 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 461 462 if (fcport->disc_state == DSC_DELETE_PEND) 463 return; 464 465 if (ea->rc) { /* rval */ 466 if (fcport->login_retry == 0) { 467 fcport->login_retry = vha->hw->login_retry_count; 468 ql_dbg(ql_dbg_disc, vha, 0x20de, 469 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 470 fcport->port_name, fcport->login_retry); 471 } 472 return; 473 } 474 475 if (fcport->last_rscn_gen != fcport->rscn_gen) { 476 ql_dbg(ql_dbg_disc, vha, 0x20df, 477 "%s %8phC rscn gen changed rscn %d|%d \n", 478 __func__, fcport->port_name, 479 fcport->last_rscn_gen, fcport->rscn_gen); 480 qla24xx_post_gidpn_work(vha, fcport); 481 return; 482 } else if (fcport->last_login_gen != fcport->login_gen) { 483 ql_dbg(ql_dbg_disc, vha, 0x20e0, 484 "%s %8phC login gen changed\n", 485 __func__, fcport->port_name); 486 return; 487 } 488 489 n = ea->data[0] / sizeof(struct get_name_list_extended); 490 491 ql_dbg(ql_dbg_disc, vha, 0x20e1, 492 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 493 __func__, __LINE__, fcport->port_name, n, 494 fcport->d_id.b.domain, fcport->d_id.b.area, 495 fcport->d_id.b.al_pa, fcport->loop_id); 496 497 for (i = 0; i < n; i++) { 498 e = &vha->gnl.l[i]; 499 wwn = wwn_to_u64(e->port_name); 500 501 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 502 continue; 503 504 found = 1; 505 id.b.domain = e->port_id[2]; 506 id.b.area = e->port_id[1]; 507 id.b.al_pa = e->port_id[0]; 508 id.b.rsvd_1 = 0; 509 510 loop_id = le16_to_cpu(e->nport_handle); 511 loop_id = (loop_id & 0x7fff); 512 513 ql_dbg(ql_dbg_disc, vha, 0x20e2, 514 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 515 __func__, fcport->port_name, 516 e->current_login_state, fcport->fw_login_state, 517 id.b.domain, id.b.area, id.b.al_pa, 518 fcport->d_id.b.domain, fcport->d_id.b.area, 519 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 520 521 if ((id.b24 != fcport->d_id.b24) || 522 ((fcport->loop_id != FC_NO_LOOP_ID) && 523 (fcport->loop_id != loop_id))) { 524 ql_dbg(ql_dbg_disc, vha, 0x20e3, 525 "%s %d %8phC post del sess\n", 526 __func__, __LINE__, fcport->port_name); 527 qlt_schedule_sess_for_deletion(fcport); 528 return; 529 } 530 531 fcport->loop_id = loop_id; 532 533 wwn = wwn_to_u64(fcport->port_name); 534 qlt_find_sess_invalidate_other(vha, wwn, 535 id, loop_id, &conflict_fcport); 536 537 if (conflict_fcport) { 538 /* 539 * Another share fcport share the same loop_id & 540 * nport id. Conflict fcport needs to finish 541 * cleanup before this fcport can proceed to login. 542 */ 543 conflict_fcport->conflict = fcport; 544 fcport->login_pause = 1; 545 } 546 547 if (fcport->fc4f_nvme) 548 current_login_state = e->current_login_state >> 4; 549 else 550 current_login_state = e->current_login_state & 0xf; 551 552 switch (current_login_state) { 553 case DSC_LS_PRLI_COMP: 554 ql_dbg(ql_dbg_disc, vha, 0x20e4, 555 "%s %d %8phC post gpdb\n", 556 __func__, __LINE__, fcport->port_name); 557 558 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 559 fcport->port_type = FCT_INITIATOR; 560 else 561 fcport->port_type = FCT_TARGET; 562 563 data[0] = data[1] = 0; 564 qla2x00_post_async_adisc_work(vha, fcport, data); 565 break; 566 case DSC_LS_PORT_UNAVAIL: 567 default: 568 if (fcport->loop_id == FC_NO_LOOP_ID) { 569 qla2x00_find_new_loop_id(vha, fcport); 570 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 571 } 572 ql_dbg(ql_dbg_disc, vha, 0x20e5, 573 "%s %d %8phC\n", 574 __func__, __LINE__, fcport->port_name); 575 qla24xx_fcport_handle_login(vha, fcport); 576 break; 577 } 578 } 579 580 if (!found) { 581 /* fw has no record of this port */ 582 for (i = 0; i < n; i++) { 583 e = &vha->gnl.l[i]; 584 id.b.domain = e->port_id[0]; 585 id.b.area = e->port_id[1]; 586 id.b.al_pa = e->port_id[2]; 587 id.b.rsvd_1 = 0; 588 loop_id = le16_to_cpu(e->nport_handle); 589 590 if (fcport->d_id.b24 == id.b24) { 591 conflict_fcport = 592 qla2x00_find_fcport_by_wwpn(vha, 593 e->port_name, 0); 594 if (conflict_fcport) { 595 qlt_schedule_sess_for_deletion 596 (conflict_fcport); 597 ql_dbg(ql_dbg_disc, vha, 0x20e6, 598 "%s %d %8phC post del sess\n", 599 __func__, __LINE__, 600 conflict_fcport->port_name); 601 } 602 } 603 604 /* FW already picked this loop id for another fcport */ 605 if (fcport->loop_id == loop_id) 606 fcport->loop_id = FC_NO_LOOP_ID; 607 } 608 qla24xx_fcport_handle_login(vha, fcport); 609 } 610 } /* gnl_event */ 611 612 static void 613 qla24xx_async_gnl_sp_done(void *s, int res) 614 { 615 struct srb *sp = s; 616 struct scsi_qla_host *vha = sp->vha; 617 unsigned long flags; 618 struct fc_port *fcport = NULL, *tf; 619 u16 i, n = 0, loop_id; 620 struct event_arg ea; 621 struct get_name_list_extended *e; 622 u64 wwn; 623 struct list_head h; 624 bool found = false; 625 626 ql_dbg(ql_dbg_disc, vha, 0x20e7, 627 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 628 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 629 sp->u.iocb_cmd.u.mbx.in_mb[2]); 630 631 memset(&ea, 0, sizeof(ea)); 632 ea.sp = sp; 633 ea.rc = res; 634 ea.event = FCME_GNL_DONE; 635 636 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 637 sizeof(struct get_name_list_extended)) { 638 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 639 sizeof(struct get_name_list_extended); 640 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 641 } 642 643 for (i = 0; i < n; i++) { 644 e = &vha->gnl.l[i]; 645 loop_id = le16_to_cpu(e->nport_handle); 646 /* mask out reserve bit */ 647 loop_id = (loop_id & 0x7fff); 648 set_bit(loop_id, vha->hw->loop_id_map); 649 wwn = wwn_to_u64(e->port_name); 650 651 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 652 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 653 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 654 e->port_id[0], e->current_login_state, e->last_login_state, 655 (loop_id & 0x7fff)); 656 } 657 658 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 659 660 INIT_LIST_HEAD(&h); 661 fcport = tf = NULL; 662 if (!list_empty(&vha->gnl.fcports)) 663 list_splice_init(&vha->gnl.fcports, &h); 664 665 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 666 list_del_init(&fcport->gnl_entry); 667 spin_lock(&vha->hw->tgt.sess_lock); 668 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 669 spin_unlock(&vha->hw->tgt.sess_lock); 670 ea.fcport = fcport; 671 672 qla2x00_fcport_event_handler(vha, &ea); 673 } 674 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 675 676 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 677 /* create new fcport if fw has knowledge of new sessions */ 678 for (i = 0; i < n; i++) { 679 port_id_t id; 680 u64 wwnn; 681 682 e = &vha->gnl.l[i]; 683 wwn = wwn_to_u64(e->port_name); 684 685 found = false; 686 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 687 if (!memcmp((u8 *)&wwn, fcport->port_name, 688 WWN_SIZE)) { 689 found = true; 690 break; 691 } 692 } 693 694 id.b.domain = e->port_id[2]; 695 id.b.area = e->port_id[1]; 696 id.b.al_pa = e->port_id[0]; 697 id.b.rsvd_1 = 0; 698 699 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 700 ql_dbg(ql_dbg_disc, vha, 0x2065, 701 "%s %d %8phC %06x post new sess\n", 702 __func__, __LINE__, (u8 *)&wwn, id.b24); 703 wwnn = wwn_to_u64(e->node_name); 704 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 705 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 706 } 707 } 708 709 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 710 711 sp->free(sp); 712 } 713 714 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 715 { 716 srb_t *sp; 717 struct srb_iocb *mbx; 718 int rval = QLA_FUNCTION_FAILED; 719 unsigned long flags; 720 u16 *mb; 721 722 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 723 return rval; 724 725 ql_dbg(ql_dbg_disc, vha, 0x20d9, 726 "Async-gnlist WWPN %8phC \n", fcport->port_name); 727 728 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 729 if (!list_empty(&fcport->gnl_entry)) { 730 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 731 rval = QLA_SUCCESS; 732 goto done; 733 } 734 735 spin_lock(&vha->hw->tgt.sess_lock); 736 fcport->disc_state = DSC_GNL; 737 fcport->last_rscn_gen = fcport->rscn_gen; 738 fcport->last_login_gen = fcport->login_gen; 739 spin_unlock(&vha->hw->tgt.sess_lock); 740 741 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 742 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 743 744 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 745 if (!sp) 746 goto done; 747 748 fcport->flags |= FCF_ASYNC_SENT; 749 sp->type = SRB_MB_IOCB; 750 sp->name = "gnlist"; 751 sp->gen1 = fcport->rscn_gen; 752 sp->gen2 = fcport->login_gen; 753 754 mbx = &sp->u.iocb_cmd; 755 mbx->timeout = qla2x00_async_iocb_timeout; 756 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 757 758 mb = sp->u.iocb_cmd.u.mbx.out_mb; 759 mb[0] = MBC_PORT_NODE_NAME_LIST; 760 mb[1] = BIT_2 | BIT_3; 761 mb[2] = MSW(vha->gnl.ldma); 762 mb[3] = LSW(vha->gnl.ldma); 763 mb[6] = MSW(MSD(vha->gnl.ldma)); 764 mb[7] = LSW(MSD(vha->gnl.ldma)); 765 mb[8] = vha->gnl.size; 766 mb[9] = vha->vp_idx; 767 768 sp->done = qla24xx_async_gnl_sp_done; 769 770 rval = qla2x00_start_sp(sp); 771 if (rval != QLA_SUCCESS) 772 goto done_free_sp; 773 774 ql_dbg(ql_dbg_disc, vha, 0x20da, 775 "Async-%s - OUT WWPN %8phC hndl %x\n", 776 sp->name, fcport->port_name, sp->handle); 777 778 return rval; 779 780 done_free_sp: 781 sp->free(sp); 782 fcport->flags &= ~FCF_ASYNC_SENT; 783 done: 784 return rval; 785 } 786 787 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 788 { 789 struct qla_work_evt *e; 790 791 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 792 if (!e) 793 return QLA_FUNCTION_FAILED; 794 795 e->u.fcport.fcport = fcport; 796 fcport->flags |= FCF_ASYNC_ACTIVE; 797 return qla2x00_post_work(vha, e); 798 } 799 800 static 801 void qla24xx_async_gpdb_sp_done(void *s, int res) 802 { 803 struct srb *sp = s; 804 struct scsi_qla_host *vha = sp->vha; 805 struct qla_hw_data *ha = vha->hw; 806 fc_port_t *fcport = sp->fcport; 807 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 808 struct event_arg ea; 809 810 ql_dbg(ql_dbg_disc, vha, 0x20db, 811 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 812 sp->name, res, fcport->port_name, mb[1], mb[2]); 813 814 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 815 816 memset(&ea, 0, sizeof(ea)); 817 ea.event = FCME_GPDB_DONE; 818 ea.fcport = fcport; 819 ea.sp = sp; 820 821 qla2x00_fcport_event_handler(vha, &ea); 822 823 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 824 sp->u.iocb_cmd.u.mbx.in_dma); 825 826 sp->free(sp); 827 } 828 829 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 830 { 831 struct qla_work_evt *e; 832 833 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 834 if (!e) 835 return QLA_FUNCTION_FAILED; 836 837 e->u.fcport.fcport = fcport; 838 839 return qla2x00_post_work(vha, e); 840 } 841 842 static void 843 qla2x00_async_prli_sp_done(void *ptr, int res) 844 { 845 srb_t *sp = ptr; 846 struct scsi_qla_host *vha = sp->vha; 847 struct srb_iocb *lio = &sp->u.iocb_cmd; 848 struct event_arg ea; 849 850 ql_dbg(ql_dbg_disc, vha, 0x2129, 851 "%s %8phC res %d \n", __func__, 852 sp->fcport->port_name, res); 853 854 sp->fcport->flags &= ~FCF_ASYNC_SENT; 855 856 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 857 memset(&ea, 0, sizeof(ea)); 858 ea.event = FCME_PRLI_DONE; 859 ea.fcport = sp->fcport; 860 ea.data[0] = lio->u.logio.data[0]; 861 ea.data[1] = lio->u.logio.data[1]; 862 ea.iop[0] = lio->u.logio.iop[0]; 863 ea.iop[1] = lio->u.logio.iop[1]; 864 ea.sp = sp; 865 866 qla2x00_fcport_event_handler(vha, &ea); 867 } 868 869 sp->free(sp); 870 } 871 872 int 873 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 874 { 875 srb_t *sp; 876 struct srb_iocb *lio; 877 int rval = QLA_FUNCTION_FAILED; 878 879 if (!vha->flags.online) 880 return rval; 881 882 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 883 fcport->fw_login_state == DSC_LS_PRLI_PEND) 884 return rval; 885 886 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 887 if (!sp) 888 return rval; 889 890 fcport->flags |= FCF_ASYNC_SENT; 891 fcport->logout_completed = 0; 892 893 sp->type = SRB_PRLI_CMD; 894 sp->name = "prli"; 895 896 lio = &sp->u.iocb_cmd; 897 lio->timeout = qla2x00_async_iocb_timeout; 898 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 899 900 sp->done = qla2x00_async_prli_sp_done; 901 lio->u.logio.flags = 0; 902 903 if (fcport->fc4f_nvme) 904 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 905 906 rval = qla2x00_start_sp(sp); 907 if (rval != QLA_SUCCESS) { 908 fcport->flags |= FCF_LOGIN_NEEDED; 909 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 910 goto done_free_sp; 911 } 912 913 ql_dbg(ql_dbg_disc, vha, 0x211b, 914 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n", 915 fcport->port_name, sp->handle, fcport->loop_id, 916 fcport->d_id.b24, fcport->login_retry); 917 918 return rval; 919 920 done_free_sp: 921 sp->free(sp); 922 fcport->flags &= ~FCF_ASYNC_SENT; 923 return rval; 924 } 925 926 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 927 { 928 struct qla_work_evt *e; 929 930 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 931 if (!e) 932 return QLA_FUNCTION_FAILED; 933 934 e->u.fcport.fcport = fcport; 935 e->u.fcport.opt = opt; 936 fcport->flags |= FCF_ASYNC_ACTIVE; 937 return qla2x00_post_work(vha, e); 938 } 939 940 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 941 { 942 srb_t *sp; 943 struct srb_iocb *mbx; 944 int rval = QLA_FUNCTION_FAILED; 945 u16 *mb; 946 dma_addr_t pd_dma; 947 struct port_database_24xx *pd; 948 struct qla_hw_data *ha = vha->hw; 949 950 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 951 return rval; 952 953 fcport->disc_state = DSC_GPDB; 954 955 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 956 if (!sp) 957 goto done; 958 959 fcport->flags |= FCF_ASYNC_SENT; 960 sp->type = SRB_MB_IOCB; 961 sp->name = "gpdb"; 962 sp->gen1 = fcport->rscn_gen; 963 sp->gen2 = fcport->login_gen; 964 965 mbx = &sp->u.iocb_cmd; 966 mbx->timeout = qla2x00_async_iocb_timeout; 967 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 968 969 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 970 if (pd == NULL) { 971 ql_log(ql_log_warn, vha, 0xd043, 972 "Failed to allocate port database structure.\n"); 973 goto done_free_sp; 974 } 975 976 mb = sp->u.iocb_cmd.u.mbx.out_mb; 977 mb[0] = MBC_GET_PORT_DATABASE; 978 mb[1] = fcport->loop_id; 979 mb[2] = MSW(pd_dma); 980 mb[3] = LSW(pd_dma); 981 mb[6] = MSW(MSD(pd_dma)); 982 mb[7] = LSW(MSD(pd_dma)); 983 mb[9] = vha->vp_idx; 984 mb[10] = opt; 985 986 mbx->u.mbx.in = (void *)pd; 987 mbx->u.mbx.in_dma = pd_dma; 988 989 sp->done = qla24xx_async_gpdb_sp_done; 990 991 rval = qla2x00_start_sp(sp); 992 if (rval != QLA_SUCCESS) 993 goto done_free_sp; 994 995 ql_dbg(ql_dbg_disc, vha, 0x20dc, 996 "Async-%s %8phC hndl %x opt %x\n", 997 sp->name, fcport->port_name, sp->handle, opt); 998 999 return rval; 1000 1001 done_free_sp: 1002 if (pd) 1003 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1004 1005 sp->free(sp); 1006 fcport->flags &= ~FCF_ASYNC_SENT; 1007 done: 1008 qla24xx_post_gpdb_work(vha, fcport, opt); 1009 return rval; 1010 } 1011 1012 static 1013 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1014 { 1015 unsigned long flags; 1016 1017 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1018 ea->fcport->login_gen++; 1019 ea->fcport->deleted = 0; 1020 ea->fcport->logout_on_delete = 1; 1021 1022 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1023 vha->fcport_count++; 1024 ea->fcport->login_succ = 1; 1025 1026 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1027 "%s %d %8phC post upd_fcport fcp_cnt %d\n", 1028 __func__, __LINE__, ea->fcport->port_name, 1029 vha->fcport_count); 1030 qla24xx_post_upd_fcport_work(vha, ea->fcport); 1031 } else if (ea->fcport->login_succ) { 1032 /* 1033 * We have an existing session. A late RSCN delivery 1034 * must have triggered the session to be re-validate. 1035 * Session is still valid. 1036 */ 1037 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1038 "%s %d %8phC session revalidate success\n", 1039 __func__, __LINE__, ea->fcport->port_name); 1040 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1041 } 1042 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1043 } 1044 1045 static 1046 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1047 { 1048 fc_port_t *fcport = ea->fcport; 1049 struct port_database_24xx *pd; 1050 struct srb *sp = ea->sp; 1051 uint8_t ls; 1052 1053 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1054 1055 fcport->flags &= ~FCF_ASYNC_SENT; 1056 1057 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1058 "%s %8phC DS %d LS %d rc %d\n", __func__, fcport->port_name, 1059 fcport->disc_state, pd->current_login_state, ea->rc); 1060 1061 if (fcport->disc_state == DSC_DELETE_PEND) 1062 return; 1063 1064 if (fcport->fc4f_nvme) 1065 ls = pd->current_login_state >> 4; 1066 else 1067 ls = pd->current_login_state & 0xf; 1068 1069 switch (ls) { 1070 case PDS_PRLI_COMPLETE: 1071 __qla24xx_parse_gpdb(vha, fcport, pd); 1072 break; 1073 case PDS_PLOGI_PENDING: 1074 case PDS_PLOGI_COMPLETE: 1075 case PDS_PRLI_PENDING: 1076 case PDS_PRLI2_PENDING: 1077 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC relogin needed\n", 1078 __func__, __LINE__, fcport->port_name); 1079 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1080 return; 1081 case PDS_LOGO_PENDING: 1082 case PDS_PORT_UNAVAILABLE: 1083 default: 1084 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1085 __func__, __LINE__, fcport->port_name); 1086 qlt_schedule_sess_for_deletion(fcport); 1087 return; 1088 } 1089 __qla24xx_handle_gpdb_event(vha, ea); 1090 } /* gpdb event */ 1091 1092 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1093 { 1094 u8 login = 0; 1095 int rc; 1096 1097 if (qla_tgt_mode_enabled(vha)) 1098 return; 1099 1100 if (qla_dual_mode_enabled(vha)) { 1101 if (N2N_TOPO(vha->hw)) { 1102 u64 mywwn, wwn; 1103 1104 mywwn = wwn_to_u64(vha->port_name); 1105 wwn = wwn_to_u64(fcport->port_name); 1106 if (mywwn > wwn) 1107 login = 1; 1108 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1109 && time_after_eq(jiffies, 1110 fcport->plogi_nack_done_deadline)) 1111 login = 1; 1112 } else { 1113 login = 1; 1114 } 1115 } else { 1116 /* initiator mode */ 1117 login = 1; 1118 } 1119 1120 if (login) { 1121 if (fcport->loop_id == FC_NO_LOOP_ID) { 1122 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1123 rc = qla2x00_find_new_loop_id(vha, fcport); 1124 if (rc) { 1125 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1126 "%s %d %8phC post del sess - out of loopid\n", 1127 __func__, __LINE__, fcport->port_name); 1128 fcport->scan_state = 0; 1129 qlt_schedule_sess_for_deletion(fcport); 1130 return; 1131 } 1132 } 1133 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1134 "%s %d %8phC post login\n", 1135 __func__, __LINE__, fcport->port_name); 1136 qla2x00_post_async_login_work(vha, fcport, NULL); 1137 } 1138 } 1139 1140 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1141 { 1142 u16 data[2]; 1143 u64 wwn; 1144 1145 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1146 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n", 1147 __func__, fcport->port_name, fcport->disc_state, 1148 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1149 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1150 fcport->login_gen, fcport->login_retry, 1151 fcport->loop_id, fcport->scan_state); 1152 1153 if (fcport->scan_state != QLA_FCPORT_FOUND) 1154 return 0; 1155 1156 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1157 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1158 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1159 return 0; 1160 1161 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1162 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1163 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1164 return 0; 1165 } 1166 } 1167 1168 /* for pure Target Mode. Login will not be initiated */ 1169 if (vha->host->active_mode == MODE_TARGET) 1170 return 0; 1171 1172 if (fcport->flags & FCF_ASYNC_SENT) { 1173 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1174 return 0; 1175 } 1176 1177 if (fcport->login_retry > 0) 1178 fcport->login_retry--; 1179 1180 switch (fcport->disc_state) { 1181 case DSC_DELETED: 1182 wwn = wwn_to_u64(fcport->node_name); 1183 if (wwn == 0) { 1184 ql_dbg(ql_dbg_disc, vha, 0xffff, 1185 "%s %d %8phC post GNNID\n", 1186 __func__, __LINE__, fcport->port_name); 1187 qla24xx_post_gnnid_work(vha, fcport); 1188 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1189 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1190 "%s %d %8phC post gnl\n", 1191 __func__, __LINE__, fcport->port_name); 1192 qla24xx_post_gnl_work(vha, fcport); 1193 } else { 1194 qla_chk_n2n_b4_login(vha, fcport); 1195 } 1196 break; 1197 1198 case DSC_GNL: 1199 if (fcport->login_pause) { 1200 fcport->last_rscn_gen = fcport->rscn_gen; 1201 fcport->last_login_gen = fcport->login_gen; 1202 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1203 break; 1204 } 1205 1206 qla_chk_n2n_b4_login(vha, fcport); 1207 break; 1208 1209 case DSC_LOGIN_FAILED: 1210 ql_dbg(ql_dbg_disc, vha, 0x20d0, 1211 "%s %d %8phC post gidpn\n", 1212 __func__, __LINE__, fcport->port_name); 1213 if (N2N_TOPO(vha->hw)) 1214 qla_chk_n2n_b4_login(vha, fcport); 1215 else 1216 qla24xx_post_gidpn_work(vha, fcport); 1217 break; 1218 1219 case DSC_LOGIN_COMPLETE: 1220 /* recheck login state */ 1221 ql_dbg(ql_dbg_disc, vha, 0x20d1, 1222 "%s %d %8phC post adisc\n", 1223 __func__, __LINE__, fcport->port_name); 1224 data[0] = data[1] = 0; 1225 qla2x00_post_async_adisc_work(vha, fcport, data); 1226 break; 1227 1228 case DSC_LOGIN_PEND: 1229 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1230 qla24xx_post_prli_work(vha, fcport); 1231 break; 1232 1233 default: 1234 break; 1235 } 1236 1237 return 0; 1238 } 1239 1240 static 1241 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1242 { 1243 fcport->rscn_gen++; 1244 1245 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1246 "%s %8phC DS %d LS %d\n", 1247 __func__, fcport->port_name, fcport->disc_state, 1248 fcport->fw_login_state); 1249 1250 if (fcport->flags & FCF_ASYNC_SENT) 1251 return; 1252 1253 switch (fcport->disc_state) { 1254 case DSC_DELETED: 1255 case DSC_LOGIN_COMPLETE: 1256 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1257 break; 1258 default: 1259 break; 1260 } 1261 } 1262 1263 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1264 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1265 { 1266 struct qla_work_evt *e; 1267 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1268 if (!e) 1269 return QLA_FUNCTION_FAILED; 1270 1271 e->u.new_sess.id = *id; 1272 e->u.new_sess.pla = pla; 1273 e->u.new_sess.fc4_type = fc4_type; 1274 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1275 if (node_name) 1276 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1277 1278 return qla2x00_post_work(vha, e); 1279 } 1280 1281 static 1282 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1283 struct event_arg *ea) 1284 { 1285 fc_port_t *fcport = ea->fcport; 1286 1287 ql_dbg(ql_dbg_disc, vha, 0x2102, 1288 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1289 __func__, fcport->port_name, fcport->disc_state, 1290 fcport->fw_login_state, fcport->login_pause, 1291 fcport->deleted, fcport->conflict, 1292 fcport->last_rscn_gen, fcport->rscn_gen, 1293 fcport->last_login_gen, fcport->login_gen, 1294 fcport->flags); 1295 1296 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1297 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1298 return; 1299 1300 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1301 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1302 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1303 return; 1304 } 1305 } 1306 1307 if (fcport->flags & FCF_ASYNC_SENT) { 1308 fcport->login_retry++; 1309 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1310 return; 1311 } 1312 1313 if (fcport->disc_state == DSC_DELETE_PEND) { 1314 fcport->login_retry++; 1315 return; 1316 } 1317 1318 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1319 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1320 __func__, __LINE__, fcport->port_name); 1321 1322 qla24xx_post_gidpn_work(vha, fcport); 1323 return; 1324 } 1325 1326 qla24xx_fcport_handle_login(vha, fcport); 1327 } 1328 1329 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1330 { 1331 fc_port_t *f, *tf; 1332 uint32_t id = 0, mask, rid; 1333 unsigned long flags; 1334 fc_port_t *fcport; 1335 1336 switch (ea->event) { 1337 case FCME_RELOGIN: 1338 if (test_bit(UNLOADING, &vha->dpc_flags)) 1339 return; 1340 1341 qla24xx_handle_relogin_event(vha, ea); 1342 break; 1343 case FCME_RSCN: 1344 if (test_bit(UNLOADING, &vha->dpc_flags)) 1345 return; 1346 switch (ea->id.b.rsvd_1) { 1347 case RSCN_PORT_ADDR: 1348 fcport = qla2x00_find_fcport_by_nportid 1349 (vha, &ea->id, 1); 1350 if (fcport) 1351 fcport->rscn_rcvd = 1; 1352 1353 spin_lock_irqsave(&vha->work_lock, flags); 1354 if (vha->scan.scan_flags == 0) { 1355 ql_dbg(ql_dbg_disc, vha, 0xffff, 1356 "%s: schedule\n", __func__); 1357 vha->scan.scan_flags |= SF_QUEUED; 1358 schedule_delayed_work(&vha->scan.scan_work, 5); 1359 } 1360 spin_unlock_irqrestore(&vha->work_lock, flags); 1361 1362 break; 1363 case RSCN_AREA_ADDR: 1364 case RSCN_DOM_ADDR: 1365 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1366 mask = 0xffff00; 1367 ql_dbg(ql_dbg_async, vha, 0x5044, 1368 "RSCN: Area 0x%06x was affected\n", 1369 ea->id.b24); 1370 } else { 1371 mask = 0xff0000; 1372 ql_dbg(ql_dbg_async, vha, 0x507a, 1373 "RSCN: Domain 0x%06x was affected\n", 1374 ea->id.b24); 1375 } 1376 1377 rid = ea->id.b24 & mask; 1378 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1379 list) { 1380 id = f->d_id.b24 & mask; 1381 if (rid == id) { 1382 ea->fcport = f; 1383 qla24xx_handle_rscn_event(f, ea); 1384 } 1385 } 1386 break; 1387 case RSCN_FAB_ADDR: 1388 default: 1389 ql_log(ql_log_warn, vha, 0xd045, 1390 "RSCN: Fabric was affected. Addr format %d\n", 1391 ea->id.b.rsvd_1); 1392 qla2x00_mark_all_devices_lost(vha, 1); 1393 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1394 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1395 } 1396 break; 1397 case FCME_GIDPN_DONE: 1398 qla24xx_handle_gidpn_event(vha, ea); 1399 break; 1400 case FCME_GNL_DONE: 1401 qla24xx_handle_gnl_done_event(vha, ea); 1402 break; 1403 case FCME_GPSC_DONE: 1404 qla24xx_handle_gpsc_event(vha, ea); 1405 break; 1406 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1407 qla24xx_handle_plogi_done_event(vha, ea); 1408 break; 1409 case FCME_PRLI_DONE: 1410 qla24xx_handle_prli_done_event(vha, ea); 1411 break; 1412 case FCME_GPDB_DONE: 1413 qla24xx_handle_gpdb_event(vha, ea); 1414 break; 1415 case FCME_GPNID_DONE: 1416 qla24xx_handle_gpnid_event(vha, ea); 1417 break; 1418 case FCME_GFFID_DONE: 1419 qla24xx_handle_gffid_event(vha, ea); 1420 break; 1421 case FCME_ADISC_DONE: 1422 qla24xx_handle_adisc_event(vha, ea); 1423 break; 1424 case FCME_GNNID_DONE: 1425 qla24xx_handle_gnnid_event(vha, ea); 1426 break; 1427 case FCME_GFPNID_DONE: 1428 qla24xx_handle_gfpnid_event(vha, ea); 1429 break; 1430 default: 1431 BUG_ON(1); 1432 break; 1433 } 1434 } 1435 1436 static void 1437 qla2x00_tmf_iocb_timeout(void *data) 1438 { 1439 srb_t *sp = data; 1440 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1441 1442 tmf->u.tmf.comp_status = CS_TIMEOUT; 1443 complete(&tmf->u.tmf.comp); 1444 } 1445 1446 static void 1447 qla2x00_tmf_sp_done(void *ptr, int res) 1448 { 1449 srb_t *sp = ptr; 1450 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1451 1452 complete(&tmf->u.tmf.comp); 1453 } 1454 1455 int 1456 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1457 uint32_t tag) 1458 { 1459 struct scsi_qla_host *vha = fcport->vha; 1460 struct srb_iocb *tm_iocb; 1461 srb_t *sp; 1462 int rval = QLA_FUNCTION_FAILED; 1463 1464 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1465 if (!sp) 1466 goto done; 1467 1468 tm_iocb = &sp->u.iocb_cmd; 1469 sp->type = SRB_TM_CMD; 1470 sp->name = "tmf"; 1471 1472 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1473 init_completion(&tm_iocb->u.tmf.comp); 1474 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1475 1476 tm_iocb->u.tmf.flags = flags; 1477 tm_iocb->u.tmf.lun = lun; 1478 tm_iocb->u.tmf.data = tag; 1479 sp->done = qla2x00_tmf_sp_done; 1480 1481 rval = qla2x00_start_sp(sp); 1482 if (rval != QLA_SUCCESS) 1483 goto done_free_sp; 1484 1485 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1486 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1487 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1488 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1489 1490 wait_for_completion(&tm_iocb->u.tmf.comp); 1491 1492 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 1493 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1494 1495 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) { 1496 ql_dbg(ql_dbg_taskm, vha, 0x8030, 1497 "TM IOCB failed (%x).\n", rval); 1498 } 1499 1500 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1501 flags = tm_iocb->u.tmf.flags; 1502 lun = (uint16_t)tm_iocb->u.tmf.lun; 1503 1504 /* Issue Marker IOCB */ 1505 qla2x00_marker(vha, vha->hw->req_q_map[0], 1506 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1507 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1508 } 1509 1510 done_free_sp: 1511 sp->free(sp); 1512 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1513 done: 1514 return rval; 1515 } 1516 1517 static void 1518 qla24xx_abort_iocb_timeout(void *data) 1519 { 1520 srb_t *sp = data; 1521 struct srb_iocb *abt = &sp->u.iocb_cmd; 1522 1523 abt->u.abt.comp_status = CS_TIMEOUT; 1524 complete(&abt->u.abt.comp); 1525 } 1526 1527 static void 1528 qla24xx_abort_sp_done(void *ptr, int res) 1529 { 1530 srb_t *sp = ptr; 1531 struct srb_iocb *abt = &sp->u.iocb_cmd; 1532 1533 if (del_timer(&sp->u.iocb_cmd.timer)) 1534 complete(&abt->u.abt.comp); 1535 } 1536 1537 int 1538 qla24xx_async_abort_cmd(srb_t *cmd_sp) 1539 { 1540 scsi_qla_host_t *vha = cmd_sp->vha; 1541 fc_port_t *fcport = cmd_sp->fcport; 1542 struct srb_iocb *abt_iocb; 1543 srb_t *sp; 1544 int rval = QLA_FUNCTION_FAILED; 1545 1546 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1547 if (!sp) 1548 goto done; 1549 1550 abt_iocb = &sp->u.iocb_cmd; 1551 sp->type = SRB_ABT_CMD; 1552 sp->name = "abort"; 1553 1554 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1555 init_completion(&abt_iocb->u.abt.comp); 1556 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1557 1558 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1559 1560 if (vha->flags.qpairs_available && cmd_sp->qpair) 1561 abt_iocb->u.abt.req_que_no = 1562 cpu_to_le16(cmd_sp->qpair->req->id); 1563 else 1564 abt_iocb->u.abt.req_que_no = cpu_to_le16(vha->req->id); 1565 1566 sp->done = qla24xx_abort_sp_done; 1567 1568 rval = qla2x00_start_sp(sp); 1569 if (rval != QLA_SUCCESS) 1570 goto done_free_sp; 1571 1572 ql_dbg(ql_dbg_async, vha, 0x507c, 1573 "Abort command issued - hdl=%x, target_id=%x\n", 1574 cmd_sp->handle, fcport->tgt_id); 1575 1576 wait_for_completion(&abt_iocb->u.abt.comp); 1577 1578 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1579 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1580 1581 done_free_sp: 1582 sp->free(sp); 1583 done: 1584 return rval; 1585 } 1586 1587 int 1588 qla24xx_async_abort_command(srb_t *sp) 1589 { 1590 unsigned long flags = 0; 1591 1592 uint32_t handle; 1593 fc_port_t *fcport = sp->fcport; 1594 struct scsi_qla_host *vha = fcport->vha; 1595 struct qla_hw_data *ha = vha->hw; 1596 struct req_que *req = vha->req; 1597 1598 if (vha->flags.qpairs_available && sp->qpair) 1599 req = sp->qpair->req; 1600 1601 spin_lock_irqsave(&ha->hardware_lock, flags); 1602 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1603 if (req->outstanding_cmds[handle] == sp) 1604 break; 1605 } 1606 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1607 if (handle == req->num_outstanding_cmds) { 1608 /* Command not found. */ 1609 return QLA_FUNCTION_FAILED; 1610 } 1611 if (sp->type == SRB_FXIOCB_DCMD) 1612 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1613 FXDISC_ABORT_IOCTL); 1614 1615 return qla24xx_async_abort_cmd(sp); 1616 } 1617 1618 static void 1619 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1620 { 1621 switch (ea->data[0]) { 1622 case MBS_COMMAND_COMPLETE: 1623 ql_dbg(ql_dbg_disc, vha, 0x2118, 1624 "%s %d %8phC post gpdb\n", 1625 __func__, __LINE__, ea->fcport->port_name); 1626 1627 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1628 ea->fcport->logout_on_delete = 1; 1629 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1630 break; 1631 default: 1632 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1633 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1634 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1635 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1636 break; 1637 } 1638 1639 if (ea->fcport->n2n_flag) { 1640 ql_dbg(ql_dbg_disc, vha, 0x2118, 1641 "%s %d %8phC post fc4 prli\n", 1642 __func__, __LINE__, ea->fcport->port_name); 1643 ea->fcport->fc4f_nvme = 0; 1644 ea->fcport->n2n_flag = 0; 1645 qla24xx_post_prli_work(vha, ea->fcport); 1646 } 1647 ql_dbg(ql_dbg_disc, vha, 0x2119, 1648 "%s %d %8phC unhandle event of %x\n", 1649 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1650 break; 1651 } 1652 } 1653 1654 static void 1655 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1656 { 1657 port_id_t cid; /* conflict Nport id */ 1658 u16 lid; 1659 struct fc_port *conflict_fcport; 1660 unsigned long flags; 1661 struct fc_port *fcport = ea->fcport; 1662 1663 ql_dbg(ql_dbg_disc, vha, 0xffff, 1664 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1665 __func__, fcport->port_name, fcport->disc_state, 1666 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1667 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1, 1668 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1669 1670 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1671 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1672 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1673 "%s %d %8phC Remote is trying to login\n", 1674 __func__, __LINE__, fcport->port_name); 1675 return; 1676 } 1677 1678 if (fcport->disc_state == DSC_DELETE_PEND) 1679 return; 1680 1681 if (ea->sp->gen2 != fcport->login_gen) { 1682 /* target side must have changed it. */ 1683 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1684 "%s %8phC generation changed\n", 1685 __func__, fcport->port_name); 1686 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1687 return; 1688 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1689 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 1690 __func__, __LINE__, fcport->port_name); 1691 qla24xx_post_gidpn_work(vha, fcport); 1692 return; 1693 } 1694 1695 switch (ea->data[0]) { 1696 case MBS_COMMAND_COMPLETE: 1697 /* 1698 * Driver must validate login state - If PRLI not complete, 1699 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1700 * requests. 1701 */ 1702 if (ea->fcport->fc4f_nvme) { 1703 ql_dbg(ql_dbg_disc, vha, 0x2117, 1704 "%s %d %8phC post prli\n", 1705 __func__, __LINE__, ea->fcport->port_name); 1706 qla24xx_post_prli_work(vha, ea->fcport); 1707 } else { 1708 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1709 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1710 __func__, __LINE__, ea->fcport->port_name, 1711 ea->fcport->loop_id, ea->fcport->d_id.b24); 1712 1713 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1714 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1715 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1716 ea->fcport->logout_on_delete = 1; 1717 ea->fcport->send_els_logo = 0; 1718 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1719 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1720 1721 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1722 } 1723 break; 1724 case MBS_COMMAND_ERROR: 1725 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1726 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1727 1728 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1729 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1730 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1731 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1732 else 1733 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1734 break; 1735 case MBS_LOOP_ID_USED: 1736 /* data[1] = IO PARAM 1 = nport ID */ 1737 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1738 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1739 cid.b.al_pa = ea->iop[1] & 0xff; 1740 cid.b.rsvd_1 = 0; 1741 1742 ql_dbg(ql_dbg_disc, vha, 0x20ec, 1743 "%s %d %8phC LoopID 0x%x in use post gnl\n", 1744 __func__, __LINE__, ea->fcport->port_name, 1745 ea->fcport->loop_id); 1746 1747 if (IS_SW_RESV_ADDR(cid)) { 1748 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1749 ea->fcport->loop_id = FC_NO_LOOP_ID; 1750 } else { 1751 qla2x00_clear_loop_id(ea->fcport); 1752 } 1753 qla24xx_post_gnl_work(vha, ea->fcport); 1754 break; 1755 case MBS_PORT_ID_USED: 1756 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1757 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n", 1758 __func__, __LINE__, ea->fcport->port_name, 1759 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area, 1760 ea->fcport->d_id.b.al_pa); 1761 1762 lid = ea->iop[1] & 0xffff; 1763 qlt_find_sess_invalidate_other(vha, 1764 wwn_to_u64(ea->fcport->port_name), 1765 ea->fcport->d_id, lid, &conflict_fcport); 1766 1767 if (conflict_fcport) { 1768 /* 1769 * Another fcport share the same loop_id/nport id. 1770 * Conflict fcport needs to finish cleanup before this 1771 * fcport can proceed to login. 1772 */ 1773 conflict_fcport->conflict = ea->fcport; 1774 ea->fcport->login_pause = 1; 1775 1776 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1777 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 1778 __func__, __LINE__, ea->fcport->port_name, 1779 ea->fcport->d_id.b24, lid); 1780 qla2x00_clear_loop_id(ea->fcport); 1781 qla24xx_post_gidpn_work(vha, ea->fcport); 1782 } else { 1783 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1784 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 1785 __func__, __LINE__, ea->fcport->port_name, 1786 ea->fcport->d_id.b24, lid); 1787 1788 qla2x00_clear_loop_id(ea->fcport); 1789 set_bit(lid, vha->hw->loop_id_map); 1790 ea->fcport->loop_id = lid; 1791 ea->fcport->keep_nport_handle = 0; 1792 qlt_schedule_sess_for_deletion(ea->fcport); 1793 } 1794 break; 1795 } 1796 return; 1797 } 1798 1799 void 1800 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1801 uint16_t *data) 1802 { 1803 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1804 qlt_logo_completion_handler(fcport, data[0]); 1805 fcport->login_gen++; 1806 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1807 return; 1808 } 1809 1810 void 1811 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1812 uint16_t *data) 1813 { 1814 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1815 if (data[0] == MBS_COMMAND_COMPLETE) { 1816 qla2x00_update_fcport(vha, fcport); 1817 1818 return; 1819 } 1820 1821 /* Retry login. */ 1822 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 1823 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1824 else 1825 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1826 1827 return; 1828 } 1829 1830 /****************************************************************************/ 1831 /* QLogic ISP2x00 Hardware Support Functions. */ 1832 /****************************************************************************/ 1833 1834 static int 1835 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 1836 { 1837 int rval = QLA_SUCCESS; 1838 struct qla_hw_data *ha = vha->hw; 1839 uint32_t idc_major_ver, idc_minor_ver; 1840 uint16_t config[4]; 1841 1842 qla83xx_idc_lock(vha, 0); 1843 1844 /* SV: TODO: Assign initialization timeout from 1845 * flash-info / other param 1846 */ 1847 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 1848 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 1849 1850 /* Set our fcoe function presence */ 1851 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 1852 ql_dbg(ql_dbg_p3p, vha, 0xb077, 1853 "Error while setting DRV-Presence.\n"); 1854 rval = QLA_FUNCTION_FAILED; 1855 goto exit; 1856 } 1857 1858 /* Decide the reset ownership */ 1859 qla83xx_reset_ownership(vha); 1860 1861 /* 1862 * On first protocol driver load: 1863 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 1864 * register. 1865 * Others: Check compatibility with current IDC Major version. 1866 */ 1867 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 1868 if (ha->flags.nic_core_reset_owner) { 1869 /* Set IDC Major version */ 1870 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 1871 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 1872 1873 /* Clearing IDC-Lock-Recovery register */ 1874 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 1875 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 1876 /* 1877 * Clear further IDC participation if we are not compatible with 1878 * the current IDC Major Version. 1879 */ 1880 ql_log(ql_log_warn, vha, 0xb07d, 1881 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 1882 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 1883 __qla83xx_clear_drv_presence(vha); 1884 rval = QLA_FUNCTION_FAILED; 1885 goto exit; 1886 } 1887 /* Each function sets its supported Minor version. */ 1888 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 1889 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 1890 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 1891 1892 if (ha->flags.nic_core_reset_owner) { 1893 memset(config, 0, sizeof(config)); 1894 if (!qla81xx_get_port_config(vha, config)) 1895 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 1896 QLA8XXX_DEV_READY); 1897 } 1898 1899 rval = qla83xx_idc_state_handler(vha); 1900 1901 exit: 1902 qla83xx_idc_unlock(vha, 0); 1903 1904 return rval; 1905 } 1906 1907 /* 1908 * qla2x00_initialize_adapter 1909 * Initialize board. 1910 * 1911 * Input: 1912 * ha = adapter block pointer. 1913 * 1914 * Returns: 1915 * 0 = success 1916 */ 1917 int 1918 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 1919 { 1920 int rval; 1921 struct qla_hw_data *ha = vha->hw; 1922 struct req_que *req = ha->req_q_map[0]; 1923 1924 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 1925 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 1926 1927 /* Clear adapter flags. */ 1928 vha->flags.online = 0; 1929 ha->flags.chip_reset_done = 0; 1930 vha->flags.reset_active = 0; 1931 ha->flags.pci_channel_io_perm_failure = 0; 1932 ha->flags.eeh_busy = 0; 1933 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 1934 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1935 atomic_set(&vha->loop_state, LOOP_DOWN); 1936 vha->device_flags = DFLG_NO_CABLE; 1937 vha->dpc_flags = 0; 1938 vha->flags.management_server_logged_in = 0; 1939 vha->marker_needed = 0; 1940 ha->isp_abort_cnt = 0; 1941 ha->beacon_blink_led = 0; 1942 1943 set_bit(0, ha->req_qid_map); 1944 set_bit(0, ha->rsp_qid_map); 1945 1946 ql_dbg(ql_dbg_init, vha, 0x0040, 1947 "Configuring PCI space...\n"); 1948 rval = ha->isp_ops->pci_config(vha); 1949 if (rval) { 1950 ql_log(ql_log_warn, vha, 0x0044, 1951 "Unable to configure PCI space.\n"); 1952 return (rval); 1953 } 1954 1955 ha->isp_ops->reset_chip(vha); 1956 1957 rval = qla2xxx_get_flash_info(vha); 1958 if (rval) { 1959 ql_log(ql_log_fatal, vha, 0x004f, 1960 "Unable to validate FLASH data.\n"); 1961 return rval; 1962 } 1963 1964 if (IS_QLA8044(ha)) { 1965 qla8044_read_reset_template(vha); 1966 1967 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 1968 * If DONRESET_BIT0 is set, drivers should not set dev_state 1969 * to NEED_RESET. But if NEED_RESET is set, drivers should 1970 * should honor the reset. */ 1971 if (ql2xdontresethba == 1) 1972 qla8044_set_idc_dontreset(vha); 1973 } 1974 1975 ha->isp_ops->get_flash_version(vha, req->ring); 1976 ql_dbg(ql_dbg_init, vha, 0x0061, 1977 "Configure NVRAM parameters...\n"); 1978 1979 ha->isp_ops->nvram_config(vha); 1980 1981 if (ha->flags.disable_serdes) { 1982 /* Mask HBA via NVRAM settings? */ 1983 ql_log(ql_log_info, vha, 0x0077, 1984 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 1985 return QLA_FUNCTION_FAILED; 1986 } 1987 1988 ql_dbg(ql_dbg_init, vha, 0x0078, 1989 "Verifying loaded RISC code...\n"); 1990 1991 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 1992 rval = ha->isp_ops->chip_diag(vha); 1993 if (rval) 1994 return (rval); 1995 rval = qla2x00_setup_chip(vha); 1996 if (rval) 1997 return (rval); 1998 } 1999 2000 if (IS_QLA84XX(ha)) { 2001 ha->cs84xx = qla84xx_get_chip(vha); 2002 if (!ha->cs84xx) { 2003 ql_log(ql_log_warn, vha, 0x00d0, 2004 "Unable to configure ISP84XX.\n"); 2005 return QLA_FUNCTION_FAILED; 2006 } 2007 } 2008 2009 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2010 rval = qla2x00_init_rings(vha); 2011 2012 ha->flags.chip_reset_done = 1; 2013 2014 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2015 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2016 rval = qla84xx_init_chip(vha); 2017 if (rval != QLA_SUCCESS) { 2018 ql_log(ql_log_warn, vha, 0x00d4, 2019 "Unable to initialize ISP84XX.\n"); 2020 qla84xx_put_chip(vha); 2021 } 2022 } 2023 2024 /* Load the NIC Core f/w if we are the first protocol driver. */ 2025 if (IS_QLA8031(ha)) { 2026 rval = qla83xx_nic_core_fw_load(vha); 2027 if (rval) 2028 ql_log(ql_log_warn, vha, 0x0124, 2029 "Error in initializing NIC Core f/w.\n"); 2030 } 2031 2032 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2033 qla24xx_read_fcp_prio_cfg(vha); 2034 2035 if (IS_P3P_TYPE(ha)) 2036 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2037 else 2038 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2039 2040 return (rval); 2041 } 2042 2043 /** 2044 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2045 * @vha: HA context 2046 * 2047 * Returns 0 on success. 2048 */ 2049 int 2050 qla2100_pci_config(scsi_qla_host_t *vha) 2051 { 2052 uint16_t w; 2053 unsigned long flags; 2054 struct qla_hw_data *ha = vha->hw; 2055 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2056 2057 pci_set_master(ha->pdev); 2058 pci_try_set_mwi(ha->pdev); 2059 2060 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2061 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2062 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2063 2064 pci_disable_rom(ha->pdev); 2065 2066 /* Get PCI bus information. */ 2067 spin_lock_irqsave(&ha->hardware_lock, flags); 2068 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2069 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2070 2071 return QLA_SUCCESS; 2072 } 2073 2074 /** 2075 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2076 * @vha: HA context 2077 * 2078 * Returns 0 on success. 2079 */ 2080 int 2081 qla2300_pci_config(scsi_qla_host_t *vha) 2082 { 2083 uint16_t w; 2084 unsigned long flags = 0; 2085 uint32_t cnt; 2086 struct qla_hw_data *ha = vha->hw; 2087 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2088 2089 pci_set_master(ha->pdev); 2090 pci_try_set_mwi(ha->pdev); 2091 2092 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2093 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2094 2095 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2096 w &= ~PCI_COMMAND_INTX_DISABLE; 2097 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2098 2099 /* 2100 * If this is a 2300 card and not 2312, reset the 2101 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2102 * the 2310 also reports itself as a 2300 so we need to get the 2103 * fb revision level -- a 6 indicates it really is a 2300 and 2104 * not a 2310. 2105 */ 2106 if (IS_QLA2300(ha)) { 2107 spin_lock_irqsave(&ha->hardware_lock, flags); 2108 2109 /* Pause RISC. */ 2110 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2111 for (cnt = 0; cnt < 30000; cnt++) { 2112 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2113 break; 2114 2115 udelay(10); 2116 } 2117 2118 /* Select FPM registers. */ 2119 WRT_REG_WORD(®->ctrl_status, 0x20); 2120 RD_REG_WORD(®->ctrl_status); 2121 2122 /* Get the fb rev level */ 2123 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2124 2125 if (ha->fb_rev == FPM_2300) 2126 pci_clear_mwi(ha->pdev); 2127 2128 /* Deselect FPM registers. */ 2129 WRT_REG_WORD(®->ctrl_status, 0x0); 2130 RD_REG_WORD(®->ctrl_status); 2131 2132 /* Release RISC module. */ 2133 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2134 for (cnt = 0; cnt < 30000; cnt++) { 2135 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2136 break; 2137 2138 udelay(10); 2139 } 2140 2141 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2142 } 2143 2144 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2145 2146 pci_disable_rom(ha->pdev); 2147 2148 /* Get PCI bus information. */ 2149 spin_lock_irqsave(&ha->hardware_lock, flags); 2150 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2151 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2152 2153 return QLA_SUCCESS; 2154 } 2155 2156 /** 2157 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2158 * @vha: HA context 2159 * 2160 * Returns 0 on success. 2161 */ 2162 int 2163 qla24xx_pci_config(scsi_qla_host_t *vha) 2164 { 2165 uint16_t w; 2166 unsigned long flags = 0; 2167 struct qla_hw_data *ha = vha->hw; 2168 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2169 2170 pci_set_master(ha->pdev); 2171 pci_try_set_mwi(ha->pdev); 2172 2173 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2174 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2175 w &= ~PCI_COMMAND_INTX_DISABLE; 2176 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2177 2178 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2179 2180 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2181 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2182 pcix_set_mmrbc(ha->pdev, 2048); 2183 2184 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2185 if (pci_is_pcie(ha->pdev)) 2186 pcie_set_readrq(ha->pdev, 4096); 2187 2188 pci_disable_rom(ha->pdev); 2189 2190 ha->chip_revision = ha->pdev->revision; 2191 2192 /* Get PCI bus information. */ 2193 spin_lock_irqsave(&ha->hardware_lock, flags); 2194 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2195 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2196 2197 return QLA_SUCCESS; 2198 } 2199 2200 /** 2201 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2202 * @vha: HA context 2203 * 2204 * Returns 0 on success. 2205 */ 2206 int 2207 qla25xx_pci_config(scsi_qla_host_t *vha) 2208 { 2209 uint16_t w; 2210 struct qla_hw_data *ha = vha->hw; 2211 2212 pci_set_master(ha->pdev); 2213 pci_try_set_mwi(ha->pdev); 2214 2215 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2216 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2217 w &= ~PCI_COMMAND_INTX_DISABLE; 2218 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2219 2220 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2221 if (pci_is_pcie(ha->pdev)) 2222 pcie_set_readrq(ha->pdev, 4096); 2223 2224 pci_disable_rom(ha->pdev); 2225 2226 ha->chip_revision = ha->pdev->revision; 2227 2228 return QLA_SUCCESS; 2229 } 2230 2231 /** 2232 * qla2x00_isp_firmware() - Choose firmware image. 2233 * @vha: HA context 2234 * 2235 * Returns 0 on success. 2236 */ 2237 static int 2238 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2239 { 2240 int rval; 2241 uint16_t loop_id, topo, sw_cap; 2242 uint8_t domain, area, al_pa; 2243 struct qla_hw_data *ha = vha->hw; 2244 2245 /* Assume loading risc code */ 2246 rval = QLA_FUNCTION_FAILED; 2247 2248 if (ha->flags.disable_risc_code_load) { 2249 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2250 2251 /* Verify checksum of loaded RISC code. */ 2252 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2253 if (rval == QLA_SUCCESS) { 2254 /* And, verify we are not in ROM code. */ 2255 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2256 &area, &domain, &topo, &sw_cap); 2257 } 2258 } 2259 2260 if (rval) 2261 ql_dbg(ql_dbg_init, vha, 0x007a, 2262 "**** Load RISC code ****.\n"); 2263 2264 return (rval); 2265 } 2266 2267 /** 2268 * qla2x00_reset_chip() - Reset ISP chip. 2269 * @vha: HA context 2270 * 2271 * Returns 0 on success. 2272 */ 2273 void 2274 qla2x00_reset_chip(scsi_qla_host_t *vha) 2275 { 2276 unsigned long flags = 0; 2277 struct qla_hw_data *ha = vha->hw; 2278 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2279 uint32_t cnt; 2280 uint16_t cmd; 2281 2282 if (unlikely(pci_channel_offline(ha->pdev))) 2283 return; 2284 2285 ha->isp_ops->disable_intrs(ha); 2286 2287 spin_lock_irqsave(&ha->hardware_lock, flags); 2288 2289 /* Turn off master enable */ 2290 cmd = 0; 2291 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2292 cmd &= ~PCI_COMMAND_MASTER; 2293 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2294 2295 if (!IS_QLA2100(ha)) { 2296 /* Pause RISC. */ 2297 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2298 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2299 for (cnt = 0; cnt < 30000; cnt++) { 2300 if ((RD_REG_WORD(®->hccr) & 2301 HCCR_RISC_PAUSE) != 0) 2302 break; 2303 udelay(100); 2304 } 2305 } else { 2306 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2307 udelay(10); 2308 } 2309 2310 /* Select FPM registers. */ 2311 WRT_REG_WORD(®->ctrl_status, 0x20); 2312 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2313 2314 /* FPM Soft Reset. */ 2315 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2316 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2317 2318 /* Toggle Fpm Reset. */ 2319 if (!IS_QLA2200(ha)) { 2320 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2321 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2322 } 2323 2324 /* Select frame buffer registers. */ 2325 WRT_REG_WORD(®->ctrl_status, 0x10); 2326 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2327 2328 /* Reset frame buffer FIFOs. */ 2329 if (IS_QLA2200(ha)) { 2330 WRT_FB_CMD_REG(ha, reg, 0xa000); 2331 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2332 } else { 2333 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2334 2335 /* Read back fb_cmd until zero or 3 seconds max */ 2336 for (cnt = 0; cnt < 3000; cnt++) { 2337 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2338 break; 2339 udelay(100); 2340 } 2341 } 2342 2343 /* Select RISC module registers. */ 2344 WRT_REG_WORD(®->ctrl_status, 0); 2345 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2346 2347 /* Reset RISC processor. */ 2348 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2349 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2350 2351 /* Release RISC processor. */ 2352 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2353 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2354 } 2355 2356 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2357 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2358 2359 /* Reset ISP chip. */ 2360 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2361 2362 /* Wait for RISC to recover from reset. */ 2363 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2364 /* 2365 * It is necessary to for a delay here since the card doesn't 2366 * respond to PCI reads during a reset. On some architectures 2367 * this will result in an MCA. 2368 */ 2369 udelay(20); 2370 for (cnt = 30000; cnt; cnt--) { 2371 if ((RD_REG_WORD(®->ctrl_status) & 2372 CSR_ISP_SOFT_RESET) == 0) 2373 break; 2374 udelay(100); 2375 } 2376 } else 2377 udelay(10); 2378 2379 /* Reset RISC processor. */ 2380 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2381 2382 WRT_REG_WORD(®->semaphore, 0); 2383 2384 /* Release RISC processor. */ 2385 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2386 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2387 2388 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2389 for (cnt = 0; cnt < 30000; cnt++) { 2390 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2391 break; 2392 2393 udelay(100); 2394 } 2395 } else 2396 udelay(100); 2397 2398 /* Turn on master enable */ 2399 cmd |= PCI_COMMAND_MASTER; 2400 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2401 2402 /* Disable RISC pause on FPM parity error. */ 2403 if (!IS_QLA2100(ha)) { 2404 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2405 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2406 } 2407 2408 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2409 } 2410 2411 /** 2412 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2413 * @vha: HA context 2414 * 2415 * Returns 0 on success. 2416 */ 2417 static int 2418 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2419 { 2420 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2421 2422 if (!IS_QLA81XX(vha->hw)) 2423 return QLA_SUCCESS; 2424 2425 return qla81xx_write_mpi_register(vha, mb); 2426 } 2427 2428 /** 2429 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2430 * @vha: HA context 2431 * 2432 * Returns 0 on success. 2433 */ 2434 static inline int 2435 qla24xx_reset_risc(scsi_qla_host_t *vha) 2436 { 2437 unsigned long flags = 0; 2438 struct qla_hw_data *ha = vha->hw; 2439 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2440 uint32_t cnt; 2441 uint16_t wd; 2442 static int abts_cnt; /* ISP abort retry counts */ 2443 int rval = QLA_SUCCESS; 2444 2445 spin_lock_irqsave(&ha->hardware_lock, flags); 2446 2447 /* Reset RISC. */ 2448 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2449 for (cnt = 0; cnt < 30000; cnt++) { 2450 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2451 break; 2452 2453 udelay(10); 2454 } 2455 2456 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2457 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2458 2459 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2460 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2461 RD_REG_DWORD(®->hccr), 2462 RD_REG_DWORD(®->ctrl_status), 2463 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2464 2465 WRT_REG_DWORD(®->ctrl_status, 2466 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2467 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2468 2469 udelay(100); 2470 2471 /* Wait for firmware to complete NVRAM accesses. */ 2472 RD_REG_WORD(®->mailbox0); 2473 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2474 rval == QLA_SUCCESS; cnt--) { 2475 barrier(); 2476 if (cnt) 2477 udelay(5); 2478 else 2479 rval = QLA_FUNCTION_TIMEOUT; 2480 } 2481 2482 if (rval == QLA_SUCCESS) 2483 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2484 2485 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2486 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2487 RD_REG_DWORD(®->hccr), 2488 RD_REG_DWORD(®->mailbox0)); 2489 2490 /* Wait for soft-reset to complete. */ 2491 RD_REG_DWORD(®->ctrl_status); 2492 for (cnt = 0; cnt < 60; cnt++) { 2493 barrier(); 2494 if ((RD_REG_DWORD(®->ctrl_status) & 2495 CSRX_ISP_SOFT_RESET) == 0) 2496 break; 2497 2498 udelay(5); 2499 } 2500 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2501 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2502 2503 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2504 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2505 RD_REG_DWORD(®->hccr), 2506 RD_REG_DWORD(®->ctrl_status)); 2507 2508 /* If required, do an MPI FW reset now */ 2509 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2510 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2511 if (++abts_cnt < 5) { 2512 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2513 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2514 } else { 2515 /* 2516 * We exhausted the ISP abort retries. We have to 2517 * set the board offline. 2518 */ 2519 abts_cnt = 0; 2520 vha->flags.online = 0; 2521 } 2522 } 2523 } 2524 2525 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2526 RD_REG_DWORD(®->hccr); 2527 2528 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2529 RD_REG_DWORD(®->hccr); 2530 2531 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2532 RD_REG_DWORD(®->hccr); 2533 2534 RD_REG_WORD(®->mailbox0); 2535 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2536 rval == QLA_SUCCESS; cnt--) { 2537 barrier(); 2538 if (cnt) 2539 udelay(5); 2540 else 2541 rval = QLA_FUNCTION_TIMEOUT; 2542 } 2543 if (rval == QLA_SUCCESS) 2544 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2545 2546 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2547 "Host Risc 0x%x, mailbox0 0x%x\n", 2548 RD_REG_DWORD(®->hccr), 2549 RD_REG_WORD(®->mailbox0)); 2550 2551 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2552 2553 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2554 "Driver in %s mode\n", 2555 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2556 2557 if (IS_NOPOLLING_TYPE(ha)) 2558 ha->isp_ops->enable_intrs(ha); 2559 2560 return rval; 2561 } 2562 2563 static void 2564 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2565 { 2566 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2567 2568 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2569 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2570 2571 } 2572 2573 static void 2574 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2575 { 2576 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2577 2578 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2579 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2580 } 2581 2582 static void 2583 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2584 { 2585 uint32_t wd32 = 0; 2586 uint delta_msec = 100; 2587 uint elapsed_msec = 0; 2588 uint timeout_msec; 2589 ulong n; 2590 2591 if (vha->hw->pdev->subsystem_device != 0x0175 && 2592 vha->hw->pdev->subsystem_device != 0x0240) 2593 return; 2594 2595 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2596 udelay(100); 2597 2598 attempt: 2599 timeout_msec = TIMEOUT_SEMAPHORE; 2600 n = timeout_msec / delta_msec; 2601 while (n--) { 2602 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2603 qla25xx_read_risc_sema_reg(vha, &wd32); 2604 if (wd32 & RISC_SEMAPHORE) 2605 break; 2606 msleep(delta_msec); 2607 elapsed_msec += delta_msec; 2608 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2609 goto force; 2610 } 2611 2612 if (!(wd32 & RISC_SEMAPHORE)) 2613 goto force; 2614 2615 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2616 goto acquired; 2617 2618 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2619 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2620 n = timeout_msec / delta_msec; 2621 while (n--) { 2622 qla25xx_read_risc_sema_reg(vha, &wd32); 2623 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2624 break; 2625 msleep(delta_msec); 2626 elapsed_msec += delta_msec; 2627 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2628 goto force; 2629 } 2630 2631 if (wd32 & RISC_SEMAPHORE_FORCE) 2632 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2633 2634 goto attempt; 2635 2636 force: 2637 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2638 2639 acquired: 2640 return; 2641 } 2642 2643 /** 2644 * qla24xx_reset_chip() - Reset ISP24xx chip. 2645 * @vha: HA context 2646 * 2647 * Returns 0 on success. 2648 */ 2649 void 2650 qla24xx_reset_chip(scsi_qla_host_t *vha) 2651 { 2652 struct qla_hw_data *ha = vha->hw; 2653 2654 if (pci_channel_offline(ha->pdev) && 2655 ha->flags.pci_channel_io_perm_failure) { 2656 return; 2657 } 2658 2659 ha->isp_ops->disable_intrs(ha); 2660 2661 qla25xx_manipulate_risc_semaphore(vha); 2662 2663 /* Perform RISC reset. */ 2664 qla24xx_reset_risc(vha); 2665 } 2666 2667 /** 2668 * qla2x00_chip_diag() - Test chip for proper operation. 2669 * @vha: HA context 2670 * 2671 * Returns 0 on success. 2672 */ 2673 int 2674 qla2x00_chip_diag(scsi_qla_host_t *vha) 2675 { 2676 int rval; 2677 struct qla_hw_data *ha = vha->hw; 2678 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2679 unsigned long flags = 0; 2680 uint16_t data; 2681 uint32_t cnt; 2682 uint16_t mb[5]; 2683 struct req_que *req = ha->req_q_map[0]; 2684 2685 /* Assume a failed state */ 2686 rval = QLA_FUNCTION_FAILED; 2687 2688 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2689 ®->flash_address); 2690 2691 spin_lock_irqsave(&ha->hardware_lock, flags); 2692 2693 /* Reset ISP chip. */ 2694 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2695 2696 /* 2697 * We need to have a delay here since the card will not respond while 2698 * in reset causing an MCA on some architectures. 2699 */ 2700 udelay(20); 2701 data = qla2x00_debounce_register(®->ctrl_status); 2702 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2703 udelay(5); 2704 data = RD_REG_WORD(®->ctrl_status); 2705 barrier(); 2706 } 2707 2708 if (!cnt) 2709 goto chip_diag_failed; 2710 2711 ql_dbg(ql_dbg_init, vha, 0x007c, 2712 "Reset register cleared by chip reset.\n"); 2713 2714 /* Reset RISC processor. */ 2715 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2716 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2717 2718 /* Workaround for QLA2312 PCI parity error */ 2719 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2720 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2721 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2722 udelay(5); 2723 data = RD_MAILBOX_REG(ha, reg, 0); 2724 barrier(); 2725 } 2726 } else 2727 udelay(10); 2728 2729 if (!cnt) 2730 goto chip_diag_failed; 2731 2732 /* Check product ID of chip */ 2733 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2734 2735 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2736 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2737 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2738 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2739 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2740 mb[3] != PROD_ID_3) { 2741 ql_log(ql_log_warn, vha, 0x0062, 2742 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2743 mb[1], mb[2], mb[3]); 2744 2745 goto chip_diag_failed; 2746 } 2747 ha->product_id[0] = mb[1]; 2748 ha->product_id[1] = mb[2]; 2749 ha->product_id[2] = mb[3]; 2750 ha->product_id[3] = mb[4]; 2751 2752 /* Adjust fw RISC transfer size */ 2753 if (req->length > 1024) 2754 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2755 else 2756 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2757 req->length; 2758 2759 if (IS_QLA2200(ha) && 2760 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2761 /* Limit firmware transfer size with a 2200A */ 2762 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2763 2764 ha->device_type |= DT_ISP2200A; 2765 ha->fw_transfer_size = 128; 2766 } 2767 2768 /* Wrap Incoming Mailboxes Test. */ 2769 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2770 2771 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2772 rval = qla2x00_mbx_reg_test(vha); 2773 if (rval) 2774 ql_log(ql_log_warn, vha, 0x0080, 2775 "Failed mailbox send register test.\n"); 2776 else 2777 /* Flag a successful rval */ 2778 rval = QLA_SUCCESS; 2779 spin_lock_irqsave(&ha->hardware_lock, flags); 2780 2781 chip_diag_failed: 2782 if (rval) 2783 ql_log(ql_log_info, vha, 0x0081, 2784 "Chip diagnostics **** FAILED ****.\n"); 2785 2786 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2787 2788 return (rval); 2789 } 2790 2791 /** 2792 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 2793 * @vha: HA context 2794 * 2795 * Returns 0 on success. 2796 */ 2797 int 2798 qla24xx_chip_diag(scsi_qla_host_t *vha) 2799 { 2800 int rval; 2801 struct qla_hw_data *ha = vha->hw; 2802 struct req_que *req = ha->req_q_map[0]; 2803 2804 if (IS_P3P_TYPE(ha)) 2805 return QLA_SUCCESS; 2806 2807 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 2808 2809 rval = qla2x00_mbx_reg_test(vha); 2810 if (rval) { 2811 ql_log(ql_log_warn, vha, 0x0082, 2812 "Failed mailbox send register test.\n"); 2813 } else { 2814 /* Flag a successful rval */ 2815 rval = QLA_SUCCESS; 2816 } 2817 2818 return rval; 2819 } 2820 2821 static void 2822 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 2823 { 2824 int rval; 2825 dma_addr_t tc_dma; 2826 void *tc; 2827 struct qla_hw_data *ha = vha->hw; 2828 2829 if (ha->eft) { 2830 ql_dbg(ql_dbg_init, vha, 0x00bd, 2831 "%s: Offload Mem is already allocated.\n", 2832 __func__); 2833 return; 2834 } 2835 2836 if (IS_FWI2_CAPABLE(ha)) { 2837 /* Allocate memory for Fibre Channel Event Buffer. */ 2838 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2839 !IS_QLA27XX(ha)) 2840 goto try_eft; 2841 2842 if (ha->fce) 2843 dma_free_coherent(&ha->pdev->dev, 2844 FCE_SIZE, ha->fce, ha->fce_dma); 2845 2846 /* Allocate memory for Fibre Channel Event Buffer. */ 2847 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 2848 GFP_KERNEL); 2849 if (!tc) { 2850 ql_log(ql_log_warn, vha, 0x00be, 2851 "Unable to allocate (%d KB) for FCE.\n", 2852 FCE_SIZE / 1024); 2853 goto try_eft; 2854 } 2855 2856 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 2857 ha->fce_mb, &ha->fce_bufs); 2858 if (rval) { 2859 ql_log(ql_log_warn, vha, 0x00bf, 2860 "Unable to initialize FCE (%d).\n", rval); 2861 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 2862 tc_dma); 2863 ha->flags.fce_enabled = 0; 2864 goto try_eft; 2865 } 2866 ql_dbg(ql_dbg_init, vha, 0x00c0, 2867 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 2868 2869 ha->flags.fce_enabled = 1; 2870 ha->fce_dma = tc_dma; 2871 ha->fce = tc; 2872 2873 try_eft: 2874 if (ha->eft) 2875 dma_free_coherent(&ha->pdev->dev, 2876 EFT_SIZE, ha->eft, ha->eft_dma); 2877 2878 /* Allocate memory for Extended Trace Buffer. */ 2879 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 2880 GFP_KERNEL); 2881 if (!tc) { 2882 ql_log(ql_log_warn, vha, 0x00c1, 2883 "Unable to allocate (%d KB) for EFT.\n", 2884 EFT_SIZE / 1024); 2885 goto eft_err; 2886 } 2887 2888 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 2889 if (rval) { 2890 ql_log(ql_log_warn, vha, 0x00c2, 2891 "Unable to initialize EFT (%d).\n", rval); 2892 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 2893 tc_dma); 2894 goto eft_err; 2895 } 2896 ql_dbg(ql_dbg_init, vha, 0x00c3, 2897 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2898 2899 ha->eft_dma = tc_dma; 2900 ha->eft = tc; 2901 } 2902 2903 eft_err: 2904 return; 2905 } 2906 2907 void 2908 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 2909 { 2910 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 2911 eft_size, fce_size, mq_size; 2912 struct qla_hw_data *ha = vha->hw; 2913 struct req_que *req = ha->req_q_map[0]; 2914 struct rsp_que *rsp = ha->rsp_q_map[0]; 2915 struct qla2xxx_fw_dump *fw_dump; 2916 2917 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 2918 req_q_size = rsp_q_size = 0; 2919 2920 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2921 fixed_size = sizeof(struct qla2100_fw_dump); 2922 } else if (IS_QLA23XX(ha)) { 2923 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 2924 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 2925 sizeof(uint16_t); 2926 } else if (IS_FWI2_CAPABLE(ha)) { 2927 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 2928 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 2929 else if (IS_QLA81XX(ha)) 2930 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 2931 else if (IS_QLA25XX(ha)) 2932 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 2933 else 2934 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 2935 2936 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 2937 sizeof(uint32_t); 2938 if (ha->mqenable) { 2939 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 2940 mq_size = sizeof(struct qla2xxx_mq_chain); 2941 /* 2942 * Allocate maximum buffer size for all queues. 2943 * Resizing must be done at end-of-dump processing. 2944 */ 2945 mq_size += ha->max_req_queues * 2946 (req->length * sizeof(request_t)); 2947 mq_size += ha->max_rsp_queues * 2948 (rsp->length * sizeof(response_t)); 2949 } 2950 if (ha->tgt.atio_ring) 2951 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 2952 /* Allocate memory for Fibre Channel Event Buffer. */ 2953 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2954 !IS_QLA27XX(ha)) 2955 goto try_eft; 2956 2957 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 2958 try_eft: 2959 ql_dbg(ql_dbg_init, vha, 0x00c3, 2960 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2961 eft_size = EFT_SIZE; 2962 } 2963 2964 if (IS_QLA27XX(ha)) { 2965 if (!ha->fw_dump_template) { 2966 ql_log(ql_log_warn, vha, 0x00ba, 2967 "Failed missing fwdump template\n"); 2968 return; 2969 } 2970 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 2971 ql_dbg(ql_dbg_init, vha, 0x00fa, 2972 "-> allocating fwdump (%x bytes)...\n", dump_size); 2973 goto allocate; 2974 } 2975 2976 req_q_size = req->length * sizeof(request_t); 2977 rsp_q_size = rsp->length * sizeof(response_t); 2978 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 2979 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 2980 ha->chain_offset = dump_size; 2981 dump_size += mq_size + fce_size; 2982 2983 if (ha->exchoffld_buf) 2984 dump_size += sizeof(struct qla2xxx_offld_chain) + 2985 ha->exchoffld_size; 2986 if (ha->exlogin_buf) 2987 dump_size += sizeof(struct qla2xxx_offld_chain) + 2988 ha->exlogin_size; 2989 2990 allocate: 2991 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 2992 fw_dump = vmalloc(dump_size); 2993 if (!fw_dump) { 2994 ql_log(ql_log_warn, vha, 0x00c4, 2995 "Unable to allocate (%d KB) for firmware dump.\n", 2996 dump_size / 1024); 2997 } else { 2998 if (ha->fw_dump) 2999 vfree(ha->fw_dump); 3000 ha->fw_dump = fw_dump; 3001 3002 ha->fw_dump_len = dump_size; 3003 ql_dbg(ql_dbg_init, vha, 0x00c5, 3004 "Allocated (%d KB) for firmware dump.\n", 3005 dump_size / 1024); 3006 3007 if (IS_QLA27XX(ha)) 3008 return; 3009 3010 ha->fw_dump->signature[0] = 'Q'; 3011 ha->fw_dump->signature[1] = 'L'; 3012 ha->fw_dump->signature[2] = 'G'; 3013 ha->fw_dump->signature[3] = 'C'; 3014 ha->fw_dump->version = htonl(1); 3015 3016 ha->fw_dump->fixed_size = htonl(fixed_size); 3017 ha->fw_dump->mem_size = htonl(mem_size); 3018 ha->fw_dump->req_q_size = htonl(req_q_size); 3019 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3020 3021 ha->fw_dump->eft_size = htonl(eft_size); 3022 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3023 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3024 3025 ha->fw_dump->header_size = 3026 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3027 } 3028 } 3029 } 3030 3031 static int 3032 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3033 { 3034 #define MPS_MASK 0xe0 3035 int rval; 3036 uint16_t dc; 3037 uint32_t dw; 3038 3039 if (!IS_QLA81XX(vha->hw)) 3040 return QLA_SUCCESS; 3041 3042 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3043 if (rval != QLA_SUCCESS) { 3044 ql_log(ql_log_warn, vha, 0x0105, 3045 "Unable to acquire semaphore.\n"); 3046 goto done; 3047 } 3048 3049 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3050 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3051 if (rval != QLA_SUCCESS) { 3052 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3053 goto done_release; 3054 } 3055 3056 dc &= MPS_MASK; 3057 if (dc == (dw & MPS_MASK)) 3058 goto done_release; 3059 3060 dw &= ~MPS_MASK; 3061 dw |= dc; 3062 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3063 if (rval != QLA_SUCCESS) { 3064 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3065 } 3066 3067 done_release: 3068 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3069 if (rval != QLA_SUCCESS) { 3070 ql_log(ql_log_warn, vha, 0x006d, 3071 "Unable to release semaphore.\n"); 3072 } 3073 3074 done: 3075 return rval; 3076 } 3077 3078 int 3079 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3080 { 3081 /* Don't try to reallocate the array */ 3082 if (req->outstanding_cmds) 3083 return QLA_SUCCESS; 3084 3085 if (!IS_FWI2_CAPABLE(ha)) 3086 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3087 else { 3088 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3089 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3090 else 3091 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3092 } 3093 3094 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3095 sizeof(srb_t *), 3096 GFP_KERNEL); 3097 3098 if (!req->outstanding_cmds) { 3099 /* 3100 * Try to allocate a minimal size just so we can get through 3101 * initialization. 3102 */ 3103 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3104 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3105 sizeof(srb_t *), 3106 GFP_KERNEL); 3107 3108 if (!req->outstanding_cmds) { 3109 ql_log(ql_log_fatal, NULL, 0x0126, 3110 "Failed to allocate memory for " 3111 "outstanding_cmds for req_que %p.\n", req); 3112 req->num_outstanding_cmds = 0; 3113 return QLA_FUNCTION_FAILED; 3114 } 3115 } 3116 3117 return QLA_SUCCESS; 3118 } 3119 3120 #define PRINT_FIELD(_field, _flag, _str) { \ 3121 if (a0->_field & _flag) {\ 3122 if (p) {\ 3123 strcat(ptr, "|");\ 3124 ptr++;\ 3125 leftover--;\ 3126 } \ 3127 len = snprintf(ptr, leftover, "%s", _str); \ 3128 p = 1;\ 3129 leftover -= len;\ 3130 ptr += len; \ 3131 } \ 3132 } 3133 3134 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3135 { 3136 #define STR_LEN 64 3137 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3138 u8 str[STR_LEN], *ptr, p; 3139 int leftover, len; 3140 3141 memset(str, 0, STR_LEN); 3142 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3143 ql_dbg(ql_dbg_init, vha, 0x015a, 3144 "SFP MFG Name: %s\n", str); 3145 3146 memset(str, 0, STR_LEN); 3147 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3148 ql_dbg(ql_dbg_init, vha, 0x015c, 3149 "SFP Part Name: %s\n", str); 3150 3151 /* media */ 3152 memset(str, 0, STR_LEN); 3153 ptr = str; 3154 leftover = STR_LEN; 3155 p = len = 0; 3156 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3157 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3158 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3159 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3160 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3161 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3162 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3163 ql_dbg(ql_dbg_init, vha, 0x0160, 3164 "SFP Media: %s\n", str); 3165 3166 /* link length */ 3167 memset(str, 0, STR_LEN); 3168 ptr = str; 3169 leftover = STR_LEN; 3170 p = len = 0; 3171 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3172 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3173 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3174 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3175 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3176 ql_dbg(ql_dbg_init, vha, 0x0196, 3177 "SFP Link Length: %s\n", str); 3178 3179 memset(str, 0, STR_LEN); 3180 ptr = str; 3181 leftover = STR_LEN; 3182 p = len = 0; 3183 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3184 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3185 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3186 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3187 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3188 ql_dbg(ql_dbg_init, vha, 0x016e, 3189 "SFP FC Link Tech: %s\n", str); 3190 3191 if (a0->length_km) 3192 ql_dbg(ql_dbg_init, vha, 0x016f, 3193 "SFP Distant: %d km\n", a0->length_km); 3194 if (a0->length_100m) 3195 ql_dbg(ql_dbg_init, vha, 0x0170, 3196 "SFP Distant: %d m\n", a0->length_100m*100); 3197 if (a0->length_50um_10m) 3198 ql_dbg(ql_dbg_init, vha, 0x0189, 3199 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3200 if (a0->length_62um_10m) 3201 ql_dbg(ql_dbg_init, vha, 0x018a, 3202 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3203 if (a0->length_om4_10m) 3204 ql_dbg(ql_dbg_init, vha, 0x0194, 3205 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3206 if (a0->length_om3_10m) 3207 ql_dbg(ql_dbg_init, vha, 0x0195, 3208 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3209 } 3210 3211 3212 /* 3213 * Return Code: 3214 * QLA_SUCCESS: no action 3215 * QLA_INTERFACE_ERROR: SFP is not there. 3216 * QLA_FUNCTION_FAILED: detected New SFP 3217 */ 3218 int 3219 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3220 { 3221 int rc = QLA_SUCCESS; 3222 struct sff_8247_a0 *a; 3223 struct qla_hw_data *ha = vha->hw; 3224 3225 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3226 goto out; 3227 3228 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3229 if (rc) 3230 goto out; 3231 3232 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3233 qla2xxx_print_sfp_info(vha); 3234 3235 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3236 /* long range */ 3237 ha->flags.detected_lr_sfp = 1; 3238 3239 if (a->length_km > 5 || a->length_100m > 50) 3240 ha->long_range_distance = LR_DISTANCE_10K; 3241 else 3242 ha->long_range_distance = LR_DISTANCE_5K; 3243 3244 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3245 ql_dbg(ql_dbg_async, vha, 0x507b, 3246 "Detected Long Range SFP.\n"); 3247 } else { 3248 /* short range */ 3249 ha->flags.detected_lr_sfp = 0; 3250 if (ha->flags.using_lr_setting) 3251 ql_dbg(ql_dbg_async, vha, 0x5084, 3252 "Detected Short Range SFP.\n"); 3253 } 3254 3255 if (!vha->flags.init_done) 3256 rc = QLA_SUCCESS; 3257 out: 3258 return rc; 3259 } 3260 3261 /** 3262 * qla2x00_setup_chip() - Load and start RISC firmware. 3263 * @vha: HA context 3264 * 3265 * Returns 0 on success. 3266 */ 3267 static int 3268 qla2x00_setup_chip(scsi_qla_host_t *vha) 3269 { 3270 int rval; 3271 uint32_t srisc_address = 0; 3272 struct qla_hw_data *ha = vha->hw; 3273 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3274 unsigned long flags; 3275 uint16_t fw_major_version; 3276 3277 if (IS_P3P_TYPE(ha)) { 3278 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3279 if (rval == QLA_SUCCESS) { 3280 qla2x00_stop_firmware(vha); 3281 goto enable_82xx_npiv; 3282 } else 3283 goto failed; 3284 } 3285 3286 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3287 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3288 spin_lock_irqsave(&ha->hardware_lock, flags); 3289 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3290 RD_REG_WORD(®->hccr); 3291 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3292 } 3293 3294 qla81xx_mpi_sync(vha); 3295 3296 /* Load firmware sequences */ 3297 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3298 if (rval == QLA_SUCCESS) { 3299 ql_dbg(ql_dbg_init, vha, 0x00c9, 3300 "Verifying Checksum of loaded RISC code.\n"); 3301 3302 rval = qla2x00_verify_checksum(vha, srisc_address); 3303 if (rval == QLA_SUCCESS) { 3304 /* Start firmware execution. */ 3305 ql_dbg(ql_dbg_init, vha, 0x00ca, 3306 "Starting firmware.\n"); 3307 3308 if (ql2xexlogins) 3309 ha->flags.exlogins_enabled = 1; 3310 3311 if (qla_is_exch_offld_enabled(vha)) 3312 ha->flags.exchoffld_enabled = 1; 3313 3314 rval = qla2x00_execute_fw(vha, srisc_address); 3315 /* Retrieve firmware information. */ 3316 if (rval == QLA_SUCCESS) { 3317 qla24xx_detect_sfp(vha); 3318 3319 rval = qla2x00_set_exlogins_buffer(vha); 3320 if (rval != QLA_SUCCESS) 3321 goto failed; 3322 3323 rval = qla2x00_set_exchoffld_buffer(vha); 3324 if (rval != QLA_SUCCESS) 3325 goto failed; 3326 3327 enable_82xx_npiv: 3328 fw_major_version = ha->fw_major_version; 3329 if (IS_P3P_TYPE(ha)) 3330 qla82xx_check_md_needed(vha); 3331 else 3332 rval = qla2x00_get_fw_version(vha); 3333 if (rval != QLA_SUCCESS) 3334 goto failed; 3335 ha->flags.npiv_supported = 0; 3336 if (IS_QLA2XXX_MIDTYPE(ha) && 3337 (ha->fw_attributes & BIT_2)) { 3338 ha->flags.npiv_supported = 1; 3339 if ((!ha->max_npiv_vports) || 3340 ((ha->max_npiv_vports + 1) % 3341 MIN_MULTI_ID_FABRIC)) 3342 ha->max_npiv_vports = 3343 MIN_MULTI_ID_FABRIC - 1; 3344 } 3345 qla2x00_get_resource_cnts(vha); 3346 3347 /* 3348 * Allocate the array of outstanding commands 3349 * now that we know the firmware resources. 3350 */ 3351 rval = qla2x00_alloc_outstanding_cmds(ha, 3352 vha->req); 3353 if (rval != QLA_SUCCESS) 3354 goto failed; 3355 3356 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3357 qla2x00_alloc_offload_mem(vha); 3358 3359 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3360 qla2x00_alloc_fw_dump(vha); 3361 3362 } else { 3363 goto failed; 3364 } 3365 } else { 3366 ql_log(ql_log_fatal, vha, 0x00cd, 3367 "ISP Firmware failed checksum.\n"); 3368 goto failed; 3369 } 3370 } else 3371 goto failed; 3372 3373 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3374 /* Enable proper parity. */ 3375 spin_lock_irqsave(&ha->hardware_lock, flags); 3376 if (IS_QLA2300(ha)) 3377 /* SRAM parity */ 3378 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3379 else 3380 /* SRAM, Instruction RAM and GP RAM parity */ 3381 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3382 RD_REG_WORD(®->hccr); 3383 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3384 } 3385 3386 if (IS_QLA27XX(ha)) 3387 ha->flags.fac_supported = 1; 3388 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3389 uint32_t size; 3390 3391 rval = qla81xx_fac_get_sector_size(vha, &size); 3392 if (rval == QLA_SUCCESS) { 3393 ha->flags.fac_supported = 1; 3394 ha->fdt_block_size = size << 2; 3395 } else { 3396 ql_log(ql_log_warn, vha, 0x00ce, 3397 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3398 ha->fw_major_version, ha->fw_minor_version, 3399 ha->fw_subminor_version); 3400 3401 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3402 ha->flags.fac_supported = 0; 3403 rval = QLA_SUCCESS; 3404 } 3405 } 3406 } 3407 failed: 3408 if (rval) { 3409 ql_log(ql_log_fatal, vha, 0x00cf, 3410 "Setup chip ****FAILED****.\n"); 3411 } 3412 3413 return (rval); 3414 } 3415 3416 /** 3417 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3418 * @rsp: response queue 3419 * 3420 * Beginning of request ring has initialization control block already built 3421 * by nvram config routine. 3422 * 3423 * Returns 0 on success. 3424 */ 3425 void 3426 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3427 { 3428 uint16_t cnt; 3429 response_t *pkt; 3430 3431 rsp->ring_ptr = rsp->ring; 3432 rsp->ring_index = 0; 3433 rsp->status_srb = NULL; 3434 pkt = rsp->ring_ptr; 3435 for (cnt = 0; cnt < rsp->length; cnt++) { 3436 pkt->signature = RESPONSE_PROCESSED; 3437 pkt++; 3438 } 3439 } 3440 3441 /** 3442 * qla2x00_update_fw_options() - Read and process firmware options. 3443 * @vha: HA context 3444 * 3445 * Returns 0 on success. 3446 */ 3447 void 3448 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3449 { 3450 uint16_t swing, emphasis, tx_sens, rx_sens; 3451 struct qla_hw_data *ha = vha->hw; 3452 3453 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3454 qla2x00_get_fw_options(vha, ha->fw_options); 3455 3456 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3457 return; 3458 3459 /* Serial Link options. */ 3460 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3461 "Serial link options.\n"); 3462 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3463 (uint8_t *)&ha->fw_seriallink_options, 3464 sizeof(ha->fw_seriallink_options)); 3465 3466 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3467 if (ha->fw_seriallink_options[3] & BIT_2) { 3468 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3469 3470 /* 1G settings */ 3471 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3472 emphasis = (ha->fw_seriallink_options[2] & 3473 (BIT_4 | BIT_3)) >> 3; 3474 tx_sens = ha->fw_seriallink_options[0] & 3475 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3476 rx_sens = (ha->fw_seriallink_options[0] & 3477 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3478 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3479 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3480 if (rx_sens == 0x0) 3481 rx_sens = 0x3; 3482 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3483 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3484 ha->fw_options[10] |= BIT_5 | 3485 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3486 (tx_sens & (BIT_1 | BIT_0)); 3487 3488 /* 2G settings */ 3489 swing = (ha->fw_seriallink_options[2] & 3490 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3491 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3492 tx_sens = ha->fw_seriallink_options[1] & 3493 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3494 rx_sens = (ha->fw_seriallink_options[1] & 3495 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3496 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3497 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3498 if (rx_sens == 0x0) 3499 rx_sens = 0x3; 3500 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3501 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3502 ha->fw_options[11] |= BIT_5 | 3503 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3504 (tx_sens & (BIT_1 | BIT_0)); 3505 } 3506 3507 /* FCP2 options. */ 3508 /* Return command IOCBs without waiting for an ABTS to complete. */ 3509 ha->fw_options[3] |= BIT_13; 3510 3511 /* LED scheme. */ 3512 if (ha->flags.enable_led_scheme) 3513 ha->fw_options[2] |= BIT_12; 3514 3515 /* Detect ISP6312. */ 3516 if (IS_QLA6312(ha)) 3517 ha->fw_options[2] |= BIT_13; 3518 3519 /* Set Retry FLOGI in case of P2P connection */ 3520 if (ha->operating_mode == P2P) { 3521 ha->fw_options[2] |= BIT_3; 3522 ql_dbg(ql_dbg_disc, vha, 0x2100, 3523 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3524 __func__, ha->fw_options[2]); 3525 } 3526 3527 /* Update firmware options. */ 3528 qla2x00_set_fw_options(vha, ha->fw_options); 3529 } 3530 3531 void 3532 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3533 { 3534 int rval; 3535 struct qla_hw_data *ha = vha->hw; 3536 3537 if (IS_P3P_TYPE(ha)) 3538 return; 3539 3540 /* Hold status IOCBs until ABTS response received. */ 3541 if (ql2xfwholdabts) 3542 ha->fw_options[3] |= BIT_12; 3543 3544 /* Set Retry FLOGI in case of P2P connection */ 3545 if (ha->operating_mode == P2P) { 3546 ha->fw_options[2] |= BIT_3; 3547 ql_dbg(ql_dbg_disc, vha, 0x2101, 3548 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3549 __func__, ha->fw_options[2]); 3550 } 3551 3552 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3553 if (ql2xmvasynctoatio && 3554 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3555 if (qla_tgt_mode_enabled(vha) || 3556 qla_dual_mode_enabled(vha)) 3557 ha->fw_options[2] |= BIT_11; 3558 else 3559 ha->fw_options[2] &= ~BIT_11; 3560 } 3561 3562 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3563 /* 3564 * Tell FW to track each exchange to prevent 3565 * driver from using stale exchange. 3566 */ 3567 if (qla_tgt_mode_enabled(vha) || 3568 qla_dual_mode_enabled(vha)) 3569 ha->fw_options[2] |= BIT_4; 3570 else 3571 ha->fw_options[2] &= ~BIT_4; 3572 3573 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3574 if (qla2xuseresexchforels) 3575 ha->fw_options[2] |= BIT_8; 3576 else 3577 ha->fw_options[2] &= ~BIT_8; 3578 } 3579 3580 ql_dbg(ql_dbg_init, vha, 0x00e8, 3581 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3582 __func__, ha->fw_options[1], ha->fw_options[2], 3583 ha->fw_options[3], vha->host->active_mode); 3584 3585 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3586 qla2x00_set_fw_options(vha, ha->fw_options); 3587 3588 /* Update Serial Link options. */ 3589 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3590 return; 3591 3592 rval = qla2x00_set_serdes_params(vha, 3593 le16_to_cpu(ha->fw_seriallink_options24[1]), 3594 le16_to_cpu(ha->fw_seriallink_options24[2]), 3595 le16_to_cpu(ha->fw_seriallink_options24[3])); 3596 if (rval != QLA_SUCCESS) { 3597 ql_log(ql_log_warn, vha, 0x0104, 3598 "Unable to update Serial Link options (%x).\n", rval); 3599 } 3600 } 3601 3602 void 3603 qla2x00_config_rings(struct scsi_qla_host *vha) 3604 { 3605 struct qla_hw_data *ha = vha->hw; 3606 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3607 struct req_que *req = ha->req_q_map[0]; 3608 struct rsp_que *rsp = ha->rsp_q_map[0]; 3609 3610 /* Setup ring parameters in initialization control block. */ 3611 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3612 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3613 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3614 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3615 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3616 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3617 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3618 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3619 3620 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3621 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3622 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3623 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3624 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3625 } 3626 3627 void 3628 qla24xx_config_rings(struct scsi_qla_host *vha) 3629 { 3630 struct qla_hw_data *ha = vha->hw; 3631 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3632 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3633 struct qla_msix_entry *msix; 3634 struct init_cb_24xx *icb; 3635 uint16_t rid = 0; 3636 struct req_que *req = ha->req_q_map[0]; 3637 struct rsp_que *rsp = ha->rsp_q_map[0]; 3638 3639 /* Setup ring parameters in initialization control block. */ 3640 icb = (struct init_cb_24xx *)ha->init_cb; 3641 icb->request_q_outpointer = cpu_to_le16(0); 3642 icb->response_q_inpointer = cpu_to_le16(0); 3643 icb->request_q_length = cpu_to_le16(req->length); 3644 icb->response_q_length = cpu_to_le16(rsp->length); 3645 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3646 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3647 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3648 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3649 3650 /* Setup ATIO queue dma pointers for target mode */ 3651 icb->atio_q_inpointer = cpu_to_le16(0); 3652 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3653 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3654 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3655 3656 if (IS_SHADOW_REG_CAPABLE(ha)) 3657 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3658 3659 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3660 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3661 icb->rid = cpu_to_le16(rid); 3662 if (ha->flags.msix_enabled) { 3663 msix = &ha->msix_entries[1]; 3664 ql_dbg(ql_dbg_init, vha, 0x0019, 3665 "Registering vector 0x%x for base que.\n", 3666 msix->entry); 3667 icb->msix = cpu_to_le16(msix->entry); 3668 } 3669 /* Use alternate PCI bus number */ 3670 if (MSB(rid)) 3671 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3672 /* Use alternate PCI devfn */ 3673 if (LSB(rid)) 3674 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3675 3676 /* Use Disable MSIX Handshake mode for capable adapters */ 3677 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3678 (ha->flags.msix_enabled)) { 3679 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3680 ha->flags.disable_msix_handshake = 1; 3681 ql_dbg(ql_dbg_init, vha, 0x00fe, 3682 "MSIX Handshake Disable Mode turned on.\n"); 3683 } else { 3684 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3685 } 3686 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3687 3688 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3689 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3690 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3691 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3692 } else { 3693 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3694 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3695 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3696 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3697 } 3698 qlt_24xx_config_rings(vha); 3699 3700 /* PCI posting */ 3701 RD_REG_DWORD(&ioreg->hccr); 3702 } 3703 3704 /** 3705 * qla2x00_init_rings() - Initializes firmware. 3706 * @vha: HA context 3707 * 3708 * Beginning of request ring has initialization control block already built 3709 * by nvram config routine. 3710 * 3711 * Returns 0 on success. 3712 */ 3713 int 3714 qla2x00_init_rings(scsi_qla_host_t *vha) 3715 { 3716 int rval; 3717 unsigned long flags = 0; 3718 int cnt, que; 3719 struct qla_hw_data *ha = vha->hw; 3720 struct req_que *req; 3721 struct rsp_que *rsp; 3722 struct mid_init_cb_24xx *mid_init_cb = 3723 (struct mid_init_cb_24xx *) ha->init_cb; 3724 3725 spin_lock_irqsave(&ha->hardware_lock, flags); 3726 3727 /* Clear outstanding commands array. */ 3728 for (que = 0; que < ha->max_req_queues; que++) { 3729 req = ha->req_q_map[que]; 3730 if (!req || !test_bit(que, ha->req_qid_map)) 3731 continue; 3732 req->out_ptr = (void *)(req->ring + req->length); 3733 *req->out_ptr = 0; 3734 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3735 req->outstanding_cmds[cnt] = NULL; 3736 3737 req->current_outstanding_cmd = 1; 3738 3739 /* Initialize firmware. */ 3740 req->ring_ptr = req->ring; 3741 req->ring_index = 0; 3742 req->cnt = req->length; 3743 } 3744 3745 for (que = 0; que < ha->max_rsp_queues; que++) { 3746 rsp = ha->rsp_q_map[que]; 3747 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 3748 continue; 3749 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 3750 *rsp->in_ptr = 0; 3751 /* Initialize response queue entries */ 3752 if (IS_QLAFX00(ha)) 3753 qlafx00_init_response_q_entries(rsp); 3754 else 3755 qla2x00_init_response_q_entries(rsp); 3756 } 3757 3758 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 3759 ha->tgt.atio_ring_index = 0; 3760 /* Initialize ATIO queue entries */ 3761 qlt_init_atio_q_entries(vha); 3762 3763 ha->isp_ops->config_rings(vha); 3764 3765 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3766 3767 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 3768 3769 if (IS_QLAFX00(ha)) { 3770 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 3771 goto next_check; 3772 } 3773 3774 /* Update any ISP specific firmware options before initialization. */ 3775 ha->isp_ops->update_fw_options(vha); 3776 3777 if (ha->flags.npiv_supported) { 3778 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 3779 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 3780 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 3781 } 3782 3783 if (IS_FWI2_CAPABLE(ha)) { 3784 mid_init_cb->options = cpu_to_le16(BIT_1); 3785 mid_init_cb->init_cb.execution_throttle = 3786 cpu_to_le16(ha->cur_fw_xcb_count); 3787 ha->flags.dport_enabled = 3788 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 3789 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 3790 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 3791 /* FA-WWPN Status */ 3792 ha->flags.fawwpn_enabled = 3793 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 3794 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 3795 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 3796 } 3797 3798 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 3799 next_check: 3800 if (rval) { 3801 ql_log(ql_log_fatal, vha, 0x00d2, 3802 "Init Firmware **** FAILED ****.\n"); 3803 } else { 3804 ql_dbg(ql_dbg_init, vha, 0x00d3, 3805 "Init Firmware -- success.\n"); 3806 QLA_FW_STARTED(ha); 3807 } 3808 3809 return (rval); 3810 } 3811 3812 /** 3813 * qla2x00_fw_ready() - Waits for firmware ready. 3814 * @vha: HA context 3815 * 3816 * Returns 0 on success. 3817 */ 3818 static int 3819 qla2x00_fw_ready(scsi_qla_host_t *vha) 3820 { 3821 int rval; 3822 unsigned long wtime, mtime, cs84xx_time; 3823 uint16_t min_wait; /* Minimum wait time if loop is down */ 3824 uint16_t wait_time; /* Wait time if loop is coming ready */ 3825 uint16_t state[6]; 3826 struct qla_hw_data *ha = vha->hw; 3827 3828 if (IS_QLAFX00(vha->hw)) 3829 return qlafx00_fw_ready(vha); 3830 3831 rval = QLA_SUCCESS; 3832 3833 /* Time to wait for loop down */ 3834 if (IS_P3P_TYPE(ha)) 3835 min_wait = 30; 3836 else 3837 min_wait = 20; 3838 3839 /* 3840 * Firmware should take at most one RATOV to login, plus 5 seconds for 3841 * our own processing. 3842 */ 3843 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 3844 wait_time = min_wait; 3845 } 3846 3847 /* Min wait time if loop down */ 3848 mtime = jiffies + (min_wait * HZ); 3849 3850 /* wait time before firmware ready */ 3851 wtime = jiffies + (wait_time * HZ); 3852 3853 /* Wait for ISP to finish LIP */ 3854 if (!vha->flags.init_done) 3855 ql_log(ql_log_info, vha, 0x801e, 3856 "Waiting for LIP to complete.\n"); 3857 3858 do { 3859 memset(state, -1, sizeof(state)); 3860 rval = qla2x00_get_firmware_state(vha, state); 3861 if (rval == QLA_SUCCESS) { 3862 if (state[0] < FSTATE_LOSS_OF_SYNC) { 3863 vha->device_flags &= ~DFLG_NO_CABLE; 3864 } 3865 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 3866 ql_dbg(ql_dbg_taskm, vha, 0x801f, 3867 "fw_state=%x 84xx=%x.\n", state[0], 3868 state[2]); 3869 if ((state[2] & FSTATE_LOGGED_IN) && 3870 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 3871 ql_dbg(ql_dbg_taskm, vha, 0x8028, 3872 "Sending verify iocb.\n"); 3873 3874 cs84xx_time = jiffies; 3875 rval = qla84xx_init_chip(vha); 3876 if (rval != QLA_SUCCESS) { 3877 ql_log(ql_log_warn, 3878 vha, 0x8007, 3879 "Init chip failed.\n"); 3880 break; 3881 } 3882 3883 /* Add time taken to initialize. */ 3884 cs84xx_time = jiffies - cs84xx_time; 3885 wtime += cs84xx_time; 3886 mtime += cs84xx_time; 3887 ql_dbg(ql_dbg_taskm, vha, 0x8008, 3888 "Increasing wait time by %ld. " 3889 "New time %ld.\n", cs84xx_time, 3890 wtime); 3891 } 3892 } else if (state[0] == FSTATE_READY) { 3893 ql_dbg(ql_dbg_taskm, vha, 0x8037, 3894 "F/W Ready - OK.\n"); 3895 3896 qla2x00_get_retry_cnt(vha, &ha->retry_count, 3897 &ha->login_timeout, &ha->r_a_tov); 3898 3899 rval = QLA_SUCCESS; 3900 break; 3901 } 3902 3903 rval = QLA_FUNCTION_FAILED; 3904 3905 if (atomic_read(&vha->loop_down_timer) && 3906 state[0] != FSTATE_READY) { 3907 /* Loop down. Timeout on min_wait for states 3908 * other than Wait for Login. 3909 */ 3910 if (time_after_eq(jiffies, mtime)) { 3911 ql_log(ql_log_info, vha, 0x8038, 3912 "Cable is unplugged...\n"); 3913 3914 vha->device_flags |= DFLG_NO_CABLE; 3915 break; 3916 } 3917 } 3918 } else { 3919 /* Mailbox cmd failed. Timeout on min_wait. */ 3920 if (time_after_eq(jiffies, mtime) || 3921 ha->flags.isp82xx_fw_hung) 3922 break; 3923 } 3924 3925 if (time_after_eq(jiffies, wtime)) 3926 break; 3927 3928 /* Delay for a while */ 3929 msleep(500); 3930 } while (1); 3931 3932 ql_dbg(ql_dbg_taskm, vha, 0x803a, 3933 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 3934 state[1], state[2], state[3], state[4], state[5], jiffies); 3935 3936 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 3937 ql_log(ql_log_warn, vha, 0x803b, 3938 "Firmware ready **** FAILED ****.\n"); 3939 } 3940 3941 return (rval); 3942 } 3943 3944 /* 3945 * qla2x00_configure_hba 3946 * Setup adapter context. 3947 * 3948 * Input: 3949 * ha = adapter state pointer. 3950 * 3951 * Returns: 3952 * 0 = success 3953 * 3954 * Context: 3955 * Kernel context. 3956 */ 3957 static int 3958 qla2x00_configure_hba(scsi_qla_host_t *vha) 3959 { 3960 int rval; 3961 uint16_t loop_id; 3962 uint16_t topo; 3963 uint16_t sw_cap; 3964 uint8_t al_pa; 3965 uint8_t area; 3966 uint8_t domain; 3967 char connect_type[22]; 3968 struct qla_hw_data *ha = vha->hw; 3969 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 3970 port_id_t id; 3971 unsigned long flags; 3972 3973 /* Get host addresses. */ 3974 rval = qla2x00_get_adapter_id(vha, 3975 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 3976 if (rval != QLA_SUCCESS) { 3977 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 3978 IS_CNA_CAPABLE(ha) || 3979 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 3980 ql_dbg(ql_dbg_disc, vha, 0x2008, 3981 "Loop is in a transition state.\n"); 3982 } else { 3983 ql_log(ql_log_warn, vha, 0x2009, 3984 "Unable to get host loop ID.\n"); 3985 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 3986 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 3987 ql_log(ql_log_warn, vha, 0x1151, 3988 "Doing link init.\n"); 3989 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 3990 return rval; 3991 } 3992 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3993 } 3994 return (rval); 3995 } 3996 3997 if (topo == 4) { 3998 ql_log(ql_log_info, vha, 0x200a, 3999 "Cannot get topology - retrying.\n"); 4000 return (QLA_FUNCTION_FAILED); 4001 } 4002 4003 vha->loop_id = loop_id; 4004 4005 /* initialize */ 4006 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4007 ha->operating_mode = LOOP; 4008 ha->switch_cap = 0; 4009 4010 switch (topo) { 4011 case 0: 4012 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4013 ha->current_topology = ISP_CFG_NL; 4014 strcpy(connect_type, "(Loop)"); 4015 break; 4016 4017 case 1: 4018 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4019 ha->switch_cap = sw_cap; 4020 ha->current_topology = ISP_CFG_FL; 4021 strcpy(connect_type, "(FL_Port)"); 4022 break; 4023 4024 case 2: 4025 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4026 ha->operating_mode = P2P; 4027 ha->current_topology = ISP_CFG_N; 4028 strcpy(connect_type, "(N_Port-to-N_Port)"); 4029 break; 4030 4031 case 3: 4032 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4033 ha->switch_cap = sw_cap; 4034 ha->operating_mode = P2P; 4035 ha->current_topology = ISP_CFG_F; 4036 strcpy(connect_type, "(F_Port)"); 4037 break; 4038 4039 default: 4040 ql_dbg(ql_dbg_disc, vha, 0x200f, 4041 "HBA in unknown topology %x, using NL.\n", topo); 4042 ha->current_topology = ISP_CFG_NL; 4043 strcpy(connect_type, "(Loop)"); 4044 break; 4045 } 4046 4047 /* Save Host port and loop ID. */ 4048 /* byte order - Big Endian */ 4049 id.b.domain = domain; 4050 id.b.area = area; 4051 id.b.al_pa = al_pa; 4052 id.b.rsvd_1 = 0; 4053 spin_lock_irqsave(&ha->hardware_lock, flags); 4054 qlt_update_host_map(vha, id); 4055 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4056 4057 if (!vha->flags.init_done) 4058 ql_log(ql_log_info, vha, 0x2010, 4059 "Topology - %s, Host Loop address 0x%x.\n", 4060 connect_type, vha->loop_id); 4061 4062 return(rval); 4063 } 4064 4065 inline void 4066 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4067 char *def) 4068 { 4069 char *st, *en; 4070 uint16_t index; 4071 struct qla_hw_data *ha = vha->hw; 4072 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4073 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4074 4075 if (memcmp(model, BINZERO, len) != 0) { 4076 strncpy(ha->model_number, model, len); 4077 st = en = ha->model_number; 4078 en += len - 1; 4079 while (en > st) { 4080 if (*en != 0x20 && *en != 0x00) 4081 break; 4082 *en-- = '\0'; 4083 } 4084 4085 index = (ha->pdev->subsystem_device & 0xff); 4086 if (use_tbl && 4087 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4088 index < QLA_MODEL_NAMES) 4089 strncpy(ha->model_desc, 4090 qla2x00_model_name[index * 2 + 1], 4091 sizeof(ha->model_desc) - 1); 4092 } else { 4093 index = (ha->pdev->subsystem_device & 0xff); 4094 if (use_tbl && 4095 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4096 index < QLA_MODEL_NAMES) { 4097 strcpy(ha->model_number, 4098 qla2x00_model_name[index * 2]); 4099 strncpy(ha->model_desc, 4100 qla2x00_model_name[index * 2 + 1], 4101 sizeof(ha->model_desc) - 1); 4102 } else { 4103 strcpy(ha->model_number, def); 4104 } 4105 } 4106 if (IS_FWI2_CAPABLE(ha)) 4107 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4108 sizeof(ha->model_desc)); 4109 } 4110 4111 /* On sparc systems, obtain port and node WWN from firmware 4112 * properties. 4113 */ 4114 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4115 { 4116 #ifdef CONFIG_SPARC 4117 struct qla_hw_data *ha = vha->hw; 4118 struct pci_dev *pdev = ha->pdev; 4119 struct device_node *dp = pci_device_to_OF_node(pdev); 4120 const u8 *val; 4121 int len; 4122 4123 val = of_get_property(dp, "port-wwn", &len); 4124 if (val && len >= WWN_SIZE) 4125 memcpy(nv->port_name, val, WWN_SIZE); 4126 4127 val = of_get_property(dp, "node-wwn", &len); 4128 if (val && len >= WWN_SIZE) 4129 memcpy(nv->node_name, val, WWN_SIZE); 4130 #endif 4131 } 4132 4133 /* 4134 * NVRAM configuration for ISP 2xxx 4135 * 4136 * Input: 4137 * ha = adapter block pointer. 4138 * 4139 * Output: 4140 * initialization control block in response_ring 4141 * host adapters parameters in host adapter block 4142 * 4143 * Returns: 4144 * 0 = success. 4145 */ 4146 int 4147 qla2x00_nvram_config(scsi_qla_host_t *vha) 4148 { 4149 int rval; 4150 uint8_t chksum = 0; 4151 uint16_t cnt; 4152 uint8_t *dptr1, *dptr2; 4153 struct qla_hw_data *ha = vha->hw; 4154 init_cb_t *icb = ha->init_cb; 4155 nvram_t *nv = ha->nvram; 4156 uint8_t *ptr = ha->nvram; 4157 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4158 4159 rval = QLA_SUCCESS; 4160 4161 /* Determine NVRAM starting address. */ 4162 ha->nvram_size = sizeof(nvram_t); 4163 ha->nvram_base = 0; 4164 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4165 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4166 ha->nvram_base = 0x80; 4167 4168 /* Get NVRAM data and calculate checksum. */ 4169 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4170 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4171 chksum += *ptr++; 4172 4173 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4174 "Contents of NVRAM.\n"); 4175 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4176 (uint8_t *)nv, ha->nvram_size); 4177 4178 /* Bad NVRAM data, set defaults parameters. */ 4179 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4180 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4181 /* Reset NVRAM data. */ 4182 ql_log(ql_log_warn, vha, 0x0064, 4183 "Inconsistent NVRAM " 4184 "detected: checksum=0x%x id=%c version=0x%x.\n", 4185 chksum, nv->id[0], nv->nvram_version); 4186 ql_log(ql_log_warn, vha, 0x0065, 4187 "Falling back to " 4188 "functioning (yet invalid -- WWPN) defaults.\n"); 4189 4190 /* 4191 * Set default initialization control block. 4192 */ 4193 memset(nv, 0, ha->nvram_size); 4194 nv->parameter_block_version = ICB_VERSION; 4195 4196 if (IS_QLA23XX(ha)) { 4197 nv->firmware_options[0] = BIT_2 | BIT_1; 4198 nv->firmware_options[1] = BIT_7 | BIT_5; 4199 nv->add_firmware_options[0] = BIT_5; 4200 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4201 nv->frame_payload_size = 2048; 4202 nv->special_options[1] = BIT_7; 4203 } else if (IS_QLA2200(ha)) { 4204 nv->firmware_options[0] = BIT_2 | BIT_1; 4205 nv->firmware_options[1] = BIT_7 | BIT_5; 4206 nv->add_firmware_options[0] = BIT_5; 4207 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4208 nv->frame_payload_size = 1024; 4209 } else if (IS_QLA2100(ha)) { 4210 nv->firmware_options[0] = BIT_3 | BIT_1; 4211 nv->firmware_options[1] = BIT_5; 4212 nv->frame_payload_size = 1024; 4213 } 4214 4215 nv->max_iocb_allocation = cpu_to_le16(256); 4216 nv->execution_throttle = cpu_to_le16(16); 4217 nv->retry_count = 8; 4218 nv->retry_delay = 1; 4219 4220 nv->port_name[0] = 33; 4221 nv->port_name[3] = 224; 4222 nv->port_name[4] = 139; 4223 4224 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4225 4226 nv->login_timeout = 4; 4227 4228 /* 4229 * Set default host adapter parameters 4230 */ 4231 nv->host_p[1] = BIT_2; 4232 nv->reset_delay = 5; 4233 nv->port_down_retry_count = 8; 4234 nv->max_luns_per_target = cpu_to_le16(8); 4235 nv->link_down_timeout = 60; 4236 4237 rval = 1; 4238 } 4239 4240 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4241 /* 4242 * The SN2 does not provide BIOS emulation which means you can't change 4243 * potentially bogus BIOS settings. Force the use of default settings 4244 * for link rate and frame size. Hope that the rest of the settings 4245 * are valid. 4246 */ 4247 if (ia64_platform_is("sn2")) { 4248 nv->frame_payload_size = 2048; 4249 if (IS_QLA23XX(ha)) 4250 nv->special_options[1] = BIT_7; 4251 } 4252 #endif 4253 4254 /* Reset Initialization control block */ 4255 memset(icb, 0, ha->init_cb_size); 4256 4257 /* 4258 * Setup driver NVRAM options. 4259 */ 4260 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4261 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4262 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4263 nv->firmware_options[1] &= ~BIT_4; 4264 4265 if (IS_QLA23XX(ha)) { 4266 nv->firmware_options[0] |= BIT_2; 4267 nv->firmware_options[0] &= ~BIT_3; 4268 nv->special_options[0] &= ~BIT_6; 4269 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4270 4271 if (IS_QLA2300(ha)) { 4272 if (ha->fb_rev == FPM_2310) { 4273 strcpy(ha->model_number, "QLA2310"); 4274 } else { 4275 strcpy(ha->model_number, "QLA2300"); 4276 } 4277 } else { 4278 qla2x00_set_model_info(vha, nv->model_number, 4279 sizeof(nv->model_number), "QLA23xx"); 4280 } 4281 } else if (IS_QLA2200(ha)) { 4282 nv->firmware_options[0] |= BIT_2; 4283 /* 4284 * 'Point-to-point preferred, else loop' is not a safe 4285 * connection mode setting. 4286 */ 4287 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4288 (BIT_5 | BIT_4)) { 4289 /* Force 'loop preferred, else point-to-point'. */ 4290 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4291 nv->add_firmware_options[0] |= BIT_5; 4292 } 4293 strcpy(ha->model_number, "QLA22xx"); 4294 } else /*if (IS_QLA2100(ha))*/ { 4295 strcpy(ha->model_number, "QLA2100"); 4296 } 4297 4298 /* 4299 * Copy over NVRAM RISC parameter block to initialization control block. 4300 */ 4301 dptr1 = (uint8_t *)icb; 4302 dptr2 = (uint8_t *)&nv->parameter_block_version; 4303 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4304 while (cnt--) 4305 *dptr1++ = *dptr2++; 4306 4307 /* Copy 2nd half. */ 4308 dptr1 = (uint8_t *)icb->add_firmware_options; 4309 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4310 while (cnt--) 4311 *dptr1++ = *dptr2++; 4312 4313 /* Use alternate WWN? */ 4314 if (nv->host_p[1] & BIT_7) { 4315 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4316 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4317 } 4318 4319 /* Prepare nodename */ 4320 if ((icb->firmware_options[1] & BIT_6) == 0) { 4321 /* 4322 * Firmware will apply the following mask if the nodename was 4323 * not provided. 4324 */ 4325 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4326 icb->node_name[0] &= 0xF0; 4327 } 4328 4329 /* 4330 * Set host adapter parameters. 4331 */ 4332 4333 /* 4334 * BIT_7 in the host-parameters section allows for modification to 4335 * internal driver logging. 4336 */ 4337 if (nv->host_p[0] & BIT_7) 4338 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4339 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4340 /* Always load RISC code on non ISP2[12]00 chips. */ 4341 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4342 ha->flags.disable_risc_code_load = 0; 4343 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4344 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4345 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4346 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4347 ha->flags.disable_serdes = 0; 4348 4349 ha->operating_mode = 4350 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4351 4352 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4353 sizeof(ha->fw_seriallink_options)); 4354 4355 /* save HBA serial number */ 4356 ha->serial0 = icb->port_name[5]; 4357 ha->serial1 = icb->port_name[6]; 4358 ha->serial2 = icb->port_name[7]; 4359 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4360 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4361 4362 icb->execution_throttle = cpu_to_le16(0xFFFF); 4363 4364 ha->retry_count = nv->retry_count; 4365 4366 /* Set minimum login_timeout to 4 seconds. */ 4367 if (nv->login_timeout != ql2xlogintimeout) 4368 nv->login_timeout = ql2xlogintimeout; 4369 if (nv->login_timeout < 4) 4370 nv->login_timeout = 4; 4371 ha->login_timeout = nv->login_timeout; 4372 4373 /* Set minimum RATOV to 100 tenths of a second. */ 4374 ha->r_a_tov = 100; 4375 4376 ha->loop_reset_delay = nv->reset_delay; 4377 4378 /* Link Down Timeout = 0: 4379 * 4380 * When Port Down timer expires we will start returning 4381 * I/O's to OS with "DID_NO_CONNECT". 4382 * 4383 * Link Down Timeout != 0: 4384 * 4385 * The driver waits for the link to come up after link down 4386 * before returning I/Os to OS with "DID_NO_CONNECT". 4387 */ 4388 if (nv->link_down_timeout == 0) { 4389 ha->loop_down_abort_time = 4390 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4391 } else { 4392 ha->link_down_timeout = nv->link_down_timeout; 4393 ha->loop_down_abort_time = 4394 (LOOP_DOWN_TIME - ha->link_down_timeout); 4395 } 4396 4397 /* 4398 * Need enough time to try and get the port back. 4399 */ 4400 ha->port_down_retry_count = nv->port_down_retry_count; 4401 if (qlport_down_retry) 4402 ha->port_down_retry_count = qlport_down_retry; 4403 /* Set login_retry_count */ 4404 ha->login_retry_count = nv->retry_count; 4405 if (ha->port_down_retry_count == nv->port_down_retry_count && 4406 ha->port_down_retry_count > 3) 4407 ha->login_retry_count = ha->port_down_retry_count; 4408 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4409 ha->login_retry_count = ha->port_down_retry_count; 4410 if (ql2xloginretrycount) 4411 ha->login_retry_count = ql2xloginretrycount; 4412 4413 icb->lun_enables = cpu_to_le16(0); 4414 icb->command_resource_count = 0; 4415 icb->immediate_notify_resource_count = 0; 4416 icb->timeout = cpu_to_le16(0); 4417 4418 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4419 /* Enable RIO */ 4420 icb->firmware_options[0] &= ~BIT_3; 4421 icb->add_firmware_options[0] &= 4422 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4423 icb->add_firmware_options[0] |= BIT_2; 4424 icb->response_accumulation_timer = 3; 4425 icb->interrupt_delay_timer = 5; 4426 4427 vha->flags.process_response_queue = 1; 4428 } else { 4429 /* Enable ZIO. */ 4430 if (!vha->flags.init_done) { 4431 ha->zio_mode = icb->add_firmware_options[0] & 4432 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4433 ha->zio_timer = icb->interrupt_delay_timer ? 4434 icb->interrupt_delay_timer: 2; 4435 } 4436 icb->add_firmware_options[0] &= 4437 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4438 vha->flags.process_response_queue = 0; 4439 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4440 ha->zio_mode = QLA_ZIO_MODE_6; 4441 4442 ql_log(ql_log_info, vha, 0x0068, 4443 "ZIO mode %d enabled; timer delay (%d us).\n", 4444 ha->zio_mode, ha->zio_timer * 100); 4445 4446 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4447 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4448 vha->flags.process_response_queue = 1; 4449 } 4450 } 4451 4452 if (rval) { 4453 ql_log(ql_log_warn, vha, 0x0069, 4454 "NVRAM configuration failed.\n"); 4455 } 4456 return (rval); 4457 } 4458 4459 static void 4460 qla2x00_rport_del(void *data) 4461 { 4462 fc_port_t *fcport = data; 4463 struct fc_rport *rport; 4464 unsigned long flags; 4465 4466 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4467 rport = fcport->drport ? fcport->drport: fcport->rport; 4468 fcport->drport = NULL; 4469 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4470 if (rport) { 4471 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4472 "%s %8phN. rport %p roles %x\n", 4473 __func__, fcport->port_name, rport, 4474 rport->roles); 4475 4476 fc_remote_port_delete(rport); 4477 } 4478 } 4479 4480 /** 4481 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4482 * @vha: HA context 4483 * @flags: allocation flags 4484 * 4485 * Returns a pointer to the allocated fcport, or NULL, if none available. 4486 */ 4487 fc_port_t * 4488 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4489 { 4490 fc_port_t *fcport; 4491 4492 fcport = kzalloc(sizeof(fc_port_t), flags); 4493 if (!fcport) 4494 return NULL; 4495 4496 /* Setup fcport template structure. */ 4497 fcport->vha = vha; 4498 fcport->port_type = FCT_UNKNOWN; 4499 fcport->loop_id = FC_NO_LOOP_ID; 4500 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4501 fcport->supported_classes = FC_COS_UNSPECIFIED; 4502 4503 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4504 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4505 flags); 4506 fcport->disc_state = DSC_DELETED; 4507 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4508 fcport->deleted = QLA_SESS_DELETED; 4509 fcport->login_retry = vha->hw->login_retry_count; 4510 fcport->logout_on_delete = 1; 4511 4512 if (!fcport->ct_desc.ct_sns) { 4513 ql_log(ql_log_warn, vha, 0xd049, 4514 "Failed to allocate ct_sns request.\n"); 4515 kfree(fcport); 4516 fcport = NULL; 4517 } 4518 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4519 INIT_LIST_HEAD(&fcport->gnl_entry); 4520 INIT_LIST_HEAD(&fcport->list); 4521 4522 return fcport; 4523 } 4524 4525 void 4526 qla2x00_free_fcport(fc_port_t *fcport) 4527 { 4528 if (fcport->ct_desc.ct_sns) { 4529 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4530 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4531 fcport->ct_desc.ct_sns_dma); 4532 4533 fcport->ct_desc.ct_sns = NULL; 4534 } 4535 kfree(fcport); 4536 } 4537 4538 /* 4539 * qla2x00_configure_loop 4540 * Updates Fibre Channel Device Database with what is actually on loop. 4541 * 4542 * Input: 4543 * ha = adapter block pointer. 4544 * 4545 * Returns: 4546 * 0 = success. 4547 * 1 = error. 4548 * 2 = database was full and device was not configured. 4549 */ 4550 static int 4551 qla2x00_configure_loop(scsi_qla_host_t *vha) 4552 { 4553 int rval; 4554 unsigned long flags, save_flags; 4555 struct qla_hw_data *ha = vha->hw; 4556 rval = QLA_SUCCESS; 4557 4558 /* Get Initiator ID */ 4559 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4560 rval = qla2x00_configure_hba(vha); 4561 if (rval != QLA_SUCCESS) { 4562 ql_dbg(ql_dbg_disc, vha, 0x2013, 4563 "Unable to configure HBA.\n"); 4564 return (rval); 4565 } 4566 } 4567 4568 save_flags = flags = vha->dpc_flags; 4569 ql_dbg(ql_dbg_disc, vha, 0x2014, 4570 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4571 4572 /* 4573 * If we have both an RSCN and PORT UPDATE pending then handle them 4574 * both at the same time. 4575 */ 4576 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4577 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4578 4579 qla2x00_get_data_rate(vha); 4580 4581 /* Determine what we need to do */ 4582 if (ha->current_topology == ISP_CFG_FL && 4583 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4584 4585 set_bit(RSCN_UPDATE, &flags); 4586 4587 } else if (ha->current_topology == ISP_CFG_F && 4588 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4589 4590 set_bit(RSCN_UPDATE, &flags); 4591 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4592 4593 } else if (ha->current_topology == ISP_CFG_N) { 4594 clear_bit(RSCN_UPDATE, &flags); 4595 if (ha->flags.rida_fmt2) { 4596 /* With Rida Format 2, the login is already triggered. 4597 * We know who is on the other side of the wire. 4598 * No need to login to do login to find out or drop into 4599 * qla2x00_configure_local_loop(). 4600 */ 4601 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4602 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4603 } else { 4604 if (qla_tgt_mode_enabled(vha)) { 4605 /* allow the other side to start the login */ 4606 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4607 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4608 } 4609 } 4610 } else if (ha->current_topology == ISP_CFG_NL) { 4611 clear_bit(RSCN_UPDATE, &flags); 4612 set_bit(LOCAL_LOOP_UPDATE, &flags); 4613 } else if (!vha->flags.online || 4614 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4615 set_bit(RSCN_UPDATE, &flags); 4616 set_bit(LOCAL_LOOP_UPDATE, &flags); 4617 } 4618 4619 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4620 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4621 ql_dbg(ql_dbg_disc, vha, 0x2015, 4622 "Loop resync needed, failing.\n"); 4623 rval = QLA_FUNCTION_FAILED; 4624 } else 4625 rval = qla2x00_configure_local_loop(vha); 4626 } 4627 4628 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4629 if (LOOP_TRANSITION(vha)) { 4630 ql_dbg(ql_dbg_disc, vha, 0x2099, 4631 "Needs RSCN update and loop transition.\n"); 4632 rval = QLA_FUNCTION_FAILED; 4633 } 4634 else 4635 rval = qla2x00_configure_fabric(vha); 4636 } 4637 4638 if (rval == QLA_SUCCESS) { 4639 if (atomic_read(&vha->loop_down_timer) || 4640 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4641 rval = QLA_FUNCTION_FAILED; 4642 } else { 4643 atomic_set(&vha->loop_state, LOOP_READY); 4644 ql_dbg(ql_dbg_disc, vha, 0x2069, 4645 "LOOP READY.\n"); 4646 ha->flags.fw_init_done = 1; 4647 4648 /* 4649 * Process any ATIO queue entries that came in 4650 * while we weren't online. 4651 */ 4652 if (qla_tgt_mode_enabled(vha) || 4653 qla_dual_mode_enabled(vha)) { 4654 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) { 4655 spin_lock_irqsave(&ha->tgt.atio_lock, 4656 flags); 4657 qlt_24xx_process_atio_queue(vha, 0); 4658 spin_unlock_irqrestore( 4659 &ha->tgt.atio_lock, flags); 4660 } else { 4661 spin_lock_irqsave(&ha->hardware_lock, 4662 flags); 4663 qlt_24xx_process_atio_queue(vha, 1); 4664 spin_unlock_irqrestore( 4665 &ha->hardware_lock, flags); 4666 } 4667 } 4668 } 4669 } 4670 4671 if (rval) { 4672 ql_dbg(ql_dbg_disc, vha, 0x206a, 4673 "%s *** FAILED ***.\n", __func__); 4674 } else { 4675 ql_dbg(ql_dbg_disc, vha, 0x206b, 4676 "%s: exiting normally.\n", __func__); 4677 } 4678 4679 /* Restore state if a resync event occurred during processing */ 4680 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4681 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4682 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4683 if (test_bit(RSCN_UPDATE, &save_flags)) { 4684 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4685 } 4686 } 4687 4688 return (rval); 4689 } 4690 4691 /* 4692 * N2N Login 4693 * Updates Fibre Channel Device Database with local loop devices. 4694 * 4695 * Input: 4696 * ha = adapter block pointer. 4697 * 4698 * Returns: 4699 */ 4700 static int qla24xx_n2n_handle_login(struct scsi_qla_host *vha, 4701 fc_port_t *fcport) 4702 { 4703 struct qla_hw_data *ha = vha->hw; 4704 int res = QLA_SUCCESS, rval; 4705 int greater_wwpn = 0; 4706 int logged_in = 0; 4707 4708 if (ha->current_topology != ISP_CFG_N) 4709 return res; 4710 4711 if (wwn_to_u64(vha->port_name) > 4712 wwn_to_u64(vha->n2n_port_name)) { 4713 ql_dbg(ql_dbg_disc, vha, 0x2002, 4714 "HBA WWPN is greater %llx > target %llx\n", 4715 wwn_to_u64(vha->port_name), 4716 wwn_to_u64(vha->n2n_port_name)); 4717 greater_wwpn = 1; 4718 fcport->d_id.b24 = vha->n2n_id; 4719 } 4720 4721 fcport->loop_id = vha->loop_id; 4722 fcport->fc4f_nvme = 0; 4723 fcport->query = 1; 4724 4725 ql_dbg(ql_dbg_disc, vha, 0x4001, 4726 "Initiate N2N login handler: HBA port_id=%06x loopid=%d\n", 4727 fcport->d_id.b24, vha->loop_id); 4728 4729 /* Fill in member data. */ 4730 if (!greater_wwpn) { 4731 rval = qla2x00_get_port_database(vha, fcport, 0); 4732 ql_dbg(ql_dbg_disc, vha, 0x1051, 4733 "Remote login-state (%x/%x) port_id=%06x loop_id=%x, rval=%d\n", 4734 fcport->current_login_state, fcport->last_login_state, 4735 fcport->d_id.b24, fcport->loop_id, rval); 4736 4737 if (((fcport->current_login_state & 0xf) == 0x4) || 4738 ((fcport->current_login_state & 0xf) == 0x6)) 4739 logged_in = 1; 4740 } 4741 4742 if (logged_in || greater_wwpn) { 4743 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 4744 qla_nvme_register_hba(vha); 4745 4746 /* Set connected N_Port d_id */ 4747 if (vha->flags.nvme_enabled) 4748 fcport->fc4f_nvme = 1; 4749 4750 fcport->scan_state = QLA_FCPORT_FOUND; 4751 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4752 fcport->disc_state = DSC_GNL; 4753 fcport->n2n_flag = 1; 4754 fcport->flags = 3; 4755 vha->hw->flags.gpsc_supported = 0; 4756 4757 if (greater_wwpn) { 4758 ql_dbg(ql_dbg_disc, vha, 0x20e5, 4759 "%s %d PLOGI ELS %8phC\n", 4760 __func__, __LINE__, fcport->port_name); 4761 4762 res = qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI, 4763 fcport, fcport->d_id); 4764 } 4765 4766 if (res != QLA_SUCCESS) { 4767 ql_log(ql_log_info, vha, 0xd04d, 4768 "PLOGI Failed: portid=%06x - retrying\n", 4769 fcport->d_id.b24); 4770 res = QLA_SUCCESS; 4771 } else { 4772 /* State 0x6 means FCP PRLI complete */ 4773 if ((fcport->current_login_state & 0xf) == 0x6) { 4774 ql_dbg(ql_dbg_disc, vha, 0x2118, 4775 "%s %d %8phC post GPDB work\n", 4776 __func__, __LINE__, fcport->port_name); 4777 fcport->chip_reset = 4778 vha->hw->base_qpair->chip_reset; 4779 qla24xx_post_gpdb_work(vha, fcport, 0); 4780 } else { 4781 ql_dbg(ql_dbg_disc, vha, 0x2118, 4782 "%s %d %8phC post NVMe PRLI\n", 4783 __func__, __LINE__, fcport->port_name); 4784 qla24xx_post_prli_work(vha, fcport); 4785 } 4786 } 4787 } else { 4788 /* Wait for next database change */ 4789 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags); 4790 } 4791 4792 return res; 4793 } 4794 4795 /* 4796 * qla2x00_configure_local_loop 4797 * Updates Fibre Channel Device Database with local loop devices. 4798 * 4799 * Input: 4800 * ha = adapter block pointer. 4801 * 4802 * Returns: 4803 * 0 = success. 4804 */ 4805 static int 4806 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4807 { 4808 int rval, rval2; 4809 int found_devs; 4810 int found; 4811 fc_port_t *fcport, *new_fcport; 4812 4813 uint16_t index; 4814 uint16_t entries; 4815 char *id_iter; 4816 uint16_t loop_id; 4817 uint8_t domain, area, al_pa; 4818 struct qla_hw_data *ha = vha->hw; 4819 unsigned long flags; 4820 4821 found_devs = 0; 4822 new_fcport = NULL; 4823 entries = MAX_FIBRE_DEVICES_LOOP; 4824 4825 /* Get list of logged in devices. */ 4826 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4827 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4828 &entries); 4829 if (rval != QLA_SUCCESS) 4830 goto cleanup_allocation; 4831 4832 ql_dbg(ql_dbg_disc, vha, 0x2011, 4833 "Entries in ID list (%d).\n", entries); 4834 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 4835 (uint8_t *)ha->gid_list, 4836 entries * sizeof(struct gid_list_info)); 4837 4838 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4839 fcport->scan_state = QLA_FCPORT_SCAN; 4840 } 4841 4842 /* Allocate temporary fcport for any new fcports discovered. */ 4843 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4844 if (new_fcport == NULL) { 4845 ql_log(ql_log_warn, vha, 0x2012, 4846 "Memory allocation failed for fcport.\n"); 4847 rval = QLA_MEMORY_ALLOC_FAILED; 4848 goto cleanup_allocation; 4849 } 4850 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4851 4852 /* Inititae N2N login. */ 4853 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4854 rval = qla24xx_n2n_handle_login(vha, new_fcport); 4855 if (rval != QLA_SUCCESS) 4856 goto cleanup_allocation; 4857 return QLA_SUCCESS; 4858 } 4859 4860 /* Add devices to port list. */ 4861 id_iter = (char *)ha->gid_list; 4862 for (index = 0; index < entries; index++) { 4863 domain = ((struct gid_list_info *)id_iter)->domain; 4864 area = ((struct gid_list_info *)id_iter)->area; 4865 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 4866 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4867 loop_id = (uint16_t) 4868 ((struct gid_list_info *)id_iter)->loop_id_2100; 4869 else 4870 loop_id = le16_to_cpu( 4871 ((struct gid_list_info *)id_iter)->loop_id); 4872 id_iter += ha->gid_list_info_size; 4873 4874 /* Bypass reserved domain fields. */ 4875 if ((domain & 0xf0) == 0xf0) 4876 continue; 4877 4878 /* Bypass if not same domain and area of adapter. */ 4879 if (area && domain && 4880 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 4881 continue; 4882 4883 /* Bypass invalid local loop ID. */ 4884 if (loop_id > LAST_LOCAL_LOOP_ID) 4885 continue; 4886 4887 memset(new_fcport->port_name, 0, WWN_SIZE); 4888 4889 /* Fill in member data. */ 4890 new_fcport->d_id.b.domain = domain; 4891 new_fcport->d_id.b.area = area; 4892 new_fcport->d_id.b.al_pa = al_pa; 4893 new_fcport->loop_id = loop_id; 4894 new_fcport->scan_state = QLA_FCPORT_FOUND; 4895 4896 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 4897 if (rval2 != QLA_SUCCESS) { 4898 ql_dbg(ql_dbg_disc, vha, 0x2097, 4899 "Failed to retrieve fcport information " 4900 "-- get_port_database=%x, loop_id=0x%04x.\n", 4901 rval2, new_fcport->loop_id); 4902 /* Skip retry if N2N */ 4903 if (ha->current_topology != ISP_CFG_N) { 4904 ql_dbg(ql_dbg_disc, vha, 0x2105, 4905 "Scheduling resync.\n"); 4906 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4907 continue; 4908 } 4909 } 4910 4911 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4912 /* Check for matching device in port list. */ 4913 found = 0; 4914 fcport = NULL; 4915 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4916 if (memcmp(new_fcport->port_name, fcport->port_name, 4917 WWN_SIZE)) 4918 continue; 4919 4920 fcport->flags &= ~FCF_FABRIC_DEVICE; 4921 fcport->loop_id = new_fcport->loop_id; 4922 fcport->port_type = new_fcport->port_type; 4923 fcport->d_id.b24 = new_fcport->d_id.b24; 4924 memcpy(fcport->node_name, new_fcport->node_name, 4925 WWN_SIZE); 4926 fcport->scan_state = QLA_FCPORT_FOUND; 4927 found++; 4928 break; 4929 } 4930 4931 if (!found) { 4932 /* New device, add to fcports list. */ 4933 list_add_tail(&new_fcport->list, &vha->vp_fcports); 4934 4935 /* Allocate a new replacement fcport. */ 4936 fcport = new_fcport; 4937 4938 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4939 4940 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4941 4942 if (new_fcport == NULL) { 4943 ql_log(ql_log_warn, vha, 0xd031, 4944 "Failed to allocate memory for fcport.\n"); 4945 rval = QLA_MEMORY_ALLOC_FAILED; 4946 goto cleanup_allocation; 4947 } 4948 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4949 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4950 } 4951 4952 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4953 4954 /* Base iIDMA settings on HBA port speed. */ 4955 fcport->fp_speed = ha->link_data_rate; 4956 4957 found_devs++; 4958 } 4959 4960 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4961 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 4962 break; 4963 4964 if (fcport->scan_state == QLA_FCPORT_SCAN) { 4965 if ((qla_dual_mode_enabled(vha) || 4966 qla_ini_mode_enabled(vha)) && 4967 atomic_read(&fcport->state) == FCS_ONLINE) { 4968 qla2x00_mark_device_lost(vha, fcport, 4969 ql2xplogiabsentdevice, 0); 4970 if (fcport->loop_id != FC_NO_LOOP_ID && 4971 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 4972 fcport->port_type != FCT_INITIATOR && 4973 fcport->port_type != FCT_BROADCAST) { 4974 ql_dbg(ql_dbg_disc, vha, 0x20f0, 4975 "%s %d %8phC post del sess\n", 4976 __func__, __LINE__, 4977 fcport->port_name); 4978 4979 qlt_schedule_sess_for_deletion(fcport); 4980 continue; 4981 } 4982 } 4983 } 4984 4985 if (fcport->scan_state == QLA_FCPORT_FOUND) 4986 qla24xx_fcport_handle_login(vha, fcport); 4987 } 4988 4989 cleanup_allocation: 4990 kfree(new_fcport); 4991 4992 if (rval != QLA_SUCCESS) { 4993 ql_dbg(ql_dbg_disc, vha, 0x2098, 4994 "Configure local loop error exit: rval=%x.\n", rval); 4995 } 4996 4997 return (rval); 4998 } 4999 5000 static void 5001 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5002 { 5003 int rval; 5004 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5005 struct qla_hw_data *ha = vha->hw; 5006 5007 if (!IS_IIDMA_CAPABLE(ha)) 5008 return; 5009 5010 if (atomic_read(&fcport->state) != FCS_ONLINE) 5011 return; 5012 5013 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5014 fcport->fp_speed > ha->link_data_rate || 5015 !ha->flags.gpsc_supported) 5016 return; 5017 5018 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5019 mb); 5020 if (rval != QLA_SUCCESS) { 5021 ql_dbg(ql_dbg_disc, vha, 0x2004, 5022 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5023 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5024 } else { 5025 ql_dbg(ql_dbg_disc, vha, 0x2005, 5026 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5027 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5028 fcport->fp_speed, fcport->port_name); 5029 } 5030 } 5031 5032 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5033 { 5034 qla2x00_iidma_fcport(vha, fcport); 5035 qla24xx_update_fcport_fcp_prio(vha, fcport); 5036 } 5037 5038 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5039 { 5040 struct qla_work_evt *e; 5041 5042 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5043 if (!e) 5044 return QLA_FUNCTION_FAILED; 5045 5046 e->u.fcport.fcport = fcport; 5047 return qla2x00_post_work(vha, e); 5048 } 5049 5050 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5051 static void 5052 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5053 { 5054 struct fc_rport_identifiers rport_ids; 5055 struct fc_rport *rport; 5056 unsigned long flags; 5057 5058 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5059 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5060 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5061 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5062 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5063 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5064 if (!rport) { 5065 ql_log(ql_log_warn, vha, 0x2006, 5066 "Unable to allocate fc remote port.\n"); 5067 return; 5068 } 5069 5070 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5071 *((fc_port_t **)rport->dd_data) = fcport; 5072 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5073 5074 rport->supported_classes = fcport->supported_classes; 5075 5076 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5077 if (fcport->port_type == FCT_INITIATOR) 5078 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5079 if (fcport->port_type == FCT_TARGET) 5080 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5081 5082 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5083 "%s %8phN. rport %p is %s mode\n", 5084 __func__, fcport->port_name, rport, 5085 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5086 5087 fc_remote_port_rolechg(rport, rport_ids.roles); 5088 } 5089 5090 /* 5091 * qla2x00_update_fcport 5092 * Updates device on list. 5093 * 5094 * Input: 5095 * ha = adapter block pointer. 5096 * fcport = port structure pointer. 5097 * 5098 * Return: 5099 * 0 - Success 5100 * BIT_0 - error 5101 * 5102 * Context: 5103 * Kernel context. 5104 */ 5105 void 5106 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5107 { 5108 fcport->vha = vha; 5109 5110 if (IS_SW_RESV_ADDR(fcport->d_id)) 5111 return; 5112 5113 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5114 __func__, fcport->port_name); 5115 5116 if (IS_QLAFX00(vha->hw)) { 5117 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5118 } else { 5119 fcport->login_retry = 0; 5120 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5121 fcport->disc_state = DSC_LOGIN_COMPLETE; 5122 fcport->deleted = 0; 5123 fcport->logout_on_delete = 1; 5124 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5125 } 5126 5127 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5128 qla2x00_iidma_fcport(vha, fcport); 5129 5130 if (fcport->fc4f_nvme) { 5131 qla_nvme_register_remote(vha, fcport); 5132 return; 5133 } 5134 5135 qla24xx_update_fcport_fcp_prio(vha, fcport); 5136 5137 switch (vha->host->active_mode) { 5138 case MODE_INITIATOR: 5139 qla2x00_reg_remote_port(vha, fcport); 5140 break; 5141 case MODE_TARGET: 5142 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5143 !vha->vha_tgt.qla_tgt->tgt_stopped) 5144 qlt_fc_port_added(vha, fcport); 5145 break; 5146 case MODE_DUAL: 5147 qla2x00_reg_remote_port(vha, fcport); 5148 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5149 !vha->vha_tgt.qla_tgt->tgt_stopped) 5150 qlt_fc_port_added(vha, fcport); 5151 break; 5152 default: 5153 break; 5154 } 5155 5156 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5157 if (fcport->id_changed) { 5158 fcport->id_changed = 0; 5159 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5160 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5161 __func__, __LINE__, fcport->port_name, 5162 vha->fcport_count); 5163 qla24xx_post_gfpnid_work(vha, fcport); 5164 } else { 5165 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5166 "%s %d %8phC post gpsc fcp_cnt %d\n", 5167 __func__, __LINE__, fcport->port_name, 5168 vha->fcport_count); 5169 qla24xx_post_gpsc_work(vha, fcport); 5170 } 5171 } 5172 } 5173 5174 /* 5175 * qla2x00_configure_fabric 5176 * Setup SNS devices with loop ID's. 5177 * 5178 * Input: 5179 * ha = adapter block pointer. 5180 * 5181 * Returns: 5182 * 0 = success. 5183 * BIT_0 = error 5184 */ 5185 static int 5186 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5187 { 5188 int rval; 5189 fc_port_t *fcport; 5190 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5191 uint16_t loop_id; 5192 LIST_HEAD(new_fcports); 5193 struct qla_hw_data *ha = vha->hw; 5194 int discovery_gen; 5195 5196 /* If FL port exists, then SNS is present */ 5197 if (IS_FWI2_CAPABLE(ha)) 5198 loop_id = NPH_F_PORT; 5199 else 5200 loop_id = SNS_FL_PORT; 5201 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5202 if (rval != QLA_SUCCESS) { 5203 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5204 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5205 5206 vha->device_flags &= ~SWITCH_FOUND; 5207 return (QLA_SUCCESS); 5208 } 5209 vha->device_flags |= SWITCH_FOUND; 5210 5211 5212 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5213 rval = qla2x00_send_change_request(vha, 0x3, 0); 5214 if (rval != QLA_SUCCESS) 5215 ql_log(ql_log_warn, vha, 0x121, 5216 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5217 rval); 5218 } 5219 5220 5221 do { 5222 qla2x00_mgmt_svr_login(vha); 5223 5224 /* FDMI support. */ 5225 if (ql2xfdmienable && 5226 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5227 qla2x00_fdmi_register(vha); 5228 5229 /* Ensure we are logged into the SNS. */ 5230 loop_id = NPH_SNS_LID(ha); 5231 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5232 0xfc, mb, BIT_1|BIT_0); 5233 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5234 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5235 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5236 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5237 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5238 return rval; 5239 } 5240 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5241 if (qla2x00_rft_id(vha)) { 5242 /* EMPTY */ 5243 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5244 "Register FC-4 TYPE failed.\n"); 5245 if (test_bit(LOOP_RESYNC_NEEDED, 5246 &vha->dpc_flags)) 5247 break; 5248 } 5249 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5250 /* EMPTY */ 5251 ql_dbg(ql_dbg_disc, vha, 0x209a, 5252 "Register FC-4 Features failed.\n"); 5253 if (test_bit(LOOP_RESYNC_NEEDED, 5254 &vha->dpc_flags)) 5255 break; 5256 } 5257 if (vha->flags.nvme_enabled) { 5258 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5259 ql_dbg(ql_dbg_disc, vha, 0x2049, 5260 "Register NVME FC Type Features failed.\n"); 5261 } 5262 } 5263 if (qla2x00_rnn_id(vha)) { 5264 /* EMPTY */ 5265 ql_dbg(ql_dbg_disc, vha, 0x2104, 5266 "Register Node Name failed.\n"); 5267 if (test_bit(LOOP_RESYNC_NEEDED, 5268 &vha->dpc_flags)) 5269 break; 5270 } else if (qla2x00_rsnn_nn(vha)) { 5271 /* EMPTY */ 5272 ql_dbg(ql_dbg_disc, vha, 0x209b, 5273 "Register Symbolic Node Name failed.\n"); 5274 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5275 break; 5276 } 5277 } 5278 5279 5280 /* Mark the time right before querying FW for connected ports. 5281 * This process is long, asynchronous and by the time it's done, 5282 * collected information might not be accurate anymore. E.g. 5283 * disconnected port might have re-connected and a brand new 5284 * session has been created. In this case session's generation 5285 * will be newer than discovery_gen. */ 5286 qlt_do_generation_tick(vha, &discovery_gen); 5287 5288 if (USE_ASYNC_SCAN(ha)) { 5289 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5290 NULL); 5291 if (rval) 5292 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5293 } else { 5294 list_for_each_entry(fcport, &vha->vp_fcports, list) 5295 fcport->scan_state = QLA_FCPORT_SCAN; 5296 5297 rval = qla2x00_find_all_fabric_devs(vha); 5298 } 5299 if (rval != QLA_SUCCESS) 5300 break; 5301 } while (0); 5302 5303 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5304 qla_nvme_register_hba(vha); 5305 5306 if (rval) 5307 ql_dbg(ql_dbg_disc, vha, 0x2068, 5308 "Configure fabric error exit rval=%d.\n", rval); 5309 5310 return (rval); 5311 } 5312 5313 /* 5314 * qla2x00_find_all_fabric_devs 5315 * 5316 * Input: 5317 * ha = adapter block pointer. 5318 * dev = database device entry pointer. 5319 * 5320 * Returns: 5321 * 0 = success. 5322 * 5323 * Context: 5324 * Kernel context. 5325 */ 5326 static int 5327 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5328 { 5329 int rval; 5330 uint16_t loop_id; 5331 fc_port_t *fcport, *new_fcport; 5332 int found; 5333 5334 sw_info_t *swl; 5335 int swl_idx; 5336 int first_dev, last_dev; 5337 port_id_t wrap = {}, nxt_d_id; 5338 struct qla_hw_data *ha = vha->hw; 5339 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5340 unsigned long flags; 5341 5342 rval = QLA_SUCCESS; 5343 5344 /* Try GID_PT to get device list, else GAN. */ 5345 if (!ha->swl) 5346 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5347 GFP_KERNEL); 5348 swl = ha->swl; 5349 if (!swl) { 5350 /*EMPTY*/ 5351 ql_dbg(ql_dbg_disc, vha, 0x209c, 5352 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5353 } else { 5354 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5355 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5356 swl = NULL; 5357 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5358 return rval; 5359 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5360 swl = NULL; 5361 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5362 return rval; 5363 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5364 swl = NULL; 5365 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5366 return rval; 5367 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5368 swl = NULL; 5369 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5370 return rval; 5371 } 5372 5373 /* If other queries succeeded probe for FC-4 type */ 5374 if (swl) { 5375 qla2x00_gff_id(vha, swl); 5376 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5377 return rval; 5378 } 5379 } 5380 swl_idx = 0; 5381 5382 /* Allocate temporary fcport for any new fcports discovered. */ 5383 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5384 if (new_fcport == NULL) { 5385 ql_log(ql_log_warn, vha, 0x209d, 5386 "Failed to allocate memory for fcport.\n"); 5387 return (QLA_MEMORY_ALLOC_FAILED); 5388 } 5389 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5390 /* Set start port ID scan at adapter ID. */ 5391 first_dev = 1; 5392 last_dev = 0; 5393 5394 /* Starting free loop ID. */ 5395 loop_id = ha->min_external_loopid; 5396 for (; loop_id <= ha->max_loop_id; loop_id++) { 5397 if (qla2x00_is_reserved_id(vha, loop_id)) 5398 continue; 5399 5400 if (ha->current_topology == ISP_CFG_FL && 5401 (atomic_read(&vha->loop_down_timer) || 5402 LOOP_TRANSITION(vha))) { 5403 atomic_set(&vha->loop_down_timer, 0); 5404 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5405 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5406 break; 5407 } 5408 5409 if (swl != NULL) { 5410 if (last_dev) { 5411 wrap.b24 = new_fcport->d_id.b24; 5412 } else { 5413 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5414 memcpy(new_fcport->node_name, 5415 swl[swl_idx].node_name, WWN_SIZE); 5416 memcpy(new_fcport->port_name, 5417 swl[swl_idx].port_name, WWN_SIZE); 5418 memcpy(new_fcport->fabric_port_name, 5419 swl[swl_idx].fabric_port_name, WWN_SIZE); 5420 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5421 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5422 5423 new_fcport->nvme_flag = 0; 5424 new_fcport->fc4f_nvme = 0; 5425 if (vha->flags.nvme_enabled && 5426 swl[swl_idx].fc4f_nvme) { 5427 new_fcport->fc4f_nvme = 5428 swl[swl_idx].fc4f_nvme; 5429 ql_log(ql_log_info, vha, 0x2131, 5430 "FOUND: NVME port %8phC as FC Type 28h\n", 5431 new_fcport->port_name); 5432 } 5433 5434 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5435 last_dev = 1; 5436 } 5437 swl_idx++; 5438 } 5439 } else { 5440 /* Send GA_NXT to the switch */ 5441 rval = qla2x00_ga_nxt(vha, new_fcport); 5442 if (rval != QLA_SUCCESS) { 5443 ql_log(ql_log_warn, vha, 0x209e, 5444 "SNS scan failed -- assuming " 5445 "zero-entry result.\n"); 5446 rval = QLA_SUCCESS; 5447 break; 5448 } 5449 } 5450 5451 /* If wrap on switch device list, exit. */ 5452 if (first_dev) { 5453 wrap.b24 = new_fcport->d_id.b24; 5454 first_dev = 0; 5455 } else if (new_fcport->d_id.b24 == wrap.b24) { 5456 ql_dbg(ql_dbg_disc, vha, 0x209f, 5457 "Device wrap (%02x%02x%02x).\n", 5458 new_fcport->d_id.b.domain, 5459 new_fcport->d_id.b.area, 5460 new_fcport->d_id.b.al_pa); 5461 break; 5462 } 5463 5464 /* Bypass if same physical adapter. */ 5465 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5466 continue; 5467 5468 /* Bypass virtual ports of the same host. */ 5469 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5470 continue; 5471 5472 /* Bypass if same domain and area of adapter. */ 5473 if (((new_fcport->d_id.b24 & 0xffff00) == 5474 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5475 ISP_CFG_FL) 5476 continue; 5477 5478 /* Bypass reserved domain fields. */ 5479 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5480 continue; 5481 5482 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5483 if (ql2xgffidenable && 5484 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5485 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5486 continue; 5487 5488 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5489 5490 /* Locate matching device in database. */ 5491 found = 0; 5492 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5493 if (memcmp(new_fcport->port_name, fcport->port_name, 5494 WWN_SIZE)) 5495 continue; 5496 5497 fcport->scan_state = QLA_FCPORT_FOUND; 5498 5499 found++; 5500 5501 /* Update port state. */ 5502 memcpy(fcport->fabric_port_name, 5503 new_fcport->fabric_port_name, WWN_SIZE); 5504 fcport->fp_speed = new_fcport->fp_speed; 5505 5506 /* 5507 * If address the same and state FCS_ONLINE 5508 * (or in target mode), nothing changed. 5509 */ 5510 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5511 (atomic_read(&fcport->state) == FCS_ONLINE || 5512 (vha->host->active_mode == MODE_TARGET))) { 5513 break; 5514 } 5515 5516 /* 5517 * If device was not a fabric device before. 5518 */ 5519 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5520 fcport->d_id.b24 = new_fcport->d_id.b24; 5521 qla2x00_clear_loop_id(fcport); 5522 fcport->flags |= (FCF_FABRIC_DEVICE | 5523 FCF_LOGIN_NEEDED); 5524 break; 5525 } 5526 5527 /* 5528 * Port ID changed or device was marked to be updated; 5529 * Log it out if still logged in and mark it for 5530 * relogin later. 5531 */ 5532 if (qla_tgt_mode_enabled(base_vha)) { 5533 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5534 "port changed FC ID, %8phC" 5535 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5536 fcport->port_name, 5537 fcport->d_id.b.domain, 5538 fcport->d_id.b.area, 5539 fcport->d_id.b.al_pa, 5540 fcport->loop_id, 5541 new_fcport->d_id.b.domain, 5542 new_fcport->d_id.b.area, 5543 new_fcport->d_id.b.al_pa); 5544 fcport->d_id.b24 = new_fcport->d_id.b24; 5545 break; 5546 } 5547 5548 fcport->d_id.b24 = new_fcport->d_id.b24; 5549 fcport->flags |= FCF_LOGIN_NEEDED; 5550 break; 5551 } 5552 5553 if (fcport->fc4f_nvme) { 5554 if (fcport->disc_state == DSC_DELETE_PEND) { 5555 fcport->disc_state = DSC_GNL; 5556 vha->fcport_count--; 5557 fcport->login_succ = 0; 5558 } 5559 } 5560 5561 if (found) { 5562 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5563 continue; 5564 } 5565 /* If device was not in our fcports list, then add it. */ 5566 new_fcport->scan_state = QLA_FCPORT_FOUND; 5567 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5568 5569 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5570 5571 5572 /* Allocate a new replacement fcport. */ 5573 nxt_d_id.b24 = new_fcport->d_id.b24; 5574 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5575 if (new_fcport == NULL) { 5576 ql_log(ql_log_warn, vha, 0xd032, 5577 "Memory allocation failed for fcport.\n"); 5578 return (QLA_MEMORY_ALLOC_FAILED); 5579 } 5580 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5581 new_fcport->d_id.b24 = nxt_d_id.b24; 5582 } 5583 5584 qla2x00_free_fcport(new_fcport); 5585 5586 /* 5587 * Logout all previous fabric dev marked lost, except FCP2 devices. 5588 */ 5589 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5590 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5591 break; 5592 5593 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5594 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5595 continue; 5596 5597 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5598 if ((qla_dual_mode_enabled(vha) || 5599 qla_ini_mode_enabled(vha)) && 5600 atomic_read(&fcport->state) == FCS_ONLINE) { 5601 qla2x00_mark_device_lost(vha, fcport, 5602 ql2xplogiabsentdevice, 0); 5603 if (fcport->loop_id != FC_NO_LOOP_ID && 5604 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5605 fcport->port_type != FCT_INITIATOR && 5606 fcport->port_type != FCT_BROADCAST) { 5607 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5608 "%s %d %8phC post del sess\n", 5609 __func__, __LINE__, 5610 fcport->port_name); 5611 qlt_schedule_sess_for_deletion(fcport); 5612 continue; 5613 } 5614 } 5615 } 5616 5617 if (fcport->scan_state == QLA_FCPORT_FOUND) 5618 qla24xx_fcport_handle_login(vha, fcport); 5619 } 5620 return (rval); 5621 } 5622 5623 /* 5624 * qla2x00_find_new_loop_id 5625 * Scan through our port list and find a new usable loop ID. 5626 * 5627 * Input: 5628 * ha: adapter state pointer. 5629 * dev: port structure pointer. 5630 * 5631 * Returns: 5632 * qla2x00 local function return status code. 5633 * 5634 * Context: 5635 * Kernel context. 5636 */ 5637 int 5638 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5639 { 5640 int rval; 5641 struct qla_hw_data *ha = vha->hw; 5642 unsigned long flags = 0; 5643 5644 rval = QLA_SUCCESS; 5645 5646 spin_lock_irqsave(&ha->vport_slock, flags); 5647 5648 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5649 LOOPID_MAP_SIZE); 5650 if (dev->loop_id >= LOOPID_MAP_SIZE || 5651 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5652 dev->loop_id = FC_NO_LOOP_ID; 5653 rval = QLA_FUNCTION_FAILED; 5654 } else 5655 set_bit(dev->loop_id, ha->loop_id_map); 5656 5657 spin_unlock_irqrestore(&ha->vport_slock, flags); 5658 5659 if (rval == QLA_SUCCESS) 5660 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5661 "Assigning new loopid=%x, portid=%x.\n", 5662 dev->loop_id, dev->d_id.b24); 5663 else 5664 ql_log(ql_log_warn, dev->vha, 0x2087, 5665 "No loop_id's available, portid=%x.\n", 5666 dev->d_id.b24); 5667 5668 return (rval); 5669 } 5670 5671 5672 /* 5673 * qla2x00_fabric_login 5674 * Issue fabric login command. 5675 * 5676 * Input: 5677 * ha = adapter block pointer. 5678 * device = pointer to FC device type structure. 5679 * 5680 * Returns: 5681 * 0 - Login successfully 5682 * 1 - Login failed 5683 * 2 - Initiator device 5684 * 3 - Fatal error 5685 */ 5686 int 5687 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5688 uint16_t *next_loopid) 5689 { 5690 int rval; 5691 int retry; 5692 uint16_t tmp_loopid; 5693 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5694 struct qla_hw_data *ha = vha->hw; 5695 5696 retry = 0; 5697 tmp_loopid = 0; 5698 5699 for (;;) { 5700 ql_dbg(ql_dbg_disc, vha, 0x2000, 5701 "Trying Fabric Login w/loop id 0x%04x for port " 5702 "%02x%02x%02x.\n", 5703 fcport->loop_id, fcport->d_id.b.domain, 5704 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5705 5706 /* Login fcport on switch. */ 5707 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5708 fcport->d_id.b.domain, fcport->d_id.b.area, 5709 fcport->d_id.b.al_pa, mb, BIT_0); 5710 if (rval != QLA_SUCCESS) { 5711 return rval; 5712 } 5713 if (mb[0] == MBS_PORT_ID_USED) { 5714 /* 5715 * Device has another loop ID. The firmware team 5716 * recommends the driver perform an implicit login with 5717 * the specified ID again. The ID we just used is save 5718 * here so we return with an ID that can be tried by 5719 * the next login. 5720 */ 5721 retry++; 5722 tmp_loopid = fcport->loop_id; 5723 fcport->loop_id = mb[1]; 5724 5725 ql_dbg(ql_dbg_disc, vha, 0x2001, 5726 "Fabric Login: port in use - next loop " 5727 "id=0x%04x, port id= %02x%02x%02x.\n", 5728 fcport->loop_id, fcport->d_id.b.domain, 5729 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5730 5731 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5732 /* 5733 * Login succeeded. 5734 */ 5735 if (retry) { 5736 /* A retry occurred before. */ 5737 *next_loopid = tmp_loopid; 5738 } else { 5739 /* 5740 * No retry occurred before. Just increment the 5741 * ID value for next login. 5742 */ 5743 *next_loopid = (fcport->loop_id + 1); 5744 } 5745 5746 if (mb[1] & BIT_0) { 5747 fcport->port_type = FCT_INITIATOR; 5748 } else { 5749 fcport->port_type = FCT_TARGET; 5750 if (mb[1] & BIT_1) { 5751 fcport->flags |= FCF_FCP2_DEVICE; 5752 } 5753 } 5754 5755 if (mb[10] & BIT_0) 5756 fcport->supported_classes |= FC_COS_CLASS2; 5757 if (mb[10] & BIT_1) 5758 fcport->supported_classes |= FC_COS_CLASS3; 5759 5760 if (IS_FWI2_CAPABLE(ha)) { 5761 if (mb[10] & BIT_7) 5762 fcport->flags |= 5763 FCF_CONF_COMP_SUPPORTED; 5764 } 5765 5766 rval = QLA_SUCCESS; 5767 break; 5768 } else if (mb[0] == MBS_LOOP_ID_USED) { 5769 /* 5770 * Loop ID already used, try next loop ID. 5771 */ 5772 fcport->loop_id++; 5773 rval = qla2x00_find_new_loop_id(vha, fcport); 5774 if (rval != QLA_SUCCESS) { 5775 /* Ran out of loop IDs to use */ 5776 break; 5777 } 5778 } else if (mb[0] == MBS_COMMAND_ERROR) { 5779 /* 5780 * Firmware possibly timed out during login. If NO 5781 * retries are left to do then the device is declared 5782 * dead. 5783 */ 5784 *next_loopid = fcport->loop_id; 5785 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5786 fcport->d_id.b.domain, fcport->d_id.b.area, 5787 fcport->d_id.b.al_pa); 5788 qla2x00_mark_device_lost(vha, fcport, 1, 0); 5789 5790 rval = 1; 5791 break; 5792 } else { 5793 /* 5794 * unrecoverable / not handled error 5795 */ 5796 ql_dbg(ql_dbg_disc, vha, 0x2002, 5797 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 5798 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 5799 fcport->d_id.b.area, fcport->d_id.b.al_pa, 5800 fcport->loop_id, jiffies); 5801 5802 *next_loopid = fcport->loop_id; 5803 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5804 fcport->d_id.b.domain, fcport->d_id.b.area, 5805 fcport->d_id.b.al_pa); 5806 qla2x00_clear_loop_id(fcport); 5807 fcport->login_retry = 0; 5808 5809 rval = 3; 5810 break; 5811 } 5812 } 5813 5814 return (rval); 5815 } 5816 5817 /* 5818 * qla2x00_local_device_login 5819 * Issue local device login command. 5820 * 5821 * Input: 5822 * ha = adapter block pointer. 5823 * loop_id = loop id of device to login to. 5824 * 5825 * Returns (Where's the #define!!!!): 5826 * 0 - Login successfully 5827 * 1 - Login failed 5828 * 3 - Fatal error 5829 */ 5830 int 5831 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 5832 { 5833 int rval; 5834 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5835 5836 memset(mb, 0, sizeof(mb)); 5837 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 5838 if (rval == QLA_SUCCESS) { 5839 /* Interrogate mailbox registers for any errors */ 5840 if (mb[0] == MBS_COMMAND_ERROR) 5841 rval = 1; 5842 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 5843 /* device not in PCB table */ 5844 rval = 3; 5845 } 5846 5847 return (rval); 5848 } 5849 5850 /* 5851 * qla2x00_loop_resync 5852 * Resync with fibre channel devices. 5853 * 5854 * Input: 5855 * ha = adapter block pointer. 5856 * 5857 * Returns: 5858 * 0 = success 5859 */ 5860 int 5861 qla2x00_loop_resync(scsi_qla_host_t *vha) 5862 { 5863 int rval = QLA_SUCCESS; 5864 uint32_t wait_time; 5865 struct req_que *req; 5866 struct rsp_que *rsp; 5867 5868 req = vha->req; 5869 rsp = req->rsp; 5870 5871 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5872 if (vha->flags.online) { 5873 if (!(rval = qla2x00_fw_ready(vha))) { 5874 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5875 wait_time = 256; 5876 do { 5877 if (!IS_QLAFX00(vha->hw)) { 5878 /* 5879 * Issue a marker after FW becomes 5880 * ready. 5881 */ 5882 qla2x00_marker(vha, req, rsp, 0, 0, 5883 MK_SYNC_ALL); 5884 vha->marker_needed = 0; 5885 } 5886 5887 /* Remap devices on Loop. */ 5888 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5889 5890 if (IS_QLAFX00(vha->hw)) 5891 qlafx00_configure_devices(vha); 5892 else 5893 qla2x00_configure_loop(vha); 5894 5895 wait_time--; 5896 } while (!atomic_read(&vha->loop_down_timer) && 5897 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5898 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 5899 &vha->dpc_flags))); 5900 } 5901 } 5902 5903 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5904 return (QLA_FUNCTION_FAILED); 5905 5906 if (rval) 5907 ql_dbg(ql_dbg_disc, vha, 0x206c, 5908 "%s *** FAILED ***.\n", __func__); 5909 5910 return (rval); 5911 } 5912 5913 /* 5914 * qla2x00_perform_loop_resync 5915 * Description: This function will set the appropriate flags and call 5916 * qla2x00_loop_resync. If successful loop will be resynced 5917 * Arguments : scsi_qla_host_t pointer 5918 * returm : Success or Failure 5919 */ 5920 5921 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 5922 { 5923 int32_t rval = 0; 5924 5925 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 5926 /*Configure the flags so that resync happens properly*/ 5927 atomic_set(&ha->loop_down_timer, 0); 5928 if (!(ha->device_flags & DFLG_NO_CABLE)) { 5929 atomic_set(&ha->loop_state, LOOP_UP); 5930 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 5931 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 5932 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 5933 5934 rval = qla2x00_loop_resync(ha); 5935 } else 5936 atomic_set(&ha->loop_state, LOOP_DEAD); 5937 5938 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 5939 } 5940 5941 return rval; 5942 } 5943 5944 void 5945 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 5946 { 5947 fc_port_t *fcport; 5948 struct scsi_qla_host *vha; 5949 struct qla_hw_data *ha = base_vha->hw; 5950 unsigned long flags; 5951 5952 spin_lock_irqsave(&ha->vport_slock, flags); 5953 /* Go with deferred removal of rport references. */ 5954 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 5955 atomic_inc(&vha->vref_count); 5956 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5957 if (fcport->drport && 5958 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 5959 spin_unlock_irqrestore(&ha->vport_slock, flags); 5960 qla2x00_rport_del(fcport); 5961 5962 spin_lock_irqsave(&ha->vport_slock, flags); 5963 } 5964 } 5965 atomic_dec(&vha->vref_count); 5966 wake_up(&vha->vref_waitq); 5967 } 5968 spin_unlock_irqrestore(&ha->vport_slock, flags); 5969 } 5970 5971 /* Assumes idc_lock always held on entry */ 5972 void 5973 qla83xx_reset_ownership(scsi_qla_host_t *vha) 5974 { 5975 struct qla_hw_data *ha = vha->hw; 5976 uint32_t drv_presence, drv_presence_mask; 5977 uint32_t dev_part_info1, dev_part_info2, class_type; 5978 uint32_t class_type_mask = 0x3; 5979 uint16_t fcoe_other_function = 0xffff, i; 5980 5981 if (IS_QLA8044(ha)) { 5982 drv_presence = qla8044_rd_direct(vha, 5983 QLA8044_CRB_DRV_ACTIVE_INDEX); 5984 dev_part_info1 = qla8044_rd_direct(vha, 5985 QLA8044_CRB_DEV_PART_INFO_INDEX); 5986 dev_part_info2 = qla8044_rd_direct(vha, 5987 QLA8044_CRB_DEV_PART_INFO2); 5988 } else { 5989 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 5990 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 5991 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 5992 } 5993 for (i = 0; i < 8; i++) { 5994 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 5995 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5996 (i != ha->portnum)) { 5997 fcoe_other_function = i; 5998 break; 5999 } 6000 } 6001 if (fcoe_other_function == 0xffff) { 6002 for (i = 0; i < 8; i++) { 6003 class_type = ((dev_part_info2 >> (i * 4)) & 6004 class_type_mask); 6005 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6006 ((i + 8) != ha->portnum)) { 6007 fcoe_other_function = i + 8; 6008 break; 6009 } 6010 } 6011 } 6012 /* 6013 * Prepare drv-presence mask based on fcoe functions present. 6014 * However consider only valid physical fcoe function numbers (0-15). 6015 */ 6016 drv_presence_mask = ~((1 << (ha->portnum)) | 6017 ((fcoe_other_function == 0xffff) ? 6018 0 : (1 << (fcoe_other_function)))); 6019 6020 /* We are the reset owner iff: 6021 * - No other protocol drivers present. 6022 * - This is the lowest among fcoe functions. */ 6023 if (!(drv_presence & drv_presence_mask) && 6024 (ha->portnum < fcoe_other_function)) { 6025 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6026 "This host is Reset owner.\n"); 6027 ha->flags.nic_core_reset_owner = 1; 6028 } 6029 } 6030 6031 static int 6032 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6033 { 6034 int rval = QLA_SUCCESS; 6035 struct qla_hw_data *ha = vha->hw; 6036 uint32_t drv_ack; 6037 6038 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6039 if (rval == QLA_SUCCESS) { 6040 drv_ack |= (1 << ha->portnum); 6041 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6042 } 6043 6044 return rval; 6045 } 6046 6047 static int 6048 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6049 { 6050 int rval = QLA_SUCCESS; 6051 struct qla_hw_data *ha = vha->hw; 6052 uint32_t drv_ack; 6053 6054 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6055 if (rval == QLA_SUCCESS) { 6056 drv_ack &= ~(1 << ha->portnum); 6057 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6058 } 6059 6060 return rval; 6061 } 6062 6063 static const char * 6064 qla83xx_dev_state_to_string(uint32_t dev_state) 6065 { 6066 switch (dev_state) { 6067 case QLA8XXX_DEV_COLD: 6068 return "COLD/RE-INIT"; 6069 case QLA8XXX_DEV_INITIALIZING: 6070 return "INITIALIZING"; 6071 case QLA8XXX_DEV_READY: 6072 return "READY"; 6073 case QLA8XXX_DEV_NEED_RESET: 6074 return "NEED RESET"; 6075 case QLA8XXX_DEV_NEED_QUIESCENT: 6076 return "NEED QUIESCENT"; 6077 case QLA8XXX_DEV_FAILED: 6078 return "FAILED"; 6079 case QLA8XXX_DEV_QUIESCENT: 6080 return "QUIESCENT"; 6081 default: 6082 return "Unknown"; 6083 } 6084 } 6085 6086 /* Assumes idc-lock always held on entry */ 6087 void 6088 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6089 { 6090 struct qla_hw_data *ha = vha->hw; 6091 uint32_t idc_audit_reg = 0, duration_secs = 0; 6092 6093 switch (audit_type) { 6094 case IDC_AUDIT_TIMESTAMP: 6095 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6096 idc_audit_reg = (ha->portnum) | 6097 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6098 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6099 break; 6100 6101 case IDC_AUDIT_COMPLETION: 6102 duration_secs = ((jiffies_to_msecs(jiffies) - 6103 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6104 idc_audit_reg = (ha->portnum) | 6105 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6106 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6107 break; 6108 6109 default: 6110 ql_log(ql_log_warn, vha, 0xb078, 6111 "Invalid audit type specified.\n"); 6112 break; 6113 } 6114 } 6115 6116 /* Assumes idc_lock always held on entry */ 6117 static int 6118 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6119 { 6120 struct qla_hw_data *ha = vha->hw; 6121 uint32_t idc_control, dev_state; 6122 6123 __qla83xx_get_idc_control(vha, &idc_control); 6124 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6125 ql_log(ql_log_info, vha, 0xb080, 6126 "NIC Core reset has been disabled. idc-control=0x%x\n", 6127 idc_control); 6128 return QLA_FUNCTION_FAILED; 6129 } 6130 6131 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6132 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6133 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6134 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6135 QLA8XXX_DEV_NEED_RESET); 6136 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6137 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6138 } else { 6139 const char *state = qla83xx_dev_state_to_string(dev_state); 6140 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6141 6142 /* SV: XXX: Is timeout required here? */ 6143 /* Wait for IDC state change READY -> NEED_RESET */ 6144 while (dev_state == QLA8XXX_DEV_READY) { 6145 qla83xx_idc_unlock(vha, 0); 6146 msleep(200); 6147 qla83xx_idc_lock(vha, 0); 6148 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6149 } 6150 } 6151 6152 /* Send IDC ack by writing to drv-ack register */ 6153 __qla83xx_set_drv_ack(vha); 6154 6155 return QLA_SUCCESS; 6156 } 6157 6158 int 6159 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6160 { 6161 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6162 } 6163 6164 int 6165 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6166 { 6167 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6168 } 6169 6170 static int 6171 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6172 { 6173 uint32_t drv_presence = 0; 6174 struct qla_hw_data *ha = vha->hw; 6175 6176 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6177 if (drv_presence & (1 << ha->portnum)) 6178 return QLA_SUCCESS; 6179 else 6180 return QLA_TEST_FAILED; 6181 } 6182 6183 int 6184 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6185 { 6186 int rval = QLA_SUCCESS; 6187 struct qla_hw_data *ha = vha->hw; 6188 6189 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6190 "Entered %s().\n", __func__); 6191 6192 if (vha->device_flags & DFLG_DEV_FAILED) { 6193 ql_log(ql_log_warn, vha, 0xb059, 6194 "Device in unrecoverable FAILED state.\n"); 6195 return QLA_FUNCTION_FAILED; 6196 } 6197 6198 qla83xx_idc_lock(vha, 0); 6199 6200 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6201 ql_log(ql_log_warn, vha, 0xb05a, 6202 "Function=0x%x has been removed from IDC participation.\n", 6203 ha->portnum); 6204 rval = QLA_FUNCTION_FAILED; 6205 goto exit; 6206 } 6207 6208 qla83xx_reset_ownership(vha); 6209 6210 rval = qla83xx_initiating_reset(vha); 6211 6212 /* 6213 * Perform reset if we are the reset-owner, 6214 * else wait till IDC state changes to READY/FAILED. 6215 */ 6216 if (rval == QLA_SUCCESS) { 6217 rval = qla83xx_idc_state_handler(vha); 6218 6219 if (rval == QLA_SUCCESS) 6220 ha->flags.nic_core_hung = 0; 6221 __qla83xx_clear_drv_ack(vha); 6222 } 6223 6224 exit: 6225 qla83xx_idc_unlock(vha, 0); 6226 6227 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6228 6229 return rval; 6230 } 6231 6232 int 6233 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6234 { 6235 struct qla_hw_data *ha = vha->hw; 6236 int rval = QLA_FUNCTION_FAILED; 6237 6238 if (!IS_MCTP_CAPABLE(ha)) { 6239 /* This message can be removed from the final version */ 6240 ql_log(ql_log_info, vha, 0x506d, 6241 "This board is not MCTP capable\n"); 6242 return rval; 6243 } 6244 6245 if (!ha->mctp_dump) { 6246 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6247 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6248 6249 if (!ha->mctp_dump) { 6250 ql_log(ql_log_warn, vha, 0x506e, 6251 "Failed to allocate memory for mctp dump\n"); 6252 return rval; 6253 } 6254 } 6255 6256 #define MCTP_DUMP_STR_ADDR 0x00000000 6257 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6258 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6259 if (rval != QLA_SUCCESS) { 6260 ql_log(ql_log_warn, vha, 0x506f, 6261 "Failed to capture mctp dump\n"); 6262 } else { 6263 ql_log(ql_log_info, vha, 0x5070, 6264 "Mctp dump capture for host (%ld/%p).\n", 6265 vha->host_no, ha->mctp_dump); 6266 ha->mctp_dumped = 1; 6267 } 6268 6269 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6270 ha->flags.nic_core_reset_hdlr_active = 1; 6271 rval = qla83xx_restart_nic_firmware(vha); 6272 if (rval) 6273 /* NIC Core reset failed. */ 6274 ql_log(ql_log_warn, vha, 0x5071, 6275 "Failed to restart nic firmware\n"); 6276 else 6277 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6278 "Restarted NIC firmware successfully.\n"); 6279 ha->flags.nic_core_reset_hdlr_active = 0; 6280 } 6281 6282 return rval; 6283 6284 } 6285 6286 /* 6287 * qla2x00_quiesce_io 6288 * Description: This function will block the new I/Os 6289 * Its not aborting any I/Os as context 6290 * is not destroyed during quiescence 6291 * Arguments: scsi_qla_host_t 6292 * return : void 6293 */ 6294 void 6295 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6296 { 6297 struct qla_hw_data *ha = vha->hw; 6298 struct scsi_qla_host *vp; 6299 6300 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6301 "Quiescing I/O - ha=%p.\n", ha); 6302 6303 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6304 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6305 atomic_set(&vha->loop_state, LOOP_DOWN); 6306 qla2x00_mark_all_devices_lost(vha, 0); 6307 list_for_each_entry(vp, &ha->vp_list, list) 6308 qla2x00_mark_all_devices_lost(vp, 0); 6309 } else { 6310 if (!atomic_read(&vha->loop_down_timer)) 6311 atomic_set(&vha->loop_down_timer, 6312 LOOP_DOWN_TIME); 6313 } 6314 /* Wait for pending cmds to complete */ 6315 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6316 } 6317 6318 void 6319 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6320 { 6321 struct qla_hw_data *ha = vha->hw; 6322 struct scsi_qla_host *vp; 6323 unsigned long flags; 6324 fc_port_t *fcport; 6325 u16 i; 6326 6327 /* For ISP82XX, driver waits for completion of the commands. 6328 * online flag should be set. 6329 */ 6330 if (!(IS_P3P_TYPE(ha))) 6331 vha->flags.online = 0; 6332 ha->flags.chip_reset_done = 0; 6333 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6334 vha->qla_stats.total_isp_aborts++; 6335 6336 ql_log(ql_log_info, vha, 0x00af, 6337 "Performing ISP error recovery - ha=%p.\n", ha); 6338 6339 /* For ISP82XX, reset_chip is just disabling interrupts. 6340 * Driver waits for the completion of the commands. 6341 * the interrupts need to be enabled. 6342 */ 6343 if (!(IS_P3P_TYPE(ha))) 6344 ha->isp_ops->reset_chip(vha); 6345 6346 SAVE_TOPO(ha); 6347 ha->flags.rida_fmt2 = 0; 6348 ha->flags.n2n_ae = 0; 6349 ha->flags.lip_ae = 0; 6350 ha->current_topology = 0; 6351 ha->flags.fw_started = 0; 6352 ha->flags.fw_init_done = 0; 6353 ha->base_qpair->chip_reset++; 6354 for (i = 0; i < ha->max_qpairs; i++) { 6355 if (ha->queue_pair_map[i]) 6356 ha->queue_pair_map[i]->chip_reset = 6357 ha->base_qpair->chip_reset; 6358 } 6359 6360 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6361 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6362 atomic_set(&vha->loop_state, LOOP_DOWN); 6363 qla2x00_mark_all_devices_lost(vha, 0); 6364 6365 spin_lock_irqsave(&ha->vport_slock, flags); 6366 list_for_each_entry(vp, &ha->vp_list, list) { 6367 atomic_inc(&vp->vref_count); 6368 spin_unlock_irqrestore(&ha->vport_slock, flags); 6369 6370 qla2x00_mark_all_devices_lost(vp, 0); 6371 6372 spin_lock_irqsave(&ha->vport_slock, flags); 6373 atomic_dec(&vp->vref_count); 6374 } 6375 spin_unlock_irqrestore(&ha->vport_slock, flags); 6376 } else { 6377 if (!atomic_read(&vha->loop_down_timer)) 6378 atomic_set(&vha->loop_down_timer, 6379 LOOP_DOWN_TIME); 6380 } 6381 6382 /* Clear all async request states across all VPs. */ 6383 list_for_each_entry(fcport, &vha->vp_fcports, list) 6384 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6385 spin_lock_irqsave(&ha->vport_slock, flags); 6386 list_for_each_entry(vp, &ha->vp_list, list) { 6387 atomic_inc(&vp->vref_count); 6388 spin_unlock_irqrestore(&ha->vport_slock, flags); 6389 6390 list_for_each_entry(fcport, &vp->vp_fcports, list) 6391 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6392 6393 spin_lock_irqsave(&ha->vport_slock, flags); 6394 atomic_dec(&vp->vref_count); 6395 } 6396 spin_unlock_irqrestore(&ha->vport_slock, flags); 6397 6398 if (!ha->flags.eeh_busy) { 6399 /* Make sure for ISP 82XX IO DMA is complete */ 6400 if (IS_P3P_TYPE(ha)) { 6401 qla82xx_chip_reset_cleanup(vha); 6402 ql_log(ql_log_info, vha, 0x00b4, 6403 "Done chip reset cleanup.\n"); 6404 6405 /* Done waiting for pending commands. 6406 * Reset the online flag. 6407 */ 6408 vha->flags.online = 0; 6409 } 6410 6411 /* Requeue all commands in outstanding command list. */ 6412 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6413 } 6414 /* memory barrier */ 6415 wmb(); 6416 } 6417 6418 /* 6419 * qla2x00_abort_isp 6420 * Resets ISP and aborts all outstanding commands. 6421 * 6422 * Input: 6423 * ha = adapter block pointer. 6424 * 6425 * Returns: 6426 * 0 = success 6427 */ 6428 int 6429 qla2x00_abort_isp(scsi_qla_host_t *vha) 6430 { 6431 int rval; 6432 uint8_t status = 0; 6433 struct qla_hw_data *ha = vha->hw; 6434 struct scsi_qla_host *vp; 6435 struct req_que *req = ha->req_q_map[0]; 6436 unsigned long flags; 6437 6438 if (vha->flags.online) { 6439 qla2x00_abort_isp_cleanup(vha); 6440 6441 if (IS_QLA8031(ha)) { 6442 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6443 "Clearing fcoe driver presence.\n"); 6444 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6445 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6446 "Error while clearing DRV-Presence.\n"); 6447 } 6448 6449 if (unlikely(pci_channel_offline(ha->pdev) && 6450 ha->flags.pci_channel_io_perm_failure)) { 6451 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6452 status = 0; 6453 return status; 6454 } 6455 6456 ha->isp_ops->get_flash_version(vha, req->ring); 6457 6458 ha->isp_ops->nvram_config(vha); 6459 6460 if (!qla2x00_restart_isp(vha)) { 6461 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6462 6463 if (!atomic_read(&vha->loop_down_timer)) { 6464 /* 6465 * Issue marker command only when we are going 6466 * to start the I/O . 6467 */ 6468 vha->marker_needed = 1; 6469 } 6470 6471 vha->flags.online = 1; 6472 6473 ha->isp_ops->enable_intrs(ha); 6474 6475 ha->isp_abort_cnt = 0; 6476 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6477 6478 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6479 qla2x00_get_fw_version(vha); 6480 if (ha->fce) { 6481 ha->flags.fce_enabled = 1; 6482 memset(ha->fce, 0, 6483 fce_calc_size(ha->fce_bufs)); 6484 rval = qla2x00_enable_fce_trace(vha, 6485 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6486 &ha->fce_bufs); 6487 if (rval) { 6488 ql_log(ql_log_warn, vha, 0x8033, 6489 "Unable to reinitialize FCE " 6490 "(%d).\n", rval); 6491 ha->flags.fce_enabled = 0; 6492 } 6493 } 6494 6495 if (ha->eft) { 6496 memset(ha->eft, 0, EFT_SIZE); 6497 rval = qla2x00_enable_eft_trace(vha, 6498 ha->eft_dma, EFT_NUM_BUFFERS); 6499 if (rval) { 6500 ql_log(ql_log_warn, vha, 0x8034, 6501 "Unable to reinitialize EFT " 6502 "(%d).\n", rval); 6503 } 6504 } 6505 } else { /* failed the ISP abort */ 6506 vha->flags.online = 1; 6507 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6508 if (ha->isp_abort_cnt == 0) { 6509 ql_log(ql_log_fatal, vha, 0x8035, 6510 "ISP error recover failed - " 6511 "board disabled.\n"); 6512 /* 6513 * The next call disables the board 6514 * completely. 6515 */ 6516 ha->isp_ops->reset_adapter(vha); 6517 vha->flags.online = 0; 6518 clear_bit(ISP_ABORT_RETRY, 6519 &vha->dpc_flags); 6520 status = 0; 6521 } else { /* schedule another ISP abort */ 6522 ha->isp_abort_cnt--; 6523 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6524 "ISP abort - retry remaining %d.\n", 6525 ha->isp_abort_cnt); 6526 status = 1; 6527 } 6528 } else { 6529 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6530 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6531 "ISP error recovery - retrying (%d) " 6532 "more times.\n", ha->isp_abort_cnt); 6533 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6534 status = 1; 6535 } 6536 } 6537 6538 } 6539 6540 if (!status) { 6541 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6542 qla2x00_configure_hba(vha); 6543 spin_lock_irqsave(&ha->vport_slock, flags); 6544 list_for_each_entry(vp, &ha->vp_list, list) { 6545 if (vp->vp_idx) { 6546 atomic_inc(&vp->vref_count); 6547 spin_unlock_irqrestore(&ha->vport_slock, flags); 6548 6549 qla2x00_vp_abort_isp(vp); 6550 6551 spin_lock_irqsave(&ha->vport_slock, flags); 6552 atomic_dec(&vp->vref_count); 6553 } 6554 } 6555 spin_unlock_irqrestore(&ha->vport_slock, flags); 6556 6557 if (IS_QLA8031(ha)) { 6558 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6559 "Setting back fcoe driver presence.\n"); 6560 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6561 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6562 "Error while setting DRV-Presence.\n"); 6563 } 6564 } else { 6565 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6566 __func__); 6567 } 6568 6569 return(status); 6570 } 6571 6572 /* 6573 * qla2x00_restart_isp 6574 * restarts the ISP after a reset 6575 * 6576 * Input: 6577 * ha = adapter block pointer. 6578 * 6579 * Returns: 6580 * 0 = success 6581 */ 6582 static int 6583 qla2x00_restart_isp(scsi_qla_host_t *vha) 6584 { 6585 int status = 0; 6586 struct qla_hw_data *ha = vha->hw; 6587 struct req_que *req = ha->req_q_map[0]; 6588 struct rsp_que *rsp = ha->rsp_q_map[0]; 6589 6590 /* If firmware needs to be loaded */ 6591 if (qla2x00_isp_firmware(vha)) { 6592 vha->flags.online = 0; 6593 status = ha->isp_ops->chip_diag(vha); 6594 if (!status) 6595 status = qla2x00_setup_chip(vha); 6596 } 6597 6598 if (!status && !(status = qla2x00_init_rings(vha))) { 6599 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6600 ha->flags.chip_reset_done = 1; 6601 6602 /* Initialize the queues in use */ 6603 qla25xx_init_queues(ha); 6604 6605 status = qla2x00_fw_ready(vha); 6606 if (!status) { 6607 /* Issue a marker after FW becomes ready. */ 6608 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6609 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6610 } 6611 6612 /* if no cable then assume it's good */ 6613 if ((vha->device_flags & DFLG_NO_CABLE)) 6614 status = 0; 6615 } 6616 return (status); 6617 } 6618 6619 static int 6620 qla25xx_init_queues(struct qla_hw_data *ha) 6621 { 6622 struct rsp_que *rsp = NULL; 6623 struct req_que *req = NULL; 6624 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6625 int ret = -1; 6626 int i; 6627 6628 for (i = 1; i < ha->max_rsp_queues; i++) { 6629 rsp = ha->rsp_q_map[i]; 6630 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6631 rsp->options &= ~BIT_0; 6632 ret = qla25xx_init_rsp_que(base_vha, rsp); 6633 if (ret != QLA_SUCCESS) 6634 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6635 "%s Rsp que: %d init failed.\n", 6636 __func__, rsp->id); 6637 else 6638 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6639 "%s Rsp que: %d inited.\n", 6640 __func__, rsp->id); 6641 } 6642 } 6643 for (i = 1; i < ha->max_req_queues; i++) { 6644 req = ha->req_q_map[i]; 6645 if (req && test_bit(i, ha->req_qid_map)) { 6646 /* Clear outstanding commands array. */ 6647 req->options &= ~BIT_0; 6648 ret = qla25xx_init_req_que(base_vha, req); 6649 if (ret != QLA_SUCCESS) 6650 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6651 "%s Req que: %d init failed.\n", 6652 __func__, req->id); 6653 else 6654 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6655 "%s Req que: %d inited.\n", 6656 __func__, req->id); 6657 } 6658 } 6659 return ret; 6660 } 6661 6662 /* 6663 * qla2x00_reset_adapter 6664 * Reset adapter. 6665 * 6666 * Input: 6667 * ha = adapter block pointer. 6668 */ 6669 void 6670 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6671 { 6672 unsigned long flags = 0; 6673 struct qla_hw_data *ha = vha->hw; 6674 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6675 6676 vha->flags.online = 0; 6677 ha->isp_ops->disable_intrs(ha); 6678 6679 spin_lock_irqsave(&ha->hardware_lock, flags); 6680 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6681 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6682 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6683 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6684 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6685 } 6686 6687 void 6688 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6689 { 6690 unsigned long flags = 0; 6691 struct qla_hw_data *ha = vha->hw; 6692 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6693 6694 if (IS_P3P_TYPE(ha)) 6695 return; 6696 6697 vha->flags.online = 0; 6698 ha->isp_ops->disable_intrs(ha); 6699 6700 spin_lock_irqsave(&ha->hardware_lock, flags); 6701 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6702 RD_REG_DWORD(®->hccr); 6703 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6704 RD_REG_DWORD(®->hccr); 6705 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6706 6707 if (IS_NOPOLLING_TYPE(ha)) 6708 ha->isp_ops->enable_intrs(ha); 6709 } 6710 6711 /* On sparc systems, obtain port and node WWN from firmware 6712 * properties. 6713 */ 6714 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6715 struct nvram_24xx *nv) 6716 { 6717 #ifdef CONFIG_SPARC 6718 struct qla_hw_data *ha = vha->hw; 6719 struct pci_dev *pdev = ha->pdev; 6720 struct device_node *dp = pci_device_to_OF_node(pdev); 6721 const u8 *val; 6722 int len; 6723 6724 val = of_get_property(dp, "port-wwn", &len); 6725 if (val && len >= WWN_SIZE) 6726 memcpy(nv->port_name, val, WWN_SIZE); 6727 6728 val = of_get_property(dp, "node-wwn", &len); 6729 if (val && len >= WWN_SIZE) 6730 memcpy(nv->node_name, val, WWN_SIZE); 6731 #endif 6732 } 6733 6734 int 6735 qla24xx_nvram_config(scsi_qla_host_t *vha) 6736 { 6737 int rval; 6738 struct init_cb_24xx *icb; 6739 struct nvram_24xx *nv; 6740 uint32_t *dptr; 6741 uint8_t *dptr1, *dptr2; 6742 uint32_t chksum; 6743 uint16_t cnt; 6744 struct qla_hw_data *ha = vha->hw; 6745 6746 rval = QLA_SUCCESS; 6747 icb = (struct init_cb_24xx *)ha->init_cb; 6748 nv = ha->nvram; 6749 6750 /* Determine NVRAM starting address. */ 6751 if (ha->port_no == 0) { 6752 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 6753 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 6754 } else { 6755 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 6756 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 6757 } 6758 6759 ha->nvram_size = sizeof(struct nvram_24xx); 6760 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6761 6762 /* Get VPD data into cache */ 6763 ha->vpd = ha->nvram + VPD_OFFSET; 6764 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 6765 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 6766 6767 /* Get NVRAM data into cache and calculate checksum. */ 6768 dptr = (uint32_t *)nv; 6769 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 6770 ha->nvram_size); 6771 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6772 chksum += le32_to_cpu(*dptr); 6773 6774 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 6775 "Contents of NVRAM\n"); 6776 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 6777 (uint8_t *)nv, ha->nvram_size); 6778 6779 /* Bad NVRAM data, set defaults parameters. */ 6780 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6781 || nv->id[3] != ' ' || 6782 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6783 /* Reset NVRAM data. */ 6784 ql_log(ql_log_warn, vha, 0x006b, 6785 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6786 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 6787 ql_log(ql_log_warn, vha, 0x006c, 6788 "Falling back to functioning (yet invalid -- WWPN) " 6789 "defaults.\n"); 6790 6791 /* 6792 * Set default initialization control block. 6793 */ 6794 memset(nv, 0, ha->nvram_size); 6795 nv->nvram_version = cpu_to_le16(ICB_VERSION); 6796 nv->version = cpu_to_le16(ICB_VERSION); 6797 nv->frame_payload_size = 2048; 6798 nv->execution_throttle = cpu_to_le16(0xFFFF); 6799 nv->exchange_count = cpu_to_le16(0); 6800 nv->hard_address = cpu_to_le16(124); 6801 nv->port_name[0] = 0x21; 6802 nv->port_name[1] = 0x00 + ha->port_no + 1; 6803 nv->port_name[2] = 0x00; 6804 nv->port_name[3] = 0xe0; 6805 nv->port_name[4] = 0x8b; 6806 nv->port_name[5] = 0x1c; 6807 nv->port_name[6] = 0x55; 6808 nv->port_name[7] = 0x86; 6809 nv->node_name[0] = 0x20; 6810 nv->node_name[1] = 0x00; 6811 nv->node_name[2] = 0x00; 6812 nv->node_name[3] = 0xe0; 6813 nv->node_name[4] = 0x8b; 6814 nv->node_name[5] = 0x1c; 6815 nv->node_name[6] = 0x55; 6816 nv->node_name[7] = 0x86; 6817 qla24xx_nvram_wwn_from_ofw(vha, nv); 6818 nv->login_retry_count = cpu_to_le16(8); 6819 nv->interrupt_delay_timer = cpu_to_le16(0); 6820 nv->login_timeout = cpu_to_le16(0); 6821 nv->firmware_options_1 = 6822 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6823 nv->firmware_options_2 = cpu_to_le32(2 << 4); 6824 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 6825 nv->firmware_options_3 = cpu_to_le32(2 << 13); 6826 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 6827 nv->efi_parameters = cpu_to_le32(0); 6828 nv->reset_delay = 5; 6829 nv->max_luns_per_target = cpu_to_le16(128); 6830 nv->port_down_retry_count = cpu_to_le16(30); 6831 nv->link_down_timeout = cpu_to_le16(30); 6832 6833 rval = 1; 6834 } 6835 6836 if (qla_tgt_mode_enabled(vha)) { 6837 /* Don't enable full login after initial LIP */ 6838 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 6839 /* Don't enable LIP full login for initiator */ 6840 nv->host_p &= cpu_to_le32(~BIT_10); 6841 } 6842 6843 qlt_24xx_config_nvram_stage1(vha, nv); 6844 6845 /* Reset Initialization control block */ 6846 memset(icb, 0, ha->init_cb_size); 6847 6848 /* Copy 1st segment. */ 6849 dptr1 = (uint8_t *)icb; 6850 dptr2 = (uint8_t *)&nv->version; 6851 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6852 while (cnt--) 6853 *dptr1++ = *dptr2++; 6854 6855 icb->login_retry_count = nv->login_retry_count; 6856 icb->link_down_on_nos = nv->link_down_on_nos; 6857 6858 /* Copy 2nd segment. */ 6859 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6860 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6861 cnt = (uint8_t *)&icb->reserved_3 - 6862 (uint8_t *)&icb->interrupt_delay_timer; 6863 while (cnt--) 6864 *dptr1++ = *dptr2++; 6865 6866 /* 6867 * Setup driver NVRAM options. 6868 */ 6869 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6870 "QLA2462"); 6871 6872 qlt_24xx_config_nvram_stage2(vha, icb); 6873 6874 if (nv->host_p & cpu_to_le32(BIT_15)) { 6875 /* Use alternate WWN? */ 6876 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6877 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6878 } 6879 6880 /* Prepare nodename */ 6881 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 6882 /* 6883 * Firmware will apply the following mask if the nodename was 6884 * not provided. 6885 */ 6886 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6887 icb->node_name[0] &= 0xF0; 6888 } 6889 6890 /* Set host adapter parameters. */ 6891 ha->flags.disable_risc_code_load = 0; 6892 ha->flags.enable_lip_reset = 0; 6893 ha->flags.enable_lip_full_login = 6894 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6895 ha->flags.enable_target_reset = 6896 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6897 ha->flags.enable_led_scheme = 0; 6898 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6899 6900 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6901 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6902 6903 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 6904 sizeof(ha->fw_seriallink_options24)); 6905 6906 /* save HBA serial number */ 6907 ha->serial0 = icb->port_name[5]; 6908 ha->serial1 = icb->port_name[6]; 6909 ha->serial2 = icb->port_name[7]; 6910 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6911 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6912 6913 icb->execution_throttle = cpu_to_le16(0xFFFF); 6914 6915 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6916 6917 /* Set minimum login_timeout to 4 seconds. */ 6918 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6919 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6920 if (le16_to_cpu(nv->login_timeout) < 4) 6921 nv->login_timeout = cpu_to_le16(4); 6922 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6923 6924 /* Set minimum RATOV to 100 tenths of a second. */ 6925 ha->r_a_tov = 100; 6926 6927 ha->loop_reset_delay = nv->reset_delay; 6928 6929 /* Link Down Timeout = 0: 6930 * 6931 * When Port Down timer expires we will start returning 6932 * I/O's to OS with "DID_NO_CONNECT". 6933 * 6934 * Link Down Timeout != 0: 6935 * 6936 * The driver waits for the link to come up after link down 6937 * before returning I/Os to OS with "DID_NO_CONNECT". 6938 */ 6939 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6940 ha->loop_down_abort_time = 6941 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6942 } else { 6943 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6944 ha->loop_down_abort_time = 6945 (LOOP_DOWN_TIME - ha->link_down_timeout); 6946 } 6947 6948 /* Need enough time to try and get the port back. */ 6949 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6950 if (qlport_down_retry) 6951 ha->port_down_retry_count = qlport_down_retry; 6952 6953 /* Set login_retry_count */ 6954 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6955 if (ha->port_down_retry_count == 6956 le16_to_cpu(nv->port_down_retry_count) && 6957 ha->port_down_retry_count > 3) 6958 ha->login_retry_count = ha->port_down_retry_count; 6959 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6960 ha->login_retry_count = ha->port_down_retry_count; 6961 if (ql2xloginretrycount) 6962 ha->login_retry_count = ql2xloginretrycount; 6963 6964 /* Enable ZIO. */ 6965 if (!vha->flags.init_done) { 6966 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6967 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6968 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6969 le16_to_cpu(icb->interrupt_delay_timer): 2; 6970 } 6971 icb->firmware_options_2 &= cpu_to_le32( 6972 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6973 vha->flags.process_response_queue = 0; 6974 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6975 ha->zio_mode = QLA_ZIO_MODE_6; 6976 6977 ql_log(ql_log_info, vha, 0x006f, 6978 "ZIO mode %d enabled; timer delay (%d us).\n", 6979 ha->zio_mode, ha->zio_timer * 100); 6980 6981 icb->firmware_options_2 |= cpu_to_le32( 6982 (uint32_t)ha->zio_mode); 6983 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6984 vha->flags.process_response_queue = 1; 6985 } 6986 6987 if (rval) { 6988 ql_log(ql_log_warn, vha, 0x0070, 6989 "NVRAM configuration failed.\n"); 6990 } 6991 return (rval); 6992 } 6993 6994 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 6995 { 6996 struct qla27xx_image_status pri_image_status, sec_image_status; 6997 uint8_t valid_pri_image, valid_sec_image; 6998 uint32_t *wptr; 6999 uint32_t cnt, chksum, size; 7000 struct qla_hw_data *ha = vha->hw; 7001 7002 valid_pri_image = valid_sec_image = 1; 7003 ha->active_image = 0; 7004 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 7005 7006 if (!ha->flt_region_img_status_pri) { 7007 valid_pri_image = 0; 7008 goto check_sec_image; 7009 } 7010 7011 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 7012 ha->flt_region_img_status_pri, size); 7013 7014 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7015 ql_dbg(ql_dbg_init, vha, 0x018b, 7016 "Primary image signature (0x%x) not valid\n", 7017 pri_image_status.signature); 7018 valid_pri_image = 0; 7019 goto check_sec_image; 7020 } 7021 7022 wptr = (uint32_t *)(&pri_image_status); 7023 cnt = size; 7024 7025 for (chksum = 0; cnt--; wptr++) 7026 chksum += le32_to_cpu(*wptr); 7027 7028 if (chksum) { 7029 ql_dbg(ql_dbg_init, vha, 0x018c, 7030 "Checksum validation failed for primary image (0x%x)\n", 7031 chksum); 7032 valid_pri_image = 0; 7033 } 7034 7035 check_sec_image: 7036 if (!ha->flt_region_img_status_sec) { 7037 valid_sec_image = 0; 7038 goto check_valid_image; 7039 } 7040 7041 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7042 ha->flt_region_img_status_sec, size); 7043 7044 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7045 ql_dbg(ql_dbg_init, vha, 0x018d, 7046 "Secondary image signature(0x%x) not valid\n", 7047 sec_image_status.signature); 7048 valid_sec_image = 0; 7049 goto check_valid_image; 7050 } 7051 7052 wptr = (uint32_t *)(&sec_image_status); 7053 cnt = size; 7054 for (chksum = 0; cnt--; wptr++) 7055 chksum += le32_to_cpu(*wptr); 7056 if (chksum) { 7057 ql_dbg(ql_dbg_init, vha, 0x018e, 7058 "Checksum validation failed for secondary image (0x%x)\n", 7059 chksum); 7060 valid_sec_image = 0; 7061 } 7062 7063 check_valid_image: 7064 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7065 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7066 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7067 if (!ha->active_image || 7068 pri_image_status.generation_number < 7069 sec_image_status.generation_number) 7070 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7071 } 7072 7073 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n", 7074 ha->active_image == 0 ? "default bootld and fw" : 7075 ha->active_image == 1 ? "primary" : 7076 ha->active_image == 2 ? "secondary" : 7077 "Invalid"); 7078 7079 return ha->active_image; 7080 } 7081 7082 static int 7083 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7084 uint32_t faddr) 7085 { 7086 int rval = QLA_SUCCESS; 7087 int segments, fragment; 7088 uint32_t *dcode, dlen; 7089 uint32_t risc_addr; 7090 uint32_t risc_size; 7091 uint32_t i; 7092 struct qla_hw_data *ha = vha->hw; 7093 struct req_que *req = ha->req_q_map[0]; 7094 7095 ql_dbg(ql_dbg_init, vha, 0x008b, 7096 "FW: Loading firmware from flash (%x).\n", faddr); 7097 7098 rval = QLA_SUCCESS; 7099 7100 segments = FA_RISC_CODE_SEGMENTS; 7101 dcode = (uint32_t *)req->ring; 7102 *srisc_addr = 0; 7103 7104 if (IS_QLA27XX(ha) && 7105 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7106 faddr = ha->flt_region_fw_sec; 7107 7108 /* Validate firmware image by checking version. */ 7109 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7110 for (i = 0; i < 4; i++) 7111 dcode[i] = be32_to_cpu(dcode[i]); 7112 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7113 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7114 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7115 dcode[3] == 0)) { 7116 ql_log(ql_log_fatal, vha, 0x008c, 7117 "Unable to verify the integrity of flash firmware " 7118 "image.\n"); 7119 ql_log(ql_log_fatal, vha, 0x008d, 7120 "Firmware data: %08x %08x %08x %08x.\n", 7121 dcode[0], dcode[1], dcode[2], dcode[3]); 7122 7123 return QLA_FUNCTION_FAILED; 7124 } 7125 7126 while (segments && rval == QLA_SUCCESS) { 7127 /* Read segment's load information. */ 7128 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7129 7130 risc_addr = be32_to_cpu(dcode[2]); 7131 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7132 risc_size = be32_to_cpu(dcode[3]); 7133 7134 fragment = 0; 7135 while (risc_size > 0 && rval == QLA_SUCCESS) { 7136 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7137 if (dlen > risc_size) 7138 dlen = risc_size; 7139 7140 ql_dbg(ql_dbg_init, vha, 0x008e, 7141 "Loading risc segment@ risc addr %x " 7142 "number of dwords 0x%x offset 0x%x.\n", 7143 risc_addr, dlen, faddr); 7144 7145 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7146 for (i = 0; i < dlen; i++) 7147 dcode[i] = swab32(dcode[i]); 7148 7149 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7150 dlen); 7151 if (rval) { 7152 ql_log(ql_log_fatal, vha, 0x008f, 7153 "Failed to load segment %d of firmware.\n", 7154 fragment); 7155 return QLA_FUNCTION_FAILED; 7156 } 7157 7158 faddr += dlen; 7159 risc_addr += dlen; 7160 risc_size -= dlen; 7161 fragment++; 7162 } 7163 7164 /* Next segment. */ 7165 segments--; 7166 } 7167 7168 if (!IS_QLA27XX(ha)) 7169 return rval; 7170 7171 if (ha->fw_dump_template) 7172 vfree(ha->fw_dump_template); 7173 ha->fw_dump_template = NULL; 7174 ha->fw_dump_template_len = 0; 7175 7176 ql_dbg(ql_dbg_init, vha, 0x0161, 7177 "Loading fwdump template from %x\n", faddr); 7178 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7179 risc_size = be32_to_cpu(dcode[2]); 7180 ql_dbg(ql_dbg_init, vha, 0x0162, 7181 "-> array size %x dwords\n", risc_size); 7182 if (risc_size == 0 || risc_size == ~0) 7183 goto default_template; 7184 7185 dlen = (risc_size - 8) * sizeof(*dcode); 7186 ql_dbg(ql_dbg_init, vha, 0x0163, 7187 "-> template allocating %x bytes...\n", dlen); 7188 ha->fw_dump_template = vmalloc(dlen); 7189 if (!ha->fw_dump_template) { 7190 ql_log(ql_log_warn, vha, 0x0164, 7191 "Failed fwdump template allocate %x bytes.\n", risc_size); 7192 goto default_template; 7193 } 7194 7195 faddr += 7; 7196 risc_size -= 8; 7197 dcode = ha->fw_dump_template; 7198 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7199 for (i = 0; i < risc_size; i++) 7200 dcode[i] = le32_to_cpu(dcode[i]); 7201 7202 if (!qla27xx_fwdt_template_valid(dcode)) { 7203 ql_log(ql_log_warn, vha, 0x0165, 7204 "Failed fwdump template validate\n"); 7205 goto default_template; 7206 } 7207 7208 dlen = qla27xx_fwdt_template_size(dcode); 7209 ql_dbg(ql_dbg_init, vha, 0x0166, 7210 "-> template size %x bytes\n", dlen); 7211 if (dlen > risc_size * sizeof(*dcode)) { 7212 ql_log(ql_log_warn, vha, 0x0167, 7213 "Failed fwdump template exceeds array by %zx bytes\n", 7214 (size_t)(dlen - risc_size * sizeof(*dcode))); 7215 goto default_template; 7216 } 7217 ha->fw_dump_template_len = dlen; 7218 return rval; 7219 7220 default_template: 7221 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7222 if (ha->fw_dump_template) 7223 vfree(ha->fw_dump_template); 7224 ha->fw_dump_template = NULL; 7225 ha->fw_dump_template_len = 0; 7226 7227 dlen = qla27xx_fwdt_template_default_size(); 7228 ql_dbg(ql_dbg_init, vha, 0x0169, 7229 "-> template allocating %x bytes...\n", dlen); 7230 ha->fw_dump_template = vmalloc(dlen); 7231 if (!ha->fw_dump_template) { 7232 ql_log(ql_log_warn, vha, 0x016a, 7233 "Failed fwdump template allocate %x bytes.\n", risc_size); 7234 goto failed_template; 7235 } 7236 7237 dcode = ha->fw_dump_template; 7238 risc_size = dlen / sizeof(*dcode); 7239 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7240 for (i = 0; i < risc_size; i++) 7241 dcode[i] = be32_to_cpu(dcode[i]); 7242 7243 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7244 ql_log(ql_log_warn, vha, 0x016b, 7245 "Failed fwdump template validate\n"); 7246 goto failed_template; 7247 } 7248 7249 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7250 ql_dbg(ql_dbg_init, vha, 0x016c, 7251 "-> template size %x bytes\n", dlen); 7252 ha->fw_dump_template_len = dlen; 7253 return rval; 7254 7255 failed_template: 7256 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7257 if (ha->fw_dump_template) 7258 vfree(ha->fw_dump_template); 7259 ha->fw_dump_template = NULL; 7260 ha->fw_dump_template_len = 0; 7261 return rval; 7262 } 7263 7264 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7265 7266 int 7267 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7268 { 7269 int rval; 7270 int i, fragment; 7271 uint16_t *wcode, *fwcode; 7272 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7273 struct fw_blob *blob; 7274 struct qla_hw_data *ha = vha->hw; 7275 struct req_que *req = ha->req_q_map[0]; 7276 7277 /* Load firmware blob. */ 7278 blob = qla2x00_request_firmware(vha); 7279 if (!blob) { 7280 ql_log(ql_log_info, vha, 0x0083, 7281 "Firmware image unavailable.\n"); 7282 ql_log(ql_log_info, vha, 0x0084, 7283 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7284 return QLA_FUNCTION_FAILED; 7285 } 7286 7287 rval = QLA_SUCCESS; 7288 7289 wcode = (uint16_t *)req->ring; 7290 *srisc_addr = 0; 7291 fwcode = (uint16_t *)blob->fw->data; 7292 fwclen = 0; 7293 7294 /* Validate firmware image by checking version. */ 7295 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7296 ql_log(ql_log_fatal, vha, 0x0085, 7297 "Unable to verify integrity of firmware image (%zd).\n", 7298 blob->fw->size); 7299 goto fail_fw_integrity; 7300 } 7301 for (i = 0; i < 4; i++) 7302 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7303 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7304 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7305 wcode[2] == 0 && wcode[3] == 0)) { 7306 ql_log(ql_log_fatal, vha, 0x0086, 7307 "Unable to verify integrity of firmware image.\n"); 7308 ql_log(ql_log_fatal, vha, 0x0087, 7309 "Firmware data: %04x %04x %04x %04x.\n", 7310 wcode[0], wcode[1], wcode[2], wcode[3]); 7311 goto fail_fw_integrity; 7312 } 7313 7314 seg = blob->segs; 7315 while (*seg && rval == QLA_SUCCESS) { 7316 risc_addr = *seg; 7317 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7318 risc_size = be16_to_cpu(fwcode[3]); 7319 7320 /* Validate firmware image size. */ 7321 fwclen += risc_size * sizeof(uint16_t); 7322 if (blob->fw->size < fwclen) { 7323 ql_log(ql_log_fatal, vha, 0x0088, 7324 "Unable to verify integrity of firmware image " 7325 "(%zd).\n", blob->fw->size); 7326 goto fail_fw_integrity; 7327 } 7328 7329 fragment = 0; 7330 while (risc_size > 0 && rval == QLA_SUCCESS) { 7331 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7332 if (wlen > risc_size) 7333 wlen = risc_size; 7334 ql_dbg(ql_dbg_init, vha, 0x0089, 7335 "Loading risc segment@ risc addr %x number of " 7336 "words 0x%x.\n", risc_addr, wlen); 7337 7338 for (i = 0; i < wlen; i++) 7339 wcode[i] = swab16(fwcode[i]); 7340 7341 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7342 wlen); 7343 if (rval) { 7344 ql_log(ql_log_fatal, vha, 0x008a, 7345 "Failed to load segment %d of firmware.\n", 7346 fragment); 7347 break; 7348 } 7349 7350 fwcode += wlen; 7351 risc_addr += wlen; 7352 risc_size -= wlen; 7353 fragment++; 7354 } 7355 7356 /* Next segment. */ 7357 seg++; 7358 } 7359 return rval; 7360 7361 fail_fw_integrity: 7362 return QLA_FUNCTION_FAILED; 7363 } 7364 7365 static int 7366 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7367 { 7368 int rval; 7369 int segments, fragment; 7370 uint32_t *dcode, dlen; 7371 uint32_t risc_addr; 7372 uint32_t risc_size; 7373 uint32_t i; 7374 struct fw_blob *blob; 7375 const uint32_t *fwcode; 7376 uint32_t fwclen; 7377 struct qla_hw_data *ha = vha->hw; 7378 struct req_que *req = ha->req_q_map[0]; 7379 7380 /* Load firmware blob. */ 7381 blob = qla2x00_request_firmware(vha); 7382 if (!blob) { 7383 ql_log(ql_log_warn, vha, 0x0090, 7384 "Firmware image unavailable.\n"); 7385 ql_log(ql_log_warn, vha, 0x0091, 7386 "Firmware images can be retrieved from: " 7387 QLA_FW_URL ".\n"); 7388 7389 return QLA_FUNCTION_FAILED; 7390 } 7391 7392 ql_dbg(ql_dbg_init, vha, 0x0092, 7393 "FW: Loading via request-firmware.\n"); 7394 7395 rval = QLA_SUCCESS; 7396 7397 segments = FA_RISC_CODE_SEGMENTS; 7398 dcode = (uint32_t *)req->ring; 7399 *srisc_addr = 0; 7400 fwcode = (uint32_t *)blob->fw->data; 7401 fwclen = 0; 7402 7403 /* Validate firmware image by checking version. */ 7404 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7405 ql_log(ql_log_fatal, vha, 0x0093, 7406 "Unable to verify integrity of firmware image (%zd).\n", 7407 blob->fw->size); 7408 return QLA_FUNCTION_FAILED; 7409 } 7410 for (i = 0; i < 4; i++) 7411 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7412 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7413 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7414 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7415 dcode[3] == 0)) { 7416 ql_log(ql_log_fatal, vha, 0x0094, 7417 "Unable to verify integrity of firmware image (%zd).\n", 7418 blob->fw->size); 7419 ql_log(ql_log_fatal, vha, 0x0095, 7420 "Firmware data: %08x %08x %08x %08x.\n", 7421 dcode[0], dcode[1], dcode[2], dcode[3]); 7422 return QLA_FUNCTION_FAILED; 7423 } 7424 7425 while (segments && rval == QLA_SUCCESS) { 7426 risc_addr = be32_to_cpu(fwcode[2]); 7427 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7428 risc_size = be32_to_cpu(fwcode[3]); 7429 7430 /* Validate firmware image size. */ 7431 fwclen += risc_size * sizeof(uint32_t); 7432 if (blob->fw->size < fwclen) { 7433 ql_log(ql_log_fatal, vha, 0x0096, 7434 "Unable to verify integrity of firmware image " 7435 "(%zd).\n", blob->fw->size); 7436 return QLA_FUNCTION_FAILED; 7437 } 7438 7439 fragment = 0; 7440 while (risc_size > 0 && rval == QLA_SUCCESS) { 7441 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7442 if (dlen > risc_size) 7443 dlen = risc_size; 7444 7445 ql_dbg(ql_dbg_init, vha, 0x0097, 7446 "Loading risc segment@ risc addr %x " 7447 "number of dwords 0x%x.\n", risc_addr, dlen); 7448 7449 for (i = 0; i < dlen; i++) 7450 dcode[i] = swab32(fwcode[i]); 7451 7452 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7453 dlen); 7454 if (rval) { 7455 ql_log(ql_log_fatal, vha, 0x0098, 7456 "Failed to load segment %d of firmware.\n", 7457 fragment); 7458 return QLA_FUNCTION_FAILED; 7459 } 7460 7461 fwcode += dlen; 7462 risc_addr += dlen; 7463 risc_size -= dlen; 7464 fragment++; 7465 } 7466 7467 /* Next segment. */ 7468 segments--; 7469 } 7470 7471 if (!IS_QLA27XX(ha)) 7472 return rval; 7473 7474 if (ha->fw_dump_template) 7475 vfree(ha->fw_dump_template); 7476 ha->fw_dump_template = NULL; 7477 ha->fw_dump_template_len = 0; 7478 7479 ql_dbg(ql_dbg_init, vha, 0x171, 7480 "Loading fwdump template from %x\n", 7481 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7482 risc_size = be32_to_cpu(fwcode[2]); 7483 ql_dbg(ql_dbg_init, vha, 0x172, 7484 "-> array size %x dwords\n", risc_size); 7485 if (risc_size == 0 || risc_size == ~0) 7486 goto default_template; 7487 7488 dlen = (risc_size - 8) * sizeof(*fwcode); 7489 ql_dbg(ql_dbg_init, vha, 0x0173, 7490 "-> template allocating %x bytes...\n", dlen); 7491 ha->fw_dump_template = vmalloc(dlen); 7492 if (!ha->fw_dump_template) { 7493 ql_log(ql_log_warn, vha, 0x0174, 7494 "Failed fwdump template allocate %x bytes.\n", risc_size); 7495 goto default_template; 7496 } 7497 7498 fwcode += 7; 7499 risc_size -= 8; 7500 dcode = ha->fw_dump_template; 7501 for (i = 0; i < risc_size; i++) 7502 dcode[i] = le32_to_cpu(fwcode[i]); 7503 7504 if (!qla27xx_fwdt_template_valid(dcode)) { 7505 ql_log(ql_log_warn, vha, 0x0175, 7506 "Failed fwdump template validate\n"); 7507 goto default_template; 7508 } 7509 7510 dlen = qla27xx_fwdt_template_size(dcode); 7511 ql_dbg(ql_dbg_init, vha, 0x0176, 7512 "-> template size %x bytes\n", dlen); 7513 if (dlen > risc_size * sizeof(*fwcode)) { 7514 ql_log(ql_log_warn, vha, 0x0177, 7515 "Failed fwdump template exceeds array by %zx bytes\n", 7516 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7517 goto default_template; 7518 } 7519 ha->fw_dump_template_len = dlen; 7520 return rval; 7521 7522 default_template: 7523 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7524 if (ha->fw_dump_template) 7525 vfree(ha->fw_dump_template); 7526 ha->fw_dump_template = NULL; 7527 ha->fw_dump_template_len = 0; 7528 7529 dlen = qla27xx_fwdt_template_default_size(); 7530 ql_dbg(ql_dbg_init, vha, 0x0179, 7531 "-> template allocating %x bytes...\n", dlen); 7532 ha->fw_dump_template = vmalloc(dlen); 7533 if (!ha->fw_dump_template) { 7534 ql_log(ql_log_warn, vha, 0x017a, 7535 "Failed fwdump template allocate %x bytes.\n", risc_size); 7536 goto failed_template; 7537 } 7538 7539 dcode = ha->fw_dump_template; 7540 risc_size = dlen / sizeof(*fwcode); 7541 fwcode = qla27xx_fwdt_template_default(); 7542 for (i = 0; i < risc_size; i++) 7543 dcode[i] = be32_to_cpu(fwcode[i]); 7544 7545 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7546 ql_log(ql_log_warn, vha, 0x017b, 7547 "Failed fwdump template validate\n"); 7548 goto failed_template; 7549 } 7550 7551 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7552 ql_dbg(ql_dbg_init, vha, 0x017c, 7553 "-> template size %x bytes\n", dlen); 7554 ha->fw_dump_template_len = dlen; 7555 return rval; 7556 7557 failed_template: 7558 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7559 if (ha->fw_dump_template) 7560 vfree(ha->fw_dump_template); 7561 ha->fw_dump_template = NULL; 7562 ha->fw_dump_template_len = 0; 7563 return rval; 7564 } 7565 7566 int 7567 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7568 { 7569 int rval; 7570 7571 if (ql2xfwloadbin == 1) 7572 return qla81xx_load_risc(vha, srisc_addr); 7573 7574 /* 7575 * FW Load priority: 7576 * 1) Firmware via request-firmware interface (.bin file). 7577 * 2) Firmware residing in flash. 7578 */ 7579 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7580 if (rval == QLA_SUCCESS) 7581 return rval; 7582 7583 return qla24xx_load_risc_flash(vha, srisc_addr, 7584 vha->hw->flt_region_fw); 7585 } 7586 7587 int 7588 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7589 { 7590 int rval; 7591 struct qla_hw_data *ha = vha->hw; 7592 7593 if (ql2xfwloadbin == 2) 7594 goto try_blob_fw; 7595 7596 /* 7597 * FW Load priority: 7598 * 1) Firmware residing in flash. 7599 * 2) Firmware via request-firmware interface (.bin file). 7600 * 3) Golden-Firmware residing in flash -- limited operation. 7601 */ 7602 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7603 if (rval == QLA_SUCCESS) 7604 return rval; 7605 7606 try_blob_fw: 7607 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7608 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7609 return rval; 7610 7611 ql_log(ql_log_info, vha, 0x0099, 7612 "Attempting to fallback to golden firmware.\n"); 7613 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7614 if (rval != QLA_SUCCESS) 7615 return rval; 7616 7617 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7618 ha->flags.running_gold_fw = 1; 7619 return rval; 7620 } 7621 7622 void 7623 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7624 { 7625 int ret, retries; 7626 struct qla_hw_data *ha = vha->hw; 7627 7628 if (ha->flags.pci_channel_io_perm_failure) 7629 return; 7630 if (!IS_FWI2_CAPABLE(ha)) 7631 return; 7632 if (!ha->fw_major_version) 7633 return; 7634 if (!ha->flags.fw_started) 7635 return; 7636 7637 ret = qla2x00_stop_firmware(vha); 7638 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7639 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7640 ha->isp_ops->reset_chip(vha); 7641 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7642 continue; 7643 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7644 continue; 7645 ql_log(ql_log_info, vha, 0x8015, 7646 "Attempting retry of stop-firmware command.\n"); 7647 ret = qla2x00_stop_firmware(vha); 7648 } 7649 7650 QLA_FW_STOPPED(ha); 7651 ha->flags.fw_init_done = 0; 7652 } 7653 7654 int 7655 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7656 { 7657 int rval = QLA_SUCCESS; 7658 int rval2; 7659 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7660 struct qla_hw_data *ha = vha->hw; 7661 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7662 struct req_que *req; 7663 struct rsp_que *rsp; 7664 7665 if (!vha->vp_idx) 7666 return -EINVAL; 7667 7668 rval = qla2x00_fw_ready(base_vha); 7669 if (vha->qpair) 7670 req = vha->qpair->req; 7671 else 7672 req = ha->req_q_map[0]; 7673 rsp = req->rsp; 7674 7675 if (rval == QLA_SUCCESS) { 7676 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7677 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7678 } 7679 7680 vha->flags.management_server_logged_in = 0; 7681 7682 /* Login to SNS first */ 7683 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7684 BIT_1); 7685 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7686 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7687 ql_dbg(ql_dbg_init, vha, 0x0120, 7688 "Failed SNS login: loop_id=%x, rval2=%d\n", 7689 NPH_SNS, rval2); 7690 else 7691 ql_dbg(ql_dbg_init, vha, 0x0103, 7692 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7693 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7694 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7695 return (QLA_FUNCTION_FAILED); 7696 } 7697 7698 atomic_set(&vha->loop_down_timer, 0); 7699 atomic_set(&vha->loop_state, LOOP_UP); 7700 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7701 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7702 rval = qla2x00_loop_resync(base_vha); 7703 7704 return rval; 7705 } 7706 7707 /* 84XX Support **************************************************************/ 7708 7709 static LIST_HEAD(qla_cs84xx_list); 7710 static DEFINE_MUTEX(qla_cs84xx_mutex); 7711 7712 static struct qla_chip_state_84xx * 7713 qla84xx_get_chip(struct scsi_qla_host *vha) 7714 { 7715 struct qla_chip_state_84xx *cs84xx; 7716 struct qla_hw_data *ha = vha->hw; 7717 7718 mutex_lock(&qla_cs84xx_mutex); 7719 7720 /* Find any shared 84xx chip. */ 7721 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7722 if (cs84xx->bus == ha->pdev->bus) { 7723 kref_get(&cs84xx->kref); 7724 goto done; 7725 } 7726 } 7727 7728 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 7729 if (!cs84xx) 7730 goto done; 7731 7732 kref_init(&cs84xx->kref); 7733 spin_lock_init(&cs84xx->access_lock); 7734 mutex_init(&cs84xx->fw_update_mutex); 7735 cs84xx->bus = ha->pdev->bus; 7736 7737 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 7738 done: 7739 mutex_unlock(&qla_cs84xx_mutex); 7740 return cs84xx; 7741 } 7742 7743 static void 7744 __qla84xx_chip_release(struct kref *kref) 7745 { 7746 struct qla_chip_state_84xx *cs84xx = 7747 container_of(kref, struct qla_chip_state_84xx, kref); 7748 7749 mutex_lock(&qla_cs84xx_mutex); 7750 list_del(&cs84xx->list); 7751 mutex_unlock(&qla_cs84xx_mutex); 7752 kfree(cs84xx); 7753 } 7754 7755 void 7756 qla84xx_put_chip(struct scsi_qla_host *vha) 7757 { 7758 struct qla_hw_data *ha = vha->hw; 7759 if (ha->cs84xx) 7760 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 7761 } 7762 7763 static int 7764 qla84xx_init_chip(scsi_qla_host_t *vha) 7765 { 7766 int rval; 7767 uint16_t status[2]; 7768 struct qla_hw_data *ha = vha->hw; 7769 7770 mutex_lock(&ha->cs84xx->fw_update_mutex); 7771 7772 rval = qla84xx_verify_chip(vha, status); 7773 7774 mutex_unlock(&ha->cs84xx->fw_update_mutex); 7775 7776 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 7777 QLA_SUCCESS; 7778 } 7779 7780 /* 81XX Support **************************************************************/ 7781 7782 int 7783 qla81xx_nvram_config(scsi_qla_host_t *vha) 7784 { 7785 int rval; 7786 struct init_cb_81xx *icb; 7787 struct nvram_81xx *nv; 7788 uint32_t *dptr; 7789 uint8_t *dptr1, *dptr2; 7790 uint32_t chksum; 7791 uint16_t cnt; 7792 struct qla_hw_data *ha = vha->hw; 7793 7794 rval = QLA_SUCCESS; 7795 icb = (struct init_cb_81xx *)ha->init_cb; 7796 nv = ha->nvram; 7797 7798 /* Determine NVRAM starting address. */ 7799 ha->nvram_size = sizeof(struct nvram_81xx); 7800 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7801 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 7802 ha->vpd_size = FA_VPD_SIZE_82XX; 7803 7804 /* Get VPD data into cache */ 7805 ha->vpd = ha->nvram + VPD_OFFSET; 7806 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 7807 ha->vpd_size); 7808 7809 /* Get NVRAM data into cache and calculate checksum. */ 7810 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 7811 ha->nvram_size); 7812 dptr = (uint32_t *)nv; 7813 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7814 chksum += le32_to_cpu(*dptr); 7815 7816 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 7817 "Contents of NVRAM:\n"); 7818 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 7819 (uint8_t *)nv, ha->nvram_size); 7820 7821 /* Bad NVRAM data, set defaults parameters. */ 7822 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7823 || nv->id[3] != ' ' || 7824 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7825 /* Reset NVRAM data. */ 7826 ql_log(ql_log_info, vha, 0x0073, 7827 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 7828 "version=0x%x.\n", chksum, nv->id[0], 7829 le16_to_cpu(nv->nvram_version)); 7830 ql_log(ql_log_info, vha, 0x0074, 7831 "Falling back to functioning (yet invalid -- WWPN) " 7832 "defaults.\n"); 7833 7834 /* 7835 * Set default initialization control block. 7836 */ 7837 memset(nv, 0, ha->nvram_size); 7838 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7839 nv->version = cpu_to_le16(ICB_VERSION); 7840 nv->frame_payload_size = 2048; 7841 nv->execution_throttle = cpu_to_le16(0xFFFF); 7842 nv->exchange_count = cpu_to_le16(0); 7843 nv->port_name[0] = 0x21; 7844 nv->port_name[1] = 0x00 + ha->port_no + 1; 7845 nv->port_name[2] = 0x00; 7846 nv->port_name[3] = 0xe0; 7847 nv->port_name[4] = 0x8b; 7848 nv->port_name[5] = 0x1c; 7849 nv->port_name[6] = 0x55; 7850 nv->port_name[7] = 0x86; 7851 nv->node_name[0] = 0x20; 7852 nv->node_name[1] = 0x00; 7853 nv->node_name[2] = 0x00; 7854 nv->node_name[3] = 0xe0; 7855 nv->node_name[4] = 0x8b; 7856 nv->node_name[5] = 0x1c; 7857 nv->node_name[6] = 0x55; 7858 nv->node_name[7] = 0x86; 7859 nv->login_retry_count = cpu_to_le16(8); 7860 nv->interrupt_delay_timer = cpu_to_le16(0); 7861 nv->login_timeout = cpu_to_le16(0); 7862 nv->firmware_options_1 = 7863 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7864 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7865 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7866 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7867 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7868 nv->efi_parameters = cpu_to_le32(0); 7869 nv->reset_delay = 5; 7870 nv->max_luns_per_target = cpu_to_le16(128); 7871 nv->port_down_retry_count = cpu_to_le16(30); 7872 nv->link_down_timeout = cpu_to_le16(180); 7873 nv->enode_mac[0] = 0x00; 7874 nv->enode_mac[1] = 0xC0; 7875 nv->enode_mac[2] = 0xDD; 7876 nv->enode_mac[3] = 0x04; 7877 nv->enode_mac[4] = 0x05; 7878 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 7879 7880 rval = 1; 7881 } 7882 7883 if (IS_T10_PI_CAPABLE(ha)) 7884 nv->frame_payload_size &= ~7; 7885 7886 qlt_81xx_config_nvram_stage1(vha, nv); 7887 7888 /* Reset Initialization control block */ 7889 memset(icb, 0, ha->init_cb_size); 7890 7891 /* Copy 1st segment. */ 7892 dptr1 = (uint8_t *)icb; 7893 dptr2 = (uint8_t *)&nv->version; 7894 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7895 while (cnt--) 7896 *dptr1++ = *dptr2++; 7897 7898 icb->login_retry_count = nv->login_retry_count; 7899 7900 /* Copy 2nd segment. */ 7901 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7902 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7903 cnt = (uint8_t *)&icb->reserved_5 - 7904 (uint8_t *)&icb->interrupt_delay_timer; 7905 while (cnt--) 7906 *dptr1++ = *dptr2++; 7907 7908 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 7909 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 7910 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 7911 icb->enode_mac[0] = 0x00; 7912 icb->enode_mac[1] = 0xC0; 7913 icb->enode_mac[2] = 0xDD; 7914 icb->enode_mac[3] = 0x04; 7915 icb->enode_mac[4] = 0x05; 7916 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 7917 } 7918 7919 /* Use extended-initialization control block. */ 7920 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 7921 7922 /* 7923 * Setup driver NVRAM options. 7924 */ 7925 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7926 "QLE8XXX"); 7927 7928 qlt_81xx_config_nvram_stage2(vha, icb); 7929 7930 /* Use alternate WWN? */ 7931 if (nv->host_p & cpu_to_le32(BIT_15)) { 7932 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7933 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7934 } 7935 7936 /* Prepare nodename */ 7937 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7938 /* 7939 * Firmware will apply the following mask if the nodename was 7940 * not provided. 7941 */ 7942 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7943 icb->node_name[0] &= 0xF0; 7944 } 7945 7946 /* Set host adapter parameters. */ 7947 ha->flags.disable_risc_code_load = 0; 7948 ha->flags.enable_lip_reset = 0; 7949 ha->flags.enable_lip_full_login = 7950 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7951 ha->flags.enable_target_reset = 7952 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7953 ha->flags.enable_led_scheme = 0; 7954 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7955 7956 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7957 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7958 7959 /* save HBA serial number */ 7960 ha->serial0 = icb->port_name[5]; 7961 ha->serial1 = icb->port_name[6]; 7962 ha->serial2 = icb->port_name[7]; 7963 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7964 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7965 7966 icb->execution_throttle = cpu_to_le16(0xFFFF); 7967 7968 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7969 7970 /* Set minimum login_timeout to 4 seconds. */ 7971 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7972 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7973 if (le16_to_cpu(nv->login_timeout) < 4) 7974 nv->login_timeout = cpu_to_le16(4); 7975 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7976 7977 /* Set minimum RATOV to 100 tenths of a second. */ 7978 ha->r_a_tov = 100; 7979 7980 ha->loop_reset_delay = nv->reset_delay; 7981 7982 /* Link Down Timeout = 0: 7983 * 7984 * When Port Down timer expires we will start returning 7985 * I/O's to OS with "DID_NO_CONNECT". 7986 * 7987 * Link Down Timeout != 0: 7988 * 7989 * The driver waits for the link to come up after link down 7990 * before returning I/Os to OS with "DID_NO_CONNECT". 7991 */ 7992 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7993 ha->loop_down_abort_time = 7994 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7995 } else { 7996 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7997 ha->loop_down_abort_time = 7998 (LOOP_DOWN_TIME - ha->link_down_timeout); 7999 } 8000 8001 /* Need enough time to try and get the port back. */ 8002 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8003 if (qlport_down_retry) 8004 ha->port_down_retry_count = qlport_down_retry; 8005 8006 /* Set login_retry_count */ 8007 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8008 if (ha->port_down_retry_count == 8009 le16_to_cpu(nv->port_down_retry_count) && 8010 ha->port_down_retry_count > 3) 8011 ha->login_retry_count = ha->port_down_retry_count; 8012 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8013 ha->login_retry_count = ha->port_down_retry_count; 8014 if (ql2xloginretrycount) 8015 ha->login_retry_count = ql2xloginretrycount; 8016 8017 /* if not running MSI-X we need handshaking on interrupts */ 8018 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8019 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8020 8021 /* Enable ZIO. */ 8022 if (!vha->flags.init_done) { 8023 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8024 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8025 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8026 le16_to_cpu(icb->interrupt_delay_timer): 2; 8027 } 8028 icb->firmware_options_2 &= cpu_to_le32( 8029 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8030 vha->flags.process_response_queue = 0; 8031 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8032 ha->zio_mode = QLA_ZIO_MODE_6; 8033 8034 ql_log(ql_log_info, vha, 0x0075, 8035 "ZIO mode %d enabled; timer delay (%d us).\n", 8036 ha->zio_mode, 8037 ha->zio_timer * 100); 8038 8039 icb->firmware_options_2 |= cpu_to_le32( 8040 (uint32_t)ha->zio_mode); 8041 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8042 vha->flags.process_response_queue = 1; 8043 } 8044 8045 /* enable RIDA Format2 */ 8046 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 8047 icb->firmware_options_3 |= BIT_0; 8048 8049 if (IS_QLA27XX(ha)) { 8050 icb->firmware_options_3 |= BIT_8; 8051 ql_dbg(ql_log_info, vha, 0x0075, 8052 "Enabling direct connection.\n"); 8053 } 8054 8055 if (rval) { 8056 ql_log(ql_log_warn, vha, 0x0076, 8057 "NVRAM configuration failed.\n"); 8058 } 8059 return (rval); 8060 } 8061 8062 int 8063 qla82xx_restart_isp(scsi_qla_host_t *vha) 8064 { 8065 int status, rval; 8066 struct qla_hw_data *ha = vha->hw; 8067 struct req_que *req = ha->req_q_map[0]; 8068 struct rsp_que *rsp = ha->rsp_q_map[0]; 8069 struct scsi_qla_host *vp; 8070 unsigned long flags; 8071 8072 status = qla2x00_init_rings(vha); 8073 if (!status) { 8074 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8075 ha->flags.chip_reset_done = 1; 8076 8077 status = qla2x00_fw_ready(vha); 8078 if (!status) { 8079 /* Issue a marker after FW becomes ready. */ 8080 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8081 vha->flags.online = 1; 8082 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8083 } 8084 8085 /* if no cable then assume it's good */ 8086 if ((vha->device_flags & DFLG_NO_CABLE)) 8087 status = 0; 8088 } 8089 8090 if (!status) { 8091 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8092 8093 if (!atomic_read(&vha->loop_down_timer)) { 8094 /* 8095 * Issue marker command only when we are going 8096 * to start the I/O . 8097 */ 8098 vha->marker_needed = 1; 8099 } 8100 8101 ha->isp_ops->enable_intrs(ha); 8102 8103 ha->isp_abort_cnt = 0; 8104 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8105 8106 /* Update the firmware version */ 8107 status = qla82xx_check_md_needed(vha); 8108 8109 if (ha->fce) { 8110 ha->flags.fce_enabled = 1; 8111 memset(ha->fce, 0, 8112 fce_calc_size(ha->fce_bufs)); 8113 rval = qla2x00_enable_fce_trace(vha, 8114 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8115 &ha->fce_bufs); 8116 if (rval) { 8117 ql_log(ql_log_warn, vha, 0x8001, 8118 "Unable to reinitialize FCE (%d).\n", 8119 rval); 8120 ha->flags.fce_enabled = 0; 8121 } 8122 } 8123 8124 if (ha->eft) { 8125 memset(ha->eft, 0, EFT_SIZE); 8126 rval = qla2x00_enable_eft_trace(vha, 8127 ha->eft_dma, EFT_NUM_BUFFERS); 8128 if (rval) { 8129 ql_log(ql_log_warn, vha, 0x8010, 8130 "Unable to reinitialize EFT (%d).\n", 8131 rval); 8132 } 8133 } 8134 } 8135 8136 if (!status) { 8137 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8138 "qla82xx_restart_isp succeeded.\n"); 8139 8140 spin_lock_irqsave(&ha->vport_slock, flags); 8141 list_for_each_entry(vp, &ha->vp_list, list) { 8142 if (vp->vp_idx) { 8143 atomic_inc(&vp->vref_count); 8144 spin_unlock_irqrestore(&ha->vport_slock, flags); 8145 8146 qla2x00_vp_abort_isp(vp); 8147 8148 spin_lock_irqsave(&ha->vport_slock, flags); 8149 atomic_dec(&vp->vref_count); 8150 } 8151 } 8152 spin_unlock_irqrestore(&ha->vport_slock, flags); 8153 8154 } else { 8155 ql_log(ql_log_warn, vha, 0x8016, 8156 "qla82xx_restart_isp **** FAILED ****.\n"); 8157 } 8158 8159 return status; 8160 } 8161 8162 void 8163 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8164 { 8165 struct qla_hw_data *ha = vha->hw; 8166 8167 /* Hold status IOCBs until ABTS response received. */ 8168 if (ql2xfwholdabts) 8169 ha->fw_options[3] |= BIT_12; 8170 8171 /* Set Retry FLOGI in case of P2P connection */ 8172 if (ha->operating_mode == P2P) { 8173 ha->fw_options[2] |= BIT_3; 8174 ql_dbg(ql_dbg_disc, vha, 0x2103, 8175 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8176 __func__, ha->fw_options[2]); 8177 } 8178 8179 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8180 if (ql2xmvasynctoatio) { 8181 if (qla_tgt_mode_enabled(vha) || 8182 qla_dual_mode_enabled(vha)) 8183 ha->fw_options[2] |= BIT_11; 8184 else 8185 ha->fw_options[2] &= ~BIT_11; 8186 } 8187 8188 if (qla_tgt_mode_enabled(vha) || 8189 qla_dual_mode_enabled(vha)) { 8190 /* FW auto send SCSI status during */ 8191 ha->fw_options[1] |= BIT_8; 8192 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8193 8194 /* FW perform Exchange validation */ 8195 ha->fw_options[2] |= BIT_4; 8196 } else { 8197 ha->fw_options[1] &= ~BIT_8; 8198 ha->fw_options[10] &= 0x00ff; 8199 8200 ha->fw_options[2] &= ~BIT_4; 8201 } 8202 8203 if (ql2xetsenable) { 8204 /* Enable ETS Burst. */ 8205 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8206 ha->fw_options[2] |= BIT_9; 8207 } 8208 8209 ql_dbg(ql_dbg_init, vha, 0x00e9, 8210 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8211 __func__, ha->fw_options[1], ha->fw_options[2], 8212 ha->fw_options[3], vha->host->active_mode); 8213 8214 qla2x00_set_fw_options(vha, ha->fw_options); 8215 } 8216 8217 /* 8218 * qla24xx_get_fcp_prio 8219 * Gets the fcp cmd priority value for the logged in port. 8220 * Looks for a match of the port descriptors within 8221 * each of the fcp prio config entries. If a match is found, 8222 * the tag (priority) value is returned. 8223 * 8224 * Input: 8225 * vha = scsi host structure pointer. 8226 * fcport = port structure pointer. 8227 * 8228 * Return: 8229 * non-zero (if found) 8230 * -1 (if not found) 8231 * 8232 * Context: 8233 * Kernel context 8234 */ 8235 static int 8236 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8237 { 8238 int i, entries; 8239 uint8_t pid_match, wwn_match; 8240 int priority; 8241 uint32_t pid1, pid2; 8242 uint64_t wwn1, wwn2; 8243 struct qla_fcp_prio_entry *pri_entry; 8244 struct qla_hw_data *ha = vha->hw; 8245 8246 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8247 return -1; 8248 8249 priority = -1; 8250 entries = ha->fcp_prio_cfg->num_entries; 8251 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8252 8253 for (i = 0; i < entries; i++) { 8254 pid_match = wwn_match = 0; 8255 8256 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8257 pri_entry++; 8258 continue; 8259 } 8260 8261 /* check source pid for a match */ 8262 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8263 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8264 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8265 if (pid1 == INVALID_PORT_ID) 8266 pid_match++; 8267 else if (pid1 == pid2) 8268 pid_match++; 8269 } 8270 8271 /* check destination pid for a match */ 8272 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8273 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8274 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8275 if (pid1 == INVALID_PORT_ID) 8276 pid_match++; 8277 else if (pid1 == pid2) 8278 pid_match++; 8279 } 8280 8281 /* check source WWN for a match */ 8282 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8283 wwn1 = wwn_to_u64(vha->port_name); 8284 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8285 if (wwn2 == (uint64_t)-1) 8286 wwn_match++; 8287 else if (wwn1 == wwn2) 8288 wwn_match++; 8289 } 8290 8291 /* check destination WWN for a match */ 8292 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8293 wwn1 = wwn_to_u64(fcport->port_name); 8294 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8295 if (wwn2 == (uint64_t)-1) 8296 wwn_match++; 8297 else if (wwn1 == wwn2) 8298 wwn_match++; 8299 } 8300 8301 if (pid_match == 2 || wwn_match == 2) { 8302 /* Found a matching entry */ 8303 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8304 priority = pri_entry->tag; 8305 break; 8306 } 8307 8308 pri_entry++; 8309 } 8310 8311 return priority; 8312 } 8313 8314 /* 8315 * qla24xx_update_fcport_fcp_prio 8316 * Activates fcp priority for the logged in fc port 8317 * 8318 * Input: 8319 * vha = scsi host structure pointer. 8320 * fcp = port structure pointer. 8321 * 8322 * Return: 8323 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8324 * 8325 * Context: 8326 * Kernel context. 8327 */ 8328 int 8329 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8330 { 8331 int ret; 8332 int priority; 8333 uint16_t mb[5]; 8334 8335 if (fcport->port_type != FCT_TARGET || 8336 fcport->loop_id == FC_NO_LOOP_ID) 8337 return QLA_FUNCTION_FAILED; 8338 8339 priority = qla24xx_get_fcp_prio(vha, fcport); 8340 if (priority < 0) 8341 return QLA_FUNCTION_FAILED; 8342 8343 if (IS_P3P_TYPE(vha->hw)) { 8344 fcport->fcp_prio = priority & 0xf; 8345 return QLA_SUCCESS; 8346 } 8347 8348 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8349 if (ret == QLA_SUCCESS) { 8350 if (fcport->fcp_prio != priority) 8351 ql_dbg(ql_dbg_user, vha, 0x709e, 8352 "Updated FCP_CMND priority - value=%d loop_id=%d " 8353 "port_id=%02x%02x%02x.\n", priority, 8354 fcport->loop_id, fcport->d_id.b.domain, 8355 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8356 fcport->fcp_prio = priority & 0xf; 8357 } else 8358 ql_dbg(ql_dbg_user, vha, 0x704f, 8359 "Unable to update FCP_CMND priority - ret=0x%x for " 8360 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8361 fcport->d_id.b.domain, fcport->d_id.b.area, 8362 fcport->d_id.b.al_pa); 8363 return ret; 8364 } 8365 8366 /* 8367 * qla24xx_update_all_fcp_prio 8368 * Activates fcp priority for all the logged in ports 8369 * 8370 * Input: 8371 * ha = adapter block pointer. 8372 * 8373 * Return: 8374 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8375 * 8376 * Context: 8377 * Kernel context. 8378 */ 8379 int 8380 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8381 { 8382 int ret; 8383 fc_port_t *fcport; 8384 8385 ret = QLA_FUNCTION_FAILED; 8386 /* We need to set priority for all logged in ports */ 8387 list_for_each_entry(fcport, &vha->vp_fcports, list) 8388 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8389 8390 return ret; 8391 } 8392 8393 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8394 int vp_idx, bool startqp) 8395 { 8396 int rsp_id = 0; 8397 int req_id = 0; 8398 int i; 8399 struct qla_hw_data *ha = vha->hw; 8400 uint16_t qpair_id = 0; 8401 struct qla_qpair *qpair = NULL; 8402 struct qla_msix_entry *msix; 8403 8404 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8405 ql_log(ql_log_warn, vha, 0x00181, 8406 "FW/Driver is not multi-queue capable.\n"); 8407 return NULL; 8408 } 8409 8410 if (ql2xmqsupport || ql2xnvmeenable) { 8411 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8412 if (qpair == NULL) { 8413 ql_log(ql_log_warn, vha, 0x0182, 8414 "Failed to allocate memory for queue pair.\n"); 8415 return NULL; 8416 } 8417 memset(qpair, 0, sizeof(struct qla_qpair)); 8418 8419 qpair->hw = vha->hw; 8420 qpair->vha = vha; 8421 qpair->qp_lock_ptr = &qpair->qp_lock; 8422 spin_lock_init(&qpair->qp_lock); 8423 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8424 8425 /* Assign available que pair id */ 8426 mutex_lock(&ha->mq_lock); 8427 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8428 if (ha->num_qpairs >= ha->max_qpairs) { 8429 mutex_unlock(&ha->mq_lock); 8430 ql_log(ql_log_warn, vha, 0x0183, 8431 "No resources to create additional q pair.\n"); 8432 goto fail_qid_map; 8433 } 8434 ha->num_qpairs++; 8435 set_bit(qpair_id, ha->qpair_qid_map); 8436 ha->queue_pair_map[qpair_id] = qpair; 8437 qpair->id = qpair_id; 8438 qpair->vp_idx = vp_idx; 8439 qpair->fw_started = ha->flags.fw_started; 8440 INIT_LIST_HEAD(&qpair->hints_list); 8441 qpair->chip_reset = ha->base_qpair->chip_reset; 8442 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8443 qpair->enable_explicit_conf = 8444 ha->base_qpair->enable_explicit_conf; 8445 8446 for (i = 0; i < ha->msix_count; i++) { 8447 msix = &ha->msix_entries[i]; 8448 if (msix->in_use) 8449 continue; 8450 qpair->msix = msix; 8451 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8452 "Vector %x selected for qpair\n", msix->vector); 8453 break; 8454 } 8455 if (!qpair->msix) { 8456 ql_log(ql_log_warn, vha, 0x0184, 8457 "Out of MSI-X vectors!.\n"); 8458 goto fail_msix; 8459 } 8460 8461 qpair->msix->in_use = 1; 8462 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8463 qpair->pdev = ha->pdev; 8464 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8465 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8466 8467 mutex_unlock(&ha->mq_lock); 8468 8469 /* Create response queue first */ 8470 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8471 if (!rsp_id) { 8472 ql_log(ql_log_warn, vha, 0x0185, 8473 "Failed to create response queue.\n"); 8474 goto fail_rsp; 8475 } 8476 8477 qpair->rsp = ha->rsp_q_map[rsp_id]; 8478 8479 /* Create request queue */ 8480 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8481 startqp); 8482 if (!req_id) { 8483 ql_log(ql_log_warn, vha, 0x0186, 8484 "Failed to create request queue.\n"); 8485 goto fail_req; 8486 } 8487 8488 qpair->req = ha->req_q_map[req_id]; 8489 qpair->rsp->req = qpair->req; 8490 qpair->rsp->qpair = qpair; 8491 /* init qpair to this cpu. Will adjust at run time. */ 8492 qla_cpu_update(qpair, smp_processor_id()); 8493 8494 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8495 if (ha->fw_attributes & BIT_4) 8496 qpair->difdix_supported = 1; 8497 } 8498 8499 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8500 if (!qpair->srb_mempool) { 8501 ql_log(ql_log_warn, vha, 0xd036, 8502 "Failed to create srb mempool for qpair %d\n", 8503 qpair->id); 8504 goto fail_mempool; 8505 } 8506 8507 /* Mark as online */ 8508 qpair->online = 1; 8509 8510 if (!vha->flags.qpairs_available) 8511 vha->flags.qpairs_available = 1; 8512 8513 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8514 "Request/Response queue pair created, id %d\n", 8515 qpair->id); 8516 ql_dbg(ql_dbg_init, vha, 0x0187, 8517 "Request/Response queue pair created, id %d\n", 8518 qpair->id); 8519 } 8520 return qpair; 8521 8522 fail_mempool: 8523 fail_req: 8524 qla25xx_delete_rsp_que(vha, qpair->rsp); 8525 fail_rsp: 8526 mutex_lock(&ha->mq_lock); 8527 qpair->msix->in_use = 0; 8528 list_del(&qpair->qp_list_elem); 8529 if (list_empty(&vha->qp_list)) 8530 vha->flags.qpairs_available = 0; 8531 fail_msix: 8532 ha->queue_pair_map[qpair_id] = NULL; 8533 clear_bit(qpair_id, ha->qpair_qid_map); 8534 ha->num_qpairs--; 8535 mutex_unlock(&ha->mq_lock); 8536 fail_qid_map: 8537 kfree(qpair); 8538 return NULL; 8539 } 8540 8541 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8542 { 8543 int ret = QLA_FUNCTION_FAILED; 8544 struct qla_hw_data *ha = qpair->hw; 8545 8546 qpair->delete_in_progress = 1; 8547 while (atomic_read(&qpair->ref_count)) 8548 msleep(500); 8549 8550 ret = qla25xx_delete_req_que(vha, qpair->req); 8551 if (ret != QLA_SUCCESS) 8552 goto fail; 8553 8554 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8555 if (ret != QLA_SUCCESS) 8556 goto fail; 8557 8558 mutex_lock(&ha->mq_lock); 8559 ha->queue_pair_map[qpair->id] = NULL; 8560 clear_bit(qpair->id, ha->qpair_qid_map); 8561 ha->num_qpairs--; 8562 list_del(&qpair->qp_list_elem); 8563 if (list_empty(&vha->qp_list)) { 8564 vha->flags.qpairs_available = 0; 8565 vha->flags.qpairs_req_created = 0; 8566 vha->flags.qpairs_rsp_created = 0; 8567 } 8568 mempool_destroy(qpair->srb_mempool); 8569 kfree(qpair); 8570 mutex_unlock(&ha->mq_lock); 8571 8572 return QLA_SUCCESS; 8573 fail: 8574 return ret; 8575 } 8576