1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 struct req_que *req; 54 unsigned long flags; 55 struct qla_hw_data *ha = sp->vha->hw; 56 57 WARN_ON_ONCE(irqs_disabled()); 58 spin_lock_irqsave(&ha->hardware_lock, flags); 59 req = sp->qpair->req; 60 req->outstanding_cmds[sp->handle] = NULL; 61 iocb = &sp->u.iocb_cmd; 62 spin_unlock_irqrestore(&ha->hardware_lock, flags); 63 iocb->timeout(sp); 64 } 65 66 void 67 qla2x00_sp_free(void *ptr) 68 { 69 srb_t *sp = ptr; 70 struct srb_iocb *iocb = &sp->u.iocb_cmd; 71 72 del_timer(&iocb->timer); 73 qla2x00_rel_sp(sp); 74 } 75 76 /* Asynchronous Login/Logout Routines -------------------------------------- */ 77 78 unsigned long 79 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 80 { 81 unsigned long tmo; 82 struct qla_hw_data *ha = vha->hw; 83 84 /* Firmware should use switch negotiated r_a_tov for timeout. */ 85 tmo = ha->r_a_tov / 10 * 2; 86 if (IS_QLAFX00(ha)) { 87 tmo = FX00_DEF_RATOV * 2; 88 } else if (!IS_FWI2_CAPABLE(ha)) { 89 /* 90 * Except for earlier ISPs where the timeout is seeded from the 91 * initialization control block. 92 */ 93 tmo = ha->login_timeout; 94 } 95 return tmo; 96 } 97 98 void 99 qla2x00_async_iocb_timeout(void *data) 100 { 101 srb_t *sp = data; 102 fc_port_t *fcport = sp->fcport; 103 struct srb_iocb *lio = &sp->u.iocb_cmd; 104 int rc, h; 105 unsigned long flags; 106 107 if (fcport) { 108 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 109 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 110 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 111 112 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 113 } else { 114 pr_info("Async-%s timeout - hdl=%x.\n", 115 sp->name, sp->handle); 116 } 117 118 switch (sp->type) { 119 case SRB_LOGIN_CMD: 120 rc = qla24xx_async_abort_cmd(sp, false); 121 if (rc) { 122 /* Retry as needed. */ 123 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 124 lio->u.logio.data[1] = 125 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 126 QLA_LOGIO_LOGIN_RETRIED : 0; 127 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 128 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 129 h++) { 130 if (sp->qpair->req->outstanding_cmds[h] == 131 sp) { 132 sp->qpair->req->outstanding_cmds[h] = 133 NULL; 134 break; 135 } 136 } 137 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 138 sp->done(sp, QLA_FUNCTION_TIMEOUT); 139 } 140 break; 141 case SRB_LOGOUT_CMD: 142 case SRB_CT_PTHRU_CMD: 143 case SRB_MB_IOCB: 144 case SRB_NACK_PLOGI: 145 case SRB_NACK_PRLI: 146 case SRB_NACK_LOGO: 147 case SRB_CTRL_VP: 148 rc = qla24xx_async_abort_cmd(sp, false); 149 if (rc) { 150 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 151 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 152 h++) { 153 if (sp->qpair->req->outstanding_cmds[h] == 154 sp) { 155 sp->qpair->req->outstanding_cmds[h] = 156 NULL; 157 break; 158 } 159 } 160 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 161 sp->done(sp, QLA_FUNCTION_TIMEOUT); 162 } 163 break; 164 } 165 } 166 167 static void 168 qla2x00_async_login_sp_done(void *ptr, int res) 169 { 170 srb_t *sp = ptr; 171 struct scsi_qla_host *vha = sp->vha; 172 struct srb_iocb *lio = &sp->u.iocb_cmd; 173 struct event_arg ea; 174 175 ql_dbg(ql_dbg_disc, vha, 0x20dd, 176 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 177 178 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 179 180 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 181 memset(&ea, 0, sizeof(ea)); 182 ea.event = FCME_PLOGI_DONE; 183 ea.fcport = sp->fcport; 184 ea.data[0] = lio->u.logio.data[0]; 185 ea.data[1] = lio->u.logio.data[1]; 186 ea.iop[0] = lio->u.logio.iop[0]; 187 ea.iop[1] = lio->u.logio.iop[1]; 188 ea.sp = sp; 189 qla2x00_fcport_event_handler(vha, &ea); 190 } 191 192 sp->free(sp); 193 } 194 195 static inline bool 196 fcport_is_smaller(fc_port_t *fcport) 197 { 198 if (wwn_to_u64(fcport->port_name) < 199 wwn_to_u64(fcport->vha->port_name)) 200 return true; 201 else 202 return false; 203 } 204 205 static inline bool 206 fcport_is_bigger(fc_port_t *fcport) 207 { 208 return !fcport_is_smaller(fcport); 209 } 210 211 int 212 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 213 uint16_t *data) 214 { 215 srb_t *sp; 216 struct srb_iocb *lio; 217 int rval = QLA_FUNCTION_FAILED; 218 219 if (!vha->flags.online) 220 goto done; 221 222 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 223 if (!sp) 224 goto done; 225 226 fcport->flags |= FCF_ASYNC_SENT; 227 fcport->logout_completed = 0; 228 229 fcport->disc_state = DSC_LOGIN_PEND; 230 sp->type = SRB_LOGIN_CMD; 231 sp->name = "login"; 232 sp->gen1 = fcport->rscn_gen; 233 sp->gen2 = fcport->login_gen; 234 235 lio = &sp->u.iocb_cmd; 236 lio->timeout = qla2x00_async_iocb_timeout; 237 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 238 239 sp->done = qla2x00_async_login_sp_done; 240 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) 241 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 242 else 243 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 244 245 if (fcport->fc4f_nvme) 246 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 247 248 ql_dbg(ql_dbg_disc, vha, 0x2072, 249 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 250 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 251 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 252 fcport->login_retry); 253 254 rval = qla2x00_start_sp(sp); 255 if (rval != QLA_SUCCESS) { 256 fcport->flags |= FCF_LOGIN_NEEDED; 257 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 258 goto done_free_sp; 259 } 260 261 return rval; 262 263 done_free_sp: 264 sp->free(sp); 265 fcport->flags &= ~FCF_ASYNC_SENT; 266 done: 267 fcport->flags &= ~FCF_ASYNC_ACTIVE; 268 return rval; 269 } 270 271 static void 272 qla2x00_async_logout_sp_done(void *ptr, int res) 273 { 274 srb_t *sp = ptr; 275 276 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 277 sp->fcport->login_gen++; 278 qlt_logo_completion_handler(sp->fcport, res); 279 sp->free(sp); 280 } 281 282 int 283 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 284 { 285 srb_t *sp; 286 struct srb_iocb *lio; 287 int rval = QLA_FUNCTION_FAILED; 288 289 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 290 return rval; 291 292 fcport->flags |= FCF_ASYNC_SENT; 293 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 294 if (!sp) 295 goto done; 296 297 sp->type = SRB_LOGOUT_CMD; 298 sp->name = "logout"; 299 300 lio = &sp->u.iocb_cmd; 301 lio->timeout = qla2x00_async_iocb_timeout; 302 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 303 304 sp->done = qla2x00_async_logout_sp_done; 305 306 ql_dbg(ql_dbg_disc, vha, 0x2070, 307 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 308 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 309 fcport->d_id.b.area, fcport->d_id.b.al_pa, 310 fcport->port_name); 311 312 rval = qla2x00_start_sp(sp); 313 if (rval != QLA_SUCCESS) 314 goto done_free_sp; 315 return rval; 316 317 done_free_sp: 318 sp->free(sp); 319 done: 320 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 321 return rval; 322 } 323 324 void 325 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 326 uint16_t *data) 327 { 328 fcport->flags &= ~FCF_ASYNC_ACTIVE; 329 /* Don't re-login in target mode */ 330 if (!fcport->tgt_session) 331 qla2x00_mark_device_lost(vha, fcport, 1, 0); 332 qlt_logo_completion_handler(fcport, data[0]); 333 } 334 335 static void 336 qla2x00_async_prlo_sp_done(void *s, int res) 337 { 338 srb_t *sp = (srb_t *)s; 339 struct srb_iocb *lio = &sp->u.iocb_cmd; 340 struct scsi_qla_host *vha = sp->vha; 341 342 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 343 if (!test_bit(UNLOADING, &vha->dpc_flags)) 344 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 345 lio->u.logio.data); 346 sp->free(sp); 347 } 348 349 int 350 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 351 { 352 srb_t *sp; 353 struct srb_iocb *lio; 354 int rval; 355 356 rval = QLA_FUNCTION_FAILED; 357 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 358 if (!sp) 359 goto done; 360 361 sp->type = SRB_PRLO_CMD; 362 sp->name = "prlo"; 363 364 lio = &sp->u.iocb_cmd; 365 lio->timeout = qla2x00_async_iocb_timeout; 366 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 367 368 sp->done = qla2x00_async_prlo_sp_done; 369 370 ql_dbg(ql_dbg_disc, vha, 0x2070, 371 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 372 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 373 fcport->d_id.b.area, fcport->d_id.b.al_pa); 374 375 rval = qla2x00_start_sp(sp); 376 if (rval != QLA_SUCCESS) 377 goto done_free_sp; 378 379 return rval; 380 381 done_free_sp: 382 sp->free(sp); 383 done: 384 fcport->flags &= ~FCF_ASYNC_ACTIVE; 385 return rval; 386 } 387 388 static 389 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 390 { 391 struct fc_port *fcport = ea->fcport; 392 393 ql_dbg(ql_dbg_disc, vha, 0x20d2, 394 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 395 __func__, fcport->port_name, fcport->disc_state, 396 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 397 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 398 399 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 400 ql_dbg(ql_dbg_disc, vha, 0x2066, 401 "%s %8phC: adisc fail: post delete\n", 402 __func__, ea->fcport->port_name); 403 /* deleted = 0 & logout_on_delete = force fw cleanup */ 404 fcport->deleted = 0; 405 fcport->logout_on_delete = 1; 406 qlt_schedule_sess_for_deletion(ea->fcport); 407 return; 408 } 409 410 if (ea->fcport->disc_state == DSC_DELETE_PEND) 411 return; 412 413 if (ea->sp->gen2 != ea->fcport->login_gen) { 414 /* target side must have changed it. */ 415 ql_dbg(ql_dbg_disc, vha, 0x20d3, 416 "%s %8phC generation changed\n", 417 __func__, ea->fcport->port_name); 418 return; 419 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 420 qla_rscn_replay(fcport); 421 qlt_schedule_sess_for_deletion(fcport); 422 return; 423 } 424 425 __qla24xx_handle_gpdb_event(vha, ea); 426 } 427 428 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 429 { 430 struct qla_work_evt *e; 431 432 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 433 if (!e) 434 return QLA_FUNCTION_FAILED; 435 436 e->u.fcport.fcport = fcport; 437 fcport->flags |= FCF_ASYNC_ACTIVE; 438 return qla2x00_post_work(vha, e); 439 } 440 441 static void 442 qla2x00_async_adisc_sp_done(void *ptr, int res) 443 { 444 srb_t *sp = ptr; 445 struct scsi_qla_host *vha = sp->vha; 446 struct event_arg ea; 447 struct srb_iocb *lio = &sp->u.iocb_cmd; 448 449 ql_dbg(ql_dbg_disc, vha, 0x2066, 450 "Async done-%s res %x %8phC\n", 451 sp->name, res, sp->fcport->port_name); 452 453 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 454 455 memset(&ea, 0, sizeof(ea)); 456 ea.event = FCME_ADISC_DONE; 457 ea.rc = res; 458 ea.data[0] = lio->u.logio.data[0]; 459 ea.data[1] = lio->u.logio.data[1]; 460 ea.iop[0] = lio->u.logio.iop[0]; 461 ea.iop[1] = lio->u.logio.iop[1]; 462 ea.fcport = sp->fcport; 463 ea.sp = sp; 464 465 qla2x00_fcport_event_handler(vha, &ea); 466 467 sp->free(sp); 468 } 469 470 int 471 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 472 uint16_t *data) 473 { 474 srb_t *sp; 475 struct srb_iocb *lio; 476 int rval = QLA_FUNCTION_FAILED; 477 478 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 479 return rval; 480 481 fcport->flags |= FCF_ASYNC_SENT; 482 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 483 if (!sp) 484 goto done; 485 486 sp->type = SRB_ADISC_CMD; 487 sp->name = "adisc"; 488 489 lio = &sp->u.iocb_cmd; 490 lio->timeout = qla2x00_async_iocb_timeout; 491 sp->gen1 = fcport->rscn_gen; 492 sp->gen2 = fcport->login_gen; 493 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 494 495 sp->done = qla2x00_async_adisc_sp_done; 496 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 497 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 498 499 ql_dbg(ql_dbg_disc, vha, 0x206f, 500 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 501 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 502 503 rval = qla2x00_start_sp(sp); 504 if (rval != QLA_SUCCESS) 505 goto done_free_sp; 506 507 return rval; 508 509 done_free_sp: 510 sp->free(sp); 511 done: 512 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 513 qla2x00_post_async_adisc_work(vha, fcport, data); 514 return rval; 515 } 516 517 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 518 struct event_arg *ea) 519 { 520 fc_port_t *fcport, *conflict_fcport; 521 struct get_name_list_extended *e; 522 u16 i, n, found = 0, loop_id; 523 port_id_t id; 524 u64 wwn; 525 u16 data[2]; 526 u8 current_login_state; 527 528 fcport = ea->fcport; 529 ql_dbg(ql_dbg_disc, vha, 0xffff, 530 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 531 __func__, fcport->port_name, fcport->disc_state, 532 fcport->fw_login_state, ea->rc, 533 fcport->login_gen, fcport->last_login_gen, 534 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 535 536 if (fcport->disc_state == DSC_DELETE_PEND) 537 return; 538 539 if (ea->rc) { /* rval */ 540 if (fcport->login_retry == 0) { 541 ql_dbg(ql_dbg_disc, vha, 0x20de, 542 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 543 fcport->port_name, fcport->login_retry); 544 } 545 return; 546 } 547 548 if (fcport->last_rscn_gen != fcport->rscn_gen) { 549 qla_rscn_replay(fcport); 550 qlt_schedule_sess_for_deletion(fcport); 551 return; 552 } else if (fcport->last_login_gen != fcport->login_gen) { 553 ql_dbg(ql_dbg_disc, vha, 0x20e0, 554 "%s %8phC login gen changed\n", 555 __func__, fcport->port_name); 556 return; 557 } 558 559 n = ea->data[0] / sizeof(struct get_name_list_extended); 560 561 ql_dbg(ql_dbg_disc, vha, 0x20e1, 562 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 563 __func__, __LINE__, fcport->port_name, n, 564 fcport->d_id.b.domain, fcport->d_id.b.area, 565 fcport->d_id.b.al_pa, fcport->loop_id); 566 567 for (i = 0; i < n; i++) { 568 e = &vha->gnl.l[i]; 569 wwn = wwn_to_u64(e->port_name); 570 id.b.domain = e->port_id[2]; 571 id.b.area = e->port_id[1]; 572 id.b.al_pa = e->port_id[0]; 573 id.b.rsvd_1 = 0; 574 575 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 576 continue; 577 578 if (IS_SW_RESV_ADDR(id)) 579 continue; 580 581 found = 1; 582 583 loop_id = le16_to_cpu(e->nport_handle); 584 loop_id = (loop_id & 0x7fff); 585 if (fcport->fc4f_nvme) 586 current_login_state = e->current_login_state >> 4; 587 else 588 current_login_state = e->current_login_state & 0xf; 589 590 591 ql_dbg(ql_dbg_disc, vha, 0x20e2, 592 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 593 __func__, fcport->port_name, 594 e->current_login_state, fcport->fw_login_state, 595 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa, 596 fcport->d_id.b.domain, fcport->d_id.b.area, 597 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 598 599 switch (fcport->disc_state) { 600 case DSC_DELETE_PEND: 601 case DSC_DELETED: 602 break; 603 default: 604 if ((id.b24 != fcport->d_id.b24 && 605 fcport->d_id.b24) || 606 (fcport->loop_id != FC_NO_LOOP_ID && 607 fcport->loop_id != loop_id)) { 608 ql_dbg(ql_dbg_disc, vha, 0x20e3, 609 "%s %d %8phC post del sess\n", 610 __func__, __LINE__, fcport->port_name); 611 qlt_schedule_sess_for_deletion(fcport); 612 return; 613 } 614 break; 615 } 616 617 fcport->loop_id = loop_id; 618 619 wwn = wwn_to_u64(fcport->port_name); 620 qlt_find_sess_invalidate_other(vha, wwn, 621 id, loop_id, &conflict_fcport); 622 623 if (conflict_fcport) { 624 /* 625 * Another share fcport share the same loop_id & 626 * nport id. Conflict fcport needs to finish 627 * cleanup before this fcport can proceed to login. 628 */ 629 conflict_fcport->conflict = fcport; 630 fcport->login_pause = 1; 631 } 632 633 switch (vha->hw->current_topology) { 634 default: 635 switch (current_login_state) { 636 case DSC_LS_PRLI_COMP: 637 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 638 vha, 0x20e4, "%s %d %8phC post gpdb\n", 639 __func__, __LINE__, fcport->port_name); 640 641 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 642 fcport->port_type = FCT_INITIATOR; 643 else 644 fcport->port_type = FCT_TARGET; 645 data[0] = data[1] = 0; 646 qla2x00_post_async_adisc_work(vha, fcport, 647 data); 648 break; 649 case DSC_LS_PORT_UNAVAIL: 650 default: 651 if (fcport->loop_id == FC_NO_LOOP_ID) { 652 qla2x00_find_new_loop_id(vha, fcport); 653 fcport->fw_login_state = 654 DSC_LS_PORT_UNAVAIL; 655 } 656 ql_dbg(ql_dbg_disc, vha, 0x20e5, 657 "%s %d %8phC\n", __func__, __LINE__, 658 fcport->port_name); 659 qla24xx_fcport_handle_login(vha, fcport); 660 break; 661 } 662 break; 663 case ISP_CFG_N: 664 fcport->fw_login_state = current_login_state; 665 fcport->d_id = id; 666 switch (current_login_state) { 667 case DSC_LS_PRLI_COMP: 668 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 669 fcport->port_type = FCT_INITIATOR; 670 else 671 fcport->port_type = FCT_TARGET; 672 673 data[0] = data[1] = 0; 674 qla2x00_post_async_adisc_work(vha, fcport, 675 data); 676 break; 677 case DSC_LS_PLOGI_COMP: 678 if (fcport_is_bigger(fcport)) { 679 /* local adapter is smaller */ 680 if (fcport->loop_id != FC_NO_LOOP_ID) 681 qla2x00_clear_loop_id(fcport); 682 683 fcport->loop_id = loop_id; 684 qla24xx_fcport_handle_login(vha, 685 fcport); 686 break; 687 } 688 /* fall through */ 689 default: 690 if (fcport_is_smaller(fcport)) { 691 /* local adapter is bigger */ 692 if (fcport->loop_id != FC_NO_LOOP_ID) 693 qla2x00_clear_loop_id(fcport); 694 695 fcport->loop_id = loop_id; 696 qla24xx_fcport_handle_login(vha, 697 fcport); 698 } 699 break; 700 } 701 break; 702 } /* switch (ha->current_topology) */ 703 } 704 705 if (!found) { 706 switch (vha->hw->current_topology) { 707 case ISP_CFG_F: 708 case ISP_CFG_FL: 709 for (i = 0; i < n; i++) { 710 e = &vha->gnl.l[i]; 711 id.b.domain = e->port_id[0]; 712 id.b.area = e->port_id[1]; 713 id.b.al_pa = e->port_id[2]; 714 id.b.rsvd_1 = 0; 715 loop_id = le16_to_cpu(e->nport_handle); 716 717 if (fcport->d_id.b24 == id.b24) { 718 conflict_fcport = 719 qla2x00_find_fcport_by_wwpn(vha, 720 e->port_name, 0); 721 if (conflict_fcport) { 722 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 723 vha, 0x20e5, 724 "%s %d %8phC post del sess\n", 725 __func__, __LINE__, 726 conflict_fcport->port_name); 727 qlt_schedule_sess_for_deletion 728 (conflict_fcport); 729 } 730 } 731 /* 732 * FW already picked this loop id for 733 * another fcport 734 */ 735 if (fcport->loop_id == loop_id) 736 fcport->loop_id = FC_NO_LOOP_ID; 737 } 738 qla24xx_fcport_handle_login(vha, fcport); 739 break; 740 case ISP_CFG_N: 741 fcport->disc_state = DSC_DELETED; 742 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 743 if (fcport->n2n_link_reset_cnt < 2) { 744 fcport->n2n_link_reset_cnt++; 745 /* 746 * remote port is not sending PLOGI. 747 * Reset link to kick start his state 748 * machine 749 */ 750 set_bit(N2N_LINK_RESET, 751 &vha->dpc_flags); 752 } else { 753 if (fcport->n2n_chip_reset < 1) { 754 ql_log(ql_log_info, vha, 0x705d, 755 "Chip reset to bring laser down"); 756 set_bit(ISP_ABORT_NEEDED, 757 &vha->dpc_flags); 758 fcport->n2n_chip_reset++; 759 } else { 760 ql_log(ql_log_info, vha, 0x705d, 761 "Remote port %8ph is not coming back\n", 762 fcport->port_name); 763 fcport->scan_state = 0; 764 } 765 } 766 qla2xxx_wake_dpc(vha); 767 } else { 768 /* 769 * report port suppose to do PLOGI. Give him 770 * more time. FW will catch it. 771 */ 772 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 773 } 774 break; 775 default: 776 break; 777 } 778 } 779 } /* gnl_event */ 780 781 static void 782 qla24xx_async_gnl_sp_done(void *s, int res) 783 { 784 struct srb *sp = s; 785 struct scsi_qla_host *vha = sp->vha; 786 unsigned long flags; 787 struct fc_port *fcport = NULL, *tf; 788 u16 i, n = 0, loop_id; 789 struct event_arg ea; 790 struct get_name_list_extended *e; 791 u64 wwn; 792 struct list_head h; 793 bool found = false; 794 795 ql_dbg(ql_dbg_disc, vha, 0x20e7, 796 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 797 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 798 sp->u.iocb_cmd.u.mbx.in_mb[2]); 799 800 if (res == QLA_FUNCTION_TIMEOUT) 801 return; 802 803 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 804 memset(&ea, 0, sizeof(ea)); 805 ea.sp = sp; 806 ea.rc = res; 807 ea.event = FCME_GNL_DONE; 808 809 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 810 sizeof(struct get_name_list_extended)) { 811 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 812 sizeof(struct get_name_list_extended); 813 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 814 } 815 816 for (i = 0; i < n; i++) { 817 e = &vha->gnl.l[i]; 818 loop_id = le16_to_cpu(e->nport_handle); 819 /* mask out reserve bit */ 820 loop_id = (loop_id & 0x7fff); 821 set_bit(loop_id, vha->hw->loop_id_map); 822 wwn = wwn_to_u64(e->port_name); 823 824 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 825 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 826 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 827 e->port_id[0], e->current_login_state, e->last_login_state, 828 (loop_id & 0x7fff)); 829 } 830 831 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 832 833 INIT_LIST_HEAD(&h); 834 fcport = tf = NULL; 835 if (!list_empty(&vha->gnl.fcports)) 836 list_splice_init(&vha->gnl.fcports, &h); 837 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 838 839 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 840 list_del_init(&fcport->gnl_entry); 841 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 842 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 843 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 844 ea.fcport = fcport; 845 846 qla2x00_fcport_event_handler(vha, &ea); 847 } 848 849 /* create new fcport if fw has knowledge of new sessions */ 850 for (i = 0; i < n; i++) { 851 port_id_t id; 852 u64 wwnn; 853 854 e = &vha->gnl.l[i]; 855 wwn = wwn_to_u64(e->port_name); 856 857 found = false; 858 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 859 if (!memcmp((u8 *)&wwn, fcport->port_name, 860 WWN_SIZE)) { 861 found = true; 862 break; 863 } 864 } 865 866 id.b.domain = e->port_id[2]; 867 id.b.area = e->port_id[1]; 868 id.b.al_pa = e->port_id[0]; 869 id.b.rsvd_1 = 0; 870 871 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 872 ql_dbg(ql_dbg_disc, vha, 0x2065, 873 "%s %d %8phC %06x post new sess\n", 874 __func__, __LINE__, (u8 *)&wwn, id.b24); 875 wwnn = wwn_to_u64(e->node_name); 876 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 877 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 878 } 879 } 880 881 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 882 vha->gnl.sent = 0; 883 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 884 885 sp->free(sp); 886 } 887 888 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 889 { 890 srb_t *sp; 891 struct srb_iocb *mbx; 892 int rval = QLA_FUNCTION_FAILED; 893 unsigned long flags; 894 u16 *mb; 895 896 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 897 return rval; 898 899 ql_dbg(ql_dbg_disc, vha, 0x20d9, 900 "Async-gnlist WWPN %8phC \n", fcport->port_name); 901 902 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 903 fcport->flags |= FCF_ASYNC_SENT; 904 fcport->disc_state = DSC_GNL; 905 fcport->last_rscn_gen = fcport->rscn_gen; 906 fcport->last_login_gen = fcport->login_gen; 907 908 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 909 if (vha->gnl.sent) { 910 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 911 return QLA_SUCCESS; 912 } 913 vha->gnl.sent = 1; 914 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 915 916 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 917 if (!sp) 918 goto done; 919 920 sp->type = SRB_MB_IOCB; 921 sp->name = "gnlist"; 922 sp->gen1 = fcport->rscn_gen; 923 sp->gen2 = fcport->login_gen; 924 925 mbx = &sp->u.iocb_cmd; 926 mbx->timeout = qla2x00_async_iocb_timeout; 927 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 928 929 mb = sp->u.iocb_cmd.u.mbx.out_mb; 930 mb[0] = MBC_PORT_NODE_NAME_LIST; 931 mb[1] = BIT_2 | BIT_3; 932 mb[2] = MSW(vha->gnl.ldma); 933 mb[3] = LSW(vha->gnl.ldma); 934 mb[6] = MSW(MSD(vha->gnl.ldma)); 935 mb[7] = LSW(MSD(vha->gnl.ldma)); 936 mb[8] = vha->gnl.size; 937 mb[9] = vha->vp_idx; 938 939 sp->done = qla24xx_async_gnl_sp_done; 940 941 ql_dbg(ql_dbg_disc, vha, 0x20da, 942 "Async-%s - OUT WWPN %8phC hndl %x\n", 943 sp->name, fcport->port_name, sp->handle); 944 945 rval = qla2x00_start_sp(sp); 946 if (rval != QLA_SUCCESS) 947 goto done_free_sp; 948 949 return rval; 950 951 done_free_sp: 952 sp->free(sp); 953 fcport->flags &= ~FCF_ASYNC_SENT; 954 done: 955 return rval; 956 } 957 958 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 959 { 960 struct qla_work_evt *e; 961 962 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 963 if (!e) 964 return QLA_FUNCTION_FAILED; 965 966 e->u.fcport.fcport = fcport; 967 fcport->flags |= FCF_ASYNC_ACTIVE; 968 return qla2x00_post_work(vha, e); 969 } 970 971 static 972 void qla24xx_async_gpdb_sp_done(void *s, int res) 973 { 974 struct srb *sp = s; 975 struct scsi_qla_host *vha = sp->vha; 976 struct qla_hw_data *ha = vha->hw; 977 fc_port_t *fcport = sp->fcport; 978 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 979 struct event_arg ea; 980 981 ql_dbg(ql_dbg_disc, vha, 0x20db, 982 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 983 sp->name, res, fcport->port_name, mb[1], mb[2]); 984 985 if (res == QLA_FUNCTION_TIMEOUT) { 986 dma_pool_free(sp->vha->hw->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 987 sp->u.iocb_cmd.u.mbx.in_dma); 988 return; 989 } 990 991 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 992 memset(&ea, 0, sizeof(ea)); 993 ea.event = FCME_GPDB_DONE; 994 ea.fcport = fcport; 995 ea.sp = sp; 996 997 qla2x00_fcport_event_handler(vha, &ea); 998 999 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1000 sp->u.iocb_cmd.u.mbx.in_dma); 1001 1002 sp->free(sp); 1003 } 1004 1005 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1006 { 1007 struct qla_work_evt *e; 1008 1009 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1010 if (!e) 1011 return QLA_FUNCTION_FAILED; 1012 1013 e->u.fcport.fcport = fcport; 1014 1015 return qla2x00_post_work(vha, e); 1016 } 1017 1018 static void 1019 qla2x00_async_prli_sp_done(void *ptr, int res) 1020 { 1021 srb_t *sp = ptr; 1022 struct scsi_qla_host *vha = sp->vha; 1023 struct srb_iocb *lio = &sp->u.iocb_cmd; 1024 struct event_arg ea; 1025 1026 ql_dbg(ql_dbg_disc, vha, 0x2129, 1027 "%s %8phC res %d \n", __func__, 1028 sp->fcport->port_name, res); 1029 1030 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1031 1032 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1033 memset(&ea, 0, sizeof(ea)); 1034 ea.event = FCME_PRLI_DONE; 1035 ea.fcport = sp->fcport; 1036 ea.data[0] = lio->u.logio.data[0]; 1037 ea.data[1] = lio->u.logio.data[1]; 1038 ea.iop[0] = lio->u.logio.iop[0]; 1039 ea.iop[1] = lio->u.logio.iop[1]; 1040 ea.sp = sp; 1041 1042 qla2x00_fcport_event_handler(vha, &ea); 1043 } 1044 1045 sp->free(sp); 1046 } 1047 1048 int 1049 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1050 { 1051 srb_t *sp; 1052 struct srb_iocb *lio; 1053 int rval = QLA_FUNCTION_FAILED; 1054 1055 if (!vha->flags.online) 1056 return rval; 1057 1058 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1059 fcport->fw_login_state == DSC_LS_PRLI_PEND) 1060 return rval; 1061 1062 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1063 if (!sp) 1064 return rval; 1065 1066 fcport->flags |= FCF_ASYNC_SENT; 1067 fcport->logout_completed = 0; 1068 1069 sp->type = SRB_PRLI_CMD; 1070 sp->name = "prli"; 1071 1072 lio = &sp->u.iocb_cmd; 1073 lio->timeout = qla2x00_async_iocb_timeout; 1074 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1075 1076 sp->done = qla2x00_async_prli_sp_done; 1077 lio->u.logio.flags = 0; 1078 1079 if (fcport->fc4f_nvme) 1080 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1081 1082 ql_dbg(ql_dbg_disc, vha, 0x211b, 1083 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 1084 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1085 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc"); 1086 1087 rval = qla2x00_start_sp(sp); 1088 if (rval != QLA_SUCCESS) { 1089 fcport->flags |= FCF_LOGIN_NEEDED; 1090 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1091 goto done_free_sp; 1092 } 1093 1094 return rval; 1095 1096 done_free_sp: 1097 sp->free(sp); 1098 fcport->flags &= ~FCF_ASYNC_SENT; 1099 return rval; 1100 } 1101 1102 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1103 { 1104 struct qla_work_evt *e; 1105 1106 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1107 if (!e) 1108 return QLA_FUNCTION_FAILED; 1109 1110 e->u.fcport.fcport = fcport; 1111 e->u.fcport.opt = opt; 1112 fcport->flags |= FCF_ASYNC_ACTIVE; 1113 return qla2x00_post_work(vha, e); 1114 } 1115 1116 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1117 { 1118 srb_t *sp; 1119 struct srb_iocb *mbx; 1120 int rval = QLA_FUNCTION_FAILED; 1121 u16 *mb; 1122 dma_addr_t pd_dma; 1123 struct port_database_24xx *pd; 1124 struct qla_hw_data *ha = vha->hw; 1125 1126 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1127 return rval; 1128 1129 fcport->disc_state = DSC_GPDB; 1130 1131 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1132 if (!sp) 1133 goto done; 1134 1135 fcport->flags |= FCF_ASYNC_SENT; 1136 sp->type = SRB_MB_IOCB; 1137 sp->name = "gpdb"; 1138 sp->gen1 = fcport->rscn_gen; 1139 sp->gen2 = fcport->login_gen; 1140 1141 mbx = &sp->u.iocb_cmd; 1142 mbx->timeout = qla2x00_async_iocb_timeout; 1143 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1144 1145 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1146 if (pd == NULL) { 1147 ql_log(ql_log_warn, vha, 0xd043, 1148 "Failed to allocate port database structure.\n"); 1149 goto done_free_sp; 1150 } 1151 1152 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1153 mb[0] = MBC_GET_PORT_DATABASE; 1154 mb[1] = fcport->loop_id; 1155 mb[2] = MSW(pd_dma); 1156 mb[3] = LSW(pd_dma); 1157 mb[6] = MSW(MSD(pd_dma)); 1158 mb[7] = LSW(MSD(pd_dma)); 1159 mb[9] = vha->vp_idx; 1160 mb[10] = opt; 1161 1162 mbx->u.mbx.in = (void *)pd; 1163 mbx->u.mbx.in_dma = pd_dma; 1164 1165 sp->done = qla24xx_async_gpdb_sp_done; 1166 1167 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1168 "Async-%s %8phC hndl %x opt %x\n", 1169 sp->name, fcport->port_name, sp->handle, opt); 1170 1171 rval = qla2x00_start_sp(sp); 1172 if (rval != QLA_SUCCESS) 1173 goto done_free_sp; 1174 return rval; 1175 1176 done_free_sp: 1177 if (pd) 1178 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1179 1180 sp->free(sp); 1181 fcport->flags &= ~FCF_ASYNC_SENT; 1182 done: 1183 qla24xx_post_gpdb_work(vha, fcport, opt); 1184 return rval; 1185 } 1186 1187 static 1188 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1189 { 1190 unsigned long flags; 1191 1192 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1193 ea->fcport->login_gen++; 1194 ea->fcport->deleted = 0; 1195 ea->fcport->logout_on_delete = 1; 1196 1197 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1198 vha->fcport_count++; 1199 ea->fcport->login_succ = 1; 1200 1201 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1202 qla24xx_sched_upd_fcport(ea->fcport); 1203 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1204 } else if (ea->fcport->login_succ) { 1205 /* 1206 * We have an existing session. A late RSCN delivery 1207 * must have triggered the session to be re-validate. 1208 * Session is still valid. 1209 */ 1210 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1211 "%s %d %8phC session revalidate success\n", 1212 __func__, __LINE__, ea->fcport->port_name); 1213 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1214 } 1215 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1216 } 1217 1218 static 1219 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1220 { 1221 fc_port_t *fcport = ea->fcport; 1222 struct port_database_24xx *pd; 1223 struct srb *sp = ea->sp; 1224 uint8_t ls; 1225 1226 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1227 1228 fcport->flags &= ~FCF_ASYNC_SENT; 1229 1230 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1231 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name, 1232 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme, 1233 ea->rc); 1234 1235 if (fcport->disc_state == DSC_DELETE_PEND) 1236 return; 1237 1238 if (fcport->fc4f_nvme) 1239 ls = pd->current_login_state >> 4; 1240 else 1241 ls = pd->current_login_state & 0xf; 1242 1243 if (ea->sp->gen2 != fcport->login_gen) { 1244 /* target side must have changed it. */ 1245 1246 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1247 "%s %8phC generation changed\n", 1248 __func__, fcport->port_name); 1249 return; 1250 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1251 qla_rscn_replay(fcport); 1252 qlt_schedule_sess_for_deletion(fcport); 1253 return; 1254 } 1255 1256 switch (ls) { 1257 case PDS_PRLI_COMPLETE: 1258 __qla24xx_parse_gpdb(vha, fcport, pd); 1259 break; 1260 case PDS_PLOGI_PENDING: 1261 case PDS_PLOGI_COMPLETE: 1262 case PDS_PRLI_PENDING: 1263 case PDS_PRLI2_PENDING: 1264 /* Set discovery state back to GNL to Relogin attempt */ 1265 if (qla_dual_mode_enabled(vha) || 1266 qla_ini_mode_enabled(vha)) { 1267 fcport->disc_state = DSC_GNL; 1268 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1269 } 1270 return; 1271 case PDS_LOGO_PENDING: 1272 case PDS_PORT_UNAVAILABLE: 1273 default: 1274 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1275 __func__, __LINE__, fcport->port_name); 1276 qlt_schedule_sess_for_deletion(fcport); 1277 return; 1278 } 1279 __qla24xx_handle_gpdb_event(vha, ea); 1280 } /* gpdb event */ 1281 1282 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1283 { 1284 u8 login = 0; 1285 int rc; 1286 1287 if (qla_tgt_mode_enabled(vha)) 1288 return; 1289 1290 if (qla_dual_mode_enabled(vha)) { 1291 if (N2N_TOPO(vha->hw)) { 1292 u64 mywwn, wwn; 1293 1294 mywwn = wwn_to_u64(vha->port_name); 1295 wwn = wwn_to_u64(fcport->port_name); 1296 if (mywwn > wwn) 1297 login = 1; 1298 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1299 && time_after_eq(jiffies, 1300 fcport->plogi_nack_done_deadline)) 1301 login = 1; 1302 } else { 1303 login = 1; 1304 } 1305 } else { 1306 /* initiator mode */ 1307 login = 1; 1308 } 1309 1310 if (login && fcport->login_retry) { 1311 fcport->login_retry--; 1312 if (fcport->loop_id == FC_NO_LOOP_ID) { 1313 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1314 rc = qla2x00_find_new_loop_id(vha, fcport); 1315 if (rc) { 1316 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1317 "%s %d %8phC post del sess - out of loopid\n", 1318 __func__, __LINE__, fcport->port_name); 1319 fcport->scan_state = 0; 1320 qlt_schedule_sess_for_deletion(fcport); 1321 return; 1322 } 1323 } 1324 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1325 "%s %d %8phC post login\n", 1326 __func__, __LINE__, fcport->port_name); 1327 qla2x00_post_async_login_work(vha, fcport, NULL); 1328 } 1329 } 1330 1331 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1332 { 1333 u16 data[2]; 1334 u64 wwn; 1335 u16 sec; 1336 1337 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8, 1338 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1339 __func__, fcport->port_name, fcport->disc_state, 1340 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1341 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1342 fcport->login_gen, fcport->loop_id, fcport->scan_state); 1343 1344 if (fcport->scan_state != QLA_FCPORT_FOUND) 1345 return 0; 1346 1347 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1348 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1349 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1350 return 0; 1351 1352 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1353 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1354 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1355 return 0; 1356 } 1357 } 1358 1359 /* for pure Target Mode. Login will not be initiated */ 1360 if (vha->host->active_mode == MODE_TARGET) 1361 return 0; 1362 1363 if (fcport->flags & FCF_ASYNC_SENT) { 1364 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1365 return 0; 1366 } 1367 1368 switch (fcport->disc_state) { 1369 case DSC_DELETED: 1370 wwn = wwn_to_u64(fcport->node_name); 1371 switch (vha->hw->current_topology) { 1372 case ISP_CFG_N: 1373 if (fcport_is_smaller(fcport)) { 1374 /* this adapter is bigger */ 1375 if (fcport->login_retry) { 1376 if (fcport->loop_id == FC_NO_LOOP_ID) { 1377 qla2x00_find_new_loop_id(vha, 1378 fcport); 1379 fcport->fw_login_state = 1380 DSC_LS_PORT_UNAVAIL; 1381 } 1382 fcport->login_retry--; 1383 qla_post_els_plogi_work(vha, fcport); 1384 } else { 1385 ql_log(ql_log_info, vha, 0x705d, 1386 "Unable to reach remote port %8phC", 1387 fcport->port_name); 1388 } 1389 } else { 1390 qla24xx_post_gnl_work(vha, fcport); 1391 } 1392 break; 1393 default: 1394 if (wwn == 0) { 1395 ql_dbg(ql_dbg_disc, vha, 0xffff, 1396 "%s %d %8phC post GNNID\n", 1397 __func__, __LINE__, fcport->port_name); 1398 qla24xx_post_gnnid_work(vha, fcport); 1399 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1400 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1401 "%s %d %8phC post gnl\n", 1402 __func__, __LINE__, fcport->port_name); 1403 qla24xx_post_gnl_work(vha, fcport); 1404 } else { 1405 qla_chk_n2n_b4_login(vha, fcport); 1406 } 1407 break; 1408 } 1409 break; 1410 1411 case DSC_GNL: 1412 switch (vha->hw->current_topology) { 1413 case ISP_CFG_N: 1414 if ((fcport->current_login_state & 0xf) == 0x6) { 1415 ql_dbg(ql_dbg_disc, vha, 0x2118, 1416 "%s %d %8phC post GPDB work\n", 1417 __func__, __LINE__, fcport->port_name); 1418 fcport->chip_reset = 1419 vha->hw->base_qpair->chip_reset; 1420 qla24xx_post_gpdb_work(vha, fcport, 0); 1421 } else { 1422 ql_dbg(ql_dbg_disc, vha, 0x2118, 1423 "%s %d %8phC post NVMe PRLI\n", 1424 __func__, __LINE__, fcport->port_name); 1425 qla24xx_post_prli_work(vha, fcport); 1426 } 1427 break; 1428 default: 1429 if (fcport->login_pause) { 1430 fcport->last_rscn_gen = fcport->rscn_gen; 1431 fcport->last_login_gen = fcport->login_gen; 1432 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1433 break; 1434 } 1435 qla_chk_n2n_b4_login(vha, fcport); 1436 break; 1437 } 1438 break; 1439 1440 case DSC_LOGIN_FAILED: 1441 if (N2N_TOPO(vha->hw)) 1442 qla_chk_n2n_b4_login(vha, fcport); 1443 else 1444 qlt_schedule_sess_for_deletion(fcport); 1445 break; 1446 1447 case DSC_LOGIN_COMPLETE: 1448 /* recheck login state */ 1449 data[0] = data[1] = 0; 1450 qla2x00_post_async_adisc_work(vha, fcport, data); 1451 break; 1452 1453 case DSC_LOGIN_PEND: 1454 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1455 qla24xx_post_prli_work(vha, fcport); 1456 break; 1457 1458 case DSC_UPD_FCPORT: 1459 sec = jiffies_to_msecs(jiffies - 1460 fcport->jiffies_at_registration)/1000; 1461 if (fcport->sec_since_registration < sec && sec && 1462 !(sec % 60)) { 1463 fcport->sec_since_registration = sec; 1464 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1465 "%s %8phC - Slow Rport registration(%d Sec)\n", 1466 __func__, fcport->port_name, sec); 1467 } 1468 1469 if (fcport->next_disc_state != DSC_DELETE_PEND) 1470 fcport->next_disc_state = DSC_ADISC; 1471 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1472 break; 1473 1474 default: 1475 break; 1476 } 1477 1478 return 0; 1479 } 1480 1481 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1482 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1483 { 1484 struct qla_work_evt *e; 1485 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1486 if (!e) 1487 return QLA_FUNCTION_FAILED; 1488 1489 e->u.new_sess.id = *id; 1490 e->u.new_sess.pla = pla; 1491 e->u.new_sess.fc4_type = fc4_type; 1492 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1493 if (node_name) 1494 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1495 1496 return qla2x00_post_work(vha, e); 1497 } 1498 1499 static 1500 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1501 struct event_arg *ea) 1502 { 1503 fc_port_t *fcport = ea->fcport; 1504 1505 ql_dbg(ql_dbg_disc, vha, 0x2102, 1506 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1507 __func__, fcport->port_name, fcport->disc_state, 1508 fcport->fw_login_state, fcport->login_pause, 1509 fcport->deleted, fcport->conflict, 1510 fcport->last_rscn_gen, fcport->rscn_gen, 1511 fcport->last_login_gen, fcport->login_gen, 1512 fcport->flags); 1513 1514 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1515 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1516 return; 1517 1518 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1519 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1520 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1521 return; 1522 } 1523 } 1524 1525 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1526 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1527 __func__, __LINE__, fcport->port_name); 1528 1529 return; 1530 } 1531 1532 qla24xx_fcport_handle_login(vha, fcport); 1533 } 1534 1535 1536 static void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1537 struct event_arg *ea) 1538 { 1539 ql_dbg(ql_dbg_disc, vha, 0x2118, 1540 "%s %d %8phC post PRLI\n", 1541 __func__, __LINE__, ea->fcport->port_name); 1542 qla24xx_post_prli_work(vha, ea->fcport); 1543 } 1544 1545 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1546 { 1547 fc_port_t *fcport; 1548 1549 switch (ea->event) { 1550 case FCME_RELOGIN: 1551 if (test_bit(UNLOADING, &vha->dpc_flags)) 1552 return; 1553 1554 qla24xx_handle_relogin_event(vha, ea); 1555 break; 1556 case FCME_RSCN: 1557 if (test_bit(UNLOADING, &vha->dpc_flags)) 1558 return; 1559 { 1560 unsigned long flags; 1561 fcport = qla2x00_find_fcport_by_nportid 1562 (vha, &ea->id, 1); 1563 if (fcport) { 1564 fcport->scan_needed = 1; 1565 fcport->rscn_gen++; 1566 } 1567 1568 spin_lock_irqsave(&vha->work_lock, flags); 1569 if (vha->scan.scan_flags == 0) { 1570 ql_dbg(ql_dbg_disc, vha, 0xffff, 1571 "%s: schedule\n", __func__); 1572 vha->scan.scan_flags |= SF_QUEUED; 1573 schedule_delayed_work(&vha->scan.scan_work, 5); 1574 } 1575 spin_unlock_irqrestore(&vha->work_lock, flags); 1576 } 1577 break; 1578 case FCME_GNL_DONE: 1579 qla24xx_handle_gnl_done_event(vha, ea); 1580 break; 1581 case FCME_GPSC_DONE: 1582 qla24xx_handle_gpsc_event(vha, ea); 1583 break; 1584 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1585 qla24xx_handle_plogi_done_event(vha, ea); 1586 break; 1587 case FCME_PRLI_DONE: 1588 qla24xx_handle_prli_done_event(vha, ea); 1589 break; 1590 case FCME_GPDB_DONE: 1591 qla24xx_handle_gpdb_event(vha, ea); 1592 break; 1593 case FCME_GPNID_DONE: 1594 qla24xx_handle_gpnid_event(vha, ea); 1595 break; 1596 case FCME_GFFID_DONE: 1597 qla24xx_handle_gffid_event(vha, ea); 1598 break; 1599 case FCME_ADISC_DONE: 1600 qla24xx_handle_adisc_event(vha, ea); 1601 break; 1602 case FCME_GNNID_DONE: 1603 qla24xx_handle_gnnid_event(vha, ea); 1604 break; 1605 case FCME_GFPNID_DONE: 1606 qla24xx_handle_gfpnid_event(vha, ea); 1607 break; 1608 case FCME_ELS_PLOGI_DONE: 1609 qla_handle_els_plogi_done(vha, ea); 1610 break; 1611 default: 1612 BUG_ON(1); 1613 break; 1614 } 1615 } 1616 1617 /* 1618 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1619 * to be consumed by the fcport 1620 */ 1621 void qla_rscn_replay(fc_port_t *fcport) 1622 { 1623 struct event_arg ea; 1624 1625 switch (fcport->disc_state) { 1626 case DSC_DELETE_PEND: 1627 return; 1628 default: 1629 break; 1630 } 1631 1632 if (fcport->scan_needed) { 1633 memset(&ea, 0, sizeof(ea)); 1634 ea.event = FCME_RSCN; 1635 ea.id = fcport->d_id; 1636 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1637 qla2x00_fcport_event_handler(fcport->vha, &ea); 1638 } 1639 } 1640 1641 static void 1642 qla2x00_tmf_iocb_timeout(void *data) 1643 { 1644 srb_t *sp = data; 1645 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1646 1647 tmf->u.tmf.comp_status = CS_TIMEOUT; 1648 complete(&tmf->u.tmf.comp); 1649 } 1650 1651 static void 1652 qla2x00_tmf_sp_done(void *ptr, int res) 1653 { 1654 srb_t *sp = ptr; 1655 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1656 1657 complete(&tmf->u.tmf.comp); 1658 } 1659 1660 int 1661 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1662 uint32_t tag) 1663 { 1664 struct scsi_qla_host *vha = fcport->vha; 1665 struct srb_iocb *tm_iocb; 1666 srb_t *sp; 1667 int rval = QLA_FUNCTION_FAILED; 1668 1669 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1670 if (!sp) 1671 goto done; 1672 1673 tm_iocb = &sp->u.iocb_cmd; 1674 sp->type = SRB_TM_CMD; 1675 sp->name = "tmf"; 1676 1677 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1678 init_completion(&tm_iocb->u.tmf.comp); 1679 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1680 1681 tm_iocb->u.tmf.flags = flags; 1682 tm_iocb->u.tmf.lun = lun; 1683 tm_iocb->u.tmf.data = tag; 1684 sp->done = qla2x00_tmf_sp_done; 1685 1686 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1687 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1688 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1689 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1690 1691 rval = qla2x00_start_sp(sp); 1692 if (rval != QLA_SUCCESS) 1693 goto done_free_sp; 1694 wait_for_completion(&tm_iocb->u.tmf.comp); 1695 1696 rval = tm_iocb->u.tmf.data; 1697 1698 if (rval != QLA_SUCCESS) { 1699 ql_log(ql_log_warn, vha, 0x8030, 1700 "TM IOCB failed (%x).\n", rval); 1701 } 1702 1703 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1704 flags = tm_iocb->u.tmf.flags; 1705 lun = (uint16_t)tm_iocb->u.tmf.lun; 1706 1707 /* Issue Marker IOCB */ 1708 qla2x00_marker(vha, vha->hw->base_qpair, 1709 fcport->loop_id, lun, 1710 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1711 } 1712 1713 done_free_sp: 1714 sp->free(sp); 1715 fcport->flags &= ~FCF_ASYNC_SENT; 1716 done: 1717 return rval; 1718 } 1719 1720 static void 1721 qla24xx_abort_iocb_timeout(void *data) 1722 { 1723 srb_t *sp = data; 1724 struct srb_iocb *abt = &sp->u.iocb_cmd; 1725 1726 abt->u.abt.comp_status = CS_TIMEOUT; 1727 sp->done(sp, QLA_FUNCTION_TIMEOUT); 1728 } 1729 1730 static void 1731 qla24xx_abort_sp_done(void *ptr, int res) 1732 { 1733 srb_t *sp = ptr; 1734 struct srb_iocb *abt = &sp->u.iocb_cmd; 1735 1736 if (del_timer(&sp->u.iocb_cmd.timer)) { 1737 if (sp->flags & SRB_WAKEUP_ON_COMP) 1738 complete(&abt->u.abt.comp); 1739 else 1740 sp->free(sp); 1741 } 1742 } 1743 1744 int 1745 qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 1746 { 1747 scsi_qla_host_t *vha = cmd_sp->vha; 1748 struct srb_iocb *abt_iocb; 1749 srb_t *sp; 1750 int rval = QLA_FUNCTION_FAILED; 1751 1752 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 1753 GFP_ATOMIC); 1754 if (!sp) 1755 goto done; 1756 1757 abt_iocb = &sp->u.iocb_cmd; 1758 sp->type = SRB_ABT_CMD; 1759 sp->name = "abort"; 1760 sp->qpair = cmd_sp->qpair; 1761 if (wait) 1762 sp->flags = SRB_WAKEUP_ON_COMP; 1763 1764 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1765 init_completion(&abt_iocb->u.abt.comp); 1766 /* FW can send 2 x ABTS's timeout/20s */ 1767 qla2x00_init_timer(sp, 42); 1768 1769 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1770 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 1771 1772 sp->done = qla24xx_abort_sp_done; 1773 1774 ql_dbg(ql_dbg_async, vha, 0x507c, 1775 "Abort command issued - hdl=%x, type=%x\n", 1776 cmd_sp->handle, cmd_sp->type); 1777 1778 rval = qla2x00_start_sp(sp); 1779 if (rval != QLA_SUCCESS) 1780 goto done_free_sp; 1781 1782 if (wait) { 1783 wait_for_completion(&abt_iocb->u.abt.comp); 1784 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1785 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1786 } else { 1787 goto done; 1788 } 1789 1790 done_free_sp: 1791 sp->free(sp); 1792 done: 1793 return rval; 1794 } 1795 1796 int 1797 qla24xx_async_abort_command(srb_t *sp) 1798 { 1799 unsigned long flags = 0; 1800 1801 uint32_t handle; 1802 fc_port_t *fcport = sp->fcport; 1803 struct qla_qpair *qpair = sp->qpair; 1804 struct scsi_qla_host *vha = fcport->vha; 1805 struct req_que *req = qpair->req; 1806 1807 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1808 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1809 if (req->outstanding_cmds[handle] == sp) 1810 break; 1811 } 1812 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1813 1814 if (handle == req->num_outstanding_cmds) { 1815 /* Command not found. */ 1816 return QLA_FUNCTION_FAILED; 1817 } 1818 if (sp->type == SRB_FXIOCB_DCMD) 1819 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1820 FXDISC_ABORT_IOCTL); 1821 1822 return qla24xx_async_abort_cmd(sp, true); 1823 } 1824 1825 static void 1826 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1827 { 1828 switch (ea->data[0]) { 1829 case MBS_COMMAND_COMPLETE: 1830 ql_dbg(ql_dbg_disc, vha, 0x2118, 1831 "%s %d %8phC post gpdb\n", 1832 __func__, __LINE__, ea->fcport->port_name); 1833 1834 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1835 ea->fcport->logout_on_delete = 1; 1836 ea->fcport->nvme_prli_service_param = ea->iop[0]; 1837 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 1838 ea->fcport->nvme_first_burst_size = 1839 (ea->iop[1] & 0xffff) * 512; 1840 else 1841 ea->fcport->nvme_first_burst_size = 0; 1842 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1843 break; 1844 default: 1845 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1846 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1847 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1848 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1849 break; 1850 } 1851 1852 if (ea->fcport->n2n_flag) { 1853 ql_dbg(ql_dbg_disc, vha, 0x2118, 1854 "%s %d %8phC post fc4 prli\n", 1855 __func__, __LINE__, ea->fcport->port_name); 1856 ea->fcport->fc4f_nvme = 0; 1857 ea->fcport->n2n_flag = 0; 1858 qla24xx_post_prli_work(vha, ea->fcport); 1859 } 1860 ql_dbg(ql_dbg_disc, vha, 0x2119, 1861 "%s %d %8phC unhandle event of %x\n", 1862 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1863 break; 1864 } 1865 } 1866 1867 static void 1868 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1869 { 1870 port_id_t cid; /* conflict Nport id */ 1871 u16 lid; 1872 struct fc_port *conflict_fcport; 1873 unsigned long flags; 1874 struct fc_port *fcport = ea->fcport; 1875 1876 ql_dbg(ql_dbg_disc, vha, 0xffff, 1877 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1878 __func__, fcport->port_name, fcport->disc_state, 1879 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1880 ea->sp->gen1, fcport->rscn_gen, 1881 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1882 1883 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1884 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1885 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1886 "%s %d %8phC Remote is trying to login\n", 1887 __func__, __LINE__, fcport->port_name); 1888 return; 1889 } 1890 1891 if (fcport->disc_state == DSC_DELETE_PEND) 1892 return; 1893 1894 if (ea->sp->gen2 != fcport->login_gen) { 1895 /* target side must have changed it. */ 1896 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1897 "%s %8phC generation changed\n", 1898 __func__, fcport->port_name); 1899 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1900 return; 1901 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1902 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1903 "%s %8phC RSCN generation changed\n", 1904 __func__, fcport->port_name); 1905 qla_rscn_replay(fcport); 1906 qlt_schedule_sess_for_deletion(fcport); 1907 return; 1908 } 1909 1910 switch (ea->data[0]) { 1911 case MBS_COMMAND_COMPLETE: 1912 /* 1913 * Driver must validate login state - If PRLI not complete, 1914 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1915 * requests. 1916 */ 1917 if (ea->fcport->fc4f_nvme) { 1918 ql_dbg(ql_dbg_disc, vha, 0x2117, 1919 "%s %d %8phC post prli\n", 1920 __func__, __LINE__, ea->fcport->port_name); 1921 qla24xx_post_prli_work(vha, ea->fcport); 1922 } else { 1923 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1924 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1925 __func__, __LINE__, ea->fcport->port_name, 1926 ea->fcport->loop_id, ea->fcport->d_id.b24); 1927 1928 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1929 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1930 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1931 ea->fcport->logout_on_delete = 1; 1932 ea->fcport->send_els_logo = 0; 1933 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1934 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1935 1936 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1937 } 1938 break; 1939 case MBS_COMMAND_ERROR: 1940 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1941 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1942 1943 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1944 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1945 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1946 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1947 else 1948 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1949 break; 1950 case MBS_LOOP_ID_USED: 1951 /* data[1] = IO PARAM 1 = nport ID */ 1952 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1953 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1954 cid.b.al_pa = ea->iop[1] & 0xff; 1955 cid.b.rsvd_1 = 0; 1956 1957 ql_dbg(ql_dbg_disc, vha, 0x20ec, 1958 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 1959 __func__, __LINE__, ea->fcport->port_name, 1960 ea->fcport->loop_id, cid.b24); 1961 1962 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1963 ea->fcport->loop_id = FC_NO_LOOP_ID; 1964 qla24xx_post_gnl_work(vha, ea->fcport); 1965 break; 1966 case MBS_PORT_ID_USED: 1967 lid = ea->iop[1] & 0xffff; 1968 qlt_find_sess_invalidate_other(vha, 1969 wwn_to_u64(ea->fcport->port_name), 1970 ea->fcport->d_id, lid, &conflict_fcport); 1971 1972 if (conflict_fcport) { 1973 /* 1974 * Another fcport share the same loop_id/nport id. 1975 * Conflict fcport needs to finish cleanup before this 1976 * fcport can proceed to login. 1977 */ 1978 conflict_fcport->conflict = ea->fcport; 1979 ea->fcport->login_pause = 1; 1980 1981 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1982 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 1983 __func__, __LINE__, ea->fcport->port_name, 1984 ea->fcport->d_id.b24, lid); 1985 } else { 1986 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1987 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 1988 __func__, __LINE__, ea->fcport->port_name, 1989 ea->fcport->d_id.b24, lid); 1990 1991 qla2x00_clear_loop_id(ea->fcport); 1992 set_bit(lid, vha->hw->loop_id_map); 1993 ea->fcport->loop_id = lid; 1994 ea->fcport->keep_nport_handle = 0; 1995 qlt_schedule_sess_for_deletion(ea->fcport); 1996 } 1997 break; 1998 } 1999 return; 2000 } 2001 2002 void 2003 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 2004 uint16_t *data) 2005 { 2006 qlt_logo_completion_handler(fcport, data[0]); 2007 fcport->login_gen++; 2008 fcport->flags &= ~FCF_ASYNC_ACTIVE; 2009 return; 2010 } 2011 2012 /****************************************************************************/ 2013 /* QLogic ISP2x00 Hardware Support Functions. */ 2014 /****************************************************************************/ 2015 2016 static int 2017 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2018 { 2019 int rval = QLA_SUCCESS; 2020 struct qla_hw_data *ha = vha->hw; 2021 uint32_t idc_major_ver, idc_minor_ver; 2022 uint16_t config[4]; 2023 2024 qla83xx_idc_lock(vha, 0); 2025 2026 /* SV: TODO: Assign initialization timeout from 2027 * flash-info / other param 2028 */ 2029 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2030 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2031 2032 /* Set our fcoe function presence */ 2033 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2034 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2035 "Error while setting DRV-Presence.\n"); 2036 rval = QLA_FUNCTION_FAILED; 2037 goto exit; 2038 } 2039 2040 /* Decide the reset ownership */ 2041 qla83xx_reset_ownership(vha); 2042 2043 /* 2044 * On first protocol driver load: 2045 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2046 * register. 2047 * Others: Check compatibility with current IDC Major version. 2048 */ 2049 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2050 if (ha->flags.nic_core_reset_owner) { 2051 /* Set IDC Major version */ 2052 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2053 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2054 2055 /* Clearing IDC-Lock-Recovery register */ 2056 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2057 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2058 /* 2059 * Clear further IDC participation if we are not compatible with 2060 * the current IDC Major Version. 2061 */ 2062 ql_log(ql_log_warn, vha, 0xb07d, 2063 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2064 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2065 __qla83xx_clear_drv_presence(vha); 2066 rval = QLA_FUNCTION_FAILED; 2067 goto exit; 2068 } 2069 /* Each function sets its supported Minor version. */ 2070 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2071 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2072 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2073 2074 if (ha->flags.nic_core_reset_owner) { 2075 memset(config, 0, sizeof(config)); 2076 if (!qla81xx_get_port_config(vha, config)) 2077 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2078 QLA8XXX_DEV_READY); 2079 } 2080 2081 rval = qla83xx_idc_state_handler(vha); 2082 2083 exit: 2084 qla83xx_idc_unlock(vha, 0); 2085 2086 return rval; 2087 } 2088 2089 /* 2090 * qla2x00_initialize_adapter 2091 * Initialize board. 2092 * 2093 * Input: 2094 * ha = adapter block pointer. 2095 * 2096 * Returns: 2097 * 0 = success 2098 */ 2099 int 2100 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2101 { 2102 int rval; 2103 struct qla_hw_data *ha = vha->hw; 2104 struct req_que *req = ha->req_q_map[0]; 2105 2106 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2107 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2108 2109 /* Clear adapter flags. */ 2110 vha->flags.online = 0; 2111 ha->flags.chip_reset_done = 0; 2112 vha->flags.reset_active = 0; 2113 ha->flags.pci_channel_io_perm_failure = 0; 2114 ha->flags.eeh_busy = 0; 2115 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2116 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2117 atomic_set(&vha->loop_state, LOOP_DOWN); 2118 vha->device_flags = DFLG_NO_CABLE; 2119 vha->dpc_flags = 0; 2120 vha->flags.management_server_logged_in = 0; 2121 vha->marker_needed = 0; 2122 ha->isp_abort_cnt = 0; 2123 ha->beacon_blink_led = 0; 2124 2125 set_bit(0, ha->req_qid_map); 2126 set_bit(0, ha->rsp_qid_map); 2127 2128 ql_dbg(ql_dbg_init, vha, 0x0040, 2129 "Configuring PCI space...\n"); 2130 rval = ha->isp_ops->pci_config(vha); 2131 if (rval) { 2132 ql_log(ql_log_warn, vha, 0x0044, 2133 "Unable to configure PCI space.\n"); 2134 return (rval); 2135 } 2136 2137 ha->isp_ops->reset_chip(vha); 2138 2139 rval = qla2xxx_get_flash_info(vha); 2140 if (rval) { 2141 ql_log(ql_log_fatal, vha, 0x004f, 2142 "Unable to validate FLASH data.\n"); 2143 return rval; 2144 } 2145 2146 if (IS_QLA8044(ha)) { 2147 qla8044_read_reset_template(vha); 2148 2149 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2150 * If DONRESET_BIT0 is set, drivers should not set dev_state 2151 * to NEED_RESET. But if NEED_RESET is set, drivers should 2152 * should honor the reset. */ 2153 if (ql2xdontresethba == 1) 2154 qla8044_set_idc_dontreset(vha); 2155 } 2156 2157 ha->isp_ops->get_flash_version(vha, req->ring); 2158 ql_dbg(ql_dbg_init, vha, 0x0061, 2159 "Configure NVRAM parameters...\n"); 2160 2161 ha->isp_ops->nvram_config(vha); 2162 2163 if (ha->flags.disable_serdes) { 2164 /* Mask HBA via NVRAM settings? */ 2165 ql_log(ql_log_info, vha, 0x0077, 2166 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2167 return QLA_FUNCTION_FAILED; 2168 } 2169 2170 ql_dbg(ql_dbg_init, vha, 0x0078, 2171 "Verifying loaded RISC code...\n"); 2172 2173 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2174 rval = ha->isp_ops->chip_diag(vha); 2175 if (rval) 2176 return (rval); 2177 rval = qla2x00_setup_chip(vha); 2178 if (rval) 2179 return (rval); 2180 } 2181 2182 if (IS_QLA84XX(ha)) { 2183 ha->cs84xx = qla84xx_get_chip(vha); 2184 if (!ha->cs84xx) { 2185 ql_log(ql_log_warn, vha, 0x00d0, 2186 "Unable to configure ISP84XX.\n"); 2187 return QLA_FUNCTION_FAILED; 2188 } 2189 } 2190 2191 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2192 rval = qla2x00_init_rings(vha); 2193 2194 ha->flags.chip_reset_done = 1; 2195 2196 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2197 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2198 rval = qla84xx_init_chip(vha); 2199 if (rval != QLA_SUCCESS) { 2200 ql_log(ql_log_warn, vha, 0x00d4, 2201 "Unable to initialize ISP84XX.\n"); 2202 qla84xx_put_chip(vha); 2203 } 2204 } 2205 2206 /* Load the NIC Core f/w if we are the first protocol driver. */ 2207 if (IS_QLA8031(ha)) { 2208 rval = qla83xx_nic_core_fw_load(vha); 2209 if (rval) 2210 ql_log(ql_log_warn, vha, 0x0124, 2211 "Error in initializing NIC Core f/w.\n"); 2212 } 2213 2214 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2215 qla24xx_read_fcp_prio_cfg(vha); 2216 2217 if (IS_P3P_TYPE(ha)) 2218 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2219 else 2220 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2221 2222 return (rval); 2223 } 2224 2225 /** 2226 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2227 * @vha: HA context 2228 * 2229 * Returns 0 on success. 2230 */ 2231 int 2232 qla2100_pci_config(scsi_qla_host_t *vha) 2233 { 2234 uint16_t w; 2235 unsigned long flags; 2236 struct qla_hw_data *ha = vha->hw; 2237 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2238 2239 pci_set_master(ha->pdev); 2240 pci_try_set_mwi(ha->pdev); 2241 2242 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2243 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2244 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2245 2246 pci_disable_rom(ha->pdev); 2247 2248 /* Get PCI bus information. */ 2249 spin_lock_irqsave(&ha->hardware_lock, flags); 2250 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2251 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2252 2253 return QLA_SUCCESS; 2254 } 2255 2256 /** 2257 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2258 * @vha: HA context 2259 * 2260 * Returns 0 on success. 2261 */ 2262 int 2263 qla2300_pci_config(scsi_qla_host_t *vha) 2264 { 2265 uint16_t w; 2266 unsigned long flags = 0; 2267 uint32_t cnt; 2268 struct qla_hw_data *ha = vha->hw; 2269 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2270 2271 pci_set_master(ha->pdev); 2272 pci_try_set_mwi(ha->pdev); 2273 2274 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2275 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2276 2277 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2278 w &= ~PCI_COMMAND_INTX_DISABLE; 2279 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2280 2281 /* 2282 * If this is a 2300 card and not 2312, reset the 2283 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2284 * the 2310 also reports itself as a 2300 so we need to get the 2285 * fb revision level -- a 6 indicates it really is a 2300 and 2286 * not a 2310. 2287 */ 2288 if (IS_QLA2300(ha)) { 2289 spin_lock_irqsave(&ha->hardware_lock, flags); 2290 2291 /* Pause RISC. */ 2292 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2293 for (cnt = 0; cnt < 30000; cnt++) { 2294 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2295 break; 2296 2297 udelay(10); 2298 } 2299 2300 /* Select FPM registers. */ 2301 WRT_REG_WORD(®->ctrl_status, 0x20); 2302 RD_REG_WORD(®->ctrl_status); 2303 2304 /* Get the fb rev level */ 2305 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2306 2307 if (ha->fb_rev == FPM_2300) 2308 pci_clear_mwi(ha->pdev); 2309 2310 /* Deselect FPM registers. */ 2311 WRT_REG_WORD(®->ctrl_status, 0x0); 2312 RD_REG_WORD(®->ctrl_status); 2313 2314 /* Release RISC module. */ 2315 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2316 for (cnt = 0; cnt < 30000; cnt++) { 2317 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2318 break; 2319 2320 udelay(10); 2321 } 2322 2323 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2324 } 2325 2326 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2327 2328 pci_disable_rom(ha->pdev); 2329 2330 /* Get PCI bus information. */ 2331 spin_lock_irqsave(&ha->hardware_lock, flags); 2332 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2333 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2334 2335 return QLA_SUCCESS; 2336 } 2337 2338 /** 2339 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2340 * @vha: HA context 2341 * 2342 * Returns 0 on success. 2343 */ 2344 int 2345 qla24xx_pci_config(scsi_qla_host_t *vha) 2346 { 2347 uint16_t w; 2348 unsigned long flags = 0; 2349 struct qla_hw_data *ha = vha->hw; 2350 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2351 2352 pci_set_master(ha->pdev); 2353 pci_try_set_mwi(ha->pdev); 2354 2355 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2356 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2357 w &= ~PCI_COMMAND_INTX_DISABLE; 2358 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2359 2360 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2361 2362 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2363 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2364 pcix_set_mmrbc(ha->pdev, 2048); 2365 2366 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2367 if (pci_is_pcie(ha->pdev)) 2368 pcie_set_readrq(ha->pdev, 4096); 2369 2370 pci_disable_rom(ha->pdev); 2371 2372 ha->chip_revision = ha->pdev->revision; 2373 2374 /* Get PCI bus information. */ 2375 spin_lock_irqsave(&ha->hardware_lock, flags); 2376 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2377 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2378 2379 return QLA_SUCCESS; 2380 } 2381 2382 /** 2383 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2384 * @vha: HA context 2385 * 2386 * Returns 0 on success. 2387 */ 2388 int 2389 qla25xx_pci_config(scsi_qla_host_t *vha) 2390 { 2391 uint16_t w; 2392 struct qla_hw_data *ha = vha->hw; 2393 2394 pci_set_master(ha->pdev); 2395 pci_try_set_mwi(ha->pdev); 2396 2397 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2398 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2399 w &= ~PCI_COMMAND_INTX_DISABLE; 2400 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2401 2402 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2403 if (pci_is_pcie(ha->pdev)) 2404 pcie_set_readrq(ha->pdev, 4096); 2405 2406 pci_disable_rom(ha->pdev); 2407 2408 ha->chip_revision = ha->pdev->revision; 2409 2410 return QLA_SUCCESS; 2411 } 2412 2413 /** 2414 * qla2x00_isp_firmware() - Choose firmware image. 2415 * @vha: HA context 2416 * 2417 * Returns 0 on success. 2418 */ 2419 static int 2420 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2421 { 2422 int rval; 2423 uint16_t loop_id, topo, sw_cap; 2424 uint8_t domain, area, al_pa; 2425 struct qla_hw_data *ha = vha->hw; 2426 2427 /* Assume loading risc code */ 2428 rval = QLA_FUNCTION_FAILED; 2429 2430 if (ha->flags.disable_risc_code_load) { 2431 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2432 2433 /* Verify checksum of loaded RISC code. */ 2434 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2435 if (rval == QLA_SUCCESS) { 2436 /* And, verify we are not in ROM code. */ 2437 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2438 &area, &domain, &topo, &sw_cap); 2439 } 2440 } 2441 2442 if (rval) 2443 ql_dbg(ql_dbg_init, vha, 0x007a, 2444 "**** Load RISC code ****.\n"); 2445 2446 return (rval); 2447 } 2448 2449 /** 2450 * qla2x00_reset_chip() - Reset ISP chip. 2451 * @vha: HA context 2452 * 2453 * Returns 0 on success. 2454 */ 2455 void 2456 qla2x00_reset_chip(scsi_qla_host_t *vha) 2457 { 2458 unsigned long flags = 0; 2459 struct qla_hw_data *ha = vha->hw; 2460 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2461 uint32_t cnt; 2462 uint16_t cmd; 2463 2464 if (unlikely(pci_channel_offline(ha->pdev))) 2465 return; 2466 2467 ha->isp_ops->disable_intrs(ha); 2468 2469 spin_lock_irqsave(&ha->hardware_lock, flags); 2470 2471 /* Turn off master enable */ 2472 cmd = 0; 2473 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2474 cmd &= ~PCI_COMMAND_MASTER; 2475 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2476 2477 if (!IS_QLA2100(ha)) { 2478 /* Pause RISC. */ 2479 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2480 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2481 for (cnt = 0; cnt < 30000; cnt++) { 2482 if ((RD_REG_WORD(®->hccr) & 2483 HCCR_RISC_PAUSE) != 0) 2484 break; 2485 udelay(100); 2486 } 2487 } else { 2488 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2489 udelay(10); 2490 } 2491 2492 /* Select FPM registers. */ 2493 WRT_REG_WORD(®->ctrl_status, 0x20); 2494 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2495 2496 /* FPM Soft Reset. */ 2497 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2498 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2499 2500 /* Toggle Fpm Reset. */ 2501 if (!IS_QLA2200(ha)) { 2502 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2503 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2504 } 2505 2506 /* Select frame buffer registers. */ 2507 WRT_REG_WORD(®->ctrl_status, 0x10); 2508 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2509 2510 /* Reset frame buffer FIFOs. */ 2511 if (IS_QLA2200(ha)) { 2512 WRT_FB_CMD_REG(ha, reg, 0xa000); 2513 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2514 } else { 2515 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2516 2517 /* Read back fb_cmd until zero or 3 seconds max */ 2518 for (cnt = 0; cnt < 3000; cnt++) { 2519 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2520 break; 2521 udelay(100); 2522 } 2523 } 2524 2525 /* Select RISC module registers. */ 2526 WRT_REG_WORD(®->ctrl_status, 0); 2527 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2528 2529 /* Reset RISC processor. */ 2530 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2531 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2532 2533 /* Release RISC processor. */ 2534 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2535 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2536 } 2537 2538 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2539 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2540 2541 /* Reset ISP chip. */ 2542 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2543 2544 /* Wait for RISC to recover from reset. */ 2545 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2546 /* 2547 * It is necessary to for a delay here since the card doesn't 2548 * respond to PCI reads during a reset. On some architectures 2549 * this will result in an MCA. 2550 */ 2551 udelay(20); 2552 for (cnt = 30000; cnt; cnt--) { 2553 if ((RD_REG_WORD(®->ctrl_status) & 2554 CSR_ISP_SOFT_RESET) == 0) 2555 break; 2556 udelay(100); 2557 } 2558 } else 2559 udelay(10); 2560 2561 /* Reset RISC processor. */ 2562 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2563 2564 WRT_REG_WORD(®->semaphore, 0); 2565 2566 /* Release RISC processor. */ 2567 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2568 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2569 2570 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2571 for (cnt = 0; cnt < 30000; cnt++) { 2572 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2573 break; 2574 2575 udelay(100); 2576 } 2577 } else 2578 udelay(100); 2579 2580 /* Turn on master enable */ 2581 cmd |= PCI_COMMAND_MASTER; 2582 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2583 2584 /* Disable RISC pause on FPM parity error. */ 2585 if (!IS_QLA2100(ha)) { 2586 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2587 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2588 } 2589 2590 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2591 } 2592 2593 /** 2594 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2595 * @vha: HA context 2596 * 2597 * Returns 0 on success. 2598 */ 2599 static int 2600 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2601 { 2602 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2603 2604 if (!IS_QLA81XX(vha->hw)) 2605 return QLA_SUCCESS; 2606 2607 return qla81xx_write_mpi_register(vha, mb); 2608 } 2609 2610 /** 2611 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2612 * @vha: HA context 2613 * 2614 * Returns 0 on success. 2615 */ 2616 static inline int 2617 qla24xx_reset_risc(scsi_qla_host_t *vha) 2618 { 2619 unsigned long flags = 0; 2620 struct qla_hw_data *ha = vha->hw; 2621 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2622 uint32_t cnt; 2623 uint16_t wd; 2624 static int abts_cnt; /* ISP abort retry counts */ 2625 int rval = QLA_SUCCESS; 2626 2627 spin_lock_irqsave(&ha->hardware_lock, flags); 2628 2629 /* Reset RISC. */ 2630 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2631 for (cnt = 0; cnt < 30000; cnt++) { 2632 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2633 break; 2634 2635 udelay(10); 2636 } 2637 2638 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2639 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2640 2641 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2642 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2643 RD_REG_DWORD(®->hccr), 2644 RD_REG_DWORD(®->ctrl_status), 2645 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2646 2647 WRT_REG_DWORD(®->ctrl_status, 2648 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2649 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2650 2651 udelay(100); 2652 2653 /* Wait for firmware to complete NVRAM accesses. */ 2654 RD_REG_WORD(®->mailbox0); 2655 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2656 rval == QLA_SUCCESS; cnt--) { 2657 barrier(); 2658 if (cnt) 2659 udelay(5); 2660 else 2661 rval = QLA_FUNCTION_TIMEOUT; 2662 } 2663 2664 if (rval == QLA_SUCCESS) 2665 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2666 2667 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2668 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2669 RD_REG_DWORD(®->hccr), 2670 RD_REG_DWORD(®->mailbox0)); 2671 2672 /* Wait for soft-reset to complete. */ 2673 RD_REG_DWORD(®->ctrl_status); 2674 for (cnt = 0; cnt < 60; cnt++) { 2675 barrier(); 2676 if ((RD_REG_DWORD(®->ctrl_status) & 2677 CSRX_ISP_SOFT_RESET) == 0) 2678 break; 2679 2680 udelay(5); 2681 } 2682 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2683 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2684 2685 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2686 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2687 RD_REG_DWORD(®->hccr), 2688 RD_REG_DWORD(®->ctrl_status)); 2689 2690 /* If required, do an MPI FW reset now */ 2691 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2692 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2693 if (++abts_cnt < 5) { 2694 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2695 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2696 } else { 2697 /* 2698 * We exhausted the ISP abort retries. We have to 2699 * set the board offline. 2700 */ 2701 abts_cnt = 0; 2702 vha->flags.online = 0; 2703 } 2704 } 2705 } 2706 2707 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2708 RD_REG_DWORD(®->hccr); 2709 2710 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2711 RD_REG_DWORD(®->hccr); 2712 2713 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2714 RD_REG_DWORD(®->hccr); 2715 2716 RD_REG_WORD(®->mailbox0); 2717 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2718 rval == QLA_SUCCESS; cnt--) { 2719 barrier(); 2720 if (cnt) 2721 udelay(5); 2722 else 2723 rval = QLA_FUNCTION_TIMEOUT; 2724 } 2725 if (rval == QLA_SUCCESS) 2726 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2727 2728 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2729 "Host Risc 0x%x, mailbox0 0x%x\n", 2730 RD_REG_DWORD(®->hccr), 2731 RD_REG_WORD(®->mailbox0)); 2732 2733 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2734 2735 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2736 "Driver in %s mode\n", 2737 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2738 2739 if (IS_NOPOLLING_TYPE(ha)) 2740 ha->isp_ops->enable_intrs(ha); 2741 2742 return rval; 2743 } 2744 2745 static void 2746 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2747 { 2748 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2749 2750 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2751 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2752 2753 } 2754 2755 static void 2756 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2757 { 2758 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2759 2760 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2761 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2762 } 2763 2764 static void 2765 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2766 { 2767 uint32_t wd32 = 0; 2768 uint delta_msec = 100; 2769 uint elapsed_msec = 0; 2770 uint timeout_msec; 2771 ulong n; 2772 2773 if (vha->hw->pdev->subsystem_device != 0x0175 && 2774 vha->hw->pdev->subsystem_device != 0x0240) 2775 return; 2776 2777 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2778 udelay(100); 2779 2780 attempt: 2781 timeout_msec = TIMEOUT_SEMAPHORE; 2782 n = timeout_msec / delta_msec; 2783 while (n--) { 2784 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2785 qla25xx_read_risc_sema_reg(vha, &wd32); 2786 if (wd32 & RISC_SEMAPHORE) 2787 break; 2788 msleep(delta_msec); 2789 elapsed_msec += delta_msec; 2790 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2791 goto force; 2792 } 2793 2794 if (!(wd32 & RISC_SEMAPHORE)) 2795 goto force; 2796 2797 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2798 goto acquired; 2799 2800 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2801 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2802 n = timeout_msec / delta_msec; 2803 while (n--) { 2804 qla25xx_read_risc_sema_reg(vha, &wd32); 2805 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2806 break; 2807 msleep(delta_msec); 2808 elapsed_msec += delta_msec; 2809 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2810 goto force; 2811 } 2812 2813 if (wd32 & RISC_SEMAPHORE_FORCE) 2814 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2815 2816 goto attempt; 2817 2818 force: 2819 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2820 2821 acquired: 2822 return; 2823 } 2824 2825 /** 2826 * qla24xx_reset_chip() - Reset ISP24xx chip. 2827 * @vha: HA context 2828 * 2829 * Returns 0 on success. 2830 */ 2831 void 2832 qla24xx_reset_chip(scsi_qla_host_t *vha) 2833 { 2834 struct qla_hw_data *ha = vha->hw; 2835 2836 if (pci_channel_offline(ha->pdev) && 2837 ha->flags.pci_channel_io_perm_failure) { 2838 return; 2839 } 2840 2841 ha->isp_ops->disable_intrs(ha); 2842 2843 qla25xx_manipulate_risc_semaphore(vha); 2844 2845 /* Perform RISC reset. */ 2846 qla24xx_reset_risc(vha); 2847 } 2848 2849 /** 2850 * qla2x00_chip_diag() - Test chip for proper operation. 2851 * @vha: HA context 2852 * 2853 * Returns 0 on success. 2854 */ 2855 int 2856 qla2x00_chip_diag(scsi_qla_host_t *vha) 2857 { 2858 int rval; 2859 struct qla_hw_data *ha = vha->hw; 2860 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2861 unsigned long flags = 0; 2862 uint16_t data; 2863 uint32_t cnt; 2864 uint16_t mb[5]; 2865 struct req_que *req = ha->req_q_map[0]; 2866 2867 /* Assume a failed state */ 2868 rval = QLA_FUNCTION_FAILED; 2869 2870 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2871 ®->flash_address); 2872 2873 spin_lock_irqsave(&ha->hardware_lock, flags); 2874 2875 /* Reset ISP chip. */ 2876 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2877 2878 /* 2879 * We need to have a delay here since the card will not respond while 2880 * in reset causing an MCA on some architectures. 2881 */ 2882 udelay(20); 2883 data = qla2x00_debounce_register(®->ctrl_status); 2884 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2885 udelay(5); 2886 data = RD_REG_WORD(®->ctrl_status); 2887 barrier(); 2888 } 2889 2890 if (!cnt) 2891 goto chip_diag_failed; 2892 2893 ql_dbg(ql_dbg_init, vha, 0x007c, 2894 "Reset register cleared by chip reset.\n"); 2895 2896 /* Reset RISC processor. */ 2897 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2898 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2899 2900 /* Workaround for QLA2312 PCI parity error */ 2901 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2902 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2903 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2904 udelay(5); 2905 data = RD_MAILBOX_REG(ha, reg, 0); 2906 barrier(); 2907 } 2908 } else 2909 udelay(10); 2910 2911 if (!cnt) 2912 goto chip_diag_failed; 2913 2914 /* Check product ID of chip */ 2915 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2916 2917 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2918 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2919 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2920 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2921 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2922 mb[3] != PROD_ID_3) { 2923 ql_log(ql_log_warn, vha, 0x0062, 2924 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2925 mb[1], mb[2], mb[3]); 2926 2927 goto chip_diag_failed; 2928 } 2929 ha->product_id[0] = mb[1]; 2930 ha->product_id[1] = mb[2]; 2931 ha->product_id[2] = mb[3]; 2932 ha->product_id[3] = mb[4]; 2933 2934 /* Adjust fw RISC transfer size */ 2935 if (req->length > 1024) 2936 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2937 else 2938 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2939 req->length; 2940 2941 if (IS_QLA2200(ha) && 2942 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2943 /* Limit firmware transfer size with a 2200A */ 2944 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2945 2946 ha->device_type |= DT_ISP2200A; 2947 ha->fw_transfer_size = 128; 2948 } 2949 2950 /* Wrap Incoming Mailboxes Test. */ 2951 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2952 2953 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2954 rval = qla2x00_mbx_reg_test(vha); 2955 if (rval) 2956 ql_log(ql_log_warn, vha, 0x0080, 2957 "Failed mailbox send register test.\n"); 2958 else 2959 /* Flag a successful rval */ 2960 rval = QLA_SUCCESS; 2961 spin_lock_irqsave(&ha->hardware_lock, flags); 2962 2963 chip_diag_failed: 2964 if (rval) 2965 ql_log(ql_log_info, vha, 0x0081, 2966 "Chip diagnostics **** FAILED ****.\n"); 2967 2968 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2969 2970 return (rval); 2971 } 2972 2973 /** 2974 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 2975 * @vha: HA context 2976 * 2977 * Returns 0 on success. 2978 */ 2979 int 2980 qla24xx_chip_diag(scsi_qla_host_t *vha) 2981 { 2982 int rval; 2983 struct qla_hw_data *ha = vha->hw; 2984 struct req_que *req = ha->req_q_map[0]; 2985 2986 if (IS_P3P_TYPE(ha)) 2987 return QLA_SUCCESS; 2988 2989 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 2990 2991 rval = qla2x00_mbx_reg_test(vha); 2992 if (rval) { 2993 ql_log(ql_log_warn, vha, 0x0082, 2994 "Failed mailbox send register test.\n"); 2995 } else { 2996 /* Flag a successful rval */ 2997 rval = QLA_SUCCESS; 2998 } 2999 3000 return rval; 3001 } 3002 3003 static void 3004 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3005 { 3006 int rval; 3007 dma_addr_t tc_dma; 3008 void *tc; 3009 struct qla_hw_data *ha = vha->hw; 3010 3011 if (ha->eft) { 3012 ql_dbg(ql_dbg_init, vha, 0x00bd, 3013 "%s: Offload Mem is already allocated.\n", 3014 __func__); 3015 return; 3016 } 3017 3018 if (IS_FWI2_CAPABLE(ha)) { 3019 /* Allocate memory for Fibre Channel Event Buffer. */ 3020 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3021 !IS_QLA27XX(ha)) 3022 goto try_eft; 3023 3024 if (ha->fce) 3025 dma_free_coherent(&ha->pdev->dev, 3026 FCE_SIZE, ha->fce, ha->fce_dma); 3027 3028 /* Allocate memory for Fibre Channel Event Buffer. */ 3029 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3030 GFP_KERNEL); 3031 if (!tc) { 3032 ql_log(ql_log_warn, vha, 0x00be, 3033 "Unable to allocate (%d KB) for FCE.\n", 3034 FCE_SIZE / 1024); 3035 goto try_eft; 3036 } 3037 3038 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3039 ha->fce_mb, &ha->fce_bufs); 3040 if (rval) { 3041 ql_log(ql_log_warn, vha, 0x00bf, 3042 "Unable to initialize FCE (%d).\n", rval); 3043 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 3044 tc_dma); 3045 ha->flags.fce_enabled = 0; 3046 goto try_eft; 3047 } 3048 ql_dbg(ql_dbg_init, vha, 0x00c0, 3049 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 3050 3051 ha->flags.fce_enabled = 1; 3052 ha->fce_dma = tc_dma; 3053 ha->fce = tc; 3054 3055 try_eft: 3056 if (ha->eft) 3057 dma_free_coherent(&ha->pdev->dev, 3058 EFT_SIZE, ha->eft, ha->eft_dma); 3059 3060 /* Allocate memory for Extended Trace Buffer. */ 3061 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3062 GFP_KERNEL); 3063 if (!tc) { 3064 ql_log(ql_log_warn, vha, 0x00c1, 3065 "Unable to allocate (%d KB) for EFT.\n", 3066 EFT_SIZE / 1024); 3067 goto eft_err; 3068 } 3069 3070 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3071 if (rval) { 3072 ql_log(ql_log_warn, vha, 0x00c2, 3073 "Unable to initialize EFT (%d).\n", rval); 3074 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 3075 tc_dma); 3076 goto eft_err; 3077 } 3078 ql_dbg(ql_dbg_init, vha, 0x00c3, 3079 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3080 3081 ha->eft_dma = tc_dma; 3082 ha->eft = tc; 3083 } 3084 3085 eft_err: 3086 return; 3087 } 3088 3089 void 3090 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3091 { 3092 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3093 eft_size, fce_size, mq_size; 3094 struct qla_hw_data *ha = vha->hw; 3095 struct req_que *req = ha->req_q_map[0]; 3096 struct rsp_que *rsp = ha->rsp_q_map[0]; 3097 struct qla2xxx_fw_dump *fw_dump; 3098 3099 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3100 req_q_size = rsp_q_size = 0; 3101 3102 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3103 fixed_size = sizeof(struct qla2100_fw_dump); 3104 } else if (IS_QLA23XX(ha)) { 3105 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3106 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3107 sizeof(uint16_t); 3108 } else if (IS_FWI2_CAPABLE(ha)) { 3109 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 3110 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3111 else if (IS_QLA81XX(ha)) 3112 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3113 else if (IS_QLA25XX(ha)) 3114 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3115 else 3116 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3117 3118 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3119 sizeof(uint32_t); 3120 if (ha->mqenable) { 3121 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 3122 mq_size = sizeof(struct qla2xxx_mq_chain); 3123 /* 3124 * Allocate maximum buffer size for all queues. 3125 * Resizing must be done at end-of-dump processing. 3126 */ 3127 mq_size += ha->max_req_queues * 3128 (req->length * sizeof(request_t)); 3129 mq_size += ha->max_rsp_queues * 3130 (rsp->length * sizeof(response_t)); 3131 } 3132 if (ha->tgt.atio_ring) 3133 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3134 /* Allocate memory for Fibre Channel Event Buffer. */ 3135 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3136 !IS_QLA27XX(ha)) 3137 goto try_eft; 3138 3139 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3140 try_eft: 3141 ql_dbg(ql_dbg_init, vha, 0x00c3, 3142 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3143 eft_size = EFT_SIZE; 3144 } 3145 3146 if (IS_QLA27XX(ha)) { 3147 if (!ha->fw_dump_template) { 3148 ql_log(ql_log_warn, vha, 0x00ba, 3149 "Failed missing fwdump template\n"); 3150 return; 3151 } 3152 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 3153 ql_dbg(ql_dbg_init, vha, 0x00fa, 3154 "-> allocating fwdump (%x bytes)...\n", dump_size); 3155 goto allocate; 3156 } 3157 3158 req_q_size = req->length * sizeof(request_t); 3159 rsp_q_size = rsp->length * sizeof(response_t); 3160 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3161 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 3162 ha->chain_offset = dump_size; 3163 dump_size += mq_size + fce_size; 3164 3165 if (ha->exchoffld_buf) 3166 dump_size += sizeof(struct qla2xxx_offld_chain) + 3167 ha->exchoffld_size; 3168 if (ha->exlogin_buf) 3169 dump_size += sizeof(struct qla2xxx_offld_chain) + 3170 ha->exlogin_size; 3171 3172 allocate: 3173 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 3174 fw_dump = vmalloc(dump_size); 3175 if (!fw_dump) { 3176 ql_log(ql_log_warn, vha, 0x00c4, 3177 "Unable to allocate (%d KB) for firmware dump.\n", 3178 dump_size / 1024); 3179 } else { 3180 if (ha->fw_dump) 3181 vfree(ha->fw_dump); 3182 ha->fw_dump = fw_dump; 3183 3184 ha->fw_dump_len = dump_size; 3185 ql_dbg(ql_dbg_init, vha, 0x00c5, 3186 "Allocated (%d KB) for firmware dump.\n", 3187 dump_size / 1024); 3188 3189 if (IS_QLA27XX(ha)) 3190 return; 3191 3192 ha->fw_dump->signature[0] = 'Q'; 3193 ha->fw_dump->signature[1] = 'L'; 3194 ha->fw_dump->signature[2] = 'G'; 3195 ha->fw_dump->signature[3] = 'C'; 3196 ha->fw_dump->version = htonl(1); 3197 3198 ha->fw_dump->fixed_size = htonl(fixed_size); 3199 ha->fw_dump->mem_size = htonl(mem_size); 3200 ha->fw_dump->req_q_size = htonl(req_q_size); 3201 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3202 3203 ha->fw_dump->eft_size = htonl(eft_size); 3204 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3205 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3206 3207 ha->fw_dump->header_size = 3208 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3209 } 3210 } 3211 } 3212 3213 static int 3214 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3215 { 3216 #define MPS_MASK 0xe0 3217 int rval; 3218 uint16_t dc; 3219 uint32_t dw; 3220 3221 if (!IS_QLA81XX(vha->hw)) 3222 return QLA_SUCCESS; 3223 3224 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3225 if (rval != QLA_SUCCESS) { 3226 ql_log(ql_log_warn, vha, 0x0105, 3227 "Unable to acquire semaphore.\n"); 3228 goto done; 3229 } 3230 3231 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3232 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3233 if (rval != QLA_SUCCESS) { 3234 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3235 goto done_release; 3236 } 3237 3238 dc &= MPS_MASK; 3239 if (dc == (dw & MPS_MASK)) 3240 goto done_release; 3241 3242 dw &= ~MPS_MASK; 3243 dw |= dc; 3244 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3245 if (rval != QLA_SUCCESS) { 3246 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3247 } 3248 3249 done_release: 3250 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3251 if (rval != QLA_SUCCESS) { 3252 ql_log(ql_log_warn, vha, 0x006d, 3253 "Unable to release semaphore.\n"); 3254 } 3255 3256 done: 3257 return rval; 3258 } 3259 3260 int 3261 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3262 { 3263 /* Don't try to reallocate the array */ 3264 if (req->outstanding_cmds) 3265 return QLA_SUCCESS; 3266 3267 if (!IS_FWI2_CAPABLE(ha)) 3268 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3269 else { 3270 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3271 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3272 else 3273 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3274 } 3275 3276 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3277 sizeof(srb_t *), 3278 GFP_KERNEL); 3279 3280 if (!req->outstanding_cmds) { 3281 /* 3282 * Try to allocate a minimal size just so we can get through 3283 * initialization. 3284 */ 3285 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3286 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3287 sizeof(srb_t *), 3288 GFP_KERNEL); 3289 3290 if (!req->outstanding_cmds) { 3291 ql_log(ql_log_fatal, NULL, 0x0126, 3292 "Failed to allocate memory for " 3293 "outstanding_cmds for req_que %p.\n", req); 3294 req->num_outstanding_cmds = 0; 3295 return QLA_FUNCTION_FAILED; 3296 } 3297 } 3298 3299 return QLA_SUCCESS; 3300 } 3301 3302 #define PRINT_FIELD(_field, _flag, _str) { \ 3303 if (a0->_field & _flag) {\ 3304 if (p) {\ 3305 strcat(ptr, "|");\ 3306 ptr++;\ 3307 leftover--;\ 3308 } \ 3309 len = snprintf(ptr, leftover, "%s", _str); \ 3310 p = 1;\ 3311 leftover -= len;\ 3312 ptr += len; \ 3313 } \ 3314 } 3315 3316 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3317 { 3318 #define STR_LEN 64 3319 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3320 u8 str[STR_LEN], *ptr, p; 3321 int leftover, len; 3322 3323 memset(str, 0, STR_LEN); 3324 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3325 ql_dbg(ql_dbg_init, vha, 0x015a, 3326 "SFP MFG Name: %s\n", str); 3327 3328 memset(str, 0, STR_LEN); 3329 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3330 ql_dbg(ql_dbg_init, vha, 0x015c, 3331 "SFP Part Name: %s\n", str); 3332 3333 /* media */ 3334 memset(str, 0, STR_LEN); 3335 ptr = str; 3336 leftover = STR_LEN; 3337 p = len = 0; 3338 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3339 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3340 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3341 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3342 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3343 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3344 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3345 ql_dbg(ql_dbg_init, vha, 0x0160, 3346 "SFP Media: %s\n", str); 3347 3348 /* link length */ 3349 memset(str, 0, STR_LEN); 3350 ptr = str; 3351 leftover = STR_LEN; 3352 p = len = 0; 3353 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3354 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3355 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3356 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3357 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3358 ql_dbg(ql_dbg_init, vha, 0x0196, 3359 "SFP Link Length: %s\n", str); 3360 3361 memset(str, 0, STR_LEN); 3362 ptr = str; 3363 leftover = STR_LEN; 3364 p = len = 0; 3365 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3366 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3367 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3368 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3369 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3370 ql_dbg(ql_dbg_init, vha, 0x016e, 3371 "SFP FC Link Tech: %s\n", str); 3372 3373 if (a0->length_km) 3374 ql_dbg(ql_dbg_init, vha, 0x016f, 3375 "SFP Distant: %d km\n", a0->length_km); 3376 if (a0->length_100m) 3377 ql_dbg(ql_dbg_init, vha, 0x0170, 3378 "SFP Distant: %d m\n", a0->length_100m*100); 3379 if (a0->length_50um_10m) 3380 ql_dbg(ql_dbg_init, vha, 0x0189, 3381 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3382 if (a0->length_62um_10m) 3383 ql_dbg(ql_dbg_init, vha, 0x018a, 3384 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3385 if (a0->length_om4_10m) 3386 ql_dbg(ql_dbg_init, vha, 0x0194, 3387 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3388 if (a0->length_om3_10m) 3389 ql_dbg(ql_dbg_init, vha, 0x0195, 3390 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3391 } 3392 3393 3394 /* 3395 * Return Code: 3396 * QLA_SUCCESS: no action 3397 * QLA_INTERFACE_ERROR: SFP is not there. 3398 * QLA_FUNCTION_FAILED: detected New SFP 3399 */ 3400 int 3401 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3402 { 3403 int rc = QLA_SUCCESS; 3404 struct sff_8247_a0 *a; 3405 struct qla_hw_data *ha = vha->hw; 3406 3407 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3408 goto out; 3409 3410 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3411 if (rc) 3412 goto out; 3413 3414 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3415 qla2xxx_print_sfp_info(vha); 3416 3417 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3418 /* long range */ 3419 ha->flags.detected_lr_sfp = 1; 3420 3421 if (a->length_km > 5 || a->length_100m > 50) 3422 ha->long_range_distance = LR_DISTANCE_10K; 3423 else 3424 ha->long_range_distance = LR_DISTANCE_5K; 3425 3426 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3427 ql_dbg(ql_dbg_async, vha, 0x507b, 3428 "Detected Long Range SFP.\n"); 3429 } else { 3430 /* short range */ 3431 ha->flags.detected_lr_sfp = 0; 3432 if (ha->flags.using_lr_setting) 3433 ql_dbg(ql_dbg_async, vha, 0x5084, 3434 "Detected Short Range SFP.\n"); 3435 } 3436 3437 if (!vha->flags.init_done) 3438 rc = QLA_SUCCESS; 3439 out: 3440 return rc; 3441 } 3442 3443 /** 3444 * qla2x00_setup_chip() - Load and start RISC firmware. 3445 * @vha: HA context 3446 * 3447 * Returns 0 on success. 3448 */ 3449 static int 3450 qla2x00_setup_chip(scsi_qla_host_t *vha) 3451 { 3452 int rval; 3453 uint32_t srisc_address = 0; 3454 struct qla_hw_data *ha = vha->hw; 3455 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3456 unsigned long flags; 3457 uint16_t fw_major_version; 3458 3459 if (IS_P3P_TYPE(ha)) { 3460 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3461 if (rval == QLA_SUCCESS) { 3462 qla2x00_stop_firmware(vha); 3463 goto enable_82xx_npiv; 3464 } else 3465 goto failed; 3466 } 3467 3468 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3469 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3470 spin_lock_irqsave(&ha->hardware_lock, flags); 3471 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3472 RD_REG_WORD(®->hccr); 3473 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3474 } 3475 3476 qla81xx_mpi_sync(vha); 3477 3478 /* Load firmware sequences */ 3479 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3480 if (rval == QLA_SUCCESS) { 3481 ql_dbg(ql_dbg_init, vha, 0x00c9, 3482 "Verifying Checksum of loaded RISC code.\n"); 3483 3484 rval = qla2x00_verify_checksum(vha, srisc_address); 3485 if (rval == QLA_SUCCESS) { 3486 /* Start firmware execution. */ 3487 ql_dbg(ql_dbg_init, vha, 0x00ca, 3488 "Starting firmware.\n"); 3489 3490 if (ql2xexlogins) 3491 ha->flags.exlogins_enabled = 1; 3492 3493 if (qla_is_exch_offld_enabled(vha)) 3494 ha->flags.exchoffld_enabled = 1; 3495 3496 rval = qla2x00_execute_fw(vha, srisc_address); 3497 /* Retrieve firmware information. */ 3498 if (rval == QLA_SUCCESS) { 3499 qla24xx_detect_sfp(vha); 3500 3501 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && 3502 (ha->zio_mode == QLA_ZIO_MODE_6)) 3503 qla27xx_set_zio_threshold(vha, 3504 ha->last_zio_threshold); 3505 3506 rval = qla2x00_set_exlogins_buffer(vha); 3507 if (rval != QLA_SUCCESS) 3508 goto failed; 3509 3510 rval = qla2x00_set_exchoffld_buffer(vha); 3511 if (rval != QLA_SUCCESS) 3512 goto failed; 3513 3514 enable_82xx_npiv: 3515 fw_major_version = ha->fw_major_version; 3516 if (IS_P3P_TYPE(ha)) 3517 qla82xx_check_md_needed(vha); 3518 else 3519 rval = qla2x00_get_fw_version(vha); 3520 if (rval != QLA_SUCCESS) 3521 goto failed; 3522 ha->flags.npiv_supported = 0; 3523 if (IS_QLA2XXX_MIDTYPE(ha) && 3524 (ha->fw_attributes & BIT_2)) { 3525 ha->flags.npiv_supported = 1; 3526 if ((!ha->max_npiv_vports) || 3527 ((ha->max_npiv_vports + 1) % 3528 MIN_MULTI_ID_FABRIC)) 3529 ha->max_npiv_vports = 3530 MIN_MULTI_ID_FABRIC - 1; 3531 } 3532 qla2x00_get_resource_cnts(vha); 3533 3534 /* 3535 * Allocate the array of outstanding commands 3536 * now that we know the firmware resources. 3537 */ 3538 rval = qla2x00_alloc_outstanding_cmds(ha, 3539 vha->req); 3540 if (rval != QLA_SUCCESS) 3541 goto failed; 3542 3543 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3544 qla2x00_alloc_offload_mem(vha); 3545 3546 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3547 qla2x00_alloc_fw_dump(vha); 3548 3549 } else { 3550 goto failed; 3551 } 3552 } else { 3553 ql_log(ql_log_fatal, vha, 0x00cd, 3554 "ISP Firmware failed checksum.\n"); 3555 goto failed; 3556 } 3557 } else 3558 goto failed; 3559 3560 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3561 /* Enable proper parity. */ 3562 spin_lock_irqsave(&ha->hardware_lock, flags); 3563 if (IS_QLA2300(ha)) 3564 /* SRAM parity */ 3565 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3566 else 3567 /* SRAM, Instruction RAM and GP RAM parity */ 3568 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3569 RD_REG_WORD(®->hccr); 3570 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3571 } 3572 3573 if (IS_QLA27XX(ha)) 3574 ha->flags.fac_supported = 1; 3575 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3576 uint32_t size; 3577 3578 rval = qla81xx_fac_get_sector_size(vha, &size); 3579 if (rval == QLA_SUCCESS) { 3580 ha->flags.fac_supported = 1; 3581 ha->fdt_block_size = size << 2; 3582 } else { 3583 ql_log(ql_log_warn, vha, 0x00ce, 3584 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3585 ha->fw_major_version, ha->fw_minor_version, 3586 ha->fw_subminor_version); 3587 3588 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3589 ha->flags.fac_supported = 0; 3590 rval = QLA_SUCCESS; 3591 } 3592 } 3593 } 3594 failed: 3595 if (rval) { 3596 ql_log(ql_log_fatal, vha, 0x00cf, 3597 "Setup chip ****FAILED****.\n"); 3598 } 3599 3600 return (rval); 3601 } 3602 3603 /** 3604 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3605 * @rsp: response queue 3606 * 3607 * Beginning of request ring has initialization control block already built 3608 * by nvram config routine. 3609 * 3610 * Returns 0 on success. 3611 */ 3612 void 3613 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3614 { 3615 uint16_t cnt; 3616 response_t *pkt; 3617 3618 rsp->ring_ptr = rsp->ring; 3619 rsp->ring_index = 0; 3620 rsp->status_srb = NULL; 3621 pkt = rsp->ring_ptr; 3622 for (cnt = 0; cnt < rsp->length; cnt++) { 3623 pkt->signature = RESPONSE_PROCESSED; 3624 pkt++; 3625 } 3626 } 3627 3628 /** 3629 * qla2x00_update_fw_options() - Read and process firmware options. 3630 * @vha: HA context 3631 * 3632 * Returns 0 on success. 3633 */ 3634 void 3635 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3636 { 3637 uint16_t swing, emphasis, tx_sens, rx_sens; 3638 struct qla_hw_data *ha = vha->hw; 3639 3640 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3641 qla2x00_get_fw_options(vha, ha->fw_options); 3642 3643 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3644 return; 3645 3646 /* Serial Link options. */ 3647 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3648 "Serial link options.\n"); 3649 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3650 (uint8_t *)&ha->fw_seriallink_options, 3651 sizeof(ha->fw_seriallink_options)); 3652 3653 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3654 if (ha->fw_seriallink_options[3] & BIT_2) { 3655 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3656 3657 /* 1G settings */ 3658 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3659 emphasis = (ha->fw_seriallink_options[2] & 3660 (BIT_4 | BIT_3)) >> 3; 3661 tx_sens = ha->fw_seriallink_options[0] & 3662 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3663 rx_sens = (ha->fw_seriallink_options[0] & 3664 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3665 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3666 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3667 if (rx_sens == 0x0) 3668 rx_sens = 0x3; 3669 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3670 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3671 ha->fw_options[10] |= BIT_5 | 3672 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3673 (tx_sens & (BIT_1 | BIT_0)); 3674 3675 /* 2G settings */ 3676 swing = (ha->fw_seriallink_options[2] & 3677 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3678 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3679 tx_sens = ha->fw_seriallink_options[1] & 3680 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3681 rx_sens = (ha->fw_seriallink_options[1] & 3682 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3683 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3684 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3685 if (rx_sens == 0x0) 3686 rx_sens = 0x3; 3687 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3688 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3689 ha->fw_options[11] |= BIT_5 | 3690 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3691 (tx_sens & (BIT_1 | BIT_0)); 3692 } 3693 3694 /* FCP2 options. */ 3695 /* Return command IOCBs without waiting for an ABTS to complete. */ 3696 ha->fw_options[3] |= BIT_13; 3697 3698 /* LED scheme. */ 3699 if (ha->flags.enable_led_scheme) 3700 ha->fw_options[2] |= BIT_12; 3701 3702 /* Detect ISP6312. */ 3703 if (IS_QLA6312(ha)) 3704 ha->fw_options[2] |= BIT_13; 3705 3706 /* Set Retry FLOGI in case of P2P connection */ 3707 if (ha->operating_mode == P2P) { 3708 ha->fw_options[2] |= BIT_3; 3709 ql_dbg(ql_dbg_disc, vha, 0x2100, 3710 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3711 __func__, ha->fw_options[2]); 3712 } 3713 3714 /* Update firmware options. */ 3715 qla2x00_set_fw_options(vha, ha->fw_options); 3716 } 3717 3718 void 3719 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3720 { 3721 int rval; 3722 struct qla_hw_data *ha = vha->hw; 3723 3724 if (IS_P3P_TYPE(ha)) 3725 return; 3726 3727 /* Hold status IOCBs until ABTS response received. */ 3728 if (ql2xfwholdabts) 3729 ha->fw_options[3] |= BIT_12; 3730 3731 /* Set Retry FLOGI in case of P2P connection */ 3732 if (ha->operating_mode == P2P) { 3733 ha->fw_options[2] |= BIT_3; 3734 ql_dbg(ql_dbg_disc, vha, 0x2101, 3735 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3736 __func__, ha->fw_options[2]); 3737 } 3738 3739 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3740 if (ql2xmvasynctoatio && 3741 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3742 if (qla_tgt_mode_enabled(vha) || 3743 qla_dual_mode_enabled(vha)) 3744 ha->fw_options[2] |= BIT_11; 3745 else 3746 ha->fw_options[2] &= ~BIT_11; 3747 } 3748 3749 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3750 /* 3751 * Tell FW to track each exchange to prevent 3752 * driver from using stale exchange. 3753 */ 3754 if (qla_tgt_mode_enabled(vha) || 3755 qla_dual_mode_enabled(vha)) 3756 ha->fw_options[2] |= BIT_4; 3757 else 3758 ha->fw_options[2] &= ~BIT_4; 3759 3760 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3761 if (qla2xuseresexchforels) 3762 ha->fw_options[2] |= BIT_8; 3763 else 3764 ha->fw_options[2] &= ~BIT_8; 3765 } 3766 3767 ql_dbg(ql_dbg_init, vha, 0x00e8, 3768 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3769 __func__, ha->fw_options[1], ha->fw_options[2], 3770 ha->fw_options[3], vha->host->active_mode); 3771 3772 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3773 qla2x00_set_fw_options(vha, ha->fw_options); 3774 3775 /* Update Serial Link options. */ 3776 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3777 return; 3778 3779 rval = qla2x00_set_serdes_params(vha, 3780 le16_to_cpu(ha->fw_seriallink_options24[1]), 3781 le16_to_cpu(ha->fw_seriallink_options24[2]), 3782 le16_to_cpu(ha->fw_seriallink_options24[3])); 3783 if (rval != QLA_SUCCESS) { 3784 ql_log(ql_log_warn, vha, 0x0104, 3785 "Unable to update Serial Link options (%x).\n", rval); 3786 } 3787 } 3788 3789 void 3790 qla2x00_config_rings(struct scsi_qla_host *vha) 3791 { 3792 struct qla_hw_data *ha = vha->hw; 3793 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3794 struct req_que *req = ha->req_q_map[0]; 3795 struct rsp_que *rsp = ha->rsp_q_map[0]; 3796 3797 /* Setup ring parameters in initialization control block. */ 3798 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3799 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3800 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3801 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3802 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3803 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3804 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3805 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3806 3807 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3808 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3809 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3810 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3811 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3812 } 3813 3814 void 3815 qla24xx_config_rings(struct scsi_qla_host *vha) 3816 { 3817 struct qla_hw_data *ha = vha->hw; 3818 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3819 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3820 struct qla_msix_entry *msix; 3821 struct init_cb_24xx *icb; 3822 uint16_t rid = 0; 3823 struct req_que *req = ha->req_q_map[0]; 3824 struct rsp_que *rsp = ha->rsp_q_map[0]; 3825 3826 /* Setup ring parameters in initialization control block. */ 3827 icb = (struct init_cb_24xx *)ha->init_cb; 3828 icb->request_q_outpointer = cpu_to_le16(0); 3829 icb->response_q_inpointer = cpu_to_le16(0); 3830 icb->request_q_length = cpu_to_le16(req->length); 3831 icb->response_q_length = cpu_to_le16(rsp->length); 3832 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3833 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3834 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3835 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3836 3837 /* Setup ATIO queue dma pointers for target mode */ 3838 icb->atio_q_inpointer = cpu_to_le16(0); 3839 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3840 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3841 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3842 3843 if (IS_SHADOW_REG_CAPABLE(ha)) 3844 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3845 3846 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3847 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3848 icb->rid = cpu_to_le16(rid); 3849 if (ha->flags.msix_enabled) { 3850 msix = &ha->msix_entries[1]; 3851 ql_dbg(ql_dbg_init, vha, 0x0019, 3852 "Registering vector 0x%x for base que.\n", 3853 msix->entry); 3854 icb->msix = cpu_to_le16(msix->entry); 3855 } 3856 /* Use alternate PCI bus number */ 3857 if (MSB(rid)) 3858 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3859 /* Use alternate PCI devfn */ 3860 if (LSB(rid)) 3861 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3862 3863 /* Use Disable MSIX Handshake mode for capable adapters */ 3864 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3865 (ha->flags.msix_enabled)) { 3866 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3867 ha->flags.disable_msix_handshake = 1; 3868 ql_dbg(ql_dbg_init, vha, 0x00fe, 3869 "MSIX Handshake Disable Mode turned on.\n"); 3870 } else { 3871 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3872 } 3873 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3874 3875 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3876 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3877 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3878 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3879 } else { 3880 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3881 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3882 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3883 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3884 } 3885 3886 qlt_24xx_config_rings(vha); 3887 3888 /* If the user has configured the speed, set it here */ 3889 if (ha->set_data_rate) { 3890 ql_dbg(ql_dbg_init, vha, 0x00fd, 3891 "Speed set by user : %s Gbps \n", 3892 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 3893 icb->firmware_options_3 = (ha->set_data_rate << 13); 3894 } 3895 3896 /* PCI posting */ 3897 RD_REG_DWORD(&ioreg->hccr); 3898 } 3899 3900 /** 3901 * qla2x00_init_rings() - Initializes firmware. 3902 * @vha: HA context 3903 * 3904 * Beginning of request ring has initialization control block already built 3905 * by nvram config routine. 3906 * 3907 * Returns 0 on success. 3908 */ 3909 int 3910 qla2x00_init_rings(scsi_qla_host_t *vha) 3911 { 3912 int rval; 3913 unsigned long flags = 0; 3914 int cnt, que; 3915 struct qla_hw_data *ha = vha->hw; 3916 struct req_que *req; 3917 struct rsp_que *rsp; 3918 struct mid_init_cb_24xx *mid_init_cb = 3919 (struct mid_init_cb_24xx *) ha->init_cb; 3920 3921 spin_lock_irqsave(&ha->hardware_lock, flags); 3922 3923 /* Clear outstanding commands array. */ 3924 for (que = 0; que < ha->max_req_queues; que++) { 3925 req = ha->req_q_map[que]; 3926 if (!req || !test_bit(que, ha->req_qid_map)) 3927 continue; 3928 req->out_ptr = (void *)(req->ring + req->length); 3929 *req->out_ptr = 0; 3930 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3931 req->outstanding_cmds[cnt] = NULL; 3932 3933 req->current_outstanding_cmd = 1; 3934 3935 /* Initialize firmware. */ 3936 req->ring_ptr = req->ring; 3937 req->ring_index = 0; 3938 req->cnt = req->length; 3939 } 3940 3941 for (que = 0; que < ha->max_rsp_queues; que++) { 3942 rsp = ha->rsp_q_map[que]; 3943 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 3944 continue; 3945 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 3946 *rsp->in_ptr = 0; 3947 /* Initialize response queue entries */ 3948 if (IS_QLAFX00(ha)) 3949 qlafx00_init_response_q_entries(rsp); 3950 else 3951 qla2x00_init_response_q_entries(rsp); 3952 } 3953 3954 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 3955 ha->tgt.atio_ring_index = 0; 3956 /* Initialize ATIO queue entries */ 3957 qlt_init_atio_q_entries(vha); 3958 3959 ha->isp_ops->config_rings(vha); 3960 3961 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3962 3963 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 3964 3965 if (IS_QLAFX00(ha)) { 3966 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 3967 goto next_check; 3968 } 3969 3970 /* Update any ISP specific firmware options before initialization. */ 3971 ha->isp_ops->update_fw_options(vha); 3972 3973 if (ha->flags.npiv_supported) { 3974 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 3975 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 3976 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 3977 } 3978 3979 if (IS_FWI2_CAPABLE(ha)) { 3980 mid_init_cb->options = cpu_to_le16(BIT_1); 3981 mid_init_cb->init_cb.execution_throttle = 3982 cpu_to_le16(ha->cur_fw_xcb_count); 3983 ha->flags.dport_enabled = 3984 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 3985 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 3986 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 3987 /* FA-WWPN Status */ 3988 ha->flags.fawwpn_enabled = 3989 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 3990 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 3991 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 3992 } 3993 3994 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 3995 next_check: 3996 if (rval) { 3997 ql_log(ql_log_fatal, vha, 0x00d2, 3998 "Init Firmware **** FAILED ****.\n"); 3999 } else { 4000 ql_dbg(ql_dbg_init, vha, 0x00d3, 4001 "Init Firmware -- success.\n"); 4002 QLA_FW_STARTED(ha); 4003 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4004 } 4005 4006 return (rval); 4007 } 4008 4009 /** 4010 * qla2x00_fw_ready() - Waits for firmware ready. 4011 * @vha: HA context 4012 * 4013 * Returns 0 on success. 4014 */ 4015 static int 4016 qla2x00_fw_ready(scsi_qla_host_t *vha) 4017 { 4018 int rval; 4019 unsigned long wtime, mtime, cs84xx_time; 4020 uint16_t min_wait; /* Minimum wait time if loop is down */ 4021 uint16_t wait_time; /* Wait time if loop is coming ready */ 4022 uint16_t state[6]; 4023 struct qla_hw_data *ha = vha->hw; 4024 4025 if (IS_QLAFX00(vha->hw)) 4026 return qlafx00_fw_ready(vha); 4027 4028 rval = QLA_SUCCESS; 4029 4030 /* Time to wait for loop down */ 4031 if (IS_P3P_TYPE(ha)) 4032 min_wait = 30; 4033 else 4034 min_wait = 20; 4035 4036 /* 4037 * Firmware should take at most one RATOV to login, plus 5 seconds for 4038 * our own processing. 4039 */ 4040 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4041 wait_time = min_wait; 4042 } 4043 4044 /* Min wait time if loop down */ 4045 mtime = jiffies + (min_wait * HZ); 4046 4047 /* wait time before firmware ready */ 4048 wtime = jiffies + (wait_time * HZ); 4049 4050 /* Wait for ISP to finish LIP */ 4051 if (!vha->flags.init_done) 4052 ql_log(ql_log_info, vha, 0x801e, 4053 "Waiting for LIP to complete.\n"); 4054 4055 do { 4056 memset(state, -1, sizeof(state)); 4057 rval = qla2x00_get_firmware_state(vha, state); 4058 if (rval == QLA_SUCCESS) { 4059 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4060 vha->device_flags &= ~DFLG_NO_CABLE; 4061 } 4062 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4063 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4064 "fw_state=%x 84xx=%x.\n", state[0], 4065 state[2]); 4066 if ((state[2] & FSTATE_LOGGED_IN) && 4067 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4068 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4069 "Sending verify iocb.\n"); 4070 4071 cs84xx_time = jiffies; 4072 rval = qla84xx_init_chip(vha); 4073 if (rval != QLA_SUCCESS) { 4074 ql_log(ql_log_warn, 4075 vha, 0x8007, 4076 "Init chip failed.\n"); 4077 break; 4078 } 4079 4080 /* Add time taken to initialize. */ 4081 cs84xx_time = jiffies - cs84xx_time; 4082 wtime += cs84xx_time; 4083 mtime += cs84xx_time; 4084 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4085 "Increasing wait time by %ld. " 4086 "New time %ld.\n", cs84xx_time, 4087 wtime); 4088 } 4089 } else if (state[0] == FSTATE_READY) { 4090 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4091 "F/W Ready - OK.\n"); 4092 4093 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4094 &ha->login_timeout, &ha->r_a_tov); 4095 4096 rval = QLA_SUCCESS; 4097 break; 4098 } 4099 4100 rval = QLA_FUNCTION_FAILED; 4101 4102 if (atomic_read(&vha->loop_down_timer) && 4103 state[0] != FSTATE_READY) { 4104 /* Loop down. Timeout on min_wait for states 4105 * other than Wait for Login. 4106 */ 4107 if (time_after_eq(jiffies, mtime)) { 4108 ql_log(ql_log_info, vha, 0x8038, 4109 "Cable is unplugged...\n"); 4110 4111 vha->device_flags |= DFLG_NO_CABLE; 4112 break; 4113 } 4114 } 4115 } else { 4116 /* Mailbox cmd failed. Timeout on min_wait. */ 4117 if (time_after_eq(jiffies, mtime) || 4118 ha->flags.isp82xx_fw_hung) 4119 break; 4120 } 4121 4122 if (time_after_eq(jiffies, wtime)) 4123 break; 4124 4125 /* Delay for a while */ 4126 msleep(500); 4127 } while (1); 4128 4129 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4130 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4131 state[1], state[2], state[3], state[4], state[5], jiffies); 4132 4133 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4134 ql_log(ql_log_warn, vha, 0x803b, 4135 "Firmware ready **** FAILED ****.\n"); 4136 } 4137 4138 return (rval); 4139 } 4140 4141 /* 4142 * qla2x00_configure_hba 4143 * Setup adapter context. 4144 * 4145 * Input: 4146 * ha = adapter state pointer. 4147 * 4148 * Returns: 4149 * 0 = success 4150 * 4151 * Context: 4152 * Kernel context. 4153 */ 4154 static int 4155 qla2x00_configure_hba(scsi_qla_host_t *vha) 4156 { 4157 int rval; 4158 uint16_t loop_id; 4159 uint16_t topo; 4160 uint16_t sw_cap; 4161 uint8_t al_pa; 4162 uint8_t area; 4163 uint8_t domain; 4164 char connect_type[22]; 4165 struct qla_hw_data *ha = vha->hw; 4166 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4167 port_id_t id; 4168 unsigned long flags; 4169 4170 /* Get host addresses. */ 4171 rval = qla2x00_get_adapter_id(vha, 4172 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4173 if (rval != QLA_SUCCESS) { 4174 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4175 IS_CNA_CAPABLE(ha) || 4176 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4177 ql_dbg(ql_dbg_disc, vha, 0x2008, 4178 "Loop is in a transition state.\n"); 4179 } else { 4180 ql_log(ql_log_warn, vha, 0x2009, 4181 "Unable to get host loop ID.\n"); 4182 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4183 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4184 ql_log(ql_log_warn, vha, 0x1151, 4185 "Doing link init.\n"); 4186 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4187 return rval; 4188 } 4189 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4190 } 4191 return (rval); 4192 } 4193 4194 if (topo == 4) { 4195 ql_log(ql_log_info, vha, 0x200a, 4196 "Cannot get topology - retrying.\n"); 4197 return (QLA_FUNCTION_FAILED); 4198 } 4199 4200 vha->loop_id = loop_id; 4201 4202 /* initialize */ 4203 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4204 ha->operating_mode = LOOP; 4205 ha->switch_cap = 0; 4206 4207 switch (topo) { 4208 case 0: 4209 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4210 ha->current_topology = ISP_CFG_NL; 4211 strcpy(connect_type, "(Loop)"); 4212 break; 4213 4214 case 1: 4215 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4216 ha->switch_cap = sw_cap; 4217 ha->current_topology = ISP_CFG_FL; 4218 strcpy(connect_type, "(FL_Port)"); 4219 break; 4220 4221 case 2: 4222 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4223 ha->operating_mode = P2P; 4224 ha->current_topology = ISP_CFG_N; 4225 strcpy(connect_type, "(N_Port-to-N_Port)"); 4226 break; 4227 4228 case 3: 4229 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4230 ha->switch_cap = sw_cap; 4231 ha->operating_mode = P2P; 4232 ha->current_topology = ISP_CFG_F; 4233 strcpy(connect_type, "(F_Port)"); 4234 break; 4235 4236 default: 4237 ql_dbg(ql_dbg_disc, vha, 0x200f, 4238 "HBA in unknown topology %x, using NL.\n", topo); 4239 ha->current_topology = ISP_CFG_NL; 4240 strcpy(connect_type, "(Loop)"); 4241 break; 4242 } 4243 4244 /* Save Host port and loop ID. */ 4245 /* byte order - Big Endian */ 4246 id.b.domain = domain; 4247 id.b.area = area; 4248 id.b.al_pa = al_pa; 4249 id.b.rsvd_1 = 0; 4250 spin_lock_irqsave(&ha->hardware_lock, flags); 4251 if (!(topo == 2 && ha->flags.n2n_bigger)) 4252 qlt_update_host_map(vha, id); 4253 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4254 4255 if (!vha->flags.init_done) 4256 ql_log(ql_log_info, vha, 0x2010, 4257 "Topology - %s, Host Loop address 0x%x.\n", 4258 connect_type, vha->loop_id); 4259 4260 return(rval); 4261 } 4262 4263 inline void 4264 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4265 char *def) 4266 { 4267 char *st, *en; 4268 uint16_t index; 4269 struct qla_hw_data *ha = vha->hw; 4270 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4271 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4272 4273 if (memcmp(model, BINZERO, len) != 0) { 4274 strncpy(ha->model_number, model, len); 4275 st = en = ha->model_number; 4276 en += len - 1; 4277 while (en > st) { 4278 if (*en != 0x20 && *en != 0x00) 4279 break; 4280 *en-- = '\0'; 4281 } 4282 4283 index = (ha->pdev->subsystem_device & 0xff); 4284 if (use_tbl && 4285 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4286 index < QLA_MODEL_NAMES) 4287 strncpy(ha->model_desc, 4288 qla2x00_model_name[index * 2 + 1], 4289 sizeof(ha->model_desc) - 1); 4290 } else { 4291 index = (ha->pdev->subsystem_device & 0xff); 4292 if (use_tbl && 4293 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4294 index < QLA_MODEL_NAMES) { 4295 strcpy(ha->model_number, 4296 qla2x00_model_name[index * 2]); 4297 strncpy(ha->model_desc, 4298 qla2x00_model_name[index * 2 + 1], 4299 sizeof(ha->model_desc) - 1); 4300 } else { 4301 strcpy(ha->model_number, def); 4302 } 4303 } 4304 if (IS_FWI2_CAPABLE(ha)) 4305 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4306 sizeof(ha->model_desc)); 4307 } 4308 4309 /* On sparc systems, obtain port and node WWN from firmware 4310 * properties. 4311 */ 4312 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4313 { 4314 #ifdef CONFIG_SPARC 4315 struct qla_hw_data *ha = vha->hw; 4316 struct pci_dev *pdev = ha->pdev; 4317 struct device_node *dp = pci_device_to_OF_node(pdev); 4318 const u8 *val; 4319 int len; 4320 4321 val = of_get_property(dp, "port-wwn", &len); 4322 if (val && len >= WWN_SIZE) 4323 memcpy(nv->port_name, val, WWN_SIZE); 4324 4325 val = of_get_property(dp, "node-wwn", &len); 4326 if (val && len >= WWN_SIZE) 4327 memcpy(nv->node_name, val, WWN_SIZE); 4328 #endif 4329 } 4330 4331 /* 4332 * NVRAM configuration for ISP 2xxx 4333 * 4334 * Input: 4335 * ha = adapter block pointer. 4336 * 4337 * Output: 4338 * initialization control block in response_ring 4339 * host adapters parameters in host adapter block 4340 * 4341 * Returns: 4342 * 0 = success. 4343 */ 4344 int 4345 qla2x00_nvram_config(scsi_qla_host_t *vha) 4346 { 4347 int rval; 4348 uint8_t chksum = 0; 4349 uint16_t cnt; 4350 uint8_t *dptr1, *dptr2; 4351 struct qla_hw_data *ha = vha->hw; 4352 init_cb_t *icb = ha->init_cb; 4353 nvram_t *nv = ha->nvram; 4354 uint8_t *ptr = ha->nvram; 4355 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4356 4357 rval = QLA_SUCCESS; 4358 4359 /* Determine NVRAM starting address. */ 4360 ha->nvram_size = sizeof(nvram_t); 4361 ha->nvram_base = 0; 4362 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4363 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4364 ha->nvram_base = 0x80; 4365 4366 /* Get NVRAM data and calculate checksum. */ 4367 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4368 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4369 chksum += *ptr++; 4370 4371 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4372 "Contents of NVRAM.\n"); 4373 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4374 (uint8_t *)nv, ha->nvram_size); 4375 4376 /* Bad NVRAM data, set defaults parameters. */ 4377 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4378 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4379 /* Reset NVRAM data. */ 4380 ql_log(ql_log_warn, vha, 0x0064, 4381 "Inconsistent NVRAM " 4382 "detected: checksum=0x%x id=%c version=0x%x.\n", 4383 chksum, nv->id[0], nv->nvram_version); 4384 ql_log(ql_log_warn, vha, 0x0065, 4385 "Falling back to " 4386 "functioning (yet invalid -- WWPN) defaults.\n"); 4387 4388 /* 4389 * Set default initialization control block. 4390 */ 4391 memset(nv, 0, ha->nvram_size); 4392 nv->parameter_block_version = ICB_VERSION; 4393 4394 if (IS_QLA23XX(ha)) { 4395 nv->firmware_options[0] = BIT_2 | BIT_1; 4396 nv->firmware_options[1] = BIT_7 | BIT_5; 4397 nv->add_firmware_options[0] = BIT_5; 4398 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4399 nv->frame_payload_size = 2048; 4400 nv->special_options[1] = BIT_7; 4401 } else if (IS_QLA2200(ha)) { 4402 nv->firmware_options[0] = BIT_2 | BIT_1; 4403 nv->firmware_options[1] = BIT_7 | BIT_5; 4404 nv->add_firmware_options[0] = BIT_5; 4405 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4406 nv->frame_payload_size = 1024; 4407 } else if (IS_QLA2100(ha)) { 4408 nv->firmware_options[0] = BIT_3 | BIT_1; 4409 nv->firmware_options[1] = BIT_5; 4410 nv->frame_payload_size = 1024; 4411 } 4412 4413 nv->max_iocb_allocation = cpu_to_le16(256); 4414 nv->execution_throttle = cpu_to_le16(16); 4415 nv->retry_count = 8; 4416 nv->retry_delay = 1; 4417 4418 nv->port_name[0] = 33; 4419 nv->port_name[3] = 224; 4420 nv->port_name[4] = 139; 4421 4422 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4423 4424 nv->login_timeout = 4; 4425 4426 /* 4427 * Set default host adapter parameters 4428 */ 4429 nv->host_p[1] = BIT_2; 4430 nv->reset_delay = 5; 4431 nv->port_down_retry_count = 8; 4432 nv->max_luns_per_target = cpu_to_le16(8); 4433 nv->link_down_timeout = 60; 4434 4435 rval = 1; 4436 } 4437 4438 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4439 /* 4440 * The SN2 does not provide BIOS emulation which means you can't change 4441 * potentially bogus BIOS settings. Force the use of default settings 4442 * for link rate and frame size. Hope that the rest of the settings 4443 * are valid. 4444 */ 4445 if (ia64_platform_is("sn2")) { 4446 nv->frame_payload_size = 2048; 4447 if (IS_QLA23XX(ha)) 4448 nv->special_options[1] = BIT_7; 4449 } 4450 #endif 4451 4452 /* Reset Initialization control block */ 4453 memset(icb, 0, ha->init_cb_size); 4454 4455 /* 4456 * Setup driver NVRAM options. 4457 */ 4458 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4459 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4460 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4461 nv->firmware_options[1] &= ~BIT_4; 4462 4463 if (IS_QLA23XX(ha)) { 4464 nv->firmware_options[0] |= BIT_2; 4465 nv->firmware_options[0] &= ~BIT_3; 4466 nv->special_options[0] &= ~BIT_6; 4467 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4468 4469 if (IS_QLA2300(ha)) { 4470 if (ha->fb_rev == FPM_2310) { 4471 strcpy(ha->model_number, "QLA2310"); 4472 } else { 4473 strcpy(ha->model_number, "QLA2300"); 4474 } 4475 } else { 4476 qla2x00_set_model_info(vha, nv->model_number, 4477 sizeof(nv->model_number), "QLA23xx"); 4478 } 4479 } else if (IS_QLA2200(ha)) { 4480 nv->firmware_options[0] |= BIT_2; 4481 /* 4482 * 'Point-to-point preferred, else loop' is not a safe 4483 * connection mode setting. 4484 */ 4485 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4486 (BIT_5 | BIT_4)) { 4487 /* Force 'loop preferred, else point-to-point'. */ 4488 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4489 nv->add_firmware_options[0] |= BIT_5; 4490 } 4491 strcpy(ha->model_number, "QLA22xx"); 4492 } else /*if (IS_QLA2100(ha))*/ { 4493 strcpy(ha->model_number, "QLA2100"); 4494 } 4495 4496 /* 4497 * Copy over NVRAM RISC parameter block to initialization control block. 4498 */ 4499 dptr1 = (uint8_t *)icb; 4500 dptr2 = (uint8_t *)&nv->parameter_block_version; 4501 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4502 while (cnt--) 4503 *dptr1++ = *dptr2++; 4504 4505 /* Copy 2nd half. */ 4506 dptr1 = (uint8_t *)icb->add_firmware_options; 4507 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4508 while (cnt--) 4509 *dptr1++ = *dptr2++; 4510 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4511 /* Use alternate WWN? */ 4512 if (nv->host_p[1] & BIT_7) { 4513 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4514 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4515 } 4516 4517 /* Prepare nodename */ 4518 if ((icb->firmware_options[1] & BIT_6) == 0) { 4519 /* 4520 * Firmware will apply the following mask if the nodename was 4521 * not provided. 4522 */ 4523 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4524 icb->node_name[0] &= 0xF0; 4525 } 4526 4527 /* 4528 * Set host adapter parameters. 4529 */ 4530 4531 /* 4532 * BIT_7 in the host-parameters section allows for modification to 4533 * internal driver logging. 4534 */ 4535 if (nv->host_p[0] & BIT_7) 4536 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4537 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4538 /* Always load RISC code on non ISP2[12]00 chips. */ 4539 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4540 ha->flags.disable_risc_code_load = 0; 4541 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4542 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4543 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4544 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4545 ha->flags.disable_serdes = 0; 4546 4547 ha->operating_mode = 4548 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4549 4550 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4551 sizeof(ha->fw_seriallink_options)); 4552 4553 /* save HBA serial number */ 4554 ha->serial0 = icb->port_name[5]; 4555 ha->serial1 = icb->port_name[6]; 4556 ha->serial2 = icb->port_name[7]; 4557 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4558 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4559 4560 icb->execution_throttle = cpu_to_le16(0xFFFF); 4561 4562 ha->retry_count = nv->retry_count; 4563 4564 /* Set minimum login_timeout to 4 seconds. */ 4565 if (nv->login_timeout != ql2xlogintimeout) 4566 nv->login_timeout = ql2xlogintimeout; 4567 if (nv->login_timeout < 4) 4568 nv->login_timeout = 4; 4569 ha->login_timeout = nv->login_timeout; 4570 4571 /* Set minimum RATOV to 100 tenths of a second. */ 4572 ha->r_a_tov = 100; 4573 4574 ha->loop_reset_delay = nv->reset_delay; 4575 4576 /* Link Down Timeout = 0: 4577 * 4578 * When Port Down timer expires we will start returning 4579 * I/O's to OS with "DID_NO_CONNECT". 4580 * 4581 * Link Down Timeout != 0: 4582 * 4583 * The driver waits for the link to come up after link down 4584 * before returning I/Os to OS with "DID_NO_CONNECT". 4585 */ 4586 if (nv->link_down_timeout == 0) { 4587 ha->loop_down_abort_time = 4588 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4589 } else { 4590 ha->link_down_timeout = nv->link_down_timeout; 4591 ha->loop_down_abort_time = 4592 (LOOP_DOWN_TIME - ha->link_down_timeout); 4593 } 4594 4595 /* 4596 * Need enough time to try and get the port back. 4597 */ 4598 ha->port_down_retry_count = nv->port_down_retry_count; 4599 if (qlport_down_retry) 4600 ha->port_down_retry_count = qlport_down_retry; 4601 /* Set login_retry_count */ 4602 ha->login_retry_count = nv->retry_count; 4603 if (ha->port_down_retry_count == nv->port_down_retry_count && 4604 ha->port_down_retry_count > 3) 4605 ha->login_retry_count = ha->port_down_retry_count; 4606 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4607 ha->login_retry_count = ha->port_down_retry_count; 4608 if (ql2xloginretrycount) 4609 ha->login_retry_count = ql2xloginretrycount; 4610 4611 icb->lun_enables = cpu_to_le16(0); 4612 icb->command_resource_count = 0; 4613 icb->immediate_notify_resource_count = 0; 4614 icb->timeout = cpu_to_le16(0); 4615 4616 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4617 /* Enable RIO */ 4618 icb->firmware_options[0] &= ~BIT_3; 4619 icb->add_firmware_options[0] &= 4620 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4621 icb->add_firmware_options[0] |= BIT_2; 4622 icb->response_accumulation_timer = 3; 4623 icb->interrupt_delay_timer = 5; 4624 4625 vha->flags.process_response_queue = 1; 4626 } else { 4627 /* Enable ZIO. */ 4628 if (!vha->flags.init_done) { 4629 ha->zio_mode = icb->add_firmware_options[0] & 4630 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4631 ha->zio_timer = icb->interrupt_delay_timer ? 4632 icb->interrupt_delay_timer: 2; 4633 } 4634 icb->add_firmware_options[0] &= 4635 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4636 vha->flags.process_response_queue = 0; 4637 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4638 ha->zio_mode = QLA_ZIO_MODE_6; 4639 4640 ql_log(ql_log_info, vha, 0x0068, 4641 "ZIO mode %d enabled; timer delay (%d us).\n", 4642 ha->zio_mode, ha->zio_timer * 100); 4643 4644 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4645 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4646 vha->flags.process_response_queue = 1; 4647 } 4648 } 4649 4650 if (rval) { 4651 ql_log(ql_log_warn, vha, 0x0069, 4652 "NVRAM configuration failed.\n"); 4653 } 4654 return (rval); 4655 } 4656 4657 static void 4658 qla2x00_rport_del(void *data) 4659 { 4660 fc_port_t *fcport = data; 4661 struct fc_rport *rport; 4662 unsigned long flags; 4663 4664 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4665 rport = fcport->drport ? fcport->drport: fcport->rport; 4666 fcport->drport = NULL; 4667 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4668 if (rport) { 4669 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4670 "%s %8phN. rport %p roles %x\n", 4671 __func__, fcport->port_name, rport, 4672 rport->roles); 4673 4674 fc_remote_port_delete(rport); 4675 } 4676 } 4677 4678 /** 4679 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4680 * @vha: HA context 4681 * @flags: allocation flags 4682 * 4683 * Returns a pointer to the allocated fcport, or NULL, if none available. 4684 */ 4685 fc_port_t * 4686 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4687 { 4688 fc_port_t *fcport; 4689 4690 fcport = kzalloc(sizeof(fc_port_t), flags); 4691 if (!fcport) 4692 return NULL; 4693 4694 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4695 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4696 flags); 4697 if (!fcport->ct_desc.ct_sns) { 4698 ql_log(ql_log_warn, vha, 0xd049, 4699 "Failed to allocate ct_sns request.\n"); 4700 kfree(fcport); 4701 return NULL; 4702 } 4703 4704 /* Setup fcport template structure. */ 4705 fcport->vha = vha; 4706 fcport->port_type = FCT_UNKNOWN; 4707 fcport->loop_id = FC_NO_LOOP_ID; 4708 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4709 fcport->supported_classes = FC_COS_UNSPECIFIED; 4710 fcport->fp_speed = PORT_SPEED_UNKNOWN; 4711 4712 fcport->disc_state = DSC_DELETED; 4713 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4714 fcport->deleted = QLA_SESS_DELETED; 4715 fcport->login_retry = vha->hw->login_retry_count; 4716 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 4717 fcport->logout_on_delete = 1; 4718 4719 if (!fcport->ct_desc.ct_sns) { 4720 ql_log(ql_log_warn, vha, 0xd049, 4721 "Failed to allocate ct_sns request.\n"); 4722 kfree(fcport); 4723 fcport = NULL; 4724 } 4725 4726 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4727 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 4728 INIT_LIST_HEAD(&fcport->gnl_entry); 4729 INIT_LIST_HEAD(&fcport->list); 4730 4731 return fcport; 4732 } 4733 4734 void 4735 qla2x00_free_fcport(fc_port_t *fcport) 4736 { 4737 if (fcport->ct_desc.ct_sns) { 4738 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4739 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4740 fcport->ct_desc.ct_sns_dma); 4741 4742 fcport->ct_desc.ct_sns = NULL; 4743 } 4744 kfree(fcport); 4745 } 4746 4747 /* 4748 * qla2x00_configure_loop 4749 * Updates Fibre Channel Device Database with what is actually on loop. 4750 * 4751 * Input: 4752 * ha = adapter block pointer. 4753 * 4754 * Returns: 4755 * 0 = success. 4756 * 1 = error. 4757 * 2 = database was full and device was not configured. 4758 */ 4759 static int 4760 qla2x00_configure_loop(scsi_qla_host_t *vha) 4761 { 4762 int rval; 4763 unsigned long flags, save_flags; 4764 struct qla_hw_data *ha = vha->hw; 4765 rval = QLA_SUCCESS; 4766 4767 /* Get Initiator ID */ 4768 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4769 rval = qla2x00_configure_hba(vha); 4770 if (rval != QLA_SUCCESS) { 4771 ql_dbg(ql_dbg_disc, vha, 0x2013, 4772 "Unable to configure HBA.\n"); 4773 return (rval); 4774 } 4775 } 4776 4777 save_flags = flags = vha->dpc_flags; 4778 ql_dbg(ql_dbg_disc, vha, 0x2014, 4779 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4780 4781 /* 4782 * If we have both an RSCN and PORT UPDATE pending then handle them 4783 * both at the same time. 4784 */ 4785 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4786 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4787 4788 qla2x00_get_data_rate(vha); 4789 4790 /* Determine what we need to do */ 4791 if (ha->current_topology == ISP_CFG_FL && 4792 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4793 4794 set_bit(RSCN_UPDATE, &flags); 4795 4796 } else if (ha->current_topology == ISP_CFG_F && 4797 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4798 4799 set_bit(RSCN_UPDATE, &flags); 4800 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4801 4802 } else if (ha->current_topology == ISP_CFG_N) { 4803 clear_bit(RSCN_UPDATE, &flags); 4804 if (qla_tgt_mode_enabled(vha)) { 4805 /* allow the other side to start the login */ 4806 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4807 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4808 } 4809 } else if (ha->current_topology == ISP_CFG_NL) { 4810 clear_bit(RSCN_UPDATE, &flags); 4811 set_bit(LOCAL_LOOP_UPDATE, &flags); 4812 } else if (!vha->flags.online || 4813 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4814 set_bit(RSCN_UPDATE, &flags); 4815 set_bit(LOCAL_LOOP_UPDATE, &flags); 4816 } 4817 4818 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4819 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4820 ql_dbg(ql_dbg_disc, vha, 0x2015, 4821 "Loop resync needed, failing.\n"); 4822 rval = QLA_FUNCTION_FAILED; 4823 } else 4824 rval = qla2x00_configure_local_loop(vha); 4825 } 4826 4827 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4828 if (LOOP_TRANSITION(vha)) { 4829 ql_dbg(ql_dbg_disc, vha, 0x2099, 4830 "Needs RSCN update and loop transition.\n"); 4831 rval = QLA_FUNCTION_FAILED; 4832 } 4833 else 4834 rval = qla2x00_configure_fabric(vha); 4835 } 4836 4837 if (rval == QLA_SUCCESS) { 4838 if (atomic_read(&vha->loop_down_timer) || 4839 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4840 rval = QLA_FUNCTION_FAILED; 4841 } else { 4842 atomic_set(&vha->loop_state, LOOP_READY); 4843 ql_dbg(ql_dbg_disc, vha, 0x2069, 4844 "LOOP READY.\n"); 4845 ha->flags.fw_init_done = 1; 4846 4847 /* 4848 * Process any ATIO queue entries that came in 4849 * while we weren't online. 4850 */ 4851 if (qla_tgt_mode_enabled(vha) || 4852 qla_dual_mode_enabled(vha)) { 4853 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 4854 qlt_24xx_process_atio_queue(vha, 0); 4855 spin_unlock_irqrestore(&ha->tgt.atio_lock, 4856 flags); 4857 } 4858 } 4859 } 4860 4861 if (rval) { 4862 ql_dbg(ql_dbg_disc, vha, 0x206a, 4863 "%s *** FAILED ***.\n", __func__); 4864 } else { 4865 ql_dbg(ql_dbg_disc, vha, 0x206b, 4866 "%s: exiting normally.\n", __func__); 4867 } 4868 4869 /* Restore state if a resync event occurred during processing */ 4870 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4871 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4872 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4873 if (test_bit(RSCN_UPDATE, &save_flags)) { 4874 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4875 } 4876 } 4877 4878 return (rval); 4879 } 4880 4881 /* 4882 * qla2x00_configure_local_loop 4883 * Updates Fibre Channel Device Database with local loop devices. 4884 * 4885 * Input: 4886 * ha = adapter block pointer. 4887 * 4888 * Returns: 4889 * 0 = success. 4890 */ 4891 static int 4892 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4893 { 4894 int rval, rval2; 4895 int found_devs; 4896 int found; 4897 fc_port_t *fcport, *new_fcport; 4898 4899 uint16_t index; 4900 uint16_t entries; 4901 char *id_iter; 4902 uint16_t loop_id; 4903 uint8_t domain, area, al_pa; 4904 struct qla_hw_data *ha = vha->hw; 4905 unsigned long flags; 4906 4907 /* Inititae N2N login. */ 4908 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4909 /* borrowing */ 4910 u32 *bp, i, sz; 4911 4912 memset(ha->init_cb, 0, ha->init_cb_size); 4913 sz = min_t(int, sizeof(struct els_plogi_payload), 4914 ha->init_cb_size); 4915 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 4916 (void *)ha->init_cb, sz); 4917 if (rval == QLA_SUCCESS) { 4918 bp = (uint32_t *)ha->init_cb; 4919 for (i = 0; i < sz/4 ; i++, bp++) 4920 *bp = cpu_to_be32(*bp); 4921 4922 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb, 4923 sizeof(ha->plogi_els_payld.data)); 4924 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4925 } else { 4926 ql_dbg(ql_dbg_init, vha, 0x00d1, 4927 "PLOGI ELS param read fail.\n"); 4928 } 4929 return QLA_SUCCESS; 4930 } 4931 4932 found_devs = 0; 4933 new_fcport = NULL; 4934 entries = MAX_FIBRE_DEVICES_LOOP; 4935 4936 /* Get list of logged in devices. */ 4937 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4938 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4939 &entries); 4940 if (rval != QLA_SUCCESS) 4941 goto cleanup_allocation; 4942 4943 ql_dbg(ql_dbg_disc, vha, 0x2011, 4944 "Entries in ID list (%d).\n", entries); 4945 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 4946 (uint8_t *)ha->gid_list, 4947 entries * sizeof(struct gid_list_info)); 4948 4949 if (entries == 0) { 4950 spin_lock_irqsave(&vha->work_lock, flags); 4951 vha->scan.scan_retry++; 4952 spin_unlock_irqrestore(&vha->work_lock, flags); 4953 4954 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 4955 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4956 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4957 } 4958 } else { 4959 vha->scan.scan_retry = 0; 4960 } 4961 4962 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4963 fcport->scan_state = QLA_FCPORT_SCAN; 4964 } 4965 4966 /* Allocate temporary fcport for any new fcports discovered. */ 4967 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4968 if (new_fcport == NULL) { 4969 ql_log(ql_log_warn, vha, 0x2012, 4970 "Memory allocation failed for fcport.\n"); 4971 rval = QLA_MEMORY_ALLOC_FAILED; 4972 goto cleanup_allocation; 4973 } 4974 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4975 4976 /* Add devices to port list. */ 4977 id_iter = (char *)ha->gid_list; 4978 for (index = 0; index < entries; index++) { 4979 domain = ((struct gid_list_info *)id_iter)->domain; 4980 area = ((struct gid_list_info *)id_iter)->area; 4981 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 4982 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4983 loop_id = (uint16_t) 4984 ((struct gid_list_info *)id_iter)->loop_id_2100; 4985 else 4986 loop_id = le16_to_cpu( 4987 ((struct gid_list_info *)id_iter)->loop_id); 4988 id_iter += ha->gid_list_info_size; 4989 4990 /* Bypass reserved domain fields. */ 4991 if ((domain & 0xf0) == 0xf0) 4992 continue; 4993 4994 /* Bypass invalid local loop ID. */ 4995 if (loop_id > LAST_LOCAL_LOOP_ID) 4996 continue; 4997 4998 memset(new_fcport->port_name, 0, WWN_SIZE); 4999 5000 /* Fill in member data. */ 5001 new_fcport->d_id.b.domain = domain; 5002 new_fcport->d_id.b.area = area; 5003 new_fcport->d_id.b.al_pa = al_pa; 5004 new_fcport->loop_id = loop_id; 5005 new_fcport->scan_state = QLA_FCPORT_FOUND; 5006 5007 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5008 if (rval2 != QLA_SUCCESS) { 5009 ql_dbg(ql_dbg_disc, vha, 0x2097, 5010 "Failed to retrieve fcport information " 5011 "-- get_port_database=%x, loop_id=0x%04x.\n", 5012 rval2, new_fcport->loop_id); 5013 /* Skip retry if N2N */ 5014 if (ha->current_topology != ISP_CFG_N) { 5015 ql_dbg(ql_dbg_disc, vha, 0x2105, 5016 "Scheduling resync.\n"); 5017 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5018 continue; 5019 } 5020 } 5021 5022 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5023 /* Check for matching device in port list. */ 5024 found = 0; 5025 fcport = NULL; 5026 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5027 if (memcmp(new_fcport->port_name, fcport->port_name, 5028 WWN_SIZE)) 5029 continue; 5030 5031 fcport->flags &= ~FCF_FABRIC_DEVICE; 5032 fcport->loop_id = new_fcport->loop_id; 5033 fcport->port_type = new_fcport->port_type; 5034 fcport->d_id.b24 = new_fcport->d_id.b24; 5035 memcpy(fcport->node_name, new_fcport->node_name, 5036 WWN_SIZE); 5037 fcport->scan_state = QLA_FCPORT_FOUND; 5038 found++; 5039 break; 5040 } 5041 5042 if (!found) { 5043 /* New device, add to fcports list. */ 5044 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5045 5046 /* Allocate a new replacement fcport. */ 5047 fcport = new_fcport; 5048 5049 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5050 5051 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5052 5053 if (new_fcport == NULL) { 5054 ql_log(ql_log_warn, vha, 0xd031, 5055 "Failed to allocate memory for fcport.\n"); 5056 rval = QLA_MEMORY_ALLOC_FAILED; 5057 goto cleanup_allocation; 5058 } 5059 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5060 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5061 } 5062 5063 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5064 5065 /* Base iIDMA settings on HBA port speed. */ 5066 fcport->fp_speed = ha->link_data_rate; 5067 5068 found_devs++; 5069 } 5070 5071 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5072 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5073 break; 5074 5075 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5076 if ((qla_dual_mode_enabled(vha) || 5077 qla_ini_mode_enabled(vha)) && 5078 atomic_read(&fcport->state) == FCS_ONLINE) { 5079 qla2x00_mark_device_lost(vha, fcport, 5080 ql2xplogiabsentdevice, 0); 5081 if (fcport->loop_id != FC_NO_LOOP_ID && 5082 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5083 fcport->port_type != FCT_INITIATOR && 5084 fcport->port_type != FCT_BROADCAST) { 5085 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5086 "%s %d %8phC post del sess\n", 5087 __func__, __LINE__, 5088 fcport->port_name); 5089 5090 qlt_schedule_sess_for_deletion(fcport); 5091 continue; 5092 } 5093 } 5094 } 5095 5096 if (fcport->scan_state == QLA_FCPORT_FOUND) 5097 qla24xx_fcport_handle_login(vha, fcport); 5098 } 5099 5100 cleanup_allocation: 5101 kfree(new_fcport); 5102 5103 if (rval != QLA_SUCCESS) { 5104 ql_dbg(ql_dbg_disc, vha, 0x2098, 5105 "Configure local loop error exit: rval=%x.\n", rval); 5106 } 5107 5108 return (rval); 5109 } 5110 5111 static void 5112 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5113 { 5114 int rval; 5115 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5116 struct qla_hw_data *ha = vha->hw; 5117 5118 if (!IS_IIDMA_CAPABLE(ha)) 5119 return; 5120 5121 if (atomic_read(&fcport->state) != FCS_ONLINE) 5122 return; 5123 5124 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5125 fcport->fp_speed > ha->link_data_rate || 5126 !ha->flags.gpsc_supported) 5127 return; 5128 5129 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5130 mb); 5131 if (rval != QLA_SUCCESS) { 5132 ql_dbg(ql_dbg_disc, vha, 0x2004, 5133 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5134 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5135 } else { 5136 ql_dbg(ql_dbg_disc, vha, 0x2005, 5137 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5138 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5139 fcport->fp_speed, fcport->port_name); 5140 } 5141 } 5142 5143 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5144 { 5145 qla2x00_iidma_fcport(vha, fcport); 5146 qla24xx_update_fcport_fcp_prio(vha, fcport); 5147 } 5148 5149 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5150 { 5151 struct qla_work_evt *e; 5152 5153 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5154 if (!e) 5155 return QLA_FUNCTION_FAILED; 5156 5157 e->u.fcport.fcport = fcport; 5158 return qla2x00_post_work(vha, e); 5159 } 5160 5161 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5162 static void 5163 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5164 { 5165 struct fc_rport_identifiers rport_ids; 5166 struct fc_rport *rport; 5167 unsigned long flags; 5168 5169 if (atomic_read(&fcport->state) == FCS_ONLINE) 5170 return; 5171 5172 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5173 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5174 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5175 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5176 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5177 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5178 if (!rport) { 5179 ql_log(ql_log_warn, vha, 0x2006, 5180 "Unable to allocate fc remote port.\n"); 5181 return; 5182 } 5183 5184 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5185 *((fc_port_t **)rport->dd_data) = fcport; 5186 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5187 5188 rport->supported_classes = fcport->supported_classes; 5189 5190 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5191 if (fcport->port_type == FCT_INITIATOR) 5192 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5193 if (fcport->port_type == FCT_TARGET) 5194 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5195 5196 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5197 "%s %8phN. rport %p is %s mode\n", 5198 __func__, fcport->port_name, rport, 5199 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5200 5201 fc_remote_port_rolechg(rport, rport_ids.roles); 5202 } 5203 5204 /* 5205 * qla2x00_update_fcport 5206 * Updates device on list. 5207 * 5208 * Input: 5209 * ha = adapter block pointer. 5210 * fcport = port structure pointer. 5211 * 5212 * Return: 5213 * 0 - Success 5214 * BIT_0 - error 5215 * 5216 * Context: 5217 * Kernel context. 5218 */ 5219 void 5220 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5221 { 5222 if (IS_SW_RESV_ADDR(fcport->d_id)) 5223 return; 5224 5225 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5226 __func__, fcport->port_name); 5227 5228 fcport->disc_state = DSC_UPD_FCPORT; 5229 fcport->login_retry = vha->hw->login_retry_count; 5230 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5231 fcport->deleted = 0; 5232 fcport->logout_on_delete = 1; 5233 fcport->login_retry = vha->hw->login_retry_count; 5234 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5235 5236 switch (vha->hw->current_topology) { 5237 case ISP_CFG_N: 5238 case ISP_CFG_NL: 5239 fcport->keep_nport_handle = 1; 5240 break; 5241 default: 5242 break; 5243 } 5244 5245 qla2x00_iidma_fcport(vha, fcport); 5246 5247 if (fcport->fc4f_nvme) { 5248 qla_nvme_register_remote(vha, fcport); 5249 fcport->disc_state = DSC_LOGIN_COMPLETE; 5250 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5251 return; 5252 } 5253 5254 qla24xx_update_fcport_fcp_prio(vha, fcport); 5255 5256 switch (vha->host->active_mode) { 5257 case MODE_INITIATOR: 5258 qla2x00_reg_remote_port(vha, fcport); 5259 break; 5260 case MODE_TARGET: 5261 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5262 !vha->vha_tgt.qla_tgt->tgt_stopped) 5263 qlt_fc_port_added(vha, fcport); 5264 break; 5265 case MODE_DUAL: 5266 qla2x00_reg_remote_port(vha, fcport); 5267 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5268 !vha->vha_tgt.qla_tgt->tgt_stopped) 5269 qlt_fc_port_added(vha, fcport); 5270 break; 5271 default: 5272 break; 5273 } 5274 5275 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5276 5277 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5278 if (fcport->id_changed) { 5279 fcport->id_changed = 0; 5280 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5281 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5282 __func__, __LINE__, fcport->port_name, 5283 vha->fcport_count); 5284 qla24xx_post_gfpnid_work(vha, fcport); 5285 } else { 5286 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5287 "%s %d %8phC post gpsc fcp_cnt %d\n", 5288 __func__, __LINE__, fcport->port_name, 5289 vha->fcport_count); 5290 qla24xx_post_gpsc_work(vha, fcport); 5291 } 5292 } 5293 5294 fcport->disc_state = DSC_LOGIN_COMPLETE; 5295 } 5296 5297 void qla_register_fcport_fn(struct work_struct *work) 5298 { 5299 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5300 u32 rscn_gen = fcport->rscn_gen; 5301 u16 data[2]; 5302 5303 if (IS_SW_RESV_ADDR(fcport->d_id)) 5304 return; 5305 5306 qla2x00_update_fcport(fcport->vha, fcport); 5307 5308 if (rscn_gen != fcport->rscn_gen) { 5309 /* RSCN(s) came in while registration */ 5310 switch (fcport->next_disc_state) { 5311 case DSC_DELETE_PEND: 5312 qlt_schedule_sess_for_deletion(fcport); 5313 break; 5314 case DSC_ADISC: 5315 data[0] = data[1] = 0; 5316 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5317 data); 5318 break; 5319 default: 5320 break; 5321 } 5322 } 5323 } 5324 5325 /* 5326 * qla2x00_configure_fabric 5327 * Setup SNS devices with loop ID's. 5328 * 5329 * Input: 5330 * ha = adapter block pointer. 5331 * 5332 * Returns: 5333 * 0 = success. 5334 * BIT_0 = error 5335 */ 5336 static int 5337 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5338 { 5339 int rval; 5340 fc_port_t *fcport; 5341 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5342 uint16_t loop_id; 5343 LIST_HEAD(new_fcports); 5344 struct qla_hw_data *ha = vha->hw; 5345 int discovery_gen; 5346 5347 /* If FL port exists, then SNS is present */ 5348 if (IS_FWI2_CAPABLE(ha)) 5349 loop_id = NPH_F_PORT; 5350 else 5351 loop_id = SNS_FL_PORT; 5352 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5353 if (rval != QLA_SUCCESS) { 5354 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5355 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5356 5357 vha->device_flags &= ~SWITCH_FOUND; 5358 return (QLA_SUCCESS); 5359 } 5360 vha->device_flags |= SWITCH_FOUND; 5361 5362 5363 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5364 rval = qla2x00_send_change_request(vha, 0x3, 0); 5365 if (rval != QLA_SUCCESS) 5366 ql_log(ql_log_warn, vha, 0x121, 5367 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5368 rval); 5369 } 5370 5371 5372 do { 5373 qla2x00_mgmt_svr_login(vha); 5374 5375 /* FDMI support. */ 5376 if (ql2xfdmienable && 5377 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5378 qla2x00_fdmi_register(vha); 5379 5380 /* Ensure we are logged into the SNS. */ 5381 loop_id = NPH_SNS_LID(ha); 5382 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5383 0xfc, mb, BIT_1|BIT_0); 5384 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5385 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5386 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5387 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5388 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5389 return rval; 5390 } 5391 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5392 if (qla2x00_rft_id(vha)) { 5393 /* EMPTY */ 5394 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5395 "Register FC-4 TYPE failed.\n"); 5396 if (test_bit(LOOP_RESYNC_NEEDED, 5397 &vha->dpc_flags)) 5398 break; 5399 } 5400 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5401 /* EMPTY */ 5402 ql_dbg(ql_dbg_disc, vha, 0x209a, 5403 "Register FC-4 Features failed.\n"); 5404 if (test_bit(LOOP_RESYNC_NEEDED, 5405 &vha->dpc_flags)) 5406 break; 5407 } 5408 if (vha->flags.nvme_enabled) { 5409 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5410 ql_dbg(ql_dbg_disc, vha, 0x2049, 5411 "Register NVME FC Type Features failed.\n"); 5412 } 5413 } 5414 if (qla2x00_rnn_id(vha)) { 5415 /* EMPTY */ 5416 ql_dbg(ql_dbg_disc, vha, 0x2104, 5417 "Register Node Name failed.\n"); 5418 if (test_bit(LOOP_RESYNC_NEEDED, 5419 &vha->dpc_flags)) 5420 break; 5421 } else if (qla2x00_rsnn_nn(vha)) { 5422 /* EMPTY */ 5423 ql_dbg(ql_dbg_disc, vha, 0x209b, 5424 "Register Symbolic Node Name failed.\n"); 5425 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5426 break; 5427 } 5428 } 5429 5430 5431 /* Mark the time right before querying FW for connected ports. 5432 * This process is long, asynchronous and by the time it's done, 5433 * collected information might not be accurate anymore. E.g. 5434 * disconnected port might have re-connected and a brand new 5435 * session has been created. In this case session's generation 5436 * will be newer than discovery_gen. */ 5437 qlt_do_generation_tick(vha, &discovery_gen); 5438 5439 if (USE_ASYNC_SCAN(ha)) { 5440 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5441 NULL); 5442 if (rval) 5443 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5444 } else { 5445 list_for_each_entry(fcport, &vha->vp_fcports, list) 5446 fcport->scan_state = QLA_FCPORT_SCAN; 5447 5448 rval = qla2x00_find_all_fabric_devs(vha); 5449 } 5450 if (rval != QLA_SUCCESS) 5451 break; 5452 } while (0); 5453 5454 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5455 qla_nvme_register_hba(vha); 5456 5457 if (rval) 5458 ql_dbg(ql_dbg_disc, vha, 0x2068, 5459 "Configure fabric error exit rval=%d.\n", rval); 5460 5461 return (rval); 5462 } 5463 5464 /* 5465 * qla2x00_find_all_fabric_devs 5466 * 5467 * Input: 5468 * ha = adapter block pointer. 5469 * dev = database device entry pointer. 5470 * 5471 * Returns: 5472 * 0 = success. 5473 * 5474 * Context: 5475 * Kernel context. 5476 */ 5477 static int 5478 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5479 { 5480 int rval; 5481 uint16_t loop_id; 5482 fc_port_t *fcport, *new_fcport; 5483 int found; 5484 5485 sw_info_t *swl; 5486 int swl_idx; 5487 int first_dev, last_dev; 5488 port_id_t wrap = {}, nxt_d_id; 5489 struct qla_hw_data *ha = vha->hw; 5490 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5491 unsigned long flags; 5492 5493 rval = QLA_SUCCESS; 5494 5495 /* Try GID_PT to get device list, else GAN. */ 5496 if (!ha->swl) 5497 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5498 GFP_KERNEL); 5499 swl = ha->swl; 5500 if (!swl) { 5501 /*EMPTY*/ 5502 ql_dbg(ql_dbg_disc, vha, 0x209c, 5503 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5504 } else { 5505 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5506 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5507 swl = NULL; 5508 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5509 return rval; 5510 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5511 swl = NULL; 5512 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5513 return rval; 5514 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5515 swl = NULL; 5516 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5517 return rval; 5518 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5519 swl = NULL; 5520 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5521 return rval; 5522 } 5523 5524 /* If other queries succeeded probe for FC-4 type */ 5525 if (swl) { 5526 qla2x00_gff_id(vha, swl); 5527 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5528 return rval; 5529 } 5530 } 5531 swl_idx = 0; 5532 5533 /* Allocate temporary fcport for any new fcports discovered. */ 5534 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5535 if (new_fcport == NULL) { 5536 ql_log(ql_log_warn, vha, 0x209d, 5537 "Failed to allocate memory for fcport.\n"); 5538 return (QLA_MEMORY_ALLOC_FAILED); 5539 } 5540 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5541 /* Set start port ID scan at adapter ID. */ 5542 first_dev = 1; 5543 last_dev = 0; 5544 5545 /* Starting free loop ID. */ 5546 loop_id = ha->min_external_loopid; 5547 for (; loop_id <= ha->max_loop_id; loop_id++) { 5548 if (qla2x00_is_reserved_id(vha, loop_id)) 5549 continue; 5550 5551 if (ha->current_topology == ISP_CFG_FL && 5552 (atomic_read(&vha->loop_down_timer) || 5553 LOOP_TRANSITION(vha))) { 5554 atomic_set(&vha->loop_down_timer, 0); 5555 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5556 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5557 break; 5558 } 5559 5560 if (swl != NULL) { 5561 if (last_dev) { 5562 wrap.b24 = new_fcport->d_id.b24; 5563 } else { 5564 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5565 memcpy(new_fcport->node_name, 5566 swl[swl_idx].node_name, WWN_SIZE); 5567 memcpy(new_fcport->port_name, 5568 swl[swl_idx].port_name, WWN_SIZE); 5569 memcpy(new_fcport->fabric_port_name, 5570 swl[swl_idx].fabric_port_name, WWN_SIZE); 5571 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5572 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5573 5574 new_fcport->nvme_flag = 0; 5575 new_fcport->fc4f_nvme = 0; 5576 if (vha->flags.nvme_enabled && 5577 swl[swl_idx].fc4f_nvme) { 5578 new_fcport->fc4f_nvme = 5579 swl[swl_idx].fc4f_nvme; 5580 ql_log(ql_log_info, vha, 0x2131, 5581 "FOUND: NVME port %8phC as FC Type 28h\n", 5582 new_fcport->port_name); 5583 } 5584 5585 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5586 last_dev = 1; 5587 } 5588 swl_idx++; 5589 } 5590 } else { 5591 /* Send GA_NXT to the switch */ 5592 rval = qla2x00_ga_nxt(vha, new_fcport); 5593 if (rval != QLA_SUCCESS) { 5594 ql_log(ql_log_warn, vha, 0x209e, 5595 "SNS scan failed -- assuming " 5596 "zero-entry result.\n"); 5597 rval = QLA_SUCCESS; 5598 break; 5599 } 5600 } 5601 5602 /* If wrap on switch device list, exit. */ 5603 if (first_dev) { 5604 wrap.b24 = new_fcport->d_id.b24; 5605 first_dev = 0; 5606 } else if (new_fcport->d_id.b24 == wrap.b24) { 5607 ql_dbg(ql_dbg_disc, vha, 0x209f, 5608 "Device wrap (%02x%02x%02x).\n", 5609 new_fcport->d_id.b.domain, 5610 new_fcport->d_id.b.area, 5611 new_fcport->d_id.b.al_pa); 5612 break; 5613 } 5614 5615 /* Bypass if same physical adapter. */ 5616 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5617 continue; 5618 5619 /* Bypass virtual ports of the same host. */ 5620 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5621 continue; 5622 5623 /* Bypass if same domain and area of adapter. */ 5624 if (((new_fcport->d_id.b24 & 0xffff00) == 5625 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5626 ISP_CFG_FL) 5627 continue; 5628 5629 /* Bypass reserved domain fields. */ 5630 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5631 continue; 5632 5633 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5634 if (ql2xgffidenable && 5635 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5636 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5637 continue; 5638 5639 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5640 5641 /* Locate matching device in database. */ 5642 found = 0; 5643 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5644 if (memcmp(new_fcport->port_name, fcport->port_name, 5645 WWN_SIZE)) 5646 continue; 5647 5648 fcport->scan_state = QLA_FCPORT_FOUND; 5649 5650 found++; 5651 5652 /* Update port state. */ 5653 memcpy(fcport->fabric_port_name, 5654 new_fcport->fabric_port_name, WWN_SIZE); 5655 fcport->fp_speed = new_fcport->fp_speed; 5656 5657 /* 5658 * If address the same and state FCS_ONLINE 5659 * (or in target mode), nothing changed. 5660 */ 5661 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5662 (atomic_read(&fcport->state) == FCS_ONLINE || 5663 (vha->host->active_mode == MODE_TARGET))) { 5664 break; 5665 } 5666 5667 /* 5668 * If device was not a fabric device before. 5669 */ 5670 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5671 fcport->d_id.b24 = new_fcport->d_id.b24; 5672 qla2x00_clear_loop_id(fcport); 5673 fcport->flags |= (FCF_FABRIC_DEVICE | 5674 FCF_LOGIN_NEEDED); 5675 break; 5676 } 5677 5678 /* 5679 * Port ID changed or device was marked to be updated; 5680 * Log it out if still logged in and mark it for 5681 * relogin later. 5682 */ 5683 if (qla_tgt_mode_enabled(base_vha)) { 5684 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5685 "port changed FC ID, %8phC" 5686 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5687 fcport->port_name, 5688 fcport->d_id.b.domain, 5689 fcport->d_id.b.area, 5690 fcport->d_id.b.al_pa, 5691 fcport->loop_id, 5692 new_fcport->d_id.b.domain, 5693 new_fcport->d_id.b.area, 5694 new_fcport->d_id.b.al_pa); 5695 fcport->d_id.b24 = new_fcport->d_id.b24; 5696 break; 5697 } 5698 5699 fcport->d_id.b24 = new_fcport->d_id.b24; 5700 fcport->flags |= FCF_LOGIN_NEEDED; 5701 break; 5702 } 5703 5704 if (fcport->fc4f_nvme) { 5705 if (fcport->disc_state == DSC_DELETE_PEND) { 5706 fcport->disc_state = DSC_GNL; 5707 vha->fcport_count--; 5708 fcport->login_succ = 0; 5709 } 5710 } 5711 5712 if (found) { 5713 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5714 continue; 5715 } 5716 /* If device was not in our fcports list, then add it. */ 5717 new_fcport->scan_state = QLA_FCPORT_FOUND; 5718 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5719 5720 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5721 5722 5723 /* Allocate a new replacement fcport. */ 5724 nxt_d_id.b24 = new_fcport->d_id.b24; 5725 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5726 if (new_fcport == NULL) { 5727 ql_log(ql_log_warn, vha, 0xd032, 5728 "Memory allocation failed for fcport.\n"); 5729 return (QLA_MEMORY_ALLOC_FAILED); 5730 } 5731 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5732 new_fcport->d_id.b24 = nxt_d_id.b24; 5733 } 5734 5735 qla2x00_free_fcport(new_fcport); 5736 5737 /* 5738 * Logout all previous fabric dev marked lost, except FCP2 devices. 5739 */ 5740 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5741 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5742 break; 5743 5744 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5745 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5746 continue; 5747 5748 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5749 if ((qla_dual_mode_enabled(vha) || 5750 qla_ini_mode_enabled(vha)) && 5751 atomic_read(&fcport->state) == FCS_ONLINE) { 5752 qla2x00_mark_device_lost(vha, fcport, 5753 ql2xplogiabsentdevice, 0); 5754 if (fcport->loop_id != FC_NO_LOOP_ID && 5755 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5756 fcport->port_type != FCT_INITIATOR && 5757 fcport->port_type != FCT_BROADCAST) { 5758 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5759 "%s %d %8phC post del sess\n", 5760 __func__, __LINE__, 5761 fcport->port_name); 5762 qlt_schedule_sess_for_deletion(fcport); 5763 continue; 5764 } 5765 } 5766 } 5767 5768 if (fcport->scan_state == QLA_FCPORT_FOUND) 5769 qla24xx_fcport_handle_login(vha, fcport); 5770 } 5771 return (rval); 5772 } 5773 5774 /* 5775 * qla2x00_find_new_loop_id 5776 * Scan through our port list and find a new usable loop ID. 5777 * 5778 * Input: 5779 * ha: adapter state pointer. 5780 * dev: port structure pointer. 5781 * 5782 * Returns: 5783 * qla2x00 local function return status code. 5784 * 5785 * Context: 5786 * Kernel context. 5787 */ 5788 int 5789 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5790 { 5791 int rval; 5792 struct qla_hw_data *ha = vha->hw; 5793 unsigned long flags = 0; 5794 5795 rval = QLA_SUCCESS; 5796 5797 spin_lock_irqsave(&ha->vport_slock, flags); 5798 5799 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5800 LOOPID_MAP_SIZE); 5801 if (dev->loop_id >= LOOPID_MAP_SIZE || 5802 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5803 dev->loop_id = FC_NO_LOOP_ID; 5804 rval = QLA_FUNCTION_FAILED; 5805 } else 5806 set_bit(dev->loop_id, ha->loop_id_map); 5807 5808 spin_unlock_irqrestore(&ha->vport_slock, flags); 5809 5810 if (rval == QLA_SUCCESS) 5811 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5812 "Assigning new loopid=%x, portid=%x.\n", 5813 dev->loop_id, dev->d_id.b24); 5814 else 5815 ql_log(ql_log_warn, dev->vha, 0x2087, 5816 "No loop_id's available, portid=%x.\n", 5817 dev->d_id.b24); 5818 5819 return (rval); 5820 } 5821 5822 5823 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 5824 int 5825 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 5826 { 5827 int loop_id = FC_NO_LOOP_ID; 5828 int lid = NPH_MGMT_SERVER - vha->vp_idx; 5829 unsigned long flags; 5830 struct qla_hw_data *ha = vha->hw; 5831 5832 if (vha->vp_idx == 0) { 5833 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 5834 return NPH_MGMT_SERVER; 5835 } 5836 5837 /* pick id from high and work down to low */ 5838 spin_lock_irqsave(&ha->vport_slock, flags); 5839 for (; lid > 0; lid--) { 5840 if (!test_bit(lid, vha->hw->loop_id_map)) { 5841 set_bit(lid, vha->hw->loop_id_map); 5842 loop_id = lid; 5843 break; 5844 } 5845 } 5846 spin_unlock_irqrestore(&ha->vport_slock, flags); 5847 5848 return loop_id; 5849 } 5850 5851 /* 5852 * qla2x00_fabric_login 5853 * Issue fabric login command. 5854 * 5855 * Input: 5856 * ha = adapter block pointer. 5857 * device = pointer to FC device type structure. 5858 * 5859 * Returns: 5860 * 0 - Login successfully 5861 * 1 - Login failed 5862 * 2 - Initiator device 5863 * 3 - Fatal error 5864 */ 5865 int 5866 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5867 uint16_t *next_loopid) 5868 { 5869 int rval; 5870 int retry; 5871 uint16_t tmp_loopid; 5872 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5873 struct qla_hw_data *ha = vha->hw; 5874 5875 retry = 0; 5876 tmp_loopid = 0; 5877 5878 for (;;) { 5879 ql_dbg(ql_dbg_disc, vha, 0x2000, 5880 "Trying Fabric Login w/loop id 0x%04x for port " 5881 "%02x%02x%02x.\n", 5882 fcport->loop_id, fcport->d_id.b.domain, 5883 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5884 5885 /* Login fcport on switch. */ 5886 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5887 fcport->d_id.b.domain, fcport->d_id.b.area, 5888 fcport->d_id.b.al_pa, mb, BIT_0); 5889 if (rval != QLA_SUCCESS) { 5890 return rval; 5891 } 5892 if (mb[0] == MBS_PORT_ID_USED) { 5893 /* 5894 * Device has another loop ID. The firmware team 5895 * recommends the driver perform an implicit login with 5896 * the specified ID again. The ID we just used is save 5897 * here so we return with an ID that can be tried by 5898 * the next login. 5899 */ 5900 retry++; 5901 tmp_loopid = fcport->loop_id; 5902 fcport->loop_id = mb[1]; 5903 5904 ql_dbg(ql_dbg_disc, vha, 0x2001, 5905 "Fabric Login: port in use - next loop " 5906 "id=0x%04x, port id= %02x%02x%02x.\n", 5907 fcport->loop_id, fcport->d_id.b.domain, 5908 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5909 5910 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5911 /* 5912 * Login succeeded. 5913 */ 5914 if (retry) { 5915 /* A retry occurred before. */ 5916 *next_loopid = tmp_loopid; 5917 } else { 5918 /* 5919 * No retry occurred before. Just increment the 5920 * ID value for next login. 5921 */ 5922 *next_loopid = (fcport->loop_id + 1); 5923 } 5924 5925 if (mb[1] & BIT_0) { 5926 fcport->port_type = FCT_INITIATOR; 5927 } else { 5928 fcport->port_type = FCT_TARGET; 5929 if (mb[1] & BIT_1) { 5930 fcport->flags |= FCF_FCP2_DEVICE; 5931 } 5932 } 5933 5934 if (mb[10] & BIT_0) 5935 fcport->supported_classes |= FC_COS_CLASS2; 5936 if (mb[10] & BIT_1) 5937 fcport->supported_classes |= FC_COS_CLASS3; 5938 5939 if (IS_FWI2_CAPABLE(ha)) { 5940 if (mb[10] & BIT_7) 5941 fcport->flags |= 5942 FCF_CONF_COMP_SUPPORTED; 5943 } 5944 5945 rval = QLA_SUCCESS; 5946 break; 5947 } else if (mb[0] == MBS_LOOP_ID_USED) { 5948 /* 5949 * Loop ID already used, try next loop ID. 5950 */ 5951 fcport->loop_id++; 5952 rval = qla2x00_find_new_loop_id(vha, fcport); 5953 if (rval != QLA_SUCCESS) { 5954 /* Ran out of loop IDs to use */ 5955 break; 5956 } 5957 } else if (mb[0] == MBS_COMMAND_ERROR) { 5958 /* 5959 * Firmware possibly timed out during login. If NO 5960 * retries are left to do then the device is declared 5961 * dead. 5962 */ 5963 *next_loopid = fcport->loop_id; 5964 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5965 fcport->d_id.b.domain, fcport->d_id.b.area, 5966 fcport->d_id.b.al_pa); 5967 qla2x00_mark_device_lost(vha, fcport, 1, 0); 5968 5969 rval = 1; 5970 break; 5971 } else { 5972 /* 5973 * unrecoverable / not handled error 5974 */ 5975 ql_dbg(ql_dbg_disc, vha, 0x2002, 5976 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 5977 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 5978 fcport->d_id.b.area, fcport->d_id.b.al_pa, 5979 fcport->loop_id, jiffies); 5980 5981 *next_loopid = fcport->loop_id; 5982 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5983 fcport->d_id.b.domain, fcport->d_id.b.area, 5984 fcport->d_id.b.al_pa); 5985 qla2x00_clear_loop_id(fcport); 5986 fcport->login_retry = 0; 5987 5988 rval = 3; 5989 break; 5990 } 5991 } 5992 5993 return (rval); 5994 } 5995 5996 /* 5997 * qla2x00_local_device_login 5998 * Issue local device login command. 5999 * 6000 * Input: 6001 * ha = adapter block pointer. 6002 * loop_id = loop id of device to login to. 6003 * 6004 * Returns (Where's the #define!!!!): 6005 * 0 - Login successfully 6006 * 1 - Login failed 6007 * 3 - Fatal error 6008 */ 6009 int 6010 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6011 { 6012 int rval; 6013 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6014 6015 memset(mb, 0, sizeof(mb)); 6016 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6017 if (rval == QLA_SUCCESS) { 6018 /* Interrogate mailbox registers for any errors */ 6019 if (mb[0] == MBS_COMMAND_ERROR) 6020 rval = 1; 6021 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6022 /* device not in PCB table */ 6023 rval = 3; 6024 } 6025 6026 return (rval); 6027 } 6028 6029 /* 6030 * qla2x00_loop_resync 6031 * Resync with fibre channel devices. 6032 * 6033 * Input: 6034 * ha = adapter block pointer. 6035 * 6036 * Returns: 6037 * 0 = success 6038 */ 6039 int 6040 qla2x00_loop_resync(scsi_qla_host_t *vha) 6041 { 6042 int rval = QLA_SUCCESS; 6043 uint32_t wait_time; 6044 6045 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6046 if (vha->flags.online) { 6047 if (!(rval = qla2x00_fw_ready(vha))) { 6048 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6049 wait_time = 256; 6050 do { 6051 if (!IS_QLAFX00(vha->hw)) { 6052 /* 6053 * Issue a marker after FW becomes 6054 * ready. 6055 */ 6056 qla2x00_marker(vha, vha->hw->base_qpair, 6057 0, 0, MK_SYNC_ALL); 6058 vha->marker_needed = 0; 6059 } 6060 6061 /* Remap devices on Loop. */ 6062 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6063 6064 if (IS_QLAFX00(vha->hw)) 6065 qlafx00_configure_devices(vha); 6066 else 6067 qla2x00_configure_loop(vha); 6068 6069 wait_time--; 6070 } while (!atomic_read(&vha->loop_down_timer) && 6071 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6072 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6073 &vha->dpc_flags))); 6074 } 6075 } 6076 6077 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6078 return (QLA_FUNCTION_FAILED); 6079 6080 if (rval) 6081 ql_dbg(ql_dbg_disc, vha, 0x206c, 6082 "%s *** FAILED ***.\n", __func__); 6083 6084 return (rval); 6085 } 6086 6087 /* 6088 * qla2x00_perform_loop_resync 6089 * Description: This function will set the appropriate flags and call 6090 * qla2x00_loop_resync. If successful loop will be resynced 6091 * Arguments : scsi_qla_host_t pointer 6092 * returm : Success or Failure 6093 */ 6094 6095 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6096 { 6097 int32_t rval = 0; 6098 6099 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6100 /*Configure the flags so that resync happens properly*/ 6101 atomic_set(&ha->loop_down_timer, 0); 6102 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6103 atomic_set(&ha->loop_state, LOOP_UP); 6104 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6105 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6106 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6107 6108 rval = qla2x00_loop_resync(ha); 6109 } else 6110 atomic_set(&ha->loop_state, LOOP_DEAD); 6111 6112 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6113 } 6114 6115 return rval; 6116 } 6117 6118 void 6119 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6120 { 6121 fc_port_t *fcport; 6122 struct scsi_qla_host *vha; 6123 struct qla_hw_data *ha = base_vha->hw; 6124 unsigned long flags; 6125 6126 spin_lock_irqsave(&ha->vport_slock, flags); 6127 /* Go with deferred removal of rport references. */ 6128 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6129 atomic_inc(&vha->vref_count); 6130 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6131 if (fcport->drport && 6132 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6133 spin_unlock_irqrestore(&ha->vport_slock, flags); 6134 qla2x00_rport_del(fcport); 6135 6136 spin_lock_irqsave(&ha->vport_slock, flags); 6137 } 6138 } 6139 atomic_dec(&vha->vref_count); 6140 wake_up(&vha->vref_waitq); 6141 } 6142 spin_unlock_irqrestore(&ha->vport_slock, flags); 6143 } 6144 6145 /* Assumes idc_lock always held on entry */ 6146 void 6147 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6148 { 6149 struct qla_hw_data *ha = vha->hw; 6150 uint32_t drv_presence, drv_presence_mask; 6151 uint32_t dev_part_info1, dev_part_info2, class_type; 6152 uint32_t class_type_mask = 0x3; 6153 uint16_t fcoe_other_function = 0xffff, i; 6154 6155 if (IS_QLA8044(ha)) { 6156 drv_presence = qla8044_rd_direct(vha, 6157 QLA8044_CRB_DRV_ACTIVE_INDEX); 6158 dev_part_info1 = qla8044_rd_direct(vha, 6159 QLA8044_CRB_DEV_PART_INFO_INDEX); 6160 dev_part_info2 = qla8044_rd_direct(vha, 6161 QLA8044_CRB_DEV_PART_INFO2); 6162 } else { 6163 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6164 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6165 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6166 } 6167 for (i = 0; i < 8; i++) { 6168 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6169 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6170 (i != ha->portnum)) { 6171 fcoe_other_function = i; 6172 break; 6173 } 6174 } 6175 if (fcoe_other_function == 0xffff) { 6176 for (i = 0; i < 8; i++) { 6177 class_type = ((dev_part_info2 >> (i * 4)) & 6178 class_type_mask); 6179 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6180 ((i + 8) != ha->portnum)) { 6181 fcoe_other_function = i + 8; 6182 break; 6183 } 6184 } 6185 } 6186 /* 6187 * Prepare drv-presence mask based on fcoe functions present. 6188 * However consider only valid physical fcoe function numbers (0-15). 6189 */ 6190 drv_presence_mask = ~((1 << (ha->portnum)) | 6191 ((fcoe_other_function == 0xffff) ? 6192 0 : (1 << (fcoe_other_function)))); 6193 6194 /* We are the reset owner iff: 6195 * - No other protocol drivers present. 6196 * - This is the lowest among fcoe functions. */ 6197 if (!(drv_presence & drv_presence_mask) && 6198 (ha->portnum < fcoe_other_function)) { 6199 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6200 "This host is Reset owner.\n"); 6201 ha->flags.nic_core_reset_owner = 1; 6202 } 6203 } 6204 6205 static int 6206 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6207 { 6208 int rval = QLA_SUCCESS; 6209 struct qla_hw_data *ha = vha->hw; 6210 uint32_t drv_ack; 6211 6212 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6213 if (rval == QLA_SUCCESS) { 6214 drv_ack |= (1 << ha->portnum); 6215 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6216 } 6217 6218 return rval; 6219 } 6220 6221 static int 6222 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6223 { 6224 int rval = QLA_SUCCESS; 6225 struct qla_hw_data *ha = vha->hw; 6226 uint32_t drv_ack; 6227 6228 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6229 if (rval == QLA_SUCCESS) { 6230 drv_ack &= ~(1 << ha->portnum); 6231 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6232 } 6233 6234 return rval; 6235 } 6236 6237 static const char * 6238 qla83xx_dev_state_to_string(uint32_t dev_state) 6239 { 6240 switch (dev_state) { 6241 case QLA8XXX_DEV_COLD: 6242 return "COLD/RE-INIT"; 6243 case QLA8XXX_DEV_INITIALIZING: 6244 return "INITIALIZING"; 6245 case QLA8XXX_DEV_READY: 6246 return "READY"; 6247 case QLA8XXX_DEV_NEED_RESET: 6248 return "NEED RESET"; 6249 case QLA8XXX_DEV_NEED_QUIESCENT: 6250 return "NEED QUIESCENT"; 6251 case QLA8XXX_DEV_FAILED: 6252 return "FAILED"; 6253 case QLA8XXX_DEV_QUIESCENT: 6254 return "QUIESCENT"; 6255 default: 6256 return "Unknown"; 6257 } 6258 } 6259 6260 /* Assumes idc-lock always held on entry */ 6261 void 6262 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6263 { 6264 struct qla_hw_data *ha = vha->hw; 6265 uint32_t idc_audit_reg = 0, duration_secs = 0; 6266 6267 switch (audit_type) { 6268 case IDC_AUDIT_TIMESTAMP: 6269 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6270 idc_audit_reg = (ha->portnum) | 6271 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6272 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6273 break; 6274 6275 case IDC_AUDIT_COMPLETION: 6276 duration_secs = ((jiffies_to_msecs(jiffies) - 6277 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6278 idc_audit_reg = (ha->portnum) | 6279 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6280 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6281 break; 6282 6283 default: 6284 ql_log(ql_log_warn, vha, 0xb078, 6285 "Invalid audit type specified.\n"); 6286 break; 6287 } 6288 } 6289 6290 /* Assumes idc_lock always held on entry */ 6291 static int 6292 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6293 { 6294 struct qla_hw_data *ha = vha->hw; 6295 uint32_t idc_control, dev_state; 6296 6297 __qla83xx_get_idc_control(vha, &idc_control); 6298 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6299 ql_log(ql_log_info, vha, 0xb080, 6300 "NIC Core reset has been disabled. idc-control=0x%x\n", 6301 idc_control); 6302 return QLA_FUNCTION_FAILED; 6303 } 6304 6305 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6306 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6307 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6308 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6309 QLA8XXX_DEV_NEED_RESET); 6310 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6311 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6312 } else { 6313 const char *state = qla83xx_dev_state_to_string(dev_state); 6314 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6315 6316 /* SV: XXX: Is timeout required here? */ 6317 /* Wait for IDC state change READY -> NEED_RESET */ 6318 while (dev_state == QLA8XXX_DEV_READY) { 6319 qla83xx_idc_unlock(vha, 0); 6320 msleep(200); 6321 qla83xx_idc_lock(vha, 0); 6322 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6323 } 6324 } 6325 6326 /* Send IDC ack by writing to drv-ack register */ 6327 __qla83xx_set_drv_ack(vha); 6328 6329 return QLA_SUCCESS; 6330 } 6331 6332 int 6333 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6334 { 6335 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6336 } 6337 6338 int 6339 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6340 { 6341 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6342 } 6343 6344 static int 6345 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6346 { 6347 uint32_t drv_presence = 0; 6348 struct qla_hw_data *ha = vha->hw; 6349 6350 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6351 if (drv_presence & (1 << ha->portnum)) 6352 return QLA_SUCCESS; 6353 else 6354 return QLA_TEST_FAILED; 6355 } 6356 6357 int 6358 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6359 { 6360 int rval = QLA_SUCCESS; 6361 struct qla_hw_data *ha = vha->hw; 6362 6363 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6364 "Entered %s().\n", __func__); 6365 6366 if (vha->device_flags & DFLG_DEV_FAILED) { 6367 ql_log(ql_log_warn, vha, 0xb059, 6368 "Device in unrecoverable FAILED state.\n"); 6369 return QLA_FUNCTION_FAILED; 6370 } 6371 6372 qla83xx_idc_lock(vha, 0); 6373 6374 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6375 ql_log(ql_log_warn, vha, 0xb05a, 6376 "Function=0x%x has been removed from IDC participation.\n", 6377 ha->portnum); 6378 rval = QLA_FUNCTION_FAILED; 6379 goto exit; 6380 } 6381 6382 qla83xx_reset_ownership(vha); 6383 6384 rval = qla83xx_initiating_reset(vha); 6385 6386 /* 6387 * Perform reset if we are the reset-owner, 6388 * else wait till IDC state changes to READY/FAILED. 6389 */ 6390 if (rval == QLA_SUCCESS) { 6391 rval = qla83xx_idc_state_handler(vha); 6392 6393 if (rval == QLA_SUCCESS) 6394 ha->flags.nic_core_hung = 0; 6395 __qla83xx_clear_drv_ack(vha); 6396 } 6397 6398 exit: 6399 qla83xx_idc_unlock(vha, 0); 6400 6401 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6402 6403 return rval; 6404 } 6405 6406 int 6407 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6408 { 6409 struct qla_hw_data *ha = vha->hw; 6410 int rval = QLA_FUNCTION_FAILED; 6411 6412 if (!IS_MCTP_CAPABLE(ha)) { 6413 /* This message can be removed from the final version */ 6414 ql_log(ql_log_info, vha, 0x506d, 6415 "This board is not MCTP capable\n"); 6416 return rval; 6417 } 6418 6419 if (!ha->mctp_dump) { 6420 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6421 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6422 6423 if (!ha->mctp_dump) { 6424 ql_log(ql_log_warn, vha, 0x506e, 6425 "Failed to allocate memory for mctp dump\n"); 6426 return rval; 6427 } 6428 } 6429 6430 #define MCTP_DUMP_STR_ADDR 0x00000000 6431 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6432 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6433 if (rval != QLA_SUCCESS) { 6434 ql_log(ql_log_warn, vha, 0x506f, 6435 "Failed to capture mctp dump\n"); 6436 } else { 6437 ql_log(ql_log_info, vha, 0x5070, 6438 "Mctp dump capture for host (%ld/%p).\n", 6439 vha->host_no, ha->mctp_dump); 6440 ha->mctp_dumped = 1; 6441 } 6442 6443 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6444 ha->flags.nic_core_reset_hdlr_active = 1; 6445 rval = qla83xx_restart_nic_firmware(vha); 6446 if (rval) 6447 /* NIC Core reset failed. */ 6448 ql_log(ql_log_warn, vha, 0x5071, 6449 "Failed to restart nic firmware\n"); 6450 else 6451 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6452 "Restarted NIC firmware successfully.\n"); 6453 ha->flags.nic_core_reset_hdlr_active = 0; 6454 } 6455 6456 return rval; 6457 6458 } 6459 6460 /* 6461 * qla2x00_quiesce_io 6462 * Description: This function will block the new I/Os 6463 * Its not aborting any I/Os as context 6464 * is not destroyed during quiescence 6465 * Arguments: scsi_qla_host_t 6466 * return : void 6467 */ 6468 void 6469 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6470 { 6471 struct qla_hw_data *ha = vha->hw; 6472 struct scsi_qla_host *vp; 6473 6474 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6475 "Quiescing I/O - ha=%p.\n", ha); 6476 6477 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6478 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6479 atomic_set(&vha->loop_state, LOOP_DOWN); 6480 qla2x00_mark_all_devices_lost(vha, 0); 6481 list_for_each_entry(vp, &ha->vp_list, list) 6482 qla2x00_mark_all_devices_lost(vp, 0); 6483 } else { 6484 if (!atomic_read(&vha->loop_down_timer)) 6485 atomic_set(&vha->loop_down_timer, 6486 LOOP_DOWN_TIME); 6487 } 6488 /* Wait for pending cmds to complete */ 6489 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6490 } 6491 6492 void 6493 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6494 { 6495 struct qla_hw_data *ha = vha->hw; 6496 struct scsi_qla_host *vp; 6497 unsigned long flags; 6498 fc_port_t *fcport; 6499 u16 i; 6500 6501 /* For ISP82XX, driver waits for completion of the commands. 6502 * online flag should be set. 6503 */ 6504 if (!(IS_P3P_TYPE(ha))) 6505 vha->flags.online = 0; 6506 ha->flags.chip_reset_done = 0; 6507 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6508 vha->qla_stats.total_isp_aborts++; 6509 6510 ql_log(ql_log_info, vha, 0x00af, 6511 "Performing ISP error recovery - ha=%p.\n", ha); 6512 6513 ha->flags.purge_mbox = 1; 6514 /* For ISP82XX, reset_chip is just disabling interrupts. 6515 * Driver waits for the completion of the commands. 6516 * the interrupts need to be enabled. 6517 */ 6518 if (!(IS_P3P_TYPE(ha))) 6519 ha->isp_ops->reset_chip(vha); 6520 6521 ha->link_data_rate = PORT_SPEED_UNKNOWN; 6522 SAVE_TOPO(ha); 6523 ha->flags.rida_fmt2 = 0; 6524 ha->flags.n2n_ae = 0; 6525 ha->flags.lip_ae = 0; 6526 ha->current_topology = 0; 6527 ha->flags.fw_started = 0; 6528 ha->flags.fw_init_done = 0; 6529 ha->chip_reset++; 6530 ha->base_qpair->chip_reset = ha->chip_reset; 6531 for (i = 0; i < ha->max_qpairs; i++) { 6532 if (ha->queue_pair_map[i]) 6533 ha->queue_pair_map[i]->chip_reset = 6534 ha->base_qpair->chip_reset; 6535 } 6536 6537 /* purge MBox commands */ 6538 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6539 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6540 complete(&ha->mbx_intr_comp); 6541 } 6542 6543 i = 0; 6544 while (atomic_read(&ha->num_pend_mbx_stage3) || 6545 atomic_read(&ha->num_pend_mbx_stage2) || 6546 atomic_read(&ha->num_pend_mbx_stage1)) { 6547 msleep(20); 6548 i++; 6549 if (i > 50) 6550 break; 6551 } 6552 ha->flags.purge_mbox = 0; 6553 6554 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6555 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6556 atomic_set(&vha->loop_state, LOOP_DOWN); 6557 qla2x00_mark_all_devices_lost(vha, 0); 6558 6559 spin_lock_irqsave(&ha->vport_slock, flags); 6560 list_for_each_entry(vp, &ha->vp_list, list) { 6561 atomic_inc(&vp->vref_count); 6562 spin_unlock_irqrestore(&ha->vport_slock, flags); 6563 6564 qla2x00_mark_all_devices_lost(vp, 0); 6565 6566 spin_lock_irqsave(&ha->vport_slock, flags); 6567 atomic_dec(&vp->vref_count); 6568 } 6569 spin_unlock_irqrestore(&ha->vport_slock, flags); 6570 } else { 6571 if (!atomic_read(&vha->loop_down_timer)) 6572 atomic_set(&vha->loop_down_timer, 6573 LOOP_DOWN_TIME); 6574 } 6575 6576 /* Clear all async request states across all VPs. */ 6577 list_for_each_entry(fcport, &vha->vp_fcports, list) 6578 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6579 spin_lock_irqsave(&ha->vport_slock, flags); 6580 list_for_each_entry(vp, &ha->vp_list, list) { 6581 atomic_inc(&vp->vref_count); 6582 spin_unlock_irqrestore(&ha->vport_slock, flags); 6583 6584 list_for_each_entry(fcport, &vp->vp_fcports, list) 6585 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6586 6587 spin_lock_irqsave(&ha->vport_slock, flags); 6588 atomic_dec(&vp->vref_count); 6589 } 6590 spin_unlock_irqrestore(&ha->vport_slock, flags); 6591 6592 if (!ha->flags.eeh_busy) { 6593 /* Make sure for ISP 82XX IO DMA is complete */ 6594 if (IS_P3P_TYPE(ha)) { 6595 qla82xx_chip_reset_cleanup(vha); 6596 ql_log(ql_log_info, vha, 0x00b4, 6597 "Done chip reset cleanup.\n"); 6598 6599 /* Done waiting for pending commands. 6600 * Reset the online flag. 6601 */ 6602 vha->flags.online = 0; 6603 } 6604 6605 /* Requeue all commands in outstanding command list. */ 6606 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6607 } 6608 /* memory barrier */ 6609 wmb(); 6610 } 6611 6612 /* 6613 * qla2x00_abort_isp 6614 * Resets ISP and aborts all outstanding commands. 6615 * 6616 * Input: 6617 * ha = adapter block pointer. 6618 * 6619 * Returns: 6620 * 0 = success 6621 */ 6622 int 6623 qla2x00_abort_isp(scsi_qla_host_t *vha) 6624 { 6625 int rval; 6626 uint8_t status = 0; 6627 struct qla_hw_data *ha = vha->hw; 6628 struct scsi_qla_host *vp; 6629 struct req_que *req = ha->req_q_map[0]; 6630 unsigned long flags; 6631 6632 if (vha->flags.online) { 6633 qla2x00_abort_isp_cleanup(vha); 6634 6635 if (IS_QLA8031(ha)) { 6636 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6637 "Clearing fcoe driver presence.\n"); 6638 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6639 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6640 "Error while clearing DRV-Presence.\n"); 6641 } 6642 6643 if (unlikely(pci_channel_offline(ha->pdev) && 6644 ha->flags.pci_channel_io_perm_failure)) { 6645 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6646 status = 0; 6647 return status; 6648 } 6649 6650 switch (vha->qlini_mode) { 6651 case QLA2XXX_INI_MODE_DISABLED: 6652 if (!qla_tgt_mode_enabled(vha)) 6653 return 0; 6654 break; 6655 case QLA2XXX_INI_MODE_DUAL: 6656 if (!qla_dual_mode_enabled(vha)) 6657 return 0; 6658 break; 6659 case QLA2XXX_INI_MODE_ENABLED: 6660 default: 6661 break; 6662 } 6663 6664 ha->isp_ops->get_flash_version(vha, req->ring); 6665 6666 ha->isp_ops->nvram_config(vha); 6667 6668 if (!qla2x00_restart_isp(vha)) { 6669 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6670 6671 if (!atomic_read(&vha->loop_down_timer)) { 6672 /* 6673 * Issue marker command only when we are going 6674 * to start the I/O . 6675 */ 6676 vha->marker_needed = 1; 6677 } 6678 6679 vha->flags.online = 1; 6680 6681 ha->isp_ops->enable_intrs(ha); 6682 6683 ha->isp_abort_cnt = 0; 6684 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6685 6686 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6687 qla2x00_get_fw_version(vha); 6688 if (ha->fce) { 6689 ha->flags.fce_enabled = 1; 6690 memset(ha->fce, 0, 6691 fce_calc_size(ha->fce_bufs)); 6692 rval = qla2x00_enable_fce_trace(vha, 6693 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6694 &ha->fce_bufs); 6695 if (rval) { 6696 ql_log(ql_log_warn, vha, 0x8033, 6697 "Unable to reinitialize FCE " 6698 "(%d).\n", rval); 6699 ha->flags.fce_enabled = 0; 6700 } 6701 } 6702 6703 if (ha->eft) { 6704 memset(ha->eft, 0, EFT_SIZE); 6705 rval = qla2x00_enable_eft_trace(vha, 6706 ha->eft_dma, EFT_NUM_BUFFERS); 6707 if (rval) { 6708 ql_log(ql_log_warn, vha, 0x8034, 6709 "Unable to reinitialize EFT " 6710 "(%d).\n", rval); 6711 } 6712 } 6713 } else { /* failed the ISP abort */ 6714 vha->flags.online = 1; 6715 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6716 if (ha->isp_abort_cnt == 0) { 6717 ql_log(ql_log_fatal, vha, 0x8035, 6718 "ISP error recover failed - " 6719 "board disabled.\n"); 6720 /* 6721 * The next call disables the board 6722 * completely. 6723 */ 6724 qla2x00_abort_isp_cleanup(vha); 6725 vha->flags.online = 0; 6726 clear_bit(ISP_ABORT_RETRY, 6727 &vha->dpc_flags); 6728 status = 0; 6729 } else { /* schedule another ISP abort */ 6730 ha->isp_abort_cnt--; 6731 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6732 "ISP abort - retry remaining %d.\n", 6733 ha->isp_abort_cnt); 6734 status = 1; 6735 } 6736 } else { 6737 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6738 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6739 "ISP error recovery - retrying (%d) " 6740 "more times.\n", ha->isp_abort_cnt); 6741 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6742 status = 1; 6743 } 6744 } 6745 6746 } 6747 6748 if (!status) { 6749 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6750 qla2x00_configure_hba(vha); 6751 spin_lock_irqsave(&ha->vport_slock, flags); 6752 list_for_each_entry(vp, &ha->vp_list, list) { 6753 if (vp->vp_idx) { 6754 atomic_inc(&vp->vref_count); 6755 spin_unlock_irqrestore(&ha->vport_slock, flags); 6756 6757 qla2x00_vp_abort_isp(vp); 6758 6759 spin_lock_irqsave(&ha->vport_slock, flags); 6760 atomic_dec(&vp->vref_count); 6761 } 6762 } 6763 spin_unlock_irqrestore(&ha->vport_slock, flags); 6764 6765 if (IS_QLA8031(ha)) { 6766 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6767 "Setting back fcoe driver presence.\n"); 6768 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6769 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6770 "Error while setting DRV-Presence.\n"); 6771 } 6772 } else { 6773 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6774 __func__); 6775 } 6776 6777 return(status); 6778 } 6779 6780 /* 6781 * qla2x00_restart_isp 6782 * restarts the ISP after a reset 6783 * 6784 * Input: 6785 * ha = adapter block pointer. 6786 * 6787 * Returns: 6788 * 0 = success 6789 */ 6790 static int 6791 qla2x00_restart_isp(scsi_qla_host_t *vha) 6792 { 6793 int status = 0; 6794 struct qla_hw_data *ha = vha->hw; 6795 6796 /* If firmware needs to be loaded */ 6797 if (qla2x00_isp_firmware(vha)) { 6798 vha->flags.online = 0; 6799 status = ha->isp_ops->chip_diag(vha); 6800 if (!status) 6801 status = qla2x00_setup_chip(vha); 6802 } 6803 6804 if (!status && !(status = qla2x00_init_rings(vha))) { 6805 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6806 ha->flags.chip_reset_done = 1; 6807 6808 /* Initialize the queues in use */ 6809 qla25xx_init_queues(ha); 6810 6811 status = qla2x00_fw_ready(vha); 6812 if (!status) { 6813 /* Issue a marker after FW becomes ready. */ 6814 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 6815 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6816 } 6817 6818 /* if no cable then assume it's good */ 6819 if ((vha->device_flags & DFLG_NO_CABLE)) 6820 status = 0; 6821 } 6822 return (status); 6823 } 6824 6825 static int 6826 qla25xx_init_queues(struct qla_hw_data *ha) 6827 { 6828 struct rsp_que *rsp = NULL; 6829 struct req_que *req = NULL; 6830 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6831 int ret = -1; 6832 int i; 6833 6834 for (i = 1; i < ha->max_rsp_queues; i++) { 6835 rsp = ha->rsp_q_map[i]; 6836 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6837 rsp->options &= ~BIT_0; 6838 ret = qla25xx_init_rsp_que(base_vha, rsp); 6839 if (ret != QLA_SUCCESS) 6840 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6841 "%s Rsp que: %d init failed.\n", 6842 __func__, rsp->id); 6843 else 6844 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6845 "%s Rsp que: %d inited.\n", 6846 __func__, rsp->id); 6847 } 6848 } 6849 for (i = 1; i < ha->max_req_queues; i++) { 6850 req = ha->req_q_map[i]; 6851 if (req && test_bit(i, ha->req_qid_map)) { 6852 /* Clear outstanding commands array. */ 6853 req->options &= ~BIT_0; 6854 ret = qla25xx_init_req_que(base_vha, req); 6855 if (ret != QLA_SUCCESS) 6856 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6857 "%s Req que: %d init failed.\n", 6858 __func__, req->id); 6859 else 6860 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6861 "%s Req que: %d inited.\n", 6862 __func__, req->id); 6863 } 6864 } 6865 return ret; 6866 } 6867 6868 /* 6869 * qla2x00_reset_adapter 6870 * Reset adapter. 6871 * 6872 * Input: 6873 * ha = adapter block pointer. 6874 */ 6875 void 6876 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6877 { 6878 unsigned long flags = 0; 6879 struct qla_hw_data *ha = vha->hw; 6880 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6881 6882 vha->flags.online = 0; 6883 ha->isp_ops->disable_intrs(ha); 6884 6885 spin_lock_irqsave(&ha->hardware_lock, flags); 6886 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6887 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6888 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6889 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6890 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6891 } 6892 6893 void 6894 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6895 { 6896 unsigned long flags = 0; 6897 struct qla_hw_data *ha = vha->hw; 6898 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6899 6900 if (IS_P3P_TYPE(ha)) 6901 return; 6902 6903 vha->flags.online = 0; 6904 ha->isp_ops->disable_intrs(ha); 6905 6906 spin_lock_irqsave(&ha->hardware_lock, flags); 6907 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6908 RD_REG_DWORD(®->hccr); 6909 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6910 RD_REG_DWORD(®->hccr); 6911 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6912 6913 if (IS_NOPOLLING_TYPE(ha)) 6914 ha->isp_ops->enable_intrs(ha); 6915 } 6916 6917 /* On sparc systems, obtain port and node WWN from firmware 6918 * properties. 6919 */ 6920 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6921 struct nvram_24xx *nv) 6922 { 6923 #ifdef CONFIG_SPARC 6924 struct qla_hw_data *ha = vha->hw; 6925 struct pci_dev *pdev = ha->pdev; 6926 struct device_node *dp = pci_device_to_OF_node(pdev); 6927 const u8 *val; 6928 int len; 6929 6930 val = of_get_property(dp, "port-wwn", &len); 6931 if (val && len >= WWN_SIZE) 6932 memcpy(nv->port_name, val, WWN_SIZE); 6933 6934 val = of_get_property(dp, "node-wwn", &len); 6935 if (val && len >= WWN_SIZE) 6936 memcpy(nv->node_name, val, WWN_SIZE); 6937 #endif 6938 } 6939 6940 int 6941 qla24xx_nvram_config(scsi_qla_host_t *vha) 6942 { 6943 int rval; 6944 struct init_cb_24xx *icb; 6945 struct nvram_24xx *nv; 6946 uint32_t *dptr; 6947 uint8_t *dptr1, *dptr2; 6948 uint32_t chksum; 6949 uint16_t cnt; 6950 struct qla_hw_data *ha = vha->hw; 6951 6952 rval = QLA_SUCCESS; 6953 icb = (struct init_cb_24xx *)ha->init_cb; 6954 nv = ha->nvram; 6955 6956 /* Determine NVRAM starting address. */ 6957 if (ha->port_no == 0) { 6958 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 6959 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 6960 } else { 6961 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 6962 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 6963 } 6964 6965 ha->nvram_size = sizeof(struct nvram_24xx); 6966 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6967 6968 /* Get VPD data into cache */ 6969 ha->vpd = ha->nvram + VPD_OFFSET; 6970 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 6971 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 6972 6973 /* Get NVRAM data into cache and calculate checksum. */ 6974 dptr = (uint32_t *)nv; 6975 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 6976 ha->nvram_size); 6977 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6978 chksum += le32_to_cpu(*dptr); 6979 6980 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 6981 "Contents of NVRAM\n"); 6982 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 6983 (uint8_t *)nv, ha->nvram_size); 6984 6985 /* Bad NVRAM data, set defaults parameters. */ 6986 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6987 || nv->id[3] != ' ' || 6988 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6989 /* Reset NVRAM data. */ 6990 ql_log(ql_log_warn, vha, 0x006b, 6991 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6992 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 6993 ql_log(ql_log_warn, vha, 0x006c, 6994 "Falling back to functioning (yet invalid -- WWPN) " 6995 "defaults.\n"); 6996 6997 /* 6998 * Set default initialization control block. 6999 */ 7000 memset(nv, 0, ha->nvram_size); 7001 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7002 nv->version = cpu_to_le16(ICB_VERSION); 7003 nv->frame_payload_size = 2048; 7004 nv->execution_throttle = cpu_to_le16(0xFFFF); 7005 nv->exchange_count = cpu_to_le16(0); 7006 nv->hard_address = cpu_to_le16(124); 7007 nv->port_name[0] = 0x21; 7008 nv->port_name[1] = 0x00 + ha->port_no + 1; 7009 nv->port_name[2] = 0x00; 7010 nv->port_name[3] = 0xe0; 7011 nv->port_name[4] = 0x8b; 7012 nv->port_name[5] = 0x1c; 7013 nv->port_name[6] = 0x55; 7014 nv->port_name[7] = 0x86; 7015 nv->node_name[0] = 0x20; 7016 nv->node_name[1] = 0x00; 7017 nv->node_name[2] = 0x00; 7018 nv->node_name[3] = 0xe0; 7019 nv->node_name[4] = 0x8b; 7020 nv->node_name[5] = 0x1c; 7021 nv->node_name[6] = 0x55; 7022 nv->node_name[7] = 0x86; 7023 qla24xx_nvram_wwn_from_ofw(vha, nv); 7024 nv->login_retry_count = cpu_to_le16(8); 7025 nv->interrupt_delay_timer = cpu_to_le16(0); 7026 nv->login_timeout = cpu_to_le16(0); 7027 nv->firmware_options_1 = 7028 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7029 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7030 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7031 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7032 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7033 nv->efi_parameters = cpu_to_le32(0); 7034 nv->reset_delay = 5; 7035 nv->max_luns_per_target = cpu_to_le16(128); 7036 nv->port_down_retry_count = cpu_to_le16(30); 7037 nv->link_down_timeout = cpu_to_le16(30); 7038 7039 rval = 1; 7040 } 7041 7042 if (qla_tgt_mode_enabled(vha)) { 7043 /* Don't enable full login after initial LIP */ 7044 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7045 /* Don't enable LIP full login for initiator */ 7046 nv->host_p &= cpu_to_le32(~BIT_10); 7047 } 7048 7049 qlt_24xx_config_nvram_stage1(vha, nv); 7050 7051 /* Reset Initialization control block */ 7052 memset(icb, 0, ha->init_cb_size); 7053 7054 /* Copy 1st segment. */ 7055 dptr1 = (uint8_t *)icb; 7056 dptr2 = (uint8_t *)&nv->version; 7057 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7058 while (cnt--) 7059 *dptr1++ = *dptr2++; 7060 7061 icb->login_retry_count = nv->login_retry_count; 7062 icb->link_down_on_nos = nv->link_down_on_nos; 7063 7064 /* Copy 2nd segment. */ 7065 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7066 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7067 cnt = (uint8_t *)&icb->reserved_3 - 7068 (uint8_t *)&icb->interrupt_delay_timer; 7069 while (cnt--) 7070 *dptr1++ = *dptr2++; 7071 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7072 /* 7073 * Setup driver NVRAM options. 7074 */ 7075 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7076 "QLA2462"); 7077 7078 qlt_24xx_config_nvram_stage2(vha, icb); 7079 7080 if (nv->host_p & cpu_to_le32(BIT_15)) { 7081 /* Use alternate WWN? */ 7082 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7083 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7084 } 7085 7086 /* Prepare nodename */ 7087 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7088 /* 7089 * Firmware will apply the following mask if the nodename was 7090 * not provided. 7091 */ 7092 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7093 icb->node_name[0] &= 0xF0; 7094 } 7095 7096 /* Set host adapter parameters. */ 7097 ha->flags.disable_risc_code_load = 0; 7098 ha->flags.enable_lip_reset = 0; 7099 ha->flags.enable_lip_full_login = 7100 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7101 ha->flags.enable_target_reset = 7102 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7103 ha->flags.enable_led_scheme = 0; 7104 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7105 7106 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7107 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7108 7109 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7110 sizeof(ha->fw_seriallink_options24)); 7111 7112 /* save HBA serial number */ 7113 ha->serial0 = icb->port_name[5]; 7114 ha->serial1 = icb->port_name[6]; 7115 ha->serial2 = icb->port_name[7]; 7116 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7117 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7118 7119 icb->execution_throttle = cpu_to_le16(0xFFFF); 7120 7121 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7122 7123 /* Set minimum login_timeout to 4 seconds. */ 7124 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7125 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7126 if (le16_to_cpu(nv->login_timeout) < 4) 7127 nv->login_timeout = cpu_to_le16(4); 7128 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7129 7130 /* Set minimum RATOV to 100 tenths of a second. */ 7131 ha->r_a_tov = 100; 7132 7133 ha->loop_reset_delay = nv->reset_delay; 7134 7135 /* Link Down Timeout = 0: 7136 * 7137 * When Port Down timer expires we will start returning 7138 * I/O's to OS with "DID_NO_CONNECT". 7139 * 7140 * Link Down Timeout != 0: 7141 * 7142 * The driver waits for the link to come up after link down 7143 * before returning I/Os to OS with "DID_NO_CONNECT". 7144 */ 7145 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7146 ha->loop_down_abort_time = 7147 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7148 } else { 7149 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7150 ha->loop_down_abort_time = 7151 (LOOP_DOWN_TIME - ha->link_down_timeout); 7152 } 7153 7154 /* Need enough time to try and get the port back. */ 7155 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7156 if (qlport_down_retry) 7157 ha->port_down_retry_count = qlport_down_retry; 7158 7159 /* Set login_retry_count */ 7160 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7161 if (ha->port_down_retry_count == 7162 le16_to_cpu(nv->port_down_retry_count) && 7163 ha->port_down_retry_count > 3) 7164 ha->login_retry_count = ha->port_down_retry_count; 7165 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7166 ha->login_retry_count = ha->port_down_retry_count; 7167 if (ql2xloginretrycount) 7168 ha->login_retry_count = ql2xloginretrycount; 7169 7170 /* N2N: driver will initiate Login instead of FW */ 7171 icb->firmware_options_3 |= BIT_8; 7172 7173 /* Enable ZIO. */ 7174 if (!vha->flags.init_done) { 7175 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7176 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7177 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7178 le16_to_cpu(icb->interrupt_delay_timer): 2; 7179 } 7180 icb->firmware_options_2 &= cpu_to_le32( 7181 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7182 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7183 ha->zio_mode = QLA_ZIO_MODE_6; 7184 7185 ql_log(ql_log_info, vha, 0x006f, 7186 "ZIO mode %d enabled; timer delay (%d us).\n", 7187 ha->zio_mode, ha->zio_timer * 100); 7188 7189 icb->firmware_options_2 |= cpu_to_le32( 7190 (uint32_t)ha->zio_mode); 7191 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7192 } 7193 7194 if (rval) { 7195 ql_log(ql_log_warn, vha, 0x0070, 7196 "NVRAM configuration failed.\n"); 7197 } 7198 return (rval); 7199 } 7200 7201 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 7202 { 7203 struct qla27xx_image_status pri_image_status, sec_image_status; 7204 uint8_t valid_pri_image, valid_sec_image; 7205 uint32_t *wptr; 7206 uint32_t cnt, chksum, size; 7207 struct qla_hw_data *ha = vha->hw; 7208 7209 valid_pri_image = valid_sec_image = 1; 7210 ha->active_image = 0; 7211 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 7212 7213 if (!ha->flt_region_img_status_pri) { 7214 valid_pri_image = 0; 7215 goto check_sec_image; 7216 } 7217 7218 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 7219 ha->flt_region_img_status_pri, size); 7220 7221 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7222 ql_dbg(ql_dbg_init, vha, 0x018b, 7223 "Primary image signature (0x%x) not valid\n", 7224 pri_image_status.signature); 7225 valid_pri_image = 0; 7226 goto check_sec_image; 7227 } 7228 7229 wptr = (uint32_t *)(&pri_image_status); 7230 cnt = size; 7231 7232 for (chksum = 0; cnt--; wptr++) 7233 chksum += le32_to_cpu(*wptr); 7234 7235 if (chksum) { 7236 ql_dbg(ql_dbg_init, vha, 0x018c, 7237 "Checksum validation failed for primary image (0x%x)\n", 7238 chksum); 7239 valid_pri_image = 0; 7240 } 7241 7242 check_sec_image: 7243 if (!ha->flt_region_img_status_sec) { 7244 valid_sec_image = 0; 7245 goto check_valid_image; 7246 } 7247 7248 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7249 ha->flt_region_img_status_sec, size); 7250 7251 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7252 ql_dbg(ql_dbg_init, vha, 0x018d, 7253 "Secondary image signature(0x%x) not valid\n", 7254 sec_image_status.signature); 7255 valid_sec_image = 0; 7256 goto check_valid_image; 7257 } 7258 7259 wptr = (uint32_t *)(&sec_image_status); 7260 cnt = size; 7261 for (chksum = 0; cnt--; wptr++) 7262 chksum += le32_to_cpu(*wptr); 7263 if (chksum) { 7264 ql_dbg(ql_dbg_init, vha, 0x018e, 7265 "Checksum validation failed for secondary image (0x%x)\n", 7266 chksum); 7267 valid_sec_image = 0; 7268 } 7269 7270 check_valid_image: 7271 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7272 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7273 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7274 if (!ha->active_image || 7275 pri_image_status.generation_number < 7276 sec_image_status.generation_number) 7277 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7278 } 7279 7280 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n", 7281 ha->active_image == 0 ? "default bootld and fw" : 7282 ha->active_image == 1 ? "primary" : 7283 ha->active_image == 2 ? "secondary" : 7284 "Invalid"); 7285 7286 return ha->active_image; 7287 } 7288 7289 static int 7290 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7291 uint32_t faddr) 7292 { 7293 int rval = QLA_SUCCESS; 7294 int segments, fragment; 7295 uint32_t *dcode, dlen; 7296 uint32_t risc_addr; 7297 uint32_t risc_size; 7298 uint32_t i; 7299 struct qla_hw_data *ha = vha->hw; 7300 struct req_que *req = ha->req_q_map[0]; 7301 7302 ql_dbg(ql_dbg_init, vha, 0x008b, 7303 "FW: Loading firmware from flash (%x).\n", faddr); 7304 7305 rval = QLA_SUCCESS; 7306 7307 segments = FA_RISC_CODE_SEGMENTS; 7308 dcode = (uint32_t *)req->ring; 7309 *srisc_addr = 0; 7310 7311 if (IS_QLA27XX(ha) && 7312 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7313 faddr = ha->flt_region_fw_sec; 7314 7315 /* Validate firmware image by checking version. */ 7316 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7317 for (i = 0; i < 4; i++) 7318 dcode[i] = be32_to_cpu(dcode[i]); 7319 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7320 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7321 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7322 dcode[3] == 0)) { 7323 ql_log(ql_log_fatal, vha, 0x008c, 7324 "Unable to verify the integrity of flash firmware " 7325 "image.\n"); 7326 ql_log(ql_log_fatal, vha, 0x008d, 7327 "Firmware data: %08x %08x %08x %08x.\n", 7328 dcode[0], dcode[1], dcode[2], dcode[3]); 7329 7330 return QLA_FUNCTION_FAILED; 7331 } 7332 7333 while (segments && rval == QLA_SUCCESS) { 7334 /* Read segment's load information. */ 7335 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7336 7337 risc_addr = be32_to_cpu(dcode[2]); 7338 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7339 risc_size = be32_to_cpu(dcode[3]); 7340 7341 fragment = 0; 7342 while (risc_size > 0 && rval == QLA_SUCCESS) { 7343 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7344 if (dlen > risc_size) 7345 dlen = risc_size; 7346 7347 ql_dbg(ql_dbg_init, vha, 0x008e, 7348 "Loading risc segment@ risc addr %x " 7349 "number of dwords 0x%x offset 0x%x.\n", 7350 risc_addr, dlen, faddr); 7351 7352 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7353 for (i = 0; i < dlen; i++) 7354 dcode[i] = swab32(dcode[i]); 7355 7356 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7357 dlen); 7358 if (rval) { 7359 ql_log(ql_log_fatal, vha, 0x008f, 7360 "Failed to load segment %d of firmware.\n", 7361 fragment); 7362 return QLA_FUNCTION_FAILED; 7363 } 7364 7365 faddr += dlen; 7366 risc_addr += dlen; 7367 risc_size -= dlen; 7368 fragment++; 7369 } 7370 7371 /* Next segment. */ 7372 segments--; 7373 } 7374 7375 if (!IS_QLA27XX(ha)) 7376 return rval; 7377 7378 if (ha->fw_dump_template) 7379 vfree(ha->fw_dump_template); 7380 ha->fw_dump_template = NULL; 7381 ha->fw_dump_template_len = 0; 7382 7383 ql_dbg(ql_dbg_init, vha, 0x0161, 7384 "Loading fwdump template from %x\n", faddr); 7385 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7386 risc_size = be32_to_cpu(dcode[2]); 7387 ql_dbg(ql_dbg_init, vha, 0x0162, 7388 "-> array size %x dwords\n", risc_size); 7389 if (risc_size == 0 || risc_size == ~0) 7390 goto default_template; 7391 7392 dlen = (risc_size - 8) * sizeof(*dcode); 7393 ql_dbg(ql_dbg_init, vha, 0x0163, 7394 "-> template allocating %x bytes...\n", dlen); 7395 ha->fw_dump_template = vmalloc(dlen); 7396 if (!ha->fw_dump_template) { 7397 ql_log(ql_log_warn, vha, 0x0164, 7398 "Failed fwdump template allocate %x bytes.\n", risc_size); 7399 goto default_template; 7400 } 7401 7402 faddr += 7; 7403 risc_size -= 8; 7404 dcode = ha->fw_dump_template; 7405 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7406 for (i = 0; i < risc_size; i++) 7407 dcode[i] = le32_to_cpu(dcode[i]); 7408 7409 if (!qla27xx_fwdt_template_valid(dcode)) { 7410 ql_log(ql_log_warn, vha, 0x0165, 7411 "Failed fwdump template validate\n"); 7412 goto default_template; 7413 } 7414 7415 dlen = qla27xx_fwdt_template_size(dcode); 7416 ql_dbg(ql_dbg_init, vha, 0x0166, 7417 "-> template size %x bytes\n", dlen); 7418 if (dlen > risc_size * sizeof(*dcode)) { 7419 ql_log(ql_log_warn, vha, 0x0167, 7420 "Failed fwdump template exceeds array by %zx bytes\n", 7421 (size_t)(dlen - risc_size * sizeof(*dcode))); 7422 goto default_template; 7423 } 7424 ha->fw_dump_template_len = dlen; 7425 return rval; 7426 7427 default_template: 7428 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7429 if (ha->fw_dump_template) 7430 vfree(ha->fw_dump_template); 7431 ha->fw_dump_template = NULL; 7432 ha->fw_dump_template_len = 0; 7433 7434 dlen = qla27xx_fwdt_template_default_size(); 7435 ql_dbg(ql_dbg_init, vha, 0x0169, 7436 "-> template allocating %x bytes...\n", dlen); 7437 ha->fw_dump_template = vmalloc(dlen); 7438 if (!ha->fw_dump_template) { 7439 ql_log(ql_log_warn, vha, 0x016a, 7440 "Failed fwdump template allocate %x bytes.\n", risc_size); 7441 goto failed_template; 7442 } 7443 7444 dcode = ha->fw_dump_template; 7445 risc_size = dlen / sizeof(*dcode); 7446 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7447 for (i = 0; i < risc_size; i++) 7448 dcode[i] = be32_to_cpu(dcode[i]); 7449 7450 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7451 ql_log(ql_log_warn, vha, 0x016b, 7452 "Failed fwdump template validate\n"); 7453 goto failed_template; 7454 } 7455 7456 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7457 ql_dbg(ql_dbg_init, vha, 0x016c, 7458 "-> template size %x bytes\n", dlen); 7459 ha->fw_dump_template_len = dlen; 7460 return rval; 7461 7462 failed_template: 7463 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7464 if (ha->fw_dump_template) 7465 vfree(ha->fw_dump_template); 7466 ha->fw_dump_template = NULL; 7467 ha->fw_dump_template_len = 0; 7468 return rval; 7469 } 7470 7471 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7472 7473 int 7474 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7475 { 7476 int rval; 7477 int i, fragment; 7478 uint16_t *wcode, *fwcode; 7479 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7480 struct fw_blob *blob; 7481 struct qla_hw_data *ha = vha->hw; 7482 struct req_que *req = ha->req_q_map[0]; 7483 7484 /* Load firmware blob. */ 7485 blob = qla2x00_request_firmware(vha); 7486 if (!blob) { 7487 ql_log(ql_log_info, vha, 0x0083, 7488 "Firmware image unavailable.\n"); 7489 ql_log(ql_log_info, vha, 0x0084, 7490 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7491 return QLA_FUNCTION_FAILED; 7492 } 7493 7494 rval = QLA_SUCCESS; 7495 7496 wcode = (uint16_t *)req->ring; 7497 *srisc_addr = 0; 7498 fwcode = (uint16_t *)blob->fw->data; 7499 fwclen = 0; 7500 7501 /* Validate firmware image by checking version. */ 7502 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7503 ql_log(ql_log_fatal, vha, 0x0085, 7504 "Unable to verify integrity of firmware image (%zd).\n", 7505 blob->fw->size); 7506 goto fail_fw_integrity; 7507 } 7508 for (i = 0; i < 4; i++) 7509 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7510 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7511 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7512 wcode[2] == 0 && wcode[3] == 0)) { 7513 ql_log(ql_log_fatal, vha, 0x0086, 7514 "Unable to verify integrity of firmware image.\n"); 7515 ql_log(ql_log_fatal, vha, 0x0087, 7516 "Firmware data: %04x %04x %04x %04x.\n", 7517 wcode[0], wcode[1], wcode[2], wcode[3]); 7518 goto fail_fw_integrity; 7519 } 7520 7521 seg = blob->segs; 7522 while (*seg && rval == QLA_SUCCESS) { 7523 risc_addr = *seg; 7524 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7525 risc_size = be16_to_cpu(fwcode[3]); 7526 7527 /* Validate firmware image size. */ 7528 fwclen += risc_size * sizeof(uint16_t); 7529 if (blob->fw->size < fwclen) { 7530 ql_log(ql_log_fatal, vha, 0x0088, 7531 "Unable to verify integrity of firmware image " 7532 "(%zd).\n", blob->fw->size); 7533 goto fail_fw_integrity; 7534 } 7535 7536 fragment = 0; 7537 while (risc_size > 0 && rval == QLA_SUCCESS) { 7538 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7539 if (wlen > risc_size) 7540 wlen = risc_size; 7541 ql_dbg(ql_dbg_init, vha, 0x0089, 7542 "Loading risc segment@ risc addr %x number of " 7543 "words 0x%x.\n", risc_addr, wlen); 7544 7545 for (i = 0; i < wlen; i++) 7546 wcode[i] = swab16(fwcode[i]); 7547 7548 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7549 wlen); 7550 if (rval) { 7551 ql_log(ql_log_fatal, vha, 0x008a, 7552 "Failed to load segment %d of firmware.\n", 7553 fragment); 7554 break; 7555 } 7556 7557 fwcode += wlen; 7558 risc_addr += wlen; 7559 risc_size -= wlen; 7560 fragment++; 7561 } 7562 7563 /* Next segment. */ 7564 seg++; 7565 } 7566 return rval; 7567 7568 fail_fw_integrity: 7569 return QLA_FUNCTION_FAILED; 7570 } 7571 7572 static int 7573 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7574 { 7575 int rval; 7576 int segments, fragment; 7577 uint32_t *dcode, dlen; 7578 uint32_t risc_addr; 7579 uint32_t risc_size; 7580 uint32_t i; 7581 struct fw_blob *blob; 7582 const uint32_t *fwcode; 7583 uint32_t fwclen; 7584 struct qla_hw_data *ha = vha->hw; 7585 struct req_que *req = ha->req_q_map[0]; 7586 7587 /* Load firmware blob. */ 7588 blob = qla2x00_request_firmware(vha); 7589 if (!blob) { 7590 ql_log(ql_log_warn, vha, 0x0090, 7591 "Firmware image unavailable.\n"); 7592 ql_log(ql_log_warn, vha, 0x0091, 7593 "Firmware images can be retrieved from: " 7594 QLA_FW_URL ".\n"); 7595 7596 return QLA_FUNCTION_FAILED; 7597 } 7598 7599 ql_dbg(ql_dbg_init, vha, 0x0092, 7600 "FW: Loading via request-firmware.\n"); 7601 7602 rval = QLA_SUCCESS; 7603 7604 segments = FA_RISC_CODE_SEGMENTS; 7605 dcode = (uint32_t *)req->ring; 7606 *srisc_addr = 0; 7607 fwcode = (uint32_t *)blob->fw->data; 7608 fwclen = 0; 7609 7610 /* Validate firmware image by checking version. */ 7611 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7612 ql_log(ql_log_fatal, vha, 0x0093, 7613 "Unable to verify integrity of firmware image (%zd).\n", 7614 blob->fw->size); 7615 return QLA_FUNCTION_FAILED; 7616 } 7617 for (i = 0; i < 4; i++) 7618 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7619 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7620 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7621 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7622 dcode[3] == 0)) { 7623 ql_log(ql_log_fatal, vha, 0x0094, 7624 "Unable to verify integrity of firmware image (%zd).\n", 7625 blob->fw->size); 7626 ql_log(ql_log_fatal, vha, 0x0095, 7627 "Firmware data: %08x %08x %08x %08x.\n", 7628 dcode[0], dcode[1], dcode[2], dcode[3]); 7629 return QLA_FUNCTION_FAILED; 7630 } 7631 7632 while (segments && rval == QLA_SUCCESS) { 7633 risc_addr = be32_to_cpu(fwcode[2]); 7634 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7635 risc_size = be32_to_cpu(fwcode[3]); 7636 7637 /* Validate firmware image size. */ 7638 fwclen += risc_size * sizeof(uint32_t); 7639 if (blob->fw->size < fwclen) { 7640 ql_log(ql_log_fatal, vha, 0x0096, 7641 "Unable to verify integrity of firmware image " 7642 "(%zd).\n", blob->fw->size); 7643 return QLA_FUNCTION_FAILED; 7644 } 7645 7646 fragment = 0; 7647 while (risc_size > 0 && rval == QLA_SUCCESS) { 7648 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7649 if (dlen > risc_size) 7650 dlen = risc_size; 7651 7652 ql_dbg(ql_dbg_init, vha, 0x0097, 7653 "Loading risc segment@ risc addr %x " 7654 "number of dwords 0x%x.\n", risc_addr, dlen); 7655 7656 for (i = 0; i < dlen; i++) 7657 dcode[i] = swab32(fwcode[i]); 7658 7659 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7660 dlen); 7661 if (rval) { 7662 ql_log(ql_log_fatal, vha, 0x0098, 7663 "Failed to load segment %d of firmware.\n", 7664 fragment); 7665 return QLA_FUNCTION_FAILED; 7666 } 7667 7668 fwcode += dlen; 7669 risc_addr += dlen; 7670 risc_size -= dlen; 7671 fragment++; 7672 } 7673 7674 /* Next segment. */ 7675 segments--; 7676 } 7677 7678 if (!IS_QLA27XX(ha)) 7679 return rval; 7680 7681 if (ha->fw_dump_template) 7682 vfree(ha->fw_dump_template); 7683 ha->fw_dump_template = NULL; 7684 ha->fw_dump_template_len = 0; 7685 7686 ql_dbg(ql_dbg_init, vha, 0x171, 7687 "Loading fwdump template from %x\n", 7688 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7689 risc_size = be32_to_cpu(fwcode[2]); 7690 ql_dbg(ql_dbg_init, vha, 0x172, 7691 "-> array size %x dwords\n", risc_size); 7692 if (risc_size == 0 || risc_size == ~0) 7693 goto default_template; 7694 7695 dlen = (risc_size - 8) * sizeof(*fwcode); 7696 ql_dbg(ql_dbg_init, vha, 0x0173, 7697 "-> template allocating %x bytes...\n", dlen); 7698 ha->fw_dump_template = vmalloc(dlen); 7699 if (!ha->fw_dump_template) { 7700 ql_log(ql_log_warn, vha, 0x0174, 7701 "Failed fwdump template allocate %x bytes.\n", risc_size); 7702 goto default_template; 7703 } 7704 7705 fwcode += 7; 7706 risc_size -= 8; 7707 dcode = ha->fw_dump_template; 7708 for (i = 0; i < risc_size; i++) 7709 dcode[i] = le32_to_cpu(fwcode[i]); 7710 7711 if (!qla27xx_fwdt_template_valid(dcode)) { 7712 ql_log(ql_log_warn, vha, 0x0175, 7713 "Failed fwdump template validate\n"); 7714 goto default_template; 7715 } 7716 7717 dlen = qla27xx_fwdt_template_size(dcode); 7718 ql_dbg(ql_dbg_init, vha, 0x0176, 7719 "-> template size %x bytes\n", dlen); 7720 if (dlen > risc_size * sizeof(*fwcode)) { 7721 ql_log(ql_log_warn, vha, 0x0177, 7722 "Failed fwdump template exceeds array by %zx bytes\n", 7723 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7724 goto default_template; 7725 } 7726 ha->fw_dump_template_len = dlen; 7727 return rval; 7728 7729 default_template: 7730 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7731 if (ha->fw_dump_template) 7732 vfree(ha->fw_dump_template); 7733 ha->fw_dump_template = NULL; 7734 ha->fw_dump_template_len = 0; 7735 7736 dlen = qla27xx_fwdt_template_default_size(); 7737 ql_dbg(ql_dbg_init, vha, 0x0179, 7738 "-> template allocating %x bytes...\n", dlen); 7739 ha->fw_dump_template = vmalloc(dlen); 7740 if (!ha->fw_dump_template) { 7741 ql_log(ql_log_warn, vha, 0x017a, 7742 "Failed fwdump template allocate %x bytes.\n", risc_size); 7743 goto failed_template; 7744 } 7745 7746 dcode = ha->fw_dump_template; 7747 risc_size = dlen / sizeof(*fwcode); 7748 fwcode = qla27xx_fwdt_template_default(); 7749 for (i = 0; i < risc_size; i++) 7750 dcode[i] = be32_to_cpu(fwcode[i]); 7751 7752 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7753 ql_log(ql_log_warn, vha, 0x017b, 7754 "Failed fwdump template validate\n"); 7755 goto failed_template; 7756 } 7757 7758 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7759 ql_dbg(ql_dbg_init, vha, 0x017c, 7760 "-> template size %x bytes\n", dlen); 7761 ha->fw_dump_template_len = dlen; 7762 return rval; 7763 7764 failed_template: 7765 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7766 if (ha->fw_dump_template) 7767 vfree(ha->fw_dump_template); 7768 ha->fw_dump_template = NULL; 7769 ha->fw_dump_template_len = 0; 7770 return rval; 7771 } 7772 7773 int 7774 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7775 { 7776 int rval; 7777 7778 if (ql2xfwloadbin == 1) 7779 return qla81xx_load_risc(vha, srisc_addr); 7780 7781 /* 7782 * FW Load priority: 7783 * 1) Firmware via request-firmware interface (.bin file). 7784 * 2) Firmware residing in flash. 7785 */ 7786 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7787 if (rval == QLA_SUCCESS) 7788 return rval; 7789 7790 return qla24xx_load_risc_flash(vha, srisc_addr, 7791 vha->hw->flt_region_fw); 7792 } 7793 7794 int 7795 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7796 { 7797 int rval; 7798 struct qla_hw_data *ha = vha->hw; 7799 7800 if (ql2xfwloadbin == 2) 7801 goto try_blob_fw; 7802 7803 /* 7804 * FW Load priority: 7805 * 1) Firmware residing in flash. 7806 * 2) Firmware via request-firmware interface (.bin file). 7807 * 3) Golden-Firmware residing in flash -- limited operation. 7808 */ 7809 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7810 if (rval == QLA_SUCCESS) 7811 return rval; 7812 7813 try_blob_fw: 7814 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7815 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7816 return rval; 7817 7818 ql_log(ql_log_info, vha, 0x0099, 7819 "Attempting to fallback to golden firmware.\n"); 7820 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7821 if (rval != QLA_SUCCESS) 7822 return rval; 7823 7824 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7825 ha->flags.running_gold_fw = 1; 7826 return rval; 7827 } 7828 7829 void 7830 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7831 { 7832 int ret, retries; 7833 struct qla_hw_data *ha = vha->hw; 7834 7835 if (ha->flags.pci_channel_io_perm_failure) 7836 return; 7837 if (!IS_FWI2_CAPABLE(ha)) 7838 return; 7839 if (!ha->fw_major_version) 7840 return; 7841 if (!ha->flags.fw_started) 7842 return; 7843 7844 ret = qla2x00_stop_firmware(vha); 7845 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7846 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7847 ha->isp_ops->reset_chip(vha); 7848 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7849 continue; 7850 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7851 continue; 7852 ql_log(ql_log_info, vha, 0x8015, 7853 "Attempting retry of stop-firmware command.\n"); 7854 ret = qla2x00_stop_firmware(vha); 7855 } 7856 7857 QLA_FW_STOPPED(ha); 7858 ha->flags.fw_init_done = 0; 7859 } 7860 7861 int 7862 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7863 { 7864 int rval = QLA_SUCCESS; 7865 int rval2; 7866 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7867 struct qla_hw_data *ha = vha->hw; 7868 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7869 7870 if (!vha->vp_idx) 7871 return -EINVAL; 7872 7873 rval = qla2x00_fw_ready(base_vha); 7874 7875 if (rval == QLA_SUCCESS) { 7876 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7877 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7878 } 7879 7880 vha->flags.management_server_logged_in = 0; 7881 7882 /* Login to SNS first */ 7883 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7884 BIT_1); 7885 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7886 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7887 ql_dbg(ql_dbg_init, vha, 0x0120, 7888 "Failed SNS login: loop_id=%x, rval2=%d\n", 7889 NPH_SNS, rval2); 7890 else 7891 ql_dbg(ql_dbg_init, vha, 0x0103, 7892 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7893 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7894 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7895 return (QLA_FUNCTION_FAILED); 7896 } 7897 7898 atomic_set(&vha->loop_down_timer, 0); 7899 atomic_set(&vha->loop_state, LOOP_UP); 7900 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7901 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7902 rval = qla2x00_loop_resync(base_vha); 7903 7904 return rval; 7905 } 7906 7907 /* 84XX Support **************************************************************/ 7908 7909 static LIST_HEAD(qla_cs84xx_list); 7910 static DEFINE_MUTEX(qla_cs84xx_mutex); 7911 7912 static struct qla_chip_state_84xx * 7913 qla84xx_get_chip(struct scsi_qla_host *vha) 7914 { 7915 struct qla_chip_state_84xx *cs84xx; 7916 struct qla_hw_data *ha = vha->hw; 7917 7918 mutex_lock(&qla_cs84xx_mutex); 7919 7920 /* Find any shared 84xx chip. */ 7921 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7922 if (cs84xx->bus == ha->pdev->bus) { 7923 kref_get(&cs84xx->kref); 7924 goto done; 7925 } 7926 } 7927 7928 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 7929 if (!cs84xx) 7930 goto done; 7931 7932 kref_init(&cs84xx->kref); 7933 spin_lock_init(&cs84xx->access_lock); 7934 mutex_init(&cs84xx->fw_update_mutex); 7935 cs84xx->bus = ha->pdev->bus; 7936 7937 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 7938 done: 7939 mutex_unlock(&qla_cs84xx_mutex); 7940 return cs84xx; 7941 } 7942 7943 static void 7944 __qla84xx_chip_release(struct kref *kref) 7945 { 7946 struct qla_chip_state_84xx *cs84xx = 7947 container_of(kref, struct qla_chip_state_84xx, kref); 7948 7949 mutex_lock(&qla_cs84xx_mutex); 7950 list_del(&cs84xx->list); 7951 mutex_unlock(&qla_cs84xx_mutex); 7952 kfree(cs84xx); 7953 } 7954 7955 void 7956 qla84xx_put_chip(struct scsi_qla_host *vha) 7957 { 7958 struct qla_hw_data *ha = vha->hw; 7959 if (ha->cs84xx) 7960 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 7961 } 7962 7963 static int 7964 qla84xx_init_chip(scsi_qla_host_t *vha) 7965 { 7966 int rval; 7967 uint16_t status[2]; 7968 struct qla_hw_data *ha = vha->hw; 7969 7970 mutex_lock(&ha->cs84xx->fw_update_mutex); 7971 7972 rval = qla84xx_verify_chip(vha, status); 7973 7974 mutex_unlock(&ha->cs84xx->fw_update_mutex); 7975 7976 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 7977 QLA_SUCCESS; 7978 } 7979 7980 /* 81XX Support **************************************************************/ 7981 7982 int 7983 qla81xx_nvram_config(scsi_qla_host_t *vha) 7984 { 7985 int rval; 7986 struct init_cb_81xx *icb; 7987 struct nvram_81xx *nv; 7988 uint32_t *dptr; 7989 uint8_t *dptr1, *dptr2; 7990 uint32_t chksum; 7991 uint16_t cnt; 7992 struct qla_hw_data *ha = vha->hw; 7993 7994 rval = QLA_SUCCESS; 7995 icb = (struct init_cb_81xx *)ha->init_cb; 7996 nv = ha->nvram; 7997 7998 /* Determine NVRAM starting address. */ 7999 ha->nvram_size = sizeof(struct nvram_81xx); 8000 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8001 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8002 ha->vpd_size = FA_VPD_SIZE_82XX; 8003 8004 /* Get VPD data into cache */ 8005 ha->vpd = ha->nvram + VPD_OFFSET; 8006 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 8007 ha->vpd_size); 8008 8009 /* Get NVRAM data into cache and calculate checksum. */ 8010 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 8011 ha->nvram_size); 8012 dptr = (uint32_t *)nv; 8013 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8014 chksum += le32_to_cpu(*dptr); 8015 8016 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8017 "Contents of NVRAM:\n"); 8018 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8019 (uint8_t *)nv, ha->nvram_size); 8020 8021 /* Bad NVRAM data, set defaults parameters. */ 8022 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 8023 || nv->id[3] != ' ' || 8024 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 8025 /* Reset NVRAM data. */ 8026 ql_log(ql_log_info, vha, 0x0073, 8027 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 8028 "version=0x%x.\n", chksum, nv->id[0], 8029 le16_to_cpu(nv->nvram_version)); 8030 ql_log(ql_log_info, vha, 0x0074, 8031 "Falling back to functioning (yet invalid -- WWPN) " 8032 "defaults.\n"); 8033 8034 /* 8035 * Set default initialization control block. 8036 */ 8037 memset(nv, 0, ha->nvram_size); 8038 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8039 nv->version = cpu_to_le16(ICB_VERSION); 8040 nv->frame_payload_size = 2048; 8041 nv->execution_throttle = cpu_to_le16(0xFFFF); 8042 nv->exchange_count = cpu_to_le16(0); 8043 nv->port_name[0] = 0x21; 8044 nv->port_name[1] = 0x00 + ha->port_no + 1; 8045 nv->port_name[2] = 0x00; 8046 nv->port_name[3] = 0xe0; 8047 nv->port_name[4] = 0x8b; 8048 nv->port_name[5] = 0x1c; 8049 nv->port_name[6] = 0x55; 8050 nv->port_name[7] = 0x86; 8051 nv->node_name[0] = 0x20; 8052 nv->node_name[1] = 0x00; 8053 nv->node_name[2] = 0x00; 8054 nv->node_name[3] = 0xe0; 8055 nv->node_name[4] = 0x8b; 8056 nv->node_name[5] = 0x1c; 8057 nv->node_name[6] = 0x55; 8058 nv->node_name[7] = 0x86; 8059 nv->login_retry_count = cpu_to_le16(8); 8060 nv->interrupt_delay_timer = cpu_to_le16(0); 8061 nv->login_timeout = cpu_to_le16(0); 8062 nv->firmware_options_1 = 8063 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8064 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8065 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8066 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8067 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8068 nv->efi_parameters = cpu_to_le32(0); 8069 nv->reset_delay = 5; 8070 nv->max_luns_per_target = cpu_to_le16(128); 8071 nv->port_down_retry_count = cpu_to_le16(30); 8072 nv->link_down_timeout = cpu_to_le16(180); 8073 nv->enode_mac[0] = 0x00; 8074 nv->enode_mac[1] = 0xC0; 8075 nv->enode_mac[2] = 0xDD; 8076 nv->enode_mac[3] = 0x04; 8077 nv->enode_mac[4] = 0x05; 8078 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8079 8080 rval = 1; 8081 } 8082 8083 if (IS_T10_PI_CAPABLE(ha)) 8084 nv->frame_payload_size &= ~7; 8085 8086 qlt_81xx_config_nvram_stage1(vha, nv); 8087 8088 /* Reset Initialization control block */ 8089 memset(icb, 0, ha->init_cb_size); 8090 8091 /* Copy 1st segment. */ 8092 dptr1 = (uint8_t *)icb; 8093 dptr2 = (uint8_t *)&nv->version; 8094 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8095 while (cnt--) 8096 *dptr1++ = *dptr2++; 8097 8098 icb->login_retry_count = nv->login_retry_count; 8099 8100 /* Copy 2nd segment. */ 8101 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8102 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8103 cnt = (uint8_t *)&icb->reserved_5 - 8104 (uint8_t *)&icb->interrupt_delay_timer; 8105 while (cnt--) 8106 *dptr1++ = *dptr2++; 8107 8108 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8109 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8110 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8111 icb->enode_mac[0] = 0x00; 8112 icb->enode_mac[1] = 0xC0; 8113 icb->enode_mac[2] = 0xDD; 8114 icb->enode_mac[3] = 0x04; 8115 icb->enode_mac[4] = 0x05; 8116 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8117 } 8118 8119 /* Use extended-initialization control block. */ 8120 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8121 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8122 /* 8123 * Setup driver NVRAM options. 8124 */ 8125 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8126 "QLE8XXX"); 8127 8128 qlt_81xx_config_nvram_stage2(vha, icb); 8129 8130 /* Use alternate WWN? */ 8131 if (nv->host_p & cpu_to_le32(BIT_15)) { 8132 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8133 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8134 } 8135 8136 /* Prepare nodename */ 8137 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8138 /* 8139 * Firmware will apply the following mask if the nodename was 8140 * not provided. 8141 */ 8142 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8143 icb->node_name[0] &= 0xF0; 8144 } 8145 8146 /* Set host adapter parameters. */ 8147 ha->flags.disable_risc_code_load = 0; 8148 ha->flags.enable_lip_reset = 0; 8149 ha->flags.enable_lip_full_login = 8150 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 8151 ha->flags.enable_target_reset = 8152 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 8153 ha->flags.enable_led_scheme = 0; 8154 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 8155 8156 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8157 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8158 8159 /* save HBA serial number */ 8160 ha->serial0 = icb->port_name[5]; 8161 ha->serial1 = icb->port_name[6]; 8162 ha->serial2 = icb->port_name[7]; 8163 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8164 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8165 8166 icb->execution_throttle = cpu_to_le16(0xFFFF); 8167 8168 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8169 8170 /* Set minimum login_timeout to 4 seconds. */ 8171 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8172 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8173 if (le16_to_cpu(nv->login_timeout) < 4) 8174 nv->login_timeout = cpu_to_le16(4); 8175 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8176 8177 /* Set minimum RATOV to 100 tenths of a second. */ 8178 ha->r_a_tov = 100; 8179 8180 ha->loop_reset_delay = nv->reset_delay; 8181 8182 /* Link Down Timeout = 0: 8183 * 8184 * When Port Down timer expires we will start returning 8185 * I/O's to OS with "DID_NO_CONNECT". 8186 * 8187 * Link Down Timeout != 0: 8188 * 8189 * The driver waits for the link to come up after link down 8190 * before returning I/Os to OS with "DID_NO_CONNECT". 8191 */ 8192 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8193 ha->loop_down_abort_time = 8194 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8195 } else { 8196 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8197 ha->loop_down_abort_time = 8198 (LOOP_DOWN_TIME - ha->link_down_timeout); 8199 } 8200 8201 /* Need enough time to try and get the port back. */ 8202 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8203 if (qlport_down_retry) 8204 ha->port_down_retry_count = qlport_down_retry; 8205 8206 /* Set login_retry_count */ 8207 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8208 if (ha->port_down_retry_count == 8209 le16_to_cpu(nv->port_down_retry_count) && 8210 ha->port_down_retry_count > 3) 8211 ha->login_retry_count = ha->port_down_retry_count; 8212 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8213 ha->login_retry_count = ha->port_down_retry_count; 8214 if (ql2xloginretrycount) 8215 ha->login_retry_count = ql2xloginretrycount; 8216 8217 /* if not running MSI-X we need handshaking on interrupts */ 8218 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8219 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8220 8221 /* Enable ZIO. */ 8222 if (!vha->flags.init_done) { 8223 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8224 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8225 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8226 le16_to_cpu(icb->interrupt_delay_timer): 2; 8227 } 8228 icb->firmware_options_2 &= cpu_to_le32( 8229 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8230 vha->flags.process_response_queue = 0; 8231 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8232 ha->zio_mode = QLA_ZIO_MODE_6; 8233 8234 ql_log(ql_log_info, vha, 0x0075, 8235 "ZIO mode %d enabled; timer delay (%d us).\n", 8236 ha->zio_mode, 8237 ha->zio_timer * 100); 8238 8239 icb->firmware_options_2 |= cpu_to_le32( 8240 (uint32_t)ha->zio_mode); 8241 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8242 vha->flags.process_response_queue = 1; 8243 } 8244 8245 /* enable RIDA Format2 */ 8246 icb->firmware_options_3 |= BIT_0; 8247 8248 /* N2N: driver will initiate Login instead of FW */ 8249 icb->firmware_options_3 |= BIT_8; 8250 8251 if (IS_QLA27XX(ha)) { 8252 icb->firmware_options_3 |= BIT_8; 8253 ql_dbg(ql_log_info, vha, 0x0075, 8254 "Enabling direct connection.\n"); 8255 } 8256 8257 if (rval) { 8258 ql_log(ql_log_warn, vha, 0x0076, 8259 "NVRAM configuration failed.\n"); 8260 } 8261 return (rval); 8262 } 8263 8264 int 8265 qla82xx_restart_isp(scsi_qla_host_t *vha) 8266 { 8267 int status, rval; 8268 struct qla_hw_data *ha = vha->hw; 8269 struct scsi_qla_host *vp; 8270 unsigned long flags; 8271 8272 status = qla2x00_init_rings(vha); 8273 if (!status) { 8274 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8275 ha->flags.chip_reset_done = 1; 8276 8277 status = qla2x00_fw_ready(vha); 8278 if (!status) { 8279 /* Issue a marker after FW becomes ready. */ 8280 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8281 vha->flags.online = 1; 8282 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8283 } 8284 8285 /* if no cable then assume it's good */ 8286 if ((vha->device_flags & DFLG_NO_CABLE)) 8287 status = 0; 8288 } 8289 8290 if (!status) { 8291 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8292 8293 if (!atomic_read(&vha->loop_down_timer)) { 8294 /* 8295 * Issue marker command only when we are going 8296 * to start the I/O . 8297 */ 8298 vha->marker_needed = 1; 8299 } 8300 8301 ha->isp_ops->enable_intrs(ha); 8302 8303 ha->isp_abort_cnt = 0; 8304 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8305 8306 /* Update the firmware version */ 8307 status = qla82xx_check_md_needed(vha); 8308 8309 if (ha->fce) { 8310 ha->flags.fce_enabled = 1; 8311 memset(ha->fce, 0, 8312 fce_calc_size(ha->fce_bufs)); 8313 rval = qla2x00_enable_fce_trace(vha, 8314 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8315 &ha->fce_bufs); 8316 if (rval) { 8317 ql_log(ql_log_warn, vha, 0x8001, 8318 "Unable to reinitialize FCE (%d).\n", 8319 rval); 8320 ha->flags.fce_enabled = 0; 8321 } 8322 } 8323 8324 if (ha->eft) { 8325 memset(ha->eft, 0, EFT_SIZE); 8326 rval = qla2x00_enable_eft_trace(vha, 8327 ha->eft_dma, EFT_NUM_BUFFERS); 8328 if (rval) { 8329 ql_log(ql_log_warn, vha, 0x8010, 8330 "Unable to reinitialize EFT (%d).\n", 8331 rval); 8332 } 8333 } 8334 } 8335 8336 if (!status) { 8337 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8338 "qla82xx_restart_isp succeeded.\n"); 8339 8340 spin_lock_irqsave(&ha->vport_slock, flags); 8341 list_for_each_entry(vp, &ha->vp_list, list) { 8342 if (vp->vp_idx) { 8343 atomic_inc(&vp->vref_count); 8344 spin_unlock_irqrestore(&ha->vport_slock, flags); 8345 8346 qla2x00_vp_abort_isp(vp); 8347 8348 spin_lock_irqsave(&ha->vport_slock, flags); 8349 atomic_dec(&vp->vref_count); 8350 } 8351 } 8352 spin_unlock_irqrestore(&ha->vport_slock, flags); 8353 8354 } else { 8355 ql_log(ql_log_warn, vha, 0x8016, 8356 "qla82xx_restart_isp **** FAILED ****.\n"); 8357 } 8358 8359 return status; 8360 } 8361 8362 void 8363 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8364 { 8365 struct qla_hw_data *ha = vha->hw; 8366 8367 /* Hold status IOCBs until ABTS response received. */ 8368 if (ql2xfwholdabts) 8369 ha->fw_options[3] |= BIT_12; 8370 8371 /* Set Retry FLOGI in case of P2P connection */ 8372 if (ha->operating_mode == P2P) { 8373 ha->fw_options[2] |= BIT_3; 8374 ql_dbg(ql_dbg_disc, vha, 0x2103, 8375 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8376 __func__, ha->fw_options[2]); 8377 } 8378 8379 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8380 if (ql2xmvasynctoatio) { 8381 if (qla_tgt_mode_enabled(vha) || 8382 qla_dual_mode_enabled(vha)) 8383 ha->fw_options[2] |= BIT_11; 8384 else 8385 ha->fw_options[2] &= ~BIT_11; 8386 } 8387 8388 if (qla_tgt_mode_enabled(vha) || 8389 qla_dual_mode_enabled(vha)) { 8390 /* FW auto send SCSI status during */ 8391 ha->fw_options[1] |= BIT_8; 8392 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8393 8394 /* FW perform Exchange validation */ 8395 ha->fw_options[2] |= BIT_4; 8396 } else { 8397 ha->fw_options[1] &= ~BIT_8; 8398 ha->fw_options[10] &= 0x00ff; 8399 8400 ha->fw_options[2] &= ~BIT_4; 8401 } 8402 8403 if (ql2xetsenable) { 8404 /* Enable ETS Burst. */ 8405 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8406 ha->fw_options[2] |= BIT_9; 8407 } 8408 8409 ql_dbg(ql_dbg_init, vha, 0x00e9, 8410 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8411 __func__, ha->fw_options[1], ha->fw_options[2], 8412 ha->fw_options[3], vha->host->active_mode); 8413 8414 qla2x00_set_fw_options(vha, ha->fw_options); 8415 } 8416 8417 /* 8418 * qla24xx_get_fcp_prio 8419 * Gets the fcp cmd priority value for the logged in port. 8420 * Looks for a match of the port descriptors within 8421 * each of the fcp prio config entries. If a match is found, 8422 * the tag (priority) value is returned. 8423 * 8424 * Input: 8425 * vha = scsi host structure pointer. 8426 * fcport = port structure pointer. 8427 * 8428 * Return: 8429 * non-zero (if found) 8430 * -1 (if not found) 8431 * 8432 * Context: 8433 * Kernel context 8434 */ 8435 static int 8436 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8437 { 8438 int i, entries; 8439 uint8_t pid_match, wwn_match; 8440 int priority; 8441 uint32_t pid1, pid2; 8442 uint64_t wwn1, wwn2; 8443 struct qla_fcp_prio_entry *pri_entry; 8444 struct qla_hw_data *ha = vha->hw; 8445 8446 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8447 return -1; 8448 8449 priority = -1; 8450 entries = ha->fcp_prio_cfg->num_entries; 8451 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8452 8453 for (i = 0; i < entries; i++) { 8454 pid_match = wwn_match = 0; 8455 8456 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8457 pri_entry++; 8458 continue; 8459 } 8460 8461 /* check source pid for a match */ 8462 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8463 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8464 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8465 if (pid1 == INVALID_PORT_ID) 8466 pid_match++; 8467 else if (pid1 == pid2) 8468 pid_match++; 8469 } 8470 8471 /* check destination pid for a match */ 8472 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8473 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8474 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8475 if (pid1 == INVALID_PORT_ID) 8476 pid_match++; 8477 else if (pid1 == pid2) 8478 pid_match++; 8479 } 8480 8481 /* check source WWN for a match */ 8482 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8483 wwn1 = wwn_to_u64(vha->port_name); 8484 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8485 if (wwn2 == (uint64_t)-1) 8486 wwn_match++; 8487 else if (wwn1 == wwn2) 8488 wwn_match++; 8489 } 8490 8491 /* check destination WWN for a match */ 8492 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8493 wwn1 = wwn_to_u64(fcport->port_name); 8494 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8495 if (wwn2 == (uint64_t)-1) 8496 wwn_match++; 8497 else if (wwn1 == wwn2) 8498 wwn_match++; 8499 } 8500 8501 if (pid_match == 2 || wwn_match == 2) { 8502 /* Found a matching entry */ 8503 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8504 priority = pri_entry->tag; 8505 break; 8506 } 8507 8508 pri_entry++; 8509 } 8510 8511 return priority; 8512 } 8513 8514 /* 8515 * qla24xx_update_fcport_fcp_prio 8516 * Activates fcp priority for the logged in fc port 8517 * 8518 * Input: 8519 * vha = scsi host structure pointer. 8520 * fcp = port structure pointer. 8521 * 8522 * Return: 8523 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8524 * 8525 * Context: 8526 * Kernel context. 8527 */ 8528 int 8529 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8530 { 8531 int ret; 8532 int priority; 8533 uint16_t mb[5]; 8534 8535 if (fcport->port_type != FCT_TARGET || 8536 fcport->loop_id == FC_NO_LOOP_ID) 8537 return QLA_FUNCTION_FAILED; 8538 8539 priority = qla24xx_get_fcp_prio(vha, fcport); 8540 if (priority < 0) 8541 return QLA_FUNCTION_FAILED; 8542 8543 if (IS_P3P_TYPE(vha->hw)) { 8544 fcport->fcp_prio = priority & 0xf; 8545 return QLA_SUCCESS; 8546 } 8547 8548 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8549 if (ret == QLA_SUCCESS) { 8550 if (fcport->fcp_prio != priority) 8551 ql_dbg(ql_dbg_user, vha, 0x709e, 8552 "Updated FCP_CMND priority - value=%d loop_id=%d " 8553 "port_id=%02x%02x%02x.\n", priority, 8554 fcport->loop_id, fcport->d_id.b.domain, 8555 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8556 fcport->fcp_prio = priority & 0xf; 8557 } else 8558 ql_dbg(ql_dbg_user, vha, 0x704f, 8559 "Unable to update FCP_CMND priority - ret=0x%x for " 8560 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8561 fcport->d_id.b.domain, fcport->d_id.b.area, 8562 fcport->d_id.b.al_pa); 8563 return ret; 8564 } 8565 8566 /* 8567 * qla24xx_update_all_fcp_prio 8568 * Activates fcp priority for all the logged in ports 8569 * 8570 * Input: 8571 * ha = adapter block pointer. 8572 * 8573 * Return: 8574 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8575 * 8576 * Context: 8577 * Kernel context. 8578 */ 8579 int 8580 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8581 { 8582 int ret; 8583 fc_port_t *fcport; 8584 8585 ret = QLA_FUNCTION_FAILED; 8586 /* We need to set priority for all logged in ports */ 8587 list_for_each_entry(fcport, &vha->vp_fcports, list) 8588 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8589 8590 return ret; 8591 } 8592 8593 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8594 int vp_idx, bool startqp) 8595 { 8596 int rsp_id = 0; 8597 int req_id = 0; 8598 int i; 8599 struct qla_hw_data *ha = vha->hw; 8600 uint16_t qpair_id = 0; 8601 struct qla_qpair *qpair = NULL; 8602 struct qla_msix_entry *msix; 8603 8604 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8605 ql_log(ql_log_warn, vha, 0x00181, 8606 "FW/Driver is not multi-queue capable.\n"); 8607 return NULL; 8608 } 8609 8610 if (ql2xmqsupport || ql2xnvmeenable) { 8611 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8612 if (qpair == NULL) { 8613 ql_log(ql_log_warn, vha, 0x0182, 8614 "Failed to allocate memory for queue pair.\n"); 8615 return NULL; 8616 } 8617 memset(qpair, 0, sizeof(struct qla_qpair)); 8618 8619 qpair->hw = vha->hw; 8620 qpair->vha = vha; 8621 qpair->qp_lock_ptr = &qpair->qp_lock; 8622 spin_lock_init(&qpair->qp_lock); 8623 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8624 8625 /* Assign available que pair id */ 8626 mutex_lock(&ha->mq_lock); 8627 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8628 if (ha->num_qpairs >= ha->max_qpairs) { 8629 mutex_unlock(&ha->mq_lock); 8630 ql_log(ql_log_warn, vha, 0x0183, 8631 "No resources to create additional q pair.\n"); 8632 goto fail_qid_map; 8633 } 8634 ha->num_qpairs++; 8635 set_bit(qpair_id, ha->qpair_qid_map); 8636 ha->queue_pair_map[qpair_id] = qpair; 8637 qpair->id = qpair_id; 8638 qpair->vp_idx = vp_idx; 8639 qpair->fw_started = ha->flags.fw_started; 8640 INIT_LIST_HEAD(&qpair->hints_list); 8641 qpair->chip_reset = ha->base_qpair->chip_reset; 8642 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8643 qpair->enable_explicit_conf = 8644 ha->base_qpair->enable_explicit_conf; 8645 8646 for (i = 0; i < ha->msix_count; i++) { 8647 msix = &ha->msix_entries[i]; 8648 if (msix->in_use) 8649 continue; 8650 qpair->msix = msix; 8651 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8652 "Vector %x selected for qpair\n", msix->vector); 8653 break; 8654 } 8655 if (!qpair->msix) { 8656 ql_log(ql_log_warn, vha, 0x0184, 8657 "Out of MSI-X vectors!.\n"); 8658 goto fail_msix; 8659 } 8660 8661 qpair->msix->in_use = 1; 8662 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8663 qpair->pdev = ha->pdev; 8664 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8665 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8666 8667 mutex_unlock(&ha->mq_lock); 8668 8669 /* Create response queue first */ 8670 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8671 if (!rsp_id) { 8672 ql_log(ql_log_warn, vha, 0x0185, 8673 "Failed to create response queue.\n"); 8674 goto fail_rsp; 8675 } 8676 8677 qpair->rsp = ha->rsp_q_map[rsp_id]; 8678 8679 /* Create request queue */ 8680 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8681 startqp); 8682 if (!req_id) { 8683 ql_log(ql_log_warn, vha, 0x0186, 8684 "Failed to create request queue.\n"); 8685 goto fail_req; 8686 } 8687 8688 qpair->req = ha->req_q_map[req_id]; 8689 qpair->rsp->req = qpair->req; 8690 qpair->rsp->qpair = qpair; 8691 /* init qpair to this cpu. Will adjust at run time. */ 8692 qla_cpu_update(qpair, smp_processor_id()); 8693 8694 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8695 if (ha->fw_attributes & BIT_4) 8696 qpair->difdix_supported = 1; 8697 } 8698 8699 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8700 if (!qpair->srb_mempool) { 8701 ql_log(ql_log_warn, vha, 0xd036, 8702 "Failed to create srb mempool for qpair %d\n", 8703 qpair->id); 8704 goto fail_mempool; 8705 } 8706 8707 /* Mark as online */ 8708 qpair->online = 1; 8709 8710 if (!vha->flags.qpairs_available) 8711 vha->flags.qpairs_available = 1; 8712 8713 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8714 "Request/Response queue pair created, id %d\n", 8715 qpair->id); 8716 ql_dbg(ql_dbg_init, vha, 0x0187, 8717 "Request/Response queue pair created, id %d\n", 8718 qpair->id); 8719 } 8720 return qpair; 8721 8722 fail_mempool: 8723 fail_req: 8724 qla25xx_delete_rsp_que(vha, qpair->rsp); 8725 fail_rsp: 8726 mutex_lock(&ha->mq_lock); 8727 qpair->msix->in_use = 0; 8728 list_del(&qpair->qp_list_elem); 8729 if (list_empty(&vha->qp_list)) 8730 vha->flags.qpairs_available = 0; 8731 fail_msix: 8732 ha->queue_pair_map[qpair_id] = NULL; 8733 clear_bit(qpair_id, ha->qpair_qid_map); 8734 ha->num_qpairs--; 8735 mutex_unlock(&ha->mq_lock); 8736 fail_qid_map: 8737 kfree(qpair); 8738 return NULL; 8739 } 8740 8741 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8742 { 8743 int ret = QLA_FUNCTION_FAILED; 8744 struct qla_hw_data *ha = qpair->hw; 8745 8746 qpair->delete_in_progress = 1; 8747 while (atomic_read(&qpair->ref_count)) 8748 msleep(500); 8749 8750 ret = qla25xx_delete_req_que(vha, qpair->req); 8751 if (ret != QLA_SUCCESS) 8752 goto fail; 8753 8754 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8755 if (ret != QLA_SUCCESS) 8756 goto fail; 8757 8758 mutex_lock(&ha->mq_lock); 8759 ha->queue_pair_map[qpair->id] = NULL; 8760 clear_bit(qpair->id, ha->qpair_qid_map); 8761 ha->num_qpairs--; 8762 list_del(&qpair->qp_list_elem); 8763 if (list_empty(&vha->qp_list)) { 8764 vha->flags.qpairs_available = 0; 8765 vha->flags.qpairs_req_created = 0; 8766 vha->flags.qpairs_rsp_created = 0; 8767 } 8768 mempool_destroy(qpair->srb_mempool); 8769 kfree(qpair); 8770 mutex_unlock(&ha->mq_lock); 8771 8772 return QLA_SUCCESS; 8773 fail: 8774 return ret; 8775 } 8776