1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 41 struct event_arg *ea); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 struct req_que *req; 54 unsigned long flags; 55 struct qla_hw_data *ha = sp->vha->hw; 56 57 WARN_ON_ONCE(irqs_disabled()); 58 spin_lock_irqsave(&ha->hardware_lock, flags); 59 req = sp->qpair->req; 60 req->outstanding_cmds[sp->handle] = NULL; 61 iocb = &sp->u.iocb_cmd; 62 spin_unlock_irqrestore(&ha->hardware_lock, flags); 63 iocb->timeout(sp); 64 } 65 66 void qla2x00_sp_free(srb_t *sp) 67 { 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 69 70 del_timer(&iocb->timer); 71 qla2x00_rel_sp(sp); 72 } 73 74 /* Asynchronous Login/Logout Routines -------------------------------------- */ 75 76 unsigned long 77 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 78 { 79 unsigned long tmo; 80 struct qla_hw_data *ha = vha->hw; 81 82 /* Firmware should use switch negotiated r_a_tov for timeout. */ 83 tmo = ha->r_a_tov / 10 * 2; 84 if (IS_QLAFX00(ha)) { 85 tmo = FX00_DEF_RATOV * 2; 86 } else if (!IS_FWI2_CAPABLE(ha)) { 87 /* 88 * Except for earlier ISPs where the timeout is seeded from the 89 * initialization control block. 90 */ 91 tmo = ha->login_timeout; 92 } 93 return tmo; 94 } 95 96 static void qla24xx_abort_iocb_timeout(void *data) 97 { 98 srb_t *sp = data; 99 struct srb_iocb *abt = &sp->u.iocb_cmd; 100 struct qla_qpair *qpair = sp->qpair; 101 u32 handle; 102 unsigned long flags; 103 104 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 105 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 106 /* removing the abort */ 107 if (qpair->req->outstanding_cmds[handle] == sp) { 108 qpair->req->outstanding_cmds[handle] = NULL; 109 break; 110 } 111 } 112 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 113 114 abt->u.abt.comp_status = CS_TIMEOUT; 115 sp->done(sp, QLA_OS_TIMER_EXPIRED); 116 } 117 118 static void qla24xx_abort_sp_done(srb_t *sp, int res) 119 { 120 struct srb_iocb *abt = &sp->u.iocb_cmd; 121 122 del_timer(&sp->u.iocb_cmd.timer); 123 if (sp->flags & SRB_WAKEUP_ON_COMP) 124 complete(&abt->u.abt.comp); 125 else 126 sp->free(sp); 127 } 128 129 static int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 130 { 131 scsi_qla_host_t *vha = cmd_sp->vha; 132 struct srb_iocb *abt_iocb; 133 srb_t *sp; 134 int rval = QLA_FUNCTION_FAILED; 135 136 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 137 GFP_ATOMIC); 138 if (!sp) 139 return rval; 140 141 abt_iocb = &sp->u.iocb_cmd; 142 sp->type = SRB_ABT_CMD; 143 sp->name = "abort"; 144 sp->qpair = cmd_sp->qpair; 145 if (wait) 146 sp->flags = SRB_WAKEUP_ON_COMP; 147 148 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 149 init_completion(&abt_iocb->u.abt.comp); 150 /* FW can send 2 x ABTS's timeout/20s */ 151 qla2x00_init_timer(sp, 42); 152 153 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 154 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 155 156 sp->done = qla24xx_abort_sp_done; 157 158 ql_dbg(ql_dbg_async, vha, 0x507c, 159 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 160 cmd_sp->type); 161 162 rval = qla2x00_start_sp(sp); 163 if (rval != QLA_SUCCESS) { 164 sp->free(sp); 165 return rval; 166 } 167 168 if (wait) { 169 wait_for_completion(&abt_iocb->u.abt.comp); 170 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 171 QLA_SUCCESS : QLA_FUNCTION_FAILED; 172 sp->free(sp); 173 } 174 175 return rval; 176 } 177 178 void 179 qla2x00_async_iocb_timeout(void *data) 180 { 181 srb_t *sp = data; 182 fc_port_t *fcport = sp->fcport; 183 struct srb_iocb *lio = &sp->u.iocb_cmd; 184 int rc, h; 185 unsigned long flags; 186 187 if (fcport) { 188 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 189 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 190 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 191 192 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 193 } else { 194 pr_info("Async-%s timeout - hdl=%x.\n", 195 sp->name, sp->handle); 196 } 197 198 switch (sp->type) { 199 case SRB_LOGIN_CMD: 200 rc = qla24xx_async_abort_cmd(sp, false); 201 if (rc) { 202 /* Retry as needed. */ 203 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 204 lio->u.logio.data[1] = 205 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 206 QLA_LOGIO_LOGIN_RETRIED : 0; 207 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 208 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 209 h++) { 210 if (sp->qpair->req->outstanding_cmds[h] == 211 sp) { 212 sp->qpair->req->outstanding_cmds[h] = 213 NULL; 214 break; 215 } 216 } 217 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 218 sp->done(sp, QLA_FUNCTION_TIMEOUT); 219 } 220 break; 221 case SRB_LOGOUT_CMD: 222 case SRB_CT_PTHRU_CMD: 223 case SRB_MB_IOCB: 224 case SRB_NACK_PLOGI: 225 case SRB_NACK_PRLI: 226 case SRB_NACK_LOGO: 227 case SRB_CTRL_VP: 228 rc = qla24xx_async_abort_cmd(sp, false); 229 if (rc) { 230 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 231 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 232 h++) { 233 if (sp->qpair->req->outstanding_cmds[h] == 234 sp) { 235 sp->qpair->req->outstanding_cmds[h] = 236 NULL; 237 break; 238 } 239 } 240 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 241 sp->done(sp, QLA_FUNCTION_TIMEOUT); 242 } 243 break; 244 default: 245 WARN_ON_ONCE(true); 246 sp->done(sp, QLA_FUNCTION_TIMEOUT); 247 break; 248 } 249 } 250 251 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 252 { 253 struct scsi_qla_host *vha = sp->vha; 254 struct srb_iocb *lio = &sp->u.iocb_cmd; 255 struct event_arg ea; 256 257 ql_dbg(ql_dbg_disc, vha, 0x20dd, 258 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 259 260 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 261 262 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 263 memset(&ea, 0, sizeof(ea)); 264 ea.fcport = sp->fcport; 265 ea.data[0] = lio->u.logio.data[0]; 266 ea.data[1] = lio->u.logio.data[1]; 267 ea.iop[0] = lio->u.logio.iop[0]; 268 ea.iop[1] = lio->u.logio.iop[1]; 269 ea.sp = sp; 270 qla24xx_handle_plogi_done_event(vha, &ea); 271 } 272 273 sp->free(sp); 274 } 275 276 static inline bool 277 fcport_is_smaller(fc_port_t *fcport) 278 { 279 if (wwn_to_u64(fcport->port_name) < 280 wwn_to_u64(fcport->vha->port_name)) 281 return true; 282 else 283 return false; 284 } 285 286 static inline bool 287 fcport_is_bigger(fc_port_t *fcport) 288 { 289 return !fcport_is_smaller(fcport); 290 } 291 292 int 293 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 294 uint16_t *data) 295 { 296 srb_t *sp; 297 struct srb_iocb *lio; 298 int rval = QLA_FUNCTION_FAILED; 299 300 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 301 fcport->loop_id == FC_NO_LOOP_ID) { 302 ql_log(ql_log_warn, vha, 0xffff, 303 "%s: %8phC - not sending command.\n", 304 __func__, fcport->port_name); 305 return rval; 306 } 307 308 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 309 if (!sp) 310 goto done; 311 312 fcport->flags |= FCF_ASYNC_SENT; 313 fcport->logout_completed = 0; 314 315 fcport->disc_state = DSC_LOGIN_PEND; 316 sp->type = SRB_LOGIN_CMD; 317 sp->name = "login"; 318 sp->gen1 = fcport->rscn_gen; 319 sp->gen2 = fcport->login_gen; 320 321 lio = &sp->u.iocb_cmd; 322 lio->timeout = qla2x00_async_iocb_timeout; 323 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 324 325 sp->done = qla2x00_async_login_sp_done; 326 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) 327 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 328 else 329 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 330 331 if (fcport->fc4f_nvme) 332 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 333 334 ql_dbg(ql_dbg_disc, vha, 0x2072, 335 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 336 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 337 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 338 fcport->login_retry); 339 340 rval = qla2x00_start_sp(sp); 341 if (rval != QLA_SUCCESS) { 342 fcport->flags |= FCF_LOGIN_NEEDED; 343 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 344 goto done_free_sp; 345 } 346 347 return rval; 348 349 done_free_sp: 350 sp->free(sp); 351 fcport->flags &= ~FCF_ASYNC_SENT; 352 done: 353 fcport->flags &= ~FCF_ASYNC_ACTIVE; 354 return rval; 355 } 356 357 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 358 { 359 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 360 sp->fcport->login_gen++; 361 qlt_logo_completion_handler(sp->fcport, res); 362 sp->free(sp); 363 } 364 365 int 366 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 367 { 368 srb_t *sp; 369 struct srb_iocb *lio; 370 int rval = QLA_FUNCTION_FAILED; 371 372 fcport->flags |= FCF_ASYNC_SENT; 373 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 374 if (!sp) 375 goto done; 376 377 sp->type = SRB_LOGOUT_CMD; 378 sp->name = "logout"; 379 380 lio = &sp->u.iocb_cmd; 381 lio->timeout = qla2x00_async_iocb_timeout; 382 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 383 384 sp->done = qla2x00_async_logout_sp_done; 385 386 ql_dbg(ql_dbg_disc, vha, 0x2070, 387 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 388 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 389 fcport->d_id.b.area, fcport->d_id.b.al_pa, 390 fcport->port_name); 391 392 rval = qla2x00_start_sp(sp); 393 if (rval != QLA_SUCCESS) 394 goto done_free_sp; 395 return rval; 396 397 done_free_sp: 398 sp->free(sp); 399 done: 400 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 401 return rval; 402 } 403 404 void 405 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 406 uint16_t *data) 407 { 408 fcport->flags &= ~FCF_ASYNC_ACTIVE; 409 /* Don't re-login in target mode */ 410 if (!fcport->tgt_session) 411 qla2x00_mark_device_lost(vha, fcport, 1, 0); 412 qlt_logo_completion_handler(fcport, data[0]); 413 } 414 415 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 416 { 417 struct srb_iocb *lio = &sp->u.iocb_cmd; 418 struct scsi_qla_host *vha = sp->vha; 419 420 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 421 if (!test_bit(UNLOADING, &vha->dpc_flags)) 422 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 423 lio->u.logio.data); 424 sp->free(sp); 425 } 426 427 int 428 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 429 { 430 srb_t *sp; 431 struct srb_iocb *lio; 432 int rval; 433 434 rval = QLA_FUNCTION_FAILED; 435 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 436 if (!sp) 437 goto done; 438 439 sp->type = SRB_PRLO_CMD; 440 sp->name = "prlo"; 441 442 lio = &sp->u.iocb_cmd; 443 lio->timeout = qla2x00_async_iocb_timeout; 444 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 445 446 sp->done = qla2x00_async_prlo_sp_done; 447 448 ql_dbg(ql_dbg_disc, vha, 0x2070, 449 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 450 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 451 fcport->d_id.b.area, fcport->d_id.b.al_pa); 452 453 rval = qla2x00_start_sp(sp); 454 if (rval != QLA_SUCCESS) 455 goto done_free_sp; 456 457 return rval; 458 459 done_free_sp: 460 sp->free(sp); 461 done: 462 fcport->flags &= ~FCF_ASYNC_ACTIVE; 463 return rval; 464 } 465 466 static 467 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 468 { 469 struct fc_port *fcport = ea->fcport; 470 471 ql_dbg(ql_dbg_disc, vha, 0x20d2, 472 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 473 __func__, fcport->port_name, fcport->disc_state, 474 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 475 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 476 477 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 478 ea->data[0]); 479 480 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 481 ql_dbg(ql_dbg_disc, vha, 0x2066, 482 "%s %8phC: adisc fail: post delete\n", 483 __func__, ea->fcport->port_name); 484 /* deleted = 0 & logout_on_delete = force fw cleanup */ 485 fcport->deleted = 0; 486 fcport->logout_on_delete = 1; 487 qlt_schedule_sess_for_deletion(ea->fcport); 488 return; 489 } 490 491 if (ea->fcport->disc_state == DSC_DELETE_PEND) 492 return; 493 494 if (ea->sp->gen2 != ea->fcport->login_gen) { 495 /* target side must have changed it. */ 496 ql_dbg(ql_dbg_disc, vha, 0x20d3, 497 "%s %8phC generation changed\n", 498 __func__, ea->fcport->port_name); 499 return; 500 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 501 qla_rscn_replay(fcport); 502 qlt_schedule_sess_for_deletion(fcport); 503 return; 504 } 505 506 __qla24xx_handle_gpdb_event(vha, ea); 507 } 508 509 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 510 { 511 struct qla_work_evt *e; 512 513 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 514 if (!e) 515 return QLA_FUNCTION_FAILED; 516 517 e->u.fcport.fcport = fcport; 518 fcport->flags |= FCF_ASYNC_ACTIVE; 519 return qla2x00_post_work(vha, e); 520 } 521 522 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 523 { 524 struct scsi_qla_host *vha = sp->vha; 525 struct event_arg ea; 526 struct srb_iocb *lio = &sp->u.iocb_cmd; 527 528 ql_dbg(ql_dbg_disc, vha, 0x2066, 529 "Async done-%s res %x %8phC\n", 530 sp->name, res, sp->fcport->port_name); 531 532 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 533 534 memset(&ea, 0, sizeof(ea)); 535 ea.rc = res; 536 ea.data[0] = lio->u.logio.data[0]; 537 ea.data[1] = lio->u.logio.data[1]; 538 ea.iop[0] = lio->u.logio.iop[0]; 539 ea.iop[1] = lio->u.logio.iop[1]; 540 ea.fcport = sp->fcport; 541 ea.sp = sp; 542 543 qla24xx_handle_adisc_event(vha, &ea); 544 545 sp->free(sp); 546 } 547 548 int 549 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 550 uint16_t *data) 551 { 552 srb_t *sp; 553 struct srb_iocb *lio; 554 int rval = QLA_FUNCTION_FAILED; 555 556 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 557 return rval; 558 559 fcport->flags |= FCF_ASYNC_SENT; 560 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 561 if (!sp) 562 goto done; 563 564 sp->type = SRB_ADISC_CMD; 565 sp->name = "adisc"; 566 567 lio = &sp->u.iocb_cmd; 568 lio->timeout = qla2x00_async_iocb_timeout; 569 sp->gen1 = fcport->rscn_gen; 570 sp->gen2 = fcport->login_gen; 571 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 572 573 sp->done = qla2x00_async_adisc_sp_done; 574 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 575 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 576 577 ql_dbg(ql_dbg_disc, vha, 0x206f, 578 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 579 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 580 581 rval = qla2x00_start_sp(sp); 582 if (rval != QLA_SUCCESS) 583 goto done_free_sp; 584 585 return rval; 586 587 done_free_sp: 588 sp->free(sp); 589 done: 590 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 591 qla2x00_post_async_adisc_work(vha, fcport, data); 592 return rval; 593 } 594 595 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 596 { 597 struct qla_hw_data *ha = vha->hw; 598 599 if (IS_FWI2_CAPABLE(ha)) 600 return loop_id > NPH_LAST_HANDLE; 601 602 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 603 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 604 } 605 606 /** 607 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 608 * @vha: adapter state pointer. 609 * @dev: port structure pointer. 610 * 611 * Returns: 612 * qla2x00 local function return status code. 613 * 614 * Context: 615 * Kernel context. 616 */ 617 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 618 { 619 int rval; 620 struct qla_hw_data *ha = vha->hw; 621 unsigned long flags = 0; 622 623 rval = QLA_SUCCESS; 624 625 spin_lock_irqsave(&ha->vport_slock, flags); 626 627 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 628 if (dev->loop_id >= LOOPID_MAP_SIZE || 629 qla2x00_is_reserved_id(vha, dev->loop_id)) { 630 dev->loop_id = FC_NO_LOOP_ID; 631 rval = QLA_FUNCTION_FAILED; 632 } else { 633 set_bit(dev->loop_id, ha->loop_id_map); 634 } 635 spin_unlock_irqrestore(&ha->vport_slock, flags); 636 637 if (rval == QLA_SUCCESS) 638 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 639 "Assigning new loopid=%x, portid=%x.\n", 640 dev->loop_id, dev->d_id.b24); 641 else 642 ql_log(ql_log_warn, dev->vha, 0x2087, 643 "No loop_id's available, portid=%x.\n", 644 dev->d_id.b24); 645 646 return rval; 647 } 648 649 void qla2x00_clear_loop_id(fc_port_t *fcport) 650 { 651 struct qla_hw_data *ha = fcport->vha->hw; 652 653 if (fcport->loop_id == FC_NO_LOOP_ID || 654 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 655 return; 656 657 clear_bit(fcport->loop_id, ha->loop_id_map); 658 fcport->loop_id = FC_NO_LOOP_ID; 659 } 660 661 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 662 struct event_arg *ea) 663 { 664 fc_port_t *fcport, *conflict_fcport; 665 struct get_name_list_extended *e; 666 u16 i, n, found = 0, loop_id; 667 port_id_t id; 668 u64 wwn; 669 u16 data[2]; 670 u8 current_login_state; 671 672 fcport = ea->fcport; 673 ql_dbg(ql_dbg_disc, vha, 0xffff, 674 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 675 __func__, fcport->port_name, fcport->disc_state, 676 fcport->fw_login_state, ea->rc, 677 fcport->login_gen, fcport->last_login_gen, 678 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 679 680 if (fcport->disc_state == DSC_DELETE_PEND) 681 return; 682 683 if (ea->rc) { /* rval */ 684 if (fcport->login_retry == 0) { 685 ql_dbg(ql_dbg_disc, vha, 0x20de, 686 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 687 fcport->port_name, fcport->login_retry); 688 } 689 return; 690 } 691 692 if (fcport->last_rscn_gen != fcport->rscn_gen) { 693 qla_rscn_replay(fcport); 694 qlt_schedule_sess_for_deletion(fcport); 695 return; 696 } else if (fcport->last_login_gen != fcport->login_gen) { 697 ql_dbg(ql_dbg_disc, vha, 0x20e0, 698 "%s %8phC login gen changed\n", 699 __func__, fcport->port_name); 700 return; 701 } 702 703 n = ea->data[0] / sizeof(struct get_name_list_extended); 704 705 ql_dbg(ql_dbg_disc, vha, 0x20e1, 706 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 707 __func__, __LINE__, fcport->port_name, n, 708 fcport->d_id.b.domain, fcport->d_id.b.area, 709 fcport->d_id.b.al_pa, fcport->loop_id); 710 711 for (i = 0; i < n; i++) { 712 e = &vha->gnl.l[i]; 713 wwn = wwn_to_u64(e->port_name); 714 id.b.domain = e->port_id[2]; 715 id.b.area = e->port_id[1]; 716 id.b.al_pa = e->port_id[0]; 717 id.b.rsvd_1 = 0; 718 719 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 720 continue; 721 722 if (IS_SW_RESV_ADDR(id)) 723 continue; 724 725 found = 1; 726 727 loop_id = le16_to_cpu(e->nport_handle); 728 loop_id = (loop_id & 0x7fff); 729 if (fcport->fc4f_nvme) 730 current_login_state = e->current_login_state >> 4; 731 else 732 current_login_state = e->current_login_state & 0xf; 733 734 735 ql_dbg(ql_dbg_disc, vha, 0x20e2, 736 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 737 __func__, fcport->port_name, 738 e->current_login_state, fcport->fw_login_state, 739 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa, 740 fcport->d_id.b.domain, fcport->d_id.b.area, 741 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 742 743 switch (fcport->disc_state) { 744 case DSC_DELETE_PEND: 745 case DSC_DELETED: 746 break; 747 default: 748 if ((id.b24 != fcport->d_id.b24 && 749 fcport->d_id.b24) || 750 (fcport->loop_id != FC_NO_LOOP_ID && 751 fcport->loop_id != loop_id)) { 752 ql_dbg(ql_dbg_disc, vha, 0x20e3, 753 "%s %d %8phC post del sess\n", 754 __func__, __LINE__, fcport->port_name); 755 qlt_schedule_sess_for_deletion(fcport); 756 return; 757 } 758 break; 759 } 760 761 fcport->loop_id = loop_id; 762 763 wwn = wwn_to_u64(fcport->port_name); 764 qlt_find_sess_invalidate_other(vha, wwn, 765 id, loop_id, &conflict_fcport); 766 767 if (conflict_fcport) { 768 /* 769 * Another share fcport share the same loop_id & 770 * nport id. Conflict fcport needs to finish 771 * cleanup before this fcport can proceed to login. 772 */ 773 conflict_fcport->conflict = fcport; 774 fcport->login_pause = 1; 775 } 776 777 switch (vha->hw->current_topology) { 778 default: 779 switch (current_login_state) { 780 case DSC_LS_PRLI_COMP: 781 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 782 vha, 0x20e4, "%s %d %8phC post gpdb\n", 783 __func__, __LINE__, fcport->port_name); 784 785 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 786 fcport->port_type = FCT_INITIATOR; 787 else 788 fcport->port_type = FCT_TARGET; 789 data[0] = data[1] = 0; 790 qla2x00_post_async_adisc_work(vha, fcport, 791 data); 792 break; 793 case DSC_LS_PORT_UNAVAIL: 794 default: 795 if (fcport->loop_id == FC_NO_LOOP_ID) { 796 qla2x00_find_new_loop_id(vha, fcport); 797 fcport->fw_login_state = 798 DSC_LS_PORT_UNAVAIL; 799 } 800 ql_dbg(ql_dbg_disc, vha, 0x20e5, 801 "%s %d %8phC\n", __func__, __LINE__, 802 fcport->port_name); 803 qla24xx_fcport_handle_login(vha, fcport); 804 break; 805 } 806 break; 807 case ISP_CFG_N: 808 fcport->fw_login_state = current_login_state; 809 fcport->d_id = id; 810 switch (current_login_state) { 811 case DSC_LS_PRLI_PEND: 812 /* 813 * In the middle of PRLI. Let it finish. 814 * Allow relogin code to recheck state again 815 * with GNL. Push disc_state back to DELETED 816 * so GNL can go out again 817 */ 818 fcport->disc_state = DSC_DELETED; 819 break; 820 case DSC_LS_PRLI_COMP: 821 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 822 fcport->port_type = FCT_INITIATOR; 823 else 824 fcport->port_type = FCT_TARGET; 825 826 data[0] = data[1] = 0; 827 qla2x00_post_async_adisc_work(vha, fcport, 828 data); 829 break; 830 case DSC_LS_PLOGI_COMP: 831 if (fcport_is_bigger(fcport)) { 832 /* local adapter is smaller */ 833 if (fcport->loop_id != FC_NO_LOOP_ID) 834 qla2x00_clear_loop_id(fcport); 835 836 fcport->loop_id = loop_id; 837 qla24xx_fcport_handle_login(vha, 838 fcport); 839 break; 840 } 841 /* fall through */ 842 default: 843 if (fcport_is_smaller(fcport)) { 844 /* local adapter is bigger */ 845 if (fcport->loop_id != FC_NO_LOOP_ID) 846 qla2x00_clear_loop_id(fcport); 847 848 fcport->loop_id = loop_id; 849 qla24xx_fcport_handle_login(vha, 850 fcport); 851 } 852 break; 853 } 854 break; 855 } /* switch (ha->current_topology) */ 856 } 857 858 if (!found) { 859 switch (vha->hw->current_topology) { 860 case ISP_CFG_F: 861 case ISP_CFG_FL: 862 for (i = 0; i < n; i++) { 863 e = &vha->gnl.l[i]; 864 id.b.domain = e->port_id[0]; 865 id.b.area = e->port_id[1]; 866 id.b.al_pa = e->port_id[2]; 867 id.b.rsvd_1 = 0; 868 loop_id = le16_to_cpu(e->nport_handle); 869 870 if (fcport->d_id.b24 == id.b24) { 871 conflict_fcport = 872 qla2x00_find_fcport_by_wwpn(vha, 873 e->port_name, 0); 874 if (conflict_fcport) { 875 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 876 vha, 0x20e5, 877 "%s %d %8phC post del sess\n", 878 __func__, __LINE__, 879 conflict_fcport->port_name); 880 qlt_schedule_sess_for_deletion 881 (conflict_fcport); 882 } 883 } 884 /* 885 * FW already picked this loop id for 886 * another fcport 887 */ 888 if (fcport->loop_id == loop_id) 889 fcport->loop_id = FC_NO_LOOP_ID; 890 } 891 qla24xx_fcport_handle_login(vha, fcport); 892 break; 893 case ISP_CFG_N: 894 fcport->disc_state = DSC_DELETED; 895 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 896 if (fcport->n2n_link_reset_cnt < 2) { 897 fcport->n2n_link_reset_cnt++; 898 /* 899 * remote port is not sending PLOGI. 900 * Reset link to kick start his state 901 * machine 902 */ 903 set_bit(N2N_LINK_RESET, 904 &vha->dpc_flags); 905 } else { 906 if (fcport->n2n_chip_reset < 1) { 907 ql_log(ql_log_info, vha, 0x705d, 908 "Chip reset to bring laser down"); 909 set_bit(ISP_ABORT_NEEDED, 910 &vha->dpc_flags); 911 fcport->n2n_chip_reset++; 912 } else { 913 ql_log(ql_log_info, vha, 0x705d, 914 "Remote port %8ph is not coming back\n", 915 fcport->port_name); 916 fcport->scan_state = 0; 917 } 918 } 919 qla2xxx_wake_dpc(vha); 920 } else { 921 /* 922 * report port suppose to do PLOGI. Give him 923 * more time. FW will catch it. 924 */ 925 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 926 } 927 break; 928 default: 929 break; 930 } 931 } 932 } /* gnl_event */ 933 934 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 935 { 936 struct scsi_qla_host *vha = sp->vha; 937 unsigned long flags; 938 struct fc_port *fcport = NULL, *tf; 939 u16 i, n = 0, loop_id; 940 struct event_arg ea; 941 struct get_name_list_extended *e; 942 u64 wwn; 943 struct list_head h; 944 bool found = false; 945 946 ql_dbg(ql_dbg_disc, vha, 0x20e7, 947 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 948 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 949 sp->u.iocb_cmd.u.mbx.in_mb[2]); 950 951 if (res == QLA_FUNCTION_TIMEOUT) 952 return; 953 954 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 955 memset(&ea, 0, sizeof(ea)); 956 ea.sp = sp; 957 ea.rc = res; 958 959 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 960 sizeof(struct get_name_list_extended)) { 961 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 962 sizeof(struct get_name_list_extended); 963 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 964 } 965 966 for (i = 0; i < n; i++) { 967 e = &vha->gnl.l[i]; 968 loop_id = le16_to_cpu(e->nport_handle); 969 /* mask out reserve bit */ 970 loop_id = (loop_id & 0x7fff); 971 set_bit(loop_id, vha->hw->loop_id_map); 972 wwn = wwn_to_u64(e->port_name); 973 974 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 975 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 976 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 977 e->port_id[0], e->current_login_state, e->last_login_state, 978 (loop_id & 0x7fff)); 979 } 980 981 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 982 983 INIT_LIST_HEAD(&h); 984 fcport = tf = NULL; 985 if (!list_empty(&vha->gnl.fcports)) 986 list_splice_init(&vha->gnl.fcports, &h); 987 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 988 989 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 990 list_del_init(&fcport->gnl_entry); 991 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 992 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 993 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 994 ea.fcport = fcport; 995 996 qla24xx_handle_gnl_done_event(vha, &ea); 997 } 998 999 /* create new fcport if fw has knowledge of new sessions */ 1000 for (i = 0; i < n; i++) { 1001 port_id_t id; 1002 u64 wwnn; 1003 1004 e = &vha->gnl.l[i]; 1005 wwn = wwn_to_u64(e->port_name); 1006 1007 found = false; 1008 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1009 if (!memcmp((u8 *)&wwn, fcport->port_name, 1010 WWN_SIZE)) { 1011 found = true; 1012 break; 1013 } 1014 } 1015 1016 id.b.domain = e->port_id[2]; 1017 id.b.area = e->port_id[1]; 1018 id.b.al_pa = e->port_id[0]; 1019 id.b.rsvd_1 = 0; 1020 1021 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1022 ql_dbg(ql_dbg_disc, vha, 0x2065, 1023 "%s %d %8phC %06x post new sess\n", 1024 __func__, __LINE__, (u8 *)&wwn, id.b24); 1025 wwnn = wwn_to_u64(e->node_name); 1026 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1027 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 1028 } 1029 } 1030 1031 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1032 vha->gnl.sent = 0; 1033 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1034 1035 sp->free(sp); 1036 } 1037 1038 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1039 { 1040 srb_t *sp; 1041 struct srb_iocb *mbx; 1042 int rval = QLA_FUNCTION_FAILED; 1043 unsigned long flags; 1044 u16 *mb; 1045 1046 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1047 return rval; 1048 1049 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1050 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1051 1052 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1053 fcport->flags |= FCF_ASYNC_SENT; 1054 fcport->disc_state = DSC_GNL; 1055 fcport->last_rscn_gen = fcport->rscn_gen; 1056 fcport->last_login_gen = fcport->login_gen; 1057 1058 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1059 if (vha->gnl.sent) { 1060 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1061 return QLA_SUCCESS; 1062 } 1063 vha->gnl.sent = 1; 1064 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1065 1066 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1067 if (!sp) 1068 goto done; 1069 1070 sp->type = SRB_MB_IOCB; 1071 sp->name = "gnlist"; 1072 sp->gen1 = fcport->rscn_gen; 1073 sp->gen2 = fcport->login_gen; 1074 1075 mbx = &sp->u.iocb_cmd; 1076 mbx->timeout = qla2x00_async_iocb_timeout; 1077 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 1078 1079 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1080 mb[0] = MBC_PORT_NODE_NAME_LIST; 1081 mb[1] = BIT_2 | BIT_3; 1082 mb[2] = MSW(vha->gnl.ldma); 1083 mb[3] = LSW(vha->gnl.ldma); 1084 mb[6] = MSW(MSD(vha->gnl.ldma)); 1085 mb[7] = LSW(MSD(vha->gnl.ldma)); 1086 mb[8] = vha->gnl.size; 1087 mb[9] = vha->vp_idx; 1088 1089 sp->done = qla24xx_async_gnl_sp_done; 1090 1091 ql_dbg(ql_dbg_disc, vha, 0x20da, 1092 "Async-%s - OUT WWPN %8phC hndl %x\n", 1093 sp->name, fcport->port_name, sp->handle); 1094 1095 rval = qla2x00_start_sp(sp); 1096 if (rval != QLA_SUCCESS) 1097 goto done_free_sp; 1098 1099 return rval; 1100 1101 done_free_sp: 1102 sp->free(sp); 1103 fcport->flags &= ~FCF_ASYNC_SENT; 1104 done: 1105 return rval; 1106 } 1107 1108 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1109 { 1110 struct qla_work_evt *e; 1111 1112 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1113 if (!e) 1114 return QLA_FUNCTION_FAILED; 1115 1116 e->u.fcport.fcport = fcport; 1117 fcport->flags |= FCF_ASYNC_ACTIVE; 1118 return qla2x00_post_work(vha, e); 1119 } 1120 1121 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1122 { 1123 struct scsi_qla_host *vha = sp->vha; 1124 struct qla_hw_data *ha = vha->hw; 1125 fc_port_t *fcport = sp->fcport; 1126 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1127 struct event_arg ea; 1128 1129 ql_dbg(ql_dbg_disc, vha, 0x20db, 1130 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1131 sp->name, res, fcport->port_name, mb[1], mb[2]); 1132 1133 if (res == QLA_FUNCTION_TIMEOUT) { 1134 dma_pool_free(sp->vha->hw->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1135 sp->u.iocb_cmd.u.mbx.in_dma); 1136 return; 1137 } 1138 1139 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1140 memset(&ea, 0, sizeof(ea)); 1141 ea.fcport = fcport; 1142 ea.sp = sp; 1143 1144 qla24xx_handle_gpdb_event(vha, &ea); 1145 1146 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1147 sp->u.iocb_cmd.u.mbx.in_dma); 1148 1149 sp->free(sp); 1150 } 1151 1152 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1153 { 1154 struct qla_work_evt *e; 1155 1156 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1157 if (!e) 1158 return QLA_FUNCTION_FAILED; 1159 1160 e->u.fcport.fcport = fcport; 1161 1162 return qla2x00_post_work(vha, e); 1163 } 1164 1165 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1166 { 1167 struct scsi_qla_host *vha = sp->vha; 1168 struct srb_iocb *lio = &sp->u.iocb_cmd; 1169 struct event_arg ea; 1170 1171 ql_dbg(ql_dbg_disc, vha, 0x2129, 1172 "%s %8phC res %d \n", __func__, 1173 sp->fcport->port_name, res); 1174 1175 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1176 1177 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1178 memset(&ea, 0, sizeof(ea)); 1179 ea.fcport = sp->fcport; 1180 ea.data[0] = lio->u.logio.data[0]; 1181 ea.data[1] = lio->u.logio.data[1]; 1182 ea.iop[0] = lio->u.logio.iop[0]; 1183 ea.iop[1] = lio->u.logio.iop[1]; 1184 ea.sp = sp; 1185 1186 qla24xx_handle_prli_done_event(vha, &ea); 1187 } 1188 1189 sp->free(sp); 1190 } 1191 1192 int 1193 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1194 { 1195 srb_t *sp; 1196 struct srb_iocb *lio; 1197 int rval = QLA_FUNCTION_FAILED; 1198 1199 if (!vha->flags.online) 1200 return rval; 1201 1202 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1203 fcport->fw_login_state == DSC_LS_PRLI_PEND) 1204 return rval; 1205 1206 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1207 if (!sp) 1208 return rval; 1209 1210 fcport->flags |= FCF_ASYNC_SENT; 1211 fcport->logout_completed = 0; 1212 1213 sp->type = SRB_PRLI_CMD; 1214 sp->name = "prli"; 1215 1216 lio = &sp->u.iocb_cmd; 1217 lio->timeout = qla2x00_async_iocb_timeout; 1218 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1219 1220 sp->done = qla2x00_async_prli_sp_done; 1221 lio->u.logio.flags = 0; 1222 1223 if (fcport->fc4f_nvme) 1224 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1225 1226 ql_dbg(ql_dbg_disc, vha, 0x211b, 1227 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 1228 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1229 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc"); 1230 1231 rval = qla2x00_start_sp(sp); 1232 if (rval != QLA_SUCCESS) { 1233 fcport->flags |= FCF_LOGIN_NEEDED; 1234 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1235 goto done_free_sp; 1236 } 1237 1238 return rval; 1239 1240 done_free_sp: 1241 sp->free(sp); 1242 fcport->flags &= ~FCF_ASYNC_SENT; 1243 return rval; 1244 } 1245 1246 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1247 { 1248 struct qla_work_evt *e; 1249 1250 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1251 if (!e) 1252 return QLA_FUNCTION_FAILED; 1253 1254 e->u.fcport.fcport = fcport; 1255 e->u.fcport.opt = opt; 1256 fcport->flags |= FCF_ASYNC_ACTIVE; 1257 return qla2x00_post_work(vha, e); 1258 } 1259 1260 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1261 { 1262 srb_t *sp; 1263 struct srb_iocb *mbx; 1264 int rval = QLA_FUNCTION_FAILED; 1265 u16 *mb; 1266 dma_addr_t pd_dma; 1267 struct port_database_24xx *pd; 1268 struct qla_hw_data *ha = vha->hw; 1269 1270 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 1271 fcport->loop_id == FC_NO_LOOP_ID) { 1272 ql_log(ql_log_warn, vha, 0xffff, 1273 "%s: %8phC - not sending command.\n", 1274 __func__, fcport->port_name); 1275 return rval; 1276 } 1277 1278 fcport->disc_state = DSC_GPDB; 1279 1280 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1281 if (!sp) 1282 goto done; 1283 1284 fcport->flags |= FCF_ASYNC_SENT; 1285 sp->type = SRB_MB_IOCB; 1286 sp->name = "gpdb"; 1287 sp->gen1 = fcport->rscn_gen; 1288 sp->gen2 = fcport->login_gen; 1289 1290 mbx = &sp->u.iocb_cmd; 1291 mbx->timeout = qla2x00_async_iocb_timeout; 1292 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1293 1294 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1295 if (pd == NULL) { 1296 ql_log(ql_log_warn, vha, 0xd043, 1297 "Failed to allocate port database structure.\n"); 1298 goto done_free_sp; 1299 } 1300 1301 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1302 mb[0] = MBC_GET_PORT_DATABASE; 1303 mb[1] = fcport->loop_id; 1304 mb[2] = MSW(pd_dma); 1305 mb[3] = LSW(pd_dma); 1306 mb[6] = MSW(MSD(pd_dma)); 1307 mb[7] = LSW(MSD(pd_dma)); 1308 mb[9] = vha->vp_idx; 1309 mb[10] = opt; 1310 1311 mbx->u.mbx.in = (void *)pd; 1312 mbx->u.mbx.in_dma = pd_dma; 1313 1314 sp->done = qla24xx_async_gpdb_sp_done; 1315 1316 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1317 "Async-%s %8phC hndl %x opt %x\n", 1318 sp->name, fcport->port_name, sp->handle, opt); 1319 1320 rval = qla2x00_start_sp(sp); 1321 if (rval != QLA_SUCCESS) 1322 goto done_free_sp; 1323 return rval; 1324 1325 done_free_sp: 1326 if (pd) 1327 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1328 1329 sp->free(sp); 1330 fcport->flags &= ~FCF_ASYNC_SENT; 1331 done: 1332 qla24xx_post_gpdb_work(vha, fcport, opt); 1333 return rval; 1334 } 1335 1336 static 1337 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1338 { 1339 unsigned long flags; 1340 1341 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1342 ea->fcport->login_gen++; 1343 ea->fcport->deleted = 0; 1344 ea->fcport->logout_on_delete = 1; 1345 1346 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1347 vha->fcport_count++; 1348 ea->fcport->login_succ = 1; 1349 1350 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1351 qla24xx_sched_upd_fcport(ea->fcport); 1352 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1353 } else if (ea->fcport->login_succ) { 1354 /* 1355 * We have an existing session. A late RSCN delivery 1356 * must have triggered the session to be re-validate. 1357 * Session is still valid. 1358 */ 1359 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1360 "%s %d %8phC session revalidate success\n", 1361 __func__, __LINE__, ea->fcport->port_name); 1362 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1363 } 1364 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1365 } 1366 1367 static 1368 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1369 { 1370 fc_port_t *fcport = ea->fcport; 1371 struct port_database_24xx *pd; 1372 struct srb *sp = ea->sp; 1373 uint8_t ls; 1374 1375 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1376 1377 fcport->flags &= ~FCF_ASYNC_SENT; 1378 1379 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1380 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name, 1381 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme, 1382 ea->rc); 1383 1384 if (fcport->disc_state == DSC_DELETE_PEND) 1385 return; 1386 1387 if (fcport->fc4f_nvme) 1388 ls = pd->current_login_state >> 4; 1389 else 1390 ls = pd->current_login_state & 0xf; 1391 1392 if (ea->sp->gen2 != fcport->login_gen) { 1393 /* target side must have changed it. */ 1394 1395 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1396 "%s %8phC generation changed\n", 1397 __func__, fcport->port_name); 1398 return; 1399 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1400 qla_rscn_replay(fcport); 1401 qlt_schedule_sess_for_deletion(fcport); 1402 return; 1403 } 1404 1405 switch (ls) { 1406 case PDS_PRLI_COMPLETE: 1407 __qla24xx_parse_gpdb(vha, fcport, pd); 1408 break; 1409 case PDS_PLOGI_PENDING: 1410 case PDS_PLOGI_COMPLETE: 1411 case PDS_PRLI_PENDING: 1412 case PDS_PRLI2_PENDING: 1413 /* Set discovery state back to GNL to Relogin attempt */ 1414 if (qla_dual_mode_enabled(vha) || 1415 qla_ini_mode_enabled(vha)) { 1416 fcport->disc_state = DSC_GNL; 1417 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1418 } 1419 return; 1420 case PDS_LOGO_PENDING: 1421 case PDS_PORT_UNAVAILABLE: 1422 default: 1423 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1424 __func__, __LINE__, fcport->port_name); 1425 qlt_schedule_sess_for_deletion(fcport); 1426 return; 1427 } 1428 __qla24xx_handle_gpdb_event(vha, ea); 1429 } /* gpdb event */ 1430 1431 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1432 { 1433 u8 login = 0; 1434 int rc; 1435 1436 if (qla_tgt_mode_enabled(vha)) 1437 return; 1438 1439 if (qla_dual_mode_enabled(vha)) { 1440 if (N2N_TOPO(vha->hw)) { 1441 u64 mywwn, wwn; 1442 1443 mywwn = wwn_to_u64(vha->port_name); 1444 wwn = wwn_to_u64(fcport->port_name); 1445 if (mywwn > wwn) 1446 login = 1; 1447 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1448 && time_after_eq(jiffies, 1449 fcport->plogi_nack_done_deadline)) 1450 login = 1; 1451 } else { 1452 login = 1; 1453 } 1454 } else { 1455 /* initiator mode */ 1456 login = 1; 1457 } 1458 1459 if (login && fcport->login_retry) { 1460 fcport->login_retry--; 1461 if (fcport->loop_id == FC_NO_LOOP_ID) { 1462 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1463 rc = qla2x00_find_new_loop_id(vha, fcport); 1464 if (rc) { 1465 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1466 "%s %d %8phC post del sess - out of loopid\n", 1467 __func__, __LINE__, fcport->port_name); 1468 fcport->scan_state = 0; 1469 qlt_schedule_sess_for_deletion(fcport); 1470 return; 1471 } 1472 } 1473 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1474 "%s %d %8phC post login\n", 1475 __func__, __LINE__, fcport->port_name); 1476 qla2x00_post_async_login_work(vha, fcport, NULL); 1477 } 1478 } 1479 1480 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1481 { 1482 u16 data[2]; 1483 u64 wwn; 1484 u16 sec; 1485 1486 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1487 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1488 __func__, fcport->port_name, fcport->disc_state, 1489 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1490 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1491 fcport->login_gen, fcport->loop_id, fcport->scan_state); 1492 1493 if (fcport->scan_state != QLA_FCPORT_FOUND) 1494 return 0; 1495 1496 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1497 qla_dual_mode_enabled(vha) && 1498 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1499 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1500 return 0; 1501 1502 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1503 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1504 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1505 return 0; 1506 } 1507 } 1508 1509 /* for pure Target Mode. Login will not be initiated */ 1510 if (vha->host->active_mode == MODE_TARGET) 1511 return 0; 1512 1513 if (fcport->flags & FCF_ASYNC_SENT) { 1514 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1515 return 0; 1516 } 1517 1518 switch (fcport->disc_state) { 1519 case DSC_DELETED: 1520 wwn = wwn_to_u64(fcport->node_name); 1521 switch (vha->hw->current_topology) { 1522 case ISP_CFG_N: 1523 if (fcport_is_smaller(fcport)) { 1524 /* this adapter is bigger */ 1525 if (fcport->login_retry) { 1526 if (fcport->loop_id == FC_NO_LOOP_ID) { 1527 qla2x00_find_new_loop_id(vha, 1528 fcport); 1529 fcport->fw_login_state = 1530 DSC_LS_PORT_UNAVAIL; 1531 } 1532 fcport->login_retry--; 1533 qla_post_els_plogi_work(vha, fcport); 1534 } else { 1535 ql_log(ql_log_info, vha, 0x705d, 1536 "Unable to reach remote port %8phC", 1537 fcport->port_name); 1538 } 1539 } else { 1540 qla24xx_post_gnl_work(vha, fcport); 1541 } 1542 break; 1543 default: 1544 if (wwn == 0) { 1545 ql_dbg(ql_dbg_disc, vha, 0xffff, 1546 "%s %d %8phC post GNNID\n", 1547 __func__, __LINE__, fcport->port_name); 1548 qla24xx_post_gnnid_work(vha, fcport); 1549 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1550 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1551 "%s %d %8phC post gnl\n", 1552 __func__, __LINE__, fcport->port_name); 1553 qla24xx_post_gnl_work(vha, fcport); 1554 } else { 1555 qla_chk_n2n_b4_login(vha, fcport); 1556 } 1557 break; 1558 } 1559 break; 1560 1561 case DSC_GNL: 1562 switch (vha->hw->current_topology) { 1563 case ISP_CFG_N: 1564 if ((fcport->current_login_state & 0xf) == 0x6) { 1565 ql_dbg(ql_dbg_disc, vha, 0x2118, 1566 "%s %d %8phC post GPDB work\n", 1567 __func__, __LINE__, fcport->port_name); 1568 fcport->chip_reset = 1569 vha->hw->base_qpair->chip_reset; 1570 qla24xx_post_gpdb_work(vha, fcport, 0); 1571 } else { 1572 ql_dbg(ql_dbg_disc, vha, 0x2118, 1573 "%s %d %8phC post NVMe PRLI\n", 1574 __func__, __LINE__, fcport->port_name); 1575 qla24xx_post_prli_work(vha, fcport); 1576 } 1577 break; 1578 default: 1579 if (fcport->login_pause) { 1580 fcport->last_rscn_gen = fcport->rscn_gen; 1581 fcport->last_login_gen = fcport->login_gen; 1582 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1583 break; 1584 } 1585 qla_chk_n2n_b4_login(vha, fcport); 1586 break; 1587 } 1588 break; 1589 1590 case DSC_LOGIN_FAILED: 1591 if (N2N_TOPO(vha->hw)) 1592 qla_chk_n2n_b4_login(vha, fcport); 1593 else 1594 qlt_schedule_sess_for_deletion(fcport); 1595 break; 1596 1597 case DSC_LOGIN_COMPLETE: 1598 /* recheck login state */ 1599 data[0] = data[1] = 0; 1600 qla2x00_post_async_adisc_work(vha, fcport, data); 1601 break; 1602 1603 case DSC_LOGIN_PEND: 1604 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1605 qla24xx_post_prli_work(vha, fcport); 1606 break; 1607 1608 case DSC_UPD_FCPORT: 1609 sec = jiffies_to_msecs(jiffies - 1610 fcport->jiffies_at_registration)/1000; 1611 if (fcport->sec_since_registration < sec && sec && 1612 !(sec % 60)) { 1613 fcport->sec_since_registration = sec; 1614 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1615 "%s %8phC - Slow Rport registration(%d Sec)\n", 1616 __func__, fcport->port_name, sec); 1617 } 1618 1619 if (fcport->next_disc_state != DSC_DELETE_PEND) 1620 fcport->next_disc_state = DSC_ADISC; 1621 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1622 break; 1623 1624 default: 1625 break; 1626 } 1627 1628 return 0; 1629 } 1630 1631 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1632 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1633 { 1634 struct qla_work_evt *e; 1635 1636 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1637 if (!e) 1638 return QLA_FUNCTION_FAILED; 1639 1640 e->u.new_sess.id = *id; 1641 e->u.new_sess.pla = pla; 1642 e->u.new_sess.fc4_type = fc4_type; 1643 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1644 if (node_name) 1645 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1646 1647 return qla2x00_post_work(vha, e); 1648 } 1649 1650 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1651 { 1652 fc_port_t *fcport; 1653 unsigned long flags; 1654 1655 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1656 if (fcport) { 1657 fcport->scan_needed = 1; 1658 fcport->rscn_gen++; 1659 } 1660 1661 spin_lock_irqsave(&vha->work_lock, flags); 1662 if (vha->scan.scan_flags == 0) { 1663 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1664 vha->scan.scan_flags |= SF_QUEUED; 1665 schedule_delayed_work(&vha->scan.scan_work, 5); 1666 } 1667 spin_unlock_irqrestore(&vha->work_lock, flags); 1668 } 1669 1670 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1671 struct event_arg *ea) 1672 { 1673 fc_port_t *fcport = ea->fcport; 1674 1675 if (test_bit(UNLOADING, &vha->dpc_flags)) 1676 return; 1677 1678 ql_dbg(ql_dbg_disc, vha, 0x2102, 1679 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1680 __func__, fcport->port_name, fcport->disc_state, 1681 fcport->fw_login_state, fcport->login_pause, 1682 fcport->deleted, fcport->conflict, 1683 fcport->last_rscn_gen, fcport->rscn_gen, 1684 fcport->last_login_gen, fcport->login_gen, 1685 fcport->flags); 1686 1687 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1688 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1689 __func__, __LINE__, fcport->port_name); 1690 qla24xx_post_gnl_work(vha, fcport); 1691 return; 1692 } 1693 1694 qla24xx_fcport_handle_login(vha, fcport); 1695 } 1696 1697 /* 1698 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1699 * to be consumed by the fcport 1700 */ 1701 void qla_rscn_replay(fc_port_t *fcport) 1702 { 1703 struct event_arg ea; 1704 1705 switch (fcport->disc_state) { 1706 case DSC_DELETE_PEND: 1707 return; 1708 default: 1709 break; 1710 } 1711 1712 if (fcport->scan_needed) { 1713 memset(&ea, 0, sizeof(ea)); 1714 ea.id = fcport->d_id; 1715 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1716 qla2x00_handle_rscn(fcport->vha, &ea); 1717 } 1718 } 1719 1720 static void 1721 qla2x00_tmf_iocb_timeout(void *data) 1722 { 1723 srb_t *sp = data; 1724 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1725 1726 tmf->u.tmf.comp_status = CS_TIMEOUT; 1727 complete(&tmf->u.tmf.comp); 1728 } 1729 1730 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 1731 { 1732 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1733 1734 complete(&tmf->u.tmf.comp); 1735 } 1736 1737 int 1738 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1739 uint32_t tag) 1740 { 1741 struct scsi_qla_host *vha = fcport->vha; 1742 struct srb_iocb *tm_iocb; 1743 srb_t *sp; 1744 int rval = QLA_FUNCTION_FAILED; 1745 1746 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1747 if (!sp) 1748 goto done; 1749 1750 tm_iocb = &sp->u.iocb_cmd; 1751 sp->type = SRB_TM_CMD; 1752 sp->name = "tmf"; 1753 1754 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1755 init_completion(&tm_iocb->u.tmf.comp); 1756 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1757 1758 tm_iocb->u.tmf.flags = flags; 1759 tm_iocb->u.tmf.lun = lun; 1760 tm_iocb->u.tmf.data = tag; 1761 sp->done = qla2x00_tmf_sp_done; 1762 1763 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1764 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1765 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1766 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1767 1768 rval = qla2x00_start_sp(sp); 1769 if (rval != QLA_SUCCESS) 1770 goto done_free_sp; 1771 wait_for_completion(&tm_iocb->u.tmf.comp); 1772 1773 rval = tm_iocb->u.tmf.data; 1774 1775 if (rval != QLA_SUCCESS) { 1776 ql_log(ql_log_warn, vha, 0x8030, 1777 "TM IOCB failed (%x).\n", rval); 1778 } 1779 1780 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1781 flags = tm_iocb->u.tmf.flags; 1782 lun = (uint16_t)tm_iocb->u.tmf.lun; 1783 1784 /* Issue Marker IOCB */ 1785 qla2x00_marker(vha, vha->hw->base_qpair, 1786 fcport->loop_id, lun, 1787 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1788 } 1789 1790 done_free_sp: 1791 sp->free(sp); 1792 fcport->flags &= ~FCF_ASYNC_SENT; 1793 done: 1794 return rval; 1795 } 1796 1797 int 1798 qla24xx_async_abort_command(srb_t *sp) 1799 { 1800 unsigned long flags = 0; 1801 1802 uint32_t handle; 1803 fc_port_t *fcport = sp->fcport; 1804 struct qla_qpair *qpair = sp->qpair; 1805 struct scsi_qla_host *vha = fcport->vha; 1806 struct req_que *req = qpair->req; 1807 1808 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1809 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1810 if (req->outstanding_cmds[handle] == sp) 1811 break; 1812 } 1813 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1814 1815 if (handle == req->num_outstanding_cmds) { 1816 /* Command not found. */ 1817 return QLA_FUNCTION_FAILED; 1818 } 1819 if (sp->type == SRB_FXIOCB_DCMD) 1820 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1821 FXDISC_ABORT_IOCTL); 1822 1823 return qla24xx_async_abort_cmd(sp, true); 1824 } 1825 1826 static void 1827 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1828 { 1829 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1830 ea->data[0]); 1831 1832 switch (ea->data[0]) { 1833 case MBS_COMMAND_COMPLETE: 1834 ql_dbg(ql_dbg_disc, vha, 0x2118, 1835 "%s %d %8phC post gpdb\n", 1836 __func__, __LINE__, ea->fcport->port_name); 1837 1838 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1839 ea->fcport->logout_on_delete = 1; 1840 ea->fcport->nvme_prli_service_param = ea->iop[0]; 1841 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 1842 ea->fcport->nvme_first_burst_size = 1843 (ea->iop[1] & 0xffff) * 512; 1844 else 1845 ea->fcport->nvme_first_burst_size = 0; 1846 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1847 break; 1848 default: 1849 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1850 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1851 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1852 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1853 break; 1854 } 1855 1856 if (ea->fcport->n2n_flag) { 1857 ql_dbg(ql_dbg_disc, vha, 0x2118, 1858 "%s %d %8phC post fc4 prli\n", 1859 __func__, __LINE__, ea->fcport->port_name); 1860 ea->fcport->fc4f_nvme = 0; 1861 ea->fcport->n2n_flag = 0; 1862 qla24xx_post_prli_work(vha, ea->fcport); 1863 } 1864 ql_dbg(ql_dbg_disc, vha, 0x2119, 1865 "%s %d %8phC unhandle event of %x\n", 1866 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1867 break; 1868 } 1869 } 1870 1871 void 1872 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1873 { 1874 port_id_t cid; /* conflict Nport id */ 1875 u16 lid; 1876 struct fc_port *conflict_fcport; 1877 unsigned long flags; 1878 struct fc_port *fcport = ea->fcport; 1879 1880 ql_dbg(ql_dbg_disc, vha, 0xffff, 1881 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1882 __func__, fcport->port_name, fcport->disc_state, 1883 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1884 ea->sp->gen1, fcport->rscn_gen, 1885 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1886 1887 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1888 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1889 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1890 "%s %d %8phC Remote is trying to login\n", 1891 __func__, __LINE__, fcport->port_name); 1892 return; 1893 } 1894 1895 if ((fcport->disc_state == DSC_DELETE_PEND) || 1896 (fcport->disc_state == DSC_DELETED)) { 1897 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1898 return; 1899 } 1900 1901 if (ea->sp->gen2 != fcport->login_gen) { 1902 /* target side must have changed it. */ 1903 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1904 "%s %8phC generation changed\n", 1905 __func__, fcport->port_name); 1906 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1907 return; 1908 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1909 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1910 "%s %8phC RSCN generation changed\n", 1911 __func__, fcport->port_name); 1912 qla_rscn_replay(fcport); 1913 qlt_schedule_sess_for_deletion(fcport); 1914 return; 1915 } 1916 1917 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1918 ea->data[0]); 1919 1920 switch (ea->data[0]) { 1921 case MBS_COMMAND_COMPLETE: 1922 /* 1923 * Driver must validate login state - If PRLI not complete, 1924 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1925 * requests. 1926 */ 1927 if (ea->fcport->fc4f_nvme) { 1928 ql_dbg(ql_dbg_disc, vha, 0x2117, 1929 "%s %d %8phC post prli\n", 1930 __func__, __LINE__, ea->fcport->port_name); 1931 qla24xx_post_prli_work(vha, ea->fcport); 1932 } else { 1933 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1934 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1935 __func__, __LINE__, ea->fcport->port_name, 1936 ea->fcport->loop_id, ea->fcport->d_id.b24); 1937 1938 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1939 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1940 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1941 ea->fcport->logout_on_delete = 1; 1942 ea->fcport->send_els_logo = 0; 1943 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1944 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1945 1946 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1947 } 1948 break; 1949 case MBS_COMMAND_ERROR: 1950 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1951 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1952 1953 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1954 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1955 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1956 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1957 else 1958 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1959 break; 1960 case MBS_LOOP_ID_USED: 1961 /* data[1] = IO PARAM 1 = nport ID */ 1962 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1963 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1964 cid.b.al_pa = ea->iop[1] & 0xff; 1965 cid.b.rsvd_1 = 0; 1966 1967 ql_dbg(ql_dbg_disc, vha, 0x20ec, 1968 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 1969 __func__, __LINE__, ea->fcport->port_name, 1970 ea->fcport->loop_id, cid.b24); 1971 1972 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1973 ea->fcport->loop_id = FC_NO_LOOP_ID; 1974 qla24xx_post_gnl_work(vha, ea->fcport); 1975 break; 1976 case MBS_PORT_ID_USED: 1977 lid = ea->iop[1] & 0xffff; 1978 qlt_find_sess_invalidate_other(vha, 1979 wwn_to_u64(ea->fcport->port_name), 1980 ea->fcport->d_id, lid, &conflict_fcport); 1981 1982 if (conflict_fcport) { 1983 /* 1984 * Another fcport share the same loop_id/nport id. 1985 * Conflict fcport needs to finish cleanup before this 1986 * fcport can proceed to login. 1987 */ 1988 conflict_fcport->conflict = ea->fcport; 1989 ea->fcport->login_pause = 1; 1990 1991 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1992 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 1993 __func__, __LINE__, ea->fcport->port_name, 1994 ea->fcport->d_id.b24, lid); 1995 } else { 1996 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1997 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 1998 __func__, __LINE__, ea->fcport->port_name, 1999 ea->fcport->d_id.b24, lid); 2000 2001 qla2x00_clear_loop_id(ea->fcport); 2002 set_bit(lid, vha->hw->loop_id_map); 2003 ea->fcport->loop_id = lid; 2004 ea->fcport->keep_nport_handle = 0; 2005 qlt_schedule_sess_for_deletion(ea->fcport); 2006 } 2007 break; 2008 } 2009 return; 2010 } 2011 2012 void 2013 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 2014 uint16_t *data) 2015 { 2016 qlt_logo_completion_handler(fcport, data[0]); 2017 fcport->login_gen++; 2018 fcport->flags &= ~FCF_ASYNC_ACTIVE; 2019 return; 2020 } 2021 2022 /****************************************************************************/ 2023 /* QLogic ISP2x00 Hardware Support Functions. */ 2024 /****************************************************************************/ 2025 2026 static int 2027 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2028 { 2029 int rval = QLA_SUCCESS; 2030 struct qla_hw_data *ha = vha->hw; 2031 uint32_t idc_major_ver, idc_minor_ver; 2032 uint16_t config[4]; 2033 2034 qla83xx_idc_lock(vha, 0); 2035 2036 /* SV: TODO: Assign initialization timeout from 2037 * flash-info / other param 2038 */ 2039 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2040 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2041 2042 /* Set our fcoe function presence */ 2043 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2044 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2045 "Error while setting DRV-Presence.\n"); 2046 rval = QLA_FUNCTION_FAILED; 2047 goto exit; 2048 } 2049 2050 /* Decide the reset ownership */ 2051 qla83xx_reset_ownership(vha); 2052 2053 /* 2054 * On first protocol driver load: 2055 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2056 * register. 2057 * Others: Check compatibility with current IDC Major version. 2058 */ 2059 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2060 if (ha->flags.nic_core_reset_owner) { 2061 /* Set IDC Major version */ 2062 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2063 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2064 2065 /* Clearing IDC-Lock-Recovery register */ 2066 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2067 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2068 /* 2069 * Clear further IDC participation if we are not compatible with 2070 * the current IDC Major Version. 2071 */ 2072 ql_log(ql_log_warn, vha, 0xb07d, 2073 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2074 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2075 __qla83xx_clear_drv_presence(vha); 2076 rval = QLA_FUNCTION_FAILED; 2077 goto exit; 2078 } 2079 /* Each function sets its supported Minor version. */ 2080 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2081 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2082 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2083 2084 if (ha->flags.nic_core_reset_owner) { 2085 memset(config, 0, sizeof(config)); 2086 if (!qla81xx_get_port_config(vha, config)) 2087 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2088 QLA8XXX_DEV_READY); 2089 } 2090 2091 rval = qla83xx_idc_state_handler(vha); 2092 2093 exit: 2094 qla83xx_idc_unlock(vha, 0); 2095 2096 return rval; 2097 } 2098 2099 /* 2100 * qla2x00_initialize_adapter 2101 * Initialize board. 2102 * 2103 * Input: 2104 * ha = adapter block pointer. 2105 * 2106 * Returns: 2107 * 0 = success 2108 */ 2109 int 2110 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2111 { 2112 int rval; 2113 struct qla_hw_data *ha = vha->hw; 2114 struct req_que *req = ha->req_q_map[0]; 2115 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2116 2117 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2118 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2119 2120 /* Clear adapter flags. */ 2121 vha->flags.online = 0; 2122 ha->flags.chip_reset_done = 0; 2123 vha->flags.reset_active = 0; 2124 ha->flags.pci_channel_io_perm_failure = 0; 2125 ha->flags.eeh_busy = 0; 2126 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2127 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2128 atomic_set(&vha->loop_state, LOOP_DOWN); 2129 vha->device_flags = DFLG_NO_CABLE; 2130 vha->dpc_flags = 0; 2131 vha->flags.management_server_logged_in = 0; 2132 vha->marker_needed = 0; 2133 ha->isp_abort_cnt = 0; 2134 ha->beacon_blink_led = 0; 2135 2136 set_bit(0, ha->req_qid_map); 2137 set_bit(0, ha->rsp_qid_map); 2138 2139 ql_dbg(ql_dbg_init, vha, 0x0040, 2140 "Configuring PCI space...\n"); 2141 rval = ha->isp_ops->pci_config(vha); 2142 if (rval) { 2143 ql_log(ql_log_warn, vha, 0x0044, 2144 "Unable to configure PCI space.\n"); 2145 return (rval); 2146 } 2147 2148 ha->isp_ops->reset_chip(vha); 2149 2150 /* Check for secure flash support */ 2151 if (IS_QLA28XX(ha)) { 2152 if (RD_REG_DWORD(®->mailbox12) & BIT_0) { 2153 ql_log(ql_log_info, vha, 0xffff, "Adapter is Secure\n"); 2154 ha->flags.secure_adapter = 1; 2155 } 2156 } 2157 2158 2159 rval = qla2xxx_get_flash_info(vha); 2160 if (rval) { 2161 ql_log(ql_log_fatal, vha, 0x004f, 2162 "Unable to validate FLASH data.\n"); 2163 return rval; 2164 } 2165 2166 if (IS_QLA8044(ha)) { 2167 qla8044_read_reset_template(vha); 2168 2169 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2170 * If DONRESET_BIT0 is set, drivers should not set dev_state 2171 * to NEED_RESET. But if NEED_RESET is set, drivers should 2172 * should honor the reset. */ 2173 if (ql2xdontresethba == 1) 2174 qla8044_set_idc_dontreset(vha); 2175 } 2176 2177 ha->isp_ops->get_flash_version(vha, req->ring); 2178 ql_dbg(ql_dbg_init, vha, 0x0061, 2179 "Configure NVRAM parameters...\n"); 2180 2181 ha->isp_ops->nvram_config(vha); 2182 2183 if (ha->flags.disable_serdes) { 2184 /* Mask HBA via NVRAM settings? */ 2185 ql_log(ql_log_info, vha, 0x0077, 2186 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2187 return QLA_FUNCTION_FAILED; 2188 } 2189 2190 ql_dbg(ql_dbg_init, vha, 0x0078, 2191 "Verifying loaded RISC code...\n"); 2192 2193 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2194 rval = ha->isp_ops->chip_diag(vha); 2195 if (rval) 2196 return (rval); 2197 rval = qla2x00_setup_chip(vha); 2198 if (rval) 2199 return (rval); 2200 } 2201 2202 if (IS_QLA84XX(ha)) { 2203 ha->cs84xx = qla84xx_get_chip(vha); 2204 if (!ha->cs84xx) { 2205 ql_log(ql_log_warn, vha, 0x00d0, 2206 "Unable to configure ISP84XX.\n"); 2207 return QLA_FUNCTION_FAILED; 2208 } 2209 } 2210 2211 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2212 rval = qla2x00_init_rings(vha); 2213 2214 /* No point in continuing if firmware initialization failed. */ 2215 if (rval != QLA_SUCCESS) 2216 return rval; 2217 2218 ha->flags.chip_reset_done = 1; 2219 2220 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2221 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2222 rval = qla84xx_init_chip(vha); 2223 if (rval != QLA_SUCCESS) { 2224 ql_log(ql_log_warn, vha, 0x00d4, 2225 "Unable to initialize ISP84XX.\n"); 2226 qla84xx_put_chip(vha); 2227 } 2228 } 2229 2230 /* Load the NIC Core f/w if we are the first protocol driver. */ 2231 if (IS_QLA8031(ha)) { 2232 rval = qla83xx_nic_core_fw_load(vha); 2233 if (rval) 2234 ql_log(ql_log_warn, vha, 0x0124, 2235 "Error in initializing NIC Core f/w.\n"); 2236 } 2237 2238 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2239 qla24xx_read_fcp_prio_cfg(vha); 2240 2241 if (IS_P3P_TYPE(ha)) 2242 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2243 else 2244 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2245 2246 return (rval); 2247 } 2248 2249 /** 2250 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2251 * @vha: HA context 2252 * 2253 * Returns 0 on success. 2254 */ 2255 int 2256 qla2100_pci_config(scsi_qla_host_t *vha) 2257 { 2258 uint16_t w; 2259 unsigned long flags; 2260 struct qla_hw_data *ha = vha->hw; 2261 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2262 2263 pci_set_master(ha->pdev); 2264 pci_try_set_mwi(ha->pdev); 2265 2266 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2267 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2268 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2269 2270 pci_disable_rom(ha->pdev); 2271 2272 /* Get PCI bus information. */ 2273 spin_lock_irqsave(&ha->hardware_lock, flags); 2274 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2275 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2276 2277 return QLA_SUCCESS; 2278 } 2279 2280 /** 2281 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2282 * @vha: HA context 2283 * 2284 * Returns 0 on success. 2285 */ 2286 int 2287 qla2300_pci_config(scsi_qla_host_t *vha) 2288 { 2289 uint16_t w; 2290 unsigned long flags = 0; 2291 uint32_t cnt; 2292 struct qla_hw_data *ha = vha->hw; 2293 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2294 2295 pci_set_master(ha->pdev); 2296 pci_try_set_mwi(ha->pdev); 2297 2298 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2299 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2300 2301 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2302 w &= ~PCI_COMMAND_INTX_DISABLE; 2303 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2304 2305 /* 2306 * If this is a 2300 card and not 2312, reset the 2307 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2308 * the 2310 also reports itself as a 2300 so we need to get the 2309 * fb revision level -- a 6 indicates it really is a 2300 and 2310 * not a 2310. 2311 */ 2312 if (IS_QLA2300(ha)) { 2313 spin_lock_irqsave(&ha->hardware_lock, flags); 2314 2315 /* Pause RISC. */ 2316 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2317 for (cnt = 0; cnt < 30000; cnt++) { 2318 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2319 break; 2320 2321 udelay(10); 2322 } 2323 2324 /* Select FPM registers. */ 2325 WRT_REG_WORD(®->ctrl_status, 0x20); 2326 RD_REG_WORD(®->ctrl_status); 2327 2328 /* Get the fb rev level */ 2329 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2330 2331 if (ha->fb_rev == FPM_2300) 2332 pci_clear_mwi(ha->pdev); 2333 2334 /* Deselect FPM registers. */ 2335 WRT_REG_WORD(®->ctrl_status, 0x0); 2336 RD_REG_WORD(®->ctrl_status); 2337 2338 /* Release RISC module. */ 2339 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2340 for (cnt = 0; cnt < 30000; cnt++) { 2341 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2342 break; 2343 2344 udelay(10); 2345 } 2346 2347 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2348 } 2349 2350 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2351 2352 pci_disable_rom(ha->pdev); 2353 2354 /* Get PCI bus information. */ 2355 spin_lock_irqsave(&ha->hardware_lock, flags); 2356 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2357 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2358 2359 return QLA_SUCCESS; 2360 } 2361 2362 /** 2363 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2364 * @vha: HA context 2365 * 2366 * Returns 0 on success. 2367 */ 2368 int 2369 qla24xx_pci_config(scsi_qla_host_t *vha) 2370 { 2371 uint16_t w; 2372 unsigned long flags = 0; 2373 struct qla_hw_data *ha = vha->hw; 2374 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2375 2376 pci_set_master(ha->pdev); 2377 pci_try_set_mwi(ha->pdev); 2378 2379 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2380 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2381 w &= ~PCI_COMMAND_INTX_DISABLE; 2382 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2383 2384 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2385 2386 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2387 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2388 pcix_set_mmrbc(ha->pdev, 2048); 2389 2390 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2391 if (pci_is_pcie(ha->pdev)) 2392 pcie_set_readrq(ha->pdev, 4096); 2393 2394 pci_disable_rom(ha->pdev); 2395 2396 ha->chip_revision = ha->pdev->revision; 2397 2398 /* Get PCI bus information. */ 2399 spin_lock_irqsave(&ha->hardware_lock, flags); 2400 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2401 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2402 2403 return QLA_SUCCESS; 2404 } 2405 2406 /** 2407 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2408 * @vha: HA context 2409 * 2410 * Returns 0 on success. 2411 */ 2412 int 2413 qla25xx_pci_config(scsi_qla_host_t *vha) 2414 { 2415 uint16_t w; 2416 struct qla_hw_data *ha = vha->hw; 2417 2418 pci_set_master(ha->pdev); 2419 pci_try_set_mwi(ha->pdev); 2420 2421 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2422 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2423 w &= ~PCI_COMMAND_INTX_DISABLE; 2424 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2425 2426 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2427 if (pci_is_pcie(ha->pdev)) 2428 pcie_set_readrq(ha->pdev, 4096); 2429 2430 pci_disable_rom(ha->pdev); 2431 2432 ha->chip_revision = ha->pdev->revision; 2433 2434 return QLA_SUCCESS; 2435 } 2436 2437 /** 2438 * qla2x00_isp_firmware() - Choose firmware image. 2439 * @vha: HA context 2440 * 2441 * Returns 0 on success. 2442 */ 2443 static int 2444 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2445 { 2446 int rval; 2447 uint16_t loop_id, topo, sw_cap; 2448 uint8_t domain, area, al_pa; 2449 struct qla_hw_data *ha = vha->hw; 2450 2451 /* Assume loading risc code */ 2452 rval = QLA_FUNCTION_FAILED; 2453 2454 if (ha->flags.disable_risc_code_load) { 2455 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2456 2457 /* Verify checksum of loaded RISC code. */ 2458 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2459 if (rval == QLA_SUCCESS) { 2460 /* And, verify we are not in ROM code. */ 2461 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2462 &area, &domain, &topo, &sw_cap); 2463 } 2464 } 2465 2466 if (rval) 2467 ql_dbg(ql_dbg_init, vha, 0x007a, 2468 "**** Load RISC code ****.\n"); 2469 2470 return (rval); 2471 } 2472 2473 /** 2474 * qla2x00_reset_chip() - Reset ISP chip. 2475 * @vha: HA context 2476 * 2477 * Returns 0 on success. 2478 */ 2479 int 2480 qla2x00_reset_chip(scsi_qla_host_t *vha) 2481 { 2482 unsigned long flags = 0; 2483 struct qla_hw_data *ha = vha->hw; 2484 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2485 uint32_t cnt; 2486 uint16_t cmd; 2487 int rval = QLA_FUNCTION_FAILED; 2488 2489 if (unlikely(pci_channel_offline(ha->pdev))) 2490 return rval; 2491 2492 ha->isp_ops->disable_intrs(ha); 2493 2494 spin_lock_irqsave(&ha->hardware_lock, flags); 2495 2496 /* Turn off master enable */ 2497 cmd = 0; 2498 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2499 cmd &= ~PCI_COMMAND_MASTER; 2500 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2501 2502 if (!IS_QLA2100(ha)) { 2503 /* Pause RISC. */ 2504 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2505 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2506 for (cnt = 0; cnt < 30000; cnt++) { 2507 if ((RD_REG_WORD(®->hccr) & 2508 HCCR_RISC_PAUSE) != 0) 2509 break; 2510 udelay(100); 2511 } 2512 } else { 2513 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2514 udelay(10); 2515 } 2516 2517 /* Select FPM registers. */ 2518 WRT_REG_WORD(®->ctrl_status, 0x20); 2519 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2520 2521 /* FPM Soft Reset. */ 2522 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2523 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2524 2525 /* Toggle Fpm Reset. */ 2526 if (!IS_QLA2200(ha)) { 2527 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2528 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2529 } 2530 2531 /* Select frame buffer registers. */ 2532 WRT_REG_WORD(®->ctrl_status, 0x10); 2533 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2534 2535 /* Reset frame buffer FIFOs. */ 2536 if (IS_QLA2200(ha)) { 2537 WRT_FB_CMD_REG(ha, reg, 0xa000); 2538 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2539 } else { 2540 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2541 2542 /* Read back fb_cmd until zero or 3 seconds max */ 2543 for (cnt = 0; cnt < 3000; cnt++) { 2544 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2545 break; 2546 udelay(100); 2547 } 2548 } 2549 2550 /* Select RISC module registers. */ 2551 WRT_REG_WORD(®->ctrl_status, 0); 2552 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2553 2554 /* Reset RISC processor. */ 2555 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2556 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2557 2558 /* Release RISC processor. */ 2559 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2560 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2561 } 2562 2563 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2564 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2565 2566 /* Reset ISP chip. */ 2567 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2568 2569 /* Wait for RISC to recover from reset. */ 2570 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2571 /* 2572 * It is necessary to for a delay here since the card doesn't 2573 * respond to PCI reads during a reset. On some architectures 2574 * this will result in an MCA. 2575 */ 2576 udelay(20); 2577 for (cnt = 30000; cnt; cnt--) { 2578 if ((RD_REG_WORD(®->ctrl_status) & 2579 CSR_ISP_SOFT_RESET) == 0) 2580 break; 2581 udelay(100); 2582 } 2583 } else 2584 udelay(10); 2585 2586 /* Reset RISC processor. */ 2587 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2588 2589 WRT_REG_WORD(®->semaphore, 0); 2590 2591 /* Release RISC processor. */ 2592 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2593 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2594 2595 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2596 for (cnt = 0; cnt < 30000; cnt++) { 2597 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2598 break; 2599 2600 udelay(100); 2601 } 2602 } else 2603 udelay(100); 2604 2605 /* Turn on master enable */ 2606 cmd |= PCI_COMMAND_MASTER; 2607 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2608 2609 /* Disable RISC pause on FPM parity error. */ 2610 if (!IS_QLA2100(ha)) { 2611 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2612 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2613 } 2614 2615 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2616 2617 return QLA_SUCCESS; 2618 } 2619 2620 /** 2621 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2622 * @vha: HA context 2623 * 2624 * Returns 0 on success. 2625 */ 2626 static int 2627 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2628 { 2629 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2630 2631 if (!IS_QLA81XX(vha->hw)) 2632 return QLA_SUCCESS; 2633 2634 return qla81xx_write_mpi_register(vha, mb); 2635 } 2636 2637 /** 2638 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2639 * @vha: HA context 2640 * 2641 * Returns 0 on success. 2642 */ 2643 static inline int 2644 qla24xx_reset_risc(scsi_qla_host_t *vha) 2645 { 2646 unsigned long flags = 0; 2647 struct qla_hw_data *ha = vha->hw; 2648 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2649 uint32_t cnt; 2650 uint16_t wd; 2651 static int abts_cnt; /* ISP abort retry counts */ 2652 int rval = QLA_SUCCESS; 2653 2654 spin_lock_irqsave(&ha->hardware_lock, flags); 2655 2656 /* Reset RISC. */ 2657 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2658 for (cnt = 0; cnt < 30000; cnt++) { 2659 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2660 break; 2661 2662 udelay(10); 2663 } 2664 2665 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2666 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2667 2668 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2669 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2670 RD_REG_DWORD(®->hccr), 2671 RD_REG_DWORD(®->ctrl_status), 2672 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2673 2674 WRT_REG_DWORD(®->ctrl_status, 2675 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2676 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2677 2678 udelay(100); 2679 2680 /* Wait for firmware to complete NVRAM accesses. */ 2681 RD_REG_WORD(®->mailbox0); 2682 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2683 rval == QLA_SUCCESS; cnt--) { 2684 barrier(); 2685 if (cnt) 2686 udelay(5); 2687 else 2688 rval = QLA_FUNCTION_TIMEOUT; 2689 } 2690 2691 if (rval == QLA_SUCCESS) 2692 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2693 2694 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2695 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2696 RD_REG_DWORD(®->hccr), 2697 RD_REG_DWORD(®->mailbox0)); 2698 2699 /* Wait for soft-reset to complete. */ 2700 RD_REG_DWORD(®->ctrl_status); 2701 for (cnt = 0; cnt < 60; cnt++) { 2702 barrier(); 2703 if ((RD_REG_DWORD(®->ctrl_status) & 2704 CSRX_ISP_SOFT_RESET) == 0) 2705 break; 2706 2707 udelay(5); 2708 } 2709 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2710 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2711 2712 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2713 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2714 RD_REG_DWORD(®->hccr), 2715 RD_REG_DWORD(®->ctrl_status)); 2716 2717 /* If required, do an MPI FW reset now */ 2718 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2719 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2720 if (++abts_cnt < 5) { 2721 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2722 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2723 } else { 2724 /* 2725 * We exhausted the ISP abort retries. We have to 2726 * set the board offline. 2727 */ 2728 abts_cnt = 0; 2729 vha->flags.online = 0; 2730 } 2731 } 2732 } 2733 2734 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2735 RD_REG_DWORD(®->hccr); 2736 2737 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2738 RD_REG_DWORD(®->hccr); 2739 2740 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2741 RD_REG_DWORD(®->hccr); 2742 2743 RD_REG_WORD(®->mailbox0); 2744 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2745 rval == QLA_SUCCESS; cnt--) { 2746 barrier(); 2747 if (cnt) 2748 udelay(5); 2749 else 2750 rval = QLA_FUNCTION_TIMEOUT; 2751 } 2752 if (rval == QLA_SUCCESS) 2753 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2754 2755 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2756 "Host Risc 0x%x, mailbox0 0x%x\n", 2757 RD_REG_DWORD(®->hccr), 2758 RD_REG_WORD(®->mailbox0)); 2759 2760 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2761 2762 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2763 "Driver in %s mode\n", 2764 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2765 2766 if (IS_NOPOLLING_TYPE(ha)) 2767 ha->isp_ops->enable_intrs(ha); 2768 2769 return rval; 2770 } 2771 2772 static void 2773 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2774 { 2775 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2776 2777 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2778 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2779 2780 } 2781 2782 static void 2783 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2784 { 2785 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2786 2787 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2788 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2789 } 2790 2791 static void 2792 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2793 { 2794 uint32_t wd32 = 0; 2795 uint delta_msec = 100; 2796 uint elapsed_msec = 0; 2797 uint timeout_msec; 2798 ulong n; 2799 2800 if (vha->hw->pdev->subsystem_device != 0x0175 && 2801 vha->hw->pdev->subsystem_device != 0x0240) 2802 return; 2803 2804 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2805 udelay(100); 2806 2807 attempt: 2808 timeout_msec = TIMEOUT_SEMAPHORE; 2809 n = timeout_msec / delta_msec; 2810 while (n--) { 2811 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2812 qla25xx_read_risc_sema_reg(vha, &wd32); 2813 if (wd32 & RISC_SEMAPHORE) 2814 break; 2815 msleep(delta_msec); 2816 elapsed_msec += delta_msec; 2817 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2818 goto force; 2819 } 2820 2821 if (!(wd32 & RISC_SEMAPHORE)) 2822 goto force; 2823 2824 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2825 goto acquired; 2826 2827 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2828 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2829 n = timeout_msec / delta_msec; 2830 while (n--) { 2831 qla25xx_read_risc_sema_reg(vha, &wd32); 2832 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2833 break; 2834 msleep(delta_msec); 2835 elapsed_msec += delta_msec; 2836 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2837 goto force; 2838 } 2839 2840 if (wd32 & RISC_SEMAPHORE_FORCE) 2841 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2842 2843 goto attempt; 2844 2845 force: 2846 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2847 2848 acquired: 2849 return; 2850 } 2851 2852 /** 2853 * qla24xx_reset_chip() - Reset ISP24xx chip. 2854 * @vha: HA context 2855 * 2856 * Returns 0 on success. 2857 */ 2858 int 2859 qla24xx_reset_chip(scsi_qla_host_t *vha) 2860 { 2861 struct qla_hw_data *ha = vha->hw; 2862 int rval = QLA_FUNCTION_FAILED; 2863 2864 if (pci_channel_offline(ha->pdev) && 2865 ha->flags.pci_channel_io_perm_failure) { 2866 return rval; 2867 } 2868 2869 ha->isp_ops->disable_intrs(ha); 2870 2871 qla25xx_manipulate_risc_semaphore(vha); 2872 2873 /* Perform RISC reset. */ 2874 rval = qla24xx_reset_risc(vha); 2875 2876 return rval; 2877 } 2878 2879 /** 2880 * qla2x00_chip_diag() - Test chip for proper operation. 2881 * @vha: HA context 2882 * 2883 * Returns 0 on success. 2884 */ 2885 int 2886 qla2x00_chip_diag(scsi_qla_host_t *vha) 2887 { 2888 int rval; 2889 struct qla_hw_data *ha = vha->hw; 2890 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2891 unsigned long flags = 0; 2892 uint16_t data; 2893 uint32_t cnt; 2894 uint16_t mb[5]; 2895 struct req_que *req = ha->req_q_map[0]; 2896 2897 /* Assume a failed state */ 2898 rval = QLA_FUNCTION_FAILED; 2899 2900 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2901 ®->flash_address); 2902 2903 spin_lock_irqsave(&ha->hardware_lock, flags); 2904 2905 /* Reset ISP chip. */ 2906 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2907 2908 /* 2909 * We need to have a delay here since the card will not respond while 2910 * in reset causing an MCA on some architectures. 2911 */ 2912 udelay(20); 2913 data = qla2x00_debounce_register(®->ctrl_status); 2914 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2915 udelay(5); 2916 data = RD_REG_WORD(®->ctrl_status); 2917 barrier(); 2918 } 2919 2920 if (!cnt) 2921 goto chip_diag_failed; 2922 2923 ql_dbg(ql_dbg_init, vha, 0x007c, 2924 "Reset register cleared by chip reset.\n"); 2925 2926 /* Reset RISC processor. */ 2927 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2928 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2929 2930 /* Workaround for QLA2312 PCI parity error */ 2931 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2932 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2933 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2934 udelay(5); 2935 data = RD_MAILBOX_REG(ha, reg, 0); 2936 barrier(); 2937 } 2938 } else 2939 udelay(10); 2940 2941 if (!cnt) 2942 goto chip_diag_failed; 2943 2944 /* Check product ID of chip */ 2945 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2946 2947 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2948 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2949 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2950 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2951 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2952 mb[3] != PROD_ID_3) { 2953 ql_log(ql_log_warn, vha, 0x0062, 2954 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2955 mb[1], mb[2], mb[3]); 2956 2957 goto chip_diag_failed; 2958 } 2959 ha->product_id[0] = mb[1]; 2960 ha->product_id[1] = mb[2]; 2961 ha->product_id[2] = mb[3]; 2962 ha->product_id[3] = mb[4]; 2963 2964 /* Adjust fw RISC transfer size */ 2965 if (req->length > 1024) 2966 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2967 else 2968 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2969 req->length; 2970 2971 if (IS_QLA2200(ha) && 2972 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2973 /* Limit firmware transfer size with a 2200A */ 2974 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2975 2976 ha->device_type |= DT_ISP2200A; 2977 ha->fw_transfer_size = 128; 2978 } 2979 2980 /* Wrap Incoming Mailboxes Test. */ 2981 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2982 2983 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2984 rval = qla2x00_mbx_reg_test(vha); 2985 if (rval) 2986 ql_log(ql_log_warn, vha, 0x0080, 2987 "Failed mailbox send register test.\n"); 2988 else 2989 /* Flag a successful rval */ 2990 rval = QLA_SUCCESS; 2991 spin_lock_irqsave(&ha->hardware_lock, flags); 2992 2993 chip_diag_failed: 2994 if (rval) 2995 ql_log(ql_log_info, vha, 0x0081, 2996 "Chip diagnostics **** FAILED ****.\n"); 2997 2998 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2999 3000 return (rval); 3001 } 3002 3003 /** 3004 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3005 * @vha: HA context 3006 * 3007 * Returns 0 on success. 3008 */ 3009 int 3010 qla24xx_chip_diag(scsi_qla_host_t *vha) 3011 { 3012 int rval; 3013 struct qla_hw_data *ha = vha->hw; 3014 struct req_que *req = ha->req_q_map[0]; 3015 3016 if (IS_P3P_TYPE(ha)) 3017 return QLA_SUCCESS; 3018 3019 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3020 3021 rval = qla2x00_mbx_reg_test(vha); 3022 if (rval) { 3023 ql_log(ql_log_warn, vha, 0x0082, 3024 "Failed mailbox send register test.\n"); 3025 } else { 3026 /* Flag a successful rval */ 3027 rval = QLA_SUCCESS; 3028 } 3029 3030 return rval; 3031 } 3032 3033 static void 3034 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3035 { 3036 int rval; 3037 dma_addr_t tc_dma; 3038 void *tc; 3039 struct qla_hw_data *ha = vha->hw; 3040 3041 if (!IS_FWI2_CAPABLE(ha)) 3042 return; 3043 3044 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3045 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3046 return; 3047 3048 if (ha->fce) { 3049 ql_dbg(ql_dbg_init, vha, 0x00bd, 3050 "%s: FCE Mem is already allocated.\n", 3051 __func__); 3052 return; 3053 } 3054 3055 /* Allocate memory for Fibre Channel Event Buffer. */ 3056 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3057 GFP_KERNEL); 3058 if (!tc) { 3059 ql_log(ql_log_warn, vha, 0x00be, 3060 "Unable to allocate (%d KB) for FCE.\n", 3061 FCE_SIZE / 1024); 3062 return; 3063 } 3064 3065 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3066 ha->fce_mb, &ha->fce_bufs); 3067 if (rval) { 3068 ql_log(ql_log_warn, vha, 0x00bf, 3069 "Unable to initialize FCE (%d).\n", rval); 3070 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3071 return; 3072 } 3073 3074 ql_dbg(ql_dbg_init, vha, 0x00c0, 3075 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3076 3077 ha->flags.fce_enabled = 1; 3078 ha->fce_dma = tc_dma; 3079 ha->fce = tc; 3080 } 3081 3082 static void 3083 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3084 { 3085 int rval; 3086 dma_addr_t tc_dma; 3087 void *tc; 3088 struct qla_hw_data *ha = vha->hw; 3089 3090 if (!IS_FWI2_CAPABLE(ha)) 3091 return; 3092 3093 if (ha->eft) { 3094 ql_dbg(ql_dbg_init, vha, 0x00bd, 3095 "%s: EFT Mem is already allocated.\n", 3096 __func__); 3097 return; 3098 } 3099 3100 /* Allocate memory for Extended Trace Buffer. */ 3101 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3102 GFP_KERNEL); 3103 if (!tc) { 3104 ql_log(ql_log_warn, vha, 0x00c1, 3105 "Unable to allocate (%d KB) for EFT.\n", 3106 EFT_SIZE / 1024); 3107 return; 3108 } 3109 3110 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3111 if (rval) { 3112 ql_log(ql_log_warn, vha, 0x00c2, 3113 "Unable to initialize EFT (%d).\n", rval); 3114 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3115 return; 3116 } 3117 3118 ql_dbg(ql_dbg_init, vha, 0x00c3, 3119 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3120 3121 ha->eft_dma = tc_dma; 3122 ha->eft = tc; 3123 } 3124 3125 static void 3126 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3127 { 3128 qla2x00_init_fce_trace(vha); 3129 qla2x00_init_eft_trace(vha); 3130 } 3131 3132 void 3133 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3134 { 3135 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3136 eft_size, fce_size, mq_size; 3137 struct qla_hw_data *ha = vha->hw; 3138 struct req_que *req = ha->req_q_map[0]; 3139 struct rsp_que *rsp = ha->rsp_q_map[0]; 3140 struct qla2xxx_fw_dump *fw_dump; 3141 3142 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3143 req_q_size = rsp_q_size = 0; 3144 3145 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3146 fixed_size = sizeof(struct qla2100_fw_dump); 3147 } else if (IS_QLA23XX(ha)) { 3148 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3149 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3150 sizeof(uint16_t); 3151 } else if (IS_FWI2_CAPABLE(ha)) { 3152 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3153 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3154 else if (IS_QLA81XX(ha)) 3155 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3156 else if (IS_QLA25XX(ha)) 3157 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3158 else 3159 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3160 3161 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3162 sizeof(uint32_t); 3163 if (ha->mqenable) { 3164 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && 3165 !IS_QLA28XX(ha)) 3166 mq_size = sizeof(struct qla2xxx_mq_chain); 3167 /* 3168 * Allocate maximum buffer size for all queues - Q0. 3169 * Resizing must be done at end-of-dump processing. 3170 */ 3171 mq_size += (ha->max_req_queues - 1) * 3172 (req->length * sizeof(request_t)); 3173 mq_size += (ha->max_rsp_queues - 1) * 3174 (rsp->length * sizeof(response_t)); 3175 } 3176 if (ha->tgt.atio_ring) 3177 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3178 3179 qla2x00_init_fce_trace(vha); 3180 if (ha->fce) 3181 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3182 qla2x00_init_eft_trace(vha); 3183 if (ha->eft) 3184 eft_size = EFT_SIZE; 3185 } 3186 3187 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3188 struct fwdt *fwdt = ha->fwdt; 3189 uint j; 3190 3191 for (j = 0; j < 2; j++, fwdt++) { 3192 if (!fwdt->template) { 3193 ql_log(ql_log_warn, vha, 0x00ba, 3194 "-> fwdt%u no template\n", j); 3195 continue; 3196 } 3197 ql_dbg(ql_dbg_init, vha, 0x00fa, 3198 "-> fwdt%u calculating fwdump size...\n", j); 3199 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3200 vha, fwdt->template); 3201 ql_dbg(ql_dbg_init, vha, 0x00fa, 3202 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3203 j, fwdt->dump_size); 3204 dump_size += fwdt->dump_size; 3205 } 3206 } else { 3207 req_q_size = req->length * sizeof(request_t); 3208 rsp_q_size = rsp->length * sizeof(response_t); 3209 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3210 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3211 + eft_size; 3212 ha->chain_offset = dump_size; 3213 dump_size += mq_size + fce_size; 3214 if (ha->exchoffld_buf) 3215 dump_size += sizeof(struct qla2xxx_offld_chain) + 3216 ha->exchoffld_size; 3217 if (ha->exlogin_buf) 3218 dump_size += sizeof(struct qla2xxx_offld_chain) + 3219 ha->exlogin_size; 3220 } 3221 3222 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3223 3224 ql_dbg(ql_dbg_init, vha, 0x00c5, 3225 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3226 __func__, dump_size, ha->fw_dump_len, 3227 ha->fw_dump_alloc_len); 3228 3229 fw_dump = vmalloc(dump_size); 3230 if (!fw_dump) { 3231 ql_log(ql_log_warn, vha, 0x00c4, 3232 "Unable to allocate (%d KB) for firmware dump.\n", 3233 dump_size / 1024); 3234 } else { 3235 mutex_lock(&ha->optrom_mutex); 3236 if (ha->fw_dumped) { 3237 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3238 vfree(ha->fw_dump); 3239 ha->fw_dump = fw_dump; 3240 ha->fw_dump_alloc_len = dump_size; 3241 ql_dbg(ql_dbg_init, vha, 0x00c5, 3242 "Re-Allocated (%d KB) and save firmware dump.\n", 3243 dump_size / 1024); 3244 } else { 3245 if (ha->fw_dump) 3246 vfree(ha->fw_dump); 3247 ha->fw_dump = fw_dump; 3248 3249 ha->fw_dump_len = ha->fw_dump_alloc_len = 3250 dump_size; 3251 ql_dbg(ql_dbg_init, vha, 0x00c5, 3252 "Allocated (%d KB) for firmware dump.\n", 3253 dump_size / 1024); 3254 3255 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3256 mutex_unlock(&ha->optrom_mutex); 3257 return; 3258 } 3259 3260 ha->fw_dump->signature[0] = 'Q'; 3261 ha->fw_dump->signature[1] = 'L'; 3262 ha->fw_dump->signature[2] = 'G'; 3263 ha->fw_dump->signature[3] = 'C'; 3264 ha->fw_dump->version = htonl(1); 3265 3266 ha->fw_dump->fixed_size = htonl(fixed_size); 3267 ha->fw_dump->mem_size = htonl(mem_size); 3268 ha->fw_dump->req_q_size = htonl(req_q_size); 3269 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3270 3271 ha->fw_dump->eft_size = htonl(eft_size); 3272 ha->fw_dump->eft_addr_l = 3273 htonl(LSD(ha->eft_dma)); 3274 ha->fw_dump->eft_addr_h = 3275 htonl(MSD(ha->eft_dma)); 3276 3277 ha->fw_dump->header_size = 3278 htonl(offsetof 3279 (struct qla2xxx_fw_dump, isp)); 3280 } 3281 mutex_unlock(&ha->optrom_mutex); 3282 } 3283 } 3284 } 3285 3286 static int 3287 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3288 { 3289 #define MPS_MASK 0xe0 3290 int rval; 3291 uint16_t dc; 3292 uint32_t dw; 3293 3294 if (!IS_QLA81XX(vha->hw)) 3295 return QLA_SUCCESS; 3296 3297 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3298 if (rval != QLA_SUCCESS) { 3299 ql_log(ql_log_warn, vha, 0x0105, 3300 "Unable to acquire semaphore.\n"); 3301 goto done; 3302 } 3303 3304 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3305 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3306 if (rval != QLA_SUCCESS) { 3307 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3308 goto done_release; 3309 } 3310 3311 dc &= MPS_MASK; 3312 if (dc == (dw & MPS_MASK)) 3313 goto done_release; 3314 3315 dw &= ~MPS_MASK; 3316 dw |= dc; 3317 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3318 if (rval != QLA_SUCCESS) { 3319 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3320 } 3321 3322 done_release: 3323 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3324 if (rval != QLA_SUCCESS) { 3325 ql_log(ql_log_warn, vha, 0x006d, 3326 "Unable to release semaphore.\n"); 3327 } 3328 3329 done: 3330 return rval; 3331 } 3332 3333 int 3334 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3335 { 3336 /* Don't try to reallocate the array */ 3337 if (req->outstanding_cmds) 3338 return QLA_SUCCESS; 3339 3340 if (!IS_FWI2_CAPABLE(ha)) 3341 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3342 else { 3343 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3344 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3345 else 3346 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3347 } 3348 3349 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3350 sizeof(srb_t *), 3351 GFP_KERNEL); 3352 3353 if (!req->outstanding_cmds) { 3354 /* 3355 * Try to allocate a minimal size just so we can get through 3356 * initialization. 3357 */ 3358 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3359 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3360 sizeof(srb_t *), 3361 GFP_KERNEL); 3362 3363 if (!req->outstanding_cmds) { 3364 ql_log(ql_log_fatal, NULL, 0x0126, 3365 "Failed to allocate memory for " 3366 "outstanding_cmds for req_que %p.\n", req); 3367 req->num_outstanding_cmds = 0; 3368 return QLA_FUNCTION_FAILED; 3369 } 3370 } 3371 3372 return QLA_SUCCESS; 3373 } 3374 3375 #define PRINT_FIELD(_field, _flag, _str) { \ 3376 if (a0->_field & _flag) {\ 3377 if (p) {\ 3378 strcat(ptr, "|");\ 3379 ptr++;\ 3380 leftover--;\ 3381 } \ 3382 len = snprintf(ptr, leftover, "%s", _str); \ 3383 p = 1;\ 3384 leftover -= len;\ 3385 ptr += len; \ 3386 } \ 3387 } 3388 3389 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3390 { 3391 #define STR_LEN 64 3392 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3393 u8 str[STR_LEN], *ptr, p; 3394 int leftover, len; 3395 3396 memset(str, 0, STR_LEN); 3397 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3398 ql_dbg(ql_dbg_init, vha, 0x015a, 3399 "SFP MFG Name: %s\n", str); 3400 3401 memset(str, 0, STR_LEN); 3402 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3403 ql_dbg(ql_dbg_init, vha, 0x015c, 3404 "SFP Part Name: %s\n", str); 3405 3406 /* media */ 3407 memset(str, 0, STR_LEN); 3408 ptr = str; 3409 leftover = STR_LEN; 3410 p = len = 0; 3411 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3412 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3413 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3414 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3415 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3416 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3417 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3418 ql_dbg(ql_dbg_init, vha, 0x0160, 3419 "SFP Media: %s\n", str); 3420 3421 /* link length */ 3422 memset(str, 0, STR_LEN); 3423 ptr = str; 3424 leftover = STR_LEN; 3425 p = len = 0; 3426 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3427 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3428 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3429 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3430 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3431 ql_dbg(ql_dbg_init, vha, 0x0196, 3432 "SFP Link Length: %s\n", str); 3433 3434 memset(str, 0, STR_LEN); 3435 ptr = str; 3436 leftover = STR_LEN; 3437 p = len = 0; 3438 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3439 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3440 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3441 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3442 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3443 ql_dbg(ql_dbg_init, vha, 0x016e, 3444 "SFP FC Link Tech: %s\n", str); 3445 3446 if (a0->length_km) 3447 ql_dbg(ql_dbg_init, vha, 0x016f, 3448 "SFP Distant: %d km\n", a0->length_km); 3449 if (a0->length_100m) 3450 ql_dbg(ql_dbg_init, vha, 0x0170, 3451 "SFP Distant: %d m\n", a0->length_100m*100); 3452 if (a0->length_50um_10m) 3453 ql_dbg(ql_dbg_init, vha, 0x0189, 3454 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3455 if (a0->length_62um_10m) 3456 ql_dbg(ql_dbg_init, vha, 0x018a, 3457 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3458 if (a0->length_om4_10m) 3459 ql_dbg(ql_dbg_init, vha, 0x0194, 3460 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3461 if (a0->length_om3_10m) 3462 ql_dbg(ql_dbg_init, vha, 0x0195, 3463 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3464 } 3465 3466 3467 /* 3468 * Return Code: 3469 * QLA_SUCCESS: no action 3470 * QLA_INTERFACE_ERROR: SFP is not there. 3471 * QLA_FUNCTION_FAILED: detected New SFP 3472 */ 3473 int 3474 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3475 { 3476 int rc = QLA_SUCCESS; 3477 struct sff_8247_a0 *a; 3478 struct qla_hw_data *ha = vha->hw; 3479 3480 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3481 goto out; 3482 3483 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3484 if (rc) 3485 goto out; 3486 3487 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3488 qla2xxx_print_sfp_info(vha); 3489 3490 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3491 /* long range */ 3492 ha->flags.detected_lr_sfp = 1; 3493 3494 if (a->length_km > 5 || a->length_100m > 50) 3495 ha->long_range_distance = LR_DISTANCE_10K; 3496 else 3497 ha->long_range_distance = LR_DISTANCE_5K; 3498 3499 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3500 ql_dbg(ql_dbg_async, vha, 0x507b, 3501 "Detected Long Range SFP.\n"); 3502 } else { 3503 /* short range */ 3504 ha->flags.detected_lr_sfp = 0; 3505 if (ha->flags.using_lr_setting) 3506 ql_dbg(ql_dbg_async, vha, 0x5084, 3507 "Detected Short Range SFP.\n"); 3508 } 3509 3510 if (!vha->flags.init_done) 3511 rc = QLA_SUCCESS; 3512 out: 3513 return rc; 3514 } 3515 3516 /** 3517 * qla2x00_setup_chip() - Load and start RISC firmware. 3518 * @vha: HA context 3519 * 3520 * Returns 0 on success. 3521 */ 3522 static int 3523 qla2x00_setup_chip(scsi_qla_host_t *vha) 3524 { 3525 int rval; 3526 uint32_t srisc_address = 0; 3527 struct qla_hw_data *ha = vha->hw; 3528 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3529 unsigned long flags; 3530 uint16_t fw_major_version; 3531 3532 if (IS_P3P_TYPE(ha)) { 3533 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3534 if (rval == QLA_SUCCESS) { 3535 qla2x00_stop_firmware(vha); 3536 goto enable_82xx_npiv; 3537 } else 3538 goto failed; 3539 } 3540 3541 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3542 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3543 spin_lock_irqsave(&ha->hardware_lock, flags); 3544 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3545 RD_REG_WORD(®->hccr); 3546 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3547 } 3548 3549 qla81xx_mpi_sync(vha); 3550 3551 /* Load firmware sequences */ 3552 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3553 if (rval == QLA_SUCCESS) { 3554 ql_dbg(ql_dbg_init, vha, 0x00c9, 3555 "Verifying Checksum of loaded RISC code.\n"); 3556 3557 rval = qla2x00_verify_checksum(vha, srisc_address); 3558 if (rval == QLA_SUCCESS) { 3559 /* Start firmware execution. */ 3560 ql_dbg(ql_dbg_init, vha, 0x00ca, 3561 "Starting firmware.\n"); 3562 3563 if (ql2xexlogins) 3564 ha->flags.exlogins_enabled = 1; 3565 3566 if (qla_is_exch_offld_enabled(vha)) 3567 ha->flags.exchoffld_enabled = 1; 3568 3569 rval = qla2x00_execute_fw(vha, srisc_address); 3570 /* Retrieve firmware information. */ 3571 if (rval == QLA_SUCCESS) { 3572 qla24xx_detect_sfp(vha); 3573 3574 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3575 IS_QLA28XX(ha)) && 3576 (ha->zio_mode == QLA_ZIO_MODE_6)) 3577 qla27xx_set_zio_threshold(vha, 3578 ha->last_zio_threshold); 3579 3580 rval = qla2x00_set_exlogins_buffer(vha); 3581 if (rval != QLA_SUCCESS) 3582 goto failed; 3583 3584 rval = qla2x00_set_exchoffld_buffer(vha); 3585 if (rval != QLA_SUCCESS) 3586 goto failed; 3587 3588 enable_82xx_npiv: 3589 fw_major_version = ha->fw_major_version; 3590 if (IS_P3P_TYPE(ha)) 3591 qla82xx_check_md_needed(vha); 3592 else 3593 rval = qla2x00_get_fw_version(vha); 3594 if (rval != QLA_SUCCESS) 3595 goto failed; 3596 ha->flags.npiv_supported = 0; 3597 if (IS_QLA2XXX_MIDTYPE(ha) && 3598 (ha->fw_attributes & BIT_2)) { 3599 ha->flags.npiv_supported = 1; 3600 if ((!ha->max_npiv_vports) || 3601 ((ha->max_npiv_vports + 1) % 3602 MIN_MULTI_ID_FABRIC)) 3603 ha->max_npiv_vports = 3604 MIN_MULTI_ID_FABRIC - 1; 3605 } 3606 qla2x00_get_resource_cnts(vha); 3607 3608 /* 3609 * Allocate the array of outstanding commands 3610 * now that we know the firmware resources. 3611 */ 3612 rval = qla2x00_alloc_outstanding_cmds(ha, 3613 vha->req); 3614 if (rval != QLA_SUCCESS) 3615 goto failed; 3616 3617 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3618 qla2x00_alloc_offload_mem(vha); 3619 3620 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3621 qla2x00_alloc_fw_dump(vha); 3622 3623 } else { 3624 goto failed; 3625 } 3626 } else { 3627 ql_log(ql_log_fatal, vha, 0x00cd, 3628 "ISP Firmware failed checksum.\n"); 3629 goto failed; 3630 } 3631 } else 3632 goto failed; 3633 3634 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3635 /* Enable proper parity. */ 3636 spin_lock_irqsave(&ha->hardware_lock, flags); 3637 if (IS_QLA2300(ha)) 3638 /* SRAM parity */ 3639 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3640 else 3641 /* SRAM, Instruction RAM and GP RAM parity */ 3642 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3643 RD_REG_WORD(®->hccr); 3644 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3645 } 3646 3647 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3648 ha->flags.fac_supported = 1; 3649 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3650 uint32_t size; 3651 3652 rval = qla81xx_fac_get_sector_size(vha, &size); 3653 if (rval == QLA_SUCCESS) { 3654 ha->flags.fac_supported = 1; 3655 ha->fdt_block_size = size << 2; 3656 } else { 3657 ql_log(ql_log_warn, vha, 0x00ce, 3658 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3659 ha->fw_major_version, ha->fw_minor_version, 3660 ha->fw_subminor_version); 3661 3662 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3663 IS_QLA28XX(ha)) { 3664 ha->flags.fac_supported = 0; 3665 rval = QLA_SUCCESS; 3666 } 3667 } 3668 } 3669 failed: 3670 if (rval) { 3671 ql_log(ql_log_fatal, vha, 0x00cf, 3672 "Setup chip ****FAILED****.\n"); 3673 } 3674 3675 return (rval); 3676 } 3677 3678 /** 3679 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3680 * @rsp: response queue 3681 * 3682 * Beginning of request ring has initialization control block already built 3683 * by nvram config routine. 3684 * 3685 * Returns 0 on success. 3686 */ 3687 void 3688 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3689 { 3690 uint16_t cnt; 3691 response_t *pkt; 3692 3693 rsp->ring_ptr = rsp->ring; 3694 rsp->ring_index = 0; 3695 rsp->status_srb = NULL; 3696 pkt = rsp->ring_ptr; 3697 for (cnt = 0; cnt < rsp->length; cnt++) { 3698 pkt->signature = RESPONSE_PROCESSED; 3699 pkt++; 3700 } 3701 } 3702 3703 /** 3704 * qla2x00_update_fw_options() - Read and process firmware options. 3705 * @vha: HA context 3706 * 3707 * Returns 0 on success. 3708 */ 3709 void 3710 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3711 { 3712 uint16_t swing, emphasis, tx_sens, rx_sens; 3713 struct qla_hw_data *ha = vha->hw; 3714 3715 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3716 qla2x00_get_fw_options(vha, ha->fw_options); 3717 3718 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3719 return; 3720 3721 /* Serial Link options. */ 3722 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3723 "Serial link options.\n"); 3724 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3725 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 3726 3727 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3728 if (ha->fw_seriallink_options[3] & BIT_2) { 3729 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3730 3731 /* 1G settings */ 3732 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3733 emphasis = (ha->fw_seriallink_options[2] & 3734 (BIT_4 | BIT_3)) >> 3; 3735 tx_sens = ha->fw_seriallink_options[0] & 3736 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3737 rx_sens = (ha->fw_seriallink_options[0] & 3738 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3739 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3740 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3741 if (rx_sens == 0x0) 3742 rx_sens = 0x3; 3743 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3744 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3745 ha->fw_options[10] |= BIT_5 | 3746 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3747 (tx_sens & (BIT_1 | BIT_0)); 3748 3749 /* 2G settings */ 3750 swing = (ha->fw_seriallink_options[2] & 3751 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3752 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3753 tx_sens = ha->fw_seriallink_options[1] & 3754 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3755 rx_sens = (ha->fw_seriallink_options[1] & 3756 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3757 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3758 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3759 if (rx_sens == 0x0) 3760 rx_sens = 0x3; 3761 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3762 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3763 ha->fw_options[11] |= BIT_5 | 3764 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3765 (tx_sens & (BIT_1 | BIT_0)); 3766 } 3767 3768 /* FCP2 options. */ 3769 /* Return command IOCBs without waiting for an ABTS to complete. */ 3770 ha->fw_options[3] |= BIT_13; 3771 3772 /* LED scheme. */ 3773 if (ha->flags.enable_led_scheme) 3774 ha->fw_options[2] |= BIT_12; 3775 3776 /* Detect ISP6312. */ 3777 if (IS_QLA6312(ha)) 3778 ha->fw_options[2] |= BIT_13; 3779 3780 /* Set Retry FLOGI in case of P2P connection */ 3781 if (ha->operating_mode == P2P) { 3782 ha->fw_options[2] |= BIT_3; 3783 ql_dbg(ql_dbg_disc, vha, 0x2100, 3784 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3785 __func__, ha->fw_options[2]); 3786 } 3787 3788 /* Update firmware options. */ 3789 qla2x00_set_fw_options(vha, ha->fw_options); 3790 } 3791 3792 void 3793 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3794 { 3795 int rval; 3796 struct qla_hw_data *ha = vha->hw; 3797 3798 if (IS_P3P_TYPE(ha)) 3799 return; 3800 3801 /* Hold status IOCBs until ABTS response received. */ 3802 if (ql2xfwholdabts) 3803 ha->fw_options[3] |= BIT_12; 3804 3805 /* Set Retry FLOGI in case of P2P connection */ 3806 if (ha->operating_mode == P2P) { 3807 ha->fw_options[2] |= BIT_3; 3808 ql_dbg(ql_dbg_disc, vha, 0x2101, 3809 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3810 __func__, ha->fw_options[2]); 3811 } 3812 3813 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3814 if (ql2xmvasynctoatio && 3815 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 3816 if (qla_tgt_mode_enabled(vha) || 3817 qla_dual_mode_enabled(vha)) 3818 ha->fw_options[2] |= BIT_11; 3819 else 3820 ha->fw_options[2] &= ~BIT_11; 3821 } 3822 3823 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3824 IS_QLA28XX(ha)) { 3825 /* 3826 * Tell FW to track each exchange to prevent 3827 * driver from using stale exchange. 3828 */ 3829 if (qla_tgt_mode_enabled(vha) || 3830 qla_dual_mode_enabled(vha)) 3831 ha->fw_options[2] |= BIT_4; 3832 else 3833 ha->fw_options[2] &= ~BIT_4; 3834 3835 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3836 if (qla2xuseresexchforels) 3837 ha->fw_options[2] |= BIT_8; 3838 else 3839 ha->fw_options[2] &= ~BIT_8; 3840 } 3841 3842 ql_dbg(ql_dbg_init, vha, 0x00e8, 3843 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3844 __func__, ha->fw_options[1], ha->fw_options[2], 3845 ha->fw_options[3], vha->host->active_mode); 3846 3847 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3848 qla2x00_set_fw_options(vha, ha->fw_options); 3849 3850 /* Update Serial Link options. */ 3851 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3852 return; 3853 3854 rval = qla2x00_set_serdes_params(vha, 3855 le16_to_cpu(ha->fw_seriallink_options24[1]), 3856 le16_to_cpu(ha->fw_seriallink_options24[2]), 3857 le16_to_cpu(ha->fw_seriallink_options24[3])); 3858 if (rval != QLA_SUCCESS) { 3859 ql_log(ql_log_warn, vha, 0x0104, 3860 "Unable to update Serial Link options (%x).\n", rval); 3861 } 3862 } 3863 3864 void 3865 qla2x00_config_rings(struct scsi_qla_host *vha) 3866 { 3867 struct qla_hw_data *ha = vha->hw; 3868 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3869 struct req_que *req = ha->req_q_map[0]; 3870 struct rsp_que *rsp = ha->rsp_q_map[0]; 3871 3872 /* Setup ring parameters in initialization control block. */ 3873 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3874 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3875 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3876 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3877 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 3878 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 3879 3880 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3881 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3882 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3883 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3884 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3885 } 3886 3887 void 3888 qla24xx_config_rings(struct scsi_qla_host *vha) 3889 { 3890 struct qla_hw_data *ha = vha->hw; 3891 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3892 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3893 struct qla_msix_entry *msix; 3894 struct init_cb_24xx *icb; 3895 uint16_t rid = 0; 3896 struct req_que *req = ha->req_q_map[0]; 3897 struct rsp_que *rsp = ha->rsp_q_map[0]; 3898 3899 /* Setup ring parameters in initialization control block. */ 3900 icb = (struct init_cb_24xx *)ha->init_cb; 3901 icb->request_q_outpointer = cpu_to_le16(0); 3902 icb->response_q_inpointer = cpu_to_le16(0); 3903 icb->request_q_length = cpu_to_le16(req->length); 3904 icb->response_q_length = cpu_to_le16(rsp->length); 3905 put_unaligned_le64(req->dma, &icb->request_q_address); 3906 put_unaligned_le64(rsp->dma, &icb->response_q_address); 3907 3908 /* Setup ATIO queue dma pointers for target mode */ 3909 icb->atio_q_inpointer = cpu_to_le16(0); 3910 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3911 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 3912 3913 if (IS_SHADOW_REG_CAPABLE(ha)) 3914 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3915 3916 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3917 IS_QLA28XX(ha)) { 3918 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3919 icb->rid = cpu_to_le16(rid); 3920 if (ha->flags.msix_enabled) { 3921 msix = &ha->msix_entries[1]; 3922 ql_dbg(ql_dbg_init, vha, 0x0019, 3923 "Registering vector 0x%x for base que.\n", 3924 msix->entry); 3925 icb->msix = cpu_to_le16(msix->entry); 3926 } 3927 /* Use alternate PCI bus number */ 3928 if (MSB(rid)) 3929 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3930 /* Use alternate PCI devfn */ 3931 if (LSB(rid)) 3932 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3933 3934 /* Use Disable MSIX Handshake mode for capable adapters */ 3935 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3936 (ha->flags.msix_enabled)) { 3937 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3938 ha->flags.disable_msix_handshake = 1; 3939 ql_dbg(ql_dbg_init, vha, 0x00fe, 3940 "MSIX Handshake Disable Mode turned on.\n"); 3941 } else { 3942 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3943 } 3944 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3945 3946 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3947 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3948 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3949 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3950 } else { 3951 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3952 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3953 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3954 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3955 } 3956 3957 qlt_24xx_config_rings(vha); 3958 3959 /* If the user has configured the speed, set it here */ 3960 if (ha->set_data_rate) { 3961 ql_dbg(ql_dbg_init, vha, 0x00fd, 3962 "Speed set by user : %s Gbps \n", 3963 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 3964 icb->firmware_options_3 = (ha->set_data_rate << 13); 3965 } 3966 3967 /* PCI posting */ 3968 RD_REG_DWORD(&ioreg->hccr); 3969 } 3970 3971 /** 3972 * qla2x00_init_rings() - Initializes firmware. 3973 * @vha: HA context 3974 * 3975 * Beginning of request ring has initialization control block already built 3976 * by nvram config routine. 3977 * 3978 * Returns 0 on success. 3979 */ 3980 int 3981 qla2x00_init_rings(scsi_qla_host_t *vha) 3982 { 3983 int rval; 3984 unsigned long flags = 0; 3985 int cnt, que; 3986 struct qla_hw_data *ha = vha->hw; 3987 struct req_que *req; 3988 struct rsp_que *rsp; 3989 struct mid_init_cb_24xx *mid_init_cb = 3990 (struct mid_init_cb_24xx *) ha->init_cb; 3991 3992 spin_lock_irqsave(&ha->hardware_lock, flags); 3993 3994 /* Clear outstanding commands array. */ 3995 for (que = 0; que < ha->max_req_queues; que++) { 3996 req = ha->req_q_map[que]; 3997 if (!req || !test_bit(que, ha->req_qid_map)) 3998 continue; 3999 req->out_ptr = (void *)(req->ring + req->length); 4000 *req->out_ptr = 0; 4001 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4002 req->outstanding_cmds[cnt] = NULL; 4003 4004 req->current_outstanding_cmd = 1; 4005 4006 /* Initialize firmware. */ 4007 req->ring_ptr = req->ring; 4008 req->ring_index = 0; 4009 req->cnt = req->length; 4010 } 4011 4012 for (que = 0; que < ha->max_rsp_queues; que++) { 4013 rsp = ha->rsp_q_map[que]; 4014 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4015 continue; 4016 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 4017 *rsp->in_ptr = 0; 4018 /* Initialize response queue entries */ 4019 if (IS_QLAFX00(ha)) 4020 qlafx00_init_response_q_entries(rsp); 4021 else 4022 qla2x00_init_response_q_entries(rsp); 4023 } 4024 4025 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4026 ha->tgt.atio_ring_index = 0; 4027 /* Initialize ATIO queue entries */ 4028 qlt_init_atio_q_entries(vha); 4029 4030 ha->isp_ops->config_rings(vha); 4031 4032 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4033 4034 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 4035 4036 if (IS_QLAFX00(ha)) { 4037 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4038 goto next_check; 4039 } 4040 4041 /* Update any ISP specific firmware options before initialization. */ 4042 ha->isp_ops->update_fw_options(vha); 4043 4044 if (ha->flags.npiv_supported) { 4045 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4046 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4047 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4048 } 4049 4050 if (IS_FWI2_CAPABLE(ha)) { 4051 mid_init_cb->options = cpu_to_le16(BIT_1); 4052 mid_init_cb->init_cb.execution_throttle = 4053 cpu_to_le16(ha->cur_fw_xcb_count); 4054 ha->flags.dport_enabled = 4055 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 4056 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4057 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4058 /* FA-WWPN Status */ 4059 ha->flags.fawwpn_enabled = 4060 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 4061 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4062 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4063 } 4064 4065 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4066 next_check: 4067 if (rval) { 4068 ql_log(ql_log_fatal, vha, 0x00d2, 4069 "Init Firmware **** FAILED ****.\n"); 4070 } else { 4071 ql_dbg(ql_dbg_init, vha, 0x00d3, 4072 "Init Firmware -- success.\n"); 4073 QLA_FW_STARTED(ha); 4074 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4075 } 4076 4077 return (rval); 4078 } 4079 4080 /** 4081 * qla2x00_fw_ready() - Waits for firmware ready. 4082 * @vha: HA context 4083 * 4084 * Returns 0 on success. 4085 */ 4086 static int 4087 qla2x00_fw_ready(scsi_qla_host_t *vha) 4088 { 4089 int rval; 4090 unsigned long wtime, mtime, cs84xx_time; 4091 uint16_t min_wait; /* Minimum wait time if loop is down */ 4092 uint16_t wait_time; /* Wait time if loop is coming ready */ 4093 uint16_t state[6]; 4094 struct qla_hw_data *ha = vha->hw; 4095 4096 if (IS_QLAFX00(vha->hw)) 4097 return qlafx00_fw_ready(vha); 4098 4099 rval = QLA_SUCCESS; 4100 4101 /* Time to wait for loop down */ 4102 if (IS_P3P_TYPE(ha)) 4103 min_wait = 30; 4104 else 4105 min_wait = 20; 4106 4107 /* 4108 * Firmware should take at most one RATOV to login, plus 5 seconds for 4109 * our own processing. 4110 */ 4111 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4112 wait_time = min_wait; 4113 } 4114 4115 /* Min wait time if loop down */ 4116 mtime = jiffies + (min_wait * HZ); 4117 4118 /* wait time before firmware ready */ 4119 wtime = jiffies + (wait_time * HZ); 4120 4121 /* Wait for ISP to finish LIP */ 4122 if (!vha->flags.init_done) 4123 ql_log(ql_log_info, vha, 0x801e, 4124 "Waiting for LIP to complete.\n"); 4125 4126 do { 4127 memset(state, -1, sizeof(state)); 4128 rval = qla2x00_get_firmware_state(vha, state); 4129 if (rval == QLA_SUCCESS) { 4130 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4131 vha->device_flags &= ~DFLG_NO_CABLE; 4132 } 4133 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4134 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4135 "fw_state=%x 84xx=%x.\n", state[0], 4136 state[2]); 4137 if ((state[2] & FSTATE_LOGGED_IN) && 4138 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4139 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4140 "Sending verify iocb.\n"); 4141 4142 cs84xx_time = jiffies; 4143 rval = qla84xx_init_chip(vha); 4144 if (rval != QLA_SUCCESS) { 4145 ql_log(ql_log_warn, 4146 vha, 0x8007, 4147 "Init chip failed.\n"); 4148 break; 4149 } 4150 4151 /* Add time taken to initialize. */ 4152 cs84xx_time = jiffies - cs84xx_time; 4153 wtime += cs84xx_time; 4154 mtime += cs84xx_time; 4155 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4156 "Increasing wait time by %ld. " 4157 "New time %ld.\n", cs84xx_time, 4158 wtime); 4159 } 4160 } else if (state[0] == FSTATE_READY) { 4161 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4162 "F/W Ready - OK.\n"); 4163 4164 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4165 &ha->login_timeout, &ha->r_a_tov); 4166 4167 rval = QLA_SUCCESS; 4168 break; 4169 } 4170 4171 rval = QLA_FUNCTION_FAILED; 4172 4173 if (atomic_read(&vha->loop_down_timer) && 4174 state[0] != FSTATE_READY) { 4175 /* Loop down. Timeout on min_wait for states 4176 * other than Wait for Login. 4177 */ 4178 if (time_after_eq(jiffies, mtime)) { 4179 ql_log(ql_log_info, vha, 0x8038, 4180 "Cable is unplugged...\n"); 4181 4182 vha->device_flags |= DFLG_NO_CABLE; 4183 break; 4184 } 4185 } 4186 } else { 4187 /* Mailbox cmd failed. Timeout on min_wait. */ 4188 if (time_after_eq(jiffies, mtime) || 4189 ha->flags.isp82xx_fw_hung) 4190 break; 4191 } 4192 4193 if (time_after_eq(jiffies, wtime)) 4194 break; 4195 4196 /* Delay for a while */ 4197 msleep(500); 4198 } while (1); 4199 4200 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4201 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4202 state[1], state[2], state[3], state[4], state[5], jiffies); 4203 4204 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4205 ql_log(ql_log_warn, vha, 0x803b, 4206 "Firmware ready **** FAILED ****.\n"); 4207 } 4208 4209 return (rval); 4210 } 4211 4212 /* 4213 * qla2x00_configure_hba 4214 * Setup adapter context. 4215 * 4216 * Input: 4217 * ha = adapter state pointer. 4218 * 4219 * Returns: 4220 * 0 = success 4221 * 4222 * Context: 4223 * Kernel context. 4224 */ 4225 static int 4226 qla2x00_configure_hba(scsi_qla_host_t *vha) 4227 { 4228 int rval; 4229 uint16_t loop_id; 4230 uint16_t topo; 4231 uint16_t sw_cap; 4232 uint8_t al_pa; 4233 uint8_t area; 4234 uint8_t domain; 4235 char connect_type[22]; 4236 struct qla_hw_data *ha = vha->hw; 4237 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4238 port_id_t id; 4239 unsigned long flags; 4240 4241 /* Get host addresses. */ 4242 rval = qla2x00_get_adapter_id(vha, 4243 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4244 if (rval != QLA_SUCCESS) { 4245 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4246 IS_CNA_CAPABLE(ha) || 4247 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4248 ql_dbg(ql_dbg_disc, vha, 0x2008, 4249 "Loop is in a transition state.\n"); 4250 } else { 4251 ql_log(ql_log_warn, vha, 0x2009, 4252 "Unable to get host loop ID.\n"); 4253 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4254 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4255 ql_log(ql_log_warn, vha, 0x1151, 4256 "Doing link init.\n"); 4257 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4258 return rval; 4259 } 4260 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4261 } 4262 return (rval); 4263 } 4264 4265 if (topo == 4) { 4266 ql_log(ql_log_info, vha, 0x200a, 4267 "Cannot get topology - retrying.\n"); 4268 return (QLA_FUNCTION_FAILED); 4269 } 4270 4271 vha->loop_id = loop_id; 4272 4273 /* initialize */ 4274 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4275 ha->operating_mode = LOOP; 4276 ha->switch_cap = 0; 4277 4278 switch (topo) { 4279 case 0: 4280 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4281 ha->current_topology = ISP_CFG_NL; 4282 strcpy(connect_type, "(Loop)"); 4283 break; 4284 4285 case 1: 4286 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4287 ha->switch_cap = sw_cap; 4288 ha->current_topology = ISP_CFG_FL; 4289 strcpy(connect_type, "(FL_Port)"); 4290 break; 4291 4292 case 2: 4293 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4294 ha->operating_mode = P2P; 4295 ha->current_topology = ISP_CFG_N; 4296 strcpy(connect_type, "(N_Port-to-N_Port)"); 4297 break; 4298 4299 case 3: 4300 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4301 ha->switch_cap = sw_cap; 4302 ha->operating_mode = P2P; 4303 ha->current_topology = ISP_CFG_F; 4304 strcpy(connect_type, "(F_Port)"); 4305 break; 4306 4307 default: 4308 ql_dbg(ql_dbg_disc, vha, 0x200f, 4309 "HBA in unknown topology %x, using NL.\n", topo); 4310 ha->current_topology = ISP_CFG_NL; 4311 strcpy(connect_type, "(Loop)"); 4312 break; 4313 } 4314 4315 /* Save Host port and loop ID. */ 4316 /* byte order - Big Endian */ 4317 id.b.domain = domain; 4318 id.b.area = area; 4319 id.b.al_pa = al_pa; 4320 id.b.rsvd_1 = 0; 4321 spin_lock_irqsave(&ha->hardware_lock, flags); 4322 if (!(topo == 2 && ha->flags.n2n_bigger)) 4323 qlt_update_host_map(vha, id); 4324 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4325 4326 if (!vha->flags.init_done) 4327 ql_log(ql_log_info, vha, 0x2010, 4328 "Topology - %s, Host Loop address 0x%x.\n", 4329 connect_type, vha->loop_id); 4330 4331 return(rval); 4332 } 4333 4334 inline void 4335 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4336 const char *def) 4337 { 4338 char *st, *en; 4339 uint16_t index; 4340 uint64_t zero[2] = { 0 }; 4341 struct qla_hw_data *ha = vha->hw; 4342 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4343 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4344 4345 if (len > sizeof(zero)) 4346 len = sizeof(zero); 4347 if (memcmp(model, &zero, len) != 0) { 4348 memcpy(ha->model_number, model, len); 4349 st = en = ha->model_number; 4350 en += len - 1; 4351 while (en > st) { 4352 if (*en != 0x20 && *en != 0x00) 4353 break; 4354 *en-- = '\0'; 4355 } 4356 4357 index = (ha->pdev->subsystem_device & 0xff); 4358 if (use_tbl && 4359 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4360 index < QLA_MODEL_NAMES) 4361 strlcpy(ha->model_desc, 4362 qla2x00_model_name[index * 2 + 1], 4363 sizeof(ha->model_desc)); 4364 } else { 4365 index = (ha->pdev->subsystem_device & 0xff); 4366 if (use_tbl && 4367 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4368 index < QLA_MODEL_NAMES) { 4369 strlcpy(ha->model_number, 4370 qla2x00_model_name[index * 2], 4371 sizeof(ha->model_number)); 4372 strlcpy(ha->model_desc, 4373 qla2x00_model_name[index * 2 + 1], 4374 sizeof(ha->model_desc)); 4375 } else { 4376 strlcpy(ha->model_number, def, 4377 sizeof(ha->model_number)); 4378 } 4379 } 4380 if (IS_FWI2_CAPABLE(ha)) 4381 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4382 sizeof(ha->model_desc)); 4383 } 4384 4385 /* On sparc systems, obtain port and node WWN from firmware 4386 * properties. 4387 */ 4388 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4389 { 4390 #ifdef CONFIG_SPARC 4391 struct qla_hw_data *ha = vha->hw; 4392 struct pci_dev *pdev = ha->pdev; 4393 struct device_node *dp = pci_device_to_OF_node(pdev); 4394 const u8 *val; 4395 int len; 4396 4397 val = of_get_property(dp, "port-wwn", &len); 4398 if (val && len >= WWN_SIZE) 4399 memcpy(nv->port_name, val, WWN_SIZE); 4400 4401 val = of_get_property(dp, "node-wwn", &len); 4402 if (val && len >= WWN_SIZE) 4403 memcpy(nv->node_name, val, WWN_SIZE); 4404 #endif 4405 } 4406 4407 /* 4408 * NVRAM configuration for ISP 2xxx 4409 * 4410 * Input: 4411 * ha = adapter block pointer. 4412 * 4413 * Output: 4414 * initialization control block in response_ring 4415 * host adapters parameters in host adapter block 4416 * 4417 * Returns: 4418 * 0 = success. 4419 */ 4420 int 4421 qla2x00_nvram_config(scsi_qla_host_t *vha) 4422 { 4423 int rval; 4424 uint8_t chksum = 0; 4425 uint16_t cnt; 4426 uint8_t *dptr1, *dptr2; 4427 struct qla_hw_data *ha = vha->hw; 4428 init_cb_t *icb = ha->init_cb; 4429 nvram_t *nv = ha->nvram; 4430 uint8_t *ptr = ha->nvram; 4431 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4432 4433 rval = QLA_SUCCESS; 4434 4435 /* Determine NVRAM starting address. */ 4436 ha->nvram_size = sizeof(*nv); 4437 ha->nvram_base = 0; 4438 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4439 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4440 ha->nvram_base = 0x80; 4441 4442 /* Get NVRAM data and calculate checksum. */ 4443 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4444 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4445 chksum += *ptr++; 4446 4447 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4448 "Contents of NVRAM.\n"); 4449 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4450 nv, ha->nvram_size); 4451 4452 /* Bad NVRAM data, set defaults parameters. */ 4453 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 4454 nv->nvram_version < 1) { 4455 /* Reset NVRAM data. */ 4456 ql_log(ql_log_warn, vha, 0x0064, 4457 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 4458 chksum, nv->id, nv->nvram_version); 4459 ql_log(ql_log_warn, vha, 0x0065, 4460 "Falling back to " 4461 "functioning (yet invalid -- WWPN) defaults.\n"); 4462 4463 /* 4464 * Set default initialization control block. 4465 */ 4466 memset(nv, 0, ha->nvram_size); 4467 nv->parameter_block_version = ICB_VERSION; 4468 4469 if (IS_QLA23XX(ha)) { 4470 nv->firmware_options[0] = BIT_2 | BIT_1; 4471 nv->firmware_options[1] = BIT_7 | BIT_5; 4472 nv->add_firmware_options[0] = BIT_5; 4473 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4474 nv->frame_payload_size = 2048; 4475 nv->special_options[1] = BIT_7; 4476 } else if (IS_QLA2200(ha)) { 4477 nv->firmware_options[0] = BIT_2 | BIT_1; 4478 nv->firmware_options[1] = BIT_7 | BIT_5; 4479 nv->add_firmware_options[0] = BIT_5; 4480 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4481 nv->frame_payload_size = 1024; 4482 } else if (IS_QLA2100(ha)) { 4483 nv->firmware_options[0] = BIT_3 | BIT_1; 4484 nv->firmware_options[1] = BIT_5; 4485 nv->frame_payload_size = 1024; 4486 } 4487 4488 nv->max_iocb_allocation = cpu_to_le16(256); 4489 nv->execution_throttle = cpu_to_le16(16); 4490 nv->retry_count = 8; 4491 nv->retry_delay = 1; 4492 4493 nv->port_name[0] = 33; 4494 nv->port_name[3] = 224; 4495 nv->port_name[4] = 139; 4496 4497 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4498 4499 nv->login_timeout = 4; 4500 4501 /* 4502 * Set default host adapter parameters 4503 */ 4504 nv->host_p[1] = BIT_2; 4505 nv->reset_delay = 5; 4506 nv->port_down_retry_count = 8; 4507 nv->max_luns_per_target = cpu_to_le16(8); 4508 nv->link_down_timeout = 60; 4509 4510 rval = 1; 4511 } 4512 4513 /* Reset Initialization control block */ 4514 memset(icb, 0, ha->init_cb_size); 4515 4516 /* 4517 * Setup driver NVRAM options. 4518 */ 4519 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4520 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4521 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4522 nv->firmware_options[1] &= ~BIT_4; 4523 4524 if (IS_QLA23XX(ha)) { 4525 nv->firmware_options[0] |= BIT_2; 4526 nv->firmware_options[0] &= ~BIT_3; 4527 nv->special_options[0] &= ~BIT_6; 4528 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4529 4530 if (IS_QLA2300(ha)) { 4531 if (ha->fb_rev == FPM_2310) { 4532 strcpy(ha->model_number, "QLA2310"); 4533 } else { 4534 strcpy(ha->model_number, "QLA2300"); 4535 } 4536 } else { 4537 qla2x00_set_model_info(vha, nv->model_number, 4538 sizeof(nv->model_number), "QLA23xx"); 4539 } 4540 } else if (IS_QLA2200(ha)) { 4541 nv->firmware_options[0] |= BIT_2; 4542 /* 4543 * 'Point-to-point preferred, else loop' is not a safe 4544 * connection mode setting. 4545 */ 4546 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4547 (BIT_5 | BIT_4)) { 4548 /* Force 'loop preferred, else point-to-point'. */ 4549 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4550 nv->add_firmware_options[0] |= BIT_5; 4551 } 4552 strcpy(ha->model_number, "QLA22xx"); 4553 } else /*if (IS_QLA2100(ha))*/ { 4554 strcpy(ha->model_number, "QLA2100"); 4555 } 4556 4557 /* 4558 * Copy over NVRAM RISC parameter block to initialization control block. 4559 */ 4560 dptr1 = (uint8_t *)icb; 4561 dptr2 = (uint8_t *)&nv->parameter_block_version; 4562 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4563 while (cnt--) 4564 *dptr1++ = *dptr2++; 4565 4566 /* Copy 2nd half. */ 4567 dptr1 = (uint8_t *)icb->add_firmware_options; 4568 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4569 while (cnt--) 4570 *dptr1++ = *dptr2++; 4571 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4572 /* Use alternate WWN? */ 4573 if (nv->host_p[1] & BIT_7) { 4574 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4575 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4576 } 4577 4578 /* Prepare nodename */ 4579 if ((icb->firmware_options[1] & BIT_6) == 0) { 4580 /* 4581 * Firmware will apply the following mask if the nodename was 4582 * not provided. 4583 */ 4584 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4585 icb->node_name[0] &= 0xF0; 4586 } 4587 4588 /* 4589 * Set host adapter parameters. 4590 */ 4591 4592 /* 4593 * BIT_7 in the host-parameters section allows for modification to 4594 * internal driver logging. 4595 */ 4596 if (nv->host_p[0] & BIT_7) 4597 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4598 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4599 /* Always load RISC code on non ISP2[12]00 chips. */ 4600 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4601 ha->flags.disable_risc_code_load = 0; 4602 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4603 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4604 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4605 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4606 ha->flags.disable_serdes = 0; 4607 4608 ha->operating_mode = 4609 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4610 4611 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4612 sizeof(ha->fw_seriallink_options)); 4613 4614 /* save HBA serial number */ 4615 ha->serial0 = icb->port_name[5]; 4616 ha->serial1 = icb->port_name[6]; 4617 ha->serial2 = icb->port_name[7]; 4618 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4619 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4620 4621 icb->execution_throttle = cpu_to_le16(0xFFFF); 4622 4623 ha->retry_count = nv->retry_count; 4624 4625 /* Set minimum login_timeout to 4 seconds. */ 4626 if (nv->login_timeout != ql2xlogintimeout) 4627 nv->login_timeout = ql2xlogintimeout; 4628 if (nv->login_timeout < 4) 4629 nv->login_timeout = 4; 4630 ha->login_timeout = nv->login_timeout; 4631 4632 /* Set minimum RATOV to 100 tenths of a second. */ 4633 ha->r_a_tov = 100; 4634 4635 ha->loop_reset_delay = nv->reset_delay; 4636 4637 /* Link Down Timeout = 0: 4638 * 4639 * When Port Down timer expires we will start returning 4640 * I/O's to OS with "DID_NO_CONNECT". 4641 * 4642 * Link Down Timeout != 0: 4643 * 4644 * The driver waits for the link to come up after link down 4645 * before returning I/Os to OS with "DID_NO_CONNECT". 4646 */ 4647 if (nv->link_down_timeout == 0) { 4648 ha->loop_down_abort_time = 4649 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4650 } else { 4651 ha->link_down_timeout = nv->link_down_timeout; 4652 ha->loop_down_abort_time = 4653 (LOOP_DOWN_TIME - ha->link_down_timeout); 4654 } 4655 4656 /* 4657 * Need enough time to try and get the port back. 4658 */ 4659 ha->port_down_retry_count = nv->port_down_retry_count; 4660 if (qlport_down_retry) 4661 ha->port_down_retry_count = qlport_down_retry; 4662 /* Set login_retry_count */ 4663 ha->login_retry_count = nv->retry_count; 4664 if (ha->port_down_retry_count == nv->port_down_retry_count && 4665 ha->port_down_retry_count > 3) 4666 ha->login_retry_count = ha->port_down_retry_count; 4667 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4668 ha->login_retry_count = ha->port_down_retry_count; 4669 if (ql2xloginretrycount) 4670 ha->login_retry_count = ql2xloginretrycount; 4671 4672 icb->lun_enables = cpu_to_le16(0); 4673 icb->command_resource_count = 0; 4674 icb->immediate_notify_resource_count = 0; 4675 icb->timeout = cpu_to_le16(0); 4676 4677 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4678 /* Enable RIO */ 4679 icb->firmware_options[0] &= ~BIT_3; 4680 icb->add_firmware_options[0] &= 4681 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4682 icb->add_firmware_options[0] |= BIT_2; 4683 icb->response_accumulation_timer = 3; 4684 icb->interrupt_delay_timer = 5; 4685 4686 vha->flags.process_response_queue = 1; 4687 } else { 4688 /* Enable ZIO. */ 4689 if (!vha->flags.init_done) { 4690 ha->zio_mode = icb->add_firmware_options[0] & 4691 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4692 ha->zio_timer = icb->interrupt_delay_timer ? 4693 icb->interrupt_delay_timer : 2; 4694 } 4695 icb->add_firmware_options[0] &= 4696 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4697 vha->flags.process_response_queue = 0; 4698 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4699 ha->zio_mode = QLA_ZIO_MODE_6; 4700 4701 ql_log(ql_log_info, vha, 0x0068, 4702 "ZIO mode %d enabled; timer delay (%d us).\n", 4703 ha->zio_mode, ha->zio_timer * 100); 4704 4705 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4706 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4707 vha->flags.process_response_queue = 1; 4708 } 4709 } 4710 4711 if (rval) { 4712 ql_log(ql_log_warn, vha, 0x0069, 4713 "NVRAM configuration failed.\n"); 4714 } 4715 return (rval); 4716 } 4717 4718 static void 4719 qla2x00_rport_del(void *data) 4720 { 4721 fc_port_t *fcport = data; 4722 struct fc_rport *rport; 4723 unsigned long flags; 4724 4725 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4726 rport = fcport->drport ? fcport->drport : fcport->rport; 4727 fcport->drport = NULL; 4728 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4729 if (rport) { 4730 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4731 "%s %8phN. rport %p roles %x\n", 4732 __func__, fcport->port_name, rport, 4733 rport->roles); 4734 4735 fc_remote_port_delete(rport); 4736 } 4737 } 4738 4739 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 4740 { 4741 int old_state; 4742 4743 old_state = atomic_read(&fcport->state); 4744 atomic_set(&fcport->state, state); 4745 4746 /* Don't print state transitions during initial allocation of fcport */ 4747 if (old_state && old_state != state) { 4748 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 4749 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 4750 fcport->port_name, port_state_str[old_state], 4751 port_state_str[state], fcport->d_id.b.domain, 4752 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4753 } 4754 } 4755 4756 /** 4757 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4758 * @vha: HA context 4759 * @flags: allocation flags 4760 * 4761 * Returns a pointer to the allocated fcport, or NULL, if none available. 4762 */ 4763 fc_port_t * 4764 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4765 { 4766 fc_port_t *fcport; 4767 4768 fcport = kzalloc(sizeof(fc_port_t), flags); 4769 if (!fcport) 4770 return NULL; 4771 4772 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4773 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4774 flags); 4775 if (!fcport->ct_desc.ct_sns) { 4776 ql_log(ql_log_warn, vha, 0xd049, 4777 "Failed to allocate ct_sns request.\n"); 4778 kfree(fcport); 4779 return NULL; 4780 } 4781 4782 /* Setup fcport template structure. */ 4783 fcport->vha = vha; 4784 fcport->port_type = FCT_UNKNOWN; 4785 fcport->loop_id = FC_NO_LOOP_ID; 4786 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4787 fcport->supported_classes = FC_COS_UNSPECIFIED; 4788 fcport->fp_speed = PORT_SPEED_UNKNOWN; 4789 4790 fcport->disc_state = DSC_DELETED; 4791 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4792 fcport->deleted = QLA_SESS_DELETED; 4793 fcport->login_retry = vha->hw->login_retry_count; 4794 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 4795 fcport->logout_on_delete = 1; 4796 4797 if (!fcport->ct_desc.ct_sns) { 4798 ql_log(ql_log_warn, vha, 0xd049, 4799 "Failed to allocate ct_sns request.\n"); 4800 kfree(fcport); 4801 return NULL; 4802 } 4803 4804 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4805 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 4806 INIT_LIST_HEAD(&fcport->gnl_entry); 4807 INIT_LIST_HEAD(&fcport->list); 4808 4809 return fcport; 4810 } 4811 4812 void 4813 qla2x00_free_fcport(fc_port_t *fcport) 4814 { 4815 if (fcport->ct_desc.ct_sns) { 4816 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4817 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4818 fcport->ct_desc.ct_sns_dma); 4819 4820 fcport->ct_desc.ct_sns = NULL; 4821 } 4822 list_del(&fcport->list); 4823 qla2x00_clear_loop_id(fcport); 4824 kfree(fcport); 4825 } 4826 4827 /* 4828 * qla2x00_configure_loop 4829 * Updates Fibre Channel Device Database with what is actually on loop. 4830 * 4831 * Input: 4832 * ha = adapter block pointer. 4833 * 4834 * Returns: 4835 * 0 = success. 4836 * 1 = error. 4837 * 2 = database was full and device was not configured. 4838 */ 4839 static int 4840 qla2x00_configure_loop(scsi_qla_host_t *vha) 4841 { 4842 int rval; 4843 unsigned long flags, save_flags; 4844 struct qla_hw_data *ha = vha->hw; 4845 4846 rval = QLA_SUCCESS; 4847 4848 /* Get Initiator ID */ 4849 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4850 rval = qla2x00_configure_hba(vha); 4851 if (rval != QLA_SUCCESS) { 4852 ql_dbg(ql_dbg_disc, vha, 0x2013, 4853 "Unable to configure HBA.\n"); 4854 return (rval); 4855 } 4856 } 4857 4858 save_flags = flags = vha->dpc_flags; 4859 ql_dbg(ql_dbg_disc, vha, 0x2014, 4860 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4861 4862 /* 4863 * If we have both an RSCN and PORT UPDATE pending then handle them 4864 * both at the same time. 4865 */ 4866 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4867 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4868 4869 qla2x00_get_data_rate(vha); 4870 4871 /* Determine what we need to do */ 4872 if (ha->current_topology == ISP_CFG_FL && 4873 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4874 4875 set_bit(RSCN_UPDATE, &flags); 4876 4877 } else if (ha->current_topology == ISP_CFG_F && 4878 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4879 4880 set_bit(RSCN_UPDATE, &flags); 4881 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4882 4883 } else if (ha->current_topology == ISP_CFG_N) { 4884 clear_bit(RSCN_UPDATE, &flags); 4885 if (qla_tgt_mode_enabled(vha)) { 4886 /* allow the other side to start the login */ 4887 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4888 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4889 } 4890 } else if (ha->current_topology == ISP_CFG_NL) { 4891 clear_bit(RSCN_UPDATE, &flags); 4892 set_bit(LOCAL_LOOP_UPDATE, &flags); 4893 } else if (!vha->flags.online || 4894 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4895 set_bit(RSCN_UPDATE, &flags); 4896 set_bit(LOCAL_LOOP_UPDATE, &flags); 4897 } 4898 4899 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4900 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4901 ql_dbg(ql_dbg_disc, vha, 0x2015, 4902 "Loop resync needed, failing.\n"); 4903 rval = QLA_FUNCTION_FAILED; 4904 } else 4905 rval = qla2x00_configure_local_loop(vha); 4906 } 4907 4908 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4909 if (LOOP_TRANSITION(vha)) { 4910 ql_dbg(ql_dbg_disc, vha, 0x2099, 4911 "Needs RSCN update and loop transition.\n"); 4912 rval = QLA_FUNCTION_FAILED; 4913 } 4914 else 4915 rval = qla2x00_configure_fabric(vha); 4916 } 4917 4918 if (rval == QLA_SUCCESS) { 4919 if (atomic_read(&vha->loop_down_timer) || 4920 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4921 rval = QLA_FUNCTION_FAILED; 4922 } else { 4923 atomic_set(&vha->loop_state, LOOP_READY); 4924 ql_dbg(ql_dbg_disc, vha, 0x2069, 4925 "LOOP READY.\n"); 4926 ha->flags.fw_init_done = 1; 4927 4928 /* 4929 * Process any ATIO queue entries that came in 4930 * while we weren't online. 4931 */ 4932 if (qla_tgt_mode_enabled(vha) || 4933 qla_dual_mode_enabled(vha)) { 4934 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 4935 qlt_24xx_process_atio_queue(vha, 0); 4936 spin_unlock_irqrestore(&ha->tgt.atio_lock, 4937 flags); 4938 } 4939 } 4940 } 4941 4942 if (rval) { 4943 ql_dbg(ql_dbg_disc, vha, 0x206a, 4944 "%s *** FAILED ***.\n", __func__); 4945 } else { 4946 ql_dbg(ql_dbg_disc, vha, 0x206b, 4947 "%s: exiting normally.\n", __func__); 4948 } 4949 4950 /* Restore state if a resync event occurred during processing */ 4951 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4952 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4953 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4954 if (test_bit(RSCN_UPDATE, &save_flags)) { 4955 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4956 } 4957 } 4958 4959 return (rval); 4960 } 4961 4962 /* 4963 * qla2x00_configure_local_loop 4964 * Updates Fibre Channel Device Database with local loop devices. 4965 * 4966 * Input: 4967 * ha = adapter block pointer. 4968 * 4969 * Returns: 4970 * 0 = success. 4971 */ 4972 static int 4973 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4974 { 4975 int rval, rval2; 4976 int found_devs; 4977 int found; 4978 fc_port_t *fcport, *new_fcport; 4979 4980 uint16_t index; 4981 uint16_t entries; 4982 struct gid_list_info *gid; 4983 uint16_t loop_id; 4984 uint8_t domain, area, al_pa; 4985 struct qla_hw_data *ha = vha->hw; 4986 unsigned long flags; 4987 4988 /* Inititae N2N login. */ 4989 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4990 /* borrowing */ 4991 u32 *bp, i, sz; 4992 4993 memset(ha->init_cb, 0, ha->init_cb_size); 4994 sz = min_t(int, sizeof(struct els_plogi_payload), 4995 ha->init_cb_size); 4996 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 4997 (void *)ha->init_cb, sz); 4998 if (rval == QLA_SUCCESS) { 4999 bp = (uint32_t *)ha->init_cb; 5000 for (i = 0; i < sz/4 ; i++, bp++) 5001 *bp = cpu_to_be32(*bp); 5002 5003 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb, 5004 sizeof(ha->plogi_els_payld.data)); 5005 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 5006 } else { 5007 ql_dbg(ql_dbg_init, vha, 0x00d1, 5008 "PLOGI ELS param read fail.\n"); 5009 } 5010 return QLA_SUCCESS; 5011 } 5012 5013 found_devs = 0; 5014 new_fcport = NULL; 5015 entries = MAX_FIBRE_DEVICES_LOOP; 5016 5017 /* Get list of logged in devices. */ 5018 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5019 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5020 &entries); 5021 if (rval != QLA_SUCCESS) 5022 goto cleanup_allocation; 5023 5024 ql_dbg(ql_dbg_disc, vha, 0x2011, 5025 "Entries in ID list (%d).\n", entries); 5026 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5027 ha->gid_list, entries * sizeof(*ha->gid_list)); 5028 5029 if (entries == 0) { 5030 spin_lock_irqsave(&vha->work_lock, flags); 5031 vha->scan.scan_retry++; 5032 spin_unlock_irqrestore(&vha->work_lock, flags); 5033 5034 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5035 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5036 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5037 } 5038 } else { 5039 vha->scan.scan_retry = 0; 5040 } 5041 5042 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5043 fcport->scan_state = QLA_FCPORT_SCAN; 5044 } 5045 5046 /* Allocate temporary fcport for any new fcports discovered. */ 5047 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5048 if (new_fcport == NULL) { 5049 ql_log(ql_log_warn, vha, 0x2012, 5050 "Memory allocation failed for fcport.\n"); 5051 rval = QLA_MEMORY_ALLOC_FAILED; 5052 goto cleanup_allocation; 5053 } 5054 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5055 5056 /* Add devices to port list. */ 5057 gid = ha->gid_list; 5058 for (index = 0; index < entries; index++) { 5059 domain = gid->domain; 5060 area = gid->area; 5061 al_pa = gid->al_pa; 5062 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5063 loop_id = gid->loop_id_2100; 5064 else 5065 loop_id = le16_to_cpu(gid->loop_id); 5066 gid = (void *)gid + ha->gid_list_info_size; 5067 5068 /* Bypass reserved domain fields. */ 5069 if ((domain & 0xf0) == 0xf0) 5070 continue; 5071 5072 /* Bypass if not same domain and area of adapter. */ 5073 if (area && domain && ((area != vha->d_id.b.area) || 5074 (domain != vha->d_id.b.domain)) && 5075 (ha->current_topology == ISP_CFG_NL)) 5076 continue; 5077 5078 5079 /* Bypass invalid local loop ID. */ 5080 if (loop_id > LAST_LOCAL_LOOP_ID) 5081 continue; 5082 5083 memset(new_fcport->port_name, 0, WWN_SIZE); 5084 5085 /* Fill in member data. */ 5086 new_fcport->d_id.b.domain = domain; 5087 new_fcport->d_id.b.area = area; 5088 new_fcport->d_id.b.al_pa = al_pa; 5089 new_fcport->loop_id = loop_id; 5090 new_fcport->scan_state = QLA_FCPORT_FOUND; 5091 5092 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5093 if (rval2 != QLA_SUCCESS) { 5094 ql_dbg(ql_dbg_disc, vha, 0x2097, 5095 "Failed to retrieve fcport information " 5096 "-- get_port_database=%x, loop_id=0x%04x.\n", 5097 rval2, new_fcport->loop_id); 5098 /* Skip retry if N2N */ 5099 if (ha->current_topology != ISP_CFG_N) { 5100 ql_dbg(ql_dbg_disc, vha, 0x2105, 5101 "Scheduling resync.\n"); 5102 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5103 continue; 5104 } 5105 } 5106 5107 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5108 /* Check for matching device in port list. */ 5109 found = 0; 5110 fcport = NULL; 5111 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5112 if (memcmp(new_fcport->port_name, fcport->port_name, 5113 WWN_SIZE)) 5114 continue; 5115 5116 fcport->flags &= ~FCF_FABRIC_DEVICE; 5117 fcport->loop_id = new_fcport->loop_id; 5118 fcport->port_type = new_fcport->port_type; 5119 fcport->d_id.b24 = new_fcport->d_id.b24; 5120 memcpy(fcport->node_name, new_fcport->node_name, 5121 WWN_SIZE); 5122 fcport->scan_state = QLA_FCPORT_FOUND; 5123 found++; 5124 break; 5125 } 5126 5127 if (!found) { 5128 /* New device, add to fcports list. */ 5129 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5130 5131 /* Allocate a new replacement fcport. */ 5132 fcport = new_fcport; 5133 5134 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5135 5136 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5137 5138 if (new_fcport == NULL) { 5139 ql_log(ql_log_warn, vha, 0xd031, 5140 "Failed to allocate memory for fcport.\n"); 5141 rval = QLA_MEMORY_ALLOC_FAILED; 5142 goto cleanup_allocation; 5143 } 5144 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5145 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5146 } 5147 5148 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5149 5150 /* Base iIDMA settings on HBA port speed. */ 5151 fcport->fp_speed = ha->link_data_rate; 5152 5153 found_devs++; 5154 } 5155 5156 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5157 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5158 break; 5159 5160 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5161 if ((qla_dual_mode_enabled(vha) || 5162 qla_ini_mode_enabled(vha)) && 5163 atomic_read(&fcport->state) == FCS_ONLINE) { 5164 qla2x00_mark_device_lost(vha, fcport, 5165 ql2xplogiabsentdevice, 0); 5166 if (fcport->loop_id != FC_NO_LOOP_ID && 5167 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5168 fcport->port_type != FCT_INITIATOR && 5169 fcport->port_type != FCT_BROADCAST) { 5170 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5171 "%s %d %8phC post del sess\n", 5172 __func__, __LINE__, 5173 fcport->port_name); 5174 5175 qlt_schedule_sess_for_deletion(fcport); 5176 continue; 5177 } 5178 } 5179 } 5180 5181 if (fcport->scan_state == QLA_FCPORT_FOUND) 5182 qla24xx_fcport_handle_login(vha, fcport); 5183 } 5184 5185 cleanup_allocation: 5186 kfree(new_fcport); 5187 5188 if (rval != QLA_SUCCESS) { 5189 ql_dbg(ql_dbg_disc, vha, 0x2098, 5190 "Configure local loop error exit: rval=%x.\n", rval); 5191 } 5192 5193 return (rval); 5194 } 5195 5196 static void 5197 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5198 { 5199 int rval; 5200 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5201 struct qla_hw_data *ha = vha->hw; 5202 5203 if (!IS_IIDMA_CAPABLE(ha)) 5204 return; 5205 5206 if (atomic_read(&fcport->state) != FCS_ONLINE) 5207 return; 5208 5209 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5210 fcport->fp_speed > ha->link_data_rate || 5211 !ha->flags.gpsc_supported) 5212 return; 5213 5214 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5215 mb); 5216 if (rval != QLA_SUCCESS) { 5217 ql_dbg(ql_dbg_disc, vha, 0x2004, 5218 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5219 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5220 } else { 5221 ql_dbg(ql_dbg_disc, vha, 0x2005, 5222 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5223 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5224 fcport->fp_speed, fcport->port_name); 5225 } 5226 } 5227 5228 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5229 { 5230 qla2x00_iidma_fcport(vha, fcport); 5231 qla24xx_update_fcport_fcp_prio(vha, fcport); 5232 } 5233 5234 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5235 { 5236 struct qla_work_evt *e; 5237 5238 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5239 if (!e) 5240 return QLA_FUNCTION_FAILED; 5241 5242 e->u.fcport.fcport = fcport; 5243 return qla2x00_post_work(vha, e); 5244 } 5245 5246 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5247 static void 5248 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5249 { 5250 struct fc_rport_identifiers rport_ids; 5251 struct fc_rport *rport; 5252 unsigned long flags; 5253 5254 if (atomic_read(&fcport->state) == FCS_ONLINE) 5255 return; 5256 5257 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5258 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5259 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5260 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5261 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5262 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5263 if (!rport) { 5264 ql_log(ql_log_warn, vha, 0x2006, 5265 "Unable to allocate fc remote port.\n"); 5266 return; 5267 } 5268 5269 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5270 *((fc_port_t **)rport->dd_data) = fcport; 5271 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5272 5273 rport->supported_classes = fcport->supported_classes; 5274 5275 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 5276 if (fcport->port_type == FCT_INITIATOR) 5277 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 5278 if (fcport->port_type == FCT_TARGET) 5279 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 5280 if (fcport->port_type & FCT_NVME_INITIATOR) 5281 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 5282 if (fcport->port_type & FCT_NVME_TARGET) 5283 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 5284 if (fcport->port_type & FCT_NVME_DISCOVERY) 5285 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 5286 5287 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5288 "%s %8phN. rport %p is %s mode\n", 5289 __func__, fcport->port_name, rport, 5290 (fcport->port_type == FCT_TARGET) ? "tgt" : 5291 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5292 5293 fc_remote_port_rolechg(rport, rport_ids.roles); 5294 } 5295 5296 /* 5297 * qla2x00_update_fcport 5298 * Updates device on list. 5299 * 5300 * Input: 5301 * ha = adapter block pointer. 5302 * fcport = port structure pointer. 5303 * 5304 * Return: 5305 * 0 - Success 5306 * BIT_0 - error 5307 * 5308 * Context: 5309 * Kernel context. 5310 */ 5311 void 5312 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5313 { 5314 if (IS_SW_RESV_ADDR(fcport->d_id)) 5315 return; 5316 5317 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5318 __func__, fcport->port_name); 5319 5320 fcport->disc_state = DSC_UPD_FCPORT; 5321 fcport->login_retry = vha->hw->login_retry_count; 5322 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5323 fcport->deleted = 0; 5324 fcport->logout_on_delete = 1; 5325 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5326 5327 switch (vha->hw->current_topology) { 5328 case ISP_CFG_N: 5329 case ISP_CFG_NL: 5330 fcport->keep_nport_handle = 1; 5331 break; 5332 default: 5333 break; 5334 } 5335 5336 qla2x00_iidma_fcport(vha, fcport); 5337 5338 if (fcport->fc4f_nvme) { 5339 qla_nvme_register_remote(vha, fcport); 5340 fcport->disc_state = DSC_LOGIN_COMPLETE; 5341 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5342 return; 5343 } 5344 5345 qla24xx_update_fcport_fcp_prio(vha, fcport); 5346 5347 switch (vha->host->active_mode) { 5348 case MODE_INITIATOR: 5349 qla2x00_reg_remote_port(vha, fcport); 5350 break; 5351 case MODE_TARGET: 5352 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5353 !vha->vha_tgt.qla_tgt->tgt_stopped) 5354 qlt_fc_port_added(vha, fcport); 5355 break; 5356 case MODE_DUAL: 5357 qla2x00_reg_remote_port(vha, fcport); 5358 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5359 !vha->vha_tgt.qla_tgt->tgt_stopped) 5360 qlt_fc_port_added(vha, fcport); 5361 break; 5362 default: 5363 break; 5364 } 5365 5366 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5367 5368 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5369 if (fcport->id_changed) { 5370 fcport->id_changed = 0; 5371 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5372 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5373 __func__, __LINE__, fcport->port_name, 5374 vha->fcport_count); 5375 qla24xx_post_gfpnid_work(vha, fcport); 5376 } else { 5377 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5378 "%s %d %8phC post gpsc fcp_cnt %d\n", 5379 __func__, __LINE__, fcport->port_name, 5380 vha->fcport_count); 5381 qla24xx_post_gpsc_work(vha, fcport); 5382 } 5383 } 5384 5385 fcport->disc_state = DSC_LOGIN_COMPLETE; 5386 } 5387 5388 void qla_register_fcport_fn(struct work_struct *work) 5389 { 5390 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5391 u32 rscn_gen = fcport->rscn_gen; 5392 u16 data[2]; 5393 5394 if (IS_SW_RESV_ADDR(fcport->d_id)) 5395 return; 5396 5397 qla2x00_update_fcport(fcport->vha, fcport); 5398 5399 if (rscn_gen != fcport->rscn_gen) { 5400 /* RSCN(s) came in while registration */ 5401 switch (fcport->next_disc_state) { 5402 case DSC_DELETE_PEND: 5403 qlt_schedule_sess_for_deletion(fcport); 5404 break; 5405 case DSC_ADISC: 5406 data[0] = data[1] = 0; 5407 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5408 data); 5409 break; 5410 default: 5411 break; 5412 } 5413 } 5414 } 5415 5416 /* 5417 * qla2x00_configure_fabric 5418 * Setup SNS devices with loop ID's. 5419 * 5420 * Input: 5421 * ha = adapter block pointer. 5422 * 5423 * Returns: 5424 * 0 = success. 5425 * BIT_0 = error 5426 */ 5427 static int 5428 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5429 { 5430 int rval; 5431 fc_port_t *fcport; 5432 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5433 uint16_t loop_id; 5434 LIST_HEAD(new_fcports); 5435 struct qla_hw_data *ha = vha->hw; 5436 int discovery_gen; 5437 5438 /* If FL port exists, then SNS is present */ 5439 if (IS_FWI2_CAPABLE(ha)) 5440 loop_id = NPH_F_PORT; 5441 else 5442 loop_id = SNS_FL_PORT; 5443 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5444 if (rval != QLA_SUCCESS) { 5445 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5446 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5447 5448 vha->device_flags &= ~SWITCH_FOUND; 5449 return (QLA_SUCCESS); 5450 } 5451 vha->device_flags |= SWITCH_FOUND; 5452 5453 5454 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5455 rval = qla2x00_send_change_request(vha, 0x3, 0); 5456 if (rval != QLA_SUCCESS) 5457 ql_log(ql_log_warn, vha, 0x121, 5458 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5459 rval); 5460 } 5461 5462 5463 do { 5464 qla2x00_mgmt_svr_login(vha); 5465 5466 /* FDMI support. */ 5467 if (ql2xfdmienable && 5468 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5469 qla2x00_fdmi_register(vha); 5470 5471 /* Ensure we are logged into the SNS. */ 5472 loop_id = NPH_SNS_LID(ha); 5473 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5474 0xfc, mb, BIT_1|BIT_0); 5475 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5476 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5477 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5478 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5479 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5480 return rval; 5481 } 5482 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5483 if (qla2x00_rft_id(vha)) { 5484 /* EMPTY */ 5485 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5486 "Register FC-4 TYPE failed.\n"); 5487 if (test_bit(LOOP_RESYNC_NEEDED, 5488 &vha->dpc_flags)) 5489 break; 5490 } 5491 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5492 /* EMPTY */ 5493 ql_dbg(ql_dbg_disc, vha, 0x209a, 5494 "Register FC-4 Features failed.\n"); 5495 if (test_bit(LOOP_RESYNC_NEEDED, 5496 &vha->dpc_flags)) 5497 break; 5498 } 5499 if (vha->flags.nvme_enabled) { 5500 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5501 ql_dbg(ql_dbg_disc, vha, 0x2049, 5502 "Register NVME FC Type Features failed.\n"); 5503 } 5504 } 5505 if (qla2x00_rnn_id(vha)) { 5506 /* EMPTY */ 5507 ql_dbg(ql_dbg_disc, vha, 0x2104, 5508 "Register Node Name failed.\n"); 5509 if (test_bit(LOOP_RESYNC_NEEDED, 5510 &vha->dpc_flags)) 5511 break; 5512 } else if (qla2x00_rsnn_nn(vha)) { 5513 /* EMPTY */ 5514 ql_dbg(ql_dbg_disc, vha, 0x209b, 5515 "Register Symbolic Node Name failed.\n"); 5516 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5517 break; 5518 } 5519 } 5520 5521 5522 /* Mark the time right before querying FW for connected ports. 5523 * This process is long, asynchronous and by the time it's done, 5524 * collected information might not be accurate anymore. E.g. 5525 * disconnected port might have re-connected and a brand new 5526 * session has been created. In this case session's generation 5527 * will be newer than discovery_gen. */ 5528 qlt_do_generation_tick(vha, &discovery_gen); 5529 5530 if (USE_ASYNC_SCAN(ha)) { 5531 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5532 NULL); 5533 if (rval) 5534 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5535 } else { 5536 list_for_each_entry(fcport, &vha->vp_fcports, list) 5537 fcport->scan_state = QLA_FCPORT_SCAN; 5538 5539 rval = qla2x00_find_all_fabric_devs(vha); 5540 } 5541 if (rval != QLA_SUCCESS) 5542 break; 5543 } while (0); 5544 5545 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5546 qla_nvme_register_hba(vha); 5547 5548 if (rval) 5549 ql_dbg(ql_dbg_disc, vha, 0x2068, 5550 "Configure fabric error exit rval=%d.\n", rval); 5551 5552 return (rval); 5553 } 5554 5555 /* 5556 * qla2x00_find_all_fabric_devs 5557 * 5558 * Input: 5559 * ha = adapter block pointer. 5560 * dev = database device entry pointer. 5561 * 5562 * Returns: 5563 * 0 = success. 5564 * 5565 * Context: 5566 * Kernel context. 5567 */ 5568 static int 5569 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5570 { 5571 int rval; 5572 uint16_t loop_id; 5573 fc_port_t *fcport, *new_fcport; 5574 int found; 5575 5576 sw_info_t *swl; 5577 int swl_idx; 5578 int first_dev, last_dev; 5579 port_id_t wrap = {}, nxt_d_id; 5580 struct qla_hw_data *ha = vha->hw; 5581 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5582 unsigned long flags; 5583 5584 rval = QLA_SUCCESS; 5585 5586 /* Try GID_PT to get device list, else GAN. */ 5587 if (!ha->swl) 5588 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5589 GFP_KERNEL); 5590 swl = ha->swl; 5591 if (!swl) { 5592 /*EMPTY*/ 5593 ql_dbg(ql_dbg_disc, vha, 0x209c, 5594 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5595 } else { 5596 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5597 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5598 swl = NULL; 5599 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5600 return rval; 5601 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5602 swl = NULL; 5603 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5604 return rval; 5605 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5606 swl = NULL; 5607 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5608 return rval; 5609 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5610 swl = NULL; 5611 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5612 return rval; 5613 } 5614 5615 /* If other queries succeeded probe for FC-4 type */ 5616 if (swl) { 5617 qla2x00_gff_id(vha, swl); 5618 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5619 return rval; 5620 } 5621 } 5622 swl_idx = 0; 5623 5624 /* Allocate temporary fcport for any new fcports discovered. */ 5625 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5626 if (new_fcport == NULL) { 5627 ql_log(ql_log_warn, vha, 0x209d, 5628 "Failed to allocate memory for fcport.\n"); 5629 return (QLA_MEMORY_ALLOC_FAILED); 5630 } 5631 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5632 /* Set start port ID scan at adapter ID. */ 5633 first_dev = 1; 5634 last_dev = 0; 5635 5636 /* Starting free loop ID. */ 5637 loop_id = ha->min_external_loopid; 5638 for (; loop_id <= ha->max_loop_id; loop_id++) { 5639 if (qla2x00_is_reserved_id(vha, loop_id)) 5640 continue; 5641 5642 if (ha->current_topology == ISP_CFG_FL && 5643 (atomic_read(&vha->loop_down_timer) || 5644 LOOP_TRANSITION(vha))) { 5645 atomic_set(&vha->loop_down_timer, 0); 5646 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5647 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5648 break; 5649 } 5650 5651 if (swl != NULL) { 5652 if (last_dev) { 5653 wrap.b24 = new_fcport->d_id.b24; 5654 } else { 5655 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5656 memcpy(new_fcport->node_name, 5657 swl[swl_idx].node_name, WWN_SIZE); 5658 memcpy(new_fcport->port_name, 5659 swl[swl_idx].port_name, WWN_SIZE); 5660 memcpy(new_fcport->fabric_port_name, 5661 swl[swl_idx].fabric_port_name, WWN_SIZE); 5662 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5663 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5664 5665 new_fcport->nvme_flag = 0; 5666 new_fcport->fc4f_nvme = 0; 5667 if (vha->flags.nvme_enabled && 5668 swl[swl_idx].fc4f_nvme) { 5669 new_fcport->fc4f_nvme = 5670 swl[swl_idx].fc4f_nvme; 5671 ql_log(ql_log_info, vha, 0x2131, 5672 "FOUND: NVME port %8phC as FC Type 28h\n", 5673 new_fcport->port_name); 5674 } 5675 5676 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5677 last_dev = 1; 5678 } 5679 swl_idx++; 5680 } 5681 } else { 5682 /* Send GA_NXT to the switch */ 5683 rval = qla2x00_ga_nxt(vha, new_fcport); 5684 if (rval != QLA_SUCCESS) { 5685 ql_log(ql_log_warn, vha, 0x209e, 5686 "SNS scan failed -- assuming " 5687 "zero-entry result.\n"); 5688 rval = QLA_SUCCESS; 5689 break; 5690 } 5691 } 5692 5693 /* If wrap on switch device list, exit. */ 5694 if (first_dev) { 5695 wrap.b24 = new_fcport->d_id.b24; 5696 first_dev = 0; 5697 } else if (new_fcport->d_id.b24 == wrap.b24) { 5698 ql_dbg(ql_dbg_disc, vha, 0x209f, 5699 "Device wrap (%02x%02x%02x).\n", 5700 new_fcport->d_id.b.domain, 5701 new_fcport->d_id.b.area, 5702 new_fcport->d_id.b.al_pa); 5703 break; 5704 } 5705 5706 /* Bypass if same physical adapter. */ 5707 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5708 continue; 5709 5710 /* Bypass virtual ports of the same host. */ 5711 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5712 continue; 5713 5714 /* Bypass if same domain and area of adapter. */ 5715 if (((new_fcport->d_id.b24 & 0xffff00) == 5716 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5717 ISP_CFG_FL) 5718 continue; 5719 5720 /* Bypass reserved domain fields. */ 5721 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5722 continue; 5723 5724 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5725 if (ql2xgffidenable && 5726 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5727 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5728 continue; 5729 5730 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5731 5732 /* Locate matching device in database. */ 5733 found = 0; 5734 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5735 if (memcmp(new_fcport->port_name, fcport->port_name, 5736 WWN_SIZE)) 5737 continue; 5738 5739 fcport->scan_state = QLA_FCPORT_FOUND; 5740 5741 found++; 5742 5743 /* Update port state. */ 5744 memcpy(fcport->fabric_port_name, 5745 new_fcport->fabric_port_name, WWN_SIZE); 5746 fcport->fp_speed = new_fcport->fp_speed; 5747 5748 /* 5749 * If address the same and state FCS_ONLINE 5750 * (or in target mode), nothing changed. 5751 */ 5752 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5753 (atomic_read(&fcport->state) == FCS_ONLINE || 5754 (vha->host->active_mode == MODE_TARGET))) { 5755 break; 5756 } 5757 5758 /* 5759 * If device was not a fabric device before. 5760 */ 5761 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5762 fcport->d_id.b24 = new_fcport->d_id.b24; 5763 qla2x00_clear_loop_id(fcport); 5764 fcport->flags |= (FCF_FABRIC_DEVICE | 5765 FCF_LOGIN_NEEDED); 5766 break; 5767 } 5768 5769 /* 5770 * Port ID changed or device was marked to be updated; 5771 * Log it out if still logged in and mark it for 5772 * relogin later. 5773 */ 5774 if (qla_tgt_mode_enabled(base_vha)) { 5775 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5776 "port changed FC ID, %8phC" 5777 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5778 fcport->port_name, 5779 fcport->d_id.b.domain, 5780 fcport->d_id.b.area, 5781 fcport->d_id.b.al_pa, 5782 fcport->loop_id, 5783 new_fcport->d_id.b.domain, 5784 new_fcport->d_id.b.area, 5785 new_fcport->d_id.b.al_pa); 5786 fcport->d_id.b24 = new_fcport->d_id.b24; 5787 break; 5788 } 5789 5790 fcport->d_id.b24 = new_fcport->d_id.b24; 5791 fcport->flags |= FCF_LOGIN_NEEDED; 5792 break; 5793 } 5794 5795 if (fcport->fc4f_nvme) { 5796 if (fcport->disc_state == DSC_DELETE_PEND) { 5797 fcport->disc_state = DSC_GNL; 5798 vha->fcport_count--; 5799 fcport->login_succ = 0; 5800 } 5801 } 5802 5803 if (found) { 5804 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5805 continue; 5806 } 5807 /* If device was not in our fcports list, then add it. */ 5808 new_fcport->scan_state = QLA_FCPORT_FOUND; 5809 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5810 5811 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5812 5813 5814 /* Allocate a new replacement fcport. */ 5815 nxt_d_id.b24 = new_fcport->d_id.b24; 5816 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5817 if (new_fcport == NULL) { 5818 ql_log(ql_log_warn, vha, 0xd032, 5819 "Memory allocation failed for fcport.\n"); 5820 return (QLA_MEMORY_ALLOC_FAILED); 5821 } 5822 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5823 new_fcport->d_id.b24 = nxt_d_id.b24; 5824 } 5825 5826 qla2x00_free_fcport(new_fcport); 5827 5828 /* 5829 * Logout all previous fabric dev marked lost, except FCP2 devices. 5830 */ 5831 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5832 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5833 break; 5834 5835 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5836 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5837 continue; 5838 5839 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5840 if ((qla_dual_mode_enabled(vha) || 5841 qla_ini_mode_enabled(vha)) && 5842 atomic_read(&fcport->state) == FCS_ONLINE) { 5843 qla2x00_mark_device_lost(vha, fcport, 5844 ql2xplogiabsentdevice, 0); 5845 if (fcport->loop_id != FC_NO_LOOP_ID && 5846 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5847 fcport->port_type != FCT_INITIATOR && 5848 fcport->port_type != FCT_BROADCAST) { 5849 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5850 "%s %d %8phC post del sess\n", 5851 __func__, __LINE__, 5852 fcport->port_name); 5853 qlt_schedule_sess_for_deletion(fcport); 5854 continue; 5855 } 5856 } 5857 } 5858 5859 if (fcport->scan_state == QLA_FCPORT_FOUND) 5860 qla24xx_fcport_handle_login(vha, fcport); 5861 } 5862 return (rval); 5863 } 5864 5865 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 5866 int 5867 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 5868 { 5869 int loop_id = FC_NO_LOOP_ID; 5870 int lid = NPH_MGMT_SERVER - vha->vp_idx; 5871 unsigned long flags; 5872 struct qla_hw_data *ha = vha->hw; 5873 5874 if (vha->vp_idx == 0) { 5875 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 5876 return NPH_MGMT_SERVER; 5877 } 5878 5879 /* pick id from high and work down to low */ 5880 spin_lock_irqsave(&ha->vport_slock, flags); 5881 for (; lid > 0; lid--) { 5882 if (!test_bit(lid, vha->hw->loop_id_map)) { 5883 set_bit(lid, vha->hw->loop_id_map); 5884 loop_id = lid; 5885 break; 5886 } 5887 } 5888 spin_unlock_irqrestore(&ha->vport_slock, flags); 5889 5890 return loop_id; 5891 } 5892 5893 /* 5894 * qla2x00_fabric_login 5895 * Issue fabric login command. 5896 * 5897 * Input: 5898 * ha = adapter block pointer. 5899 * device = pointer to FC device type structure. 5900 * 5901 * Returns: 5902 * 0 - Login successfully 5903 * 1 - Login failed 5904 * 2 - Initiator device 5905 * 3 - Fatal error 5906 */ 5907 int 5908 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5909 uint16_t *next_loopid) 5910 { 5911 int rval; 5912 int retry; 5913 uint16_t tmp_loopid; 5914 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5915 struct qla_hw_data *ha = vha->hw; 5916 5917 retry = 0; 5918 tmp_loopid = 0; 5919 5920 for (;;) { 5921 ql_dbg(ql_dbg_disc, vha, 0x2000, 5922 "Trying Fabric Login w/loop id 0x%04x for port " 5923 "%02x%02x%02x.\n", 5924 fcport->loop_id, fcport->d_id.b.domain, 5925 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5926 5927 /* Login fcport on switch. */ 5928 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5929 fcport->d_id.b.domain, fcport->d_id.b.area, 5930 fcport->d_id.b.al_pa, mb, BIT_0); 5931 if (rval != QLA_SUCCESS) { 5932 return rval; 5933 } 5934 if (mb[0] == MBS_PORT_ID_USED) { 5935 /* 5936 * Device has another loop ID. The firmware team 5937 * recommends the driver perform an implicit login with 5938 * the specified ID again. The ID we just used is save 5939 * here so we return with an ID that can be tried by 5940 * the next login. 5941 */ 5942 retry++; 5943 tmp_loopid = fcport->loop_id; 5944 fcport->loop_id = mb[1]; 5945 5946 ql_dbg(ql_dbg_disc, vha, 0x2001, 5947 "Fabric Login: port in use - next loop " 5948 "id=0x%04x, port id= %02x%02x%02x.\n", 5949 fcport->loop_id, fcport->d_id.b.domain, 5950 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5951 5952 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5953 /* 5954 * Login succeeded. 5955 */ 5956 if (retry) { 5957 /* A retry occurred before. */ 5958 *next_loopid = tmp_loopid; 5959 } else { 5960 /* 5961 * No retry occurred before. Just increment the 5962 * ID value for next login. 5963 */ 5964 *next_loopid = (fcport->loop_id + 1); 5965 } 5966 5967 if (mb[1] & BIT_0) { 5968 fcport->port_type = FCT_INITIATOR; 5969 } else { 5970 fcport->port_type = FCT_TARGET; 5971 if (mb[1] & BIT_1) { 5972 fcport->flags |= FCF_FCP2_DEVICE; 5973 } 5974 } 5975 5976 if (mb[10] & BIT_0) 5977 fcport->supported_classes |= FC_COS_CLASS2; 5978 if (mb[10] & BIT_1) 5979 fcport->supported_classes |= FC_COS_CLASS3; 5980 5981 if (IS_FWI2_CAPABLE(ha)) { 5982 if (mb[10] & BIT_7) 5983 fcport->flags |= 5984 FCF_CONF_COMP_SUPPORTED; 5985 } 5986 5987 rval = QLA_SUCCESS; 5988 break; 5989 } else if (mb[0] == MBS_LOOP_ID_USED) { 5990 /* 5991 * Loop ID already used, try next loop ID. 5992 */ 5993 fcport->loop_id++; 5994 rval = qla2x00_find_new_loop_id(vha, fcport); 5995 if (rval != QLA_SUCCESS) { 5996 /* Ran out of loop IDs to use */ 5997 break; 5998 } 5999 } else if (mb[0] == MBS_COMMAND_ERROR) { 6000 /* 6001 * Firmware possibly timed out during login. If NO 6002 * retries are left to do then the device is declared 6003 * dead. 6004 */ 6005 *next_loopid = fcport->loop_id; 6006 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6007 fcport->d_id.b.domain, fcport->d_id.b.area, 6008 fcport->d_id.b.al_pa); 6009 qla2x00_mark_device_lost(vha, fcport, 1, 0); 6010 6011 rval = 1; 6012 break; 6013 } else { 6014 /* 6015 * unrecoverable / not handled error 6016 */ 6017 ql_dbg(ql_dbg_disc, vha, 0x2002, 6018 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6019 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6020 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6021 fcport->loop_id, jiffies); 6022 6023 *next_loopid = fcport->loop_id; 6024 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6025 fcport->d_id.b.domain, fcport->d_id.b.area, 6026 fcport->d_id.b.al_pa); 6027 qla2x00_clear_loop_id(fcport); 6028 fcport->login_retry = 0; 6029 6030 rval = 3; 6031 break; 6032 } 6033 } 6034 6035 return (rval); 6036 } 6037 6038 /* 6039 * qla2x00_local_device_login 6040 * Issue local device login command. 6041 * 6042 * Input: 6043 * ha = adapter block pointer. 6044 * loop_id = loop id of device to login to. 6045 * 6046 * Returns (Where's the #define!!!!): 6047 * 0 - Login successfully 6048 * 1 - Login failed 6049 * 3 - Fatal error 6050 */ 6051 int 6052 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6053 { 6054 int rval; 6055 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6056 6057 memset(mb, 0, sizeof(mb)); 6058 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6059 if (rval == QLA_SUCCESS) { 6060 /* Interrogate mailbox registers for any errors */ 6061 if (mb[0] == MBS_COMMAND_ERROR) 6062 rval = 1; 6063 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6064 /* device not in PCB table */ 6065 rval = 3; 6066 } 6067 6068 return (rval); 6069 } 6070 6071 /* 6072 * qla2x00_loop_resync 6073 * Resync with fibre channel devices. 6074 * 6075 * Input: 6076 * ha = adapter block pointer. 6077 * 6078 * Returns: 6079 * 0 = success 6080 */ 6081 int 6082 qla2x00_loop_resync(scsi_qla_host_t *vha) 6083 { 6084 int rval = QLA_SUCCESS; 6085 uint32_t wait_time; 6086 6087 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6088 if (vha->flags.online) { 6089 if (!(rval = qla2x00_fw_ready(vha))) { 6090 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6091 wait_time = 256; 6092 do { 6093 if (!IS_QLAFX00(vha->hw)) { 6094 /* 6095 * Issue a marker after FW becomes 6096 * ready. 6097 */ 6098 qla2x00_marker(vha, vha->hw->base_qpair, 6099 0, 0, MK_SYNC_ALL); 6100 vha->marker_needed = 0; 6101 } 6102 6103 /* Remap devices on Loop. */ 6104 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6105 6106 if (IS_QLAFX00(vha->hw)) 6107 qlafx00_configure_devices(vha); 6108 else 6109 qla2x00_configure_loop(vha); 6110 6111 wait_time--; 6112 } while (!atomic_read(&vha->loop_down_timer) && 6113 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6114 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6115 &vha->dpc_flags))); 6116 } 6117 } 6118 6119 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6120 return (QLA_FUNCTION_FAILED); 6121 6122 if (rval) 6123 ql_dbg(ql_dbg_disc, vha, 0x206c, 6124 "%s *** FAILED ***.\n", __func__); 6125 6126 return (rval); 6127 } 6128 6129 /* 6130 * qla2x00_perform_loop_resync 6131 * Description: This function will set the appropriate flags and call 6132 * qla2x00_loop_resync. If successful loop will be resynced 6133 * Arguments : scsi_qla_host_t pointer 6134 * returm : Success or Failure 6135 */ 6136 6137 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6138 { 6139 int32_t rval = 0; 6140 6141 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6142 /*Configure the flags so that resync happens properly*/ 6143 atomic_set(&ha->loop_down_timer, 0); 6144 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6145 atomic_set(&ha->loop_state, LOOP_UP); 6146 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6147 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6148 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6149 6150 rval = qla2x00_loop_resync(ha); 6151 } else 6152 atomic_set(&ha->loop_state, LOOP_DEAD); 6153 6154 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6155 } 6156 6157 return rval; 6158 } 6159 6160 void 6161 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6162 { 6163 fc_port_t *fcport; 6164 struct scsi_qla_host *vha; 6165 struct qla_hw_data *ha = base_vha->hw; 6166 unsigned long flags; 6167 6168 spin_lock_irqsave(&ha->vport_slock, flags); 6169 /* Go with deferred removal of rport references. */ 6170 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6171 atomic_inc(&vha->vref_count); 6172 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6173 if (fcport->drport && 6174 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6175 spin_unlock_irqrestore(&ha->vport_slock, flags); 6176 qla2x00_rport_del(fcport); 6177 6178 spin_lock_irqsave(&ha->vport_slock, flags); 6179 } 6180 } 6181 atomic_dec(&vha->vref_count); 6182 wake_up(&vha->vref_waitq); 6183 } 6184 spin_unlock_irqrestore(&ha->vport_slock, flags); 6185 } 6186 6187 /* Assumes idc_lock always held on entry */ 6188 void 6189 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6190 { 6191 struct qla_hw_data *ha = vha->hw; 6192 uint32_t drv_presence, drv_presence_mask; 6193 uint32_t dev_part_info1, dev_part_info2, class_type; 6194 uint32_t class_type_mask = 0x3; 6195 uint16_t fcoe_other_function = 0xffff, i; 6196 6197 if (IS_QLA8044(ha)) { 6198 drv_presence = qla8044_rd_direct(vha, 6199 QLA8044_CRB_DRV_ACTIVE_INDEX); 6200 dev_part_info1 = qla8044_rd_direct(vha, 6201 QLA8044_CRB_DEV_PART_INFO_INDEX); 6202 dev_part_info2 = qla8044_rd_direct(vha, 6203 QLA8044_CRB_DEV_PART_INFO2); 6204 } else { 6205 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6206 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6207 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6208 } 6209 for (i = 0; i < 8; i++) { 6210 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6211 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6212 (i != ha->portnum)) { 6213 fcoe_other_function = i; 6214 break; 6215 } 6216 } 6217 if (fcoe_other_function == 0xffff) { 6218 for (i = 0; i < 8; i++) { 6219 class_type = ((dev_part_info2 >> (i * 4)) & 6220 class_type_mask); 6221 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6222 ((i + 8) != ha->portnum)) { 6223 fcoe_other_function = i + 8; 6224 break; 6225 } 6226 } 6227 } 6228 /* 6229 * Prepare drv-presence mask based on fcoe functions present. 6230 * However consider only valid physical fcoe function numbers (0-15). 6231 */ 6232 drv_presence_mask = ~((1 << (ha->portnum)) | 6233 ((fcoe_other_function == 0xffff) ? 6234 0 : (1 << (fcoe_other_function)))); 6235 6236 /* We are the reset owner iff: 6237 * - No other protocol drivers present. 6238 * - This is the lowest among fcoe functions. */ 6239 if (!(drv_presence & drv_presence_mask) && 6240 (ha->portnum < fcoe_other_function)) { 6241 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6242 "This host is Reset owner.\n"); 6243 ha->flags.nic_core_reset_owner = 1; 6244 } 6245 } 6246 6247 static int 6248 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6249 { 6250 int rval = QLA_SUCCESS; 6251 struct qla_hw_data *ha = vha->hw; 6252 uint32_t drv_ack; 6253 6254 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6255 if (rval == QLA_SUCCESS) { 6256 drv_ack |= (1 << ha->portnum); 6257 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6258 } 6259 6260 return rval; 6261 } 6262 6263 static int 6264 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6265 { 6266 int rval = QLA_SUCCESS; 6267 struct qla_hw_data *ha = vha->hw; 6268 uint32_t drv_ack; 6269 6270 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6271 if (rval == QLA_SUCCESS) { 6272 drv_ack &= ~(1 << ha->portnum); 6273 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6274 } 6275 6276 return rval; 6277 } 6278 6279 static const char * 6280 qla83xx_dev_state_to_string(uint32_t dev_state) 6281 { 6282 switch (dev_state) { 6283 case QLA8XXX_DEV_COLD: 6284 return "COLD/RE-INIT"; 6285 case QLA8XXX_DEV_INITIALIZING: 6286 return "INITIALIZING"; 6287 case QLA8XXX_DEV_READY: 6288 return "READY"; 6289 case QLA8XXX_DEV_NEED_RESET: 6290 return "NEED RESET"; 6291 case QLA8XXX_DEV_NEED_QUIESCENT: 6292 return "NEED QUIESCENT"; 6293 case QLA8XXX_DEV_FAILED: 6294 return "FAILED"; 6295 case QLA8XXX_DEV_QUIESCENT: 6296 return "QUIESCENT"; 6297 default: 6298 return "Unknown"; 6299 } 6300 } 6301 6302 /* Assumes idc-lock always held on entry */ 6303 void 6304 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6305 { 6306 struct qla_hw_data *ha = vha->hw; 6307 uint32_t idc_audit_reg = 0, duration_secs = 0; 6308 6309 switch (audit_type) { 6310 case IDC_AUDIT_TIMESTAMP: 6311 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6312 idc_audit_reg = (ha->portnum) | 6313 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6314 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6315 break; 6316 6317 case IDC_AUDIT_COMPLETION: 6318 duration_secs = ((jiffies_to_msecs(jiffies) - 6319 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6320 idc_audit_reg = (ha->portnum) | 6321 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6322 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6323 break; 6324 6325 default: 6326 ql_log(ql_log_warn, vha, 0xb078, 6327 "Invalid audit type specified.\n"); 6328 break; 6329 } 6330 } 6331 6332 /* Assumes idc_lock always held on entry */ 6333 static int 6334 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6335 { 6336 struct qla_hw_data *ha = vha->hw; 6337 uint32_t idc_control, dev_state; 6338 6339 __qla83xx_get_idc_control(vha, &idc_control); 6340 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6341 ql_log(ql_log_info, vha, 0xb080, 6342 "NIC Core reset has been disabled. idc-control=0x%x\n", 6343 idc_control); 6344 return QLA_FUNCTION_FAILED; 6345 } 6346 6347 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6348 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6349 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6350 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6351 QLA8XXX_DEV_NEED_RESET); 6352 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6353 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6354 } else { 6355 const char *state = qla83xx_dev_state_to_string(dev_state); 6356 6357 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6358 6359 /* SV: XXX: Is timeout required here? */ 6360 /* Wait for IDC state change READY -> NEED_RESET */ 6361 while (dev_state == QLA8XXX_DEV_READY) { 6362 qla83xx_idc_unlock(vha, 0); 6363 msleep(200); 6364 qla83xx_idc_lock(vha, 0); 6365 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6366 } 6367 } 6368 6369 /* Send IDC ack by writing to drv-ack register */ 6370 __qla83xx_set_drv_ack(vha); 6371 6372 return QLA_SUCCESS; 6373 } 6374 6375 int 6376 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6377 { 6378 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6379 } 6380 6381 int 6382 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6383 { 6384 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6385 } 6386 6387 static int 6388 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6389 { 6390 uint32_t drv_presence = 0; 6391 struct qla_hw_data *ha = vha->hw; 6392 6393 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6394 if (drv_presence & (1 << ha->portnum)) 6395 return QLA_SUCCESS; 6396 else 6397 return QLA_TEST_FAILED; 6398 } 6399 6400 int 6401 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6402 { 6403 int rval = QLA_SUCCESS; 6404 struct qla_hw_data *ha = vha->hw; 6405 6406 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6407 "Entered %s().\n", __func__); 6408 6409 if (vha->device_flags & DFLG_DEV_FAILED) { 6410 ql_log(ql_log_warn, vha, 0xb059, 6411 "Device in unrecoverable FAILED state.\n"); 6412 return QLA_FUNCTION_FAILED; 6413 } 6414 6415 qla83xx_idc_lock(vha, 0); 6416 6417 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6418 ql_log(ql_log_warn, vha, 0xb05a, 6419 "Function=0x%x has been removed from IDC participation.\n", 6420 ha->portnum); 6421 rval = QLA_FUNCTION_FAILED; 6422 goto exit; 6423 } 6424 6425 qla83xx_reset_ownership(vha); 6426 6427 rval = qla83xx_initiating_reset(vha); 6428 6429 /* 6430 * Perform reset if we are the reset-owner, 6431 * else wait till IDC state changes to READY/FAILED. 6432 */ 6433 if (rval == QLA_SUCCESS) { 6434 rval = qla83xx_idc_state_handler(vha); 6435 6436 if (rval == QLA_SUCCESS) 6437 ha->flags.nic_core_hung = 0; 6438 __qla83xx_clear_drv_ack(vha); 6439 } 6440 6441 exit: 6442 qla83xx_idc_unlock(vha, 0); 6443 6444 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6445 6446 return rval; 6447 } 6448 6449 int 6450 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6451 { 6452 struct qla_hw_data *ha = vha->hw; 6453 int rval = QLA_FUNCTION_FAILED; 6454 6455 if (!IS_MCTP_CAPABLE(ha)) { 6456 /* This message can be removed from the final version */ 6457 ql_log(ql_log_info, vha, 0x506d, 6458 "This board is not MCTP capable\n"); 6459 return rval; 6460 } 6461 6462 if (!ha->mctp_dump) { 6463 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6464 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6465 6466 if (!ha->mctp_dump) { 6467 ql_log(ql_log_warn, vha, 0x506e, 6468 "Failed to allocate memory for mctp dump\n"); 6469 return rval; 6470 } 6471 } 6472 6473 #define MCTP_DUMP_STR_ADDR 0x00000000 6474 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6475 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6476 if (rval != QLA_SUCCESS) { 6477 ql_log(ql_log_warn, vha, 0x506f, 6478 "Failed to capture mctp dump\n"); 6479 } else { 6480 ql_log(ql_log_info, vha, 0x5070, 6481 "Mctp dump capture for host (%ld/%p).\n", 6482 vha->host_no, ha->mctp_dump); 6483 ha->mctp_dumped = 1; 6484 } 6485 6486 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6487 ha->flags.nic_core_reset_hdlr_active = 1; 6488 rval = qla83xx_restart_nic_firmware(vha); 6489 if (rval) 6490 /* NIC Core reset failed. */ 6491 ql_log(ql_log_warn, vha, 0x5071, 6492 "Failed to restart nic firmware\n"); 6493 else 6494 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6495 "Restarted NIC firmware successfully.\n"); 6496 ha->flags.nic_core_reset_hdlr_active = 0; 6497 } 6498 6499 return rval; 6500 6501 } 6502 6503 /* 6504 * qla2x00_quiesce_io 6505 * Description: This function will block the new I/Os 6506 * Its not aborting any I/Os as context 6507 * is not destroyed during quiescence 6508 * Arguments: scsi_qla_host_t 6509 * return : void 6510 */ 6511 void 6512 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6513 { 6514 struct qla_hw_data *ha = vha->hw; 6515 struct scsi_qla_host *vp; 6516 6517 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6518 "Quiescing I/O - ha=%p.\n", ha); 6519 6520 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6521 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6522 atomic_set(&vha->loop_state, LOOP_DOWN); 6523 qla2x00_mark_all_devices_lost(vha, 0); 6524 list_for_each_entry(vp, &ha->vp_list, list) 6525 qla2x00_mark_all_devices_lost(vp, 0); 6526 } else { 6527 if (!atomic_read(&vha->loop_down_timer)) 6528 atomic_set(&vha->loop_down_timer, 6529 LOOP_DOWN_TIME); 6530 } 6531 /* Wait for pending cmds to complete */ 6532 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 6533 != QLA_SUCCESS); 6534 } 6535 6536 void 6537 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6538 { 6539 struct qla_hw_data *ha = vha->hw; 6540 struct scsi_qla_host *vp; 6541 unsigned long flags; 6542 fc_port_t *fcport; 6543 u16 i; 6544 6545 /* For ISP82XX, driver waits for completion of the commands. 6546 * online flag should be set. 6547 */ 6548 if (!(IS_P3P_TYPE(ha))) 6549 vha->flags.online = 0; 6550 ha->flags.chip_reset_done = 0; 6551 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6552 vha->qla_stats.total_isp_aborts++; 6553 6554 ql_log(ql_log_info, vha, 0x00af, 6555 "Performing ISP error recovery - ha=%p.\n", ha); 6556 6557 ha->flags.purge_mbox = 1; 6558 /* For ISP82XX, reset_chip is just disabling interrupts. 6559 * Driver waits for the completion of the commands. 6560 * the interrupts need to be enabled. 6561 */ 6562 if (!(IS_P3P_TYPE(ha))) 6563 ha->isp_ops->reset_chip(vha); 6564 6565 ha->link_data_rate = PORT_SPEED_UNKNOWN; 6566 SAVE_TOPO(ha); 6567 ha->flags.rida_fmt2 = 0; 6568 ha->flags.n2n_ae = 0; 6569 ha->flags.lip_ae = 0; 6570 ha->current_topology = 0; 6571 ha->flags.fw_started = 0; 6572 ha->flags.fw_init_done = 0; 6573 ha->chip_reset++; 6574 ha->base_qpair->chip_reset = ha->chip_reset; 6575 for (i = 0; i < ha->max_qpairs; i++) { 6576 if (ha->queue_pair_map[i]) 6577 ha->queue_pair_map[i]->chip_reset = 6578 ha->base_qpair->chip_reset; 6579 } 6580 6581 /* purge MBox commands */ 6582 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6583 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6584 complete(&ha->mbx_intr_comp); 6585 } 6586 6587 i = 0; 6588 while (atomic_read(&ha->num_pend_mbx_stage3) || 6589 atomic_read(&ha->num_pend_mbx_stage2) || 6590 atomic_read(&ha->num_pend_mbx_stage1)) { 6591 msleep(20); 6592 i++; 6593 if (i > 50) 6594 break; 6595 } 6596 ha->flags.purge_mbox = 0; 6597 6598 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6599 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6600 atomic_set(&vha->loop_state, LOOP_DOWN); 6601 qla2x00_mark_all_devices_lost(vha, 0); 6602 6603 spin_lock_irqsave(&ha->vport_slock, flags); 6604 list_for_each_entry(vp, &ha->vp_list, list) { 6605 atomic_inc(&vp->vref_count); 6606 spin_unlock_irqrestore(&ha->vport_slock, flags); 6607 6608 qla2x00_mark_all_devices_lost(vp, 0); 6609 6610 spin_lock_irqsave(&ha->vport_slock, flags); 6611 atomic_dec(&vp->vref_count); 6612 } 6613 spin_unlock_irqrestore(&ha->vport_slock, flags); 6614 } else { 6615 if (!atomic_read(&vha->loop_down_timer)) 6616 atomic_set(&vha->loop_down_timer, 6617 LOOP_DOWN_TIME); 6618 } 6619 6620 /* Clear all async request states across all VPs. */ 6621 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6622 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6623 fcport->scan_state = 0; 6624 } 6625 spin_lock_irqsave(&ha->vport_slock, flags); 6626 list_for_each_entry(vp, &ha->vp_list, list) { 6627 atomic_inc(&vp->vref_count); 6628 spin_unlock_irqrestore(&ha->vport_slock, flags); 6629 6630 list_for_each_entry(fcport, &vp->vp_fcports, list) 6631 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6632 6633 spin_lock_irqsave(&ha->vport_slock, flags); 6634 atomic_dec(&vp->vref_count); 6635 } 6636 spin_unlock_irqrestore(&ha->vport_slock, flags); 6637 6638 if (!ha->flags.eeh_busy) { 6639 /* Make sure for ISP 82XX IO DMA is complete */ 6640 if (IS_P3P_TYPE(ha)) { 6641 qla82xx_chip_reset_cleanup(vha); 6642 ql_log(ql_log_info, vha, 0x00b4, 6643 "Done chip reset cleanup.\n"); 6644 6645 /* Done waiting for pending commands. 6646 * Reset the online flag. 6647 */ 6648 vha->flags.online = 0; 6649 } 6650 6651 /* Requeue all commands in outstanding command list. */ 6652 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6653 } 6654 /* memory barrier */ 6655 wmb(); 6656 } 6657 6658 /* 6659 * qla2x00_abort_isp 6660 * Resets ISP and aborts all outstanding commands. 6661 * 6662 * Input: 6663 * ha = adapter block pointer. 6664 * 6665 * Returns: 6666 * 0 = success 6667 */ 6668 int 6669 qla2x00_abort_isp(scsi_qla_host_t *vha) 6670 { 6671 int rval; 6672 uint8_t status = 0; 6673 struct qla_hw_data *ha = vha->hw; 6674 struct scsi_qla_host *vp; 6675 struct req_que *req = ha->req_q_map[0]; 6676 unsigned long flags; 6677 6678 if (vha->flags.online) { 6679 qla2x00_abort_isp_cleanup(vha); 6680 6681 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 6682 ha->flags.chip_reset_done = 1; 6683 vha->flags.online = 1; 6684 status = 0; 6685 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6686 return status; 6687 } 6688 6689 if (IS_QLA8031(ha)) { 6690 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6691 "Clearing fcoe driver presence.\n"); 6692 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6693 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6694 "Error while clearing DRV-Presence.\n"); 6695 } 6696 6697 if (unlikely(pci_channel_offline(ha->pdev) && 6698 ha->flags.pci_channel_io_perm_failure)) { 6699 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6700 status = 0; 6701 return status; 6702 } 6703 6704 switch (vha->qlini_mode) { 6705 case QLA2XXX_INI_MODE_DISABLED: 6706 if (!qla_tgt_mode_enabled(vha)) 6707 return 0; 6708 break; 6709 case QLA2XXX_INI_MODE_DUAL: 6710 if (!qla_dual_mode_enabled(vha)) 6711 return 0; 6712 break; 6713 case QLA2XXX_INI_MODE_ENABLED: 6714 default: 6715 break; 6716 } 6717 6718 ha->isp_ops->get_flash_version(vha, req->ring); 6719 6720 ha->isp_ops->nvram_config(vha); 6721 6722 if (!qla2x00_restart_isp(vha)) { 6723 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6724 6725 if (!atomic_read(&vha->loop_down_timer)) { 6726 /* 6727 * Issue marker command only when we are going 6728 * to start the I/O . 6729 */ 6730 vha->marker_needed = 1; 6731 } 6732 6733 vha->flags.online = 1; 6734 6735 ha->isp_ops->enable_intrs(ha); 6736 6737 ha->isp_abort_cnt = 0; 6738 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6739 6740 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6741 qla2x00_get_fw_version(vha); 6742 if (ha->fce) { 6743 ha->flags.fce_enabled = 1; 6744 memset(ha->fce, 0, 6745 fce_calc_size(ha->fce_bufs)); 6746 rval = qla2x00_enable_fce_trace(vha, 6747 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6748 &ha->fce_bufs); 6749 if (rval) { 6750 ql_log(ql_log_warn, vha, 0x8033, 6751 "Unable to reinitialize FCE " 6752 "(%d).\n", rval); 6753 ha->flags.fce_enabled = 0; 6754 } 6755 } 6756 6757 if (ha->eft) { 6758 memset(ha->eft, 0, EFT_SIZE); 6759 rval = qla2x00_enable_eft_trace(vha, 6760 ha->eft_dma, EFT_NUM_BUFFERS); 6761 if (rval) { 6762 ql_log(ql_log_warn, vha, 0x8034, 6763 "Unable to reinitialize EFT " 6764 "(%d).\n", rval); 6765 } 6766 } 6767 } else { /* failed the ISP abort */ 6768 vha->flags.online = 1; 6769 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6770 if (ha->isp_abort_cnt == 0) { 6771 ql_log(ql_log_fatal, vha, 0x8035, 6772 "ISP error recover failed - " 6773 "board disabled.\n"); 6774 /* 6775 * The next call disables the board 6776 * completely. 6777 */ 6778 qla2x00_abort_isp_cleanup(vha); 6779 vha->flags.online = 0; 6780 clear_bit(ISP_ABORT_RETRY, 6781 &vha->dpc_flags); 6782 status = 0; 6783 } else { /* schedule another ISP abort */ 6784 ha->isp_abort_cnt--; 6785 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6786 "ISP abort - retry remaining %d.\n", 6787 ha->isp_abort_cnt); 6788 status = 1; 6789 } 6790 } else { 6791 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6792 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6793 "ISP error recovery - retrying (%d) " 6794 "more times.\n", ha->isp_abort_cnt); 6795 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6796 status = 1; 6797 } 6798 } 6799 6800 } 6801 6802 if (!status) { 6803 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6804 qla2x00_configure_hba(vha); 6805 spin_lock_irqsave(&ha->vport_slock, flags); 6806 list_for_each_entry(vp, &ha->vp_list, list) { 6807 if (vp->vp_idx) { 6808 atomic_inc(&vp->vref_count); 6809 spin_unlock_irqrestore(&ha->vport_slock, flags); 6810 6811 qla2x00_vp_abort_isp(vp); 6812 6813 spin_lock_irqsave(&ha->vport_slock, flags); 6814 atomic_dec(&vp->vref_count); 6815 } 6816 } 6817 spin_unlock_irqrestore(&ha->vport_slock, flags); 6818 6819 if (IS_QLA8031(ha)) { 6820 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6821 "Setting back fcoe driver presence.\n"); 6822 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6823 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6824 "Error while setting DRV-Presence.\n"); 6825 } 6826 } else { 6827 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6828 __func__); 6829 } 6830 6831 return(status); 6832 } 6833 6834 /* 6835 * qla2x00_restart_isp 6836 * restarts the ISP after a reset 6837 * 6838 * Input: 6839 * ha = adapter block pointer. 6840 * 6841 * Returns: 6842 * 0 = success 6843 */ 6844 static int 6845 qla2x00_restart_isp(scsi_qla_host_t *vha) 6846 { 6847 int status = 0; 6848 struct qla_hw_data *ha = vha->hw; 6849 6850 /* If firmware needs to be loaded */ 6851 if (qla2x00_isp_firmware(vha)) { 6852 vha->flags.online = 0; 6853 status = ha->isp_ops->chip_diag(vha); 6854 if (!status) 6855 status = qla2x00_setup_chip(vha); 6856 } 6857 6858 if (!status && !(status = qla2x00_init_rings(vha))) { 6859 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6860 ha->flags.chip_reset_done = 1; 6861 6862 /* Initialize the queues in use */ 6863 qla25xx_init_queues(ha); 6864 6865 status = qla2x00_fw_ready(vha); 6866 if (!status) { 6867 /* Issue a marker after FW becomes ready. */ 6868 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 6869 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6870 } 6871 6872 /* if no cable then assume it's good */ 6873 if ((vha->device_flags & DFLG_NO_CABLE)) 6874 status = 0; 6875 } 6876 return (status); 6877 } 6878 6879 static int 6880 qla25xx_init_queues(struct qla_hw_data *ha) 6881 { 6882 struct rsp_que *rsp = NULL; 6883 struct req_que *req = NULL; 6884 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6885 int ret = -1; 6886 int i; 6887 6888 for (i = 1; i < ha->max_rsp_queues; i++) { 6889 rsp = ha->rsp_q_map[i]; 6890 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6891 rsp->options &= ~BIT_0; 6892 ret = qla25xx_init_rsp_que(base_vha, rsp); 6893 if (ret != QLA_SUCCESS) 6894 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6895 "%s Rsp que: %d init failed.\n", 6896 __func__, rsp->id); 6897 else 6898 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6899 "%s Rsp que: %d inited.\n", 6900 __func__, rsp->id); 6901 } 6902 } 6903 for (i = 1; i < ha->max_req_queues; i++) { 6904 req = ha->req_q_map[i]; 6905 if (req && test_bit(i, ha->req_qid_map)) { 6906 /* Clear outstanding commands array. */ 6907 req->options &= ~BIT_0; 6908 ret = qla25xx_init_req_que(base_vha, req); 6909 if (ret != QLA_SUCCESS) 6910 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6911 "%s Req que: %d init failed.\n", 6912 __func__, req->id); 6913 else 6914 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6915 "%s Req que: %d inited.\n", 6916 __func__, req->id); 6917 } 6918 } 6919 return ret; 6920 } 6921 6922 /* 6923 * qla2x00_reset_adapter 6924 * Reset adapter. 6925 * 6926 * Input: 6927 * ha = adapter block pointer. 6928 */ 6929 int 6930 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6931 { 6932 unsigned long flags = 0; 6933 struct qla_hw_data *ha = vha->hw; 6934 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6935 6936 vha->flags.online = 0; 6937 ha->isp_ops->disable_intrs(ha); 6938 6939 spin_lock_irqsave(&ha->hardware_lock, flags); 6940 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6941 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6942 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6943 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6944 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6945 6946 return QLA_SUCCESS; 6947 } 6948 6949 int 6950 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6951 { 6952 unsigned long flags = 0; 6953 struct qla_hw_data *ha = vha->hw; 6954 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6955 int rval = QLA_SUCCESS; 6956 6957 if (IS_P3P_TYPE(ha)) 6958 return rval; 6959 6960 vha->flags.online = 0; 6961 ha->isp_ops->disable_intrs(ha); 6962 6963 spin_lock_irqsave(&ha->hardware_lock, flags); 6964 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6965 RD_REG_DWORD(®->hccr); 6966 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6967 RD_REG_DWORD(®->hccr); 6968 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6969 6970 if (IS_NOPOLLING_TYPE(ha)) 6971 ha->isp_ops->enable_intrs(ha); 6972 6973 return rval; 6974 } 6975 6976 /* On sparc systems, obtain port and node WWN from firmware 6977 * properties. 6978 */ 6979 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6980 struct nvram_24xx *nv) 6981 { 6982 #ifdef CONFIG_SPARC 6983 struct qla_hw_data *ha = vha->hw; 6984 struct pci_dev *pdev = ha->pdev; 6985 struct device_node *dp = pci_device_to_OF_node(pdev); 6986 const u8 *val; 6987 int len; 6988 6989 val = of_get_property(dp, "port-wwn", &len); 6990 if (val && len >= WWN_SIZE) 6991 memcpy(nv->port_name, val, WWN_SIZE); 6992 6993 val = of_get_property(dp, "node-wwn", &len); 6994 if (val && len >= WWN_SIZE) 6995 memcpy(nv->node_name, val, WWN_SIZE); 6996 #endif 6997 } 6998 6999 int 7000 qla24xx_nvram_config(scsi_qla_host_t *vha) 7001 { 7002 int rval; 7003 struct init_cb_24xx *icb; 7004 struct nvram_24xx *nv; 7005 uint32_t *dptr; 7006 uint8_t *dptr1, *dptr2; 7007 uint32_t chksum; 7008 uint16_t cnt; 7009 struct qla_hw_data *ha = vha->hw; 7010 7011 rval = QLA_SUCCESS; 7012 icb = (struct init_cb_24xx *)ha->init_cb; 7013 nv = ha->nvram; 7014 7015 /* Determine NVRAM starting address. */ 7016 if (ha->port_no == 0) { 7017 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7018 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7019 } else { 7020 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7021 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7022 } 7023 7024 ha->nvram_size = sizeof(*nv); 7025 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7026 7027 /* Get VPD data into cache */ 7028 ha->vpd = ha->nvram + VPD_OFFSET; 7029 ha->isp_ops->read_nvram(vha, ha->vpd, 7030 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7031 7032 /* Get NVRAM data into cache and calculate checksum. */ 7033 dptr = (uint32_t *)nv; 7034 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7035 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7036 chksum += le32_to_cpu(*dptr); 7037 7038 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7039 "Contents of NVRAM\n"); 7040 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7041 nv, ha->nvram_size); 7042 7043 /* Bad NVRAM data, set defaults parameters. */ 7044 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7045 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7046 /* Reset NVRAM data. */ 7047 ql_log(ql_log_warn, vha, 0x006b, 7048 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7049 chksum, nv->id, nv->nvram_version); 7050 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7051 ql_log(ql_log_warn, vha, 0x006c, 7052 "Falling back to functioning (yet invalid -- WWPN) " 7053 "defaults.\n"); 7054 7055 /* 7056 * Set default initialization control block. 7057 */ 7058 memset(nv, 0, ha->nvram_size); 7059 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7060 nv->version = cpu_to_le16(ICB_VERSION); 7061 nv->frame_payload_size = 2048; 7062 nv->execution_throttle = cpu_to_le16(0xFFFF); 7063 nv->exchange_count = cpu_to_le16(0); 7064 nv->hard_address = cpu_to_le16(124); 7065 nv->port_name[0] = 0x21; 7066 nv->port_name[1] = 0x00 + ha->port_no + 1; 7067 nv->port_name[2] = 0x00; 7068 nv->port_name[3] = 0xe0; 7069 nv->port_name[4] = 0x8b; 7070 nv->port_name[5] = 0x1c; 7071 nv->port_name[6] = 0x55; 7072 nv->port_name[7] = 0x86; 7073 nv->node_name[0] = 0x20; 7074 nv->node_name[1] = 0x00; 7075 nv->node_name[2] = 0x00; 7076 nv->node_name[3] = 0xe0; 7077 nv->node_name[4] = 0x8b; 7078 nv->node_name[5] = 0x1c; 7079 nv->node_name[6] = 0x55; 7080 nv->node_name[7] = 0x86; 7081 qla24xx_nvram_wwn_from_ofw(vha, nv); 7082 nv->login_retry_count = cpu_to_le16(8); 7083 nv->interrupt_delay_timer = cpu_to_le16(0); 7084 nv->login_timeout = cpu_to_le16(0); 7085 nv->firmware_options_1 = 7086 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7087 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7088 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7089 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7090 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7091 nv->efi_parameters = cpu_to_le32(0); 7092 nv->reset_delay = 5; 7093 nv->max_luns_per_target = cpu_to_le16(128); 7094 nv->port_down_retry_count = cpu_to_le16(30); 7095 nv->link_down_timeout = cpu_to_le16(30); 7096 7097 rval = 1; 7098 } 7099 7100 if (qla_tgt_mode_enabled(vha)) { 7101 /* Don't enable full login after initial LIP */ 7102 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7103 /* Don't enable LIP full login for initiator */ 7104 nv->host_p &= cpu_to_le32(~BIT_10); 7105 } 7106 7107 qlt_24xx_config_nvram_stage1(vha, nv); 7108 7109 /* Reset Initialization control block */ 7110 memset(icb, 0, ha->init_cb_size); 7111 7112 /* Copy 1st segment. */ 7113 dptr1 = (uint8_t *)icb; 7114 dptr2 = (uint8_t *)&nv->version; 7115 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7116 while (cnt--) 7117 *dptr1++ = *dptr2++; 7118 7119 icb->login_retry_count = nv->login_retry_count; 7120 icb->link_down_on_nos = nv->link_down_on_nos; 7121 7122 /* Copy 2nd segment. */ 7123 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7124 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7125 cnt = (uint8_t *)&icb->reserved_3 - 7126 (uint8_t *)&icb->interrupt_delay_timer; 7127 while (cnt--) 7128 *dptr1++ = *dptr2++; 7129 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7130 /* 7131 * Setup driver NVRAM options. 7132 */ 7133 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7134 "QLA2462"); 7135 7136 qlt_24xx_config_nvram_stage2(vha, icb); 7137 7138 if (nv->host_p & cpu_to_le32(BIT_15)) { 7139 /* Use alternate WWN? */ 7140 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7141 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7142 } 7143 7144 /* Prepare nodename */ 7145 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7146 /* 7147 * Firmware will apply the following mask if the nodename was 7148 * not provided. 7149 */ 7150 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7151 icb->node_name[0] &= 0xF0; 7152 } 7153 7154 /* Set host adapter parameters. */ 7155 ha->flags.disable_risc_code_load = 0; 7156 ha->flags.enable_lip_reset = 0; 7157 ha->flags.enable_lip_full_login = 7158 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7159 ha->flags.enable_target_reset = 7160 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7161 ha->flags.enable_led_scheme = 0; 7162 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7163 7164 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7165 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7166 7167 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7168 sizeof(ha->fw_seriallink_options24)); 7169 7170 /* save HBA serial number */ 7171 ha->serial0 = icb->port_name[5]; 7172 ha->serial1 = icb->port_name[6]; 7173 ha->serial2 = icb->port_name[7]; 7174 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7175 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7176 7177 icb->execution_throttle = cpu_to_le16(0xFFFF); 7178 7179 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7180 7181 /* Set minimum login_timeout to 4 seconds. */ 7182 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7183 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7184 if (le16_to_cpu(nv->login_timeout) < 4) 7185 nv->login_timeout = cpu_to_le16(4); 7186 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7187 7188 /* Set minimum RATOV to 100 tenths of a second. */ 7189 ha->r_a_tov = 100; 7190 7191 ha->loop_reset_delay = nv->reset_delay; 7192 7193 /* Link Down Timeout = 0: 7194 * 7195 * When Port Down timer expires we will start returning 7196 * I/O's to OS with "DID_NO_CONNECT". 7197 * 7198 * Link Down Timeout != 0: 7199 * 7200 * The driver waits for the link to come up after link down 7201 * before returning I/Os to OS with "DID_NO_CONNECT". 7202 */ 7203 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7204 ha->loop_down_abort_time = 7205 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7206 } else { 7207 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7208 ha->loop_down_abort_time = 7209 (LOOP_DOWN_TIME - ha->link_down_timeout); 7210 } 7211 7212 /* Need enough time to try and get the port back. */ 7213 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7214 if (qlport_down_retry) 7215 ha->port_down_retry_count = qlport_down_retry; 7216 7217 /* Set login_retry_count */ 7218 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7219 if (ha->port_down_retry_count == 7220 le16_to_cpu(nv->port_down_retry_count) && 7221 ha->port_down_retry_count > 3) 7222 ha->login_retry_count = ha->port_down_retry_count; 7223 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7224 ha->login_retry_count = ha->port_down_retry_count; 7225 if (ql2xloginretrycount) 7226 ha->login_retry_count = ql2xloginretrycount; 7227 7228 /* N2N: driver will initiate Login instead of FW */ 7229 icb->firmware_options_3 |= BIT_8; 7230 7231 /* Enable ZIO. */ 7232 if (!vha->flags.init_done) { 7233 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7234 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7235 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7236 le16_to_cpu(icb->interrupt_delay_timer) : 2; 7237 } 7238 icb->firmware_options_2 &= cpu_to_le32( 7239 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7240 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7241 ha->zio_mode = QLA_ZIO_MODE_6; 7242 7243 ql_log(ql_log_info, vha, 0x006f, 7244 "ZIO mode %d enabled; timer delay (%d us).\n", 7245 ha->zio_mode, ha->zio_timer * 100); 7246 7247 icb->firmware_options_2 |= cpu_to_le32( 7248 (uint32_t)ha->zio_mode); 7249 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7250 } 7251 7252 if (rval) { 7253 ql_log(ql_log_warn, vha, 0x0070, 7254 "NVRAM configuration failed.\n"); 7255 } 7256 return (rval); 7257 } 7258 7259 static void 7260 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 7261 struct qla27xx_image_status *image_status) 7262 { 7263 ql_dbg(ql_dbg_init, vha, 0x018b, 7264 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 7265 name, "status", 7266 image_status->image_status_mask, 7267 le16_to_cpu(image_status->generation), 7268 image_status->ver_major, 7269 image_status->ver_minor, 7270 image_status->bitmap, 7271 le32_to_cpu(image_status->checksum), 7272 le32_to_cpu(image_status->signature)); 7273 } 7274 7275 static bool 7276 qla28xx_check_aux_image_status_signature( 7277 struct qla27xx_image_status *image_status) 7278 { 7279 ulong signature = le32_to_cpu(image_status->signature); 7280 7281 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 7282 } 7283 7284 static bool 7285 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 7286 { 7287 ulong signature = le32_to_cpu(image_status->signature); 7288 7289 return 7290 signature != QLA27XX_IMG_STATUS_SIGN && 7291 signature != QLA28XX_IMG_STATUS_SIGN; 7292 } 7293 7294 static ulong 7295 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 7296 { 7297 uint32_t *p = (void *)image_status; 7298 uint n = sizeof(*image_status) / sizeof(*p); 7299 uint32_t sum = 0; 7300 7301 for ( ; n--; p++) 7302 sum += le32_to_cpup(p); 7303 7304 return sum; 7305 } 7306 7307 static inline uint 7308 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 7309 { 7310 return aux->bitmap & bitmask ? 7311 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 7312 } 7313 7314 static void 7315 qla28xx_component_status( 7316 struct active_regions *active_regions, struct qla27xx_image_status *aux) 7317 { 7318 active_regions->aux.board_config = 7319 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 7320 7321 active_regions->aux.vpd_nvram = 7322 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 7323 7324 active_regions->aux.npiv_config_0_1 = 7325 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 7326 7327 active_regions->aux.npiv_config_2_3 = 7328 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 7329 } 7330 7331 static int 7332 qla27xx_compare_image_generation( 7333 struct qla27xx_image_status *pri_image_status, 7334 struct qla27xx_image_status *sec_image_status) 7335 { 7336 /* calculate generation delta as uint16 (this accounts for wrap) */ 7337 int16_t delta = 7338 le16_to_cpu(pri_image_status->generation) - 7339 le16_to_cpu(sec_image_status->generation); 7340 7341 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 7342 7343 return delta; 7344 } 7345 7346 void 7347 qla28xx_get_aux_images( 7348 struct scsi_qla_host *vha, struct active_regions *active_regions) 7349 { 7350 struct qla_hw_data *ha = vha->hw; 7351 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 7352 bool valid_pri_image = false, valid_sec_image = false; 7353 bool active_pri_image = false, active_sec_image = false; 7354 7355 if (!ha->flt_region_aux_img_status_pri) { 7356 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 7357 goto check_sec_image; 7358 } 7359 7360 qla24xx_read_flash_data(vha, (void *)&pri_aux_image_status, 7361 ha->flt_region_aux_img_status_pri, 7362 sizeof(pri_aux_image_status) >> 2); 7363 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 7364 7365 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 7366 ql_dbg(ql_dbg_init, vha, 0x018b, 7367 "Primary aux image signature (%#x) not valid\n", 7368 le32_to_cpu(pri_aux_image_status.signature)); 7369 goto check_sec_image; 7370 } 7371 7372 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 7373 ql_dbg(ql_dbg_init, vha, 0x018c, 7374 "Primary aux image checksum failed\n"); 7375 goto check_sec_image; 7376 } 7377 7378 valid_pri_image = true; 7379 7380 if (pri_aux_image_status.image_status_mask & 1) { 7381 ql_dbg(ql_dbg_init, vha, 0x018d, 7382 "Primary aux image is active\n"); 7383 active_pri_image = true; 7384 } 7385 7386 check_sec_image: 7387 if (!ha->flt_region_aux_img_status_sec) { 7388 ql_dbg(ql_dbg_init, vha, 0x018a, 7389 "Secondary aux image not addressed\n"); 7390 goto check_valid_image; 7391 } 7392 7393 qla24xx_read_flash_data(vha, (void *)&sec_aux_image_status, 7394 ha->flt_region_aux_img_status_sec, 7395 sizeof(sec_aux_image_status) >> 2); 7396 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 7397 7398 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 7399 ql_dbg(ql_dbg_init, vha, 0x018b, 7400 "Secondary aux image signature (%#x) not valid\n", 7401 le32_to_cpu(sec_aux_image_status.signature)); 7402 goto check_valid_image; 7403 } 7404 7405 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 7406 ql_dbg(ql_dbg_init, vha, 0x018c, 7407 "Secondary aux image checksum failed\n"); 7408 goto check_valid_image; 7409 } 7410 7411 valid_sec_image = true; 7412 7413 if (sec_aux_image_status.image_status_mask & 1) { 7414 ql_dbg(ql_dbg_init, vha, 0x018d, 7415 "Secondary aux image is active\n"); 7416 active_sec_image = true; 7417 } 7418 7419 check_valid_image: 7420 if (valid_pri_image && active_pri_image && 7421 valid_sec_image && active_sec_image) { 7422 if (qla27xx_compare_image_generation(&pri_aux_image_status, 7423 &sec_aux_image_status) >= 0) { 7424 qla28xx_component_status(active_regions, 7425 &pri_aux_image_status); 7426 } else { 7427 qla28xx_component_status(active_regions, 7428 &sec_aux_image_status); 7429 } 7430 } else if (valid_pri_image && active_pri_image) { 7431 qla28xx_component_status(active_regions, &pri_aux_image_status); 7432 } else if (valid_sec_image && active_sec_image) { 7433 qla28xx_component_status(active_regions, &sec_aux_image_status); 7434 } 7435 7436 ql_dbg(ql_dbg_init, vha, 0x018f, 7437 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n", 7438 active_regions->aux.board_config, 7439 active_regions->aux.vpd_nvram, 7440 active_regions->aux.npiv_config_0_1, 7441 active_regions->aux.npiv_config_2_3); 7442 } 7443 7444 void 7445 qla27xx_get_active_image(struct scsi_qla_host *vha, 7446 struct active_regions *active_regions) 7447 { 7448 struct qla_hw_data *ha = vha->hw; 7449 struct qla27xx_image_status pri_image_status, sec_image_status; 7450 bool valid_pri_image = false, valid_sec_image = false; 7451 bool active_pri_image = false, active_sec_image = false; 7452 7453 if (!ha->flt_region_img_status_pri) { 7454 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 7455 goto check_sec_image; 7456 } 7457 7458 if (qla24xx_read_flash_data(vha, (void *)(&pri_image_status), 7459 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 7460 QLA_SUCCESS) { 7461 WARN_ON_ONCE(true); 7462 goto check_sec_image; 7463 } 7464 qla27xx_print_image(vha, "Primary image", &pri_image_status); 7465 7466 if (qla27xx_check_image_status_signature(&pri_image_status)) { 7467 ql_dbg(ql_dbg_init, vha, 0x018b, 7468 "Primary image signature (%#x) not valid\n", 7469 le32_to_cpu(pri_image_status.signature)); 7470 goto check_sec_image; 7471 } 7472 7473 if (qla27xx_image_status_checksum(&pri_image_status)) { 7474 ql_dbg(ql_dbg_init, vha, 0x018c, 7475 "Primary image checksum failed\n"); 7476 goto check_sec_image; 7477 } 7478 7479 valid_pri_image = true; 7480 7481 if (pri_image_status.image_status_mask & 1) { 7482 ql_dbg(ql_dbg_init, vha, 0x018d, 7483 "Primary image is active\n"); 7484 active_pri_image = true; 7485 } 7486 7487 check_sec_image: 7488 if (!ha->flt_region_img_status_sec) { 7489 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 7490 goto check_valid_image; 7491 } 7492 7493 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7494 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 7495 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 7496 7497 if (qla27xx_check_image_status_signature(&sec_image_status)) { 7498 ql_dbg(ql_dbg_init, vha, 0x018b, 7499 "Secondary image signature (%#x) not valid\n", 7500 le32_to_cpu(sec_image_status.signature)); 7501 goto check_valid_image; 7502 } 7503 7504 if (qla27xx_image_status_checksum(&sec_image_status)) { 7505 ql_dbg(ql_dbg_init, vha, 0x018c, 7506 "Secondary image checksum failed\n"); 7507 goto check_valid_image; 7508 } 7509 7510 valid_sec_image = true; 7511 7512 if (sec_image_status.image_status_mask & 1) { 7513 ql_dbg(ql_dbg_init, vha, 0x018d, 7514 "Secondary image is active\n"); 7515 active_sec_image = true; 7516 } 7517 7518 check_valid_image: 7519 if (valid_pri_image && active_pri_image) 7520 active_regions->global = QLA27XX_PRIMARY_IMAGE; 7521 7522 if (valid_sec_image && active_sec_image) { 7523 if (!active_regions->global || 7524 qla27xx_compare_image_generation( 7525 &pri_image_status, &sec_image_status) < 0) { 7526 active_regions->global = QLA27XX_SECONDARY_IMAGE; 7527 } 7528 } 7529 7530 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 7531 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 7532 "default (boot/fw)" : 7533 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 7534 "primary" : 7535 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 7536 "secondary" : "invalid", 7537 active_regions->global); 7538 } 7539 7540 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 7541 { 7542 return 7543 !(dword[4] | dword[5] | dword[6] | dword[7]) || 7544 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 7545 } 7546 7547 static int 7548 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7549 uint32_t faddr) 7550 { 7551 int rval; 7552 uint templates, segments, fragment; 7553 ulong i; 7554 uint j; 7555 ulong dlen; 7556 uint32_t *dcode; 7557 uint32_t risc_addr, risc_size, risc_attr = 0; 7558 struct qla_hw_data *ha = vha->hw; 7559 struct req_que *req = ha->req_q_map[0]; 7560 struct fwdt *fwdt = ha->fwdt; 7561 7562 ql_dbg(ql_dbg_init, vha, 0x008b, 7563 "FW: Loading firmware from flash (%x).\n", faddr); 7564 7565 dcode = (void *)req->ring; 7566 qla24xx_read_flash_data(vha, dcode, faddr, 8); 7567 if (qla24xx_risc_firmware_invalid(dcode)) { 7568 ql_log(ql_log_fatal, vha, 0x008c, 7569 "Unable to verify the integrity of flash firmware " 7570 "image.\n"); 7571 ql_log(ql_log_fatal, vha, 0x008d, 7572 "Firmware data: %08x %08x %08x %08x.\n", 7573 dcode[0], dcode[1], dcode[2], dcode[3]); 7574 7575 return QLA_FUNCTION_FAILED; 7576 } 7577 7578 dcode = (void *)req->ring; 7579 *srisc_addr = 0; 7580 segments = FA_RISC_CODE_SEGMENTS; 7581 for (j = 0; j < segments; j++) { 7582 ql_dbg(ql_dbg_init, vha, 0x008d, 7583 "-> Loading segment %u...\n", j); 7584 qla24xx_read_flash_data(vha, dcode, faddr, 10); 7585 risc_addr = be32_to_cpu(dcode[2]); 7586 risc_size = be32_to_cpu(dcode[3]); 7587 if (!*srisc_addr) { 7588 *srisc_addr = risc_addr; 7589 risc_attr = be32_to_cpu(dcode[9]); 7590 } 7591 7592 dlen = ha->fw_transfer_size >> 2; 7593 for (fragment = 0; risc_size; fragment++) { 7594 if (dlen > risc_size) 7595 dlen = risc_size; 7596 7597 ql_dbg(ql_dbg_init, vha, 0x008e, 7598 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 7599 fragment, risc_addr, faddr, dlen); 7600 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7601 for (i = 0; i < dlen; i++) 7602 dcode[i] = swab32(dcode[i]); 7603 7604 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 7605 if (rval) { 7606 ql_log(ql_log_fatal, vha, 0x008f, 7607 "-> Failed load firmware fragment %u.\n", 7608 fragment); 7609 return QLA_FUNCTION_FAILED; 7610 } 7611 7612 faddr += dlen; 7613 risc_addr += dlen; 7614 risc_size -= dlen; 7615 } 7616 } 7617 7618 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 7619 return QLA_SUCCESS; 7620 7621 templates = (risc_attr & BIT_9) ? 2 : 1; 7622 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 7623 for (j = 0; j < templates; j++, fwdt++) { 7624 if (fwdt->template) 7625 vfree(fwdt->template); 7626 fwdt->template = NULL; 7627 fwdt->length = 0; 7628 7629 dcode = (void *)req->ring; 7630 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7631 risc_size = be32_to_cpu(dcode[2]); 7632 ql_dbg(ql_dbg_init, vha, 0x0161, 7633 "-> fwdt%u template array at %#x (%#x dwords)\n", 7634 j, faddr, risc_size); 7635 if (!risc_size || !~risc_size) { 7636 ql_dbg(ql_dbg_init, vha, 0x0162, 7637 "-> fwdt%u failed to read array\n", j); 7638 goto failed; 7639 } 7640 7641 /* skip header and ignore checksum */ 7642 faddr += 7; 7643 risc_size -= 8; 7644 7645 ql_dbg(ql_dbg_init, vha, 0x0163, 7646 "-> fwdt%u template allocate template %#x words...\n", 7647 j, risc_size); 7648 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 7649 if (!fwdt->template) { 7650 ql_log(ql_log_warn, vha, 0x0164, 7651 "-> fwdt%u failed allocate template.\n", j); 7652 goto failed; 7653 } 7654 7655 dcode = fwdt->template; 7656 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7657 7658 if (!qla27xx_fwdt_template_valid(dcode)) { 7659 ql_log(ql_log_warn, vha, 0x0165, 7660 "-> fwdt%u failed template validate\n", j); 7661 goto failed; 7662 } 7663 7664 dlen = qla27xx_fwdt_template_size(dcode); 7665 ql_dbg(ql_dbg_init, vha, 0x0166, 7666 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 7667 j, dlen, dlen / sizeof(*dcode)); 7668 if (dlen > risc_size * sizeof(*dcode)) { 7669 ql_log(ql_log_warn, vha, 0x0167, 7670 "-> fwdt%u template exceeds array (%-lu bytes)\n", 7671 j, dlen - risc_size * sizeof(*dcode)); 7672 goto failed; 7673 } 7674 7675 fwdt->length = dlen; 7676 ql_dbg(ql_dbg_init, vha, 0x0168, 7677 "-> fwdt%u loaded template ok\n", j); 7678 7679 faddr += risc_size + 1; 7680 } 7681 7682 return QLA_SUCCESS; 7683 7684 failed: 7685 if (fwdt->template) 7686 vfree(fwdt->template); 7687 fwdt->template = NULL; 7688 fwdt->length = 0; 7689 7690 return QLA_SUCCESS; 7691 } 7692 7693 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7694 7695 int 7696 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7697 { 7698 int rval; 7699 int i, fragment; 7700 uint16_t *wcode, *fwcode; 7701 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7702 struct fw_blob *blob; 7703 struct qla_hw_data *ha = vha->hw; 7704 struct req_que *req = ha->req_q_map[0]; 7705 7706 /* Load firmware blob. */ 7707 blob = qla2x00_request_firmware(vha); 7708 if (!blob) { 7709 ql_log(ql_log_info, vha, 0x0083, 7710 "Firmware image unavailable.\n"); 7711 ql_log(ql_log_info, vha, 0x0084, 7712 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7713 return QLA_FUNCTION_FAILED; 7714 } 7715 7716 rval = QLA_SUCCESS; 7717 7718 wcode = (uint16_t *)req->ring; 7719 *srisc_addr = 0; 7720 fwcode = (uint16_t *)blob->fw->data; 7721 fwclen = 0; 7722 7723 /* Validate firmware image by checking version. */ 7724 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7725 ql_log(ql_log_fatal, vha, 0x0085, 7726 "Unable to verify integrity of firmware image (%zd).\n", 7727 blob->fw->size); 7728 goto fail_fw_integrity; 7729 } 7730 for (i = 0; i < 4; i++) 7731 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7732 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7733 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7734 wcode[2] == 0 && wcode[3] == 0)) { 7735 ql_log(ql_log_fatal, vha, 0x0086, 7736 "Unable to verify integrity of firmware image.\n"); 7737 ql_log(ql_log_fatal, vha, 0x0087, 7738 "Firmware data: %04x %04x %04x %04x.\n", 7739 wcode[0], wcode[1], wcode[2], wcode[3]); 7740 goto fail_fw_integrity; 7741 } 7742 7743 seg = blob->segs; 7744 while (*seg && rval == QLA_SUCCESS) { 7745 risc_addr = *seg; 7746 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7747 risc_size = be16_to_cpu(fwcode[3]); 7748 7749 /* Validate firmware image size. */ 7750 fwclen += risc_size * sizeof(uint16_t); 7751 if (blob->fw->size < fwclen) { 7752 ql_log(ql_log_fatal, vha, 0x0088, 7753 "Unable to verify integrity of firmware image " 7754 "(%zd).\n", blob->fw->size); 7755 goto fail_fw_integrity; 7756 } 7757 7758 fragment = 0; 7759 while (risc_size > 0 && rval == QLA_SUCCESS) { 7760 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7761 if (wlen > risc_size) 7762 wlen = risc_size; 7763 ql_dbg(ql_dbg_init, vha, 0x0089, 7764 "Loading risc segment@ risc addr %x number of " 7765 "words 0x%x.\n", risc_addr, wlen); 7766 7767 for (i = 0; i < wlen; i++) 7768 wcode[i] = swab16(fwcode[i]); 7769 7770 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7771 wlen); 7772 if (rval) { 7773 ql_log(ql_log_fatal, vha, 0x008a, 7774 "Failed to load segment %d of firmware.\n", 7775 fragment); 7776 break; 7777 } 7778 7779 fwcode += wlen; 7780 risc_addr += wlen; 7781 risc_size -= wlen; 7782 fragment++; 7783 } 7784 7785 /* Next segment. */ 7786 seg++; 7787 } 7788 return rval; 7789 7790 fail_fw_integrity: 7791 return QLA_FUNCTION_FAILED; 7792 } 7793 7794 static int 7795 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7796 { 7797 int rval; 7798 uint templates, segments, fragment; 7799 uint32_t *dcode; 7800 ulong dlen; 7801 uint32_t risc_addr, risc_size, risc_attr = 0; 7802 ulong i; 7803 uint j; 7804 struct fw_blob *blob; 7805 uint32_t *fwcode; 7806 struct qla_hw_data *ha = vha->hw; 7807 struct req_que *req = ha->req_q_map[0]; 7808 struct fwdt *fwdt = ha->fwdt; 7809 7810 ql_dbg(ql_dbg_init, vha, 0x0090, 7811 "-> FW: Loading via request-firmware.\n"); 7812 7813 blob = qla2x00_request_firmware(vha); 7814 if (!blob) { 7815 ql_log(ql_log_warn, vha, 0x0092, 7816 "-> Firmware file not found.\n"); 7817 7818 return QLA_FUNCTION_FAILED; 7819 } 7820 7821 fwcode = (void *)blob->fw->data; 7822 dcode = fwcode; 7823 if (qla24xx_risc_firmware_invalid(dcode)) { 7824 ql_log(ql_log_fatal, vha, 0x0093, 7825 "Unable to verify integrity of firmware image (%zd).\n", 7826 blob->fw->size); 7827 ql_log(ql_log_fatal, vha, 0x0095, 7828 "Firmware data: %08x %08x %08x %08x.\n", 7829 dcode[0], dcode[1], dcode[2], dcode[3]); 7830 return QLA_FUNCTION_FAILED; 7831 } 7832 7833 dcode = (void *)req->ring; 7834 *srisc_addr = 0; 7835 segments = FA_RISC_CODE_SEGMENTS; 7836 for (j = 0; j < segments; j++) { 7837 ql_dbg(ql_dbg_init, vha, 0x0096, 7838 "-> Loading segment %u...\n", j); 7839 risc_addr = be32_to_cpu(fwcode[2]); 7840 risc_size = be32_to_cpu(fwcode[3]); 7841 7842 if (!*srisc_addr) { 7843 *srisc_addr = risc_addr; 7844 risc_attr = be32_to_cpu(fwcode[9]); 7845 } 7846 7847 dlen = ha->fw_transfer_size >> 2; 7848 for (fragment = 0; risc_size; fragment++) { 7849 if (dlen > risc_size) 7850 dlen = risc_size; 7851 7852 ql_dbg(ql_dbg_init, vha, 0x0097, 7853 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 7854 fragment, risc_addr, 7855 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 7856 dlen); 7857 7858 for (i = 0; i < dlen; i++) 7859 dcode[i] = swab32(fwcode[i]); 7860 7861 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 7862 if (rval) { 7863 ql_log(ql_log_fatal, vha, 0x0098, 7864 "-> Failed load firmware fragment %u.\n", 7865 fragment); 7866 return QLA_FUNCTION_FAILED; 7867 } 7868 7869 fwcode += dlen; 7870 risc_addr += dlen; 7871 risc_size -= dlen; 7872 } 7873 } 7874 7875 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 7876 return QLA_SUCCESS; 7877 7878 templates = (risc_attr & BIT_9) ? 2 : 1; 7879 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 7880 for (j = 0; j < templates; j++, fwdt++) { 7881 if (fwdt->template) 7882 vfree(fwdt->template); 7883 fwdt->template = NULL; 7884 fwdt->length = 0; 7885 7886 risc_size = be32_to_cpu(fwcode[2]); 7887 ql_dbg(ql_dbg_init, vha, 0x0171, 7888 "-> fwdt%u template array at %#x (%#x dwords)\n", 7889 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 7890 risc_size); 7891 if (!risc_size || !~risc_size) { 7892 ql_dbg(ql_dbg_init, vha, 0x0172, 7893 "-> fwdt%u failed to read array\n", j); 7894 goto failed; 7895 } 7896 7897 /* skip header and ignore checksum */ 7898 fwcode += 7; 7899 risc_size -= 8; 7900 7901 ql_dbg(ql_dbg_init, vha, 0x0173, 7902 "-> fwdt%u template allocate template %#x words...\n", 7903 j, risc_size); 7904 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 7905 if (!fwdt->template) { 7906 ql_log(ql_log_warn, vha, 0x0174, 7907 "-> fwdt%u failed allocate template.\n", j); 7908 goto failed; 7909 } 7910 7911 dcode = fwdt->template; 7912 for (i = 0; i < risc_size; i++) 7913 dcode[i] = fwcode[i]; 7914 7915 if (!qla27xx_fwdt_template_valid(dcode)) { 7916 ql_log(ql_log_warn, vha, 0x0175, 7917 "-> fwdt%u failed template validate\n", j); 7918 goto failed; 7919 } 7920 7921 dlen = qla27xx_fwdt_template_size(dcode); 7922 ql_dbg(ql_dbg_init, vha, 0x0176, 7923 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 7924 j, dlen, dlen / sizeof(*dcode)); 7925 if (dlen > risc_size * sizeof(*dcode)) { 7926 ql_log(ql_log_warn, vha, 0x0177, 7927 "-> fwdt%u template exceeds array (%-lu bytes)\n", 7928 j, dlen - risc_size * sizeof(*dcode)); 7929 goto failed; 7930 } 7931 7932 fwdt->length = dlen; 7933 ql_dbg(ql_dbg_init, vha, 0x0178, 7934 "-> fwdt%u loaded template ok\n", j); 7935 7936 fwcode += risc_size + 1; 7937 } 7938 7939 return QLA_SUCCESS; 7940 7941 failed: 7942 if (fwdt->template) 7943 vfree(fwdt->template); 7944 fwdt->template = NULL; 7945 fwdt->length = 0; 7946 7947 return QLA_SUCCESS; 7948 } 7949 7950 int 7951 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7952 { 7953 int rval; 7954 7955 if (ql2xfwloadbin == 1) 7956 return qla81xx_load_risc(vha, srisc_addr); 7957 7958 /* 7959 * FW Load priority: 7960 * 1) Firmware via request-firmware interface (.bin file). 7961 * 2) Firmware residing in flash. 7962 */ 7963 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7964 if (rval == QLA_SUCCESS) 7965 return rval; 7966 7967 return qla24xx_load_risc_flash(vha, srisc_addr, 7968 vha->hw->flt_region_fw); 7969 } 7970 7971 int 7972 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7973 { 7974 int rval; 7975 struct qla_hw_data *ha = vha->hw; 7976 struct active_regions active_regions = { }; 7977 7978 if (ql2xfwloadbin == 2) 7979 goto try_blob_fw; 7980 7981 /* FW Load priority: 7982 * 1) Firmware residing in flash. 7983 * 2) Firmware via request-firmware interface (.bin file). 7984 * 3) Golden-Firmware residing in flash -- (limited operation). 7985 */ 7986 7987 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 7988 goto try_primary_fw; 7989 7990 qla27xx_get_active_image(vha, &active_regions); 7991 7992 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 7993 goto try_primary_fw; 7994 7995 ql_dbg(ql_dbg_init, vha, 0x008b, 7996 "Loading secondary firmware image.\n"); 7997 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 7998 if (!rval) 7999 return rval; 8000 8001 try_primary_fw: 8002 ql_dbg(ql_dbg_init, vha, 0x008b, 8003 "Loading primary firmware image.\n"); 8004 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8005 if (!rval) 8006 return rval; 8007 8008 try_blob_fw: 8009 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8010 if (!rval || !ha->flt_region_gold_fw) 8011 return rval; 8012 8013 ql_log(ql_log_info, vha, 0x0099, 8014 "Attempting to fallback to golden firmware.\n"); 8015 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8016 if (rval) 8017 return rval; 8018 8019 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8020 ha->flags.running_gold_fw = 1; 8021 return rval; 8022 } 8023 8024 void 8025 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8026 { 8027 int ret, retries; 8028 struct qla_hw_data *ha = vha->hw; 8029 8030 if (ha->flags.pci_channel_io_perm_failure) 8031 return; 8032 if (!IS_FWI2_CAPABLE(ha)) 8033 return; 8034 if (!ha->fw_major_version) 8035 return; 8036 if (!ha->flags.fw_started) 8037 return; 8038 8039 ret = qla2x00_stop_firmware(vha); 8040 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8041 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8042 ha->isp_ops->reset_chip(vha); 8043 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8044 continue; 8045 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8046 continue; 8047 ql_log(ql_log_info, vha, 0x8015, 8048 "Attempting retry of stop-firmware command.\n"); 8049 ret = qla2x00_stop_firmware(vha); 8050 } 8051 8052 QLA_FW_STOPPED(ha); 8053 ha->flags.fw_init_done = 0; 8054 } 8055 8056 int 8057 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8058 { 8059 int rval = QLA_SUCCESS; 8060 int rval2; 8061 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8062 struct qla_hw_data *ha = vha->hw; 8063 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8064 8065 if (!vha->vp_idx) 8066 return -EINVAL; 8067 8068 rval = qla2x00_fw_ready(base_vha); 8069 8070 if (rval == QLA_SUCCESS) { 8071 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8072 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8073 } 8074 8075 vha->flags.management_server_logged_in = 0; 8076 8077 /* Login to SNS first */ 8078 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8079 BIT_1); 8080 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8081 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8082 ql_dbg(ql_dbg_init, vha, 0x0120, 8083 "Failed SNS login: loop_id=%x, rval2=%d\n", 8084 NPH_SNS, rval2); 8085 else 8086 ql_dbg(ql_dbg_init, vha, 0x0103, 8087 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8088 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8089 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8090 return (QLA_FUNCTION_FAILED); 8091 } 8092 8093 atomic_set(&vha->loop_down_timer, 0); 8094 atomic_set(&vha->loop_state, LOOP_UP); 8095 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8096 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8097 rval = qla2x00_loop_resync(base_vha); 8098 8099 return rval; 8100 } 8101 8102 /* 84XX Support **************************************************************/ 8103 8104 static LIST_HEAD(qla_cs84xx_list); 8105 static DEFINE_MUTEX(qla_cs84xx_mutex); 8106 8107 static struct qla_chip_state_84xx * 8108 qla84xx_get_chip(struct scsi_qla_host *vha) 8109 { 8110 struct qla_chip_state_84xx *cs84xx; 8111 struct qla_hw_data *ha = vha->hw; 8112 8113 mutex_lock(&qla_cs84xx_mutex); 8114 8115 /* Find any shared 84xx chip. */ 8116 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8117 if (cs84xx->bus == ha->pdev->bus) { 8118 kref_get(&cs84xx->kref); 8119 goto done; 8120 } 8121 } 8122 8123 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8124 if (!cs84xx) 8125 goto done; 8126 8127 kref_init(&cs84xx->kref); 8128 spin_lock_init(&cs84xx->access_lock); 8129 mutex_init(&cs84xx->fw_update_mutex); 8130 cs84xx->bus = ha->pdev->bus; 8131 8132 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8133 done: 8134 mutex_unlock(&qla_cs84xx_mutex); 8135 return cs84xx; 8136 } 8137 8138 static void 8139 __qla84xx_chip_release(struct kref *kref) 8140 { 8141 struct qla_chip_state_84xx *cs84xx = 8142 container_of(kref, struct qla_chip_state_84xx, kref); 8143 8144 mutex_lock(&qla_cs84xx_mutex); 8145 list_del(&cs84xx->list); 8146 mutex_unlock(&qla_cs84xx_mutex); 8147 kfree(cs84xx); 8148 } 8149 8150 void 8151 qla84xx_put_chip(struct scsi_qla_host *vha) 8152 { 8153 struct qla_hw_data *ha = vha->hw; 8154 8155 if (ha->cs84xx) 8156 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8157 } 8158 8159 static int 8160 qla84xx_init_chip(scsi_qla_host_t *vha) 8161 { 8162 int rval; 8163 uint16_t status[2]; 8164 struct qla_hw_data *ha = vha->hw; 8165 8166 mutex_lock(&ha->cs84xx->fw_update_mutex); 8167 8168 rval = qla84xx_verify_chip(vha, status); 8169 8170 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8171 8172 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8173 QLA_SUCCESS; 8174 } 8175 8176 /* 81XX Support **************************************************************/ 8177 8178 int 8179 qla81xx_nvram_config(scsi_qla_host_t *vha) 8180 { 8181 int rval; 8182 struct init_cb_81xx *icb; 8183 struct nvram_81xx *nv; 8184 uint32_t *dptr; 8185 uint8_t *dptr1, *dptr2; 8186 uint32_t chksum; 8187 uint16_t cnt; 8188 struct qla_hw_data *ha = vha->hw; 8189 uint32_t faddr; 8190 struct active_regions active_regions = { }; 8191 8192 rval = QLA_SUCCESS; 8193 icb = (struct init_cb_81xx *)ha->init_cb; 8194 nv = ha->nvram; 8195 8196 /* Determine NVRAM starting address. */ 8197 ha->nvram_size = sizeof(*nv); 8198 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8199 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8200 ha->vpd_size = FA_VPD_SIZE_82XX; 8201 8202 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8203 qla28xx_get_aux_images(vha, &active_regions); 8204 8205 /* Get VPD data into cache */ 8206 ha->vpd = ha->nvram + VPD_OFFSET; 8207 8208 faddr = ha->flt_region_vpd; 8209 if (IS_QLA28XX(ha)) { 8210 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8211 faddr = ha->flt_region_vpd_sec; 8212 ql_dbg(ql_dbg_init, vha, 0x0110, 8213 "Loading %s nvram image.\n", 8214 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8215 "primary" : "secondary"); 8216 } 8217 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8218 8219 /* Get NVRAM data into cache and calculate checksum. */ 8220 faddr = ha->flt_region_nvram; 8221 if (IS_QLA28XX(ha)) { 8222 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8223 faddr = ha->flt_region_nvram_sec; 8224 } 8225 ql_dbg(ql_dbg_init, vha, 0x0110, 8226 "Loading %s nvram image.\n", 8227 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8228 "primary" : "secondary"); 8229 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8230 8231 dptr = (uint32_t *)nv; 8232 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8233 chksum += le32_to_cpu(*dptr); 8234 8235 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8236 "Contents of NVRAM:\n"); 8237 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8238 nv, ha->nvram_size); 8239 8240 /* Bad NVRAM data, set defaults parameters. */ 8241 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 8242 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 8243 /* Reset NVRAM data. */ 8244 ql_log(ql_log_info, vha, 0x0073, 8245 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 8246 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 8247 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 8248 ql_log(ql_log_info, vha, 0x0074, 8249 "Falling back to functioning (yet invalid -- WWPN) " 8250 "defaults.\n"); 8251 8252 /* 8253 * Set default initialization control block. 8254 */ 8255 memset(nv, 0, ha->nvram_size); 8256 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8257 nv->version = cpu_to_le16(ICB_VERSION); 8258 nv->frame_payload_size = 2048; 8259 nv->execution_throttle = cpu_to_le16(0xFFFF); 8260 nv->exchange_count = cpu_to_le16(0); 8261 nv->port_name[0] = 0x21; 8262 nv->port_name[1] = 0x00 + ha->port_no + 1; 8263 nv->port_name[2] = 0x00; 8264 nv->port_name[3] = 0xe0; 8265 nv->port_name[4] = 0x8b; 8266 nv->port_name[5] = 0x1c; 8267 nv->port_name[6] = 0x55; 8268 nv->port_name[7] = 0x86; 8269 nv->node_name[0] = 0x20; 8270 nv->node_name[1] = 0x00; 8271 nv->node_name[2] = 0x00; 8272 nv->node_name[3] = 0xe0; 8273 nv->node_name[4] = 0x8b; 8274 nv->node_name[5] = 0x1c; 8275 nv->node_name[6] = 0x55; 8276 nv->node_name[7] = 0x86; 8277 nv->login_retry_count = cpu_to_le16(8); 8278 nv->interrupt_delay_timer = cpu_to_le16(0); 8279 nv->login_timeout = cpu_to_le16(0); 8280 nv->firmware_options_1 = 8281 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8282 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8283 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8284 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8285 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8286 nv->efi_parameters = cpu_to_le32(0); 8287 nv->reset_delay = 5; 8288 nv->max_luns_per_target = cpu_to_le16(128); 8289 nv->port_down_retry_count = cpu_to_le16(30); 8290 nv->link_down_timeout = cpu_to_le16(180); 8291 nv->enode_mac[0] = 0x00; 8292 nv->enode_mac[1] = 0xC0; 8293 nv->enode_mac[2] = 0xDD; 8294 nv->enode_mac[3] = 0x04; 8295 nv->enode_mac[4] = 0x05; 8296 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8297 8298 rval = 1; 8299 } 8300 8301 if (IS_T10_PI_CAPABLE(ha)) 8302 nv->frame_payload_size &= ~7; 8303 8304 qlt_81xx_config_nvram_stage1(vha, nv); 8305 8306 /* Reset Initialization control block */ 8307 memset(icb, 0, ha->init_cb_size); 8308 8309 /* Copy 1st segment. */ 8310 dptr1 = (uint8_t *)icb; 8311 dptr2 = (uint8_t *)&nv->version; 8312 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8313 while (cnt--) 8314 *dptr1++ = *dptr2++; 8315 8316 icb->login_retry_count = nv->login_retry_count; 8317 8318 /* Copy 2nd segment. */ 8319 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8320 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8321 cnt = (uint8_t *)&icb->reserved_5 - 8322 (uint8_t *)&icb->interrupt_delay_timer; 8323 while (cnt--) 8324 *dptr1++ = *dptr2++; 8325 8326 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8327 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8328 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8329 icb->enode_mac[0] = 0x00; 8330 icb->enode_mac[1] = 0xC0; 8331 icb->enode_mac[2] = 0xDD; 8332 icb->enode_mac[3] = 0x04; 8333 icb->enode_mac[4] = 0x05; 8334 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8335 } 8336 8337 /* Use extended-initialization control block. */ 8338 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8339 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8340 /* 8341 * Setup driver NVRAM options. 8342 */ 8343 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8344 "QLE8XXX"); 8345 8346 qlt_81xx_config_nvram_stage2(vha, icb); 8347 8348 /* Use alternate WWN? */ 8349 if (nv->host_p & cpu_to_le32(BIT_15)) { 8350 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8351 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8352 } 8353 8354 /* Prepare nodename */ 8355 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8356 /* 8357 * Firmware will apply the following mask if the nodename was 8358 * not provided. 8359 */ 8360 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8361 icb->node_name[0] &= 0xF0; 8362 } 8363 8364 /* Set host adapter parameters. */ 8365 ha->flags.disable_risc_code_load = 0; 8366 ha->flags.enable_lip_reset = 0; 8367 ha->flags.enable_lip_full_login = 8368 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 8369 ha->flags.enable_target_reset = 8370 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8371 ha->flags.enable_led_scheme = 0; 8372 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8373 8374 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8375 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8376 8377 /* save HBA serial number */ 8378 ha->serial0 = icb->port_name[5]; 8379 ha->serial1 = icb->port_name[6]; 8380 ha->serial2 = icb->port_name[7]; 8381 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8382 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8383 8384 icb->execution_throttle = cpu_to_le16(0xFFFF); 8385 8386 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8387 8388 /* Set minimum login_timeout to 4 seconds. */ 8389 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8390 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8391 if (le16_to_cpu(nv->login_timeout) < 4) 8392 nv->login_timeout = cpu_to_le16(4); 8393 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8394 8395 /* Set minimum RATOV to 100 tenths of a second. */ 8396 ha->r_a_tov = 100; 8397 8398 ha->loop_reset_delay = nv->reset_delay; 8399 8400 /* Link Down Timeout = 0: 8401 * 8402 * When Port Down timer expires we will start returning 8403 * I/O's to OS with "DID_NO_CONNECT". 8404 * 8405 * Link Down Timeout != 0: 8406 * 8407 * The driver waits for the link to come up after link down 8408 * before returning I/Os to OS with "DID_NO_CONNECT". 8409 */ 8410 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8411 ha->loop_down_abort_time = 8412 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8413 } else { 8414 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8415 ha->loop_down_abort_time = 8416 (LOOP_DOWN_TIME - ha->link_down_timeout); 8417 } 8418 8419 /* Need enough time to try and get the port back. */ 8420 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8421 if (qlport_down_retry) 8422 ha->port_down_retry_count = qlport_down_retry; 8423 8424 /* Set login_retry_count */ 8425 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8426 if (ha->port_down_retry_count == 8427 le16_to_cpu(nv->port_down_retry_count) && 8428 ha->port_down_retry_count > 3) 8429 ha->login_retry_count = ha->port_down_retry_count; 8430 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8431 ha->login_retry_count = ha->port_down_retry_count; 8432 if (ql2xloginretrycount) 8433 ha->login_retry_count = ql2xloginretrycount; 8434 8435 /* if not running MSI-X we need handshaking on interrupts */ 8436 if (!vha->hw->flags.msix_enabled && 8437 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 8438 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8439 8440 /* Enable ZIO. */ 8441 if (!vha->flags.init_done) { 8442 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8443 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8444 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8445 le16_to_cpu(icb->interrupt_delay_timer) : 2; 8446 } 8447 icb->firmware_options_2 &= cpu_to_le32( 8448 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8449 vha->flags.process_response_queue = 0; 8450 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8451 ha->zio_mode = QLA_ZIO_MODE_6; 8452 8453 ql_log(ql_log_info, vha, 0x0075, 8454 "ZIO mode %d enabled; timer delay (%d us).\n", 8455 ha->zio_mode, 8456 ha->zio_timer * 100); 8457 8458 icb->firmware_options_2 |= cpu_to_le32( 8459 (uint32_t)ha->zio_mode); 8460 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8461 vha->flags.process_response_queue = 1; 8462 } 8463 8464 /* enable RIDA Format2 */ 8465 icb->firmware_options_3 |= BIT_0; 8466 8467 /* N2N: driver will initiate Login instead of FW */ 8468 icb->firmware_options_3 |= BIT_8; 8469 8470 if (rval) { 8471 ql_log(ql_log_warn, vha, 0x0076, 8472 "NVRAM configuration failed.\n"); 8473 } 8474 return (rval); 8475 } 8476 8477 int 8478 qla82xx_restart_isp(scsi_qla_host_t *vha) 8479 { 8480 int status, rval; 8481 struct qla_hw_data *ha = vha->hw; 8482 struct scsi_qla_host *vp; 8483 unsigned long flags; 8484 8485 status = qla2x00_init_rings(vha); 8486 if (!status) { 8487 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8488 ha->flags.chip_reset_done = 1; 8489 8490 status = qla2x00_fw_ready(vha); 8491 if (!status) { 8492 /* Issue a marker after FW becomes ready. */ 8493 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8494 vha->flags.online = 1; 8495 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8496 } 8497 8498 /* if no cable then assume it's good */ 8499 if ((vha->device_flags & DFLG_NO_CABLE)) 8500 status = 0; 8501 } 8502 8503 if (!status) { 8504 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8505 8506 if (!atomic_read(&vha->loop_down_timer)) { 8507 /* 8508 * Issue marker command only when we are going 8509 * to start the I/O . 8510 */ 8511 vha->marker_needed = 1; 8512 } 8513 8514 ha->isp_ops->enable_intrs(ha); 8515 8516 ha->isp_abort_cnt = 0; 8517 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8518 8519 /* Update the firmware version */ 8520 status = qla82xx_check_md_needed(vha); 8521 8522 if (ha->fce) { 8523 ha->flags.fce_enabled = 1; 8524 memset(ha->fce, 0, 8525 fce_calc_size(ha->fce_bufs)); 8526 rval = qla2x00_enable_fce_trace(vha, 8527 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8528 &ha->fce_bufs); 8529 if (rval) { 8530 ql_log(ql_log_warn, vha, 0x8001, 8531 "Unable to reinitialize FCE (%d).\n", 8532 rval); 8533 ha->flags.fce_enabled = 0; 8534 } 8535 } 8536 8537 if (ha->eft) { 8538 memset(ha->eft, 0, EFT_SIZE); 8539 rval = qla2x00_enable_eft_trace(vha, 8540 ha->eft_dma, EFT_NUM_BUFFERS); 8541 if (rval) { 8542 ql_log(ql_log_warn, vha, 0x8010, 8543 "Unable to reinitialize EFT (%d).\n", 8544 rval); 8545 } 8546 } 8547 } 8548 8549 if (!status) { 8550 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8551 "qla82xx_restart_isp succeeded.\n"); 8552 8553 spin_lock_irqsave(&ha->vport_slock, flags); 8554 list_for_each_entry(vp, &ha->vp_list, list) { 8555 if (vp->vp_idx) { 8556 atomic_inc(&vp->vref_count); 8557 spin_unlock_irqrestore(&ha->vport_slock, flags); 8558 8559 qla2x00_vp_abort_isp(vp); 8560 8561 spin_lock_irqsave(&ha->vport_slock, flags); 8562 atomic_dec(&vp->vref_count); 8563 } 8564 } 8565 spin_unlock_irqrestore(&ha->vport_slock, flags); 8566 8567 } else { 8568 ql_log(ql_log_warn, vha, 0x8016, 8569 "qla82xx_restart_isp **** FAILED ****.\n"); 8570 } 8571 8572 return status; 8573 } 8574 8575 void 8576 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8577 { 8578 struct qla_hw_data *ha = vha->hw; 8579 8580 /* Hold status IOCBs until ABTS response received. */ 8581 if (ql2xfwholdabts) 8582 ha->fw_options[3] |= BIT_12; 8583 8584 /* Set Retry FLOGI in case of P2P connection */ 8585 if (ha->operating_mode == P2P) { 8586 ha->fw_options[2] |= BIT_3; 8587 ql_dbg(ql_dbg_disc, vha, 0x2103, 8588 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8589 __func__, ha->fw_options[2]); 8590 } 8591 8592 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8593 if (ql2xmvasynctoatio) { 8594 if (qla_tgt_mode_enabled(vha) || 8595 qla_dual_mode_enabled(vha)) 8596 ha->fw_options[2] |= BIT_11; 8597 else 8598 ha->fw_options[2] &= ~BIT_11; 8599 } 8600 8601 if (qla_tgt_mode_enabled(vha) || 8602 qla_dual_mode_enabled(vha)) { 8603 /* FW auto send SCSI status during */ 8604 ha->fw_options[1] |= BIT_8; 8605 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8606 8607 /* FW perform Exchange validation */ 8608 ha->fw_options[2] |= BIT_4; 8609 } else { 8610 ha->fw_options[1] &= ~BIT_8; 8611 ha->fw_options[10] &= 0x00ff; 8612 8613 ha->fw_options[2] &= ~BIT_4; 8614 } 8615 8616 if (ql2xetsenable) { 8617 /* Enable ETS Burst. */ 8618 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8619 ha->fw_options[2] |= BIT_9; 8620 } 8621 8622 ql_dbg(ql_dbg_init, vha, 0x00e9, 8623 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8624 __func__, ha->fw_options[1], ha->fw_options[2], 8625 ha->fw_options[3], vha->host->active_mode); 8626 8627 qla2x00_set_fw_options(vha, ha->fw_options); 8628 } 8629 8630 /* 8631 * qla24xx_get_fcp_prio 8632 * Gets the fcp cmd priority value for the logged in port. 8633 * Looks for a match of the port descriptors within 8634 * each of the fcp prio config entries. If a match is found, 8635 * the tag (priority) value is returned. 8636 * 8637 * Input: 8638 * vha = scsi host structure pointer. 8639 * fcport = port structure pointer. 8640 * 8641 * Return: 8642 * non-zero (if found) 8643 * -1 (if not found) 8644 * 8645 * Context: 8646 * Kernel context 8647 */ 8648 static int 8649 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8650 { 8651 int i, entries; 8652 uint8_t pid_match, wwn_match; 8653 int priority; 8654 uint32_t pid1, pid2; 8655 uint64_t wwn1, wwn2; 8656 struct qla_fcp_prio_entry *pri_entry; 8657 struct qla_hw_data *ha = vha->hw; 8658 8659 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8660 return -1; 8661 8662 priority = -1; 8663 entries = ha->fcp_prio_cfg->num_entries; 8664 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8665 8666 for (i = 0; i < entries; i++) { 8667 pid_match = wwn_match = 0; 8668 8669 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8670 pri_entry++; 8671 continue; 8672 } 8673 8674 /* check source pid for a match */ 8675 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8676 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8677 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8678 if (pid1 == INVALID_PORT_ID) 8679 pid_match++; 8680 else if (pid1 == pid2) 8681 pid_match++; 8682 } 8683 8684 /* check destination pid for a match */ 8685 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8686 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8687 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8688 if (pid1 == INVALID_PORT_ID) 8689 pid_match++; 8690 else if (pid1 == pid2) 8691 pid_match++; 8692 } 8693 8694 /* check source WWN for a match */ 8695 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8696 wwn1 = wwn_to_u64(vha->port_name); 8697 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8698 if (wwn2 == (uint64_t)-1) 8699 wwn_match++; 8700 else if (wwn1 == wwn2) 8701 wwn_match++; 8702 } 8703 8704 /* check destination WWN for a match */ 8705 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8706 wwn1 = wwn_to_u64(fcport->port_name); 8707 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8708 if (wwn2 == (uint64_t)-1) 8709 wwn_match++; 8710 else if (wwn1 == wwn2) 8711 wwn_match++; 8712 } 8713 8714 if (pid_match == 2 || wwn_match == 2) { 8715 /* Found a matching entry */ 8716 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8717 priority = pri_entry->tag; 8718 break; 8719 } 8720 8721 pri_entry++; 8722 } 8723 8724 return priority; 8725 } 8726 8727 /* 8728 * qla24xx_update_fcport_fcp_prio 8729 * Activates fcp priority for the logged in fc port 8730 * 8731 * Input: 8732 * vha = scsi host structure pointer. 8733 * fcp = port structure pointer. 8734 * 8735 * Return: 8736 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8737 * 8738 * Context: 8739 * Kernel context. 8740 */ 8741 int 8742 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8743 { 8744 int ret; 8745 int priority; 8746 uint16_t mb[5]; 8747 8748 if (fcport->port_type != FCT_TARGET || 8749 fcport->loop_id == FC_NO_LOOP_ID) 8750 return QLA_FUNCTION_FAILED; 8751 8752 priority = qla24xx_get_fcp_prio(vha, fcport); 8753 if (priority < 0) 8754 return QLA_FUNCTION_FAILED; 8755 8756 if (IS_P3P_TYPE(vha->hw)) { 8757 fcport->fcp_prio = priority & 0xf; 8758 return QLA_SUCCESS; 8759 } 8760 8761 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8762 if (ret == QLA_SUCCESS) { 8763 if (fcport->fcp_prio != priority) 8764 ql_dbg(ql_dbg_user, vha, 0x709e, 8765 "Updated FCP_CMND priority - value=%d loop_id=%d " 8766 "port_id=%02x%02x%02x.\n", priority, 8767 fcport->loop_id, fcport->d_id.b.domain, 8768 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8769 fcport->fcp_prio = priority & 0xf; 8770 } else 8771 ql_dbg(ql_dbg_user, vha, 0x704f, 8772 "Unable to update FCP_CMND priority - ret=0x%x for " 8773 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8774 fcport->d_id.b.domain, fcport->d_id.b.area, 8775 fcport->d_id.b.al_pa); 8776 return ret; 8777 } 8778 8779 /* 8780 * qla24xx_update_all_fcp_prio 8781 * Activates fcp priority for all the logged in ports 8782 * 8783 * Input: 8784 * ha = adapter block pointer. 8785 * 8786 * Return: 8787 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8788 * 8789 * Context: 8790 * Kernel context. 8791 */ 8792 int 8793 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8794 { 8795 int ret; 8796 fc_port_t *fcport; 8797 8798 ret = QLA_FUNCTION_FAILED; 8799 /* We need to set priority for all logged in ports */ 8800 list_for_each_entry(fcport, &vha->vp_fcports, list) 8801 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8802 8803 return ret; 8804 } 8805 8806 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8807 int vp_idx, bool startqp) 8808 { 8809 int rsp_id = 0; 8810 int req_id = 0; 8811 int i; 8812 struct qla_hw_data *ha = vha->hw; 8813 uint16_t qpair_id = 0; 8814 struct qla_qpair *qpair = NULL; 8815 struct qla_msix_entry *msix; 8816 8817 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8818 ql_log(ql_log_warn, vha, 0x00181, 8819 "FW/Driver is not multi-queue capable.\n"); 8820 return NULL; 8821 } 8822 8823 if (ql2xmqsupport || ql2xnvmeenable) { 8824 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8825 if (qpair == NULL) { 8826 ql_log(ql_log_warn, vha, 0x0182, 8827 "Failed to allocate memory for queue pair.\n"); 8828 return NULL; 8829 } 8830 8831 qpair->hw = vha->hw; 8832 qpair->vha = vha; 8833 qpair->qp_lock_ptr = &qpair->qp_lock; 8834 spin_lock_init(&qpair->qp_lock); 8835 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8836 8837 /* Assign available que pair id */ 8838 mutex_lock(&ha->mq_lock); 8839 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8840 if (ha->num_qpairs >= ha->max_qpairs) { 8841 mutex_unlock(&ha->mq_lock); 8842 ql_log(ql_log_warn, vha, 0x0183, 8843 "No resources to create additional q pair.\n"); 8844 goto fail_qid_map; 8845 } 8846 ha->num_qpairs++; 8847 set_bit(qpair_id, ha->qpair_qid_map); 8848 ha->queue_pair_map[qpair_id] = qpair; 8849 qpair->id = qpair_id; 8850 qpair->vp_idx = vp_idx; 8851 qpair->fw_started = ha->flags.fw_started; 8852 INIT_LIST_HEAD(&qpair->hints_list); 8853 qpair->chip_reset = ha->base_qpair->chip_reset; 8854 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8855 qpair->enable_explicit_conf = 8856 ha->base_qpair->enable_explicit_conf; 8857 8858 for (i = 0; i < ha->msix_count; i++) { 8859 msix = &ha->msix_entries[i]; 8860 if (msix->in_use) 8861 continue; 8862 qpair->msix = msix; 8863 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8864 "Vector %x selected for qpair\n", msix->vector); 8865 break; 8866 } 8867 if (!qpair->msix) { 8868 ql_log(ql_log_warn, vha, 0x0184, 8869 "Out of MSI-X vectors!.\n"); 8870 goto fail_msix; 8871 } 8872 8873 qpair->msix->in_use = 1; 8874 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8875 qpair->pdev = ha->pdev; 8876 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 8877 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8878 8879 mutex_unlock(&ha->mq_lock); 8880 8881 /* Create response queue first */ 8882 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8883 if (!rsp_id) { 8884 ql_log(ql_log_warn, vha, 0x0185, 8885 "Failed to create response queue.\n"); 8886 goto fail_rsp; 8887 } 8888 8889 qpair->rsp = ha->rsp_q_map[rsp_id]; 8890 8891 /* Create request queue */ 8892 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8893 startqp); 8894 if (!req_id) { 8895 ql_log(ql_log_warn, vha, 0x0186, 8896 "Failed to create request queue.\n"); 8897 goto fail_req; 8898 } 8899 8900 qpair->req = ha->req_q_map[req_id]; 8901 qpair->rsp->req = qpair->req; 8902 qpair->rsp->qpair = qpair; 8903 /* init qpair to this cpu. Will adjust at run time. */ 8904 qla_cpu_update(qpair, smp_processor_id()); 8905 8906 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8907 if (ha->fw_attributes & BIT_4) 8908 qpair->difdix_supported = 1; 8909 } 8910 8911 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8912 if (!qpair->srb_mempool) { 8913 ql_log(ql_log_warn, vha, 0xd036, 8914 "Failed to create srb mempool for qpair %d\n", 8915 qpair->id); 8916 goto fail_mempool; 8917 } 8918 8919 /* Mark as online */ 8920 qpair->online = 1; 8921 8922 if (!vha->flags.qpairs_available) 8923 vha->flags.qpairs_available = 1; 8924 8925 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8926 "Request/Response queue pair created, id %d\n", 8927 qpair->id); 8928 ql_dbg(ql_dbg_init, vha, 0x0187, 8929 "Request/Response queue pair created, id %d\n", 8930 qpair->id); 8931 } 8932 return qpair; 8933 8934 fail_mempool: 8935 fail_req: 8936 qla25xx_delete_rsp_que(vha, qpair->rsp); 8937 fail_rsp: 8938 mutex_lock(&ha->mq_lock); 8939 qpair->msix->in_use = 0; 8940 list_del(&qpair->qp_list_elem); 8941 if (list_empty(&vha->qp_list)) 8942 vha->flags.qpairs_available = 0; 8943 fail_msix: 8944 ha->queue_pair_map[qpair_id] = NULL; 8945 clear_bit(qpair_id, ha->qpair_qid_map); 8946 ha->num_qpairs--; 8947 mutex_unlock(&ha->mq_lock); 8948 fail_qid_map: 8949 kfree(qpair); 8950 return NULL; 8951 } 8952 8953 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8954 { 8955 int ret = QLA_FUNCTION_FAILED; 8956 struct qla_hw_data *ha = qpair->hw; 8957 8958 qpair->delete_in_progress = 1; 8959 while (atomic_read(&qpair->ref_count)) 8960 msleep(500); 8961 8962 ret = qla25xx_delete_req_que(vha, qpair->req); 8963 if (ret != QLA_SUCCESS) 8964 goto fail; 8965 8966 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8967 if (ret != QLA_SUCCESS) 8968 goto fail; 8969 8970 mutex_lock(&ha->mq_lock); 8971 ha->queue_pair_map[qpair->id] = NULL; 8972 clear_bit(qpair->id, ha->qpair_qid_map); 8973 ha->num_qpairs--; 8974 list_del(&qpair->qp_list_elem); 8975 if (list_empty(&vha->qp_list)) { 8976 vha->flags.qpairs_available = 0; 8977 vha->flags.qpairs_req_created = 0; 8978 vha->flags.qpairs_rsp_created = 0; 8979 } 8980 mempool_destroy(qpair->srb_mempool); 8981 kfree(qpair); 8982 mutex_unlock(&ha->mq_lock); 8983 8984 return QLA_SUCCESS; 8985 fail: 8986 return ret; 8987 } 8988