1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 scsi_qla_host_t *vha = sp->vha; 54 struct req_que *req; 55 unsigned long flags; 56 57 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 58 req = vha->hw->req_q_map[0]; 59 req->outstanding_cmds[sp->handle] = NULL; 60 iocb = &sp->u.iocb_cmd; 61 iocb->timeout(sp); 62 if (sp->type != SRB_ELS_DCMD) 63 sp->free(sp); 64 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 65 } 66 67 void 68 qla2x00_sp_free(void *ptr) 69 { 70 srb_t *sp = ptr; 71 struct srb_iocb *iocb = &sp->u.iocb_cmd; 72 73 del_timer(&iocb->timer); 74 qla2x00_rel_sp(sp); 75 } 76 77 /* Asynchronous Login/Logout Routines -------------------------------------- */ 78 79 unsigned long 80 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 81 { 82 unsigned long tmo; 83 struct qla_hw_data *ha = vha->hw; 84 85 /* Firmware should use switch negotiated r_a_tov for timeout. */ 86 tmo = ha->r_a_tov / 10 * 2; 87 if (IS_QLAFX00(ha)) { 88 tmo = FX00_DEF_RATOV * 2; 89 } else if (!IS_FWI2_CAPABLE(ha)) { 90 /* 91 * Except for earlier ISPs where the timeout is seeded from the 92 * initialization control block. 93 */ 94 tmo = ha->login_timeout; 95 } 96 return tmo; 97 } 98 99 void 100 qla2x00_async_iocb_timeout(void *data) 101 { 102 srb_t *sp = data; 103 fc_port_t *fcport = sp->fcport; 104 struct srb_iocb *lio = &sp->u.iocb_cmd; 105 struct event_arg ea; 106 107 if (fcport) { 108 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 109 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 110 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 111 112 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 113 } else { 114 pr_info("Async-%s timeout - hdl=%x.\n", 115 sp->name, sp->handle); 116 } 117 118 switch (sp->type) { 119 case SRB_LOGIN_CMD: 120 if (!fcport) 121 break; 122 /* Retry as needed. */ 123 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 124 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 125 QLA_LOGIO_LOGIN_RETRIED : 0; 126 memset(&ea, 0, sizeof(ea)); 127 ea.event = FCME_PLOGI_DONE; 128 ea.fcport = sp->fcport; 129 ea.data[0] = lio->u.logio.data[0]; 130 ea.data[1] = lio->u.logio.data[1]; 131 ea.sp = sp; 132 qla24xx_handle_plogi_done_event(fcport->vha, &ea); 133 break; 134 case SRB_LOGOUT_CMD: 135 if (!fcport) 136 break; 137 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT); 138 break; 139 case SRB_CT_PTHRU_CMD: 140 case SRB_MB_IOCB: 141 case SRB_NACK_PLOGI: 142 case SRB_NACK_PRLI: 143 case SRB_NACK_LOGO: 144 case SRB_CTRL_VP: 145 sp->done(sp, QLA_FUNCTION_TIMEOUT); 146 break; 147 } 148 } 149 150 static void 151 qla2x00_async_login_sp_done(void *ptr, int res) 152 { 153 srb_t *sp = ptr; 154 struct scsi_qla_host *vha = sp->vha; 155 struct srb_iocb *lio = &sp->u.iocb_cmd; 156 struct event_arg ea; 157 158 ql_dbg(ql_dbg_disc, vha, 0x20dd, 159 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 160 161 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 162 163 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 164 memset(&ea, 0, sizeof(ea)); 165 ea.event = FCME_PLOGI_DONE; 166 ea.fcport = sp->fcport; 167 ea.data[0] = lio->u.logio.data[0]; 168 ea.data[1] = lio->u.logio.data[1]; 169 ea.iop[0] = lio->u.logio.iop[0]; 170 ea.iop[1] = lio->u.logio.iop[1]; 171 ea.sp = sp; 172 qla2x00_fcport_event_handler(vha, &ea); 173 } 174 175 sp->free(sp); 176 } 177 178 int 179 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 180 uint16_t *data) 181 { 182 srb_t *sp; 183 struct srb_iocb *lio; 184 int rval = QLA_FUNCTION_FAILED; 185 186 if (!vha->flags.online) 187 goto done; 188 189 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 190 if (!sp) 191 goto done; 192 193 fcport->flags |= FCF_ASYNC_SENT; 194 fcport->logout_completed = 0; 195 196 fcport->disc_state = DSC_LOGIN_PEND; 197 sp->type = SRB_LOGIN_CMD; 198 sp->name = "login"; 199 sp->gen1 = fcport->rscn_gen; 200 sp->gen2 = fcport->login_gen; 201 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 202 203 lio = &sp->u.iocb_cmd; 204 lio->timeout = qla2x00_async_iocb_timeout; 205 sp->done = qla2x00_async_login_sp_done; 206 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 207 208 if (fcport->fc4f_nvme) 209 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 210 211 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 212 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 213 rval = qla2x00_start_sp(sp); 214 if (rval != QLA_SUCCESS) { 215 fcport->flags |= FCF_LOGIN_NEEDED; 216 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 217 goto done_free_sp; 218 } 219 220 ql_dbg(ql_dbg_disc, vha, 0x2072, 221 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 222 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 223 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 224 fcport->login_retry); 225 return rval; 226 227 done_free_sp: 228 sp->free(sp); 229 fcport->flags &= ~FCF_ASYNC_SENT; 230 done: 231 return rval; 232 } 233 234 static void 235 qla2x00_async_logout_sp_done(void *ptr, int res) 236 { 237 srb_t *sp = ptr; 238 struct srb_iocb *lio = &sp->u.iocb_cmd; 239 240 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 241 if (!test_bit(UNLOADING, &sp->vha->dpc_flags)) 242 qla2x00_post_async_logout_done_work(sp->vha, sp->fcport, 243 lio->u.logio.data); 244 sp->free(sp); 245 } 246 247 int 248 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 249 { 250 srb_t *sp; 251 struct srb_iocb *lio; 252 int rval = QLA_FUNCTION_FAILED; 253 254 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 255 return rval; 256 257 fcport->flags |= FCF_ASYNC_SENT; 258 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 259 if (!sp) 260 goto done; 261 262 sp->type = SRB_LOGOUT_CMD; 263 sp->name = "logout"; 264 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 265 266 lio = &sp->u.iocb_cmd; 267 lio->timeout = qla2x00_async_iocb_timeout; 268 sp->done = qla2x00_async_logout_sp_done; 269 rval = qla2x00_start_sp(sp); 270 if (rval != QLA_SUCCESS) 271 goto done_free_sp; 272 273 ql_dbg(ql_dbg_disc, vha, 0x2070, 274 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 275 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 276 fcport->d_id.b.area, fcport->d_id.b.al_pa, 277 fcport->port_name); 278 return rval; 279 280 done_free_sp: 281 sp->free(sp); 282 done: 283 fcport->flags &= ~FCF_ASYNC_SENT; 284 return rval; 285 } 286 287 void 288 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 289 uint16_t *data) 290 { 291 /* Don't re-login in target mode */ 292 if (!fcport->tgt_session) 293 qla2x00_mark_device_lost(vha, fcport, 1, 0); 294 qlt_logo_completion_handler(fcport, data[0]); 295 } 296 297 static void 298 qla2x00_async_prlo_sp_done(void *s, int res) 299 { 300 srb_t *sp = (srb_t *)s; 301 struct srb_iocb *lio = &sp->u.iocb_cmd; 302 struct scsi_qla_host *vha = sp->vha; 303 304 if (!test_bit(UNLOADING, &vha->dpc_flags)) 305 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 306 lio->u.logio.data); 307 sp->free(sp); 308 } 309 310 int 311 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 312 { 313 srb_t *sp; 314 struct srb_iocb *lio; 315 int rval; 316 317 rval = QLA_FUNCTION_FAILED; 318 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 319 if (!sp) 320 goto done; 321 322 sp->type = SRB_PRLO_CMD; 323 sp->name = "prlo"; 324 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 325 326 lio = &sp->u.iocb_cmd; 327 lio->timeout = qla2x00_async_iocb_timeout; 328 sp->done = qla2x00_async_prlo_sp_done; 329 rval = qla2x00_start_sp(sp); 330 if (rval != QLA_SUCCESS) 331 goto done_free_sp; 332 333 ql_dbg(ql_dbg_disc, vha, 0x2070, 334 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 335 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 336 fcport->d_id.b.area, fcport->d_id.b.al_pa); 337 return rval; 338 339 done_free_sp: 340 sp->free(sp); 341 done: 342 return rval; 343 } 344 345 static 346 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 347 { 348 struct fc_port *fcport = ea->fcport; 349 350 ql_dbg(ql_dbg_disc, vha, 0x20d2, 351 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 352 __func__, fcport->port_name, fcport->disc_state, 353 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 354 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 355 356 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 357 ql_dbg(ql_dbg_disc, vha, 0x2066, 358 "%s %8phC: adisc fail: post delete\n", 359 __func__, ea->fcport->port_name); 360 qlt_schedule_sess_for_deletion(ea->fcport); 361 return; 362 } 363 364 if (ea->fcport->disc_state == DSC_DELETE_PEND) 365 return; 366 367 if (ea->sp->gen2 != ea->fcport->login_gen) { 368 /* target side must have changed it. */ 369 ql_dbg(ql_dbg_disc, vha, 0x20d3, 370 "%s %8phC generation changed\n", 371 __func__, ea->fcport->port_name); 372 return; 373 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 374 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 375 __func__, __LINE__, ea->fcport->port_name); 376 qla24xx_post_gidpn_work(vha, ea->fcport); 377 return; 378 } 379 380 __qla24xx_handle_gpdb_event(vha, ea); 381 } 382 383 static void 384 qla2x00_async_adisc_sp_done(void *ptr, int res) 385 { 386 srb_t *sp = ptr; 387 struct scsi_qla_host *vha = sp->vha; 388 struct event_arg ea; 389 struct srb_iocb *lio = &sp->u.iocb_cmd; 390 391 ql_dbg(ql_dbg_disc, vha, 0x2066, 392 "Async done-%s res %x %8phC\n", 393 sp->name, res, sp->fcport->port_name); 394 395 memset(&ea, 0, sizeof(ea)); 396 ea.event = FCME_ADISC_DONE; 397 ea.rc = res; 398 ea.data[0] = lio->u.logio.data[0]; 399 ea.data[1] = lio->u.logio.data[1]; 400 ea.iop[0] = lio->u.logio.iop[0]; 401 ea.iop[1] = lio->u.logio.iop[1]; 402 ea.fcport = sp->fcport; 403 ea.sp = sp; 404 405 qla2x00_fcport_event_handler(vha, &ea); 406 407 sp->free(sp); 408 } 409 410 int 411 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 412 uint16_t *data) 413 { 414 srb_t *sp; 415 struct srb_iocb *lio; 416 int rval; 417 418 rval = QLA_FUNCTION_FAILED; 419 fcport->flags |= FCF_ASYNC_SENT; 420 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 421 if (!sp) 422 goto done; 423 424 sp->type = SRB_ADISC_CMD; 425 sp->name = "adisc"; 426 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 427 428 lio = &sp->u.iocb_cmd; 429 lio->timeout = qla2x00_async_iocb_timeout; 430 sp->done = qla2x00_async_adisc_sp_done; 431 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 432 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 433 rval = qla2x00_start_sp(sp); 434 if (rval != QLA_SUCCESS) 435 goto done_free_sp; 436 437 ql_dbg(ql_dbg_disc, vha, 0x206f, 438 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 439 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 440 return rval; 441 442 done_free_sp: 443 sp->free(sp); 444 done: 445 fcport->flags &= ~FCF_ASYNC_SENT; 446 qla2x00_post_async_adisc_work(vha, fcport, data); 447 return rval; 448 } 449 450 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 451 struct event_arg *ea) 452 { 453 fc_port_t *fcport, *conflict_fcport; 454 struct get_name_list_extended *e; 455 u16 i, n, found = 0, loop_id; 456 port_id_t id; 457 u64 wwn; 458 u16 data[2]; 459 u8 current_login_state; 460 461 fcport = ea->fcport; 462 ql_dbg(ql_dbg_disc, vha, 0xffff, 463 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 464 __func__, fcport->port_name, fcport->disc_state, 465 fcport->fw_login_state, ea->rc, 466 fcport->login_gen, fcport->last_login_gen, 467 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 468 469 if (fcport->disc_state == DSC_DELETE_PEND) 470 return; 471 472 if (ea->rc) { /* rval */ 473 if (fcport->login_retry == 0) { 474 fcport->login_retry = vha->hw->login_retry_count; 475 ql_dbg(ql_dbg_disc, vha, 0x20de, 476 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 477 fcport->port_name, fcport->login_retry); 478 } 479 return; 480 } 481 482 if (fcport->last_rscn_gen != fcport->rscn_gen) { 483 ql_dbg(ql_dbg_disc, vha, 0x20df, 484 "%s %8phC rscn gen changed rscn %d|%d \n", 485 __func__, fcport->port_name, 486 fcport->last_rscn_gen, fcport->rscn_gen); 487 qla24xx_post_gidpn_work(vha, fcport); 488 return; 489 } else if (fcport->last_login_gen != fcport->login_gen) { 490 ql_dbg(ql_dbg_disc, vha, 0x20e0, 491 "%s %8phC login gen changed\n", 492 __func__, fcport->port_name); 493 return; 494 } 495 496 n = ea->data[0] / sizeof(struct get_name_list_extended); 497 498 ql_dbg(ql_dbg_disc, vha, 0x20e1, 499 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 500 __func__, __LINE__, fcport->port_name, n, 501 fcport->d_id.b.domain, fcport->d_id.b.area, 502 fcport->d_id.b.al_pa, fcport->loop_id); 503 504 for (i = 0; i < n; i++) { 505 e = &vha->gnl.l[i]; 506 wwn = wwn_to_u64(e->port_name); 507 508 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 509 continue; 510 511 found = 1; 512 id.b.domain = e->port_id[2]; 513 id.b.area = e->port_id[1]; 514 id.b.al_pa = e->port_id[0]; 515 id.b.rsvd_1 = 0; 516 517 loop_id = le16_to_cpu(e->nport_handle); 518 loop_id = (loop_id & 0x7fff); 519 520 ql_dbg(ql_dbg_disc, vha, 0x20e2, 521 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 522 __func__, fcport->port_name, 523 e->current_login_state, fcport->fw_login_state, 524 id.b.domain, id.b.area, id.b.al_pa, 525 fcport->d_id.b.domain, fcport->d_id.b.area, 526 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 527 528 if ((id.b24 != fcport->d_id.b24) || 529 ((fcport->loop_id != FC_NO_LOOP_ID) && 530 (fcport->loop_id != loop_id))) { 531 ql_dbg(ql_dbg_disc, vha, 0x20e3, 532 "%s %d %8phC post del sess\n", 533 __func__, __LINE__, fcport->port_name); 534 qlt_schedule_sess_for_deletion(fcport); 535 return; 536 } 537 538 fcport->loop_id = loop_id; 539 540 wwn = wwn_to_u64(fcport->port_name); 541 qlt_find_sess_invalidate_other(vha, wwn, 542 id, loop_id, &conflict_fcport); 543 544 if (conflict_fcport) { 545 /* 546 * Another share fcport share the same loop_id & 547 * nport id. Conflict fcport needs to finish 548 * cleanup before this fcport can proceed to login. 549 */ 550 conflict_fcport->conflict = fcport; 551 fcport->login_pause = 1; 552 } 553 554 if (fcport->fc4f_nvme) 555 current_login_state = e->current_login_state >> 4; 556 else 557 current_login_state = e->current_login_state & 0xf; 558 559 switch (current_login_state) { 560 case DSC_LS_PRLI_COMP: 561 ql_dbg(ql_dbg_disc, vha, 0x20e4, 562 "%s %d %8phC post gpdb\n", 563 __func__, __LINE__, fcport->port_name); 564 565 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 566 fcport->port_type = FCT_INITIATOR; 567 else 568 fcport->port_type = FCT_TARGET; 569 570 data[0] = data[1] = 0; 571 qla2x00_post_async_adisc_work(vha, fcport, data); 572 break; 573 case DSC_LS_PORT_UNAVAIL: 574 default: 575 if (fcport->loop_id == FC_NO_LOOP_ID) { 576 qla2x00_find_new_loop_id(vha, fcport); 577 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 578 } 579 ql_dbg(ql_dbg_disc, vha, 0x20e5, 580 "%s %d %8phC\n", 581 __func__, __LINE__, fcport->port_name); 582 qla24xx_fcport_handle_login(vha, fcport); 583 break; 584 } 585 } 586 587 if (!found) { 588 /* fw has no record of this port */ 589 for (i = 0; i < n; i++) { 590 e = &vha->gnl.l[i]; 591 id.b.domain = e->port_id[0]; 592 id.b.area = e->port_id[1]; 593 id.b.al_pa = e->port_id[2]; 594 id.b.rsvd_1 = 0; 595 loop_id = le16_to_cpu(e->nport_handle); 596 597 if (fcport->d_id.b24 == id.b24) { 598 conflict_fcport = 599 qla2x00_find_fcport_by_wwpn(vha, 600 e->port_name, 0); 601 ql_dbg(ql_dbg_disc, vha, 0x20e6, 602 "%s %d %8phC post del sess\n", 603 __func__, __LINE__, 604 conflict_fcport->port_name); 605 qlt_schedule_sess_for_deletion 606 (conflict_fcport); 607 } 608 609 /* FW already picked this loop id for another fcport */ 610 if (fcport->loop_id == loop_id) 611 fcport->loop_id = FC_NO_LOOP_ID; 612 } 613 qla24xx_fcport_handle_login(vha, fcport); 614 } 615 } /* gnl_event */ 616 617 static void 618 qla24xx_async_gnl_sp_done(void *s, int res) 619 { 620 struct srb *sp = s; 621 struct scsi_qla_host *vha = sp->vha; 622 unsigned long flags; 623 struct fc_port *fcport = NULL, *tf; 624 u16 i, n = 0, loop_id; 625 struct event_arg ea; 626 struct get_name_list_extended *e; 627 u64 wwn; 628 struct list_head h; 629 bool found = false; 630 631 ql_dbg(ql_dbg_disc, vha, 0x20e7, 632 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 633 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 634 sp->u.iocb_cmd.u.mbx.in_mb[2]); 635 636 memset(&ea, 0, sizeof(ea)); 637 ea.sp = sp; 638 ea.rc = res; 639 ea.event = FCME_GNL_DONE; 640 641 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 642 sizeof(struct get_name_list_extended)) { 643 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 644 sizeof(struct get_name_list_extended); 645 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 646 } 647 648 for (i = 0; i < n; i++) { 649 e = &vha->gnl.l[i]; 650 loop_id = le16_to_cpu(e->nport_handle); 651 /* mask out reserve bit */ 652 loop_id = (loop_id & 0x7fff); 653 set_bit(loop_id, vha->hw->loop_id_map); 654 wwn = wwn_to_u64(e->port_name); 655 656 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 657 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 658 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 659 e->port_id[0], e->current_login_state, e->last_login_state, 660 (loop_id & 0x7fff)); 661 } 662 663 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 664 vha->gnl.sent = 0; 665 666 INIT_LIST_HEAD(&h); 667 fcport = tf = NULL; 668 if (!list_empty(&vha->gnl.fcports)) 669 list_splice_init(&vha->gnl.fcports, &h); 670 671 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 672 list_del_init(&fcport->gnl_entry); 673 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 674 ea.fcport = fcport; 675 676 qla2x00_fcport_event_handler(vha, &ea); 677 } 678 679 /* create new fcport if fw has knowledge of new sessions */ 680 for (i = 0; i < n; i++) { 681 port_id_t id; 682 u64 wwnn; 683 684 e = &vha->gnl.l[i]; 685 wwn = wwn_to_u64(e->port_name); 686 687 found = false; 688 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 689 if (!memcmp((u8 *)&wwn, fcport->port_name, 690 WWN_SIZE)) { 691 found = true; 692 break; 693 } 694 } 695 696 id.b.domain = e->port_id[2]; 697 id.b.area = e->port_id[1]; 698 id.b.al_pa = e->port_id[0]; 699 id.b.rsvd_1 = 0; 700 701 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 702 ql_dbg(ql_dbg_disc, vha, 0x2065, 703 "%s %d %8phC %06x post new sess\n", 704 __func__, __LINE__, (u8 *)&wwn, id.b24); 705 wwnn = wwn_to_u64(e->node_name); 706 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 707 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 708 } 709 } 710 711 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 712 713 sp->free(sp); 714 } 715 716 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 717 { 718 srb_t *sp; 719 struct srb_iocb *mbx; 720 int rval = QLA_FUNCTION_FAILED; 721 unsigned long flags; 722 u16 *mb; 723 724 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 725 return rval; 726 727 ql_dbg(ql_dbg_disc, vha, 0x20d9, 728 "Async-gnlist WWPN %8phC \n", fcport->port_name); 729 730 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 731 fcport->disc_state = DSC_GNL; 732 fcport->last_rscn_gen = fcport->rscn_gen; 733 fcport->last_login_gen = fcport->login_gen; 734 735 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 736 if (vha->gnl.sent) { 737 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 738 return QLA_SUCCESS; 739 } 740 vha->gnl.sent = 1; 741 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 742 743 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 744 if (!sp) 745 goto done; 746 747 fcport->flags |= FCF_ASYNC_SENT; 748 sp->type = SRB_MB_IOCB; 749 sp->name = "gnlist"; 750 sp->gen1 = fcport->rscn_gen; 751 sp->gen2 = fcport->login_gen; 752 753 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 754 755 mb = sp->u.iocb_cmd.u.mbx.out_mb; 756 mb[0] = MBC_PORT_NODE_NAME_LIST; 757 mb[1] = BIT_2 | BIT_3; 758 mb[2] = MSW(vha->gnl.ldma); 759 mb[3] = LSW(vha->gnl.ldma); 760 mb[6] = MSW(MSD(vha->gnl.ldma)); 761 mb[7] = LSW(MSD(vha->gnl.ldma)); 762 mb[8] = vha->gnl.size; 763 mb[9] = vha->vp_idx; 764 765 mbx = &sp->u.iocb_cmd; 766 mbx->timeout = qla2x00_async_iocb_timeout; 767 768 sp->done = qla24xx_async_gnl_sp_done; 769 770 rval = qla2x00_start_sp(sp); 771 if (rval != QLA_SUCCESS) 772 goto done_free_sp; 773 774 ql_dbg(ql_dbg_disc, vha, 0x20da, 775 "Async-%s - OUT WWPN %8phC hndl %x\n", 776 sp->name, fcport->port_name, sp->handle); 777 778 return rval; 779 780 done_free_sp: 781 sp->free(sp); 782 fcport->flags &= ~FCF_ASYNC_SENT; 783 done: 784 return rval; 785 } 786 787 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 788 { 789 struct qla_work_evt *e; 790 791 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 792 if (!e) 793 return QLA_FUNCTION_FAILED; 794 795 e->u.fcport.fcport = fcport; 796 fcport->flags |= FCF_ASYNC_ACTIVE; 797 return qla2x00_post_work(vha, e); 798 } 799 800 static 801 void qla24xx_async_gpdb_sp_done(void *s, int res) 802 { 803 struct srb *sp = s; 804 struct scsi_qla_host *vha = sp->vha; 805 struct qla_hw_data *ha = vha->hw; 806 fc_port_t *fcport = sp->fcport; 807 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 808 struct event_arg ea; 809 810 ql_dbg(ql_dbg_disc, vha, 0x20db, 811 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 812 sp->name, res, fcport->port_name, mb[1], mb[2]); 813 814 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 815 816 memset(&ea, 0, sizeof(ea)); 817 ea.event = FCME_GPDB_DONE; 818 ea.fcport = fcport; 819 ea.sp = sp; 820 821 qla2x00_fcport_event_handler(vha, &ea); 822 823 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 824 sp->u.iocb_cmd.u.mbx.in_dma); 825 826 sp->free(sp); 827 } 828 829 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 830 { 831 struct qla_work_evt *e; 832 833 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 834 if (!e) 835 return QLA_FUNCTION_FAILED; 836 837 e->u.fcport.fcport = fcport; 838 839 return qla2x00_post_work(vha, e); 840 } 841 842 static void 843 qla2x00_async_prli_sp_done(void *ptr, int res) 844 { 845 srb_t *sp = ptr; 846 struct scsi_qla_host *vha = sp->vha; 847 struct srb_iocb *lio = &sp->u.iocb_cmd; 848 struct event_arg ea; 849 850 ql_dbg(ql_dbg_disc, vha, 0x2129, 851 "%s %8phC res %d \n", __func__, 852 sp->fcport->port_name, res); 853 854 sp->fcport->flags &= ~FCF_ASYNC_SENT; 855 856 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 857 memset(&ea, 0, sizeof(ea)); 858 ea.event = FCME_PRLI_DONE; 859 ea.fcport = sp->fcport; 860 ea.data[0] = lio->u.logio.data[0]; 861 ea.data[1] = lio->u.logio.data[1]; 862 ea.iop[0] = lio->u.logio.iop[0]; 863 ea.iop[1] = lio->u.logio.iop[1]; 864 ea.sp = sp; 865 866 qla2x00_fcport_event_handler(vha, &ea); 867 } 868 869 sp->free(sp); 870 } 871 872 int 873 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 874 { 875 srb_t *sp; 876 struct srb_iocb *lio; 877 int rval = QLA_FUNCTION_FAILED; 878 879 if (!vha->flags.online) 880 return rval; 881 882 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 883 fcport->fw_login_state == DSC_LS_PLOGI_COMP || 884 fcport->fw_login_state == DSC_LS_PRLI_PEND) 885 return rval; 886 887 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 888 if (!sp) 889 return rval; 890 891 fcport->flags |= FCF_ASYNC_SENT; 892 fcport->logout_completed = 0; 893 894 sp->type = SRB_PRLI_CMD; 895 sp->name = "prli"; 896 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 897 898 lio = &sp->u.iocb_cmd; 899 lio->timeout = qla2x00_async_iocb_timeout; 900 sp->done = qla2x00_async_prli_sp_done; 901 lio->u.logio.flags = 0; 902 903 if (fcport->fc4f_nvme) 904 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 905 906 rval = qla2x00_start_sp(sp); 907 if (rval != QLA_SUCCESS) { 908 fcport->flags |= FCF_LOGIN_NEEDED; 909 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 910 goto done_free_sp; 911 } 912 913 ql_dbg(ql_dbg_disc, vha, 0x211b, 914 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n", 915 fcport->port_name, sp->handle, fcport->loop_id, 916 fcport->d_id.b24, fcport->login_retry); 917 918 return rval; 919 920 done_free_sp: 921 sp->free(sp); 922 fcport->flags &= ~FCF_ASYNC_SENT; 923 return rval; 924 } 925 926 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 927 { 928 struct qla_work_evt *e; 929 930 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 931 if (!e) 932 return QLA_FUNCTION_FAILED; 933 934 e->u.fcport.fcport = fcport; 935 e->u.fcport.opt = opt; 936 fcport->flags |= FCF_ASYNC_ACTIVE; 937 return qla2x00_post_work(vha, e); 938 } 939 940 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 941 { 942 srb_t *sp; 943 struct srb_iocb *mbx; 944 int rval = QLA_FUNCTION_FAILED; 945 u16 *mb; 946 dma_addr_t pd_dma; 947 struct port_database_24xx *pd; 948 struct qla_hw_data *ha = vha->hw; 949 950 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 951 return rval; 952 953 fcport->disc_state = DSC_GPDB; 954 955 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 956 if (!sp) 957 goto done; 958 959 fcport->flags |= FCF_ASYNC_SENT; 960 sp->type = SRB_MB_IOCB; 961 sp->name = "gpdb"; 962 sp->gen1 = fcport->rscn_gen; 963 sp->gen2 = fcport->login_gen; 964 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 965 966 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 967 if (pd == NULL) { 968 ql_log(ql_log_warn, vha, 0xd043, 969 "Failed to allocate port database structure.\n"); 970 goto done_free_sp; 971 } 972 973 mb = sp->u.iocb_cmd.u.mbx.out_mb; 974 mb[0] = MBC_GET_PORT_DATABASE; 975 mb[1] = fcport->loop_id; 976 mb[2] = MSW(pd_dma); 977 mb[3] = LSW(pd_dma); 978 mb[6] = MSW(MSD(pd_dma)); 979 mb[7] = LSW(MSD(pd_dma)); 980 mb[9] = vha->vp_idx; 981 mb[10] = opt; 982 983 mbx = &sp->u.iocb_cmd; 984 mbx->timeout = qla2x00_async_iocb_timeout; 985 mbx->u.mbx.in = (void *)pd; 986 mbx->u.mbx.in_dma = pd_dma; 987 988 sp->done = qla24xx_async_gpdb_sp_done; 989 990 rval = qla2x00_start_sp(sp); 991 if (rval != QLA_SUCCESS) 992 goto done_free_sp; 993 994 ql_dbg(ql_dbg_disc, vha, 0x20dc, 995 "Async-%s %8phC hndl %x opt %x\n", 996 sp->name, fcport->port_name, sp->handle, opt); 997 998 return rval; 999 1000 done_free_sp: 1001 if (pd) 1002 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1003 1004 sp->free(sp); 1005 fcport->flags &= ~FCF_ASYNC_SENT; 1006 done: 1007 qla24xx_post_gpdb_work(vha, fcport, opt); 1008 return rval; 1009 } 1010 1011 static 1012 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1013 { 1014 unsigned long flags; 1015 1016 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1017 ea->fcport->login_gen++; 1018 ea->fcport->deleted = 0; 1019 ea->fcport->logout_on_delete = 1; 1020 1021 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1022 vha->fcport_count++; 1023 ea->fcport->login_succ = 1; 1024 1025 if (!IS_IIDMA_CAPABLE(vha->hw) || 1026 !vha->hw->flags.gpsc_supported) { 1027 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1028 "%s %d %8phC post upd_fcport fcp_cnt %d\n", 1029 __func__, __LINE__, ea->fcport->port_name, 1030 vha->fcport_count); 1031 1032 qla24xx_post_upd_fcport_work(vha, ea->fcport); 1033 } else { 1034 if (ea->fcport->id_changed) { 1035 ea->fcport->id_changed = 0; 1036 ql_dbg(ql_dbg_disc, vha, 0x20d7, 1037 "%s %d %8phC post gfpnid fcp_cnt %d\n", 1038 __func__, __LINE__, ea->fcport->port_name, 1039 vha->fcport_count); 1040 qla24xx_post_gfpnid_work(vha, ea->fcport); 1041 } else { 1042 ql_dbg(ql_dbg_disc, vha, 0x20d7, 1043 "%s %d %8phC post gpsc fcp_cnt %d\n", 1044 __func__, __LINE__, ea->fcport->port_name, 1045 vha->fcport_count); 1046 qla24xx_post_gpsc_work(vha, ea->fcport); 1047 } 1048 } 1049 } else if (ea->fcport->login_succ) { 1050 /* 1051 * We have an existing session. A late RSCN delivery 1052 * must have triggered the session to be re-validate. 1053 * Session is still valid. 1054 */ 1055 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1056 "%s %d %8phC session revalidate success\n", 1057 __func__, __LINE__, ea->fcport->port_name); 1058 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1059 } 1060 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1061 } 1062 1063 static 1064 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1065 { 1066 fc_port_t *fcport = ea->fcport; 1067 struct port_database_24xx *pd; 1068 struct srb *sp = ea->sp; 1069 1070 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1071 1072 fcport->flags &= ~FCF_ASYNC_SENT; 1073 1074 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1075 "%s %8phC DS %d LS %d rc %d\n", __func__, fcport->port_name, 1076 fcport->disc_state, pd->current_login_state, ea->rc); 1077 1078 if (fcport->disc_state == DSC_DELETE_PEND) 1079 return; 1080 1081 switch (pd->current_login_state) { 1082 case PDS_PRLI_COMPLETE: 1083 __qla24xx_parse_gpdb(vha, fcport, pd); 1084 break; 1085 case PDS_PLOGI_PENDING: 1086 case PDS_PLOGI_COMPLETE: 1087 case PDS_PRLI_PENDING: 1088 case PDS_PRLI2_PENDING: 1089 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC relogin needed\n", 1090 __func__, __LINE__, fcport->port_name); 1091 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1092 return; 1093 case PDS_LOGO_PENDING: 1094 case PDS_PORT_UNAVAILABLE: 1095 default: 1096 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1097 __func__, __LINE__, fcport->port_name); 1098 qlt_schedule_sess_for_deletion(fcport); 1099 return; 1100 } 1101 __qla24xx_handle_gpdb_event(vha, ea); 1102 } /* gpdb event */ 1103 1104 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1105 { 1106 u8 login = 0; 1107 int rc; 1108 1109 if (qla_tgt_mode_enabled(vha)) 1110 return; 1111 1112 if (qla_dual_mode_enabled(vha)) { 1113 if (N2N_TOPO(vha->hw)) { 1114 u64 mywwn, wwn; 1115 1116 mywwn = wwn_to_u64(vha->port_name); 1117 wwn = wwn_to_u64(fcport->port_name); 1118 if (mywwn > wwn) 1119 login = 1; 1120 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1121 && time_after_eq(jiffies, 1122 fcport->plogi_nack_done_deadline)) 1123 login = 1; 1124 } else { 1125 login = 1; 1126 } 1127 } else { 1128 /* initiator mode */ 1129 login = 1; 1130 } 1131 1132 if (login) { 1133 if (fcport->loop_id == FC_NO_LOOP_ID) { 1134 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1135 rc = qla2x00_find_new_loop_id(vha, fcport); 1136 if (rc) { 1137 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1138 "%s %d %8phC post del sess - out of loopid\n", 1139 __func__, __LINE__, fcport->port_name); 1140 fcport->scan_state = 0; 1141 qlt_schedule_sess_for_deletion(fcport); 1142 return; 1143 } 1144 } 1145 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1146 "%s %d %8phC post login\n", 1147 __func__, __LINE__, fcport->port_name); 1148 qla2x00_post_async_login_work(vha, fcport, NULL); 1149 } 1150 } 1151 1152 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1153 { 1154 u16 data[2]; 1155 u64 wwn; 1156 1157 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1158 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n", 1159 __func__, fcport->port_name, fcport->disc_state, 1160 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1161 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1162 fcport->login_gen, fcport->login_retry, 1163 fcport->loop_id, fcport->scan_state); 1164 1165 if (fcport->login_retry == 0) 1166 return 0; 1167 1168 if (fcport->scan_state != QLA_FCPORT_FOUND) 1169 return 0; 1170 1171 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1172 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1173 return 0; 1174 1175 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1176 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1177 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1178 return 0; 1179 } 1180 } 1181 1182 /* for pure Target Mode. Login will not be initiated */ 1183 if (vha->host->active_mode == MODE_TARGET) 1184 return 0; 1185 1186 if (fcport->flags & FCF_ASYNC_SENT) { 1187 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1188 return 0; 1189 } 1190 1191 fcport->login_retry--; 1192 1193 switch (fcport->disc_state) { 1194 case DSC_DELETED: 1195 wwn = wwn_to_u64(fcport->node_name); 1196 if (wwn == 0) { 1197 ql_dbg(ql_dbg_disc, vha, 0xffff, 1198 "%s %d %8phC post GNNID\n", 1199 __func__, __LINE__, fcport->port_name); 1200 qla24xx_post_gnnid_work(vha, fcport); 1201 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1202 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1203 "%s %d %8phC post gnl\n", 1204 __func__, __LINE__, fcport->port_name); 1205 qla24xx_post_gnl_work(vha, fcport); 1206 } else { 1207 qla_chk_n2n_b4_login(vha, fcport); 1208 } 1209 break; 1210 1211 case DSC_GNL: 1212 if (fcport->login_pause) { 1213 fcport->last_rscn_gen = fcport->rscn_gen; 1214 fcport->last_login_gen = fcport->login_gen; 1215 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1216 break; 1217 } 1218 1219 qla_chk_n2n_b4_login(vha, fcport); 1220 break; 1221 1222 case DSC_LOGIN_FAILED: 1223 ql_dbg(ql_dbg_disc, vha, 0x20d0, 1224 "%s %d %8phC post gidpn\n", 1225 __func__, __LINE__, fcport->port_name); 1226 if (N2N_TOPO(vha->hw)) 1227 qla_chk_n2n_b4_login(vha, fcport); 1228 else 1229 qla24xx_post_gidpn_work(vha, fcport); 1230 break; 1231 1232 case DSC_LOGIN_COMPLETE: 1233 /* recheck login state */ 1234 ql_dbg(ql_dbg_disc, vha, 0x20d1, 1235 "%s %d %8phC post adisc\n", 1236 __func__, __LINE__, fcport->port_name); 1237 data[0] = data[1] = 0; 1238 qla2x00_post_async_adisc_work(vha, fcport, data); 1239 break; 1240 1241 default: 1242 break; 1243 } 1244 1245 return 0; 1246 } 1247 1248 static 1249 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1250 { 1251 fcport->rscn_gen++; 1252 1253 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1254 "%s %8phC DS %d LS %d\n", 1255 __func__, fcport->port_name, fcport->disc_state, 1256 fcport->fw_login_state); 1257 1258 if (fcport->flags & FCF_ASYNC_SENT) 1259 return; 1260 1261 switch (fcport->disc_state) { 1262 case DSC_DELETED: 1263 case DSC_LOGIN_COMPLETE: 1264 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1265 break; 1266 default: 1267 break; 1268 } 1269 } 1270 1271 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1272 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1273 { 1274 struct qla_work_evt *e; 1275 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1276 if (!e) 1277 return QLA_FUNCTION_FAILED; 1278 1279 e->u.new_sess.id = *id; 1280 e->u.new_sess.pla = pla; 1281 e->u.new_sess.fc4_type = fc4_type; 1282 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1283 if (node_name) 1284 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1285 1286 return qla2x00_post_work(vha, e); 1287 } 1288 1289 static 1290 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1291 struct event_arg *ea) 1292 { 1293 fc_port_t *fcport = ea->fcport; 1294 1295 ql_dbg(ql_dbg_disc, vha, 0x2102, 1296 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1297 __func__, fcport->port_name, fcport->disc_state, 1298 fcport->fw_login_state, fcport->login_pause, 1299 fcport->deleted, fcport->conflict, 1300 fcport->last_rscn_gen, fcport->rscn_gen, 1301 fcport->last_login_gen, fcport->login_gen, 1302 fcport->flags); 1303 1304 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1305 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1306 return; 1307 1308 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1309 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1310 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1311 return; 1312 } 1313 } 1314 1315 if (fcport->flags & FCF_ASYNC_SENT) { 1316 fcport->login_retry++; 1317 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1318 return; 1319 } 1320 1321 if (fcport->disc_state == DSC_DELETE_PEND) { 1322 fcport->login_retry++; 1323 return; 1324 } 1325 1326 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1327 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1328 __func__, __LINE__, fcport->port_name); 1329 1330 qla24xx_post_gidpn_work(vha, fcport); 1331 return; 1332 } 1333 1334 qla24xx_fcport_handle_login(vha, fcport); 1335 } 1336 1337 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1338 { 1339 fc_port_t *f, *tf; 1340 uint32_t id = 0, mask, rid; 1341 unsigned long flags; 1342 1343 switch (ea->event) { 1344 case FCME_RSCN: 1345 case FCME_GIDPN_DONE: 1346 case FCME_GPSC_DONE: 1347 case FCME_GPNID_DONE: 1348 case FCME_GNNID_DONE: 1349 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) || 1350 test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags)) 1351 return; 1352 break; 1353 default: 1354 break; 1355 } 1356 1357 switch (ea->event) { 1358 case FCME_RELOGIN: 1359 if (test_bit(UNLOADING, &vha->dpc_flags)) 1360 return; 1361 1362 qla24xx_handle_relogin_event(vha, ea); 1363 break; 1364 case FCME_RSCN: 1365 if (test_bit(UNLOADING, &vha->dpc_flags)) 1366 return; 1367 switch (ea->id.b.rsvd_1) { 1368 case RSCN_PORT_ADDR: 1369 spin_lock_irqsave(&vha->work_lock, flags); 1370 if (vha->scan.scan_flags == 0) { 1371 ql_dbg(ql_dbg_disc, vha, 0xffff, 1372 "%s: schedule\n", __func__); 1373 vha->scan.scan_flags |= SF_QUEUED; 1374 schedule_delayed_work(&vha->scan.scan_work, 5); 1375 } 1376 spin_unlock_irqrestore(&vha->work_lock, flags); 1377 1378 break; 1379 case RSCN_AREA_ADDR: 1380 case RSCN_DOM_ADDR: 1381 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1382 mask = 0xffff00; 1383 ql_dbg(ql_dbg_async, vha, 0x5044, 1384 "RSCN: Area 0x%06x was affected\n", 1385 ea->id.b24); 1386 } else { 1387 mask = 0xff0000; 1388 ql_dbg(ql_dbg_async, vha, 0x507a, 1389 "RSCN: Domain 0x%06x was affected\n", 1390 ea->id.b24); 1391 } 1392 1393 rid = ea->id.b24 & mask; 1394 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1395 list) { 1396 id = f->d_id.b24 & mask; 1397 if (rid == id) { 1398 ea->fcport = f; 1399 qla24xx_handle_rscn_event(f, ea); 1400 } 1401 } 1402 break; 1403 case RSCN_FAB_ADDR: 1404 default: 1405 ql_log(ql_log_warn, vha, 0xd045, 1406 "RSCN: Fabric was affected. Addr format %d\n", 1407 ea->id.b.rsvd_1); 1408 qla2x00_mark_all_devices_lost(vha, 1); 1409 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1410 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1411 } 1412 break; 1413 case FCME_GIDPN_DONE: 1414 qla24xx_handle_gidpn_event(vha, ea); 1415 break; 1416 case FCME_GNL_DONE: 1417 qla24xx_handle_gnl_done_event(vha, ea); 1418 break; 1419 case FCME_GPSC_DONE: 1420 qla24xx_handle_gpsc_event(vha, ea); 1421 break; 1422 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1423 qla24xx_handle_plogi_done_event(vha, ea); 1424 break; 1425 case FCME_PRLI_DONE: 1426 qla24xx_handle_prli_done_event(vha, ea); 1427 break; 1428 case FCME_GPDB_DONE: 1429 qla24xx_handle_gpdb_event(vha, ea); 1430 break; 1431 case FCME_GPNID_DONE: 1432 qla24xx_handle_gpnid_event(vha, ea); 1433 break; 1434 case FCME_GFFID_DONE: 1435 qla24xx_handle_gffid_event(vha, ea); 1436 break; 1437 case FCME_ADISC_DONE: 1438 qla24xx_handle_adisc_event(vha, ea); 1439 break; 1440 case FCME_GNNID_DONE: 1441 qla24xx_handle_gnnid_event(vha, ea); 1442 break; 1443 case FCME_GFPNID_DONE: 1444 qla24xx_handle_gfpnid_event(vha, ea); 1445 break; 1446 default: 1447 BUG_ON(1); 1448 break; 1449 } 1450 } 1451 1452 static void 1453 qla2x00_tmf_iocb_timeout(void *data) 1454 { 1455 srb_t *sp = data; 1456 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1457 1458 tmf->u.tmf.comp_status = CS_TIMEOUT; 1459 complete(&tmf->u.tmf.comp); 1460 } 1461 1462 static void 1463 qla2x00_tmf_sp_done(void *ptr, int res) 1464 { 1465 srb_t *sp = ptr; 1466 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1467 1468 complete(&tmf->u.tmf.comp); 1469 } 1470 1471 int 1472 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1473 uint32_t tag) 1474 { 1475 struct scsi_qla_host *vha = fcport->vha; 1476 struct srb_iocb *tm_iocb; 1477 srb_t *sp; 1478 int rval = QLA_FUNCTION_FAILED; 1479 1480 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1481 if (!sp) 1482 goto done; 1483 1484 tm_iocb = &sp->u.iocb_cmd; 1485 sp->type = SRB_TM_CMD; 1486 sp->name = "tmf"; 1487 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1488 tm_iocb->u.tmf.flags = flags; 1489 tm_iocb->u.tmf.lun = lun; 1490 tm_iocb->u.tmf.data = tag; 1491 sp->done = qla2x00_tmf_sp_done; 1492 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1493 init_completion(&tm_iocb->u.tmf.comp); 1494 1495 rval = qla2x00_start_sp(sp); 1496 if (rval != QLA_SUCCESS) 1497 goto done_free_sp; 1498 1499 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1500 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1501 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1502 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1503 1504 wait_for_completion(&tm_iocb->u.tmf.comp); 1505 1506 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 1507 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1508 1509 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) { 1510 ql_dbg(ql_dbg_taskm, vha, 0x8030, 1511 "TM IOCB failed (%x).\n", rval); 1512 } 1513 1514 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1515 flags = tm_iocb->u.tmf.flags; 1516 lun = (uint16_t)tm_iocb->u.tmf.lun; 1517 1518 /* Issue Marker IOCB */ 1519 qla2x00_marker(vha, vha->hw->req_q_map[0], 1520 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1521 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1522 } 1523 1524 done_free_sp: 1525 sp->free(sp); 1526 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1527 done: 1528 return rval; 1529 } 1530 1531 static void 1532 qla24xx_abort_iocb_timeout(void *data) 1533 { 1534 srb_t *sp = data; 1535 struct srb_iocb *abt = &sp->u.iocb_cmd; 1536 1537 abt->u.abt.comp_status = CS_TIMEOUT; 1538 complete(&abt->u.abt.comp); 1539 } 1540 1541 static void 1542 qla24xx_abort_sp_done(void *ptr, int res) 1543 { 1544 srb_t *sp = ptr; 1545 struct srb_iocb *abt = &sp->u.iocb_cmd; 1546 1547 complete(&abt->u.abt.comp); 1548 } 1549 1550 int 1551 qla24xx_async_abort_cmd(srb_t *cmd_sp) 1552 { 1553 scsi_qla_host_t *vha = cmd_sp->vha; 1554 fc_port_t *fcport = cmd_sp->fcport; 1555 struct srb_iocb *abt_iocb; 1556 srb_t *sp; 1557 int rval = QLA_FUNCTION_FAILED; 1558 1559 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1560 if (!sp) 1561 goto done; 1562 1563 abt_iocb = &sp->u.iocb_cmd; 1564 sp->type = SRB_ABT_CMD; 1565 sp->name = "abort"; 1566 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1567 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1568 1569 if (vha->flags.qpairs_available && cmd_sp->qpair) 1570 abt_iocb->u.abt.req_que_no = 1571 cpu_to_le16(cmd_sp->qpair->req->id); 1572 else 1573 abt_iocb->u.abt.req_que_no = cpu_to_le16(vha->req->id); 1574 1575 sp->done = qla24xx_abort_sp_done; 1576 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1577 init_completion(&abt_iocb->u.abt.comp); 1578 1579 rval = qla2x00_start_sp(sp); 1580 if (rval != QLA_SUCCESS) 1581 goto done_free_sp; 1582 1583 ql_dbg(ql_dbg_async, vha, 0x507c, 1584 "Abort command issued - hdl=%x, target_id=%x\n", 1585 cmd_sp->handle, fcport->tgt_id); 1586 1587 wait_for_completion(&abt_iocb->u.abt.comp); 1588 1589 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1590 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1591 1592 done_free_sp: 1593 sp->free(sp); 1594 done: 1595 return rval; 1596 } 1597 1598 int 1599 qla24xx_async_abort_command(srb_t *sp) 1600 { 1601 unsigned long flags = 0; 1602 1603 uint32_t handle; 1604 fc_port_t *fcport = sp->fcport; 1605 struct scsi_qla_host *vha = fcport->vha; 1606 struct qla_hw_data *ha = vha->hw; 1607 struct req_que *req = vha->req; 1608 1609 if (vha->flags.qpairs_available && sp->qpair) 1610 req = sp->qpair->req; 1611 1612 spin_lock_irqsave(&ha->hardware_lock, flags); 1613 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1614 if (req->outstanding_cmds[handle] == sp) 1615 break; 1616 } 1617 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1618 if (handle == req->num_outstanding_cmds) { 1619 /* Command not found. */ 1620 return QLA_FUNCTION_FAILED; 1621 } 1622 if (sp->type == SRB_FXIOCB_DCMD) 1623 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1624 FXDISC_ABORT_IOCTL); 1625 1626 return qla24xx_async_abort_cmd(sp); 1627 } 1628 1629 static void 1630 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1631 { 1632 switch (ea->data[0]) { 1633 case MBS_COMMAND_COMPLETE: 1634 ql_dbg(ql_dbg_disc, vha, 0x2118, 1635 "%s %d %8phC post gpdb\n", 1636 __func__, __LINE__, ea->fcport->port_name); 1637 1638 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1639 ea->fcport->logout_on_delete = 1; 1640 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1641 break; 1642 default: 1643 if (ea->fcport->n2n_flag) { 1644 ql_dbg(ql_dbg_disc, vha, 0x2118, 1645 "%s %d %8phC post fc4 prli\n", 1646 __func__, __LINE__, ea->fcport->port_name); 1647 ea->fcport->fc4f_nvme = 0; 1648 ea->fcport->n2n_flag = 0; 1649 qla24xx_post_prli_work(vha, ea->fcport); 1650 } 1651 ql_dbg(ql_dbg_disc, vha, 0x2119, 1652 "%s %d %8phC unhandle event of %x\n", 1653 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1654 break; 1655 } 1656 } 1657 1658 static void 1659 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1660 { 1661 port_id_t cid; /* conflict Nport id */ 1662 u16 lid; 1663 struct fc_port *conflict_fcport; 1664 unsigned long flags; 1665 struct fc_port *fcport = ea->fcport; 1666 1667 ql_dbg(ql_dbg_disc, vha, 0xffff, 1668 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1669 __func__, fcport->port_name, fcport->disc_state, 1670 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1671 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1, 1672 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1673 1674 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1675 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1676 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1677 "%s %d %8phC Remote is trying to login\n", 1678 __func__, __LINE__, fcport->port_name); 1679 return; 1680 } 1681 1682 if (fcport->disc_state == DSC_DELETE_PEND) 1683 return; 1684 1685 if (ea->sp->gen2 != fcport->login_gen) { 1686 /* target side must have changed it. */ 1687 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1688 "%s %8phC generation changed\n", 1689 __func__, fcport->port_name); 1690 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1691 return; 1692 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1693 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 1694 __func__, __LINE__, fcport->port_name); 1695 qla24xx_post_gidpn_work(vha, fcport); 1696 return; 1697 } 1698 1699 switch (ea->data[0]) { 1700 case MBS_COMMAND_COMPLETE: 1701 /* 1702 * Driver must validate login state - If PRLI not complete, 1703 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1704 * requests. 1705 */ 1706 if (ea->fcport->fc4f_nvme) { 1707 ql_dbg(ql_dbg_disc, vha, 0x2117, 1708 "%s %d %8phC post prli\n", 1709 __func__, __LINE__, ea->fcport->port_name); 1710 qla24xx_post_prli_work(vha, ea->fcport); 1711 } else { 1712 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1713 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1714 __func__, __LINE__, ea->fcport->port_name, 1715 ea->fcport->loop_id, ea->fcport->d_id.b24); 1716 1717 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1718 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1719 ea->fcport->loop_id = FC_NO_LOOP_ID; 1720 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1721 ea->fcport->logout_on_delete = 1; 1722 ea->fcport->send_els_logo = 0; 1723 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1724 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1725 1726 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1727 } 1728 break; 1729 case MBS_COMMAND_ERROR: 1730 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1731 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1732 1733 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1734 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1735 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1736 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1737 else 1738 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1739 break; 1740 case MBS_LOOP_ID_USED: 1741 /* data[1] = IO PARAM 1 = nport ID */ 1742 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1743 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1744 cid.b.al_pa = ea->iop[1] & 0xff; 1745 cid.b.rsvd_1 = 0; 1746 1747 ql_dbg(ql_dbg_disc, vha, 0x20ec, 1748 "%s %d %8phC LoopID 0x%x in use post gnl\n", 1749 __func__, __LINE__, ea->fcport->port_name, 1750 ea->fcport->loop_id); 1751 1752 if (IS_SW_RESV_ADDR(cid)) { 1753 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1754 ea->fcport->loop_id = FC_NO_LOOP_ID; 1755 } else { 1756 qla2x00_clear_loop_id(ea->fcport); 1757 } 1758 qla24xx_post_gnl_work(vha, ea->fcport); 1759 break; 1760 case MBS_PORT_ID_USED: 1761 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1762 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n", 1763 __func__, __LINE__, ea->fcport->port_name, 1764 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area, 1765 ea->fcport->d_id.b.al_pa); 1766 1767 lid = ea->iop[1] & 0xffff; 1768 qlt_find_sess_invalidate_other(vha, 1769 wwn_to_u64(ea->fcport->port_name), 1770 ea->fcport->d_id, lid, &conflict_fcport); 1771 1772 if (conflict_fcport) { 1773 /* 1774 * Another fcport share the same loop_id/nport id. 1775 * Conflict fcport needs to finish cleanup before this 1776 * fcport can proceed to login. 1777 */ 1778 conflict_fcport->conflict = ea->fcport; 1779 ea->fcport->login_pause = 1; 1780 1781 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1782 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 1783 __func__, __LINE__, ea->fcport->port_name, 1784 ea->fcport->d_id.b24, lid); 1785 qla2x00_clear_loop_id(ea->fcport); 1786 qla24xx_post_gidpn_work(vha, ea->fcport); 1787 } else { 1788 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1789 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 1790 __func__, __LINE__, ea->fcport->port_name, 1791 ea->fcport->d_id.b24, lid); 1792 1793 qla2x00_clear_loop_id(ea->fcport); 1794 set_bit(lid, vha->hw->loop_id_map); 1795 ea->fcport->loop_id = lid; 1796 ea->fcport->keep_nport_handle = 0; 1797 qlt_schedule_sess_for_deletion(ea->fcport); 1798 } 1799 break; 1800 } 1801 return; 1802 } 1803 1804 void 1805 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1806 uint16_t *data) 1807 { 1808 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1809 qlt_logo_completion_handler(fcport, data[0]); 1810 fcport->login_gen++; 1811 return; 1812 } 1813 1814 void 1815 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1816 uint16_t *data) 1817 { 1818 if (data[0] == MBS_COMMAND_COMPLETE) { 1819 qla2x00_update_fcport(vha, fcport); 1820 1821 return; 1822 } 1823 1824 /* Retry login. */ 1825 fcport->flags &= ~FCF_ASYNC_SENT; 1826 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 1827 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1828 else 1829 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1830 1831 return; 1832 } 1833 1834 /****************************************************************************/ 1835 /* QLogic ISP2x00 Hardware Support Functions. */ 1836 /****************************************************************************/ 1837 1838 static int 1839 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 1840 { 1841 int rval = QLA_SUCCESS; 1842 struct qla_hw_data *ha = vha->hw; 1843 uint32_t idc_major_ver, idc_minor_ver; 1844 uint16_t config[4]; 1845 1846 qla83xx_idc_lock(vha, 0); 1847 1848 /* SV: TODO: Assign initialization timeout from 1849 * flash-info / other param 1850 */ 1851 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 1852 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 1853 1854 /* Set our fcoe function presence */ 1855 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 1856 ql_dbg(ql_dbg_p3p, vha, 0xb077, 1857 "Error while setting DRV-Presence.\n"); 1858 rval = QLA_FUNCTION_FAILED; 1859 goto exit; 1860 } 1861 1862 /* Decide the reset ownership */ 1863 qla83xx_reset_ownership(vha); 1864 1865 /* 1866 * On first protocol driver load: 1867 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 1868 * register. 1869 * Others: Check compatibility with current IDC Major version. 1870 */ 1871 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 1872 if (ha->flags.nic_core_reset_owner) { 1873 /* Set IDC Major version */ 1874 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 1875 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 1876 1877 /* Clearing IDC-Lock-Recovery register */ 1878 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 1879 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 1880 /* 1881 * Clear further IDC participation if we are not compatible with 1882 * the current IDC Major Version. 1883 */ 1884 ql_log(ql_log_warn, vha, 0xb07d, 1885 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 1886 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 1887 __qla83xx_clear_drv_presence(vha); 1888 rval = QLA_FUNCTION_FAILED; 1889 goto exit; 1890 } 1891 /* Each function sets its supported Minor version. */ 1892 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 1893 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 1894 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 1895 1896 if (ha->flags.nic_core_reset_owner) { 1897 memset(config, 0, sizeof(config)); 1898 if (!qla81xx_get_port_config(vha, config)) 1899 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 1900 QLA8XXX_DEV_READY); 1901 } 1902 1903 rval = qla83xx_idc_state_handler(vha); 1904 1905 exit: 1906 qla83xx_idc_unlock(vha, 0); 1907 1908 return rval; 1909 } 1910 1911 /* 1912 * qla2x00_initialize_adapter 1913 * Initialize board. 1914 * 1915 * Input: 1916 * ha = adapter block pointer. 1917 * 1918 * Returns: 1919 * 0 = success 1920 */ 1921 int 1922 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 1923 { 1924 int rval; 1925 struct qla_hw_data *ha = vha->hw; 1926 struct req_que *req = ha->req_q_map[0]; 1927 1928 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 1929 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 1930 1931 /* Clear adapter flags. */ 1932 vha->flags.online = 0; 1933 ha->flags.chip_reset_done = 0; 1934 vha->flags.reset_active = 0; 1935 ha->flags.pci_channel_io_perm_failure = 0; 1936 ha->flags.eeh_busy = 0; 1937 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 1938 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1939 atomic_set(&vha->loop_state, LOOP_DOWN); 1940 vha->device_flags = DFLG_NO_CABLE; 1941 vha->dpc_flags = 0; 1942 vha->flags.management_server_logged_in = 0; 1943 vha->marker_needed = 0; 1944 ha->isp_abort_cnt = 0; 1945 ha->beacon_blink_led = 0; 1946 1947 set_bit(0, ha->req_qid_map); 1948 set_bit(0, ha->rsp_qid_map); 1949 1950 ql_dbg(ql_dbg_init, vha, 0x0040, 1951 "Configuring PCI space...\n"); 1952 rval = ha->isp_ops->pci_config(vha); 1953 if (rval) { 1954 ql_log(ql_log_warn, vha, 0x0044, 1955 "Unable to configure PCI space.\n"); 1956 return (rval); 1957 } 1958 1959 ha->isp_ops->reset_chip(vha); 1960 1961 rval = qla2xxx_get_flash_info(vha); 1962 if (rval) { 1963 ql_log(ql_log_fatal, vha, 0x004f, 1964 "Unable to validate FLASH data.\n"); 1965 return rval; 1966 } 1967 1968 if (IS_QLA8044(ha)) { 1969 qla8044_read_reset_template(vha); 1970 1971 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 1972 * If DONRESET_BIT0 is set, drivers should not set dev_state 1973 * to NEED_RESET. But if NEED_RESET is set, drivers should 1974 * should honor the reset. */ 1975 if (ql2xdontresethba == 1) 1976 qla8044_set_idc_dontreset(vha); 1977 } 1978 1979 ha->isp_ops->get_flash_version(vha, req->ring); 1980 ql_dbg(ql_dbg_init, vha, 0x0061, 1981 "Configure NVRAM parameters...\n"); 1982 1983 ha->isp_ops->nvram_config(vha); 1984 1985 if (ha->flags.disable_serdes) { 1986 /* Mask HBA via NVRAM settings? */ 1987 ql_log(ql_log_info, vha, 0x0077, 1988 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 1989 return QLA_FUNCTION_FAILED; 1990 } 1991 1992 ql_dbg(ql_dbg_init, vha, 0x0078, 1993 "Verifying loaded RISC code...\n"); 1994 1995 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 1996 rval = ha->isp_ops->chip_diag(vha); 1997 if (rval) 1998 return (rval); 1999 rval = qla2x00_setup_chip(vha); 2000 if (rval) 2001 return (rval); 2002 } 2003 2004 if (IS_QLA84XX(ha)) { 2005 ha->cs84xx = qla84xx_get_chip(vha); 2006 if (!ha->cs84xx) { 2007 ql_log(ql_log_warn, vha, 0x00d0, 2008 "Unable to configure ISP84XX.\n"); 2009 return QLA_FUNCTION_FAILED; 2010 } 2011 } 2012 2013 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2014 rval = qla2x00_init_rings(vha); 2015 2016 ha->flags.chip_reset_done = 1; 2017 2018 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2019 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2020 rval = qla84xx_init_chip(vha); 2021 if (rval != QLA_SUCCESS) { 2022 ql_log(ql_log_warn, vha, 0x00d4, 2023 "Unable to initialize ISP84XX.\n"); 2024 qla84xx_put_chip(vha); 2025 } 2026 } 2027 2028 /* Load the NIC Core f/w if we are the first protocol driver. */ 2029 if (IS_QLA8031(ha)) { 2030 rval = qla83xx_nic_core_fw_load(vha); 2031 if (rval) 2032 ql_log(ql_log_warn, vha, 0x0124, 2033 "Error in initializing NIC Core f/w.\n"); 2034 } 2035 2036 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2037 qla24xx_read_fcp_prio_cfg(vha); 2038 2039 if (IS_P3P_TYPE(ha)) 2040 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2041 else 2042 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2043 2044 return (rval); 2045 } 2046 2047 /** 2048 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2049 * @ha: HA context 2050 * 2051 * Returns 0 on success. 2052 */ 2053 int 2054 qla2100_pci_config(scsi_qla_host_t *vha) 2055 { 2056 uint16_t w; 2057 unsigned long flags; 2058 struct qla_hw_data *ha = vha->hw; 2059 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2060 2061 pci_set_master(ha->pdev); 2062 pci_try_set_mwi(ha->pdev); 2063 2064 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2065 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2066 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2067 2068 pci_disable_rom(ha->pdev); 2069 2070 /* Get PCI bus information. */ 2071 spin_lock_irqsave(&ha->hardware_lock, flags); 2072 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2073 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2074 2075 return QLA_SUCCESS; 2076 } 2077 2078 /** 2079 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2080 * @ha: HA context 2081 * 2082 * Returns 0 on success. 2083 */ 2084 int 2085 qla2300_pci_config(scsi_qla_host_t *vha) 2086 { 2087 uint16_t w; 2088 unsigned long flags = 0; 2089 uint32_t cnt; 2090 struct qla_hw_data *ha = vha->hw; 2091 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2092 2093 pci_set_master(ha->pdev); 2094 pci_try_set_mwi(ha->pdev); 2095 2096 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2097 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2098 2099 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2100 w &= ~PCI_COMMAND_INTX_DISABLE; 2101 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2102 2103 /* 2104 * If this is a 2300 card and not 2312, reset the 2105 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2106 * the 2310 also reports itself as a 2300 so we need to get the 2107 * fb revision level -- a 6 indicates it really is a 2300 and 2108 * not a 2310. 2109 */ 2110 if (IS_QLA2300(ha)) { 2111 spin_lock_irqsave(&ha->hardware_lock, flags); 2112 2113 /* Pause RISC. */ 2114 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2115 for (cnt = 0; cnt < 30000; cnt++) { 2116 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2117 break; 2118 2119 udelay(10); 2120 } 2121 2122 /* Select FPM registers. */ 2123 WRT_REG_WORD(®->ctrl_status, 0x20); 2124 RD_REG_WORD(®->ctrl_status); 2125 2126 /* Get the fb rev level */ 2127 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2128 2129 if (ha->fb_rev == FPM_2300) 2130 pci_clear_mwi(ha->pdev); 2131 2132 /* Deselect FPM registers. */ 2133 WRT_REG_WORD(®->ctrl_status, 0x0); 2134 RD_REG_WORD(®->ctrl_status); 2135 2136 /* Release RISC module. */ 2137 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2138 for (cnt = 0; cnt < 30000; cnt++) { 2139 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2140 break; 2141 2142 udelay(10); 2143 } 2144 2145 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2146 } 2147 2148 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2149 2150 pci_disable_rom(ha->pdev); 2151 2152 /* Get PCI bus information. */ 2153 spin_lock_irqsave(&ha->hardware_lock, flags); 2154 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2155 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2156 2157 return QLA_SUCCESS; 2158 } 2159 2160 /** 2161 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2162 * @ha: HA context 2163 * 2164 * Returns 0 on success. 2165 */ 2166 int 2167 qla24xx_pci_config(scsi_qla_host_t *vha) 2168 { 2169 uint16_t w; 2170 unsigned long flags = 0; 2171 struct qla_hw_data *ha = vha->hw; 2172 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2173 2174 pci_set_master(ha->pdev); 2175 pci_try_set_mwi(ha->pdev); 2176 2177 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2178 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2179 w &= ~PCI_COMMAND_INTX_DISABLE; 2180 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2181 2182 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2183 2184 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2185 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2186 pcix_set_mmrbc(ha->pdev, 2048); 2187 2188 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2189 if (pci_is_pcie(ha->pdev)) 2190 pcie_set_readrq(ha->pdev, 4096); 2191 2192 pci_disable_rom(ha->pdev); 2193 2194 ha->chip_revision = ha->pdev->revision; 2195 2196 /* Get PCI bus information. */ 2197 spin_lock_irqsave(&ha->hardware_lock, flags); 2198 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2199 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2200 2201 return QLA_SUCCESS; 2202 } 2203 2204 /** 2205 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2206 * @ha: HA context 2207 * 2208 * Returns 0 on success. 2209 */ 2210 int 2211 qla25xx_pci_config(scsi_qla_host_t *vha) 2212 { 2213 uint16_t w; 2214 struct qla_hw_data *ha = vha->hw; 2215 2216 pci_set_master(ha->pdev); 2217 pci_try_set_mwi(ha->pdev); 2218 2219 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2220 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2221 w &= ~PCI_COMMAND_INTX_DISABLE; 2222 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2223 2224 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2225 if (pci_is_pcie(ha->pdev)) 2226 pcie_set_readrq(ha->pdev, 4096); 2227 2228 pci_disable_rom(ha->pdev); 2229 2230 ha->chip_revision = ha->pdev->revision; 2231 2232 return QLA_SUCCESS; 2233 } 2234 2235 /** 2236 * qla2x00_isp_firmware() - Choose firmware image. 2237 * @ha: HA context 2238 * 2239 * Returns 0 on success. 2240 */ 2241 static int 2242 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2243 { 2244 int rval; 2245 uint16_t loop_id, topo, sw_cap; 2246 uint8_t domain, area, al_pa; 2247 struct qla_hw_data *ha = vha->hw; 2248 2249 /* Assume loading risc code */ 2250 rval = QLA_FUNCTION_FAILED; 2251 2252 if (ha->flags.disable_risc_code_load) { 2253 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2254 2255 /* Verify checksum of loaded RISC code. */ 2256 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2257 if (rval == QLA_SUCCESS) { 2258 /* And, verify we are not in ROM code. */ 2259 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2260 &area, &domain, &topo, &sw_cap); 2261 } 2262 } 2263 2264 if (rval) 2265 ql_dbg(ql_dbg_init, vha, 0x007a, 2266 "**** Load RISC code ****.\n"); 2267 2268 return (rval); 2269 } 2270 2271 /** 2272 * qla2x00_reset_chip() - Reset ISP chip. 2273 * @ha: HA context 2274 * 2275 * Returns 0 on success. 2276 */ 2277 void 2278 qla2x00_reset_chip(scsi_qla_host_t *vha) 2279 { 2280 unsigned long flags = 0; 2281 struct qla_hw_data *ha = vha->hw; 2282 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2283 uint32_t cnt; 2284 uint16_t cmd; 2285 2286 if (unlikely(pci_channel_offline(ha->pdev))) 2287 return; 2288 2289 ha->isp_ops->disable_intrs(ha); 2290 2291 spin_lock_irqsave(&ha->hardware_lock, flags); 2292 2293 /* Turn off master enable */ 2294 cmd = 0; 2295 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2296 cmd &= ~PCI_COMMAND_MASTER; 2297 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2298 2299 if (!IS_QLA2100(ha)) { 2300 /* Pause RISC. */ 2301 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2302 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2303 for (cnt = 0; cnt < 30000; cnt++) { 2304 if ((RD_REG_WORD(®->hccr) & 2305 HCCR_RISC_PAUSE) != 0) 2306 break; 2307 udelay(100); 2308 } 2309 } else { 2310 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2311 udelay(10); 2312 } 2313 2314 /* Select FPM registers. */ 2315 WRT_REG_WORD(®->ctrl_status, 0x20); 2316 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2317 2318 /* FPM Soft Reset. */ 2319 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2320 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2321 2322 /* Toggle Fpm Reset. */ 2323 if (!IS_QLA2200(ha)) { 2324 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2325 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2326 } 2327 2328 /* Select frame buffer registers. */ 2329 WRT_REG_WORD(®->ctrl_status, 0x10); 2330 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2331 2332 /* Reset frame buffer FIFOs. */ 2333 if (IS_QLA2200(ha)) { 2334 WRT_FB_CMD_REG(ha, reg, 0xa000); 2335 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2336 } else { 2337 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2338 2339 /* Read back fb_cmd until zero or 3 seconds max */ 2340 for (cnt = 0; cnt < 3000; cnt++) { 2341 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2342 break; 2343 udelay(100); 2344 } 2345 } 2346 2347 /* Select RISC module registers. */ 2348 WRT_REG_WORD(®->ctrl_status, 0); 2349 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2350 2351 /* Reset RISC processor. */ 2352 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2353 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2354 2355 /* Release RISC processor. */ 2356 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2357 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2358 } 2359 2360 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2361 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2362 2363 /* Reset ISP chip. */ 2364 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2365 2366 /* Wait for RISC to recover from reset. */ 2367 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2368 /* 2369 * It is necessary to for a delay here since the card doesn't 2370 * respond to PCI reads during a reset. On some architectures 2371 * this will result in an MCA. 2372 */ 2373 udelay(20); 2374 for (cnt = 30000; cnt; cnt--) { 2375 if ((RD_REG_WORD(®->ctrl_status) & 2376 CSR_ISP_SOFT_RESET) == 0) 2377 break; 2378 udelay(100); 2379 } 2380 } else 2381 udelay(10); 2382 2383 /* Reset RISC processor. */ 2384 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2385 2386 WRT_REG_WORD(®->semaphore, 0); 2387 2388 /* Release RISC processor. */ 2389 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2390 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2391 2392 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2393 for (cnt = 0; cnt < 30000; cnt++) { 2394 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2395 break; 2396 2397 udelay(100); 2398 } 2399 } else 2400 udelay(100); 2401 2402 /* Turn on master enable */ 2403 cmd |= PCI_COMMAND_MASTER; 2404 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2405 2406 /* Disable RISC pause on FPM parity error. */ 2407 if (!IS_QLA2100(ha)) { 2408 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2409 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2410 } 2411 2412 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2413 } 2414 2415 /** 2416 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2417 * 2418 * Returns 0 on success. 2419 */ 2420 static int 2421 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2422 { 2423 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2424 2425 if (!IS_QLA81XX(vha->hw)) 2426 return QLA_SUCCESS; 2427 2428 return qla81xx_write_mpi_register(vha, mb); 2429 } 2430 2431 /** 2432 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2433 * @ha: HA context 2434 * 2435 * Returns 0 on success. 2436 */ 2437 static inline int 2438 qla24xx_reset_risc(scsi_qla_host_t *vha) 2439 { 2440 unsigned long flags = 0; 2441 struct qla_hw_data *ha = vha->hw; 2442 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2443 uint32_t cnt; 2444 uint16_t wd; 2445 static int abts_cnt; /* ISP abort retry counts */ 2446 int rval = QLA_SUCCESS; 2447 2448 spin_lock_irqsave(&ha->hardware_lock, flags); 2449 2450 /* Reset RISC. */ 2451 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2452 for (cnt = 0; cnt < 30000; cnt++) { 2453 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2454 break; 2455 2456 udelay(10); 2457 } 2458 2459 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2460 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2461 2462 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2463 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2464 RD_REG_DWORD(®->hccr), 2465 RD_REG_DWORD(®->ctrl_status), 2466 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2467 2468 WRT_REG_DWORD(®->ctrl_status, 2469 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2470 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2471 2472 udelay(100); 2473 2474 /* Wait for firmware to complete NVRAM accesses. */ 2475 RD_REG_WORD(®->mailbox0); 2476 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2477 rval == QLA_SUCCESS; cnt--) { 2478 barrier(); 2479 if (cnt) 2480 udelay(5); 2481 else 2482 rval = QLA_FUNCTION_TIMEOUT; 2483 } 2484 2485 if (rval == QLA_SUCCESS) 2486 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2487 2488 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2489 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2490 RD_REG_DWORD(®->hccr), 2491 RD_REG_DWORD(®->mailbox0)); 2492 2493 /* Wait for soft-reset to complete. */ 2494 RD_REG_DWORD(®->ctrl_status); 2495 for (cnt = 0; cnt < 60; cnt++) { 2496 barrier(); 2497 if ((RD_REG_DWORD(®->ctrl_status) & 2498 CSRX_ISP_SOFT_RESET) == 0) 2499 break; 2500 2501 udelay(5); 2502 } 2503 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2504 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2505 2506 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2507 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2508 RD_REG_DWORD(®->hccr), 2509 RD_REG_DWORD(®->ctrl_status)); 2510 2511 /* If required, do an MPI FW reset now */ 2512 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2513 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2514 if (++abts_cnt < 5) { 2515 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2516 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2517 } else { 2518 /* 2519 * We exhausted the ISP abort retries. We have to 2520 * set the board offline. 2521 */ 2522 abts_cnt = 0; 2523 vha->flags.online = 0; 2524 } 2525 } 2526 } 2527 2528 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2529 RD_REG_DWORD(®->hccr); 2530 2531 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2532 RD_REG_DWORD(®->hccr); 2533 2534 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2535 RD_REG_DWORD(®->hccr); 2536 2537 RD_REG_WORD(®->mailbox0); 2538 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2539 rval == QLA_SUCCESS; cnt--) { 2540 barrier(); 2541 if (cnt) 2542 udelay(5); 2543 else 2544 rval = QLA_FUNCTION_TIMEOUT; 2545 } 2546 if (rval == QLA_SUCCESS) 2547 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2548 2549 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2550 "Host Risc 0x%x, mailbox0 0x%x\n", 2551 RD_REG_DWORD(®->hccr), 2552 RD_REG_WORD(®->mailbox0)); 2553 2554 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2555 2556 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2557 "Driver in %s mode\n", 2558 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2559 2560 if (IS_NOPOLLING_TYPE(ha)) 2561 ha->isp_ops->enable_intrs(ha); 2562 2563 return rval; 2564 } 2565 2566 static void 2567 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2568 { 2569 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2570 2571 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2572 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2573 2574 } 2575 2576 static void 2577 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2578 { 2579 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2580 2581 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2582 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2583 } 2584 2585 static void 2586 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2587 { 2588 uint32_t wd32 = 0; 2589 uint delta_msec = 100; 2590 uint elapsed_msec = 0; 2591 uint timeout_msec; 2592 ulong n; 2593 2594 if (vha->hw->pdev->subsystem_device != 0x0175 && 2595 vha->hw->pdev->subsystem_device != 0x0240) 2596 return; 2597 2598 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2599 udelay(100); 2600 2601 attempt: 2602 timeout_msec = TIMEOUT_SEMAPHORE; 2603 n = timeout_msec / delta_msec; 2604 while (n--) { 2605 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2606 qla25xx_read_risc_sema_reg(vha, &wd32); 2607 if (wd32 & RISC_SEMAPHORE) 2608 break; 2609 msleep(delta_msec); 2610 elapsed_msec += delta_msec; 2611 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2612 goto force; 2613 } 2614 2615 if (!(wd32 & RISC_SEMAPHORE)) 2616 goto force; 2617 2618 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2619 goto acquired; 2620 2621 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2622 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2623 n = timeout_msec / delta_msec; 2624 while (n--) { 2625 qla25xx_read_risc_sema_reg(vha, &wd32); 2626 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2627 break; 2628 msleep(delta_msec); 2629 elapsed_msec += delta_msec; 2630 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2631 goto force; 2632 } 2633 2634 if (wd32 & RISC_SEMAPHORE_FORCE) 2635 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2636 2637 goto attempt; 2638 2639 force: 2640 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2641 2642 acquired: 2643 return; 2644 } 2645 2646 /** 2647 * qla24xx_reset_chip() - Reset ISP24xx chip. 2648 * @ha: HA context 2649 * 2650 * Returns 0 on success. 2651 */ 2652 void 2653 qla24xx_reset_chip(scsi_qla_host_t *vha) 2654 { 2655 struct qla_hw_data *ha = vha->hw; 2656 2657 if (pci_channel_offline(ha->pdev) && 2658 ha->flags.pci_channel_io_perm_failure) { 2659 return; 2660 } 2661 2662 ha->isp_ops->disable_intrs(ha); 2663 2664 qla25xx_manipulate_risc_semaphore(vha); 2665 2666 /* Perform RISC reset. */ 2667 qla24xx_reset_risc(vha); 2668 } 2669 2670 /** 2671 * qla2x00_chip_diag() - Test chip for proper operation. 2672 * @ha: HA context 2673 * 2674 * Returns 0 on success. 2675 */ 2676 int 2677 qla2x00_chip_diag(scsi_qla_host_t *vha) 2678 { 2679 int rval; 2680 struct qla_hw_data *ha = vha->hw; 2681 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2682 unsigned long flags = 0; 2683 uint16_t data; 2684 uint32_t cnt; 2685 uint16_t mb[5]; 2686 struct req_que *req = ha->req_q_map[0]; 2687 2688 /* Assume a failed state */ 2689 rval = QLA_FUNCTION_FAILED; 2690 2691 ql_dbg(ql_dbg_init, vha, 0x007b, 2692 "Testing device at %lx.\n", (u_long)®->flash_address); 2693 2694 spin_lock_irqsave(&ha->hardware_lock, flags); 2695 2696 /* Reset ISP chip. */ 2697 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2698 2699 /* 2700 * We need to have a delay here since the card will not respond while 2701 * in reset causing an MCA on some architectures. 2702 */ 2703 udelay(20); 2704 data = qla2x00_debounce_register(®->ctrl_status); 2705 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2706 udelay(5); 2707 data = RD_REG_WORD(®->ctrl_status); 2708 barrier(); 2709 } 2710 2711 if (!cnt) 2712 goto chip_diag_failed; 2713 2714 ql_dbg(ql_dbg_init, vha, 0x007c, 2715 "Reset register cleared by chip reset.\n"); 2716 2717 /* Reset RISC processor. */ 2718 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2719 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2720 2721 /* Workaround for QLA2312 PCI parity error */ 2722 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2723 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2724 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2725 udelay(5); 2726 data = RD_MAILBOX_REG(ha, reg, 0); 2727 barrier(); 2728 } 2729 } else 2730 udelay(10); 2731 2732 if (!cnt) 2733 goto chip_diag_failed; 2734 2735 /* Check product ID of chip */ 2736 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2737 2738 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2739 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2740 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2741 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2742 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2743 mb[3] != PROD_ID_3) { 2744 ql_log(ql_log_warn, vha, 0x0062, 2745 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2746 mb[1], mb[2], mb[3]); 2747 2748 goto chip_diag_failed; 2749 } 2750 ha->product_id[0] = mb[1]; 2751 ha->product_id[1] = mb[2]; 2752 ha->product_id[2] = mb[3]; 2753 ha->product_id[3] = mb[4]; 2754 2755 /* Adjust fw RISC transfer size */ 2756 if (req->length > 1024) 2757 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2758 else 2759 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2760 req->length; 2761 2762 if (IS_QLA2200(ha) && 2763 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2764 /* Limit firmware transfer size with a 2200A */ 2765 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2766 2767 ha->device_type |= DT_ISP2200A; 2768 ha->fw_transfer_size = 128; 2769 } 2770 2771 /* Wrap Incoming Mailboxes Test. */ 2772 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2773 2774 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2775 rval = qla2x00_mbx_reg_test(vha); 2776 if (rval) 2777 ql_log(ql_log_warn, vha, 0x0080, 2778 "Failed mailbox send register test.\n"); 2779 else 2780 /* Flag a successful rval */ 2781 rval = QLA_SUCCESS; 2782 spin_lock_irqsave(&ha->hardware_lock, flags); 2783 2784 chip_diag_failed: 2785 if (rval) 2786 ql_log(ql_log_info, vha, 0x0081, 2787 "Chip diagnostics **** FAILED ****.\n"); 2788 2789 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2790 2791 return (rval); 2792 } 2793 2794 /** 2795 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 2796 * @ha: HA context 2797 * 2798 * Returns 0 on success. 2799 */ 2800 int 2801 qla24xx_chip_diag(scsi_qla_host_t *vha) 2802 { 2803 int rval; 2804 struct qla_hw_data *ha = vha->hw; 2805 struct req_que *req = ha->req_q_map[0]; 2806 2807 if (IS_P3P_TYPE(ha)) 2808 return QLA_SUCCESS; 2809 2810 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 2811 2812 rval = qla2x00_mbx_reg_test(vha); 2813 if (rval) { 2814 ql_log(ql_log_warn, vha, 0x0082, 2815 "Failed mailbox send register test.\n"); 2816 } else { 2817 /* Flag a successful rval */ 2818 rval = QLA_SUCCESS; 2819 } 2820 2821 return rval; 2822 } 2823 2824 static void 2825 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 2826 { 2827 int rval; 2828 dma_addr_t tc_dma; 2829 void *tc; 2830 struct qla_hw_data *ha = vha->hw; 2831 2832 if (ha->eft) { 2833 ql_dbg(ql_dbg_init, vha, 0x00bd, 2834 "%s: Offload Mem is already allocated.\n", 2835 __func__); 2836 return; 2837 } 2838 2839 if (IS_FWI2_CAPABLE(ha)) { 2840 /* Allocate memory for Fibre Channel Event Buffer. */ 2841 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2842 !IS_QLA27XX(ha)) 2843 goto try_eft; 2844 2845 if (ha->fce) 2846 dma_free_coherent(&ha->pdev->dev, 2847 FCE_SIZE, ha->fce, ha->fce_dma); 2848 2849 /* Allocate memory for Fibre Channel Event Buffer. */ 2850 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 2851 GFP_KERNEL); 2852 if (!tc) { 2853 ql_log(ql_log_warn, vha, 0x00be, 2854 "Unable to allocate (%d KB) for FCE.\n", 2855 FCE_SIZE / 1024); 2856 goto try_eft; 2857 } 2858 2859 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 2860 ha->fce_mb, &ha->fce_bufs); 2861 if (rval) { 2862 ql_log(ql_log_warn, vha, 0x00bf, 2863 "Unable to initialize FCE (%d).\n", rval); 2864 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 2865 tc_dma); 2866 ha->flags.fce_enabled = 0; 2867 goto try_eft; 2868 } 2869 ql_dbg(ql_dbg_init, vha, 0x00c0, 2870 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 2871 2872 ha->flags.fce_enabled = 1; 2873 ha->fce_dma = tc_dma; 2874 ha->fce = tc; 2875 2876 try_eft: 2877 if (ha->eft) 2878 dma_free_coherent(&ha->pdev->dev, 2879 EFT_SIZE, ha->eft, ha->eft_dma); 2880 2881 /* Allocate memory for Extended Trace Buffer. */ 2882 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 2883 GFP_KERNEL); 2884 if (!tc) { 2885 ql_log(ql_log_warn, vha, 0x00c1, 2886 "Unable to allocate (%d KB) for EFT.\n", 2887 EFT_SIZE / 1024); 2888 goto eft_err; 2889 } 2890 2891 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 2892 if (rval) { 2893 ql_log(ql_log_warn, vha, 0x00c2, 2894 "Unable to initialize EFT (%d).\n", rval); 2895 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 2896 tc_dma); 2897 goto eft_err; 2898 } 2899 ql_dbg(ql_dbg_init, vha, 0x00c3, 2900 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2901 2902 ha->eft_dma = tc_dma; 2903 ha->eft = tc; 2904 } 2905 2906 eft_err: 2907 return; 2908 } 2909 2910 void 2911 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 2912 { 2913 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 2914 eft_size, fce_size, mq_size; 2915 struct qla_hw_data *ha = vha->hw; 2916 struct req_que *req = ha->req_q_map[0]; 2917 struct rsp_que *rsp = ha->rsp_q_map[0]; 2918 struct qla2xxx_fw_dump *fw_dump; 2919 2920 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 2921 req_q_size = rsp_q_size = 0; 2922 2923 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2924 fixed_size = sizeof(struct qla2100_fw_dump); 2925 } else if (IS_QLA23XX(ha)) { 2926 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 2927 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 2928 sizeof(uint16_t); 2929 } else if (IS_FWI2_CAPABLE(ha)) { 2930 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 2931 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 2932 else if (IS_QLA81XX(ha)) 2933 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 2934 else if (IS_QLA25XX(ha)) 2935 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 2936 else 2937 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 2938 2939 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 2940 sizeof(uint32_t); 2941 if (ha->mqenable) { 2942 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 2943 mq_size = sizeof(struct qla2xxx_mq_chain); 2944 /* 2945 * Allocate maximum buffer size for all queues. 2946 * Resizing must be done at end-of-dump processing. 2947 */ 2948 mq_size += ha->max_req_queues * 2949 (req->length * sizeof(request_t)); 2950 mq_size += ha->max_rsp_queues * 2951 (rsp->length * sizeof(response_t)); 2952 } 2953 if (ha->tgt.atio_ring) 2954 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 2955 /* Allocate memory for Fibre Channel Event Buffer. */ 2956 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2957 !IS_QLA27XX(ha)) 2958 goto try_eft; 2959 2960 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 2961 try_eft: 2962 ql_dbg(ql_dbg_init, vha, 0x00c3, 2963 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2964 eft_size = EFT_SIZE; 2965 } 2966 2967 if (IS_QLA27XX(ha)) { 2968 if (!ha->fw_dump_template) { 2969 ql_log(ql_log_warn, vha, 0x00ba, 2970 "Failed missing fwdump template\n"); 2971 return; 2972 } 2973 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 2974 ql_dbg(ql_dbg_init, vha, 0x00fa, 2975 "-> allocating fwdump (%x bytes)...\n", dump_size); 2976 goto allocate; 2977 } 2978 2979 req_q_size = req->length * sizeof(request_t); 2980 rsp_q_size = rsp->length * sizeof(response_t); 2981 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 2982 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 2983 ha->chain_offset = dump_size; 2984 dump_size += mq_size + fce_size; 2985 2986 if (ha->exchoffld_buf) 2987 dump_size += sizeof(struct qla2xxx_offld_chain) + 2988 ha->exchoffld_size; 2989 if (ha->exlogin_buf) 2990 dump_size += sizeof(struct qla2xxx_offld_chain) + 2991 ha->exlogin_size; 2992 2993 allocate: 2994 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 2995 fw_dump = vmalloc(dump_size); 2996 if (!fw_dump) { 2997 ql_log(ql_log_warn, vha, 0x00c4, 2998 "Unable to allocate (%d KB) for firmware dump.\n", 2999 dump_size / 1024); 3000 } else { 3001 if (ha->fw_dump) 3002 vfree(ha->fw_dump); 3003 ha->fw_dump = fw_dump; 3004 3005 ha->fw_dump_len = dump_size; 3006 ql_dbg(ql_dbg_init, vha, 0x00c5, 3007 "Allocated (%d KB) for firmware dump.\n", 3008 dump_size / 1024); 3009 3010 if (IS_QLA27XX(ha)) 3011 return; 3012 3013 ha->fw_dump->signature[0] = 'Q'; 3014 ha->fw_dump->signature[1] = 'L'; 3015 ha->fw_dump->signature[2] = 'G'; 3016 ha->fw_dump->signature[3] = 'C'; 3017 ha->fw_dump->version = htonl(1); 3018 3019 ha->fw_dump->fixed_size = htonl(fixed_size); 3020 ha->fw_dump->mem_size = htonl(mem_size); 3021 ha->fw_dump->req_q_size = htonl(req_q_size); 3022 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3023 3024 ha->fw_dump->eft_size = htonl(eft_size); 3025 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3026 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3027 3028 ha->fw_dump->header_size = 3029 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3030 } 3031 } 3032 } 3033 3034 static int 3035 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3036 { 3037 #define MPS_MASK 0xe0 3038 int rval; 3039 uint16_t dc; 3040 uint32_t dw; 3041 3042 if (!IS_QLA81XX(vha->hw)) 3043 return QLA_SUCCESS; 3044 3045 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3046 if (rval != QLA_SUCCESS) { 3047 ql_log(ql_log_warn, vha, 0x0105, 3048 "Unable to acquire semaphore.\n"); 3049 goto done; 3050 } 3051 3052 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3053 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3054 if (rval != QLA_SUCCESS) { 3055 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3056 goto done_release; 3057 } 3058 3059 dc &= MPS_MASK; 3060 if (dc == (dw & MPS_MASK)) 3061 goto done_release; 3062 3063 dw &= ~MPS_MASK; 3064 dw |= dc; 3065 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3066 if (rval != QLA_SUCCESS) { 3067 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3068 } 3069 3070 done_release: 3071 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3072 if (rval != QLA_SUCCESS) { 3073 ql_log(ql_log_warn, vha, 0x006d, 3074 "Unable to release semaphore.\n"); 3075 } 3076 3077 done: 3078 return rval; 3079 } 3080 3081 int 3082 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3083 { 3084 /* Don't try to reallocate the array */ 3085 if (req->outstanding_cmds) 3086 return QLA_SUCCESS; 3087 3088 if (!IS_FWI2_CAPABLE(ha)) 3089 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3090 else { 3091 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3092 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3093 else 3094 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3095 } 3096 3097 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 3098 req->num_outstanding_cmds, GFP_KERNEL); 3099 3100 if (!req->outstanding_cmds) { 3101 /* 3102 * Try to allocate a minimal size just so we can get through 3103 * initialization. 3104 */ 3105 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3106 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 3107 req->num_outstanding_cmds, GFP_KERNEL); 3108 3109 if (!req->outstanding_cmds) { 3110 ql_log(ql_log_fatal, NULL, 0x0126, 3111 "Failed to allocate memory for " 3112 "outstanding_cmds for req_que %p.\n", req); 3113 req->num_outstanding_cmds = 0; 3114 return QLA_FUNCTION_FAILED; 3115 } 3116 } 3117 3118 return QLA_SUCCESS; 3119 } 3120 3121 #define PRINT_FIELD(_field, _flag, _str) { \ 3122 if (a0->_field & _flag) {\ 3123 if (p) {\ 3124 strcat(ptr, "|");\ 3125 ptr++;\ 3126 leftover--;\ 3127 } \ 3128 len = snprintf(ptr, leftover, "%s", _str); \ 3129 p = 1;\ 3130 leftover -= len;\ 3131 ptr += len; \ 3132 } \ 3133 } 3134 3135 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3136 { 3137 #define STR_LEN 64 3138 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3139 u8 str[STR_LEN], *ptr, p; 3140 int leftover, len; 3141 3142 memset(str, 0, STR_LEN); 3143 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3144 ql_dbg(ql_dbg_init, vha, 0x015a, 3145 "SFP MFG Name: %s\n", str); 3146 3147 memset(str, 0, STR_LEN); 3148 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3149 ql_dbg(ql_dbg_init, vha, 0x015c, 3150 "SFP Part Name: %s\n", str); 3151 3152 /* media */ 3153 memset(str, 0, STR_LEN); 3154 ptr = str; 3155 leftover = STR_LEN; 3156 p = len = 0; 3157 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3158 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3159 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3160 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3161 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3162 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3163 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3164 ql_dbg(ql_dbg_init, vha, 0x0160, 3165 "SFP Media: %s\n", str); 3166 3167 /* link length */ 3168 memset(str, 0, STR_LEN); 3169 ptr = str; 3170 leftover = STR_LEN; 3171 p = len = 0; 3172 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3173 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3174 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3175 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3176 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3177 ql_dbg(ql_dbg_init, vha, 0x0196, 3178 "SFP Link Length: %s\n", str); 3179 3180 memset(str, 0, STR_LEN); 3181 ptr = str; 3182 leftover = STR_LEN; 3183 p = len = 0; 3184 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3185 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3186 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3187 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3188 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3189 ql_dbg(ql_dbg_init, vha, 0x016e, 3190 "SFP FC Link Tech: %s\n", str); 3191 3192 if (a0->length_km) 3193 ql_dbg(ql_dbg_init, vha, 0x016f, 3194 "SFP Distant: %d km\n", a0->length_km); 3195 if (a0->length_100m) 3196 ql_dbg(ql_dbg_init, vha, 0x0170, 3197 "SFP Distant: %d m\n", a0->length_100m*100); 3198 if (a0->length_50um_10m) 3199 ql_dbg(ql_dbg_init, vha, 0x0189, 3200 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3201 if (a0->length_62um_10m) 3202 ql_dbg(ql_dbg_init, vha, 0x018a, 3203 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3204 if (a0->length_om4_10m) 3205 ql_dbg(ql_dbg_init, vha, 0x0194, 3206 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3207 if (a0->length_om3_10m) 3208 ql_dbg(ql_dbg_init, vha, 0x0195, 3209 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3210 } 3211 3212 3213 /* 3214 * Return Code: 3215 * QLA_SUCCESS: no action 3216 * QLA_INTERFACE_ERROR: SFP is not there. 3217 * QLA_FUNCTION_FAILED: detected New SFP 3218 */ 3219 int 3220 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3221 { 3222 int rc = QLA_SUCCESS; 3223 struct sff_8247_a0 *a; 3224 struct qla_hw_data *ha = vha->hw; 3225 3226 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3227 goto out; 3228 3229 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3230 if (rc) 3231 goto out; 3232 3233 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3234 qla2xxx_print_sfp_info(vha); 3235 3236 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3237 /* long range */ 3238 ha->flags.detected_lr_sfp = 1; 3239 3240 if (a->length_km > 5 || a->length_100m > 50) 3241 ha->long_range_distance = LR_DISTANCE_10K; 3242 else 3243 ha->long_range_distance = LR_DISTANCE_5K; 3244 3245 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3246 ql_dbg(ql_dbg_async, vha, 0x507b, 3247 "Detected Long Range SFP.\n"); 3248 } else { 3249 /* short range */ 3250 ha->flags.detected_lr_sfp = 0; 3251 if (ha->flags.using_lr_setting) 3252 ql_dbg(ql_dbg_async, vha, 0x5084, 3253 "Detected Short Range SFP.\n"); 3254 } 3255 3256 if (!vha->flags.init_done) 3257 rc = QLA_SUCCESS; 3258 out: 3259 return rc; 3260 } 3261 3262 /** 3263 * qla2x00_setup_chip() - Load and start RISC firmware. 3264 * @ha: HA context 3265 * 3266 * Returns 0 on success. 3267 */ 3268 static int 3269 qla2x00_setup_chip(scsi_qla_host_t *vha) 3270 { 3271 int rval; 3272 uint32_t srisc_address = 0; 3273 struct qla_hw_data *ha = vha->hw; 3274 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3275 unsigned long flags; 3276 uint16_t fw_major_version; 3277 3278 if (IS_P3P_TYPE(ha)) { 3279 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3280 if (rval == QLA_SUCCESS) { 3281 qla2x00_stop_firmware(vha); 3282 goto enable_82xx_npiv; 3283 } else 3284 goto failed; 3285 } 3286 3287 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3288 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3289 spin_lock_irqsave(&ha->hardware_lock, flags); 3290 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3291 RD_REG_WORD(®->hccr); 3292 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3293 } 3294 3295 qla81xx_mpi_sync(vha); 3296 3297 /* Load firmware sequences */ 3298 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3299 if (rval == QLA_SUCCESS) { 3300 ql_dbg(ql_dbg_init, vha, 0x00c9, 3301 "Verifying Checksum of loaded RISC code.\n"); 3302 3303 rval = qla2x00_verify_checksum(vha, srisc_address); 3304 if (rval == QLA_SUCCESS) { 3305 /* Start firmware execution. */ 3306 ql_dbg(ql_dbg_init, vha, 0x00ca, 3307 "Starting firmware.\n"); 3308 3309 if (ql2xexlogins) 3310 ha->flags.exlogins_enabled = 1; 3311 3312 if (qla_is_exch_offld_enabled(vha)) 3313 ha->flags.exchoffld_enabled = 1; 3314 3315 rval = qla2x00_execute_fw(vha, srisc_address); 3316 /* Retrieve firmware information. */ 3317 if (rval == QLA_SUCCESS) { 3318 qla24xx_detect_sfp(vha); 3319 3320 rval = qla2x00_set_exlogins_buffer(vha); 3321 if (rval != QLA_SUCCESS) 3322 goto failed; 3323 3324 rval = qla2x00_set_exchoffld_buffer(vha); 3325 if (rval != QLA_SUCCESS) 3326 goto failed; 3327 3328 enable_82xx_npiv: 3329 fw_major_version = ha->fw_major_version; 3330 if (IS_P3P_TYPE(ha)) 3331 qla82xx_check_md_needed(vha); 3332 else 3333 rval = qla2x00_get_fw_version(vha); 3334 if (rval != QLA_SUCCESS) 3335 goto failed; 3336 ha->flags.npiv_supported = 0; 3337 if (IS_QLA2XXX_MIDTYPE(ha) && 3338 (ha->fw_attributes & BIT_2)) { 3339 ha->flags.npiv_supported = 1; 3340 if ((!ha->max_npiv_vports) || 3341 ((ha->max_npiv_vports + 1) % 3342 MIN_MULTI_ID_FABRIC)) 3343 ha->max_npiv_vports = 3344 MIN_MULTI_ID_FABRIC - 1; 3345 } 3346 qla2x00_get_resource_cnts(vha); 3347 3348 /* 3349 * Allocate the array of outstanding commands 3350 * now that we know the firmware resources. 3351 */ 3352 rval = qla2x00_alloc_outstanding_cmds(ha, 3353 vha->req); 3354 if (rval != QLA_SUCCESS) 3355 goto failed; 3356 3357 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3358 qla2x00_alloc_offload_mem(vha); 3359 3360 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3361 qla2x00_alloc_fw_dump(vha); 3362 3363 } else { 3364 goto failed; 3365 } 3366 } else { 3367 ql_log(ql_log_fatal, vha, 0x00cd, 3368 "ISP Firmware failed checksum.\n"); 3369 goto failed; 3370 } 3371 } else 3372 goto failed; 3373 3374 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3375 /* Enable proper parity. */ 3376 spin_lock_irqsave(&ha->hardware_lock, flags); 3377 if (IS_QLA2300(ha)) 3378 /* SRAM parity */ 3379 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3380 else 3381 /* SRAM, Instruction RAM and GP RAM parity */ 3382 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3383 RD_REG_WORD(®->hccr); 3384 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3385 } 3386 3387 if (IS_QLA27XX(ha)) 3388 ha->flags.fac_supported = 1; 3389 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3390 uint32_t size; 3391 3392 rval = qla81xx_fac_get_sector_size(vha, &size); 3393 if (rval == QLA_SUCCESS) { 3394 ha->flags.fac_supported = 1; 3395 ha->fdt_block_size = size << 2; 3396 } else { 3397 ql_log(ql_log_warn, vha, 0x00ce, 3398 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3399 ha->fw_major_version, ha->fw_minor_version, 3400 ha->fw_subminor_version); 3401 3402 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3403 ha->flags.fac_supported = 0; 3404 rval = QLA_SUCCESS; 3405 } 3406 } 3407 } 3408 failed: 3409 if (rval) { 3410 ql_log(ql_log_fatal, vha, 0x00cf, 3411 "Setup chip ****FAILED****.\n"); 3412 } 3413 3414 return (rval); 3415 } 3416 3417 /** 3418 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3419 * @ha: HA context 3420 * 3421 * Beginning of request ring has initialization control block already built 3422 * by nvram config routine. 3423 * 3424 * Returns 0 on success. 3425 */ 3426 void 3427 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3428 { 3429 uint16_t cnt; 3430 response_t *pkt; 3431 3432 rsp->ring_ptr = rsp->ring; 3433 rsp->ring_index = 0; 3434 rsp->status_srb = NULL; 3435 pkt = rsp->ring_ptr; 3436 for (cnt = 0; cnt < rsp->length; cnt++) { 3437 pkt->signature = RESPONSE_PROCESSED; 3438 pkt++; 3439 } 3440 } 3441 3442 /** 3443 * qla2x00_update_fw_options() - Read and process firmware options. 3444 * @ha: HA context 3445 * 3446 * Returns 0 on success. 3447 */ 3448 void 3449 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3450 { 3451 uint16_t swing, emphasis, tx_sens, rx_sens; 3452 struct qla_hw_data *ha = vha->hw; 3453 3454 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3455 qla2x00_get_fw_options(vha, ha->fw_options); 3456 3457 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3458 return; 3459 3460 /* Serial Link options. */ 3461 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3462 "Serial link options.\n"); 3463 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3464 (uint8_t *)&ha->fw_seriallink_options, 3465 sizeof(ha->fw_seriallink_options)); 3466 3467 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3468 if (ha->fw_seriallink_options[3] & BIT_2) { 3469 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3470 3471 /* 1G settings */ 3472 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3473 emphasis = (ha->fw_seriallink_options[2] & 3474 (BIT_4 | BIT_3)) >> 3; 3475 tx_sens = ha->fw_seriallink_options[0] & 3476 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3477 rx_sens = (ha->fw_seriallink_options[0] & 3478 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3479 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3480 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3481 if (rx_sens == 0x0) 3482 rx_sens = 0x3; 3483 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3484 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3485 ha->fw_options[10] |= BIT_5 | 3486 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3487 (tx_sens & (BIT_1 | BIT_0)); 3488 3489 /* 2G settings */ 3490 swing = (ha->fw_seriallink_options[2] & 3491 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3492 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3493 tx_sens = ha->fw_seriallink_options[1] & 3494 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3495 rx_sens = (ha->fw_seriallink_options[1] & 3496 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3497 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3498 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3499 if (rx_sens == 0x0) 3500 rx_sens = 0x3; 3501 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3502 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3503 ha->fw_options[11] |= BIT_5 | 3504 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3505 (tx_sens & (BIT_1 | BIT_0)); 3506 } 3507 3508 /* FCP2 options. */ 3509 /* Return command IOCBs without waiting for an ABTS to complete. */ 3510 ha->fw_options[3] |= BIT_13; 3511 3512 /* LED scheme. */ 3513 if (ha->flags.enable_led_scheme) 3514 ha->fw_options[2] |= BIT_12; 3515 3516 /* Detect ISP6312. */ 3517 if (IS_QLA6312(ha)) 3518 ha->fw_options[2] |= BIT_13; 3519 3520 /* Set Retry FLOGI in case of P2P connection */ 3521 if (ha->operating_mode == P2P) { 3522 ha->fw_options[2] |= BIT_3; 3523 ql_dbg(ql_dbg_disc, vha, 0x2100, 3524 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3525 __func__, ha->fw_options[2]); 3526 } 3527 3528 /* Update firmware options. */ 3529 qla2x00_set_fw_options(vha, ha->fw_options); 3530 } 3531 3532 void 3533 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3534 { 3535 int rval; 3536 struct qla_hw_data *ha = vha->hw; 3537 3538 if (IS_P3P_TYPE(ha)) 3539 return; 3540 3541 /* Hold status IOCBs until ABTS response received. */ 3542 if (ql2xfwholdabts) 3543 ha->fw_options[3] |= BIT_12; 3544 3545 /* Set Retry FLOGI in case of P2P connection */ 3546 if (ha->operating_mode == P2P) { 3547 ha->fw_options[2] |= BIT_3; 3548 ql_dbg(ql_dbg_disc, vha, 0x2101, 3549 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3550 __func__, ha->fw_options[2]); 3551 } 3552 3553 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3554 if (ql2xmvasynctoatio && 3555 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3556 if (qla_tgt_mode_enabled(vha) || 3557 qla_dual_mode_enabled(vha)) 3558 ha->fw_options[2] |= BIT_11; 3559 else 3560 ha->fw_options[2] &= ~BIT_11; 3561 } 3562 3563 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3564 /* 3565 * Tell FW to track each exchange to prevent 3566 * driver from using stale exchange. 3567 */ 3568 if (qla_tgt_mode_enabled(vha) || 3569 qla_dual_mode_enabled(vha)) 3570 ha->fw_options[2] |= BIT_4; 3571 else 3572 ha->fw_options[2] &= ~BIT_4; 3573 3574 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3575 if (qla2xuseresexchforels) 3576 ha->fw_options[2] |= BIT_8; 3577 else 3578 ha->fw_options[2] &= ~BIT_8; 3579 } 3580 3581 ql_dbg(ql_dbg_init, vha, 0x00e8, 3582 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3583 __func__, ha->fw_options[1], ha->fw_options[2], 3584 ha->fw_options[3], vha->host->active_mode); 3585 3586 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3587 qla2x00_set_fw_options(vha, ha->fw_options); 3588 3589 /* Update Serial Link options. */ 3590 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3591 return; 3592 3593 rval = qla2x00_set_serdes_params(vha, 3594 le16_to_cpu(ha->fw_seriallink_options24[1]), 3595 le16_to_cpu(ha->fw_seriallink_options24[2]), 3596 le16_to_cpu(ha->fw_seriallink_options24[3])); 3597 if (rval != QLA_SUCCESS) { 3598 ql_log(ql_log_warn, vha, 0x0104, 3599 "Unable to update Serial Link options (%x).\n", rval); 3600 } 3601 } 3602 3603 void 3604 qla2x00_config_rings(struct scsi_qla_host *vha) 3605 { 3606 struct qla_hw_data *ha = vha->hw; 3607 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3608 struct req_que *req = ha->req_q_map[0]; 3609 struct rsp_que *rsp = ha->rsp_q_map[0]; 3610 3611 /* Setup ring parameters in initialization control block. */ 3612 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3613 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3614 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3615 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3616 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3617 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3618 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3619 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3620 3621 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3622 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3623 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3624 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3625 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3626 } 3627 3628 void 3629 qla24xx_config_rings(struct scsi_qla_host *vha) 3630 { 3631 struct qla_hw_data *ha = vha->hw; 3632 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3633 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3634 struct qla_msix_entry *msix; 3635 struct init_cb_24xx *icb; 3636 uint16_t rid = 0; 3637 struct req_que *req = ha->req_q_map[0]; 3638 struct rsp_que *rsp = ha->rsp_q_map[0]; 3639 3640 /* Setup ring parameters in initialization control block. */ 3641 icb = (struct init_cb_24xx *)ha->init_cb; 3642 icb->request_q_outpointer = cpu_to_le16(0); 3643 icb->response_q_inpointer = cpu_to_le16(0); 3644 icb->request_q_length = cpu_to_le16(req->length); 3645 icb->response_q_length = cpu_to_le16(rsp->length); 3646 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3647 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3648 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3649 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3650 3651 /* Setup ATIO queue dma pointers for target mode */ 3652 icb->atio_q_inpointer = cpu_to_le16(0); 3653 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3654 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3655 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3656 3657 if (IS_SHADOW_REG_CAPABLE(ha)) 3658 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3659 3660 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3661 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3662 icb->rid = cpu_to_le16(rid); 3663 if (ha->flags.msix_enabled) { 3664 msix = &ha->msix_entries[1]; 3665 ql_dbg(ql_dbg_init, vha, 0x0019, 3666 "Registering vector 0x%x for base que.\n", 3667 msix->entry); 3668 icb->msix = cpu_to_le16(msix->entry); 3669 } 3670 /* Use alternate PCI bus number */ 3671 if (MSB(rid)) 3672 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3673 /* Use alternate PCI devfn */ 3674 if (LSB(rid)) 3675 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3676 3677 /* Use Disable MSIX Handshake mode for capable adapters */ 3678 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3679 (ha->flags.msix_enabled)) { 3680 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3681 ha->flags.disable_msix_handshake = 1; 3682 ql_dbg(ql_dbg_init, vha, 0x00fe, 3683 "MSIX Handshake Disable Mode turned on.\n"); 3684 } else { 3685 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3686 } 3687 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3688 3689 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3690 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3691 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3692 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3693 } else { 3694 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3695 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3696 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3697 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3698 } 3699 qlt_24xx_config_rings(vha); 3700 3701 /* PCI posting */ 3702 RD_REG_DWORD(&ioreg->hccr); 3703 } 3704 3705 /** 3706 * qla2x00_init_rings() - Initializes firmware. 3707 * @ha: HA context 3708 * 3709 * Beginning of request ring has initialization control block already built 3710 * by nvram config routine. 3711 * 3712 * Returns 0 on success. 3713 */ 3714 int 3715 qla2x00_init_rings(scsi_qla_host_t *vha) 3716 { 3717 int rval; 3718 unsigned long flags = 0; 3719 int cnt, que; 3720 struct qla_hw_data *ha = vha->hw; 3721 struct req_que *req; 3722 struct rsp_que *rsp; 3723 struct mid_init_cb_24xx *mid_init_cb = 3724 (struct mid_init_cb_24xx *) ha->init_cb; 3725 3726 spin_lock_irqsave(&ha->hardware_lock, flags); 3727 3728 /* Clear outstanding commands array. */ 3729 for (que = 0; que < ha->max_req_queues; que++) { 3730 req = ha->req_q_map[que]; 3731 if (!req || !test_bit(que, ha->req_qid_map)) 3732 continue; 3733 req->out_ptr = (void *)(req->ring + req->length); 3734 *req->out_ptr = 0; 3735 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3736 req->outstanding_cmds[cnt] = NULL; 3737 3738 req->current_outstanding_cmd = 1; 3739 3740 /* Initialize firmware. */ 3741 req->ring_ptr = req->ring; 3742 req->ring_index = 0; 3743 req->cnt = req->length; 3744 } 3745 3746 for (que = 0; que < ha->max_rsp_queues; que++) { 3747 rsp = ha->rsp_q_map[que]; 3748 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 3749 continue; 3750 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 3751 *rsp->in_ptr = 0; 3752 /* Initialize response queue entries */ 3753 if (IS_QLAFX00(ha)) 3754 qlafx00_init_response_q_entries(rsp); 3755 else 3756 qla2x00_init_response_q_entries(rsp); 3757 } 3758 3759 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 3760 ha->tgt.atio_ring_index = 0; 3761 /* Initialize ATIO queue entries */ 3762 qlt_init_atio_q_entries(vha); 3763 3764 ha->isp_ops->config_rings(vha); 3765 3766 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3767 3768 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 3769 3770 if (IS_QLAFX00(ha)) { 3771 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 3772 goto next_check; 3773 } 3774 3775 /* Update any ISP specific firmware options before initialization. */ 3776 ha->isp_ops->update_fw_options(vha); 3777 3778 if (ha->flags.npiv_supported) { 3779 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 3780 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 3781 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 3782 } 3783 3784 if (IS_FWI2_CAPABLE(ha)) { 3785 mid_init_cb->options = cpu_to_le16(BIT_1); 3786 mid_init_cb->init_cb.execution_throttle = 3787 cpu_to_le16(ha->cur_fw_xcb_count); 3788 ha->flags.dport_enabled = 3789 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 3790 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 3791 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 3792 /* FA-WWPN Status */ 3793 ha->flags.fawwpn_enabled = 3794 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 3795 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 3796 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 3797 } 3798 3799 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 3800 next_check: 3801 if (rval) { 3802 ql_log(ql_log_fatal, vha, 0x00d2, 3803 "Init Firmware **** FAILED ****.\n"); 3804 } else { 3805 ql_dbg(ql_dbg_init, vha, 0x00d3, 3806 "Init Firmware -- success.\n"); 3807 QLA_FW_STARTED(ha); 3808 } 3809 3810 return (rval); 3811 } 3812 3813 /** 3814 * qla2x00_fw_ready() - Waits for firmware ready. 3815 * @ha: HA context 3816 * 3817 * Returns 0 on success. 3818 */ 3819 static int 3820 qla2x00_fw_ready(scsi_qla_host_t *vha) 3821 { 3822 int rval; 3823 unsigned long wtime, mtime, cs84xx_time; 3824 uint16_t min_wait; /* Minimum wait time if loop is down */ 3825 uint16_t wait_time; /* Wait time if loop is coming ready */ 3826 uint16_t state[6]; 3827 struct qla_hw_data *ha = vha->hw; 3828 3829 if (IS_QLAFX00(vha->hw)) 3830 return qlafx00_fw_ready(vha); 3831 3832 rval = QLA_SUCCESS; 3833 3834 /* Time to wait for loop down */ 3835 if (IS_P3P_TYPE(ha)) 3836 min_wait = 30; 3837 else 3838 min_wait = 20; 3839 3840 /* 3841 * Firmware should take at most one RATOV to login, plus 5 seconds for 3842 * our own processing. 3843 */ 3844 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 3845 wait_time = min_wait; 3846 } 3847 3848 /* Min wait time if loop down */ 3849 mtime = jiffies + (min_wait * HZ); 3850 3851 /* wait time before firmware ready */ 3852 wtime = jiffies + (wait_time * HZ); 3853 3854 /* Wait for ISP to finish LIP */ 3855 if (!vha->flags.init_done) 3856 ql_log(ql_log_info, vha, 0x801e, 3857 "Waiting for LIP to complete.\n"); 3858 3859 do { 3860 memset(state, -1, sizeof(state)); 3861 rval = qla2x00_get_firmware_state(vha, state); 3862 if (rval == QLA_SUCCESS) { 3863 if (state[0] < FSTATE_LOSS_OF_SYNC) { 3864 vha->device_flags &= ~DFLG_NO_CABLE; 3865 } 3866 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 3867 ql_dbg(ql_dbg_taskm, vha, 0x801f, 3868 "fw_state=%x 84xx=%x.\n", state[0], 3869 state[2]); 3870 if ((state[2] & FSTATE_LOGGED_IN) && 3871 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 3872 ql_dbg(ql_dbg_taskm, vha, 0x8028, 3873 "Sending verify iocb.\n"); 3874 3875 cs84xx_time = jiffies; 3876 rval = qla84xx_init_chip(vha); 3877 if (rval != QLA_SUCCESS) { 3878 ql_log(ql_log_warn, 3879 vha, 0x8007, 3880 "Init chip failed.\n"); 3881 break; 3882 } 3883 3884 /* Add time taken to initialize. */ 3885 cs84xx_time = jiffies - cs84xx_time; 3886 wtime += cs84xx_time; 3887 mtime += cs84xx_time; 3888 ql_dbg(ql_dbg_taskm, vha, 0x8008, 3889 "Increasing wait time by %ld. " 3890 "New time %ld.\n", cs84xx_time, 3891 wtime); 3892 } 3893 } else if (state[0] == FSTATE_READY) { 3894 ql_dbg(ql_dbg_taskm, vha, 0x8037, 3895 "F/W Ready - OK.\n"); 3896 3897 qla2x00_get_retry_cnt(vha, &ha->retry_count, 3898 &ha->login_timeout, &ha->r_a_tov); 3899 3900 rval = QLA_SUCCESS; 3901 break; 3902 } 3903 3904 rval = QLA_FUNCTION_FAILED; 3905 3906 if (atomic_read(&vha->loop_down_timer) && 3907 state[0] != FSTATE_READY) { 3908 /* Loop down. Timeout on min_wait for states 3909 * other than Wait for Login. 3910 */ 3911 if (time_after_eq(jiffies, mtime)) { 3912 ql_log(ql_log_info, vha, 0x8038, 3913 "Cable is unplugged...\n"); 3914 3915 vha->device_flags |= DFLG_NO_CABLE; 3916 break; 3917 } 3918 } 3919 } else { 3920 /* Mailbox cmd failed. Timeout on min_wait. */ 3921 if (time_after_eq(jiffies, mtime) || 3922 ha->flags.isp82xx_fw_hung) 3923 break; 3924 } 3925 3926 if (time_after_eq(jiffies, wtime)) 3927 break; 3928 3929 /* Delay for a while */ 3930 msleep(500); 3931 } while (1); 3932 3933 ql_dbg(ql_dbg_taskm, vha, 0x803a, 3934 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 3935 state[1], state[2], state[3], state[4], state[5], jiffies); 3936 3937 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 3938 ql_log(ql_log_warn, vha, 0x803b, 3939 "Firmware ready **** FAILED ****.\n"); 3940 } 3941 3942 return (rval); 3943 } 3944 3945 /* 3946 * qla2x00_configure_hba 3947 * Setup adapter context. 3948 * 3949 * Input: 3950 * ha = adapter state pointer. 3951 * 3952 * Returns: 3953 * 0 = success 3954 * 3955 * Context: 3956 * Kernel context. 3957 */ 3958 static int 3959 qla2x00_configure_hba(scsi_qla_host_t *vha) 3960 { 3961 int rval; 3962 uint16_t loop_id; 3963 uint16_t topo; 3964 uint16_t sw_cap; 3965 uint8_t al_pa; 3966 uint8_t area; 3967 uint8_t domain; 3968 char connect_type[22]; 3969 struct qla_hw_data *ha = vha->hw; 3970 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 3971 port_id_t id; 3972 unsigned long flags; 3973 3974 /* Get host addresses. */ 3975 rval = qla2x00_get_adapter_id(vha, 3976 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 3977 if (rval != QLA_SUCCESS) { 3978 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 3979 IS_CNA_CAPABLE(ha) || 3980 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 3981 ql_dbg(ql_dbg_disc, vha, 0x2008, 3982 "Loop is in a transition state.\n"); 3983 } else { 3984 ql_log(ql_log_warn, vha, 0x2009, 3985 "Unable to get host loop ID.\n"); 3986 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 3987 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 3988 ql_log(ql_log_warn, vha, 0x1151, 3989 "Doing link init.\n"); 3990 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 3991 return rval; 3992 } 3993 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3994 } 3995 return (rval); 3996 } 3997 3998 if (topo == 4) { 3999 ql_log(ql_log_info, vha, 0x200a, 4000 "Cannot get topology - retrying.\n"); 4001 return (QLA_FUNCTION_FAILED); 4002 } 4003 4004 vha->loop_id = loop_id; 4005 4006 /* initialize */ 4007 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4008 ha->operating_mode = LOOP; 4009 ha->switch_cap = 0; 4010 4011 switch (topo) { 4012 case 0: 4013 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4014 ha->current_topology = ISP_CFG_NL; 4015 strcpy(connect_type, "(Loop)"); 4016 break; 4017 4018 case 1: 4019 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4020 ha->switch_cap = sw_cap; 4021 ha->current_topology = ISP_CFG_FL; 4022 strcpy(connect_type, "(FL_Port)"); 4023 break; 4024 4025 case 2: 4026 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4027 ha->operating_mode = P2P; 4028 ha->current_topology = ISP_CFG_N; 4029 strcpy(connect_type, "(N_Port-to-N_Port)"); 4030 break; 4031 4032 case 3: 4033 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4034 ha->switch_cap = sw_cap; 4035 ha->operating_mode = P2P; 4036 ha->current_topology = ISP_CFG_F; 4037 strcpy(connect_type, "(F_Port)"); 4038 break; 4039 4040 default: 4041 ql_dbg(ql_dbg_disc, vha, 0x200f, 4042 "HBA in unknown topology %x, using NL.\n", topo); 4043 ha->current_topology = ISP_CFG_NL; 4044 strcpy(connect_type, "(Loop)"); 4045 break; 4046 } 4047 4048 /* Save Host port and loop ID. */ 4049 /* byte order - Big Endian */ 4050 id.b.domain = domain; 4051 id.b.area = area; 4052 id.b.al_pa = al_pa; 4053 id.b.rsvd_1 = 0; 4054 spin_lock_irqsave(&ha->hardware_lock, flags); 4055 qlt_update_host_map(vha, id); 4056 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4057 4058 if (!vha->flags.init_done) 4059 ql_log(ql_log_info, vha, 0x2010, 4060 "Topology - %s, Host Loop address 0x%x.\n", 4061 connect_type, vha->loop_id); 4062 4063 return(rval); 4064 } 4065 4066 inline void 4067 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4068 char *def) 4069 { 4070 char *st, *en; 4071 uint16_t index; 4072 struct qla_hw_data *ha = vha->hw; 4073 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4074 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4075 4076 if (memcmp(model, BINZERO, len) != 0) { 4077 strncpy(ha->model_number, model, len); 4078 st = en = ha->model_number; 4079 en += len - 1; 4080 while (en > st) { 4081 if (*en != 0x20 && *en != 0x00) 4082 break; 4083 *en-- = '\0'; 4084 } 4085 4086 index = (ha->pdev->subsystem_device & 0xff); 4087 if (use_tbl && 4088 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4089 index < QLA_MODEL_NAMES) 4090 strncpy(ha->model_desc, 4091 qla2x00_model_name[index * 2 + 1], 4092 sizeof(ha->model_desc) - 1); 4093 } else { 4094 index = (ha->pdev->subsystem_device & 0xff); 4095 if (use_tbl && 4096 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4097 index < QLA_MODEL_NAMES) { 4098 strcpy(ha->model_number, 4099 qla2x00_model_name[index * 2]); 4100 strncpy(ha->model_desc, 4101 qla2x00_model_name[index * 2 + 1], 4102 sizeof(ha->model_desc) - 1); 4103 } else { 4104 strcpy(ha->model_number, def); 4105 } 4106 } 4107 if (IS_FWI2_CAPABLE(ha)) 4108 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4109 sizeof(ha->model_desc)); 4110 } 4111 4112 /* On sparc systems, obtain port and node WWN from firmware 4113 * properties. 4114 */ 4115 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4116 { 4117 #ifdef CONFIG_SPARC 4118 struct qla_hw_data *ha = vha->hw; 4119 struct pci_dev *pdev = ha->pdev; 4120 struct device_node *dp = pci_device_to_OF_node(pdev); 4121 const u8 *val; 4122 int len; 4123 4124 val = of_get_property(dp, "port-wwn", &len); 4125 if (val && len >= WWN_SIZE) 4126 memcpy(nv->port_name, val, WWN_SIZE); 4127 4128 val = of_get_property(dp, "node-wwn", &len); 4129 if (val && len >= WWN_SIZE) 4130 memcpy(nv->node_name, val, WWN_SIZE); 4131 #endif 4132 } 4133 4134 /* 4135 * NVRAM configuration for ISP 2xxx 4136 * 4137 * Input: 4138 * ha = adapter block pointer. 4139 * 4140 * Output: 4141 * initialization control block in response_ring 4142 * host adapters parameters in host adapter block 4143 * 4144 * Returns: 4145 * 0 = success. 4146 */ 4147 int 4148 qla2x00_nvram_config(scsi_qla_host_t *vha) 4149 { 4150 int rval; 4151 uint8_t chksum = 0; 4152 uint16_t cnt; 4153 uint8_t *dptr1, *dptr2; 4154 struct qla_hw_data *ha = vha->hw; 4155 init_cb_t *icb = ha->init_cb; 4156 nvram_t *nv = ha->nvram; 4157 uint8_t *ptr = ha->nvram; 4158 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4159 4160 rval = QLA_SUCCESS; 4161 4162 /* Determine NVRAM starting address. */ 4163 ha->nvram_size = sizeof(nvram_t); 4164 ha->nvram_base = 0; 4165 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4166 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4167 ha->nvram_base = 0x80; 4168 4169 /* Get NVRAM data and calculate checksum. */ 4170 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4171 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4172 chksum += *ptr++; 4173 4174 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4175 "Contents of NVRAM.\n"); 4176 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4177 (uint8_t *)nv, ha->nvram_size); 4178 4179 /* Bad NVRAM data, set defaults parameters. */ 4180 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4181 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4182 /* Reset NVRAM data. */ 4183 ql_log(ql_log_warn, vha, 0x0064, 4184 "Inconsistent NVRAM " 4185 "detected: checksum=0x%x id=%c version=0x%x.\n", 4186 chksum, nv->id[0], nv->nvram_version); 4187 ql_log(ql_log_warn, vha, 0x0065, 4188 "Falling back to " 4189 "functioning (yet invalid -- WWPN) defaults.\n"); 4190 4191 /* 4192 * Set default initialization control block. 4193 */ 4194 memset(nv, 0, ha->nvram_size); 4195 nv->parameter_block_version = ICB_VERSION; 4196 4197 if (IS_QLA23XX(ha)) { 4198 nv->firmware_options[0] = BIT_2 | BIT_1; 4199 nv->firmware_options[1] = BIT_7 | BIT_5; 4200 nv->add_firmware_options[0] = BIT_5; 4201 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4202 nv->frame_payload_size = 2048; 4203 nv->special_options[1] = BIT_7; 4204 } else if (IS_QLA2200(ha)) { 4205 nv->firmware_options[0] = BIT_2 | BIT_1; 4206 nv->firmware_options[1] = BIT_7 | BIT_5; 4207 nv->add_firmware_options[0] = BIT_5; 4208 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4209 nv->frame_payload_size = 1024; 4210 } else if (IS_QLA2100(ha)) { 4211 nv->firmware_options[0] = BIT_3 | BIT_1; 4212 nv->firmware_options[1] = BIT_5; 4213 nv->frame_payload_size = 1024; 4214 } 4215 4216 nv->max_iocb_allocation = cpu_to_le16(256); 4217 nv->execution_throttle = cpu_to_le16(16); 4218 nv->retry_count = 8; 4219 nv->retry_delay = 1; 4220 4221 nv->port_name[0] = 33; 4222 nv->port_name[3] = 224; 4223 nv->port_name[4] = 139; 4224 4225 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4226 4227 nv->login_timeout = 4; 4228 4229 /* 4230 * Set default host adapter parameters 4231 */ 4232 nv->host_p[1] = BIT_2; 4233 nv->reset_delay = 5; 4234 nv->port_down_retry_count = 8; 4235 nv->max_luns_per_target = cpu_to_le16(8); 4236 nv->link_down_timeout = 60; 4237 4238 rval = 1; 4239 } 4240 4241 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4242 /* 4243 * The SN2 does not provide BIOS emulation which means you can't change 4244 * potentially bogus BIOS settings. Force the use of default settings 4245 * for link rate and frame size. Hope that the rest of the settings 4246 * are valid. 4247 */ 4248 if (ia64_platform_is("sn2")) { 4249 nv->frame_payload_size = 2048; 4250 if (IS_QLA23XX(ha)) 4251 nv->special_options[1] = BIT_7; 4252 } 4253 #endif 4254 4255 /* Reset Initialization control block */ 4256 memset(icb, 0, ha->init_cb_size); 4257 4258 /* 4259 * Setup driver NVRAM options. 4260 */ 4261 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4262 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4263 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4264 nv->firmware_options[1] &= ~BIT_4; 4265 4266 if (IS_QLA23XX(ha)) { 4267 nv->firmware_options[0] |= BIT_2; 4268 nv->firmware_options[0] &= ~BIT_3; 4269 nv->special_options[0] &= ~BIT_6; 4270 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4271 4272 if (IS_QLA2300(ha)) { 4273 if (ha->fb_rev == FPM_2310) { 4274 strcpy(ha->model_number, "QLA2310"); 4275 } else { 4276 strcpy(ha->model_number, "QLA2300"); 4277 } 4278 } else { 4279 qla2x00_set_model_info(vha, nv->model_number, 4280 sizeof(nv->model_number), "QLA23xx"); 4281 } 4282 } else if (IS_QLA2200(ha)) { 4283 nv->firmware_options[0] |= BIT_2; 4284 /* 4285 * 'Point-to-point preferred, else loop' is not a safe 4286 * connection mode setting. 4287 */ 4288 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4289 (BIT_5 | BIT_4)) { 4290 /* Force 'loop preferred, else point-to-point'. */ 4291 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4292 nv->add_firmware_options[0] |= BIT_5; 4293 } 4294 strcpy(ha->model_number, "QLA22xx"); 4295 } else /*if (IS_QLA2100(ha))*/ { 4296 strcpy(ha->model_number, "QLA2100"); 4297 } 4298 4299 /* 4300 * Copy over NVRAM RISC parameter block to initialization control block. 4301 */ 4302 dptr1 = (uint8_t *)icb; 4303 dptr2 = (uint8_t *)&nv->parameter_block_version; 4304 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4305 while (cnt--) 4306 *dptr1++ = *dptr2++; 4307 4308 /* Copy 2nd half. */ 4309 dptr1 = (uint8_t *)icb->add_firmware_options; 4310 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4311 while (cnt--) 4312 *dptr1++ = *dptr2++; 4313 4314 /* Use alternate WWN? */ 4315 if (nv->host_p[1] & BIT_7) { 4316 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4317 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4318 } 4319 4320 /* Prepare nodename */ 4321 if ((icb->firmware_options[1] & BIT_6) == 0) { 4322 /* 4323 * Firmware will apply the following mask if the nodename was 4324 * not provided. 4325 */ 4326 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4327 icb->node_name[0] &= 0xF0; 4328 } 4329 4330 /* 4331 * Set host adapter parameters. 4332 */ 4333 4334 /* 4335 * BIT_7 in the host-parameters section allows for modification to 4336 * internal driver logging. 4337 */ 4338 if (nv->host_p[0] & BIT_7) 4339 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4340 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4341 /* Always load RISC code on non ISP2[12]00 chips. */ 4342 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4343 ha->flags.disable_risc_code_load = 0; 4344 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4345 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4346 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4347 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4348 ha->flags.disable_serdes = 0; 4349 4350 ha->operating_mode = 4351 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4352 4353 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4354 sizeof(ha->fw_seriallink_options)); 4355 4356 /* save HBA serial number */ 4357 ha->serial0 = icb->port_name[5]; 4358 ha->serial1 = icb->port_name[6]; 4359 ha->serial2 = icb->port_name[7]; 4360 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4361 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4362 4363 icb->execution_throttle = cpu_to_le16(0xFFFF); 4364 4365 ha->retry_count = nv->retry_count; 4366 4367 /* Set minimum login_timeout to 4 seconds. */ 4368 if (nv->login_timeout != ql2xlogintimeout) 4369 nv->login_timeout = ql2xlogintimeout; 4370 if (nv->login_timeout < 4) 4371 nv->login_timeout = 4; 4372 ha->login_timeout = nv->login_timeout; 4373 4374 /* Set minimum RATOV to 100 tenths of a second. */ 4375 ha->r_a_tov = 100; 4376 4377 ha->loop_reset_delay = nv->reset_delay; 4378 4379 /* Link Down Timeout = 0: 4380 * 4381 * When Port Down timer expires we will start returning 4382 * I/O's to OS with "DID_NO_CONNECT". 4383 * 4384 * Link Down Timeout != 0: 4385 * 4386 * The driver waits for the link to come up after link down 4387 * before returning I/Os to OS with "DID_NO_CONNECT". 4388 */ 4389 if (nv->link_down_timeout == 0) { 4390 ha->loop_down_abort_time = 4391 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4392 } else { 4393 ha->link_down_timeout = nv->link_down_timeout; 4394 ha->loop_down_abort_time = 4395 (LOOP_DOWN_TIME - ha->link_down_timeout); 4396 } 4397 4398 /* 4399 * Need enough time to try and get the port back. 4400 */ 4401 ha->port_down_retry_count = nv->port_down_retry_count; 4402 if (qlport_down_retry) 4403 ha->port_down_retry_count = qlport_down_retry; 4404 /* Set login_retry_count */ 4405 ha->login_retry_count = nv->retry_count; 4406 if (ha->port_down_retry_count == nv->port_down_retry_count && 4407 ha->port_down_retry_count > 3) 4408 ha->login_retry_count = ha->port_down_retry_count; 4409 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4410 ha->login_retry_count = ha->port_down_retry_count; 4411 if (ql2xloginretrycount) 4412 ha->login_retry_count = ql2xloginretrycount; 4413 4414 icb->lun_enables = cpu_to_le16(0); 4415 icb->command_resource_count = 0; 4416 icb->immediate_notify_resource_count = 0; 4417 icb->timeout = cpu_to_le16(0); 4418 4419 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4420 /* Enable RIO */ 4421 icb->firmware_options[0] &= ~BIT_3; 4422 icb->add_firmware_options[0] &= 4423 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4424 icb->add_firmware_options[0] |= BIT_2; 4425 icb->response_accumulation_timer = 3; 4426 icb->interrupt_delay_timer = 5; 4427 4428 vha->flags.process_response_queue = 1; 4429 } else { 4430 /* Enable ZIO. */ 4431 if (!vha->flags.init_done) { 4432 ha->zio_mode = icb->add_firmware_options[0] & 4433 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4434 ha->zio_timer = icb->interrupt_delay_timer ? 4435 icb->interrupt_delay_timer: 2; 4436 } 4437 icb->add_firmware_options[0] &= 4438 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4439 vha->flags.process_response_queue = 0; 4440 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4441 ha->zio_mode = QLA_ZIO_MODE_6; 4442 4443 ql_log(ql_log_info, vha, 0x0068, 4444 "ZIO mode %d enabled; timer delay (%d us).\n", 4445 ha->zio_mode, ha->zio_timer * 100); 4446 4447 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4448 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4449 vha->flags.process_response_queue = 1; 4450 } 4451 } 4452 4453 if (rval) { 4454 ql_log(ql_log_warn, vha, 0x0069, 4455 "NVRAM configuration failed.\n"); 4456 } 4457 return (rval); 4458 } 4459 4460 static void 4461 qla2x00_rport_del(void *data) 4462 { 4463 fc_port_t *fcport = data; 4464 struct fc_rport *rport; 4465 unsigned long flags; 4466 4467 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4468 rport = fcport->drport ? fcport->drport: fcport->rport; 4469 fcport->drport = NULL; 4470 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4471 if (rport) { 4472 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4473 "%s %8phN. rport %p roles %x\n", 4474 __func__, fcport->port_name, rport, 4475 rport->roles); 4476 4477 fc_remote_port_delete(rport); 4478 } 4479 } 4480 4481 /** 4482 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4483 * @ha: HA context 4484 * @flags: allocation flags 4485 * 4486 * Returns a pointer to the allocated fcport, or NULL, if none available. 4487 */ 4488 fc_port_t * 4489 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4490 { 4491 fc_port_t *fcport; 4492 4493 fcport = kzalloc(sizeof(fc_port_t), flags); 4494 if (!fcport) 4495 return NULL; 4496 4497 /* Setup fcport template structure. */ 4498 fcport->vha = vha; 4499 fcport->port_type = FCT_UNKNOWN; 4500 fcport->loop_id = FC_NO_LOOP_ID; 4501 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4502 fcport->supported_classes = FC_COS_UNSPECIFIED; 4503 4504 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4505 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4506 flags); 4507 fcport->disc_state = DSC_DELETED; 4508 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4509 fcport->deleted = QLA_SESS_DELETED; 4510 fcport->login_retry = vha->hw->login_retry_count; 4511 fcport->login_retry = 5; 4512 fcport->logout_on_delete = 1; 4513 4514 if (!fcport->ct_desc.ct_sns) { 4515 ql_log(ql_log_warn, vha, 0xd049, 4516 "Failed to allocate ct_sns request.\n"); 4517 kfree(fcport); 4518 fcport = NULL; 4519 } 4520 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4521 INIT_LIST_HEAD(&fcport->gnl_entry); 4522 INIT_LIST_HEAD(&fcport->list); 4523 4524 return fcport; 4525 } 4526 4527 void 4528 qla2x00_free_fcport(fc_port_t *fcport) 4529 { 4530 if (fcport->ct_desc.ct_sns) { 4531 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4532 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4533 fcport->ct_desc.ct_sns_dma); 4534 4535 fcport->ct_desc.ct_sns = NULL; 4536 } 4537 kfree(fcport); 4538 } 4539 4540 /* 4541 * qla2x00_configure_loop 4542 * Updates Fibre Channel Device Database with what is actually on loop. 4543 * 4544 * Input: 4545 * ha = adapter block pointer. 4546 * 4547 * Returns: 4548 * 0 = success. 4549 * 1 = error. 4550 * 2 = database was full and device was not configured. 4551 */ 4552 static int 4553 qla2x00_configure_loop(scsi_qla_host_t *vha) 4554 { 4555 int rval; 4556 unsigned long flags, save_flags; 4557 struct qla_hw_data *ha = vha->hw; 4558 rval = QLA_SUCCESS; 4559 4560 /* Get Initiator ID */ 4561 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4562 rval = qla2x00_configure_hba(vha); 4563 if (rval != QLA_SUCCESS) { 4564 ql_dbg(ql_dbg_disc, vha, 0x2013, 4565 "Unable to configure HBA.\n"); 4566 return (rval); 4567 } 4568 } 4569 4570 save_flags = flags = vha->dpc_flags; 4571 ql_dbg(ql_dbg_disc, vha, 0x2014, 4572 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4573 4574 /* 4575 * If we have both an RSCN and PORT UPDATE pending then handle them 4576 * both at the same time. 4577 */ 4578 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4579 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4580 4581 qla2x00_get_data_rate(vha); 4582 4583 /* Determine what we need to do */ 4584 if (ha->current_topology == ISP_CFG_FL && 4585 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4586 4587 set_bit(RSCN_UPDATE, &flags); 4588 4589 } else if (ha->current_topology == ISP_CFG_F && 4590 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4591 4592 set_bit(RSCN_UPDATE, &flags); 4593 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4594 4595 } else if (ha->current_topology == ISP_CFG_N) { 4596 clear_bit(RSCN_UPDATE, &flags); 4597 if (ha->flags.rida_fmt2) { 4598 /* With Rida Format 2, the login is already triggered. 4599 * We know who is on the other side of the wire. 4600 * No need to login to do login to find out or drop into 4601 * qla2x00_configure_local_loop(). 4602 */ 4603 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4604 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4605 } else { 4606 if (qla_tgt_mode_enabled(vha)) { 4607 /* allow the other side to start the login */ 4608 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4609 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4610 } 4611 } 4612 } else if (ha->current_topology == ISP_CFG_NL) { 4613 clear_bit(RSCN_UPDATE, &flags); 4614 set_bit(LOCAL_LOOP_UPDATE, &flags); 4615 } else if (!vha->flags.online || 4616 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4617 set_bit(RSCN_UPDATE, &flags); 4618 set_bit(LOCAL_LOOP_UPDATE, &flags); 4619 } 4620 4621 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4622 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4623 ql_dbg(ql_dbg_disc, vha, 0x2015, 4624 "Loop resync needed, failing.\n"); 4625 rval = QLA_FUNCTION_FAILED; 4626 } else 4627 rval = qla2x00_configure_local_loop(vha); 4628 } 4629 4630 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4631 if (LOOP_TRANSITION(vha)) { 4632 ql_dbg(ql_dbg_disc, vha, 0x2099, 4633 "Needs RSCN update and loop transition.\n"); 4634 rval = QLA_FUNCTION_FAILED; 4635 } 4636 else 4637 rval = qla2x00_configure_fabric(vha); 4638 } 4639 4640 if (rval == QLA_SUCCESS) { 4641 if (atomic_read(&vha->loop_down_timer) || 4642 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4643 rval = QLA_FUNCTION_FAILED; 4644 } else { 4645 atomic_set(&vha->loop_state, LOOP_READY); 4646 ql_dbg(ql_dbg_disc, vha, 0x2069, 4647 "LOOP READY.\n"); 4648 ha->flags.fw_init_done = 1; 4649 4650 /* 4651 * Process any ATIO queue entries that came in 4652 * while we weren't online. 4653 */ 4654 if (qla_tgt_mode_enabled(vha) || 4655 qla_dual_mode_enabled(vha)) { 4656 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) { 4657 spin_lock_irqsave(&ha->tgt.atio_lock, 4658 flags); 4659 qlt_24xx_process_atio_queue(vha, 0); 4660 spin_unlock_irqrestore( 4661 &ha->tgt.atio_lock, flags); 4662 } else { 4663 spin_lock_irqsave(&ha->hardware_lock, 4664 flags); 4665 qlt_24xx_process_atio_queue(vha, 1); 4666 spin_unlock_irqrestore( 4667 &ha->hardware_lock, flags); 4668 } 4669 } 4670 } 4671 } 4672 4673 if (rval) { 4674 ql_dbg(ql_dbg_disc, vha, 0x206a, 4675 "%s *** FAILED ***.\n", __func__); 4676 } else { 4677 ql_dbg(ql_dbg_disc, vha, 0x206b, 4678 "%s: exiting normally.\n", __func__); 4679 } 4680 4681 /* Restore state if a resync event occurred during processing */ 4682 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4683 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4684 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4685 if (test_bit(RSCN_UPDATE, &save_flags)) { 4686 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4687 } 4688 } 4689 4690 return (rval); 4691 } 4692 4693 /* 4694 * N2N Login 4695 * Updates Fibre Channel Device Database with local loop devices. 4696 * 4697 * Input: 4698 * ha = adapter block pointer. 4699 * 4700 * Returns: 4701 */ 4702 static int qla24xx_n2n_handle_login(struct scsi_qla_host *vha, 4703 fc_port_t *fcport) 4704 { 4705 struct qla_hw_data *ha = vha->hw; 4706 int res = QLA_SUCCESS, rval; 4707 int greater_wwpn = 0; 4708 int logged_in = 0; 4709 4710 if (ha->current_topology != ISP_CFG_N) 4711 return res; 4712 4713 if (wwn_to_u64(vha->port_name) > 4714 wwn_to_u64(vha->n2n_port_name)) { 4715 ql_dbg(ql_dbg_disc, vha, 0x2002, 4716 "HBA WWPN is greater %llx > target %llx\n", 4717 wwn_to_u64(vha->port_name), 4718 wwn_to_u64(vha->n2n_port_name)); 4719 greater_wwpn = 1; 4720 fcport->d_id.b24 = vha->n2n_id; 4721 } 4722 4723 fcport->loop_id = vha->loop_id; 4724 fcport->fc4f_nvme = 0; 4725 fcport->query = 1; 4726 4727 ql_dbg(ql_dbg_disc, vha, 0x4001, 4728 "Initiate N2N login handler: HBA port_id=%06x loopid=%d\n", 4729 fcport->d_id.b24, vha->loop_id); 4730 4731 /* Fill in member data. */ 4732 if (!greater_wwpn) { 4733 rval = qla2x00_get_port_database(vha, fcport, 0); 4734 ql_dbg(ql_dbg_disc, vha, 0x1051, 4735 "Remote login-state (%x/%x) port_id=%06x loop_id=%x, rval=%d\n", 4736 fcport->current_login_state, fcport->last_login_state, 4737 fcport->d_id.b24, fcport->loop_id, rval); 4738 4739 if (((fcport->current_login_state & 0xf) == 0x4) || 4740 ((fcport->current_login_state & 0xf) == 0x6)) 4741 logged_in = 1; 4742 } 4743 4744 if (logged_in || greater_wwpn) { 4745 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 4746 qla_nvme_register_hba(vha); 4747 4748 /* Set connected N_Port d_id */ 4749 if (vha->flags.nvme_enabled) 4750 fcport->fc4f_nvme = 1; 4751 4752 fcport->scan_state = QLA_FCPORT_FOUND; 4753 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4754 fcport->disc_state = DSC_GNL; 4755 fcport->n2n_flag = 1; 4756 fcport->flags = 3; 4757 vha->hw->flags.gpsc_supported = 0; 4758 4759 if (greater_wwpn) { 4760 ql_dbg(ql_dbg_disc, vha, 0x20e5, 4761 "%s %d PLOGI ELS %8phC\n", 4762 __func__, __LINE__, fcport->port_name); 4763 4764 res = qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI, 4765 fcport, fcport->d_id); 4766 } 4767 4768 if (res != QLA_SUCCESS) { 4769 ql_log(ql_log_info, vha, 0xd04d, 4770 "PLOGI Failed: portid=%06x - retrying\n", 4771 fcport->d_id.b24); 4772 res = QLA_SUCCESS; 4773 } else { 4774 /* State 0x6 means FCP PRLI complete */ 4775 if ((fcport->current_login_state & 0xf) == 0x6) { 4776 ql_dbg(ql_dbg_disc, vha, 0x2118, 4777 "%s %d %8phC post GPDB work\n", 4778 __func__, __LINE__, fcport->port_name); 4779 fcport->chip_reset = 4780 vha->hw->base_qpair->chip_reset; 4781 qla24xx_post_gpdb_work(vha, fcport, 0); 4782 } else { 4783 ql_dbg(ql_dbg_disc, vha, 0x2118, 4784 "%s %d %8phC post NVMe PRLI\n", 4785 __func__, __LINE__, fcport->port_name); 4786 qla24xx_post_prli_work(vha, fcport); 4787 } 4788 } 4789 } else { 4790 /* Wait for next database change */ 4791 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags); 4792 } 4793 4794 return res; 4795 } 4796 4797 /* 4798 * qla2x00_configure_local_loop 4799 * Updates Fibre Channel Device Database with local loop devices. 4800 * 4801 * Input: 4802 * ha = adapter block pointer. 4803 * 4804 * Returns: 4805 * 0 = success. 4806 */ 4807 static int 4808 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4809 { 4810 int rval, rval2; 4811 int found_devs; 4812 int found; 4813 fc_port_t *fcport, *new_fcport; 4814 4815 uint16_t index; 4816 uint16_t entries; 4817 char *id_iter; 4818 uint16_t loop_id; 4819 uint8_t domain, area, al_pa; 4820 struct qla_hw_data *ha = vha->hw; 4821 unsigned long flags; 4822 4823 found_devs = 0; 4824 new_fcport = NULL; 4825 entries = MAX_FIBRE_DEVICES_LOOP; 4826 4827 /* Get list of logged in devices. */ 4828 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4829 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4830 &entries); 4831 if (rval != QLA_SUCCESS) 4832 goto cleanup_allocation; 4833 4834 ql_dbg(ql_dbg_disc, vha, 0x2011, 4835 "Entries in ID list (%d).\n", entries); 4836 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 4837 (uint8_t *)ha->gid_list, 4838 entries * sizeof(struct gid_list_info)); 4839 4840 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4841 fcport->scan_state = QLA_FCPORT_SCAN; 4842 } 4843 4844 /* Allocate temporary fcport for any new fcports discovered. */ 4845 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4846 if (new_fcport == NULL) { 4847 ql_log(ql_log_warn, vha, 0x2012, 4848 "Memory allocation failed for fcport.\n"); 4849 rval = QLA_MEMORY_ALLOC_FAILED; 4850 goto cleanup_allocation; 4851 } 4852 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4853 4854 /* Inititae N2N login. */ 4855 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4856 rval = qla24xx_n2n_handle_login(vha, new_fcport); 4857 if (rval != QLA_SUCCESS) 4858 goto cleanup_allocation; 4859 return QLA_SUCCESS; 4860 } 4861 4862 /* Add devices to port list. */ 4863 id_iter = (char *)ha->gid_list; 4864 for (index = 0; index < entries; index++) { 4865 domain = ((struct gid_list_info *)id_iter)->domain; 4866 area = ((struct gid_list_info *)id_iter)->area; 4867 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 4868 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4869 loop_id = (uint16_t) 4870 ((struct gid_list_info *)id_iter)->loop_id_2100; 4871 else 4872 loop_id = le16_to_cpu( 4873 ((struct gid_list_info *)id_iter)->loop_id); 4874 id_iter += ha->gid_list_info_size; 4875 4876 /* Bypass reserved domain fields. */ 4877 if ((domain & 0xf0) == 0xf0) 4878 continue; 4879 4880 /* Bypass if not same domain and area of adapter. */ 4881 if (area && domain && 4882 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 4883 continue; 4884 4885 /* Bypass invalid local loop ID. */ 4886 if (loop_id > LAST_LOCAL_LOOP_ID) 4887 continue; 4888 4889 memset(new_fcport->port_name, 0, WWN_SIZE); 4890 4891 /* Fill in member data. */ 4892 new_fcport->d_id.b.domain = domain; 4893 new_fcport->d_id.b.area = area; 4894 new_fcport->d_id.b.al_pa = al_pa; 4895 new_fcport->loop_id = loop_id; 4896 new_fcport->scan_state = QLA_FCPORT_FOUND; 4897 4898 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 4899 if (rval2 != QLA_SUCCESS) { 4900 ql_dbg(ql_dbg_disc, vha, 0x2097, 4901 "Failed to retrieve fcport information " 4902 "-- get_port_database=%x, loop_id=0x%04x.\n", 4903 rval2, new_fcport->loop_id); 4904 /* Skip retry if N2N */ 4905 if (ha->current_topology != ISP_CFG_N) { 4906 ql_dbg(ql_dbg_disc, vha, 0x2105, 4907 "Scheduling resync.\n"); 4908 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4909 continue; 4910 } 4911 } 4912 4913 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4914 /* Check for matching device in port list. */ 4915 found = 0; 4916 fcport = NULL; 4917 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4918 if (memcmp(new_fcport->port_name, fcport->port_name, 4919 WWN_SIZE)) 4920 continue; 4921 4922 fcport->flags &= ~FCF_FABRIC_DEVICE; 4923 fcport->loop_id = new_fcport->loop_id; 4924 fcport->port_type = new_fcport->port_type; 4925 fcport->d_id.b24 = new_fcport->d_id.b24; 4926 memcpy(fcport->node_name, new_fcport->node_name, 4927 WWN_SIZE); 4928 fcport->scan_state = QLA_FCPORT_FOUND; 4929 found++; 4930 break; 4931 } 4932 4933 if (!found) { 4934 /* New device, add to fcports list. */ 4935 list_add_tail(&new_fcport->list, &vha->vp_fcports); 4936 4937 /* Allocate a new replacement fcport. */ 4938 fcport = new_fcport; 4939 4940 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4941 4942 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4943 4944 if (new_fcport == NULL) { 4945 ql_log(ql_log_warn, vha, 0xd031, 4946 "Failed to allocate memory for fcport.\n"); 4947 rval = QLA_MEMORY_ALLOC_FAILED; 4948 goto cleanup_allocation; 4949 } 4950 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4951 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4952 } 4953 4954 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4955 4956 /* Base iIDMA settings on HBA port speed. */ 4957 fcport->fp_speed = ha->link_data_rate; 4958 4959 found_devs++; 4960 } 4961 4962 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4963 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 4964 break; 4965 4966 if (fcport->scan_state == QLA_FCPORT_SCAN) { 4967 if ((qla_dual_mode_enabled(vha) || 4968 qla_ini_mode_enabled(vha)) && 4969 atomic_read(&fcport->state) == FCS_ONLINE) { 4970 qla2x00_mark_device_lost(vha, fcport, 4971 ql2xplogiabsentdevice, 0); 4972 if (fcport->loop_id != FC_NO_LOOP_ID && 4973 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 4974 fcport->port_type != FCT_INITIATOR && 4975 fcport->port_type != FCT_BROADCAST) { 4976 ql_dbg(ql_dbg_disc, vha, 0x20f0, 4977 "%s %d %8phC post del sess\n", 4978 __func__, __LINE__, 4979 fcport->port_name); 4980 4981 qlt_schedule_sess_for_deletion(fcport); 4982 continue; 4983 } 4984 } 4985 } 4986 4987 if (fcport->scan_state == QLA_FCPORT_FOUND) 4988 qla24xx_fcport_handle_login(vha, fcport); 4989 } 4990 4991 cleanup_allocation: 4992 kfree(new_fcport); 4993 4994 if (rval != QLA_SUCCESS) { 4995 ql_dbg(ql_dbg_disc, vha, 0x2098, 4996 "Configure local loop error exit: rval=%x.\n", rval); 4997 } 4998 4999 return (rval); 5000 } 5001 5002 static void 5003 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5004 { 5005 int rval; 5006 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5007 struct qla_hw_data *ha = vha->hw; 5008 5009 if (!IS_IIDMA_CAPABLE(ha)) 5010 return; 5011 5012 if (atomic_read(&fcport->state) != FCS_ONLINE) 5013 return; 5014 5015 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5016 fcport->fp_speed > ha->link_data_rate) 5017 return; 5018 5019 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5020 mb); 5021 if (rval != QLA_SUCCESS) { 5022 ql_dbg(ql_dbg_disc, vha, 0x2004, 5023 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5024 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5025 } else { 5026 ql_dbg(ql_dbg_disc, vha, 0x2005, 5027 "iIDMA adjusted to %s GB/s on %8phN.\n", 5028 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5029 fcport->port_name); 5030 } 5031 } 5032 5033 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5034 static void 5035 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5036 { 5037 struct fc_rport_identifiers rport_ids; 5038 struct fc_rport *rport; 5039 unsigned long flags; 5040 5041 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5042 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5043 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5044 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5045 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5046 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5047 if (!rport) { 5048 ql_log(ql_log_warn, vha, 0x2006, 5049 "Unable to allocate fc remote port.\n"); 5050 return; 5051 } 5052 5053 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5054 *((fc_port_t **)rport->dd_data) = fcport; 5055 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5056 5057 rport->supported_classes = fcport->supported_classes; 5058 5059 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5060 if (fcport->port_type == FCT_INITIATOR) 5061 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5062 if (fcport->port_type == FCT_TARGET) 5063 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5064 5065 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5066 "%s %8phN. rport %p is %s mode\n", 5067 __func__, fcport->port_name, rport, 5068 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5069 5070 fc_remote_port_rolechg(rport, rport_ids.roles); 5071 } 5072 5073 /* 5074 * qla2x00_update_fcport 5075 * Updates device on list. 5076 * 5077 * Input: 5078 * ha = adapter block pointer. 5079 * fcport = port structure pointer. 5080 * 5081 * Return: 5082 * 0 - Success 5083 * BIT_0 - error 5084 * 5085 * Context: 5086 * Kernel context. 5087 */ 5088 void 5089 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5090 { 5091 fcport->vha = vha; 5092 5093 if (IS_SW_RESV_ADDR(fcport->d_id)) 5094 return; 5095 5096 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5097 __func__, fcport->port_name); 5098 5099 if (IS_QLAFX00(vha->hw)) { 5100 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5101 goto reg_port; 5102 } 5103 fcport->login_retry = 0; 5104 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5105 fcport->disc_state = DSC_LOGIN_COMPLETE; 5106 fcport->deleted = 0; 5107 fcport->logout_on_delete = 1; 5108 5109 if (fcport->fc4f_nvme) { 5110 qla_nvme_register_remote(vha, fcport); 5111 return; 5112 } 5113 5114 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5115 qla2x00_iidma_fcport(vha, fcport); 5116 qla24xx_update_fcport_fcp_prio(vha, fcport); 5117 5118 reg_port: 5119 switch (vha->host->active_mode) { 5120 case MODE_INITIATOR: 5121 qla2x00_reg_remote_port(vha, fcport); 5122 break; 5123 case MODE_TARGET: 5124 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5125 !vha->vha_tgt.qla_tgt->tgt_stopped) 5126 qlt_fc_port_added(vha, fcport); 5127 break; 5128 case MODE_DUAL: 5129 qla2x00_reg_remote_port(vha, fcport); 5130 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5131 !vha->vha_tgt.qla_tgt->tgt_stopped) 5132 qlt_fc_port_added(vha, fcport); 5133 break; 5134 default: 5135 break; 5136 } 5137 } 5138 5139 /* 5140 * qla2x00_configure_fabric 5141 * Setup SNS devices with loop ID's. 5142 * 5143 * Input: 5144 * ha = adapter block pointer. 5145 * 5146 * Returns: 5147 * 0 = success. 5148 * BIT_0 = error 5149 */ 5150 static int 5151 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5152 { 5153 int rval; 5154 fc_port_t *fcport; 5155 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5156 uint16_t loop_id; 5157 LIST_HEAD(new_fcports); 5158 struct qla_hw_data *ha = vha->hw; 5159 int discovery_gen; 5160 5161 /* If FL port exists, then SNS is present */ 5162 if (IS_FWI2_CAPABLE(ha)) 5163 loop_id = NPH_F_PORT; 5164 else 5165 loop_id = SNS_FL_PORT; 5166 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5167 if (rval != QLA_SUCCESS) { 5168 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5169 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5170 5171 vha->device_flags &= ~SWITCH_FOUND; 5172 return (QLA_SUCCESS); 5173 } 5174 vha->device_flags |= SWITCH_FOUND; 5175 5176 5177 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5178 rval = qla2x00_send_change_request(vha, 0x3, 0); 5179 if (rval != QLA_SUCCESS) 5180 ql_log(ql_log_warn, vha, 0x121, 5181 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5182 rval); 5183 } 5184 5185 5186 do { 5187 qla2x00_mgmt_svr_login(vha); 5188 5189 /* FDMI support. */ 5190 if (ql2xfdmienable && 5191 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5192 qla2x00_fdmi_register(vha); 5193 5194 /* Ensure we are logged into the SNS. */ 5195 loop_id = NPH_SNS_LID(ha); 5196 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5197 0xfc, mb, BIT_1|BIT_0); 5198 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5199 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5200 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5201 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5202 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5203 return rval; 5204 } 5205 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5206 if (qla2x00_rft_id(vha)) { 5207 /* EMPTY */ 5208 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5209 "Register FC-4 TYPE failed.\n"); 5210 if (test_bit(LOOP_RESYNC_NEEDED, 5211 &vha->dpc_flags)) 5212 break; 5213 } 5214 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5215 /* EMPTY */ 5216 ql_dbg(ql_dbg_disc, vha, 0x209a, 5217 "Register FC-4 Features failed.\n"); 5218 if (test_bit(LOOP_RESYNC_NEEDED, 5219 &vha->dpc_flags)) 5220 break; 5221 } 5222 if (vha->flags.nvme_enabled) { 5223 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5224 ql_dbg(ql_dbg_disc, vha, 0x2049, 5225 "Register NVME FC Type Features failed.\n"); 5226 } 5227 } 5228 if (qla2x00_rnn_id(vha)) { 5229 /* EMPTY */ 5230 ql_dbg(ql_dbg_disc, vha, 0x2104, 5231 "Register Node Name failed.\n"); 5232 if (test_bit(LOOP_RESYNC_NEEDED, 5233 &vha->dpc_flags)) 5234 break; 5235 } else if (qla2x00_rsnn_nn(vha)) { 5236 /* EMPTY */ 5237 ql_dbg(ql_dbg_disc, vha, 0x209b, 5238 "Register Symbolic Node Name failed.\n"); 5239 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5240 break; 5241 } 5242 } 5243 5244 5245 /* Mark the time right before querying FW for connected ports. 5246 * This process is long, asynchronous and by the time it's done, 5247 * collected information might not be accurate anymore. E.g. 5248 * disconnected port might have re-connected and a brand new 5249 * session has been created. In this case session's generation 5250 * will be newer than discovery_gen. */ 5251 qlt_do_generation_tick(vha, &discovery_gen); 5252 5253 if (USE_ASYNC_SCAN(ha)) { 5254 rval = QLA_SUCCESS; 5255 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI); 5256 if (rval) 5257 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5258 } else { 5259 list_for_each_entry(fcport, &vha->vp_fcports, list) 5260 fcport->scan_state = QLA_FCPORT_SCAN; 5261 5262 rval = qla2x00_find_all_fabric_devs(vha); 5263 } 5264 if (rval != QLA_SUCCESS) 5265 break; 5266 } while (0); 5267 5268 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5269 qla_nvme_register_hba(vha); 5270 5271 if (rval) 5272 ql_dbg(ql_dbg_disc, vha, 0x2068, 5273 "Configure fabric error exit rval=%d.\n", rval); 5274 5275 return (rval); 5276 } 5277 5278 /* 5279 * qla2x00_find_all_fabric_devs 5280 * 5281 * Input: 5282 * ha = adapter block pointer. 5283 * dev = database device entry pointer. 5284 * 5285 * Returns: 5286 * 0 = success. 5287 * 5288 * Context: 5289 * Kernel context. 5290 */ 5291 static int 5292 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5293 { 5294 int rval; 5295 uint16_t loop_id; 5296 fc_port_t *fcport, *new_fcport; 5297 int found; 5298 5299 sw_info_t *swl; 5300 int swl_idx; 5301 int first_dev, last_dev; 5302 port_id_t wrap = {}, nxt_d_id; 5303 struct qla_hw_data *ha = vha->hw; 5304 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5305 unsigned long flags; 5306 5307 rval = QLA_SUCCESS; 5308 5309 /* Try GID_PT to get device list, else GAN. */ 5310 if (!ha->swl) 5311 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5312 GFP_KERNEL); 5313 swl = ha->swl; 5314 if (!swl) { 5315 /*EMPTY*/ 5316 ql_dbg(ql_dbg_disc, vha, 0x209c, 5317 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5318 } else { 5319 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5320 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5321 swl = NULL; 5322 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5323 return rval; 5324 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5325 swl = NULL; 5326 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5327 return rval; 5328 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5329 swl = NULL; 5330 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5331 return rval; 5332 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5333 swl = NULL; 5334 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5335 return rval; 5336 } 5337 5338 /* If other queries succeeded probe for FC-4 type */ 5339 if (swl) { 5340 qla2x00_gff_id(vha, swl); 5341 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5342 return rval; 5343 } 5344 } 5345 swl_idx = 0; 5346 5347 /* Allocate temporary fcport for any new fcports discovered. */ 5348 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5349 if (new_fcport == NULL) { 5350 ql_log(ql_log_warn, vha, 0x209d, 5351 "Failed to allocate memory for fcport.\n"); 5352 return (QLA_MEMORY_ALLOC_FAILED); 5353 } 5354 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5355 /* Set start port ID scan at adapter ID. */ 5356 first_dev = 1; 5357 last_dev = 0; 5358 5359 /* Starting free loop ID. */ 5360 loop_id = ha->min_external_loopid; 5361 for (; loop_id <= ha->max_loop_id; loop_id++) { 5362 if (qla2x00_is_reserved_id(vha, loop_id)) 5363 continue; 5364 5365 if (ha->current_topology == ISP_CFG_FL && 5366 (atomic_read(&vha->loop_down_timer) || 5367 LOOP_TRANSITION(vha))) { 5368 atomic_set(&vha->loop_down_timer, 0); 5369 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5370 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5371 break; 5372 } 5373 5374 if (swl != NULL) { 5375 if (last_dev) { 5376 wrap.b24 = new_fcport->d_id.b24; 5377 } else { 5378 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5379 memcpy(new_fcport->node_name, 5380 swl[swl_idx].node_name, WWN_SIZE); 5381 memcpy(new_fcport->port_name, 5382 swl[swl_idx].port_name, WWN_SIZE); 5383 memcpy(new_fcport->fabric_port_name, 5384 swl[swl_idx].fabric_port_name, WWN_SIZE); 5385 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5386 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5387 5388 new_fcport->nvme_flag = 0; 5389 new_fcport->fc4f_nvme = 0; 5390 if (vha->flags.nvme_enabled && 5391 swl[swl_idx].fc4f_nvme) { 5392 new_fcport->fc4f_nvme = 5393 swl[swl_idx].fc4f_nvme; 5394 ql_log(ql_log_info, vha, 0x2131, 5395 "FOUND: NVME port %8phC as FC Type 28h\n", 5396 new_fcport->port_name); 5397 } 5398 5399 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5400 last_dev = 1; 5401 } 5402 swl_idx++; 5403 } 5404 } else { 5405 /* Send GA_NXT to the switch */ 5406 rval = qla2x00_ga_nxt(vha, new_fcport); 5407 if (rval != QLA_SUCCESS) { 5408 ql_log(ql_log_warn, vha, 0x209e, 5409 "SNS scan failed -- assuming " 5410 "zero-entry result.\n"); 5411 rval = QLA_SUCCESS; 5412 break; 5413 } 5414 } 5415 5416 /* If wrap on switch device list, exit. */ 5417 if (first_dev) { 5418 wrap.b24 = new_fcport->d_id.b24; 5419 first_dev = 0; 5420 } else if (new_fcport->d_id.b24 == wrap.b24) { 5421 ql_dbg(ql_dbg_disc, vha, 0x209f, 5422 "Device wrap (%02x%02x%02x).\n", 5423 new_fcport->d_id.b.domain, 5424 new_fcport->d_id.b.area, 5425 new_fcport->d_id.b.al_pa); 5426 break; 5427 } 5428 5429 /* Bypass if same physical adapter. */ 5430 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5431 continue; 5432 5433 /* Bypass virtual ports of the same host. */ 5434 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5435 continue; 5436 5437 /* Bypass if same domain and area of adapter. */ 5438 if (((new_fcport->d_id.b24 & 0xffff00) == 5439 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5440 ISP_CFG_FL) 5441 continue; 5442 5443 /* Bypass reserved domain fields. */ 5444 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5445 continue; 5446 5447 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5448 if (ql2xgffidenable && 5449 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5450 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5451 continue; 5452 5453 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5454 5455 /* Locate matching device in database. */ 5456 found = 0; 5457 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5458 if (memcmp(new_fcport->port_name, fcport->port_name, 5459 WWN_SIZE)) 5460 continue; 5461 5462 fcport->scan_state = QLA_FCPORT_FOUND; 5463 5464 found++; 5465 5466 /* Update port state. */ 5467 memcpy(fcport->fabric_port_name, 5468 new_fcport->fabric_port_name, WWN_SIZE); 5469 fcport->fp_speed = new_fcport->fp_speed; 5470 5471 /* 5472 * If address the same and state FCS_ONLINE 5473 * (or in target mode), nothing changed. 5474 */ 5475 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5476 (atomic_read(&fcport->state) == FCS_ONLINE || 5477 (vha->host->active_mode == MODE_TARGET))) { 5478 break; 5479 } 5480 5481 /* 5482 * If device was not a fabric device before. 5483 */ 5484 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5485 fcport->d_id.b24 = new_fcport->d_id.b24; 5486 qla2x00_clear_loop_id(fcport); 5487 fcport->flags |= (FCF_FABRIC_DEVICE | 5488 FCF_LOGIN_NEEDED); 5489 break; 5490 } 5491 5492 /* 5493 * Port ID changed or device was marked to be updated; 5494 * Log it out if still logged in and mark it for 5495 * relogin later. 5496 */ 5497 if (qla_tgt_mode_enabled(base_vha)) { 5498 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5499 "port changed FC ID, %8phC" 5500 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5501 fcport->port_name, 5502 fcport->d_id.b.domain, 5503 fcport->d_id.b.area, 5504 fcport->d_id.b.al_pa, 5505 fcport->loop_id, 5506 new_fcport->d_id.b.domain, 5507 new_fcport->d_id.b.area, 5508 new_fcport->d_id.b.al_pa); 5509 fcport->d_id.b24 = new_fcport->d_id.b24; 5510 break; 5511 } 5512 5513 fcport->d_id.b24 = new_fcport->d_id.b24; 5514 fcport->flags |= FCF_LOGIN_NEEDED; 5515 break; 5516 } 5517 5518 if (found) { 5519 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5520 continue; 5521 } 5522 /* If device was not in our fcports list, then add it. */ 5523 new_fcport->scan_state = QLA_FCPORT_FOUND; 5524 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5525 5526 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5527 5528 5529 /* Allocate a new replacement fcport. */ 5530 nxt_d_id.b24 = new_fcport->d_id.b24; 5531 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5532 if (new_fcport == NULL) { 5533 ql_log(ql_log_warn, vha, 0xd032, 5534 "Memory allocation failed for fcport.\n"); 5535 return (QLA_MEMORY_ALLOC_FAILED); 5536 } 5537 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5538 new_fcport->d_id.b24 = nxt_d_id.b24; 5539 } 5540 5541 qla2x00_free_fcport(new_fcport); 5542 5543 /* 5544 * Logout all previous fabric dev marked lost, except FCP2 devices. 5545 */ 5546 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5547 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5548 break; 5549 5550 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5551 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5552 continue; 5553 5554 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5555 if ((qla_dual_mode_enabled(vha) || 5556 qla_ini_mode_enabled(vha)) && 5557 atomic_read(&fcport->state) == FCS_ONLINE) { 5558 qla2x00_mark_device_lost(vha, fcport, 5559 ql2xplogiabsentdevice, 0); 5560 if (fcport->loop_id != FC_NO_LOOP_ID && 5561 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5562 fcport->port_type != FCT_INITIATOR && 5563 fcport->port_type != FCT_BROADCAST) { 5564 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5565 "%s %d %8phC post del sess\n", 5566 __func__, __LINE__, 5567 fcport->port_name); 5568 qlt_schedule_sess_for_deletion(fcport); 5569 continue; 5570 } 5571 } 5572 } 5573 5574 if (fcport->scan_state == QLA_FCPORT_FOUND) 5575 qla24xx_fcport_handle_login(vha, fcport); 5576 } 5577 return (rval); 5578 } 5579 5580 /* 5581 * qla2x00_find_new_loop_id 5582 * Scan through our port list and find a new usable loop ID. 5583 * 5584 * Input: 5585 * ha: adapter state pointer. 5586 * dev: port structure pointer. 5587 * 5588 * Returns: 5589 * qla2x00 local function return status code. 5590 * 5591 * Context: 5592 * Kernel context. 5593 */ 5594 int 5595 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5596 { 5597 int rval; 5598 struct qla_hw_data *ha = vha->hw; 5599 unsigned long flags = 0; 5600 5601 rval = QLA_SUCCESS; 5602 5603 spin_lock_irqsave(&ha->vport_slock, flags); 5604 5605 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5606 LOOPID_MAP_SIZE); 5607 if (dev->loop_id >= LOOPID_MAP_SIZE || 5608 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5609 dev->loop_id = FC_NO_LOOP_ID; 5610 rval = QLA_FUNCTION_FAILED; 5611 } else 5612 set_bit(dev->loop_id, ha->loop_id_map); 5613 5614 spin_unlock_irqrestore(&ha->vport_slock, flags); 5615 5616 if (rval == QLA_SUCCESS) 5617 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5618 "Assigning new loopid=%x, portid=%x.\n", 5619 dev->loop_id, dev->d_id.b24); 5620 else 5621 ql_log(ql_log_warn, dev->vha, 0x2087, 5622 "No loop_id's available, portid=%x.\n", 5623 dev->d_id.b24); 5624 5625 return (rval); 5626 } 5627 5628 5629 /* 5630 * qla2x00_fabric_login 5631 * Issue fabric login command. 5632 * 5633 * Input: 5634 * ha = adapter block pointer. 5635 * device = pointer to FC device type structure. 5636 * 5637 * Returns: 5638 * 0 - Login successfully 5639 * 1 - Login failed 5640 * 2 - Initiator device 5641 * 3 - Fatal error 5642 */ 5643 int 5644 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5645 uint16_t *next_loopid) 5646 { 5647 int rval; 5648 int retry; 5649 uint16_t tmp_loopid; 5650 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5651 struct qla_hw_data *ha = vha->hw; 5652 5653 retry = 0; 5654 tmp_loopid = 0; 5655 5656 for (;;) { 5657 ql_dbg(ql_dbg_disc, vha, 0x2000, 5658 "Trying Fabric Login w/loop id 0x%04x for port " 5659 "%02x%02x%02x.\n", 5660 fcport->loop_id, fcport->d_id.b.domain, 5661 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5662 5663 /* Login fcport on switch. */ 5664 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5665 fcport->d_id.b.domain, fcport->d_id.b.area, 5666 fcport->d_id.b.al_pa, mb, BIT_0); 5667 if (rval != QLA_SUCCESS) { 5668 return rval; 5669 } 5670 if (mb[0] == MBS_PORT_ID_USED) { 5671 /* 5672 * Device has another loop ID. The firmware team 5673 * recommends the driver perform an implicit login with 5674 * the specified ID again. The ID we just used is save 5675 * here so we return with an ID that can be tried by 5676 * the next login. 5677 */ 5678 retry++; 5679 tmp_loopid = fcport->loop_id; 5680 fcport->loop_id = mb[1]; 5681 5682 ql_dbg(ql_dbg_disc, vha, 0x2001, 5683 "Fabric Login: port in use - next loop " 5684 "id=0x%04x, port id= %02x%02x%02x.\n", 5685 fcport->loop_id, fcport->d_id.b.domain, 5686 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5687 5688 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5689 /* 5690 * Login succeeded. 5691 */ 5692 if (retry) { 5693 /* A retry occurred before. */ 5694 *next_loopid = tmp_loopid; 5695 } else { 5696 /* 5697 * No retry occurred before. Just increment the 5698 * ID value for next login. 5699 */ 5700 *next_loopid = (fcport->loop_id + 1); 5701 } 5702 5703 if (mb[1] & BIT_0) { 5704 fcport->port_type = FCT_INITIATOR; 5705 } else { 5706 fcport->port_type = FCT_TARGET; 5707 if (mb[1] & BIT_1) { 5708 fcport->flags |= FCF_FCP2_DEVICE; 5709 } 5710 } 5711 5712 if (mb[10] & BIT_0) 5713 fcport->supported_classes |= FC_COS_CLASS2; 5714 if (mb[10] & BIT_1) 5715 fcport->supported_classes |= FC_COS_CLASS3; 5716 5717 if (IS_FWI2_CAPABLE(ha)) { 5718 if (mb[10] & BIT_7) 5719 fcport->flags |= 5720 FCF_CONF_COMP_SUPPORTED; 5721 } 5722 5723 rval = QLA_SUCCESS; 5724 break; 5725 } else if (mb[0] == MBS_LOOP_ID_USED) { 5726 /* 5727 * Loop ID already used, try next loop ID. 5728 */ 5729 fcport->loop_id++; 5730 rval = qla2x00_find_new_loop_id(vha, fcport); 5731 if (rval != QLA_SUCCESS) { 5732 /* Ran out of loop IDs to use */ 5733 break; 5734 } 5735 } else if (mb[0] == MBS_COMMAND_ERROR) { 5736 /* 5737 * Firmware possibly timed out during login. If NO 5738 * retries are left to do then the device is declared 5739 * dead. 5740 */ 5741 *next_loopid = fcport->loop_id; 5742 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5743 fcport->d_id.b.domain, fcport->d_id.b.area, 5744 fcport->d_id.b.al_pa); 5745 qla2x00_mark_device_lost(vha, fcport, 1, 0); 5746 5747 rval = 1; 5748 break; 5749 } else { 5750 /* 5751 * unrecoverable / not handled error 5752 */ 5753 ql_dbg(ql_dbg_disc, vha, 0x2002, 5754 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 5755 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 5756 fcport->d_id.b.area, fcport->d_id.b.al_pa, 5757 fcport->loop_id, jiffies); 5758 5759 *next_loopid = fcport->loop_id; 5760 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5761 fcport->d_id.b.domain, fcport->d_id.b.area, 5762 fcport->d_id.b.al_pa); 5763 qla2x00_clear_loop_id(fcport); 5764 fcport->login_retry = 0; 5765 5766 rval = 3; 5767 break; 5768 } 5769 } 5770 5771 return (rval); 5772 } 5773 5774 /* 5775 * qla2x00_local_device_login 5776 * Issue local device login command. 5777 * 5778 * Input: 5779 * ha = adapter block pointer. 5780 * loop_id = loop id of device to login to. 5781 * 5782 * Returns (Where's the #define!!!!): 5783 * 0 - Login successfully 5784 * 1 - Login failed 5785 * 3 - Fatal error 5786 */ 5787 int 5788 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 5789 { 5790 int rval; 5791 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5792 5793 memset(mb, 0, sizeof(mb)); 5794 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 5795 if (rval == QLA_SUCCESS) { 5796 /* Interrogate mailbox registers for any errors */ 5797 if (mb[0] == MBS_COMMAND_ERROR) 5798 rval = 1; 5799 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 5800 /* device not in PCB table */ 5801 rval = 3; 5802 } 5803 5804 return (rval); 5805 } 5806 5807 /* 5808 * qla2x00_loop_resync 5809 * Resync with fibre channel devices. 5810 * 5811 * Input: 5812 * ha = adapter block pointer. 5813 * 5814 * Returns: 5815 * 0 = success 5816 */ 5817 int 5818 qla2x00_loop_resync(scsi_qla_host_t *vha) 5819 { 5820 int rval = QLA_SUCCESS; 5821 uint32_t wait_time; 5822 struct req_que *req; 5823 struct rsp_que *rsp; 5824 5825 req = vha->req; 5826 rsp = req->rsp; 5827 5828 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5829 if (vha->flags.online) { 5830 if (!(rval = qla2x00_fw_ready(vha))) { 5831 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5832 wait_time = 256; 5833 do { 5834 if (!IS_QLAFX00(vha->hw)) { 5835 /* 5836 * Issue a marker after FW becomes 5837 * ready. 5838 */ 5839 qla2x00_marker(vha, req, rsp, 0, 0, 5840 MK_SYNC_ALL); 5841 vha->marker_needed = 0; 5842 } 5843 5844 /* Remap devices on Loop. */ 5845 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5846 5847 if (IS_QLAFX00(vha->hw)) 5848 qlafx00_configure_devices(vha); 5849 else 5850 qla2x00_configure_loop(vha); 5851 5852 wait_time--; 5853 } while (!atomic_read(&vha->loop_down_timer) && 5854 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5855 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 5856 &vha->dpc_flags))); 5857 } 5858 } 5859 5860 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5861 return (QLA_FUNCTION_FAILED); 5862 5863 if (rval) 5864 ql_dbg(ql_dbg_disc, vha, 0x206c, 5865 "%s *** FAILED ***.\n", __func__); 5866 5867 return (rval); 5868 } 5869 5870 /* 5871 * qla2x00_perform_loop_resync 5872 * Description: This function will set the appropriate flags and call 5873 * qla2x00_loop_resync. If successful loop will be resynced 5874 * Arguments : scsi_qla_host_t pointer 5875 * returm : Success or Failure 5876 */ 5877 5878 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 5879 { 5880 int32_t rval = 0; 5881 5882 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 5883 /*Configure the flags so that resync happens properly*/ 5884 atomic_set(&ha->loop_down_timer, 0); 5885 if (!(ha->device_flags & DFLG_NO_CABLE)) { 5886 atomic_set(&ha->loop_state, LOOP_UP); 5887 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 5888 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 5889 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 5890 5891 rval = qla2x00_loop_resync(ha); 5892 } else 5893 atomic_set(&ha->loop_state, LOOP_DEAD); 5894 5895 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 5896 } 5897 5898 return rval; 5899 } 5900 5901 void 5902 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 5903 { 5904 fc_port_t *fcport; 5905 struct scsi_qla_host *vha; 5906 struct qla_hw_data *ha = base_vha->hw; 5907 unsigned long flags; 5908 5909 spin_lock_irqsave(&ha->vport_slock, flags); 5910 /* Go with deferred removal of rport references. */ 5911 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 5912 atomic_inc(&vha->vref_count); 5913 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5914 if (fcport->drport && 5915 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 5916 spin_unlock_irqrestore(&ha->vport_slock, flags); 5917 qla2x00_rport_del(fcport); 5918 5919 spin_lock_irqsave(&ha->vport_slock, flags); 5920 } 5921 } 5922 atomic_dec(&vha->vref_count); 5923 wake_up(&vha->vref_waitq); 5924 } 5925 spin_unlock_irqrestore(&ha->vport_slock, flags); 5926 } 5927 5928 /* Assumes idc_lock always held on entry */ 5929 void 5930 qla83xx_reset_ownership(scsi_qla_host_t *vha) 5931 { 5932 struct qla_hw_data *ha = vha->hw; 5933 uint32_t drv_presence, drv_presence_mask; 5934 uint32_t dev_part_info1, dev_part_info2, class_type; 5935 uint32_t class_type_mask = 0x3; 5936 uint16_t fcoe_other_function = 0xffff, i; 5937 5938 if (IS_QLA8044(ha)) { 5939 drv_presence = qla8044_rd_direct(vha, 5940 QLA8044_CRB_DRV_ACTIVE_INDEX); 5941 dev_part_info1 = qla8044_rd_direct(vha, 5942 QLA8044_CRB_DEV_PART_INFO_INDEX); 5943 dev_part_info2 = qla8044_rd_direct(vha, 5944 QLA8044_CRB_DEV_PART_INFO2); 5945 } else { 5946 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 5947 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 5948 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 5949 } 5950 for (i = 0; i < 8; i++) { 5951 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 5952 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5953 (i != ha->portnum)) { 5954 fcoe_other_function = i; 5955 break; 5956 } 5957 } 5958 if (fcoe_other_function == 0xffff) { 5959 for (i = 0; i < 8; i++) { 5960 class_type = ((dev_part_info2 >> (i * 4)) & 5961 class_type_mask); 5962 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5963 ((i + 8) != ha->portnum)) { 5964 fcoe_other_function = i + 8; 5965 break; 5966 } 5967 } 5968 } 5969 /* 5970 * Prepare drv-presence mask based on fcoe functions present. 5971 * However consider only valid physical fcoe function numbers (0-15). 5972 */ 5973 drv_presence_mask = ~((1 << (ha->portnum)) | 5974 ((fcoe_other_function == 0xffff) ? 5975 0 : (1 << (fcoe_other_function)))); 5976 5977 /* We are the reset owner iff: 5978 * - No other protocol drivers present. 5979 * - This is the lowest among fcoe functions. */ 5980 if (!(drv_presence & drv_presence_mask) && 5981 (ha->portnum < fcoe_other_function)) { 5982 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 5983 "This host is Reset owner.\n"); 5984 ha->flags.nic_core_reset_owner = 1; 5985 } 5986 } 5987 5988 static int 5989 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 5990 { 5991 int rval = QLA_SUCCESS; 5992 struct qla_hw_data *ha = vha->hw; 5993 uint32_t drv_ack; 5994 5995 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 5996 if (rval == QLA_SUCCESS) { 5997 drv_ack |= (1 << ha->portnum); 5998 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 5999 } 6000 6001 return rval; 6002 } 6003 6004 static int 6005 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6006 { 6007 int rval = QLA_SUCCESS; 6008 struct qla_hw_data *ha = vha->hw; 6009 uint32_t drv_ack; 6010 6011 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6012 if (rval == QLA_SUCCESS) { 6013 drv_ack &= ~(1 << ha->portnum); 6014 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6015 } 6016 6017 return rval; 6018 } 6019 6020 static const char * 6021 qla83xx_dev_state_to_string(uint32_t dev_state) 6022 { 6023 switch (dev_state) { 6024 case QLA8XXX_DEV_COLD: 6025 return "COLD/RE-INIT"; 6026 case QLA8XXX_DEV_INITIALIZING: 6027 return "INITIALIZING"; 6028 case QLA8XXX_DEV_READY: 6029 return "READY"; 6030 case QLA8XXX_DEV_NEED_RESET: 6031 return "NEED RESET"; 6032 case QLA8XXX_DEV_NEED_QUIESCENT: 6033 return "NEED QUIESCENT"; 6034 case QLA8XXX_DEV_FAILED: 6035 return "FAILED"; 6036 case QLA8XXX_DEV_QUIESCENT: 6037 return "QUIESCENT"; 6038 default: 6039 return "Unknown"; 6040 } 6041 } 6042 6043 /* Assumes idc-lock always held on entry */ 6044 void 6045 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6046 { 6047 struct qla_hw_data *ha = vha->hw; 6048 uint32_t idc_audit_reg = 0, duration_secs = 0; 6049 6050 switch (audit_type) { 6051 case IDC_AUDIT_TIMESTAMP: 6052 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6053 idc_audit_reg = (ha->portnum) | 6054 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6055 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6056 break; 6057 6058 case IDC_AUDIT_COMPLETION: 6059 duration_secs = ((jiffies_to_msecs(jiffies) - 6060 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6061 idc_audit_reg = (ha->portnum) | 6062 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6063 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6064 break; 6065 6066 default: 6067 ql_log(ql_log_warn, vha, 0xb078, 6068 "Invalid audit type specified.\n"); 6069 break; 6070 } 6071 } 6072 6073 /* Assumes idc_lock always held on entry */ 6074 static int 6075 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6076 { 6077 struct qla_hw_data *ha = vha->hw; 6078 uint32_t idc_control, dev_state; 6079 6080 __qla83xx_get_idc_control(vha, &idc_control); 6081 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6082 ql_log(ql_log_info, vha, 0xb080, 6083 "NIC Core reset has been disabled. idc-control=0x%x\n", 6084 idc_control); 6085 return QLA_FUNCTION_FAILED; 6086 } 6087 6088 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6089 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6090 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6091 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6092 QLA8XXX_DEV_NEED_RESET); 6093 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6094 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6095 } else { 6096 const char *state = qla83xx_dev_state_to_string(dev_state); 6097 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6098 6099 /* SV: XXX: Is timeout required here? */ 6100 /* Wait for IDC state change READY -> NEED_RESET */ 6101 while (dev_state == QLA8XXX_DEV_READY) { 6102 qla83xx_idc_unlock(vha, 0); 6103 msleep(200); 6104 qla83xx_idc_lock(vha, 0); 6105 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6106 } 6107 } 6108 6109 /* Send IDC ack by writing to drv-ack register */ 6110 __qla83xx_set_drv_ack(vha); 6111 6112 return QLA_SUCCESS; 6113 } 6114 6115 int 6116 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6117 { 6118 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6119 } 6120 6121 int 6122 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6123 { 6124 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6125 } 6126 6127 static int 6128 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6129 { 6130 uint32_t drv_presence = 0; 6131 struct qla_hw_data *ha = vha->hw; 6132 6133 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6134 if (drv_presence & (1 << ha->portnum)) 6135 return QLA_SUCCESS; 6136 else 6137 return QLA_TEST_FAILED; 6138 } 6139 6140 int 6141 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6142 { 6143 int rval = QLA_SUCCESS; 6144 struct qla_hw_data *ha = vha->hw; 6145 6146 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6147 "Entered %s().\n", __func__); 6148 6149 if (vha->device_flags & DFLG_DEV_FAILED) { 6150 ql_log(ql_log_warn, vha, 0xb059, 6151 "Device in unrecoverable FAILED state.\n"); 6152 return QLA_FUNCTION_FAILED; 6153 } 6154 6155 qla83xx_idc_lock(vha, 0); 6156 6157 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6158 ql_log(ql_log_warn, vha, 0xb05a, 6159 "Function=0x%x has been removed from IDC participation.\n", 6160 ha->portnum); 6161 rval = QLA_FUNCTION_FAILED; 6162 goto exit; 6163 } 6164 6165 qla83xx_reset_ownership(vha); 6166 6167 rval = qla83xx_initiating_reset(vha); 6168 6169 /* 6170 * Perform reset if we are the reset-owner, 6171 * else wait till IDC state changes to READY/FAILED. 6172 */ 6173 if (rval == QLA_SUCCESS) { 6174 rval = qla83xx_idc_state_handler(vha); 6175 6176 if (rval == QLA_SUCCESS) 6177 ha->flags.nic_core_hung = 0; 6178 __qla83xx_clear_drv_ack(vha); 6179 } 6180 6181 exit: 6182 qla83xx_idc_unlock(vha, 0); 6183 6184 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6185 6186 return rval; 6187 } 6188 6189 int 6190 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6191 { 6192 struct qla_hw_data *ha = vha->hw; 6193 int rval = QLA_FUNCTION_FAILED; 6194 6195 if (!IS_MCTP_CAPABLE(ha)) { 6196 /* This message can be removed from the final version */ 6197 ql_log(ql_log_info, vha, 0x506d, 6198 "This board is not MCTP capable\n"); 6199 return rval; 6200 } 6201 6202 if (!ha->mctp_dump) { 6203 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6204 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6205 6206 if (!ha->mctp_dump) { 6207 ql_log(ql_log_warn, vha, 0x506e, 6208 "Failed to allocate memory for mctp dump\n"); 6209 return rval; 6210 } 6211 } 6212 6213 #define MCTP_DUMP_STR_ADDR 0x00000000 6214 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6215 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6216 if (rval != QLA_SUCCESS) { 6217 ql_log(ql_log_warn, vha, 0x506f, 6218 "Failed to capture mctp dump\n"); 6219 } else { 6220 ql_log(ql_log_info, vha, 0x5070, 6221 "Mctp dump capture for host (%ld/%p).\n", 6222 vha->host_no, ha->mctp_dump); 6223 ha->mctp_dumped = 1; 6224 } 6225 6226 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6227 ha->flags.nic_core_reset_hdlr_active = 1; 6228 rval = qla83xx_restart_nic_firmware(vha); 6229 if (rval) 6230 /* NIC Core reset failed. */ 6231 ql_log(ql_log_warn, vha, 0x5071, 6232 "Failed to restart nic firmware\n"); 6233 else 6234 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6235 "Restarted NIC firmware successfully.\n"); 6236 ha->flags.nic_core_reset_hdlr_active = 0; 6237 } 6238 6239 return rval; 6240 6241 } 6242 6243 /* 6244 * qla2x00_quiesce_io 6245 * Description: This function will block the new I/Os 6246 * Its not aborting any I/Os as context 6247 * is not destroyed during quiescence 6248 * Arguments: scsi_qla_host_t 6249 * return : void 6250 */ 6251 void 6252 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6253 { 6254 struct qla_hw_data *ha = vha->hw; 6255 struct scsi_qla_host *vp; 6256 6257 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6258 "Quiescing I/O - ha=%p.\n", ha); 6259 6260 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6261 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6262 atomic_set(&vha->loop_state, LOOP_DOWN); 6263 qla2x00_mark_all_devices_lost(vha, 0); 6264 list_for_each_entry(vp, &ha->vp_list, list) 6265 qla2x00_mark_all_devices_lost(vp, 0); 6266 } else { 6267 if (!atomic_read(&vha->loop_down_timer)) 6268 atomic_set(&vha->loop_down_timer, 6269 LOOP_DOWN_TIME); 6270 } 6271 /* Wait for pending cmds to complete */ 6272 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6273 } 6274 6275 void 6276 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6277 { 6278 struct qla_hw_data *ha = vha->hw; 6279 struct scsi_qla_host *vp; 6280 unsigned long flags; 6281 fc_port_t *fcport; 6282 u16 i; 6283 6284 /* For ISP82XX, driver waits for completion of the commands. 6285 * online flag should be set. 6286 */ 6287 if (!(IS_P3P_TYPE(ha))) 6288 vha->flags.online = 0; 6289 ha->flags.chip_reset_done = 0; 6290 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6291 vha->qla_stats.total_isp_aborts++; 6292 6293 ql_log(ql_log_info, vha, 0x00af, 6294 "Performing ISP error recovery - ha=%p.\n", ha); 6295 6296 /* For ISP82XX, reset_chip is just disabling interrupts. 6297 * Driver waits for the completion of the commands. 6298 * the interrupts need to be enabled. 6299 */ 6300 if (!(IS_P3P_TYPE(ha))) 6301 ha->isp_ops->reset_chip(vha); 6302 6303 SAVE_TOPO(ha); 6304 ha->flags.rida_fmt2 = 0; 6305 ha->flags.n2n_ae = 0; 6306 ha->flags.lip_ae = 0; 6307 ha->current_topology = 0; 6308 ha->flags.fw_started = 0; 6309 ha->flags.fw_init_done = 0; 6310 ha->base_qpair->chip_reset++; 6311 for (i = 0; i < ha->max_qpairs; i++) { 6312 if (ha->queue_pair_map[i]) 6313 ha->queue_pair_map[i]->chip_reset = 6314 ha->base_qpair->chip_reset; 6315 } 6316 6317 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6318 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6319 atomic_set(&vha->loop_state, LOOP_DOWN); 6320 qla2x00_mark_all_devices_lost(vha, 0); 6321 6322 spin_lock_irqsave(&ha->vport_slock, flags); 6323 list_for_each_entry(vp, &ha->vp_list, list) { 6324 atomic_inc(&vp->vref_count); 6325 spin_unlock_irqrestore(&ha->vport_slock, flags); 6326 6327 qla2x00_mark_all_devices_lost(vp, 0); 6328 6329 spin_lock_irqsave(&ha->vport_slock, flags); 6330 atomic_dec(&vp->vref_count); 6331 } 6332 spin_unlock_irqrestore(&ha->vport_slock, flags); 6333 } else { 6334 if (!atomic_read(&vha->loop_down_timer)) 6335 atomic_set(&vha->loop_down_timer, 6336 LOOP_DOWN_TIME); 6337 } 6338 6339 /* Clear all async request states across all VPs. */ 6340 list_for_each_entry(fcport, &vha->vp_fcports, list) 6341 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6342 spin_lock_irqsave(&ha->vport_slock, flags); 6343 list_for_each_entry(vp, &ha->vp_list, list) { 6344 atomic_inc(&vp->vref_count); 6345 spin_unlock_irqrestore(&ha->vport_slock, flags); 6346 6347 list_for_each_entry(fcport, &vp->vp_fcports, list) 6348 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6349 6350 spin_lock_irqsave(&ha->vport_slock, flags); 6351 atomic_dec(&vp->vref_count); 6352 } 6353 spin_unlock_irqrestore(&ha->vport_slock, flags); 6354 6355 if (!ha->flags.eeh_busy) { 6356 /* Make sure for ISP 82XX IO DMA is complete */ 6357 if (IS_P3P_TYPE(ha)) { 6358 qla82xx_chip_reset_cleanup(vha); 6359 ql_log(ql_log_info, vha, 0x00b4, 6360 "Done chip reset cleanup.\n"); 6361 6362 /* Done waiting for pending commands. 6363 * Reset the online flag. 6364 */ 6365 vha->flags.online = 0; 6366 } 6367 6368 /* Requeue all commands in outstanding command list. */ 6369 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6370 } 6371 /* memory barrier */ 6372 wmb(); 6373 } 6374 6375 /* 6376 * qla2x00_abort_isp 6377 * Resets ISP and aborts all outstanding commands. 6378 * 6379 * Input: 6380 * ha = adapter block pointer. 6381 * 6382 * Returns: 6383 * 0 = success 6384 */ 6385 int 6386 qla2x00_abort_isp(scsi_qla_host_t *vha) 6387 { 6388 int rval; 6389 uint8_t status = 0; 6390 struct qla_hw_data *ha = vha->hw; 6391 struct scsi_qla_host *vp; 6392 struct req_que *req = ha->req_q_map[0]; 6393 unsigned long flags; 6394 6395 if (vha->flags.online) { 6396 qla2x00_abort_isp_cleanup(vha); 6397 6398 if (IS_QLA8031(ha)) { 6399 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6400 "Clearing fcoe driver presence.\n"); 6401 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6402 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6403 "Error while clearing DRV-Presence.\n"); 6404 } 6405 6406 if (unlikely(pci_channel_offline(ha->pdev) && 6407 ha->flags.pci_channel_io_perm_failure)) { 6408 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6409 status = 0; 6410 return status; 6411 } 6412 6413 ha->isp_ops->get_flash_version(vha, req->ring); 6414 6415 ha->isp_ops->nvram_config(vha); 6416 6417 if (!qla2x00_restart_isp(vha)) { 6418 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6419 6420 if (!atomic_read(&vha->loop_down_timer)) { 6421 /* 6422 * Issue marker command only when we are going 6423 * to start the I/O . 6424 */ 6425 vha->marker_needed = 1; 6426 } 6427 6428 vha->flags.online = 1; 6429 6430 ha->isp_ops->enable_intrs(ha); 6431 6432 ha->isp_abort_cnt = 0; 6433 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6434 6435 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6436 qla2x00_get_fw_version(vha); 6437 if (ha->fce) { 6438 ha->flags.fce_enabled = 1; 6439 memset(ha->fce, 0, 6440 fce_calc_size(ha->fce_bufs)); 6441 rval = qla2x00_enable_fce_trace(vha, 6442 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6443 &ha->fce_bufs); 6444 if (rval) { 6445 ql_log(ql_log_warn, vha, 0x8033, 6446 "Unable to reinitialize FCE " 6447 "(%d).\n", rval); 6448 ha->flags.fce_enabled = 0; 6449 } 6450 } 6451 6452 if (ha->eft) { 6453 memset(ha->eft, 0, EFT_SIZE); 6454 rval = qla2x00_enable_eft_trace(vha, 6455 ha->eft_dma, EFT_NUM_BUFFERS); 6456 if (rval) { 6457 ql_log(ql_log_warn, vha, 0x8034, 6458 "Unable to reinitialize EFT " 6459 "(%d).\n", rval); 6460 } 6461 } 6462 } else { /* failed the ISP abort */ 6463 vha->flags.online = 1; 6464 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6465 if (ha->isp_abort_cnt == 0) { 6466 ql_log(ql_log_fatal, vha, 0x8035, 6467 "ISP error recover failed - " 6468 "board disabled.\n"); 6469 /* 6470 * The next call disables the board 6471 * completely. 6472 */ 6473 ha->isp_ops->reset_adapter(vha); 6474 vha->flags.online = 0; 6475 clear_bit(ISP_ABORT_RETRY, 6476 &vha->dpc_flags); 6477 status = 0; 6478 } else { /* schedule another ISP abort */ 6479 ha->isp_abort_cnt--; 6480 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6481 "ISP abort - retry remaining %d.\n", 6482 ha->isp_abort_cnt); 6483 status = 1; 6484 } 6485 } else { 6486 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6487 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6488 "ISP error recovery - retrying (%d) " 6489 "more times.\n", ha->isp_abort_cnt); 6490 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6491 status = 1; 6492 } 6493 } 6494 6495 } 6496 6497 if (!status) { 6498 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6499 qla2x00_configure_hba(vha); 6500 spin_lock_irqsave(&ha->vport_slock, flags); 6501 list_for_each_entry(vp, &ha->vp_list, list) { 6502 if (vp->vp_idx) { 6503 atomic_inc(&vp->vref_count); 6504 spin_unlock_irqrestore(&ha->vport_slock, flags); 6505 6506 qla2x00_vp_abort_isp(vp); 6507 6508 spin_lock_irqsave(&ha->vport_slock, flags); 6509 atomic_dec(&vp->vref_count); 6510 } 6511 } 6512 spin_unlock_irqrestore(&ha->vport_slock, flags); 6513 6514 if (IS_QLA8031(ha)) { 6515 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6516 "Setting back fcoe driver presence.\n"); 6517 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6518 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6519 "Error while setting DRV-Presence.\n"); 6520 } 6521 } else { 6522 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6523 __func__); 6524 } 6525 6526 return(status); 6527 } 6528 6529 /* 6530 * qla2x00_restart_isp 6531 * restarts the ISP after a reset 6532 * 6533 * Input: 6534 * ha = adapter block pointer. 6535 * 6536 * Returns: 6537 * 0 = success 6538 */ 6539 static int 6540 qla2x00_restart_isp(scsi_qla_host_t *vha) 6541 { 6542 int status = 0; 6543 struct qla_hw_data *ha = vha->hw; 6544 struct req_que *req = ha->req_q_map[0]; 6545 struct rsp_que *rsp = ha->rsp_q_map[0]; 6546 6547 /* If firmware needs to be loaded */ 6548 if (qla2x00_isp_firmware(vha)) { 6549 vha->flags.online = 0; 6550 status = ha->isp_ops->chip_diag(vha); 6551 if (!status) 6552 status = qla2x00_setup_chip(vha); 6553 } 6554 6555 if (!status && !(status = qla2x00_init_rings(vha))) { 6556 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6557 ha->flags.chip_reset_done = 1; 6558 6559 /* Initialize the queues in use */ 6560 qla25xx_init_queues(ha); 6561 6562 status = qla2x00_fw_ready(vha); 6563 if (!status) { 6564 /* Issue a marker after FW becomes ready. */ 6565 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6566 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6567 } 6568 6569 /* if no cable then assume it's good */ 6570 if ((vha->device_flags & DFLG_NO_CABLE)) 6571 status = 0; 6572 } 6573 return (status); 6574 } 6575 6576 static int 6577 qla25xx_init_queues(struct qla_hw_data *ha) 6578 { 6579 struct rsp_que *rsp = NULL; 6580 struct req_que *req = NULL; 6581 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6582 int ret = -1; 6583 int i; 6584 6585 for (i = 1; i < ha->max_rsp_queues; i++) { 6586 rsp = ha->rsp_q_map[i]; 6587 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6588 rsp->options &= ~BIT_0; 6589 ret = qla25xx_init_rsp_que(base_vha, rsp); 6590 if (ret != QLA_SUCCESS) 6591 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6592 "%s Rsp que: %d init failed.\n", 6593 __func__, rsp->id); 6594 else 6595 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6596 "%s Rsp que: %d inited.\n", 6597 __func__, rsp->id); 6598 } 6599 } 6600 for (i = 1; i < ha->max_req_queues; i++) { 6601 req = ha->req_q_map[i]; 6602 if (req && test_bit(i, ha->req_qid_map)) { 6603 /* Clear outstanding commands array. */ 6604 req->options &= ~BIT_0; 6605 ret = qla25xx_init_req_que(base_vha, req); 6606 if (ret != QLA_SUCCESS) 6607 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6608 "%s Req que: %d init failed.\n", 6609 __func__, req->id); 6610 else 6611 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6612 "%s Req que: %d inited.\n", 6613 __func__, req->id); 6614 } 6615 } 6616 return ret; 6617 } 6618 6619 /* 6620 * qla2x00_reset_adapter 6621 * Reset adapter. 6622 * 6623 * Input: 6624 * ha = adapter block pointer. 6625 */ 6626 void 6627 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6628 { 6629 unsigned long flags = 0; 6630 struct qla_hw_data *ha = vha->hw; 6631 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6632 6633 vha->flags.online = 0; 6634 ha->isp_ops->disable_intrs(ha); 6635 6636 spin_lock_irqsave(&ha->hardware_lock, flags); 6637 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6638 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6639 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6640 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6641 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6642 } 6643 6644 void 6645 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6646 { 6647 unsigned long flags = 0; 6648 struct qla_hw_data *ha = vha->hw; 6649 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6650 6651 if (IS_P3P_TYPE(ha)) 6652 return; 6653 6654 vha->flags.online = 0; 6655 ha->isp_ops->disable_intrs(ha); 6656 6657 spin_lock_irqsave(&ha->hardware_lock, flags); 6658 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6659 RD_REG_DWORD(®->hccr); 6660 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6661 RD_REG_DWORD(®->hccr); 6662 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6663 6664 if (IS_NOPOLLING_TYPE(ha)) 6665 ha->isp_ops->enable_intrs(ha); 6666 } 6667 6668 /* On sparc systems, obtain port and node WWN from firmware 6669 * properties. 6670 */ 6671 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6672 struct nvram_24xx *nv) 6673 { 6674 #ifdef CONFIG_SPARC 6675 struct qla_hw_data *ha = vha->hw; 6676 struct pci_dev *pdev = ha->pdev; 6677 struct device_node *dp = pci_device_to_OF_node(pdev); 6678 const u8 *val; 6679 int len; 6680 6681 val = of_get_property(dp, "port-wwn", &len); 6682 if (val && len >= WWN_SIZE) 6683 memcpy(nv->port_name, val, WWN_SIZE); 6684 6685 val = of_get_property(dp, "node-wwn", &len); 6686 if (val && len >= WWN_SIZE) 6687 memcpy(nv->node_name, val, WWN_SIZE); 6688 #endif 6689 } 6690 6691 int 6692 qla24xx_nvram_config(scsi_qla_host_t *vha) 6693 { 6694 int rval; 6695 struct init_cb_24xx *icb; 6696 struct nvram_24xx *nv; 6697 uint32_t *dptr; 6698 uint8_t *dptr1, *dptr2; 6699 uint32_t chksum; 6700 uint16_t cnt; 6701 struct qla_hw_data *ha = vha->hw; 6702 6703 rval = QLA_SUCCESS; 6704 icb = (struct init_cb_24xx *)ha->init_cb; 6705 nv = ha->nvram; 6706 6707 /* Determine NVRAM starting address. */ 6708 if (ha->port_no == 0) { 6709 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 6710 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 6711 } else { 6712 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 6713 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 6714 } 6715 6716 ha->nvram_size = sizeof(struct nvram_24xx); 6717 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6718 6719 /* Get VPD data into cache */ 6720 ha->vpd = ha->nvram + VPD_OFFSET; 6721 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 6722 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 6723 6724 /* Get NVRAM data into cache and calculate checksum. */ 6725 dptr = (uint32_t *)nv; 6726 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 6727 ha->nvram_size); 6728 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6729 chksum += le32_to_cpu(*dptr); 6730 6731 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 6732 "Contents of NVRAM\n"); 6733 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 6734 (uint8_t *)nv, ha->nvram_size); 6735 6736 /* Bad NVRAM data, set defaults parameters. */ 6737 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6738 || nv->id[3] != ' ' || 6739 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6740 /* Reset NVRAM data. */ 6741 ql_log(ql_log_warn, vha, 0x006b, 6742 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6743 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 6744 ql_log(ql_log_warn, vha, 0x006c, 6745 "Falling back to functioning (yet invalid -- WWPN) " 6746 "defaults.\n"); 6747 6748 /* 6749 * Set default initialization control block. 6750 */ 6751 memset(nv, 0, ha->nvram_size); 6752 nv->nvram_version = cpu_to_le16(ICB_VERSION); 6753 nv->version = cpu_to_le16(ICB_VERSION); 6754 nv->frame_payload_size = 2048; 6755 nv->execution_throttle = cpu_to_le16(0xFFFF); 6756 nv->exchange_count = cpu_to_le16(0); 6757 nv->hard_address = cpu_to_le16(124); 6758 nv->port_name[0] = 0x21; 6759 nv->port_name[1] = 0x00 + ha->port_no + 1; 6760 nv->port_name[2] = 0x00; 6761 nv->port_name[3] = 0xe0; 6762 nv->port_name[4] = 0x8b; 6763 nv->port_name[5] = 0x1c; 6764 nv->port_name[6] = 0x55; 6765 nv->port_name[7] = 0x86; 6766 nv->node_name[0] = 0x20; 6767 nv->node_name[1] = 0x00; 6768 nv->node_name[2] = 0x00; 6769 nv->node_name[3] = 0xe0; 6770 nv->node_name[4] = 0x8b; 6771 nv->node_name[5] = 0x1c; 6772 nv->node_name[6] = 0x55; 6773 nv->node_name[7] = 0x86; 6774 qla24xx_nvram_wwn_from_ofw(vha, nv); 6775 nv->login_retry_count = cpu_to_le16(8); 6776 nv->interrupt_delay_timer = cpu_to_le16(0); 6777 nv->login_timeout = cpu_to_le16(0); 6778 nv->firmware_options_1 = 6779 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6780 nv->firmware_options_2 = cpu_to_le32(2 << 4); 6781 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 6782 nv->firmware_options_3 = cpu_to_le32(2 << 13); 6783 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 6784 nv->efi_parameters = cpu_to_le32(0); 6785 nv->reset_delay = 5; 6786 nv->max_luns_per_target = cpu_to_le16(128); 6787 nv->port_down_retry_count = cpu_to_le16(30); 6788 nv->link_down_timeout = cpu_to_le16(30); 6789 6790 rval = 1; 6791 } 6792 6793 if (qla_tgt_mode_enabled(vha)) { 6794 /* Don't enable full login after initial LIP */ 6795 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 6796 /* Don't enable LIP full login for initiator */ 6797 nv->host_p &= cpu_to_le32(~BIT_10); 6798 } 6799 6800 qlt_24xx_config_nvram_stage1(vha, nv); 6801 6802 /* Reset Initialization control block */ 6803 memset(icb, 0, ha->init_cb_size); 6804 6805 /* Copy 1st segment. */ 6806 dptr1 = (uint8_t *)icb; 6807 dptr2 = (uint8_t *)&nv->version; 6808 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6809 while (cnt--) 6810 *dptr1++ = *dptr2++; 6811 6812 icb->login_retry_count = nv->login_retry_count; 6813 icb->link_down_on_nos = nv->link_down_on_nos; 6814 6815 /* Copy 2nd segment. */ 6816 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6817 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6818 cnt = (uint8_t *)&icb->reserved_3 - 6819 (uint8_t *)&icb->interrupt_delay_timer; 6820 while (cnt--) 6821 *dptr1++ = *dptr2++; 6822 6823 /* 6824 * Setup driver NVRAM options. 6825 */ 6826 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6827 "QLA2462"); 6828 6829 qlt_24xx_config_nvram_stage2(vha, icb); 6830 6831 if (nv->host_p & cpu_to_le32(BIT_15)) { 6832 /* Use alternate WWN? */ 6833 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6834 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6835 } 6836 6837 /* Prepare nodename */ 6838 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 6839 /* 6840 * Firmware will apply the following mask if the nodename was 6841 * not provided. 6842 */ 6843 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6844 icb->node_name[0] &= 0xF0; 6845 } 6846 6847 /* Set host adapter parameters. */ 6848 ha->flags.disable_risc_code_load = 0; 6849 ha->flags.enable_lip_reset = 0; 6850 ha->flags.enable_lip_full_login = 6851 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6852 ha->flags.enable_target_reset = 6853 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6854 ha->flags.enable_led_scheme = 0; 6855 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6856 6857 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6858 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6859 6860 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 6861 sizeof(ha->fw_seriallink_options24)); 6862 6863 /* save HBA serial number */ 6864 ha->serial0 = icb->port_name[5]; 6865 ha->serial1 = icb->port_name[6]; 6866 ha->serial2 = icb->port_name[7]; 6867 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6868 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6869 6870 icb->execution_throttle = cpu_to_le16(0xFFFF); 6871 6872 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6873 6874 /* Set minimum login_timeout to 4 seconds. */ 6875 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6876 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6877 if (le16_to_cpu(nv->login_timeout) < 4) 6878 nv->login_timeout = cpu_to_le16(4); 6879 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6880 6881 /* Set minimum RATOV to 100 tenths of a second. */ 6882 ha->r_a_tov = 100; 6883 6884 ha->loop_reset_delay = nv->reset_delay; 6885 6886 /* Link Down Timeout = 0: 6887 * 6888 * When Port Down timer expires we will start returning 6889 * I/O's to OS with "DID_NO_CONNECT". 6890 * 6891 * Link Down Timeout != 0: 6892 * 6893 * The driver waits for the link to come up after link down 6894 * before returning I/Os to OS with "DID_NO_CONNECT". 6895 */ 6896 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6897 ha->loop_down_abort_time = 6898 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6899 } else { 6900 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6901 ha->loop_down_abort_time = 6902 (LOOP_DOWN_TIME - ha->link_down_timeout); 6903 } 6904 6905 /* Need enough time to try and get the port back. */ 6906 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6907 if (qlport_down_retry) 6908 ha->port_down_retry_count = qlport_down_retry; 6909 6910 /* Set login_retry_count */ 6911 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6912 if (ha->port_down_retry_count == 6913 le16_to_cpu(nv->port_down_retry_count) && 6914 ha->port_down_retry_count > 3) 6915 ha->login_retry_count = ha->port_down_retry_count; 6916 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6917 ha->login_retry_count = ha->port_down_retry_count; 6918 if (ql2xloginretrycount) 6919 ha->login_retry_count = ql2xloginretrycount; 6920 6921 /* Enable ZIO. */ 6922 if (!vha->flags.init_done) { 6923 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6924 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6925 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6926 le16_to_cpu(icb->interrupt_delay_timer): 2; 6927 } 6928 icb->firmware_options_2 &= cpu_to_le32( 6929 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6930 vha->flags.process_response_queue = 0; 6931 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6932 ha->zio_mode = QLA_ZIO_MODE_6; 6933 6934 ql_log(ql_log_info, vha, 0x006f, 6935 "ZIO mode %d enabled; timer delay (%d us).\n", 6936 ha->zio_mode, ha->zio_timer * 100); 6937 6938 icb->firmware_options_2 |= cpu_to_le32( 6939 (uint32_t)ha->zio_mode); 6940 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6941 vha->flags.process_response_queue = 1; 6942 } 6943 6944 if (rval) { 6945 ql_log(ql_log_warn, vha, 0x0070, 6946 "NVRAM configuration failed.\n"); 6947 } 6948 return (rval); 6949 } 6950 6951 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 6952 { 6953 struct qla27xx_image_status pri_image_status, sec_image_status; 6954 uint8_t valid_pri_image, valid_sec_image; 6955 uint32_t *wptr; 6956 uint32_t cnt, chksum, size; 6957 struct qla_hw_data *ha = vha->hw; 6958 6959 valid_pri_image = valid_sec_image = 1; 6960 ha->active_image = 0; 6961 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 6962 6963 if (!ha->flt_region_img_status_pri) { 6964 valid_pri_image = 0; 6965 goto check_sec_image; 6966 } 6967 6968 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 6969 ha->flt_region_img_status_pri, size); 6970 6971 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 6972 ql_dbg(ql_dbg_init, vha, 0x018b, 6973 "Primary image signature (0x%x) not valid\n", 6974 pri_image_status.signature); 6975 valid_pri_image = 0; 6976 goto check_sec_image; 6977 } 6978 6979 wptr = (uint32_t *)(&pri_image_status); 6980 cnt = size; 6981 6982 for (chksum = 0; cnt--; wptr++) 6983 chksum += le32_to_cpu(*wptr); 6984 6985 if (chksum) { 6986 ql_dbg(ql_dbg_init, vha, 0x018c, 6987 "Checksum validation failed for primary image (0x%x)\n", 6988 chksum); 6989 valid_pri_image = 0; 6990 } 6991 6992 check_sec_image: 6993 if (!ha->flt_region_img_status_sec) { 6994 valid_sec_image = 0; 6995 goto check_valid_image; 6996 } 6997 6998 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 6999 ha->flt_region_img_status_sec, size); 7000 7001 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7002 ql_dbg(ql_dbg_init, vha, 0x018d, 7003 "Secondary image signature(0x%x) not valid\n", 7004 sec_image_status.signature); 7005 valid_sec_image = 0; 7006 goto check_valid_image; 7007 } 7008 7009 wptr = (uint32_t *)(&sec_image_status); 7010 cnt = size; 7011 for (chksum = 0; cnt--; wptr++) 7012 chksum += le32_to_cpu(*wptr); 7013 if (chksum) { 7014 ql_dbg(ql_dbg_init, vha, 0x018e, 7015 "Checksum validation failed for secondary image (0x%x)\n", 7016 chksum); 7017 valid_sec_image = 0; 7018 } 7019 7020 check_valid_image: 7021 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7022 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7023 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7024 if (!ha->active_image || 7025 pri_image_status.generation_number < 7026 sec_image_status.generation_number) 7027 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7028 } 7029 7030 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n", 7031 ha->active_image == 0 ? "default bootld and fw" : 7032 ha->active_image == 1 ? "primary" : 7033 ha->active_image == 2 ? "secondary" : 7034 "Invalid"); 7035 7036 return ha->active_image; 7037 } 7038 7039 static int 7040 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7041 uint32_t faddr) 7042 { 7043 int rval = QLA_SUCCESS; 7044 int segments, fragment; 7045 uint32_t *dcode, dlen; 7046 uint32_t risc_addr; 7047 uint32_t risc_size; 7048 uint32_t i; 7049 struct qla_hw_data *ha = vha->hw; 7050 struct req_que *req = ha->req_q_map[0]; 7051 7052 ql_dbg(ql_dbg_init, vha, 0x008b, 7053 "FW: Loading firmware from flash (%x).\n", faddr); 7054 7055 rval = QLA_SUCCESS; 7056 7057 segments = FA_RISC_CODE_SEGMENTS; 7058 dcode = (uint32_t *)req->ring; 7059 *srisc_addr = 0; 7060 7061 if (IS_QLA27XX(ha) && 7062 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7063 faddr = ha->flt_region_fw_sec; 7064 7065 /* Validate firmware image by checking version. */ 7066 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7067 for (i = 0; i < 4; i++) 7068 dcode[i] = be32_to_cpu(dcode[i]); 7069 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7070 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7071 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7072 dcode[3] == 0)) { 7073 ql_log(ql_log_fatal, vha, 0x008c, 7074 "Unable to verify the integrity of flash firmware " 7075 "image.\n"); 7076 ql_log(ql_log_fatal, vha, 0x008d, 7077 "Firmware data: %08x %08x %08x %08x.\n", 7078 dcode[0], dcode[1], dcode[2], dcode[3]); 7079 7080 return QLA_FUNCTION_FAILED; 7081 } 7082 7083 while (segments && rval == QLA_SUCCESS) { 7084 /* Read segment's load information. */ 7085 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7086 7087 risc_addr = be32_to_cpu(dcode[2]); 7088 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7089 risc_size = be32_to_cpu(dcode[3]); 7090 7091 fragment = 0; 7092 while (risc_size > 0 && rval == QLA_SUCCESS) { 7093 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7094 if (dlen > risc_size) 7095 dlen = risc_size; 7096 7097 ql_dbg(ql_dbg_init, vha, 0x008e, 7098 "Loading risc segment@ risc addr %x " 7099 "number of dwords 0x%x offset 0x%x.\n", 7100 risc_addr, dlen, faddr); 7101 7102 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7103 for (i = 0; i < dlen; i++) 7104 dcode[i] = swab32(dcode[i]); 7105 7106 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7107 dlen); 7108 if (rval) { 7109 ql_log(ql_log_fatal, vha, 0x008f, 7110 "Failed to load segment %d of firmware.\n", 7111 fragment); 7112 return QLA_FUNCTION_FAILED; 7113 } 7114 7115 faddr += dlen; 7116 risc_addr += dlen; 7117 risc_size -= dlen; 7118 fragment++; 7119 } 7120 7121 /* Next segment. */ 7122 segments--; 7123 } 7124 7125 if (!IS_QLA27XX(ha)) 7126 return rval; 7127 7128 if (ha->fw_dump_template) 7129 vfree(ha->fw_dump_template); 7130 ha->fw_dump_template = NULL; 7131 ha->fw_dump_template_len = 0; 7132 7133 ql_dbg(ql_dbg_init, vha, 0x0161, 7134 "Loading fwdump template from %x\n", faddr); 7135 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7136 risc_size = be32_to_cpu(dcode[2]); 7137 ql_dbg(ql_dbg_init, vha, 0x0162, 7138 "-> array size %x dwords\n", risc_size); 7139 if (risc_size == 0 || risc_size == ~0) 7140 goto default_template; 7141 7142 dlen = (risc_size - 8) * sizeof(*dcode); 7143 ql_dbg(ql_dbg_init, vha, 0x0163, 7144 "-> template allocating %x bytes...\n", dlen); 7145 ha->fw_dump_template = vmalloc(dlen); 7146 if (!ha->fw_dump_template) { 7147 ql_log(ql_log_warn, vha, 0x0164, 7148 "Failed fwdump template allocate %x bytes.\n", risc_size); 7149 goto default_template; 7150 } 7151 7152 faddr += 7; 7153 risc_size -= 8; 7154 dcode = ha->fw_dump_template; 7155 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7156 for (i = 0; i < risc_size; i++) 7157 dcode[i] = le32_to_cpu(dcode[i]); 7158 7159 if (!qla27xx_fwdt_template_valid(dcode)) { 7160 ql_log(ql_log_warn, vha, 0x0165, 7161 "Failed fwdump template validate\n"); 7162 goto default_template; 7163 } 7164 7165 dlen = qla27xx_fwdt_template_size(dcode); 7166 ql_dbg(ql_dbg_init, vha, 0x0166, 7167 "-> template size %x bytes\n", dlen); 7168 if (dlen > risc_size * sizeof(*dcode)) { 7169 ql_log(ql_log_warn, vha, 0x0167, 7170 "Failed fwdump template exceeds array by %zx bytes\n", 7171 (size_t)(dlen - risc_size * sizeof(*dcode))); 7172 goto default_template; 7173 } 7174 ha->fw_dump_template_len = dlen; 7175 return rval; 7176 7177 default_template: 7178 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7179 if (ha->fw_dump_template) 7180 vfree(ha->fw_dump_template); 7181 ha->fw_dump_template = NULL; 7182 ha->fw_dump_template_len = 0; 7183 7184 dlen = qla27xx_fwdt_template_default_size(); 7185 ql_dbg(ql_dbg_init, vha, 0x0169, 7186 "-> template allocating %x bytes...\n", dlen); 7187 ha->fw_dump_template = vmalloc(dlen); 7188 if (!ha->fw_dump_template) { 7189 ql_log(ql_log_warn, vha, 0x016a, 7190 "Failed fwdump template allocate %x bytes.\n", risc_size); 7191 goto failed_template; 7192 } 7193 7194 dcode = ha->fw_dump_template; 7195 risc_size = dlen / sizeof(*dcode); 7196 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7197 for (i = 0; i < risc_size; i++) 7198 dcode[i] = be32_to_cpu(dcode[i]); 7199 7200 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7201 ql_log(ql_log_warn, vha, 0x016b, 7202 "Failed fwdump template validate\n"); 7203 goto failed_template; 7204 } 7205 7206 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7207 ql_dbg(ql_dbg_init, vha, 0x016c, 7208 "-> template size %x bytes\n", dlen); 7209 ha->fw_dump_template_len = dlen; 7210 return rval; 7211 7212 failed_template: 7213 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7214 if (ha->fw_dump_template) 7215 vfree(ha->fw_dump_template); 7216 ha->fw_dump_template = NULL; 7217 ha->fw_dump_template_len = 0; 7218 return rval; 7219 } 7220 7221 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7222 7223 int 7224 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7225 { 7226 int rval; 7227 int i, fragment; 7228 uint16_t *wcode, *fwcode; 7229 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7230 struct fw_blob *blob; 7231 struct qla_hw_data *ha = vha->hw; 7232 struct req_que *req = ha->req_q_map[0]; 7233 7234 /* Load firmware blob. */ 7235 blob = qla2x00_request_firmware(vha); 7236 if (!blob) { 7237 ql_log(ql_log_info, vha, 0x0083, 7238 "Firmware image unavailable.\n"); 7239 ql_log(ql_log_info, vha, 0x0084, 7240 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7241 return QLA_FUNCTION_FAILED; 7242 } 7243 7244 rval = QLA_SUCCESS; 7245 7246 wcode = (uint16_t *)req->ring; 7247 *srisc_addr = 0; 7248 fwcode = (uint16_t *)blob->fw->data; 7249 fwclen = 0; 7250 7251 /* Validate firmware image by checking version. */ 7252 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7253 ql_log(ql_log_fatal, vha, 0x0085, 7254 "Unable to verify integrity of firmware image (%zd).\n", 7255 blob->fw->size); 7256 goto fail_fw_integrity; 7257 } 7258 for (i = 0; i < 4; i++) 7259 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7260 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7261 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7262 wcode[2] == 0 && wcode[3] == 0)) { 7263 ql_log(ql_log_fatal, vha, 0x0086, 7264 "Unable to verify integrity of firmware image.\n"); 7265 ql_log(ql_log_fatal, vha, 0x0087, 7266 "Firmware data: %04x %04x %04x %04x.\n", 7267 wcode[0], wcode[1], wcode[2], wcode[3]); 7268 goto fail_fw_integrity; 7269 } 7270 7271 seg = blob->segs; 7272 while (*seg && rval == QLA_SUCCESS) { 7273 risc_addr = *seg; 7274 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7275 risc_size = be16_to_cpu(fwcode[3]); 7276 7277 /* Validate firmware image size. */ 7278 fwclen += risc_size * sizeof(uint16_t); 7279 if (blob->fw->size < fwclen) { 7280 ql_log(ql_log_fatal, vha, 0x0088, 7281 "Unable to verify integrity of firmware image " 7282 "(%zd).\n", blob->fw->size); 7283 goto fail_fw_integrity; 7284 } 7285 7286 fragment = 0; 7287 while (risc_size > 0 && rval == QLA_SUCCESS) { 7288 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7289 if (wlen > risc_size) 7290 wlen = risc_size; 7291 ql_dbg(ql_dbg_init, vha, 0x0089, 7292 "Loading risc segment@ risc addr %x number of " 7293 "words 0x%x.\n", risc_addr, wlen); 7294 7295 for (i = 0; i < wlen; i++) 7296 wcode[i] = swab16(fwcode[i]); 7297 7298 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7299 wlen); 7300 if (rval) { 7301 ql_log(ql_log_fatal, vha, 0x008a, 7302 "Failed to load segment %d of firmware.\n", 7303 fragment); 7304 break; 7305 } 7306 7307 fwcode += wlen; 7308 risc_addr += wlen; 7309 risc_size -= wlen; 7310 fragment++; 7311 } 7312 7313 /* Next segment. */ 7314 seg++; 7315 } 7316 return rval; 7317 7318 fail_fw_integrity: 7319 return QLA_FUNCTION_FAILED; 7320 } 7321 7322 static int 7323 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7324 { 7325 int rval; 7326 int segments, fragment; 7327 uint32_t *dcode, dlen; 7328 uint32_t risc_addr; 7329 uint32_t risc_size; 7330 uint32_t i; 7331 struct fw_blob *blob; 7332 const uint32_t *fwcode; 7333 uint32_t fwclen; 7334 struct qla_hw_data *ha = vha->hw; 7335 struct req_que *req = ha->req_q_map[0]; 7336 7337 /* Load firmware blob. */ 7338 blob = qla2x00_request_firmware(vha); 7339 if (!blob) { 7340 ql_log(ql_log_warn, vha, 0x0090, 7341 "Firmware image unavailable.\n"); 7342 ql_log(ql_log_warn, vha, 0x0091, 7343 "Firmware images can be retrieved from: " 7344 QLA_FW_URL ".\n"); 7345 7346 return QLA_FUNCTION_FAILED; 7347 } 7348 7349 ql_dbg(ql_dbg_init, vha, 0x0092, 7350 "FW: Loading via request-firmware.\n"); 7351 7352 rval = QLA_SUCCESS; 7353 7354 segments = FA_RISC_CODE_SEGMENTS; 7355 dcode = (uint32_t *)req->ring; 7356 *srisc_addr = 0; 7357 fwcode = (uint32_t *)blob->fw->data; 7358 fwclen = 0; 7359 7360 /* Validate firmware image by checking version. */ 7361 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7362 ql_log(ql_log_fatal, vha, 0x0093, 7363 "Unable to verify integrity of firmware image (%zd).\n", 7364 blob->fw->size); 7365 return QLA_FUNCTION_FAILED; 7366 } 7367 for (i = 0; i < 4; i++) 7368 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7369 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7370 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7371 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7372 dcode[3] == 0)) { 7373 ql_log(ql_log_fatal, vha, 0x0094, 7374 "Unable to verify integrity of firmware image (%zd).\n", 7375 blob->fw->size); 7376 ql_log(ql_log_fatal, vha, 0x0095, 7377 "Firmware data: %08x %08x %08x %08x.\n", 7378 dcode[0], dcode[1], dcode[2], dcode[3]); 7379 return QLA_FUNCTION_FAILED; 7380 } 7381 7382 while (segments && rval == QLA_SUCCESS) { 7383 risc_addr = be32_to_cpu(fwcode[2]); 7384 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7385 risc_size = be32_to_cpu(fwcode[3]); 7386 7387 /* Validate firmware image size. */ 7388 fwclen += risc_size * sizeof(uint32_t); 7389 if (blob->fw->size < fwclen) { 7390 ql_log(ql_log_fatal, vha, 0x0096, 7391 "Unable to verify integrity of firmware image " 7392 "(%zd).\n", blob->fw->size); 7393 return QLA_FUNCTION_FAILED; 7394 } 7395 7396 fragment = 0; 7397 while (risc_size > 0 && rval == QLA_SUCCESS) { 7398 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7399 if (dlen > risc_size) 7400 dlen = risc_size; 7401 7402 ql_dbg(ql_dbg_init, vha, 0x0097, 7403 "Loading risc segment@ risc addr %x " 7404 "number of dwords 0x%x.\n", risc_addr, dlen); 7405 7406 for (i = 0; i < dlen; i++) 7407 dcode[i] = swab32(fwcode[i]); 7408 7409 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7410 dlen); 7411 if (rval) { 7412 ql_log(ql_log_fatal, vha, 0x0098, 7413 "Failed to load segment %d of firmware.\n", 7414 fragment); 7415 return QLA_FUNCTION_FAILED; 7416 } 7417 7418 fwcode += dlen; 7419 risc_addr += dlen; 7420 risc_size -= dlen; 7421 fragment++; 7422 } 7423 7424 /* Next segment. */ 7425 segments--; 7426 } 7427 7428 if (!IS_QLA27XX(ha)) 7429 return rval; 7430 7431 if (ha->fw_dump_template) 7432 vfree(ha->fw_dump_template); 7433 ha->fw_dump_template = NULL; 7434 ha->fw_dump_template_len = 0; 7435 7436 ql_dbg(ql_dbg_init, vha, 0x171, 7437 "Loading fwdump template from %x\n", 7438 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7439 risc_size = be32_to_cpu(fwcode[2]); 7440 ql_dbg(ql_dbg_init, vha, 0x172, 7441 "-> array size %x dwords\n", risc_size); 7442 if (risc_size == 0 || risc_size == ~0) 7443 goto default_template; 7444 7445 dlen = (risc_size - 8) * sizeof(*fwcode); 7446 ql_dbg(ql_dbg_init, vha, 0x0173, 7447 "-> template allocating %x bytes...\n", dlen); 7448 ha->fw_dump_template = vmalloc(dlen); 7449 if (!ha->fw_dump_template) { 7450 ql_log(ql_log_warn, vha, 0x0174, 7451 "Failed fwdump template allocate %x bytes.\n", risc_size); 7452 goto default_template; 7453 } 7454 7455 fwcode += 7; 7456 risc_size -= 8; 7457 dcode = ha->fw_dump_template; 7458 for (i = 0; i < risc_size; i++) 7459 dcode[i] = le32_to_cpu(fwcode[i]); 7460 7461 if (!qla27xx_fwdt_template_valid(dcode)) { 7462 ql_log(ql_log_warn, vha, 0x0175, 7463 "Failed fwdump template validate\n"); 7464 goto default_template; 7465 } 7466 7467 dlen = qla27xx_fwdt_template_size(dcode); 7468 ql_dbg(ql_dbg_init, vha, 0x0176, 7469 "-> template size %x bytes\n", dlen); 7470 if (dlen > risc_size * sizeof(*fwcode)) { 7471 ql_log(ql_log_warn, vha, 0x0177, 7472 "Failed fwdump template exceeds array by %zx bytes\n", 7473 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7474 goto default_template; 7475 } 7476 ha->fw_dump_template_len = dlen; 7477 return rval; 7478 7479 default_template: 7480 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7481 if (ha->fw_dump_template) 7482 vfree(ha->fw_dump_template); 7483 ha->fw_dump_template = NULL; 7484 ha->fw_dump_template_len = 0; 7485 7486 dlen = qla27xx_fwdt_template_default_size(); 7487 ql_dbg(ql_dbg_init, vha, 0x0179, 7488 "-> template allocating %x bytes...\n", dlen); 7489 ha->fw_dump_template = vmalloc(dlen); 7490 if (!ha->fw_dump_template) { 7491 ql_log(ql_log_warn, vha, 0x017a, 7492 "Failed fwdump template allocate %x bytes.\n", risc_size); 7493 goto failed_template; 7494 } 7495 7496 dcode = ha->fw_dump_template; 7497 risc_size = dlen / sizeof(*fwcode); 7498 fwcode = qla27xx_fwdt_template_default(); 7499 for (i = 0; i < risc_size; i++) 7500 dcode[i] = be32_to_cpu(fwcode[i]); 7501 7502 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7503 ql_log(ql_log_warn, vha, 0x017b, 7504 "Failed fwdump template validate\n"); 7505 goto failed_template; 7506 } 7507 7508 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7509 ql_dbg(ql_dbg_init, vha, 0x017c, 7510 "-> template size %x bytes\n", dlen); 7511 ha->fw_dump_template_len = dlen; 7512 return rval; 7513 7514 failed_template: 7515 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7516 if (ha->fw_dump_template) 7517 vfree(ha->fw_dump_template); 7518 ha->fw_dump_template = NULL; 7519 ha->fw_dump_template_len = 0; 7520 return rval; 7521 } 7522 7523 int 7524 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7525 { 7526 int rval; 7527 7528 if (ql2xfwloadbin == 1) 7529 return qla81xx_load_risc(vha, srisc_addr); 7530 7531 /* 7532 * FW Load priority: 7533 * 1) Firmware via request-firmware interface (.bin file). 7534 * 2) Firmware residing in flash. 7535 */ 7536 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7537 if (rval == QLA_SUCCESS) 7538 return rval; 7539 7540 return qla24xx_load_risc_flash(vha, srisc_addr, 7541 vha->hw->flt_region_fw); 7542 } 7543 7544 int 7545 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7546 { 7547 int rval; 7548 struct qla_hw_data *ha = vha->hw; 7549 7550 if (ql2xfwloadbin == 2) 7551 goto try_blob_fw; 7552 7553 /* 7554 * FW Load priority: 7555 * 1) Firmware residing in flash. 7556 * 2) Firmware via request-firmware interface (.bin file). 7557 * 3) Golden-Firmware residing in flash -- limited operation. 7558 */ 7559 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7560 if (rval == QLA_SUCCESS) 7561 return rval; 7562 7563 try_blob_fw: 7564 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7565 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7566 return rval; 7567 7568 ql_log(ql_log_info, vha, 0x0099, 7569 "Attempting to fallback to golden firmware.\n"); 7570 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7571 if (rval != QLA_SUCCESS) 7572 return rval; 7573 7574 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7575 ha->flags.running_gold_fw = 1; 7576 return rval; 7577 } 7578 7579 void 7580 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7581 { 7582 int ret, retries; 7583 struct qla_hw_data *ha = vha->hw; 7584 7585 if (ha->flags.pci_channel_io_perm_failure) 7586 return; 7587 if (!IS_FWI2_CAPABLE(ha)) 7588 return; 7589 if (!ha->fw_major_version) 7590 return; 7591 if (!ha->flags.fw_started) 7592 return; 7593 7594 ret = qla2x00_stop_firmware(vha); 7595 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7596 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7597 ha->isp_ops->reset_chip(vha); 7598 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7599 continue; 7600 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7601 continue; 7602 ql_log(ql_log_info, vha, 0x8015, 7603 "Attempting retry of stop-firmware command.\n"); 7604 ret = qla2x00_stop_firmware(vha); 7605 } 7606 7607 QLA_FW_STOPPED(ha); 7608 ha->flags.fw_init_done = 0; 7609 } 7610 7611 int 7612 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7613 { 7614 int rval = QLA_SUCCESS; 7615 int rval2; 7616 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7617 struct qla_hw_data *ha = vha->hw; 7618 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7619 struct req_que *req; 7620 struct rsp_que *rsp; 7621 7622 if (!vha->vp_idx) 7623 return -EINVAL; 7624 7625 rval = qla2x00_fw_ready(base_vha); 7626 if (vha->qpair) 7627 req = vha->qpair->req; 7628 else 7629 req = ha->req_q_map[0]; 7630 rsp = req->rsp; 7631 7632 if (rval == QLA_SUCCESS) { 7633 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7634 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7635 } 7636 7637 vha->flags.management_server_logged_in = 0; 7638 7639 /* Login to SNS first */ 7640 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7641 BIT_1); 7642 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7643 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7644 ql_dbg(ql_dbg_init, vha, 0x0120, 7645 "Failed SNS login: loop_id=%x, rval2=%d\n", 7646 NPH_SNS, rval2); 7647 else 7648 ql_dbg(ql_dbg_init, vha, 0x0103, 7649 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7650 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7651 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7652 return (QLA_FUNCTION_FAILED); 7653 } 7654 7655 atomic_set(&vha->loop_down_timer, 0); 7656 atomic_set(&vha->loop_state, LOOP_UP); 7657 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7658 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7659 rval = qla2x00_loop_resync(base_vha); 7660 7661 return rval; 7662 } 7663 7664 /* 84XX Support **************************************************************/ 7665 7666 static LIST_HEAD(qla_cs84xx_list); 7667 static DEFINE_MUTEX(qla_cs84xx_mutex); 7668 7669 static struct qla_chip_state_84xx * 7670 qla84xx_get_chip(struct scsi_qla_host *vha) 7671 { 7672 struct qla_chip_state_84xx *cs84xx; 7673 struct qla_hw_data *ha = vha->hw; 7674 7675 mutex_lock(&qla_cs84xx_mutex); 7676 7677 /* Find any shared 84xx chip. */ 7678 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7679 if (cs84xx->bus == ha->pdev->bus) { 7680 kref_get(&cs84xx->kref); 7681 goto done; 7682 } 7683 } 7684 7685 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 7686 if (!cs84xx) 7687 goto done; 7688 7689 kref_init(&cs84xx->kref); 7690 spin_lock_init(&cs84xx->access_lock); 7691 mutex_init(&cs84xx->fw_update_mutex); 7692 cs84xx->bus = ha->pdev->bus; 7693 7694 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 7695 done: 7696 mutex_unlock(&qla_cs84xx_mutex); 7697 return cs84xx; 7698 } 7699 7700 static void 7701 __qla84xx_chip_release(struct kref *kref) 7702 { 7703 struct qla_chip_state_84xx *cs84xx = 7704 container_of(kref, struct qla_chip_state_84xx, kref); 7705 7706 mutex_lock(&qla_cs84xx_mutex); 7707 list_del(&cs84xx->list); 7708 mutex_unlock(&qla_cs84xx_mutex); 7709 kfree(cs84xx); 7710 } 7711 7712 void 7713 qla84xx_put_chip(struct scsi_qla_host *vha) 7714 { 7715 struct qla_hw_data *ha = vha->hw; 7716 if (ha->cs84xx) 7717 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 7718 } 7719 7720 static int 7721 qla84xx_init_chip(scsi_qla_host_t *vha) 7722 { 7723 int rval; 7724 uint16_t status[2]; 7725 struct qla_hw_data *ha = vha->hw; 7726 7727 mutex_lock(&ha->cs84xx->fw_update_mutex); 7728 7729 rval = qla84xx_verify_chip(vha, status); 7730 7731 mutex_unlock(&ha->cs84xx->fw_update_mutex); 7732 7733 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 7734 QLA_SUCCESS; 7735 } 7736 7737 /* 81XX Support **************************************************************/ 7738 7739 int 7740 qla81xx_nvram_config(scsi_qla_host_t *vha) 7741 { 7742 int rval; 7743 struct init_cb_81xx *icb; 7744 struct nvram_81xx *nv; 7745 uint32_t *dptr; 7746 uint8_t *dptr1, *dptr2; 7747 uint32_t chksum; 7748 uint16_t cnt; 7749 struct qla_hw_data *ha = vha->hw; 7750 7751 rval = QLA_SUCCESS; 7752 icb = (struct init_cb_81xx *)ha->init_cb; 7753 nv = ha->nvram; 7754 7755 /* Determine NVRAM starting address. */ 7756 ha->nvram_size = sizeof(struct nvram_81xx); 7757 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7758 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 7759 ha->vpd_size = FA_VPD_SIZE_82XX; 7760 7761 /* Get VPD data into cache */ 7762 ha->vpd = ha->nvram + VPD_OFFSET; 7763 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 7764 ha->vpd_size); 7765 7766 /* Get NVRAM data into cache and calculate checksum. */ 7767 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 7768 ha->nvram_size); 7769 dptr = (uint32_t *)nv; 7770 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7771 chksum += le32_to_cpu(*dptr); 7772 7773 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 7774 "Contents of NVRAM:\n"); 7775 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 7776 (uint8_t *)nv, ha->nvram_size); 7777 7778 /* Bad NVRAM data, set defaults parameters. */ 7779 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7780 || nv->id[3] != ' ' || 7781 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7782 /* Reset NVRAM data. */ 7783 ql_log(ql_log_info, vha, 0x0073, 7784 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 7785 "version=0x%x.\n", chksum, nv->id[0], 7786 le16_to_cpu(nv->nvram_version)); 7787 ql_log(ql_log_info, vha, 0x0074, 7788 "Falling back to functioning (yet invalid -- WWPN) " 7789 "defaults.\n"); 7790 7791 /* 7792 * Set default initialization control block. 7793 */ 7794 memset(nv, 0, ha->nvram_size); 7795 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7796 nv->version = cpu_to_le16(ICB_VERSION); 7797 nv->frame_payload_size = 2048; 7798 nv->execution_throttle = cpu_to_le16(0xFFFF); 7799 nv->exchange_count = cpu_to_le16(0); 7800 nv->port_name[0] = 0x21; 7801 nv->port_name[1] = 0x00 + ha->port_no + 1; 7802 nv->port_name[2] = 0x00; 7803 nv->port_name[3] = 0xe0; 7804 nv->port_name[4] = 0x8b; 7805 nv->port_name[5] = 0x1c; 7806 nv->port_name[6] = 0x55; 7807 nv->port_name[7] = 0x86; 7808 nv->node_name[0] = 0x20; 7809 nv->node_name[1] = 0x00; 7810 nv->node_name[2] = 0x00; 7811 nv->node_name[3] = 0xe0; 7812 nv->node_name[4] = 0x8b; 7813 nv->node_name[5] = 0x1c; 7814 nv->node_name[6] = 0x55; 7815 nv->node_name[7] = 0x86; 7816 nv->login_retry_count = cpu_to_le16(8); 7817 nv->interrupt_delay_timer = cpu_to_le16(0); 7818 nv->login_timeout = cpu_to_le16(0); 7819 nv->firmware_options_1 = 7820 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7821 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7822 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7823 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7824 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7825 nv->efi_parameters = cpu_to_le32(0); 7826 nv->reset_delay = 5; 7827 nv->max_luns_per_target = cpu_to_le16(128); 7828 nv->port_down_retry_count = cpu_to_le16(30); 7829 nv->link_down_timeout = cpu_to_le16(180); 7830 nv->enode_mac[0] = 0x00; 7831 nv->enode_mac[1] = 0xC0; 7832 nv->enode_mac[2] = 0xDD; 7833 nv->enode_mac[3] = 0x04; 7834 nv->enode_mac[4] = 0x05; 7835 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 7836 7837 rval = 1; 7838 } 7839 7840 if (IS_T10_PI_CAPABLE(ha)) 7841 nv->frame_payload_size &= ~7; 7842 7843 qlt_81xx_config_nvram_stage1(vha, nv); 7844 7845 /* Reset Initialization control block */ 7846 memset(icb, 0, ha->init_cb_size); 7847 7848 /* Copy 1st segment. */ 7849 dptr1 = (uint8_t *)icb; 7850 dptr2 = (uint8_t *)&nv->version; 7851 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7852 while (cnt--) 7853 *dptr1++ = *dptr2++; 7854 7855 icb->login_retry_count = nv->login_retry_count; 7856 7857 /* Copy 2nd segment. */ 7858 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7859 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7860 cnt = (uint8_t *)&icb->reserved_5 - 7861 (uint8_t *)&icb->interrupt_delay_timer; 7862 while (cnt--) 7863 *dptr1++ = *dptr2++; 7864 7865 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 7866 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 7867 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 7868 icb->enode_mac[0] = 0x00; 7869 icb->enode_mac[1] = 0xC0; 7870 icb->enode_mac[2] = 0xDD; 7871 icb->enode_mac[3] = 0x04; 7872 icb->enode_mac[4] = 0x05; 7873 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 7874 } 7875 7876 /* Use extended-initialization control block. */ 7877 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 7878 7879 /* 7880 * Setup driver NVRAM options. 7881 */ 7882 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7883 "QLE8XXX"); 7884 7885 qlt_81xx_config_nvram_stage2(vha, icb); 7886 7887 /* Use alternate WWN? */ 7888 if (nv->host_p & cpu_to_le32(BIT_15)) { 7889 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7890 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7891 } 7892 7893 /* Prepare nodename */ 7894 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7895 /* 7896 * Firmware will apply the following mask if the nodename was 7897 * not provided. 7898 */ 7899 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7900 icb->node_name[0] &= 0xF0; 7901 } 7902 7903 /* Set host adapter parameters. */ 7904 ha->flags.disable_risc_code_load = 0; 7905 ha->flags.enable_lip_reset = 0; 7906 ha->flags.enable_lip_full_login = 7907 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7908 ha->flags.enable_target_reset = 7909 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7910 ha->flags.enable_led_scheme = 0; 7911 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7912 7913 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7914 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7915 7916 /* save HBA serial number */ 7917 ha->serial0 = icb->port_name[5]; 7918 ha->serial1 = icb->port_name[6]; 7919 ha->serial2 = icb->port_name[7]; 7920 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7921 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7922 7923 icb->execution_throttle = cpu_to_le16(0xFFFF); 7924 7925 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7926 7927 /* Set minimum login_timeout to 4 seconds. */ 7928 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7929 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7930 if (le16_to_cpu(nv->login_timeout) < 4) 7931 nv->login_timeout = cpu_to_le16(4); 7932 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7933 7934 /* Set minimum RATOV to 100 tenths of a second. */ 7935 ha->r_a_tov = 100; 7936 7937 ha->loop_reset_delay = nv->reset_delay; 7938 7939 /* Link Down Timeout = 0: 7940 * 7941 * When Port Down timer expires we will start returning 7942 * I/O's to OS with "DID_NO_CONNECT". 7943 * 7944 * Link Down Timeout != 0: 7945 * 7946 * The driver waits for the link to come up after link down 7947 * before returning I/Os to OS with "DID_NO_CONNECT". 7948 */ 7949 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7950 ha->loop_down_abort_time = 7951 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7952 } else { 7953 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7954 ha->loop_down_abort_time = 7955 (LOOP_DOWN_TIME - ha->link_down_timeout); 7956 } 7957 7958 /* Need enough time to try and get the port back. */ 7959 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7960 if (qlport_down_retry) 7961 ha->port_down_retry_count = qlport_down_retry; 7962 7963 /* Set login_retry_count */ 7964 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7965 if (ha->port_down_retry_count == 7966 le16_to_cpu(nv->port_down_retry_count) && 7967 ha->port_down_retry_count > 3) 7968 ha->login_retry_count = ha->port_down_retry_count; 7969 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7970 ha->login_retry_count = ha->port_down_retry_count; 7971 if (ql2xloginretrycount) 7972 ha->login_retry_count = ql2xloginretrycount; 7973 7974 /* if not running MSI-X we need handshaking on interrupts */ 7975 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 7976 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 7977 7978 /* Enable ZIO. */ 7979 if (!vha->flags.init_done) { 7980 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7981 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7982 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7983 le16_to_cpu(icb->interrupt_delay_timer): 2; 7984 } 7985 icb->firmware_options_2 &= cpu_to_le32( 7986 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7987 vha->flags.process_response_queue = 0; 7988 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7989 ha->zio_mode = QLA_ZIO_MODE_6; 7990 7991 ql_log(ql_log_info, vha, 0x0075, 7992 "ZIO mode %d enabled; timer delay (%d us).\n", 7993 ha->zio_mode, 7994 ha->zio_timer * 100); 7995 7996 icb->firmware_options_2 |= cpu_to_le32( 7997 (uint32_t)ha->zio_mode); 7998 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7999 vha->flags.process_response_queue = 1; 8000 } 8001 8002 /* enable RIDA Format2 */ 8003 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 8004 icb->firmware_options_3 |= BIT_0; 8005 8006 if (IS_QLA27XX(ha)) { 8007 icb->firmware_options_3 |= BIT_8; 8008 ql_dbg(ql_log_info, vha, 0x0075, 8009 "Enabling direct connection.\n"); 8010 } 8011 8012 if (rval) { 8013 ql_log(ql_log_warn, vha, 0x0076, 8014 "NVRAM configuration failed.\n"); 8015 } 8016 return (rval); 8017 } 8018 8019 int 8020 qla82xx_restart_isp(scsi_qla_host_t *vha) 8021 { 8022 int status, rval; 8023 struct qla_hw_data *ha = vha->hw; 8024 struct req_que *req = ha->req_q_map[0]; 8025 struct rsp_que *rsp = ha->rsp_q_map[0]; 8026 struct scsi_qla_host *vp; 8027 unsigned long flags; 8028 8029 status = qla2x00_init_rings(vha); 8030 if (!status) { 8031 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8032 ha->flags.chip_reset_done = 1; 8033 8034 status = qla2x00_fw_ready(vha); 8035 if (!status) { 8036 /* Issue a marker after FW becomes ready. */ 8037 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8038 vha->flags.online = 1; 8039 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8040 } 8041 8042 /* if no cable then assume it's good */ 8043 if ((vha->device_flags & DFLG_NO_CABLE)) 8044 status = 0; 8045 } 8046 8047 if (!status) { 8048 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8049 8050 if (!atomic_read(&vha->loop_down_timer)) { 8051 /* 8052 * Issue marker command only when we are going 8053 * to start the I/O . 8054 */ 8055 vha->marker_needed = 1; 8056 } 8057 8058 ha->isp_ops->enable_intrs(ha); 8059 8060 ha->isp_abort_cnt = 0; 8061 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8062 8063 /* Update the firmware version */ 8064 status = qla82xx_check_md_needed(vha); 8065 8066 if (ha->fce) { 8067 ha->flags.fce_enabled = 1; 8068 memset(ha->fce, 0, 8069 fce_calc_size(ha->fce_bufs)); 8070 rval = qla2x00_enable_fce_trace(vha, 8071 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8072 &ha->fce_bufs); 8073 if (rval) { 8074 ql_log(ql_log_warn, vha, 0x8001, 8075 "Unable to reinitialize FCE (%d).\n", 8076 rval); 8077 ha->flags.fce_enabled = 0; 8078 } 8079 } 8080 8081 if (ha->eft) { 8082 memset(ha->eft, 0, EFT_SIZE); 8083 rval = qla2x00_enable_eft_trace(vha, 8084 ha->eft_dma, EFT_NUM_BUFFERS); 8085 if (rval) { 8086 ql_log(ql_log_warn, vha, 0x8010, 8087 "Unable to reinitialize EFT (%d).\n", 8088 rval); 8089 } 8090 } 8091 } 8092 8093 if (!status) { 8094 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8095 "qla82xx_restart_isp succeeded.\n"); 8096 8097 spin_lock_irqsave(&ha->vport_slock, flags); 8098 list_for_each_entry(vp, &ha->vp_list, list) { 8099 if (vp->vp_idx) { 8100 atomic_inc(&vp->vref_count); 8101 spin_unlock_irqrestore(&ha->vport_slock, flags); 8102 8103 qla2x00_vp_abort_isp(vp); 8104 8105 spin_lock_irqsave(&ha->vport_slock, flags); 8106 atomic_dec(&vp->vref_count); 8107 } 8108 } 8109 spin_unlock_irqrestore(&ha->vport_slock, flags); 8110 8111 } else { 8112 ql_log(ql_log_warn, vha, 0x8016, 8113 "qla82xx_restart_isp **** FAILED ****.\n"); 8114 } 8115 8116 return status; 8117 } 8118 8119 void 8120 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8121 { 8122 struct qla_hw_data *ha = vha->hw; 8123 8124 /* Hold status IOCBs until ABTS response received. */ 8125 if (ql2xfwholdabts) 8126 ha->fw_options[3] |= BIT_12; 8127 8128 /* Set Retry FLOGI in case of P2P connection */ 8129 if (ha->operating_mode == P2P) { 8130 ha->fw_options[2] |= BIT_3; 8131 ql_dbg(ql_dbg_disc, vha, 0x2103, 8132 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8133 __func__, ha->fw_options[2]); 8134 } 8135 8136 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8137 if (ql2xmvasynctoatio) { 8138 if (qla_tgt_mode_enabled(vha) || 8139 qla_dual_mode_enabled(vha)) 8140 ha->fw_options[2] |= BIT_11; 8141 else 8142 ha->fw_options[2] &= ~BIT_11; 8143 } 8144 8145 if (qla_tgt_mode_enabled(vha) || 8146 qla_dual_mode_enabled(vha)) { 8147 /* FW auto send SCSI status during */ 8148 ha->fw_options[1] |= BIT_8; 8149 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8150 8151 /* FW perform Exchange validation */ 8152 ha->fw_options[2] |= BIT_4; 8153 } else { 8154 ha->fw_options[1] &= ~BIT_8; 8155 ha->fw_options[10] &= 0x00ff; 8156 8157 ha->fw_options[2] &= ~BIT_4; 8158 } 8159 8160 if (ql2xetsenable) { 8161 /* Enable ETS Burst. */ 8162 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8163 ha->fw_options[2] |= BIT_9; 8164 } 8165 8166 ql_dbg(ql_dbg_init, vha, 0x00e9, 8167 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8168 __func__, ha->fw_options[1], ha->fw_options[2], 8169 ha->fw_options[3], vha->host->active_mode); 8170 8171 qla2x00_set_fw_options(vha, ha->fw_options); 8172 } 8173 8174 /* 8175 * qla24xx_get_fcp_prio 8176 * Gets the fcp cmd priority value for the logged in port. 8177 * Looks for a match of the port descriptors within 8178 * each of the fcp prio config entries. If a match is found, 8179 * the tag (priority) value is returned. 8180 * 8181 * Input: 8182 * vha = scsi host structure pointer. 8183 * fcport = port structure pointer. 8184 * 8185 * Return: 8186 * non-zero (if found) 8187 * -1 (if not found) 8188 * 8189 * Context: 8190 * Kernel context 8191 */ 8192 static int 8193 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8194 { 8195 int i, entries; 8196 uint8_t pid_match, wwn_match; 8197 int priority; 8198 uint32_t pid1, pid2; 8199 uint64_t wwn1, wwn2; 8200 struct qla_fcp_prio_entry *pri_entry; 8201 struct qla_hw_data *ha = vha->hw; 8202 8203 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8204 return -1; 8205 8206 priority = -1; 8207 entries = ha->fcp_prio_cfg->num_entries; 8208 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8209 8210 for (i = 0; i < entries; i++) { 8211 pid_match = wwn_match = 0; 8212 8213 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8214 pri_entry++; 8215 continue; 8216 } 8217 8218 /* check source pid for a match */ 8219 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8220 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8221 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8222 if (pid1 == INVALID_PORT_ID) 8223 pid_match++; 8224 else if (pid1 == pid2) 8225 pid_match++; 8226 } 8227 8228 /* check destination pid for a match */ 8229 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8230 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8231 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8232 if (pid1 == INVALID_PORT_ID) 8233 pid_match++; 8234 else if (pid1 == pid2) 8235 pid_match++; 8236 } 8237 8238 /* check source WWN for a match */ 8239 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8240 wwn1 = wwn_to_u64(vha->port_name); 8241 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8242 if (wwn2 == (uint64_t)-1) 8243 wwn_match++; 8244 else if (wwn1 == wwn2) 8245 wwn_match++; 8246 } 8247 8248 /* check destination WWN for a match */ 8249 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8250 wwn1 = wwn_to_u64(fcport->port_name); 8251 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8252 if (wwn2 == (uint64_t)-1) 8253 wwn_match++; 8254 else if (wwn1 == wwn2) 8255 wwn_match++; 8256 } 8257 8258 if (pid_match == 2 || wwn_match == 2) { 8259 /* Found a matching entry */ 8260 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8261 priority = pri_entry->tag; 8262 break; 8263 } 8264 8265 pri_entry++; 8266 } 8267 8268 return priority; 8269 } 8270 8271 /* 8272 * qla24xx_update_fcport_fcp_prio 8273 * Activates fcp priority for the logged in fc port 8274 * 8275 * Input: 8276 * vha = scsi host structure pointer. 8277 * fcp = port structure pointer. 8278 * 8279 * Return: 8280 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8281 * 8282 * Context: 8283 * Kernel context. 8284 */ 8285 int 8286 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8287 { 8288 int ret; 8289 int priority; 8290 uint16_t mb[5]; 8291 8292 if (fcport->port_type != FCT_TARGET || 8293 fcport->loop_id == FC_NO_LOOP_ID) 8294 return QLA_FUNCTION_FAILED; 8295 8296 priority = qla24xx_get_fcp_prio(vha, fcport); 8297 if (priority < 0) 8298 return QLA_FUNCTION_FAILED; 8299 8300 if (IS_P3P_TYPE(vha->hw)) { 8301 fcport->fcp_prio = priority & 0xf; 8302 return QLA_SUCCESS; 8303 } 8304 8305 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8306 if (ret == QLA_SUCCESS) { 8307 if (fcport->fcp_prio != priority) 8308 ql_dbg(ql_dbg_user, vha, 0x709e, 8309 "Updated FCP_CMND priority - value=%d loop_id=%d " 8310 "port_id=%02x%02x%02x.\n", priority, 8311 fcport->loop_id, fcport->d_id.b.domain, 8312 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8313 fcport->fcp_prio = priority & 0xf; 8314 } else 8315 ql_dbg(ql_dbg_user, vha, 0x704f, 8316 "Unable to update FCP_CMND priority - ret=0x%x for " 8317 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8318 fcport->d_id.b.domain, fcport->d_id.b.area, 8319 fcport->d_id.b.al_pa); 8320 return ret; 8321 } 8322 8323 /* 8324 * qla24xx_update_all_fcp_prio 8325 * Activates fcp priority for all the logged in ports 8326 * 8327 * Input: 8328 * ha = adapter block pointer. 8329 * 8330 * Return: 8331 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8332 * 8333 * Context: 8334 * Kernel context. 8335 */ 8336 int 8337 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8338 { 8339 int ret; 8340 fc_port_t *fcport; 8341 8342 ret = QLA_FUNCTION_FAILED; 8343 /* We need to set priority for all logged in ports */ 8344 list_for_each_entry(fcport, &vha->vp_fcports, list) 8345 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8346 8347 return ret; 8348 } 8349 8350 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8351 int vp_idx, bool startqp) 8352 { 8353 int rsp_id = 0; 8354 int req_id = 0; 8355 int i; 8356 struct qla_hw_data *ha = vha->hw; 8357 uint16_t qpair_id = 0; 8358 struct qla_qpair *qpair = NULL; 8359 struct qla_msix_entry *msix; 8360 8361 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8362 ql_log(ql_log_warn, vha, 0x00181, 8363 "FW/Driver is not multi-queue capable.\n"); 8364 return NULL; 8365 } 8366 8367 if (ql2xmqsupport || ql2xnvmeenable) { 8368 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8369 if (qpair == NULL) { 8370 ql_log(ql_log_warn, vha, 0x0182, 8371 "Failed to allocate memory for queue pair.\n"); 8372 return NULL; 8373 } 8374 memset(qpair, 0, sizeof(struct qla_qpair)); 8375 8376 qpair->hw = vha->hw; 8377 qpair->vha = vha; 8378 qpair->qp_lock_ptr = &qpair->qp_lock; 8379 spin_lock_init(&qpair->qp_lock); 8380 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8381 8382 /* Assign available que pair id */ 8383 mutex_lock(&ha->mq_lock); 8384 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8385 if (ha->num_qpairs >= ha->max_qpairs) { 8386 mutex_unlock(&ha->mq_lock); 8387 ql_log(ql_log_warn, vha, 0x0183, 8388 "No resources to create additional q pair.\n"); 8389 goto fail_qid_map; 8390 } 8391 ha->num_qpairs++; 8392 set_bit(qpair_id, ha->qpair_qid_map); 8393 ha->queue_pair_map[qpair_id] = qpair; 8394 qpair->id = qpair_id; 8395 qpair->vp_idx = vp_idx; 8396 qpair->fw_started = ha->flags.fw_started; 8397 INIT_LIST_HEAD(&qpair->hints_list); 8398 INIT_LIST_HEAD(&qpair->nvme_done_list); 8399 qpair->chip_reset = ha->base_qpair->chip_reset; 8400 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8401 qpair->enable_explicit_conf = 8402 ha->base_qpair->enable_explicit_conf; 8403 8404 for (i = 0; i < ha->msix_count; i++) { 8405 msix = &ha->msix_entries[i]; 8406 if (msix->in_use) 8407 continue; 8408 qpair->msix = msix; 8409 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8410 "Vector %x selected for qpair\n", msix->vector); 8411 break; 8412 } 8413 if (!qpair->msix) { 8414 ql_log(ql_log_warn, vha, 0x0184, 8415 "Out of MSI-X vectors!.\n"); 8416 goto fail_msix; 8417 } 8418 8419 qpair->msix->in_use = 1; 8420 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8421 qpair->pdev = ha->pdev; 8422 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8423 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8424 8425 mutex_unlock(&ha->mq_lock); 8426 8427 /* Create response queue first */ 8428 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8429 if (!rsp_id) { 8430 ql_log(ql_log_warn, vha, 0x0185, 8431 "Failed to create response queue.\n"); 8432 goto fail_rsp; 8433 } 8434 8435 qpair->rsp = ha->rsp_q_map[rsp_id]; 8436 8437 /* Create request queue */ 8438 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8439 startqp); 8440 if (!req_id) { 8441 ql_log(ql_log_warn, vha, 0x0186, 8442 "Failed to create request queue.\n"); 8443 goto fail_req; 8444 } 8445 8446 qpair->req = ha->req_q_map[req_id]; 8447 qpair->rsp->req = qpair->req; 8448 qpair->rsp->qpair = qpair; 8449 /* init qpair to this cpu. Will adjust at run time. */ 8450 qla_cpu_update(qpair, smp_processor_id()); 8451 8452 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8453 if (ha->fw_attributes & BIT_4) 8454 qpair->difdix_supported = 1; 8455 } 8456 8457 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8458 if (!qpair->srb_mempool) { 8459 ql_log(ql_log_warn, vha, 0xd036, 8460 "Failed to create srb mempool for qpair %d\n", 8461 qpair->id); 8462 goto fail_mempool; 8463 } 8464 8465 /* Mark as online */ 8466 qpair->online = 1; 8467 8468 if (!vha->flags.qpairs_available) 8469 vha->flags.qpairs_available = 1; 8470 8471 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8472 "Request/Response queue pair created, id %d\n", 8473 qpair->id); 8474 ql_dbg(ql_dbg_init, vha, 0x0187, 8475 "Request/Response queue pair created, id %d\n", 8476 qpair->id); 8477 } 8478 return qpair; 8479 8480 fail_mempool: 8481 fail_req: 8482 qla25xx_delete_rsp_que(vha, qpair->rsp); 8483 fail_rsp: 8484 mutex_lock(&ha->mq_lock); 8485 qpair->msix->in_use = 0; 8486 list_del(&qpair->qp_list_elem); 8487 if (list_empty(&vha->qp_list)) 8488 vha->flags.qpairs_available = 0; 8489 fail_msix: 8490 ha->queue_pair_map[qpair_id] = NULL; 8491 clear_bit(qpair_id, ha->qpair_qid_map); 8492 ha->num_qpairs--; 8493 mutex_unlock(&ha->mq_lock); 8494 fail_qid_map: 8495 kfree(qpair); 8496 return NULL; 8497 } 8498 8499 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8500 { 8501 int ret = QLA_FUNCTION_FAILED; 8502 struct qla_hw_data *ha = qpair->hw; 8503 8504 qpair->delete_in_progress = 1; 8505 while (atomic_read(&qpair->ref_count)) 8506 msleep(500); 8507 8508 ret = qla25xx_delete_req_que(vha, qpair->req); 8509 if (ret != QLA_SUCCESS) 8510 goto fail; 8511 8512 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8513 if (ret != QLA_SUCCESS) 8514 goto fail; 8515 8516 mutex_lock(&ha->mq_lock); 8517 ha->queue_pair_map[qpair->id] = NULL; 8518 clear_bit(qpair->id, ha->qpair_qid_map); 8519 ha->num_qpairs--; 8520 list_del(&qpair->qp_list_elem); 8521 if (list_empty(&vha->qp_list)) { 8522 vha->flags.qpairs_available = 0; 8523 vha->flags.qpairs_req_created = 0; 8524 vha->flags.qpairs_rsp_created = 0; 8525 } 8526 mempool_destroy(qpair->srb_mempool); 8527 kfree(qpair); 8528 mutex_unlock(&ha->mq_lock); 8529 8530 return QLA_SUCCESS; 8531 fail: 8532 return ret; 8533 } 8534