1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include "qla_target.h" 21 22 /* 23 * QLogic ISP2x00 Hardware Support Function Prototypes. 24 */ 25 static int qla2x00_isp_firmware(scsi_qla_host_t *); 26 static int qla2x00_setup_chip(scsi_qla_host_t *); 27 static int qla2x00_fw_ready(scsi_qla_host_t *); 28 static int qla2x00_configure_hba(scsi_qla_host_t *); 29 static int qla2x00_configure_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_fabric(scsi_qla_host_t *); 32 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 33 static int qla2x00_restart_isp(scsi_qla_host_t *); 34 35 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 36 static int qla84xx_init_chip(scsi_qla_host_t *); 37 static int qla25xx_init_queues(struct qla_hw_data *); 38 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 39 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 40 struct event_arg *ea); 41 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 42 struct event_arg *); 43 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 44 45 /* SRB Extensions ---------------------------------------------------------- */ 46 47 void 48 qla2x00_sp_timeout(struct timer_list *t) 49 { 50 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 51 struct srb_iocb *iocb; 52 53 WARN_ON(irqs_disabled()); 54 iocb = &sp->u.iocb_cmd; 55 iocb->timeout(sp); 56 } 57 58 void qla2x00_sp_free(srb_t *sp) 59 { 60 struct srb_iocb *iocb = &sp->u.iocb_cmd; 61 62 del_timer(&iocb->timer); 63 qla2x00_rel_sp(sp); 64 } 65 66 /* Asynchronous Login/Logout Routines -------------------------------------- */ 67 68 unsigned long 69 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 70 { 71 unsigned long tmo; 72 struct qla_hw_data *ha = vha->hw; 73 74 /* Firmware should use switch negotiated r_a_tov for timeout. */ 75 tmo = ha->r_a_tov / 10 * 2; 76 if (IS_QLAFX00(ha)) { 77 tmo = FX00_DEF_RATOV * 2; 78 } else if (!IS_FWI2_CAPABLE(ha)) { 79 /* 80 * Except for earlier ISPs where the timeout is seeded from the 81 * initialization control block. 82 */ 83 tmo = ha->login_timeout; 84 } 85 return tmo; 86 } 87 88 static void qla24xx_abort_iocb_timeout(void *data) 89 { 90 srb_t *sp = data; 91 struct srb_iocb *abt = &sp->u.iocb_cmd; 92 struct qla_qpair *qpair = sp->qpair; 93 u32 handle; 94 unsigned long flags; 95 96 if (sp->cmd_sp) 97 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 98 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 99 sp->cmd_sp->handle, sp->cmd_sp->type, 100 sp->handle, sp->type); 101 else 102 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 103 "Abort timeout 2 - hdl=%x, type=%x\n", 104 sp->handle, sp->type); 105 106 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 107 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 108 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 109 sp->cmd_sp)) 110 qpair->req->outstanding_cmds[handle] = NULL; 111 112 /* removing the abort */ 113 if (qpair->req->outstanding_cmds[handle] == sp) { 114 qpair->req->outstanding_cmds[handle] = NULL; 115 break; 116 } 117 } 118 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 119 120 if (sp->cmd_sp) 121 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 122 123 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT); 124 sp->done(sp, QLA_OS_TIMER_EXPIRED); 125 } 126 127 static void qla24xx_abort_sp_done(srb_t *sp, int res) 128 { 129 struct srb_iocb *abt = &sp->u.iocb_cmd; 130 131 del_timer(&sp->u.iocb_cmd.timer); 132 if (sp->flags & SRB_WAKEUP_ON_COMP) 133 complete(&abt->u.abt.comp); 134 else 135 sp->free(sp); 136 } 137 138 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 139 { 140 scsi_qla_host_t *vha = cmd_sp->vha; 141 struct srb_iocb *abt_iocb; 142 srb_t *sp; 143 int rval = QLA_FUNCTION_FAILED; 144 145 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 146 GFP_ATOMIC); 147 if (!sp) 148 return rval; 149 150 abt_iocb = &sp->u.iocb_cmd; 151 sp->type = SRB_ABT_CMD; 152 sp->name = "abort"; 153 sp->qpair = cmd_sp->qpair; 154 sp->cmd_sp = cmd_sp; 155 if (wait) 156 sp->flags = SRB_WAKEUP_ON_COMP; 157 158 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 159 init_completion(&abt_iocb->u.abt.comp); 160 /* FW can send 2 x ABTS's timeout/20s */ 161 qla2x00_init_timer(sp, 42); 162 163 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 164 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 165 166 sp->done = qla24xx_abort_sp_done; 167 168 ql_dbg(ql_dbg_async, vha, 0x507c, 169 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 170 cmd_sp->type); 171 172 rval = qla2x00_start_sp(sp); 173 if (rval != QLA_SUCCESS) { 174 sp->free(sp); 175 return rval; 176 } 177 178 if (wait) { 179 wait_for_completion(&abt_iocb->u.abt.comp); 180 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 181 QLA_SUCCESS : QLA_FUNCTION_FAILED; 182 sp->free(sp); 183 } 184 185 return rval; 186 } 187 188 void 189 qla2x00_async_iocb_timeout(void *data) 190 { 191 srb_t *sp = data; 192 fc_port_t *fcport = sp->fcport; 193 struct srb_iocb *lio = &sp->u.iocb_cmd; 194 int rc, h; 195 unsigned long flags; 196 197 if (fcport) { 198 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 199 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 200 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 201 202 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 203 } else { 204 pr_info("Async-%s timeout - hdl=%x.\n", 205 sp->name, sp->handle); 206 } 207 208 switch (sp->type) { 209 case SRB_LOGIN_CMD: 210 rc = qla24xx_async_abort_cmd(sp, false); 211 if (rc) { 212 /* Retry as needed. */ 213 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 214 lio->u.logio.data[1] = 215 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 216 QLA_LOGIO_LOGIN_RETRIED : 0; 217 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 218 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 219 h++) { 220 if (sp->qpair->req->outstanding_cmds[h] == 221 sp) { 222 sp->qpair->req->outstanding_cmds[h] = 223 NULL; 224 break; 225 } 226 } 227 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 228 sp->done(sp, QLA_FUNCTION_TIMEOUT); 229 } 230 break; 231 case SRB_LOGOUT_CMD: 232 case SRB_CT_PTHRU_CMD: 233 case SRB_MB_IOCB: 234 case SRB_NACK_PLOGI: 235 case SRB_NACK_PRLI: 236 case SRB_NACK_LOGO: 237 case SRB_CTRL_VP: 238 default: 239 rc = qla24xx_async_abort_cmd(sp, false); 240 if (rc) { 241 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 242 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 243 h++) { 244 if (sp->qpair->req->outstanding_cmds[h] == 245 sp) { 246 sp->qpair->req->outstanding_cmds[h] = 247 NULL; 248 break; 249 } 250 } 251 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 252 sp->done(sp, QLA_FUNCTION_TIMEOUT); 253 } 254 break; 255 } 256 } 257 258 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 259 { 260 struct scsi_qla_host *vha = sp->vha; 261 struct srb_iocb *lio = &sp->u.iocb_cmd; 262 struct event_arg ea; 263 264 ql_dbg(ql_dbg_disc, vha, 0x20dd, 265 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 266 267 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 268 269 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 270 memset(&ea, 0, sizeof(ea)); 271 ea.fcport = sp->fcport; 272 ea.data[0] = lio->u.logio.data[0]; 273 ea.data[1] = lio->u.logio.data[1]; 274 ea.iop[0] = lio->u.logio.iop[0]; 275 ea.iop[1] = lio->u.logio.iop[1]; 276 ea.sp = sp; 277 qla24xx_handle_plogi_done_event(vha, &ea); 278 } 279 280 sp->free(sp); 281 } 282 283 static inline bool 284 fcport_is_smaller(fc_port_t *fcport) 285 { 286 if (wwn_to_u64(fcport->port_name) < 287 wwn_to_u64(fcport->vha->port_name)) 288 return true; 289 else 290 return false; 291 } 292 293 static inline bool 294 fcport_is_bigger(fc_port_t *fcport) 295 { 296 return !fcport_is_smaller(fcport); 297 } 298 299 int 300 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 301 uint16_t *data) 302 { 303 srb_t *sp; 304 struct srb_iocb *lio; 305 int rval = QLA_FUNCTION_FAILED; 306 307 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 308 fcport->loop_id == FC_NO_LOOP_ID) { 309 ql_log(ql_log_warn, vha, 0xffff, 310 "%s: %8phC - not sending command.\n", 311 __func__, fcport->port_name); 312 return rval; 313 } 314 315 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 316 if (!sp) 317 goto done; 318 319 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 320 fcport->flags |= FCF_ASYNC_SENT; 321 fcport->logout_completed = 0; 322 323 sp->type = SRB_LOGIN_CMD; 324 sp->name = "login"; 325 sp->gen1 = fcport->rscn_gen; 326 sp->gen2 = fcport->login_gen; 327 328 lio = &sp->u.iocb_cmd; 329 lio->timeout = qla2x00_async_iocb_timeout; 330 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 331 332 sp->done = qla2x00_async_login_sp_done; 333 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) 334 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 335 else 336 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 337 338 if (NVME_TARGET(vha->hw, fcport)) 339 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 340 341 ql_dbg(ql_dbg_disc, vha, 0x2072, 342 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 343 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 344 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 345 fcport->login_retry); 346 347 rval = qla2x00_start_sp(sp); 348 if (rval != QLA_SUCCESS) { 349 fcport->flags |= FCF_LOGIN_NEEDED; 350 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 351 goto done_free_sp; 352 } 353 354 return rval; 355 356 done_free_sp: 357 sp->free(sp); 358 fcport->flags &= ~FCF_ASYNC_SENT; 359 done: 360 fcport->flags &= ~FCF_ASYNC_ACTIVE; 361 return rval; 362 } 363 364 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 365 { 366 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 367 sp->fcport->login_gen++; 368 qlt_logo_completion_handler(sp->fcport, res); 369 sp->free(sp); 370 } 371 372 int 373 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 374 { 375 srb_t *sp; 376 struct srb_iocb *lio; 377 int rval = QLA_FUNCTION_FAILED; 378 379 fcport->flags |= FCF_ASYNC_SENT; 380 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 381 if (!sp) 382 goto done; 383 384 sp->type = SRB_LOGOUT_CMD; 385 sp->name = "logout"; 386 387 lio = &sp->u.iocb_cmd; 388 lio->timeout = qla2x00_async_iocb_timeout; 389 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 390 391 sp->done = qla2x00_async_logout_sp_done; 392 393 ql_dbg(ql_dbg_disc, vha, 0x2070, 394 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 395 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 396 fcport->d_id.b.area, fcport->d_id.b.al_pa, 397 fcport->port_name); 398 399 rval = qla2x00_start_sp(sp); 400 if (rval != QLA_SUCCESS) 401 goto done_free_sp; 402 return rval; 403 404 done_free_sp: 405 sp->free(sp); 406 done: 407 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 408 return rval; 409 } 410 411 void 412 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 413 uint16_t *data) 414 { 415 fcport->flags &= ~FCF_ASYNC_ACTIVE; 416 /* Don't re-login in target mode */ 417 if (!fcport->tgt_session) 418 qla2x00_mark_device_lost(vha, fcport, 1); 419 qlt_logo_completion_handler(fcport, data[0]); 420 } 421 422 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 423 { 424 struct srb_iocb *lio = &sp->u.iocb_cmd; 425 struct scsi_qla_host *vha = sp->vha; 426 427 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 428 if (!test_bit(UNLOADING, &vha->dpc_flags)) 429 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 430 lio->u.logio.data); 431 sp->free(sp); 432 } 433 434 int 435 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 436 { 437 srb_t *sp; 438 struct srb_iocb *lio; 439 int rval; 440 441 rval = QLA_FUNCTION_FAILED; 442 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 443 if (!sp) 444 goto done; 445 446 sp->type = SRB_PRLO_CMD; 447 sp->name = "prlo"; 448 449 lio = &sp->u.iocb_cmd; 450 lio->timeout = qla2x00_async_iocb_timeout; 451 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 452 453 sp->done = qla2x00_async_prlo_sp_done; 454 455 ql_dbg(ql_dbg_disc, vha, 0x2070, 456 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 457 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 458 fcport->d_id.b.area, fcport->d_id.b.al_pa); 459 460 rval = qla2x00_start_sp(sp); 461 if (rval != QLA_SUCCESS) 462 goto done_free_sp; 463 464 return rval; 465 466 done_free_sp: 467 sp->free(sp); 468 done: 469 fcport->flags &= ~FCF_ASYNC_ACTIVE; 470 return rval; 471 } 472 473 static 474 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 475 { 476 struct fc_port *fcport = ea->fcport; 477 478 ql_dbg(ql_dbg_disc, vha, 0x20d2, 479 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 480 __func__, fcport->port_name, fcport->disc_state, 481 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 482 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 483 484 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 485 ea->data[0]); 486 487 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 488 ql_dbg(ql_dbg_disc, vha, 0x2066, 489 "%s %8phC: adisc fail: post delete\n", 490 __func__, ea->fcport->port_name); 491 /* deleted = 0 & logout_on_delete = force fw cleanup */ 492 fcport->deleted = 0; 493 fcport->logout_on_delete = 1; 494 qlt_schedule_sess_for_deletion(ea->fcport); 495 return; 496 } 497 498 if (ea->fcport->disc_state == DSC_DELETE_PEND) 499 return; 500 501 if (ea->sp->gen2 != ea->fcport->login_gen) { 502 /* target side must have changed it. */ 503 ql_dbg(ql_dbg_disc, vha, 0x20d3, 504 "%s %8phC generation changed\n", 505 __func__, ea->fcport->port_name); 506 return; 507 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 508 qla_rscn_replay(fcport); 509 qlt_schedule_sess_for_deletion(fcport); 510 return; 511 } 512 513 __qla24xx_handle_gpdb_event(vha, ea); 514 } 515 516 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 517 { 518 struct qla_work_evt *e; 519 520 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 521 if (!e) 522 return QLA_FUNCTION_FAILED; 523 524 e->u.fcport.fcport = fcport; 525 fcport->flags |= FCF_ASYNC_ACTIVE; 526 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 527 return qla2x00_post_work(vha, e); 528 } 529 530 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 531 { 532 struct scsi_qla_host *vha = sp->vha; 533 struct event_arg ea; 534 struct srb_iocb *lio = &sp->u.iocb_cmd; 535 536 ql_dbg(ql_dbg_disc, vha, 0x2066, 537 "Async done-%s res %x %8phC\n", 538 sp->name, res, sp->fcport->port_name); 539 540 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 541 542 memset(&ea, 0, sizeof(ea)); 543 ea.rc = res; 544 ea.data[0] = lio->u.logio.data[0]; 545 ea.data[1] = lio->u.logio.data[1]; 546 ea.iop[0] = lio->u.logio.iop[0]; 547 ea.iop[1] = lio->u.logio.iop[1]; 548 ea.fcport = sp->fcport; 549 ea.sp = sp; 550 551 qla24xx_handle_adisc_event(vha, &ea); 552 553 sp->free(sp); 554 } 555 556 int 557 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 558 uint16_t *data) 559 { 560 srb_t *sp; 561 struct srb_iocb *lio; 562 int rval = QLA_FUNCTION_FAILED; 563 564 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 565 return rval; 566 567 fcport->flags |= FCF_ASYNC_SENT; 568 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 569 if (!sp) 570 goto done; 571 572 sp->type = SRB_ADISC_CMD; 573 sp->name = "adisc"; 574 575 lio = &sp->u.iocb_cmd; 576 lio->timeout = qla2x00_async_iocb_timeout; 577 sp->gen1 = fcport->rscn_gen; 578 sp->gen2 = fcport->login_gen; 579 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 580 581 sp->done = qla2x00_async_adisc_sp_done; 582 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 583 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 584 585 ql_dbg(ql_dbg_disc, vha, 0x206f, 586 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 587 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 588 589 rval = qla2x00_start_sp(sp); 590 if (rval != QLA_SUCCESS) 591 goto done_free_sp; 592 593 return rval; 594 595 done_free_sp: 596 sp->free(sp); 597 done: 598 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 599 qla2x00_post_async_adisc_work(vha, fcport, data); 600 return rval; 601 } 602 603 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 604 { 605 struct qla_hw_data *ha = vha->hw; 606 607 if (IS_FWI2_CAPABLE(ha)) 608 return loop_id > NPH_LAST_HANDLE; 609 610 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 611 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 612 } 613 614 /** 615 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 616 * @vha: adapter state pointer. 617 * @dev: port structure pointer. 618 * 619 * Returns: 620 * qla2x00 local function return status code. 621 * 622 * Context: 623 * Kernel context. 624 */ 625 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 626 { 627 int rval; 628 struct qla_hw_data *ha = vha->hw; 629 unsigned long flags = 0; 630 631 rval = QLA_SUCCESS; 632 633 spin_lock_irqsave(&ha->vport_slock, flags); 634 635 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 636 if (dev->loop_id >= LOOPID_MAP_SIZE || 637 qla2x00_is_reserved_id(vha, dev->loop_id)) { 638 dev->loop_id = FC_NO_LOOP_ID; 639 rval = QLA_FUNCTION_FAILED; 640 } else { 641 set_bit(dev->loop_id, ha->loop_id_map); 642 } 643 spin_unlock_irqrestore(&ha->vport_slock, flags); 644 645 if (rval == QLA_SUCCESS) 646 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 647 "Assigning new loopid=%x, portid=%x.\n", 648 dev->loop_id, dev->d_id.b24); 649 else 650 ql_log(ql_log_warn, dev->vha, 0x2087, 651 "No loop_id's available, portid=%x.\n", 652 dev->d_id.b24); 653 654 return rval; 655 } 656 657 void qla2x00_clear_loop_id(fc_port_t *fcport) 658 { 659 struct qla_hw_data *ha = fcport->vha->hw; 660 661 if (fcport->loop_id == FC_NO_LOOP_ID || 662 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 663 return; 664 665 clear_bit(fcport->loop_id, ha->loop_id_map); 666 fcport->loop_id = FC_NO_LOOP_ID; 667 } 668 669 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 670 struct event_arg *ea) 671 { 672 fc_port_t *fcport, *conflict_fcport; 673 struct get_name_list_extended *e; 674 u16 i, n, found = 0, loop_id; 675 port_id_t id; 676 u64 wwn; 677 u16 data[2]; 678 u8 current_login_state, nvme_cls; 679 680 fcport = ea->fcport; 681 ql_dbg(ql_dbg_disc, vha, 0xffff, 682 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 683 __func__, fcport->port_name, fcport->disc_state, 684 fcport->fw_login_state, ea->rc, 685 fcport->login_gen, fcport->last_login_gen, 686 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 687 688 if (fcport->disc_state == DSC_DELETE_PEND) 689 return; 690 691 if (ea->rc) { /* rval */ 692 if (fcport->login_retry == 0) { 693 ql_dbg(ql_dbg_disc, vha, 0x20de, 694 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 695 fcport->port_name, fcport->login_retry); 696 } 697 return; 698 } 699 700 if (fcport->last_rscn_gen != fcport->rscn_gen) { 701 qla_rscn_replay(fcport); 702 qlt_schedule_sess_for_deletion(fcport); 703 return; 704 } else if (fcport->last_login_gen != fcport->login_gen) { 705 ql_dbg(ql_dbg_disc, vha, 0x20e0, 706 "%s %8phC login gen changed\n", 707 __func__, fcport->port_name); 708 return; 709 } 710 711 n = ea->data[0] / sizeof(struct get_name_list_extended); 712 713 ql_dbg(ql_dbg_disc, vha, 0x20e1, 714 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 715 __func__, __LINE__, fcport->port_name, n, 716 fcport->d_id.b.domain, fcport->d_id.b.area, 717 fcport->d_id.b.al_pa, fcport->loop_id); 718 719 for (i = 0; i < n; i++) { 720 e = &vha->gnl.l[i]; 721 wwn = wwn_to_u64(e->port_name); 722 id.b.domain = e->port_id[2]; 723 id.b.area = e->port_id[1]; 724 id.b.al_pa = e->port_id[0]; 725 id.b.rsvd_1 = 0; 726 727 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 728 continue; 729 730 if (IS_SW_RESV_ADDR(id)) 731 continue; 732 733 found = 1; 734 735 loop_id = le16_to_cpu(e->nport_handle); 736 loop_id = (loop_id & 0x7fff); 737 nvme_cls = e->current_login_state >> 4; 738 current_login_state = e->current_login_state & 0xf; 739 740 if (PRLI_PHASE(nvme_cls)) { 741 current_login_state = nvme_cls; 742 fcport->fc4_type &= ~FS_FC4TYPE_FCP; 743 fcport->fc4_type |= FS_FC4TYPE_NVME; 744 } else if (PRLI_PHASE(current_login_state)) { 745 fcport->fc4_type |= FS_FC4TYPE_FCP; 746 fcport->fc4_type &= ~FS_FC4TYPE_NVME; 747 } 748 749 ql_dbg(ql_dbg_disc, vha, 0x20e2, 750 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 751 __func__, fcport->port_name, 752 e->current_login_state, fcport->fw_login_state, 753 fcport->fc4_type, id.b24, fcport->d_id.b24, 754 loop_id, fcport->loop_id); 755 756 switch (fcport->disc_state) { 757 case DSC_DELETE_PEND: 758 case DSC_DELETED: 759 break; 760 default: 761 if ((id.b24 != fcport->d_id.b24 && 762 fcport->d_id.b24 && 763 fcport->loop_id != FC_NO_LOOP_ID) || 764 (fcport->loop_id != FC_NO_LOOP_ID && 765 fcport->loop_id != loop_id)) { 766 ql_dbg(ql_dbg_disc, vha, 0x20e3, 767 "%s %d %8phC post del sess\n", 768 __func__, __LINE__, fcport->port_name); 769 if (fcport->n2n_flag) 770 fcport->d_id.b24 = 0; 771 qlt_schedule_sess_for_deletion(fcport); 772 return; 773 } 774 break; 775 } 776 777 fcport->loop_id = loop_id; 778 if (fcport->n2n_flag) 779 fcport->d_id.b24 = id.b24; 780 781 wwn = wwn_to_u64(fcport->port_name); 782 qlt_find_sess_invalidate_other(vha, wwn, 783 id, loop_id, &conflict_fcport); 784 785 if (conflict_fcport) { 786 /* 787 * Another share fcport share the same loop_id & 788 * nport id. Conflict fcport needs to finish 789 * cleanup before this fcport can proceed to login. 790 */ 791 conflict_fcport->conflict = fcport; 792 fcport->login_pause = 1; 793 } 794 795 switch (vha->hw->current_topology) { 796 default: 797 switch (current_login_state) { 798 case DSC_LS_PRLI_COMP: 799 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 800 vha, 0x20e4, "%s %d %8phC post gpdb\n", 801 __func__, __LINE__, fcport->port_name); 802 803 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 804 fcport->port_type = FCT_INITIATOR; 805 else 806 fcport->port_type = FCT_TARGET; 807 data[0] = data[1] = 0; 808 qla2x00_post_async_adisc_work(vha, fcport, 809 data); 810 break; 811 case DSC_LS_PORT_UNAVAIL: 812 default: 813 if (fcport->loop_id == FC_NO_LOOP_ID) { 814 qla2x00_find_new_loop_id(vha, fcport); 815 fcport->fw_login_state = 816 DSC_LS_PORT_UNAVAIL; 817 } 818 ql_dbg(ql_dbg_disc, vha, 0x20e5, 819 "%s %d %8phC\n", __func__, __LINE__, 820 fcport->port_name); 821 qla24xx_fcport_handle_login(vha, fcport); 822 break; 823 } 824 break; 825 case ISP_CFG_N: 826 fcport->fw_login_state = current_login_state; 827 fcport->d_id = id; 828 switch (current_login_state) { 829 case DSC_LS_PRLI_PEND: 830 /* 831 * In the middle of PRLI. Let it finish. 832 * Allow relogin code to recheck state again 833 * with GNL. Push disc_state back to DELETED 834 * so GNL can go out again 835 */ 836 qla2x00_set_fcport_disc_state(fcport, 837 DSC_DELETED); 838 break; 839 case DSC_LS_PRLI_COMP: 840 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 841 fcport->port_type = FCT_INITIATOR; 842 else 843 fcport->port_type = FCT_TARGET; 844 845 data[0] = data[1] = 0; 846 qla2x00_post_async_adisc_work(vha, fcport, 847 data); 848 break; 849 case DSC_LS_PLOGI_COMP: 850 if (fcport_is_bigger(fcport)) { 851 /* local adapter is smaller */ 852 if (fcport->loop_id != FC_NO_LOOP_ID) 853 qla2x00_clear_loop_id(fcport); 854 855 fcport->loop_id = loop_id; 856 qla24xx_fcport_handle_login(vha, 857 fcport); 858 break; 859 } 860 fallthrough; 861 default: 862 if (fcport_is_smaller(fcport)) { 863 /* local adapter is bigger */ 864 if (fcport->loop_id != FC_NO_LOOP_ID) 865 qla2x00_clear_loop_id(fcport); 866 867 fcport->loop_id = loop_id; 868 qla24xx_fcport_handle_login(vha, 869 fcport); 870 } 871 break; 872 } 873 break; 874 } /* switch (ha->current_topology) */ 875 } 876 877 if (!found) { 878 switch (vha->hw->current_topology) { 879 case ISP_CFG_F: 880 case ISP_CFG_FL: 881 for (i = 0; i < n; i++) { 882 e = &vha->gnl.l[i]; 883 id.b.domain = e->port_id[0]; 884 id.b.area = e->port_id[1]; 885 id.b.al_pa = e->port_id[2]; 886 id.b.rsvd_1 = 0; 887 loop_id = le16_to_cpu(e->nport_handle); 888 889 if (fcport->d_id.b24 == id.b24) { 890 conflict_fcport = 891 qla2x00_find_fcport_by_wwpn(vha, 892 e->port_name, 0); 893 if (conflict_fcport) { 894 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 895 vha, 0x20e5, 896 "%s %d %8phC post del sess\n", 897 __func__, __LINE__, 898 conflict_fcport->port_name); 899 qlt_schedule_sess_for_deletion 900 (conflict_fcport); 901 } 902 } 903 /* 904 * FW already picked this loop id for 905 * another fcport 906 */ 907 if (fcport->loop_id == loop_id) 908 fcport->loop_id = FC_NO_LOOP_ID; 909 } 910 qla24xx_fcport_handle_login(vha, fcport); 911 break; 912 case ISP_CFG_N: 913 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 914 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 915 if (fcport->n2n_link_reset_cnt < 2) { 916 fcport->n2n_link_reset_cnt++; 917 /* 918 * remote port is not sending PLOGI. 919 * Reset link to kick start his state 920 * machine 921 */ 922 set_bit(N2N_LINK_RESET, 923 &vha->dpc_flags); 924 } else { 925 if (fcport->n2n_chip_reset < 1) { 926 ql_log(ql_log_info, vha, 0x705d, 927 "Chip reset to bring laser down"); 928 set_bit(ISP_ABORT_NEEDED, 929 &vha->dpc_flags); 930 fcport->n2n_chip_reset++; 931 } else { 932 ql_log(ql_log_info, vha, 0x705d, 933 "Remote port %8ph is not coming back\n", 934 fcport->port_name); 935 fcport->scan_state = 0; 936 } 937 } 938 qla2xxx_wake_dpc(vha); 939 } else { 940 /* 941 * report port suppose to do PLOGI. Give him 942 * more time. FW will catch it. 943 */ 944 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 945 } 946 break; 947 default: 948 break; 949 } 950 } 951 } /* gnl_event */ 952 953 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 954 { 955 struct scsi_qla_host *vha = sp->vha; 956 unsigned long flags; 957 struct fc_port *fcport = NULL, *tf; 958 u16 i, n = 0, loop_id; 959 struct event_arg ea; 960 struct get_name_list_extended *e; 961 u64 wwn; 962 struct list_head h; 963 bool found = false; 964 965 ql_dbg(ql_dbg_disc, vha, 0x20e7, 966 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 967 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 968 sp->u.iocb_cmd.u.mbx.in_mb[2]); 969 970 if (res == QLA_FUNCTION_TIMEOUT) 971 return; 972 973 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 974 memset(&ea, 0, sizeof(ea)); 975 ea.sp = sp; 976 ea.rc = res; 977 978 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 979 sizeof(struct get_name_list_extended)) { 980 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 981 sizeof(struct get_name_list_extended); 982 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 983 } 984 985 for (i = 0; i < n; i++) { 986 e = &vha->gnl.l[i]; 987 loop_id = le16_to_cpu(e->nport_handle); 988 /* mask out reserve bit */ 989 loop_id = (loop_id & 0x7fff); 990 set_bit(loop_id, vha->hw->loop_id_map); 991 wwn = wwn_to_u64(e->port_name); 992 993 ql_dbg(ql_dbg_disc, vha, 0x20e8, 994 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 995 __func__, &wwn, e->port_id[2], e->port_id[1], 996 e->port_id[0], e->current_login_state, e->last_login_state, 997 (loop_id & 0x7fff)); 998 } 999 1000 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1001 1002 INIT_LIST_HEAD(&h); 1003 fcport = tf = NULL; 1004 if (!list_empty(&vha->gnl.fcports)) 1005 list_splice_init(&vha->gnl.fcports, &h); 1006 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1007 1008 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1009 list_del_init(&fcport->gnl_entry); 1010 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1011 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1012 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1013 ea.fcport = fcport; 1014 1015 qla24xx_handle_gnl_done_event(vha, &ea); 1016 } 1017 1018 /* create new fcport if fw has knowledge of new sessions */ 1019 for (i = 0; i < n; i++) { 1020 port_id_t id; 1021 u64 wwnn; 1022 1023 e = &vha->gnl.l[i]; 1024 wwn = wwn_to_u64(e->port_name); 1025 1026 found = false; 1027 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1028 if (!memcmp((u8 *)&wwn, fcport->port_name, 1029 WWN_SIZE)) { 1030 found = true; 1031 break; 1032 } 1033 } 1034 1035 id.b.domain = e->port_id[2]; 1036 id.b.area = e->port_id[1]; 1037 id.b.al_pa = e->port_id[0]; 1038 id.b.rsvd_1 = 0; 1039 1040 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1041 ql_dbg(ql_dbg_disc, vha, 0x2065, 1042 "%s %d %8phC %06x post new sess\n", 1043 __func__, __LINE__, (u8 *)&wwn, id.b24); 1044 wwnn = wwn_to_u64(e->node_name); 1045 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1046 (u8 *)&wwnn, NULL, 0); 1047 } 1048 } 1049 1050 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1051 vha->gnl.sent = 0; 1052 if (!list_empty(&vha->gnl.fcports)) { 1053 /* retrigger gnl */ 1054 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports, 1055 gnl_entry) { 1056 list_del_init(&fcport->gnl_entry); 1057 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1058 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS) 1059 break; 1060 } 1061 } 1062 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1063 1064 sp->free(sp); 1065 } 1066 1067 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1068 { 1069 srb_t *sp; 1070 struct srb_iocb *mbx; 1071 int rval = QLA_FUNCTION_FAILED; 1072 unsigned long flags; 1073 u16 *mb; 1074 1075 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1076 return rval; 1077 1078 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1079 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1080 1081 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1082 fcport->flags |= FCF_ASYNC_SENT; 1083 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1084 fcport->last_rscn_gen = fcport->rscn_gen; 1085 fcport->last_login_gen = fcport->login_gen; 1086 1087 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1088 if (vha->gnl.sent) { 1089 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1090 return QLA_SUCCESS; 1091 } 1092 vha->gnl.sent = 1; 1093 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1094 1095 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1096 if (!sp) 1097 goto done; 1098 1099 sp->type = SRB_MB_IOCB; 1100 sp->name = "gnlist"; 1101 sp->gen1 = fcport->rscn_gen; 1102 sp->gen2 = fcport->login_gen; 1103 1104 mbx = &sp->u.iocb_cmd; 1105 mbx->timeout = qla2x00_async_iocb_timeout; 1106 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 1107 1108 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1109 mb[0] = MBC_PORT_NODE_NAME_LIST; 1110 mb[1] = BIT_2 | BIT_3; 1111 mb[2] = MSW(vha->gnl.ldma); 1112 mb[3] = LSW(vha->gnl.ldma); 1113 mb[6] = MSW(MSD(vha->gnl.ldma)); 1114 mb[7] = LSW(MSD(vha->gnl.ldma)); 1115 mb[8] = vha->gnl.size; 1116 mb[9] = vha->vp_idx; 1117 1118 sp->done = qla24xx_async_gnl_sp_done; 1119 1120 ql_dbg(ql_dbg_disc, vha, 0x20da, 1121 "Async-%s - OUT WWPN %8phC hndl %x\n", 1122 sp->name, fcport->port_name, sp->handle); 1123 1124 rval = qla2x00_start_sp(sp); 1125 if (rval != QLA_SUCCESS) 1126 goto done_free_sp; 1127 1128 return rval; 1129 1130 done_free_sp: 1131 sp->free(sp); 1132 done: 1133 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT); 1134 return rval; 1135 } 1136 1137 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1138 { 1139 struct qla_work_evt *e; 1140 1141 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1142 if (!e) 1143 return QLA_FUNCTION_FAILED; 1144 1145 e->u.fcport.fcport = fcport; 1146 fcport->flags |= FCF_ASYNC_ACTIVE; 1147 return qla2x00_post_work(vha, e); 1148 } 1149 1150 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1151 { 1152 struct scsi_qla_host *vha = sp->vha; 1153 struct qla_hw_data *ha = vha->hw; 1154 fc_port_t *fcport = sp->fcport; 1155 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1156 struct event_arg ea; 1157 1158 ql_dbg(ql_dbg_disc, vha, 0x20db, 1159 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1160 sp->name, res, fcport->port_name, mb[1], mb[2]); 1161 1162 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1163 1164 if (res == QLA_FUNCTION_TIMEOUT) 1165 goto done; 1166 1167 memset(&ea, 0, sizeof(ea)); 1168 ea.fcport = fcport; 1169 ea.sp = sp; 1170 1171 qla24xx_handle_gpdb_event(vha, &ea); 1172 1173 done: 1174 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1175 sp->u.iocb_cmd.u.mbx.in_dma); 1176 1177 sp->free(sp); 1178 } 1179 1180 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1181 { 1182 struct qla_work_evt *e; 1183 1184 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1185 if (!e) 1186 return QLA_FUNCTION_FAILED; 1187 1188 e->u.fcport.fcport = fcport; 1189 1190 return qla2x00_post_work(vha, e); 1191 } 1192 1193 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1194 { 1195 struct scsi_qla_host *vha = sp->vha; 1196 struct srb_iocb *lio = &sp->u.iocb_cmd; 1197 struct event_arg ea; 1198 1199 ql_dbg(ql_dbg_disc, vha, 0x2129, 1200 "%s %8phC res %d \n", __func__, 1201 sp->fcport->port_name, res); 1202 1203 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1204 1205 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1206 memset(&ea, 0, sizeof(ea)); 1207 ea.fcport = sp->fcport; 1208 ea.data[0] = lio->u.logio.data[0]; 1209 ea.data[1] = lio->u.logio.data[1]; 1210 ea.iop[0] = lio->u.logio.iop[0]; 1211 ea.iop[1] = lio->u.logio.iop[1]; 1212 ea.sp = sp; 1213 1214 qla24xx_handle_prli_done_event(vha, &ea); 1215 } 1216 1217 sp->free(sp); 1218 } 1219 1220 int 1221 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1222 { 1223 srb_t *sp; 1224 struct srb_iocb *lio; 1225 int rval = QLA_FUNCTION_FAILED; 1226 1227 if (!vha->flags.online) { 1228 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1229 __func__, __LINE__, fcport->port_name); 1230 return rval; 1231 } 1232 1233 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1234 fcport->fw_login_state == DSC_LS_PRLI_PEND) && 1235 qla_dual_mode_enabled(vha)) { 1236 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1237 __func__, __LINE__, fcport->port_name); 1238 return rval; 1239 } 1240 1241 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1242 if (!sp) 1243 return rval; 1244 1245 fcport->flags |= FCF_ASYNC_SENT; 1246 fcport->logout_completed = 0; 1247 1248 sp->type = SRB_PRLI_CMD; 1249 sp->name = "prli"; 1250 1251 lio = &sp->u.iocb_cmd; 1252 lio->timeout = qla2x00_async_iocb_timeout; 1253 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1254 1255 sp->done = qla2x00_async_prli_sp_done; 1256 lio->u.logio.flags = 0; 1257 1258 if (NVME_TARGET(vha->hw, fcport)) 1259 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1260 1261 ql_dbg(ql_dbg_disc, vha, 0x211b, 1262 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 1263 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1264 fcport->login_retry, NVME_TARGET(vha->hw, fcport) ? "nvme" : "fc"); 1265 1266 rval = qla2x00_start_sp(sp); 1267 if (rval != QLA_SUCCESS) { 1268 fcport->flags |= FCF_LOGIN_NEEDED; 1269 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1270 goto done_free_sp; 1271 } 1272 1273 return rval; 1274 1275 done_free_sp: 1276 sp->free(sp); 1277 fcport->flags &= ~FCF_ASYNC_SENT; 1278 return rval; 1279 } 1280 1281 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1282 { 1283 struct qla_work_evt *e; 1284 1285 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1286 if (!e) 1287 return QLA_FUNCTION_FAILED; 1288 1289 e->u.fcport.fcport = fcport; 1290 e->u.fcport.opt = opt; 1291 fcport->flags |= FCF_ASYNC_ACTIVE; 1292 return qla2x00_post_work(vha, e); 1293 } 1294 1295 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1296 { 1297 srb_t *sp; 1298 struct srb_iocb *mbx; 1299 int rval = QLA_FUNCTION_FAILED; 1300 u16 *mb; 1301 dma_addr_t pd_dma; 1302 struct port_database_24xx *pd; 1303 struct qla_hw_data *ha = vha->hw; 1304 1305 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 1306 fcport->loop_id == FC_NO_LOOP_ID) { 1307 ql_log(ql_log_warn, vha, 0xffff, 1308 "%s: %8phC - not sending command.\n", 1309 __func__, fcport->port_name); 1310 return rval; 1311 } 1312 1313 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1314 if (!sp) 1315 goto done; 1316 1317 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB); 1318 1319 fcport->flags |= FCF_ASYNC_SENT; 1320 sp->type = SRB_MB_IOCB; 1321 sp->name = "gpdb"; 1322 sp->gen1 = fcport->rscn_gen; 1323 sp->gen2 = fcport->login_gen; 1324 1325 mbx = &sp->u.iocb_cmd; 1326 mbx->timeout = qla2x00_async_iocb_timeout; 1327 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1328 1329 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1330 if (pd == NULL) { 1331 ql_log(ql_log_warn, vha, 0xd043, 1332 "Failed to allocate port database structure.\n"); 1333 goto done_free_sp; 1334 } 1335 1336 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1337 mb[0] = MBC_GET_PORT_DATABASE; 1338 mb[1] = fcport->loop_id; 1339 mb[2] = MSW(pd_dma); 1340 mb[3] = LSW(pd_dma); 1341 mb[6] = MSW(MSD(pd_dma)); 1342 mb[7] = LSW(MSD(pd_dma)); 1343 mb[9] = vha->vp_idx; 1344 mb[10] = opt; 1345 1346 mbx->u.mbx.in = pd; 1347 mbx->u.mbx.in_dma = pd_dma; 1348 1349 sp->done = qla24xx_async_gpdb_sp_done; 1350 1351 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1352 "Async-%s %8phC hndl %x opt %x\n", 1353 sp->name, fcport->port_name, sp->handle, opt); 1354 1355 rval = qla2x00_start_sp(sp); 1356 if (rval != QLA_SUCCESS) 1357 goto done_free_sp; 1358 return rval; 1359 1360 done_free_sp: 1361 if (pd) 1362 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1363 1364 sp->free(sp); 1365 fcport->flags &= ~FCF_ASYNC_SENT; 1366 done: 1367 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1368 qla24xx_post_gpdb_work(vha, fcport, opt); 1369 return rval; 1370 } 1371 1372 static 1373 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1374 { 1375 unsigned long flags; 1376 1377 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1378 ea->fcport->login_gen++; 1379 ea->fcport->deleted = 0; 1380 ea->fcport->logout_on_delete = 1; 1381 1382 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1383 vha->fcport_count++; 1384 ea->fcport->login_succ = 1; 1385 1386 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1387 qla24xx_sched_upd_fcport(ea->fcport); 1388 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1389 } else if (ea->fcport->login_succ) { 1390 /* 1391 * We have an existing session. A late RSCN delivery 1392 * must have triggered the session to be re-validate. 1393 * Session is still valid. 1394 */ 1395 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1396 "%s %d %8phC session revalidate success\n", 1397 __func__, __LINE__, ea->fcport->port_name); 1398 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE); 1399 } 1400 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1401 } 1402 1403 static 1404 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1405 { 1406 fc_port_t *fcport = ea->fcport; 1407 struct port_database_24xx *pd; 1408 struct srb *sp = ea->sp; 1409 uint8_t ls; 1410 1411 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1412 1413 fcport->flags &= ~FCF_ASYNC_SENT; 1414 1415 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1416 "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__, 1417 fcport->port_name, fcport->disc_state, pd->current_login_state, 1418 fcport->fc4_type, ea->rc); 1419 1420 if (fcport->disc_state == DSC_DELETE_PEND) 1421 return; 1422 1423 if (NVME_TARGET(vha->hw, fcport)) 1424 ls = pd->current_login_state >> 4; 1425 else 1426 ls = pd->current_login_state & 0xf; 1427 1428 if (ea->sp->gen2 != fcport->login_gen) { 1429 /* target side must have changed it. */ 1430 1431 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1432 "%s %8phC generation changed\n", 1433 __func__, fcport->port_name); 1434 return; 1435 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1436 qla_rscn_replay(fcport); 1437 qlt_schedule_sess_for_deletion(fcport); 1438 return; 1439 } 1440 1441 switch (ls) { 1442 case PDS_PRLI_COMPLETE: 1443 __qla24xx_parse_gpdb(vha, fcport, pd); 1444 break; 1445 case PDS_PLOGI_PENDING: 1446 case PDS_PLOGI_COMPLETE: 1447 case PDS_PRLI_PENDING: 1448 case PDS_PRLI2_PENDING: 1449 /* Set discovery state back to GNL to Relogin attempt */ 1450 if (qla_dual_mode_enabled(vha) || 1451 qla_ini_mode_enabled(vha)) { 1452 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1453 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1454 } 1455 return; 1456 case PDS_LOGO_PENDING: 1457 case PDS_PORT_UNAVAILABLE: 1458 default: 1459 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1460 __func__, __LINE__, fcport->port_name); 1461 qlt_schedule_sess_for_deletion(fcport); 1462 return; 1463 } 1464 __qla24xx_handle_gpdb_event(vha, ea); 1465 } /* gpdb event */ 1466 1467 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1468 { 1469 u8 login = 0; 1470 int rc; 1471 1472 if (qla_tgt_mode_enabled(vha)) 1473 return; 1474 1475 if (qla_dual_mode_enabled(vha)) { 1476 if (N2N_TOPO(vha->hw)) { 1477 u64 mywwn, wwn; 1478 1479 mywwn = wwn_to_u64(vha->port_name); 1480 wwn = wwn_to_u64(fcport->port_name); 1481 if (mywwn > wwn) 1482 login = 1; 1483 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1484 && time_after_eq(jiffies, 1485 fcport->plogi_nack_done_deadline)) 1486 login = 1; 1487 } else { 1488 login = 1; 1489 } 1490 } else { 1491 /* initiator mode */ 1492 login = 1; 1493 } 1494 1495 if (login && fcport->login_retry) { 1496 fcport->login_retry--; 1497 if (fcport->loop_id == FC_NO_LOOP_ID) { 1498 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1499 rc = qla2x00_find_new_loop_id(vha, fcport); 1500 if (rc) { 1501 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1502 "%s %d %8phC post del sess - out of loopid\n", 1503 __func__, __LINE__, fcport->port_name); 1504 fcport->scan_state = 0; 1505 qlt_schedule_sess_for_deletion(fcport); 1506 return; 1507 } 1508 } 1509 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1510 "%s %d %8phC post login\n", 1511 __func__, __LINE__, fcport->port_name); 1512 qla2x00_post_async_login_work(vha, fcport, NULL); 1513 } 1514 } 1515 1516 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1517 { 1518 u16 data[2]; 1519 u64 wwn; 1520 u16 sec; 1521 1522 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1523 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1524 __func__, fcport->port_name, fcport->disc_state, 1525 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1526 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1527 fcport->login_gen, fcport->loop_id, fcport->scan_state); 1528 1529 if (fcport->scan_state != QLA_FCPORT_FOUND) 1530 return 0; 1531 1532 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1533 qla_dual_mode_enabled(vha) && 1534 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1535 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1536 return 0; 1537 1538 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1539 !N2N_TOPO(vha->hw)) { 1540 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1541 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1542 return 0; 1543 } 1544 } 1545 1546 /* Target won't initiate port login if fabric is present */ 1547 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1548 return 0; 1549 1550 if (fcport->flags & FCF_ASYNC_SENT) { 1551 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1552 return 0; 1553 } 1554 1555 switch (fcport->disc_state) { 1556 case DSC_DELETED: 1557 wwn = wwn_to_u64(fcport->node_name); 1558 switch (vha->hw->current_topology) { 1559 case ISP_CFG_N: 1560 if (fcport_is_smaller(fcport)) { 1561 /* this adapter is bigger */ 1562 if (fcport->login_retry) { 1563 if (fcport->loop_id == FC_NO_LOOP_ID) { 1564 qla2x00_find_new_loop_id(vha, 1565 fcport); 1566 fcport->fw_login_state = 1567 DSC_LS_PORT_UNAVAIL; 1568 } 1569 fcport->login_retry--; 1570 qla_post_els_plogi_work(vha, fcport); 1571 } else { 1572 ql_log(ql_log_info, vha, 0x705d, 1573 "Unable to reach remote port %8phC", 1574 fcport->port_name); 1575 } 1576 } else { 1577 qla24xx_post_gnl_work(vha, fcport); 1578 } 1579 break; 1580 default: 1581 if (wwn == 0) { 1582 ql_dbg(ql_dbg_disc, vha, 0xffff, 1583 "%s %d %8phC post GNNID\n", 1584 __func__, __LINE__, fcport->port_name); 1585 qla24xx_post_gnnid_work(vha, fcport); 1586 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1587 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1588 "%s %d %8phC post gnl\n", 1589 __func__, __LINE__, fcport->port_name); 1590 qla24xx_post_gnl_work(vha, fcport); 1591 } else { 1592 qla_chk_n2n_b4_login(vha, fcport); 1593 } 1594 break; 1595 } 1596 break; 1597 1598 case DSC_GNL: 1599 switch (vha->hw->current_topology) { 1600 case ISP_CFG_N: 1601 if ((fcport->current_login_state & 0xf) == 0x6) { 1602 ql_dbg(ql_dbg_disc, vha, 0x2118, 1603 "%s %d %8phC post GPDB work\n", 1604 __func__, __LINE__, fcport->port_name); 1605 fcport->chip_reset = 1606 vha->hw->base_qpair->chip_reset; 1607 qla24xx_post_gpdb_work(vha, fcport, 0); 1608 } else { 1609 ql_dbg(ql_dbg_disc, vha, 0x2118, 1610 "%s %d %8phC post %s PRLI\n", 1611 __func__, __LINE__, fcport->port_name, 1612 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1613 "FC"); 1614 qla24xx_post_prli_work(vha, fcport); 1615 } 1616 break; 1617 default: 1618 if (fcport->login_pause) { 1619 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1620 "%s %d %8phC exit\n", 1621 __func__, __LINE__, 1622 fcport->port_name); 1623 fcport->last_rscn_gen = fcport->rscn_gen; 1624 fcport->last_login_gen = fcport->login_gen; 1625 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1626 break; 1627 } 1628 qla_chk_n2n_b4_login(vha, fcport); 1629 break; 1630 } 1631 break; 1632 1633 case DSC_LOGIN_FAILED: 1634 if (N2N_TOPO(vha->hw)) 1635 qla_chk_n2n_b4_login(vha, fcport); 1636 else 1637 qlt_schedule_sess_for_deletion(fcport); 1638 break; 1639 1640 case DSC_LOGIN_COMPLETE: 1641 /* recheck login state */ 1642 data[0] = data[1] = 0; 1643 qla2x00_post_async_adisc_work(vha, fcport, data); 1644 break; 1645 1646 case DSC_LOGIN_PEND: 1647 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1648 qla24xx_post_prli_work(vha, fcport); 1649 break; 1650 1651 case DSC_UPD_FCPORT: 1652 sec = jiffies_to_msecs(jiffies - 1653 fcport->jiffies_at_registration)/1000; 1654 if (fcport->sec_since_registration < sec && sec && 1655 !(sec % 60)) { 1656 fcport->sec_since_registration = sec; 1657 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1658 "%s %8phC - Slow Rport registration(%d Sec)\n", 1659 __func__, fcport->port_name, sec); 1660 } 1661 1662 if (fcport->next_disc_state != DSC_DELETE_PEND) 1663 fcport->next_disc_state = DSC_ADISC; 1664 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1665 break; 1666 1667 default: 1668 break; 1669 } 1670 1671 return 0; 1672 } 1673 1674 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1675 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1676 { 1677 struct qla_work_evt *e; 1678 1679 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1680 if (!e) 1681 return QLA_FUNCTION_FAILED; 1682 1683 e->u.new_sess.id = *id; 1684 e->u.new_sess.pla = pla; 1685 e->u.new_sess.fc4_type = fc4_type; 1686 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1687 if (node_name) 1688 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1689 1690 return qla2x00_post_work(vha, e); 1691 } 1692 1693 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1694 { 1695 fc_port_t *fcport; 1696 unsigned long flags; 1697 1698 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1699 if (fcport) { 1700 fcport->scan_needed = 1; 1701 fcport->rscn_gen++; 1702 } 1703 1704 spin_lock_irqsave(&vha->work_lock, flags); 1705 if (vha->scan.scan_flags == 0) { 1706 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1707 vha->scan.scan_flags |= SF_QUEUED; 1708 schedule_delayed_work(&vha->scan.scan_work, 5); 1709 } 1710 spin_unlock_irqrestore(&vha->work_lock, flags); 1711 } 1712 1713 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1714 struct event_arg *ea) 1715 { 1716 fc_port_t *fcport = ea->fcport; 1717 1718 if (test_bit(UNLOADING, &vha->dpc_flags)) 1719 return; 1720 1721 ql_dbg(ql_dbg_disc, vha, 0x2102, 1722 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1723 __func__, fcport->port_name, fcport->disc_state, 1724 fcport->fw_login_state, fcport->login_pause, 1725 fcport->deleted, fcport->conflict, 1726 fcport->last_rscn_gen, fcport->rscn_gen, 1727 fcport->last_login_gen, fcport->login_gen, 1728 fcport->flags); 1729 1730 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1731 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1732 __func__, __LINE__, fcport->port_name); 1733 qla24xx_post_gnl_work(vha, fcport); 1734 return; 1735 } 1736 1737 qla24xx_fcport_handle_login(vha, fcport); 1738 } 1739 1740 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1741 struct event_arg *ea) 1742 { 1743 /* for pure Target Mode, PRLI will not be initiated */ 1744 if (vha->host->active_mode == MODE_TARGET) 1745 return; 1746 1747 ql_dbg(ql_dbg_disc, vha, 0x2118, 1748 "%s %d %8phC post PRLI\n", 1749 __func__, __LINE__, ea->fcport->port_name); 1750 qla24xx_post_prli_work(vha, ea->fcport); 1751 } 1752 1753 /* 1754 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1755 * to be consumed by the fcport 1756 */ 1757 void qla_rscn_replay(fc_port_t *fcport) 1758 { 1759 struct event_arg ea; 1760 1761 switch (fcport->disc_state) { 1762 case DSC_DELETE_PEND: 1763 return; 1764 default: 1765 break; 1766 } 1767 1768 if (fcport->scan_needed) { 1769 memset(&ea, 0, sizeof(ea)); 1770 ea.id = fcport->d_id; 1771 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1772 qla2x00_handle_rscn(fcport->vha, &ea); 1773 } 1774 } 1775 1776 static void 1777 qla2x00_tmf_iocb_timeout(void *data) 1778 { 1779 srb_t *sp = data; 1780 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1781 int rc, h; 1782 unsigned long flags; 1783 1784 rc = qla24xx_async_abort_cmd(sp, false); 1785 if (rc) { 1786 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 1787 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 1788 if (sp->qpair->req->outstanding_cmds[h] == sp) { 1789 sp->qpair->req->outstanding_cmds[h] = NULL; 1790 break; 1791 } 1792 } 1793 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 1794 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT); 1795 tmf->u.tmf.data = QLA_FUNCTION_FAILED; 1796 complete(&tmf->u.tmf.comp); 1797 } 1798 } 1799 1800 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 1801 { 1802 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1803 1804 complete(&tmf->u.tmf.comp); 1805 } 1806 1807 int 1808 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1809 uint32_t tag) 1810 { 1811 struct scsi_qla_host *vha = fcport->vha; 1812 struct srb_iocb *tm_iocb; 1813 srb_t *sp; 1814 int rval = QLA_FUNCTION_FAILED; 1815 1816 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1817 if (!sp) 1818 goto done; 1819 1820 tm_iocb = &sp->u.iocb_cmd; 1821 sp->type = SRB_TM_CMD; 1822 sp->name = "tmf"; 1823 1824 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1825 init_completion(&tm_iocb->u.tmf.comp); 1826 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1827 1828 tm_iocb->u.tmf.flags = flags; 1829 tm_iocb->u.tmf.lun = lun; 1830 tm_iocb->u.tmf.data = tag; 1831 sp->done = qla2x00_tmf_sp_done; 1832 1833 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1834 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1835 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1836 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1837 1838 rval = qla2x00_start_sp(sp); 1839 if (rval != QLA_SUCCESS) 1840 goto done_free_sp; 1841 wait_for_completion(&tm_iocb->u.tmf.comp); 1842 1843 rval = tm_iocb->u.tmf.data; 1844 1845 if (rval != QLA_SUCCESS) { 1846 ql_log(ql_log_warn, vha, 0x8030, 1847 "TM IOCB failed (%x).\n", rval); 1848 } 1849 1850 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1851 flags = tm_iocb->u.tmf.flags; 1852 lun = (uint16_t)tm_iocb->u.tmf.lun; 1853 1854 /* Issue Marker IOCB */ 1855 qla2x00_marker(vha, vha->hw->base_qpair, 1856 fcport->loop_id, lun, 1857 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1858 } 1859 1860 done_free_sp: 1861 sp->free(sp); 1862 fcport->flags &= ~FCF_ASYNC_SENT; 1863 done: 1864 return rval; 1865 } 1866 1867 int 1868 qla24xx_async_abort_command(srb_t *sp) 1869 { 1870 unsigned long flags = 0; 1871 1872 uint32_t handle; 1873 fc_port_t *fcport = sp->fcport; 1874 struct qla_qpair *qpair = sp->qpair; 1875 struct scsi_qla_host *vha = fcport->vha; 1876 struct req_que *req = qpair->req; 1877 1878 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1879 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1880 if (req->outstanding_cmds[handle] == sp) 1881 break; 1882 } 1883 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1884 1885 if (handle == req->num_outstanding_cmds) { 1886 /* Command not found. */ 1887 return QLA_FUNCTION_FAILED; 1888 } 1889 if (sp->type == SRB_FXIOCB_DCMD) 1890 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1891 FXDISC_ABORT_IOCTL); 1892 1893 return qla24xx_async_abort_cmd(sp, true); 1894 } 1895 1896 static void 1897 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1898 { 1899 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1900 ea->data[0]); 1901 1902 switch (ea->data[0]) { 1903 case MBS_COMMAND_COMPLETE: 1904 ql_dbg(ql_dbg_disc, vha, 0x2118, 1905 "%s %d %8phC post gpdb\n", 1906 __func__, __LINE__, ea->fcport->port_name); 1907 1908 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1909 ea->fcport->logout_on_delete = 1; 1910 ea->fcport->nvme_prli_service_param = ea->iop[0]; 1911 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 1912 ea->fcport->nvme_first_burst_size = 1913 (ea->iop[1] & 0xffff) * 512; 1914 else 1915 ea->fcport->nvme_first_burst_size = 0; 1916 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1917 break; 1918 default: 1919 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1920 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1921 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1922 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1923 break; 1924 } 1925 1926 /* 1927 * Retry PRLI with other FC-4 type if failure occurred on dual 1928 * FCP/NVMe port 1929 */ 1930 if (NVME_FCP_TARGET(ea->fcport)) { 1931 ql_dbg(ql_dbg_disc, vha, 0x2118, 1932 "%s %d %8phC post %s prli\n", 1933 __func__, __LINE__, ea->fcport->port_name, 1934 (ea->fcport->fc4_type & FS_FC4TYPE_NVME) ? 1935 "NVMe" : "FCP"); 1936 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME) 1937 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME; 1938 else 1939 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP; 1940 } 1941 1942 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1943 ea->fcport->keep_nport_handle = 0; 1944 ea->fcport->logout_on_delete = 1; 1945 qlt_schedule_sess_for_deletion(ea->fcport); 1946 break; 1947 } 1948 } 1949 1950 void 1951 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1952 { 1953 port_id_t cid; /* conflict Nport id */ 1954 u16 lid; 1955 struct fc_port *conflict_fcport; 1956 unsigned long flags; 1957 struct fc_port *fcport = ea->fcport; 1958 1959 ql_dbg(ql_dbg_disc, vha, 0xffff, 1960 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1961 __func__, fcport->port_name, fcport->disc_state, 1962 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1963 ea->sp->gen1, fcport->rscn_gen, 1964 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1965 1966 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1967 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1968 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1969 "%s %d %8phC Remote is trying to login\n", 1970 __func__, __LINE__, fcport->port_name); 1971 return; 1972 } 1973 1974 if ((fcport->disc_state == DSC_DELETE_PEND) || 1975 (fcport->disc_state == DSC_DELETED)) { 1976 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1977 return; 1978 } 1979 1980 if (ea->sp->gen2 != fcport->login_gen) { 1981 /* target side must have changed it. */ 1982 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1983 "%s %8phC generation changed\n", 1984 __func__, fcport->port_name); 1985 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1986 return; 1987 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1988 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1989 "%s %8phC RSCN generation changed\n", 1990 __func__, fcport->port_name); 1991 qla_rscn_replay(fcport); 1992 qlt_schedule_sess_for_deletion(fcport); 1993 return; 1994 } 1995 1996 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1997 ea->data[0]); 1998 1999 switch (ea->data[0]) { 2000 case MBS_COMMAND_COMPLETE: 2001 /* 2002 * Driver must validate login state - If PRLI not complete, 2003 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 2004 * requests. 2005 */ 2006 if (NVME_TARGET(vha->hw, ea->fcport)) { 2007 ql_dbg(ql_dbg_disc, vha, 0x2117, 2008 "%s %d %8phC post prli\n", 2009 __func__, __LINE__, ea->fcport->port_name); 2010 qla24xx_post_prli_work(vha, ea->fcport); 2011 } else { 2012 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2013 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n", 2014 __func__, __LINE__, ea->fcport->port_name, 2015 ea->fcport->loop_id, ea->fcport->d_id.b24); 2016 2017 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2018 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2019 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2020 ea->fcport->logout_on_delete = 1; 2021 ea->fcport->send_els_logo = 0; 2022 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 2023 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2024 2025 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2026 } 2027 break; 2028 case MBS_COMMAND_ERROR: 2029 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2030 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2031 2032 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2033 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_FAILED); 2034 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 2035 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2036 else 2037 qla2x00_mark_device_lost(vha, ea->fcport, 1); 2038 break; 2039 case MBS_LOOP_ID_USED: 2040 /* data[1] = IO PARAM 1 = nport ID */ 2041 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2042 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2043 cid.b.al_pa = ea->iop[1] & 0xff; 2044 cid.b.rsvd_1 = 0; 2045 2046 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2047 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2048 __func__, __LINE__, ea->fcport->port_name, 2049 ea->fcport->loop_id, cid.b24); 2050 2051 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2052 ea->fcport->loop_id = FC_NO_LOOP_ID; 2053 qla24xx_post_gnl_work(vha, ea->fcport); 2054 break; 2055 case MBS_PORT_ID_USED: 2056 lid = ea->iop[1] & 0xffff; 2057 qlt_find_sess_invalidate_other(vha, 2058 wwn_to_u64(ea->fcport->port_name), 2059 ea->fcport->d_id, lid, &conflict_fcport); 2060 2061 if (conflict_fcport) { 2062 /* 2063 * Another fcport share the same loop_id/nport id. 2064 * Conflict fcport needs to finish cleanup before this 2065 * fcport can proceed to login. 2066 */ 2067 conflict_fcport->conflict = ea->fcport; 2068 ea->fcport->login_pause = 1; 2069 2070 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2071 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2072 __func__, __LINE__, ea->fcport->port_name, 2073 ea->fcport->d_id.b24, lid); 2074 } else { 2075 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2076 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2077 __func__, __LINE__, ea->fcport->port_name, 2078 ea->fcport->d_id.b24, lid); 2079 2080 qla2x00_clear_loop_id(ea->fcport); 2081 set_bit(lid, vha->hw->loop_id_map); 2082 ea->fcport->loop_id = lid; 2083 ea->fcport->keep_nport_handle = 0; 2084 ea->fcport->logout_on_delete = 1; 2085 qlt_schedule_sess_for_deletion(ea->fcport); 2086 } 2087 break; 2088 } 2089 return; 2090 } 2091 2092 /****************************************************************************/ 2093 /* QLogic ISP2x00 Hardware Support Functions. */ 2094 /****************************************************************************/ 2095 2096 static int 2097 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2098 { 2099 int rval = QLA_SUCCESS; 2100 struct qla_hw_data *ha = vha->hw; 2101 uint32_t idc_major_ver, idc_minor_ver; 2102 uint16_t config[4]; 2103 2104 qla83xx_idc_lock(vha, 0); 2105 2106 /* SV: TODO: Assign initialization timeout from 2107 * flash-info / other param 2108 */ 2109 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2110 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2111 2112 /* Set our fcoe function presence */ 2113 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2114 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2115 "Error while setting DRV-Presence.\n"); 2116 rval = QLA_FUNCTION_FAILED; 2117 goto exit; 2118 } 2119 2120 /* Decide the reset ownership */ 2121 qla83xx_reset_ownership(vha); 2122 2123 /* 2124 * On first protocol driver load: 2125 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2126 * register. 2127 * Others: Check compatibility with current IDC Major version. 2128 */ 2129 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2130 if (ha->flags.nic_core_reset_owner) { 2131 /* Set IDC Major version */ 2132 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2133 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2134 2135 /* Clearing IDC-Lock-Recovery register */ 2136 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2137 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2138 /* 2139 * Clear further IDC participation if we are not compatible with 2140 * the current IDC Major Version. 2141 */ 2142 ql_log(ql_log_warn, vha, 0xb07d, 2143 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2144 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2145 __qla83xx_clear_drv_presence(vha); 2146 rval = QLA_FUNCTION_FAILED; 2147 goto exit; 2148 } 2149 /* Each function sets its supported Minor version. */ 2150 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2151 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2152 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2153 2154 if (ha->flags.nic_core_reset_owner) { 2155 memset(config, 0, sizeof(config)); 2156 if (!qla81xx_get_port_config(vha, config)) 2157 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2158 QLA8XXX_DEV_READY); 2159 } 2160 2161 rval = qla83xx_idc_state_handler(vha); 2162 2163 exit: 2164 qla83xx_idc_unlock(vha, 0); 2165 2166 return rval; 2167 } 2168 2169 /* 2170 * qla2x00_initialize_adapter 2171 * Initialize board. 2172 * 2173 * Input: 2174 * ha = adapter block pointer. 2175 * 2176 * Returns: 2177 * 0 = success 2178 */ 2179 int 2180 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2181 { 2182 int rval; 2183 struct qla_hw_data *ha = vha->hw; 2184 struct req_que *req = ha->req_q_map[0]; 2185 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2186 2187 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2188 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2189 2190 /* Clear adapter flags. */ 2191 vha->flags.online = 0; 2192 ha->flags.chip_reset_done = 0; 2193 vha->flags.reset_active = 0; 2194 ha->flags.pci_channel_io_perm_failure = 0; 2195 ha->flags.eeh_busy = 0; 2196 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2197 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2198 atomic_set(&vha->loop_state, LOOP_DOWN); 2199 vha->device_flags = DFLG_NO_CABLE; 2200 vha->dpc_flags = 0; 2201 vha->flags.management_server_logged_in = 0; 2202 vha->marker_needed = 0; 2203 ha->isp_abort_cnt = 0; 2204 ha->beacon_blink_led = 0; 2205 2206 set_bit(0, ha->req_qid_map); 2207 set_bit(0, ha->rsp_qid_map); 2208 2209 ql_dbg(ql_dbg_init, vha, 0x0040, 2210 "Configuring PCI space...\n"); 2211 rval = ha->isp_ops->pci_config(vha); 2212 if (rval) { 2213 ql_log(ql_log_warn, vha, 0x0044, 2214 "Unable to configure PCI space.\n"); 2215 return (rval); 2216 } 2217 2218 ha->isp_ops->reset_chip(vha); 2219 2220 /* Check for secure flash support */ 2221 if (IS_QLA28XX(ha)) { 2222 if (rd_reg_word(®->mailbox12) & BIT_0) 2223 ha->flags.secure_adapter = 1; 2224 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n", 2225 (ha->flags.secure_adapter) ? "Yes" : "No"); 2226 } 2227 2228 2229 rval = qla2xxx_get_flash_info(vha); 2230 if (rval) { 2231 ql_log(ql_log_fatal, vha, 0x004f, 2232 "Unable to validate FLASH data.\n"); 2233 return rval; 2234 } 2235 2236 if (IS_QLA8044(ha)) { 2237 qla8044_read_reset_template(vha); 2238 2239 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2240 * If DONRESET_BIT0 is set, drivers should not set dev_state 2241 * to NEED_RESET. But if NEED_RESET is set, drivers should 2242 * should honor the reset. */ 2243 if (ql2xdontresethba == 1) 2244 qla8044_set_idc_dontreset(vha); 2245 } 2246 2247 ha->isp_ops->get_flash_version(vha, req->ring); 2248 ql_dbg(ql_dbg_init, vha, 0x0061, 2249 "Configure NVRAM parameters...\n"); 2250 2251 /* Let priority default to FCP, can be overridden by nvram_config */ 2252 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2253 2254 ha->isp_ops->nvram_config(vha); 2255 2256 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2257 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2258 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2259 2260 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2261 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2262 2263 if (ha->flags.disable_serdes) { 2264 /* Mask HBA via NVRAM settings? */ 2265 ql_log(ql_log_info, vha, 0x0077, 2266 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2267 return QLA_FUNCTION_FAILED; 2268 } 2269 2270 ql_dbg(ql_dbg_init, vha, 0x0078, 2271 "Verifying loaded RISC code...\n"); 2272 2273 /* If smartsan enabled then require fdmi and rdp enabled */ 2274 if (ql2xsmartsan) { 2275 ql2xfdmienable = 1; 2276 ql2xrdpenable = 1; 2277 } 2278 2279 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2280 rval = ha->isp_ops->chip_diag(vha); 2281 if (rval) 2282 return (rval); 2283 rval = qla2x00_setup_chip(vha); 2284 if (rval) 2285 return (rval); 2286 } 2287 2288 if (IS_QLA84XX(ha)) { 2289 ha->cs84xx = qla84xx_get_chip(vha); 2290 if (!ha->cs84xx) { 2291 ql_log(ql_log_warn, vha, 0x00d0, 2292 "Unable to configure ISP84XX.\n"); 2293 return QLA_FUNCTION_FAILED; 2294 } 2295 } 2296 2297 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2298 rval = qla2x00_init_rings(vha); 2299 2300 /* No point in continuing if firmware initialization failed. */ 2301 if (rval != QLA_SUCCESS) 2302 return rval; 2303 2304 ha->flags.chip_reset_done = 1; 2305 2306 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2307 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2308 rval = qla84xx_init_chip(vha); 2309 if (rval != QLA_SUCCESS) { 2310 ql_log(ql_log_warn, vha, 0x00d4, 2311 "Unable to initialize ISP84XX.\n"); 2312 qla84xx_put_chip(vha); 2313 } 2314 } 2315 2316 /* Load the NIC Core f/w if we are the first protocol driver. */ 2317 if (IS_QLA8031(ha)) { 2318 rval = qla83xx_nic_core_fw_load(vha); 2319 if (rval) 2320 ql_log(ql_log_warn, vha, 0x0124, 2321 "Error in initializing NIC Core f/w.\n"); 2322 } 2323 2324 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2325 qla24xx_read_fcp_prio_cfg(vha); 2326 2327 if (IS_P3P_TYPE(ha)) 2328 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2329 else 2330 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2331 2332 return (rval); 2333 } 2334 2335 /** 2336 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2337 * @vha: HA context 2338 * 2339 * Returns 0 on success. 2340 */ 2341 int 2342 qla2100_pci_config(scsi_qla_host_t *vha) 2343 { 2344 uint16_t w; 2345 unsigned long flags; 2346 struct qla_hw_data *ha = vha->hw; 2347 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2348 2349 pci_set_master(ha->pdev); 2350 pci_try_set_mwi(ha->pdev); 2351 2352 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2353 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2354 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2355 2356 pci_disable_rom(ha->pdev); 2357 2358 /* Get PCI bus information. */ 2359 spin_lock_irqsave(&ha->hardware_lock, flags); 2360 ha->pci_attr = rd_reg_word(®->ctrl_status); 2361 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2362 2363 return QLA_SUCCESS; 2364 } 2365 2366 /** 2367 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2368 * @vha: HA context 2369 * 2370 * Returns 0 on success. 2371 */ 2372 int 2373 qla2300_pci_config(scsi_qla_host_t *vha) 2374 { 2375 uint16_t w; 2376 unsigned long flags = 0; 2377 uint32_t cnt; 2378 struct qla_hw_data *ha = vha->hw; 2379 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2380 2381 pci_set_master(ha->pdev); 2382 pci_try_set_mwi(ha->pdev); 2383 2384 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2385 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2386 2387 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2388 w &= ~PCI_COMMAND_INTX_DISABLE; 2389 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2390 2391 /* 2392 * If this is a 2300 card and not 2312, reset the 2393 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2394 * the 2310 also reports itself as a 2300 so we need to get the 2395 * fb revision level -- a 6 indicates it really is a 2300 and 2396 * not a 2310. 2397 */ 2398 if (IS_QLA2300(ha)) { 2399 spin_lock_irqsave(&ha->hardware_lock, flags); 2400 2401 /* Pause RISC. */ 2402 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2403 for (cnt = 0; cnt < 30000; cnt++) { 2404 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) 2405 break; 2406 2407 udelay(10); 2408 } 2409 2410 /* Select FPM registers. */ 2411 wrt_reg_word(®->ctrl_status, 0x20); 2412 rd_reg_word(®->ctrl_status); 2413 2414 /* Get the fb rev level */ 2415 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2416 2417 if (ha->fb_rev == FPM_2300) 2418 pci_clear_mwi(ha->pdev); 2419 2420 /* Deselect FPM registers. */ 2421 wrt_reg_word(®->ctrl_status, 0x0); 2422 rd_reg_word(®->ctrl_status); 2423 2424 /* Release RISC module. */ 2425 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2426 for (cnt = 0; cnt < 30000; cnt++) { 2427 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0) 2428 break; 2429 2430 udelay(10); 2431 } 2432 2433 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2434 } 2435 2436 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2437 2438 pci_disable_rom(ha->pdev); 2439 2440 /* Get PCI bus information. */ 2441 spin_lock_irqsave(&ha->hardware_lock, flags); 2442 ha->pci_attr = rd_reg_word(®->ctrl_status); 2443 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2444 2445 return QLA_SUCCESS; 2446 } 2447 2448 /** 2449 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2450 * @vha: HA context 2451 * 2452 * Returns 0 on success. 2453 */ 2454 int 2455 qla24xx_pci_config(scsi_qla_host_t *vha) 2456 { 2457 uint16_t w; 2458 unsigned long flags = 0; 2459 struct qla_hw_data *ha = vha->hw; 2460 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2461 2462 pci_set_master(ha->pdev); 2463 pci_try_set_mwi(ha->pdev); 2464 2465 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2466 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2467 w &= ~PCI_COMMAND_INTX_DISABLE; 2468 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2469 2470 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2471 2472 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2473 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2474 pcix_set_mmrbc(ha->pdev, 2048); 2475 2476 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2477 if (pci_is_pcie(ha->pdev)) 2478 pcie_set_readrq(ha->pdev, 4096); 2479 2480 pci_disable_rom(ha->pdev); 2481 2482 ha->chip_revision = ha->pdev->revision; 2483 2484 /* Get PCI bus information. */ 2485 spin_lock_irqsave(&ha->hardware_lock, flags); 2486 ha->pci_attr = rd_reg_dword(®->ctrl_status); 2487 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2488 2489 return QLA_SUCCESS; 2490 } 2491 2492 /** 2493 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2494 * @vha: HA context 2495 * 2496 * Returns 0 on success. 2497 */ 2498 int 2499 qla25xx_pci_config(scsi_qla_host_t *vha) 2500 { 2501 uint16_t w; 2502 struct qla_hw_data *ha = vha->hw; 2503 2504 pci_set_master(ha->pdev); 2505 pci_try_set_mwi(ha->pdev); 2506 2507 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2508 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2509 w &= ~PCI_COMMAND_INTX_DISABLE; 2510 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2511 2512 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2513 if (pci_is_pcie(ha->pdev)) 2514 pcie_set_readrq(ha->pdev, 4096); 2515 2516 pci_disable_rom(ha->pdev); 2517 2518 ha->chip_revision = ha->pdev->revision; 2519 2520 return QLA_SUCCESS; 2521 } 2522 2523 /** 2524 * qla2x00_isp_firmware() - Choose firmware image. 2525 * @vha: HA context 2526 * 2527 * Returns 0 on success. 2528 */ 2529 static int 2530 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2531 { 2532 int rval; 2533 uint16_t loop_id, topo, sw_cap; 2534 uint8_t domain, area, al_pa; 2535 struct qla_hw_data *ha = vha->hw; 2536 2537 /* Assume loading risc code */ 2538 rval = QLA_FUNCTION_FAILED; 2539 2540 if (ha->flags.disable_risc_code_load) { 2541 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2542 2543 /* Verify checksum of loaded RISC code. */ 2544 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2545 if (rval == QLA_SUCCESS) { 2546 /* And, verify we are not in ROM code. */ 2547 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2548 &area, &domain, &topo, &sw_cap); 2549 } 2550 } 2551 2552 if (rval) 2553 ql_dbg(ql_dbg_init, vha, 0x007a, 2554 "**** Load RISC code ****.\n"); 2555 2556 return (rval); 2557 } 2558 2559 /** 2560 * qla2x00_reset_chip() - Reset ISP chip. 2561 * @vha: HA context 2562 * 2563 * Returns 0 on success. 2564 */ 2565 int 2566 qla2x00_reset_chip(scsi_qla_host_t *vha) 2567 { 2568 unsigned long flags = 0; 2569 struct qla_hw_data *ha = vha->hw; 2570 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2571 uint32_t cnt; 2572 uint16_t cmd; 2573 int rval = QLA_FUNCTION_FAILED; 2574 2575 if (unlikely(pci_channel_offline(ha->pdev))) 2576 return rval; 2577 2578 ha->isp_ops->disable_intrs(ha); 2579 2580 spin_lock_irqsave(&ha->hardware_lock, flags); 2581 2582 /* Turn off master enable */ 2583 cmd = 0; 2584 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2585 cmd &= ~PCI_COMMAND_MASTER; 2586 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2587 2588 if (!IS_QLA2100(ha)) { 2589 /* Pause RISC. */ 2590 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2591 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2592 for (cnt = 0; cnt < 30000; cnt++) { 2593 if ((rd_reg_word(®->hccr) & 2594 HCCR_RISC_PAUSE) != 0) 2595 break; 2596 udelay(100); 2597 } 2598 } else { 2599 rd_reg_word(®->hccr); /* PCI Posting. */ 2600 udelay(10); 2601 } 2602 2603 /* Select FPM registers. */ 2604 wrt_reg_word(®->ctrl_status, 0x20); 2605 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2606 2607 /* FPM Soft Reset. */ 2608 wrt_reg_word(®->fpm_diag_config, 0x100); 2609 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2610 2611 /* Toggle Fpm Reset. */ 2612 if (!IS_QLA2200(ha)) { 2613 wrt_reg_word(®->fpm_diag_config, 0x0); 2614 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2615 } 2616 2617 /* Select frame buffer registers. */ 2618 wrt_reg_word(®->ctrl_status, 0x10); 2619 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2620 2621 /* Reset frame buffer FIFOs. */ 2622 if (IS_QLA2200(ha)) { 2623 WRT_FB_CMD_REG(ha, reg, 0xa000); 2624 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2625 } else { 2626 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2627 2628 /* Read back fb_cmd until zero or 3 seconds max */ 2629 for (cnt = 0; cnt < 3000; cnt++) { 2630 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2631 break; 2632 udelay(100); 2633 } 2634 } 2635 2636 /* Select RISC module registers. */ 2637 wrt_reg_word(®->ctrl_status, 0); 2638 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2639 2640 /* Reset RISC processor. */ 2641 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2642 rd_reg_word(®->hccr); /* PCI Posting. */ 2643 2644 /* Release RISC processor. */ 2645 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2646 rd_reg_word(®->hccr); /* PCI Posting. */ 2647 } 2648 2649 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 2650 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT); 2651 2652 /* Reset ISP chip. */ 2653 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 2654 2655 /* Wait for RISC to recover from reset. */ 2656 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2657 /* 2658 * It is necessary to for a delay here since the card doesn't 2659 * respond to PCI reads during a reset. On some architectures 2660 * this will result in an MCA. 2661 */ 2662 udelay(20); 2663 for (cnt = 30000; cnt; cnt--) { 2664 if ((rd_reg_word(®->ctrl_status) & 2665 CSR_ISP_SOFT_RESET) == 0) 2666 break; 2667 udelay(100); 2668 } 2669 } else 2670 udelay(10); 2671 2672 /* Reset RISC processor. */ 2673 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2674 2675 wrt_reg_word(®->semaphore, 0); 2676 2677 /* Release RISC processor. */ 2678 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2679 rd_reg_word(®->hccr); /* PCI Posting. */ 2680 2681 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2682 for (cnt = 0; cnt < 30000; cnt++) { 2683 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2684 break; 2685 2686 udelay(100); 2687 } 2688 } else 2689 udelay(100); 2690 2691 /* Turn on master enable */ 2692 cmd |= PCI_COMMAND_MASTER; 2693 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2694 2695 /* Disable RISC pause on FPM parity error. */ 2696 if (!IS_QLA2100(ha)) { 2697 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2698 rd_reg_word(®->hccr); /* PCI Posting. */ 2699 } 2700 2701 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2702 2703 return QLA_SUCCESS; 2704 } 2705 2706 /** 2707 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2708 * @vha: HA context 2709 * 2710 * Returns 0 on success. 2711 */ 2712 static int 2713 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2714 { 2715 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2716 2717 if (!IS_QLA81XX(vha->hw)) 2718 return QLA_SUCCESS; 2719 2720 return qla81xx_write_mpi_register(vha, mb); 2721 } 2722 2723 /** 2724 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2725 * @vha: HA context 2726 * 2727 * Returns 0 on success. 2728 */ 2729 static inline int 2730 qla24xx_reset_risc(scsi_qla_host_t *vha) 2731 { 2732 unsigned long flags = 0; 2733 struct qla_hw_data *ha = vha->hw; 2734 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2735 uint32_t cnt; 2736 uint16_t wd; 2737 static int abts_cnt; /* ISP abort retry counts */ 2738 int rval = QLA_SUCCESS; 2739 2740 spin_lock_irqsave(&ha->hardware_lock, flags); 2741 2742 /* Reset RISC. */ 2743 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2744 for (cnt = 0; cnt < 30000; cnt++) { 2745 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2746 break; 2747 2748 udelay(10); 2749 } 2750 2751 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2752 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2753 2754 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2755 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2756 rd_reg_dword(®->hccr), 2757 rd_reg_dword(®->ctrl_status), 2758 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2759 2760 wrt_reg_dword(®->ctrl_status, 2761 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2762 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2763 2764 udelay(100); 2765 2766 /* Wait for firmware to complete NVRAM accesses. */ 2767 rd_reg_word(®->mailbox0); 2768 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 && 2769 rval == QLA_SUCCESS; cnt--) { 2770 barrier(); 2771 if (cnt) 2772 udelay(5); 2773 else 2774 rval = QLA_FUNCTION_TIMEOUT; 2775 } 2776 2777 if (rval == QLA_SUCCESS) 2778 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2779 2780 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2781 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2782 rd_reg_dword(®->hccr), 2783 rd_reg_word(®->mailbox0)); 2784 2785 /* Wait for soft-reset to complete. */ 2786 rd_reg_dword(®->ctrl_status); 2787 for (cnt = 0; cnt < 60; cnt++) { 2788 barrier(); 2789 if ((rd_reg_dword(®->ctrl_status) & 2790 CSRX_ISP_SOFT_RESET) == 0) 2791 break; 2792 2793 udelay(5); 2794 } 2795 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2796 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2797 2798 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2799 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2800 rd_reg_dword(®->hccr), 2801 rd_reg_dword(®->ctrl_status)); 2802 2803 /* If required, do an MPI FW reset now */ 2804 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2805 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2806 if (++abts_cnt < 5) { 2807 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2808 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2809 } else { 2810 /* 2811 * We exhausted the ISP abort retries. We have to 2812 * set the board offline. 2813 */ 2814 abts_cnt = 0; 2815 vha->flags.online = 0; 2816 } 2817 } 2818 } 2819 2820 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 2821 rd_reg_dword(®->hccr); 2822 2823 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 2824 rd_reg_dword(®->hccr); 2825 2826 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET); 2827 rd_reg_dword(®->hccr); 2828 2829 rd_reg_word(®->mailbox0); 2830 for (cnt = 60; rd_reg_word(®->mailbox0) != 0 && 2831 rval == QLA_SUCCESS; cnt--) { 2832 barrier(); 2833 if (cnt) 2834 udelay(5); 2835 else 2836 rval = QLA_FUNCTION_TIMEOUT; 2837 } 2838 if (rval == QLA_SUCCESS) 2839 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2840 2841 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2842 "Host Risc 0x%x, mailbox0 0x%x\n", 2843 rd_reg_dword(®->hccr), 2844 rd_reg_word(®->mailbox0)); 2845 2846 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2847 2848 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2849 "Driver in %s mode\n", 2850 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2851 2852 if (IS_NOPOLLING_TYPE(ha)) 2853 ha->isp_ops->enable_intrs(ha); 2854 2855 return rval; 2856 } 2857 2858 static void 2859 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2860 { 2861 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2862 2863 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2864 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET); 2865 } 2866 2867 static void 2868 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2869 { 2870 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2871 2872 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2873 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); 2874 } 2875 2876 static void 2877 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2878 { 2879 uint32_t wd32 = 0; 2880 uint delta_msec = 100; 2881 uint elapsed_msec = 0; 2882 uint timeout_msec; 2883 ulong n; 2884 2885 if (vha->hw->pdev->subsystem_device != 0x0175 && 2886 vha->hw->pdev->subsystem_device != 0x0240) 2887 return; 2888 2889 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2890 udelay(100); 2891 2892 attempt: 2893 timeout_msec = TIMEOUT_SEMAPHORE; 2894 n = timeout_msec / delta_msec; 2895 while (n--) { 2896 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2897 qla25xx_read_risc_sema_reg(vha, &wd32); 2898 if (wd32 & RISC_SEMAPHORE) 2899 break; 2900 msleep(delta_msec); 2901 elapsed_msec += delta_msec; 2902 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2903 goto force; 2904 } 2905 2906 if (!(wd32 & RISC_SEMAPHORE)) 2907 goto force; 2908 2909 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2910 goto acquired; 2911 2912 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2913 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2914 n = timeout_msec / delta_msec; 2915 while (n--) { 2916 qla25xx_read_risc_sema_reg(vha, &wd32); 2917 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2918 break; 2919 msleep(delta_msec); 2920 elapsed_msec += delta_msec; 2921 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2922 goto force; 2923 } 2924 2925 if (wd32 & RISC_SEMAPHORE_FORCE) 2926 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2927 2928 goto attempt; 2929 2930 force: 2931 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2932 2933 acquired: 2934 return; 2935 } 2936 2937 /** 2938 * qla24xx_reset_chip() - Reset ISP24xx chip. 2939 * @vha: HA context 2940 * 2941 * Returns 0 on success. 2942 */ 2943 int 2944 qla24xx_reset_chip(scsi_qla_host_t *vha) 2945 { 2946 struct qla_hw_data *ha = vha->hw; 2947 int rval = QLA_FUNCTION_FAILED; 2948 2949 if (pci_channel_offline(ha->pdev) && 2950 ha->flags.pci_channel_io_perm_failure) { 2951 return rval; 2952 } 2953 2954 ha->isp_ops->disable_intrs(ha); 2955 2956 qla25xx_manipulate_risc_semaphore(vha); 2957 2958 /* Perform RISC reset. */ 2959 rval = qla24xx_reset_risc(vha); 2960 2961 return rval; 2962 } 2963 2964 /** 2965 * qla2x00_chip_diag() - Test chip for proper operation. 2966 * @vha: HA context 2967 * 2968 * Returns 0 on success. 2969 */ 2970 int 2971 qla2x00_chip_diag(scsi_qla_host_t *vha) 2972 { 2973 int rval; 2974 struct qla_hw_data *ha = vha->hw; 2975 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2976 unsigned long flags = 0; 2977 uint16_t data; 2978 uint32_t cnt; 2979 uint16_t mb[5]; 2980 struct req_que *req = ha->req_q_map[0]; 2981 2982 /* Assume a failed state */ 2983 rval = QLA_FUNCTION_FAILED; 2984 2985 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2986 ®->flash_address); 2987 2988 spin_lock_irqsave(&ha->hardware_lock, flags); 2989 2990 /* Reset ISP chip. */ 2991 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 2992 2993 /* 2994 * We need to have a delay here since the card will not respond while 2995 * in reset causing an MCA on some architectures. 2996 */ 2997 udelay(20); 2998 data = qla2x00_debounce_register(®->ctrl_status); 2999 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 3000 udelay(5); 3001 data = rd_reg_word(®->ctrl_status); 3002 barrier(); 3003 } 3004 3005 if (!cnt) 3006 goto chip_diag_failed; 3007 3008 ql_dbg(ql_dbg_init, vha, 0x007c, 3009 "Reset register cleared by chip reset.\n"); 3010 3011 /* Reset RISC processor. */ 3012 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3013 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3014 3015 /* Workaround for QLA2312 PCI parity error */ 3016 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3017 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 3018 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 3019 udelay(5); 3020 data = RD_MAILBOX_REG(ha, reg, 0); 3021 barrier(); 3022 } 3023 } else 3024 udelay(10); 3025 3026 if (!cnt) 3027 goto chip_diag_failed; 3028 3029 /* Check product ID of chip */ 3030 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3031 3032 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3033 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3034 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3035 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3036 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3037 mb[3] != PROD_ID_3) { 3038 ql_log(ql_log_warn, vha, 0x0062, 3039 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3040 mb[1], mb[2], mb[3]); 3041 3042 goto chip_diag_failed; 3043 } 3044 ha->product_id[0] = mb[1]; 3045 ha->product_id[1] = mb[2]; 3046 ha->product_id[2] = mb[3]; 3047 ha->product_id[3] = mb[4]; 3048 3049 /* Adjust fw RISC transfer size */ 3050 if (req->length > 1024) 3051 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3052 else 3053 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3054 req->length; 3055 3056 if (IS_QLA2200(ha) && 3057 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3058 /* Limit firmware transfer size with a 2200A */ 3059 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3060 3061 ha->device_type |= DT_ISP2200A; 3062 ha->fw_transfer_size = 128; 3063 } 3064 3065 /* Wrap Incoming Mailboxes Test. */ 3066 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3067 3068 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3069 rval = qla2x00_mbx_reg_test(vha); 3070 if (rval) 3071 ql_log(ql_log_warn, vha, 0x0080, 3072 "Failed mailbox send register test.\n"); 3073 else 3074 /* Flag a successful rval */ 3075 rval = QLA_SUCCESS; 3076 spin_lock_irqsave(&ha->hardware_lock, flags); 3077 3078 chip_diag_failed: 3079 if (rval) 3080 ql_log(ql_log_info, vha, 0x0081, 3081 "Chip diagnostics **** FAILED ****.\n"); 3082 3083 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3084 3085 return (rval); 3086 } 3087 3088 /** 3089 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3090 * @vha: HA context 3091 * 3092 * Returns 0 on success. 3093 */ 3094 int 3095 qla24xx_chip_diag(scsi_qla_host_t *vha) 3096 { 3097 int rval; 3098 struct qla_hw_data *ha = vha->hw; 3099 struct req_que *req = ha->req_q_map[0]; 3100 3101 if (IS_P3P_TYPE(ha)) 3102 return QLA_SUCCESS; 3103 3104 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3105 3106 rval = qla2x00_mbx_reg_test(vha); 3107 if (rval) { 3108 ql_log(ql_log_warn, vha, 0x0082, 3109 "Failed mailbox send register test.\n"); 3110 } else { 3111 /* Flag a successful rval */ 3112 rval = QLA_SUCCESS; 3113 } 3114 3115 return rval; 3116 } 3117 3118 static void 3119 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3120 { 3121 int rval; 3122 dma_addr_t tc_dma; 3123 void *tc; 3124 struct qla_hw_data *ha = vha->hw; 3125 3126 if (!IS_FWI2_CAPABLE(ha)) 3127 return; 3128 3129 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3130 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3131 return; 3132 3133 if (ha->fce) { 3134 ql_dbg(ql_dbg_init, vha, 0x00bd, 3135 "%s: FCE Mem is already allocated.\n", 3136 __func__); 3137 return; 3138 } 3139 3140 /* Allocate memory for Fibre Channel Event Buffer. */ 3141 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3142 GFP_KERNEL); 3143 if (!tc) { 3144 ql_log(ql_log_warn, vha, 0x00be, 3145 "Unable to allocate (%d KB) for FCE.\n", 3146 FCE_SIZE / 1024); 3147 return; 3148 } 3149 3150 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3151 ha->fce_mb, &ha->fce_bufs); 3152 if (rval) { 3153 ql_log(ql_log_warn, vha, 0x00bf, 3154 "Unable to initialize FCE (%d).\n", rval); 3155 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3156 return; 3157 } 3158 3159 ql_dbg(ql_dbg_init, vha, 0x00c0, 3160 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3161 3162 ha->flags.fce_enabled = 1; 3163 ha->fce_dma = tc_dma; 3164 ha->fce = tc; 3165 } 3166 3167 static void 3168 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3169 { 3170 int rval; 3171 dma_addr_t tc_dma; 3172 void *tc; 3173 struct qla_hw_data *ha = vha->hw; 3174 3175 if (!IS_FWI2_CAPABLE(ha)) 3176 return; 3177 3178 if (ha->eft) { 3179 ql_dbg(ql_dbg_init, vha, 0x00bd, 3180 "%s: EFT Mem is already allocated.\n", 3181 __func__); 3182 return; 3183 } 3184 3185 /* Allocate memory for Extended Trace Buffer. */ 3186 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3187 GFP_KERNEL); 3188 if (!tc) { 3189 ql_log(ql_log_warn, vha, 0x00c1, 3190 "Unable to allocate (%d KB) for EFT.\n", 3191 EFT_SIZE / 1024); 3192 return; 3193 } 3194 3195 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3196 if (rval) { 3197 ql_log(ql_log_warn, vha, 0x00c2, 3198 "Unable to initialize EFT (%d).\n", rval); 3199 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3200 return; 3201 } 3202 3203 ql_dbg(ql_dbg_init, vha, 0x00c3, 3204 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3205 3206 ha->eft_dma = tc_dma; 3207 ha->eft = tc; 3208 } 3209 3210 static void 3211 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3212 { 3213 qla2x00_init_fce_trace(vha); 3214 qla2x00_init_eft_trace(vha); 3215 } 3216 3217 void 3218 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3219 { 3220 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3221 eft_size, fce_size, mq_size; 3222 struct qla_hw_data *ha = vha->hw; 3223 struct req_que *req = ha->req_q_map[0]; 3224 struct rsp_que *rsp = ha->rsp_q_map[0]; 3225 struct qla2xxx_fw_dump *fw_dump; 3226 3227 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3228 req_q_size = rsp_q_size = 0; 3229 3230 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3231 fixed_size = sizeof(struct qla2100_fw_dump); 3232 } else if (IS_QLA23XX(ha)) { 3233 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3234 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3235 sizeof(uint16_t); 3236 } else if (IS_FWI2_CAPABLE(ha)) { 3237 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3238 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3239 else if (IS_QLA81XX(ha)) 3240 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3241 else if (IS_QLA25XX(ha)) 3242 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3243 else 3244 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3245 3246 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3247 sizeof(uint32_t); 3248 if (ha->mqenable) { 3249 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && 3250 !IS_QLA28XX(ha)) 3251 mq_size = sizeof(struct qla2xxx_mq_chain); 3252 /* 3253 * Allocate maximum buffer size for all queues - Q0. 3254 * Resizing must be done at end-of-dump processing. 3255 */ 3256 mq_size += (ha->max_req_queues - 1) * 3257 (req->length * sizeof(request_t)); 3258 mq_size += (ha->max_rsp_queues - 1) * 3259 (rsp->length * sizeof(response_t)); 3260 } 3261 if (ha->tgt.atio_ring) 3262 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3263 3264 qla2x00_init_fce_trace(vha); 3265 if (ha->fce) 3266 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3267 qla2x00_init_eft_trace(vha); 3268 if (ha->eft) 3269 eft_size = EFT_SIZE; 3270 } 3271 3272 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3273 struct fwdt *fwdt = ha->fwdt; 3274 uint j; 3275 3276 for (j = 0; j < 2; j++, fwdt++) { 3277 if (!fwdt->template) { 3278 ql_dbg(ql_dbg_init, vha, 0x00ba, 3279 "-> fwdt%u no template\n", j); 3280 continue; 3281 } 3282 ql_dbg(ql_dbg_init, vha, 0x00fa, 3283 "-> fwdt%u calculating fwdump size...\n", j); 3284 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3285 vha, fwdt->template); 3286 ql_dbg(ql_dbg_init, vha, 0x00fa, 3287 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3288 j, fwdt->dump_size); 3289 dump_size += fwdt->dump_size; 3290 } 3291 } else { 3292 req_q_size = req->length * sizeof(request_t); 3293 rsp_q_size = rsp->length * sizeof(response_t); 3294 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3295 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3296 + eft_size; 3297 ha->chain_offset = dump_size; 3298 dump_size += mq_size + fce_size; 3299 if (ha->exchoffld_buf) 3300 dump_size += sizeof(struct qla2xxx_offld_chain) + 3301 ha->exchoffld_size; 3302 if (ha->exlogin_buf) 3303 dump_size += sizeof(struct qla2xxx_offld_chain) + 3304 ha->exlogin_size; 3305 } 3306 3307 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3308 3309 ql_dbg(ql_dbg_init, vha, 0x00c5, 3310 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3311 __func__, dump_size, ha->fw_dump_len, 3312 ha->fw_dump_alloc_len); 3313 3314 fw_dump = vmalloc(dump_size); 3315 if (!fw_dump) { 3316 ql_log(ql_log_warn, vha, 0x00c4, 3317 "Unable to allocate (%d KB) for firmware dump.\n", 3318 dump_size / 1024); 3319 } else { 3320 mutex_lock(&ha->optrom_mutex); 3321 if (ha->fw_dumped) { 3322 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3323 vfree(ha->fw_dump); 3324 ha->fw_dump = fw_dump; 3325 ha->fw_dump_alloc_len = dump_size; 3326 ql_dbg(ql_dbg_init, vha, 0x00c5, 3327 "Re-Allocated (%d KB) and save firmware dump.\n", 3328 dump_size / 1024); 3329 } else { 3330 if (ha->fw_dump) 3331 vfree(ha->fw_dump); 3332 ha->fw_dump = fw_dump; 3333 3334 ha->fw_dump_len = ha->fw_dump_alloc_len = 3335 dump_size; 3336 ql_dbg(ql_dbg_init, vha, 0x00c5, 3337 "Allocated (%d KB) for firmware dump.\n", 3338 dump_size / 1024); 3339 3340 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3341 ha->mpi_fw_dump = (char *)fw_dump + 3342 ha->fwdt[1].dump_size; 3343 mutex_unlock(&ha->optrom_mutex); 3344 return; 3345 } 3346 3347 ha->fw_dump->signature[0] = 'Q'; 3348 ha->fw_dump->signature[1] = 'L'; 3349 ha->fw_dump->signature[2] = 'G'; 3350 ha->fw_dump->signature[3] = 'C'; 3351 ha->fw_dump->version = htonl(1); 3352 3353 ha->fw_dump->fixed_size = htonl(fixed_size); 3354 ha->fw_dump->mem_size = htonl(mem_size); 3355 ha->fw_dump->req_q_size = htonl(req_q_size); 3356 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3357 3358 ha->fw_dump->eft_size = htonl(eft_size); 3359 ha->fw_dump->eft_addr_l = 3360 htonl(LSD(ha->eft_dma)); 3361 ha->fw_dump->eft_addr_h = 3362 htonl(MSD(ha->eft_dma)); 3363 3364 ha->fw_dump->header_size = 3365 htonl(offsetof 3366 (struct qla2xxx_fw_dump, isp)); 3367 } 3368 mutex_unlock(&ha->optrom_mutex); 3369 } 3370 } 3371 } 3372 3373 static int 3374 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3375 { 3376 #define MPS_MASK 0xe0 3377 int rval; 3378 uint16_t dc; 3379 uint32_t dw; 3380 3381 if (!IS_QLA81XX(vha->hw)) 3382 return QLA_SUCCESS; 3383 3384 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3385 if (rval != QLA_SUCCESS) { 3386 ql_log(ql_log_warn, vha, 0x0105, 3387 "Unable to acquire semaphore.\n"); 3388 goto done; 3389 } 3390 3391 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3392 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3393 if (rval != QLA_SUCCESS) { 3394 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3395 goto done_release; 3396 } 3397 3398 dc &= MPS_MASK; 3399 if (dc == (dw & MPS_MASK)) 3400 goto done_release; 3401 3402 dw &= ~MPS_MASK; 3403 dw |= dc; 3404 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3405 if (rval != QLA_SUCCESS) { 3406 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3407 } 3408 3409 done_release: 3410 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3411 if (rval != QLA_SUCCESS) { 3412 ql_log(ql_log_warn, vha, 0x006d, 3413 "Unable to release semaphore.\n"); 3414 } 3415 3416 done: 3417 return rval; 3418 } 3419 3420 int 3421 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3422 { 3423 /* Don't try to reallocate the array */ 3424 if (req->outstanding_cmds) 3425 return QLA_SUCCESS; 3426 3427 if (!IS_FWI2_CAPABLE(ha)) 3428 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3429 else { 3430 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3431 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3432 else 3433 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3434 } 3435 3436 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3437 sizeof(srb_t *), 3438 GFP_KERNEL); 3439 3440 if (!req->outstanding_cmds) { 3441 /* 3442 * Try to allocate a minimal size just so we can get through 3443 * initialization. 3444 */ 3445 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3446 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3447 sizeof(srb_t *), 3448 GFP_KERNEL); 3449 3450 if (!req->outstanding_cmds) { 3451 ql_log(ql_log_fatal, NULL, 0x0126, 3452 "Failed to allocate memory for " 3453 "outstanding_cmds for req_que %p.\n", req); 3454 req->num_outstanding_cmds = 0; 3455 return QLA_FUNCTION_FAILED; 3456 } 3457 } 3458 3459 return QLA_SUCCESS; 3460 } 3461 3462 #define PRINT_FIELD(_field, _flag, _str) { \ 3463 if (a0->_field & _flag) {\ 3464 if (p) {\ 3465 strcat(ptr, "|");\ 3466 ptr++;\ 3467 leftover--;\ 3468 } \ 3469 len = snprintf(ptr, leftover, "%s", _str); \ 3470 p = 1;\ 3471 leftover -= len;\ 3472 ptr += len; \ 3473 } \ 3474 } 3475 3476 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3477 { 3478 #define STR_LEN 64 3479 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3480 u8 str[STR_LEN], *ptr, p; 3481 int leftover, len; 3482 3483 memset(str, 0, STR_LEN); 3484 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3485 ql_dbg(ql_dbg_init, vha, 0x015a, 3486 "SFP MFG Name: %s\n", str); 3487 3488 memset(str, 0, STR_LEN); 3489 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3490 ql_dbg(ql_dbg_init, vha, 0x015c, 3491 "SFP Part Name: %s\n", str); 3492 3493 /* media */ 3494 memset(str, 0, STR_LEN); 3495 ptr = str; 3496 leftover = STR_LEN; 3497 p = len = 0; 3498 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3499 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3500 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3501 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3502 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3503 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3504 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3505 ql_dbg(ql_dbg_init, vha, 0x0160, 3506 "SFP Media: %s\n", str); 3507 3508 /* link length */ 3509 memset(str, 0, STR_LEN); 3510 ptr = str; 3511 leftover = STR_LEN; 3512 p = len = 0; 3513 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3514 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3515 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3516 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3517 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3518 ql_dbg(ql_dbg_init, vha, 0x0196, 3519 "SFP Link Length: %s\n", str); 3520 3521 memset(str, 0, STR_LEN); 3522 ptr = str; 3523 leftover = STR_LEN; 3524 p = len = 0; 3525 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3526 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3527 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3528 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3529 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3530 ql_dbg(ql_dbg_init, vha, 0x016e, 3531 "SFP FC Link Tech: %s\n", str); 3532 3533 if (a0->length_km) 3534 ql_dbg(ql_dbg_init, vha, 0x016f, 3535 "SFP Distant: %d km\n", a0->length_km); 3536 if (a0->length_100m) 3537 ql_dbg(ql_dbg_init, vha, 0x0170, 3538 "SFP Distant: %d m\n", a0->length_100m*100); 3539 if (a0->length_50um_10m) 3540 ql_dbg(ql_dbg_init, vha, 0x0189, 3541 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3542 if (a0->length_62um_10m) 3543 ql_dbg(ql_dbg_init, vha, 0x018a, 3544 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3545 if (a0->length_om4_10m) 3546 ql_dbg(ql_dbg_init, vha, 0x0194, 3547 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3548 if (a0->length_om3_10m) 3549 ql_dbg(ql_dbg_init, vha, 0x0195, 3550 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3551 } 3552 3553 3554 /** 3555 * qla24xx_detect_sfp() 3556 * 3557 * @vha: adapter state pointer. 3558 * 3559 * @return 3560 * 0 -- Configure firmware to use short-range settings -- normal 3561 * buffer-to-buffer credits. 3562 * 3563 * 1 -- Configure firmware to use long-range settings -- extra 3564 * buffer-to-buffer credits should be allocated with 3565 * ha->lr_distance containing distance settings from NVRAM or SFP 3566 * (if supported). 3567 */ 3568 int 3569 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3570 { 3571 int rc, used_nvram; 3572 struct sff_8247_a0 *a; 3573 struct qla_hw_data *ha = vha->hw; 3574 struct nvram_81xx *nv = ha->nvram; 3575 #define LR_DISTANCE_UNKNOWN 2 3576 static const char * const types[] = { "Short", "Long" }; 3577 static const char * const lengths[] = { "(10km)", "(5km)", "" }; 3578 u8 ll = 0; 3579 3580 /* Seed with NVRAM settings. */ 3581 used_nvram = 0; 3582 ha->flags.lr_detected = 0; 3583 if (IS_BPM_RANGE_CAPABLE(ha) && 3584 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) { 3585 used_nvram = 1; 3586 ha->flags.lr_detected = 1; 3587 ha->lr_distance = 3588 (nv->enhanced_features >> LR_DIST_NV_POS) 3589 & LR_DIST_NV_MASK; 3590 } 3591 3592 if (!IS_BPM_ENABLED(vha)) 3593 goto out; 3594 /* Determine SR/LR capabilities of SFP/Transceiver. */ 3595 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3596 if (rc) 3597 goto out; 3598 3599 used_nvram = 0; 3600 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3601 qla2xxx_print_sfp_info(vha); 3602 3603 ha->flags.lr_detected = 0; 3604 ll = a->fc_ll_cc7; 3605 if (ll & FC_LL_VL || ll & FC_LL_L) { 3606 /* Long range, track length. */ 3607 ha->flags.lr_detected = 1; 3608 3609 if (a->length_km > 5 || a->length_100m > 50) 3610 ha->lr_distance = LR_DISTANCE_10K; 3611 else 3612 ha->lr_distance = LR_DISTANCE_5K; 3613 } 3614 3615 out: 3616 ql_dbg(ql_dbg_async, vha, 0x507b, 3617 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n", 3618 types[ha->flags.lr_detected], 3619 ha->flags.lr_detected ? lengths[ha->lr_distance] : 3620 lengths[LR_DISTANCE_UNKNOWN], 3621 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance); 3622 return ha->flags.lr_detected; 3623 } 3624 3625 /** 3626 * qla2x00_setup_chip() - Load and start RISC firmware. 3627 * @vha: HA context 3628 * 3629 * Returns 0 on success. 3630 */ 3631 static int 3632 qla2x00_setup_chip(scsi_qla_host_t *vha) 3633 { 3634 int rval; 3635 uint32_t srisc_address = 0; 3636 struct qla_hw_data *ha = vha->hw; 3637 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3638 unsigned long flags; 3639 uint16_t fw_major_version; 3640 int done_once = 0; 3641 3642 if (IS_P3P_TYPE(ha)) { 3643 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3644 if (rval == QLA_SUCCESS) { 3645 qla2x00_stop_firmware(vha); 3646 goto enable_82xx_npiv; 3647 } else 3648 goto failed; 3649 } 3650 3651 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3652 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3653 spin_lock_irqsave(&ha->hardware_lock, flags); 3654 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3655 rd_reg_word(®->hccr); 3656 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3657 } 3658 3659 qla81xx_mpi_sync(vha); 3660 3661 execute_fw_with_lr: 3662 /* Load firmware sequences */ 3663 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3664 if (rval == QLA_SUCCESS) { 3665 ql_dbg(ql_dbg_init, vha, 0x00c9, 3666 "Verifying Checksum of loaded RISC code.\n"); 3667 3668 rval = qla2x00_verify_checksum(vha, srisc_address); 3669 if (rval == QLA_SUCCESS) { 3670 /* Start firmware execution. */ 3671 ql_dbg(ql_dbg_init, vha, 0x00ca, 3672 "Starting firmware.\n"); 3673 3674 if (ql2xexlogins) 3675 ha->flags.exlogins_enabled = 1; 3676 3677 if (qla_is_exch_offld_enabled(vha)) 3678 ha->flags.exchoffld_enabled = 1; 3679 3680 rval = qla2x00_execute_fw(vha, srisc_address); 3681 /* Retrieve firmware information. */ 3682 if (rval == QLA_SUCCESS) { 3683 /* Enable BPM support? */ 3684 if (!done_once++ && qla24xx_detect_sfp(vha)) { 3685 ql_dbg(ql_dbg_init, vha, 0x00ca, 3686 "Re-starting firmware -- BPM.\n"); 3687 /* Best-effort - re-init. */ 3688 ha->isp_ops->reset_chip(vha); 3689 ha->isp_ops->chip_diag(vha); 3690 goto execute_fw_with_lr; 3691 } 3692 3693 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3694 IS_QLA28XX(ha)) && 3695 (ha->zio_mode == QLA_ZIO_MODE_6)) 3696 qla27xx_set_zio_threshold(vha, 3697 ha->last_zio_threshold); 3698 3699 rval = qla2x00_set_exlogins_buffer(vha); 3700 if (rval != QLA_SUCCESS) 3701 goto failed; 3702 3703 rval = qla2x00_set_exchoffld_buffer(vha); 3704 if (rval != QLA_SUCCESS) 3705 goto failed; 3706 3707 enable_82xx_npiv: 3708 fw_major_version = ha->fw_major_version; 3709 if (IS_P3P_TYPE(ha)) 3710 qla82xx_check_md_needed(vha); 3711 else 3712 rval = qla2x00_get_fw_version(vha); 3713 if (rval != QLA_SUCCESS) 3714 goto failed; 3715 ha->flags.npiv_supported = 0; 3716 if (IS_QLA2XXX_MIDTYPE(ha) && 3717 (ha->fw_attributes & BIT_2)) { 3718 ha->flags.npiv_supported = 1; 3719 if ((!ha->max_npiv_vports) || 3720 ((ha->max_npiv_vports + 1) % 3721 MIN_MULTI_ID_FABRIC)) 3722 ha->max_npiv_vports = 3723 MIN_MULTI_ID_FABRIC - 1; 3724 } 3725 qla2x00_get_resource_cnts(vha); 3726 3727 /* 3728 * Allocate the array of outstanding commands 3729 * now that we know the firmware resources. 3730 */ 3731 rval = qla2x00_alloc_outstanding_cmds(ha, 3732 vha->req); 3733 if (rval != QLA_SUCCESS) 3734 goto failed; 3735 3736 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3737 qla2x00_alloc_offload_mem(vha); 3738 3739 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3740 qla2x00_alloc_fw_dump(vha); 3741 3742 } else { 3743 goto failed; 3744 } 3745 } else { 3746 ql_log(ql_log_fatal, vha, 0x00cd, 3747 "ISP Firmware failed checksum.\n"); 3748 goto failed; 3749 } 3750 3751 /* Enable PUREX PASSTHRU */ 3752 if (ql2xrdpenable || ha->flags.scm_supported_f) 3753 qla25xx_set_els_cmds_supported(vha); 3754 } else 3755 goto failed; 3756 3757 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3758 /* Enable proper parity. */ 3759 spin_lock_irqsave(&ha->hardware_lock, flags); 3760 if (IS_QLA2300(ha)) 3761 /* SRAM parity */ 3762 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3763 else 3764 /* SRAM, Instruction RAM and GP RAM parity */ 3765 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3766 rd_reg_word(®->hccr); 3767 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3768 } 3769 3770 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3771 ha->flags.fac_supported = 1; 3772 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3773 uint32_t size; 3774 3775 rval = qla81xx_fac_get_sector_size(vha, &size); 3776 if (rval == QLA_SUCCESS) { 3777 ha->flags.fac_supported = 1; 3778 ha->fdt_block_size = size << 2; 3779 } else { 3780 ql_log(ql_log_warn, vha, 0x00ce, 3781 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3782 ha->fw_major_version, ha->fw_minor_version, 3783 ha->fw_subminor_version); 3784 3785 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3786 IS_QLA28XX(ha)) { 3787 ha->flags.fac_supported = 0; 3788 rval = QLA_SUCCESS; 3789 } 3790 } 3791 } 3792 failed: 3793 if (rval) { 3794 ql_log(ql_log_fatal, vha, 0x00cf, 3795 "Setup chip ****FAILED****.\n"); 3796 } 3797 3798 return (rval); 3799 } 3800 3801 /** 3802 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3803 * @rsp: response queue 3804 * 3805 * Beginning of request ring has initialization control block already built 3806 * by nvram config routine. 3807 * 3808 * Returns 0 on success. 3809 */ 3810 void 3811 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3812 { 3813 uint16_t cnt; 3814 response_t *pkt; 3815 3816 rsp->ring_ptr = rsp->ring; 3817 rsp->ring_index = 0; 3818 rsp->status_srb = NULL; 3819 pkt = rsp->ring_ptr; 3820 for (cnt = 0; cnt < rsp->length; cnt++) { 3821 pkt->signature = RESPONSE_PROCESSED; 3822 pkt++; 3823 } 3824 } 3825 3826 /** 3827 * qla2x00_update_fw_options() - Read and process firmware options. 3828 * @vha: HA context 3829 * 3830 * Returns 0 on success. 3831 */ 3832 void 3833 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3834 { 3835 uint16_t swing, emphasis, tx_sens, rx_sens; 3836 struct qla_hw_data *ha = vha->hw; 3837 3838 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3839 qla2x00_get_fw_options(vha, ha->fw_options); 3840 3841 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3842 return; 3843 3844 /* Serial Link options. */ 3845 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3846 "Serial link options.\n"); 3847 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3848 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 3849 3850 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3851 if (ha->fw_seriallink_options[3] & BIT_2) { 3852 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3853 3854 /* 1G settings */ 3855 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3856 emphasis = (ha->fw_seriallink_options[2] & 3857 (BIT_4 | BIT_3)) >> 3; 3858 tx_sens = ha->fw_seriallink_options[0] & 3859 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3860 rx_sens = (ha->fw_seriallink_options[0] & 3861 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3862 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3863 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3864 if (rx_sens == 0x0) 3865 rx_sens = 0x3; 3866 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3867 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3868 ha->fw_options[10] |= BIT_5 | 3869 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3870 (tx_sens & (BIT_1 | BIT_0)); 3871 3872 /* 2G settings */ 3873 swing = (ha->fw_seriallink_options[2] & 3874 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3875 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3876 tx_sens = ha->fw_seriallink_options[1] & 3877 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3878 rx_sens = (ha->fw_seriallink_options[1] & 3879 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3880 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3881 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3882 if (rx_sens == 0x0) 3883 rx_sens = 0x3; 3884 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3885 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3886 ha->fw_options[11] |= BIT_5 | 3887 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3888 (tx_sens & (BIT_1 | BIT_0)); 3889 } 3890 3891 /* FCP2 options. */ 3892 /* Return command IOCBs without waiting for an ABTS to complete. */ 3893 ha->fw_options[3] |= BIT_13; 3894 3895 /* LED scheme. */ 3896 if (ha->flags.enable_led_scheme) 3897 ha->fw_options[2] |= BIT_12; 3898 3899 /* Detect ISP6312. */ 3900 if (IS_QLA6312(ha)) 3901 ha->fw_options[2] |= BIT_13; 3902 3903 /* Set Retry FLOGI in case of P2P connection */ 3904 if (ha->operating_mode == P2P) { 3905 ha->fw_options[2] |= BIT_3; 3906 ql_dbg(ql_dbg_disc, vha, 0x2100, 3907 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3908 __func__, ha->fw_options[2]); 3909 } 3910 3911 /* Update firmware options. */ 3912 qla2x00_set_fw_options(vha, ha->fw_options); 3913 } 3914 3915 void 3916 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3917 { 3918 int rval; 3919 struct qla_hw_data *ha = vha->hw; 3920 3921 if (IS_P3P_TYPE(ha)) 3922 return; 3923 3924 /* Hold status IOCBs until ABTS response received. */ 3925 if (ql2xfwholdabts) 3926 ha->fw_options[3] |= BIT_12; 3927 3928 /* Set Retry FLOGI in case of P2P connection */ 3929 if (ha->operating_mode == P2P) { 3930 ha->fw_options[2] |= BIT_3; 3931 ql_dbg(ql_dbg_disc, vha, 0x2101, 3932 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3933 __func__, ha->fw_options[2]); 3934 } 3935 3936 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3937 if (ql2xmvasynctoatio && 3938 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 3939 if (qla_tgt_mode_enabled(vha) || 3940 qla_dual_mode_enabled(vha)) 3941 ha->fw_options[2] |= BIT_11; 3942 else 3943 ha->fw_options[2] &= ~BIT_11; 3944 } 3945 3946 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3947 IS_QLA28XX(ha)) { 3948 /* 3949 * Tell FW to track each exchange to prevent 3950 * driver from using stale exchange. 3951 */ 3952 if (qla_tgt_mode_enabled(vha) || 3953 qla_dual_mode_enabled(vha)) 3954 ha->fw_options[2] |= BIT_4; 3955 else 3956 ha->fw_options[2] &= ~BIT_4; 3957 3958 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3959 if (qla2xuseresexchforels) 3960 ha->fw_options[2] |= BIT_8; 3961 else 3962 ha->fw_options[2] &= ~BIT_8; 3963 } 3964 3965 if (ql2xrdpenable || ha->flags.scm_supported_f) 3966 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB; 3967 3968 /* Enable Async 8130/8131 events -- transceiver insertion/removal */ 3969 if (IS_BPM_RANGE_CAPABLE(ha)) 3970 ha->fw_options[3] |= BIT_10; 3971 3972 ql_dbg(ql_dbg_init, vha, 0x00e8, 3973 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3974 __func__, ha->fw_options[1], ha->fw_options[2], 3975 ha->fw_options[3], vha->host->active_mode); 3976 3977 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3978 qla2x00_set_fw_options(vha, ha->fw_options); 3979 3980 /* Update Serial Link options. */ 3981 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3982 return; 3983 3984 rval = qla2x00_set_serdes_params(vha, 3985 le16_to_cpu(ha->fw_seriallink_options24[1]), 3986 le16_to_cpu(ha->fw_seriallink_options24[2]), 3987 le16_to_cpu(ha->fw_seriallink_options24[3])); 3988 if (rval != QLA_SUCCESS) { 3989 ql_log(ql_log_warn, vha, 0x0104, 3990 "Unable to update Serial Link options (%x).\n", rval); 3991 } 3992 } 3993 3994 void 3995 qla2x00_config_rings(struct scsi_qla_host *vha) 3996 { 3997 struct qla_hw_data *ha = vha->hw; 3998 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3999 struct req_que *req = ha->req_q_map[0]; 4000 struct rsp_que *rsp = ha->rsp_q_map[0]; 4001 4002 /* Setup ring parameters in initialization control block. */ 4003 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 4004 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 4005 ha->init_cb->request_q_length = cpu_to_le16(req->length); 4006 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 4007 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 4008 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 4009 4010 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0); 4011 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0); 4012 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0); 4013 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0); 4014 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 4015 } 4016 4017 void 4018 qla24xx_config_rings(struct scsi_qla_host *vha) 4019 { 4020 struct qla_hw_data *ha = vha->hw; 4021 device_reg_t *reg = ISP_QUE_REG(ha, 0); 4022 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 4023 struct qla_msix_entry *msix; 4024 struct init_cb_24xx *icb; 4025 uint16_t rid = 0; 4026 struct req_que *req = ha->req_q_map[0]; 4027 struct rsp_que *rsp = ha->rsp_q_map[0]; 4028 4029 /* Setup ring parameters in initialization control block. */ 4030 icb = (struct init_cb_24xx *)ha->init_cb; 4031 icb->request_q_outpointer = cpu_to_le16(0); 4032 icb->response_q_inpointer = cpu_to_le16(0); 4033 icb->request_q_length = cpu_to_le16(req->length); 4034 icb->response_q_length = cpu_to_le16(rsp->length); 4035 put_unaligned_le64(req->dma, &icb->request_q_address); 4036 put_unaligned_le64(rsp->dma, &icb->response_q_address); 4037 4038 /* Setup ATIO queue dma pointers for target mode */ 4039 icb->atio_q_inpointer = cpu_to_le16(0); 4040 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 4041 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 4042 4043 if (IS_SHADOW_REG_CAPABLE(ha)) 4044 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 4045 4046 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4047 IS_QLA28XX(ha)) { 4048 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 4049 icb->rid = cpu_to_le16(rid); 4050 if (ha->flags.msix_enabled) { 4051 msix = &ha->msix_entries[1]; 4052 ql_dbg(ql_dbg_init, vha, 0x0019, 4053 "Registering vector 0x%x for base que.\n", 4054 msix->entry); 4055 icb->msix = cpu_to_le16(msix->entry); 4056 } 4057 /* Use alternate PCI bus number */ 4058 if (MSB(rid)) 4059 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 4060 /* Use alternate PCI devfn */ 4061 if (LSB(rid)) 4062 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 4063 4064 /* Use Disable MSIX Handshake mode for capable adapters */ 4065 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 4066 (ha->flags.msix_enabled)) { 4067 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 4068 ha->flags.disable_msix_handshake = 1; 4069 ql_dbg(ql_dbg_init, vha, 0x00fe, 4070 "MSIX Handshake Disable Mode turned on.\n"); 4071 } else { 4072 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 4073 } 4074 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4075 4076 wrt_reg_dword(®->isp25mq.req_q_in, 0); 4077 wrt_reg_dword(®->isp25mq.req_q_out, 0); 4078 wrt_reg_dword(®->isp25mq.rsp_q_in, 0); 4079 wrt_reg_dword(®->isp25mq.rsp_q_out, 0); 4080 } else { 4081 wrt_reg_dword(®->isp24.req_q_in, 0); 4082 wrt_reg_dword(®->isp24.req_q_out, 0); 4083 wrt_reg_dword(®->isp24.rsp_q_in, 0); 4084 wrt_reg_dword(®->isp24.rsp_q_out, 0); 4085 } 4086 4087 qlt_24xx_config_rings(vha); 4088 4089 /* If the user has configured the speed, set it here */ 4090 if (ha->set_data_rate) { 4091 ql_dbg(ql_dbg_init, vha, 0x00fd, 4092 "Speed set by user : %s Gbps \n", 4093 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4094 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13); 4095 } 4096 4097 /* PCI posting */ 4098 rd_reg_word(&ioreg->hccr); 4099 } 4100 4101 /** 4102 * qla2x00_init_rings() - Initializes firmware. 4103 * @vha: HA context 4104 * 4105 * Beginning of request ring has initialization control block already built 4106 * by nvram config routine. 4107 * 4108 * Returns 0 on success. 4109 */ 4110 int 4111 qla2x00_init_rings(scsi_qla_host_t *vha) 4112 { 4113 int rval; 4114 unsigned long flags = 0; 4115 int cnt, que; 4116 struct qla_hw_data *ha = vha->hw; 4117 struct req_que *req; 4118 struct rsp_que *rsp; 4119 struct mid_init_cb_24xx *mid_init_cb = 4120 (struct mid_init_cb_24xx *) ha->init_cb; 4121 4122 spin_lock_irqsave(&ha->hardware_lock, flags); 4123 4124 /* Clear outstanding commands array. */ 4125 for (que = 0; que < ha->max_req_queues; que++) { 4126 req = ha->req_q_map[que]; 4127 if (!req || !test_bit(que, ha->req_qid_map)) 4128 continue; 4129 req->out_ptr = (uint16_t *)(req->ring + req->length); 4130 *req->out_ptr = 0; 4131 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4132 req->outstanding_cmds[cnt] = NULL; 4133 4134 req->current_outstanding_cmd = 1; 4135 4136 /* Initialize firmware. */ 4137 req->ring_ptr = req->ring; 4138 req->ring_index = 0; 4139 req->cnt = req->length; 4140 } 4141 4142 for (que = 0; que < ha->max_rsp_queues; que++) { 4143 rsp = ha->rsp_q_map[que]; 4144 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4145 continue; 4146 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length); 4147 *rsp->in_ptr = 0; 4148 /* Initialize response queue entries */ 4149 if (IS_QLAFX00(ha)) 4150 qlafx00_init_response_q_entries(rsp); 4151 else 4152 qla2x00_init_response_q_entries(rsp); 4153 } 4154 4155 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4156 ha->tgt.atio_ring_index = 0; 4157 /* Initialize ATIO queue entries */ 4158 qlt_init_atio_q_entries(vha); 4159 4160 ha->isp_ops->config_rings(vha); 4161 4162 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4163 4164 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 4165 4166 if (IS_QLAFX00(ha)) { 4167 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4168 goto next_check; 4169 } 4170 4171 /* Update any ISP specific firmware options before initialization. */ 4172 ha->isp_ops->update_fw_options(vha); 4173 4174 if (ha->flags.npiv_supported) { 4175 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4176 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4177 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4178 } 4179 4180 if (IS_FWI2_CAPABLE(ha)) { 4181 mid_init_cb->options = cpu_to_le16(BIT_1); 4182 mid_init_cb->init_cb.execution_throttle = 4183 cpu_to_le16(ha->cur_fw_xcb_count); 4184 ha->flags.dport_enabled = 4185 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4186 BIT_7) != 0; 4187 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4188 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4189 /* FA-WWPN Status */ 4190 ha->flags.fawwpn_enabled = 4191 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4192 BIT_6) != 0; 4193 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4194 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4195 } 4196 4197 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4198 next_check: 4199 if (rval) { 4200 ql_log(ql_log_fatal, vha, 0x00d2, 4201 "Init Firmware **** FAILED ****.\n"); 4202 } else { 4203 ql_dbg(ql_dbg_init, vha, 0x00d3, 4204 "Init Firmware -- success.\n"); 4205 QLA_FW_STARTED(ha); 4206 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4207 } 4208 4209 return (rval); 4210 } 4211 4212 /** 4213 * qla2x00_fw_ready() - Waits for firmware ready. 4214 * @vha: HA context 4215 * 4216 * Returns 0 on success. 4217 */ 4218 static int 4219 qla2x00_fw_ready(scsi_qla_host_t *vha) 4220 { 4221 int rval; 4222 unsigned long wtime, mtime, cs84xx_time; 4223 uint16_t min_wait; /* Minimum wait time if loop is down */ 4224 uint16_t wait_time; /* Wait time if loop is coming ready */ 4225 uint16_t state[6]; 4226 struct qla_hw_data *ha = vha->hw; 4227 4228 if (IS_QLAFX00(vha->hw)) 4229 return qlafx00_fw_ready(vha); 4230 4231 rval = QLA_SUCCESS; 4232 4233 /* Time to wait for loop down */ 4234 if (IS_P3P_TYPE(ha)) 4235 min_wait = 30; 4236 else 4237 min_wait = 20; 4238 4239 /* 4240 * Firmware should take at most one RATOV to login, plus 5 seconds for 4241 * our own processing. 4242 */ 4243 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4244 wait_time = min_wait; 4245 } 4246 4247 /* Min wait time if loop down */ 4248 mtime = jiffies + (min_wait * HZ); 4249 4250 /* wait time before firmware ready */ 4251 wtime = jiffies + (wait_time * HZ); 4252 4253 /* Wait for ISP to finish LIP */ 4254 if (!vha->flags.init_done) 4255 ql_log(ql_log_info, vha, 0x801e, 4256 "Waiting for LIP to complete.\n"); 4257 4258 do { 4259 memset(state, -1, sizeof(state)); 4260 rval = qla2x00_get_firmware_state(vha, state); 4261 if (rval == QLA_SUCCESS) { 4262 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4263 vha->device_flags &= ~DFLG_NO_CABLE; 4264 } 4265 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4266 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4267 "fw_state=%x 84xx=%x.\n", state[0], 4268 state[2]); 4269 if ((state[2] & FSTATE_LOGGED_IN) && 4270 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4271 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4272 "Sending verify iocb.\n"); 4273 4274 cs84xx_time = jiffies; 4275 rval = qla84xx_init_chip(vha); 4276 if (rval != QLA_SUCCESS) { 4277 ql_log(ql_log_warn, 4278 vha, 0x8007, 4279 "Init chip failed.\n"); 4280 break; 4281 } 4282 4283 /* Add time taken to initialize. */ 4284 cs84xx_time = jiffies - cs84xx_time; 4285 wtime += cs84xx_time; 4286 mtime += cs84xx_time; 4287 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4288 "Increasing wait time by %ld. " 4289 "New time %ld.\n", cs84xx_time, 4290 wtime); 4291 } 4292 } else if (state[0] == FSTATE_READY) { 4293 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4294 "F/W Ready - OK.\n"); 4295 4296 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4297 &ha->login_timeout, &ha->r_a_tov); 4298 4299 rval = QLA_SUCCESS; 4300 break; 4301 } 4302 4303 rval = QLA_FUNCTION_FAILED; 4304 4305 if (atomic_read(&vha->loop_down_timer) && 4306 state[0] != FSTATE_READY) { 4307 /* Loop down. Timeout on min_wait for states 4308 * other than Wait for Login. 4309 */ 4310 if (time_after_eq(jiffies, mtime)) { 4311 ql_log(ql_log_info, vha, 0x8038, 4312 "Cable is unplugged...\n"); 4313 4314 vha->device_flags |= DFLG_NO_CABLE; 4315 break; 4316 } 4317 } 4318 } else { 4319 /* Mailbox cmd failed. Timeout on min_wait. */ 4320 if (time_after_eq(jiffies, mtime) || 4321 ha->flags.isp82xx_fw_hung) 4322 break; 4323 } 4324 4325 if (time_after_eq(jiffies, wtime)) 4326 break; 4327 4328 /* Delay for a while */ 4329 msleep(500); 4330 } while (1); 4331 4332 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4333 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4334 state[1], state[2], state[3], state[4], state[5], jiffies); 4335 4336 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4337 ql_log(ql_log_warn, vha, 0x803b, 4338 "Firmware ready **** FAILED ****.\n"); 4339 } 4340 4341 return (rval); 4342 } 4343 4344 /* 4345 * qla2x00_configure_hba 4346 * Setup adapter context. 4347 * 4348 * Input: 4349 * ha = adapter state pointer. 4350 * 4351 * Returns: 4352 * 0 = success 4353 * 4354 * Context: 4355 * Kernel context. 4356 */ 4357 static int 4358 qla2x00_configure_hba(scsi_qla_host_t *vha) 4359 { 4360 int rval; 4361 uint16_t loop_id; 4362 uint16_t topo; 4363 uint16_t sw_cap; 4364 uint8_t al_pa; 4365 uint8_t area; 4366 uint8_t domain; 4367 char connect_type[22]; 4368 struct qla_hw_data *ha = vha->hw; 4369 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4370 port_id_t id; 4371 unsigned long flags; 4372 4373 /* Get host addresses. */ 4374 rval = qla2x00_get_adapter_id(vha, 4375 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4376 if (rval != QLA_SUCCESS) { 4377 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4378 IS_CNA_CAPABLE(ha) || 4379 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4380 ql_dbg(ql_dbg_disc, vha, 0x2008, 4381 "Loop is in a transition state.\n"); 4382 } else { 4383 ql_log(ql_log_warn, vha, 0x2009, 4384 "Unable to get host loop ID.\n"); 4385 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4386 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4387 ql_log(ql_log_warn, vha, 0x1151, 4388 "Doing link init.\n"); 4389 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4390 return rval; 4391 } 4392 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4393 } 4394 return (rval); 4395 } 4396 4397 if (topo == 4) { 4398 ql_log(ql_log_info, vha, 0x200a, 4399 "Cannot get topology - retrying.\n"); 4400 return (QLA_FUNCTION_FAILED); 4401 } 4402 4403 vha->loop_id = loop_id; 4404 4405 /* initialize */ 4406 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4407 ha->operating_mode = LOOP; 4408 ha->switch_cap = 0; 4409 4410 switch (topo) { 4411 case 0: 4412 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4413 ha->current_topology = ISP_CFG_NL; 4414 strcpy(connect_type, "(Loop)"); 4415 break; 4416 4417 case 1: 4418 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4419 ha->switch_cap = sw_cap; 4420 ha->current_topology = ISP_CFG_FL; 4421 strcpy(connect_type, "(FL_Port)"); 4422 break; 4423 4424 case 2: 4425 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4426 ha->operating_mode = P2P; 4427 ha->current_topology = ISP_CFG_N; 4428 strcpy(connect_type, "(N_Port-to-N_Port)"); 4429 break; 4430 4431 case 3: 4432 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4433 ha->switch_cap = sw_cap; 4434 ha->operating_mode = P2P; 4435 ha->current_topology = ISP_CFG_F; 4436 strcpy(connect_type, "(F_Port)"); 4437 break; 4438 4439 default: 4440 ql_dbg(ql_dbg_disc, vha, 0x200f, 4441 "HBA in unknown topology %x, using NL.\n", topo); 4442 ha->current_topology = ISP_CFG_NL; 4443 strcpy(connect_type, "(Loop)"); 4444 break; 4445 } 4446 4447 /* Save Host port and loop ID. */ 4448 /* byte order - Big Endian */ 4449 id.b.domain = domain; 4450 id.b.area = area; 4451 id.b.al_pa = al_pa; 4452 id.b.rsvd_1 = 0; 4453 spin_lock_irqsave(&ha->hardware_lock, flags); 4454 if (!(topo == 2 && ha->flags.n2n_bigger)) 4455 qlt_update_host_map(vha, id); 4456 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4457 4458 if (!vha->flags.init_done) 4459 ql_log(ql_log_info, vha, 0x2010, 4460 "Topology - %s, Host Loop address 0x%x.\n", 4461 connect_type, vha->loop_id); 4462 4463 return(rval); 4464 } 4465 4466 inline void 4467 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4468 const char *def) 4469 { 4470 char *st, *en; 4471 uint16_t index; 4472 uint64_t zero[2] = { 0 }; 4473 struct qla_hw_data *ha = vha->hw; 4474 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4475 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4476 4477 if (len > sizeof(zero)) 4478 len = sizeof(zero); 4479 if (memcmp(model, &zero, len) != 0) { 4480 memcpy(ha->model_number, model, len); 4481 st = en = ha->model_number; 4482 en += len - 1; 4483 while (en > st) { 4484 if (*en != 0x20 && *en != 0x00) 4485 break; 4486 *en-- = '\0'; 4487 } 4488 4489 index = (ha->pdev->subsystem_device & 0xff); 4490 if (use_tbl && 4491 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4492 index < QLA_MODEL_NAMES) 4493 strlcpy(ha->model_desc, 4494 qla2x00_model_name[index * 2 + 1], 4495 sizeof(ha->model_desc)); 4496 } else { 4497 index = (ha->pdev->subsystem_device & 0xff); 4498 if (use_tbl && 4499 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4500 index < QLA_MODEL_NAMES) { 4501 strlcpy(ha->model_number, 4502 qla2x00_model_name[index * 2], 4503 sizeof(ha->model_number)); 4504 strlcpy(ha->model_desc, 4505 qla2x00_model_name[index * 2 + 1], 4506 sizeof(ha->model_desc)); 4507 } else { 4508 strlcpy(ha->model_number, def, 4509 sizeof(ha->model_number)); 4510 } 4511 } 4512 if (IS_FWI2_CAPABLE(ha)) 4513 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4514 sizeof(ha->model_desc)); 4515 } 4516 4517 /* On sparc systems, obtain port and node WWN from firmware 4518 * properties. 4519 */ 4520 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4521 { 4522 #ifdef CONFIG_SPARC 4523 struct qla_hw_data *ha = vha->hw; 4524 struct pci_dev *pdev = ha->pdev; 4525 struct device_node *dp = pci_device_to_OF_node(pdev); 4526 const u8 *val; 4527 int len; 4528 4529 val = of_get_property(dp, "port-wwn", &len); 4530 if (val && len >= WWN_SIZE) 4531 memcpy(nv->port_name, val, WWN_SIZE); 4532 4533 val = of_get_property(dp, "node-wwn", &len); 4534 if (val && len >= WWN_SIZE) 4535 memcpy(nv->node_name, val, WWN_SIZE); 4536 #endif 4537 } 4538 4539 /* 4540 * NVRAM configuration for ISP 2xxx 4541 * 4542 * Input: 4543 * ha = adapter block pointer. 4544 * 4545 * Output: 4546 * initialization control block in response_ring 4547 * host adapters parameters in host adapter block 4548 * 4549 * Returns: 4550 * 0 = success. 4551 */ 4552 int 4553 qla2x00_nvram_config(scsi_qla_host_t *vha) 4554 { 4555 int rval; 4556 uint8_t chksum = 0; 4557 uint16_t cnt; 4558 uint8_t *dptr1, *dptr2; 4559 struct qla_hw_data *ha = vha->hw; 4560 init_cb_t *icb = ha->init_cb; 4561 nvram_t *nv = ha->nvram; 4562 uint8_t *ptr = ha->nvram; 4563 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4564 4565 rval = QLA_SUCCESS; 4566 4567 /* Determine NVRAM starting address. */ 4568 ha->nvram_size = sizeof(*nv); 4569 ha->nvram_base = 0; 4570 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4571 if ((rd_reg_word(®->ctrl_status) >> 14) == 1) 4572 ha->nvram_base = 0x80; 4573 4574 /* Get NVRAM data and calculate checksum. */ 4575 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4576 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4577 chksum += *ptr++; 4578 4579 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4580 "Contents of NVRAM.\n"); 4581 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4582 nv, ha->nvram_size); 4583 4584 /* Bad NVRAM data, set defaults parameters. */ 4585 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 4586 nv->nvram_version < 1) { 4587 /* Reset NVRAM data. */ 4588 ql_log(ql_log_warn, vha, 0x0064, 4589 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 4590 chksum, nv->id, nv->nvram_version); 4591 ql_log(ql_log_warn, vha, 0x0065, 4592 "Falling back to " 4593 "functioning (yet invalid -- WWPN) defaults.\n"); 4594 4595 /* 4596 * Set default initialization control block. 4597 */ 4598 memset(nv, 0, ha->nvram_size); 4599 nv->parameter_block_version = ICB_VERSION; 4600 4601 if (IS_QLA23XX(ha)) { 4602 nv->firmware_options[0] = BIT_2 | BIT_1; 4603 nv->firmware_options[1] = BIT_7 | BIT_5; 4604 nv->add_firmware_options[0] = BIT_5; 4605 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4606 nv->frame_payload_size = cpu_to_le16(2048); 4607 nv->special_options[1] = BIT_7; 4608 } else if (IS_QLA2200(ha)) { 4609 nv->firmware_options[0] = BIT_2 | BIT_1; 4610 nv->firmware_options[1] = BIT_7 | BIT_5; 4611 nv->add_firmware_options[0] = BIT_5; 4612 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4613 nv->frame_payload_size = cpu_to_le16(1024); 4614 } else if (IS_QLA2100(ha)) { 4615 nv->firmware_options[0] = BIT_3 | BIT_1; 4616 nv->firmware_options[1] = BIT_5; 4617 nv->frame_payload_size = cpu_to_le16(1024); 4618 } 4619 4620 nv->max_iocb_allocation = cpu_to_le16(256); 4621 nv->execution_throttle = cpu_to_le16(16); 4622 nv->retry_count = 8; 4623 nv->retry_delay = 1; 4624 4625 nv->port_name[0] = 33; 4626 nv->port_name[3] = 224; 4627 nv->port_name[4] = 139; 4628 4629 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4630 4631 nv->login_timeout = 4; 4632 4633 /* 4634 * Set default host adapter parameters 4635 */ 4636 nv->host_p[1] = BIT_2; 4637 nv->reset_delay = 5; 4638 nv->port_down_retry_count = 8; 4639 nv->max_luns_per_target = cpu_to_le16(8); 4640 nv->link_down_timeout = 60; 4641 4642 rval = 1; 4643 } 4644 4645 /* Reset Initialization control block */ 4646 memset(icb, 0, ha->init_cb_size); 4647 4648 /* 4649 * Setup driver NVRAM options. 4650 */ 4651 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4652 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4653 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4654 nv->firmware_options[1] &= ~BIT_4; 4655 4656 if (IS_QLA23XX(ha)) { 4657 nv->firmware_options[0] |= BIT_2; 4658 nv->firmware_options[0] &= ~BIT_3; 4659 nv->special_options[0] &= ~BIT_6; 4660 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4661 4662 if (IS_QLA2300(ha)) { 4663 if (ha->fb_rev == FPM_2310) { 4664 strcpy(ha->model_number, "QLA2310"); 4665 } else { 4666 strcpy(ha->model_number, "QLA2300"); 4667 } 4668 } else { 4669 qla2x00_set_model_info(vha, nv->model_number, 4670 sizeof(nv->model_number), "QLA23xx"); 4671 } 4672 } else if (IS_QLA2200(ha)) { 4673 nv->firmware_options[0] |= BIT_2; 4674 /* 4675 * 'Point-to-point preferred, else loop' is not a safe 4676 * connection mode setting. 4677 */ 4678 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4679 (BIT_5 | BIT_4)) { 4680 /* Force 'loop preferred, else point-to-point'. */ 4681 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4682 nv->add_firmware_options[0] |= BIT_5; 4683 } 4684 strcpy(ha->model_number, "QLA22xx"); 4685 } else /*if (IS_QLA2100(ha))*/ { 4686 strcpy(ha->model_number, "QLA2100"); 4687 } 4688 4689 /* 4690 * Copy over NVRAM RISC parameter block to initialization control block. 4691 */ 4692 dptr1 = (uint8_t *)icb; 4693 dptr2 = (uint8_t *)&nv->parameter_block_version; 4694 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4695 while (cnt--) 4696 *dptr1++ = *dptr2++; 4697 4698 /* Copy 2nd half. */ 4699 dptr1 = (uint8_t *)icb->add_firmware_options; 4700 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4701 while (cnt--) 4702 *dptr1++ = *dptr2++; 4703 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4704 /* Use alternate WWN? */ 4705 if (nv->host_p[1] & BIT_7) { 4706 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4707 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4708 } 4709 4710 /* Prepare nodename */ 4711 if ((icb->firmware_options[1] & BIT_6) == 0) { 4712 /* 4713 * Firmware will apply the following mask if the nodename was 4714 * not provided. 4715 */ 4716 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4717 icb->node_name[0] &= 0xF0; 4718 } 4719 4720 /* 4721 * Set host adapter parameters. 4722 */ 4723 4724 /* 4725 * BIT_7 in the host-parameters section allows for modification to 4726 * internal driver logging. 4727 */ 4728 if (nv->host_p[0] & BIT_7) 4729 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4730 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4731 /* Always load RISC code on non ISP2[12]00 chips. */ 4732 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4733 ha->flags.disable_risc_code_load = 0; 4734 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4735 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4736 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4737 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4738 ha->flags.disable_serdes = 0; 4739 4740 ha->operating_mode = 4741 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4742 4743 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4744 sizeof(ha->fw_seriallink_options)); 4745 4746 /* save HBA serial number */ 4747 ha->serial0 = icb->port_name[5]; 4748 ha->serial1 = icb->port_name[6]; 4749 ha->serial2 = icb->port_name[7]; 4750 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4751 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4752 4753 icb->execution_throttle = cpu_to_le16(0xFFFF); 4754 4755 ha->retry_count = nv->retry_count; 4756 4757 /* Set minimum login_timeout to 4 seconds. */ 4758 if (nv->login_timeout != ql2xlogintimeout) 4759 nv->login_timeout = ql2xlogintimeout; 4760 if (nv->login_timeout < 4) 4761 nv->login_timeout = 4; 4762 ha->login_timeout = nv->login_timeout; 4763 4764 /* Set minimum RATOV to 100 tenths of a second. */ 4765 ha->r_a_tov = 100; 4766 4767 ha->loop_reset_delay = nv->reset_delay; 4768 4769 /* Link Down Timeout = 0: 4770 * 4771 * When Port Down timer expires we will start returning 4772 * I/O's to OS with "DID_NO_CONNECT". 4773 * 4774 * Link Down Timeout != 0: 4775 * 4776 * The driver waits for the link to come up after link down 4777 * before returning I/Os to OS with "DID_NO_CONNECT". 4778 */ 4779 if (nv->link_down_timeout == 0) { 4780 ha->loop_down_abort_time = 4781 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4782 } else { 4783 ha->link_down_timeout = nv->link_down_timeout; 4784 ha->loop_down_abort_time = 4785 (LOOP_DOWN_TIME - ha->link_down_timeout); 4786 } 4787 4788 /* 4789 * Need enough time to try and get the port back. 4790 */ 4791 ha->port_down_retry_count = nv->port_down_retry_count; 4792 if (qlport_down_retry) 4793 ha->port_down_retry_count = qlport_down_retry; 4794 /* Set login_retry_count */ 4795 ha->login_retry_count = nv->retry_count; 4796 if (ha->port_down_retry_count == nv->port_down_retry_count && 4797 ha->port_down_retry_count > 3) 4798 ha->login_retry_count = ha->port_down_retry_count; 4799 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4800 ha->login_retry_count = ha->port_down_retry_count; 4801 if (ql2xloginretrycount) 4802 ha->login_retry_count = ql2xloginretrycount; 4803 4804 icb->lun_enables = cpu_to_le16(0); 4805 icb->command_resource_count = 0; 4806 icb->immediate_notify_resource_count = 0; 4807 icb->timeout = cpu_to_le16(0); 4808 4809 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4810 /* Enable RIO */ 4811 icb->firmware_options[0] &= ~BIT_3; 4812 icb->add_firmware_options[0] &= 4813 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4814 icb->add_firmware_options[0] |= BIT_2; 4815 icb->response_accumulation_timer = 3; 4816 icb->interrupt_delay_timer = 5; 4817 4818 vha->flags.process_response_queue = 1; 4819 } else { 4820 /* Enable ZIO. */ 4821 if (!vha->flags.init_done) { 4822 ha->zio_mode = icb->add_firmware_options[0] & 4823 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4824 ha->zio_timer = icb->interrupt_delay_timer ? 4825 icb->interrupt_delay_timer : 2; 4826 } 4827 icb->add_firmware_options[0] &= 4828 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4829 vha->flags.process_response_queue = 0; 4830 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4831 ha->zio_mode = QLA_ZIO_MODE_6; 4832 4833 ql_log(ql_log_info, vha, 0x0068, 4834 "ZIO mode %d enabled; timer delay (%d us).\n", 4835 ha->zio_mode, ha->zio_timer * 100); 4836 4837 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4838 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4839 vha->flags.process_response_queue = 1; 4840 } 4841 } 4842 4843 if (rval) { 4844 ql_log(ql_log_warn, vha, 0x0069, 4845 "NVRAM configuration failed.\n"); 4846 } 4847 return (rval); 4848 } 4849 4850 static void 4851 qla2x00_rport_del(void *data) 4852 { 4853 fc_port_t *fcport = data; 4854 struct fc_rport *rport; 4855 unsigned long flags; 4856 4857 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4858 rport = fcport->drport ? fcport->drport : fcport->rport; 4859 fcport->drport = NULL; 4860 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4861 if (rport) { 4862 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4863 "%s %8phN. rport %p roles %x\n", 4864 __func__, fcport->port_name, rport, 4865 rport->roles); 4866 4867 fc_remote_port_delete(rport); 4868 } 4869 } 4870 4871 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 4872 { 4873 int old_state; 4874 4875 old_state = atomic_read(&fcport->state); 4876 atomic_set(&fcport->state, state); 4877 4878 /* Don't print state transitions during initial allocation of fcport */ 4879 if (old_state && old_state != state) { 4880 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 4881 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 4882 fcport->port_name, port_state_str[old_state], 4883 port_state_str[state], fcport->d_id.b.domain, 4884 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4885 } 4886 } 4887 4888 /** 4889 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4890 * @vha: HA context 4891 * @flags: allocation flags 4892 * 4893 * Returns a pointer to the allocated fcport, or NULL, if none available. 4894 */ 4895 fc_port_t * 4896 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4897 { 4898 fc_port_t *fcport; 4899 4900 fcport = kzalloc(sizeof(fc_port_t), flags); 4901 if (!fcport) 4902 return NULL; 4903 4904 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4905 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4906 flags); 4907 if (!fcport->ct_desc.ct_sns) { 4908 ql_log(ql_log_warn, vha, 0xd049, 4909 "Failed to allocate ct_sns request.\n"); 4910 kfree(fcport); 4911 return NULL; 4912 } 4913 4914 /* Setup fcport template structure. */ 4915 fcport->vha = vha; 4916 fcport->port_type = FCT_UNKNOWN; 4917 fcport->loop_id = FC_NO_LOOP_ID; 4918 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4919 fcport->supported_classes = FC_COS_UNSPECIFIED; 4920 fcport->fp_speed = PORT_SPEED_UNKNOWN; 4921 4922 fcport->disc_state = DSC_DELETED; 4923 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4924 fcport->deleted = QLA_SESS_DELETED; 4925 fcport->login_retry = vha->hw->login_retry_count; 4926 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 4927 fcport->logout_on_delete = 1; 4928 4929 if (!fcport->ct_desc.ct_sns) { 4930 ql_log(ql_log_warn, vha, 0xd049, 4931 "Failed to allocate ct_sns request.\n"); 4932 kfree(fcport); 4933 return NULL; 4934 } 4935 4936 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4937 INIT_WORK(&fcport->free_work, qlt_free_session_done); 4938 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 4939 INIT_LIST_HEAD(&fcport->gnl_entry); 4940 INIT_LIST_HEAD(&fcport->list); 4941 4942 return fcport; 4943 } 4944 4945 void 4946 qla2x00_free_fcport(fc_port_t *fcport) 4947 { 4948 if (fcport->ct_desc.ct_sns) { 4949 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4950 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4951 fcport->ct_desc.ct_sns_dma); 4952 4953 fcport->ct_desc.ct_sns = NULL; 4954 } 4955 list_del(&fcport->list); 4956 qla2x00_clear_loop_id(fcport); 4957 kfree(fcport); 4958 } 4959 4960 /* 4961 * qla2x00_configure_loop 4962 * Updates Fibre Channel Device Database with what is actually on loop. 4963 * 4964 * Input: 4965 * ha = adapter block pointer. 4966 * 4967 * Returns: 4968 * 0 = success. 4969 * 1 = error. 4970 * 2 = database was full and device was not configured. 4971 */ 4972 static int 4973 qla2x00_configure_loop(scsi_qla_host_t *vha) 4974 { 4975 int rval; 4976 unsigned long flags, save_flags; 4977 struct qla_hw_data *ha = vha->hw; 4978 4979 rval = QLA_SUCCESS; 4980 4981 /* Get Initiator ID */ 4982 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4983 rval = qla2x00_configure_hba(vha); 4984 if (rval != QLA_SUCCESS) { 4985 ql_dbg(ql_dbg_disc, vha, 0x2013, 4986 "Unable to configure HBA.\n"); 4987 return (rval); 4988 } 4989 } 4990 4991 save_flags = flags = vha->dpc_flags; 4992 ql_dbg(ql_dbg_disc, vha, 0x2014, 4993 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4994 4995 /* 4996 * If we have both an RSCN and PORT UPDATE pending then handle them 4997 * both at the same time. 4998 */ 4999 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5000 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 5001 5002 qla2x00_get_data_rate(vha); 5003 5004 /* Determine what we need to do */ 5005 if ((ha->current_topology == ISP_CFG_FL || 5006 ha->current_topology == ISP_CFG_F) && 5007 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 5008 5009 set_bit(RSCN_UPDATE, &flags); 5010 clear_bit(LOCAL_LOOP_UPDATE, &flags); 5011 5012 } else if (ha->current_topology == ISP_CFG_NL || 5013 ha->current_topology == ISP_CFG_N) { 5014 clear_bit(RSCN_UPDATE, &flags); 5015 set_bit(LOCAL_LOOP_UPDATE, &flags); 5016 } else if (!vha->flags.online || 5017 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 5018 set_bit(RSCN_UPDATE, &flags); 5019 set_bit(LOCAL_LOOP_UPDATE, &flags); 5020 } 5021 5022 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 5023 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5024 ql_dbg(ql_dbg_disc, vha, 0x2015, 5025 "Loop resync needed, failing.\n"); 5026 rval = QLA_FUNCTION_FAILED; 5027 } else 5028 rval = qla2x00_configure_local_loop(vha); 5029 } 5030 5031 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 5032 if (LOOP_TRANSITION(vha)) { 5033 ql_dbg(ql_dbg_disc, vha, 0x2099, 5034 "Needs RSCN update and loop transition.\n"); 5035 rval = QLA_FUNCTION_FAILED; 5036 } 5037 else 5038 rval = qla2x00_configure_fabric(vha); 5039 } 5040 5041 if (rval == QLA_SUCCESS) { 5042 if (atomic_read(&vha->loop_down_timer) || 5043 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5044 rval = QLA_FUNCTION_FAILED; 5045 } else { 5046 atomic_set(&vha->loop_state, LOOP_READY); 5047 ql_dbg(ql_dbg_disc, vha, 0x2069, 5048 "LOOP READY.\n"); 5049 ha->flags.fw_init_done = 1; 5050 5051 /* 5052 * Process any ATIO queue entries that came in 5053 * while we weren't online. 5054 */ 5055 if (qla_tgt_mode_enabled(vha) || 5056 qla_dual_mode_enabled(vha)) { 5057 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 5058 qlt_24xx_process_atio_queue(vha, 0); 5059 spin_unlock_irqrestore(&ha->tgt.atio_lock, 5060 flags); 5061 } 5062 } 5063 } 5064 5065 if (rval) { 5066 ql_dbg(ql_dbg_disc, vha, 0x206a, 5067 "%s *** FAILED ***.\n", __func__); 5068 } else { 5069 ql_dbg(ql_dbg_disc, vha, 0x206b, 5070 "%s: exiting normally.\n", __func__); 5071 } 5072 5073 /* Restore state if a resync event occurred during processing */ 5074 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5075 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5076 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5077 if (test_bit(RSCN_UPDATE, &save_flags)) { 5078 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5079 } 5080 } 5081 5082 return (rval); 5083 } 5084 5085 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha) 5086 { 5087 struct qla_hw_data *ha = vha->hw; 5088 unsigned long flags; 5089 fc_port_t *fcport; 5090 int rval; 5091 5092 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 5093 /* borrowing */ 5094 u32 *bp, sz; 5095 5096 memset(ha->init_cb, 0, ha->init_cb_size); 5097 sz = min_t(int, sizeof(struct els_plogi_payload), 5098 ha->init_cb_size); 5099 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 5100 ha->init_cb, sz); 5101 if (rval == QLA_SUCCESS) { 5102 __be32 *q = &ha->plogi_els_payld.data[0]; 5103 5104 bp = (uint32_t *)ha->init_cb; 5105 cpu_to_be32_array(q, bp, sz / 4); 5106 memcpy(bp, q, sizeof(ha->plogi_els_payld.data)); 5107 } else { 5108 ql_dbg(ql_dbg_init, vha, 0x00d1, 5109 "PLOGI ELS param read fail.\n"); 5110 goto skip_login; 5111 } 5112 } 5113 5114 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5115 if (fcport->n2n_flag) { 5116 qla24xx_fcport_handle_login(vha, fcport); 5117 return QLA_SUCCESS; 5118 } 5119 } 5120 5121 skip_login: 5122 spin_lock_irqsave(&vha->work_lock, flags); 5123 vha->scan.scan_retry++; 5124 spin_unlock_irqrestore(&vha->work_lock, flags); 5125 5126 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5127 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5128 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5129 } 5130 return QLA_FUNCTION_FAILED; 5131 } 5132 5133 /* 5134 * qla2x00_configure_local_loop 5135 * Updates Fibre Channel Device Database with local loop devices. 5136 * 5137 * Input: 5138 * ha = adapter block pointer. 5139 * 5140 * Returns: 5141 * 0 = success. 5142 */ 5143 static int 5144 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5145 { 5146 int rval, rval2; 5147 int found_devs; 5148 int found; 5149 fc_port_t *fcport, *new_fcport; 5150 uint16_t index; 5151 uint16_t entries; 5152 struct gid_list_info *gid; 5153 uint16_t loop_id; 5154 uint8_t domain, area, al_pa; 5155 struct qla_hw_data *ha = vha->hw; 5156 unsigned long flags; 5157 5158 /* Inititae N2N login. */ 5159 if (N2N_TOPO(ha)) 5160 return qla2x00_configure_n2n_loop(vha); 5161 5162 found_devs = 0; 5163 new_fcport = NULL; 5164 entries = MAX_FIBRE_DEVICES_LOOP; 5165 5166 /* Get list of logged in devices. */ 5167 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5168 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5169 &entries); 5170 if (rval != QLA_SUCCESS) 5171 goto err; 5172 5173 ql_dbg(ql_dbg_disc, vha, 0x2011, 5174 "Entries in ID list (%d).\n", entries); 5175 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5176 ha->gid_list, entries * sizeof(*ha->gid_list)); 5177 5178 if (entries == 0) { 5179 spin_lock_irqsave(&vha->work_lock, flags); 5180 vha->scan.scan_retry++; 5181 spin_unlock_irqrestore(&vha->work_lock, flags); 5182 5183 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5184 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5185 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5186 } 5187 } else { 5188 vha->scan.scan_retry = 0; 5189 } 5190 5191 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5192 fcport->scan_state = QLA_FCPORT_SCAN; 5193 } 5194 5195 /* Allocate temporary fcport for any new fcports discovered. */ 5196 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5197 if (new_fcport == NULL) { 5198 ql_log(ql_log_warn, vha, 0x2012, 5199 "Memory allocation failed for fcport.\n"); 5200 rval = QLA_MEMORY_ALLOC_FAILED; 5201 goto err; 5202 } 5203 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5204 5205 /* Add devices to port list. */ 5206 gid = ha->gid_list; 5207 for (index = 0; index < entries; index++) { 5208 domain = gid->domain; 5209 area = gid->area; 5210 al_pa = gid->al_pa; 5211 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5212 loop_id = gid->loop_id_2100; 5213 else 5214 loop_id = le16_to_cpu(gid->loop_id); 5215 gid = (void *)gid + ha->gid_list_info_size; 5216 5217 /* Bypass reserved domain fields. */ 5218 if ((domain & 0xf0) == 0xf0) 5219 continue; 5220 5221 /* Bypass if not same domain and area of adapter. */ 5222 if (area && domain && ((area != vha->d_id.b.area) || 5223 (domain != vha->d_id.b.domain)) && 5224 (ha->current_topology == ISP_CFG_NL)) 5225 continue; 5226 5227 5228 /* Bypass invalid local loop ID. */ 5229 if (loop_id > LAST_LOCAL_LOOP_ID) 5230 continue; 5231 5232 memset(new_fcport->port_name, 0, WWN_SIZE); 5233 5234 /* Fill in member data. */ 5235 new_fcport->d_id.b.domain = domain; 5236 new_fcport->d_id.b.area = area; 5237 new_fcport->d_id.b.al_pa = al_pa; 5238 new_fcport->loop_id = loop_id; 5239 new_fcport->scan_state = QLA_FCPORT_FOUND; 5240 5241 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5242 if (rval2 != QLA_SUCCESS) { 5243 ql_dbg(ql_dbg_disc, vha, 0x2097, 5244 "Failed to retrieve fcport information " 5245 "-- get_port_database=%x, loop_id=0x%04x.\n", 5246 rval2, new_fcport->loop_id); 5247 /* Skip retry if N2N */ 5248 if (ha->current_topology != ISP_CFG_N) { 5249 ql_dbg(ql_dbg_disc, vha, 0x2105, 5250 "Scheduling resync.\n"); 5251 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5252 continue; 5253 } 5254 } 5255 5256 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5257 /* Check for matching device in port list. */ 5258 found = 0; 5259 fcport = NULL; 5260 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5261 if (memcmp(new_fcport->port_name, fcport->port_name, 5262 WWN_SIZE)) 5263 continue; 5264 5265 fcport->flags &= ~FCF_FABRIC_DEVICE; 5266 fcport->loop_id = new_fcport->loop_id; 5267 fcport->port_type = new_fcport->port_type; 5268 fcport->d_id.b24 = new_fcport->d_id.b24; 5269 memcpy(fcport->node_name, new_fcport->node_name, 5270 WWN_SIZE); 5271 fcport->scan_state = QLA_FCPORT_FOUND; 5272 found++; 5273 break; 5274 } 5275 5276 if (!found) { 5277 /* New device, add to fcports list. */ 5278 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5279 5280 /* Allocate a new replacement fcport. */ 5281 fcport = new_fcport; 5282 5283 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5284 5285 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5286 5287 if (new_fcport == NULL) { 5288 ql_log(ql_log_warn, vha, 0xd031, 5289 "Failed to allocate memory for fcport.\n"); 5290 rval = QLA_MEMORY_ALLOC_FAILED; 5291 goto err; 5292 } 5293 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5294 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5295 } 5296 5297 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5298 5299 /* Base iIDMA settings on HBA port speed. */ 5300 fcport->fp_speed = ha->link_data_rate; 5301 5302 found_devs++; 5303 } 5304 5305 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5306 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5307 break; 5308 5309 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5310 if ((qla_dual_mode_enabled(vha) || 5311 qla_ini_mode_enabled(vha)) && 5312 atomic_read(&fcport->state) == FCS_ONLINE) { 5313 qla2x00_mark_device_lost(vha, fcport, 5314 ql2xplogiabsentdevice); 5315 if (fcport->loop_id != FC_NO_LOOP_ID && 5316 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5317 fcport->port_type != FCT_INITIATOR && 5318 fcport->port_type != FCT_BROADCAST) { 5319 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5320 "%s %d %8phC post del sess\n", 5321 __func__, __LINE__, 5322 fcport->port_name); 5323 5324 qlt_schedule_sess_for_deletion(fcport); 5325 continue; 5326 } 5327 } 5328 } 5329 5330 if (fcport->scan_state == QLA_FCPORT_FOUND) 5331 qla24xx_fcport_handle_login(vha, fcport); 5332 } 5333 5334 qla2x00_free_fcport(new_fcport); 5335 5336 return rval; 5337 5338 err: 5339 ql_dbg(ql_dbg_disc, vha, 0x2098, 5340 "Configure local loop error exit: rval=%x.\n", rval); 5341 return rval; 5342 } 5343 5344 static void 5345 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5346 { 5347 int rval; 5348 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5349 struct qla_hw_data *ha = vha->hw; 5350 5351 if (!IS_IIDMA_CAPABLE(ha)) 5352 return; 5353 5354 if (atomic_read(&fcport->state) != FCS_ONLINE) 5355 return; 5356 5357 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5358 fcport->fp_speed > ha->link_data_rate || 5359 !ha->flags.gpsc_supported) 5360 return; 5361 5362 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5363 mb); 5364 if (rval != QLA_SUCCESS) { 5365 ql_dbg(ql_dbg_disc, vha, 0x2004, 5366 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5367 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5368 } else { 5369 ql_dbg(ql_dbg_disc, vha, 0x2005, 5370 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5371 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5372 fcport->fp_speed, fcport->port_name); 5373 } 5374 } 5375 5376 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5377 { 5378 qla2x00_iidma_fcport(vha, fcport); 5379 qla24xx_update_fcport_fcp_prio(vha, fcport); 5380 } 5381 5382 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5383 { 5384 struct qla_work_evt *e; 5385 5386 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5387 if (!e) 5388 return QLA_FUNCTION_FAILED; 5389 5390 e->u.fcport.fcport = fcport; 5391 return qla2x00_post_work(vha, e); 5392 } 5393 5394 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5395 static void 5396 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5397 { 5398 struct fc_rport_identifiers rport_ids; 5399 struct fc_rport *rport; 5400 unsigned long flags; 5401 5402 if (atomic_read(&fcport->state) == FCS_ONLINE) 5403 return; 5404 5405 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5406 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5407 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5408 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5409 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5410 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5411 if (!rport) { 5412 ql_log(ql_log_warn, vha, 0x2006, 5413 "Unable to allocate fc remote port.\n"); 5414 return; 5415 } 5416 5417 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5418 *((fc_port_t **)rport->dd_data) = fcport; 5419 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5420 5421 rport->supported_classes = fcport->supported_classes; 5422 5423 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 5424 if (fcport->port_type == FCT_INITIATOR) 5425 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 5426 if (fcport->port_type == FCT_TARGET) 5427 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 5428 if (fcport->port_type & FCT_NVME_INITIATOR) 5429 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 5430 if (fcport->port_type & FCT_NVME_TARGET) 5431 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 5432 if (fcport->port_type & FCT_NVME_DISCOVERY) 5433 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 5434 5435 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5436 "%s %8phN. rport %p is %s mode\n", 5437 __func__, fcport->port_name, rport, 5438 (fcport->port_type == FCT_TARGET) ? "tgt" : 5439 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5440 5441 fc_remote_port_rolechg(rport, rport_ids.roles); 5442 } 5443 5444 /* 5445 * qla2x00_update_fcport 5446 * Updates device on list. 5447 * 5448 * Input: 5449 * ha = adapter block pointer. 5450 * fcport = port structure pointer. 5451 * 5452 * Return: 5453 * 0 - Success 5454 * BIT_0 - error 5455 * 5456 * Context: 5457 * Kernel context. 5458 */ 5459 void 5460 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5461 { 5462 if (IS_SW_RESV_ADDR(fcport->d_id)) 5463 return; 5464 5465 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5466 __func__, fcport->port_name); 5467 5468 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT); 5469 fcport->login_retry = vha->hw->login_retry_count; 5470 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5471 fcport->deleted = 0; 5472 if (vha->hw->current_topology == ISP_CFG_NL) 5473 fcport->logout_on_delete = 0; 5474 else 5475 fcport->logout_on_delete = 1; 5476 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5477 5478 switch (vha->hw->current_topology) { 5479 case ISP_CFG_N: 5480 case ISP_CFG_NL: 5481 fcport->keep_nport_handle = 1; 5482 break; 5483 default: 5484 break; 5485 } 5486 5487 qla2x00_iidma_fcport(vha, fcport); 5488 5489 if (NVME_TARGET(vha->hw, fcport)) { 5490 qla_nvme_register_remote(vha, fcport); 5491 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5492 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5493 return; 5494 } 5495 5496 qla24xx_update_fcport_fcp_prio(vha, fcport); 5497 5498 switch (vha->host->active_mode) { 5499 case MODE_INITIATOR: 5500 qla2x00_reg_remote_port(vha, fcport); 5501 break; 5502 case MODE_TARGET: 5503 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5504 !vha->vha_tgt.qla_tgt->tgt_stopped) 5505 qlt_fc_port_added(vha, fcport); 5506 break; 5507 case MODE_DUAL: 5508 qla2x00_reg_remote_port(vha, fcport); 5509 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5510 !vha->vha_tgt.qla_tgt->tgt_stopped) 5511 qlt_fc_port_added(vha, fcport); 5512 break; 5513 default: 5514 break; 5515 } 5516 5517 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5518 5519 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5520 if (fcport->id_changed) { 5521 fcport->id_changed = 0; 5522 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5523 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5524 __func__, __LINE__, fcport->port_name, 5525 vha->fcport_count); 5526 qla24xx_post_gfpnid_work(vha, fcport); 5527 } else { 5528 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5529 "%s %d %8phC post gpsc fcp_cnt %d\n", 5530 __func__, __LINE__, fcport->port_name, 5531 vha->fcport_count); 5532 qla24xx_post_gpsc_work(vha, fcport); 5533 } 5534 } 5535 5536 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5537 } 5538 5539 void qla_register_fcport_fn(struct work_struct *work) 5540 { 5541 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5542 u32 rscn_gen = fcport->rscn_gen; 5543 u16 data[2]; 5544 5545 if (IS_SW_RESV_ADDR(fcport->d_id)) 5546 return; 5547 5548 qla2x00_update_fcport(fcport->vha, fcport); 5549 5550 if (rscn_gen != fcport->rscn_gen) { 5551 /* RSCN(s) came in while registration */ 5552 switch (fcport->next_disc_state) { 5553 case DSC_DELETE_PEND: 5554 qlt_schedule_sess_for_deletion(fcport); 5555 break; 5556 case DSC_ADISC: 5557 data[0] = data[1] = 0; 5558 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5559 data); 5560 break; 5561 default: 5562 break; 5563 } 5564 } 5565 } 5566 5567 /* 5568 * qla2x00_configure_fabric 5569 * Setup SNS devices with loop ID's. 5570 * 5571 * Input: 5572 * ha = adapter block pointer. 5573 * 5574 * Returns: 5575 * 0 = success. 5576 * BIT_0 = error 5577 */ 5578 static int 5579 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5580 { 5581 int rval; 5582 fc_port_t *fcport; 5583 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5584 uint16_t loop_id; 5585 LIST_HEAD(new_fcports); 5586 struct qla_hw_data *ha = vha->hw; 5587 int discovery_gen; 5588 5589 /* If FL port exists, then SNS is present */ 5590 if (IS_FWI2_CAPABLE(ha)) 5591 loop_id = NPH_F_PORT; 5592 else 5593 loop_id = SNS_FL_PORT; 5594 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5595 if (rval != QLA_SUCCESS) { 5596 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5597 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5598 5599 vha->device_flags &= ~SWITCH_FOUND; 5600 return (QLA_SUCCESS); 5601 } 5602 vha->device_flags |= SWITCH_FOUND; 5603 5604 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0); 5605 if (rval != QLA_SUCCESS) 5606 ql_dbg(ql_dbg_disc, vha, 0x20ff, 5607 "Failed to get Fabric Port Name\n"); 5608 5609 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5610 rval = qla2x00_send_change_request(vha, 0x3, 0); 5611 if (rval != QLA_SUCCESS) 5612 ql_log(ql_log_warn, vha, 0x121, 5613 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5614 rval); 5615 } 5616 5617 do { 5618 qla2x00_mgmt_svr_login(vha); 5619 5620 /* Ensure we are logged into the SNS. */ 5621 loop_id = NPH_SNS_LID(ha); 5622 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5623 0xfc, mb, BIT_1|BIT_0); 5624 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5625 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5626 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5627 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5628 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5629 return rval; 5630 } 5631 5632 /* FDMI support. */ 5633 if (ql2xfdmienable && 5634 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5635 qla2x00_fdmi_register(vha); 5636 5637 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5638 if (qla2x00_rft_id(vha)) { 5639 /* EMPTY */ 5640 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5641 "Register FC-4 TYPE failed.\n"); 5642 if (test_bit(LOOP_RESYNC_NEEDED, 5643 &vha->dpc_flags)) 5644 break; 5645 } 5646 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5647 /* EMPTY */ 5648 ql_dbg(ql_dbg_disc, vha, 0x209a, 5649 "Register FC-4 Features failed.\n"); 5650 if (test_bit(LOOP_RESYNC_NEEDED, 5651 &vha->dpc_flags)) 5652 break; 5653 } 5654 if (vha->flags.nvme_enabled) { 5655 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5656 ql_dbg(ql_dbg_disc, vha, 0x2049, 5657 "Register NVME FC Type Features failed.\n"); 5658 } 5659 } 5660 if (qla2x00_rnn_id(vha)) { 5661 /* EMPTY */ 5662 ql_dbg(ql_dbg_disc, vha, 0x2104, 5663 "Register Node Name failed.\n"); 5664 if (test_bit(LOOP_RESYNC_NEEDED, 5665 &vha->dpc_flags)) 5666 break; 5667 } else if (qla2x00_rsnn_nn(vha)) { 5668 /* EMPTY */ 5669 ql_dbg(ql_dbg_disc, vha, 0x209b, 5670 "Register Symbolic Node Name failed.\n"); 5671 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5672 break; 5673 } 5674 } 5675 5676 5677 /* Mark the time right before querying FW for connected ports. 5678 * This process is long, asynchronous and by the time it's done, 5679 * collected information might not be accurate anymore. E.g. 5680 * disconnected port might have re-connected and a brand new 5681 * session has been created. In this case session's generation 5682 * will be newer than discovery_gen. */ 5683 qlt_do_generation_tick(vha, &discovery_gen); 5684 5685 if (USE_ASYNC_SCAN(ha)) { 5686 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5687 NULL); 5688 if (rval) 5689 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5690 } else { 5691 list_for_each_entry(fcport, &vha->vp_fcports, list) 5692 fcport->scan_state = QLA_FCPORT_SCAN; 5693 5694 rval = qla2x00_find_all_fabric_devs(vha); 5695 } 5696 if (rval != QLA_SUCCESS) 5697 break; 5698 } while (0); 5699 5700 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5701 qla_nvme_register_hba(vha); 5702 5703 if (rval) 5704 ql_dbg(ql_dbg_disc, vha, 0x2068, 5705 "Configure fabric error exit rval=%d.\n", rval); 5706 5707 return (rval); 5708 } 5709 5710 /* 5711 * qla2x00_find_all_fabric_devs 5712 * 5713 * Input: 5714 * ha = adapter block pointer. 5715 * dev = database device entry pointer. 5716 * 5717 * Returns: 5718 * 0 = success. 5719 * 5720 * Context: 5721 * Kernel context. 5722 */ 5723 static int 5724 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5725 { 5726 int rval; 5727 uint16_t loop_id; 5728 fc_port_t *fcport, *new_fcport; 5729 int found; 5730 5731 sw_info_t *swl; 5732 int swl_idx; 5733 int first_dev, last_dev; 5734 port_id_t wrap = {}, nxt_d_id; 5735 struct qla_hw_data *ha = vha->hw; 5736 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5737 unsigned long flags; 5738 5739 rval = QLA_SUCCESS; 5740 5741 /* Try GID_PT to get device list, else GAN. */ 5742 if (!ha->swl) 5743 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5744 GFP_KERNEL); 5745 swl = ha->swl; 5746 if (!swl) { 5747 /*EMPTY*/ 5748 ql_dbg(ql_dbg_disc, vha, 0x209c, 5749 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5750 } else { 5751 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5752 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5753 swl = NULL; 5754 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5755 return rval; 5756 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5757 swl = NULL; 5758 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5759 return rval; 5760 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5761 swl = NULL; 5762 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5763 return rval; 5764 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5765 swl = NULL; 5766 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5767 return rval; 5768 } 5769 5770 /* If other queries succeeded probe for FC-4 type */ 5771 if (swl) { 5772 qla2x00_gff_id(vha, swl); 5773 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5774 return rval; 5775 } 5776 } 5777 swl_idx = 0; 5778 5779 /* Allocate temporary fcport for any new fcports discovered. */ 5780 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5781 if (new_fcport == NULL) { 5782 ql_log(ql_log_warn, vha, 0x209d, 5783 "Failed to allocate memory for fcport.\n"); 5784 return (QLA_MEMORY_ALLOC_FAILED); 5785 } 5786 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5787 /* Set start port ID scan at adapter ID. */ 5788 first_dev = 1; 5789 last_dev = 0; 5790 5791 /* Starting free loop ID. */ 5792 loop_id = ha->min_external_loopid; 5793 for (; loop_id <= ha->max_loop_id; loop_id++) { 5794 if (qla2x00_is_reserved_id(vha, loop_id)) 5795 continue; 5796 5797 if (ha->current_topology == ISP_CFG_FL && 5798 (atomic_read(&vha->loop_down_timer) || 5799 LOOP_TRANSITION(vha))) { 5800 atomic_set(&vha->loop_down_timer, 0); 5801 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5802 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5803 break; 5804 } 5805 5806 if (swl != NULL) { 5807 if (last_dev) { 5808 wrap.b24 = new_fcport->d_id.b24; 5809 } else { 5810 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5811 memcpy(new_fcport->node_name, 5812 swl[swl_idx].node_name, WWN_SIZE); 5813 memcpy(new_fcport->port_name, 5814 swl[swl_idx].port_name, WWN_SIZE); 5815 memcpy(new_fcport->fabric_port_name, 5816 swl[swl_idx].fabric_port_name, WWN_SIZE); 5817 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5818 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5819 5820 new_fcport->nvme_flag = 0; 5821 if (vha->flags.nvme_enabled && 5822 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 5823 ql_log(ql_log_info, vha, 0x2131, 5824 "FOUND: NVME port %8phC as FC Type 28h\n", 5825 new_fcport->port_name); 5826 } 5827 5828 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5829 last_dev = 1; 5830 } 5831 swl_idx++; 5832 } 5833 } else { 5834 /* Send GA_NXT to the switch */ 5835 rval = qla2x00_ga_nxt(vha, new_fcport); 5836 if (rval != QLA_SUCCESS) { 5837 ql_log(ql_log_warn, vha, 0x209e, 5838 "SNS scan failed -- assuming " 5839 "zero-entry result.\n"); 5840 rval = QLA_SUCCESS; 5841 break; 5842 } 5843 } 5844 5845 /* If wrap on switch device list, exit. */ 5846 if (first_dev) { 5847 wrap.b24 = new_fcport->d_id.b24; 5848 first_dev = 0; 5849 } else if (new_fcport->d_id.b24 == wrap.b24) { 5850 ql_dbg(ql_dbg_disc, vha, 0x209f, 5851 "Device wrap (%02x%02x%02x).\n", 5852 new_fcport->d_id.b.domain, 5853 new_fcport->d_id.b.area, 5854 new_fcport->d_id.b.al_pa); 5855 break; 5856 } 5857 5858 /* Bypass if same physical adapter. */ 5859 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5860 continue; 5861 5862 /* Bypass virtual ports of the same host. */ 5863 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5864 continue; 5865 5866 /* Bypass if same domain and area of adapter. */ 5867 if (((new_fcport->d_id.b24 & 0xffff00) == 5868 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5869 ISP_CFG_FL) 5870 continue; 5871 5872 /* Bypass reserved domain fields. */ 5873 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5874 continue; 5875 5876 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5877 if (ql2xgffidenable && 5878 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 5879 new_fcport->fc4_type != 0)) 5880 continue; 5881 5882 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5883 5884 /* Locate matching device in database. */ 5885 found = 0; 5886 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5887 if (memcmp(new_fcport->port_name, fcport->port_name, 5888 WWN_SIZE)) 5889 continue; 5890 5891 fcport->scan_state = QLA_FCPORT_FOUND; 5892 5893 found++; 5894 5895 /* Update port state. */ 5896 memcpy(fcport->fabric_port_name, 5897 new_fcport->fabric_port_name, WWN_SIZE); 5898 fcport->fp_speed = new_fcport->fp_speed; 5899 5900 /* 5901 * If address the same and state FCS_ONLINE 5902 * (or in target mode), nothing changed. 5903 */ 5904 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5905 (atomic_read(&fcport->state) == FCS_ONLINE || 5906 (vha->host->active_mode == MODE_TARGET))) { 5907 break; 5908 } 5909 5910 /* 5911 * If device was not a fabric device before. 5912 */ 5913 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5914 fcport->d_id.b24 = new_fcport->d_id.b24; 5915 qla2x00_clear_loop_id(fcport); 5916 fcport->flags |= (FCF_FABRIC_DEVICE | 5917 FCF_LOGIN_NEEDED); 5918 break; 5919 } 5920 5921 /* 5922 * Port ID changed or device was marked to be updated; 5923 * Log it out if still logged in and mark it for 5924 * relogin later. 5925 */ 5926 if (qla_tgt_mode_enabled(base_vha)) { 5927 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5928 "port changed FC ID, %8phC" 5929 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5930 fcport->port_name, 5931 fcport->d_id.b.domain, 5932 fcport->d_id.b.area, 5933 fcport->d_id.b.al_pa, 5934 fcport->loop_id, 5935 new_fcport->d_id.b.domain, 5936 new_fcport->d_id.b.area, 5937 new_fcport->d_id.b.al_pa); 5938 fcport->d_id.b24 = new_fcport->d_id.b24; 5939 break; 5940 } 5941 5942 fcport->d_id.b24 = new_fcport->d_id.b24; 5943 fcport->flags |= FCF_LOGIN_NEEDED; 5944 break; 5945 } 5946 5947 if (found && NVME_TARGET(vha->hw, fcport)) { 5948 if (fcport->disc_state == DSC_DELETE_PEND) { 5949 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 5950 vha->fcport_count--; 5951 fcport->login_succ = 0; 5952 } 5953 } 5954 5955 if (found) { 5956 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5957 continue; 5958 } 5959 /* If device was not in our fcports list, then add it. */ 5960 new_fcport->scan_state = QLA_FCPORT_FOUND; 5961 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5962 5963 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5964 5965 5966 /* Allocate a new replacement fcport. */ 5967 nxt_d_id.b24 = new_fcport->d_id.b24; 5968 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5969 if (new_fcport == NULL) { 5970 ql_log(ql_log_warn, vha, 0xd032, 5971 "Memory allocation failed for fcport.\n"); 5972 return (QLA_MEMORY_ALLOC_FAILED); 5973 } 5974 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5975 new_fcport->d_id.b24 = nxt_d_id.b24; 5976 } 5977 5978 qla2x00_free_fcport(new_fcport); 5979 5980 /* 5981 * Logout all previous fabric dev marked lost, except FCP2 devices. 5982 */ 5983 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5984 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5985 break; 5986 5987 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 5988 continue; 5989 5990 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5991 if ((qla_dual_mode_enabled(vha) || 5992 qla_ini_mode_enabled(vha)) && 5993 atomic_read(&fcport->state) == FCS_ONLINE) { 5994 qla2x00_mark_device_lost(vha, fcport, 5995 ql2xplogiabsentdevice); 5996 if (fcport->loop_id != FC_NO_LOOP_ID && 5997 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5998 fcport->port_type != FCT_INITIATOR && 5999 fcport->port_type != FCT_BROADCAST) { 6000 ql_dbg(ql_dbg_disc, vha, 0x20f0, 6001 "%s %d %8phC post del sess\n", 6002 __func__, __LINE__, 6003 fcport->port_name); 6004 qlt_schedule_sess_for_deletion(fcport); 6005 continue; 6006 } 6007 } 6008 } 6009 6010 if (fcport->scan_state == QLA_FCPORT_FOUND && 6011 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 6012 qla24xx_fcport_handle_login(vha, fcport); 6013 } 6014 return (rval); 6015 } 6016 6017 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 6018 int 6019 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 6020 { 6021 int loop_id = FC_NO_LOOP_ID; 6022 int lid = NPH_MGMT_SERVER - vha->vp_idx; 6023 unsigned long flags; 6024 struct qla_hw_data *ha = vha->hw; 6025 6026 if (vha->vp_idx == 0) { 6027 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 6028 return NPH_MGMT_SERVER; 6029 } 6030 6031 /* pick id from high and work down to low */ 6032 spin_lock_irqsave(&ha->vport_slock, flags); 6033 for (; lid > 0; lid--) { 6034 if (!test_bit(lid, vha->hw->loop_id_map)) { 6035 set_bit(lid, vha->hw->loop_id_map); 6036 loop_id = lid; 6037 break; 6038 } 6039 } 6040 spin_unlock_irqrestore(&ha->vport_slock, flags); 6041 6042 return loop_id; 6043 } 6044 6045 /* 6046 * qla2x00_fabric_login 6047 * Issue fabric login command. 6048 * 6049 * Input: 6050 * ha = adapter block pointer. 6051 * device = pointer to FC device type structure. 6052 * 6053 * Returns: 6054 * 0 - Login successfully 6055 * 1 - Login failed 6056 * 2 - Initiator device 6057 * 3 - Fatal error 6058 */ 6059 int 6060 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 6061 uint16_t *next_loopid) 6062 { 6063 int rval; 6064 int retry; 6065 uint16_t tmp_loopid; 6066 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6067 struct qla_hw_data *ha = vha->hw; 6068 6069 retry = 0; 6070 tmp_loopid = 0; 6071 6072 for (;;) { 6073 ql_dbg(ql_dbg_disc, vha, 0x2000, 6074 "Trying Fabric Login w/loop id 0x%04x for port " 6075 "%02x%02x%02x.\n", 6076 fcport->loop_id, fcport->d_id.b.domain, 6077 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6078 6079 /* Login fcport on switch. */ 6080 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 6081 fcport->d_id.b.domain, fcport->d_id.b.area, 6082 fcport->d_id.b.al_pa, mb, BIT_0); 6083 if (rval != QLA_SUCCESS) { 6084 return rval; 6085 } 6086 if (mb[0] == MBS_PORT_ID_USED) { 6087 /* 6088 * Device has another loop ID. The firmware team 6089 * recommends the driver perform an implicit login with 6090 * the specified ID again. The ID we just used is save 6091 * here so we return with an ID that can be tried by 6092 * the next login. 6093 */ 6094 retry++; 6095 tmp_loopid = fcport->loop_id; 6096 fcport->loop_id = mb[1]; 6097 6098 ql_dbg(ql_dbg_disc, vha, 0x2001, 6099 "Fabric Login: port in use - next loop " 6100 "id=0x%04x, port id= %02x%02x%02x.\n", 6101 fcport->loop_id, fcport->d_id.b.domain, 6102 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6103 6104 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6105 /* 6106 * Login succeeded. 6107 */ 6108 if (retry) { 6109 /* A retry occurred before. */ 6110 *next_loopid = tmp_loopid; 6111 } else { 6112 /* 6113 * No retry occurred before. Just increment the 6114 * ID value for next login. 6115 */ 6116 *next_loopid = (fcport->loop_id + 1); 6117 } 6118 6119 if (mb[1] & BIT_0) { 6120 fcport->port_type = FCT_INITIATOR; 6121 } else { 6122 fcport->port_type = FCT_TARGET; 6123 if (mb[1] & BIT_1) { 6124 fcport->flags |= FCF_FCP2_DEVICE; 6125 } 6126 } 6127 6128 if (mb[10] & BIT_0) 6129 fcport->supported_classes |= FC_COS_CLASS2; 6130 if (mb[10] & BIT_1) 6131 fcport->supported_classes |= FC_COS_CLASS3; 6132 6133 if (IS_FWI2_CAPABLE(ha)) { 6134 if (mb[10] & BIT_7) 6135 fcport->flags |= 6136 FCF_CONF_COMP_SUPPORTED; 6137 } 6138 6139 rval = QLA_SUCCESS; 6140 break; 6141 } else if (mb[0] == MBS_LOOP_ID_USED) { 6142 /* 6143 * Loop ID already used, try next loop ID. 6144 */ 6145 fcport->loop_id++; 6146 rval = qla2x00_find_new_loop_id(vha, fcport); 6147 if (rval != QLA_SUCCESS) { 6148 /* Ran out of loop IDs to use */ 6149 break; 6150 } 6151 } else if (mb[0] == MBS_COMMAND_ERROR) { 6152 /* 6153 * Firmware possibly timed out during login. If NO 6154 * retries are left to do then the device is declared 6155 * dead. 6156 */ 6157 *next_loopid = fcport->loop_id; 6158 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6159 fcport->d_id.b.domain, fcport->d_id.b.area, 6160 fcport->d_id.b.al_pa); 6161 qla2x00_mark_device_lost(vha, fcport, 1); 6162 6163 rval = 1; 6164 break; 6165 } else { 6166 /* 6167 * unrecoverable / not handled error 6168 */ 6169 ql_dbg(ql_dbg_disc, vha, 0x2002, 6170 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6171 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6172 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6173 fcport->loop_id, jiffies); 6174 6175 *next_loopid = fcport->loop_id; 6176 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6177 fcport->d_id.b.domain, fcport->d_id.b.area, 6178 fcport->d_id.b.al_pa); 6179 qla2x00_clear_loop_id(fcport); 6180 fcport->login_retry = 0; 6181 6182 rval = 3; 6183 break; 6184 } 6185 } 6186 6187 return (rval); 6188 } 6189 6190 /* 6191 * qla2x00_local_device_login 6192 * Issue local device login command. 6193 * 6194 * Input: 6195 * ha = adapter block pointer. 6196 * loop_id = loop id of device to login to. 6197 * 6198 * Returns (Where's the #define!!!!): 6199 * 0 - Login successfully 6200 * 1 - Login failed 6201 * 3 - Fatal error 6202 */ 6203 int 6204 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6205 { 6206 int rval; 6207 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6208 6209 memset(mb, 0, sizeof(mb)); 6210 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6211 if (rval == QLA_SUCCESS) { 6212 /* Interrogate mailbox registers for any errors */ 6213 if (mb[0] == MBS_COMMAND_ERROR) 6214 rval = 1; 6215 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6216 /* device not in PCB table */ 6217 rval = 3; 6218 } 6219 6220 return (rval); 6221 } 6222 6223 /* 6224 * qla2x00_loop_resync 6225 * Resync with fibre channel devices. 6226 * 6227 * Input: 6228 * ha = adapter block pointer. 6229 * 6230 * Returns: 6231 * 0 = success 6232 */ 6233 int 6234 qla2x00_loop_resync(scsi_qla_host_t *vha) 6235 { 6236 int rval = QLA_SUCCESS; 6237 uint32_t wait_time; 6238 6239 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6240 if (vha->flags.online) { 6241 if (!(rval = qla2x00_fw_ready(vha))) { 6242 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6243 wait_time = 256; 6244 do { 6245 if (!IS_QLAFX00(vha->hw)) { 6246 /* 6247 * Issue a marker after FW becomes 6248 * ready. 6249 */ 6250 qla2x00_marker(vha, vha->hw->base_qpair, 6251 0, 0, MK_SYNC_ALL); 6252 vha->marker_needed = 0; 6253 } 6254 6255 /* Remap devices on Loop. */ 6256 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6257 6258 if (IS_QLAFX00(vha->hw)) 6259 qlafx00_configure_devices(vha); 6260 else 6261 qla2x00_configure_loop(vha); 6262 6263 wait_time--; 6264 } while (!atomic_read(&vha->loop_down_timer) && 6265 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6266 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6267 &vha->dpc_flags))); 6268 } 6269 } 6270 6271 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6272 return (QLA_FUNCTION_FAILED); 6273 6274 if (rval) 6275 ql_dbg(ql_dbg_disc, vha, 0x206c, 6276 "%s *** FAILED ***.\n", __func__); 6277 6278 return (rval); 6279 } 6280 6281 /* 6282 * qla2x00_perform_loop_resync 6283 * Description: This function will set the appropriate flags and call 6284 * qla2x00_loop_resync. If successful loop will be resynced 6285 * Arguments : scsi_qla_host_t pointer 6286 * returm : Success or Failure 6287 */ 6288 6289 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6290 { 6291 int32_t rval = 0; 6292 6293 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6294 /*Configure the flags so that resync happens properly*/ 6295 atomic_set(&ha->loop_down_timer, 0); 6296 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6297 atomic_set(&ha->loop_state, LOOP_UP); 6298 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6299 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6300 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6301 6302 rval = qla2x00_loop_resync(ha); 6303 } else 6304 atomic_set(&ha->loop_state, LOOP_DEAD); 6305 6306 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6307 } 6308 6309 return rval; 6310 } 6311 6312 void 6313 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6314 { 6315 fc_port_t *fcport; 6316 struct scsi_qla_host *vha; 6317 struct qla_hw_data *ha = base_vha->hw; 6318 unsigned long flags; 6319 6320 spin_lock_irqsave(&ha->vport_slock, flags); 6321 /* Go with deferred removal of rport references. */ 6322 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6323 atomic_inc(&vha->vref_count); 6324 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6325 if (fcport->drport && 6326 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6327 spin_unlock_irqrestore(&ha->vport_slock, flags); 6328 qla2x00_rport_del(fcport); 6329 6330 spin_lock_irqsave(&ha->vport_slock, flags); 6331 } 6332 } 6333 atomic_dec(&vha->vref_count); 6334 wake_up(&vha->vref_waitq); 6335 } 6336 spin_unlock_irqrestore(&ha->vport_slock, flags); 6337 } 6338 6339 /* Assumes idc_lock always held on entry */ 6340 void 6341 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6342 { 6343 struct qla_hw_data *ha = vha->hw; 6344 uint32_t drv_presence, drv_presence_mask; 6345 uint32_t dev_part_info1, dev_part_info2, class_type; 6346 uint32_t class_type_mask = 0x3; 6347 uint16_t fcoe_other_function = 0xffff, i; 6348 6349 if (IS_QLA8044(ha)) { 6350 drv_presence = qla8044_rd_direct(vha, 6351 QLA8044_CRB_DRV_ACTIVE_INDEX); 6352 dev_part_info1 = qla8044_rd_direct(vha, 6353 QLA8044_CRB_DEV_PART_INFO_INDEX); 6354 dev_part_info2 = qla8044_rd_direct(vha, 6355 QLA8044_CRB_DEV_PART_INFO2); 6356 } else { 6357 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6358 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6359 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6360 } 6361 for (i = 0; i < 8; i++) { 6362 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6363 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6364 (i != ha->portnum)) { 6365 fcoe_other_function = i; 6366 break; 6367 } 6368 } 6369 if (fcoe_other_function == 0xffff) { 6370 for (i = 0; i < 8; i++) { 6371 class_type = ((dev_part_info2 >> (i * 4)) & 6372 class_type_mask); 6373 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6374 ((i + 8) != ha->portnum)) { 6375 fcoe_other_function = i + 8; 6376 break; 6377 } 6378 } 6379 } 6380 /* 6381 * Prepare drv-presence mask based on fcoe functions present. 6382 * However consider only valid physical fcoe function numbers (0-15). 6383 */ 6384 drv_presence_mask = ~((1 << (ha->portnum)) | 6385 ((fcoe_other_function == 0xffff) ? 6386 0 : (1 << (fcoe_other_function)))); 6387 6388 /* We are the reset owner iff: 6389 * - No other protocol drivers present. 6390 * - This is the lowest among fcoe functions. */ 6391 if (!(drv_presence & drv_presence_mask) && 6392 (ha->portnum < fcoe_other_function)) { 6393 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6394 "This host is Reset owner.\n"); 6395 ha->flags.nic_core_reset_owner = 1; 6396 } 6397 } 6398 6399 static int 6400 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6401 { 6402 int rval = QLA_SUCCESS; 6403 struct qla_hw_data *ha = vha->hw; 6404 uint32_t drv_ack; 6405 6406 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6407 if (rval == QLA_SUCCESS) { 6408 drv_ack |= (1 << ha->portnum); 6409 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6410 } 6411 6412 return rval; 6413 } 6414 6415 static int 6416 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6417 { 6418 int rval = QLA_SUCCESS; 6419 struct qla_hw_data *ha = vha->hw; 6420 uint32_t drv_ack; 6421 6422 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6423 if (rval == QLA_SUCCESS) { 6424 drv_ack &= ~(1 << ha->portnum); 6425 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6426 } 6427 6428 return rval; 6429 } 6430 6431 static const char * 6432 qla83xx_dev_state_to_string(uint32_t dev_state) 6433 { 6434 switch (dev_state) { 6435 case QLA8XXX_DEV_COLD: 6436 return "COLD/RE-INIT"; 6437 case QLA8XXX_DEV_INITIALIZING: 6438 return "INITIALIZING"; 6439 case QLA8XXX_DEV_READY: 6440 return "READY"; 6441 case QLA8XXX_DEV_NEED_RESET: 6442 return "NEED RESET"; 6443 case QLA8XXX_DEV_NEED_QUIESCENT: 6444 return "NEED QUIESCENT"; 6445 case QLA8XXX_DEV_FAILED: 6446 return "FAILED"; 6447 case QLA8XXX_DEV_QUIESCENT: 6448 return "QUIESCENT"; 6449 default: 6450 return "Unknown"; 6451 } 6452 } 6453 6454 /* Assumes idc-lock always held on entry */ 6455 void 6456 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6457 { 6458 struct qla_hw_data *ha = vha->hw; 6459 uint32_t idc_audit_reg = 0, duration_secs = 0; 6460 6461 switch (audit_type) { 6462 case IDC_AUDIT_TIMESTAMP: 6463 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6464 idc_audit_reg = (ha->portnum) | 6465 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6466 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6467 break; 6468 6469 case IDC_AUDIT_COMPLETION: 6470 duration_secs = ((jiffies_to_msecs(jiffies) - 6471 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6472 idc_audit_reg = (ha->portnum) | 6473 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6474 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6475 break; 6476 6477 default: 6478 ql_log(ql_log_warn, vha, 0xb078, 6479 "Invalid audit type specified.\n"); 6480 break; 6481 } 6482 } 6483 6484 /* Assumes idc_lock always held on entry */ 6485 static int 6486 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6487 { 6488 struct qla_hw_data *ha = vha->hw; 6489 uint32_t idc_control, dev_state; 6490 6491 __qla83xx_get_idc_control(vha, &idc_control); 6492 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6493 ql_log(ql_log_info, vha, 0xb080, 6494 "NIC Core reset has been disabled. idc-control=0x%x\n", 6495 idc_control); 6496 return QLA_FUNCTION_FAILED; 6497 } 6498 6499 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6500 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6501 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6502 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6503 QLA8XXX_DEV_NEED_RESET); 6504 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6505 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6506 } else { 6507 const char *state = qla83xx_dev_state_to_string(dev_state); 6508 6509 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6510 6511 /* SV: XXX: Is timeout required here? */ 6512 /* Wait for IDC state change READY -> NEED_RESET */ 6513 while (dev_state == QLA8XXX_DEV_READY) { 6514 qla83xx_idc_unlock(vha, 0); 6515 msleep(200); 6516 qla83xx_idc_lock(vha, 0); 6517 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6518 } 6519 } 6520 6521 /* Send IDC ack by writing to drv-ack register */ 6522 __qla83xx_set_drv_ack(vha); 6523 6524 return QLA_SUCCESS; 6525 } 6526 6527 int 6528 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6529 { 6530 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6531 } 6532 6533 int 6534 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6535 { 6536 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6537 } 6538 6539 static int 6540 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6541 { 6542 uint32_t drv_presence = 0; 6543 struct qla_hw_data *ha = vha->hw; 6544 6545 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6546 if (drv_presence & (1 << ha->portnum)) 6547 return QLA_SUCCESS; 6548 else 6549 return QLA_TEST_FAILED; 6550 } 6551 6552 int 6553 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6554 { 6555 int rval = QLA_SUCCESS; 6556 struct qla_hw_data *ha = vha->hw; 6557 6558 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6559 "Entered %s().\n", __func__); 6560 6561 if (vha->device_flags & DFLG_DEV_FAILED) { 6562 ql_log(ql_log_warn, vha, 0xb059, 6563 "Device in unrecoverable FAILED state.\n"); 6564 return QLA_FUNCTION_FAILED; 6565 } 6566 6567 qla83xx_idc_lock(vha, 0); 6568 6569 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6570 ql_log(ql_log_warn, vha, 0xb05a, 6571 "Function=0x%x has been removed from IDC participation.\n", 6572 ha->portnum); 6573 rval = QLA_FUNCTION_FAILED; 6574 goto exit; 6575 } 6576 6577 qla83xx_reset_ownership(vha); 6578 6579 rval = qla83xx_initiating_reset(vha); 6580 6581 /* 6582 * Perform reset if we are the reset-owner, 6583 * else wait till IDC state changes to READY/FAILED. 6584 */ 6585 if (rval == QLA_SUCCESS) { 6586 rval = qla83xx_idc_state_handler(vha); 6587 6588 if (rval == QLA_SUCCESS) 6589 ha->flags.nic_core_hung = 0; 6590 __qla83xx_clear_drv_ack(vha); 6591 } 6592 6593 exit: 6594 qla83xx_idc_unlock(vha, 0); 6595 6596 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6597 6598 return rval; 6599 } 6600 6601 int 6602 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6603 { 6604 struct qla_hw_data *ha = vha->hw; 6605 int rval = QLA_FUNCTION_FAILED; 6606 6607 if (!IS_MCTP_CAPABLE(ha)) { 6608 /* This message can be removed from the final version */ 6609 ql_log(ql_log_info, vha, 0x506d, 6610 "This board is not MCTP capable\n"); 6611 return rval; 6612 } 6613 6614 if (!ha->mctp_dump) { 6615 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6616 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6617 6618 if (!ha->mctp_dump) { 6619 ql_log(ql_log_warn, vha, 0x506e, 6620 "Failed to allocate memory for mctp dump\n"); 6621 return rval; 6622 } 6623 } 6624 6625 #define MCTP_DUMP_STR_ADDR 0x00000000 6626 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6627 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6628 if (rval != QLA_SUCCESS) { 6629 ql_log(ql_log_warn, vha, 0x506f, 6630 "Failed to capture mctp dump\n"); 6631 } else { 6632 ql_log(ql_log_info, vha, 0x5070, 6633 "Mctp dump capture for host (%ld/%p).\n", 6634 vha->host_no, ha->mctp_dump); 6635 ha->mctp_dumped = 1; 6636 } 6637 6638 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6639 ha->flags.nic_core_reset_hdlr_active = 1; 6640 rval = qla83xx_restart_nic_firmware(vha); 6641 if (rval) 6642 /* NIC Core reset failed. */ 6643 ql_log(ql_log_warn, vha, 0x5071, 6644 "Failed to restart nic firmware\n"); 6645 else 6646 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6647 "Restarted NIC firmware successfully.\n"); 6648 ha->flags.nic_core_reset_hdlr_active = 0; 6649 } 6650 6651 return rval; 6652 6653 } 6654 6655 /* 6656 * qla2x00_quiesce_io 6657 * Description: This function will block the new I/Os 6658 * Its not aborting any I/Os as context 6659 * is not destroyed during quiescence 6660 * Arguments: scsi_qla_host_t 6661 * return : void 6662 */ 6663 void 6664 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6665 { 6666 struct qla_hw_data *ha = vha->hw; 6667 struct scsi_qla_host *vp; 6668 6669 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6670 "Quiescing I/O - ha=%p.\n", ha); 6671 6672 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6673 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6674 atomic_set(&vha->loop_state, LOOP_DOWN); 6675 qla2x00_mark_all_devices_lost(vha); 6676 list_for_each_entry(vp, &ha->vp_list, list) 6677 qla2x00_mark_all_devices_lost(vp); 6678 } else { 6679 if (!atomic_read(&vha->loop_down_timer)) 6680 atomic_set(&vha->loop_down_timer, 6681 LOOP_DOWN_TIME); 6682 } 6683 /* Wait for pending cmds to complete */ 6684 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 6685 != QLA_SUCCESS); 6686 } 6687 6688 void 6689 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6690 { 6691 struct qla_hw_data *ha = vha->hw; 6692 struct scsi_qla_host *vp; 6693 unsigned long flags; 6694 fc_port_t *fcport; 6695 u16 i; 6696 6697 /* For ISP82XX, driver waits for completion of the commands. 6698 * online flag should be set. 6699 */ 6700 if (!(IS_P3P_TYPE(ha))) 6701 vha->flags.online = 0; 6702 ha->flags.chip_reset_done = 0; 6703 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6704 vha->qla_stats.total_isp_aborts++; 6705 6706 ql_log(ql_log_info, vha, 0x00af, 6707 "Performing ISP error recovery - ha=%p.\n", ha); 6708 6709 ha->flags.purge_mbox = 1; 6710 /* For ISP82XX, reset_chip is just disabling interrupts. 6711 * Driver waits for the completion of the commands. 6712 * the interrupts need to be enabled. 6713 */ 6714 if (!(IS_P3P_TYPE(ha))) 6715 ha->isp_ops->reset_chip(vha); 6716 6717 ha->link_data_rate = PORT_SPEED_UNKNOWN; 6718 SAVE_TOPO(ha); 6719 ha->flags.rida_fmt2 = 0; 6720 ha->flags.n2n_ae = 0; 6721 ha->flags.lip_ae = 0; 6722 ha->current_topology = 0; 6723 QLA_FW_STOPPED(ha); 6724 ha->flags.fw_init_done = 0; 6725 ha->chip_reset++; 6726 ha->base_qpair->chip_reset = ha->chip_reset; 6727 for (i = 0; i < ha->max_qpairs; i++) { 6728 if (ha->queue_pair_map[i]) 6729 ha->queue_pair_map[i]->chip_reset = 6730 ha->base_qpair->chip_reset; 6731 } 6732 6733 /* purge MBox commands */ 6734 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6735 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6736 complete(&ha->mbx_intr_comp); 6737 } 6738 6739 i = 0; 6740 while (atomic_read(&ha->num_pend_mbx_stage3) || 6741 atomic_read(&ha->num_pend_mbx_stage2) || 6742 atomic_read(&ha->num_pend_mbx_stage1)) { 6743 msleep(20); 6744 i++; 6745 if (i > 50) 6746 break; 6747 } 6748 ha->flags.purge_mbox = 0; 6749 6750 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6751 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6752 atomic_set(&vha->loop_state, LOOP_DOWN); 6753 qla2x00_mark_all_devices_lost(vha); 6754 6755 spin_lock_irqsave(&ha->vport_slock, flags); 6756 list_for_each_entry(vp, &ha->vp_list, list) { 6757 atomic_inc(&vp->vref_count); 6758 spin_unlock_irqrestore(&ha->vport_slock, flags); 6759 6760 qla2x00_mark_all_devices_lost(vp); 6761 6762 spin_lock_irqsave(&ha->vport_slock, flags); 6763 atomic_dec(&vp->vref_count); 6764 } 6765 spin_unlock_irqrestore(&ha->vport_slock, flags); 6766 } else { 6767 if (!atomic_read(&vha->loop_down_timer)) 6768 atomic_set(&vha->loop_down_timer, 6769 LOOP_DOWN_TIME); 6770 } 6771 6772 /* Clear all async request states across all VPs. */ 6773 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6774 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6775 fcport->scan_state = 0; 6776 } 6777 spin_lock_irqsave(&ha->vport_slock, flags); 6778 list_for_each_entry(vp, &ha->vp_list, list) { 6779 atomic_inc(&vp->vref_count); 6780 spin_unlock_irqrestore(&ha->vport_slock, flags); 6781 6782 list_for_each_entry(fcport, &vp->vp_fcports, list) 6783 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6784 6785 spin_lock_irqsave(&ha->vport_slock, flags); 6786 atomic_dec(&vp->vref_count); 6787 } 6788 spin_unlock_irqrestore(&ha->vport_slock, flags); 6789 6790 if (!ha->flags.eeh_busy) { 6791 /* Make sure for ISP 82XX IO DMA is complete */ 6792 if (IS_P3P_TYPE(ha)) { 6793 qla82xx_chip_reset_cleanup(vha); 6794 ql_log(ql_log_info, vha, 0x00b4, 6795 "Done chip reset cleanup.\n"); 6796 6797 /* Done waiting for pending commands. 6798 * Reset the online flag. 6799 */ 6800 vha->flags.online = 0; 6801 } 6802 6803 /* Requeue all commands in outstanding command list. */ 6804 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6805 } 6806 /* memory barrier */ 6807 wmb(); 6808 } 6809 6810 /* 6811 * qla2x00_abort_isp 6812 * Resets ISP and aborts all outstanding commands. 6813 * 6814 * Input: 6815 * ha = adapter block pointer. 6816 * 6817 * Returns: 6818 * 0 = success 6819 */ 6820 int 6821 qla2x00_abort_isp(scsi_qla_host_t *vha) 6822 { 6823 int rval; 6824 uint8_t status = 0; 6825 struct qla_hw_data *ha = vha->hw; 6826 struct scsi_qla_host *vp; 6827 struct req_que *req = ha->req_q_map[0]; 6828 unsigned long flags; 6829 6830 if (vha->flags.online) { 6831 qla2x00_abort_isp_cleanup(vha); 6832 6833 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 6834 ha->flags.chip_reset_done = 1; 6835 vha->flags.online = 1; 6836 status = 0; 6837 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6838 return status; 6839 } 6840 6841 if (IS_QLA8031(ha)) { 6842 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6843 "Clearing fcoe driver presence.\n"); 6844 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6845 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6846 "Error while clearing DRV-Presence.\n"); 6847 } 6848 6849 if (unlikely(pci_channel_offline(ha->pdev) && 6850 ha->flags.pci_channel_io_perm_failure)) { 6851 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6852 status = 0; 6853 return status; 6854 } 6855 6856 switch (vha->qlini_mode) { 6857 case QLA2XXX_INI_MODE_DISABLED: 6858 if (!qla_tgt_mode_enabled(vha)) 6859 return 0; 6860 break; 6861 case QLA2XXX_INI_MODE_DUAL: 6862 if (!qla_dual_mode_enabled(vha)) 6863 return 0; 6864 break; 6865 case QLA2XXX_INI_MODE_ENABLED: 6866 default: 6867 break; 6868 } 6869 6870 ha->isp_ops->get_flash_version(vha, req->ring); 6871 6872 ha->isp_ops->nvram_config(vha); 6873 6874 if (!qla2x00_restart_isp(vha)) { 6875 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6876 6877 if (!atomic_read(&vha->loop_down_timer)) { 6878 /* 6879 * Issue marker command only when we are going 6880 * to start the I/O . 6881 */ 6882 vha->marker_needed = 1; 6883 } 6884 6885 vha->flags.online = 1; 6886 6887 ha->isp_ops->enable_intrs(ha); 6888 6889 ha->isp_abort_cnt = 0; 6890 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6891 6892 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6893 qla2x00_get_fw_version(vha); 6894 if (ha->fce) { 6895 ha->flags.fce_enabled = 1; 6896 memset(ha->fce, 0, 6897 fce_calc_size(ha->fce_bufs)); 6898 rval = qla2x00_enable_fce_trace(vha, 6899 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6900 &ha->fce_bufs); 6901 if (rval) { 6902 ql_log(ql_log_warn, vha, 0x8033, 6903 "Unable to reinitialize FCE " 6904 "(%d).\n", rval); 6905 ha->flags.fce_enabled = 0; 6906 } 6907 } 6908 6909 if (ha->eft) { 6910 memset(ha->eft, 0, EFT_SIZE); 6911 rval = qla2x00_enable_eft_trace(vha, 6912 ha->eft_dma, EFT_NUM_BUFFERS); 6913 if (rval) { 6914 ql_log(ql_log_warn, vha, 0x8034, 6915 "Unable to reinitialize EFT " 6916 "(%d).\n", rval); 6917 } 6918 } 6919 } else { /* failed the ISP abort */ 6920 vha->flags.online = 1; 6921 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6922 if (ha->isp_abort_cnt == 0) { 6923 ql_log(ql_log_fatal, vha, 0x8035, 6924 "ISP error recover failed - " 6925 "board disabled.\n"); 6926 /* 6927 * The next call disables the board 6928 * completely. 6929 */ 6930 qla2x00_abort_isp_cleanup(vha); 6931 vha->flags.online = 0; 6932 clear_bit(ISP_ABORT_RETRY, 6933 &vha->dpc_flags); 6934 status = 0; 6935 } else { /* schedule another ISP abort */ 6936 ha->isp_abort_cnt--; 6937 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6938 "ISP abort - retry remaining %d.\n", 6939 ha->isp_abort_cnt); 6940 status = 1; 6941 } 6942 } else { 6943 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6944 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6945 "ISP error recovery - retrying (%d) " 6946 "more times.\n", ha->isp_abort_cnt); 6947 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6948 status = 1; 6949 } 6950 } 6951 6952 } 6953 6954 if (!status) { 6955 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6956 qla2x00_configure_hba(vha); 6957 spin_lock_irqsave(&ha->vport_slock, flags); 6958 list_for_each_entry(vp, &ha->vp_list, list) { 6959 if (vp->vp_idx) { 6960 atomic_inc(&vp->vref_count); 6961 spin_unlock_irqrestore(&ha->vport_slock, flags); 6962 6963 qla2x00_vp_abort_isp(vp); 6964 6965 spin_lock_irqsave(&ha->vport_slock, flags); 6966 atomic_dec(&vp->vref_count); 6967 } 6968 } 6969 spin_unlock_irqrestore(&ha->vport_slock, flags); 6970 6971 if (IS_QLA8031(ha)) { 6972 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6973 "Setting back fcoe driver presence.\n"); 6974 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6975 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6976 "Error while setting DRV-Presence.\n"); 6977 } 6978 } else { 6979 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6980 __func__); 6981 } 6982 6983 return(status); 6984 } 6985 6986 /* 6987 * qla2x00_restart_isp 6988 * restarts the ISP after a reset 6989 * 6990 * Input: 6991 * ha = adapter block pointer. 6992 * 6993 * Returns: 6994 * 0 = success 6995 */ 6996 static int 6997 qla2x00_restart_isp(scsi_qla_host_t *vha) 6998 { 6999 int status; 7000 struct qla_hw_data *ha = vha->hw; 7001 7002 /* If firmware needs to be loaded */ 7003 if (qla2x00_isp_firmware(vha)) { 7004 vha->flags.online = 0; 7005 status = ha->isp_ops->chip_diag(vha); 7006 if (status) 7007 return status; 7008 status = qla2x00_setup_chip(vha); 7009 if (status) 7010 return status; 7011 } 7012 7013 status = qla2x00_init_rings(vha); 7014 if (status) 7015 return status; 7016 7017 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7018 ha->flags.chip_reset_done = 1; 7019 7020 /* Initialize the queues in use */ 7021 qla25xx_init_queues(ha); 7022 7023 status = qla2x00_fw_ready(vha); 7024 if (status) { 7025 /* if no cable then assume it's good */ 7026 return vha->device_flags & DFLG_NO_CABLE ? 0 : status; 7027 } 7028 7029 /* Issue a marker after FW becomes ready. */ 7030 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7031 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7032 7033 return 0; 7034 } 7035 7036 static int 7037 qla25xx_init_queues(struct qla_hw_data *ha) 7038 { 7039 struct rsp_que *rsp = NULL; 7040 struct req_que *req = NULL; 7041 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7042 int ret = -1; 7043 int i; 7044 7045 for (i = 1; i < ha->max_rsp_queues; i++) { 7046 rsp = ha->rsp_q_map[i]; 7047 if (rsp && test_bit(i, ha->rsp_qid_map)) { 7048 rsp->options &= ~BIT_0; 7049 ret = qla25xx_init_rsp_que(base_vha, rsp); 7050 if (ret != QLA_SUCCESS) 7051 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 7052 "%s Rsp que: %d init failed.\n", 7053 __func__, rsp->id); 7054 else 7055 ql_dbg(ql_dbg_init, base_vha, 0x0100, 7056 "%s Rsp que: %d inited.\n", 7057 __func__, rsp->id); 7058 } 7059 } 7060 for (i = 1; i < ha->max_req_queues; i++) { 7061 req = ha->req_q_map[i]; 7062 if (req && test_bit(i, ha->req_qid_map)) { 7063 /* Clear outstanding commands array. */ 7064 req->options &= ~BIT_0; 7065 ret = qla25xx_init_req_que(base_vha, req); 7066 if (ret != QLA_SUCCESS) 7067 ql_dbg(ql_dbg_init, base_vha, 0x0101, 7068 "%s Req que: %d init failed.\n", 7069 __func__, req->id); 7070 else 7071 ql_dbg(ql_dbg_init, base_vha, 0x0102, 7072 "%s Req que: %d inited.\n", 7073 __func__, req->id); 7074 } 7075 } 7076 return ret; 7077 } 7078 7079 /* 7080 * qla2x00_reset_adapter 7081 * Reset adapter. 7082 * 7083 * Input: 7084 * ha = adapter block pointer. 7085 */ 7086 int 7087 qla2x00_reset_adapter(scsi_qla_host_t *vha) 7088 { 7089 unsigned long flags = 0; 7090 struct qla_hw_data *ha = vha->hw; 7091 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7092 7093 vha->flags.online = 0; 7094 ha->isp_ops->disable_intrs(ha); 7095 7096 spin_lock_irqsave(&ha->hardware_lock, flags); 7097 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 7098 rd_reg_word(®->hccr); /* PCI Posting. */ 7099 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 7100 rd_reg_word(®->hccr); /* PCI Posting. */ 7101 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7102 7103 return QLA_SUCCESS; 7104 } 7105 7106 int 7107 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7108 { 7109 unsigned long flags = 0; 7110 struct qla_hw_data *ha = vha->hw; 7111 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7112 int rval = QLA_SUCCESS; 7113 7114 if (IS_P3P_TYPE(ha)) 7115 return rval; 7116 7117 vha->flags.online = 0; 7118 ha->isp_ops->disable_intrs(ha); 7119 7120 spin_lock_irqsave(&ha->hardware_lock, flags); 7121 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 7122 rd_reg_dword(®->hccr); 7123 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 7124 rd_reg_dword(®->hccr); 7125 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7126 7127 if (IS_NOPOLLING_TYPE(ha)) 7128 ha->isp_ops->enable_intrs(ha); 7129 7130 return rval; 7131 } 7132 7133 /* On sparc systems, obtain port and node WWN from firmware 7134 * properties. 7135 */ 7136 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7137 struct nvram_24xx *nv) 7138 { 7139 #ifdef CONFIG_SPARC 7140 struct qla_hw_data *ha = vha->hw; 7141 struct pci_dev *pdev = ha->pdev; 7142 struct device_node *dp = pci_device_to_OF_node(pdev); 7143 const u8 *val; 7144 int len; 7145 7146 val = of_get_property(dp, "port-wwn", &len); 7147 if (val && len >= WWN_SIZE) 7148 memcpy(nv->port_name, val, WWN_SIZE); 7149 7150 val = of_get_property(dp, "node-wwn", &len); 7151 if (val && len >= WWN_SIZE) 7152 memcpy(nv->node_name, val, WWN_SIZE); 7153 #endif 7154 } 7155 7156 int 7157 qla24xx_nvram_config(scsi_qla_host_t *vha) 7158 { 7159 int rval; 7160 struct init_cb_24xx *icb; 7161 struct nvram_24xx *nv; 7162 __le32 *dptr; 7163 uint8_t *dptr1, *dptr2; 7164 uint32_t chksum; 7165 uint16_t cnt; 7166 struct qla_hw_data *ha = vha->hw; 7167 7168 rval = QLA_SUCCESS; 7169 icb = (struct init_cb_24xx *)ha->init_cb; 7170 nv = ha->nvram; 7171 7172 /* Determine NVRAM starting address. */ 7173 if (ha->port_no == 0) { 7174 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7175 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7176 } else { 7177 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7178 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7179 } 7180 7181 ha->nvram_size = sizeof(*nv); 7182 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7183 7184 /* Get VPD data into cache */ 7185 ha->vpd = ha->nvram + VPD_OFFSET; 7186 ha->isp_ops->read_nvram(vha, ha->vpd, 7187 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7188 7189 /* Get NVRAM data into cache and calculate checksum. */ 7190 dptr = (__force __le32 *)nv; 7191 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7192 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7193 chksum += le32_to_cpu(*dptr); 7194 7195 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7196 "Contents of NVRAM\n"); 7197 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7198 nv, ha->nvram_size); 7199 7200 /* Bad NVRAM data, set defaults parameters. */ 7201 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7202 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7203 /* Reset NVRAM data. */ 7204 ql_log(ql_log_warn, vha, 0x006b, 7205 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7206 chksum, nv->id, nv->nvram_version); 7207 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7208 ql_log(ql_log_warn, vha, 0x006c, 7209 "Falling back to functioning (yet invalid -- WWPN) " 7210 "defaults.\n"); 7211 7212 /* 7213 * Set default initialization control block. 7214 */ 7215 memset(nv, 0, ha->nvram_size); 7216 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7217 nv->version = cpu_to_le16(ICB_VERSION); 7218 nv->frame_payload_size = cpu_to_le16(2048); 7219 nv->execution_throttle = cpu_to_le16(0xFFFF); 7220 nv->exchange_count = cpu_to_le16(0); 7221 nv->hard_address = cpu_to_le16(124); 7222 nv->port_name[0] = 0x21; 7223 nv->port_name[1] = 0x00 + ha->port_no + 1; 7224 nv->port_name[2] = 0x00; 7225 nv->port_name[3] = 0xe0; 7226 nv->port_name[4] = 0x8b; 7227 nv->port_name[5] = 0x1c; 7228 nv->port_name[6] = 0x55; 7229 nv->port_name[7] = 0x86; 7230 nv->node_name[0] = 0x20; 7231 nv->node_name[1] = 0x00; 7232 nv->node_name[2] = 0x00; 7233 nv->node_name[3] = 0xe0; 7234 nv->node_name[4] = 0x8b; 7235 nv->node_name[5] = 0x1c; 7236 nv->node_name[6] = 0x55; 7237 nv->node_name[7] = 0x86; 7238 qla24xx_nvram_wwn_from_ofw(vha, nv); 7239 nv->login_retry_count = cpu_to_le16(8); 7240 nv->interrupt_delay_timer = cpu_to_le16(0); 7241 nv->login_timeout = cpu_to_le16(0); 7242 nv->firmware_options_1 = 7243 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7244 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7245 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7246 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7247 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7248 nv->efi_parameters = cpu_to_le32(0); 7249 nv->reset_delay = 5; 7250 nv->max_luns_per_target = cpu_to_le16(128); 7251 nv->port_down_retry_count = cpu_to_le16(30); 7252 nv->link_down_timeout = cpu_to_le16(30); 7253 7254 rval = 1; 7255 } 7256 7257 if (qla_tgt_mode_enabled(vha)) { 7258 /* Don't enable full login after initial LIP */ 7259 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7260 /* Don't enable LIP full login for initiator */ 7261 nv->host_p &= cpu_to_le32(~BIT_10); 7262 } 7263 7264 qlt_24xx_config_nvram_stage1(vha, nv); 7265 7266 /* Reset Initialization control block */ 7267 memset(icb, 0, ha->init_cb_size); 7268 7269 /* Copy 1st segment. */ 7270 dptr1 = (uint8_t *)icb; 7271 dptr2 = (uint8_t *)&nv->version; 7272 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7273 while (cnt--) 7274 *dptr1++ = *dptr2++; 7275 7276 icb->login_retry_count = nv->login_retry_count; 7277 icb->link_down_on_nos = nv->link_down_on_nos; 7278 7279 /* Copy 2nd segment. */ 7280 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7281 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7282 cnt = (uint8_t *)&icb->reserved_3 - 7283 (uint8_t *)&icb->interrupt_delay_timer; 7284 while (cnt--) 7285 *dptr1++ = *dptr2++; 7286 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7287 /* 7288 * Setup driver NVRAM options. 7289 */ 7290 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7291 "QLA2462"); 7292 7293 qlt_24xx_config_nvram_stage2(vha, icb); 7294 7295 if (nv->host_p & cpu_to_le32(BIT_15)) { 7296 /* Use alternate WWN? */ 7297 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7298 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7299 } 7300 7301 /* Prepare nodename */ 7302 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7303 /* 7304 * Firmware will apply the following mask if the nodename was 7305 * not provided. 7306 */ 7307 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7308 icb->node_name[0] &= 0xF0; 7309 } 7310 7311 /* Set host adapter parameters. */ 7312 ha->flags.disable_risc_code_load = 0; 7313 ha->flags.enable_lip_reset = 0; 7314 ha->flags.enable_lip_full_login = 7315 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7316 ha->flags.enable_target_reset = 7317 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7318 ha->flags.enable_led_scheme = 0; 7319 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7320 7321 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7322 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7323 7324 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7325 sizeof(ha->fw_seriallink_options24)); 7326 7327 /* save HBA serial number */ 7328 ha->serial0 = icb->port_name[5]; 7329 ha->serial1 = icb->port_name[6]; 7330 ha->serial2 = icb->port_name[7]; 7331 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7332 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7333 7334 icb->execution_throttle = cpu_to_le16(0xFFFF); 7335 7336 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7337 7338 /* Set minimum login_timeout to 4 seconds. */ 7339 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7340 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7341 if (le16_to_cpu(nv->login_timeout) < 4) 7342 nv->login_timeout = cpu_to_le16(4); 7343 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7344 7345 /* Set minimum RATOV to 100 tenths of a second. */ 7346 ha->r_a_tov = 100; 7347 7348 ha->loop_reset_delay = nv->reset_delay; 7349 7350 /* Link Down Timeout = 0: 7351 * 7352 * When Port Down timer expires we will start returning 7353 * I/O's to OS with "DID_NO_CONNECT". 7354 * 7355 * Link Down Timeout != 0: 7356 * 7357 * The driver waits for the link to come up after link down 7358 * before returning I/Os to OS with "DID_NO_CONNECT". 7359 */ 7360 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7361 ha->loop_down_abort_time = 7362 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7363 } else { 7364 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7365 ha->loop_down_abort_time = 7366 (LOOP_DOWN_TIME - ha->link_down_timeout); 7367 } 7368 7369 /* Need enough time to try and get the port back. */ 7370 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7371 if (qlport_down_retry) 7372 ha->port_down_retry_count = qlport_down_retry; 7373 7374 /* Set login_retry_count */ 7375 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7376 if (ha->port_down_retry_count == 7377 le16_to_cpu(nv->port_down_retry_count) && 7378 ha->port_down_retry_count > 3) 7379 ha->login_retry_count = ha->port_down_retry_count; 7380 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7381 ha->login_retry_count = ha->port_down_retry_count; 7382 if (ql2xloginretrycount) 7383 ha->login_retry_count = ql2xloginretrycount; 7384 7385 /* N2N: driver will initiate Login instead of FW */ 7386 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 7387 7388 /* Enable ZIO. */ 7389 if (!vha->flags.init_done) { 7390 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7391 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7392 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7393 le16_to_cpu(icb->interrupt_delay_timer) : 2; 7394 } 7395 icb->firmware_options_2 &= cpu_to_le32( 7396 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7397 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7398 ha->zio_mode = QLA_ZIO_MODE_6; 7399 7400 ql_log(ql_log_info, vha, 0x006f, 7401 "ZIO mode %d enabled; timer delay (%d us).\n", 7402 ha->zio_mode, ha->zio_timer * 100); 7403 7404 icb->firmware_options_2 |= cpu_to_le32( 7405 (uint32_t)ha->zio_mode); 7406 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7407 } 7408 7409 if (rval) { 7410 ql_log(ql_log_warn, vha, 0x0070, 7411 "NVRAM configuration failed.\n"); 7412 } 7413 return (rval); 7414 } 7415 7416 static void 7417 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 7418 struct qla27xx_image_status *image_status) 7419 { 7420 ql_dbg(ql_dbg_init, vha, 0x018b, 7421 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 7422 name, "status", 7423 image_status->image_status_mask, 7424 le16_to_cpu(image_status->generation), 7425 image_status->ver_major, 7426 image_status->ver_minor, 7427 image_status->bitmap, 7428 le32_to_cpu(image_status->checksum), 7429 le32_to_cpu(image_status->signature)); 7430 } 7431 7432 static bool 7433 qla28xx_check_aux_image_status_signature( 7434 struct qla27xx_image_status *image_status) 7435 { 7436 ulong signature = le32_to_cpu(image_status->signature); 7437 7438 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 7439 } 7440 7441 static bool 7442 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 7443 { 7444 ulong signature = le32_to_cpu(image_status->signature); 7445 7446 return 7447 signature != QLA27XX_IMG_STATUS_SIGN && 7448 signature != QLA28XX_IMG_STATUS_SIGN; 7449 } 7450 7451 static ulong 7452 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 7453 { 7454 __le32 *p = (__force __le32 *)image_status; 7455 uint n = sizeof(*image_status) / sizeof(*p); 7456 uint32_t sum = 0; 7457 7458 for ( ; n--; p++) 7459 sum += le32_to_cpup(p); 7460 7461 return sum; 7462 } 7463 7464 static inline uint 7465 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 7466 { 7467 return aux->bitmap & bitmask ? 7468 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 7469 } 7470 7471 static void 7472 qla28xx_component_status( 7473 struct active_regions *active_regions, struct qla27xx_image_status *aux) 7474 { 7475 active_regions->aux.board_config = 7476 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 7477 7478 active_regions->aux.vpd_nvram = 7479 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 7480 7481 active_regions->aux.npiv_config_0_1 = 7482 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 7483 7484 active_regions->aux.npiv_config_2_3 = 7485 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 7486 } 7487 7488 static int 7489 qla27xx_compare_image_generation( 7490 struct qla27xx_image_status *pri_image_status, 7491 struct qla27xx_image_status *sec_image_status) 7492 { 7493 /* calculate generation delta as uint16 (this accounts for wrap) */ 7494 int16_t delta = 7495 le16_to_cpu(pri_image_status->generation) - 7496 le16_to_cpu(sec_image_status->generation); 7497 7498 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 7499 7500 return delta; 7501 } 7502 7503 void 7504 qla28xx_get_aux_images( 7505 struct scsi_qla_host *vha, struct active_regions *active_regions) 7506 { 7507 struct qla_hw_data *ha = vha->hw; 7508 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 7509 bool valid_pri_image = false, valid_sec_image = false; 7510 bool active_pri_image = false, active_sec_image = false; 7511 7512 if (!ha->flt_region_aux_img_status_pri) { 7513 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 7514 goto check_sec_image; 7515 } 7516 7517 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status, 7518 ha->flt_region_aux_img_status_pri, 7519 sizeof(pri_aux_image_status) >> 2); 7520 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 7521 7522 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 7523 ql_dbg(ql_dbg_init, vha, 0x018b, 7524 "Primary aux image signature (%#x) not valid\n", 7525 le32_to_cpu(pri_aux_image_status.signature)); 7526 goto check_sec_image; 7527 } 7528 7529 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 7530 ql_dbg(ql_dbg_init, vha, 0x018c, 7531 "Primary aux image checksum failed\n"); 7532 goto check_sec_image; 7533 } 7534 7535 valid_pri_image = true; 7536 7537 if (pri_aux_image_status.image_status_mask & 1) { 7538 ql_dbg(ql_dbg_init, vha, 0x018d, 7539 "Primary aux image is active\n"); 7540 active_pri_image = true; 7541 } 7542 7543 check_sec_image: 7544 if (!ha->flt_region_aux_img_status_sec) { 7545 ql_dbg(ql_dbg_init, vha, 0x018a, 7546 "Secondary aux image not addressed\n"); 7547 goto check_valid_image; 7548 } 7549 7550 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status, 7551 ha->flt_region_aux_img_status_sec, 7552 sizeof(sec_aux_image_status) >> 2); 7553 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 7554 7555 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 7556 ql_dbg(ql_dbg_init, vha, 0x018b, 7557 "Secondary aux image signature (%#x) not valid\n", 7558 le32_to_cpu(sec_aux_image_status.signature)); 7559 goto check_valid_image; 7560 } 7561 7562 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 7563 ql_dbg(ql_dbg_init, vha, 0x018c, 7564 "Secondary aux image checksum failed\n"); 7565 goto check_valid_image; 7566 } 7567 7568 valid_sec_image = true; 7569 7570 if (sec_aux_image_status.image_status_mask & 1) { 7571 ql_dbg(ql_dbg_init, vha, 0x018d, 7572 "Secondary aux image is active\n"); 7573 active_sec_image = true; 7574 } 7575 7576 check_valid_image: 7577 if (valid_pri_image && active_pri_image && 7578 valid_sec_image && active_sec_image) { 7579 if (qla27xx_compare_image_generation(&pri_aux_image_status, 7580 &sec_aux_image_status) >= 0) { 7581 qla28xx_component_status(active_regions, 7582 &pri_aux_image_status); 7583 } else { 7584 qla28xx_component_status(active_regions, 7585 &sec_aux_image_status); 7586 } 7587 } else if (valid_pri_image && active_pri_image) { 7588 qla28xx_component_status(active_regions, &pri_aux_image_status); 7589 } else if (valid_sec_image && active_sec_image) { 7590 qla28xx_component_status(active_regions, &sec_aux_image_status); 7591 } 7592 7593 ql_dbg(ql_dbg_init, vha, 0x018f, 7594 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n", 7595 active_regions->aux.board_config, 7596 active_regions->aux.vpd_nvram, 7597 active_regions->aux.npiv_config_0_1, 7598 active_regions->aux.npiv_config_2_3); 7599 } 7600 7601 void 7602 qla27xx_get_active_image(struct scsi_qla_host *vha, 7603 struct active_regions *active_regions) 7604 { 7605 struct qla_hw_data *ha = vha->hw; 7606 struct qla27xx_image_status pri_image_status, sec_image_status; 7607 bool valid_pri_image = false, valid_sec_image = false; 7608 bool active_pri_image = false, active_sec_image = false; 7609 7610 if (!ha->flt_region_img_status_pri) { 7611 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 7612 goto check_sec_image; 7613 } 7614 7615 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status, 7616 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 7617 QLA_SUCCESS) { 7618 WARN_ON_ONCE(true); 7619 goto check_sec_image; 7620 } 7621 qla27xx_print_image(vha, "Primary image", &pri_image_status); 7622 7623 if (qla27xx_check_image_status_signature(&pri_image_status)) { 7624 ql_dbg(ql_dbg_init, vha, 0x018b, 7625 "Primary image signature (%#x) not valid\n", 7626 le32_to_cpu(pri_image_status.signature)); 7627 goto check_sec_image; 7628 } 7629 7630 if (qla27xx_image_status_checksum(&pri_image_status)) { 7631 ql_dbg(ql_dbg_init, vha, 0x018c, 7632 "Primary image checksum failed\n"); 7633 goto check_sec_image; 7634 } 7635 7636 valid_pri_image = true; 7637 7638 if (pri_image_status.image_status_mask & 1) { 7639 ql_dbg(ql_dbg_init, vha, 0x018d, 7640 "Primary image is active\n"); 7641 active_pri_image = true; 7642 } 7643 7644 check_sec_image: 7645 if (!ha->flt_region_img_status_sec) { 7646 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 7647 goto check_valid_image; 7648 } 7649 7650 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7651 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 7652 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 7653 7654 if (qla27xx_check_image_status_signature(&sec_image_status)) { 7655 ql_dbg(ql_dbg_init, vha, 0x018b, 7656 "Secondary image signature (%#x) not valid\n", 7657 le32_to_cpu(sec_image_status.signature)); 7658 goto check_valid_image; 7659 } 7660 7661 if (qla27xx_image_status_checksum(&sec_image_status)) { 7662 ql_dbg(ql_dbg_init, vha, 0x018c, 7663 "Secondary image checksum failed\n"); 7664 goto check_valid_image; 7665 } 7666 7667 valid_sec_image = true; 7668 7669 if (sec_image_status.image_status_mask & 1) { 7670 ql_dbg(ql_dbg_init, vha, 0x018d, 7671 "Secondary image is active\n"); 7672 active_sec_image = true; 7673 } 7674 7675 check_valid_image: 7676 if (valid_pri_image && active_pri_image) 7677 active_regions->global = QLA27XX_PRIMARY_IMAGE; 7678 7679 if (valid_sec_image && active_sec_image) { 7680 if (!active_regions->global || 7681 qla27xx_compare_image_generation( 7682 &pri_image_status, &sec_image_status) < 0) { 7683 active_regions->global = QLA27XX_SECONDARY_IMAGE; 7684 } 7685 } 7686 7687 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 7688 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 7689 "default (boot/fw)" : 7690 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 7691 "primary" : 7692 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 7693 "secondary" : "invalid", 7694 active_regions->global); 7695 } 7696 7697 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 7698 { 7699 return 7700 !(dword[4] | dword[5] | dword[6] | dword[7]) || 7701 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 7702 } 7703 7704 static int 7705 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7706 uint32_t faddr) 7707 { 7708 int rval; 7709 uint templates, segments, fragment; 7710 ulong i; 7711 uint j; 7712 ulong dlen; 7713 uint32_t *dcode; 7714 uint32_t risc_addr, risc_size, risc_attr = 0; 7715 struct qla_hw_data *ha = vha->hw; 7716 struct req_que *req = ha->req_q_map[0]; 7717 struct fwdt *fwdt = ha->fwdt; 7718 7719 ql_dbg(ql_dbg_init, vha, 0x008b, 7720 "FW: Loading firmware from flash (%x).\n", faddr); 7721 7722 dcode = (uint32_t *)req->ring; 7723 qla24xx_read_flash_data(vha, dcode, faddr, 8); 7724 if (qla24xx_risc_firmware_invalid(dcode)) { 7725 ql_log(ql_log_fatal, vha, 0x008c, 7726 "Unable to verify the integrity of flash firmware " 7727 "image.\n"); 7728 ql_log(ql_log_fatal, vha, 0x008d, 7729 "Firmware data: %08x %08x %08x %08x.\n", 7730 dcode[0], dcode[1], dcode[2], dcode[3]); 7731 7732 return QLA_FUNCTION_FAILED; 7733 } 7734 7735 dcode = (uint32_t *)req->ring; 7736 *srisc_addr = 0; 7737 segments = FA_RISC_CODE_SEGMENTS; 7738 for (j = 0; j < segments; j++) { 7739 ql_dbg(ql_dbg_init, vha, 0x008d, 7740 "-> Loading segment %u...\n", j); 7741 qla24xx_read_flash_data(vha, dcode, faddr, 10); 7742 risc_addr = be32_to_cpu((__force __be32)dcode[2]); 7743 risc_size = be32_to_cpu((__force __be32)dcode[3]); 7744 if (!*srisc_addr) { 7745 *srisc_addr = risc_addr; 7746 risc_attr = be32_to_cpu((__force __be32)dcode[9]); 7747 } 7748 7749 dlen = ha->fw_transfer_size >> 2; 7750 for (fragment = 0; risc_size; fragment++) { 7751 if (dlen > risc_size) 7752 dlen = risc_size; 7753 7754 ql_dbg(ql_dbg_init, vha, 0x008e, 7755 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 7756 fragment, risc_addr, faddr, dlen); 7757 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7758 for (i = 0; i < dlen; i++) 7759 dcode[i] = swab32(dcode[i]); 7760 7761 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 7762 if (rval) { 7763 ql_log(ql_log_fatal, vha, 0x008f, 7764 "-> Failed load firmware fragment %u.\n", 7765 fragment); 7766 return QLA_FUNCTION_FAILED; 7767 } 7768 7769 faddr += dlen; 7770 risc_addr += dlen; 7771 risc_size -= dlen; 7772 } 7773 } 7774 7775 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 7776 return QLA_SUCCESS; 7777 7778 templates = (risc_attr & BIT_9) ? 2 : 1; 7779 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 7780 for (j = 0; j < templates; j++, fwdt++) { 7781 if (fwdt->template) 7782 vfree(fwdt->template); 7783 fwdt->template = NULL; 7784 fwdt->length = 0; 7785 7786 dcode = (uint32_t *)req->ring; 7787 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7788 risc_size = be32_to_cpu((__force __be32)dcode[2]); 7789 ql_dbg(ql_dbg_init, vha, 0x0161, 7790 "-> fwdt%u template array at %#x (%#x dwords)\n", 7791 j, faddr, risc_size); 7792 if (!risc_size || !~risc_size) { 7793 ql_dbg(ql_dbg_init, vha, 0x0162, 7794 "-> fwdt%u failed to read array\n", j); 7795 goto failed; 7796 } 7797 7798 /* skip header and ignore checksum */ 7799 faddr += 7; 7800 risc_size -= 8; 7801 7802 ql_dbg(ql_dbg_init, vha, 0x0163, 7803 "-> fwdt%u template allocate template %#x words...\n", 7804 j, risc_size); 7805 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 7806 if (!fwdt->template) { 7807 ql_log(ql_log_warn, vha, 0x0164, 7808 "-> fwdt%u failed allocate template.\n", j); 7809 goto failed; 7810 } 7811 7812 dcode = fwdt->template; 7813 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7814 7815 if (!qla27xx_fwdt_template_valid(dcode)) { 7816 ql_log(ql_log_warn, vha, 0x0165, 7817 "-> fwdt%u failed template validate\n", j); 7818 goto failed; 7819 } 7820 7821 dlen = qla27xx_fwdt_template_size(dcode); 7822 ql_dbg(ql_dbg_init, vha, 0x0166, 7823 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 7824 j, dlen, dlen / sizeof(*dcode)); 7825 if (dlen > risc_size * sizeof(*dcode)) { 7826 ql_log(ql_log_warn, vha, 0x0167, 7827 "-> fwdt%u template exceeds array (%-lu bytes)\n", 7828 j, dlen - risc_size * sizeof(*dcode)); 7829 goto failed; 7830 } 7831 7832 fwdt->length = dlen; 7833 ql_dbg(ql_dbg_init, vha, 0x0168, 7834 "-> fwdt%u loaded template ok\n", j); 7835 7836 faddr += risc_size + 1; 7837 } 7838 7839 return QLA_SUCCESS; 7840 7841 failed: 7842 if (fwdt->template) 7843 vfree(fwdt->template); 7844 fwdt->template = NULL; 7845 fwdt->length = 0; 7846 7847 return QLA_SUCCESS; 7848 } 7849 7850 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7851 7852 int 7853 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7854 { 7855 int rval; 7856 int i, fragment; 7857 uint16_t *wcode; 7858 __be16 *fwcode; 7859 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7860 struct fw_blob *blob; 7861 struct qla_hw_data *ha = vha->hw; 7862 struct req_que *req = ha->req_q_map[0]; 7863 7864 /* Load firmware blob. */ 7865 blob = qla2x00_request_firmware(vha); 7866 if (!blob) { 7867 ql_log(ql_log_info, vha, 0x0083, 7868 "Firmware image unavailable.\n"); 7869 ql_log(ql_log_info, vha, 0x0084, 7870 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7871 return QLA_FUNCTION_FAILED; 7872 } 7873 7874 rval = QLA_SUCCESS; 7875 7876 wcode = (uint16_t *)req->ring; 7877 *srisc_addr = 0; 7878 fwcode = (__force __be16 *)blob->fw->data; 7879 fwclen = 0; 7880 7881 /* Validate firmware image by checking version. */ 7882 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7883 ql_log(ql_log_fatal, vha, 0x0085, 7884 "Unable to verify integrity of firmware image (%zd).\n", 7885 blob->fw->size); 7886 goto fail_fw_integrity; 7887 } 7888 for (i = 0; i < 4; i++) 7889 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7890 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7891 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7892 wcode[2] == 0 && wcode[3] == 0)) { 7893 ql_log(ql_log_fatal, vha, 0x0086, 7894 "Unable to verify integrity of firmware image.\n"); 7895 ql_log(ql_log_fatal, vha, 0x0087, 7896 "Firmware data: %04x %04x %04x %04x.\n", 7897 wcode[0], wcode[1], wcode[2], wcode[3]); 7898 goto fail_fw_integrity; 7899 } 7900 7901 seg = blob->segs; 7902 while (*seg && rval == QLA_SUCCESS) { 7903 risc_addr = *seg; 7904 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7905 risc_size = be16_to_cpu(fwcode[3]); 7906 7907 /* Validate firmware image size. */ 7908 fwclen += risc_size * sizeof(uint16_t); 7909 if (blob->fw->size < fwclen) { 7910 ql_log(ql_log_fatal, vha, 0x0088, 7911 "Unable to verify integrity of firmware image " 7912 "(%zd).\n", blob->fw->size); 7913 goto fail_fw_integrity; 7914 } 7915 7916 fragment = 0; 7917 while (risc_size > 0 && rval == QLA_SUCCESS) { 7918 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7919 if (wlen > risc_size) 7920 wlen = risc_size; 7921 ql_dbg(ql_dbg_init, vha, 0x0089, 7922 "Loading risc segment@ risc addr %x number of " 7923 "words 0x%x.\n", risc_addr, wlen); 7924 7925 for (i = 0; i < wlen; i++) 7926 wcode[i] = swab16((__force u32)fwcode[i]); 7927 7928 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7929 wlen); 7930 if (rval) { 7931 ql_log(ql_log_fatal, vha, 0x008a, 7932 "Failed to load segment %d of firmware.\n", 7933 fragment); 7934 break; 7935 } 7936 7937 fwcode += wlen; 7938 risc_addr += wlen; 7939 risc_size -= wlen; 7940 fragment++; 7941 } 7942 7943 /* Next segment. */ 7944 seg++; 7945 } 7946 return rval; 7947 7948 fail_fw_integrity: 7949 return QLA_FUNCTION_FAILED; 7950 } 7951 7952 static int 7953 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7954 { 7955 int rval; 7956 uint templates, segments, fragment; 7957 uint32_t *dcode; 7958 ulong dlen; 7959 uint32_t risc_addr, risc_size, risc_attr = 0; 7960 ulong i; 7961 uint j; 7962 struct fw_blob *blob; 7963 __be32 *fwcode; 7964 struct qla_hw_data *ha = vha->hw; 7965 struct req_que *req = ha->req_q_map[0]; 7966 struct fwdt *fwdt = ha->fwdt; 7967 7968 ql_dbg(ql_dbg_init, vha, 0x0090, 7969 "-> FW: Loading via request-firmware.\n"); 7970 7971 blob = qla2x00_request_firmware(vha); 7972 if (!blob) { 7973 ql_log(ql_log_warn, vha, 0x0092, 7974 "-> Firmware file not found.\n"); 7975 7976 return QLA_FUNCTION_FAILED; 7977 } 7978 7979 fwcode = (__force __be32 *)blob->fw->data; 7980 dcode = (__force uint32_t *)fwcode; 7981 if (qla24xx_risc_firmware_invalid(dcode)) { 7982 ql_log(ql_log_fatal, vha, 0x0093, 7983 "Unable to verify integrity of firmware image (%zd).\n", 7984 blob->fw->size); 7985 ql_log(ql_log_fatal, vha, 0x0095, 7986 "Firmware data: %08x %08x %08x %08x.\n", 7987 dcode[0], dcode[1], dcode[2], dcode[3]); 7988 return QLA_FUNCTION_FAILED; 7989 } 7990 7991 dcode = (uint32_t *)req->ring; 7992 *srisc_addr = 0; 7993 segments = FA_RISC_CODE_SEGMENTS; 7994 for (j = 0; j < segments; j++) { 7995 ql_dbg(ql_dbg_init, vha, 0x0096, 7996 "-> Loading segment %u...\n", j); 7997 risc_addr = be32_to_cpu(fwcode[2]); 7998 risc_size = be32_to_cpu(fwcode[3]); 7999 8000 if (!*srisc_addr) { 8001 *srisc_addr = risc_addr; 8002 risc_attr = be32_to_cpu(fwcode[9]); 8003 } 8004 8005 dlen = ha->fw_transfer_size >> 2; 8006 for (fragment = 0; risc_size; fragment++) { 8007 if (dlen > risc_size) 8008 dlen = risc_size; 8009 8010 ql_dbg(ql_dbg_init, vha, 0x0097, 8011 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 8012 fragment, risc_addr, 8013 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 8014 dlen); 8015 8016 for (i = 0; i < dlen; i++) 8017 dcode[i] = swab32((__force u32)fwcode[i]); 8018 8019 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8020 if (rval) { 8021 ql_log(ql_log_fatal, vha, 0x0098, 8022 "-> Failed load firmware fragment %u.\n", 8023 fragment); 8024 return QLA_FUNCTION_FAILED; 8025 } 8026 8027 fwcode += dlen; 8028 risc_addr += dlen; 8029 risc_size -= dlen; 8030 } 8031 } 8032 8033 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8034 return QLA_SUCCESS; 8035 8036 templates = (risc_attr & BIT_9) ? 2 : 1; 8037 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 8038 for (j = 0; j < templates; j++, fwdt++) { 8039 if (fwdt->template) 8040 vfree(fwdt->template); 8041 fwdt->template = NULL; 8042 fwdt->length = 0; 8043 8044 risc_size = be32_to_cpu(fwcode[2]); 8045 ql_dbg(ql_dbg_init, vha, 0x0171, 8046 "-> fwdt%u template array at %#x (%#x dwords)\n", 8047 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 8048 risc_size); 8049 if (!risc_size || !~risc_size) { 8050 ql_dbg(ql_dbg_init, vha, 0x0172, 8051 "-> fwdt%u failed to read array\n", j); 8052 goto failed; 8053 } 8054 8055 /* skip header and ignore checksum */ 8056 fwcode += 7; 8057 risc_size -= 8; 8058 8059 ql_dbg(ql_dbg_init, vha, 0x0173, 8060 "-> fwdt%u template allocate template %#x words...\n", 8061 j, risc_size); 8062 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8063 if (!fwdt->template) { 8064 ql_log(ql_log_warn, vha, 0x0174, 8065 "-> fwdt%u failed allocate template.\n", j); 8066 goto failed; 8067 } 8068 8069 dcode = fwdt->template; 8070 for (i = 0; i < risc_size; i++) 8071 dcode[i] = (__force u32)fwcode[i]; 8072 8073 if (!qla27xx_fwdt_template_valid(dcode)) { 8074 ql_log(ql_log_warn, vha, 0x0175, 8075 "-> fwdt%u failed template validate\n", j); 8076 goto failed; 8077 } 8078 8079 dlen = qla27xx_fwdt_template_size(dcode); 8080 ql_dbg(ql_dbg_init, vha, 0x0176, 8081 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8082 j, dlen, dlen / sizeof(*dcode)); 8083 if (dlen > risc_size * sizeof(*dcode)) { 8084 ql_log(ql_log_warn, vha, 0x0177, 8085 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8086 j, dlen - risc_size * sizeof(*dcode)); 8087 goto failed; 8088 } 8089 8090 fwdt->length = dlen; 8091 ql_dbg(ql_dbg_init, vha, 0x0178, 8092 "-> fwdt%u loaded template ok\n", j); 8093 8094 fwcode += risc_size + 1; 8095 } 8096 8097 return QLA_SUCCESS; 8098 8099 failed: 8100 if (fwdt->template) 8101 vfree(fwdt->template); 8102 fwdt->template = NULL; 8103 fwdt->length = 0; 8104 8105 return QLA_SUCCESS; 8106 } 8107 8108 int 8109 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8110 { 8111 int rval; 8112 8113 if (ql2xfwloadbin == 1) 8114 return qla81xx_load_risc(vha, srisc_addr); 8115 8116 /* 8117 * FW Load priority: 8118 * 1) Firmware via request-firmware interface (.bin file). 8119 * 2) Firmware residing in flash. 8120 */ 8121 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8122 if (rval == QLA_SUCCESS) 8123 return rval; 8124 8125 return qla24xx_load_risc_flash(vha, srisc_addr, 8126 vha->hw->flt_region_fw); 8127 } 8128 8129 int 8130 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8131 { 8132 int rval; 8133 struct qla_hw_data *ha = vha->hw; 8134 struct active_regions active_regions = { }; 8135 8136 if (ql2xfwloadbin == 2) 8137 goto try_blob_fw; 8138 8139 /* FW Load priority: 8140 * 1) Firmware residing in flash. 8141 * 2) Firmware via request-firmware interface (.bin file). 8142 * 3) Golden-Firmware residing in flash -- (limited operation). 8143 */ 8144 8145 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8146 goto try_primary_fw; 8147 8148 qla27xx_get_active_image(vha, &active_regions); 8149 8150 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8151 goto try_primary_fw; 8152 8153 ql_dbg(ql_dbg_init, vha, 0x008b, 8154 "Loading secondary firmware image.\n"); 8155 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8156 if (!rval) 8157 return rval; 8158 8159 try_primary_fw: 8160 ql_dbg(ql_dbg_init, vha, 0x008b, 8161 "Loading primary firmware image.\n"); 8162 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8163 if (!rval) 8164 return rval; 8165 8166 try_blob_fw: 8167 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8168 if (!rval || !ha->flt_region_gold_fw) 8169 return rval; 8170 8171 ql_log(ql_log_info, vha, 0x0099, 8172 "Attempting to fallback to golden firmware.\n"); 8173 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8174 if (rval) 8175 return rval; 8176 8177 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8178 ha->flags.running_gold_fw = 1; 8179 return rval; 8180 } 8181 8182 void 8183 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8184 { 8185 int ret, retries; 8186 struct qla_hw_data *ha = vha->hw; 8187 8188 if (ha->flags.pci_channel_io_perm_failure) 8189 return; 8190 if (!IS_FWI2_CAPABLE(ha)) 8191 return; 8192 if (!ha->fw_major_version) 8193 return; 8194 if (!ha->flags.fw_started) 8195 return; 8196 8197 ret = qla2x00_stop_firmware(vha); 8198 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8199 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8200 ha->isp_ops->reset_chip(vha); 8201 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8202 continue; 8203 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8204 continue; 8205 ql_log(ql_log_info, vha, 0x8015, 8206 "Attempting retry of stop-firmware command.\n"); 8207 ret = qla2x00_stop_firmware(vha); 8208 } 8209 8210 QLA_FW_STOPPED(ha); 8211 ha->flags.fw_init_done = 0; 8212 } 8213 8214 int 8215 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8216 { 8217 int rval = QLA_SUCCESS; 8218 int rval2; 8219 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8220 struct qla_hw_data *ha = vha->hw; 8221 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8222 8223 if (!vha->vp_idx) 8224 return -EINVAL; 8225 8226 rval = qla2x00_fw_ready(base_vha); 8227 8228 if (rval == QLA_SUCCESS) { 8229 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8230 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8231 } 8232 8233 vha->flags.management_server_logged_in = 0; 8234 8235 /* Login to SNS first */ 8236 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8237 BIT_1); 8238 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8239 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8240 ql_dbg(ql_dbg_init, vha, 0x0120, 8241 "Failed SNS login: loop_id=%x, rval2=%d\n", 8242 NPH_SNS, rval2); 8243 else 8244 ql_dbg(ql_dbg_init, vha, 0x0103, 8245 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8246 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8247 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8248 return (QLA_FUNCTION_FAILED); 8249 } 8250 8251 atomic_set(&vha->loop_down_timer, 0); 8252 atomic_set(&vha->loop_state, LOOP_UP); 8253 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8254 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8255 rval = qla2x00_loop_resync(base_vha); 8256 8257 return rval; 8258 } 8259 8260 /* 84XX Support **************************************************************/ 8261 8262 static LIST_HEAD(qla_cs84xx_list); 8263 static DEFINE_MUTEX(qla_cs84xx_mutex); 8264 8265 static struct qla_chip_state_84xx * 8266 qla84xx_get_chip(struct scsi_qla_host *vha) 8267 { 8268 struct qla_chip_state_84xx *cs84xx; 8269 struct qla_hw_data *ha = vha->hw; 8270 8271 mutex_lock(&qla_cs84xx_mutex); 8272 8273 /* Find any shared 84xx chip. */ 8274 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8275 if (cs84xx->bus == ha->pdev->bus) { 8276 kref_get(&cs84xx->kref); 8277 goto done; 8278 } 8279 } 8280 8281 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8282 if (!cs84xx) 8283 goto done; 8284 8285 kref_init(&cs84xx->kref); 8286 spin_lock_init(&cs84xx->access_lock); 8287 mutex_init(&cs84xx->fw_update_mutex); 8288 cs84xx->bus = ha->pdev->bus; 8289 8290 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8291 done: 8292 mutex_unlock(&qla_cs84xx_mutex); 8293 return cs84xx; 8294 } 8295 8296 static void 8297 __qla84xx_chip_release(struct kref *kref) 8298 { 8299 struct qla_chip_state_84xx *cs84xx = 8300 container_of(kref, struct qla_chip_state_84xx, kref); 8301 8302 mutex_lock(&qla_cs84xx_mutex); 8303 list_del(&cs84xx->list); 8304 mutex_unlock(&qla_cs84xx_mutex); 8305 kfree(cs84xx); 8306 } 8307 8308 void 8309 qla84xx_put_chip(struct scsi_qla_host *vha) 8310 { 8311 struct qla_hw_data *ha = vha->hw; 8312 8313 if (ha->cs84xx) 8314 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8315 } 8316 8317 static int 8318 qla84xx_init_chip(scsi_qla_host_t *vha) 8319 { 8320 int rval; 8321 uint16_t status[2]; 8322 struct qla_hw_data *ha = vha->hw; 8323 8324 mutex_lock(&ha->cs84xx->fw_update_mutex); 8325 8326 rval = qla84xx_verify_chip(vha, status); 8327 8328 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8329 8330 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8331 QLA_SUCCESS; 8332 } 8333 8334 /* 81XX Support **************************************************************/ 8335 8336 int 8337 qla81xx_nvram_config(scsi_qla_host_t *vha) 8338 { 8339 int rval; 8340 struct init_cb_81xx *icb; 8341 struct nvram_81xx *nv; 8342 __le32 *dptr; 8343 uint8_t *dptr1, *dptr2; 8344 uint32_t chksum; 8345 uint16_t cnt; 8346 struct qla_hw_data *ha = vha->hw; 8347 uint32_t faddr; 8348 struct active_regions active_regions = { }; 8349 8350 rval = QLA_SUCCESS; 8351 icb = (struct init_cb_81xx *)ha->init_cb; 8352 nv = ha->nvram; 8353 8354 /* Determine NVRAM starting address. */ 8355 ha->nvram_size = sizeof(*nv); 8356 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8357 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8358 ha->vpd_size = FA_VPD_SIZE_82XX; 8359 8360 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8361 qla28xx_get_aux_images(vha, &active_regions); 8362 8363 /* Get VPD data into cache */ 8364 ha->vpd = ha->nvram + VPD_OFFSET; 8365 8366 faddr = ha->flt_region_vpd; 8367 if (IS_QLA28XX(ha)) { 8368 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8369 faddr = ha->flt_region_vpd_sec; 8370 ql_dbg(ql_dbg_init, vha, 0x0110, 8371 "Loading %s nvram image.\n", 8372 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8373 "primary" : "secondary"); 8374 } 8375 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8376 8377 /* Get NVRAM data into cache and calculate checksum. */ 8378 faddr = ha->flt_region_nvram; 8379 if (IS_QLA28XX(ha)) { 8380 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8381 faddr = ha->flt_region_nvram_sec; 8382 } 8383 ql_dbg(ql_dbg_init, vha, 0x0110, 8384 "Loading %s nvram image.\n", 8385 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8386 "primary" : "secondary"); 8387 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8388 8389 dptr = (__force __le32 *)nv; 8390 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8391 chksum += le32_to_cpu(*dptr); 8392 8393 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8394 "Contents of NVRAM:\n"); 8395 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8396 nv, ha->nvram_size); 8397 8398 /* Bad NVRAM data, set defaults parameters. */ 8399 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 8400 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 8401 /* Reset NVRAM data. */ 8402 ql_log(ql_log_info, vha, 0x0073, 8403 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 8404 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 8405 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 8406 ql_log(ql_log_info, vha, 0x0074, 8407 "Falling back to functioning (yet invalid -- WWPN) " 8408 "defaults.\n"); 8409 8410 /* 8411 * Set default initialization control block. 8412 */ 8413 memset(nv, 0, ha->nvram_size); 8414 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8415 nv->version = cpu_to_le16(ICB_VERSION); 8416 nv->frame_payload_size = cpu_to_le16(2048); 8417 nv->execution_throttle = cpu_to_le16(0xFFFF); 8418 nv->exchange_count = cpu_to_le16(0); 8419 nv->port_name[0] = 0x21; 8420 nv->port_name[1] = 0x00 + ha->port_no + 1; 8421 nv->port_name[2] = 0x00; 8422 nv->port_name[3] = 0xe0; 8423 nv->port_name[4] = 0x8b; 8424 nv->port_name[5] = 0x1c; 8425 nv->port_name[6] = 0x55; 8426 nv->port_name[7] = 0x86; 8427 nv->node_name[0] = 0x20; 8428 nv->node_name[1] = 0x00; 8429 nv->node_name[2] = 0x00; 8430 nv->node_name[3] = 0xe0; 8431 nv->node_name[4] = 0x8b; 8432 nv->node_name[5] = 0x1c; 8433 nv->node_name[6] = 0x55; 8434 nv->node_name[7] = 0x86; 8435 nv->login_retry_count = cpu_to_le16(8); 8436 nv->interrupt_delay_timer = cpu_to_le16(0); 8437 nv->login_timeout = cpu_to_le16(0); 8438 nv->firmware_options_1 = 8439 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8440 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8441 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8442 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8443 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8444 nv->efi_parameters = cpu_to_le32(0); 8445 nv->reset_delay = 5; 8446 nv->max_luns_per_target = cpu_to_le16(128); 8447 nv->port_down_retry_count = cpu_to_le16(30); 8448 nv->link_down_timeout = cpu_to_le16(180); 8449 nv->enode_mac[0] = 0x00; 8450 nv->enode_mac[1] = 0xC0; 8451 nv->enode_mac[2] = 0xDD; 8452 nv->enode_mac[3] = 0x04; 8453 nv->enode_mac[4] = 0x05; 8454 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8455 8456 rval = 1; 8457 } 8458 8459 if (IS_T10_PI_CAPABLE(ha)) 8460 nv->frame_payload_size &= cpu_to_le16(~7); 8461 8462 qlt_81xx_config_nvram_stage1(vha, nv); 8463 8464 /* Reset Initialization control block */ 8465 memset(icb, 0, ha->init_cb_size); 8466 8467 /* Copy 1st segment. */ 8468 dptr1 = (uint8_t *)icb; 8469 dptr2 = (uint8_t *)&nv->version; 8470 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8471 while (cnt--) 8472 *dptr1++ = *dptr2++; 8473 8474 icb->login_retry_count = nv->login_retry_count; 8475 8476 /* Copy 2nd segment. */ 8477 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8478 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8479 cnt = (uint8_t *)&icb->reserved_5 - 8480 (uint8_t *)&icb->interrupt_delay_timer; 8481 while (cnt--) 8482 *dptr1++ = *dptr2++; 8483 8484 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8485 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8486 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8487 icb->enode_mac[0] = 0x00; 8488 icb->enode_mac[1] = 0xC0; 8489 icb->enode_mac[2] = 0xDD; 8490 icb->enode_mac[3] = 0x04; 8491 icb->enode_mac[4] = 0x05; 8492 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8493 } 8494 8495 /* Use extended-initialization control block. */ 8496 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8497 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8498 /* 8499 * Setup driver NVRAM options. 8500 */ 8501 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8502 "QLE8XXX"); 8503 8504 qlt_81xx_config_nvram_stage2(vha, icb); 8505 8506 /* Use alternate WWN? */ 8507 if (nv->host_p & cpu_to_le32(BIT_15)) { 8508 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8509 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8510 } 8511 8512 /* Prepare nodename */ 8513 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8514 /* 8515 * Firmware will apply the following mask if the nodename was 8516 * not provided. 8517 */ 8518 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8519 icb->node_name[0] &= 0xF0; 8520 } 8521 8522 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) { 8523 if ((nv->enhanced_features & BIT_7) == 0) 8524 ha->flags.scm_supported_a = 1; 8525 } 8526 8527 /* Set host adapter parameters. */ 8528 ha->flags.disable_risc_code_load = 0; 8529 ha->flags.enable_lip_reset = 0; 8530 ha->flags.enable_lip_full_login = 8531 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 8532 ha->flags.enable_target_reset = 8533 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8534 ha->flags.enable_led_scheme = 0; 8535 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8536 8537 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8538 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8539 8540 /* save HBA serial number */ 8541 ha->serial0 = icb->port_name[5]; 8542 ha->serial1 = icb->port_name[6]; 8543 ha->serial2 = icb->port_name[7]; 8544 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8545 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8546 8547 icb->execution_throttle = cpu_to_le16(0xFFFF); 8548 8549 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8550 8551 /* Set minimum login_timeout to 4 seconds. */ 8552 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8553 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8554 if (le16_to_cpu(nv->login_timeout) < 4) 8555 nv->login_timeout = cpu_to_le16(4); 8556 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8557 8558 /* Set minimum RATOV to 100 tenths of a second. */ 8559 ha->r_a_tov = 100; 8560 8561 ha->loop_reset_delay = nv->reset_delay; 8562 8563 /* Link Down Timeout = 0: 8564 * 8565 * When Port Down timer expires we will start returning 8566 * I/O's to OS with "DID_NO_CONNECT". 8567 * 8568 * Link Down Timeout != 0: 8569 * 8570 * The driver waits for the link to come up after link down 8571 * before returning I/Os to OS with "DID_NO_CONNECT". 8572 */ 8573 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8574 ha->loop_down_abort_time = 8575 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8576 } else { 8577 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8578 ha->loop_down_abort_time = 8579 (LOOP_DOWN_TIME - ha->link_down_timeout); 8580 } 8581 8582 /* Need enough time to try and get the port back. */ 8583 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8584 if (qlport_down_retry) 8585 ha->port_down_retry_count = qlport_down_retry; 8586 8587 /* Set login_retry_count */ 8588 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8589 if (ha->port_down_retry_count == 8590 le16_to_cpu(nv->port_down_retry_count) && 8591 ha->port_down_retry_count > 3) 8592 ha->login_retry_count = ha->port_down_retry_count; 8593 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8594 ha->login_retry_count = ha->port_down_retry_count; 8595 if (ql2xloginretrycount) 8596 ha->login_retry_count = ql2xloginretrycount; 8597 8598 /* if not running MSI-X we need handshaking on interrupts */ 8599 if (!vha->hw->flags.msix_enabled && 8600 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 8601 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8602 8603 /* Enable ZIO. */ 8604 if (!vha->flags.init_done) { 8605 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8606 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8607 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8608 le16_to_cpu(icb->interrupt_delay_timer) : 2; 8609 } 8610 icb->firmware_options_2 &= cpu_to_le32( 8611 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8612 vha->flags.process_response_queue = 0; 8613 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8614 ha->zio_mode = QLA_ZIO_MODE_6; 8615 8616 ql_log(ql_log_info, vha, 0x0075, 8617 "ZIO mode %d enabled; timer delay (%d us).\n", 8618 ha->zio_mode, 8619 ha->zio_timer * 100); 8620 8621 icb->firmware_options_2 |= cpu_to_le32( 8622 (uint32_t)ha->zio_mode); 8623 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8624 vha->flags.process_response_queue = 1; 8625 } 8626 8627 /* enable RIDA Format2 */ 8628 icb->firmware_options_3 |= cpu_to_le32(BIT_0); 8629 8630 /* N2N: driver will initiate Login instead of FW */ 8631 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 8632 8633 /* Determine NVMe/FCP priority for target ports */ 8634 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 8635 8636 if (rval) { 8637 ql_log(ql_log_warn, vha, 0x0076, 8638 "NVRAM configuration failed.\n"); 8639 } 8640 return (rval); 8641 } 8642 8643 int 8644 qla82xx_restart_isp(scsi_qla_host_t *vha) 8645 { 8646 int status, rval; 8647 struct qla_hw_data *ha = vha->hw; 8648 struct scsi_qla_host *vp; 8649 unsigned long flags; 8650 8651 status = qla2x00_init_rings(vha); 8652 if (!status) { 8653 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8654 ha->flags.chip_reset_done = 1; 8655 8656 status = qla2x00_fw_ready(vha); 8657 if (!status) { 8658 /* Issue a marker after FW becomes ready. */ 8659 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8660 vha->flags.online = 1; 8661 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8662 } 8663 8664 /* if no cable then assume it's good */ 8665 if ((vha->device_flags & DFLG_NO_CABLE)) 8666 status = 0; 8667 } 8668 8669 if (!status) { 8670 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8671 8672 if (!atomic_read(&vha->loop_down_timer)) { 8673 /* 8674 * Issue marker command only when we are going 8675 * to start the I/O . 8676 */ 8677 vha->marker_needed = 1; 8678 } 8679 8680 ha->isp_ops->enable_intrs(ha); 8681 8682 ha->isp_abort_cnt = 0; 8683 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8684 8685 /* Update the firmware version */ 8686 status = qla82xx_check_md_needed(vha); 8687 8688 if (ha->fce) { 8689 ha->flags.fce_enabled = 1; 8690 memset(ha->fce, 0, 8691 fce_calc_size(ha->fce_bufs)); 8692 rval = qla2x00_enable_fce_trace(vha, 8693 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8694 &ha->fce_bufs); 8695 if (rval) { 8696 ql_log(ql_log_warn, vha, 0x8001, 8697 "Unable to reinitialize FCE (%d).\n", 8698 rval); 8699 ha->flags.fce_enabled = 0; 8700 } 8701 } 8702 8703 if (ha->eft) { 8704 memset(ha->eft, 0, EFT_SIZE); 8705 rval = qla2x00_enable_eft_trace(vha, 8706 ha->eft_dma, EFT_NUM_BUFFERS); 8707 if (rval) { 8708 ql_log(ql_log_warn, vha, 0x8010, 8709 "Unable to reinitialize EFT (%d).\n", 8710 rval); 8711 } 8712 } 8713 } 8714 8715 if (!status) { 8716 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8717 "qla82xx_restart_isp succeeded.\n"); 8718 8719 spin_lock_irqsave(&ha->vport_slock, flags); 8720 list_for_each_entry(vp, &ha->vp_list, list) { 8721 if (vp->vp_idx) { 8722 atomic_inc(&vp->vref_count); 8723 spin_unlock_irqrestore(&ha->vport_slock, flags); 8724 8725 qla2x00_vp_abort_isp(vp); 8726 8727 spin_lock_irqsave(&ha->vport_slock, flags); 8728 atomic_dec(&vp->vref_count); 8729 } 8730 } 8731 spin_unlock_irqrestore(&ha->vport_slock, flags); 8732 8733 } else { 8734 ql_log(ql_log_warn, vha, 0x8016, 8735 "qla82xx_restart_isp **** FAILED ****.\n"); 8736 } 8737 8738 return status; 8739 } 8740 8741 /* 8742 * qla24xx_get_fcp_prio 8743 * Gets the fcp cmd priority value for the logged in port. 8744 * Looks for a match of the port descriptors within 8745 * each of the fcp prio config entries. If a match is found, 8746 * the tag (priority) value is returned. 8747 * 8748 * Input: 8749 * vha = scsi host structure pointer. 8750 * fcport = port structure pointer. 8751 * 8752 * Return: 8753 * non-zero (if found) 8754 * -1 (if not found) 8755 * 8756 * Context: 8757 * Kernel context 8758 */ 8759 static int 8760 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8761 { 8762 int i, entries; 8763 uint8_t pid_match, wwn_match; 8764 int priority; 8765 uint32_t pid1, pid2; 8766 uint64_t wwn1, wwn2; 8767 struct qla_fcp_prio_entry *pri_entry; 8768 struct qla_hw_data *ha = vha->hw; 8769 8770 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8771 return -1; 8772 8773 priority = -1; 8774 entries = ha->fcp_prio_cfg->num_entries; 8775 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8776 8777 for (i = 0; i < entries; i++) { 8778 pid_match = wwn_match = 0; 8779 8780 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8781 pri_entry++; 8782 continue; 8783 } 8784 8785 /* check source pid for a match */ 8786 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8787 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8788 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8789 if (pid1 == INVALID_PORT_ID) 8790 pid_match++; 8791 else if (pid1 == pid2) 8792 pid_match++; 8793 } 8794 8795 /* check destination pid for a match */ 8796 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8797 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8798 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8799 if (pid1 == INVALID_PORT_ID) 8800 pid_match++; 8801 else if (pid1 == pid2) 8802 pid_match++; 8803 } 8804 8805 /* check source WWN for a match */ 8806 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8807 wwn1 = wwn_to_u64(vha->port_name); 8808 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8809 if (wwn2 == (uint64_t)-1) 8810 wwn_match++; 8811 else if (wwn1 == wwn2) 8812 wwn_match++; 8813 } 8814 8815 /* check destination WWN for a match */ 8816 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8817 wwn1 = wwn_to_u64(fcport->port_name); 8818 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8819 if (wwn2 == (uint64_t)-1) 8820 wwn_match++; 8821 else if (wwn1 == wwn2) 8822 wwn_match++; 8823 } 8824 8825 if (pid_match == 2 || wwn_match == 2) { 8826 /* Found a matching entry */ 8827 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8828 priority = pri_entry->tag; 8829 break; 8830 } 8831 8832 pri_entry++; 8833 } 8834 8835 return priority; 8836 } 8837 8838 /* 8839 * qla24xx_update_fcport_fcp_prio 8840 * Activates fcp priority for the logged in fc port 8841 * 8842 * Input: 8843 * vha = scsi host structure pointer. 8844 * fcp = port structure pointer. 8845 * 8846 * Return: 8847 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8848 * 8849 * Context: 8850 * Kernel context. 8851 */ 8852 int 8853 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8854 { 8855 int ret; 8856 int priority; 8857 uint16_t mb[5]; 8858 8859 if (fcport->port_type != FCT_TARGET || 8860 fcport->loop_id == FC_NO_LOOP_ID) 8861 return QLA_FUNCTION_FAILED; 8862 8863 priority = qla24xx_get_fcp_prio(vha, fcport); 8864 if (priority < 0) 8865 return QLA_FUNCTION_FAILED; 8866 8867 if (IS_P3P_TYPE(vha->hw)) { 8868 fcport->fcp_prio = priority & 0xf; 8869 return QLA_SUCCESS; 8870 } 8871 8872 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8873 if (ret == QLA_SUCCESS) { 8874 if (fcport->fcp_prio != priority) 8875 ql_dbg(ql_dbg_user, vha, 0x709e, 8876 "Updated FCP_CMND priority - value=%d loop_id=%d " 8877 "port_id=%02x%02x%02x.\n", priority, 8878 fcport->loop_id, fcport->d_id.b.domain, 8879 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8880 fcport->fcp_prio = priority & 0xf; 8881 } else 8882 ql_dbg(ql_dbg_user, vha, 0x704f, 8883 "Unable to update FCP_CMND priority - ret=0x%x for " 8884 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8885 fcport->d_id.b.domain, fcport->d_id.b.area, 8886 fcport->d_id.b.al_pa); 8887 return ret; 8888 } 8889 8890 /* 8891 * qla24xx_update_all_fcp_prio 8892 * Activates fcp priority for all the logged in ports 8893 * 8894 * Input: 8895 * ha = adapter block pointer. 8896 * 8897 * Return: 8898 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8899 * 8900 * Context: 8901 * Kernel context. 8902 */ 8903 int 8904 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8905 { 8906 int ret; 8907 fc_port_t *fcport; 8908 8909 ret = QLA_FUNCTION_FAILED; 8910 /* We need to set priority for all logged in ports */ 8911 list_for_each_entry(fcport, &vha->vp_fcports, list) 8912 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8913 8914 return ret; 8915 } 8916 8917 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8918 int vp_idx, bool startqp) 8919 { 8920 int rsp_id = 0; 8921 int req_id = 0; 8922 int i; 8923 struct qla_hw_data *ha = vha->hw; 8924 uint16_t qpair_id = 0; 8925 struct qla_qpair *qpair = NULL; 8926 struct qla_msix_entry *msix; 8927 8928 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8929 ql_log(ql_log_warn, vha, 0x00181, 8930 "FW/Driver is not multi-queue capable.\n"); 8931 return NULL; 8932 } 8933 8934 if (ql2xmqsupport || ql2xnvmeenable) { 8935 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8936 if (qpair == NULL) { 8937 ql_log(ql_log_warn, vha, 0x0182, 8938 "Failed to allocate memory for queue pair.\n"); 8939 return NULL; 8940 } 8941 8942 qpair->hw = vha->hw; 8943 qpair->vha = vha; 8944 qpair->qp_lock_ptr = &qpair->qp_lock; 8945 spin_lock_init(&qpair->qp_lock); 8946 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8947 8948 /* Assign available que pair id */ 8949 mutex_lock(&ha->mq_lock); 8950 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8951 if (ha->num_qpairs >= ha->max_qpairs) { 8952 mutex_unlock(&ha->mq_lock); 8953 ql_log(ql_log_warn, vha, 0x0183, 8954 "No resources to create additional q pair.\n"); 8955 goto fail_qid_map; 8956 } 8957 ha->num_qpairs++; 8958 set_bit(qpair_id, ha->qpair_qid_map); 8959 ha->queue_pair_map[qpair_id] = qpair; 8960 qpair->id = qpair_id; 8961 qpair->vp_idx = vp_idx; 8962 qpair->fw_started = ha->flags.fw_started; 8963 INIT_LIST_HEAD(&qpair->hints_list); 8964 qpair->chip_reset = ha->base_qpair->chip_reset; 8965 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8966 qpair->enable_explicit_conf = 8967 ha->base_qpair->enable_explicit_conf; 8968 8969 for (i = 0; i < ha->msix_count; i++) { 8970 msix = &ha->msix_entries[i]; 8971 if (msix->in_use) 8972 continue; 8973 qpair->msix = msix; 8974 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8975 "Vector %x selected for qpair\n", msix->vector); 8976 break; 8977 } 8978 if (!qpair->msix) { 8979 ql_log(ql_log_warn, vha, 0x0184, 8980 "Out of MSI-X vectors!.\n"); 8981 goto fail_msix; 8982 } 8983 8984 qpair->msix->in_use = 1; 8985 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8986 qpair->pdev = ha->pdev; 8987 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 8988 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8989 8990 mutex_unlock(&ha->mq_lock); 8991 8992 /* Create response queue first */ 8993 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8994 if (!rsp_id) { 8995 ql_log(ql_log_warn, vha, 0x0185, 8996 "Failed to create response queue.\n"); 8997 goto fail_rsp; 8998 } 8999 9000 qpair->rsp = ha->rsp_q_map[rsp_id]; 9001 9002 /* Create request queue */ 9003 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 9004 startqp); 9005 if (!req_id) { 9006 ql_log(ql_log_warn, vha, 0x0186, 9007 "Failed to create request queue.\n"); 9008 goto fail_req; 9009 } 9010 9011 qpair->req = ha->req_q_map[req_id]; 9012 qpair->rsp->req = qpair->req; 9013 qpair->rsp->qpair = qpair; 9014 /* init qpair to this cpu. Will adjust at run time. */ 9015 qla_cpu_update(qpair, smp_processor_id()); 9016 9017 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 9018 if (ha->fw_attributes & BIT_4) 9019 qpair->difdix_supported = 1; 9020 } 9021 9022 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 9023 if (!qpair->srb_mempool) { 9024 ql_log(ql_log_warn, vha, 0xd036, 9025 "Failed to create srb mempool for qpair %d\n", 9026 qpair->id); 9027 goto fail_mempool; 9028 } 9029 9030 /* Mark as online */ 9031 qpair->online = 1; 9032 9033 if (!vha->flags.qpairs_available) 9034 vha->flags.qpairs_available = 1; 9035 9036 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 9037 "Request/Response queue pair created, id %d\n", 9038 qpair->id); 9039 ql_dbg(ql_dbg_init, vha, 0x0187, 9040 "Request/Response queue pair created, id %d\n", 9041 qpair->id); 9042 } 9043 return qpair; 9044 9045 fail_mempool: 9046 fail_req: 9047 qla25xx_delete_rsp_que(vha, qpair->rsp); 9048 fail_rsp: 9049 mutex_lock(&ha->mq_lock); 9050 qpair->msix->in_use = 0; 9051 list_del(&qpair->qp_list_elem); 9052 if (list_empty(&vha->qp_list)) 9053 vha->flags.qpairs_available = 0; 9054 fail_msix: 9055 ha->queue_pair_map[qpair_id] = NULL; 9056 clear_bit(qpair_id, ha->qpair_qid_map); 9057 ha->num_qpairs--; 9058 mutex_unlock(&ha->mq_lock); 9059 fail_qid_map: 9060 kfree(qpair); 9061 return NULL; 9062 } 9063 9064 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9065 { 9066 int ret = QLA_FUNCTION_FAILED; 9067 struct qla_hw_data *ha = qpair->hw; 9068 9069 qpair->delete_in_progress = 1; 9070 9071 ret = qla25xx_delete_req_que(vha, qpair->req); 9072 if (ret != QLA_SUCCESS) 9073 goto fail; 9074 9075 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9076 if (ret != QLA_SUCCESS) 9077 goto fail; 9078 9079 mutex_lock(&ha->mq_lock); 9080 ha->queue_pair_map[qpair->id] = NULL; 9081 clear_bit(qpair->id, ha->qpair_qid_map); 9082 ha->num_qpairs--; 9083 list_del(&qpair->qp_list_elem); 9084 if (list_empty(&vha->qp_list)) { 9085 vha->flags.qpairs_available = 0; 9086 vha->flags.qpairs_req_created = 0; 9087 vha->flags.qpairs_rsp_created = 0; 9088 } 9089 mempool_destroy(qpair->srb_mempool); 9090 kfree(qpair); 9091 mutex_unlock(&ha->mq_lock); 9092 9093 return QLA_SUCCESS; 9094 fail: 9095 return ret; 9096 } 9097