1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2011 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 /* 21 * QLogic ISP2x00 Hardware Support Function Prototypes. 22 */ 23 static int qla2x00_isp_firmware(scsi_qla_host_t *); 24 static int qla2x00_setup_chip(scsi_qla_host_t *); 25 static int qla2x00_init_rings(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); 32 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, 33 uint16_t *); 34 35 static int qla2x00_restart_isp(scsi_qla_host_t *); 36 37 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 38 static int qla84xx_init_chip(scsi_qla_host_t *); 39 static int qla25xx_init_queues(struct qla_hw_data *); 40 41 /* SRB Extensions ---------------------------------------------------------- */ 42 43 void 44 qla2x00_sp_timeout(unsigned long __data) 45 { 46 srb_t *sp = (srb_t *)__data; 47 struct srb_iocb *iocb; 48 fc_port_t *fcport = sp->fcport; 49 struct qla_hw_data *ha = fcport->vha->hw; 50 struct req_que *req; 51 unsigned long flags; 52 53 spin_lock_irqsave(&ha->hardware_lock, flags); 54 req = ha->req_q_map[0]; 55 req->outstanding_cmds[sp->handle] = NULL; 56 iocb = &sp->u.iocb_cmd; 57 iocb->timeout(sp); 58 sp->free(fcport->vha, sp); 59 spin_unlock_irqrestore(&ha->hardware_lock, flags); 60 } 61 62 void 63 qla2x00_sp_free(void *data, void *ptr) 64 { 65 srb_t *sp = (srb_t *)ptr; 66 struct srb_iocb *iocb = &sp->u.iocb_cmd; 67 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 68 69 del_timer(&iocb->timer); 70 mempool_free(sp, vha->hw->srb_mempool); 71 72 QLA_VHA_MARK_NOT_BUSY(vha); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 static inline unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (!IS_FWI2_CAPABLE(ha)) { 86 /* 87 * Except for earlier ISPs where the timeout is seeded from the 88 * initialization control block. 89 */ 90 tmo = ha->login_timeout; 91 } 92 return tmo; 93 } 94 95 static void 96 qla2x00_async_iocb_timeout(void *data) 97 { 98 srb_t *sp = (srb_t *)data; 99 fc_port_t *fcport = sp->fcport; 100 101 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 102 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n", 103 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area, 104 fcport->d_id.b.al_pa); 105 106 fcport->flags &= ~FCF_ASYNC_SENT; 107 if (sp->type == SRB_LOGIN_CMD) { 108 struct srb_iocb *lio = &sp->u.iocb_cmd; 109 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); 110 /* Retry as needed. */ 111 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 112 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 113 QLA_LOGIO_LOGIN_RETRIED : 0; 114 qla2x00_post_async_login_done_work(fcport->vha, fcport, 115 lio->u.logio.data); 116 } 117 } 118 119 static void 120 qla2x00_async_login_sp_done(void *data, void *ptr, int res) 121 { 122 srb_t *sp = (srb_t *)ptr; 123 struct srb_iocb *lio = &sp->u.iocb_cmd; 124 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 125 126 if (!test_bit(UNLOADING, &vha->dpc_flags)) 127 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, 128 lio->u.logio.data); 129 sp->free(sp->fcport->vha, sp); 130 } 131 132 int 133 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 134 uint16_t *data) 135 { 136 srb_t *sp; 137 struct srb_iocb *lio; 138 int rval; 139 140 rval = QLA_FUNCTION_FAILED; 141 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 142 if (!sp) 143 goto done; 144 145 sp->type = SRB_LOGIN_CMD; 146 sp->name = "login"; 147 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 148 149 lio = &sp->u.iocb_cmd; 150 lio->timeout = qla2x00_async_iocb_timeout; 151 sp->done = qla2x00_async_login_sp_done; 152 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 153 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 154 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 155 rval = qla2x00_start_sp(sp); 156 if (rval != QLA_SUCCESS) 157 goto done_free_sp; 158 159 ql_dbg(ql_dbg_disc, vha, 0x2072, 160 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x " 161 "retries=%d.\n", sp->handle, fcport->loop_id, 162 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 163 fcport->login_retry); 164 return rval; 165 166 done_free_sp: 167 sp->free(fcport->vha, sp); 168 done: 169 return rval; 170 } 171 172 static void 173 qla2x00_async_logout_sp_done(void *data, void *ptr, int res) 174 { 175 srb_t *sp = (srb_t *)ptr; 176 struct srb_iocb *lio = &sp->u.iocb_cmd; 177 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 178 179 if (!test_bit(UNLOADING, &vha->dpc_flags)) 180 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, 181 lio->u.logio.data); 182 sp->free(sp->fcport->vha, sp); 183 } 184 185 int 186 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 187 { 188 srb_t *sp; 189 struct srb_iocb *lio; 190 int rval; 191 192 rval = QLA_FUNCTION_FAILED; 193 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 194 if (!sp) 195 goto done; 196 197 sp->type = SRB_LOGOUT_CMD; 198 sp->name = "logout"; 199 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 200 201 lio = &sp->u.iocb_cmd; 202 lio->timeout = qla2x00_async_iocb_timeout; 203 sp->done = qla2x00_async_logout_sp_done; 204 rval = qla2x00_start_sp(sp); 205 if (rval != QLA_SUCCESS) 206 goto done_free_sp; 207 208 ql_dbg(ql_dbg_disc, vha, 0x2070, 209 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 210 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 211 fcport->d_id.b.area, fcport->d_id.b.al_pa); 212 return rval; 213 214 done_free_sp: 215 sp->free(fcport->vha, sp); 216 done: 217 return rval; 218 } 219 220 static void 221 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res) 222 { 223 srb_t *sp = (srb_t *)ptr; 224 struct srb_iocb *lio = &sp->u.iocb_cmd; 225 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 226 227 if (!test_bit(UNLOADING, &vha->dpc_flags)) 228 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, 229 lio->u.logio.data); 230 sp->free(sp->fcport->vha, sp); 231 } 232 233 int 234 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 235 uint16_t *data) 236 { 237 srb_t *sp; 238 struct srb_iocb *lio; 239 int rval; 240 241 rval = QLA_FUNCTION_FAILED; 242 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 243 if (!sp) 244 goto done; 245 246 sp->type = SRB_ADISC_CMD; 247 sp->name = "adisc"; 248 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 249 250 lio = &sp->u.iocb_cmd; 251 lio->timeout = qla2x00_async_iocb_timeout; 252 sp->done = qla2x00_async_adisc_sp_done; 253 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 254 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 255 rval = qla2x00_start_sp(sp); 256 if (rval != QLA_SUCCESS) 257 goto done_free_sp; 258 259 ql_dbg(ql_dbg_disc, vha, 0x206f, 260 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", 261 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 262 fcport->d_id.b.area, fcport->d_id.b.al_pa); 263 return rval; 264 265 done_free_sp: 266 sp->free(fcport->vha, sp); 267 done: 268 return rval; 269 } 270 271 static void 272 qla2x00_async_tm_cmd_done(void *data, void *ptr, int res) 273 { 274 srb_t *sp = (srb_t *)ptr; 275 struct srb_iocb *iocb = &sp->u.iocb_cmd; 276 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 277 uint32_t flags; 278 uint16_t lun; 279 int rval; 280 281 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 282 flags = iocb->u.tmf.flags; 283 lun = (uint16_t)iocb->u.tmf.lun; 284 285 /* Issue Marker IOCB */ 286 rval = qla2x00_marker(vha, vha->hw->req_q_map[0], 287 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 288 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 289 290 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { 291 ql_dbg(ql_dbg_taskm, vha, 0x8030, 292 "TM IOCB failed (%x).\n", rval); 293 } 294 } 295 sp->free(sp->fcport->vha, sp); 296 } 297 298 int 299 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun, 300 uint32_t tag) 301 { 302 struct scsi_qla_host *vha = fcport->vha; 303 srb_t *sp; 304 struct srb_iocb *tcf; 305 int rval; 306 307 rval = QLA_FUNCTION_FAILED; 308 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 309 if (!sp) 310 goto done; 311 312 sp->type = SRB_TM_CMD; 313 sp->name = "tmf"; 314 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 315 316 tcf = &sp->u.iocb_cmd; 317 tcf->u.tmf.flags = tm_flags; 318 tcf->u.tmf.lun = lun; 319 tcf->u.tmf.data = tag; 320 tcf->timeout = qla2x00_async_iocb_timeout; 321 sp->done = qla2x00_async_tm_cmd_done; 322 323 rval = qla2x00_start_sp(sp); 324 if (rval != QLA_SUCCESS) 325 goto done_free_sp; 326 327 ql_dbg(ql_dbg_taskm, vha, 0x802f, 328 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 329 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 330 fcport->d_id.b.area, fcport->d_id.b.al_pa); 331 return rval; 332 333 done_free_sp: 334 sp->free(fcport->vha, sp); 335 done: 336 return rval; 337 } 338 339 void 340 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, 341 uint16_t *data) 342 { 343 int rval; 344 345 switch (data[0]) { 346 case MBS_COMMAND_COMPLETE: 347 /* 348 * Driver must validate login state - If PRLI not complete, 349 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 350 * requests. 351 */ 352 rval = qla2x00_get_port_database(vha, fcport, 0); 353 if (rval == QLA_NOT_LOGGED_IN) { 354 fcport->flags &= ~FCF_ASYNC_SENT; 355 fcport->flags |= FCF_LOGIN_NEEDED; 356 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 357 break; 358 } 359 360 if (rval != QLA_SUCCESS) { 361 qla2x00_post_async_logout_work(vha, fcport, NULL); 362 qla2x00_post_async_login_work(vha, fcport, NULL); 363 break; 364 } 365 if (fcport->flags & FCF_FCP2_DEVICE) { 366 qla2x00_post_async_adisc_work(vha, fcport, data); 367 break; 368 } 369 qla2x00_update_fcport(vha, fcport); 370 break; 371 case MBS_COMMAND_ERROR: 372 fcport->flags &= ~FCF_ASYNC_SENT; 373 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 374 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 375 else 376 qla2x00_mark_device_lost(vha, fcport, 1, 0); 377 break; 378 case MBS_PORT_ID_USED: 379 fcport->loop_id = data[1]; 380 qla2x00_post_async_logout_work(vha, fcport, NULL); 381 qla2x00_post_async_login_work(vha, fcport, NULL); 382 break; 383 case MBS_LOOP_ID_USED: 384 fcport->loop_id++; 385 rval = qla2x00_find_new_loop_id(vha, fcport); 386 if (rval != QLA_SUCCESS) { 387 fcport->flags &= ~FCF_ASYNC_SENT; 388 qla2x00_mark_device_lost(vha, fcport, 1, 0); 389 break; 390 } 391 qla2x00_post_async_login_work(vha, fcport, NULL); 392 break; 393 } 394 return; 395 } 396 397 void 398 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 399 uint16_t *data) 400 { 401 qla2x00_mark_device_lost(vha, fcport, 1, 0); 402 return; 403 } 404 405 void 406 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 407 uint16_t *data) 408 { 409 if (data[0] == MBS_COMMAND_COMPLETE) { 410 qla2x00_update_fcport(vha, fcport); 411 412 return; 413 } 414 415 /* Retry login. */ 416 fcport->flags &= ~FCF_ASYNC_SENT; 417 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 418 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 419 else 420 qla2x00_mark_device_lost(vha, fcport, 1, 0); 421 422 return; 423 } 424 425 /****************************************************************************/ 426 /* QLogic ISP2x00 Hardware Support Functions. */ 427 /****************************************************************************/ 428 429 /* 430 * qla2x00_initialize_adapter 431 * Initialize board. 432 * 433 * Input: 434 * ha = adapter block pointer. 435 * 436 * Returns: 437 * 0 = success 438 */ 439 int 440 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 441 { 442 int rval; 443 struct qla_hw_data *ha = vha->hw; 444 struct req_que *req = ha->req_q_map[0]; 445 446 /* Clear adapter flags. */ 447 vha->flags.online = 0; 448 ha->flags.chip_reset_done = 0; 449 vha->flags.reset_active = 0; 450 ha->flags.pci_channel_io_perm_failure = 0; 451 ha->flags.eeh_busy = 0; 452 ha->flags.thermal_supported = 1; 453 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 454 atomic_set(&vha->loop_state, LOOP_DOWN); 455 vha->device_flags = DFLG_NO_CABLE; 456 vha->dpc_flags = 0; 457 vha->flags.management_server_logged_in = 0; 458 vha->marker_needed = 0; 459 ha->isp_abort_cnt = 0; 460 ha->beacon_blink_led = 0; 461 462 set_bit(0, ha->req_qid_map); 463 set_bit(0, ha->rsp_qid_map); 464 465 ql_dbg(ql_dbg_init, vha, 0x0040, 466 "Configuring PCI space...\n"); 467 rval = ha->isp_ops->pci_config(vha); 468 if (rval) { 469 ql_log(ql_log_warn, vha, 0x0044, 470 "Unable to configure PCI space.\n"); 471 return (rval); 472 } 473 474 ha->isp_ops->reset_chip(vha); 475 476 rval = qla2xxx_get_flash_info(vha); 477 if (rval) { 478 ql_log(ql_log_fatal, vha, 0x004f, 479 "Unable to validate FLASH data.\n"); 480 return (rval); 481 } 482 483 ha->isp_ops->get_flash_version(vha, req->ring); 484 ql_dbg(ql_dbg_init, vha, 0x0061, 485 "Configure NVRAM parameters...\n"); 486 487 ha->isp_ops->nvram_config(vha); 488 489 if (ha->flags.disable_serdes) { 490 /* Mask HBA via NVRAM settings? */ 491 ql_log(ql_log_info, vha, 0x0077, 492 "Masking HBA WWPN " 493 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", 494 vha->port_name[0], vha->port_name[1], 495 vha->port_name[2], vha->port_name[3], 496 vha->port_name[4], vha->port_name[5], 497 vha->port_name[6], vha->port_name[7]); 498 return QLA_FUNCTION_FAILED; 499 } 500 501 ql_dbg(ql_dbg_init, vha, 0x0078, 502 "Verifying loaded RISC code...\n"); 503 504 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 505 rval = ha->isp_ops->chip_diag(vha); 506 if (rval) 507 return (rval); 508 rval = qla2x00_setup_chip(vha); 509 if (rval) 510 return (rval); 511 } 512 513 if (IS_QLA84XX(ha)) { 514 ha->cs84xx = qla84xx_get_chip(vha); 515 if (!ha->cs84xx) { 516 ql_log(ql_log_warn, vha, 0x00d0, 517 "Unable to configure ISP84XX.\n"); 518 return QLA_FUNCTION_FAILED; 519 } 520 } 521 rval = qla2x00_init_rings(vha); 522 ha->flags.chip_reset_done = 1; 523 524 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 525 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 526 rval = qla84xx_init_chip(vha); 527 if (rval != QLA_SUCCESS) { 528 ql_log(ql_log_warn, vha, 0x00d4, 529 "Unable to initialize ISP84XX.\n"); 530 qla84xx_put_chip(vha); 531 } 532 } 533 534 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 535 qla24xx_read_fcp_prio_cfg(vha); 536 537 return (rval); 538 } 539 540 /** 541 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 542 * @ha: HA context 543 * 544 * Returns 0 on success. 545 */ 546 int 547 qla2100_pci_config(scsi_qla_host_t *vha) 548 { 549 uint16_t w; 550 unsigned long flags; 551 struct qla_hw_data *ha = vha->hw; 552 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 553 554 pci_set_master(ha->pdev); 555 pci_try_set_mwi(ha->pdev); 556 557 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 558 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 559 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 560 561 pci_disable_rom(ha->pdev); 562 563 /* Get PCI bus information. */ 564 spin_lock_irqsave(&ha->hardware_lock, flags); 565 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 566 spin_unlock_irqrestore(&ha->hardware_lock, flags); 567 568 return QLA_SUCCESS; 569 } 570 571 /** 572 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 573 * @ha: HA context 574 * 575 * Returns 0 on success. 576 */ 577 int 578 qla2300_pci_config(scsi_qla_host_t *vha) 579 { 580 uint16_t w; 581 unsigned long flags = 0; 582 uint32_t cnt; 583 struct qla_hw_data *ha = vha->hw; 584 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 585 586 pci_set_master(ha->pdev); 587 pci_try_set_mwi(ha->pdev); 588 589 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 590 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 591 592 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 593 w &= ~PCI_COMMAND_INTX_DISABLE; 594 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 595 596 /* 597 * If this is a 2300 card and not 2312, reset the 598 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 599 * the 2310 also reports itself as a 2300 so we need to get the 600 * fb revision level -- a 6 indicates it really is a 2300 and 601 * not a 2310. 602 */ 603 if (IS_QLA2300(ha)) { 604 spin_lock_irqsave(&ha->hardware_lock, flags); 605 606 /* Pause RISC. */ 607 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 608 for (cnt = 0; cnt < 30000; cnt++) { 609 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 610 break; 611 612 udelay(10); 613 } 614 615 /* Select FPM registers. */ 616 WRT_REG_WORD(®->ctrl_status, 0x20); 617 RD_REG_WORD(®->ctrl_status); 618 619 /* Get the fb rev level */ 620 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 621 622 if (ha->fb_rev == FPM_2300) 623 pci_clear_mwi(ha->pdev); 624 625 /* Deselect FPM registers. */ 626 WRT_REG_WORD(®->ctrl_status, 0x0); 627 RD_REG_WORD(®->ctrl_status); 628 629 /* Release RISC module. */ 630 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 631 for (cnt = 0; cnt < 30000; cnt++) { 632 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 633 break; 634 635 udelay(10); 636 } 637 638 spin_unlock_irqrestore(&ha->hardware_lock, flags); 639 } 640 641 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 642 643 pci_disable_rom(ha->pdev); 644 645 /* Get PCI bus information. */ 646 spin_lock_irqsave(&ha->hardware_lock, flags); 647 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 648 spin_unlock_irqrestore(&ha->hardware_lock, flags); 649 650 return QLA_SUCCESS; 651 } 652 653 /** 654 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 655 * @ha: HA context 656 * 657 * Returns 0 on success. 658 */ 659 int 660 qla24xx_pci_config(scsi_qla_host_t *vha) 661 { 662 uint16_t w; 663 unsigned long flags = 0; 664 struct qla_hw_data *ha = vha->hw; 665 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 666 667 pci_set_master(ha->pdev); 668 pci_try_set_mwi(ha->pdev); 669 670 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 671 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 672 w &= ~PCI_COMMAND_INTX_DISABLE; 673 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 674 675 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 676 677 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 678 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 679 pcix_set_mmrbc(ha->pdev, 2048); 680 681 /* PCIe -- adjust Maximum Read Request Size (2048). */ 682 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) 683 pcie_set_readrq(ha->pdev, 2048); 684 685 pci_disable_rom(ha->pdev); 686 687 ha->chip_revision = ha->pdev->revision; 688 689 /* Get PCI bus information. */ 690 spin_lock_irqsave(&ha->hardware_lock, flags); 691 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 692 spin_unlock_irqrestore(&ha->hardware_lock, flags); 693 694 return QLA_SUCCESS; 695 } 696 697 /** 698 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 699 * @ha: HA context 700 * 701 * Returns 0 on success. 702 */ 703 int 704 qla25xx_pci_config(scsi_qla_host_t *vha) 705 { 706 uint16_t w; 707 struct qla_hw_data *ha = vha->hw; 708 709 pci_set_master(ha->pdev); 710 pci_try_set_mwi(ha->pdev); 711 712 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 713 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 714 w &= ~PCI_COMMAND_INTX_DISABLE; 715 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 716 717 /* PCIe -- adjust Maximum Read Request Size (2048). */ 718 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) 719 pcie_set_readrq(ha->pdev, 2048); 720 721 pci_disable_rom(ha->pdev); 722 723 ha->chip_revision = ha->pdev->revision; 724 725 return QLA_SUCCESS; 726 } 727 728 /** 729 * qla2x00_isp_firmware() - Choose firmware image. 730 * @ha: HA context 731 * 732 * Returns 0 on success. 733 */ 734 static int 735 qla2x00_isp_firmware(scsi_qla_host_t *vha) 736 { 737 int rval; 738 uint16_t loop_id, topo, sw_cap; 739 uint8_t domain, area, al_pa; 740 struct qla_hw_data *ha = vha->hw; 741 742 /* Assume loading risc code */ 743 rval = QLA_FUNCTION_FAILED; 744 745 if (ha->flags.disable_risc_code_load) { 746 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 747 748 /* Verify checksum of loaded RISC code. */ 749 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 750 if (rval == QLA_SUCCESS) { 751 /* And, verify we are not in ROM code. */ 752 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 753 &area, &domain, &topo, &sw_cap); 754 } 755 } 756 757 if (rval) 758 ql_dbg(ql_dbg_init, vha, 0x007a, 759 "**** Load RISC code ****.\n"); 760 761 return (rval); 762 } 763 764 /** 765 * qla2x00_reset_chip() - Reset ISP chip. 766 * @ha: HA context 767 * 768 * Returns 0 on success. 769 */ 770 void 771 qla2x00_reset_chip(scsi_qla_host_t *vha) 772 { 773 unsigned long flags = 0; 774 struct qla_hw_data *ha = vha->hw; 775 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 776 uint32_t cnt; 777 uint16_t cmd; 778 779 if (unlikely(pci_channel_offline(ha->pdev))) 780 return; 781 782 ha->isp_ops->disable_intrs(ha); 783 784 spin_lock_irqsave(&ha->hardware_lock, flags); 785 786 /* Turn off master enable */ 787 cmd = 0; 788 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 789 cmd &= ~PCI_COMMAND_MASTER; 790 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 791 792 if (!IS_QLA2100(ha)) { 793 /* Pause RISC. */ 794 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 795 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 796 for (cnt = 0; cnt < 30000; cnt++) { 797 if ((RD_REG_WORD(®->hccr) & 798 HCCR_RISC_PAUSE) != 0) 799 break; 800 udelay(100); 801 } 802 } else { 803 RD_REG_WORD(®->hccr); /* PCI Posting. */ 804 udelay(10); 805 } 806 807 /* Select FPM registers. */ 808 WRT_REG_WORD(®->ctrl_status, 0x20); 809 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 810 811 /* FPM Soft Reset. */ 812 WRT_REG_WORD(®->fpm_diag_config, 0x100); 813 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 814 815 /* Toggle Fpm Reset. */ 816 if (!IS_QLA2200(ha)) { 817 WRT_REG_WORD(®->fpm_diag_config, 0x0); 818 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 819 } 820 821 /* Select frame buffer registers. */ 822 WRT_REG_WORD(®->ctrl_status, 0x10); 823 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 824 825 /* Reset frame buffer FIFOs. */ 826 if (IS_QLA2200(ha)) { 827 WRT_FB_CMD_REG(ha, reg, 0xa000); 828 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 829 } else { 830 WRT_FB_CMD_REG(ha, reg, 0x00fc); 831 832 /* Read back fb_cmd until zero or 3 seconds max */ 833 for (cnt = 0; cnt < 3000; cnt++) { 834 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 835 break; 836 udelay(100); 837 } 838 } 839 840 /* Select RISC module registers. */ 841 WRT_REG_WORD(®->ctrl_status, 0); 842 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 843 844 /* Reset RISC processor. */ 845 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 846 RD_REG_WORD(®->hccr); /* PCI Posting. */ 847 848 /* Release RISC processor. */ 849 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 850 RD_REG_WORD(®->hccr); /* PCI Posting. */ 851 } 852 853 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 854 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 855 856 /* Reset ISP chip. */ 857 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 858 859 /* Wait for RISC to recover from reset. */ 860 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 861 /* 862 * It is necessary to for a delay here since the card doesn't 863 * respond to PCI reads during a reset. On some architectures 864 * this will result in an MCA. 865 */ 866 udelay(20); 867 for (cnt = 30000; cnt; cnt--) { 868 if ((RD_REG_WORD(®->ctrl_status) & 869 CSR_ISP_SOFT_RESET) == 0) 870 break; 871 udelay(100); 872 } 873 } else 874 udelay(10); 875 876 /* Reset RISC processor. */ 877 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 878 879 WRT_REG_WORD(®->semaphore, 0); 880 881 /* Release RISC processor. */ 882 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 883 RD_REG_WORD(®->hccr); /* PCI Posting. */ 884 885 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 886 for (cnt = 0; cnt < 30000; cnt++) { 887 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 888 break; 889 890 udelay(100); 891 } 892 } else 893 udelay(100); 894 895 /* Turn on master enable */ 896 cmd |= PCI_COMMAND_MASTER; 897 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 898 899 /* Disable RISC pause on FPM parity error. */ 900 if (!IS_QLA2100(ha)) { 901 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 902 RD_REG_WORD(®->hccr); /* PCI Posting. */ 903 } 904 905 spin_unlock_irqrestore(&ha->hardware_lock, flags); 906 } 907 908 /** 909 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 910 * 911 * Returns 0 on success. 912 */ 913 int 914 qla81xx_reset_mpi(scsi_qla_host_t *vha) 915 { 916 uint16_t mb[4] = {0x1010, 0, 1, 0}; 917 918 if (!IS_QLA81XX(vha->hw)) 919 return QLA_SUCCESS; 920 921 return qla81xx_write_mpi_register(vha, mb); 922 } 923 924 /** 925 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 926 * @ha: HA context 927 * 928 * Returns 0 on success. 929 */ 930 static inline void 931 qla24xx_reset_risc(scsi_qla_host_t *vha) 932 { 933 unsigned long flags = 0; 934 struct qla_hw_data *ha = vha->hw; 935 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 936 uint32_t cnt, d2; 937 uint16_t wd; 938 static int abts_cnt; /* ISP abort retry counts */ 939 940 spin_lock_irqsave(&ha->hardware_lock, flags); 941 942 /* Reset RISC. */ 943 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 944 for (cnt = 0; cnt < 30000; cnt++) { 945 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 946 break; 947 948 udelay(10); 949 } 950 951 WRT_REG_DWORD(®->ctrl_status, 952 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 953 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 954 955 udelay(100); 956 /* Wait for firmware to complete NVRAM accesses. */ 957 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 958 for (cnt = 10000 ; cnt && d2; cnt--) { 959 udelay(5); 960 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 961 barrier(); 962 } 963 964 /* Wait for soft-reset to complete. */ 965 d2 = RD_REG_DWORD(®->ctrl_status); 966 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { 967 udelay(5); 968 d2 = RD_REG_DWORD(®->ctrl_status); 969 barrier(); 970 } 971 972 /* If required, do an MPI FW reset now */ 973 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 974 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 975 if (++abts_cnt < 5) { 976 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 977 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 978 } else { 979 /* 980 * We exhausted the ISP abort retries. We have to 981 * set the board offline. 982 */ 983 abts_cnt = 0; 984 vha->flags.online = 0; 985 } 986 } 987 } 988 989 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 990 RD_REG_DWORD(®->hccr); 991 992 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 993 RD_REG_DWORD(®->hccr); 994 995 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 996 RD_REG_DWORD(®->hccr); 997 998 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 999 for (cnt = 6000000 ; cnt && d2; cnt--) { 1000 udelay(5); 1001 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1002 barrier(); 1003 } 1004 1005 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1006 1007 if (IS_NOPOLLING_TYPE(ha)) 1008 ha->isp_ops->enable_intrs(ha); 1009 } 1010 1011 /** 1012 * qla24xx_reset_chip() - Reset ISP24xx chip. 1013 * @ha: HA context 1014 * 1015 * Returns 0 on success. 1016 */ 1017 void 1018 qla24xx_reset_chip(scsi_qla_host_t *vha) 1019 { 1020 struct qla_hw_data *ha = vha->hw; 1021 1022 if (pci_channel_offline(ha->pdev) && 1023 ha->flags.pci_channel_io_perm_failure) { 1024 return; 1025 } 1026 1027 ha->isp_ops->disable_intrs(ha); 1028 1029 /* Perform RISC reset. */ 1030 qla24xx_reset_risc(vha); 1031 } 1032 1033 /** 1034 * qla2x00_chip_diag() - Test chip for proper operation. 1035 * @ha: HA context 1036 * 1037 * Returns 0 on success. 1038 */ 1039 int 1040 qla2x00_chip_diag(scsi_qla_host_t *vha) 1041 { 1042 int rval; 1043 struct qla_hw_data *ha = vha->hw; 1044 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1045 unsigned long flags = 0; 1046 uint16_t data; 1047 uint32_t cnt; 1048 uint16_t mb[5]; 1049 struct req_que *req = ha->req_q_map[0]; 1050 1051 /* Assume a failed state */ 1052 rval = QLA_FUNCTION_FAILED; 1053 1054 ql_dbg(ql_dbg_init, vha, 0x007b, 1055 "Testing device at %lx.\n", (u_long)®->flash_address); 1056 1057 spin_lock_irqsave(&ha->hardware_lock, flags); 1058 1059 /* Reset ISP chip. */ 1060 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1061 1062 /* 1063 * We need to have a delay here since the card will not respond while 1064 * in reset causing an MCA on some architectures. 1065 */ 1066 udelay(20); 1067 data = qla2x00_debounce_register(®->ctrl_status); 1068 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 1069 udelay(5); 1070 data = RD_REG_WORD(®->ctrl_status); 1071 barrier(); 1072 } 1073 1074 if (!cnt) 1075 goto chip_diag_failed; 1076 1077 ql_dbg(ql_dbg_init, vha, 0x007c, 1078 "Reset register cleared by chip reset.\n"); 1079 1080 /* Reset RISC processor. */ 1081 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1082 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1083 1084 /* Workaround for QLA2312 PCI parity error */ 1085 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1086 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 1087 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 1088 udelay(5); 1089 data = RD_MAILBOX_REG(ha, reg, 0); 1090 barrier(); 1091 } 1092 } else 1093 udelay(10); 1094 1095 if (!cnt) 1096 goto chip_diag_failed; 1097 1098 /* Check product ID of chip */ 1099 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); 1100 1101 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 1102 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 1103 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 1104 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 1105 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 1106 mb[3] != PROD_ID_3) { 1107 ql_log(ql_log_warn, vha, 0x0062, 1108 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 1109 mb[1], mb[2], mb[3]); 1110 1111 goto chip_diag_failed; 1112 } 1113 ha->product_id[0] = mb[1]; 1114 ha->product_id[1] = mb[2]; 1115 ha->product_id[2] = mb[3]; 1116 ha->product_id[3] = mb[4]; 1117 1118 /* Adjust fw RISC transfer size */ 1119 if (req->length > 1024) 1120 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 1121 else 1122 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1123 req->length; 1124 1125 if (IS_QLA2200(ha) && 1126 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 1127 /* Limit firmware transfer size with a 2200A */ 1128 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 1129 1130 ha->device_type |= DT_ISP2200A; 1131 ha->fw_transfer_size = 128; 1132 } 1133 1134 /* Wrap Incoming Mailboxes Test. */ 1135 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1136 1137 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 1138 rval = qla2x00_mbx_reg_test(vha); 1139 if (rval) 1140 ql_log(ql_log_warn, vha, 0x0080, 1141 "Failed mailbox send register test.\n"); 1142 else 1143 /* Flag a successful rval */ 1144 rval = QLA_SUCCESS; 1145 spin_lock_irqsave(&ha->hardware_lock, flags); 1146 1147 chip_diag_failed: 1148 if (rval) 1149 ql_log(ql_log_info, vha, 0x0081, 1150 "Chip diagnostics **** FAILED ****.\n"); 1151 1152 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1153 1154 return (rval); 1155 } 1156 1157 /** 1158 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 1159 * @ha: HA context 1160 * 1161 * Returns 0 on success. 1162 */ 1163 int 1164 qla24xx_chip_diag(scsi_qla_host_t *vha) 1165 { 1166 int rval; 1167 struct qla_hw_data *ha = vha->hw; 1168 struct req_que *req = ha->req_q_map[0]; 1169 1170 if (IS_QLA82XX(ha)) 1171 return QLA_SUCCESS; 1172 1173 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 1174 1175 rval = qla2x00_mbx_reg_test(vha); 1176 if (rval) { 1177 ql_log(ql_log_warn, vha, 0x0082, 1178 "Failed mailbox send register test.\n"); 1179 } else { 1180 /* Flag a successful rval */ 1181 rval = QLA_SUCCESS; 1182 } 1183 1184 return rval; 1185 } 1186 1187 void 1188 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 1189 { 1190 int rval; 1191 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 1192 eft_size, fce_size, mq_size; 1193 dma_addr_t tc_dma; 1194 void *tc; 1195 struct qla_hw_data *ha = vha->hw; 1196 struct req_que *req = ha->req_q_map[0]; 1197 struct rsp_que *rsp = ha->rsp_q_map[0]; 1198 1199 if (ha->fw_dump) { 1200 ql_dbg(ql_dbg_init, vha, 0x00bd, 1201 "Firmware dump already allocated.\n"); 1202 return; 1203 } 1204 1205 ha->fw_dumped = 0; 1206 fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 1207 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 1208 fixed_size = sizeof(struct qla2100_fw_dump); 1209 } else if (IS_QLA23XX(ha)) { 1210 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 1211 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 1212 sizeof(uint16_t); 1213 } else if (IS_FWI2_CAPABLE(ha)) { 1214 if (IS_QLA83XX(ha)) 1215 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 1216 else if (IS_QLA81XX(ha)) 1217 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 1218 else if (IS_QLA25XX(ha)) 1219 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 1220 else 1221 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 1222 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 1223 sizeof(uint32_t); 1224 if (ha->mqenable) { 1225 if (!IS_QLA83XX(ha)) 1226 mq_size = sizeof(struct qla2xxx_mq_chain); 1227 /* 1228 * Allocate maximum buffer size for all queues. 1229 * Resizing must be done at end-of-dump processing. 1230 */ 1231 mq_size += ha->max_req_queues * 1232 (req->length * sizeof(request_t)); 1233 mq_size += ha->max_rsp_queues * 1234 (rsp->length * sizeof(response_t)); 1235 } 1236 /* Allocate memory for Fibre Channel Event Buffer. */ 1237 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha)) 1238 goto try_eft; 1239 1240 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 1241 GFP_KERNEL); 1242 if (!tc) { 1243 ql_log(ql_log_warn, vha, 0x00be, 1244 "Unable to allocate (%d KB) for FCE.\n", 1245 FCE_SIZE / 1024); 1246 goto try_eft; 1247 } 1248 1249 memset(tc, 0, FCE_SIZE); 1250 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 1251 ha->fce_mb, &ha->fce_bufs); 1252 if (rval) { 1253 ql_log(ql_log_warn, vha, 0x00bf, 1254 "Unable to initialize FCE (%d).\n", rval); 1255 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 1256 tc_dma); 1257 ha->flags.fce_enabled = 0; 1258 goto try_eft; 1259 } 1260 ql_dbg(ql_dbg_init, vha, 0x00c0, 1261 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 1262 1263 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 1264 ha->flags.fce_enabled = 1; 1265 ha->fce_dma = tc_dma; 1266 ha->fce = tc; 1267 try_eft: 1268 /* Allocate memory for Extended Trace Buffer. */ 1269 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 1270 GFP_KERNEL); 1271 if (!tc) { 1272 ql_log(ql_log_warn, vha, 0x00c1, 1273 "Unable to allocate (%d KB) for EFT.\n", 1274 EFT_SIZE / 1024); 1275 goto cont_alloc; 1276 } 1277 1278 memset(tc, 0, EFT_SIZE); 1279 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 1280 if (rval) { 1281 ql_log(ql_log_warn, vha, 0x00c2, 1282 "Unable to initialize EFT (%d).\n", rval); 1283 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 1284 tc_dma); 1285 goto cont_alloc; 1286 } 1287 ql_dbg(ql_dbg_init, vha, 0x00c3, 1288 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 1289 1290 eft_size = EFT_SIZE; 1291 ha->eft_dma = tc_dma; 1292 ha->eft = tc; 1293 } 1294 cont_alloc: 1295 req_q_size = req->length * sizeof(request_t); 1296 rsp_q_size = rsp->length * sizeof(response_t); 1297 1298 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 1299 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 1300 ha->chain_offset = dump_size; 1301 dump_size += mq_size + fce_size; 1302 1303 ha->fw_dump = vmalloc(dump_size); 1304 if (!ha->fw_dump) { 1305 ql_log(ql_log_warn, vha, 0x00c4, 1306 "Unable to allocate (%d KB) for firmware dump.\n", 1307 dump_size / 1024); 1308 1309 if (ha->fce) { 1310 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 1311 ha->fce_dma); 1312 ha->fce = NULL; 1313 ha->fce_dma = 0; 1314 } 1315 1316 if (ha->eft) { 1317 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, 1318 ha->eft_dma); 1319 ha->eft = NULL; 1320 ha->eft_dma = 0; 1321 } 1322 return; 1323 } 1324 ql_dbg(ql_dbg_init, vha, 0x00c5, 1325 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); 1326 1327 ha->fw_dump_len = dump_size; 1328 ha->fw_dump->signature[0] = 'Q'; 1329 ha->fw_dump->signature[1] = 'L'; 1330 ha->fw_dump->signature[2] = 'G'; 1331 ha->fw_dump->signature[3] = 'C'; 1332 ha->fw_dump->version = __constant_htonl(1); 1333 1334 ha->fw_dump->fixed_size = htonl(fixed_size); 1335 ha->fw_dump->mem_size = htonl(mem_size); 1336 ha->fw_dump->req_q_size = htonl(req_q_size); 1337 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 1338 1339 ha->fw_dump->eft_size = htonl(eft_size); 1340 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 1341 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 1342 1343 ha->fw_dump->header_size = 1344 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 1345 } 1346 1347 static int 1348 qla81xx_mpi_sync(scsi_qla_host_t *vha) 1349 { 1350 #define MPS_MASK 0xe0 1351 int rval; 1352 uint16_t dc; 1353 uint32_t dw; 1354 1355 if (!IS_QLA81XX(vha->hw)) 1356 return QLA_SUCCESS; 1357 1358 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 1359 if (rval != QLA_SUCCESS) { 1360 ql_log(ql_log_warn, vha, 0x0105, 1361 "Unable to acquire semaphore.\n"); 1362 goto done; 1363 } 1364 1365 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 1366 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 1367 if (rval != QLA_SUCCESS) { 1368 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 1369 goto done_release; 1370 } 1371 1372 dc &= MPS_MASK; 1373 if (dc == (dw & MPS_MASK)) 1374 goto done_release; 1375 1376 dw &= ~MPS_MASK; 1377 dw |= dc; 1378 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 1379 if (rval != QLA_SUCCESS) { 1380 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 1381 } 1382 1383 done_release: 1384 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 1385 if (rval != QLA_SUCCESS) { 1386 ql_log(ql_log_warn, vha, 0x006d, 1387 "Unable to release semaphore.\n"); 1388 } 1389 1390 done: 1391 return rval; 1392 } 1393 1394 /** 1395 * qla2x00_setup_chip() - Load and start RISC firmware. 1396 * @ha: HA context 1397 * 1398 * Returns 0 on success. 1399 */ 1400 static int 1401 qla2x00_setup_chip(scsi_qla_host_t *vha) 1402 { 1403 int rval; 1404 uint32_t srisc_address = 0; 1405 struct qla_hw_data *ha = vha->hw; 1406 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1407 unsigned long flags; 1408 uint16_t fw_major_version; 1409 1410 if (IS_QLA82XX(ha)) { 1411 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1412 if (rval == QLA_SUCCESS) { 1413 qla2x00_stop_firmware(vha); 1414 goto enable_82xx_npiv; 1415 } else 1416 goto failed; 1417 } 1418 1419 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1420 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 1421 spin_lock_irqsave(&ha->hardware_lock, flags); 1422 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 1423 RD_REG_WORD(®->hccr); 1424 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1425 } 1426 1427 qla81xx_mpi_sync(vha); 1428 1429 /* Load firmware sequences */ 1430 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1431 if (rval == QLA_SUCCESS) { 1432 ql_dbg(ql_dbg_init, vha, 0x00c9, 1433 "Verifying Checksum of loaded RISC code.\n"); 1434 1435 rval = qla2x00_verify_checksum(vha, srisc_address); 1436 if (rval == QLA_SUCCESS) { 1437 /* Start firmware execution. */ 1438 ql_dbg(ql_dbg_init, vha, 0x00ca, 1439 "Starting firmware.\n"); 1440 1441 rval = qla2x00_execute_fw(vha, srisc_address); 1442 /* Retrieve firmware information. */ 1443 if (rval == QLA_SUCCESS) { 1444 enable_82xx_npiv: 1445 fw_major_version = ha->fw_major_version; 1446 if (IS_QLA82XX(ha)) 1447 qla82xx_check_md_needed(vha); 1448 else 1449 rval = qla2x00_get_fw_version(vha); 1450 if (rval != QLA_SUCCESS) 1451 goto failed; 1452 ha->flags.npiv_supported = 0; 1453 if (IS_QLA2XXX_MIDTYPE(ha) && 1454 (ha->fw_attributes & BIT_2)) { 1455 ha->flags.npiv_supported = 1; 1456 if ((!ha->max_npiv_vports) || 1457 ((ha->max_npiv_vports + 1) % 1458 MIN_MULTI_ID_FABRIC)) 1459 ha->max_npiv_vports = 1460 MIN_MULTI_ID_FABRIC - 1; 1461 } 1462 qla2x00_get_resource_cnts(vha, NULL, 1463 &ha->fw_xcb_count, NULL, NULL, 1464 &ha->max_npiv_vports, NULL); 1465 1466 if (!fw_major_version && ql2xallocfwdump 1467 && !IS_QLA82XX(ha)) 1468 qla2x00_alloc_fw_dump(vha); 1469 } 1470 } else { 1471 ql_log(ql_log_fatal, vha, 0x00cd, 1472 "ISP Firmware failed checksum.\n"); 1473 goto failed; 1474 } 1475 } 1476 1477 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1478 /* Enable proper parity. */ 1479 spin_lock_irqsave(&ha->hardware_lock, flags); 1480 if (IS_QLA2300(ha)) 1481 /* SRAM parity */ 1482 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 1483 else 1484 /* SRAM, Instruction RAM and GP RAM parity */ 1485 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 1486 RD_REG_WORD(®->hccr); 1487 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1488 } 1489 1490 if (IS_QLA83XX(ha)) 1491 goto skip_fac_check; 1492 1493 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 1494 uint32_t size; 1495 1496 rval = qla81xx_fac_get_sector_size(vha, &size); 1497 if (rval == QLA_SUCCESS) { 1498 ha->flags.fac_supported = 1; 1499 ha->fdt_block_size = size << 2; 1500 } else { 1501 ql_log(ql_log_warn, vha, 0x00ce, 1502 "Unsupported FAC firmware (%d.%02d.%02d).\n", 1503 ha->fw_major_version, ha->fw_minor_version, 1504 ha->fw_subminor_version); 1505 skip_fac_check: 1506 if (IS_QLA83XX(ha)) { 1507 ha->flags.fac_supported = 0; 1508 rval = QLA_SUCCESS; 1509 } 1510 } 1511 } 1512 failed: 1513 if (rval) { 1514 ql_log(ql_log_fatal, vha, 0x00cf, 1515 "Setup chip ****FAILED****.\n"); 1516 } 1517 1518 return (rval); 1519 } 1520 1521 /** 1522 * qla2x00_init_response_q_entries() - Initializes response queue entries. 1523 * @ha: HA context 1524 * 1525 * Beginning of request ring has initialization control block already built 1526 * by nvram config routine. 1527 * 1528 * Returns 0 on success. 1529 */ 1530 void 1531 qla2x00_init_response_q_entries(struct rsp_que *rsp) 1532 { 1533 uint16_t cnt; 1534 response_t *pkt; 1535 1536 rsp->ring_ptr = rsp->ring; 1537 rsp->ring_index = 0; 1538 rsp->status_srb = NULL; 1539 pkt = rsp->ring_ptr; 1540 for (cnt = 0; cnt < rsp->length; cnt++) { 1541 pkt->signature = RESPONSE_PROCESSED; 1542 pkt++; 1543 } 1544 } 1545 1546 /** 1547 * qla2x00_update_fw_options() - Read and process firmware options. 1548 * @ha: HA context 1549 * 1550 * Returns 0 on success. 1551 */ 1552 void 1553 qla2x00_update_fw_options(scsi_qla_host_t *vha) 1554 { 1555 uint16_t swing, emphasis, tx_sens, rx_sens; 1556 struct qla_hw_data *ha = vha->hw; 1557 1558 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 1559 qla2x00_get_fw_options(vha, ha->fw_options); 1560 1561 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 1562 return; 1563 1564 /* Serial Link options. */ 1565 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 1566 "Serial link options.\n"); 1567 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 1568 (uint8_t *)&ha->fw_seriallink_options, 1569 sizeof(ha->fw_seriallink_options)); 1570 1571 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 1572 if (ha->fw_seriallink_options[3] & BIT_2) { 1573 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 1574 1575 /* 1G settings */ 1576 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 1577 emphasis = (ha->fw_seriallink_options[2] & 1578 (BIT_4 | BIT_3)) >> 3; 1579 tx_sens = ha->fw_seriallink_options[0] & 1580 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1581 rx_sens = (ha->fw_seriallink_options[0] & 1582 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1583 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 1584 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 1585 if (rx_sens == 0x0) 1586 rx_sens = 0x3; 1587 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 1588 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 1589 ha->fw_options[10] |= BIT_5 | 1590 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 1591 (tx_sens & (BIT_1 | BIT_0)); 1592 1593 /* 2G settings */ 1594 swing = (ha->fw_seriallink_options[2] & 1595 (BIT_7 | BIT_6 | BIT_5)) >> 5; 1596 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 1597 tx_sens = ha->fw_seriallink_options[1] & 1598 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1599 rx_sens = (ha->fw_seriallink_options[1] & 1600 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1601 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 1602 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 1603 if (rx_sens == 0x0) 1604 rx_sens = 0x3; 1605 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 1606 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 1607 ha->fw_options[11] |= BIT_5 | 1608 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 1609 (tx_sens & (BIT_1 | BIT_0)); 1610 } 1611 1612 /* FCP2 options. */ 1613 /* Return command IOCBs without waiting for an ABTS to complete. */ 1614 ha->fw_options[3] |= BIT_13; 1615 1616 /* LED scheme. */ 1617 if (ha->flags.enable_led_scheme) 1618 ha->fw_options[2] |= BIT_12; 1619 1620 /* Detect ISP6312. */ 1621 if (IS_QLA6312(ha)) 1622 ha->fw_options[2] |= BIT_13; 1623 1624 /* Update firmware options. */ 1625 qla2x00_set_fw_options(vha, ha->fw_options); 1626 } 1627 1628 void 1629 qla24xx_update_fw_options(scsi_qla_host_t *vha) 1630 { 1631 int rval; 1632 struct qla_hw_data *ha = vha->hw; 1633 1634 if (IS_QLA82XX(ha)) 1635 return; 1636 1637 /* Update Serial Link options. */ 1638 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 1639 return; 1640 1641 rval = qla2x00_set_serdes_params(vha, 1642 le16_to_cpu(ha->fw_seriallink_options24[1]), 1643 le16_to_cpu(ha->fw_seriallink_options24[2]), 1644 le16_to_cpu(ha->fw_seriallink_options24[3])); 1645 if (rval != QLA_SUCCESS) { 1646 ql_log(ql_log_warn, vha, 0x0104, 1647 "Unable to update Serial Link options (%x).\n", rval); 1648 } 1649 } 1650 1651 void 1652 qla2x00_config_rings(struct scsi_qla_host *vha) 1653 { 1654 struct qla_hw_data *ha = vha->hw; 1655 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1656 struct req_que *req = ha->req_q_map[0]; 1657 struct rsp_que *rsp = ha->rsp_q_map[0]; 1658 1659 /* Setup ring parameters in initialization control block. */ 1660 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); 1661 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); 1662 ha->init_cb->request_q_length = cpu_to_le16(req->length); 1663 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 1664 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 1665 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 1666 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 1667 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 1668 1669 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 1670 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 1671 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 1672 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 1673 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 1674 } 1675 1676 void 1677 qla24xx_config_rings(struct scsi_qla_host *vha) 1678 { 1679 struct qla_hw_data *ha = vha->hw; 1680 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); 1681 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 1682 struct qla_msix_entry *msix; 1683 struct init_cb_24xx *icb; 1684 uint16_t rid = 0; 1685 struct req_que *req = ha->req_q_map[0]; 1686 struct rsp_que *rsp = ha->rsp_q_map[0]; 1687 1688 /* Setup ring parameters in initialization control block. */ 1689 icb = (struct init_cb_24xx *)ha->init_cb; 1690 icb->request_q_outpointer = __constant_cpu_to_le16(0); 1691 icb->response_q_inpointer = __constant_cpu_to_le16(0); 1692 icb->request_q_length = cpu_to_le16(req->length); 1693 icb->response_q_length = cpu_to_le16(rsp->length); 1694 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 1695 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 1696 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 1697 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 1698 1699 if (ha->mqenable || IS_QLA83XX(ha)) { 1700 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); 1701 icb->rid = __constant_cpu_to_le16(rid); 1702 if (ha->flags.msix_enabled) { 1703 msix = &ha->msix_entries[1]; 1704 ql_dbg(ql_dbg_init, vha, 0x00fd, 1705 "Registering vector 0x%x for base que.\n", 1706 msix->entry); 1707 icb->msix = cpu_to_le16(msix->entry); 1708 } 1709 /* Use alternate PCI bus number */ 1710 if (MSB(rid)) 1711 icb->firmware_options_2 |= 1712 __constant_cpu_to_le32(BIT_19); 1713 /* Use alternate PCI devfn */ 1714 if (LSB(rid)) 1715 icb->firmware_options_2 |= 1716 __constant_cpu_to_le32(BIT_18); 1717 1718 /* Use Disable MSIX Handshake mode for capable adapters */ 1719 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 1720 (ha->flags.msix_enabled)) { 1721 icb->firmware_options_2 &= 1722 __constant_cpu_to_le32(~BIT_22); 1723 ha->flags.disable_msix_handshake = 1; 1724 ql_dbg(ql_dbg_init, vha, 0x00fe, 1725 "MSIX Handshake Disable Mode turned on.\n"); 1726 } else { 1727 icb->firmware_options_2 |= 1728 __constant_cpu_to_le32(BIT_22); 1729 } 1730 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); 1731 1732 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 1733 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 1734 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 1735 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 1736 } else { 1737 WRT_REG_DWORD(®->isp24.req_q_in, 0); 1738 WRT_REG_DWORD(®->isp24.req_q_out, 0); 1739 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 1740 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 1741 } 1742 /* PCI posting */ 1743 RD_REG_DWORD(&ioreg->hccr); 1744 } 1745 1746 /** 1747 * qla2x00_init_rings() - Initializes firmware. 1748 * @ha: HA context 1749 * 1750 * Beginning of request ring has initialization control block already built 1751 * by nvram config routine. 1752 * 1753 * Returns 0 on success. 1754 */ 1755 static int 1756 qla2x00_init_rings(scsi_qla_host_t *vha) 1757 { 1758 int rval; 1759 unsigned long flags = 0; 1760 int cnt, que; 1761 struct qla_hw_data *ha = vha->hw; 1762 struct req_que *req; 1763 struct rsp_que *rsp; 1764 struct mid_init_cb_24xx *mid_init_cb = 1765 (struct mid_init_cb_24xx *) ha->init_cb; 1766 1767 spin_lock_irqsave(&ha->hardware_lock, flags); 1768 1769 /* Clear outstanding commands array. */ 1770 for (que = 0; que < ha->max_req_queues; que++) { 1771 req = ha->req_q_map[que]; 1772 if (!req) 1773 continue; 1774 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) 1775 req->outstanding_cmds[cnt] = NULL; 1776 1777 req->current_outstanding_cmd = 1; 1778 1779 /* Initialize firmware. */ 1780 req->ring_ptr = req->ring; 1781 req->ring_index = 0; 1782 req->cnt = req->length; 1783 } 1784 1785 for (que = 0; que < ha->max_rsp_queues; que++) { 1786 rsp = ha->rsp_q_map[que]; 1787 if (!rsp) 1788 continue; 1789 /* Initialize response queue entries */ 1790 qla2x00_init_response_q_entries(rsp); 1791 } 1792 1793 spin_lock(&ha->vport_slock); 1794 1795 spin_unlock(&ha->vport_slock); 1796 1797 ha->isp_ops->config_rings(vha); 1798 1799 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1800 1801 /* Update any ISP specific firmware options before initialization. */ 1802 ha->isp_ops->update_fw_options(vha); 1803 1804 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 1805 1806 if (ha->flags.npiv_supported) { 1807 if (ha->operating_mode == LOOP) 1808 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 1809 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 1810 } 1811 1812 if (IS_FWI2_CAPABLE(ha)) { 1813 mid_init_cb->options = __constant_cpu_to_le16(BIT_1); 1814 mid_init_cb->init_cb.execution_throttle = 1815 cpu_to_le16(ha->fw_xcb_count); 1816 } 1817 1818 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 1819 if (rval) { 1820 ql_log(ql_log_fatal, vha, 0x00d2, 1821 "Init Firmware **** FAILED ****.\n"); 1822 } else { 1823 ql_dbg(ql_dbg_init, vha, 0x00d3, 1824 "Init Firmware -- success.\n"); 1825 } 1826 1827 return (rval); 1828 } 1829 1830 /** 1831 * qla2x00_fw_ready() - Waits for firmware ready. 1832 * @ha: HA context 1833 * 1834 * Returns 0 on success. 1835 */ 1836 static int 1837 qla2x00_fw_ready(scsi_qla_host_t *vha) 1838 { 1839 int rval; 1840 unsigned long wtime, mtime, cs84xx_time; 1841 uint16_t min_wait; /* Minimum wait time if loop is down */ 1842 uint16_t wait_time; /* Wait time if loop is coming ready */ 1843 uint16_t state[5]; 1844 struct qla_hw_data *ha = vha->hw; 1845 1846 rval = QLA_SUCCESS; 1847 1848 /* 20 seconds for loop down. */ 1849 min_wait = 20; 1850 1851 /* 1852 * Firmware should take at most one RATOV to login, plus 5 seconds for 1853 * our own processing. 1854 */ 1855 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 1856 wait_time = min_wait; 1857 } 1858 1859 /* Min wait time if loop down */ 1860 mtime = jiffies + (min_wait * HZ); 1861 1862 /* wait time before firmware ready */ 1863 wtime = jiffies + (wait_time * HZ); 1864 1865 /* Wait for ISP to finish LIP */ 1866 if (!vha->flags.init_done) 1867 ql_log(ql_log_info, vha, 0x801e, 1868 "Waiting for LIP to complete.\n"); 1869 1870 do { 1871 rval = qla2x00_get_firmware_state(vha, state); 1872 if (rval == QLA_SUCCESS) { 1873 if (state[0] < FSTATE_LOSS_OF_SYNC) { 1874 vha->device_flags &= ~DFLG_NO_CABLE; 1875 } 1876 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 1877 ql_dbg(ql_dbg_taskm, vha, 0x801f, 1878 "fw_state=%x 84xx=%x.\n", state[0], 1879 state[2]); 1880 if ((state[2] & FSTATE_LOGGED_IN) && 1881 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 1882 ql_dbg(ql_dbg_taskm, vha, 0x8028, 1883 "Sending verify iocb.\n"); 1884 1885 cs84xx_time = jiffies; 1886 rval = qla84xx_init_chip(vha); 1887 if (rval != QLA_SUCCESS) { 1888 ql_log(ql_log_warn, 1889 vha, 0x8007, 1890 "Init chip failed.\n"); 1891 break; 1892 } 1893 1894 /* Add time taken to initialize. */ 1895 cs84xx_time = jiffies - cs84xx_time; 1896 wtime += cs84xx_time; 1897 mtime += cs84xx_time; 1898 ql_dbg(ql_dbg_taskm, vha, 0x8008, 1899 "Increasing wait time by %ld. " 1900 "New time %ld.\n", cs84xx_time, 1901 wtime); 1902 } 1903 } else if (state[0] == FSTATE_READY) { 1904 ql_dbg(ql_dbg_taskm, vha, 0x8037, 1905 "F/W Ready - OK.\n"); 1906 1907 qla2x00_get_retry_cnt(vha, &ha->retry_count, 1908 &ha->login_timeout, &ha->r_a_tov); 1909 1910 rval = QLA_SUCCESS; 1911 break; 1912 } 1913 1914 rval = QLA_FUNCTION_FAILED; 1915 1916 if (atomic_read(&vha->loop_down_timer) && 1917 state[0] != FSTATE_READY) { 1918 /* Loop down. Timeout on min_wait for states 1919 * other than Wait for Login. 1920 */ 1921 if (time_after_eq(jiffies, mtime)) { 1922 ql_log(ql_log_info, vha, 0x8038, 1923 "Cable is unplugged...\n"); 1924 1925 vha->device_flags |= DFLG_NO_CABLE; 1926 break; 1927 } 1928 } 1929 } else { 1930 /* Mailbox cmd failed. Timeout on min_wait. */ 1931 if (time_after_eq(jiffies, mtime) || 1932 ha->flags.isp82xx_fw_hung) 1933 break; 1934 } 1935 1936 if (time_after_eq(jiffies, wtime)) 1937 break; 1938 1939 /* Delay for a while */ 1940 msleep(500); 1941 } while (1); 1942 1943 ql_dbg(ql_dbg_taskm, vha, 0x803a, 1944 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0], 1945 state[1], state[2], state[3], state[4], jiffies); 1946 1947 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 1948 ql_log(ql_log_warn, vha, 0x803b, 1949 "Firmware ready **** FAILED ****.\n"); 1950 } 1951 1952 return (rval); 1953 } 1954 1955 /* 1956 * qla2x00_configure_hba 1957 * Setup adapter context. 1958 * 1959 * Input: 1960 * ha = adapter state pointer. 1961 * 1962 * Returns: 1963 * 0 = success 1964 * 1965 * Context: 1966 * Kernel context. 1967 */ 1968 static int 1969 qla2x00_configure_hba(scsi_qla_host_t *vha) 1970 { 1971 int rval; 1972 uint16_t loop_id; 1973 uint16_t topo; 1974 uint16_t sw_cap; 1975 uint8_t al_pa; 1976 uint8_t area; 1977 uint8_t domain; 1978 char connect_type[22]; 1979 struct qla_hw_data *ha = vha->hw; 1980 1981 /* Get host addresses. */ 1982 rval = qla2x00_get_adapter_id(vha, 1983 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 1984 if (rval != QLA_SUCCESS) { 1985 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 1986 IS_CNA_CAPABLE(ha) || 1987 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 1988 ql_dbg(ql_dbg_disc, vha, 0x2008, 1989 "Loop is in a transition state.\n"); 1990 } else { 1991 ql_log(ql_log_warn, vha, 0x2009, 1992 "Unable to get host loop ID.\n"); 1993 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1994 } 1995 return (rval); 1996 } 1997 1998 if (topo == 4) { 1999 ql_log(ql_log_info, vha, 0x200a, 2000 "Cannot get topology - retrying.\n"); 2001 return (QLA_FUNCTION_FAILED); 2002 } 2003 2004 vha->loop_id = loop_id; 2005 2006 /* initialize */ 2007 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 2008 ha->operating_mode = LOOP; 2009 ha->switch_cap = 0; 2010 2011 switch (topo) { 2012 case 0: 2013 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 2014 ha->current_topology = ISP_CFG_NL; 2015 strcpy(connect_type, "(Loop)"); 2016 break; 2017 2018 case 1: 2019 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 2020 ha->switch_cap = sw_cap; 2021 ha->current_topology = ISP_CFG_FL; 2022 strcpy(connect_type, "(FL_Port)"); 2023 break; 2024 2025 case 2: 2026 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 2027 ha->operating_mode = P2P; 2028 ha->current_topology = ISP_CFG_N; 2029 strcpy(connect_type, "(N_Port-to-N_Port)"); 2030 break; 2031 2032 case 3: 2033 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 2034 ha->switch_cap = sw_cap; 2035 ha->operating_mode = P2P; 2036 ha->current_topology = ISP_CFG_F; 2037 strcpy(connect_type, "(F_Port)"); 2038 break; 2039 2040 default: 2041 ql_dbg(ql_dbg_disc, vha, 0x200f, 2042 "HBA in unknown topology %x, using NL.\n", topo); 2043 ha->current_topology = ISP_CFG_NL; 2044 strcpy(connect_type, "(Loop)"); 2045 break; 2046 } 2047 2048 /* Save Host port and loop ID. */ 2049 /* byte order - Big Endian */ 2050 vha->d_id.b.domain = domain; 2051 vha->d_id.b.area = area; 2052 vha->d_id.b.al_pa = al_pa; 2053 2054 if (!vha->flags.init_done) 2055 ql_log(ql_log_info, vha, 0x2010, 2056 "Topology - %s, Host Loop address 0x%x.\n", 2057 connect_type, vha->loop_id); 2058 2059 if (rval) { 2060 ql_log(ql_log_warn, vha, 0x2011, 2061 "%s FAILED\n", __func__); 2062 } else { 2063 ql_dbg(ql_dbg_disc, vha, 0x2012, 2064 "%s success\n", __func__); 2065 } 2066 2067 return(rval); 2068 } 2069 2070 inline void 2071 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 2072 char *def) 2073 { 2074 char *st, *en; 2075 uint16_t index; 2076 struct qla_hw_data *ha = vha->hw; 2077 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 2078 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 2079 2080 if (memcmp(model, BINZERO, len) != 0) { 2081 strncpy(ha->model_number, model, len); 2082 st = en = ha->model_number; 2083 en += len - 1; 2084 while (en > st) { 2085 if (*en != 0x20 && *en != 0x00) 2086 break; 2087 *en-- = '\0'; 2088 } 2089 2090 index = (ha->pdev->subsystem_device & 0xff); 2091 if (use_tbl && 2092 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2093 index < QLA_MODEL_NAMES) 2094 strncpy(ha->model_desc, 2095 qla2x00_model_name[index * 2 + 1], 2096 sizeof(ha->model_desc) - 1); 2097 } else { 2098 index = (ha->pdev->subsystem_device & 0xff); 2099 if (use_tbl && 2100 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2101 index < QLA_MODEL_NAMES) { 2102 strcpy(ha->model_number, 2103 qla2x00_model_name[index * 2]); 2104 strncpy(ha->model_desc, 2105 qla2x00_model_name[index * 2 + 1], 2106 sizeof(ha->model_desc) - 1); 2107 } else { 2108 strcpy(ha->model_number, def); 2109 } 2110 } 2111 if (IS_FWI2_CAPABLE(ha)) 2112 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 2113 sizeof(ha->model_desc)); 2114 } 2115 2116 /* On sparc systems, obtain port and node WWN from firmware 2117 * properties. 2118 */ 2119 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 2120 { 2121 #ifdef CONFIG_SPARC 2122 struct qla_hw_data *ha = vha->hw; 2123 struct pci_dev *pdev = ha->pdev; 2124 struct device_node *dp = pci_device_to_OF_node(pdev); 2125 const u8 *val; 2126 int len; 2127 2128 val = of_get_property(dp, "port-wwn", &len); 2129 if (val && len >= WWN_SIZE) 2130 memcpy(nv->port_name, val, WWN_SIZE); 2131 2132 val = of_get_property(dp, "node-wwn", &len); 2133 if (val && len >= WWN_SIZE) 2134 memcpy(nv->node_name, val, WWN_SIZE); 2135 #endif 2136 } 2137 2138 /* 2139 * NVRAM configuration for ISP 2xxx 2140 * 2141 * Input: 2142 * ha = adapter block pointer. 2143 * 2144 * Output: 2145 * initialization control block in response_ring 2146 * host adapters parameters in host adapter block 2147 * 2148 * Returns: 2149 * 0 = success. 2150 */ 2151 int 2152 qla2x00_nvram_config(scsi_qla_host_t *vha) 2153 { 2154 int rval; 2155 uint8_t chksum = 0; 2156 uint16_t cnt; 2157 uint8_t *dptr1, *dptr2; 2158 struct qla_hw_data *ha = vha->hw; 2159 init_cb_t *icb = ha->init_cb; 2160 nvram_t *nv = ha->nvram; 2161 uint8_t *ptr = ha->nvram; 2162 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2163 2164 rval = QLA_SUCCESS; 2165 2166 /* Determine NVRAM starting address. */ 2167 ha->nvram_size = sizeof(nvram_t); 2168 ha->nvram_base = 0; 2169 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 2170 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 2171 ha->nvram_base = 0x80; 2172 2173 /* Get NVRAM data and calculate checksum. */ 2174 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 2175 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 2176 chksum += *ptr++; 2177 2178 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 2179 "Contents of NVRAM.\n"); 2180 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 2181 (uint8_t *)nv, ha->nvram_size); 2182 2183 /* Bad NVRAM data, set defaults parameters. */ 2184 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 2185 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 2186 /* Reset NVRAM data. */ 2187 ql_log(ql_log_warn, vha, 0x0064, 2188 "Inconisistent NVRAM " 2189 "detected: checksum=0x%x id=%c version=0x%x.\n", 2190 chksum, nv->id[0], nv->nvram_version); 2191 ql_log(ql_log_warn, vha, 0x0065, 2192 "Falling back to " 2193 "functioning (yet invalid -- WWPN) defaults.\n"); 2194 2195 /* 2196 * Set default initialization control block. 2197 */ 2198 memset(nv, 0, ha->nvram_size); 2199 nv->parameter_block_version = ICB_VERSION; 2200 2201 if (IS_QLA23XX(ha)) { 2202 nv->firmware_options[0] = BIT_2 | BIT_1; 2203 nv->firmware_options[1] = BIT_7 | BIT_5; 2204 nv->add_firmware_options[0] = BIT_5; 2205 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2206 nv->frame_payload_size = __constant_cpu_to_le16(2048); 2207 nv->special_options[1] = BIT_7; 2208 } else if (IS_QLA2200(ha)) { 2209 nv->firmware_options[0] = BIT_2 | BIT_1; 2210 nv->firmware_options[1] = BIT_7 | BIT_5; 2211 nv->add_firmware_options[0] = BIT_5; 2212 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2213 nv->frame_payload_size = __constant_cpu_to_le16(1024); 2214 } else if (IS_QLA2100(ha)) { 2215 nv->firmware_options[0] = BIT_3 | BIT_1; 2216 nv->firmware_options[1] = BIT_5; 2217 nv->frame_payload_size = __constant_cpu_to_le16(1024); 2218 } 2219 2220 nv->max_iocb_allocation = __constant_cpu_to_le16(256); 2221 nv->execution_throttle = __constant_cpu_to_le16(16); 2222 nv->retry_count = 8; 2223 nv->retry_delay = 1; 2224 2225 nv->port_name[0] = 33; 2226 nv->port_name[3] = 224; 2227 nv->port_name[4] = 139; 2228 2229 qla2xxx_nvram_wwn_from_ofw(vha, nv); 2230 2231 nv->login_timeout = 4; 2232 2233 /* 2234 * Set default host adapter parameters 2235 */ 2236 nv->host_p[1] = BIT_2; 2237 nv->reset_delay = 5; 2238 nv->port_down_retry_count = 8; 2239 nv->max_luns_per_target = __constant_cpu_to_le16(8); 2240 nv->link_down_timeout = 60; 2241 2242 rval = 1; 2243 } 2244 2245 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 2246 /* 2247 * The SN2 does not provide BIOS emulation which means you can't change 2248 * potentially bogus BIOS settings. Force the use of default settings 2249 * for link rate and frame size. Hope that the rest of the settings 2250 * are valid. 2251 */ 2252 if (ia64_platform_is("sn2")) { 2253 nv->frame_payload_size = __constant_cpu_to_le16(2048); 2254 if (IS_QLA23XX(ha)) 2255 nv->special_options[1] = BIT_7; 2256 } 2257 #endif 2258 2259 /* Reset Initialization control block */ 2260 memset(icb, 0, ha->init_cb_size); 2261 2262 /* 2263 * Setup driver NVRAM options. 2264 */ 2265 nv->firmware_options[0] |= (BIT_6 | BIT_1); 2266 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 2267 nv->firmware_options[1] |= (BIT_5 | BIT_0); 2268 nv->firmware_options[1] &= ~BIT_4; 2269 2270 if (IS_QLA23XX(ha)) { 2271 nv->firmware_options[0] |= BIT_2; 2272 nv->firmware_options[0] &= ~BIT_3; 2273 nv->firmware_options[0] &= ~BIT_6; 2274 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 2275 2276 if (IS_QLA2300(ha)) { 2277 if (ha->fb_rev == FPM_2310) { 2278 strcpy(ha->model_number, "QLA2310"); 2279 } else { 2280 strcpy(ha->model_number, "QLA2300"); 2281 } 2282 } else { 2283 qla2x00_set_model_info(vha, nv->model_number, 2284 sizeof(nv->model_number), "QLA23xx"); 2285 } 2286 } else if (IS_QLA2200(ha)) { 2287 nv->firmware_options[0] |= BIT_2; 2288 /* 2289 * 'Point-to-point preferred, else loop' is not a safe 2290 * connection mode setting. 2291 */ 2292 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 2293 (BIT_5 | BIT_4)) { 2294 /* Force 'loop preferred, else point-to-point'. */ 2295 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 2296 nv->add_firmware_options[0] |= BIT_5; 2297 } 2298 strcpy(ha->model_number, "QLA22xx"); 2299 } else /*if (IS_QLA2100(ha))*/ { 2300 strcpy(ha->model_number, "QLA2100"); 2301 } 2302 2303 /* 2304 * Copy over NVRAM RISC parameter block to initialization control block. 2305 */ 2306 dptr1 = (uint8_t *)icb; 2307 dptr2 = (uint8_t *)&nv->parameter_block_version; 2308 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 2309 while (cnt--) 2310 *dptr1++ = *dptr2++; 2311 2312 /* Copy 2nd half. */ 2313 dptr1 = (uint8_t *)icb->add_firmware_options; 2314 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 2315 while (cnt--) 2316 *dptr1++ = *dptr2++; 2317 2318 /* Use alternate WWN? */ 2319 if (nv->host_p[1] & BIT_7) { 2320 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 2321 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 2322 } 2323 2324 /* Prepare nodename */ 2325 if ((icb->firmware_options[1] & BIT_6) == 0) { 2326 /* 2327 * Firmware will apply the following mask if the nodename was 2328 * not provided. 2329 */ 2330 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 2331 icb->node_name[0] &= 0xF0; 2332 } 2333 2334 /* 2335 * Set host adapter parameters. 2336 */ 2337 2338 /* 2339 * BIT_7 in the host-parameters section allows for modification to 2340 * internal driver logging. 2341 */ 2342 if (nv->host_p[0] & BIT_7) 2343 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 2344 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 2345 /* Always load RISC code on non ISP2[12]00 chips. */ 2346 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 2347 ha->flags.disable_risc_code_load = 0; 2348 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 2349 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 2350 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 2351 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 2352 ha->flags.disable_serdes = 0; 2353 2354 ha->operating_mode = 2355 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 2356 2357 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 2358 sizeof(ha->fw_seriallink_options)); 2359 2360 /* save HBA serial number */ 2361 ha->serial0 = icb->port_name[5]; 2362 ha->serial1 = icb->port_name[6]; 2363 ha->serial2 = icb->port_name[7]; 2364 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 2365 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 2366 2367 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 2368 2369 ha->retry_count = nv->retry_count; 2370 2371 /* Set minimum login_timeout to 4 seconds. */ 2372 if (nv->login_timeout != ql2xlogintimeout) 2373 nv->login_timeout = ql2xlogintimeout; 2374 if (nv->login_timeout < 4) 2375 nv->login_timeout = 4; 2376 ha->login_timeout = nv->login_timeout; 2377 icb->login_timeout = nv->login_timeout; 2378 2379 /* Set minimum RATOV to 100 tenths of a second. */ 2380 ha->r_a_tov = 100; 2381 2382 ha->loop_reset_delay = nv->reset_delay; 2383 2384 /* Link Down Timeout = 0: 2385 * 2386 * When Port Down timer expires we will start returning 2387 * I/O's to OS with "DID_NO_CONNECT". 2388 * 2389 * Link Down Timeout != 0: 2390 * 2391 * The driver waits for the link to come up after link down 2392 * before returning I/Os to OS with "DID_NO_CONNECT". 2393 */ 2394 if (nv->link_down_timeout == 0) { 2395 ha->loop_down_abort_time = 2396 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 2397 } else { 2398 ha->link_down_timeout = nv->link_down_timeout; 2399 ha->loop_down_abort_time = 2400 (LOOP_DOWN_TIME - ha->link_down_timeout); 2401 } 2402 2403 /* 2404 * Need enough time to try and get the port back. 2405 */ 2406 ha->port_down_retry_count = nv->port_down_retry_count; 2407 if (qlport_down_retry) 2408 ha->port_down_retry_count = qlport_down_retry; 2409 /* Set login_retry_count */ 2410 ha->login_retry_count = nv->retry_count; 2411 if (ha->port_down_retry_count == nv->port_down_retry_count && 2412 ha->port_down_retry_count > 3) 2413 ha->login_retry_count = ha->port_down_retry_count; 2414 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 2415 ha->login_retry_count = ha->port_down_retry_count; 2416 if (ql2xloginretrycount) 2417 ha->login_retry_count = ql2xloginretrycount; 2418 2419 icb->lun_enables = __constant_cpu_to_le16(0); 2420 icb->command_resource_count = 0; 2421 icb->immediate_notify_resource_count = 0; 2422 icb->timeout = __constant_cpu_to_le16(0); 2423 2424 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2425 /* Enable RIO */ 2426 icb->firmware_options[0] &= ~BIT_3; 2427 icb->add_firmware_options[0] &= 2428 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2429 icb->add_firmware_options[0] |= BIT_2; 2430 icb->response_accumulation_timer = 3; 2431 icb->interrupt_delay_timer = 5; 2432 2433 vha->flags.process_response_queue = 1; 2434 } else { 2435 /* Enable ZIO. */ 2436 if (!vha->flags.init_done) { 2437 ha->zio_mode = icb->add_firmware_options[0] & 2438 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2439 ha->zio_timer = icb->interrupt_delay_timer ? 2440 icb->interrupt_delay_timer: 2; 2441 } 2442 icb->add_firmware_options[0] &= 2443 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2444 vha->flags.process_response_queue = 0; 2445 if (ha->zio_mode != QLA_ZIO_DISABLED) { 2446 ha->zio_mode = QLA_ZIO_MODE_6; 2447 2448 ql_log(ql_log_info, vha, 0x0068, 2449 "ZIO mode %d enabled; timer delay (%d us).\n", 2450 ha->zio_mode, ha->zio_timer * 100); 2451 2452 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 2453 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 2454 vha->flags.process_response_queue = 1; 2455 } 2456 } 2457 2458 if (rval) { 2459 ql_log(ql_log_warn, vha, 0x0069, 2460 "NVRAM configuration failed.\n"); 2461 } 2462 return (rval); 2463 } 2464 2465 static void 2466 qla2x00_rport_del(void *data) 2467 { 2468 fc_port_t *fcport = data; 2469 struct fc_rport *rport; 2470 unsigned long flags; 2471 2472 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2473 rport = fcport->drport ? fcport->drport: fcport->rport; 2474 fcport->drport = NULL; 2475 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2476 if (rport) 2477 fc_remote_port_delete(rport); 2478 } 2479 2480 /** 2481 * qla2x00_alloc_fcport() - Allocate a generic fcport. 2482 * @ha: HA context 2483 * @flags: allocation flags 2484 * 2485 * Returns a pointer to the allocated fcport, or NULL, if none available. 2486 */ 2487 fc_port_t * 2488 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 2489 { 2490 fc_port_t *fcport; 2491 2492 fcport = kzalloc(sizeof(fc_port_t), flags); 2493 if (!fcport) 2494 return NULL; 2495 2496 /* Setup fcport template structure. */ 2497 fcport->vha = vha; 2498 fcport->vp_idx = vha->vp_idx; 2499 fcport->port_type = FCT_UNKNOWN; 2500 fcport->loop_id = FC_NO_LOOP_ID; 2501 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 2502 fcport->supported_classes = FC_COS_UNSPECIFIED; 2503 2504 return fcport; 2505 } 2506 2507 /* 2508 * qla2x00_configure_loop 2509 * Updates Fibre Channel Device Database with what is actually on loop. 2510 * 2511 * Input: 2512 * ha = adapter block pointer. 2513 * 2514 * Returns: 2515 * 0 = success. 2516 * 1 = error. 2517 * 2 = database was full and device was not configured. 2518 */ 2519 static int 2520 qla2x00_configure_loop(scsi_qla_host_t *vha) 2521 { 2522 int rval; 2523 unsigned long flags, save_flags; 2524 struct qla_hw_data *ha = vha->hw; 2525 rval = QLA_SUCCESS; 2526 2527 /* Get Initiator ID */ 2528 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 2529 rval = qla2x00_configure_hba(vha); 2530 if (rval != QLA_SUCCESS) { 2531 ql_dbg(ql_dbg_disc, vha, 0x2013, 2532 "Unable to configure HBA.\n"); 2533 return (rval); 2534 } 2535 } 2536 2537 save_flags = flags = vha->dpc_flags; 2538 ql_dbg(ql_dbg_disc, vha, 0x2014, 2539 "Configure loop -- dpc flags = 0x%lx.\n", flags); 2540 2541 /* 2542 * If we have both an RSCN and PORT UPDATE pending then handle them 2543 * both at the same time. 2544 */ 2545 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 2546 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 2547 2548 qla2x00_get_data_rate(vha); 2549 2550 /* Determine what we need to do */ 2551 if (ha->current_topology == ISP_CFG_FL && 2552 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 2553 2554 set_bit(RSCN_UPDATE, &flags); 2555 2556 } else if (ha->current_topology == ISP_CFG_F && 2557 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 2558 2559 set_bit(RSCN_UPDATE, &flags); 2560 clear_bit(LOCAL_LOOP_UPDATE, &flags); 2561 2562 } else if (ha->current_topology == ISP_CFG_N) { 2563 clear_bit(RSCN_UPDATE, &flags); 2564 2565 } else if (!vha->flags.online || 2566 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 2567 2568 set_bit(RSCN_UPDATE, &flags); 2569 set_bit(LOCAL_LOOP_UPDATE, &flags); 2570 } 2571 2572 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 2573 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2574 ql_dbg(ql_dbg_disc, vha, 0x2015, 2575 "Loop resync needed, failing.\n"); 2576 rval = QLA_FUNCTION_FAILED; 2577 } else 2578 rval = qla2x00_configure_local_loop(vha); 2579 } 2580 2581 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 2582 if (LOOP_TRANSITION(vha)) { 2583 ql_dbg(ql_dbg_disc, vha, 0x201e, 2584 "Needs RSCN update and loop transition.\n"); 2585 rval = QLA_FUNCTION_FAILED; 2586 } 2587 else 2588 rval = qla2x00_configure_fabric(vha); 2589 } 2590 2591 if (rval == QLA_SUCCESS) { 2592 if (atomic_read(&vha->loop_down_timer) || 2593 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2594 rval = QLA_FUNCTION_FAILED; 2595 } else { 2596 atomic_set(&vha->loop_state, LOOP_READY); 2597 ql_dbg(ql_dbg_disc, vha, 0x2069, 2598 "LOOP READY.\n"); 2599 } 2600 } 2601 2602 if (rval) { 2603 ql_dbg(ql_dbg_disc, vha, 0x206a, 2604 "%s *** FAILED ***.\n", __func__); 2605 } else { 2606 ql_dbg(ql_dbg_disc, vha, 0x206b, 2607 "%s: exiting normally.\n", __func__); 2608 } 2609 2610 /* Restore state if a resync event occurred during processing */ 2611 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2612 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 2613 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 2614 if (test_bit(RSCN_UPDATE, &save_flags)) { 2615 set_bit(RSCN_UPDATE, &vha->dpc_flags); 2616 } 2617 } 2618 2619 return (rval); 2620 } 2621 2622 2623 2624 /* 2625 * qla2x00_configure_local_loop 2626 * Updates Fibre Channel Device Database with local loop devices. 2627 * 2628 * Input: 2629 * ha = adapter block pointer. 2630 * 2631 * Returns: 2632 * 0 = success. 2633 */ 2634 static int 2635 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 2636 { 2637 int rval, rval2; 2638 int found_devs; 2639 int found; 2640 fc_port_t *fcport, *new_fcport; 2641 2642 uint16_t index; 2643 uint16_t entries; 2644 char *id_iter; 2645 uint16_t loop_id; 2646 uint8_t domain, area, al_pa; 2647 struct qla_hw_data *ha = vha->hw; 2648 2649 found_devs = 0; 2650 new_fcport = NULL; 2651 entries = MAX_FIBRE_DEVICES_LOOP; 2652 2653 ql_dbg(ql_dbg_disc, vha, 0x2016, 2654 "Getting FCAL position map.\n"); 2655 if (ql2xextended_error_logging & ql_dbg_disc) 2656 qla2x00_get_fcal_position_map(vha, NULL); 2657 2658 /* Get list of logged in devices. */ 2659 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 2660 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 2661 &entries); 2662 if (rval != QLA_SUCCESS) 2663 goto cleanup_allocation; 2664 2665 ql_dbg(ql_dbg_disc, vha, 0x2017, 2666 "Entries in ID list (%d).\n", entries); 2667 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 2668 (uint8_t *)ha->gid_list, 2669 entries * sizeof(struct gid_list_info)); 2670 2671 /* Allocate temporary fcport for any new fcports discovered. */ 2672 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 2673 if (new_fcport == NULL) { 2674 ql_log(ql_log_warn, vha, 0x2018, 2675 "Memory allocation failed for fcport.\n"); 2676 rval = QLA_MEMORY_ALLOC_FAILED; 2677 goto cleanup_allocation; 2678 } 2679 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 2680 2681 /* 2682 * Mark local devices that were present with FCF_DEVICE_LOST for now. 2683 */ 2684 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2685 if (atomic_read(&fcport->state) == FCS_ONLINE && 2686 fcport->port_type != FCT_BROADCAST && 2687 (fcport->flags & FCF_FABRIC_DEVICE) == 0) { 2688 2689 ql_dbg(ql_dbg_disc, vha, 0x2019, 2690 "Marking port lost loop_id=0x%04x.\n", 2691 fcport->loop_id); 2692 2693 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2694 } 2695 } 2696 2697 /* Add devices to port list. */ 2698 id_iter = (char *)ha->gid_list; 2699 for (index = 0; index < entries; index++) { 2700 domain = ((struct gid_list_info *)id_iter)->domain; 2701 area = ((struct gid_list_info *)id_iter)->area; 2702 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 2703 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 2704 loop_id = (uint16_t) 2705 ((struct gid_list_info *)id_iter)->loop_id_2100; 2706 else 2707 loop_id = le16_to_cpu( 2708 ((struct gid_list_info *)id_iter)->loop_id); 2709 id_iter += ha->gid_list_info_size; 2710 2711 /* Bypass reserved domain fields. */ 2712 if ((domain & 0xf0) == 0xf0) 2713 continue; 2714 2715 /* Bypass if not same domain and area of adapter. */ 2716 if (area && domain && 2717 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 2718 continue; 2719 2720 /* Bypass invalid local loop ID. */ 2721 if (loop_id > LAST_LOCAL_LOOP_ID) 2722 continue; 2723 2724 /* Fill in member data. */ 2725 new_fcport->d_id.b.domain = domain; 2726 new_fcport->d_id.b.area = area; 2727 new_fcport->d_id.b.al_pa = al_pa; 2728 new_fcport->loop_id = loop_id; 2729 new_fcport->vp_idx = vha->vp_idx; 2730 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 2731 if (rval2 != QLA_SUCCESS) { 2732 ql_dbg(ql_dbg_disc, vha, 0x201a, 2733 "Failed to retrieve fcport information " 2734 "-- get_port_database=%x, loop_id=0x%04x.\n", 2735 rval2, new_fcport->loop_id); 2736 ql_dbg(ql_dbg_disc, vha, 0x201b, 2737 "Scheduling resync.\n"); 2738 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 2739 continue; 2740 } 2741 2742 /* Check for matching device in port list. */ 2743 found = 0; 2744 fcport = NULL; 2745 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2746 if (memcmp(new_fcport->port_name, fcport->port_name, 2747 WWN_SIZE)) 2748 continue; 2749 2750 fcport->flags &= ~FCF_FABRIC_DEVICE; 2751 fcport->loop_id = new_fcport->loop_id; 2752 fcport->port_type = new_fcport->port_type; 2753 fcport->d_id.b24 = new_fcport->d_id.b24; 2754 memcpy(fcport->node_name, new_fcport->node_name, 2755 WWN_SIZE); 2756 2757 found++; 2758 break; 2759 } 2760 2761 if (!found) { 2762 /* New device, add to fcports list. */ 2763 if (vha->vp_idx) { 2764 new_fcport->vha = vha; 2765 new_fcport->vp_idx = vha->vp_idx; 2766 } 2767 list_add_tail(&new_fcport->list, &vha->vp_fcports); 2768 2769 /* Allocate a new replacement fcport. */ 2770 fcport = new_fcport; 2771 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 2772 if (new_fcport == NULL) { 2773 ql_log(ql_log_warn, vha, 0x201c, 2774 "Failed to allocate memory for fcport.\n"); 2775 rval = QLA_MEMORY_ALLOC_FAILED; 2776 goto cleanup_allocation; 2777 } 2778 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 2779 } 2780 2781 /* Base iIDMA settings on HBA port speed. */ 2782 fcport->fp_speed = ha->link_data_rate; 2783 2784 qla2x00_update_fcport(vha, fcport); 2785 2786 found_devs++; 2787 } 2788 2789 cleanup_allocation: 2790 kfree(new_fcport); 2791 2792 if (rval != QLA_SUCCESS) { 2793 ql_dbg(ql_dbg_disc, vha, 0x201d, 2794 "Configure local loop error exit: rval=%x.\n", rval); 2795 } 2796 2797 return (rval); 2798 } 2799 2800 static void 2801 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 2802 { 2803 #define LS_UNKNOWN 2 2804 static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; 2805 char *link_speed; 2806 int rval; 2807 uint16_t mb[4]; 2808 struct qla_hw_data *ha = vha->hw; 2809 2810 if (!IS_IIDMA_CAPABLE(ha)) 2811 return; 2812 2813 if (atomic_read(&fcport->state) != FCS_ONLINE) 2814 return; 2815 2816 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 2817 fcport->fp_speed > ha->link_data_rate) 2818 return; 2819 2820 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 2821 mb); 2822 if (rval != QLA_SUCCESS) { 2823 ql_dbg(ql_dbg_disc, vha, 0x2004, 2824 "Unable to adjust iIDMA " 2825 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x " 2826 "%04x.\n", fcport->port_name[0], fcport->port_name[1], 2827 fcport->port_name[2], fcport->port_name[3], 2828 fcport->port_name[4], fcport->port_name[5], 2829 fcport->port_name[6], fcport->port_name[7], rval, 2830 fcport->fp_speed, mb[0], mb[1]); 2831 } else { 2832 link_speed = link_speeds[LS_UNKNOWN]; 2833 if (fcport->fp_speed < 5) 2834 link_speed = link_speeds[fcport->fp_speed]; 2835 else if (fcport->fp_speed == 0x13) 2836 link_speed = link_speeds[5]; 2837 ql_dbg(ql_dbg_disc, vha, 0x2005, 2838 "iIDMA adjusted to %s GB/s " 2839 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed, 2840 fcport->port_name[0], fcport->port_name[1], 2841 fcport->port_name[2], fcport->port_name[3], 2842 fcport->port_name[4], fcport->port_name[5], 2843 fcport->port_name[6], fcport->port_name[7]); 2844 } 2845 } 2846 2847 static void 2848 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 2849 { 2850 struct fc_rport_identifiers rport_ids; 2851 struct fc_rport *rport; 2852 unsigned long flags; 2853 2854 qla2x00_rport_del(fcport); 2855 2856 rport_ids.node_name = wwn_to_u64(fcport->node_name); 2857 rport_ids.port_name = wwn_to_u64(fcport->port_name); 2858 rport_ids.port_id = fcport->d_id.b.domain << 16 | 2859 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 2860 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 2861 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 2862 if (!rport) { 2863 ql_log(ql_log_warn, vha, 0x2006, 2864 "Unable to allocate fc remote port.\n"); 2865 return; 2866 } 2867 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2868 *((fc_port_t **)rport->dd_data) = fcport; 2869 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2870 2871 rport->supported_classes = fcport->supported_classes; 2872 2873 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 2874 if (fcport->port_type == FCT_INITIATOR) 2875 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 2876 if (fcport->port_type == FCT_TARGET) 2877 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 2878 fc_remote_port_rolechg(rport, rport_ids.roles); 2879 } 2880 2881 /* 2882 * qla2x00_update_fcport 2883 * Updates device on list. 2884 * 2885 * Input: 2886 * ha = adapter block pointer. 2887 * fcport = port structure pointer. 2888 * 2889 * Return: 2890 * 0 - Success 2891 * BIT_0 - error 2892 * 2893 * Context: 2894 * Kernel context. 2895 */ 2896 void 2897 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 2898 { 2899 fcport->vha = vha; 2900 fcport->login_retry = 0; 2901 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 2902 2903 qla2x00_iidma_fcport(vha, fcport); 2904 qla24xx_update_fcport_fcp_prio(vha, fcport); 2905 qla2x00_reg_remote_port(vha, fcport); 2906 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 2907 } 2908 2909 /* 2910 * qla2x00_configure_fabric 2911 * Setup SNS devices with loop ID's. 2912 * 2913 * Input: 2914 * ha = adapter block pointer. 2915 * 2916 * Returns: 2917 * 0 = success. 2918 * BIT_0 = error 2919 */ 2920 static int 2921 qla2x00_configure_fabric(scsi_qla_host_t *vha) 2922 { 2923 int rval; 2924 fc_port_t *fcport, *fcptemp; 2925 uint16_t next_loopid; 2926 uint16_t mb[MAILBOX_REGISTER_COUNT]; 2927 uint16_t loop_id; 2928 LIST_HEAD(new_fcports); 2929 struct qla_hw_data *ha = vha->hw; 2930 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 2931 2932 /* If FL port exists, then SNS is present */ 2933 if (IS_FWI2_CAPABLE(ha)) 2934 loop_id = NPH_F_PORT; 2935 else 2936 loop_id = SNS_FL_PORT; 2937 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 2938 if (rval != QLA_SUCCESS) { 2939 ql_dbg(ql_dbg_disc, vha, 0x201f, 2940 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 2941 2942 vha->device_flags &= ~SWITCH_FOUND; 2943 return (QLA_SUCCESS); 2944 } 2945 vha->device_flags |= SWITCH_FOUND; 2946 2947 do { 2948 /* FDMI support. */ 2949 if (ql2xfdmienable && 2950 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 2951 qla2x00_fdmi_register(vha); 2952 2953 /* Ensure we are logged into the SNS. */ 2954 if (IS_FWI2_CAPABLE(ha)) 2955 loop_id = NPH_SNS; 2956 else 2957 loop_id = SIMPLE_NAME_SERVER; 2958 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 2959 0xfc, mb, BIT_1|BIT_0); 2960 if (rval != QLA_SUCCESS) { 2961 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 2962 return rval; 2963 } 2964 if (mb[0] != MBS_COMMAND_COMPLETE) { 2965 ql_dbg(ql_dbg_disc, vha, 0x2042, 2966 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 2967 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], 2968 mb[2], mb[6], mb[7]); 2969 return (QLA_SUCCESS); 2970 } 2971 2972 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 2973 if (qla2x00_rft_id(vha)) { 2974 /* EMPTY */ 2975 ql_dbg(ql_dbg_disc, vha, 0x2045, 2976 "Register FC-4 TYPE failed.\n"); 2977 } 2978 if (qla2x00_rff_id(vha)) { 2979 /* EMPTY */ 2980 ql_dbg(ql_dbg_disc, vha, 0x2049, 2981 "Register FC-4 Features failed.\n"); 2982 } 2983 if (qla2x00_rnn_id(vha)) { 2984 /* EMPTY */ 2985 ql_dbg(ql_dbg_disc, vha, 0x204f, 2986 "Register Node Name failed.\n"); 2987 } else if (qla2x00_rsnn_nn(vha)) { 2988 /* EMPTY */ 2989 ql_dbg(ql_dbg_disc, vha, 0x2053, 2990 "Register Symobilic Node Name failed.\n"); 2991 } 2992 } 2993 2994 #define QLA_FCPORT_SCAN 1 2995 #define QLA_FCPORT_FOUND 2 2996 2997 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2998 fcport->scan_state = QLA_FCPORT_SCAN; 2999 } 3000 3001 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); 3002 if (rval != QLA_SUCCESS) 3003 break; 3004 3005 /* 3006 * Logout all previous fabric devices marked lost, except 3007 * FCP2 devices. 3008 */ 3009 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3010 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3011 break; 3012 3013 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 3014 continue; 3015 3016 if (fcport->scan_state == QLA_FCPORT_SCAN && 3017 atomic_read(&fcport->state) == FCS_ONLINE) { 3018 qla2x00_mark_device_lost(vha, fcport, 3019 ql2xplogiabsentdevice, 0); 3020 if (fcport->loop_id != FC_NO_LOOP_ID && 3021 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3022 fcport->port_type != FCT_INITIATOR && 3023 fcport->port_type != FCT_BROADCAST) { 3024 ha->isp_ops->fabric_logout(vha, 3025 fcport->loop_id, 3026 fcport->d_id.b.domain, 3027 fcport->d_id.b.area, 3028 fcport->d_id.b.al_pa); 3029 fcport->loop_id = FC_NO_LOOP_ID; 3030 } 3031 } 3032 } 3033 3034 /* Starting free loop ID. */ 3035 next_loopid = ha->min_external_loopid; 3036 3037 /* 3038 * Scan through our port list and login entries that need to be 3039 * logged in. 3040 */ 3041 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3042 if (atomic_read(&vha->loop_down_timer) || 3043 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3044 break; 3045 3046 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 3047 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 3048 continue; 3049 3050 if (fcport->loop_id == FC_NO_LOOP_ID) { 3051 fcport->loop_id = next_loopid; 3052 rval = qla2x00_find_new_loop_id( 3053 base_vha, fcport); 3054 if (rval != QLA_SUCCESS) { 3055 /* Ran out of IDs to use */ 3056 break; 3057 } 3058 } 3059 /* Login and update database */ 3060 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3061 } 3062 3063 /* Exit if out of loop IDs. */ 3064 if (rval != QLA_SUCCESS) { 3065 break; 3066 } 3067 3068 /* 3069 * Login and add the new devices to our port list. 3070 */ 3071 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3072 if (atomic_read(&vha->loop_down_timer) || 3073 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3074 break; 3075 3076 /* Find a new loop ID to use. */ 3077 fcport->loop_id = next_loopid; 3078 rval = qla2x00_find_new_loop_id(base_vha, fcport); 3079 if (rval != QLA_SUCCESS) { 3080 /* Ran out of IDs to use */ 3081 break; 3082 } 3083 3084 /* Login and update database */ 3085 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3086 3087 if (vha->vp_idx) { 3088 fcport->vha = vha; 3089 fcport->vp_idx = vha->vp_idx; 3090 } 3091 list_move_tail(&fcport->list, &vha->vp_fcports); 3092 } 3093 } while (0); 3094 3095 /* Free all new device structures not processed. */ 3096 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3097 list_del(&fcport->list); 3098 kfree(fcport); 3099 } 3100 3101 if (rval) { 3102 ql_dbg(ql_dbg_disc, vha, 0x2068, 3103 "Configure fabric error exit rval=%d.\n", rval); 3104 } 3105 3106 return (rval); 3107 } 3108 3109 /* 3110 * qla2x00_find_all_fabric_devs 3111 * 3112 * Input: 3113 * ha = adapter block pointer. 3114 * dev = database device entry pointer. 3115 * 3116 * Returns: 3117 * 0 = success. 3118 * 3119 * Context: 3120 * Kernel context. 3121 */ 3122 static int 3123 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, 3124 struct list_head *new_fcports) 3125 { 3126 int rval; 3127 uint16_t loop_id; 3128 fc_port_t *fcport, *new_fcport, *fcptemp; 3129 int found; 3130 3131 sw_info_t *swl; 3132 int swl_idx; 3133 int first_dev, last_dev; 3134 port_id_t wrap = {}, nxt_d_id; 3135 struct qla_hw_data *ha = vha->hw; 3136 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); 3137 struct scsi_qla_host *tvp; 3138 3139 rval = QLA_SUCCESS; 3140 3141 /* Try GID_PT to get device list, else GAN. */ 3142 if (!ha->swl) 3143 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 3144 GFP_KERNEL); 3145 swl = ha->swl; 3146 if (!swl) { 3147 /*EMPTY*/ 3148 ql_dbg(ql_dbg_disc, vha, 0x2054, 3149 "GID_PT allocations failed, fallback on GA_NXT.\n"); 3150 } else { 3151 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 3152 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 3153 swl = NULL; 3154 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 3155 swl = NULL; 3156 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 3157 swl = NULL; 3158 } else if (ql2xiidmaenable && 3159 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { 3160 qla2x00_gpsc(vha, swl); 3161 } 3162 3163 /* If other queries succeeded probe for FC-4 type */ 3164 if (swl) 3165 qla2x00_gff_id(vha, swl); 3166 } 3167 swl_idx = 0; 3168 3169 /* Allocate temporary fcport for any new fcports discovered. */ 3170 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3171 if (new_fcport == NULL) { 3172 ql_log(ql_log_warn, vha, 0x205e, 3173 "Failed to allocate memory for fcport.\n"); 3174 return (QLA_MEMORY_ALLOC_FAILED); 3175 } 3176 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3177 /* Set start port ID scan at adapter ID. */ 3178 first_dev = 1; 3179 last_dev = 0; 3180 3181 /* Starting free loop ID. */ 3182 loop_id = ha->min_external_loopid; 3183 for (; loop_id <= ha->max_loop_id; loop_id++) { 3184 if (qla2x00_is_reserved_id(vha, loop_id)) 3185 continue; 3186 3187 if (ha->current_topology == ISP_CFG_FL && 3188 (atomic_read(&vha->loop_down_timer) || 3189 LOOP_TRANSITION(vha))) { 3190 atomic_set(&vha->loop_down_timer, 0); 3191 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3192 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3193 break; 3194 } 3195 3196 if (swl != NULL) { 3197 if (last_dev) { 3198 wrap.b24 = new_fcport->d_id.b24; 3199 } else { 3200 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 3201 memcpy(new_fcport->node_name, 3202 swl[swl_idx].node_name, WWN_SIZE); 3203 memcpy(new_fcport->port_name, 3204 swl[swl_idx].port_name, WWN_SIZE); 3205 memcpy(new_fcport->fabric_port_name, 3206 swl[swl_idx].fabric_port_name, WWN_SIZE); 3207 new_fcport->fp_speed = swl[swl_idx].fp_speed; 3208 new_fcport->fc4_type = swl[swl_idx].fc4_type; 3209 3210 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 3211 last_dev = 1; 3212 } 3213 swl_idx++; 3214 } 3215 } else { 3216 /* Send GA_NXT to the switch */ 3217 rval = qla2x00_ga_nxt(vha, new_fcport); 3218 if (rval != QLA_SUCCESS) { 3219 ql_log(ql_log_warn, vha, 0x2064, 3220 "SNS scan failed -- assuming " 3221 "zero-entry result.\n"); 3222 list_for_each_entry_safe(fcport, fcptemp, 3223 new_fcports, list) { 3224 list_del(&fcport->list); 3225 kfree(fcport); 3226 } 3227 rval = QLA_SUCCESS; 3228 break; 3229 } 3230 } 3231 3232 /* If wrap on switch device list, exit. */ 3233 if (first_dev) { 3234 wrap.b24 = new_fcport->d_id.b24; 3235 first_dev = 0; 3236 } else if (new_fcport->d_id.b24 == wrap.b24) { 3237 ql_dbg(ql_dbg_disc, vha, 0x2065, 3238 "Device wrap (%02x%02x%02x).\n", 3239 new_fcport->d_id.b.domain, 3240 new_fcport->d_id.b.area, 3241 new_fcport->d_id.b.al_pa); 3242 break; 3243 } 3244 3245 /* Bypass if same physical adapter. */ 3246 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 3247 continue; 3248 3249 /* Bypass virtual ports of the same host. */ 3250 found = 0; 3251 if (ha->num_vhosts) { 3252 unsigned long flags; 3253 3254 spin_lock_irqsave(&ha->vport_slock, flags); 3255 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 3256 if (new_fcport->d_id.b24 == vp->d_id.b24) { 3257 found = 1; 3258 break; 3259 } 3260 } 3261 spin_unlock_irqrestore(&ha->vport_slock, flags); 3262 3263 if (found) 3264 continue; 3265 } 3266 3267 /* Bypass if same domain and area of adapter. */ 3268 if (((new_fcport->d_id.b24 & 0xffff00) == 3269 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 3270 ISP_CFG_FL) 3271 continue; 3272 3273 /* Bypass reserved domain fields. */ 3274 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 3275 continue; 3276 3277 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 3278 if (ql2xgffidenable && 3279 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 3280 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 3281 continue; 3282 3283 /* Locate matching device in database. */ 3284 found = 0; 3285 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3286 if (memcmp(new_fcport->port_name, fcport->port_name, 3287 WWN_SIZE)) 3288 continue; 3289 3290 fcport->scan_state = QLA_FCPORT_FOUND; 3291 3292 found++; 3293 3294 /* Update port state. */ 3295 memcpy(fcport->fabric_port_name, 3296 new_fcport->fabric_port_name, WWN_SIZE); 3297 fcport->fp_speed = new_fcport->fp_speed; 3298 3299 /* 3300 * If address the same and state FCS_ONLINE, nothing 3301 * changed. 3302 */ 3303 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 3304 atomic_read(&fcport->state) == FCS_ONLINE) { 3305 break; 3306 } 3307 3308 /* 3309 * If device was not a fabric device before. 3310 */ 3311 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3312 fcport->d_id.b24 = new_fcport->d_id.b24; 3313 fcport->loop_id = FC_NO_LOOP_ID; 3314 fcport->flags |= (FCF_FABRIC_DEVICE | 3315 FCF_LOGIN_NEEDED); 3316 break; 3317 } 3318 3319 /* 3320 * Port ID changed or device was marked to be updated; 3321 * Log it out if still logged in and mark it for 3322 * relogin later. 3323 */ 3324 fcport->d_id.b24 = new_fcport->d_id.b24; 3325 fcport->flags |= FCF_LOGIN_NEEDED; 3326 if (fcport->loop_id != FC_NO_LOOP_ID && 3327 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3328 (fcport->flags & FCF_ASYNC_SENT) == 0 && 3329 fcport->port_type != FCT_INITIATOR && 3330 fcport->port_type != FCT_BROADCAST) { 3331 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3332 fcport->d_id.b.domain, fcport->d_id.b.area, 3333 fcport->d_id.b.al_pa); 3334 fcport->loop_id = FC_NO_LOOP_ID; 3335 } 3336 3337 break; 3338 } 3339 3340 if (found) 3341 continue; 3342 /* If device was not in our fcports list, then add it. */ 3343 list_add_tail(&new_fcport->list, new_fcports); 3344 3345 /* Allocate a new replacement fcport. */ 3346 nxt_d_id.b24 = new_fcport->d_id.b24; 3347 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3348 if (new_fcport == NULL) { 3349 ql_log(ql_log_warn, vha, 0x2066, 3350 "Memory allocation failed for fcport.\n"); 3351 return (QLA_MEMORY_ALLOC_FAILED); 3352 } 3353 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3354 new_fcport->d_id.b24 = nxt_d_id.b24; 3355 } 3356 3357 kfree(new_fcport); 3358 3359 return (rval); 3360 } 3361 3362 /* 3363 * qla2x00_find_new_loop_id 3364 * Scan through our port list and find a new usable loop ID. 3365 * 3366 * Input: 3367 * ha: adapter state pointer. 3368 * dev: port structure pointer. 3369 * 3370 * Returns: 3371 * qla2x00 local function return status code. 3372 * 3373 * Context: 3374 * Kernel context. 3375 */ 3376 int 3377 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 3378 { 3379 int rval; 3380 int found; 3381 fc_port_t *fcport; 3382 uint16_t first_loop_id; 3383 struct qla_hw_data *ha = vha->hw; 3384 struct scsi_qla_host *vp; 3385 struct scsi_qla_host *tvp; 3386 unsigned long flags = 0; 3387 3388 rval = QLA_SUCCESS; 3389 3390 /* Save starting loop ID. */ 3391 first_loop_id = dev->loop_id; 3392 3393 for (;;) { 3394 /* Skip loop ID if already used by adapter. */ 3395 if (dev->loop_id == vha->loop_id) 3396 dev->loop_id++; 3397 3398 /* Skip reserved loop IDs. */ 3399 while (qla2x00_is_reserved_id(vha, dev->loop_id)) 3400 dev->loop_id++; 3401 3402 /* Reset loop ID if passed the end. */ 3403 if (dev->loop_id > ha->max_loop_id) { 3404 /* first loop ID. */ 3405 dev->loop_id = ha->min_external_loopid; 3406 } 3407 3408 /* Check for loop ID being already in use. */ 3409 found = 0; 3410 fcport = NULL; 3411 3412 spin_lock_irqsave(&ha->vport_slock, flags); 3413 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 3414 list_for_each_entry(fcport, &vp->vp_fcports, list) { 3415 if (fcport->loop_id == dev->loop_id && 3416 fcport != dev) { 3417 /* ID possibly in use */ 3418 found++; 3419 break; 3420 } 3421 } 3422 if (found) 3423 break; 3424 } 3425 spin_unlock_irqrestore(&ha->vport_slock, flags); 3426 3427 /* If not in use then it is free to use. */ 3428 if (!found) { 3429 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 3430 "Assigning new loopid=%x, portid=%x.\n", 3431 dev->loop_id, dev->d_id.b24); 3432 break; 3433 } 3434 3435 /* ID in use. Try next value. */ 3436 dev->loop_id++; 3437 3438 /* If wrap around. No free ID to use. */ 3439 if (dev->loop_id == first_loop_id) { 3440 dev->loop_id = FC_NO_LOOP_ID; 3441 rval = QLA_FUNCTION_FAILED; 3442 break; 3443 } 3444 } 3445 3446 return (rval); 3447 } 3448 3449 /* 3450 * qla2x00_fabric_dev_login 3451 * Login fabric target device and update FC port database. 3452 * 3453 * Input: 3454 * ha: adapter state pointer. 3455 * fcport: port structure list pointer. 3456 * next_loopid: contains value of a new loop ID that can be used 3457 * by the next login attempt. 3458 * 3459 * Returns: 3460 * qla2x00 local function return status code. 3461 * 3462 * Context: 3463 * Kernel context. 3464 */ 3465 static int 3466 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3467 uint16_t *next_loopid) 3468 { 3469 int rval; 3470 int retry; 3471 uint8_t opts; 3472 struct qla_hw_data *ha = vha->hw; 3473 3474 rval = QLA_SUCCESS; 3475 retry = 0; 3476 3477 if (IS_ALOGIO_CAPABLE(ha)) { 3478 if (fcport->flags & FCF_ASYNC_SENT) 3479 return rval; 3480 fcport->flags |= FCF_ASYNC_SENT; 3481 rval = qla2x00_post_async_login_work(vha, fcport, NULL); 3482 if (!rval) 3483 return rval; 3484 } 3485 3486 fcport->flags &= ~FCF_ASYNC_SENT; 3487 rval = qla2x00_fabric_login(vha, fcport, next_loopid); 3488 if (rval == QLA_SUCCESS) { 3489 /* Send an ADISC to FCP2 devices.*/ 3490 opts = 0; 3491 if (fcport->flags & FCF_FCP2_DEVICE) 3492 opts |= BIT_1; 3493 rval = qla2x00_get_port_database(vha, fcport, opts); 3494 if (rval != QLA_SUCCESS) { 3495 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3496 fcport->d_id.b.domain, fcport->d_id.b.area, 3497 fcport->d_id.b.al_pa); 3498 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3499 } else { 3500 qla2x00_update_fcport(vha, fcport); 3501 } 3502 } else { 3503 /* Retry Login. */ 3504 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3505 } 3506 3507 return (rval); 3508 } 3509 3510 /* 3511 * qla2x00_fabric_login 3512 * Issue fabric login command. 3513 * 3514 * Input: 3515 * ha = adapter block pointer. 3516 * device = pointer to FC device type structure. 3517 * 3518 * Returns: 3519 * 0 - Login successfully 3520 * 1 - Login failed 3521 * 2 - Initiator device 3522 * 3 - Fatal error 3523 */ 3524 int 3525 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3526 uint16_t *next_loopid) 3527 { 3528 int rval; 3529 int retry; 3530 uint16_t tmp_loopid; 3531 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3532 struct qla_hw_data *ha = vha->hw; 3533 3534 retry = 0; 3535 tmp_loopid = 0; 3536 3537 for (;;) { 3538 ql_dbg(ql_dbg_disc, vha, 0x2000, 3539 "Trying Fabric Login w/loop id 0x%04x for port " 3540 "%02x%02x%02x.\n", 3541 fcport->loop_id, fcport->d_id.b.domain, 3542 fcport->d_id.b.area, fcport->d_id.b.al_pa); 3543 3544 /* Login fcport on switch. */ 3545 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 3546 fcport->d_id.b.domain, fcport->d_id.b.area, 3547 fcport->d_id.b.al_pa, mb, BIT_0); 3548 if (rval != QLA_SUCCESS) { 3549 return rval; 3550 } 3551 if (mb[0] == MBS_PORT_ID_USED) { 3552 /* 3553 * Device has another loop ID. The firmware team 3554 * recommends the driver perform an implicit login with 3555 * the specified ID again. The ID we just used is save 3556 * here so we return with an ID that can be tried by 3557 * the next login. 3558 */ 3559 retry++; 3560 tmp_loopid = fcport->loop_id; 3561 fcport->loop_id = mb[1]; 3562 3563 ql_dbg(ql_dbg_disc, vha, 0x2001, 3564 "Fabric Login: port in use - next loop " 3565 "id=0x%04x, port id= %02x%02x%02x.\n", 3566 fcport->loop_id, fcport->d_id.b.domain, 3567 fcport->d_id.b.area, fcport->d_id.b.al_pa); 3568 3569 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 3570 /* 3571 * Login succeeded. 3572 */ 3573 if (retry) { 3574 /* A retry occurred before. */ 3575 *next_loopid = tmp_loopid; 3576 } else { 3577 /* 3578 * No retry occurred before. Just increment the 3579 * ID value for next login. 3580 */ 3581 *next_loopid = (fcport->loop_id + 1); 3582 } 3583 3584 if (mb[1] & BIT_0) { 3585 fcport->port_type = FCT_INITIATOR; 3586 } else { 3587 fcport->port_type = FCT_TARGET; 3588 if (mb[1] & BIT_1) { 3589 fcport->flags |= FCF_FCP2_DEVICE; 3590 } 3591 } 3592 3593 if (mb[10] & BIT_0) 3594 fcport->supported_classes |= FC_COS_CLASS2; 3595 if (mb[10] & BIT_1) 3596 fcport->supported_classes |= FC_COS_CLASS3; 3597 3598 rval = QLA_SUCCESS; 3599 break; 3600 } else if (mb[0] == MBS_LOOP_ID_USED) { 3601 /* 3602 * Loop ID already used, try next loop ID. 3603 */ 3604 fcport->loop_id++; 3605 rval = qla2x00_find_new_loop_id(vha, fcport); 3606 if (rval != QLA_SUCCESS) { 3607 /* Ran out of loop IDs to use */ 3608 break; 3609 } 3610 } else if (mb[0] == MBS_COMMAND_ERROR) { 3611 /* 3612 * Firmware possibly timed out during login. If NO 3613 * retries are left to do then the device is declared 3614 * dead. 3615 */ 3616 *next_loopid = fcport->loop_id; 3617 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3618 fcport->d_id.b.domain, fcport->d_id.b.area, 3619 fcport->d_id.b.al_pa); 3620 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3621 3622 rval = 1; 3623 break; 3624 } else { 3625 /* 3626 * unrecoverable / not handled error 3627 */ 3628 ql_dbg(ql_dbg_disc, vha, 0x2002, 3629 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 3630 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 3631 fcport->d_id.b.area, fcport->d_id.b.al_pa, 3632 fcport->loop_id, jiffies); 3633 3634 *next_loopid = fcport->loop_id; 3635 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3636 fcport->d_id.b.domain, fcport->d_id.b.area, 3637 fcport->d_id.b.al_pa); 3638 fcport->loop_id = FC_NO_LOOP_ID; 3639 fcport->login_retry = 0; 3640 3641 rval = 3; 3642 break; 3643 } 3644 } 3645 3646 return (rval); 3647 } 3648 3649 /* 3650 * qla2x00_local_device_login 3651 * Issue local device login command. 3652 * 3653 * Input: 3654 * ha = adapter block pointer. 3655 * loop_id = loop id of device to login to. 3656 * 3657 * Returns (Where's the #define!!!!): 3658 * 0 - Login successfully 3659 * 1 - Login failed 3660 * 3 - Fatal error 3661 */ 3662 int 3663 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 3664 { 3665 int rval; 3666 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3667 3668 memset(mb, 0, sizeof(mb)); 3669 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 3670 if (rval == QLA_SUCCESS) { 3671 /* Interrogate mailbox registers for any errors */ 3672 if (mb[0] == MBS_COMMAND_ERROR) 3673 rval = 1; 3674 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 3675 /* device not in PCB table */ 3676 rval = 3; 3677 } 3678 3679 return (rval); 3680 } 3681 3682 /* 3683 * qla2x00_loop_resync 3684 * Resync with fibre channel devices. 3685 * 3686 * Input: 3687 * ha = adapter block pointer. 3688 * 3689 * Returns: 3690 * 0 = success 3691 */ 3692 int 3693 qla2x00_loop_resync(scsi_qla_host_t *vha) 3694 { 3695 int rval = QLA_SUCCESS; 3696 uint32_t wait_time; 3697 struct req_que *req; 3698 struct rsp_que *rsp; 3699 3700 if (vha->hw->flags.cpu_affinity_enabled) 3701 req = vha->hw->req_q_map[0]; 3702 else 3703 req = vha->req; 3704 rsp = req->rsp; 3705 3706 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 3707 if (vha->flags.online) { 3708 if (!(rval = qla2x00_fw_ready(vha))) { 3709 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 3710 wait_time = 256; 3711 do { 3712 /* Issue a marker after FW becomes ready. */ 3713 qla2x00_marker(vha, req, rsp, 0, 0, 3714 MK_SYNC_ALL); 3715 vha->marker_needed = 0; 3716 3717 /* Remap devices on Loop. */ 3718 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3719 3720 qla2x00_configure_loop(vha); 3721 wait_time--; 3722 } while (!atomic_read(&vha->loop_down_timer) && 3723 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 3724 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 3725 &vha->dpc_flags))); 3726 } 3727 } 3728 3729 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 3730 return (QLA_FUNCTION_FAILED); 3731 3732 if (rval) 3733 ql_dbg(ql_dbg_disc, vha, 0x206c, 3734 "%s *** FAILED ***.\n", __func__); 3735 3736 return (rval); 3737 } 3738 3739 /* 3740 * qla2x00_perform_loop_resync 3741 * Description: This function will set the appropriate flags and call 3742 * qla2x00_loop_resync. If successful loop will be resynced 3743 * Arguments : scsi_qla_host_t pointer 3744 * returm : Success or Failure 3745 */ 3746 3747 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 3748 { 3749 int32_t rval = 0; 3750 3751 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 3752 /*Configure the flags so that resync happens properly*/ 3753 atomic_set(&ha->loop_down_timer, 0); 3754 if (!(ha->device_flags & DFLG_NO_CABLE)) { 3755 atomic_set(&ha->loop_state, LOOP_UP); 3756 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 3757 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 3758 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 3759 3760 rval = qla2x00_loop_resync(ha); 3761 } else 3762 atomic_set(&ha->loop_state, LOOP_DEAD); 3763 3764 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 3765 } 3766 3767 return rval; 3768 } 3769 3770 void 3771 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 3772 { 3773 fc_port_t *fcport; 3774 struct scsi_qla_host *vha; 3775 struct qla_hw_data *ha = base_vha->hw; 3776 unsigned long flags; 3777 3778 spin_lock_irqsave(&ha->vport_slock, flags); 3779 /* Go with deferred removal of rport references. */ 3780 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 3781 atomic_inc(&vha->vref_count); 3782 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3783 if (fcport->drport && 3784 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 3785 spin_unlock_irqrestore(&ha->vport_slock, flags); 3786 3787 qla2x00_rport_del(fcport); 3788 3789 spin_lock_irqsave(&ha->vport_slock, flags); 3790 } 3791 } 3792 atomic_dec(&vha->vref_count); 3793 } 3794 spin_unlock_irqrestore(&ha->vport_slock, flags); 3795 } 3796 3797 /* 3798 * qla82xx_quiescent_state_cleanup 3799 * Description: This function will block the new I/Os 3800 * Its not aborting any I/Os as context 3801 * is not destroyed during quiescence 3802 * Arguments: scsi_qla_host_t 3803 * return : void 3804 */ 3805 void 3806 qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha) 3807 { 3808 struct qla_hw_data *ha = vha->hw; 3809 struct scsi_qla_host *vp; 3810 3811 ql_dbg(ql_dbg_p3p, vha, 0xb002, 3812 "Performing ISP error recovery - ha=%p.\n", ha); 3813 3814 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 3815 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 3816 atomic_set(&vha->loop_state, LOOP_DOWN); 3817 qla2x00_mark_all_devices_lost(vha, 0); 3818 list_for_each_entry(vp, &ha->vp_list, list) 3819 qla2x00_mark_all_devices_lost(vha, 0); 3820 } else { 3821 if (!atomic_read(&vha->loop_down_timer)) 3822 atomic_set(&vha->loop_down_timer, 3823 LOOP_DOWN_TIME); 3824 } 3825 /* Wait for pending cmds to complete */ 3826 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 3827 } 3828 3829 void 3830 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 3831 { 3832 struct qla_hw_data *ha = vha->hw; 3833 struct scsi_qla_host *vp; 3834 unsigned long flags; 3835 fc_port_t *fcport; 3836 3837 /* For ISP82XX, driver waits for completion of the commands. 3838 * online flag should be set. 3839 */ 3840 if (!IS_QLA82XX(ha)) 3841 vha->flags.online = 0; 3842 ha->flags.chip_reset_done = 0; 3843 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3844 ha->qla_stats.total_isp_aborts++; 3845 3846 ql_log(ql_log_info, vha, 0x00af, 3847 "Performing ISP error recovery - ha=%p.\n", ha); 3848 3849 /* For ISP82XX, reset_chip is just disabling interrupts. 3850 * Driver waits for the completion of the commands. 3851 * the interrupts need to be enabled. 3852 */ 3853 if (!IS_QLA82XX(ha)) 3854 ha->isp_ops->reset_chip(vha); 3855 3856 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 3857 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 3858 atomic_set(&vha->loop_state, LOOP_DOWN); 3859 qla2x00_mark_all_devices_lost(vha, 0); 3860 3861 spin_lock_irqsave(&ha->vport_slock, flags); 3862 list_for_each_entry(vp, &ha->vp_list, list) { 3863 atomic_inc(&vp->vref_count); 3864 spin_unlock_irqrestore(&ha->vport_slock, flags); 3865 3866 qla2x00_mark_all_devices_lost(vp, 0); 3867 3868 spin_lock_irqsave(&ha->vport_slock, flags); 3869 atomic_dec(&vp->vref_count); 3870 } 3871 spin_unlock_irqrestore(&ha->vport_slock, flags); 3872 } else { 3873 if (!atomic_read(&vha->loop_down_timer)) 3874 atomic_set(&vha->loop_down_timer, 3875 LOOP_DOWN_TIME); 3876 } 3877 3878 /* Clear all async request states across all VPs. */ 3879 list_for_each_entry(fcport, &vha->vp_fcports, list) 3880 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 3881 spin_lock_irqsave(&ha->vport_slock, flags); 3882 list_for_each_entry(vp, &ha->vp_list, list) { 3883 atomic_inc(&vp->vref_count); 3884 spin_unlock_irqrestore(&ha->vport_slock, flags); 3885 3886 list_for_each_entry(fcport, &vp->vp_fcports, list) 3887 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 3888 3889 spin_lock_irqsave(&ha->vport_slock, flags); 3890 atomic_dec(&vp->vref_count); 3891 } 3892 spin_unlock_irqrestore(&ha->vport_slock, flags); 3893 3894 if (!ha->flags.eeh_busy) { 3895 /* Make sure for ISP 82XX IO DMA is complete */ 3896 if (IS_QLA82XX(ha)) { 3897 qla82xx_chip_reset_cleanup(vha); 3898 ql_log(ql_log_info, vha, 0x00b4, 3899 "Done chip reset cleanup.\n"); 3900 3901 /* Done waiting for pending commands. 3902 * Reset the online flag. 3903 */ 3904 vha->flags.online = 0; 3905 } 3906 3907 /* Requeue all commands in outstanding command list. */ 3908 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 3909 } 3910 } 3911 3912 /* 3913 * qla2x00_abort_isp 3914 * Resets ISP and aborts all outstanding commands. 3915 * 3916 * Input: 3917 * ha = adapter block pointer. 3918 * 3919 * Returns: 3920 * 0 = success 3921 */ 3922 int 3923 qla2x00_abort_isp(scsi_qla_host_t *vha) 3924 { 3925 int rval; 3926 uint8_t status = 0; 3927 struct qla_hw_data *ha = vha->hw; 3928 struct scsi_qla_host *vp; 3929 struct req_que *req = ha->req_q_map[0]; 3930 unsigned long flags; 3931 3932 if (vha->flags.online) { 3933 qla2x00_abort_isp_cleanup(vha); 3934 3935 if (unlikely(pci_channel_offline(ha->pdev) && 3936 ha->flags.pci_channel_io_perm_failure)) { 3937 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 3938 status = 0; 3939 return status; 3940 } 3941 3942 ha->isp_ops->get_flash_version(vha, req->ring); 3943 3944 ha->isp_ops->nvram_config(vha); 3945 3946 if (!qla2x00_restart_isp(vha)) { 3947 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 3948 3949 if (!atomic_read(&vha->loop_down_timer)) { 3950 /* 3951 * Issue marker command only when we are going 3952 * to start the I/O . 3953 */ 3954 vha->marker_needed = 1; 3955 } 3956 3957 vha->flags.online = 1; 3958 3959 ha->isp_ops->enable_intrs(ha); 3960 3961 ha->isp_abort_cnt = 0; 3962 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 3963 3964 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 3965 qla2x00_get_fw_version(vha); 3966 if (ha->fce) { 3967 ha->flags.fce_enabled = 1; 3968 memset(ha->fce, 0, 3969 fce_calc_size(ha->fce_bufs)); 3970 rval = qla2x00_enable_fce_trace(vha, 3971 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 3972 &ha->fce_bufs); 3973 if (rval) { 3974 ql_log(ql_log_warn, vha, 0x8033, 3975 "Unable to reinitialize FCE " 3976 "(%d).\n", rval); 3977 ha->flags.fce_enabled = 0; 3978 } 3979 } 3980 3981 if (ha->eft) { 3982 memset(ha->eft, 0, EFT_SIZE); 3983 rval = qla2x00_enable_eft_trace(vha, 3984 ha->eft_dma, EFT_NUM_BUFFERS); 3985 if (rval) { 3986 ql_log(ql_log_warn, vha, 0x8034, 3987 "Unable to reinitialize EFT " 3988 "(%d).\n", rval); 3989 } 3990 } 3991 } else { /* failed the ISP abort */ 3992 vha->flags.online = 1; 3993 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 3994 if (ha->isp_abort_cnt == 0) { 3995 ql_log(ql_log_fatal, vha, 0x8035, 3996 "ISP error recover failed - " 3997 "board disabled.\n"); 3998 /* 3999 * The next call disables the board 4000 * completely. 4001 */ 4002 ha->isp_ops->reset_adapter(vha); 4003 vha->flags.online = 0; 4004 clear_bit(ISP_ABORT_RETRY, 4005 &vha->dpc_flags); 4006 status = 0; 4007 } else { /* schedule another ISP abort */ 4008 ha->isp_abort_cnt--; 4009 ql_dbg(ql_dbg_taskm, vha, 0x8020, 4010 "ISP abort - retry remaining %d.\n", 4011 ha->isp_abort_cnt); 4012 status = 1; 4013 } 4014 } else { 4015 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 4016 ql_dbg(ql_dbg_taskm, vha, 0x8021, 4017 "ISP error recovery - retrying (%d) " 4018 "more times.\n", ha->isp_abort_cnt); 4019 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4020 status = 1; 4021 } 4022 } 4023 4024 } 4025 4026 if (!status) { 4027 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 4028 4029 spin_lock_irqsave(&ha->vport_slock, flags); 4030 list_for_each_entry(vp, &ha->vp_list, list) { 4031 if (vp->vp_idx) { 4032 atomic_inc(&vp->vref_count); 4033 spin_unlock_irqrestore(&ha->vport_slock, flags); 4034 4035 qla2x00_vp_abort_isp(vp); 4036 4037 spin_lock_irqsave(&ha->vport_slock, flags); 4038 atomic_dec(&vp->vref_count); 4039 } 4040 } 4041 spin_unlock_irqrestore(&ha->vport_slock, flags); 4042 4043 } else { 4044 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 4045 __func__); 4046 } 4047 4048 return(status); 4049 } 4050 4051 /* 4052 * qla2x00_restart_isp 4053 * restarts the ISP after a reset 4054 * 4055 * Input: 4056 * ha = adapter block pointer. 4057 * 4058 * Returns: 4059 * 0 = success 4060 */ 4061 static int 4062 qla2x00_restart_isp(scsi_qla_host_t *vha) 4063 { 4064 int status = 0; 4065 uint32_t wait_time; 4066 struct qla_hw_data *ha = vha->hw; 4067 struct req_que *req = ha->req_q_map[0]; 4068 struct rsp_que *rsp = ha->rsp_q_map[0]; 4069 4070 /* If firmware needs to be loaded */ 4071 if (qla2x00_isp_firmware(vha)) { 4072 vha->flags.online = 0; 4073 status = ha->isp_ops->chip_diag(vha); 4074 if (!status) 4075 status = qla2x00_setup_chip(vha); 4076 } 4077 4078 if (!status && !(status = qla2x00_init_rings(vha))) { 4079 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4080 ha->flags.chip_reset_done = 1; 4081 /* Initialize the queues in use */ 4082 qla25xx_init_queues(ha); 4083 4084 status = qla2x00_fw_ready(vha); 4085 if (!status) { 4086 ql_dbg(ql_dbg_taskm, vha, 0x8031, 4087 "Start configure loop status = %d.\n", status); 4088 4089 /* Issue a marker after FW becomes ready. */ 4090 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 4091 4092 vha->flags.online = 1; 4093 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 4094 wait_time = 256; 4095 do { 4096 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4097 qla2x00_configure_loop(vha); 4098 wait_time--; 4099 } while (!atomic_read(&vha->loop_down_timer) && 4100 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4101 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 4102 &vha->dpc_flags))); 4103 } 4104 4105 /* if no cable then assume it's good */ 4106 if ((vha->device_flags & DFLG_NO_CABLE)) 4107 status = 0; 4108 4109 ql_dbg(ql_dbg_taskm, vha, 0x8032, 4110 "Configure loop done, status = 0x%x.\n", status); 4111 } 4112 return (status); 4113 } 4114 4115 static int 4116 qla25xx_init_queues(struct qla_hw_data *ha) 4117 { 4118 struct rsp_que *rsp = NULL; 4119 struct req_que *req = NULL; 4120 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 4121 int ret = -1; 4122 int i; 4123 4124 for (i = 1; i < ha->max_rsp_queues; i++) { 4125 rsp = ha->rsp_q_map[i]; 4126 if (rsp) { 4127 rsp->options &= ~BIT_0; 4128 ret = qla25xx_init_rsp_que(base_vha, rsp); 4129 if (ret != QLA_SUCCESS) 4130 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 4131 "%s Rsp que: %d init failed.\n", 4132 __func__, rsp->id); 4133 else 4134 ql_dbg(ql_dbg_init, base_vha, 0x0100, 4135 "%s Rsp que: %d inited.\n", 4136 __func__, rsp->id); 4137 } 4138 } 4139 for (i = 1; i < ha->max_req_queues; i++) { 4140 req = ha->req_q_map[i]; 4141 if (req) { 4142 /* Clear outstanding commands array. */ 4143 req->options &= ~BIT_0; 4144 ret = qla25xx_init_req_que(base_vha, req); 4145 if (ret != QLA_SUCCESS) 4146 ql_dbg(ql_dbg_init, base_vha, 0x0101, 4147 "%s Req que: %d init failed.\n", 4148 __func__, req->id); 4149 else 4150 ql_dbg(ql_dbg_init, base_vha, 0x0102, 4151 "%s Req que: %d inited.\n", 4152 __func__, req->id); 4153 } 4154 } 4155 return ret; 4156 } 4157 4158 /* 4159 * qla2x00_reset_adapter 4160 * Reset adapter. 4161 * 4162 * Input: 4163 * ha = adapter block pointer. 4164 */ 4165 void 4166 qla2x00_reset_adapter(scsi_qla_host_t *vha) 4167 { 4168 unsigned long flags = 0; 4169 struct qla_hw_data *ha = vha->hw; 4170 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4171 4172 vha->flags.online = 0; 4173 ha->isp_ops->disable_intrs(ha); 4174 4175 spin_lock_irqsave(&ha->hardware_lock, flags); 4176 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 4177 RD_REG_WORD(®->hccr); /* PCI Posting. */ 4178 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 4179 RD_REG_WORD(®->hccr); /* PCI Posting. */ 4180 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4181 } 4182 4183 void 4184 qla24xx_reset_adapter(scsi_qla_host_t *vha) 4185 { 4186 unsigned long flags = 0; 4187 struct qla_hw_data *ha = vha->hw; 4188 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 4189 4190 if (IS_QLA82XX(ha)) 4191 return; 4192 4193 vha->flags.online = 0; 4194 ha->isp_ops->disable_intrs(ha); 4195 4196 spin_lock_irqsave(&ha->hardware_lock, flags); 4197 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 4198 RD_REG_DWORD(®->hccr); 4199 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 4200 RD_REG_DWORD(®->hccr); 4201 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4202 4203 if (IS_NOPOLLING_TYPE(ha)) 4204 ha->isp_ops->enable_intrs(ha); 4205 } 4206 4207 /* On sparc systems, obtain port and node WWN from firmware 4208 * properties. 4209 */ 4210 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 4211 struct nvram_24xx *nv) 4212 { 4213 #ifdef CONFIG_SPARC 4214 struct qla_hw_data *ha = vha->hw; 4215 struct pci_dev *pdev = ha->pdev; 4216 struct device_node *dp = pci_device_to_OF_node(pdev); 4217 const u8 *val; 4218 int len; 4219 4220 val = of_get_property(dp, "port-wwn", &len); 4221 if (val && len >= WWN_SIZE) 4222 memcpy(nv->port_name, val, WWN_SIZE); 4223 4224 val = of_get_property(dp, "node-wwn", &len); 4225 if (val && len >= WWN_SIZE) 4226 memcpy(nv->node_name, val, WWN_SIZE); 4227 #endif 4228 } 4229 4230 int 4231 qla24xx_nvram_config(scsi_qla_host_t *vha) 4232 { 4233 int rval; 4234 struct init_cb_24xx *icb; 4235 struct nvram_24xx *nv; 4236 uint32_t *dptr; 4237 uint8_t *dptr1, *dptr2; 4238 uint32_t chksum; 4239 uint16_t cnt; 4240 struct qla_hw_data *ha = vha->hw; 4241 4242 rval = QLA_SUCCESS; 4243 icb = (struct init_cb_24xx *)ha->init_cb; 4244 nv = ha->nvram; 4245 4246 /* Determine NVRAM starting address. */ 4247 if (ha->flags.port0) { 4248 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 4249 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 4250 } else { 4251 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 4252 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 4253 } 4254 ha->nvram_size = sizeof(struct nvram_24xx); 4255 ha->vpd_size = FA_NVRAM_VPD_SIZE; 4256 if (IS_QLA82XX(ha)) 4257 ha->vpd_size = FA_VPD_SIZE_82XX; 4258 4259 /* Get VPD data into cache */ 4260 ha->vpd = ha->nvram + VPD_OFFSET; 4261 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 4262 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 4263 4264 /* Get NVRAM data into cache and calculate checksum. */ 4265 dptr = (uint32_t *)nv; 4266 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 4267 ha->nvram_size); 4268 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 4269 chksum += le32_to_cpu(*dptr++); 4270 4271 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 4272 "Contents of NVRAM\n"); 4273 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 4274 (uint8_t *)nv, ha->nvram_size); 4275 4276 /* Bad NVRAM data, set defaults parameters. */ 4277 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 4278 || nv->id[3] != ' ' || 4279 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 4280 /* Reset NVRAM data. */ 4281 ql_log(ql_log_warn, vha, 0x006b, 4282 "Inconisistent NVRAM detected: checksum=0x%x id=%c " 4283 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 4284 ql_log(ql_log_warn, vha, 0x006c, 4285 "Falling back to functioning (yet invalid -- WWPN) " 4286 "defaults.\n"); 4287 4288 /* 4289 * Set default initialization control block. 4290 */ 4291 memset(nv, 0, ha->nvram_size); 4292 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 4293 nv->version = __constant_cpu_to_le16(ICB_VERSION); 4294 nv->frame_payload_size = __constant_cpu_to_le16(2048); 4295 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 4296 nv->exchange_count = __constant_cpu_to_le16(0); 4297 nv->hard_address = __constant_cpu_to_le16(124); 4298 nv->port_name[0] = 0x21; 4299 nv->port_name[1] = 0x00 + ha->port_no; 4300 nv->port_name[2] = 0x00; 4301 nv->port_name[3] = 0xe0; 4302 nv->port_name[4] = 0x8b; 4303 nv->port_name[5] = 0x1c; 4304 nv->port_name[6] = 0x55; 4305 nv->port_name[7] = 0x86; 4306 nv->node_name[0] = 0x20; 4307 nv->node_name[1] = 0x00; 4308 nv->node_name[2] = 0x00; 4309 nv->node_name[3] = 0xe0; 4310 nv->node_name[4] = 0x8b; 4311 nv->node_name[5] = 0x1c; 4312 nv->node_name[6] = 0x55; 4313 nv->node_name[7] = 0x86; 4314 qla24xx_nvram_wwn_from_ofw(vha, nv); 4315 nv->login_retry_count = __constant_cpu_to_le16(8); 4316 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 4317 nv->login_timeout = __constant_cpu_to_le16(0); 4318 nv->firmware_options_1 = 4319 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 4320 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 4321 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 4322 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 4323 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 4324 nv->efi_parameters = __constant_cpu_to_le32(0); 4325 nv->reset_delay = 5; 4326 nv->max_luns_per_target = __constant_cpu_to_le16(128); 4327 nv->port_down_retry_count = __constant_cpu_to_le16(30); 4328 nv->link_down_timeout = __constant_cpu_to_le16(30); 4329 4330 rval = 1; 4331 } 4332 4333 /* Reset Initialization control block */ 4334 memset(icb, 0, ha->init_cb_size); 4335 4336 /* Copy 1st segment. */ 4337 dptr1 = (uint8_t *)icb; 4338 dptr2 = (uint8_t *)&nv->version; 4339 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 4340 while (cnt--) 4341 *dptr1++ = *dptr2++; 4342 4343 icb->login_retry_count = nv->login_retry_count; 4344 icb->link_down_on_nos = nv->link_down_on_nos; 4345 4346 /* Copy 2nd segment. */ 4347 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 4348 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 4349 cnt = (uint8_t *)&icb->reserved_3 - 4350 (uint8_t *)&icb->interrupt_delay_timer; 4351 while (cnt--) 4352 *dptr1++ = *dptr2++; 4353 4354 /* 4355 * Setup driver NVRAM options. 4356 */ 4357 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 4358 "QLA2462"); 4359 4360 /* Use alternate WWN? */ 4361 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 4362 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4363 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4364 } 4365 4366 /* Prepare nodename */ 4367 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 4368 /* 4369 * Firmware will apply the following mask if the nodename was 4370 * not provided. 4371 */ 4372 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4373 icb->node_name[0] &= 0xF0; 4374 } 4375 4376 /* Set host adapter parameters. */ 4377 ha->flags.disable_risc_code_load = 0; 4378 ha->flags.enable_lip_reset = 0; 4379 ha->flags.enable_lip_full_login = 4380 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 4381 ha->flags.enable_target_reset = 4382 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 4383 ha->flags.enable_led_scheme = 0; 4384 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 4385 4386 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 4387 (BIT_6 | BIT_5 | BIT_4)) >> 4; 4388 4389 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 4390 sizeof(ha->fw_seriallink_options24)); 4391 4392 /* save HBA serial number */ 4393 ha->serial0 = icb->port_name[5]; 4394 ha->serial1 = icb->port_name[6]; 4395 ha->serial2 = icb->port_name[7]; 4396 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4397 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4398 4399 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 4400 4401 ha->retry_count = le16_to_cpu(nv->login_retry_count); 4402 4403 /* Set minimum login_timeout to 4 seconds. */ 4404 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 4405 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 4406 if (le16_to_cpu(nv->login_timeout) < 4) 4407 nv->login_timeout = __constant_cpu_to_le16(4); 4408 ha->login_timeout = le16_to_cpu(nv->login_timeout); 4409 icb->login_timeout = nv->login_timeout; 4410 4411 /* Set minimum RATOV to 100 tenths of a second. */ 4412 ha->r_a_tov = 100; 4413 4414 ha->loop_reset_delay = nv->reset_delay; 4415 4416 /* Link Down Timeout = 0: 4417 * 4418 * When Port Down timer expires we will start returning 4419 * I/O's to OS with "DID_NO_CONNECT". 4420 * 4421 * Link Down Timeout != 0: 4422 * 4423 * The driver waits for the link to come up after link down 4424 * before returning I/Os to OS with "DID_NO_CONNECT". 4425 */ 4426 if (le16_to_cpu(nv->link_down_timeout) == 0) { 4427 ha->loop_down_abort_time = 4428 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4429 } else { 4430 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 4431 ha->loop_down_abort_time = 4432 (LOOP_DOWN_TIME - ha->link_down_timeout); 4433 } 4434 4435 /* Need enough time to try and get the port back. */ 4436 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 4437 if (qlport_down_retry) 4438 ha->port_down_retry_count = qlport_down_retry; 4439 4440 /* Set login_retry_count */ 4441 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 4442 if (ha->port_down_retry_count == 4443 le16_to_cpu(nv->port_down_retry_count) && 4444 ha->port_down_retry_count > 3) 4445 ha->login_retry_count = ha->port_down_retry_count; 4446 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4447 ha->login_retry_count = ha->port_down_retry_count; 4448 if (ql2xloginretrycount) 4449 ha->login_retry_count = ql2xloginretrycount; 4450 4451 /* Enable ZIO. */ 4452 if (!vha->flags.init_done) { 4453 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 4454 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4455 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 4456 le16_to_cpu(icb->interrupt_delay_timer): 2; 4457 } 4458 icb->firmware_options_2 &= __constant_cpu_to_le32( 4459 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 4460 vha->flags.process_response_queue = 0; 4461 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4462 ha->zio_mode = QLA_ZIO_MODE_6; 4463 4464 ql_log(ql_log_info, vha, 0x006f, 4465 "ZIO mode %d enabled; timer delay (%d us).\n", 4466 ha->zio_mode, ha->zio_timer * 100); 4467 4468 icb->firmware_options_2 |= cpu_to_le32( 4469 (uint32_t)ha->zio_mode); 4470 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 4471 vha->flags.process_response_queue = 1; 4472 } 4473 4474 if (rval) { 4475 ql_log(ql_log_warn, vha, 0x0070, 4476 "NVRAM configuration failed.\n"); 4477 } 4478 return (rval); 4479 } 4480 4481 static int 4482 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 4483 uint32_t faddr) 4484 { 4485 int rval = QLA_SUCCESS; 4486 int segments, fragment; 4487 uint32_t *dcode, dlen; 4488 uint32_t risc_addr; 4489 uint32_t risc_size; 4490 uint32_t i; 4491 struct qla_hw_data *ha = vha->hw; 4492 struct req_que *req = ha->req_q_map[0]; 4493 4494 ql_dbg(ql_dbg_init, vha, 0x008b, 4495 "FW: Loading firmware from flash (%x).\n", faddr); 4496 4497 rval = QLA_SUCCESS; 4498 4499 segments = FA_RISC_CODE_SEGMENTS; 4500 dcode = (uint32_t *)req->ring; 4501 *srisc_addr = 0; 4502 4503 /* Validate firmware image by checking version. */ 4504 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 4505 for (i = 0; i < 4; i++) 4506 dcode[i] = be32_to_cpu(dcode[i]); 4507 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 4508 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 4509 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 4510 dcode[3] == 0)) { 4511 ql_log(ql_log_fatal, vha, 0x008c, 4512 "Unable to verify the integrity of flash firmware " 4513 "image.\n"); 4514 ql_log(ql_log_fatal, vha, 0x008d, 4515 "Firmware data: %08x %08x %08x %08x.\n", 4516 dcode[0], dcode[1], dcode[2], dcode[3]); 4517 4518 return QLA_FUNCTION_FAILED; 4519 } 4520 4521 while (segments && rval == QLA_SUCCESS) { 4522 /* Read segment's load information. */ 4523 qla24xx_read_flash_data(vha, dcode, faddr, 4); 4524 4525 risc_addr = be32_to_cpu(dcode[2]); 4526 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 4527 risc_size = be32_to_cpu(dcode[3]); 4528 4529 fragment = 0; 4530 while (risc_size > 0 && rval == QLA_SUCCESS) { 4531 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 4532 if (dlen > risc_size) 4533 dlen = risc_size; 4534 4535 ql_dbg(ql_dbg_init, vha, 0x008e, 4536 "Loading risc segment@ risc addr %x " 4537 "number of dwords 0x%x offset 0x%x.\n", 4538 risc_addr, dlen, faddr); 4539 4540 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 4541 for (i = 0; i < dlen; i++) 4542 dcode[i] = swab32(dcode[i]); 4543 4544 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4545 dlen); 4546 if (rval) { 4547 ql_log(ql_log_fatal, vha, 0x008f, 4548 "Failed to load segment %d of firmware.\n", 4549 fragment); 4550 break; 4551 } 4552 4553 faddr += dlen; 4554 risc_addr += dlen; 4555 risc_size -= dlen; 4556 fragment++; 4557 } 4558 4559 /* Next segment. */ 4560 segments--; 4561 } 4562 4563 return rval; 4564 } 4565 4566 #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" 4567 4568 int 4569 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4570 { 4571 int rval; 4572 int i, fragment; 4573 uint16_t *wcode, *fwcode; 4574 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 4575 struct fw_blob *blob; 4576 struct qla_hw_data *ha = vha->hw; 4577 struct req_que *req = ha->req_q_map[0]; 4578 4579 /* Load firmware blob. */ 4580 blob = qla2x00_request_firmware(vha); 4581 if (!blob) { 4582 ql_log(ql_log_info, vha, 0x0083, 4583 "Fimware image unavailable.\n"); 4584 ql_log(ql_log_info, vha, 0x0084, 4585 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 4586 return QLA_FUNCTION_FAILED; 4587 } 4588 4589 rval = QLA_SUCCESS; 4590 4591 wcode = (uint16_t *)req->ring; 4592 *srisc_addr = 0; 4593 fwcode = (uint16_t *)blob->fw->data; 4594 fwclen = 0; 4595 4596 /* Validate firmware image by checking version. */ 4597 if (blob->fw->size < 8 * sizeof(uint16_t)) { 4598 ql_log(ql_log_fatal, vha, 0x0085, 4599 "Unable to verify integrity of firmware image (%Zd).\n", 4600 blob->fw->size); 4601 goto fail_fw_integrity; 4602 } 4603 for (i = 0; i < 4; i++) 4604 wcode[i] = be16_to_cpu(fwcode[i + 4]); 4605 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 4606 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 4607 wcode[2] == 0 && wcode[3] == 0)) { 4608 ql_log(ql_log_fatal, vha, 0x0086, 4609 "Unable to verify integrity of firmware image.\n"); 4610 ql_log(ql_log_fatal, vha, 0x0087, 4611 "Firmware data: %04x %04x %04x %04x.\n", 4612 wcode[0], wcode[1], wcode[2], wcode[3]); 4613 goto fail_fw_integrity; 4614 } 4615 4616 seg = blob->segs; 4617 while (*seg && rval == QLA_SUCCESS) { 4618 risc_addr = *seg; 4619 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 4620 risc_size = be16_to_cpu(fwcode[3]); 4621 4622 /* Validate firmware image size. */ 4623 fwclen += risc_size * sizeof(uint16_t); 4624 if (blob->fw->size < fwclen) { 4625 ql_log(ql_log_fatal, vha, 0x0088, 4626 "Unable to verify integrity of firmware image " 4627 "(%Zd).\n", blob->fw->size); 4628 goto fail_fw_integrity; 4629 } 4630 4631 fragment = 0; 4632 while (risc_size > 0 && rval == QLA_SUCCESS) { 4633 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 4634 if (wlen > risc_size) 4635 wlen = risc_size; 4636 ql_dbg(ql_dbg_init, vha, 0x0089, 4637 "Loading risc segment@ risc addr %x number of " 4638 "words 0x%x.\n", risc_addr, wlen); 4639 4640 for (i = 0; i < wlen; i++) 4641 wcode[i] = swab16(fwcode[i]); 4642 4643 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4644 wlen); 4645 if (rval) { 4646 ql_log(ql_log_fatal, vha, 0x008a, 4647 "Failed to load segment %d of firmware.\n", 4648 fragment); 4649 break; 4650 } 4651 4652 fwcode += wlen; 4653 risc_addr += wlen; 4654 risc_size -= wlen; 4655 fragment++; 4656 } 4657 4658 /* Next segment. */ 4659 seg++; 4660 } 4661 return rval; 4662 4663 fail_fw_integrity: 4664 return QLA_FUNCTION_FAILED; 4665 } 4666 4667 static int 4668 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4669 { 4670 int rval; 4671 int segments, fragment; 4672 uint32_t *dcode, dlen; 4673 uint32_t risc_addr; 4674 uint32_t risc_size; 4675 uint32_t i; 4676 struct fw_blob *blob; 4677 uint32_t *fwcode, fwclen; 4678 struct qla_hw_data *ha = vha->hw; 4679 struct req_que *req = ha->req_q_map[0]; 4680 4681 /* Load firmware blob. */ 4682 blob = qla2x00_request_firmware(vha); 4683 if (!blob) { 4684 ql_log(ql_log_warn, vha, 0x0090, 4685 "Fimware image unavailable.\n"); 4686 ql_log(ql_log_warn, vha, 0x0091, 4687 "Firmware images can be retrieved from: " 4688 QLA_FW_URL ".\n"); 4689 4690 return QLA_FUNCTION_FAILED; 4691 } 4692 4693 ql_dbg(ql_dbg_init, vha, 0x0092, 4694 "FW: Loading via request-firmware.\n"); 4695 4696 rval = QLA_SUCCESS; 4697 4698 segments = FA_RISC_CODE_SEGMENTS; 4699 dcode = (uint32_t *)req->ring; 4700 *srisc_addr = 0; 4701 fwcode = (uint32_t *)blob->fw->data; 4702 fwclen = 0; 4703 4704 /* Validate firmware image by checking version. */ 4705 if (blob->fw->size < 8 * sizeof(uint32_t)) { 4706 ql_log(ql_log_fatal, vha, 0x0093, 4707 "Unable to verify integrity of firmware image (%Zd).\n", 4708 blob->fw->size); 4709 goto fail_fw_integrity; 4710 } 4711 for (i = 0; i < 4; i++) 4712 dcode[i] = be32_to_cpu(fwcode[i + 4]); 4713 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 4714 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 4715 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 4716 dcode[3] == 0)) { 4717 ql_log(ql_log_fatal, vha, 0x0094, 4718 "Unable to verify integrity of firmware image (%Zd).\n", 4719 blob->fw->size); 4720 ql_log(ql_log_fatal, vha, 0x0095, 4721 "Firmware data: %08x %08x %08x %08x.\n", 4722 dcode[0], dcode[1], dcode[2], dcode[3]); 4723 goto fail_fw_integrity; 4724 } 4725 4726 while (segments && rval == QLA_SUCCESS) { 4727 risc_addr = be32_to_cpu(fwcode[2]); 4728 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 4729 risc_size = be32_to_cpu(fwcode[3]); 4730 4731 /* Validate firmware image size. */ 4732 fwclen += risc_size * sizeof(uint32_t); 4733 if (blob->fw->size < fwclen) { 4734 ql_log(ql_log_fatal, vha, 0x0096, 4735 "Unable to verify integrity of firmware image " 4736 "(%Zd).\n", blob->fw->size); 4737 4738 goto fail_fw_integrity; 4739 } 4740 4741 fragment = 0; 4742 while (risc_size > 0 && rval == QLA_SUCCESS) { 4743 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 4744 if (dlen > risc_size) 4745 dlen = risc_size; 4746 4747 ql_dbg(ql_dbg_init, vha, 0x0097, 4748 "Loading risc segment@ risc addr %x " 4749 "number of dwords 0x%x.\n", risc_addr, dlen); 4750 4751 for (i = 0; i < dlen; i++) 4752 dcode[i] = swab32(fwcode[i]); 4753 4754 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4755 dlen); 4756 if (rval) { 4757 ql_log(ql_log_fatal, vha, 0x0098, 4758 "Failed to load segment %d of firmware.\n", 4759 fragment); 4760 break; 4761 } 4762 4763 fwcode += dlen; 4764 risc_addr += dlen; 4765 risc_size -= dlen; 4766 fragment++; 4767 } 4768 4769 /* Next segment. */ 4770 segments--; 4771 } 4772 return rval; 4773 4774 fail_fw_integrity: 4775 return QLA_FUNCTION_FAILED; 4776 } 4777 4778 int 4779 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4780 { 4781 int rval; 4782 4783 if (ql2xfwloadbin == 1) 4784 return qla81xx_load_risc(vha, srisc_addr); 4785 4786 /* 4787 * FW Load priority: 4788 * 1) Firmware via request-firmware interface (.bin file). 4789 * 2) Firmware residing in flash. 4790 */ 4791 rval = qla24xx_load_risc_blob(vha, srisc_addr); 4792 if (rval == QLA_SUCCESS) 4793 return rval; 4794 4795 return qla24xx_load_risc_flash(vha, srisc_addr, 4796 vha->hw->flt_region_fw); 4797 } 4798 4799 int 4800 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4801 { 4802 int rval; 4803 struct qla_hw_data *ha = vha->hw; 4804 4805 if (ql2xfwloadbin == 2) 4806 goto try_blob_fw; 4807 4808 /* 4809 * FW Load priority: 4810 * 1) Firmware residing in flash. 4811 * 2) Firmware via request-firmware interface (.bin file). 4812 * 3) Golden-Firmware residing in flash -- limited operation. 4813 */ 4814 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 4815 if (rval == QLA_SUCCESS) 4816 return rval; 4817 4818 try_blob_fw: 4819 rval = qla24xx_load_risc_blob(vha, srisc_addr); 4820 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 4821 return rval; 4822 4823 ql_log(ql_log_info, vha, 0x0099, 4824 "Attempting to fallback to golden firmware.\n"); 4825 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 4826 if (rval != QLA_SUCCESS) 4827 return rval; 4828 4829 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 4830 ha->flags.running_gold_fw = 1; 4831 return rval; 4832 } 4833 4834 void 4835 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 4836 { 4837 int ret, retries; 4838 struct qla_hw_data *ha = vha->hw; 4839 4840 if (ha->flags.pci_channel_io_perm_failure) 4841 return; 4842 if (!IS_FWI2_CAPABLE(ha)) 4843 return; 4844 if (!ha->fw_major_version) 4845 return; 4846 4847 ret = qla2x00_stop_firmware(vha); 4848 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 4849 ret != QLA_INVALID_COMMAND && retries ; retries--) { 4850 ha->isp_ops->reset_chip(vha); 4851 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 4852 continue; 4853 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 4854 continue; 4855 ql_log(ql_log_info, vha, 0x8015, 4856 "Attempting retry of stop-firmware command.\n"); 4857 ret = qla2x00_stop_firmware(vha); 4858 } 4859 } 4860 4861 int 4862 qla24xx_configure_vhba(scsi_qla_host_t *vha) 4863 { 4864 int rval = QLA_SUCCESS; 4865 int rval2; 4866 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4867 struct qla_hw_data *ha = vha->hw; 4868 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 4869 struct req_que *req; 4870 struct rsp_que *rsp; 4871 4872 if (!vha->vp_idx) 4873 return -EINVAL; 4874 4875 rval = qla2x00_fw_ready(base_vha); 4876 if (ha->flags.cpu_affinity_enabled) 4877 req = ha->req_q_map[0]; 4878 else 4879 req = vha->req; 4880 rsp = req->rsp; 4881 4882 if (rval == QLA_SUCCESS) { 4883 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4884 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 4885 } 4886 4887 vha->flags.management_server_logged_in = 0; 4888 4889 /* Login to SNS first */ 4890 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 4891 BIT_1); 4892 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 4893 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 4894 ql_dbg(ql_dbg_init, vha, 0x0120, 4895 "Failed SNS login: loop_id=%x, rval2=%d\n", 4896 NPH_SNS, rval2); 4897 else 4898 ql_dbg(ql_dbg_init, vha, 0x0103, 4899 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 4900 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 4901 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 4902 return (QLA_FUNCTION_FAILED); 4903 } 4904 4905 atomic_set(&vha->loop_down_timer, 0); 4906 atomic_set(&vha->loop_state, LOOP_UP); 4907 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4908 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4909 rval = qla2x00_loop_resync(base_vha); 4910 4911 return rval; 4912 } 4913 4914 /* 84XX Support **************************************************************/ 4915 4916 static LIST_HEAD(qla_cs84xx_list); 4917 static DEFINE_MUTEX(qla_cs84xx_mutex); 4918 4919 static struct qla_chip_state_84xx * 4920 qla84xx_get_chip(struct scsi_qla_host *vha) 4921 { 4922 struct qla_chip_state_84xx *cs84xx; 4923 struct qla_hw_data *ha = vha->hw; 4924 4925 mutex_lock(&qla_cs84xx_mutex); 4926 4927 /* Find any shared 84xx chip. */ 4928 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 4929 if (cs84xx->bus == ha->pdev->bus) { 4930 kref_get(&cs84xx->kref); 4931 goto done; 4932 } 4933 } 4934 4935 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 4936 if (!cs84xx) 4937 goto done; 4938 4939 kref_init(&cs84xx->kref); 4940 spin_lock_init(&cs84xx->access_lock); 4941 mutex_init(&cs84xx->fw_update_mutex); 4942 cs84xx->bus = ha->pdev->bus; 4943 4944 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 4945 done: 4946 mutex_unlock(&qla_cs84xx_mutex); 4947 return cs84xx; 4948 } 4949 4950 static void 4951 __qla84xx_chip_release(struct kref *kref) 4952 { 4953 struct qla_chip_state_84xx *cs84xx = 4954 container_of(kref, struct qla_chip_state_84xx, kref); 4955 4956 mutex_lock(&qla_cs84xx_mutex); 4957 list_del(&cs84xx->list); 4958 mutex_unlock(&qla_cs84xx_mutex); 4959 kfree(cs84xx); 4960 } 4961 4962 void 4963 qla84xx_put_chip(struct scsi_qla_host *vha) 4964 { 4965 struct qla_hw_data *ha = vha->hw; 4966 if (ha->cs84xx) 4967 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 4968 } 4969 4970 static int 4971 qla84xx_init_chip(scsi_qla_host_t *vha) 4972 { 4973 int rval; 4974 uint16_t status[2]; 4975 struct qla_hw_data *ha = vha->hw; 4976 4977 mutex_lock(&ha->cs84xx->fw_update_mutex); 4978 4979 rval = qla84xx_verify_chip(vha, status); 4980 4981 mutex_unlock(&ha->cs84xx->fw_update_mutex); 4982 4983 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 4984 QLA_SUCCESS; 4985 } 4986 4987 /* 81XX Support **************************************************************/ 4988 4989 int 4990 qla81xx_nvram_config(scsi_qla_host_t *vha) 4991 { 4992 int rval; 4993 struct init_cb_81xx *icb; 4994 struct nvram_81xx *nv; 4995 uint32_t *dptr; 4996 uint8_t *dptr1, *dptr2; 4997 uint32_t chksum; 4998 uint16_t cnt; 4999 struct qla_hw_data *ha = vha->hw; 5000 5001 rval = QLA_SUCCESS; 5002 icb = (struct init_cb_81xx *)ha->init_cb; 5003 nv = ha->nvram; 5004 5005 /* Determine NVRAM starting address. */ 5006 ha->nvram_size = sizeof(struct nvram_81xx); 5007 ha->vpd_size = FA_NVRAM_VPD_SIZE; 5008 5009 /* Get VPD data into cache */ 5010 ha->vpd = ha->nvram + VPD_OFFSET; 5011 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 5012 ha->vpd_size); 5013 5014 /* Get NVRAM data into cache and calculate checksum. */ 5015 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 5016 ha->nvram_size); 5017 dptr = (uint32_t *)nv; 5018 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 5019 chksum += le32_to_cpu(*dptr++); 5020 5021 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 5022 "Contents of NVRAM:\n"); 5023 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 5024 (uint8_t *)nv, ha->nvram_size); 5025 5026 /* Bad NVRAM data, set defaults parameters. */ 5027 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 5028 || nv->id[3] != ' ' || 5029 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 5030 /* Reset NVRAM data. */ 5031 ql_log(ql_log_info, vha, 0x0073, 5032 "Inconisistent NVRAM detected: checksum=0x%x id=%c " 5033 "version=0x%x.\n", chksum, nv->id[0], 5034 le16_to_cpu(nv->nvram_version)); 5035 ql_log(ql_log_info, vha, 0x0074, 5036 "Falling back to functioning (yet invalid -- WWPN) " 5037 "defaults.\n"); 5038 5039 /* 5040 * Set default initialization control block. 5041 */ 5042 memset(nv, 0, ha->nvram_size); 5043 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 5044 nv->version = __constant_cpu_to_le16(ICB_VERSION); 5045 nv->frame_payload_size = __constant_cpu_to_le16(2048); 5046 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5047 nv->exchange_count = __constant_cpu_to_le16(0); 5048 nv->port_name[0] = 0x21; 5049 nv->port_name[1] = 0x00 + ha->port_no; 5050 nv->port_name[2] = 0x00; 5051 nv->port_name[3] = 0xe0; 5052 nv->port_name[4] = 0x8b; 5053 nv->port_name[5] = 0x1c; 5054 nv->port_name[6] = 0x55; 5055 nv->port_name[7] = 0x86; 5056 nv->node_name[0] = 0x20; 5057 nv->node_name[1] = 0x00; 5058 nv->node_name[2] = 0x00; 5059 nv->node_name[3] = 0xe0; 5060 nv->node_name[4] = 0x8b; 5061 nv->node_name[5] = 0x1c; 5062 nv->node_name[6] = 0x55; 5063 nv->node_name[7] = 0x86; 5064 nv->login_retry_count = __constant_cpu_to_le16(8); 5065 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 5066 nv->login_timeout = __constant_cpu_to_le16(0); 5067 nv->firmware_options_1 = 5068 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 5069 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 5070 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 5071 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 5072 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 5073 nv->efi_parameters = __constant_cpu_to_le32(0); 5074 nv->reset_delay = 5; 5075 nv->max_luns_per_target = __constant_cpu_to_le16(128); 5076 nv->port_down_retry_count = __constant_cpu_to_le16(30); 5077 nv->link_down_timeout = __constant_cpu_to_le16(180); 5078 nv->enode_mac[0] = 0x00; 5079 nv->enode_mac[1] = 0xC0; 5080 nv->enode_mac[2] = 0xDD; 5081 nv->enode_mac[3] = 0x04; 5082 nv->enode_mac[4] = 0x05; 5083 nv->enode_mac[5] = 0x06 + ha->port_no; 5084 5085 rval = 1; 5086 } 5087 5088 /* Reset Initialization control block */ 5089 memset(icb, 0, ha->init_cb_size); 5090 5091 /* Copy 1st segment. */ 5092 dptr1 = (uint8_t *)icb; 5093 dptr2 = (uint8_t *)&nv->version; 5094 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 5095 while (cnt--) 5096 *dptr1++ = *dptr2++; 5097 5098 icb->login_retry_count = nv->login_retry_count; 5099 5100 /* Copy 2nd segment. */ 5101 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 5102 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 5103 cnt = (uint8_t *)&icb->reserved_5 - 5104 (uint8_t *)&icb->interrupt_delay_timer; 5105 while (cnt--) 5106 *dptr1++ = *dptr2++; 5107 5108 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 5109 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 5110 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 5111 icb->enode_mac[0] = 0x00; 5112 icb->enode_mac[1] = 0xC0; 5113 icb->enode_mac[2] = 0xDD; 5114 icb->enode_mac[3] = 0x04; 5115 icb->enode_mac[4] = 0x05; 5116 icb->enode_mac[5] = 0x06 + ha->port_no; 5117 } 5118 5119 /* Use extended-initialization control block. */ 5120 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 5121 5122 /* 5123 * Setup driver NVRAM options. 5124 */ 5125 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 5126 "QLE8XXX"); 5127 5128 /* Use alternate WWN? */ 5129 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 5130 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5131 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5132 } 5133 5134 /* Prepare nodename */ 5135 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 5136 /* 5137 * Firmware will apply the following mask if the nodename was 5138 * not provided. 5139 */ 5140 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5141 icb->node_name[0] &= 0xF0; 5142 } 5143 5144 /* Set host adapter parameters. */ 5145 ha->flags.disable_risc_code_load = 0; 5146 ha->flags.enable_lip_reset = 0; 5147 ha->flags.enable_lip_full_login = 5148 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 5149 ha->flags.enable_target_reset = 5150 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 5151 ha->flags.enable_led_scheme = 0; 5152 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 5153 5154 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 5155 (BIT_6 | BIT_5 | BIT_4)) >> 4; 5156 5157 /* save HBA serial number */ 5158 ha->serial0 = icb->port_name[5]; 5159 ha->serial1 = icb->port_name[6]; 5160 ha->serial2 = icb->port_name[7]; 5161 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5162 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5163 5164 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5165 5166 ha->retry_count = le16_to_cpu(nv->login_retry_count); 5167 5168 /* Set minimum login_timeout to 4 seconds. */ 5169 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 5170 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 5171 if (le16_to_cpu(nv->login_timeout) < 4) 5172 nv->login_timeout = __constant_cpu_to_le16(4); 5173 ha->login_timeout = le16_to_cpu(nv->login_timeout); 5174 icb->login_timeout = nv->login_timeout; 5175 5176 /* Set minimum RATOV to 100 tenths of a second. */ 5177 ha->r_a_tov = 100; 5178 5179 ha->loop_reset_delay = nv->reset_delay; 5180 5181 /* Link Down Timeout = 0: 5182 * 5183 * When Port Down timer expires we will start returning 5184 * I/O's to OS with "DID_NO_CONNECT". 5185 * 5186 * Link Down Timeout != 0: 5187 * 5188 * The driver waits for the link to come up after link down 5189 * before returning I/Os to OS with "DID_NO_CONNECT". 5190 */ 5191 if (le16_to_cpu(nv->link_down_timeout) == 0) { 5192 ha->loop_down_abort_time = 5193 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5194 } else { 5195 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 5196 ha->loop_down_abort_time = 5197 (LOOP_DOWN_TIME - ha->link_down_timeout); 5198 } 5199 5200 /* Need enough time to try and get the port back. */ 5201 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 5202 if (qlport_down_retry) 5203 ha->port_down_retry_count = qlport_down_retry; 5204 5205 /* Set login_retry_count */ 5206 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 5207 if (ha->port_down_retry_count == 5208 le16_to_cpu(nv->port_down_retry_count) && 5209 ha->port_down_retry_count > 3) 5210 ha->login_retry_count = ha->port_down_retry_count; 5211 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5212 ha->login_retry_count = ha->port_down_retry_count; 5213 if (ql2xloginretrycount) 5214 ha->login_retry_count = ql2xloginretrycount; 5215 5216 /* if not running MSI-X we need handshaking on interrupts */ 5217 if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha)) 5218 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22); 5219 5220 /* Enable ZIO. */ 5221 if (!vha->flags.init_done) { 5222 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 5223 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5224 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 5225 le16_to_cpu(icb->interrupt_delay_timer): 2; 5226 } 5227 icb->firmware_options_2 &= __constant_cpu_to_le32( 5228 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 5229 vha->flags.process_response_queue = 0; 5230 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5231 ha->zio_mode = QLA_ZIO_MODE_6; 5232 5233 ql_log(ql_log_info, vha, 0x0075, 5234 "ZIO mode %d enabled; timer delay (%d us).\n", 5235 ha->zio_mode, 5236 ha->zio_timer * 100); 5237 5238 icb->firmware_options_2 |= cpu_to_le32( 5239 (uint32_t)ha->zio_mode); 5240 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 5241 vha->flags.process_response_queue = 1; 5242 } 5243 5244 if (rval) { 5245 ql_log(ql_log_warn, vha, 0x0076, 5246 "NVRAM configuration failed.\n"); 5247 } 5248 return (rval); 5249 } 5250 5251 int 5252 qla82xx_restart_isp(scsi_qla_host_t *vha) 5253 { 5254 int status, rval; 5255 uint32_t wait_time; 5256 struct qla_hw_data *ha = vha->hw; 5257 struct req_que *req = ha->req_q_map[0]; 5258 struct rsp_que *rsp = ha->rsp_q_map[0]; 5259 struct scsi_qla_host *vp; 5260 unsigned long flags; 5261 5262 status = qla2x00_init_rings(vha); 5263 if (!status) { 5264 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5265 ha->flags.chip_reset_done = 1; 5266 5267 status = qla2x00_fw_ready(vha); 5268 if (!status) { 5269 ql_log(ql_log_info, vha, 0x803c, 5270 "Start configure loop, status =%d.\n", status); 5271 5272 /* Issue a marker after FW becomes ready. */ 5273 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5274 5275 vha->flags.online = 1; 5276 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5277 wait_time = 256; 5278 do { 5279 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5280 qla2x00_configure_loop(vha); 5281 wait_time--; 5282 } while (!atomic_read(&vha->loop_down_timer) && 5283 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && 5284 wait_time && 5285 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); 5286 } 5287 5288 /* if no cable then assume it's good */ 5289 if ((vha->device_flags & DFLG_NO_CABLE)) 5290 status = 0; 5291 5292 ql_log(ql_log_info, vha, 0x8000, 5293 "Configure loop done, status = 0x%x.\n", status); 5294 } 5295 5296 if (!status) { 5297 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5298 5299 if (!atomic_read(&vha->loop_down_timer)) { 5300 /* 5301 * Issue marker command only when we are going 5302 * to start the I/O . 5303 */ 5304 vha->marker_needed = 1; 5305 } 5306 5307 vha->flags.online = 1; 5308 5309 ha->isp_ops->enable_intrs(ha); 5310 5311 ha->isp_abort_cnt = 0; 5312 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5313 5314 /* Update the firmware version */ 5315 status = qla82xx_check_md_needed(vha); 5316 5317 if (ha->fce) { 5318 ha->flags.fce_enabled = 1; 5319 memset(ha->fce, 0, 5320 fce_calc_size(ha->fce_bufs)); 5321 rval = qla2x00_enable_fce_trace(vha, 5322 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 5323 &ha->fce_bufs); 5324 if (rval) { 5325 ql_log(ql_log_warn, vha, 0x8001, 5326 "Unable to reinitialize FCE (%d).\n", 5327 rval); 5328 ha->flags.fce_enabled = 0; 5329 } 5330 } 5331 5332 if (ha->eft) { 5333 memset(ha->eft, 0, EFT_SIZE); 5334 rval = qla2x00_enable_eft_trace(vha, 5335 ha->eft_dma, EFT_NUM_BUFFERS); 5336 if (rval) { 5337 ql_log(ql_log_warn, vha, 0x8010, 5338 "Unable to reinitialize EFT (%d).\n", 5339 rval); 5340 } 5341 } 5342 } 5343 5344 if (!status) { 5345 ql_dbg(ql_dbg_taskm, vha, 0x8011, 5346 "qla82xx_restart_isp succeeded.\n"); 5347 5348 spin_lock_irqsave(&ha->vport_slock, flags); 5349 list_for_each_entry(vp, &ha->vp_list, list) { 5350 if (vp->vp_idx) { 5351 atomic_inc(&vp->vref_count); 5352 spin_unlock_irqrestore(&ha->vport_slock, flags); 5353 5354 qla2x00_vp_abort_isp(vp); 5355 5356 spin_lock_irqsave(&ha->vport_slock, flags); 5357 atomic_dec(&vp->vref_count); 5358 } 5359 } 5360 spin_unlock_irqrestore(&ha->vport_slock, flags); 5361 5362 } else { 5363 ql_log(ql_log_warn, vha, 0x8016, 5364 "qla82xx_restart_isp **** FAILED ****.\n"); 5365 } 5366 5367 return status; 5368 } 5369 5370 void 5371 qla81xx_update_fw_options(scsi_qla_host_t *vha) 5372 { 5373 struct qla_hw_data *ha = vha->hw; 5374 5375 if (!ql2xetsenable) 5376 return; 5377 5378 /* Enable ETS Burst. */ 5379 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 5380 ha->fw_options[2] |= BIT_9; 5381 qla2x00_set_fw_options(vha, ha->fw_options); 5382 } 5383 5384 /* 5385 * qla24xx_get_fcp_prio 5386 * Gets the fcp cmd priority value for the logged in port. 5387 * Looks for a match of the port descriptors within 5388 * each of the fcp prio config entries. If a match is found, 5389 * the tag (priority) value is returned. 5390 * 5391 * Input: 5392 * vha = scsi host structure pointer. 5393 * fcport = port structure pointer. 5394 * 5395 * Return: 5396 * non-zero (if found) 5397 * -1 (if not found) 5398 * 5399 * Context: 5400 * Kernel context 5401 */ 5402 static int 5403 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 5404 { 5405 int i, entries; 5406 uint8_t pid_match, wwn_match; 5407 int priority; 5408 uint32_t pid1, pid2; 5409 uint64_t wwn1, wwn2; 5410 struct qla_fcp_prio_entry *pri_entry; 5411 struct qla_hw_data *ha = vha->hw; 5412 5413 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 5414 return -1; 5415 5416 priority = -1; 5417 entries = ha->fcp_prio_cfg->num_entries; 5418 pri_entry = &ha->fcp_prio_cfg->entry[0]; 5419 5420 for (i = 0; i < entries; i++) { 5421 pid_match = wwn_match = 0; 5422 5423 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 5424 pri_entry++; 5425 continue; 5426 } 5427 5428 /* check source pid for a match */ 5429 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 5430 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 5431 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 5432 if (pid1 == INVALID_PORT_ID) 5433 pid_match++; 5434 else if (pid1 == pid2) 5435 pid_match++; 5436 } 5437 5438 /* check destination pid for a match */ 5439 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 5440 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 5441 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 5442 if (pid1 == INVALID_PORT_ID) 5443 pid_match++; 5444 else if (pid1 == pid2) 5445 pid_match++; 5446 } 5447 5448 /* check source WWN for a match */ 5449 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 5450 wwn1 = wwn_to_u64(vha->port_name); 5451 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 5452 if (wwn2 == (uint64_t)-1) 5453 wwn_match++; 5454 else if (wwn1 == wwn2) 5455 wwn_match++; 5456 } 5457 5458 /* check destination WWN for a match */ 5459 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 5460 wwn1 = wwn_to_u64(fcport->port_name); 5461 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 5462 if (wwn2 == (uint64_t)-1) 5463 wwn_match++; 5464 else if (wwn1 == wwn2) 5465 wwn_match++; 5466 } 5467 5468 if (pid_match == 2 || wwn_match == 2) { 5469 /* Found a matching entry */ 5470 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 5471 priority = pri_entry->tag; 5472 break; 5473 } 5474 5475 pri_entry++; 5476 } 5477 5478 return priority; 5479 } 5480 5481 /* 5482 * qla24xx_update_fcport_fcp_prio 5483 * Activates fcp priority for the logged in fc port 5484 * 5485 * Input: 5486 * vha = scsi host structure pointer. 5487 * fcp = port structure pointer. 5488 * 5489 * Return: 5490 * QLA_SUCCESS or QLA_FUNCTION_FAILED 5491 * 5492 * Context: 5493 * Kernel context. 5494 */ 5495 int 5496 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 5497 { 5498 int ret; 5499 int priority; 5500 uint16_t mb[5]; 5501 5502 if (fcport->port_type != FCT_TARGET || 5503 fcport->loop_id == FC_NO_LOOP_ID) 5504 return QLA_FUNCTION_FAILED; 5505 5506 priority = qla24xx_get_fcp_prio(vha, fcport); 5507 if (priority < 0) 5508 return QLA_FUNCTION_FAILED; 5509 5510 if (IS_QLA82XX(vha->hw)) { 5511 fcport->fcp_prio = priority & 0xf; 5512 return QLA_SUCCESS; 5513 } 5514 5515 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 5516 if (ret == QLA_SUCCESS) { 5517 if (fcport->fcp_prio != priority) 5518 ql_dbg(ql_dbg_user, vha, 0x709e, 5519 "Updated FCP_CMND priority - value=%d loop_id=%d " 5520 "port_id=%02x%02x%02x.\n", priority, 5521 fcport->loop_id, fcport->d_id.b.domain, 5522 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5523 fcport->fcp_prio = priority & 0xf; 5524 } else 5525 ql_dbg(ql_dbg_user, vha, 0x704f, 5526 "Unable to update FCP_CMND priority - ret=0x%x for " 5527 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 5528 fcport->d_id.b.domain, fcport->d_id.b.area, 5529 fcport->d_id.b.al_pa); 5530 return ret; 5531 } 5532 5533 /* 5534 * qla24xx_update_all_fcp_prio 5535 * Activates fcp priority for all the logged in ports 5536 * 5537 * Input: 5538 * ha = adapter block pointer. 5539 * 5540 * Return: 5541 * QLA_SUCCESS or QLA_FUNCTION_FAILED 5542 * 5543 * Context: 5544 * Kernel context. 5545 */ 5546 int 5547 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 5548 { 5549 int ret; 5550 fc_port_t *fcport; 5551 5552 ret = QLA_FUNCTION_FAILED; 5553 /* We need to set priority for all logged in ports */ 5554 list_for_each_entry(fcport, &vha->vp_fcports, list) 5555 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 5556 5557 return ret; 5558 } 5559