1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 scsi_qla_host_t *vha = sp->vha; 54 struct req_que *req; 55 unsigned long flags; 56 57 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 58 req = vha->hw->req_q_map[0]; 59 req->outstanding_cmds[sp->handle] = NULL; 60 iocb = &sp->u.iocb_cmd; 61 iocb->timeout(sp); 62 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 63 } 64 65 void 66 qla2x00_sp_free(void *ptr) 67 { 68 srb_t *sp = ptr; 69 struct srb_iocb *iocb = &sp->u.iocb_cmd; 70 71 del_timer(&iocb->timer); 72 qla2x00_rel_sp(sp); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (IS_QLAFX00(ha)) { 86 tmo = FX00_DEF_RATOV * 2; 87 } else if (!IS_FWI2_CAPABLE(ha)) { 88 /* 89 * Except for earlier ISPs where the timeout is seeded from the 90 * initialization control block. 91 */ 92 tmo = ha->login_timeout; 93 } 94 return tmo; 95 } 96 97 void 98 qla2x00_async_iocb_timeout(void *data) 99 { 100 srb_t *sp = data; 101 fc_port_t *fcport = sp->fcport; 102 struct srb_iocb *lio = &sp->u.iocb_cmd; 103 104 if (fcport) { 105 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 106 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 107 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 108 109 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 110 } else { 111 pr_info("Async-%s timeout - hdl=%x.\n", 112 sp->name, sp->handle); 113 } 114 115 switch (sp->type) { 116 case SRB_LOGIN_CMD: 117 /* Retry as needed. */ 118 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 119 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 120 QLA_LOGIO_LOGIN_RETRIED : 0; 121 sp->done(sp, QLA_FUNCTION_TIMEOUT); 122 break; 123 case SRB_LOGOUT_CMD: 124 case SRB_CT_PTHRU_CMD: 125 case SRB_MB_IOCB: 126 case SRB_NACK_PLOGI: 127 case SRB_NACK_PRLI: 128 case SRB_NACK_LOGO: 129 case SRB_CTRL_VP: 130 sp->done(sp, QLA_FUNCTION_TIMEOUT); 131 break; 132 } 133 } 134 135 static void 136 qla2x00_async_login_sp_done(void *ptr, int res) 137 { 138 srb_t *sp = ptr; 139 struct scsi_qla_host *vha = sp->vha; 140 struct srb_iocb *lio = &sp->u.iocb_cmd; 141 struct event_arg ea; 142 143 ql_dbg(ql_dbg_disc, vha, 0x20dd, 144 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 145 146 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 147 148 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 149 memset(&ea, 0, sizeof(ea)); 150 ea.event = FCME_PLOGI_DONE; 151 ea.fcport = sp->fcport; 152 ea.data[0] = lio->u.logio.data[0]; 153 ea.data[1] = lio->u.logio.data[1]; 154 ea.iop[0] = lio->u.logio.iop[0]; 155 ea.iop[1] = lio->u.logio.iop[1]; 156 ea.sp = sp; 157 qla2x00_fcport_event_handler(vha, &ea); 158 } 159 160 sp->free(sp); 161 } 162 163 int 164 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 165 uint16_t *data) 166 { 167 srb_t *sp; 168 struct srb_iocb *lio; 169 int rval = QLA_FUNCTION_FAILED; 170 171 if (!vha->flags.online) 172 goto done; 173 174 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 175 if (!sp) 176 goto done; 177 178 fcport->flags |= FCF_ASYNC_SENT; 179 fcport->logout_completed = 0; 180 181 fcport->disc_state = DSC_LOGIN_PEND; 182 sp->type = SRB_LOGIN_CMD; 183 sp->name = "login"; 184 sp->gen1 = fcport->rscn_gen; 185 sp->gen2 = fcport->login_gen; 186 187 lio = &sp->u.iocb_cmd; 188 lio->timeout = qla2x00_async_iocb_timeout; 189 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 190 191 sp->done = qla2x00_async_login_sp_done; 192 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 193 194 if (fcport->fc4f_nvme) 195 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 196 197 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 198 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 199 rval = qla2x00_start_sp(sp); 200 if (rval != QLA_SUCCESS) { 201 fcport->flags |= FCF_LOGIN_NEEDED; 202 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 203 goto done_free_sp; 204 } 205 206 ql_dbg(ql_dbg_disc, vha, 0x2072, 207 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 208 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 209 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 210 fcport->login_retry); 211 return rval; 212 213 done_free_sp: 214 sp->free(sp); 215 fcport->flags &= ~FCF_ASYNC_SENT; 216 done: 217 fcport->flags &= ~FCF_ASYNC_ACTIVE; 218 return rval; 219 } 220 221 static void 222 qla2x00_async_logout_sp_done(void *ptr, int res) 223 { 224 srb_t *sp = ptr; 225 226 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 227 sp->fcport->login_gen++; 228 qlt_logo_completion_handler(sp->fcport, res); 229 sp->free(sp); 230 } 231 232 int 233 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 234 { 235 srb_t *sp; 236 struct srb_iocb *lio; 237 int rval = QLA_FUNCTION_FAILED; 238 239 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 240 return rval; 241 242 fcport->flags |= FCF_ASYNC_SENT; 243 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 244 if (!sp) 245 goto done; 246 247 sp->type = SRB_LOGOUT_CMD; 248 sp->name = "logout"; 249 250 lio = &sp->u.iocb_cmd; 251 lio->timeout = qla2x00_async_iocb_timeout; 252 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 253 254 sp->done = qla2x00_async_logout_sp_done; 255 rval = qla2x00_start_sp(sp); 256 if (rval != QLA_SUCCESS) 257 goto done_free_sp; 258 259 ql_dbg(ql_dbg_disc, vha, 0x2070, 260 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 261 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 262 fcport->d_id.b.area, fcport->d_id.b.al_pa, 263 fcport->port_name); 264 return rval; 265 266 done_free_sp: 267 sp->free(sp); 268 done: 269 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 270 return rval; 271 } 272 273 void 274 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 275 uint16_t *data) 276 { 277 fcport->flags &= ~FCF_ASYNC_ACTIVE; 278 /* Don't re-login in target mode */ 279 if (!fcport->tgt_session) 280 qla2x00_mark_device_lost(vha, fcport, 1, 0); 281 qlt_logo_completion_handler(fcport, data[0]); 282 } 283 284 static void 285 qla2x00_async_prlo_sp_done(void *s, int res) 286 { 287 srb_t *sp = (srb_t *)s; 288 struct srb_iocb *lio = &sp->u.iocb_cmd; 289 struct scsi_qla_host *vha = sp->vha; 290 291 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 292 if (!test_bit(UNLOADING, &vha->dpc_flags)) 293 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 294 lio->u.logio.data); 295 sp->free(sp); 296 } 297 298 int 299 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 300 { 301 srb_t *sp; 302 struct srb_iocb *lio; 303 int rval; 304 305 rval = QLA_FUNCTION_FAILED; 306 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 307 if (!sp) 308 goto done; 309 310 sp->type = SRB_PRLO_CMD; 311 sp->name = "prlo"; 312 313 lio = &sp->u.iocb_cmd; 314 lio->timeout = qla2x00_async_iocb_timeout; 315 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 316 317 sp->done = qla2x00_async_prlo_sp_done; 318 rval = qla2x00_start_sp(sp); 319 if (rval != QLA_SUCCESS) 320 goto done_free_sp; 321 322 ql_dbg(ql_dbg_disc, vha, 0x2070, 323 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 324 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 325 fcport->d_id.b.area, fcport->d_id.b.al_pa); 326 return rval; 327 328 done_free_sp: 329 sp->free(sp); 330 done: 331 fcport->flags &= ~FCF_ASYNC_ACTIVE; 332 return rval; 333 } 334 335 static 336 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 337 { 338 struct fc_port *fcport = ea->fcport; 339 340 ql_dbg(ql_dbg_disc, vha, 0x20d2, 341 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 342 __func__, fcport->port_name, fcport->disc_state, 343 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 344 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 345 346 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 347 ql_dbg(ql_dbg_disc, vha, 0x2066, 348 "%s %8phC: adisc fail: post delete\n", 349 __func__, ea->fcport->port_name); 350 qlt_schedule_sess_for_deletion(ea->fcport); 351 return; 352 } 353 354 if (ea->fcport->disc_state == DSC_DELETE_PEND) 355 return; 356 357 if (ea->sp->gen2 != ea->fcport->login_gen) { 358 /* target side must have changed it. */ 359 ql_dbg(ql_dbg_disc, vha, 0x20d3, 360 "%s %8phC generation changed\n", 361 __func__, ea->fcport->port_name); 362 return; 363 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 364 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 365 __func__, __LINE__, ea->fcport->port_name); 366 qla24xx_post_gidpn_work(vha, ea->fcport); 367 return; 368 } 369 370 __qla24xx_handle_gpdb_event(vha, ea); 371 } 372 373 static void 374 qla2x00_async_adisc_sp_done(void *ptr, int res) 375 { 376 srb_t *sp = ptr; 377 struct scsi_qla_host *vha = sp->vha; 378 struct event_arg ea; 379 struct srb_iocb *lio = &sp->u.iocb_cmd; 380 381 ql_dbg(ql_dbg_disc, vha, 0x2066, 382 "Async done-%s res %x %8phC\n", 383 sp->name, res, sp->fcport->port_name); 384 385 sp->fcport->flags &= ~FCF_ASYNC_SENT; 386 387 memset(&ea, 0, sizeof(ea)); 388 ea.event = FCME_ADISC_DONE; 389 ea.rc = res; 390 ea.data[0] = lio->u.logio.data[0]; 391 ea.data[1] = lio->u.logio.data[1]; 392 ea.iop[0] = lio->u.logio.iop[0]; 393 ea.iop[1] = lio->u.logio.iop[1]; 394 ea.fcport = sp->fcport; 395 ea.sp = sp; 396 397 qla2x00_fcport_event_handler(vha, &ea); 398 399 sp->free(sp); 400 } 401 402 int 403 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 404 uint16_t *data) 405 { 406 srb_t *sp; 407 struct srb_iocb *lio; 408 int rval; 409 410 rval = QLA_FUNCTION_FAILED; 411 fcport->flags |= FCF_ASYNC_SENT; 412 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 413 if (!sp) 414 goto done; 415 416 sp->type = SRB_ADISC_CMD; 417 sp->name = "adisc"; 418 419 lio = &sp->u.iocb_cmd; 420 lio->timeout = qla2x00_async_iocb_timeout; 421 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 422 423 sp->done = qla2x00_async_adisc_sp_done; 424 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 425 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 426 rval = qla2x00_start_sp(sp); 427 if (rval != QLA_SUCCESS) 428 goto done_free_sp; 429 430 ql_dbg(ql_dbg_disc, vha, 0x206f, 431 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 432 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 433 return rval; 434 435 done_free_sp: 436 sp->free(sp); 437 done: 438 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 439 qla2x00_post_async_adisc_work(vha, fcport, data); 440 return rval; 441 } 442 443 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 444 struct event_arg *ea) 445 { 446 fc_port_t *fcport, *conflict_fcport; 447 struct get_name_list_extended *e; 448 u16 i, n, found = 0, loop_id; 449 port_id_t id; 450 u64 wwn; 451 u16 data[2]; 452 u8 current_login_state; 453 454 fcport = ea->fcport; 455 ql_dbg(ql_dbg_disc, vha, 0xffff, 456 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 457 __func__, fcport->port_name, fcport->disc_state, 458 fcport->fw_login_state, ea->rc, 459 fcport->login_gen, fcport->last_login_gen, 460 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 461 462 if (fcport->disc_state == DSC_DELETE_PEND) 463 return; 464 465 if (ea->rc) { /* rval */ 466 if (fcport->login_retry == 0) { 467 fcport->login_retry = vha->hw->login_retry_count; 468 ql_dbg(ql_dbg_disc, vha, 0x20de, 469 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 470 fcport->port_name, fcport->login_retry); 471 } 472 return; 473 } 474 475 if (fcport->last_rscn_gen != fcport->rscn_gen) { 476 ql_dbg(ql_dbg_disc, vha, 0x20df, 477 "%s %8phC rscn gen changed rscn %d|%d \n", 478 __func__, fcport->port_name, 479 fcport->last_rscn_gen, fcport->rscn_gen); 480 qla24xx_post_gidpn_work(vha, fcport); 481 return; 482 } else if (fcport->last_login_gen != fcport->login_gen) { 483 ql_dbg(ql_dbg_disc, vha, 0x20e0, 484 "%s %8phC login gen changed\n", 485 __func__, fcport->port_name); 486 return; 487 } 488 489 n = ea->data[0] / sizeof(struct get_name_list_extended); 490 491 ql_dbg(ql_dbg_disc, vha, 0x20e1, 492 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 493 __func__, __LINE__, fcport->port_name, n, 494 fcport->d_id.b.domain, fcport->d_id.b.area, 495 fcport->d_id.b.al_pa, fcport->loop_id); 496 497 for (i = 0; i < n; i++) { 498 e = &vha->gnl.l[i]; 499 wwn = wwn_to_u64(e->port_name); 500 501 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 502 continue; 503 504 found = 1; 505 id.b.domain = e->port_id[2]; 506 id.b.area = e->port_id[1]; 507 id.b.al_pa = e->port_id[0]; 508 id.b.rsvd_1 = 0; 509 510 loop_id = le16_to_cpu(e->nport_handle); 511 loop_id = (loop_id & 0x7fff); 512 513 ql_dbg(ql_dbg_disc, vha, 0x20e2, 514 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 515 __func__, fcport->port_name, 516 e->current_login_state, fcport->fw_login_state, 517 id.b.domain, id.b.area, id.b.al_pa, 518 fcport->d_id.b.domain, fcport->d_id.b.area, 519 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 520 521 if ((id.b24 != fcport->d_id.b24) || 522 ((fcport->loop_id != FC_NO_LOOP_ID) && 523 (fcport->loop_id != loop_id))) { 524 ql_dbg(ql_dbg_disc, vha, 0x20e3, 525 "%s %d %8phC post del sess\n", 526 __func__, __LINE__, fcport->port_name); 527 qlt_schedule_sess_for_deletion(fcport); 528 return; 529 } 530 531 fcport->loop_id = loop_id; 532 533 wwn = wwn_to_u64(fcport->port_name); 534 qlt_find_sess_invalidate_other(vha, wwn, 535 id, loop_id, &conflict_fcport); 536 537 if (conflict_fcport) { 538 /* 539 * Another share fcport share the same loop_id & 540 * nport id. Conflict fcport needs to finish 541 * cleanup before this fcport can proceed to login. 542 */ 543 conflict_fcport->conflict = fcport; 544 fcport->login_pause = 1; 545 } 546 547 if (fcport->fc4f_nvme) 548 current_login_state = e->current_login_state >> 4; 549 else 550 current_login_state = e->current_login_state & 0xf; 551 552 switch (current_login_state) { 553 case DSC_LS_PRLI_COMP: 554 ql_dbg(ql_dbg_disc, vha, 0x20e4, 555 "%s %d %8phC post gpdb\n", 556 __func__, __LINE__, fcport->port_name); 557 558 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 559 fcport->port_type = FCT_INITIATOR; 560 else 561 fcport->port_type = FCT_TARGET; 562 563 data[0] = data[1] = 0; 564 qla2x00_post_async_adisc_work(vha, fcport, data); 565 break; 566 case DSC_LS_PORT_UNAVAIL: 567 default: 568 if (fcport->loop_id == FC_NO_LOOP_ID) { 569 qla2x00_find_new_loop_id(vha, fcport); 570 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 571 } 572 ql_dbg(ql_dbg_disc, vha, 0x20e5, 573 "%s %d %8phC\n", 574 __func__, __LINE__, fcport->port_name); 575 qla24xx_fcport_handle_login(vha, fcport); 576 break; 577 } 578 } 579 580 if (!found) { 581 /* fw has no record of this port */ 582 for (i = 0; i < n; i++) { 583 e = &vha->gnl.l[i]; 584 id.b.domain = e->port_id[0]; 585 id.b.area = e->port_id[1]; 586 id.b.al_pa = e->port_id[2]; 587 id.b.rsvd_1 = 0; 588 loop_id = le16_to_cpu(e->nport_handle); 589 590 if (fcport->d_id.b24 == id.b24) { 591 conflict_fcport = 592 qla2x00_find_fcport_by_wwpn(vha, 593 e->port_name, 0); 594 ql_dbg(ql_dbg_disc, vha, 0x20e6, 595 "%s %d %8phC post del sess\n", 596 __func__, __LINE__, 597 conflict_fcport->port_name); 598 qlt_schedule_sess_for_deletion 599 (conflict_fcport); 600 } 601 602 /* FW already picked this loop id for another fcport */ 603 if (fcport->loop_id == loop_id) 604 fcport->loop_id = FC_NO_LOOP_ID; 605 } 606 qla24xx_fcport_handle_login(vha, fcport); 607 } 608 } /* gnl_event */ 609 610 static void 611 qla24xx_async_gnl_sp_done(void *s, int res) 612 { 613 struct srb *sp = s; 614 struct scsi_qla_host *vha = sp->vha; 615 unsigned long flags; 616 struct fc_port *fcport = NULL, *tf; 617 u16 i, n = 0, loop_id; 618 struct event_arg ea; 619 struct get_name_list_extended *e; 620 u64 wwn; 621 struct list_head h; 622 bool found = false; 623 624 ql_dbg(ql_dbg_disc, vha, 0x20e7, 625 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 626 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 627 sp->u.iocb_cmd.u.mbx.in_mb[2]); 628 629 memset(&ea, 0, sizeof(ea)); 630 ea.sp = sp; 631 ea.rc = res; 632 ea.event = FCME_GNL_DONE; 633 634 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 635 sizeof(struct get_name_list_extended)) { 636 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 637 sizeof(struct get_name_list_extended); 638 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 639 } 640 641 for (i = 0; i < n; i++) { 642 e = &vha->gnl.l[i]; 643 loop_id = le16_to_cpu(e->nport_handle); 644 /* mask out reserve bit */ 645 loop_id = (loop_id & 0x7fff); 646 set_bit(loop_id, vha->hw->loop_id_map); 647 wwn = wwn_to_u64(e->port_name); 648 649 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 650 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 651 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 652 e->port_id[0], e->current_login_state, e->last_login_state, 653 (loop_id & 0x7fff)); 654 } 655 656 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 657 658 INIT_LIST_HEAD(&h); 659 fcport = tf = NULL; 660 if (!list_empty(&vha->gnl.fcports)) 661 list_splice_init(&vha->gnl.fcports, &h); 662 663 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 664 list_del_init(&fcport->gnl_entry); 665 spin_lock(&vha->hw->tgt.sess_lock); 666 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 667 spin_unlock(&vha->hw->tgt.sess_lock); 668 ea.fcport = fcport; 669 670 qla2x00_fcport_event_handler(vha, &ea); 671 } 672 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 673 674 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 675 /* create new fcport if fw has knowledge of new sessions */ 676 for (i = 0; i < n; i++) { 677 port_id_t id; 678 u64 wwnn; 679 680 e = &vha->gnl.l[i]; 681 wwn = wwn_to_u64(e->port_name); 682 683 found = false; 684 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 685 if (!memcmp((u8 *)&wwn, fcport->port_name, 686 WWN_SIZE)) { 687 found = true; 688 break; 689 } 690 } 691 692 id.b.domain = e->port_id[2]; 693 id.b.area = e->port_id[1]; 694 id.b.al_pa = e->port_id[0]; 695 id.b.rsvd_1 = 0; 696 697 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 698 ql_dbg(ql_dbg_disc, vha, 0x2065, 699 "%s %d %8phC %06x post new sess\n", 700 __func__, __LINE__, (u8 *)&wwn, id.b24); 701 wwnn = wwn_to_u64(e->node_name); 702 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 703 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 704 } 705 } 706 707 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 708 709 sp->free(sp); 710 } 711 712 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 713 { 714 srb_t *sp; 715 struct srb_iocb *mbx; 716 int rval = QLA_FUNCTION_FAILED; 717 unsigned long flags; 718 u16 *mb; 719 720 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 721 return rval; 722 723 ql_dbg(ql_dbg_disc, vha, 0x20d9, 724 "Async-gnlist WWPN %8phC \n", fcport->port_name); 725 726 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 727 if (!list_empty(&fcport->gnl_entry)) { 728 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 729 rval = QLA_SUCCESS; 730 goto done; 731 } 732 733 spin_lock(&vha->hw->tgt.sess_lock); 734 fcport->disc_state = DSC_GNL; 735 fcport->last_rscn_gen = fcport->rscn_gen; 736 fcport->last_login_gen = fcport->login_gen; 737 spin_unlock(&vha->hw->tgt.sess_lock); 738 739 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 740 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 741 742 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 743 if (!sp) 744 goto done; 745 746 fcport->flags |= FCF_ASYNC_SENT; 747 sp->type = SRB_MB_IOCB; 748 sp->name = "gnlist"; 749 sp->gen1 = fcport->rscn_gen; 750 sp->gen2 = fcport->login_gen; 751 752 mbx = &sp->u.iocb_cmd; 753 mbx->timeout = qla2x00_async_iocb_timeout; 754 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 755 756 mb = sp->u.iocb_cmd.u.mbx.out_mb; 757 mb[0] = MBC_PORT_NODE_NAME_LIST; 758 mb[1] = BIT_2 | BIT_3; 759 mb[2] = MSW(vha->gnl.ldma); 760 mb[3] = LSW(vha->gnl.ldma); 761 mb[6] = MSW(MSD(vha->gnl.ldma)); 762 mb[7] = LSW(MSD(vha->gnl.ldma)); 763 mb[8] = vha->gnl.size; 764 mb[9] = vha->vp_idx; 765 766 sp->done = qla24xx_async_gnl_sp_done; 767 768 rval = qla2x00_start_sp(sp); 769 if (rval != QLA_SUCCESS) 770 goto done_free_sp; 771 772 ql_dbg(ql_dbg_disc, vha, 0x20da, 773 "Async-%s - OUT WWPN %8phC hndl %x\n", 774 sp->name, fcport->port_name, sp->handle); 775 776 return rval; 777 778 done_free_sp: 779 sp->free(sp); 780 fcport->flags &= ~FCF_ASYNC_SENT; 781 done: 782 return rval; 783 } 784 785 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 786 { 787 struct qla_work_evt *e; 788 789 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 790 if (!e) 791 return QLA_FUNCTION_FAILED; 792 793 e->u.fcport.fcport = fcport; 794 fcport->flags |= FCF_ASYNC_ACTIVE; 795 return qla2x00_post_work(vha, e); 796 } 797 798 static 799 void qla24xx_async_gpdb_sp_done(void *s, int res) 800 { 801 struct srb *sp = s; 802 struct scsi_qla_host *vha = sp->vha; 803 struct qla_hw_data *ha = vha->hw; 804 fc_port_t *fcport = sp->fcport; 805 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 806 struct event_arg ea; 807 808 ql_dbg(ql_dbg_disc, vha, 0x20db, 809 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 810 sp->name, res, fcport->port_name, mb[1], mb[2]); 811 812 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 813 814 memset(&ea, 0, sizeof(ea)); 815 ea.event = FCME_GPDB_DONE; 816 ea.fcport = fcport; 817 ea.sp = sp; 818 819 qla2x00_fcport_event_handler(vha, &ea); 820 821 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 822 sp->u.iocb_cmd.u.mbx.in_dma); 823 824 sp->free(sp); 825 } 826 827 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 828 { 829 struct qla_work_evt *e; 830 831 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 832 if (!e) 833 return QLA_FUNCTION_FAILED; 834 835 e->u.fcport.fcport = fcport; 836 837 return qla2x00_post_work(vha, e); 838 } 839 840 static void 841 qla2x00_async_prli_sp_done(void *ptr, int res) 842 { 843 srb_t *sp = ptr; 844 struct scsi_qla_host *vha = sp->vha; 845 struct srb_iocb *lio = &sp->u.iocb_cmd; 846 struct event_arg ea; 847 848 ql_dbg(ql_dbg_disc, vha, 0x2129, 849 "%s %8phC res %d \n", __func__, 850 sp->fcport->port_name, res); 851 852 sp->fcport->flags &= ~FCF_ASYNC_SENT; 853 854 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 855 memset(&ea, 0, sizeof(ea)); 856 ea.event = FCME_PRLI_DONE; 857 ea.fcport = sp->fcport; 858 ea.data[0] = lio->u.logio.data[0]; 859 ea.data[1] = lio->u.logio.data[1]; 860 ea.iop[0] = lio->u.logio.iop[0]; 861 ea.iop[1] = lio->u.logio.iop[1]; 862 ea.sp = sp; 863 864 qla2x00_fcport_event_handler(vha, &ea); 865 } 866 867 sp->free(sp); 868 } 869 870 int 871 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 872 { 873 srb_t *sp; 874 struct srb_iocb *lio; 875 int rval = QLA_FUNCTION_FAILED; 876 877 if (!vha->flags.online) 878 return rval; 879 880 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 881 fcport->fw_login_state == DSC_LS_PRLI_PEND) 882 return rval; 883 884 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 885 if (!sp) 886 return rval; 887 888 fcport->flags |= FCF_ASYNC_SENT; 889 fcport->logout_completed = 0; 890 891 sp->type = SRB_PRLI_CMD; 892 sp->name = "prli"; 893 894 lio = &sp->u.iocb_cmd; 895 lio->timeout = qla2x00_async_iocb_timeout; 896 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 897 898 sp->done = qla2x00_async_prli_sp_done; 899 lio->u.logio.flags = 0; 900 901 if (fcport->fc4f_nvme) 902 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 903 904 rval = qla2x00_start_sp(sp); 905 if (rval != QLA_SUCCESS) { 906 fcport->flags |= FCF_LOGIN_NEEDED; 907 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 908 goto done_free_sp; 909 } 910 911 ql_dbg(ql_dbg_disc, vha, 0x211b, 912 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n", 913 fcport->port_name, sp->handle, fcport->loop_id, 914 fcport->d_id.b24, fcport->login_retry); 915 916 return rval; 917 918 done_free_sp: 919 sp->free(sp); 920 fcport->flags &= ~FCF_ASYNC_SENT; 921 return rval; 922 } 923 924 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 925 { 926 struct qla_work_evt *e; 927 928 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 929 if (!e) 930 return QLA_FUNCTION_FAILED; 931 932 e->u.fcport.fcport = fcport; 933 e->u.fcport.opt = opt; 934 fcport->flags |= FCF_ASYNC_ACTIVE; 935 return qla2x00_post_work(vha, e); 936 } 937 938 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 939 { 940 srb_t *sp; 941 struct srb_iocb *mbx; 942 int rval = QLA_FUNCTION_FAILED; 943 u16 *mb; 944 dma_addr_t pd_dma; 945 struct port_database_24xx *pd; 946 struct qla_hw_data *ha = vha->hw; 947 948 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 949 return rval; 950 951 fcport->disc_state = DSC_GPDB; 952 953 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 954 if (!sp) 955 goto done; 956 957 fcport->flags |= FCF_ASYNC_SENT; 958 sp->type = SRB_MB_IOCB; 959 sp->name = "gpdb"; 960 sp->gen1 = fcport->rscn_gen; 961 sp->gen2 = fcport->login_gen; 962 963 mbx = &sp->u.iocb_cmd; 964 mbx->timeout = qla2x00_async_iocb_timeout; 965 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 966 967 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 968 if (pd == NULL) { 969 ql_log(ql_log_warn, vha, 0xd043, 970 "Failed to allocate port database structure.\n"); 971 goto done_free_sp; 972 } 973 974 mb = sp->u.iocb_cmd.u.mbx.out_mb; 975 mb[0] = MBC_GET_PORT_DATABASE; 976 mb[1] = fcport->loop_id; 977 mb[2] = MSW(pd_dma); 978 mb[3] = LSW(pd_dma); 979 mb[6] = MSW(MSD(pd_dma)); 980 mb[7] = LSW(MSD(pd_dma)); 981 mb[9] = vha->vp_idx; 982 mb[10] = opt; 983 984 mbx->u.mbx.in = (void *)pd; 985 mbx->u.mbx.in_dma = pd_dma; 986 987 sp->done = qla24xx_async_gpdb_sp_done; 988 989 rval = qla2x00_start_sp(sp); 990 if (rval != QLA_SUCCESS) 991 goto done_free_sp; 992 993 ql_dbg(ql_dbg_disc, vha, 0x20dc, 994 "Async-%s %8phC hndl %x opt %x\n", 995 sp->name, fcport->port_name, sp->handle, opt); 996 997 return rval; 998 999 done_free_sp: 1000 if (pd) 1001 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1002 1003 sp->free(sp); 1004 fcport->flags &= ~FCF_ASYNC_SENT; 1005 done: 1006 qla24xx_post_gpdb_work(vha, fcport, opt); 1007 return rval; 1008 } 1009 1010 static 1011 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1012 { 1013 unsigned long flags; 1014 1015 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1016 ea->fcport->login_gen++; 1017 ea->fcport->deleted = 0; 1018 ea->fcport->logout_on_delete = 1; 1019 1020 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1021 vha->fcport_count++; 1022 ea->fcport->login_succ = 1; 1023 1024 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1025 "%s %d %8phC post upd_fcport fcp_cnt %d\n", 1026 __func__, __LINE__, ea->fcport->port_name, 1027 vha->fcport_count); 1028 qla24xx_post_upd_fcport_work(vha, ea->fcport); 1029 } else if (ea->fcport->login_succ) { 1030 /* 1031 * We have an existing session. A late RSCN delivery 1032 * must have triggered the session to be re-validate. 1033 * Session is still valid. 1034 */ 1035 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1036 "%s %d %8phC session revalidate success\n", 1037 __func__, __LINE__, ea->fcport->port_name); 1038 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1039 } 1040 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1041 } 1042 1043 static 1044 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1045 { 1046 fc_port_t *fcport = ea->fcport; 1047 struct port_database_24xx *pd; 1048 struct srb *sp = ea->sp; 1049 uint8_t ls; 1050 1051 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1052 1053 fcport->flags &= ~FCF_ASYNC_SENT; 1054 1055 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1056 "%s %8phC DS %d LS %d rc %d\n", __func__, fcport->port_name, 1057 fcport->disc_state, pd->current_login_state, ea->rc); 1058 1059 if (fcport->disc_state == DSC_DELETE_PEND) 1060 return; 1061 1062 if (fcport->fc4f_nvme) 1063 ls = pd->current_login_state >> 4; 1064 else 1065 ls = pd->current_login_state & 0xf; 1066 1067 switch (ls) { 1068 case PDS_PRLI_COMPLETE: 1069 __qla24xx_parse_gpdb(vha, fcport, pd); 1070 break; 1071 case PDS_PLOGI_PENDING: 1072 case PDS_PLOGI_COMPLETE: 1073 case PDS_PRLI_PENDING: 1074 case PDS_PRLI2_PENDING: 1075 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC relogin needed\n", 1076 __func__, __LINE__, fcport->port_name); 1077 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1078 return; 1079 case PDS_LOGO_PENDING: 1080 case PDS_PORT_UNAVAILABLE: 1081 default: 1082 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1083 __func__, __LINE__, fcport->port_name); 1084 qlt_schedule_sess_for_deletion(fcport); 1085 return; 1086 } 1087 __qla24xx_handle_gpdb_event(vha, ea); 1088 } /* gpdb event */ 1089 1090 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1091 { 1092 u8 login = 0; 1093 int rc; 1094 1095 if (qla_tgt_mode_enabled(vha)) 1096 return; 1097 1098 if (qla_dual_mode_enabled(vha)) { 1099 if (N2N_TOPO(vha->hw)) { 1100 u64 mywwn, wwn; 1101 1102 mywwn = wwn_to_u64(vha->port_name); 1103 wwn = wwn_to_u64(fcport->port_name); 1104 if (mywwn > wwn) 1105 login = 1; 1106 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1107 && time_after_eq(jiffies, 1108 fcport->plogi_nack_done_deadline)) 1109 login = 1; 1110 } else { 1111 login = 1; 1112 } 1113 } else { 1114 /* initiator mode */ 1115 login = 1; 1116 } 1117 1118 if (login) { 1119 if (fcport->loop_id == FC_NO_LOOP_ID) { 1120 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1121 rc = qla2x00_find_new_loop_id(vha, fcport); 1122 if (rc) { 1123 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1124 "%s %d %8phC post del sess - out of loopid\n", 1125 __func__, __LINE__, fcport->port_name); 1126 fcport->scan_state = 0; 1127 qlt_schedule_sess_for_deletion(fcport); 1128 return; 1129 } 1130 } 1131 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1132 "%s %d %8phC post login\n", 1133 __func__, __LINE__, fcport->port_name); 1134 qla2x00_post_async_login_work(vha, fcport, NULL); 1135 } 1136 } 1137 1138 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1139 { 1140 u16 data[2]; 1141 u64 wwn; 1142 1143 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1144 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n", 1145 __func__, fcport->port_name, fcport->disc_state, 1146 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1147 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1148 fcport->login_gen, fcport->login_retry, 1149 fcport->loop_id, fcport->scan_state); 1150 1151 if (fcport->scan_state != QLA_FCPORT_FOUND) 1152 return 0; 1153 1154 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1155 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1156 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1157 return 0; 1158 1159 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1160 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1161 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1162 return 0; 1163 } 1164 } 1165 1166 /* for pure Target Mode. Login will not be initiated */ 1167 if (vha->host->active_mode == MODE_TARGET) 1168 return 0; 1169 1170 if (fcport->flags & FCF_ASYNC_SENT) { 1171 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1172 return 0; 1173 } 1174 1175 if (fcport->login_retry > 0) 1176 fcport->login_retry--; 1177 1178 switch (fcport->disc_state) { 1179 case DSC_DELETED: 1180 wwn = wwn_to_u64(fcport->node_name); 1181 if (wwn == 0) { 1182 ql_dbg(ql_dbg_disc, vha, 0xffff, 1183 "%s %d %8phC post GNNID\n", 1184 __func__, __LINE__, fcport->port_name); 1185 qla24xx_post_gnnid_work(vha, fcport); 1186 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1187 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1188 "%s %d %8phC post gnl\n", 1189 __func__, __LINE__, fcport->port_name); 1190 qla24xx_post_gnl_work(vha, fcport); 1191 } else { 1192 qla_chk_n2n_b4_login(vha, fcport); 1193 } 1194 break; 1195 1196 case DSC_GNL: 1197 if (fcport->login_pause) { 1198 fcport->last_rscn_gen = fcport->rscn_gen; 1199 fcport->last_login_gen = fcport->login_gen; 1200 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1201 break; 1202 } 1203 1204 qla_chk_n2n_b4_login(vha, fcport); 1205 break; 1206 1207 case DSC_LOGIN_FAILED: 1208 ql_dbg(ql_dbg_disc, vha, 0x20d0, 1209 "%s %d %8phC post gidpn\n", 1210 __func__, __LINE__, fcport->port_name); 1211 if (N2N_TOPO(vha->hw)) 1212 qla_chk_n2n_b4_login(vha, fcport); 1213 else 1214 qla24xx_post_gidpn_work(vha, fcport); 1215 break; 1216 1217 case DSC_LOGIN_COMPLETE: 1218 /* recheck login state */ 1219 ql_dbg(ql_dbg_disc, vha, 0x20d1, 1220 "%s %d %8phC post adisc\n", 1221 __func__, __LINE__, fcport->port_name); 1222 data[0] = data[1] = 0; 1223 qla2x00_post_async_adisc_work(vha, fcport, data); 1224 break; 1225 1226 case DSC_LOGIN_PEND: 1227 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1228 qla24xx_post_prli_work(vha, fcport); 1229 break; 1230 1231 default: 1232 break; 1233 } 1234 1235 return 0; 1236 } 1237 1238 static 1239 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1240 { 1241 fcport->rscn_gen++; 1242 1243 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1244 "%s %8phC DS %d LS %d\n", 1245 __func__, fcport->port_name, fcport->disc_state, 1246 fcport->fw_login_state); 1247 1248 if (fcport->flags & FCF_ASYNC_SENT) 1249 return; 1250 1251 switch (fcport->disc_state) { 1252 case DSC_DELETED: 1253 case DSC_LOGIN_COMPLETE: 1254 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1255 break; 1256 default: 1257 break; 1258 } 1259 } 1260 1261 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1262 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1263 { 1264 struct qla_work_evt *e; 1265 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1266 if (!e) 1267 return QLA_FUNCTION_FAILED; 1268 1269 e->u.new_sess.id = *id; 1270 e->u.new_sess.pla = pla; 1271 e->u.new_sess.fc4_type = fc4_type; 1272 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1273 if (node_name) 1274 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1275 1276 return qla2x00_post_work(vha, e); 1277 } 1278 1279 static 1280 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1281 struct event_arg *ea) 1282 { 1283 fc_port_t *fcport = ea->fcport; 1284 1285 ql_dbg(ql_dbg_disc, vha, 0x2102, 1286 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1287 __func__, fcport->port_name, fcport->disc_state, 1288 fcport->fw_login_state, fcport->login_pause, 1289 fcport->deleted, fcport->conflict, 1290 fcport->last_rscn_gen, fcport->rscn_gen, 1291 fcport->last_login_gen, fcport->login_gen, 1292 fcport->flags); 1293 1294 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1295 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1296 return; 1297 1298 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1299 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1300 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1301 return; 1302 } 1303 } 1304 1305 if (fcport->flags & FCF_ASYNC_SENT) { 1306 fcport->login_retry++; 1307 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1308 return; 1309 } 1310 1311 if (fcport->disc_state == DSC_DELETE_PEND) { 1312 fcport->login_retry++; 1313 return; 1314 } 1315 1316 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1317 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1318 __func__, __LINE__, fcport->port_name); 1319 1320 qla24xx_post_gidpn_work(vha, fcport); 1321 return; 1322 } 1323 1324 qla24xx_fcport_handle_login(vha, fcport); 1325 } 1326 1327 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1328 { 1329 fc_port_t *f, *tf; 1330 uint32_t id = 0, mask, rid; 1331 unsigned long flags; 1332 fc_port_t *fcport; 1333 1334 switch (ea->event) { 1335 case FCME_RELOGIN: 1336 if (test_bit(UNLOADING, &vha->dpc_flags)) 1337 return; 1338 1339 qla24xx_handle_relogin_event(vha, ea); 1340 break; 1341 case FCME_RSCN: 1342 if (test_bit(UNLOADING, &vha->dpc_flags)) 1343 return; 1344 switch (ea->id.b.rsvd_1) { 1345 case RSCN_PORT_ADDR: 1346 fcport = qla2x00_find_fcport_by_nportid 1347 (vha, &ea->id, 1); 1348 if (fcport) 1349 fcport->rscn_rcvd = 1; 1350 1351 spin_lock_irqsave(&vha->work_lock, flags); 1352 if (vha->scan.scan_flags == 0) { 1353 ql_dbg(ql_dbg_disc, vha, 0xffff, 1354 "%s: schedule\n", __func__); 1355 vha->scan.scan_flags |= SF_QUEUED; 1356 schedule_delayed_work(&vha->scan.scan_work, 5); 1357 } 1358 spin_unlock_irqrestore(&vha->work_lock, flags); 1359 1360 break; 1361 case RSCN_AREA_ADDR: 1362 case RSCN_DOM_ADDR: 1363 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1364 mask = 0xffff00; 1365 ql_dbg(ql_dbg_async, vha, 0x5044, 1366 "RSCN: Area 0x%06x was affected\n", 1367 ea->id.b24); 1368 } else { 1369 mask = 0xff0000; 1370 ql_dbg(ql_dbg_async, vha, 0x507a, 1371 "RSCN: Domain 0x%06x was affected\n", 1372 ea->id.b24); 1373 } 1374 1375 rid = ea->id.b24 & mask; 1376 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1377 list) { 1378 id = f->d_id.b24 & mask; 1379 if (rid == id) { 1380 ea->fcport = f; 1381 qla24xx_handle_rscn_event(f, ea); 1382 } 1383 } 1384 break; 1385 case RSCN_FAB_ADDR: 1386 default: 1387 ql_log(ql_log_warn, vha, 0xd045, 1388 "RSCN: Fabric was affected. Addr format %d\n", 1389 ea->id.b.rsvd_1); 1390 qla2x00_mark_all_devices_lost(vha, 1); 1391 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1392 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1393 } 1394 break; 1395 case FCME_GIDPN_DONE: 1396 qla24xx_handle_gidpn_event(vha, ea); 1397 break; 1398 case FCME_GNL_DONE: 1399 qla24xx_handle_gnl_done_event(vha, ea); 1400 break; 1401 case FCME_GPSC_DONE: 1402 qla24xx_handle_gpsc_event(vha, ea); 1403 break; 1404 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1405 qla24xx_handle_plogi_done_event(vha, ea); 1406 break; 1407 case FCME_PRLI_DONE: 1408 qla24xx_handle_prli_done_event(vha, ea); 1409 break; 1410 case FCME_GPDB_DONE: 1411 qla24xx_handle_gpdb_event(vha, ea); 1412 break; 1413 case FCME_GPNID_DONE: 1414 qla24xx_handle_gpnid_event(vha, ea); 1415 break; 1416 case FCME_GFFID_DONE: 1417 qla24xx_handle_gffid_event(vha, ea); 1418 break; 1419 case FCME_ADISC_DONE: 1420 qla24xx_handle_adisc_event(vha, ea); 1421 break; 1422 case FCME_GNNID_DONE: 1423 qla24xx_handle_gnnid_event(vha, ea); 1424 break; 1425 case FCME_GFPNID_DONE: 1426 qla24xx_handle_gfpnid_event(vha, ea); 1427 break; 1428 default: 1429 BUG_ON(1); 1430 break; 1431 } 1432 } 1433 1434 static void 1435 qla2x00_tmf_iocb_timeout(void *data) 1436 { 1437 srb_t *sp = data; 1438 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1439 1440 tmf->u.tmf.comp_status = CS_TIMEOUT; 1441 complete(&tmf->u.tmf.comp); 1442 } 1443 1444 static void 1445 qla2x00_tmf_sp_done(void *ptr, int res) 1446 { 1447 srb_t *sp = ptr; 1448 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1449 1450 complete(&tmf->u.tmf.comp); 1451 } 1452 1453 int 1454 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1455 uint32_t tag) 1456 { 1457 struct scsi_qla_host *vha = fcport->vha; 1458 struct srb_iocb *tm_iocb; 1459 srb_t *sp; 1460 int rval = QLA_FUNCTION_FAILED; 1461 1462 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1463 if (!sp) 1464 goto done; 1465 1466 tm_iocb = &sp->u.iocb_cmd; 1467 sp->type = SRB_TM_CMD; 1468 sp->name = "tmf"; 1469 1470 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1471 init_completion(&tm_iocb->u.tmf.comp); 1472 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1473 1474 tm_iocb->u.tmf.flags = flags; 1475 tm_iocb->u.tmf.lun = lun; 1476 tm_iocb->u.tmf.data = tag; 1477 sp->done = qla2x00_tmf_sp_done; 1478 1479 rval = qla2x00_start_sp(sp); 1480 if (rval != QLA_SUCCESS) 1481 goto done_free_sp; 1482 1483 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1484 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1485 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1486 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1487 1488 wait_for_completion(&tm_iocb->u.tmf.comp); 1489 1490 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 1491 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1492 1493 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) { 1494 ql_dbg(ql_dbg_taskm, vha, 0x8030, 1495 "TM IOCB failed (%x).\n", rval); 1496 } 1497 1498 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1499 flags = tm_iocb->u.tmf.flags; 1500 lun = (uint16_t)tm_iocb->u.tmf.lun; 1501 1502 /* Issue Marker IOCB */ 1503 qla2x00_marker(vha, vha->hw->req_q_map[0], 1504 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1505 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1506 } 1507 1508 done_free_sp: 1509 sp->free(sp); 1510 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1511 done: 1512 return rval; 1513 } 1514 1515 static void 1516 qla24xx_abort_iocb_timeout(void *data) 1517 { 1518 srb_t *sp = data; 1519 struct srb_iocb *abt = &sp->u.iocb_cmd; 1520 1521 abt->u.abt.comp_status = CS_TIMEOUT; 1522 complete(&abt->u.abt.comp); 1523 } 1524 1525 static void 1526 qla24xx_abort_sp_done(void *ptr, int res) 1527 { 1528 srb_t *sp = ptr; 1529 struct srb_iocb *abt = &sp->u.iocb_cmd; 1530 1531 if (del_timer(&sp->u.iocb_cmd.timer)) 1532 complete(&abt->u.abt.comp); 1533 } 1534 1535 int 1536 qla24xx_async_abort_cmd(srb_t *cmd_sp) 1537 { 1538 scsi_qla_host_t *vha = cmd_sp->vha; 1539 fc_port_t *fcport = cmd_sp->fcport; 1540 struct srb_iocb *abt_iocb; 1541 srb_t *sp; 1542 int rval = QLA_FUNCTION_FAILED; 1543 1544 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1545 if (!sp) 1546 goto done; 1547 1548 abt_iocb = &sp->u.iocb_cmd; 1549 sp->type = SRB_ABT_CMD; 1550 sp->name = "abort"; 1551 1552 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1553 init_completion(&abt_iocb->u.abt.comp); 1554 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1555 1556 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1557 1558 if (vha->flags.qpairs_available && cmd_sp->qpair) 1559 abt_iocb->u.abt.req_que_no = 1560 cpu_to_le16(cmd_sp->qpair->req->id); 1561 else 1562 abt_iocb->u.abt.req_que_no = cpu_to_le16(vha->req->id); 1563 1564 sp->done = qla24xx_abort_sp_done; 1565 1566 rval = qla2x00_start_sp(sp); 1567 if (rval != QLA_SUCCESS) 1568 goto done_free_sp; 1569 1570 ql_dbg(ql_dbg_async, vha, 0x507c, 1571 "Abort command issued - hdl=%x, target_id=%x\n", 1572 cmd_sp->handle, fcport->tgt_id); 1573 1574 wait_for_completion(&abt_iocb->u.abt.comp); 1575 1576 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1577 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1578 1579 done_free_sp: 1580 sp->free(sp); 1581 done: 1582 return rval; 1583 } 1584 1585 int 1586 qla24xx_async_abort_command(srb_t *sp) 1587 { 1588 unsigned long flags = 0; 1589 1590 uint32_t handle; 1591 fc_port_t *fcport = sp->fcport; 1592 struct scsi_qla_host *vha = fcport->vha; 1593 struct qla_hw_data *ha = vha->hw; 1594 struct req_que *req = vha->req; 1595 1596 if (vha->flags.qpairs_available && sp->qpair) 1597 req = sp->qpair->req; 1598 1599 spin_lock_irqsave(&ha->hardware_lock, flags); 1600 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1601 if (req->outstanding_cmds[handle] == sp) 1602 break; 1603 } 1604 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1605 if (handle == req->num_outstanding_cmds) { 1606 /* Command not found. */ 1607 return QLA_FUNCTION_FAILED; 1608 } 1609 if (sp->type == SRB_FXIOCB_DCMD) 1610 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1611 FXDISC_ABORT_IOCTL); 1612 1613 return qla24xx_async_abort_cmd(sp); 1614 } 1615 1616 static void 1617 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1618 { 1619 switch (ea->data[0]) { 1620 case MBS_COMMAND_COMPLETE: 1621 ql_dbg(ql_dbg_disc, vha, 0x2118, 1622 "%s %d %8phC post gpdb\n", 1623 __func__, __LINE__, ea->fcport->port_name); 1624 1625 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1626 ea->fcport->logout_on_delete = 1; 1627 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1628 break; 1629 default: 1630 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1631 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1632 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1633 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1634 break; 1635 } 1636 1637 if (ea->fcport->n2n_flag) { 1638 ql_dbg(ql_dbg_disc, vha, 0x2118, 1639 "%s %d %8phC post fc4 prli\n", 1640 __func__, __LINE__, ea->fcport->port_name); 1641 ea->fcport->fc4f_nvme = 0; 1642 ea->fcport->n2n_flag = 0; 1643 qla24xx_post_prli_work(vha, ea->fcport); 1644 } 1645 ql_dbg(ql_dbg_disc, vha, 0x2119, 1646 "%s %d %8phC unhandle event of %x\n", 1647 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1648 break; 1649 } 1650 } 1651 1652 static void 1653 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1654 { 1655 port_id_t cid; /* conflict Nport id */ 1656 u16 lid; 1657 struct fc_port *conflict_fcport; 1658 unsigned long flags; 1659 struct fc_port *fcport = ea->fcport; 1660 1661 ql_dbg(ql_dbg_disc, vha, 0xffff, 1662 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1663 __func__, fcport->port_name, fcport->disc_state, 1664 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1665 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1, 1666 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1667 1668 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1669 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1670 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1671 "%s %d %8phC Remote is trying to login\n", 1672 __func__, __LINE__, fcport->port_name); 1673 return; 1674 } 1675 1676 if (fcport->disc_state == DSC_DELETE_PEND) 1677 return; 1678 1679 if (ea->sp->gen2 != fcport->login_gen) { 1680 /* target side must have changed it. */ 1681 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1682 "%s %8phC generation changed\n", 1683 __func__, fcport->port_name); 1684 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1685 return; 1686 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1687 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 1688 __func__, __LINE__, fcport->port_name); 1689 qla24xx_post_gidpn_work(vha, fcport); 1690 return; 1691 } 1692 1693 switch (ea->data[0]) { 1694 case MBS_COMMAND_COMPLETE: 1695 /* 1696 * Driver must validate login state - If PRLI not complete, 1697 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1698 * requests. 1699 */ 1700 if (ea->fcport->fc4f_nvme) { 1701 ql_dbg(ql_dbg_disc, vha, 0x2117, 1702 "%s %d %8phC post prli\n", 1703 __func__, __LINE__, ea->fcport->port_name); 1704 qla24xx_post_prli_work(vha, ea->fcport); 1705 } else { 1706 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1707 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1708 __func__, __LINE__, ea->fcport->port_name, 1709 ea->fcport->loop_id, ea->fcport->d_id.b24); 1710 1711 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1712 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1713 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1714 ea->fcport->logout_on_delete = 1; 1715 ea->fcport->send_els_logo = 0; 1716 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1717 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1718 1719 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1720 } 1721 break; 1722 case MBS_COMMAND_ERROR: 1723 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1724 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1725 1726 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1727 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1728 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1729 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1730 else 1731 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1732 break; 1733 case MBS_LOOP_ID_USED: 1734 /* data[1] = IO PARAM 1 = nport ID */ 1735 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1736 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1737 cid.b.al_pa = ea->iop[1] & 0xff; 1738 cid.b.rsvd_1 = 0; 1739 1740 ql_dbg(ql_dbg_disc, vha, 0x20ec, 1741 "%s %d %8phC LoopID 0x%x in use post gnl\n", 1742 __func__, __LINE__, ea->fcport->port_name, 1743 ea->fcport->loop_id); 1744 1745 if (IS_SW_RESV_ADDR(cid)) { 1746 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1747 ea->fcport->loop_id = FC_NO_LOOP_ID; 1748 } else { 1749 qla2x00_clear_loop_id(ea->fcport); 1750 } 1751 qla24xx_post_gnl_work(vha, ea->fcport); 1752 break; 1753 case MBS_PORT_ID_USED: 1754 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1755 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n", 1756 __func__, __LINE__, ea->fcport->port_name, 1757 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area, 1758 ea->fcport->d_id.b.al_pa); 1759 1760 lid = ea->iop[1] & 0xffff; 1761 qlt_find_sess_invalidate_other(vha, 1762 wwn_to_u64(ea->fcport->port_name), 1763 ea->fcport->d_id, lid, &conflict_fcport); 1764 1765 if (conflict_fcport) { 1766 /* 1767 * Another fcport share the same loop_id/nport id. 1768 * Conflict fcport needs to finish cleanup before this 1769 * fcport can proceed to login. 1770 */ 1771 conflict_fcport->conflict = ea->fcport; 1772 ea->fcport->login_pause = 1; 1773 1774 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1775 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 1776 __func__, __LINE__, ea->fcport->port_name, 1777 ea->fcport->d_id.b24, lid); 1778 qla2x00_clear_loop_id(ea->fcport); 1779 qla24xx_post_gidpn_work(vha, ea->fcport); 1780 } else { 1781 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1782 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 1783 __func__, __LINE__, ea->fcport->port_name, 1784 ea->fcport->d_id.b24, lid); 1785 1786 qla2x00_clear_loop_id(ea->fcport); 1787 set_bit(lid, vha->hw->loop_id_map); 1788 ea->fcport->loop_id = lid; 1789 ea->fcport->keep_nport_handle = 0; 1790 qlt_schedule_sess_for_deletion(ea->fcport); 1791 } 1792 break; 1793 } 1794 return; 1795 } 1796 1797 void 1798 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1799 uint16_t *data) 1800 { 1801 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1802 qlt_logo_completion_handler(fcport, data[0]); 1803 fcport->login_gen++; 1804 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1805 return; 1806 } 1807 1808 void 1809 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1810 uint16_t *data) 1811 { 1812 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1813 if (data[0] == MBS_COMMAND_COMPLETE) { 1814 qla2x00_update_fcport(vha, fcport); 1815 1816 return; 1817 } 1818 1819 /* Retry login. */ 1820 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 1821 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1822 else 1823 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1824 1825 return; 1826 } 1827 1828 /****************************************************************************/ 1829 /* QLogic ISP2x00 Hardware Support Functions. */ 1830 /****************************************************************************/ 1831 1832 static int 1833 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 1834 { 1835 int rval = QLA_SUCCESS; 1836 struct qla_hw_data *ha = vha->hw; 1837 uint32_t idc_major_ver, idc_minor_ver; 1838 uint16_t config[4]; 1839 1840 qla83xx_idc_lock(vha, 0); 1841 1842 /* SV: TODO: Assign initialization timeout from 1843 * flash-info / other param 1844 */ 1845 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 1846 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 1847 1848 /* Set our fcoe function presence */ 1849 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 1850 ql_dbg(ql_dbg_p3p, vha, 0xb077, 1851 "Error while setting DRV-Presence.\n"); 1852 rval = QLA_FUNCTION_FAILED; 1853 goto exit; 1854 } 1855 1856 /* Decide the reset ownership */ 1857 qla83xx_reset_ownership(vha); 1858 1859 /* 1860 * On first protocol driver load: 1861 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 1862 * register. 1863 * Others: Check compatibility with current IDC Major version. 1864 */ 1865 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 1866 if (ha->flags.nic_core_reset_owner) { 1867 /* Set IDC Major version */ 1868 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 1869 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 1870 1871 /* Clearing IDC-Lock-Recovery register */ 1872 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 1873 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 1874 /* 1875 * Clear further IDC participation if we are not compatible with 1876 * the current IDC Major Version. 1877 */ 1878 ql_log(ql_log_warn, vha, 0xb07d, 1879 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 1880 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 1881 __qla83xx_clear_drv_presence(vha); 1882 rval = QLA_FUNCTION_FAILED; 1883 goto exit; 1884 } 1885 /* Each function sets its supported Minor version. */ 1886 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 1887 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 1888 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 1889 1890 if (ha->flags.nic_core_reset_owner) { 1891 memset(config, 0, sizeof(config)); 1892 if (!qla81xx_get_port_config(vha, config)) 1893 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 1894 QLA8XXX_DEV_READY); 1895 } 1896 1897 rval = qla83xx_idc_state_handler(vha); 1898 1899 exit: 1900 qla83xx_idc_unlock(vha, 0); 1901 1902 return rval; 1903 } 1904 1905 /* 1906 * qla2x00_initialize_adapter 1907 * Initialize board. 1908 * 1909 * Input: 1910 * ha = adapter block pointer. 1911 * 1912 * Returns: 1913 * 0 = success 1914 */ 1915 int 1916 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 1917 { 1918 int rval; 1919 struct qla_hw_data *ha = vha->hw; 1920 struct req_que *req = ha->req_q_map[0]; 1921 1922 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 1923 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 1924 1925 /* Clear adapter flags. */ 1926 vha->flags.online = 0; 1927 ha->flags.chip_reset_done = 0; 1928 vha->flags.reset_active = 0; 1929 ha->flags.pci_channel_io_perm_failure = 0; 1930 ha->flags.eeh_busy = 0; 1931 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 1932 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1933 atomic_set(&vha->loop_state, LOOP_DOWN); 1934 vha->device_flags = DFLG_NO_CABLE; 1935 vha->dpc_flags = 0; 1936 vha->flags.management_server_logged_in = 0; 1937 vha->marker_needed = 0; 1938 ha->isp_abort_cnt = 0; 1939 ha->beacon_blink_led = 0; 1940 1941 set_bit(0, ha->req_qid_map); 1942 set_bit(0, ha->rsp_qid_map); 1943 1944 ql_dbg(ql_dbg_init, vha, 0x0040, 1945 "Configuring PCI space...\n"); 1946 rval = ha->isp_ops->pci_config(vha); 1947 if (rval) { 1948 ql_log(ql_log_warn, vha, 0x0044, 1949 "Unable to configure PCI space.\n"); 1950 return (rval); 1951 } 1952 1953 ha->isp_ops->reset_chip(vha); 1954 1955 rval = qla2xxx_get_flash_info(vha); 1956 if (rval) { 1957 ql_log(ql_log_fatal, vha, 0x004f, 1958 "Unable to validate FLASH data.\n"); 1959 return rval; 1960 } 1961 1962 if (IS_QLA8044(ha)) { 1963 qla8044_read_reset_template(vha); 1964 1965 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 1966 * If DONRESET_BIT0 is set, drivers should not set dev_state 1967 * to NEED_RESET. But if NEED_RESET is set, drivers should 1968 * should honor the reset. */ 1969 if (ql2xdontresethba == 1) 1970 qla8044_set_idc_dontreset(vha); 1971 } 1972 1973 ha->isp_ops->get_flash_version(vha, req->ring); 1974 ql_dbg(ql_dbg_init, vha, 0x0061, 1975 "Configure NVRAM parameters...\n"); 1976 1977 ha->isp_ops->nvram_config(vha); 1978 1979 if (ha->flags.disable_serdes) { 1980 /* Mask HBA via NVRAM settings? */ 1981 ql_log(ql_log_info, vha, 0x0077, 1982 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 1983 return QLA_FUNCTION_FAILED; 1984 } 1985 1986 ql_dbg(ql_dbg_init, vha, 0x0078, 1987 "Verifying loaded RISC code...\n"); 1988 1989 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 1990 rval = ha->isp_ops->chip_diag(vha); 1991 if (rval) 1992 return (rval); 1993 rval = qla2x00_setup_chip(vha); 1994 if (rval) 1995 return (rval); 1996 } 1997 1998 if (IS_QLA84XX(ha)) { 1999 ha->cs84xx = qla84xx_get_chip(vha); 2000 if (!ha->cs84xx) { 2001 ql_log(ql_log_warn, vha, 0x00d0, 2002 "Unable to configure ISP84XX.\n"); 2003 return QLA_FUNCTION_FAILED; 2004 } 2005 } 2006 2007 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2008 rval = qla2x00_init_rings(vha); 2009 2010 ha->flags.chip_reset_done = 1; 2011 2012 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2013 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2014 rval = qla84xx_init_chip(vha); 2015 if (rval != QLA_SUCCESS) { 2016 ql_log(ql_log_warn, vha, 0x00d4, 2017 "Unable to initialize ISP84XX.\n"); 2018 qla84xx_put_chip(vha); 2019 } 2020 } 2021 2022 /* Load the NIC Core f/w if we are the first protocol driver. */ 2023 if (IS_QLA8031(ha)) { 2024 rval = qla83xx_nic_core_fw_load(vha); 2025 if (rval) 2026 ql_log(ql_log_warn, vha, 0x0124, 2027 "Error in initializing NIC Core f/w.\n"); 2028 } 2029 2030 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2031 qla24xx_read_fcp_prio_cfg(vha); 2032 2033 if (IS_P3P_TYPE(ha)) 2034 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2035 else 2036 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2037 2038 return (rval); 2039 } 2040 2041 /** 2042 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2043 * @vha: HA context 2044 * 2045 * Returns 0 on success. 2046 */ 2047 int 2048 qla2100_pci_config(scsi_qla_host_t *vha) 2049 { 2050 uint16_t w; 2051 unsigned long flags; 2052 struct qla_hw_data *ha = vha->hw; 2053 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2054 2055 pci_set_master(ha->pdev); 2056 pci_try_set_mwi(ha->pdev); 2057 2058 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2059 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2060 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2061 2062 pci_disable_rom(ha->pdev); 2063 2064 /* Get PCI bus information. */ 2065 spin_lock_irqsave(&ha->hardware_lock, flags); 2066 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2067 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2068 2069 return QLA_SUCCESS; 2070 } 2071 2072 /** 2073 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2074 * @vha: HA context 2075 * 2076 * Returns 0 on success. 2077 */ 2078 int 2079 qla2300_pci_config(scsi_qla_host_t *vha) 2080 { 2081 uint16_t w; 2082 unsigned long flags = 0; 2083 uint32_t cnt; 2084 struct qla_hw_data *ha = vha->hw; 2085 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2086 2087 pci_set_master(ha->pdev); 2088 pci_try_set_mwi(ha->pdev); 2089 2090 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2091 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2092 2093 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2094 w &= ~PCI_COMMAND_INTX_DISABLE; 2095 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2096 2097 /* 2098 * If this is a 2300 card and not 2312, reset the 2099 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2100 * the 2310 also reports itself as a 2300 so we need to get the 2101 * fb revision level -- a 6 indicates it really is a 2300 and 2102 * not a 2310. 2103 */ 2104 if (IS_QLA2300(ha)) { 2105 spin_lock_irqsave(&ha->hardware_lock, flags); 2106 2107 /* Pause RISC. */ 2108 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2109 for (cnt = 0; cnt < 30000; cnt++) { 2110 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2111 break; 2112 2113 udelay(10); 2114 } 2115 2116 /* Select FPM registers. */ 2117 WRT_REG_WORD(®->ctrl_status, 0x20); 2118 RD_REG_WORD(®->ctrl_status); 2119 2120 /* Get the fb rev level */ 2121 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2122 2123 if (ha->fb_rev == FPM_2300) 2124 pci_clear_mwi(ha->pdev); 2125 2126 /* Deselect FPM registers. */ 2127 WRT_REG_WORD(®->ctrl_status, 0x0); 2128 RD_REG_WORD(®->ctrl_status); 2129 2130 /* Release RISC module. */ 2131 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2132 for (cnt = 0; cnt < 30000; cnt++) { 2133 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2134 break; 2135 2136 udelay(10); 2137 } 2138 2139 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2140 } 2141 2142 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2143 2144 pci_disable_rom(ha->pdev); 2145 2146 /* Get PCI bus information. */ 2147 spin_lock_irqsave(&ha->hardware_lock, flags); 2148 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2149 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2150 2151 return QLA_SUCCESS; 2152 } 2153 2154 /** 2155 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2156 * @vha: HA context 2157 * 2158 * Returns 0 on success. 2159 */ 2160 int 2161 qla24xx_pci_config(scsi_qla_host_t *vha) 2162 { 2163 uint16_t w; 2164 unsigned long flags = 0; 2165 struct qla_hw_data *ha = vha->hw; 2166 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2167 2168 pci_set_master(ha->pdev); 2169 pci_try_set_mwi(ha->pdev); 2170 2171 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2172 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2173 w &= ~PCI_COMMAND_INTX_DISABLE; 2174 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2175 2176 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2177 2178 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2179 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2180 pcix_set_mmrbc(ha->pdev, 2048); 2181 2182 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2183 if (pci_is_pcie(ha->pdev)) 2184 pcie_set_readrq(ha->pdev, 4096); 2185 2186 pci_disable_rom(ha->pdev); 2187 2188 ha->chip_revision = ha->pdev->revision; 2189 2190 /* Get PCI bus information. */ 2191 spin_lock_irqsave(&ha->hardware_lock, flags); 2192 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2193 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2194 2195 return QLA_SUCCESS; 2196 } 2197 2198 /** 2199 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2200 * @vha: HA context 2201 * 2202 * Returns 0 on success. 2203 */ 2204 int 2205 qla25xx_pci_config(scsi_qla_host_t *vha) 2206 { 2207 uint16_t w; 2208 struct qla_hw_data *ha = vha->hw; 2209 2210 pci_set_master(ha->pdev); 2211 pci_try_set_mwi(ha->pdev); 2212 2213 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2214 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2215 w &= ~PCI_COMMAND_INTX_DISABLE; 2216 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2217 2218 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2219 if (pci_is_pcie(ha->pdev)) 2220 pcie_set_readrq(ha->pdev, 4096); 2221 2222 pci_disable_rom(ha->pdev); 2223 2224 ha->chip_revision = ha->pdev->revision; 2225 2226 return QLA_SUCCESS; 2227 } 2228 2229 /** 2230 * qla2x00_isp_firmware() - Choose firmware image. 2231 * @vha: HA context 2232 * 2233 * Returns 0 on success. 2234 */ 2235 static int 2236 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2237 { 2238 int rval; 2239 uint16_t loop_id, topo, sw_cap; 2240 uint8_t domain, area, al_pa; 2241 struct qla_hw_data *ha = vha->hw; 2242 2243 /* Assume loading risc code */ 2244 rval = QLA_FUNCTION_FAILED; 2245 2246 if (ha->flags.disable_risc_code_load) { 2247 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2248 2249 /* Verify checksum of loaded RISC code. */ 2250 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2251 if (rval == QLA_SUCCESS) { 2252 /* And, verify we are not in ROM code. */ 2253 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2254 &area, &domain, &topo, &sw_cap); 2255 } 2256 } 2257 2258 if (rval) 2259 ql_dbg(ql_dbg_init, vha, 0x007a, 2260 "**** Load RISC code ****.\n"); 2261 2262 return (rval); 2263 } 2264 2265 /** 2266 * qla2x00_reset_chip() - Reset ISP chip. 2267 * @vha: HA context 2268 * 2269 * Returns 0 on success. 2270 */ 2271 void 2272 qla2x00_reset_chip(scsi_qla_host_t *vha) 2273 { 2274 unsigned long flags = 0; 2275 struct qla_hw_data *ha = vha->hw; 2276 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2277 uint32_t cnt; 2278 uint16_t cmd; 2279 2280 if (unlikely(pci_channel_offline(ha->pdev))) 2281 return; 2282 2283 ha->isp_ops->disable_intrs(ha); 2284 2285 spin_lock_irqsave(&ha->hardware_lock, flags); 2286 2287 /* Turn off master enable */ 2288 cmd = 0; 2289 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2290 cmd &= ~PCI_COMMAND_MASTER; 2291 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2292 2293 if (!IS_QLA2100(ha)) { 2294 /* Pause RISC. */ 2295 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2296 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2297 for (cnt = 0; cnt < 30000; cnt++) { 2298 if ((RD_REG_WORD(®->hccr) & 2299 HCCR_RISC_PAUSE) != 0) 2300 break; 2301 udelay(100); 2302 } 2303 } else { 2304 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2305 udelay(10); 2306 } 2307 2308 /* Select FPM registers. */ 2309 WRT_REG_WORD(®->ctrl_status, 0x20); 2310 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2311 2312 /* FPM Soft Reset. */ 2313 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2314 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2315 2316 /* Toggle Fpm Reset. */ 2317 if (!IS_QLA2200(ha)) { 2318 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2319 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2320 } 2321 2322 /* Select frame buffer registers. */ 2323 WRT_REG_WORD(®->ctrl_status, 0x10); 2324 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2325 2326 /* Reset frame buffer FIFOs. */ 2327 if (IS_QLA2200(ha)) { 2328 WRT_FB_CMD_REG(ha, reg, 0xa000); 2329 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2330 } else { 2331 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2332 2333 /* Read back fb_cmd until zero or 3 seconds max */ 2334 for (cnt = 0; cnt < 3000; cnt++) { 2335 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2336 break; 2337 udelay(100); 2338 } 2339 } 2340 2341 /* Select RISC module registers. */ 2342 WRT_REG_WORD(®->ctrl_status, 0); 2343 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2344 2345 /* Reset RISC processor. */ 2346 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2347 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2348 2349 /* Release RISC processor. */ 2350 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2351 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2352 } 2353 2354 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2355 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2356 2357 /* Reset ISP chip. */ 2358 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2359 2360 /* Wait for RISC to recover from reset. */ 2361 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2362 /* 2363 * It is necessary to for a delay here since the card doesn't 2364 * respond to PCI reads during a reset. On some architectures 2365 * this will result in an MCA. 2366 */ 2367 udelay(20); 2368 for (cnt = 30000; cnt; cnt--) { 2369 if ((RD_REG_WORD(®->ctrl_status) & 2370 CSR_ISP_SOFT_RESET) == 0) 2371 break; 2372 udelay(100); 2373 } 2374 } else 2375 udelay(10); 2376 2377 /* Reset RISC processor. */ 2378 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2379 2380 WRT_REG_WORD(®->semaphore, 0); 2381 2382 /* Release RISC processor. */ 2383 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2384 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2385 2386 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2387 for (cnt = 0; cnt < 30000; cnt++) { 2388 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2389 break; 2390 2391 udelay(100); 2392 } 2393 } else 2394 udelay(100); 2395 2396 /* Turn on master enable */ 2397 cmd |= PCI_COMMAND_MASTER; 2398 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2399 2400 /* Disable RISC pause on FPM parity error. */ 2401 if (!IS_QLA2100(ha)) { 2402 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2403 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2404 } 2405 2406 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2407 } 2408 2409 /** 2410 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2411 * @vha: HA context 2412 * 2413 * Returns 0 on success. 2414 */ 2415 static int 2416 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2417 { 2418 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2419 2420 if (!IS_QLA81XX(vha->hw)) 2421 return QLA_SUCCESS; 2422 2423 return qla81xx_write_mpi_register(vha, mb); 2424 } 2425 2426 /** 2427 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2428 * @vha: HA context 2429 * 2430 * Returns 0 on success. 2431 */ 2432 static inline int 2433 qla24xx_reset_risc(scsi_qla_host_t *vha) 2434 { 2435 unsigned long flags = 0; 2436 struct qla_hw_data *ha = vha->hw; 2437 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2438 uint32_t cnt; 2439 uint16_t wd; 2440 static int abts_cnt; /* ISP abort retry counts */ 2441 int rval = QLA_SUCCESS; 2442 2443 spin_lock_irqsave(&ha->hardware_lock, flags); 2444 2445 /* Reset RISC. */ 2446 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2447 for (cnt = 0; cnt < 30000; cnt++) { 2448 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2449 break; 2450 2451 udelay(10); 2452 } 2453 2454 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2455 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2456 2457 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2458 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2459 RD_REG_DWORD(®->hccr), 2460 RD_REG_DWORD(®->ctrl_status), 2461 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2462 2463 WRT_REG_DWORD(®->ctrl_status, 2464 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2465 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2466 2467 udelay(100); 2468 2469 /* Wait for firmware to complete NVRAM accesses. */ 2470 RD_REG_WORD(®->mailbox0); 2471 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2472 rval == QLA_SUCCESS; cnt--) { 2473 barrier(); 2474 if (cnt) 2475 udelay(5); 2476 else 2477 rval = QLA_FUNCTION_TIMEOUT; 2478 } 2479 2480 if (rval == QLA_SUCCESS) 2481 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2482 2483 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2484 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2485 RD_REG_DWORD(®->hccr), 2486 RD_REG_DWORD(®->mailbox0)); 2487 2488 /* Wait for soft-reset to complete. */ 2489 RD_REG_DWORD(®->ctrl_status); 2490 for (cnt = 0; cnt < 60; cnt++) { 2491 barrier(); 2492 if ((RD_REG_DWORD(®->ctrl_status) & 2493 CSRX_ISP_SOFT_RESET) == 0) 2494 break; 2495 2496 udelay(5); 2497 } 2498 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2499 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2500 2501 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2502 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2503 RD_REG_DWORD(®->hccr), 2504 RD_REG_DWORD(®->ctrl_status)); 2505 2506 /* If required, do an MPI FW reset now */ 2507 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2508 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2509 if (++abts_cnt < 5) { 2510 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2511 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2512 } else { 2513 /* 2514 * We exhausted the ISP abort retries. We have to 2515 * set the board offline. 2516 */ 2517 abts_cnt = 0; 2518 vha->flags.online = 0; 2519 } 2520 } 2521 } 2522 2523 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2524 RD_REG_DWORD(®->hccr); 2525 2526 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2527 RD_REG_DWORD(®->hccr); 2528 2529 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2530 RD_REG_DWORD(®->hccr); 2531 2532 RD_REG_WORD(®->mailbox0); 2533 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2534 rval == QLA_SUCCESS; cnt--) { 2535 barrier(); 2536 if (cnt) 2537 udelay(5); 2538 else 2539 rval = QLA_FUNCTION_TIMEOUT; 2540 } 2541 if (rval == QLA_SUCCESS) 2542 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2543 2544 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2545 "Host Risc 0x%x, mailbox0 0x%x\n", 2546 RD_REG_DWORD(®->hccr), 2547 RD_REG_WORD(®->mailbox0)); 2548 2549 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2550 2551 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2552 "Driver in %s mode\n", 2553 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2554 2555 if (IS_NOPOLLING_TYPE(ha)) 2556 ha->isp_ops->enable_intrs(ha); 2557 2558 return rval; 2559 } 2560 2561 static void 2562 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2563 { 2564 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2565 2566 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2567 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2568 2569 } 2570 2571 static void 2572 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2573 { 2574 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2575 2576 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2577 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2578 } 2579 2580 static void 2581 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2582 { 2583 uint32_t wd32 = 0; 2584 uint delta_msec = 100; 2585 uint elapsed_msec = 0; 2586 uint timeout_msec; 2587 ulong n; 2588 2589 if (vha->hw->pdev->subsystem_device != 0x0175 && 2590 vha->hw->pdev->subsystem_device != 0x0240) 2591 return; 2592 2593 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2594 udelay(100); 2595 2596 attempt: 2597 timeout_msec = TIMEOUT_SEMAPHORE; 2598 n = timeout_msec / delta_msec; 2599 while (n--) { 2600 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2601 qla25xx_read_risc_sema_reg(vha, &wd32); 2602 if (wd32 & RISC_SEMAPHORE) 2603 break; 2604 msleep(delta_msec); 2605 elapsed_msec += delta_msec; 2606 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2607 goto force; 2608 } 2609 2610 if (!(wd32 & RISC_SEMAPHORE)) 2611 goto force; 2612 2613 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2614 goto acquired; 2615 2616 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2617 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2618 n = timeout_msec / delta_msec; 2619 while (n--) { 2620 qla25xx_read_risc_sema_reg(vha, &wd32); 2621 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2622 break; 2623 msleep(delta_msec); 2624 elapsed_msec += delta_msec; 2625 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2626 goto force; 2627 } 2628 2629 if (wd32 & RISC_SEMAPHORE_FORCE) 2630 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2631 2632 goto attempt; 2633 2634 force: 2635 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2636 2637 acquired: 2638 return; 2639 } 2640 2641 /** 2642 * qla24xx_reset_chip() - Reset ISP24xx chip. 2643 * @vha: HA context 2644 * 2645 * Returns 0 on success. 2646 */ 2647 void 2648 qla24xx_reset_chip(scsi_qla_host_t *vha) 2649 { 2650 struct qla_hw_data *ha = vha->hw; 2651 2652 if (pci_channel_offline(ha->pdev) && 2653 ha->flags.pci_channel_io_perm_failure) { 2654 return; 2655 } 2656 2657 ha->isp_ops->disable_intrs(ha); 2658 2659 qla25xx_manipulate_risc_semaphore(vha); 2660 2661 /* Perform RISC reset. */ 2662 qla24xx_reset_risc(vha); 2663 } 2664 2665 /** 2666 * qla2x00_chip_diag() - Test chip for proper operation. 2667 * @vha: HA context 2668 * 2669 * Returns 0 on success. 2670 */ 2671 int 2672 qla2x00_chip_diag(scsi_qla_host_t *vha) 2673 { 2674 int rval; 2675 struct qla_hw_data *ha = vha->hw; 2676 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2677 unsigned long flags = 0; 2678 uint16_t data; 2679 uint32_t cnt; 2680 uint16_t mb[5]; 2681 struct req_que *req = ha->req_q_map[0]; 2682 2683 /* Assume a failed state */ 2684 rval = QLA_FUNCTION_FAILED; 2685 2686 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2687 ®->flash_address); 2688 2689 spin_lock_irqsave(&ha->hardware_lock, flags); 2690 2691 /* Reset ISP chip. */ 2692 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2693 2694 /* 2695 * We need to have a delay here since the card will not respond while 2696 * in reset causing an MCA on some architectures. 2697 */ 2698 udelay(20); 2699 data = qla2x00_debounce_register(®->ctrl_status); 2700 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2701 udelay(5); 2702 data = RD_REG_WORD(®->ctrl_status); 2703 barrier(); 2704 } 2705 2706 if (!cnt) 2707 goto chip_diag_failed; 2708 2709 ql_dbg(ql_dbg_init, vha, 0x007c, 2710 "Reset register cleared by chip reset.\n"); 2711 2712 /* Reset RISC processor. */ 2713 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2714 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2715 2716 /* Workaround for QLA2312 PCI parity error */ 2717 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2718 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2719 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2720 udelay(5); 2721 data = RD_MAILBOX_REG(ha, reg, 0); 2722 barrier(); 2723 } 2724 } else 2725 udelay(10); 2726 2727 if (!cnt) 2728 goto chip_diag_failed; 2729 2730 /* Check product ID of chip */ 2731 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2732 2733 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2734 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2735 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2736 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2737 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2738 mb[3] != PROD_ID_3) { 2739 ql_log(ql_log_warn, vha, 0x0062, 2740 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2741 mb[1], mb[2], mb[3]); 2742 2743 goto chip_diag_failed; 2744 } 2745 ha->product_id[0] = mb[1]; 2746 ha->product_id[1] = mb[2]; 2747 ha->product_id[2] = mb[3]; 2748 ha->product_id[3] = mb[4]; 2749 2750 /* Adjust fw RISC transfer size */ 2751 if (req->length > 1024) 2752 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2753 else 2754 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2755 req->length; 2756 2757 if (IS_QLA2200(ha) && 2758 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2759 /* Limit firmware transfer size with a 2200A */ 2760 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2761 2762 ha->device_type |= DT_ISP2200A; 2763 ha->fw_transfer_size = 128; 2764 } 2765 2766 /* Wrap Incoming Mailboxes Test. */ 2767 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2768 2769 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2770 rval = qla2x00_mbx_reg_test(vha); 2771 if (rval) 2772 ql_log(ql_log_warn, vha, 0x0080, 2773 "Failed mailbox send register test.\n"); 2774 else 2775 /* Flag a successful rval */ 2776 rval = QLA_SUCCESS; 2777 spin_lock_irqsave(&ha->hardware_lock, flags); 2778 2779 chip_diag_failed: 2780 if (rval) 2781 ql_log(ql_log_info, vha, 0x0081, 2782 "Chip diagnostics **** FAILED ****.\n"); 2783 2784 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2785 2786 return (rval); 2787 } 2788 2789 /** 2790 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 2791 * @vha: HA context 2792 * 2793 * Returns 0 on success. 2794 */ 2795 int 2796 qla24xx_chip_diag(scsi_qla_host_t *vha) 2797 { 2798 int rval; 2799 struct qla_hw_data *ha = vha->hw; 2800 struct req_que *req = ha->req_q_map[0]; 2801 2802 if (IS_P3P_TYPE(ha)) 2803 return QLA_SUCCESS; 2804 2805 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 2806 2807 rval = qla2x00_mbx_reg_test(vha); 2808 if (rval) { 2809 ql_log(ql_log_warn, vha, 0x0082, 2810 "Failed mailbox send register test.\n"); 2811 } else { 2812 /* Flag a successful rval */ 2813 rval = QLA_SUCCESS; 2814 } 2815 2816 return rval; 2817 } 2818 2819 static void 2820 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 2821 { 2822 int rval; 2823 dma_addr_t tc_dma; 2824 void *tc; 2825 struct qla_hw_data *ha = vha->hw; 2826 2827 if (ha->eft) { 2828 ql_dbg(ql_dbg_init, vha, 0x00bd, 2829 "%s: Offload Mem is already allocated.\n", 2830 __func__); 2831 return; 2832 } 2833 2834 if (IS_FWI2_CAPABLE(ha)) { 2835 /* Allocate memory for Fibre Channel Event Buffer. */ 2836 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2837 !IS_QLA27XX(ha)) 2838 goto try_eft; 2839 2840 if (ha->fce) 2841 dma_free_coherent(&ha->pdev->dev, 2842 FCE_SIZE, ha->fce, ha->fce_dma); 2843 2844 /* Allocate memory for Fibre Channel Event Buffer. */ 2845 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 2846 GFP_KERNEL); 2847 if (!tc) { 2848 ql_log(ql_log_warn, vha, 0x00be, 2849 "Unable to allocate (%d KB) for FCE.\n", 2850 FCE_SIZE / 1024); 2851 goto try_eft; 2852 } 2853 2854 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 2855 ha->fce_mb, &ha->fce_bufs); 2856 if (rval) { 2857 ql_log(ql_log_warn, vha, 0x00bf, 2858 "Unable to initialize FCE (%d).\n", rval); 2859 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 2860 tc_dma); 2861 ha->flags.fce_enabled = 0; 2862 goto try_eft; 2863 } 2864 ql_dbg(ql_dbg_init, vha, 0x00c0, 2865 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 2866 2867 ha->flags.fce_enabled = 1; 2868 ha->fce_dma = tc_dma; 2869 ha->fce = tc; 2870 2871 try_eft: 2872 if (ha->eft) 2873 dma_free_coherent(&ha->pdev->dev, 2874 EFT_SIZE, ha->eft, ha->eft_dma); 2875 2876 /* Allocate memory for Extended Trace Buffer. */ 2877 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 2878 GFP_KERNEL); 2879 if (!tc) { 2880 ql_log(ql_log_warn, vha, 0x00c1, 2881 "Unable to allocate (%d KB) for EFT.\n", 2882 EFT_SIZE / 1024); 2883 goto eft_err; 2884 } 2885 2886 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 2887 if (rval) { 2888 ql_log(ql_log_warn, vha, 0x00c2, 2889 "Unable to initialize EFT (%d).\n", rval); 2890 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 2891 tc_dma); 2892 goto eft_err; 2893 } 2894 ql_dbg(ql_dbg_init, vha, 0x00c3, 2895 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2896 2897 ha->eft_dma = tc_dma; 2898 ha->eft = tc; 2899 } 2900 2901 eft_err: 2902 return; 2903 } 2904 2905 void 2906 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 2907 { 2908 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 2909 eft_size, fce_size, mq_size; 2910 struct qla_hw_data *ha = vha->hw; 2911 struct req_que *req = ha->req_q_map[0]; 2912 struct rsp_que *rsp = ha->rsp_q_map[0]; 2913 struct qla2xxx_fw_dump *fw_dump; 2914 2915 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 2916 req_q_size = rsp_q_size = 0; 2917 2918 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2919 fixed_size = sizeof(struct qla2100_fw_dump); 2920 } else if (IS_QLA23XX(ha)) { 2921 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 2922 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 2923 sizeof(uint16_t); 2924 } else if (IS_FWI2_CAPABLE(ha)) { 2925 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 2926 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 2927 else if (IS_QLA81XX(ha)) 2928 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 2929 else if (IS_QLA25XX(ha)) 2930 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 2931 else 2932 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 2933 2934 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 2935 sizeof(uint32_t); 2936 if (ha->mqenable) { 2937 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 2938 mq_size = sizeof(struct qla2xxx_mq_chain); 2939 /* 2940 * Allocate maximum buffer size for all queues. 2941 * Resizing must be done at end-of-dump processing. 2942 */ 2943 mq_size += ha->max_req_queues * 2944 (req->length * sizeof(request_t)); 2945 mq_size += ha->max_rsp_queues * 2946 (rsp->length * sizeof(response_t)); 2947 } 2948 if (ha->tgt.atio_ring) 2949 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 2950 /* Allocate memory for Fibre Channel Event Buffer. */ 2951 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2952 !IS_QLA27XX(ha)) 2953 goto try_eft; 2954 2955 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 2956 try_eft: 2957 ql_dbg(ql_dbg_init, vha, 0x00c3, 2958 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2959 eft_size = EFT_SIZE; 2960 } 2961 2962 if (IS_QLA27XX(ha)) { 2963 if (!ha->fw_dump_template) { 2964 ql_log(ql_log_warn, vha, 0x00ba, 2965 "Failed missing fwdump template\n"); 2966 return; 2967 } 2968 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 2969 ql_dbg(ql_dbg_init, vha, 0x00fa, 2970 "-> allocating fwdump (%x bytes)...\n", dump_size); 2971 goto allocate; 2972 } 2973 2974 req_q_size = req->length * sizeof(request_t); 2975 rsp_q_size = rsp->length * sizeof(response_t); 2976 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 2977 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 2978 ha->chain_offset = dump_size; 2979 dump_size += mq_size + fce_size; 2980 2981 if (ha->exchoffld_buf) 2982 dump_size += sizeof(struct qla2xxx_offld_chain) + 2983 ha->exchoffld_size; 2984 if (ha->exlogin_buf) 2985 dump_size += sizeof(struct qla2xxx_offld_chain) + 2986 ha->exlogin_size; 2987 2988 allocate: 2989 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 2990 fw_dump = vmalloc(dump_size); 2991 if (!fw_dump) { 2992 ql_log(ql_log_warn, vha, 0x00c4, 2993 "Unable to allocate (%d KB) for firmware dump.\n", 2994 dump_size / 1024); 2995 } else { 2996 if (ha->fw_dump) 2997 vfree(ha->fw_dump); 2998 ha->fw_dump = fw_dump; 2999 3000 ha->fw_dump_len = dump_size; 3001 ql_dbg(ql_dbg_init, vha, 0x00c5, 3002 "Allocated (%d KB) for firmware dump.\n", 3003 dump_size / 1024); 3004 3005 if (IS_QLA27XX(ha)) 3006 return; 3007 3008 ha->fw_dump->signature[0] = 'Q'; 3009 ha->fw_dump->signature[1] = 'L'; 3010 ha->fw_dump->signature[2] = 'G'; 3011 ha->fw_dump->signature[3] = 'C'; 3012 ha->fw_dump->version = htonl(1); 3013 3014 ha->fw_dump->fixed_size = htonl(fixed_size); 3015 ha->fw_dump->mem_size = htonl(mem_size); 3016 ha->fw_dump->req_q_size = htonl(req_q_size); 3017 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3018 3019 ha->fw_dump->eft_size = htonl(eft_size); 3020 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3021 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3022 3023 ha->fw_dump->header_size = 3024 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3025 } 3026 } 3027 } 3028 3029 static int 3030 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3031 { 3032 #define MPS_MASK 0xe0 3033 int rval; 3034 uint16_t dc; 3035 uint32_t dw; 3036 3037 if (!IS_QLA81XX(vha->hw)) 3038 return QLA_SUCCESS; 3039 3040 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3041 if (rval != QLA_SUCCESS) { 3042 ql_log(ql_log_warn, vha, 0x0105, 3043 "Unable to acquire semaphore.\n"); 3044 goto done; 3045 } 3046 3047 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3048 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3049 if (rval != QLA_SUCCESS) { 3050 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3051 goto done_release; 3052 } 3053 3054 dc &= MPS_MASK; 3055 if (dc == (dw & MPS_MASK)) 3056 goto done_release; 3057 3058 dw &= ~MPS_MASK; 3059 dw |= dc; 3060 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3061 if (rval != QLA_SUCCESS) { 3062 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3063 } 3064 3065 done_release: 3066 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3067 if (rval != QLA_SUCCESS) { 3068 ql_log(ql_log_warn, vha, 0x006d, 3069 "Unable to release semaphore.\n"); 3070 } 3071 3072 done: 3073 return rval; 3074 } 3075 3076 int 3077 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3078 { 3079 /* Don't try to reallocate the array */ 3080 if (req->outstanding_cmds) 3081 return QLA_SUCCESS; 3082 3083 if (!IS_FWI2_CAPABLE(ha)) 3084 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3085 else { 3086 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3087 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3088 else 3089 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3090 } 3091 3092 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3093 sizeof(srb_t *), 3094 GFP_KERNEL); 3095 3096 if (!req->outstanding_cmds) { 3097 /* 3098 * Try to allocate a minimal size just so we can get through 3099 * initialization. 3100 */ 3101 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3102 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3103 sizeof(srb_t *), 3104 GFP_KERNEL); 3105 3106 if (!req->outstanding_cmds) { 3107 ql_log(ql_log_fatal, NULL, 0x0126, 3108 "Failed to allocate memory for " 3109 "outstanding_cmds for req_que %p.\n", req); 3110 req->num_outstanding_cmds = 0; 3111 return QLA_FUNCTION_FAILED; 3112 } 3113 } 3114 3115 return QLA_SUCCESS; 3116 } 3117 3118 #define PRINT_FIELD(_field, _flag, _str) { \ 3119 if (a0->_field & _flag) {\ 3120 if (p) {\ 3121 strcat(ptr, "|");\ 3122 ptr++;\ 3123 leftover--;\ 3124 } \ 3125 len = snprintf(ptr, leftover, "%s", _str); \ 3126 p = 1;\ 3127 leftover -= len;\ 3128 ptr += len; \ 3129 } \ 3130 } 3131 3132 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3133 { 3134 #define STR_LEN 64 3135 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3136 u8 str[STR_LEN], *ptr, p; 3137 int leftover, len; 3138 3139 memset(str, 0, STR_LEN); 3140 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3141 ql_dbg(ql_dbg_init, vha, 0x015a, 3142 "SFP MFG Name: %s\n", str); 3143 3144 memset(str, 0, STR_LEN); 3145 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3146 ql_dbg(ql_dbg_init, vha, 0x015c, 3147 "SFP Part Name: %s\n", str); 3148 3149 /* media */ 3150 memset(str, 0, STR_LEN); 3151 ptr = str; 3152 leftover = STR_LEN; 3153 p = len = 0; 3154 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3155 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3156 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3157 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3158 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3159 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3160 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3161 ql_dbg(ql_dbg_init, vha, 0x0160, 3162 "SFP Media: %s\n", str); 3163 3164 /* link length */ 3165 memset(str, 0, STR_LEN); 3166 ptr = str; 3167 leftover = STR_LEN; 3168 p = len = 0; 3169 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3170 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3171 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3172 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3173 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3174 ql_dbg(ql_dbg_init, vha, 0x0196, 3175 "SFP Link Length: %s\n", str); 3176 3177 memset(str, 0, STR_LEN); 3178 ptr = str; 3179 leftover = STR_LEN; 3180 p = len = 0; 3181 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3182 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3183 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3184 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3185 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3186 ql_dbg(ql_dbg_init, vha, 0x016e, 3187 "SFP FC Link Tech: %s\n", str); 3188 3189 if (a0->length_km) 3190 ql_dbg(ql_dbg_init, vha, 0x016f, 3191 "SFP Distant: %d km\n", a0->length_km); 3192 if (a0->length_100m) 3193 ql_dbg(ql_dbg_init, vha, 0x0170, 3194 "SFP Distant: %d m\n", a0->length_100m*100); 3195 if (a0->length_50um_10m) 3196 ql_dbg(ql_dbg_init, vha, 0x0189, 3197 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3198 if (a0->length_62um_10m) 3199 ql_dbg(ql_dbg_init, vha, 0x018a, 3200 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3201 if (a0->length_om4_10m) 3202 ql_dbg(ql_dbg_init, vha, 0x0194, 3203 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3204 if (a0->length_om3_10m) 3205 ql_dbg(ql_dbg_init, vha, 0x0195, 3206 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3207 } 3208 3209 3210 /* 3211 * Return Code: 3212 * QLA_SUCCESS: no action 3213 * QLA_INTERFACE_ERROR: SFP is not there. 3214 * QLA_FUNCTION_FAILED: detected New SFP 3215 */ 3216 int 3217 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3218 { 3219 int rc = QLA_SUCCESS; 3220 struct sff_8247_a0 *a; 3221 struct qla_hw_data *ha = vha->hw; 3222 3223 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3224 goto out; 3225 3226 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3227 if (rc) 3228 goto out; 3229 3230 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3231 qla2xxx_print_sfp_info(vha); 3232 3233 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3234 /* long range */ 3235 ha->flags.detected_lr_sfp = 1; 3236 3237 if (a->length_km > 5 || a->length_100m > 50) 3238 ha->long_range_distance = LR_DISTANCE_10K; 3239 else 3240 ha->long_range_distance = LR_DISTANCE_5K; 3241 3242 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3243 ql_dbg(ql_dbg_async, vha, 0x507b, 3244 "Detected Long Range SFP.\n"); 3245 } else { 3246 /* short range */ 3247 ha->flags.detected_lr_sfp = 0; 3248 if (ha->flags.using_lr_setting) 3249 ql_dbg(ql_dbg_async, vha, 0x5084, 3250 "Detected Short Range SFP.\n"); 3251 } 3252 3253 if (!vha->flags.init_done) 3254 rc = QLA_SUCCESS; 3255 out: 3256 return rc; 3257 } 3258 3259 /** 3260 * qla2x00_setup_chip() - Load and start RISC firmware. 3261 * @vha: HA context 3262 * 3263 * Returns 0 on success. 3264 */ 3265 static int 3266 qla2x00_setup_chip(scsi_qla_host_t *vha) 3267 { 3268 int rval; 3269 uint32_t srisc_address = 0; 3270 struct qla_hw_data *ha = vha->hw; 3271 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3272 unsigned long flags; 3273 uint16_t fw_major_version; 3274 3275 if (IS_P3P_TYPE(ha)) { 3276 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3277 if (rval == QLA_SUCCESS) { 3278 qla2x00_stop_firmware(vha); 3279 goto enable_82xx_npiv; 3280 } else 3281 goto failed; 3282 } 3283 3284 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3285 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3286 spin_lock_irqsave(&ha->hardware_lock, flags); 3287 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3288 RD_REG_WORD(®->hccr); 3289 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3290 } 3291 3292 qla81xx_mpi_sync(vha); 3293 3294 /* Load firmware sequences */ 3295 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3296 if (rval == QLA_SUCCESS) { 3297 ql_dbg(ql_dbg_init, vha, 0x00c9, 3298 "Verifying Checksum of loaded RISC code.\n"); 3299 3300 rval = qla2x00_verify_checksum(vha, srisc_address); 3301 if (rval == QLA_SUCCESS) { 3302 /* Start firmware execution. */ 3303 ql_dbg(ql_dbg_init, vha, 0x00ca, 3304 "Starting firmware.\n"); 3305 3306 if (ql2xexlogins) 3307 ha->flags.exlogins_enabled = 1; 3308 3309 if (qla_is_exch_offld_enabled(vha)) 3310 ha->flags.exchoffld_enabled = 1; 3311 3312 rval = qla2x00_execute_fw(vha, srisc_address); 3313 /* Retrieve firmware information. */ 3314 if (rval == QLA_SUCCESS) { 3315 qla24xx_detect_sfp(vha); 3316 3317 rval = qla2x00_set_exlogins_buffer(vha); 3318 if (rval != QLA_SUCCESS) 3319 goto failed; 3320 3321 rval = qla2x00_set_exchoffld_buffer(vha); 3322 if (rval != QLA_SUCCESS) 3323 goto failed; 3324 3325 enable_82xx_npiv: 3326 fw_major_version = ha->fw_major_version; 3327 if (IS_P3P_TYPE(ha)) 3328 qla82xx_check_md_needed(vha); 3329 else 3330 rval = qla2x00_get_fw_version(vha); 3331 if (rval != QLA_SUCCESS) 3332 goto failed; 3333 ha->flags.npiv_supported = 0; 3334 if (IS_QLA2XXX_MIDTYPE(ha) && 3335 (ha->fw_attributes & BIT_2)) { 3336 ha->flags.npiv_supported = 1; 3337 if ((!ha->max_npiv_vports) || 3338 ((ha->max_npiv_vports + 1) % 3339 MIN_MULTI_ID_FABRIC)) 3340 ha->max_npiv_vports = 3341 MIN_MULTI_ID_FABRIC - 1; 3342 } 3343 qla2x00_get_resource_cnts(vha); 3344 3345 /* 3346 * Allocate the array of outstanding commands 3347 * now that we know the firmware resources. 3348 */ 3349 rval = qla2x00_alloc_outstanding_cmds(ha, 3350 vha->req); 3351 if (rval != QLA_SUCCESS) 3352 goto failed; 3353 3354 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3355 qla2x00_alloc_offload_mem(vha); 3356 3357 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3358 qla2x00_alloc_fw_dump(vha); 3359 3360 } else { 3361 goto failed; 3362 } 3363 } else { 3364 ql_log(ql_log_fatal, vha, 0x00cd, 3365 "ISP Firmware failed checksum.\n"); 3366 goto failed; 3367 } 3368 } else 3369 goto failed; 3370 3371 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3372 /* Enable proper parity. */ 3373 spin_lock_irqsave(&ha->hardware_lock, flags); 3374 if (IS_QLA2300(ha)) 3375 /* SRAM parity */ 3376 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3377 else 3378 /* SRAM, Instruction RAM and GP RAM parity */ 3379 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3380 RD_REG_WORD(®->hccr); 3381 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3382 } 3383 3384 if (IS_QLA27XX(ha)) 3385 ha->flags.fac_supported = 1; 3386 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3387 uint32_t size; 3388 3389 rval = qla81xx_fac_get_sector_size(vha, &size); 3390 if (rval == QLA_SUCCESS) { 3391 ha->flags.fac_supported = 1; 3392 ha->fdt_block_size = size << 2; 3393 } else { 3394 ql_log(ql_log_warn, vha, 0x00ce, 3395 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3396 ha->fw_major_version, ha->fw_minor_version, 3397 ha->fw_subminor_version); 3398 3399 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3400 ha->flags.fac_supported = 0; 3401 rval = QLA_SUCCESS; 3402 } 3403 } 3404 } 3405 failed: 3406 if (rval) { 3407 ql_log(ql_log_fatal, vha, 0x00cf, 3408 "Setup chip ****FAILED****.\n"); 3409 } 3410 3411 return (rval); 3412 } 3413 3414 /** 3415 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3416 * @rsp: response queue 3417 * 3418 * Beginning of request ring has initialization control block already built 3419 * by nvram config routine. 3420 * 3421 * Returns 0 on success. 3422 */ 3423 void 3424 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3425 { 3426 uint16_t cnt; 3427 response_t *pkt; 3428 3429 rsp->ring_ptr = rsp->ring; 3430 rsp->ring_index = 0; 3431 rsp->status_srb = NULL; 3432 pkt = rsp->ring_ptr; 3433 for (cnt = 0; cnt < rsp->length; cnt++) { 3434 pkt->signature = RESPONSE_PROCESSED; 3435 pkt++; 3436 } 3437 } 3438 3439 /** 3440 * qla2x00_update_fw_options() - Read and process firmware options. 3441 * @vha: HA context 3442 * 3443 * Returns 0 on success. 3444 */ 3445 void 3446 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3447 { 3448 uint16_t swing, emphasis, tx_sens, rx_sens; 3449 struct qla_hw_data *ha = vha->hw; 3450 3451 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3452 qla2x00_get_fw_options(vha, ha->fw_options); 3453 3454 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3455 return; 3456 3457 /* Serial Link options. */ 3458 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3459 "Serial link options.\n"); 3460 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3461 (uint8_t *)&ha->fw_seriallink_options, 3462 sizeof(ha->fw_seriallink_options)); 3463 3464 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3465 if (ha->fw_seriallink_options[3] & BIT_2) { 3466 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3467 3468 /* 1G settings */ 3469 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3470 emphasis = (ha->fw_seriallink_options[2] & 3471 (BIT_4 | BIT_3)) >> 3; 3472 tx_sens = ha->fw_seriallink_options[0] & 3473 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3474 rx_sens = (ha->fw_seriallink_options[0] & 3475 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3476 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3477 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3478 if (rx_sens == 0x0) 3479 rx_sens = 0x3; 3480 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3481 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3482 ha->fw_options[10] |= BIT_5 | 3483 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3484 (tx_sens & (BIT_1 | BIT_0)); 3485 3486 /* 2G settings */ 3487 swing = (ha->fw_seriallink_options[2] & 3488 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3489 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3490 tx_sens = ha->fw_seriallink_options[1] & 3491 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3492 rx_sens = (ha->fw_seriallink_options[1] & 3493 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3494 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3495 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3496 if (rx_sens == 0x0) 3497 rx_sens = 0x3; 3498 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3499 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3500 ha->fw_options[11] |= BIT_5 | 3501 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3502 (tx_sens & (BIT_1 | BIT_0)); 3503 } 3504 3505 /* FCP2 options. */ 3506 /* Return command IOCBs without waiting for an ABTS to complete. */ 3507 ha->fw_options[3] |= BIT_13; 3508 3509 /* LED scheme. */ 3510 if (ha->flags.enable_led_scheme) 3511 ha->fw_options[2] |= BIT_12; 3512 3513 /* Detect ISP6312. */ 3514 if (IS_QLA6312(ha)) 3515 ha->fw_options[2] |= BIT_13; 3516 3517 /* Set Retry FLOGI in case of P2P connection */ 3518 if (ha->operating_mode == P2P) { 3519 ha->fw_options[2] |= BIT_3; 3520 ql_dbg(ql_dbg_disc, vha, 0x2100, 3521 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3522 __func__, ha->fw_options[2]); 3523 } 3524 3525 /* Update firmware options. */ 3526 qla2x00_set_fw_options(vha, ha->fw_options); 3527 } 3528 3529 void 3530 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3531 { 3532 int rval; 3533 struct qla_hw_data *ha = vha->hw; 3534 3535 if (IS_P3P_TYPE(ha)) 3536 return; 3537 3538 /* Hold status IOCBs until ABTS response received. */ 3539 if (ql2xfwholdabts) 3540 ha->fw_options[3] |= BIT_12; 3541 3542 /* Set Retry FLOGI in case of P2P connection */ 3543 if (ha->operating_mode == P2P) { 3544 ha->fw_options[2] |= BIT_3; 3545 ql_dbg(ql_dbg_disc, vha, 0x2101, 3546 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3547 __func__, ha->fw_options[2]); 3548 } 3549 3550 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3551 if (ql2xmvasynctoatio && 3552 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3553 if (qla_tgt_mode_enabled(vha) || 3554 qla_dual_mode_enabled(vha)) 3555 ha->fw_options[2] |= BIT_11; 3556 else 3557 ha->fw_options[2] &= ~BIT_11; 3558 } 3559 3560 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3561 /* 3562 * Tell FW to track each exchange to prevent 3563 * driver from using stale exchange. 3564 */ 3565 if (qla_tgt_mode_enabled(vha) || 3566 qla_dual_mode_enabled(vha)) 3567 ha->fw_options[2] |= BIT_4; 3568 else 3569 ha->fw_options[2] &= ~BIT_4; 3570 3571 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3572 if (qla2xuseresexchforels) 3573 ha->fw_options[2] |= BIT_8; 3574 else 3575 ha->fw_options[2] &= ~BIT_8; 3576 } 3577 3578 ql_dbg(ql_dbg_init, vha, 0x00e8, 3579 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3580 __func__, ha->fw_options[1], ha->fw_options[2], 3581 ha->fw_options[3], vha->host->active_mode); 3582 3583 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3584 qla2x00_set_fw_options(vha, ha->fw_options); 3585 3586 /* Update Serial Link options. */ 3587 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3588 return; 3589 3590 rval = qla2x00_set_serdes_params(vha, 3591 le16_to_cpu(ha->fw_seriallink_options24[1]), 3592 le16_to_cpu(ha->fw_seriallink_options24[2]), 3593 le16_to_cpu(ha->fw_seriallink_options24[3])); 3594 if (rval != QLA_SUCCESS) { 3595 ql_log(ql_log_warn, vha, 0x0104, 3596 "Unable to update Serial Link options (%x).\n", rval); 3597 } 3598 } 3599 3600 void 3601 qla2x00_config_rings(struct scsi_qla_host *vha) 3602 { 3603 struct qla_hw_data *ha = vha->hw; 3604 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3605 struct req_que *req = ha->req_q_map[0]; 3606 struct rsp_que *rsp = ha->rsp_q_map[0]; 3607 3608 /* Setup ring parameters in initialization control block. */ 3609 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3610 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3611 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3612 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3613 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3614 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3615 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3616 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3617 3618 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3619 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3620 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3621 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3622 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3623 } 3624 3625 void 3626 qla24xx_config_rings(struct scsi_qla_host *vha) 3627 { 3628 struct qla_hw_data *ha = vha->hw; 3629 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3630 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3631 struct qla_msix_entry *msix; 3632 struct init_cb_24xx *icb; 3633 uint16_t rid = 0; 3634 struct req_que *req = ha->req_q_map[0]; 3635 struct rsp_que *rsp = ha->rsp_q_map[0]; 3636 3637 /* Setup ring parameters in initialization control block. */ 3638 icb = (struct init_cb_24xx *)ha->init_cb; 3639 icb->request_q_outpointer = cpu_to_le16(0); 3640 icb->response_q_inpointer = cpu_to_le16(0); 3641 icb->request_q_length = cpu_to_le16(req->length); 3642 icb->response_q_length = cpu_to_le16(rsp->length); 3643 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3644 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3645 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3646 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3647 3648 /* Setup ATIO queue dma pointers for target mode */ 3649 icb->atio_q_inpointer = cpu_to_le16(0); 3650 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3651 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3652 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3653 3654 if (IS_SHADOW_REG_CAPABLE(ha)) 3655 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3656 3657 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3658 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3659 icb->rid = cpu_to_le16(rid); 3660 if (ha->flags.msix_enabled) { 3661 msix = &ha->msix_entries[1]; 3662 ql_dbg(ql_dbg_init, vha, 0x0019, 3663 "Registering vector 0x%x for base que.\n", 3664 msix->entry); 3665 icb->msix = cpu_to_le16(msix->entry); 3666 } 3667 /* Use alternate PCI bus number */ 3668 if (MSB(rid)) 3669 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3670 /* Use alternate PCI devfn */ 3671 if (LSB(rid)) 3672 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3673 3674 /* Use Disable MSIX Handshake mode for capable adapters */ 3675 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3676 (ha->flags.msix_enabled)) { 3677 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3678 ha->flags.disable_msix_handshake = 1; 3679 ql_dbg(ql_dbg_init, vha, 0x00fe, 3680 "MSIX Handshake Disable Mode turned on.\n"); 3681 } else { 3682 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3683 } 3684 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3685 3686 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3687 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3688 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3689 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3690 } else { 3691 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3692 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3693 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3694 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3695 } 3696 qlt_24xx_config_rings(vha); 3697 3698 /* PCI posting */ 3699 RD_REG_DWORD(&ioreg->hccr); 3700 } 3701 3702 /** 3703 * qla2x00_init_rings() - Initializes firmware. 3704 * @vha: HA context 3705 * 3706 * Beginning of request ring has initialization control block already built 3707 * by nvram config routine. 3708 * 3709 * Returns 0 on success. 3710 */ 3711 int 3712 qla2x00_init_rings(scsi_qla_host_t *vha) 3713 { 3714 int rval; 3715 unsigned long flags = 0; 3716 int cnt, que; 3717 struct qla_hw_data *ha = vha->hw; 3718 struct req_que *req; 3719 struct rsp_que *rsp; 3720 struct mid_init_cb_24xx *mid_init_cb = 3721 (struct mid_init_cb_24xx *) ha->init_cb; 3722 3723 spin_lock_irqsave(&ha->hardware_lock, flags); 3724 3725 /* Clear outstanding commands array. */ 3726 for (que = 0; que < ha->max_req_queues; que++) { 3727 req = ha->req_q_map[que]; 3728 if (!req || !test_bit(que, ha->req_qid_map)) 3729 continue; 3730 req->out_ptr = (void *)(req->ring + req->length); 3731 *req->out_ptr = 0; 3732 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3733 req->outstanding_cmds[cnt] = NULL; 3734 3735 req->current_outstanding_cmd = 1; 3736 3737 /* Initialize firmware. */ 3738 req->ring_ptr = req->ring; 3739 req->ring_index = 0; 3740 req->cnt = req->length; 3741 } 3742 3743 for (que = 0; que < ha->max_rsp_queues; que++) { 3744 rsp = ha->rsp_q_map[que]; 3745 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 3746 continue; 3747 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 3748 *rsp->in_ptr = 0; 3749 /* Initialize response queue entries */ 3750 if (IS_QLAFX00(ha)) 3751 qlafx00_init_response_q_entries(rsp); 3752 else 3753 qla2x00_init_response_q_entries(rsp); 3754 } 3755 3756 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 3757 ha->tgt.atio_ring_index = 0; 3758 /* Initialize ATIO queue entries */ 3759 qlt_init_atio_q_entries(vha); 3760 3761 ha->isp_ops->config_rings(vha); 3762 3763 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3764 3765 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 3766 3767 if (IS_QLAFX00(ha)) { 3768 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 3769 goto next_check; 3770 } 3771 3772 /* Update any ISP specific firmware options before initialization. */ 3773 ha->isp_ops->update_fw_options(vha); 3774 3775 if (ha->flags.npiv_supported) { 3776 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 3777 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 3778 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 3779 } 3780 3781 if (IS_FWI2_CAPABLE(ha)) { 3782 mid_init_cb->options = cpu_to_le16(BIT_1); 3783 mid_init_cb->init_cb.execution_throttle = 3784 cpu_to_le16(ha->cur_fw_xcb_count); 3785 ha->flags.dport_enabled = 3786 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 3787 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 3788 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 3789 /* FA-WWPN Status */ 3790 ha->flags.fawwpn_enabled = 3791 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 3792 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 3793 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 3794 } 3795 3796 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 3797 next_check: 3798 if (rval) { 3799 ql_log(ql_log_fatal, vha, 0x00d2, 3800 "Init Firmware **** FAILED ****.\n"); 3801 } else { 3802 ql_dbg(ql_dbg_init, vha, 0x00d3, 3803 "Init Firmware -- success.\n"); 3804 QLA_FW_STARTED(ha); 3805 } 3806 3807 return (rval); 3808 } 3809 3810 /** 3811 * qla2x00_fw_ready() - Waits for firmware ready. 3812 * @vha: HA context 3813 * 3814 * Returns 0 on success. 3815 */ 3816 static int 3817 qla2x00_fw_ready(scsi_qla_host_t *vha) 3818 { 3819 int rval; 3820 unsigned long wtime, mtime, cs84xx_time; 3821 uint16_t min_wait; /* Minimum wait time if loop is down */ 3822 uint16_t wait_time; /* Wait time if loop is coming ready */ 3823 uint16_t state[6]; 3824 struct qla_hw_data *ha = vha->hw; 3825 3826 if (IS_QLAFX00(vha->hw)) 3827 return qlafx00_fw_ready(vha); 3828 3829 rval = QLA_SUCCESS; 3830 3831 /* Time to wait for loop down */ 3832 if (IS_P3P_TYPE(ha)) 3833 min_wait = 30; 3834 else 3835 min_wait = 20; 3836 3837 /* 3838 * Firmware should take at most one RATOV to login, plus 5 seconds for 3839 * our own processing. 3840 */ 3841 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 3842 wait_time = min_wait; 3843 } 3844 3845 /* Min wait time if loop down */ 3846 mtime = jiffies + (min_wait * HZ); 3847 3848 /* wait time before firmware ready */ 3849 wtime = jiffies + (wait_time * HZ); 3850 3851 /* Wait for ISP to finish LIP */ 3852 if (!vha->flags.init_done) 3853 ql_log(ql_log_info, vha, 0x801e, 3854 "Waiting for LIP to complete.\n"); 3855 3856 do { 3857 memset(state, -1, sizeof(state)); 3858 rval = qla2x00_get_firmware_state(vha, state); 3859 if (rval == QLA_SUCCESS) { 3860 if (state[0] < FSTATE_LOSS_OF_SYNC) { 3861 vha->device_flags &= ~DFLG_NO_CABLE; 3862 } 3863 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 3864 ql_dbg(ql_dbg_taskm, vha, 0x801f, 3865 "fw_state=%x 84xx=%x.\n", state[0], 3866 state[2]); 3867 if ((state[2] & FSTATE_LOGGED_IN) && 3868 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 3869 ql_dbg(ql_dbg_taskm, vha, 0x8028, 3870 "Sending verify iocb.\n"); 3871 3872 cs84xx_time = jiffies; 3873 rval = qla84xx_init_chip(vha); 3874 if (rval != QLA_SUCCESS) { 3875 ql_log(ql_log_warn, 3876 vha, 0x8007, 3877 "Init chip failed.\n"); 3878 break; 3879 } 3880 3881 /* Add time taken to initialize. */ 3882 cs84xx_time = jiffies - cs84xx_time; 3883 wtime += cs84xx_time; 3884 mtime += cs84xx_time; 3885 ql_dbg(ql_dbg_taskm, vha, 0x8008, 3886 "Increasing wait time by %ld. " 3887 "New time %ld.\n", cs84xx_time, 3888 wtime); 3889 } 3890 } else if (state[0] == FSTATE_READY) { 3891 ql_dbg(ql_dbg_taskm, vha, 0x8037, 3892 "F/W Ready - OK.\n"); 3893 3894 qla2x00_get_retry_cnt(vha, &ha->retry_count, 3895 &ha->login_timeout, &ha->r_a_tov); 3896 3897 rval = QLA_SUCCESS; 3898 break; 3899 } 3900 3901 rval = QLA_FUNCTION_FAILED; 3902 3903 if (atomic_read(&vha->loop_down_timer) && 3904 state[0] != FSTATE_READY) { 3905 /* Loop down. Timeout on min_wait for states 3906 * other than Wait for Login. 3907 */ 3908 if (time_after_eq(jiffies, mtime)) { 3909 ql_log(ql_log_info, vha, 0x8038, 3910 "Cable is unplugged...\n"); 3911 3912 vha->device_flags |= DFLG_NO_CABLE; 3913 break; 3914 } 3915 } 3916 } else { 3917 /* Mailbox cmd failed. Timeout on min_wait. */ 3918 if (time_after_eq(jiffies, mtime) || 3919 ha->flags.isp82xx_fw_hung) 3920 break; 3921 } 3922 3923 if (time_after_eq(jiffies, wtime)) 3924 break; 3925 3926 /* Delay for a while */ 3927 msleep(500); 3928 } while (1); 3929 3930 ql_dbg(ql_dbg_taskm, vha, 0x803a, 3931 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 3932 state[1], state[2], state[3], state[4], state[5], jiffies); 3933 3934 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 3935 ql_log(ql_log_warn, vha, 0x803b, 3936 "Firmware ready **** FAILED ****.\n"); 3937 } 3938 3939 return (rval); 3940 } 3941 3942 /* 3943 * qla2x00_configure_hba 3944 * Setup adapter context. 3945 * 3946 * Input: 3947 * ha = adapter state pointer. 3948 * 3949 * Returns: 3950 * 0 = success 3951 * 3952 * Context: 3953 * Kernel context. 3954 */ 3955 static int 3956 qla2x00_configure_hba(scsi_qla_host_t *vha) 3957 { 3958 int rval; 3959 uint16_t loop_id; 3960 uint16_t topo; 3961 uint16_t sw_cap; 3962 uint8_t al_pa; 3963 uint8_t area; 3964 uint8_t domain; 3965 char connect_type[22]; 3966 struct qla_hw_data *ha = vha->hw; 3967 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 3968 port_id_t id; 3969 unsigned long flags; 3970 3971 /* Get host addresses. */ 3972 rval = qla2x00_get_adapter_id(vha, 3973 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 3974 if (rval != QLA_SUCCESS) { 3975 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 3976 IS_CNA_CAPABLE(ha) || 3977 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 3978 ql_dbg(ql_dbg_disc, vha, 0x2008, 3979 "Loop is in a transition state.\n"); 3980 } else { 3981 ql_log(ql_log_warn, vha, 0x2009, 3982 "Unable to get host loop ID.\n"); 3983 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 3984 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 3985 ql_log(ql_log_warn, vha, 0x1151, 3986 "Doing link init.\n"); 3987 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 3988 return rval; 3989 } 3990 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3991 } 3992 return (rval); 3993 } 3994 3995 if (topo == 4) { 3996 ql_log(ql_log_info, vha, 0x200a, 3997 "Cannot get topology - retrying.\n"); 3998 return (QLA_FUNCTION_FAILED); 3999 } 4000 4001 vha->loop_id = loop_id; 4002 4003 /* initialize */ 4004 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4005 ha->operating_mode = LOOP; 4006 ha->switch_cap = 0; 4007 4008 switch (topo) { 4009 case 0: 4010 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4011 ha->current_topology = ISP_CFG_NL; 4012 strcpy(connect_type, "(Loop)"); 4013 break; 4014 4015 case 1: 4016 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4017 ha->switch_cap = sw_cap; 4018 ha->current_topology = ISP_CFG_FL; 4019 strcpy(connect_type, "(FL_Port)"); 4020 break; 4021 4022 case 2: 4023 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4024 ha->operating_mode = P2P; 4025 ha->current_topology = ISP_CFG_N; 4026 strcpy(connect_type, "(N_Port-to-N_Port)"); 4027 break; 4028 4029 case 3: 4030 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4031 ha->switch_cap = sw_cap; 4032 ha->operating_mode = P2P; 4033 ha->current_topology = ISP_CFG_F; 4034 strcpy(connect_type, "(F_Port)"); 4035 break; 4036 4037 default: 4038 ql_dbg(ql_dbg_disc, vha, 0x200f, 4039 "HBA in unknown topology %x, using NL.\n", topo); 4040 ha->current_topology = ISP_CFG_NL; 4041 strcpy(connect_type, "(Loop)"); 4042 break; 4043 } 4044 4045 /* Save Host port and loop ID. */ 4046 /* byte order - Big Endian */ 4047 id.b.domain = domain; 4048 id.b.area = area; 4049 id.b.al_pa = al_pa; 4050 id.b.rsvd_1 = 0; 4051 spin_lock_irqsave(&ha->hardware_lock, flags); 4052 qlt_update_host_map(vha, id); 4053 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4054 4055 if (!vha->flags.init_done) 4056 ql_log(ql_log_info, vha, 0x2010, 4057 "Topology - %s, Host Loop address 0x%x.\n", 4058 connect_type, vha->loop_id); 4059 4060 return(rval); 4061 } 4062 4063 inline void 4064 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4065 char *def) 4066 { 4067 char *st, *en; 4068 uint16_t index; 4069 struct qla_hw_data *ha = vha->hw; 4070 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4071 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4072 4073 if (memcmp(model, BINZERO, len) != 0) { 4074 strncpy(ha->model_number, model, len); 4075 st = en = ha->model_number; 4076 en += len - 1; 4077 while (en > st) { 4078 if (*en != 0x20 && *en != 0x00) 4079 break; 4080 *en-- = '\0'; 4081 } 4082 4083 index = (ha->pdev->subsystem_device & 0xff); 4084 if (use_tbl && 4085 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4086 index < QLA_MODEL_NAMES) 4087 strncpy(ha->model_desc, 4088 qla2x00_model_name[index * 2 + 1], 4089 sizeof(ha->model_desc) - 1); 4090 } else { 4091 index = (ha->pdev->subsystem_device & 0xff); 4092 if (use_tbl && 4093 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4094 index < QLA_MODEL_NAMES) { 4095 strcpy(ha->model_number, 4096 qla2x00_model_name[index * 2]); 4097 strncpy(ha->model_desc, 4098 qla2x00_model_name[index * 2 + 1], 4099 sizeof(ha->model_desc) - 1); 4100 } else { 4101 strcpy(ha->model_number, def); 4102 } 4103 } 4104 if (IS_FWI2_CAPABLE(ha)) 4105 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4106 sizeof(ha->model_desc)); 4107 } 4108 4109 /* On sparc systems, obtain port and node WWN from firmware 4110 * properties. 4111 */ 4112 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4113 { 4114 #ifdef CONFIG_SPARC 4115 struct qla_hw_data *ha = vha->hw; 4116 struct pci_dev *pdev = ha->pdev; 4117 struct device_node *dp = pci_device_to_OF_node(pdev); 4118 const u8 *val; 4119 int len; 4120 4121 val = of_get_property(dp, "port-wwn", &len); 4122 if (val && len >= WWN_SIZE) 4123 memcpy(nv->port_name, val, WWN_SIZE); 4124 4125 val = of_get_property(dp, "node-wwn", &len); 4126 if (val && len >= WWN_SIZE) 4127 memcpy(nv->node_name, val, WWN_SIZE); 4128 #endif 4129 } 4130 4131 /* 4132 * NVRAM configuration for ISP 2xxx 4133 * 4134 * Input: 4135 * ha = adapter block pointer. 4136 * 4137 * Output: 4138 * initialization control block in response_ring 4139 * host adapters parameters in host adapter block 4140 * 4141 * Returns: 4142 * 0 = success. 4143 */ 4144 int 4145 qla2x00_nvram_config(scsi_qla_host_t *vha) 4146 { 4147 int rval; 4148 uint8_t chksum = 0; 4149 uint16_t cnt; 4150 uint8_t *dptr1, *dptr2; 4151 struct qla_hw_data *ha = vha->hw; 4152 init_cb_t *icb = ha->init_cb; 4153 nvram_t *nv = ha->nvram; 4154 uint8_t *ptr = ha->nvram; 4155 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4156 4157 rval = QLA_SUCCESS; 4158 4159 /* Determine NVRAM starting address. */ 4160 ha->nvram_size = sizeof(nvram_t); 4161 ha->nvram_base = 0; 4162 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4163 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4164 ha->nvram_base = 0x80; 4165 4166 /* Get NVRAM data and calculate checksum. */ 4167 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4168 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4169 chksum += *ptr++; 4170 4171 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4172 "Contents of NVRAM.\n"); 4173 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4174 (uint8_t *)nv, ha->nvram_size); 4175 4176 /* Bad NVRAM data, set defaults parameters. */ 4177 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4178 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4179 /* Reset NVRAM data. */ 4180 ql_log(ql_log_warn, vha, 0x0064, 4181 "Inconsistent NVRAM " 4182 "detected: checksum=0x%x id=%c version=0x%x.\n", 4183 chksum, nv->id[0], nv->nvram_version); 4184 ql_log(ql_log_warn, vha, 0x0065, 4185 "Falling back to " 4186 "functioning (yet invalid -- WWPN) defaults.\n"); 4187 4188 /* 4189 * Set default initialization control block. 4190 */ 4191 memset(nv, 0, ha->nvram_size); 4192 nv->parameter_block_version = ICB_VERSION; 4193 4194 if (IS_QLA23XX(ha)) { 4195 nv->firmware_options[0] = BIT_2 | BIT_1; 4196 nv->firmware_options[1] = BIT_7 | BIT_5; 4197 nv->add_firmware_options[0] = BIT_5; 4198 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4199 nv->frame_payload_size = 2048; 4200 nv->special_options[1] = BIT_7; 4201 } else if (IS_QLA2200(ha)) { 4202 nv->firmware_options[0] = BIT_2 | BIT_1; 4203 nv->firmware_options[1] = BIT_7 | BIT_5; 4204 nv->add_firmware_options[0] = BIT_5; 4205 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4206 nv->frame_payload_size = 1024; 4207 } else if (IS_QLA2100(ha)) { 4208 nv->firmware_options[0] = BIT_3 | BIT_1; 4209 nv->firmware_options[1] = BIT_5; 4210 nv->frame_payload_size = 1024; 4211 } 4212 4213 nv->max_iocb_allocation = cpu_to_le16(256); 4214 nv->execution_throttle = cpu_to_le16(16); 4215 nv->retry_count = 8; 4216 nv->retry_delay = 1; 4217 4218 nv->port_name[0] = 33; 4219 nv->port_name[3] = 224; 4220 nv->port_name[4] = 139; 4221 4222 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4223 4224 nv->login_timeout = 4; 4225 4226 /* 4227 * Set default host adapter parameters 4228 */ 4229 nv->host_p[1] = BIT_2; 4230 nv->reset_delay = 5; 4231 nv->port_down_retry_count = 8; 4232 nv->max_luns_per_target = cpu_to_le16(8); 4233 nv->link_down_timeout = 60; 4234 4235 rval = 1; 4236 } 4237 4238 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4239 /* 4240 * The SN2 does not provide BIOS emulation which means you can't change 4241 * potentially bogus BIOS settings. Force the use of default settings 4242 * for link rate and frame size. Hope that the rest of the settings 4243 * are valid. 4244 */ 4245 if (ia64_platform_is("sn2")) { 4246 nv->frame_payload_size = 2048; 4247 if (IS_QLA23XX(ha)) 4248 nv->special_options[1] = BIT_7; 4249 } 4250 #endif 4251 4252 /* Reset Initialization control block */ 4253 memset(icb, 0, ha->init_cb_size); 4254 4255 /* 4256 * Setup driver NVRAM options. 4257 */ 4258 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4259 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4260 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4261 nv->firmware_options[1] &= ~BIT_4; 4262 4263 if (IS_QLA23XX(ha)) { 4264 nv->firmware_options[0] |= BIT_2; 4265 nv->firmware_options[0] &= ~BIT_3; 4266 nv->special_options[0] &= ~BIT_6; 4267 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4268 4269 if (IS_QLA2300(ha)) { 4270 if (ha->fb_rev == FPM_2310) { 4271 strcpy(ha->model_number, "QLA2310"); 4272 } else { 4273 strcpy(ha->model_number, "QLA2300"); 4274 } 4275 } else { 4276 qla2x00_set_model_info(vha, nv->model_number, 4277 sizeof(nv->model_number), "QLA23xx"); 4278 } 4279 } else if (IS_QLA2200(ha)) { 4280 nv->firmware_options[0] |= BIT_2; 4281 /* 4282 * 'Point-to-point preferred, else loop' is not a safe 4283 * connection mode setting. 4284 */ 4285 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4286 (BIT_5 | BIT_4)) { 4287 /* Force 'loop preferred, else point-to-point'. */ 4288 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4289 nv->add_firmware_options[0] |= BIT_5; 4290 } 4291 strcpy(ha->model_number, "QLA22xx"); 4292 } else /*if (IS_QLA2100(ha))*/ { 4293 strcpy(ha->model_number, "QLA2100"); 4294 } 4295 4296 /* 4297 * Copy over NVRAM RISC parameter block to initialization control block. 4298 */ 4299 dptr1 = (uint8_t *)icb; 4300 dptr2 = (uint8_t *)&nv->parameter_block_version; 4301 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4302 while (cnt--) 4303 *dptr1++ = *dptr2++; 4304 4305 /* Copy 2nd half. */ 4306 dptr1 = (uint8_t *)icb->add_firmware_options; 4307 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4308 while (cnt--) 4309 *dptr1++ = *dptr2++; 4310 4311 /* Use alternate WWN? */ 4312 if (nv->host_p[1] & BIT_7) { 4313 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4314 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4315 } 4316 4317 /* Prepare nodename */ 4318 if ((icb->firmware_options[1] & BIT_6) == 0) { 4319 /* 4320 * Firmware will apply the following mask if the nodename was 4321 * not provided. 4322 */ 4323 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4324 icb->node_name[0] &= 0xF0; 4325 } 4326 4327 /* 4328 * Set host adapter parameters. 4329 */ 4330 4331 /* 4332 * BIT_7 in the host-parameters section allows for modification to 4333 * internal driver logging. 4334 */ 4335 if (nv->host_p[0] & BIT_7) 4336 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4337 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4338 /* Always load RISC code on non ISP2[12]00 chips. */ 4339 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4340 ha->flags.disable_risc_code_load = 0; 4341 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4342 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4343 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4344 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4345 ha->flags.disable_serdes = 0; 4346 4347 ha->operating_mode = 4348 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4349 4350 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4351 sizeof(ha->fw_seriallink_options)); 4352 4353 /* save HBA serial number */ 4354 ha->serial0 = icb->port_name[5]; 4355 ha->serial1 = icb->port_name[6]; 4356 ha->serial2 = icb->port_name[7]; 4357 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4358 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4359 4360 icb->execution_throttle = cpu_to_le16(0xFFFF); 4361 4362 ha->retry_count = nv->retry_count; 4363 4364 /* Set minimum login_timeout to 4 seconds. */ 4365 if (nv->login_timeout != ql2xlogintimeout) 4366 nv->login_timeout = ql2xlogintimeout; 4367 if (nv->login_timeout < 4) 4368 nv->login_timeout = 4; 4369 ha->login_timeout = nv->login_timeout; 4370 4371 /* Set minimum RATOV to 100 tenths of a second. */ 4372 ha->r_a_tov = 100; 4373 4374 ha->loop_reset_delay = nv->reset_delay; 4375 4376 /* Link Down Timeout = 0: 4377 * 4378 * When Port Down timer expires we will start returning 4379 * I/O's to OS with "DID_NO_CONNECT". 4380 * 4381 * Link Down Timeout != 0: 4382 * 4383 * The driver waits for the link to come up after link down 4384 * before returning I/Os to OS with "DID_NO_CONNECT". 4385 */ 4386 if (nv->link_down_timeout == 0) { 4387 ha->loop_down_abort_time = 4388 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4389 } else { 4390 ha->link_down_timeout = nv->link_down_timeout; 4391 ha->loop_down_abort_time = 4392 (LOOP_DOWN_TIME - ha->link_down_timeout); 4393 } 4394 4395 /* 4396 * Need enough time to try and get the port back. 4397 */ 4398 ha->port_down_retry_count = nv->port_down_retry_count; 4399 if (qlport_down_retry) 4400 ha->port_down_retry_count = qlport_down_retry; 4401 /* Set login_retry_count */ 4402 ha->login_retry_count = nv->retry_count; 4403 if (ha->port_down_retry_count == nv->port_down_retry_count && 4404 ha->port_down_retry_count > 3) 4405 ha->login_retry_count = ha->port_down_retry_count; 4406 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4407 ha->login_retry_count = ha->port_down_retry_count; 4408 if (ql2xloginretrycount) 4409 ha->login_retry_count = ql2xloginretrycount; 4410 4411 icb->lun_enables = cpu_to_le16(0); 4412 icb->command_resource_count = 0; 4413 icb->immediate_notify_resource_count = 0; 4414 icb->timeout = cpu_to_le16(0); 4415 4416 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4417 /* Enable RIO */ 4418 icb->firmware_options[0] &= ~BIT_3; 4419 icb->add_firmware_options[0] &= 4420 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4421 icb->add_firmware_options[0] |= BIT_2; 4422 icb->response_accumulation_timer = 3; 4423 icb->interrupt_delay_timer = 5; 4424 4425 vha->flags.process_response_queue = 1; 4426 } else { 4427 /* Enable ZIO. */ 4428 if (!vha->flags.init_done) { 4429 ha->zio_mode = icb->add_firmware_options[0] & 4430 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4431 ha->zio_timer = icb->interrupt_delay_timer ? 4432 icb->interrupt_delay_timer: 2; 4433 } 4434 icb->add_firmware_options[0] &= 4435 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4436 vha->flags.process_response_queue = 0; 4437 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4438 ha->zio_mode = QLA_ZIO_MODE_6; 4439 4440 ql_log(ql_log_info, vha, 0x0068, 4441 "ZIO mode %d enabled; timer delay (%d us).\n", 4442 ha->zio_mode, ha->zio_timer * 100); 4443 4444 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4445 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4446 vha->flags.process_response_queue = 1; 4447 } 4448 } 4449 4450 if (rval) { 4451 ql_log(ql_log_warn, vha, 0x0069, 4452 "NVRAM configuration failed.\n"); 4453 } 4454 return (rval); 4455 } 4456 4457 static void 4458 qla2x00_rport_del(void *data) 4459 { 4460 fc_port_t *fcport = data; 4461 struct fc_rport *rport; 4462 unsigned long flags; 4463 4464 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4465 rport = fcport->drport ? fcport->drport: fcport->rport; 4466 fcport->drport = NULL; 4467 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4468 if (rport) { 4469 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4470 "%s %8phN. rport %p roles %x\n", 4471 __func__, fcport->port_name, rport, 4472 rport->roles); 4473 4474 fc_remote_port_delete(rport); 4475 } 4476 } 4477 4478 /** 4479 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4480 * @vha: HA context 4481 * @flags: allocation flags 4482 * 4483 * Returns a pointer to the allocated fcport, or NULL, if none available. 4484 */ 4485 fc_port_t * 4486 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4487 { 4488 fc_port_t *fcport; 4489 4490 fcport = kzalloc(sizeof(fc_port_t), flags); 4491 if (!fcport) 4492 return NULL; 4493 4494 /* Setup fcport template structure. */ 4495 fcport->vha = vha; 4496 fcport->port_type = FCT_UNKNOWN; 4497 fcport->loop_id = FC_NO_LOOP_ID; 4498 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4499 fcport->supported_classes = FC_COS_UNSPECIFIED; 4500 4501 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4502 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4503 flags); 4504 fcport->disc_state = DSC_DELETED; 4505 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4506 fcport->deleted = QLA_SESS_DELETED; 4507 fcport->login_retry = vha->hw->login_retry_count; 4508 fcport->logout_on_delete = 1; 4509 4510 if (!fcport->ct_desc.ct_sns) { 4511 ql_log(ql_log_warn, vha, 0xd049, 4512 "Failed to allocate ct_sns request.\n"); 4513 kfree(fcport); 4514 fcport = NULL; 4515 } 4516 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4517 INIT_LIST_HEAD(&fcport->gnl_entry); 4518 INIT_LIST_HEAD(&fcport->list); 4519 4520 return fcport; 4521 } 4522 4523 void 4524 qla2x00_free_fcport(fc_port_t *fcport) 4525 { 4526 if (fcport->ct_desc.ct_sns) { 4527 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4528 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4529 fcport->ct_desc.ct_sns_dma); 4530 4531 fcport->ct_desc.ct_sns = NULL; 4532 } 4533 kfree(fcport); 4534 } 4535 4536 /* 4537 * qla2x00_configure_loop 4538 * Updates Fibre Channel Device Database with what is actually on loop. 4539 * 4540 * Input: 4541 * ha = adapter block pointer. 4542 * 4543 * Returns: 4544 * 0 = success. 4545 * 1 = error. 4546 * 2 = database was full and device was not configured. 4547 */ 4548 static int 4549 qla2x00_configure_loop(scsi_qla_host_t *vha) 4550 { 4551 int rval; 4552 unsigned long flags, save_flags; 4553 struct qla_hw_data *ha = vha->hw; 4554 rval = QLA_SUCCESS; 4555 4556 /* Get Initiator ID */ 4557 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4558 rval = qla2x00_configure_hba(vha); 4559 if (rval != QLA_SUCCESS) { 4560 ql_dbg(ql_dbg_disc, vha, 0x2013, 4561 "Unable to configure HBA.\n"); 4562 return (rval); 4563 } 4564 } 4565 4566 save_flags = flags = vha->dpc_flags; 4567 ql_dbg(ql_dbg_disc, vha, 0x2014, 4568 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4569 4570 /* 4571 * If we have both an RSCN and PORT UPDATE pending then handle them 4572 * both at the same time. 4573 */ 4574 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4575 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4576 4577 qla2x00_get_data_rate(vha); 4578 4579 /* Determine what we need to do */ 4580 if (ha->current_topology == ISP_CFG_FL && 4581 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4582 4583 set_bit(RSCN_UPDATE, &flags); 4584 4585 } else if (ha->current_topology == ISP_CFG_F && 4586 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4587 4588 set_bit(RSCN_UPDATE, &flags); 4589 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4590 4591 } else if (ha->current_topology == ISP_CFG_N) { 4592 clear_bit(RSCN_UPDATE, &flags); 4593 if (ha->flags.rida_fmt2) { 4594 /* With Rida Format 2, the login is already triggered. 4595 * We know who is on the other side of the wire. 4596 * No need to login to do login to find out or drop into 4597 * qla2x00_configure_local_loop(). 4598 */ 4599 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4600 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4601 } else { 4602 if (qla_tgt_mode_enabled(vha)) { 4603 /* allow the other side to start the login */ 4604 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4605 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4606 } 4607 } 4608 } else if (ha->current_topology == ISP_CFG_NL) { 4609 clear_bit(RSCN_UPDATE, &flags); 4610 set_bit(LOCAL_LOOP_UPDATE, &flags); 4611 } else if (!vha->flags.online || 4612 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4613 set_bit(RSCN_UPDATE, &flags); 4614 set_bit(LOCAL_LOOP_UPDATE, &flags); 4615 } 4616 4617 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4618 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4619 ql_dbg(ql_dbg_disc, vha, 0x2015, 4620 "Loop resync needed, failing.\n"); 4621 rval = QLA_FUNCTION_FAILED; 4622 } else 4623 rval = qla2x00_configure_local_loop(vha); 4624 } 4625 4626 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4627 if (LOOP_TRANSITION(vha)) { 4628 ql_dbg(ql_dbg_disc, vha, 0x2099, 4629 "Needs RSCN update and loop transition.\n"); 4630 rval = QLA_FUNCTION_FAILED; 4631 } 4632 else 4633 rval = qla2x00_configure_fabric(vha); 4634 } 4635 4636 if (rval == QLA_SUCCESS) { 4637 if (atomic_read(&vha->loop_down_timer) || 4638 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4639 rval = QLA_FUNCTION_FAILED; 4640 } else { 4641 atomic_set(&vha->loop_state, LOOP_READY); 4642 ql_dbg(ql_dbg_disc, vha, 0x2069, 4643 "LOOP READY.\n"); 4644 ha->flags.fw_init_done = 1; 4645 4646 /* 4647 * Process any ATIO queue entries that came in 4648 * while we weren't online. 4649 */ 4650 if (qla_tgt_mode_enabled(vha) || 4651 qla_dual_mode_enabled(vha)) { 4652 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) { 4653 spin_lock_irqsave(&ha->tgt.atio_lock, 4654 flags); 4655 qlt_24xx_process_atio_queue(vha, 0); 4656 spin_unlock_irqrestore( 4657 &ha->tgt.atio_lock, flags); 4658 } else { 4659 spin_lock_irqsave(&ha->hardware_lock, 4660 flags); 4661 qlt_24xx_process_atio_queue(vha, 1); 4662 spin_unlock_irqrestore( 4663 &ha->hardware_lock, flags); 4664 } 4665 } 4666 } 4667 } 4668 4669 if (rval) { 4670 ql_dbg(ql_dbg_disc, vha, 0x206a, 4671 "%s *** FAILED ***.\n", __func__); 4672 } else { 4673 ql_dbg(ql_dbg_disc, vha, 0x206b, 4674 "%s: exiting normally.\n", __func__); 4675 } 4676 4677 /* Restore state if a resync event occurred during processing */ 4678 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4679 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4680 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4681 if (test_bit(RSCN_UPDATE, &save_flags)) { 4682 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4683 } 4684 } 4685 4686 return (rval); 4687 } 4688 4689 /* 4690 * N2N Login 4691 * Updates Fibre Channel Device Database with local loop devices. 4692 * 4693 * Input: 4694 * ha = adapter block pointer. 4695 * 4696 * Returns: 4697 */ 4698 static int qla24xx_n2n_handle_login(struct scsi_qla_host *vha, 4699 fc_port_t *fcport) 4700 { 4701 struct qla_hw_data *ha = vha->hw; 4702 int res = QLA_SUCCESS, rval; 4703 int greater_wwpn = 0; 4704 int logged_in = 0; 4705 4706 if (ha->current_topology != ISP_CFG_N) 4707 return res; 4708 4709 if (wwn_to_u64(vha->port_name) > 4710 wwn_to_u64(vha->n2n_port_name)) { 4711 ql_dbg(ql_dbg_disc, vha, 0x2002, 4712 "HBA WWPN is greater %llx > target %llx\n", 4713 wwn_to_u64(vha->port_name), 4714 wwn_to_u64(vha->n2n_port_name)); 4715 greater_wwpn = 1; 4716 fcport->d_id.b24 = vha->n2n_id; 4717 } 4718 4719 fcport->loop_id = vha->loop_id; 4720 fcport->fc4f_nvme = 0; 4721 fcport->query = 1; 4722 4723 ql_dbg(ql_dbg_disc, vha, 0x4001, 4724 "Initiate N2N login handler: HBA port_id=%06x loopid=%d\n", 4725 fcport->d_id.b24, vha->loop_id); 4726 4727 /* Fill in member data. */ 4728 if (!greater_wwpn) { 4729 rval = qla2x00_get_port_database(vha, fcport, 0); 4730 ql_dbg(ql_dbg_disc, vha, 0x1051, 4731 "Remote login-state (%x/%x) port_id=%06x loop_id=%x, rval=%d\n", 4732 fcport->current_login_state, fcport->last_login_state, 4733 fcport->d_id.b24, fcport->loop_id, rval); 4734 4735 if (((fcport->current_login_state & 0xf) == 0x4) || 4736 ((fcport->current_login_state & 0xf) == 0x6)) 4737 logged_in = 1; 4738 } 4739 4740 if (logged_in || greater_wwpn) { 4741 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 4742 qla_nvme_register_hba(vha); 4743 4744 /* Set connected N_Port d_id */ 4745 if (vha->flags.nvme_enabled) 4746 fcport->fc4f_nvme = 1; 4747 4748 fcport->scan_state = QLA_FCPORT_FOUND; 4749 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4750 fcport->disc_state = DSC_GNL; 4751 fcport->n2n_flag = 1; 4752 fcport->flags = 3; 4753 vha->hw->flags.gpsc_supported = 0; 4754 4755 if (greater_wwpn) { 4756 ql_dbg(ql_dbg_disc, vha, 0x20e5, 4757 "%s %d PLOGI ELS %8phC\n", 4758 __func__, __LINE__, fcport->port_name); 4759 4760 res = qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI, 4761 fcport, fcport->d_id); 4762 } 4763 4764 if (res != QLA_SUCCESS) { 4765 ql_log(ql_log_info, vha, 0xd04d, 4766 "PLOGI Failed: portid=%06x - retrying\n", 4767 fcport->d_id.b24); 4768 res = QLA_SUCCESS; 4769 } else { 4770 /* State 0x6 means FCP PRLI complete */ 4771 if ((fcport->current_login_state & 0xf) == 0x6) { 4772 ql_dbg(ql_dbg_disc, vha, 0x2118, 4773 "%s %d %8phC post GPDB work\n", 4774 __func__, __LINE__, fcport->port_name); 4775 fcport->chip_reset = 4776 vha->hw->base_qpair->chip_reset; 4777 qla24xx_post_gpdb_work(vha, fcport, 0); 4778 } else { 4779 ql_dbg(ql_dbg_disc, vha, 0x2118, 4780 "%s %d %8phC post NVMe PRLI\n", 4781 __func__, __LINE__, fcport->port_name); 4782 qla24xx_post_prli_work(vha, fcport); 4783 } 4784 } 4785 } else { 4786 /* Wait for next database change */ 4787 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags); 4788 } 4789 4790 return res; 4791 } 4792 4793 /* 4794 * qla2x00_configure_local_loop 4795 * Updates Fibre Channel Device Database with local loop devices. 4796 * 4797 * Input: 4798 * ha = adapter block pointer. 4799 * 4800 * Returns: 4801 * 0 = success. 4802 */ 4803 static int 4804 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4805 { 4806 int rval, rval2; 4807 int found_devs; 4808 int found; 4809 fc_port_t *fcport, *new_fcport; 4810 4811 uint16_t index; 4812 uint16_t entries; 4813 char *id_iter; 4814 uint16_t loop_id; 4815 uint8_t domain, area, al_pa; 4816 struct qla_hw_data *ha = vha->hw; 4817 unsigned long flags; 4818 4819 found_devs = 0; 4820 new_fcport = NULL; 4821 entries = MAX_FIBRE_DEVICES_LOOP; 4822 4823 /* Get list of logged in devices. */ 4824 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4825 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4826 &entries); 4827 if (rval != QLA_SUCCESS) 4828 goto cleanup_allocation; 4829 4830 ql_dbg(ql_dbg_disc, vha, 0x2011, 4831 "Entries in ID list (%d).\n", entries); 4832 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 4833 (uint8_t *)ha->gid_list, 4834 entries * sizeof(struct gid_list_info)); 4835 4836 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4837 fcport->scan_state = QLA_FCPORT_SCAN; 4838 } 4839 4840 /* Allocate temporary fcport for any new fcports discovered. */ 4841 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4842 if (new_fcport == NULL) { 4843 ql_log(ql_log_warn, vha, 0x2012, 4844 "Memory allocation failed for fcport.\n"); 4845 rval = QLA_MEMORY_ALLOC_FAILED; 4846 goto cleanup_allocation; 4847 } 4848 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4849 4850 /* Inititae N2N login. */ 4851 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4852 rval = qla24xx_n2n_handle_login(vha, new_fcport); 4853 if (rval != QLA_SUCCESS) 4854 goto cleanup_allocation; 4855 return QLA_SUCCESS; 4856 } 4857 4858 /* Add devices to port list. */ 4859 id_iter = (char *)ha->gid_list; 4860 for (index = 0; index < entries; index++) { 4861 domain = ((struct gid_list_info *)id_iter)->domain; 4862 area = ((struct gid_list_info *)id_iter)->area; 4863 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 4864 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4865 loop_id = (uint16_t) 4866 ((struct gid_list_info *)id_iter)->loop_id_2100; 4867 else 4868 loop_id = le16_to_cpu( 4869 ((struct gid_list_info *)id_iter)->loop_id); 4870 id_iter += ha->gid_list_info_size; 4871 4872 /* Bypass reserved domain fields. */ 4873 if ((domain & 0xf0) == 0xf0) 4874 continue; 4875 4876 /* Bypass if not same domain and area of adapter. */ 4877 if (area && domain && 4878 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 4879 continue; 4880 4881 /* Bypass invalid local loop ID. */ 4882 if (loop_id > LAST_LOCAL_LOOP_ID) 4883 continue; 4884 4885 memset(new_fcport->port_name, 0, WWN_SIZE); 4886 4887 /* Fill in member data. */ 4888 new_fcport->d_id.b.domain = domain; 4889 new_fcport->d_id.b.area = area; 4890 new_fcport->d_id.b.al_pa = al_pa; 4891 new_fcport->loop_id = loop_id; 4892 new_fcport->scan_state = QLA_FCPORT_FOUND; 4893 4894 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 4895 if (rval2 != QLA_SUCCESS) { 4896 ql_dbg(ql_dbg_disc, vha, 0x2097, 4897 "Failed to retrieve fcport information " 4898 "-- get_port_database=%x, loop_id=0x%04x.\n", 4899 rval2, new_fcport->loop_id); 4900 /* Skip retry if N2N */ 4901 if (ha->current_topology != ISP_CFG_N) { 4902 ql_dbg(ql_dbg_disc, vha, 0x2105, 4903 "Scheduling resync.\n"); 4904 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4905 continue; 4906 } 4907 } 4908 4909 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4910 /* Check for matching device in port list. */ 4911 found = 0; 4912 fcport = NULL; 4913 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4914 if (memcmp(new_fcport->port_name, fcport->port_name, 4915 WWN_SIZE)) 4916 continue; 4917 4918 fcport->flags &= ~FCF_FABRIC_DEVICE; 4919 fcport->loop_id = new_fcport->loop_id; 4920 fcport->port_type = new_fcport->port_type; 4921 fcport->d_id.b24 = new_fcport->d_id.b24; 4922 memcpy(fcport->node_name, new_fcport->node_name, 4923 WWN_SIZE); 4924 fcport->scan_state = QLA_FCPORT_FOUND; 4925 found++; 4926 break; 4927 } 4928 4929 if (!found) { 4930 /* New device, add to fcports list. */ 4931 list_add_tail(&new_fcport->list, &vha->vp_fcports); 4932 4933 /* Allocate a new replacement fcport. */ 4934 fcport = new_fcport; 4935 4936 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4937 4938 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4939 4940 if (new_fcport == NULL) { 4941 ql_log(ql_log_warn, vha, 0xd031, 4942 "Failed to allocate memory for fcport.\n"); 4943 rval = QLA_MEMORY_ALLOC_FAILED; 4944 goto cleanup_allocation; 4945 } 4946 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4947 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4948 } 4949 4950 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4951 4952 /* Base iIDMA settings on HBA port speed. */ 4953 fcport->fp_speed = ha->link_data_rate; 4954 4955 found_devs++; 4956 } 4957 4958 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4959 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 4960 break; 4961 4962 if (fcport->scan_state == QLA_FCPORT_SCAN) { 4963 if ((qla_dual_mode_enabled(vha) || 4964 qla_ini_mode_enabled(vha)) && 4965 atomic_read(&fcport->state) == FCS_ONLINE) { 4966 qla2x00_mark_device_lost(vha, fcport, 4967 ql2xplogiabsentdevice, 0); 4968 if (fcport->loop_id != FC_NO_LOOP_ID && 4969 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 4970 fcport->port_type != FCT_INITIATOR && 4971 fcport->port_type != FCT_BROADCAST) { 4972 ql_dbg(ql_dbg_disc, vha, 0x20f0, 4973 "%s %d %8phC post del sess\n", 4974 __func__, __LINE__, 4975 fcport->port_name); 4976 4977 qlt_schedule_sess_for_deletion(fcport); 4978 continue; 4979 } 4980 } 4981 } 4982 4983 if (fcport->scan_state == QLA_FCPORT_FOUND) 4984 qla24xx_fcport_handle_login(vha, fcport); 4985 } 4986 4987 cleanup_allocation: 4988 kfree(new_fcport); 4989 4990 if (rval != QLA_SUCCESS) { 4991 ql_dbg(ql_dbg_disc, vha, 0x2098, 4992 "Configure local loop error exit: rval=%x.\n", rval); 4993 } 4994 4995 return (rval); 4996 } 4997 4998 static void 4999 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5000 { 5001 int rval; 5002 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5003 struct qla_hw_data *ha = vha->hw; 5004 5005 if (!IS_IIDMA_CAPABLE(ha)) 5006 return; 5007 5008 if (atomic_read(&fcport->state) != FCS_ONLINE) 5009 return; 5010 5011 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5012 fcport->fp_speed > ha->link_data_rate) 5013 return; 5014 5015 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5016 mb); 5017 if (rval != QLA_SUCCESS) { 5018 ql_dbg(ql_dbg_disc, vha, 0x2004, 5019 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5020 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5021 } else { 5022 ql_dbg(ql_dbg_disc, vha, 0x2005, 5023 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5024 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5025 fcport->fp_speed, fcport->port_name); 5026 } 5027 } 5028 5029 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5030 { 5031 qla2x00_iidma_fcport(vha, fcport); 5032 qla24xx_update_fcport_fcp_prio(vha, fcport); 5033 } 5034 5035 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5036 { 5037 struct qla_work_evt *e; 5038 5039 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5040 if (!e) 5041 return QLA_FUNCTION_FAILED; 5042 5043 e->u.fcport.fcport = fcport; 5044 return qla2x00_post_work(vha, e); 5045 } 5046 5047 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5048 static void 5049 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5050 { 5051 struct fc_rport_identifiers rport_ids; 5052 struct fc_rport *rport; 5053 unsigned long flags; 5054 5055 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5056 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5057 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5058 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5059 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5060 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5061 if (!rport) { 5062 ql_log(ql_log_warn, vha, 0x2006, 5063 "Unable to allocate fc remote port.\n"); 5064 return; 5065 } 5066 5067 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5068 *((fc_port_t **)rport->dd_data) = fcport; 5069 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5070 5071 rport->supported_classes = fcport->supported_classes; 5072 5073 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5074 if (fcport->port_type == FCT_INITIATOR) 5075 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5076 if (fcport->port_type == FCT_TARGET) 5077 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5078 5079 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5080 "%s %8phN. rport %p is %s mode\n", 5081 __func__, fcport->port_name, rport, 5082 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5083 5084 fc_remote_port_rolechg(rport, rport_ids.roles); 5085 } 5086 5087 /* 5088 * qla2x00_update_fcport 5089 * Updates device on list. 5090 * 5091 * Input: 5092 * ha = adapter block pointer. 5093 * fcport = port structure pointer. 5094 * 5095 * Return: 5096 * 0 - Success 5097 * BIT_0 - error 5098 * 5099 * Context: 5100 * Kernel context. 5101 */ 5102 void 5103 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5104 { 5105 fcport->vha = vha; 5106 5107 if (IS_SW_RESV_ADDR(fcport->d_id)) 5108 return; 5109 5110 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5111 __func__, fcport->port_name); 5112 5113 if (IS_QLAFX00(vha->hw)) { 5114 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5115 } else { 5116 fcport->login_retry = 0; 5117 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5118 fcport->disc_state = DSC_LOGIN_COMPLETE; 5119 fcport->deleted = 0; 5120 fcport->logout_on_delete = 1; 5121 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5122 } 5123 5124 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5125 qla2x00_iidma_fcport(vha, fcport); 5126 5127 if (fcport->fc4f_nvme) { 5128 qla_nvme_register_remote(vha, fcport); 5129 return; 5130 } 5131 5132 qla24xx_update_fcport_fcp_prio(vha, fcport); 5133 5134 switch (vha->host->active_mode) { 5135 case MODE_INITIATOR: 5136 qla2x00_reg_remote_port(vha, fcport); 5137 break; 5138 case MODE_TARGET: 5139 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5140 !vha->vha_tgt.qla_tgt->tgt_stopped) 5141 qlt_fc_port_added(vha, fcport); 5142 break; 5143 case MODE_DUAL: 5144 qla2x00_reg_remote_port(vha, fcport); 5145 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5146 !vha->vha_tgt.qla_tgt->tgt_stopped) 5147 qlt_fc_port_added(vha, fcport); 5148 break; 5149 default: 5150 break; 5151 } 5152 5153 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5154 if (fcport->id_changed) { 5155 fcport->id_changed = 0; 5156 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5157 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5158 __func__, __LINE__, fcport->port_name, 5159 vha->fcport_count); 5160 qla24xx_post_gfpnid_work(vha, fcport); 5161 } else { 5162 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5163 "%s %d %8phC post gpsc fcp_cnt %d\n", 5164 __func__, __LINE__, fcport->port_name, 5165 vha->fcport_count); 5166 qla24xx_post_gpsc_work(vha, fcport); 5167 } 5168 } 5169 } 5170 5171 /* 5172 * qla2x00_configure_fabric 5173 * Setup SNS devices with loop ID's. 5174 * 5175 * Input: 5176 * ha = adapter block pointer. 5177 * 5178 * Returns: 5179 * 0 = success. 5180 * BIT_0 = error 5181 */ 5182 static int 5183 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5184 { 5185 int rval; 5186 fc_port_t *fcport; 5187 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5188 uint16_t loop_id; 5189 LIST_HEAD(new_fcports); 5190 struct qla_hw_data *ha = vha->hw; 5191 int discovery_gen; 5192 5193 /* If FL port exists, then SNS is present */ 5194 if (IS_FWI2_CAPABLE(ha)) 5195 loop_id = NPH_F_PORT; 5196 else 5197 loop_id = SNS_FL_PORT; 5198 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5199 if (rval != QLA_SUCCESS) { 5200 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5201 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5202 5203 vha->device_flags &= ~SWITCH_FOUND; 5204 return (QLA_SUCCESS); 5205 } 5206 vha->device_flags |= SWITCH_FOUND; 5207 5208 5209 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5210 rval = qla2x00_send_change_request(vha, 0x3, 0); 5211 if (rval != QLA_SUCCESS) 5212 ql_log(ql_log_warn, vha, 0x121, 5213 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5214 rval); 5215 } 5216 5217 5218 do { 5219 qla2x00_mgmt_svr_login(vha); 5220 5221 /* FDMI support. */ 5222 if (ql2xfdmienable && 5223 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5224 qla2x00_fdmi_register(vha); 5225 5226 /* Ensure we are logged into the SNS. */ 5227 loop_id = NPH_SNS_LID(ha); 5228 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5229 0xfc, mb, BIT_1|BIT_0); 5230 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5231 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5232 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5233 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5234 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5235 return rval; 5236 } 5237 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5238 if (qla2x00_rft_id(vha)) { 5239 /* EMPTY */ 5240 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5241 "Register FC-4 TYPE failed.\n"); 5242 if (test_bit(LOOP_RESYNC_NEEDED, 5243 &vha->dpc_flags)) 5244 break; 5245 } 5246 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5247 /* EMPTY */ 5248 ql_dbg(ql_dbg_disc, vha, 0x209a, 5249 "Register FC-4 Features failed.\n"); 5250 if (test_bit(LOOP_RESYNC_NEEDED, 5251 &vha->dpc_flags)) 5252 break; 5253 } 5254 if (vha->flags.nvme_enabled) { 5255 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5256 ql_dbg(ql_dbg_disc, vha, 0x2049, 5257 "Register NVME FC Type Features failed.\n"); 5258 } 5259 } 5260 if (qla2x00_rnn_id(vha)) { 5261 /* EMPTY */ 5262 ql_dbg(ql_dbg_disc, vha, 0x2104, 5263 "Register Node Name failed.\n"); 5264 if (test_bit(LOOP_RESYNC_NEEDED, 5265 &vha->dpc_flags)) 5266 break; 5267 } else if (qla2x00_rsnn_nn(vha)) { 5268 /* EMPTY */ 5269 ql_dbg(ql_dbg_disc, vha, 0x209b, 5270 "Register Symbolic Node Name failed.\n"); 5271 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5272 break; 5273 } 5274 } 5275 5276 5277 /* Mark the time right before querying FW for connected ports. 5278 * This process is long, asynchronous and by the time it's done, 5279 * collected information might not be accurate anymore. E.g. 5280 * disconnected port might have re-connected and a brand new 5281 * session has been created. In this case session's generation 5282 * will be newer than discovery_gen. */ 5283 qlt_do_generation_tick(vha, &discovery_gen); 5284 5285 if (USE_ASYNC_SCAN(ha)) { 5286 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5287 NULL); 5288 if (rval) 5289 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5290 } else { 5291 list_for_each_entry(fcport, &vha->vp_fcports, list) 5292 fcport->scan_state = QLA_FCPORT_SCAN; 5293 5294 rval = qla2x00_find_all_fabric_devs(vha); 5295 } 5296 if (rval != QLA_SUCCESS) 5297 break; 5298 } while (0); 5299 5300 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5301 qla_nvme_register_hba(vha); 5302 5303 if (rval) 5304 ql_dbg(ql_dbg_disc, vha, 0x2068, 5305 "Configure fabric error exit rval=%d.\n", rval); 5306 5307 return (rval); 5308 } 5309 5310 /* 5311 * qla2x00_find_all_fabric_devs 5312 * 5313 * Input: 5314 * ha = adapter block pointer. 5315 * dev = database device entry pointer. 5316 * 5317 * Returns: 5318 * 0 = success. 5319 * 5320 * Context: 5321 * Kernel context. 5322 */ 5323 static int 5324 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5325 { 5326 int rval; 5327 uint16_t loop_id; 5328 fc_port_t *fcport, *new_fcport; 5329 int found; 5330 5331 sw_info_t *swl; 5332 int swl_idx; 5333 int first_dev, last_dev; 5334 port_id_t wrap = {}, nxt_d_id; 5335 struct qla_hw_data *ha = vha->hw; 5336 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5337 unsigned long flags; 5338 5339 rval = QLA_SUCCESS; 5340 5341 /* Try GID_PT to get device list, else GAN. */ 5342 if (!ha->swl) 5343 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5344 GFP_KERNEL); 5345 swl = ha->swl; 5346 if (!swl) { 5347 /*EMPTY*/ 5348 ql_dbg(ql_dbg_disc, vha, 0x209c, 5349 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5350 } else { 5351 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5352 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5353 swl = NULL; 5354 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5355 return rval; 5356 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5357 swl = NULL; 5358 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5359 return rval; 5360 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5361 swl = NULL; 5362 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5363 return rval; 5364 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5365 swl = NULL; 5366 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5367 return rval; 5368 } 5369 5370 /* If other queries succeeded probe for FC-4 type */ 5371 if (swl) { 5372 qla2x00_gff_id(vha, swl); 5373 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5374 return rval; 5375 } 5376 } 5377 swl_idx = 0; 5378 5379 /* Allocate temporary fcport for any new fcports discovered. */ 5380 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5381 if (new_fcport == NULL) { 5382 ql_log(ql_log_warn, vha, 0x209d, 5383 "Failed to allocate memory for fcport.\n"); 5384 return (QLA_MEMORY_ALLOC_FAILED); 5385 } 5386 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5387 /* Set start port ID scan at adapter ID. */ 5388 first_dev = 1; 5389 last_dev = 0; 5390 5391 /* Starting free loop ID. */ 5392 loop_id = ha->min_external_loopid; 5393 for (; loop_id <= ha->max_loop_id; loop_id++) { 5394 if (qla2x00_is_reserved_id(vha, loop_id)) 5395 continue; 5396 5397 if (ha->current_topology == ISP_CFG_FL && 5398 (atomic_read(&vha->loop_down_timer) || 5399 LOOP_TRANSITION(vha))) { 5400 atomic_set(&vha->loop_down_timer, 0); 5401 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5402 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5403 break; 5404 } 5405 5406 if (swl != NULL) { 5407 if (last_dev) { 5408 wrap.b24 = new_fcport->d_id.b24; 5409 } else { 5410 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5411 memcpy(new_fcport->node_name, 5412 swl[swl_idx].node_name, WWN_SIZE); 5413 memcpy(new_fcport->port_name, 5414 swl[swl_idx].port_name, WWN_SIZE); 5415 memcpy(new_fcport->fabric_port_name, 5416 swl[swl_idx].fabric_port_name, WWN_SIZE); 5417 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5418 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5419 5420 new_fcport->nvme_flag = 0; 5421 new_fcport->fc4f_nvme = 0; 5422 if (vha->flags.nvme_enabled && 5423 swl[swl_idx].fc4f_nvme) { 5424 new_fcport->fc4f_nvme = 5425 swl[swl_idx].fc4f_nvme; 5426 ql_log(ql_log_info, vha, 0x2131, 5427 "FOUND: NVME port %8phC as FC Type 28h\n", 5428 new_fcport->port_name); 5429 } 5430 5431 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5432 last_dev = 1; 5433 } 5434 swl_idx++; 5435 } 5436 } else { 5437 /* Send GA_NXT to the switch */ 5438 rval = qla2x00_ga_nxt(vha, new_fcport); 5439 if (rval != QLA_SUCCESS) { 5440 ql_log(ql_log_warn, vha, 0x209e, 5441 "SNS scan failed -- assuming " 5442 "zero-entry result.\n"); 5443 rval = QLA_SUCCESS; 5444 break; 5445 } 5446 } 5447 5448 /* If wrap on switch device list, exit. */ 5449 if (first_dev) { 5450 wrap.b24 = new_fcport->d_id.b24; 5451 first_dev = 0; 5452 } else if (new_fcport->d_id.b24 == wrap.b24) { 5453 ql_dbg(ql_dbg_disc, vha, 0x209f, 5454 "Device wrap (%02x%02x%02x).\n", 5455 new_fcport->d_id.b.domain, 5456 new_fcport->d_id.b.area, 5457 new_fcport->d_id.b.al_pa); 5458 break; 5459 } 5460 5461 /* Bypass if same physical adapter. */ 5462 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5463 continue; 5464 5465 /* Bypass virtual ports of the same host. */ 5466 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5467 continue; 5468 5469 /* Bypass if same domain and area of adapter. */ 5470 if (((new_fcport->d_id.b24 & 0xffff00) == 5471 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5472 ISP_CFG_FL) 5473 continue; 5474 5475 /* Bypass reserved domain fields. */ 5476 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5477 continue; 5478 5479 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5480 if (ql2xgffidenable && 5481 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5482 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5483 continue; 5484 5485 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5486 5487 /* Locate matching device in database. */ 5488 found = 0; 5489 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5490 if (memcmp(new_fcport->port_name, fcport->port_name, 5491 WWN_SIZE)) 5492 continue; 5493 5494 fcport->scan_state = QLA_FCPORT_FOUND; 5495 5496 found++; 5497 5498 /* Update port state. */ 5499 memcpy(fcport->fabric_port_name, 5500 new_fcport->fabric_port_name, WWN_SIZE); 5501 fcport->fp_speed = new_fcport->fp_speed; 5502 5503 /* 5504 * If address the same and state FCS_ONLINE 5505 * (or in target mode), nothing changed. 5506 */ 5507 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5508 (atomic_read(&fcport->state) == FCS_ONLINE || 5509 (vha->host->active_mode == MODE_TARGET))) { 5510 break; 5511 } 5512 5513 /* 5514 * If device was not a fabric device before. 5515 */ 5516 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5517 fcport->d_id.b24 = new_fcport->d_id.b24; 5518 qla2x00_clear_loop_id(fcport); 5519 fcport->flags |= (FCF_FABRIC_DEVICE | 5520 FCF_LOGIN_NEEDED); 5521 break; 5522 } 5523 5524 /* 5525 * Port ID changed or device was marked to be updated; 5526 * Log it out if still logged in and mark it for 5527 * relogin later. 5528 */ 5529 if (qla_tgt_mode_enabled(base_vha)) { 5530 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5531 "port changed FC ID, %8phC" 5532 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5533 fcport->port_name, 5534 fcport->d_id.b.domain, 5535 fcport->d_id.b.area, 5536 fcport->d_id.b.al_pa, 5537 fcport->loop_id, 5538 new_fcport->d_id.b.domain, 5539 new_fcport->d_id.b.area, 5540 new_fcport->d_id.b.al_pa); 5541 fcport->d_id.b24 = new_fcport->d_id.b24; 5542 break; 5543 } 5544 5545 fcport->d_id.b24 = new_fcport->d_id.b24; 5546 fcport->flags |= FCF_LOGIN_NEEDED; 5547 break; 5548 } 5549 5550 if (fcport->fc4f_nvme) { 5551 if (fcport->disc_state == DSC_DELETE_PEND) { 5552 fcport->disc_state = DSC_GNL; 5553 vha->fcport_count--; 5554 fcport->login_succ = 0; 5555 } 5556 } 5557 5558 if (found) { 5559 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5560 continue; 5561 } 5562 /* If device was not in our fcports list, then add it. */ 5563 new_fcport->scan_state = QLA_FCPORT_FOUND; 5564 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5565 5566 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5567 5568 5569 /* Allocate a new replacement fcport. */ 5570 nxt_d_id.b24 = new_fcport->d_id.b24; 5571 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5572 if (new_fcport == NULL) { 5573 ql_log(ql_log_warn, vha, 0xd032, 5574 "Memory allocation failed for fcport.\n"); 5575 return (QLA_MEMORY_ALLOC_FAILED); 5576 } 5577 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5578 new_fcport->d_id.b24 = nxt_d_id.b24; 5579 } 5580 5581 qla2x00_free_fcport(new_fcport); 5582 5583 /* 5584 * Logout all previous fabric dev marked lost, except FCP2 devices. 5585 */ 5586 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5587 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5588 break; 5589 5590 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5591 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5592 continue; 5593 5594 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5595 if ((qla_dual_mode_enabled(vha) || 5596 qla_ini_mode_enabled(vha)) && 5597 atomic_read(&fcport->state) == FCS_ONLINE) { 5598 qla2x00_mark_device_lost(vha, fcport, 5599 ql2xplogiabsentdevice, 0); 5600 if (fcport->loop_id != FC_NO_LOOP_ID && 5601 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5602 fcport->port_type != FCT_INITIATOR && 5603 fcport->port_type != FCT_BROADCAST) { 5604 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5605 "%s %d %8phC post del sess\n", 5606 __func__, __LINE__, 5607 fcport->port_name); 5608 qlt_schedule_sess_for_deletion(fcport); 5609 continue; 5610 } 5611 } 5612 } 5613 5614 if (fcport->scan_state == QLA_FCPORT_FOUND) 5615 qla24xx_fcport_handle_login(vha, fcport); 5616 } 5617 return (rval); 5618 } 5619 5620 /* 5621 * qla2x00_find_new_loop_id 5622 * Scan through our port list and find a new usable loop ID. 5623 * 5624 * Input: 5625 * ha: adapter state pointer. 5626 * dev: port structure pointer. 5627 * 5628 * Returns: 5629 * qla2x00 local function return status code. 5630 * 5631 * Context: 5632 * Kernel context. 5633 */ 5634 int 5635 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5636 { 5637 int rval; 5638 struct qla_hw_data *ha = vha->hw; 5639 unsigned long flags = 0; 5640 5641 rval = QLA_SUCCESS; 5642 5643 spin_lock_irqsave(&ha->vport_slock, flags); 5644 5645 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5646 LOOPID_MAP_SIZE); 5647 if (dev->loop_id >= LOOPID_MAP_SIZE || 5648 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5649 dev->loop_id = FC_NO_LOOP_ID; 5650 rval = QLA_FUNCTION_FAILED; 5651 } else 5652 set_bit(dev->loop_id, ha->loop_id_map); 5653 5654 spin_unlock_irqrestore(&ha->vport_slock, flags); 5655 5656 if (rval == QLA_SUCCESS) 5657 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5658 "Assigning new loopid=%x, portid=%x.\n", 5659 dev->loop_id, dev->d_id.b24); 5660 else 5661 ql_log(ql_log_warn, dev->vha, 0x2087, 5662 "No loop_id's available, portid=%x.\n", 5663 dev->d_id.b24); 5664 5665 return (rval); 5666 } 5667 5668 5669 /* 5670 * qla2x00_fabric_login 5671 * Issue fabric login command. 5672 * 5673 * Input: 5674 * ha = adapter block pointer. 5675 * device = pointer to FC device type structure. 5676 * 5677 * Returns: 5678 * 0 - Login successfully 5679 * 1 - Login failed 5680 * 2 - Initiator device 5681 * 3 - Fatal error 5682 */ 5683 int 5684 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5685 uint16_t *next_loopid) 5686 { 5687 int rval; 5688 int retry; 5689 uint16_t tmp_loopid; 5690 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5691 struct qla_hw_data *ha = vha->hw; 5692 5693 retry = 0; 5694 tmp_loopid = 0; 5695 5696 for (;;) { 5697 ql_dbg(ql_dbg_disc, vha, 0x2000, 5698 "Trying Fabric Login w/loop id 0x%04x for port " 5699 "%02x%02x%02x.\n", 5700 fcport->loop_id, fcport->d_id.b.domain, 5701 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5702 5703 /* Login fcport on switch. */ 5704 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5705 fcport->d_id.b.domain, fcport->d_id.b.area, 5706 fcport->d_id.b.al_pa, mb, BIT_0); 5707 if (rval != QLA_SUCCESS) { 5708 return rval; 5709 } 5710 if (mb[0] == MBS_PORT_ID_USED) { 5711 /* 5712 * Device has another loop ID. The firmware team 5713 * recommends the driver perform an implicit login with 5714 * the specified ID again. The ID we just used is save 5715 * here so we return with an ID that can be tried by 5716 * the next login. 5717 */ 5718 retry++; 5719 tmp_loopid = fcport->loop_id; 5720 fcport->loop_id = mb[1]; 5721 5722 ql_dbg(ql_dbg_disc, vha, 0x2001, 5723 "Fabric Login: port in use - next loop " 5724 "id=0x%04x, port id= %02x%02x%02x.\n", 5725 fcport->loop_id, fcport->d_id.b.domain, 5726 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5727 5728 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5729 /* 5730 * Login succeeded. 5731 */ 5732 if (retry) { 5733 /* A retry occurred before. */ 5734 *next_loopid = tmp_loopid; 5735 } else { 5736 /* 5737 * No retry occurred before. Just increment the 5738 * ID value for next login. 5739 */ 5740 *next_loopid = (fcport->loop_id + 1); 5741 } 5742 5743 if (mb[1] & BIT_0) { 5744 fcport->port_type = FCT_INITIATOR; 5745 } else { 5746 fcport->port_type = FCT_TARGET; 5747 if (mb[1] & BIT_1) { 5748 fcport->flags |= FCF_FCP2_DEVICE; 5749 } 5750 } 5751 5752 if (mb[10] & BIT_0) 5753 fcport->supported_classes |= FC_COS_CLASS2; 5754 if (mb[10] & BIT_1) 5755 fcport->supported_classes |= FC_COS_CLASS3; 5756 5757 if (IS_FWI2_CAPABLE(ha)) { 5758 if (mb[10] & BIT_7) 5759 fcport->flags |= 5760 FCF_CONF_COMP_SUPPORTED; 5761 } 5762 5763 rval = QLA_SUCCESS; 5764 break; 5765 } else if (mb[0] == MBS_LOOP_ID_USED) { 5766 /* 5767 * Loop ID already used, try next loop ID. 5768 */ 5769 fcport->loop_id++; 5770 rval = qla2x00_find_new_loop_id(vha, fcport); 5771 if (rval != QLA_SUCCESS) { 5772 /* Ran out of loop IDs to use */ 5773 break; 5774 } 5775 } else if (mb[0] == MBS_COMMAND_ERROR) { 5776 /* 5777 * Firmware possibly timed out during login. If NO 5778 * retries are left to do then the device is declared 5779 * dead. 5780 */ 5781 *next_loopid = fcport->loop_id; 5782 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5783 fcport->d_id.b.domain, fcport->d_id.b.area, 5784 fcport->d_id.b.al_pa); 5785 qla2x00_mark_device_lost(vha, fcport, 1, 0); 5786 5787 rval = 1; 5788 break; 5789 } else { 5790 /* 5791 * unrecoverable / not handled error 5792 */ 5793 ql_dbg(ql_dbg_disc, vha, 0x2002, 5794 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 5795 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 5796 fcport->d_id.b.area, fcport->d_id.b.al_pa, 5797 fcport->loop_id, jiffies); 5798 5799 *next_loopid = fcport->loop_id; 5800 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5801 fcport->d_id.b.domain, fcport->d_id.b.area, 5802 fcport->d_id.b.al_pa); 5803 qla2x00_clear_loop_id(fcport); 5804 fcport->login_retry = 0; 5805 5806 rval = 3; 5807 break; 5808 } 5809 } 5810 5811 return (rval); 5812 } 5813 5814 /* 5815 * qla2x00_local_device_login 5816 * Issue local device login command. 5817 * 5818 * Input: 5819 * ha = adapter block pointer. 5820 * loop_id = loop id of device to login to. 5821 * 5822 * Returns (Where's the #define!!!!): 5823 * 0 - Login successfully 5824 * 1 - Login failed 5825 * 3 - Fatal error 5826 */ 5827 int 5828 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 5829 { 5830 int rval; 5831 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5832 5833 memset(mb, 0, sizeof(mb)); 5834 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 5835 if (rval == QLA_SUCCESS) { 5836 /* Interrogate mailbox registers for any errors */ 5837 if (mb[0] == MBS_COMMAND_ERROR) 5838 rval = 1; 5839 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 5840 /* device not in PCB table */ 5841 rval = 3; 5842 } 5843 5844 return (rval); 5845 } 5846 5847 /* 5848 * qla2x00_loop_resync 5849 * Resync with fibre channel devices. 5850 * 5851 * Input: 5852 * ha = adapter block pointer. 5853 * 5854 * Returns: 5855 * 0 = success 5856 */ 5857 int 5858 qla2x00_loop_resync(scsi_qla_host_t *vha) 5859 { 5860 int rval = QLA_SUCCESS; 5861 uint32_t wait_time; 5862 struct req_que *req; 5863 struct rsp_que *rsp; 5864 5865 req = vha->req; 5866 rsp = req->rsp; 5867 5868 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5869 if (vha->flags.online) { 5870 if (!(rval = qla2x00_fw_ready(vha))) { 5871 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5872 wait_time = 256; 5873 do { 5874 if (!IS_QLAFX00(vha->hw)) { 5875 /* 5876 * Issue a marker after FW becomes 5877 * ready. 5878 */ 5879 qla2x00_marker(vha, req, rsp, 0, 0, 5880 MK_SYNC_ALL); 5881 vha->marker_needed = 0; 5882 } 5883 5884 /* Remap devices on Loop. */ 5885 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5886 5887 if (IS_QLAFX00(vha->hw)) 5888 qlafx00_configure_devices(vha); 5889 else 5890 qla2x00_configure_loop(vha); 5891 5892 wait_time--; 5893 } while (!atomic_read(&vha->loop_down_timer) && 5894 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5895 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 5896 &vha->dpc_flags))); 5897 } 5898 } 5899 5900 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5901 return (QLA_FUNCTION_FAILED); 5902 5903 if (rval) 5904 ql_dbg(ql_dbg_disc, vha, 0x206c, 5905 "%s *** FAILED ***.\n", __func__); 5906 5907 return (rval); 5908 } 5909 5910 /* 5911 * qla2x00_perform_loop_resync 5912 * Description: This function will set the appropriate flags and call 5913 * qla2x00_loop_resync. If successful loop will be resynced 5914 * Arguments : scsi_qla_host_t pointer 5915 * returm : Success or Failure 5916 */ 5917 5918 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 5919 { 5920 int32_t rval = 0; 5921 5922 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 5923 /*Configure the flags so that resync happens properly*/ 5924 atomic_set(&ha->loop_down_timer, 0); 5925 if (!(ha->device_flags & DFLG_NO_CABLE)) { 5926 atomic_set(&ha->loop_state, LOOP_UP); 5927 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 5928 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 5929 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 5930 5931 rval = qla2x00_loop_resync(ha); 5932 } else 5933 atomic_set(&ha->loop_state, LOOP_DEAD); 5934 5935 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 5936 } 5937 5938 return rval; 5939 } 5940 5941 void 5942 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 5943 { 5944 fc_port_t *fcport; 5945 struct scsi_qla_host *vha; 5946 struct qla_hw_data *ha = base_vha->hw; 5947 unsigned long flags; 5948 5949 spin_lock_irqsave(&ha->vport_slock, flags); 5950 /* Go with deferred removal of rport references. */ 5951 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 5952 atomic_inc(&vha->vref_count); 5953 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5954 if (fcport->drport && 5955 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 5956 spin_unlock_irqrestore(&ha->vport_slock, flags); 5957 qla2x00_rport_del(fcport); 5958 5959 spin_lock_irqsave(&ha->vport_slock, flags); 5960 } 5961 } 5962 atomic_dec(&vha->vref_count); 5963 wake_up(&vha->vref_waitq); 5964 } 5965 spin_unlock_irqrestore(&ha->vport_slock, flags); 5966 } 5967 5968 /* Assumes idc_lock always held on entry */ 5969 void 5970 qla83xx_reset_ownership(scsi_qla_host_t *vha) 5971 { 5972 struct qla_hw_data *ha = vha->hw; 5973 uint32_t drv_presence, drv_presence_mask; 5974 uint32_t dev_part_info1, dev_part_info2, class_type; 5975 uint32_t class_type_mask = 0x3; 5976 uint16_t fcoe_other_function = 0xffff, i; 5977 5978 if (IS_QLA8044(ha)) { 5979 drv_presence = qla8044_rd_direct(vha, 5980 QLA8044_CRB_DRV_ACTIVE_INDEX); 5981 dev_part_info1 = qla8044_rd_direct(vha, 5982 QLA8044_CRB_DEV_PART_INFO_INDEX); 5983 dev_part_info2 = qla8044_rd_direct(vha, 5984 QLA8044_CRB_DEV_PART_INFO2); 5985 } else { 5986 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 5987 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 5988 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 5989 } 5990 for (i = 0; i < 8; i++) { 5991 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 5992 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5993 (i != ha->portnum)) { 5994 fcoe_other_function = i; 5995 break; 5996 } 5997 } 5998 if (fcoe_other_function == 0xffff) { 5999 for (i = 0; i < 8; i++) { 6000 class_type = ((dev_part_info2 >> (i * 4)) & 6001 class_type_mask); 6002 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6003 ((i + 8) != ha->portnum)) { 6004 fcoe_other_function = i + 8; 6005 break; 6006 } 6007 } 6008 } 6009 /* 6010 * Prepare drv-presence mask based on fcoe functions present. 6011 * However consider only valid physical fcoe function numbers (0-15). 6012 */ 6013 drv_presence_mask = ~((1 << (ha->portnum)) | 6014 ((fcoe_other_function == 0xffff) ? 6015 0 : (1 << (fcoe_other_function)))); 6016 6017 /* We are the reset owner iff: 6018 * - No other protocol drivers present. 6019 * - This is the lowest among fcoe functions. */ 6020 if (!(drv_presence & drv_presence_mask) && 6021 (ha->portnum < fcoe_other_function)) { 6022 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6023 "This host is Reset owner.\n"); 6024 ha->flags.nic_core_reset_owner = 1; 6025 } 6026 } 6027 6028 static int 6029 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6030 { 6031 int rval = QLA_SUCCESS; 6032 struct qla_hw_data *ha = vha->hw; 6033 uint32_t drv_ack; 6034 6035 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6036 if (rval == QLA_SUCCESS) { 6037 drv_ack |= (1 << ha->portnum); 6038 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6039 } 6040 6041 return rval; 6042 } 6043 6044 static int 6045 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6046 { 6047 int rval = QLA_SUCCESS; 6048 struct qla_hw_data *ha = vha->hw; 6049 uint32_t drv_ack; 6050 6051 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6052 if (rval == QLA_SUCCESS) { 6053 drv_ack &= ~(1 << ha->portnum); 6054 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6055 } 6056 6057 return rval; 6058 } 6059 6060 static const char * 6061 qla83xx_dev_state_to_string(uint32_t dev_state) 6062 { 6063 switch (dev_state) { 6064 case QLA8XXX_DEV_COLD: 6065 return "COLD/RE-INIT"; 6066 case QLA8XXX_DEV_INITIALIZING: 6067 return "INITIALIZING"; 6068 case QLA8XXX_DEV_READY: 6069 return "READY"; 6070 case QLA8XXX_DEV_NEED_RESET: 6071 return "NEED RESET"; 6072 case QLA8XXX_DEV_NEED_QUIESCENT: 6073 return "NEED QUIESCENT"; 6074 case QLA8XXX_DEV_FAILED: 6075 return "FAILED"; 6076 case QLA8XXX_DEV_QUIESCENT: 6077 return "QUIESCENT"; 6078 default: 6079 return "Unknown"; 6080 } 6081 } 6082 6083 /* Assumes idc-lock always held on entry */ 6084 void 6085 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6086 { 6087 struct qla_hw_data *ha = vha->hw; 6088 uint32_t idc_audit_reg = 0, duration_secs = 0; 6089 6090 switch (audit_type) { 6091 case IDC_AUDIT_TIMESTAMP: 6092 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6093 idc_audit_reg = (ha->portnum) | 6094 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6095 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6096 break; 6097 6098 case IDC_AUDIT_COMPLETION: 6099 duration_secs = ((jiffies_to_msecs(jiffies) - 6100 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6101 idc_audit_reg = (ha->portnum) | 6102 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6103 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6104 break; 6105 6106 default: 6107 ql_log(ql_log_warn, vha, 0xb078, 6108 "Invalid audit type specified.\n"); 6109 break; 6110 } 6111 } 6112 6113 /* Assumes idc_lock always held on entry */ 6114 static int 6115 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6116 { 6117 struct qla_hw_data *ha = vha->hw; 6118 uint32_t idc_control, dev_state; 6119 6120 __qla83xx_get_idc_control(vha, &idc_control); 6121 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6122 ql_log(ql_log_info, vha, 0xb080, 6123 "NIC Core reset has been disabled. idc-control=0x%x\n", 6124 idc_control); 6125 return QLA_FUNCTION_FAILED; 6126 } 6127 6128 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6129 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6130 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6131 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6132 QLA8XXX_DEV_NEED_RESET); 6133 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6134 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6135 } else { 6136 const char *state = qla83xx_dev_state_to_string(dev_state); 6137 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6138 6139 /* SV: XXX: Is timeout required here? */ 6140 /* Wait for IDC state change READY -> NEED_RESET */ 6141 while (dev_state == QLA8XXX_DEV_READY) { 6142 qla83xx_idc_unlock(vha, 0); 6143 msleep(200); 6144 qla83xx_idc_lock(vha, 0); 6145 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6146 } 6147 } 6148 6149 /* Send IDC ack by writing to drv-ack register */ 6150 __qla83xx_set_drv_ack(vha); 6151 6152 return QLA_SUCCESS; 6153 } 6154 6155 int 6156 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6157 { 6158 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6159 } 6160 6161 int 6162 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6163 { 6164 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6165 } 6166 6167 static int 6168 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6169 { 6170 uint32_t drv_presence = 0; 6171 struct qla_hw_data *ha = vha->hw; 6172 6173 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6174 if (drv_presence & (1 << ha->portnum)) 6175 return QLA_SUCCESS; 6176 else 6177 return QLA_TEST_FAILED; 6178 } 6179 6180 int 6181 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6182 { 6183 int rval = QLA_SUCCESS; 6184 struct qla_hw_data *ha = vha->hw; 6185 6186 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6187 "Entered %s().\n", __func__); 6188 6189 if (vha->device_flags & DFLG_DEV_FAILED) { 6190 ql_log(ql_log_warn, vha, 0xb059, 6191 "Device in unrecoverable FAILED state.\n"); 6192 return QLA_FUNCTION_FAILED; 6193 } 6194 6195 qla83xx_idc_lock(vha, 0); 6196 6197 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6198 ql_log(ql_log_warn, vha, 0xb05a, 6199 "Function=0x%x has been removed from IDC participation.\n", 6200 ha->portnum); 6201 rval = QLA_FUNCTION_FAILED; 6202 goto exit; 6203 } 6204 6205 qla83xx_reset_ownership(vha); 6206 6207 rval = qla83xx_initiating_reset(vha); 6208 6209 /* 6210 * Perform reset if we are the reset-owner, 6211 * else wait till IDC state changes to READY/FAILED. 6212 */ 6213 if (rval == QLA_SUCCESS) { 6214 rval = qla83xx_idc_state_handler(vha); 6215 6216 if (rval == QLA_SUCCESS) 6217 ha->flags.nic_core_hung = 0; 6218 __qla83xx_clear_drv_ack(vha); 6219 } 6220 6221 exit: 6222 qla83xx_idc_unlock(vha, 0); 6223 6224 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6225 6226 return rval; 6227 } 6228 6229 int 6230 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6231 { 6232 struct qla_hw_data *ha = vha->hw; 6233 int rval = QLA_FUNCTION_FAILED; 6234 6235 if (!IS_MCTP_CAPABLE(ha)) { 6236 /* This message can be removed from the final version */ 6237 ql_log(ql_log_info, vha, 0x506d, 6238 "This board is not MCTP capable\n"); 6239 return rval; 6240 } 6241 6242 if (!ha->mctp_dump) { 6243 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6244 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6245 6246 if (!ha->mctp_dump) { 6247 ql_log(ql_log_warn, vha, 0x506e, 6248 "Failed to allocate memory for mctp dump\n"); 6249 return rval; 6250 } 6251 } 6252 6253 #define MCTP_DUMP_STR_ADDR 0x00000000 6254 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6255 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6256 if (rval != QLA_SUCCESS) { 6257 ql_log(ql_log_warn, vha, 0x506f, 6258 "Failed to capture mctp dump\n"); 6259 } else { 6260 ql_log(ql_log_info, vha, 0x5070, 6261 "Mctp dump capture for host (%ld/%p).\n", 6262 vha->host_no, ha->mctp_dump); 6263 ha->mctp_dumped = 1; 6264 } 6265 6266 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6267 ha->flags.nic_core_reset_hdlr_active = 1; 6268 rval = qla83xx_restart_nic_firmware(vha); 6269 if (rval) 6270 /* NIC Core reset failed. */ 6271 ql_log(ql_log_warn, vha, 0x5071, 6272 "Failed to restart nic firmware\n"); 6273 else 6274 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6275 "Restarted NIC firmware successfully.\n"); 6276 ha->flags.nic_core_reset_hdlr_active = 0; 6277 } 6278 6279 return rval; 6280 6281 } 6282 6283 /* 6284 * qla2x00_quiesce_io 6285 * Description: This function will block the new I/Os 6286 * Its not aborting any I/Os as context 6287 * is not destroyed during quiescence 6288 * Arguments: scsi_qla_host_t 6289 * return : void 6290 */ 6291 void 6292 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6293 { 6294 struct qla_hw_data *ha = vha->hw; 6295 struct scsi_qla_host *vp; 6296 6297 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6298 "Quiescing I/O - ha=%p.\n", ha); 6299 6300 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6301 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6302 atomic_set(&vha->loop_state, LOOP_DOWN); 6303 qla2x00_mark_all_devices_lost(vha, 0); 6304 list_for_each_entry(vp, &ha->vp_list, list) 6305 qla2x00_mark_all_devices_lost(vp, 0); 6306 } else { 6307 if (!atomic_read(&vha->loop_down_timer)) 6308 atomic_set(&vha->loop_down_timer, 6309 LOOP_DOWN_TIME); 6310 } 6311 /* Wait for pending cmds to complete */ 6312 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6313 } 6314 6315 void 6316 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6317 { 6318 struct qla_hw_data *ha = vha->hw; 6319 struct scsi_qla_host *vp; 6320 unsigned long flags; 6321 fc_port_t *fcport; 6322 u16 i; 6323 6324 /* For ISP82XX, driver waits for completion of the commands. 6325 * online flag should be set. 6326 */ 6327 if (!(IS_P3P_TYPE(ha))) 6328 vha->flags.online = 0; 6329 ha->flags.chip_reset_done = 0; 6330 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6331 vha->qla_stats.total_isp_aborts++; 6332 6333 ql_log(ql_log_info, vha, 0x00af, 6334 "Performing ISP error recovery - ha=%p.\n", ha); 6335 6336 /* For ISP82XX, reset_chip is just disabling interrupts. 6337 * Driver waits for the completion of the commands. 6338 * the interrupts need to be enabled. 6339 */ 6340 if (!(IS_P3P_TYPE(ha))) 6341 ha->isp_ops->reset_chip(vha); 6342 6343 SAVE_TOPO(ha); 6344 ha->flags.rida_fmt2 = 0; 6345 ha->flags.n2n_ae = 0; 6346 ha->flags.lip_ae = 0; 6347 ha->current_topology = 0; 6348 ha->flags.fw_started = 0; 6349 ha->flags.fw_init_done = 0; 6350 ha->base_qpair->chip_reset++; 6351 for (i = 0; i < ha->max_qpairs; i++) { 6352 if (ha->queue_pair_map[i]) 6353 ha->queue_pair_map[i]->chip_reset = 6354 ha->base_qpair->chip_reset; 6355 } 6356 6357 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6358 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6359 atomic_set(&vha->loop_state, LOOP_DOWN); 6360 qla2x00_mark_all_devices_lost(vha, 0); 6361 6362 spin_lock_irqsave(&ha->vport_slock, flags); 6363 list_for_each_entry(vp, &ha->vp_list, list) { 6364 atomic_inc(&vp->vref_count); 6365 spin_unlock_irqrestore(&ha->vport_slock, flags); 6366 6367 qla2x00_mark_all_devices_lost(vp, 0); 6368 6369 spin_lock_irqsave(&ha->vport_slock, flags); 6370 atomic_dec(&vp->vref_count); 6371 } 6372 spin_unlock_irqrestore(&ha->vport_slock, flags); 6373 } else { 6374 if (!atomic_read(&vha->loop_down_timer)) 6375 atomic_set(&vha->loop_down_timer, 6376 LOOP_DOWN_TIME); 6377 } 6378 6379 /* Clear all async request states across all VPs. */ 6380 list_for_each_entry(fcport, &vha->vp_fcports, list) 6381 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6382 spin_lock_irqsave(&ha->vport_slock, flags); 6383 list_for_each_entry(vp, &ha->vp_list, list) { 6384 atomic_inc(&vp->vref_count); 6385 spin_unlock_irqrestore(&ha->vport_slock, flags); 6386 6387 list_for_each_entry(fcport, &vp->vp_fcports, list) 6388 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6389 6390 spin_lock_irqsave(&ha->vport_slock, flags); 6391 atomic_dec(&vp->vref_count); 6392 } 6393 spin_unlock_irqrestore(&ha->vport_slock, flags); 6394 6395 if (!ha->flags.eeh_busy) { 6396 /* Make sure for ISP 82XX IO DMA is complete */ 6397 if (IS_P3P_TYPE(ha)) { 6398 qla82xx_chip_reset_cleanup(vha); 6399 ql_log(ql_log_info, vha, 0x00b4, 6400 "Done chip reset cleanup.\n"); 6401 6402 /* Done waiting for pending commands. 6403 * Reset the online flag. 6404 */ 6405 vha->flags.online = 0; 6406 } 6407 6408 /* Requeue all commands in outstanding command list. */ 6409 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6410 } 6411 /* memory barrier */ 6412 wmb(); 6413 } 6414 6415 /* 6416 * qla2x00_abort_isp 6417 * Resets ISP and aborts all outstanding commands. 6418 * 6419 * Input: 6420 * ha = adapter block pointer. 6421 * 6422 * Returns: 6423 * 0 = success 6424 */ 6425 int 6426 qla2x00_abort_isp(scsi_qla_host_t *vha) 6427 { 6428 int rval; 6429 uint8_t status = 0; 6430 struct qla_hw_data *ha = vha->hw; 6431 struct scsi_qla_host *vp; 6432 struct req_que *req = ha->req_q_map[0]; 6433 unsigned long flags; 6434 6435 if (vha->flags.online) { 6436 qla2x00_abort_isp_cleanup(vha); 6437 6438 if (IS_QLA8031(ha)) { 6439 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6440 "Clearing fcoe driver presence.\n"); 6441 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6442 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6443 "Error while clearing DRV-Presence.\n"); 6444 } 6445 6446 if (unlikely(pci_channel_offline(ha->pdev) && 6447 ha->flags.pci_channel_io_perm_failure)) { 6448 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6449 status = 0; 6450 return status; 6451 } 6452 6453 ha->isp_ops->get_flash_version(vha, req->ring); 6454 6455 ha->isp_ops->nvram_config(vha); 6456 6457 if (!qla2x00_restart_isp(vha)) { 6458 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6459 6460 if (!atomic_read(&vha->loop_down_timer)) { 6461 /* 6462 * Issue marker command only when we are going 6463 * to start the I/O . 6464 */ 6465 vha->marker_needed = 1; 6466 } 6467 6468 vha->flags.online = 1; 6469 6470 ha->isp_ops->enable_intrs(ha); 6471 6472 ha->isp_abort_cnt = 0; 6473 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6474 6475 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6476 qla2x00_get_fw_version(vha); 6477 if (ha->fce) { 6478 ha->flags.fce_enabled = 1; 6479 memset(ha->fce, 0, 6480 fce_calc_size(ha->fce_bufs)); 6481 rval = qla2x00_enable_fce_trace(vha, 6482 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6483 &ha->fce_bufs); 6484 if (rval) { 6485 ql_log(ql_log_warn, vha, 0x8033, 6486 "Unable to reinitialize FCE " 6487 "(%d).\n", rval); 6488 ha->flags.fce_enabled = 0; 6489 } 6490 } 6491 6492 if (ha->eft) { 6493 memset(ha->eft, 0, EFT_SIZE); 6494 rval = qla2x00_enable_eft_trace(vha, 6495 ha->eft_dma, EFT_NUM_BUFFERS); 6496 if (rval) { 6497 ql_log(ql_log_warn, vha, 0x8034, 6498 "Unable to reinitialize EFT " 6499 "(%d).\n", rval); 6500 } 6501 } 6502 } else { /* failed the ISP abort */ 6503 vha->flags.online = 1; 6504 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6505 if (ha->isp_abort_cnt == 0) { 6506 ql_log(ql_log_fatal, vha, 0x8035, 6507 "ISP error recover failed - " 6508 "board disabled.\n"); 6509 /* 6510 * The next call disables the board 6511 * completely. 6512 */ 6513 ha->isp_ops->reset_adapter(vha); 6514 vha->flags.online = 0; 6515 clear_bit(ISP_ABORT_RETRY, 6516 &vha->dpc_flags); 6517 status = 0; 6518 } else { /* schedule another ISP abort */ 6519 ha->isp_abort_cnt--; 6520 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6521 "ISP abort - retry remaining %d.\n", 6522 ha->isp_abort_cnt); 6523 status = 1; 6524 } 6525 } else { 6526 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6527 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6528 "ISP error recovery - retrying (%d) " 6529 "more times.\n", ha->isp_abort_cnt); 6530 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6531 status = 1; 6532 } 6533 } 6534 6535 } 6536 6537 if (!status) { 6538 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6539 qla2x00_configure_hba(vha); 6540 spin_lock_irqsave(&ha->vport_slock, flags); 6541 list_for_each_entry(vp, &ha->vp_list, list) { 6542 if (vp->vp_idx) { 6543 atomic_inc(&vp->vref_count); 6544 spin_unlock_irqrestore(&ha->vport_slock, flags); 6545 6546 qla2x00_vp_abort_isp(vp); 6547 6548 spin_lock_irqsave(&ha->vport_slock, flags); 6549 atomic_dec(&vp->vref_count); 6550 } 6551 } 6552 spin_unlock_irqrestore(&ha->vport_slock, flags); 6553 6554 if (IS_QLA8031(ha)) { 6555 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6556 "Setting back fcoe driver presence.\n"); 6557 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6558 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6559 "Error while setting DRV-Presence.\n"); 6560 } 6561 } else { 6562 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6563 __func__); 6564 } 6565 6566 return(status); 6567 } 6568 6569 /* 6570 * qla2x00_restart_isp 6571 * restarts the ISP after a reset 6572 * 6573 * Input: 6574 * ha = adapter block pointer. 6575 * 6576 * Returns: 6577 * 0 = success 6578 */ 6579 static int 6580 qla2x00_restart_isp(scsi_qla_host_t *vha) 6581 { 6582 int status = 0; 6583 struct qla_hw_data *ha = vha->hw; 6584 struct req_que *req = ha->req_q_map[0]; 6585 struct rsp_que *rsp = ha->rsp_q_map[0]; 6586 6587 /* If firmware needs to be loaded */ 6588 if (qla2x00_isp_firmware(vha)) { 6589 vha->flags.online = 0; 6590 status = ha->isp_ops->chip_diag(vha); 6591 if (!status) 6592 status = qla2x00_setup_chip(vha); 6593 } 6594 6595 if (!status && !(status = qla2x00_init_rings(vha))) { 6596 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6597 ha->flags.chip_reset_done = 1; 6598 6599 /* Initialize the queues in use */ 6600 qla25xx_init_queues(ha); 6601 6602 status = qla2x00_fw_ready(vha); 6603 if (!status) { 6604 /* Issue a marker after FW becomes ready. */ 6605 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6606 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6607 } 6608 6609 /* if no cable then assume it's good */ 6610 if ((vha->device_flags & DFLG_NO_CABLE)) 6611 status = 0; 6612 } 6613 return (status); 6614 } 6615 6616 static int 6617 qla25xx_init_queues(struct qla_hw_data *ha) 6618 { 6619 struct rsp_que *rsp = NULL; 6620 struct req_que *req = NULL; 6621 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6622 int ret = -1; 6623 int i; 6624 6625 for (i = 1; i < ha->max_rsp_queues; i++) { 6626 rsp = ha->rsp_q_map[i]; 6627 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6628 rsp->options &= ~BIT_0; 6629 ret = qla25xx_init_rsp_que(base_vha, rsp); 6630 if (ret != QLA_SUCCESS) 6631 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6632 "%s Rsp que: %d init failed.\n", 6633 __func__, rsp->id); 6634 else 6635 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6636 "%s Rsp que: %d inited.\n", 6637 __func__, rsp->id); 6638 } 6639 } 6640 for (i = 1; i < ha->max_req_queues; i++) { 6641 req = ha->req_q_map[i]; 6642 if (req && test_bit(i, ha->req_qid_map)) { 6643 /* Clear outstanding commands array. */ 6644 req->options &= ~BIT_0; 6645 ret = qla25xx_init_req_que(base_vha, req); 6646 if (ret != QLA_SUCCESS) 6647 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6648 "%s Req que: %d init failed.\n", 6649 __func__, req->id); 6650 else 6651 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6652 "%s Req que: %d inited.\n", 6653 __func__, req->id); 6654 } 6655 } 6656 return ret; 6657 } 6658 6659 /* 6660 * qla2x00_reset_adapter 6661 * Reset adapter. 6662 * 6663 * Input: 6664 * ha = adapter block pointer. 6665 */ 6666 void 6667 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6668 { 6669 unsigned long flags = 0; 6670 struct qla_hw_data *ha = vha->hw; 6671 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6672 6673 vha->flags.online = 0; 6674 ha->isp_ops->disable_intrs(ha); 6675 6676 spin_lock_irqsave(&ha->hardware_lock, flags); 6677 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6678 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6679 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6680 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6681 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6682 } 6683 6684 void 6685 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6686 { 6687 unsigned long flags = 0; 6688 struct qla_hw_data *ha = vha->hw; 6689 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6690 6691 if (IS_P3P_TYPE(ha)) 6692 return; 6693 6694 vha->flags.online = 0; 6695 ha->isp_ops->disable_intrs(ha); 6696 6697 spin_lock_irqsave(&ha->hardware_lock, flags); 6698 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6699 RD_REG_DWORD(®->hccr); 6700 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6701 RD_REG_DWORD(®->hccr); 6702 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6703 6704 if (IS_NOPOLLING_TYPE(ha)) 6705 ha->isp_ops->enable_intrs(ha); 6706 } 6707 6708 /* On sparc systems, obtain port and node WWN from firmware 6709 * properties. 6710 */ 6711 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6712 struct nvram_24xx *nv) 6713 { 6714 #ifdef CONFIG_SPARC 6715 struct qla_hw_data *ha = vha->hw; 6716 struct pci_dev *pdev = ha->pdev; 6717 struct device_node *dp = pci_device_to_OF_node(pdev); 6718 const u8 *val; 6719 int len; 6720 6721 val = of_get_property(dp, "port-wwn", &len); 6722 if (val && len >= WWN_SIZE) 6723 memcpy(nv->port_name, val, WWN_SIZE); 6724 6725 val = of_get_property(dp, "node-wwn", &len); 6726 if (val && len >= WWN_SIZE) 6727 memcpy(nv->node_name, val, WWN_SIZE); 6728 #endif 6729 } 6730 6731 int 6732 qla24xx_nvram_config(scsi_qla_host_t *vha) 6733 { 6734 int rval; 6735 struct init_cb_24xx *icb; 6736 struct nvram_24xx *nv; 6737 uint32_t *dptr; 6738 uint8_t *dptr1, *dptr2; 6739 uint32_t chksum; 6740 uint16_t cnt; 6741 struct qla_hw_data *ha = vha->hw; 6742 6743 rval = QLA_SUCCESS; 6744 icb = (struct init_cb_24xx *)ha->init_cb; 6745 nv = ha->nvram; 6746 6747 /* Determine NVRAM starting address. */ 6748 if (ha->port_no == 0) { 6749 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 6750 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 6751 } else { 6752 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 6753 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 6754 } 6755 6756 ha->nvram_size = sizeof(struct nvram_24xx); 6757 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6758 6759 /* Get VPD data into cache */ 6760 ha->vpd = ha->nvram + VPD_OFFSET; 6761 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 6762 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 6763 6764 /* Get NVRAM data into cache and calculate checksum. */ 6765 dptr = (uint32_t *)nv; 6766 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 6767 ha->nvram_size); 6768 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6769 chksum += le32_to_cpu(*dptr); 6770 6771 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 6772 "Contents of NVRAM\n"); 6773 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 6774 (uint8_t *)nv, ha->nvram_size); 6775 6776 /* Bad NVRAM data, set defaults parameters. */ 6777 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6778 || nv->id[3] != ' ' || 6779 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6780 /* Reset NVRAM data. */ 6781 ql_log(ql_log_warn, vha, 0x006b, 6782 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6783 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 6784 ql_log(ql_log_warn, vha, 0x006c, 6785 "Falling back to functioning (yet invalid -- WWPN) " 6786 "defaults.\n"); 6787 6788 /* 6789 * Set default initialization control block. 6790 */ 6791 memset(nv, 0, ha->nvram_size); 6792 nv->nvram_version = cpu_to_le16(ICB_VERSION); 6793 nv->version = cpu_to_le16(ICB_VERSION); 6794 nv->frame_payload_size = 2048; 6795 nv->execution_throttle = cpu_to_le16(0xFFFF); 6796 nv->exchange_count = cpu_to_le16(0); 6797 nv->hard_address = cpu_to_le16(124); 6798 nv->port_name[0] = 0x21; 6799 nv->port_name[1] = 0x00 + ha->port_no + 1; 6800 nv->port_name[2] = 0x00; 6801 nv->port_name[3] = 0xe0; 6802 nv->port_name[4] = 0x8b; 6803 nv->port_name[5] = 0x1c; 6804 nv->port_name[6] = 0x55; 6805 nv->port_name[7] = 0x86; 6806 nv->node_name[0] = 0x20; 6807 nv->node_name[1] = 0x00; 6808 nv->node_name[2] = 0x00; 6809 nv->node_name[3] = 0xe0; 6810 nv->node_name[4] = 0x8b; 6811 nv->node_name[5] = 0x1c; 6812 nv->node_name[6] = 0x55; 6813 nv->node_name[7] = 0x86; 6814 qla24xx_nvram_wwn_from_ofw(vha, nv); 6815 nv->login_retry_count = cpu_to_le16(8); 6816 nv->interrupt_delay_timer = cpu_to_le16(0); 6817 nv->login_timeout = cpu_to_le16(0); 6818 nv->firmware_options_1 = 6819 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6820 nv->firmware_options_2 = cpu_to_le32(2 << 4); 6821 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 6822 nv->firmware_options_3 = cpu_to_le32(2 << 13); 6823 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 6824 nv->efi_parameters = cpu_to_le32(0); 6825 nv->reset_delay = 5; 6826 nv->max_luns_per_target = cpu_to_le16(128); 6827 nv->port_down_retry_count = cpu_to_le16(30); 6828 nv->link_down_timeout = cpu_to_le16(30); 6829 6830 rval = 1; 6831 } 6832 6833 if (qla_tgt_mode_enabled(vha)) { 6834 /* Don't enable full login after initial LIP */ 6835 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 6836 /* Don't enable LIP full login for initiator */ 6837 nv->host_p &= cpu_to_le32(~BIT_10); 6838 } 6839 6840 qlt_24xx_config_nvram_stage1(vha, nv); 6841 6842 /* Reset Initialization control block */ 6843 memset(icb, 0, ha->init_cb_size); 6844 6845 /* Copy 1st segment. */ 6846 dptr1 = (uint8_t *)icb; 6847 dptr2 = (uint8_t *)&nv->version; 6848 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6849 while (cnt--) 6850 *dptr1++ = *dptr2++; 6851 6852 icb->login_retry_count = nv->login_retry_count; 6853 icb->link_down_on_nos = nv->link_down_on_nos; 6854 6855 /* Copy 2nd segment. */ 6856 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6857 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6858 cnt = (uint8_t *)&icb->reserved_3 - 6859 (uint8_t *)&icb->interrupt_delay_timer; 6860 while (cnt--) 6861 *dptr1++ = *dptr2++; 6862 6863 /* 6864 * Setup driver NVRAM options. 6865 */ 6866 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6867 "QLA2462"); 6868 6869 qlt_24xx_config_nvram_stage2(vha, icb); 6870 6871 if (nv->host_p & cpu_to_le32(BIT_15)) { 6872 /* Use alternate WWN? */ 6873 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6874 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6875 } 6876 6877 /* Prepare nodename */ 6878 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 6879 /* 6880 * Firmware will apply the following mask if the nodename was 6881 * not provided. 6882 */ 6883 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6884 icb->node_name[0] &= 0xF0; 6885 } 6886 6887 /* Set host adapter parameters. */ 6888 ha->flags.disable_risc_code_load = 0; 6889 ha->flags.enable_lip_reset = 0; 6890 ha->flags.enable_lip_full_login = 6891 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6892 ha->flags.enable_target_reset = 6893 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6894 ha->flags.enable_led_scheme = 0; 6895 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6896 6897 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6898 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6899 6900 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 6901 sizeof(ha->fw_seriallink_options24)); 6902 6903 /* save HBA serial number */ 6904 ha->serial0 = icb->port_name[5]; 6905 ha->serial1 = icb->port_name[6]; 6906 ha->serial2 = icb->port_name[7]; 6907 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6908 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6909 6910 icb->execution_throttle = cpu_to_le16(0xFFFF); 6911 6912 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6913 6914 /* Set minimum login_timeout to 4 seconds. */ 6915 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6916 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6917 if (le16_to_cpu(nv->login_timeout) < 4) 6918 nv->login_timeout = cpu_to_le16(4); 6919 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6920 6921 /* Set minimum RATOV to 100 tenths of a second. */ 6922 ha->r_a_tov = 100; 6923 6924 ha->loop_reset_delay = nv->reset_delay; 6925 6926 /* Link Down Timeout = 0: 6927 * 6928 * When Port Down timer expires we will start returning 6929 * I/O's to OS with "DID_NO_CONNECT". 6930 * 6931 * Link Down Timeout != 0: 6932 * 6933 * The driver waits for the link to come up after link down 6934 * before returning I/Os to OS with "DID_NO_CONNECT". 6935 */ 6936 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6937 ha->loop_down_abort_time = 6938 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6939 } else { 6940 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6941 ha->loop_down_abort_time = 6942 (LOOP_DOWN_TIME - ha->link_down_timeout); 6943 } 6944 6945 /* Need enough time to try and get the port back. */ 6946 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6947 if (qlport_down_retry) 6948 ha->port_down_retry_count = qlport_down_retry; 6949 6950 /* Set login_retry_count */ 6951 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6952 if (ha->port_down_retry_count == 6953 le16_to_cpu(nv->port_down_retry_count) && 6954 ha->port_down_retry_count > 3) 6955 ha->login_retry_count = ha->port_down_retry_count; 6956 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6957 ha->login_retry_count = ha->port_down_retry_count; 6958 if (ql2xloginretrycount) 6959 ha->login_retry_count = ql2xloginretrycount; 6960 6961 /* Enable ZIO. */ 6962 if (!vha->flags.init_done) { 6963 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6964 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6965 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6966 le16_to_cpu(icb->interrupt_delay_timer): 2; 6967 } 6968 icb->firmware_options_2 &= cpu_to_le32( 6969 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6970 vha->flags.process_response_queue = 0; 6971 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6972 ha->zio_mode = QLA_ZIO_MODE_6; 6973 6974 ql_log(ql_log_info, vha, 0x006f, 6975 "ZIO mode %d enabled; timer delay (%d us).\n", 6976 ha->zio_mode, ha->zio_timer * 100); 6977 6978 icb->firmware_options_2 |= cpu_to_le32( 6979 (uint32_t)ha->zio_mode); 6980 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6981 vha->flags.process_response_queue = 1; 6982 } 6983 6984 if (rval) { 6985 ql_log(ql_log_warn, vha, 0x0070, 6986 "NVRAM configuration failed.\n"); 6987 } 6988 return (rval); 6989 } 6990 6991 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 6992 { 6993 struct qla27xx_image_status pri_image_status, sec_image_status; 6994 uint8_t valid_pri_image, valid_sec_image; 6995 uint32_t *wptr; 6996 uint32_t cnt, chksum, size; 6997 struct qla_hw_data *ha = vha->hw; 6998 6999 valid_pri_image = valid_sec_image = 1; 7000 ha->active_image = 0; 7001 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 7002 7003 if (!ha->flt_region_img_status_pri) { 7004 valid_pri_image = 0; 7005 goto check_sec_image; 7006 } 7007 7008 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 7009 ha->flt_region_img_status_pri, size); 7010 7011 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7012 ql_dbg(ql_dbg_init, vha, 0x018b, 7013 "Primary image signature (0x%x) not valid\n", 7014 pri_image_status.signature); 7015 valid_pri_image = 0; 7016 goto check_sec_image; 7017 } 7018 7019 wptr = (uint32_t *)(&pri_image_status); 7020 cnt = size; 7021 7022 for (chksum = 0; cnt--; wptr++) 7023 chksum += le32_to_cpu(*wptr); 7024 7025 if (chksum) { 7026 ql_dbg(ql_dbg_init, vha, 0x018c, 7027 "Checksum validation failed for primary image (0x%x)\n", 7028 chksum); 7029 valid_pri_image = 0; 7030 } 7031 7032 check_sec_image: 7033 if (!ha->flt_region_img_status_sec) { 7034 valid_sec_image = 0; 7035 goto check_valid_image; 7036 } 7037 7038 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7039 ha->flt_region_img_status_sec, size); 7040 7041 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7042 ql_dbg(ql_dbg_init, vha, 0x018d, 7043 "Secondary image signature(0x%x) not valid\n", 7044 sec_image_status.signature); 7045 valid_sec_image = 0; 7046 goto check_valid_image; 7047 } 7048 7049 wptr = (uint32_t *)(&sec_image_status); 7050 cnt = size; 7051 for (chksum = 0; cnt--; wptr++) 7052 chksum += le32_to_cpu(*wptr); 7053 if (chksum) { 7054 ql_dbg(ql_dbg_init, vha, 0x018e, 7055 "Checksum validation failed for secondary image (0x%x)\n", 7056 chksum); 7057 valid_sec_image = 0; 7058 } 7059 7060 check_valid_image: 7061 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7062 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7063 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7064 if (!ha->active_image || 7065 pri_image_status.generation_number < 7066 sec_image_status.generation_number) 7067 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7068 } 7069 7070 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n", 7071 ha->active_image == 0 ? "default bootld and fw" : 7072 ha->active_image == 1 ? "primary" : 7073 ha->active_image == 2 ? "secondary" : 7074 "Invalid"); 7075 7076 return ha->active_image; 7077 } 7078 7079 static int 7080 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7081 uint32_t faddr) 7082 { 7083 int rval = QLA_SUCCESS; 7084 int segments, fragment; 7085 uint32_t *dcode, dlen; 7086 uint32_t risc_addr; 7087 uint32_t risc_size; 7088 uint32_t i; 7089 struct qla_hw_data *ha = vha->hw; 7090 struct req_que *req = ha->req_q_map[0]; 7091 7092 ql_dbg(ql_dbg_init, vha, 0x008b, 7093 "FW: Loading firmware from flash (%x).\n", faddr); 7094 7095 rval = QLA_SUCCESS; 7096 7097 segments = FA_RISC_CODE_SEGMENTS; 7098 dcode = (uint32_t *)req->ring; 7099 *srisc_addr = 0; 7100 7101 if (IS_QLA27XX(ha) && 7102 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7103 faddr = ha->flt_region_fw_sec; 7104 7105 /* Validate firmware image by checking version. */ 7106 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7107 for (i = 0; i < 4; i++) 7108 dcode[i] = be32_to_cpu(dcode[i]); 7109 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7110 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7111 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7112 dcode[3] == 0)) { 7113 ql_log(ql_log_fatal, vha, 0x008c, 7114 "Unable to verify the integrity of flash firmware " 7115 "image.\n"); 7116 ql_log(ql_log_fatal, vha, 0x008d, 7117 "Firmware data: %08x %08x %08x %08x.\n", 7118 dcode[0], dcode[1], dcode[2], dcode[3]); 7119 7120 return QLA_FUNCTION_FAILED; 7121 } 7122 7123 while (segments && rval == QLA_SUCCESS) { 7124 /* Read segment's load information. */ 7125 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7126 7127 risc_addr = be32_to_cpu(dcode[2]); 7128 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7129 risc_size = be32_to_cpu(dcode[3]); 7130 7131 fragment = 0; 7132 while (risc_size > 0 && rval == QLA_SUCCESS) { 7133 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7134 if (dlen > risc_size) 7135 dlen = risc_size; 7136 7137 ql_dbg(ql_dbg_init, vha, 0x008e, 7138 "Loading risc segment@ risc addr %x " 7139 "number of dwords 0x%x offset 0x%x.\n", 7140 risc_addr, dlen, faddr); 7141 7142 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7143 for (i = 0; i < dlen; i++) 7144 dcode[i] = swab32(dcode[i]); 7145 7146 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7147 dlen); 7148 if (rval) { 7149 ql_log(ql_log_fatal, vha, 0x008f, 7150 "Failed to load segment %d of firmware.\n", 7151 fragment); 7152 return QLA_FUNCTION_FAILED; 7153 } 7154 7155 faddr += dlen; 7156 risc_addr += dlen; 7157 risc_size -= dlen; 7158 fragment++; 7159 } 7160 7161 /* Next segment. */ 7162 segments--; 7163 } 7164 7165 if (!IS_QLA27XX(ha)) 7166 return rval; 7167 7168 if (ha->fw_dump_template) 7169 vfree(ha->fw_dump_template); 7170 ha->fw_dump_template = NULL; 7171 ha->fw_dump_template_len = 0; 7172 7173 ql_dbg(ql_dbg_init, vha, 0x0161, 7174 "Loading fwdump template from %x\n", faddr); 7175 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7176 risc_size = be32_to_cpu(dcode[2]); 7177 ql_dbg(ql_dbg_init, vha, 0x0162, 7178 "-> array size %x dwords\n", risc_size); 7179 if (risc_size == 0 || risc_size == ~0) 7180 goto default_template; 7181 7182 dlen = (risc_size - 8) * sizeof(*dcode); 7183 ql_dbg(ql_dbg_init, vha, 0x0163, 7184 "-> template allocating %x bytes...\n", dlen); 7185 ha->fw_dump_template = vmalloc(dlen); 7186 if (!ha->fw_dump_template) { 7187 ql_log(ql_log_warn, vha, 0x0164, 7188 "Failed fwdump template allocate %x bytes.\n", risc_size); 7189 goto default_template; 7190 } 7191 7192 faddr += 7; 7193 risc_size -= 8; 7194 dcode = ha->fw_dump_template; 7195 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7196 for (i = 0; i < risc_size; i++) 7197 dcode[i] = le32_to_cpu(dcode[i]); 7198 7199 if (!qla27xx_fwdt_template_valid(dcode)) { 7200 ql_log(ql_log_warn, vha, 0x0165, 7201 "Failed fwdump template validate\n"); 7202 goto default_template; 7203 } 7204 7205 dlen = qla27xx_fwdt_template_size(dcode); 7206 ql_dbg(ql_dbg_init, vha, 0x0166, 7207 "-> template size %x bytes\n", dlen); 7208 if (dlen > risc_size * sizeof(*dcode)) { 7209 ql_log(ql_log_warn, vha, 0x0167, 7210 "Failed fwdump template exceeds array by %zx bytes\n", 7211 (size_t)(dlen - risc_size * sizeof(*dcode))); 7212 goto default_template; 7213 } 7214 ha->fw_dump_template_len = dlen; 7215 return rval; 7216 7217 default_template: 7218 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7219 if (ha->fw_dump_template) 7220 vfree(ha->fw_dump_template); 7221 ha->fw_dump_template = NULL; 7222 ha->fw_dump_template_len = 0; 7223 7224 dlen = qla27xx_fwdt_template_default_size(); 7225 ql_dbg(ql_dbg_init, vha, 0x0169, 7226 "-> template allocating %x bytes...\n", dlen); 7227 ha->fw_dump_template = vmalloc(dlen); 7228 if (!ha->fw_dump_template) { 7229 ql_log(ql_log_warn, vha, 0x016a, 7230 "Failed fwdump template allocate %x bytes.\n", risc_size); 7231 goto failed_template; 7232 } 7233 7234 dcode = ha->fw_dump_template; 7235 risc_size = dlen / sizeof(*dcode); 7236 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7237 for (i = 0; i < risc_size; i++) 7238 dcode[i] = be32_to_cpu(dcode[i]); 7239 7240 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7241 ql_log(ql_log_warn, vha, 0x016b, 7242 "Failed fwdump template validate\n"); 7243 goto failed_template; 7244 } 7245 7246 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7247 ql_dbg(ql_dbg_init, vha, 0x016c, 7248 "-> template size %x bytes\n", dlen); 7249 ha->fw_dump_template_len = dlen; 7250 return rval; 7251 7252 failed_template: 7253 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7254 if (ha->fw_dump_template) 7255 vfree(ha->fw_dump_template); 7256 ha->fw_dump_template = NULL; 7257 ha->fw_dump_template_len = 0; 7258 return rval; 7259 } 7260 7261 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7262 7263 int 7264 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7265 { 7266 int rval; 7267 int i, fragment; 7268 uint16_t *wcode, *fwcode; 7269 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7270 struct fw_blob *blob; 7271 struct qla_hw_data *ha = vha->hw; 7272 struct req_que *req = ha->req_q_map[0]; 7273 7274 /* Load firmware blob. */ 7275 blob = qla2x00_request_firmware(vha); 7276 if (!blob) { 7277 ql_log(ql_log_info, vha, 0x0083, 7278 "Firmware image unavailable.\n"); 7279 ql_log(ql_log_info, vha, 0x0084, 7280 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7281 return QLA_FUNCTION_FAILED; 7282 } 7283 7284 rval = QLA_SUCCESS; 7285 7286 wcode = (uint16_t *)req->ring; 7287 *srisc_addr = 0; 7288 fwcode = (uint16_t *)blob->fw->data; 7289 fwclen = 0; 7290 7291 /* Validate firmware image by checking version. */ 7292 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7293 ql_log(ql_log_fatal, vha, 0x0085, 7294 "Unable to verify integrity of firmware image (%zd).\n", 7295 blob->fw->size); 7296 goto fail_fw_integrity; 7297 } 7298 for (i = 0; i < 4; i++) 7299 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7300 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7301 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7302 wcode[2] == 0 && wcode[3] == 0)) { 7303 ql_log(ql_log_fatal, vha, 0x0086, 7304 "Unable to verify integrity of firmware image.\n"); 7305 ql_log(ql_log_fatal, vha, 0x0087, 7306 "Firmware data: %04x %04x %04x %04x.\n", 7307 wcode[0], wcode[1], wcode[2], wcode[3]); 7308 goto fail_fw_integrity; 7309 } 7310 7311 seg = blob->segs; 7312 while (*seg && rval == QLA_SUCCESS) { 7313 risc_addr = *seg; 7314 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7315 risc_size = be16_to_cpu(fwcode[3]); 7316 7317 /* Validate firmware image size. */ 7318 fwclen += risc_size * sizeof(uint16_t); 7319 if (blob->fw->size < fwclen) { 7320 ql_log(ql_log_fatal, vha, 0x0088, 7321 "Unable to verify integrity of firmware image " 7322 "(%zd).\n", blob->fw->size); 7323 goto fail_fw_integrity; 7324 } 7325 7326 fragment = 0; 7327 while (risc_size > 0 && rval == QLA_SUCCESS) { 7328 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7329 if (wlen > risc_size) 7330 wlen = risc_size; 7331 ql_dbg(ql_dbg_init, vha, 0x0089, 7332 "Loading risc segment@ risc addr %x number of " 7333 "words 0x%x.\n", risc_addr, wlen); 7334 7335 for (i = 0; i < wlen; i++) 7336 wcode[i] = swab16(fwcode[i]); 7337 7338 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7339 wlen); 7340 if (rval) { 7341 ql_log(ql_log_fatal, vha, 0x008a, 7342 "Failed to load segment %d of firmware.\n", 7343 fragment); 7344 break; 7345 } 7346 7347 fwcode += wlen; 7348 risc_addr += wlen; 7349 risc_size -= wlen; 7350 fragment++; 7351 } 7352 7353 /* Next segment. */ 7354 seg++; 7355 } 7356 return rval; 7357 7358 fail_fw_integrity: 7359 return QLA_FUNCTION_FAILED; 7360 } 7361 7362 static int 7363 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7364 { 7365 int rval; 7366 int segments, fragment; 7367 uint32_t *dcode, dlen; 7368 uint32_t risc_addr; 7369 uint32_t risc_size; 7370 uint32_t i; 7371 struct fw_blob *blob; 7372 const uint32_t *fwcode; 7373 uint32_t fwclen; 7374 struct qla_hw_data *ha = vha->hw; 7375 struct req_que *req = ha->req_q_map[0]; 7376 7377 /* Load firmware blob. */ 7378 blob = qla2x00_request_firmware(vha); 7379 if (!blob) { 7380 ql_log(ql_log_warn, vha, 0x0090, 7381 "Firmware image unavailable.\n"); 7382 ql_log(ql_log_warn, vha, 0x0091, 7383 "Firmware images can be retrieved from: " 7384 QLA_FW_URL ".\n"); 7385 7386 return QLA_FUNCTION_FAILED; 7387 } 7388 7389 ql_dbg(ql_dbg_init, vha, 0x0092, 7390 "FW: Loading via request-firmware.\n"); 7391 7392 rval = QLA_SUCCESS; 7393 7394 segments = FA_RISC_CODE_SEGMENTS; 7395 dcode = (uint32_t *)req->ring; 7396 *srisc_addr = 0; 7397 fwcode = (uint32_t *)blob->fw->data; 7398 fwclen = 0; 7399 7400 /* Validate firmware image by checking version. */ 7401 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7402 ql_log(ql_log_fatal, vha, 0x0093, 7403 "Unable to verify integrity of firmware image (%zd).\n", 7404 blob->fw->size); 7405 return QLA_FUNCTION_FAILED; 7406 } 7407 for (i = 0; i < 4; i++) 7408 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7409 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7410 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7411 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7412 dcode[3] == 0)) { 7413 ql_log(ql_log_fatal, vha, 0x0094, 7414 "Unable to verify integrity of firmware image (%zd).\n", 7415 blob->fw->size); 7416 ql_log(ql_log_fatal, vha, 0x0095, 7417 "Firmware data: %08x %08x %08x %08x.\n", 7418 dcode[0], dcode[1], dcode[2], dcode[3]); 7419 return QLA_FUNCTION_FAILED; 7420 } 7421 7422 while (segments && rval == QLA_SUCCESS) { 7423 risc_addr = be32_to_cpu(fwcode[2]); 7424 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7425 risc_size = be32_to_cpu(fwcode[3]); 7426 7427 /* Validate firmware image size. */ 7428 fwclen += risc_size * sizeof(uint32_t); 7429 if (blob->fw->size < fwclen) { 7430 ql_log(ql_log_fatal, vha, 0x0096, 7431 "Unable to verify integrity of firmware image " 7432 "(%zd).\n", blob->fw->size); 7433 return QLA_FUNCTION_FAILED; 7434 } 7435 7436 fragment = 0; 7437 while (risc_size > 0 && rval == QLA_SUCCESS) { 7438 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7439 if (dlen > risc_size) 7440 dlen = risc_size; 7441 7442 ql_dbg(ql_dbg_init, vha, 0x0097, 7443 "Loading risc segment@ risc addr %x " 7444 "number of dwords 0x%x.\n", risc_addr, dlen); 7445 7446 for (i = 0; i < dlen; i++) 7447 dcode[i] = swab32(fwcode[i]); 7448 7449 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7450 dlen); 7451 if (rval) { 7452 ql_log(ql_log_fatal, vha, 0x0098, 7453 "Failed to load segment %d of firmware.\n", 7454 fragment); 7455 return QLA_FUNCTION_FAILED; 7456 } 7457 7458 fwcode += dlen; 7459 risc_addr += dlen; 7460 risc_size -= dlen; 7461 fragment++; 7462 } 7463 7464 /* Next segment. */ 7465 segments--; 7466 } 7467 7468 if (!IS_QLA27XX(ha)) 7469 return rval; 7470 7471 if (ha->fw_dump_template) 7472 vfree(ha->fw_dump_template); 7473 ha->fw_dump_template = NULL; 7474 ha->fw_dump_template_len = 0; 7475 7476 ql_dbg(ql_dbg_init, vha, 0x171, 7477 "Loading fwdump template from %x\n", 7478 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7479 risc_size = be32_to_cpu(fwcode[2]); 7480 ql_dbg(ql_dbg_init, vha, 0x172, 7481 "-> array size %x dwords\n", risc_size); 7482 if (risc_size == 0 || risc_size == ~0) 7483 goto default_template; 7484 7485 dlen = (risc_size - 8) * sizeof(*fwcode); 7486 ql_dbg(ql_dbg_init, vha, 0x0173, 7487 "-> template allocating %x bytes...\n", dlen); 7488 ha->fw_dump_template = vmalloc(dlen); 7489 if (!ha->fw_dump_template) { 7490 ql_log(ql_log_warn, vha, 0x0174, 7491 "Failed fwdump template allocate %x bytes.\n", risc_size); 7492 goto default_template; 7493 } 7494 7495 fwcode += 7; 7496 risc_size -= 8; 7497 dcode = ha->fw_dump_template; 7498 for (i = 0; i < risc_size; i++) 7499 dcode[i] = le32_to_cpu(fwcode[i]); 7500 7501 if (!qla27xx_fwdt_template_valid(dcode)) { 7502 ql_log(ql_log_warn, vha, 0x0175, 7503 "Failed fwdump template validate\n"); 7504 goto default_template; 7505 } 7506 7507 dlen = qla27xx_fwdt_template_size(dcode); 7508 ql_dbg(ql_dbg_init, vha, 0x0176, 7509 "-> template size %x bytes\n", dlen); 7510 if (dlen > risc_size * sizeof(*fwcode)) { 7511 ql_log(ql_log_warn, vha, 0x0177, 7512 "Failed fwdump template exceeds array by %zx bytes\n", 7513 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7514 goto default_template; 7515 } 7516 ha->fw_dump_template_len = dlen; 7517 return rval; 7518 7519 default_template: 7520 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7521 if (ha->fw_dump_template) 7522 vfree(ha->fw_dump_template); 7523 ha->fw_dump_template = NULL; 7524 ha->fw_dump_template_len = 0; 7525 7526 dlen = qla27xx_fwdt_template_default_size(); 7527 ql_dbg(ql_dbg_init, vha, 0x0179, 7528 "-> template allocating %x bytes...\n", dlen); 7529 ha->fw_dump_template = vmalloc(dlen); 7530 if (!ha->fw_dump_template) { 7531 ql_log(ql_log_warn, vha, 0x017a, 7532 "Failed fwdump template allocate %x bytes.\n", risc_size); 7533 goto failed_template; 7534 } 7535 7536 dcode = ha->fw_dump_template; 7537 risc_size = dlen / sizeof(*fwcode); 7538 fwcode = qla27xx_fwdt_template_default(); 7539 for (i = 0; i < risc_size; i++) 7540 dcode[i] = be32_to_cpu(fwcode[i]); 7541 7542 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7543 ql_log(ql_log_warn, vha, 0x017b, 7544 "Failed fwdump template validate\n"); 7545 goto failed_template; 7546 } 7547 7548 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7549 ql_dbg(ql_dbg_init, vha, 0x017c, 7550 "-> template size %x bytes\n", dlen); 7551 ha->fw_dump_template_len = dlen; 7552 return rval; 7553 7554 failed_template: 7555 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7556 if (ha->fw_dump_template) 7557 vfree(ha->fw_dump_template); 7558 ha->fw_dump_template = NULL; 7559 ha->fw_dump_template_len = 0; 7560 return rval; 7561 } 7562 7563 int 7564 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7565 { 7566 int rval; 7567 7568 if (ql2xfwloadbin == 1) 7569 return qla81xx_load_risc(vha, srisc_addr); 7570 7571 /* 7572 * FW Load priority: 7573 * 1) Firmware via request-firmware interface (.bin file). 7574 * 2) Firmware residing in flash. 7575 */ 7576 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7577 if (rval == QLA_SUCCESS) 7578 return rval; 7579 7580 return qla24xx_load_risc_flash(vha, srisc_addr, 7581 vha->hw->flt_region_fw); 7582 } 7583 7584 int 7585 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7586 { 7587 int rval; 7588 struct qla_hw_data *ha = vha->hw; 7589 7590 if (ql2xfwloadbin == 2) 7591 goto try_blob_fw; 7592 7593 /* 7594 * FW Load priority: 7595 * 1) Firmware residing in flash. 7596 * 2) Firmware via request-firmware interface (.bin file). 7597 * 3) Golden-Firmware residing in flash -- limited operation. 7598 */ 7599 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7600 if (rval == QLA_SUCCESS) 7601 return rval; 7602 7603 try_blob_fw: 7604 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7605 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7606 return rval; 7607 7608 ql_log(ql_log_info, vha, 0x0099, 7609 "Attempting to fallback to golden firmware.\n"); 7610 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7611 if (rval != QLA_SUCCESS) 7612 return rval; 7613 7614 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7615 ha->flags.running_gold_fw = 1; 7616 return rval; 7617 } 7618 7619 void 7620 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7621 { 7622 int ret, retries; 7623 struct qla_hw_data *ha = vha->hw; 7624 7625 if (ha->flags.pci_channel_io_perm_failure) 7626 return; 7627 if (!IS_FWI2_CAPABLE(ha)) 7628 return; 7629 if (!ha->fw_major_version) 7630 return; 7631 if (!ha->flags.fw_started) 7632 return; 7633 7634 ret = qla2x00_stop_firmware(vha); 7635 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7636 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7637 ha->isp_ops->reset_chip(vha); 7638 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7639 continue; 7640 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7641 continue; 7642 ql_log(ql_log_info, vha, 0x8015, 7643 "Attempting retry of stop-firmware command.\n"); 7644 ret = qla2x00_stop_firmware(vha); 7645 } 7646 7647 QLA_FW_STOPPED(ha); 7648 ha->flags.fw_init_done = 0; 7649 } 7650 7651 int 7652 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7653 { 7654 int rval = QLA_SUCCESS; 7655 int rval2; 7656 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7657 struct qla_hw_data *ha = vha->hw; 7658 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7659 struct req_que *req; 7660 struct rsp_que *rsp; 7661 7662 if (!vha->vp_idx) 7663 return -EINVAL; 7664 7665 rval = qla2x00_fw_ready(base_vha); 7666 if (vha->qpair) 7667 req = vha->qpair->req; 7668 else 7669 req = ha->req_q_map[0]; 7670 rsp = req->rsp; 7671 7672 if (rval == QLA_SUCCESS) { 7673 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7674 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7675 } 7676 7677 vha->flags.management_server_logged_in = 0; 7678 7679 /* Login to SNS first */ 7680 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7681 BIT_1); 7682 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7683 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7684 ql_dbg(ql_dbg_init, vha, 0x0120, 7685 "Failed SNS login: loop_id=%x, rval2=%d\n", 7686 NPH_SNS, rval2); 7687 else 7688 ql_dbg(ql_dbg_init, vha, 0x0103, 7689 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7690 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7691 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7692 return (QLA_FUNCTION_FAILED); 7693 } 7694 7695 atomic_set(&vha->loop_down_timer, 0); 7696 atomic_set(&vha->loop_state, LOOP_UP); 7697 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7698 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7699 rval = qla2x00_loop_resync(base_vha); 7700 7701 return rval; 7702 } 7703 7704 /* 84XX Support **************************************************************/ 7705 7706 static LIST_HEAD(qla_cs84xx_list); 7707 static DEFINE_MUTEX(qla_cs84xx_mutex); 7708 7709 static struct qla_chip_state_84xx * 7710 qla84xx_get_chip(struct scsi_qla_host *vha) 7711 { 7712 struct qla_chip_state_84xx *cs84xx; 7713 struct qla_hw_data *ha = vha->hw; 7714 7715 mutex_lock(&qla_cs84xx_mutex); 7716 7717 /* Find any shared 84xx chip. */ 7718 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7719 if (cs84xx->bus == ha->pdev->bus) { 7720 kref_get(&cs84xx->kref); 7721 goto done; 7722 } 7723 } 7724 7725 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 7726 if (!cs84xx) 7727 goto done; 7728 7729 kref_init(&cs84xx->kref); 7730 spin_lock_init(&cs84xx->access_lock); 7731 mutex_init(&cs84xx->fw_update_mutex); 7732 cs84xx->bus = ha->pdev->bus; 7733 7734 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 7735 done: 7736 mutex_unlock(&qla_cs84xx_mutex); 7737 return cs84xx; 7738 } 7739 7740 static void 7741 __qla84xx_chip_release(struct kref *kref) 7742 { 7743 struct qla_chip_state_84xx *cs84xx = 7744 container_of(kref, struct qla_chip_state_84xx, kref); 7745 7746 mutex_lock(&qla_cs84xx_mutex); 7747 list_del(&cs84xx->list); 7748 mutex_unlock(&qla_cs84xx_mutex); 7749 kfree(cs84xx); 7750 } 7751 7752 void 7753 qla84xx_put_chip(struct scsi_qla_host *vha) 7754 { 7755 struct qla_hw_data *ha = vha->hw; 7756 if (ha->cs84xx) 7757 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 7758 } 7759 7760 static int 7761 qla84xx_init_chip(scsi_qla_host_t *vha) 7762 { 7763 int rval; 7764 uint16_t status[2]; 7765 struct qla_hw_data *ha = vha->hw; 7766 7767 mutex_lock(&ha->cs84xx->fw_update_mutex); 7768 7769 rval = qla84xx_verify_chip(vha, status); 7770 7771 mutex_unlock(&ha->cs84xx->fw_update_mutex); 7772 7773 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 7774 QLA_SUCCESS; 7775 } 7776 7777 /* 81XX Support **************************************************************/ 7778 7779 int 7780 qla81xx_nvram_config(scsi_qla_host_t *vha) 7781 { 7782 int rval; 7783 struct init_cb_81xx *icb; 7784 struct nvram_81xx *nv; 7785 uint32_t *dptr; 7786 uint8_t *dptr1, *dptr2; 7787 uint32_t chksum; 7788 uint16_t cnt; 7789 struct qla_hw_data *ha = vha->hw; 7790 7791 rval = QLA_SUCCESS; 7792 icb = (struct init_cb_81xx *)ha->init_cb; 7793 nv = ha->nvram; 7794 7795 /* Determine NVRAM starting address. */ 7796 ha->nvram_size = sizeof(struct nvram_81xx); 7797 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7798 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 7799 ha->vpd_size = FA_VPD_SIZE_82XX; 7800 7801 /* Get VPD data into cache */ 7802 ha->vpd = ha->nvram + VPD_OFFSET; 7803 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 7804 ha->vpd_size); 7805 7806 /* Get NVRAM data into cache and calculate checksum. */ 7807 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 7808 ha->nvram_size); 7809 dptr = (uint32_t *)nv; 7810 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7811 chksum += le32_to_cpu(*dptr); 7812 7813 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 7814 "Contents of NVRAM:\n"); 7815 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 7816 (uint8_t *)nv, ha->nvram_size); 7817 7818 /* Bad NVRAM data, set defaults parameters. */ 7819 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7820 || nv->id[3] != ' ' || 7821 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7822 /* Reset NVRAM data. */ 7823 ql_log(ql_log_info, vha, 0x0073, 7824 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 7825 "version=0x%x.\n", chksum, nv->id[0], 7826 le16_to_cpu(nv->nvram_version)); 7827 ql_log(ql_log_info, vha, 0x0074, 7828 "Falling back to functioning (yet invalid -- WWPN) " 7829 "defaults.\n"); 7830 7831 /* 7832 * Set default initialization control block. 7833 */ 7834 memset(nv, 0, ha->nvram_size); 7835 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7836 nv->version = cpu_to_le16(ICB_VERSION); 7837 nv->frame_payload_size = 2048; 7838 nv->execution_throttle = cpu_to_le16(0xFFFF); 7839 nv->exchange_count = cpu_to_le16(0); 7840 nv->port_name[0] = 0x21; 7841 nv->port_name[1] = 0x00 + ha->port_no + 1; 7842 nv->port_name[2] = 0x00; 7843 nv->port_name[3] = 0xe0; 7844 nv->port_name[4] = 0x8b; 7845 nv->port_name[5] = 0x1c; 7846 nv->port_name[6] = 0x55; 7847 nv->port_name[7] = 0x86; 7848 nv->node_name[0] = 0x20; 7849 nv->node_name[1] = 0x00; 7850 nv->node_name[2] = 0x00; 7851 nv->node_name[3] = 0xe0; 7852 nv->node_name[4] = 0x8b; 7853 nv->node_name[5] = 0x1c; 7854 nv->node_name[6] = 0x55; 7855 nv->node_name[7] = 0x86; 7856 nv->login_retry_count = cpu_to_le16(8); 7857 nv->interrupt_delay_timer = cpu_to_le16(0); 7858 nv->login_timeout = cpu_to_le16(0); 7859 nv->firmware_options_1 = 7860 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7861 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7862 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7863 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7864 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7865 nv->efi_parameters = cpu_to_le32(0); 7866 nv->reset_delay = 5; 7867 nv->max_luns_per_target = cpu_to_le16(128); 7868 nv->port_down_retry_count = cpu_to_le16(30); 7869 nv->link_down_timeout = cpu_to_le16(180); 7870 nv->enode_mac[0] = 0x00; 7871 nv->enode_mac[1] = 0xC0; 7872 nv->enode_mac[2] = 0xDD; 7873 nv->enode_mac[3] = 0x04; 7874 nv->enode_mac[4] = 0x05; 7875 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 7876 7877 rval = 1; 7878 } 7879 7880 if (IS_T10_PI_CAPABLE(ha)) 7881 nv->frame_payload_size &= ~7; 7882 7883 qlt_81xx_config_nvram_stage1(vha, nv); 7884 7885 /* Reset Initialization control block */ 7886 memset(icb, 0, ha->init_cb_size); 7887 7888 /* Copy 1st segment. */ 7889 dptr1 = (uint8_t *)icb; 7890 dptr2 = (uint8_t *)&nv->version; 7891 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7892 while (cnt--) 7893 *dptr1++ = *dptr2++; 7894 7895 icb->login_retry_count = nv->login_retry_count; 7896 7897 /* Copy 2nd segment. */ 7898 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7899 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7900 cnt = (uint8_t *)&icb->reserved_5 - 7901 (uint8_t *)&icb->interrupt_delay_timer; 7902 while (cnt--) 7903 *dptr1++ = *dptr2++; 7904 7905 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 7906 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 7907 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 7908 icb->enode_mac[0] = 0x00; 7909 icb->enode_mac[1] = 0xC0; 7910 icb->enode_mac[2] = 0xDD; 7911 icb->enode_mac[3] = 0x04; 7912 icb->enode_mac[4] = 0x05; 7913 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 7914 } 7915 7916 /* Use extended-initialization control block. */ 7917 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 7918 7919 /* 7920 * Setup driver NVRAM options. 7921 */ 7922 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7923 "QLE8XXX"); 7924 7925 qlt_81xx_config_nvram_stage2(vha, icb); 7926 7927 /* Use alternate WWN? */ 7928 if (nv->host_p & cpu_to_le32(BIT_15)) { 7929 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7930 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7931 } 7932 7933 /* Prepare nodename */ 7934 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7935 /* 7936 * Firmware will apply the following mask if the nodename was 7937 * not provided. 7938 */ 7939 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7940 icb->node_name[0] &= 0xF0; 7941 } 7942 7943 /* Set host adapter parameters. */ 7944 ha->flags.disable_risc_code_load = 0; 7945 ha->flags.enable_lip_reset = 0; 7946 ha->flags.enable_lip_full_login = 7947 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7948 ha->flags.enable_target_reset = 7949 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7950 ha->flags.enable_led_scheme = 0; 7951 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7952 7953 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7954 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7955 7956 /* save HBA serial number */ 7957 ha->serial0 = icb->port_name[5]; 7958 ha->serial1 = icb->port_name[6]; 7959 ha->serial2 = icb->port_name[7]; 7960 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7961 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7962 7963 icb->execution_throttle = cpu_to_le16(0xFFFF); 7964 7965 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7966 7967 /* Set minimum login_timeout to 4 seconds. */ 7968 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7969 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7970 if (le16_to_cpu(nv->login_timeout) < 4) 7971 nv->login_timeout = cpu_to_le16(4); 7972 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7973 7974 /* Set minimum RATOV to 100 tenths of a second. */ 7975 ha->r_a_tov = 100; 7976 7977 ha->loop_reset_delay = nv->reset_delay; 7978 7979 /* Link Down Timeout = 0: 7980 * 7981 * When Port Down timer expires we will start returning 7982 * I/O's to OS with "DID_NO_CONNECT". 7983 * 7984 * Link Down Timeout != 0: 7985 * 7986 * The driver waits for the link to come up after link down 7987 * before returning I/Os to OS with "DID_NO_CONNECT". 7988 */ 7989 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7990 ha->loop_down_abort_time = 7991 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7992 } else { 7993 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7994 ha->loop_down_abort_time = 7995 (LOOP_DOWN_TIME - ha->link_down_timeout); 7996 } 7997 7998 /* Need enough time to try and get the port back. */ 7999 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8000 if (qlport_down_retry) 8001 ha->port_down_retry_count = qlport_down_retry; 8002 8003 /* Set login_retry_count */ 8004 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8005 if (ha->port_down_retry_count == 8006 le16_to_cpu(nv->port_down_retry_count) && 8007 ha->port_down_retry_count > 3) 8008 ha->login_retry_count = ha->port_down_retry_count; 8009 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8010 ha->login_retry_count = ha->port_down_retry_count; 8011 if (ql2xloginretrycount) 8012 ha->login_retry_count = ql2xloginretrycount; 8013 8014 /* if not running MSI-X we need handshaking on interrupts */ 8015 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8016 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8017 8018 /* Enable ZIO. */ 8019 if (!vha->flags.init_done) { 8020 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8021 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8022 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8023 le16_to_cpu(icb->interrupt_delay_timer): 2; 8024 } 8025 icb->firmware_options_2 &= cpu_to_le32( 8026 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8027 vha->flags.process_response_queue = 0; 8028 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8029 ha->zio_mode = QLA_ZIO_MODE_6; 8030 8031 ql_log(ql_log_info, vha, 0x0075, 8032 "ZIO mode %d enabled; timer delay (%d us).\n", 8033 ha->zio_mode, 8034 ha->zio_timer * 100); 8035 8036 icb->firmware_options_2 |= cpu_to_le32( 8037 (uint32_t)ha->zio_mode); 8038 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8039 vha->flags.process_response_queue = 1; 8040 } 8041 8042 /* enable RIDA Format2 */ 8043 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 8044 icb->firmware_options_3 |= BIT_0; 8045 8046 if (IS_QLA27XX(ha)) { 8047 icb->firmware_options_3 |= BIT_8; 8048 ql_dbg(ql_log_info, vha, 0x0075, 8049 "Enabling direct connection.\n"); 8050 } 8051 8052 if (rval) { 8053 ql_log(ql_log_warn, vha, 0x0076, 8054 "NVRAM configuration failed.\n"); 8055 } 8056 return (rval); 8057 } 8058 8059 int 8060 qla82xx_restart_isp(scsi_qla_host_t *vha) 8061 { 8062 int status, rval; 8063 struct qla_hw_data *ha = vha->hw; 8064 struct req_que *req = ha->req_q_map[0]; 8065 struct rsp_que *rsp = ha->rsp_q_map[0]; 8066 struct scsi_qla_host *vp; 8067 unsigned long flags; 8068 8069 status = qla2x00_init_rings(vha); 8070 if (!status) { 8071 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8072 ha->flags.chip_reset_done = 1; 8073 8074 status = qla2x00_fw_ready(vha); 8075 if (!status) { 8076 /* Issue a marker after FW becomes ready. */ 8077 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8078 vha->flags.online = 1; 8079 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8080 } 8081 8082 /* if no cable then assume it's good */ 8083 if ((vha->device_flags & DFLG_NO_CABLE)) 8084 status = 0; 8085 } 8086 8087 if (!status) { 8088 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8089 8090 if (!atomic_read(&vha->loop_down_timer)) { 8091 /* 8092 * Issue marker command only when we are going 8093 * to start the I/O . 8094 */ 8095 vha->marker_needed = 1; 8096 } 8097 8098 ha->isp_ops->enable_intrs(ha); 8099 8100 ha->isp_abort_cnt = 0; 8101 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8102 8103 /* Update the firmware version */ 8104 status = qla82xx_check_md_needed(vha); 8105 8106 if (ha->fce) { 8107 ha->flags.fce_enabled = 1; 8108 memset(ha->fce, 0, 8109 fce_calc_size(ha->fce_bufs)); 8110 rval = qla2x00_enable_fce_trace(vha, 8111 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8112 &ha->fce_bufs); 8113 if (rval) { 8114 ql_log(ql_log_warn, vha, 0x8001, 8115 "Unable to reinitialize FCE (%d).\n", 8116 rval); 8117 ha->flags.fce_enabled = 0; 8118 } 8119 } 8120 8121 if (ha->eft) { 8122 memset(ha->eft, 0, EFT_SIZE); 8123 rval = qla2x00_enable_eft_trace(vha, 8124 ha->eft_dma, EFT_NUM_BUFFERS); 8125 if (rval) { 8126 ql_log(ql_log_warn, vha, 0x8010, 8127 "Unable to reinitialize EFT (%d).\n", 8128 rval); 8129 } 8130 } 8131 } 8132 8133 if (!status) { 8134 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8135 "qla82xx_restart_isp succeeded.\n"); 8136 8137 spin_lock_irqsave(&ha->vport_slock, flags); 8138 list_for_each_entry(vp, &ha->vp_list, list) { 8139 if (vp->vp_idx) { 8140 atomic_inc(&vp->vref_count); 8141 spin_unlock_irqrestore(&ha->vport_slock, flags); 8142 8143 qla2x00_vp_abort_isp(vp); 8144 8145 spin_lock_irqsave(&ha->vport_slock, flags); 8146 atomic_dec(&vp->vref_count); 8147 } 8148 } 8149 spin_unlock_irqrestore(&ha->vport_slock, flags); 8150 8151 } else { 8152 ql_log(ql_log_warn, vha, 0x8016, 8153 "qla82xx_restart_isp **** FAILED ****.\n"); 8154 } 8155 8156 return status; 8157 } 8158 8159 void 8160 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8161 { 8162 struct qla_hw_data *ha = vha->hw; 8163 8164 /* Hold status IOCBs until ABTS response received. */ 8165 if (ql2xfwholdabts) 8166 ha->fw_options[3] |= BIT_12; 8167 8168 /* Set Retry FLOGI in case of P2P connection */ 8169 if (ha->operating_mode == P2P) { 8170 ha->fw_options[2] |= BIT_3; 8171 ql_dbg(ql_dbg_disc, vha, 0x2103, 8172 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8173 __func__, ha->fw_options[2]); 8174 } 8175 8176 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8177 if (ql2xmvasynctoatio) { 8178 if (qla_tgt_mode_enabled(vha) || 8179 qla_dual_mode_enabled(vha)) 8180 ha->fw_options[2] |= BIT_11; 8181 else 8182 ha->fw_options[2] &= ~BIT_11; 8183 } 8184 8185 if (qla_tgt_mode_enabled(vha) || 8186 qla_dual_mode_enabled(vha)) { 8187 /* FW auto send SCSI status during */ 8188 ha->fw_options[1] |= BIT_8; 8189 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8190 8191 /* FW perform Exchange validation */ 8192 ha->fw_options[2] |= BIT_4; 8193 } else { 8194 ha->fw_options[1] &= ~BIT_8; 8195 ha->fw_options[10] &= 0x00ff; 8196 8197 ha->fw_options[2] &= ~BIT_4; 8198 } 8199 8200 if (ql2xetsenable) { 8201 /* Enable ETS Burst. */ 8202 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8203 ha->fw_options[2] |= BIT_9; 8204 } 8205 8206 ql_dbg(ql_dbg_init, vha, 0x00e9, 8207 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8208 __func__, ha->fw_options[1], ha->fw_options[2], 8209 ha->fw_options[3], vha->host->active_mode); 8210 8211 qla2x00_set_fw_options(vha, ha->fw_options); 8212 } 8213 8214 /* 8215 * qla24xx_get_fcp_prio 8216 * Gets the fcp cmd priority value for the logged in port. 8217 * Looks for a match of the port descriptors within 8218 * each of the fcp prio config entries. If a match is found, 8219 * the tag (priority) value is returned. 8220 * 8221 * Input: 8222 * vha = scsi host structure pointer. 8223 * fcport = port structure pointer. 8224 * 8225 * Return: 8226 * non-zero (if found) 8227 * -1 (if not found) 8228 * 8229 * Context: 8230 * Kernel context 8231 */ 8232 static int 8233 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8234 { 8235 int i, entries; 8236 uint8_t pid_match, wwn_match; 8237 int priority; 8238 uint32_t pid1, pid2; 8239 uint64_t wwn1, wwn2; 8240 struct qla_fcp_prio_entry *pri_entry; 8241 struct qla_hw_data *ha = vha->hw; 8242 8243 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8244 return -1; 8245 8246 priority = -1; 8247 entries = ha->fcp_prio_cfg->num_entries; 8248 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8249 8250 for (i = 0; i < entries; i++) { 8251 pid_match = wwn_match = 0; 8252 8253 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8254 pri_entry++; 8255 continue; 8256 } 8257 8258 /* check source pid for a match */ 8259 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8260 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8261 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8262 if (pid1 == INVALID_PORT_ID) 8263 pid_match++; 8264 else if (pid1 == pid2) 8265 pid_match++; 8266 } 8267 8268 /* check destination pid for a match */ 8269 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8270 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8271 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8272 if (pid1 == INVALID_PORT_ID) 8273 pid_match++; 8274 else if (pid1 == pid2) 8275 pid_match++; 8276 } 8277 8278 /* check source WWN for a match */ 8279 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8280 wwn1 = wwn_to_u64(vha->port_name); 8281 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8282 if (wwn2 == (uint64_t)-1) 8283 wwn_match++; 8284 else if (wwn1 == wwn2) 8285 wwn_match++; 8286 } 8287 8288 /* check destination WWN for a match */ 8289 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8290 wwn1 = wwn_to_u64(fcport->port_name); 8291 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8292 if (wwn2 == (uint64_t)-1) 8293 wwn_match++; 8294 else if (wwn1 == wwn2) 8295 wwn_match++; 8296 } 8297 8298 if (pid_match == 2 || wwn_match == 2) { 8299 /* Found a matching entry */ 8300 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8301 priority = pri_entry->tag; 8302 break; 8303 } 8304 8305 pri_entry++; 8306 } 8307 8308 return priority; 8309 } 8310 8311 /* 8312 * qla24xx_update_fcport_fcp_prio 8313 * Activates fcp priority for the logged in fc port 8314 * 8315 * Input: 8316 * vha = scsi host structure pointer. 8317 * fcp = port structure pointer. 8318 * 8319 * Return: 8320 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8321 * 8322 * Context: 8323 * Kernel context. 8324 */ 8325 int 8326 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8327 { 8328 int ret; 8329 int priority; 8330 uint16_t mb[5]; 8331 8332 if (fcport->port_type != FCT_TARGET || 8333 fcport->loop_id == FC_NO_LOOP_ID) 8334 return QLA_FUNCTION_FAILED; 8335 8336 priority = qla24xx_get_fcp_prio(vha, fcport); 8337 if (priority < 0) 8338 return QLA_FUNCTION_FAILED; 8339 8340 if (IS_P3P_TYPE(vha->hw)) { 8341 fcport->fcp_prio = priority & 0xf; 8342 return QLA_SUCCESS; 8343 } 8344 8345 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8346 if (ret == QLA_SUCCESS) { 8347 if (fcport->fcp_prio != priority) 8348 ql_dbg(ql_dbg_user, vha, 0x709e, 8349 "Updated FCP_CMND priority - value=%d loop_id=%d " 8350 "port_id=%02x%02x%02x.\n", priority, 8351 fcport->loop_id, fcport->d_id.b.domain, 8352 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8353 fcport->fcp_prio = priority & 0xf; 8354 } else 8355 ql_dbg(ql_dbg_user, vha, 0x704f, 8356 "Unable to update FCP_CMND priority - ret=0x%x for " 8357 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8358 fcport->d_id.b.domain, fcport->d_id.b.area, 8359 fcport->d_id.b.al_pa); 8360 return ret; 8361 } 8362 8363 /* 8364 * qla24xx_update_all_fcp_prio 8365 * Activates fcp priority for all the logged in ports 8366 * 8367 * Input: 8368 * ha = adapter block pointer. 8369 * 8370 * Return: 8371 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8372 * 8373 * Context: 8374 * Kernel context. 8375 */ 8376 int 8377 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8378 { 8379 int ret; 8380 fc_port_t *fcport; 8381 8382 ret = QLA_FUNCTION_FAILED; 8383 /* We need to set priority for all logged in ports */ 8384 list_for_each_entry(fcport, &vha->vp_fcports, list) 8385 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8386 8387 return ret; 8388 } 8389 8390 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8391 int vp_idx, bool startqp) 8392 { 8393 int rsp_id = 0; 8394 int req_id = 0; 8395 int i; 8396 struct qla_hw_data *ha = vha->hw; 8397 uint16_t qpair_id = 0; 8398 struct qla_qpair *qpair = NULL; 8399 struct qla_msix_entry *msix; 8400 8401 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8402 ql_log(ql_log_warn, vha, 0x00181, 8403 "FW/Driver is not multi-queue capable.\n"); 8404 return NULL; 8405 } 8406 8407 if (ql2xmqsupport || ql2xnvmeenable) { 8408 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8409 if (qpair == NULL) { 8410 ql_log(ql_log_warn, vha, 0x0182, 8411 "Failed to allocate memory for queue pair.\n"); 8412 return NULL; 8413 } 8414 memset(qpair, 0, sizeof(struct qla_qpair)); 8415 8416 qpair->hw = vha->hw; 8417 qpair->vha = vha; 8418 qpair->qp_lock_ptr = &qpair->qp_lock; 8419 spin_lock_init(&qpair->qp_lock); 8420 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8421 8422 /* Assign available que pair id */ 8423 mutex_lock(&ha->mq_lock); 8424 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8425 if (ha->num_qpairs >= ha->max_qpairs) { 8426 mutex_unlock(&ha->mq_lock); 8427 ql_log(ql_log_warn, vha, 0x0183, 8428 "No resources to create additional q pair.\n"); 8429 goto fail_qid_map; 8430 } 8431 ha->num_qpairs++; 8432 set_bit(qpair_id, ha->qpair_qid_map); 8433 ha->queue_pair_map[qpair_id] = qpair; 8434 qpair->id = qpair_id; 8435 qpair->vp_idx = vp_idx; 8436 qpair->fw_started = ha->flags.fw_started; 8437 INIT_LIST_HEAD(&qpair->hints_list); 8438 qpair->chip_reset = ha->base_qpair->chip_reset; 8439 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8440 qpair->enable_explicit_conf = 8441 ha->base_qpair->enable_explicit_conf; 8442 8443 for (i = 0; i < ha->msix_count; i++) { 8444 msix = &ha->msix_entries[i]; 8445 if (msix->in_use) 8446 continue; 8447 qpair->msix = msix; 8448 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8449 "Vector %x selected for qpair\n", msix->vector); 8450 break; 8451 } 8452 if (!qpair->msix) { 8453 ql_log(ql_log_warn, vha, 0x0184, 8454 "Out of MSI-X vectors!.\n"); 8455 goto fail_msix; 8456 } 8457 8458 qpair->msix->in_use = 1; 8459 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8460 qpair->pdev = ha->pdev; 8461 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8462 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8463 8464 mutex_unlock(&ha->mq_lock); 8465 8466 /* Create response queue first */ 8467 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8468 if (!rsp_id) { 8469 ql_log(ql_log_warn, vha, 0x0185, 8470 "Failed to create response queue.\n"); 8471 goto fail_rsp; 8472 } 8473 8474 qpair->rsp = ha->rsp_q_map[rsp_id]; 8475 8476 /* Create request queue */ 8477 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8478 startqp); 8479 if (!req_id) { 8480 ql_log(ql_log_warn, vha, 0x0186, 8481 "Failed to create request queue.\n"); 8482 goto fail_req; 8483 } 8484 8485 qpair->req = ha->req_q_map[req_id]; 8486 qpair->rsp->req = qpair->req; 8487 qpair->rsp->qpair = qpair; 8488 /* init qpair to this cpu. Will adjust at run time. */ 8489 qla_cpu_update(qpair, smp_processor_id()); 8490 8491 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8492 if (ha->fw_attributes & BIT_4) 8493 qpair->difdix_supported = 1; 8494 } 8495 8496 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8497 if (!qpair->srb_mempool) { 8498 ql_log(ql_log_warn, vha, 0xd036, 8499 "Failed to create srb mempool for qpair %d\n", 8500 qpair->id); 8501 goto fail_mempool; 8502 } 8503 8504 /* Mark as online */ 8505 qpair->online = 1; 8506 8507 if (!vha->flags.qpairs_available) 8508 vha->flags.qpairs_available = 1; 8509 8510 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8511 "Request/Response queue pair created, id %d\n", 8512 qpair->id); 8513 ql_dbg(ql_dbg_init, vha, 0x0187, 8514 "Request/Response queue pair created, id %d\n", 8515 qpair->id); 8516 } 8517 return qpair; 8518 8519 fail_mempool: 8520 fail_req: 8521 qla25xx_delete_rsp_que(vha, qpair->rsp); 8522 fail_rsp: 8523 mutex_lock(&ha->mq_lock); 8524 qpair->msix->in_use = 0; 8525 list_del(&qpair->qp_list_elem); 8526 if (list_empty(&vha->qp_list)) 8527 vha->flags.qpairs_available = 0; 8528 fail_msix: 8529 ha->queue_pair_map[qpair_id] = NULL; 8530 clear_bit(qpair_id, ha->qpair_qid_map); 8531 ha->num_qpairs--; 8532 mutex_unlock(&ha->mq_lock); 8533 fail_qid_map: 8534 kfree(qpair); 8535 return NULL; 8536 } 8537 8538 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8539 { 8540 int ret = QLA_FUNCTION_FAILED; 8541 struct qla_hw_data *ha = qpair->hw; 8542 8543 qpair->delete_in_progress = 1; 8544 while (atomic_read(&qpair->ref_count)) 8545 msleep(500); 8546 8547 ret = qla25xx_delete_req_que(vha, qpair->req); 8548 if (ret != QLA_SUCCESS) 8549 goto fail; 8550 8551 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8552 if (ret != QLA_SUCCESS) 8553 goto fail; 8554 8555 mutex_lock(&ha->mq_lock); 8556 ha->queue_pair_map[qpair->id] = NULL; 8557 clear_bit(qpair->id, ha->qpair_qid_map); 8558 ha->num_qpairs--; 8559 list_del(&qpair->qp_list_elem); 8560 if (list_empty(&vha->qp_list)) { 8561 vha->flags.qpairs_available = 0; 8562 vha->flags.qpairs_req_created = 0; 8563 vha->flags.qpairs_rsp_created = 0; 8564 } 8565 mempool_destroy(qpair->srb_mempool); 8566 kfree(qpair); 8567 mutex_unlock(&ha->mq_lock); 8568 8569 return QLA_SUCCESS; 8570 fail: 8571 return ret; 8572 } 8573