1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_gpdb_work(struct scsi_qla_host *, fc_port_t *, u8); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(unsigned long __data) 47 { 48 srb_t *sp = (srb_t *)__data; 49 struct srb_iocb *iocb; 50 scsi_qla_host_t *vha = sp->vha; 51 struct req_que *req; 52 unsigned long flags; 53 54 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 55 req = vha->hw->req_q_map[0]; 56 req->outstanding_cmds[sp->handle] = NULL; 57 iocb = &sp->u.iocb_cmd; 58 iocb->timeout(sp); 59 sp->free(sp); 60 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 61 } 62 63 void 64 qla2x00_sp_free(void *ptr) 65 { 66 srb_t *sp = ptr; 67 struct srb_iocb *iocb = &sp->u.iocb_cmd; 68 69 del_timer(&iocb->timer); 70 qla2x00_rel_sp(sp); 71 } 72 73 /* Asynchronous Login/Logout Routines -------------------------------------- */ 74 75 unsigned long 76 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 77 { 78 unsigned long tmo; 79 struct qla_hw_data *ha = vha->hw; 80 81 /* Firmware should use switch negotiated r_a_tov for timeout. */ 82 tmo = ha->r_a_tov / 10 * 2; 83 if (IS_QLAFX00(ha)) { 84 tmo = FX00_DEF_RATOV * 2; 85 } else if (!IS_FWI2_CAPABLE(ha)) { 86 /* 87 * Except for earlier ISPs where the timeout is seeded from the 88 * initialization control block. 89 */ 90 tmo = ha->login_timeout; 91 } 92 return tmo; 93 } 94 95 void 96 qla2x00_async_iocb_timeout(void *data) 97 { 98 srb_t *sp = data; 99 fc_port_t *fcport = sp->fcport; 100 struct srb_iocb *lio = &sp->u.iocb_cmd; 101 struct event_arg ea; 102 103 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 104 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 105 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 106 107 fcport->flags &= ~FCF_ASYNC_SENT; 108 109 switch (sp->type) { 110 case SRB_LOGIN_CMD: 111 /* Retry as needed. */ 112 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 113 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 114 QLA_LOGIO_LOGIN_RETRIED : 0; 115 memset(&ea, 0, sizeof(ea)); 116 ea.event = FCME_PLOGI_DONE; 117 ea.fcport = sp->fcport; 118 ea.data[0] = lio->u.logio.data[0]; 119 ea.data[1] = lio->u.logio.data[1]; 120 ea.sp = sp; 121 qla24xx_handle_plogi_done_event(fcport->vha, &ea); 122 break; 123 case SRB_LOGOUT_CMD: 124 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT); 125 break; 126 case SRB_CT_PTHRU_CMD: 127 case SRB_MB_IOCB: 128 case SRB_NACK_PLOGI: 129 case SRB_NACK_PRLI: 130 case SRB_NACK_LOGO: 131 sp->done(sp, QLA_FUNCTION_TIMEOUT); 132 break; 133 } 134 } 135 136 static void 137 qla2x00_async_login_sp_done(void *ptr, int res) 138 { 139 srb_t *sp = ptr; 140 struct scsi_qla_host *vha = sp->vha; 141 struct srb_iocb *lio = &sp->u.iocb_cmd; 142 struct event_arg ea; 143 144 ql_dbg(ql_dbg_disc, vha, 0xffff, 145 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 146 147 sp->fcport->flags &= ~FCF_ASYNC_SENT; 148 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 149 memset(&ea, 0, sizeof(ea)); 150 ea.event = FCME_PLOGI_DONE; 151 ea.fcport = sp->fcport; 152 ea.data[0] = lio->u.logio.data[0]; 153 ea.data[1] = lio->u.logio.data[1]; 154 ea.iop[0] = lio->u.logio.iop[0]; 155 ea.iop[1] = lio->u.logio.iop[1]; 156 ea.sp = sp; 157 qla2x00_fcport_event_handler(vha, &ea); 158 } 159 160 sp->free(sp); 161 } 162 163 int 164 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 165 uint16_t *data) 166 { 167 srb_t *sp; 168 struct srb_iocb *lio; 169 int rval = QLA_FUNCTION_FAILED; 170 171 if (!vha->flags.online) 172 goto done; 173 174 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 175 (fcport->fw_login_state == DSC_LS_PLOGI_COMP) || 176 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 177 goto done; 178 179 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 180 if (!sp) 181 goto done; 182 183 fcport->flags |= FCF_ASYNC_SENT; 184 fcport->logout_completed = 0; 185 186 sp->type = SRB_LOGIN_CMD; 187 sp->name = "login"; 188 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 189 190 lio = &sp->u.iocb_cmd; 191 lio->timeout = qla2x00_async_iocb_timeout; 192 sp->done = qla2x00_async_login_sp_done; 193 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 194 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 195 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 196 rval = qla2x00_start_sp(sp); 197 if (rval != QLA_SUCCESS) { 198 fcport->flags &= ~FCF_ASYNC_SENT; 199 fcport->flags |= FCF_LOGIN_NEEDED; 200 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 201 goto done_free_sp; 202 } 203 204 ql_dbg(ql_dbg_disc, vha, 0x2072, 205 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 206 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 207 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 208 fcport->login_retry); 209 return rval; 210 211 done_free_sp: 212 sp->free(sp); 213 done: 214 fcport->flags &= ~FCF_ASYNC_SENT; 215 return rval; 216 } 217 218 static void 219 qla2x00_async_logout_sp_done(void *ptr, int res) 220 { 221 srb_t *sp = ptr; 222 struct srb_iocb *lio = &sp->u.iocb_cmd; 223 224 sp->fcport->flags &= ~FCF_ASYNC_SENT; 225 if (!test_bit(UNLOADING, &sp->vha->dpc_flags)) 226 qla2x00_post_async_logout_done_work(sp->vha, sp->fcport, 227 lio->u.logio.data); 228 sp->free(sp); 229 } 230 231 int 232 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 233 { 234 srb_t *sp; 235 struct srb_iocb *lio; 236 int rval; 237 238 rval = QLA_FUNCTION_FAILED; 239 fcport->flags |= FCF_ASYNC_SENT; 240 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 241 if (!sp) 242 goto done; 243 244 sp->type = SRB_LOGOUT_CMD; 245 sp->name = "logout"; 246 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 247 248 lio = &sp->u.iocb_cmd; 249 lio->timeout = qla2x00_async_iocb_timeout; 250 sp->done = qla2x00_async_logout_sp_done; 251 rval = qla2x00_start_sp(sp); 252 if (rval != QLA_SUCCESS) 253 goto done_free_sp; 254 255 ql_dbg(ql_dbg_disc, vha, 0x2070, 256 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 257 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 258 fcport->d_id.b.area, fcport->d_id.b.al_pa, 259 fcport->port_name); 260 return rval; 261 262 done_free_sp: 263 sp->free(sp); 264 done: 265 fcport->flags &= ~FCF_ASYNC_SENT; 266 return rval; 267 } 268 269 static void 270 qla2x00_async_adisc_sp_done(void *ptr, int res) 271 { 272 srb_t *sp = ptr; 273 struct scsi_qla_host *vha = sp->vha; 274 struct srb_iocb *lio = &sp->u.iocb_cmd; 275 276 if (!test_bit(UNLOADING, &vha->dpc_flags)) 277 qla2x00_post_async_adisc_done_work(sp->vha, sp->fcport, 278 lio->u.logio.data); 279 sp->free(sp); 280 } 281 282 int 283 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 284 uint16_t *data) 285 { 286 srb_t *sp; 287 struct srb_iocb *lio; 288 int rval; 289 290 rval = QLA_FUNCTION_FAILED; 291 fcport->flags |= FCF_ASYNC_SENT; 292 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 293 if (!sp) 294 goto done; 295 296 sp->type = SRB_ADISC_CMD; 297 sp->name = "adisc"; 298 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 299 300 lio = &sp->u.iocb_cmd; 301 lio->timeout = qla2x00_async_iocb_timeout; 302 sp->done = qla2x00_async_adisc_sp_done; 303 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 304 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 305 rval = qla2x00_start_sp(sp); 306 if (rval != QLA_SUCCESS) 307 goto done_free_sp; 308 309 ql_dbg(ql_dbg_disc, vha, 0x206f, 310 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", 311 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 312 fcport->d_id.b.area, fcport->d_id.b.al_pa); 313 return rval; 314 315 done_free_sp: 316 sp->free(sp); 317 done: 318 fcport->flags &= ~FCF_ASYNC_SENT; 319 return rval; 320 } 321 322 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 323 struct event_arg *ea) 324 { 325 fc_port_t *fcport, *conflict_fcport; 326 struct get_name_list_extended *e; 327 u16 i, n, found = 0, loop_id; 328 port_id_t id; 329 u64 wwn; 330 u8 opt = 0; 331 332 fcport = ea->fcport; 333 334 if (ea->rc) { /* rval */ 335 if (fcport->login_retry == 0) { 336 fcport->login_retry = vha->hw->login_retry_count; 337 ql_dbg(ql_dbg_disc, vha, 0xffff, 338 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 339 fcport->port_name, fcport->login_retry); 340 } 341 return; 342 } 343 344 if (fcport->last_rscn_gen != fcport->rscn_gen) { 345 ql_dbg(ql_dbg_disc, vha, 0xffff, 346 "%s %8phC rscn gen changed rscn %d|%d \n", 347 __func__, fcport->port_name, 348 fcport->last_rscn_gen, fcport->rscn_gen); 349 qla24xx_post_gidpn_work(vha, fcport); 350 return; 351 } else if (fcport->last_login_gen != fcport->login_gen) { 352 ql_dbg(ql_dbg_disc, vha, 0xffff, 353 "%s %8phC login gen changed login %d|%d \n", 354 __func__, fcport->port_name, 355 fcport->last_login_gen, fcport->login_gen); 356 return; 357 } 358 359 n = ea->data[0] / sizeof(struct get_name_list_extended); 360 361 ql_dbg(ql_dbg_disc, vha, 0xffff, 362 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 363 __func__, __LINE__, fcport->port_name, n, 364 fcport->d_id.b.domain, fcport->d_id.b.area, 365 fcport->d_id.b.al_pa, fcport->loop_id); 366 367 for (i = 0; i < n; i++) { 368 e = &vha->gnl.l[i]; 369 wwn = wwn_to_u64(e->port_name); 370 371 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 372 continue; 373 374 found = 1; 375 id.b.domain = e->port_id[2]; 376 id.b.area = e->port_id[1]; 377 id.b.al_pa = e->port_id[0]; 378 id.b.rsvd_1 = 0; 379 380 loop_id = le16_to_cpu(e->nport_handle); 381 loop_id = (loop_id & 0x7fff); 382 383 ql_dbg(ql_dbg_disc, vha, 0xffff, 384 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 385 __func__, fcport->port_name, 386 e->current_login_state, fcport->fw_login_state, 387 id.b.domain, id.b.area, id.b.al_pa, 388 fcport->d_id.b.domain, fcport->d_id.b.area, 389 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 390 391 if ((id.b24 != fcport->d_id.b24) || 392 ((fcport->loop_id != FC_NO_LOOP_ID) && 393 (fcport->loop_id != loop_id))) { 394 ql_dbg(ql_dbg_disc, vha, 0xffff, 395 "%s %d %8phC post del sess\n", 396 __func__, __LINE__, fcport->port_name); 397 qlt_schedule_sess_for_deletion(fcport, 1); 398 return; 399 } 400 401 fcport->loop_id = loop_id; 402 403 wwn = wwn_to_u64(fcport->port_name); 404 qlt_find_sess_invalidate_other(vha, wwn, 405 id, loop_id, &conflict_fcport); 406 407 if (conflict_fcport) { 408 /* 409 * Another share fcport share the same loop_id & 410 * nport id. Conflict fcport needs to finish 411 * cleanup before this fcport can proceed to login. 412 */ 413 conflict_fcport->conflict = fcport; 414 fcport->login_pause = 1; 415 } 416 417 switch (e->current_login_state) { 418 case DSC_LS_PRLI_COMP: 419 ql_dbg(ql_dbg_disc, vha, 0xffff, 420 "%s %d %8phC post gpdb\n", 421 __func__, __LINE__, fcport->port_name); 422 opt = PDO_FORCE_ADISC; 423 qla24xx_post_gpdb_work(vha, fcport, opt); 424 break; 425 426 case DSC_LS_PORT_UNAVAIL: 427 default: 428 if (fcport->loop_id == FC_NO_LOOP_ID) { 429 qla2x00_find_new_loop_id(vha, fcport); 430 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 431 } 432 ql_dbg(ql_dbg_disc, vha, 0xffff, 433 "%s %d %8phC \n", 434 __func__, __LINE__, fcport->port_name); 435 qla24xx_fcport_handle_login(vha, fcport); 436 break; 437 } 438 } 439 440 if (!found) { 441 /* fw has no record of this port */ 442 if (fcport->loop_id == FC_NO_LOOP_ID) { 443 qla2x00_find_new_loop_id(vha, fcport); 444 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 445 } else { 446 for (i = 0; i < n; i++) { 447 e = &vha->gnl.l[i]; 448 id.b.domain = e->port_id[0]; 449 id.b.area = e->port_id[1]; 450 id.b.al_pa = e->port_id[2]; 451 id.b.rsvd_1 = 0; 452 loop_id = le16_to_cpu(e->nport_handle); 453 454 if (fcport->d_id.b24 == id.b24) { 455 conflict_fcport = 456 qla2x00_find_fcport_by_wwpn(vha, 457 e->port_name, 0); 458 459 ql_dbg(ql_dbg_disc, vha, 0xffff, 460 "%s %d %8phC post del sess\n", 461 __func__, __LINE__, 462 conflict_fcport->port_name); 463 qlt_schedule_sess_for_deletion 464 (conflict_fcport, 1); 465 } 466 467 if (fcport->loop_id == loop_id) { 468 /* FW already picked this loop id for another fcport */ 469 qla2x00_find_new_loop_id(vha, fcport); 470 } 471 } 472 } 473 qla24xx_fcport_handle_login(vha, fcport); 474 } 475 } /* gnl_event */ 476 477 static void 478 qla24xx_async_gnl_sp_done(void *s, int res) 479 { 480 struct srb *sp = s; 481 struct scsi_qla_host *vha = sp->vha; 482 unsigned long flags; 483 struct fc_port *fcport = NULL, *tf; 484 u16 i, n = 0, loop_id; 485 struct event_arg ea; 486 struct get_name_list_extended *e; 487 u64 wwn; 488 struct list_head h; 489 490 ql_dbg(ql_dbg_disc, vha, 0xffff, 491 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 492 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 493 sp->u.iocb_cmd.u.mbx.in_mb[2]); 494 495 memset(&ea, 0, sizeof(ea)); 496 ea.sp = sp; 497 ea.rc = res; 498 ea.event = FCME_GNL_DONE; 499 500 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 501 sizeof(struct get_name_list_extended)) { 502 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 503 sizeof(struct get_name_list_extended); 504 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 505 } 506 507 for (i = 0; i < n; i++) { 508 e = &vha->gnl.l[i]; 509 loop_id = le16_to_cpu(e->nport_handle); 510 /* mask out reserve bit */ 511 loop_id = (loop_id & 0x7fff); 512 set_bit(loop_id, vha->hw->loop_id_map); 513 wwn = wwn_to_u64(e->port_name); 514 515 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0xffff, 516 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 517 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 518 e->port_id[0], e->current_login_state, e->last_login_state, 519 (loop_id & 0x7fff)); 520 } 521 522 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 523 vha->gnl.sent = 0; 524 525 INIT_LIST_HEAD(&h); 526 fcport = tf = NULL; 527 if (!list_empty(&vha->gnl.fcports)) 528 list_splice_init(&vha->gnl.fcports, &h); 529 530 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 531 list_del_init(&fcport->gnl_entry); 532 fcport->flags &= ~FCF_ASYNC_SENT; 533 ea.fcport = fcport; 534 535 qla2x00_fcport_event_handler(vha, &ea); 536 } 537 538 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 539 540 sp->free(sp); 541 } 542 543 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 544 { 545 srb_t *sp; 546 struct srb_iocb *mbx; 547 int rval = QLA_FUNCTION_FAILED; 548 unsigned long flags; 549 u16 *mb; 550 551 if (!vha->flags.online) 552 goto done; 553 554 ql_dbg(ql_dbg_disc, vha, 0xffff, 555 "Async-gnlist WWPN %8phC \n", fcport->port_name); 556 557 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 558 fcport->flags |= FCF_ASYNC_SENT; 559 fcport->disc_state = DSC_GNL; 560 fcport->last_rscn_gen = fcport->rscn_gen; 561 fcport->last_login_gen = fcport->login_gen; 562 563 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 564 if (vha->gnl.sent) { 565 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 566 rval = QLA_SUCCESS; 567 goto done; 568 } 569 vha->gnl.sent = 1; 570 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 571 572 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 573 if (!sp) 574 goto done; 575 sp->type = SRB_MB_IOCB; 576 sp->name = "gnlist"; 577 sp->gen1 = fcport->rscn_gen; 578 sp->gen2 = fcport->login_gen; 579 580 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 581 582 mb = sp->u.iocb_cmd.u.mbx.out_mb; 583 mb[0] = MBC_PORT_NODE_NAME_LIST; 584 mb[1] = BIT_2 | BIT_3; 585 mb[2] = MSW(vha->gnl.ldma); 586 mb[3] = LSW(vha->gnl.ldma); 587 mb[6] = MSW(MSD(vha->gnl.ldma)); 588 mb[7] = LSW(MSD(vha->gnl.ldma)); 589 mb[8] = vha->gnl.size; 590 mb[9] = vha->vp_idx; 591 592 mbx = &sp->u.iocb_cmd; 593 mbx->timeout = qla2x00_async_iocb_timeout; 594 595 sp->done = qla24xx_async_gnl_sp_done; 596 597 rval = qla2x00_start_sp(sp); 598 if (rval != QLA_SUCCESS) 599 goto done_free_sp; 600 601 ql_dbg(ql_dbg_disc, vha, 0xffff, 602 "Async-%s - OUT WWPN %8phC hndl %x\n", 603 sp->name, fcport->port_name, sp->handle); 604 605 return rval; 606 607 done_free_sp: 608 sp->free(sp); 609 done: 610 fcport->flags &= ~FCF_ASYNC_SENT; 611 return rval; 612 } 613 614 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 615 { 616 struct qla_work_evt *e; 617 618 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 619 if (!e) 620 return QLA_FUNCTION_FAILED; 621 622 e->u.fcport.fcport = fcport; 623 return qla2x00_post_work(vha, e); 624 } 625 626 static 627 void qla24xx_async_gpdb_sp_done(void *s, int res) 628 { 629 struct srb *sp = s; 630 struct scsi_qla_host *vha = sp->vha; 631 struct qla_hw_data *ha = vha->hw; 632 uint64_t zero = 0; 633 struct port_database_24xx *pd; 634 fc_port_t *fcport = sp->fcport; 635 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 636 int rval = QLA_SUCCESS; 637 struct event_arg ea; 638 639 ql_dbg(ql_dbg_disc, vha, 0xffff, 640 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 641 sp->name, res, fcport->port_name, mb[1], mb[2]); 642 643 fcport->flags &= ~FCF_ASYNC_SENT; 644 645 if (res) { 646 rval = res; 647 goto gpd_error_out; 648 } 649 650 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 651 652 /* Check for logged in state. */ 653 if (pd->current_login_state != PDS_PRLI_COMPLETE && 654 pd->last_login_state != PDS_PRLI_COMPLETE) { 655 ql_dbg(ql_dbg_mbx, vha, 0xffff, 656 "Unable to verify login-state (%x/%x) for " 657 "loop_id %x.\n", pd->current_login_state, 658 pd->last_login_state, fcport->loop_id); 659 rval = QLA_FUNCTION_FAILED; 660 goto gpd_error_out; 661 } 662 663 if (fcport->loop_id == FC_NO_LOOP_ID || 664 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) && 665 memcmp(fcport->port_name, pd->port_name, 8))) { 666 /* We lost the device mid way. */ 667 rval = QLA_NOT_LOGGED_IN; 668 goto gpd_error_out; 669 } 670 671 /* Names are little-endian. */ 672 memcpy(fcport->node_name, pd->node_name, WWN_SIZE); 673 674 /* Get port_id of device. */ 675 fcport->d_id.b.domain = pd->port_id[0]; 676 fcport->d_id.b.area = pd->port_id[1]; 677 fcport->d_id.b.al_pa = pd->port_id[2]; 678 fcport->d_id.b.rsvd_1 = 0; 679 680 /* If not target must be initiator or unknown type. */ 681 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0) 682 fcport->port_type = FCT_INITIATOR; 683 else 684 fcport->port_type = FCT_TARGET; 685 686 /* Passback COS information. */ 687 fcport->supported_classes = (pd->flags & PDF_CLASS_2) ? 688 FC_COS_CLASS2 : FC_COS_CLASS3; 689 690 if (pd->prli_svc_param_word_3[0] & BIT_7) { 691 fcport->flags |= FCF_CONF_COMP_SUPPORTED; 692 fcport->conf_compl_supported = 1; 693 } 694 695 gpd_error_out: 696 memset(&ea, 0, sizeof(ea)); 697 ea.event = FCME_GPDB_DONE; 698 ea.rc = rval; 699 ea.fcport = fcport; 700 ea.sp = sp; 701 702 qla2x00_fcport_event_handler(vha, &ea); 703 704 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 705 sp->u.iocb_cmd.u.mbx.in_dma); 706 707 sp->free(sp); 708 } 709 710 static int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, 711 u8 opt) 712 { 713 struct qla_work_evt *e; 714 715 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 716 if (!e) 717 return QLA_FUNCTION_FAILED; 718 719 e->u.fcport.fcport = fcport; 720 e->u.fcport.opt = opt; 721 return qla2x00_post_work(vha, e); 722 } 723 724 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 725 { 726 srb_t *sp; 727 struct srb_iocb *mbx; 728 int rval = QLA_FUNCTION_FAILED; 729 u16 *mb; 730 dma_addr_t pd_dma; 731 struct port_database_24xx *pd; 732 struct qla_hw_data *ha = vha->hw; 733 734 if (!vha->flags.online) 735 goto done; 736 737 fcport->flags |= FCF_ASYNC_SENT; 738 fcport->disc_state = DSC_GPDB; 739 740 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 741 if (!sp) 742 goto done; 743 744 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 745 if (pd == NULL) { 746 ql_log(ql_log_warn, vha, 0xffff, 747 "Failed to allocate port database structure.\n"); 748 goto done_free_sp; 749 } 750 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE)); 751 752 sp->type = SRB_MB_IOCB; 753 sp->name = "gpdb"; 754 sp->gen1 = fcport->rscn_gen; 755 sp->gen2 = fcport->login_gen; 756 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 757 758 mb = sp->u.iocb_cmd.u.mbx.out_mb; 759 mb[0] = MBC_GET_PORT_DATABASE; 760 mb[1] = fcport->loop_id; 761 mb[2] = MSW(pd_dma); 762 mb[3] = LSW(pd_dma); 763 mb[6] = MSW(MSD(pd_dma)); 764 mb[7] = LSW(MSD(pd_dma)); 765 mb[9] = vha->vp_idx; 766 mb[10] = opt; 767 768 mbx = &sp->u.iocb_cmd; 769 mbx->timeout = qla2x00_async_iocb_timeout; 770 mbx->u.mbx.in = (void *)pd; 771 mbx->u.mbx.in_dma = pd_dma; 772 773 sp->done = qla24xx_async_gpdb_sp_done; 774 775 rval = qla2x00_start_sp(sp); 776 if (rval != QLA_SUCCESS) 777 goto done_free_sp; 778 779 ql_dbg(ql_dbg_disc, vha, 0xffff, 780 "Async-%s %8phC hndl %x opt %x\n", 781 sp->name, fcport->port_name, sp->handle, opt); 782 783 return rval; 784 785 done_free_sp: 786 if (pd) 787 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 788 789 sp->free(sp); 790 done: 791 fcport->flags &= ~FCF_ASYNC_SENT; 792 qla24xx_post_gpdb_work(vha, fcport, opt); 793 return rval; 794 } 795 796 static 797 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 798 { 799 int rval = ea->rc; 800 fc_port_t *fcport = ea->fcport; 801 unsigned long flags; 802 803 fcport->flags &= ~FCF_ASYNC_SENT; 804 805 ql_dbg(ql_dbg_disc, vha, 0xffff, 806 "%s %8phC DS %d LS %d rval %d\n", __func__, fcport->port_name, 807 fcport->disc_state, fcport->fw_login_state, rval); 808 809 if (ea->sp->gen2 != fcport->login_gen) { 810 /* target side must have changed it. */ 811 ql_dbg(ql_dbg_disc, vha, 0xffff, 812 "%s %8phC generation changed rscn %d|%d login %d|%d \n", 813 __func__, fcport->port_name, fcport->last_rscn_gen, 814 fcport->rscn_gen, fcport->last_login_gen, 815 fcport->login_gen); 816 return; 817 } else if (ea->sp->gen1 != fcport->rscn_gen) { 818 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC post gidpn\n", 819 __func__, __LINE__, fcport->port_name); 820 qla24xx_post_gidpn_work(vha, fcport); 821 return; 822 } 823 824 if (rval != QLA_SUCCESS) { 825 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC post del sess\n", 826 __func__, __LINE__, fcport->port_name); 827 qlt_schedule_sess_for_deletion_lock(fcport); 828 return; 829 } 830 831 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 832 ea->fcport->login_gen++; 833 ea->fcport->deleted = 0; 834 ea->fcport->logout_on_delete = 1; 835 836 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 837 vha->fcport_count++; 838 ea->fcport->login_succ = 1; 839 840 if (!IS_IIDMA_CAPABLE(vha->hw) || 841 !vha->hw->flags.gpsc_supported) { 842 ql_dbg(ql_dbg_disc, vha, 0xffff, 843 "%s %d %8phC post upd_fcport fcp_cnt %d\n", 844 __func__, __LINE__, fcport->port_name, 845 vha->fcport_count); 846 847 qla24xx_post_upd_fcport_work(vha, fcport); 848 } else { 849 ql_dbg(ql_dbg_disc, vha, 0xffff, 850 "%s %d %8phC post gpsc fcp_cnt %d\n", 851 __func__, __LINE__, fcport->port_name, 852 vha->fcport_count); 853 854 qla24xx_post_gpsc_work(vha, fcport); 855 } 856 } 857 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 858 } /* gpdb event */ 859 860 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 861 { 862 if (fcport->login_retry == 0) 863 return 0; 864 865 if (fcport->scan_state != QLA_FCPORT_FOUND) 866 return 0; 867 868 ql_dbg(ql_dbg_disc, vha, 0xffff, 869 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d|%d retry %d lid %d\n", 870 __func__, fcport->port_name, fcport->disc_state, 871 fcport->fw_login_state, fcport->login_pause, fcport->flags, 872 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 873 fcport->last_login_gen, fcport->login_gen, fcport->login_retry, 874 fcport->loop_id); 875 876 fcport->login_retry--; 877 878 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 879 (fcport->fw_login_state == DSC_LS_PLOGI_COMP) || 880 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 881 return 0; 882 883 /* for pure Target Mode. Login will not be initiated */ 884 if (vha->host->active_mode == MODE_TARGET) 885 return 0; 886 887 if (fcport->flags & FCF_ASYNC_SENT) { 888 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 889 return 0; 890 } 891 892 switch (fcport->disc_state) { 893 case DSC_DELETED: 894 if (fcport->loop_id == FC_NO_LOOP_ID) { 895 ql_dbg(ql_dbg_disc, vha, 0xffff, 896 "%s %d %8phC post gnl\n", 897 __func__, __LINE__, fcport->port_name); 898 qla24xx_async_gnl(vha, fcport); 899 } else { 900 ql_dbg(ql_dbg_disc, vha, 0xffff, 901 "%s %d %8phC post login\n", 902 __func__, __LINE__, fcport->port_name); 903 fcport->disc_state = DSC_LOGIN_PEND; 904 qla2x00_post_async_login_work(vha, fcport, NULL); 905 } 906 break; 907 908 case DSC_GNL: 909 if (fcport->login_pause) { 910 fcport->last_rscn_gen = fcport->rscn_gen; 911 fcport->last_login_gen = fcport->login_gen; 912 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 913 break; 914 } 915 916 if (fcport->flags & FCF_FCP2_DEVICE) { 917 u8 opt = PDO_FORCE_ADISC; 918 919 ql_dbg(ql_dbg_disc, vha, 0xffff, 920 "%s %d %8phC post gpdb\n", 921 __func__, __LINE__, fcport->port_name); 922 923 fcport->disc_state = DSC_GPDB; 924 qla24xx_post_gpdb_work(vha, fcport, opt); 925 } else { 926 ql_dbg(ql_dbg_disc, vha, 0xffff, 927 "%s %d %8phC post login \n", 928 __func__, __LINE__, fcport->port_name); 929 fcport->disc_state = DSC_LOGIN_PEND; 930 qla2x00_post_async_login_work(vha, fcport, NULL); 931 } 932 933 break; 934 935 case DSC_LOGIN_FAILED: 936 ql_dbg(ql_dbg_disc, vha, 0xffff, 937 "%s %d %8phC post gidpn \n", 938 __func__, __LINE__, fcport->port_name); 939 940 qla24xx_post_gidpn_work(vha, fcport); 941 break; 942 943 case DSC_LOGIN_COMPLETE: 944 /* recheck login state */ 945 ql_dbg(ql_dbg_disc, vha, 0xffff, 946 "%s %d %8phC post gpdb \n", 947 __func__, __LINE__, fcport->port_name); 948 949 qla24xx_post_gpdb_work(vha, fcport, PDO_FORCE_ADISC); 950 break; 951 952 default: 953 break; 954 } 955 956 return 0; 957 } 958 959 static 960 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 961 { 962 fcport->rscn_gen++; 963 964 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 965 "%s %8phC DS %d LS %d\n", 966 __func__, fcport->port_name, fcport->disc_state, 967 fcport->fw_login_state); 968 969 if (fcport->flags & FCF_ASYNC_SENT) 970 return; 971 972 switch (fcport->disc_state) { 973 case DSC_DELETED: 974 case DSC_LOGIN_COMPLETE: 975 qla24xx_post_gidpn_work(fcport->vha, fcport); 976 break; 977 978 default: 979 break; 980 } 981 } 982 983 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 984 u8 *port_name, void *pla) 985 { 986 struct qla_work_evt *e; 987 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 988 if (!e) 989 return QLA_FUNCTION_FAILED; 990 991 e->u.new_sess.id = *id; 992 e->u.new_sess.pla = pla; 993 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 994 995 return qla2x00_post_work(vha, e); 996 } 997 998 static 999 int qla24xx_handle_delete_done_event(scsi_qla_host_t *vha, 1000 struct event_arg *ea) 1001 { 1002 fc_port_t *fcport = ea->fcport; 1003 1004 if (test_bit(UNLOADING, &vha->dpc_flags)) 1005 return 0; 1006 1007 switch (vha->host->active_mode) { 1008 case MODE_INITIATOR: 1009 case MODE_DUAL: 1010 if (fcport->scan_state == QLA_FCPORT_FOUND) 1011 qla24xx_fcport_handle_login(vha, fcport); 1012 break; 1013 1014 case MODE_TARGET: 1015 default: 1016 /* no-op */ 1017 break; 1018 } 1019 1020 return 0; 1021 } 1022 1023 static 1024 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1025 struct event_arg *ea) 1026 { 1027 fc_port_t *fcport = ea->fcport; 1028 1029 if (fcport->scan_state != QLA_FCPORT_FOUND) { 1030 fcport->login_retry++; 1031 return; 1032 } 1033 1034 ql_dbg(ql_dbg_disc, vha, 0xffff, 1035 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1036 __func__, fcport->port_name, fcport->disc_state, 1037 fcport->fw_login_state, fcport->login_pause, 1038 fcport->deleted, fcport->conflict, 1039 fcport->last_rscn_gen, fcport->rscn_gen, 1040 fcport->last_login_gen, fcport->login_gen, 1041 fcport->flags); 1042 1043 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1044 (fcport->fw_login_state == DSC_LS_PLOGI_COMP) || 1045 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1046 return; 1047 1048 if (fcport->flags & FCF_ASYNC_SENT) { 1049 fcport->login_retry++; 1050 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1051 return; 1052 } 1053 1054 if (fcport->disc_state == DSC_DELETE_PEND) { 1055 fcport->login_retry++; 1056 return; 1057 } 1058 1059 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1060 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC post gidpn\n", 1061 __func__, __LINE__, fcport->port_name); 1062 1063 qla24xx_async_gidpn(vha, fcport); 1064 return; 1065 } 1066 1067 qla24xx_fcport_handle_login(vha, fcport); 1068 } 1069 1070 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1071 { 1072 fc_port_t *fcport, *f, *tf; 1073 uint32_t id = 0, mask, rid; 1074 int rc; 1075 1076 switch (ea->event) { 1077 case FCME_RELOGIN: 1078 if (test_bit(UNLOADING, &vha->dpc_flags)) 1079 return; 1080 1081 qla24xx_handle_relogin_event(vha, ea); 1082 break; 1083 case FCME_RSCN: 1084 if (test_bit(UNLOADING, &vha->dpc_flags)) 1085 return; 1086 switch (ea->id.b.rsvd_1) { 1087 case RSCN_PORT_ADDR: 1088 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1089 if (!fcport) { 1090 /* cable moved */ 1091 rc = qla24xx_post_gpnid_work(vha, &ea->id); 1092 if (rc) { 1093 ql_log(ql_log_warn, vha, 0xffff, 1094 "RSCN GPNID work failed %02x%02x%02x\n", 1095 ea->id.b.domain, ea->id.b.area, 1096 ea->id.b.al_pa); 1097 } 1098 } else { 1099 ea->fcport = fcport; 1100 qla24xx_handle_rscn_event(fcport, ea); 1101 } 1102 break; 1103 case RSCN_AREA_ADDR: 1104 case RSCN_DOM_ADDR: 1105 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1106 mask = 0xffff00; 1107 ql_log(ql_dbg_async, vha, 0xffff, 1108 "RSCN: Area 0x%06x was affected\n", 1109 ea->id.b24); 1110 } else { 1111 mask = 0xff0000; 1112 ql_log(ql_dbg_async, vha, 0xffff, 1113 "RSCN: Domain 0x%06x was affected\n", 1114 ea->id.b24); 1115 } 1116 1117 rid = ea->id.b24 & mask; 1118 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1119 list) { 1120 id = f->d_id.b24 & mask; 1121 if (rid == id) { 1122 ea->fcport = f; 1123 qla24xx_handle_rscn_event(f, ea); 1124 } 1125 } 1126 break; 1127 case RSCN_FAB_ADDR: 1128 default: 1129 ql_log(ql_log_warn, vha, 0xffff, 1130 "RSCN: Fabric was affected. Addr format %d\n", 1131 ea->id.b.rsvd_1); 1132 qla2x00_mark_all_devices_lost(vha, 1); 1133 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1134 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1135 } 1136 break; 1137 case FCME_GIDPN_DONE: 1138 qla24xx_handle_gidpn_event(vha, ea); 1139 break; 1140 case FCME_GNL_DONE: 1141 qla24xx_handle_gnl_done_event(vha, ea); 1142 break; 1143 case FCME_GPSC_DONE: 1144 qla24xx_post_upd_fcport_work(vha, ea->fcport); 1145 break; 1146 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1147 qla24xx_handle_plogi_done_event(vha, ea); 1148 break; 1149 case FCME_GPDB_DONE: 1150 qla24xx_handle_gpdb_event(vha, ea); 1151 break; 1152 case FCME_GPNID_DONE: 1153 qla24xx_handle_gpnid_event(vha, ea); 1154 break; 1155 case FCME_DELETE_DONE: 1156 qla24xx_handle_delete_done_event(vha, ea); 1157 break; 1158 default: 1159 BUG_ON(1); 1160 break; 1161 } 1162 } 1163 1164 static void 1165 qla2x00_tmf_iocb_timeout(void *data) 1166 { 1167 srb_t *sp = data; 1168 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1169 1170 tmf->u.tmf.comp_status = CS_TIMEOUT; 1171 complete(&tmf->u.tmf.comp); 1172 } 1173 1174 static void 1175 qla2x00_tmf_sp_done(void *ptr, int res) 1176 { 1177 srb_t *sp = ptr; 1178 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1179 1180 complete(&tmf->u.tmf.comp); 1181 } 1182 1183 int 1184 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1185 uint32_t tag) 1186 { 1187 struct scsi_qla_host *vha = fcport->vha; 1188 struct srb_iocb *tm_iocb; 1189 srb_t *sp; 1190 int rval = QLA_FUNCTION_FAILED; 1191 1192 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1193 if (!sp) 1194 goto done; 1195 1196 tm_iocb = &sp->u.iocb_cmd; 1197 sp->type = SRB_TM_CMD; 1198 sp->name = "tmf"; 1199 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1200 tm_iocb->u.tmf.flags = flags; 1201 tm_iocb->u.tmf.lun = lun; 1202 tm_iocb->u.tmf.data = tag; 1203 sp->done = qla2x00_tmf_sp_done; 1204 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1205 init_completion(&tm_iocb->u.tmf.comp); 1206 1207 rval = qla2x00_start_sp(sp); 1208 if (rval != QLA_SUCCESS) 1209 goto done_free_sp; 1210 1211 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1212 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1213 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1214 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1215 1216 wait_for_completion(&tm_iocb->u.tmf.comp); 1217 1218 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 1219 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1220 1221 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) { 1222 ql_dbg(ql_dbg_taskm, vha, 0x8030, 1223 "TM IOCB failed (%x).\n", rval); 1224 } 1225 1226 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1227 flags = tm_iocb->u.tmf.flags; 1228 lun = (uint16_t)tm_iocb->u.tmf.lun; 1229 1230 /* Issue Marker IOCB */ 1231 qla2x00_marker(vha, vha->hw->req_q_map[0], 1232 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1233 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1234 } 1235 1236 done_free_sp: 1237 sp->free(sp); 1238 done: 1239 return rval; 1240 } 1241 1242 static void 1243 qla24xx_abort_iocb_timeout(void *data) 1244 { 1245 srb_t *sp = data; 1246 struct srb_iocb *abt = &sp->u.iocb_cmd; 1247 1248 abt->u.abt.comp_status = CS_TIMEOUT; 1249 complete(&abt->u.abt.comp); 1250 } 1251 1252 static void 1253 qla24xx_abort_sp_done(void *ptr, int res) 1254 { 1255 srb_t *sp = ptr; 1256 struct srb_iocb *abt = &sp->u.iocb_cmd; 1257 1258 complete(&abt->u.abt.comp); 1259 } 1260 1261 static int 1262 qla24xx_async_abort_cmd(srb_t *cmd_sp) 1263 { 1264 scsi_qla_host_t *vha = cmd_sp->vha; 1265 fc_port_t *fcport = cmd_sp->fcport; 1266 struct srb_iocb *abt_iocb; 1267 srb_t *sp; 1268 int rval = QLA_FUNCTION_FAILED; 1269 1270 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1271 if (!sp) 1272 goto done; 1273 1274 abt_iocb = &sp->u.iocb_cmd; 1275 sp->type = SRB_ABT_CMD; 1276 sp->name = "abort"; 1277 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1278 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1279 sp->done = qla24xx_abort_sp_done; 1280 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1281 init_completion(&abt_iocb->u.abt.comp); 1282 1283 rval = qla2x00_start_sp(sp); 1284 if (rval != QLA_SUCCESS) 1285 goto done_free_sp; 1286 1287 ql_dbg(ql_dbg_async, vha, 0x507c, 1288 "Abort command issued - hdl=%x, target_id=%x\n", 1289 cmd_sp->handle, fcport->tgt_id); 1290 1291 wait_for_completion(&abt_iocb->u.abt.comp); 1292 1293 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1294 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1295 1296 done_free_sp: 1297 sp->free(sp); 1298 done: 1299 return rval; 1300 } 1301 1302 int 1303 qla24xx_async_abort_command(srb_t *sp) 1304 { 1305 unsigned long flags = 0; 1306 1307 uint32_t handle; 1308 fc_port_t *fcport = sp->fcport; 1309 struct scsi_qla_host *vha = fcport->vha; 1310 struct qla_hw_data *ha = vha->hw; 1311 struct req_que *req = vha->req; 1312 1313 spin_lock_irqsave(&ha->hardware_lock, flags); 1314 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1315 if (req->outstanding_cmds[handle] == sp) 1316 break; 1317 } 1318 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1319 if (handle == req->num_outstanding_cmds) { 1320 /* Command not found. */ 1321 return QLA_FUNCTION_FAILED; 1322 } 1323 if (sp->type == SRB_FXIOCB_DCMD) 1324 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1325 FXDISC_ABORT_IOCTL); 1326 1327 return qla24xx_async_abort_cmd(sp); 1328 } 1329 1330 static void 1331 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1332 { 1333 port_id_t cid; /* conflict Nport id */ 1334 1335 switch (ea->data[0]) { 1336 case MBS_COMMAND_COMPLETE: 1337 /* 1338 * Driver must validate login state - If PRLI not complete, 1339 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1340 * requests. 1341 */ 1342 ql_dbg(ql_dbg_disc, vha, 0xffff, 1343 "%s %d %8phC post gpdb\n", 1344 __func__, __LINE__, ea->fcport->port_name); 1345 ea->fcport->chip_reset = vha->hw->chip_reset; 1346 ea->fcport->logout_on_delete = 1; 1347 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1348 break; 1349 case MBS_COMMAND_ERROR: 1350 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC cmd error %x\n", 1351 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1352 1353 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1354 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1355 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1356 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1357 else 1358 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1359 break; 1360 case MBS_LOOP_ID_USED: 1361 /* data[1] = IO PARAM 1 = nport ID */ 1362 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1363 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1364 cid.b.al_pa = ea->iop[1] & 0xff; 1365 cid.b.rsvd_1 = 0; 1366 1367 ql_dbg(ql_dbg_disc, vha, 0xffff, 1368 "%s %d %8phC LoopID 0x%x in use post gnl\n", 1369 __func__, __LINE__, ea->fcport->port_name, 1370 ea->fcport->loop_id); 1371 1372 if (IS_SW_RESV_ADDR(cid)) { 1373 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1374 ea->fcport->loop_id = FC_NO_LOOP_ID; 1375 } else { 1376 qla2x00_clear_loop_id(ea->fcport); 1377 } 1378 qla24xx_post_gnl_work(vha, ea->fcport); 1379 break; 1380 case MBS_PORT_ID_USED: 1381 ql_dbg(ql_dbg_disc, vha, 0xffff, 1382 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n", 1383 __func__, __LINE__, ea->fcport->port_name, 1384 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area, 1385 ea->fcport->d_id.b.al_pa); 1386 1387 qla2x00_clear_loop_id(ea->fcport); 1388 qla24xx_post_gidpn_work(vha, ea->fcport); 1389 break; 1390 } 1391 return; 1392 } 1393 1394 void 1395 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1396 uint16_t *data) 1397 { 1398 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1399 qlt_logo_completion_handler(fcport, data[0]); 1400 fcport->login_gen++; 1401 return; 1402 } 1403 1404 void 1405 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1406 uint16_t *data) 1407 { 1408 if (data[0] == MBS_COMMAND_COMPLETE) { 1409 qla2x00_update_fcport(vha, fcport); 1410 1411 return; 1412 } 1413 1414 /* Retry login. */ 1415 fcport->flags &= ~FCF_ASYNC_SENT; 1416 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 1417 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1418 else 1419 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1420 1421 return; 1422 } 1423 1424 /****************************************************************************/ 1425 /* QLogic ISP2x00 Hardware Support Functions. */ 1426 /****************************************************************************/ 1427 1428 static int 1429 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 1430 { 1431 int rval = QLA_SUCCESS; 1432 struct qla_hw_data *ha = vha->hw; 1433 uint32_t idc_major_ver, idc_minor_ver; 1434 uint16_t config[4]; 1435 1436 qla83xx_idc_lock(vha, 0); 1437 1438 /* SV: TODO: Assign initialization timeout from 1439 * flash-info / other param 1440 */ 1441 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 1442 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 1443 1444 /* Set our fcoe function presence */ 1445 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 1446 ql_dbg(ql_dbg_p3p, vha, 0xb077, 1447 "Error while setting DRV-Presence.\n"); 1448 rval = QLA_FUNCTION_FAILED; 1449 goto exit; 1450 } 1451 1452 /* Decide the reset ownership */ 1453 qla83xx_reset_ownership(vha); 1454 1455 /* 1456 * On first protocol driver load: 1457 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 1458 * register. 1459 * Others: Check compatibility with current IDC Major version. 1460 */ 1461 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 1462 if (ha->flags.nic_core_reset_owner) { 1463 /* Set IDC Major version */ 1464 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 1465 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 1466 1467 /* Clearing IDC-Lock-Recovery register */ 1468 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 1469 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 1470 /* 1471 * Clear further IDC participation if we are not compatible with 1472 * the current IDC Major Version. 1473 */ 1474 ql_log(ql_log_warn, vha, 0xb07d, 1475 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 1476 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 1477 __qla83xx_clear_drv_presence(vha); 1478 rval = QLA_FUNCTION_FAILED; 1479 goto exit; 1480 } 1481 /* Each function sets its supported Minor version. */ 1482 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 1483 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 1484 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 1485 1486 if (ha->flags.nic_core_reset_owner) { 1487 memset(config, 0, sizeof(config)); 1488 if (!qla81xx_get_port_config(vha, config)) 1489 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 1490 QLA8XXX_DEV_READY); 1491 } 1492 1493 rval = qla83xx_idc_state_handler(vha); 1494 1495 exit: 1496 qla83xx_idc_unlock(vha, 0); 1497 1498 return rval; 1499 } 1500 1501 /* 1502 * qla2x00_initialize_adapter 1503 * Initialize board. 1504 * 1505 * Input: 1506 * ha = adapter block pointer. 1507 * 1508 * Returns: 1509 * 0 = success 1510 */ 1511 int 1512 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 1513 { 1514 int rval; 1515 struct qla_hw_data *ha = vha->hw; 1516 struct req_que *req = ha->req_q_map[0]; 1517 1518 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 1519 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 1520 1521 /* Clear adapter flags. */ 1522 vha->flags.online = 0; 1523 ha->flags.chip_reset_done = 0; 1524 vha->flags.reset_active = 0; 1525 ha->flags.pci_channel_io_perm_failure = 0; 1526 ha->flags.eeh_busy = 0; 1527 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 1528 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1529 atomic_set(&vha->loop_state, LOOP_DOWN); 1530 vha->device_flags = DFLG_NO_CABLE; 1531 vha->dpc_flags = 0; 1532 vha->flags.management_server_logged_in = 0; 1533 vha->marker_needed = 0; 1534 ha->isp_abort_cnt = 0; 1535 ha->beacon_blink_led = 0; 1536 1537 set_bit(0, ha->req_qid_map); 1538 set_bit(0, ha->rsp_qid_map); 1539 1540 ql_dbg(ql_dbg_init, vha, 0x0040, 1541 "Configuring PCI space...\n"); 1542 rval = ha->isp_ops->pci_config(vha); 1543 if (rval) { 1544 ql_log(ql_log_warn, vha, 0x0044, 1545 "Unable to configure PCI space.\n"); 1546 return (rval); 1547 } 1548 1549 ha->isp_ops->reset_chip(vha); 1550 1551 rval = qla2xxx_get_flash_info(vha); 1552 if (rval) { 1553 ql_log(ql_log_fatal, vha, 0x004f, 1554 "Unable to validate FLASH data.\n"); 1555 return rval; 1556 } 1557 1558 if (IS_QLA8044(ha)) { 1559 qla8044_read_reset_template(vha); 1560 1561 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 1562 * If DONRESET_BIT0 is set, drivers should not set dev_state 1563 * to NEED_RESET. But if NEED_RESET is set, drivers should 1564 * should honor the reset. */ 1565 if (ql2xdontresethba == 1) 1566 qla8044_set_idc_dontreset(vha); 1567 } 1568 1569 ha->isp_ops->get_flash_version(vha, req->ring); 1570 ql_dbg(ql_dbg_init, vha, 0x0061, 1571 "Configure NVRAM parameters...\n"); 1572 1573 ha->isp_ops->nvram_config(vha); 1574 1575 if (ha->flags.disable_serdes) { 1576 /* Mask HBA via NVRAM settings? */ 1577 ql_log(ql_log_info, vha, 0x0077, 1578 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 1579 return QLA_FUNCTION_FAILED; 1580 } 1581 1582 ql_dbg(ql_dbg_init, vha, 0x0078, 1583 "Verifying loaded RISC code...\n"); 1584 1585 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 1586 rval = ha->isp_ops->chip_diag(vha); 1587 if (rval) 1588 return (rval); 1589 rval = qla2x00_setup_chip(vha); 1590 if (rval) 1591 return (rval); 1592 } 1593 1594 if (IS_QLA84XX(ha)) { 1595 ha->cs84xx = qla84xx_get_chip(vha); 1596 if (!ha->cs84xx) { 1597 ql_log(ql_log_warn, vha, 0x00d0, 1598 "Unable to configure ISP84XX.\n"); 1599 return QLA_FUNCTION_FAILED; 1600 } 1601 } 1602 1603 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 1604 rval = qla2x00_init_rings(vha); 1605 1606 ha->flags.chip_reset_done = 1; 1607 1608 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 1609 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 1610 rval = qla84xx_init_chip(vha); 1611 if (rval != QLA_SUCCESS) { 1612 ql_log(ql_log_warn, vha, 0x00d4, 1613 "Unable to initialize ISP84XX.\n"); 1614 qla84xx_put_chip(vha); 1615 } 1616 } 1617 1618 /* Load the NIC Core f/w if we are the first protocol driver. */ 1619 if (IS_QLA8031(ha)) { 1620 rval = qla83xx_nic_core_fw_load(vha); 1621 if (rval) 1622 ql_log(ql_log_warn, vha, 0x0124, 1623 "Error in initializing NIC Core f/w.\n"); 1624 } 1625 1626 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 1627 qla24xx_read_fcp_prio_cfg(vha); 1628 1629 if (IS_P3P_TYPE(ha)) 1630 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 1631 else 1632 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 1633 1634 return (rval); 1635 } 1636 1637 /** 1638 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 1639 * @ha: HA context 1640 * 1641 * Returns 0 on success. 1642 */ 1643 int 1644 qla2100_pci_config(scsi_qla_host_t *vha) 1645 { 1646 uint16_t w; 1647 unsigned long flags; 1648 struct qla_hw_data *ha = vha->hw; 1649 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1650 1651 pci_set_master(ha->pdev); 1652 pci_try_set_mwi(ha->pdev); 1653 1654 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 1655 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 1656 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 1657 1658 pci_disable_rom(ha->pdev); 1659 1660 /* Get PCI bus information. */ 1661 spin_lock_irqsave(&ha->hardware_lock, flags); 1662 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 1663 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1664 1665 return QLA_SUCCESS; 1666 } 1667 1668 /** 1669 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 1670 * @ha: HA context 1671 * 1672 * Returns 0 on success. 1673 */ 1674 int 1675 qla2300_pci_config(scsi_qla_host_t *vha) 1676 { 1677 uint16_t w; 1678 unsigned long flags = 0; 1679 uint32_t cnt; 1680 struct qla_hw_data *ha = vha->hw; 1681 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1682 1683 pci_set_master(ha->pdev); 1684 pci_try_set_mwi(ha->pdev); 1685 1686 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 1687 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 1688 1689 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 1690 w &= ~PCI_COMMAND_INTX_DISABLE; 1691 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 1692 1693 /* 1694 * If this is a 2300 card and not 2312, reset the 1695 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 1696 * the 2310 also reports itself as a 2300 so we need to get the 1697 * fb revision level -- a 6 indicates it really is a 2300 and 1698 * not a 2310. 1699 */ 1700 if (IS_QLA2300(ha)) { 1701 spin_lock_irqsave(&ha->hardware_lock, flags); 1702 1703 /* Pause RISC. */ 1704 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 1705 for (cnt = 0; cnt < 30000; cnt++) { 1706 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 1707 break; 1708 1709 udelay(10); 1710 } 1711 1712 /* Select FPM registers. */ 1713 WRT_REG_WORD(®->ctrl_status, 0x20); 1714 RD_REG_WORD(®->ctrl_status); 1715 1716 /* Get the fb rev level */ 1717 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 1718 1719 if (ha->fb_rev == FPM_2300) 1720 pci_clear_mwi(ha->pdev); 1721 1722 /* Deselect FPM registers. */ 1723 WRT_REG_WORD(®->ctrl_status, 0x0); 1724 RD_REG_WORD(®->ctrl_status); 1725 1726 /* Release RISC module. */ 1727 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1728 for (cnt = 0; cnt < 30000; cnt++) { 1729 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 1730 break; 1731 1732 udelay(10); 1733 } 1734 1735 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1736 } 1737 1738 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 1739 1740 pci_disable_rom(ha->pdev); 1741 1742 /* Get PCI bus information. */ 1743 spin_lock_irqsave(&ha->hardware_lock, flags); 1744 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 1745 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1746 1747 return QLA_SUCCESS; 1748 } 1749 1750 /** 1751 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 1752 * @ha: HA context 1753 * 1754 * Returns 0 on success. 1755 */ 1756 int 1757 qla24xx_pci_config(scsi_qla_host_t *vha) 1758 { 1759 uint16_t w; 1760 unsigned long flags = 0; 1761 struct qla_hw_data *ha = vha->hw; 1762 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1763 1764 pci_set_master(ha->pdev); 1765 pci_try_set_mwi(ha->pdev); 1766 1767 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 1768 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 1769 w &= ~PCI_COMMAND_INTX_DISABLE; 1770 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 1771 1772 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 1773 1774 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 1775 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 1776 pcix_set_mmrbc(ha->pdev, 2048); 1777 1778 /* PCIe -- adjust Maximum Read Request Size (2048). */ 1779 if (pci_is_pcie(ha->pdev)) 1780 pcie_set_readrq(ha->pdev, 4096); 1781 1782 pci_disable_rom(ha->pdev); 1783 1784 ha->chip_revision = ha->pdev->revision; 1785 1786 /* Get PCI bus information. */ 1787 spin_lock_irqsave(&ha->hardware_lock, flags); 1788 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 1789 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1790 1791 return QLA_SUCCESS; 1792 } 1793 1794 /** 1795 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 1796 * @ha: HA context 1797 * 1798 * Returns 0 on success. 1799 */ 1800 int 1801 qla25xx_pci_config(scsi_qla_host_t *vha) 1802 { 1803 uint16_t w; 1804 struct qla_hw_data *ha = vha->hw; 1805 1806 pci_set_master(ha->pdev); 1807 pci_try_set_mwi(ha->pdev); 1808 1809 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 1810 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 1811 w &= ~PCI_COMMAND_INTX_DISABLE; 1812 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 1813 1814 /* PCIe -- adjust Maximum Read Request Size (2048). */ 1815 if (pci_is_pcie(ha->pdev)) 1816 pcie_set_readrq(ha->pdev, 4096); 1817 1818 pci_disable_rom(ha->pdev); 1819 1820 ha->chip_revision = ha->pdev->revision; 1821 1822 return QLA_SUCCESS; 1823 } 1824 1825 /** 1826 * qla2x00_isp_firmware() - Choose firmware image. 1827 * @ha: HA context 1828 * 1829 * Returns 0 on success. 1830 */ 1831 static int 1832 qla2x00_isp_firmware(scsi_qla_host_t *vha) 1833 { 1834 int rval; 1835 uint16_t loop_id, topo, sw_cap; 1836 uint8_t domain, area, al_pa; 1837 struct qla_hw_data *ha = vha->hw; 1838 1839 /* Assume loading risc code */ 1840 rval = QLA_FUNCTION_FAILED; 1841 1842 if (ha->flags.disable_risc_code_load) { 1843 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 1844 1845 /* Verify checksum of loaded RISC code. */ 1846 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 1847 if (rval == QLA_SUCCESS) { 1848 /* And, verify we are not in ROM code. */ 1849 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 1850 &area, &domain, &topo, &sw_cap); 1851 } 1852 } 1853 1854 if (rval) 1855 ql_dbg(ql_dbg_init, vha, 0x007a, 1856 "**** Load RISC code ****.\n"); 1857 1858 return (rval); 1859 } 1860 1861 /** 1862 * qla2x00_reset_chip() - Reset ISP chip. 1863 * @ha: HA context 1864 * 1865 * Returns 0 on success. 1866 */ 1867 void 1868 qla2x00_reset_chip(scsi_qla_host_t *vha) 1869 { 1870 unsigned long flags = 0; 1871 struct qla_hw_data *ha = vha->hw; 1872 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1873 uint32_t cnt; 1874 uint16_t cmd; 1875 1876 if (unlikely(pci_channel_offline(ha->pdev))) 1877 return; 1878 1879 ha->isp_ops->disable_intrs(ha); 1880 1881 spin_lock_irqsave(&ha->hardware_lock, flags); 1882 1883 /* Turn off master enable */ 1884 cmd = 0; 1885 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 1886 cmd &= ~PCI_COMMAND_MASTER; 1887 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 1888 1889 if (!IS_QLA2100(ha)) { 1890 /* Pause RISC. */ 1891 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 1892 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 1893 for (cnt = 0; cnt < 30000; cnt++) { 1894 if ((RD_REG_WORD(®->hccr) & 1895 HCCR_RISC_PAUSE) != 0) 1896 break; 1897 udelay(100); 1898 } 1899 } else { 1900 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1901 udelay(10); 1902 } 1903 1904 /* Select FPM registers. */ 1905 WRT_REG_WORD(®->ctrl_status, 0x20); 1906 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1907 1908 /* FPM Soft Reset. */ 1909 WRT_REG_WORD(®->fpm_diag_config, 0x100); 1910 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 1911 1912 /* Toggle Fpm Reset. */ 1913 if (!IS_QLA2200(ha)) { 1914 WRT_REG_WORD(®->fpm_diag_config, 0x0); 1915 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 1916 } 1917 1918 /* Select frame buffer registers. */ 1919 WRT_REG_WORD(®->ctrl_status, 0x10); 1920 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1921 1922 /* Reset frame buffer FIFOs. */ 1923 if (IS_QLA2200(ha)) { 1924 WRT_FB_CMD_REG(ha, reg, 0xa000); 1925 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 1926 } else { 1927 WRT_FB_CMD_REG(ha, reg, 0x00fc); 1928 1929 /* Read back fb_cmd until zero or 3 seconds max */ 1930 for (cnt = 0; cnt < 3000; cnt++) { 1931 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 1932 break; 1933 udelay(100); 1934 } 1935 } 1936 1937 /* Select RISC module registers. */ 1938 WRT_REG_WORD(®->ctrl_status, 0); 1939 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1940 1941 /* Reset RISC processor. */ 1942 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1943 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1944 1945 /* Release RISC processor. */ 1946 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1947 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1948 } 1949 1950 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 1951 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 1952 1953 /* Reset ISP chip. */ 1954 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1955 1956 /* Wait for RISC to recover from reset. */ 1957 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1958 /* 1959 * It is necessary to for a delay here since the card doesn't 1960 * respond to PCI reads during a reset. On some architectures 1961 * this will result in an MCA. 1962 */ 1963 udelay(20); 1964 for (cnt = 30000; cnt; cnt--) { 1965 if ((RD_REG_WORD(®->ctrl_status) & 1966 CSR_ISP_SOFT_RESET) == 0) 1967 break; 1968 udelay(100); 1969 } 1970 } else 1971 udelay(10); 1972 1973 /* Reset RISC processor. */ 1974 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1975 1976 WRT_REG_WORD(®->semaphore, 0); 1977 1978 /* Release RISC processor. */ 1979 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1980 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1981 1982 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1983 for (cnt = 0; cnt < 30000; cnt++) { 1984 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 1985 break; 1986 1987 udelay(100); 1988 } 1989 } else 1990 udelay(100); 1991 1992 /* Turn on master enable */ 1993 cmd |= PCI_COMMAND_MASTER; 1994 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 1995 1996 /* Disable RISC pause on FPM parity error. */ 1997 if (!IS_QLA2100(ha)) { 1998 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 1999 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2000 } 2001 2002 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2003 } 2004 2005 /** 2006 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2007 * 2008 * Returns 0 on success. 2009 */ 2010 static int 2011 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2012 { 2013 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2014 2015 if (!IS_QLA81XX(vha->hw)) 2016 return QLA_SUCCESS; 2017 2018 return qla81xx_write_mpi_register(vha, mb); 2019 } 2020 2021 /** 2022 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2023 * @ha: HA context 2024 * 2025 * Returns 0 on success. 2026 */ 2027 static inline int 2028 qla24xx_reset_risc(scsi_qla_host_t *vha) 2029 { 2030 unsigned long flags = 0; 2031 struct qla_hw_data *ha = vha->hw; 2032 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2033 uint32_t cnt; 2034 uint16_t wd; 2035 static int abts_cnt; /* ISP abort retry counts */ 2036 int rval = QLA_SUCCESS; 2037 2038 spin_lock_irqsave(&ha->hardware_lock, flags); 2039 2040 /* Reset RISC. */ 2041 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2042 for (cnt = 0; cnt < 30000; cnt++) { 2043 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2044 break; 2045 2046 udelay(10); 2047 } 2048 2049 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2050 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2051 2052 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2053 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2054 RD_REG_DWORD(®->hccr), 2055 RD_REG_DWORD(®->ctrl_status), 2056 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2057 2058 WRT_REG_DWORD(®->ctrl_status, 2059 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2060 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2061 2062 udelay(100); 2063 2064 /* Wait for firmware to complete NVRAM accesses. */ 2065 RD_REG_WORD(®->mailbox0); 2066 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2067 rval == QLA_SUCCESS; cnt--) { 2068 barrier(); 2069 if (cnt) 2070 udelay(5); 2071 else 2072 rval = QLA_FUNCTION_TIMEOUT; 2073 } 2074 2075 if (rval == QLA_SUCCESS) 2076 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2077 2078 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2079 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2080 RD_REG_DWORD(®->hccr), 2081 RD_REG_DWORD(®->mailbox0)); 2082 2083 /* Wait for soft-reset to complete. */ 2084 RD_REG_DWORD(®->ctrl_status); 2085 for (cnt = 0; cnt < 60; cnt++) { 2086 barrier(); 2087 if ((RD_REG_DWORD(®->ctrl_status) & 2088 CSRX_ISP_SOFT_RESET) == 0) 2089 break; 2090 2091 udelay(5); 2092 } 2093 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2094 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2095 2096 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2097 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2098 RD_REG_DWORD(®->hccr), 2099 RD_REG_DWORD(®->ctrl_status)); 2100 2101 /* If required, do an MPI FW reset now */ 2102 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2103 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2104 if (++abts_cnt < 5) { 2105 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2106 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2107 } else { 2108 /* 2109 * We exhausted the ISP abort retries. We have to 2110 * set the board offline. 2111 */ 2112 abts_cnt = 0; 2113 vha->flags.online = 0; 2114 } 2115 } 2116 } 2117 2118 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2119 RD_REG_DWORD(®->hccr); 2120 2121 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2122 RD_REG_DWORD(®->hccr); 2123 2124 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2125 RD_REG_DWORD(®->hccr); 2126 2127 RD_REG_WORD(®->mailbox0); 2128 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2129 rval == QLA_SUCCESS; cnt--) { 2130 barrier(); 2131 if (cnt) 2132 udelay(5); 2133 else 2134 rval = QLA_FUNCTION_TIMEOUT; 2135 } 2136 if (rval == QLA_SUCCESS) 2137 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2138 2139 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2140 "Host Risc 0x%x, mailbox0 0x%x\n", 2141 RD_REG_DWORD(®->hccr), 2142 RD_REG_WORD(®->mailbox0)); 2143 2144 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2145 2146 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2147 "Driver in %s mode\n", 2148 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2149 2150 if (IS_NOPOLLING_TYPE(ha)) 2151 ha->isp_ops->enable_intrs(ha); 2152 2153 return rval; 2154 } 2155 2156 static void 2157 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2158 { 2159 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2160 2161 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2162 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2163 2164 } 2165 2166 static void 2167 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2168 { 2169 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2170 2171 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2172 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2173 } 2174 2175 static void 2176 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2177 { 2178 uint32_t wd32 = 0; 2179 uint delta_msec = 100; 2180 uint elapsed_msec = 0; 2181 uint timeout_msec; 2182 ulong n; 2183 2184 if (vha->hw->pdev->subsystem_device != 0x0175 && 2185 vha->hw->pdev->subsystem_device != 0x0240) 2186 return; 2187 2188 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2189 udelay(100); 2190 2191 attempt: 2192 timeout_msec = TIMEOUT_SEMAPHORE; 2193 n = timeout_msec / delta_msec; 2194 while (n--) { 2195 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2196 qla25xx_read_risc_sema_reg(vha, &wd32); 2197 if (wd32 & RISC_SEMAPHORE) 2198 break; 2199 msleep(delta_msec); 2200 elapsed_msec += delta_msec; 2201 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2202 goto force; 2203 } 2204 2205 if (!(wd32 & RISC_SEMAPHORE)) 2206 goto force; 2207 2208 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2209 goto acquired; 2210 2211 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2212 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2213 n = timeout_msec / delta_msec; 2214 while (n--) { 2215 qla25xx_read_risc_sema_reg(vha, &wd32); 2216 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2217 break; 2218 msleep(delta_msec); 2219 elapsed_msec += delta_msec; 2220 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2221 goto force; 2222 } 2223 2224 if (wd32 & RISC_SEMAPHORE_FORCE) 2225 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2226 2227 goto attempt; 2228 2229 force: 2230 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2231 2232 acquired: 2233 return; 2234 } 2235 2236 /** 2237 * qla24xx_reset_chip() - Reset ISP24xx chip. 2238 * @ha: HA context 2239 * 2240 * Returns 0 on success. 2241 */ 2242 void 2243 qla24xx_reset_chip(scsi_qla_host_t *vha) 2244 { 2245 struct qla_hw_data *ha = vha->hw; 2246 2247 if (pci_channel_offline(ha->pdev) && 2248 ha->flags.pci_channel_io_perm_failure) { 2249 return; 2250 } 2251 2252 ha->isp_ops->disable_intrs(ha); 2253 2254 qla25xx_manipulate_risc_semaphore(vha); 2255 2256 /* Perform RISC reset. */ 2257 qla24xx_reset_risc(vha); 2258 } 2259 2260 /** 2261 * qla2x00_chip_diag() - Test chip for proper operation. 2262 * @ha: HA context 2263 * 2264 * Returns 0 on success. 2265 */ 2266 int 2267 qla2x00_chip_diag(scsi_qla_host_t *vha) 2268 { 2269 int rval; 2270 struct qla_hw_data *ha = vha->hw; 2271 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2272 unsigned long flags = 0; 2273 uint16_t data; 2274 uint32_t cnt; 2275 uint16_t mb[5]; 2276 struct req_que *req = ha->req_q_map[0]; 2277 2278 /* Assume a failed state */ 2279 rval = QLA_FUNCTION_FAILED; 2280 2281 ql_dbg(ql_dbg_init, vha, 0x007b, 2282 "Testing device at %lx.\n", (u_long)®->flash_address); 2283 2284 spin_lock_irqsave(&ha->hardware_lock, flags); 2285 2286 /* Reset ISP chip. */ 2287 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2288 2289 /* 2290 * We need to have a delay here since the card will not respond while 2291 * in reset causing an MCA on some architectures. 2292 */ 2293 udelay(20); 2294 data = qla2x00_debounce_register(®->ctrl_status); 2295 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2296 udelay(5); 2297 data = RD_REG_WORD(®->ctrl_status); 2298 barrier(); 2299 } 2300 2301 if (!cnt) 2302 goto chip_diag_failed; 2303 2304 ql_dbg(ql_dbg_init, vha, 0x007c, 2305 "Reset register cleared by chip reset.\n"); 2306 2307 /* Reset RISC processor. */ 2308 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2309 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2310 2311 /* Workaround for QLA2312 PCI parity error */ 2312 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2313 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2314 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2315 udelay(5); 2316 data = RD_MAILBOX_REG(ha, reg, 0); 2317 barrier(); 2318 } 2319 } else 2320 udelay(10); 2321 2322 if (!cnt) 2323 goto chip_diag_failed; 2324 2325 /* Check product ID of chip */ 2326 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); 2327 2328 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2329 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2330 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2331 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2332 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2333 mb[3] != PROD_ID_3) { 2334 ql_log(ql_log_warn, vha, 0x0062, 2335 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2336 mb[1], mb[2], mb[3]); 2337 2338 goto chip_diag_failed; 2339 } 2340 ha->product_id[0] = mb[1]; 2341 ha->product_id[1] = mb[2]; 2342 ha->product_id[2] = mb[3]; 2343 ha->product_id[3] = mb[4]; 2344 2345 /* Adjust fw RISC transfer size */ 2346 if (req->length > 1024) 2347 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2348 else 2349 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2350 req->length; 2351 2352 if (IS_QLA2200(ha) && 2353 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2354 /* Limit firmware transfer size with a 2200A */ 2355 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2356 2357 ha->device_type |= DT_ISP2200A; 2358 ha->fw_transfer_size = 128; 2359 } 2360 2361 /* Wrap Incoming Mailboxes Test. */ 2362 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2363 2364 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2365 rval = qla2x00_mbx_reg_test(vha); 2366 if (rval) 2367 ql_log(ql_log_warn, vha, 0x0080, 2368 "Failed mailbox send register test.\n"); 2369 else 2370 /* Flag a successful rval */ 2371 rval = QLA_SUCCESS; 2372 spin_lock_irqsave(&ha->hardware_lock, flags); 2373 2374 chip_diag_failed: 2375 if (rval) 2376 ql_log(ql_log_info, vha, 0x0081, 2377 "Chip diagnostics **** FAILED ****.\n"); 2378 2379 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2380 2381 return (rval); 2382 } 2383 2384 /** 2385 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 2386 * @ha: HA context 2387 * 2388 * Returns 0 on success. 2389 */ 2390 int 2391 qla24xx_chip_diag(scsi_qla_host_t *vha) 2392 { 2393 int rval; 2394 struct qla_hw_data *ha = vha->hw; 2395 struct req_que *req = ha->req_q_map[0]; 2396 2397 if (IS_P3P_TYPE(ha)) 2398 return QLA_SUCCESS; 2399 2400 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 2401 2402 rval = qla2x00_mbx_reg_test(vha); 2403 if (rval) { 2404 ql_log(ql_log_warn, vha, 0x0082, 2405 "Failed mailbox send register test.\n"); 2406 } else { 2407 /* Flag a successful rval */ 2408 rval = QLA_SUCCESS; 2409 } 2410 2411 return rval; 2412 } 2413 2414 void 2415 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 2416 { 2417 int rval; 2418 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 2419 eft_size, fce_size, mq_size; 2420 dma_addr_t tc_dma; 2421 void *tc; 2422 struct qla_hw_data *ha = vha->hw; 2423 struct req_que *req = ha->req_q_map[0]; 2424 struct rsp_que *rsp = ha->rsp_q_map[0]; 2425 2426 if (ha->fw_dump) { 2427 ql_dbg(ql_dbg_init, vha, 0x00bd, 2428 "Firmware dump already allocated.\n"); 2429 return; 2430 } 2431 2432 ha->fw_dumped = 0; 2433 ha->fw_dump_cap_flags = 0; 2434 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 2435 req_q_size = rsp_q_size = 0; 2436 2437 if (IS_QLA27XX(ha)) 2438 goto try_fce; 2439 2440 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2441 fixed_size = sizeof(struct qla2100_fw_dump); 2442 } else if (IS_QLA23XX(ha)) { 2443 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 2444 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 2445 sizeof(uint16_t); 2446 } else if (IS_FWI2_CAPABLE(ha)) { 2447 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 2448 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 2449 else if (IS_QLA81XX(ha)) 2450 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 2451 else if (IS_QLA25XX(ha)) 2452 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 2453 else 2454 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 2455 2456 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 2457 sizeof(uint32_t); 2458 if (ha->mqenable) { 2459 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 2460 mq_size = sizeof(struct qla2xxx_mq_chain); 2461 /* 2462 * Allocate maximum buffer size for all queues. 2463 * Resizing must be done at end-of-dump processing. 2464 */ 2465 mq_size += ha->max_req_queues * 2466 (req->length * sizeof(request_t)); 2467 mq_size += ha->max_rsp_queues * 2468 (rsp->length * sizeof(response_t)); 2469 } 2470 if (ha->tgt.atio_ring) 2471 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 2472 /* Allocate memory for Fibre Channel Event Buffer. */ 2473 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2474 !IS_QLA27XX(ha)) 2475 goto try_eft; 2476 2477 try_fce: 2478 if (ha->fce) 2479 dma_free_coherent(&ha->pdev->dev, 2480 FCE_SIZE, ha->fce, ha->fce_dma); 2481 2482 /* Allocate memory for Fibre Channel Event Buffer. */ 2483 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 2484 GFP_KERNEL); 2485 if (!tc) { 2486 ql_log(ql_log_warn, vha, 0x00be, 2487 "Unable to allocate (%d KB) for FCE.\n", 2488 FCE_SIZE / 1024); 2489 goto try_eft; 2490 } 2491 2492 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 2493 ha->fce_mb, &ha->fce_bufs); 2494 if (rval) { 2495 ql_log(ql_log_warn, vha, 0x00bf, 2496 "Unable to initialize FCE (%d).\n", rval); 2497 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 2498 tc_dma); 2499 ha->flags.fce_enabled = 0; 2500 goto try_eft; 2501 } 2502 ql_dbg(ql_dbg_init, vha, 0x00c0, 2503 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 2504 2505 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 2506 ha->flags.fce_enabled = 1; 2507 ha->fce_dma = tc_dma; 2508 ha->fce = tc; 2509 2510 try_eft: 2511 if (ha->eft) 2512 dma_free_coherent(&ha->pdev->dev, 2513 EFT_SIZE, ha->eft, ha->eft_dma); 2514 2515 /* Allocate memory for Extended Trace Buffer. */ 2516 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 2517 GFP_KERNEL); 2518 if (!tc) { 2519 ql_log(ql_log_warn, vha, 0x00c1, 2520 "Unable to allocate (%d KB) for EFT.\n", 2521 EFT_SIZE / 1024); 2522 goto cont_alloc; 2523 } 2524 2525 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 2526 if (rval) { 2527 ql_log(ql_log_warn, vha, 0x00c2, 2528 "Unable to initialize EFT (%d).\n", rval); 2529 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 2530 tc_dma); 2531 goto cont_alloc; 2532 } 2533 ql_dbg(ql_dbg_init, vha, 0x00c3, 2534 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2535 2536 eft_size = EFT_SIZE; 2537 ha->eft_dma = tc_dma; 2538 ha->eft = tc; 2539 } 2540 2541 cont_alloc: 2542 if (IS_QLA27XX(ha)) { 2543 if (!ha->fw_dump_template) { 2544 ql_log(ql_log_warn, vha, 0x00ba, 2545 "Failed missing fwdump template\n"); 2546 return; 2547 } 2548 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 2549 ql_dbg(ql_dbg_init, vha, 0x00fa, 2550 "-> allocating fwdump (%x bytes)...\n", dump_size); 2551 goto allocate; 2552 } 2553 2554 req_q_size = req->length * sizeof(request_t); 2555 rsp_q_size = rsp->length * sizeof(response_t); 2556 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 2557 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 2558 ha->chain_offset = dump_size; 2559 dump_size += mq_size + fce_size; 2560 2561 allocate: 2562 ha->fw_dump = vmalloc(dump_size); 2563 if (!ha->fw_dump) { 2564 ql_log(ql_log_warn, vha, 0x00c4, 2565 "Unable to allocate (%d KB) for firmware dump.\n", 2566 dump_size / 1024); 2567 2568 if (ha->fce) { 2569 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 2570 ha->fce_dma); 2571 ha->fce = NULL; 2572 ha->fce_dma = 0; 2573 } 2574 2575 if (ha->eft) { 2576 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, 2577 ha->eft_dma); 2578 ha->eft = NULL; 2579 ha->eft_dma = 0; 2580 } 2581 return; 2582 } 2583 ha->fw_dump_len = dump_size; 2584 ql_dbg(ql_dbg_init, vha, 0x00c5, 2585 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); 2586 2587 if (IS_QLA27XX(ha)) 2588 return; 2589 2590 ha->fw_dump->signature[0] = 'Q'; 2591 ha->fw_dump->signature[1] = 'L'; 2592 ha->fw_dump->signature[2] = 'G'; 2593 ha->fw_dump->signature[3] = 'C'; 2594 ha->fw_dump->version = htonl(1); 2595 2596 ha->fw_dump->fixed_size = htonl(fixed_size); 2597 ha->fw_dump->mem_size = htonl(mem_size); 2598 ha->fw_dump->req_q_size = htonl(req_q_size); 2599 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 2600 2601 ha->fw_dump->eft_size = htonl(eft_size); 2602 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 2603 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 2604 2605 ha->fw_dump->header_size = 2606 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 2607 } 2608 2609 static int 2610 qla81xx_mpi_sync(scsi_qla_host_t *vha) 2611 { 2612 #define MPS_MASK 0xe0 2613 int rval; 2614 uint16_t dc; 2615 uint32_t dw; 2616 2617 if (!IS_QLA81XX(vha->hw)) 2618 return QLA_SUCCESS; 2619 2620 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 2621 if (rval != QLA_SUCCESS) { 2622 ql_log(ql_log_warn, vha, 0x0105, 2623 "Unable to acquire semaphore.\n"); 2624 goto done; 2625 } 2626 2627 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 2628 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 2629 if (rval != QLA_SUCCESS) { 2630 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 2631 goto done_release; 2632 } 2633 2634 dc &= MPS_MASK; 2635 if (dc == (dw & MPS_MASK)) 2636 goto done_release; 2637 2638 dw &= ~MPS_MASK; 2639 dw |= dc; 2640 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 2641 if (rval != QLA_SUCCESS) { 2642 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 2643 } 2644 2645 done_release: 2646 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 2647 if (rval != QLA_SUCCESS) { 2648 ql_log(ql_log_warn, vha, 0x006d, 2649 "Unable to release semaphore.\n"); 2650 } 2651 2652 done: 2653 return rval; 2654 } 2655 2656 int 2657 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 2658 { 2659 /* Don't try to reallocate the array */ 2660 if (req->outstanding_cmds) 2661 return QLA_SUCCESS; 2662 2663 if (!IS_FWI2_CAPABLE(ha)) 2664 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 2665 else { 2666 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 2667 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 2668 else 2669 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 2670 } 2671 2672 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 2673 req->num_outstanding_cmds, GFP_KERNEL); 2674 2675 if (!req->outstanding_cmds) { 2676 /* 2677 * Try to allocate a minimal size just so we can get through 2678 * initialization. 2679 */ 2680 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 2681 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 2682 req->num_outstanding_cmds, GFP_KERNEL); 2683 2684 if (!req->outstanding_cmds) { 2685 ql_log(ql_log_fatal, NULL, 0x0126, 2686 "Failed to allocate memory for " 2687 "outstanding_cmds for req_que %p.\n", req); 2688 req->num_outstanding_cmds = 0; 2689 return QLA_FUNCTION_FAILED; 2690 } 2691 } 2692 2693 return QLA_SUCCESS; 2694 } 2695 2696 /** 2697 * qla2x00_setup_chip() - Load and start RISC firmware. 2698 * @ha: HA context 2699 * 2700 * Returns 0 on success. 2701 */ 2702 static int 2703 qla2x00_setup_chip(scsi_qla_host_t *vha) 2704 { 2705 int rval; 2706 uint32_t srisc_address = 0; 2707 struct qla_hw_data *ha = vha->hw; 2708 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2709 unsigned long flags; 2710 uint16_t fw_major_version; 2711 2712 if (IS_P3P_TYPE(ha)) { 2713 rval = ha->isp_ops->load_risc(vha, &srisc_address); 2714 if (rval == QLA_SUCCESS) { 2715 qla2x00_stop_firmware(vha); 2716 goto enable_82xx_npiv; 2717 } else 2718 goto failed; 2719 } 2720 2721 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 2722 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 2723 spin_lock_irqsave(&ha->hardware_lock, flags); 2724 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 2725 RD_REG_WORD(®->hccr); 2726 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2727 } 2728 2729 qla81xx_mpi_sync(vha); 2730 2731 /* Load firmware sequences */ 2732 rval = ha->isp_ops->load_risc(vha, &srisc_address); 2733 if (rval == QLA_SUCCESS) { 2734 ql_dbg(ql_dbg_init, vha, 0x00c9, 2735 "Verifying Checksum of loaded RISC code.\n"); 2736 2737 rval = qla2x00_verify_checksum(vha, srisc_address); 2738 if (rval == QLA_SUCCESS) { 2739 /* Start firmware execution. */ 2740 ql_dbg(ql_dbg_init, vha, 0x00ca, 2741 "Starting firmware.\n"); 2742 2743 if (ql2xexlogins) 2744 ha->flags.exlogins_enabled = 1; 2745 2746 if (ql2xexchoffld) 2747 ha->flags.exchoffld_enabled = 1; 2748 2749 rval = qla2x00_execute_fw(vha, srisc_address); 2750 /* Retrieve firmware information. */ 2751 if (rval == QLA_SUCCESS) { 2752 rval = qla2x00_set_exlogins_buffer(vha); 2753 if (rval != QLA_SUCCESS) 2754 goto failed; 2755 2756 rval = qla2x00_set_exchoffld_buffer(vha); 2757 if (rval != QLA_SUCCESS) 2758 goto failed; 2759 2760 enable_82xx_npiv: 2761 fw_major_version = ha->fw_major_version; 2762 if (IS_P3P_TYPE(ha)) 2763 qla82xx_check_md_needed(vha); 2764 else 2765 rval = qla2x00_get_fw_version(vha); 2766 if (rval != QLA_SUCCESS) 2767 goto failed; 2768 ha->flags.npiv_supported = 0; 2769 if (IS_QLA2XXX_MIDTYPE(ha) && 2770 (ha->fw_attributes & BIT_2)) { 2771 ha->flags.npiv_supported = 1; 2772 if ((!ha->max_npiv_vports) || 2773 ((ha->max_npiv_vports + 1) % 2774 MIN_MULTI_ID_FABRIC)) 2775 ha->max_npiv_vports = 2776 MIN_MULTI_ID_FABRIC - 1; 2777 } 2778 qla2x00_get_resource_cnts(vha); 2779 2780 /* 2781 * Allocate the array of outstanding commands 2782 * now that we know the firmware resources. 2783 */ 2784 rval = qla2x00_alloc_outstanding_cmds(ha, 2785 vha->req); 2786 if (rval != QLA_SUCCESS) 2787 goto failed; 2788 2789 if (!fw_major_version && ql2xallocfwdump 2790 && !(IS_P3P_TYPE(ha))) 2791 qla2x00_alloc_fw_dump(vha); 2792 } else { 2793 goto failed; 2794 } 2795 } else { 2796 ql_log(ql_log_fatal, vha, 0x00cd, 2797 "ISP Firmware failed checksum.\n"); 2798 goto failed; 2799 } 2800 } else 2801 goto failed; 2802 2803 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 2804 /* Enable proper parity. */ 2805 spin_lock_irqsave(&ha->hardware_lock, flags); 2806 if (IS_QLA2300(ha)) 2807 /* SRAM parity */ 2808 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 2809 else 2810 /* SRAM, Instruction RAM and GP RAM parity */ 2811 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 2812 RD_REG_WORD(®->hccr); 2813 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2814 } 2815 2816 if (IS_QLA27XX(ha)) 2817 ha->flags.fac_supported = 1; 2818 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 2819 uint32_t size; 2820 2821 rval = qla81xx_fac_get_sector_size(vha, &size); 2822 if (rval == QLA_SUCCESS) { 2823 ha->flags.fac_supported = 1; 2824 ha->fdt_block_size = size << 2; 2825 } else { 2826 ql_log(ql_log_warn, vha, 0x00ce, 2827 "Unsupported FAC firmware (%d.%02d.%02d).\n", 2828 ha->fw_major_version, ha->fw_minor_version, 2829 ha->fw_subminor_version); 2830 2831 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 2832 ha->flags.fac_supported = 0; 2833 rval = QLA_SUCCESS; 2834 } 2835 } 2836 } 2837 failed: 2838 if (rval) { 2839 ql_log(ql_log_fatal, vha, 0x00cf, 2840 "Setup chip ****FAILED****.\n"); 2841 } 2842 2843 return (rval); 2844 } 2845 2846 /** 2847 * qla2x00_init_response_q_entries() - Initializes response queue entries. 2848 * @ha: HA context 2849 * 2850 * Beginning of request ring has initialization control block already built 2851 * by nvram config routine. 2852 * 2853 * Returns 0 on success. 2854 */ 2855 void 2856 qla2x00_init_response_q_entries(struct rsp_que *rsp) 2857 { 2858 uint16_t cnt; 2859 response_t *pkt; 2860 2861 rsp->ring_ptr = rsp->ring; 2862 rsp->ring_index = 0; 2863 rsp->status_srb = NULL; 2864 pkt = rsp->ring_ptr; 2865 for (cnt = 0; cnt < rsp->length; cnt++) { 2866 pkt->signature = RESPONSE_PROCESSED; 2867 pkt++; 2868 } 2869 } 2870 2871 /** 2872 * qla2x00_update_fw_options() - Read and process firmware options. 2873 * @ha: HA context 2874 * 2875 * Returns 0 on success. 2876 */ 2877 void 2878 qla2x00_update_fw_options(scsi_qla_host_t *vha) 2879 { 2880 uint16_t swing, emphasis, tx_sens, rx_sens; 2881 struct qla_hw_data *ha = vha->hw; 2882 2883 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 2884 qla2x00_get_fw_options(vha, ha->fw_options); 2885 2886 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 2887 return; 2888 2889 /* Serial Link options. */ 2890 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 2891 "Serial link options.\n"); 2892 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 2893 (uint8_t *)&ha->fw_seriallink_options, 2894 sizeof(ha->fw_seriallink_options)); 2895 2896 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 2897 if (ha->fw_seriallink_options[3] & BIT_2) { 2898 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 2899 2900 /* 1G settings */ 2901 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 2902 emphasis = (ha->fw_seriallink_options[2] & 2903 (BIT_4 | BIT_3)) >> 3; 2904 tx_sens = ha->fw_seriallink_options[0] & 2905 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2906 rx_sens = (ha->fw_seriallink_options[0] & 2907 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 2908 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 2909 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 2910 if (rx_sens == 0x0) 2911 rx_sens = 0x3; 2912 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 2913 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2914 ha->fw_options[10] |= BIT_5 | 2915 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 2916 (tx_sens & (BIT_1 | BIT_0)); 2917 2918 /* 2G settings */ 2919 swing = (ha->fw_seriallink_options[2] & 2920 (BIT_7 | BIT_6 | BIT_5)) >> 5; 2921 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 2922 tx_sens = ha->fw_seriallink_options[1] & 2923 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2924 rx_sens = (ha->fw_seriallink_options[1] & 2925 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 2926 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 2927 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 2928 if (rx_sens == 0x0) 2929 rx_sens = 0x3; 2930 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 2931 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2932 ha->fw_options[11] |= BIT_5 | 2933 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 2934 (tx_sens & (BIT_1 | BIT_0)); 2935 } 2936 2937 /* FCP2 options. */ 2938 /* Return command IOCBs without waiting for an ABTS to complete. */ 2939 ha->fw_options[3] |= BIT_13; 2940 2941 /* LED scheme. */ 2942 if (ha->flags.enable_led_scheme) 2943 ha->fw_options[2] |= BIT_12; 2944 2945 /* Detect ISP6312. */ 2946 if (IS_QLA6312(ha)) 2947 ha->fw_options[2] |= BIT_13; 2948 2949 /* Set Retry FLOGI in case of P2P connection */ 2950 if (ha->operating_mode == P2P) { 2951 ha->fw_options[2] |= BIT_3; 2952 ql_dbg(ql_dbg_disc, vha, 0x2100, 2953 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 2954 __func__, ha->fw_options[2]); 2955 } 2956 2957 /* Update firmware options. */ 2958 qla2x00_set_fw_options(vha, ha->fw_options); 2959 } 2960 2961 void 2962 qla24xx_update_fw_options(scsi_qla_host_t *vha) 2963 { 2964 int rval; 2965 struct qla_hw_data *ha = vha->hw; 2966 2967 if (IS_P3P_TYPE(ha)) 2968 return; 2969 2970 /* Hold status IOCBs until ABTS response received. */ 2971 if (ql2xfwholdabts) 2972 ha->fw_options[3] |= BIT_12; 2973 2974 /* Set Retry FLOGI in case of P2P connection */ 2975 if (ha->operating_mode == P2P) { 2976 ha->fw_options[2] |= BIT_3; 2977 ql_dbg(ql_dbg_disc, vha, 0x2101, 2978 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 2979 __func__, ha->fw_options[2]); 2980 } 2981 2982 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 2983 if (ql2xmvasynctoatio) { 2984 if (qla_tgt_mode_enabled(vha) || 2985 qla_dual_mode_enabled(vha)) 2986 ha->fw_options[2] |= BIT_11; 2987 else 2988 ha->fw_options[2] &= ~BIT_11; 2989 } 2990 2991 ql_dbg(ql_dbg_init, vha, 0xffff, 2992 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 2993 __func__, ha->fw_options[1], ha->fw_options[2], 2994 ha->fw_options[3], vha->host->active_mode); 2995 qla2x00_set_fw_options(vha, ha->fw_options); 2996 2997 /* Update Serial Link options. */ 2998 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 2999 return; 3000 3001 rval = qla2x00_set_serdes_params(vha, 3002 le16_to_cpu(ha->fw_seriallink_options24[1]), 3003 le16_to_cpu(ha->fw_seriallink_options24[2]), 3004 le16_to_cpu(ha->fw_seriallink_options24[3])); 3005 if (rval != QLA_SUCCESS) { 3006 ql_log(ql_log_warn, vha, 0x0104, 3007 "Unable to update Serial Link options (%x).\n", rval); 3008 } 3009 } 3010 3011 void 3012 qla2x00_config_rings(struct scsi_qla_host *vha) 3013 { 3014 struct qla_hw_data *ha = vha->hw; 3015 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3016 struct req_que *req = ha->req_q_map[0]; 3017 struct rsp_que *rsp = ha->rsp_q_map[0]; 3018 3019 /* Setup ring parameters in initialization control block. */ 3020 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3021 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3022 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3023 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3024 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3025 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3026 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3027 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3028 3029 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3030 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3031 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3032 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3033 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3034 } 3035 3036 void 3037 qla24xx_config_rings(struct scsi_qla_host *vha) 3038 { 3039 struct qla_hw_data *ha = vha->hw; 3040 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3041 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3042 struct qla_msix_entry *msix; 3043 struct init_cb_24xx *icb; 3044 uint16_t rid = 0; 3045 struct req_que *req = ha->req_q_map[0]; 3046 struct rsp_que *rsp = ha->rsp_q_map[0]; 3047 3048 /* Setup ring parameters in initialization control block. */ 3049 icb = (struct init_cb_24xx *)ha->init_cb; 3050 icb->request_q_outpointer = cpu_to_le16(0); 3051 icb->response_q_inpointer = cpu_to_le16(0); 3052 icb->request_q_length = cpu_to_le16(req->length); 3053 icb->response_q_length = cpu_to_le16(rsp->length); 3054 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3055 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3056 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3057 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3058 3059 /* Setup ATIO queue dma pointers for target mode */ 3060 icb->atio_q_inpointer = cpu_to_le16(0); 3061 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3062 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3063 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3064 3065 if (IS_SHADOW_REG_CAPABLE(ha)) 3066 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3067 3068 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3069 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3070 icb->rid = cpu_to_le16(rid); 3071 if (ha->flags.msix_enabled) { 3072 msix = &ha->msix_entries[1]; 3073 ql_dbg(ql_dbg_init, vha, 0x00fd, 3074 "Registering vector 0x%x for base que.\n", 3075 msix->entry); 3076 icb->msix = cpu_to_le16(msix->entry); 3077 } 3078 /* Use alternate PCI bus number */ 3079 if (MSB(rid)) 3080 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3081 /* Use alternate PCI devfn */ 3082 if (LSB(rid)) 3083 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3084 3085 /* Use Disable MSIX Handshake mode for capable adapters */ 3086 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3087 (ha->flags.msix_enabled)) { 3088 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3089 ha->flags.disable_msix_handshake = 1; 3090 ql_dbg(ql_dbg_init, vha, 0x00fe, 3091 "MSIX Handshake Disable Mode turned on.\n"); 3092 } else { 3093 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3094 } 3095 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3096 3097 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3098 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3099 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3100 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3101 } else { 3102 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3103 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3104 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3105 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3106 } 3107 qlt_24xx_config_rings(vha); 3108 3109 /* PCI posting */ 3110 RD_REG_DWORD(&ioreg->hccr); 3111 } 3112 3113 /** 3114 * qla2x00_init_rings() - Initializes firmware. 3115 * @ha: HA context 3116 * 3117 * Beginning of request ring has initialization control block already built 3118 * by nvram config routine. 3119 * 3120 * Returns 0 on success. 3121 */ 3122 int 3123 qla2x00_init_rings(scsi_qla_host_t *vha) 3124 { 3125 int rval; 3126 unsigned long flags = 0; 3127 int cnt, que; 3128 struct qla_hw_data *ha = vha->hw; 3129 struct req_que *req; 3130 struct rsp_que *rsp; 3131 struct mid_init_cb_24xx *mid_init_cb = 3132 (struct mid_init_cb_24xx *) ha->init_cb; 3133 3134 spin_lock_irqsave(&ha->hardware_lock, flags); 3135 3136 /* Clear outstanding commands array. */ 3137 for (que = 0; que < ha->max_req_queues; que++) { 3138 req = ha->req_q_map[que]; 3139 if (!req || !test_bit(que, ha->req_qid_map)) 3140 continue; 3141 req->out_ptr = (void *)(req->ring + req->length); 3142 *req->out_ptr = 0; 3143 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3144 req->outstanding_cmds[cnt] = NULL; 3145 3146 req->current_outstanding_cmd = 1; 3147 3148 /* Initialize firmware. */ 3149 req->ring_ptr = req->ring; 3150 req->ring_index = 0; 3151 req->cnt = req->length; 3152 } 3153 3154 for (que = 0; que < ha->max_rsp_queues; que++) { 3155 rsp = ha->rsp_q_map[que]; 3156 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 3157 continue; 3158 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 3159 *rsp->in_ptr = 0; 3160 /* Initialize response queue entries */ 3161 if (IS_QLAFX00(ha)) 3162 qlafx00_init_response_q_entries(rsp); 3163 else 3164 qla2x00_init_response_q_entries(rsp); 3165 } 3166 3167 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 3168 ha->tgt.atio_ring_index = 0; 3169 /* Initialize ATIO queue entries */ 3170 qlt_init_atio_q_entries(vha); 3171 3172 ha->isp_ops->config_rings(vha); 3173 3174 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3175 3176 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 3177 3178 if (IS_QLAFX00(ha)) { 3179 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 3180 goto next_check; 3181 } 3182 3183 /* Update any ISP specific firmware options before initialization. */ 3184 ha->isp_ops->update_fw_options(vha); 3185 3186 if (ha->flags.npiv_supported) { 3187 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 3188 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 3189 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 3190 } 3191 3192 if (IS_FWI2_CAPABLE(ha)) { 3193 mid_init_cb->options = cpu_to_le16(BIT_1); 3194 mid_init_cb->init_cb.execution_throttle = 3195 cpu_to_le16(ha->cur_fw_xcb_count); 3196 ha->flags.dport_enabled = 3197 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 3198 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 3199 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 3200 /* FA-WWPN Status */ 3201 ha->flags.fawwpn_enabled = 3202 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 3203 ql_dbg(ql_dbg_init, vha, 0x0141, "FA-WWPN Support: %s.\n", 3204 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 3205 } 3206 3207 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 3208 next_check: 3209 if (rval) { 3210 ql_log(ql_log_fatal, vha, 0x00d2, 3211 "Init Firmware **** FAILED ****.\n"); 3212 } else { 3213 ql_dbg(ql_dbg_init, vha, 0x00d3, 3214 "Init Firmware -- success.\n"); 3215 } 3216 3217 return (rval); 3218 } 3219 3220 /** 3221 * qla2x00_fw_ready() - Waits for firmware ready. 3222 * @ha: HA context 3223 * 3224 * Returns 0 on success. 3225 */ 3226 static int 3227 qla2x00_fw_ready(scsi_qla_host_t *vha) 3228 { 3229 int rval; 3230 unsigned long wtime, mtime, cs84xx_time; 3231 uint16_t min_wait; /* Minimum wait time if loop is down */ 3232 uint16_t wait_time; /* Wait time if loop is coming ready */ 3233 uint16_t state[6]; 3234 struct qla_hw_data *ha = vha->hw; 3235 3236 if (IS_QLAFX00(vha->hw)) 3237 return qlafx00_fw_ready(vha); 3238 3239 rval = QLA_SUCCESS; 3240 3241 /* Time to wait for loop down */ 3242 if (IS_P3P_TYPE(ha)) 3243 min_wait = 30; 3244 else 3245 min_wait = 20; 3246 3247 /* 3248 * Firmware should take at most one RATOV to login, plus 5 seconds for 3249 * our own processing. 3250 */ 3251 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 3252 wait_time = min_wait; 3253 } 3254 3255 /* Min wait time if loop down */ 3256 mtime = jiffies + (min_wait * HZ); 3257 3258 /* wait time before firmware ready */ 3259 wtime = jiffies + (wait_time * HZ); 3260 3261 /* Wait for ISP to finish LIP */ 3262 if (!vha->flags.init_done) 3263 ql_log(ql_log_info, vha, 0x801e, 3264 "Waiting for LIP to complete.\n"); 3265 3266 do { 3267 memset(state, -1, sizeof(state)); 3268 rval = qla2x00_get_firmware_state(vha, state); 3269 if (rval == QLA_SUCCESS) { 3270 if (state[0] < FSTATE_LOSS_OF_SYNC) { 3271 vha->device_flags &= ~DFLG_NO_CABLE; 3272 } 3273 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 3274 ql_dbg(ql_dbg_taskm, vha, 0x801f, 3275 "fw_state=%x 84xx=%x.\n", state[0], 3276 state[2]); 3277 if ((state[2] & FSTATE_LOGGED_IN) && 3278 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 3279 ql_dbg(ql_dbg_taskm, vha, 0x8028, 3280 "Sending verify iocb.\n"); 3281 3282 cs84xx_time = jiffies; 3283 rval = qla84xx_init_chip(vha); 3284 if (rval != QLA_SUCCESS) { 3285 ql_log(ql_log_warn, 3286 vha, 0x8007, 3287 "Init chip failed.\n"); 3288 break; 3289 } 3290 3291 /* Add time taken to initialize. */ 3292 cs84xx_time = jiffies - cs84xx_time; 3293 wtime += cs84xx_time; 3294 mtime += cs84xx_time; 3295 ql_dbg(ql_dbg_taskm, vha, 0x8008, 3296 "Increasing wait time by %ld. " 3297 "New time %ld.\n", cs84xx_time, 3298 wtime); 3299 } 3300 } else if (state[0] == FSTATE_READY) { 3301 ql_dbg(ql_dbg_taskm, vha, 0x8037, 3302 "F/W Ready - OK.\n"); 3303 3304 qla2x00_get_retry_cnt(vha, &ha->retry_count, 3305 &ha->login_timeout, &ha->r_a_tov); 3306 3307 rval = QLA_SUCCESS; 3308 break; 3309 } 3310 3311 rval = QLA_FUNCTION_FAILED; 3312 3313 if (atomic_read(&vha->loop_down_timer) && 3314 state[0] != FSTATE_READY) { 3315 /* Loop down. Timeout on min_wait for states 3316 * other than Wait for Login. 3317 */ 3318 if (time_after_eq(jiffies, mtime)) { 3319 ql_log(ql_log_info, vha, 0x8038, 3320 "Cable is unplugged...\n"); 3321 3322 vha->device_flags |= DFLG_NO_CABLE; 3323 break; 3324 } 3325 } 3326 } else { 3327 /* Mailbox cmd failed. Timeout on min_wait. */ 3328 if (time_after_eq(jiffies, mtime) || 3329 ha->flags.isp82xx_fw_hung) 3330 break; 3331 } 3332 3333 if (time_after_eq(jiffies, wtime)) 3334 break; 3335 3336 /* Delay for a while */ 3337 msleep(500); 3338 } while (1); 3339 3340 ql_dbg(ql_dbg_taskm, vha, 0x803a, 3341 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 3342 state[1], state[2], state[3], state[4], state[5], jiffies); 3343 3344 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 3345 ql_log(ql_log_warn, vha, 0x803b, 3346 "Firmware ready **** FAILED ****.\n"); 3347 } 3348 3349 return (rval); 3350 } 3351 3352 /* 3353 * qla2x00_configure_hba 3354 * Setup adapter context. 3355 * 3356 * Input: 3357 * ha = adapter state pointer. 3358 * 3359 * Returns: 3360 * 0 = success 3361 * 3362 * Context: 3363 * Kernel context. 3364 */ 3365 static int 3366 qla2x00_configure_hba(scsi_qla_host_t *vha) 3367 { 3368 int rval; 3369 uint16_t loop_id; 3370 uint16_t topo; 3371 uint16_t sw_cap; 3372 uint8_t al_pa; 3373 uint8_t area; 3374 uint8_t domain; 3375 char connect_type[22]; 3376 struct qla_hw_data *ha = vha->hw; 3377 unsigned long flags; 3378 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 3379 3380 /* Get host addresses. */ 3381 rval = qla2x00_get_adapter_id(vha, 3382 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 3383 if (rval != QLA_SUCCESS) { 3384 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 3385 IS_CNA_CAPABLE(ha) || 3386 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 3387 ql_dbg(ql_dbg_disc, vha, 0x2008, 3388 "Loop is in a transition state.\n"); 3389 } else { 3390 ql_log(ql_log_warn, vha, 0x2009, 3391 "Unable to get host loop ID.\n"); 3392 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 3393 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 3394 ql_log(ql_log_warn, vha, 0x1151, 3395 "Doing link init.\n"); 3396 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 3397 return rval; 3398 } 3399 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3400 } 3401 return (rval); 3402 } 3403 3404 if (topo == 4) { 3405 ql_log(ql_log_info, vha, 0x200a, 3406 "Cannot get topology - retrying.\n"); 3407 return (QLA_FUNCTION_FAILED); 3408 } 3409 3410 vha->loop_id = loop_id; 3411 3412 /* initialize */ 3413 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 3414 ha->operating_mode = LOOP; 3415 ha->switch_cap = 0; 3416 3417 switch (topo) { 3418 case 0: 3419 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 3420 ha->current_topology = ISP_CFG_NL; 3421 strcpy(connect_type, "(Loop)"); 3422 break; 3423 3424 case 1: 3425 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 3426 ha->switch_cap = sw_cap; 3427 ha->current_topology = ISP_CFG_FL; 3428 strcpy(connect_type, "(FL_Port)"); 3429 break; 3430 3431 case 2: 3432 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 3433 ha->operating_mode = P2P; 3434 ha->current_topology = ISP_CFG_N; 3435 strcpy(connect_type, "(N_Port-to-N_Port)"); 3436 break; 3437 3438 case 3: 3439 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 3440 ha->switch_cap = sw_cap; 3441 ha->operating_mode = P2P; 3442 ha->current_topology = ISP_CFG_F; 3443 strcpy(connect_type, "(F_Port)"); 3444 break; 3445 3446 default: 3447 ql_dbg(ql_dbg_disc, vha, 0x200f, 3448 "HBA in unknown topology %x, using NL.\n", topo); 3449 ha->current_topology = ISP_CFG_NL; 3450 strcpy(connect_type, "(Loop)"); 3451 break; 3452 } 3453 3454 /* Save Host port and loop ID. */ 3455 /* byte order - Big Endian */ 3456 vha->d_id.b.domain = domain; 3457 vha->d_id.b.area = area; 3458 vha->d_id.b.al_pa = al_pa; 3459 3460 spin_lock_irqsave(&ha->vport_slock, flags); 3461 qlt_update_vp_map(vha, SET_AL_PA); 3462 spin_unlock_irqrestore(&ha->vport_slock, flags); 3463 3464 if (!vha->flags.init_done) 3465 ql_log(ql_log_info, vha, 0x2010, 3466 "Topology - %s, Host Loop address 0x%x.\n", 3467 connect_type, vha->loop_id); 3468 3469 return(rval); 3470 } 3471 3472 inline void 3473 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 3474 char *def) 3475 { 3476 char *st, *en; 3477 uint16_t index; 3478 struct qla_hw_data *ha = vha->hw; 3479 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 3480 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 3481 3482 if (memcmp(model, BINZERO, len) != 0) { 3483 strncpy(ha->model_number, model, len); 3484 st = en = ha->model_number; 3485 en += len - 1; 3486 while (en > st) { 3487 if (*en != 0x20 && *en != 0x00) 3488 break; 3489 *en-- = '\0'; 3490 } 3491 3492 index = (ha->pdev->subsystem_device & 0xff); 3493 if (use_tbl && 3494 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 3495 index < QLA_MODEL_NAMES) 3496 strncpy(ha->model_desc, 3497 qla2x00_model_name[index * 2 + 1], 3498 sizeof(ha->model_desc) - 1); 3499 } else { 3500 index = (ha->pdev->subsystem_device & 0xff); 3501 if (use_tbl && 3502 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 3503 index < QLA_MODEL_NAMES) { 3504 strcpy(ha->model_number, 3505 qla2x00_model_name[index * 2]); 3506 strncpy(ha->model_desc, 3507 qla2x00_model_name[index * 2 + 1], 3508 sizeof(ha->model_desc) - 1); 3509 } else { 3510 strcpy(ha->model_number, def); 3511 } 3512 } 3513 if (IS_FWI2_CAPABLE(ha)) 3514 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 3515 sizeof(ha->model_desc)); 3516 } 3517 3518 /* On sparc systems, obtain port and node WWN from firmware 3519 * properties. 3520 */ 3521 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 3522 { 3523 #ifdef CONFIG_SPARC 3524 struct qla_hw_data *ha = vha->hw; 3525 struct pci_dev *pdev = ha->pdev; 3526 struct device_node *dp = pci_device_to_OF_node(pdev); 3527 const u8 *val; 3528 int len; 3529 3530 val = of_get_property(dp, "port-wwn", &len); 3531 if (val && len >= WWN_SIZE) 3532 memcpy(nv->port_name, val, WWN_SIZE); 3533 3534 val = of_get_property(dp, "node-wwn", &len); 3535 if (val && len >= WWN_SIZE) 3536 memcpy(nv->node_name, val, WWN_SIZE); 3537 #endif 3538 } 3539 3540 /* 3541 * NVRAM configuration for ISP 2xxx 3542 * 3543 * Input: 3544 * ha = adapter block pointer. 3545 * 3546 * Output: 3547 * initialization control block in response_ring 3548 * host adapters parameters in host adapter block 3549 * 3550 * Returns: 3551 * 0 = success. 3552 */ 3553 int 3554 qla2x00_nvram_config(scsi_qla_host_t *vha) 3555 { 3556 int rval; 3557 uint8_t chksum = 0; 3558 uint16_t cnt; 3559 uint8_t *dptr1, *dptr2; 3560 struct qla_hw_data *ha = vha->hw; 3561 init_cb_t *icb = ha->init_cb; 3562 nvram_t *nv = ha->nvram; 3563 uint8_t *ptr = ha->nvram; 3564 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3565 3566 rval = QLA_SUCCESS; 3567 3568 /* Determine NVRAM starting address. */ 3569 ha->nvram_size = sizeof(nvram_t); 3570 ha->nvram_base = 0; 3571 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 3572 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 3573 ha->nvram_base = 0x80; 3574 3575 /* Get NVRAM data and calculate checksum. */ 3576 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 3577 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 3578 chksum += *ptr++; 3579 3580 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 3581 "Contents of NVRAM.\n"); 3582 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 3583 (uint8_t *)nv, ha->nvram_size); 3584 3585 /* Bad NVRAM data, set defaults parameters. */ 3586 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 3587 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 3588 /* Reset NVRAM data. */ 3589 ql_log(ql_log_warn, vha, 0x0064, 3590 "Inconsistent NVRAM " 3591 "detected: checksum=0x%x id=%c version=0x%x.\n", 3592 chksum, nv->id[0], nv->nvram_version); 3593 ql_log(ql_log_warn, vha, 0x0065, 3594 "Falling back to " 3595 "functioning (yet invalid -- WWPN) defaults.\n"); 3596 3597 /* 3598 * Set default initialization control block. 3599 */ 3600 memset(nv, 0, ha->nvram_size); 3601 nv->parameter_block_version = ICB_VERSION; 3602 3603 if (IS_QLA23XX(ha)) { 3604 nv->firmware_options[0] = BIT_2 | BIT_1; 3605 nv->firmware_options[1] = BIT_7 | BIT_5; 3606 nv->add_firmware_options[0] = BIT_5; 3607 nv->add_firmware_options[1] = BIT_5 | BIT_4; 3608 nv->frame_payload_size = 2048; 3609 nv->special_options[1] = BIT_7; 3610 } else if (IS_QLA2200(ha)) { 3611 nv->firmware_options[0] = BIT_2 | BIT_1; 3612 nv->firmware_options[1] = BIT_7 | BIT_5; 3613 nv->add_firmware_options[0] = BIT_5; 3614 nv->add_firmware_options[1] = BIT_5 | BIT_4; 3615 nv->frame_payload_size = 1024; 3616 } else if (IS_QLA2100(ha)) { 3617 nv->firmware_options[0] = BIT_3 | BIT_1; 3618 nv->firmware_options[1] = BIT_5; 3619 nv->frame_payload_size = 1024; 3620 } 3621 3622 nv->max_iocb_allocation = cpu_to_le16(256); 3623 nv->execution_throttle = cpu_to_le16(16); 3624 nv->retry_count = 8; 3625 nv->retry_delay = 1; 3626 3627 nv->port_name[0] = 33; 3628 nv->port_name[3] = 224; 3629 nv->port_name[4] = 139; 3630 3631 qla2xxx_nvram_wwn_from_ofw(vha, nv); 3632 3633 nv->login_timeout = 4; 3634 3635 /* 3636 * Set default host adapter parameters 3637 */ 3638 nv->host_p[1] = BIT_2; 3639 nv->reset_delay = 5; 3640 nv->port_down_retry_count = 8; 3641 nv->max_luns_per_target = cpu_to_le16(8); 3642 nv->link_down_timeout = 60; 3643 3644 rval = 1; 3645 } 3646 3647 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 3648 /* 3649 * The SN2 does not provide BIOS emulation which means you can't change 3650 * potentially bogus BIOS settings. Force the use of default settings 3651 * for link rate and frame size. Hope that the rest of the settings 3652 * are valid. 3653 */ 3654 if (ia64_platform_is("sn2")) { 3655 nv->frame_payload_size = 2048; 3656 if (IS_QLA23XX(ha)) 3657 nv->special_options[1] = BIT_7; 3658 } 3659 #endif 3660 3661 /* Reset Initialization control block */ 3662 memset(icb, 0, ha->init_cb_size); 3663 3664 /* 3665 * Setup driver NVRAM options. 3666 */ 3667 nv->firmware_options[0] |= (BIT_6 | BIT_1); 3668 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 3669 nv->firmware_options[1] |= (BIT_5 | BIT_0); 3670 nv->firmware_options[1] &= ~BIT_4; 3671 3672 if (IS_QLA23XX(ha)) { 3673 nv->firmware_options[0] |= BIT_2; 3674 nv->firmware_options[0] &= ~BIT_3; 3675 nv->special_options[0] &= ~BIT_6; 3676 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 3677 3678 if (IS_QLA2300(ha)) { 3679 if (ha->fb_rev == FPM_2310) { 3680 strcpy(ha->model_number, "QLA2310"); 3681 } else { 3682 strcpy(ha->model_number, "QLA2300"); 3683 } 3684 } else { 3685 qla2x00_set_model_info(vha, nv->model_number, 3686 sizeof(nv->model_number), "QLA23xx"); 3687 } 3688 } else if (IS_QLA2200(ha)) { 3689 nv->firmware_options[0] |= BIT_2; 3690 /* 3691 * 'Point-to-point preferred, else loop' is not a safe 3692 * connection mode setting. 3693 */ 3694 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 3695 (BIT_5 | BIT_4)) { 3696 /* Force 'loop preferred, else point-to-point'. */ 3697 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 3698 nv->add_firmware_options[0] |= BIT_5; 3699 } 3700 strcpy(ha->model_number, "QLA22xx"); 3701 } else /*if (IS_QLA2100(ha))*/ { 3702 strcpy(ha->model_number, "QLA2100"); 3703 } 3704 3705 /* 3706 * Copy over NVRAM RISC parameter block to initialization control block. 3707 */ 3708 dptr1 = (uint8_t *)icb; 3709 dptr2 = (uint8_t *)&nv->parameter_block_version; 3710 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 3711 while (cnt--) 3712 *dptr1++ = *dptr2++; 3713 3714 /* Copy 2nd half. */ 3715 dptr1 = (uint8_t *)icb->add_firmware_options; 3716 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 3717 while (cnt--) 3718 *dptr1++ = *dptr2++; 3719 3720 /* Use alternate WWN? */ 3721 if (nv->host_p[1] & BIT_7) { 3722 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 3723 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 3724 } 3725 3726 /* Prepare nodename */ 3727 if ((icb->firmware_options[1] & BIT_6) == 0) { 3728 /* 3729 * Firmware will apply the following mask if the nodename was 3730 * not provided. 3731 */ 3732 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 3733 icb->node_name[0] &= 0xF0; 3734 } 3735 3736 /* 3737 * Set host adapter parameters. 3738 */ 3739 3740 /* 3741 * BIT_7 in the host-parameters section allows for modification to 3742 * internal driver logging. 3743 */ 3744 if (nv->host_p[0] & BIT_7) 3745 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 3746 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 3747 /* Always load RISC code on non ISP2[12]00 chips. */ 3748 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 3749 ha->flags.disable_risc_code_load = 0; 3750 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 3751 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 3752 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 3753 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 3754 ha->flags.disable_serdes = 0; 3755 3756 ha->operating_mode = 3757 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 3758 3759 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 3760 sizeof(ha->fw_seriallink_options)); 3761 3762 /* save HBA serial number */ 3763 ha->serial0 = icb->port_name[5]; 3764 ha->serial1 = icb->port_name[6]; 3765 ha->serial2 = icb->port_name[7]; 3766 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 3767 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 3768 3769 icb->execution_throttle = cpu_to_le16(0xFFFF); 3770 3771 ha->retry_count = nv->retry_count; 3772 3773 /* Set minimum login_timeout to 4 seconds. */ 3774 if (nv->login_timeout != ql2xlogintimeout) 3775 nv->login_timeout = ql2xlogintimeout; 3776 if (nv->login_timeout < 4) 3777 nv->login_timeout = 4; 3778 ha->login_timeout = nv->login_timeout; 3779 3780 /* Set minimum RATOV to 100 tenths of a second. */ 3781 ha->r_a_tov = 100; 3782 3783 ha->loop_reset_delay = nv->reset_delay; 3784 3785 /* Link Down Timeout = 0: 3786 * 3787 * When Port Down timer expires we will start returning 3788 * I/O's to OS with "DID_NO_CONNECT". 3789 * 3790 * Link Down Timeout != 0: 3791 * 3792 * The driver waits for the link to come up after link down 3793 * before returning I/Os to OS with "DID_NO_CONNECT". 3794 */ 3795 if (nv->link_down_timeout == 0) { 3796 ha->loop_down_abort_time = 3797 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 3798 } else { 3799 ha->link_down_timeout = nv->link_down_timeout; 3800 ha->loop_down_abort_time = 3801 (LOOP_DOWN_TIME - ha->link_down_timeout); 3802 } 3803 3804 /* 3805 * Need enough time to try and get the port back. 3806 */ 3807 ha->port_down_retry_count = nv->port_down_retry_count; 3808 if (qlport_down_retry) 3809 ha->port_down_retry_count = qlport_down_retry; 3810 /* Set login_retry_count */ 3811 ha->login_retry_count = nv->retry_count; 3812 if (ha->port_down_retry_count == nv->port_down_retry_count && 3813 ha->port_down_retry_count > 3) 3814 ha->login_retry_count = ha->port_down_retry_count; 3815 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 3816 ha->login_retry_count = ha->port_down_retry_count; 3817 if (ql2xloginretrycount) 3818 ha->login_retry_count = ql2xloginretrycount; 3819 3820 icb->lun_enables = cpu_to_le16(0); 3821 icb->command_resource_count = 0; 3822 icb->immediate_notify_resource_count = 0; 3823 icb->timeout = cpu_to_le16(0); 3824 3825 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3826 /* Enable RIO */ 3827 icb->firmware_options[0] &= ~BIT_3; 3828 icb->add_firmware_options[0] &= 3829 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 3830 icb->add_firmware_options[0] |= BIT_2; 3831 icb->response_accumulation_timer = 3; 3832 icb->interrupt_delay_timer = 5; 3833 3834 vha->flags.process_response_queue = 1; 3835 } else { 3836 /* Enable ZIO. */ 3837 if (!vha->flags.init_done) { 3838 ha->zio_mode = icb->add_firmware_options[0] & 3839 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3840 ha->zio_timer = icb->interrupt_delay_timer ? 3841 icb->interrupt_delay_timer: 2; 3842 } 3843 icb->add_firmware_options[0] &= 3844 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 3845 vha->flags.process_response_queue = 0; 3846 if (ha->zio_mode != QLA_ZIO_DISABLED) { 3847 ha->zio_mode = QLA_ZIO_MODE_6; 3848 3849 ql_log(ql_log_info, vha, 0x0068, 3850 "ZIO mode %d enabled; timer delay (%d us).\n", 3851 ha->zio_mode, ha->zio_timer * 100); 3852 3853 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 3854 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 3855 vha->flags.process_response_queue = 1; 3856 } 3857 } 3858 3859 if (rval) { 3860 ql_log(ql_log_warn, vha, 0x0069, 3861 "NVRAM configuration failed.\n"); 3862 } 3863 return (rval); 3864 } 3865 3866 static void 3867 qla2x00_rport_del(void *data) 3868 { 3869 fc_port_t *fcport = data; 3870 struct fc_rport *rport; 3871 unsigned long flags; 3872 3873 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 3874 rport = fcport->drport ? fcport->drport: fcport->rport; 3875 fcport->drport = NULL; 3876 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 3877 if (rport) { 3878 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 3879 "%s %8phN. rport %p roles %x \n", 3880 __func__, fcport->port_name, rport, 3881 rport->roles); 3882 3883 fc_remote_port_delete(rport); 3884 } 3885 } 3886 3887 /** 3888 * qla2x00_alloc_fcport() - Allocate a generic fcport. 3889 * @ha: HA context 3890 * @flags: allocation flags 3891 * 3892 * Returns a pointer to the allocated fcport, or NULL, if none available. 3893 */ 3894 fc_port_t * 3895 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 3896 { 3897 fc_port_t *fcport; 3898 3899 fcport = kzalloc(sizeof(fc_port_t), flags); 3900 if (!fcport) 3901 return NULL; 3902 3903 /* Setup fcport template structure. */ 3904 fcport->vha = vha; 3905 fcport->port_type = FCT_UNKNOWN; 3906 fcport->loop_id = FC_NO_LOOP_ID; 3907 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 3908 fcport->supported_classes = FC_COS_UNSPECIFIED; 3909 3910 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 3911 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 3912 flags); 3913 fcport->disc_state = DSC_DELETED; 3914 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 3915 fcport->deleted = QLA_SESS_DELETED; 3916 fcport->login_retry = vha->hw->login_retry_count; 3917 fcport->login_retry = 5; 3918 fcport->logout_on_delete = 1; 3919 3920 if (!fcport->ct_desc.ct_sns) { 3921 ql_log(ql_log_warn, vha, 0xffff, 3922 "Failed to allocate ct_sns request.\n"); 3923 kfree(fcport); 3924 fcport = NULL; 3925 } 3926 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 3927 INIT_LIST_HEAD(&fcport->gnl_entry); 3928 INIT_LIST_HEAD(&fcport->list); 3929 3930 return fcport; 3931 } 3932 3933 void 3934 qla2x00_free_fcport(fc_port_t *fcport) 3935 { 3936 if (fcport->ct_desc.ct_sns) { 3937 dma_free_coherent(&fcport->vha->hw->pdev->dev, 3938 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 3939 fcport->ct_desc.ct_sns_dma); 3940 3941 fcport->ct_desc.ct_sns = NULL; 3942 } 3943 kfree(fcport); 3944 } 3945 3946 /* 3947 * qla2x00_configure_loop 3948 * Updates Fibre Channel Device Database with what is actually on loop. 3949 * 3950 * Input: 3951 * ha = adapter block pointer. 3952 * 3953 * Returns: 3954 * 0 = success. 3955 * 1 = error. 3956 * 2 = database was full and device was not configured. 3957 */ 3958 static int 3959 qla2x00_configure_loop(scsi_qla_host_t *vha) 3960 { 3961 int rval; 3962 unsigned long flags, save_flags; 3963 struct qla_hw_data *ha = vha->hw; 3964 rval = QLA_SUCCESS; 3965 3966 /* Get Initiator ID */ 3967 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 3968 rval = qla2x00_configure_hba(vha); 3969 if (rval != QLA_SUCCESS) { 3970 ql_dbg(ql_dbg_disc, vha, 0x2013, 3971 "Unable to configure HBA.\n"); 3972 return (rval); 3973 } 3974 } 3975 3976 save_flags = flags = vha->dpc_flags; 3977 ql_dbg(ql_dbg_disc, vha, 0x2014, 3978 "Configure loop -- dpc flags = 0x%lx.\n", flags); 3979 3980 /* 3981 * If we have both an RSCN and PORT UPDATE pending then handle them 3982 * both at the same time. 3983 */ 3984 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3985 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 3986 3987 qla2x00_get_data_rate(vha); 3988 3989 /* Determine what we need to do */ 3990 if (ha->current_topology == ISP_CFG_FL && 3991 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 3992 3993 set_bit(RSCN_UPDATE, &flags); 3994 3995 } else if (ha->current_topology == ISP_CFG_F && 3996 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 3997 3998 set_bit(RSCN_UPDATE, &flags); 3999 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4000 4001 } else if (ha->current_topology == ISP_CFG_N) { 4002 clear_bit(RSCN_UPDATE, &flags); 4003 } else if (ha->current_topology == ISP_CFG_NL) { 4004 clear_bit(RSCN_UPDATE, &flags); 4005 set_bit(LOCAL_LOOP_UPDATE, &flags); 4006 } else if (!vha->flags.online || 4007 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4008 set_bit(RSCN_UPDATE, &flags); 4009 set_bit(LOCAL_LOOP_UPDATE, &flags); 4010 } 4011 4012 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4013 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4014 ql_dbg(ql_dbg_disc, vha, 0x2015, 4015 "Loop resync needed, failing.\n"); 4016 rval = QLA_FUNCTION_FAILED; 4017 } else 4018 rval = qla2x00_configure_local_loop(vha); 4019 } 4020 4021 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4022 if (LOOP_TRANSITION(vha)) { 4023 ql_dbg(ql_dbg_disc, vha, 0x201e, 4024 "Needs RSCN update and loop transition.\n"); 4025 rval = QLA_FUNCTION_FAILED; 4026 } 4027 else 4028 rval = qla2x00_configure_fabric(vha); 4029 } 4030 4031 if (rval == QLA_SUCCESS) { 4032 if (atomic_read(&vha->loop_down_timer) || 4033 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4034 rval = QLA_FUNCTION_FAILED; 4035 } else { 4036 atomic_set(&vha->loop_state, LOOP_READY); 4037 ql_dbg(ql_dbg_disc, vha, 0x2069, 4038 "LOOP READY.\n"); 4039 4040 /* 4041 * Process any ATIO queue entries that came in 4042 * while we weren't online. 4043 */ 4044 if (qla_tgt_mode_enabled(vha) || 4045 qla_dual_mode_enabled(vha)) { 4046 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) { 4047 spin_lock_irqsave(&ha->tgt.atio_lock, 4048 flags); 4049 qlt_24xx_process_atio_queue(vha, 0); 4050 spin_unlock_irqrestore( 4051 &ha->tgt.atio_lock, flags); 4052 } else { 4053 spin_lock_irqsave(&ha->hardware_lock, 4054 flags); 4055 qlt_24xx_process_atio_queue(vha, 1); 4056 spin_unlock_irqrestore( 4057 &ha->hardware_lock, flags); 4058 } 4059 } 4060 } 4061 } 4062 4063 if (rval) { 4064 ql_dbg(ql_dbg_disc, vha, 0x206a, 4065 "%s *** FAILED ***.\n", __func__); 4066 } else { 4067 ql_dbg(ql_dbg_disc, vha, 0x206b, 4068 "%s: exiting normally.\n", __func__); 4069 } 4070 4071 /* Restore state if a resync event occurred during processing */ 4072 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4073 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4074 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4075 if (test_bit(RSCN_UPDATE, &save_flags)) { 4076 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4077 } 4078 } 4079 4080 return (rval); 4081 } 4082 4083 4084 4085 /* 4086 * qla2x00_configure_local_loop 4087 * Updates Fibre Channel Device Database with local loop devices. 4088 * 4089 * Input: 4090 * ha = adapter block pointer. 4091 * 4092 * Returns: 4093 * 0 = success. 4094 */ 4095 static int 4096 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4097 { 4098 int rval, rval2; 4099 int found_devs; 4100 int found; 4101 fc_port_t *fcport, *new_fcport; 4102 4103 uint16_t index; 4104 uint16_t entries; 4105 char *id_iter; 4106 uint16_t loop_id; 4107 uint8_t domain, area, al_pa; 4108 struct qla_hw_data *ha = vha->hw; 4109 unsigned long flags; 4110 4111 found_devs = 0; 4112 new_fcport = NULL; 4113 entries = MAX_FIBRE_DEVICES_LOOP; 4114 4115 /* Get list of logged in devices. */ 4116 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4117 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4118 &entries); 4119 if (rval != QLA_SUCCESS) 4120 goto cleanup_allocation; 4121 4122 ql_dbg(ql_dbg_disc, vha, 0x2017, 4123 "Entries in ID list (%d).\n", entries); 4124 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 4125 (uint8_t *)ha->gid_list, 4126 entries * sizeof(struct gid_list_info)); 4127 4128 /* Allocate temporary fcport for any new fcports discovered. */ 4129 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4130 if (new_fcport == NULL) { 4131 ql_log(ql_log_warn, vha, 0x2018, 4132 "Memory allocation failed for fcport.\n"); 4133 rval = QLA_MEMORY_ALLOC_FAILED; 4134 goto cleanup_allocation; 4135 } 4136 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4137 4138 /* 4139 * Mark local devices that were present with FCF_DEVICE_LOST for now. 4140 */ 4141 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4142 if (atomic_read(&fcport->state) == FCS_ONLINE && 4143 fcport->port_type != FCT_BROADCAST && 4144 (fcport->flags & FCF_FABRIC_DEVICE) == 0) { 4145 4146 ql_dbg(ql_dbg_disc, vha, 0x2019, 4147 "Marking port lost loop_id=0x%04x.\n", 4148 fcport->loop_id); 4149 4150 qla2x00_mark_device_lost(vha, fcport, 0, 0); 4151 } 4152 } 4153 4154 /* Add devices to port list. */ 4155 id_iter = (char *)ha->gid_list; 4156 for (index = 0; index < entries; index++) { 4157 domain = ((struct gid_list_info *)id_iter)->domain; 4158 area = ((struct gid_list_info *)id_iter)->area; 4159 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 4160 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4161 loop_id = (uint16_t) 4162 ((struct gid_list_info *)id_iter)->loop_id_2100; 4163 else 4164 loop_id = le16_to_cpu( 4165 ((struct gid_list_info *)id_iter)->loop_id); 4166 id_iter += ha->gid_list_info_size; 4167 4168 /* Bypass reserved domain fields. */ 4169 if ((domain & 0xf0) == 0xf0) 4170 continue; 4171 4172 /* Bypass if not same domain and area of adapter. */ 4173 if (area && domain && 4174 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 4175 continue; 4176 4177 /* Bypass invalid local loop ID. */ 4178 if (loop_id > LAST_LOCAL_LOOP_ID) 4179 continue; 4180 4181 memset(new_fcport->port_name, 0, WWN_SIZE); 4182 4183 /* Fill in member data. */ 4184 new_fcport->d_id.b.domain = domain; 4185 new_fcport->d_id.b.area = area; 4186 new_fcport->d_id.b.al_pa = al_pa; 4187 new_fcport->loop_id = loop_id; 4188 4189 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 4190 if (rval2 != QLA_SUCCESS) { 4191 ql_dbg(ql_dbg_disc, vha, 0x201a, 4192 "Failed to retrieve fcport information " 4193 "-- get_port_database=%x, loop_id=0x%04x.\n", 4194 rval2, new_fcport->loop_id); 4195 ql_dbg(ql_dbg_disc, vha, 0x201b, 4196 "Scheduling resync.\n"); 4197 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4198 continue; 4199 } 4200 4201 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4202 /* Check for matching device in port list. */ 4203 found = 0; 4204 fcport = NULL; 4205 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4206 if (memcmp(new_fcport->port_name, fcport->port_name, 4207 WWN_SIZE)) 4208 continue; 4209 4210 fcport->flags &= ~FCF_FABRIC_DEVICE; 4211 fcport->loop_id = new_fcport->loop_id; 4212 fcport->port_type = new_fcport->port_type; 4213 fcport->d_id.b24 = new_fcport->d_id.b24; 4214 memcpy(fcport->node_name, new_fcport->node_name, 4215 WWN_SIZE); 4216 4217 if (!fcport->login_succ) { 4218 vha->fcport_count++; 4219 fcport->login_succ = 1; 4220 fcport->disc_state = DSC_LOGIN_COMPLETE; 4221 } 4222 4223 found++; 4224 break; 4225 } 4226 4227 if (!found) { 4228 /* New device, add to fcports list. */ 4229 list_add_tail(&new_fcport->list, &vha->vp_fcports); 4230 4231 /* Allocate a new replacement fcport. */ 4232 fcport = new_fcport; 4233 if (!fcport->login_succ) { 4234 vha->fcport_count++; 4235 fcport->login_succ = 1; 4236 fcport->disc_state = DSC_LOGIN_COMPLETE; 4237 } 4238 4239 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4240 4241 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4242 4243 if (new_fcport == NULL) { 4244 ql_log(ql_log_warn, vha, 0x201c, 4245 "Failed to allocate memory for fcport.\n"); 4246 rval = QLA_MEMORY_ALLOC_FAILED; 4247 goto cleanup_allocation; 4248 } 4249 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4250 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4251 } 4252 4253 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4254 4255 /* Base iIDMA settings on HBA port speed. */ 4256 fcport->fp_speed = ha->link_data_rate; 4257 4258 qla2x00_update_fcport(vha, fcport); 4259 4260 found_devs++; 4261 } 4262 4263 cleanup_allocation: 4264 kfree(new_fcport); 4265 4266 if (rval != QLA_SUCCESS) { 4267 ql_dbg(ql_dbg_disc, vha, 0x201d, 4268 "Configure local loop error exit: rval=%x.\n", rval); 4269 } 4270 4271 return (rval); 4272 } 4273 4274 static void 4275 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 4276 { 4277 int rval; 4278 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4279 struct qla_hw_data *ha = vha->hw; 4280 4281 if (!IS_IIDMA_CAPABLE(ha)) 4282 return; 4283 4284 if (atomic_read(&fcport->state) != FCS_ONLINE) 4285 return; 4286 4287 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 4288 fcport->fp_speed > ha->link_data_rate) 4289 return; 4290 4291 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 4292 mb); 4293 if (rval != QLA_SUCCESS) { 4294 ql_dbg(ql_dbg_disc, vha, 0x2004, 4295 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 4296 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 4297 } else { 4298 ql_dbg(ql_dbg_disc, vha, 0x2005, 4299 "iIDMA adjusted to %s GB/s on %8phN.\n", 4300 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 4301 fcport->port_name); 4302 } 4303 } 4304 4305 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 4306 static void 4307 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 4308 { 4309 struct fc_rport_identifiers rport_ids; 4310 struct fc_rport *rport; 4311 unsigned long flags; 4312 4313 rport_ids.node_name = wwn_to_u64(fcport->node_name); 4314 rport_ids.port_name = wwn_to_u64(fcport->port_name); 4315 rport_ids.port_id = fcport->d_id.b.domain << 16 | 4316 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 4317 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 4318 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 4319 if (!rport) { 4320 ql_log(ql_log_warn, vha, 0x2006, 4321 "Unable to allocate fc remote port.\n"); 4322 return; 4323 } 4324 4325 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4326 *((fc_port_t **)rport->dd_data) = fcport; 4327 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4328 4329 rport->supported_classes = fcport->supported_classes; 4330 4331 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 4332 if (fcport->port_type == FCT_INITIATOR) 4333 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 4334 if (fcport->port_type == FCT_TARGET) 4335 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 4336 4337 ql_dbg(ql_dbg_disc, vha, 0xffff, 4338 "%s %8phN. rport %p is %s mode \n", 4339 __func__, fcport->port_name, rport, 4340 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 4341 4342 fc_remote_port_rolechg(rport, rport_ids.roles); 4343 } 4344 4345 /* 4346 * qla2x00_update_fcport 4347 * Updates device on list. 4348 * 4349 * Input: 4350 * ha = adapter block pointer. 4351 * fcport = port structure pointer. 4352 * 4353 * Return: 4354 * 0 - Success 4355 * BIT_0 - error 4356 * 4357 * Context: 4358 * Kernel context. 4359 */ 4360 void 4361 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 4362 { 4363 fcport->vha = vha; 4364 4365 if (IS_SW_RESV_ADDR(fcport->d_id)) 4366 return; 4367 4368 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %8phC \n", 4369 __func__, fcport->port_name); 4370 4371 if (IS_QLAFX00(vha->hw)) { 4372 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 4373 goto reg_port; 4374 } 4375 fcport->login_retry = 0; 4376 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4377 fcport->disc_state = DSC_LOGIN_COMPLETE; 4378 fcport->deleted = 0; 4379 fcport->logout_on_delete = 1; 4380 4381 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 4382 qla2x00_iidma_fcport(vha, fcport); 4383 qla24xx_update_fcport_fcp_prio(vha, fcport); 4384 4385 reg_port: 4386 switch (vha->host->active_mode) { 4387 case MODE_INITIATOR: 4388 qla2x00_reg_remote_port(vha, fcport); 4389 break; 4390 case MODE_TARGET: 4391 if (!vha->vha_tgt.qla_tgt->tgt_stop && 4392 !vha->vha_tgt.qla_tgt->tgt_stopped) 4393 qlt_fc_port_added(vha, fcport); 4394 break; 4395 case MODE_DUAL: 4396 qla2x00_reg_remote_port(vha, fcport); 4397 if (!vha->vha_tgt.qla_tgt->tgt_stop && 4398 !vha->vha_tgt.qla_tgt->tgt_stopped) 4399 qlt_fc_port_added(vha, fcport); 4400 break; 4401 default: 4402 break; 4403 } 4404 } 4405 4406 /* 4407 * qla2x00_configure_fabric 4408 * Setup SNS devices with loop ID's. 4409 * 4410 * Input: 4411 * ha = adapter block pointer. 4412 * 4413 * Returns: 4414 * 0 = success. 4415 * BIT_0 = error 4416 */ 4417 static int 4418 qla2x00_configure_fabric(scsi_qla_host_t *vha) 4419 { 4420 int rval; 4421 fc_port_t *fcport; 4422 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4423 uint16_t loop_id; 4424 LIST_HEAD(new_fcports); 4425 struct qla_hw_data *ha = vha->hw; 4426 int discovery_gen; 4427 4428 /* If FL port exists, then SNS is present */ 4429 if (IS_FWI2_CAPABLE(ha)) 4430 loop_id = NPH_F_PORT; 4431 else 4432 loop_id = SNS_FL_PORT; 4433 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 4434 if (rval != QLA_SUCCESS) { 4435 ql_dbg(ql_dbg_disc, vha, 0x201f, 4436 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 4437 4438 vha->device_flags &= ~SWITCH_FOUND; 4439 return (QLA_SUCCESS); 4440 } 4441 vha->device_flags |= SWITCH_FOUND; 4442 4443 4444 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 4445 rval = qla2x00_send_change_request(vha, 0x3, 0); 4446 if (rval != QLA_SUCCESS) 4447 ql_log(ql_log_warn, vha, 0x121, 4448 "Failed to enable receiving of RSCN requests: 0x%x.\n", 4449 rval); 4450 } 4451 4452 4453 do { 4454 qla2x00_mgmt_svr_login(vha); 4455 4456 /* FDMI support. */ 4457 if (ql2xfdmienable && 4458 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 4459 qla2x00_fdmi_register(vha); 4460 4461 /* Ensure we are logged into the SNS. */ 4462 if (IS_FWI2_CAPABLE(ha)) 4463 loop_id = NPH_SNS; 4464 else 4465 loop_id = SIMPLE_NAME_SERVER; 4466 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 4467 0xfc, mb, BIT_1|BIT_0); 4468 if (rval != QLA_SUCCESS) { 4469 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4470 return rval; 4471 } 4472 if (mb[0] != MBS_COMMAND_COMPLETE) { 4473 ql_dbg(ql_dbg_disc, vha, 0x2042, 4474 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 4475 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], 4476 mb[2], mb[6], mb[7]); 4477 return (QLA_SUCCESS); 4478 } 4479 4480 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 4481 if (qla2x00_rft_id(vha)) { 4482 /* EMPTY */ 4483 ql_dbg(ql_dbg_disc, vha, 0x2045, 4484 "Register FC-4 TYPE failed.\n"); 4485 } 4486 if (qla2x00_rff_id(vha)) { 4487 /* EMPTY */ 4488 ql_dbg(ql_dbg_disc, vha, 0x2049, 4489 "Register FC-4 Features failed.\n"); 4490 } 4491 if (qla2x00_rnn_id(vha)) { 4492 /* EMPTY */ 4493 ql_dbg(ql_dbg_disc, vha, 0x204f, 4494 "Register Node Name failed.\n"); 4495 } else if (qla2x00_rsnn_nn(vha)) { 4496 /* EMPTY */ 4497 ql_dbg(ql_dbg_disc, vha, 0x2053, 4498 "Register Symobilic Node Name failed.\n"); 4499 } 4500 } 4501 4502 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4503 fcport->scan_state = QLA_FCPORT_SCAN; 4504 } 4505 4506 /* Mark the time right before querying FW for connected ports. 4507 * This process is long, asynchronous and by the time it's done, 4508 * collected information might not be accurate anymore. E.g. 4509 * disconnected port might have re-connected and a brand new 4510 * session has been created. In this case session's generation 4511 * will be newer than discovery_gen. */ 4512 qlt_do_generation_tick(vha, &discovery_gen); 4513 4514 rval = qla2x00_find_all_fabric_devs(vha); 4515 if (rval != QLA_SUCCESS) 4516 break; 4517 } while (0); 4518 4519 if (rval) 4520 ql_dbg(ql_dbg_disc, vha, 0x2068, 4521 "Configure fabric error exit rval=%d.\n", rval); 4522 4523 return (rval); 4524 } 4525 4526 /* 4527 * qla2x00_find_all_fabric_devs 4528 * 4529 * Input: 4530 * ha = adapter block pointer. 4531 * dev = database device entry pointer. 4532 * 4533 * Returns: 4534 * 0 = success. 4535 * 4536 * Context: 4537 * Kernel context. 4538 */ 4539 static int 4540 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 4541 { 4542 int rval; 4543 uint16_t loop_id; 4544 fc_port_t *fcport, *new_fcport; 4545 int found; 4546 4547 sw_info_t *swl; 4548 int swl_idx; 4549 int first_dev, last_dev; 4550 port_id_t wrap = {}, nxt_d_id; 4551 struct qla_hw_data *ha = vha->hw; 4552 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 4553 unsigned long flags; 4554 4555 rval = QLA_SUCCESS; 4556 4557 /* Try GID_PT to get device list, else GAN. */ 4558 if (!ha->swl) 4559 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 4560 GFP_KERNEL); 4561 swl = ha->swl; 4562 if (!swl) { 4563 /*EMPTY*/ 4564 ql_dbg(ql_dbg_disc, vha, 0x2054, 4565 "GID_PT allocations failed, fallback on GA_NXT.\n"); 4566 } else { 4567 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 4568 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 4569 swl = NULL; 4570 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 4571 swl = NULL; 4572 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 4573 swl = NULL; 4574 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 4575 swl = NULL; 4576 } 4577 4578 /* If other queries succeeded probe for FC-4 type */ 4579 if (swl) 4580 qla2x00_gff_id(vha, swl); 4581 } 4582 swl_idx = 0; 4583 4584 /* Allocate temporary fcport for any new fcports discovered. */ 4585 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4586 if (new_fcport == NULL) { 4587 ql_log(ql_log_warn, vha, 0x205e, 4588 "Failed to allocate memory for fcport.\n"); 4589 return (QLA_MEMORY_ALLOC_FAILED); 4590 } 4591 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 4592 /* Set start port ID scan at adapter ID. */ 4593 first_dev = 1; 4594 last_dev = 0; 4595 4596 /* Starting free loop ID. */ 4597 loop_id = ha->min_external_loopid; 4598 for (; loop_id <= ha->max_loop_id; loop_id++) { 4599 if (qla2x00_is_reserved_id(vha, loop_id)) 4600 continue; 4601 4602 if (ha->current_topology == ISP_CFG_FL && 4603 (atomic_read(&vha->loop_down_timer) || 4604 LOOP_TRANSITION(vha))) { 4605 atomic_set(&vha->loop_down_timer, 0); 4606 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4607 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4608 break; 4609 } 4610 4611 if (swl != NULL) { 4612 if (last_dev) { 4613 wrap.b24 = new_fcport->d_id.b24; 4614 } else { 4615 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 4616 memcpy(new_fcport->node_name, 4617 swl[swl_idx].node_name, WWN_SIZE); 4618 memcpy(new_fcport->port_name, 4619 swl[swl_idx].port_name, WWN_SIZE); 4620 memcpy(new_fcport->fabric_port_name, 4621 swl[swl_idx].fabric_port_name, WWN_SIZE); 4622 new_fcport->fp_speed = swl[swl_idx].fp_speed; 4623 new_fcport->fc4_type = swl[swl_idx].fc4_type; 4624 4625 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 4626 last_dev = 1; 4627 } 4628 swl_idx++; 4629 } 4630 } else { 4631 /* Send GA_NXT to the switch */ 4632 rval = qla2x00_ga_nxt(vha, new_fcport); 4633 if (rval != QLA_SUCCESS) { 4634 ql_log(ql_log_warn, vha, 0x2064, 4635 "SNS scan failed -- assuming " 4636 "zero-entry result.\n"); 4637 rval = QLA_SUCCESS; 4638 break; 4639 } 4640 } 4641 4642 /* If wrap on switch device list, exit. */ 4643 if (first_dev) { 4644 wrap.b24 = new_fcport->d_id.b24; 4645 first_dev = 0; 4646 } else if (new_fcport->d_id.b24 == wrap.b24) { 4647 ql_dbg(ql_dbg_disc, vha, 0x2065, 4648 "Device wrap (%02x%02x%02x).\n", 4649 new_fcport->d_id.b.domain, 4650 new_fcport->d_id.b.area, 4651 new_fcport->d_id.b.al_pa); 4652 break; 4653 } 4654 4655 /* Bypass if same physical adapter. */ 4656 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 4657 continue; 4658 4659 /* Bypass virtual ports of the same host. */ 4660 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 4661 continue; 4662 4663 /* Bypass if same domain and area of adapter. */ 4664 if (((new_fcport->d_id.b24 & 0xffff00) == 4665 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 4666 ISP_CFG_FL) 4667 continue; 4668 4669 /* Bypass reserved domain fields. */ 4670 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 4671 continue; 4672 4673 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 4674 if (ql2xgffidenable && 4675 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 4676 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 4677 continue; 4678 4679 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4680 4681 /* Locate matching device in database. */ 4682 found = 0; 4683 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4684 if (memcmp(new_fcport->port_name, fcport->port_name, 4685 WWN_SIZE)) 4686 continue; 4687 4688 fcport->scan_state = QLA_FCPORT_FOUND; 4689 4690 found++; 4691 4692 /* Update port state. */ 4693 memcpy(fcport->fabric_port_name, 4694 new_fcport->fabric_port_name, WWN_SIZE); 4695 fcport->fp_speed = new_fcport->fp_speed; 4696 4697 /* 4698 * If address the same and state FCS_ONLINE 4699 * (or in target mode), nothing changed. 4700 */ 4701 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 4702 (atomic_read(&fcport->state) == FCS_ONLINE || 4703 (vha->host->active_mode == MODE_TARGET))) { 4704 break; 4705 } 4706 4707 /* 4708 * If device was not a fabric device before. 4709 */ 4710 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 4711 fcport->d_id.b24 = new_fcport->d_id.b24; 4712 qla2x00_clear_loop_id(fcport); 4713 fcport->flags |= (FCF_FABRIC_DEVICE | 4714 FCF_LOGIN_NEEDED); 4715 break; 4716 } 4717 4718 /* 4719 * Port ID changed or device was marked to be updated; 4720 * Log it out if still logged in and mark it for 4721 * relogin later. 4722 */ 4723 if (qla_tgt_mode_enabled(base_vha)) { 4724 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 4725 "port changed FC ID, %8phC" 4726 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 4727 fcport->port_name, 4728 fcport->d_id.b.domain, 4729 fcport->d_id.b.area, 4730 fcport->d_id.b.al_pa, 4731 fcport->loop_id, 4732 new_fcport->d_id.b.domain, 4733 new_fcport->d_id.b.area, 4734 new_fcport->d_id.b.al_pa); 4735 fcport->d_id.b24 = new_fcport->d_id.b24; 4736 break; 4737 } 4738 4739 fcport->d_id.b24 = new_fcport->d_id.b24; 4740 fcport->flags |= FCF_LOGIN_NEEDED; 4741 break; 4742 } 4743 4744 if (found) { 4745 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4746 continue; 4747 } 4748 /* If device was not in our fcports list, then add it. */ 4749 new_fcport->scan_state = QLA_FCPORT_FOUND; 4750 list_add_tail(&new_fcport->list, &vha->vp_fcports); 4751 4752 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4753 4754 4755 /* Allocate a new replacement fcport. */ 4756 nxt_d_id.b24 = new_fcport->d_id.b24; 4757 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4758 if (new_fcport == NULL) { 4759 ql_log(ql_log_warn, vha, 0x2066, 4760 "Memory allocation failed for fcport.\n"); 4761 return (QLA_MEMORY_ALLOC_FAILED); 4762 } 4763 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 4764 new_fcport->d_id.b24 = nxt_d_id.b24; 4765 } 4766 4767 qla2x00_free_fcport(new_fcport); 4768 4769 /* 4770 * Logout all previous fabric dev marked lost, except FCP2 devices. 4771 */ 4772 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4773 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 4774 break; 4775 4776 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 4777 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 4778 continue; 4779 4780 if (fcport->scan_state == QLA_FCPORT_SCAN) { 4781 if ((qla_dual_mode_enabled(vha) || 4782 qla_ini_mode_enabled(vha)) && 4783 atomic_read(&fcport->state) == FCS_ONLINE) { 4784 qla2x00_mark_device_lost(vha, fcport, 4785 ql2xplogiabsentdevice, 0); 4786 if (fcport->loop_id != FC_NO_LOOP_ID && 4787 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 4788 fcport->port_type != FCT_INITIATOR && 4789 fcport->port_type != FCT_BROADCAST) { 4790 ql_dbg(ql_dbg_disc, vha, 0xffff, 4791 "%s %d %8phC post del sess\n", 4792 __func__, __LINE__, 4793 fcport->port_name); 4794 4795 qlt_schedule_sess_for_deletion_lock 4796 (fcport); 4797 continue; 4798 } 4799 } 4800 } 4801 4802 if (fcport->scan_state == QLA_FCPORT_FOUND) 4803 qla24xx_fcport_handle_login(vha, fcport); 4804 } 4805 return (rval); 4806 } 4807 4808 /* 4809 * qla2x00_find_new_loop_id 4810 * Scan through our port list and find a new usable loop ID. 4811 * 4812 * Input: 4813 * ha: adapter state pointer. 4814 * dev: port structure pointer. 4815 * 4816 * Returns: 4817 * qla2x00 local function return status code. 4818 * 4819 * Context: 4820 * Kernel context. 4821 */ 4822 int 4823 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 4824 { 4825 int rval; 4826 struct qla_hw_data *ha = vha->hw; 4827 unsigned long flags = 0; 4828 4829 rval = QLA_SUCCESS; 4830 4831 spin_lock_irqsave(&ha->vport_slock, flags); 4832 4833 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 4834 LOOPID_MAP_SIZE); 4835 if (dev->loop_id >= LOOPID_MAP_SIZE || 4836 qla2x00_is_reserved_id(vha, dev->loop_id)) { 4837 dev->loop_id = FC_NO_LOOP_ID; 4838 rval = QLA_FUNCTION_FAILED; 4839 } else 4840 set_bit(dev->loop_id, ha->loop_id_map); 4841 4842 spin_unlock_irqrestore(&ha->vport_slock, flags); 4843 4844 if (rval == QLA_SUCCESS) 4845 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 4846 "Assigning new loopid=%x, portid=%x.\n", 4847 dev->loop_id, dev->d_id.b24); 4848 else 4849 ql_log(ql_log_warn, dev->vha, 0x2087, 4850 "No loop_id's available, portid=%x.\n", 4851 dev->d_id.b24); 4852 4853 return (rval); 4854 } 4855 4856 4857 /* 4858 * qla2x00_fabric_login 4859 * Issue fabric login command. 4860 * 4861 * Input: 4862 * ha = adapter block pointer. 4863 * device = pointer to FC device type structure. 4864 * 4865 * Returns: 4866 * 0 - Login successfully 4867 * 1 - Login failed 4868 * 2 - Initiator device 4869 * 3 - Fatal error 4870 */ 4871 int 4872 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 4873 uint16_t *next_loopid) 4874 { 4875 int rval; 4876 int retry; 4877 uint16_t tmp_loopid; 4878 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4879 struct qla_hw_data *ha = vha->hw; 4880 4881 retry = 0; 4882 tmp_loopid = 0; 4883 4884 for (;;) { 4885 ql_dbg(ql_dbg_disc, vha, 0x2000, 4886 "Trying Fabric Login w/loop id 0x%04x for port " 4887 "%02x%02x%02x.\n", 4888 fcport->loop_id, fcport->d_id.b.domain, 4889 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4890 4891 /* Login fcport on switch. */ 4892 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 4893 fcport->d_id.b.domain, fcport->d_id.b.area, 4894 fcport->d_id.b.al_pa, mb, BIT_0); 4895 if (rval != QLA_SUCCESS) { 4896 return rval; 4897 } 4898 if (mb[0] == MBS_PORT_ID_USED) { 4899 /* 4900 * Device has another loop ID. The firmware team 4901 * recommends the driver perform an implicit login with 4902 * the specified ID again. The ID we just used is save 4903 * here so we return with an ID that can be tried by 4904 * the next login. 4905 */ 4906 retry++; 4907 tmp_loopid = fcport->loop_id; 4908 fcport->loop_id = mb[1]; 4909 4910 ql_dbg(ql_dbg_disc, vha, 0x2001, 4911 "Fabric Login: port in use - next loop " 4912 "id=0x%04x, port id= %02x%02x%02x.\n", 4913 fcport->loop_id, fcport->d_id.b.domain, 4914 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4915 4916 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 4917 /* 4918 * Login succeeded. 4919 */ 4920 if (retry) { 4921 /* A retry occurred before. */ 4922 *next_loopid = tmp_loopid; 4923 } else { 4924 /* 4925 * No retry occurred before. Just increment the 4926 * ID value for next login. 4927 */ 4928 *next_loopid = (fcport->loop_id + 1); 4929 } 4930 4931 if (mb[1] & BIT_0) { 4932 fcport->port_type = FCT_INITIATOR; 4933 } else { 4934 fcport->port_type = FCT_TARGET; 4935 if (mb[1] & BIT_1) { 4936 fcport->flags |= FCF_FCP2_DEVICE; 4937 } 4938 } 4939 4940 if (mb[10] & BIT_0) 4941 fcport->supported_classes |= FC_COS_CLASS2; 4942 if (mb[10] & BIT_1) 4943 fcport->supported_classes |= FC_COS_CLASS3; 4944 4945 if (IS_FWI2_CAPABLE(ha)) { 4946 if (mb[10] & BIT_7) 4947 fcport->flags |= 4948 FCF_CONF_COMP_SUPPORTED; 4949 } 4950 4951 rval = QLA_SUCCESS; 4952 break; 4953 } else if (mb[0] == MBS_LOOP_ID_USED) { 4954 /* 4955 * Loop ID already used, try next loop ID. 4956 */ 4957 fcport->loop_id++; 4958 rval = qla2x00_find_new_loop_id(vha, fcport); 4959 if (rval != QLA_SUCCESS) { 4960 /* Ran out of loop IDs to use */ 4961 break; 4962 } 4963 } else if (mb[0] == MBS_COMMAND_ERROR) { 4964 /* 4965 * Firmware possibly timed out during login. If NO 4966 * retries are left to do then the device is declared 4967 * dead. 4968 */ 4969 *next_loopid = fcport->loop_id; 4970 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 4971 fcport->d_id.b.domain, fcport->d_id.b.area, 4972 fcport->d_id.b.al_pa); 4973 qla2x00_mark_device_lost(vha, fcport, 1, 0); 4974 4975 rval = 1; 4976 break; 4977 } else { 4978 /* 4979 * unrecoverable / not handled error 4980 */ 4981 ql_dbg(ql_dbg_disc, vha, 0x2002, 4982 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 4983 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 4984 fcport->d_id.b.area, fcport->d_id.b.al_pa, 4985 fcport->loop_id, jiffies); 4986 4987 *next_loopid = fcport->loop_id; 4988 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 4989 fcport->d_id.b.domain, fcport->d_id.b.area, 4990 fcport->d_id.b.al_pa); 4991 qla2x00_clear_loop_id(fcport); 4992 fcport->login_retry = 0; 4993 4994 rval = 3; 4995 break; 4996 } 4997 } 4998 4999 return (rval); 5000 } 5001 5002 /* 5003 * qla2x00_local_device_login 5004 * Issue local device login command. 5005 * 5006 * Input: 5007 * ha = adapter block pointer. 5008 * loop_id = loop id of device to login to. 5009 * 5010 * Returns (Where's the #define!!!!): 5011 * 0 - Login successfully 5012 * 1 - Login failed 5013 * 3 - Fatal error 5014 */ 5015 int 5016 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 5017 { 5018 int rval; 5019 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5020 5021 memset(mb, 0, sizeof(mb)); 5022 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 5023 if (rval == QLA_SUCCESS) { 5024 /* Interrogate mailbox registers for any errors */ 5025 if (mb[0] == MBS_COMMAND_ERROR) 5026 rval = 1; 5027 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 5028 /* device not in PCB table */ 5029 rval = 3; 5030 } 5031 5032 return (rval); 5033 } 5034 5035 /* 5036 * qla2x00_loop_resync 5037 * Resync with fibre channel devices. 5038 * 5039 * Input: 5040 * ha = adapter block pointer. 5041 * 5042 * Returns: 5043 * 0 = success 5044 */ 5045 int 5046 qla2x00_loop_resync(scsi_qla_host_t *vha) 5047 { 5048 int rval = QLA_SUCCESS; 5049 uint32_t wait_time; 5050 struct req_que *req; 5051 struct rsp_que *rsp; 5052 5053 req = vha->req; 5054 rsp = req->rsp; 5055 5056 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5057 if (vha->flags.online) { 5058 if (!(rval = qla2x00_fw_ready(vha))) { 5059 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5060 wait_time = 256; 5061 do { 5062 if (!IS_QLAFX00(vha->hw)) { 5063 /* 5064 * Issue a marker after FW becomes 5065 * ready. 5066 */ 5067 qla2x00_marker(vha, req, rsp, 0, 0, 5068 MK_SYNC_ALL); 5069 vha->marker_needed = 0; 5070 } 5071 5072 /* Remap devices on Loop. */ 5073 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5074 5075 if (IS_QLAFX00(vha->hw)) 5076 qlafx00_configure_devices(vha); 5077 else 5078 qla2x00_configure_loop(vha); 5079 5080 wait_time--; 5081 } while (!atomic_read(&vha->loop_down_timer) && 5082 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5083 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 5084 &vha->dpc_flags))); 5085 } 5086 } 5087 5088 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5089 return (QLA_FUNCTION_FAILED); 5090 5091 if (rval) 5092 ql_dbg(ql_dbg_disc, vha, 0x206c, 5093 "%s *** FAILED ***.\n", __func__); 5094 5095 return (rval); 5096 } 5097 5098 /* 5099 * qla2x00_perform_loop_resync 5100 * Description: This function will set the appropriate flags and call 5101 * qla2x00_loop_resync. If successful loop will be resynced 5102 * Arguments : scsi_qla_host_t pointer 5103 * returm : Success or Failure 5104 */ 5105 5106 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 5107 { 5108 int32_t rval = 0; 5109 5110 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 5111 /*Configure the flags so that resync happens properly*/ 5112 atomic_set(&ha->loop_down_timer, 0); 5113 if (!(ha->device_flags & DFLG_NO_CABLE)) { 5114 atomic_set(&ha->loop_state, LOOP_UP); 5115 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 5116 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 5117 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 5118 5119 rval = qla2x00_loop_resync(ha); 5120 } else 5121 atomic_set(&ha->loop_state, LOOP_DEAD); 5122 5123 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 5124 } 5125 5126 return rval; 5127 } 5128 5129 void 5130 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 5131 { 5132 fc_port_t *fcport; 5133 struct scsi_qla_host *vha; 5134 struct qla_hw_data *ha = base_vha->hw; 5135 unsigned long flags; 5136 5137 spin_lock_irqsave(&ha->vport_slock, flags); 5138 /* Go with deferred removal of rport references. */ 5139 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 5140 atomic_inc(&vha->vref_count); 5141 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5142 if (fcport->drport && 5143 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 5144 spin_unlock_irqrestore(&ha->vport_slock, flags); 5145 qla2x00_rport_del(fcport); 5146 5147 spin_lock_irqsave(&ha->vport_slock, flags); 5148 } 5149 } 5150 atomic_dec(&vha->vref_count); 5151 } 5152 spin_unlock_irqrestore(&ha->vport_slock, flags); 5153 } 5154 5155 /* Assumes idc_lock always held on entry */ 5156 void 5157 qla83xx_reset_ownership(scsi_qla_host_t *vha) 5158 { 5159 struct qla_hw_data *ha = vha->hw; 5160 uint32_t drv_presence, drv_presence_mask; 5161 uint32_t dev_part_info1, dev_part_info2, class_type; 5162 uint32_t class_type_mask = 0x3; 5163 uint16_t fcoe_other_function = 0xffff, i; 5164 5165 if (IS_QLA8044(ha)) { 5166 drv_presence = qla8044_rd_direct(vha, 5167 QLA8044_CRB_DRV_ACTIVE_INDEX); 5168 dev_part_info1 = qla8044_rd_direct(vha, 5169 QLA8044_CRB_DEV_PART_INFO_INDEX); 5170 dev_part_info2 = qla8044_rd_direct(vha, 5171 QLA8044_CRB_DEV_PART_INFO2); 5172 } else { 5173 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 5174 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 5175 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 5176 } 5177 for (i = 0; i < 8; i++) { 5178 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 5179 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5180 (i != ha->portnum)) { 5181 fcoe_other_function = i; 5182 break; 5183 } 5184 } 5185 if (fcoe_other_function == 0xffff) { 5186 for (i = 0; i < 8; i++) { 5187 class_type = ((dev_part_info2 >> (i * 4)) & 5188 class_type_mask); 5189 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5190 ((i + 8) != ha->portnum)) { 5191 fcoe_other_function = i + 8; 5192 break; 5193 } 5194 } 5195 } 5196 /* 5197 * Prepare drv-presence mask based on fcoe functions present. 5198 * However consider only valid physical fcoe function numbers (0-15). 5199 */ 5200 drv_presence_mask = ~((1 << (ha->portnum)) | 5201 ((fcoe_other_function == 0xffff) ? 5202 0 : (1 << (fcoe_other_function)))); 5203 5204 /* We are the reset owner iff: 5205 * - No other protocol drivers present. 5206 * - This is the lowest among fcoe functions. */ 5207 if (!(drv_presence & drv_presence_mask) && 5208 (ha->portnum < fcoe_other_function)) { 5209 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 5210 "This host is Reset owner.\n"); 5211 ha->flags.nic_core_reset_owner = 1; 5212 } 5213 } 5214 5215 static int 5216 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 5217 { 5218 int rval = QLA_SUCCESS; 5219 struct qla_hw_data *ha = vha->hw; 5220 uint32_t drv_ack; 5221 5222 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 5223 if (rval == QLA_SUCCESS) { 5224 drv_ack |= (1 << ha->portnum); 5225 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 5226 } 5227 5228 return rval; 5229 } 5230 5231 static int 5232 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 5233 { 5234 int rval = QLA_SUCCESS; 5235 struct qla_hw_data *ha = vha->hw; 5236 uint32_t drv_ack; 5237 5238 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 5239 if (rval == QLA_SUCCESS) { 5240 drv_ack &= ~(1 << ha->portnum); 5241 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 5242 } 5243 5244 return rval; 5245 } 5246 5247 static const char * 5248 qla83xx_dev_state_to_string(uint32_t dev_state) 5249 { 5250 switch (dev_state) { 5251 case QLA8XXX_DEV_COLD: 5252 return "COLD/RE-INIT"; 5253 case QLA8XXX_DEV_INITIALIZING: 5254 return "INITIALIZING"; 5255 case QLA8XXX_DEV_READY: 5256 return "READY"; 5257 case QLA8XXX_DEV_NEED_RESET: 5258 return "NEED RESET"; 5259 case QLA8XXX_DEV_NEED_QUIESCENT: 5260 return "NEED QUIESCENT"; 5261 case QLA8XXX_DEV_FAILED: 5262 return "FAILED"; 5263 case QLA8XXX_DEV_QUIESCENT: 5264 return "QUIESCENT"; 5265 default: 5266 return "Unknown"; 5267 } 5268 } 5269 5270 /* Assumes idc-lock always held on entry */ 5271 void 5272 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 5273 { 5274 struct qla_hw_data *ha = vha->hw; 5275 uint32_t idc_audit_reg = 0, duration_secs = 0; 5276 5277 switch (audit_type) { 5278 case IDC_AUDIT_TIMESTAMP: 5279 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 5280 idc_audit_reg = (ha->portnum) | 5281 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 5282 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 5283 break; 5284 5285 case IDC_AUDIT_COMPLETION: 5286 duration_secs = ((jiffies_to_msecs(jiffies) - 5287 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 5288 idc_audit_reg = (ha->portnum) | 5289 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 5290 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 5291 break; 5292 5293 default: 5294 ql_log(ql_log_warn, vha, 0xb078, 5295 "Invalid audit type specified.\n"); 5296 break; 5297 } 5298 } 5299 5300 /* Assumes idc_lock always held on entry */ 5301 static int 5302 qla83xx_initiating_reset(scsi_qla_host_t *vha) 5303 { 5304 struct qla_hw_data *ha = vha->hw; 5305 uint32_t idc_control, dev_state; 5306 5307 __qla83xx_get_idc_control(vha, &idc_control); 5308 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 5309 ql_log(ql_log_info, vha, 0xb080, 5310 "NIC Core reset has been disabled. idc-control=0x%x\n", 5311 idc_control); 5312 return QLA_FUNCTION_FAILED; 5313 } 5314 5315 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 5316 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 5317 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 5318 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 5319 QLA8XXX_DEV_NEED_RESET); 5320 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 5321 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 5322 } else { 5323 const char *state = qla83xx_dev_state_to_string(dev_state); 5324 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 5325 5326 /* SV: XXX: Is timeout required here? */ 5327 /* Wait for IDC state change READY -> NEED_RESET */ 5328 while (dev_state == QLA8XXX_DEV_READY) { 5329 qla83xx_idc_unlock(vha, 0); 5330 msleep(200); 5331 qla83xx_idc_lock(vha, 0); 5332 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 5333 } 5334 } 5335 5336 /* Send IDC ack by writing to drv-ack register */ 5337 __qla83xx_set_drv_ack(vha); 5338 5339 return QLA_SUCCESS; 5340 } 5341 5342 int 5343 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 5344 { 5345 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 5346 } 5347 5348 int 5349 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 5350 { 5351 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 5352 } 5353 5354 static int 5355 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 5356 { 5357 uint32_t drv_presence = 0; 5358 struct qla_hw_data *ha = vha->hw; 5359 5360 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 5361 if (drv_presence & (1 << ha->portnum)) 5362 return QLA_SUCCESS; 5363 else 5364 return QLA_TEST_FAILED; 5365 } 5366 5367 int 5368 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 5369 { 5370 int rval = QLA_SUCCESS; 5371 struct qla_hw_data *ha = vha->hw; 5372 5373 ql_dbg(ql_dbg_p3p, vha, 0xb058, 5374 "Entered %s().\n", __func__); 5375 5376 if (vha->device_flags & DFLG_DEV_FAILED) { 5377 ql_log(ql_log_warn, vha, 0xb059, 5378 "Device in unrecoverable FAILED state.\n"); 5379 return QLA_FUNCTION_FAILED; 5380 } 5381 5382 qla83xx_idc_lock(vha, 0); 5383 5384 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 5385 ql_log(ql_log_warn, vha, 0xb05a, 5386 "Function=0x%x has been removed from IDC participation.\n", 5387 ha->portnum); 5388 rval = QLA_FUNCTION_FAILED; 5389 goto exit; 5390 } 5391 5392 qla83xx_reset_ownership(vha); 5393 5394 rval = qla83xx_initiating_reset(vha); 5395 5396 /* 5397 * Perform reset if we are the reset-owner, 5398 * else wait till IDC state changes to READY/FAILED. 5399 */ 5400 if (rval == QLA_SUCCESS) { 5401 rval = qla83xx_idc_state_handler(vha); 5402 5403 if (rval == QLA_SUCCESS) 5404 ha->flags.nic_core_hung = 0; 5405 __qla83xx_clear_drv_ack(vha); 5406 } 5407 5408 exit: 5409 qla83xx_idc_unlock(vha, 0); 5410 5411 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 5412 5413 return rval; 5414 } 5415 5416 int 5417 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 5418 { 5419 struct qla_hw_data *ha = vha->hw; 5420 int rval = QLA_FUNCTION_FAILED; 5421 5422 if (!IS_MCTP_CAPABLE(ha)) { 5423 /* This message can be removed from the final version */ 5424 ql_log(ql_log_info, vha, 0x506d, 5425 "This board is not MCTP capable\n"); 5426 return rval; 5427 } 5428 5429 if (!ha->mctp_dump) { 5430 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 5431 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 5432 5433 if (!ha->mctp_dump) { 5434 ql_log(ql_log_warn, vha, 0x506e, 5435 "Failed to allocate memory for mctp dump\n"); 5436 return rval; 5437 } 5438 } 5439 5440 #define MCTP_DUMP_STR_ADDR 0x00000000 5441 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 5442 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 5443 if (rval != QLA_SUCCESS) { 5444 ql_log(ql_log_warn, vha, 0x506f, 5445 "Failed to capture mctp dump\n"); 5446 } else { 5447 ql_log(ql_log_info, vha, 0x5070, 5448 "Mctp dump capture for host (%ld/%p).\n", 5449 vha->host_no, ha->mctp_dump); 5450 ha->mctp_dumped = 1; 5451 } 5452 5453 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 5454 ha->flags.nic_core_reset_hdlr_active = 1; 5455 rval = qla83xx_restart_nic_firmware(vha); 5456 if (rval) 5457 /* NIC Core reset failed. */ 5458 ql_log(ql_log_warn, vha, 0x5071, 5459 "Failed to restart nic firmware\n"); 5460 else 5461 ql_dbg(ql_dbg_p3p, vha, 0xb084, 5462 "Restarted NIC firmware successfully.\n"); 5463 ha->flags.nic_core_reset_hdlr_active = 0; 5464 } 5465 5466 return rval; 5467 5468 } 5469 5470 /* 5471 * qla2x00_quiesce_io 5472 * Description: This function will block the new I/Os 5473 * Its not aborting any I/Os as context 5474 * is not destroyed during quiescence 5475 * Arguments: scsi_qla_host_t 5476 * return : void 5477 */ 5478 void 5479 qla2x00_quiesce_io(scsi_qla_host_t *vha) 5480 { 5481 struct qla_hw_data *ha = vha->hw; 5482 struct scsi_qla_host *vp; 5483 5484 ql_dbg(ql_dbg_dpc, vha, 0x401d, 5485 "Quiescing I/O - ha=%p.\n", ha); 5486 5487 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 5488 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 5489 atomic_set(&vha->loop_state, LOOP_DOWN); 5490 qla2x00_mark_all_devices_lost(vha, 0); 5491 list_for_each_entry(vp, &ha->vp_list, list) 5492 qla2x00_mark_all_devices_lost(vp, 0); 5493 } else { 5494 if (!atomic_read(&vha->loop_down_timer)) 5495 atomic_set(&vha->loop_down_timer, 5496 LOOP_DOWN_TIME); 5497 } 5498 /* Wait for pending cmds to complete */ 5499 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 5500 } 5501 5502 void 5503 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 5504 { 5505 struct qla_hw_data *ha = vha->hw; 5506 struct scsi_qla_host *vp; 5507 unsigned long flags; 5508 fc_port_t *fcport; 5509 5510 /* For ISP82XX, driver waits for completion of the commands. 5511 * online flag should be set. 5512 */ 5513 if (!(IS_P3P_TYPE(ha))) 5514 vha->flags.online = 0; 5515 ha->flags.chip_reset_done = 0; 5516 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 5517 vha->qla_stats.total_isp_aborts++; 5518 5519 ql_log(ql_log_info, vha, 0x00af, 5520 "Performing ISP error recovery - ha=%p.\n", ha); 5521 5522 /* For ISP82XX, reset_chip is just disabling interrupts. 5523 * Driver waits for the completion of the commands. 5524 * the interrupts need to be enabled. 5525 */ 5526 if (!(IS_P3P_TYPE(ha))) 5527 ha->isp_ops->reset_chip(vha); 5528 5529 ha->chip_reset++; 5530 5531 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 5532 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 5533 atomic_set(&vha->loop_state, LOOP_DOWN); 5534 qla2x00_mark_all_devices_lost(vha, 0); 5535 5536 spin_lock_irqsave(&ha->vport_slock, flags); 5537 list_for_each_entry(vp, &ha->vp_list, list) { 5538 atomic_inc(&vp->vref_count); 5539 spin_unlock_irqrestore(&ha->vport_slock, flags); 5540 5541 qla2x00_mark_all_devices_lost(vp, 0); 5542 5543 spin_lock_irqsave(&ha->vport_slock, flags); 5544 atomic_dec(&vp->vref_count); 5545 } 5546 spin_unlock_irqrestore(&ha->vport_slock, flags); 5547 } else { 5548 if (!atomic_read(&vha->loop_down_timer)) 5549 atomic_set(&vha->loop_down_timer, 5550 LOOP_DOWN_TIME); 5551 } 5552 5553 /* Clear all async request states across all VPs. */ 5554 list_for_each_entry(fcport, &vha->vp_fcports, list) 5555 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5556 spin_lock_irqsave(&ha->vport_slock, flags); 5557 list_for_each_entry(vp, &ha->vp_list, list) { 5558 atomic_inc(&vp->vref_count); 5559 spin_unlock_irqrestore(&ha->vport_slock, flags); 5560 5561 list_for_each_entry(fcport, &vp->vp_fcports, list) 5562 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5563 5564 spin_lock_irqsave(&ha->vport_slock, flags); 5565 atomic_dec(&vp->vref_count); 5566 } 5567 spin_unlock_irqrestore(&ha->vport_slock, flags); 5568 5569 if (!ha->flags.eeh_busy) { 5570 /* Make sure for ISP 82XX IO DMA is complete */ 5571 if (IS_P3P_TYPE(ha)) { 5572 qla82xx_chip_reset_cleanup(vha); 5573 ql_log(ql_log_info, vha, 0x00b4, 5574 "Done chip reset cleanup.\n"); 5575 5576 /* Done waiting for pending commands. 5577 * Reset the online flag. 5578 */ 5579 vha->flags.online = 0; 5580 } 5581 5582 /* Requeue all commands in outstanding command list. */ 5583 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 5584 } 5585 /* memory barrier */ 5586 wmb(); 5587 } 5588 5589 /* 5590 * qla2x00_abort_isp 5591 * Resets ISP and aborts all outstanding commands. 5592 * 5593 * Input: 5594 * ha = adapter block pointer. 5595 * 5596 * Returns: 5597 * 0 = success 5598 */ 5599 int 5600 qla2x00_abort_isp(scsi_qla_host_t *vha) 5601 { 5602 int rval; 5603 uint8_t status = 0; 5604 struct qla_hw_data *ha = vha->hw; 5605 struct scsi_qla_host *vp; 5606 struct req_que *req = ha->req_q_map[0]; 5607 unsigned long flags; 5608 5609 if (vha->flags.online) { 5610 qla2x00_abort_isp_cleanup(vha); 5611 5612 if (IS_QLA8031(ha)) { 5613 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 5614 "Clearing fcoe driver presence.\n"); 5615 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 5616 ql_dbg(ql_dbg_p3p, vha, 0xb073, 5617 "Error while clearing DRV-Presence.\n"); 5618 } 5619 5620 if (unlikely(pci_channel_offline(ha->pdev) && 5621 ha->flags.pci_channel_io_perm_failure)) { 5622 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5623 status = 0; 5624 return status; 5625 } 5626 5627 ha->isp_ops->get_flash_version(vha, req->ring); 5628 5629 ha->isp_ops->nvram_config(vha); 5630 5631 if (!qla2x00_restart_isp(vha)) { 5632 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5633 5634 if (!atomic_read(&vha->loop_down_timer)) { 5635 /* 5636 * Issue marker command only when we are going 5637 * to start the I/O . 5638 */ 5639 vha->marker_needed = 1; 5640 } 5641 5642 vha->flags.online = 1; 5643 5644 ha->isp_ops->enable_intrs(ha); 5645 5646 ha->isp_abort_cnt = 0; 5647 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5648 5649 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 5650 qla2x00_get_fw_version(vha); 5651 if (ha->fce) { 5652 ha->flags.fce_enabled = 1; 5653 memset(ha->fce, 0, 5654 fce_calc_size(ha->fce_bufs)); 5655 rval = qla2x00_enable_fce_trace(vha, 5656 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 5657 &ha->fce_bufs); 5658 if (rval) { 5659 ql_log(ql_log_warn, vha, 0x8033, 5660 "Unable to reinitialize FCE " 5661 "(%d).\n", rval); 5662 ha->flags.fce_enabled = 0; 5663 } 5664 } 5665 5666 if (ha->eft) { 5667 memset(ha->eft, 0, EFT_SIZE); 5668 rval = qla2x00_enable_eft_trace(vha, 5669 ha->eft_dma, EFT_NUM_BUFFERS); 5670 if (rval) { 5671 ql_log(ql_log_warn, vha, 0x8034, 5672 "Unable to reinitialize EFT " 5673 "(%d).\n", rval); 5674 } 5675 } 5676 } else { /* failed the ISP abort */ 5677 vha->flags.online = 1; 5678 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 5679 if (ha->isp_abort_cnt == 0) { 5680 ql_log(ql_log_fatal, vha, 0x8035, 5681 "ISP error recover failed - " 5682 "board disabled.\n"); 5683 /* 5684 * The next call disables the board 5685 * completely. 5686 */ 5687 ha->isp_ops->reset_adapter(vha); 5688 vha->flags.online = 0; 5689 clear_bit(ISP_ABORT_RETRY, 5690 &vha->dpc_flags); 5691 status = 0; 5692 } else { /* schedule another ISP abort */ 5693 ha->isp_abort_cnt--; 5694 ql_dbg(ql_dbg_taskm, vha, 0x8020, 5695 "ISP abort - retry remaining %d.\n", 5696 ha->isp_abort_cnt); 5697 status = 1; 5698 } 5699 } else { 5700 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 5701 ql_dbg(ql_dbg_taskm, vha, 0x8021, 5702 "ISP error recovery - retrying (%d) " 5703 "more times.\n", ha->isp_abort_cnt); 5704 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5705 status = 1; 5706 } 5707 } 5708 5709 } 5710 5711 if (!status) { 5712 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 5713 5714 spin_lock_irqsave(&ha->vport_slock, flags); 5715 list_for_each_entry(vp, &ha->vp_list, list) { 5716 if (vp->vp_idx) { 5717 atomic_inc(&vp->vref_count); 5718 spin_unlock_irqrestore(&ha->vport_slock, flags); 5719 5720 qla2x00_vp_abort_isp(vp); 5721 5722 spin_lock_irqsave(&ha->vport_slock, flags); 5723 atomic_dec(&vp->vref_count); 5724 } 5725 } 5726 spin_unlock_irqrestore(&ha->vport_slock, flags); 5727 5728 if (IS_QLA8031(ha)) { 5729 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 5730 "Setting back fcoe driver presence.\n"); 5731 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 5732 ql_dbg(ql_dbg_p3p, vha, 0xb074, 5733 "Error while setting DRV-Presence.\n"); 5734 } 5735 } else { 5736 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 5737 __func__); 5738 } 5739 5740 return(status); 5741 } 5742 5743 /* 5744 * qla2x00_restart_isp 5745 * restarts the ISP after a reset 5746 * 5747 * Input: 5748 * ha = adapter block pointer. 5749 * 5750 * Returns: 5751 * 0 = success 5752 */ 5753 static int 5754 qla2x00_restart_isp(scsi_qla_host_t *vha) 5755 { 5756 int status = 0; 5757 struct qla_hw_data *ha = vha->hw; 5758 struct req_que *req = ha->req_q_map[0]; 5759 struct rsp_que *rsp = ha->rsp_q_map[0]; 5760 5761 /* If firmware needs to be loaded */ 5762 if (qla2x00_isp_firmware(vha)) { 5763 vha->flags.online = 0; 5764 status = ha->isp_ops->chip_diag(vha); 5765 if (!status) 5766 status = qla2x00_setup_chip(vha); 5767 } 5768 5769 if (!status && !(status = qla2x00_init_rings(vha))) { 5770 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5771 ha->flags.chip_reset_done = 1; 5772 5773 /* Initialize the queues in use */ 5774 qla25xx_init_queues(ha); 5775 5776 status = qla2x00_fw_ready(vha); 5777 if (!status) { 5778 /* Issue a marker after FW becomes ready. */ 5779 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5780 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5781 } 5782 5783 /* if no cable then assume it's good */ 5784 if ((vha->device_flags & DFLG_NO_CABLE)) 5785 status = 0; 5786 } 5787 return (status); 5788 } 5789 5790 static int 5791 qla25xx_init_queues(struct qla_hw_data *ha) 5792 { 5793 struct rsp_que *rsp = NULL; 5794 struct req_que *req = NULL; 5795 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5796 int ret = -1; 5797 int i; 5798 5799 for (i = 1; i < ha->max_rsp_queues; i++) { 5800 rsp = ha->rsp_q_map[i]; 5801 if (rsp && test_bit(i, ha->rsp_qid_map)) { 5802 rsp->options &= ~BIT_0; 5803 ret = qla25xx_init_rsp_que(base_vha, rsp); 5804 if (ret != QLA_SUCCESS) 5805 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 5806 "%s Rsp que: %d init failed.\n", 5807 __func__, rsp->id); 5808 else 5809 ql_dbg(ql_dbg_init, base_vha, 0x0100, 5810 "%s Rsp que: %d inited.\n", 5811 __func__, rsp->id); 5812 } 5813 } 5814 for (i = 1; i < ha->max_req_queues; i++) { 5815 req = ha->req_q_map[i]; 5816 if (req && test_bit(i, ha->req_qid_map)) { 5817 /* Clear outstanding commands array. */ 5818 req->options &= ~BIT_0; 5819 ret = qla25xx_init_req_que(base_vha, req); 5820 if (ret != QLA_SUCCESS) 5821 ql_dbg(ql_dbg_init, base_vha, 0x0101, 5822 "%s Req que: %d init failed.\n", 5823 __func__, req->id); 5824 else 5825 ql_dbg(ql_dbg_init, base_vha, 0x0102, 5826 "%s Req que: %d inited.\n", 5827 __func__, req->id); 5828 } 5829 } 5830 return ret; 5831 } 5832 5833 /* 5834 * qla2x00_reset_adapter 5835 * Reset adapter. 5836 * 5837 * Input: 5838 * ha = adapter block pointer. 5839 */ 5840 void 5841 qla2x00_reset_adapter(scsi_qla_host_t *vha) 5842 { 5843 unsigned long flags = 0; 5844 struct qla_hw_data *ha = vha->hw; 5845 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 5846 5847 vha->flags.online = 0; 5848 ha->isp_ops->disable_intrs(ha); 5849 5850 spin_lock_irqsave(&ha->hardware_lock, flags); 5851 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 5852 RD_REG_WORD(®->hccr); /* PCI Posting. */ 5853 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 5854 RD_REG_WORD(®->hccr); /* PCI Posting. */ 5855 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5856 } 5857 5858 void 5859 qla24xx_reset_adapter(scsi_qla_host_t *vha) 5860 { 5861 unsigned long flags = 0; 5862 struct qla_hw_data *ha = vha->hw; 5863 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 5864 5865 if (IS_P3P_TYPE(ha)) 5866 return; 5867 5868 vha->flags.online = 0; 5869 ha->isp_ops->disable_intrs(ha); 5870 5871 spin_lock_irqsave(&ha->hardware_lock, flags); 5872 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 5873 RD_REG_DWORD(®->hccr); 5874 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 5875 RD_REG_DWORD(®->hccr); 5876 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5877 5878 if (IS_NOPOLLING_TYPE(ha)) 5879 ha->isp_ops->enable_intrs(ha); 5880 } 5881 5882 /* On sparc systems, obtain port and node WWN from firmware 5883 * properties. 5884 */ 5885 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 5886 struct nvram_24xx *nv) 5887 { 5888 #ifdef CONFIG_SPARC 5889 struct qla_hw_data *ha = vha->hw; 5890 struct pci_dev *pdev = ha->pdev; 5891 struct device_node *dp = pci_device_to_OF_node(pdev); 5892 const u8 *val; 5893 int len; 5894 5895 val = of_get_property(dp, "port-wwn", &len); 5896 if (val && len >= WWN_SIZE) 5897 memcpy(nv->port_name, val, WWN_SIZE); 5898 5899 val = of_get_property(dp, "node-wwn", &len); 5900 if (val && len >= WWN_SIZE) 5901 memcpy(nv->node_name, val, WWN_SIZE); 5902 #endif 5903 } 5904 5905 int 5906 qla24xx_nvram_config(scsi_qla_host_t *vha) 5907 { 5908 int rval; 5909 struct init_cb_24xx *icb; 5910 struct nvram_24xx *nv; 5911 uint32_t *dptr; 5912 uint8_t *dptr1, *dptr2; 5913 uint32_t chksum; 5914 uint16_t cnt; 5915 struct qla_hw_data *ha = vha->hw; 5916 5917 rval = QLA_SUCCESS; 5918 icb = (struct init_cb_24xx *)ha->init_cb; 5919 nv = ha->nvram; 5920 5921 /* Determine NVRAM starting address. */ 5922 if (ha->port_no == 0) { 5923 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 5924 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 5925 } else { 5926 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 5927 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 5928 } 5929 5930 ha->nvram_size = sizeof(struct nvram_24xx); 5931 ha->vpd_size = FA_NVRAM_VPD_SIZE; 5932 5933 /* Get VPD data into cache */ 5934 ha->vpd = ha->nvram + VPD_OFFSET; 5935 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 5936 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 5937 5938 /* Get NVRAM data into cache and calculate checksum. */ 5939 dptr = (uint32_t *)nv; 5940 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 5941 ha->nvram_size); 5942 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 5943 chksum += le32_to_cpu(*dptr); 5944 5945 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 5946 "Contents of NVRAM\n"); 5947 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 5948 (uint8_t *)nv, ha->nvram_size); 5949 5950 /* Bad NVRAM data, set defaults parameters. */ 5951 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 5952 || nv->id[3] != ' ' || 5953 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 5954 /* Reset NVRAM data. */ 5955 ql_log(ql_log_warn, vha, 0x006b, 5956 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 5957 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 5958 ql_log(ql_log_warn, vha, 0x006c, 5959 "Falling back to functioning (yet invalid -- WWPN) " 5960 "defaults.\n"); 5961 5962 /* 5963 * Set default initialization control block. 5964 */ 5965 memset(nv, 0, ha->nvram_size); 5966 nv->nvram_version = cpu_to_le16(ICB_VERSION); 5967 nv->version = cpu_to_le16(ICB_VERSION); 5968 nv->frame_payload_size = 2048; 5969 nv->execution_throttle = cpu_to_le16(0xFFFF); 5970 nv->exchange_count = cpu_to_le16(0); 5971 nv->hard_address = cpu_to_le16(124); 5972 nv->port_name[0] = 0x21; 5973 nv->port_name[1] = 0x00 + ha->port_no + 1; 5974 nv->port_name[2] = 0x00; 5975 nv->port_name[3] = 0xe0; 5976 nv->port_name[4] = 0x8b; 5977 nv->port_name[5] = 0x1c; 5978 nv->port_name[6] = 0x55; 5979 nv->port_name[7] = 0x86; 5980 nv->node_name[0] = 0x20; 5981 nv->node_name[1] = 0x00; 5982 nv->node_name[2] = 0x00; 5983 nv->node_name[3] = 0xe0; 5984 nv->node_name[4] = 0x8b; 5985 nv->node_name[5] = 0x1c; 5986 nv->node_name[6] = 0x55; 5987 nv->node_name[7] = 0x86; 5988 qla24xx_nvram_wwn_from_ofw(vha, nv); 5989 nv->login_retry_count = cpu_to_le16(8); 5990 nv->interrupt_delay_timer = cpu_to_le16(0); 5991 nv->login_timeout = cpu_to_le16(0); 5992 nv->firmware_options_1 = 5993 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 5994 nv->firmware_options_2 = cpu_to_le32(2 << 4); 5995 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 5996 nv->firmware_options_3 = cpu_to_le32(2 << 13); 5997 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 5998 nv->efi_parameters = cpu_to_le32(0); 5999 nv->reset_delay = 5; 6000 nv->max_luns_per_target = cpu_to_le16(128); 6001 nv->port_down_retry_count = cpu_to_le16(30); 6002 nv->link_down_timeout = cpu_to_le16(30); 6003 6004 rval = 1; 6005 } 6006 6007 if (qla_tgt_mode_enabled(vha)) { 6008 /* Don't enable full login after initial LIP */ 6009 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 6010 /* Don't enable LIP full login for initiator */ 6011 nv->host_p &= cpu_to_le32(~BIT_10); 6012 } 6013 6014 qlt_24xx_config_nvram_stage1(vha, nv); 6015 6016 /* Reset Initialization control block */ 6017 memset(icb, 0, ha->init_cb_size); 6018 6019 /* Copy 1st segment. */ 6020 dptr1 = (uint8_t *)icb; 6021 dptr2 = (uint8_t *)&nv->version; 6022 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6023 while (cnt--) 6024 *dptr1++ = *dptr2++; 6025 6026 icb->login_retry_count = nv->login_retry_count; 6027 icb->link_down_on_nos = nv->link_down_on_nos; 6028 6029 /* Copy 2nd segment. */ 6030 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6031 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6032 cnt = (uint8_t *)&icb->reserved_3 - 6033 (uint8_t *)&icb->interrupt_delay_timer; 6034 while (cnt--) 6035 *dptr1++ = *dptr2++; 6036 6037 /* 6038 * Setup driver NVRAM options. 6039 */ 6040 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6041 "QLA2462"); 6042 6043 qlt_24xx_config_nvram_stage2(vha, icb); 6044 6045 if (nv->host_p & cpu_to_le32(BIT_15)) { 6046 /* Use alternate WWN? */ 6047 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6048 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6049 } 6050 6051 /* Prepare nodename */ 6052 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 6053 /* 6054 * Firmware will apply the following mask if the nodename was 6055 * not provided. 6056 */ 6057 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6058 icb->node_name[0] &= 0xF0; 6059 } 6060 6061 /* Set host adapter parameters. */ 6062 ha->flags.disable_risc_code_load = 0; 6063 ha->flags.enable_lip_reset = 0; 6064 ha->flags.enable_lip_full_login = 6065 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6066 ha->flags.enable_target_reset = 6067 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6068 ha->flags.enable_led_scheme = 0; 6069 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6070 6071 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6072 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6073 6074 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 6075 sizeof(ha->fw_seriallink_options24)); 6076 6077 /* save HBA serial number */ 6078 ha->serial0 = icb->port_name[5]; 6079 ha->serial1 = icb->port_name[6]; 6080 ha->serial2 = icb->port_name[7]; 6081 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6082 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6083 6084 icb->execution_throttle = cpu_to_le16(0xFFFF); 6085 6086 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6087 6088 /* Set minimum login_timeout to 4 seconds. */ 6089 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6090 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6091 if (le16_to_cpu(nv->login_timeout) < 4) 6092 nv->login_timeout = cpu_to_le16(4); 6093 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6094 6095 /* Set minimum RATOV to 100 tenths of a second. */ 6096 ha->r_a_tov = 100; 6097 6098 ha->loop_reset_delay = nv->reset_delay; 6099 6100 /* Link Down Timeout = 0: 6101 * 6102 * When Port Down timer expires we will start returning 6103 * I/O's to OS with "DID_NO_CONNECT". 6104 * 6105 * Link Down Timeout != 0: 6106 * 6107 * The driver waits for the link to come up after link down 6108 * before returning I/Os to OS with "DID_NO_CONNECT". 6109 */ 6110 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6111 ha->loop_down_abort_time = 6112 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6113 } else { 6114 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6115 ha->loop_down_abort_time = 6116 (LOOP_DOWN_TIME - ha->link_down_timeout); 6117 } 6118 6119 /* Need enough time to try and get the port back. */ 6120 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6121 if (qlport_down_retry) 6122 ha->port_down_retry_count = qlport_down_retry; 6123 6124 /* Set login_retry_count */ 6125 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6126 if (ha->port_down_retry_count == 6127 le16_to_cpu(nv->port_down_retry_count) && 6128 ha->port_down_retry_count > 3) 6129 ha->login_retry_count = ha->port_down_retry_count; 6130 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6131 ha->login_retry_count = ha->port_down_retry_count; 6132 if (ql2xloginretrycount) 6133 ha->login_retry_count = ql2xloginretrycount; 6134 6135 /* Enable ZIO. */ 6136 if (!vha->flags.init_done) { 6137 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6138 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6139 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6140 le16_to_cpu(icb->interrupt_delay_timer): 2; 6141 } 6142 icb->firmware_options_2 &= cpu_to_le32( 6143 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6144 vha->flags.process_response_queue = 0; 6145 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6146 ha->zio_mode = QLA_ZIO_MODE_6; 6147 6148 ql_log(ql_log_info, vha, 0x006f, 6149 "ZIO mode %d enabled; timer delay (%d us).\n", 6150 ha->zio_mode, ha->zio_timer * 100); 6151 6152 icb->firmware_options_2 |= cpu_to_le32( 6153 (uint32_t)ha->zio_mode); 6154 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6155 vha->flags.process_response_queue = 1; 6156 } 6157 6158 if (rval) { 6159 ql_log(ql_log_warn, vha, 0x0070, 6160 "NVRAM configuration failed.\n"); 6161 } 6162 return (rval); 6163 } 6164 6165 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 6166 { 6167 struct qla27xx_image_status pri_image_status, sec_image_status; 6168 uint8_t valid_pri_image, valid_sec_image; 6169 uint32_t *wptr; 6170 uint32_t cnt, chksum, size; 6171 struct qla_hw_data *ha = vha->hw; 6172 6173 valid_pri_image = valid_sec_image = 1; 6174 ha->active_image = 0; 6175 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 6176 6177 if (!ha->flt_region_img_status_pri) { 6178 valid_pri_image = 0; 6179 goto check_sec_image; 6180 } 6181 6182 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 6183 ha->flt_region_img_status_pri, size); 6184 6185 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 6186 ql_dbg(ql_dbg_init, vha, 0x018b, 6187 "Primary image signature (0x%x) not valid\n", 6188 pri_image_status.signature); 6189 valid_pri_image = 0; 6190 goto check_sec_image; 6191 } 6192 6193 wptr = (uint32_t *)(&pri_image_status); 6194 cnt = size; 6195 6196 for (chksum = 0; cnt--; wptr++) 6197 chksum += le32_to_cpu(*wptr); 6198 6199 if (chksum) { 6200 ql_dbg(ql_dbg_init, vha, 0x018c, 6201 "Checksum validation failed for primary image (0x%x)\n", 6202 chksum); 6203 valid_pri_image = 0; 6204 } 6205 6206 check_sec_image: 6207 if (!ha->flt_region_img_status_sec) { 6208 valid_sec_image = 0; 6209 goto check_valid_image; 6210 } 6211 6212 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 6213 ha->flt_region_img_status_sec, size); 6214 6215 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 6216 ql_dbg(ql_dbg_init, vha, 0x018d, 6217 "Secondary image signature(0x%x) not valid\n", 6218 sec_image_status.signature); 6219 valid_sec_image = 0; 6220 goto check_valid_image; 6221 } 6222 6223 wptr = (uint32_t *)(&sec_image_status); 6224 cnt = size; 6225 for (chksum = 0; cnt--; wptr++) 6226 chksum += le32_to_cpu(*wptr); 6227 if (chksum) { 6228 ql_dbg(ql_dbg_init, vha, 0x018e, 6229 "Checksum validation failed for secondary image (0x%x)\n", 6230 chksum); 6231 valid_sec_image = 0; 6232 } 6233 6234 check_valid_image: 6235 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 6236 ha->active_image = QLA27XX_PRIMARY_IMAGE; 6237 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 6238 if (!ha->active_image || 6239 pri_image_status.generation_number < 6240 sec_image_status.generation_number) 6241 ha->active_image = QLA27XX_SECONDARY_IMAGE; 6242 } 6243 6244 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n", 6245 ha->active_image == 0 ? "default bootld and fw" : 6246 ha->active_image == 1 ? "primary" : 6247 ha->active_image == 2 ? "secondary" : 6248 "Invalid"); 6249 6250 return ha->active_image; 6251 } 6252 6253 static int 6254 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 6255 uint32_t faddr) 6256 { 6257 int rval = QLA_SUCCESS; 6258 int segments, fragment; 6259 uint32_t *dcode, dlen; 6260 uint32_t risc_addr; 6261 uint32_t risc_size; 6262 uint32_t i; 6263 struct qla_hw_data *ha = vha->hw; 6264 struct req_que *req = ha->req_q_map[0]; 6265 6266 ql_dbg(ql_dbg_init, vha, 0x008b, 6267 "FW: Loading firmware from flash (%x).\n", faddr); 6268 6269 rval = QLA_SUCCESS; 6270 6271 segments = FA_RISC_CODE_SEGMENTS; 6272 dcode = (uint32_t *)req->ring; 6273 *srisc_addr = 0; 6274 6275 if (IS_QLA27XX(ha) && 6276 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 6277 faddr = ha->flt_region_fw_sec; 6278 6279 /* Validate firmware image by checking version. */ 6280 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 6281 for (i = 0; i < 4; i++) 6282 dcode[i] = be32_to_cpu(dcode[i]); 6283 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 6284 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 6285 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 6286 dcode[3] == 0)) { 6287 ql_log(ql_log_fatal, vha, 0x008c, 6288 "Unable to verify the integrity of flash firmware " 6289 "image.\n"); 6290 ql_log(ql_log_fatal, vha, 0x008d, 6291 "Firmware data: %08x %08x %08x %08x.\n", 6292 dcode[0], dcode[1], dcode[2], dcode[3]); 6293 6294 return QLA_FUNCTION_FAILED; 6295 } 6296 6297 while (segments && rval == QLA_SUCCESS) { 6298 /* Read segment's load information. */ 6299 qla24xx_read_flash_data(vha, dcode, faddr, 4); 6300 6301 risc_addr = be32_to_cpu(dcode[2]); 6302 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 6303 risc_size = be32_to_cpu(dcode[3]); 6304 6305 fragment = 0; 6306 while (risc_size > 0 && rval == QLA_SUCCESS) { 6307 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 6308 if (dlen > risc_size) 6309 dlen = risc_size; 6310 6311 ql_dbg(ql_dbg_init, vha, 0x008e, 6312 "Loading risc segment@ risc addr %x " 6313 "number of dwords 0x%x offset 0x%x.\n", 6314 risc_addr, dlen, faddr); 6315 6316 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 6317 for (i = 0; i < dlen; i++) 6318 dcode[i] = swab32(dcode[i]); 6319 6320 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 6321 dlen); 6322 if (rval) { 6323 ql_log(ql_log_fatal, vha, 0x008f, 6324 "Failed to load segment %d of firmware.\n", 6325 fragment); 6326 return QLA_FUNCTION_FAILED; 6327 } 6328 6329 faddr += dlen; 6330 risc_addr += dlen; 6331 risc_size -= dlen; 6332 fragment++; 6333 } 6334 6335 /* Next segment. */ 6336 segments--; 6337 } 6338 6339 if (!IS_QLA27XX(ha)) 6340 return rval; 6341 6342 if (ha->fw_dump_template) 6343 vfree(ha->fw_dump_template); 6344 ha->fw_dump_template = NULL; 6345 ha->fw_dump_template_len = 0; 6346 6347 ql_dbg(ql_dbg_init, vha, 0x0161, 6348 "Loading fwdump template from %x\n", faddr); 6349 qla24xx_read_flash_data(vha, dcode, faddr, 7); 6350 risc_size = be32_to_cpu(dcode[2]); 6351 ql_dbg(ql_dbg_init, vha, 0x0162, 6352 "-> array size %x dwords\n", risc_size); 6353 if (risc_size == 0 || risc_size == ~0) 6354 goto default_template; 6355 6356 dlen = (risc_size - 8) * sizeof(*dcode); 6357 ql_dbg(ql_dbg_init, vha, 0x0163, 6358 "-> template allocating %x bytes...\n", dlen); 6359 ha->fw_dump_template = vmalloc(dlen); 6360 if (!ha->fw_dump_template) { 6361 ql_log(ql_log_warn, vha, 0x0164, 6362 "Failed fwdump template allocate %x bytes.\n", risc_size); 6363 goto default_template; 6364 } 6365 6366 faddr += 7; 6367 risc_size -= 8; 6368 dcode = ha->fw_dump_template; 6369 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 6370 for (i = 0; i < risc_size; i++) 6371 dcode[i] = le32_to_cpu(dcode[i]); 6372 6373 if (!qla27xx_fwdt_template_valid(dcode)) { 6374 ql_log(ql_log_warn, vha, 0x0165, 6375 "Failed fwdump template validate\n"); 6376 goto default_template; 6377 } 6378 6379 dlen = qla27xx_fwdt_template_size(dcode); 6380 ql_dbg(ql_dbg_init, vha, 0x0166, 6381 "-> template size %x bytes\n", dlen); 6382 if (dlen > risc_size * sizeof(*dcode)) { 6383 ql_log(ql_log_warn, vha, 0x0167, 6384 "Failed fwdump template exceeds array by %x bytes\n", 6385 (uint32_t)(dlen - risc_size * sizeof(*dcode))); 6386 goto default_template; 6387 } 6388 ha->fw_dump_template_len = dlen; 6389 return rval; 6390 6391 default_template: 6392 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 6393 if (ha->fw_dump_template) 6394 vfree(ha->fw_dump_template); 6395 ha->fw_dump_template = NULL; 6396 ha->fw_dump_template_len = 0; 6397 6398 dlen = qla27xx_fwdt_template_default_size(); 6399 ql_dbg(ql_dbg_init, vha, 0x0169, 6400 "-> template allocating %x bytes...\n", dlen); 6401 ha->fw_dump_template = vmalloc(dlen); 6402 if (!ha->fw_dump_template) { 6403 ql_log(ql_log_warn, vha, 0x016a, 6404 "Failed fwdump template allocate %x bytes.\n", risc_size); 6405 goto failed_template; 6406 } 6407 6408 dcode = ha->fw_dump_template; 6409 risc_size = dlen / sizeof(*dcode); 6410 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 6411 for (i = 0; i < risc_size; i++) 6412 dcode[i] = be32_to_cpu(dcode[i]); 6413 6414 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 6415 ql_log(ql_log_warn, vha, 0x016b, 6416 "Failed fwdump template validate\n"); 6417 goto failed_template; 6418 } 6419 6420 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 6421 ql_dbg(ql_dbg_init, vha, 0x016c, 6422 "-> template size %x bytes\n", dlen); 6423 ha->fw_dump_template_len = dlen; 6424 return rval; 6425 6426 failed_template: 6427 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 6428 if (ha->fw_dump_template) 6429 vfree(ha->fw_dump_template); 6430 ha->fw_dump_template = NULL; 6431 ha->fw_dump_template_len = 0; 6432 return rval; 6433 } 6434 6435 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 6436 6437 int 6438 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 6439 { 6440 int rval; 6441 int i, fragment; 6442 uint16_t *wcode, *fwcode; 6443 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 6444 struct fw_blob *blob; 6445 struct qla_hw_data *ha = vha->hw; 6446 struct req_que *req = ha->req_q_map[0]; 6447 6448 /* Load firmware blob. */ 6449 blob = qla2x00_request_firmware(vha); 6450 if (!blob) { 6451 ql_log(ql_log_info, vha, 0x0083, 6452 "Firmware image unavailable.\n"); 6453 ql_log(ql_log_info, vha, 0x0084, 6454 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 6455 return QLA_FUNCTION_FAILED; 6456 } 6457 6458 rval = QLA_SUCCESS; 6459 6460 wcode = (uint16_t *)req->ring; 6461 *srisc_addr = 0; 6462 fwcode = (uint16_t *)blob->fw->data; 6463 fwclen = 0; 6464 6465 /* Validate firmware image by checking version. */ 6466 if (blob->fw->size < 8 * sizeof(uint16_t)) { 6467 ql_log(ql_log_fatal, vha, 0x0085, 6468 "Unable to verify integrity of firmware image (%zd).\n", 6469 blob->fw->size); 6470 goto fail_fw_integrity; 6471 } 6472 for (i = 0; i < 4; i++) 6473 wcode[i] = be16_to_cpu(fwcode[i + 4]); 6474 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 6475 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 6476 wcode[2] == 0 && wcode[3] == 0)) { 6477 ql_log(ql_log_fatal, vha, 0x0086, 6478 "Unable to verify integrity of firmware image.\n"); 6479 ql_log(ql_log_fatal, vha, 0x0087, 6480 "Firmware data: %04x %04x %04x %04x.\n", 6481 wcode[0], wcode[1], wcode[2], wcode[3]); 6482 goto fail_fw_integrity; 6483 } 6484 6485 seg = blob->segs; 6486 while (*seg && rval == QLA_SUCCESS) { 6487 risc_addr = *seg; 6488 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 6489 risc_size = be16_to_cpu(fwcode[3]); 6490 6491 /* Validate firmware image size. */ 6492 fwclen += risc_size * sizeof(uint16_t); 6493 if (blob->fw->size < fwclen) { 6494 ql_log(ql_log_fatal, vha, 0x0088, 6495 "Unable to verify integrity of firmware image " 6496 "(%zd).\n", blob->fw->size); 6497 goto fail_fw_integrity; 6498 } 6499 6500 fragment = 0; 6501 while (risc_size > 0 && rval == QLA_SUCCESS) { 6502 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 6503 if (wlen > risc_size) 6504 wlen = risc_size; 6505 ql_dbg(ql_dbg_init, vha, 0x0089, 6506 "Loading risc segment@ risc addr %x number of " 6507 "words 0x%x.\n", risc_addr, wlen); 6508 6509 for (i = 0; i < wlen; i++) 6510 wcode[i] = swab16(fwcode[i]); 6511 6512 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 6513 wlen); 6514 if (rval) { 6515 ql_log(ql_log_fatal, vha, 0x008a, 6516 "Failed to load segment %d of firmware.\n", 6517 fragment); 6518 break; 6519 } 6520 6521 fwcode += wlen; 6522 risc_addr += wlen; 6523 risc_size -= wlen; 6524 fragment++; 6525 } 6526 6527 /* Next segment. */ 6528 seg++; 6529 } 6530 return rval; 6531 6532 fail_fw_integrity: 6533 return QLA_FUNCTION_FAILED; 6534 } 6535 6536 static int 6537 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 6538 { 6539 int rval; 6540 int segments, fragment; 6541 uint32_t *dcode, dlen; 6542 uint32_t risc_addr; 6543 uint32_t risc_size; 6544 uint32_t i; 6545 struct fw_blob *blob; 6546 const uint32_t *fwcode; 6547 uint32_t fwclen; 6548 struct qla_hw_data *ha = vha->hw; 6549 struct req_que *req = ha->req_q_map[0]; 6550 6551 /* Load firmware blob. */ 6552 blob = qla2x00_request_firmware(vha); 6553 if (!blob) { 6554 ql_log(ql_log_warn, vha, 0x0090, 6555 "Firmware image unavailable.\n"); 6556 ql_log(ql_log_warn, vha, 0x0091, 6557 "Firmware images can be retrieved from: " 6558 QLA_FW_URL ".\n"); 6559 6560 return QLA_FUNCTION_FAILED; 6561 } 6562 6563 ql_dbg(ql_dbg_init, vha, 0x0092, 6564 "FW: Loading via request-firmware.\n"); 6565 6566 rval = QLA_SUCCESS; 6567 6568 segments = FA_RISC_CODE_SEGMENTS; 6569 dcode = (uint32_t *)req->ring; 6570 *srisc_addr = 0; 6571 fwcode = (uint32_t *)blob->fw->data; 6572 fwclen = 0; 6573 6574 /* Validate firmware image by checking version. */ 6575 if (blob->fw->size < 8 * sizeof(uint32_t)) { 6576 ql_log(ql_log_fatal, vha, 0x0093, 6577 "Unable to verify integrity of firmware image (%zd).\n", 6578 blob->fw->size); 6579 return QLA_FUNCTION_FAILED; 6580 } 6581 for (i = 0; i < 4; i++) 6582 dcode[i] = be32_to_cpu(fwcode[i + 4]); 6583 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 6584 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 6585 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 6586 dcode[3] == 0)) { 6587 ql_log(ql_log_fatal, vha, 0x0094, 6588 "Unable to verify integrity of firmware image (%zd).\n", 6589 blob->fw->size); 6590 ql_log(ql_log_fatal, vha, 0x0095, 6591 "Firmware data: %08x %08x %08x %08x.\n", 6592 dcode[0], dcode[1], dcode[2], dcode[3]); 6593 return QLA_FUNCTION_FAILED; 6594 } 6595 6596 while (segments && rval == QLA_SUCCESS) { 6597 risc_addr = be32_to_cpu(fwcode[2]); 6598 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 6599 risc_size = be32_to_cpu(fwcode[3]); 6600 6601 /* Validate firmware image size. */ 6602 fwclen += risc_size * sizeof(uint32_t); 6603 if (blob->fw->size < fwclen) { 6604 ql_log(ql_log_fatal, vha, 0x0096, 6605 "Unable to verify integrity of firmware image " 6606 "(%zd).\n", blob->fw->size); 6607 return QLA_FUNCTION_FAILED; 6608 } 6609 6610 fragment = 0; 6611 while (risc_size > 0 && rval == QLA_SUCCESS) { 6612 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 6613 if (dlen > risc_size) 6614 dlen = risc_size; 6615 6616 ql_dbg(ql_dbg_init, vha, 0x0097, 6617 "Loading risc segment@ risc addr %x " 6618 "number of dwords 0x%x.\n", risc_addr, dlen); 6619 6620 for (i = 0; i < dlen; i++) 6621 dcode[i] = swab32(fwcode[i]); 6622 6623 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 6624 dlen); 6625 if (rval) { 6626 ql_log(ql_log_fatal, vha, 0x0098, 6627 "Failed to load segment %d of firmware.\n", 6628 fragment); 6629 return QLA_FUNCTION_FAILED; 6630 } 6631 6632 fwcode += dlen; 6633 risc_addr += dlen; 6634 risc_size -= dlen; 6635 fragment++; 6636 } 6637 6638 /* Next segment. */ 6639 segments--; 6640 } 6641 6642 if (!IS_QLA27XX(ha)) 6643 return rval; 6644 6645 if (ha->fw_dump_template) 6646 vfree(ha->fw_dump_template); 6647 ha->fw_dump_template = NULL; 6648 ha->fw_dump_template_len = 0; 6649 6650 ql_dbg(ql_dbg_init, vha, 0x171, 6651 "Loading fwdump template from %x\n", 6652 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 6653 risc_size = be32_to_cpu(fwcode[2]); 6654 ql_dbg(ql_dbg_init, vha, 0x172, 6655 "-> array size %x dwords\n", risc_size); 6656 if (risc_size == 0 || risc_size == ~0) 6657 goto default_template; 6658 6659 dlen = (risc_size - 8) * sizeof(*fwcode); 6660 ql_dbg(ql_dbg_init, vha, 0x0173, 6661 "-> template allocating %x bytes...\n", dlen); 6662 ha->fw_dump_template = vmalloc(dlen); 6663 if (!ha->fw_dump_template) { 6664 ql_log(ql_log_warn, vha, 0x0174, 6665 "Failed fwdump template allocate %x bytes.\n", risc_size); 6666 goto default_template; 6667 } 6668 6669 fwcode += 7; 6670 risc_size -= 8; 6671 dcode = ha->fw_dump_template; 6672 for (i = 0; i < risc_size; i++) 6673 dcode[i] = le32_to_cpu(fwcode[i]); 6674 6675 if (!qla27xx_fwdt_template_valid(dcode)) { 6676 ql_log(ql_log_warn, vha, 0x0175, 6677 "Failed fwdump template validate\n"); 6678 goto default_template; 6679 } 6680 6681 dlen = qla27xx_fwdt_template_size(dcode); 6682 ql_dbg(ql_dbg_init, vha, 0x0176, 6683 "-> template size %x bytes\n", dlen); 6684 if (dlen > risc_size * sizeof(*fwcode)) { 6685 ql_log(ql_log_warn, vha, 0x0177, 6686 "Failed fwdump template exceeds array by %x bytes\n", 6687 (uint32_t)(dlen - risc_size * sizeof(*fwcode))); 6688 goto default_template; 6689 } 6690 ha->fw_dump_template_len = dlen; 6691 return rval; 6692 6693 default_template: 6694 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 6695 if (ha->fw_dump_template) 6696 vfree(ha->fw_dump_template); 6697 ha->fw_dump_template = NULL; 6698 ha->fw_dump_template_len = 0; 6699 6700 dlen = qla27xx_fwdt_template_default_size(); 6701 ql_dbg(ql_dbg_init, vha, 0x0179, 6702 "-> template allocating %x bytes...\n", dlen); 6703 ha->fw_dump_template = vmalloc(dlen); 6704 if (!ha->fw_dump_template) { 6705 ql_log(ql_log_warn, vha, 0x017a, 6706 "Failed fwdump template allocate %x bytes.\n", risc_size); 6707 goto failed_template; 6708 } 6709 6710 dcode = ha->fw_dump_template; 6711 risc_size = dlen / sizeof(*fwcode); 6712 fwcode = qla27xx_fwdt_template_default(); 6713 for (i = 0; i < risc_size; i++) 6714 dcode[i] = be32_to_cpu(fwcode[i]); 6715 6716 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 6717 ql_log(ql_log_warn, vha, 0x017b, 6718 "Failed fwdump template validate\n"); 6719 goto failed_template; 6720 } 6721 6722 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 6723 ql_dbg(ql_dbg_init, vha, 0x017c, 6724 "-> template size %x bytes\n", dlen); 6725 ha->fw_dump_template_len = dlen; 6726 return rval; 6727 6728 failed_template: 6729 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 6730 if (ha->fw_dump_template) 6731 vfree(ha->fw_dump_template); 6732 ha->fw_dump_template = NULL; 6733 ha->fw_dump_template_len = 0; 6734 return rval; 6735 } 6736 6737 int 6738 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 6739 { 6740 int rval; 6741 6742 if (ql2xfwloadbin == 1) 6743 return qla81xx_load_risc(vha, srisc_addr); 6744 6745 /* 6746 * FW Load priority: 6747 * 1) Firmware via request-firmware interface (.bin file). 6748 * 2) Firmware residing in flash. 6749 */ 6750 rval = qla24xx_load_risc_blob(vha, srisc_addr); 6751 if (rval == QLA_SUCCESS) 6752 return rval; 6753 6754 return qla24xx_load_risc_flash(vha, srisc_addr, 6755 vha->hw->flt_region_fw); 6756 } 6757 6758 int 6759 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 6760 { 6761 int rval; 6762 struct qla_hw_data *ha = vha->hw; 6763 6764 if (ql2xfwloadbin == 2) 6765 goto try_blob_fw; 6766 6767 /* 6768 * FW Load priority: 6769 * 1) Firmware residing in flash. 6770 * 2) Firmware via request-firmware interface (.bin file). 6771 * 3) Golden-Firmware residing in flash -- limited operation. 6772 */ 6773 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 6774 if (rval == QLA_SUCCESS) 6775 return rval; 6776 6777 try_blob_fw: 6778 rval = qla24xx_load_risc_blob(vha, srisc_addr); 6779 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 6780 return rval; 6781 6782 ql_log(ql_log_info, vha, 0x0099, 6783 "Attempting to fallback to golden firmware.\n"); 6784 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 6785 if (rval != QLA_SUCCESS) 6786 return rval; 6787 6788 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 6789 ha->flags.running_gold_fw = 1; 6790 return rval; 6791 } 6792 6793 void 6794 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 6795 { 6796 int ret, retries; 6797 struct qla_hw_data *ha = vha->hw; 6798 6799 if (ha->flags.pci_channel_io_perm_failure) 6800 return; 6801 if (!IS_FWI2_CAPABLE(ha)) 6802 return; 6803 if (!ha->fw_major_version) 6804 return; 6805 6806 ret = qla2x00_stop_firmware(vha); 6807 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 6808 ret != QLA_INVALID_COMMAND && retries ; retries--) { 6809 ha->isp_ops->reset_chip(vha); 6810 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 6811 continue; 6812 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 6813 continue; 6814 ql_log(ql_log_info, vha, 0x8015, 6815 "Attempting retry of stop-firmware command.\n"); 6816 ret = qla2x00_stop_firmware(vha); 6817 } 6818 } 6819 6820 int 6821 qla24xx_configure_vhba(scsi_qla_host_t *vha) 6822 { 6823 int rval = QLA_SUCCESS; 6824 int rval2; 6825 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6826 struct qla_hw_data *ha = vha->hw; 6827 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6828 struct req_que *req; 6829 struct rsp_que *rsp; 6830 6831 if (!vha->vp_idx) 6832 return -EINVAL; 6833 6834 rval = qla2x00_fw_ready(base_vha); 6835 if (vha->qpair) 6836 req = vha->qpair->req; 6837 else 6838 req = ha->req_q_map[0]; 6839 rsp = req->rsp; 6840 6841 if (rval == QLA_SUCCESS) { 6842 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6843 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6844 } 6845 6846 vha->flags.management_server_logged_in = 0; 6847 6848 /* Login to SNS first */ 6849 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 6850 BIT_1); 6851 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 6852 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 6853 ql_dbg(ql_dbg_init, vha, 0x0120, 6854 "Failed SNS login: loop_id=%x, rval2=%d\n", 6855 NPH_SNS, rval2); 6856 else 6857 ql_dbg(ql_dbg_init, vha, 0x0103, 6858 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 6859 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 6860 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 6861 return (QLA_FUNCTION_FAILED); 6862 } 6863 6864 atomic_set(&vha->loop_down_timer, 0); 6865 atomic_set(&vha->loop_state, LOOP_UP); 6866 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6867 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 6868 rval = qla2x00_loop_resync(base_vha); 6869 6870 return rval; 6871 } 6872 6873 /* 84XX Support **************************************************************/ 6874 6875 static LIST_HEAD(qla_cs84xx_list); 6876 static DEFINE_MUTEX(qla_cs84xx_mutex); 6877 6878 static struct qla_chip_state_84xx * 6879 qla84xx_get_chip(struct scsi_qla_host *vha) 6880 { 6881 struct qla_chip_state_84xx *cs84xx; 6882 struct qla_hw_data *ha = vha->hw; 6883 6884 mutex_lock(&qla_cs84xx_mutex); 6885 6886 /* Find any shared 84xx chip. */ 6887 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 6888 if (cs84xx->bus == ha->pdev->bus) { 6889 kref_get(&cs84xx->kref); 6890 goto done; 6891 } 6892 } 6893 6894 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 6895 if (!cs84xx) 6896 goto done; 6897 6898 kref_init(&cs84xx->kref); 6899 spin_lock_init(&cs84xx->access_lock); 6900 mutex_init(&cs84xx->fw_update_mutex); 6901 cs84xx->bus = ha->pdev->bus; 6902 6903 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 6904 done: 6905 mutex_unlock(&qla_cs84xx_mutex); 6906 return cs84xx; 6907 } 6908 6909 static void 6910 __qla84xx_chip_release(struct kref *kref) 6911 { 6912 struct qla_chip_state_84xx *cs84xx = 6913 container_of(kref, struct qla_chip_state_84xx, kref); 6914 6915 mutex_lock(&qla_cs84xx_mutex); 6916 list_del(&cs84xx->list); 6917 mutex_unlock(&qla_cs84xx_mutex); 6918 kfree(cs84xx); 6919 } 6920 6921 void 6922 qla84xx_put_chip(struct scsi_qla_host *vha) 6923 { 6924 struct qla_hw_data *ha = vha->hw; 6925 if (ha->cs84xx) 6926 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 6927 } 6928 6929 static int 6930 qla84xx_init_chip(scsi_qla_host_t *vha) 6931 { 6932 int rval; 6933 uint16_t status[2]; 6934 struct qla_hw_data *ha = vha->hw; 6935 6936 mutex_lock(&ha->cs84xx->fw_update_mutex); 6937 6938 rval = qla84xx_verify_chip(vha, status); 6939 6940 mutex_unlock(&ha->cs84xx->fw_update_mutex); 6941 6942 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 6943 QLA_SUCCESS; 6944 } 6945 6946 /* 81XX Support **************************************************************/ 6947 6948 int 6949 qla81xx_nvram_config(scsi_qla_host_t *vha) 6950 { 6951 int rval; 6952 struct init_cb_81xx *icb; 6953 struct nvram_81xx *nv; 6954 uint32_t *dptr; 6955 uint8_t *dptr1, *dptr2; 6956 uint32_t chksum; 6957 uint16_t cnt; 6958 struct qla_hw_data *ha = vha->hw; 6959 6960 rval = QLA_SUCCESS; 6961 icb = (struct init_cb_81xx *)ha->init_cb; 6962 nv = ha->nvram; 6963 6964 /* Determine NVRAM starting address. */ 6965 ha->nvram_size = sizeof(struct nvram_81xx); 6966 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6967 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 6968 ha->vpd_size = FA_VPD_SIZE_82XX; 6969 6970 /* Get VPD data into cache */ 6971 ha->vpd = ha->nvram + VPD_OFFSET; 6972 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 6973 ha->vpd_size); 6974 6975 /* Get NVRAM data into cache and calculate checksum. */ 6976 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 6977 ha->nvram_size); 6978 dptr = (uint32_t *)nv; 6979 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6980 chksum += le32_to_cpu(*dptr); 6981 6982 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 6983 "Contents of NVRAM:\n"); 6984 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 6985 (uint8_t *)nv, ha->nvram_size); 6986 6987 /* Bad NVRAM data, set defaults parameters. */ 6988 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6989 || nv->id[3] != ' ' || 6990 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6991 /* Reset NVRAM data. */ 6992 ql_log(ql_log_info, vha, 0x0073, 6993 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6994 "version=0x%x.\n", chksum, nv->id[0], 6995 le16_to_cpu(nv->nvram_version)); 6996 ql_log(ql_log_info, vha, 0x0074, 6997 "Falling back to functioning (yet invalid -- WWPN) " 6998 "defaults.\n"); 6999 7000 /* 7001 * Set default initialization control block. 7002 */ 7003 memset(nv, 0, ha->nvram_size); 7004 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7005 nv->version = cpu_to_le16(ICB_VERSION); 7006 nv->frame_payload_size = 2048; 7007 nv->execution_throttle = cpu_to_le16(0xFFFF); 7008 nv->exchange_count = cpu_to_le16(0); 7009 nv->port_name[0] = 0x21; 7010 nv->port_name[1] = 0x00 + ha->port_no + 1; 7011 nv->port_name[2] = 0x00; 7012 nv->port_name[3] = 0xe0; 7013 nv->port_name[4] = 0x8b; 7014 nv->port_name[5] = 0x1c; 7015 nv->port_name[6] = 0x55; 7016 nv->port_name[7] = 0x86; 7017 nv->node_name[0] = 0x20; 7018 nv->node_name[1] = 0x00; 7019 nv->node_name[2] = 0x00; 7020 nv->node_name[3] = 0xe0; 7021 nv->node_name[4] = 0x8b; 7022 nv->node_name[5] = 0x1c; 7023 nv->node_name[6] = 0x55; 7024 nv->node_name[7] = 0x86; 7025 nv->login_retry_count = cpu_to_le16(8); 7026 nv->interrupt_delay_timer = cpu_to_le16(0); 7027 nv->login_timeout = cpu_to_le16(0); 7028 nv->firmware_options_1 = 7029 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7030 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7031 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7032 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7033 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7034 nv->efi_parameters = cpu_to_le32(0); 7035 nv->reset_delay = 5; 7036 nv->max_luns_per_target = cpu_to_le16(128); 7037 nv->port_down_retry_count = cpu_to_le16(30); 7038 nv->link_down_timeout = cpu_to_le16(180); 7039 nv->enode_mac[0] = 0x00; 7040 nv->enode_mac[1] = 0xC0; 7041 nv->enode_mac[2] = 0xDD; 7042 nv->enode_mac[3] = 0x04; 7043 nv->enode_mac[4] = 0x05; 7044 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 7045 7046 rval = 1; 7047 } 7048 7049 if (IS_T10_PI_CAPABLE(ha)) 7050 nv->frame_payload_size &= ~7; 7051 7052 qlt_81xx_config_nvram_stage1(vha, nv); 7053 7054 /* Reset Initialization control block */ 7055 memset(icb, 0, ha->init_cb_size); 7056 7057 /* Copy 1st segment. */ 7058 dptr1 = (uint8_t *)icb; 7059 dptr2 = (uint8_t *)&nv->version; 7060 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7061 while (cnt--) 7062 *dptr1++ = *dptr2++; 7063 7064 icb->login_retry_count = nv->login_retry_count; 7065 7066 /* Copy 2nd segment. */ 7067 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7068 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7069 cnt = (uint8_t *)&icb->reserved_5 - 7070 (uint8_t *)&icb->interrupt_delay_timer; 7071 while (cnt--) 7072 *dptr1++ = *dptr2++; 7073 7074 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 7075 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 7076 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 7077 icb->enode_mac[0] = 0x00; 7078 icb->enode_mac[1] = 0xC0; 7079 icb->enode_mac[2] = 0xDD; 7080 icb->enode_mac[3] = 0x04; 7081 icb->enode_mac[4] = 0x05; 7082 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 7083 } 7084 7085 /* Use extended-initialization control block. */ 7086 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 7087 7088 /* 7089 * Setup driver NVRAM options. 7090 */ 7091 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7092 "QLE8XXX"); 7093 7094 qlt_81xx_config_nvram_stage2(vha, icb); 7095 7096 /* Use alternate WWN? */ 7097 if (nv->host_p & cpu_to_le32(BIT_15)) { 7098 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7099 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7100 } 7101 7102 /* Prepare nodename */ 7103 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7104 /* 7105 * Firmware will apply the following mask if the nodename was 7106 * not provided. 7107 */ 7108 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7109 icb->node_name[0] &= 0xF0; 7110 } 7111 7112 /* Set host adapter parameters. */ 7113 ha->flags.disable_risc_code_load = 0; 7114 ha->flags.enable_lip_reset = 0; 7115 ha->flags.enable_lip_full_login = 7116 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7117 ha->flags.enable_target_reset = 7118 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7119 ha->flags.enable_led_scheme = 0; 7120 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7121 7122 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7123 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7124 7125 /* save HBA serial number */ 7126 ha->serial0 = icb->port_name[5]; 7127 ha->serial1 = icb->port_name[6]; 7128 ha->serial2 = icb->port_name[7]; 7129 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7130 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7131 7132 icb->execution_throttle = cpu_to_le16(0xFFFF); 7133 7134 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7135 7136 /* Set minimum login_timeout to 4 seconds. */ 7137 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7138 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7139 if (le16_to_cpu(nv->login_timeout) < 4) 7140 nv->login_timeout = cpu_to_le16(4); 7141 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7142 7143 /* Set minimum RATOV to 100 tenths of a second. */ 7144 ha->r_a_tov = 100; 7145 7146 ha->loop_reset_delay = nv->reset_delay; 7147 7148 /* Link Down Timeout = 0: 7149 * 7150 * When Port Down timer expires we will start returning 7151 * I/O's to OS with "DID_NO_CONNECT". 7152 * 7153 * Link Down Timeout != 0: 7154 * 7155 * The driver waits for the link to come up after link down 7156 * before returning I/Os to OS with "DID_NO_CONNECT". 7157 */ 7158 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7159 ha->loop_down_abort_time = 7160 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7161 } else { 7162 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7163 ha->loop_down_abort_time = 7164 (LOOP_DOWN_TIME - ha->link_down_timeout); 7165 } 7166 7167 /* Need enough time to try and get the port back. */ 7168 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7169 if (qlport_down_retry) 7170 ha->port_down_retry_count = qlport_down_retry; 7171 7172 /* Set login_retry_count */ 7173 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7174 if (ha->port_down_retry_count == 7175 le16_to_cpu(nv->port_down_retry_count) && 7176 ha->port_down_retry_count > 3) 7177 ha->login_retry_count = ha->port_down_retry_count; 7178 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7179 ha->login_retry_count = ha->port_down_retry_count; 7180 if (ql2xloginretrycount) 7181 ha->login_retry_count = ql2xloginretrycount; 7182 7183 /* if not running MSI-X we need handshaking on interrupts */ 7184 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 7185 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 7186 7187 /* Enable ZIO. */ 7188 if (!vha->flags.init_done) { 7189 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7190 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7191 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7192 le16_to_cpu(icb->interrupt_delay_timer): 2; 7193 } 7194 icb->firmware_options_2 &= cpu_to_le32( 7195 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7196 vha->flags.process_response_queue = 0; 7197 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7198 ha->zio_mode = QLA_ZIO_MODE_6; 7199 7200 ql_log(ql_log_info, vha, 0x0075, 7201 "ZIO mode %d enabled; timer delay (%d us).\n", 7202 ha->zio_mode, 7203 ha->zio_timer * 100); 7204 7205 icb->firmware_options_2 |= cpu_to_le32( 7206 (uint32_t)ha->zio_mode); 7207 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7208 vha->flags.process_response_queue = 1; 7209 } 7210 7211 /* enable RIDA Format2 */ 7212 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 7213 icb->firmware_options_3 |= BIT_0; 7214 7215 if (rval) { 7216 ql_log(ql_log_warn, vha, 0x0076, 7217 "NVRAM configuration failed.\n"); 7218 } 7219 return (rval); 7220 } 7221 7222 int 7223 qla82xx_restart_isp(scsi_qla_host_t *vha) 7224 { 7225 int status, rval; 7226 struct qla_hw_data *ha = vha->hw; 7227 struct req_que *req = ha->req_q_map[0]; 7228 struct rsp_que *rsp = ha->rsp_q_map[0]; 7229 struct scsi_qla_host *vp; 7230 unsigned long flags; 7231 7232 status = qla2x00_init_rings(vha); 7233 if (!status) { 7234 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7235 ha->flags.chip_reset_done = 1; 7236 7237 status = qla2x00_fw_ready(vha); 7238 if (!status) { 7239 /* Issue a marker after FW becomes ready. */ 7240 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7241 vha->flags.online = 1; 7242 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7243 } 7244 7245 /* if no cable then assume it's good */ 7246 if ((vha->device_flags & DFLG_NO_CABLE)) 7247 status = 0; 7248 } 7249 7250 if (!status) { 7251 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7252 7253 if (!atomic_read(&vha->loop_down_timer)) { 7254 /* 7255 * Issue marker command only when we are going 7256 * to start the I/O . 7257 */ 7258 vha->marker_needed = 1; 7259 } 7260 7261 ha->isp_ops->enable_intrs(ha); 7262 7263 ha->isp_abort_cnt = 0; 7264 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7265 7266 /* Update the firmware version */ 7267 status = qla82xx_check_md_needed(vha); 7268 7269 if (ha->fce) { 7270 ha->flags.fce_enabled = 1; 7271 memset(ha->fce, 0, 7272 fce_calc_size(ha->fce_bufs)); 7273 rval = qla2x00_enable_fce_trace(vha, 7274 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 7275 &ha->fce_bufs); 7276 if (rval) { 7277 ql_log(ql_log_warn, vha, 0x8001, 7278 "Unable to reinitialize FCE (%d).\n", 7279 rval); 7280 ha->flags.fce_enabled = 0; 7281 } 7282 } 7283 7284 if (ha->eft) { 7285 memset(ha->eft, 0, EFT_SIZE); 7286 rval = qla2x00_enable_eft_trace(vha, 7287 ha->eft_dma, EFT_NUM_BUFFERS); 7288 if (rval) { 7289 ql_log(ql_log_warn, vha, 0x8010, 7290 "Unable to reinitialize EFT (%d).\n", 7291 rval); 7292 } 7293 } 7294 } 7295 7296 if (!status) { 7297 ql_dbg(ql_dbg_taskm, vha, 0x8011, 7298 "qla82xx_restart_isp succeeded.\n"); 7299 7300 spin_lock_irqsave(&ha->vport_slock, flags); 7301 list_for_each_entry(vp, &ha->vp_list, list) { 7302 if (vp->vp_idx) { 7303 atomic_inc(&vp->vref_count); 7304 spin_unlock_irqrestore(&ha->vport_slock, flags); 7305 7306 qla2x00_vp_abort_isp(vp); 7307 7308 spin_lock_irqsave(&ha->vport_slock, flags); 7309 atomic_dec(&vp->vref_count); 7310 } 7311 } 7312 spin_unlock_irqrestore(&ha->vport_slock, flags); 7313 7314 } else { 7315 ql_log(ql_log_warn, vha, 0x8016, 7316 "qla82xx_restart_isp **** FAILED ****.\n"); 7317 } 7318 7319 return status; 7320 } 7321 7322 void 7323 qla81xx_update_fw_options(scsi_qla_host_t *vha) 7324 { 7325 struct qla_hw_data *ha = vha->hw; 7326 7327 /* Hold status IOCBs until ABTS response received. */ 7328 if (ql2xfwholdabts) 7329 ha->fw_options[3] |= BIT_12; 7330 7331 /* Set Retry FLOGI in case of P2P connection */ 7332 if (ha->operating_mode == P2P) { 7333 ha->fw_options[2] |= BIT_3; 7334 ql_dbg(ql_dbg_disc, vha, 0x2103, 7335 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 7336 __func__, ha->fw_options[2]); 7337 } 7338 7339 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 7340 if (ql2xmvasynctoatio) { 7341 if (qla_tgt_mode_enabled(vha) || 7342 qla_dual_mode_enabled(vha)) 7343 ha->fw_options[2] |= BIT_11; 7344 else 7345 ha->fw_options[2] &= ~BIT_11; 7346 } 7347 7348 if (ql2xetsenable) { 7349 /* Enable ETS Burst. */ 7350 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 7351 ha->fw_options[2] |= BIT_9; 7352 } 7353 7354 ql_dbg(ql_dbg_init, vha, 0xffff, 7355 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 7356 __func__, ha->fw_options[1], ha->fw_options[2], 7357 ha->fw_options[3], vha->host->active_mode); 7358 7359 qla2x00_set_fw_options(vha, ha->fw_options); 7360 } 7361 7362 /* 7363 * qla24xx_get_fcp_prio 7364 * Gets the fcp cmd priority value for the logged in port. 7365 * Looks for a match of the port descriptors within 7366 * each of the fcp prio config entries. If a match is found, 7367 * the tag (priority) value is returned. 7368 * 7369 * Input: 7370 * vha = scsi host structure pointer. 7371 * fcport = port structure pointer. 7372 * 7373 * Return: 7374 * non-zero (if found) 7375 * -1 (if not found) 7376 * 7377 * Context: 7378 * Kernel context 7379 */ 7380 static int 7381 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 7382 { 7383 int i, entries; 7384 uint8_t pid_match, wwn_match; 7385 int priority; 7386 uint32_t pid1, pid2; 7387 uint64_t wwn1, wwn2; 7388 struct qla_fcp_prio_entry *pri_entry; 7389 struct qla_hw_data *ha = vha->hw; 7390 7391 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 7392 return -1; 7393 7394 priority = -1; 7395 entries = ha->fcp_prio_cfg->num_entries; 7396 pri_entry = &ha->fcp_prio_cfg->entry[0]; 7397 7398 for (i = 0; i < entries; i++) { 7399 pid_match = wwn_match = 0; 7400 7401 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 7402 pri_entry++; 7403 continue; 7404 } 7405 7406 /* check source pid for a match */ 7407 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 7408 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 7409 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 7410 if (pid1 == INVALID_PORT_ID) 7411 pid_match++; 7412 else if (pid1 == pid2) 7413 pid_match++; 7414 } 7415 7416 /* check destination pid for a match */ 7417 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 7418 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 7419 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 7420 if (pid1 == INVALID_PORT_ID) 7421 pid_match++; 7422 else if (pid1 == pid2) 7423 pid_match++; 7424 } 7425 7426 /* check source WWN for a match */ 7427 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 7428 wwn1 = wwn_to_u64(vha->port_name); 7429 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 7430 if (wwn2 == (uint64_t)-1) 7431 wwn_match++; 7432 else if (wwn1 == wwn2) 7433 wwn_match++; 7434 } 7435 7436 /* check destination WWN for a match */ 7437 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 7438 wwn1 = wwn_to_u64(fcport->port_name); 7439 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 7440 if (wwn2 == (uint64_t)-1) 7441 wwn_match++; 7442 else if (wwn1 == wwn2) 7443 wwn_match++; 7444 } 7445 7446 if (pid_match == 2 || wwn_match == 2) { 7447 /* Found a matching entry */ 7448 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 7449 priority = pri_entry->tag; 7450 break; 7451 } 7452 7453 pri_entry++; 7454 } 7455 7456 return priority; 7457 } 7458 7459 /* 7460 * qla24xx_update_fcport_fcp_prio 7461 * Activates fcp priority for the logged in fc port 7462 * 7463 * Input: 7464 * vha = scsi host structure pointer. 7465 * fcp = port structure pointer. 7466 * 7467 * Return: 7468 * QLA_SUCCESS or QLA_FUNCTION_FAILED 7469 * 7470 * Context: 7471 * Kernel context. 7472 */ 7473 int 7474 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 7475 { 7476 int ret; 7477 int priority; 7478 uint16_t mb[5]; 7479 7480 if (fcport->port_type != FCT_TARGET || 7481 fcport->loop_id == FC_NO_LOOP_ID) 7482 return QLA_FUNCTION_FAILED; 7483 7484 priority = qla24xx_get_fcp_prio(vha, fcport); 7485 if (priority < 0) 7486 return QLA_FUNCTION_FAILED; 7487 7488 if (IS_P3P_TYPE(vha->hw)) { 7489 fcport->fcp_prio = priority & 0xf; 7490 return QLA_SUCCESS; 7491 } 7492 7493 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 7494 if (ret == QLA_SUCCESS) { 7495 if (fcport->fcp_prio != priority) 7496 ql_dbg(ql_dbg_user, vha, 0x709e, 7497 "Updated FCP_CMND priority - value=%d loop_id=%d " 7498 "port_id=%02x%02x%02x.\n", priority, 7499 fcport->loop_id, fcport->d_id.b.domain, 7500 fcport->d_id.b.area, fcport->d_id.b.al_pa); 7501 fcport->fcp_prio = priority & 0xf; 7502 } else 7503 ql_dbg(ql_dbg_user, vha, 0x704f, 7504 "Unable to update FCP_CMND priority - ret=0x%x for " 7505 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 7506 fcport->d_id.b.domain, fcport->d_id.b.area, 7507 fcport->d_id.b.al_pa); 7508 return ret; 7509 } 7510 7511 /* 7512 * qla24xx_update_all_fcp_prio 7513 * Activates fcp priority for all the logged in ports 7514 * 7515 * Input: 7516 * ha = adapter block pointer. 7517 * 7518 * Return: 7519 * QLA_SUCCESS or QLA_FUNCTION_FAILED 7520 * 7521 * Context: 7522 * Kernel context. 7523 */ 7524 int 7525 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 7526 { 7527 int ret; 7528 fc_port_t *fcport; 7529 7530 ret = QLA_FUNCTION_FAILED; 7531 /* We need to set priority for all logged in ports */ 7532 list_for_each_entry(fcport, &vha->vp_fcports, list) 7533 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 7534 7535 return ret; 7536 } 7537 7538 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, int vp_idx) 7539 { 7540 int rsp_id = 0; 7541 int req_id = 0; 7542 int i; 7543 struct qla_hw_data *ha = vha->hw; 7544 uint16_t qpair_id = 0; 7545 struct qla_qpair *qpair = NULL; 7546 struct qla_msix_entry *msix; 7547 7548 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 7549 ql_log(ql_log_warn, vha, 0x00181, 7550 "FW/Driver is not multi-queue capable.\n"); 7551 return NULL; 7552 } 7553 7554 if (ql2xmqsupport) { 7555 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 7556 if (qpair == NULL) { 7557 ql_log(ql_log_warn, vha, 0x0182, 7558 "Failed to allocate memory for queue pair.\n"); 7559 return NULL; 7560 } 7561 memset(qpair, 0, sizeof(struct qla_qpair)); 7562 7563 qpair->hw = vha->hw; 7564 qpair->vha = vha; 7565 7566 /* Assign available que pair id */ 7567 mutex_lock(&ha->mq_lock); 7568 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 7569 if (qpair_id >= ha->max_qpairs) { 7570 mutex_unlock(&ha->mq_lock); 7571 ql_log(ql_log_warn, vha, 0x0183, 7572 "No resources to create additional q pair.\n"); 7573 goto fail_qid_map; 7574 } 7575 set_bit(qpair_id, ha->qpair_qid_map); 7576 ha->queue_pair_map[qpair_id] = qpair; 7577 qpair->id = qpair_id; 7578 qpair->vp_idx = vp_idx; 7579 7580 for (i = 0; i < ha->msix_count; i++) { 7581 msix = &ha->msix_entries[i]; 7582 if (msix->in_use) 7583 continue; 7584 qpair->msix = msix; 7585 ql_log(ql_dbg_multiq, vha, 0xc00f, 7586 "Vector %x selected for qpair\n", msix->vector); 7587 break; 7588 } 7589 if (!qpair->msix) { 7590 ql_log(ql_log_warn, vha, 0x0184, 7591 "Out of MSI-X vectors!.\n"); 7592 goto fail_msix; 7593 } 7594 7595 qpair->msix->in_use = 1; 7596 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 7597 7598 mutex_unlock(&ha->mq_lock); 7599 7600 /* Create response queue first */ 7601 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair); 7602 if (!rsp_id) { 7603 ql_log(ql_log_warn, vha, 0x0185, 7604 "Failed to create response queue.\n"); 7605 goto fail_rsp; 7606 } 7607 7608 qpair->rsp = ha->rsp_q_map[rsp_id]; 7609 7610 /* Create request queue */ 7611 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos); 7612 if (!req_id) { 7613 ql_log(ql_log_warn, vha, 0x0186, 7614 "Failed to create request queue.\n"); 7615 goto fail_req; 7616 } 7617 7618 qpair->req = ha->req_q_map[req_id]; 7619 qpair->rsp->req = qpair->req; 7620 7621 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 7622 if (ha->fw_attributes & BIT_4) 7623 qpair->difdix_supported = 1; 7624 } 7625 7626 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 7627 if (!qpair->srb_mempool) { 7628 ql_log(ql_log_warn, vha, 0x0191, 7629 "Failed to create srb mempool for qpair %d\n", 7630 qpair->id); 7631 goto fail_mempool; 7632 } 7633 7634 /* Mark as online */ 7635 qpair->online = 1; 7636 7637 if (!vha->flags.qpairs_available) 7638 vha->flags.qpairs_available = 1; 7639 7640 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 7641 "Request/Response queue pair created, id %d\n", 7642 qpair->id); 7643 ql_dbg(ql_dbg_init, vha, 0x0187, 7644 "Request/Response queue pair created, id %d\n", 7645 qpair->id); 7646 } 7647 return qpair; 7648 7649 fail_mempool: 7650 fail_req: 7651 qla25xx_delete_rsp_que(vha, qpair->rsp); 7652 fail_rsp: 7653 mutex_lock(&ha->mq_lock); 7654 qpair->msix->in_use = 0; 7655 list_del(&qpair->qp_list_elem); 7656 if (list_empty(&vha->qp_list)) 7657 vha->flags.qpairs_available = 0; 7658 fail_msix: 7659 ha->queue_pair_map[qpair_id] = NULL; 7660 clear_bit(qpair_id, ha->qpair_qid_map); 7661 mutex_unlock(&ha->mq_lock); 7662 fail_qid_map: 7663 kfree(qpair); 7664 return NULL; 7665 } 7666 7667 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 7668 { 7669 int ret; 7670 struct qla_hw_data *ha = qpair->hw; 7671 7672 qpair->delete_in_progress = 1; 7673 while (atomic_read(&qpair->ref_count)) 7674 msleep(500); 7675 7676 ret = qla25xx_delete_req_que(vha, qpair->req); 7677 if (ret != QLA_SUCCESS) 7678 goto fail; 7679 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 7680 if (ret != QLA_SUCCESS) 7681 goto fail; 7682 7683 mutex_lock(&ha->mq_lock); 7684 ha->queue_pair_map[qpair->id] = NULL; 7685 clear_bit(qpair->id, ha->qpair_qid_map); 7686 list_del(&qpair->qp_list_elem); 7687 if (list_empty(&vha->qp_list)) 7688 vha->flags.qpairs_available = 0; 7689 mempool_destroy(qpair->srb_mempool); 7690 kfree(qpair); 7691 mutex_unlock(&ha->mq_lock); 7692 7693 return QLA_SUCCESS; 7694 fail: 7695 return ret; 7696 } 7697