1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #include "qla_def.h" 7 #include "qla_gbl.h" 8 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/vmalloc.h> 12 13 #include "qla_devtbl.h" 14 15 #ifdef CONFIG_SPARC 16 #include <asm/prom.h> 17 #endif 18 19 #include "qla_target.h" 20 21 /* 22 * QLogic ISP2x00 Hardware Support Function Prototypes. 23 */ 24 static int qla2x00_isp_firmware(scsi_qla_host_t *); 25 static int qla2x00_setup_chip(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 32 static int qla2x00_restart_isp(scsi_qla_host_t *); 33 34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 35 static int qla84xx_init_chip(scsi_qla_host_t *); 36 static int qla25xx_init_queues(struct qla_hw_data *); 37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 38 struct event_arg *ea); 39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 40 struct event_arg *); 41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(struct timer_list *t) 47 { 48 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 49 struct srb_iocb *iocb; 50 51 WARN_ON(irqs_disabled()); 52 iocb = &sp->u.iocb_cmd; 53 iocb->timeout(sp); 54 } 55 56 void qla2x00_sp_free(srb_t *sp) 57 { 58 struct srb_iocb *iocb = &sp->u.iocb_cmd; 59 60 del_timer(&iocb->timer); 61 qla2x00_rel_sp(sp); 62 } 63 64 void qla2xxx_rel_done_warning(srb_t *sp, int res) 65 { 66 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp); 67 } 68 69 void qla2xxx_rel_free_warning(srb_t *sp) 70 { 71 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp); 72 } 73 74 /* Asynchronous Login/Logout Routines -------------------------------------- */ 75 76 unsigned long 77 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 78 { 79 unsigned long tmo; 80 struct qla_hw_data *ha = vha->hw; 81 82 /* Firmware should use switch negotiated r_a_tov for timeout. */ 83 tmo = ha->r_a_tov / 10 * 2; 84 if (IS_QLAFX00(ha)) { 85 tmo = FX00_DEF_RATOV * 2; 86 } else if (!IS_FWI2_CAPABLE(ha)) { 87 /* 88 * Except for earlier ISPs where the timeout is seeded from the 89 * initialization control block. 90 */ 91 tmo = ha->login_timeout; 92 } 93 return tmo; 94 } 95 96 static void qla24xx_abort_iocb_timeout(void *data) 97 { 98 srb_t *sp = data; 99 struct srb_iocb *abt = &sp->u.iocb_cmd; 100 struct qla_qpair *qpair = sp->qpair; 101 u32 handle; 102 unsigned long flags; 103 104 if (sp->cmd_sp) 105 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 106 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 107 sp->cmd_sp->handle, sp->cmd_sp->type, 108 sp->handle, sp->type); 109 else 110 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 111 "Abort timeout 2 - hdl=%x, type=%x\n", 112 sp->handle, sp->type); 113 114 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 115 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 116 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 117 sp->cmd_sp)) 118 qpair->req->outstanding_cmds[handle] = NULL; 119 120 /* removing the abort */ 121 if (qpair->req->outstanding_cmds[handle] == sp) { 122 qpair->req->outstanding_cmds[handle] = NULL; 123 break; 124 } 125 } 126 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 127 128 if (sp->cmd_sp) 129 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 130 131 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT); 132 sp->done(sp, QLA_OS_TIMER_EXPIRED); 133 } 134 135 static void qla24xx_abort_sp_done(srb_t *sp, int res) 136 { 137 struct srb_iocb *abt = &sp->u.iocb_cmd; 138 srb_t *orig_sp = sp->cmd_sp; 139 140 if (orig_sp) 141 qla_wait_nvme_release_cmd_kref(orig_sp); 142 143 del_timer(&sp->u.iocb_cmd.timer); 144 if (sp->flags & SRB_WAKEUP_ON_COMP) 145 complete(&abt->u.abt.comp); 146 else 147 sp->free(sp); 148 } 149 150 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 151 { 152 scsi_qla_host_t *vha = cmd_sp->vha; 153 struct srb_iocb *abt_iocb; 154 srb_t *sp; 155 int rval = QLA_FUNCTION_FAILED; 156 157 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 158 GFP_ATOMIC); 159 if (!sp) 160 return QLA_MEMORY_ALLOC_FAILED; 161 162 abt_iocb = &sp->u.iocb_cmd; 163 sp->type = SRB_ABT_CMD; 164 sp->name = "abort"; 165 sp->qpair = cmd_sp->qpair; 166 sp->cmd_sp = cmd_sp; 167 if (wait) 168 sp->flags = SRB_WAKEUP_ON_COMP; 169 170 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 171 init_completion(&abt_iocb->u.abt.comp); 172 /* FW can send 2 x ABTS's timeout/20s */ 173 qla2x00_init_timer(sp, 42); 174 175 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 176 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 177 178 sp->done = qla24xx_abort_sp_done; 179 180 ql_dbg(ql_dbg_async, vha, 0x507c, 181 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 182 cmd_sp->type); 183 184 rval = qla2x00_start_sp(sp); 185 if (rval != QLA_SUCCESS) { 186 sp->free(sp); 187 return rval; 188 } 189 190 if (wait) { 191 wait_for_completion(&abt_iocb->u.abt.comp); 192 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 193 QLA_SUCCESS : QLA_ERR_FROM_FW; 194 sp->free(sp); 195 } 196 197 return rval; 198 } 199 200 void 201 qla2x00_async_iocb_timeout(void *data) 202 { 203 srb_t *sp = data; 204 fc_port_t *fcport = sp->fcport; 205 struct srb_iocb *lio = &sp->u.iocb_cmd; 206 int rc, h; 207 unsigned long flags; 208 209 if (fcport) { 210 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 211 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 212 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 213 214 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 215 } else { 216 pr_info("Async-%s timeout - hdl=%x.\n", 217 sp->name, sp->handle); 218 } 219 220 switch (sp->type) { 221 case SRB_LOGIN_CMD: 222 rc = qla24xx_async_abort_cmd(sp, false); 223 if (rc) { 224 /* Retry as needed. */ 225 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 226 lio->u.logio.data[1] = 227 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 228 QLA_LOGIO_LOGIN_RETRIED : 0; 229 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 230 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 231 h++) { 232 if (sp->qpair->req->outstanding_cmds[h] == 233 sp) { 234 sp->qpair->req->outstanding_cmds[h] = 235 NULL; 236 break; 237 } 238 } 239 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 240 sp->done(sp, QLA_FUNCTION_TIMEOUT); 241 } 242 break; 243 case SRB_LOGOUT_CMD: 244 case SRB_CT_PTHRU_CMD: 245 case SRB_MB_IOCB: 246 case SRB_NACK_PLOGI: 247 case SRB_NACK_PRLI: 248 case SRB_NACK_LOGO: 249 case SRB_CTRL_VP: 250 default: 251 rc = qla24xx_async_abort_cmd(sp, false); 252 if (rc) { 253 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 254 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 255 h++) { 256 if (sp->qpair->req->outstanding_cmds[h] == 257 sp) { 258 sp->qpair->req->outstanding_cmds[h] = 259 NULL; 260 break; 261 } 262 } 263 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 264 sp->done(sp, QLA_FUNCTION_TIMEOUT); 265 } 266 break; 267 } 268 } 269 270 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 271 { 272 struct scsi_qla_host *vha = sp->vha; 273 struct srb_iocb *lio = &sp->u.iocb_cmd; 274 struct event_arg ea; 275 276 ql_dbg(ql_dbg_disc, vha, 0x20dd, 277 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 278 279 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 280 281 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 282 memset(&ea, 0, sizeof(ea)); 283 ea.fcport = sp->fcport; 284 ea.data[0] = lio->u.logio.data[0]; 285 ea.data[1] = lio->u.logio.data[1]; 286 ea.iop[0] = lio->u.logio.iop[0]; 287 ea.iop[1] = lio->u.logio.iop[1]; 288 ea.sp = sp; 289 qla24xx_handle_plogi_done_event(vha, &ea); 290 } 291 292 sp->free(sp); 293 } 294 295 int 296 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 297 uint16_t *data) 298 { 299 srb_t *sp; 300 struct srb_iocb *lio; 301 int rval = QLA_FUNCTION_FAILED; 302 303 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 304 fcport->loop_id == FC_NO_LOOP_ID) { 305 ql_log(ql_log_warn, vha, 0xffff, 306 "%s: %8phC - not sending command.\n", 307 __func__, fcport->port_name); 308 return rval; 309 } 310 311 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 312 if (!sp) 313 goto done; 314 315 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 316 fcport->flags |= FCF_ASYNC_SENT; 317 fcport->logout_completed = 0; 318 319 sp->type = SRB_LOGIN_CMD; 320 sp->name = "login"; 321 sp->gen1 = fcport->rscn_gen; 322 sp->gen2 = fcport->login_gen; 323 324 lio = &sp->u.iocb_cmd; 325 lio->timeout = qla2x00_async_iocb_timeout; 326 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 327 328 sp->done = qla2x00_async_login_sp_done; 329 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) { 330 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 331 } else { 332 if (vha->hw->flags.edif_enabled && 333 DBELL_ACTIVE(vha)) { 334 lio->u.logio.flags |= 335 (SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI); 336 } else { 337 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 338 } 339 } 340 341 if (NVME_TARGET(vha->hw, fcport)) 342 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 343 344 rval = qla2x00_start_sp(sp); 345 346 ql_dbg(ql_dbg_disc, vha, 0x2072, 347 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 348 fcport->port_name, sp->handle, fcport->loop_id, 349 fcport->d_id.b24, fcport->login_retry, 350 lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : ""); 351 352 if (rval != QLA_SUCCESS) { 353 fcport->flags |= FCF_LOGIN_NEEDED; 354 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 355 goto done_free_sp; 356 } 357 358 return rval; 359 360 done_free_sp: 361 sp->free(sp); 362 fcport->flags &= ~FCF_ASYNC_SENT; 363 done: 364 fcport->flags &= ~FCF_ASYNC_ACTIVE; 365 return rval; 366 } 367 368 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 369 { 370 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 371 sp->fcport->login_gen++; 372 qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]); 373 sp->free(sp); 374 } 375 376 int 377 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 378 { 379 srb_t *sp; 380 struct srb_iocb *lio; 381 int rval = QLA_FUNCTION_FAILED; 382 383 fcport->flags |= FCF_ASYNC_SENT; 384 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 385 if (!sp) 386 goto done; 387 388 sp->type = SRB_LOGOUT_CMD; 389 sp->name = "logout"; 390 391 lio = &sp->u.iocb_cmd; 392 lio->timeout = qla2x00_async_iocb_timeout; 393 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 394 395 sp->done = qla2x00_async_logout_sp_done; 396 397 ql_dbg(ql_dbg_disc, vha, 0x2070, 398 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n", 399 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 400 fcport->d_id.b.area, fcport->d_id.b.al_pa, 401 fcport->port_name, fcport->explicit_logout); 402 403 rval = qla2x00_start_sp(sp); 404 if (rval != QLA_SUCCESS) 405 goto done_free_sp; 406 return rval; 407 408 done_free_sp: 409 sp->free(sp); 410 done: 411 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 412 return rval; 413 } 414 415 void 416 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 417 uint16_t *data) 418 { 419 fcport->flags &= ~FCF_ASYNC_ACTIVE; 420 /* Don't re-login in target mode */ 421 if (!fcport->tgt_session) 422 qla2x00_mark_device_lost(vha, fcport, 1); 423 qlt_logo_completion_handler(fcport, data[0]); 424 } 425 426 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 427 { 428 struct srb_iocb *lio = &sp->u.iocb_cmd; 429 struct scsi_qla_host *vha = sp->vha; 430 431 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 432 if (!test_bit(UNLOADING, &vha->dpc_flags)) 433 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 434 lio->u.logio.data); 435 sp->free(sp); 436 } 437 438 int 439 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 440 { 441 srb_t *sp; 442 struct srb_iocb *lio; 443 int rval; 444 445 rval = QLA_FUNCTION_FAILED; 446 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 447 if (!sp) 448 goto done; 449 450 sp->type = SRB_PRLO_CMD; 451 sp->name = "prlo"; 452 453 lio = &sp->u.iocb_cmd; 454 lio->timeout = qla2x00_async_iocb_timeout; 455 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 456 457 sp->done = qla2x00_async_prlo_sp_done; 458 459 ql_dbg(ql_dbg_disc, vha, 0x2070, 460 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 461 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 462 fcport->d_id.b.area, fcport->d_id.b.al_pa); 463 464 rval = qla2x00_start_sp(sp); 465 if (rval != QLA_SUCCESS) 466 goto done_free_sp; 467 468 return rval; 469 470 done_free_sp: 471 sp->free(sp); 472 done: 473 fcport->flags &= ~FCF_ASYNC_ACTIVE; 474 return rval; 475 } 476 477 static 478 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 479 { 480 struct fc_port *fcport = ea->fcport; 481 482 ql_dbg(ql_dbg_disc, vha, 0x20d2, 483 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 484 __func__, fcport->port_name, fcport->disc_state, 485 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 486 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 487 488 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 489 ea->data[0]); 490 491 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 492 ql_dbg(ql_dbg_disc, vha, 0x2066, 493 "%s %8phC: adisc fail: post delete\n", 494 __func__, ea->fcport->port_name); 495 /* deleted = 0 & logout_on_delete = force fw cleanup */ 496 fcport->deleted = 0; 497 fcport->logout_on_delete = 1; 498 qlt_schedule_sess_for_deletion(ea->fcport); 499 return; 500 } 501 502 if (ea->fcport->disc_state == DSC_DELETE_PEND) 503 return; 504 505 if (ea->sp->gen2 != ea->fcport->login_gen) { 506 /* target side must have changed it. */ 507 ql_dbg(ql_dbg_disc, vha, 0x20d3, 508 "%s %8phC generation changed\n", 509 __func__, ea->fcport->port_name); 510 return; 511 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 512 qla_rscn_replay(fcport); 513 qlt_schedule_sess_for_deletion(fcport); 514 return; 515 } 516 517 __qla24xx_handle_gpdb_event(vha, ea); 518 } 519 520 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 521 { 522 struct qla_work_evt *e; 523 524 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 525 if (!e) 526 return QLA_FUNCTION_FAILED; 527 528 e->u.fcport.fcport = fcport; 529 fcport->flags |= FCF_ASYNC_ACTIVE; 530 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 531 return qla2x00_post_work(vha, e); 532 } 533 534 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 535 { 536 struct scsi_qla_host *vha = sp->vha; 537 struct event_arg ea; 538 struct srb_iocb *lio = &sp->u.iocb_cmd; 539 540 ql_dbg(ql_dbg_disc, vha, 0x2066, 541 "Async done-%s res %x %8phC\n", 542 sp->name, res, sp->fcport->port_name); 543 544 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 545 546 memset(&ea, 0, sizeof(ea)); 547 ea.rc = res; 548 ea.data[0] = lio->u.logio.data[0]; 549 ea.data[1] = lio->u.logio.data[1]; 550 ea.iop[0] = lio->u.logio.iop[0]; 551 ea.iop[1] = lio->u.logio.iop[1]; 552 ea.fcport = sp->fcport; 553 ea.sp = sp; 554 555 qla24xx_handle_adisc_event(vha, &ea); 556 557 sp->free(sp); 558 } 559 560 int 561 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 562 uint16_t *data) 563 { 564 srb_t *sp; 565 struct srb_iocb *lio; 566 int rval = QLA_FUNCTION_FAILED; 567 568 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 569 return rval; 570 571 fcport->flags |= FCF_ASYNC_SENT; 572 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 573 if (!sp) 574 goto done; 575 576 sp->type = SRB_ADISC_CMD; 577 sp->name = "adisc"; 578 579 lio = &sp->u.iocb_cmd; 580 lio->timeout = qla2x00_async_iocb_timeout; 581 sp->gen1 = fcport->rscn_gen; 582 sp->gen2 = fcport->login_gen; 583 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 584 585 sp->done = qla2x00_async_adisc_sp_done; 586 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 587 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 588 589 ql_dbg(ql_dbg_disc, vha, 0x206f, 590 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 591 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 592 593 rval = qla2x00_start_sp(sp); 594 if (rval != QLA_SUCCESS) 595 goto done_free_sp; 596 597 return rval; 598 599 done_free_sp: 600 sp->free(sp); 601 done: 602 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 603 qla2x00_post_async_adisc_work(vha, fcport, data); 604 return rval; 605 } 606 607 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 608 { 609 struct qla_hw_data *ha = vha->hw; 610 611 if (IS_FWI2_CAPABLE(ha)) 612 return loop_id > NPH_LAST_HANDLE; 613 614 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 615 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 616 } 617 618 /** 619 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 620 * @vha: adapter state pointer. 621 * @dev: port structure pointer. 622 * 623 * Returns: 624 * qla2x00 local function return status code. 625 * 626 * Context: 627 * Kernel context. 628 */ 629 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 630 { 631 int rval; 632 struct qla_hw_data *ha = vha->hw; 633 unsigned long flags = 0; 634 635 rval = QLA_SUCCESS; 636 637 spin_lock_irqsave(&ha->vport_slock, flags); 638 639 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 640 if (dev->loop_id >= LOOPID_MAP_SIZE || 641 qla2x00_is_reserved_id(vha, dev->loop_id)) { 642 dev->loop_id = FC_NO_LOOP_ID; 643 rval = QLA_FUNCTION_FAILED; 644 } else { 645 set_bit(dev->loop_id, ha->loop_id_map); 646 } 647 spin_unlock_irqrestore(&ha->vport_slock, flags); 648 649 if (rval == QLA_SUCCESS) 650 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 651 "Assigning new loopid=%x, portid=%x.\n", 652 dev->loop_id, dev->d_id.b24); 653 else 654 ql_log(ql_log_warn, dev->vha, 0x2087, 655 "No loop_id's available, portid=%x.\n", 656 dev->d_id.b24); 657 658 return rval; 659 } 660 661 void qla2x00_clear_loop_id(fc_port_t *fcport) 662 { 663 struct qla_hw_data *ha = fcport->vha->hw; 664 665 if (fcport->loop_id == FC_NO_LOOP_ID || 666 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 667 return; 668 669 clear_bit(fcport->loop_id, ha->loop_id_map); 670 fcport->loop_id = FC_NO_LOOP_ID; 671 } 672 673 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 674 struct event_arg *ea) 675 { 676 fc_port_t *fcport, *conflict_fcport; 677 struct get_name_list_extended *e; 678 u16 i, n, found = 0, loop_id; 679 port_id_t id; 680 u64 wwn; 681 u16 data[2]; 682 u8 current_login_state, nvme_cls; 683 684 fcport = ea->fcport; 685 ql_dbg(ql_dbg_disc, vha, 0xffff, 686 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n", 687 __func__, fcport->port_name, fcport->disc_state, 688 fcport->fw_login_state, ea->rc, 689 fcport->login_gen, fcport->last_login_gen, 690 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable); 691 692 if (fcport->disc_state == DSC_DELETE_PEND) 693 return; 694 695 if (ea->rc) { /* rval */ 696 if (fcport->login_retry == 0) { 697 ql_dbg(ql_dbg_disc, vha, 0x20de, 698 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 699 fcport->port_name, fcport->login_retry); 700 } 701 return; 702 } 703 704 if (fcport->last_rscn_gen != fcport->rscn_gen) { 705 qla_rscn_replay(fcport); 706 qlt_schedule_sess_for_deletion(fcport); 707 return; 708 } else if (fcport->last_login_gen != fcport->login_gen) { 709 ql_dbg(ql_dbg_disc, vha, 0x20e0, 710 "%s %8phC login gen changed\n", 711 __func__, fcport->port_name); 712 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 713 return; 714 } 715 716 n = ea->data[0] / sizeof(struct get_name_list_extended); 717 718 ql_dbg(ql_dbg_disc, vha, 0x20e1, 719 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 720 __func__, __LINE__, fcport->port_name, n, 721 fcport->d_id.b.domain, fcport->d_id.b.area, 722 fcport->d_id.b.al_pa, fcport->loop_id); 723 724 for (i = 0; i < n; i++) { 725 e = &vha->gnl.l[i]; 726 wwn = wwn_to_u64(e->port_name); 727 id.b.domain = e->port_id[2]; 728 id.b.area = e->port_id[1]; 729 id.b.al_pa = e->port_id[0]; 730 id.b.rsvd_1 = 0; 731 732 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 733 continue; 734 735 if (IS_SW_RESV_ADDR(id)) 736 continue; 737 738 found = 1; 739 740 loop_id = le16_to_cpu(e->nport_handle); 741 loop_id = (loop_id & 0x7fff); 742 nvme_cls = e->current_login_state >> 4; 743 current_login_state = e->current_login_state & 0xf; 744 745 if (PRLI_PHASE(nvme_cls)) { 746 current_login_state = nvme_cls; 747 fcport->fc4_type &= ~FS_FC4TYPE_FCP; 748 fcport->fc4_type |= FS_FC4TYPE_NVME; 749 } else if (PRLI_PHASE(current_login_state)) { 750 fcport->fc4_type |= FS_FC4TYPE_FCP; 751 fcport->fc4_type &= ~FS_FC4TYPE_NVME; 752 } 753 754 ql_dbg(ql_dbg_disc, vha, 0x20e2, 755 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 756 __func__, fcport->port_name, 757 e->current_login_state, fcport->fw_login_state, 758 fcport->fc4_type, id.b24, fcport->d_id.b24, 759 loop_id, fcport->loop_id); 760 761 switch (fcport->disc_state) { 762 case DSC_DELETE_PEND: 763 case DSC_DELETED: 764 break; 765 default: 766 if ((id.b24 != fcport->d_id.b24 && 767 fcport->d_id.b24 && 768 fcport->loop_id != FC_NO_LOOP_ID) || 769 (fcport->loop_id != FC_NO_LOOP_ID && 770 fcport->loop_id != loop_id)) { 771 ql_dbg(ql_dbg_disc, vha, 0x20e3, 772 "%s %d %8phC post del sess\n", 773 __func__, __LINE__, fcport->port_name); 774 if (fcport->n2n_flag) 775 fcport->d_id.b24 = 0; 776 qlt_schedule_sess_for_deletion(fcport); 777 return; 778 } 779 break; 780 } 781 782 fcport->loop_id = loop_id; 783 if (fcport->n2n_flag) 784 fcport->d_id.b24 = id.b24; 785 786 wwn = wwn_to_u64(fcport->port_name); 787 qlt_find_sess_invalidate_other(vha, wwn, 788 id, loop_id, &conflict_fcport); 789 790 if (conflict_fcport) { 791 /* 792 * Another share fcport share the same loop_id & 793 * nport id. Conflict fcport needs to finish 794 * cleanup before this fcport can proceed to login. 795 */ 796 conflict_fcport->conflict = fcport; 797 fcport->login_pause = 1; 798 } 799 800 switch (vha->hw->current_topology) { 801 default: 802 switch (current_login_state) { 803 case DSC_LS_PRLI_COMP: 804 ql_dbg(ql_dbg_disc, 805 vha, 0x20e4, "%s %d %8phC post gpdb\n", 806 __func__, __LINE__, fcport->port_name); 807 808 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 809 fcport->port_type = FCT_INITIATOR; 810 else 811 fcport->port_type = FCT_TARGET; 812 data[0] = data[1] = 0; 813 qla2x00_post_async_adisc_work(vha, fcport, 814 data); 815 break; 816 case DSC_LS_PLOGI_COMP: 817 if (vha->hw->flags.edif_enabled) { 818 /* check to see if App support Secure */ 819 qla24xx_post_gpdb_work(vha, fcport, 0); 820 break; 821 } 822 fallthrough; 823 case DSC_LS_PORT_UNAVAIL: 824 default: 825 if (fcport->loop_id == FC_NO_LOOP_ID) { 826 qla2x00_find_new_loop_id(vha, fcport); 827 fcport->fw_login_state = 828 DSC_LS_PORT_UNAVAIL; 829 } 830 ql_dbg(ql_dbg_disc, vha, 0x20e5, 831 "%s %d %8phC\n", __func__, __LINE__, 832 fcport->port_name); 833 qla24xx_fcport_handle_login(vha, fcport); 834 break; 835 } 836 break; 837 case ISP_CFG_N: 838 fcport->fw_login_state = current_login_state; 839 fcport->d_id = id; 840 switch (current_login_state) { 841 case DSC_LS_PRLI_PEND: 842 /* 843 * In the middle of PRLI. Let it finish. 844 * Allow relogin code to recheck state again 845 * with GNL. Push disc_state back to DELETED 846 * so GNL can go out again 847 */ 848 qla2x00_set_fcport_disc_state(fcport, 849 DSC_DELETED); 850 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 851 break; 852 case DSC_LS_PRLI_COMP: 853 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 854 fcport->port_type = FCT_INITIATOR; 855 else 856 fcport->port_type = FCT_TARGET; 857 858 data[0] = data[1] = 0; 859 qla2x00_post_async_adisc_work(vha, fcport, 860 data); 861 break; 862 case DSC_LS_PLOGI_COMP: 863 if (vha->hw->flags.edif_enabled && 864 DBELL_ACTIVE(vha)) { 865 /* check to see if App support secure or not */ 866 qla24xx_post_gpdb_work(vha, fcport, 0); 867 break; 868 } 869 if (fcport_is_bigger(fcport)) { 870 /* local adapter is smaller */ 871 if (fcport->loop_id != FC_NO_LOOP_ID) 872 qla2x00_clear_loop_id(fcport); 873 874 fcport->loop_id = loop_id; 875 qla24xx_fcport_handle_login(vha, 876 fcport); 877 break; 878 } 879 fallthrough; 880 default: 881 if (fcport_is_smaller(fcport)) { 882 /* local adapter is bigger */ 883 if (fcport->loop_id != FC_NO_LOOP_ID) 884 qla2x00_clear_loop_id(fcport); 885 886 fcport->loop_id = loop_id; 887 qla24xx_fcport_handle_login(vha, 888 fcport); 889 } 890 break; 891 } 892 break; 893 } /* switch (ha->current_topology) */ 894 } 895 896 if (!found) { 897 switch (vha->hw->current_topology) { 898 case ISP_CFG_F: 899 case ISP_CFG_FL: 900 for (i = 0; i < n; i++) { 901 e = &vha->gnl.l[i]; 902 id.b.domain = e->port_id[0]; 903 id.b.area = e->port_id[1]; 904 id.b.al_pa = e->port_id[2]; 905 id.b.rsvd_1 = 0; 906 loop_id = le16_to_cpu(e->nport_handle); 907 908 if (fcport->d_id.b24 == id.b24) { 909 conflict_fcport = 910 qla2x00_find_fcport_by_wwpn(vha, 911 e->port_name, 0); 912 if (conflict_fcport) { 913 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 914 vha, 0x20e5, 915 "%s %d %8phC post del sess\n", 916 __func__, __LINE__, 917 conflict_fcport->port_name); 918 qlt_schedule_sess_for_deletion 919 (conflict_fcport); 920 } 921 } 922 /* 923 * FW already picked this loop id for 924 * another fcport 925 */ 926 if (fcport->loop_id == loop_id) 927 fcport->loop_id = FC_NO_LOOP_ID; 928 } 929 qla24xx_fcport_handle_login(vha, fcport); 930 break; 931 case ISP_CFG_N: 932 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 933 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 934 if (fcport->n2n_link_reset_cnt < 2) { 935 fcport->n2n_link_reset_cnt++; 936 /* 937 * remote port is not sending PLOGI. 938 * Reset link to kick start his state 939 * machine 940 */ 941 set_bit(N2N_LINK_RESET, 942 &vha->dpc_flags); 943 } else { 944 if (fcport->n2n_chip_reset < 1) { 945 ql_log(ql_log_info, vha, 0x705d, 946 "Chip reset to bring laser down"); 947 set_bit(ISP_ABORT_NEEDED, 948 &vha->dpc_flags); 949 fcport->n2n_chip_reset++; 950 } else { 951 ql_log(ql_log_info, vha, 0x705d, 952 "Remote port %8ph is not coming back\n", 953 fcport->port_name); 954 fcport->scan_state = 0; 955 } 956 } 957 qla2xxx_wake_dpc(vha); 958 } else { 959 /* 960 * report port suppose to do PLOGI. Give him 961 * more time. FW will catch it. 962 */ 963 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 964 } 965 break; 966 default: 967 break; 968 } 969 } 970 } /* gnl_event */ 971 972 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 973 { 974 struct scsi_qla_host *vha = sp->vha; 975 unsigned long flags; 976 struct fc_port *fcport = NULL, *tf; 977 u16 i, n = 0, loop_id; 978 struct event_arg ea; 979 struct get_name_list_extended *e; 980 u64 wwn; 981 struct list_head h; 982 bool found = false; 983 984 ql_dbg(ql_dbg_disc, vha, 0x20e7, 985 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 986 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 987 sp->u.iocb_cmd.u.mbx.in_mb[2]); 988 989 990 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 991 memset(&ea, 0, sizeof(ea)); 992 ea.sp = sp; 993 ea.rc = res; 994 995 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 996 sizeof(struct get_name_list_extended)) { 997 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 998 sizeof(struct get_name_list_extended); 999 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 1000 } 1001 1002 for (i = 0; i < n; i++) { 1003 e = &vha->gnl.l[i]; 1004 loop_id = le16_to_cpu(e->nport_handle); 1005 /* mask out reserve bit */ 1006 loop_id = (loop_id & 0x7fff); 1007 set_bit(loop_id, vha->hw->loop_id_map); 1008 wwn = wwn_to_u64(e->port_name); 1009 1010 ql_dbg(ql_dbg_disc, vha, 0x20e8, 1011 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 1012 __func__, &wwn, e->port_id[2], e->port_id[1], 1013 e->port_id[0], e->current_login_state, e->last_login_state, 1014 (loop_id & 0x7fff)); 1015 } 1016 1017 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1018 1019 INIT_LIST_HEAD(&h); 1020 fcport = tf = NULL; 1021 if (!list_empty(&vha->gnl.fcports)) 1022 list_splice_init(&vha->gnl.fcports, &h); 1023 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1024 1025 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1026 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1027 list_del_init(&fcport->gnl_entry); 1028 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1029 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1030 ea.fcport = fcport; 1031 1032 qla24xx_handle_gnl_done_event(vha, &ea); 1033 } 1034 1035 /* create new fcport if fw has knowledge of new sessions */ 1036 for (i = 0; i < n; i++) { 1037 port_id_t id; 1038 u64 wwnn; 1039 1040 e = &vha->gnl.l[i]; 1041 wwn = wwn_to_u64(e->port_name); 1042 1043 found = false; 1044 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1045 if (!memcmp((u8 *)&wwn, fcport->port_name, 1046 WWN_SIZE)) { 1047 found = true; 1048 break; 1049 } 1050 } 1051 1052 id.b.domain = e->port_id[2]; 1053 id.b.area = e->port_id[1]; 1054 id.b.al_pa = e->port_id[0]; 1055 id.b.rsvd_1 = 0; 1056 1057 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1058 ql_dbg(ql_dbg_disc, vha, 0x2065, 1059 "%s %d %8phC %06x post new sess\n", 1060 __func__, __LINE__, (u8 *)&wwn, id.b24); 1061 wwnn = wwn_to_u64(e->node_name); 1062 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1063 (u8 *)&wwnn, NULL, 0); 1064 } 1065 } 1066 1067 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1068 vha->gnl.sent = 0; 1069 if (!list_empty(&vha->gnl.fcports)) { 1070 /* retrigger gnl */ 1071 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports, 1072 gnl_entry) { 1073 list_del_init(&fcport->gnl_entry); 1074 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1075 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS) 1076 break; 1077 } 1078 } 1079 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1080 1081 sp->free(sp); 1082 } 1083 1084 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1085 { 1086 srb_t *sp; 1087 struct srb_iocb *mbx; 1088 int rval = QLA_FUNCTION_FAILED; 1089 unsigned long flags; 1090 u16 *mb; 1091 1092 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1093 return rval; 1094 1095 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1096 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1097 1098 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1099 fcport->flags |= FCF_ASYNC_SENT; 1100 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1101 fcport->last_rscn_gen = fcport->rscn_gen; 1102 fcport->last_login_gen = fcport->login_gen; 1103 1104 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1105 if (vha->gnl.sent) { 1106 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1107 return QLA_SUCCESS; 1108 } 1109 vha->gnl.sent = 1; 1110 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1111 1112 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1113 if (!sp) 1114 goto done; 1115 1116 sp->type = SRB_MB_IOCB; 1117 sp->name = "gnlist"; 1118 sp->gen1 = fcport->rscn_gen; 1119 sp->gen2 = fcport->login_gen; 1120 1121 mbx = &sp->u.iocb_cmd; 1122 mbx->timeout = qla2x00_async_iocb_timeout; 1123 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 1124 1125 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1126 mb[0] = MBC_PORT_NODE_NAME_LIST; 1127 mb[1] = BIT_2 | BIT_3; 1128 mb[2] = MSW(vha->gnl.ldma); 1129 mb[3] = LSW(vha->gnl.ldma); 1130 mb[6] = MSW(MSD(vha->gnl.ldma)); 1131 mb[7] = LSW(MSD(vha->gnl.ldma)); 1132 mb[8] = vha->gnl.size; 1133 mb[9] = vha->vp_idx; 1134 1135 sp->done = qla24xx_async_gnl_sp_done; 1136 1137 ql_dbg(ql_dbg_disc, vha, 0x20da, 1138 "Async-%s - OUT WWPN %8phC hndl %x\n", 1139 sp->name, fcport->port_name, sp->handle); 1140 1141 rval = qla2x00_start_sp(sp); 1142 if (rval != QLA_SUCCESS) 1143 goto done_free_sp; 1144 1145 return rval; 1146 1147 done_free_sp: 1148 sp->free(sp); 1149 done: 1150 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT); 1151 return rval; 1152 } 1153 1154 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1155 { 1156 struct qla_work_evt *e; 1157 1158 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1159 if (!e) 1160 return QLA_FUNCTION_FAILED; 1161 1162 e->u.fcport.fcport = fcport; 1163 fcport->flags |= FCF_ASYNC_ACTIVE; 1164 return qla2x00_post_work(vha, e); 1165 } 1166 1167 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1168 { 1169 struct scsi_qla_host *vha = sp->vha; 1170 struct qla_hw_data *ha = vha->hw; 1171 fc_port_t *fcport = sp->fcport; 1172 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1173 struct event_arg ea; 1174 1175 ql_dbg(ql_dbg_disc, vha, 0x20db, 1176 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1177 sp->name, res, fcport->port_name, mb[1], mb[2]); 1178 1179 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1180 1181 if (res == QLA_FUNCTION_TIMEOUT) 1182 goto done; 1183 1184 memset(&ea, 0, sizeof(ea)); 1185 ea.fcport = fcport; 1186 ea.sp = sp; 1187 1188 qla24xx_handle_gpdb_event(vha, &ea); 1189 1190 done: 1191 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1192 sp->u.iocb_cmd.u.mbx.in_dma); 1193 1194 sp->free(sp); 1195 } 1196 1197 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1198 { 1199 struct qla_work_evt *e; 1200 1201 if (vha->host->active_mode == MODE_TARGET) 1202 return QLA_FUNCTION_FAILED; 1203 1204 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1205 if (!e) 1206 return QLA_FUNCTION_FAILED; 1207 1208 e->u.fcport.fcport = fcport; 1209 1210 return qla2x00_post_work(vha, e); 1211 } 1212 1213 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1214 { 1215 struct scsi_qla_host *vha = sp->vha; 1216 struct srb_iocb *lio = &sp->u.iocb_cmd; 1217 struct event_arg ea; 1218 1219 ql_dbg(ql_dbg_disc, vha, 0x2129, 1220 "%s %8phC res %x\n", __func__, 1221 sp->fcport->port_name, res); 1222 1223 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1224 1225 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1226 memset(&ea, 0, sizeof(ea)); 1227 ea.fcport = sp->fcport; 1228 ea.data[0] = lio->u.logio.data[0]; 1229 ea.data[1] = lio->u.logio.data[1]; 1230 ea.iop[0] = lio->u.logio.iop[0]; 1231 ea.iop[1] = lio->u.logio.iop[1]; 1232 ea.sp = sp; 1233 if (res == QLA_OS_TIMER_EXPIRED) 1234 ea.data[0] = QLA_OS_TIMER_EXPIRED; 1235 1236 qla24xx_handle_prli_done_event(vha, &ea); 1237 } 1238 1239 sp->free(sp); 1240 } 1241 1242 int 1243 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1244 { 1245 srb_t *sp; 1246 struct srb_iocb *lio; 1247 int rval = QLA_FUNCTION_FAILED; 1248 1249 if (!vha->flags.online) { 1250 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1251 __func__, __LINE__, fcport->port_name); 1252 return rval; 1253 } 1254 1255 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1256 fcport->fw_login_state == DSC_LS_PRLI_PEND) && 1257 qla_dual_mode_enabled(vha)) { 1258 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1259 __func__, __LINE__, fcport->port_name); 1260 return rval; 1261 } 1262 1263 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1264 if (!sp) 1265 return rval; 1266 1267 fcport->flags |= FCF_ASYNC_SENT; 1268 fcport->logout_completed = 0; 1269 1270 sp->type = SRB_PRLI_CMD; 1271 sp->name = "prli"; 1272 1273 lio = &sp->u.iocb_cmd; 1274 lio->timeout = qla2x00_async_iocb_timeout; 1275 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1276 1277 sp->done = qla2x00_async_prli_sp_done; 1278 lio->u.logio.flags = 0; 1279 1280 if (NVME_TARGET(vha->hw, fcport)) 1281 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1282 1283 ql_dbg(ql_dbg_disc, vha, 0x211b, 1284 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n", 1285 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1286 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority, 1287 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp"); 1288 1289 rval = qla2x00_start_sp(sp); 1290 if (rval != QLA_SUCCESS) { 1291 fcport->flags |= FCF_LOGIN_NEEDED; 1292 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1293 goto done_free_sp; 1294 } 1295 1296 return rval; 1297 1298 done_free_sp: 1299 sp->free(sp); 1300 fcport->flags &= ~FCF_ASYNC_SENT; 1301 return rval; 1302 } 1303 1304 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1305 { 1306 struct qla_work_evt *e; 1307 1308 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1309 if (!e) 1310 return QLA_FUNCTION_FAILED; 1311 1312 e->u.fcport.fcport = fcport; 1313 e->u.fcport.opt = opt; 1314 fcport->flags |= FCF_ASYNC_ACTIVE; 1315 return qla2x00_post_work(vha, e); 1316 } 1317 1318 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1319 { 1320 srb_t *sp; 1321 struct srb_iocb *mbx; 1322 int rval = QLA_FUNCTION_FAILED; 1323 u16 *mb; 1324 dma_addr_t pd_dma; 1325 struct port_database_24xx *pd; 1326 struct qla_hw_data *ha = vha->hw; 1327 1328 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 1329 fcport->loop_id == FC_NO_LOOP_ID) { 1330 ql_log(ql_log_warn, vha, 0xffff, 1331 "%s: %8phC - not sending command.\n", 1332 __func__, fcport->port_name); 1333 return rval; 1334 } 1335 1336 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1337 if (!sp) 1338 goto done; 1339 1340 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB); 1341 1342 fcport->flags |= FCF_ASYNC_SENT; 1343 sp->type = SRB_MB_IOCB; 1344 sp->name = "gpdb"; 1345 sp->gen1 = fcport->rscn_gen; 1346 sp->gen2 = fcport->login_gen; 1347 1348 mbx = &sp->u.iocb_cmd; 1349 mbx->timeout = qla2x00_async_iocb_timeout; 1350 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1351 1352 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1353 if (pd == NULL) { 1354 ql_log(ql_log_warn, vha, 0xd043, 1355 "Failed to allocate port database structure.\n"); 1356 goto done_free_sp; 1357 } 1358 1359 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1360 mb[0] = MBC_GET_PORT_DATABASE; 1361 mb[1] = fcport->loop_id; 1362 mb[2] = MSW(pd_dma); 1363 mb[3] = LSW(pd_dma); 1364 mb[6] = MSW(MSD(pd_dma)); 1365 mb[7] = LSW(MSD(pd_dma)); 1366 mb[9] = vha->vp_idx; 1367 mb[10] = opt; 1368 1369 mbx->u.mbx.in = pd; 1370 mbx->u.mbx.in_dma = pd_dma; 1371 1372 sp->done = qla24xx_async_gpdb_sp_done; 1373 1374 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1375 "Async-%s %8phC hndl %x opt %x\n", 1376 sp->name, fcport->port_name, sp->handle, opt); 1377 1378 rval = qla2x00_start_sp(sp); 1379 if (rval != QLA_SUCCESS) 1380 goto done_free_sp; 1381 return rval; 1382 1383 done_free_sp: 1384 if (pd) 1385 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1386 1387 sp->free(sp); 1388 fcport->flags &= ~FCF_ASYNC_SENT; 1389 done: 1390 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1391 qla24xx_post_gpdb_work(vha, fcport, opt); 1392 return rval; 1393 } 1394 1395 static 1396 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1397 { 1398 unsigned long flags; 1399 1400 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1401 ea->fcport->login_gen++; 1402 ea->fcport->deleted = 0; 1403 ea->fcport->logout_on_delete = 1; 1404 1405 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1406 vha->fcport_count++; 1407 ea->fcport->login_succ = 1; 1408 1409 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1410 qla24xx_sched_upd_fcport(ea->fcport); 1411 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1412 } else if (ea->fcport->login_succ) { 1413 /* 1414 * We have an existing session. A late RSCN delivery 1415 * must have triggered the session to be re-validate. 1416 * Session is still valid. 1417 */ 1418 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1419 "%s %d %8phC session revalidate success\n", 1420 __func__, __LINE__, ea->fcport->port_name); 1421 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE); 1422 } 1423 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1424 } 1425 1426 static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport, 1427 struct port_database_24xx *pd) 1428 { 1429 int rc = 0; 1430 1431 if (pd->secure_login) { 1432 ql_dbg(ql_dbg_disc, vha, 0x104d, 1433 "Secure Login established on %8phC\n", 1434 fcport->port_name); 1435 fcport->flags |= FCF_FCSP_DEVICE; 1436 } else { 1437 ql_dbg(ql_dbg_disc, vha, 0x104d, 1438 "non-Secure Login %8phC", 1439 fcport->port_name); 1440 fcport->flags &= ~FCF_FCSP_DEVICE; 1441 } 1442 if (vha->hw->flags.edif_enabled) { 1443 if (fcport->flags & FCF_FCSP_DEVICE) { 1444 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND); 1445 /* Start edif prli timer & ring doorbell for app */ 1446 fcport->edif.rx_sa_set = 0; 1447 fcport->edif.tx_sa_set = 0; 1448 fcport->edif.rx_sa_pending = 0; 1449 fcport->edif.tx_sa_pending = 0; 1450 1451 qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE, 1452 fcport->d_id.b24); 1453 1454 if (DBELL_ACTIVE(vha)) { 1455 ql_dbg(ql_dbg_disc, vha, 0x20ef, 1456 "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n", 1457 __func__, __LINE__, fcport->port_name); 1458 fcport->edif.app_started = 1; 1459 fcport->edif.app_sess_online = 1; 1460 1461 qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED, 1462 fcport->d_id.b24, 0, fcport); 1463 } 1464 1465 rc = 1; 1466 } else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 1467 ql_dbg(ql_dbg_disc, vha, 0x2117, 1468 "%s %d %8phC post prli\n", 1469 __func__, __LINE__, fcport->port_name); 1470 qla24xx_post_prli_work(vha, fcport); 1471 rc = 1; 1472 } 1473 } 1474 return rc; 1475 } 1476 1477 static 1478 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1479 { 1480 fc_port_t *fcport = ea->fcport; 1481 struct port_database_24xx *pd; 1482 struct srb *sp = ea->sp; 1483 uint8_t ls; 1484 1485 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1486 1487 fcport->flags &= ~FCF_ASYNC_SENT; 1488 1489 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1490 "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__, 1491 fcport->port_name, fcport->disc_state, pd->current_login_state, 1492 fcport->fc4_type, ea->rc); 1493 1494 if (fcport->disc_state == DSC_DELETE_PEND) { 1495 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n", 1496 __func__, __LINE__, fcport->port_name); 1497 return; 1498 } 1499 1500 if (NVME_TARGET(vha->hw, fcport)) 1501 ls = pd->current_login_state >> 4; 1502 else 1503 ls = pd->current_login_state & 0xf; 1504 1505 if (ea->sp->gen2 != fcport->login_gen) { 1506 /* target side must have changed it. */ 1507 1508 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1509 "%s %8phC generation changed\n", 1510 __func__, fcport->port_name); 1511 return; 1512 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1513 qla_rscn_replay(fcport); 1514 qlt_schedule_sess_for_deletion(fcport); 1515 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1516 __func__, __LINE__, fcport->port_name, ls); 1517 return; 1518 } 1519 1520 switch (ls) { 1521 case PDS_PRLI_COMPLETE: 1522 __qla24xx_parse_gpdb(vha, fcport, pd); 1523 break; 1524 case PDS_PLOGI_COMPLETE: 1525 if (qla_chk_secure_login(vha, fcport, pd)) { 1526 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1527 __func__, __LINE__, fcport->port_name, ls); 1528 return; 1529 } 1530 fallthrough; 1531 case PDS_PLOGI_PENDING: 1532 case PDS_PRLI_PENDING: 1533 case PDS_PRLI2_PENDING: 1534 /* Set discovery state back to GNL to Relogin attempt */ 1535 if (qla_dual_mode_enabled(vha) || 1536 qla_ini_mode_enabled(vha)) { 1537 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1538 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1539 } 1540 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1541 __func__, __LINE__, fcport->port_name, ls); 1542 return; 1543 case PDS_LOGO_PENDING: 1544 case PDS_PORT_UNAVAILABLE: 1545 default: 1546 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1547 __func__, __LINE__, fcport->port_name); 1548 qlt_schedule_sess_for_deletion(fcport); 1549 return; 1550 } 1551 __qla24xx_handle_gpdb_event(vha, ea); 1552 } /* gpdb event */ 1553 1554 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1555 { 1556 u8 login = 0; 1557 int rc; 1558 1559 if (qla_tgt_mode_enabled(vha)) 1560 return; 1561 1562 if (qla_dual_mode_enabled(vha)) { 1563 if (N2N_TOPO(vha->hw)) { 1564 u64 mywwn, wwn; 1565 1566 mywwn = wwn_to_u64(vha->port_name); 1567 wwn = wwn_to_u64(fcport->port_name); 1568 if (mywwn > wwn) 1569 login = 1; 1570 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1571 && time_after_eq(jiffies, 1572 fcport->plogi_nack_done_deadline)) 1573 login = 1; 1574 } else { 1575 login = 1; 1576 } 1577 } else { 1578 /* initiator mode */ 1579 login = 1; 1580 } 1581 1582 if (login && fcport->login_retry) { 1583 fcport->login_retry--; 1584 if (fcport->loop_id == FC_NO_LOOP_ID) { 1585 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1586 rc = qla2x00_find_new_loop_id(vha, fcport); 1587 if (rc) { 1588 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1589 "%s %d %8phC post del sess - out of loopid\n", 1590 __func__, __LINE__, fcport->port_name); 1591 fcport->scan_state = 0; 1592 qlt_schedule_sess_for_deletion(fcport); 1593 return; 1594 } 1595 } 1596 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1597 "%s %d %8phC post login\n", 1598 __func__, __LINE__, fcport->port_name); 1599 qla2x00_post_async_login_work(vha, fcport, NULL); 1600 } 1601 } 1602 1603 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1604 { 1605 u16 data[2]; 1606 u64 wwn; 1607 u16 sec; 1608 1609 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1610 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n", 1611 __func__, fcport->port_name, fcport->disc_state, 1612 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1613 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1614 fcport->login_gen, fcport->loop_id, fcport->scan_state, 1615 fcport->fc4_type); 1616 1617 if (fcport->scan_state != QLA_FCPORT_FOUND) 1618 return 0; 1619 1620 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1621 qla_dual_mode_enabled(vha) && 1622 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1623 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1624 return 0; 1625 1626 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1627 !N2N_TOPO(vha->hw)) { 1628 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1629 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1630 return 0; 1631 } 1632 } 1633 1634 /* Target won't initiate port login if fabric is present */ 1635 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1636 return 0; 1637 1638 if (fcport->flags & FCF_ASYNC_SENT) { 1639 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1640 return 0; 1641 } 1642 1643 switch (fcport->disc_state) { 1644 case DSC_DELETED: 1645 wwn = wwn_to_u64(fcport->node_name); 1646 switch (vha->hw->current_topology) { 1647 case ISP_CFG_N: 1648 if (fcport_is_smaller(fcport)) { 1649 /* this adapter is bigger */ 1650 if (fcport->login_retry) { 1651 if (fcport->loop_id == FC_NO_LOOP_ID) { 1652 qla2x00_find_new_loop_id(vha, 1653 fcport); 1654 fcport->fw_login_state = 1655 DSC_LS_PORT_UNAVAIL; 1656 } 1657 fcport->login_retry--; 1658 qla_post_els_plogi_work(vha, fcport); 1659 } else { 1660 ql_log(ql_log_info, vha, 0x705d, 1661 "Unable to reach remote port %8phC", 1662 fcport->port_name); 1663 } 1664 } else { 1665 qla24xx_post_gnl_work(vha, fcport); 1666 } 1667 break; 1668 default: 1669 if (wwn == 0) { 1670 ql_dbg(ql_dbg_disc, vha, 0xffff, 1671 "%s %d %8phC post GNNID\n", 1672 __func__, __LINE__, fcport->port_name); 1673 qla24xx_post_gnnid_work(vha, fcport); 1674 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1675 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1676 "%s %d %8phC post gnl\n", 1677 __func__, __LINE__, fcport->port_name); 1678 qla24xx_post_gnl_work(vha, fcport); 1679 } else { 1680 qla_chk_n2n_b4_login(vha, fcport); 1681 } 1682 break; 1683 } 1684 break; 1685 1686 case DSC_GNL: 1687 switch (vha->hw->current_topology) { 1688 case ISP_CFG_N: 1689 if ((fcport->current_login_state & 0xf) == 0x6) { 1690 ql_dbg(ql_dbg_disc, vha, 0x2118, 1691 "%s %d %8phC post GPDB work\n", 1692 __func__, __LINE__, fcport->port_name); 1693 fcport->chip_reset = 1694 vha->hw->base_qpair->chip_reset; 1695 qla24xx_post_gpdb_work(vha, fcport, 0); 1696 } else { 1697 ql_dbg(ql_dbg_disc, vha, 0x2118, 1698 "%s %d %8phC post %s PRLI\n", 1699 __func__, __LINE__, fcport->port_name, 1700 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1701 "FC"); 1702 qla24xx_post_prli_work(vha, fcport); 1703 } 1704 break; 1705 default: 1706 if (fcport->login_pause) { 1707 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1708 "%s %d %8phC exit\n", 1709 __func__, __LINE__, 1710 fcport->port_name); 1711 fcport->last_rscn_gen = fcport->rscn_gen; 1712 fcport->last_login_gen = fcport->login_gen; 1713 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1714 break; 1715 } 1716 qla_chk_n2n_b4_login(vha, fcport); 1717 break; 1718 } 1719 break; 1720 1721 case DSC_LOGIN_FAILED: 1722 if (N2N_TOPO(vha->hw)) 1723 qla_chk_n2n_b4_login(vha, fcport); 1724 else 1725 qlt_schedule_sess_for_deletion(fcport); 1726 break; 1727 1728 case DSC_LOGIN_COMPLETE: 1729 /* recheck login state */ 1730 data[0] = data[1] = 0; 1731 qla2x00_post_async_adisc_work(vha, fcport, data); 1732 break; 1733 1734 case DSC_LOGIN_PEND: 1735 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1736 qla24xx_post_prli_work(vha, fcport); 1737 break; 1738 1739 case DSC_UPD_FCPORT: 1740 sec = jiffies_to_msecs(jiffies - 1741 fcport->jiffies_at_registration)/1000; 1742 if (fcport->sec_since_registration < sec && sec && 1743 !(sec % 60)) { 1744 fcport->sec_since_registration = sec; 1745 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1746 "%s %8phC - Slow Rport registration(%d Sec)\n", 1747 __func__, fcport->port_name, sec); 1748 } 1749 1750 if (fcport->next_disc_state != DSC_DELETE_PEND) 1751 fcport->next_disc_state = DSC_ADISC; 1752 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1753 break; 1754 1755 default: 1756 break; 1757 } 1758 1759 return 0; 1760 } 1761 1762 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1763 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1764 { 1765 struct qla_work_evt *e; 1766 1767 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1768 if (!e) 1769 return QLA_FUNCTION_FAILED; 1770 1771 e->u.new_sess.id = *id; 1772 e->u.new_sess.pla = pla; 1773 e->u.new_sess.fc4_type = fc4_type; 1774 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1775 if (node_name) 1776 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1777 1778 return qla2x00_post_work(vha, e); 1779 } 1780 1781 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1782 { 1783 fc_port_t *fcport; 1784 unsigned long flags; 1785 1786 switch (ea->id.b.rsvd_1) { 1787 case RSCN_PORT_ADDR: 1788 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1789 if (fcport) { 1790 if (fcport->flags & FCF_FCP2_DEVICE) { 1791 ql_dbg(ql_dbg_disc, vha, 0x2115, 1792 "Delaying session delete for FCP2 portid=%06x %8phC ", 1793 fcport->d_id.b24, fcport->port_name); 1794 return; 1795 } 1796 1797 if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) { 1798 /* 1799 * On ipsec start by remote port, Target port 1800 * may use RSCN to trigger initiator to 1801 * relogin. If driver is already in the 1802 * process of a relogin, then ignore the RSCN 1803 * and allow the current relogin to continue. 1804 * This reduces thrashing of the connection. 1805 */ 1806 if (atomic_read(&fcport->state) == FCS_ONLINE) { 1807 /* 1808 * If state = online, then set scan_needed=1 to do relogin. 1809 * Otherwise we're already in the middle of a relogin 1810 */ 1811 fcport->scan_needed = 1; 1812 fcport->rscn_gen++; 1813 } 1814 } else { 1815 fcport->scan_needed = 1; 1816 fcport->rscn_gen++; 1817 } 1818 } 1819 break; 1820 case RSCN_AREA_ADDR: 1821 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1822 if (fcport->flags & FCF_FCP2_DEVICE) 1823 continue; 1824 1825 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) { 1826 fcport->scan_needed = 1; 1827 fcport->rscn_gen++; 1828 } 1829 } 1830 break; 1831 case RSCN_DOM_ADDR: 1832 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1833 if (fcport->flags & FCF_FCP2_DEVICE) 1834 continue; 1835 1836 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) { 1837 fcport->scan_needed = 1; 1838 fcport->rscn_gen++; 1839 } 1840 } 1841 break; 1842 case RSCN_FAB_ADDR: 1843 default: 1844 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1845 if (fcport->flags & FCF_FCP2_DEVICE) 1846 continue; 1847 1848 fcport->scan_needed = 1; 1849 fcport->rscn_gen++; 1850 } 1851 break; 1852 } 1853 1854 spin_lock_irqsave(&vha->work_lock, flags); 1855 if (vha->scan.scan_flags == 0) { 1856 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1857 vha->scan.scan_flags |= SF_QUEUED; 1858 schedule_delayed_work(&vha->scan.scan_work, 5); 1859 } 1860 spin_unlock_irqrestore(&vha->work_lock, flags); 1861 } 1862 1863 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1864 struct event_arg *ea) 1865 { 1866 fc_port_t *fcport = ea->fcport; 1867 1868 if (test_bit(UNLOADING, &vha->dpc_flags)) 1869 return; 1870 1871 ql_dbg(ql_dbg_disc, vha, 0x2102, 1872 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1873 __func__, fcport->port_name, fcport->disc_state, 1874 fcport->fw_login_state, fcport->login_pause, 1875 fcport->deleted, fcport->conflict, 1876 fcport->last_rscn_gen, fcport->rscn_gen, 1877 fcport->last_login_gen, fcport->login_gen, 1878 fcport->flags); 1879 1880 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1881 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1882 __func__, __LINE__, fcport->port_name); 1883 qla24xx_post_gnl_work(vha, fcport); 1884 return; 1885 } 1886 1887 qla24xx_fcport_handle_login(vha, fcport); 1888 } 1889 1890 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1891 struct event_arg *ea) 1892 { 1893 if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) && 1894 vha->hw->flags.edif_enabled) { 1895 /* check to see if App support Secure */ 1896 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1897 return; 1898 } 1899 1900 /* for pure Target Mode, PRLI will not be initiated */ 1901 if (vha->host->active_mode == MODE_TARGET) 1902 return; 1903 1904 ql_dbg(ql_dbg_disc, vha, 0x2118, 1905 "%s %d %8phC post PRLI\n", 1906 __func__, __LINE__, ea->fcport->port_name); 1907 qla24xx_post_prli_work(vha, ea->fcport); 1908 } 1909 1910 /* 1911 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1912 * to be consumed by the fcport 1913 */ 1914 void qla_rscn_replay(fc_port_t *fcport) 1915 { 1916 struct event_arg ea; 1917 1918 switch (fcport->disc_state) { 1919 case DSC_DELETE_PEND: 1920 return; 1921 default: 1922 break; 1923 } 1924 1925 if (fcport->scan_needed) { 1926 memset(&ea, 0, sizeof(ea)); 1927 ea.id = fcport->d_id; 1928 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1929 qla2x00_handle_rscn(fcport->vha, &ea); 1930 } 1931 } 1932 1933 static void 1934 qla2x00_tmf_iocb_timeout(void *data) 1935 { 1936 srb_t *sp = data; 1937 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1938 int rc, h; 1939 unsigned long flags; 1940 1941 rc = qla24xx_async_abort_cmd(sp, false); 1942 if (rc) { 1943 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 1944 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 1945 if (sp->qpair->req->outstanding_cmds[h] == sp) { 1946 sp->qpair->req->outstanding_cmds[h] = NULL; 1947 break; 1948 } 1949 } 1950 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 1951 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT); 1952 tmf->u.tmf.data = QLA_FUNCTION_FAILED; 1953 complete(&tmf->u.tmf.comp); 1954 } 1955 } 1956 1957 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 1958 { 1959 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1960 1961 complete(&tmf->u.tmf.comp); 1962 } 1963 1964 int 1965 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1966 uint32_t tag) 1967 { 1968 struct scsi_qla_host *vha = fcport->vha; 1969 struct srb_iocb *tm_iocb; 1970 srb_t *sp; 1971 int rval = QLA_FUNCTION_FAILED; 1972 1973 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1974 if (!sp) 1975 goto done; 1976 1977 tm_iocb = &sp->u.iocb_cmd; 1978 sp->type = SRB_TM_CMD; 1979 sp->name = "tmf"; 1980 1981 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1982 init_completion(&tm_iocb->u.tmf.comp); 1983 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1984 1985 tm_iocb->u.tmf.flags = flags; 1986 tm_iocb->u.tmf.lun = lun; 1987 tm_iocb->u.tmf.data = tag; 1988 sp->done = qla2x00_tmf_sp_done; 1989 1990 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1991 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1992 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1993 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1994 1995 rval = qla2x00_start_sp(sp); 1996 if (rval != QLA_SUCCESS) 1997 goto done_free_sp; 1998 wait_for_completion(&tm_iocb->u.tmf.comp); 1999 2000 rval = tm_iocb->u.tmf.data; 2001 2002 if (rval != QLA_SUCCESS) { 2003 ql_log(ql_log_warn, vha, 0x8030, 2004 "TM IOCB failed (%x).\n", rval); 2005 } 2006 2007 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 2008 flags = tm_iocb->u.tmf.flags; 2009 lun = (uint16_t)tm_iocb->u.tmf.lun; 2010 2011 /* Issue Marker IOCB */ 2012 qla2x00_marker(vha, vha->hw->base_qpair, 2013 fcport->loop_id, lun, 2014 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 2015 } 2016 2017 done_free_sp: 2018 sp->free(sp); 2019 fcport->flags &= ~FCF_ASYNC_SENT; 2020 done: 2021 return rval; 2022 } 2023 2024 int 2025 qla24xx_async_abort_command(srb_t *sp) 2026 { 2027 unsigned long flags = 0; 2028 2029 uint32_t handle; 2030 fc_port_t *fcport = sp->fcport; 2031 struct qla_qpair *qpair = sp->qpair; 2032 struct scsi_qla_host *vha = fcport->vha; 2033 struct req_que *req = qpair->req; 2034 2035 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 2036 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 2037 if (req->outstanding_cmds[handle] == sp) 2038 break; 2039 } 2040 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 2041 2042 if (handle == req->num_outstanding_cmds) { 2043 /* Command not found. */ 2044 return QLA_ERR_NOT_FOUND; 2045 } 2046 if (sp->type == SRB_FXIOCB_DCMD) 2047 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 2048 FXDISC_ABORT_IOCTL); 2049 2050 return qla24xx_async_abort_cmd(sp, true); 2051 } 2052 2053 static void 2054 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2055 { 2056 struct srb *sp; 2057 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2058 ea->data[0]); 2059 2060 switch (ea->data[0]) { 2061 case MBS_COMMAND_COMPLETE: 2062 ql_dbg(ql_dbg_disc, vha, 0x2118, 2063 "%s %d %8phC post gpdb\n", 2064 __func__, __LINE__, ea->fcport->port_name); 2065 2066 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2067 ea->fcport->logout_on_delete = 1; 2068 ea->fcport->nvme_prli_service_param = ea->iop[0]; 2069 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 2070 ea->fcport->nvme_first_burst_size = 2071 (ea->iop[1] & 0xffff) * 512; 2072 else 2073 ea->fcport->nvme_first_burst_size = 0; 2074 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2075 break; 2076 default: 2077 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 2078 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 2079 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2080 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 2081 break; 2082 } 2083 2084 sp = ea->sp; 2085 ql_dbg(ql_dbg_disc, vha, 0x2118, 2086 "%s %d %8phC priority %s, fc4type %x prev try %s\n", 2087 __func__, __LINE__, ea->fcport->port_name, 2088 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ? 2089 "FCP" : "NVMe", ea->fcport->fc4_type, 2090 (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ? 2091 "NVME" : "FCP"); 2092 2093 if (NVME_FCP_TARGET(ea->fcport)) { 2094 if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) 2095 ea->fcport->do_prli_nvme = 0; 2096 else 2097 ea->fcport->do_prli_nvme = 1; 2098 } else { 2099 ea->fcport->do_prli_nvme = 0; 2100 } 2101 2102 if (N2N_TOPO(vha->hw)) { 2103 if (ea->fcport->n2n_link_reset_cnt < 2104 vha->hw->login_retry_count) { 2105 ea->fcport->n2n_link_reset_cnt++; 2106 vha->relogin_jif = jiffies + 2 * HZ; 2107 /* 2108 * PRLI failed. Reset link to kick start 2109 * state machine 2110 */ 2111 set_bit(N2N_LINK_RESET, &vha->dpc_flags); 2112 qla2xxx_wake_dpc(vha); 2113 } else { 2114 ql_log(ql_log_warn, vha, 0x2119, 2115 "%s %d %8phC Unable to reconnect\n", 2116 __func__, __LINE__, 2117 ea->fcport->port_name); 2118 } 2119 } else { 2120 /* 2121 * switch connect. login failed. Take connection down 2122 * and allow relogin to retrigger 2123 */ 2124 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2125 ea->fcport->keep_nport_handle = 0; 2126 ea->fcport->logout_on_delete = 1; 2127 qlt_schedule_sess_for_deletion(ea->fcport); 2128 } 2129 break; 2130 } 2131 } 2132 2133 void 2134 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2135 { 2136 port_id_t cid; /* conflict Nport id */ 2137 u16 lid; 2138 struct fc_port *conflict_fcport; 2139 unsigned long flags; 2140 struct fc_port *fcport = ea->fcport; 2141 2142 ql_dbg(ql_dbg_disc, vha, 0xffff, 2143 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 2144 __func__, fcport->port_name, fcport->disc_state, 2145 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 2146 ea->sp->gen1, fcport->rscn_gen, 2147 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 2148 2149 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 2150 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 2151 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2152 "%s %d %8phC Remote is trying to login\n", 2153 __func__, __LINE__, fcport->port_name); 2154 return; 2155 } 2156 2157 if ((fcport->disc_state == DSC_DELETE_PEND) || 2158 (fcport->disc_state == DSC_DELETED)) { 2159 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2160 return; 2161 } 2162 2163 if (ea->sp->gen2 != fcport->login_gen) { 2164 /* target side must have changed it. */ 2165 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2166 "%s %8phC generation changed\n", 2167 __func__, fcport->port_name); 2168 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2169 return; 2170 } else if (ea->sp->gen1 != fcport->rscn_gen) { 2171 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2172 "%s %8phC RSCN generation changed\n", 2173 __func__, fcport->port_name); 2174 qla_rscn_replay(fcport); 2175 qlt_schedule_sess_for_deletion(fcport); 2176 return; 2177 } 2178 2179 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2180 ea->data[0]); 2181 2182 switch (ea->data[0]) { 2183 case MBS_COMMAND_COMPLETE: 2184 /* 2185 * Driver must validate login state - If PRLI not complete, 2186 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 2187 * requests. 2188 */ 2189 if (vha->hw->flags.edif_enabled) { 2190 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2191 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2192 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2193 ea->fcport->logout_on_delete = 1; 2194 ea->fcport->send_els_logo = 0; 2195 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 2196 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2197 2198 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2199 } else { 2200 if (NVME_TARGET(vha->hw, fcport)) { 2201 ql_dbg(ql_dbg_disc, vha, 0x2117, 2202 "%s %d %8phC post prli\n", 2203 __func__, __LINE__, fcport->port_name); 2204 qla24xx_post_prli_work(vha, fcport); 2205 } else { 2206 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2207 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n", 2208 __func__, __LINE__, fcport->port_name, 2209 fcport->loop_id, fcport->d_id.b24); 2210 2211 set_bit(fcport->loop_id, vha->hw->loop_id_map); 2212 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2213 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2214 fcport->logout_on_delete = 1; 2215 fcport->send_els_logo = 0; 2216 fcport->fw_login_state = DSC_LS_PRLI_COMP; 2217 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2218 2219 qla24xx_post_gpdb_work(vha, fcport, 0); 2220 } 2221 } 2222 break; 2223 case MBS_COMMAND_ERROR: 2224 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2225 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2226 2227 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2228 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_FAILED); 2229 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 2230 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2231 else 2232 qla2x00_mark_device_lost(vha, ea->fcport, 1); 2233 break; 2234 case MBS_LOOP_ID_USED: 2235 /* data[1] = IO PARAM 1 = nport ID */ 2236 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2237 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2238 cid.b.al_pa = ea->iop[1] & 0xff; 2239 cid.b.rsvd_1 = 0; 2240 2241 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2242 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2243 __func__, __LINE__, ea->fcport->port_name, 2244 ea->fcport->loop_id, cid.b24); 2245 2246 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2247 ea->fcport->loop_id = FC_NO_LOOP_ID; 2248 qla24xx_post_gnl_work(vha, ea->fcport); 2249 break; 2250 case MBS_PORT_ID_USED: 2251 lid = ea->iop[1] & 0xffff; 2252 qlt_find_sess_invalidate_other(vha, 2253 wwn_to_u64(ea->fcport->port_name), 2254 ea->fcport->d_id, lid, &conflict_fcport); 2255 2256 if (conflict_fcport) { 2257 /* 2258 * Another fcport share the same loop_id/nport id. 2259 * Conflict fcport needs to finish cleanup before this 2260 * fcport can proceed to login. 2261 */ 2262 conflict_fcport->conflict = ea->fcport; 2263 ea->fcport->login_pause = 1; 2264 2265 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2266 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2267 __func__, __LINE__, ea->fcport->port_name, 2268 ea->fcport->d_id.b24, lid); 2269 } else { 2270 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2271 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2272 __func__, __LINE__, ea->fcport->port_name, 2273 ea->fcport->d_id.b24, lid); 2274 2275 qla2x00_clear_loop_id(ea->fcport); 2276 set_bit(lid, vha->hw->loop_id_map); 2277 ea->fcport->loop_id = lid; 2278 ea->fcport->keep_nport_handle = 0; 2279 ea->fcport->logout_on_delete = 1; 2280 qlt_schedule_sess_for_deletion(ea->fcport); 2281 } 2282 break; 2283 } 2284 return; 2285 } 2286 2287 /****************************************************************************/ 2288 /* QLogic ISP2x00 Hardware Support Functions. */ 2289 /****************************************************************************/ 2290 2291 static int 2292 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2293 { 2294 int rval = QLA_SUCCESS; 2295 struct qla_hw_data *ha = vha->hw; 2296 uint32_t idc_major_ver, idc_minor_ver; 2297 uint16_t config[4]; 2298 2299 qla83xx_idc_lock(vha, 0); 2300 2301 /* SV: TODO: Assign initialization timeout from 2302 * flash-info / other param 2303 */ 2304 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2305 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2306 2307 /* Set our fcoe function presence */ 2308 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2309 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2310 "Error while setting DRV-Presence.\n"); 2311 rval = QLA_FUNCTION_FAILED; 2312 goto exit; 2313 } 2314 2315 /* Decide the reset ownership */ 2316 qla83xx_reset_ownership(vha); 2317 2318 /* 2319 * On first protocol driver load: 2320 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2321 * register. 2322 * Others: Check compatibility with current IDC Major version. 2323 */ 2324 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2325 if (ha->flags.nic_core_reset_owner) { 2326 /* Set IDC Major version */ 2327 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2328 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2329 2330 /* Clearing IDC-Lock-Recovery register */ 2331 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2332 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2333 /* 2334 * Clear further IDC participation if we are not compatible with 2335 * the current IDC Major Version. 2336 */ 2337 ql_log(ql_log_warn, vha, 0xb07d, 2338 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2339 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2340 __qla83xx_clear_drv_presence(vha); 2341 rval = QLA_FUNCTION_FAILED; 2342 goto exit; 2343 } 2344 /* Each function sets its supported Minor version. */ 2345 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2346 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2347 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2348 2349 if (ha->flags.nic_core_reset_owner) { 2350 memset(config, 0, sizeof(config)); 2351 if (!qla81xx_get_port_config(vha, config)) 2352 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2353 QLA8XXX_DEV_READY); 2354 } 2355 2356 rval = qla83xx_idc_state_handler(vha); 2357 2358 exit: 2359 qla83xx_idc_unlock(vha, 0); 2360 2361 return rval; 2362 } 2363 2364 /* 2365 * qla2x00_initialize_adapter 2366 * Initialize board. 2367 * 2368 * Input: 2369 * ha = adapter block pointer. 2370 * 2371 * Returns: 2372 * 0 = success 2373 */ 2374 int 2375 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2376 { 2377 int rval; 2378 struct qla_hw_data *ha = vha->hw; 2379 struct req_que *req = ha->req_q_map[0]; 2380 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2381 2382 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2383 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2384 2385 /* Clear adapter flags. */ 2386 vha->flags.online = 0; 2387 ha->flags.chip_reset_done = 0; 2388 vha->flags.reset_active = 0; 2389 ha->flags.pci_channel_io_perm_failure = 0; 2390 ha->flags.eeh_busy = 0; 2391 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2392 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2393 atomic_set(&vha->loop_state, LOOP_DOWN); 2394 vha->device_flags = DFLG_NO_CABLE; 2395 vha->dpc_flags = 0; 2396 vha->flags.management_server_logged_in = 0; 2397 vha->marker_needed = 0; 2398 ha->isp_abort_cnt = 0; 2399 ha->beacon_blink_led = 0; 2400 2401 set_bit(0, ha->req_qid_map); 2402 set_bit(0, ha->rsp_qid_map); 2403 2404 ql_dbg(ql_dbg_init, vha, 0x0040, 2405 "Configuring PCI space...\n"); 2406 rval = ha->isp_ops->pci_config(vha); 2407 if (rval) { 2408 ql_log(ql_log_warn, vha, 0x0044, 2409 "Unable to configure PCI space.\n"); 2410 return (rval); 2411 } 2412 2413 ha->isp_ops->reset_chip(vha); 2414 2415 /* Check for secure flash support */ 2416 if (IS_QLA28XX(ha)) { 2417 if (rd_reg_word(®->mailbox12) & BIT_0) 2418 ha->flags.secure_adapter = 1; 2419 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n", 2420 (ha->flags.secure_adapter) ? "Yes" : "No"); 2421 } 2422 2423 2424 rval = qla2xxx_get_flash_info(vha); 2425 if (rval) { 2426 ql_log(ql_log_fatal, vha, 0x004f, 2427 "Unable to validate FLASH data.\n"); 2428 return rval; 2429 } 2430 2431 if (IS_QLA8044(ha)) { 2432 qla8044_read_reset_template(vha); 2433 2434 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2435 * If DONRESET_BIT0 is set, drivers should not set dev_state 2436 * to NEED_RESET. But if NEED_RESET is set, drivers should 2437 * should honor the reset. */ 2438 if (ql2xdontresethba == 1) 2439 qla8044_set_idc_dontreset(vha); 2440 } 2441 2442 ha->isp_ops->get_flash_version(vha, req->ring); 2443 ql_dbg(ql_dbg_init, vha, 0x0061, 2444 "Configure NVRAM parameters...\n"); 2445 2446 /* Let priority default to FCP, can be overridden by nvram_config */ 2447 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2448 2449 ha->isp_ops->nvram_config(vha); 2450 2451 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2452 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2453 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2454 2455 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2456 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2457 2458 if (ha->flags.disable_serdes) { 2459 /* Mask HBA via NVRAM settings? */ 2460 ql_log(ql_log_info, vha, 0x0077, 2461 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2462 return QLA_FUNCTION_FAILED; 2463 } 2464 2465 ql_dbg(ql_dbg_init, vha, 0x0078, 2466 "Verifying loaded RISC code...\n"); 2467 2468 /* If smartsan enabled then require fdmi and rdp enabled */ 2469 if (ql2xsmartsan) { 2470 ql2xfdmienable = 1; 2471 ql2xrdpenable = 1; 2472 } 2473 2474 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2475 rval = ha->isp_ops->chip_diag(vha); 2476 if (rval) 2477 return (rval); 2478 rval = qla2x00_setup_chip(vha); 2479 if (rval) 2480 return (rval); 2481 } 2482 2483 if (IS_QLA84XX(ha)) { 2484 ha->cs84xx = qla84xx_get_chip(vha); 2485 if (!ha->cs84xx) { 2486 ql_log(ql_log_warn, vha, 0x00d0, 2487 "Unable to configure ISP84XX.\n"); 2488 return QLA_FUNCTION_FAILED; 2489 } 2490 } 2491 2492 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2493 rval = qla2x00_init_rings(vha); 2494 2495 /* No point in continuing if firmware initialization failed. */ 2496 if (rval != QLA_SUCCESS) 2497 return rval; 2498 2499 ha->flags.chip_reset_done = 1; 2500 2501 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2502 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2503 rval = qla84xx_init_chip(vha); 2504 if (rval != QLA_SUCCESS) { 2505 ql_log(ql_log_warn, vha, 0x00d4, 2506 "Unable to initialize ISP84XX.\n"); 2507 qla84xx_put_chip(vha); 2508 } 2509 } 2510 2511 /* Load the NIC Core f/w if we are the first protocol driver. */ 2512 if (IS_QLA8031(ha)) { 2513 rval = qla83xx_nic_core_fw_load(vha); 2514 if (rval) 2515 ql_log(ql_log_warn, vha, 0x0124, 2516 "Error in initializing NIC Core f/w.\n"); 2517 } 2518 2519 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2520 qla24xx_read_fcp_prio_cfg(vha); 2521 2522 if (IS_P3P_TYPE(ha)) 2523 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2524 else 2525 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2526 2527 return (rval); 2528 } 2529 2530 /** 2531 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2532 * @vha: HA context 2533 * 2534 * Returns 0 on success. 2535 */ 2536 int 2537 qla2100_pci_config(scsi_qla_host_t *vha) 2538 { 2539 uint16_t w; 2540 unsigned long flags; 2541 struct qla_hw_data *ha = vha->hw; 2542 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2543 2544 pci_set_master(ha->pdev); 2545 pci_try_set_mwi(ha->pdev); 2546 2547 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2548 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2549 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2550 2551 pci_disable_rom(ha->pdev); 2552 2553 /* Get PCI bus information. */ 2554 spin_lock_irqsave(&ha->hardware_lock, flags); 2555 ha->pci_attr = rd_reg_word(®->ctrl_status); 2556 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2557 2558 return QLA_SUCCESS; 2559 } 2560 2561 /** 2562 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2563 * @vha: HA context 2564 * 2565 * Returns 0 on success. 2566 */ 2567 int 2568 qla2300_pci_config(scsi_qla_host_t *vha) 2569 { 2570 uint16_t w; 2571 unsigned long flags = 0; 2572 uint32_t cnt; 2573 struct qla_hw_data *ha = vha->hw; 2574 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2575 2576 pci_set_master(ha->pdev); 2577 pci_try_set_mwi(ha->pdev); 2578 2579 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2580 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2581 2582 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2583 w &= ~PCI_COMMAND_INTX_DISABLE; 2584 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2585 2586 /* 2587 * If this is a 2300 card and not 2312, reset the 2588 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2589 * the 2310 also reports itself as a 2300 so we need to get the 2590 * fb revision level -- a 6 indicates it really is a 2300 and 2591 * not a 2310. 2592 */ 2593 if (IS_QLA2300(ha)) { 2594 spin_lock_irqsave(&ha->hardware_lock, flags); 2595 2596 /* Pause RISC. */ 2597 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2598 for (cnt = 0; cnt < 30000; cnt++) { 2599 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) 2600 break; 2601 2602 udelay(10); 2603 } 2604 2605 /* Select FPM registers. */ 2606 wrt_reg_word(®->ctrl_status, 0x20); 2607 rd_reg_word(®->ctrl_status); 2608 2609 /* Get the fb rev level */ 2610 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2611 2612 if (ha->fb_rev == FPM_2300) 2613 pci_clear_mwi(ha->pdev); 2614 2615 /* Deselect FPM registers. */ 2616 wrt_reg_word(®->ctrl_status, 0x0); 2617 rd_reg_word(®->ctrl_status); 2618 2619 /* Release RISC module. */ 2620 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2621 for (cnt = 0; cnt < 30000; cnt++) { 2622 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0) 2623 break; 2624 2625 udelay(10); 2626 } 2627 2628 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2629 } 2630 2631 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2632 2633 pci_disable_rom(ha->pdev); 2634 2635 /* Get PCI bus information. */ 2636 spin_lock_irqsave(&ha->hardware_lock, flags); 2637 ha->pci_attr = rd_reg_word(®->ctrl_status); 2638 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2639 2640 return QLA_SUCCESS; 2641 } 2642 2643 /** 2644 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2645 * @vha: HA context 2646 * 2647 * Returns 0 on success. 2648 */ 2649 int 2650 qla24xx_pci_config(scsi_qla_host_t *vha) 2651 { 2652 uint16_t w; 2653 unsigned long flags = 0; 2654 struct qla_hw_data *ha = vha->hw; 2655 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2656 2657 pci_set_master(ha->pdev); 2658 pci_try_set_mwi(ha->pdev); 2659 2660 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2661 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2662 w &= ~PCI_COMMAND_INTX_DISABLE; 2663 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2664 2665 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2666 2667 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2668 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2669 pcix_set_mmrbc(ha->pdev, 2048); 2670 2671 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2672 if (pci_is_pcie(ha->pdev)) 2673 pcie_set_readrq(ha->pdev, 4096); 2674 2675 pci_disable_rom(ha->pdev); 2676 2677 ha->chip_revision = ha->pdev->revision; 2678 2679 /* Get PCI bus information. */ 2680 spin_lock_irqsave(&ha->hardware_lock, flags); 2681 ha->pci_attr = rd_reg_dword(®->ctrl_status); 2682 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2683 2684 return QLA_SUCCESS; 2685 } 2686 2687 /** 2688 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2689 * @vha: HA context 2690 * 2691 * Returns 0 on success. 2692 */ 2693 int 2694 qla25xx_pci_config(scsi_qla_host_t *vha) 2695 { 2696 uint16_t w; 2697 struct qla_hw_data *ha = vha->hw; 2698 2699 pci_set_master(ha->pdev); 2700 pci_try_set_mwi(ha->pdev); 2701 2702 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2703 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2704 w &= ~PCI_COMMAND_INTX_DISABLE; 2705 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2706 2707 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2708 if (pci_is_pcie(ha->pdev)) 2709 pcie_set_readrq(ha->pdev, 4096); 2710 2711 pci_disable_rom(ha->pdev); 2712 2713 ha->chip_revision = ha->pdev->revision; 2714 2715 return QLA_SUCCESS; 2716 } 2717 2718 /** 2719 * qla2x00_isp_firmware() - Choose firmware image. 2720 * @vha: HA context 2721 * 2722 * Returns 0 on success. 2723 */ 2724 static int 2725 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2726 { 2727 int rval; 2728 uint16_t loop_id, topo, sw_cap; 2729 uint8_t domain, area, al_pa; 2730 struct qla_hw_data *ha = vha->hw; 2731 2732 /* Assume loading risc code */ 2733 rval = QLA_FUNCTION_FAILED; 2734 2735 if (ha->flags.disable_risc_code_load) { 2736 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2737 2738 /* Verify checksum of loaded RISC code. */ 2739 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2740 if (rval == QLA_SUCCESS) { 2741 /* And, verify we are not in ROM code. */ 2742 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2743 &area, &domain, &topo, &sw_cap); 2744 } 2745 } 2746 2747 if (rval) 2748 ql_dbg(ql_dbg_init, vha, 0x007a, 2749 "**** Load RISC code ****.\n"); 2750 2751 return (rval); 2752 } 2753 2754 /** 2755 * qla2x00_reset_chip() - Reset ISP chip. 2756 * @vha: HA context 2757 * 2758 * Returns 0 on success. 2759 */ 2760 int 2761 qla2x00_reset_chip(scsi_qla_host_t *vha) 2762 { 2763 unsigned long flags = 0; 2764 struct qla_hw_data *ha = vha->hw; 2765 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2766 uint32_t cnt; 2767 uint16_t cmd; 2768 int rval = QLA_FUNCTION_FAILED; 2769 2770 if (unlikely(pci_channel_offline(ha->pdev))) 2771 return rval; 2772 2773 ha->isp_ops->disable_intrs(ha); 2774 2775 spin_lock_irqsave(&ha->hardware_lock, flags); 2776 2777 /* Turn off master enable */ 2778 cmd = 0; 2779 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2780 cmd &= ~PCI_COMMAND_MASTER; 2781 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2782 2783 if (!IS_QLA2100(ha)) { 2784 /* Pause RISC. */ 2785 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2786 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2787 for (cnt = 0; cnt < 30000; cnt++) { 2788 if ((rd_reg_word(®->hccr) & 2789 HCCR_RISC_PAUSE) != 0) 2790 break; 2791 udelay(100); 2792 } 2793 } else { 2794 rd_reg_word(®->hccr); /* PCI Posting. */ 2795 udelay(10); 2796 } 2797 2798 /* Select FPM registers. */ 2799 wrt_reg_word(®->ctrl_status, 0x20); 2800 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2801 2802 /* FPM Soft Reset. */ 2803 wrt_reg_word(®->fpm_diag_config, 0x100); 2804 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2805 2806 /* Toggle Fpm Reset. */ 2807 if (!IS_QLA2200(ha)) { 2808 wrt_reg_word(®->fpm_diag_config, 0x0); 2809 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2810 } 2811 2812 /* Select frame buffer registers. */ 2813 wrt_reg_word(®->ctrl_status, 0x10); 2814 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2815 2816 /* Reset frame buffer FIFOs. */ 2817 if (IS_QLA2200(ha)) { 2818 WRT_FB_CMD_REG(ha, reg, 0xa000); 2819 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2820 } else { 2821 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2822 2823 /* Read back fb_cmd until zero or 3 seconds max */ 2824 for (cnt = 0; cnt < 3000; cnt++) { 2825 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2826 break; 2827 udelay(100); 2828 } 2829 } 2830 2831 /* Select RISC module registers. */ 2832 wrt_reg_word(®->ctrl_status, 0); 2833 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2834 2835 /* Reset RISC processor. */ 2836 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2837 rd_reg_word(®->hccr); /* PCI Posting. */ 2838 2839 /* Release RISC processor. */ 2840 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2841 rd_reg_word(®->hccr); /* PCI Posting. */ 2842 } 2843 2844 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 2845 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT); 2846 2847 /* Reset ISP chip. */ 2848 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 2849 2850 /* Wait for RISC to recover from reset. */ 2851 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2852 /* 2853 * It is necessary to for a delay here since the card doesn't 2854 * respond to PCI reads during a reset. On some architectures 2855 * this will result in an MCA. 2856 */ 2857 udelay(20); 2858 for (cnt = 30000; cnt; cnt--) { 2859 if ((rd_reg_word(®->ctrl_status) & 2860 CSR_ISP_SOFT_RESET) == 0) 2861 break; 2862 udelay(100); 2863 } 2864 } else 2865 udelay(10); 2866 2867 /* Reset RISC processor. */ 2868 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2869 2870 wrt_reg_word(®->semaphore, 0); 2871 2872 /* Release RISC processor. */ 2873 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2874 rd_reg_word(®->hccr); /* PCI Posting. */ 2875 2876 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2877 for (cnt = 0; cnt < 30000; cnt++) { 2878 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2879 break; 2880 2881 udelay(100); 2882 } 2883 } else 2884 udelay(100); 2885 2886 /* Turn on master enable */ 2887 cmd |= PCI_COMMAND_MASTER; 2888 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2889 2890 /* Disable RISC pause on FPM parity error. */ 2891 if (!IS_QLA2100(ha)) { 2892 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2893 rd_reg_word(®->hccr); /* PCI Posting. */ 2894 } 2895 2896 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2897 2898 return QLA_SUCCESS; 2899 } 2900 2901 /** 2902 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2903 * @vha: HA context 2904 * 2905 * Returns 0 on success. 2906 */ 2907 static int 2908 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2909 { 2910 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2911 2912 if (!IS_QLA81XX(vha->hw)) 2913 return QLA_SUCCESS; 2914 2915 return qla81xx_write_mpi_register(vha, mb); 2916 } 2917 2918 static int 2919 qla_chk_risc_recovery(scsi_qla_host_t *vha) 2920 { 2921 struct qla_hw_data *ha = vha->hw; 2922 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2923 __le16 __iomem *mbptr = ®->mailbox0; 2924 int i; 2925 u16 mb[32]; 2926 int rc = QLA_SUCCESS; 2927 2928 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 2929 return rc; 2930 2931 /* this check is only valid after RISC reset */ 2932 mb[0] = rd_reg_word(mbptr); 2933 mbptr++; 2934 if (mb[0] == 0xf) { 2935 rc = QLA_FUNCTION_FAILED; 2936 2937 for (i = 1; i < 32; i++) { 2938 mb[i] = rd_reg_word(mbptr); 2939 mbptr++; 2940 } 2941 2942 ql_log(ql_log_warn, vha, 0x1015, 2943 "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2944 mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]); 2945 ql_log(ql_log_warn, vha, 0x1015, 2946 "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2947 mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14], 2948 mb[15]); 2949 ql_log(ql_log_warn, vha, 0x1015, 2950 "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2951 mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22], 2952 mb[23]); 2953 ql_log(ql_log_warn, vha, 0x1015, 2954 "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2955 mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30], 2956 mb[31]); 2957 } 2958 return rc; 2959 } 2960 2961 /** 2962 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2963 * @vha: HA context 2964 * 2965 * Returns 0 on success. 2966 */ 2967 static inline int 2968 qla24xx_reset_risc(scsi_qla_host_t *vha) 2969 { 2970 unsigned long flags = 0; 2971 struct qla_hw_data *ha = vha->hw; 2972 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2973 uint32_t cnt; 2974 uint16_t wd; 2975 static int abts_cnt; /* ISP abort retry counts */ 2976 int rval = QLA_SUCCESS; 2977 int print = 1; 2978 2979 spin_lock_irqsave(&ha->hardware_lock, flags); 2980 2981 /* Reset RISC. */ 2982 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2983 for (cnt = 0; cnt < 30000; cnt++) { 2984 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2985 break; 2986 2987 udelay(10); 2988 } 2989 2990 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2991 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2992 2993 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2994 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2995 rd_reg_dword(®->hccr), 2996 rd_reg_dword(®->ctrl_status), 2997 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2998 2999 wrt_reg_dword(®->ctrl_status, 3000 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3001 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 3002 3003 udelay(100); 3004 3005 /* Wait for firmware to complete NVRAM accesses. */ 3006 rd_reg_word(®->mailbox0); 3007 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 && 3008 rval == QLA_SUCCESS; cnt--) { 3009 barrier(); 3010 if (cnt) 3011 udelay(5); 3012 else 3013 rval = QLA_FUNCTION_TIMEOUT; 3014 } 3015 3016 if (rval == QLA_SUCCESS) 3017 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 3018 3019 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 3020 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 3021 rd_reg_dword(®->hccr), 3022 rd_reg_word(®->mailbox0)); 3023 3024 /* Wait for soft-reset to complete. */ 3025 rd_reg_dword(®->ctrl_status); 3026 for (cnt = 0; cnt < 60; cnt++) { 3027 barrier(); 3028 if ((rd_reg_dword(®->ctrl_status) & 3029 CSRX_ISP_SOFT_RESET) == 0) 3030 break; 3031 3032 udelay(5); 3033 } 3034 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 3035 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 3036 3037 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 3038 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 3039 rd_reg_dword(®->hccr), 3040 rd_reg_dword(®->ctrl_status)); 3041 3042 /* If required, do an MPI FW reset now */ 3043 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 3044 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 3045 if (++abts_cnt < 5) { 3046 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3047 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 3048 } else { 3049 /* 3050 * We exhausted the ISP abort retries. We have to 3051 * set the board offline. 3052 */ 3053 abts_cnt = 0; 3054 vha->flags.online = 0; 3055 } 3056 } 3057 } 3058 3059 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 3060 rd_reg_dword(®->hccr); 3061 3062 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 3063 rd_reg_dword(®->hccr); 3064 3065 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET); 3066 mdelay(10); 3067 rd_reg_dword(®->hccr); 3068 3069 wd = rd_reg_word(®->mailbox0); 3070 for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) { 3071 barrier(); 3072 if (cnt) { 3073 mdelay(1); 3074 if (print && qla_chk_risc_recovery(vha)) 3075 print = 0; 3076 3077 wd = rd_reg_word(®->mailbox0); 3078 } else { 3079 rval = QLA_FUNCTION_TIMEOUT; 3080 3081 ql_log(ql_log_warn, vha, 0x015e, 3082 "RISC reset timeout\n"); 3083 } 3084 } 3085 3086 if (rval == QLA_SUCCESS) 3087 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 3088 3089 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 3090 "Host Risc 0x%x, mailbox0 0x%x\n", 3091 rd_reg_dword(®->hccr), 3092 rd_reg_word(®->mailbox0)); 3093 3094 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3095 3096 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 3097 "Driver in %s mode\n", 3098 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 3099 3100 if (IS_NOPOLLING_TYPE(ha)) 3101 ha->isp_ops->enable_intrs(ha); 3102 3103 return rval; 3104 } 3105 3106 static void 3107 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 3108 { 3109 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3110 3111 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3112 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET); 3113 } 3114 3115 static void 3116 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 3117 { 3118 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3119 3120 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3121 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); 3122 } 3123 3124 static void 3125 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 3126 { 3127 uint32_t wd32 = 0; 3128 uint delta_msec = 100; 3129 uint elapsed_msec = 0; 3130 uint timeout_msec; 3131 ulong n; 3132 3133 if (vha->hw->pdev->subsystem_device != 0x0175 && 3134 vha->hw->pdev->subsystem_device != 0x0240) 3135 return; 3136 3137 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 3138 udelay(100); 3139 3140 attempt: 3141 timeout_msec = TIMEOUT_SEMAPHORE; 3142 n = timeout_msec / delta_msec; 3143 while (n--) { 3144 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 3145 qla25xx_read_risc_sema_reg(vha, &wd32); 3146 if (wd32 & RISC_SEMAPHORE) 3147 break; 3148 msleep(delta_msec); 3149 elapsed_msec += delta_msec; 3150 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3151 goto force; 3152 } 3153 3154 if (!(wd32 & RISC_SEMAPHORE)) 3155 goto force; 3156 3157 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3158 goto acquired; 3159 3160 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 3161 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 3162 n = timeout_msec / delta_msec; 3163 while (n--) { 3164 qla25xx_read_risc_sema_reg(vha, &wd32); 3165 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3166 break; 3167 msleep(delta_msec); 3168 elapsed_msec += delta_msec; 3169 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3170 goto force; 3171 } 3172 3173 if (wd32 & RISC_SEMAPHORE_FORCE) 3174 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 3175 3176 goto attempt; 3177 3178 force: 3179 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 3180 3181 acquired: 3182 return; 3183 } 3184 3185 /** 3186 * qla24xx_reset_chip() - Reset ISP24xx chip. 3187 * @vha: HA context 3188 * 3189 * Returns 0 on success. 3190 */ 3191 int 3192 qla24xx_reset_chip(scsi_qla_host_t *vha) 3193 { 3194 struct qla_hw_data *ha = vha->hw; 3195 int rval = QLA_FUNCTION_FAILED; 3196 3197 if (pci_channel_offline(ha->pdev) && 3198 ha->flags.pci_channel_io_perm_failure) { 3199 return rval; 3200 } 3201 3202 ha->isp_ops->disable_intrs(ha); 3203 3204 qla25xx_manipulate_risc_semaphore(vha); 3205 3206 /* Perform RISC reset. */ 3207 rval = qla24xx_reset_risc(vha); 3208 3209 return rval; 3210 } 3211 3212 /** 3213 * qla2x00_chip_diag() - Test chip for proper operation. 3214 * @vha: HA context 3215 * 3216 * Returns 0 on success. 3217 */ 3218 int 3219 qla2x00_chip_diag(scsi_qla_host_t *vha) 3220 { 3221 int rval; 3222 struct qla_hw_data *ha = vha->hw; 3223 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3224 unsigned long flags = 0; 3225 uint16_t data; 3226 uint32_t cnt; 3227 uint16_t mb[5]; 3228 struct req_que *req = ha->req_q_map[0]; 3229 3230 /* Assume a failed state */ 3231 rval = QLA_FUNCTION_FAILED; 3232 3233 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 3234 ®->flash_address); 3235 3236 spin_lock_irqsave(&ha->hardware_lock, flags); 3237 3238 /* Reset ISP chip. */ 3239 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 3240 3241 /* 3242 * We need to have a delay here since the card will not respond while 3243 * in reset causing an MCA on some architectures. 3244 */ 3245 udelay(20); 3246 data = qla2x00_debounce_register(®->ctrl_status); 3247 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 3248 udelay(5); 3249 data = rd_reg_word(®->ctrl_status); 3250 barrier(); 3251 } 3252 3253 if (!cnt) 3254 goto chip_diag_failed; 3255 3256 ql_dbg(ql_dbg_init, vha, 0x007c, 3257 "Reset register cleared by chip reset.\n"); 3258 3259 /* Reset RISC processor. */ 3260 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3261 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3262 3263 /* Workaround for QLA2312 PCI parity error */ 3264 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3265 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 3266 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 3267 udelay(5); 3268 data = RD_MAILBOX_REG(ha, reg, 0); 3269 barrier(); 3270 } 3271 } else 3272 udelay(10); 3273 3274 if (!cnt) 3275 goto chip_diag_failed; 3276 3277 /* Check product ID of chip */ 3278 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3279 3280 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3281 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3282 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3283 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3284 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3285 mb[3] != PROD_ID_3) { 3286 ql_log(ql_log_warn, vha, 0x0062, 3287 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3288 mb[1], mb[2], mb[3]); 3289 3290 goto chip_diag_failed; 3291 } 3292 ha->product_id[0] = mb[1]; 3293 ha->product_id[1] = mb[2]; 3294 ha->product_id[2] = mb[3]; 3295 ha->product_id[3] = mb[4]; 3296 3297 /* Adjust fw RISC transfer size */ 3298 if (req->length > 1024) 3299 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3300 else 3301 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3302 req->length; 3303 3304 if (IS_QLA2200(ha) && 3305 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3306 /* Limit firmware transfer size with a 2200A */ 3307 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3308 3309 ha->device_type |= DT_ISP2200A; 3310 ha->fw_transfer_size = 128; 3311 } 3312 3313 /* Wrap Incoming Mailboxes Test. */ 3314 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3315 3316 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3317 rval = qla2x00_mbx_reg_test(vha); 3318 if (rval) 3319 ql_log(ql_log_warn, vha, 0x0080, 3320 "Failed mailbox send register test.\n"); 3321 else 3322 /* Flag a successful rval */ 3323 rval = QLA_SUCCESS; 3324 spin_lock_irqsave(&ha->hardware_lock, flags); 3325 3326 chip_diag_failed: 3327 if (rval) 3328 ql_log(ql_log_info, vha, 0x0081, 3329 "Chip diagnostics **** FAILED ****.\n"); 3330 3331 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3332 3333 return (rval); 3334 } 3335 3336 /** 3337 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3338 * @vha: HA context 3339 * 3340 * Returns 0 on success. 3341 */ 3342 int 3343 qla24xx_chip_diag(scsi_qla_host_t *vha) 3344 { 3345 int rval; 3346 struct qla_hw_data *ha = vha->hw; 3347 struct req_que *req = ha->req_q_map[0]; 3348 3349 if (IS_P3P_TYPE(ha)) 3350 return QLA_SUCCESS; 3351 3352 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3353 3354 rval = qla2x00_mbx_reg_test(vha); 3355 if (rval) { 3356 ql_log(ql_log_warn, vha, 0x0082, 3357 "Failed mailbox send register test.\n"); 3358 } else { 3359 /* Flag a successful rval */ 3360 rval = QLA_SUCCESS; 3361 } 3362 3363 return rval; 3364 } 3365 3366 static void 3367 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3368 { 3369 int rval; 3370 dma_addr_t tc_dma; 3371 void *tc; 3372 struct qla_hw_data *ha = vha->hw; 3373 3374 if (!IS_FWI2_CAPABLE(ha)) 3375 return; 3376 3377 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3378 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3379 return; 3380 3381 if (ha->fce) { 3382 ql_dbg(ql_dbg_init, vha, 0x00bd, 3383 "%s: FCE Mem is already allocated.\n", 3384 __func__); 3385 return; 3386 } 3387 3388 /* Allocate memory for Fibre Channel Event Buffer. */ 3389 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3390 GFP_KERNEL); 3391 if (!tc) { 3392 ql_log(ql_log_warn, vha, 0x00be, 3393 "Unable to allocate (%d KB) for FCE.\n", 3394 FCE_SIZE / 1024); 3395 return; 3396 } 3397 3398 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3399 ha->fce_mb, &ha->fce_bufs); 3400 if (rval) { 3401 ql_log(ql_log_warn, vha, 0x00bf, 3402 "Unable to initialize FCE (%d).\n", rval); 3403 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3404 return; 3405 } 3406 3407 ql_dbg(ql_dbg_init, vha, 0x00c0, 3408 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3409 3410 ha->flags.fce_enabled = 1; 3411 ha->fce_dma = tc_dma; 3412 ha->fce = tc; 3413 } 3414 3415 static void 3416 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3417 { 3418 int rval; 3419 dma_addr_t tc_dma; 3420 void *tc; 3421 struct qla_hw_data *ha = vha->hw; 3422 3423 if (!IS_FWI2_CAPABLE(ha)) 3424 return; 3425 3426 if (ha->eft) { 3427 ql_dbg(ql_dbg_init, vha, 0x00bd, 3428 "%s: EFT Mem is already allocated.\n", 3429 __func__); 3430 return; 3431 } 3432 3433 /* Allocate memory for Extended Trace Buffer. */ 3434 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3435 GFP_KERNEL); 3436 if (!tc) { 3437 ql_log(ql_log_warn, vha, 0x00c1, 3438 "Unable to allocate (%d KB) for EFT.\n", 3439 EFT_SIZE / 1024); 3440 return; 3441 } 3442 3443 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3444 if (rval) { 3445 ql_log(ql_log_warn, vha, 0x00c2, 3446 "Unable to initialize EFT (%d).\n", rval); 3447 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3448 return; 3449 } 3450 3451 ql_dbg(ql_dbg_init, vha, 0x00c3, 3452 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3453 3454 ha->eft_dma = tc_dma; 3455 ha->eft = tc; 3456 } 3457 3458 static void 3459 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3460 { 3461 qla2x00_init_fce_trace(vha); 3462 qla2x00_init_eft_trace(vha); 3463 } 3464 3465 void 3466 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3467 { 3468 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3469 eft_size, fce_size, mq_size; 3470 struct qla_hw_data *ha = vha->hw; 3471 struct req_que *req = ha->req_q_map[0]; 3472 struct rsp_que *rsp = ha->rsp_q_map[0]; 3473 struct qla2xxx_fw_dump *fw_dump; 3474 3475 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3476 req_q_size = rsp_q_size = 0; 3477 3478 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3479 fixed_size = sizeof(struct qla2100_fw_dump); 3480 } else if (IS_QLA23XX(ha)) { 3481 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3482 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3483 sizeof(uint16_t); 3484 } else if (IS_FWI2_CAPABLE(ha)) { 3485 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3486 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3487 else if (IS_QLA81XX(ha)) 3488 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3489 else if (IS_QLA25XX(ha)) 3490 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3491 else 3492 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3493 3494 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3495 sizeof(uint32_t); 3496 if (ha->mqenable) { 3497 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && 3498 !IS_QLA28XX(ha)) 3499 mq_size = sizeof(struct qla2xxx_mq_chain); 3500 /* 3501 * Allocate maximum buffer size for all queues - Q0. 3502 * Resizing must be done at end-of-dump processing. 3503 */ 3504 mq_size += (ha->max_req_queues - 1) * 3505 (req->length * sizeof(request_t)); 3506 mq_size += (ha->max_rsp_queues - 1) * 3507 (rsp->length * sizeof(response_t)); 3508 } 3509 if (ha->tgt.atio_ring) 3510 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3511 3512 qla2x00_init_fce_trace(vha); 3513 if (ha->fce) 3514 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3515 qla2x00_init_eft_trace(vha); 3516 if (ha->eft) 3517 eft_size = EFT_SIZE; 3518 } 3519 3520 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3521 struct fwdt *fwdt = ha->fwdt; 3522 uint j; 3523 3524 for (j = 0; j < 2; j++, fwdt++) { 3525 if (!fwdt->template) { 3526 ql_dbg(ql_dbg_init, vha, 0x00ba, 3527 "-> fwdt%u no template\n", j); 3528 continue; 3529 } 3530 ql_dbg(ql_dbg_init, vha, 0x00fa, 3531 "-> fwdt%u calculating fwdump size...\n", j); 3532 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3533 vha, fwdt->template); 3534 ql_dbg(ql_dbg_init, vha, 0x00fa, 3535 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3536 j, fwdt->dump_size); 3537 dump_size += fwdt->dump_size; 3538 } 3539 /* Add space for spare MPI fw dump. */ 3540 dump_size += ha->fwdt[1].dump_size; 3541 } else { 3542 req_q_size = req->length * sizeof(request_t); 3543 rsp_q_size = rsp->length * sizeof(response_t); 3544 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3545 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3546 + eft_size; 3547 ha->chain_offset = dump_size; 3548 dump_size += mq_size + fce_size; 3549 if (ha->exchoffld_buf) 3550 dump_size += sizeof(struct qla2xxx_offld_chain) + 3551 ha->exchoffld_size; 3552 if (ha->exlogin_buf) 3553 dump_size += sizeof(struct qla2xxx_offld_chain) + 3554 ha->exlogin_size; 3555 } 3556 3557 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3558 3559 ql_dbg(ql_dbg_init, vha, 0x00c5, 3560 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3561 __func__, dump_size, ha->fw_dump_len, 3562 ha->fw_dump_alloc_len); 3563 3564 fw_dump = vmalloc(dump_size); 3565 if (!fw_dump) { 3566 ql_log(ql_log_warn, vha, 0x00c4, 3567 "Unable to allocate (%d KB) for firmware dump.\n", 3568 dump_size / 1024); 3569 } else { 3570 mutex_lock(&ha->optrom_mutex); 3571 if (ha->fw_dumped) { 3572 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3573 vfree(ha->fw_dump); 3574 ha->fw_dump = fw_dump; 3575 ha->fw_dump_alloc_len = dump_size; 3576 ql_dbg(ql_dbg_init, vha, 0x00c5, 3577 "Re-Allocated (%d KB) and save firmware dump.\n", 3578 dump_size / 1024); 3579 } else { 3580 vfree(ha->fw_dump); 3581 ha->fw_dump = fw_dump; 3582 3583 ha->fw_dump_len = ha->fw_dump_alloc_len = 3584 dump_size; 3585 ql_dbg(ql_dbg_init, vha, 0x00c5, 3586 "Allocated (%d KB) for firmware dump.\n", 3587 dump_size / 1024); 3588 3589 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3590 ha->mpi_fw_dump = (char *)fw_dump + 3591 ha->fwdt[1].dump_size; 3592 mutex_unlock(&ha->optrom_mutex); 3593 return; 3594 } 3595 3596 ha->fw_dump->signature[0] = 'Q'; 3597 ha->fw_dump->signature[1] = 'L'; 3598 ha->fw_dump->signature[2] = 'G'; 3599 ha->fw_dump->signature[3] = 'C'; 3600 ha->fw_dump->version = htonl(1); 3601 3602 ha->fw_dump->fixed_size = htonl(fixed_size); 3603 ha->fw_dump->mem_size = htonl(mem_size); 3604 ha->fw_dump->req_q_size = htonl(req_q_size); 3605 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3606 3607 ha->fw_dump->eft_size = htonl(eft_size); 3608 ha->fw_dump->eft_addr_l = 3609 htonl(LSD(ha->eft_dma)); 3610 ha->fw_dump->eft_addr_h = 3611 htonl(MSD(ha->eft_dma)); 3612 3613 ha->fw_dump->header_size = 3614 htonl(offsetof 3615 (struct qla2xxx_fw_dump, isp)); 3616 } 3617 mutex_unlock(&ha->optrom_mutex); 3618 } 3619 } 3620 } 3621 3622 static int 3623 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3624 { 3625 #define MPS_MASK 0xe0 3626 int rval; 3627 uint16_t dc; 3628 uint32_t dw; 3629 3630 if (!IS_QLA81XX(vha->hw)) 3631 return QLA_SUCCESS; 3632 3633 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3634 if (rval != QLA_SUCCESS) { 3635 ql_log(ql_log_warn, vha, 0x0105, 3636 "Unable to acquire semaphore.\n"); 3637 goto done; 3638 } 3639 3640 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3641 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3642 if (rval != QLA_SUCCESS) { 3643 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3644 goto done_release; 3645 } 3646 3647 dc &= MPS_MASK; 3648 if (dc == (dw & MPS_MASK)) 3649 goto done_release; 3650 3651 dw &= ~MPS_MASK; 3652 dw |= dc; 3653 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3654 if (rval != QLA_SUCCESS) { 3655 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3656 } 3657 3658 done_release: 3659 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3660 if (rval != QLA_SUCCESS) { 3661 ql_log(ql_log_warn, vha, 0x006d, 3662 "Unable to release semaphore.\n"); 3663 } 3664 3665 done: 3666 return rval; 3667 } 3668 3669 int 3670 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3671 { 3672 /* Don't try to reallocate the array */ 3673 if (req->outstanding_cmds) 3674 return QLA_SUCCESS; 3675 3676 if (!IS_FWI2_CAPABLE(ha)) 3677 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3678 else { 3679 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3680 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3681 else 3682 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3683 } 3684 3685 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3686 sizeof(srb_t *), 3687 GFP_KERNEL); 3688 3689 if (!req->outstanding_cmds) { 3690 /* 3691 * Try to allocate a minimal size just so we can get through 3692 * initialization. 3693 */ 3694 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3695 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3696 sizeof(srb_t *), 3697 GFP_KERNEL); 3698 3699 if (!req->outstanding_cmds) { 3700 ql_log(ql_log_fatal, NULL, 0x0126, 3701 "Failed to allocate memory for " 3702 "outstanding_cmds for req_que %p.\n", req); 3703 req->num_outstanding_cmds = 0; 3704 return QLA_FUNCTION_FAILED; 3705 } 3706 } 3707 3708 return QLA_SUCCESS; 3709 } 3710 3711 #define PRINT_FIELD(_field, _flag, _str) { \ 3712 if (a0->_field & _flag) {\ 3713 if (p) {\ 3714 strcat(ptr, "|");\ 3715 ptr++;\ 3716 leftover--;\ 3717 } \ 3718 len = snprintf(ptr, leftover, "%s", _str); \ 3719 p = 1;\ 3720 leftover -= len;\ 3721 ptr += len; \ 3722 } \ 3723 } 3724 3725 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3726 { 3727 #define STR_LEN 64 3728 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3729 u8 str[STR_LEN], *ptr, p; 3730 int leftover, len; 3731 3732 memset(str, 0, STR_LEN); 3733 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3734 ql_dbg(ql_dbg_init, vha, 0x015a, 3735 "SFP MFG Name: %s\n", str); 3736 3737 memset(str, 0, STR_LEN); 3738 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3739 ql_dbg(ql_dbg_init, vha, 0x015c, 3740 "SFP Part Name: %s\n", str); 3741 3742 /* media */ 3743 memset(str, 0, STR_LEN); 3744 ptr = str; 3745 leftover = STR_LEN; 3746 p = len = 0; 3747 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3748 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3749 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3750 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3751 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3752 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3753 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3754 ql_dbg(ql_dbg_init, vha, 0x0160, 3755 "SFP Media: %s\n", str); 3756 3757 /* link length */ 3758 memset(str, 0, STR_LEN); 3759 ptr = str; 3760 leftover = STR_LEN; 3761 p = len = 0; 3762 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3763 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3764 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3765 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3766 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3767 ql_dbg(ql_dbg_init, vha, 0x0196, 3768 "SFP Link Length: %s\n", str); 3769 3770 memset(str, 0, STR_LEN); 3771 ptr = str; 3772 leftover = STR_LEN; 3773 p = len = 0; 3774 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3775 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3776 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3777 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3778 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3779 ql_dbg(ql_dbg_init, vha, 0x016e, 3780 "SFP FC Link Tech: %s\n", str); 3781 3782 if (a0->length_km) 3783 ql_dbg(ql_dbg_init, vha, 0x016f, 3784 "SFP Distant: %d km\n", a0->length_km); 3785 if (a0->length_100m) 3786 ql_dbg(ql_dbg_init, vha, 0x0170, 3787 "SFP Distant: %d m\n", a0->length_100m*100); 3788 if (a0->length_50um_10m) 3789 ql_dbg(ql_dbg_init, vha, 0x0189, 3790 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3791 if (a0->length_62um_10m) 3792 ql_dbg(ql_dbg_init, vha, 0x018a, 3793 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3794 if (a0->length_om4_10m) 3795 ql_dbg(ql_dbg_init, vha, 0x0194, 3796 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3797 if (a0->length_om3_10m) 3798 ql_dbg(ql_dbg_init, vha, 0x0195, 3799 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3800 } 3801 3802 3803 /** 3804 * qla24xx_detect_sfp() 3805 * 3806 * @vha: adapter state pointer. 3807 * 3808 * @return 3809 * 0 -- Configure firmware to use short-range settings -- normal 3810 * buffer-to-buffer credits. 3811 * 3812 * 1 -- Configure firmware to use long-range settings -- extra 3813 * buffer-to-buffer credits should be allocated with 3814 * ha->lr_distance containing distance settings from NVRAM or SFP 3815 * (if supported). 3816 */ 3817 int 3818 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3819 { 3820 int rc, used_nvram; 3821 struct sff_8247_a0 *a; 3822 struct qla_hw_data *ha = vha->hw; 3823 struct nvram_81xx *nv = ha->nvram; 3824 #define LR_DISTANCE_UNKNOWN 2 3825 static const char * const types[] = { "Short", "Long" }; 3826 static const char * const lengths[] = { "(10km)", "(5km)", "" }; 3827 u8 ll = 0; 3828 3829 /* Seed with NVRAM settings. */ 3830 used_nvram = 0; 3831 ha->flags.lr_detected = 0; 3832 if (IS_BPM_RANGE_CAPABLE(ha) && 3833 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) { 3834 used_nvram = 1; 3835 ha->flags.lr_detected = 1; 3836 ha->lr_distance = 3837 (nv->enhanced_features >> LR_DIST_NV_POS) 3838 & LR_DIST_NV_MASK; 3839 } 3840 3841 if (!IS_BPM_ENABLED(vha)) 3842 goto out; 3843 /* Determine SR/LR capabilities of SFP/Transceiver. */ 3844 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3845 if (rc) 3846 goto out; 3847 3848 used_nvram = 0; 3849 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3850 qla2xxx_print_sfp_info(vha); 3851 3852 ha->flags.lr_detected = 0; 3853 ll = a->fc_ll_cc7; 3854 if (ll & FC_LL_VL || ll & FC_LL_L) { 3855 /* Long range, track length. */ 3856 ha->flags.lr_detected = 1; 3857 3858 if (a->length_km > 5 || a->length_100m > 50) 3859 ha->lr_distance = LR_DISTANCE_10K; 3860 else 3861 ha->lr_distance = LR_DISTANCE_5K; 3862 } 3863 3864 out: 3865 ql_dbg(ql_dbg_async, vha, 0x507b, 3866 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n", 3867 types[ha->flags.lr_detected], 3868 ha->flags.lr_detected ? lengths[ha->lr_distance] : 3869 lengths[LR_DISTANCE_UNKNOWN], 3870 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance); 3871 return ha->flags.lr_detected; 3872 } 3873 3874 void qla_init_iocb_limit(scsi_qla_host_t *vha) 3875 { 3876 u16 i, num_qps; 3877 u32 limit; 3878 struct qla_hw_data *ha = vha->hw; 3879 3880 num_qps = ha->num_qpairs + 1; 3881 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100; 3882 3883 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count; 3884 ha->base_qpair->fwres.iocbs_limit = limit; 3885 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps; 3886 ha->base_qpair->fwres.iocbs_used = 0; 3887 for (i = 0; i < ha->max_qpairs; i++) { 3888 if (ha->queue_pair_map[i]) { 3889 ha->queue_pair_map[i]->fwres.iocbs_total = 3890 ha->orig_fw_iocb_count; 3891 ha->queue_pair_map[i]->fwres.iocbs_limit = limit; 3892 ha->queue_pair_map[i]->fwres.iocbs_qp_limit = 3893 limit / num_qps; 3894 ha->queue_pair_map[i]->fwres.iocbs_used = 0; 3895 } 3896 } 3897 } 3898 3899 /** 3900 * qla2x00_setup_chip() - Load and start RISC firmware. 3901 * @vha: HA context 3902 * 3903 * Returns 0 on success. 3904 */ 3905 static int 3906 qla2x00_setup_chip(scsi_qla_host_t *vha) 3907 { 3908 int rval; 3909 uint32_t srisc_address = 0; 3910 struct qla_hw_data *ha = vha->hw; 3911 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3912 unsigned long flags; 3913 uint16_t fw_major_version; 3914 int done_once = 0; 3915 3916 if (IS_P3P_TYPE(ha)) { 3917 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3918 if (rval == QLA_SUCCESS) { 3919 qla2x00_stop_firmware(vha); 3920 goto enable_82xx_npiv; 3921 } else 3922 goto failed; 3923 } 3924 3925 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3926 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3927 spin_lock_irqsave(&ha->hardware_lock, flags); 3928 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3929 rd_reg_word(®->hccr); 3930 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3931 } 3932 3933 qla81xx_mpi_sync(vha); 3934 3935 execute_fw_with_lr: 3936 /* Load firmware sequences */ 3937 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3938 if (rval == QLA_SUCCESS) { 3939 ql_dbg(ql_dbg_init, vha, 0x00c9, 3940 "Verifying Checksum of loaded RISC code.\n"); 3941 3942 rval = qla2x00_verify_checksum(vha, srisc_address); 3943 if (rval == QLA_SUCCESS) { 3944 /* Start firmware execution. */ 3945 ql_dbg(ql_dbg_init, vha, 0x00ca, 3946 "Starting firmware.\n"); 3947 3948 if (ql2xexlogins) 3949 ha->flags.exlogins_enabled = 1; 3950 3951 if (qla_is_exch_offld_enabled(vha)) 3952 ha->flags.exchoffld_enabled = 1; 3953 3954 rval = qla2x00_execute_fw(vha, srisc_address); 3955 /* Retrieve firmware information. */ 3956 if (rval == QLA_SUCCESS) { 3957 /* Enable BPM support? */ 3958 if (!done_once++ && qla24xx_detect_sfp(vha)) { 3959 ql_dbg(ql_dbg_init, vha, 0x00ca, 3960 "Re-starting firmware -- BPM.\n"); 3961 /* Best-effort - re-init. */ 3962 ha->isp_ops->reset_chip(vha); 3963 ha->isp_ops->chip_diag(vha); 3964 goto execute_fw_with_lr; 3965 } 3966 3967 if (IS_ZIO_THRESHOLD_CAPABLE(ha)) 3968 qla27xx_set_zio_threshold(vha, 3969 ha->last_zio_threshold); 3970 3971 rval = qla2x00_set_exlogins_buffer(vha); 3972 if (rval != QLA_SUCCESS) 3973 goto failed; 3974 3975 rval = qla2x00_set_exchoffld_buffer(vha); 3976 if (rval != QLA_SUCCESS) 3977 goto failed; 3978 3979 enable_82xx_npiv: 3980 fw_major_version = ha->fw_major_version; 3981 if (IS_P3P_TYPE(ha)) 3982 qla82xx_check_md_needed(vha); 3983 else 3984 rval = qla2x00_get_fw_version(vha); 3985 if (rval != QLA_SUCCESS) 3986 goto failed; 3987 ha->flags.npiv_supported = 0; 3988 if (IS_QLA2XXX_MIDTYPE(ha) && 3989 (ha->fw_attributes & BIT_2)) { 3990 ha->flags.npiv_supported = 1; 3991 if ((!ha->max_npiv_vports) || 3992 ((ha->max_npiv_vports + 1) % 3993 MIN_MULTI_ID_FABRIC)) 3994 ha->max_npiv_vports = 3995 MIN_MULTI_ID_FABRIC - 1; 3996 } 3997 qla2x00_get_resource_cnts(vha); 3998 qla_init_iocb_limit(vha); 3999 4000 /* 4001 * Allocate the array of outstanding commands 4002 * now that we know the firmware resources. 4003 */ 4004 rval = qla2x00_alloc_outstanding_cmds(ha, 4005 vha->req); 4006 if (rval != QLA_SUCCESS) 4007 goto failed; 4008 4009 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 4010 qla2x00_alloc_offload_mem(vha); 4011 4012 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 4013 qla2x00_alloc_fw_dump(vha); 4014 4015 } else { 4016 goto failed; 4017 } 4018 } else { 4019 ql_log(ql_log_fatal, vha, 0x00cd, 4020 "ISP Firmware failed checksum.\n"); 4021 goto failed; 4022 } 4023 4024 /* Enable PUREX PASSTHRU */ 4025 if (ql2xrdpenable || ha->flags.scm_supported_f || 4026 ha->flags.edif_enabled) 4027 qla25xx_set_els_cmds_supported(vha); 4028 } else 4029 goto failed; 4030 4031 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 4032 /* Enable proper parity. */ 4033 spin_lock_irqsave(&ha->hardware_lock, flags); 4034 if (IS_QLA2300(ha)) 4035 /* SRAM parity */ 4036 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1); 4037 else 4038 /* SRAM, Instruction RAM and GP RAM parity */ 4039 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7); 4040 rd_reg_word(®->hccr); 4041 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4042 } 4043 4044 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 4045 ha->flags.fac_supported = 1; 4046 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 4047 uint32_t size; 4048 4049 rval = qla81xx_fac_get_sector_size(vha, &size); 4050 if (rval == QLA_SUCCESS) { 4051 ha->flags.fac_supported = 1; 4052 ha->fdt_block_size = size << 2; 4053 } else { 4054 ql_log(ql_log_warn, vha, 0x00ce, 4055 "Unsupported FAC firmware (%d.%02d.%02d).\n", 4056 ha->fw_major_version, ha->fw_minor_version, 4057 ha->fw_subminor_version); 4058 4059 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4060 IS_QLA28XX(ha)) { 4061 ha->flags.fac_supported = 0; 4062 rval = QLA_SUCCESS; 4063 } 4064 } 4065 } 4066 failed: 4067 if (rval) { 4068 ql_log(ql_log_fatal, vha, 0x00cf, 4069 "Setup chip ****FAILED****.\n"); 4070 } 4071 4072 return (rval); 4073 } 4074 4075 /** 4076 * qla2x00_init_response_q_entries() - Initializes response queue entries. 4077 * @rsp: response queue 4078 * 4079 * Beginning of request ring has initialization control block already built 4080 * by nvram config routine. 4081 * 4082 * Returns 0 on success. 4083 */ 4084 void 4085 qla2x00_init_response_q_entries(struct rsp_que *rsp) 4086 { 4087 uint16_t cnt; 4088 response_t *pkt; 4089 4090 rsp->ring_ptr = rsp->ring; 4091 rsp->ring_index = 0; 4092 rsp->status_srb = NULL; 4093 pkt = rsp->ring_ptr; 4094 for (cnt = 0; cnt < rsp->length; cnt++) { 4095 pkt->signature = RESPONSE_PROCESSED; 4096 pkt++; 4097 } 4098 } 4099 4100 /** 4101 * qla2x00_update_fw_options() - Read and process firmware options. 4102 * @vha: HA context 4103 * 4104 * Returns 0 on success. 4105 */ 4106 void 4107 qla2x00_update_fw_options(scsi_qla_host_t *vha) 4108 { 4109 uint16_t swing, emphasis, tx_sens, rx_sens; 4110 struct qla_hw_data *ha = vha->hw; 4111 4112 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 4113 qla2x00_get_fw_options(vha, ha->fw_options); 4114 4115 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4116 return; 4117 4118 /* Serial Link options. */ 4119 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 4120 "Serial link options.\n"); 4121 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 4122 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 4123 4124 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 4125 if (ha->fw_seriallink_options[3] & BIT_2) { 4126 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 4127 4128 /* 1G settings */ 4129 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 4130 emphasis = (ha->fw_seriallink_options[2] & 4131 (BIT_4 | BIT_3)) >> 3; 4132 tx_sens = ha->fw_seriallink_options[0] & 4133 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4134 rx_sens = (ha->fw_seriallink_options[0] & 4135 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4136 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 4137 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4138 if (rx_sens == 0x0) 4139 rx_sens = 0x3; 4140 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 4141 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4142 ha->fw_options[10] |= BIT_5 | 4143 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4144 (tx_sens & (BIT_1 | BIT_0)); 4145 4146 /* 2G settings */ 4147 swing = (ha->fw_seriallink_options[2] & 4148 (BIT_7 | BIT_6 | BIT_5)) >> 5; 4149 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 4150 tx_sens = ha->fw_seriallink_options[1] & 4151 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4152 rx_sens = (ha->fw_seriallink_options[1] & 4153 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4154 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 4155 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4156 if (rx_sens == 0x0) 4157 rx_sens = 0x3; 4158 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 4159 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4160 ha->fw_options[11] |= BIT_5 | 4161 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4162 (tx_sens & (BIT_1 | BIT_0)); 4163 } 4164 4165 /* FCP2 options. */ 4166 /* Return command IOCBs without waiting for an ABTS to complete. */ 4167 ha->fw_options[3] |= BIT_13; 4168 4169 /* LED scheme. */ 4170 if (ha->flags.enable_led_scheme) 4171 ha->fw_options[2] |= BIT_12; 4172 4173 /* Detect ISP6312. */ 4174 if (IS_QLA6312(ha)) 4175 ha->fw_options[2] |= BIT_13; 4176 4177 /* Set Retry FLOGI in case of P2P connection */ 4178 if (ha->operating_mode == P2P) { 4179 ha->fw_options[2] |= BIT_3; 4180 ql_dbg(ql_dbg_disc, vha, 0x2100, 4181 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4182 __func__, ha->fw_options[2]); 4183 } 4184 4185 /* Update firmware options. */ 4186 qla2x00_set_fw_options(vha, ha->fw_options); 4187 } 4188 4189 void 4190 qla24xx_update_fw_options(scsi_qla_host_t *vha) 4191 { 4192 int rval; 4193 struct qla_hw_data *ha = vha->hw; 4194 4195 if (IS_P3P_TYPE(ha)) 4196 return; 4197 4198 /* Hold status IOCBs until ABTS response received. */ 4199 if (ql2xfwholdabts) 4200 ha->fw_options[3] |= BIT_12; 4201 4202 /* Set Retry FLOGI in case of P2P connection */ 4203 if (ha->operating_mode == P2P) { 4204 ha->fw_options[2] |= BIT_3; 4205 ql_dbg(ql_dbg_disc, vha, 0x2101, 4206 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4207 __func__, ha->fw_options[2]); 4208 } 4209 4210 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 4211 if (ql2xmvasynctoatio && !ha->flags.edif_enabled && 4212 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 4213 if (qla_tgt_mode_enabled(vha) || 4214 qla_dual_mode_enabled(vha)) 4215 ha->fw_options[2] |= BIT_11; 4216 else 4217 ha->fw_options[2] &= ~BIT_11; 4218 } 4219 4220 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4221 IS_QLA28XX(ha)) { 4222 /* 4223 * Tell FW to track each exchange to prevent 4224 * driver from using stale exchange. 4225 */ 4226 if (qla_tgt_mode_enabled(vha) || 4227 qla_dual_mode_enabled(vha)) 4228 ha->fw_options[2] |= BIT_4; 4229 else 4230 ha->fw_options[2] &= ~(BIT_4); 4231 4232 /* Reserve 1/2 of emergency exchanges for ELS.*/ 4233 if (qla2xuseresexchforels) 4234 ha->fw_options[2] |= BIT_8; 4235 else 4236 ha->fw_options[2] &= ~BIT_8; 4237 4238 /* 4239 * N2N: set Secure=1 for PLOGI ACC and 4240 * fw shal not send PRLI after PLOGI Acc 4241 */ 4242 if (ha->flags.edif_enabled && 4243 DBELL_ACTIVE(vha)) { 4244 ha->fw_options[3] |= BIT_15; 4245 ha->flags.n2n_fw_acc_sec = 1; 4246 } else { 4247 ha->fw_options[3] &= ~BIT_15; 4248 ha->flags.n2n_fw_acc_sec = 0; 4249 } 4250 } 4251 4252 if (ql2xrdpenable || ha->flags.scm_supported_f || 4253 ha->flags.edif_enabled) 4254 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB; 4255 4256 /* Enable Async 8130/8131 events -- transceiver insertion/removal */ 4257 if (IS_BPM_RANGE_CAPABLE(ha)) 4258 ha->fw_options[3] |= BIT_10; 4259 4260 ql_dbg(ql_dbg_init, vha, 0x00e8, 4261 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 4262 __func__, ha->fw_options[1], ha->fw_options[2], 4263 ha->fw_options[3], vha->host->active_mode); 4264 4265 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 4266 qla2x00_set_fw_options(vha, ha->fw_options); 4267 4268 /* Update Serial Link options. */ 4269 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 4270 return; 4271 4272 rval = qla2x00_set_serdes_params(vha, 4273 le16_to_cpu(ha->fw_seriallink_options24[1]), 4274 le16_to_cpu(ha->fw_seriallink_options24[2]), 4275 le16_to_cpu(ha->fw_seriallink_options24[3])); 4276 if (rval != QLA_SUCCESS) { 4277 ql_log(ql_log_warn, vha, 0x0104, 4278 "Unable to update Serial Link options (%x).\n", rval); 4279 } 4280 } 4281 4282 void 4283 qla2x00_config_rings(struct scsi_qla_host *vha) 4284 { 4285 struct qla_hw_data *ha = vha->hw; 4286 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4287 struct req_que *req = ha->req_q_map[0]; 4288 struct rsp_que *rsp = ha->rsp_q_map[0]; 4289 4290 /* Setup ring parameters in initialization control block. */ 4291 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 4292 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 4293 ha->init_cb->request_q_length = cpu_to_le16(req->length); 4294 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 4295 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 4296 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 4297 4298 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0); 4299 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0); 4300 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0); 4301 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0); 4302 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 4303 } 4304 4305 void 4306 qla24xx_config_rings(struct scsi_qla_host *vha) 4307 { 4308 struct qla_hw_data *ha = vha->hw; 4309 device_reg_t *reg = ISP_QUE_REG(ha, 0); 4310 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 4311 struct qla_msix_entry *msix; 4312 struct init_cb_24xx *icb; 4313 uint16_t rid = 0; 4314 struct req_que *req = ha->req_q_map[0]; 4315 struct rsp_que *rsp = ha->rsp_q_map[0]; 4316 4317 /* Setup ring parameters in initialization control block. */ 4318 icb = (struct init_cb_24xx *)ha->init_cb; 4319 icb->request_q_outpointer = cpu_to_le16(0); 4320 icb->response_q_inpointer = cpu_to_le16(0); 4321 icb->request_q_length = cpu_to_le16(req->length); 4322 icb->response_q_length = cpu_to_le16(rsp->length); 4323 put_unaligned_le64(req->dma, &icb->request_q_address); 4324 put_unaligned_le64(rsp->dma, &icb->response_q_address); 4325 4326 /* Setup ATIO queue dma pointers for target mode */ 4327 icb->atio_q_inpointer = cpu_to_le16(0); 4328 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 4329 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 4330 4331 if (IS_SHADOW_REG_CAPABLE(ha)) 4332 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 4333 4334 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4335 IS_QLA28XX(ha)) { 4336 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 4337 icb->rid = cpu_to_le16(rid); 4338 if (ha->flags.msix_enabled) { 4339 msix = &ha->msix_entries[1]; 4340 ql_dbg(ql_dbg_init, vha, 0x0019, 4341 "Registering vector 0x%x for base que.\n", 4342 msix->entry); 4343 icb->msix = cpu_to_le16(msix->entry); 4344 } 4345 /* Use alternate PCI bus number */ 4346 if (MSB(rid)) 4347 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 4348 /* Use alternate PCI devfn */ 4349 if (LSB(rid)) 4350 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 4351 4352 /* Use Disable MSIX Handshake mode for capable adapters */ 4353 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 4354 (ha->flags.msix_enabled)) { 4355 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 4356 ha->flags.disable_msix_handshake = 1; 4357 ql_dbg(ql_dbg_init, vha, 0x00fe, 4358 "MSIX Handshake Disable Mode turned on.\n"); 4359 } else { 4360 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 4361 } 4362 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4363 4364 wrt_reg_dword(®->isp25mq.req_q_in, 0); 4365 wrt_reg_dword(®->isp25mq.req_q_out, 0); 4366 wrt_reg_dword(®->isp25mq.rsp_q_in, 0); 4367 wrt_reg_dword(®->isp25mq.rsp_q_out, 0); 4368 } else { 4369 wrt_reg_dword(®->isp24.req_q_in, 0); 4370 wrt_reg_dword(®->isp24.req_q_out, 0); 4371 wrt_reg_dword(®->isp24.rsp_q_in, 0); 4372 wrt_reg_dword(®->isp24.rsp_q_out, 0); 4373 } 4374 4375 qlt_24xx_config_rings(vha); 4376 4377 /* If the user has configured the speed, set it here */ 4378 if (ha->set_data_rate) { 4379 ql_dbg(ql_dbg_init, vha, 0x00fd, 4380 "Speed set by user : %s Gbps \n", 4381 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4382 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13); 4383 } 4384 4385 /* PCI posting */ 4386 rd_reg_word(&ioreg->hccr); 4387 } 4388 4389 /** 4390 * qla2x00_init_rings() - Initializes firmware. 4391 * @vha: HA context 4392 * 4393 * Beginning of request ring has initialization control block already built 4394 * by nvram config routine. 4395 * 4396 * Returns 0 on success. 4397 */ 4398 int 4399 qla2x00_init_rings(scsi_qla_host_t *vha) 4400 { 4401 int rval; 4402 unsigned long flags = 0; 4403 int cnt, que; 4404 struct qla_hw_data *ha = vha->hw; 4405 struct req_que *req; 4406 struct rsp_que *rsp; 4407 struct mid_init_cb_24xx *mid_init_cb = 4408 (struct mid_init_cb_24xx *) ha->init_cb; 4409 4410 spin_lock_irqsave(&ha->hardware_lock, flags); 4411 4412 /* Clear outstanding commands array. */ 4413 for (que = 0; que < ha->max_req_queues; que++) { 4414 req = ha->req_q_map[que]; 4415 if (!req || !test_bit(que, ha->req_qid_map)) 4416 continue; 4417 req->out_ptr = (uint16_t *)(req->ring + req->length); 4418 *req->out_ptr = 0; 4419 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4420 req->outstanding_cmds[cnt] = NULL; 4421 4422 req->current_outstanding_cmd = 1; 4423 4424 /* Initialize firmware. */ 4425 req->ring_ptr = req->ring; 4426 req->ring_index = 0; 4427 req->cnt = req->length; 4428 } 4429 4430 for (que = 0; que < ha->max_rsp_queues; que++) { 4431 rsp = ha->rsp_q_map[que]; 4432 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4433 continue; 4434 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length); 4435 *rsp->in_ptr = 0; 4436 /* Initialize response queue entries */ 4437 if (IS_QLAFX00(ha)) 4438 qlafx00_init_response_q_entries(rsp); 4439 else 4440 qla2x00_init_response_q_entries(rsp); 4441 } 4442 4443 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4444 ha->tgt.atio_ring_index = 0; 4445 /* Initialize ATIO queue entries */ 4446 qlt_init_atio_q_entries(vha); 4447 4448 ha->isp_ops->config_rings(vha); 4449 4450 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4451 4452 if (IS_QLAFX00(ha)) { 4453 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4454 goto next_check; 4455 } 4456 4457 /* Update any ISP specific firmware options before initialization. */ 4458 ha->isp_ops->update_fw_options(vha); 4459 4460 ql_dbg(ql_dbg_init, vha, 0x00d1, 4461 "Issue init firmware FW opt 1-3= %08x %08x %08x.\n", 4462 le32_to_cpu(mid_init_cb->init_cb.firmware_options_1), 4463 le32_to_cpu(mid_init_cb->init_cb.firmware_options_2), 4464 le32_to_cpu(mid_init_cb->init_cb.firmware_options_3)); 4465 4466 if (ha->flags.npiv_supported) { 4467 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4468 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4469 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4470 } 4471 4472 if (IS_FWI2_CAPABLE(ha)) { 4473 mid_init_cb->options = cpu_to_le16(BIT_1); 4474 mid_init_cb->init_cb.execution_throttle = 4475 cpu_to_le16(ha->cur_fw_xcb_count); 4476 ha->flags.dport_enabled = 4477 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4478 BIT_7) != 0; 4479 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4480 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4481 /* FA-WWPN Status */ 4482 ha->flags.fawwpn_enabled = 4483 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4484 BIT_6) != 0; 4485 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4486 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4487 } 4488 4489 /* ELS pass through payload is limit by frame size. */ 4490 if (ha->flags.edif_enabled) 4491 mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD); 4492 4493 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4494 next_check: 4495 if (rval) { 4496 ql_log(ql_log_fatal, vha, 0x00d2, 4497 "Init Firmware **** FAILED ****.\n"); 4498 } else { 4499 ql_dbg(ql_dbg_init, vha, 0x00d3, 4500 "Init Firmware -- success.\n"); 4501 QLA_FW_STARTED(ha); 4502 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4503 } 4504 4505 return (rval); 4506 } 4507 4508 /** 4509 * qla2x00_fw_ready() - Waits for firmware ready. 4510 * @vha: HA context 4511 * 4512 * Returns 0 on success. 4513 */ 4514 static int 4515 qla2x00_fw_ready(scsi_qla_host_t *vha) 4516 { 4517 int rval; 4518 unsigned long wtime, mtime, cs84xx_time; 4519 uint16_t min_wait; /* Minimum wait time if loop is down */ 4520 uint16_t wait_time; /* Wait time if loop is coming ready */ 4521 uint16_t state[6]; 4522 struct qla_hw_data *ha = vha->hw; 4523 4524 if (IS_QLAFX00(vha->hw)) 4525 return qlafx00_fw_ready(vha); 4526 4527 /* Time to wait for loop down */ 4528 if (IS_P3P_TYPE(ha)) 4529 min_wait = 30; 4530 else 4531 min_wait = 20; 4532 4533 /* 4534 * Firmware should take at most one RATOV to login, plus 5 seconds for 4535 * our own processing. 4536 */ 4537 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4538 wait_time = min_wait; 4539 } 4540 4541 /* Min wait time if loop down */ 4542 mtime = jiffies + (min_wait * HZ); 4543 4544 /* wait time before firmware ready */ 4545 wtime = jiffies + (wait_time * HZ); 4546 4547 /* Wait for ISP to finish LIP */ 4548 if (!vha->flags.init_done) 4549 ql_log(ql_log_info, vha, 0x801e, 4550 "Waiting for LIP to complete.\n"); 4551 4552 do { 4553 memset(state, -1, sizeof(state)); 4554 rval = qla2x00_get_firmware_state(vha, state); 4555 if (rval == QLA_SUCCESS) { 4556 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4557 vha->device_flags &= ~DFLG_NO_CABLE; 4558 } 4559 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4560 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4561 "fw_state=%x 84xx=%x.\n", state[0], 4562 state[2]); 4563 if ((state[2] & FSTATE_LOGGED_IN) && 4564 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4565 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4566 "Sending verify iocb.\n"); 4567 4568 cs84xx_time = jiffies; 4569 rval = qla84xx_init_chip(vha); 4570 if (rval != QLA_SUCCESS) { 4571 ql_log(ql_log_warn, 4572 vha, 0x8007, 4573 "Init chip failed.\n"); 4574 break; 4575 } 4576 4577 /* Add time taken to initialize. */ 4578 cs84xx_time = jiffies - cs84xx_time; 4579 wtime += cs84xx_time; 4580 mtime += cs84xx_time; 4581 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4582 "Increasing wait time by %ld. " 4583 "New time %ld.\n", cs84xx_time, 4584 wtime); 4585 } 4586 } else if (state[0] == FSTATE_READY) { 4587 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4588 "F/W Ready - OK.\n"); 4589 4590 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4591 &ha->login_timeout, &ha->r_a_tov); 4592 4593 rval = QLA_SUCCESS; 4594 break; 4595 } 4596 4597 rval = QLA_FUNCTION_FAILED; 4598 4599 if (atomic_read(&vha->loop_down_timer) && 4600 state[0] != FSTATE_READY) { 4601 /* Loop down. Timeout on min_wait for states 4602 * other than Wait for Login. 4603 */ 4604 if (time_after_eq(jiffies, mtime)) { 4605 ql_log(ql_log_info, vha, 0x8038, 4606 "Cable is unplugged...\n"); 4607 4608 vha->device_flags |= DFLG_NO_CABLE; 4609 break; 4610 } 4611 } 4612 } else { 4613 /* Mailbox cmd failed. Timeout on min_wait. */ 4614 if (time_after_eq(jiffies, mtime) || 4615 ha->flags.isp82xx_fw_hung) 4616 break; 4617 } 4618 4619 if (time_after_eq(jiffies, wtime)) 4620 break; 4621 4622 /* Delay for a while */ 4623 msleep(500); 4624 } while (1); 4625 4626 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4627 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4628 state[1], state[2], state[3], state[4], state[5], jiffies); 4629 4630 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4631 ql_log(ql_log_warn, vha, 0x803b, 4632 "Firmware ready **** FAILED ****.\n"); 4633 } 4634 4635 return (rval); 4636 } 4637 4638 /* 4639 * qla2x00_configure_hba 4640 * Setup adapter context. 4641 * 4642 * Input: 4643 * ha = adapter state pointer. 4644 * 4645 * Returns: 4646 * 0 = success 4647 * 4648 * Context: 4649 * Kernel context. 4650 */ 4651 static int 4652 qla2x00_configure_hba(scsi_qla_host_t *vha) 4653 { 4654 int rval; 4655 uint16_t loop_id; 4656 uint16_t topo; 4657 uint16_t sw_cap; 4658 uint8_t al_pa; 4659 uint8_t area; 4660 uint8_t domain; 4661 char connect_type[22]; 4662 struct qla_hw_data *ha = vha->hw; 4663 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4664 port_id_t id; 4665 unsigned long flags; 4666 4667 /* Get host addresses. */ 4668 rval = qla2x00_get_adapter_id(vha, 4669 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4670 if (rval != QLA_SUCCESS) { 4671 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4672 IS_CNA_CAPABLE(ha) || 4673 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4674 ql_dbg(ql_dbg_disc, vha, 0x2008, 4675 "Loop is in a transition state.\n"); 4676 } else { 4677 ql_log(ql_log_warn, vha, 0x2009, 4678 "Unable to get host loop ID.\n"); 4679 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4680 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4681 ql_log(ql_log_warn, vha, 0x1151, 4682 "Doing link init.\n"); 4683 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4684 return rval; 4685 } 4686 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4687 } 4688 return (rval); 4689 } 4690 4691 if (topo == 4) { 4692 ql_log(ql_log_info, vha, 0x200a, 4693 "Cannot get topology - retrying.\n"); 4694 return (QLA_FUNCTION_FAILED); 4695 } 4696 4697 vha->loop_id = loop_id; 4698 4699 /* initialize */ 4700 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4701 ha->operating_mode = LOOP; 4702 4703 switch (topo) { 4704 case 0: 4705 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4706 ha->switch_cap = 0; 4707 ha->current_topology = ISP_CFG_NL; 4708 strcpy(connect_type, "(Loop)"); 4709 break; 4710 4711 case 1: 4712 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4713 ha->switch_cap = sw_cap; 4714 ha->current_topology = ISP_CFG_FL; 4715 strcpy(connect_type, "(FL_Port)"); 4716 break; 4717 4718 case 2: 4719 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4720 ha->switch_cap = 0; 4721 ha->operating_mode = P2P; 4722 ha->current_topology = ISP_CFG_N; 4723 strcpy(connect_type, "(N_Port-to-N_Port)"); 4724 break; 4725 4726 case 3: 4727 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4728 ha->switch_cap = sw_cap; 4729 ha->operating_mode = P2P; 4730 ha->current_topology = ISP_CFG_F; 4731 strcpy(connect_type, "(F_Port)"); 4732 break; 4733 4734 default: 4735 ql_dbg(ql_dbg_disc, vha, 0x200f, 4736 "HBA in unknown topology %x, using NL.\n", topo); 4737 ha->switch_cap = 0; 4738 ha->current_topology = ISP_CFG_NL; 4739 strcpy(connect_type, "(Loop)"); 4740 break; 4741 } 4742 4743 /* Save Host port and loop ID. */ 4744 /* byte order - Big Endian */ 4745 id.b.domain = domain; 4746 id.b.area = area; 4747 id.b.al_pa = al_pa; 4748 id.b.rsvd_1 = 0; 4749 spin_lock_irqsave(&ha->hardware_lock, flags); 4750 if (vha->hw->flags.edif_enabled) { 4751 if (topo != 2) 4752 qlt_update_host_map(vha, id); 4753 } else if (!(topo == 2 && ha->flags.n2n_bigger)) 4754 qlt_update_host_map(vha, id); 4755 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4756 4757 if (!vha->flags.init_done) 4758 ql_log(ql_log_info, vha, 0x2010, 4759 "Topology - %s, Host Loop address 0x%x.\n", 4760 connect_type, vha->loop_id); 4761 4762 return(rval); 4763 } 4764 4765 inline void 4766 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4767 const char *def) 4768 { 4769 char *st, *en; 4770 uint16_t index; 4771 uint64_t zero[2] = { 0 }; 4772 struct qla_hw_data *ha = vha->hw; 4773 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4774 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4775 4776 if (len > sizeof(zero)) 4777 len = sizeof(zero); 4778 if (memcmp(model, &zero, len) != 0) { 4779 memcpy(ha->model_number, model, len); 4780 st = en = ha->model_number; 4781 en += len - 1; 4782 while (en > st) { 4783 if (*en != 0x20 && *en != 0x00) 4784 break; 4785 *en-- = '\0'; 4786 } 4787 4788 index = (ha->pdev->subsystem_device & 0xff); 4789 if (use_tbl && 4790 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4791 index < QLA_MODEL_NAMES) 4792 strlcpy(ha->model_desc, 4793 qla2x00_model_name[index * 2 + 1], 4794 sizeof(ha->model_desc)); 4795 } else { 4796 index = (ha->pdev->subsystem_device & 0xff); 4797 if (use_tbl && 4798 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4799 index < QLA_MODEL_NAMES) { 4800 strlcpy(ha->model_number, 4801 qla2x00_model_name[index * 2], 4802 sizeof(ha->model_number)); 4803 strlcpy(ha->model_desc, 4804 qla2x00_model_name[index * 2 + 1], 4805 sizeof(ha->model_desc)); 4806 } else { 4807 strlcpy(ha->model_number, def, 4808 sizeof(ha->model_number)); 4809 } 4810 } 4811 if (IS_FWI2_CAPABLE(ha)) 4812 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4813 sizeof(ha->model_desc)); 4814 } 4815 4816 /* On sparc systems, obtain port and node WWN from firmware 4817 * properties. 4818 */ 4819 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4820 { 4821 #ifdef CONFIG_SPARC 4822 struct qla_hw_data *ha = vha->hw; 4823 struct pci_dev *pdev = ha->pdev; 4824 struct device_node *dp = pci_device_to_OF_node(pdev); 4825 const u8 *val; 4826 int len; 4827 4828 val = of_get_property(dp, "port-wwn", &len); 4829 if (val && len >= WWN_SIZE) 4830 memcpy(nv->port_name, val, WWN_SIZE); 4831 4832 val = of_get_property(dp, "node-wwn", &len); 4833 if (val && len >= WWN_SIZE) 4834 memcpy(nv->node_name, val, WWN_SIZE); 4835 #endif 4836 } 4837 4838 /* 4839 * NVRAM configuration for ISP 2xxx 4840 * 4841 * Input: 4842 * ha = adapter block pointer. 4843 * 4844 * Output: 4845 * initialization control block in response_ring 4846 * host adapters parameters in host adapter block 4847 * 4848 * Returns: 4849 * 0 = success. 4850 */ 4851 int 4852 qla2x00_nvram_config(scsi_qla_host_t *vha) 4853 { 4854 int rval; 4855 uint8_t chksum = 0; 4856 uint16_t cnt; 4857 uint8_t *dptr1, *dptr2; 4858 struct qla_hw_data *ha = vha->hw; 4859 init_cb_t *icb = ha->init_cb; 4860 nvram_t *nv = ha->nvram; 4861 uint8_t *ptr = ha->nvram; 4862 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4863 4864 rval = QLA_SUCCESS; 4865 4866 /* Determine NVRAM starting address. */ 4867 ha->nvram_size = sizeof(*nv); 4868 ha->nvram_base = 0; 4869 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4870 if ((rd_reg_word(®->ctrl_status) >> 14) == 1) 4871 ha->nvram_base = 0x80; 4872 4873 /* Get NVRAM data and calculate checksum. */ 4874 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4875 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4876 chksum += *ptr++; 4877 4878 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4879 "Contents of NVRAM.\n"); 4880 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4881 nv, ha->nvram_size); 4882 4883 /* Bad NVRAM data, set defaults parameters. */ 4884 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 4885 nv->nvram_version < 1) { 4886 /* Reset NVRAM data. */ 4887 ql_log(ql_log_warn, vha, 0x0064, 4888 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 4889 chksum, nv->id, nv->nvram_version); 4890 ql_log(ql_log_warn, vha, 0x0065, 4891 "Falling back to " 4892 "functioning (yet invalid -- WWPN) defaults.\n"); 4893 4894 /* 4895 * Set default initialization control block. 4896 */ 4897 memset(nv, 0, ha->nvram_size); 4898 nv->parameter_block_version = ICB_VERSION; 4899 4900 if (IS_QLA23XX(ha)) { 4901 nv->firmware_options[0] = BIT_2 | BIT_1; 4902 nv->firmware_options[1] = BIT_7 | BIT_5; 4903 nv->add_firmware_options[0] = BIT_5; 4904 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4905 nv->frame_payload_size = cpu_to_le16(2048); 4906 nv->special_options[1] = BIT_7; 4907 } else if (IS_QLA2200(ha)) { 4908 nv->firmware_options[0] = BIT_2 | BIT_1; 4909 nv->firmware_options[1] = BIT_7 | BIT_5; 4910 nv->add_firmware_options[0] = BIT_5; 4911 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4912 nv->frame_payload_size = cpu_to_le16(1024); 4913 } else if (IS_QLA2100(ha)) { 4914 nv->firmware_options[0] = BIT_3 | BIT_1; 4915 nv->firmware_options[1] = BIT_5; 4916 nv->frame_payload_size = cpu_to_le16(1024); 4917 } 4918 4919 nv->max_iocb_allocation = cpu_to_le16(256); 4920 nv->execution_throttle = cpu_to_le16(16); 4921 nv->retry_count = 8; 4922 nv->retry_delay = 1; 4923 4924 nv->port_name[0] = 33; 4925 nv->port_name[3] = 224; 4926 nv->port_name[4] = 139; 4927 4928 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4929 4930 nv->login_timeout = 4; 4931 4932 /* 4933 * Set default host adapter parameters 4934 */ 4935 nv->host_p[1] = BIT_2; 4936 nv->reset_delay = 5; 4937 nv->port_down_retry_count = 8; 4938 nv->max_luns_per_target = cpu_to_le16(8); 4939 nv->link_down_timeout = 60; 4940 4941 rval = 1; 4942 } 4943 4944 /* Reset Initialization control block */ 4945 memset(icb, 0, ha->init_cb_size); 4946 4947 /* 4948 * Setup driver NVRAM options. 4949 */ 4950 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4951 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4952 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4953 nv->firmware_options[1] &= ~BIT_4; 4954 4955 if (IS_QLA23XX(ha)) { 4956 nv->firmware_options[0] |= BIT_2; 4957 nv->firmware_options[0] &= ~BIT_3; 4958 nv->special_options[0] &= ~BIT_6; 4959 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4960 4961 if (IS_QLA2300(ha)) { 4962 if (ha->fb_rev == FPM_2310) { 4963 strcpy(ha->model_number, "QLA2310"); 4964 } else { 4965 strcpy(ha->model_number, "QLA2300"); 4966 } 4967 } else { 4968 qla2x00_set_model_info(vha, nv->model_number, 4969 sizeof(nv->model_number), "QLA23xx"); 4970 } 4971 } else if (IS_QLA2200(ha)) { 4972 nv->firmware_options[0] |= BIT_2; 4973 /* 4974 * 'Point-to-point preferred, else loop' is not a safe 4975 * connection mode setting. 4976 */ 4977 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4978 (BIT_5 | BIT_4)) { 4979 /* Force 'loop preferred, else point-to-point'. */ 4980 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4981 nv->add_firmware_options[0] |= BIT_5; 4982 } 4983 strcpy(ha->model_number, "QLA22xx"); 4984 } else /*if (IS_QLA2100(ha))*/ { 4985 strcpy(ha->model_number, "QLA2100"); 4986 } 4987 4988 /* 4989 * Copy over NVRAM RISC parameter block to initialization control block. 4990 */ 4991 dptr1 = (uint8_t *)icb; 4992 dptr2 = (uint8_t *)&nv->parameter_block_version; 4993 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4994 while (cnt--) 4995 *dptr1++ = *dptr2++; 4996 4997 /* Copy 2nd half. */ 4998 dptr1 = (uint8_t *)icb->add_firmware_options; 4999 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 5000 while (cnt--) 5001 *dptr1++ = *dptr2++; 5002 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 5003 /* Use alternate WWN? */ 5004 if (nv->host_p[1] & BIT_7) { 5005 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5006 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5007 } 5008 5009 /* Prepare nodename */ 5010 if ((icb->firmware_options[1] & BIT_6) == 0) { 5011 /* 5012 * Firmware will apply the following mask if the nodename was 5013 * not provided. 5014 */ 5015 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5016 icb->node_name[0] &= 0xF0; 5017 } 5018 5019 /* 5020 * Set host adapter parameters. 5021 */ 5022 5023 /* 5024 * BIT_7 in the host-parameters section allows for modification to 5025 * internal driver logging. 5026 */ 5027 if (nv->host_p[0] & BIT_7) 5028 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 5029 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 5030 /* Always load RISC code on non ISP2[12]00 chips. */ 5031 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 5032 ha->flags.disable_risc_code_load = 0; 5033 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 5034 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 5035 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 5036 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 5037 ha->flags.disable_serdes = 0; 5038 5039 ha->operating_mode = 5040 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 5041 5042 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 5043 sizeof(ha->fw_seriallink_options)); 5044 5045 /* save HBA serial number */ 5046 ha->serial0 = icb->port_name[5]; 5047 ha->serial1 = icb->port_name[6]; 5048 ha->serial2 = icb->port_name[7]; 5049 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5050 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5051 5052 icb->execution_throttle = cpu_to_le16(0xFFFF); 5053 5054 ha->retry_count = nv->retry_count; 5055 5056 /* Set minimum login_timeout to 4 seconds. */ 5057 if (nv->login_timeout != ql2xlogintimeout) 5058 nv->login_timeout = ql2xlogintimeout; 5059 if (nv->login_timeout < 4) 5060 nv->login_timeout = 4; 5061 ha->login_timeout = nv->login_timeout; 5062 5063 /* Set minimum RATOV to 100 tenths of a second. */ 5064 ha->r_a_tov = 100; 5065 5066 ha->loop_reset_delay = nv->reset_delay; 5067 5068 /* Link Down Timeout = 0: 5069 * 5070 * When Port Down timer expires we will start returning 5071 * I/O's to OS with "DID_NO_CONNECT". 5072 * 5073 * Link Down Timeout != 0: 5074 * 5075 * The driver waits for the link to come up after link down 5076 * before returning I/Os to OS with "DID_NO_CONNECT". 5077 */ 5078 if (nv->link_down_timeout == 0) { 5079 ha->loop_down_abort_time = 5080 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5081 } else { 5082 ha->link_down_timeout = nv->link_down_timeout; 5083 ha->loop_down_abort_time = 5084 (LOOP_DOWN_TIME - ha->link_down_timeout); 5085 } 5086 5087 /* 5088 * Need enough time to try and get the port back. 5089 */ 5090 ha->port_down_retry_count = nv->port_down_retry_count; 5091 if (qlport_down_retry) 5092 ha->port_down_retry_count = qlport_down_retry; 5093 /* Set login_retry_count */ 5094 ha->login_retry_count = nv->retry_count; 5095 if (ha->port_down_retry_count == nv->port_down_retry_count && 5096 ha->port_down_retry_count > 3) 5097 ha->login_retry_count = ha->port_down_retry_count; 5098 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5099 ha->login_retry_count = ha->port_down_retry_count; 5100 if (ql2xloginretrycount) 5101 ha->login_retry_count = ql2xloginretrycount; 5102 5103 icb->lun_enables = cpu_to_le16(0); 5104 icb->command_resource_count = 0; 5105 icb->immediate_notify_resource_count = 0; 5106 icb->timeout = cpu_to_le16(0); 5107 5108 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 5109 /* Enable RIO */ 5110 icb->firmware_options[0] &= ~BIT_3; 5111 icb->add_firmware_options[0] &= 5112 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5113 icb->add_firmware_options[0] |= BIT_2; 5114 icb->response_accumulation_timer = 3; 5115 icb->interrupt_delay_timer = 5; 5116 5117 vha->flags.process_response_queue = 1; 5118 } else { 5119 /* Enable ZIO. */ 5120 if (!vha->flags.init_done) { 5121 ha->zio_mode = icb->add_firmware_options[0] & 5122 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5123 ha->zio_timer = icb->interrupt_delay_timer ? 5124 icb->interrupt_delay_timer : 2; 5125 } 5126 icb->add_firmware_options[0] &= 5127 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5128 vha->flags.process_response_queue = 0; 5129 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5130 ha->zio_mode = QLA_ZIO_MODE_6; 5131 5132 ql_log(ql_log_info, vha, 0x0068, 5133 "ZIO mode %d enabled; timer delay (%d us).\n", 5134 ha->zio_mode, ha->zio_timer * 100); 5135 5136 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 5137 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 5138 vha->flags.process_response_queue = 1; 5139 } 5140 } 5141 5142 if (rval) { 5143 ql_log(ql_log_warn, vha, 0x0069, 5144 "NVRAM configuration failed.\n"); 5145 } 5146 return (rval); 5147 } 5148 5149 static void 5150 qla2x00_rport_del(void *data) 5151 { 5152 fc_port_t *fcport = data; 5153 struct fc_rport *rport; 5154 unsigned long flags; 5155 5156 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5157 rport = fcport->drport ? fcport->drport : fcport->rport; 5158 fcport->drport = NULL; 5159 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5160 if (rport) { 5161 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 5162 "%s %8phN. rport %p roles %x\n", 5163 __func__, fcport->port_name, rport, 5164 rport->roles); 5165 5166 fc_remote_port_delete(rport); 5167 } 5168 } 5169 5170 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 5171 { 5172 int old_state; 5173 5174 old_state = atomic_read(&fcport->state); 5175 atomic_set(&fcport->state, state); 5176 5177 /* Don't print state transitions during initial allocation of fcport */ 5178 if (old_state && old_state != state) { 5179 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 5180 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 5181 fcport->port_name, port_state_str[old_state], 5182 port_state_str[state], fcport->d_id.b.domain, 5183 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5184 } 5185 } 5186 5187 /** 5188 * qla2x00_alloc_fcport() - Allocate a generic fcport. 5189 * @vha: HA context 5190 * @flags: allocation flags 5191 * 5192 * Returns a pointer to the allocated fcport, or NULL, if none available. 5193 */ 5194 fc_port_t * 5195 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 5196 { 5197 fc_port_t *fcport; 5198 5199 fcport = kzalloc(sizeof(fc_port_t), flags); 5200 if (!fcport) 5201 return NULL; 5202 5203 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 5204 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 5205 flags); 5206 if (!fcport->ct_desc.ct_sns) { 5207 ql_log(ql_log_warn, vha, 0xd049, 5208 "Failed to allocate ct_sns request.\n"); 5209 kfree(fcport); 5210 return NULL; 5211 } 5212 5213 /* Setup fcport template structure. */ 5214 fcport->vha = vha; 5215 fcport->port_type = FCT_UNKNOWN; 5216 fcport->loop_id = FC_NO_LOOP_ID; 5217 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 5218 fcport->supported_classes = FC_COS_UNSPECIFIED; 5219 fcport->fp_speed = PORT_SPEED_UNKNOWN; 5220 5221 fcport->disc_state = DSC_DELETED; 5222 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 5223 fcport->deleted = QLA_SESS_DELETED; 5224 fcport->login_retry = vha->hw->login_retry_count; 5225 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 5226 fcport->logout_on_delete = 1; 5227 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5228 fcport->tgt_short_link_down_cnt = 0; 5229 fcport->dev_loss_tmo = 0; 5230 5231 if (!fcport->ct_desc.ct_sns) { 5232 ql_log(ql_log_warn, vha, 0xd049, 5233 "Failed to allocate ct_sns request.\n"); 5234 kfree(fcport); 5235 return NULL; 5236 } 5237 5238 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 5239 INIT_WORK(&fcport->free_work, qlt_free_session_done); 5240 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 5241 INIT_LIST_HEAD(&fcport->gnl_entry); 5242 INIT_LIST_HEAD(&fcport->list); 5243 5244 INIT_LIST_HEAD(&fcport->sess_cmd_list); 5245 spin_lock_init(&fcport->sess_cmd_lock); 5246 5247 spin_lock_init(&fcport->edif.sa_list_lock); 5248 INIT_LIST_HEAD(&fcport->edif.tx_sa_list); 5249 INIT_LIST_HEAD(&fcport->edif.rx_sa_list); 5250 5251 if (vha->e_dbell.db_flags == EDB_ACTIVE) 5252 fcport->edif.app_started = 1; 5253 5254 spin_lock_init(&fcport->edif.indx_list_lock); 5255 INIT_LIST_HEAD(&fcport->edif.edif_indx_list); 5256 5257 return fcport; 5258 } 5259 5260 void 5261 qla2x00_free_fcport(fc_port_t *fcport) 5262 { 5263 if (fcport->ct_desc.ct_sns) { 5264 dma_free_coherent(&fcport->vha->hw->pdev->dev, 5265 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 5266 fcport->ct_desc.ct_sns_dma); 5267 5268 fcport->ct_desc.ct_sns = NULL; 5269 } 5270 5271 qla_edif_flush_sa_ctl_lists(fcport); 5272 list_del(&fcport->list); 5273 qla2x00_clear_loop_id(fcport); 5274 5275 qla_edif_list_del(fcport); 5276 5277 kfree(fcport); 5278 } 5279 5280 static void qla_get_login_template(scsi_qla_host_t *vha) 5281 { 5282 struct qla_hw_data *ha = vha->hw; 5283 int rval; 5284 u32 *bp, sz; 5285 __be32 *q; 5286 5287 memset(ha->init_cb, 0, ha->init_cb_size); 5288 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size); 5289 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 5290 ha->init_cb, sz); 5291 if (rval != QLA_SUCCESS) { 5292 ql_dbg(ql_dbg_init, vha, 0x00d1, 5293 "PLOGI ELS param read fail.\n"); 5294 return; 5295 } 5296 q = (__be32 *)&ha->plogi_els_payld.fl_csp; 5297 5298 bp = (uint32_t *)ha->init_cb; 5299 cpu_to_be32_array(q, bp, sz / 4); 5300 ha->flags.plogi_template_valid = 1; 5301 } 5302 5303 /* 5304 * qla2x00_configure_loop 5305 * Updates Fibre Channel Device Database with what is actually on loop. 5306 * 5307 * Input: 5308 * ha = adapter block pointer. 5309 * 5310 * Returns: 5311 * 0 = success. 5312 * 1 = error. 5313 * 2 = database was full and device was not configured. 5314 */ 5315 static int 5316 qla2x00_configure_loop(scsi_qla_host_t *vha) 5317 { 5318 int rval; 5319 unsigned long flags, save_flags; 5320 struct qla_hw_data *ha = vha->hw; 5321 5322 rval = QLA_SUCCESS; 5323 5324 /* Get Initiator ID */ 5325 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 5326 rval = qla2x00_configure_hba(vha); 5327 if (rval != QLA_SUCCESS) { 5328 ql_dbg(ql_dbg_disc, vha, 0x2013, 5329 "Unable to configure HBA.\n"); 5330 return (rval); 5331 } 5332 } 5333 5334 save_flags = flags = vha->dpc_flags; 5335 ql_dbg(ql_dbg_disc, vha, 0x2014, 5336 "Configure loop -- dpc flags = 0x%lx.\n", flags); 5337 5338 /* 5339 * If we have both an RSCN and PORT UPDATE pending then handle them 5340 * both at the same time. 5341 */ 5342 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5343 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 5344 5345 qla2x00_get_data_rate(vha); 5346 qla_get_login_template(vha); 5347 5348 /* Determine what we need to do */ 5349 if ((ha->current_topology == ISP_CFG_FL || 5350 ha->current_topology == ISP_CFG_F) && 5351 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 5352 5353 set_bit(RSCN_UPDATE, &flags); 5354 clear_bit(LOCAL_LOOP_UPDATE, &flags); 5355 5356 } else if (ha->current_topology == ISP_CFG_NL || 5357 ha->current_topology == ISP_CFG_N) { 5358 clear_bit(RSCN_UPDATE, &flags); 5359 set_bit(LOCAL_LOOP_UPDATE, &flags); 5360 } else if (!vha->flags.online || 5361 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 5362 set_bit(RSCN_UPDATE, &flags); 5363 set_bit(LOCAL_LOOP_UPDATE, &flags); 5364 } 5365 5366 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 5367 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5368 ql_dbg(ql_dbg_disc, vha, 0x2015, 5369 "Loop resync needed, failing.\n"); 5370 rval = QLA_FUNCTION_FAILED; 5371 } else 5372 rval = qla2x00_configure_local_loop(vha); 5373 } 5374 5375 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 5376 if (LOOP_TRANSITION(vha)) { 5377 ql_dbg(ql_dbg_disc, vha, 0x2099, 5378 "Needs RSCN update and loop transition.\n"); 5379 rval = QLA_FUNCTION_FAILED; 5380 } 5381 else 5382 rval = qla2x00_configure_fabric(vha); 5383 } 5384 5385 if (rval == QLA_SUCCESS) { 5386 if (atomic_read(&vha->loop_down_timer) || 5387 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5388 rval = QLA_FUNCTION_FAILED; 5389 } else { 5390 atomic_set(&vha->loop_state, LOOP_READY); 5391 ql_dbg(ql_dbg_disc, vha, 0x2069, 5392 "LOOP READY.\n"); 5393 ha->flags.fw_init_done = 1; 5394 5395 /* 5396 * use link up to wake up app to get ready for 5397 * authentication. 5398 */ 5399 if (ha->flags.edif_enabled && DBELL_INACTIVE(vha)) 5400 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, 5401 ha->link_data_rate); 5402 5403 /* 5404 * Process any ATIO queue entries that came in 5405 * while we weren't online. 5406 */ 5407 if (qla_tgt_mode_enabled(vha) || 5408 qla_dual_mode_enabled(vha)) { 5409 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 5410 qlt_24xx_process_atio_queue(vha, 0); 5411 spin_unlock_irqrestore(&ha->tgt.atio_lock, 5412 flags); 5413 } 5414 } 5415 } 5416 5417 if (rval) { 5418 ql_dbg(ql_dbg_disc, vha, 0x206a, 5419 "%s *** FAILED ***.\n", __func__); 5420 } else { 5421 ql_dbg(ql_dbg_disc, vha, 0x206b, 5422 "%s: exiting normally. local port wwpn %8phN id %06x)\n", 5423 __func__, vha->port_name, vha->d_id.b24); 5424 } 5425 5426 /* Restore state if a resync event occurred during processing */ 5427 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5428 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5429 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5430 if (test_bit(RSCN_UPDATE, &save_flags)) { 5431 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5432 } 5433 } 5434 5435 return (rval); 5436 } 5437 5438 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha) 5439 { 5440 unsigned long flags; 5441 fc_port_t *fcport; 5442 5443 ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__); 5444 5445 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) 5446 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 5447 5448 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5449 if (fcport->n2n_flag) { 5450 qla24xx_fcport_handle_login(vha, fcport); 5451 return QLA_SUCCESS; 5452 } 5453 } 5454 5455 spin_lock_irqsave(&vha->work_lock, flags); 5456 vha->scan.scan_retry++; 5457 spin_unlock_irqrestore(&vha->work_lock, flags); 5458 5459 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5460 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5461 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5462 } 5463 return QLA_FUNCTION_FAILED; 5464 } 5465 5466 /* 5467 * qla2x00_configure_local_loop 5468 * Updates Fibre Channel Device Database with local loop devices. 5469 * 5470 * Input: 5471 * ha = adapter block pointer. 5472 * 5473 * Returns: 5474 * 0 = success. 5475 */ 5476 static int 5477 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5478 { 5479 int rval, rval2; 5480 int found_devs; 5481 int found; 5482 fc_port_t *fcport, *new_fcport; 5483 uint16_t index; 5484 uint16_t entries; 5485 struct gid_list_info *gid; 5486 uint16_t loop_id; 5487 uint8_t domain, area, al_pa; 5488 struct qla_hw_data *ha = vha->hw; 5489 unsigned long flags; 5490 5491 /* Inititae N2N login. */ 5492 if (N2N_TOPO(ha)) 5493 return qla2x00_configure_n2n_loop(vha); 5494 5495 found_devs = 0; 5496 new_fcport = NULL; 5497 entries = MAX_FIBRE_DEVICES_LOOP; 5498 5499 /* Get list of logged in devices. */ 5500 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5501 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5502 &entries); 5503 if (rval != QLA_SUCCESS) 5504 goto err; 5505 5506 ql_dbg(ql_dbg_disc, vha, 0x2011, 5507 "Entries in ID list (%d).\n", entries); 5508 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5509 ha->gid_list, entries * sizeof(*ha->gid_list)); 5510 5511 if (entries == 0) { 5512 spin_lock_irqsave(&vha->work_lock, flags); 5513 vha->scan.scan_retry++; 5514 spin_unlock_irqrestore(&vha->work_lock, flags); 5515 5516 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5517 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5518 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5519 } 5520 } else { 5521 vha->scan.scan_retry = 0; 5522 } 5523 5524 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5525 fcport->scan_state = QLA_FCPORT_SCAN; 5526 } 5527 5528 /* Allocate temporary fcport for any new fcports discovered. */ 5529 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5530 if (new_fcport == NULL) { 5531 ql_log(ql_log_warn, vha, 0x2012, 5532 "Memory allocation failed for fcport.\n"); 5533 rval = QLA_MEMORY_ALLOC_FAILED; 5534 goto err; 5535 } 5536 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5537 5538 /* Add devices to port list. */ 5539 gid = ha->gid_list; 5540 for (index = 0; index < entries; index++) { 5541 domain = gid->domain; 5542 area = gid->area; 5543 al_pa = gid->al_pa; 5544 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5545 loop_id = gid->loop_id_2100; 5546 else 5547 loop_id = le16_to_cpu(gid->loop_id); 5548 gid = (void *)gid + ha->gid_list_info_size; 5549 5550 /* Bypass reserved domain fields. */ 5551 if ((domain & 0xf0) == 0xf0) 5552 continue; 5553 5554 /* Bypass if not same domain and area of adapter. */ 5555 if (area && domain && ((area != vha->d_id.b.area) || 5556 (domain != vha->d_id.b.domain)) && 5557 (ha->current_topology == ISP_CFG_NL)) 5558 continue; 5559 5560 5561 /* Bypass invalid local loop ID. */ 5562 if (loop_id > LAST_LOCAL_LOOP_ID) 5563 continue; 5564 5565 memset(new_fcport->port_name, 0, WWN_SIZE); 5566 5567 /* Fill in member data. */ 5568 new_fcport->d_id.b.domain = domain; 5569 new_fcport->d_id.b.area = area; 5570 new_fcport->d_id.b.al_pa = al_pa; 5571 new_fcport->loop_id = loop_id; 5572 new_fcport->scan_state = QLA_FCPORT_FOUND; 5573 5574 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5575 if (rval2 != QLA_SUCCESS) { 5576 ql_dbg(ql_dbg_disc, vha, 0x2097, 5577 "Failed to retrieve fcport information " 5578 "-- get_port_database=%x, loop_id=0x%04x.\n", 5579 rval2, new_fcport->loop_id); 5580 /* Skip retry if N2N */ 5581 if (ha->current_topology != ISP_CFG_N) { 5582 ql_dbg(ql_dbg_disc, vha, 0x2105, 5583 "Scheduling resync.\n"); 5584 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5585 continue; 5586 } 5587 } 5588 5589 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5590 /* Check for matching device in port list. */ 5591 found = 0; 5592 fcport = NULL; 5593 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5594 if (memcmp(new_fcport->port_name, fcport->port_name, 5595 WWN_SIZE)) 5596 continue; 5597 5598 fcport->flags &= ~FCF_FABRIC_DEVICE; 5599 fcport->loop_id = new_fcport->loop_id; 5600 fcport->port_type = new_fcport->port_type; 5601 fcport->d_id.b24 = new_fcport->d_id.b24; 5602 memcpy(fcport->node_name, new_fcport->node_name, 5603 WWN_SIZE); 5604 fcport->scan_state = QLA_FCPORT_FOUND; 5605 found++; 5606 break; 5607 } 5608 5609 if (!found) { 5610 /* New device, add to fcports list. */ 5611 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5612 5613 /* Allocate a new replacement fcport. */ 5614 fcport = new_fcport; 5615 5616 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5617 5618 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5619 5620 if (new_fcport == NULL) { 5621 ql_log(ql_log_warn, vha, 0xd031, 5622 "Failed to allocate memory for fcport.\n"); 5623 rval = QLA_MEMORY_ALLOC_FAILED; 5624 goto err; 5625 } 5626 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5627 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5628 } 5629 5630 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5631 5632 /* Base iIDMA settings on HBA port speed. */ 5633 fcport->fp_speed = ha->link_data_rate; 5634 5635 found_devs++; 5636 } 5637 5638 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5639 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5640 break; 5641 5642 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5643 if ((qla_dual_mode_enabled(vha) || 5644 qla_ini_mode_enabled(vha)) && 5645 atomic_read(&fcport->state) == FCS_ONLINE) { 5646 qla2x00_mark_device_lost(vha, fcport, 5647 ql2xplogiabsentdevice); 5648 if (fcport->loop_id != FC_NO_LOOP_ID && 5649 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5650 fcport->port_type != FCT_INITIATOR && 5651 fcport->port_type != FCT_BROADCAST) { 5652 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5653 "%s %d %8phC post del sess\n", 5654 __func__, __LINE__, 5655 fcport->port_name); 5656 5657 qlt_schedule_sess_for_deletion(fcport); 5658 continue; 5659 } 5660 } 5661 } 5662 5663 if (fcport->scan_state == QLA_FCPORT_FOUND) 5664 qla24xx_fcport_handle_login(vha, fcport); 5665 } 5666 5667 qla2x00_free_fcport(new_fcport); 5668 5669 return rval; 5670 5671 err: 5672 ql_dbg(ql_dbg_disc, vha, 0x2098, 5673 "Configure local loop error exit: rval=%x.\n", rval); 5674 return rval; 5675 } 5676 5677 static void 5678 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5679 { 5680 int rval; 5681 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5682 struct qla_hw_data *ha = vha->hw; 5683 5684 if (!IS_IIDMA_CAPABLE(ha)) 5685 return; 5686 5687 if (atomic_read(&fcport->state) != FCS_ONLINE) 5688 return; 5689 5690 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5691 fcport->fp_speed > ha->link_data_rate || 5692 !ha->flags.gpsc_supported) 5693 return; 5694 5695 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5696 mb); 5697 if (rval != QLA_SUCCESS) { 5698 ql_dbg(ql_dbg_disc, vha, 0x2004, 5699 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5700 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5701 } else { 5702 ql_dbg(ql_dbg_disc, vha, 0x2005, 5703 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5704 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5705 fcport->fp_speed, fcport->port_name); 5706 } 5707 } 5708 5709 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5710 { 5711 qla2x00_iidma_fcport(vha, fcport); 5712 qla24xx_update_fcport_fcp_prio(vha, fcport); 5713 } 5714 5715 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5716 { 5717 struct qla_work_evt *e; 5718 5719 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5720 if (!e) 5721 return QLA_FUNCTION_FAILED; 5722 5723 e->u.fcport.fcport = fcport; 5724 return qla2x00_post_work(vha, e); 5725 } 5726 5727 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5728 static void 5729 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5730 { 5731 struct fc_rport_identifiers rport_ids; 5732 struct fc_rport *rport; 5733 unsigned long flags; 5734 5735 if (atomic_read(&fcport->state) == FCS_ONLINE) 5736 return; 5737 5738 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5739 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5740 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5741 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5742 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5743 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5744 if (!rport) { 5745 ql_log(ql_log_warn, vha, 0x2006, 5746 "Unable to allocate fc remote port.\n"); 5747 return; 5748 } 5749 5750 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5751 *((fc_port_t **)rport->dd_data) = fcport; 5752 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5753 fcport->dev_loss_tmo = rport->dev_loss_tmo; 5754 5755 rport->supported_classes = fcport->supported_classes; 5756 5757 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 5758 if (fcport->port_type == FCT_INITIATOR) 5759 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 5760 if (fcport->port_type == FCT_TARGET) 5761 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 5762 if (fcport->port_type & FCT_NVME_INITIATOR) 5763 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 5764 if (fcport->port_type & FCT_NVME_TARGET) 5765 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 5766 if (fcport->port_type & FCT_NVME_DISCOVERY) 5767 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 5768 5769 fc_remote_port_rolechg(rport, rport_ids.roles); 5770 5771 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5772 "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n", 5773 __func__, fcport->port_name, vha->host_no, 5774 rport->scsi_target_id, rport, 5775 (fcport->port_type == FCT_TARGET) ? "tgt" : 5776 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5777 } 5778 5779 /* 5780 * qla2x00_update_fcport 5781 * Updates device on list. 5782 * 5783 * Input: 5784 * ha = adapter block pointer. 5785 * fcport = port structure pointer. 5786 * 5787 * Return: 5788 * 0 - Success 5789 * BIT_0 - error 5790 * 5791 * Context: 5792 * Kernel context. 5793 */ 5794 void 5795 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5796 { 5797 if (IS_SW_RESV_ADDR(fcport->d_id)) 5798 return; 5799 5800 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5801 __func__, fcport->port_name); 5802 5803 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT); 5804 fcport->login_retry = vha->hw->login_retry_count; 5805 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5806 fcport->deleted = 0; 5807 if (vha->hw->current_topology == ISP_CFG_NL) 5808 fcport->logout_on_delete = 0; 5809 else 5810 fcport->logout_on_delete = 1; 5811 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5812 5813 if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) { 5814 fcport->tgt_short_link_down_cnt++; 5815 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5816 } 5817 5818 switch (vha->hw->current_topology) { 5819 case ISP_CFG_N: 5820 case ISP_CFG_NL: 5821 fcport->keep_nport_handle = 1; 5822 break; 5823 default: 5824 break; 5825 } 5826 5827 qla2x00_iidma_fcport(vha, fcport); 5828 5829 qla2x00_dfs_create_rport(vha, fcport); 5830 5831 if (NVME_TARGET(vha->hw, fcport)) { 5832 qla_nvme_register_remote(vha, fcport); 5833 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5834 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5835 return; 5836 } 5837 5838 qla24xx_update_fcport_fcp_prio(vha, fcport); 5839 5840 switch (vha->host->active_mode) { 5841 case MODE_INITIATOR: 5842 qla2x00_reg_remote_port(vha, fcport); 5843 break; 5844 case MODE_TARGET: 5845 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5846 !vha->vha_tgt.qla_tgt->tgt_stopped) 5847 qlt_fc_port_added(vha, fcport); 5848 break; 5849 case MODE_DUAL: 5850 qla2x00_reg_remote_port(vha, fcport); 5851 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5852 !vha->vha_tgt.qla_tgt->tgt_stopped) 5853 qlt_fc_port_added(vha, fcport); 5854 break; 5855 default: 5856 break; 5857 } 5858 5859 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5860 5861 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5862 if (fcport->id_changed) { 5863 fcport->id_changed = 0; 5864 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5865 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5866 __func__, __LINE__, fcport->port_name, 5867 vha->fcport_count); 5868 qla24xx_post_gfpnid_work(vha, fcport); 5869 } else { 5870 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5871 "%s %d %8phC post gpsc fcp_cnt %d\n", 5872 __func__, __LINE__, fcport->port_name, 5873 vha->fcport_count); 5874 qla24xx_post_gpsc_work(vha, fcport); 5875 } 5876 } 5877 5878 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5879 } 5880 5881 void qla_register_fcport_fn(struct work_struct *work) 5882 { 5883 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5884 u32 rscn_gen = fcport->rscn_gen; 5885 u16 data[2]; 5886 5887 if (IS_SW_RESV_ADDR(fcport->d_id)) 5888 return; 5889 5890 qla2x00_update_fcport(fcport->vha, fcport); 5891 5892 ql_dbg(ql_dbg_disc, fcport->vha, 0x911e, 5893 "%s rscn gen %d/%d next DS %d\n", __func__, 5894 rscn_gen, fcport->rscn_gen, fcport->next_disc_state); 5895 5896 if (rscn_gen != fcport->rscn_gen) { 5897 /* RSCN(s) came in while registration */ 5898 switch (fcport->next_disc_state) { 5899 case DSC_DELETE_PEND: 5900 qlt_schedule_sess_for_deletion(fcport); 5901 break; 5902 case DSC_ADISC: 5903 data[0] = data[1] = 0; 5904 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5905 data); 5906 break; 5907 default: 5908 break; 5909 } 5910 } 5911 } 5912 5913 /* 5914 * qla2x00_configure_fabric 5915 * Setup SNS devices with loop ID's. 5916 * 5917 * Input: 5918 * ha = adapter block pointer. 5919 * 5920 * Returns: 5921 * 0 = success. 5922 * BIT_0 = error 5923 */ 5924 static int 5925 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5926 { 5927 int rval; 5928 fc_port_t *fcport; 5929 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5930 uint16_t loop_id; 5931 LIST_HEAD(new_fcports); 5932 struct qla_hw_data *ha = vha->hw; 5933 int discovery_gen; 5934 5935 /* If FL port exists, then SNS is present */ 5936 if (IS_FWI2_CAPABLE(ha)) 5937 loop_id = NPH_F_PORT; 5938 else 5939 loop_id = SNS_FL_PORT; 5940 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5941 if (rval != QLA_SUCCESS) { 5942 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5943 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5944 5945 vha->device_flags &= ~SWITCH_FOUND; 5946 return (QLA_SUCCESS); 5947 } 5948 vha->device_flags |= SWITCH_FOUND; 5949 5950 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0); 5951 if (rval != QLA_SUCCESS) 5952 ql_dbg(ql_dbg_disc, vha, 0x20ff, 5953 "Failed to get Fabric Port Name\n"); 5954 5955 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5956 rval = qla2x00_send_change_request(vha, 0x3, 0); 5957 if (rval != QLA_SUCCESS) 5958 ql_log(ql_log_warn, vha, 0x121, 5959 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5960 rval); 5961 } 5962 5963 do { 5964 qla2x00_mgmt_svr_login(vha); 5965 5966 /* Ensure we are logged into the SNS. */ 5967 loop_id = NPH_SNS_LID(ha); 5968 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5969 0xfc, mb, BIT_1|BIT_0); 5970 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5971 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5972 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5973 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5974 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5975 return rval; 5976 } 5977 5978 /* FDMI support. */ 5979 if (ql2xfdmienable && 5980 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5981 qla2x00_fdmi_register(vha); 5982 5983 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5984 if (qla2x00_rft_id(vha)) { 5985 /* EMPTY */ 5986 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5987 "Register FC-4 TYPE failed.\n"); 5988 if (test_bit(LOOP_RESYNC_NEEDED, 5989 &vha->dpc_flags)) 5990 break; 5991 } 5992 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5993 /* EMPTY */ 5994 ql_dbg(ql_dbg_disc, vha, 0x209a, 5995 "Register FC-4 Features failed.\n"); 5996 if (test_bit(LOOP_RESYNC_NEEDED, 5997 &vha->dpc_flags)) 5998 break; 5999 } 6000 if (vha->flags.nvme_enabled) { 6001 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 6002 ql_dbg(ql_dbg_disc, vha, 0x2049, 6003 "Register NVME FC Type Features failed.\n"); 6004 } 6005 } 6006 if (qla2x00_rnn_id(vha)) { 6007 /* EMPTY */ 6008 ql_dbg(ql_dbg_disc, vha, 0x2104, 6009 "Register Node Name failed.\n"); 6010 if (test_bit(LOOP_RESYNC_NEEDED, 6011 &vha->dpc_flags)) 6012 break; 6013 } else if (qla2x00_rsnn_nn(vha)) { 6014 /* EMPTY */ 6015 ql_dbg(ql_dbg_disc, vha, 0x209b, 6016 "Register Symbolic Node Name failed.\n"); 6017 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6018 break; 6019 } 6020 } 6021 6022 6023 /* Mark the time right before querying FW for connected ports. 6024 * This process is long, asynchronous and by the time it's done, 6025 * collected information might not be accurate anymore. E.g. 6026 * disconnected port might have re-connected and a brand new 6027 * session has been created. In this case session's generation 6028 * will be newer than discovery_gen. */ 6029 qlt_do_generation_tick(vha, &discovery_gen); 6030 6031 if (USE_ASYNC_SCAN(ha)) { 6032 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 6033 NULL); 6034 if (rval) 6035 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6036 } else { 6037 list_for_each_entry(fcport, &vha->vp_fcports, list) 6038 fcport->scan_state = QLA_FCPORT_SCAN; 6039 6040 rval = qla2x00_find_all_fabric_devs(vha); 6041 } 6042 if (rval != QLA_SUCCESS) 6043 break; 6044 } while (0); 6045 6046 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 6047 qla_nvme_register_hba(vha); 6048 6049 if (rval) 6050 ql_dbg(ql_dbg_disc, vha, 0x2068, 6051 "Configure fabric error exit rval=%d.\n", rval); 6052 6053 return (rval); 6054 } 6055 6056 /* 6057 * qla2x00_find_all_fabric_devs 6058 * 6059 * Input: 6060 * ha = adapter block pointer. 6061 * dev = database device entry pointer. 6062 * 6063 * Returns: 6064 * 0 = success. 6065 * 6066 * Context: 6067 * Kernel context. 6068 */ 6069 static int 6070 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 6071 { 6072 int rval; 6073 uint16_t loop_id; 6074 fc_port_t *fcport, *new_fcport; 6075 int found; 6076 6077 sw_info_t *swl; 6078 int swl_idx; 6079 int first_dev, last_dev; 6080 port_id_t wrap = {}, nxt_d_id; 6081 struct qla_hw_data *ha = vha->hw; 6082 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6083 unsigned long flags; 6084 6085 rval = QLA_SUCCESS; 6086 6087 /* Try GID_PT to get device list, else GAN. */ 6088 if (!ha->swl) 6089 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 6090 GFP_KERNEL); 6091 swl = ha->swl; 6092 if (!swl) { 6093 /*EMPTY*/ 6094 ql_dbg(ql_dbg_disc, vha, 0x209c, 6095 "GID_PT allocations failed, fallback on GA_NXT.\n"); 6096 } else { 6097 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 6098 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 6099 swl = NULL; 6100 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6101 return rval; 6102 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 6103 swl = NULL; 6104 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6105 return rval; 6106 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 6107 swl = NULL; 6108 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6109 return rval; 6110 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 6111 swl = NULL; 6112 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6113 return rval; 6114 } 6115 6116 /* If other queries succeeded probe for FC-4 type */ 6117 if (swl) { 6118 qla2x00_gff_id(vha, swl); 6119 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6120 return rval; 6121 } 6122 } 6123 swl_idx = 0; 6124 6125 /* Allocate temporary fcport for any new fcports discovered. */ 6126 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6127 if (new_fcport == NULL) { 6128 ql_log(ql_log_warn, vha, 0x209d, 6129 "Failed to allocate memory for fcport.\n"); 6130 return (QLA_MEMORY_ALLOC_FAILED); 6131 } 6132 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6133 /* Set start port ID scan at adapter ID. */ 6134 first_dev = 1; 6135 last_dev = 0; 6136 6137 /* Starting free loop ID. */ 6138 loop_id = ha->min_external_loopid; 6139 for (; loop_id <= ha->max_loop_id; loop_id++) { 6140 if (qla2x00_is_reserved_id(vha, loop_id)) 6141 continue; 6142 6143 if (ha->current_topology == ISP_CFG_FL && 6144 (atomic_read(&vha->loop_down_timer) || 6145 LOOP_TRANSITION(vha))) { 6146 atomic_set(&vha->loop_down_timer, 0); 6147 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6148 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 6149 break; 6150 } 6151 6152 if (swl != NULL) { 6153 if (last_dev) { 6154 wrap.b24 = new_fcport->d_id.b24; 6155 } else { 6156 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 6157 memcpy(new_fcport->node_name, 6158 swl[swl_idx].node_name, WWN_SIZE); 6159 memcpy(new_fcport->port_name, 6160 swl[swl_idx].port_name, WWN_SIZE); 6161 memcpy(new_fcport->fabric_port_name, 6162 swl[swl_idx].fabric_port_name, WWN_SIZE); 6163 new_fcport->fp_speed = swl[swl_idx].fp_speed; 6164 new_fcport->fc4_type = swl[swl_idx].fc4_type; 6165 6166 new_fcport->nvme_flag = 0; 6167 if (vha->flags.nvme_enabled && 6168 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 6169 ql_log(ql_log_info, vha, 0x2131, 6170 "FOUND: NVME port %8phC as FC Type 28h\n", 6171 new_fcport->port_name); 6172 } 6173 6174 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 6175 last_dev = 1; 6176 } 6177 swl_idx++; 6178 } 6179 } else { 6180 /* Send GA_NXT to the switch */ 6181 rval = qla2x00_ga_nxt(vha, new_fcport); 6182 if (rval != QLA_SUCCESS) { 6183 ql_log(ql_log_warn, vha, 0x209e, 6184 "SNS scan failed -- assuming " 6185 "zero-entry result.\n"); 6186 rval = QLA_SUCCESS; 6187 break; 6188 } 6189 } 6190 6191 /* If wrap on switch device list, exit. */ 6192 if (first_dev) { 6193 wrap.b24 = new_fcport->d_id.b24; 6194 first_dev = 0; 6195 } else if (new_fcport->d_id.b24 == wrap.b24) { 6196 ql_dbg(ql_dbg_disc, vha, 0x209f, 6197 "Device wrap (%02x%02x%02x).\n", 6198 new_fcport->d_id.b.domain, 6199 new_fcport->d_id.b.area, 6200 new_fcport->d_id.b.al_pa); 6201 break; 6202 } 6203 6204 /* Bypass if same physical adapter. */ 6205 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 6206 continue; 6207 6208 /* Bypass virtual ports of the same host. */ 6209 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 6210 continue; 6211 6212 /* Bypass if same domain and area of adapter. */ 6213 if (((new_fcport->d_id.b24 & 0xffff00) == 6214 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 6215 ISP_CFG_FL) 6216 continue; 6217 6218 /* Bypass reserved domain fields. */ 6219 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 6220 continue; 6221 6222 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 6223 if (ql2xgffidenable && 6224 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 6225 new_fcport->fc4_type != 0)) 6226 continue; 6227 6228 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 6229 6230 /* Locate matching device in database. */ 6231 found = 0; 6232 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6233 if (memcmp(new_fcport->port_name, fcport->port_name, 6234 WWN_SIZE)) 6235 continue; 6236 6237 fcport->scan_state = QLA_FCPORT_FOUND; 6238 6239 found++; 6240 6241 /* Update port state. */ 6242 memcpy(fcport->fabric_port_name, 6243 new_fcport->fabric_port_name, WWN_SIZE); 6244 fcport->fp_speed = new_fcport->fp_speed; 6245 6246 /* 6247 * If address the same and state FCS_ONLINE 6248 * (or in target mode), nothing changed. 6249 */ 6250 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 6251 (atomic_read(&fcport->state) == FCS_ONLINE || 6252 (vha->host->active_mode == MODE_TARGET))) { 6253 break; 6254 } 6255 6256 if (fcport->login_retry == 0) 6257 fcport->login_retry = 6258 vha->hw->login_retry_count; 6259 /* 6260 * If device was not a fabric device before. 6261 */ 6262 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 6263 fcport->d_id.b24 = new_fcport->d_id.b24; 6264 qla2x00_clear_loop_id(fcport); 6265 fcport->flags |= (FCF_FABRIC_DEVICE | 6266 FCF_LOGIN_NEEDED); 6267 break; 6268 } 6269 6270 /* 6271 * Port ID changed or device was marked to be updated; 6272 * Log it out if still logged in and mark it for 6273 * relogin later. 6274 */ 6275 if (qla_tgt_mode_enabled(base_vha)) { 6276 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 6277 "port changed FC ID, %8phC" 6278 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 6279 fcport->port_name, 6280 fcport->d_id.b.domain, 6281 fcport->d_id.b.area, 6282 fcport->d_id.b.al_pa, 6283 fcport->loop_id, 6284 new_fcport->d_id.b.domain, 6285 new_fcport->d_id.b.area, 6286 new_fcport->d_id.b.al_pa); 6287 fcport->d_id.b24 = new_fcport->d_id.b24; 6288 break; 6289 } 6290 6291 fcport->d_id.b24 = new_fcport->d_id.b24; 6292 fcport->flags |= FCF_LOGIN_NEEDED; 6293 break; 6294 } 6295 6296 if (found && NVME_TARGET(vha->hw, fcport)) { 6297 if (fcport->disc_state == DSC_DELETE_PEND) { 6298 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 6299 vha->fcport_count--; 6300 fcport->login_succ = 0; 6301 } 6302 } 6303 6304 if (found) { 6305 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6306 continue; 6307 } 6308 /* If device was not in our fcports list, then add it. */ 6309 new_fcport->scan_state = QLA_FCPORT_FOUND; 6310 list_add_tail(&new_fcport->list, &vha->vp_fcports); 6311 6312 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6313 6314 6315 /* Allocate a new replacement fcport. */ 6316 nxt_d_id.b24 = new_fcport->d_id.b24; 6317 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6318 if (new_fcport == NULL) { 6319 ql_log(ql_log_warn, vha, 0xd032, 6320 "Memory allocation failed for fcport.\n"); 6321 return (QLA_MEMORY_ALLOC_FAILED); 6322 } 6323 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6324 new_fcport->d_id.b24 = nxt_d_id.b24; 6325 } 6326 6327 qla2x00_free_fcport(new_fcport); 6328 6329 /* 6330 * Logout all previous fabric dev marked lost, except FCP2 devices. 6331 */ 6332 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6333 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6334 break; 6335 6336 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 6337 continue; 6338 6339 if (fcport->scan_state == QLA_FCPORT_SCAN) { 6340 if ((qla_dual_mode_enabled(vha) || 6341 qla_ini_mode_enabled(vha)) && 6342 atomic_read(&fcport->state) == FCS_ONLINE) { 6343 qla2x00_mark_device_lost(vha, fcport, 6344 ql2xplogiabsentdevice); 6345 if (fcport->loop_id != FC_NO_LOOP_ID && 6346 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 6347 fcport->port_type != FCT_INITIATOR && 6348 fcport->port_type != FCT_BROADCAST) { 6349 ql_dbg(ql_dbg_disc, vha, 0x20f0, 6350 "%s %d %8phC post del sess\n", 6351 __func__, __LINE__, 6352 fcport->port_name); 6353 qlt_schedule_sess_for_deletion(fcport); 6354 continue; 6355 } 6356 } 6357 } 6358 6359 if (fcport->scan_state == QLA_FCPORT_FOUND && 6360 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 6361 qla24xx_fcport_handle_login(vha, fcport); 6362 } 6363 return (rval); 6364 } 6365 6366 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 6367 int 6368 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 6369 { 6370 int loop_id = FC_NO_LOOP_ID; 6371 int lid = NPH_MGMT_SERVER - vha->vp_idx; 6372 unsigned long flags; 6373 struct qla_hw_data *ha = vha->hw; 6374 6375 if (vha->vp_idx == 0) { 6376 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 6377 return NPH_MGMT_SERVER; 6378 } 6379 6380 /* pick id from high and work down to low */ 6381 spin_lock_irqsave(&ha->vport_slock, flags); 6382 for (; lid > 0; lid--) { 6383 if (!test_bit(lid, vha->hw->loop_id_map)) { 6384 set_bit(lid, vha->hw->loop_id_map); 6385 loop_id = lid; 6386 break; 6387 } 6388 } 6389 spin_unlock_irqrestore(&ha->vport_slock, flags); 6390 6391 return loop_id; 6392 } 6393 6394 /* 6395 * qla2x00_fabric_login 6396 * Issue fabric login command. 6397 * 6398 * Input: 6399 * ha = adapter block pointer. 6400 * device = pointer to FC device type structure. 6401 * 6402 * Returns: 6403 * 0 - Login successfully 6404 * 1 - Login failed 6405 * 2 - Initiator device 6406 * 3 - Fatal error 6407 */ 6408 int 6409 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 6410 uint16_t *next_loopid) 6411 { 6412 int rval; 6413 int retry; 6414 uint16_t tmp_loopid; 6415 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6416 struct qla_hw_data *ha = vha->hw; 6417 6418 retry = 0; 6419 tmp_loopid = 0; 6420 6421 for (;;) { 6422 ql_dbg(ql_dbg_disc, vha, 0x2000, 6423 "Trying Fabric Login w/loop id 0x%04x for port " 6424 "%02x%02x%02x.\n", 6425 fcport->loop_id, fcport->d_id.b.domain, 6426 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6427 6428 /* Login fcport on switch. */ 6429 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 6430 fcport->d_id.b.domain, fcport->d_id.b.area, 6431 fcport->d_id.b.al_pa, mb, BIT_0); 6432 if (rval != QLA_SUCCESS) { 6433 return rval; 6434 } 6435 if (mb[0] == MBS_PORT_ID_USED) { 6436 /* 6437 * Device has another loop ID. The firmware team 6438 * recommends the driver perform an implicit login with 6439 * the specified ID again. The ID we just used is save 6440 * here so we return with an ID that can be tried by 6441 * the next login. 6442 */ 6443 retry++; 6444 tmp_loopid = fcport->loop_id; 6445 fcport->loop_id = mb[1]; 6446 6447 ql_dbg(ql_dbg_disc, vha, 0x2001, 6448 "Fabric Login: port in use - next loop " 6449 "id=0x%04x, port id= %02x%02x%02x.\n", 6450 fcport->loop_id, fcport->d_id.b.domain, 6451 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6452 6453 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6454 /* 6455 * Login succeeded. 6456 */ 6457 if (retry) { 6458 /* A retry occurred before. */ 6459 *next_loopid = tmp_loopid; 6460 } else { 6461 /* 6462 * No retry occurred before. Just increment the 6463 * ID value for next login. 6464 */ 6465 *next_loopid = (fcport->loop_id + 1); 6466 } 6467 6468 if (mb[1] & BIT_0) { 6469 fcport->port_type = FCT_INITIATOR; 6470 } else { 6471 fcport->port_type = FCT_TARGET; 6472 if (mb[1] & BIT_1) { 6473 fcport->flags |= FCF_FCP2_DEVICE; 6474 } 6475 } 6476 6477 if (mb[10] & BIT_0) 6478 fcport->supported_classes |= FC_COS_CLASS2; 6479 if (mb[10] & BIT_1) 6480 fcport->supported_classes |= FC_COS_CLASS3; 6481 6482 if (IS_FWI2_CAPABLE(ha)) { 6483 if (mb[10] & BIT_7) 6484 fcport->flags |= 6485 FCF_CONF_COMP_SUPPORTED; 6486 } 6487 6488 rval = QLA_SUCCESS; 6489 break; 6490 } else if (mb[0] == MBS_LOOP_ID_USED) { 6491 /* 6492 * Loop ID already used, try next loop ID. 6493 */ 6494 fcport->loop_id++; 6495 rval = qla2x00_find_new_loop_id(vha, fcport); 6496 if (rval != QLA_SUCCESS) { 6497 /* Ran out of loop IDs to use */ 6498 break; 6499 } 6500 } else if (mb[0] == MBS_COMMAND_ERROR) { 6501 /* 6502 * Firmware possibly timed out during login. If NO 6503 * retries are left to do then the device is declared 6504 * dead. 6505 */ 6506 *next_loopid = fcport->loop_id; 6507 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6508 fcport->d_id.b.domain, fcport->d_id.b.area, 6509 fcport->d_id.b.al_pa); 6510 qla2x00_mark_device_lost(vha, fcport, 1); 6511 6512 rval = 1; 6513 break; 6514 } else { 6515 /* 6516 * unrecoverable / not handled error 6517 */ 6518 ql_dbg(ql_dbg_disc, vha, 0x2002, 6519 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6520 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6521 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6522 fcport->loop_id, jiffies); 6523 6524 *next_loopid = fcport->loop_id; 6525 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6526 fcport->d_id.b.domain, fcport->d_id.b.area, 6527 fcport->d_id.b.al_pa); 6528 qla2x00_clear_loop_id(fcport); 6529 fcport->login_retry = 0; 6530 6531 rval = 3; 6532 break; 6533 } 6534 } 6535 6536 return (rval); 6537 } 6538 6539 /* 6540 * qla2x00_local_device_login 6541 * Issue local device login command. 6542 * 6543 * Input: 6544 * ha = adapter block pointer. 6545 * loop_id = loop id of device to login to. 6546 * 6547 * Returns (Where's the #define!!!!): 6548 * 0 - Login successfully 6549 * 1 - Login failed 6550 * 3 - Fatal error 6551 */ 6552 int 6553 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6554 { 6555 int rval; 6556 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6557 6558 memset(mb, 0, sizeof(mb)); 6559 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6560 if (rval == QLA_SUCCESS) { 6561 /* Interrogate mailbox registers for any errors */ 6562 if (mb[0] == MBS_COMMAND_ERROR) 6563 rval = 1; 6564 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6565 /* device not in PCB table */ 6566 rval = 3; 6567 } 6568 6569 return (rval); 6570 } 6571 6572 /* 6573 * qla2x00_loop_resync 6574 * Resync with fibre channel devices. 6575 * 6576 * Input: 6577 * ha = adapter block pointer. 6578 * 6579 * Returns: 6580 * 0 = success 6581 */ 6582 int 6583 qla2x00_loop_resync(scsi_qla_host_t *vha) 6584 { 6585 int rval = QLA_SUCCESS; 6586 uint32_t wait_time; 6587 6588 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6589 if (vha->flags.online) { 6590 if (!(rval = qla2x00_fw_ready(vha))) { 6591 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6592 wait_time = 256; 6593 do { 6594 if (!IS_QLAFX00(vha->hw)) { 6595 /* 6596 * Issue a marker after FW becomes 6597 * ready. 6598 */ 6599 qla2x00_marker(vha, vha->hw->base_qpair, 6600 0, 0, MK_SYNC_ALL); 6601 vha->marker_needed = 0; 6602 } 6603 6604 /* Remap devices on Loop. */ 6605 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6606 6607 if (IS_QLAFX00(vha->hw)) 6608 qlafx00_configure_devices(vha); 6609 else 6610 qla2x00_configure_loop(vha); 6611 6612 wait_time--; 6613 } while (!atomic_read(&vha->loop_down_timer) && 6614 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6615 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6616 &vha->dpc_flags))); 6617 } 6618 } 6619 6620 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6621 return (QLA_FUNCTION_FAILED); 6622 6623 if (rval) 6624 ql_dbg(ql_dbg_disc, vha, 0x206c, 6625 "%s *** FAILED ***.\n", __func__); 6626 6627 return (rval); 6628 } 6629 6630 /* 6631 * qla2x00_perform_loop_resync 6632 * Description: This function will set the appropriate flags and call 6633 * qla2x00_loop_resync. If successful loop will be resynced 6634 * Arguments : scsi_qla_host_t pointer 6635 * returm : Success or Failure 6636 */ 6637 6638 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6639 { 6640 int32_t rval = 0; 6641 6642 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6643 /*Configure the flags so that resync happens properly*/ 6644 atomic_set(&ha->loop_down_timer, 0); 6645 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6646 atomic_set(&ha->loop_state, LOOP_UP); 6647 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6648 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6649 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6650 6651 rval = qla2x00_loop_resync(ha); 6652 } else 6653 atomic_set(&ha->loop_state, LOOP_DEAD); 6654 6655 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6656 } 6657 6658 return rval; 6659 } 6660 6661 void 6662 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6663 { 6664 fc_port_t *fcport; 6665 struct scsi_qla_host *vha, *tvp; 6666 struct qla_hw_data *ha = base_vha->hw; 6667 unsigned long flags; 6668 6669 spin_lock_irqsave(&ha->vport_slock, flags); 6670 /* Go with deferred removal of rport references. */ 6671 list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) { 6672 atomic_inc(&vha->vref_count); 6673 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6674 if (fcport->drport && 6675 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6676 spin_unlock_irqrestore(&ha->vport_slock, flags); 6677 qla2x00_rport_del(fcport); 6678 6679 spin_lock_irqsave(&ha->vport_slock, flags); 6680 } 6681 } 6682 atomic_dec(&vha->vref_count); 6683 wake_up(&vha->vref_waitq); 6684 } 6685 spin_unlock_irqrestore(&ha->vport_slock, flags); 6686 } 6687 6688 /* Assumes idc_lock always held on entry */ 6689 void 6690 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6691 { 6692 struct qla_hw_data *ha = vha->hw; 6693 uint32_t drv_presence, drv_presence_mask; 6694 uint32_t dev_part_info1, dev_part_info2, class_type; 6695 uint32_t class_type_mask = 0x3; 6696 uint16_t fcoe_other_function = 0xffff, i; 6697 6698 if (IS_QLA8044(ha)) { 6699 drv_presence = qla8044_rd_direct(vha, 6700 QLA8044_CRB_DRV_ACTIVE_INDEX); 6701 dev_part_info1 = qla8044_rd_direct(vha, 6702 QLA8044_CRB_DEV_PART_INFO_INDEX); 6703 dev_part_info2 = qla8044_rd_direct(vha, 6704 QLA8044_CRB_DEV_PART_INFO2); 6705 } else { 6706 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6707 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6708 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6709 } 6710 for (i = 0; i < 8; i++) { 6711 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6712 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6713 (i != ha->portnum)) { 6714 fcoe_other_function = i; 6715 break; 6716 } 6717 } 6718 if (fcoe_other_function == 0xffff) { 6719 for (i = 0; i < 8; i++) { 6720 class_type = ((dev_part_info2 >> (i * 4)) & 6721 class_type_mask); 6722 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6723 ((i + 8) != ha->portnum)) { 6724 fcoe_other_function = i + 8; 6725 break; 6726 } 6727 } 6728 } 6729 /* 6730 * Prepare drv-presence mask based on fcoe functions present. 6731 * However consider only valid physical fcoe function numbers (0-15). 6732 */ 6733 drv_presence_mask = ~((1 << (ha->portnum)) | 6734 ((fcoe_other_function == 0xffff) ? 6735 0 : (1 << (fcoe_other_function)))); 6736 6737 /* We are the reset owner iff: 6738 * - No other protocol drivers present. 6739 * - This is the lowest among fcoe functions. */ 6740 if (!(drv_presence & drv_presence_mask) && 6741 (ha->portnum < fcoe_other_function)) { 6742 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6743 "This host is Reset owner.\n"); 6744 ha->flags.nic_core_reset_owner = 1; 6745 } 6746 } 6747 6748 static int 6749 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6750 { 6751 int rval = QLA_SUCCESS; 6752 struct qla_hw_data *ha = vha->hw; 6753 uint32_t drv_ack; 6754 6755 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6756 if (rval == QLA_SUCCESS) { 6757 drv_ack |= (1 << ha->portnum); 6758 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6759 } 6760 6761 return rval; 6762 } 6763 6764 static int 6765 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6766 { 6767 int rval = QLA_SUCCESS; 6768 struct qla_hw_data *ha = vha->hw; 6769 uint32_t drv_ack; 6770 6771 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6772 if (rval == QLA_SUCCESS) { 6773 drv_ack &= ~(1 << ha->portnum); 6774 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6775 } 6776 6777 return rval; 6778 } 6779 6780 static const char * 6781 qla83xx_dev_state_to_string(uint32_t dev_state) 6782 { 6783 switch (dev_state) { 6784 case QLA8XXX_DEV_COLD: 6785 return "COLD/RE-INIT"; 6786 case QLA8XXX_DEV_INITIALIZING: 6787 return "INITIALIZING"; 6788 case QLA8XXX_DEV_READY: 6789 return "READY"; 6790 case QLA8XXX_DEV_NEED_RESET: 6791 return "NEED RESET"; 6792 case QLA8XXX_DEV_NEED_QUIESCENT: 6793 return "NEED QUIESCENT"; 6794 case QLA8XXX_DEV_FAILED: 6795 return "FAILED"; 6796 case QLA8XXX_DEV_QUIESCENT: 6797 return "QUIESCENT"; 6798 default: 6799 return "Unknown"; 6800 } 6801 } 6802 6803 /* Assumes idc-lock always held on entry */ 6804 void 6805 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6806 { 6807 struct qla_hw_data *ha = vha->hw; 6808 uint32_t idc_audit_reg = 0, duration_secs = 0; 6809 6810 switch (audit_type) { 6811 case IDC_AUDIT_TIMESTAMP: 6812 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6813 idc_audit_reg = (ha->portnum) | 6814 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6815 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6816 break; 6817 6818 case IDC_AUDIT_COMPLETION: 6819 duration_secs = ((jiffies_to_msecs(jiffies) - 6820 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6821 idc_audit_reg = (ha->portnum) | 6822 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6823 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6824 break; 6825 6826 default: 6827 ql_log(ql_log_warn, vha, 0xb078, 6828 "Invalid audit type specified.\n"); 6829 break; 6830 } 6831 } 6832 6833 /* Assumes idc_lock always held on entry */ 6834 static int 6835 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6836 { 6837 struct qla_hw_data *ha = vha->hw; 6838 uint32_t idc_control, dev_state; 6839 6840 __qla83xx_get_idc_control(vha, &idc_control); 6841 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6842 ql_log(ql_log_info, vha, 0xb080, 6843 "NIC Core reset has been disabled. idc-control=0x%x\n", 6844 idc_control); 6845 return QLA_FUNCTION_FAILED; 6846 } 6847 6848 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6849 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6850 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6851 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6852 QLA8XXX_DEV_NEED_RESET); 6853 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6854 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6855 } else { 6856 const char *state = qla83xx_dev_state_to_string(dev_state); 6857 6858 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6859 6860 /* SV: XXX: Is timeout required here? */ 6861 /* Wait for IDC state change READY -> NEED_RESET */ 6862 while (dev_state == QLA8XXX_DEV_READY) { 6863 qla83xx_idc_unlock(vha, 0); 6864 msleep(200); 6865 qla83xx_idc_lock(vha, 0); 6866 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6867 } 6868 } 6869 6870 /* Send IDC ack by writing to drv-ack register */ 6871 __qla83xx_set_drv_ack(vha); 6872 6873 return QLA_SUCCESS; 6874 } 6875 6876 int 6877 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6878 { 6879 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6880 } 6881 6882 int 6883 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6884 { 6885 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6886 } 6887 6888 static int 6889 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6890 { 6891 uint32_t drv_presence = 0; 6892 struct qla_hw_data *ha = vha->hw; 6893 6894 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6895 if (drv_presence & (1 << ha->portnum)) 6896 return QLA_SUCCESS; 6897 else 6898 return QLA_TEST_FAILED; 6899 } 6900 6901 int 6902 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6903 { 6904 int rval = QLA_SUCCESS; 6905 struct qla_hw_data *ha = vha->hw; 6906 6907 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6908 "Entered %s().\n", __func__); 6909 6910 if (vha->device_flags & DFLG_DEV_FAILED) { 6911 ql_log(ql_log_warn, vha, 0xb059, 6912 "Device in unrecoverable FAILED state.\n"); 6913 return QLA_FUNCTION_FAILED; 6914 } 6915 6916 qla83xx_idc_lock(vha, 0); 6917 6918 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6919 ql_log(ql_log_warn, vha, 0xb05a, 6920 "Function=0x%x has been removed from IDC participation.\n", 6921 ha->portnum); 6922 rval = QLA_FUNCTION_FAILED; 6923 goto exit; 6924 } 6925 6926 qla83xx_reset_ownership(vha); 6927 6928 rval = qla83xx_initiating_reset(vha); 6929 6930 /* 6931 * Perform reset if we are the reset-owner, 6932 * else wait till IDC state changes to READY/FAILED. 6933 */ 6934 if (rval == QLA_SUCCESS) { 6935 rval = qla83xx_idc_state_handler(vha); 6936 6937 if (rval == QLA_SUCCESS) 6938 ha->flags.nic_core_hung = 0; 6939 __qla83xx_clear_drv_ack(vha); 6940 } 6941 6942 exit: 6943 qla83xx_idc_unlock(vha, 0); 6944 6945 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6946 6947 return rval; 6948 } 6949 6950 int 6951 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6952 { 6953 struct qla_hw_data *ha = vha->hw; 6954 int rval = QLA_FUNCTION_FAILED; 6955 6956 if (!IS_MCTP_CAPABLE(ha)) { 6957 /* This message can be removed from the final version */ 6958 ql_log(ql_log_info, vha, 0x506d, 6959 "This board is not MCTP capable\n"); 6960 return rval; 6961 } 6962 6963 if (!ha->mctp_dump) { 6964 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6965 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6966 6967 if (!ha->mctp_dump) { 6968 ql_log(ql_log_warn, vha, 0x506e, 6969 "Failed to allocate memory for mctp dump\n"); 6970 return rval; 6971 } 6972 } 6973 6974 #define MCTP_DUMP_STR_ADDR 0x00000000 6975 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6976 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6977 if (rval != QLA_SUCCESS) { 6978 ql_log(ql_log_warn, vha, 0x506f, 6979 "Failed to capture mctp dump\n"); 6980 } else { 6981 ql_log(ql_log_info, vha, 0x5070, 6982 "Mctp dump capture for host (%ld/%p).\n", 6983 vha->host_no, ha->mctp_dump); 6984 ha->mctp_dumped = 1; 6985 } 6986 6987 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6988 ha->flags.nic_core_reset_hdlr_active = 1; 6989 rval = qla83xx_restart_nic_firmware(vha); 6990 if (rval) 6991 /* NIC Core reset failed. */ 6992 ql_log(ql_log_warn, vha, 0x5071, 6993 "Failed to restart nic firmware\n"); 6994 else 6995 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6996 "Restarted NIC firmware successfully.\n"); 6997 ha->flags.nic_core_reset_hdlr_active = 0; 6998 } 6999 7000 return rval; 7001 7002 } 7003 7004 /* 7005 * qla2x00_quiesce_io 7006 * Description: This function will block the new I/Os 7007 * Its not aborting any I/Os as context 7008 * is not destroyed during quiescence 7009 * Arguments: scsi_qla_host_t 7010 * return : void 7011 */ 7012 void 7013 qla2x00_quiesce_io(scsi_qla_host_t *vha) 7014 { 7015 struct qla_hw_data *ha = vha->hw; 7016 struct scsi_qla_host *vp, *tvp; 7017 unsigned long flags; 7018 7019 ql_dbg(ql_dbg_dpc, vha, 0x401d, 7020 "Quiescing I/O - ha=%p.\n", ha); 7021 7022 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 7023 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7024 atomic_set(&vha->loop_state, LOOP_DOWN); 7025 qla2x00_mark_all_devices_lost(vha); 7026 7027 spin_lock_irqsave(&ha->vport_slock, flags); 7028 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7029 atomic_inc(&vp->vref_count); 7030 spin_unlock_irqrestore(&ha->vport_slock, flags); 7031 7032 qla2x00_mark_all_devices_lost(vp); 7033 7034 spin_lock_irqsave(&ha->vport_slock, flags); 7035 atomic_dec(&vp->vref_count); 7036 } 7037 spin_unlock_irqrestore(&ha->vport_slock, flags); 7038 } else { 7039 if (!atomic_read(&vha->loop_down_timer)) 7040 atomic_set(&vha->loop_down_timer, 7041 LOOP_DOWN_TIME); 7042 } 7043 /* Wait for pending cmds to complete */ 7044 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 7045 != QLA_SUCCESS); 7046 } 7047 7048 void 7049 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 7050 { 7051 struct qla_hw_data *ha = vha->hw; 7052 struct scsi_qla_host *vp, *tvp; 7053 unsigned long flags; 7054 fc_port_t *fcport; 7055 u16 i; 7056 7057 /* For ISP82XX, driver waits for completion of the commands. 7058 * online flag should be set. 7059 */ 7060 if (!(IS_P3P_TYPE(ha))) 7061 vha->flags.online = 0; 7062 ha->flags.chip_reset_done = 0; 7063 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 7064 vha->qla_stats.total_isp_aborts++; 7065 7066 ql_log(ql_log_info, vha, 0x00af, 7067 "Performing ISP error recovery - ha=%p.\n", ha); 7068 7069 ha->flags.purge_mbox = 1; 7070 /* For ISP82XX, reset_chip is just disabling interrupts. 7071 * Driver waits for the completion of the commands. 7072 * the interrupts need to be enabled. 7073 */ 7074 if (!(IS_P3P_TYPE(ha))) 7075 ha->isp_ops->reset_chip(vha); 7076 7077 ha->link_data_rate = PORT_SPEED_UNKNOWN; 7078 SAVE_TOPO(ha); 7079 ha->flags.rida_fmt2 = 0; 7080 ha->flags.n2n_ae = 0; 7081 ha->flags.lip_ae = 0; 7082 ha->current_topology = 0; 7083 QLA_FW_STOPPED(ha); 7084 ha->flags.fw_init_done = 0; 7085 ha->chip_reset++; 7086 ha->base_qpair->chip_reset = ha->chip_reset; 7087 ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0; 7088 ha->base_qpair->prev_completion_cnt = 0; 7089 for (i = 0; i < ha->max_qpairs; i++) { 7090 if (ha->queue_pair_map[i]) { 7091 ha->queue_pair_map[i]->chip_reset = 7092 ha->base_qpair->chip_reset; 7093 ha->queue_pair_map[i]->cmd_cnt = 7094 ha->queue_pair_map[i]->cmd_completion_cnt = 0; 7095 ha->base_qpair->prev_completion_cnt = 0; 7096 } 7097 } 7098 7099 /* purge MBox commands */ 7100 if (atomic_read(&ha->num_pend_mbx_stage3)) { 7101 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 7102 complete(&ha->mbx_intr_comp); 7103 } 7104 7105 i = 0; 7106 while (atomic_read(&ha->num_pend_mbx_stage3) || 7107 atomic_read(&ha->num_pend_mbx_stage2) || 7108 atomic_read(&ha->num_pend_mbx_stage1)) { 7109 msleep(20); 7110 i++; 7111 if (i > 50) 7112 break; 7113 } 7114 ha->flags.purge_mbox = 0; 7115 7116 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 7117 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7118 atomic_set(&vha->loop_state, LOOP_DOWN); 7119 qla2x00_mark_all_devices_lost(vha); 7120 7121 spin_lock_irqsave(&ha->vport_slock, flags); 7122 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7123 atomic_inc(&vp->vref_count); 7124 spin_unlock_irqrestore(&ha->vport_slock, flags); 7125 7126 qla2x00_mark_all_devices_lost(vp); 7127 7128 spin_lock_irqsave(&ha->vport_slock, flags); 7129 atomic_dec(&vp->vref_count); 7130 } 7131 spin_unlock_irqrestore(&ha->vport_slock, flags); 7132 } else { 7133 if (!atomic_read(&vha->loop_down_timer)) 7134 atomic_set(&vha->loop_down_timer, 7135 LOOP_DOWN_TIME); 7136 } 7137 7138 /* Clear all async request states across all VPs. */ 7139 list_for_each_entry(fcport, &vha->vp_fcports, list) { 7140 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7141 fcport->scan_state = 0; 7142 } 7143 spin_lock_irqsave(&ha->vport_slock, flags); 7144 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7145 atomic_inc(&vp->vref_count); 7146 spin_unlock_irqrestore(&ha->vport_slock, flags); 7147 7148 list_for_each_entry(fcport, &vp->vp_fcports, list) 7149 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7150 7151 spin_lock_irqsave(&ha->vport_slock, flags); 7152 atomic_dec(&vp->vref_count); 7153 } 7154 spin_unlock_irqrestore(&ha->vport_slock, flags); 7155 7156 /* Make sure for ISP 82XX IO DMA is complete */ 7157 if (IS_P3P_TYPE(ha)) { 7158 qla82xx_chip_reset_cleanup(vha); 7159 ql_log(ql_log_info, vha, 0x00b4, 7160 "Done chip reset cleanup.\n"); 7161 7162 /* Done waiting for pending commands. Reset online flag */ 7163 vha->flags.online = 0; 7164 } 7165 7166 /* Requeue all commands in outstanding command list. */ 7167 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 7168 /* memory barrier */ 7169 wmb(); 7170 } 7171 7172 /* 7173 * qla2x00_abort_isp 7174 * Resets ISP and aborts all outstanding commands. 7175 * 7176 * Input: 7177 * ha = adapter block pointer. 7178 * 7179 * Returns: 7180 * 0 = success 7181 */ 7182 int 7183 qla2x00_abort_isp(scsi_qla_host_t *vha) 7184 { 7185 int rval; 7186 uint8_t status = 0; 7187 struct qla_hw_data *ha = vha->hw; 7188 struct scsi_qla_host *vp, *tvp; 7189 struct req_que *req = ha->req_q_map[0]; 7190 unsigned long flags; 7191 7192 if (vha->flags.online) { 7193 qla2x00_abort_isp_cleanup(vha); 7194 7195 if (vha->hw->flags.port_isolated) 7196 return status; 7197 7198 if (qla2x00_isp_reg_stat(ha)) { 7199 ql_log(ql_log_info, vha, 0x803f, 7200 "ISP Abort - ISP reg disconnect, exiting.\n"); 7201 return status; 7202 } 7203 7204 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 7205 ha->flags.chip_reset_done = 1; 7206 vha->flags.online = 1; 7207 status = 0; 7208 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7209 return status; 7210 } 7211 7212 if (IS_QLA8031(ha)) { 7213 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 7214 "Clearing fcoe driver presence.\n"); 7215 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 7216 ql_dbg(ql_dbg_p3p, vha, 0xb073, 7217 "Error while clearing DRV-Presence.\n"); 7218 } 7219 7220 if (unlikely(pci_channel_offline(ha->pdev) && 7221 ha->flags.pci_channel_io_perm_failure)) { 7222 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7223 status = 0; 7224 return status; 7225 } 7226 7227 switch (vha->qlini_mode) { 7228 case QLA2XXX_INI_MODE_DISABLED: 7229 if (!qla_tgt_mode_enabled(vha)) 7230 return 0; 7231 break; 7232 case QLA2XXX_INI_MODE_DUAL: 7233 if (!qla_dual_mode_enabled(vha) && 7234 !qla_ini_mode_enabled(vha)) 7235 return 0; 7236 break; 7237 case QLA2XXX_INI_MODE_ENABLED: 7238 default: 7239 break; 7240 } 7241 7242 ha->isp_ops->get_flash_version(vha, req->ring); 7243 7244 if (qla2x00_isp_reg_stat(ha)) { 7245 ql_log(ql_log_info, vha, 0x803f, 7246 "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n"); 7247 return status; 7248 } 7249 ha->isp_ops->nvram_config(vha); 7250 7251 if (qla2x00_isp_reg_stat(ha)) { 7252 ql_log(ql_log_info, vha, 0x803f, 7253 "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n"); 7254 return status; 7255 } 7256 if (!qla2x00_restart_isp(vha)) { 7257 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7258 7259 if (!atomic_read(&vha->loop_down_timer)) { 7260 /* 7261 * Issue marker command only when we are going 7262 * to start the I/O . 7263 */ 7264 vha->marker_needed = 1; 7265 } 7266 7267 vha->flags.online = 1; 7268 7269 ha->isp_ops->enable_intrs(ha); 7270 7271 ha->isp_abort_cnt = 0; 7272 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7273 7274 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 7275 qla2x00_get_fw_version(vha); 7276 if (ha->fce) { 7277 ha->flags.fce_enabled = 1; 7278 memset(ha->fce, 0, 7279 fce_calc_size(ha->fce_bufs)); 7280 rval = qla2x00_enable_fce_trace(vha, 7281 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 7282 &ha->fce_bufs); 7283 if (rval) { 7284 ql_log(ql_log_warn, vha, 0x8033, 7285 "Unable to reinitialize FCE " 7286 "(%d).\n", rval); 7287 ha->flags.fce_enabled = 0; 7288 } 7289 } 7290 7291 if (ha->eft) { 7292 memset(ha->eft, 0, EFT_SIZE); 7293 rval = qla2x00_enable_eft_trace(vha, 7294 ha->eft_dma, EFT_NUM_BUFFERS); 7295 if (rval) { 7296 ql_log(ql_log_warn, vha, 0x8034, 7297 "Unable to reinitialize EFT " 7298 "(%d).\n", rval); 7299 } 7300 } 7301 } else { /* failed the ISP abort */ 7302 vha->flags.online = 1; 7303 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 7304 if (ha->isp_abort_cnt == 0) { 7305 ql_log(ql_log_fatal, vha, 0x8035, 7306 "ISP error recover failed - " 7307 "board disabled.\n"); 7308 /* 7309 * The next call disables the board 7310 * completely. 7311 */ 7312 qla2x00_abort_isp_cleanup(vha); 7313 vha->flags.online = 0; 7314 clear_bit(ISP_ABORT_RETRY, 7315 &vha->dpc_flags); 7316 status = 0; 7317 } else { /* schedule another ISP abort */ 7318 ha->isp_abort_cnt--; 7319 ql_dbg(ql_dbg_taskm, vha, 0x8020, 7320 "ISP abort - retry remaining %d.\n", 7321 ha->isp_abort_cnt); 7322 status = 1; 7323 } 7324 } else { 7325 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 7326 ql_dbg(ql_dbg_taskm, vha, 0x8021, 7327 "ISP error recovery - retrying (%d) " 7328 "more times.\n", ha->isp_abort_cnt); 7329 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7330 status = 1; 7331 } 7332 } 7333 7334 } 7335 7336 if (vha->hw->flags.port_isolated) { 7337 qla2x00_abort_isp_cleanup(vha); 7338 return status; 7339 } 7340 7341 if (!status) { 7342 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 7343 qla2x00_configure_hba(vha); 7344 spin_lock_irqsave(&ha->vport_slock, flags); 7345 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7346 if (vp->vp_idx) { 7347 atomic_inc(&vp->vref_count); 7348 spin_unlock_irqrestore(&ha->vport_slock, flags); 7349 7350 qla2x00_vp_abort_isp(vp); 7351 7352 spin_lock_irqsave(&ha->vport_slock, flags); 7353 atomic_dec(&vp->vref_count); 7354 } 7355 } 7356 spin_unlock_irqrestore(&ha->vport_slock, flags); 7357 7358 if (IS_QLA8031(ha)) { 7359 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 7360 "Setting back fcoe driver presence.\n"); 7361 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 7362 ql_dbg(ql_dbg_p3p, vha, 0xb074, 7363 "Error while setting DRV-Presence.\n"); 7364 } 7365 } else { 7366 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 7367 __func__); 7368 } 7369 7370 return(status); 7371 } 7372 7373 /* 7374 * qla2x00_restart_isp 7375 * restarts the ISP after a reset 7376 * 7377 * Input: 7378 * ha = adapter block pointer. 7379 * 7380 * Returns: 7381 * 0 = success 7382 */ 7383 static int 7384 qla2x00_restart_isp(scsi_qla_host_t *vha) 7385 { 7386 int status; 7387 struct qla_hw_data *ha = vha->hw; 7388 7389 /* If firmware needs to be loaded */ 7390 if (qla2x00_isp_firmware(vha)) { 7391 vha->flags.online = 0; 7392 status = ha->isp_ops->chip_diag(vha); 7393 if (status) 7394 return status; 7395 status = qla2x00_setup_chip(vha); 7396 if (status) 7397 return status; 7398 } 7399 7400 status = qla2x00_init_rings(vha); 7401 if (status) 7402 return status; 7403 7404 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7405 ha->flags.chip_reset_done = 1; 7406 7407 /* Initialize the queues in use */ 7408 qla25xx_init_queues(ha); 7409 7410 status = qla2x00_fw_ready(vha); 7411 if (status) { 7412 /* if no cable then assume it's good */ 7413 return vha->device_flags & DFLG_NO_CABLE ? 0 : status; 7414 } 7415 7416 /* Issue a marker after FW becomes ready. */ 7417 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7418 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7419 7420 return 0; 7421 } 7422 7423 static int 7424 qla25xx_init_queues(struct qla_hw_data *ha) 7425 { 7426 struct rsp_que *rsp = NULL; 7427 struct req_que *req = NULL; 7428 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7429 int ret = -1; 7430 int i; 7431 7432 for (i = 1; i < ha->max_rsp_queues; i++) { 7433 rsp = ha->rsp_q_map[i]; 7434 if (rsp && test_bit(i, ha->rsp_qid_map)) { 7435 rsp->options &= ~BIT_0; 7436 ret = qla25xx_init_rsp_que(base_vha, rsp); 7437 if (ret != QLA_SUCCESS) 7438 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 7439 "%s Rsp que: %d init failed.\n", 7440 __func__, rsp->id); 7441 else 7442 ql_dbg(ql_dbg_init, base_vha, 0x0100, 7443 "%s Rsp que: %d inited.\n", 7444 __func__, rsp->id); 7445 } 7446 } 7447 for (i = 1; i < ha->max_req_queues; i++) { 7448 req = ha->req_q_map[i]; 7449 if (req && test_bit(i, ha->req_qid_map)) { 7450 /* Clear outstanding commands array. */ 7451 req->options &= ~BIT_0; 7452 ret = qla25xx_init_req_que(base_vha, req); 7453 if (ret != QLA_SUCCESS) 7454 ql_dbg(ql_dbg_init, base_vha, 0x0101, 7455 "%s Req que: %d init failed.\n", 7456 __func__, req->id); 7457 else 7458 ql_dbg(ql_dbg_init, base_vha, 0x0102, 7459 "%s Req que: %d inited.\n", 7460 __func__, req->id); 7461 } 7462 } 7463 return ret; 7464 } 7465 7466 /* 7467 * qla2x00_reset_adapter 7468 * Reset adapter. 7469 * 7470 * Input: 7471 * ha = adapter block pointer. 7472 */ 7473 int 7474 qla2x00_reset_adapter(scsi_qla_host_t *vha) 7475 { 7476 unsigned long flags = 0; 7477 struct qla_hw_data *ha = vha->hw; 7478 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7479 7480 vha->flags.online = 0; 7481 ha->isp_ops->disable_intrs(ha); 7482 7483 spin_lock_irqsave(&ha->hardware_lock, flags); 7484 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 7485 rd_reg_word(®->hccr); /* PCI Posting. */ 7486 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 7487 rd_reg_word(®->hccr); /* PCI Posting. */ 7488 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7489 7490 return QLA_SUCCESS; 7491 } 7492 7493 int 7494 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7495 { 7496 unsigned long flags = 0; 7497 struct qla_hw_data *ha = vha->hw; 7498 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7499 7500 if (IS_P3P_TYPE(ha)) 7501 return QLA_SUCCESS; 7502 7503 vha->flags.online = 0; 7504 ha->isp_ops->disable_intrs(ha); 7505 7506 spin_lock_irqsave(&ha->hardware_lock, flags); 7507 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 7508 rd_reg_dword(®->hccr); 7509 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 7510 rd_reg_dword(®->hccr); 7511 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7512 7513 if (IS_NOPOLLING_TYPE(ha)) 7514 ha->isp_ops->enable_intrs(ha); 7515 7516 return QLA_SUCCESS; 7517 } 7518 7519 /* On sparc systems, obtain port and node WWN from firmware 7520 * properties. 7521 */ 7522 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7523 struct nvram_24xx *nv) 7524 { 7525 #ifdef CONFIG_SPARC 7526 struct qla_hw_data *ha = vha->hw; 7527 struct pci_dev *pdev = ha->pdev; 7528 struct device_node *dp = pci_device_to_OF_node(pdev); 7529 const u8 *val; 7530 int len; 7531 7532 val = of_get_property(dp, "port-wwn", &len); 7533 if (val && len >= WWN_SIZE) 7534 memcpy(nv->port_name, val, WWN_SIZE); 7535 7536 val = of_get_property(dp, "node-wwn", &len); 7537 if (val && len >= WWN_SIZE) 7538 memcpy(nv->node_name, val, WWN_SIZE); 7539 #endif 7540 } 7541 7542 int 7543 qla24xx_nvram_config(scsi_qla_host_t *vha) 7544 { 7545 int rval; 7546 struct init_cb_24xx *icb; 7547 struct nvram_24xx *nv; 7548 __le32 *dptr; 7549 uint8_t *dptr1, *dptr2; 7550 uint32_t chksum; 7551 uint16_t cnt; 7552 struct qla_hw_data *ha = vha->hw; 7553 7554 rval = QLA_SUCCESS; 7555 icb = (struct init_cb_24xx *)ha->init_cb; 7556 nv = ha->nvram; 7557 7558 /* Determine NVRAM starting address. */ 7559 if (ha->port_no == 0) { 7560 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7561 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7562 } else { 7563 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7564 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7565 } 7566 7567 ha->nvram_size = sizeof(*nv); 7568 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7569 7570 /* Get VPD data into cache */ 7571 ha->vpd = ha->nvram + VPD_OFFSET; 7572 ha->isp_ops->read_nvram(vha, ha->vpd, 7573 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7574 7575 /* Get NVRAM data into cache and calculate checksum. */ 7576 dptr = (__force __le32 *)nv; 7577 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7578 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7579 chksum += le32_to_cpu(*dptr); 7580 7581 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7582 "Contents of NVRAM\n"); 7583 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7584 nv, ha->nvram_size); 7585 7586 /* Bad NVRAM data, set defaults parameters. */ 7587 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7588 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7589 /* Reset NVRAM data. */ 7590 ql_log(ql_log_warn, vha, 0x006b, 7591 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7592 chksum, nv->id, nv->nvram_version); 7593 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7594 ql_log(ql_log_warn, vha, 0x006c, 7595 "Falling back to functioning (yet invalid -- WWPN) " 7596 "defaults.\n"); 7597 7598 /* 7599 * Set default initialization control block. 7600 */ 7601 memset(nv, 0, ha->nvram_size); 7602 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7603 nv->version = cpu_to_le16(ICB_VERSION); 7604 nv->frame_payload_size = cpu_to_le16(2048); 7605 nv->execution_throttle = cpu_to_le16(0xFFFF); 7606 nv->exchange_count = cpu_to_le16(0); 7607 nv->hard_address = cpu_to_le16(124); 7608 nv->port_name[0] = 0x21; 7609 nv->port_name[1] = 0x00 + ha->port_no + 1; 7610 nv->port_name[2] = 0x00; 7611 nv->port_name[3] = 0xe0; 7612 nv->port_name[4] = 0x8b; 7613 nv->port_name[5] = 0x1c; 7614 nv->port_name[6] = 0x55; 7615 nv->port_name[7] = 0x86; 7616 nv->node_name[0] = 0x20; 7617 nv->node_name[1] = 0x00; 7618 nv->node_name[2] = 0x00; 7619 nv->node_name[3] = 0xe0; 7620 nv->node_name[4] = 0x8b; 7621 nv->node_name[5] = 0x1c; 7622 nv->node_name[6] = 0x55; 7623 nv->node_name[7] = 0x86; 7624 qla24xx_nvram_wwn_from_ofw(vha, nv); 7625 nv->login_retry_count = cpu_to_le16(8); 7626 nv->interrupt_delay_timer = cpu_to_le16(0); 7627 nv->login_timeout = cpu_to_le16(0); 7628 nv->firmware_options_1 = 7629 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7630 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7631 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7632 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7633 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7634 nv->efi_parameters = cpu_to_le32(0); 7635 nv->reset_delay = 5; 7636 nv->max_luns_per_target = cpu_to_le16(128); 7637 nv->port_down_retry_count = cpu_to_le16(30); 7638 nv->link_down_timeout = cpu_to_le16(30); 7639 7640 rval = 1; 7641 } 7642 7643 if (qla_tgt_mode_enabled(vha)) { 7644 /* Don't enable full login after initial LIP */ 7645 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7646 /* Don't enable LIP full login for initiator */ 7647 nv->host_p &= cpu_to_le32(~BIT_10); 7648 } 7649 7650 qlt_24xx_config_nvram_stage1(vha, nv); 7651 7652 /* Reset Initialization control block */ 7653 memset(icb, 0, ha->init_cb_size); 7654 7655 /* Copy 1st segment. */ 7656 dptr1 = (uint8_t *)icb; 7657 dptr2 = (uint8_t *)&nv->version; 7658 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7659 while (cnt--) 7660 *dptr1++ = *dptr2++; 7661 7662 icb->login_retry_count = nv->login_retry_count; 7663 icb->link_down_on_nos = nv->link_down_on_nos; 7664 7665 /* Copy 2nd segment. */ 7666 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7667 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7668 cnt = (uint8_t *)&icb->reserved_3 - 7669 (uint8_t *)&icb->interrupt_delay_timer; 7670 while (cnt--) 7671 *dptr1++ = *dptr2++; 7672 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7673 /* 7674 * Setup driver NVRAM options. 7675 */ 7676 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7677 "QLA2462"); 7678 7679 qlt_24xx_config_nvram_stage2(vha, icb); 7680 7681 if (nv->host_p & cpu_to_le32(BIT_15)) { 7682 /* Use alternate WWN? */ 7683 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7684 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7685 } 7686 7687 /* Prepare nodename */ 7688 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7689 /* 7690 * Firmware will apply the following mask if the nodename was 7691 * not provided. 7692 */ 7693 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7694 icb->node_name[0] &= 0xF0; 7695 } 7696 7697 /* Set host adapter parameters. */ 7698 ha->flags.disable_risc_code_load = 0; 7699 ha->flags.enable_lip_reset = 0; 7700 ha->flags.enable_lip_full_login = 7701 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7702 ha->flags.enable_target_reset = 7703 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7704 ha->flags.enable_led_scheme = 0; 7705 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7706 7707 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7708 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7709 7710 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7711 sizeof(ha->fw_seriallink_options24)); 7712 7713 /* save HBA serial number */ 7714 ha->serial0 = icb->port_name[5]; 7715 ha->serial1 = icb->port_name[6]; 7716 ha->serial2 = icb->port_name[7]; 7717 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7718 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7719 7720 icb->execution_throttle = cpu_to_le16(0xFFFF); 7721 7722 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7723 7724 /* Set minimum login_timeout to 4 seconds. */ 7725 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7726 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7727 if (le16_to_cpu(nv->login_timeout) < 4) 7728 nv->login_timeout = cpu_to_le16(4); 7729 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7730 7731 /* Set minimum RATOV to 100 tenths of a second. */ 7732 ha->r_a_tov = 100; 7733 7734 ha->loop_reset_delay = nv->reset_delay; 7735 7736 /* Link Down Timeout = 0: 7737 * 7738 * When Port Down timer expires we will start returning 7739 * I/O's to OS with "DID_NO_CONNECT". 7740 * 7741 * Link Down Timeout != 0: 7742 * 7743 * The driver waits for the link to come up after link down 7744 * before returning I/Os to OS with "DID_NO_CONNECT". 7745 */ 7746 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7747 ha->loop_down_abort_time = 7748 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7749 } else { 7750 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7751 ha->loop_down_abort_time = 7752 (LOOP_DOWN_TIME - ha->link_down_timeout); 7753 } 7754 7755 /* Need enough time to try and get the port back. */ 7756 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7757 if (qlport_down_retry) 7758 ha->port_down_retry_count = qlport_down_retry; 7759 7760 /* Set login_retry_count */ 7761 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7762 if (ha->port_down_retry_count == 7763 le16_to_cpu(nv->port_down_retry_count) && 7764 ha->port_down_retry_count > 3) 7765 ha->login_retry_count = ha->port_down_retry_count; 7766 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7767 ha->login_retry_count = ha->port_down_retry_count; 7768 if (ql2xloginretrycount) 7769 ha->login_retry_count = ql2xloginretrycount; 7770 7771 /* N2N: driver will initiate Login instead of FW */ 7772 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 7773 7774 /* Enable ZIO. */ 7775 if (!vha->flags.init_done) { 7776 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7777 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7778 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7779 le16_to_cpu(icb->interrupt_delay_timer) : 2; 7780 } 7781 icb->firmware_options_2 &= cpu_to_le32( 7782 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7783 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7784 ha->zio_mode = QLA_ZIO_MODE_6; 7785 7786 ql_log(ql_log_info, vha, 0x006f, 7787 "ZIO mode %d enabled; timer delay (%d us).\n", 7788 ha->zio_mode, ha->zio_timer * 100); 7789 7790 icb->firmware_options_2 |= cpu_to_le32( 7791 (uint32_t)ha->zio_mode); 7792 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7793 } 7794 7795 if (rval) { 7796 ql_log(ql_log_warn, vha, 0x0070, 7797 "NVRAM configuration failed.\n"); 7798 } 7799 return (rval); 7800 } 7801 7802 static void 7803 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 7804 struct qla27xx_image_status *image_status) 7805 { 7806 ql_dbg(ql_dbg_init, vha, 0x018b, 7807 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 7808 name, "status", 7809 image_status->image_status_mask, 7810 le16_to_cpu(image_status->generation), 7811 image_status->ver_major, 7812 image_status->ver_minor, 7813 image_status->bitmap, 7814 le32_to_cpu(image_status->checksum), 7815 le32_to_cpu(image_status->signature)); 7816 } 7817 7818 static bool 7819 qla28xx_check_aux_image_status_signature( 7820 struct qla27xx_image_status *image_status) 7821 { 7822 ulong signature = le32_to_cpu(image_status->signature); 7823 7824 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 7825 } 7826 7827 static bool 7828 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 7829 { 7830 ulong signature = le32_to_cpu(image_status->signature); 7831 7832 return 7833 signature != QLA27XX_IMG_STATUS_SIGN && 7834 signature != QLA28XX_IMG_STATUS_SIGN; 7835 } 7836 7837 static ulong 7838 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 7839 { 7840 __le32 *p = (__force __le32 *)image_status; 7841 uint n = sizeof(*image_status) / sizeof(*p); 7842 uint32_t sum = 0; 7843 7844 for ( ; n--; p++) 7845 sum += le32_to_cpup(p); 7846 7847 return sum; 7848 } 7849 7850 static inline uint 7851 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 7852 { 7853 return aux->bitmap & bitmask ? 7854 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 7855 } 7856 7857 static void 7858 qla28xx_component_status( 7859 struct active_regions *active_regions, struct qla27xx_image_status *aux) 7860 { 7861 active_regions->aux.board_config = 7862 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 7863 7864 active_regions->aux.vpd_nvram = 7865 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 7866 7867 active_regions->aux.npiv_config_0_1 = 7868 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 7869 7870 active_regions->aux.npiv_config_2_3 = 7871 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 7872 } 7873 7874 static int 7875 qla27xx_compare_image_generation( 7876 struct qla27xx_image_status *pri_image_status, 7877 struct qla27xx_image_status *sec_image_status) 7878 { 7879 /* calculate generation delta as uint16 (this accounts for wrap) */ 7880 int16_t delta = 7881 le16_to_cpu(pri_image_status->generation) - 7882 le16_to_cpu(sec_image_status->generation); 7883 7884 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 7885 7886 return delta; 7887 } 7888 7889 void 7890 qla28xx_get_aux_images( 7891 struct scsi_qla_host *vha, struct active_regions *active_regions) 7892 { 7893 struct qla_hw_data *ha = vha->hw; 7894 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 7895 bool valid_pri_image = false, valid_sec_image = false; 7896 bool active_pri_image = false, active_sec_image = false; 7897 7898 if (!ha->flt_region_aux_img_status_pri) { 7899 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 7900 goto check_sec_image; 7901 } 7902 7903 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status, 7904 ha->flt_region_aux_img_status_pri, 7905 sizeof(pri_aux_image_status) >> 2); 7906 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 7907 7908 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 7909 ql_dbg(ql_dbg_init, vha, 0x018b, 7910 "Primary aux image signature (%#x) not valid\n", 7911 le32_to_cpu(pri_aux_image_status.signature)); 7912 goto check_sec_image; 7913 } 7914 7915 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 7916 ql_dbg(ql_dbg_init, vha, 0x018c, 7917 "Primary aux image checksum failed\n"); 7918 goto check_sec_image; 7919 } 7920 7921 valid_pri_image = true; 7922 7923 if (pri_aux_image_status.image_status_mask & 1) { 7924 ql_dbg(ql_dbg_init, vha, 0x018d, 7925 "Primary aux image is active\n"); 7926 active_pri_image = true; 7927 } 7928 7929 check_sec_image: 7930 if (!ha->flt_region_aux_img_status_sec) { 7931 ql_dbg(ql_dbg_init, vha, 0x018a, 7932 "Secondary aux image not addressed\n"); 7933 goto check_valid_image; 7934 } 7935 7936 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status, 7937 ha->flt_region_aux_img_status_sec, 7938 sizeof(sec_aux_image_status) >> 2); 7939 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 7940 7941 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 7942 ql_dbg(ql_dbg_init, vha, 0x018b, 7943 "Secondary aux image signature (%#x) not valid\n", 7944 le32_to_cpu(sec_aux_image_status.signature)); 7945 goto check_valid_image; 7946 } 7947 7948 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 7949 ql_dbg(ql_dbg_init, vha, 0x018c, 7950 "Secondary aux image checksum failed\n"); 7951 goto check_valid_image; 7952 } 7953 7954 valid_sec_image = true; 7955 7956 if (sec_aux_image_status.image_status_mask & 1) { 7957 ql_dbg(ql_dbg_init, vha, 0x018d, 7958 "Secondary aux image is active\n"); 7959 active_sec_image = true; 7960 } 7961 7962 check_valid_image: 7963 if (valid_pri_image && active_pri_image && 7964 valid_sec_image && active_sec_image) { 7965 if (qla27xx_compare_image_generation(&pri_aux_image_status, 7966 &sec_aux_image_status) >= 0) { 7967 qla28xx_component_status(active_regions, 7968 &pri_aux_image_status); 7969 } else { 7970 qla28xx_component_status(active_regions, 7971 &sec_aux_image_status); 7972 } 7973 } else if (valid_pri_image && active_pri_image) { 7974 qla28xx_component_status(active_regions, &pri_aux_image_status); 7975 } else if (valid_sec_image && active_sec_image) { 7976 qla28xx_component_status(active_regions, &sec_aux_image_status); 7977 } 7978 7979 ql_dbg(ql_dbg_init, vha, 0x018f, 7980 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n", 7981 active_regions->aux.board_config, 7982 active_regions->aux.vpd_nvram, 7983 active_regions->aux.npiv_config_0_1, 7984 active_regions->aux.npiv_config_2_3); 7985 } 7986 7987 void 7988 qla27xx_get_active_image(struct scsi_qla_host *vha, 7989 struct active_regions *active_regions) 7990 { 7991 struct qla_hw_data *ha = vha->hw; 7992 struct qla27xx_image_status pri_image_status, sec_image_status; 7993 bool valid_pri_image = false, valid_sec_image = false; 7994 bool active_pri_image = false, active_sec_image = false; 7995 7996 if (!ha->flt_region_img_status_pri) { 7997 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 7998 goto check_sec_image; 7999 } 8000 8001 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status, 8002 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 8003 QLA_SUCCESS) { 8004 WARN_ON_ONCE(true); 8005 goto check_sec_image; 8006 } 8007 qla27xx_print_image(vha, "Primary image", &pri_image_status); 8008 8009 if (qla27xx_check_image_status_signature(&pri_image_status)) { 8010 ql_dbg(ql_dbg_init, vha, 0x018b, 8011 "Primary image signature (%#x) not valid\n", 8012 le32_to_cpu(pri_image_status.signature)); 8013 goto check_sec_image; 8014 } 8015 8016 if (qla27xx_image_status_checksum(&pri_image_status)) { 8017 ql_dbg(ql_dbg_init, vha, 0x018c, 8018 "Primary image checksum failed\n"); 8019 goto check_sec_image; 8020 } 8021 8022 valid_pri_image = true; 8023 8024 if (pri_image_status.image_status_mask & 1) { 8025 ql_dbg(ql_dbg_init, vha, 0x018d, 8026 "Primary image is active\n"); 8027 active_pri_image = true; 8028 } 8029 8030 check_sec_image: 8031 if (!ha->flt_region_img_status_sec) { 8032 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 8033 goto check_valid_image; 8034 } 8035 8036 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 8037 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 8038 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 8039 8040 if (qla27xx_check_image_status_signature(&sec_image_status)) { 8041 ql_dbg(ql_dbg_init, vha, 0x018b, 8042 "Secondary image signature (%#x) not valid\n", 8043 le32_to_cpu(sec_image_status.signature)); 8044 goto check_valid_image; 8045 } 8046 8047 if (qla27xx_image_status_checksum(&sec_image_status)) { 8048 ql_dbg(ql_dbg_init, vha, 0x018c, 8049 "Secondary image checksum failed\n"); 8050 goto check_valid_image; 8051 } 8052 8053 valid_sec_image = true; 8054 8055 if (sec_image_status.image_status_mask & 1) { 8056 ql_dbg(ql_dbg_init, vha, 0x018d, 8057 "Secondary image is active\n"); 8058 active_sec_image = true; 8059 } 8060 8061 check_valid_image: 8062 if (valid_pri_image && active_pri_image) 8063 active_regions->global = QLA27XX_PRIMARY_IMAGE; 8064 8065 if (valid_sec_image && active_sec_image) { 8066 if (!active_regions->global || 8067 qla27xx_compare_image_generation( 8068 &pri_image_status, &sec_image_status) < 0) { 8069 active_regions->global = QLA27XX_SECONDARY_IMAGE; 8070 } 8071 } 8072 8073 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 8074 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 8075 "default (boot/fw)" : 8076 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 8077 "primary" : 8078 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 8079 "secondary" : "invalid", 8080 active_regions->global); 8081 } 8082 8083 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 8084 { 8085 return 8086 !(dword[4] | dword[5] | dword[6] | dword[7]) || 8087 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 8088 } 8089 8090 static int 8091 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 8092 uint32_t faddr) 8093 { 8094 int rval; 8095 uint templates, segments, fragment; 8096 ulong i; 8097 uint j; 8098 ulong dlen; 8099 uint32_t *dcode; 8100 uint32_t risc_addr, risc_size, risc_attr = 0; 8101 struct qla_hw_data *ha = vha->hw; 8102 struct req_que *req = ha->req_q_map[0]; 8103 struct fwdt *fwdt = ha->fwdt; 8104 8105 ql_dbg(ql_dbg_init, vha, 0x008b, 8106 "FW: Loading firmware from flash (%x).\n", faddr); 8107 8108 dcode = (uint32_t *)req->ring; 8109 qla24xx_read_flash_data(vha, dcode, faddr, 8); 8110 if (qla24xx_risc_firmware_invalid(dcode)) { 8111 ql_log(ql_log_fatal, vha, 0x008c, 8112 "Unable to verify the integrity of flash firmware " 8113 "image.\n"); 8114 ql_log(ql_log_fatal, vha, 0x008d, 8115 "Firmware data: %08x %08x %08x %08x.\n", 8116 dcode[0], dcode[1], dcode[2], dcode[3]); 8117 8118 return QLA_FUNCTION_FAILED; 8119 } 8120 8121 dcode = (uint32_t *)req->ring; 8122 *srisc_addr = 0; 8123 segments = FA_RISC_CODE_SEGMENTS; 8124 for (j = 0; j < segments; j++) { 8125 ql_dbg(ql_dbg_init, vha, 0x008d, 8126 "-> Loading segment %u...\n", j); 8127 qla24xx_read_flash_data(vha, dcode, faddr, 10); 8128 risc_addr = be32_to_cpu((__force __be32)dcode[2]); 8129 risc_size = be32_to_cpu((__force __be32)dcode[3]); 8130 if (!*srisc_addr) { 8131 *srisc_addr = risc_addr; 8132 risc_attr = be32_to_cpu((__force __be32)dcode[9]); 8133 } 8134 8135 dlen = ha->fw_transfer_size >> 2; 8136 for (fragment = 0; risc_size; fragment++) { 8137 if (dlen > risc_size) 8138 dlen = risc_size; 8139 8140 ql_dbg(ql_dbg_init, vha, 0x008e, 8141 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 8142 fragment, risc_addr, faddr, dlen); 8143 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 8144 for (i = 0; i < dlen; i++) 8145 dcode[i] = swab32(dcode[i]); 8146 8147 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8148 if (rval) { 8149 ql_log(ql_log_fatal, vha, 0x008f, 8150 "-> Failed load firmware fragment %u.\n", 8151 fragment); 8152 return QLA_FUNCTION_FAILED; 8153 } 8154 8155 faddr += dlen; 8156 risc_addr += dlen; 8157 risc_size -= dlen; 8158 } 8159 } 8160 8161 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8162 return QLA_SUCCESS; 8163 8164 templates = (risc_attr & BIT_9) ? 2 : 1; 8165 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 8166 for (j = 0; j < templates; j++, fwdt++) { 8167 vfree(fwdt->template); 8168 fwdt->template = NULL; 8169 fwdt->length = 0; 8170 8171 dcode = (uint32_t *)req->ring; 8172 qla24xx_read_flash_data(vha, dcode, faddr, 7); 8173 risc_size = be32_to_cpu((__force __be32)dcode[2]); 8174 ql_dbg(ql_dbg_init, vha, 0x0161, 8175 "-> fwdt%u template array at %#x (%#x dwords)\n", 8176 j, faddr, risc_size); 8177 if (!risc_size || !~risc_size) { 8178 ql_dbg(ql_dbg_init, vha, 0x0162, 8179 "-> fwdt%u failed to read array\n", j); 8180 goto failed; 8181 } 8182 8183 /* skip header and ignore checksum */ 8184 faddr += 7; 8185 risc_size -= 8; 8186 8187 ql_dbg(ql_dbg_init, vha, 0x0163, 8188 "-> fwdt%u template allocate template %#x words...\n", 8189 j, risc_size); 8190 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8191 if (!fwdt->template) { 8192 ql_log(ql_log_warn, vha, 0x0164, 8193 "-> fwdt%u failed allocate template.\n", j); 8194 goto failed; 8195 } 8196 8197 dcode = fwdt->template; 8198 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 8199 8200 if (!qla27xx_fwdt_template_valid(dcode)) { 8201 ql_log(ql_log_warn, vha, 0x0165, 8202 "-> fwdt%u failed template validate\n", j); 8203 goto failed; 8204 } 8205 8206 dlen = qla27xx_fwdt_template_size(dcode); 8207 ql_dbg(ql_dbg_init, vha, 0x0166, 8208 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8209 j, dlen, dlen / sizeof(*dcode)); 8210 if (dlen > risc_size * sizeof(*dcode)) { 8211 ql_log(ql_log_warn, vha, 0x0167, 8212 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8213 j, dlen - risc_size * sizeof(*dcode)); 8214 goto failed; 8215 } 8216 8217 fwdt->length = dlen; 8218 ql_dbg(ql_dbg_init, vha, 0x0168, 8219 "-> fwdt%u loaded template ok\n", j); 8220 8221 faddr += risc_size + 1; 8222 } 8223 8224 return QLA_SUCCESS; 8225 8226 failed: 8227 vfree(fwdt->template); 8228 fwdt->template = NULL; 8229 fwdt->length = 0; 8230 8231 return QLA_SUCCESS; 8232 } 8233 8234 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 8235 8236 int 8237 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8238 { 8239 int rval; 8240 int i, fragment; 8241 uint16_t *wcode; 8242 __be16 *fwcode; 8243 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 8244 struct fw_blob *blob; 8245 struct qla_hw_data *ha = vha->hw; 8246 struct req_que *req = ha->req_q_map[0]; 8247 8248 /* Load firmware blob. */ 8249 blob = qla2x00_request_firmware(vha); 8250 if (!blob) { 8251 ql_log(ql_log_info, vha, 0x0083, 8252 "Firmware image unavailable.\n"); 8253 ql_log(ql_log_info, vha, 0x0084, 8254 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 8255 return QLA_FUNCTION_FAILED; 8256 } 8257 8258 rval = QLA_SUCCESS; 8259 8260 wcode = (uint16_t *)req->ring; 8261 *srisc_addr = 0; 8262 fwcode = (__force __be16 *)blob->fw->data; 8263 fwclen = 0; 8264 8265 /* Validate firmware image by checking version. */ 8266 if (blob->fw->size < 8 * sizeof(uint16_t)) { 8267 ql_log(ql_log_fatal, vha, 0x0085, 8268 "Unable to verify integrity of firmware image (%zd).\n", 8269 blob->fw->size); 8270 goto fail_fw_integrity; 8271 } 8272 for (i = 0; i < 4; i++) 8273 wcode[i] = be16_to_cpu(fwcode[i + 4]); 8274 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 8275 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 8276 wcode[2] == 0 && wcode[3] == 0)) { 8277 ql_log(ql_log_fatal, vha, 0x0086, 8278 "Unable to verify integrity of firmware image.\n"); 8279 ql_log(ql_log_fatal, vha, 0x0087, 8280 "Firmware data: %04x %04x %04x %04x.\n", 8281 wcode[0], wcode[1], wcode[2], wcode[3]); 8282 goto fail_fw_integrity; 8283 } 8284 8285 seg = blob->segs; 8286 while (*seg && rval == QLA_SUCCESS) { 8287 risc_addr = *seg; 8288 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 8289 risc_size = be16_to_cpu(fwcode[3]); 8290 8291 /* Validate firmware image size. */ 8292 fwclen += risc_size * sizeof(uint16_t); 8293 if (blob->fw->size < fwclen) { 8294 ql_log(ql_log_fatal, vha, 0x0088, 8295 "Unable to verify integrity of firmware image " 8296 "(%zd).\n", blob->fw->size); 8297 goto fail_fw_integrity; 8298 } 8299 8300 fragment = 0; 8301 while (risc_size > 0 && rval == QLA_SUCCESS) { 8302 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 8303 if (wlen > risc_size) 8304 wlen = risc_size; 8305 ql_dbg(ql_dbg_init, vha, 0x0089, 8306 "Loading risc segment@ risc addr %x number of " 8307 "words 0x%x.\n", risc_addr, wlen); 8308 8309 for (i = 0; i < wlen; i++) 8310 wcode[i] = swab16((__force u32)fwcode[i]); 8311 8312 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 8313 wlen); 8314 if (rval) { 8315 ql_log(ql_log_fatal, vha, 0x008a, 8316 "Failed to load segment %d of firmware.\n", 8317 fragment); 8318 break; 8319 } 8320 8321 fwcode += wlen; 8322 risc_addr += wlen; 8323 risc_size -= wlen; 8324 fragment++; 8325 } 8326 8327 /* Next segment. */ 8328 seg++; 8329 } 8330 return rval; 8331 8332 fail_fw_integrity: 8333 return QLA_FUNCTION_FAILED; 8334 } 8335 8336 static int 8337 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8338 { 8339 int rval; 8340 uint templates, segments, fragment; 8341 uint32_t *dcode; 8342 ulong dlen; 8343 uint32_t risc_addr, risc_size, risc_attr = 0; 8344 ulong i; 8345 uint j; 8346 struct fw_blob *blob; 8347 __be32 *fwcode; 8348 struct qla_hw_data *ha = vha->hw; 8349 struct req_que *req = ha->req_q_map[0]; 8350 struct fwdt *fwdt = ha->fwdt; 8351 8352 ql_dbg(ql_dbg_init, vha, 0x0090, 8353 "-> FW: Loading via request-firmware.\n"); 8354 8355 blob = qla2x00_request_firmware(vha); 8356 if (!blob) { 8357 ql_log(ql_log_warn, vha, 0x0092, 8358 "-> Firmware file not found.\n"); 8359 8360 return QLA_FUNCTION_FAILED; 8361 } 8362 8363 fwcode = (__force __be32 *)blob->fw->data; 8364 dcode = (__force uint32_t *)fwcode; 8365 if (qla24xx_risc_firmware_invalid(dcode)) { 8366 ql_log(ql_log_fatal, vha, 0x0093, 8367 "Unable to verify integrity of firmware image (%zd).\n", 8368 blob->fw->size); 8369 ql_log(ql_log_fatal, vha, 0x0095, 8370 "Firmware data: %08x %08x %08x %08x.\n", 8371 dcode[0], dcode[1], dcode[2], dcode[3]); 8372 return QLA_FUNCTION_FAILED; 8373 } 8374 8375 dcode = (uint32_t *)req->ring; 8376 *srisc_addr = 0; 8377 segments = FA_RISC_CODE_SEGMENTS; 8378 for (j = 0; j < segments; j++) { 8379 ql_dbg(ql_dbg_init, vha, 0x0096, 8380 "-> Loading segment %u...\n", j); 8381 risc_addr = be32_to_cpu(fwcode[2]); 8382 risc_size = be32_to_cpu(fwcode[3]); 8383 8384 if (!*srisc_addr) { 8385 *srisc_addr = risc_addr; 8386 risc_attr = be32_to_cpu(fwcode[9]); 8387 } 8388 8389 dlen = ha->fw_transfer_size >> 2; 8390 for (fragment = 0; risc_size; fragment++) { 8391 if (dlen > risc_size) 8392 dlen = risc_size; 8393 8394 ql_dbg(ql_dbg_init, vha, 0x0097, 8395 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 8396 fragment, risc_addr, 8397 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 8398 dlen); 8399 8400 for (i = 0; i < dlen; i++) 8401 dcode[i] = swab32((__force u32)fwcode[i]); 8402 8403 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8404 if (rval) { 8405 ql_log(ql_log_fatal, vha, 0x0098, 8406 "-> Failed load firmware fragment %u.\n", 8407 fragment); 8408 return QLA_FUNCTION_FAILED; 8409 } 8410 8411 fwcode += dlen; 8412 risc_addr += dlen; 8413 risc_size -= dlen; 8414 } 8415 } 8416 8417 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8418 return QLA_SUCCESS; 8419 8420 templates = (risc_attr & BIT_9) ? 2 : 1; 8421 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 8422 for (j = 0; j < templates; j++, fwdt++) { 8423 vfree(fwdt->template); 8424 fwdt->template = NULL; 8425 fwdt->length = 0; 8426 8427 risc_size = be32_to_cpu(fwcode[2]); 8428 ql_dbg(ql_dbg_init, vha, 0x0171, 8429 "-> fwdt%u template array at %#x (%#x dwords)\n", 8430 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 8431 risc_size); 8432 if (!risc_size || !~risc_size) { 8433 ql_dbg(ql_dbg_init, vha, 0x0172, 8434 "-> fwdt%u failed to read array\n", j); 8435 goto failed; 8436 } 8437 8438 /* skip header and ignore checksum */ 8439 fwcode += 7; 8440 risc_size -= 8; 8441 8442 ql_dbg(ql_dbg_init, vha, 0x0173, 8443 "-> fwdt%u template allocate template %#x words...\n", 8444 j, risc_size); 8445 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8446 if (!fwdt->template) { 8447 ql_log(ql_log_warn, vha, 0x0174, 8448 "-> fwdt%u failed allocate template.\n", j); 8449 goto failed; 8450 } 8451 8452 dcode = fwdt->template; 8453 for (i = 0; i < risc_size; i++) 8454 dcode[i] = (__force u32)fwcode[i]; 8455 8456 if (!qla27xx_fwdt_template_valid(dcode)) { 8457 ql_log(ql_log_warn, vha, 0x0175, 8458 "-> fwdt%u failed template validate\n", j); 8459 goto failed; 8460 } 8461 8462 dlen = qla27xx_fwdt_template_size(dcode); 8463 ql_dbg(ql_dbg_init, vha, 0x0176, 8464 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8465 j, dlen, dlen / sizeof(*dcode)); 8466 if (dlen > risc_size * sizeof(*dcode)) { 8467 ql_log(ql_log_warn, vha, 0x0177, 8468 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8469 j, dlen - risc_size * sizeof(*dcode)); 8470 goto failed; 8471 } 8472 8473 fwdt->length = dlen; 8474 ql_dbg(ql_dbg_init, vha, 0x0178, 8475 "-> fwdt%u loaded template ok\n", j); 8476 8477 fwcode += risc_size + 1; 8478 } 8479 8480 return QLA_SUCCESS; 8481 8482 failed: 8483 vfree(fwdt->template); 8484 fwdt->template = NULL; 8485 fwdt->length = 0; 8486 8487 return QLA_SUCCESS; 8488 } 8489 8490 int 8491 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8492 { 8493 int rval; 8494 8495 if (ql2xfwloadbin == 1) 8496 return qla81xx_load_risc(vha, srisc_addr); 8497 8498 /* 8499 * FW Load priority: 8500 * 1) Firmware via request-firmware interface (.bin file). 8501 * 2) Firmware residing in flash. 8502 */ 8503 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8504 if (rval == QLA_SUCCESS) 8505 return rval; 8506 8507 return qla24xx_load_risc_flash(vha, srisc_addr, 8508 vha->hw->flt_region_fw); 8509 } 8510 8511 int 8512 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8513 { 8514 int rval; 8515 struct qla_hw_data *ha = vha->hw; 8516 struct active_regions active_regions = { }; 8517 8518 if (ql2xfwloadbin == 2) 8519 goto try_blob_fw; 8520 8521 /* FW Load priority: 8522 * 1) Firmware residing in flash. 8523 * 2) Firmware via request-firmware interface (.bin file). 8524 * 3) Golden-Firmware residing in flash -- (limited operation). 8525 */ 8526 8527 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8528 goto try_primary_fw; 8529 8530 qla27xx_get_active_image(vha, &active_regions); 8531 8532 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8533 goto try_primary_fw; 8534 8535 ql_dbg(ql_dbg_init, vha, 0x008b, 8536 "Loading secondary firmware image.\n"); 8537 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8538 if (!rval) 8539 return rval; 8540 8541 try_primary_fw: 8542 ql_dbg(ql_dbg_init, vha, 0x008b, 8543 "Loading primary firmware image.\n"); 8544 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8545 if (!rval) 8546 return rval; 8547 8548 try_blob_fw: 8549 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8550 if (!rval || !ha->flt_region_gold_fw) 8551 return rval; 8552 8553 ql_log(ql_log_info, vha, 0x0099, 8554 "Attempting to fallback to golden firmware.\n"); 8555 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8556 if (rval) 8557 return rval; 8558 8559 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8560 ha->flags.running_gold_fw = 1; 8561 return rval; 8562 } 8563 8564 void 8565 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8566 { 8567 int ret, retries; 8568 struct qla_hw_data *ha = vha->hw; 8569 8570 if (ha->flags.pci_channel_io_perm_failure) 8571 return; 8572 if (!IS_FWI2_CAPABLE(ha)) 8573 return; 8574 if (!ha->fw_major_version) 8575 return; 8576 if (!ha->flags.fw_started) 8577 return; 8578 8579 ret = qla2x00_stop_firmware(vha); 8580 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8581 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8582 ha->isp_ops->reset_chip(vha); 8583 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8584 continue; 8585 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8586 continue; 8587 ql_log(ql_log_info, vha, 0x8015, 8588 "Attempting retry of stop-firmware command.\n"); 8589 ret = qla2x00_stop_firmware(vha); 8590 } 8591 8592 QLA_FW_STOPPED(ha); 8593 ha->flags.fw_init_done = 0; 8594 } 8595 8596 int 8597 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8598 { 8599 int rval = QLA_SUCCESS; 8600 int rval2; 8601 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8602 struct qla_hw_data *ha = vha->hw; 8603 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8604 8605 if (!vha->vp_idx) 8606 return -EINVAL; 8607 8608 rval = qla2x00_fw_ready(base_vha); 8609 8610 if (rval == QLA_SUCCESS) { 8611 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8612 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8613 } 8614 8615 vha->flags.management_server_logged_in = 0; 8616 8617 /* Login to SNS first */ 8618 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8619 BIT_1); 8620 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8621 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8622 ql_dbg(ql_dbg_init, vha, 0x0120, 8623 "Failed SNS login: loop_id=%x, rval2=%d\n", 8624 NPH_SNS, rval2); 8625 else 8626 ql_dbg(ql_dbg_init, vha, 0x0103, 8627 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8628 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8629 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8630 return (QLA_FUNCTION_FAILED); 8631 } 8632 8633 atomic_set(&vha->loop_down_timer, 0); 8634 atomic_set(&vha->loop_state, LOOP_UP); 8635 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8636 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8637 rval = qla2x00_loop_resync(base_vha); 8638 8639 return rval; 8640 } 8641 8642 /* 84XX Support **************************************************************/ 8643 8644 static LIST_HEAD(qla_cs84xx_list); 8645 static DEFINE_MUTEX(qla_cs84xx_mutex); 8646 8647 static struct qla_chip_state_84xx * 8648 qla84xx_get_chip(struct scsi_qla_host *vha) 8649 { 8650 struct qla_chip_state_84xx *cs84xx; 8651 struct qla_hw_data *ha = vha->hw; 8652 8653 mutex_lock(&qla_cs84xx_mutex); 8654 8655 /* Find any shared 84xx chip. */ 8656 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8657 if (cs84xx->bus == ha->pdev->bus) { 8658 kref_get(&cs84xx->kref); 8659 goto done; 8660 } 8661 } 8662 8663 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8664 if (!cs84xx) 8665 goto done; 8666 8667 kref_init(&cs84xx->kref); 8668 spin_lock_init(&cs84xx->access_lock); 8669 mutex_init(&cs84xx->fw_update_mutex); 8670 cs84xx->bus = ha->pdev->bus; 8671 8672 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8673 done: 8674 mutex_unlock(&qla_cs84xx_mutex); 8675 return cs84xx; 8676 } 8677 8678 static void 8679 __qla84xx_chip_release(struct kref *kref) 8680 { 8681 struct qla_chip_state_84xx *cs84xx = 8682 container_of(kref, struct qla_chip_state_84xx, kref); 8683 8684 mutex_lock(&qla_cs84xx_mutex); 8685 list_del(&cs84xx->list); 8686 mutex_unlock(&qla_cs84xx_mutex); 8687 kfree(cs84xx); 8688 } 8689 8690 void 8691 qla84xx_put_chip(struct scsi_qla_host *vha) 8692 { 8693 struct qla_hw_data *ha = vha->hw; 8694 8695 if (ha->cs84xx) 8696 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8697 } 8698 8699 static int 8700 qla84xx_init_chip(scsi_qla_host_t *vha) 8701 { 8702 int rval; 8703 uint16_t status[2]; 8704 struct qla_hw_data *ha = vha->hw; 8705 8706 mutex_lock(&ha->cs84xx->fw_update_mutex); 8707 8708 rval = qla84xx_verify_chip(vha, status); 8709 8710 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8711 8712 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8713 QLA_SUCCESS; 8714 } 8715 8716 /* 81XX Support **************************************************************/ 8717 8718 int 8719 qla81xx_nvram_config(scsi_qla_host_t *vha) 8720 { 8721 int rval; 8722 struct init_cb_81xx *icb; 8723 struct nvram_81xx *nv; 8724 __le32 *dptr; 8725 uint8_t *dptr1, *dptr2; 8726 uint32_t chksum; 8727 uint16_t cnt; 8728 struct qla_hw_data *ha = vha->hw; 8729 uint32_t faddr; 8730 struct active_regions active_regions = { }; 8731 8732 rval = QLA_SUCCESS; 8733 icb = (struct init_cb_81xx *)ha->init_cb; 8734 nv = ha->nvram; 8735 8736 /* Determine NVRAM starting address. */ 8737 ha->nvram_size = sizeof(*nv); 8738 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8739 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8740 ha->vpd_size = FA_VPD_SIZE_82XX; 8741 8742 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8743 qla28xx_get_aux_images(vha, &active_regions); 8744 8745 /* Get VPD data into cache */ 8746 ha->vpd = ha->nvram + VPD_OFFSET; 8747 8748 faddr = ha->flt_region_vpd; 8749 if (IS_QLA28XX(ha)) { 8750 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8751 faddr = ha->flt_region_vpd_sec; 8752 ql_dbg(ql_dbg_init, vha, 0x0110, 8753 "Loading %s nvram image.\n", 8754 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8755 "primary" : "secondary"); 8756 } 8757 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8758 8759 /* Get NVRAM data into cache and calculate checksum. */ 8760 faddr = ha->flt_region_nvram; 8761 if (IS_QLA28XX(ha)) { 8762 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8763 faddr = ha->flt_region_nvram_sec; 8764 } 8765 ql_dbg(ql_dbg_init, vha, 0x0110, 8766 "Loading %s nvram image.\n", 8767 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8768 "primary" : "secondary"); 8769 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8770 8771 dptr = (__force __le32 *)nv; 8772 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8773 chksum += le32_to_cpu(*dptr); 8774 8775 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8776 "Contents of NVRAM:\n"); 8777 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8778 nv, ha->nvram_size); 8779 8780 /* Bad NVRAM data, set defaults parameters. */ 8781 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 8782 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 8783 /* Reset NVRAM data. */ 8784 ql_log(ql_log_info, vha, 0x0073, 8785 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 8786 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 8787 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 8788 ql_log(ql_log_info, vha, 0x0074, 8789 "Falling back to functioning (yet invalid -- WWPN) " 8790 "defaults.\n"); 8791 8792 /* 8793 * Set default initialization control block. 8794 */ 8795 memset(nv, 0, ha->nvram_size); 8796 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8797 nv->version = cpu_to_le16(ICB_VERSION); 8798 nv->frame_payload_size = cpu_to_le16(2048); 8799 nv->execution_throttle = cpu_to_le16(0xFFFF); 8800 nv->exchange_count = cpu_to_le16(0); 8801 nv->port_name[0] = 0x21; 8802 nv->port_name[1] = 0x00 + ha->port_no + 1; 8803 nv->port_name[2] = 0x00; 8804 nv->port_name[3] = 0xe0; 8805 nv->port_name[4] = 0x8b; 8806 nv->port_name[5] = 0x1c; 8807 nv->port_name[6] = 0x55; 8808 nv->port_name[7] = 0x86; 8809 nv->node_name[0] = 0x20; 8810 nv->node_name[1] = 0x00; 8811 nv->node_name[2] = 0x00; 8812 nv->node_name[3] = 0xe0; 8813 nv->node_name[4] = 0x8b; 8814 nv->node_name[5] = 0x1c; 8815 nv->node_name[6] = 0x55; 8816 nv->node_name[7] = 0x86; 8817 nv->login_retry_count = cpu_to_le16(8); 8818 nv->interrupt_delay_timer = cpu_to_le16(0); 8819 nv->login_timeout = cpu_to_le16(0); 8820 nv->firmware_options_1 = 8821 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8822 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8823 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8824 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8825 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8826 nv->efi_parameters = cpu_to_le32(0); 8827 nv->reset_delay = 5; 8828 nv->max_luns_per_target = cpu_to_le16(128); 8829 nv->port_down_retry_count = cpu_to_le16(30); 8830 nv->link_down_timeout = cpu_to_le16(180); 8831 nv->enode_mac[0] = 0x00; 8832 nv->enode_mac[1] = 0xC0; 8833 nv->enode_mac[2] = 0xDD; 8834 nv->enode_mac[3] = 0x04; 8835 nv->enode_mac[4] = 0x05; 8836 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8837 8838 rval = 1; 8839 } 8840 8841 if (IS_T10_PI_CAPABLE(ha)) 8842 nv->frame_payload_size &= cpu_to_le16(~7); 8843 8844 qlt_81xx_config_nvram_stage1(vha, nv); 8845 8846 /* Reset Initialization control block */ 8847 memset(icb, 0, ha->init_cb_size); 8848 8849 /* Copy 1st segment. */ 8850 dptr1 = (uint8_t *)icb; 8851 dptr2 = (uint8_t *)&nv->version; 8852 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8853 while (cnt--) 8854 *dptr1++ = *dptr2++; 8855 8856 icb->login_retry_count = nv->login_retry_count; 8857 8858 /* Copy 2nd segment. */ 8859 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8860 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8861 cnt = (uint8_t *)&icb->reserved_5 - 8862 (uint8_t *)&icb->interrupt_delay_timer; 8863 while (cnt--) 8864 *dptr1++ = *dptr2++; 8865 8866 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8867 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8868 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8869 icb->enode_mac[0] = 0x00; 8870 icb->enode_mac[1] = 0xC0; 8871 icb->enode_mac[2] = 0xDD; 8872 icb->enode_mac[3] = 0x04; 8873 icb->enode_mac[4] = 0x05; 8874 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8875 } 8876 8877 /* Use extended-initialization control block. */ 8878 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8879 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8880 /* 8881 * Setup driver NVRAM options. 8882 */ 8883 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8884 "QLE8XXX"); 8885 8886 qlt_81xx_config_nvram_stage2(vha, icb); 8887 8888 /* Use alternate WWN? */ 8889 if (nv->host_p & cpu_to_le32(BIT_15)) { 8890 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8891 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8892 } 8893 8894 /* Prepare nodename */ 8895 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8896 /* 8897 * Firmware will apply the following mask if the nodename was 8898 * not provided. 8899 */ 8900 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8901 icb->node_name[0] &= 0xF0; 8902 } 8903 8904 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) { 8905 if ((nv->enhanced_features & BIT_7) == 0) 8906 ha->flags.scm_supported_a = 1; 8907 } 8908 8909 /* Set host adapter parameters. */ 8910 ha->flags.disable_risc_code_load = 0; 8911 ha->flags.enable_lip_reset = 0; 8912 ha->flags.enable_lip_full_login = 8913 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 8914 ha->flags.enable_target_reset = 8915 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8916 ha->flags.enable_led_scheme = 0; 8917 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8918 8919 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8920 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8921 8922 /* save HBA serial number */ 8923 ha->serial0 = icb->port_name[5]; 8924 ha->serial1 = icb->port_name[6]; 8925 ha->serial2 = icb->port_name[7]; 8926 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8927 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8928 8929 icb->execution_throttle = cpu_to_le16(0xFFFF); 8930 8931 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8932 8933 /* Set minimum login_timeout to 4 seconds. */ 8934 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8935 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8936 if (le16_to_cpu(nv->login_timeout) < 4) 8937 nv->login_timeout = cpu_to_le16(4); 8938 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8939 8940 /* Set minimum RATOV to 100 tenths of a second. */ 8941 ha->r_a_tov = 100; 8942 8943 ha->loop_reset_delay = nv->reset_delay; 8944 8945 /* Link Down Timeout = 0: 8946 * 8947 * When Port Down timer expires we will start returning 8948 * I/O's to OS with "DID_NO_CONNECT". 8949 * 8950 * Link Down Timeout != 0: 8951 * 8952 * The driver waits for the link to come up after link down 8953 * before returning I/Os to OS with "DID_NO_CONNECT". 8954 */ 8955 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8956 ha->loop_down_abort_time = 8957 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8958 } else { 8959 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8960 ha->loop_down_abort_time = 8961 (LOOP_DOWN_TIME - ha->link_down_timeout); 8962 } 8963 8964 /* Need enough time to try and get the port back. */ 8965 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8966 if (qlport_down_retry) 8967 ha->port_down_retry_count = qlport_down_retry; 8968 8969 /* Set login_retry_count */ 8970 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8971 if (ha->port_down_retry_count == 8972 le16_to_cpu(nv->port_down_retry_count) && 8973 ha->port_down_retry_count > 3) 8974 ha->login_retry_count = ha->port_down_retry_count; 8975 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8976 ha->login_retry_count = ha->port_down_retry_count; 8977 if (ql2xloginretrycount) 8978 ha->login_retry_count = ql2xloginretrycount; 8979 8980 /* if not running MSI-X we need handshaking on interrupts */ 8981 if (!vha->hw->flags.msix_enabled && 8982 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 8983 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8984 8985 /* Enable ZIO. */ 8986 if (!vha->flags.init_done) { 8987 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8988 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8989 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8990 le16_to_cpu(icb->interrupt_delay_timer) : 2; 8991 } 8992 icb->firmware_options_2 &= cpu_to_le32( 8993 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8994 vha->flags.process_response_queue = 0; 8995 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8996 ha->zio_mode = QLA_ZIO_MODE_6; 8997 8998 ql_log(ql_log_info, vha, 0x0075, 8999 "ZIO mode %d enabled; timer delay (%d us).\n", 9000 ha->zio_mode, 9001 ha->zio_timer * 100); 9002 9003 icb->firmware_options_2 |= cpu_to_le32( 9004 (uint32_t)ha->zio_mode); 9005 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 9006 vha->flags.process_response_queue = 1; 9007 } 9008 9009 /* enable RIDA Format2 */ 9010 icb->firmware_options_3 |= cpu_to_le32(BIT_0); 9011 9012 /* N2N: driver will initiate Login instead of FW */ 9013 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 9014 9015 /* Determine NVMe/FCP priority for target ports */ 9016 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 9017 9018 if (rval) { 9019 ql_log(ql_log_warn, vha, 0x0076, 9020 "NVRAM configuration failed.\n"); 9021 } 9022 return (rval); 9023 } 9024 9025 int 9026 qla82xx_restart_isp(scsi_qla_host_t *vha) 9027 { 9028 int status, rval; 9029 struct qla_hw_data *ha = vha->hw; 9030 struct scsi_qla_host *vp, *tvp; 9031 unsigned long flags; 9032 9033 status = qla2x00_init_rings(vha); 9034 if (!status) { 9035 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9036 ha->flags.chip_reset_done = 1; 9037 9038 status = qla2x00_fw_ready(vha); 9039 if (!status) { 9040 /* Issue a marker after FW becomes ready. */ 9041 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 9042 vha->flags.online = 1; 9043 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 9044 } 9045 9046 /* if no cable then assume it's good */ 9047 if ((vha->device_flags & DFLG_NO_CABLE)) 9048 status = 0; 9049 } 9050 9051 if (!status) { 9052 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9053 9054 if (!atomic_read(&vha->loop_down_timer)) { 9055 /* 9056 * Issue marker command only when we are going 9057 * to start the I/O . 9058 */ 9059 vha->marker_needed = 1; 9060 } 9061 9062 ha->isp_ops->enable_intrs(ha); 9063 9064 ha->isp_abort_cnt = 0; 9065 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 9066 9067 /* Update the firmware version */ 9068 status = qla82xx_check_md_needed(vha); 9069 9070 if (ha->fce) { 9071 ha->flags.fce_enabled = 1; 9072 memset(ha->fce, 0, 9073 fce_calc_size(ha->fce_bufs)); 9074 rval = qla2x00_enable_fce_trace(vha, 9075 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 9076 &ha->fce_bufs); 9077 if (rval) { 9078 ql_log(ql_log_warn, vha, 0x8001, 9079 "Unable to reinitialize FCE (%d).\n", 9080 rval); 9081 ha->flags.fce_enabled = 0; 9082 } 9083 } 9084 9085 if (ha->eft) { 9086 memset(ha->eft, 0, EFT_SIZE); 9087 rval = qla2x00_enable_eft_trace(vha, 9088 ha->eft_dma, EFT_NUM_BUFFERS); 9089 if (rval) { 9090 ql_log(ql_log_warn, vha, 0x8010, 9091 "Unable to reinitialize EFT (%d).\n", 9092 rval); 9093 } 9094 } 9095 } 9096 9097 if (!status) { 9098 ql_dbg(ql_dbg_taskm, vha, 0x8011, 9099 "qla82xx_restart_isp succeeded.\n"); 9100 9101 spin_lock_irqsave(&ha->vport_slock, flags); 9102 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 9103 if (vp->vp_idx) { 9104 atomic_inc(&vp->vref_count); 9105 spin_unlock_irqrestore(&ha->vport_slock, flags); 9106 9107 qla2x00_vp_abort_isp(vp); 9108 9109 spin_lock_irqsave(&ha->vport_slock, flags); 9110 atomic_dec(&vp->vref_count); 9111 } 9112 } 9113 spin_unlock_irqrestore(&ha->vport_slock, flags); 9114 9115 } else { 9116 ql_log(ql_log_warn, vha, 0x8016, 9117 "qla82xx_restart_isp **** FAILED ****.\n"); 9118 } 9119 9120 return status; 9121 } 9122 9123 /* 9124 * qla24xx_get_fcp_prio 9125 * Gets the fcp cmd priority value for the logged in port. 9126 * Looks for a match of the port descriptors within 9127 * each of the fcp prio config entries. If a match is found, 9128 * the tag (priority) value is returned. 9129 * 9130 * Input: 9131 * vha = scsi host structure pointer. 9132 * fcport = port structure pointer. 9133 * 9134 * Return: 9135 * non-zero (if found) 9136 * -1 (if not found) 9137 * 9138 * Context: 9139 * Kernel context 9140 */ 9141 static int 9142 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9143 { 9144 int i, entries; 9145 uint8_t pid_match, wwn_match; 9146 int priority; 9147 uint32_t pid1, pid2; 9148 uint64_t wwn1, wwn2; 9149 struct qla_fcp_prio_entry *pri_entry; 9150 struct qla_hw_data *ha = vha->hw; 9151 9152 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 9153 return -1; 9154 9155 priority = -1; 9156 entries = ha->fcp_prio_cfg->num_entries; 9157 pri_entry = &ha->fcp_prio_cfg->entry[0]; 9158 9159 for (i = 0; i < entries; i++) { 9160 pid_match = wwn_match = 0; 9161 9162 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 9163 pri_entry++; 9164 continue; 9165 } 9166 9167 /* check source pid for a match */ 9168 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 9169 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 9170 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 9171 if (pid1 == INVALID_PORT_ID) 9172 pid_match++; 9173 else if (pid1 == pid2) 9174 pid_match++; 9175 } 9176 9177 /* check destination pid for a match */ 9178 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 9179 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 9180 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 9181 if (pid1 == INVALID_PORT_ID) 9182 pid_match++; 9183 else if (pid1 == pid2) 9184 pid_match++; 9185 } 9186 9187 /* check source WWN for a match */ 9188 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 9189 wwn1 = wwn_to_u64(vha->port_name); 9190 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 9191 if (wwn2 == (uint64_t)-1) 9192 wwn_match++; 9193 else if (wwn1 == wwn2) 9194 wwn_match++; 9195 } 9196 9197 /* check destination WWN for a match */ 9198 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 9199 wwn1 = wwn_to_u64(fcport->port_name); 9200 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 9201 if (wwn2 == (uint64_t)-1) 9202 wwn_match++; 9203 else if (wwn1 == wwn2) 9204 wwn_match++; 9205 } 9206 9207 if (pid_match == 2 || wwn_match == 2) { 9208 /* Found a matching entry */ 9209 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 9210 priority = pri_entry->tag; 9211 break; 9212 } 9213 9214 pri_entry++; 9215 } 9216 9217 return priority; 9218 } 9219 9220 /* 9221 * qla24xx_update_fcport_fcp_prio 9222 * Activates fcp priority for the logged in fc port 9223 * 9224 * Input: 9225 * vha = scsi host structure pointer. 9226 * fcp = port structure pointer. 9227 * 9228 * Return: 9229 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9230 * 9231 * Context: 9232 * Kernel context. 9233 */ 9234 int 9235 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9236 { 9237 int ret; 9238 int priority; 9239 uint16_t mb[5]; 9240 9241 if (fcport->port_type != FCT_TARGET || 9242 fcport->loop_id == FC_NO_LOOP_ID) 9243 return QLA_FUNCTION_FAILED; 9244 9245 priority = qla24xx_get_fcp_prio(vha, fcport); 9246 if (priority < 0) 9247 return QLA_FUNCTION_FAILED; 9248 9249 if (IS_P3P_TYPE(vha->hw)) { 9250 fcport->fcp_prio = priority & 0xf; 9251 return QLA_SUCCESS; 9252 } 9253 9254 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 9255 if (ret == QLA_SUCCESS) { 9256 if (fcport->fcp_prio != priority) 9257 ql_dbg(ql_dbg_user, vha, 0x709e, 9258 "Updated FCP_CMND priority - value=%d loop_id=%d " 9259 "port_id=%02x%02x%02x.\n", priority, 9260 fcport->loop_id, fcport->d_id.b.domain, 9261 fcport->d_id.b.area, fcport->d_id.b.al_pa); 9262 fcport->fcp_prio = priority & 0xf; 9263 } else 9264 ql_dbg(ql_dbg_user, vha, 0x704f, 9265 "Unable to update FCP_CMND priority - ret=0x%x for " 9266 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 9267 fcport->d_id.b.domain, fcport->d_id.b.area, 9268 fcport->d_id.b.al_pa); 9269 return ret; 9270 } 9271 9272 /* 9273 * qla24xx_update_all_fcp_prio 9274 * Activates fcp priority for all the logged in ports 9275 * 9276 * Input: 9277 * ha = adapter block pointer. 9278 * 9279 * Return: 9280 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9281 * 9282 * Context: 9283 * Kernel context. 9284 */ 9285 int 9286 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 9287 { 9288 int ret; 9289 fc_port_t *fcport; 9290 9291 ret = QLA_FUNCTION_FAILED; 9292 /* We need to set priority for all logged in ports */ 9293 list_for_each_entry(fcport, &vha->vp_fcports, list) 9294 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 9295 9296 return ret; 9297 } 9298 9299 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 9300 int vp_idx, bool startqp) 9301 { 9302 int rsp_id = 0; 9303 int req_id = 0; 9304 int i; 9305 struct qla_hw_data *ha = vha->hw; 9306 uint16_t qpair_id = 0; 9307 struct qla_qpair *qpair = NULL; 9308 struct qla_msix_entry *msix; 9309 9310 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 9311 ql_log(ql_log_warn, vha, 0x00181, 9312 "FW/Driver is not multi-queue capable.\n"); 9313 return NULL; 9314 } 9315 9316 if (ql2xmqsupport || ql2xnvmeenable) { 9317 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 9318 if (qpair == NULL) { 9319 ql_log(ql_log_warn, vha, 0x0182, 9320 "Failed to allocate memory for queue pair.\n"); 9321 return NULL; 9322 } 9323 9324 qpair->hw = vha->hw; 9325 qpair->vha = vha; 9326 qpair->qp_lock_ptr = &qpair->qp_lock; 9327 spin_lock_init(&qpair->qp_lock); 9328 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 9329 9330 /* Assign available que pair id */ 9331 mutex_lock(&ha->mq_lock); 9332 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 9333 if (ha->num_qpairs >= ha->max_qpairs) { 9334 mutex_unlock(&ha->mq_lock); 9335 ql_log(ql_log_warn, vha, 0x0183, 9336 "No resources to create additional q pair.\n"); 9337 goto fail_qid_map; 9338 } 9339 ha->num_qpairs++; 9340 set_bit(qpair_id, ha->qpair_qid_map); 9341 ha->queue_pair_map[qpair_id] = qpair; 9342 qpair->id = qpair_id; 9343 qpair->vp_idx = vp_idx; 9344 qpair->fw_started = ha->flags.fw_started; 9345 INIT_LIST_HEAD(&qpair->hints_list); 9346 qpair->chip_reset = ha->base_qpair->chip_reset; 9347 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 9348 qpair->enable_explicit_conf = 9349 ha->base_qpair->enable_explicit_conf; 9350 9351 for (i = 0; i < ha->msix_count; i++) { 9352 msix = &ha->msix_entries[i]; 9353 if (msix->in_use) 9354 continue; 9355 qpair->msix = msix; 9356 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 9357 "Vector %x selected for qpair\n", msix->vector); 9358 break; 9359 } 9360 if (!qpair->msix) { 9361 ql_log(ql_log_warn, vha, 0x0184, 9362 "Out of MSI-X vectors!.\n"); 9363 goto fail_msix; 9364 } 9365 9366 qpair->msix->in_use = 1; 9367 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 9368 qpair->pdev = ha->pdev; 9369 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 9370 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 9371 9372 mutex_unlock(&ha->mq_lock); 9373 9374 /* Create response queue first */ 9375 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 9376 if (!rsp_id) { 9377 ql_log(ql_log_warn, vha, 0x0185, 9378 "Failed to create response queue.\n"); 9379 goto fail_rsp; 9380 } 9381 9382 qpair->rsp = ha->rsp_q_map[rsp_id]; 9383 9384 /* Create request queue */ 9385 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 9386 startqp); 9387 if (!req_id) { 9388 ql_log(ql_log_warn, vha, 0x0186, 9389 "Failed to create request queue.\n"); 9390 goto fail_req; 9391 } 9392 9393 qpair->req = ha->req_q_map[req_id]; 9394 qpair->rsp->req = qpair->req; 9395 qpair->rsp->qpair = qpair; 9396 /* init qpair to this cpu. Will adjust at run time. */ 9397 qla_cpu_update(qpair, smp_processor_id()); 9398 9399 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 9400 if (ha->fw_attributes & BIT_4) 9401 qpair->difdix_supported = 1; 9402 } 9403 9404 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 9405 if (!qpair->srb_mempool) { 9406 ql_log(ql_log_warn, vha, 0xd036, 9407 "Failed to create srb mempool for qpair %d\n", 9408 qpair->id); 9409 goto fail_mempool; 9410 } 9411 9412 /* Mark as online */ 9413 qpair->online = 1; 9414 9415 if (!vha->flags.qpairs_available) 9416 vha->flags.qpairs_available = 1; 9417 9418 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 9419 "Request/Response queue pair created, id %d\n", 9420 qpair->id); 9421 ql_dbg(ql_dbg_init, vha, 0x0187, 9422 "Request/Response queue pair created, id %d\n", 9423 qpair->id); 9424 } 9425 return qpair; 9426 9427 fail_mempool: 9428 fail_req: 9429 qla25xx_delete_rsp_que(vha, qpair->rsp); 9430 fail_rsp: 9431 mutex_lock(&ha->mq_lock); 9432 qpair->msix->in_use = 0; 9433 list_del(&qpair->qp_list_elem); 9434 if (list_empty(&vha->qp_list)) 9435 vha->flags.qpairs_available = 0; 9436 fail_msix: 9437 ha->queue_pair_map[qpair_id] = NULL; 9438 clear_bit(qpair_id, ha->qpair_qid_map); 9439 ha->num_qpairs--; 9440 mutex_unlock(&ha->mq_lock); 9441 fail_qid_map: 9442 kfree(qpair); 9443 return NULL; 9444 } 9445 9446 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9447 { 9448 int ret = QLA_FUNCTION_FAILED; 9449 struct qla_hw_data *ha = qpair->hw; 9450 9451 qpair->delete_in_progress = 1; 9452 9453 ret = qla25xx_delete_req_que(vha, qpair->req); 9454 if (ret != QLA_SUCCESS) 9455 goto fail; 9456 9457 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9458 if (ret != QLA_SUCCESS) 9459 goto fail; 9460 9461 mutex_lock(&ha->mq_lock); 9462 ha->queue_pair_map[qpair->id] = NULL; 9463 clear_bit(qpair->id, ha->qpair_qid_map); 9464 ha->num_qpairs--; 9465 list_del(&qpair->qp_list_elem); 9466 if (list_empty(&vha->qp_list)) { 9467 vha->flags.qpairs_available = 0; 9468 vha->flags.qpairs_req_created = 0; 9469 vha->flags.qpairs_rsp_created = 0; 9470 } 9471 mempool_destroy(qpair->srb_mempool); 9472 kfree(qpair); 9473 mutex_unlock(&ha->mq_lock); 9474 9475 return QLA_SUCCESS; 9476 fail: 9477 return ret; 9478 } 9479 9480 uint64_t 9481 qla2x00_count_set_bits(uint32_t num) 9482 { 9483 /* Brian Kernighan's Algorithm */ 9484 u64 count = 0; 9485 9486 while (num) { 9487 num &= (num - 1); 9488 count++; 9489 } 9490 return count; 9491 } 9492 9493 uint64_t 9494 qla2x00_get_num_tgts(scsi_qla_host_t *vha) 9495 { 9496 fc_port_t *f, *tf; 9497 u64 count = 0; 9498 9499 f = NULL; 9500 tf = NULL; 9501 9502 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 9503 if (f->port_type != FCT_TARGET) 9504 continue; 9505 count++; 9506 } 9507 return count; 9508 } 9509 9510 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags) 9511 { 9512 scsi_qla_host_t *vha = shost_priv(host); 9513 fc_port_t *fcport = NULL; 9514 unsigned long int_flags; 9515 9516 if (flags & QLA2XX_HW_ERROR) 9517 vha->hw_err_cnt = 0; 9518 if (flags & QLA2XX_SHT_LNK_DWN) 9519 vha->short_link_down_cnt = 0; 9520 if (flags & QLA2XX_INT_ERR) 9521 vha->interface_err_cnt = 0; 9522 if (flags & QLA2XX_CMD_TIMEOUT) 9523 vha->cmd_timeout_cnt = 0; 9524 if (flags & QLA2XX_RESET_CMD_ERR) 9525 vha->reset_cmd_err_cnt = 0; 9526 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9527 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9528 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9529 fcport->tgt_short_link_down_cnt = 0; 9530 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9531 } 9532 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9533 } 9534 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9535 return 0; 9536 } 9537 9538 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags) 9539 { 9540 return qla2xxx_reset_stats(host, flags); 9541 } 9542 9543 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags) 9544 { 9545 return qla2xxx_reset_stats(host, flags); 9546 } 9547 9548 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags, 9549 void *data, u64 size) 9550 { 9551 scsi_qla_host_t *vha = shost_priv(host); 9552 struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data; 9553 struct ql_vnd_stats *rsp_data = &resp->stats; 9554 u64 ini_entry_count = 0; 9555 u64 i = 0; 9556 u64 entry_count = 0; 9557 u64 num_tgt = 0; 9558 u32 tmp_stat_type = 0; 9559 fc_port_t *fcport = NULL; 9560 unsigned long int_flags; 9561 9562 /* Copy stat type to work on it */ 9563 tmp_stat_type = flags; 9564 9565 if (tmp_stat_type & BIT_17) { 9566 num_tgt = qla2x00_get_num_tgts(vha); 9567 /* unset BIT_17 */ 9568 tmp_stat_type &= ~(1 << 17); 9569 } 9570 ini_entry_count = qla2x00_count_set_bits(tmp_stat_type); 9571 9572 entry_count = ini_entry_count + num_tgt; 9573 9574 rsp_data->entry_count = entry_count; 9575 9576 i = 0; 9577 if (flags & QLA2XX_HW_ERROR) { 9578 rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR; 9579 rsp_data->entry[i].tgt_num = 0x0; 9580 rsp_data->entry[i].cnt = vha->hw_err_cnt; 9581 i++; 9582 } 9583 9584 if (flags & QLA2XX_SHT_LNK_DWN) { 9585 rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN; 9586 rsp_data->entry[i].tgt_num = 0x0; 9587 rsp_data->entry[i].cnt = vha->short_link_down_cnt; 9588 i++; 9589 } 9590 9591 if (flags & QLA2XX_INT_ERR) { 9592 rsp_data->entry[i].stat_type = QLA2XX_INT_ERR; 9593 rsp_data->entry[i].tgt_num = 0x0; 9594 rsp_data->entry[i].cnt = vha->interface_err_cnt; 9595 i++; 9596 } 9597 9598 if (flags & QLA2XX_CMD_TIMEOUT) { 9599 rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT; 9600 rsp_data->entry[i].tgt_num = 0x0; 9601 rsp_data->entry[i].cnt = vha->cmd_timeout_cnt; 9602 i++; 9603 } 9604 9605 if (flags & QLA2XX_RESET_CMD_ERR) { 9606 rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR; 9607 rsp_data->entry[i].tgt_num = 0x0; 9608 rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt; 9609 i++; 9610 } 9611 9612 /* i will continue from previous loop, as target 9613 * entries are after initiator 9614 */ 9615 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9616 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9617 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9618 if (fcport->port_type != FCT_TARGET) 9619 continue; 9620 if (!fcport->rport) 9621 continue; 9622 rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN; 9623 rsp_data->entry[i].tgt_num = fcport->rport->number; 9624 rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt; 9625 i++; 9626 } 9627 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9628 } 9629 resp->status = EXT_STATUS_OK; 9630 9631 return 0; 9632 } 9633 9634 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags, 9635 struct fc_rport *rport, void *data, u64 size) 9636 { 9637 struct ql_vnd_tgt_stats_resp *tgt_data = data; 9638 fc_port_t *fcport = *(fc_port_t **)rport->dd_data; 9639 9640 tgt_data->status = 0; 9641 tgt_data->stats.entry_count = 1; 9642 tgt_data->stats.entry[0].stat_type = flags; 9643 tgt_data->stats.entry[0].tgt_num = rport->number; 9644 tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt; 9645 9646 return 0; 9647 } 9648 9649 int qla2xxx_disable_port(struct Scsi_Host *host) 9650 { 9651 scsi_qla_host_t *vha = shost_priv(host); 9652 9653 vha->hw->flags.port_isolated = 1; 9654 9655 if (qla2x00_chip_is_down(vha)) 9656 return 0; 9657 9658 if (vha->flags.online) { 9659 qla2x00_abort_isp_cleanup(vha); 9660 qla2x00_wait_for_sess_deletion(vha); 9661 } 9662 9663 return 0; 9664 } 9665 9666 int qla2xxx_enable_port(struct Scsi_Host *host) 9667 { 9668 scsi_qla_host_t *vha = shost_priv(host); 9669 9670 vha->hw->flags.port_isolated = 0; 9671 /* Set the flag to 1, so that isp_abort can proceed */ 9672 vha->flags.online = 1; 9673 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 9674 qla2xxx_wake_dpc(vha); 9675 9676 return 0; 9677 } 9678