1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); 34 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, 35 uint16_t *); 36 37 static int qla2x00_restart_isp(scsi_qla_host_t *); 38 39 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 40 static int qla84xx_init_chip(scsi_qla_host_t *); 41 static int qla25xx_init_queues(struct qla_hw_data *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(unsigned long __data) 47 { 48 srb_t *sp = (srb_t *)__data; 49 struct srb_iocb *iocb; 50 fc_port_t *fcport = sp->fcport; 51 struct qla_hw_data *ha = fcport->vha->hw; 52 struct req_que *req; 53 unsigned long flags; 54 55 spin_lock_irqsave(&ha->hardware_lock, flags); 56 req = ha->req_q_map[0]; 57 req->outstanding_cmds[sp->handle] = NULL; 58 iocb = &sp->u.iocb_cmd; 59 iocb->timeout(sp); 60 sp->free(fcport->vha, sp); 61 spin_unlock_irqrestore(&ha->hardware_lock, flags); 62 } 63 64 void 65 qla2x00_sp_free(void *data, void *ptr) 66 { 67 srb_t *sp = (srb_t *)ptr; 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 69 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 70 71 del_timer(&iocb->timer); 72 qla2x00_rel_sp(vha, sp); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (IS_QLAFX00(ha)) { 86 tmo = FX00_DEF_RATOV * 2; 87 } else if (!IS_FWI2_CAPABLE(ha)) { 88 /* 89 * Except for earlier ISPs where the timeout is seeded from the 90 * initialization control block. 91 */ 92 tmo = ha->login_timeout; 93 } 94 return tmo; 95 } 96 97 static void 98 qla2x00_async_iocb_timeout(void *data) 99 { 100 srb_t *sp = (srb_t *)data; 101 fc_port_t *fcport = sp->fcport; 102 103 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 104 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n", 105 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area, 106 fcport->d_id.b.al_pa); 107 108 fcport->flags &= ~FCF_ASYNC_SENT; 109 if (sp->type == SRB_LOGIN_CMD) { 110 struct srb_iocb *lio = &sp->u.iocb_cmd; 111 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); 112 /* Retry as needed. */ 113 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 114 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 115 QLA_LOGIO_LOGIN_RETRIED : 0; 116 qla2x00_post_async_login_done_work(fcport->vha, fcport, 117 lio->u.logio.data); 118 } else if (sp->type == SRB_LOGOUT_CMD) { 119 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT); 120 } 121 } 122 123 static void 124 qla2x00_async_login_sp_done(void *data, void *ptr, int res) 125 { 126 srb_t *sp = (srb_t *)ptr; 127 struct srb_iocb *lio = &sp->u.iocb_cmd; 128 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 129 130 if (!test_bit(UNLOADING, &vha->dpc_flags)) 131 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, 132 lio->u.logio.data); 133 sp->free(sp->fcport->vha, sp); 134 } 135 136 int 137 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 138 uint16_t *data) 139 { 140 srb_t *sp; 141 struct srb_iocb *lio; 142 int rval; 143 144 rval = QLA_FUNCTION_FAILED; 145 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 146 if (!sp) 147 goto done; 148 149 sp->type = SRB_LOGIN_CMD; 150 sp->name = "login"; 151 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 152 153 lio = &sp->u.iocb_cmd; 154 lio->timeout = qla2x00_async_iocb_timeout; 155 sp->done = qla2x00_async_login_sp_done; 156 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 157 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 158 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 159 rval = qla2x00_start_sp(sp); 160 if (rval != QLA_SUCCESS) 161 goto done_free_sp; 162 163 ql_dbg(ql_dbg_disc, vha, 0x2072, 164 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x " 165 "retries=%d.\n", sp->handle, fcport->loop_id, 166 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 167 fcport->login_retry); 168 return rval; 169 170 done_free_sp: 171 sp->free(fcport->vha, sp); 172 done: 173 return rval; 174 } 175 176 static void 177 qla2x00_async_logout_sp_done(void *data, void *ptr, int res) 178 { 179 srb_t *sp = (srb_t *)ptr; 180 struct srb_iocb *lio = &sp->u.iocb_cmd; 181 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 182 183 if (!test_bit(UNLOADING, &vha->dpc_flags)) 184 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, 185 lio->u.logio.data); 186 sp->free(sp->fcport->vha, sp); 187 } 188 189 int 190 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 191 { 192 srb_t *sp; 193 struct srb_iocb *lio; 194 int rval; 195 196 rval = QLA_FUNCTION_FAILED; 197 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 198 if (!sp) 199 goto done; 200 201 sp->type = SRB_LOGOUT_CMD; 202 sp->name = "logout"; 203 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 204 205 lio = &sp->u.iocb_cmd; 206 lio->timeout = qla2x00_async_iocb_timeout; 207 sp->done = qla2x00_async_logout_sp_done; 208 rval = qla2x00_start_sp(sp); 209 if (rval != QLA_SUCCESS) 210 goto done_free_sp; 211 212 ql_dbg(ql_dbg_disc, vha, 0x2070, 213 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 214 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 215 fcport->d_id.b.area, fcport->d_id.b.al_pa); 216 return rval; 217 218 done_free_sp: 219 sp->free(fcport->vha, sp); 220 done: 221 return rval; 222 } 223 224 static void 225 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res) 226 { 227 srb_t *sp = (srb_t *)ptr; 228 struct srb_iocb *lio = &sp->u.iocb_cmd; 229 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 230 231 if (!test_bit(UNLOADING, &vha->dpc_flags)) 232 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, 233 lio->u.logio.data); 234 sp->free(sp->fcport->vha, sp); 235 } 236 237 int 238 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 239 uint16_t *data) 240 { 241 srb_t *sp; 242 struct srb_iocb *lio; 243 int rval; 244 245 rval = QLA_FUNCTION_FAILED; 246 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 247 if (!sp) 248 goto done; 249 250 sp->type = SRB_ADISC_CMD; 251 sp->name = "adisc"; 252 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 253 254 lio = &sp->u.iocb_cmd; 255 lio->timeout = qla2x00_async_iocb_timeout; 256 sp->done = qla2x00_async_adisc_sp_done; 257 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 258 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 259 rval = qla2x00_start_sp(sp); 260 if (rval != QLA_SUCCESS) 261 goto done_free_sp; 262 263 ql_dbg(ql_dbg_disc, vha, 0x206f, 264 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", 265 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 266 fcport->d_id.b.area, fcport->d_id.b.al_pa); 267 return rval; 268 269 done_free_sp: 270 sp->free(fcport->vha, sp); 271 done: 272 return rval; 273 } 274 275 static void 276 qla2x00_tmf_iocb_timeout(void *data) 277 { 278 srb_t *sp = (srb_t *)data; 279 struct srb_iocb *tmf = &sp->u.iocb_cmd; 280 281 tmf->u.tmf.comp_status = CS_TIMEOUT; 282 complete(&tmf->u.tmf.comp); 283 } 284 285 static void 286 qla2x00_tmf_sp_done(void *data, void *ptr, int res) 287 { 288 srb_t *sp = (srb_t *)ptr; 289 struct srb_iocb *tmf = &sp->u.iocb_cmd; 290 complete(&tmf->u.tmf.comp); 291 } 292 293 int 294 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 295 uint32_t tag) 296 { 297 struct scsi_qla_host *vha = fcport->vha; 298 struct srb_iocb *tm_iocb; 299 srb_t *sp; 300 int rval = QLA_FUNCTION_FAILED; 301 302 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 303 if (!sp) 304 goto done; 305 306 tm_iocb = &sp->u.iocb_cmd; 307 sp->type = SRB_TM_CMD; 308 sp->name = "tmf"; 309 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 310 tm_iocb->u.tmf.flags = flags; 311 tm_iocb->u.tmf.lun = lun; 312 tm_iocb->u.tmf.data = tag; 313 sp->done = qla2x00_tmf_sp_done; 314 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 315 init_completion(&tm_iocb->u.tmf.comp); 316 317 rval = qla2x00_start_sp(sp); 318 if (rval != QLA_SUCCESS) 319 goto done_free_sp; 320 321 ql_dbg(ql_dbg_taskm, vha, 0x802f, 322 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 323 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 324 fcport->d_id.b.area, fcport->d_id.b.al_pa); 325 326 wait_for_completion(&tm_iocb->u.tmf.comp); 327 328 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 329 QLA_SUCCESS : QLA_FUNCTION_FAILED; 330 331 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) { 332 ql_dbg(ql_dbg_taskm, vha, 0x8030, 333 "TM IOCB failed (%x).\n", rval); 334 } 335 336 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 337 flags = tm_iocb->u.tmf.flags; 338 lun = (uint16_t)tm_iocb->u.tmf.lun; 339 340 /* Issue Marker IOCB */ 341 qla2x00_marker(vha, vha->hw->req_q_map[0], 342 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 343 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 344 } 345 346 done_free_sp: 347 sp->free(vha, sp); 348 done: 349 return rval; 350 } 351 352 static void 353 qla24xx_abort_iocb_timeout(void *data) 354 { 355 srb_t *sp = (srb_t *)data; 356 struct srb_iocb *abt = &sp->u.iocb_cmd; 357 358 abt->u.abt.comp_status = CS_TIMEOUT; 359 complete(&abt->u.abt.comp); 360 } 361 362 static void 363 qla24xx_abort_sp_done(void *data, void *ptr, int res) 364 { 365 srb_t *sp = (srb_t *)ptr; 366 struct srb_iocb *abt = &sp->u.iocb_cmd; 367 368 complete(&abt->u.abt.comp); 369 } 370 371 static int 372 qla24xx_async_abort_cmd(srb_t *cmd_sp) 373 { 374 scsi_qla_host_t *vha = cmd_sp->fcport->vha; 375 fc_port_t *fcport = cmd_sp->fcport; 376 struct srb_iocb *abt_iocb; 377 srb_t *sp; 378 int rval = QLA_FUNCTION_FAILED; 379 380 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 381 if (!sp) 382 goto done; 383 384 abt_iocb = &sp->u.iocb_cmd; 385 sp->type = SRB_ABT_CMD; 386 sp->name = "abort"; 387 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 388 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 389 sp->done = qla24xx_abort_sp_done; 390 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 391 init_completion(&abt_iocb->u.abt.comp); 392 393 rval = qla2x00_start_sp(sp); 394 if (rval != QLA_SUCCESS) 395 goto done_free_sp; 396 397 ql_dbg(ql_dbg_async, vha, 0x507c, 398 "Abort command issued - hdl=%x, target_id=%x\n", 399 cmd_sp->handle, fcport->tgt_id); 400 401 wait_for_completion(&abt_iocb->u.abt.comp); 402 403 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 404 QLA_SUCCESS : QLA_FUNCTION_FAILED; 405 406 done_free_sp: 407 sp->free(vha, sp); 408 done: 409 return rval; 410 } 411 412 int 413 qla24xx_async_abort_command(srb_t *sp) 414 { 415 unsigned long flags = 0; 416 417 uint32_t handle; 418 fc_port_t *fcport = sp->fcport; 419 struct scsi_qla_host *vha = fcport->vha; 420 struct qla_hw_data *ha = vha->hw; 421 struct req_que *req = vha->req; 422 423 spin_lock_irqsave(&ha->hardware_lock, flags); 424 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 425 if (req->outstanding_cmds[handle] == sp) 426 break; 427 } 428 spin_unlock_irqrestore(&ha->hardware_lock, flags); 429 if (handle == req->num_outstanding_cmds) { 430 /* Command not found. */ 431 return QLA_FUNCTION_FAILED; 432 } 433 if (sp->type == SRB_FXIOCB_DCMD) 434 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 435 FXDISC_ABORT_IOCTL); 436 437 return qla24xx_async_abort_cmd(sp); 438 } 439 440 void 441 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, 442 uint16_t *data) 443 { 444 int rval; 445 446 switch (data[0]) { 447 case MBS_COMMAND_COMPLETE: 448 /* 449 * Driver must validate login state - If PRLI not complete, 450 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 451 * requests. 452 */ 453 rval = qla2x00_get_port_database(vha, fcport, 0); 454 if (rval == QLA_NOT_LOGGED_IN) { 455 fcport->flags &= ~FCF_ASYNC_SENT; 456 fcport->flags |= FCF_LOGIN_NEEDED; 457 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 458 break; 459 } 460 461 if (rval != QLA_SUCCESS) { 462 qla2x00_post_async_logout_work(vha, fcport, NULL); 463 qla2x00_post_async_login_work(vha, fcport, NULL); 464 break; 465 } 466 if (fcport->flags & FCF_FCP2_DEVICE) { 467 qla2x00_post_async_adisc_work(vha, fcport, data); 468 break; 469 } 470 qla2x00_update_fcport(vha, fcport); 471 break; 472 case MBS_COMMAND_ERROR: 473 fcport->flags &= ~FCF_ASYNC_SENT; 474 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 475 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 476 else 477 qla2x00_mark_device_lost(vha, fcport, 1, 0); 478 break; 479 case MBS_PORT_ID_USED: 480 fcport->loop_id = data[1]; 481 qla2x00_post_async_logout_work(vha, fcport, NULL); 482 qla2x00_post_async_login_work(vha, fcport, NULL); 483 break; 484 case MBS_LOOP_ID_USED: 485 fcport->loop_id++; 486 rval = qla2x00_find_new_loop_id(vha, fcport); 487 if (rval != QLA_SUCCESS) { 488 fcport->flags &= ~FCF_ASYNC_SENT; 489 qla2x00_mark_device_lost(vha, fcport, 1, 0); 490 break; 491 } 492 qla2x00_post_async_login_work(vha, fcport, NULL); 493 break; 494 } 495 return; 496 } 497 498 void 499 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 500 uint16_t *data) 501 { 502 /* Don't re-login in target mode */ 503 if (!fcport->tgt_session) 504 qla2x00_mark_device_lost(vha, fcport, 1, 0); 505 qlt_logo_completion_handler(fcport, data[0]); 506 return; 507 } 508 509 void 510 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 511 uint16_t *data) 512 { 513 if (data[0] == MBS_COMMAND_COMPLETE) { 514 qla2x00_update_fcport(vha, fcport); 515 516 return; 517 } 518 519 /* Retry login. */ 520 fcport->flags &= ~FCF_ASYNC_SENT; 521 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 522 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 523 else 524 qla2x00_mark_device_lost(vha, fcport, 1, 0); 525 526 return; 527 } 528 529 /****************************************************************************/ 530 /* QLogic ISP2x00 Hardware Support Functions. */ 531 /****************************************************************************/ 532 533 static int 534 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 535 { 536 int rval = QLA_SUCCESS; 537 struct qla_hw_data *ha = vha->hw; 538 uint32_t idc_major_ver, idc_minor_ver; 539 uint16_t config[4]; 540 541 qla83xx_idc_lock(vha, 0); 542 543 /* SV: TODO: Assign initialization timeout from 544 * flash-info / other param 545 */ 546 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 547 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 548 549 /* Set our fcoe function presence */ 550 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 551 ql_dbg(ql_dbg_p3p, vha, 0xb077, 552 "Error while setting DRV-Presence.\n"); 553 rval = QLA_FUNCTION_FAILED; 554 goto exit; 555 } 556 557 /* Decide the reset ownership */ 558 qla83xx_reset_ownership(vha); 559 560 /* 561 * On first protocol driver load: 562 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 563 * register. 564 * Others: Check compatibility with current IDC Major version. 565 */ 566 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 567 if (ha->flags.nic_core_reset_owner) { 568 /* Set IDC Major version */ 569 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 570 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 571 572 /* Clearing IDC-Lock-Recovery register */ 573 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 574 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 575 /* 576 * Clear further IDC participation if we are not compatible with 577 * the current IDC Major Version. 578 */ 579 ql_log(ql_log_warn, vha, 0xb07d, 580 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 581 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 582 __qla83xx_clear_drv_presence(vha); 583 rval = QLA_FUNCTION_FAILED; 584 goto exit; 585 } 586 /* Each function sets its supported Minor version. */ 587 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 588 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 589 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 590 591 if (ha->flags.nic_core_reset_owner) { 592 memset(config, 0, sizeof(config)); 593 if (!qla81xx_get_port_config(vha, config)) 594 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 595 QLA8XXX_DEV_READY); 596 } 597 598 rval = qla83xx_idc_state_handler(vha); 599 600 exit: 601 qla83xx_idc_unlock(vha, 0); 602 603 return rval; 604 } 605 606 /* 607 * qla2x00_initialize_adapter 608 * Initialize board. 609 * 610 * Input: 611 * ha = adapter block pointer. 612 * 613 * Returns: 614 * 0 = success 615 */ 616 int 617 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 618 { 619 int rval; 620 struct qla_hw_data *ha = vha->hw; 621 struct req_que *req = ha->req_q_map[0]; 622 623 /* Clear adapter flags. */ 624 vha->flags.online = 0; 625 ha->flags.chip_reset_done = 0; 626 vha->flags.reset_active = 0; 627 ha->flags.pci_channel_io_perm_failure = 0; 628 ha->flags.eeh_busy = 0; 629 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 630 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 631 atomic_set(&vha->loop_state, LOOP_DOWN); 632 vha->device_flags = DFLG_NO_CABLE; 633 vha->dpc_flags = 0; 634 vha->flags.management_server_logged_in = 0; 635 vha->marker_needed = 0; 636 ha->isp_abort_cnt = 0; 637 ha->beacon_blink_led = 0; 638 639 set_bit(0, ha->req_qid_map); 640 set_bit(0, ha->rsp_qid_map); 641 642 ql_dbg(ql_dbg_init, vha, 0x0040, 643 "Configuring PCI space...\n"); 644 rval = ha->isp_ops->pci_config(vha); 645 if (rval) { 646 ql_log(ql_log_warn, vha, 0x0044, 647 "Unable to configure PCI space.\n"); 648 return (rval); 649 } 650 651 ha->isp_ops->reset_chip(vha); 652 653 rval = qla2xxx_get_flash_info(vha); 654 if (rval) { 655 ql_log(ql_log_fatal, vha, 0x004f, 656 "Unable to validate FLASH data.\n"); 657 return rval; 658 } 659 660 if (IS_QLA8044(ha)) { 661 qla8044_read_reset_template(vha); 662 663 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 664 * If DONRESET_BIT0 is set, drivers should not set dev_state 665 * to NEED_RESET. But if NEED_RESET is set, drivers should 666 * should honor the reset. */ 667 if (ql2xdontresethba == 1) 668 qla8044_set_idc_dontreset(vha); 669 } 670 671 ha->isp_ops->get_flash_version(vha, req->ring); 672 ql_dbg(ql_dbg_init, vha, 0x0061, 673 "Configure NVRAM parameters...\n"); 674 675 ha->isp_ops->nvram_config(vha); 676 677 if (ha->flags.disable_serdes) { 678 /* Mask HBA via NVRAM settings? */ 679 ql_log(ql_log_info, vha, 0x0077, 680 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 681 return QLA_FUNCTION_FAILED; 682 } 683 684 ql_dbg(ql_dbg_init, vha, 0x0078, 685 "Verifying loaded RISC code...\n"); 686 687 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 688 rval = ha->isp_ops->chip_diag(vha); 689 if (rval) 690 return (rval); 691 rval = qla2x00_setup_chip(vha); 692 if (rval) 693 return (rval); 694 } 695 696 if (IS_QLA84XX(ha)) { 697 ha->cs84xx = qla84xx_get_chip(vha); 698 if (!ha->cs84xx) { 699 ql_log(ql_log_warn, vha, 0x00d0, 700 "Unable to configure ISP84XX.\n"); 701 return QLA_FUNCTION_FAILED; 702 } 703 } 704 705 if (qla_ini_mode_enabled(vha)) 706 rval = qla2x00_init_rings(vha); 707 708 ha->flags.chip_reset_done = 1; 709 710 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 711 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 712 rval = qla84xx_init_chip(vha); 713 if (rval != QLA_SUCCESS) { 714 ql_log(ql_log_warn, vha, 0x00d4, 715 "Unable to initialize ISP84XX.\n"); 716 qla84xx_put_chip(vha); 717 } 718 } 719 720 /* Load the NIC Core f/w if we are the first protocol driver. */ 721 if (IS_QLA8031(ha)) { 722 rval = qla83xx_nic_core_fw_load(vha); 723 if (rval) 724 ql_log(ql_log_warn, vha, 0x0124, 725 "Error in initializing NIC Core f/w.\n"); 726 } 727 728 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 729 qla24xx_read_fcp_prio_cfg(vha); 730 731 if (IS_P3P_TYPE(ha)) 732 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 733 else 734 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 735 736 return (rval); 737 } 738 739 /** 740 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 741 * @ha: HA context 742 * 743 * Returns 0 on success. 744 */ 745 int 746 qla2100_pci_config(scsi_qla_host_t *vha) 747 { 748 uint16_t w; 749 unsigned long flags; 750 struct qla_hw_data *ha = vha->hw; 751 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 752 753 pci_set_master(ha->pdev); 754 pci_try_set_mwi(ha->pdev); 755 756 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 757 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 758 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 759 760 pci_disable_rom(ha->pdev); 761 762 /* Get PCI bus information. */ 763 spin_lock_irqsave(&ha->hardware_lock, flags); 764 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 765 spin_unlock_irqrestore(&ha->hardware_lock, flags); 766 767 return QLA_SUCCESS; 768 } 769 770 /** 771 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 772 * @ha: HA context 773 * 774 * Returns 0 on success. 775 */ 776 int 777 qla2300_pci_config(scsi_qla_host_t *vha) 778 { 779 uint16_t w; 780 unsigned long flags = 0; 781 uint32_t cnt; 782 struct qla_hw_data *ha = vha->hw; 783 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 784 785 pci_set_master(ha->pdev); 786 pci_try_set_mwi(ha->pdev); 787 788 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 789 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 790 791 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 792 w &= ~PCI_COMMAND_INTX_DISABLE; 793 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 794 795 /* 796 * If this is a 2300 card and not 2312, reset the 797 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 798 * the 2310 also reports itself as a 2300 so we need to get the 799 * fb revision level -- a 6 indicates it really is a 2300 and 800 * not a 2310. 801 */ 802 if (IS_QLA2300(ha)) { 803 spin_lock_irqsave(&ha->hardware_lock, flags); 804 805 /* Pause RISC. */ 806 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 807 for (cnt = 0; cnt < 30000; cnt++) { 808 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 809 break; 810 811 udelay(10); 812 } 813 814 /* Select FPM registers. */ 815 WRT_REG_WORD(®->ctrl_status, 0x20); 816 RD_REG_WORD(®->ctrl_status); 817 818 /* Get the fb rev level */ 819 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 820 821 if (ha->fb_rev == FPM_2300) 822 pci_clear_mwi(ha->pdev); 823 824 /* Deselect FPM registers. */ 825 WRT_REG_WORD(®->ctrl_status, 0x0); 826 RD_REG_WORD(®->ctrl_status); 827 828 /* Release RISC module. */ 829 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 830 for (cnt = 0; cnt < 30000; cnt++) { 831 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 832 break; 833 834 udelay(10); 835 } 836 837 spin_unlock_irqrestore(&ha->hardware_lock, flags); 838 } 839 840 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 841 842 pci_disable_rom(ha->pdev); 843 844 /* Get PCI bus information. */ 845 spin_lock_irqsave(&ha->hardware_lock, flags); 846 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 847 spin_unlock_irqrestore(&ha->hardware_lock, flags); 848 849 return QLA_SUCCESS; 850 } 851 852 /** 853 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 854 * @ha: HA context 855 * 856 * Returns 0 on success. 857 */ 858 int 859 qla24xx_pci_config(scsi_qla_host_t *vha) 860 { 861 uint16_t w; 862 unsigned long flags = 0; 863 struct qla_hw_data *ha = vha->hw; 864 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 865 866 pci_set_master(ha->pdev); 867 pci_try_set_mwi(ha->pdev); 868 869 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 870 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 871 w &= ~PCI_COMMAND_INTX_DISABLE; 872 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 873 874 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 875 876 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 877 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 878 pcix_set_mmrbc(ha->pdev, 2048); 879 880 /* PCIe -- adjust Maximum Read Request Size (2048). */ 881 if (pci_is_pcie(ha->pdev)) 882 pcie_set_readrq(ha->pdev, 4096); 883 884 pci_disable_rom(ha->pdev); 885 886 ha->chip_revision = ha->pdev->revision; 887 888 /* Get PCI bus information. */ 889 spin_lock_irqsave(&ha->hardware_lock, flags); 890 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 891 spin_unlock_irqrestore(&ha->hardware_lock, flags); 892 893 return QLA_SUCCESS; 894 } 895 896 /** 897 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 898 * @ha: HA context 899 * 900 * Returns 0 on success. 901 */ 902 int 903 qla25xx_pci_config(scsi_qla_host_t *vha) 904 { 905 uint16_t w; 906 struct qla_hw_data *ha = vha->hw; 907 908 pci_set_master(ha->pdev); 909 pci_try_set_mwi(ha->pdev); 910 911 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 912 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 913 w &= ~PCI_COMMAND_INTX_DISABLE; 914 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 915 916 /* PCIe -- adjust Maximum Read Request Size (2048). */ 917 if (pci_is_pcie(ha->pdev)) 918 pcie_set_readrq(ha->pdev, 4096); 919 920 pci_disable_rom(ha->pdev); 921 922 ha->chip_revision = ha->pdev->revision; 923 924 return QLA_SUCCESS; 925 } 926 927 /** 928 * qla2x00_isp_firmware() - Choose firmware image. 929 * @ha: HA context 930 * 931 * Returns 0 on success. 932 */ 933 static int 934 qla2x00_isp_firmware(scsi_qla_host_t *vha) 935 { 936 int rval; 937 uint16_t loop_id, topo, sw_cap; 938 uint8_t domain, area, al_pa; 939 struct qla_hw_data *ha = vha->hw; 940 941 /* Assume loading risc code */ 942 rval = QLA_FUNCTION_FAILED; 943 944 if (ha->flags.disable_risc_code_load) { 945 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 946 947 /* Verify checksum of loaded RISC code. */ 948 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 949 if (rval == QLA_SUCCESS) { 950 /* And, verify we are not in ROM code. */ 951 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 952 &area, &domain, &topo, &sw_cap); 953 } 954 } 955 956 if (rval) 957 ql_dbg(ql_dbg_init, vha, 0x007a, 958 "**** Load RISC code ****.\n"); 959 960 return (rval); 961 } 962 963 /** 964 * qla2x00_reset_chip() - Reset ISP chip. 965 * @ha: HA context 966 * 967 * Returns 0 on success. 968 */ 969 void 970 qla2x00_reset_chip(scsi_qla_host_t *vha) 971 { 972 unsigned long flags = 0; 973 struct qla_hw_data *ha = vha->hw; 974 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 975 uint32_t cnt; 976 uint16_t cmd; 977 978 if (unlikely(pci_channel_offline(ha->pdev))) 979 return; 980 981 ha->isp_ops->disable_intrs(ha); 982 983 spin_lock_irqsave(&ha->hardware_lock, flags); 984 985 /* Turn off master enable */ 986 cmd = 0; 987 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 988 cmd &= ~PCI_COMMAND_MASTER; 989 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 990 991 if (!IS_QLA2100(ha)) { 992 /* Pause RISC. */ 993 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 994 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 995 for (cnt = 0; cnt < 30000; cnt++) { 996 if ((RD_REG_WORD(®->hccr) & 997 HCCR_RISC_PAUSE) != 0) 998 break; 999 udelay(100); 1000 } 1001 } else { 1002 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1003 udelay(10); 1004 } 1005 1006 /* Select FPM registers. */ 1007 WRT_REG_WORD(®->ctrl_status, 0x20); 1008 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1009 1010 /* FPM Soft Reset. */ 1011 WRT_REG_WORD(®->fpm_diag_config, 0x100); 1012 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 1013 1014 /* Toggle Fpm Reset. */ 1015 if (!IS_QLA2200(ha)) { 1016 WRT_REG_WORD(®->fpm_diag_config, 0x0); 1017 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 1018 } 1019 1020 /* Select frame buffer registers. */ 1021 WRT_REG_WORD(®->ctrl_status, 0x10); 1022 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1023 1024 /* Reset frame buffer FIFOs. */ 1025 if (IS_QLA2200(ha)) { 1026 WRT_FB_CMD_REG(ha, reg, 0xa000); 1027 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 1028 } else { 1029 WRT_FB_CMD_REG(ha, reg, 0x00fc); 1030 1031 /* Read back fb_cmd until zero or 3 seconds max */ 1032 for (cnt = 0; cnt < 3000; cnt++) { 1033 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 1034 break; 1035 udelay(100); 1036 } 1037 } 1038 1039 /* Select RISC module registers. */ 1040 WRT_REG_WORD(®->ctrl_status, 0); 1041 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 1042 1043 /* Reset RISC processor. */ 1044 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1045 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1046 1047 /* Release RISC processor. */ 1048 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1049 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1050 } 1051 1052 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 1053 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 1054 1055 /* Reset ISP chip. */ 1056 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1057 1058 /* Wait for RISC to recover from reset. */ 1059 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1060 /* 1061 * It is necessary to for a delay here since the card doesn't 1062 * respond to PCI reads during a reset. On some architectures 1063 * this will result in an MCA. 1064 */ 1065 udelay(20); 1066 for (cnt = 30000; cnt; cnt--) { 1067 if ((RD_REG_WORD(®->ctrl_status) & 1068 CSR_ISP_SOFT_RESET) == 0) 1069 break; 1070 udelay(100); 1071 } 1072 } else 1073 udelay(10); 1074 1075 /* Reset RISC processor. */ 1076 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1077 1078 WRT_REG_WORD(®->semaphore, 0); 1079 1080 /* Release RISC processor. */ 1081 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1082 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1083 1084 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1085 for (cnt = 0; cnt < 30000; cnt++) { 1086 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 1087 break; 1088 1089 udelay(100); 1090 } 1091 } else 1092 udelay(100); 1093 1094 /* Turn on master enable */ 1095 cmd |= PCI_COMMAND_MASTER; 1096 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 1097 1098 /* Disable RISC pause on FPM parity error. */ 1099 if (!IS_QLA2100(ha)) { 1100 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 1101 RD_REG_WORD(®->hccr); /* PCI Posting. */ 1102 } 1103 1104 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1105 } 1106 1107 /** 1108 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 1109 * 1110 * Returns 0 on success. 1111 */ 1112 static int 1113 qla81xx_reset_mpi(scsi_qla_host_t *vha) 1114 { 1115 uint16_t mb[4] = {0x1010, 0, 1, 0}; 1116 1117 if (!IS_QLA81XX(vha->hw)) 1118 return QLA_SUCCESS; 1119 1120 return qla81xx_write_mpi_register(vha, mb); 1121 } 1122 1123 /** 1124 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 1125 * @ha: HA context 1126 * 1127 * Returns 0 on success. 1128 */ 1129 static inline int 1130 qla24xx_reset_risc(scsi_qla_host_t *vha) 1131 { 1132 unsigned long flags = 0; 1133 struct qla_hw_data *ha = vha->hw; 1134 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1135 uint32_t cnt, d2; 1136 uint16_t wd; 1137 static int abts_cnt; /* ISP abort retry counts */ 1138 int rval = QLA_SUCCESS; 1139 1140 spin_lock_irqsave(&ha->hardware_lock, flags); 1141 1142 /* Reset RISC. */ 1143 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1144 for (cnt = 0; cnt < 30000; cnt++) { 1145 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 1146 break; 1147 1148 udelay(10); 1149 } 1150 1151 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 1152 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 1153 1154 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 1155 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 1156 RD_REG_DWORD(®->hccr), 1157 RD_REG_DWORD(®->ctrl_status), 1158 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 1159 1160 WRT_REG_DWORD(®->ctrl_status, 1161 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1162 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 1163 1164 udelay(100); 1165 1166 /* Wait for firmware to complete NVRAM accesses. */ 1167 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1168 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 1169 rval == QLA_SUCCESS; cnt--) { 1170 barrier(); 1171 if (cnt) 1172 udelay(5); 1173 else 1174 rval = QLA_FUNCTION_TIMEOUT; 1175 } 1176 1177 if (rval == QLA_SUCCESS) 1178 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 1179 1180 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 1181 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 1182 RD_REG_DWORD(®->hccr), 1183 RD_REG_DWORD(®->mailbox0)); 1184 1185 /* Wait for soft-reset to complete. */ 1186 d2 = RD_REG_DWORD(®->ctrl_status); 1187 for (cnt = 0; cnt < 6000000; cnt++) { 1188 barrier(); 1189 if ((RD_REG_DWORD(®->ctrl_status) & 1190 CSRX_ISP_SOFT_RESET) == 0) 1191 break; 1192 1193 udelay(5); 1194 } 1195 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 1196 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 1197 1198 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 1199 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 1200 RD_REG_DWORD(®->hccr), 1201 RD_REG_DWORD(®->ctrl_status)); 1202 1203 /* If required, do an MPI FW reset now */ 1204 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 1205 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 1206 if (++abts_cnt < 5) { 1207 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1208 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 1209 } else { 1210 /* 1211 * We exhausted the ISP abort retries. We have to 1212 * set the board offline. 1213 */ 1214 abts_cnt = 0; 1215 vha->flags.online = 0; 1216 } 1217 } 1218 } 1219 1220 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 1221 RD_REG_DWORD(®->hccr); 1222 1223 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 1224 RD_REG_DWORD(®->hccr); 1225 1226 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 1227 RD_REG_DWORD(®->hccr); 1228 1229 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1230 for (cnt = 6000000; RD_REG_WORD(®->mailbox0) != 0 && 1231 rval == QLA_SUCCESS; cnt--) { 1232 barrier(); 1233 if (cnt) 1234 udelay(5); 1235 else 1236 rval = QLA_FUNCTION_TIMEOUT; 1237 } 1238 if (rval == QLA_SUCCESS) 1239 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 1240 1241 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 1242 "Host Risc 0x%x, mailbox0 0x%x\n", 1243 RD_REG_DWORD(®->hccr), 1244 RD_REG_WORD(®->mailbox0)); 1245 1246 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1247 1248 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 1249 "Driver in %s mode\n", 1250 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 1251 1252 if (IS_NOPOLLING_TYPE(ha)) 1253 ha->isp_ops->enable_intrs(ha); 1254 1255 return rval; 1256 } 1257 1258 static void 1259 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 1260 { 1261 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 1262 1263 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 1264 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 1265 1266 } 1267 1268 static void 1269 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 1270 { 1271 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 1272 1273 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 1274 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 1275 } 1276 1277 static void 1278 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 1279 { 1280 struct qla_hw_data *ha = vha->hw; 1281 uint32_t wd32 = 0; 1282 uint delta_msec = 100; 1283 uint elapsed_msec = 0; 1284 uint timeout_msec; 1285 ulong n; 1286 1287 if (!IS_QLA25XX(ha) && !IS_QLA2031(ha)) 1288 return; 1289 1290 attempt: 1291 timeout_msec = TIMEOUT_SEMAPHORE; 1292 n = timeout_msec / delta_msec; 1293 while (n--) { 1294 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 1295 qla25xx_read_risc_sema_reg(vha, &wd32); 1296 if (wd32 & RISC_SEMAPHORE) 1297 break; 1298 msleep(delta_msec); 1299 elapsed_msec += delta_msec; 1300 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 1301 goto force; 1302 } 1303 1304 if (!(wd32 & RISC_SEMAPHORE)) 1305 goto force; 1306 1307 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 1308 goto acquired; 1309 1310 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 1311 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 1312 n = timeout_msec / delta_msec; 1313 while (n--) { 1314 qla25xx_read_risc_sema_reg(vha, &wd32); 1315 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 1316 break; 1317 msleep(delta_msec); 1318 elapsed_msec += delta_msec; 1319 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 1320 goto force; 1321 } 1322 1323 if (wd32 & RISC_SEMAPHORE_FORCE) 1324 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 1325 1326 goto attempt; 1327 1328 force: 1329 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 1330 1331 acquired: 1332 return; 1333 } 1334 1335 /** 1336 * qla24xx_reset_chip() - Reset ISP24xx chip. 1337 * @ha: HA context 1338 * 1339 * Returns 0 on success. 1340 */ 1341 void 1342 qla24xx_reset_chip(scsi_qla_host_t *vha) 1343 { 1344 struct qla_hw_data *ha = vha->hw; 1345 1346 if (pci_channel_offline(ha->pdev) && 1347 ha->flags.pci_channel_io_perm_failure) { 1348 return; 1349 } 1350 1351 ha->isp_ops->disable_intrs(ha); 1352 1353 qla25xx_manipulate_risc_semaphore(vha); 1354 1355 /* Perform RISC reset. */ 1356 qla24xx_reset_risc(vha); 1357 } 1358 1359 /** 1360 * qla2x00_chip_diag() - Test chip for proper operation. 1361 * @ha: HA context 1362 * 1363 * Returns 0 on success. 1364 */ 1365 int 1366 qla2x00_chip_diag(scsi_qla_host_t *vha) 1367 { 1368 int rval; 1369 struct qla_hw_data *ha = vha->hw; 1370 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1371 unsigned long flags = 0; 1372 uint16_t data; 1373 uint32_t cnt; 1374 uint16_t mb[5]; 1375 struct req_que *req = ha->req_q_map[0]; 1376 1377 /* Assume a failed state */ 1378 rval = QLA_FUNCTION_FAILED; 1379 1380 ql_dbg(ql_dbg_init, vha, 0x007b, 1381 "Testing device at %lx.\n", (u_long)®->flash_address); 1382 1383 spin_lock_irqsave(&ha->hardware_lock, flags); 1384 1385 /* Reset ISP chip. */ 1386 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1387 1388 /* 1389 * We need to have a delay here since the card will not respond while 1390 * in reset causing an MCA on some architectures. 1391 */ 1392 udelay(20); 1393 data = qla2x00_debounce_register(®->ctrl_status); 1394 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 1395 udelay(5); 1396 data = RD_REG_WORD(®->ctrl_status); 1397 barrier(); 1398 } 1399 1400 if (!cnt) 1401 goto chip_diag_failed; 1402 1403 ql_dbg(ql_dbg_init, vha, 0x007c, 1404 "Reset register cleared by chip reset.\n"); 1405 1406 /* Reset RISC processor. */ 1407 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1408 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1409 1410 /* Workaround for QLA2312 PCI parity error */ 1411 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1412 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 1413 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 1414 udelay(5); 1415 data = RD_MAILBOX_REG(ha, reg, 0); 1416 barrier(); 1417 } 1418 } else 1419 udelay(10); 1420 1421 if (!cnt) 1422 goto chip_diag_failed; 1423 1424 /* Check product ID of chip */ 1425 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); 1426 1427 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 1428 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 1429 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 1430 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 1431 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 1432 mb[3] != PROD_ID_3) { 1433 ql_log(ql_log_warn, vha, 0x0062, 1434 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 1435 mb[1], mb[2], mb[3]); 1436 1437 goto chip_diag_failed; 1438 } 1439 ha->product_id[0] = mb[1]; 1440 ha->product_id[1] = mb[2]; 1441 ha->product_id[2] = mb[3]; 1442 ha->product_id[3] = mb[4]; 1443 1444 /* Adjust fw RISC transfer size */ 1445 if (req->length > 1024) 1446 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 1447 else 1448 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1449 req->length; 1450 1451 if (IS_QLA2200(ha) && 1452 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 1453 /* Limit firmware transfer size with a 2200A */ 1454 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 1455 1456 ha->device_type |= DT_ISP2200A; 1457 ha->fw_transfer_size = 128; 1458 } 1459 1460 /* Wrap Incoming Mailboxes Test. */ 1461 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1462 1463 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 1464 rval = qla2x00_mbx_reg_test(vha); 1465 if (rval) 1466 ql_log(ql_log_warn, vha, 0x0080, 1467 "Failed mailbox send register test.\n"); 1468 else 1469 /* Flag a successful rval */ 1470 rval = QLA_SUCCESS; 1471 spin_lock_irqsave(&ha->hardware_lock, flags); 1472 1473 chip_diag_failed: 1474 if (rval) 1475 ql_log(ql_log_info, vha, 0x0081, 1476 "Chip diagnostics **** FAILED ****.\n"); 1477 1478 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1479 1480 return (rval); 1481 } 1482 1483 /** 1484 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 1485 * @ha: HA context 1486 * 1487 * Returns 0 on success. 1488 */ 1489 int 1490 qla24xx_chip_diag(scsi_qla_host_t *vha) 1491 { 1492 int rval; 1493 struct qla_hw_data *ha = vha->hw; 1494 struct req_que *req = ha->req_q_map[0]; 1495 1496 if (IS_P3P_TYPE(ha)) 1497 return QLA_SUCCESS; 1498 1499 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 1500 1501 rval = qla2x00_mbx_reg_test(vha); 1502 if (rval) { 1503 ql_log(ql_log_warn, vha, 0x0082, 1504 "Failed mailbox send register test.\n"); 1505 } else { 1506 /* Flag a successful rval */ 1507 rval = QLA_SUCCESS; 1508 } 1509 1510 return rval; 1511 } 1512 1513 void 1514 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 1515 { 1516 int rval; 1517 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 1518 eft_size, fce_size, mq_size; 1519 dma_addr_t tc_dma; 1520 void *tc; 1521 struct qla_hw_data *ha = vha->hw; 1522 struct req_que *req = ha->req_q_map[0]; 1523 struct rsp_que *rsp = ha->rsp_q_map[0]; 1524 1525 if (ha->fw_dump) { 1526 ql_dbg(ql_dbg_init, vha, 0x00bd, 1527 "Firmware dump already allocated.\n"); 1528 return; 1529 } 1530 1531 ha->fw_dumped = 0; 1532 ha->fw_dump_cap_flags = 0; 1533 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 1534 req_q_size = rsp_q_size = 0; 1535 1536 if (IS_QLA27XX(ha)) 1537 goto try_fce; 1538 1539 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 1540 fixed_size = sizeof(struct qla2100_fw_dump); 1541 } else if (IS_QLA23XX(ha)) { 1542 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 1543 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 1544 sizeof(uint16_t); 1545 } else if (IS_FWI2_CAPABLE(ha)) { 1546 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 1547 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 1548 else if (IS_QLA81XX(ha)) 1549 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 1550 else if (IS_QLA25XX(ha)) 1551 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 1552 else 1553 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 1554 1555 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 1556 sizeof(uint32_t); 1557 if (ha->mqenable) { 1558 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 1559 mq_size = sizeof(struct qla2xxx_mq_chain); 1560 /* 1561 * Allocate maximum buffer size for all queues. 1562 * Resizing must be done at end-of-dump processing. 1563 */ 1564 mq_size += ha->max_req_queues * 1565 (req->length * sizeof(request_t)); 1566 mq_size += ha->max_rsp_queues * 1567 (rsp->length * sizeof(response_t)); 1568 } 1569 if (ha->tgt.atio_ring) 1570 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 1571 /* Allocate memory for Fibre Channel Event Buffer. */ 1572 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 1573 !IS_QLA27XX(ha)) 1574 goto try_eft; 1575 1576 try_fce: 1577 if (ha->fce) 1578 dma_free_coherent(&ha->pdev->dev, 1579 FCE_SIZE, ha->fce, ha->fce_dma); 1580 1581 /* Allocate memory for Fibre Channel Event Buffer. */ 1582 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 1583 GFP_KERNEL); 1584 if (!tc) { 1585 ql_log(ql_log_warn, vha, 0x00be, 1586 "Unable to allocate (%d KB) for FCE.\n", 1587 FCE_SIZE / 1024); 1588 goto try_eft; 1589 } 1590 1591 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 1592 ha->fce_mb, &ha->fce_bufs); 1593 if (rval) { 1594 ql_log(ql_log_warn, vha, 0x00bf, 1595 "Unable to initialize FCE (%d).\n", rval); 1596 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 1597 tc_dma); 1598 ha->flags.fce_enabled = 0; 1599 goto try_eft; 1600 } 1601 ql_dbg(ql_dbg_init, vha, 0x00c0, 1602 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 1603 1604 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 1605 ha->flags.fce_enabled = 1; 1606 ha->fce_dma = tc_dma; 1607 ha->fce = tc; 1608 1609 try_eft: 1610 if (ha->eft) 1611 dma_free_coherent(&ha->pdev->dev, 1612 EFT_SIZE, ha->eft, ha->eft_dma); 1613 1614 /* Allocate memory for Extended Trace Buffer. */ 1615 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 1616 GFP_KERNEL); 1617 if (!tc) { 1618 ql_log(ql_log_warn, vha, 0x00c1, 1619 "Unable to allocate (%d KB) for EFT.\n", 1620 EFT_SIZE / 1024); 1621 goto cont_alloc; 1622 } 1623 1624 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 1625 if (rval) { 1626 ql_log(ql_log_warn, vha, 0x00c2, 1627 "Unable to initialize EFT (%d).\n", rval); 1628 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 1629 tc_dma); 1630 goto cont_alloc; 1631 } 1632 ql_dbg(ql_dbg_init, vha, 0x00c3, 1633 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 1634 1635 eft_size = EFT_SIZE; 1636 ha->eft_dma = tc_dma; 1637 ha->eft = tc; 1638 } 1639 1640 cont_alloc: 1641 if (IS_QLA27XX(ha)) { 1642 if (!ha->fw_dump_template) { 1643 ql_log(ql_log_warn, vha, 0x00ba, 1644 "Failed missing fwdump template\n"); 1645 return; 1646 } 1647 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 1648 ql_dbg(ql_dbg_init, vha, 0x00fa, 1649 "-> allocating fwdump (%x bytes)...\n", dump_size); 1650 goto allocate; 1651 } 1652 1653 req_q_size = req->length * sizeof(request_t); 1654 rsp_q_size = rsp->length * sizeof(response_t); 1655 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 1656 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 1657 ha->chain_offset = dump_size; 1658 dump_size += mq_size + fce_size; 1659 1660 allocate: 1661 ha->fw_dump = vmalloc(dump_size); 1662 if (!ha->fw_dump) { 1663 ql_log(ql_log_warn, vha, 0x00c4, 1664 "Unable to allocate (%d KB) for firmware dump.\n", 1665 dump_size / 1024); 1666 1667 if (ha->fce) { 1668 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 1669 ha->fce_dma); 1670 ha->fce = NULL; 1671 ha->fce_dma = 0; 1672 } 1673 1674 if (ha->eft) { 1675 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, 1676 ha->eft_dma); 1677 ha->eft = NULL; 1678 ha->eft_dma = 0; 1679 } 1680 return; 1681 } 1682 ha->fw_dump_len = dump_size; 1683 ql_dbg(ql_dbg_init, vha, 0x00c5, 1684 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); 1685 1686 if (IS_QLA27XX(ha)) 1687 return; 1688 1689 ha->fw_dump->signature[0] = 'Q'; 1690 ha->fw_dump->signature[1] = 'L'; 1691 ha->fw_dump->signature[2] = 'G'; 1692 ha->fw_dump->signature[3] = 'C'; 1693 ha->fw_dump->version = __constant_htonl(1); 1694 1695 ha->fw_dump->fixed_size = htonl(fixed_size); 1696 ha->fw_dump->mem_size = htonl(mem_size); 1697 ha->fw_dump->req_q_size = htonl(req_q_size); 1698 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 1699 1700 ha->fw_dump->eft_size = htonl(eft_size); 1701 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 1702 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 1703 1704 ha->fw_dump->header_size = 1705 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 1706 } 1707 1708 static int 1709 qla81xx_mpi_sync(scsi_qla_host_t *vha) 1710 { 1711 #define MPS_MASK 0xe0 1712 int rval; 1713 uint16_t dc; 1714 uint32_t dw; 1715 1716 if (!IS_QLA81XX(vha->hw)) 1717 return QLA_SUCCESS; 1718 1719 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 1720 if (rval != QLA_SUCCESS) { 1721 ql_log(ql_log_warn, vha, 0x0105, 1722 "Unable to acquire semaphore.\n"); 1723 goto done; 1724 } 1725 1726 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 1727 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 1728 if (rval != QLA_SUCCESS) { 1729 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 1730 goto done_release; 1731 } 1732 1733 dc &= MPS_MASK; 1734 if (dc == (dw & MPS_MASK)) 1735 goto done_release; 1736 1737 dw &= ~MPS_MASK; 1738 dw |= dc; 1739 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 1740 if (rval != QLA_SUCCESS) { 1741 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 1742 } 1743 1744 done_release: 1745 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 1746 if (rval != QLA_SUCCESS) { 1747 ql_log(ql_log_warn, vha, 0x006d, 1748 "Unable to release semaphore.\n"); 1749 } 1750 1751 done: 1752 return rval; 1753 } 1754 1755 int 1756 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 1757 { 1758 /* Don't try to reallocate the array */ 1759 if (req->outstanding_cmds) 1760 return QLA_SUCCESS; 1761 1762 if (!IS_FWI2_CAPABLE(ha) || (ha->mqiobase && 1763 (ql2xmultique_tag || ql2xmaxqueues > 1))) 1764 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 1765 else { 1766 if (ha->fw_xcb_count <= ha->fw_iocb_count) 1767 req->num_outstanding_cmds = ha->fw_xcb_count; 1768 else 1769 req->num_outstanding_cmds = ha->fw_iocb_count; 1770 } 1771 1772 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 1773 req->num_outstanding_cmds, GFP_KERNEL); 1774 1775 if (!req->outstanding_cmds) { 1776 /* 1777 * Try to allocate a minimal size just so we can get through 1778 * initialization. 1779 */ 1780 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 1781 req->outstanding_cmds = kzalloc(sizeof(srb_t *) * 1782 req->num_outstanding_cmds, GFP_KERNEL); 1783 1784 if (!req->outstanding_cmds) { 1785 ql_log(ql_log_fatal, NULL, 0x0126, 1786 "Failed to allocate memory for " 1787 "outstanding_cmds for req_que %p.\n", req); 1788 req->num_outstanding_cmds = 0; 1789 return QLA_FUNCTION_FAILED; 1790 } 1791 } 1792 1793 return QLA_SUCCESS; 1794 } 1795 1796 /** 1797 * qla2x00_setup_chip() - Load and start RISC firmware. 1798 * @ha: HA context 1799 * 1800 * Returns 0 on success. 1801 */ 1802 static int 1803 qla2x00_setup_chip(scsi_qla_host_t *vha) 1804 { 1805 int rval; 1806 uint32_t srisc_address = 0; 1807 struct qla_hw_data *ha = vha->hw; 1808 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1809 unsigned long flags; 1810 uint16_t fw_major_version; 1811 1812 if (IS_P3P_TYPE(ha)) { 1813 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1814 if (rval == QLA_SUCCESS) { 1815 qla2x00_stop_firmware(vha); 1816 goto enable_82xx_npiv; 1817 } else 1818 goto failed; 1819 } 1820 1821 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1822 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 1823 spin_lock_irqsave(&ha->hardware_lock, flags); 1824 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 1825 RD_REG_WORD(®->hccr); 1826 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1827 } 1828 1829 qla81xx_mpi_sync(vha); 1830 1831 /* Load firmware sequences */ 1832 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1833 if (rval == QLA_SUCCESS) { 1834 ql_dbg(ql_dbg_init, vha, 0x00c9, 1835 "Verifying Checksum of loaded RISC code.\n"); 1836 1837 rval = qla2x00_verify_checksum(vha, srisc_address); 1838 if (rval == QLA_SUCCESS) { 1839 /* Start firmware execution. */ 1840 ql_dbg(ql_dbg_init, vha, 0x00ca, 1841 "Starting firmware.\n"); 1842 1843 rval = qla2x00_execute_fw(vha, srisc_address); 1844 /* Retrieve firmware information. */ 1845 if (rval == QLA_SUCCESS) { 1846 enable_82xx_npiv: 1847 fw_major_version = ha->fw_major_version; 1848 if (IS_P3P_TYPE(ha)) 1849 qla82xx_check_md_needed(vha); 1850 else 1851 rval = qla2x00_get_fw_version(vha); 1852 if (rval != QLA_SUCCESS) 1853 goto failed; 1854 ha->flags.npiv_supported = 0; 1855 if (IS_QLA2XXX_MIDTYPE(ha) && 1856 (ha->fw_attributes & BIT_2)) { 1857 ha->flags.npiv_supported = 1; 1858 if ((!ha->max_npiv_vports) || 1859 ((ha->max_npiv_vports + 1) % 1860 MIN_MULTI_ID_FABRIC)) 1861 ha->max_npiv_vports = 1862 MIN_MULTI_ID_FABRIC - 1; 1863 } 1864 qla2x00_get_resource_cnts(vha, NULL, 1865 &ha->fw_xcb_count, NULL, &ha->fw_iocb_count, 1866 &ha->max_npiv_vports, NULL); 1867 1868 /* 1869 * Allocate the array of outstanding commands 1870 * now that we know the firmware resources. 1871 */ 1872 rval = qla2x00_alloc_outstanding_cmds(ha, 1873 vha->req); 1874 if (rval != QLA_SUCCESS) 1875 goto failed; 1876 1877 if (!fw_major_version && ql2xallocfwdump 1878 && !(IS_P3P_TYPE(ha))) 1879 qla2x00_alloc_fw_dump(vha); 1880 } else { 1881 goto failed; 1882 } 1883 } else { 1884 ql_log(ql_log_fatal, vha, 0x00cd, 1885 "ISP Firmware failed checksum.\n"); 1886 goto failed; 1887 } 1888 } else 1889 goto failed; 1890 1891 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1892 /* Enable proper parity. */ 1893 spin_lock_irqsave(&ha->hardware_lock, flags); 1894 if (IS_QLA2300(ha)) 1895 /* SRAM parity */ 1896 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 1897 else 1898 /* SRAM, Instruction RAM and GP RAM parity */ 1899 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 1900 RD_REG_WORD(®->hccr); 1901 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1902 } 1903 1904 if (IS_QLA27XX(ha)) 1905 ha->flags.fac_supported = 1; 1906 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 1907 uint32_t size; 1908 1909 rval = qla81xx_fac_get_sector_size(vha, &size); 1910 if (rval == QLA_SUCCESS) { 1911 ha->flags.fac_supported = 1; 1912 ha->fdt_block_size = size << 2; 1913 } else { 1914 ql_log(ql_log_warn, vha, 0x00ce, 1915 "Unsupported FAC firmware (%d.%02d.%02d).\n", 1916 ha->fw_major_version, ha->fw_minor_version, 1917 ha->fw_subminor_version); 1918 1919 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 1920 ha->flags.fac_supported = 0; 1921 rval = QLA_SUCCESS; 1922 } 1923 } 1924 } 1925 failed: 1926 if (rval) { 1927 ql_log(ql_log_fatal, vha, 0x00cf, 1928 "Setup chip ****FAILED****.\n"); 1929 } 1930 1931 return (rval); 1932 } 1933 1934 /** 1935 * qla2x00_init_response_q_entries() - Initializes response queue entries. 1936 * @ha: HA context 1937 * 1938 * Beginning of request ring has initialization control block already built 1939 * by nvram config routine. 1940 * 1941 * Returns 0 on success. 1942 */ 1943 void 1944 qla2x00_init_response_q_entries(struct rsp_que *rsp) 1945 { 1946 uint16_t cnt; 1947 response_t *pkt; 1948 1949 rsp->ring_ptr = rsp->ring; 1950 rsp->ring_index = 0; 1951 rsp->status_srb = NULL; 1952 pkt = rsp->ring_ptr; 1953 for (cnt = 0; cnt < rsp->length; cnt++) { 1954 pkt->signature = RESPONSE_PROCESSED; 1955 pkt++; 1956 } 1957 } 1958 1959 /** 1960 * qla2x00_update_fw_options() - Read and process firmware options. 1961 * @ha: HA context 1962 * 1963 * Returns 0 on success. 1964 */ 1965 void 1966 qla2x00_update_fw_options(scsi_qla_host_t *vha) 1967 { 1968 uint16_t swing, emphasis, tx_sens, rx_sens; 1969 struct qla_hw_data *ha = vha->hw; 1970 1971 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 1972 qla2x00_get_fw_options(vha, ha->fw_options); 1973 1974 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 1975 return; 1976 1977 /* Serial Link options. */ 1978 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 1979 "Serial link options.\n"); 1980 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 1981 (uint8_t *)&ha->fw_seriallink_options, 1982 sizeof(ha->fw_seriallink_options)); 1983 1984 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 1985 if (ha->fw_seriallink_options[3] & BIT_2) { 1986 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 1987 1988 /* 1G settings */ 1989 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 1990 emphasis = (ha->fw_seriallink_options[2] & 1991 (BIT_4 | BIT_3)) >> 3; 1992 tx_sens = ha->fw_seriallink_options[0] & 1993 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1994 rx_sens = (ha->fw_seriallink_options[0] & 1995 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1996 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 1997 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 1998 if (rx_sens == 0x0) 1999 rx_sens = 0x3; 2000 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 2001 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2002 ha->fw_options[10] |= BIT_5 | 2003 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 2004 (tx_sens & (BIT_1 | BIT_0)); 2005 2006 /* 2G settings */ 2007 swing = (ha->fw_seriallink_options[2] & 2008 (BIT_7 | BIT_6 | BIT_5)) >> 5; 2009 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 2010 tx_sens = ha->fw_seriallink_options[1] & 2011 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2012 rx_sens = (ha->fw_seriallink_options[1] & 2013 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 2014 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 2015 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 2016 if (rx_sens == 0x0) 2017 rx_sens = 0x3; 2018 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 2019 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2020 ha->fw_options[11] |= BIT_5 | 2021 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 2022 (tx_sens & (BIT_1 | BIT_0)); 2023 } 2024 2025 /* FCP2 options. */ 2026 /* Return command IOCBs without waiting for an ABTS to complete. */ 2027 ha->fw_options[3] |= BIT_13; 2028 2029 /* LED scheme. */ 2030 if (ha->flags.enable_led_scheme) 2031 ha->fw_options[2] |= BIT_12; 2032 2033 /* Detect ISP6312. */ 2034 if (IS_QLA6312(ha)) 2035 ha->fw_options[2] |= BIT_13; 2036 2037 /* Update firmware options. */ 2038 qla2x00_set_fw_options(vha, ha->fw_options); 2039 } 2040 2041 void 2042 qla24xx_update_fw_options(scsi_qla_host_t *vha) 2043 { 2044 int rval; 2045 struct qla_hw_data *ha = vha->hw; 2046 2047 if (IS_P3P_TYPE(ha)) 2048 return; 2049 2050 /* Update Serial Link options. */ 2051 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 2052 return; 2053 2054 rval = qla2x00_set_serdes_params(vha, 2055 le16_to_cpu(ha->fw_seriallink_options24[1]), 2056 le16_to_cpu(ha->fw_seriallink_options24[2]), 2057 le16_to_cpu(ha->fw_seriallink_options24[3])); 2058 if (rval != QLA_SUCCESS) { 2059 ql_log(ql_log_warn, vha, 0x0104, 2060 "Unable to update Serial Link options (%x).\n", rval); 2061 } 2062 } 2063 2064 void 2065 qla2x00_config_rings(struct scsi_qla_host *vha) 2066 { 2067 struct qla_hw_data *ha = vha->hw; 2068 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2069 struct req_que *req = ha->req_q_map[0]; 2070 struct rsp_que *rsp = ha->rsp_q_map[0]; 2071 2072 /* Setup ring parameters in initialization control block. */ 2073 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); 2074 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); 2075 ha->init_cb->request_q_length = cpu_to_le16(req->length); 2076 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 2077 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 2078 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 2079 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 2080 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 2081 2082 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 2083 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 2084 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 2085 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 2086 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 2087 } 2088 2089 void 2090 qla24xx_config_rings(struct scsi_qla_host *vha) 2091 { 2092 struct qla_hw_data *ha = vha->hw; 2093 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); 2094 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 2095 struct qla_msix_entry *msix; 2096 struct init_cb_24xx *icb; 2097 uint16_t rid = 0; 2098 struct req_que *req = ha->req_q_map[0]; 2099 struct rsp_que *rsp = ha->rsp_q_map[0]; 2100 2101 /* Setup ring parameters in initialization control block. */ 2102 icb = (struct init_cb_24xx *)ha->init_cb; 2103 icb->request_q_outpointer = __constant_cpu_to_le16(0); 2104 icb->response_q_inpointer = __constant_cpu_to_le16(0); 2105 icb->request_q_length = cpu_to_le16(req->length); 2106 icb->response_q_length = cpu_to_le16(rsp->length); 2107 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 2108 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 2109 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 2110 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 2111 2112 /* Setup ATIO queue dma pointers for target mode */ 2113 icb->atio_q_inpointer = __constant_cpu_to_le16(0); 2114 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 2115 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 2116 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 2117 2118 if (IS_SHADOW_REG_CAPABLE(ha)) 2119 icb->firmware_options_2 |= 2120 __constant_cpu_to_le32(BIT_30|BIT_29); 2121 2122 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 2123 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); 2124 icb->rid = __constant_cpu_to_le16(rid); 2125 if (ha->flags.msix_enabled) { 2126 msix = &ha->msix_entries[1]; 2127 ql_dbg(ql_dbg_init, vha, 0x00fd, 2128 "Registering vector 0x%x for base que.\n", 2129 msix->entry); 2130 icb->msix = cpu_to_le16(msix->entry); 2131 } 2132 /* Use alternate PCI bus number */ 2133 if (MSB(rid)) 2134 icb->firmware_options_2 |= 2135 __constant_cpu_to_le32(BIT_19); 2136 /* Use alternate PCI devfn */ 2137 if (LSB(rid)) 2138 icb->firmware_options_2 |= 2139 __constant_cpu_to_le32(BIT_18); 2140 2141 /* Use Disable MSIX Handshake mode for capable adapters */ 2142 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 2143 (ha->flags.msix_enabled)) { 2144 icb->firmware_options_2 &= 2145 __constant_cpu_to_le32(~BIT_22); 2146 ha->flags.disable_msix_handshake = 1; 2147 ql_dbg(ql_dbg_init, vha, 0x00fe, 2148 "MSIX Handshake Disable Mode turned on.\n"); 2149 } else { 2150 icb->firmware_options_2 |= 2151 __constant_cpu_to_le32(BIT_22); 2152 } 2153 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); 2154 2155 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 2156 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 2157 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 2158 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 2159 } else { 2160 WRT_REG_DWORD(®->isp24.req_q_in, 0); 2161 WRT_REG_DWORD(®->isp24.req_q_out, 0); 2162 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 2163 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 2164 } 2165 qlt_24xx_config_rings(vha); 2166 2167 /* PCI posting */ 2168 RD_REG_DWORD(&ioreg->hccr); 2169 } 2170 2171 /** 2172 * qla2x00_init_rings() - Initializes firmware. 2173 * @ha: HA context 2174 * 2175 * Beginning of request ring has initialization control block already built 2176 * by nvram config routine. 2177 * 2178 * Returns 0 on success. 2179 */ 2180 int 2181 qla2x00_init_rings(scsi_qla_host_t *vha) 2182 { 2183 int rval; 2184 unsigned long flags = 0; 2185 int cnt, que; 2186 struct qla_hw_data *ha = vha->hw; 2187 struct req_que *req; 2188 struct rsp_que *rsp; 2189 struct mid_init_cb_24xx *mid_init_cb = 2190 (struct mid_init_cb_24xx *) ha->init_cb; 2191 2192 spin_lock_irqsave(&ha->hardware_lock, flags); 2193 2194 /* Clear outstanding commands array. */ 2195 for (que = 0; que < ha->max_req_queues; que++) { 2196 req = ha->req_q_map[que]; 2197 if (!req) 2198 continue; 2199 req->out_ptr = (void *)(req->ring + req->length); 2200 *req->out_ptr = 0; 2201 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 2202 req->outstanding_cmds[cnt] = NULL; 2203 2204 req->current_outstanding_cmd = 1; 2205 2206 /* Initialize firmware. */ 2207 req->ring_ptr = req->ring; 2208 req->ring_index = 0; 2209 req->cnt = req->length; 2210 } 2211 2212 for (que = 0; que < ha->max_rsp_queues; que++) { 2213 rsp = ha->rsp_q_map[que]; 2214 if (!rsp) 2215 continue; 2216 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 2217 *rsp->in_ptr = 0; 2218 /* Initialize response queue entries */ 2219 if (IS_QLAFX00(ha)) 2220 qlafx00_init_response_q_entries(rsp); 2221 else 2222 qla2x00_init_response_q_entries(rsp); 2223 } 2224 2225 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 2226 ha->tgt.atio_ring_index = 0; 2227 /* Initialize ATIO queue entries */ 2228 qlt_init_atio_q_entries(vha); 2229 2230 ha->isp_ops->config_rings(vha); 2231 2232 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2233 2234 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 2235 2236 if (IS_QLAFX00(ha)) { 2237 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 2238 goto next_check; 2239 } 2240 2241 /* Update any ISP specific firmware options before initialization. */ 2242 ha->isp_ops->update_fw_options(vha); 2243 2244 if (ha->flags.npiv_supported) { 2245 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 2246 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 2247 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 2248 } 2249 2250 if (IS_FWI2_CAPABLE(ha)) { 2251 mid_init_cb->options = __constant_cpu_to_le16(BIT_1); 2252 mid_init_cb->init_cb.execution_throttle = 2253 cpu_to_le16(ha->fw_xcb_count); 2254 /* D-Port Status */ 2255 if (IS_DPORT_CAPABLE(ha)) 2256 mid_init_cb->init_cb.firmware_options_1 |= 2257 cpu_to_le16(BIT_7); 2258 /* Enable FA-WWPN */ 2259 ha->flags.fawwpn_enabled = 2260 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) ? 1 : 0; 2261 ql_dbg(ql_dbg_init, vha, 0x0141, "FA-WWPN Support: %s.\n", 2262 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 2263 } 2264 2265 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 2266 next_check: 2267 if (rval) { 2268 ql_log(ql_log_fatal, vha, 0x00d2, 2269 "Init Firmware **** FAILED ****.\n"); 2270 } else { 2271 ql_dbg(ql_dbg_init, vha, 0x00d3, 2272 "Init Firmware -- success.\n"); 2273 } 2274 2275 return (rval); 2276 } 2277 2278 /** 2279 * qla2x00_fw_ready() - Waits for firmware ready. 2280 * @ha: HA context 2281 * 2282 * Returns 0 on success. 2283 */ 2284 static int 2285 qla2x00_fw_ready(scsi_qla_host_t *vha) 2286 { 2287 int rval; 2288 unsigned long wtime, mtime, cs84xx_time; 2289 uint16_t min_wait; /* Minimum wait time if loop is down */ 2290 uint16_t wait_time; /* Wait time if loop is coming ready */ 2291 uint16_t state[6]; 2292 struct qla_hw_data *ha = vha->hw; 2293 2294 if (IS_QLAFX00(vha->hw)) 2295 return qlafx00_fw_ready(vha); 2296 2297 rval = QLA_SUCCESS; 2298 2299 /* Time to wait for loop down */ 2300 if (IS_P3P_TYPE(ha)) 2301 min_wait = 30; 2302 else 2303 min_wait = 20; 2304 2305 /* 2306 * Firmware should take at most one RATOV to login, plus 5 seconds for 2307 * our own processing. 2308 */ 2309 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 2310 wait_time = min_wait; 2311 } 2312 2313 /* Min wait time if loop down */ 2314 mtime = jiffies + (min_wait * HZ); 2315 2316 /* wait time before firmware ready */ 2317 wtime = jiffies + (wait_time * HZ); 2318 2319 /* Wait for ISP to finish LIP */ 2320 if (!vha->flags.init_done) 2321 ql_log(ql_log_info, vha, 0x801e, 2322 "Waiting for LIP to complete.\n"); 2323 2324 do { 2325 memset(state, -1, sizeof(state)); 2326 rval = qla2x00_get_firmware_state(vha, state); 2327 if (rval == QLA_SUCCESS) { 2328 if (state[0] < FSTATE_LOSS_OF_SYNC) { 2329 vha->device_flags &= ~DFLG_NO_CABLE; 2330 } 2331 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 2332 ql_dbg(ql_dbg_taskm, vha, 0x801f, 2333 "fw_state=%x 84xx=%x.\n", state[0], 2334 state[2]); 2335 if ((state[2] & FSTATE_LOGGED_IN) && 2336 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 2337 ql_dbg(ql_dbg_taskm, vha, 0x8028, 2338 "Sending verify iocb.\n"); 2339 2340 cs84xx_time = jiffies; 2341 rval = qla84xx_init_chip(vha); 2342 if (rval != QLA_SUCCESS) { 2343 ql_log(ql_log_warn, 2344 vha, 0x8007, 2345 "Init chip failed.\n"); 2346 break; 2347 } 2348 2349 /* Add time taken to initialize. */ 2350 cs84xx_time = jiffies - cs84xx_time; 2351 wtime += cs84xx_time; 2352 mtime += cs84xx_time; 2353 ql_dbg(ql_dbg_taskm, vha, 0x8008, 2354 "Increasing wait time by %ld. " 2355 "New time %ld.\n", cs84xx_time, 2356 wtime); 2357 } 2358 } else if (state[0] == FSTATE_READY) { 2359 ql_dbg(ql_dbg_taskm, vha, 0x8037, 2360 "F/W Ready - OK.\n"); 2361 2362 qla2x00_get_retry_cnt(vha, &ha->retry_count, 2363 &ha->login_timeout, &ha->r_a_tov); 2364 2365 rval = QLA_SUCCESS; 2366 break; 2367 } 2368 2369 rval = QLA_FUNCTION_FAILED; 2370 2371 if (atomic_read(&vha->loop_down_timer) && 2372 state[0] != FSTATE_READY) { 2373 /* Loop down. Timeout on min_wait for states 2374 * other than Wait for Login. 2375 */ 2376 if (time_after_eq(jiffies, mtime)) { 2377 ql_log(ql_log_info, vha, 0x8038, 2378 "Cable is unplugged...\n"); 2379 2380 vha->device_flags |= DFLG_NO_CABLE; 2381 break; 2382 } 2383 } 2384 } else { 2385 /* Mailbox cmd failed. Timeout on min_wait. */ 2386 if (time_after_eq(jiffies, mtime) || 2387 ha->flags.isp82xx_fw_hung) 2388 break; 2389 } 2390 2391 if (time_after_eq(jiffies, wtime)) 2392 break; 2393 2394 /* Delay for a while */ 2395 msleep(500); 2396 } while (1); 2397 2398 ql_dbg(ql_dbg_taskm, vha, 0x803a, 2399 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 2400 state[1], state[2], state[3], state[4], state[5], jiffies); 2401 2402 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 2403 ql_log(ql_log_warn, vha, 0x803b, 2404 "Firmware ready **** FAILED ****.\n"); 2405 } 2406 2407 return (rval); 2408 } 2409 2410 /* 2411 * qla2x00_configure_hba 2412 * Setup adapter context. 2413 * 2414 * Input: 2415 * ha = adapter state pointer. 2416 * 2417 * Returns: 2418 * 0 = success 2419 * 2420 * Context: 2421 * Kernel context. 2422 */ 2423 static int 2424 qla2x00_configure_hba(scsi_qla_host_t *vha) 2425 { 2426 int rval; 2427 uint16_t loop_id; 2428 uint16_t topo; 2429 uint16_t sw_cap; 2430 uint8_t al_pa; 2431 uint8_t area; 2432 uint8_t domain; 2433 char connect_type[22]; 2434 struct qla_hw_data *ha = vha->hw; 2435 unsigned long flags; 2436 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 2437 2438 /* Get host addresses. */ 2439 rval = qla2x00_get_adapter_id(vha, 2440 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 2441 if (rval != QLA_SUCCESS) { 2442 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 2443 IS_CNA_CAPABLE(ha) || 2444 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 2445 ql_dbg(ql_dbg_disc, vha, 0x2008, 2446 "Loop is in a transition state.\n"); 2447 } else { 2448 ql_log(ql_log_warn, vha, 0x2009, 2449 "Unable to get host loop ID.\n"); 2450 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 2451 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 2452 ql_log(ql_log_warn, vha, 0x1151, 2453 "Doing link init.\n"); 2454 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 2455 return rval; 2456 } 2457 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2458 } 2459 return (rval); 2460 } 2461 2462 if (topo == 4) { 2463 ql_log(ql_log_info, vha, 0x200a, 2464 "Cannot get topology - retrying.\n"); 2465 return (QLA_FUNCTION_FAILED); 2466 } 2467 2468 vha->loop_id = loop_id; 2469 2470 /* initialize */ 2471 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 2472 ha->operating_mode = LOOP; 2473 ha->switch_cap = 0; 2474 2475 switch (topo) { 2476 case 0: 2477 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 2478 ha->current_topology = ISP_CFG_NL; 2479 strcpy(connect_type, "(Loop)"); 2480 break; 2481 2482 case 1: 2483 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 2484 ha->switch_cap = sw_cap; 2485 ha->current_topology = ISP_CFG_FL; 2486 strcpy(connect_type, "(FL_Port)"); 2487 break; 2488 2489 case 2: 2490 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 2491 ha->operating_mode = P2P; 2492 ha->current_topology = ISP_CFG_N; 2493 strcpy(connect_type, "(N_Port-to-N_Port)"); 2494 break; 2495 2496 case 3: 2497 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 2498 ha->switch_cap = sw_cap; 2499 ha->operating_mode = P2P; 2500 ha->current_topology = ISP_CFG_F; 2501 strcpy(connect_type, "(F_Port)"); 2502 break; 2503 2504 default: 2505 ql_dbg(ql_dbg_disc, vha, 0x200f, 2506 "HBA in unknown topology %x, using NL.\n", topo); 2507 ha->current_topology = ISP_CFG_NL; 2508 strcpy(connect_type, "(Loop)"); 2509 break; 2510 } 2511 2512 /* Save Host port and loop ID. */ 2513 /* byte order - Big Endian */ 2514 vha->d_id.b.domain = domain; 2515 vha->d_id.b.area = area; 2516 vha->d_id.b.al_pa = al_pa; 2517 2518 spin_lock_irqsave(&ha->vport_slock, flags); 2519 qlt_update_vp_map(vha, SET_AL_PA); 2520 spin_unlock_irqrestore(&ha->vport_slock, flags); 2521 2522 if (!vha->flags.init_done) 2523 ql_log(ql_log_info, vha, 0x2010, 2524 "Topology - %s, Host Loop address 0x%x.\n", 2525 connect_type, vha->loop_id); 2526 2527 return(rval); 2528 } 2529 2530 inline void 2531 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 2532 char *def) 2533 { 2534 char *st, *en; 2535 uint16_t index; 2536 struct qla_hw_data *ha = vha->hw; 2537 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 2538 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 2539 2540 if (memcmp(model, BINZERO, len) != 0) { 2541 strncpy(ha->model_number, model, len); 2542 st = en = ha->model_number; 2543 en += len - 1; 2544 while (en > st) { 2545 if (*en != 0x20 && *en != 0x00) 2546 break; 2547 *en-- = '\0'; 2548 } 2549 2550 index = (ha->pdev->subsystem_device & 0xff); 2551 if (use_tbl && 2552 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2553 index < QLA_MODEL_NAMES) 2554 strncpy(ha->model_desc, 2555 qla2x00_model_name[index * 2 + 1], 2556 sizeof(ha->model_desc) - 1); 2557 } else { 2558 index = (ha->pdev->subsystem_device & 0xff); 2559 if (use_tbl && 2560 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2561 index < QLA_MODEL_NAMES) { 2562 strcpy(ha->model_number, 2563 qla2x00_model_name[index * 2]); 2564 strncpy(ha->model_desc, 2565 qla2x00_model_name[index * 2 + 1], 2566 sizeof(ha->model_desc) - 1); 2567 } else { 2568 strcpy(ha->model_number, def); 2569 } 2570 } 2571 if (IS_FWI2_CAPABLE(ha)) 2572 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 2573 sizeof(ha->model_desc)); 2574 } 2575 2576 /* On sparc systems, obtain port and node WWN from firmware 2577 * properties. 2578 */ 2579 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 2580 { 2581 #ifdef CONFIG_SPARC 2582 struct qla_hw_data *ha = vha->hw; 2583 struct pci_dev *pdev = ha->pdev; 2584 struct device_node *dp = pci_device_to_OF_node(pdev); 2585 const u8 *val; 2586 int len; 2587 2588 val = of_get_property(dp, "port-wwn", &len); 2589 if (val && len >= WWN_SIZE) 2590 memcpy(nv->port_name, val, WWN_SIZE); 2591 2592 val = of_get_property(dp, "node-wwn", &len); 2593 if (val && len >= WWN_SIZE) 2594 memcpy(nv->node_name, val, WWN_SIZE); 2595 #endif 2596 } 2597 2598 /* 2599 * NVRAM configuration for ISP 2xxx 2600 * 2601 * Input: 2602 * ha = adapter block pointer. 2603 * 2604 * Output: 2605 * initialization control block in response_ring 2606 * host adapters parameters in host adapter block 2607 * 2608 * Returns: 2609 * 0 = success. 2610 */ 2611 int 2612 qla2x00_nvram_config(scsi_qla_host_t *vha) 2613 { 2614 int rval; 2615 uint8_t chksum = 0; 2616 uint16_t cnt; 2617 uint8_t *dptr1, *dptr2; 2618 struct qla_hw_data *ha = vha->hw; 2619 init_cb_t *icb = ha->init_cb; 2620 nvram_t *nv = ha->nvram; 2621 uint8_t *ptr = ha->nvram; 2622 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2623 2624 rval = QLA_SUCCESS; 2625 2626 /* Determine NVRAM starting address. */ 2627 ha->nvram_size = sizeof(nvram_t); 2628 ha->nvram_base = 0; 2629 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 2630 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 2631 ha->nvram_base = 0x80; 2632 2633 /* Get NVRAM data and calculate checksum. */ 2634 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 2635 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 2636 chksum += *ptr++; 2637 2638 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 2639 "Contents of NVRAM.\n"); 2640 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 2641 (uint8_t *)nv, ha->nvram_size); 2642 2643 /* Bad NVRAM data, set defaults parameters. */ 2644 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 2645 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 2646 /* Reset NVRAM data. */ 2647 ql_log(ql_log_warn, vha, 0x0064, 2648 "Inconsistent NVRAM " 2649 "detected: checksum=0x%x id=%c version=0x%x.\n", 2650 chksum, nv->id[0], nv->nvram_version); 2651 ql_log(ql_log_warn, vha, 0x0065, 2652 "Falling back to " 2653 "functioning (yet invalid -- WWPN) defaults.\n"); 2654 2655 /* 2656 * Set default initialization control block. 2657 */ 2658 memset(nv, 0, ha->nvram_size); 2659 nv->parameter_block_version = ICB_VERSION; 2660 2661 if (IS_QLA23XX(ha)) { 2662 nv->firmware_options[0] = BIT_2 | BIT_1; 2663 nv->firmware_options[1] = BIT_7 | BIT_5; 2664 nv->add_firmware_options[0] = BIT_5; 2665 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2666 nv->frame_payload_size = 2048; 2667 nv->special_options[1] = BIT_7; 2668 } else if (IS_QLA2200(ha)) { 2669 nv->firmware_options[0] = BIT_2 | BIT_1; 2670 nv->firmware_options[1] = BIT_7 | BIT_5; 2671 nv->add_firmware_options[0] = BIT_5; 2672 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2673 nv->frame_payload_size = 1024; 2674 } else if (IS_QLA2100(ha)) { 2675 nv->firmware_options[0] = BIT_3 | BIT_1; 2676 nv->firmware_options[1] = BIT_5; 2677 nv->frame_payload_size = 1024; 2678 } 2679 2680 nv->max_iocb_allocation = __constant_cpu_to_le16(256); 2681 nv->execution_throttle = __constant_cpu_to_le16(16); 2682 nv->retry_count = 8; 2683 nv->retry_delay = 1; 2684 2685 nv->port_name[0] = 33; 2686 nv->port_name[3] = 224; 2687 nv->port_name[4] = 139; 2688 2689 qla2xxx_nvram_wwn_from_ofw(vha, nv); 2690 2691 nv->login_timeout = 4; 2692 2693 /* 2694 * Set default host adapter parameters 2695 */ 2696 nv->host_p[1] = BIT_2; 2697 nv->reset_delay = 5; 2698 nv->port_down_retry_count = 8; 2699 nv->max_luns_per_target = __constant_cpu_to_le16(8); 2700 nv->link_down_timeout = 60; 2701 2702 rval = 1; 2703 } 2704 2705 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 2706 /* 2707 * The SN2 does not provide BIOS emulation which means you can't change 2708 * potentially bogus BIOS settings. Force the use of default settings 2709 * for link rate and frame size. Hope that the rest of the settings 2710 * are valid. 2711 */ 2712 if (ia64_platform_is("sn2")) { 2713 nv->frame_payload_size = 2048; 2714 if (IS_QLA23XX(ha)) 2715 nv->special_options[1] = BIT_7; 2716 } 2717 #endif 2718 2719 /* Reset Initialization control block */ 2720 memset(icb, 0, ha->init_cb_size); 2721 2722 /* 2723 * Setup driver NVRAM options. 2724 */ 2725 nv->firmware_options[0] |= (BIT_6 | BIT_1); 2726 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 2727 nv->firmware_options[1] |= (BIT_5 | BIT_0); 2728 nv->firmware_options[1] &= ~BIT_4; 2729 2730 if (IS_QLA23XX(ha)) { 2731 nv->firmware_options[0] |= BIT_2; 2732 nv->firmware_options[0] &= ~BIT_3; 2733 nv->special_options[0] &= ~BIT_6; 2734 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 2735 2736 if (IS_QLA2300(ha)) { 2737 if (ha->fb_rev == FPM_2310) { 2738 strcpy(ha->model_number, "QLA2310"); 2739 } else { 2740 strcpy(ha->model_number, "QLA2300"); 2741 } 2742 } else { 2743 qla2x00_set_model_info(vha, nv->model_number, 2744 sizeof(nv->model_number), "QLA23xx"); 2745 } 2746 } else if (IS_QLA2200(ha)) { 2747 nv->firmware_options[0] |= BIT_2; 2748 /* 2749 * 'Point-to-point preferred, else loop' is not a safe 2750 * connection mode setting. 2751 */ 2752 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 2753 (BIT_5 | BIT_4)) { 2754 /* Force 'loop preferred, else point-to-point'. */ 2755 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 2756 nv->add_firmware_options[0] |= BIT_5; 2757 } 2758 strcpy(ha->model_number, "QLA22xx"); 2759 } else /*if (IS_QLA2100(ha))*/ { 2760 strcpy(ha->model_number, "QLA2100"); 2761 } 2762 2763 /* 2764 * Copy over NVRAM RISC parameter block to initialization control block. 2765 */ 2766 dptr1 = (uint8_t *)icb; 2767 dptr2 = (uint8_t *)&nv->parameter_block_version; 2768 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 2769 while (cnt--) 2770 *dptr1++ = *dptr2++; 2771 2772 /* Copy 2nd half. */ 2773 dptr1 = (uint8_t *)icb->add_firmware_options; 2774 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 2775 while (cnt--) 2776 *dptr1++ = *dptr2++; 2777 2778 /* Use alternate WWN? */ 2779 if (nv->host_p[1] & BIT_7) { 2780 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 2781 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 2782 } 2783 2784 /* Prepare nodename */ 2785 if ((icb->firmware_options[1] & BIT_6) == 0) { 2786 /* 2787 * Firmware will apply the following mask if the nodename was 2788 * not provided. 2789 */ 2790 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 2791 icb->node_name[0] &= 0xF0; 2792 } 2793 2794 /* 2795 * Set host adapter parameters. 2796 */ 2797 2798 /* 2799 * BIT_7 in the host-parameters section allows for modification to 2800 * internal driver logging. 2801 */ 2802 if (nv->host_p[0] & BIT_7) 2803 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 2804 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 2805 /* Always load RISC code on non ISP2[12]00 chips. */ 2806 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 2807 ha->flags.disable_risc_code_load = 0; 2808 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 2809 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 2810 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 2811 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 2812 ha->flags.disable_serdes = 0; 2813 2814 ha->operating_mode = 2815 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 2816 2817 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 2818 sizeof(ha->fw_seriallink_options)); 2819 2820 /* save HBA serial number */ 2821 ha->serial0 = icb->port_name[5]; 2822 ha->serial1 = icb->port_name[6]; 2823 ha->serial2 = icb->port_name[7]; 2824 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 2825 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 2826 2827 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 2828 2829 ha->retry_count = nv->retry_count; 2830 2831 /* Set minimum login_timeout to 4 seconds. */ 2832 if (nv->login_timeout != ql2xlogintimeout) 2833 nv->login_timeout = ql2xlogintimeout; 2834 if (nv->login_timeout < 4) 2835 nv->login_timeout = 4; 2836 ha->login_timeout = nv->login_timeout; 2837 icb->login_timeout = nv->login_timeout; 2838 2839 /* Set minimum RATOV to 100 tenths of a second. */ 2840 ha->r_a_tov = 100; 2841 2842 ha->loop_reset_delay = nv->reset_delay; 2843 2844 /* Link Down Timeout = 0: 2845 * 2846 * When Port Down timer expires we will start returning 2847 * I/O's to OS with "DID_NO_CONNECT". 2848 * 2849 * Link Down Timeout != 0: 2850 * 2851 * The driver waits for the link to come up after link down 2852 * before returning I/Os to OS with "DID_NO_CONNECT". 2853 */ 2854 if (nv->link_down_timeout == 0) { 2855 ha->loop_down_abort_time = 2856 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 2857 } else { 2858 ha->link_down_timeout = nv->link_down_timeout; 2859 ha->loop_down_abort_time = 2860 (LOOP_DOWN_TIME - ha->link_down_timeout); 2861 } 2862 2863 /* 2864 * Need enough time to try and get the port back. 2865 */ 2866 ha->port_down_retry_count = nv->port_down_retry_count; 2867 if (qlport_down_retry) 2868 ha->port_down_retry_count = qlport_down_retry; 2869 /* Set login_retry_count */ 2870 ha->login_retry_count = nv->retry_count; 2871 if (ha->port_down_retry_count == nv->port_down_retry_count && 2872 ha->port_down_retry_count > 3) 2873 ha->login_retry_count = ha->port_down_retry_count; 2874 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 2875 ha->login_retry_count = ha->port_down_retry_count; 2876 if (ql2xloginretrycount) 2877 ha->login_retry_count = ql2xloginretrycount; 2878 2879 icb->lun_enables = __constant_cpu_to_le16(0); 2880 icb->command_resource_count = 0; 2881 icb->immediate_notify_resource_count = 0; 2882 icb->timeout = __constant_cpu_to_le16(0); 2883 2884 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2885 /* Enable RIO */ 2886 icb->firmware_options[0] &= ~BIT_3; 2887 icb->add_firmware_options[0] &= 2888 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2889 icb->add_firmware_options[0] |= BIT_2; 2890 icb->response_accumulation_timer = 3; 2891 icb->interrupt_delay_timer = 5; 2892 2893 vha->flags.process_response_queue = 1; 2894 } else { 2895 /* Enable ZIO. */ 2896 if (!vha->flags.init_done) { 2897 ha->zio_mode = icb->add_firmware_options[0] & 2898 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2899 ha->zio_timer = icb->interrupt_delay_timer ? 2900 icb->interrupt_delay_timer: 2; 2901 } 2902 icb->add_firmware_options[0] &= 2903 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2904 vha->flags.process_response_queue = 0; 2905 if (ha->zio_mode != QLA_ZIO_DISABLED) { 2906 ha->zio_mode = QLA_ZIO_MODE_6; 2907 2908 ql_log(ql_log_info, vha, 0x0068, 2909 "ZIO mode %d enabled; timer delay (%d us).\n", 2910 ha->zio_mode, ha->zio_timer * 100); 2911 2912 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 2913 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 2914 vha->flags.process_response_queue = 1; 2915 } 2916 } 2917 2918 if (rval) { 2919 ql_log(ql_log_warn, vha, 0x0069, 2920 "NVRAM configuration failed.\n"); 2921 } 2922 return (rval); 2923 } 2924 2925 static void 2926 qla2x00_rport_del(void *data) 2927 { 2928 fc_port_t *fcport = data; 2929 struct fc_rport *rport; 2930 unsigned long flags; 2931 2932 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2933 rport = fcport->drport ? fcport->drport: fcport->rport; 2934 fcport->drport = NULL; 2935 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2936 if (rport) 2937 fc_remote_port_delete(rport); 2938 } 2939 2940 /** 2941 * qla2x00_alloc_fcport() - Allocate a generic fcport. 2942 * @ha: HA context 2943 * @flags: allocation flags 2944 * 2945 * Returns a pointer to the allocated fcport, or NULL, if none available. 2946 */ 2947 fc_port_t * 2948 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 2949 { 2950 fc_port_t *fcport; 2951 2952 fcport = kzalloc(sizeof(fc_port_t), flags); 2953 if (!fcport) 2954 return NULL; 2955 2956 /* Setup fcport template structure. */ 2957 fcport->vha = vha; 2958 fcport->port_type = FCT_UNKNOWN; 2959 fcport->loop_id = FC_NO_LOOP_ID; 2960 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 2961 fcport->supported_classes = FC_COS_UNSPECIFIED; 2962 2963 return fcport; 2964 } 2965 2966 /* 2967 * qla2x00_configure_loop 2968 * Updates Fibre Channel Device Database with what is actually on loop. 2969 * 2970 * Input: 2971 * ha = adapter block pointer. 2972 * 2973 * Returns: 2974 * 0 = success. 2975 * 1 = error. 2976 * 2 = database was full and device was not configured. 2977 */ 2978 static int 2979 qla2x00_configure_loop(scsi_qla_host_t *vha) 2980 { 2981 int rval; 2982 unsigned long flags, save_flags; 2983 struct qla_hw_data *ha = vha->hw; 2984 rval = QLA_SUCCESS; 2985 2986 /* Get Initiator ID */ 2987 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 2988 rval = qla2x00_configure_hba(vha); 2989 if (rval != QLA_SUCCESS) { 2990 ql_dbg(ql_dbg_disc, vha, 0x2013, 2991 "Unable to configure HBA.\n"); 2992 return (rval); 2993 } 2994 } 2995 2996 save_flags = flags = vha->dpc_flags; 2997 ql_dbg(ql_dbg_disc, vha, 0x2014, 2998 "Configure loop -- dpc flags = 0x%lx.\n", flags); 2999 3000 /* 3001 * If we have both an RSCN and PORT UPDATE pending then handle them 3002 * both at the same time. 3003 */ 3004 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3005 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 3006 3007 qla2x00_get_data_rate(vha); 3008 3009 /* Determine what we need to do */ 3010 if (ha->current_topology == ISP_CFG_FL && 3011 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 3012 3013 set_bit(RSCN_UPDATE, &flags); 3014 3015 } else if (ha->current_topology == ISP_CFG_F && 3016 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 3017 3018 set_bit(RSCN_UPDATE, &flags); 3019 clear_bit(LOCAL_LOOP_UPDATE, &flags); 3020 3021 } else if (ha->current_topology == ISP_CFG_N) { 3022 clear_bit(RSCN_UPDATE, &flags); 3023 3024 } else if (!vha->flags.online || 3025 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 3026 3027 set_bit(RSCN_UPDATE, &flags); 3028 set_bit(LOCAL_LOOP_UPDATE, &flags); 3029 } 3030 3031 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 3032 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 3033 ql_dbg(ql_dbg_disc, vha, 0x2015, 3034 "Loop resync needed, failing.\n"); 3035 rval = QLA_FUNCTION_FAILED; 3036 } else 3037 rval = qla2x00_configure_local_loop(vha); 3038 } 3039 3040 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 3041 if (LOOP_TRANSITION(vha)) { 3042 ql_dbg(ql_dbg_disc, vha, 0x201e, 3043 "Needs RSCN update and loop transition.\n"); 3044 rval = QLA_FUNCTION_FAILED; 3045 } 3046 else 3047 rval = qla2x00_configure_fabric(vha); 3048 } 3049 3050 if (rval == QLA_SUCCESS) { 3051 if (atomic_read(&vha->loop_down_timer) || 3052 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 3053 rval = QLA_FUNCTION_FAILED; 3054 } else { 3055 atomic_set(&vha->loop_state, LOOP_READY); 3056 ql_dbg(ql_dbg_disc, vha, 0x2069, 3057 "LOOP READY.\n"); 3058 } 3059 } 3060 3061 if (rval) { 3062 ql_dbg(ql_dbg_disc, vha, 0x206a, 3063 "%s *** FAILED ***.\n", __func__); 3064 } else { 3065 ql_dbg(ql_dbg_disc, vha, 0x206b, 3066 "%s: exiting normally.\n", __func__); 3067 } 3068 3069 /* Restore state if a resync event occurred during processing */ 3070 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 3071 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 3072 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3073 if (test_bit(RSCN_UPDATE, &save_flags)) { 3074 set_bit(RSCN_UPDATE, &vha->dpc_flags); 3075 } 3076 } 3077 3078 return (rval); 3079 } 3080 3081 3082 3083 /* 3084 * qla2x00_configure_local_loop 3085 * Updates Fibre Channel Device Database with local loop devices. 3086 * 3087 * Input: 3088 * ha = adapter block pointer. 3089 * 3090 * Returns: 3091 * 0 = success. 3092 */ 3093 static int 3094 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 3095 { 3096 int rval, rval2; 3097 int found_devs; 3098 int found; 3099 fc_port_t *fcport, *new_fcport; 3100 3101 uint16_t index; 3102 uint16_t entries; 3103 char *id_iter; 3104 uint16_t loop_id; 3105 uint8_t domain, area, al_pa; 3106 struct qla_hw_data *ha = vha->hw; 3107 3108 found_devs = 0; 3109 new_fcport = NULL; 3110 entries = MAX_FIBRE_DEVICES_LOOP; 3111 3112 /* Get list of logged in devices. */ 3113 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 3114 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 3115 &entries); 3116 if (rval != QLA_SUCCESS) 3117 goto cleanup_allocation; 3118 3119 ql_dbg(ql_dbg_disc, vha, 0x2017, 3120 "Entries in ID list (%d).\n", entries); 3121 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 3122 (uint8_t *)ha->gid_list, 3123 entries * sizeof(struct gid_list_info)); 3124 3125 /* Allocate temporary fcport for any new fcports discovered. */ 3126 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3127 if (new_fcport == NULL) { 3128 ql_log(ql_log_warn, vha, 0x2018, 3129 "Memory allocation failed for fcport.\n"); 3130 rval = QLA_MEMORY_ALLOC_FAILED; 3131 goto cleanup_allocation; 3132 } 3133 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 3134 3135 /* 3136 * Mark local devices that were present with FCF_DEVICE_LOST for now. 3137 */ 3138 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3139 if (atomic_read(&fcport->state) == FCS_ONLINE && 3140 fcport->port_type != FCT_BROADCAST && 3141 (fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3142 3143 ql_dbg(ql_dbg_disc, vha, 0x2019, 3144 "Marking port lost loop_id=0x%04x.\n", 3145 fcport->loop_id); 3146 3147 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 3148 } 3149 } 3150 3151 /* Add devices to port list. */ 3152 id_iter = (char *)ha->gid_list; 3153 for (index = 0; index < entries; index++) { 3154 domain = ((struct gid_list_info *)id_iter)->domain; 3155 area = ((struct gid_list_info *)id_iter)->area; 3156 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 3157 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3158 loop_id = (uint16_t) 3159 ((struct gid_list_info *)id_iter)->loop_id_2100; 3160 else 3161 loop_id = le16_to_cpu( 3162 ((struct gid_list_info *)id_iter)->loop_id); 3163 id_iter += ha->gid_list_info_size; 3164 3165 /* Bypass reserved domain fields. */ 3166 if ((domain & 0xf0) == 0xf0) 3167 continue; 3168 3169 /* Bypass if not same domain and area of adapter. */ 3170 if (area && domain && 3171 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 3172 continue; 3173 3174 /* Bypass invalid local loop ID. */ 3175 if (loop_id > LAST_LOCAL_LOOP_ID) 3176 continue; 3177 3178 memset(new_fcport, 0, sizeof(fc_port_t)); 3179 3180 /* Fill in member data. */ 3181 new_fcport->d_id.b.domain = domain; 3182 new_fcport->d_id.b.area = area; 3183 new_fcport->d_id.b.al_pa = al_pa; 3184 new_fcport->loop_id = loop_id; 3185 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 3186 if (rval2 != QLA_SUCCESS) { 3187 ql_dbg(ql_dbg_disc, vha, 0x201a, 3188 "Failed to retrieve fcport information " 3189 "-- get_port_database=%x, loop_id=0x%04x.\n", 3190 rval2, new_fcport->loop_id); 3191 ql_dbg(ql_dbg_disc, vha, 0x201b, 3192 "Scheduling resync.\n"); 3193 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3194 continue; 3195 } 3196 3197 /* Check for matching device in port list. */ 3198 found = 0; 3199 fcport = NULL; 3200 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3201 if (memcmp(new_fcport->port_name, fcport->port_name, 3202 WWN_SIZE)) 3203 continue; 3204 3205 fcport->flags &= ~FCF_FABRIC_DEVICE; 3206 fcport->loop_id = new_fcport->loop_id; 3207 fcport->port_type = new_fcport->port_type; 3208 fcport->d_id.b24 = new_fcport->d_id.b24; 3209 memcpy(fcport->node_name, new_fcport->node_name, 3210 WWN_SIZE); 3211 3212 found++; 3213 break; 3214 } 3215 3216 if (!found) { 3217 /* New device, add to fcports list. */ 3218 list_add_tail(&new_fcport->list, &vha->vp_fcports); 3219 3220 /* Allocate a new replacement fcport. */ 3221 fcport = new_fcport; 3222 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3223 if (new_fcport == NULL) { 3224 ql_log(ql_log_warn, vha, 0x201c, 3225 "Failed to allocate memory for fcport.\n"); 3226 rval = QLA_MEMORY_ALLOC_FAILED; 3227 goto cleanup_allocation; 3228 } 3229 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 3230 } 3231 3232 /* Base iIDMA settings on HBA port speed. */ 3233 fcport->fp_speed = ha->link_data_rate; 3234 3235 qla2x00_update_fcport(vha, fcport); 3236 3237 found_devs++; 3238 } 3239 3240 cleanup_allocation: 3241 kfree(new_fcport); 3242 3243 if (rval != QLA_SUCCESS) { 3244 ql_dbg(ql_dbg_disc, vha, 0x201d, 3245 "Configure local loop error exit: rval=%x.\n", rval); 3246 } 3247 3248 return (rval); 3249 } 3250 3251 static void 3252 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 3253 { 3254 int rval; 3255 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3256 struct qla_hw_data *ha = vha->hw; 3257 3258 if (!IS_IIDMA_CAPABLE(ha)) 3259 return; 3260 3261 if (atomic_read(&fcport->state) != FCS_ONLINE) 3262 return; 3263 3264 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 3265 fcport->fp_speed > ha->link_data_rate) 3266 return; 3267 3268 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 3269 mb); 3270 if (rval != QLA_SUCCESS) { 3271 ql_dbg(ql_dbg_disc, vha, 0x2004, 3272 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 3273 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 3274 } else { 3275 ql_dbg(ql_dbg_disc, vha, 0x2005, 3276 "iIDMA adjusted to %s GB/s on %8phN.\n", 3277 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 3278 fcport->port_name); 3279 } 3280 } 3281 3282 static void 3283 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 3284 { 3285 struct fc_rport_identifiers rport_ids; 3286 struct fc_rport *rport; 3287 unsigned long flags; 3288 3289 rport_ids.node_name = wwn_to_u64(fcport->node_name); 3290 rport_ids.port_name = wwn_to_u64(fcport->port_name); 3291 rport_ids.port_id = fcport->d_id.b.domain << 16 | 3292 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 3293 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 3294 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 3295 if (!rport) { 3296 ql_log(ql_log_warn, vha, 0x2006, 3297 "Unable to allocate fc remote port.\n"); 3298 return; 3299 } 3300 /* 3301 * Create target mode FC NEXUS in qla_target.c if target mode is 3302 * enabled.. 3303 */ 3304 3305 qlt_fc_port_added(vha, fcport); 3306 3307 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 3308 *((fc_port_t **)rport->dd_data) = fcport; 3309 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 3310 3311 rport->supported_classes = fcport->supported_classes; 3312 3313 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 3314 if (fcport->port_type == FCT_INITIATOR) 3315 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 3316 if (fcport->port_type == FCT_TARGET) 3317 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 3318 fc_remote_port_rolechg(rport, rport_ids.roles); 3319 } 3320 3321 /* 3322 * qla2x00_update_fcport 3323 * Updates device on list. 3324 * 3325 * Input: 3326 * ha = adapter block pointer. 3327 * fcport = port structure pointer. 3328 * 3329 * Return: 3330 * 0 - Success 3331 * BIT_0 - error 3332 * 3333 * Context: 3334 * Kernel context. 3335 */ 3336 void 3337 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 3338 { 3339 fcport->vha = vha; 3340 3341 if (IS_QLAFX00(vha->hw)) { 3342 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 3343 goto reg_port; 3344 } 3345 fcport->login_retry = 0; 3346 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 3347 3348 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 3349 qla2x00_iidma_fcport(vha, fcport); 3350 qla24xx_update_fcport_fcp_prio(vha, fcport); 3351 3352 reg_port: 3353 if (qla_ini_mode_enabled(vha)) 3354 qla2x00_reg_remote_port(vha, fcport); 3355 else { 3356 /* 3357 * Create target mode FC NEXUS in qla_target.c 3358 */ 3359 qlt_fc_port_added(vha, fcport); 3360 } 3361 } 3362 3363 /* 3364 * qla2x00_configure_fabric 3365 * Setup SNS devices with loop ID's. 3366 * 3367 * Input: 3368 * ha = adapter block pointer. 3369 * 3370 * Returns: 3371 * 0 = success. 3372 * BIT_0 = error 3373 */ 3374 static int 3375 qla2x00_configure_fabric(scsi_qla_host_t *vha) 3376 { 3377 int rval; 3378 fc_port_t *fcport, *fcptemp; 3379 uint16_t next_loopid; 3380 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3381 uint16_t loop_id; 3382 LIST_HEAD(new_fcports); 3383 struct qla_hw_data *ha = vha->hw; 3384 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 3385 int discovery_gen; 3386 3387 /* If FL port exists, then SNS is present */ 3388 if (IS_FWI2_CAPABLE(ha)) 3389 loop_id = NPH_F_PORT; 3390 else 3391 loop_id = SNS_FL_PORT; 3392 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 3393 if (rval != QLA_SUCCESS) { 3394 ql_dbg(ql_dbg_disc, vha, 0x201f, 3395 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 3396 3397 vha->device_flags &= ~SWITCH_FOUND; 3398 return (QLA_SUCCESS); 3399 } 3400 vha->device_flags |= SWITCH_FOUND; 3401 3402 do { 3403 /* FDMI support. */ 3404 if (ql2xfdmienable && 3405 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 3406 qla2x00_fdmi_register(vha); 3407 3408 /* Ensure we are logged into the SNS. */ 3409 if (IS_FWI2_CAPABLE(ha)) 3410 loop_id = NPH_SNS; 3411 else 3412 loop_id = SIMPLE_NAME_SERVER; 3413 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 3414 0xfc, mb, BIT_1|BIT_0); 3415 if (rval != QLA_SUCCESS) { 3416 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3417 return rval; 3418 } 3419 if (mb[0] != MBS_COMMAND_COMPLETE) { 3420 ql_dbg(ql_dbg_disc, vha, 0x2042, 3421 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 3422 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], 3423 mb[2], mb[6], mb[7]); 3424 return (QLA_SUCCESS); 3425 } 3426 3427 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 3428 if (qla2x00_rft_id(vha)) { 3429 /* EMPTY */ 3430 ql_dbg(ql_dbg_disc, vha, 0x2045, 3431 "Register FC-4 TYPE failed.\n"); 3432 } 3433 if (qla2x00_rff_id(vha)) { 3434 /* EMPTY */ 3435 ql_dbg(ql_dbg_disc, vha, 0x2049, 3436 "Register FC-4 Features failed.\n"); 3437 } 3438 if (qla2x00_rnn_id(vha)) { 3439 /* EMPTY */ 3440 ql_dbg(ql_dbg_disc, vha, 0x204f, 3441 "Register Node Name failed.\n"); 3442 } else if (qla2x00_rsnn_nn(vha)) { 3443 /* EMPTY */ 3444 ql_dbg(ql_dbg_disc, vha, 0x2053, 3445 "Register Symobilic Node Name failed.\n"); 3446 } 3447 } 3448 3449 #define QLA_FCPORT_SCAN 1 3450 #define QLA_FCPORT_FOUND 2 3451 3452 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3453 fcport->scan_state = QLA_FCPORT_SCAN; 3454 } 3455 3456 /* Mark the time right before querying FW for connected ports. 3457 * This process is long, asynchronous and by the time it's done, 3458 * collected information might not be accurate anymore. E.g. 3459 * disconnected port might have re-connected and a brand new 3460 * session has been created. In this case session's generation 3461 * will be newer than discovery_gen. */ 3462 qlt_do_generation_tick(vha, &discovery_gen); 3463 3464 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); 3465 if (rval != QLA_SUCCESS) 3466 break; 3467 3468 /* 3469 * Logout all previous fabric devices marked lost, except 3470 * FCP2 devices. 3471 */ 3472 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3473 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3474 break; 3475 3476 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 3477 continue; 3478 3479 if (fcport->scan_state == QLA_FCPORT_SCAN) { 3480 if (qla_ini_mode_enabled(base_vha) && 3481 atomic_read(&fcport->state) == FCS_ONLINE) { 3482 qla2x00_mark_device_lost(vha, fcport, 3483 ql2xplogiabsentdevice, 0); 3484 if (fcport->loop_id != FC_NO_LOOP_ID && 3485 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3486 fcport->port_type != FCT_INITIATOR && 3487 fcport->port_type != FCT_BROADCAST) { 3488 ha->isp_ops->fabric_logout(vha, 3489 fcport->loop_id, 3490 fcport->d_id.b.domain, 3491 fcport->d_id.b.area, 3492 fcport->d_id.b.al_pa); 3493 qla2x00_clear_loop_id(fcport); 3494 } 3495 } else if (!qla_ini_mode_enabled(base_vha)) { 3496 /* 3497 * In target mode, explicitly kill 3498 * sessions and log out of devices 3499 * that are gone, so that we don't 3500 * end up with an initiator using the 3501 * wrong ACL (if the fabric recycles 3502 * an FC address and we have a stale 3503 * session around) and so that we don't 3504 * report initiators that are no longer 3505 * on the fabric. 3506 */ 3507 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf077, 3508 "port gone, logging out/killing session: " 3509 "%8phC state 0x%x flags 0x%x fc4_type 0x%x " 3510 "scan_state %d\n", 3511 fcport->port_name, 3512 atomic_read(&fcport->state), 3513 fcport->flags, fcport->fc4_type, 3514 fcport->scan_state); 3515 qlt_fc_port_deleted(vha, fcport, 3516 discovery_gen); 3517 } 3518 } 3519 } 3520 3521 /* Starting free loop ID. */ 3522 next_loopid = ha->min_external_loopid; 3523 3524 /* 3525 * Scan through our port list and login entries that need to be 3526 * logged in. 3527 */ 3528 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3529 if (atomic_read(&vha->loop_down_timer) || 3530 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3531 break; 3532 3533 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 3534 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 3535 continue; 3536 3537 /* 3538 * If we're not an initiator, skip looking for devices 3539 * and logging in. There's no reason for us to do it, 3540 * and it seems to actively cause problems in target 3541 * mode if we race with the initiator logging into us 3542 * (we might get the "port ID used" status back from 3543 * our login command and log out the initiator, which 3544 * seems to cause havoc). 3545 */ 3546 if (!qla_ini_mode_enabled(base_vha)) { 3547 if (fcport->scan_state == QLA_FCPORT_FOUND) { 3548 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf078, 3549 "port %8phC state 0x%x flags 0x%x fc4_type 0x%x " 3550 "scan_state %d (initiator mode disabled; skipping " 3551 "login)\n", fcport->port_name, 3552 atomic_read(&fcport->state), 3553 fcport->flags, fcport->fc4_type, 3554 fcport->scan_state); 3555 } 3556 continue; 3557 } 3558 3559 if (fcport->loop_id == FC_NO_LOOP_ID) { 3560 fcport->loop_id = next_loopid; 3561 rval = qla2x00_find_new_loop_id( 3562 base_vha, fcport); 3563 if (rval != QLA_SUCCESS) { 3564 /* Ran out of IDs to use */ 3565 break; 3566 } 3567 } 3568 /* Login and update database */ 3569 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3570 } 3571 3572 /* Exit if out of loop IDs. */ 3573 if (rval != QLA_SUCCESS) { 3574 break; 3575 } 3576 3577 /* 3578 * Login and add the new devices to our port list. 3579 */ 3580 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3581 if (atomic_read(&vha->loop_down_timer) || 3582 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3583 break; 3584 3585 /* 3586 * If we're not an initiator, skip looking for devices 3587 * and logging in. There's no reason for us to do it, 3588 * and it seems to actively cause problems in target 3589 * mode if we race with the initiator logging into us 3590 * (we might get the "port ID used" status back from 3591 * our login command and log out the initiator, which 3592 * seems to cause havoc). 3593 */ 3594 if (qla_ini_mode_enabled(base_vha)) { 3595 /* Find a new loop ID to use. */ 3596 fcport->loop_id = next_loopid; 3597 rval = qla2x00_find_new_loop_id(base_vha, 3598 fcport); 3599 if (rval != QLA_SUCCESS) { 3600 /* Ran out of IDs to use */ 3601 break; 3602 } 3603 3604 /* Login and update database */ 3605 qla2x00_fabric_dev_login(vha, fcport, 3606 &next_loopid); 3607 } else { 3608 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf079, 3609 "new port %8phC state 0x%x flags 0x%x fc4_type " 3610 "0x%x scan_state %d (initiator mode disabled; " 3611 "skipping login)\n", 3612 fcport->port_name, 3613 atomic_read(&fcport->state), 3614 fcport->flags, fcport->fc4_type, 3615 fcport->scan_state); 3616 } 3617 3618 list_move_tail(&fcport->list, &vha->vp_fcports); 3619 } 3620 } while (0); 3621 3622 /* Free all new device structures not processed. */ 3623 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3624 list_del(&fcport->list); 3625 kfree(fcport); 3626 } 3627 3628 if (rval) { 3629 ql_dbg(ql_dbg_disc, vha, 0x2068, 3630 "Configure fabric error exit rval=%d.\n", rval); 3631 } 3632 3633 return (rval); 3634 } 3635 3636 /* 3637 * qla2x00_find_all_fabric_devs 3638 * 3639 * Input: 3640 * ha = adapter block pointer. 3641 * dev = database device entry pointer. 3642 * 3643 * Returns: 3644 * 0 = success. 3645 * 3646 * Context: 3647 * Kernel context. 3648 */ 3649 static int 3650 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, 3651 struct list_head *new_fcports) 3652 { 3653 int rval; 3654 uint16_t loop_id; 3655 fc_port_t *fcport, *new_fcport, *fcptemp; 3656 int found; 3657 3658 sw_info_t *swl; 3659 int swl_idx; 3660 int first_dev, last_dev; 3661 port_id_t wrap = {}, nxt_d_id; 3662 struct qla_hw_data *ha = vha->hw; 3663 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 3664 3665 rval = QLA_SUCCESS; 3666 3667 /* Try GID_PT to get device list, else GAN. */ 3668 if (!ha->swl) 3669 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 3670 GFP_KERNEL); 3671 swl = ha->swl; 3672 if (!swl) { 3673 /*EMPTY*/ 3674 ql_dbg(ql_dbg_disc, vha, 0x2054, 3675 "GID_PT allocations failed, fallback on GA_NXT.\n"); 3676 } else { 3677 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 3678 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 3679 swl = NULL; 3680 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 3681 swl = NULL; 3682 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 3683 swl = NULL; 3684 } else if (ql2xiidmaenable && 3685 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { 3686 qla2x00_gpsc(vha, swl); 3687 } 3688 3689 /* If other queries succeeded probe for FC-4 type */ 3690 if (swl) 3691 qla2x00_gff_id(vha, swl); 3692 } 3693 swl_idx = 0; 3694 3695 /* Allocate temporary fcport for any new fcports discovered. */ 3696 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3697 if (new_fcport == NULL) { 3698 ql_log(ql_log_warn, vha, 0x205e, 3699 "Failed to allocate memory for fcport.\n"); 3700 return (QLA_MEMORY_ALLOC_FAILED); 3701 } 3702 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3703 /* Set start port ID scan at adapter ID. */ 3704 first_dev = 1; 3705 last_dev = 0; 3706 3707 /* Starting free loop ID. */ 3708 loop_id = ha->min_external_loopid; 3709 for (; loop_id <= ha->max_loop_id; loop_id++) { 3710 if (qla2x00_is_reserved_id(vha, loop_id)) 3711 continue; 3712 3713 if (ha->current_topology == ISP_CFG_FL && 3714 (atomic_read(&vha->loop_down_timer) || 3715 LOOP_TRANSITION(vha))) { 3716 atomic_set(&vha->loop_down_timer, 0); 3717 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3718 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3719 break; 3720 } 3721 3722 if (swl != NULL) { 3723 if (last_dev) { 3724 wrap.b24 = new_fcport->d_id.b24; 3725 } else { 3726 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 3727 memcpy(new_fcport->node_name, 3728 swl[swl_idx].node_name, WWN_SIZE); 3729 memcpy(new_fcport->port_name, 3730 swl[swl_idx].port_name, WWN_SIZE); 3731 memcpy(new_fcport->fabric_port_name, 3732 swl[swl_idx].fabric_port_name, WWN_SIZE); 3733 new_fcport->fp_speed = swl[swl_idx].fp_speed; 3734 new_fcport->fc4_type = swl[swl_idx].fc4_type; 3735 3736 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 3737 last_dev = 1; 3738 } 3739 swl_idx++; 3740 } 3741 } else { 3742 /* Send GA_NXT to the switch */ 3743 rval = qla2x00_ga_nxt(vha, new_fcport); 3744 if (rval != QLA_SUCCESS) { 3745 ql_log(ql_log_warn, vha, 0x2064, 3746 "SNS scan failed -- assuming " 3747 "zero-entry result.\n"); 3748 list_for_each_entry_safe(fcport, fcptemp, 3749 new_fcports, list) { 3750 list_del(&fcport->list); 3751 kfree(fcport); 3752 } 3753 rval = QLA_SUCCESS; 3754 break; 3755 } 3756 } 3757 3758 /* If wrap on switch device list, exit. */ 3759 if (first_dev) { 3760 wrap.b24 = new_fcport->d_id.b24; 3761 first_dev = 0; 3762 } else if (new_fcport->d_id.b24 == wrap.b24) { 3763 ql_dbg(ql_dbg_disc, vha, 0x2065, 3764 "Device wrap (%02x%02x%02x).\n", 3765 new_fcport->d_id.b.domain, 3766 new_fcport->d_id.b.area, 3767 new_fcport->d_id.b.al_pa); 3768 break; 3769 } 3770 3771 /* Bypass if same physical adapter. */ 3772 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 3773 continue; 3774 3775 /* Bypass virtual ports of the same host. */ 3776 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 3777 continue; 3778 3779 /* Bypass if same domain and area of adapter. */ 3780 if (((new_fcport->d_id.b24 & 0xffff00) == 3781 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 3782 ISP_CFG_FL) 3783 continue; 3784 3785 /* Bypass reserved domain fields. */ 3786 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 3787 continue; 3788 3789 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 3790 if (ql2xgffidenable && 3791 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 3792 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 3793 continue; 3794 3795 /* Locate matching device in database. */ 3796 found = 0; 3797 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3798 if (memcmp(new_fcport->port_name, fcport->port_name, 3799 WWN_SIZE)) 3800 continue; 3801 3802 fcport->scan_state = QLA_FCPORT_FOUND; 3803 3804 found++; 3805 3806 /* Update port state. */ 3807 memcpy(fcport->fabric_port_name, 3808 new_fcport->fabric_port_name, WWN_SIZE); 3809 fcport->fp_speed = new_fcport->fp_speed; 3810 3811 /* 3812 * If address the same and state FCS_ONLINE 3813 * (or in target mode), nothing changed. 3814 */ 3815 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 3816 (atomic_read(&fcport->state) == FCS_ONLINE || 3817 !qla_ini_mode_enabled(base_vha))) { 3818 break; 3819 } 3820 3821 /* 3822 * If device was not a fabric device before. 3823 */ 3824 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3825 fcport->d_id.b24 = new_fcport->d_id.b24; 3826 qla2x00_clear_loop_id(fcport); 3827 fcport->flags |= (FCF_FABRIC_DEVICE | 3828 FCF_LOGIN_NEEDED); 3829 break; 3830 } 3831 3832 /* 3833 * Port ID changed or device was marked to be updated; 3834 * Log it out if still logged in and mark it for 3835 * relogin later. 3836 */ 3837 if (!qla_ini_mode_enabled(base_vha)) { 3838 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 3839 "port changed FC ID, %8phC" 3840 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 3841 fcport->port_name, 3842 fcport->d_id.b.domain, 3843 fcport->d_id.b.area, 3844 fcport->d_id.b.al_pa, 3845 fcport->loop_id, 3846 new_fcport->d_id.b.domain, 3847 new_fcport->d_id.b.area, 3848 new_fcport->d_id.b.al_pa); 3849 fcport->d_id.b24 = new_fcport->d_id.b24; 3850 break; 3851 } 3852 3853 fcport->d_id.b24 = new_fcport->d_id.b24; 3854 fcport->flags |= FCF_LOGIN_NEEDED; 3855 if (fcport->loop_id != FC_NO_LOOP_ID && 3856 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3857 (fcport->flags & FCF_ASYNC_SENT) == 0 && 3858 fcport->port_type != FCT_INITIATOR && 3859 fcport->port_type != FCT_BROADCAST) { 3860 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3861 fcport->d_id.b.domain, fcport->d_id.b.area, 3862 fcport->d_id.b.al_pa); 3863 qla2x00_clear_loop_id(fcport); 3864 } 3865 3866 break; 3867 } 3868 3869 if (found) 3870 continue; 3871 /* If device was not in our fcports list, then add it. */ 3872 new_fcport->scan_state = QLA_FCPORT_FOUND; 3873 list_add_tail(&new_fcport->list, new_fcports); 3874 3875 /* Allocate a new replacement fcport. */ 3876 nxt_d_id.b24 = new_fcport->d_id.b24; 3877 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3878 if (new_fcport == NULL) { 3879 ql_log(ql_log_warn, vha, 0x2066, 3880 "Memory allocation failed for fcport.\n"); 3881 return (QLA_MEMORY_ALLOC_FAILED); 3882 } 3883 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3884 new_fcport->d_id.b24 = nxt_d_id.b24; 3885 } 3886 3887 kfree(new_fcport); 3888 3889 return (rval); 3890 } 3891 3892 /* 3893 * qla2x00_find_new_loop_id 3894 * Scan through our port list and find a new usable loop ID. 3895 * 3896 * Input: 3897 * ha: adapter state pointer. 3898 * dev: port structure pointer. 3899 * 3900 * Returns: 3901 * qla2x00 local function return status code. 3902 * 3903 * Context: 3904 * Kernel context. 3905 */ 3906 int 3907 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 3908 { 3909 int rval; 3910 struct qla_hw_data *ha = vha->hw; 3911 unsigned long flags = 0; 3912 3913 rval = QLA_SUCCESS; 3914 3915 spin_lock_irqsave(&ha->vport_slock, flags); 3916 3917 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 3918 LOOPID_MAP_SIZE); 3919 if (dev->loop_id >= LOOPID_MAP_SIZE || 3920 qla2x00_is_reserved_id(vha, dev->loop_id)) { 3921 dev->loop_id = FC_NO_LOOP_ID; 3922 rval = QLA_FUNCTION_FAILED; 3923 } else 3924 set_bit(dev->loop_id, ha->loop_id_map); 3925 3926 spin_unlock_irqrestore(&ha->vport_slock, flags); 3927 3928 if (rval == QLA_SUCCESS) 3929 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 3930 "Assigning new loopid=%x, portid=%x.\n", 3931 dev->loop_id, dev->d_id.b24); 3932 else 3933 ql_log(ql_log_warn, dev->vha, 0x2087, 3934 "No loop_id's available, portid=%x.\n", 3935 dev->d_id.b24); 3936 3937 return (rval); 3938 } 3939 3940 /* 3941 * qla2x00_fabric_dev_login 3942 * Login fabric target device and update FC port database. 3943 * 3944 * Input: 3945 * ha: adapter state pointer. 3946 * fcport: port structure list pointer. 3947 * next_loopid: contains value of a new loop ID that can be used 3948 * by the next login attempt. 3949 * 3950 * Returns: 3951 * qla2x00 local function return status code. 3952 * 3953 * Context: 3954 * Kernel context. 3955 */ 3956 static int 3957 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3958 uint16_t *next_loopid) 3959 { 3960 int rval; 3961 int retry; 3962 uint8_t opts; 3963 struct qla_hw_data *ha = vha->hw; 3964 3965 rval = QLA_SUCCESS; 3966 retry = 0; 3967 3968 if (IS_ALOGIO_CAPABLE(ha)) { 3969 if (fcport->flags & FCF_ASYNC_SENT) 3970 return rval; 3971 fcport->flags |= FCF_ASYNC_SENT; 3972 rval = qla2x00_post_async_login_work(vha, fcport, NULL); 3973 if (!rval) 3974 return rval; 3975 } 3976 3977 fcport->flags &= ~FCF_ASYNC_SENT; 3978 rval = qla2x00_fabric_login(vha, fcport, next_loopid); 3979 if (rval == QLA_SUCCESS) { 3980 /* Send an ADISC to FCP2 devices.*/ 3981 opts = 0; 3982 if (fcport->flags & FCF_FCP2_DEVICE) 3983 opts |= BIT_1; 3984 rval = qla2x00_get_port_database(vha, fcport, opts); 3985 if (rval != QLA_SUCCESS) { 3986 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3987 fcport->d_id.b.domain, fcport->d_id.b.area, 3988 fcport->d_id.b.al_pa); 3989 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3990 } else { 3991 qla2x00_update_fcport(vha, fcport); 3992 } 3993 } else { 3994 /* Retry Login. */ 3995 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3996 } 3997 3998 return (rval); 3999 } 4000 4001 /* 4002 * qla2x00_fabric_login 4003 * Issue fabric login command. 4004 * 4005 * Input: 4006 * ha = adapter block pointer. 4007 * device = pointer to FC device type structure. 4008 * 4009 * Returns: 4010 * 0 - Login successfully 4011 * 1 - Login failed 4012 * 2 - Initiator device 4013 * 3 - Fatal error 4014 */ 4015 int 4016 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 4017 uint16_t *next_loopid) 4018 { 4019 int rval; 4020 int retry; 4021 uint16_t tmp_loopid; 4022 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4023 struct qla_hw_data *ha = vha->hw; 4024 4025 retry = 0; 4026 tmp_loopid = 0; 4027 4028 for (;;) { 4029 ql_dbg(ql_dbg_disc, vha, 0x2000, 4030 "Trying Fabric Login w/loop id 0x%04x for port " 4031 "%02x%02x%02x.\n", 4032 fcport->loop_id, fcport->d_id.b.domain, 4033 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4034 4035 /* Login fcport on switch. */ 4036 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 4037 fcport->d_id.b.domain, fcport->d_id.b.area, 4038 fcport->d_id.b.al_pa, mb, BIT_0); 4039 if (rval != QLA_SUCCESS) { 4040 return rval; 4041 } 4042 if (mb[0] == MBS_PORT_ID_USED) { 4043 /* 4044 * Device has another loop ID. The firmware team 4045 * recommends the driver perform an implicit login with 4046 * the specified ID again. The ID we just used is save 4047 * here so we return with an ID that can be tried by 4048 * the next login. 4049 */ 4050 retry++; 4051 tmp_loopid = fcport->loop_id; 4052 fcport->loop_id = mb[1]; 4053 4054 ql_dbg(ql_dbg_disc, vha, 0x2001, 4055 "Fabric Login: port in use - next loop " 4056 "id=0x%04x, port id= %02x%02x%02x.\n", 4057 fcport->loop_id, fcport->d_id.b.domain, 4058 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4059 4060 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 4061 /* 4062 * Login succeeded. 4063 */ 4064 if (retry) { 4065 /* A retry occurred before. */ 4066 *next_loopid = tmp_loopid; 4067 } else { 4068 /* 4069 * No retry occurred before. Just increment the 4070 * ID value for next login. 4071 */ 4072 *next_loopid = (fcport->loop_id + 1); 4073 } 4074 4075 if (mb[1] & BIT_0) { 4076 fcport->port_type = FCT_INITIATOR; 4077 } else { 4078 fcport->port_type = FCT_TARGET; 4079 if (mb[1] & BIT_1) { 4080 fcport->flags |= FCF_FCP2_DEVICE; 4081 } 4082 } 4083 4084 if (mb[10] & BIT_0) 4085 fcport->supported_classes |= FC_COS_CLASS2; 4086 if (mb[10] & BIT_1) 4087 fcport->supported_classes |= FC_COS_CLASS3; 4088 4089 if (IS_FWI2_CAPABLE(ha)) { 4090 if (mb[10] & BIT_7) 4091 fcport->flags |= 4092 FCF_CONF_COMP_SUPPORTED; 4093 } 4094 4095 rval = QLA_SUCCESS; 4096 break; 4097 } else if (mb[0] == MBS_LOOP_ID_USED) { 4098 /* 4099 * Loop ID already used, try next loop ID. 4100 */ 4101 fcport->loop_id++; 4102 rval = qla2x00_find_new_loop_id(vha, fcport); 4103 if (rval != QLA_SUCCESS) { 4104 /* Ran out of loop IDs to use */ 4105 break; 4106 } 4107 } else if (mb[0] == MBS_COMMAND_ERROR) { 4108 /* 4109 * Firmware possibly timed out during login. If NO 4110 * retries are left to do then the device is declared 4111 * dead. 4112 */ 4113 *next_loopid = fcport->loop_id; 4114 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 4115 fcport->d_id.b.domain, fcport->d_id.b.area, 4116 fcport->d_id.b.al_pa); 4117 qla2x00_mark_device_lost(vha, fcport, 1, 0); 4118 4119 rval = 1; 4120 break; 4121 } else { 4122 /* 4123 * unrecoverable / not handled error 4124 */ 4125 ql_dbg(ql_dbg_disc, vha, 0x2002, 4126 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 4127 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 4128 fcport->d_id.b.area, fcport->d_id.b.al_pa, 4129 fcport->loop_id, jiffies); 4130 4131 *next_loopid = fcport->loop_id; 4132 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 4133 fcport->d_id.b.domain, fcport->d_id.b.area, 4134 fcport->d_id.b.al_pa); 4135 qla2x00_clear_loop_id(fcport); 4136 fcport->login_retry = 0; 4137 4138 rval = 3; 4139 break; 4140 } 4141 } 4142 4143 return (rval); 4144 } 4145 4146 /* 4147 * qla2x00_local_device_login 4148 * Issue local device login command. 4149 * 4150 * Input: 4151 * ha = adapter block pointer. 4152 * loop_id = loop id of device to login to. 4153 * 4154 * Returns (Where's the #define!!!!): 4155 * 0 - Login successfully 4156 * 1 - Login failed 4157 * 3 - Fatal error 4158 */ 4159 int 4160 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 4161 { 4162 int rval; 4163 uint16_t mb[MAILBOX_REGISTER_COUNT]; 4164 4165 memset(mb, 0, sizeof(mb)); 4166 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 4167 if (rval == QLA_SUCCESS) { 4168 /* Interrogate mailbox registers for any errors */ 4169 if (mb[0] == MBS_COMMAND_ERROR) 4170 rval = 1; 4171 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 4172 /* device not in PCB table */ 4173 rval = 3; 4174 } 4175 4176 return (rval); 4177 } 4178 4179 /* 4180 * qla2x00_loop_resync 4181 * Resync with fibre channel devices. 4182 * 4183 * Input: 4184 * ha = adapter block pointer. 4185 * 4186 * Returns: 4187 * 0 = success 4188 */ 4189 int 4190 qla2x00_loop_resync(scsi_qla_host_t *vha) 4191 { 4192 int rval = QLA_SUCCESS; 4193 uint32_t wait_time; 4194 struct req_que *req; 4195 struct rsp_que *rsp; 4196 4197 if (vha->hw->flags.cpu_affinity_enabled) 4198 req = vha->hw->req_q_map[0]; 4199 else 4200 req = vha->req; 4201 rsp = req->rsp; 4202 4203 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4204 if (vha->flags.online) { 4205 if (!(rval = qla2x00_fw_ready(vha))) { 4206 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 4207 wait_time = 256; 4208 do { 4209 if (!IS_QLAFX00(vha->hw)) { 4210 /* 4211 * Issue a marker after FW becomes 4212 * ready. 4213 */ 4214 qla2x00_marker(vha, req, rsp, 0, 0, 4215 MK_SYNC_ALL); 4216 vha->marker_needed = 0; 4217 } 4218 4219 /* Remap devices on Loop. */ 4220 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4221 4222 if (IS_QLAFX00(vha->hw)) 4223 qlafx00_configure_devices(vha); 4224 else 4225 qla2x00_configure_loop(vha); 4226 4227 wait_time--; 4228 } while (!atomic_read(&vha->loop_down_timer) && 4229 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4230 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 4231 &vha->dpc_flags))); 4232 } 4233 } 4234 4235 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4236 return (QLA_FUNCTION_FAILED); 4237 4238 if (rval) 4239 ql_dbg(ql_dbg_disc, vha, 0x206c, 4240 "%s *** FAILED ***.\n", __func__); 4241 4242 return (rval); 4243 } 4244 4245 /* 4246 * qla2x00_perform_loop_resync 4247 * Description: This function will set the appropriate flags and call 4248 * qla2x00_loop_resync. If successful loop will be resynced 4249 * Arguments : scsi_qla_host_t pointer 4250 * returm : Success or Failure 4251 */ 4252 4253 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 4254 { 4255 int32_t rval = 0; 4256 4257 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 4258 /*Configure the flags so that resync happens properly*/ 4259 atomic_set(&ha->loop_down_timer, 0); 4260 if (!(ha->device_flags & DFLG_NO_CABLE)) { 4261 atomic_set(&ha->loop_state, LOOP_UP); 4262 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 4263 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 4264 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 4265 4266 rval = qla2x00_loop_resync(ha); 4267 } else 4268 atomic_set(&ha->loop_state, LOOP_DEAD); 4269 4270 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 4271 } 4272 4273 return rval; 4274 } 4275 4276 void 4277 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 4278 { 4279 fc_port_t *fcport; 4280 struct scsi_qla_host *vha; 4281 struct qla_hw_data *ha = base_vha->hw; 4282 unsigned long flags; 4283 4284 spin_lock_irqsave(&ha->vport_slock, flags); 4285 /* Go with deferred removal of rport references. */ 4286 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 4287 atomic_inc(&vha->vref_count); 4288 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4289 if (fcport->drport && 4290 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 4291 spin_unlock_irqrestore(&ha->vport_slock, flags); 4292 qla2x00_rport_del(fcport); 4293 4294 /* 4295 * Release the target mode FC NEXUS in 4296 * qla_target.c, if target mod is enabled. 4297 */ 4298 qlt_fc_port_deleted(vha, fcport, 4299 base_vha->total_fcport_update_gen); 4300 4301 spin_lock_irqsave(&ha->vport_slock, flags); 4302 } 4303 } 4304 atomic_dec(&vha->vref_count); 4305 } 4306 spin_unlock_irqrestore(&ha->vport_slock, flags); 4307 } 4308 4309 /* Assumes idc_lock always held on entry */ 4310 void 4311 qla83xx_reset_ownership(scsi_qla_host_t *vha) 4312 { 4313 struct qla_hw_data *ha = vha->hw; 4314 uint32_t drv_presence, drv_presence_mask; 4315 uint32_t dev_part_info1, dev_part_info2, class_type; 4316 uint32_t class_type_mask = 0x3; 4317 uint16_t fcoe_other_function = 0xffff, i; 4318 4319 if (IS_QLA8044(ha)) { 4320 drv_presence = qla8044_rd_direct(vha, 4321 QLA8044_CRB_DRV_ACTIVE_INDEX); 4322 dev_part_info1 = qla8044_rd_direct(vha, 4323 QLA8044_CRB_DEV_PART_INFO_INDEX); 4324 dev_part_info2 = qla8044_rd_direct(vha, 4325 QLA8044_CRB_DEV_PART_INFO2); 4326 } else { 4327 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 4328 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 4329 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 4330 } 4331 for (i = 0; i < 8; i++) { 4332 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 4333 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 4334 (i != ha->portnum)) { 4335 fcoe_other_function = i; 4336 break; 4337 } 4338 } 4339 if (fcoe_other_function == 0xffff) { 4340 for (i = 0; i < 8; i++) { 4341 class_type = ((dev_part_info2 >> (i * 4)) & 4342 class_type_mask); 4343 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 4344 ((i + 8) != ha->portnum)) { 4345 fcoe_other_function = i + 8; 4346 break; 4347 } 4348 } 4349 } 4350 /* 4351 * Prepare drv-presence mask based on fcoe functions present. 4352 * However consider only valid physical fcoe function numbers (0-15). 4353 */ 4354 drv_presence_mask = ~((1 << (ha->portnum)) | 4355 ((fcoe_other_function == 0xffff) ? 4356 0 : (1 << (fcoe_other_function)))); 4357 4358 /* We are the reset owner iff: 4359 * - No other protocol drivers present. 4360 * - This is the lowest among fcoe functions. */ 4361 if (!(drv_presence & drv_presence_mask) && 4362 (ha->portnum < fcoe_other_function)) { 4363 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 4364 "This host is Reset owner.\n"); 4365 ha->flags.nic_core_reset_owner = 1; 4366 } 4367 } 4368 4369 static int 4370 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 4371 { 4372 int rval = QLA_SUCCESS; 4373 struct qla_hw_data *ha = vha->hw; 4374 uint32_t drv_ack; 4375 4376 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 4377 if (rval == QLA_SUCCESS) { 4378 drv_ack |= (1 << ha->portnum); 4379 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 4380 } 4381 4382 return rval; 4383 } 4384 4385 static int 4386 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 4387 { 4388 int rval = QLA_SUCCESS; 4389 struct qla_hw_data *ha = vha->hw; 4390 uint32_t drv_ack; 4391 4392 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 4393 if (rval == QLA_SUCCESS) { 4394 drv_ack &= ~(1 << ha->portnum); 4395 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 4396 } 4397 4398 return rval; 4399 } 4400 4401 static const char * 4402 qla83xx_dev_state_to_string(uint32_t dev_state) 4403 { 4404 switch (dev_state) { 4405 case QLA8XXX_DEV_COLD: 4406 return "COLD/RE-INIT"; 4407 case QLA8XXX_DEV_INITIALIZING: 4408 return "INITIALIZING"; 4409 case QLA8XXX_DEV_READY: 4410 return "READY"; 4411 case QLA8XXX_DEV_NEED_RESET: 4412 return "NEED RESET"; 4413 case QLA8XXX_DEV_NEED_QUIESCENT: 4414 return "NEED QUIESCENT"; 4415 case QLA8XXX_DEV_FAILED: 4416 return "FAILED"; 4417 case QLA8XXX_DEV_QUIESCENT: 4418 return "QUIESCENT"; 4419 default: 4420 return "Unknown"; 4421 } 4422 } 4423 4424 /* Assumes idc-lock always held on entry */ 4425 void 4426 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 4427 { 4428 struct qla_hw_data *ha = vha->hw; 4429 uint32_t idc_audit_reg = 0, duration_secs = 0; 4430 4431 switch (audit_type) { 4432 case IDC_AUDIT_TIMESTAMP: 4433 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 4434 idc_audit_reg = (ha->portnum) | 4435 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 4436 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 4437 break; 4438 4439 case IDC_AUDIT_COMPLETION: 4440 duration_secs = ((jiffies_to_msecs(jiffies) - 4441 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 4442 idc_audit_reg = (ha->portnum) | 4443 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 4444 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 4445 break; 4446 4447 default: 4448 ql_log(ql_log_warn, vha, 0xb078, 4449 "Invalid audit type specified.\n"); 4450 break; 4451 } 4452 } 4453 4454 /* Assumes idc_lock always held on entry */ 4455 static int 4456 qla83xx_initiating_reset(scsi_qla_host_t *vha) 4457 { 4458 struct qla_hw_data *ha = vha->hw; 4459 uint32_t idc_control, dev_state; 4460 4461 __qla83xx_get_idc_control(vha, &idc_control); 4462 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 4463 ql_log(ql_log_info, vha, 0xb080, 4464 "NIC Core reset has been disabled. idc-control=0x%x\n", 4465 idc_control); 4466 return QLA_FUNCTION_FAILED; 4467 } 4468 4469 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 4470 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 4471 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 4472 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 4473 QLA8XXX_DEV_NEED_RESET); 4474 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 4475 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 4476 } else { 4477 const char *state = qla83xx_dev_state_to_string(dev_state); 4478 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 4479 4480 /* SV: XXX: Is timeout required here? */ 4481 /* Wait for IDC state change READY -> NEED_RESET */ 4482 while (dev_state == QLA8XXX_DEV_READY) { 4483 qla83xx_idc_unlock(vha, 0); 4484 msleep(200); 4485 qla83xx_idc_lock(vha, 0); 4486 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 4487 } 4488 } 4489 4490 /* Send IDC ack by writing to drv-ack register */ 4491 __qla83xx_set_drv_ack(vha); 4492 4493 return QLA_SUCCESS; 4494 } 4495 4496 int 4497 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 4498 { 4499 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 4500 } 4501 4502 int 4503 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 4504 { 4505 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 4506 } 4507 4508 static int 4509 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 4510 { 4511 uint32_t drv_presence = 0; 4512 struct qla_hw_data *ha = vha->hw; 4513 4514 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 4515 if (drv_presence & (1 << ha->portnum)) 4516 return QLA_SUCCESS; 4517 else 4518 return QLA_TEST_FAILED; 4519 } 4520 4521 int 4522 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 4523 { 4524 int rval = QLA_SUCCESS; 4525 struct qla_hw_data *ha = vha->hw; 4526 4527 ql_dbg(ql_dbg_p3p, vha, 0xb058, 4528 "Entered %s().\n", __func__); 4529 4530 if (vha->device_flags & DFLG_DEV_FAILED) { 4531 ql_log(ql_log_warn, vha, 0xb059, 4532 "Device in unrecoverable FAILED state.\n"); 4533 return QLA_FUNCTION_FAILED; 4534 } 4535 4536 qla83xx_idc_lock(vha, 0); 4537 4538 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 4539 ql_log(ql_log_warn, vha, 0xb05a, 4540 "Function=0x%x has been removed from IDC participation.\n", 4541 ha->portnum); 4542 rval = QLA_FUNCTION_FAILED; 4543 goto exit; 4544 } 4545 4546 qla83xx_reset_ownership(vha); 4547 4548 rval = qla83xx_initiating_reset(vha); 4549 4550 /* 4551 * Perform reset if we are the reset-owner, 4552 * else wait till IDC state changes to READY/FAILED. 4553 */ 4554 if (rval == QLA_SUCCESS) { 4555 rval = qla83xx_idc_state_handler(vha); 4556 4557 if (rval == QLA_SUCCESS) 4558 ha->flags.nic_core_hung = 0; 4559 __qla83xx_clear_drv_ack(vha); 4560 } 4561 4562 exit: 4563 qla83xx_idc_unlock(vha, 0); 4564 4565 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 4566 4567 return rval; 4568 } 4569 4570 int 4571 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 4572 { 4573 struct qla_hw_data *ha = vha->hw; 4574 int rval = QLA_FUNCTION_FAILED; 4575 4576 if (!IS_MCTP_CAPABLE(ha)) { 4577 /* This message can be removed from the final version */ 4578 ql_log(ql_log_info, vha, 0x506d, 4579 "This board is not MCTP capable\n"); 4580 return rval; 4581 } 4582 4583 if (!ha->mctp_dump) { 4584 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 4585 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 4586 4587 if (!ha->mctp_dump) { 4588 ql_log(ql_log_warn, vha, 0x506e, 4589 "Failed to allocate memory for mctp dump\n"); 4590 return rval; 4591 } 4592 } 4593 4594 #define MCTP_DUMP_STR_ADDR 0x00000000 4595 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 4596 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 4597 if (rval != QLA_SUCCESS) { 4598 ql_log(ql_log_warn, vha, 0x506f, 4599 "Failed to capture mctp dump\n"); 4600 } else { 4601 ql_log(ql_log_info, vha, 0x5070, 4602 "Mctp dump capture for host (%ld/%p).\n", 4603 vha->host_no, ha->mctp_dump); 4604 ha->mctp_dumped = 1; 4605 } 4606 4607 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 4608 ha->flags.nic_core_reset_hdlr_active = 1; 4609 rval = qla83xx_restart_nic_firmware(vha); 4610 if (rval) 4611 /* NIC Core reset failed. */ 4612 ql_log(ql_log_warn, vha, 0x5071, 4613 "Failed to restart nic firmware\n"); 4614 else 4615 ql_dbg(ql_dbg_p3p, vha, 0xb084, 4616 "Restarted NIC firmware successfully.\n"); 4617 ha->flags.nic_core_reset_hdlr_active = 0; 4618 } 4619 4620 return rval; 4621 4622 } 4623 4624 /* 4625 * qla2x00_quiesce_io 4626 * Description: This function will block the new I/Os 4627 * Its not aborting any I/Os as context 4628 * is not destroyed during quiescence 4629 * Arguments: scsi_qla_host_t 4630 * return : void 4631 */ 4632 void 4633 qla2x00_quiesce_io(scsi_qla_host_t *vha) 4634 { 4635 struct qla_hw_data *ha = vha->hw; 4636 struct scsi_qla_host *vp; 4637 4638 ql_dbg(ql_dbg_dpc, vha, 0x401d, 4639 "Quiescing I/O - ha=%p.\n", ha); 4640 4641 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 4642 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 4643 atomic_set(&vha->loop_state, LOOP_DOWN); 4644 qla2x00_mark_all_devices_lost(vha, 0); 4645 list_for_each_entry(vp, &ha->vp_list, list) 4646 qla2x00_mark_all_devices_lost(vp, 0); 4647 } else { 4648 if (!atomic_read(&vha->loop_down_timer)) 4649 atomic_set(&vha->loop_down_timer, 4650 LOOP_DOWN_TIME); 4651 } 4652 /* Wait for pending cmds to complete */ 4653 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 4654 } 4655 4656 void 4657 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 4658 { 4659 struct qla_hw_data *ha = vha->hw; 4660 struct scsi_qla_host *vp; 4661 unsigned long flags; 4662 fc_port_t *fcport; 4663 4664 /* For ISP82XX, driver waits for completion of the commands. 4665 * online flag should be set. 4666 */ 4667 if (!(IS_P3P_TYPE(ha))) 4668 vha->flags.online = 0; 4669 ha->flags.chip_reset_done = 0; 4670 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4671 vha->qla_stats.total_isp_aborts++; 4672 4673 ql_log(ql_log_info, vha, 0x00af, 4674 "Performing ISP error recovery - ha=%p.\n", ha); 4675 4676 /* For ISP82XX, reset_chip is just disabling interrupts. 4677 * Driver waits for the completion of the commands. 4678 * the interrupts need to be enabled. 4679 */ 4680 if (!(IS_P3P_TYPE(ha))) 4681 ha->isp_ops->reset_chip(vha); 4682 4683 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 4684 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 4685 atomic_set(&vha->loop_state, LOOP_DOWN); 4686 qla2x00_mark_all_devices_lost(vha, 0); 4687 4688 spin_lock_irqsave(&ha->vport_slock, flags); 4689 list_for_each_entry(vp, &ha->vp_list, list) { 4690 atomic_inc(&vp->vref_count); 4691 spin_unlock_irqrestore(&ha->vport_slock, flags); 4692 4693 qla2x00_mark_all_devices_lost(vp, 0); 4694 4695 spin_lock_irqsave(&ha->vport_slock, flags); 4696 atomic_dec(&vp->vref_count); 4697 } 4698 spin_unlock_irqrestore(&ha->vport_slock, flags); 4699 } else { 4700 if (!atomic_read(&vha->loop_down_timer)) 4701 atomic_set(&vha->loop_down_timer, 4702 LOOP_DOWN_TIME); 4703 } 4704 4705 /* Clear all async request states across all VPs. */ 4706 list_for_each_entry(fcport, &vha->vp_fcports, list) 4707 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4708 spin_lock_irqsave(&ha->vport_slock, flags); 4709 list_for_each_entry(vp, &ha->vp_list, list) { 4710 atomic_inc(&vp->vref_count); 4711 spin_unlock_irqrestore(&ha->vport_slock, flags); 4712 4713 list_for_each_entry(fcport, &vp->vp_fcports, list) 4714 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4715 4716 spin_lock_irqsave(&ha->vport_slock, flags); 4717 atomic_dec(&vp->vref_count); 4718 } 4719 spin_unlock_irqrestore(&ha->vport_slock, flags); 4720 4721 if (!ha->flags.eeh_busy) { 4722 /* Make sure for ISP 82XX IO DMA is complete */ 4723 if (IS_P3P_TYPE(ha)) { 4724 qla82xx_chip_reset_cleanup(vha); 4725 ql_log(ql_log_info, vha, 0x00b4, 4726 "Done chip reset cleanup.\n"); 4727 4728 /* Done waiting for pending commands. 4729 * Reset the online flag. 4730 */ 4731 vha->flags.online = 0; 4732 } 4733 4734 /* Requeue all commands in outstanding command list. */ 4735 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 4736 } 4737 4738 ha->chip_reset++; 4739 /* memory barrier */ 4740 wmb(); 4741 } 4742 4743 /* 4744 * qla2x00_abort_isp 4745 * Resets ISP and aborts all outstanding commands. 4746 * 4747 * Input: 4748 * ha = adapter block pointer. 4749 * 4750 * Returns: 4751 * 0 = success 4752 */ 4753 int 4754 qla2x00_abort_isp(scsi_qla_host_t *vha) 4755 { 4756 int rval; 4757 uint8_t status = 0; 4758 struct qla_hw_data *ha = vha->hw; 4759 struct scsi_qla_host *vp; 4760 struct req_que *req = ha->req_q_map[0]; 4761 unsigned long flags; 4762 4763 if (vha->flags.online) { 4764 qla2x00_abort_isp_cleanup(vha); 4765 4766 if (IS_QLA8031(ha)) { 4767 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 4768 "Clearing fcoe driver presence.\n"); 4769 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 4770 ql_dbg(ql_dbg_p3p, vha, 0xb073, 4771 "Error while clearing DRV-Presence.\n"); 4772 } 4773 4774 if (unlikely(pci_channel_offline(ha->pdev) && 4775 ha->flags.pci_channel_io_perm_failure)) { 4776 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4777 status = 0; 4778 return status; 4779 } 4780 4781 ha->isp_ops->get_flash_version(vha, req->ring); 4782 4783 ha->isp_ops->nvram_config(vha); 4784 4785 if (!qla2x00_restart_isp(vha)) { 4786 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4787 4788 if (!atomic_read(&vha->loop_down_timer)) { 4789 /* 4790 * Issue marker command only when we are going 4791 * to start the I/O . 4792 */ 4793 vha->marker_needed = 1; 4794 } 4795 4796 vha->flags.online = 1; 4797 4798 ha->isp_ops->enable_intrs(ha); 4799 4800 ha->isp_abort_cnt = 0; 4801 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4802 4803 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 4804 qla2x00_get_fw_version(vha); 4805 if (ha->fce) { 4806 ha->flags.fce_enabled = 1; 4807 memset(ha->fce, 0, 4808 fce_calc_size(ha->fce_bufs)); 4809 rval = qla2x00_enable_fce_trace(vha, 4810 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 4811 &ha->fce_bufs); 4812 if (rval) { 4813 ql_log(ql_log_warn, vha, 0x8033, 4814 "Unable to reinitialize FCE " 4815 "(%d).\n", rval); 4816 ha->flags.fce_enabled = 0; 4817 } 4818 } 4819 4820 if (ha->eft) { 4821 memset(ha->eft, 0, EFT_SIZE); 4822 rval = qla2x00_enable_eft_trace(vha, 4823 ha->eft_dma, EFT_NUM_BUFFERS); 4824 if (rval) { 4825 ql_log(ql_log_warn, vha, 0x8034, 4826 "Unable to reinitialize EFT " 4827 "(%d).\n", rval); 4828 } 4829 } 4830 } else { /* failed the ISP abort */ 4831 vha->flags.online = 1; 4832 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 4833 if (ha->isp_abort_cnt == 0) { 4834 ql_log(ql_log_fatal, vha, 0x8035, 4835 "ISP error recover failed - " 4836 "board disabled.\n"); 4837 /* 4838 * The next call disables the board 4839 * completely. 4840 */ 4841 ha->isp_ops->reset_adapter(vha); 4842 vha->flags.online = 0; 4843 clear_bit(ISP_ABORT_RETRY, 4844 &vha->dpc_flags); 4845 status = 0; 4846 } else { /* schedule another ISP abort */ 4847 ha->isp_abort_cnt--; 4848 ql_dbg(ql_dbg_taskm, vha, 0x8020, 4849 "ISP abort - retry remaining %d.\n", 4850 ha->isp_abort_cnt); 4851 status = 1; 4852 } 4853 } else { 4854 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 4855 ql_dbg(ql_dbg_taskm, vha, 0x8021, 4856 "ISP error recovery - retrying (%d) " 4857 "more times.\n", ha->isp_abort_cnt); 4858 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4859 status = 1; 4860 } 4861 } 4862 4863 } 4864 4865 if (!status) { 4866 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 4867 4868 spin_lock_irqsave(&ha->vport_slock, flags); 4869 list_for_each_entry(vp, &ha->vp_list, list) { 4870 if (vp->vp_idx) { 4871 atomic_inc(&vp->vref_count); 4872 spin_unlock_irqrestore(&ha->vport_slock, flags); 4873 4874 qla2x00_vp_abort_isp(vp); 4875 4876 spin_lock_irqsave(&ha->vport_slock, flags); 4877 atomic_dec(&vp->vref_count); 4878 } 4879 } 4880 spin_unlock_irqrestore(&ha->vport_slock, flags); 4881 4882 if (IS_QLA8031(ha)) { 4883 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 4884 "Setting back fcoe driver presence.\n"); 4885 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 4886 ql_dbg(ql_dbg_p3p, vha, 0xb074, 4887 "Error while setting DRV-Presence.\n"); 4888 } 4889 } else { 4890 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 4891 __func__); 4892 } 4893 4894 return(status); 4895 } 4896 4897 /* 4898 * qla2x00_restart_isp 4899 * restarts the ISP after a reset 4900 * 4901 * Input: 4902 * ha = adapter block pointer. 4903 * 4904 * Returns: 4905 * 0 = success 4906 */ 4907 static int 4908 qla2x00_restart_isp(scsi_qla_host_t *vha) 4909 { 4910 int status = 0; 4911 struct qla_hw_data *ha = vha->hw; 4912 struct req_que *req = ha->req_q_map[0]; 4913 struct rsp_que *rsp = ha->rsp_q_map[0]; 4914 unsigned long flags; 4915 4916 /* If firmware needs to be loaded */ 4917 if (qla2x00_isp_firmware(vha)) { 4918 vha->flags.online = 0; 4919 status = ha->isp_ops->chip_diag(vha); 4920 if (!status) 4921 status = qla2x00_setup_chip(vha); 4922 } 4923 4924 if (!status && !(status = qla2x00_init_rings(vha))) { 4925 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4926 ha->flags.chip_reset_done = 1; 4927 4928 /* Initialize the queues in use */ 4929 qla25xx_init_queues(ha); 4930 4931 status = qla2x00_fw_ready(vha); 4932 if (!status) { 4933 /* Issue a marker after FW becomes ready. */ 4934 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 4935 4936 vha->flags.online = 1; 4937 4938 /* 4939 * Process any ATIO queue entries that came in 4940 * while we weren't online. 4941 */ 4942 spin_lock_irqsave(&ha->hardware_lock, flags); 4943 if (qla_tgt_mode_enabled(vha)) 4944 qlt_24xx_process_atio_queue(vha); 4945 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4946 4947 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4948 } 4949 4950 /* if no cable then assume it's good */ 4951 if ((vha->device_flags & DFLG_NO_CABLE)) 4952 status = 0; 4953 } 4954 return (status); 4955 } 4956 4957 static int 4958 qla25xx_init_queues(struct qla_hw_data *ha) 4959 { 4960 struct rsp_que *rsp = NULL; 4961 struct req_que *req = NULL; 4962 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 4963 int ret = -1; 4964 int i; 4965 4966 for (i = 1; i < ha->max_rsp_queues; i++) { 4967 rsp = ha->rsp_q_map[i]; 4968 if (rsp) { 4969 rsp->options &= ~BIT_0; 4970 ret = qla25xx_init_rsp_que(base_vha, rsp); 4971 if (ret != QLA_SUCCESS) 4972 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 4973 "%s Rsp que: %d init failed.\n", 4974 __func__, rsp->id); 4975 else 4976 ql_dbg(ql_dbg_init, base_vha, 0x0100, 4977 "%s Rsp que: %d inited.\n", 4978 __func__, rsp->id); 4979 } 4980 } 4981 for (i = 1; i < ha->max_req_queues; i++) { 4982 req = ha->req_q_map[i]; 4983 if (req) { 4984 /* Clear outstanding commands array. */ 4985 req->options &= ~BIT_0; 4986 ret = qla25xx_init_req_que(base_vha, req); 4987 if (ret != QLA_SUCCESS) 4988 ql_dbg(ql_dbg_init, base_vha, 0x0101, 4989 "%s Req que: %d init failed.\n", 4990 __func__, req->id); 4991 else 4992 ql_dbg(ql_dbg_init, base_vha, 0x0102, 4993 "%s Req que: %d inited.\n", 4994 __func__, req->id); 4995 } 4996 } 4997 return ret; 4998 } 4999 5000 /* 5001 * qla2x00_reset_adapter 5002 * Reset adapter. 5003 * 5004 * Input: 5005 * ha = adapter block pointer. 5006 */ 5007 void 5008 qla2x00_reset_adapter(scsi_qla_host_t *vha) 5009 { 5010 unsigned long flags = 0; 5011 struct qla_hw_data *ha = vha->hw; 5012 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 5013 5014 vha->flags.online = 0; 5015 ha->isp_ops->disable_intrs(ha); 5016 5017 spin_lock_irqsave(&ha->hardware_lock, flags); 5018 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 5019 RD_REG_WORD(®->hccr); /* PCI Posting. */ 5020 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 5021 RD_REG_WORD(®->hccr); /* PCI Posting. */ 5022 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5023 } 5024 5025 void 5026 qla24xx_reset_adapter(scsi_qla_host_t *vha) 5027 { 5028 unsigned long flags = 0; 5029 struct qla_hw_data *ha = vha->hw; 5030 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 5031 5032 if (IS_P3P_TYPE(ha)) 5033 return; 5034 5035 vha->flags.online = 0; 5036 ha->isp_ops->disable_intrs(ha); 5037 5038 spin_lock_irqsave(&ha->hardware_lock, flags); 5039 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 5040 RD_REG_DWORD(®->hccr); 5041 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 5042 RD_REG_DWORD(®->hccr); 5043 spin_unlock_irqrestore(&ha->hardware_lock, flags); 5044 5045 if (IS_NOPOLLING_TYPE(ha)) 5046 ha->isp_ops->enable_intrs(ha); 5047 } 5048 5049 /* On sparc systems, obtain port and node WWN from firmware 5050 * properties. 5051 */ 5052 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 5053 struct nvram_24xx *nv) 5054 { 5055 #ifdef CONFIG_SPARC 5056 struct qla_hw_data *ha = vha->hw; 5057 struct pci_dev *pdev = ha->pdev; 5058 struct device_node *dp = pci_device_to_OF_node(pdev); 5059 const u8 *val; 5060 int len; 5061 5062 val = of_get_property(dp, "port-wwn", &len); 5063 if (val && len >= WWN_SIZE) 5064 memcpy(nv->port_name, val, WWN_SIZE); 5065 5066 val = of_get_property(dp, "node-wwn", &len); 5067 if (val && len >= WWN_SIZE) 5068 memcpy(nv->node_name, val, WWN_SIZE); 5069 #endif 5070 } 5071 5072 int 5073 qla24xx_nvram_config(scsi_qla_host_t *vha) 5074 { 5075 int rval; 5076 struct init_cb_24xx *icb; 5077 struct nvram_24xx *nv; 5078 uint32_t *dptr; 5079 uint8_t *dptr1, *dptr2; 5080 uint32_t chksum; 5081 uint16_t cnt; 5082 struct qla_hw_data *ha = vha->hw; 5083 5084 rval = QLA_SUCCESS; 5085 icb = (struct init_cb_24xx *)ha->init_cb; 5086 nv = ha->nvram; 5087 5088 /* Determine NVRAM starting address. */ 5089 if (ha->port_no == 0) { 5090 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 5091 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 5092 } else { 5093 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 5094 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 5095 } 5096 5097 ha->nvram_size = sizeof(struct nvram_24xx); 5098 ha->vpd_size = FA_NVRAM_VPD_SIZE; 5099 5100 /* Get VPD data into cache */ 5101 ha->vpd = ha->nvram + VPD_OFFSET; 5102 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 5103 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 5104 5105 /* Get NVRAM data into cache and calculate checksum. */ 5106 dptr = (uint32_t *)nv; 5107 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 5108 ha->nvram_size); 5109 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 5110 chksum += le32_to_cpu(*dptr++); 5111 5112 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 5113 "Contents of NVRAM\n"); 5114 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 5115 (uint8_t *)nv, ha->nvram_size); 5116 5117 /* Bad NVRAM data, set defaults parameters. */ 5118 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 5119 || nv->id[3] != ' ' || 5120 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 5121 /* Reset NVRAM data. */ 5122 ql_log(ql_log_warn, vha, 0x006b, 5123 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 5124 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 5125 ql_log(ql_log_warn, vha, 0x006c, 5126 "Falling back to functioning (yet invalid -- WWPN) " 5127 "defaults.\n"); 5128 5129 /* 5130 * Set default initialization control block. 5131 */ 5132 memset(nv, 0, ha->nvram_size); 5133 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 5134 nv->version = __constant_cpu_to_le16(ICB_VERSION); 5135 nv->frame_payload_size = 2048; 5136 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5137 nv->exchange_count = __constant_cpu_to_le16(0); 5138 nv->hard_address = __constant_cpu_to_le16(124); 5139 nv->port_name[0] = 0x21; 5140 nv->port_name[1] = 0x00 + ha->port_no + 1; 5141 nv->port_name[2] = 0x00; 5142 nv->port_name[3] = 0xe0; 5143 nv->port_name[4] = 0x8b; 5144 nv->port_name[5] = 0x1c; 5145 nv->port_name[6] = 0x55; 5146 nv->port_name[7] = 0x86; 5147 nv->node_name[0] = 0x20; 5148 nv->node_name[1] = 0x00; 5149 nv->node_name[2] = 0x00; 5150 nv->node_name[3] = 0xe0; 5151 nv->node_name[4] = 0x8b; 5152 nv->node_name[5] = 0x1c; 5153 nv->node_name[6] = 0x55; 5154 nv->node_name[7] = 0x86; 5155 qla24xx_nvram_wwn_from_ofw(vha, nv); 5156 nv->login_retry_count = __constant_cpu_to_le16(8); 5157 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 5158 nv->login_timeout = __constant_cpu_to_le16(0); 5159 nv->firmware_options_1 = 5160 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 5161 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 5162 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 5163 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 5164 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 5165 nv->efi_parameters = __constant_cpu_to_le32(0); 5166 nv->reset_delay = 5; 5167 nv->max_luns_per_target = __constant_cpu_to_le16(128); 5168 nv->port_down_retry_count = __constant_cpu_to_le16(30); 5169 nv->link_down_timeout = __constant_cpu_to_le16(30); 5170 5171 rval = 1; 5172 } 5173 5174 if (!qla_ini_mode_enabled(vha)) { 5175 /* Don't enable full login after initial LIP */ 5176 nv->firmware_options_1 &= __constant_cpu_to_le32(~BIT_13); 5177 /* Don't enable LIP full login for initiator */ 5178 nv->host_p &= __constant_cpu_to_le32(~BIT_10); 5179 } 5180 5181 qlt_24xx_config_nvram_stage1(vha, nv); 5182 5183 /* Reset Initialization control block */ 5184 memset(icb, 0, ha->init_cb_size); 5185 5186 /* Copy 1st segment. */ 5187 dptr1 = (uint8_t *)icb; 5188 dptr2 = (uint8_t *)&nv->version; 5189 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 5190 while (cnt--) 5191 *dptr1++ = *dptr2++; 5192 5193 icb->login_retry_count = nv->login_retry_count; 5194 icb->link_down_on_nos = nv->link_down_on_nos; 5195 5196 /* Copy 2nd segment. */ 5197 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 5198 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 5199 cnt = (uint8_t *)&icb->reserved_3 - 5200 (uint8_t *)&icb->interrupt_delay_timer; 5201 while (cnt--) 5202 *dptr1++ = *dptr2++; 5203 5204 /* 5205 * Setup driver NVRAM options. 5206 */ 5207 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 5208 "QLA2462"); 5209 5210 qlt_24xx_config_nvram_stage2(vha, icb); 5211 5212 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 5213 /* Use alternate WWN? */ 5214 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5215 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5216 } 5217 5218 /* Prepare nodename */ 5219 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 5220 /* 5221 * Firmware will apply the following mask if the nodename was 5222 * not provided. 5223 */ 5224 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5225 icb->node_name[0] &= 0xF0; 5226 } 5227 5228 /* Set host adapter parameters. */ 5229 ha->flags.disable_risc_code_load = 0; 5230 ha->flags.enable_lip_reset = 0; 5231 ha->flags.enable_lip_full_login = 5232 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 5233 ha->flags.enable_target_reset = 5234 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 5235 ha->flags.enable_led_scheme = 0; 5236 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 5237 5238 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 5239 (BIT_6 | BIT_5 | BIT_4)) >> 4; 5240 5241 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 5242 sizeof(ha->fw_seriallink_options24)); 5243 5244 /* save HBA serial number */ 5245 ha->serial0 = icb->port_name[5]; 5246 ha->serial1 = icb->port_name[6]; 5247 ha->serial2 = icb->port_name[7]; 5248 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5249 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5250 5251 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5252 5253 ha->retry_count = le16_to_cpu(nv->login_retry_count); 5254 5255 /* Set minimum login_timeout to 4 seconds. */ 5256 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 5257 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 5258 if (le16_to_cpu(nv->login_timeout) < 4) 5259 nv->login_timeout = __constant_cpu_to_le16(4); 5260 ha->login_timeout = le16_to_cpu(nv->login_timeout); 5261 icb->login_timeout = nv->login_timeout; 5262 5263 /* Set minimum RATOV to 100 tenths of a second. */ 5264 ha->r_a_tov = 100; 5265 5266 ha->loop_reset_delay = nv->reset_delay; 5267 5268 /* Link Down Timeout = 0: 5269 * 5270 * When Port Down timer expires we will start returning 5271 * I/O's to OS with "DID_NO_CONNECT". 5272 * 5273 * Link Down Timeout != 0: 5274 * 5275 * The driver waits for the link to come up after link down 5276 * before returning I/Os to OS with "DID_NO_CONNECT". 5277 */ 5278 if (le16_to_cpu(nv->link_down_timeout) == 0) { 5279 ha->loop_down_abort_time = 5280 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5281 } else { 5282 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 5283 ha->loop_down_abort_time = 5284 (LOOP_DOWN_TIME - ha->link_down_timeout); 5285 } 5286 5287 /* Need enough time to try and get the port back. */ 5288 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 5289 if (qlport_down_retry) 5290 ha->port_down_retry_count = qlport_down_retry; 5291 5292 /* Set login_retry_count */ 5293 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 5294 if (ha->port_down_retry_count == 5295 le16_to_cpu(nv->port_down_retry_count) && 5296 ha->port_down_retry_count > 3) 5297 ha->login_retry_count = ha->port_down_retry_count; 5298 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5299 ha->login_retry_count = ha->port_down_retry_count; 5300 if (ql2xloginretrycount) 5301 ha->login_retry_count = ql2xloginretrycount; 5302 5303 /* Enable ZIO. */ 5304 if (!vha->flags.init_done) { 5305 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 5306 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5307 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 5308 le16_to_cpu(icb->interrupt_delay_timer): 2; 5309 } 5310 icb->firmware_options_2 &= __constant_cpu_to_le32( 5311 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 5312 vha->flags.process_response_queue = 0; 5313 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5314 ha->zio_mode = QLA_ZIO_MODE_6; 5315 5316 ql_log(ql_log_info, vha, 0x006f, 5317 "ZIO mode %d enabled; timer delay (%d us).\n", 5318 ha->zio_mode, ha->zio_timer * 100); 5319 5320 icb->firmware_options_2 |= cpu_to_le32( 5321 (uint32_t)ha->zio_mode); 5322 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 5323 vha->flags.process_response_queue = 1; 5324 } 5325 5326 if (rval) { 5327 ql_log(ql_log_warn, vha, 0x0070, 5328 "NVRAM configuration failed.\n"); 5329 } 5330 return (rval); 5331 } 5332 5333 static int 5334 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 5335 uint32_t faddr) 5336 { 5337 int rval = QLA_SUCCESS; 5338 int segments, fragment; 5339 uint32_t *dcode, dlen; 5340 uint32_t risc_addr; 5341 uint32_t risc_size; 5342 uint32_t i; 5343 struct qla_hw_data *ha = vha->hw; 5344 struct req_que *req = ha->req_q_map[0]; 5345 5346 ql_dbg(ql_dbg_init, vha, 0x008b, 5347 "FW: Loading firmware from flash (%x).\n", faddr); 5348 5349 rval = QLA_SUCCESS; 5350 5351 segments = FA_RISC_CODE_SEGMENTS; 5352 dcode = (uint32_t *)req->ring; 5353 *srisc_addr = 0; 5354 5355 /* Validate firmware image by checking version. */ 5356 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 5357 for (i = 0; i < 4; i++) 5358 dcode[i] = be32_to_cpu(dcode[i]); 5359 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 5360 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 5361 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 5362 dcode[3] == 0)) { 5363 ql_log(ql_log_fatal, vha, 0x008c, 5364 "Unable to verify the integrity of flash firmware " 5365 "image.\n"); 5366 ql_log(ql_log_fatal, vha, 0x008d, 5367 "Firmware data: %08x %08x %08x %08x.\n", 5368 dcode[0], dcode[1], dcode[2], dcode[3]); 5369 5370 return QLA_FUNCTION_FAILED; 5371 } 5372 5373 while (segments && rval == QLA_SUCCESS) { 5374 /* Read segment's load information. */ 5375 qla24xx_read_flash_data(vha, dcode, faddr, 4); 5376 5377 risc_addr = be32_to_cpu(dcode[2]); 5378 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 5379 risc_size = be32_to_cpu(dcode[3]); 5380 5381 fragment = 0; 5382 while (risc_size > 0 && rval == QLA_SUCCESS) { 5383 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 5384 if (dlen > risc_size) 5385 dlen = risc_size; 5386 5387 ql_dbg(ql_dbg_init, vha, 0x008e, 5388 "Loading risc segment@ risc addr %x " 5389 "number of dwords 0x%x offset 0x%x.\n", 5390 risc_addr, dlen, faddr); 5391 5392 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 5393 for (i = 0; i < dlen; i++) 5394 dcode[i] = swab32(dcode[i]); 5395 5396 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5397 dlen); 5398 if (rval) { 5399 ql_log(ql_log_fatal, vha, 0x008f, 5400 "Failed to load segment %d of firmware.\n", 5401 fragment); 5402 return QLA_FUNCTION_FAILED; 5403 } 5404 5405 faddr += dlen; 5406 risc_addr += dlen; 5407 risc_size -= dlen; 5408 fragment++; 5409 } 5410 5411 /* Next segment. */ 5412 segments--; 5413 } 5414 5415 if (!IS_QLA27XX(ha)) 5416 return rval; 5417 5418 if (ha->fw_dump_template) 5419 vfree(ha->fw_dump_template); 5420 ha->fw_dump_template = NULL; 5421 ha->fw_dump_template_len = 0; 5422 5423 ql_dbg(ql_dbg_init, vha, 0x0161, 5424 "Loading fwdump template from %x\n", faddr); 5425 qla24xx_read_flash_data(vha, dcode, faddr, 7); 5426 risc_size = be32_to_cpu(dcode[2]); 5427 ql_dbg(ql_dbg_init, vha, 0x0162, 5428 "-> array size %x dwords\n", risc_size); 5429 if (risc_size == 0 || risc_size == ~0) 5430 goto default_template; 5431 5432 dlen = (risc_size - 8) * sizeof(*dcode); 5433 ql_dbg(ql_dbg_init, vha, 0x0163, 5434 "-> template allocating %x bytes...\n", dlen); 5435 ha->fw_dump_template = vmalloc(dlen); 5436 if (!ha->fw_dump_template) { 5437 ql_log(ql_log_warn, vha, 0x0164, 5438 "Failed fwdump template allocate %x bytes.\n", risc_size); 5439 goto default_template; 5440 } 5441 5442 faddr += 7; 5443 risc_size -= 8; 5444 dcode = ha->fw_dump_template; 5445 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 5446 for (i = 0; i < risc_size; i++) 5447 dcode[i] = le32_to_cpu(dcode[i]); 5448 5449 if (!qla27xx_fwdt_template_valid(dcode)) { 5450 ql_log(ql_log_warn, vha, 0x0165, 5451 "Failed fwdump template validate\n"); 5452 goto default_template; 5453 } 5454 5455 dlen = qla27xx_fwdt_template_size(dcode); 5456 ql_dbg(ql_dbg_init, vha, 0x0166, 5457 "-> template size %x bytes\n", dlen); 5458 if (dlen > risc_size * sizeof(*dcode)) { 5459 ql_log(ql_log_warn, vha, 0x0167, 5460 "Failed fwdump template exceeds array by %x bytes\n", 5461 (uint32_t)(dlen - risc_size * sizeof(*dcode))); 5462 goto default_template; 5463 } 5464 ha->fw_dump_template_len = dlen; 5465 return rval; 5466 5467 default_template: 5468 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 5469 if (ha->fw_dump_template) 5470 vfree(ha->fw_dump_template); 5471 ha->fw_dump_template = NULL; 5472 ha->fw_dump_template_len = 0; 5473 5474 dlen = qla27xx_fwdt_template_default_size(); 5475 ql_dbg(ql_dbg_init, vha, 0x0169, 5476 "-> template allocating %x bytes...\n", dlen); 5477 ha->fw_dump_template = vmalloc(dlen); 5478 if (!ha->fw_dump_template) { 5479 ql_log(ql_log_warn, vha, 0x016a, 5480 "Failed fwdump template allocate %x bytes.\n", risc_size); 5481 goto failed_template; 5482 } 5483 5484 dcode = ha->fw_dump_template; 5485 risc_size = dlen / sizeof(*dcode); 5486 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 5487 for (i = 0; i < risc_size; i++) 5488 dcode[i] = be32_to_cpu(dcode[i]); 5489 5490 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 5491 ql_log(ql_log_warn, vha, 0x016b, 5492 "Failed fwdump template validate\n"); 5493 goto failed_template; 5494 } 5495 5496 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 5497 ql_dbg(ql_dbg_init, vha, 0x016c, 5498 "-> template size %x bytes\n", dlen); 5499 ha->fw_dump_template_len = dlen; 5500 return rval; 5501 5502 failed_template: 5503 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 5504 if (ha->fw_dump_template) 5505 vfree(ha->fw_dump_template); 5506 ha->fw_dump_template = NULL; 5507 ha->fw_dump_template_len = 0; 5508 return rval; 5509 } 5510 5511 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 5512 5513 int 5514 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5515 { 5516 int rval; 5517 int i, fragment; 5518 uint16_t *wcode, *fwcode; 5519 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 5520 struct fw_blob *blob; 5521 struct qla_hw_data *ha = vha->hw; 5522 struct req_que *req = ha->req_q_map[0]; 5523 5524 /* Load firmware blob. */ 5525 blob = qla2x00_request_firmware(vha); 5526 if (!blob) { 5527 ql_log(ql_log_info, vha, 0x0083, 5528 "Firmware image unavailable.\n"); 5529 ql_log(ql_log_info, vha, 0x0084, 5530 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 5531 return QLA_FUNCTION_FAILED; 5532 } 5533 5534 rval = QLA_SUCCESS; 5535 5536 wcode = (uint16_t *)req->ring; 5537 *srisc_addr = 0; 5538 fwcode = (uint16_t *)blob->fw->data; 5539 fwclen = 0; 5540 5541 /* Validate firmware image by checking version. */ 5542 if (blob->fw->size < 8 * sizeof(uint16_t)) { 5543 ql_log(ql_log_fatal, vha, 0x0085, 5544 "Unable to verify integrity of firmware image (%Zd).\n", 5545 blob->fw->size); 5546 goto fail_fw_integrity; 5547 } 5548 for (i = 0; i < 4; i++) 5549 wcode[i] = be16_to_cpu(fwcode[i + 4]); 5550 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 5551 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 5552 wcode[2] == 0 && wcode[3] == 0)) { 5553 ql_log(ql_log_fatal, vha, 0x0086, 5554 "Unable to verify integrity of firmware image.\n"); 5555 ql_log(ql_log_fatal, vha, 0x0087, 5556 "Firmware data: %04x %04x %04x %04x.\n", 5557 wcode[0], wcode[1], wcode[2], wcode[3]); 5558 goto fail_fw_integrity; 5559 } 5560 5561 seg = blob->segs; 5562 while (*seg && rval == QLA_SUCCESS) { 5563 risc_addr = *seg; 5564 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 5565 risc_size = be16_to_cpu(fwcode[3]); 5566 5567 /* Validate firmware image size. */ 5568 fwclen += risc_size * sizeof(uint16_t); 5569 if (blob->fw->size < fwclen) { 5570 ql_log(ql_log_fatal, vha, 0x0088, 5571 "Unable to verify integrity of firmware image " 5572 "(%Zd).\n", blob->fw->size); 5573 goto fail_fw_integrity; 5574 } 5575 5576 fragment = 0; 5577 while (risc_size > 0 && rval == QLA_SUCCESS) { 5578 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 5579 if (wlen > risc_size) 5580 wlen = risc_size; 5581 ql_dbg(ql_dbg_init, vha, 0x0089, 5582 "Loading risc segment@ risc addr %x number of " 5583 "words 0x%x.\n", risc_addr, wlen); 5584 5585 for (i = 0; i < wlen; i++) 5586 wcode[i] = swab16(fwcode[i]); 5587 5588 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5589 wlen); 5590 if (rval) { 5591 ql_log(ql_log_fatal, vha, 0x008a, 5592 "Failed to load segment %d of firmware.\n", 5593 fragment); 5594 break; 5595 } 5596 5597 fwcode += wlen; 5598 risc_addr += wlen; 5599 risc_size -= wlen; 5600 fragment++; 5601 } 5602 5603 /* Next segment. */ 5604 seg++; 5605 } 5606 return rval; 5607 5608 fail_fw_integrity: 5609 return QLA_FUNCTION_FAILED; 5610 } 5611 5612 static int 5613 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5614 { 5615 int rval; 5616 int segments, fragment; 5617 uint32_t *dcode, dlen; 5618 uint32_t risc_addr; 5619 uint32_t risc_size; 5620 uint32_t i; 5621 struct fw_blob *blob; 5622 const uint32_t *fwcode; 5623 uint32_t fwclen; 5624 struct qla_hw_data *ha = vha->hw; 5625 struct req_que *req = ha->req_q_map[0]; 5626 5627 /* Load firmware blob. */ 5628 blob = qla2x00_request_firmware(vha); 5629 if (!blob) { 5630 ql_log(ql_log_warn, vha, 0x0090, 5631 "Firmware image unavailable.\n"); 5632 ql_log(ql_log_warn, vha, 0x0091, 5633 "Firmware images can be retrieved from: " 5634 QLA_FW_URL ".\n"); 5635 5636 return QLA_FUNCTION_FAILED; 5637 } 5638 5639 ql_dbg(ql_dbg_init, vha, 0x0092, 5640 "FW: Loading via request-firmware.\n"); 5641 5642 rval = QLA_SUCCESS; 5643 5644 segments = FA_RISC_CODE_SEGMENTS; 5645 dcode = (uint32_t *)req->ring; 5646 *srisc_addr = 0; 5647 fwcode = (uint32_t *)blob->fw->data; 5648 fwclen = 0; 5649 5650 /* Validate firmware image by checking version. */ 5651 if (blob->fw->size < 8 * sizeof(uint32_t)) { 5652 ql_log(ql_log_fatal, vha, 0x0093, 5653 "Unable to verify integrity of firmware image (%Zd).\n", 5654 blob->fw->size); 5655 return QLA_FUNCTION_FAILED; 5656 } 5657 for (i = 0; i < 4; i++) 5658 dcode[i] = be32_to_cpu(fwcode[i + 4]); 5659 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 5660 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 5661 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 5662 dcode[3] == 0)) { 5663 ql_log(ql_log_fatal, vha, 0x0094, 5664 "Unable to verify integrity of firmware image (%Zd).\n", 5665 blob->fw->size); 5666 ql_log(ql_log_fatal, vha, 0x0095, 5667 "Firmware data: %08x %08x %08x %08x.\n", 5668 dcode[0], dcode[1], dcode[2], dcode[3]); 5669 return QLA_FUNCTION_FAILED; 5670 } 5671 5672 while (segments && rval == QLA_SUCCESS) { 5673 risc_addr = be32_to_cpu(fwcode[2]); 5674 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 5675 risc_size = be32_to_cpu(fwcode[3]); 5676 5677 /* Validate firmware image size. */ 5678 fwclen += risc_size * sizeof(uint32_t); 5679 if (blob->fw->size < fwclen) { 5680 ql_log(ql_log_fatal, vha, 0x0096, 5681 "Unable to verify integrity of firmware image " 5682 "(%Zd).\n", blob->fw->size); 5683 return QLA_FUNCTION_FAILED; 5684 } 5685 5686 fragment = 0; 5687 while (risc_size > 0 && rval == QLA_SUCCESS) { 5688 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 5689 if (dlen > risc_size) 5690 dlen = risc_size; 5691 5692 ql_dbg(ql_dbg_init, vha, 0x0097, 5693 "Loading risc segment@ risc addr %x " 5694 "number of dwords 0x%x.\n", risc_addr, dlen); 5695 5696 for (i = 0; i < dlen; i++) 5697 dcode[i] = swab32(fwcode[i]); 5698 5699 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5700 dlen); 5701 if (rval) { 5702 ql_log(ql_log_fatal, vha, 0x0098, 5703 "Failed to load segment %d of firmware.\n", 5704 fragment); 5705 return QLA_FUNCTION_FAILED; 5706 } 5707 5708 fwcode += dlen; 5709 risc_addr += dlen; 5710 risc_size -= dlen; 5711 fragment++; 5712 } 5713 5714 /* Next segment. */ 5715 segments--; 5716 } 5717 5718 if (!IS_QLA27XX(ha)) 5719 return rval; 5720 5721 if (ha->fw_dump_template) 5722 vfree(ha->fw_dump_template); 5723 ha->fw_dump_template = NULL; 5724 ha->fw_dump_template_len = 0; 5725 5726 ql_dbg(ql_dbg_init, vha, 0x171, 5727 "Loading fwdump template from %x\n", 5728 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 5729 risc_size = be32_to_cpu(fwcode[2]); 5730 ql_dbg(ql_dbg_init, vha, 0x172, 5731 "-> array size %x dwords\n", risc_size); 5732 if (risc_size == 0 || risc_size == ~0) 5733 goto default_template; 5734 5735 dlen = (risc_size - 8) * sizeof(*fwcode); 5736 ql_dbg(ql_dbg_init, vha, 0x0173, 5737 "-> template allocating %x bytes...\n", dlen); 5738 ha->fw_dump_template = vmalloc(dlen); 5739 if (!ha->fw_dump_template) { 5740 ql_log(ql_log_warn, vha, 0x0174, 5741 "Failed fwdump template allocate %x bytes.\n", risc_size); 5742 goto default_template; 5743 } 5744 5745 fwcode += 7; 5746 risc_size -= 8; 5747 dcode = ha->fw_dump_template; 5748 for (i = 0; i < risc_size; i++) 5749 dcode[i] = le32_to_cpu(fwcode[i]); 5750 5751 if (!qla27xx_fwdt_template_valid(dcode)) { 5752 ql_log(ql_log_warn, vha, 0x0175, 5753 "Failed fwdump template validate\n"); 5754 goto default_template; 5755 } 5756 5757 dlen = qla27xx_fwdt_template_size(dcode); 5758 ql_dbg(ql_dbg_init, vha, 0x0176, 5759 "-> template size %x bytes\n", dlen); 5760 if (dlen > risc_size * sizeof(*fwcode)) { 5761 ql_log(ql_log_warn, vha, 0x0177, 5762 "Failed fwdump template exceeds array by %x bytes\n", 5763 (uint32_t)(dlen - risc_size * sizeof(*fwcode))); 5764 goto default_template; 5765 } 5766 ha->fw_dump_template_len = dlen; 5767 return rval; 5768 5769 default_template: 5770 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 5771 if (ha->fw_dump_template) 5772 vfree(ha->fw_dump_template); 5773 ha->fw_dump_template = NULL; 5774 ha->fw_dump_template_len = 0; 5775 5776 dlen = qla27xx_fwdt_template_default_size(); 5777 ql_dbg(ql_dbg_init, vha, 0x0179, 5778 "-> template allocating %x bytes...\n", dlen); 5779 ha->fw_dump_template = vmalloc(dlen); 5780 if (!ha->fw_dump_template) { 5781 ql_log(ql_log_warn, vha, 0x017a, 5782 "Failed fwdump template allocate %x bytes.\n", risc_size); 5783 goto failed_template; 5784 } 5785 5786 dcode = ha->fw_dump_template; 5787 risc_size = dlen / sizeof(*fwcode); 5788 fwcode = qla27xx_fwdt_template_default(); 5789 for (i = 0; i < risc_size; i++) 5790 dcode[i] = be32_to_cpu(fwcode[i]); 5791 5792 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 5793 ql_log(ql_log_warn, vha, 0x017b, 5794 "Failed fwdump template validate\n"); 5795 goto failed_template; 5796 } 5797 5798 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 5799 ql_dbg(ql_dbg_init, vha, 0x017c, 5800 "-> template size %x bytes\n", dlen); 5801 ha->fw_dump_template_len = dlen; 5802 return rval; 5803 5804 failed_template: 5805 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 5806 if (ha->fw_dump_template) 5807 vfree(ha->fw_dump_template); 5808 ha->fw_dump_template = NULL; 5809 ha->fw_dump_template_len = 0; 5810 return rval; 5811 } 5812 5813 int 5814 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5815 { 5816 int rval; 5817 5818 if (ql2xfwloadbin == 1) 5819 return qla81xx_load_risc(vha, srisc_addr); 5820 5821 /* 5822 * FW Load priority: 5823 * 1) Firmware via request-firmware interface (.bin file). 5824 * 2) Firmware residing in flash. 5825 */ 5826 rval = qla24xx_load_risc_blob(vha, srisc_addr); 5827 if (rval == QLA_SUCCESS) 5828 return rval; 5829 5830 return qla24xx_load_risc_flash(vha, srisc_addr, 5831 vha->hw->flt_region_fw); 5832 } 5833 5834 int 5835 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5836 { 5837 int rval; 5838 struct qla_hw_data *ha = vha->hw; 5839 5840 if (ql2xfwloadbin == 2) 5841 goto try_blob_fw; 5842 5843 /* 5844 * FW Load priority: 5845 * 1) Firmware residing in flash. 5846 * 2) Firmware via request-firmware interface (.bin file). 5847 * 3) Golden-Firmware residing in flash -- limited operation. 5848 */ 5849 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 5850 if (rval == QLA_SUCCESS) 5851 return rval; 5852 5853 try_blob_fw: 5854 rval = qla24xx_load_risc_blob(vha, srisc_addr); 5855 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 5856 return rval; 5857 5858 ql_log(ql_log_info, vha, 0x0099, 5859 "Attempting to fallback to golden firmware.\n"); 5860 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 5861 if (rval != QLA_SUCCESS) 5862 return rval; 5863 5864 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 5865 ha->flags.running_gold_fw = 1; 5866 return rval; 5867 } 5868 5869 void 5870 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 5871 { 5872 int ret, retries; 5873 struct qla_hw_data *ha = vha->hw; 5874 5875 if (ha->flags.pci_channel_io_perm_failure) 5876 return; 5877 if (!IS_FWI2_CAPABLE(ha)) 5878 return; 5879 if (!ha->fw_major_version) 5880 return; 5881 5882 ret = qla2x00_stop_firmware(vha); 5883 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 5884 ret != QLA_INVALID_COMMAND && retries ; retries--) { 5885 ha->isp_ops->reset_chip(vha); 5886 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 5887 continue; 5888 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 5889 continue; 5890 ql_log(ql_log_info, vha, 0x8015, 5891 "Attempting retry of stop-firmware command.\n"); 5892 ret = qla2x00_stop_firmware(vha); 5893 } 5894 } 5895 5896 int 5897 qla24xx_configure_vhba(scsi_qla_host_t *vha) 5898 { 5899 int rval = QLA_SUCCESS; 5900 int rval2; 5901 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5902 struct qla_hw_data *ha = vha->hw; 5903 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5904 struct req_que *req; 5905 struct rsp_que *rsp; 5906 5907 if (!vha->vp_idx) 5908 return -EINVAL; 5909 5910 rval = qla2x00_fw_ready(base_vha); 5911 if (ha->flags.cpu_affinity_enabled) 5912 req = ha->req_q_map[0]; 5913 else 5914 req = vha->req; 5915 rsp = req->rsp; 5916 5917 if (rval == QLA_SUCCESS) { 5918 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5919 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5920 } 5921 5922 vha->flags.management_server_logged_in = 0; 5923 5924 /* Login to SNS first */ 5925 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 5926 BIT_1); 5927 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5928 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 5929 ql_dbg(ql_dbg_init, vha, 0x0120, 5930 "Failed SNS login: loop_id=%x, rval2=%d\n", 5931 NPH_SNS, rval2); 5932 else 5933 ql_dbg(ql_dbg_init, vha, 0x0103, 5934 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 5935 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 5936 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 5937 return (QLA_FUNCTION_FAILED); 5938 } 5939 5940 atomic_set(&vha->loop_down_timer, 0); 5941 atomic_set(&vha->loop_state, LOOP_UP); 5942 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5943 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5944 rval = qla2x00_loop_resync(base_vha); 5945 5946 return rval; 5947 } 5948 5949 /* 84XX Support **************************************************************/ 5950 5951 static LIST_HEAD(qla_cs84xx_list); 5952 static DEFINE_MUTEX(qla_cs84xx_mutex); 5953 5954 static struct qla_chip_state_84xx * 5955 qla84xx_get_chip(struct scsi_qla_host *vha) 5956 { 5957 struct qla_chip_state_84xx *cs84xx; 5958 struct qla_hw_data *ha = vha->hw; 5959 5960 mutex_lock(&qla_cs84xx_mutex); 5961 5962 /* Find any shared 84xx chip. */ 5963 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 5964 if (cs84xx->bus == ha->pdev->bus) { 5965 kref_get(&cs84xx->kref); 5966 goto done; 5967 } 5968 } 5969 5970 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 5971 if (!cs84xx) 5972 goto done; 5973 5974 kref_init(&cs84xx->kref); 5975 spin_lock_init(&cs84xx->access_lock); 5976 mutex_init(&cs84xx->fw_update_mutex); 5977 cs84xx->bus = ha->pdev->bus; 5978 5979 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 5980 done: 5981 mutex_unlock(&qla_cs84xx_mutex); 5982 return cs84xx; 5983 } 5984 5985 static void 5986 __qla84xx_chip_release(struct kref *kref) 5987 { 5988 struct qla_chip_state_84xx *cs84xx = 5989 container_of(kref, struct qla_chip_state_84xx, kref); 5990 5991 mutex_lock(&qla_cs84xx_mutex); 5992 list_del(&cs84xx->list); 5993 mutex_unlock(&qla_cs84xx_mutex); 5994 kfree(cs84xx); 5995 } 5996 5997 void 5998 qla84xx_put_chip(struct scsi_qla_host *vha) 5999 { 6000 struct qla_hw_data *ha = vha->hw; 6001 if (ha->cs84xx) 6002 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 6003 } 6004 6005 static int 6006 qla84xx_init_chip(scsi_qla_host_t *vha) 6007 { 6008 int rval; 6009 uint16_t status[2]; 6010 struct qla_hw_data *ha = vha->hw; 6011 6012 mutex_lock(&ha->cs84xx->fw_update_mutex); 6013 6014 rval = qla84xx_verify_chip(vha, status); 6015 6016 mutex_unlock(&ha->cs84xx->fw_update_mutex); 6017 6018 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 6019 QLA_SUCCESS; 6020 } 6021 6022 /* 81XX Support **************************************************************/ 6023 6024 int 6025 qla81xx_nvram_config(scsi_qla_host_t *vha) 6026 { 6027 int rval; 6028 struct init_cb_81xx *icb; 6029 struct nvram_81xx *nv; 6030 uint32_t *dptr; 6031 uint8_t *dptr1, *dptr2; 6032 uint32_t chksum; 6033 uint16_t cnt; 6034 struct qla_hw_data *ha = vha->hw; 6035 6036 rval = QLA_SUCCESS; 6037 icb = (struct init_cb_81xx *)ha->init_cb; 6038 nv = ha->nvram; 6039 6040 /* Determine NVRAM starting address. */ 6041 ha->nvram_size = sizeof(struct nvram_81xx); 6042 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6043 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 6044 ha->vpd_size = FA_VPD_SIZE_82XX; 6045 6046 /* Get VPD data into cache */ 6047 ha->vpd = ha->nvram + VPD_OFFSET; 6048 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 6049 ha->vpd_size); 6050 6051 /* Get NVRAM data into cache and calculate checksum. */ 6052 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 6053 ha->nvram_size); 6054 dptr = (uint32_t *)nv; 6055 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 6056 chksum += le32_to_cpu(*dptr++); 6057 6058 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 6059 "Contents of NVRAM:\n"); 6060 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 6061 (uint8_t *)nv, ha->nvram_size); 6062 6063 /* Bad NVRAM data, set defaults parameters. */ 6064 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6065 || nv->id[3] != ' ' || 6066 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 6067 /* Reset NVRAM data. */ 6068 ql_log(ql_log_info, vha, 0x0073, 6069 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6070 "version=0x%x.\n", chksum, nv->id[0], 6071 le16_to_cpu(nv->nvram_version)); 6072 ql_log(ql_log_info, vha, 0x0074, 6073 "Falling back to functioning (yet invalid -- WWPN) " 6074 "defaults.\n"); 6075 6076 /* 6077 * Set default initialization control block. 6078 */ 6079 memset(nv, 0, ha->nvram_size); 6080 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 6081 nv->version = __constant_cpu_to_le16(ICB_VERSION); 6082 nv->frame_payload_size = 2048; 6083 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 6084 nv->exchange_count = __constant_cpu_to_le16(0); 6085 nv->port_name[0] = 0x21; 6086 nv->port_name[1] = 0x00 + ha->port_no + 1; 6087 nv->port_name[2] = 0x00; 6088 nv->port_name[3] = 0xe0; 6089 nv->port_name[4] = 0x8b; 6090 nv->port_name[5] = 0x1c; 6091 nv->port_name[6] = 0x55; 6092 nv->port_name[7] = 0x86; 6093 nv->node_name[0] = 0x20; 6094 nv->node_name[1] = 0x00; 6095 nv->node_name[2] = 0x00; 6096 nv->node_name[3] = 0xe0; 6097 nv->node_name[4] = 0x8b; 6098 nv->node_name[5] = 0x1c; 6099 nv->node_name[6] = 0x55; 6100 nv->node_name[7] = 0x86; 6101 nv->login_retry_count = __constant_cpu_to_le16(8); 6102 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 6103 nv->login_timeout = __constant_cpu_to_le16(0); 6104 nv->firmware_options_1 = 6105 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6106 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 6107 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 6108 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 6109 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 6110 nv->efi_parameters = __constant_cpu_to_le32(0); 6111 nv->reset_delay = 5; 6112 nv->max_luns_per_target = __constant_cpu_to_le16(128); 6113 nv->port_down_retry_count = __constant_cpu_to_le16(30); 6114 nv->link_down_timeout = __constant_cpu_to_le16(180); 6115 nv->enode_mac[0] = 0x00; 6116 nv->enode_mac[1] = 0xC0; 6117 nv->enode_mac[2] = 0xDD; 6118 nv->enode_mac[3] = 0x04; 6119 nv->enode_mac[4] = 0x05; 6120 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 6121 6122 rval = 1; 6123 } 6124 6125 if (IS_T10_PI_CAPABLE(ha)) 6126 nv->frame_payload_size &= ~7; 6127 6128 qlt_81xx_config_nvram_stage1(vha, nv); 6129 6130 /* Reset Initialization control block */ 6131 memset(icb, 0, ha->init_cb_size); 6132 6133 /* Copy 1st segment. */ 6134 dptr1 = (uint8_t *)icb; 6135 dptr2 = (uint8_t *)&nv->version; 6136 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6137 while (cnt--) 6138 *dptr1++ = *dptr2++; 6139 6140 icb->login_retry_count = nv->login_retry_count; 6141 6142 /* Copy 2nd segment. */ 6143 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6144 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6145 cnt = (uint8_t *)&icb->reserved_5 - 6146 (uint8_t *)&icb->interrupt_delay_timer; 6147 while (cnt--) 6148 *dptr1++ = *dptr2++; 6149 6150 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 6151 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 6152 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 6153 icb->enode_mac[0] = 0x00; 6154 icb->enode_mac[1] = 0xC0; 6155 icb->enode_mac[2] = 0xDD; 6156 icb->enode_mac[3] = 0x04; 6157 icb->enode_mac[4] = 0x05; 6158 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 6159 } 6160 6161 /* Use extended-initialization control block. */ 6162 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 6163 6164 /* 6165 * Setup driver NVRAM options. 6166 */ 6167 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6168 "QLE8XXX"); 6169 6170 qlt_81xx_config_nvram_stage2(vha, icb); 6171 6172 /* Use alternate WWN? */ 6173 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 6174 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6175 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6176 } 6177 6178 /* Prepare nodename */ 6179 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 6180 /* 6181 * Firmware will apply the following mask if the nodename was 6182 * not provided. 6183 */ 6184 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6185 icb->node_name[0] &= 0xF0; 6186 } 6187 6188 /* Set host adapter parameters. */ 6189 ha->flags.disable_risc_code_load = 0; 6190 ha->flags.enable_lip_reset = 0; 6191 ha->flags.enable_lip_full_login = 6192 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6193 ha->flags.enable_target_reset = 6194 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6195 ha->flags.enable_led_scheme = 0; 6196 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6197 6198 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6199 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6200 6201 /* save HBA serial number */ 6202 ha->serial0 = icb->port_name[5]; 6203 ha->serial1 = icb->port_name[6]; 6204 ha->serial2 = icb->port_name[7]; 6205 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6206 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6207 6208 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 6209 6210 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6211 6212 /* Set minimum login_timeout to 4 seconds. */ 6213 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6214 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6215 if (le16_to_cpu(nv->login_timeout) < 4) 6216 nv->login_timeout = __constant_cpu_to_le16(4); 6217 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6218 icb->login_timeout = nv->login_timeout; 6219 6220 /* Set minimum RATOV to 100 tenths of a second. */ 6221 ha->r_a_tov = 100; 6222 6223 ha->loop_reset_delay = nv->reset_delay; 6224 6225 /* Link Down Timeout = 0: 6226 * 6227 * When Port Down timer expires we will start returning 6228 * I/O's to OS with "DID_NO_CONNECT". 6229 * 6230 * Link Down Timeout != 0: 6231 * 6232 * The driver waits for the link to come up after link down 6233 * before returning I/Os to OS with "DID_NO_CONNECT". 6234 */ 6235 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6236 ha->loop_down_abort_time = 6237 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6238 } else { 6239 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6240 ha->loop_down_abort_time = 6241 (LOOP_DOWN_TIME - ha->link_down_timeout); 6242 } 6243 6244 /* Need enough time to try and get the port back. */ 6245 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6246 if (qlport_down_retry) 6247 ha->port_down_retry_count = qlport_down_retry; 6248 6249 /* Set login_retry_count */ 6250 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6251 if (ha->port_down_retry_count == 6252 le16_to_cpu(nv->port_down_retry_count) && 6253 ha->port_down_retry_count > 3) 6254 ha->login_retry_count = ha->port_down_retry_count; 6255 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6256 ha->login_retry_count = ha->port_down_retry_count; 6257 if (ql2xloginretrycount) 6258 ha->login_retry_count = ql2xloginretrycount; 6259 6260 /* if not running MSI-X we need handshaking on interrupts */ 6261 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 6262 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22); 6263 6264 /* Enable ZIO. */ 6265 if (!vha->flags.init_done) { 6266 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6267 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6268 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6269 le16_to_cpu(icb->interrupt_delay_timer): 2; 6270 } 6271 icb->firmware_options_2 &= __constant_cpu_to_le32( 6272 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6273 vha->flags.process_response_queue = 0; 6274 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6275 ha->zio_mode = QLA_ZIO_MODE_6; 6276 6277 ql_log(ql_log_info, vha, 0x0075, 6278 "ZIO mode %d enabled; timer delay (%d us).\n", 6279 ha->zio_mode, 6280 ha->zio_timer * 100); 6281 6282 icb->firmware_options_2 |= cpu_to_le32( 6283 (uint32_t)ha->zio_mode); 6284 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6285 vha->flags.process_response_queue = 1; 6286 } 6287 6288 if (rval) { 6289 ql_log(ql_log_warn, vha, 0x0076, 6290 "NVRAM configuration failed.\n"); 6291 } 6292 return (rval); 6293 } 6294 6295 int 6296 qla82xx_restart_isp(scsi_qla_host_t *vha) 6297 { 6298 int status, rval; 6299 struct qla_hw_data *ha = vha->hw; 6300 struct req_que *req = ha->req_q_map[0]; 6301 struct rsp_que *rsp = ha->rsp_q_map[0]; 6302 struct scsi_qla_host *vp; 6303 unsigned long flags; 6304 6305 status = qla2x00_init_rings(vha); 6306 if (!status) { 6307 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6308 ha->flags.chip_reset_done = 1; 6309 6310 status = qla2x00_fw_ready(vha); 6311 if (!status) { 6312 /* Issue a marker after FW becomes ready. */ 6313 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6314 vha->flags.online = 1; 6315 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6316 } 6317 6318 /* if no cable then assume it's good */ 6319 if ((vha->device_flags & DFLG_NO_CABLE)) 6320 status = 0; 6321 } 6322 6323 if (!status) { 6324 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6325 6326 if (!atomic_read(&vha->loop_down_timer)) { 6327 /* 6328 * Issue marker command only when we are going 6329 * to start the I/O . 6330 */ 6331 vha->marker_needed = 1; 6332 } 6333 6334 ha->isp_ops->enable_intrs(ha); 6335 6336 ha->isp_abort_cnt = 0; 6337 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6338 6339 /* Update the firmware version */ 6340 status = qla82xx_check_md_needed(vha); 6341 6342 if (ha->fce) { 6343 ha->flags.fce_enabled = 1; 6344 memset(ha->fce, 0, 6345 fce_calc_size(ha->fce_bufs)); 6346 rval = qla2x00_enable_fce_trace(vha, 6347 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6348 &ha->fce_bufs); 6349 if (rval) { 6350 ql_log(ql_log_warn, vha, 0x8001, 6351 "Unable to reinitialize FCE (%d).\n", 6352 rval); 6353 ha->flags.fce_enabled = 0; 6354 } 6355 } 6356 6357 if (ha->eft) { 6358 memset(ha->eft, 0, EFT_SIZE); 6359 rval = qla2x00_enable_eft_trace(vha, 6360 ha->eft_dma, EFT_NUM_BUFFERS); 6361 if (rval) { 6362 ql_log(ql_log_warn, vha, 0x8010, 6363 "Unable to reinitialize EFT (%d).\n", 6364 rval); 6365 } 6366 } 6367 } 6368 6369 if (!status) { 6370 ql_dbg(ql_dbg_taskm, vha, 0x8011, 6371 "qla82xx_restart_isp succeeded.\n"); 6372 6373 spin_lock_irqsave(&ha->vport_slock, flags); 6374 list_for_each_entry(vp, &ha->vp_list, list) { 6375 if (vp->vp_idx) { 6376 atomic_inc(&vp->vref_count); 6377 spin_unlock_irqrestore(&ha->vport_slock, flags); 6378 6379 qla2x00_vp_abort_isp(vp); 6380 6381 spin_lock_irqsave(&ha->vport_slock, flags); 6382 atomic_dec(&vp->vref_count); 6383 } 6384 } 6385 spin_unlock_irqrestore(&ha->vport_slock, flags); 6386 6387 } else { 6388 ql_log(ql_log_warn, vha, 0x8016, 6389 "qla82xx_restart_isp **** FAILED ****.\n"); 6390 } 6391 6392 return status; 6393 } 6394 6395 void 6396 qla81xx_update_fw_options(scsi_qla_host_t *vha) 6397 { 6398 struct qla_hw_data *ha = vha->hw; 6399 6400 if (!ql2xetsenable) 6401 return; 6402 6403 /* Enable ETS Burst. */ 6404 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 6405 ha->fw_options[2] |= BIT_9; 6406 qla2x00_set_fw_options(vha, ha->fw_options); 6407 } 6408 6409 /* 6410 * qla24xx_get_fcp_prio 6411 * Gets the fcp cmd priority value for the logged in port. 6412 * Looks for a match of the port descriptors within 6413 * each of the fcp prio config entries. If a match is found, 6414 * the tag (priority) value is returned. 6415 * 6416 * Input: 6417 * vha = scsi host structure pointer. 6418 * fcport = port structure pointer. 6419 * 6420 * Return: 6421 * non-zero (if found) 6422 * -1 (if not found) 6423 * 6424 * Context: 6425 * Kernel context 6426 */ 6427 static int 6428 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 6429 { 6430 int i, entries; 6431 uint8_t pid_match, wwn_match; 6432 int priority; 6433 uint32_t pid1, pid2; 6434 uint64_t wwn1, wwn2; 6435 struct qla_fcp_prio_entry *pri_entry; 6436 struct qla_hw_data *ha = vha->hw; 6437 6438 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 6439 return -1; 6440 6441 priority = -1; 6442 entries = ha->fcp_prio_cfg->num_entries; 6443 pri_entry = &ha->fcp_prio_cfg->entry[0]; 6444 6445 for (i = 0; i < entries; i++) { 6446 pid_match = wwn_match = 0; 6447 6448 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 6449 pri_entry++; 6450 continue; 6451 } 6452 6453 /* check source pid for a match */ 6454 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 6455 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 6456 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 6457 if (pid1 == INVALID_PORT_ID) 6458 pid_match++; 6459 else if (pid1 == pid2) 6460 pid_match++; 6461 } 6462 6463 /* check destination pid for a match */ 6464 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 6465 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 6466 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 6467 if (pid1 == INVALID_PORT_ID) 6468 pid_match++; 6469 else if (pid1 == pid2) 6470 pid_match++; 6471 } 6472 6473 /* check source WWN for a match */ 6474 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 6475 wwn1 = wwn_to_u64(vha->port_name); 6476 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 6477 if (wwn2 == (uint64_t)-1) 6478 wwn_match++; 6479 else if (wwn1 == wwn2) 6480 wwn_match++; 6481 } 6482 6483 /* check destination WWN for a match */ 6484 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 6485 wwn1 = wwn_to_u64(fcport->port_name); 6486 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 6487 if (wwn2 == (uint64_t)-1) 6488 wwn_match++; 6489 else if (wwn1 == wwn2) 6490 wwn_match++; 6491 } 6492 6493 if (pid_match == 2 || wwn_match == 2) { 6494 /* Found a matching entry */ 6495 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 6496 priority = pri_entry->tag; 6497 break; 6498 } 6499 6500 pri_entry++; 6501 } 6502 6503 return priority; 6504 } 6505 6506 /* 6507 * qla24xx_update_fcport_fcp_prio 6508 * Activates fcp priority for the logged in fc port 6509 * 6510 * Input: 6511 * vha = scsi host structure pointer. 6512 * fcp = port structure pointer. 6513 * 6514 * Return: 6515 * QLA_SUCCESS or QLA_FUNCTION_FAILED 6516 * 6517 * Context: 6518 * Kernel context. 6519 */ 6520 int 6521 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 6522 { 6523 int ret; 6524 int priority; 6525 uint16_t mb[5]; 6526 6527 if (fcport->port_type != FCT_TARGET || 6528 fcport->loop_id == FC_NO_LOOP_ID) 6529 return QLA_FUNCTION_FAILED; 6530 6531 priority = qla24xx_get_fcp_prio(vha, fcport); 6532 if (priority < 0) 6533 return QLA_FUNCTION_FAILED; 6534 6535 if (IS_P3P_TYPE(vha->hw)) { 6536 fcport->fcp_prio = priority & 0xf; 6537 return QLA_SUCCESS; 6538 } 6539 6540 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 6541 if (ret == QLA_SUCCESS) { 6542 if (fcport->fcp_prio != priority) 6543 ql_dbg(ql_dbg_user, vha, 0x709e, 6544 "Updated FCP_CMND priority - value=%d loop_id=%d " 6545 "port_id=%02x%02x%02x.\n", priority, 6546 fcport->loop_id, fcport->d_id.b.domain, 6547 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6548 fcport->fcp_prio = priority & 0xf; 6549 } else 6550 ql_dbg(ql_dbg_user, vha, 0x704f, 6551 "Unable to update FCP_CMND priority - ret=0x%x for " 6552 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 6553 fcport->d_id.b.domain, fcport->d_id.b.area, 6554 fcport->d_id.b.al_pa); 6555 return ret; 6556 } 6557 6558 /* 6559 * qla24xx_update_all_fcp_prio 6560 * Activates fcp priority for all the logged in ports 6561 * 6562 * Input: 6563 * ha = adapter block pointer. 6564 * 6565 * Return: 6566 * QLA_SUCCESS or QLA_FUNCTION_FAILED 6567 * 6568 * Context: 6569 * Kernel context. 6570 */ 6571 int 6572 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 6573 { 6574 int ret; 6575 fc_port_t *fcport; 6576 6577 ret = QLA_FUNCTION_FAILED; 6578 /* We need to set priority for all logged in ports */ 6579 list_for_each_entry(fcport, &vha->vp_fcports, list) 6580 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 6581 6582 return ret; 6583 } 6584