1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #include "qla_def.h" 7 #include "qla_gbl.h" 8 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/vmalloc.h> 12 13 #include "qla_devtbl.h" 14 15 #ifdef CONFIG_SPARC 16 #include <asm/prom.h> 17 #endif 18 19 #include "qla_target.h" 20 21 /* 22 * QLogic ISP2x00 Hardware Support Function Prototypes. 23 */ 24 static int qla2x00_isp_firmware(scsi_qla_host_t *); 25 static int qla2x00_setup_chip(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 32 static int qla2x00_restart_isp(scsi_qla_host_t *); 33 34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 35 static int qla84xx_init_chip(scsi_qla_host_t *); 36 static int qla25xx_init_queues(struct qla_hw_data *); 37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 38 struct event_arg *ea); 39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 40 struct event_arg *); 41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 42 43 /* SRB Extensions ---------------------------------------------------------- */ 44 45 void 46 qla2x00_sp_timeout(struct timer_list *t) 47 { 48 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 49 struct srb_iocb *iocb; 50 51 WARN_ON(irqs_disabled()); 52 iocb = &sp->u.iocb_cmd; 53 iocb->timeout(sp); 54 55 /* ref: TMR */ 56 kref_put(&sp->cmd_kref, qla2x00_sp_release); 57 } 58 59 void qla2x00_sp_free(srb_t *sp) 60 { 61 struct srb_iocb *iocb = &sp->u.iocb_cmd; 62 63 del_timer(&iocb->timer); 64 qla2x00_rel_sp(sp); 65 } 66 67 void qla2xxx_rel_done_warning(srb_t *sp, int res) 68 { 69 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp); 70 } 71 72 void qla2xxx_rel_free_warning(srb_t *sp) 73 { 74 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp); 75 } 76 77 /* Asynchronous Login/Logout Routines -------------------------------------- */ 78 79 unsigned long 80 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 81 { 82 unsigned long tmo; 83 struct qla_hw_data *ha = vha->hw; 84 85 /* Firmware should use switch negotiated r_a_tov for timeout. */ 86 tmo = ha->r_a_tov / 10 * 2; 87 if (IS_QLAFX00(ha)) { 88 tmo = FX00_DEF_RATOV * 2; 89 } else if (!IS_FWI2_CAPABLE(ha)) { 90 /* 91 * Except for earlier ISPs where the timeout is seeded from the 92 * initialization control block. 93 */ 94 tmo = ha->login_timeout; 95 } 96 return tmo; 97 } 98 99 static void qla24xx_abort_iocb_timeout(void *data) 100 { 101 srb_t *sp = data; 102 struct srb_iocb *abt = &sp->u.iocb_cmd; 103 struct qla_qpair *qpair = sp->qpair; 104 u32 handle; 105 unsigned long flags; 106 107 if (sp->cmd_sp) 108 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 109 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 110 sp->cmd_sp->handle, sp->cmd_sp->type, 111 sp->handle, sp->type); 112 else 113 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 114 "Abort timeout 2 - hdl=%x, type=%x\n", 115 sp->handle, sp->type); 116 117 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 118 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 119 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 120 sp->cmd_sp)) 121 qpair->req->outstanding_cmds[handle] = NULL; 122 123 /* removing the abort */ 124 if (qpair->req->outstanding_cmds[handle] == sp) { 125 qpair->req->outstanding_cmds[handle] = NULL; 126 break; 127 } 128 } 129 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 130 131 if (sp->cmd_sp) { 132 /* 133 * This done function should take care of 134 * original command ref: INIT 135 */ 136 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 137 } 138 139 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT); 140 sp->done(sp, QLA_OS_TIMER_EXPIRED); 141 } 142 143 static void qla24xx_abort_sp_done(srb_t *sp, int res) 144 { 145 struct srb_iocb *abt = &sp->u.iocb_cmd; 146 srb_t *orig_sp = sp->cmd_sp; 147 148 if (orig_sp) 149 qla_wait_nvme_release_cmd_kref(orig_sp); 150 151 if (sp->flags & SRB_WAKEUP_ON_COMP) 152 complete(&abt->u.abt.comp); 153 else 154 /* ref: INIT */ 155 kref_put(&sp->cmd_kref, qla2x00_sp_release); 156 } 157 158 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 159 { 160 scsi_qla_host_t *vha = cmd_sp->vha; 161 struct srb_iocb *abt_iocb; 162 srb_t *sp; 163 int rval = QLA_FUNCTION_FAILED; 164 165 /* ref: INIT for ABTS command */ 166 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 167 GFP_ATOMIC); 168 if (!sp) 169 return QLA_MEMORY_ALLOC_FAILED; 170 171 abt_iocb = &sp->u.iocb_cmd; 172 sp->type = SRB_ABT_CMD; 173 sp->name = "abort"; 174 sp->qpair = cmd_sp->qpair; 175 sp->cmd_sp = cmd_sp; 176 if (wait) 177 sp->flags = SRB_WAKEUP_ON_COMP; 178 179 init_completion(&abt_iocb->u.abt.comp); 180 /* FW can send 2 x ABTS's timeout/20s */ 181 qla2x00_init_async_sp(sp, 42, qla24xx_abort_sp_done); 182 sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout; 183 184 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 185 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 186 187 ql_dbg(ql_dbg_async, vha, 0x507c, 188 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 189 cmd_sp->type); 190 191 rval = qla2x00_start_sp(sp); 192 if (rval != QLA_SUCCESS) { 193 /* ref: INIT */ 194 kref_put(&sp->cmd_kref, qla2x00_sp_release); 195 return rval; 196 } 197 198 if (wait) { 199 wait_for_completion(&abt_iocb->u.abt.comp); 200 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 201 QLA_SUCCESS : QLA_ERR_FROM_FW; 202 /* ref: INIT */ 203 kref_put(&sp->cmd_kref, qla2x00_sp_release); 204 } 205 206 return rval; 207 } 208 209 void 210 qla2x00_async_iocb_timeout(void *data) 211 { 212 srb_t *sp = data; 213 fc_port_t *fcport = sp->fcport; 214 struct srb_iocb *lio = &sp->u.iocb_cmd; 215 int rc, h; 216 unsigned long flags; 217 218 if (fcport) { 219 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 220 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 221 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 222 223 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 224 } else { 225 pr_info("Async-%s timeout - hdl=%x.\n", 226 sp->name, sp->handle); 227 } 228 229 switch (sp->type) { 230 case SRB_LOGIN_CMD: 231 rc = qla24xx_async_abort_cmd(sp, false); 232 if (rc) { 233 /* Retry as needed. */ 234 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 235 lio->u.logio.data[1] = 236 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 237 QLA_LOGIO_LOGIN_RETRIED : 0; 238 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 239 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 240 h++) { 241 if (sp->qpair->req->outstanding_cmds[h] == 242 sp) { 243 sp->qpair->req->outstanding_cmds[h] = 244 NULL; 245 break; 246 } 247 } 248 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 249 sp->done(sp, QLA_FUNCTION_TIMEOUT); 250 } 251 break; 252 case SRB_LOGOUT_CMD: 253 case SRB_CT_PTHRU_CMD: 254 case SRB_MB_IOCB: 255 case SRB_NACK_PLOGI: 256 case SRB_NACK_PRLI: 257 case SRB_NACK_LOGO: 258 case SRB_CTRL_VP: 259 default: 260 rc = qla24xx_async_abort_cmd(sp, false); 261 if (rc) { 262 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 263 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 264 h++) { 265 if (sp->qpair->req->outstanding_cmds[h] == 266 sp) { 267 sp->qpair->req->outstanding_cmds[h] = 268 NULL; 269 break; 270 } 271 } 272 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 273 sp->done(sp, QLA_FUNCTION_TIMEOUT); 274 } 275 break; 276 } 277 } 278 279 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 280 { 281 struct scsi_qla_host *vha = sp->vha; 282 struct srb_iocb *lio = &sp->u.iocb_cmd; 283 struct event_arg ea; 284 285 ql_dbg(ql_dbg_disc, vha, 0x20dd, 286 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 287 288 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 289 290 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 291 memset(&ea, 0, sizeof(ea)); 292 ea.fcport = sp->fcport; 293 ea.data[0] = lio->u.logio.data[0]; 294 ea.data[1] = lio->u.logio.data[1]; 295 ea.iop[0] = lio->u.logio.iop[0]; 296 ea.iop[1] = lio->u.logio.iop[1]; 297 ea.sp = sp; 298 if (res) 299 ea.data[0] = MBS_COMMAND_ERROR; 300 qla24xx_handle_plogi_done_event(vha, &ea); 301 } 302 303 /* ref: INIT */ 304 kref_put(&sp->cmd_kref, qla2x00_sp_release); 305 } 306 307 int 308 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 309 uint16_t *data) 310 { 311 srb_t *sp; 312 struct srb_iocb *lio; 313 int rval = QLA_FUNCTION_FAILED; 314 315 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 316 fcport->loop_id == FC_NO_LOOP_ID) { 317 ql_log(ql_log_warn, vha, 0xffff, 318 "%s: %8phC - not sending command.\n", 319 __func__, fcport->port_name); 320 return rval; 321 } 322 323 /* ref: INIT */ 324 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 325 if (!sp) 326 goto done; 327 328 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 329 fcport->flags |= FCF_ASYNC_SENT; 330 fcport->logout_completed = 0; 331 332 sp->type = SRB_LOGIN_CMD; 333 sp->name = "login"; 334 sp->gen1 = fcport->rscn_gen; 335 sp->gen2 = fcport->login_gen; 336 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 337 qla2x00_async_login_sp_done); 338 339 lio = &sp->u.iocb_cmd; 340 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) { 341 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 342 } else { 343 if (vha->hw->flags.edif_enabled && 344 DBELL_ACTIVE(vha)) { 345 lio->u.logio.flags |= 346 (SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI); 347 } else { 348 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 349 } 350 } 351 352 if (NVME_TARGET(vha->hw, fcport)) 353 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 354 355 rval = qla2x00_start_sp(sp); 356 357 ql_dbg(ql_dbg_disc, vha, 0x2072, 358 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 359 fcport->port_name, sp->handle, fcport->loop_id, 360 fcport->d_id.b24, fcport->login_retry, 361 lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : ""); 362 363 if (rval != QLA_SUCCESS) { 364 fcport->flags |= FCF_LOGIN_NEEDED; 365 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 366 goto done_free_sp; 367 } 368 369 return rval; 370 371 done_free_sp: 372 /* ref: INIT */ 373 kref_put(&sp->cmd_kref, qla2x00_sp_release); 374 fcport->flags &= ~FCF_ASYNC_SENT; 375 done: 376 fcport->flags &= ~FCF_ASYNC_ACTIVE; 377 return rval; 378 } 379 380 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 381 { 382 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 383 sp->fcport->login_gen++; 384 qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]); 385 /* ref: INIT */ 386 kref_put(&sp->cmd_kref, qla2x00_sp_release); 387 } 388 389 int 390 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 391 { 392 srb_t *sp; 393 int rval = QLA_FUNCTION_FAILED; 394 395 fcport->flags |= FCF_ASYNC_SENT; 396 /* ref: INIT */ 397 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 398 if (!sp) 399 goto done; 400 401 sp->type = SRB_LOGOUT_CMD; 402 sp->name = "logout"; 403 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 404 qla2x00_async_logout_sp_done), 405 406 ql_dbg(ql_dbg_disc, vha, 0x2070, 407 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n", 408 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 409 fcport->d_id.b.area, fcport->d_id.b.al_pa, 410 fcport->port_name, fcport->explicit_logout); 411 412 rval = qla2x00_start_sp(sp); 413 if (rval != QLA_SUCCESS) 414 goto done_free_sp; 415 return rval; 416 417 done_free_sp: 418 /* ref: INIT */ 419 kref_put(&sp->cmd_kref, qla2x00_sp_release); 420 done: 421 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 422 return rval; 423 } 424 425 void 426 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 427 uint16_t *data) 428 { 429 fcport->flags &= ~FCF_ASYNC_ACTIVE; 430 /* Don't re-login in target mode */ 431 if (!fcport->tgt_session) 432 qla2x00_mark_device_lost(vha, fcport, 1); 433 qlt_logo_completion_handler(fcport, data[0]); 434 } 435 436 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 437 { 438 struct srb_iocb *lio = &sp->u.iocb_cmd; 439 struct scsi_qla_host *vha = sp->vha; 440 441 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 442 if (!test_bit(UNLOADING, &vha->dpc_flags)) 443 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 444 lio->u.logio.data); 445 /* ref: INIT */ 446 kref_put(&sp->cmd_kref, qla2x00_sp_release); 447 } 448 449 int 450 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 451 { 452 srb_t *sp; 453 int rval; 454 455 rval = QLA_FUNCTION_FAILED; 456 /* ref: INIT */ 457 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 458 if (!sp) 459 goto done; 460 461 sp->type = SRB_PRLO_CMD; 462 sp->name = "prlo"; 463 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 464 qla2x00_async_prlo_sp_done); 465 466 ql_dbg(ql_dbg_disc, vha, 0x2070, 467 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 468 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 469 fcport->d_id.b.area, fcport->d_id.b.al_pa); 470 471 rval = qla2x00_start_sp(sp); 472 if (rval != QLA_SUCCESS) 473 goto done_free_sp; 474 475 return rval; 476 477 done_free_sp: 478 /* ref: INIT */ 479 kref_put(&sp->cmd_kref, qla2x00_sp_release); 480 done: 481 fcport->flags &= ~FCF_ASYNC_ACTIVE; 482 return rval; 483 } 484 485 static 486 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 487 { 488 struct fc_port *fcport = ea->fcport; 489 490 ql_dbg(ql_dbg_disc, vha, 0x20d2, 491 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 492 __func__, fcport->port_name, fcport->disc_state, 493 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 494 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 495 496 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 497 ea->data[0]); 498 499 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 500 ql_dbg(ql_dbg_disc, vha, 0x2066, 501 "%s %8phC: adisc fail: post delete\n", 502 __func__, ea->fcport->port_name); 503 /* deleted = 0 & logout_on_delete = force fw cleanup */ 504 fcport->deleted = 0; 505 fcport->logout_on_delete = 1; 506 qlt_schedule_sess_for_deletion(ea->fcport); 507 return; 508 } 509 510 if (ea->fcport->disc_state == DSC_DELETE_PEND) 511 return; 512 513 if (ea->sp->gen2 != ea->fcport->login_gen) { 514 /* target side must have changed it. */ 515 ql_dbg(ql_dbg_disc, vha, 0x20d3, 516 "%s %8phC generation changed\n", 517 __func__, ea->fcport->port_name); 518 return; 519 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 520 qla_rscn_replay(fcport); 521 qlt_schedule_sess_for_deletion(fcport); 522 return; 523 } 524 525 __qla24xx_handle_gpdb_event(vha, ea); 526 } 527 528 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 529 { 530 struct qla_work_evt *e; 531 532 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 533 if (!e) 534 return QLA_FUNCTION_FAILED; 535 536 e->u.fcport.fcport = fcport; 537 fcport->flags |= FCF_ASYNC_ACTIVE; 538 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 539 return qla2x00_post_work(vha, e); 540 } 541 542 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 543 { 544 struct scsi_qla_host *vha = sp->vha; 545 struct event_arg ea; 546 struct srb_iocb *lio = &sp->u.iocb_cmd; 547 548 ql_dbg(ql_dbg_disc, vha, 0x2066, 549 "Async done-%s res %x %8phC\n", 550 sp->name, res, sp->fcport->port_name); 551 552 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 553 554 memset(&ea, 0, sizeof(ea)); 555 ea.rc = res; 556 ea.data[0] = lio->u.logio.data[0]; 557 ea.data[1] = lio->u.logio.data[1]; 558 ea.iop[0] = lio->u.logio.iop[0]; 559 ea.iop[1] = lio->u.logio.iop[1]; 560 ea.fcport = sp->fcport; 561 ea.sp = sp; 562 if (res) 563 ea.data[0] = MBS_COMMAND_ERROR; 564 565 qla24xx_handle_adisc_event(vha, &ea); 566 /* ref: INIT */ 567 kref_put(&sp->cmd_kref, qla2x00_sp_release); 568 } 569 570 int 571 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 572 uint16_t *data) 573 { 574 srb_t *sp; 575 struct srb_iocb *lio; 576 int rval = QLA_FUNCTION_FAILED; 577 578 if (IS_SESSION_DELETED(fcport)) { 579 ql_log(ql_log_warn, vha, 0xffff, 580 "%s: %8phC is being delete - not sending command.\n", 581 __func__, fcport->port_name); 582 fcport->flags &= ~FCF_ASYNC_ACTIVE; 583 return rval; 584 } 585 586 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 587 return rval; 588 589 fcport->flags |= FCF_ASYNC_SENT; 590 /* ref: INIT */ 591 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 592 if (!sp) 593 goto done; 594 595 sp->type = SRB_ADISC_CMD; 596 sp->name = "adisc"; 597 sp->gen1 = fcport->rscn_gen; 598 sp->gen2 = fcport->login_gen; 599 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 600 qla2x00_async_adisc_sp_done); 601 602 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) { 603 lio = &sp->u.iocb_cmd; 604 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 605 } 606 607 ql_dbg(ql_dbg_disc, vha, 0x206f, 608 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 609 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 610 611 rval = qla2x00_start_sp(sp); 612 if (rval != QLA_SUCCESS) 613 goto done_free_sp; 614 615 return rval; 616 617 done_free_sp: 618 /* ref: INIT */ 619 kref_put(&sp->cmd_kref, qla2x00_sp_release); 620 done: 621 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 622 qla2x00_post_async_adisc_work(vha, fcport, data); 623 return rval; 624 } 625 626 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 627 { 628 struct qla_hw_data *ha = vha->hw; 629 630 if (IS_FWI2_CAPABLE(ha)) 631 return loop_id > NPH_LAST_HANDLE; 632 633 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 634 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 635 } 636 637 /** 638 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 639 * @vha: adapter state pointer. 640 * @dev: port structure pointer. 641 * 642 * Returns: 643 * qla2x00 local function return status code. 644 * 645 * Context: 646 * Kernel context. 647 */ 648 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 649 { 650 int rval; 651 struct qla_hw_data *ha = vha->hw; 652 unsigned long flags = 0; 653 654 rval = QLA_SUCCESS; 655 656 spin_lock_irqsave(&ha->vport_slock, flags); 657 658 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 659 if (dev->loop_id >= LOOPID_MAP_SIZE || 660 qla2x00_is_reserved_id(vha, dev->loop_id)) { 661 dev->loop_id = FC_NO_LOOP_ID; 662 rval = QLA_FUNCTION_FAILED; 663 } else { 664 set_bit(dev->loop_id, ha->loop_id_map); 665 } 666 spin_unlock_irqrestore(&ha->vport_slock, flags); 667 668 if (rval == QLA_SUCCESS) 669 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 670 "Assigning new loopid=%x, portid=%x.\n", 671 dev->loop_id, dev->d_id.b24); 672 else 673 ql_log(ql_log_warn, dev->vha, 0x2087, 674 "No loop_id's available, portid=%x.\n", 675 dev->d_id.b24); 676 677 return rval; 678 } 679 680 void qla2x00_clear_loop_id(fc_port_t *fcport) 681 { 682 struct qla_hw_data *ha = fcport->vha->hw; 683 684 if (fcport->loop_id == FC_NO_LOOP_ID || 685 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 686 return; 687 688 clear_bit(fcport->loop_id, ha->loop_id_map); 689 fcport->loop_id = FC_NO_LOOP_ID; 690 } 691 692 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 693 struct event_arg *ea) 694 { 695 fc_port_t *fcport, *conflict_fcport; 696 struct get_name_list_extended *e; 697 u16 i, n, found = 0, loop_id; 698 port_id_t id; 699 u64 wwn; 700 u16 data[2]; 701 u8 current_login_state, nvme_cls; 702 703 fcport = ea->fcport; 704 ql_dbg(ql_dbg_disc, vha, 0xffff, 705 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n", 706 __func__, fcport->port_name, fcport->disc_state, 707 fcport->fw_login_state, ea->rc, 708 fcport->login_gen, fcport->last_login_gen, 709 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable); 710 711 if (fcport->disc_state == DSC_DELETE_PEND) 712 return; 713 714 if (ea->rc) { /* rval */ 715 if (fcport->login_retry == 0) { 716 ql_dbg(ql_dbg_disc, vha, 0x20de, 717 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 718 fcport->port_name, fcport->login_retry); 719 } 720 return; 721 } 722 723 if (fcport->last_rscn_gen != fcport->rscn_gen) { 724 qla_rscn_replay(fcport); 725 qlt_schedule_sess_for_deletion(fcport); 726 return; 727 } else if (fcport->last_login_gen != fcport->login_gen) { 728 ql_dbg(ql_dbg_disc, vha, 0x20e0, 729 "%s %8phC login gen changed\n", 730 __func__, fcport->port_name); 731 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 732 return; 733 } 734 735 n = ea->data[0] / sizeof(struct get_name_list_extended); 736 737 ql_dbg(ql_dbg_disc, vha, 0x20e1, 738 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 739 __func__, __LINE__, fcport->port_name, n, 740 fcport->d_id.b.domain, fcport->d_id.b.area, 741 fcport->d_id.b.al_pa, fcport->loop_id); 742 743 for (i = 0; i < n; i++) { 744 e = &vha->gnl.l[i]; 745 wwn = wwn_to_u64(e->port_name); 746 id.b.domain = e->port_id[2]; 747 id.b.area = e->port_id[1]; 748 id.b.al_pa = e->port_id[0]; 749 id.b.rsvd_1 = 0; 750 751 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 752 continue; 753 754 if (IS_SW_RESV_ADDR(id)) 755 continue; 756 757 found = 1; 758 759 loop_id = le16_to_cpu(e->nport_handle); 760 loop_id = (loop_id & 0x7fff); 761 nvme_cls = e->current_login_state >> 4; 762 current_login_state = e->current_login_state & 0xf; 763 764 if (PRLI_PHASE(nvme_cls)) { 765 current_login_state = nvme_cls; 766 fcport->fc4_type &= ~FS_FC4TYPE_FCP; 767 fcport->fc4_type |= FS_FC4TYPE_NVME; 768 } else if (PRLI_PHASE(current_login_state)) { 769 fcport->fc4_type |= FS_FC4TYPE_FCP; 770 fcport->fc4_type &= ~FS_FC4TYPE_NVME; 771 } 772 773 ql_dbg(ql_dbg_disc, vha, 0x20e2, 774 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 775 __func__, fcport->port_name, 776 e->current_login_state, fcport->fw_login_state, 777 fcport->fc4_type, id.b24, fcport->d_id.b24, 778 loop_id, fcport->loop_id); 779 780 switch (fcport->disc_state) { 781 case DSC_DELETE_PEND: 782 case DSC_DELETED: 783 break; 784 default: 785 if ((id.b24 != fcport->d_id.b24 && 786 fcport->d_id.b24 && 787 fcport->loop_id != FC_NO_LOOP_ID) || 788 (fcport->loop_id != FC_NO_LOOP_ID && 789 fcport->loop_id != loop_id)) { 790 ql_dbg(ql_dbg_disc, vha, 0x20e3, 791 "%s %d %8phC post del sess\n", 792 __func__, __LINE__, fcport->port_name); 793 if (fcport->n2n_flag) 794 fcport->d_id.b24 = 0; 795 qlt_schedule_sess_for_deletion(fcport); 796 return; 797 } 798 break; 799 } 800 801 fcport->loop_id = loop_id; 802 if (fcport->n2n_flag) 803 fcport->d_id.b24 = id.b24; 804 805 wwn = wwn_to_u64(fcport->port_name); 806 qlt_find_sess_invalidate_other(vha, wwn, 807 id, loop_id, &conflict_fcport); 808 809 if (conflict_fcport) { 810 /* 811 * Another share fcport share the same loop_id & 812 * nport id. Conflict fcport needs to finish 813 * cleanup before this fcport can proceed to login. 814 */ 815 conflict_fcport->conflict = fcport; 816 fcport->login_pause = 1; 817 } 818 819 switch (vha->hw->current_topology) { 820 default: 821 switch (current_login_state) { 822 case DSC_LS_PRLI_COMP: 823 ql_dbg(ql_dbg_disc, 824 vha, 0x20e4, "%s %d %8phC post gpdb\n", 825 __func__, __LINE__, fcport->port_name); 826 827 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 828 fcport->port_type = FCT_INITIATOR; 829 else 830 fcport->port_type = FCT_TARGET; 831 data[0] = data[1] = 0; 832 qla2x00_post_async_adisc_work(vha, fcport, 833 data); 834 break; 835 case DSC_LS_PLOGI_COMP: 836 if (vha->hw->flags.edif_enabled) { 837 /* check to see if App support Secure */ 838 qla24xx_post_gpdb_work(vha, fcport, 0); 839 break; 840 } 841 fallthrough; 842 case DSC_LS_PORT_UNAVAIL: 843 default: 844 if (fcport->loop_id == FC_NO_LOOP_ID) { 845 qla2x00_find_new_loop_id(vha, fcport); 846 fcport->fw_login_state = 847 DSC_LS_PORT_UNAVAIL; 848 } 849 ql_dbg(ql_dbg_disc, vha, 0x20e5, 850 "%s %d %8phC\n", __func__, __LINE__, 851 fcport->port_name); 852 qla24xx_fcport_handle_login(vha, fcport); 853 break; 854 } 855 break; 856 case ISP_CFG_N: 857 fcport->fw_login_state = current_login_state; 858 fcport->d_id = id; 859 switch (current_login_state) { 860 case DSC_LS_PRLI_PEND: 861 /* 862 * In the middle of PRLI. Let it finish. 863 * Allow relogin code to recheck state again 864 * with GNL. Push disc_state back to DELETED 865 * so GNL can go out again 866 */ 867 qla2x00_set_fcport_disc_state(fcport, 868 DSC_DELETED); 869 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 870 break; 871 case DSC_LS_PRLI_COMP: 872 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 873 fcport->port_type = FCT_INITIATOR; 874 else 875 fcport->port_type = FCT_TARGET; 876 877 data[0] = data[1] = 0; 878 qla2x00_post_async_adisc_work(vha, fcport, 879 data); 880 break; 881 case DSC_LS_PLOGI_COMP: 882 if (vha->hw->flags.edif_enabled && 883 DBELL_ACTIVE(vha)) { 884 /* check to see if App support secure or not */ 885 qla24xx_post_gpdb_work(vha, fcport, 0); 886 break; 887 } 888 if (fcport_is_bigger(fcport)) { 889 /* local adapter is smaller */ 890 if (fcport->loop_id != FC_NO_LOOP_ID) 891 qla2x00_clear_loop_id(fcport); 892 893 fcport->loop_id = loop_id; 894 qla24xx_fcport_handle_login(vha, 895 fcport); 896 break; 897 } 898 fallthrough; 899 default: 900 if (fcport_is_smaller(fcport)) { 901 /* local adapter is bigger */ 902 if (fcport->loop_id != FC_NO_LOOP_ID) 903 qla2x00_clear_loop_id(fcport); 904 905 fcport->loop_id = loop_id; 906 qla24xx_fcport_handle_login(vha, 907 fcport); 908 } 909 break; 910 } 911 break; 912 } /* switch (ha->current_topology) */ 913 } 914 915 if (!found) { 916 switch (vha->hw->current_topology) { 917 case ISP_CFG_F: 918 case ISP_CFG_FL: 919 for (i = 0; i < n; i++) { 920 e = &vha->gnl.l[i]; 921 id.b.domain = e->port_id[0]; 922 id.b.area = e->port_id[1]; 923 id.b.al_pa = e->port_id[2]; 924 id.b.rsvd_1 = 0; 925 loop_id = le16_to_cpu(e->nport_handle); 926 927 if (fcport->d_id.b24 == id.b24) { 928 conflict_fcport = 929 qla2x00_find_fcport_by_wwpn(vha, 930 e->port_name, 0); 931 if (conflict_fcport) { 932 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 933 vha, 0x20e5, 934 "%s %d %8phC post del sess\n", 935 __func__, __LINE__, 936 conflict_fcport->port_name); 937 qlt_schedule_sess_for_deletion 938 (conflict_fcport); 939 } 940 } 941 /* 942 * FW already picked this loop id for 943 * another fcport 944 */ 945 if (fcport->loop_id == loop_id) 946 fcport->loop_id = FC_NO_LOOP_ID; 947 } 948 qla24xx_fcport_handle_login(vha, fcport); 949 break; 950 case ISP_CFG_N: 951 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 952 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 953 if (fcport->n2n_link_reset_cnt < 2) { 954 fcport->n2n_link_reset_cnt++; 955 /* 956 * remote port is not sending PLOGI. 957 * Reset link to kick start his state 958 * machine 959 */ 960 set_bit(N2N_LINK_RESET, 961 &vha->dpc_flags); 962 } else { 963 if (fcport->n2n_chip_reset < 1) { 964 ql_log(ql_log_info, vha, 0x705d, 965 "Chip reset to bring laser down"); 966 set_bit(ISP_ABORT_NEEDED, 967 &vha->dpc_flags); 968 fcport->n2n_chip_reset++; 969 } else { 970 ql_log(ql_log_info, vha, 0x705d, 971 "Remote port %8ph is not coming back\n", 972 fcport->port_name); 973 fcport->scan_state = 0; 974 } 975 } 976 qla2xxx_wake_dpc(vha); 977 } else { 978 /* 979 * report port suppose to do PLOGI. Give him 980 * more time. FW will catch it. 981 */ 982 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 983 } 984 break; 985 case ISP_CFG_NL: 986 qla24xx_fcport_handle_login(vha, fcport); 987 break; 988 default: 989 break; 990 } 991 } 992 } /* gnl_event */ 993 994 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 995 { 996 struct scsi_qla_host *vha = sp->vha; 997 unsigned long flags; 998 struct fc_port *fcport = NULL, *tf; 999 u16 i, n = 0, loop_id; 1000 struct event_arg ea; 1001 struct get_name_list_extended *e; 1002 u64 wwn; 1003 struct list_head h; 1004 bool found = false; 1005 1006 ql_dbg(ql_dbg_disc, vha, 0x20e7, 1007 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 1008 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 1009 sp->u.iocb_cmd.u.mbx.in_mb[2]); 1010 1011 1012 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 1013 memset(&ea, 0, sizeof(ea)); 1014 ea.sp = sp; 1015 ea.rc = res; 1016 1017 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 1018 sizeof(struct get_name_list_extended)) { 1019 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 1020 sizeof(struct get_name_list_extended); 1021 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 1022 } 1023 1024 for (i = 0; i < n; i++) { 1025 e = &vha->gnl.l[i]; 1026 loop_id = le16_to_cpu(e->nport_handle); 1027 /* mask out reserve bit */ 1028 loop_id = (loop_id & 0x7fff); 1029 set_bit(loop_id, vha->hw->loop_id_map); 1030 wwn = wwn_to_u64(e->port_name); 1031 1032 ql_dbg(ql_dbg_disc, vha, 0x20e8, 1033 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 1034 __func__, &wwn, e->port_id[2], e->port_id[1], 1035 e->port_id[0], e->current_login_state, e->last_login_state, 1036 (loop_id & 0x7fff)); 1037 } 1038 1039 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1040 1041 INIT_LIST_HEAD(&h); 1042 fcport = tf = NULL; 1043 if (!list_empty(&vha->gnl.fcports)) 1044 list_splice_init(&vha->gnl.fcports, &h); 1045 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1046 1047 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1048 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1049 list_del_init(&fcport->gnl_entry); 1050 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1051 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1052 ea.fcport = fcport; 1053 1054 qla24xx_handle_gnl_done_event(vha, &ea); 1055 } 1056 1057 /* create new fcport if fw has knowledge of new sessions */ 1058 for (i = 0; i < n; i++) { 1059 port_id_t id; 1060 u64 wwnn; 1061 1062 e = &vha->gnl.l[i]; 1063 wwn = wwn_to_u64(e->port_name); 1064 1065 found = false; 1066 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1067 if (!memcmp((u8 *)&wwn, fcport->port_name, 1068 WWN_SIZE)) { 1069 found = true; 1070 break; 1071 } 1072 } 1073 1074 id.b.domain = e->port_id[2]; 1075 id.b.area = e->port_id[1]; 1076 id.b.al_pa = e->port_id[0]; 1077 id.b.rsvd_1 = 0; 1078 1079 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1080 ql_dbg(ql_dbg_disc, vha, 0x2065, 1081 "%s %d %8phC %06x post new sess\n", 1082 __func__, __LINE__, (u8 *)&wwn, id.b24); 1083 wwnn = wwn_to_u64(e->node_name); 1084 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1085 (u8 *)&wwnn, NULL, 0); 1086 } 1087 } 1088 1089 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1090 vha->gnl.sent = 0; 1091 if (!list_empty(&vha->gnl.fcports)) { 1092 /* retrigger gnl */ 1093 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports, 1094 gnl_entry) { 1095 list_del_init(&fcport->gnl_entry); 1096 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1097 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS) 1098 break; 1099 } 1100 } 1101 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1102 1103 /* ref: INIT */ 1104 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1105 } 1106 1107 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1108 { 1109 srb_t *sp; 1110 int rval = QLA_FUNCTION_FAILED; 1111 unsigned long flags; 1112 u16 *mb; 1113 1114 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1115 return rval; 1116 1117 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1118 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1119 1120 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1121 fcport->flags |= FCF_ASYNC_SENT; 1122 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1123 fcport->last_rscn_gen = fcport->rscn_gen; 1124 fcport->last_login_gen = fcport->login_gen; 1125 1126 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1127 if (vha->gnl.sent) { 1128 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1129 return QLA_SUCCESS; 1130 } 1131 vha->gnl.sent = 1; 1132 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1133 1134 /* ref: INIT */ 1135 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1136 if (!sp) 1137 goto done; 1138 1139 sp->type = SRB_MB_IOCB; 1140 sp->name = "gnlist"; 1141 sp->gen1 = fcport->rscn_gen; 1142 sp->gen2 = fcport->login_gen; 1143 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1144 qla24xx_async_gnl_sp_done); 1145 1146 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1147 mb[0] = MBC_PORT_NODE_NAME_LIST; 1148 mb[1] = BIT_2 | BIT_3; 1149 mb[2] = MSW(vha->gnl.ldma); 1150 mb[3] = LSW(vha->gnl.ldma); 1151 mb[6] = MSW(MSD(vha->gnl.ldma)); 1152 mb[7] = LSW(MSD(vha->gnl.ldma)); 1153 mb[8] = vha->gnl.size; 1154 mb[9] = vha->vp_idx; 1155 1156 ql_dbg(ql_dbg_disc, vha, 0x20da, 1157 "Async-%s - OUT WWPN %8phC hndl %x\n", 1158 sp->name, fcport->port_name, sp->handle); 1159 1160 rval = qla2x00_start_sp(sp); 1161 if (rval != QLA_SUCCESS) 1162 goto done_free_sp; 1163 1164 return rval; 1165 1166 done_free_sp: 1167 /* ref: INIT */ 1168 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1169 done: 1170 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT); 1171 return rval; 1172 } 1173 1174 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1175 { 1176 struct qla_work_evt *e; 1177 1178 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1179 if (!e) 1180 return QLA_FUNCTION_FAILED; 1181 1182 e->u.fcport.fcport = fcport; 1183 fcport->flags |= FCF_ASYNC_ACTIVE; 1184 return qla2x00_post_work(vha, e); 1185 } 1186 1187 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1188 { 1189 struct scsi_qla_host *vha = sp->vha; 1190 struct qla_hw_data *ha = vha->hw; 1191 fc_port_t *fcport = sp->fcport; 1192 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1193 struct event_arg ea; 1194 1195 ql_dbg(ql_dbg_disc, vha, 0x20db, 1196 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1197 sp->name, res, fcport->port_name, mb[1], mb[2]); 1198 1199 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1200 1201 if (res == QLA_FUNCTION_TIMEOUT) 1202 goto done; 1203 1204 memset(&ea, 0, sizeof(ea)); 1205 ea.fcport = fcport; 1206 ea.sp = sp; 1207 1208 qla24xx_handle_gpdb_event(vha, &ea); 1209 1210 done: 1211 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1212 sp->u.iocb_cmd.u.mbx.in_dma); 1213 1214 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1215 } 1216 1217 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1218 { 1219 struct qla_work_evt *e; 1220 1221 if (vha->host->active_mode == MODE_TARGET) 1222 return QLA_FUNCTION_FAILED; 1223 1224 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1225 if (!e) 1226 return QLA_FUNCTION_FAILED; 1227 1228 e->u.fcport.fcport = fcport; 1229 1230 return qla2x00_post_work(vha, e); 1231 } 1232 1233 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1234 { 1235 struct scsi_qla_host *vha = sp->vha; 1236 struct srb_iocb *lio = &sp->u.iocb_cmd; 1237 struct event_arg ea; 1238 1239 ql_dbg(ql_dbg_disc, vha, 0x2129, 1240 "%s %8phC res %x\n", __func__, 1241 sp->fcport->port_name, res); 1242 1243 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1244 1245 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1246 memset(&ea, 0, sizeof(ea)); 1247 ea.fcport = sp->fcport; 1248 ea.data[0] = lio->u.logio.data[0]; 1249 ea.data[1] = lio->u.logio.data[1]; 1250 ea.iop[0] = lio->u.logio.iop[0]; 1251 ea.iop[1] = lio->u.logio.iop[1]; 1252 ea.sp = sp; 1253 if (res == QLA_OS_TIMER_EXPIRED) 1254 ea.data[0] = QLA_OS_TIMER_EXPIRED; 1255 else if (res) 1256 ea.data[0] = MBS_COMMAND_ERROR; 1257 1258 qla24xx_handle_prli_done_event(vha, &ea); 1259 } 1260 1261 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1262 } 1263 1264 int 1265 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1266 { 1267 srb_t *sp; 1268 struct srb_iocb *lio; 1269 int rval = QLA_FUNCTION_FAILED; 1270 1271 if (!vha->flags.online) { 1272 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1273 __func__, __LINE__, fcport->port_name); 1274 return rval; 1275 } 1276 1277 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1278 fcport->fw_login_state == DSC_LS_PRLI_PEND) && 1279 qla_dual_mode_enabled(vha)) { 1280 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1281 __func__, __LINE__, fcport->port_name); 1282 return rval; 1283 } 1284 1285 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1286 if (!sp) 1287 return rval; 1288 1289 fcport->flags |= FCF_ASYNC_SENT; 1290 fcport->logout_completed = 0; 1291 1292 sp->type = SRB_PRLI_CMD; 1293 sp->name = "prli"; 1294 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1295 qla2x00_async_prli_sp_done); 1296 1297 lio = &sp->u.iocb_cmd; 1298 lio->u.logio.flags = 0; 1299 1300 if (NVME_TARGET(vha->hw, fcport)) 1301 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1302 1303 ql_dbg(ql_dbg_disc, vha, 0x211b, 1304 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n", 1305 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1306 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority, 1307 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp"); 1308 1309 rval = qla2x00_start_sp(sp); 1310 if (rval != QLA_SUCCESS) { 1311 fcport->flags |= FCF_LOGIN_NEEDED; 1312 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1313 goto done_free_sp; 1314 } 1315 1316 return rval; 1317 1318 done_free_sp: 1319 /* ref: INIT */ 1320 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1321 fcport->flags &= ~FCF_ASYNC_SENT; 1322 return rval; 1323 } 1324 1325 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1326 { 1327 struct qla_work_evt *e; 1328 1329 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1330 if (!e) 1331 return QLA_FUNCTION_FAILED; 1332 1333 e->u.fcport.fcport = fcport; 1334 e->u.fcport.opt = opt; 1335 fcport->flags |= FCF_ASYNC_ACTIVE; 1336 return qla2x00_post_work(vha, e); 1337 } 1338 1339 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1340 { 1341 srb_t *sp; 1342 struct srb_iocb *mbx; 1343 int rval = QLA_FUNCTION_FAILED; 1344 u16 *mb; 1345 dma_addr_t pd_dma; 1346 struct port_database_24xx *pd; 1347 struct qla_hw_data *ha = vha->hw; 1348 1349 if (IS_SESSION_DELETED(fcport)) { 1350 ql_log(ql_log_warn, vha, 0xffff, 1351 "%s: %8phC is being delete - not sending command.\n", 1352 __func__, fcport->port_name); 1353 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1354 return rval; 1355 } 1356 1357 if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) { 1358 ql_log(ql_log_warn, vha, 0xffff, 1359 "%s: %8phC online %d flags %x - not sending command.\n", 1360 __func__, fcport->port_name, vha->flags.online, fcport->flags); 1361 goto done; 1362 } 1363 1364 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1365 if (!sp) 1366 goto done; 1367 1368 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB); 1369 1370 fcport->flags |= FCF_ASYNC_SENT; 1371 sp->type = SRB_MB_IOCB; 1372 sp->name = "gpdb"; 1373 sp->gen1 = fcport->rscn_gen; 1374 sp->gen2 = fcport->login_gen; 1375 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2, 1376 qla24xx_async_gpdb_sp_done); 1377 1378 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1379 if (pd == NULL) { 1380 ql_log(ql_log_warn, vha, 0xd043, 1381 "Failed to allocate port database structure.\n"); 1382 goto done_free_sp; 1383 } 1384 1385 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1386 mb[0] = MBC_GET_PORT_DATABASE; 1387 mb[1] = fcport->loop_id; 1388 mb[2] = MSW(pd_dma); 1389 mb[3] = LSW(pd_dma); 1390 mb[6] = MSW(MSD(pd_dma)); 1391 mb[7] = LSW(MSD(pd_dma)); 1392 mb[9] = vha->vp_idx; 1393 mb[10] = opt; 1394 1395 mbx = &sp->u.iocb_cmd; 1396 mbx->u.mbx.in = (void *)pd; 1397 mbx->u.mbx.in_dma = pd_dma; 1398 1399 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1400 "Async-%s %8phC hndl %x opt %x\n", 1401 sp->name, fcport->port_name, sp->handle, opt); 1402 1403 rval = qla2x00_start_sp(sp); 1404 if (rval != QLA_SUCCESS) 1405 goto done_free_sp; 1406 return rval; 1407 1408 done_free_sp: 1409 if (pd) 1410 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1411 1412 kref_put(&sp->cmd_kref, qla2x00_sp_release); 1413 fcport->flags &= ~FCF_ASYNC_SENT; 1414 done: 1415 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1416 qla24xx_post_gpdb_work(vha, fcport, opt); 1417 return rval; 1418 } 1419 1420 static 1421 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1422 { 1423 unsigned long flags; 1424 1425 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1426 ea->fcport->login_gen++; 1427 ea->fcport->deleted = 0; 1428 ea->fcport->logout_on_delete = 1; 1429 1430 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1431 vha->fcport_count++; 1432 ea->fcport->login_succ = 1; 1433 1434 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1435 qla24xx_sched_upd_fcport(ea->fcport); 1436 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1437 } else if (ea->fcport->login_succ) { 1438 /* 1439 * We have an existing session. A late RSCN delivery 1440 * must have triggered the session to be re-validate. 1441 * Session is still valid. 1442 */ 1443 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1444 "%s %d %8phC session revalidate success\n", 1445 __func__, __LINE__, ea->fcport->port_name); 1446 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE); 1447 } 1448 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1449 } 1450 1451 static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport, 1452 struct port_database_24xx *pd) 1453 { 1454 int rc = 0; 1455 1456 if (pd->secure_login) { 1457 ql_dbg(ql_dbg_disc, vha, 0x104d, 1458 "Secure Login established on %8phC\n", 1459 fcport->port_name); 1460 fcport->flags |= FCF_FCSP_DEVICE; 1461 } else { 1462 ql_dbg(ql_dbg_disc, vha, 0x104d, 1463 "non-Secure Login %8phC", 1464 fcport->port_name); 1465 fcport->flags &= ~FCF_FCSP_DEVICE; 1466 } 1467 if (vha->hw->flags.edif_enabled) { 1468 if (fcport->flags & FCF_FCSP_DEVICE) { 1469 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND); 1470 /* Start edif prli timer & ring doorbell for app */ 1471 fcport->edif.rx_sa_set = 0; 1472 fcport->edif.tx_sa_set = 0; 1473 fcport->edif.rx_sa_pending = 0; 1474 fcport->edif.tx_sa_pending = 0; 1475 1476 qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE, 1477 fcport->d_id.b24); 1478 1479 if (DBELL_ACTIVE(vha)) { 1480 ql_dbg(ql_dbg_disc, vha, 0x20ef, 1481 "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n", 1482 __func__, __LINE__, fcport->port_name); 1483 fcport->edif.app_started = 1; 1484 fcport->edif.app_sess_online = 1; 1485 1486 qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED, 1487 fcport->d_id.b24, 0, fcport); 1488 } 1489 1490 rc = 1; 1491 } else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 1492 ql_dbg(ql_dbg_disc, vha, 0x2117, 1493 "%s %d %8phC post prli\n", 1494 __func__, __LINE__, fcport->port_name); 1495 qla24xx_post_prli_work(vha, fcport); 1496 rc = 1; 1497 } 1498 } 1499 return rc; 1500 } 1501 1502 static 1503 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1504 { 1505 fc_port_t *fcport = ea->fcport; 1506 struct port_database_24xx *pd; 1507 struct srb *sp = ea->sp; 1508 uint8_t ls; 1509 1510 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1511 1512 fcport->flags &= ~FCF_ASYNC_SENT; 1513 1514 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1515 "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__, 1516 fcport->port_name, fcport->disc_state, pd->current_login_state, 1517 fcport->fc4_type, ea->rc); 1518 1519 if (fcport->disc_state == DSC_DELETE_PEND) { 1520 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n", 1521 __func__, __LINE__, fcport->port_name); 1522 return; 1523 } 1524 1525 if (NVME_TARGET(vha->hw, fcport)) 1526 ls = pd->current_login_state >> 4; 1527 else 1528 ls = pd->current_login_state & 0xf; 1529 1530 if (ea->sp->gen2 != fcport->login_gen) { 1531 /* target side must have changed it. */ 1532 1533 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1534 "%s %8phC generation changed\n", 1535 __func__, fcport->port_name); 1536 return; 1537 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1538 qla_rscn_replay(fcport); 1539 qlt_schedule_sess_for_deletion(fcport); 1540 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1541 __func__, __LINE__, fcport->port_name, ls); 1542 return; 1543 } 1544 1545 switch (ls) { 1546 case PDS_PRLI_COMPLETE: 1547 __qla24xx_parse_gpdb(vha, fcport, pd); 1548 break; 1549 case PDS_PLOGI_COMPLETE: 1550 if (qla_chk_secure_login(vha, fcport, pd)) { 1551 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1552 __func__, __LINE__, fcport->port_name, ls); 1553 return; 1554 } 1555 fallthrough; 1556 case PDS_PLOGI_PENDING: 1557 case PDS_PRLI_PENDING: 1558 case PDS_PRLI2_PENDING: 1559 /* Set discovery state back to GNL to Relogin attempt */ 1560 if (qla_dual_mode_enabled(vha) || 1561 qla_ini_mode_enabled(vha)) { 1562 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1563 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1564 } 1565 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n", 1566 __func__, __LINE__, fcport->port_name, ls); 1567 return; 1568 case PDS_LOGO_PENDING: 1569 case PDS_PORT_UNAVAILABLE: 1570 default: 1571 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1572 __func__, __LINE__, fcport->port_name); 1573 qlt_schedule_sess_for_deletion(fcport); 1574 return; 1575 } 1576 __qla24xx_handle_gpdb_event(vha, ea); 1577 } /* gpdb event */ 1578 1579 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1580 { 1581 u8 login = 0; 1582 int rc; 1583 1584 ql_dbg(ql_dbg_disc, vha, 0x307b, 1585 "%s %8phC DS %d LS %d lid %d retries=%d\n", 1586 __func__, fcport->port_name, fcport->disc_state, 1587 fcport->fw_login_state, fcport->loop_id, fcport->login_retry); 1588 1589 if (qla_tgt_mode_enabled(vha)) 1590 return; 1591 1592 if (qla_dual_mode_enabled(vha)) { 1593 if (N2N_TOPO(vha->hw)) { 1594 u64 mywwn, wwn; 1595 1596 mywwn = wwn_to_u64(vha->port_name); 1597 wwn = wwn_to_u64(fcport->port_name); 1598 if (mywwn > wwn) 1599 login = 1; 1600 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1601 && time_after_eq(jiffies, 1602 fcport->plogi_nack_done_deadline)) 1603 login = 1; 1604 } else { 1605 login = 1; 1606 } 1607 } else { 1608 /* initiator mode */ 1609 login = 1; 1610 } 1611 1612 if (login && fcport->login_retry) { 1613 fcport->login_retry--; 1614 if (fcport->loop_id == FC_NO_LOOP_ID) { 1615 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1616 rc = qla2x00_find_new_loop_id(vha, fcport); 1617 if (rc) { 1618 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1619 "%s %d %8phC post del sess - out of loopid\n", 1620 __func__, __LINE__, fcport->port_name); 1621 fcport->scan_state = 0; 1622 qlt_schedule_sess_for_deletion(fcport); 1623 return; 1624 } 1625 } 1626 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1627 "%s %d %8phC post login\n", 1628 __func__, __LINE__, fcport->port_name); 1629 qla2x00_post_async_login_work(vha, fcport, NULL); 1630 } 1631 } 1632 1633 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1634 { 1635 u16 data[2]; 1636 u64 wwn; 1637 u16 sec; 1638 1639 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1640 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n", 1641 __func__, fcport->port_name, fcport->disc_state, 1642 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1643 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1644 fcport->login_gen, fcport->loop_id, fcport->scan_state, 1645 fcport->fc4_type); 1646 1647 if (fcport->scan_state != QLA_FCPORT_FOUND || 1648 fcport->disc_state == DSC_DELETE_PEND) 1649 return 0; 1650 1651 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1652 qla_dual_mode_enabled(vha) && 1653 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1654 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1655 return 0; 1656 1657 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1658 !N2N_TOPO(vha->hw)) { 1659 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1660 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1661 return 0; 1662 } 1663 } 1664 1665 /* Target won't initiate port login if fabric is present */ 1666 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1667 return 0; 1668 1669 if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) { 1670 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1671 return 0; 1672 } 1673 1674 switch (fcport->disc_state) { 1675 case DSC_DELETED: 1676 wwn = wwn_to_u64(fcport->node_name); 1677 switch (vha->hw->current_topology) { 1678 case ISP_CFG_N: 1679 if (fcport_is_smaller(fcport)) { 1680 /* this adapter is bigger */ 1681 if (fcport->login_retry) { 1682 if (fcport->loop_id == FC_NO_LOOP_ID) { 1683 qla2x00_find_new_loop_id(vha, 1684 fcport); 1685 fcport->fw_login_state = 1686 DSC_LS_PORT_UNAVAIL; 1687 } 1688 fcport->login_retry--; 1689 qla_post_els_plogi_work(vha, fcport); 1690 } else { 1691 ql_log(ql_log_info, vha, 0x705d, 1692 "Unable to reach remote port %8phC", 1693 fcport->port_name); 1694 } 1695 } else { 1696 qla24xx_post_gnl_work(vha, fcport); 1697 } 1698 break; 1699 default: 1700 if (wwn == 0) { 1701 ql_dbg(ql_dbg_disc, vha, 0xffff, 1702 "%s %d %8phC post GNNID\n", 1703 __func__, __LINE__, fcport->port_name); 1704 qla24xx_post_gnnid_work(vha, fcport); 1705 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1706 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1707 "%s %d %8phC post gnl\n", 1708 __func__, __LINE__, fcport->port_name); 1709 qla24xx_post_gnl_work(vha, fcport); 1710 } else { 1711 qla_chk_n2n_b4_login(vha, fcport); 1712 } 1713 break; 1714 } 1715 break; 1716 1717 case DSC_GNL: 1718 switch (vha->hw->current_topology) { 1719 case ISP_CFG_N: 1720 if ((fcport->current_login_state & 0xf) == 0x6) { 1721 ql_dbg(ql_dbg_disc, vha, 0x2118, 1722 "%s %d %8phC post GPDB work\n", 1723 __func__, __LINE__, fcport->port_name); 1724 fcport->chip_reset = 1725 vha->hw->base_qpair->chip_reset; 1726 qla24xx_post_gpdb_work(vha, fcport, 0); 1727 } else { 1728 ql_dbg(ql_dbg_disc, vha, 0x2118, 1729 "%s %d %8phC post %s PRLI\n", 1730 __func__, __LINE__, fcport->port_name, 1731 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1732 "FC"); 1733 qla24xx_post_prli_work(vha, fcport); 1734 } 1735 break; 1736 default: 1737 if (fcport->login_pause) { 1738 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1739 "%s %d %8phC exit\n", 1740 __func__, __LINE__, 1741 fcport->port_name); 1742 fcport->last_rscn_gen = fcport->rscn_gen; 1743 fcport->last_login_gen = fcport->login_gen; 1744 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1745 break; 1746 } 1747 qla_chk_n2n_b4_login(vha, fcport); 1748 break; 1749 } 1750 break; 1751 1752 case DSC_LOGIN_FAILED: 1753 if (N2N_TOPO(vha->hw)) 1754 qla_chk_n2n_b4_login(vha, fcport); 1755 else 1756 qlt_schedule_sess_for_deletion(fcport); 1757 break; 1758 1759 case DSC_LOGIN_COMPLETE: 1760 /* recheck login state */ 1761 data[0] = data[1] = 0; 1762 qla2x00_post_async_adisc_work(vha, fcport, data); 1763 break; 1764 1765 case DSC_LOGIN_PEND: 1766 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1767 qla24xx_post_prli_work(vha, fcport); 1768 break; 1769 1770 case DSC_UPD_FCPORT: 1771 sec = jiffies_to_msecs(jiffies - 1772 fcport->jiffies_at_registration)/1000; 1773 if (fcport->sec_since_registration < sec && sec && 1774 !(sec % 60)) { 1775 fcport->sec_since_registration = sec; 1776 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1777 "%s %8phC - Slow Rport registration(%d Sec)\n", 1778 __func__, fcport->port_name, sec); 1779 } 1780 1781 if (fcport->next_disc_state != DSC_DELETE_PEND) 1782 fcport->next_disc_state = DSC_ADISC; 1783 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1784 break; 1785 1786 default: 1787 break; 1788 } 1789 1790 return 0; 1791 } 1792 1793 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1794 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1795 { 1796 struct qla_work_evt *e; 1797 1798 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1799 if (!e) 1800 return QLA_FUNCTION_FAILED; 1801 1802 e->u.new_sess.id = *id; 1803 e->u.new_sess.pla = pla; 1804 e->u.new_sess.fc4_type = fc4_type; 1805 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1806 if (node_name) 1807 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1808 1809 return qla2x00_post_work(vha, e); 1810 } 1811 1812 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1813 { 1814 fc_port_t *fcport; 1815 unsigned long flags; 1816 1817 switch (ea->id.b.rsvd_1) { 1818 case RSCN_PORT_ADDR: 1819 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1820 if (fcport) { 1821 if (fcport->flags & FCF_FCP2_DEVICE) { 1822 ql_dbg(ql_dbg_disc, vha, 0x2115, 1823 "Delaying session delete for FCP2 portid=%06x %8phC ", 1824 fcport->d_id.b24, fcport->port_name); 1825 return; 1826 } 1827 1828 if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) { 1829 /* 1830 * On ipsec start by remote port, Target port 1831 * may use RSCN to trigger initiator to 1832 * relogin. If driver is already in the 1833 * process of a relogin, then ignore the RSCN 1834 * and allow the current relogin to continue. 1835 * This reduces thrashing of the connection. 1836 */ 1837 if (atomic_read(&fcport->state) == FCS_ONLINE) { 1838 /* 1839 * If state = online, then set scan_needed=1 to do relogin. 1840 * Otherwise we're already in the middle of a relogin 1841 */ 1842 fcport->scan_needed = 1; 1843 fcport->rscn_gen++; 1844 } 1845 } else { 1846 fcport->scan_needed = 1; 1847 fcport->rscn_gen++; 1848 } 1849 } 1850 break; 1851 case RSCN_AREA_ADDR: 1852 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1853 if (fcport->flags & FCF_FCP2_DEVICE) 1854 continue; 1855 1856 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) { 1857 fcport->scan_needed = 1; 1858 fcport->rscn_gen++; 1859 } 1860 } 1861 break; 1862 case RSCN_DOM_ADDR: 1863 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1864 if (fcport->flags & FCF_FCP2_DEVICE) 1865 continue; 1866 1867 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) { 1868 fcport->scan_needed = 1; 1869 fcport->rscn_gen++; 1870 } 1871 } 1872 break; 1873 case RSCN_FAB_ADDR: 1874 default: 1875 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1876 if (fcport->flags & FCF_FCP2_DEVICE) 1877 continue; 1878 1879 fcport->scan_needed = 1; 1880 fcport->rscn_gen++; 1881 } 1882 break; 1883 } 1884 1885 spin_lock_irqsave(&vha->work_lock, flags); 1886 if (vha->scan.scan_flags == 0) { 1887 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1888 vha->scan.scan_flags |= SF_QUEUED; 1889 schedule_delayed_work(&vha->scan.scan_work, 5); 1890 } 1891 spin_unlock_irqrestore(&vha->work_lock, flags); 1892 } 1893 1894 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1895 struct event_arg *ea) 1896 { 1897 fc_port_t *fcport = ea->fcport; 1898 1899 if (test_bit(UNLOADING, &vha->dpc_flags)) 1900 return; 1901 1902 ql_dbg(ql_dbg_disc, vha, 0x2102, 1903 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1904 __func__, fcport->port_name, fcport->disc_state, 1905 fcport->fw_login_state, fcport->login_pause, 1906 fcport->deleted, fcport->conflict, 1907 fcport->last_rscn_gen, fcport->rscn_gen, 1908 fcport->last_login_gen, fcport->login_gen, 1909 fcport->flags); 1910 1911 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1912 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1913 __func__, __LINE__, fcport->port_name); 1914 qla24xx_post_gnl_work(vha, fcport); 1915 return; 1916 } 1917 1918 qla24xx_fcport_handle_login(vha, fcport); 1919 } 1920 1921 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1922 struct event_arg *ea) 1923 { 1924 if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) && 1925 vha->hw->flags.edif_enabled) { 1926 /* check to see if App support Secure */ 1927 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1928 return; 1929 } 1930 1931 /* for pure Target Mode, PRLI will not be initiated */ 1932 if (vha->host->active_mode == MODE_TARGET) 1933 return; 1934 1935 ql_dbg(ql_dbg_disc, vha, 0x2118, 1936 "%s %d %8phC post PRLI\n", 1937 __func__, __LINE__, ea->fcport->port_name); 1938 qla24xx_post_prli_work(vha, ea->fcport); 1939 } 1940 1941 /* 1942 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1943 * to be consumed by the fcport 1944 */ 1945 void qla_rscn_replay(fc_port_t *fcport) 1946 { 1947 struct event_arg ea; 1948 1949 switch (fcport->disc_state) { 1950 case DSC_DELETE_PEND: 1951 return; 1952 default: 1953 break; 1954 } 1955 1956 if (fcport->scan_needed) { 1957 memset(&ea, 0, sizeof(ea)); 1958 ea.id = fcport->d_id; 1959 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1960 qla2x00_handle_rscn(fcport->vha, &ea); 1961 } 1962 } 1963 1964 static void 1965 qla2x00_tmf_iocb_timeout(void *data) 1966 { 1967 srb_t *sp = data; 1968 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1969 int rc, h; 1970 unsigned long flags; 1971 1972 rc = qla24xx_async_abort_cmd(sp, false); 1973 if (rc) { 1974 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 1975 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 1976 if (sp->qpair->req->outstanding_cmds[h] == sp) { 1977 sp->qpair->req->outstanding_cmds[h] = NULL; 1978 break; 1979 } 1980 } 1981 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 1982 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT); 1983 tmf->u.tmf.data = QLA_FUNCTION_FAILED; 1984 complete(&tmf->u.tmf.comp); 1985 } 1986 } 1987 1988 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 1989 { 1990 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1991 1992 complete(&tmf->u.tmf.comp); 1993 } 1994 1995 int 1996 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1997 uint32_t tag) 1998 { 1999 struct scsi_qla_host *vha = fcport->vha; 2000 struct srb_iocb *tm_iocb; 2001 srb_t *sp; 2002 int rval = QLA_FUNCTION_FAILED; 2003 2004 /* ref: INIT */ 2005 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 2006 if (!sp) 2007 goto done; 2008 2009 sp->type = SRB_TM_CMD; 2010 sp->name = "tmf"; 2011 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), 2012 qla2x00_tmf_sp_done); 2013 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout; 2014 2015 tm_iocb = &sp->u.iocb_cmd; 2016 init_completion(&tm_iocb->u.tmf.comp); 2017 tm_iocb->u.tmf.flags = flags; 2018 tm_iocb->u.tmf.lun = lun; 2019 2020 ql_dbg(ql_dbg_taskm, vha, 0x802f, 2021 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 2022 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 2023 fcport->d_id.b.area, fcport->d_id.b.al_pa); 2024 2025 rval = qla2x00_start_sp(sp); 2026 if (rval != QLA_SUCCESS) 2027 goto done_free_sp; 2028 wait_for_completion(&tm_iocb->u.tmf.comp); 2029 2030 rval = tm_iocb->u.tmf.data; 2031 2032 if (rval != QLA_SUCCESS) { 2033 ql_log(ql_log_warn, vha, 0x8030, 2034 "TM IOCB failed (%x).\n", rval); 2035 } 2036 2037 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 2038 flags = tm_iocb->u.tmf.flags; 2039 lun = (uint16_t)tm_iocb->u.tmf.lun; 2040 2041 /* Issue Marker IOCB */ 2042 qla2x00_marker(vha, vha->hw->base_qpair, 2043 fcport->loop_id, lun, 2044 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 2045 } 2046 2047 done_free_sp: 2048 /* ref: INIT */ 2049 kref_put(&sp->cmd_kref, qla2x00_sp_release); 2050 fcport->flags &= ~FCF_ASYNC_SENT; 2051 done: 2052 return rval; 2053 } 2054 2055 int 2056 qla24xx_async_abort_command(srb_t *sp) 2057 { 2058 unsigned long flags = 0; 2059 2060 uint32_t handle; 2061 fc_port_t *fcport = sp->fcport; 2062 struct qla_qpair *qpair = sp->qpair; 2063 struct scsi_qla_host *vha = fcport->vha; 2064 struct req_que *req = qpair->req; 2065 2066 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 2067 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 2068 if (req->outstanding_cmds[handle] == sp) 2069 break; 2070 } 2071 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 2072 2073 if (handle == req->num_outstanding_cmds) { 2074 /* Command not found. */ 2075 return QLA_ERR_NOT_FOUND; 2076 } 2077 if (sp->type == SRB_FXIOCB_DCMD) 2078 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 2079 FXDISC_ABORT_IOCTL); 2080 2081 return qla24xx_async_abort_cmd(sp, true); 2082 } 2083 2084 static void 2085 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2086 { 2087 struct srb *sp; 2088 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2089 ea->data[0]); 2090 2091 switch (ea->data[0]) { 2092 case MBS_COMMAND_COMPLETE: 2093 ql_dbg(ql_dbg_disc, vha, 0x2118, 2094 "%s %d %8phC post gpdb\n", 2095 __func__, __LINE__, ea->fcport->port_name); 2096 2097 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2098 ea->fcport->logout_on_delete = 1; 2099 ea->fcport->nvme_prli_service_param = ea->iop[0]; 2100 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 2101 ea->fcport->nvme_first_burst_size = 2102 (ea->iop[1] & 0xffff) * 512; 2103 else 2104 ea->fcport->nvme_first_burst_size = 0; 2105 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2106 break; 2107 default: 2108 sp = ea->sp; 2109 ql_dbg(ql_dbg_disc, vha, 0x2118, 2110 "%s %d %8phC priority %s, fc4type %x prev try %s\n", 2111 __func__, __LINE__, ea->fcport->port_name, 2112 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ? 2113 "FCP" : "NVMe", ea->fcport->fc4_type, 2114 (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ? 2115 "NVME" : "FCP"); 2116 2117 if (NVME_FCP_TARGET(ea->fcport)) { 2118 if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) 2119 ea->fcport->do_prli_nvme = 0; 2120 else 2121 ea->fcport->do_prli_nvme = 1; 2122 } else { 2123 ea->fcport->do_prli_nvme = 0; 2124 } 2125 2126 if (N2N_TOPO(vha->hw)) { 2127 if (ea->fcport->n2n_link_reset_cnt < 2128 vha->hw->login_retry_count) { 2129 ea->fcport->n2n_link_reset_cnt++; 2130 vha->relogin_jif = jiffies + 2 * HZ; 2131 /* 2132 * PRLI failed. Reset link to kick start 2133 * state machine 2134 */ 2135 set_bit(N2N_LINK_RESET, &vha->dpc_flags); 2136 qla2xxx_wake_dpc(vha); 2137 } else { 2138 ql_log(ql_log_warn, vha, 0x2119, 2139 "%s %d %8phC Unable to reconnect\n", 2140 __func__, __LINE__, 2141 ea->fcport->port_name); 2142 } 2143 } else { 2144 /* 2145 * switch connect. login failed. Take connection down 2146 * and allow relogin to retrigger 2147 */ 2148 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2149 ea->fcport->keep_nport_handle = 0; 2150 ea->fcport->logout_on_delete = 1; 2151 qlt_schedule_sess_for_deletion(ea->fcport); 2152 } 2153 break; 2154 } 2155 } 2156 2157 void 2158 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 2159 { 2160 port_id_t cid; /* conflict Nport id */ 2161 u16 lid; 2162 struct fc_port *conflict_fcport; 2163 unsigned long flags; 2164 struct fc_port *fcport = ea->fcport; 2165 2166 ql_dbg(ql_dbg_disc, vha, 0xffff, 2167 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 2168 __func__, fcport->port_name, fcport->disc_state, 2169 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 2170 ea->sp->gen1, fcport->rscn_gen, 2171 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 2172 2173 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 2174 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 2175 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2176 "%s %d %8phC Remote is trying to login\n", 2177 __func__, __LINE__, fcport->port_name); 2178 return; 2179 } 2180 2181 if ((fcport->disc_state == DSC_DELETE_PEND) || 2182 (fcport->disc_state == DSC_DELETED)) { 2183 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2184 return; 2185 } 2186 2187 if (ea->sp->gen2 != fcport->login_gen) { 2188 /* target side must have changed it. */ 2189 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2190 "%s %8phC generation changed\n", 2191 __func__, fcport->port_name); 2192 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2193 return; 2194 } else if (ea->sp->gen1 != fcport->rscn_gen) { 2195 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2196 "%s %8phC RSCN generation changed\n", 2197 __func__, fcport->port_name); 2198 qla_rscn_replay(fcport); 2199 qlt_schedule_sess_for_deletion(fcport); 2200 return; 2201 } 2202 2203 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2204 ea->data[0]); 2205 2206 switch (ea->data[0]) { 2207 case MBS_COMMAND_COMPLETE: 2208 /* 2209 * Driver must validate login state - If PRLI not complete, 2210 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 2211 * requests. 2212 */ 2213 if (vha->hw->flags.edif_enabled) { 2214 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2215 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2216 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2217 ea->fcport->logout_on_delete = 1; 2218 ea->fcport->send_els_logo = 0; 2219 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 2220 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2221 2222 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2223 } else { 2224 if (NVME_TARGET(vha->hw, fcport)) { 2225 ql_dbg(ql_dbg_disc, vha, 0x2117, 2226 "%s %d %8phC post prli\n", 2227 __func__, __LINE__, fcport->port_name); 2228 qla24xx_post_prli_work(vha, fcport); 2229 } else { 2230 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2231 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n", 2232 __func__, __LINE__, fcport->port_name, 2233 fcport->loop_id, fcport->d_id.b24); 2234 2235 set_bit(fcport->loop_id, vha->hw->loop_id_map); 2236 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2237 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2238 fcport->logout_on_delete = 1; 2239 fcport->send_els_logo = 0; 2240 fcport->fw_login_state = DSC_LS_PRLI_COMP; 2241 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2242 2243 qla24xx_post_gpdb_work(vha, fcport, 0); 2244 } 2245 } 2246 break; 2247 case MBS_COMMAND_ERROR: 2248 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2249 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2250 2251 qlt_schedule_sess_for_deletion(ea->fcport); 2252 break; 2253 case MBS_LOOP_ID_USED: 2254 /* data[1] = IO PARAM 1 = nport ID */ 2255 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2256 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2257 cid.b.al_pa = ea->iop[1] & 0xff; 2258 cid.b.rsvd_1 = 0; 2259 2260 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2261 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2262 __func__, __LINE__, ea->fcport->port_name, 2263 ea->fcport->loop_id, cid.b24); 2264 2265 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2266 ea->fcport->loop_id = FC_NO_LOOP_ID; 2267 qla24xx_post_gnl_work(vha, ea->fcport); 2268 break; 2269 case MBS_PORT_ID_USED: 2270 lid = ea->iop[1] & 0xffff; 2271 qlt_find_sess_invalidate_other(vha, 2272 wwn_to_u64(ea->fcport->port_name), 2273 ea->fcport->d_id, lid, &conflict_fcport); 2274 2275 if (conflict_fcport) { 2276 /* 2277 * Another fcport share the same loop_id/nport id. 2278 * Conflict fcport needs to finish cleanup before this 2279 * fcport can proceed to login. 2280 */ 2281 conflict_fcport->conflict = ea->fcport; 2282 ea->fcport->login_pause = 1; 2283 2284 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2285 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2286 __func__, __LINE__, ea->fcport->port_name, 2287 ea->fcport->d_id.b24, lid); 2288 } else { 2289 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2290 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2291 __func__, __LINE__, ea->fcport->port_name, 2292 ea->fcport->d_id.b24, lid); 2293 2294 qla2x00_clear_loop_id(ea->fcport); 2295 set_bit(lid, vha->hw->loop_id_map); 2296 ea->fcport->loop_id = lid; 2297 ea->fcport->keep_nport_handle = 0; 2298 ea->fcport->logout_on_delete = 1; 2299 qlt_schedule_sess_for_deletion(ea->fcport); 2300 } 2301 break; 2302 } 2303 return; 2304 } 2305 2306 /****************************************************************************/ 2307 /* QLogic ISP2x00 Hardware Support Functions. */ 2308 /****************************************************************************/ 2309 2310 static int 2311 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2312 { 2313 int rval = QLA_SUCCESS; 2314 struct qla_hw_data *ha = vha->hw; 2315 uint32_t idc_major_ver, idc_minor_ver; 2316 uint16_t config[4]; 2317 2318 qla83xx_idc_lock(vha, 0); 2319 2320 /* SV: TODO: Assign initialization timeout from 2321 * flash-info / other param 2322 */ 2323 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2324 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2325 2326 /* Set our fcoe function presence */ 2327 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2328 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2329 "Error while setting DRV-Presence.\n"); 2330 rval = QLA_FUNCTION_FAILED; 2331 goto exit; 2332 } 2333 2334 /* Decide the reset ownership */ 2335 qla83xx_reset_ownership(vha); 2336 2337 /* 2338 * On first protocol driver load: 2339 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2340 * register. 2341 * Others: Check compatibility with current IDC Major version. 2342 */ 2343 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2344 if (ha->flags.nic_core_reset_owner) { 2345 /* Set IDC Major version */ 2346 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2347 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2348 2349 /* Clearing IDC-Lock-Recovery register */ 2350 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2351 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2352 /* 2353 * Clear further IDC participation if we are not compatible with 2354 * the current IDC Major Version. 2355 */ 2356 ql_log(ql_log_warn, vha, 0xb07d, 2357 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2358 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2359 __qla83xx_clear_drv_presence(vha); 2360 rval = QLA_FUNCTION_FAILED; 2361 goto exit; 2362 } 2363 /* Each function sets its supported Minor version. */ 2364 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2365 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2366 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2367 2368 if (ha->flags.nic_core_reset_owner) { 2369 memset(config, 0, sizeof(config)); 2370 if (!qla81xx_get_port_config(vha, config)) 2371 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2372 QLA8XXX_DEV_READY); 2373 } 2374 2375 rval = qla83xx_idc_state_handler(vha); 2376 2377 exit: 2378 qla83xx_idc_unlock(vha, 0); 2379 2380 return rval; 2381 } 2382 2383 /* 2384 * qla2x00_initialize_adapter 2385 * Initialize board. 2386 * 2387 * Input: 2388 * ha = adapter block pointer. 2389 * 2390 * Returns: 2391 * 0 = success 2392 */ 2393 int 2394 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2395 { 2396 int rval; 2397 struct qla_hw_data *ha = vha->hw; 2398 struct req_que *req = ha->req_q_map[0]; 2399 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2400 2401 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2402 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2403 2404 /* Clear adapter flags. */ 2405 vha->flags.online = 0; 2406 ha->flags.chip_reset_done = 0; 2407 vha->flags.reset_active = 0; 2408 ha->flags.pci_channel_io_perm_failure = 0; 2409 ha->flags.eeh_busy = 0; 2410 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2411 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2412 atomic_set(&vha->loop_state, LOOP_DOWN); 2413 vha->device_flags = DFLG_NO_CABLE; 2414 vha->dpc_flags = 0; 2415 vha->flags.management_server_logged_in = 0; 2416 vha->marker_needed = 0; 2417 ha->isp_abort_cnt = 0; 2418 ha->beacon_blink_led = 0; 2419 2420 set_bit(0, ha->req_qid_map); 2421 set_bit(0, ha->rsp_qid_map); 2422 2423 ql_dbg(ql_dbg_init, vha, 0x0040, 2424 "Configuring PCI space...\n"); 2425 rval = ha->isp_ops->pci_config(vha); 2426 if (rval) { 2427 ql_log(ql_log_warn, vha, 0x0044, 2428 "Unable to configure PCI space.\n"); 2429 return (rval); 2430 } 2431 2432 ha->isp_ops->reset_chip(vha); 2433 2434 /* Check for secure flash support */ 2435 if (IS_QLA28XX(ha)) { 2436 if (rd_reg_word(®->mailbox12) & BIT_0) 2437 ha->flags.secure_adapter = 1; 2438 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n", 2439 (ha->flags.secure_adapter) ? "Yes" : "No"); 2440 } 2441 2442 2443 rval = qla2xxx_get_flash_info(vha); 2444 if (rval) { 2445 ql_log(ql_log_fatal, vha, 0x004f, 2446 "Unable to validate FLASH data.\n"); 2447 return rval; 2448 } 2449 2450 if (IS_QLA8044(ha)) { 2451 qla8044_read_reset_template(vha); 2452 2453 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2454 * If DONRESET_BIT0 is set, drivers should not set dev_state 2455 * to NEED_RESET. But if NEED_RESET is set, drivers should 2456 * should honor the reset. */ 2457 if (ql2xdontresethba == 1) 2458 qla8044_set_idc_dontreset(vha); 2459 } 2460 2461 ha->isp_ops->get_flash_version(vha, req->ring); 2462 ql_dbg(ql_dbg_init, vha, 0x0061, 2463 "Configure NVRAM parameters...\n"); 2464 2465 /* Let priority default to FCP, can be overridden by nvram_config */ 2466 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2467 2468 ha->isp_ops->nvram_config(vha); 2469 2470 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2471 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2472 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2473 2474 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2475 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2476 2477 if (ha->flags.disable_serdes) { 2478 /* Mask HBA via NVRAM settings? */ 2479 ql_log(ql_log_info, vha, 0x0077, 2480 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2481 return QLA_FUNCTION_FAILED; 2482 } 2483 2484 ql_dbg(ql_dbg_init, vha, 0x0078, 2485 "Verifying loaded RISC code...\n"); 2486 2487 /* If smartsan enabled then require fdmi and rdp enabled */ 2488 if (ql2xsmartsan) { 2489 ql2xfdmienable = 1; 2490 ql2xrdpenable = 1; 2491 } 2492 2493 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2494 rval = ha->isp_ops->chip_diag(vha); 2495 if (rval) 2496 return (rval); 2497 rval = qla2x00_setup_chip(vha); 2498 if (rval) 2499 return (rval); 2500 } 2501 2502 if (IS_QLA84XX(ha)) { 2503 ha->cs84xx = qla84xx_get_chip(vha); 2504 if (!ha->cs84xx) { 2505 ql_log(ql_log_warn, vha, 0x00d0, 2506 "Unable to configure ISP84XX.\n"); 2507 return QLA_FUNCTION_FAILED; 2508 } 2509 } 2510 2511 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2512 rval = qla2x00_init_rings(vha); 2513 2514 /* No point in continuing if firmware initialization failed. */ 2515 if (rval != QLA_SUCCESS) 2516 return rval; 2517 2518 ha->flags.chip_reset_done = 1; 2519 2520 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2521 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2522 rval = qla84xx_init_chip(vha); 2523 if (rval != QLA_SUCCESS) { 2524 ql_log(ql_log_warn, vha, 0x00d4, 2525 "Unable to initialize ISP84XX.\n"); 2526 qla84xx_put_chip(vha); 2527 } 2528 } 2529 2530 /* Load the NIC Core f/w if we are the first protocol driver. */ 2531 if (IS_QLA8031(ha)) { 2532 rval = qla83xx_nic_core_fw_load(vha); 2533 if (rval) 2534 ql_log(ql_log_warn, vha, 0x0124, 2535 "Error in initializing NIC Core f/w.\n"); 2536 } 2537 2538 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2539 qla24xx_read_fcp_prio_cfg(vha); 2540 2541 if (IS_P3P_TYPE(ha)) 2542 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2543 else 2544 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2545 2546 return (rval); 2547 } 2548 2549 /** 2550 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2551 * @vha: HA context 2552 * 2553 * Returns 0 on success. 2554 */ 2555 int 2556 qla2100_pci_config(scsi_qla_host_t *vha) 2557 { 2558 uint16_t w; 2559 unsigned long flags; 2560 struct qla_hw_data *ha = vha->hw; 2561 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2562 2563 pci_set_master(ha->pdev); 2564 pci_try_set_mwi(ha->pdev); 2565 2566 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2567 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2568 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2569 2570 pci_disable_rom(ha->pdev); 2571 2572 /* Get PCI bus information. */ 2573 spin_lock_irqsave(&ha->hardware_lock, flags); 2574 ha->pci_attr = rd_reg_word(®->ctrl_status); 2575 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2576 2577 return QLA_SUCCESS; 2578 } 2579 2580 /** 2581 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2582 * @vha: HA context 2583 * 2584 * Returns 0 on success. 2585 */ 2586 int 2587 qla2300_pci_config(scsi_qla_host_t *vha) 2588 { 2589 uint16_t w; 2590 unsigned long flags = 0; 2591 uint32_t cnt; 2592 struct qla_hw_data *ha = vha->hw; 2593 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2594 2595 pci_set_master(ha->pdev); 2596 pci_try_set_mwi(ha->pdev); 2597 2598 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2599 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2600 2601 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2602 w &= ~PCI_COMMAND_INTX_DISABLE; 2603 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2604 2605 /* 2606 * If this is a 2300 card and not 2312, reset the 2607 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2608 * the 2310 also reports itself as a 2300 so we need to get the 2609 * fb revision level -- a 6 indicates it really is a 2300 and 2610 * not a 2310. 2611 */ 2612 if (IS_QLA2300(ha)) { 2613 spin_lock_irqsave(&ha->hardware_lock, flags); 2614 2615 /* Pause RISC. */ 2616 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2617 for (cnt = 0; cnt < 30000; cnt++) { 2618 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) 2619 break; 2620 2621 udelay(10); 2622 } 2623 2624 /* Select FPM registers. */ 2625 wrt_reg_word(®->ctrl_status, 0x20); 2626 rd_reg_word(®->ctrl_status); 2627 2628 /* Get the fb rev level */ 2629 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2630 2631 if (ha->fb_rev == FPM_2300) 2632 pci_clear_mwi(ha->pdev); 2633 2634 /* Deselect FPM registers. */ 2635 wrt_reg_word(®->ctrl_status, 0x0); 2636 rd_reg_word(®->ctrl_status); 2637 2638 /* Release RISC module. */ 2639 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2640 for (cnt = 0; cnt < 30000; cnt++) { 2641 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0) 2642 break; 2643 2644 udelay(10); 2645 } 2646 2647 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2648 } 2649 2650 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2651 2652 pci_disable_rom(ha->pdev); 2653 2654 /* Get PCI bus information. */ 2655 spin_lock_irqsave(&ha->hardware_lock, flags); 2656 ha->pci_attr = rd_reg_word(®->ctrl_status); 2657 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2658 2659 return QLA_SUCCESS; 2660 } 2661 2662 /** 2663 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2664 * @vha: HA context 2665 * 2666 * Returns 0 on success. 2667 */ 2668 int 2669 qla24xx_pci_config(scsi_qla_host_t *vha) 2670 { 2671 uint16_t w; 2672 unsigned long flags = 0; 2673 struct qla_hw_data *ha = vha->hw; 2674 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2675 2676 pci_set_master(ha->pdev); 2677 pci_try_set_mwi(ha->pdev); 2678 2679 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2680 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2681 w &= ~PCI_COMMAND_INTX_DISABLE; 2682 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2683 2684 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2685 2686 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2687 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2688 pcix_set_mmrbc(ha->pdev, 2048); 2689 2690 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2691 if (pci_is_pcie(ha->pdev)) 2692 pcie_set_readrq(ha->pdev, 4096); 2693 2694 pci_disable_rom(ha->pdev); 2695 2696 ha->chip_revision = ha->pdev->revision; 2697 2698 /* Get PCI bus information. */ 2699 spin_lock_irqsave(&ha->hardware_lock, flags); 2700 ha->pci_attr = rd_reg_dword(®->ctrl_status); 2701 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2702 2703 return QLA_SUCCESS; 2704 } 2705 2706 /** 2707 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2708 * @vha: HA context 2709 * 2710 * Returns 0 on success. 2711 */ 2712 int 2713 qla25xx_pci_config(scsi_qla_host_t *vha) 2714 { 2715 uint16_t w; 2716 struct qla_hw_data *ha = vha->hw; 2717 2718 pci_set_master(ha->pdev); 2719 pci_try_set_mwi(ha->pdev); 2720 2721 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2722 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2723 w &= ~PCI_COMMAND_INTX_DISABLE; 2724 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2725 2726 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2727 if (pci_is_pcie(ha->pdev)) 2728 pcie_set_readrq(ha->pdev, 4096); 2729 2730 pci_disable_rom(ha->pdev); 2731 2732 ha->chip_revision = ha->pdev->revision; 2733 2734 return QLA_SUCCESS; 2735 } 2736 2737 /** 2738 * qla2x00_isp_firmware() - Choose firmware image. 2739 * @vha: HA context 2740 * 2741 * Returns 0 on success. 2742 */ 2743 static int 2744 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2745 { 2746 int rval; 2747 uint16_t loop_id, topo, sw_cap; 2748 uint8_t domain, area, al_pa; 2749 struct qla_hw_data *ha = vha->hw; 2750 2751 /* Assume loading risc code */ 2752 rval = QLA_FUNCTION_FAILED; 2753 2754 if (ha->flags.disable_risc_code_load) { 2755 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2756 2757 /* Verify checksum of loaded RISC code. */ 2758 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2759 if (rval == QLA_SUCCESS) { 2760 /* And, verify we are not in ROM code. */ 2761 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2762 &area, &domain, &topo, &sw_cap); 2763 } 2764 } 2765 2766 if (rval) 2767 ql_dbg(ql_dbg_init, vha, 0x007a, 2768 "**** Load RISC code ****.\n"); 2769 2770 return (rval); 2771 } 2772 2773 /** 2774 * qla2x00_reset_chip() - Reset ISP chip. 2775 * @vha: HA context 2776 * 2777 * Returns 0 on success. 2778 */ 2779 int 2780 qla2x00_reset_chip(scsi_qla_host_t *vha) 2781 { 2782 unsigned long flags = 0; 2783 struct qla_hw_data *ha = vha->hw; 2784 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2785 uint32_t cnt; 2786 uint16_t cmd; 2787 int rval = QLA_FUNCTION_FAILED; 2788 2789 if (unlikely(pci_channel_offline(ha->pdev))) 2790 return rval; 2791 2792 ha->isp_ops->disable_intrs(ha); 2793 2794 spin_lock_irqsave(&ha->hardware_lock, flags); 2795 2796 /* Turn off master enable */ 2797 cmd = 0; 2798 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2799 cmd &= ~PCI_COMMAND_MASTER; 2800 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2801 2802 if (!IS_QLA2100(ha)) { 2803 /* Pause RISC. */ 2804 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2805 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2806 for (cnt = 0; cnt < 30000; cnt++) { 2807 if ((rd_reg_word(®->hccr) & 2808 HCCR_RISC_PAUSE) != 0) 2809 break; 2810 udelay(100); 2811 } 2812 } else { 2813 rd_reg_word(®->hccr); /* PCI Posting. */ 2814 udelay(10); 2815 } 2816 2817 /* Select FPM registers. */ 2818 wrt_reg_word(®->ctrl_status, 0x20); 2819 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2820 2821 /* FPM Soft Reset. */ 2822 wrt_reg_word(®->fpm_diag_config, 0x100); 2823 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2824 2825 /* Toggle Fpm Reset. */ 2826 if (!IS_QLA2200(ha)) { 2827 wrt_reg_word(®->fpm_diag_config, 0x0); 2828 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2829 } 2830 2831 /* Select frame buffer registers. */ 2832 wrt_reg_word(®->ctrl_status, 0x10); 2833 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2834 2835 /* Reset frame buffer FIFOs. */ 2836 if (IS_QLA2200(ha)) { 2837 WRT_FB_CMD_REG(ha, reg, 0xa000); 2838 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2839 } else { 2840 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2841 2842 /* Read back fb_cmd until zero or 3 seconds max */ 2843 for (cnt = 0; cnt < 3000; cnt++) { 2844 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2845 break; 2846 udelay(100); 2847 } 2848 } 2849 2850 /* Select RISC module registers. */ 2851 wrt_reg_word(®->ctrl_status, 0); 2852 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2853 2854 /* Reset RISC processor. */ 2855 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2856 rd_reg_word(®->hccr); /* PCI Posting. */ 2857 2858 /* Release RISC processor. */ 2859 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2860 rd_reg_word(®->hccr); /* PCI Posting. */ 2861 } 2862 2863 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 2864 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT); 2865 2866 /* Reset ISP chip. */ 2867 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 2868 2869 /* Wait for RISC to recover from reset. */ 2870 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2871 /* 2872 * It is necessary to for a delay here since the card doesn't 2873 * respond to PCI reads during a reset. On some architectures 2874 * this will result in an MCA. 2875 */ 2876 udelay(20); 2877 for (cnt = 30000; cnt; cnt--) { 2878 if ((rd_reg_word(®->ctrl_status) & 2879 CSR_ISP_SOFT_RESET) == 0) 2880 break; 2881 udelay(100); 2882 } 2883 } else 2884 udelay(10); 2885 2886 /* Reset RISC processor. */ 2887 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2888 2889 wrt_reg_word(®->semaphore, 0); 2890 2891 /* Release RISC processor. */ 2892 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2893 rd_reg_word(®->hccr); /* PCI Posting. */ 2894 2895 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2896 for (cnt = 0; cnt < 30000; cnt++) { 2897 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2898 break; 2899 2900 udelay(100); 2901 } 2902 } else 2903 udelay(100); 2904 2905 /* Turn on master enable */ 2906 cmd |= PCI_COMMAND_MASTER; 2907 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2908 2909 /* Disable RISC pause on FPM parity error. */ 2910 if (!IS_QLA2100(ha)) { 2911 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2912 rd_reg_word(®->hccr); /* PCI Posting. */ 2913 } 2914 2915 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2916 2917 return QLA_SUCCESS; 2918 } 2919 2920 /** 2921 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2922 * @vha: HA context 2923 * 2924 * Returns 0 on success. 2925 */ 2926 static int 2927 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2928 { 2929 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2930 2931 if (!IS_QLA81XX(vha->hw)) 2932 return QLA_SUCCESS; 2933 2934 return qla81xx_write_mpi_register(vha, mb); 2935 } 2936 2937 static int 2938 qla_chk_risc_recovery(scsi_qla_host_t *vha) 2939 { 2940 struct qla_hw_data *ha = vha->hw; 2941 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2942 __le16 __iomem *mbptr = ®->mailbox0; 2943 int i; 2944 u16 mb[32]; 2945 int rc = QLA_SUCCESS; 2946 2947 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 2948 return rc; 2949 2950 /* this check is only valid after RISC reset */ 2951 mb[0] = rd_reg_word(mbptr); 2952 mbptr++; 2953 if (mb[0] == 0xf) { 2954 rc = QLA_FUNCTION_FAILED; 2955 2956 for (i = 1; i < 32; i++) { 2957 mb[i] = rd_reg_word(mbptr); 2958 mbptr++; 2959 } 2960 2961 ql_log(ql_log_warn, vha, 0x1015, 2962 "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2963 mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]); 2964 ql_log(ql_log_warn, vha, 0x1015, 2965 "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2966 mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14], 2967 mb[15]); 2968 ql_log(ql_log_warn, vha, 0x1015, 2969 "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2970 mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22], 2971 mb[23]); 2972 ql_log(ql_log_warn, vha, 0x1015, 2973 "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n", 2974 mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30], 2975 mb[31]); 2976 } 2977 return rc; 2978 } 2979 2980 /** 2981 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2982 * @vha: HA context 2983 * 2984 * Returns 0 on success. 2985 */ 2986 static inline int 2987 qla24xx_reset_risc(scsi_qla_host_t *vha) 2988 { 2989 unsigned long flags = 0; 2990 struct qla_hw_data *ha = vha->hw; 2991 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2992 uint32_t cnt; 2993 uint16_t wd; 2994 static int abts_cnt; /* ISP abort retry counts */ 2995 int rval = QLA_SUCCESS; 2996 int print = 1; 2997 2998 spin_lock_irqsave(&ha->hardware_lock, flags); 2999 3000 /* Reset RISC. */ 3001 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3002 for (cnt = 0; cnt < 30000; cnt++) { 3003 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 3004 break; 3005 3006 udelay(10); 3007 } 3008 3009 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)) 3010 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 3011 3012 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 3013 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 3014 rd_reg_dword(®->hccr), 3015 rd_reg_dword(®->ctrl_status), 3016 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)); 3017 3018 wrt_reg_dword(®->ctrl_status, 3019 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 3020 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 3021 3022 udelay(100); 3023 3024 /* Wait for firmware to complete NVRAM accesses. */ 3025 rd_reg_word(®->mailbox0); 3026 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 && 3027 rval == QLA_SUCCESS; cnt--) { 3028 barrier(); 3029 if (cnt) 3030 udelay(5); 3031 else 3032 rval = QLA_FUNCTION_TIMEOUT; 3033 } 3034 3035 if (rval == QLA_SUCCESS) 3036 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 3037 3038 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 3039 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 3040 rd_reg_dword(®->hccr), 3041 rd_reg_word(®->mailbox0)); 3042 3043 /* Wait for soft-reset to complete. */ 3044 rd_reg_dword(®->ctrl_status); 3045 for (cnt = 0; cnt < 60; cnt++) { 3046 barrier(); 3047 if ((rd_reg_dword(®->ctrl_status) & 3048 CSRX_ISP_SOFT_RESET) == 0) 3049 break; 3050 3051 udelay(5); 3052 } 3053 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 3054 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 3055 3056 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 3057 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 3058 rd_reg_dword(®->hccr), 3059 rd_reg_dword(®->ctrl_status)); 3060 3061 /* If required, do an MPI FW reset now */ 3062 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 3063 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 3064 if (++abts_cnt < 5) { 3065 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3066 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 3067 } else { 3068 /* 3069 * We exhausted the ISP abort retries. We have to 3070 * set the board offline. 3071 */ 3072 abts_cnt = 0; 3073 vha->flags.online = 0; 3074 } 3075 } 3076 } 3077 3078 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 3079 rd_reg_dword(®->hccr); 3080 3081 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 3082 rd_reg_dword(®->hccr); 3083 3084 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET); 3085 mdelay(10); 3086 rd_reg_dword(®->hccr); 3087 3088 wd = rd_reg_word(®->mailbox0); 3089 for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) { 3090 barrier(); 3091 if (cnt) { 3092 mdelay(1); 3093 if (print && qla_chk_risc_recovery(vha)) 3094 print = 0; 3095 3096 wd = rd_reg_word(®->mailbox0); 3097 } else { 3098 rval = QLA_FUNCTION_TIMEOUT; 3099 3100 ql_log(ql_log_warn, vha, 0x015e, 3101 "RISC reset timeout\n"); 3102 } 3103 } 3104 3105 if (rval == QLA_SUCCESS) 3106 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 3107 3108 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 3109 "Host Risc 0x%x, mailbox0 0x%x\n", 3110 rd_reg_dword(®->hccr), 3111 rd_reg_word(®->mailbox0)); 3112 3113 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3114 3115 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 3116 "Driver in %s mode\n", 3117 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 3118 3119 if (IS_NOPOLLING_TYPE(ha)) 3120 ha->isp_ops->enable_intrs(ha); 3121 3122 return rval; 3123 } 3124 3125 static void 3126 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 3127 { 3128 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3129 3130 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3131 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET); 3132 } 3133 3134 static void 3135 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 3136 { 3137 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 3138 3139 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 3140 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); 3141 } 3142 3143 static void 3144 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 3145 { 3146 uint32_t wd32 = 0; 3147 uint delta_msec = 100; 3148 uint elapsed_msec = 0; 3149 uint timeout_msec; 3150 ulong n; 3151 3152 if (vha->hw->pdev->subsystem_device != 0x0175 && 3153 vha->hw->pdev->subsystem_device != 0x0240) 3154 return; 3155 3156 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 3157 udelay(100); 3158 3159 attempt: 3160 timeout_msec = TIMEOUT_SEMAPHORE; 3161 n = timeout_msec / delta_msec; 3162 while (n--) { 3163 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 3164 qla25xx_read_risc_sema_reg(vha, &wd32); 3165 if (wd32 & RISC_SEMAPHORE) 3166 break; 3167 msleep(delta_msec); 3168 elapsed_msec += delta_msec; 3169 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3170 goto force; 3171 } 3172 3173 if (!(wd32 & RISC_SEMAPHORE)) 3174 goto force; 3175 3176 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3177 goto acquired; 3178 3179 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 3180 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 3181 n = timeout_msec / delta_msec; 3182 while (n--) { 3183 qla25xx_read_risc_sema_reg(vha, &wd32); 3184 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 3185 break; 3186 msleep(delta_msec); 3187 elapsed_msec += delta_msec; 3188 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 3189 goto force; 3190 } 3191 3192 if (wd32 & RISC_SEMAPHORE_FORCE) 3193 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 3194 3195 goto attempt; 3196 3197 force: 3198 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 3199 3200 acquired: 3201 return; 3202 } 3203 3204 /** 3205 * qla24xx_reset_chip() - Reset ISP24xx chip. 3206 * @vha: HA context 3207 * 3208 * Returns 0 on success. 3209 */ 3210 int 3211 qla24xx_reset_chip(scsi_qla_host_t *vha) 3212 { 3213 struct qla_hw_data *ha = vha->hw; 3214 int rval = QLA_FUNCTION_FAILED; 3215 3216 if (pci_channel_offline(ha->pdev) && 3217 ha->flags.pci_channel_io_perm_failure) { 3218 return rval; 3219 } 3220 3221 ha->isp_ops->disable_intrs(ha); 3222 3223 qla25xx_manipulate_risc_semaphore(vha); 3224 3225 /* Perform RISC reset. */ 3226 rval = qla24xx_reset_risc(vha); 3227 3228 return rval; 3229 } 3230 3231 /** 3232 * qla2x00_chip_diag() - Test chip for proper operation. 3233 * @vha: HA context 3234 * 3235 * Returns 0 on success. 3236 */ 3237 int 3238 qla2x00_chip_diag(scsi_qla_host_t *vha) 3239 { 3240 int rval; 3241 struct qla_hw_data *ha = vha->hw; 3242 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3243 unsigned long flags = 0; 3244 uint16_t data; 3245 uint32_t cnt; 3246 uint16_t mb[5]; 3247 struct req_que *req = ha->req_q_map[0]; 3248 3249 /* Assume a failed state */ 3250 rval = QLA_FUNCTION_FAILED; 3251 3252 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 3253 ®->flash_address); 3254 3255 spin_lock_irqsave(&ha->hardware_lock, flags); 3256 3257 /* Reset ISP chip. */ 3258 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 3259 3260 /* 3261 * We need to have a delay here since the card will not respond while 3262 * in reset causing an MCA on some architectures. 3263 */ 3264 udelay(20); 3265 data = qla2x00_debounce_register(®->ctrl_status); 3266 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 3267 udelay(5); 3268 data = rd_reg_word(®->ctrl_status); 3269 barrier(); 3270 } 3271 3272 if (!cnt) 3273 goto chip_diag_failed; 3274 3275 ql_dbg(ql_dbg_init, vha, 0x007c, 3276 "Reset register cleared by chip reset.\n"); 3277 3278 /* Reset RISC processor. */ 3279 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3280 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3281 3282 /* Workaround for QLA2312 PCI parity error */ 3283 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3284 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 3285 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 3286 udelay(5); 3287 data = RD_MAILBOX_REG(ha, reg, 0); 3288 barrier(); 3289 } 3290 } else 3291 udelay(10); 3292 3293 if (!cnt) 3294 goto chip_diag_failed; 3295 3296 /* Check product ID of chip */ 3297 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3298 3299 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3300 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3301 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3302 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3303 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3304 mb[3] != PROD_ID_3) { 3305 ql_log(ql_log_warn, vha, 0x0062, 3306 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3307 mb[1], mb[2], mb[3]); 3308 3309 goto chip_diag_failed; 3310 } 3311 ha->product_id[0] = mb[1]; 3312 ha->product_id[1] = mb[2]; 3313 ha->product_id[2] = mb[3]; 3314 ha->product_id[3] = mb[4]; 3315 3316 /* Adjust fw RISC transfer size */ 3317 if (req->length > 1024) 3318 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3319 else 3320 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3321 req->length; 3322 3323 if (IS_QLA2200(ha) && 3324 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3325 /* Limit firmware transfer size with a 2200A */ 3326 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3327 3328 ha->device_type |= DT_ISP2200A; 3329 ha->fw_transfer_size = 128; 3330 } 3331 3332 /* Wrap Incoming Mailboxes Test. */ 3333 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3334 3335 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3336 rval = qla2x00_mbx_reg_test(vha); 3337 if (rval) 3338 ql_log(ql_log_warn, vha, 0x0080, 3339 "Failed mailbox send register test.\n"); 3340 else 3341 /* Flag a successful rval */ 3342 rval = QLA_SUCCESS; 3343 spin_lock_irqsave(&ha->hardware_lock, flags); 3344 3345 chip_diag_failed: 3346 if (rval) 3347 ql_log(ql_log_info, vha, 0x0081, 3348 "Chip diagnostics **** FAILED ****.\n"); 3349 3350 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3351 3352 return (rval); 3353 } 3354 3355 /** 3356 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3357 * @vha: HA context 3358 * 3359 * Returns 0 on success. 3360 */ 3361 int 3362 qla24xx_chip_diag(scsi_qla_host_t *vha) 3363 { 3364 int rval; 3365 struct qla_hw_data *ha = vha->hw; 3366 struct req_que *req = ha->req_q_map[0]; 3367 3368 if (IS_P3P_TYPE(ha)) 3369 return QLA_SUCCESS; 3370 3371 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3372 3373 rval = qla2x00_mbx_reg_test(vha); 3374 if (rval) { 3375 ql_log(ql_log_warn, vha, 0x0082, 3376 "Failed mailbox send register test.\n"); 3377 } else { 3378 /* Flag a successful rval */ 3379 rval = QLA_SUCCESS; 3380 } 3381 3382 return rval; 3383 } 3384 3385 static void 3386 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3387 { 3388 int rval; 3389 dma_addr_t tc_dma; 3390 void *tc; 3391 struct qla_hw_data *ha = vha->hw; 3392 3393 if (!IS_FWI2_CAPABLE(ha)) 3394 return; 3395 3396 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3397 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3398 return; 3399 3400 if (ha->fce) { 3401 ql_dbg(ql_dbg_init, vha, 0x00bd, 3402 "%s: FCE Mem is already allocated.\n", 3403 __func__); 3404 return; 3405 } 3406 3407 /* Allocate memory for Fibre Channel Event Buffer. */ 3408 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3409 GFP_KERNEL); 3410 if (!tc) { 3411 ql_log(ql_log_warn, vha, 0x00be, 3412 "Unable to allocate (%d KB) for FCE.\n", 3413 FCE_SIZE / 1024); 3414 return; 3415 } 3416 3417 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3418 ha->fce_mb, &ha->fce_bufs); 3419 if (rval) { 3420 ql_log(ql_log_warn, vha, 0x00bf, 3421 "Unable to initialize FCE (%d).\n", rval); 3422 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3423 return; 3424 } 3425 3426 ql_dbg(ql_dbg_init, vha, 0x00c0, 3427 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3428 3429 ha->flags.fce_enabled = 1; 3430 ha->fce_dma = tc_dma; 3431 ha->fce = tc; 3432 } 3433 3434 static void 3435 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3436 { 3437 int rval; 3438 dma_addr_t tc_dma; 3439 void *tc; 3440 struct qla_hw_data *ha = vha->hw; 3441 3442 if (!IS_FWI2_CAPABLE(ha)) 3443 return; 3444 3445 if (ha->eft) { 3446 ql_dbg(ql_dbg_init, vha, 0x00bd, 3447 "%s: EFT Mem is already allocated.\n", 3448 __func__); 3449 return; 3450 } 3451 3452 /* Allocate memory for Extended Trace Buffer. */ 3453 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3454 GFP_KERNEL); 3455 if (!tc) { 3456 ql_log(ql_log_warn, vha, 0x00c1, 3457 "Unable to allocate (%d KB) for EFT.\n", 3458 EFT_SIZE / 1024); 3459 return; 3460 } 3461 3462 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3463 if (rval) { 3464 ql_log(ql_log_warn, vha, 0x00c2, 3465 "Unable to initialize EFT (%d).\n", rval); 3466 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3467 return; 3468 } 3469 3470 ql_dbg(ql_dbg_init, vha, 0x00c3, 3471 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3472 3473 ha->eft_dma = tc_dma; 3474 ha->eft = tc; 3475 } 3476 3477 static void 3478 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3479 { 3480 qla2x00_init_fce_trace(vha); 3481 qla2x00_init_eft_trace(vha); 3482 } 3483 3484 void 3485 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3486 { 3487 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3488 eft_size, fce_size, mq_size; 3489 struct qla_hw_data *ha = vha->hw; 3490 struct req_que *req = ha->req_q_map[0]; 3491 struct rsp_que *rsp = ha->rsp_q_map[0]; 3492 struct qla2xxx_fw_dump *fw_dump; 3493 3494 if (ha->fw_dump) { 3495 ql_dbg(ql_dbg_init, vha, 0x00bd, 3496 "Firmware dump already allocated.\n"); 3497 return; 3498 } 3499 3500 ha->fw_dumped = 0; 3501 ha->fw_dump_cap_flags = 0; 3502 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3503 req_q_size = rsp_q_size = 0; 3504 3505 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3506 fixed_size = sizeof(struct qla2100_fw_dump); 3507 } else if (IS_QLA23XX(ha)) { 3508 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3509 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3510 sizeof(uint16_t); 3511 } else if (IS_FWI2_CAPABLE(ha)) { 3512 if (IS_QLA83XX(ha)) 3513 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3514 else if (IS_QLA81XX(ha)) 3515 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3516 else if (IS_QLA25XX(ha)) 3517 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3518 else 3519 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3520 3521 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3522 sizeof(uint32_t); 3523 if (ha->mqenable) { 3524 if (!IS_QLA83XX(ha)) 3525 mq_size = sizeof(struct qla2xxx_mq_chain); 3526 /* 3527 * Allocate maximum buffer size for all queues - Q0. 3528 * Resizing must be done at end-of-dump processing. 3529 */ 3530 mq_size += (ha->max_req_queues - 1) * 3531 (req->length * sizeof(request_t)); 3532 mq_size += (ha->max_rsp_queues - 1) * 3533 (rsp->length * sizeof(response_t)); 3534 } 3535 if (ha->tgt.atio_ring) 3536 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3537 3538 qla2x00_init_fce_trace(vha); 3539 if (ha->fce) 3540 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3541 qla2x00_init_eft_trace(vha); 3542 if (ha->eft) 3543 eft_size = EFT_SIZE; 3544 } 3545 3546 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3547 struct fwdt *fwdt = ha->fwdt; 3548 uint j; 3549 3550 for (j = 0; j < 2; j++, fwdt++) { 3551 if (!fwdt->template) { 3552 ql_dbg(ql_dbg_init, vha, 0x00ba, 3553 "-> fwdt%u no template\n", j); 3554 continue; 3555 } 3556 ql_dbg(ql_dbg_init, vha, 0x00fa, 3557 "-> fwdt%u calculating fwdump size...\n", j); 3558 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3559 vha, fwdt->template); 3560 ql_dbg(ql_dbg_init, vha, 0x00fa, 3561 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3562 j, fwdt->dump_size); 3563 dump_size += fwdt->dump_size; 3564 } 3565 /* Add space for spare MPI fw dump. */ 3566 dump_size += ha->fwdt[1].dump_size; 3567 } else { 3568 req_q_size = req->length * sizeof(request_t); 3569 rsp_q_size = rsp->length * sizeof(response_t); 3570 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3571 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3572 + eft_size; 3573 ha->chain_offset = dump_size; 3574 dump_size += mq_size + fce_size; 3575 if (ha->exchoffld_buf) 3576 dump_size += sizeof(struct qla2xxx_offld_chain) + 3577 ha->exchoffld_size; 3578 if (ha->exlogin_buf) 3579 dump_size += sizeof(struct qla2xxx_offld_chain) + 3580 ha->exlogin_size; 3581 } 3582 3583 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3584 3585 ql_dbg(ql_dbg_init, vha, 0x00c5, 3586 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3587 __func__, dump_size, ha->fw_dump_len, 3588 ha->fw_dump_alloc_len); 3589 3590 fw_dump = vmalloc(dump_size); 3591 if (!fw_dump) { 3592 ql_log(ql_log_warn, vha, 0x00c4, 3593 "Unable to allocate (%d KB) for firmware dump.\n", 3594 dump_size / 1024); 3595 } else { 3596 mutex_lock(&ha->optrom_mutex); 3597 if (ha->fw_dumped) { 3598 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3599 vfree(ha->fw_dump); 3600 ha->fw_dump = fw_dump; 3601 ha->fw_dump_alloc_len = dump_size; 3602 ql_dbg(ql_dbg_init, vha, 0x00c5, 3603 "Re-Allocated (%d KB) and save firmware dump.\n", 3604 dump_size / 1024); 3605 } else { 3606 vfree(ha->fw_dump); 3607 ha->fw_dump = fw_dump; 3608 3609 ha->fw_dump_len = ha->fw_dump_alloc_len = 3610 dump_size; 3611 ql_dbg(ql_dbg_init, vha, 0x00c5, 3612 "Allocated (%d KB) for firmware dump.\n", 3613 dump_size / 1024); 3614 3615 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3616 ha->mpi_fw_dump = (char *)fw_dump + 3617 ha->fwdt[1].dump_size; 3618 mutex_unlock(&ha->optrom_mutex); 3619 return; 3620 } 3621 3622 ha->fw_dump->signature[0] = 'Q'; 3623 ha->fw_dump->signature[1] = 'L'; 3624 ha->fw_dump->signature[2] = 'G'; 3625 ha->fw_dump->signature[3] = 'C'; 3626 ha->fw_dump->version = htonl(1); 3627 3628 ha->fw_dump->fixed_size = htonl(fixed_size); 3629 ha->fw_dump->mem_size = htonl(mem_size); 3630 ha->fw_dump->req_q_size = htonl(req_q_size); 3631 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3632 3633 ha->fw_dump->eft_size = htonl(eft_size); 3634 ha->fw_dump->eft_addr_l = 3635 htonl(LSD(ha->eft_dma)); 3636 ha->fw_dump->eft_addr_h = 3637 htonl(MSD(ha->eft_dma)); 3638 3639 ha->fw_dump->header_size = 3640 htonl(offsetof 3641 (struct qla2xxx_fw_dump, isp)); 3642 } 3643 mutex_unlock(&ha->optrom_mutex); 3644 } 3645 } 3646 } 3647 3648 static int 3649 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3650 { 3651 #define MPS_MASK 0xe0 3652 int rval; 3653 uint16_t dc; 3654 uint32_t dw; 3655 3656 if (!IS_QLA81XX(vha->hw)) 3657 return QLA_SUCCESS; 3658 3659 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3660 if (rval != QLA_SUCCESS) { 3661 ql_log(ql_log_warn, vha, 0x0105, 3662 "Unable to acquire semaphore.\n"); 3663 goto done; 3664 } 3665 3666 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3667 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3668 if (rval != QLA_SUCCESS) { 3669 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3670 goto done_release; 3671 } 3672 3673 dc &= MPS_MASK; 3674 if (dc == (dw & MPS_MASK)) 3675 goto done_release; 3676 3677 dw &= ~MPS_MASK; 3678 dw |= dc; 3679 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3680 if (rval != QLA_SUCCESS) { 3681 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3682 } 3683 3684 done_release: 3685 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3686 if (rval != QLA_SUCCESS) { 3687 ql_log(ql_log_warn, vha, 0x006d, 3688 "Unable to release semaphore.\n"); 3689 } 3690 3691 done: 3692 return rval; 3693 } 3694 3695 int 3696 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3697 { 3698 /* Don't try to reallocate the array */ 3699 if (req->outstanding_cmds) 3700 return QLA_SUCCESS; 3701 3702 if (!IS_FWI2_CAPABLE(ha)) 3703 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3704 else { 3705 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3706 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3707 else 3708 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3709 } 3710 3711 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3712 sizeof(srb_t *), 3713 GFP_KERNEL); 3714 3715 if (!req->outstanding_cmds) { 3716 /* 3717 * Try to allocate a minimal size just so we can get through 3718 * initialization. 3719 */ 3720 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3721 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3722 sizeof(srb_t *), 3723 GFP_KERNEL); 3724 3725 if (!req->outstanding_cmds) { 3726 ql_log(ql_log_fatal, NULL, 0x0126, 3727 "Failed to allocate memory for " 3728 "outstanding_cmds for req_que %p.\n", req); 3729 req->num_outstanding_cmds = 0; 3730 return QLA_FUNCTION_FAILED; 3731 } 3732 } 3733 3734 return QLA_SUCCESS; 3735 } 3736 3737 #define PRINT_FIELD(_field, _flag, _str) { \ 3738 if (a0->_field & _flag) {\ 3739 if (p) {\ 3740 strcat(ptr, "|");\ 3741 ptr++;\ 3742 leftover--;\ 3743 } \ 3744 len = snprintf(ptr, leftover, "%s", _str); \ 3745 p = 1;\ 3746 leftover -= len;\ 3747 ptr += len; \ 3748 } \ 3749 } 3750 3751 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3752 { 3753 #define STR_LEN 64 3754 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3755 u8 str[STR_LEN], *ptr, p; 3756 int leftover, len; 3757 3758 memset(str, 0, STR_LEN); 3759 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3760 ql_dbg(ql_dbg_init, vha, 0x015a, 3761 "SFP MFG Name: %s\n", str); 3762 3763 memset(str, 0, STR_LEN); 3764 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3765 ql_dbg(ql_dbg_init, vha, 0x015c, 3766 "SFP Part Name: %s\n", str); 3767 3768 /* media */ 3769 memset(str, 0, STR_LEN); 3770 ptr = str; 3771 leftover = STR_LEN; 3772 p = len = 0; 3773 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3774 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3775 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3776 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3777 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3778 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3779 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3780 ql_dbg(ql_dbg_init, vha, 0x0160, 3781 "SFP Media: %s\n", str); 3782 3783 /* link length */ 3784 memset(str, 0, STR_LEN); 3785 ptr = str; 3786 leftover = STR_LEN; 3787 p = len = 0; 3788 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3789 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3790 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3791 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3792 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3793 ql_dbg(ql_dbg_init, vha, 0x0196, 3794 "SFP Link Length: %s\n", str); 3795 3796 memset(str, 0, STR_LEN); 3797 ptr = str; 3798 leftover = STR_LEN; 3799 p = len = 0; 3800 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3801 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3802 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3803 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3804 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3805 ql_dbg(ql_dbg_init, vha, 0x016e, 3806 "SFP FC Link Tech: %s\n", str); 3807 3808 if (a0->length_km) 3809 ql_dbg(ql_dbg_init, vha, 0x016f, 3810 "SFP Distant: %d km\n", a0->length_km); 3811 if (a0->length_100m) 3812 ql_dbg(ql_dbg_init, vha, 0x0170, 3813 "SFP Distant: %d m\n", a0->length_100m*100); 3814 if (a0->length_50um_10m) 3815 ql_dbg(ql_dbg_init, vha, 0x0189, 3816 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3817 if (a0->length_62um_10m) 3818 ql_dbg(ql_dbg_init, vha, 0x018a, 3819 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3820 if (a0->length_om4_10m) 3821 ql_dbg(ql_dbg_init, vha, 0x0194, 3822 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3823 if (a0->length_om3_10m) 3824 ql_dbg(ql_dbg_init, vha, 0x0195, 3825 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3826 } 3827 3828 3829 /** 3830 * qla24xx_detect_sfp() 3831 * 3832 * @vha: adapter state pointer. 3833 * 3834 * @return 3835 * 0 -- Configure firmware to use short-range settings -- normal 3836 * buffer-to-buffer credits. 3837 * 3838 * 1 -- Configure firmware to use long-range settings -- extra 3839 * buffer-to-buffer credits should be allocated with 3840 * ha->lr_distance containing distance settings from NVRAM or SFP 3841 * (if supported). 3842 */ 3843 int 3844 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3845 { 3846 int rc, used_nvram; 3847 struct sff_8247_a0 *a; 3848 struct qla_hw_data *ha = vha->hw; 3849 struct nvram_81xx *nv = ha->nvram; 3850 #define LR_DISTANCE_UNKNOWN 2 3851 static const char * const types[] = { "Short", "Long" }; 3852 static const char * const lengths[] = { "(10km)", "(5km)", "" }; 3853 u8 ll = 0; 3854 3855 /* Seed with NVRAM settings. */ 3856 used_nvram = 0; 3857 ha->flags.lr_detected = 0; 3858 if (IS_BPM_RANGE_CAPABLE(ha) && 3859 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) { 3860 used_nvram = 1; 3861 ha->flags.lr_detected = 1; 3862 ha->lr_distance = 3863 (nv->enhanced_features >> LR_DIST_NV_POS) 3864 & LR_DIST_NV_MASK; 3865 } 3866 3867 if (!IS_BPM_ENABLED(vha)) 3868 goto out; 3869 /* Determine SR/LR capabilities of SFP/Transceiver. */ 3870 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3871 if (rc) 3872 goto out; 3873 3874 used_nvram = 0; 3875 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3876 qla2xxx_print_sfp_info(vha); 3877 3878 ha->flags.lr_detected = 0; 3879 ll = a->fc_ll_cc7; 3880 if (ll & FC_LL_VL || ll & FC_LL_L) { 3881 /* Long range, track length. */ 3882 ha->flags.lr_detected = 1; 3883 3884 if (a->length_km > 5 || a->length_100m > 50) 3885 ha->lr_distance = LR_DISTANCE_10K; 3886 else 3887 ha->lr_distance = LR_DISTANCE_5K; 3888 } 3889 3890 out: 3891 ql_dbg(ql_dbg_async, vha, 0x507b, 3892 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n", 3893 types[ha->flags.lr_detected], 3894 ha->flags.lr_detected ? lengths[ha->lr_distance] : 3895 lengths[LR_DISTANCE_UNKNOWN], 3896 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance); 3897 return ha->flags.lr_detected; 3898 } 3899 3900 void qla_init_iocb_limit(scsi_qla_host_t *vha) 3901 { 3902 u16 i, num_qps; 3903 u32 limit; 3904 struct qla_hw_data *ha = vha->hw; 3905 3906 num_qps = ha->num_qpairs + 1; 3907 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100; 3908 3909 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count; 3910 ha->base_qpair->fwres.iocbs_limit = limit; 3911 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps; 3912 ha->base_qpair->fwres.iocbs_used = 0; 3913 for (i = 0; i < ha->max_qpairs; i++) { 3914 if (ha->queue_pair_map[i]) { 3915 ha->queue_pair_map[i]->fwres.iocbs_total = 3916 ha->orig_fw_iocb_count; 3917 ha->queue_pair_map[i]->fwres.iocbs_limit = limit; 3918 ha->queue_pair_map[i]->fwres.iocbs_qp_limit = 3919 limit / num_qps; 3920 ha->queue_pair_map[i]->fwres.iocbs_used = 0; 3921 } 3922 } 3923 } 3924 3925 /** 3926 * qla2x00_setup_chip() - Load and start RISC firmware. 3927 * @vha: HA context 3928 * 3929 * Returns 0 on success. 3930 */ 3931 static int 3932 qla2x00_setup_chip(scsi_qla_host_t *vha) 3933 { 3934 int rval; 3935 uint32_t srisc_address = 0; 3936 struct qla_hw_data *ha = vha->hw; 3937 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3938 unsigned long flags; 3939 uint16_t fw_major_version; 3940 int done_once = 0; 3941 3942 if (IS_P3P_TYPE(ha)) { 3943 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3944 if (rval == QLA_SUCCESS) { 3945 qla2x00_stop_firmware(vha); 3946 goto enable_82xx_npiv; 3947 } else 3948 goto failed; 3949 } 3950 3951 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3952 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3953 spin_lock_irqsave(&ha->hardware_lock, flags); 3954 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3955 rd_reg_word(®->hccr); 3956 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3957 } 3958 3959 qla81xx_mpi_sync(vha); 3960 3961 execute_fw_with_lr: 3962 /* Load firmware sequences */ 3963 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3964 if (rval == QLA_SUCCESS) { 3965 ql_dbg(ql_dbg_init, vha, 0x00c9, 3966 "Verifying Checksum of loaded RISC code.\n"); 3967 3968 rval = qla2x00_verify_checksum(vha, srisc_address); 3969 if (rval == QLA_SUCCESS) { 3970 /* Start firmware execution. */ 3971 ql_dbg(ql_dbg_init, vha, 0x00ca, 3972 "Starting firmware.\n"); 3973 3974 if (ql2xexlogins) 3975 ha->flags.exlogins_enabled = 1; 3976 3977 if (qla_is_exch_offld_enabled(vha)) 3978 ha->flags.exchoffld_enabled = 1; 3979 3980 rval = qla2x00_execute_fw(vha, srisc_address); 3981 /* Retrieve firmware information. */ 3982 if (rval == QLA_SUCCESS) { 3983 /* Enable BPM support? */ 3984 if (!done_once++ && qla24xx_detect_sfp(vha)) { 3985 ql_dbg(ql_dbg_init, vha, 0x00ca, 3986 "Re-starting firmware -- BPM.\n"); 3987 /* Best-effort - re-init. */ 3988 ha->isp_ops->reset_chip(vha); 3989 ha->isp_ops->chip_diag(vha); 3990 goto execute_fw_with_lr; 3991 } 3992 3993 if (IS_ZIO_THRESHOLD_CAPABLE(ha)) 3994 qla27xx_set_zio_threshold(vha, 3995 ha->last_zio_threshold); 3996 3997 rval = qla2x00_set_exlogins_buffer(vha); 3998 if (rval != QLA_SUCCESS) 3999 goto failed; 4000 4001 rval = qla2x00_set_exchoffld_buffer(vha); 4002 if (rval != QLA_SUCCESS) 4003 goto failed; 4004 4005 enable_82xx_npiv: 4006 fw_major_version = ha->fw_major_version; 4007 if (IS_P3P_TYPE(ha)) 4008 qla82xx_check_md_needed(vha); 4009 else 4010 rval = qla2x00_get_fw_version(vha); 4011 if (rval != QLA_SUCCESS) 4012 goto failed; 4013 ha->flags.npiv_supported = 0; 4014 if (IS_QLA2XXX_MIDTYPE(ha) && 4015 (ha->fw_attributes & BIT_2)) { 4016 ha->flags.npiv_supported = 1; 4017 if ((!ha->max_npiv_vports) || 4018 ((ha->max_npiv_vports + 1) % 4019 MIN_MULTI_ID_FABRIC)) 4020 ha->max_npiv_vports = 4021 MIN_MULTI_ID_FABRIC - 1; 4022 } 4023 qla2x00_get_resource_cnts(vha); 4024 qla_init_iocb_limit(vha); 4025 4026 /* 4027 * Allocate the array of outstanding commands 4028 * now that we know the firmware resources. 4029 */ 4030 rval = qla2x00_alloc_outstanding_cmds(ha, 4031 vha->req); 4032 if (rval != QLA_SUCCESS) 4033 goto failed; 4034 4035 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 4036 qla2x00_alloc_offload_mem(vha); 4037 4038 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 4039 qla2x00_alloc_fw_dump(vha); 4040 4041 } else { 4042 goto failed; 4043 } 4044 } else { 4045 ql_log(ql_log_fatal, vha, 0x00cd, 4046 "ISP Firmware failed checksum.\n"); 4047 goto failed; 4048 } 4049 4050 /* Enable PUREX PASSTHRU */ 4051 if (ql2xrdpenable || ha->flags.scm_supported_f || 4052 ha->flags.edif_enabled) 4053 qla25xx_set_els_cmds_supported(vha); 4054 } else 4055 goto failed; 4056 4057 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 4058 /* Enable proper parity. */ 4059 spin_lock_irqsave(&ha->hardware_lock, flags); 4060 if (IS_QLA2300(ha)) 4061 /* SRAM parity */ 4062 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1); 4063 else 4064 /* SRAM, Instruction RAM and GP RAM parity */ 4065 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7); 4066 rd_reg_word(®->hccr); 4067 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4068 } 4069 4070 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 4071 ha->flags.fac_supported = 1; 4072 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 4073 uint32_t size; 4074 4075 rval = qla81xx_fac_get_sector_size(vha, &size); 4076 if (rval == QLA_SUCCESS) { 4077 ha->flags.fac_supported = 1; 4078 ha->fdt_block_size = size << 2; 4079 } else { 4080 ql_log(ql_log_warn, vha, 0x00ce, 4081 "Unsupported FAC firmware (%d.%02d.%02d).\n", 4082 ha->fw_major_version, ha->fw_minor_version, 4083 ha->fw_subminor_version); 4084 4085 if (IS_QLA83XX(ha)) { 4086 ha->flags.fac_supported = 0; 4087 rval = QLA_SUCCESS; 4088 } 4089 } 4090 } 4091 failed: 4092 if (rval) { 4093 ql_log(ql_log_fatal, vha, 0x00cf, 4094 "Setup chip ****FAILED****.\n"); 4095 } 4096 4097 return (rval); 4098 } 4099 4100 /** 4101 * qla2x00_init_response_q_entries() - Initializes response queue entries. 4102 * @rsp: response queue 4103 * 4104 * Beginning of request ring has initialization control block already built 4105 * by nvram config routine. 4106 * 4107 * Returns 0 on success. 4108 */ 4109 void 4110 qla2x00_init_response_q_entries(struct rsp_que *rsp) 4111 { 4112 uint16_t cnt; 4113 response_t *pkt; 4114 4115 rsp->ring_ptr = rsp->ring; 4116 rsp->ring_index = 0; 4117 rsp->status_srb = NULL; 4118 pkt = rsp->ring_ptr; 4119 for (cnt = 0; cnt < rsp->length; cnt++) { 4120 pkt->signature = RESPONSE_PROCESSED; 4121 pkt++; 4122 } 4123 } 4124 4125 /** 4126 * qla2x00_update_fw_options() - Read and process firmware options. 4127 * @vha: HA context 4128 * 4129 * Returns 0 on success. 4130 */ 4131 void 4132 qla2x00_update_fw_options(scsi_qla_host_t *vha) 4133 { 4134 uint16_t swing, emphasis, tx_sens, rx_sens; 4135 struct qla_hw_data *ha = vha->hw; 4136 4137 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 4138 qla2x00_get_fw_options(vha, ha->fw_options); 4139 4140 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4141 return; 4142 4143 /* Serial Link options. */ 4144 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 4145 "Serial link options.\n"); 4146 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 4147 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 4148 4149 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 4150 if (ha->fw_seriallink_options[3] & BIT_2) { 4151 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 4152 4153 /* 1G settings */ 4154 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 4155 emphasis = (ha->fw_seriallink_options[2] & 4156 (BIT_4 | BIT_3)) >> 3; 4157 tx_sens = ha->fw_seriallink_options[0] & 4158 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4159 rx_sens = (ha->fw_seriallink_options[0] & 4160 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4161 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 4162 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4163 if (rx_sens == 0x0) 4164 rx_sens = 0x3; 4165 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 4166 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4167 ha->fw_options[10] |= BIT_5 | 4168 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4169 (tx_sens & (BIT_1 | BIT_0)); 4170 4171 /* 2G settings */ 4172 swing = (ha->fw_seriallink_options[2] & 4173 (BIT_7 | BIT_6 | BIT_5)) >> 5; 4174 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 4175 tx_sens = ha->fw_seriallink_options[1] & 4176 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4177 rx_sens = (ha->fw_seriallink_options[1] & 4178 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 4179 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 4180 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 4181 if (rx_sens == 0x0) 4182 rx_sens = 0x3; 4183 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 4184 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 4185 ha->fw_options[11] |= BIT_5 | 4186 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 4187 (tx_sens & (BIT_1 | BIT_0)); 4188 } 4189 4190 /* FCP2 options. */ 4191 /* Return command IOCBs without waiting for an ABTS to complete. */ 4192 ha->fw_options[3] |= BIT_13; 4193 4194 /* LED scheme. */ 4195 if (ha->flags.enable_led_scheme) 4196 ha->fw_options[2] |= BIT_12; 4197 4198 /* Detect ISP6312. */ 4199 if (IS_QLA6312(ha)) 4200 ha->fw_options[2] |= BIT_13; 4201 4202 /* Set Retry FLOGI in case of P2P connection */ 4203 if (ha->operating_mode == P2P) { 4204 ha->fw_options[2] |= BIT_3; 4205 ql_dbg(ql_dbg_disc, vha, 0x2100, 4206 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4207 __func__, ha->fw_options[2]); 4208 } 4209 4210 /* Update firmware options. */ 4211 qla2x00_set_fw_options(vha, ha->fw_options); 4212 } 4213 4214 void 4215 qla24xx_update_fw_options(scsi_qla_host_t *vha) 4216 { 4217 int rval; 4218 struct qla_hw_data *ha = vha->hw; 4219 4220 if (IS_P3P_TYPE(ha)) 4221 return; 4222 4223 /* Hold status IOCBs until ABTS response received. */ 4224 if (ql2xfwholdabts) 4225 ha->fw_options[3] |= BIT_12; 4226 4227 /* Set Retry FLOGI in case of P2P connection */ 4228 if (ha->operating_mode == P2P) { 4229 ha->fw_options[2] |= BIT_3; 4230 ql_dbg(ql_dbg_disc, vha, 0x2101, 4231 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4232 __func__, ha->fw_options[2]); 4233 } 4234 4235 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 4236 if (ql2xmvasynctoatio && !ha->flags.edif_enabled && 4237 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 4238 if (qla_tgt_mode_enabled(vha) || 4239 qla_dual_mode_enabled(vha)) 4240 ha->fw_options[2] |= BIT_11; 4241 else 4242 ha->fw_options[2] &= ~BIT_11; 4243 } 4244 4245 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4246 IS_QLA28XX(ha)) { 4247 /* 4248 * Tell FW to track each exchange to prevent 4249 * driver from using stale exchange. 4250 */ 4251 if (qla_tgt_mode_enabled(vha) || 4252 qla_dual_mode_enabled(vha)) 4253 ha->fw_options[2] |= BIT_4; 4254 else 4255 ha->fw_options[2] &= ~(BIT_4); 4256 4257 /* Reserve 1/2 of emergency exchanges for ELS.*/ 4258 if (qla2xuseresexchforels) 4259 ha->fw_options[2] |= BIT_8; 4260 else 4261 ha->fw_options[2] &= ~BIT_8; 4262 4263 /* 4264 * N2N: set Secure=1 for PLOGI ACC and 4265 * fw shal not send PRLI after PLOGI Acc 4266 */ 4267 if (ha->flags.edif_enabled && 4268 DBELL_ACTIVE(vha)) { 4269 ha->fw_options[3] |= BIT_15; 4270 ha->flags.n2n_fw_acc_sec = 1; 4271 } else { 4272 ha->fw_options[3] &= ~BIT_15; 4273 ha->flags.n2n_fw_acc_sec = 0; 4274 } 4275 } 4276 4277 if (ql2xrdpenable || ha->flags.scm_supported_f || 4278 ha->flags.edif_enabled) 4279 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB; 4280 4281 /* Enable Async 8130/8131 events -- transceiver insertion/removal */ 4282 if (IS_BPM_RANGE_CAPABLE(ha)) 4283 ha->fw_options[3] |= BIT_10; 4284 4285 ql_dbg(ql_dbg_init, vha, 0x00e8, 4286 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 4287 __func__, ha->fw_options[1], ha->fw_options[2], 4288 ha->fw_options[3], vha->host->active_mode); 4289 4290 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 4291 qla2x00_set_fw_options(vha, ha->fw_options); 4292 4293 /* Update Serial Link options. */ 4294 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 4295 return; 4296 4297 rval = qla2x00_set_serdes_params(vha, 4298 le16_to_cpu(ha->fw_seriallink_options24[1]), 4299 le16_to_cpu(ha->fw_seriallink_options24[2]), 4300 le16_to_cpu(ha->fw_seriallink_options24[3])); 4301 if (rval != QLA_SUCCESS) { 4302 ql_log(ql_log_warn, vha, 0x0104, 4303 "Unable to update Serial Link options (%x).\n", rval); 4304 } 4305 } 4306 4307 void 4308 qla2x00_config_rings(struct scsi_qla_host *vha) 4309 { 4310 struct qla_hw_data *ha = vha->hw; 4311 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4312 struct req_que *req = ha->req_q_map[0]; 4313 struct rsp_que *rsp = ha->rsp_q_map[0]; 4314 4315 /* Setup ring parameters in initialization control block. */ 4316 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 4317 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 4318 ha->init_cb->request_q_length = cpu_to_le16(req->length); 4319 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 4320 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 4321 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 4322 4323 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0); 4324 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0); 4325 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0); 4326 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0); 4327 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 4328 } 4329 4330 void 4331 qla24xx_config_rings(struct scsi_qla_host *vha) 4332 { 4333 struct qla_hw_data *ha = vha->hw; 4334 device_reg_t *reg = ISP_QUE_REG(ha, 0); 4335 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 4336 struct qla_msix_entry *msix; 4337 struct init_cb_24xx *icb; 4338 uint16_t rid = 0; 4339 struct req_que *req = ha->req_q_map[0]; 4340 struct rsp_que *rsp = ha->rsp_q_map[0]; 4341 4342 /* Setup ring parameters in initialization control block. */ 4343 icb = (struct init_cb_24xx *)ha->init_cb; 4344 icb->request_q_outpointer = cpu_to_le16(0); 4345 icb->response_q_inpointer = cpu_to_le16(0); 4346 icb->request_q_length = cpu_to_le16(req->length); 4347 icb->response_q_length = cpu_to_le16(rsp->length); 4348 put_unaligned_le64(req->dma, &icb->request_q_address); 4349 put_unaligned_le64(rsp->dma, &icb->response_q_address); 4350 4351 /* Setup ATIO queue dma pointers for target mode */ 4352 icb->atio_q_inpointer = cpu_to_le16(0); 4353 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 4354 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 4355 4356 if (IS_SHADOW_REG_CAPABLE(ha)) 4357 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 4358 4359 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4360 IS_QLA28XX(ha)) { 4361 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 4362 icb->rid = cpu_to_le16(rid); 4363 if (ha->flags.msix_enabled) { 4364 msix = &ha->msix_entries[1]; 4365 ql_dbg(ql_dbg_init, vha, 0x0019, 4366 "Registering vector 0x%x for base que.\n", 4367 msix->entry); 4368 icb->msix = cpu_to_le16(msix->entry); 4369 } 4370 /* Use alternate PCI bus number */ 4371 if (MSB(rid)) 4372 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 4373 /* Use alternate PCI devfn */ 4374 if (LSB(rid)) 4375 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 4376 4377 /* Use Disable MSIX Handshake mode for capable adapters */ 4378 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 4379 (ha->flags.msix_enabled)) { 4380 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 4381 ha->flags.disable_msix_handshake = 1; 4382 ql_dbg(ql_dbg_init, vha, 0x00fe, 4383 "MSIX Handshake Disable Mode turned on.\n"); 4384 } else { 4385 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 4386 } 4387 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4388 4389 wrt_reg_dword(®->isp25mq.req_q_in, 0); 4390 wrt_reg_dword(®->isp25mq.req_q_out, 0); 4391 wrt_reg_dword(®->isp25mq.rsp_q_in, 0); 4392 wrt_reg_dword(®->isp25mq.rsp_q_out, 0); 4393 } else { 4394 wrt_reg_dword(®->isp24.req_q_in, 0); 4395 wrt_reg_dword(®->isp24.req_q_out, 0); 4396 wrt_reg_dword(®->isp24.rsp_q_in, 0); 4397 wrt_reg_dword(®->isp24.rsp_q_out, 0); 4398 } 4399 4400 qlt_24xx_config_rings(vha); 4401 4402 /* If the user has configured the speed, set it here */ 4403 if (ha->set_data_rate) { 4404 ql_dbg(ql_dbg_init, vha, 0x00fd, 4405 "Speed set by user : %s Gbps \n", 4406 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4407 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13); 4408 } 4409 4410 /* PCI posting */ 4411 rd_reg_word(&ioreg->hccr); 4412 } 4413 4414 /** 4415 * qla2x00_init_rings() - Initializes firmware. 4416 * @vha: HA context 4417 * 4418 * Beginning of request ring has initialization control block already built 4419 * by nvram config routine. 4420 * 4421 * Returns 0 on success. 4422 */ 4423 int 4424 qla2x00_init_rings(scsi_qla_host_t *vha) 4425 { 4426 int rval; 4427 unsigned long flags = 0; 4428 int cnt, que; 4429 struct qla_hw_data *ha = vha->hw; 4430 struct req_que *req; 4431 struct rsp_que *rsp; 4432 struct mid_init_cb_24xx *mid_init_cb = 4433 (struct mid_init_cb_24xx *) ha->init_cb; 4434 4435 spin_lock_irqsave(&ha->hardware_lock, flags); 4436 4437 /* Clear outstanding commands array. */ 4438 for (que = 0; que < ha->max_req_queues; que++) { 4439 req = ha->req_q_map[que]; 4440 if (!req || !test_bit(que, ha->req_qid_map)) 4441 continue; 4442 req->out_ptr = (uint16_t *)(req->ring + req->length); 4443 *req->out_ptr = 0; 4444 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4445 req->outstanding_cmds[cnt] = NULL; 4446 4447 req->current_outstanding_cmd = 1; 4448 4449 /* Initialize firmware. */ 4450 req->ring_ptr = req->ring; 4451 req->ring_index = 0; 4452 req->cnt = req->length; 4453 } 4454 4455 for (que = 0; que < ha->max_rsp_queues; que++) { 4456 rsp = ha->rsp_q_map[que]; 4457 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4458 continue; 4459 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length); 4460 *rsp->in_ptr = 0; 4461 /* Initialize response queue entries */ 4462 if (IS_QLAFX00(ha)) 4463 qlafx00_init_response_q_entries(rsp); 4464 else 4465 qla2x00_init_response_q_entries(rsp); 4466 } 4467 4468 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4469 ha->tgt.atio_ring_index = 0; 4470 /* Initialize ATIO queue entries */ 4471 qlt_init_atio_q_entries(vha); 4472 4473 ha->isp_ops->config_rings(vha); 4474 4475 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4476 4477 if (IS_QLAFX00(ha)) { 4478 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4479 goto next_check; 4480 } 4481 4482 /* Update any ISP specific firmware options before initialization. */ 4483 ha->isp_ops->update_fw_options(vha); 4484 4485 ql_dbg(ql_dbg_init, vha, 0x00d1, 4486 "Issue init firmware FW opt 1-3= %08x %08x %08x.\n", 4487 le32_to_cpu(mid_init_cb->init_cb.firmware_options_1), 4488 le32_to_cpu(mid_init_cb->init_cb.firmware_options_2), 4489 le32_to_cpu(mid_init_cb->init_cb.firmware_options_3)); 4490 4491 if (ha->flags.npiv_supported) { 4492 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4493 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4494 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4495 } 4496 4497 if (IS_FWI2_CAPABLE(ha)) { 4498 mid_init_cb->options = cpu_to_le16(BIT_1); 4499 mid_init_cb->init_cb.execution_throttle = 4500 cpu_to_le16(ha->cur_fw_xcb_count); 4501 ha->flags.dport_enabled = 4502 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4503 BIT_7) != 0; 4504 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4505 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4506 /* FA-WWPN Status */ 4507 ha->flags.fawwpn_enabled = 4508 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4509 BIT_6) != 0; 4510 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4511 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4512 } 4513 4514 /* ELS pass through payload is limit by frame size. */ 4515 if (ha->flags.edif_enabled) 4516 mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD); 4517 4518 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4519 next_check: 4520 if (rval) { 4521 ql_log(ql_log_fatal, vha, 0x00d2, 4522 "Init Firmware **** FAILED ****.\n"); 4523 } else { 4524 ql_dbg(ql_dbg_init, vha, 0x00d3, 4525 "Init Firmware -- success.\n"); 4526 QLA_FW_STARTED(ha); 4527 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4528 } 4529 4530 return (rval); 4531 } 4532 4533 /** 4534 * qla2x00_fw_ready() - Waits for firmware ready. 4535 * @vha: HA context 4536 * 4537 * Returns 0 on success. 4538 */ 4539 static int 4540 qla2x00_fw_ready(scsi_qla_host_t *vha) 4541 { 4542 int rval; 4543 unsigned long wtime, mtime, cs84xx_time; 4544 uint16_t min_wait; /* Minimum wait time if loop is down */ 4545 uint16_t wait_time; /* Wait time if loop is coming ready */ 4546 uint16_t state[6]; 4547 struct qla_hw_data *ha = vha->hw; 4548 4549 if (IS_QLAFX00(vha->hw)) 4550 return qlafx00_fw_ready(vha); 4551 4552 /* Time to wait for loop down */ 4553 if (IS_P3P_TYPE(ha)) 4554 min_wait = 30; 4555 else 4556 min_wait = 20; 4557 4558 /* 4559 * Firmware should take at most one RATOV to login, plus 5 seconds for 4560 * our own processing. 4561 */ 4562 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4563 wait_time = min_wait; 4564 } 4565 4566 /* Min wait time if loop down */ 4567 mtime = jiffies + (min_wait * HZ); 4568 4569 /* wait time before firmware ready */ 4570 wtime = jiffies + (wait_time * HZ); 4571 4572 /* Wait for ISP to finish LIP */ 4573 if (!vha->flags.init_done) 4574 ql_log(ql_log_info, vha, 0x801e, 4575 "Waiting for LIP to complete.\n"); 4576 4577 do { 4578 memset(state, -1, sizeof(state)); 4579 rval = qla2x00_get_firmware_state(vha, state); 4580 if (rval == QLA_SUCCESS) { 4581 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4582 vha->device_flags &= ~DFLG_NO_CABLE; 4583 } 4584 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4585 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4586 "fw_state=%x 84xx=%x.\n", state[0], 4587 state[2]); 4588 if ((state[2] & FSTATE_LOGGED_IN) && 4589 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4590 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4591 "Sending verify iocb.\n"); 4592 4593 cs84xx_time = jiffies; 4594 rval = qla84xx_init_chip(vha); 4595 if (rval != QLA_SUCCESS) { 4596 ql_log(ql_log_warn, 4597 vha, 0x8007, 4598 "Init chip failed.\n"); 4599 break; 4600 } 4601 4602 /* Add time taken to initialize. */ 4603 cs84xx_time = jiffies - cs84xx_time; 4604 wtime += cs84xx_time; 4605 mtime += cs84xx_time; 4606 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4607 "Increasing wait time by %ld. " 4608 "New time %ld.\n", cs84xx_time, 4609 wtime); 4610 } 4611 } else if (state[0] == FSTATE_READY) { 4612 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4613 "F/W Ready - OK.\n"); 4614 4615 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4616 &ha->login_timeout, &ha->r_a_tov); 4617 4618 rval = QLA_SUCCESS; 4619 break; 4620 } 4621 4622 rval = QLA_FUNCTION_FAILED; 4623 4624 if (atomic_read(&vha->loop_down_timer) && 4625 state[0] != FSTATE_READY) { 4626 /* Loop down. Timeout on min_wait for states 4627 * other than Wait for Login. 4628 */ 4629 if (time_after_eq(jiffies, mtime)) { 4630 ql_log(ql_log_info, vha, 0x8038, 4631 "Cable is unplugged...\n"); 4632 4633 vha->device_flags |= DFLG_NO_CABLE; 4634 break; 4635 } 4636 } 4637 } else { 4638 /* Mailbox cmd failed. Timeout on min_wait. */ 4639 if (time_after_eq(jiffies, mtime) || 4640 ha->flags.isp82xx_fw_hung) 4641 break; 4642 } 4643 4644 if (time_after_eq(jiffies, wtime)) 4645 break; 4646 4647 /* Delay for a while */ 4648 msleep(500); 4649 } while (1); 4650 4651 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4652 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4653 state[1], state[2], state[3], state[4], state[5], jiffies); 4654 4655 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4656 ql_log(ql_log_warn, vha, 0x803b, 4657 "Firmware ready **** FAILED ****.\n"); 4658 } 4659 4660 return (rval); 4661 } 4662 4663 /* 4664 * qla2x00_configure_hba 4665 * Setup adapter context. 4666 * 4667 * Input: 4668 * ha = adapter state pointer. 4669 * 4670 * Returns: 4671 * 0 = success 4672 * 4673 * Context: 4674 * Kernel context. 4675 */ 4676 static int 4677 qla2x00_configure_hba(scsi_qla_host_t *vha) 4678 { 4679 int rval; 4680 uint16_t loop_id; 4681 uint16_t topo; 4682 uint16_t sw_cap; 4683 uint8_t al_pa; 4684 uint8_t area; 4685 uint8_t domain; 4686 char connect_type[22]; 4687 struct qla_hw_data *ha = vha->hw; 4688 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4689 port_id_t id; 4690 unsigned long flags; 4691 4692 /* Get host addresses. */ 4693 rval = qla2x00_get_adapter_id(vha, 4694 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4695 if (rval != QLA_SUCCESS) { 4696 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4697 IS_CNA_CAPABLE(ha) || 4698 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4699 ql_dbg(ql_dbg_disc, vha, 0x2008, 4700 "Loop is in a transition state.\n"); 4701 } else { 4702 ql_log(ql_log_warn, vha, 0x2009, 4703 "Unable to get host loop ID.\n"); 4704 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4705 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4706 ql_log(ql_log_warn, vha, 0x1151, 4707 "Doing link init.\n"); 4708 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4709 return rval; 4710 } 4711 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4712 } 4713 return (rval); 4714 } 4715 4716 if (topo == 4) { 4717 ql_log(ql_log_info, vha, 0x200a, 4718 "Cannot get topology - retrying.\n"); 4719 return (QLA_FUNCTION_FAILED); 4720 } 4721 4722 vha->loop_id = loop_id; 4723 4724 /* initialize */ 4725 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4726 ha->operating_mode = LOOP; 4727 4728 switch (topo) { 4729 case 0: 4730 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4731 ha->switch_cap = 0; 4732 ha->current_topology = ISP_CFG_NL; 4733 strcpy(connect_type, "(Loop)"); 4734 break; 4735 4736 case 1: 4737 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4738 ha->switch_cap = sw_cap; 4739 ha->current_topology = ISP_CFG_FL; 4740 strcpy(connect_type, "(FL_Port)"); 4741 break; 4742 4743 case 2: 4744 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4745 ha->switch_cap = 0; 4746 ha->operating_mode = P2P; 4747 ha->current_topology = ISP_CFG_N; 4748 strcpy(connect_type, "(N_Port-to-N_Port)"); 4749 break; 4750 4751 case 3: 4752 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4753 ha->switch_cap = sw_cap; 4754 ha->operating_mode = P2P; 4755 ha->current_topology = ISP_CFG_F; 4756 strcpy(connect_type, "(F_Port)"); 4757 break; 4758 4759 default: 4760 ql_dbg(ql_dbg_disc, vha, 0x200f, 4761 "HBA in unknown topology %x, using NL.\n", topo); 4762 ha->switch_cap = 0; 4763 ha->current_topology = ISP_CFG_NL; 4764 strcpy(connect_type, "(Loop)"); 4765 break; 4766 } 4767 4768 /* Save Host port and loop ID. */ 4769 /* byte order - Big Endian */ 4770 id.b.domain = domain; 4771 id.b.area = area; 4772 id.b.al_pa = al_pa; 4773 id.b.rsvd_1 = 0; 4774 spin_lock_irqsave(&ha->hardware_lock, flags); 4775 if (vha->hw->flags.edif_enabled) { 4776 if (topo != 2) 4777 qlt_update_host_map(vha, id); 4778 } else if (!(topo == 2 && ha->flags.n2n_bigger)) 4779 qlt_update_host_map(vha, id); 4780 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4781 4782 if (!vha->flags.init_done) 4783 ql_log(ql_log_info, vha, 0x2010, 4784 "Topology - %s, Host Loop address 0x%x.\n", 4785 connect_type, vha->loop_id); 4786 4787 return(rval); 4788 } 4789 4790 inline void 4791 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4792 const char *def) 4793 { 4794 char *st, *en; 4795 uint16_t index; 4796 uint64_t zero[2] = { 0 }; 4797 struct qla_hw_data *ha = vha->hw; 4798 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4799 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4800 4801 if (len > sizeof(zero)) 4802 len = sizeof(zero); 4803 if (memcmp(model, &zero, len) != 0) { 4804 memcpy(ha->model_number, model, len); 4805 st = en = ha->model_number; 4806 en += len - 1; 4807 while (en > st) { 4808 if (*en != 0x20 && *en != 0x00) 4809 break; 4810 *en-- = '\0'; 4811 } 4812 4813 index = (ha->pdev->subsystem_device & 0xff); 4814 if (use_tbl && 4815 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4816 index < QLA_MODEL_NAMES) 4817 strlcpy(ha->model_desc, 4818 qla2x00_model_name[index * 2 + 1], 4819 sizeof(ha->model_desc)); 4820 } else { 4821 index = (ha->pdev->subsystem_device & 0xff); 4822 if (use_tbl && 4823 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4824 index < QLA_MODEL_NAMES) { 4825 strlcpy(ha->model_number, 4826 qla2x00_model_name[index * 2], 4827 sizeof(ha->model_number)); 4828 strlcpy(ha->model_desc, 4829 qla2x00_model_name[index * 2 + 1], 4830 sizeof(ha->model_desc)); 4831 } else { 4832 strlcpy(ha->model_number, def, 4833 sizeof(ha->model_number)); 4834 } 4835 } 4836 if (IS_FWI2_CAPABLE(ha)) 4837 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4838 sizeof(ha->model_desc)); 4839 } 4840 4841 /* On sparc systems, obtain port and node WWN from firmware 4842 * properties. 4843 */ 4844 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4845 { 4846 #ifdef CONFIG_SPARC 4847 struct qla_hw_data *ha = vha->hw; 4848 struct pci_dev *pdev = ha->pdev; 4849 struct device_node *dp = pci_device_to_OF_node(pdev); 4850 const u8 *val; 4851 int len; 4852 4853 val = of_get_property(dp, "port-wwn", &len); 4854 if (val && len >= WWN_SIZE) 4855 memcpy(nv->port_name, val, WWN_SIZE); 4856 4857 val = of_get_property(dp, "node-wwn", &len); 4858 if (val && len >= WWN_SIZE) 4859 memcpy(nv->node_name, val, WWN_SIZE); 4860 #endif 4861 } 4862 4863 /* 4864 * NVRAM configuration for ISP 2xxx 4865 * 4866 * Input: 4867 * ha = adapter block pointer. 4868 * 4869 * Output: 4870 * initialization control block in response_ring 4871 * host adapters parameters in host adapter block 4872 * 4873 * Returns: 4874 * 0 = success. 4875 */ 4876 int 4877 qla2x00_nvram_config(scsi_qla_host_t *vha) 4878 { 4879 int rval; 4880 uint8_t chksum = 0; 4881 uint16_t cnt; 4882 uint8_t *dptr1, *dptr2; 4883 struct qla_hw_data *ha = vha->hw; 4884 init_cb_t *icb = ha->init_cb; 4885 nvram_t *nv = ha->nvram; 4886 uint8_t *ptr = ha->nvram; 4887 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4888 4889 rval = QLA_SUCCESS; 4890 4891 /* Determine NVRAM starting address. */ 4892 ha->nvram_size = sizeof(*nv); 4893 ha->nvram_base = 0; 4894 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4895 if ((rd_reg_word(®->ctrl_status) >> 14) == 1) 4896 ha->nvram_base = 0x80; 4897 4898 /* Get NVRAM data and calculate checksum. */ 4899 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4900 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4901 chksum += *ptr++; 4902 4903 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4904 "Contents of NVRAM.\n"); 4905 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4906 nv, ha->nvram_size); 4907 4908 /* Bad NVRAM data, set defaults parameters. */ 4909 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 4910 nv->nvram_version < 1) { 4911 /* Reset NVRAM data. */ 4912 ql_log(ql_log_warn, vha, 0x0064, 4913 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 4914 chksum, nv->id, nv->nvram_version); 4915 ql_log(ql_log_warn, vha, 0x0065, 4916 "Falling back to " 4917 "functioning (yet invalid -- WWPN) defaults.\n"); 4918 4919 /* 4920 * Set default initialization control block. 4921 */ 4922 memset(nv, 0, ha->nvram_size); 4923 nv->parameter_block_version = ICB_VERSION; 4924 4925 if (IS_QLA23XX(ha)) { 4926 nv->firmware_options[0] = BIT_2 | BIT_1; 4927 nv->firmware_options[1] = BIT_7 | BIT_5; 4928 nv->add_firmware_options[0] = BIT_5; 4929 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4930 nv->frame_payload_size = cpu_to_le16(2048); 4931 nv->special_options[1] = BIT_7; 4932 } else if (IS_QLA2200(ha)) { 4933 nv->firmware_options[0] = BIT_2 | BIT_1; 4934 nv->firmware_options[1] = BIT_7 | BIT_5; 4935 nv->add_firmware_options[0] = BIT_5; 4936 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4937 nv->frame_payload_size = cpu_to_le16(1024); 4938 } else if (IS_QLA2100(ha)) { 4939 nv->firmware_options[0] = BIT_3 | BIT_1; 4940 nv->firmware_options[1] = BIT_5; 4941 nv->frame_payload_size = cpu_to_le16(1024); 4942 } 4943 4944 nv->max_iocb_allocation = cpu_to_le16(256); 4945 nv->execution_throttle = cpu_to_le16(16); 4946 nv->retry_count = 8; 4947 nv->retry_delay = 1; 4948 4949 nv->port_name[0] = 33; 4950 nv->port_name[3] = 224; 4951 nv->port_name[4] = 139; 4952 4953 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4954 4955 nv->login_timeout = 4; 4956 4957 /* 4958 * Set default host adapter parameters 4959 */ 4960 nv->host_p[1] = BIT_2; 4961 nv->reset_delay = 5; 4962 nv->port_down_retry_count = 8; 4963 nv->max_luns_per_target = cpu_to_le16(8); 4964 nv->link_down_timeout = 60; 4965 4966 rval = 1; 4967 } 4968 4969 /* Reset Initialization control block */ 4970 memset(icb, 0, ha->init_cb_size); 4971 4972 /* 4973 * Setup driver NVRAM options. 4974 */ 4975 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4976 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4977 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4978 nv->firmware_options[1] &= ~BIT_4; 4979 4980 if (IS_QLA23XX(ha)) { 4981 nv->firmware_options[0] |= BIT_2; 4982 nv->firmware_options[0] &= ~BIT_3; 4983 nv->special_options[0] &= ~BIT_6; 4984 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4985 4986 if (IS_QLA2300(ha)) { 4987 if (ha->fb_rev == FPM_2310) { 4988 strcpy(ha->model_number, "QLA2310"); 4989 } else { 4990 strcpy(ha->model_number, "QLA2300"); 4991 } 4992 } else { 4993 qla2x00_set_model_info(vha, nv->model_number, 4994 sizeof(nv->model_number), "QLA23xx"); 4995 } 4996 } else if (IS_QLA2200(ha)) { 4997 nv->firmware_options[0] |= BIT_2; 4998 /* 4999 * 'Point-to-point preferred, else loop' is not a safe 5000 * connection mode setting. 5001 */ 5002 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 5003 (BIT_5 | BIT_4)) { 5004 /* Force 'loop preferred, else point-to-point'. */ 5005 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 5006 nv->add_firmware_options[0] |= BIT_5; 5007 } 5008 strcpy(ha->model_number, "QLA22xx"); 5009 } else /*if (IS_QLA2100(ha))*/ { 5010 strcpy(ha->model_number, "QLA2100"); 5011 } 5012 5013 /* 5014 * Copy over NVRAM RISC parameter block to initialization control block. 5015 */ 5016 dptr1 = (uint8_t *)icb; 5017 dptr2 = (uint8_t *)&nv->parameter_block_version; 5018 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 5019 while (cnt--) 5020 *dptr1++ = *dptr2++; 5021 5022 /* Copy 2nd half. */ 5023 dptr1 = (uint8_t *)icb->add_firmware_options; 5024 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 5025 while (cnt--) 5026 *dptr1++ = *dptr2++; 5027 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 5028 /* Use alternate WWN? */ 5029 if (nv->host_p[1] & BIT_7) { 5030 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5031 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5032 } 5033 5034 /* Prepare nodename */ 5035 if ((icb->firmware_options[1] & BIT_6) == 0) { 5036 /* 5037 * Firmware will apply the following mask if the nodename was 5038 * not provided. 5039 */ 5040 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5041 icb->node_name[0] &= 0xF0; 5042 } 5043 5044 /* 5045 * Set host adapter parameters. 5046 */ 5047 5048 /* 5049 * BIT_7 in the host-parameters section allows for modification to 5050 * internal driver logging. 5051 */ 5052 if (nv->host_p[0] & BIT_7) 5053 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 5054 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 5055 /* Always load RISC code on non ISP2[12]00 chips. */ 5056 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 5057 ha->flags.disable_risc_code_load = 0; 5058 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 5059 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 5060 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 5061 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 5062 ha->flags.disable_serdes = 0; 5063 5064 ha->operating_mode = 5065 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 5066 5067 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 5068 sizeof(ha->fw_seriallink_options)); 5069 5070 /* save HBA serial number */ 5071 ha->serial0 = icb->port_name[5]; 5072 ha->serial1 = icb->port_name[6]; 5073 ha->serial2 = icb->port_name[7]; 5074 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5075 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5076 5077 icb->execution_throttle = cpu_to_le16(0xFFFF); 5078 5079 ha->retry_count = nv->retry_count; 5080 5081 /* Set minimum login_timeout to 4 seconds. */ 5082 if (nv->login_timeout != ql2xlogintimeout) 5083 nv->login_timeout = ql2xlogintimeout; 5084 if (nv->login_timeout < 4) 5085 nv->login_timeout = 4; 5086 ha->login_timeout = nv->login_timeout; 5087 5088 /* Set minimum RATOV to 100 tenths of a second. */ 5089 ha->r_a_tov = 100; 5090 5091 ha->loop_reset_delay = nv->reset_delay; 5092 5093 /* Link Down Timeout = 0: 5094 * 5095 * When Port Down timer expires we will start returning 5096 * I/O's to OS with "DID_NO_CONNECT". 5097 * 5098 * Link Down Timeout != 0: 5099 * 5100 * The driver waits for the link to come up after link down 5101 * before returning I/Os to OS with "DID_NO_CONNECT". 5102 */ 5103 if (nv->link_down_timeout == 0) { 5104 ha->loop_down_abort_time = 5105 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5106 } else { 5107 ha->link_down_timeout = nv->link_down_timeout; 5108 ha->loop_down_abort_time = 5109 (LOOP_DOWN_TIME - ha->link_down_timeout); 5110 } 5111 5112 /* 5113 * Need enough time to try and get the port back. 5114 */ 5115 ha->port_down_retry_count = nv->port_down_retry_count; 5116 if (qlport_down_retry) 5117 ha->port_down_retry_count = qlport_down_retry; 5118 /* Set login_retry_count */ 5119 ha->login_retry_count = nv->retry_count; 5120 if (ha->port_down_retry_count == nv->port_down_retry_count && 5121 ha->port_down_retry_count > 3) 5122 ha->login_retry_count = ha->port_down_retry_count; 5123 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5124 ha->login_retry_count = ha->port_down_retry_count; 5125 if (ql2xloginretrycount) 5126 ha->login_retry_count = ql2xloginretrycount; 5127 5128 icb->lun_enables = cpu_to_le16(0); 5129 icb->command_resource_count = 0; 5130 icb->immediate_notify_resource_count = 0; 5131 icb->timeout = cpu_to_le16(0); 5132 5133 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 5134 /* Enable RIO */ 5135 icb->firmware_options[0] &= ~BIT_3; 5136 icb->add_firmware_options[0] &= 5137 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5138 icb->add_firmware_options[0] |= BIT_2; 5139 icb->response_accumulation_timer = 3; 5140 icb->interrupt_delay_timer = 5; 5141 5142 vha->flags.process_response_queue = 1; 5143 } else { 5144 /* Enable ZIO. */ 5145 if (!vha->flags.init_done) { 5146 ha->zio_mode = icb->add_firmware_options[0] & 5147 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5148 ha->zio_timer = icb->interrupt_delay_timer ? 5149 icb->interrupt_delay_timer : 2; 5150 } 5151 icb->add_firmware_options[0] &= 5152 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 5153 vha->flags.process_response_queue = 0; 5154 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5155 ha->zio_mode = QLA_ZIO_MODE_6; 5156 5157 ql_log(ql_log_info, vha, 0x0068, 5158 "ZIO mode %d enabled; timer delay (%d us).\n", 5159 ha->zio_mode, ha->zio_timer * 100); 5160 5161 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 5162 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 5163 vha->flags.process_response_queue = 1; 5164 } 5165 } 5166 5167 if (rval) { 5168 ql_log(ql_log_warn, vha, 0x0069, 5169 "NVRAM configuration failed.\n"); 5170 } 5171 return (rval); 5172 } 5173 5174 static void 5175 qla2x00_rport_del(void *data) 5176 { 5177 fc_port_t *fcport = data; 5178 struct fc_rport *rport; 5179 unsigned long flags; 5180 5181 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5182 rport = fcport->drport ? fcport->drport : fcport->rport; 5183 fcport->drport = NULL; 5184 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5185 if (rport) { 5186 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 5187 "%s %8phN. rport %p roles %x\n", 5188 __func__, fcport->port_name, rport, 5189 rport->roles); 5190 5191 fc_remote_port_delete(rport); 5192 } 5193 } 5194 5195 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 5196 { 5197 int old_state; 5198 5199 old_state = atomic_read(&fcport->state); 5200 atomic_set(&fcport->state, state); 5201 5202 /* Don't print state transitions during initial allocation of fcport */ 5203 if (old_state && old_state != state) { 5204 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 5205 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 5206 fcport->port_name, port_state_str[old_state], 5207 port_state_str[state], fcport->d_id.b.domain, 5208 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5209 } 5210 } 5211 5212 /** 5213 * qla2x00_alloc_fcport() - Allocate a generic fcport. 5214 * @vha: HA context 5215 * @flags: allocation flags 5216 * 5217 * Returns a pointer to the allocated fcport, or NULL, if none available. 5218 */ 5219 fc_port_t * 5220 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 5221 { 5222 fc_port_t *fcport; 5223 5224 fcport = kzalloc(sizeof(fc_port_t), flags); 5225 if (!fcport) 5226 return NULL; 5227 5228 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 5229 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 5230 flags); 5231 if (!fcport->ct_desc.ct_sns) { 5232 ql_log(ql_log_warn, vha, 0xd049, 5233 "Failed to allocate ct_sns request.\n"); 5234 kfree(fcport); 5235 return NULL; 5236 } 5237 5238 /* Setup fcport template structure. */ 5239 fcport->vha = vha; 5240 fcport->port_type = FCT_UNKNOWN; 5241 fcport->loop_id = FC_NO_LOOP_ID; 5242 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 5243 fcport->supported_classes = FC_COS_UNSPECIFIED; 5244 fcport->fp_speed = PORT_SPEED_UNKNOWN; 5245 5246 fcport->disc_state = DSC_DELETED; 5247 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 5248 fcport->deleted = QLA_SESS_DELETED; 5249 fcport->login_retry = vha->hw->login_retry_count; 5250 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 5251 fcport->logout_on_delete = 1; 5252 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5253 fcport->tgt_short_link_down_cnt = 0; 5254 fcport->dev_loss_tmo = 0; 5255 5256 if (!fcport->ct_desc.ct_sns) { 5257 ql_log(ql_log_warn, vha, 0xd049, 5258 "Failed to allocate ct_sns request.\n"); 5259 kfree(fcport); 5260 return NULL; 5261 } 5262 5263 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 5264 INIT_WORK(&fcport->free_work, qlt_free_session_done); 5265 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 5266 INIT_LIST_HEAD(&fcport->gnl_entry); 5267 INIT_LIST_HEAD(&fcport->list); 5268 5269 INIT_LIST_HEAD(&fcport->sess_cmd_list); 5270 spin_lock_init(&fcport->sess_cmd_lock); 5271 5272 spin_lock_init(&fcport->edif.sa_list_lock); 5273 INIT_LIST_HEAD(&fcport->edif.tx_sa_list); 5274 INIT_LIST_HEAD(&fcport->edif.rx_sa_list); 5275 5276 if (vha->e_dbell.db_flags == EDB_ACTIVE) 5277 fcport->edif.app_started = 1; 5278 5279 spin_lock_init(&fcport->edif.indx_list_lock); 5280 INIT_LIST_HEAD(&fcport->edif.edif_indx_list); 5281 5282 return fcport; 5283 } 5284 5285 void 5286 qla2x00_free_fcport(fc_port_t *fcport) 5287 { 5288 if (fcport->ct_desc.ct_sns) { 5289 dma_free_coherent(&fcport->vha->hw->pdev->dev, 5290 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 5291 fcport->ct_desc.ct_sns_dma); 5292 5293 fcport->ct_desc.ct_sns = NULL; 5294 } 5295 5296 qla_edif_flush_sa_ctl_lists(fcport); 5297 list_del(&fcport->list); 5298 qla2x00_clear_loop_id(fcport); 5299 5300 qla_edif_list_del(fcport); 5301 5302 kfree(fcport); 5303 } 5304 5305 static void qla_get_login_template(scsi_qla_host_t *vha) 5306 { 5307 struct qla_hw_data *ha = vha->hw; 5308 int rval; 5309 u32 *bp, sz; 5310 __be32 *q; 5311 5312 memset(ha->init_cb, 0, ha->init_cb_size); 5313 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size); 5314 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 5315 ha->init_cb, sz); 5316 if (rval != QLA_SUCCESS) { 5317 ql_dbg(ql_dbg_init, vha, 0x00d1, 5318 "PLOGI ELS param read fail.\n"); 5319 return; 5320 } 5321 q = (__be32 *)&ha->plogi_els_payld.fl_csp; 5322 5323 bp = (uint32_t *)ha->init_cb; 5324 cpu_to_be32_array(q, bp, sz / 4); 5325 ha->flags.plogi_template_valid = 1; 5326 } 5327 5328 /* 5329 * qla2x00_configure_loop 5330 * Updates Fibre Channel Device Database with what is actually on loop. 5331 * 5332 * Input: 5333 * ha = adapter block pointer. 5334 * 5335 * Returns: 5336 * 0 = success. 5337 * 1 = error. 5338 * 2 = database was full and device was not configured. 5339 */ 5340 static int 5341 qla2x00_configure_loop(scsi_qla_host_t *vha) 5342 { 5343 int rval; 5344 unsigned long flags, save_flags; 5345 struct qla_hw_data *ha = vha->hw; 5346 5347 rval = QLA_SUCCESS; 5348 5349 /* Get Initiator ID */ 5350 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 5351 rval = qla2x00_configure_hba(vha); 5352 if (rval != QLA_SUCCESS) { 5353 ql_dbg(ql_dbg_disc, vha, 0x2013, 5354 "Unable to configure HBA.\n"); 5355 return (rval); 5356 } 5357 } 5358 5359 save_flags = flags = vha->dpc_flags; 5360 ql_dbg(ql_dbg_disc, vha, 0x2014, 5361 "Configure loop -- dpc flags = 0x%lx.\n", flags); 5362 5363 /* 5364 * If we have both an RSCN and PORT UPDATE pending then handle them 5365 * both at the same time. 5366 */ 5367 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5368 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 5369 5370 qla2x00_get_data_rate(vha); 5371 qla_get_login_template(vha); 5372 5373 /* Determine what we need to do */ 5374 if ((ha->current_topology == ISP_CFG_FL || 5375 ha->current_topology == ISP_CFG_F) && 5376 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 5377 5378 set_bit(RSCN_UPDATE, &flags); 5379 clear_bit(LOCAL_LOOP_UPDATE, &flags); 5380 5381 } else if (ha->current_topology == ISP_CFG_NL || 5382 ha->current_topology == ISP_CFG_N) { 5383 clear_bit(RSCN_UPDATE, &flags); 5384 set_bit(LOCAL_LOOP_UPDATE, &flags); 5385 } else if (!vha->flags.online || 5386 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 5387 set_bit(RSCN_UPDATE, &flags); 5388 set_bit(LOCAL_LOOP_UPDATE, &flags); 5389 } 5390 5391 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 5392 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5393 ql_dbg(ql_dbg_disc, vha, 0x2015, 5394 "Loop resync needed, failing.\n"); 5395 rval = QLA_FUNCTION_FAILED; 5396 } else 5397 rval = qla2x00_configure_local_loop(vha); 5398 } 5399 5400 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 5401 if (LOOP_TRANSITION(vha)) { 5402 ql_dbg(ql_dbg_disc, vha, 0x2099, 5403 "Needs RSCN update and loop transition.\n"); 5404 rval = QLA_FUNCTION_FAILED; 5405 } 5406 else 5407 rval = qla2x00_configure_fabric(vha); 5408 } 5409 5410 if (rval == QLA_SUCCESS) { 5411 if (atomic_read(&vha->loop_down_timer) || 5412 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5413 rval = QLA_FUNCTION_FAILED; 5414 } else { 5415 atomic_set(&vha->loop_state, LOOP_READY); 5416 ql_dbg(ql_dbg_disc, vha, 0x2069, 5417 "LOOP READY.\n"); 5418 ha->flags.fw_init_done = 1; 5419 5420 /* 5421 * use link up to wake up app to get ready for 5422 * authentication. 5423 */ 5424 if (ha->flags.edif_enabled && DBELL_INACTIVE(vha)) 5425 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, 5426 ha->link_data_rate); 5427 5428 /* 5429 * Process any ATIO queue entries that came in 5430 * while we weren't online. 5431 */ 5432 if (qla_tgt_mode_enabled(vha) || 5433 qla_dual_mode_enabled(vha)) { 5434 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 5435 qlt_24xx_process_atio_queue(vha, 0); 5436 spin_unlock_irqrestore(&ha->tgt.atio_lock, 5437 flags); 5438 } 5439 } 5440 } 5441 5442 if (rval) { 5443 ql_dbg(ql_dbg_disc, vha, 0x206a, 5444 "%s *** FAILED ***.\n", __func__); 5445 } else { 5446 ql_dbg(ql_dbg_disc, vha, 0x206b, 5447 "%s: exiting normally. local port wwpn %8phN id %06x)\n", 5448 __func__, vha->port_name, vha->d_id.b24); 5449 } 5450 5451 /* Restore state if a resync event occurred during processing */ 5452 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5453 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5454 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5455 if (test_bit(RSCN_UPDATE, &save_flags)) { 5456 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5457 } 5458 } 5459 5460 return (rval); 5461 } 5462 5463 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha) 5464 { 5465 unsigned long flags; 5466 fc_port_t *fcport; 5467 5468 ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__); 5469 5470 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) 5471 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 5472 5473 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5474 if (fcport->n2n_flag) { 5475 qla24xx_fcport_handle_login(vha, fcport); 5476 return QLA_SUCCESS; 5477 } 5478 } 5479 5480 spin_lock_irqsave(&vha->work_lock, flags); 5481 vha->scan.scan_retry++; 5482 spin_unlock_irqrestore(&vha->work_lock, flags); 5483 5484 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5485 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5486 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5487 } 5488 return QLA_FUNCTION_FAILED; 5489 } 5490 5491 /* 5492 * qla2x00_configure_local_loop 5493 * Updates Fibre Channel Device Database with local loop devices. 5494 * 5495 * Input: 5496 * ha = adapter block pointer. 5497 * 5498 * Returns: 5499 * 0 = success. 5500 */ 5501 static int 5502 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5503 { 5504 int rval, rval2; 5505 int found_devs; 5506 int found; 5507 fc_port_t *fcport, *new_fcport; 5508 uint16_t index; 5509 uint16_t entries; 5510 struct gid_list_info *gid; 5511 uint16_t loop_id; 5512 uint8_t domain, area, al_pa; 5513 struct qla_hw_data *ha = vha->hw; 5514 unsigned long flags; 5515 5516 /* Inititae N2N login. */ 5517 if (N2N_TOPO(ha)) 5518 return qla2x00_configure_n2n_loop(vha); 5519 5520 found_devs = 0; 5521 new_fcport = NULL; 5522 entries = MAX_FIBRE_DEVICES_LOOP; 5523 5524 /* Get list of logged in devices. */ 5525 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5526 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5527 &entries); 5528 if (rval != QLA_SUCCESS) 5529 goto err; 5530 5531 ql_dbg(ql_dbg_disc, vha, 0x2011, 5532 "Entries in ID list (%d).\n", entries); 5533 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5534 ha->gid_list, entries * sizeof(*ha->gid_list)); 5535 5536 if (entries == 0) { 5537 spin_lock_irqsave(&vha->work_lock, flags); 5538 vha->scan.scan_retry++; 5539 spin_unlock_irqrestore(&vha->work_lock, flags); 5540 5541 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5542 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5543 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5544 } 5545 } else { 5546 vha->scan.scan_retry = 0; 5547 } 5548 5549 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5550 fcport->scan_state = QLA_FCPORT_SCAN; 5551 } 5552 5553 /* Allocate temporary fcport for any new fcports discovered. */ 5554 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5555 if (new_fcport == NULL) { 5556 ql_log(ql_log_warn, vha, 0x2012, 5557 "Memory allocation failed for fcport.\n"); 5558 rval = QLA_MEMORY_ALLOC_FAILED; 5559 goto err; 5560 } 5561 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5562 5563 /* Add devices to port list. */ 5564 gid = ha->gid_list; 5565 for (index = 0; index < entries; index++) { 5566 domain = gid->domain; 5567 area = gid->area; 5568 al_pa = gid->al_pa; 5569 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5570 loop_id = gid->loop_id_2100; 5571 else 5572 loop_id = le16_to_cpu(gid->loop_id); 5573 gid = (void *)gid + ha->gid_list_info_size; 5574 5575 /* Bypass reserved domain fields. */ 5576 if ((domain & 0xf0) == 0xf0) 5577 continue; 5578 5579 /* Bypass if not same domain and area of adapter. */ 5580 if (area && domain && ((area != vha->d_id.b.area) || 5581 (domain != vha->d_id.b.domain)) && 5582 (ha->current_topology == ISP_CFG_NL)) 5583 continue; 5584 5585 5586 /* Bypass invalid local loop ID. */ 5587 if (loop_id > LAST_LOCAL_LOOP_ID) 5588 continue; 5589 5590 memset(new_fcport->port_name, 0, WWN_SIZE); 5591 5592 /* Fill in member data. */ 5593 new_fcport->d_id.b.domain = domain; 5594 new_fcport->d_id.b.area = area; 5595 new_fcport->d_id.b.al_pa = al_pa; 5596 new_fcport->loop_id = loop_id; 5597 new_fcport->scan_state = QLA_FCPORT_FOUND; 5598 5599 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5600 if (rval2 != QLA_SUCCESS) { 5601 ql_dbg(ql_dbg_disc, vha, 0x2097, 5602 "Failed to retrieve fcport information " 5603 "-- get_port_database=%x, loop_id=0x%04x.\n", 5604 rval2, new_fcport->loop_id); 5605 /* Skip retry if N2N */ 5606 if (ha->current_topology != ISP_CFG_N) { 5607 ql_dbg(ql_dbg_disc, vha, 0x2105, 5608 "Scheduling resync.\n"); 5609 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5610 continue; 5611 } 5612 } 5613 5614 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5615 /* Check for matching device in port list. */ 5616 found = 0; 5617 fcport = NULL; 5618 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5619 if (memcmp(new_fcport->port_name, fcport->port_name, 5620 WWN_SIZE)) 5621 continue; 5622 5623 fcport->flags &= ~FCF_FABRIC_DEVICE; 5624 fcport->loop_id = new_fcport->loop_id; 5625 fcport->port_type = new_fcport->port_type; 5626 fcport->d_id.b24 = new_fcport->d_id.b24; 5627 memcpy(fcport->node_name, new_fcport->node_name, 5628 WWN_SIZE); 5629 fcport->scan_state = QLA_FCPORT_FOUND; 5630 if (fcport->login_retry == 0) { 5631 fcport->login_retry = vha->hw->login_retry_count; 5632 ql_dbg(ql_dbg_disc, vha, 0x2135, 5633 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n", 5634 fcport->port_name, fcport->loop_id, 5635 fcport->login_retry); 5636 } 5637 found++; 5638 break; 5639 } 5640 5641 if (!found) { 5642 /* New device, add to fcports list. */ 5643 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5644 5645 /* Allocate a new replacement fcport. */ 5646 fcport = new_fcport; 5647 5648 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5649 5650 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5651 5652 if (new_fcport == NULL) { 5653 ql_log(ql_log_warn, vha, 0xd031, 5654 "Failed to allocate memory for fcport.\n"); 5655 rval = QLA_MEMORY_ALLOC_FAILED; 5656 goto err; 5657 } 5658 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5659 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5660 } 5661 5662 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5663 5664 /* Base iIDMA settings on HBA port speed. */ 5665 fcport->fp_speed = ha->link_data_rate; 5666 5667 found_devs++; 5668 } 5669 5670 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5671 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5672 break; 5673 5674 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5675 if ((qla_dual_mode_enabled(vha) || 5676 qla_ini_mode_enabled(vha)) && 5677 atomic_read(&fcport->state) == FCS_ONLINE) { 5678 qla2x00_mark_device_lost(vha, fcport, 5679 ql2xplogiabsentdevice); 5680 if (fcport->loop_id != FC_NO_LOOP_ID && 5681 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5682 fcport->port_type != FCT_INITIATOR && 5683 fcport->port_type != FCT_BROADCAST) { 5684 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5685 "%s %d %8phC post del sess\n", 5686 __func__, __LINE__, 5687 fcport->port_name); 5688 5689 qlt_schedule_sess_for_deletion(fcport); 5690 continue; 5691 } 5692 } 5693 } 5694 5695 if (fcport->scan_state == QLA_FCPORT_FOUND) 5696 qla24xx_fcport_handle_login(vha, fcport); 5697 } 5698 5699 qla2x00_free_fcport(new_fcport); 5700 5701 return rval; 5702 5703 err: 5704 ql_dbg(ql_dbg_disc, vha, 0x2098, 5705 "Configure local loop error exit: rval=%x.\n", rval); 5706 return rval; 5707 } 5708 5709 static void 5710 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5711 { 5712 int rval; 5713 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5714 struct qla_hw_data *ha = vha->hw; 5715 5716 if (!IS_IIDMA_CAPABLE(ha)) 5717 return; 5718 5719 if (atomic_read(&fcport->state) != FCS_ONLINE) 5720 return; 5721 5722 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5723 fcport->fp_speed > ha->link_data_rate || 5724 !ha->flags.gpsc_supported) 5725 return; 5726 5727 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5728 mb); 5729 if (rval != QLA_SUCCESS) { 5730 ql_dbg(ql_dbg_disc, vha, 0x2004, 5731 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5732 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5733 } else { 5734 ql_dbg(ql_dbg_disc, vha, 0x2005, 5735 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5736 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5737 fcport->fp_speed, fcport->port_name); 5738 } 5739 } 5740 5741 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5742 { 5743 qla2x00_iidma_fcport(vha, fcport); 5744 qla24xx_update_fcport_fcp_prio(vha, fcport); 5745 } 5746 5747 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5748 { 5749 struct qla_work_evt *e; 5750 5751 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5752 if (!e) 5753 return QLA_FUNCTION_FAILED; 5754 5755 e->u.fcport.fcport = fcport; 5756 return qla2x00_post_work(vha, e); 5757 } 5758 5759 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5760 static void 5761 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5762 { 5763 struct fc_rport_identifiers rport_ids; 5764 struct fc_rport *rport; 5765 unsigned long flags; 5766 5767 if (atomic_read(&fcport->state) == FCS_ONLINE) 5768 return; 5769 5770 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5771 5772 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5773 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5774 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5775 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5776 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5777 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5778 if (!rport) { 5779 ql_log(ql_log_warn, vha, 0x2006, 5780 "Unable to allocate fc remote port.\n"); 5781 return; 5782 } 5783 5784 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5785 *((fc_port_t **)rport->dd_data) = fcport; 5786 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5787 fcport->dev_loss_tmo = rport->dev_loss_tmo; 5788 5789 rport->supported_classes = fcport->supported_classes; 5790 5791 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 5792 if (fcport->port_type == FCT_INITIATOR) 5793 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 5794 if (fcport->port_type == FCT_TARGET) 5795 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 5796 if (fcport->port_type & FCT_NVME_INITIATOR) 5797 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 5798 if (fcport->port_type & FCT_NVME_TARGET) 5799 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 5800 if (fcport->port_type & FCT_NVME_DISCOVERY) 5801 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 5802 5803 fc_remote_port_rolechg(rport, rport_ids.roles); 5804 5805 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5806 "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n", 5807 __func__, fcport->port_name, vha->host_no, 5808 rport->scsi_target_id, rport, 5809 (fcport->port_type == FCT_TARGET) ? "tgt" : 5810 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5811 } 5812 5813 /* 5814 * qla2x00_update_fcport 5815 * Updates device on list. 5816 * 5817 * Input: 5818 * ha = adapter block pointer. 5819 * fcport = port structure pointer. 5820 * 5821 * Return: 5822 * 0 - Success 5823 * BIT_0 - error 5824 * 5825 * Context: 5826 * Kernel context. 5827 */ 5828 void 5829 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5830 { 5831 if (IS_SW_RESV_ADDR(fcport->d_id)) 5832 return; 5833 5834 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5835 __func__, fcport->port_name); 5836 5837 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT); 5838 fcport->login_retry = vha->hw->login_retry_count; 5839 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5840 fcport->deleted = 0; 5841 if (vha->hw->current_topology == ISP_CFG_NL) 5842 fcport->logout_on_delete = 0; 5843 else 5844 fcport->logout_on_delete = 1; 5845 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5846 5847 if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) { 5848 fcport->tgt_short_link_down_cnt++; 5849 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 5850 } 5851 5852 switch (vha->hw->current_topology) { 5853 case ISP_CFG_N: 5854 case ISP_CFG_NL: 5855 fcport->keep_nport_handle = 1; 5856 break; 5857 default: 5858 break; 5859 } 5860 5861 qla2x00_iidma_fcport(vha, fcport); 5862 5863 qla2x00_dfs_create_rport(vha, fcport); 5864 5865 qla24xx_update_fcport_fcp_prio(vha, fcport); 5866 5867 switch (vha->host->active_mode) { 5868 case MODE_INITIATOR: 5869 qla2x00_reg_remote_port(vha, fcport); 5870 break; 5871 case MODE_TARGET: 5872 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5873 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5874 !vha->vha_tgt.qla_tgt->tgt_stopped) 5875 qlt_fc_port_added(vha, fcport); 5876 break; 5877 case MODE_DUAL: 5878 qla2x00_reg_remote_port(vha, fcport); 5879 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5880 !vha->vha_tgt.qla_tgt->tgt_stopped) 5881 qlt_fc_port_added(vha, fcport); 5882 break; 5883 default: 5884 break; 5885 } 5886 5887 if (NVME_TARGET(vha->hw, fcport)) 5888 qla_nvme_register_remote(vha, fcport); 5889 5890 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5891 if (fcport->id_changed) { 5892 fcport->id_changed = 0; 5893 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5894 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5895 __func__, __LINE__, fcport->port_name, 5896 vha->fcport_count); 5897 qla24xx_post_gfpnid_work(vha, fcport); 5898 } else { 5899 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5900 "%s %d %8phC post gpsc fcp_cnt %d\n", 5901 __func__, __LINE__, fcport->port_name, 5902 vha->fcport_count); 5903 qla24xx_post_gpsc_work(vha, fcport); 5904 } 5905 } 5906 5907 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5908 } 5909 5910 void qla_register_fcport_fn(struct work_struct *work) 5911 { 5912 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5913 u32 rscn_gen = fcport->rscn_gen; 5914 u16 data[2]; 5915 5916 if (IS_SW_RESV_ADDR(fcport->d_id)) 5917 return; 5918 5919 qla2x00_update_fcport(fcport->vha, fcport); 5920 5921 ql_dbg(ql_dbg_disc, fcport->vha, 0x911e, 5922 "%s rscn gen %d/%d next DS %d\n", __func__, 5923 rscn_gen, fcport->rscn_gen, fcport->next_disc_state); 5924 5925 if (rscn_gen != fcport->rscn_gen) { 5926 /* RSCN(s) came in while registration */ 5927 switch (fcport->next_disc_state) { 5928 case DSC_DELETE_PEND: 5929 qlt_schedule_sess_for_deletion(fcport); 5930 break; 5931 case DSC_ADISC: 5932 data[0] = data[1] = 0; 5933 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5934 data); 5935 break; 5936 default: 5937 break; 5938 } 5939 } 5940 } 5941 5942 /* 5943 * qla2x00_configure_fabric 5944 * Setup SNS devices with loop ID's. 5945 * 5946 * Input: 5947 * ha = adapter block pointer. 5948 * 5949 * Returns: 5950 * 0 = success. 5951 * BIT_0 = error 5952 */ 5953 static int 5954 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5955 { 5956 int rval; 5957 fc_port_t *fcport; 5958 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5959 uint16_t loop_id; 5960 LIST_HEAD(new_fcports); 5961 struct qla_hw_data *ha = vha->hw; 5962 int discovery_gen; 5963 5964 /* If FL port exists, then SNS is present */ 5965 if (IS_FWI2_CAPABLE(ha)) 5966 loop_id = NPH_F_PORT; 5967 else 5968 loop_id = SNS_FL_PORT; 5969 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5970 if (rval != QLA_SUCCESS) { 5971 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5972 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5973 5974 vha->device_flags &= ~SWITCH_FOUND; 5975 return (QLA_SUCCESS); 5976 } 5977 vha->device_flags |= SWITCH_FOUND; 5978 5979 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0); 5980 if (rval != QLA_SUCCESS) 5981 ql_dbg(ql_dbg_disc, vha, 0x20ff, 5982 "Failed to get Fabric Port Name\n"); 5983 5984 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5985 rval = qla2x00_send_change_request(vha, 0x3, 0); 5986 if (rval != QLA_SUCCESS) 5987 ql_log(ql_log_warn, vha, 0x121, 5988 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5989 rval); 5990 } 5991 5992 do { 5993 qla2x00_mgmt_svr_login(vha); 5994 5995 /* Ensure we are logged into the SNS. */ 5996 loop_id = NPH_SNS_LID(ha); 5997 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5998 0xfc, mb, BIT_1|BIT_0); 5999 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 6000 ql_dbg(ql_dbg_disc, vha, 0x20a1, 6001 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 6002 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 6003 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6004 return rval; 6005 } 6006 6007 /* FDMI support. */ 6008 if (ql2xfdmienable && 6009 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 6010 qla2x00_fdmi_register(vha); 6011 6012 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 6013 if (qla2x00_rft_id(vha)) { 6014 /* EMPTY */ 6015 ql_dbg(ql_dbg_disc, vha, 0x20a2, 6016 "Register FC-4 TYPE failed.\n"); 6017 if (test_bit(LOOP_RESYNC_NEEDED, 6018 &vha->dpc_flags)) 6019 break; 6020 } 6021 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 6022 /* EMPTY */ 6023 ql_dbg(ql_dbg_disc, vha, 0x209a, 6024 "Register FC-4 Features failed.\n"); 6025 if (test_bit(LOOP_RESYNC_NEEDED, 6026 &vha->dpc_flags)) 6027 break; 6028 } 6029 if (vha->flags.nvme_enabled) { 6030 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 6031 ql_dbg(ql_dbg_disc, vha, 0x2049, 6032 "Register NVME FC Type Features failed.\n"); 6033 } 6034 } 6035 if (qla2x00_rnn_id(vha)) { 6036 /* EMPTY */ 6037 ql_dbg(ql_dbg_disc, vha, 0x2104, 6038 "Register Node Name failed.\n"); 6039 if (test_bit(LOOP_RESYNC_NEEDED, 6040 &vha->dpc_flags)) 6041 break; 6042 } else if (qla2x00_rsnn_nn(vha)) { 6043 /* EMPTY */ 6044 ql_dbg(ql_dbg_disc, vha, 0x209b, 6045 "Register Symbolic Node Name failed.\n"); 6046 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6047 break; 6048 } 6049 } 6050 6051 6052 /* Mark the time right before querying FW for connected ports. 6053 * This process is long, asynchronous and by the time it's done, 6054 * collected information might not be accurate anymore. E.g. 6055 * disconnected port might have re-connected and a brand new 6056 * session has been created. In this case session's generation 6057 * will be newer than discovery_gen. */ 6058 qlt_do_generation_tick(vha, &discovery_gen); 6059 6060 if (USE_ASYNC_SCAN(ha)) { 6061 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 6062 NULL); 6063 if (rval) 6064 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6065 } else { 6066 list_for_each_entry(fcport, &vha->vp_fcports, list) 6067 fcport->scan_state = QLA_FCPORT_SCAN; 6068 6069 rval = qla2x00_find_all_fabric_devs(vha); 6070 } 6071 if (rval != QLA_SUCCESS) 6072 break; 6073 } while (0); 6074 6075 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 6076 qla_nvme_register_hba(vha); 6077 6078 if (rval) 6079 ql_dbg(ql_dbg_disc, vha, 0x2068, 6080 "Configure fabric error exit rval=%d.\n", rval); 6081 6082 return (rval); 6083 } 6084 6085 /* 6086 * qla2x00_find_all_fabric_devs 6087 * 6088 * Input: 6089 * ha = adapter block pointer. 6090 * dev = database device entry pointer. 6091 * 6092 * Returns: 6093 * 0 = success. 6094 * 6095 * Context: 6096 * Kernel context. 6097 */ 6098 static int 6099 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 6100 { 6101 int rval; 6102 uint16_t loop_id; 6103 fc_port_t *fcport, *new_fcport; 6104 int found; 6105 6106 sw_info_t *swl; 6107 int swl_idx; 6108 int first_dev, last_dev; 6109 port_id_t wrap = {}, nxt_d_id; 6110 struct qla_hw_data *ha = vha->hw; 6111 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6112 unsigned long flags; 6113 6114 rval = QLA_SUCCESS; 6115 6116 /* Try GID_PT to get device list, else GAN. */ 6117 if (!ha->swl) 6118 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 6119 GFP_KERNEL); 6120 swl = ha->swl; 6121 if (!swl) { 6122 /*EMPTY*/ 6123 ql_dbg(ql_dbg_disc, vha, 0x209c, 6124 "GID_PT allocations failed, fallback on GA_NXT.\n"); 6125 } else { 6126 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 6127 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 6128 swl = NULL; 6129 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6130 return rval; 6131 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 6132 swl = NULL; 6133 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6134 return rval; 6135 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 6136 swl = NULL; 6137 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6138 return rval; 6139 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 6140 swl = NULL; 6141 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6142 return rval; 6143 } 6144 6145 /* If other queries succeeded probe for FC-4 type */ 6146 if (swl) { 6147 qla2x00_gff_id(vha, swl); 6148 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6149 return rval; 6150 } 6151 } 6152 swl_idx = 0; 6153 6154 /* Allocate temporary fcport for any new fcports discovered. */ 6155 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6156 if (new_fcport == NULL) { 6157 ql_log(ql_log_warn, vha, 0x209d, 6158 "Failed to allocate memory for fcport.\n"); 6159 return (QLA_MEMORY_ALLOC_FAILED); 6160 } 6161 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6162 /* Set start port ID scan at adapter ID. */ 6163 first_dev = 1; 6164 last_dev = 0; 6165 6166 /* Starting free loop ID. */ 6167 loop_id = ha->min_external_loopid; 6168 for (; loop_id <= ha->max_loop_id; loop_id++) { 6169 if (qla2x00_is_reserved_id(vha, loop_id)) 6170 continue; 6171 6172 if (ha->current_topology == ISP_CFG_FL && 6173 (atomic_read(&vha->loop_down_timer) || 6174 LOOP_TRANSITION(vha))) { 6175 atomic_set(&vha->loop_down_timer, 0); 6176 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6177 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 6178 break; 6179 } 6180 6181 if (swl != NULL) { 6182 if (last_dev) { 6183 wrap.b24 = new_fcport->d_id.b24; 6184 } else { 6185 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 6186 memcpy(new_fcport->node_name, 6187 swl[swl_idx].node_name, WWN_SIZE); 6188 memcpy(new_fcport->port_name, 6189 swl[swl_idx].port_name, WWN_SIZE); 6190 memcpy(new_fcport->fabric_port_name, 6191 swl[swl_idx].fabric_port_name, WWN_SIZE); 6192 new_fcport->fp_speed = swl[swl_idx].fp_speed; 6193 new_fcport->fc4_type = swl[swl_idx].fc4_type; 6194 6195 new_fcport->nvme_flag = 0; 6196 if (vha->flags.nvme_enabled && 6197 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 6198 ql_log(ql_log_info, vha, 0x2131, 6199 "FOUND: NVME port %8phC as FC Type 28h\n", 6200 new_fcport->port_name); 6201 } 6202 6203 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 6204 last_dev = 1; 6205 } 6206 swl_idx++; 6207 } 6208 } else { 6209 /* Send GA_NXT to the switch */ 6210 rval = qla2x00_ga_nxt(vha, new_fcport); 6211 if (rval != QLA_SUCCESS) { 6212 ql_log(ql_log_warn, vha, 0x209e, 6213 "SNS scan failed -- assuming " 6214 "zero-entry result.\n"); 6215 rval = QLA_SUCCESS; 6216 break; 6217 } 6218 } 6219 6220 /* If wrap on switch device list, exit. */ 6221 if (first_dev) { 6222 wrap.b24 = new_fcport->d_id.b24; 6223 first_dev = 0; 6224 } else if (new_fcport->d_id.b24 == wrap.b24) { 6225 ql_dbg(ql_dbg_disc, vha, 0x209f, 6226 "Device wrap (%02x%02x%02x).\n", 6227 new_fcport->d_id.b.domain, 6228 new_fcport->d_id.b.area, 6229 new_fcport->d_id.b.al_pa); 6230 break; 6231 } 6232 6233 /* Bypass if same physical adapter. */ 6234 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 6235 continue; 6236 6237 /* Bypass virtual ports of the same host. */ 6238 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 6239 continue; 6240 6241 /* Bypass if same domain and area of adapter. */ 6242 if (((new_fcport->d_id.b24 & 0xffff00) == 6243 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 6244 ISP_CFG_FL) 6245 continue; 6246 6247 /* Bypass reserved domain fields. */ 6248 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 6249 continue; 6250 6251 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 6252 if (ql2xgffidenable && 6253 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 6254 new_fcport->fc4_type != 0)) 6255 continue; 6256 6257 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 6258 6259 /* Locate matching device in database. */ 6260 found = 0; 6261 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6262 if (memcmp(new_fcport->port_name, fcport->port_name, 6263 WWN_SIZE)) 6264 continue; 6265 6266 fcport->scan_state = QLA_FCPORT_FOUND; 6267 6268 found++; 6269 6270 /* Update port state. */ 6271 memcpy(fcport->fabric_port_name, 6272 new_fcport->fabric_port_name, WWN_SIZE); 6273 fcport->fp_speed = new_fcport->fp_speed; 6274 6275 /* 6276 * If address the same and state FCS_ONLINE 6277 * (or in target mode), nothing changed. 6278 */ 6279 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 6280 (atomic_read(&fcport->state) == FCS_ONLINE || 6281 (vha->host->active_mode == MODE_TARGET))) { 6282 break; 6283 } 6284 6285 if (fcport->login_retry == 0) 6286 fcport->login_retry = 6287 vha->hw->login_retry_count; 6288 /* 6289 * If device was not a fabric device before. 6290 */ 6291 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 6292 fcport->d_id.b24 = new_fcport->d_id.b24; 6293 qla2x00_clear_loop_id(fcport); 6294 fcport->flags |= (FCF_FABRIC_DEVICE | 6295 FCF_LOGIN_NEEDED); 6296 break; 6297 } 6298 6299 /* 6300 * Port ID changed or device was marked to be updated; 6301 * Log it out if still logged in and mark it for 6302 * relogin later. 6303 */ 6304 if (qla_tgt_mode_enabled(base_vha)) { 6305 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 6306 "port changed FC ID, %8phC" 6307 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 6308 fcport->port_name, 6309 fcport->d_id.b.domain, 6310 fcport->d_id.b.area, 6311 fcport->d_id.b.al_pa, 6312 fcport->loop_id, 6313 new_fcport->d_id.b.domain, 6314 new_fcport->d_id.b.area, 6315 new_fcport->d_id.b.al_pa); 6316 fcport->d_id.b24 = new_fcport->d_id.b24; 6317 break; 6318 } 6319 6320 fcport->d_id.b24 = new_fcport->d_id.b24; 6321 fcport->flags |= FCF_LOGIN_NEEDED; 6322 break; 6323 } 6324 6325 if (found && NVME_TARGET(vha->hw, fcport)) { 6326 if (fcport->disc_state == DSC_DELETE_PEND) { 6327 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 6328 vha->fcport_count--; 6329 fcport->login_succ = 0; 6330 } 6331 } 6332 6333 if (found) { 6334 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6335 continue; 6336 } 6337 /* If device was not in our fcports list, then add it. */ 6338 new_fcport->scan_state = QLA_FCPORT_FOUND; 6339 list_add_tail(&new_fcport->list, &vha->vp_fcports); 6340 6341 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6342 6343 6344 /* Allocate a new replacement fcport. */ 6345 nxt_d_id.b24 = new_fcport->d_id.b24; 6346 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6347 if (new_fcport == NULL) { 6348 ql_log(ql_log_warn, vha, 0xd032, 6349 "Memory allocation failed for fcport.\n"); 6350 return (QLA_MEMORY_ALLOC_FAILED); 6351 } 6352 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6353 new_fcport->d_id.b24 = nxt_d_id.b24; 6354 } 6355 6356 qla2x00_free_fcport(new_fcport); 6357 6358 /* 6359 * Logout all previous fabric dev marked lost, except FCP2 devices. 6360 */ 6361 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6362 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6363 break; 6364 6365 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 6366 continue; 6367 6368 if (fcport->scan_state == QLA_FCPORT_SCAN) { 6369 if ((qla_dual_mode_enabled(vha) || 6370 qla_ini_mode_enabled(vha)) && 6371 atomic_read(&fcport->state) == FCS_ONLINE) { 6372 qla2x00_mark_device_lost(vha, fcport, 6373 ql2xplogiabsentdevice); 6374 if (fcport->loop_id != FC_NO_LOOP_ID && 6375 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 6376 fcport->port_type != FCT_INITIATOR && 6377 fcport->port_type != FCT_BROADCAST) { 6378 ql_dbg(ql_dbg_disc, vha, 0x20f0, 6379 "%s %d %8phC post del sess\n", 6380 __func__, __LINE__, 6381 fcport->port_name); 6382 qlt_schedule_sess_for_deletion(fcport); 6383 continue; 6384 } 6385 } 6386 } 6387 6388 if (fcport->scan_state == QLA_FCPORT_FOUND && 6389 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 6390 qla24xx_fcport_handle_login(vha, fcport); 6391 } 6392 return (rval); 6393 } 6394 6395 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 6396 int 6397 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 6398 { 6399 int loop_id = FC_NO_LOOP_ID; 6400 int lid = NPH_MGMT_SERVER - vha->vp_idx; 6401 unsigned long flags; 6402 struct qla_hw_data *ha = vha->hw; 6403 6404 if (vha->vp_idx == 0) { 6405 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 6406 return NPH_MGMT_SERVER; 6407 } 6408 6409 /* pick id from high and work down to low */ 6410 spin_lock_irqsave(&ha->vport_slock, flags); 6411 for (; lid > 0; lid--) { 6412 if (!test_bit(lid, vha->hw->loop_id_map)) { 6413 set_bit(lid, vha->hw->loop_id_map); 6414 loop_id = lid; 6415 break; 6416 } 6417 } 6418 spin_unlock_irqrestore(&ha->vport_slock, flags); 6419 6420 return loop_id; 6421 } 6422 6423 /* 6424 * qla2x00_fabric_login 6425 * Issue fabric login command. 6426 * 6427 * Input: 6428 * ha = adapter block pointer. 6429 * device = pointer to FC device type structure. 6430 * 6431 * Returns: 6432 * 0 - Login successfully 6433 * 1 - Login failed 6434 * 2 - Initiator device 6435 * 3 - Fatal error 6436 */ 6437 int 6438 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 6439 uint16_t *next_loopid) 6440 { 6441 int rval; 6442 int retry; 6443 uint16_t tmp_loopid; 6444 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6445 struct qla_hw_data *ha = vha->hw; 6446 6447 retry = 0; 6448 tmp_loopid = 0; 6449 6450 for (;;) { 6451 ql_dbg(ql_dbg_disc, vha, 0x2000, 6452 "Trying Fabric Login w/loop id 0x%04x for port " 6453 "%02x%02x%02x.\n", 6454 fcport->loop_id, fcport->d_id.b.domain, 6455 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6456 6457 /* Login fcport on switch. */ 6458 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 6459 fcport->d_id.b.domain, fcport->d_id.b.area, 6460 fcport->d_id.b.al_pa, mb, BIT_0); 6461 if (rval != QLA_SUCCESS) { 6462 return rval; 6463 } 6464 if (mb[0] == MBS_PORT_ID_USED) { 6465 /* 6466 * Device has another loop ID. The firmware team 6467 * recommends the driver perform an implicit login with 6468 * the specified ID again. The ID we just used is save 6469 * here so we return with an ID that can be tried by 6470 * the next login. 6471 */ 6472 retry++; 6473 tmp_loopid = fcport->loop_id; 6474 fcport->loop_id = mb[1]; 6475 6476 ql_dbg(ql_dbg_disc, vha, 0x2001, 6477 "Fabric Login: port in use - next loop " 6478 "id=0x%04x, port id= %02x%02x%02x.\n", 6479 fcport->loop_id, fcport->d_id.b.domain, 6480 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6481 6482 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6483 /* 6484 * Login succeeded. 6485 */ 6486 if (retry) { 6487 /* A retry occurred before. */ 6488 *next_loopid = tmp_loopid; 6489 } else { 6490 /* 6491 * No retry occurred before. Just increment the 6492 * ID value for next login. 6493 */ 6494 *next_loopid = (fcport->loop_id + 1); 6495 } 6496 6497 if (mb[1] & BIT_0) { 6498 fcport->port_type = FCT_INITIATOR; 6499 } else { 6500 fcport->port_type = FCT_TARGET; 6501 if (mb[1] & BIT_1) { 6502 fcport->flags |= FCF_FCP2_DEVICE; 6503 } 6504 } 6505 6506 if (mb[10] & BIT_0) 6507 fcport->supported_classes |= FC_COS_CLASS2; 6508 if (mb[10] & BIT_1) 6509 fcport->supported_classes |= FC_COS_CLASS3; 6510 6511 if (IS_FWI2_CAPABLE(ha)) { 6512 if (mb[10] & BIT_7) 6513 fcport->flags |= 6514 FCF_CONF_COMP_SUPPORTED; 6515 } 6516 6517 rval = QLA_SUCCESS; 6518 break; 6519 } else if (mb[0] == MBS_LOOP_ID_USED) { 6520 /* 6521 * Loop ID already used, try next loop ID. 6522 */ 6523 fcport->loop_id++; 6524 rval = qla2x00_find_new_loop_id(vha, fcport); 6525 if (rval != QLA_SUCCESS) { 6526 /* Ran out of loop IDs to use */ 6527 break; 6528 } 6529 } else if (mb[0] == MBS_COMMAND_ERROR) { 6530 /* 6531 * Firmware possibly timed out during login. If NO 6532 * retries are left to do then the device is declared 6533 * dead. 6534 */ 6535 *next_loopid = fcport->loop_id; 6536 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6537 fcport->d_id.b.domain, fcport->d_id.b.area, 6538 fcport->d_id.b.al_pa); 6539 qla2x00_mark_device_lost(vha, fcport, 1); 6540 6541 rval = 1; 6542 break; 6543 } else { 6544 /* 6545 * unrecoverable / not handled error 6546 */ 6547 ql_dbg(ql_dbg_disc, vha, 0x2002, 6548 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6549 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6550 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6551 fcport->loop_id, jiffies); 6552 6553 *next_loopid = fcport->loop_id; 6554 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6555 fcport->d_id.b.domain, fcport->d_id.b.area, 6556 fcport->d_id.b.al_pa); 6557 qla2x00_clear_loop_id(fcport); 6558 fcport->login_retry = 0; 6559 6560 rval = 3; 6561 break; 6562 } 6563 } 6564 6565 return (rval); 6566 } 6567 6568 /* 6569 * qla2x00_local_device_login 6570 * Issue local device login command. 6571 * 6572 * Input: 6573 * ha = adapter block pointer. 6574 * loop_id = loop id of device to login to. 6575 * 6576 * Returns (Where's the #define!!!!): 6577 * 0 - Login successfully 6578 * 1 - Login failed 6579 * 3 - Fatal error 6580 */ 6581 int 6582 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6583 { 6584 int rval; 6585 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6586 6587 memset(mb, 0, sizeof(mb)); 6588 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6589 if (rval == QLA_SUCCESS) { 6590 /* Interrogate mailbox registers for any errors */ 6591 if (mb[0] == MBS_COMMAND_ERROR) 6592 rval = 1; 6593 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6594 /* device not in PCB table */ 6595 rval = 3; 6596 } 6597 6598 return (rval); 6599 } 6600 6601 /* 6602 * qla2x00_loop_resync 6603 * Resync with fibre channel devices. 6604 * 6605 * Input: 6606 * ha = adapter block pointer. 6607 * 6608 * Returns: 6609 * 0 = success 6610 */ 6611 int 6612 qla2x00_loop_resync(scsi_qla_host_t *vha) 6613 { 6614 int rval = QLA_SUCCESS; 6615 uint32_t wait_time; 6616 6617 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6618 if (vha->flags.online) { 6619 if (!(rval = qla2x00_fw_ready(vha))) { 6620 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6621 wait_time = 256; 6622 do { 6623 if (!IS_QLAFX00(vha->hw)) { 6624 /* 6625 * Issue a marker after FW becomes 6626 * ready. 6627 */ 6628 qla2x00_marker(vha, vha->hw->base_qpair, 6629 0, 0, MK_SYNC_ALL); 6630 vha->marker_needed = 0; 6631 } 6632 6633 /* Remap devices on Loop. */ 6634 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6635 6636 if (IS_QLAFX00(vha->hw)) 6637 qlafx00_configure_devices(vha); 6638 else 6639 qla2x00_configure_loop(vha); 6640 6641 wait_time--; 6642 } while (!atomic_read(&vha->loop_down_timer) && 6643 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6644 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6645 &vha->dpc_flags))); 6646 } 6647 } 6648 6649 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6650 return (QLA_FUNCTION_FAILED); 6651 6652 if (rval) 6653 ql_dbg(ql_dbg_disc, vha, 0x206c, 6654 "%s *** FAILED ***.\n", __func__); 6655 6656 return (rval); 6657 } 6658 6659 /* 6660 * qla2x00_perform_loop_resync 6661 * Description: This function will set the appropriate flags and call 6662 * qla2x00_loop_resync. If successful loop will be resynced 6663 * Arguments : scsi_qla_host_t pointer 6664 * returm : Success or Failure 6665 */ 6666 6667 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6668 { 6669 int32_t rval = 0; 6670 6671 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6672 /*Configure the flags so that resync happens properly*/ 6673 atomic_set(&ha->loop_down_timer, 0); 6674 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6675 atomic_set(&ha->loop_state, LOOP_UP); 6676 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6677 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6678 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6679 6680 rval = qla2x00_loop_resync(ha); 6681 } else 6682 atomic_set(&ha->loop_state, LOOP_DEAD); 6683 6684 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6685 } 6686 6687 return rval; 6688 } 6689 6690 void 6691 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6692 { 6693 fc_port_t *fcport; 6694 struct scsi_qla_host *vha, *tvp; 6695 struct qla_hw_data *ha = base_vha->hw; 6696 unsigned long flags; 6697 6698 spin_lock_irqsave(&ha->vport_slock, flags); 6699 /* Go with deferred removal of rport references. */ 6700 list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) { 6701 atomic_inc(&vha->vref_count); 6702 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6703 if (fcport->drport && 6704 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6705 spin_unlock_irqrestore(&ha->vport_slock, flags); 6706 qla2x00_rport_del(fcport); 6707 6708 spin_lock_irqsave(&ha->vport_slock, flags); 6709 } 6710 } 6711 atomic_dec(&vha->vref_count); 6712 wake_up(&vha->vref_waitq); 6713 } 6714 spin_unlock_irqrestore(&ha->vport_slock, flags); 6715 } 6716 6717 /* Assumes idc_lock always held on entry */ 6718 void 6719 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6720 { 6721 struct qla_hw_data *ha = vha->hw; 6722 uint32_t drv_presence, drv_presence_mask; 6723 uint32_t dev_part_info1, dev_part_info2, class_type; 6724 uint32_t class_type_mask = 0x3; 6725 uint16_t fcoe_other_function = 0xffff, i; 6726 6727 if (IS_QLA8044(ha)) { 6728 drv_presence = qla8044_rd_direct(vha, 6729 QLA8044_CRB_DRV_ACTIVE_INDEX); 6730 dev_part_info1 = qla8044_rd_direct(vha, 6731 QLA8044_CRB_DEV_PART_INFO_INDEX); 6732 dev_part_info2 = qla8044_rd_direct(vha, 6733 QLA8044_CRB_DEV_PART_INFO2); 6734 } else { 6735 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6736 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6737 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6738 } 6739 for (i = 0; i < 8; i++) { 6740 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6741 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6742 (i != ha->portnum)) { 6743 fcoe_other_function = i; 6744 break; 6745 } 6746 } 6747 if (fcoe_other_function == 0xffff) { 6748 for (i = 0; i < 8; i++) { 6749 class_type = ((dev_part_info2 >> (i * 4)) & 6750 class_type_mask); 6751 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6752 ((i + 8) != ha->portnum)) { 6753 fcoe_other_function = i + 8; 6754 break; 6755 } 6756 } 6757 } 6758 /* 6759 * Prepare drv-presence mask based on fcoe functions present. 6760 * However consider only valid physical fcoe function numbers (0-15). 6761 */ 6762 drv_presence_mask = ~((1 << (ha->portnum)) | 6763 ((fcoe_other_function == 0xffff) ? 6764 0 : (1 << (fcoe_other_function)))); 6765 6766 /* We are the reset owner iff: 6767 * - No other protocol drivers present. 6768 * - This is the lowest among fcoe functions. */ 6769 if (!(drv_presence & drv_presence_mask) && 6770 (ha->portnum < fcoe_other_function)) { 6771 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6772 "This host is Reset owner.\n"); 6773 ha->flags.nic_core_reset_owner = 1; 6774 } 6775 } 6776 6777 static int 6778 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6779 { 6780 int rval = QLA_SUCCESS; 6781 struct qla_hw_data *ha = vha->hw; 6782 uint32_t drv_ack; 6783 6784 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6785 if (rval == QLA_SUCCESS) { 6786 drv_ack |= (1 << ha->portnum); 6787 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6788 } 6789 6790 return rval; 6791 } 6792 6793 static int 6794 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6795 { 6796 int rval = QLA_SUCCESS; 6797 struct qla_hw_data *ha = vha->hw; 6798 uint32_t drv_ack; 6799 6800 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6801 if (rval == QLA_SUCCESS) { 6802 drv_ack &= ~(1 << ha->portnum); 6803 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6804 } 6805 6806 return rval; 6807 } 6808 6809 /* Assumes idc-lock always held on entry */ 6810 void 6811 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6812 { 6813 struct qla_hw_data *ha = vha->hw; 6814 uint32_t idc_audit_reg = 0, duration_secs = 0; 6815 6816 switch (audit_type) { 6817 case IDC_AUDIT_TIMESTAMP: 6818 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6819 idc_audit_reg = (ha->portnum) | 6820 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6821 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6822 break; 6823 6824 case IDC_AUDIT_COMPLETION: 6825 duration_secs = ((jiffies_to_msecs(jiffies) - 6826 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6827 idc_audit_reg = (ha->portnum) | 6828 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6829 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6830 break; 6831 6832 default: 6833 ql_log(ql_log_warn, vha, 0xb078, 6834 "Invalid audit type specified.\n"); 6835 break; 6836 } 6837 } 6838 6839 /* Assumes idc_lock always held on entry */ 6840 static int 6841 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6842 { 6843 struct qla_hw_data *ha = vha->hw; 6844 uint32_t idc_control, dev_state; 6845 6846 __qla83xx_get_idc_control(vha, &idc_control); 6847 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6848 ql_log(ql_log_info, vha, 0xb080, 6849 "NIC Core reset has been disabled. idc-control=0x%x\n", 6850 idc_control); 6851 return QLA_FUNCTION_FAILED; 6852 } 6853 6854 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6855 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6856 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6857 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6858 QLA8XXX_DEV_NEED_RESET); 6859 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6860 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6861 } else { 6862 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", 6863 qdev_state(dev_state)); 6864 6865 /* SV: XXX: Is timeout required here? */ 6866 /* Wait for IDC state change READY -> NEED_RESET */ 6867 while (dev_state == QLA8XXX_DEV_READY) { 6868 qla83xx_idc_unlock(vha, 0); 6869 msleep(200); 6870 qla83xx_idc_lock(vha, 0); 6871 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6872 } 6873 } 6874 6875 /* Send IDC ack by writing to drv-ack register */ 6876 __qla83xx_set_drv_ack(vha); 6877 6878 return QLA_SUCCESS; 6879 } 6880 6881 int 6882 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6883 { 6884 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6885 } 6886 6887 int 6888 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6889 { 6890 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6891 } 6892 6893 static int 6894 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6895 { 6896 uint32_t drv_presence = 0; 6897 struct qla_hw_data *ha = vha->hw; 6898 6899 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6900 if (drv_presence & (1 << ha->portnum)) 6901 return QLA_SUCCESS; 6902 else 6903 return QLA_TEST_FAILED; 6904 } 6905 6906 int 6907 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6908 { 6909 int rval = QLA_SUCCESS; 6910 struct qla_hw_data *ha = vha->hw; 6911 6912 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6913 "Entered %s().\n", __func__); 6914 6915 if (vha->device_flags & DFLG_DEV_FAILED) { 6916 ql_log(ql_log_warn, vha, 0xb059, 6917 "Device in unrecoverable FAILED state.\n"); 6918 return QLA_FUNCTION_FAILED; 6919 } 6920 6921 qla83xx_idc_lock(vha, 0); 6922 6923 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6924 ql_log(ql_log_warn, vha, 0xb05a, 6925 "Function=0x%x has been removed from IDC participation.\n", 6926 ha->portnum); 6927 rval = QLA_FUNCTION_FAILED; 6928 goto exit; 6929 } 6930 6931 qla83xx_reset_ownership(vha); 6932 6933 rval = qla83xx_initiating_reset(vha); 6934 6935 /* 6936 * Perform reset if we are the reset-owner, 6937 * else wait till IDC state changes to READY/FAILED. 6938 */ 6939 if (rval == QLA_SUCCESS) { 6940 rval = qla83xx_idc_state_handler(vha); 6941 6942 if (rval == QLA_SUCCESS) 6943 ha->flags.nic_core_hung = 0; 6944 __qla83xx_clear_drv_ack(vha); 6945 } 6946 6947 exit: 6948 qla83xx_idc_unlock(vha, 0); 6949 6950 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6951 6952 return rval; 6953 } 6954 6955 int 6956 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6957 { 6958 struct qla_hw_data *ha = vha->hw; 6959 int rval = QLA_FUNCTION_FAILED; 6960 6961 if (!IS_MCTP_CAPABLE(ha)) { 6962 /* This message can be removed from the final version */ 6963 ql_log(ql_log_info, vha, 0x506d, 6964 "This board is not MCTP capable\n"); 6965 return rval; 6966 } 6967 6968 if (!ha->mctp_dump) { 6969 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6970 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6971 6972 if (!ha->mctp_dump) { 6973 ql_log(ql_log_warn, vha, 0x506e, 6974 "Failed to allocate memory for mctp dump\n"); 6975 return rval; 6976 } 6977 } 6978 6979 #define MCTP_DUMP_STR_ADDR 0x00000000 6980 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6981 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6982 if (rval != QLA_SUCCESS) { 6983 ql_log(ql_log_warn, vha, 0x506f, 6984 "Failed to capture mctp dump\n"); 6985 } else { 6986 ql_log(ql_log_info, vha, 0x5070, 6987 "Mctp dump capture for host (%ld/%p).\n", 6988 vha->host_no, ha->mctp_dump); 6989 ha->mctp_dumped = 1; 6990 } 6991 6992 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6993 ha->flags.nic_core_reset_hdlr_active = 1; 6994 rval = qla83xx_restart_nic_firmware(vha); 6995 if (rval) 6996 /* NIC Core reset failed. */ 6997 ql_log(ql_log_warn, vha, 0x5071, 6998 "Failed to restart nic firmware\n"); 6999 else 7000 ql_dbg(ql_dbg_p3p, vha, 0xb084, 7001 "Restarted NIC firmware successfully.\n"); 7002 ha->flags.nic_core_reset_hdlr_active = 0; 7003 } 7004 7005 return rval; 7006 7007 } 7008 7009 /* 7010 * qla2x00_quiesce_io 7011 * Description: This function will block the new I/Os 7012 * Its not aborting any I/Os as context 7013 * is not destroyed during quiescence 7014 * Arguments: scsi_qla_host_t 7015 * return : void 7016 */ 7017 void 7018 qla2x00_quiesce_io(scsi_qla_host_t *vha) 7019 { 7020 struct qla_hw_data *ha = vha->hw; 7021 struct scsi_qla_host *vp, *tvp; 7022 unsigned long flags; 7023 7024 ql_dbg(ql_dbg_dpc, vha, 0x401d, 7025 "Quiescing I/O - ha=%p.\n", ha); 7026 7027 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 7028 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7029 atomic_set(&vha->loop_state, LOOP_DOWN); 7030 qla2x00_mark_all_devices_lost(vha); 7031 7032 spin_lock_irqsave(&ha->vport_slock, flags); 7033 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7034 atomic_inc(&vp->vref_count); 7035 spin_unlock_irqrestore(&ha->vport_slock, flags); 7036 7037 qla2x00_mark_all_devices_lost(vp); 7038 7039 spin_lock_irqsave(&ha->vport_slock, flags); 7040 atomic_dec(&vp->vref_count); 7041 } 7042 spin_unlock_irqrestore(&ha->vport_slock, flags); 7043 } else { 7044 if (!atomic_read(&vha->loop_down_timer)) 7045 atomic_set(&vha->loop_down_timer, 7046 LOOP_DOWN_TIME); 7047 } 7048 /* Wait for pending cmds to complete */ 7049 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 7050 != QLA_SUCCESS); 7051 } 7052 7053 void 7054 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 7055 { 7056 struct qla_hw_data *ha = vha->hw; 7057 struct scsi_qla_host *vp, *tvp; 7058 unsigned long flags; 7059 fc_port_t *fcport; 7060 u16 i; 7061 7062 /* For ISP82XX, driver waits for completion of the commands. 7063 * online flag should be set. 7064 */ 7065 if (!(IS_P3P_TYPE(ha))) 7066 vha->flags.online = 0; 7067 ha->flags.chip_reset_done = 0; 7068 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 7069 vha->qla_stats.total_isp_aborts++; 7070 7071 ql_log(ql_log_info, vha, 0x00af, 7072 "Performing ISP error recovery - ha=%p.\n", ha); 7073 7074 ha->flags.purge_mbox = 1; 7075 /* For ISP82XX, reset_chip is just disabling interrupts. 7076 * Driver waits for the completion of the commands. 7077 * the interrupts need to be enabled. 7078 */ 7079 if (!(IS_P3P_TYPE(ha))) 7080 ha->isp_ops->reset_chip(vha); 7081 7082 ha->link_data_rate = PORT_SPEED_UNKNOWN; 7083 SAVE_TOPO(ha); 7084 ha->flags.rida_fmt2 = 0; 7085 ha->flags.n2n_ae = 0; 7086 ha->flags.lip_ae = 0; 7087 ha->current_topology = 0; 7088 QLA_FW_STOPPED(ha); 7089 ha->flags.fw_init_done = 0; 7090 ha->chip_reset++; 7091 ha->base_qpair->chip_reset = ha->chip_reset; 7092 ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0; 7093 ha->base_qpair->prev_completion_cnt = 0; 7094 for (i = 0; i < ha->max_qpairs; i++) { 7095 if (ha->queue_pair_map[i]) { 7096 ha->queue_pair_map[i]->chip_reset = 7097 ha->base_qpair->chip_reset; 7098 ha->queue_pair_map[i]->cmd_cnt = 7099 ha->queue_pair_map[i]->cmd_completion_cnt = 0; 7100 ha->base_qpair->prev_completion_cnt = 0; 7101 } 7102 } 7103 7104 /* purge MBox commands */ 7105 if (atomic_read(&ha->num_pend_mbx_stage3)) { 7106 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 7107 complete(&ha->mbx_intr_comp); 7108 } 7109 7110 i = 0; 7111 while (atomic_read(&ha->num_pend_mbx_stage3) || 7112 atomic_read(&ha->num_pend_mbx_stage2) || 7113 atomic_read(&ha->num_pend_mbx_stage1)) { 7114 msleep(20); 7115 i++; 7116 if (i > 50) 7117 break; 7118 } 7119 ha->flags.purge_mbox = 0; 7120 7121 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 7122 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 7123 atomic_set(&vha->loop_state, LOOP_DOWN); 7124 qla2x00_mark_all_devices_lost(vha); 7125 7126 spin_lock_irqsave(&ha->vport_slock, flags); 7127 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7128 atomic_inc(&vp->vref_count); 7129 spin_unlock_irqrestore(&ha->vport_slock, flags); 7130 7131 qla2x00_mark_all_devices_lost(vp); 7132 7133 spin_lock_irqsave(&ha->vport_slock, flags); 7134 atomic_dec(&vp->vref_count); 7135 } 7136 spin_unlock_irqrestore(&ha->vport_slock, flags); 7137 } else { 7138 if (!atomic_read(&vha->loop_down_timer)) 7139 atomic_set(&vha->loop_down_timer, 7140 LOOP_DOWN_TIME); 7141 } 7142 7143 /* Clear all async request states across all VPs. */ 7144 list_for_each_entry(fcport, &vha->vp_fcports, list) { 7145 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7146 fcport->scan_state = 0; 7147 } 7148 spin_lock_irqsave(&ha->vport_slock, flags); 7149 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7150 atomic_inc(&vp->vref_count); 7151 spin_unlock_irqrestore(&ha->vport_slock, flags); 7152 7153 list_for_each_entry(fcport, &vp->vp_fcports, list) 7154 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 7155 7156 spin_lock_irqsave(&ha->vport_slock, flags); 7157 atomic_dec(&vp->vref_count); 7158 } 7159 spin_unlock_irqrestore(&ha->vport_slock, flags); 7160 7161 /* Make sure for ISP 82XX IO DMA is complete */ 7162 if (IS_P3P_TYPE(ha)) { 7163 qla82xx_chip_reset_cleanup(vha); 7164 ql_log(ql_log_info, vha, 0x00b4, 7165 "Done chip reset cleanup.\n"); 7166 7167 /* Done waiting for pending commands. Reset online flag */ 7168 vha->flags.online = 0; 7169 } 7170 7171 /* Requeue all commands in outstanding command list. */ 7172 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 7173 /* memory barrier */ 7174 wmb(); 7175 } 7176 7177 /* 7178 * qla2x00_abort_isp 7179 * Resets ISP and aborts all outstanding commands. 7180 * 7181 * Input: 7182 * ha = adapter block pointer. 7183 * 7184 * Returns: 7185 * 0 = success 7186 */ 7187 int 7188 qla2x00_abort_isp(scsi_qla_host_t *vha) 7189 { 7190 int rval; 7191 uint8_t status = 0; 7192 struct qla_hw_data *ha = vha->hw; 7193 struct scsi_qla_host *vp, *tvp; 7194 struct req_que *req = ha->req_q_map[0]; 7195 unsigned long flags; 7196 7197 if (vha->flags.online) { 7198 qla2x00_abort_isp_cleanup(vha); 7199 7200 if (vha->hw->flags.port_isolated) 7201 return status; 7202 7203 if (qla2x00_isp_reg_stat(ha)) { 7204 ql_log(ql_log_info, vha, 0x803f, 7205 "ISP Abort - ISP reg disconnect, exiting.\n"); 7206 return status; 7207 } 7208 7209 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 7210 ha->flags.chip_reset_done = 1; 7211 vha->flags.online = 1; 7212 status = 0; 7213 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7214 return status; 7215 } 7216 7217 if (IS_QLA8031(ha)) { 7218 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 7219 "Clearing fcoe driver presence.\n"); 7220 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 7221 ql_dbg(ql_dbg_p3p, vha, 0xb073, 7222 "Error while clearing DRV-Presence.\n"); 7223 } 7224 7225 if (unlikely(pci_channel_offline(ha->pdev) && 7226 ha->flags.pci_channel_io_perm_failure)) { 7227 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7228 status = 0; 7229 return status; 7230 } 7231 7232 switch (vha->qlini_mode) { 7233 case QLA2XXX_INI_MODE_DISABLED: 7234 if (!qla_tgt_mode_enabled(vha)) 7235 return 0; 7236 break; 7237 case QLA2XXX_INI_MODE_DUAL: 7238 if (!qla_dual_mode_enabled(vha) && 7239 !qla_ini_mode_enabled(vha)) 7240 return 0; 7241 break; 7242 case QLA2XXX_INI_MODE_ENABLED: 7243 default: 7244 break; 7245 } 7246 7247 ha->isp_ops->get_flash_version(vha, req->ring); 7248 7249 if (qla2x00_isp_reg_stat(ha)) { 7250 ql_log(ql_log_info, vha, 0x803f, 7251 "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n"); 7252 return status; 7253 } 7254 ha->isp_ops->nvram_config(vha); 7255 7256 if (qla2x00_isp_reg_stat(ha)) { 7257 ql_log(ql_log_info, vha, 0x803f, 7258 "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n"); 7259 return status; 7260 } 7261 if (!qla2x00_restart_isp(vha)) { 7262 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7263 7264 if (!atomic_read(&vha->loop_down_timer)) { 7265 /* 7266 * Issue marker command only when we are going 7267 * to start the I/O . 7268 */ 7269 vha->marker_needed = 1; 7270 } 7271 7272 vha->flags.online = 1; 7273 7274 ha->isp_ops->enable_intrs(ha); 7275 7276 ha->isp_abort_cnt = 0; 7277 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7278 7279 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 7280 qla2x00_get_fw_version(vha); 7281 if (ha->fce) { 7282 ha->flags.fce_enabled = 1; 7283 memset(ha->fce, 0, 7284 fce_calc_size(ha->fce_bufs)); 7285 rval = qla2x00_enable_fce_trace(vha, 7286 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 7287 &ha->fce_bufs); 7288 if (rval) { 7289 ql_log(ql_log_warn, vha, 0x8033, 7290 "Unable to reinitialize FCE " 7291 "(%d).\n", rval); 7292 ha->flags.fce_enabled = 0; 7293 } 7294 } 7295 7296 if (ha->eft) { 7297 memset(ha->eft, 0, EFT_SIZE); 7298 rval = qla2x00_enable_eft_trace(vha, 7299 ha->eft_dma, EFT_NUM_BUFFERS); 7300 if (rval) { 7301 ql_log(ql_log_warn, vha, 0x8034, 7302 "Unable to reinitialize EFT " 7303 "(%d).\n", rval); 7304 } 7305 } 7306 } else { /* failed the ISP abort */ 7307 vha->flags.online = 1; 7308 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 7309 if (ha->isp_abort_cnt == 0) { 7310 ql_log(ql_log_fatal, vha, 0x8035, 7311 "ISP error recover failed - " 7312 "board disabled.\n"); 7313 /* 7314 * The next call disables the board 7315 * completely. 7316 */ 7317 qla2x00_abort_isp_cleanup(vha); 7318 vha->flags.online = 0; 7319 clear_bit(ISP_ABORT_RETRY, 7320 &vha->dpc_flags); 7321 status = 0; 7322 } else { /* schedule another ISP abort */ 7323 ha->isp_abort_cnt--; 7324 ql_dbg(ql_dbg_taskm, vha, 0x8020, 7325 "ISP abort - retry remaining %d.\n", 7326 ha->isp_abort_cnt); 7327 status = 1; 7328 } 7329 } else { 7330 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 7331 ql_dbg(ql_dbg_taskm, vha, 0x8021, 7332 "ISP error recovery - retrying (%d) " 7333 "more times.\n", ha->isp_abort_cnt); 7334 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7335 status = 1; 7336 } 7337 } 7338 7339 } 7340 7341 if (vha->hw->flags.port_isolated) { 7342 qla2x00_abort_isp_cleanup(vha); 7343 return status; 7344 } 7345 7346 if (!status) { 7347 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 7348 qla2x00_configure_hba(vha); 7349 spin_lock_irqsave(&ha->vport_slock, flags); 7350 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 7351 if (vp->vp_idx) { 7352 atomic_inc(&vp->vref_count); 7353 spin_unlock_irqrestore(&ha->vport_slock, flags); 7354 7355 qla2x00_vp_abort_isp(vp); 7356 7357 spin_lock_irqsave(&ha->vport_slock, flags); 7358 atomic_dec(&vp->vref_count); 7359 } 7360 } 7361 spin_unlock_irqrestore(&ha->vport_slock, flags); 7362 7363 if (IS_QLA8031(ha)) { 7364 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 7365 "Setting back fcoe driver presence.\n"); 7366 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 7367 ql_dbg(ql_dbg_p3p, vha, 0xb074, 7368 "Error while setting DRV-Presence.\n"); 7369 } 7370 } else { 7371 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 7372 __func__); 7373 } 7374 7375 return(status); 7376 } 7377 7378 /* 7379 * qla2x00_restart_isp 7380 * restarts the ISP after a reset 7381 * 7382 * Input: 7383 * ha = adapter block pointer. 7384 * 7385 * Returns: 7386 * 0 = success 7387 */ 7388 static int 7389 qla2x00_restart_isp(scsi_qla_host_t *vha) 7390 { 7391 int status; 7392 struct qla_hw_data *ha = vha->hw; 7393 7394 /* If firmware needs to be loaded */ 7395 if (qla2x00_isp_firmware(vha)) { 7396 vha->flags.online = 0; 7397 status = ha->isp_ops->chip_diag(vha); 7398 if (status) 7399 return status; 7400 status = qla2x00_setup_chip(vha); 7401 if (status) 7402 return status; 7403 } 7404 7405 status = qla2x00_init_rings(vha); 7406 if (status) 7407 return status; 7408 7409 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7410 ha->flags.chip_reset_done = 1; 7411 7412 /* Initialize the queues in use */ 7413 qla25xx_init_queues(ha); 7414 7415 status = qla2x00_fw_ready(vha); 7416 if (status) { 7417 /* if no cable then assume it's good */ 7418 return vha->device_flags & DFLG_NO_CABLE ? 0 : status; 7419 } 7420 7421 /* Issue a marker after FW becomes ready. */ 7422 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7423 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7424 7425 return 0; 7426 } 7427 7428 static int 7429 qla25xx_init_queues(struct qla_hw_data *ha) 7430 { 7431 struct rsp_que *rsp = NULL; 7432 struct req_que *req = NULL; 7433 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7434 int ret = -1; 7435 int i; 7436 7437 for (i = 1; i < ha->max_rsp_queues; i++) { 7438 rsp = ha->rsp_q_map[i]; 7439 if (rsp && test_bit(i, ha->rsp_qid_map)) { 7440 rsp->options &= ~BIT_0; 7441 ret = qla25xx_init_rsp_que(base_vha, rsp); 7442 if (ret != QLA_SUCCESS) 7443 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 7444 "%s Rsp que: %d init failed.\n", 7445 __func__, rsp->id); 7446 else 7447 ql_dbg(ql_dbg_init, base_vha, 0x0100, 7448 "%s Rsp que: %d inited.\n", 7449 __func__, rsp->id); 7450 } 7451 } 7452 for (i = 1; i < ha->max_req_queues; i++) { 7453 req = ha->req_q_map[i]; 7454 if (req && test_bit(i, ha->req_qid_map)) { 7455 /* Clear outstanding commands array. */ 7456 req->options &= ~BIT_0; 7457 ret = qla25xx_init_req_que(base_vha, req); 7458 if (ret != QLA_SUCCESS) 7459 ql_dbg(ql_dbg_init, base_vha, 0x0101, 7460 "%s Req que: %d init failed.\n", 7461 __func__, req->id); 7462 else 7463 ql_dbg(ql_dbg_init, base_vha, 0x0102, 7464 "%s Req que: %d inited.\n", 7465 __func__, req->id); 7466 } 7467 } 7468 return ret; 7469 } 7470 7471 /* 7472 * qla2x00_reset_adapter 7473 * Reset adapter. 7474 * 7475 * Input: 7476 * ha = adapter block pointer. 7477 */ 7478 int 7479 qla2x00_reset_adapter(scsi_qla_host_t *vha) 7480 { 7481 unsigned long flags = 0; 7482 struct qla_hw_data *ha = vha->hw; 7483 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7484 7485 vha->flags.online = 0; 7486 ha->isp_ops->disable_intrs(ha); 7487 7488 spin_lock_irqsave(&ha->hardware_lock, flags); 7489 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 7490 rd_reg_word(®->hccr); /* PCI Posting. */ 7491 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 7492 rd_reg_word(®->hccr); /* PCI Posting. */ 7493 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7494 7495 return QLA_SUCCESS; 7496 } 7497 7498 int 7499 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7500 { 7501 unsigned long flags = 0; 7502 struct qla_hw_data *ha = vha->hw; 7503 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7504 7505 if (IS_P3P_TYPE(ha)) 7506 return QLA_SUCCESS; 7507 7508 vha->flags.online = 0; 7509 ha->isp_ops->disable_intrs(ha); 7510 7511 spin_lock_irqsave(&ha->hardware_lock, flags); 7512 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 7513 rd_reg_dword(®->hccr); 7514 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 7515 rd_reg_dword(®->hccr); 7516 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7517 7518 if (IS_NOPOLLING_TYPE(ha)) 7519 ha->isp_ops->enable_intrs(ha); 7520 7521 return QLA_SUCCESS; 7522 } 7523 7524 /* On sparc systems, obtain port and node WWN from firmware 7525 * properties. 7526 */ 7527 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7528 struct nvram_24xx *nv) 7529 { 7530 #ifdef CONFIG_SPARC 7531 struct qla_hw_data *ha = vha->hw; 7532 struct pci_dev *pdev = ha->pdev; 7533 struct device_node *dp = pci_device_to_OF_node(pdev); 7534 const u8 *val; 7535 int len; 7536 7537 val = of_get_property(dp, "port-wwn", &len); 7538 if (val && len >= WWN_SIZE) 7539 memcpy(nv->port_name, val, WWN_SIZE); 7540 7541 val = of_get_property(dp, "node-wwn", &len); 7542 if (val && len >= WWN_SIZE) 7543 memcpy(nv->node_name, val, WWN_SIZE); 7544 #endif 7545 } 7546 7547 int 7548 qla24xx_nvram_config(scsi_qla_host_t *vha) 7549 { 7550 int rval; 7551 struct init_cb_24xx *icb; 7552 struct nvram_24xx *nv; 7553 __le32 *dptr; 7554 uint8_t *dptr1, *dptr2; 7555 uint32_t chksum; 7556 uint16_t cnt; 7557 struct qla_hw_data *ha = vha->hw; 7558 7559 rval = QLA_SUCCESS; 7560 icb = (struct init_cb_24xx *)ha->init_cb; 7561 nv = ha->nvram; 7562 7563 /* Determine NVRAM starting address. */ 7564 if (ha->port_no == 0) { 7565 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7566 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7567 } else { 7568 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7569 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7570 } 7571 7572 ha->nvram_size = sizeof(*nv); 7573 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7574 7575 /* Get VPD data into cache */ 7576 ha->vpd = ha->nvram + VPD_OFFSET; 7577 ha->isp_ops->read_nvram(vha, ha->vpd, 7578 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7579 7580 /* Get NVRAM data into cache and calculate checksum. */ 7581 dptr = (__force __le32 *)nv; 7582 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7583 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7584 chksum += le32_to_cpu(*dptr); 7585 7586 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7587 "Contents of NVRAM\n"); 7588 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7589 nv, ha->nvram_size); 7590 7591 /* Bad NVRAM data, set defaults parameters. */ 7592 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7593 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7594 /* Reset NVRAM data. */ 7595 ql_log(ql_log_warn, vha, 0x006b, 7596 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7597 chksum, nv->id, nv->nvram_version); 7598 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7599 ql_log(ql_log_warn, vha, 0x006c, 7600 "Falling back to functioning (yet invalid -- WWPN) " 7601 "defaults.\n"); 7602 7603 /* 7604 * Set default initialization control block. 7605 */ 7606 memset(nv, 0, ha->nvram_size); 7607 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7608 nv->version = cpu_to_le16(ICB_VERSION); 7609 nv->frame_payload_size = cpu_to_le16(2048); 7610 nv->execution_throttle = cpu_to_le16(0xFFFF); 7611 nv->exchange_count = cpu_to_le16(0); 7612 nv->hard_address = cpu_to_le16(124); 7613 nv->port_name[0] = 0x21; 7614 nv->port_name[1] = 0x00 + ha->port_no + 1; 7615 nv->port_name[2] = 0x00; 7616 nv->port_name[3] = 0xe0; 7617 nv->port_name[4] = 0x8b; 7618 nv->port_name[5] = 0x1c; 7619 nv->port_name[6] = 0x55; 7620 nv->port_name[7] = 0x86; 7621 nv->node_name[0] = 0x20; 7622 nv->node_name[1] = 0x00; 7623 nv->node_name[2] = 0x00; 7624 nv->node_name[3] = 0xe0; 7625 nv->node_name[4] = 0x8b; 7626 nv->node_name[5] = 0x1c; 7627 nv->node_name[6] = 0x55; 7628 nv->node_name[7] = 0x86; 7629 qla24xx_nvram_wwn_from_ofw(vha, nv); 7630 nv->login_retry_count = cpu_to_le16(8); 7631 nv->interrupt_delay_timer = cpu_to_le16(0); 7632 nv->login_timeout = cpu_to_le16(0); 7633 nv->firmware_options_1 = 7634 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7635 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7636 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7637 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7638 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7639 nv->efi_parameters = cpu_to_le32(0); 7640 nv->reset_delay = 5; 7641 nv->max_luns_per_target = cpu_to_le16(128); 7642 nv->port_down_retry_count = cpu_to_le16(30); 7643 nv->link_down_timeout = cpu_to_le16(30); 7644 7645 rval = 1; 7646 } 7647 7648 if (qla_tgt_mode_enabled(vha)) { 7649 /* Don't enable full login after initial LIP */ 7650 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7651 /* Don't enable LIP full login for initiator */ 7652 nv->host_p &= cpu_to_le32(~BIT_10); 7653 } 7654 7655 qlt_24xx_config_nvram_stage1(vha, nv); 7656 7657 /* Reset Initialization control block */ 7658 memset(icb, 0, ha->init_cb_size); 7659 7660 /* Copy 1st segment. */ 7661 dptr1 = (uint8_t *)icb; 7662 dptr2 = (uint8_t *)&nv->version; 7663 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7664 while (cnt--) 7665 *dptr1++ = *dptr2++; 7666 7667 icb->login_retry_count = nv->login_retry_count; 7668 icb->link_down_on_nos = nv->link_down_on_nos; 7669 7670 /* Copy 2nd segment. */ 7671 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7672 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7673 cnt = (uint8_t *)&icb->reserved_3 - 7674 (uint8_t *)&icb->interrupt_delay_timer; 7675 while (cnt--) 7676 *dptr1++ = *dptr2++; 7677 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7678 /* 7679 * Setup driver NVRAM options. 7680 */ 7681 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7682 "QLA2462"); 7683 7684 qlt_24xx_config_nvram_stage2(vha, icb); 7685 7686 if (nv->host_p & cpu_to_le32(BIT_15)) { 7687 /* Use alternate WWN? */ 7688 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7689 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7690 } 7691 7692 /* Prepare nodename */ 7693 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7694 /* 7695 * Firmware will apply the following mask if the nodename was 7696 * not provided. 7697 */ 7698 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7699 icb->node_name[0] &= 0xF0; 7700 } 7701 7702 /* Set host adapter parameters. */ 7703 ha->flags.disable_risc_code_load = 0; 7704 ha->flags.enable_lip_reset = 0; 7705 ha->flags.enable_lip_full_login = 7706 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7707 ha->flags.enable_target_reset = 7708 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7709 ha->flags.enable_led_scheme = 0; 7710 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7711 7712 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7713 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7714 7715 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7716 sizeof(ha->fw_seriallink_options24)); 7717 7718 /* save HBA serial number */ 7719 ha->serial0 = icb->port_name[5]; 7720 ha->serial1 = icb->port_name[6]; 7721 ha->serial2 = icb->port_name[7]; 7722 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7723 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7724 7725 icb->execution_throttle = cpu_to_le16(0xFFFF); 7726 7727 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7728 7729 /* Set minimum login_timeout to 4 seconds. */ 7730 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7731 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7732 if (le16_to_cpu(nv->login_timeout) < 4) 7733 nv->login_timeout = cpu_to_le16(4); 7734 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7735 7736 /* Set minimum RATOV to 100 tenths of a second. */ 7737 ha->r_a_tov = 100; 7738 7739 ha->loop_reset_delay = nv->reset_delay; 7740 7741 /* Link Down Timeout = 0: 7742 * 7743 * When Port Down timer expires we will start returning 7744 * I/O's to OS with "DID_NO_CONNECT". 7745 * 7746 * Link Down Timeout != 0: 7747 * 7748 * The driver waits for the link to come up after link down 7749 * before returning I/Os to OS with "DID_NO_CONNECT". 7750 */ 7751 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7752 ha->loop_down_abort_time = 7753 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7754 } else { 7755 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7756 ha->loop_down_abort_time = 7757 (LOOP_DOWN_TIME - ha->link_down_timeout); 7758 } 7759 7760 /* Need enough time to try and get the port back. */ 7761 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7762 if (qlport_down_retry) 7763 ha->port_down_retry_count = qlport_down_retry; 7764 7765 /* Set login_retry_count */ 7766 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7767 if (ha->port_down_retry_count == 7768 le16_to_cpu(nv->port_down_retry_count) && 7769 ha->port_down_retry_count > 3) 7770 ha->login_retry_count = ha->port_down_retry_count; 7771 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7772 ha->login_retry_count = ha->port_down_retry_count; 7773 if (ql2xloginretrycount) 7774 ha->login_retry_count = ql2xloginretrycount; 7775 7776 /* N2N: driver will initiate Login instead of FW */ 7777 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 7778 7779 /* Enable ZIO. */ 7780 if (!vha->flags.init_done) { 7781 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7782 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7783 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7784 le16_to_cpu(icb->interrupt_delay_timer) : 2; 7785 } 7786 icb->firmware_options_2 &= cpu_to_le32( 7787 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7788 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7789 ha->zio_mode = QLA_ZIO_MODE_6; 7790 7791 ql_log(ql_log_info, vha, 0x006f, 7792 "ZIO mode %d enabled; timer delay (%d us).\n", 7793 ha->zio_mode, ha->zio_timer * 100); 7794 7795 icb->firmware_options_2 |= cpu_to_le32( 7796 (uint32_t)ha->zio_mode); 7797 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7798 } 7799 7800 if (rval) { 7801 ql_log(ql_log_warn, vha, 0x0070, 7802 "NVRAM configuration failed.\n"); 7803 } 7804 return (rval); 7805 } 7806 7807 static void 7808 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 7809 struct qla27xx_image_status *image_status) 7810 { 7811 ql_dbg(ql_dbg_init, vha, 0x018b, 7812 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 7813 name, "status", 7814 image_status->image_status_mask, 7815 le16_to_cpu(image_status->generation), 7816 image_status->ver_major, 7817 image_status->ver_minor, 7818 image_status->bitmap, 7819 le32_to_cpu(image_status->checksum), 7820 le32_to_cpu(image_status->signature)); 7821 } 7822 7823 static bool 7824 qla28xx_check_aux_image_status_signature( 7825 struct qla27xx_image_status *image_status) 7826 { 7827 ulong signature = le32_to_cpu(image_status->signature); 7828 7829 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 7830 } 7831 7832 static bool 7833 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 7834 { 7835 ulong signature = le32_to_cpu(image_status->signature); 7836 7837 return 7838 signature != QLA27XX_IMG_STATUS_SIGN && 7839 signature != QLA28XX_IMG_STATUS_SIGN; 7840 } 7841 7842 static ulong 7843 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 7844 { 7845 __le32 *p = (__force __le32 *)image_status; 7846 uint n = sizeof(*image_status) / sizeof(*p); 7847 uint32_t sum = 0; 7848 7849 for ( ; n--; p++) 7850 sum += le32_to_cpup(p); 7851 7852 return sum; 7853 } 7854 7855 static inline uint 7856 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 7857 { 7858 return aux->bitmap & bitmask ? 7859 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 7860 } 7861 7862 static void 7863 qla28xx_component_status( 7864 struct active_regions *active_regions, struct qla27xx_image_status *aux) 7865 { 7866 active_regions->aux.board_config = 7867 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 7868 7869 active_regions->aux.vpd_nvram = 7870 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 7871 7872 active_regions->aux.npiv_config_0_1 = 7873 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 7874 7875 active_regions->aux.npiv_config_2_3 = 7876 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 7877 } 7878 7879 static int 7880 qla27xx_compare_image_generation( 7881 struct qla27xx_image_status *pri_image_status, 7882 struct qla27xx_image_status *sec_image_status) 7883 { 7884 /* calculate generation delta as uint16 (this accounts for wrap) */ 7885 int16_t delta = 7886 le16_to_cpu(pri_image_status->generation) - 7887 le16_to_cpu(sec_image_status->generation); 7888 7889 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 7890 7891 return delta; 7892 } 7893 7894 void 7895 qla28xx_get_aux_images( 7896 struct scsi_qla_host *vha, struct active_regions *active_regions) 7897 { 7898 struct qla_hw_data *ha = vha->hw; 7899 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 7900 bool valid_pri_image = false, valid_sec_image = false; 7901 bool active_pri_image = false, active_sec_image = false; 7902 7903 if (!ha->flt_region_aux_img_status_pri) { 7904 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 7905 goto check_sec_image; 7906 } 7907 7908 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status, 7909 ha->flt_region_aux_img_status_pri, 7910 sizeof(pri_aux_image_status) >> 2); 7911 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 7912 7913 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 7914 ql_dbg(ql_dbg_init, vha, 0x018b, 7915 "Primary aux image signature (%#x) not valid\n", 7916 le32_to_cpu(pri_aux_image_status.signature)); 7917 goto check_sec_image; 7918 } 7919 7920 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 7921 ql_dbg(ql_dbg_init, vha, 0x018c, 7922 "Primary aux image checksum failed\n"); 7923 goto check_sec_image; 7924 } 7925 7926 valid_pri_image = true; 7927 7928 if (pri_aux_image_status.image_status_mask & 1) { 7929 ql_dbg(ql_dbg_init, vha, 0x018d, 7930 "Primary aux image is active\n"); 7931 active_pri_image = true; 7932 } 7933 7934 check_sec_image: 7935 if (!ha->flt_region_aux_img_status_sec) { 7936 ql_dbg(ql_dbg_init, vha, 0x018a, 7937 "Secondary aux image not addressed\n"); 7938 goto check_valid_image; 7939 } 7940 7941 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status, 7942 ha->flt_region_aux_img_status_sec, 7943 sizeof(sec_aux_image_status) >> 2); 7944 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 7945 7946 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 7947 ql_dbg(ql_dbg_init, vha, 0x018b, 7948 "Secondary aux image signature (%#x) not valid\n", 7949 le32_to_cpu(sec_aux_image_status.signature)); 7950 goto check_valid_image; 7951 } 7952 7953 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 7954 ql_dbg(ql_dbg_init, vha, 0x018c, 7955 "Secondary aux image checksum failed\n"); 7956 goto check_valid_image; 7957 } 7958 7959 valid_sec_image = true; 7960 7961 if (sec_aux_image_status.image_status_mask & 1) { 7962 ql_dbg(ql_dbg_init, vha, 0x018d, 7963 "Secondary aux image is active\n"); 7964 active_sec_image = true; 7965 } 7966 7967 check_valid_image: 7968 if (valid_pri_image && active_pri_image && 7969 valid_sec_image && active_sec_image) { 7970 if (qla27xx_compare_image_generation(&pri_aux_image_status, 7971 &sec_aux_image_status) >= 0) { 7972 qla28xx_component_status(active_regions, 7973 &pri_aux_image_status); 7974 } else { 7975 qla28xx_component_status(active_regions, 7976 &sec_aux_image_status); 7977 } 7978 } else if (valid_pri_image && active_pri_image) { 7979 qla28xx_component_status(active_regions, &pri_aux_image_status); 7980 } else if (valid_sec_image && active_sec_image) { 7981 qla28xx_component_status(active_regions, &sec_aux_image_status); 7982 } 7983 7984 ql_dbg(ql_dbg_init, vha, 0x018f, 7985 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n", 7986 active_regions->aux.board_config, 7987 active_regions->aux.vpd_nvram, 7988 active_regions->aux.npiv_config_0_1, 7989 active_regions->aux.npiv_config_2_3); 7990 } 7991 7992 void 7993 qla27xx_get_active_image(struct scsi_qla_host *vha, 7994 struct active_regions *active_regions) 7995 { 7996 struct qla_hw_data *ha = vha->hw; 7997 struct qla27xx_image_status pri_image_status, sec_image_status; 7998 bool valid_pri_image = false, valid_sec_image = false; 7999 bool active_pri_image = false, active_sec_image = false; 8000 8001 if (!ha->flt_region_img_status_pri) { 8002 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 8003 goto check_sec_image; 8004 } 8005 8006 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status, 8007 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 8008 QLA_SUCCESS) { 8009 WARN_ON_ONCE(true); 8010 goto check_sec_image; 8011 } 8012 qla27xx_print_image(vha, "Primary image", &pri_image_status); 8013 8014 if (qla27xx_check_image_status_signature(&pri_image_status)) { 8015 ql_dbg(ql_dbg_init, vha, 0x018b, 8016 "Primary image signature (%#x) not valid\n", 8017 le32_to_cpu(pri_image_status.signature)); 8018 goto check_sec_image; 8019 } 8020 8021 if (qla27xx_image_status_checksum(&pri_image_status)) { 8022 ql_dbg(ql_dbg_init, vha, 0x018c, 8023 "Primary image checksum failed\n"); 8024 goto check_sec_image; 8025 } 8026 8027 valid_pri_image = true; 8028 8029 if (pri_image_status.image_status_mask & 1) { 8030 ql_dbg(ql_dbg_init, vha, 0x018d, 8031 "Primary image is active\n"); 8032 active_pri_image = true; 8033 } 8034 8035 check_sec_image: 8036 if (!ha->flt_region_img_status_sec) { 8037 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 8038 goto check_valid_image; 8039 } 8040 8041 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 8042 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 8043 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 8044 8045 if (qla27xx_check_image_status_signature(&sec_image_status)) { 8046 ql_dbg(ql_dbg_init, vha, 0x018b, 8047 "Secondary image signature (%#x) not valid\n", 8048 le32_to_cpu(sec_image_status.signature)); 8049 goto check_valid_image; 8050 } 8051 8052 if (qla27xx_image_status_checksum(&sec_image_status)) { 8053 ql_dbg(ql_dbg_init, vha, 0x018c, 8054 "Secondary image checksum failed\n"); 8055 goto check_valid_image; 8056 } 8057 8058 valid_sec_image = true; 8059 8060 if (sec_image_status.image_status_mask & 1) { 8061 ql_dbg(ql_dbg_init, vha, 0x018d, 8062 "Secondary image is active\n"); 8063 active_sec_image = true; 8064 } 8065 8066 check_valid_image: 8067 if (valid_pri_image && active_pri_image) 8068 active_regions->global = QLA27XX_PRIMARY_IMAGE; 8069 8070 if (valid_sec_image && active_sec_image) { 8071 if (!active_regions->global || 8072 qla27xx_compare_image_generation( 8073 &pri_image_status, &sec_image_status) < 0) { 8074 active_regions->global = QLA27XX_SECONDARY_IMAGE; 8075 } 8076 } 8077 8078 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 8079 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 8080 "default (boot/fw)" : 8081 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 8082 "primary" : 8083 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 8084 "secondary" : "invalid", 8085 active_regions->global); 8086 } 8087 8088 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 8089 { 8090 return 8091 !(dword[4] | dword[5] | dword[6] | dword[7]) || 8092 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 8093 } 8094 8095 static int 8096 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 8097 uint32_t faddr) 8098 { 8099 int rval; 8100 uint templates, segments, fragment; 8101 ulong i; 8102 uint j; 8103 ulong dlen; 8104 uint32_t *dcode; 8105 uint32_t risc_addr, risc_size, risc_attr = 0; 8106 struct qla_hw_data *ha = vha->hw; 8107 struct req_que *req = ha->req_q_map[0]; 8108 struct fwdt *fwdt = ha->fwdt; 8109 8110 ql_dbg(ql_dbg_init, vha, 0x008b, 8111 "FW: Loading firmware from flash (%x).\n", faddr); 8112 8113 dcode = (uint32_t *)req->ring; 8114 qla24xx_read_flash_data(vha, dcode, faddr, 8); 8115 if (qla24xx_risc_firmware_invalid(dcode)) { 8116 ql_log(ql_log_fatal, vha, 0x008c, 8117 "Unable to verify the integrity of flash firmware " 8118 "image.\n"); 8119 ql_log(ql_log_fatal, vha, 0x008d, 8120 "Firmware data: %08x %08x %08x %08x.\n", 8121 dcode[0], dcode[1], dcode[2], dcode[3]); 8122 8123 return QLA_FUNCTION_FAILED; 8124 } 8125 8126 dcode = (uint32_t *)req->ring; 8127 *srisc_addr = 0; 8128 segments = FA_RISC_CODE_SEGMENTS; 8129 for (j = 0; j < segments; j++) { 8130 ql_dbg(ql_dbg_init, vha, 0x008d, 8131 "-> Loading segment %u...\n", j); 8132 qla24xx_read_flash_data(vha, dcode, faddr, 10); 8133 risc_addr = be32_to_cpu((__force __be32)dcode[2]); 8134 risc_size = be32_to_cpu((__force __be32)dcode[3]); 8135 if (!*srisc_addr) { 8136 *srisc_addr = risc_addr; 8137 risc_attr = be32_to_cpu((__force __be32)dcode[9]); 8138 } 8139 8140 dlen = ha->fw_transfer_size >> 2; 8141 for (fragment = 0; risc_size; fragment++) { 8142 if (dlen > risc_size) 8143 dlen = risc_size; 8144 8145 ql_dbg(ql_dbg_init, vha, 0x008e, 8146 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 8147 fragment, risc_addr, faddr, dlen); 8148 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 8149 for (i = 0; i < dlen; i++) 8150 dcode[i] = swab32(dcode[i]); 8151 8152 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8153 if (rval) { 8154 ql_log(ql_log_fatal, vha, 0x008f, 8155 "-> Failed load firmware fragment %u.\n", 8156 fragment); 8157 return QLA_FUNCTION_FAILED; 8158 } 8159 8160 faddr += dlen; 8161 risc_addr += dlen; 8162 risc_size -= dlen; 8163 } 8164 } 8165 8166 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8167 return QLA_SUCCESS; 8168 8169 templates = (risc_attr & BIT_9) ? 2 : 1; 8170 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 8171 for (j = 0; j < templates; j++, fwdt++) { 8172 vfree(fwdt->template); 8173 fwdt->template = NULL; 8174 fwdt->length = 0; 8175 8176 dcode = (uint32_t *)req->ring; 8177 qla24xx_read_flash_data(vha, dcode, faddr, 7); 8178 risc_size = be32_to_cpu((__force __be32)dcode[2]); 8179 ql_dbg(ql_dbg_init, vha, 0x0161, 8180 "-> fwdt%u template array at %#x (%#x dwords)\n", 8181 j, faddr, risc_size); 8182 if (!risc_size || !~risc_size) { 8183 ql_dbg(ql_dbg_init, vha, 0x0162, 8184 "-> fwdt%u failed to read array\n", j); 8185 goto failed; 8186 } 8187 8188 /* skip header and ignore checksum */ 8189 faddr += 7; 8190 risc_size -= 8; 8191 8192 ql_dbg(ql_dbg_init, vha, 0x0163, 8193 "-> fwdt%u template allocate template %#x words...\n", 8194 j, risc_size); 8195 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8196 if (!fwdt->template) { 8197 ql_log(ql_log_warn, vha, 0x0164, 8198 "-> fwdt%u failed allocate template.\n", j); 8199 goto failed; 8200 } 8201 8202 dcode = fwdt->template; 8203 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 8204 8205 if (!qla27xx_fwdt_template_valid(dcode)) { 8206 ql_log(ql_log_warn, vha, 0x0165, 8207 "-> fwdt%u failed template validate\n", j); 8208 goto failed; 8209 } 8210 8211 dlen = qla27xx_fwdt_template_size(dcode); 8212 ql_dbg(ql_dbg_init, vha, 0x0166, 8213 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8214 j, dlen, dlen / sizeof(*dcode)); 8215 if (dlen > risc_size * sizeof(*dcode)) { 8216 ql_log(ql_log_warn, vha, 0x0167, 8217 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8218 j, dlen - risc_size * sizeof(*dcode)); 8219 goto failed; 8220 } 8221 8222 fwdt->length = dlen; 8223 ql_dbg(ql_dbg_init, vha, 0x0168, 8224 "-> fwdt%u loaded template ok\n", j); 8225 8226 faddr += risc_size + 1; 8227 } 8228 8229 return QLA_SUCCESS; 8230 8231 failed: 8232 vfree(fwdt->template); 8233 fwdt->template = NULL; 8234 fwdt->length = 0; 8235 8236 return QLA_SUCCESS; 8237 } 8238 8239 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 8240 8241 int 8242 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8243 { 8244 int rval; 8245 int i, fragment; 8246 uint16_t *wcode; 8247 __be16 *fwcode; 8248 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 8249 struct fw_blob *blob; 8250 struct qla_hw_data *ha = vha->hw; 8251 struct req_que *req = ha->req_q_map[0]; 8252 8253 /* Load firmware blob. */ 8254 blob = qla2x00_request_firmware(vha); 8255 if (!blob) { 8256 ql_log(ql_log_info, vha, 0x0083, 8257 "Firmware image unavailable.\n"); 8258 ql_log(ql_log_info, vha, 0x0084, 8259 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 8260 return QLA_FUNCTION_FAILED; 8261 } 8262 8263 rval = QLA_SUCCESS; 8264 8265 wcode = (uint16_t *)req->ring; 8266 *srisc_addr = 0; 8267 fwcode = (__force __be16 *)blob->fw->data; 8268 fwclen = 0; 8269 8270 /* Validate firmware image by checking version. */ 8271 if (blob->fw->size < 8 * sizeof(uint16_t)) { 8272 ql_log(ql_log_fatal, vha, 0x0085, 8273 "Unable to verify integrity of firmware image (%zd).\n", 8274 blob->fw->size); 8275 goto fail_fw_integrity; 8276 } 8277 for (i = 0; i < 4; i++) 8278 wcode[i] = be16_to_cpu(fwcode[i + 4]); 8279 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 8280 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 8281 wcode[2] == 0 && wcode[3] == 0)) { 8282 ql_log(ql_log_fatal, vha, 0x0086, 8283 "Unable to verify integrity of firmware image.\n"); 8284 ql_log(ql_log_fatal, vha, 0x0087, 8285 "Firmware data: %04x %04x %04x %04x.\n", 8286 wcode[0], wcode[1], wcode[2], wcode[3]); 8287 goto fail_fw_integrity; 8288 } 8289 8290 seg = blob->segs; 8291 while (*seg && rval == QLA_SUCCESS) { 8292 risc_addr = *seg; 8293 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 8294 risc_size = be16_to_cpu(fwcode[3]); 8295 8296 /* Validate firmware image size. */ 8297 fwclen += risc_size * sizeof(uint16_t); 8298 if (blob->fw->size < fwclen) { 8299 ql_log(ql_log_fatal, vha, 0x0088, 8300 "Unable to verify integrity of firmware image " 8301 "(%zd).\n", blob->fw->size); 8302 goto fail_fw_integrity; 8303 } 8304 8305 fragment = 0; 8306 while (risc_size > 0 && rval == QLA_SUCCESS) { 8307 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 8308 if (wlen > risc_size) 8309 wlen = risc_size; 8310 ql_dbg(ql_dbg_init, vha, 0x0089, 8311 "Loading risc segment@ risc addr %x number of " 8312 "words 0x%x.\n", risc_addr, wlen); 8313 8314 for (i = 0; i < wlen; i++) 8315 wcode[i] = swab16((__force u32)fwcode[i]); 8316 8317 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 8318 wlen); 8319 if (rval) { 8320 ql_log(ql_log_fatal, vha, 0x008a, 8321 "Failed to load segment %d of firmware.\n", 8322 fragment); 8323 break; 8324 } 8325 8326 fwcode += wlen; 8327 risc_addr += wlen; 8328 risc_size -= wlen; 8329 fragment++; 8330 } 8331 8332 /* Next segment. */ 8333 seg++; 8334 } 8335 return rval; 8336 8337 fail_fw_integrity: 8338 return QLA_FUNCTION_FAILED; 8339 } 8340 8341 static int 8342 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8343 { 8344 int rval; 8345 uint templates, segments, fragment; 8346 uint32_t *dcode; 8347 ulong dlen; 8348 uint32_t risc_addr, risc_size, risc_attr = 0; 8349 ulong i; 8350 uint j; 8351 struct fw_blob *blob; 8352 __be32 *fwcode; 8353 struct qla_hw_data *ha = vha->hw; 8354 struct req_que *req = ha->req_q_map[0]; 8355 struct fwdt *fwdt = ha->fwdt; 8356 8357 ql_dbg(ql_dbg_init, vha, 0x0090, 8358 "-> FW: Loading via request-firmware.\n"); 8359 8360 blob = qla2x00_request_firmware(vha); 8361 if (!blob) { 8362 ql_log(ql_log_warn, vha, 0x0092, 8363 "-> Firmware file not found.\n"); 8364 8365 return QLA_FUNCTION_FAILED; 8366 } 8367 8368 fwcode = (__force __be32 *)blob->fw->data; 8369 dcode = (__force uint32_t *)fwcode; 8370 if (qla24xx_risc_firmware_invalid(dcode)) { 8371 ql_log(ql_log_fatal, vha, 0x0093, 8372 "Unable to verify integrity of firmware image (%zd).\n", 8373 blob->fw->size); 8374 ql_log(ql_log_fatal, vha, 0x0095, 8375 "Firmware data: %08x %08x %08x %08x.\n", 8376 dcode[0], dcode[1], dcode[2], dcode[3]); 8377 return QLA_FUNCTION_FAILED; 8378 } 8379 8380 dcode = (uint32_t *)req->ring; 8381 *srisc_addr = 0; 8382 segments = FA_RISC_CODE_SEGMENTS; 8383 for (j = 0; j < segments; j++) { 8384 ql_dbg(ql_dbg_init, vha, 0x0096, 8385 "-> Loading segment %u...\n", j); 8386 risc_addr = be32_to_cpu(fwcode[2]); 8387 risc_size = be32_to_cpu(fwcode[3]); 8388 8389 if (!*srisc_addr) { 8390 *srisc_addr = risc_addr; 8391 risc_attr = be32_to_cpu(fwcode[9]); 8392 } 8393 8394 dlen = ha->fw_transfer_size >> 2; 8395 for (fragment = 0; risc_size; fragment++) { 8396 if (dlen > risc_size) 8397 dlen = risc_size; 8398 8399 ql_dbg(ql_dbg_init, vha, 0x0097, 8400 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 8401 fragment, risc_addr, 8402 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 8403 dlen); 8404 8405 for (i = 0; i < dlen; i++) 8406 dcode[i] = swab32((__force u32)fwcode[i]); 8407 8408 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8409 if (rval) { 8410 ql_log(ql_log_fatal, vha, 0x0098, 8411 "-> Failed load firmware fragment %u.\n", 8412 fragment); 8413 return QLA_FUNCTION_FAILED; 8414 } 8415 8416 fwcode += dlen; 8417 risc_addr += dlen; 8418 risc_size -= dlen; 8419 } 8420 } 8421 8422 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8423 return QLA_SUCCESS; 8424 8425 templates = (risc_attr & BIT_9) ? 2 : 1; 8426 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 8427 for (j = 0; j < templates; j++, fwdt++) { 8428 vfree(fwdt->template); 8429 fwdt->template = NULL; 8430 fwdt->length = 0; 8431 8432 risc_size = be32_to_cpu(fwcode[2]); 8433 ql_dbg(ql_dbg_init, vha, 0x0171, 8434 "-> fwdt%u template array at %#x (%#x dwords)\n", 8435 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 8436 risc_size); 8437 if (!risc_size || !~risc_size) { 8438 ql_dbg(ql_dbg_init, vha, 0x0172, 8439 "-> fwdt%u failed to read array\n", j); 8440 goto failed; 8441 } 8442 8443 /* skip header and ignore checksum */ 8444 fwcode += 7; 8445 risc_size -= 8; 8446 8447 ql_dbg(ql_dbg_init, vha, 0x0173, 8448 "-> fwdt%u template allocate template %#x words...\n", 8449 j, risc_size); 8450 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8451 if (!fwdt->template) { 8452 ql_log(ql_log_warn, vha, 0x0174, 8453 "-> fwdt%u failed allocate template.\n", j); 8454 goto failed; 8455 } 8456 8457 dcode = fwdt->template; 8458 for (i = 0; i < risc_size; i++) 8459 dcode[i] = (__force u32)fwcode[i]; 8460 8461 if (!qla27xx_fwdt_template_valid(dcode)) { 8462 ql_log(ql_log_warn, vha, 0x0175, 8463 "-> fwdt%u failed template validate\n", j); 8464 goto failed; 8465 } 8466 8467 dlen = qla27xx_fwdt_template_size(dcode); 8468 ql_dbg(ql_dbg_init, vha, 0x0176, 8469 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8470 j, dlen, dlen / sizeof(*dcode)); 8471 if (dlen > risc_size * sizeof(*dcode)) { 8472 ql_log(ql_log_warn, vha, 0x0177, 8473 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8474 j, dlen - risc_size * sizeof(*dcode)); 8475 goto failed; 8476 } 8477 8478 fwdt->length = dlen; 8479 ql_dbg(ql_dbg_init, vha, 0x0178, 8480 "-> fwdt%u loaded template ok\n", j); 8481 8482 fwcode += risc_size + 1; 8483 } 8484 8485 return QLA_SUCCESS; 8486 8487 failed: 8488 vfree(fwdt->template); 8489 fwdt->template = NULL; 8490 fwdt->length = 0; 8491 8492 return QLA_SUCCESS; 8493 } 8494 8495 int 8496 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8497 { 8498 int rval; 8499 8500 if (ql2xfwloadbin == 1) 8501 return qla81xx_load_risc(vha, srisc_addr); 8502 8503 /* 8504 * FW Load priority: 8505 * 1) Firmware via request-firmware interface (.bin file). 8506 * 2) Firmware residing in flash. 8507 */ 8508 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8509 if (rval == QLA_SUCCESS) 8510 return rval; 8511 8512 return qla24xx_load_risc_flash(vha, srisc_addr, 8513 vha->hw->flt_region_fw); 8514 } 8515 8516 int 8517 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8518 { 8519 int rval; 8520 struct qla_hw_data *ha = vha->hw; 8521 struct active_regions active_regions = { }; 8522 8523 if (ql2xfwloadbin == 2) 8524 goto try_blob_fw; 8525 8526 /* FW Load priority: 8527 * 1) Firmware residing in flash. 8528 * 2) Firmware via request-firmware interface (.bin file). 8529 * 3) Golden-Firmware residing in flash -- (limited operation). 8530 */ 8531 8532 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8533 goto try_primary_fw; 8534 8535 qla27xx_get_active_image(vha, &active_regions); 8536 8537 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8538 goto try_primary_fw; 8539 8540 ql_dbg(ql_dbg_init, vha, 0x008b, 8541 "Loading secondary firmware image.\n"); 8542 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8543 if (!rval) 8544 return rval; 8545 8546 try_primary_fw: 8547 ql_dbg(ql_dbg_init, vha, 0x008b, 8548 "Loading primary firmware image.\n"); 8549 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8550 if (!rval) 8551 return rval; 8552 8553 try_blob_fw: 8554 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8555 if (!rval || !ha->flt_region_gold_fw) 8556 return rval; 8557 8558 ql_log(ql_log_info, vha, 0x0099, 8559 "Attempting to fallback to golden firmware.\n"); 8560 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8561 if (rval) 8562 return rval; 8563 8564 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8565 ha->flags.running_gold_fw = 1; 8566 return rval; 8567 } 8568 8569 void 8570 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8571 { 8572 int ret, retries; 8573 struct qla_hw_data *ha = vha->hw; 8574 8575 if (ha->flags.pci_channel_io_perm_failure) 8576 return; 8577 if (!IS_FWI2_CAPABLE(ha)) 8578 return; 8579 if (!ha->fw_major_version) 8580 return; 8581 if (!ha->flags.fw_started) 8582 return; 8583 8584 ret = qla2x00_stop_firmware(vha); 8585 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8586 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8587 ha->isp_ops->reset_chip(vha); 8588 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8589 continue; 8590 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8591 continue; 8592 ql_log(ql_log_info, vha, 0x8015, 8593 "Attempting retry of stop-firmware command.\n"); 8594 ret = qla2x00_stop_firmware(vha); 8595 } 8596 8597 QLA_FW_STOPPED(ha); 8598 ha->flags.fw_init_done = 0; 8599 } 8600 8601 int 8602 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8603 { 8604 int rval = QLA_SUCCESS; 8605 int rval2; 8606 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8607 struct qla_hw_data *ha = vha->hw; 8608 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8609 8610 if (!vha->vp_idx) 8611 return -EINVAL; 8612 8613 rval = qla2x00_fw_ready(base_vha); 8614 8615 if (rval == QLA_SUCCESS) { 8616 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8617 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8618 } 8619 8620 vha->flags.management_server_logged_in = 0; 8621 8622 /* Login to SNS first */ 8623 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8624 BIT_1); 8625 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8626 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8627 ql_dbg(ql_dbg_init, vha, 0x0120, 8628 "Failed SNS login: loop_id=%x, rval2=%d\n", 8629 NPH_SNS, rval2); 8630 else 8631 ql_dbg(ql_dbg_init, vha, 0x0103, 8632 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8633 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8634 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8635 return (QLA_FUNCTION_FAILED); 8636 } 8637 8638 atomic_set(&vha->loop_down_timer, 0); 8639 atomic_set(&vha->loop_state, LOOP_UP); 8640 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8641 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8642 rval = qla2x00_loop_resync(base_vha); 8643 8644 return rval; 8645 } 8646 8647 /* 84XX Support **************************************************************/ 8648 8649 static LIST_HEAD(qla_cs84xx_list); 8650 static DEFINE_MUTEX(qla_cs84xx_mutex); 8651 8652 static struct qla_chip_state_84xx * 8653 qla84xx_get_chip(struct scsi_qla_host *vha) 8654 { 8655 struct qla_chip_state_84xx *cs84xx; 8656 struct qla_hw_data *ha = vha->hw; 8657 8658 mutex_lock(&qla_cs84xx_mutex); 8659 8660 /* Find any shared 84xx chip. */ 8661 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8662 if (cs84xx->bus == ha->pdev->bus) { 8663 kref_get(&cs84xx->kref); 8664 goto done; 8665 } 8666 } 8667 8668 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8669 if (!cs84xx) 8670 goto done; 8671 8672 kref_init(&cs84xx->kref); 8673 spin_lock_init(&cs84xx->access_lock); 8674 mutex_init(&cs84xx->fw_update_mutex); 8675 cs84xx->bus = ha->pdev->bus; 8676 8677 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8678 done: 8679 mutex_unlock(&qla_cs84xx_mutex); 8680 return cs84xx; 8681 } 8682 8683 static void 8684 __qla84xx_chip_release(struct kref *kref) 8685 { 8686 struct qla_chip_state_84xx *cs84xx = 8687 container_of(kref, struct qla_chip_state_84xx, kref); 8688 8689 mutex_lock(&qla_cs84xx_mutex); 8690 list_del(&cs84xx->list); 8691 mutex_unlock(&qla_cs84xx_mutex); 8692 kfree(cs84xx); 8693 } 8694 8695 void 8696 qla84xx_put_chip(struct scsi_qla_host *vha) 8697 { 8698 struct qla_hw_data *ha = vha->hw; 8699 8700 if (ha->cs84xx) 8701 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8702 } 8703 8704 static int 8705 qla84xx_init_chip(scsi_qla_host_t *vha) 8706 { 8707 int rval; 8708 uint16_t status[2]; 8709 struct qla_hw_data *ha = vha->hw; 8710 8711 mutex_lock(&ha->cs84xx->fw_update_mutex); 8712 8713 rval = qla84xx_verify_chip(vha, status); 8714 8715 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8716 8717 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8718 QLA_SUCCESS; 8719 } 8720 8721 /* 81XX Support **************************************************************/ 8722 8723 int 8724 qla81xx_nvram_config(scsi_qla_host_t *vha) 8725 { 8726 int rval; 8727 struct init_cb_81xx *icb; 8728 struct nvram_81xx *nv; 8729 __le32 *dptr; 8730 uint8_t *dptr1, *dptr2; 8731 uint32_t chksum; 8732 uint16_t cnt; 8733 struct qla_hw_data *ha = vha->hw; 8734 uint32_t faddr; 8735 struct active_regions active_regions = { }; 8736 8737 rval = QLA_SUCCESS; 8738 icb = (struct init_cb_81xx *)ha->init_cb; 8739 nv = ha->nvram; 8740 8741 /* Determine NVRAM starting address. */ 8742 ha->nvram_size = sizeof(*nv); 8743 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8744 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8745 ha->vpd_size = FA_VPD_SIZE_82XX; 8746 8747 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8748 qla28xx_get_aux_images(vha, &active_regions); 8749 8750 /* Get VPD data into cache */ 8751 ha->vpd = ha->nvram + VPD_OFFSET; 8752 8753 faddr = ha->flt_region_vpd; 8754 if (IS_QLA28XX(ha)) { 8755 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8756 faddr = ha->flt_region_vpd_sec; 8757 ql_dbg(ql_dbg_init, vha, 0x0110, 8758 "Loading %s nvram image.\n", 8759 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8760 "primary" : "secondary"); 8761 } 8762 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8763 8764 /* Get NVRAM data into cache and calculate checksum. */ 8765 faddr = ha->flt_region_nvram; 8766 if (IS_QLA28XX(ha)) { 8767 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8768 faddr = ha->flt_region_nvram_sec; 8769 } 8770 ql_dbg(ql_dbg_init, vha, 0x0110, 8771 "Loading %s nvram image.\n", 8772 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8773 "primary" : "secondary"); 8774 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8775 8776 dptr = (__force __le32 *)nv; 8777 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8778 chksum += le32_to_cpu(*dptr); 8779 8780 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8781 "Contents of NVRAM:\n"); 8782 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8783 nv, ha->nvram_size); 8784 8785 /* Bad NVRAM data, set defaults parameters. */ 8786 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 8787 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 8788 /* Reset NVRAM data. */ 8789 ql_log(ql_log_info, vha, 0x0073, 8790 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 8791 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 8792 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 8793 ql_log(ql_log_info, vha, 0x0074, 8794 "Falling back to functioning (yet invalid -- WWPN) " 8795 "defaults.\n"); 8796 8797 /* 8798 * Set default initialization control block. 8799 */ 8800 memset(nv, 0, ha->nvram_size); 8801 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8802 nv->version = cpu_to_le16(ICB_VERSION); 8803 nv->frame_payload_size = cpu_to_le16(2048); 8804 nv->execution_throttle = cpu_to_le16(0xFFFF); 8805 nv->exchange_count = cpu_to_le16(0); 8806 nv->port_name[0] = 0x21; 8807 nv->port_name[1] = 0x00 + ha->port_no + 1; 8808 nv->port_name[2] = 0x00; 8809 nv->port_name[3] = 0xe0; 8810 nv->port_name[4] = 0x8b; 8811 nv->port_name[5] = 0x1c; 8812 nv->port_name[6] = 0x55; 8813 nv->port_name[7] = 0x86; 8814 nv->node_name[0] = 0x20; 8815 nv->node_name[1] = 0x00; 8816 nv->node_name[2] = 0x00; 8817 nv->node_name[3] = 0xe0; 8818 nv->node_name[4] = 0x8b; 8819 nv->node_name[5] = 0x1c; 8820 nv->node_name[6] = 0x55; 8821 nv->node_name[7] = 0x86; 8822 nv->login_retry_count = cpu_to_le16(8); 8823 nv->interrupt_delay_timer = cpu_to_le16(0); 8824 nv->login_timeout = cpu_to_le16(0); 8825 nv->firmware_options_1 = 8826 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8827 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8828 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8829 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8830 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8831 nv->efi_parameters = cpu_to_le32(0); 8832 nv->reset_delay = 5; 8833 nv->max_luns_per_target = cpu_to_le16(128); 8834 nv->port_down_retry_count = cpu_to_le16(30); 8835 nv->link_down_timeout = cpu_to_le16(180); 8836 nv->enode_mac[0] = 0x00; 8837 nv->enode_mac[1] = 0xC0; 8838 nv->enode_mac[2] = 0xDD; 8839 nv->enode_mac[3] = 0x04; 8840 nv->enode_mac[4] = 0x05; 8841 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8842 8843 rval = 1; 8844 } 8845 8846 if (IS_T10_PI_CAPABLE(ha)) 8847 nv->frame_payload_size &= cpu_to_le16(~7); 8848 8849 qlt_81xx_config_nvram_stage1(vha, nv); 8850 8851 /* Reset Initialization control block */ 8852 memset(icb, 0, ha->init_cb_size); 8853 8854 /* Copy 1st segment. */ 8855 dptr1 = (uint8_t *)icb; 8856 dptr2 = (uint8_t *)&nv->version; 8857 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8858 while (cnt--) 8859 *dptr1++ = *dptr2++; 8860 8861 icb->login_retry_count = nv->login_retry_count; 8862 8863 /* Copy 2nd segment. */ 8864 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8865 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8866 cnt = (uint8_t *)&icb->reserved_5 - 8867 (uint8_t *)&icb->interrupt_delay_timer; 8868 while (cnt--) 8869 *dptr1++ = *dptr2++; 8870 8871 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8872 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8873 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8874 icb->enode_mac[0] = 0x00; 8875 icb->enode_mac[1] = 0xC0; 8876 icb->enode_mac[2] = 0xDD; 8877 icb->enode_mac[3] = 0x04; 8878 icb->enode_mac[4] = 0x05; 8879 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8880 } 8881 8882 /* Use extended-initialization control block. */ 8883 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8884 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8885 /* 8886 * Setup driver NVRAM options. 8887 */ 8888 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8889 "QLE8XXX"); 8890 8891 qlt_81xx_config_nvram_stage2(vha, icb); 8892 8893 /* Use alternate WWN? */ 8894 if (nv->host_p & cpu_to_le32(BIT_15)) { 8895 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8896 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8897 } 8898 8899 /* Prepare nodename */ 8900 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8901 /* 8902 * Firmware will apply the following mask if the nodename was 8903 * not provided. 8904 */ 8905 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8906 icb->node_name[0] &= 0xF0; 8907 } 8908 8909 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) { 8910 if ((nv->enhanced_features & BIT_7) == 0) 8911 ha->flags.scm_supported_a = 1; 8912 } 8913 8914 /* Set host adapter parameters. */ 8915 ha->flags.disable_risc_code_load = 0; 8916 ha->flags.enable_lip_reset = 0; 8917 ha->flags.enable_lip_full_login = 8918 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 8919 ha->flags.enable_target_reset = 8920 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8921 ha->flags.enable_led_scheme = 0; 8922 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8923 8924 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8925 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8926 8927 /* save HBA serial number */ 8928 ha->serial0 = icb->port_name[5]; 8929 ha->serial1 = icb->port_name[6]; 8930 ha->serial2 = icb->port_name[7]; 8931 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8932 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8933 8934 icb->execution_throttle = cpu_to_le16(0xFFFF); 8935 8936 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8937 8938 /* Set minimum login_timeout to 4 seconds. */ 8939 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8940 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8941 if (le16_to_cpu(nv->login_timeout) < 4) 8942 nv->login_timeout = cpu_to_le16(4); 8943 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8944 8945 /* Set minimum RATOV to 100 tenths of a second. */ 8946 ha->r_a_tov = 100; 8947 8948 ha->loop_reset_delay = nv->reset_delay; 8949 8950 /* Link Down Timeout = 0: 8951 * 8952 * When Port Down timer expires we will start returning 8953 * I/O's to OS with "DID_NO_CONNECT". 8954 * 8955 * Link Down Timeout != 0: 8956 * 8957 * The driver waits for the link to come up after link down 8958 * before returning I/Os to OS with "DID_NO_CONNECT". 8959 */ 8960 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8961 ha->loop_down_abort_time = 8962 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8963 } else { 8964 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8965 ha->loop_down_abort_time = 8966 (LOOP_DOWN_TIME - ha->link_down_timeout); 8967 } 8968 8969 /* Need enough time to try and get the port back. */ 8970 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8971 if (qlport_down_retry) 8972 ha->port_down_retry_count = qlport_down_retry; 8973 8974 /* Set login_retry_count */ 8975 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8976 if (ha->port_down_retry_count == 8977 le16_to_cpu(nv->port_down_retry_count) && 8978 ha->port_down_retry_count > 3) 8979 ha->login_retry_count = ha->port_down_retry_count; 8980 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8981 ha->login_retry_count = ha->port_down_retry_count; 8982 if (ql2xloginretrycount) 8983 ha->login_retry_count = ql2xloginretrycount; 8984 8985 /* if not running MSI-X we need handshaking on interrupts */ 8986 if (!vha->hw->flags.msix_enabled && 8987 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 8988 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8989 8990 /* Enable ZIO. */ 8991 if (!vha->flags.init_done) { 8992 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8993 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8994 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8995 le16_to_cpu(icb->interrupt_delay_timer) : 2; 8996 } 8997 icb->firmware_options_2 &= cpu_to_le32( 8998 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8999 vha->flags.process_response_queue = 0; 9000 if (ha->zio_mode != QLA_ZIO_DISABLED) { 9001 ha->zio_mode = QLA_ZIO_MODE_6; 9002 9003 ql_log(ql_log_info, vha, 0x0075, 9004 "ZIO mode %d enabled; timer delay (%d us).\n", 9005 ha->zio_mode, 9006 ha->zio_timer * 100); 9007 9008 icb->firmware_options_2 |= cpu_to_le32( 9009 (uint32_t)ha->zio_mode); 9010 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 9011 vha->flags.process_response_queue = 1; 9012 } 9013 9014 /* enable RIDA Format2 */ 9015 icb->firmware_options_3 |= cpu_to_le32(BIT_0); 9016 9017 /* N2N: driver will initiate Login instead of FW */ 9018 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 9019 9020 /* Determine NVMe/FCP priority for target ports */ 9021 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 9022 9023 if (rval) { 9024 ql_log(ql_log_warn, vha, 0x0076, 9025 "NVRAM configuration failed.\n"); 9026 } 9027 return (rval); 9028 } 9029 9030 int 9031 qla82xx_restart_isp(scsi_qla_host_t *vha) 9032 { 9033 int status, rval; 9034 struct qla_hw_data *ha = vha->hw; 9035 struct scsi_qla_host *vp, *tvp; 9036 unsigned long flags; 9037 9038 status = qla2x00_init_rings(vha); 9039 if (!status) { 9040 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9041 ha->flags.chip_reset_done = 1; 9042 9043 status = qla2x00_fw_ready(vha); 9044 if (!status) { 9045 /* Issue a marker after FW becomes ready. */ 9046 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 9047 vha->flags.online = 1; 9048 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 9049 } 9050 9051 /* if no cable then assume it's good */ 9052 if ((vha->device_flags & DFLG_NO_CABLE)) 9053 status = 0; 9054 } 9055 9056 if (!status) { 9057 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 9058 9059 if (!atomic_read(&vha->loop_down_timer)) { 9060 /* 9061 * Issue marker command only when we are going 9062 * to start the I/O . 9063 */ 9064 vha->marker_needed = 1; 9065 } 9066 9067 ha->isp_ops->enable_intrs(ha); 9068 9069 ha->isp_abort_cnt = 0; 9070 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 9071 9072 /* Update the firmware version */ 9073 status = qla82xx_check_md_needed(vha); 9074 9075 if (ha->fce) { 9076 ha->flags.fce_enabled = 1; 9077 memset(ha->fce, 0, 9078 fce_calc_size(ha->fce_bufs)); 9079 rval = qla2x00_enable_fce_trace(vha, 9080 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 9081 &ha->fce_bufs); 9082 if (rval) { 9083 ql_log(ql_log_warn, vha, 0x8001, 9084 "Unable to reinitialize FCE (%d).\n", 9085 rval); 9086 ha->flags.fce_enabled = 0; 9087 } 9088 } 9089 9090 if (ha->eft) { 9091 memset(ha->eft, 0, EFT_SIZE); 9092 rval = qla2x00_enable_eft_trace(vha, 9093 ha->eft_dma, EFT_NUM_BUFFERS); 9094 if (rval) { 9095 ql_log(ql_log_warn, vha, 0x8010, 9096 "Unable to reinitialize EFT (%d).\n", 9097 rval); 9098 } 9099 } 9100 } 9101 9102 if (!status) { 9103 ql_dbg(ql_dbg_taskm, vha, 0x8011, 9104 "qla82xx_restart_isp succeeded.\n"); 9105 9106 spin_lock_irqsave(&ha->vport_slock, flags); 9107 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 9108 if (vp->vp_idx) { 9109 atomic_inc(&vp->vref_count); 9110 spin_unlock_irqrestore(&ha->vport_slock, flags); 9111 9112 qla2x00_vp_abort_isp(vp); 9113 9114 spin_lock_irqsave(&ha->vport_slock, flags); 9115 atomic_dec(&vp->vref_count); 9116 } 9117 } 9118 spin_unlock_irqrestore(&ha->vport_slock, flags); 9119 9120 } else { 9121 ql_log(ql_log_warn, vha, 0x8016, 9122 "qla82xx_restart_isp **** FAILED ****.\n"); 9123 } 9124 9125 return status; 9126 } 9127 9128 /* 9129 * qla24xx_get_fcp_prio 9130 * Gets the fcp cmd priority value for the logged in port. 9131 * Looks for a match of the port descriptors within 9132 * each of the fcp prio config entries. If a match is found, 9133 * the tag (priority) value is returned. 9134 * 9135 * Input: 9136 * vha = scsi host structure pointer. 9137 * fcport = port structure pointer. 9138 * 9139 * Return: 9140 * non-zero (if found) 9141 * -1 (if not found) 9142 * 9143 * Context: 9144 * Kernel context 9145 */ 9146 static int 9147 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9148 { 9149 int i, entries; 9150 uint8_t pid_match, wwn_match; 9151 int priority; 9152 uint32_t pid1, pid2; 9153 uint64_t wwn1, wwn2; 9154 struct qla_fcp_prio_entry *pri_entry; 9155 struct qla_hw_data *ha = vha->hw; 9156 9157 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 9158 return -1; 9159 9160 priority = -1; 9161 entries = ha->fcp_prio_cfg->num_entries; 9162 pri_entry = &ha->fcp_prio_cfg->entry[0]; 9163 9164 for (i = 0; i < entries; i++) { 9165 pid_match = wwn_match = 0; 9166 9167 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 9168 pri_entry++; 9169 continue; 9170 } 9171 9172 /* check source pid for a match */ 9173 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 9174 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 9175 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 9176 if (pid1 == INVALID_PORT_ID) 9177 pid_match++; 9178 else if (pid1 == pid2) 9179 pid_match++; 9180 } 9181 9182 /* check destination pid for a match */ 9183 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 9184 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 9185 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 9186 if (pid1 == INVALID_PORT_ID) 9187 pid_match++; 9188 else if (pid1 == pid2) 9189 pid_match++; 9190 } 9191 9192 /* check source WWN for a match */ 9193 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 9194 wwn1 = wwn_to_u64(vha->port_name); 9195 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 9196 if (wwn2 == (uint64_t)-1) 9197 wwn_match++; 9198 else if (wwn1 == wwn2) 9199 wwn_match++; 9200 } 9201 9202 /* check destination WWN for a match */ 9203 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 9204 wwn1 = wwn_to_u64(fcport->port_name); 9205 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 9206 if (wwn2 == (uint64_t)-1) 9207 wwn_match++; 9208 else if (wwn1 == wwn2) 9209 wwn_match++; 9210 } 9211 9212 if (pid_match == 2 || wwn_match == 2) { 9213 /* Found a matching entry */ 9214 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 9215 priority = pri_entry->tag; 9216 break; 9217 } 9218 9219 pri_entry++; 9220 } 9221 9222 return priority; 9223 } 9224 9225 /* 9226 * qla24xx_update_fcport_fcp_prio 9227 * Activates fcp priority for the logged in fc port 9228 * 9229 * Input: 9230 * vha = scsi host structure pointer. 9231 * fcp = port structure pointer. 9232 * 9233 * Return: 9234 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9235 * 9236 * Context: 9237 * Kernel context. 9238 */ 9239 int 9240 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 9241 { 9242 int ret; 9243 int priority; 9244 uint16_t mb[5]; 9245 9246 if (fcport->port_type != FCT_TARGET || 9247 fcport->loop_id == FC_NO_LOOP_ID) 9248 return QLA_FUNCTION_FAILED; 9249 9250 priority = qla24xx_get_fcp_prio(vha, fcport); 9251 if (priority < 0) 9252 return QLA_FUNCTION_FAILED; 9253 9254 if (IS_P3P_TYPE(vha->hw)) { 9255 fcport->fcp_prio = priority & 0xf; 9256 return QLA_SUCCESS; 9257 } 9258 9259 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 9260 if (ret == QLA_SUCCESS) { 9261 if (fcport->fcp_prio != priority) 9262 ql_dbg(ql_dbg_user, vha, 0x709e, 9263 "Updated FCP_CMND priority - value=%d loop_id=%d " 9264 "port_id=%02x%02x%02x.\n", priority, 9265 fcport->loop_id, fcport->d_id.b.domain, 9266 fcport->d_id.b.area, fcport->d_id.b.al_pa); 9267 fcport->fcp_prio = priority & 0xf; 9268 } else 9269 ql_dbg(ql_dbg_user, vha, 0x704f, 9270 "Unable to update FCP_CMND priority - ret=0x%x for " 9271 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 9272 fcport->d_id.b.domain, fcport->d_id.b.area, 9273 fcport->d_id.b.al_pa); 9274 return ret; 9275 } 9276 9277 /* 9278 * qla24xx_update_all_fcp_prio 9279 * Activates fcp priority for all the logged in ports 9280 * 9281 * Input: 9282 * ha = adapter block pointer. 9283 * 9284 * Return: 9285 * QLA_SUCCESS or QLA_FUNCTION_FAILED 9286 * 9287 * Context: 9288 * Kernel context. 9289 */ 9290 int 9291 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 9292 { 9293 int ret; 9294 fc_port_t *fcport; 9295 9296 ret = QLA_FUNCTION_FAILED; 9297 /* We need to set priority for all logged in ports */ 9298 list_for_each_entry(fcport, &vha->vp_fcports, list) 9299 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 9300 9301 return ret; 9302 } 9303 9304 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 9305 int vp_idx, bool startqp) 9306 { 9307 int rsp_id = 0; 9308 int req_id = 0; 9309 int i; 9310 struct qla_hw_data *ha = vha->hw; 9311 uint16_t qpair_id = 0; 9312 struct qla_qpair *qpair = NULL; 9313 struct qla_msix_entry *msix; 9314 9315 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 9316 ql_log(ql_log_warn, vha, 0x00181, 9317 "FW/Driver is not multi-queue capable.\n"); 9318 return NULL; 9319 } 9320 9321 if (ql2xmqsupport || ql2xnvmeenable) { 9322 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 9323 if (qpair == NULL) { 9324 ql_log(ql_log_warn, vha, 0x0182, 9325 "Failed to allocate memory for queue pair.\n"); 9326 return NULL; 9327 } 9328 9329 qpair->hw = vha->hw; 9330 qpair->vha = vha; 9331 qpair->qp_lock_ptr = &qpair->qp_lock; 9332 spin_lock_init(&qpair->qp_lock); 9333 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 9334 9335 /* Assign available que pair id */ 9336 mutex_lock(&ha->mq_lock); 9337 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 9338 if (ha->num_qpairs >= ha->max_qpairs) { 9339 mutex_unlock(&ha->mq_lock); 9340 ql_log(ql_log_warn, vha, 0x0183, 9341 "No resources to create additional q pair.\n"); 9342 goto fail_qid_map; 9343 } 9344 ha->num_qpairs++; 9345 set_bit(qpair_id, ha->qpair_qid_map); 9346 ha->queue_pair_map[qpair_id] = qpair; 9347 qpair->id = qpair_id; 9348 qpair->vp_idx = vp_idx; 9349 qpair->fw_started = ha->flags.fw_started; 9350 INIT_LIST_HEAD(&qpair->hints_list); 9351 qpair->chip_reset = ha->base_qpair->chip_reset; 9352 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 9353 qpair->enable_explicit_conf = 9354 ha->base_qpair->enable_explicit_conf; 9355 9356 for (i = 0; i < ha->msix_count; i++) { 9357 msix = &ha->msix_entries[i]; 9358 if (msix->in_use) 9359 continue; 9360 qpair->msix = msix; 9361 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 9362 "Vector %x selected for qpair\n", msix->vector); 9363 break; 9364 } 9365 if (!qpair->msix) { 9366 ql_log(ql_log_warn, vha, 0x0184, 9367 "Out of MSI-X vectors!.\n"); 9368 goto fail_msix; 9369 } 9370 9371 qpair->msix->in_use = 1; 9372 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 9373 qpair->pdev = ha->pdev; 9374 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 9375 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 9376 9377 mutex_unlock(&ha->mq_lock); 9378 9379 /* Create response queue first */ 9380 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 9381 if (!rsp_id) { 9382 ql_log(ql_log_warn, vha, 0x0185, 9383 "Failed to create response queue.\n"); 9384 goto fail_rsp; 9385 } 9386 9387 qpair->rsp = ha->rsp_q_map[rsp_id]; 9388 9389 /* Create request queue */ 9390 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 9391 startqp); 9392 if (!req_id) { 9393 ql_log(ql_log_warn, vha, 0x0186, 9394 "Failed to create request queue.\n"); 9395 goto fail_req; 9396 } 9397 9398 qpair->req = ha->req_q_map[req_id]; 9399 qpair->rsp->req = qpair->req; 9400 qpair->rsp->qpair = qpair; 9401 /* init qpair to this cpu. Will adjust at run time. */ 9402 qla_cpu_update(qpair, raw_smp_processor_id()); 9403 9404 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 9405 if (ha->fw_attributes & BIT_4) 9406 qpair->difdix_supported = 1; 9407 } 9408 9409 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 9410 if (!qpair->srb_mempool) { 9411 ql_log(ql_log_warn, vha, 0xd036, 9412 "Failed to create srb mempool for qpair %d\n", 9413 qpair->id); 9414 goto fail_mempool; 9415 } 9416 9417 /* Mark as online */ 9418 qpair->online = 1; 9419 9420 if (!vha->flags.qpairs_available) 9421 vha->flags.qpairs_available = 1; 9422 9423 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 9424 "Request/Response queue pair created, id %d\n", 9425 qpair->id); 9426 ql_dbg(ql_dbg_init, vha, 0x0187, 9427 "Request/Response queue pair created, id %d\n", 9428 qpair->id); 9429 } 9430 return qpair; 9431 9432 fail_mempool: 9433 fail_req: 9434 qla25xx_delete_rsp_que(vha, qpair->rsp); 9435 fail_rsp: 9436 mutex_lock(&ha->mq_lock); 9437 qpair->msix->in_use = 0; 9438 list_del(&qpair->qp_list_elem); 9439 if (list_empty(&vha->qp_list)) 9440 vha->flags.qpairs_available = 0; 9441 fail_msix: 9442 ha->queue_pair_map[qpair_id] = NULL; 9443 clear_bit(qpair_id, ha->qpair_qid_map); 9444 ha->num_qpairs--; 9445 mutex_unlock(&ha->mq_lock); 9446 fail_qid_map: 9447 kfree(qpair); 9448 return NULL; 9449 } 9450 9451 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9452 { 9453 int ret = QLA_FUNCTION_FAILED; 9454 struct qla_hw_data *ha = qpair->hw; 9455 9456 qpair->delete_in_progress = 1; 9457 9458 ret = qla25xx_delete_req_que(vha, qpair->req); 9459 if (ret != QLA_SUCCESS) 9460 goto fail; 9461 9462 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9463 if (ret != QLA_SUCCESS) 9464 goto fail; 9465 9466 mutex_lock(&ha->mq_lock); 9467 ha->queue_pair_map[qpair->id] = NULL; 9468 clear_bit(qpair->id, ha->qpair_qid_map); 9469 ha->num_qpairs--; 9470 list_del(&qpair->qp_list_elem); 9471 if (list_empty(&vha->qp_list)) { 9472 vha->flags.qpairs_available = 0; 9473 vha->flags.qpairs_req_created = 0; 9474 vha->flags.qpairs_rsp_created = 0; 9475 } 9476 mempool_destroy(qpair->srb_mempool); 9477 kfree(qpair); 9478 mutex_unlock(&ha->mq_lock); 9479 9480 return QLA_SUCCESS; 9481 fail: 9482 return ret; 9483 } 9484 9485 uint64_t 9486 qla2x00_count_set_bits(uint32_t num) 9487 { 9488 /* Brian Kernighan's Algorithm */ 9489 u64 count = 0; 9490 9491 while (num) { 9492 num &= (num - 1); 9493 count++; 9494 } 9495 return count; 9496 } 9497 9498 uint64_t 9499 qla2x00_get_num_tgts(scsi_qla_host_t *vha) 9500 { 9501 fc_port_t *f, *tf; 9502 u64 count = 0; 9503 9504 f = NULL; 9505 tf = NULL; 9506 9507 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { 9508 if (f->port_type != FCT_TARGET) 9509 continue; 9510 count++; 9511 } 9512 return count; 9513 } 9514 9515 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags) 9516 { 9517 scsi_qla_host_t *vha = shost_priv(host); 9518 fc_port_t *fcport = NULL; 9519 unsigned long int_flags; 9520 9521 if (flags & QLA2XX_HW_ERROR) 9522 vha->hw_err_cnt = 0; 9523 if (flags & QLA2XX_SHT_LNK_DWN) 9524 vha->short_link_down_cnt = 0; 9525 if (flags & QLA2XX_INT_ERR) 9526 vha->interface_err_cnt = 0; 9527 if (flags & QLA2XX_CMD_TIMEOUT) 9528 vha->cmd_timeout_cnt = 0; 9529 if (flags & QLA2XX_RESET_CMD_ERR) 9530 vha->reset_cmd_err_cnt = 0; 9531 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9532 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9533 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9534 fcport->tgt_short_link_down_cnt = 0; 9535 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9536 } 9537 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9538 } 9539 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME; 9540 return 0; 9541 } 9542 9543 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags) 9544 { 9545 return qla2xxx_reset_stats(host, flags); 9546 } 9547 9548 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags) 9549 { 9550 return qla2xxx_reset_stats(host, flags); 9551 } 9552 9553 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags, 9554 void *data, u64 size) 9555 { 9556 scsi_qla_host_t *vha = shost_priv(host); 9557 struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data; 9558 struct ql_vnd_stats *rsp_data = &resp->stats; 9559 u64 ini_entry_count = 0; 9560 u64 i = 0; 9561 u64 entry_count = 0; 9562 u64 num_tgt = 0; 9563 u32 tmp_stat_type = 0; 9564 fc_port_t *fcport = NULL; 9565 unsigned long int_flags; 9566 9567 /* Copy stat type to work on it */ 9568 tmp_stat_type = flags; 9569 9570 if (tmp_stat_type & BIT_17) { 9571 num_tgt = qla2x00_get_num_tgts(vha); 9572 /* unset BIT_17 */ 9573 tmp_stat_type &= ~(1 << 17); 9574 } 9575 ini_entry_count = qla2x00_count_set_bits(tmp_stat_type); 9576 9577 entry_count = ini_entry_count + num_tgt; 9578 9579 rsp_data->entry_count = entry_count; 9580 9581 i = 0; 9582 if (flags & QLA2XX_HW_ERROR) { 9583 rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR; 9584 rsp_data->entry[i].tgt_num = 0x0; 9585 rsp_data->entry[i].cnt = vha->hw_err_cnt; 9586 i++; 9587 } 9588 9589 if (flags & QLA2XX_SHT_LNK_DWN) { 9590 rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN; 9591 rsp_data->entry[i].tgt_num = 0x0; 9592 rsp_data->entry[i].cnt = vha->short_link_down_cnt; 9593 i++; 9594 } 9595 9596 if (flags & QLA2XX_INT_ERR) { 9597 rsp_data->entry[i].stat_type = QLA2XX_INT_ERR; 9598 rsp_data->entry[i].tgt_num = 0x0; 9599 rsp_data->entry[i].cnt = vha->interface_err_cnt; 9600 i++; 9601 } 9602 9603 if (flags & QLA2XX_CMD_TIMEOUT) { 9604 rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT; 9605 rsp_data->entry[i].tgt_num = 0x0; 9606 rsp_data->entry[i].cnt = vha->cmd_timeout_cnt; 9607 i++; 9608 } 9609 9610 if (flags & QLA2XX_RESET_CMD_ERR) { 9611 rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR; 9612 rsp_data->entry[i].tgt_num = 0x0; 9613 rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt; 9614 i++; 9615 } 9616 9617 /* i will continue from previous loop, as target 9618 * entries are after initiator 9619 */ 9620 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) { 9621 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags); 9622 list_for_each_entry(fcport, &vha->vp_fcports, list) { 9623 if (fcport->port_type != FCT_TARGET) 9624 continue; 9625 if (!fcport->rport) 9626 continue; 9627 rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN; 9628 rsp_data->entry[i].tgt_num = fcport->rport->number; 9629 rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt; 9630 i++; 9631 } 9632 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags); 9633 } 9634 resp->status = EXT_STATUS_OK; 9635 9636 return 0; 9637 } 9638 9639 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags, 9640 struct fc_rport *rport, void *data, u64 size) 9641 { 9642 struct ql_vnd_tgt_stats_resp *tgt_data = data; 9643 fc_port_t *fcport = *(fc_port_t **)rport->dd_data; 9644 9645 tgt_data->status = 0; 9646 tgt_data->stats.entry_count = 1; 9647 tgt_data->stats.entry[0].stat_type = flags; 9648 tgt_data->stats.entry[0].tgt_num = rport->number; 9649 tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt; 9650 9651 return 0; 9652 } 9653 9654 int qla2xxx_disable_port(struct Scsi_Host *host) 9655 { 9656 scsi_qla_host_t *vha = shost_priv(host); 9657 9658 vha->hw->flags.port_isolated = 1; 9659 9660 if (qla2x00_chip_is_down(vha)) 9661 return 0; 9662 9663 if (vha->flags.online) { 9664 qla2x00_abort_isp_cleanup(vha); 9665 qla2x00_wait_for_sess_deletion(vha); 9666 } 9667 9668 return 0; 9669 } 9670 9671 int qla2xxx_enable_port(struct Scsi_Host *host) 9672 { 9673 scsi_qla_host_t *vha = shost_priv(host); 9674 9675 vha->hw->flags.port_isolated = 0; 9676 /* Set the flag to 1, so that isp_abort can proceed */ 9677 vha->flags.online = 1; 9678 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 9679 qla2xxx_wake_dpc(vha); 9680 9681 return 0; 9682 } 9683