1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include "qla_target.h" 21 22 /* 23 * QLogic ISP2x00 Hardware Support Function Prototypes. 24 */ 25 static int qla2x00_isp_firmware(scsi_qla_host_t *); 26 static int qla2x00_setup_chip(scsi_qla_host_t *); 27 static int qla2x00_fw_ready(scsi_qla_host_t *); 28 static int qla2x00_configure_hba(scsi_qla_host_t *); 29 static int qla2x00_configure_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_fabric(scsi_qla_host_t *); 32 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 33 static int qla2x00_restart_isp(scsi_qla_host_t *); 34 35 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 36 static int qla84xx_init_chip(scsi_qla_host_t *); 37 static int qla25xx_init_queues(struct qla_hw_data *); 38 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 39 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 40 struct event_arg *ea); 41 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 42 struct event_arg *); 43 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 44 45 /* SRB Extensions ---------------------------------------------------------- */ 46 47 void 48 qla2x00_sp_timeout(struct timer_list *t) 49 { 50 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 51 struct srb_iocb *iocb; 52 53 WARN_ON(irqs_disabled()); 54 iocb = &sp->u.iocb_cmd; 55 iocb->timeout(sp); 56 } 57 58 void qla2x00_sp_free(srb_t *sp) 59 { 60 struct srb_iocb *iocb = &sp->u.iocb_cmd; 61 62 del_timer(&iocb->timer); 63 qla2x00_rel_sp(sp); 64 } 65 66 /* Asynchronous Login/Logout Routines -------------------------------------- */ 67 68 unsigned long 69 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 70 { 71 unsigned long tmo; 72 struct qla_hw_data *ha = vha->hw; 73 74 /* Firmware should use switch negotiated r_a_tov for timeout. */ 75 tmo = ha->r_a_tov / 10 * 2; 76 if (IS_QLAFX00(ha)) { 77 tmo = FX00_DEF_RATOV * 2; 78 } else if (!IS_FWI2_CAPABLE(ha)) { 79 /* 80 * Except for earlier ISPs where the timeout is seeded from the 81 * initialization control block. 82 */ 83 tmo = ha->login_timeout; 84 } 85 return tmo; 86 } 87 88 static void qla24xx_abort_iocb_timeout(void *data) 89 { 90 srb_t *sp = data; 91 struct srb_iocb *abt = &sp->u.iocb_cmd; 92 struct qla_qpair *qpair = sp->qpair; 93 u32 handle; 94 unsigned long flags; 95 96 if (sp->cmd_sp) 97 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 98 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 99 sp->cmd_sp->handle, sp->cmd_sp->type, 100 sp->handle, sp->type); 101 else 102 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 103 "Abort timeout 2 - hdl=%x, type=%x\n", 104 sp->handle, sp->type); 105 106 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 107 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 108 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 109 sp->cmd_sp)) 110 qpair->req->outstanding_cmds[handle] = NULL; 111 112 /* removing the abort */ 113 if (qpair->req->outstanding_cmds[handle] == sp) { 114 qpair->req->outstanding_cmds[handle] = NULL; 115 break; 116 } 117 } 118 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 119 120 if (sp->cmd_sp) 121 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 122 123 abt->u.abt.comp_status = CS_TIMEOUT; 124 sp->done(sp, QLA_OS_TIMER_EXPIRED); 125 } 126 127 static void qla24xx_abort_sp_done(srb_t *sp, int res) 128 { 129 struct srb_iocb *abt = &sp->u.iocb_cmd; 130 131 del_timer(&sp->u.iocb_cmd.timer); 132 if (sp->flags & SRB_WAKEUP_ON_COMP) 133 complete(&abt->u.abt.comp); 134 else 135 sp->free(sp); 136 } 137 138 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 139 { 140 scsi_qla_host_t *vha = cmd_sp->vha; 141 struct srb_iocb *abt_iocb; 142 srb_t *sp; 143 int rval = QLA_FUNCTION_FAILED; 144 145 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 146 GFP_ATOMIC); 147 if (!sp) 148 return rval; 149 150 abt_iocb = &sp->u.iocb_cmd; 151 sp->type = SRB_ABT_CMD; 152 sp->name = "abort"; 153 sp->qpair = cmd_sp->qpair; 154 sp->cmd_sp = cmd_sp; 155 if (wait) 156 sp->flags = SRB_WAKEUP_ON_COMP; 157 158 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 159 init_completion(&abt_iocb->u.abt.comp); 160 /* FW can send 2 x ABTS's timeout/20s */ 161 qla2x00_init_timer(sp, 42); 162 163 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 164 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 165 166 sp->done = qla24xx_abort_sp_done; 167 168 ql_dbg(ql_dbg_async, vha, 0x507c, 169 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 170 cmd_sp->type); 171 172 rval = qla2x00_start_sp(sp); 173 if (rval != QLA_SUCCESS) { 174 sp->free(sp); 175 return rval; 176 } 177 178 if (wait) { 179 wait_for_completion(&abt_iocb->u.abt.comp); 180 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 181 QLA_SUCCESS : QLA_FUNCTION_FAILED; 182 sp->free(sp); 183 } 184 185 return rval; 186 } 187 188 void 189 qla2x00_async_iocb_timeout(void *data) 190 { 191 srb_t *sp = data; 192 fc_port_t *fcport = sp->fcport; 193 struct srb_iocb *lio = &sp->u.iocb_cmd; 194 int rc, h; 195 unsigned long flags; 196 197 if (fcport) { 198 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 199 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 200 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 201 202 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 203 } else { 204 pr_info("Async-%s timeout - hdl=%x.\n", 205 sp->name, sp->handle); 206 } 207 208 switch (sp->type) { 209 case SRB_LOGIN_CMD: 210 rc = qla24xx_async_abort_cmd(sp, false); 211 if (rc) { 212 /* Retry as needed. */ 213 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 214 lio->u.logio.data[1] = 215 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 216 QLA_LOGIO_LOGIN_RETRIED : 0; 217 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 218 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 219 h++) { 220 if (sp->qpair->req->outstanding_cmds[h] == 221 sp) { 222 sp->qpair->req->outstanding_cmds[h] = 223 NULL; 224 break; 225 } 226 } 227 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 228 sp->done(sp, QLA_FUNCTION_TIMEOUT); 229 } 230 break; 231 case SRB_LOGOUT_CMD: 232 case SRB_CT_PTHRU_CMD: 233 case SRB_MB_IOCB: 234 case SRB_NACK_PLOGI: 235 case SRB_NACK_PRLI: 236 case SRB_NACK_LOGO: 237 case SRB_CTRL_VP: 238 default: 239 rc = qla24xx_async_abort_cmd(sp, false); 240 if (rc) { 241 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 242 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 243 h++) { 244 if (sp->qpair->req->outstanding_cmds[h] == 245 sp) { 246 sp->qpair->req->outstanding_cmds[h] = 247 NULL; 248 break; 249 } 250 } 251 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 252 sp->done(sp, QLA_FUNCTION_TIMEOUT); 253 } 254 break; 255 } 256 } 257 258 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 259 { 260 struct scsi_qla_host *vha = sp->vha; 261 struct srb_iocb *lio = &sp->u.iocb_cmd; 262 struct event_arg ea; 263 264 ql_dbg(ql_dbg_disc, vha, 0x20dd, 265 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 266 267 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 268 269 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 270 memset(&ea, 0, sizeof(ea)); 271 ea.fcport = sp->fcport; 272 ea.data[0] = lio->u.logio.data[0]; 273 ea.data[1] = lio->u.logio.data[1]; 274 ea.iop[0] = lio->u.logio.iop[0]; 275 ea.iop[1] = lio->u.logio.iop[1]; 276 ea.sp = sp; 277 qla24xx_handle_plogi_done_event(vha, &ea); 278 } 279 280 sp->free(sp); 281 } 282 283 static inline bool 284 fcport_is_smaller(fc_port_t *fcport) 285 { 286 if (wwn_to_u64(fcport->port_name) < 287 wwn_to_u64(fcport->vha->port_name)) 288 return true; 289 else 290 return false; 291 } 292 293 static inline bool 294 fcport_is_bigger(fc_port_t *fcport) 295 { 296 return !fcport_is_smaller(fcport); 297 } 298 299 int 300 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 301 uint16_t *data) 302 { 303 srb_t *sp; 304 struct srb_iocb *lio; 305 int rval = QLA_FUNCTION_FAILED; 306 307 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 308 fcport->loop_id == FC_NO_LOOP_ID) { 309 ql_log(ql_log_warn, vha, 0xffff, 310 "%s: %8phC - not sending command.\n", 311 __func__, fcport->port_name); 312 return rval; 313 } 314 315 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 316 if (!sp) 317 goto done; 318 319 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 320 fcport->flags |= FCF_ASYNC_SENT; 321 fcport->logout_completed = 0; 322 323 sp->type = SRB_LOGIN_CMD; 324 sp->name = "login"; 325 sp->gen1 = fcport->rscn_gen; 326 sp->gen2 = fcport->login_gen; 327 328 lio = &sp->u.iocb_cmd; 329 lio->timeout = qla2x00_async_iocb_timeout; 330 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 331 332 sp->done = qla2x00_async_login_sp_done; 333 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) 334 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 335 else 336 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 337 338 if (NVME_TARGET(vha->hw, fcport)) 339 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 340 341 ql_dbg(ql_dbg_disc, vha, 0x2072, 342 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 343 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 344 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 345 fcport->login_retry); 346 347 rval = qla2x00_start_sp(sp); 348 if (rval != QLA_SUCCESS) { 349 fcport->flags |= FCF_LOGIN_NEEDED; 350 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 351 goto done_free_sp; 352 } 353 354 return rval; 355 356 done_free_sp: 357 sp->free(sp); 358 fcport->flags &= ~FCF_ASYNC_SENT; 359 done: 360 fcport->flags &= ~FCF_ASYNC_ACTIVE; 361 return rval; 362 } 363 364 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 365 { 366 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 367 sp->fcport->login_gen++; 368 qlt_logo_completion_handler(sp->fcport, res); 369 sp->free(sp); 370 } 371 372 int 373 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 374 { 375 srb_t *sp; 376 struct srb_iocb *lio; 377 int rval = QLA_FUNCTION_FAILED; 378 379 fcport->flags |= FCF_ASYNC_SENT; 380 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 381 if (!sp) 382 goto done; 383 384 sp->type = SRB_LOGOUT_CMD; 385 sp->name = "logout"; 386 387 lio = &sp->u.iocb_cmd; 388 lio->timeout = qla2x00_async_iocb_timeout; 389 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 390 391 sp->done = qla2x00_async_logout_sp_done; 392 393 ql_dbg(ql_dbg_disc, vha, 0x2070, 394 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 395 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 396 fcport->d_id.b.area, fcport->d_id.b.al_pa, 397 fcport->port_name); 398 399 rval = qla2x00_start_sp(sp); 400 if (rval != QLA_SUCCESS) 401 goto done_free_sp; 402 return rval; 403 404 done_free_sp: 405 sp->free(sp); 406 done: 407 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 408 return rval; 409 } 410 411 void 412 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 413 uint16_t *data) 414 { 415 fcport->flags &= ~FCF_ASYNC_ACTIVE; 416 /* Don't re-login in target mode */ 417 if (!fcport->tgt_session) 418 qla2x00_mark_device_lost(vha, fcport, 1); 419 qlt_logo_completion_handler(fcport, data[0]); 420 } 421 422 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 423 { 424 struct srb_iocb *lio = &sp->u.iocb_cmd; 425 struct scsi_qla_host *vha = sp->vha; 426 427 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 428 if (!test_bit(UNLOADING, &vha->dpc_flags)) 429 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 430 lio->u.logio.data); 431 sp->free(sp); 432 } 433 434 int 435 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 436 { 437 srb_t *sp; 438 struct srb_iocb *lio; 439 int rval; 440 441 rval = QLA_FUNCTION_FAILED; 442 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 443 if (!sp) 444 goto done; 445 446 sp->type = SRB_PRLO_CMD; 447 sp->name = "prlo"; 448 449 lio = &sp->u.iocb_cmd; 450 lio->timeout = qla2x00_async_iocb_timeout; 451 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 452 453 sp->done = qla2x00_async_prlo_sp_done; 454 455 ql_dbg(ql_dbg_disc, vha, 0x2070, 456 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 457 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 458 fcport->d_id.b.area, fcport->d_id.b.al_pa); 459 460 rval = qla2x00_start_sp(sp); 461 if (rval != QLA_SUCCESS) 462 goto done_free_sp; 463 464 return rval; 465 466 done_free_sp: 467 sp->free(sp); 468 done: 469 fcport->flags &= ~FCF_ASYNC_ACTIVE; 470 return rval; 471 } 472 473 static 474 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 475 { 476 struct fc_port *fcport = ea->fcport; 477 478 ql_dbg(ql_dbg_disc, vha, 0x20d2, 479 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 480 __func__, fcport->port_name, fcport->disc_state, 481 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 482 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 483 484 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 485 ea->data[0]); 486 487 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 488 ql_dbg(ql_dbg_disc, vha, 0x2066, 489 "%s %8phC: adisc fail: post delete\n", 490 __func__, ea->fcport->port_name); 491 /* deleted = 0 & logout_on_delete = force fw cleanup */ 492 fcport->deleted = 0; 493 fcport->logout_on_delete = 1; 494 qlt_schedule_sess_for_deletion(ea->fcport); 495 return; 496 } 497 498 if (ea->fcport->disc_state == DSC_DELETE_PEND) 499 return; 500 501 if (ea->sp->gen2 != ea->fcport->login_gen) { 502 /* target side must have changed it. */ 503 ql_dbg(ql_dbg_disc, vha, 0x20d3, 504 "%s %8phC generation changed\n", 505 __func__, ea->fcport->port_name); 506 return; 507 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 508 qla_rscn_replay(fcport); 509 qlt_schedule_sess_for_deletion(fcport); 510 return; 511 } 512 513 __qla24xx_handle_gpdb_event(vha, ea); 514 } 515 516 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 517 { 518 struct qla_work_evt *e; 519 520 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 521 if (!e) 522 return QLA_FUNCTION_FAILED; 523 524 e->u.fcport.fcport = fcport; 525 fcport->flags |= FCF_ASYNC_ACTIVE; 526 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 527 return qla2x00_post_work(vha, e); 528 } 529 530 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 531 { 532 struct scsi_qla_host *vha = sp->vha; 533 struct event_arg ea; 534 struct srb_iocb *lio = &sp->u.iocb_cmd; 535 536 ql_dbg(ql_dbg_disc, vha, 0x2066, 537 "Async done-%s res %x %8phC\n", 538 sp->name, res, sp->fcport->port_name); 539 540 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 541 542 memset(&ea, 0, sizeof(ea)); 543 ea.rc = res; 544 ea.data[0] = lio->u.logio.data[0]; 545 ea.data[1] = lio->u.logio.data[1]; 546 ea.iop[0] = lio->u.logio.iop[0]; 547 ea.iop[1] = lio->u.logio.iop[1]; 548 ea.fcport = sp->fcport; 549 ea.sp = sp; 550 551 qla24xx_handle_adisc_event(vha, &ea); 552 553 sp->free(sp); 554 } 555 556 int 557 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 558 uint16_t *data) 559 { 560 srb_t *sp; 561 struct srb_iocb *lio; 562 int rval = QLA_FUNCTION_FAILED; 563 564 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 565 return rval; 566 567 fcport->flags |= FCF_ASYNC_SENT; 568 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 569 if (!sp) 570 goto done; 571 572 sp->type = SRB_ADISC_CMD; 573 sp->name = "adisc"; 574 575 lio = &sp->u.iocb_cmd; 576 lio->timeout = qla2x00_async_iocb_timeout; 577 sp->gen1 = fcport->rscn_gen; 578 sp->gen2 = fcport->login_gen; 579 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 580 581 sp->done = qla2x00_async_adisc_sp_done; 582 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 583 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 584 585 ql_dbg(ql_dbg_disc, vha, 0x206f, 586 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 587 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 588 589 rval = qla2x00_start_sp(sp); 590 if (rval != QLA_SUCCESS) 591 goto done_free_sp; 592 593 return rval; 594 595 done_free_sp: 596 sp->free(sp); 597 done: 598 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 599 qla2x00_post_async_adisc_work(vha, fcport, data); 600 return rval; 601 } 602 603 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 604 { 605 struct qla_hw_data *ha = vha->hw; 606 607 if (IS_FWI2_CAPABLE(ha)) 608 return loop_id > NPH_LAST_HANDLE; 609 610 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 611 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 612 } 613 614 /** 615 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 616 * @vha: adapter state pointer. 617 * @dev: port structure pointer. 618 * 619 * Returns: 620 * qla2x00 local function return status code. 621 * 622 * Context: 623 * Kernel context. 624 */ 625 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 626 { 627 int rval; 628 struct qla_hw_data *ha = vha->hw; 629 unsigned long flags = 0; 630 631 rval = QLA_SUCCESS; 632 633 spin_lock_irqsave(&ha->vport_slock, flags); 634 635 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 636 if (dev->loop_id >= LOOPID_MAP_SIZE || 637 qla2x00_is_reserved_id(vha, dev->loop_id)) { 638 dev->loop_id = FC_NO_LOOP_ID; 639 rval = QLA_FUNCTION_FAILED; 640 } else { 641 set_bit(dev->loop_id, ha->loop_id_map); 642 } 643 spin_unlock_irqrestore(&ha->vport_slock, flags); 644 645 if (rval == QLA_SUCCESS) 646 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 647 "Assigning new loopid=%x, portid=%x.\n", 648 dev->loop_id, dev->d_id.b24); 649 else 650 ql_log(ql_log_warn, dev->vha, 0x2087, 651 "No loop_id's available, portid=%x.\n", 652 dev->d_id.b24); 653 654 return rval; 655 } 656 657 void qla2x00_clear_loop_id(fc_port_t *fcport) 658 { 659 struct qla_hw_data *ha = fcport->vha->hw; 660 661 if (fcport->loop_id == FC_NO_LOOP_ID || 662 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 663 return; 664 665 clear_bit(fcport->loop_id, ha->loop_id_map); 666 fcport->loop_id = FC_NO_LOOP_ID; 667 } 668 669 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 670 struct event_arg *ea) 671 { 672 fc_port_t *fcport, *conflict_fcport; 673 struct get_name_list_extended *e; 674 u16 i, n, found = 0, loop_id; 675 port_id_t id; 676 u64 wwn; 677 u16 data[2]; 678 u8 current_login_state, nvme_cls; 679 680 fcport = ea->fcport; 681 ql_dbg(ql_dbg_disc, vha, 0xffff, 682 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 683 __func__, fcport->port_name, fcport->disc_state, 684 fcport->fw_login_state, ea->rc, 685 fcport->login_gen, fcport->last_login_gen, 686 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 687 688 if (fcport->disc_state == DSC_DELETE_PEND) 689 return; 690 691 if (ea->rc) { /* rval */ 692 if (fcport->login_retry == 0) { 693 ql_dbg(ql_dbg_disc, vha, 0x20de, 694 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 695 fcport->port_name, fcport->login_retry); 696 } 697 return; 698 } 699 700 if (fcport->last_rscn_gen != fcport->rscn_gen) { 701 qla_rscn_replay(fcport); 702 qlt_schedule_sess_for_deletion(fcport); 703 return; 704 } else if (fcport->last_login_gen != fcport->login_gen) { 705 ql_dbg(ql_dbg_disc, vha, 0x20e0, 706 "%s %8phC login gen changed\n", 707 __func__, fcport->port_name); 708 return; 709 } 710 711 n = ea->data[0] / sizeof(struct get_name_list_extended); 712 713 ql_dbg(ql_dbg_disc, vha, 0x20e1, 714 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 715 __func__, __LINE__, fcport->port_name, n, 716 fcport->d_id.b.domain, fcport->d_id.b.area, 717 fcport->d_id.b.al_pa, fcport->loop_id); 718 719 for (i = 0; i < n; i++) { 720 e = &vha->gnl.l[i]; 721 wwn = wwn_to_u64(e->port_name); 722 id.b.domain = e->port_id[2]; 723 id.b.area = e->port_id[1]; 724 id.b.al_pa = e->port_id[0]; 725 id.b.rsvd_1 = 0; 726 727 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 728 continue; 729 730 if (IS_SW_RESV_ADDR(id)) 731 continue; 732 733 found = 1; 734 735 loop_id = le16_to_cpu(e->nport_handle); 736 loop_id = (loop_id & 0x7fff); 737 nvme_cls = e->current_login_state >> 4; 738 current_login_state = e->current_login_state & 0xf; 739 740 if (PRLI_PHASE(nvme_cls)) { 741 current_login_state = nvme_cls; 742 fcport->fc4_type &= ~FS_FC4TYPE_FCP; 743 fcport->fc4_type |= FS_FC4TYPE_NVME; 744 } else if (PRLI_PHASE(current_login_state)) { 745 fcport->fc4_type |= FS_FC4TYPE_FCP; 746 fcport->fc4_type &= ~FS_FC4TYPE_NVME; 747 } 748 749 ql_dbg(ql_dbg_disc, vha, 0x20e2, 750 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 751 __func__, fcport->port_name, 752 e->current_login_state, fcport->fw_login_state, 753 fcport->fc4_type, id.b24, fcport->d_id.b24, 754 loop_id, fcport->loop_id); 755 756 switch (fcport->disc_state) { 757 case DSC_DELETE_PEND: 758 case DSC_DELETED: 759 break; 760 default: 761 if ((id.b24 != fcport->d_id.b24 && 762 fcport->d_id.b24 && 763 fcport->loop_id != FC_NO_LOOP_ID) || 764 (fcport->loop_id != FC_NO_LOOP_ID && 765 fcport->loop_id != loop_id)) { 766 ql_dbg(ql_dbg_disc, vha, 0x20e3, 767 "%s %d %8phC post del sess\n", 768 __func__, __LINE__, fcport->port_name); 769 if (fcport->n2n_flag) 770 fcport->d_id.b24 = 0; 771 qlt_schedule_sess_for_deletion(fcport); 772 return; 773 } 774 break; 775 } 776 777 fcport->loop_id = loop_id; 778 if (fcport->n2n_flag) 779 fcport->d_id.b24 = id.b24; 780 781 wwn = wwn_to_u64(fcport->port_name); 782 qlt_find_sess_invalidate_other(vha, wwn, 783 id, loop_id, &conflict_fcport); 784 785 if (conflict_fcport) { 786 /* 787 * Another share fcport share the same loop_id & 788 * nport id. Conflict fcport needs to finish 789 * cleanup before this fcport can proceed to login. 790 */ 791 conflict_fcport->conflict = fcport; 792 fcport->login_pause = 1; 793 } 794 795 switch (vha->hw->current_topology) { 796 default: 797 switch (current_login_state) { 798 case DSC_LS_PRLI_COMP: 799 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 800 vha, 0x20e4, "%s %d %8phC post gpdb\n", 801 __func__, __LINE__, fcport->port_name); 802 803 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 804 fcport->port_type = FCT_INITIATOR; 805 else 806 fcport->port_type = FCT_TARGET; 807 data[0] = data[1] = 0; 808 qla2x00_post_async_adisc_work(vha, fcport, 809 data); 810 break; 811 case DSC_LS_PORT_UNAVAIL: 812 default: 813 if (fcport->loop_id == FC_NO_LOOP_ID) { 814 qla2x00_find_new_loop_id(vha, fcport); 815 fcport->fw_login_state = 816 DSC_LS_PORT_UNAVAIL; 817 } 818 ql_dbg(ql_dbg_disc, vha, 0x20e5, 819 "%s %d %8phC\n", __func__, __LINE__, 820 fcport->port_name); 821 qla24xx_fcport_handle_login(vha, fcport); 822 break; 823 } 824 break; 825 case ISP_CFG_N: 826 fcport->fw_login_state = current_login_state; 827 fcport->d_id = id; 828 switch (current_login_state) { 829 case DSC_LS_PRLI_PEND: 830 /* 831 * In the middle of PRLI. Let it finish. 832 * Allow relogin code to recheck state again 833 * with GNL. Push disc_state back to DELETED 834 * so GNL can go out again 835 */ 836 qla2x00_set_fcport_disc_state(fcport, 837 DSC_DELETED); 838 break; 839 case DSC_LS_PRLI_COMP: 840 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 841 fcport->port_type = FCT_INITIATOR; 842 else 843 fcport->port_type = FCT_TARGET; 844 845 data[0] = data[1] = 0; 846 qla2x00_post_async_adisc_work(vha, fcport, 847 data); 848 break; 849 case DSC_LS_PLOGI_COMP: 850 if (fcport_is_bigger(fcport)) { 851 /* local adapter is smaller */ 852 if (fcport->loop_id != FC_NO_LOOP_ID) 853 qla2x00_clear_loop_id(fcport); 854 855 fcport->loop_id = loop_id; 856 qla24xx_fcport_handle_login(vha, 857 fcport); 858 break; 859 } 860 /* fall through */ 861 default: 862 if (fcport_is_smaller(fcport)) { 863 /* local adapter is bigger */ 864 if (fcport->loop_id != FC_NO_LOOP_ID) 865 qla2x00_clear_loop_id(fcport); 866 867 fcport->loop_id = loop_id; 868 qla24xx_fcport_handle_login(vha, 869 fcport); 870 } 871 break; 872 } 873 break; 874 } /* switch (ha->current_topology) */ 875 } 876 877 if (!found) { 878 switch (vha->hw->current_topology) { 879 case ISP_CFG_F: 880 case ISP_CFG_FL: 881 for (i = 0; i < n; i++) { 882 e = &vha->gnl.l[i]; 883 id.b.domain = e->port_id[0]; 884 id.b.area = e->port_id[1]; 885 id.b.al_pa = e->port_id[2]; 886 id.b.rsvd_1 = 0; 887 loop_id = le16_to_cpu(e->nport_handle); 888 889 if (fcport->d_id.b24 == id.b24) { 890 conflict_fcport = 891 qla2x00_find_fcport_by_wwpn(vha, 892 e->port_name, 0); 893 if (conflict_fcport) { 894 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 895 vha, 0x20e5, 896 "%s %d %8phC post del sess\n", 897 __func__, __LINE__, 898 conflict_fcport->port_name); 899 qlt_schedule_sess_for_deletion 900 (conflict_fcport); 901 } 902 } 903 /* 904 * FW already picked this loop id for 905 * another fcport 906 */ 907 if (fcport->loop_id == loop_id) 908 fcport->loop_id = FC_NO_LOOP_ID; 909 } 910 qla24xx_fcport_handle_login(vha, fcport); 911 break; 912 case ISP_CFG_N: 913 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 914 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 915 if (fcport->n2n_link_reset_cnt < 2) { 916 fcport->n2n_link_reset_cnt++; 917 /* 918 * remote port is not sending PLOGI. 919 * Reset link to kick start his state 920 * machine 921 */ 922 set_bit(N2N_LINK_RESET, 923 &vha->dpc_flags); 924 } else { 925 if (fcport->n2n_chip_reset < 1) { 926 ql_log(ql_log_info, vha, 0x705d, 927 "Chip reset to bring laser down"); 928 set_bit(ISP_ABORT_NEEDED, 929 &vha->dpc_flags); 930 fcport->n2n_chip_reset++; 931 } else { 932 ql_log(ql_log_info, vha, 0x705d, 933 "Remote port %8ph is not coming back\n", 934 fcport->port_name); 935 fcport->scan_state = 0; 936 } 937 } 938 qla2xxx_wake_dpc(vha); 939 } else { 940 /* 941 * report port suppose to do PLOGI. Give him 942 * more time. FW will catch it. 943 */ 944 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 945 } 946 break; 947 default: 948 break; 949 } 950 } 951 } /* gnl_event */ 952 953 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 954 { 955 struct scsi_qla_host *vha = sp->vha; 956 unsigned long flags; 957 struct fc_port *fcport = NULL, *tf; 958 u16 i, n = 0, loop_id; 959 struct event_arg ea; 960 struct get_name_list_extended *e; 961 u64 wwn; 962 struct list_head h; 963 bool found = false; 964 965 ql_dbg(ql_dbg_disc, vha, 0x20e7, 966 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 967 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 968 sp->u.iocb_cmd.u.mbx.in_mb[2]); 969 970 if (res == QLA_FUNCTION_TIMEOUT) 971 return; 972 973 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 974 memset(&ea, 0, sizeof(ea)); 975 ea.sp = sp; 976 ea.rc = res; 977 978 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 979 sizeof(struct get_name_list_extended)) { 980 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 981 sizeof(struct get_name_list_extended); 982 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 983 } 984 985 for (i = 0; i < n; i++) { 986 e = &vha->gnl.l[i]; 987 loop_id = le16_to_cpu(e->nport_handle); 988 /* mask out reserve bit */ 989 loop_id = (loop_id & 0x7fff); 990 set_bit(loop_id, vha->hw->loop_id_map); 991 wwn = wwn_to_u64(e->port_name); 992 993 ql_dbg(ql_dbg_disc, vha, 0x20e8, 994 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 995 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 996 e->port_id[0], e->current_login_state, e->last_login_state, 997 (loop_id & 0x7fff)); 998 } 999 1000 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1001 1002 INIT_LIST_HEAD(&h); 1003 fcport = tf = NULL; 1004 if (!list_empty(&vha->gnl.fcports)) 1005 list_splice_init(&vha->gnl.fcports, &h); 1006 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1007 1008 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1009 list_del_init(&fcport->gnl_entry); 1010 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1011 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1012 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1013 ea.fcport = fcport; 1014 1015 qla24xx_handle_gnl_done_event(vha, &ea); 1016 } 1017 1018 /* create new fcport if fw has knowledge of new sessions */ 1019 for (i = 0; i < n; i++) { 1020 port_id_t id; 1021 u64 wwnn; 1022 1023 e = &vha->gnl.l[i]; 1024 wwn = wwn_to_u64(e->port_name); 1025 1026 found = false; 1027 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1028 if (!memcmp((u8 *)&wwn, fcport->port_name, 1029 WWN_SIZE)) { 1030 found = true; 1031 break; 1032 } 1033 } 1034 1035 id.b.domain = e->port_id[2]; 1036 id.b.area = e->port_id[1]; 1037 id.b.al_pa = e->port_id[0]; 1038 id.b.rsvd_1 = 0; 1039 1040 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1041 ql_dbg(ql_dbg_disc, vha, 0x2065, 1042 "%s %d %8phC %06x post new sess\n", 1043 __func__, __LINE__, (u8 *)&wwn, id.b24); 1044 wwnn = wwn_to_u64(e->node_name); 1045 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1046 (u8 *)&wwnn, NULL, 0); 1047 } 1048 } 1049 1050 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1051 vha->gnl.sent = 0; 1052 if (!list_empty(&vha->gnl.fcports)) { 1053 /* retrigger gnl */ 1054 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports, 1055 gnl_entry) { 1056 list_del_init(&fcport->gnl_entry); 1057 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1058 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS) 1059 break; 1060 } 1061 } 1062 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1063 1064 sp->free(sp); 1065 } 1066 1067 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1068 { 1069 srb_t *sp; 1070 struct srb_iocb *mbx; 1071 int rval = QLA_FUNCTION_FAILED; 1072 unsigned long flags; 1073 u16 *mb; 1074 1075 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1076 return rval; 1077 1078 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1079 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1080 1081 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1082 fcport->flags |= FCF_ASYNC_SENT; 1083 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1084 fcport->last_rscn_gen = fcport->rscn_gen; 1085 fcport->last_login_gen = fcport->login_gen; 1086 1087 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1088 if (vha->gnl.sent) { 1089 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1090 return QLA_SUCCESS; 1091 } 1092 vha->gnl.sent = 1; 1093 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1094 1095 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1096 if (!sp) 1097 goto done; 1098 1099 sp->type = SRB_MB_IOCB; 1100 sp->name = "gnlist"; 1101 sp->gen1 = fcport->rscn_gen; 1102 sp->gen2 = fcport->login_gen; 1103 1104 mbx = &sp->u.iocb_cmd; 1105 mbx->timeout = qla2x00_async_iocb_timeout; 1106 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 1107 1108 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1109 mb[0] = MBC_PORT_NODE_NAME_LIST; 1110 mb[1] = BIT_2 | BIT_3; 1111 mb[2] = MSW(vha->gnl.ldma); 1112 mb[3] = LSW(vha->gnl.ldma); 1113 mb[6] = MSW(MSD(vha->gnl.ldma)); 1114 mb[7] = LSW(MSD(vha->gnl.ldma)); 1115 mb[8] = vha->gnl.size; 1116 mb[9] = vha->vp_idx; 1117 1118 sp->done = qla24xx_async_gnl_sp_done; 1119 1120 ql_dbg(ql_dbg_disc, vha, 0x20da, 1121 "Async-%s - OUT WWPN %8phC hndl %x\n", 1122 sp->name, fcport->port_name, sp->handle); 1123 1124 rval = qla2x00_start_sp(sp); 1125 if (rval != QLA_SUCCESS) 1126 goto done_free_sp; 1127 1128 return rval; 1129 1130 done_free_sp: 1131 sp->free(sp); 1132 done: 1133 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT); 1134 return rval; 1135 } 1136 1137 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1138 { 1139 struct qla_work_evt *e; 1140 1141 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1142 if (!e) 1143 return QLA_FUNCTION_FAILED; 1144 1145 e->u.fcport.fcport = fcport; 1146 fcport->flags |= FCF_ASYNC_ACTIVE; 1147 return qla2x00_post_work(vha, e); 1148 } 1149 1150 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1151 { 1152 struct scsi_qla_host *vha = sp->vha; 1153 struct qla_hw_data *ha = vha->hw; 1154 fc_port_t *fcport = sp->fcport; 1155 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1156 struct event_arg ea; 1157 1158 ql_dbg(ql_dbg_disc, vha, 0x20db, 1159 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1160 sp->name, res, fcport->port_name, mb[1], mb[2]); 1161 1162 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1163 1164 if (res == QLA_FUNCTION_TIMEOUT) 1165 goto done; 1166 1167 memset(&ea, 0, sizeof(ea)); 1168 ea.fcport = fcport; 1169 ea.sp = sp; 1170 1171 qla24xx_handle_gpdb_event(vha, &ea); 1172 1173 done: 1174 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1175 sp->u.iocb_cmd.u.mbx.in_dma); 1176 1177 sp->free(sp); 1178 } 1179 1180 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1181 { 1182 struct qla_work_evt *e; 1183 1184 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1185 if (!e) 1186 return QLA_FUNCTION_FAILED; 1187 1188 e->u.fcport.fcport = fcport; 1189 1190 return qla2x00_post_work(vha, e); 1191 } 1192 1193 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1194 { 1195 struct scsi_qla_host *vha = sp->vha; 1196 struct srb_iocb *lio = &sp->u.iocb_cmd; 1197 struct event_arg ea; 1198 1199 ql_dbg(ql_dbg_disc, vha, 0x2129, 1200 "%s %8phC res %d \n", __func__, 1201 sp->fcport->port_name, res); 1202 1203 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1204 1205 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1206 memset(&ea, 0, sizeof(ea)); 1207 ea.fcport = sp->fcport; 1208 ea.data[0] = lio->u.logio.data[0]; 1209 ea.data[1] = lio->u.logio.data[1]; 1210 ea.iop[0] = lio->u.logio.iop[0]; 1211 ea.iop[1] = lio->u.logio.iop[1]; 1212 ea.sp = sp; 1213 1214 qla24xx_handle_prli_done_event(vha, &ea); 1215 } 1216 1217 sp->free(sp); 1218 } 1219 1220 int 1221 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1222 { 1223 srb_t *sp; 1224 struct srb_iocb *lio; 1225 int rval = QLA_FUNCTION_FAILED; 1226 1227 if (!vha->flags.online) { 1228 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1229 __func__, __LINE__, fcport->port_name); 1230 return rval; 1231 } 1232 1233 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1234 fcport->fw_login_state == DSC_LS_PRLI_PEND) && 1235 qla_dual_mode_enabled(vha)) { 1236 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1237 __func__, __LINE__, fcport->port_name); 1238 return rval; 1239 } 1240 1241 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1242 if (!sp) 1243 return rval; 1244 1245 fcport->flags |= FCF_ASYNC_SENT; 1246 fcport->logout_completed = 0; 1247 1248 sp->type = SRB_PRLI_CMD; 1249 sp->name = "prli"; 1250 1251 lio = &sp->u.iocb_cmd; 1252 lio->timeout = qla2x00_async_iocb_timeout; 1253 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1254 1255 sp->done = qla2x00_async_prli_sp_done; 1256 lio->u.logio.flags = 0; 1257 1258 if (NVME_TARGET(vha->hw, fcport)) 1259 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1260 1261 ql_dbg(ql_dbg_disc, vha, 0x211b, 1262 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 1263 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1264 fcport->login_retry, NVME_TARGET(vha->hw, fcport) ? "nvme" : "fc"); 1265 1266 rval = qla2x00_start_sp(sp); 1267 if (rval != QLA_SUCCESS) { 1268 fcport->flags |= FCF_LOGIN_NEEDED; 1269 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1270 goto done_free_sp; 1271 } 1272 1273 return rval; 1274 1275 done_free_sp: 1276 sp->free(sp); 1277 fcport->flags &= ~FCF_ASYNC_SENT; 1278 return rval; 1279 } 1280 1281 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1282 { 1283 struct qla_work_evt *e; 1284 1285 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1286 if (!e) 1287 return QLA_FUNCTION_FAILED; 1288 1289 e->u.fcport.fcport = fcport; 1290 e->u.fcport.opt = opt; 1291 fcport->flags |= FCF_ASYNC_ACTIVE; 1292 return qla2x00_post_work(vha, e); 1293 } 1294 1295 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1296 { 1297 srb_t *sp; 1298 struct srb_iocb *mbx; 1299 int rval = QLA_FUNCTION_FAILED; 1300 u16 *mb; 1301 dma_addr_t pd_dma; 1302 struct port_database_24xx *pd; 1303 struct qla_hw_data *ha = vha->hw; 1304 1305 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 1306 fcport->loop_id == FC_NO_LOOP_ID) { 1307 ql_log(ql_log_warn, vha, 0xffff, 1308 "%s: %8phC - not sending command.\n", 1309 __func__, fcport->port_name); 1310 return rval; 1311 } 1312 1313 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1314 if (!sp) 1315 goto done; 1316 1317 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB); 1318 1319 fcport->flags |= FCF_ASYNC_SENT; 1320 sp->type = SRB_MB_IOCB; 1321 sp->name = "gpdb"; 1322 sp->gen1 = fcport->rscn_gen; 1323 sp->gen2 = fcport->login_gen; 1324 1325 mbx = &sp->u.iocb_cmd; 1326 mbx->timeout = qla2x00_async_iocb_timeout; 1327 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1328 1329 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1330 if (pd == NULL) { 1331 ql_log(ql_log_warn, vha, 0xd043, 1332 "Failed to allocate port database structure.\n"); 1333 goto done_free_sp; 1334 } 1335 1336 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1337 mb[0] = MBC_GET_PORT_DATABASE; 1338 mb[1] = fcport->loop_id; 1339 mb[2] = MSW(pd_dma); 1340 mb[3] = LSW(pd_dma); 1341 mb[6] = MSW(MSD(pd_dma)); 1342 mb[7] = LSW(MSD(pd_dma)); 1343 mb[9] = vha->vp_idx; 1344 mb[10] = opt; 1345 1346 mbx->u.mbx.in = (void *)pd; 1347 mbx->u.mbx.in_dma = pd_dma; 1348 1349 sp->done = qla24xx_async_gpdb_sp_done; 1350 1351 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1352 "Async-%s %8phC hndl %x opt %x\n", 1353 sp->name, fcport->port_name, sp->handle, opt); 1354 1355 rval = qla2x00_start_sp(sp); 1356 if (rval != QLA_SUCCESS) 1357 goto done_free_sp; 1358 return rval; 1359 1360 done_free_sp: 1361 if (pd) 1362 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1363 1364 sp->free(sp); 1365 fcport->flags &= ~FCF_ASYNC_SENT; 1366 done: 1367 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1368 qla24xx_post_gpdb_work(vha, fcport, opt); 1369 return rval; 1370 } 1371 1372 static 1373 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1374 { 1375 unsigned long flags; 1376 1377 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1378 ea->fcport->login_gen++; 1379 ea->fcport->deleted = 0; 1380 ea->fcport->logout_on_delete = 1; 1381 1382 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1383 vha->fcport_count++; 1384 ea->fcport->login_succ = 1; 1385 1386 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1387 qla24xx_sched_upd_fcport(ea->fcport); 1388 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1389 } else if (ea->fcport->login_succ) { 1390 /* 1391 * We have an existing session. A late RSCN delivery 1392 * must have triggered the session to be re-validate. 1393 * Session is still valid. 1394 */ 1395 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1396 "%s %d %8phC session revalidate success\n", 1397 __func__, __LINE__, ea->fcport->port_name); 1398 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE); 1399 } 1400 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1401 } 1402 1403 static 1404 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1405 { 1406 fc_port_t *fcport = ea->fcport; 1407 struct port_database_24xx *pd; 1408 struct srb *sp = ea->sp; 1409 uint8_t ls; 1410 1411 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1412 1413 fcport->flags &= ~FCF_ASYNC_SENT; 1414 1415 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1416 "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__, 1417 fcport->port_name, fcport->disc_state, pd->current_login_state, 1418 fcport->fc4_type, ea->rc); 1419 1420 if (fcport->disc_state == DSC_DELETE_PEND) 1421 return; 1422 1423 if (NVME_TARGET(vha->hw, fcport)) 1424 ls = pd->current_login_state >> 4; 1425 else 1426 ls = pd->current_login_state & 0xf; 1427 1428 if (ea->sp->gen2 != fcport->login_gen) { 1429 /* target side must have changed it. */ 1430 1431 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1432 "%s %8phC generation changed\n", 1433 __func__, fcport->port_name); 1434 return; 1435 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1436 qla_rscn_replay(fcport); 1437 qlt_schedule_sess_for_deletion(fcport); 1438 return; 1439 } 1440 1441 switch (ls) { 1442 case PDS_PRLI_COMPLETE: 1443 __qla24xx_parse_gpdb(vha, fcport, pd); 1444 break; 1445 case PDS_PLOGI_PENDING: 1446 case PDS_PLOGI_COMPLETE: 1447 case PDS_PRLI_PENDING: 1448 case PDS_PRLI2_PENDING: 1449 /* Set discovery state back to GNL to Relogin attempt */ 1450 if (qla_dual_mode_enabled(vha) || 1451 qla_ini_mode_enabled(vha)) { 1452 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1453 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1454 } 1455 return; 1456 case PDS_LOGO_PENDING: 1457 case PDS_PORT_UNAVAILABLE: 1458 default: 1459 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1460 __func__, __LINE__, fcport->port_name); 1461 qlt_schedule_sess_for_deletion(fcport); 1462 return; 1463 } 1464 __qla24xx_handle_gpdb_event(vha, ea); 1465 } /* gpdb event */ 1466 1467 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1468 { 1469 u8 login = 0; 1470 int rc; 1471 1472 if (qla_tgt_mode_enabled(vha)) 1473 return; 1474 1475 if (qla_dual_mode_enabled(vha)) { 1476 if (N2N_TOPO(vha->hw)) { 1477 u64 mywwn, wwn; 1478 1479 mywwn = wwn_to_u64(vha->port_name); 1480 wwn = wwn_to_u64(fcport->port_name); 1481 if (mywwn > wwn) 1482 login = 1; 1483 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1484 && time_after_eq(jiffies, 1485 fcport->plogi_nack_done_deadline)) 1486 login = 1; 1487 } else { 1488 login = 1; 1489 } 1490 } else { 1491 /* initiator mode */ 1492 login = 1; 1493 } 1494 1495 if (login && fcport->login_retry) { 1496 fcport->login_retry--; 1497 if (fcport->loop_id == FC_NO_LOOP_ID) { 1498 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1499 rc = qla2x00_find_new_loop_id(vha, fcport); 1500 if (rc) { 1501 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1502 "%s %d %8phC post del sess - out of loopid\n", 1503 __func__, __LINE__, fcport->port_name); 1504 fcport->scan_state = 0; 1505 qlt_schedule_sess_for_deletion(fcport); 1506 return; 1507 } 1508 } 1509 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1510 "%s %d %8phC post login\n", 1511 __func__, __LINE__, fcport->port_name); 1512 qla2x00_post_async_login_work(vha, fcport, NULL); 1513 } 1514 } 1515 1516 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1517 { 1518 u16 data[2]; 1519 u64 wwn; 1520 u16 sec; 1521 1522 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1523 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1524 __func__, fcport->port_name, fcport->disc_state, 1525 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1526 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1527 fcport->login_gen, fcport->loop_id, fcport->scan_state); 1528 1529 if (fcport->scan_state != QLA_FCPORT_FOUND) 1530 return 0; 1531 1532 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1533 qla_dual_mode_enabled(vha) && 1534 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1535 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1536 return 0; 1537 1538 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1539 !N2N_TOPO(vha->hw)) { 1540 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1541 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1542 return 0; 1543 } 1544 } 1545 1546 /* Target won't initiate port login if fabric is present */ 1547 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1548 return 0; 1549 1550 if (fcport->flags & FCF_ASYNC_SENT) { 1551 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1552 return 0; 1553 } 1554 1555 switch (fcport->disc_state) { 1556 case DSC_DELETED: 1557 wwn = wwn_to_u64(fcport->node_name); 1558 switch (vha->hw->current_topology) { 1559 case ISP_CFG_N: 1560 if (fcport_is_smaller(fcport)) { 1561 /* this adapter is bigger */ 1562 if (fcport->login_retry) { 1563 if (fcport->loop_id == FC_NO_LOOP_ID) { 1564 qla2x00_find_new_loop_id(vha, 1565 fcport); 1566 fcport->fw_login_state = 1567 DSC_LS_PORT_UNAVAIL; 1568 } 1569 fcport->login_retry--; 1570 qla_post_els_plogi_work(vha, fcport); 1571 } else { 1572 ql_log(ql_log_info, vha, 0x705d, 1573 "Unable to reach remote port %8phC", 1574 fcport->port_name); 1575 } 1576 } else { 1577 qla24xx_post_gnl_work(vha, fcport); 1578 } 1579 break; 1580 default: 1581 if (wwn == 0) { 1582 ql_dbg(ql_dbg_disc, vha, 0xffff, 1583 "%s %d %8phC post GNNID\n", 1584 __func__, __LINE__, fcport->port_name); 1585 qla24xx_post_gnnid_work(vha, fcport); 1586 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1587 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1588 "%s %d %8phC post gnl\n", 1589 __func__, __LINE__, fcport->port_name); 1590 qla24xx_post_gnl_work(vha, fcport); 1591 } else { 1592 qla_chk_n2n_b4_login(vha, fcport); 1593 } 1594 break; 1595 } 1596 break; 1597 1598 case DSC_GNL: 1599 switch (vha->hw->current_topology) { 1600 case ISP_CFG_N: 1601 if ((fcport->current_login_state & 0xf) == 0x6) { 1602 ql_dbg(ql_dbg_disc, vha, 0x2118, 1603 "%s %d %8phC post GPDB work\n", 1604 __func__, __LINE__, fcport->port_name); 1605 fcport->chip_reset = 1606 vha->hw->base_qpair->chip_reset; 1607 qla24xx_post_gpdb_work(vha, fcport, 0); 1608 } else { 1609 ql_dbg(ql_dbg_disc, vha, 0x2118, 1610 "%s %d %8phC post %s PRLI\n", 1611 __func__, __LINE__, fcport->port_name, 1612 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1613 "FC"); 1614 qla24xx_post_prli_work(vha, fcport); 1615 } 1616 break; 1617 default: 1618 if (fcport->login_pause) { 1619 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1620 "%s %d %8phC exit\n", 1621 __func__, __LINE__, 1622 fcport->port_name); 1623 fcport->last_rscn_gen = fcport->rscn_gen; 1624 fcport->last_login_gen = fcport->login_gen; 1625 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1626 break; 1627 } 1628 qla_chk_n2n_b4_login(vha, fcport); 1629 break; 1630 } 1631 break; 1632 1633 case DSC_LOGIN_FAILED: 1634 if (N2N_TOPO(vha->hw)) 1635 qla_chk_n2n_b4_login(vha, fcport); 1636 else 1637 qlt_schedule_sess_for_deletion(fcport); 1638 break; 1639 1640 case DSC_LOGIN_COMPLETE: 1641 /* recheck login state */ 1642 data[0] = data[1] = 0; 1643 qla2x00_post_async_adisc_work(vha, fcport, data); 1644 break; 1645 1646 case DSC_LOGIN_PEND: 1647 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1648 qla24xx_post_prli_work(vha, fcport); 1649 break; 1650 1651 case DSC_UPD_FCPORT: 1652 sec = jiffies_to_msecs(jiffies - 1653 fcport->jiffies_at_registration)/1000; 1654 if (fcport->sec_since_registration < sec && sec && 1655 !(sec % 60)) { 1656 fcport->sec_since_registration = sec; 1657 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1658 "%s %8phC - Slow Rport registration(%d Sec)\n", 1659 __func__, fcport->port_name, sec); 1660 } 1661 1662 if (fcport->next_disc_state != DSC_DELETE_PEND) 1663 fcport->next_disc_state = DSC_ADISC; 1664 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1665 break; 1666 1667 default: 1668 break; 1669 } 1670 1671 return 0; 1672 } 1673 1674 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1675 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1676 { 1677 struct qla_work_evt *e; 1678 1679 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1680 if (!e) 1681 return QLA_FUNCTION_FAILED; 1682 1683 e->u.new_sess.id = *id; 1684 e->u.new_sess.pla = pla; 1685 e->u.new_sess.fc4_type = fc4_type; 1686 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1687 if (node_name) 1688 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1689 1690 return qla2x00_post_work(vha, e); 1691 } 1692 1693 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1694 { 1695 fc_port_t *fcport; 1696 unsigned long flags; 1697 1698 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1699 if (fcport) { 1700 fcport->scan_needed = 1; 1701 fcport->rscn_gen++; 1702 } 1703 1704 spin_lock_irqsave(&vha->work_lock, flags); 1705 if (vha->scan.scan_flags == 0) { 1706 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1707 vha->scan.scan_flags |= SF_QUEUED; 1708 schedule_delayed_work(&vha->scan.scan_work, 5); 1709 } 1710 spin_unlock_irqrestore(&vha->work_lock, flags); 1711 } 1712 1713 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1714 struct event_arg *ea) 1715 { 1716 fc_port_t *fcport = ea->fcport; 1717 1718 if (test_bit(UNLOADING, &vha->dpc_flags)) 1719 return; 1720 1721 ql_dbg(ql_dbg_disc, vha, 0x2102, 1722 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1723 __func__, fcport->port_name, fcport->disc_state, 1724 fcport->fw_login_state, fcport->login_pause, 1725 fcport->deleted, fcport->conflict, 1726 fcport->last_rscn_gen, fcport->rscn_gen, 1727 fcport->last_login_gen, fcport->login_gen, 1728 fcport->flags); 1729 1730 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1731 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1732 __func__, __LINE__, fcport->port_name); 1733 qla24xx_post_gnl_work(vha, fcport); 1734 return; 1735 } 1736 1737 qla24xx_fcport_handle_login(vha, fcport); 1738 } 1739 1740 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1741 struct event_arg *ea) 1742 { 1743 /* for pure Target Mode, PRLI will not be initiated */ 1744 if (vha->host->active_mode == MODE_TARGET) 1745 return; 1746 1747 ql_dbg(ql_dbg_disc, vha, 0x2118, 1748 "%s %d %8phC post PRLI\n", 1749 __func__, __LINE__, ea->fcport->port_name); 1750 qla24xx_post_prli_work(vha, ea->fcport); 1751 } 1752 1753 /* 1754 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1755 * to be consumed by the fcport 1756 */ 1757 void qla_rscn_replay(fc_port_t *fcport) 1758 { 1759 struct event_arg ea; 1760 1761 switch (fcport->disc_state) { 1762 case DSC_DELETE_PEND: 1763 return; 1764 default: 1765 break; 1766 } 1767 1768 if (fcport->scan_needed) { 1769 memset(&ea, 0, sizeof(ea)); 1770 ea.id = fcport->d_id; 1771 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1772 qla2x00_handle_rscn(fcport->vha, &ea); 1773 } 1774 } 1775 1776 static void 1777 qla2x00_tmf_iocb_timeout(void *data) 1778 { 1779 srb_t *sp = data; 1780 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1781 int rc, h; 1782 unsigned long flags; 1783 1784 rc = qla24xx_async_abort_cmd(sp, false); 1785 if (rc) { 1786 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 1787 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 1788 if (sp->qpair->req->outstanding_cmds[h] == sp) { 1789 sp->qpair->req->outstanding_cmds[h] = NULL; 1790 break; 1791 } 1792 } 1793 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 1794 tmf->u.tmf.comp_status = CS_TIMEOUT; 1795 tmf->u.tmf.data = QLA_FUNCTION_FAILED; 1796 complete(&tmf->u.tmf.comp); 1797 } 1798 } 1799 1800 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 1801 { 1802 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1803 1804 complete(&tmf->u.tmf.comp); 1805 } 1806 1807 int 1808 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1809 uint32_t tag) 1810 { 1811 struct scsi_qla_host *vha = fcport->vha; 1812 struct srb_iocb *tm_iocb; 1813 srb_t *sp; 1814 int rval = QLA_FUNCTION_FAILED; 1815 1816 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1817 if (!sp) 1818 goto done; 1819 1820 tm_iocb = &sp->u.iocb_cmd; 1821 sp->type = SRB_TM_CMD; 1822 sp->name = "tmf"; 1823 1824 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1825 init_completion(&tm_iocb->u.tmf.comp); 1826 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1827 1828 tm_iocb->u.tmf.flags = flags; 1829 tm_iocb->u.tmf.lun = lun; 1830 tm_iocb->u.tmf.data = tag; 1831 sp->done = qla2x00_tmf_sp_done; 1832 1833 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1834 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1835 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1836 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1837 1838 rval = qla2x00_start_sp(sp); 1839 if (rval != QLA_SUCCESS) 1840 goto done_free_sp; 1841 wait_for_completion(&tm_iocb->u.tmf.comp); 1842 1843 rval = tm_iocb->u.tmf.data; 1844 1845 if (rval != QLA_SUCCESS) { 1846 ql_log(ql_log_warn, vha, 0x8030, 1847 "TM IOCB failed (%x).\n", rval); 1848 } 1849 1850 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1851 flags = tm_iocb->u.tmf.flags; 1852 lun = (uint16_t)tm_iocb->u.tmf.lun; 1853 1854 /* Issue Marker IOCB */ 1855 qla2x00_marker(vha, vha->hw->base_qpair, 1856 fcport->loop_id, lun, 1857 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1858 } 1859 1860 done_free_sp: 1861 sp->free(sp); 1862 fcport->flags &= ~FCF_ASYNC_SENT; 1863 done: 1864 return rval; 1865 } 1866 1867 int 1868 qla24xx_async_abort_command(srb_t *sp) 1869 { 1870 unsigned long flags = 0; 1871 1872 uint32_t handle; 1873 fc_port_t *fcport = sp->fcport; 1874 struct qla_qpair *qpair = sp->qpair; 1875 struct scsi_qla_host *vha = fcport->vha; 1876 struct req_que *req = qpair->req; 1877 1878 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1879 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1880 if (req->outstanding_cmds[handle] == sp) 1881 break; 1882 } 1883 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1884 1885 if (handle == req->num_outstanding_cmds) { 1886 /* Command not found. */ 1887 return QLA_FUNCTION_FAILED; 1888 } 1889 if (sp->type == SRB_FXIOCB_DCMD) 1890 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1891 FXDISC_ABORT_IOCTL); 1892 1893 return qla24xx_async_abort_cmd(sp, true); 1894 } 1895 1896 static void 1897 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1898 { 1899 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1900 ea->data[0]); 1901 1902 switch (ea->data[0]) { 1903 case MBS_COMMAND_COMPLETE: 1904 ql_dbg(ql_dbg_disc, vha, 0x2118, 1905 "%s %d %8phC post gpdb\n", 1906 __func__, __LINE__, ea->fcport->port_name); 1907 1908 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1909 ea->fcport->logout_on_delete = 1; 1910 ea->fcport->nvme_prli_service_param = ea->iop[0]; 1911 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 1912 ea->fcport->nvme_first_burst_size = 1913 (ea->iop[1] & 0xffff) * 512; 1914 else 1915 ea->fcport->nvme_first_burst_size = 0; 1916 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1917 break; 1918 default: 1919 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1920 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1921 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1922 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1923 break; 1924 } 1925 1926 /* 1927 * Retry PRLI with other FC-4 type if failure occurred on dual 1928 * FCP/NVMe port 1929 */ 1930 if (NVME_FCP_TARGET(ea->fcport)) { 1931 ql_dbg(ql_dbg_disc, vha, 0x2118, 1932 "%s %d %8phC post %s prli\n", 1933 __func__, __LINE__, ea->fcport->port_name, 1934 (ea->fcport->fc4_type & FS_FC4TYPE_NVME) ? 1935 "NVMe" : "FCP"); 1936 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME) 1937 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME; 1938 else 1939 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP; 1940 } 1941 1942 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1943 ea->fcport->keep_nport_handle = 0; 1944 ea->fcport->logout_on_delete = 1; 1945 qlt_schedule_sess_for_deletion(ea->fcport); 1946 break; 1947 } 1948 } 1949 1950 void 1951 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1952 { 1953 port_id_t cid; /* conflict Nport id */ 1954 u16 lid; 1955 struct fc_port *conflict_fcport; 1956 unsigned long flags; 1957 struct fc_port *fcport = ea->fcport; 1958 1959 ql_dbg(ql_dbg_disc, vha, 0xffff, 1960 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1961 __func__, fcport->port_name, fcport->disc_state, 1962 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1963 ea->sp->gen1, fcport->rscn_gen, 1964 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1965 1966 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1967 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1968 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1969 "%s %d %8phC Remote is trying to login\n", 1970 __func__, __LINE__, fcport->port_name); 1971 return; 1972 } 1973 1974 if ((fcport->disc_state == DSC_DELETE_PEND) || 1975 (fcport->disc_state == DSC_DELETED)) { 1976 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1977 return; 1978 } 1979 1980 if (ea->sp->gen2 != fcport->login_gen) { 1981 /* target side must have changed it. */ 1982 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1983 "%s %8phC generation changed\n", 1984 __func__, fcport->port_name); 1985 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1986 return; 1987 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1988 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1989 "%s %8phC RSCN generation changed\n", 1990 __func__, fcport->port_name); 1991 qla_rscn_replay(fcport); 1992 qlt_schedule_sess_for_deletion(fcport); 1993 return; 1994 } 1995 1996 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1997 ea->data[0]); 1998 1999 switch (ea->data[0]) { 2000 case MBS_COMMAND_COMPLETE: 2001 /* 2002 * Driver must validate login state - If PRLI not complete, 2003 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 2004 * requests. 2005 */ 2006 if (NVME_TARGET(vha->hw, ea->fcport)) { 2007 ql_dbg(ql_dbg_disc, vha, 0x2117, 2008 "%s %d %8phC post prli\n", 2009 __func__, __LINE__, ea->fcport->port_name); 2010 qla24xx_post_prli_work(vha, ea->fcport); 2011 } else { 2012 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2013 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n", 2014 __func__, __LINE__, ea->fcport->port_name, 2015 ea->fcport->loop_id, ea->fcport->d_id.b24); 2016 2017 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2018 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2019 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2020 ea->fcport->logout_on_delete = 1; 2021 ea->fcport->send_els_logo = 0; 2022 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 2023 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2024 2025 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2026 } 2027 break; 2028 case MBS_COMMAND_ERROR: 2029 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2030 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2031 2032 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2033 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_FAILED); 2034 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 2035 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2036 else 2037 qla2x00_mark_device_lost(vha, ea->fcport, 1); 2038 break; 2039 case MBS_LOOP_ID_USED: 2040 /* data[1] = IO PARAM 1 = nport ID */ 2041 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2042 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2043 cid.b.al_pa = ea->iop[1] & 0xff; 2044 cid.b.rsvd_1 = 0; 2045 2046 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2047 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2048 __func__, __LINE__, ea->fcport->port_name, 2049 ea->fcport->loop_id, cid.b24); 2050 2051 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2052 ea->fcport->loop_id = FC_NO_LOOP_ID; 2053 qla24xx_post_gnl_work(vha, ea->fcport); 2054 break; 2055 case MBS_PORT_ID_USED: 2056 lid = ea->iop[1] & 0xffff; 2057 qlt_find_sess_invalidate_other(vha, 2058 wwn_to_u64(ea->fcport->port_name), 2059 ea->fcport->d_id, lid, &conflict_fcport); 2060 2061 if (conflict_fcport) { 2062 /* 2063 * Another fcport share the same loop_id/nport id. 2064 * Conflict fcport needs to finish cleanup before this 2065 * fcport can proceed to login. 2066 */ 2067 conflict_fcport->conflict = ea->fcport; 2068 ea->fcport->login_pause = 1; 2069 2070 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2071 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2072 __func__, __LINE__, ea->fcport->port_name, 2073 ea->fcport->d_id.b24, lid); 2074 } else { 2075 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2076 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2077 __func__, __LINE__, ea->fcport->port_name, 2078 ea->fcport->d_id.b24, lid); 2079 2080 qla2x00_clear_loop_id(ea->fcport); 2081 set_bit(lid, vha->hw->loop_id_map); 2082 ea->fcport->loop_id = lid; 2083 ea->fcport->keep_nport_handle = 0; 2084 ea->fcport->logout_on_delete = 1; 2085 qlt_schedule_sess_for_deletion(ea->fcport); 2086 } 2087 break; 2088 } 2089 return; 2090 } 2091 2092 /****************************************************************************/ 2093 /* QLogic ISP2x00 Hardware Support Functions. */ 2094 /****************************************************************************/ 2095 2096 static int 2097 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2098 { 2099 int rval = QLA_SUCCESS; 2100 struct qla_hw_data *ha = vha->hw; 2101 uint32_t idc_major_ver, idc_minor_ver; 2102 uint16_t config[4]; 2103 2104 qla83xx_idc_lock(vha, 0); 2105 2106 /* SV: TODO: Assign initialization timeout from 2107 * flash-info / other param 2108 */ 2109 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2110 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2111 2112 /* Set our fcoe function presence */ 2113 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2114 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2115 "Error while setting DRV-Presence.\n"); 2116 rval = QLA_FUNCTION_FAILED; 2117 goto exit; 2118 } 2119 2120 /* Decide the reset ownership */ 2121 qla83xx_reset_ownership(vha); 2122 2123 /* 2124 * On first protocol driver load: 2125 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2126 * register. 2127 * Others: Check compatibility with current IDC Major version. 2128 */ 2129 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2130 if (ha->flags.nic_core_reset_owner) { 2131 /* Set IDC Major version */ 2132 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2133 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2134 2135 /* Clearing IDC-Lock-Recovery register */ 2136 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2137 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2138 /* 2139 * Clear further IDC participation if we are not compatible with 2140 * the current IDC Major Version. 2141 */ 2142 ql_log(ql_log_warn, vha, 0xb07d, 2143 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2144 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2145 __qla83xx_clear_drv_presence(vha); 2146 rval = QLA_FUNCTION_FAILED; 2147 goto exit; 2148 } 2149 /* Each function sets its supported Minor version. */ 2150 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2151 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2152 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2153 2154 if (ha->flags.nic_core_reset_owner) { 2155 memset(config, 0, sizeof(config)); 2156 if (!qla81xx_get_port_config(vha, config)) 2157 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2158 QLA8XXX_DEV_READY); 2159 } 2160 2161 rval = qla83xx_idc_state_handler(vha); 2162 2163 exit: 2164 qla83xx_idc_unlock(vha, 0); 2165 2166 return rval; 2167 } 2168 2169 /* 2170 * qla2x00_initialize_adapter 2171 * Initialize board. 2172 * 2173 * Input: 2174 * ha = adapter block pointer. 2175 * 2176 * Returns: 2177 * 0 = success 2178 */ 2179 int 2180 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2181 { 2182 int rval; 2183 struct qla_hw_data *ha = vha->hw; 2184 struct req_que *req = ha->req_q_map[0]; 2185 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2186 2187 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2188 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2189 2190 /* Clear adapter flags. */ 2191 vha->flags.online = 0; 2192 ha->flags.chip_reset_done = 0; 2193 vha->flags.reset_active = 0; 2194 ha->flags.pci_channel_io_perm_failure = 0; 2195 ha->flags.eeh_busy = 0; 2196 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2197 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2198 atomic_set(&vha->loop_state, LOOP_DOWN); 2199 vha->device_flags = DFLG_NO_CABLE; 2200 vha->dpc_flags = 0; 2201 vha->flags.management_server_logged_in = 0; 2202 vha->marker_needed = 0; 2203 ha->isp_abort_cnt = 0; 2204 ha->beacon_blink_led = 0; 2205 2206 set_bit(0, ha->req_qid_map); 2207 set_bit(0, ha->rsp_qid_map); 2208 2209 ql_dbg(ql_dbg_init, vha, 0x0040, 2210 "Configuring PCI space...\n"); 2211 rval = ha->isp_ops->pci_config(vha); 2212 if (rval) { 2213 ql_log(ql_log_warn, vha, 0x0044, 2214 "Unable to configure PCI space.\n"); 2215 return (rval); 2216 } 2217 2218 ha->isp_ops->reset_chip(vha); 2219 2220 /* Check for secure flash support */ 2221 if (IS_QLA28XX(ha)) { 2222 if (RD_REG_DWORD(®->mailbox12) & BIT_0) 2223 ha->flags.secure_adapter = 1; 2224 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n", 2225 (ha->flags.secure_adapter) ? "Yes" : "No"); 2226 } 2227 2228 2229 rval = qla2xxx_get_flash_info(vha); 2230 if (rval) { 2231 ql_log(ql_log_fatal, vha, 0x004f, 2232 "Unable to validate FLASH data.\n"); 2233 return rval; 2234 } 2235 2236 if (IS_QLA8044(ha)) { 2237 qla8044_read_reset_template(vha); 2238 2239 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2240 * If DONRESET_BIT0 is set, drivers should not set dev_state 2241 * to NEED_RESET. But if NEED_RESET is set, drivers should 2242 * should honor the reset. */ 2243 if (ql2xdontresethba == 1) 2244 qla8044_set_idc_dontreset(vha); 2245 } 2246 2247 ha->isp_ops->get_flash_version(vha, req->ring); 2248 ql_dbg(ql_dbg_init, vha, 0x0061, 2249 "Configure NVRAM parameters...\n"); 2250 2251 /* Let priority default to FCP, can be overridden by nvram_config */ 2252 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2253 2254 ha->isp_ops->nvram_config(vha); 2255 2256 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2257 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2258 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2259 2260 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2261 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2262 2263 if (ha->flags.disable_serdes) { 2264 /* Mask HBA via NVRAM settings? */ 2265 ql_log(ql_log_info, vha, 0x0077, 2266 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2267 return QLA_FUNCTION_FAILED; 2268 } 2269 2270 ql_dbg(ql_dbg_init, vha, 0x0078, 2271 "Verifying loaded RISC code...\n"); 2272 2273 /* If smartsan enabled then require fdmi and rdp enabled */ 2274 if (ql2xsmartsan) { 2275 ql2xfdmienable = 1; 2276 ql2xrdpenable = 1; 2277 } 2278 2279 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2280 rval = ha->isp_ops->chip_diag(vha); 2281 if (rval) 2282 return (rval); 2283 rval = qla2x00_setup_chip(vha); 2284 if (rval) 2285 return (rval); 2286 } 2287 2288 if (IS_QLA84XX(ha)) { 2289 ha->cs84xx = qla84xx_get_chip(vha); 2290 if (!ha->cs84xx) { 2291 ql_log(ql_log_warn, vha, 0x00d0, 2292 "Unable to configure ISP84XX.\n"); 2293 return QLA_FUNCTION_FAILED; 2294 } 2295 } 2296 2297 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2298 rval = qla2x00_init_rings(vha); 2299 2300 /* No point in continuing if firmware initialization failed. */ 2301 if (rval != QLA_SUCCESS) 2302 return rval; 2303 2304 ha->flags.chip_reset_done = 1; 2305 2306 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2307 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2308 rval = qla84xx_init_chip(vha); 2309 if (rval != QLA_SUCCESS) { 2310 ql_log(ql_log_warn, vha, 0x00d4, 2311 "Unable to initialize ISP84XX.\n"); 2312 qla84xx_put_chip(vha); 2313 } 2314 } 2315 2316 /* Load the NIC Core f/w if we are the first protocol driver. */ 2317 if (IS_QLA8031(ha)) { 2318 rval = qla83xx_nic_core_fw_load(vha); 2319 if (rval) 2320 ql_log(ql_log_warn, vha, 0x0124, 2321 "Error in initializing NIC Core f/w.\n"); 2322 } 2323 2324 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2325 qla24xx_read_fcp_prio_cfg(vha); 2326 2327 if (IS_P3P_TYPE(ha)) 2328 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2329 else 2330 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2331 2332 return (rval); 2333 } 2334 2335 /** 2336 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2337 * @vha: HA context 2338 * 2339 * Returns 0 on success. 2340 */ 2341 int 2342 qla2100_pci_config(scsi_qla_host_t *vha) 2343 { 2344 uint16_t w; 2345 unsigned long flags; 2346 struct qla_hw_data *ha = vha->hw; 2347 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2348 2349 pci_set_master(ha->pdev); 2350 pci_try_set_mwi(ha->pdev); 2351 2352 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2353 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2354 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2355 2356 pci_disable_rom(ha->pdev); 2357 2358 /* Get PCI bus information. */ 2359 spin_lock_irqsave(&ha->hardware_lock, flags); 2360 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2361 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2362 2363 return QLA_SUCCESS; 2364 } 2365 2366 /** 2367 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2368 * @vha: HA context 2369 * 2370 * Returns 0 on success. 2371 */ 2372 int 2373 qla2300_pci_config(scsi_qla_host_t *vha) 2374 { 2375 uint16_t w; 2376 unsigned long flags = 0; 2377 uint32_t cnt; 2378 struct qla_hw_data *ha = vha->hw; 2379 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2380 2381 pci_set_master(ha->pdev); 2382 pci_try_set_mwi(ha->pdev); 2383 2384 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2385 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2386 2387 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2388 w &= ~PCI_COMMAND_INTX_DISABLE; 2389 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2390 2391 /* 2392 * If this is a 2300 card and not 2312, reset the 2393 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2394 * the 2310 also reports itself as a 2300 so we need to get the 2395 * fb revision level -- a 6 indicates it really is a 2300 and 2396 * not a 2310. 2397 */ 2398 if (IS_QLA2300(ha)) { 2399 spin_lock_irqsave(&ha->hardware_lock, flags); 2400 2401 /* Pause RISC. */ 2402 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2403 for (cnt = 0; cnt < 30000; cnt++) { 2404 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2405 break; 2406 2407 udelay(10); 2408 } 2409 2410 /* Select FPM registers. */ 2411 WRT_REG_WORD(®->ctrl_status, 0x20); 2412 RD_REG_WORD(®->ctrl_status); 2413 2414 /* Get the fb rev level */ 2415 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2416 2417 if (ha->fb_rev == FPM_2300) 2418 pci_clear_mwi(ha->pdev); 2419 2420 /* Deselect FPM registers. */ 2421 WRT_REG_WORD(®->ctrl_status, 0x0); 2422 RD_REG_WORD(®->ctrl_status); 2423 2424 /* Release RISC module. */ 2425 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2426 for (cnt = 0; cnt < 30000; cnt++) { 2427 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2428 break; 2429 2430 udelay(10); 2431 } 2432 2433 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2434 } 2435 2436 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2437 2438 pci_disable_rom(ha->pdev); 2439 2440 /* Get PCI bus information. */ 2441 spin_lock_irqsave(&ha->hardware_lock, flags); 2442 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2443 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2444 2445 return QLA_SUCCESS; 2446 } 2447 2448 /** 2449 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2450 * @vha: HA context 2451 * 2452 * Returns 0 on success. 2453 */ 2454 int 2455 qla24xx_pci_config(scsi_qla_host_t *vha) 2456 { 2457 uint16_t w; 2458 unsigned long flags = 0; 2459 struct qla_hw_data *ha = vha->hw; 2460 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2461 2462 pci_set_master(ha->pdev); 2463 pci_try_set_mwi(ha->pdev); 2464 2465 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2466 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2467 w &= ~PCI_COMMAND_INTX_DISABLE; 2468 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2469 2470 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2471 2472 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2473 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2474 pcix_set_mmrbc(ha->pdev, 2048); 2475 2476 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2477 if (pci_is_pcie(ha->pdev)) 2478 pcie_set_readrq(ha->pdev, 4096); 2479 2480 pci_disable_rom(ha->pdev); 2481 2482 ha->chip_revision = ha->pdev->revision; 2483 2484 /* Get PCI bus information. */ 2485 spin_lock_irqsave(&ha->hardware_lock, flags); 2486 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2487 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2488 2489 return QLA_SUCCESS; 2490 } 2491 2492 /** 2493 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2494 * @vha: HA context 2495 * 2496 * Returns 0 on success. 2497 */ 2498 int 2499 qla25xx_pci_config(scsi_qla_host_t *vha) 2500 { 2501 uint16_t w; 2502 struct qla_hw_data *ha = vha->hw; 2503 2504 pci_set_master(ha->pdev); 2505 pci_try_set_mwi(ha->pdev); 2506 2507 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2508 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2509 w &= ~PCI_COMMAND_INTX_DISABLE; 2510 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2511 2512 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2513 if (pci_is_pcie(ha->pdev)) 2514 pcie_set_readrq(ha->pdev, 4096); 2515 2516 pci_disable_rom(ha->pdev); 2517 2518 ha->chip_revision = ha->pdev->revision; 2519 2520 return QLA_SUCCESS; 2521 } 2522 2523 /** 2524 * qla2x00_isp_firmware() - Choose firmware image. 2525 * @vha: HA context 2526 * 2527 * Returns 0 on success. 2528 */ 2529 static int 2530 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2531 { 2532 int rval; 2533 uint16_t loop_id, topo, sw_cap; 2534 uint8_t domain, area, al_pa; 2535 struct qla_hw_data *ha = vha->hw; 2536 2537 /* Assume loading risc code */ 2538 rval = QLA_FUNCTION_FAILED; 2539 2540 if (ha->flags.disable_risc_code_load) { 2541 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2542 2543 /* Verify checksum of loaded RISC code. */ 2544 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2545 if (rval == QLA_SUCCESS) { 2546 /* And, verify we are not in ROM code. */ 2547 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2548 &area, &domain, &topo, &sw_cap); 2549 } 2550 } 2551 2552 if (rval) 2553 ql_dbg(ql_dbg_init, vha, 0x007a, 2554 "**** Load RISC code ****.\n"); 2555 2556 return (rval); 2557 } 2558 2559 /** 2560 * qla2x00_reset_chip() - Reset ISP chip. 2561 * @vha: HA context 2562 * 2563 * Returns 0 on success. 2564 */ 2565 int 2566 qla2x00_reset_chip(scsi_qla_host_t *vha) 2567 { 2568 unsigned long flags = 0; 2569 struct qla_hw_data *ha = vha->hw; 2570 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2571 uint32_t cnt; 2572 uint16_t cmd; 2573 int rval = QLA_FUNCTION_FAILED; 2574 2575 if (unlikely(pci_channel_offline(ha->pdev))) 2576 return rval; 2577 2578 ha->isp_ops->disable_intrs(ha); 2579 2580 spin_lock_irqsave(&ha->hardware_lock, flags); 2581 2582 /* Turn off master enable */ 2583 cmd = 0; 2584 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2585 cmd &= ~PCI_COMMAND_MASTER; 2586 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2587 2588 if (!IS_QLA2100(ha)) { 2589 /* Pause RISC. */ 2590 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2591 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2592 for (cnt = 0; cnt < 30000; cnt++) { 2593 if ((RD_REG_WORD(®->hccr) & 2594 HCCR_RISC_PAUSE) != 0) 2595 break; 2596 udelay(100); 2597 } 2598 } else { 2599 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2600 udelay(10); 2601 } 2602 2603 /* Select FPM registers. */ 2604 WRT_REG_WORD(®->ctrl_status, 0x20); 2605 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2606 2607 /* FPM Soft Reset. */ 2608 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2609 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2610 2611 /* Toggle Fpm Reset. */ 2612 if (!IS_QLA2200(ha)) { 2613 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2614 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2615 } 2616 2617 /* Select frame buffer registers. */ 2618 WRT_REG_WORD(®->ctrl_status, 0x10); 2619 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2620 2621 /* Reset frame buffer FIFOs. */ 2622 if (IS_QLA2200(ha)) { 2623 WRT_FB_CMD_REG(ha, reg, 0xa000); 2624 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2625 } else { 2626 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2627 2628 /* Read back fb_cmd until zero or 3 seconds max */ 2629 for (cnt = 0; cnt < 3000; cnt++) { 2630 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2631 break; 2632 udelay(100); 2633 } 2634 } 2635 2636 /* Select RISC module registers. */ 2637 WRT_REG_WORD(®->ctrl_status, 0); 2638 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2639 2640 /* Reset RISC processor. */ 2641 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2642 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2643 2644 /* Release RISC processor. */ 2645 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2646 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2647 } 2648 2649 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2650 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2651 2652 /* Reset ISP chip. */ 2653 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2654 2655 /* Wait for RISC to recover from reset. */ 2656 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2657 /* 2658 * It is necessary to for a delay here since the card doesn't 2659 * respond to PCI reads during a reset. On some architectures 2660 * this will result in an MCA. 2661 */ 2662 udelay(20); 2663 for (cnt = 30000; cnt; cnt--) { 2664 if ((RD_REG_WORD(®->ctrl_status) & 2665 CSR_ISP_SOFT_RESET) == 0) 2666 break; 2667 udelay(100); 2668 } 2669 } else 2670 udelay(10); 2671 2672 /* Reset RISC processor. */ 2673 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2674 2675 WRT_REG_WORD(®->semaphore, 0); 2676 2677 /* Release RISC processor. */ 2678 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2679 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2680 2681 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2682 for (cnt = 0; cnt < 30000; cnt++) { 2683 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2684 break; 2685 2686 udelay(100); 2687 } 2688 } else 2689 udelay(100); 2690 2691 /* Turn on master enable */ 2692 cmd |= PCI_COMMAND_MASTER; 2693 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2694 2695 /* Disable RISC pause on FPM parity error. */ 2696 if (!IS_QLA2100(ha)) { 2697 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2698 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2699 } 2700 2701 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2702 2703 return QLA_SUCCESS; 2704 } 2705 2706 /** 2707 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2708 * @vha: HA context 2709 * 2710 * Returns 0 on success. 2711 */ 2712 static int 2713 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2714 { 2715 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2716 2717 if (!IS_QLA81XX(vha->hw)) 2718 return QLA_SUCCESS; 2719 2720 return qla81xx_write_mpi_register(vha, mb); 2721 } 2722 2723 /** 2724 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2725 * @vha: HA context 2726 * 2727 * Returns 0 on success. 2728 */ 2729 static inline int 2730 qla24xx_reset_risc(scsi_qla_host_t *vha) 2731 { 2732 unsigned long flags = 0; 2733 struct qla_hw_data *ha = vha->hw; 2734 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2735 uint32_t cnt; 2736 uint16_t wd; 2737 static int abts_cnt; /* ISP abort retry counts */ 2738 int rval = QLA_SUCCESS; 2739 2740 spin_lock_irqsave(&ha->hardware_lock, flags); 2741 2742 /* Reset RISC. */ 2743 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2744 for (cnt = 0; cnt < 30000; cnt++) { 2745 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2746 break; 2747 2748 udelay(10); 2749 } 2750 2751 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2752 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2753 2754 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2755 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2756 RD_REG_DWORD(®->hccr), 2757 RD_REG_DWORD(®->ctrl_status), 2758 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2759 2760 WRT_REG_DWORD(®->ctrl_status, 2761 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2762 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2763 2764 udelay(100); 2765 2766 /* Wait for firmware to complete NVRAM accesses. */ 2767 RD_REG_WORD(®->mailbox0); 2768 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2769 rval == QLA_SUCCESS; cnt--) { 2770 barrier(); 2771 if (cnt) 2772 udelay(5); 2773 else 2774 rval = QLA_FUNCTION_TIMEOUT; 2775 } 2776 2777 if (rval == QLA_SUCCESS) 2778 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2779 2780 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2781 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2782 RD_REG_DWORD(®->hccr), 2783 RD_REG_DWORD(®->mailbox0)); 2784 2785 /* Wait for soft-reset to complete. */ 2786 RD_REG_DWORD(®->ctrl_status); 2787 for (cnt = 0; cnt < 60; cnt++) { 2788 barrier(); 2789 if ((RD_REG_DWORD(®->ctrl_status) & 2790 CSRX_ISP_SOFT_RESET) == 0) 2791 break; 2792 2793 udelay(5); 2794 } 2795 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2796 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2797 2798 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2799 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2800 RD_REG_DWORD(®->hccr), 2801 RD_REG_DWORD(®->ctrl_status)); 2802 2803 /* If required, do an MPI FW reset now */ 2804 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2805 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2806 if (++abts_cnt < 5) { 2807 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2808 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2809 } else { 2810 /* 2811 * We exhausted the ISP abort retries. We have to 2812 * set the board offline. 2813 */ 2814 abts_cnt = 0; 2815 vha->flags.online = 0; 2816 } 2817 } 2818 } 2819 2820 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2821 RD_REG_DWORD(®->hccr); 2822 2823 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2824 RD_REG_DWORD(®->hccr); 2825 2826 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2827 RD_REG_DWORD(®->hccr); 2828 2829 RD_REG_WORD(®->mailbox0); 2830 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2831 rval == QLA_SUCCESS; cnt--) { 2832 barrier(); 2833 if (cnt) 2834 udelay(5); 2835 else 2836 rval = QLA_FUNCTION_TIMEOUT; 2837 } 2838 if (rval == QLA_SUCCESS) 2839 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2840 2841 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2842 "Host Risc 0x%x, mailbox0 0x%x\n", 2843 RD_REG_DWORD(®->hccr), 2844 RD_REG_WORD(®->mailbox0)); 2845 2846 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2847 2848 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2849 "Driver in %s mode\n", 2850 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2851 2852 if (IS_NOPOLLING_TYPE(ha)) 2853 ha->isp_ops->enable_intrs(ha); 2854 2855 return rval; 2856 } 2857 2858 static void 2859 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2860 { 2861 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2862 2863 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2864 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2865 2866 } 2867 2868 static void 2869 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2870 { 2871 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2872 2873 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2874 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2875 } 2876 2877 static void 2878 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2879 { 2880 uint32_t wd32 = 0; 2881 uint delta_msec = 100; 2882 uint elapsed_msec = 0; 2883 uint timeout_msec; 2884 ulong n; 2885 2886 if (vha->hw->pdev->subsystem_device != 0x0175 && 2887 vha->hw->pdev->subsystem_device != 0x0240) 2888 return; 2889 2890 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2891 udelay(100); 2892 2893 attempt: 2894 timeout_msec = TIMEOUT_SEMAPHORE; 2895 n = timeout_msec / delta_msec; 2896 while (n--) { 2897 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2898 qla25xx_read_risc_sema_reg(vha, &wd32); 2899 if (wd32 & RISC_SEMAPHORE) 2900 break; 2901 msleep(delta_msec); 2902 elapsed_msec += delta_msec; 2903 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2904 goto force; 2905 } 2906 2907 if (!(wd32 & RISC_SEMAPHORE)) 2908 goto force; 2909 2910 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2911 goto acquired; 2912 2913 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2914 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2915 n = timeout_msec / delta_msec; 2916 while (n--) { 2917 qla25xx_read_risc_sema_reg(vha, &wd32); 2918 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2919 break; 2920 msleep(delta_msec); 2921 elapsed_msec += delta_msec; 2922 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2923 goto force; 2924 } 2925 2926 if (wd32 & RISC_SEMAPHORE_FORCE) 2927 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2928 2929 goto attempt; 2930 2931 force: 2932 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2933 2934 acquired: 2935 return; 2936 } 2937 2938 /** 2939 * qla24xx_reset_chip() - Reset ISP24xx chip. 2940 * @vha: HA context 2941 * 2942 * Returns 0 on success. 2943 */ 2944 int 2945 qla24xx_reset_chip(scsi_qla_host_t *vha) 2946 { 2947 struct qla_hw_data *ha = vha->hw; 2948 int rval = QLA_FUNCTION_FAILED; 2949 2950 if (pci_channel_offline(ha->pdev) && 2951 ha->flags.pci_channel_io_perm_failure) { 2952 return rval; 2953 } 2954 2955 ha->isp_ops->disable_intrs(ha); 2956 2957 qla25xx_manipulate_risc_semaphore(vha); 2958 2959 /* Perform RISC reset. */ 2960 rval = qla24xx_reset_risc(vha); 2961 2962 return rval; 2963 } 2964 2965 /** 2966 * qla2x00_chip_diag() - Test chip for proper operation. 2967 * @vha: HA context 2968 * 2969 * Returns 0 on success. 2970 */ 2971 int 2972 qla2x00_chip_diag(scsi_qla_host_t *vha) 2973 { 2974 int rval; 2975 struct qla_hw_data *ha = vha->hw; 2976 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2977 unsigned long flags = 0; 2978 uint16_t data; 2979 uint32_t cnt; 2980 uint16_t mb[5]; 2981 struct req_que *req = ha->req_q_map[0]; 2982 2983 /* Assume a failed state */ 2984 rval = QLA_FUNCTION_FAILED; 2985 2986 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2987 ®->flash_address); 2988 2989 spin_lock_irqsave(&ha->hardware_lock, flags); 2990 2991 /* Reset ISP chip. */ 2992 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2993 2994 /* 2995 * We need to have a delay here since the card will not respond while 2996 * in reset causing an MCA on some architectures. 2997 */ 2998 udelay(20); 2999 data = qla2x00_debounce_register(®->ctrl_status); 3000 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 3001 udelay(5); 3002 data = RD_REG_WORD(®->ctrl_status); 3003 barrier(); 3004 } 3005 3006 if (!cnt) 3007 goto chip_diag_failed; 3008 3009 ql_dbg(ql_dbg_init, vha, 0x007c, 3010 "Reset register cleared by chip reset.\n"); 3011 3012 /* Reset RISC processor. */ 3013 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 3014 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 3015 3016 /* Workaround for QLA2312 PCI parity error */ 3017 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3018 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 3019 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 3020 udelay(5); 3021 data = RD_MAILBOX_REG(ha, reg, 0); 3022 barrier(); 3023 } 3024 } else 3025 udelay(10); 3026 3027 if (!cnt) 3028 goto chip_diag_failed; 3029 3030 /* Check product ID of chip */ 3031 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3032 3033 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3034 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3035 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3036 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3037 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3038 mb[3] != PROD_ID_3) { 3039 ql_log(ql_log_warn, vha, 0x0062, 3040 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3041 mb[1], mb[2], mb[3]); 3042 3043 goto chip_diag_failed; 3044 } 3045 ha->product_id[0] = mb[1]; 3046 ha->product_id[1] = mb[2]; 3047 ha->product_id[2] = mb[3]; 3048 ha->product_id[3] = mb[4]; 3049 3050 /* Adjust fw RISC transfer size */ 3051 if (req->length > 1024) 3052 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3053 else 3054 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3055 req->length; 3056 3057 if (IS_QLA2200(ha) && 3058 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3059 /* Limit firmware transfer size with a 2200A */ 3060 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3061 3062 ha->device_type |= DT_ISP2200A; 3063 ha->fw_transfer_size = 128; 3064 } 3065 3066 /* Wrap Incoming Mailboxes Test. */ 3067 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3068 3069 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3070 rval = qla2x00_mbx_reg_test(vha); 3071 if (rval) 3072 ql_log(ql_log_warn, vha, 0x0080, 3073 "Failed mailbox send register test.\n"); 3074 else 3075 /* Flag a successful rval */ 3076 rval = QLA_SUCCESS; 3077 spin_lock_irqsave(&ha->hardware_lock, flags); 3078 3079 chip_diag_failed: 3080 if (rval) 3081 ql_log(ql_log_info, vha, 0x0081, 3082 "Chip diagnostics **** FAILED ****.\n"); 3083 3084 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3085 3086 return (rval); 3087 } 3088 3089 /** 3090 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3091 * @vha: HA context 3092 * 3093 * Returns 0 on success. 3094 */ 3095 int 3096 qla24xx_chip_diag(scsi_qla_host_t *vha) 3097 { 3098 int rval; 3099 struct qla_hw_data *ha = vha->hw; 3100 struct req_que *req = ha->req_q_map[0]; 3101 3102 if (IS_P3P_TYPE(ha)) 3103 return QLA_SUCCESS; 3104 3105 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3106 3107 rval = qla2x00_mbx_reg_test(vha); 3108 if (rval) { 3109 ql_log(ql_log_warn, vha, 0x0082, 3110 "Failed mailbox send register test.\n"); 3111 } else { 3112 /* Flag a successful rval */ 3113 rval = QLA_SUCCESS; 3114 } 3115 3116 return rval; 3117 } 3118 3119 static void 3120 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3121 { 3122 int rval; 3123 dma_addr_t tc_dma; 3124 void *tc; 3125 struct qla_hw_data *ha = vha->hw; 3126 3127 if (!IS_FWI2_CAPABLE(ha)) 3128 return; 3129 3130 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3131 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3132 return; 3133 3134 if (ha->fce) { 3135 ql_dbg(ql_dbg_init, vha, 0x00bd, 3136 "%s: FCE Mem is already allocated.\n", 3137 __func__); 3138 return; 3139 } 3140 3141 /* Allocate memory for Fibre Channel Event Buffer. */ 3142 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3143 GFP_KERNEL); 3144 if (!tc) { 3145 ql_log(ql_log_warn, vha, 0x00be, 3146 "Unable to allocate (%d KB) for FCE.\n", 3147 FCE_SIZE / 1024); 3148 return; 3149 } 3150 3151 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3152 ha->fce_mb, &ha->fce_bufs); 3153 if (rval) { 3154 ql_log(ql_log_warn, vha, 0x00bf, 3155 "Unable to initialize FCE (%d).\n", rval); 3156 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3157 return; 3158 } 3159 3160 ql_dbg(ql_dbg_init, vha, 0x00c0, 3161 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3162 3163 ha->flags.fce_enabled = 1; 3164 ha->fce_dma = tc_dma; 3165 ha->fce = tc; 3166 } 3167 3168 static void 3169 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3170 { 3171 int rval; 3172 dma_addr_t tc_dma; 3173 void *tc; 3174 struct qla_hw_data *ha = vha->hw; 3175 3176 if (!IS_FWI2_CAPABLE(ha)) 3177 return; 3178 3179 if (ha->eft) { 3180 ql_dbg(ql_dbg_init, vha, 0x00bd, 3181 "%s: EFT Mem is already allocated.\n", 3182 __func__); 3183 return; 3184 } 3185 3186 /* Allocate memory for Extended Trace Buffer. */ 3187 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3188 GFP_KERNEL); 3189 if (!tc) { 3190 ql_log(ql_log_warn, vha, 0x00c1, 3191 "Unable to allocate (%d KB) for EFT.\n", 3192 EFT_SIZE / 1024); 3193 return; 3194 } 3195 3196 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3197 if (rval) { 3198 ql_log(ql_log_warn, vha, 0x00c2, 3199 "Unable to initialize EFT (%d).\n", rval); 3200 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3201 return; 3202 } 3203 3204 ql_dbg(ql_dbg_init, vha, 0x00c3, 3205 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3206 3207 ha->eft_dma = tc_dma; 3208 ha->eft = tc; 3209 } 3210 3211 static void 3212 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3213 { 3214 qla2x00_init_fce_trace(vha); 3215 qla2x00_init_eft_trace(vha); 3216 } 3217 3218 void 3219 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3220 { 3221 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3222 eft_size, fce_size, mq_size; 3223 struct qla_hw_data *ha = vha->hw; 3224 struct req_que *req = ha->req_q_map[0]; 3225 struct rsp_que *rsp = ha->rsp_q_map[0]; 3226 struct qla2xxx_fw_dump *fw_dump; 3227 3228 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3229 req_q_size = rsp_q_size = 0; 3230 3231 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3232 fixed_size = sizeof(struct qla2100_fw_dump); 3233 } else if (IS_QLA23XX(ha)) { 3234 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3235 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3236 sizeof(uint16_t); 3237 } else if (IS_FWI2_CAPABLE(ha)) { 3238 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3239 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3240 else if (IS_QLA81XX(ha)) 3241 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3242 else if (IS_QLA25XX(ha)) 3243 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3244 else 3245 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3246 3247 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3248 sizeof(uint32_t); 3249 if (ha->mqenable) { 3250 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && 3251 !IS_QLA28XX(ha)) 3252 mq_size = sizeof(struct qla2xxx_mq_chain); 3253 /* 3254 * Allocate maximum buffer size for all queues - Q0. 3255 * Resizing must be done at end-of-dump processing. 3256 */ 3257 mq_size += (ha->max_req_queues - 1) * 3258 (req->length * sizeof(request_t)); 3259 mq_size += (ha->max_rsp_queues - 1) * 3260 (rsp->length * sizeof(response_t)); 3261 } 3262 if (ha->tgt.atio_ring) 3263 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3264 3265 qla2x00_init_fce_trace(vha); 3266 if (ha->fce) 3267 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3268 qla2x00_init_eft_trace(vha); 3269 if (ha->eft) 3270 eft_size = EFT_SIZE; 3271 } 3272 3273 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3274 struct fwdt *fwdt = ha->fwdt; 3275 uint j; 3276 3277 for (j = 0; j < 2; j++, fwdt++) { 3278 if (!fwdt->template) { 3279 ql_dbg(ql_dbg_init, vha, 0x00ba, 3280 "-> fwdt%u no template\n", j); 3281 continue; 3282 } 3283 ql_dbg(ql_dbg_init, vha, 0x00fa, 3284 "-> fwdt%u calculating fwdump size...\n", j); 3285 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3286 vha, fwdt->template); 3287 ql_dbg(ql_dbg_init, vha, 0x00fa, 3288 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3289 j, fwdt->dump_size); 3290 dump_size += fwdt->dump_size; 3291 } 3292 } else { 3293 req_q_size = req->length * sizeof(request_t); 3294 rsp_q_size = rsp->length * sizeof(response_t); 3295 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3296 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3297 + eft_size; 3298 ha->chain_offset = dump_size; 3299 dump_size += mq_size + fce_size; 3300 if (ha->exchoffld_buf) 3301 dump_size += sizeof(struct qla2xxx_offld_chain) + 3302 ha->exchoffld_size; 3303 if (ha->exlogin_buf) 3304 dump_size += sizeof(struct qla2xxx_offld_chain) + 3305 ha->exlogin_size; 3306 } 3307 3308 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3309 3310 ql_dbg(ql_dbg_init, vha, 0x00c5, 3311 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3312 __func__, dump_size, ha->fw_dump_len, 3313 ha->fw_dump_alloc_len); 3314 3315 fw_dump = vmalloc(dump_size); 3316 if (!fw_dump) { 3317 ql_log(ql_log_warn, vha, 0x00c4, 3318 "Unable to allocate (%d KB) for firmware dump.\n", 3319 dump_size / 1024); 3320 } else { 3321 mutex_lock(&ha->optrom_mutex); 3322 if (ha->fw_dumped) { 3323 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3324 vfree(ha->fw_dump); 3325 ha->fw_dump = fw_dump; 3326 ha->fw_dump_alloc_len = dump_size; 3327 ql_dbg(ql_dbg_init, vha, 0x00c5, 3328 "Re-Allocated (%d KB) and save firmware dump.\n", 3329 dump_size / 1024); 3330 } else { 3331 if (ha->fw_dump) 3332 vfree(ha->fw_dump); 3333 ha->fw_dump = fw_dump; 3334 3335 ha->fw_dump_len = ha->fw_dump_alloc_len = 3336 dump_size; 3337 ql_dbg(ql_dbg_init, vha, 0x00c5, 3338 "Allocated (%d KB) for firmware dump.\n", 3339 dump_size / 1024); 3340 3341 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3342 mutex_unlock(&ha->optrom_mutex); 3343 return; 3344 } 3345 3346 ha->fw_dump->signature[0] = 'Q'; 3347 ha->fw_dump->signature[1] = 'L'; 3348 ha->fw_dump->signature[2] = 'G'; 3349 ha->fw_dump->signature[3] = 'C'; 3350 ha->fw_dump->version = htonl(1); 3351 3352 ha->fw_dump->fixed_size = htonl(fixed_size); 3353 ha->fw_dump->mem_size = htonl(mem_size); 3354 ha->fw_dump->req_q_size = htonl(req_q_size); 3355 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3356 3357 ha->fw_dump->eft_size = htonl(eft_size); 3358 ha->fw_dump->eft_addr_l = 3359 htonl(LSD(ha->eft_dma)); 3360 ha->fw_dump->eft_addr_h = 3361 htonl(MSD(ha->eft_dma)); 3362 3363 ha->fw_dump->header_size = 3364 htonl(offsetof 3365 (struct qla2xxx_fw_dump, isp)); 3366 } 3367 mutex_unlock(&ha->optrom_mutex); 3368 } 3369 } 3370 } 3371 3372 static int 3373 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3374 { 3375 #define MPS_MASK 0xe0 3376 int rval; 3377 uint16_t dc; 3378 uint32_t dw; 3379 3380 if (!IS_QLA81XX(vha->hw)) 3381 return QLA_SUCCESS; 3382 3383 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3384 if (rval != QLA_SUCCESS) { 3385 ql_log(ql_log_warn, vha, 0x0105, 3386 "Unable to acquire semaphore.\n"); 3387 goto done; 3388 } 3389 3390 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3391 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3392 if (rval != QLA_SUCCESS) { 3393 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3394 goto done_release; 3395 } 3396 3397 dc &= MPS_MASK; 3398 if (dc == (dw & MPS_MASK)) 3399 goto done_release; 3400 3401 dw &= ~MPS_MASK; 3402 dw |= dc; 3403 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3404 if (rval != QLA_SUCCESS) { 3405 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3406 } 3407 3408 done_release: 3409 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3410 if (rval != QLA_SUCCESS) { 3411 ql_log(ql_log_warn, vha, 0x006d, 3412 "Unable to release semaphore.\n"); 3413 } 3414 3415 done: 3416 return rval; 3417 } 3418 3419 int 3420 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3421 { 3422 /* Don't try to reallocate the array */ 3423 if (req->outstanding_cmds) 3424 return QLA_SUCCESS; 3425 3426 if (!IS_FWI2_CAPABLE(ha)) 3427 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3428 else { 3429 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3430 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3431 else 3432 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3433 } 3434 3435 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3436 sizeof(srb_t *), 3437 GFP_KERNEL); 3438 3439 if (!req->outstanding_cmds) { 3440 /* 3441 * Try to allocate a minimal size just so we can get through 3442 * initialization. 3443 */ 3444 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3445 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3446 sizeof(srb_t *), 3447 GFP_KERNEL); 3448 3449 if (!req->outstanding_cmds) { 3450 ql_log(ql_log_fatal, NULL, 0x0126, 3451 "Failed to allocate memory for " 3452 "outstanding_cmds for req_que %p.\n", req); 3453 req->num_outstanding_cmds = 0; 3454 return QLA_FUNCTION_FAILED; 3455 } 3456 } 3457 3458 return QLA_SUCCESS; 3459 } 3460 3461 #define PRINT_FIELD(_field, _flag, _str) { \ 3462 if (a0->_field & _flag) {\ 3463 if (p) {\ 3464 strcat(ptr, "|");\ 3465 ptr++;\ 3466 leftover--;\ 3467 } \ 3468 len = snprintf(ptr, leftover, "%s", _str); \ 3469 p = 1;\ 3470 leftover -= len;\ 3471 ptr += len; \ 3472 } \ 3473 } 3474 3475 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3476 { 3477 #define STR_LEN 64 3478 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3479 u8 str[STR_LEN], *ptr, p; 3480 int leftover, len; 3481 3482 memset(str, 0, STR_LEN); 3483 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3484 ql_dbg(ql_dbg_init, vha, 0x015a, 3485 "SFP MFG Name: %s\n", str); 3486 3487 memset(str, 0, STR_LEN); 3488 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3489 ql_dbg(ql_dbg_init, vha, 0x015c, 3490 "SFP Part Name: %s\n", str); 3491 3492 /* media */ 3493 memset(str, 0, STR_LEN); 3494 ptr = str; 3495 leftover = STR_LEN; 3496 p = len = 0; 3497 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3498 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3499 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3500 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3501 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3502 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3503 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3504 ql_dbg(ql_dbg_init, vha, 0x0160, 3505 "SFP Media: %s\n", str); 3506 3507 /* link length */ 3508 memset(str, 0, STR_LEN); 3509 ptr = str; 3510 leftover = STR_LEN; 3511 p = len = 0; 3512 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3513 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3514 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3515 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3516 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3517 ql_dbg(ql_dbg_init, vha, 0x0196, 3518 "SFP Link Length: %s\n", str); 3519 3520 memset(str, 0, STR_LEN); 3521 ptr = str; 3522 leftover = STR_LEN; 3523 p = len = 0; 3524 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3525 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3526 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3527 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3528 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3529 ql_dbg(ql_dbg_init, vha, 0x016e, 3530 "SFP FC Link Tech: %s\n", str); 3531 3532 if (a0->length_km) 3533 ql_dbg(ql_dbg_init, vha, 0x016f, 3534 "SFP Distant: %d km\n", a0->length_km); 3535 if (a0->length_100m) 3536 ql_dbg(ql_dbg_init, vha, 0x0170, 3537 "SFP Distant: %d m\n", a0->length_100m*100); 3538 if (a0->length_50um_10m) 3539 ql_dbg(ql_dbg_init, vha, 0x0189, 3540 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3541 if (a0->length_62um_10m) 3542 ql_dbg(ql_dbg_init, vha, 0x018a, 3543 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3544 if (a0->length_om4_10m) 3545 ql_dbg(ql_dbg_init, vha, 0x0194, 3546 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3547 if (a0->length_om3_10m) 3548 ql_dbg(ql_dbg_init, vha, 0x0195, 3549 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3550 } 3551 3552 3553 /** 3554 * qla24xx_detect_sfp() 3555 * 3556 * @vha: adapter state pointer. 3557 * 3558 * @return 3559 * 0 -- Configure firmware to use short-range settings -- normal 3560 * buffer-to-buffer credits. 3561 * 3562 * 1 -- Configure firmware to use long-range settings -- extra 3563 * buffer-to-buffer credits should be allocated with 3564 * ha->lr_distance containing distance settings from NVRAM or SFP 3565 * (if supported). 3566 */ 3567 int 3568 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3569 { 3570 int rc, used_nvram; 3571 struct sff_8247_a0 *a; 3572 struct qla_hw_data *ha = vha->hw; 3573 struct nvram_81xx *nv = ha->nvram; 3574 #define LR_DISTANCE_UNKNOWN 2 3575 static const char * const types[] = { "Short", "Long" }; 3576 static const char * const lengths[] = { "(10km)", "(5km)", "" }; 3577 u8 ll = 0; 3578 3579 /* Seed with NVRAM settings. */ 3580 used_nvram = 0; 3581 ha->flags.lr_detected = 0; 3582 if (IS_BPM_RANGE_CAPABLE(ha) && 3583 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) { 3584 used_nvram = 1; 3585 ha->flags.lr_detected = 1; 3586 ha->lr_distance = 3587 (nv->enhanced_features >> LR_DIST_NV_POS) 3588 & LR_DIST_NV_MASK; 3589 } 3590 3591 if (!IS_BPM_ENABLED(vha)) 3592 goto out; 3593 /* Determine SR/LR capabilities of SFP/Transceiver. */ 3594 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3595 if (rc) 3596 goto out; 3597 3598 used_nvram = 0; 3599 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3600 qla2xxx_print_sfp_info(vha); 3601 3602 ha->flags.lr_detected = 0; 3603 ll = a->fc_ll_cc7; 3604 if (ll & FC_LL_VL || ll & FC_LL_L) { 3605 /* Long range, track length. */ 3606 ha->flags.lr_detected = 1; 3607 3608 if (a->length_km > 5 || a->length_100m > 50) 3609 ha->lr_distance = LR_DISTANCE_10K; 3610 else 3611 ha->lr_distance = LR_DISTANCE_5K; 3612 } 3613 3614 if (!vha->flags.init_done) 3615 rc = QLA_SUCCESS; 3616 out: 3617 ql_dbg(ql_dbg_async, vha, 0x507b, 3618 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n", 3619 types[ha->flags.lr_detected], 3620 ha->flags.lr_detected ? lengths[ha->lr_distance] : 3621 lengths[LR_DISTANCE_UNKNOWN], 3622 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance); 3623 return ha->flags.lr_detected; 3624 } 3625 3626 /** 3627 * qla2x00_setup_chip() - Load and start RISC firmware. 3628 * @vha: HA context 3629 * 3630 * Returns 0 on success. 3631 */ 3632 static int 3633 qla2x00_setup_chip(scsi_qla_host_t *vha) 3634 { 3635 int rval; 3636 uint32_t srisc_address = 0; 3637 struct qla_hw_data *ha = vha->hw; 3638 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3639 unsigned long flags; 3640 uint16_t fw_major_version; 3641 int done_once = 0; 3642 3643 if (IS_P3P_TYPE(ha)) { 3644 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3645 if (rval == QLA_SUCCESS) { 3646 qla2x00_stop_firmware(vha); 3647 goto enable_82xx_npiv; 3648 } else 3649 goto failed; 3650 } 3651 3652 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3653 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3654 spin_lock_irqsave(&ha->hardware_lock, flags); 3655 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3656 RD_REG_WORD(®->hccr); 3657 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3658 } 3659 3660 qla81xx_mpi_sync(vha); 3661 3662 execute_fw_with_lr: 3663 /* Load firmware sequences */ 3664 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3665 if (rval == QLA_SUCCESS) { 3666 ql_dbg(ql_dbg_init, vha, 0x00c9, 3667 "Verifying Checksum of loaded RISC code.\n"); 3668 3669 rval = qla2x00_verify_checksum(vha, srisc_address); 3670 if (rval == QLA_SUCCESS) { 3671 /* Start firmware execution. */ 3672 ql_dbg(ql_dbg_init, vha, 0x00ca, 3673 "Starting firmware.\n"); 3674 3675 if (ql2xexlogins) 3676 ha->flags.exlogins_enabled = 1; 3677 3678 if (qla_is_exch_offld_enabled(vha)) 3679 ha->flags.exchoffld_enabled = 1; 3680 3681 rval = qla2x00_execute_fw(vha, srisc_address); 3682 /* Retrieve firmware information. */ 3683 if (rval == QLA_SUCCESS) { 3684 /* Enable BPM support? */ 3685 if (!done_once++ && qla24xx_detect_sfp(vha)) { 3686 ql_dbg(ql_dbg_init, vha, 0x00ca, 3687 "Re-starting firmware -- BPM.\n"); 3688 /* Best-effort - re-init. */ 3689 ha->isp_ops->reset_chip(vha); 3690 ha->isp_ops->chip_diag(vha); 3691 goto execute_fw_with_lr; 3692 } 3693 3694 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3695 IS_QLA28XX(ha)) && 3696 (ha->zio_mode == QLA_ZIO_MODE_6)) 3697 qla27xx_set_zio_threshold(vha, 3698 ha->last_zio_threshold); 3699 3700 rval = qla2x00_set_exlogins_buffer(vha); 3701 if (rval != QLA_SUCCESS) 3702 goto failed; 3703 3704 rval = qla2x00_set_exchoffld_buffer(vha); 3705 if (rval != QLA_SUCCESS) 3706 goto failed; 3707 3708 enable_82xx_npiv: 3709 fw_major_version = ha->fw_major_version; 3710 if (IS_P3P_TYPE(ha)) 3711 qla82xx_check_md_needed(vha); 3712 else 3713 rval = qla2x00_get_fw_version(vha); 3714 if (rval != QLA_SUCCESS) 3715 goto failed; 3716 ha->flags.npiv_supported = 0; 3717 if (IS_QLA2XXX_MIDTYPE(ha) && 3718 (ha->fw_attributes & BIT_2)) { 3719 ha->flags.npiv_supported = 1; 3720 if ((!ha->max_npiv_vports) || 3721 ((ha->max_npiv_vports + 1) % 3722 MIN_MULTI_ID_FABRIC)) 3723 ha->max_npiv_vports = 3724 MIN_MULTI_ID_FABRIC - 1; 3725 } 3726 qla2x00_get_resource_cnts(vha); 3727 3728 /* 3729 * Allocate the array of outstanding commands 3730 * now that we know the firmware resources. 3731 */ 3732 rval = qla2x00_alloc_outstanding_cmds(ha, 3733 vha->req); 3734 if (rval != QLA_SUCCESS) 3735 goto failed; 3736 3737 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3738 qla2x00_alloc_offload_mem(vha); 3739 3740 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3741 qla2x00_alloc_fw_dump(vha); 3742 3743 } else { 3744 goto failed; 3745 } 3746 } else { 3747 ql_log(ql_log_fatal, vha, 0x00cd, 3748 "ISP Firmware failed checksum.\n"); 3749 goto failed; 3750 } 3751 3752 /* Enable PUREX PASSTHRU */ 3753 if (ql2xrdpenable) 3754 qla25xx_set_els_cmds_supported(vha); 3755 } else 3756 goto failed; 3757 3758 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3759 /* Enable proper parity. */ 3760 spin_lock_irqsave(&ha->hardware_lock, flags); 3761 if (IS_QLA2300(ha)) 3762 /* SRAM parity */ 3763 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3764 else 3765 /* SRAM, Instruction RAM and GP RAM parity */ 3766 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3767 RD_REG_WORD(®->hccr); 3768 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3769 } 3770 3771 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3772 ha->flags.fac_supported = 1; 3773 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3774 uint32_t size; 3775 3776 rval = qla81xx_fac_get_sector_size(vha, &size); 3777 if (rval == QLA_SUCCESS) { 3778 ha->flags.fac_supported = 1; 3779 ha->fdt_block_size = size << 2; 3780 } else { 3781 ql_log(ql_log_warn, vha, 0x00ce, 3782 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3783 ha->fw_major_version, ha->fw_minor_version, 3784 ha->fw_subminor_version); 3785 3786 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3787 IS_QLA28XX(ha)) { 3788 ha->flags.fac_supported = 0; 3789 rval = QLA_SUCCESS; 3790 } 3791 } 3792 } 3793 failed: 3794 if (rval) { 3795 ql_log(ql_log_fatal, vha, 0x00cf, 3796 "Setup chip ****FAILED****.\n"); 3797 } 3798 3799 return (rval); 3800 } 3801 3802 /** 3803 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3804 * @rsp: response queue 3805 * 3806 * Beginning of request ring has initialization control block already built 3807 * by nvram config routine. 3808 * 3809 * Returns 0 on success. 3810 */ 3811 void 3812 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3813 { 3814 uint16_t cnt; 3815 response_t *pkt; 3816 3817 rsp->ring_ptr = rsp->ring; 3818 rsp->ring_index = 0; 3819 rsp->status_srb = NULL; 3820 pkt = rsp->ring_ptr; 3821 for (cnt = 0; cnt < rsp->length; cnt++) { 3822 pkt->signature = RESPONSE_PROCESSED; 3823 pkt++; 3824 } 3825 } 3826 3827 /** 3828 * qla2x00_update_fw_options() - Read and process firmware options. 3829 * @vha: HA context 3830 * 3831 * Returns 0 on success. 3832 */ 3833 void 3834 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3835 { 3836 uint16_t swing, emphasis, tx_sens, rx_sens; 3837 struct qla_hw_data *ha = vha->hw; 3838 3839 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3840 qla2x00_get_fw_options(vha, ha->fw_options); 3841 3842 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3843 return; 3844 3845 /* Serial Link options. */ 3846 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3847 "Serial link options.\n"); 3848 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3849 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 3850 3851 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3852 if (ha->fw_seriallink_options[3] & BIT_2) { 3853 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3854 3855 /* 1G settings */ 3856 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3857 emphasis = (ha->fw_seriallink_options[2] & 3858 (BIT_4 | BIT_3)) >> 3; 3859 tx_sens = ha->fw_seriallink_options[0] & 3860 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3861 rx_sens = (ha->fw_seriallink_options[0] & 3862 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3863 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3864 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3865 if (rx_sens == 0x0) 3866 rx_sens = 0x3; 3867 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3868 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3869 ha->fw_options[10] |= BIT_5 | 3870 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3871 (tx_sens & (BIT_1 | BIT_0)); 3872 3873 /* 2G settings */ 3874 swing = (ha->fw_seriallink_options[2] & 3875 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3876 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3877 tx_sens = ha->fw_seriallink_options[1] & 3878 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3879 rx_sens = (ha->fw_seriallink_options[1] & 3880 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3881 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3882 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3883 if (rx_sens == 0x0) 3884 rx_sens = 0x3; 3885 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3886 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3887 ha->fw_options[11] |= BIT_5 | 3888 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3889 (tx_sens & (BIT_1 | BIT_0)); 3890 } 3891 3892 /* FCP2 options. */ 3893 /* Return command IOCBs without waiting for an ABTS to complete. */ 3894 ha->fw_options[3] |= BIT_13; 3895 3896 /* LED scheme. */ 3897 if (ha->flags.enable_led_scheme) 3898 ha->fw_options[2] |= BIT_12; 3899 3900 /* Detect ISP6312. */ 3901 if (IS_QLA6312(ha)) 3902 ha->fw_options[2] |= BIT_13; 3903 3904 /* Set Retry FLOGI in case of P2P connection */ 3905 if (ha->operating_mode == P2P) { 3906 ha->fw_options[2] |= BIT_3; 3907 ql_dbg(ql_dbg_disc, vha, 0x2100, 3908 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3909 __func__, ha->fw_options[2]); 3910 } 3911 3912 /* Update firmware options. */ 3913 qla2x00_set_fw_options(vha, ha->fw_options); 3914 } 3915 3916 void 3917 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3918 { 3919 int rval; 3920 struct qla_hw_data *ha = vha->hw; 3921 3922 if (IS_P3P_TYPE(ha)) 3923 return; 3924 3925 /* Hold status IOCBs until ABTS response received. */ 3926 if (ql2xfwholdabts) 3927 ha->fw_options[3] |= BIT_12; 3928 3929 /* Set Retry FLOGI in case of P2P connection */ 3930 if (ha->operating_mode == P2P) { 3931 ha->fw_options[2] |= BIT_3; 3932 ql_dbg(ql_dbg_disc, vha, 0x2101, 3933 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3934 __func__, ha->fw_options[2]); 3935 } 3936 3937 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3938 if (ql2xmvasynctoatio && 3939 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 3940 if (qla_tgt_mode_enabled(vha) || 3941 qla_dual_mode_enabled(vha)) 3942 ha->fw_options[2] |= BIT_11; 3943 else 3944 ha->fw_options[2] &= ~BIT_11; 3945 } 3946 3947 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3948 IS_QLA28XX(ha)) { 3949 /* 3950 * Tell FW to track each exchange to prevent 3951 * driver from using stale exchange. 3952 */ 3953 if (qla_tgt_mode_enabled(vha) || 3954 qla_dual_mode_enabled(vha)) 3955 ha->fw_options[2] |= BIT_4; 3956 else 3957 ha->fw_options[2] &= ~BIT_4; 3958 3959 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3960 if (qla2xuseresexchforels) 3961 ha->fw_options[2] |= BIT_8; 3962 else 3963 ha->fw_options[2] &= ~BIT_8; 3964 } 3965 3966 if (ql2xrdpenable) 3967 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB; 3968 3969 /* Enable Async 8130/8131 events -- transceiver insertion/removal */ 3970 if (IS_BPM_RANGE_CAPABLE(ha)) 3971 ha->fw_options[3] |= BIT_10; 3972 3973 ql_dbg(ql_dbg_init, vha, 0x00e8, 3974 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3975 __func__, ha->fw_options[1], ha->fw_options[2], 3976 ha->fw_options[3], vha->host->active_mode); 3977 3978 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3979 qla2x00_set_fw_options(vha, ha->fw_options); 3980 3981 /* Update Serial Link options. */ 3982 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3983 return; 3984 3985 rval = qla2x00_set_serdes_params(vha, 3986 le16_to_cpu(ha->fw_seriallink_options24[1]), 3987 le16_to_cpu(ha->fw_seriallink_options24[2]), 3988 le16_to_cpu(ha->fw_seriallink_options24[3])); 3989 if (rval != QLA_SUCCESS) { 3990 ql_log(ql_log_warn, vha, 0x0104, 3991 "Unable to update Serial Link options (%x).\n", rval); 3992 } 3993 } 3994 3995 void 3996 qla2x00_config_rings(struct scsi_qla_host *vha) 3997 { 3998 struct qla_hw_data *ha = vha->hw; 3999 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4000 struct req_que *req = ha->req_q_map[0]; 4001 struct rsp_que *rsp = ha->rsp_q_map[0]; 4002 4003 /* Setup ring parameters in initialization control block. */ 4004 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 4005 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 4006 ha->init_cb->request_q_length = cpu_to_le16(req->length); 4007 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 4008 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 4009 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 4010 4011 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 4012 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 4013 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 4014 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 4015 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 4016 } 4017 4018 void 4019 qla24xx_config_rings(struct scsi_qla_host *vha) 4020 { 4021 struct qla_hw_data *ha = vha->hw; 4022 device_reg_t *reg = ISP_QUE_REG(ha, 0); 4023 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 4024 struct qla_msix_entry *msix; 4025 struct init_cb_24xx *icb; 4026 uint16_t rid = 0; 4027 struct req_que *req = ha->req_q_map[0]; 4028 struct rsp_que *rsp = ha->rsp_q_map[0]; 4029 4030 /* Setup ring parameters in initialization control block. */ 4031 icb = (struct init_cb_24xx *)ha->init_cb; 4032 icb->request_q_outpointer = cpu_to_le16(0); 4033 icb->response_q_inpointer = cpu_to_le16(0); 4034 icb->request_q_length = cpu_to_le16(req->length); 4035 icb->response_q_length = cpu_to_le16(rsp->length); 4036 put_unaligned_le64(req->dma, &icb->request_q_address); 4037 put_unaligned_le64(rsp->dma, &icb->response_q_address); 4038 4039 /* Setup ATIO queue dma pointers for target mode */ 4040 icb->atio_q_inpointer = cpu_to_le16(0); 4041 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 4042 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 4043 4044 if (IS_SHADOW_REG_CAPABLE(ha)) 4045 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 4046 4047 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4048 IS_QLA28XX(ha)) { 4049 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 4050 icb->rid = cpu_to_le16(rid); 4051 if (ha->flags.msix_enabled) { 4052 msix = &ha->msix_entries[1]; 4053 ql_dbg(ql_dbg_init, vha, 0x0019, 4054 "Registering vector 0x%x for base que.\n", 4055 msix->entry); 4056 icb->msix = cpu_to_le16(msix->entry); 4057 } 4058 /* Use alternate PCI bus number */ 4059 if (MSB(rid)) 4060 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 4061 /* Use alternate PCI devfn */ 4062 if (LSB(rid)) 4063 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 4064 4065 /* Use Disable MSIX Handshake mode for capable adapters */ 4066 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 4067 (ha->flags.msix_enabled)) { 4068 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 4069 ha->flags.disable_msix_handshake = 1; 4070 ql_dbg(ql_dbg_init, vha, 0x00fe, 4071 "MSIX Handshake Disable Mode turned on.\n"); 4072 } else { 4073 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 4074 } 4075 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4076 4077 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 4078 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 4079 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 4080 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 4081 } else { 4082 WRT_REG_DWORD(®->isp24.req_q_in, 0); 4083 WRT_REG_DWORD(®->isp24.req_q_out, 0); 4084 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 4085 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 4086 } 4087 4088 qlt_24xx_config_rings(vha); 4089 4090 /* If the user has configured the speed, set it here */ 4091 if (ha->set_data_rate) { 4092 ql_dbg(ql_dbg_init, vha, 0x00fd, 4093 "Speed set by user : %s Gbps \n", 4094 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4095 icb->firmware_options_3 = (ha->set_data_rate << 13); 4096 } 4097 4098 /* PCI posting */ 4099 RD_REG_DWORD(&ioreg->hccr); 4100 } 4101 4102 /** 4103 * qla2x00_init_rings() - Initializes firmware. 4104 * @vha: HA context 4105 * 4106 * Beginning of request ring has initialization control block already built 4107 * by nvram config routine. 4108 * 4109 * Returns 0 on success. 4110 */ 4111 int 4112 qla2x00_init_rings(scsi_qla_host_t *vha) 4113 { 4114 int rval; 4115 unsigned long flags = 0; 4116 int cnt, que; 4117 struct qla_hw_data *ha = vha->hw; 4118 struct req_que *req; 4119 struct rsp_que *rsp; 4120 struct mid_init_cb_24xx *mid_init_cb = 4121 (struct mid_init_cb_24xx *) ha->init_cb; 4122 4123 spin_lock_irqsave(&ha->hardware_lock, flags); 4124 4125 /* Clear outstanding commands array. */ 4126 for (que = 0; que < ha->max_req_queues; que++) { 4127 req = ha->req_q_map[que]; 4128 if (!req || !test_bit(que, ha->req_qid_map)) 4129 continue; 4130 req->out_ptr = (void *)(req->ring + req->length); 4131 *req->out_ptr = 0; 4132 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4133 req->outstanding_cmds[cnt] = NULL; 4134 4135 req->current_outstanding_cmd = 1; 4136 4137 /* Initialize firmware. */ 4138 req->ring_ptr = req->ring; 4139 req->ring_index = 0; 4140 req->cnt = req->length; 4141 } 4142 4143 for (que = 0; que < ha->max_rsp_queues; que++) { 4144 rsp = ha->rsp_q_map[que]; 4145 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4146 continue; 4147 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 4148 *rsp->in_ptr = 0; 4149 /* Initialize response queue entries */ 4150 if (IS_QLAFX00(ha)) 4151 qlafx00_init_response_q_entries(rsp); 4152 else 4153 qla2x00_init_response_q_entries(rsp); 4154 } 4155 4156 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4157 ha->tgt.atio_ring_index = 0; 4158 /* Initialize ATIO queue entries */ 4159 qlt_init_atio_q_entries(vha); 4160 4161 ha->isp_ops->config_rings(vha); 4162 4163 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4164 4165 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 4166 4167 if (IS_QLAFX00(ha)) { 4168 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4169 goto next_check; 4170 } 4171 4172 /* Update any ISP specific firmware options before initialization. */ 4173 ha->isp_ops->update_fw_options(vha); 4174 4175 if (ha->flags.npiv_supported) { 4176 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4177 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4178 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4179 } 4180 4181 if (IS_FWI2_CAPABLE(ha)) { 4182 mid_init_cb->options = cpu_to_le16(BIT_1); 4183 mid_init_cb->init_cb.execution_throttle = 4184 cpu_to_le16(ha->cur_fw_xcb_count); 4185 ha->flags.dport_enabled = 4186 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 4187 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4188 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4189 /* FA-WWPN Status */ 4190 ha->flags.fawwpn_enabled = 4191 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 4192 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4193 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4194 } 4195 4196 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4197 next_check: 4198 if (rval) { 4199 ql_log(ql_log_fatal, vha, 0x00d2, 4200 "Init Firmware **** FAILED ****.\n"); 4201 } else { 4202 ql_dbg(ql_dbg_init, vha, 0x00d3, 4203 "Init Firmware -- success.\n"); 4204 QLA_FW_STARTED(ha); 4205 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4206 } 4207 4208 return (rval); 4209 } 4210 4211 /** 4212 * qla2x00_fw_ready() - Waits for firmware ready. 4213 * @vha: HA context 4214 * 4215 * Returns 0 on success. 4216 */ 4217 static int 4218 qla2x00_fw_ready(scsi_qla_host_t *vha) 4219 { 4220 int rval; 4221 unsigned long wtime, mtime, cs84xx_time; 4222 uint16_t min_wait; /* Minimum wait time if loop is down */ 4223 uint16_t wait_time; /* Wait time if loop is coming ready */ 4224 uint16_t state[6]; 4225 struct qla_hw_data *ha = vha->hw; 4226 4227 if (IS_QLAFX00(vha->hw)) 4228 return qlafx00_fw_ready(vha); 4229 4230 rval = QLA_SUCCESS; 4231 4232 /* Time to wait for loop down */ 4233 if (IS_P3P_TYPE(ha)) 4234 min_wait = 30; 4235 else 4236 min_wait = 20; 4237 4238 /* 4239 * Firmware should take at most one RATOV to login, plus 5 seconds for 4240 * our own processing. 4241 */ 4242 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4243 wait_time = min_wait; 4244 } 4245 4246 /* Min wait time if loop down */ 4247 mtime = jiffies + (min_wait * HZ); 4248 4249 /* wait time before firmware ready */ 4250 wtime = jiffies + (wait_time * HZ); 4251 4252 /* Wait for ISP to finish LIP */ 4253 if (!vha->flags.init_done) 4254 ql_log(ql_log_info, vha, 0x801e, 4255 "Waiting for LIP to complete.\n"); 4256 4257 do { 4258 memset(state, -1, sizeof(state)); 4259 rval = qla2x00_get_firmware_state(vha, state); 4260 if (rval == QLA_SUCCESS) { 4261 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4262 vha->device_flags &= ~DFLG_NO_CABLE; 4263 } 4264 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4265 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4266 "fw_state=%x 84xx=%x.\n", state[0], 4267 state[2]); 4268 if ((state[2] & FSTATE_LOGGED_IN) && 4269 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4270 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4271 "Sending verify iocb.\n"); 4272 4273 cs84xx_time = jiffies; 4274 rval = qla84xx_init_chip(vha); 4275 if (rval != QLA_SUCCESS) { 4276 ql_log(ql_log_warn, 4277 vha, 0x8007, 4278 "Init chip failed.\n"); 4279 break; 4280 } 4281 4282 /* Add time taken to initialize. */ 4283 cs84xx_time = jiffies - cs84xx_time; 4284 wtime += cs84xx_time; 4285 mtime += cs84xx_time; 4286 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4287 "Increasing wait time by %ld. " 4288 "New time %ld.\n", cs84xx_time, 4289 wtime); 4290 } 4291 } else if (state[0] == FSTATE_READY) { 4292 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4293 "F/W Ready - OK.\n"); 4294 4295 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4296 &ha->login_timeout, &ha->r_a_tov); 4297 4298 rval = QLA_SUCCESS; 4299 break; 4300 } 4301 4302 rval = QLA_FUNCTION_FAILED; 4303 4304 if (atomic_read(&vha->loop_down_timer) && 4305 state[0] != FSTATE_READY) { 4306 /* Loop down. Timeout on min_wait for states 4307 * other than Wait for Login. 4308 */ 4309 if (time_after_eq(jiffies, mtime)) { 4310 ql_log(ql_log_info, vha, 0x8038, 4311 "Cable is unplugged...\n"); 4312 4313 vha->device_flags |= DFLG_NO_CABLE; 4314 break; 4315 } 4316 } 4317 } else { 4318 /* Mailbox cmd failed. Timeout on min_wait. */ 4319 if (time_after_eq(jiffies, mtime) || 4320 ha->flags.isp82xx_fw_hung) 4321 break; 4322 } 4323 4324 if (time_after_eq(jiffies, wtime)) 4325 break; 4326 4327 /* Delay for a while */ 4328 msleep(500); 4329 } while (1); 4330 4331 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4332 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4333 state[1], state[2], state[3], state[4], state[5], jiffies); 4334 4335 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4336 ql_log(ql_log_warn, vha, 0x803b, 4337 "Firmware ready **** FAILED ****.\n"); 4338 } 4339 4340 return (rval); 4341 } 4342 4343 /* 4344 * qla2x00_configure_hba 4345 * Setup adapter context. 4346 * 4347 * Input: 4348 * ha = adapter state pointer. 4349 * 4350 * Returns: 4351 * 0 = success 4352 * 4353 * Context: 4354 * Kernel context. 4355 */ 4356 static int 4357 qla2x00_configure_hba(scsi_qla_host_t *vha) 4358 { 4359 int rval; 4360 uint16_t loop_id; 4361 uint16_t topo; 4362 uint16_t sw_cap; 4363 uint8_t al_pa; 4364 uint8_t area; 4365 uint8_t domain; 4366 char connect_type[22]; 4367 struct qla_hw_data *ha = vha->hw; 4368 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4369 port_id_t id; 4370 unsigned long flags; 4371 4372 /* Get host addresses. */ 4373 rval = qla2x00_get_adapter_id(vha, 4374 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4375 if (rval != QLA_SUCCESS) { 4376 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4377 IS_CNA_CAPABLE(ha) || 4378 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4379 ql_dbg(ql_dbg_disc, vha, 0x2008, 4380 "Loop is in a transition state.\n"); 4381 } else { 4382 ql_log(ql_log_warn, vha, 0x2009, 4383 "Unable to get host loop ID.\n"); 4384 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4385 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4386 ql_log(ql_log_warn, vha, 0x1151, 4387 "Doing link init.\n"); 4388 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4389 return rval; 4390 } 4391 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4392 } 4393 return (rval); 4394 } 4395 4396 if (topo == 4) { 4397 ql_log(ql_log_info, vha, 0x200a, 4398 "Cannot get topology - retrying.\n"); 4399 return (QLA_FUNCTION_FAILED); 4400 } 4401 4402 vha->loop_id = loop_id; 4403 4404 /* initialize */ 4405 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4406 ha->operating_mode = LOOP; 4407 ha->switch_cap = 0; 4408 4409 switch (topo) { 4410 case 0: 4411 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4412 ha->current_topology = ISP_CFG_NL; 4413 strcpy(connect_type, "(Loop)"); 4414 break; 4415 4416 case 1: 4417 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4418 ha->switch_cap = sw_cap; 4419 ha->current_topology = ISP_CFG_FL; 4420 strcpy(connect_type, "(FL_Port)"); 4421 break; 4422 4423 case 2: 4424 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4425 ha->operating_mode = P2P; 4426 ha->current_topology = ISP_CFG_N; 4427 strcpy(connect_type, "(N_Port-to-N_Port)"); 4428 break; 4429 4430 case 3: 4431 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4432 ha->switch_cap = sw_cap; 4433 ha->operating_mode = P2P; 4434 ha->current_topology = ISP_CFG_F; 4435 strcpy(connect_type, "(F_Port)"); 4436 break; 4437 4438 default: 4439 ql_dbg(ql_dbg_disc, vha, 0x200f, 4440 "HBA in unknown topology %x, using NL.\n", topo); 4441 ha->current_topology = ISP_CFG_NL; 4442 strcpy(connect_type, "(Loop)"); 4443 break; 4444 } 4445 4446 /* Save Host port and loop ID. */ 4447 /* byte order - Big Endian */ 4448 id.b.domain = domain; 4449 id.b.area = area; 4450 id.b.al_pa = al_pa; 4451 id.b.rsvd_1 = 0; 4452 spin_lock_irqsave(&ha->hardware_lock, flags); 4453 if (!(topo == 2 && ha->flags.n2n_bigger)) 4454 qlt_update_host_map(vha, id); 4455 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4456 4457 if (!vha->flags.init_done) 4458 ql_log(ql_log_info, vha, 0x2010, 4459 "Topology - %s, Host Loop address 0x%x.\n", 4460 connect_type, vha->loop_id); 4461 4462 return(rval); 4463 } 4464 4465 inline void 4466 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4467 const char *def) 4468 { 4469 char *st, *en; 4470 uint16_t index; 4471 uint64_t zero[2] = { 0 }; 4472 struct qla_hw_data *ha = vha->hw; 4473 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4474 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4475 4476 if (len > sizeof(zero)) 4477 len = sizeof(zero); 4478 if (memcmp(model, &zero, len) != 0) { 4479 memcpy(ha->model_number, model, len); 4480 st = en = ha->model_number; 4481 en += len - 1; 4482 while (en > st) { 4483 if (*en != 0x20 && *en != 0x00) 4484 break; 4485 *en-- = '\0'; 4486 } 4487 4488 index = (ha->pdev->subsystem_device & 0xff); 4489 if (use_tbl && 4490 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4491 index < QLA_MODEL_NAMES) 4492 strlcpy(ha->model_desc, 4493 qla2x00_model_name[index * 2 + 1], 4494 sizeof(ha->model_desc)); 4495 } else { 4496 index = (ha->pdev->subsystem_device & 0xff); 4497 if (use_tbl && 4498 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4499 index < QLA_MODEL_NAMES) { 4500 strlcpy(ha->model_number, 4501 qla2x00_model_name[index * 2], 4502 sizeof(ha->model_number)); 4503 strlcpy(ha->model_desc, 4504 qla2x00_model_name[index * 2 + 1], 4505 sizeof(ha->model_desc)); 4506 } else { 4507 strlcpy(ha->model_number, def, 4508 sizeof(ha->model_number)); 4509 } 4510 } 4511 if (IS_FWI2_CAPABLE(ha)) 4512 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4513 sizeof(ha->model_desc)); 4514 } 4515 4516 /* On sparc systems, obtain port and node WWN from firmware 4517 * properties. 4518 */ 4519 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4520 { 4521 #ifdef CONFIG_SPARC 4522 struct qla_hw_data *ha = vha->hw; 4523 struct pci_dev *pdev = ha->pdev; 4524 struct device_node *dp = pci_device_to_OF_node(pdev); 4525 const u8 *val; 4526 int len; 4527 4528 val = of_get_property(dp, "port-wwn", &len); 4529 if (val && len >= WWN_SIZE) 4530 memcpy(nv->port_name, val, WWN_SIZE); 4531 4532 val = of_get_property(dp, "node-wwn", &len); 4533 if (val && len >= WWN_SIZE) 4534 memcpy(nv->node_name, val, WWN_SIZE); 4535 #endif 4536 } 4537 4538 /* 4539 * NVRAM configuration for ISP 2xxx 4540 * 4541 * Input: 4542 * ha = adapter block pointer. 4543 * 4544 * Output: 4545 * initialization control block in response_ring 4546 * host adapters parameters in host adapter block 4547 * 4548 * Returns: 4549 * 0 = success. 4550 */ 4551 int 4552 qla2x00_nvram_config(scsi_qla_host_t *vha) 4553 { 4554 int rval; 4555 uint8_t chksum = 0; 4556 uint16_t cnt; 4557 uint8_t *dptr1, *dptr2; 4558 struct qla_hw_data *ha = vha->hw; 4559 init_cb_t *icb = ha->init_cb; 4560 nvram_t *nv = ha->nvram; 4561 uint8_t *ptr = ha->nvram; 4562 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4563 4564 rval = QLA_SUCCESS; 4565 4566 /* Determine NVRAM starting address. */ 4567 ha->nvram_size = sizeof(*nv); 4568 ha->nvram_base = 0; 4569 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4570 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4571 ha->nvram_base = 0x80; 4572 4573 /* Get NVRAM data and calculate checksum. */ 4574 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4575 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4576 chksum += *ptr++; 4577 4578 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4579 "Contents of NVRAM.\n"); 4580 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4581 nv, ha->nvram_size); 4582 4583 /* Bad NVRAM data, set defaults parameters. */ 4584 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 4585 nv->nvram_version < 1) { 4586 /* Reset NVRAM data. */ 4587 ql_log(ql_log_warn, vha, 0x0064, 4588 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 4589 chksum, nv->id, nv->nvram_version); 4590 ql_log(ql_log_warn, vha, 0x0065, 4591 "Falling back to " 4592 "functioning (yet invalid -- WWPN) defaults.\n"); 4593 4594 /* 4595 * Set default initialization control block. 4596 */ 4597 memset(nv, 0, ha->nvram_size); 4598 nv->parameter_block_version = ICB_VERSION; 4599 4600 if (IS_QLA23XX(ha)) { 4601 nv->firmware_options[0] = BIT_2 | BIT_1; 4602 nv->firmware_options[1] = BIT_7 | BIT_5; 4603 nv->add_firmware_options[0] = BIT_5; 4604 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4605 nv->frame_payload_size = 2048; 4606 nv->special_options[1] = BIT_7; 4607 } else if (IS_QLA2200(ha)) { 4608 nv->firmware_options[0] = BIT_2 | BIT_1; 4609 nv->firmware_options[1] = BIT_7 | BIT_5; 4610 nv->add_firmware_options[0] = BIT_5; 4611 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4612 nv->frame_payload_size = 1024; 4613 } else if (IS_QLA2100(ha)) { 4614 nv->firmware_options[0] = BIT_3 | BIT_1; 4615 nv->firmware_options[1] = BIT_5; 4616 nv->frame_payload_size = 1024; 4617 } 4618 4619 nv->max_iocb_allocation = cpu_to_le16(256); 4620 nv->execution_throttle = cpu_to_le16(16); 4621 nv->retry_count = 8; 4622 nv->retry_delay = 1; 4623 4624 nv->port_name[0] = 33; 4625 nv->port_name[3] = 224; 4626 nv->port_name[4] = 139; 4627 4628 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4629 4630 nv->login_timeout = 4; 4631 4632 /* 4633 * Set default host adapter parameters 4634 */ 4635 nv->host_p[1] = BIT_2; 4636 nv->reset_delay = 5; 4637 nv->port_down_retry_count = 8; 4638 nv->max_luns_per_target = cpu_to_le16(8); 4639 nv->link_down_timeout = 60; 4640 4641 rval = 1; 4642 } 4643 4644 /* Reset Initialization control block */ 4645 memset(icb, 0, ha->init_cb_size); 4646 4647 /* 4648 * Setup driver NVRAM options. 4649 */ 4650 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4651 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4652 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4653 nv->firmware_options[1] &= ~BIT_4; 4654 4655 if (IS_QLA23XX(ha)) { 4656 nv->firmware_options[0] |= BIT_2; 4657 nv->firmware_options[0] &= ~BIT_3; 4658 nv->special_options[0] &= ~BIT_6; 4659 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4660 4661 if (IS_QLA2300(ha)) { 4662 if (ha->fb_rev == FPM_2310) { 4663 strcpy(ha->model_number, "QLA2310"); 4664 } else { 4665 strcpy(ha->model_number, "QLA2300"); 4666 } 4667 } else { 4668 qla2x00_set_model_info(vha, nv->model_number, 4669 sizeof(nv->model_number), "QLA23xx"); 4670 } 4671 } else if (IS_QLA2200(ha)) { 4672 nv->firmware_options[0] |= BIT_2; 4673 /* 4674 * 'Point-to-point preferred, else loop' is not a safe 4675 * connection mode setting. 4676 */ 4677 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4678 (BIT_5 | BIT_4)) { 4679 /* Force 'loop preferred, else point-to-point'. */ 4680 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4681 nv->add_firmware_options[0] |= BIT_5; 4682 } 4683 strcpy(ha->model_number, "QLA22xx"); 4684 } else /*if (IS_QLA2100(ha))*/ { 4685 strcpy(ha->model_number, "QLA2100"); 4686 } 4687 4688 /* 4689 * Copy over NVRAM RISC parameter block to initialization control block. 4690 */ 4691 dptr1 = (uint8_t *)icb; 4692 dptr2 = (uint8_t *)&nv->parameter_block_version; 4693 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4694 while (cnt--) 4695 *dptr1++ = *dptr2++; 4696 4697 /* Copy 2nd half. */ 4698 dptr1 = (uint8_t *)icb->add_firmware_options; 4699 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4700 while (cnt--) 4701 *dptr1++ = *dptr2++; 4702 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4703 /* Use alternate WWN? */ 4704 if (nv->host_p[1] & BIT_7) { 4705 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4706 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4707 } 4708 4709 /* Prepare nodename */ 4710 if ((icb->firmware_options[1] & BIT_6) == 0) { 4711 /* 4712 * Firmware will apply the following mask if the nodename was 4713 * not provided. 4714 */ 4715 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4716 icb->node_name[0] &= 0xF0; 4717 } 4718 4719 /* 4720 * Set host adapter parameters. 4721 */ 4722 4723 /* 4724 * BIT_7 in the host-parameters section allows for modification to 4725 * internal driver logging. 4726 */ 4727 if (nv->host_p[0] & BIT_7) 4728 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4729 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4730 /* Always load RISC code on non ISP2[12]00 chips. */ 4731 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4732 ha->flags.disable_risc_code_load = 0; 4733 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4734 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4735 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4736 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4737 ha->flags.disable_serdes = 0; 4738 4739 ha->operating_mode = 4740 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4741 4742 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4743 sizeof(ha->fw_seriallink_options)); 4744 4745 /* save HBA serial number */ 4746 ha->serial0 = icb->port_name[5]; 4747 ha->serial1 = icb->port_name[6]; 4748 ha->serial2 = icb->port_name[7]; 4749 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4750 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4751 4752 icb->execution_throttle = cpu_to_le16(0xFFFF); 4753 4754 ha->retry_count = nv->retry_count; 4755 4756 /* Set minimum login_timeout to 4 seconds. */ 4757 if (nv->login_timeout != ql2xlogintimeout) 4758 nv->login_timeout = ql2xlogintimeout; 4759 if (nv->login_timeout < 4) 4760 nv->login_timeout = 4; 4761 ha->login_timeout = nv->login_timeout; 4762 4763 /* Set minimum RATOV to 100 tenths of a second. */ 4764 ha->r_a_tov = 100; 4765 4766 ha->loop_reset_delay = nv->reset_delay; 4767 4768 /* Link Down Timeout = 0: 4769 * 4770 * When Port Down timer expires we will start returning 4771 * I/O's to OS with "DID_NO_CONNECT". 4772 * 4773 * Link Down Timeout != 0: 4774 * 4775 * The driver waits for the link to come up after link down 4776 * before returning I/Os to OS with "DID_NO_CONNECT". 4777 */ 4778 if (nv->link_down_timeout == 0) { 4779 ha->loop_down_abort_time = 4780 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4781 } else { 4782 ha->link_down_timeout = nv->link_down_timeout; 4783 ha->loop_down_abort_time = 4784 (LOOP_DOWN_TIME - ha->link_down_timeout); 4785 } 4786 4787 /* 4788 * Need enough time to try and get the port back. 4789 */ 4790 ha->port_down_retry_count = nv->port_down_retry_count; 4791 if (qlport_down_retry) 4792 ha->port_down_retry_count = qlport_down_retry; 4793 /* Set login_retry_count */ 4794 ha->login_retry_count = nv->retry_count; 4795 if (ha->port_down_retry_count == nv->port_down_retry_count && 4796 ha->port_down_retry_count > 3) 4797 ha->login_retry_count = ha->port_down_retry_count; 4798 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4799 ha->login_retry_count = ha->port_down_retry_count; 4800 if (ql2xloginretrycount) 4801 ha->login_retry_count = ql2xloginretrycount; 4802 4803 icb->lun_enables = cpu_to_le16(0); 4804 icb->command_resource_count = 0; 4805 icb->immediate_notify_resource_count = 0; 4806 icb->timeout = cpu_to_le16(0); 4807 4808 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4809 /* Enable RIO */ 4810 icb->firmware_options[0] &= ~BIT_3; 4811 icb->add_firmware_options[0] &= 4812 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4813 icb->add_firmware_options[0] |= BIT_2; 4814 icb->response_accumulation_timer = 3; 4815 icb->interrupt_delay_timer = 5; 4816 4817 vha->flags.process_response_queue = 1; 4818 } else { 4819 /* Enable ZIO. */ 4820 if (!vha->flags.init_done) { 4821 ha->zio_mode = icb->add_firmware_options[0] & 4822 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4823 ha->zio_timer = icb->interrupt_delay_timer ? 4824 icb->interrupt_delay_timer : 2; 4825 } 4826 icb->add_firmware_options[0] &= 4827 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4828 vha->flags.process_response_queue = 0; 4829 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4830 ha->zio_mode = QLA_ZIO_MODE_6; 4831 4832 ql_log(ql_log_info, vha, 0x0068, 4833 "ZIO mode %d enabled; timer delay (%d us).\n", 4834 ha->zio_mode, ha->zio_timer * 100); 4835 4836 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4837 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4838 vha->flags.process_response_queue = 1; 4839 } 4840 } 4841 4842 if (rval) { 4843 ql_log(ql_log_warn, vha, 0x0069, 4844 "NVRAM configuration failed.\n"); 4845 } 4846 return (rval); 4847 } 4848 4849 static void 4850 qla2x00_rport_del(void *data) 4851 { 4852 fc_port_t *fcport = data; 4853 struct fc_rport *rport; 4854 unsigned long flags; 4855 4856 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4857 rport = fcport->drport ? fcport->drport : fcport->rport; 4858 fcport->drport = NULL; 4859 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4860 if (rport) { 4861 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4862 "%s %8phN. rport %p roles %x\n", 4863 __func__, fcport->port_name, rport, 4864 rport->roles); 4865 4866 fc_remote_port_delete(rport); 4867 } 4868 } 4869 4870 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 4871 { 4872 int old_state; 4873 4874 old_state = atomic_read(&fcport->state); 4875 atomic_set(&fcport->state, state); 4876 4877 /* Don't print state transitions during initial allocation of fcport */ 4878 if (old_state && old_state != state) { 4879 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 4880 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 4881 fcport->port_name, port_state_str[old_state], 4882 port_state_str[state], fcport->d_id.b.domain, 4883 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4884 } 4885 } 4886 4887 /** 4888 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4889 * @vha: HA context 4890 * @flags: allocation flags 4891 * 4892 * Returns a pointer to the allocated fcport, or NULL, if none available. 4893 */ 4894 fc_port_t * 4895 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4896 { 4897 fc_port_t *fcport; 4898 4899 fcport = kzalloc(sizeof(fc_port_t), flags); 4900 if (!fcport) 4901 return NULL; 4902 4903 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4904 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4905 flags); 4906 if (!fcport->ct_desc.ct_sns) { 4907 ql_log(ql_log_warn, vha, 0xd049, 4908 "Failed to allocate ct_sns request.\n"); 4909 kfree(fcport); 4910 return NULL; 4911 } 4912 4913 /* Setup fcport template structure. */ 4914 fcport->vha = vha; 4915 fcport->port_type = FCT_UNKNOWN; 4916 fcport->loop_id = FC_NO_LOOP_ID; 4917 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4918 fcport->supported_classes = FC_COS_UNSPECIFIED; 4919 fcport->fp_speed = PORT_SPEED_UNKNOWN; 4920 4921 fcport->disc_state = DSC_DELETED; 4922 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4923 fcport->deleted = QLA_SESS_DELETED; 4924 fcport->login_retry = vha->hw->login_retry_count; 4925 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 4926 fcport->logout_on_delete = 1; 4927 4928 if (!fcport->ct_desc.ct_sns) { 4929 ql_log(ql_log_warn, vha, 0xd049, 4930 "Failed to allocate ct_sns request.\n"); 4931 kfree(fcport); 4932 return NULL; 4933 } 4934 4935 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4936 INIT_WORK(&fcport->free_work, qlt_free_session_done); 4937 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 4938 INIT_LIST_HEAD(&fcport->gnl_entry); 4939 INIT_LIST_HEAD(&fcport->list); 4940 4941 return fcport; 4942 } 4943 4944 void 4945 qla2x00_free_fcport(fc_port_t *fcport) 4946 { 4947 if (fcport->ct_desc.ct_sns) { 4948 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4949 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4950 fcport->ct_desc.ct_sns_dma); 4951 4952 fcport->ct_desc.ct_sns = NULL; 4953 } 4954 list_del(&fcport->list); 4955 qla2x00_clear_loop_id(fcport); 4956 kfree(fcport); 4957 } 4958 4959 /* 4960 * qla2x00_configure_loop 4961 * Updates Fibre Channel Device Database with what is actually on loop. 4962 * 4963 * Input: 4964 * ha = adapter block pointer. 4965 * 4966 * Returns: 4967 * 0 = success. 4968 * 1 = error. 4969 * 2 = database was full and device was not configured. 4970 */ 4971 static int 4972 qla2x00_configure_loop(scsi_qla_host_t *vha) 4973 { 4974 int rval; 4975 unsigned long flags, save_flags; 4976 struct qla_hw_data *ha = vha->hw; 4977 4978 rval = QLA_SUCCESS; 4979 4980 /* Get Initiator ID */ 4981 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4982 rval = qla2x00_configure_hba(vha); 4983 if (rval != QLA_SUCCESS) { 4984 ql_dbg(ql_dbg_disc, vha, 0x2013, 4985 "Unable to configure HBA.\n"); 4986 return (rval); 4987 } 4988 } 4989 4990 save_flags = flags = vha->dpc_flags; 4991 ql_dbg(ql_dbg_disc, vha, 0x2014, 4992 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4993 4994 /* 4995 * If we have both an RSCN and PORT UPDATE pending then handle them 4996 * both at the same time. 4997 */ 4998 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4999 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 5000 5001 qla2x00_get_data_rate(vha); 5002 5003 /* Determine what we need to do */ 5004 if ((ha->current_topology == ISP_CFG_FL || 5005 ha->current_topology == ISP_CFG_F) && 5006 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 5007 5008 set_bit(RSCN_UPDATE, &flags); 5009 clear_bit(LOCAL_LOOP_UPDATE, &flags); 5010 5011 } else if (ha->current_topology == ISP_CFG_NL || 5012 ha->current_topology == ISP_CFG_N) { 5013 clear_bit(RSCN_UPDATE, &flags); 5014 set_bit(LOCAL_LOOP_UPDATE, &flags); 5015 } else if (!vha->flags.online || 5016 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 5017 set_bit(RSCN_UPDATE, &flags); 5018 set_bit(LOCAL_LOOP_UPDATE, &flags); 5019 } 5020 5021 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 5022 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5023 ql_dbg(ql_dbg_disc, vha, 0x2015, 5024 "Loop resync needed, failing.\n"); 5025 rval = QLA_FUNCTION_FAILED; 5026 } else 5027 rval = qla2x00_configure_local_loop(vha); 5028 } 5029 5030 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 5031 if (LOOP_TRANSITION(vha)) { 5032 ql_dbg(ql_dbg_disc, vha, 0x2099, 5033 "Needs RSCN update and loop transition.\n"); 5034 rval = QLA_FUNCTION_FAILED; 5035 } 5036 else 5037 rval = qla2x00_configure_fabric(vha); 5038 } 5039 5040 if (rval == QLA_SUCCESS) { 5041 if (atomic_read(&vha->loop_down_timer) || 5042 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5043 rval = QLA_FUNCTION_FAILED; 5044 } else { 5045 atomic_set(&vha->loop_state, LOOP_READY); 5046 ql_dbg(ql_dbg_disc, vha, 0x2069, 5047 "LOOP READY.\n"); 5048 ha->flags.fw_init_done = 1; 5049 5050 /* 5051 * Process any ATIO queue entries that came in 5052 * while we weren't online. 5053 */ 5054 if (qla_tgt_mode_enabled(vha) || 5055 qla_dual_mode_enabled(vha)) { 5056 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 5057 qlt_24xx_process_atio_queue(vha, 0); 5058 spin_unlock_irqrestore(&ha->tgt.atio_lock, 5059 flags); 5060 } 5061 } 5062 } 5063 5064 if (rval) { 5065 ql_dbg(ql_dbg_disc, vha, 0x206a, 5066 "%s *** FAILED ***.\n", __func__); 5067 } else { 5068 ql_dbg(ql_dbg_disc, vha, 0x206b, 5069 "%s: exiting normally.\n", __func__); 5070 } 5071 5072 /* Restore state if a resync event occurred during processing */ 5073 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5074 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5075 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5076 if (test_bit(RSCN_UPDATE, &save_flags)) { 5077 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5078 } 5079 } 5080 5081 return (rval); 5082 } 5083 5084 /* 5085 * qla2x00_configure_local_loop 5086 * Updates Fibre Channel Device Database with local loop devices. 5087 * 5088 * Input: 5089 * ha = adapter block pointer. 5090 * 5091 * Returns: 5092 * 0 = success. 5093 */ 5094 static int 5095 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5096 { 5097 int rval, rval2; 5098 int found_devs; 5099 int found; 5100 fc_port_t *fcport, *new_fcport; 5101 5102 uint16_t index; 5103 uint16_t entries; 5104 struct gid_list_info *gid; 5105 uint16_t loop_id; 5106 uint8_t domain, area, al_pa; 5107 struct qla_hw_data *ha = vha->hw; 5108 unsigned long flags; 5109 5110 /* Inititae N2N login. */ 5111 if (N2N_TOPO(ha)) { 5112 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 5113 /* borrowing */ 5114 u32 *bp, sz; 5115 5116 memset(ha->init_cb, 0, ha->init_cb_size); 5117 sz = min_t(int, sizeof(struct els_plogi_payload), 5118 ha->init_cb_size); 5119 rval = qla24xx_get_port_login_templ(vha, 5120 ha->init_cb_dma, (void *)ha->init_cb, sz); 5121 if (rval == QLA_SUCCESS) { 5122 __be32 *q = &ha->plogi_els_payld.data[0]; 5123 5124 bp = (uint32_t *)ha->init_cb; 5125 cpu_to_be32_array(q, bp, sz / 4); 5126 5127 memcpy(bp, q, sizeof(ha->plogi_els_payld.data)); 5128 } else { 5129 ql_dbg(ql_dbg_init, vha, 0x00d1, 5130 "PLOGI ELS param read fail.\n"); 5131 goto skip_login; 5132 } 5133 } 5134 5135 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5136 if (fcport->n2n_flag) { 5137 qla24xx_fcport_handle_login(vha, fcport); 5138 return QLA_SUCCESS; 5139 } 5140 } 5141 skip_login: 5142 spin_lock_irqsave(&vha->work_lock, flags); 5143 vha->scan.scan_retry++; 5144 spin_unlock_irqrestore(&vha->work_lock, flags); 5145 5146 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5147 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5148 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5149 } 5150 return QLA_FUNCTION_FAILED; 5151 } 5152 5153 found_devs = 0; 5154 new_fcport = NULL; 5155 entries = MAX_FIBRE_DEVICES_LOOP; 5156 5157 /* Get list of logged in devices. */ 5158 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5159 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5160 &entries); 5161 if (rval != QLA_SUCCESS) 5162 goto err; 5163 5164 ql_dbg(ql_dbg_disc, vha, 0x2011, 5165 "Entries in ID list (%d).\n", entries); 5166 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5167 ha->gid_list, entries * sizeof(*ha->gid_list)); 5168 5169 if (entries == 0) { 5170 spin_lock_irqsave(&vha->work_lock, flags); 5171 vha->scan.scan_retry++; 5172 spin_unlock_irqrestore(&vha->work_lock, flags); 5173 5174 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5175 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5176 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5177 } 5178 } else { 5179 vha->scan.scan_retry = 0; 5180 } 5181 5182 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5183 fcport->scan_state = QLA_FCPORT_SCAN; 5184 } 5185 5186 /* Allocate temporary fcport for any new fcports discovered. */ 5187 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5188 if (new_fcport == NULL) { 5189 ql_log(ql_log_warn, vha, 0x2012, 5190 "Memory allocation failed for fcport.\n"); 5191 rval = QLA_MEMORY_ALLOC_FAILED; 5192 goto err; 5193 } 5194 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5195 5196 /* Add devices to port list. */ 5197 gid = ha->gid_list; 5198 for (index = 0; index < entries; index++) { 5199 domain = gid->domain; 5200 area = gid->area; 5201 al_pa = gid->al_pa; 5202 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5203 loop_id = gid->loop_id_2100; 5204 else 5205 loop_id = le16_to_cpu(gid->loop_id); 5206 gid = (void *)gid + ha->gid_list_info_size; 5207 5208 /* Bypass reserved domain fields. */ 5209 if ((domain & 0xf0) == 0xf0) 5210 continue; 5211 5212 /* Bypass if not same domain and area of adapter. */ 5213 if (area && domain && ((area != vha->d_id.b.area) || 5214 (domain != vha->d_id.b.domain)) && 5215 (ha->current_topology == ISP_CFG_NL)) 5216 continue; 5217 5218 5219 /* Bypass invalid local loop ID. */ 5220 if (loop_id > LAST_LOCAL_LOOP_ID) 5221 continue; 5222 5223 memset(new_fcport->port_name, 0, WWN_SIZE); 5224 5225 /* Fill in member data. */ 5226 new_fcport->d_id.b.domain = domain; 5227 new_fcport->d_id.b.area = area; 5228 new_fcport->d_id.b.al_pa = al_pa; 5229 new_fcport->loop_id = loop_id; 5230 new_fcport->scan_state = QLA_FCPORT_FOUND; 5231 5232 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5233 if (rval2 != QLA_SUCCESS) { 5234 ql_dbg(ql_dbg_disc, vha, 0x2097, 5235 "Failed to retrieve fcport information " 5236 "-- get_port_database=%x, loop_id=0x%04x.\n", 5237 rval2, new_fcport->loop_id); 5238 /* Skip retry if N2N */ 5239 if (ha->current_topology != ISP_CFG_N) { 5240 ql_dbg(ql_dbg_disc, vha, 0x2105, 5241 "Scheduling resync.\n"); 5242 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5243 continue; 5244 } 5245 } 5246 5247 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5248 /* Check for matching device in port list. */ 5249 found = 0; 5250 fcport = NULL; 5251 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5252 if (memcmp(new_fcport->port_name, fcport->port_name, 5253 WWN_SIZE)) 5254 continue; 5255 5256 fcport->flags &= ~FCF_FABRIC_DEVICE; 5257 fcport->loop_id = new_fcport->loop_id; 5258 fcport->port_type = new_fcport->port_type; 5259 fcport->d_id.b24 = new_fcport->d_id.b24; 5260 memcpy(fcport->node_name, new_fcport->node_name, 5261 WWN_SIZE); 5262 fcport->scan_state = QLA_FCPORT_FOUND; 5263 found++; 5264 break; 5265 } 5266 5267 if (!found) { 5268 /* New device, add to fcports list. */ 5269 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5270 5271 /* Allocate a new replacement fcport. */ 5272 fcport = new_fcport; 5273 5274 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5275 5276 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5277 5278 if (new_fcport == NULL) { 5279 ql_log(ql_log_warn, vha, 0xd031, 5280 "Failed to allocate memory for fcport.\n"); 5281 rval = QLA_MEMORY_ALLOC_FAILED; 5282 goto err; 5283 } 5284 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5285 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5286 } 5287 5288 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5289 5290 /* Base iIDMA settings on HBA port speed. */ 5291 fcport->fp_speed = ha->link_data_rate; 5292 5293 found_devs++; 5294 } 5295 5296 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5297 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5298 break; 5299 5300 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5301 if ((qla_dual_mode_enabled(vha) || 5302 qla_ini_mode_enabled(vha)) && 5303 atomic_read(&fcport->state) == FCS_ONLINE) { 5304 qla2x00_mark_device_lost(vha, fcport, 5305 ql2xplogiabsentdevice); 5306 if (fcport->loop_id != FC_NO_LOOP_ID && 5307 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5308 fcport->port_type != FCT_INITIATOR && 5309 fcport->port_type != FCT_BROADCAST) { 5310 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5311 "%s %d %8phC post del sess\n", 5312 __func__, __LINE__, 5313 fcport->port_name); 5314 5315 qlt_schedule_sess_for_deletion(fcport); 5316 continue; 5317 } 5318 } 5319 } 5320 5321 if (fcport->scan_state == QLA_FCPORT_FOUND) 5322 qla24xx_fcport_handle_login(vha, fcport); 5323 } 5324 5325 qla2x00_free_fcport(new_fcport); 5326 5327 return rval; 5328 5329 err: 5330 ql_dbg(ql_dbg_disc, vha, 0x2098, 5331 "Configure local loop error exit: rval=%x.\n", rval); 5332 return rval; 5333 } 5334 5335 static void 5336 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5337 { 5338 int rval; 5339 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5340 struct qla_hw_data *ha = vha->hw; 5341 5342 if (!IS_IIDMA_CAPABLE(ha)) 5343 return; 5344 5345 if (atomic_read(&fcport->state) != FCS_ONLINE) 5346 return; 5347 5348 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5349 fcport->fp_speed > ha->link_data_rate || 5350 !ha->flags.gpsc_supported) 5351 return; 5352 5353 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5354 mb); 5355 if (rval != QLA_SUCCESS) { 5356 ql_dbg(ql_dbg_disc, vha, 0x2004, 5357 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5358 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5359 } else { 5360 ql_dbg(ql_dbg_disc, vha, 0x2005, 5361 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5362 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5363 fcport->fp_speed, fcport->port_name); 5364 } 5365 } 5366 5367 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5368 { 5369 qla2x00_iidma_fcport(vha, fcport); 5370 qla24xx_update_fcport_fcp_prio(vha, fcport); 5371 } 5372 5373 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5374 { 5375 struct qla_work_evt *e; 5376 5377 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5378 if (!e) 5379 return QLA_FUNCTION_FAILED; 5380 5381 e->u.fcport.fcport = fcport; 5382 return qla2x00_post_work(vha, e); 5383 } 5384 5385 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5386 static void 5387 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5388 { 5389 struct fc_rport_identifiers rport_ids; 5390 struct fc_rport *rport; 5391 unsigned long flags; 5392 5393 if (atomic_read(&fcport->state) == FCS_ONLINE) 5394 return; 5395 5396 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5397 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5398 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5399 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5400 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5401 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5402 if (!rport) { 5403 ql_log(ql_log_warn, vha, 0x2006, 5404 "Unable to allocate fc remote port.\n"); 5405 return; 5406 } 5407 5408 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5409 *((fc_port_t **)rport->dd_data) = fcport; 5410 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5411 5412 rport->supported_classes = fcport->supported_classes; 5413 5414 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 5415 if (fcport->port_type == FCT_INITIATOR) 5416 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 5417 if (fcport->port_type == FCT_TARGET) 5418 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 5419 if (fcport->port_type & FCT_NVME_INITIATOR) 5420 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 5421 if (fcport->port_type & FCT_NVME_TARGET) 5422 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 5423 if (fcport->port_type & FCT_NVME_DISCOVERY) 5424 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 5425 5426 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5427 "%s %8phN. rport %p is %s mode\n", 5428 __func__, fcport->port_name, rport, 5429 (fcport->port_type == FCT_TARGET) ? "tgt" : 5430 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5431 5432 fc_remote_port_rolechg(rport, rport_ids.roles); 5433 } 5434 5435 /* 5436 * qla2x00_update_fcport 5437 * Updates device on list. 5438 * 5439 * Input: 5440 * ha = adapter block pointer. 5441 * fcport = port structure pointer. 5442 * 5443 * Return: 5444 * 0 - Success 5445 * BIT_0 - error 5446 * 5447 * Context: 5448 * Kernel context. 5449 */ 5450 void 5451 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5452 { 5453 if (IS_SW_RESV_ADDR(fcport->d_id)) 5454 return; 5455 5456 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5457 __func__, fcport->port_name); 5458 5459 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT); 5460 fcport->login_retry = vha->hw->login_retry_count; 5461 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5462 fcport->deleted = 0; 5463 if (vha->hw->current_topology == ISP_CFG_NL) 5464 fcport->logout_on_delete = 0; 5465 else 5466 fcport->logout_on_delete = 1; 5467 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5468 5469 switch (vha->hw->current_topology) { 5470 case ISP_CFG_N: 5471 case ISP_CFG_NL: 5472 fcport->keep_nport_handle = 1; 5473 break; 5474 default: 5475 break; 5476 } 5477 5478 qla2x00_iidma_fcport(vha, fcport); 5479 5480 if (NVME_TARGET(vha->hw, fcport)) { 5481 qla_nvme_register_remote(vha, fcport); 5482 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5483 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5484 return; 5485 } 5486 5487 qla24xx_update_fcport_fcp_prio(vha, fcport); 5488 5489 switch (vha->host->active_mode) { 5490 case MODE_INITIATOR: 5491 qla2x00_reg_remote_port(vha, fcport); 5492 break; 5493 case MODE_TARGET: 5494 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5495 !vha->vha_tgt.qla_tgt->tgt_stopped) 5496 qlt_fc_port_added(vha, fcport); 5497 break; 5498 case MODE_DUAL: 5499 qla2x00_reg_remote_port(vha, fcport); 5500 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5501 !vha->vha_tgt.qla_tgt->tgt_stopped) 5502 qlt_fc_port_added(vha, fcport); 5503 break; 5504 default: 5505 break; 5506 } 5507 5508 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5509 5510 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5511 if (fcport->id_changed) { 5512 fcport->id_changed = 0; 5513 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5514 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5515 __func__, __LINE__, fcport->port_name, 5516 vha->fcport_count); 5517 qla24xx_post_gfpnid_work(vha, fcport); 5518 } else { 5519 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5520 "%s %d %8phC post gpsc fcp_cnt %d\n", 5521 __func__, __LINE__, fcport->port_name, 5522 vha->fcport_count); 5523 qla24xx_post_gpsc_work(vha, fcport); 5524 } 5525 } 5526 5527 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5528 } 5529 5530 void qla_register_fcport_fn(struct work_struct *work) 5531 { 5532 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5533 u32 rscn_gen = fcport->rscn_gen; 5534 u16 data[2]; 5535 5536 if (IS_SW_RESV_ADDR(fcport->d_id)) 5537 return; 5538 5539 qla2x00_update_fcport(fcport->vha, fcport); 5540 5541 if (rscn_gen != fcport->rscn_gen) { 5542 /* RSCN(s) came in while registration */ 5543 switch (fcport->next_disc_state) { 5544 case DSC_DELETE_PEND: 5545 qlt_schedule_sess_for_deletion(fcport); 5546 break; 5547 case DSC_ADISC: 5548 data[0] = data[1] = 0; 5549 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5550 data); 5551 break; 5552 default: 5553 break; 5554 } 5555 } 5556 } 5557 5558 /* 5559 * qla2x00_configure_fabric 5560 * Setup SNS devices with loop ID's. 5561 * 5562 * Input: 5563 * ha = adapter block pointer. 5564 * 5565 * Returns: 5566 * 0 = success. 5567 * BIT_0 = error 5568 */ 5569 static int 5570 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5571 { 5572 int rval; 5573 fc_port_t *fcport; 5574 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5575 uint16_t loop_id; 5576 LIST_HEAD(new_fcports); 5577 struct qla_hw_data *ha = vha->hw; 5578 int discovery_gen; 5579 5580 /* If FL port exists, then SNS is present */ 5581 if (IS_FWI2_CAPABLE(ha)) 5582 loop_id = NPH_F_PORT; 5583 else 5584 loop_id = SNS_FL_PORT; 5585 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5586 if (rval != QLA_SUCCESS) { 5587 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5588 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5589 5590 vha->device_flags &= ~SWITCH_FOUND; 5591 return (QLA_SUCCESS); 5592 } 5593 vha->device_flags |= SWITCH_FOUND; 5594 5595 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0); 5596 if (rval != QLA_SUCCESS) 5597 ql_dbg(ql_dbg_disc, vha, 0x20ff, 5598 "Failed to get Fabric Port Name\n"); 5599 5600 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5601 rval = qla2x00_send_change_request(vha, 0x3, 0); 5602 if (rval != QLA_SUCCESS) 5603 ql_log(ql_log_warn, vha, 0x121, 5604 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5605 rval); 5606 } 5607 5608 do { 5609 qla2x00_mgmt_svr_login(vha); 5610 5611 /* Ensure we are logged into the SNS. */ 5612 loop_id = NPH_SNS_LID(ha); 5613 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5614 0xfc, mb, BIT_1|BIT_0); 5615 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5616 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5617 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5618 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5619 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5620 return rval; 5621 } 5622 5623 /* FDMI support. */ 5624 if (ql2xfdmienable && 5625 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5626 qla2x00_fdmi_register(vha); 5627 5628 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5629 if (qla2x00_rft_id(vha)) { 5630 /* EMPTY */ 5631 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5632 "Register FC-4 TYPE failed.\n"); 5633 if (test_bit(LOOP_RESYNC_NEEDED, 5634 &vha->dpc_flags)) 5635 break; 5636 } 5637 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5638 /* EMPTY */ 5639 ql_dbg(ql_dbg_disc, vha, 0x209a, 5640 "Register FC-4 Features failed.\n"); 5641 if (test_bit(LOOP_RESYNC_NEEDED, 5642 &vha->dpc_flags)) 5643 break; 5644 } 5645 if (vha->flags.nvme_enabled) { 5646 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5647 ql_dbg(ql_dbg_disc, vha, 0x2049, 5648 "Register NVME FC Type Features failed.\n"); 5649 } 5650 } 5651 if (qla2x00_rnn_id(vha)) { 5652 /* EMPTY */ 5653 ql_dbg(ql_dbg_disc, vha, 0x2104, 5654 "Register Node Name failed.\n"); 5655 if (test_bit(LOOP_RESYNC_NEEDED, 5656 &vha->dpc_flags)) 5657 break; 5658 } else if (qla2x00_rsnn_nn(vha)) { 5659 /* EMPTY */ 5660 ql_dbg(ql_dbg_disc, vha, 0x209b, 5661 "Register Symbolic Node Name failed.\n"); 5662 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5663 break; 5664 } 5665 } 5666 5667 5668 /* Mark the time right before querying FW for connected ports. 5669 * This process is long, asynchronous and by the time it's done, 5670 * collected information might not be accurate anymore. E.g. 5671 * disconnected port might have re-connected and a brand new 5672 * session has been created. In this case session's generation 5673 * will be newer than discovery_gen. */ 5674 qlt_do_generation_tick(vha, &discovery_gen); 5675 5676 if (USE_ASYNC_SCAN(ha)) { 5677 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5678 NULL); 5679 if (rval) 5680 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5681 } else { 5682 list_for_each_entry(fcport, &vha->vp_fcports, list) 5683 fcport->scan_state = QLA_FCPORT_SCAN; 5684 5685 rval = qla2x00_find_all_fabric_devs(vha); 5686 } 5687 if (rval != QLA_SUCCESS) 5688 break; 5689 } while (0); 5690 5691 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5692 qla_nvme_register_hba(vha); 5693 5694 if (rval) 5695 ql_dbg(ql_dbg_disc, vha, 0x2068, 5696 "Configure fabric error exit rval=%d.\n", rval); 5697 5698 return (rval); 5699 } 5700 5701 /* 5702 * qla2x00_find_all_fabric_devs 5703 * 5704 * Input: 5705 * ha = adapter block pointer. 5706 * dev = database device entry pointer. 5707 * 5708 * Returns: 5709 * 0 = success. 5710 * 5711 * Context: 5712 * Kernel context. 5713 */ 5714 static int 5715 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5716 { 5717 int rval; 5718 uint16_t loop_id; 5719 fc_port_t *fcport, *new_fcport; 5720 int found; 5721 5722 sw_info_t *swl; 5723 int swl_idx; 5724 int first_dev, last_dev; 5725 port_id_t wrap = {}, nxt_d_id; 5726 struct qla_hw_data *ha = vha->hw; 5727 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5728 unsigned long flags; 5729 5730 rval = QLA_SUCCESS; 5731 5732 /* Try GID_PT to get device list, else GAN. */ 5733 if (!ha->swl) 5734 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5735 GFP_KERNEL); 5736 swl = ha->swl; 5737 if (!swl) { 5738 /*EMPTY*/ 5739 ql_dbg(ql_dbg_disc, vha, 0x209c, 5740 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5741 } else { 5742 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5743 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5744 swl = NULL; 5745 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5746 return rval; 5747 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5748 swl = NULL; 5749 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5750 return rval; 5751 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5752 swl = NULL; 5753 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5754 return rval; 5755 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5756 swl = NULL; 5757 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5758 return rval; 5759 } 5760 5761 /* If other queries succeeded probe for FC-4 type */ 5762 if (swl) { 5763 qla2x00_gff_id(vha, swl); 5764 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5765 return rval; 5766 } 5767 } 5768 swl_idx = 0; 5769 5770 /* Allocate temporary fcport for any new fcports discovered. */ 5771 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5772 if (new_fcport == NULL) { 5773 ql_log(ql_log_warn, vha, 0x209d, 5774 "Failed to allocate memory for fcport.\n"); 5775 return (QLA_MEMORY_ALLOC_FAILED); 5776 } 5777 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5778 /* Set start port ID scan at adapter ID. */ 5779 first_dev = 1; 5780 last_dev = 0; 5781 5782 /* Starting free loop ID. */ 5783 loop_id = ha->min_external_loopid; 5784 for (; loop_id <= ha->max_loop_id; loop_id++) { 5785 if (qla2x00_is_reserved_id(vha, loop_id)) 5786 continue; 5787 5788 if (ha->current_topology == ISP_CFG_FL && 5789 (atomic_read(&vha->loop_down_timer) || 5790 LOOP_TRANSITION(vha))) { 5791 atomic_set(&vha->loop_down_timer, 0); 5792 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5793 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5794 break; 5795 } 5796 5797 if (swl != NULL) { 5798 if (last_dev) { 5799 wrap.b24 = new_fcport->d_id.b24; 5800 } else { 5801 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5802 memcpy(new_fcport->node_name, 5803 swl[swl_idx].node_name, WWN_SIZE); 5804 memcpy(new_fcport->port_name, 5805 swl[swl_idx].port_name, WWN_SIZE); 5806 memcpy(new_fcport->fabric_port_name, 5807 swl[swl_idx].fabric_port_name, WWN_SIZE); 5808 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5809 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5810 5811 new_fcport->nvme_flag = 0; 5812 if (vha->flags.nvme_enabled && 5813 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 5814 ql_log(ql_log_info, vha, 0x2131, 5815 "FOUND: NVME port %8phC as FC Type 28h\n", 5816 new_fcport->port_name); 5817 } 5818 5819 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5820 last_dev = 1; 5821 } 5822 swl_idx++; 5823 } 5824 } else { 5825 /* Send GA_NXT to the switch */ 5826 rval = qla2x00_ga_nxt(vha, new_fcport); 5827 if (rval != QLA_SUCCESS) { 5828 ql_log(ql_log_warn, vha, 0x209e, 5829 "SNS scan failed -- assuming " 5830 "zero-entry result.\n"); 5831 rval = QLA_SUCCESS; 5832 break; 5833 } 5834 } 5835 5836 /* If wrap on switch device list, exit. */ 5837 if (first_dev) { 5838 wrap.b24 = new_fcport->d_id.b24; 5839 first_dev = 0; 5840 } else if (new_fcport->d_id.b24 == wrap.b24) { 5841 ql_dbg(ql_dbg_disc, vha, 0x209f, 5842 "Device wrap (%02x%02x%02x).\n", 5843 new_fcport->d_id.b.domain, 5844 new_fcport->d_id.b.area, 5845 new_fcport->d_id.b.al_pa); 5846 break; 5847 } 5848 5849 /* Bypass if same physical adapter. */ 5850 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5851 continue; 5852 5853 /* Bypass virtual ports of the same host. */ 5854 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5855 continue; 5856 5857 /* Bypass if same domain and area of adapter. */ 5858 if (((new_fcport->d_id.b24 & 0xffff00) == 5859 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5860 ISP_CFG_FL) 5861 continue; 5862 5863 /* Bypass reserved domain fields. */ 5864 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5865 continue; 5866 5867 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5868 if (ql2xgffidenable && 5869 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 5870 new_fcport->fc4_type != 0)) 5871 continue; 5872 5873 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5874 5875 /* Locate matching device in database. */ 5876 found = 0; 5877 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5878 if (memcmp(new_fcport->port_name, fcport->port_name, 5879 WWN_SIZE)) 5880 continue; 5881 5882 fcport->scan_state = QLA_FCPORT_FOUND; 5883 5884 found++; 5885 5886 /* Update port state. */ 5887 memcpy(fcport->fabric_port_name, 5888 new_fcport->fabric_port_name, WWN_SIZE); 5889 fcport->fp_speed = new_fcport->fp_speed; 5890 5891 /* 5892 * If address the same and state FCS_ONLINE 5893 * (or in target mode), nothing changed. 5894 */ 5895 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5896 (atomic_read(&fcport->state) == FCS_ONLINE || 5897 (vha->host->active_mode == MODE_TARGET))) { 5898 break; 5899 } 5900 5901 /* 5902 * If device was not a fabric device before. 5903 */ 5904 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5905 fcport->d_id.b24 = new_fcport->d_id.b24; 5906 qla2x00_clear_loop_id(fcport); 5907 fcport->flags |= (FCF_FABRIC_DEVICE | 5908 FCF_LOGIN_NEEDED); 5909 break; 5910 } 5911 5912 /* 5913 * Port ID changed or device was marked to be updated; 5914 * Log it out if still logged in and mark it for 5915 * relogin later. 5916 */ 5917 if (qla_tgt_mode_enabled(base_vha)) { 5918 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5919 "port changed FC ID, %8phC" 5920 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5921 fcport->port_name, 5922 fcport->d_id.b.domain, 5923 fcport->d_id.b.area, 5924 fcport->d_id.b.al_pa, 5925 fcport->loop_id, 5926 new_fcport->d_id.b.domain, 5927 new_fcport->d_id.b.area, 5928 new_fcport->d_id.b.al_pa); 5929 fcport->d_id.b24 = new_fcport->d_id.b24; 5930 break; 5931 } 5932 5933 fcport->d_id.b24 = new_fcport->d_id.b24; 5934 fcport->flags |= FCF_LOGIN_NEEDED; 5935 break; 5936 } 5937 5938 if (NVME_TARGET(vha->hw, fcport)) { 5939 if (fcport->disc_state == DSC_DELETE_PEND) { 5940 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 5941 vha->fcport_count--; 5942 fcport->login_succ = 0; 5943 } 5944 } 5945 5946 if (found) { 5947 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5948 continue; 5949 } 5950 /* If device was not in our fcports list, then add it. */ 5951 new_fcport->scan_state = QLA_FCPORT_FOUND; 5952 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5953 5954 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5955 5956 5957 /* Allocate a new replacement fcport. */ 5958 nxt_d_id.b24 = new_fcport->d_id.b24; 5959 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5960 if (new_fcport == NULL) { 5961 ql_log(ql_log_warn, vha, 0xd032, 5962 "Memory allocation failed for fcport.\n"); 5963 return (QLA_MEMORY_ALLOC_FAILED); 5964 } 5965 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5966 new_fcport->d_id.b24 = nxt_d_id.b24; 5967 } 5968 5969 qla2x00_free_fcport(new_fcport); 5970 5971 /* 5972 * Logout all previous fabric dev marked lost, except FCP2 devices. 5973 */ 5974 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5975 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5976 break; 5977 5978 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 5979 continue; 5980 5981 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5982 if ((qla_dual_mode_enabled(vha) || 5983 qla_ini_mode_enabled(vha)) && 5984 atomic_read(&fcport->state) == FCS_ONLINE) { 5985 qla2x00_mark_device_lost(vha, fcport, 5986 ql2xplogiabsentdevice); 5987 if (fcport->loop_id != FC_NO_LOOP_ID && 5988 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5989 fcport->port_type != FCT_INITIATOR && 5990 fcport->port_type != FCT_BROADCAST) { 5991 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5992 "%s %d %8phC post del sess\n", 5993 __func__, __LINE__, 5994 fcport->port_name); 5995 qlt_schedule_sess_for_deletion(fcport); 5996 continue; 5997 } 5998 } 5999 } 6000 6001 if (fcport->scan_state == QLA_FCPORT_FOUND && 6002 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 6003 qla24xx_fcport_handle_login(vha, fcport); 6004 } 6005 return (rval); 6006 } 6007 6008 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 6009 int 6010 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 6011 { 6012 int loop_id = FC_NO_LOOP_ID; 6013 int lid = NPH_MGMT_SERVER - vha->vp_idx; 6014 unsigned long flags; 6015 struct qla_hw_data *ha = vha->hw; 6016 6017 if (vha->vp_idx == 0) { 6018 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 6019 return NPH_MGMT_SERVER; 6020 } 6021 6022 /* pick id from high and work down to low */ 6023 spin_lock_irqsave(&ha->vport_slock, flags); 6024 for (; lid > 0; lid--) { 6025 if (!test_bit(lid, vha->hw->loop_id_map)) { 6026 set_bit(lid, vha->hw->loop_id_map); 6027 loop_id = lid; 6028 break; 6029 } 6030 } 6031 spin_unlock_irqrestore(&ha->vport_slock, flags); 6032 6033 return loop_id; 6034 } 6035 6036 /* 6037 * qla2x00_fabric_login 6038 * Issue fabric login command. 6039 * 6040 * Input: 6041 * ha = adapter block pointer. 6042 * device = pointer to FC device type structure. 6043 * 6044 * Returns: 6045 * 0 - Login successfully 6046 * 1 - Login failed 6047 * 2 - Initiator device 6048 * 3 - Fatal error 6049 */ 6050 int 6051 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 6052 uint16_t *next_loopid) 6053 { 6054 int rval; 6055 int retry; 6056 uint16_t tmp_loopid; 6057 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6058 struct qla_hw_data *ha = vha->hw; 6059 6060 retry = 0; 6061 tmp_loopid = 0; 6062 6063 for (;;) { 6064 ql_dbg(ql_dbg_disc, vha, 0x2000, 6065 "Trying Fabric Login w/loop id 0x%04x for port " 6066 "%02x%02x%02x.\n", 6067 fcport->loop_id, fcport->d_id.b.domain, 6068 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6069 6070 /* Login fcport on switch. */ 6071 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 6072 fcport->d_id.b.domain, fcport->d_id.b.area, 6073 fcport->d_id.b.al_pa, mb, BIT_0); 6074 if (rval != QLA_SUCCESS) { 6075 return rval; 6076 } 6077 if (mb[0] == MBS_PORT_ID_USED) { 6078 /* 6079 * Device has another loop ID. The firmware team 6080 * recommends the driver perform an implicit login with 6081 * the specified ID again. The ID we just used is save 6082 * here so we return with an ID that can be tried by 6083 * the next login. 6084 */ 6085 retry++; 6086 tmp_loopid = fcport->loop_id; 6087 fcport->loop_id = mb[1]; 6088 6089 ql_dbg(ql_dbg_disc, vha, 0x2001, 6090 "Fabric Login: port in use - next loop " 6091 "id=0x%04x, port id= %02x%02x%02x.\n", 6092 fcport->loop_id, fcport->d_id.b.domain, 6093 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6094 6095 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6096 /* 6097 * Login succeeded. 6098 */ 6099 if (retry) { 6100 /* A retry occurred before. */ 6101 *next_loopid = tmp_loopid; 6102 } else { 6103 /* 6104 * No retry occurred before. Just increment the 6105 * ID value for next login. 6106 */ 6107 *next_loopid = (fcport->loop_id + 1); 6108 } 6109 6110 if (mb[1] & BIT_0) { 6111 fcport->port_type = FCT_INITIATOR; 6112 } else { 6113 fcport->port_type = FCT_TARGET; 6114 if (mb[1] & BIT_1) { 6115 fcport->flags |= FCF_FCP2_DEVICE; 6116 } 6117 } 6118 6119 if (mb[10] & BIT_0) 6120 fcport->supported_classes |= FC_COS_CLASS2; 6121 if (mb[10] & BIT_1) 6122 fcport->supported_classes |= FC_COS_CLASS3; 6123 6124 if (IS_FWI2_CAPABLE(ha)) { 6125 if (mb[10] & BIT_7) 6126 fcport->flags |= 6127 FCF_CONF_COMP_SUPPORTED; 6128 } 6129 6130 rval = QLA_SUCCESS; 6131 break; 6132 } else if (mb[0] == MBS_LOOP_ID_USED) { 6133 /* 6134 * Loop ID already used, try next loop ID. 6135 */ 6136 fcport->loop_id++; 6137 rval = qla2x00_find_new_loop_id(vha, fcport); 6138 if (rval != QLA_SUCCESS) { 6139 /* Ran out of loop IDs to use */ 6140 break; 6141 } 6142 } else if (mb[0] == MBS_COMMAND_ERROR) { 6143 /* 6144 * Firmware possibly timed out during login. If NO 6145 * retries are left to do then the device is declared 6146 * dead. 6147 */ 6148 *next_loopid = fcport->loop_id; 6149 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6150 fcport->d_id.b.domain, fcport->d_id.b.area, 6151 fcport->d_id.b.al_pa); 6152 qla2x00_mark_device_lost(vha, fcport, 1); 6153 6154 rval = 1; 6155 break; 6156 } else { 6157 /* 6158 * unrecoverable / not handled error 6159 */ 6160 ql_dbg(ql_dbg_disc, vha, 0x2002, 6161 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6162 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6163 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6164 fcport->loop_id, jiffies); 6165 6166 *next_loopid = fcport->loop_id; 6167 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6168 fcport->d_id.b.domain, fcport->d_id.b.area, 6169 fcport->d_id.b.al_pa); 6170 qla2x00_clear_loop_id(fcport); 6171 fcport->login_retry = 0; 6172 6173 rval = 3; 6174 break; 6175 } 6176 } 6177 6178 return (rval); 6179 } 6180 6181 /* 6182 * qla2x00_local_device_login 6183 * Issue local device login command. 6184 * 6185 * Input: 6186 * ha = adapter block pointer. 6187 * loop_id = loop id of device to login to. 6188 * 6189 * Returns (Where's the #define!!!!): 6190 * 0 - Login successfully 6191 * 1 - Login failed 6192 * 3 - Fatal error 6193 */ 6194 int 6195 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6196 { 6197 int rval; 6198 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6199 6200 memset(mb, 0, sizeof(mb)); 6201 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6202 if (rval == QLA_SUCCESS) { 6203 /* Interrogate mailbox registers for any errors */ 6204 if (mb[0] == MBS_COMMAND_ERROR) 6205 rval = 1; 6206 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6207 /* device not in PCB table */ 6208 rval = 3; 6209 } 6210 6211 return (rval); 6212 } 6213 6214 /* 6215 * qla2x00_loop_resync 6216 * Resync with fibre channel devices. 6217 * 6218 * Input: 6219 * ha = adapter block pointer. 6220 * 6221 * Returns: 6222 * 0 = success 6223 */ 6224 int 6225 qla2x00_loop_resync(scsi_qla_host_t *vha) 6226 { 6227 int rval = QLA_SUCCESS; 6228 uint32_t wait_time; 6229 6230 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6231 if (vha->flags.online) { 6232 if (!(rval = qla2x00_fw_ready(vha))) { 6233 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6234 wait_time = 256; 6235 do { 6236 if (!IS_QLAFX00(vha->hw)) { 6237 /* 6238 * Issue a marker after FW becomes 6239 * ready. 6240 */ 6241 qla2x00_marker(vha, vha->hw->base_qpair, 6242 0, 0, MK_SYNC_ALL); 6243 vha->marker_needed = 0; 6244 } 6245 6246 /* Remap devices on Loop. */ 6247 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6248 6249 if (IS_QLAFX00(vha->hw)) 6250 qlafx00_configure_devices(vha); 6251 else 6252 qla2x00_configure_loop(vha); 6253 6254 wait_time--; 6255 } while (!atomic_read(&vha->loop_down_timer) && 6256 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6257 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6258 &vha->dpc_flags))); 6259 } 6260 } 6261 6262 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6263 return (QLA_FUNCTION_FAILED); 6264 6265 if (rval) 6266 ql_dbg(ql_dbg_disc, vha, 0x206c, 6267 "%s *** FAILED ***.\n", __func__); 6268 6269 return (rval); 6270 } 6271 6272 /* 6273 * qla2x00_perform_loop_resync 6274 * Description: This function will set the appropriate flags and call 6275 * qla2x00_loop_resync. If successful loop will be resynced 6276 * Arguments : scsi_qla_host_t pointer 6277 * returm : Success or Failure 6278 */ 6279 6280 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6281 { 6282 int32_t rval = 0; 6283 6284 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6285 /*Configure the flags so that resync happens properly*/ 6286 atomic_set(&ha->loop_down_timer, 0); 6287 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6288 atomic_set(&ha->loop_state, LOOP_UP); 6289 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6290 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6291 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6292 6293 rval = qla2x00_loop_resync(ha); 6294 } else 6295 atomic_set(&ha->loop_state, LOOP_DEAD); 6296 6297 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6298 } 6299 6300 return rval; 6301 } 6302 6303 void 6304 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6305 { 6306 fc_port_t *fcport; 6307 struct scsi_qla_host *vha; 6308 struct qla_hw_data *ha = base_vha->hw; 6309 unsigned long flags; 6310 6311 spin_lock_irqsave(&ha->vport_slock, flags); 6312 /* Go with deferred removal of rport references. */ 6313 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6314 atomic_inc(&vha->vref_count); 6315 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6316 if (fcport->drport && 6317 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6318 spin_unlock_irqrestore(&ha->vport_slock, flags); 6319 qla2x00_rport_del(fcport); 6320 6321 spin_lock_irqsave(&ha->vport_slock, flags); 6322 } 6323 } 6324 atomic_dec(&vha->vref_count); 6325 wake_up(&vha->vref_waitq); 6326 } 6327 spin_unlock_irqrestore(&ha->vport_slock, flags); 6328 } 6329 6330 /* Assumes idc_lock always held on entry */ 6331 void 6332 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6333 { 6334 struct qla_hw_data *ha = vha->hw; 6335 uint32_t drv_presence, drv_presence_mask; 6336 uint32_t dev_part_info1, dev_part_info2, class_type; 6337 uint32_t class_type_mask = 0x3; 6338 uint16_t fcoe_other_function = 0xffff, i; 6339 6340 if (IS_QLA8044(ha)) { 6341 drv_presence = qla8044_rd_direct(vha, 6342 QLA8044_CRB_DRV_ACTIVE_INDEX); 6343 dev_part_info1 = qla8044_rd_direct(vha, 6344 QLA8044_CRB_DEV_PART_INFO_INDEX); 6345 dev_part_info2 = qla8044_rd_direct(vha, 6346 QLA8044_CRB_DEV_PART_INFO2); 6347 } else { 6348 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6349 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6350 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6351 } 6352 for (i = 0; i < 8; i++) { 6353 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6354 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6355 (i != ha->portnum)) { 6356 fcoe_other_function = i; 6357 break; 6358 } 6359 } 6360 if (fcoe_other_function == 0xffff) { 6361 for (i = 0; i < 8; i++) { 6362 class_type = ((dev_part_info2 >> (i * 4)) & 6363 class_type_mask); 6364 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6365 ((i + 8) != ha->portnum)) { 6366 fcoe_other_function = i + 8; 6367 break; 6368 } 6369 } 6370 } 6371 /* 6372 * Prepare drv-presence mask based on fcoe functions present. 6373 * However consider only valid physical fcoe function numbers (0-15). 6374 */ 6375 drv_presence_mask = ~((1 << (ha->portnum)) | 6376 ((fcoe_other_function == 0xffff) ? 6377 0 : (1 << (fcoe_other_function)))); 6378 6379 /* We are the reset owner iff: 6380 * - No other protocol drivers present. 6381 * - This is the lowest among fcoe functions. */ 6382 if (!(drv_presence & drv_presence_mask) && 6383 (ha->portnum < fcoe_other_function)) { 6384 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6385 "This host is Reset owner.\n"); 6386 ha->flags.nic_core_reset_owner = 1; 6387 } 6388 } 6389 6390 static int 6391 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6392 { 6393 int rval = QLA_SUCCESS; 6394 struct qla_hw_data *ha = vha->hw; 6395 uint32_t drv_ack; 6396 6397 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6398 if (rval == QLA_SUCCESS) { 6399 drv_ack |= (1 << ha->portnum); 6400 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6401 } 6402 6403 return rval; 6404 } 6405 6406 static int 6407 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6408 { 6409 int rval = QLA_SUCCESS; 6410 struct qla_hw_data *ha = vha->hw; 6411 uint32_t drv_ack; 6412 6413 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6414 if (rval == QLA_SUCCESS) { 6415 drv_ack &= ~(1 << ha->portnum); 6416 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6417 } 6418 6419 return rval; 6420 } 6421 6422 static const char * 6423 qla83xx_dev_state_to_string(uint32_t dev_state) 6424 { 6425 switch (dev_state) { 6426 case QLA8XXX_DEV_COLD: 6427 return "COLD/RE-INIT"; 6428 case QLA8XXX_DEV_INITIALIZING: 6429 return "INITIALIZING"; 6430 case QLA8XXX_DEV_READY: 6431 return "READY"; 6432 case QLA8XXX_DEV_NEED_RESET: 6433 return "NEED RESET"; 6434 case QLA8XXX_DEV_NEED_QUIESCENT: 6435 return "NEED QUIESCENT"; 6436 case QLA8XXX_DEV_FAILED: 6437 return "FAILED"; 6438 case QLA8XXX_DEV_QUIESCENT: 6439 return "QUIESCENT"; 6440 default: 6441 return "Unknown"; 6442 } 6443 } 6444 6445 /* Assumes idc-lock always held on entry */ 6446 void 6447 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6448 { 6449 struct qla_hw_data *ha = vha->hw; 6450 uint32_t idc_audit_reg = 0, duration_secs = 0; 6451 6452 switch (audit_type) { 6453 case IDC_AUDIT_TIMESTAMP: 6454 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6455 idc_audit_reg = (ha->portnum) | 6456 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6457 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6458 break; 6459 6460 case IDC_AUDIT_COMPLETION: 6461 duration_secs = ((jiffies_to_msecs(jiffies) - 6462 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6463 idc_audit_reg = (ha->portnum) | 6464 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6465 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6466 break; 6467 6468 default: 6469 ql_log(ql_log_warn, vha, 0xb078, 6470 "Invalid audit type specified.\n"); 6471 break; 6472 } 6473 } 6474 6475 /* Assumes idc_lock always held on entry */ 6476 static int 6477 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6478 { 6479 struct qla_hw_data *ha = vha->hw; 6480 uint32_t idc_control, dev_state; 6481 6482 __qla83xx_get_idc_control(vha, &idc_control); 6483 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6484 ql_log(ql_log_info, vha, 0xb080, 6485 "NIC Core reset has been disabled. idc-control=0x%x\n", 6486 idc_control); 6487 return QLA_FUNCTION_FAILED; 6488 } 6489 6490 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6491 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6492 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6493 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6494 QLA8XXX_DEV_NEED_RESET); 6495 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6496 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6497 } else { 6498 const char *state = qla83xx_dev_state_to_string(dev_state); 6499 6500 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6501 6502 /* SV: XXX: Is timeout required here? */ 6503 /* Wait for IDC state change READY -> NEED_RESET */ 6504 while (dev_state == QLA8XXX_DEV_READY) { 6505 qla83xx_idc_unlock(vha, 0); 6506 msleep(200); 6507 qla83xx_idc_lock(vha, 0); 6508 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6509 } 6510 } 6511 6512 /* Send IDC ack by writing to drv-ack register */ 6513 __qla83xx_set_drv_ack(vha); 6514 6515 return QLA_SUCCESS; 6516 } 6517 6518 int 6519 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6520 { 6521 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6522 } 6523 6524 int 6525 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6526 { 6527 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6528 } 6529 6530 static int 6531 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6532 { 6533 uint32_t drv_presence = 0; 6534 struct qla_hw_data *ha = vha->hw; 6535 6536 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6537 if (drv_presence & (1 << ha->portnum)) 6538 return QLA_SUCCESS; 6539 else 6540 return QLA_TEST_FAILED; 6541 } 6542 6543 int 6544 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6545 { 6546 int rval = QLA_SUCCESS; 6547 struct qla_hw_data *ha = vha->hw; 6548 6549 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6550 "Entered %s().\n", __func__); 6551 6552 if (vha->device_flags & DFLG_DEV_FAILED) { 6553 ql_log(ql_log_warn, vha, 0xb059, 6554 "Device in unrecoverable FAILED state.\n"); 6555 return QLA_FUNCTION_FAILED; 6556 } 6557 6558 qla83xx_idc_lock(vha, 0); 6559 6560 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6561 ql_log(ql_log_warn, vha, 0xb05a, 6562 "Function=0x%x has been removed from IDC participation.\n", 6563 ha->portnum); 6564 rval = QLA_FUNCTION_FAILED; 6565 goto exit; 6566 } 6567 6568 qla83xx_reset_ownership(vha); 6569 6570 rval = qla83xx_initiating_reset(vha); 6571 6572 /* 6573 * Perform reset if we are the reset-owner, 6574 * else wait till IDC state changes to READY/FAILED. 6575 */ 6576 if (rval == QLA_SUCCESS) { 6577 rval = qla83xx_idc_state_handler(vha); 6578 6579 if (rval == QLA_SUCCESS) 6580 ha->flags.nic_core_hung = 0; 6581 __qla83xx_clear_drv_ack(vha); 6582 } 6583 6584 exit: 6585 qla83xx_idc_unlock(vha, 0); 6586 6587 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6588 6589 return rval; 6590 } 6591 6592 int 6593 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6594 { 6595 struct qla_hw_data *ha = vha->hw; 6596 int rval = QLA_FUNCTION_FAILED; 6597 6598 if (!IS_MCTP_CAPABLE(ha)) { 6599 /* This message can be removed from the final version */ 6600 ql_log(ql_log_info, vha, 0x506d, 6601 "This board is not MCTP capable\n"); 6602 return rval; 6603 } 6604 6605 if (!ha->mctp_dump) { 6606 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6607 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6608 6609 if (!ha->mctp_dump) { 6610 ql_log(ql_log_warn, vha, 0x506e, 6611 "Failed to allocate memory for mctp dump\n"); 6612 return rval; 6613 } 6614 } 6615 6616 #define MCTP_DUMP_STR_ADDR 0x00000000 6617 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6618 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6619 if (rval != QLA_SUCCESS) { 6620 ql_log(ql_log_warn, vha, 0x506f, 6621 "Failed to capture mctp dump\n"); 6622 } else { 6623 ql_log(ql_log_info, vha, 0x5070, 6624 "Mctp dump capture for host (%ld/%p).\n", 6625 vha->host_no, ha->mctp_dump); 6626 ha->mctp_dumped = 1; 6627 } 6628 6629 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6630 ha->flags.nic_core_reset_hdlr_active = 1; 6631 rval = qla83xx_restart_nic_firmware(vha); 6632 if (rval) 6633 /* NIC Core reset failed. */ 6634 ql_log(ql_log_warn, vha, 0x5071, 6635 "Failed to restart nic firmware\n"); 6636 else 6637 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6638 "Restarted NIC firmware successfully.\n"); 6639 ha->flags.nic_core_reset_hdlr_active = 0; 6640 } 6641 6642 return rval; 6643 6644 } 6645 6646 /* 6647 * qla2x00_quiesce_io 6648 * Description: This function will block the new I/Os 6649 * Its not aborting any I/Os as context 6650 * is not destroyed during quiescence 6651 * Arguments: scsi_qla_host_t 6652 * return : void 6653 */ 6654 void 6655 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6656 { 6657 struct qla_hw_data *ha = vha->hw; 6658 struct scsi_qla_host *vp; 6659 6660 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6661 "Quiescing I/O - ha=%p.\n", ha); 6662 6663 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6664 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6665 atomic_set(&vha->loop_state, LOOP_DOWN); 6666 qla2x00_mark_all_devices_lost(vha); 6667 list_for_each_entry(vp, &ha->vp_list, list) 6668 qla2x00_mark_all_devices_lost(vp); 6669 } else { 6670 if (!atomic_read(&vha->loop_down_timer)) 6671 atomic_set(&vha->loop_down_timer, 6672 LOOP_DOWN_TIME); 6673 } 6674 /* Wait for pending cmds to complete */ 6675 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 6676 != QLA_SUCCESS); 6677 } 6678 6679 void 6680 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6681 { 6682 struct qla_hw_data *ha = vha->hw; 6683 struct scsi_qla_host *vp; 6684 unsigned long flags; 6685 fc_port_t *fcport; 6686 u16 i; 6687 6688 /* For ISP82XX, driver waits for completion of the commands. 6689 * online flag should be set. 6690 */ 6691 if (!(IS_P3P_TYPE(ha))) 6692 vha->flags.online = 0; 6693 ha->flags.chip_reset_done = 0; 6694 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6695 vha->qla_stats.total_isp_aborts++; 6696 6697 ql_log(ql_log_info, vha, 0x00af, 6698 "Performing ISP error recovery - ha=%p.\n", ha); 6699 6700 ha->flags.purge_mbox = 1; 6701 /* For ISP82XX, reset_chip is just disabling interrupts. 6702 * Driver waits for the completion of the commands. 6703 * the interrupts need to be enabled. 6704 */ 6705 if (!(IS_P3P_TYPE(ha))) 6706 ha->isp_ops->reset_chip(vha); 6707 6708 ha->link_data_rate = PORT_SPEED_UNKNOWN; 6709 SAVE_TOPO(ha); 6710 ha->flags.rida_fmt2 = 0; 6711 ha->flags.n2n_ae = 0; 6712 ha->flags.lip_ae = 0; 6713 ha->current_topology = 0; 6714 QLA_FW_STOPPED(ha); 6715 ha->flags.fw_init_done = 0; 6716 ha->chip_reset++; 6717 ha->base_qpair->chip_reset = ha->chip_reset; 6718 for (i = 0; i < ha->max_qpairs; i++) { 6719 if (ha->queue_pair_map[i]) 6720 ha->queue_pair_map[i]->chip_reset = 6721 ha->base_qpair->chip_reset; 6722 } 6723 6724 /* purge MBox commands */ 6725 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6726 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6727 complete(&ha->mbx_intr_comp); 6728 } 6729 6730 i = 0; 6731 while (atomic_read(&ha->num_pend_mbx_stage3) || 6732 atomic_read(&ha->num_pend_mbx_stage2) || 6733 atomic_read(&ha->num_pend_mbx_stage1)) { 6734 msleep(20); 6735 i++; 6736 if (i > 50) 6737 break; 6738 } 6739 ha->flags.purge_mbox = 0; 6740 6741 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6742 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6743 atomic_set(&vha->loop_state, LOOP_DOWN); 6744 qla2x00_mark_all_devices_lost(vha); 6745 6746 spin_lock_irqsave(&ha->vport_slock, flags); 6747 list_for_each_entry(vp, &ha->vp_list, list) { 6748 atomic_inc(&vp->vref_count); 6749 spin_unlock_irqrestore(&ha->vport_slock, flags); 6750 6751 qla2x00_mark_all_devices_lost(vp); 6752 6753 spin_lock_irqsave(&ha->vport_slock, flags); 6754 atomic_dec(&vp->vref_count); 6755 } 6756 spin_unlock_irqrestore(&ha->vport_slock, flags); 6757 } else { 6758 if (!atomic_read(&vha->loop_down_timer)) 6759 atomic_set(&vha->loop_down_timer, 6760 LOOP_DOWN_TIME); 6761 } 6762 6763 /* Clear all async request states across all VPs. */ 6764 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6765 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6766 fcport->scan_state = 0; 6767 } 6768 spin_lock_irqsave(&ha->vport_slock, flags); 6769 list_for_each_entry(vp, &ha->vp_list, list) { 6770 atomic_inc(&vp->vref_count); 6771 spin_unlock_irqrestore(&ha->vport_slock, flags); 6772 6773 list_for_each_entry(fcport, &vp->vp_fcports, list) 6774 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6775 6776 spin_lock_irqsave(&ha->vport_slock, flags); 6777 atomic_dec(&vp->vref_count); 6778 } 6779 spin_unlock_irqrestore(&ha->vport_slock, flags); 6780 6781 if (!ha->flags.eeh_busy) { 6782 /* Make sure for ISP 82XX IO DMA is complete */ 6783 if (IS_P3P_TYPE(ha)) { 6784 qla82xx_chip_reset_cleanup(vha); 6785 ql_log(ql_log_info, vha, 0x00b4, 6786 "Done chip reset cleanup.\n"); 6787 6788 /* Done waiting for pending commands. 6789 * Reset the online flag. 6790 */ 6791 vha->flags.online = 0; 6792 } 6793 6794 /* Requeue all commands in outstanding command list. */ 6795 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6796 } 6797 /* memory barrier */ 6798 wmb(); 6799 } 6800 6801 /* 6802 * qla2x00_abort_isp 6803 * Resets ISP and aborts all outstanding commands. 6804 * 6805 * Input: 6806 * ha = adapter block pointer. 6807 * 6808 * Returns: 6809 * 0 = success 6810 */ 6811 int 6812 qla2x00_abort_isp(scsi_qla_host_t *vha) 6813 { 6814 int rval; 6815 uint8_t status = 0; 6816 struct qla_hw_data *ha = vha->hw; 6817 struct scsi_qla_host *vp; 6818 struct req_que *req = ha->req_q_map[0]; 6819 unsigned long flags; 6820 6821 if (vha->flags.online) { 6822 qla2x00_abort_isp_cleanup(vha); 6823 6824 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 6825 ha->flags.chip_reset_done = 1; 6826 vha->flags.online = 1; 6827 status = 0; 6828 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6829 return status; 6830 } 6831 6832 if (IS_QLA8031(ha)) { 6833 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6834 "Clearing fcoe driver presence.\n"); 6835 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6836 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6837 "Error while clearing DRV-Presence.\n"); 6838 } 6839 6840 if (unlikely(pci_channel_offline(ha->pdev) && 6841 ha->flags.pci_channel_io_perm_failure)) { 6842 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6843 status = 0; 6844 return status; 6845 } 6846 6847 switch (vha->qlini_mode) { 6848 case QLA2XXX_INI_MODE_DISABLED: 6849 if (!qla_tgt_mode_enabled(vha)) 6850 return 0; 6851 break; 6852 case QLA2XXX_INI_MODE_DUAL: 6853 if (!qla_dual_mode_enabled(vha)) 6854 return 0; 6855 break; 6856 case QLA2XXX_INI_MODE_ENABLED: 6857 default: 6858 break; 6859 } 6860 6861 ha->isp_ops->get_flash_version(vha, req->ring); 6862 6863 ha->isp_ops->nvram_config(vha); 6864 6865 if (!qla2x00_restart_isp(vha)) { 6866 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6867 6868 if (!atomic_read(&vha->loop_down_timer)) { 6869 /* 6870 * Issue marker command only when we are going 6871 * to start the I/O . 6872 */ 6873 vha->marker_needed = 1; 6874 } 6875 6876 vha->flags.online = 1; 6877 6878 ha->isp_ops->enable_intrs(ha); 6879 6880 ha->isp_abort_cnt = 0; 6881 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6882 6883 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6884 qla2x00_get_fw_version(vha); 6885 if (ha->fce) { 6886 ha->flags.fce_enabled = 1; 6887 memset(ha->fce, 0, 6888 fce_calc_size(ha->fce_bufs)); 6889 rval = qla2x00_enable_fce_trace(vha, 6890 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6891 &ha->fce_bufs); 6892 if (rval) { 6893 ql_log(ql_log_warn, vha, 0x8033, 6894 "Unable to reinitialize FCE " 6895 "(%d).\n", rval); 6896 ha->flags.fce_enabled = 0; 6897 } 6898 } 6899 6900 if (ha->eft) { 6901 memset(ha->eft, 0, EFT_SIZE); 6902 rval = qla2x00_enable_eft_trace(vha, 6903 ha->eft_dma, EFT_NUM_BUFFERS); 6904 if (rval) { 6905 ql_log(ql_log_warn, vha, 0x8034, 6906 "Unable to reinitialize EFT " 6907 "(%d).\n", rval); 6908 } 6909 } 6910 } else { /* failed the ISP abort */ 6911 vha->flags.online = 1; 6912 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6913 if (ha->isp_abort_cnt == 0) { 6914 ql_log(ql_log_fatal, vha, 0x8035, 6915 "ISP error recover failed - " 6916 "board disabled.\n"); 6917 /* 6918 * The next call disables the board 6919 * completely. 6920 */ 6921 qla2x00_abort_isp_cleanup(vha); 6922 vha->flags.online = 0; 6923 clear_bit(ISP_ABORT_RETRY, 6924 &vha->dpc_flags); 6925 status = 0; 6926 } else { /* schedule another ISP abort */ 6927 ha->isp_abort_cnt--; 6928 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6929 "ISP abort - retry remaining %d.\n", 6930 ha->isp_abort_cnt); 6931 status = 1; 6932 } 6933 } else { 6934 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6935 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6936 "ISP error recovery - retrying (%d) " 6937 "more times.\n", ha->isp_abort_cnt); 6938 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6939 status = 1; 6940 } 6941 } 6942 6943 } 6944 6945 if (!status) { 6946 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6947 qla2x00_configure_hba(vha); 6948 spin_lock_irqsave(&ha->vport_slock, flags); 6949 list_for_each_entry(vp, &ha->vp_list, list) { 6950 if (vp->vp_idx) { 6951 atomic_inc(&vp->vref_count); 6952 spin_unlock_irqrestore(&ha->vport_slock, flags); 6953 6954 qla2x00_vp_abort_isp(vp); 6955 6956 spin_lock_irqsave(&ha->vport_slock, flags); 6957 atomic_dec(&vp->vref_count); 6958 } 6959 } 6960 spin_unlock_irqrestore(&ha->vport_slock, flags); 6961 6962 if (IS_QLA8031(ha)) { 6963 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6964 "Setting back fcoe driver presence.\n"); 6965 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6966 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6967 "Error while setting DRV-Presence.\n"); 6968 } 6969 } else { 6970 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6971 __func__); 6972 } 6973 6974 return(status); 6975 } 6976 6977 /* 6978 * qla2x00_restart_isp 6979 * restarts the ISP after a reset 6980 * 6981 * Input: 6982 * ha = adapter block pointer. 6983 * 6984 * Returns: 6985 * 0 = success 6986 */ 6987 static int 6988 qla2x00_restart_isp(scsi_qla_host_t *vha) 6989 { 6990 int status = 0; 6991 struct qla_hw_data *ha = vha->hw; 6992 6993 /* If firmware needs to be loaded */ 6994 if (qla2x00_isp_firmware(vha)) { 6995 vha->flags.online = 0; 6996 status = ha->isp_ops->chip_diag(vha); 6997 if (!status) 6998 status = qla2x00_setup_chip(vha); 6999 } 7000 7001 if (!status && !(status = qla2x00_init_rings(vha))) { 7002 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7003 ha->flags.chip_reset_done = 1; 7004 7005 /* Initialize the queues in use */ 7006 qla25xx_init_queues(ha); 7007 7008 status = qla2x00_fw_ready(vha); 7009 if (!status) { 7010 /* Issue a marker after FW becomes ready. */ 7011 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7012 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7013 } 7014 7015 /* if no cable then assume it's good */ 7016 if ((vha->device_flags & DFLG_NO_CABLE)) 7017 status = 0; 7018 } 7019 return (status); 7020 } 7021 7022 static int 7023 qla25xx_init_queues(struct qla_hw_data *ha) 7024 { 7025 struct rsp_que *rsp = NULL; 7026 struct req_que *req = NULL; 7027 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7028 int ret = -1; 7029 int i; 7030 7031 for (i = 1; i < ha->max_rsp_queues; i++) { 7032 rsp = ha->rsp_q_map[i]; 7033 if (rsp && test_bit(i, ha->rsp_qid_map)) { 7034 rsp->options &= ~BIT_0; 7035 ret = qla25xx_init_rsp_que(base_vha, rsp); 7036 if (ret != QLA_SUCCESS) 7037 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 7038 "%s Rsp que: %d init failed.\n", 7039 __func__, rsp->id); 7040 else 7041 ql_dbg(ql_dbg_init, base_vha, 0x0100, 7042 "%s Rsp que: %d inited.\n", 7043 __func__, rsp->id); 7044 } 7045 } 7046 for (i = 1; i < ha->max_req_queues; i++) { 7047 req = ha->req_q_map[i]; 7048 if (req && test_bit(i, ha->req_qid_map)) { 7049 /* Clear outstanding commands array. */ 7050 req->options &= ~BIT_0; 7051 ret = qla25xx_init_req_que(base_vha, req); 7052 if (ret != QLA_SUCCESS) 7053 ql_dbg(ql_dbg_init, base_vha, 0x0101, 7054 "%s Req que: %d init failed.\n", 7055 __func__, req->id); 7056 else 7057 ql_dbg(ql_dbg_init, base_vha, 0x0102, 7058 "%s Req que: %d inited.\n", 7059 __func__, req->id); 7060 } 7061 } 7062 return ret; 7063 } 7064 7065 /* 7066 * qla2x00_reset_adapter 7067 * Reset adapter. 7068 * 7069 * Input: 7070 * ha = adapter block pointer. 7071 */ 7072 int 7073 qla2x00_reset_adapter(scsi_qla_host_t *vha) 7074 { 7075 unsigned long flags = 0; 7076 struct qla_hw_data *ha = vha->hw; 7077 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7078 7079 vha->flags.online = 0; 7080 ha->isp_ops->disable_intrs(ha); 7081 7082 spin_lock_irqsave(&ha->hardware_lock, flags); 7083 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 7084 RD_REG_WORD(®->hccr); /* PCI Posting. */ 7085 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 7086 RD_REG_WORD(®->hccr); /* PCI Posting. */ 7087 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7088 7089 return QLA_SUCCESS; 7090 } 7091 7092 int 7093 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7094 { 7095 unsigned long flags = 0; 7096 struct qla_hw_data *ha = vha->hw; 7097 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7098 int rval = QLA_SUCCESS; 7099 7100 if (IS_P3P_TYPE(ha)) 7101 return rval; 7102 7103 vha->flags.online = 0; 7104 ha->isp_ops->disable_intrs(ha); 7105 7106 spin_lock_irqsave(&ha->hardware_lock, flags); 7107 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 7108 RD_REG_DWORD(®->hccr); 7109 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 7110 RD_REG_DWORD(®->hccr); 7111 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7112 7113 if (IS_NOPOLLING_TYPE(ha)) 7114 ha->isp_ops->enable_intrs(ha); 7115 7116 return rval; 7117 } 7118 7119 /* On sparc systems, obtain port and node WWN from firmware 7120 * properties. 7121 */ 7122 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7123 struct nvram_24xx *nv) 7124 { 7125 #ifdef CONFIG_SPARC 7126 struct qla_hw_data *ha = vha->hw; 7127 struct pci_dev *pdev = ha->pdev; 7128 struct device_node *dp = pci_device_to_OF_node(pdev); 7129 const u8 *val; 7130 int len; 7131 7132 val = of_get_property(dp, "port-wwn", &len); 7133 if (val && len >= WWN_SIZE) 7134 memcpy(nv->port_name, val, WWN_SIZE); 7135 7136 val = of_get_property(dp, "node-wwn", &len); 7137 if (val && len >= WWN_SIZE) 7138 memcpy(nv->node_name, val, WWN_SIZE); 7139 #endif 7140 } 7141 7142 int 7143 qla24xx_nvram_config(scsi_qla_host_t *vha) 7144 { 7145 int rval; 7146 struct init_cb_24xx *icb; 7147 struct nvram_24xx *nv; 7148 uint32_t *dptr; 7149 uint8_t *dptr1, *dptr2; 7150 uint32_t chksum; 7151 uint16_t cnt; 7152 struct qla_hw_data *ha = vha->hw; 7153 7154 rval = QLA_SUCCESS; 7155 icb = (struct init_cb_24xx *)ha->init_cb; 7156 nv = ha->nvram; 7157 7158 /* Determine NVRAM starting address. */ 7159 if (ha->port_no == 0) { 7160 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7161 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7162 } else { 7163 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7164 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7165 } 7166 7167 ha->nvram_size = sizeof(*nv); 7168 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7169 7170 /* Get VPD data into cache */ 7171 ha->vpd = ha->nvram + VPD_OFFSET; 7172 ha->isp_ops->read_nvram(vha, ha->vpd, 7173 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7174 7175 /* Get NVRAM data into cache and calculate checksum. */ 7176 dptr = (uint32_t *)nv; 7177 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7178 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7179 chksum += le32_to_cpu(*dptr); 7180 7181 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7182 "Contents of NVRAM\n"); 7183 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7184 nv, ha->nvram_size); 7185 7186 /* Bad NVRAM data, set defaults parameters. */ 7187 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7188 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7189 /* Reset NVRAM data. */ 7190 ql_log(ql_log_warn, vha, 0x006b, 7191 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7192 chksum, nv->id, nv->nvram_version); 7193 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7194 ql_log(ql_log_warn, vha, 0x006c, 7195 "Falling back to functioning (yet invalid -- WWPN) " 7196 "defaults.\n"); 7197 7198 /* 7199 * Set default initialization control block. 7200 */ 7201 memset(nv, 0, ha->nvram_size); 7202 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7203 nv->version = cpu_to_le16(ICB_VERSION); 7204 nv->frame_payload_size = 2048; 7205 nv->execution_throttle = cpu_to_le16(0xFFFF); 7206 nv->exchange_count = cpu_to_le16(0); 7207 nv->hard_address = cpu_to_le16(124); 7208 nv->port_name[0] = 0x21; 7209 nv->port_name[1] = 0x00 + ha->port_no + 1; 7210 nv->port_name[2] = 0x00; 7211 nv->port_name[3] = 0xe0; 7212 nv->port_name[4] = 0x8b; 7213 nv->port_name[5] = 0x1c; 7214 nv->port_name[6] = 0x55; 7215 nv->port_name[7] = 0x86; 7216 nv->node_name[0] = 0x20; 7217 nv->node_name[1] = 0x00; 7218 nv->node_name[2] = 0x00; 7219 nv->node_name[3] = 0xe0; 7220 nv->node_name[4] = 0x8b; 7221 nv->node_name[5] = 0x1c; 7222 nv->node_name[6] = 0x55; 7223 nv->node_name[7] = 0x86; 7224 qla24xx_nvram_wwn_from_ofw(vha, nv); 7225 nv->login_retry_count = cpu_to_le16(8); 7226 nv->interrupt_delay_timer = cpu_to_le16(0); 7227 nv->login_timeout = cpu_to_le16(0); 7228 nv->firmware_options_1 = 7229 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7230 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7231 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7232 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7233 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7234 nv->efi_parameters = cpu_to_le32(0); 7235 nv->reset_delay = 5; 7236 nv->max_luns_per_target = cpu_to_le16(128); 7237 nv->port_down_retry_count = cpu_to_le16(30); 7238 nv->link_down_timeout = cpu_to_le16(30); 7239 7240 rval = 1; 7241 } 7242 7243 if (qla_tgt_mode_enabled(vha)) { 7244 /* Don't enable full login after initial LIP */ 7245 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7246 /* Don't enable LIP full login for initiator */ 7247 nv->host_p &= cpu_to_le32(~BIT_10); 7248 } 7249 7250 qlt_24xx_config_nvram_stage1(vha, nv); 7251 7252 /* Reset Initialization control block */ 7253 memset(icb, 0, ha->init_cb_size); 7254 7255 /* Copy 1st segment. */ 7256 dptr1 = (uint8_t *)icb; 7257 dptr2 = (uint8_t *)&nv->version; 7258 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7259 while (cnt--) 7260 *dptr1++ = *dptr2++; 7261 7262 icb->login_retry_count = nv->login_retry_count; 7263 icb->link_down_on_nos = nv->link_down_on_nos; 7264 7265 /* Copy 2nd segment. */ 7266 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7267 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7268 cnt = (uint8_t *)&icb->reserved_3 - 7269 (uint8_t *)&icb->interrupt_delay_timer; 7270 while (cnt--) 7271 *dptr1++ = *dptr2++; 7272 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7273 /* 7274 * Setup driver NVRAM options. 7275 */ 7276 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7277 "QLA2462"); 7278 7279 qlt_24xx_config_nvram_stage2(vha, icb); 7280 7281 if (nv->host_p & cpu_to_le32(BIT_15)) { 7282 /* Use alternate WWN? */ 7283 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7284 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7285 } 7286 7287 /* Prepare nodename */ 7288 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7289 /* 7290 * Firmware will apply the following mask if the nodename was 7291 * not provided. 7292 */ 7293 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7294 icb->node_name[0] &= 0xF0; 7295 } 7296 7297 /* Set host adapter parameters. */ 7298 ha->flags.disable_risc_code_load = 0; 7299 ha->flags.enable_lip_reset = 0; 7300 ha->flags.enable_lip_full_login = 7301 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7302 ha->flags.enable_target_reset = 7303 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7304 ha->flags.enable_led_scheme = 0; 7305 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7306 7307 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7308 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7309 7310 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7311 sizeof(ha->fw_seriallink_options24)); 7312 7313 /* save HBA serial number */ 7314 ha->serial0 = icb->port_name[5]; 7315 ha->serial1 = icb->port_name[6]; 7316 ha->serial2 = icb->port_name[7]; 7317 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7318 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7319 7320 icb->execution_throttle = cpu_to_le16(0xFFFF); 7321 7322 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7323 7324 /* Set minimum login_timeout to 4 seconds. */ 7325 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7326 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7327 if (le16_to_cpu(nv->login_timeout) < 4) 7328 nv->login_timeout = cpu_to_le16(4); 7329 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7330 7331 /* Set minimum RATOV to 100 tenths of a second. */ 7332 ha->r_a_tov = 100; 7333 7334 ha->loop_reset_delay = nv->reset_delay; 7335 7336 /* Link Down Timeout = 0: 7337 * 7338 * When Port Down timer expires we will start returning 7339 * I/O's to OS with "DID_NO_CONNECT". 7340 * 7341 * Link Down Timeout != 0: 7342 * 7343 * The driver waits for the link to come up after link down 7344 * before returning I/Os to OS with "DID_NO_CONNECT". 7345 */ 7346 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7347 ha->loop_down_abort_time = 7348 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7349 } else { 7350 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7351 ha->loop_down_abort_time = 7352 (LOOP_DOWN_TIME - ha->link_down_timeout); 7353 } 7354 7355 /* Need enough time to try and get the port back. */ 7356 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7357 if (qlport_down_retry) 7358 ha->port_down_retry_count = qlport_down_retry; 7359 7360 /* Set login_retry_count */ 7361 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7362 if (ha->port_down_retry_count == 7363 le16_to_cpu(nv->port_down_retry_count) && 7364 ha->port_down_retry_count > 3) 7365 ha->login_retry_count = ha->port_down_retry_count; 7366 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7367 ha->login_retry_count = ha->port_down_retry_count; 7368 if (ql2xloginretrycount) 7369 ha->login_retry_count = ql2xloginretrycount; 7370 7371 /* N2N: driver will initiate Login instead of FW */ 7372 icb->firmware_options_3 |= BIT_8; 7373 7374 /* Enable ZIO. */ 7375 if (!vha->flags.init_done) { 7376 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7377 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7378 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7379 le16_to_cpu(icb->interrupt_delay_timer) : 2; 7380 } 7381 icb->firmware_options_2 &= cpu_to_le32( 7382 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7383 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7384 ha->zio_mode = QLA_ZIO_MODE_6; 7385 7386 ql_log(ql_log_info, vha, 0x006f, 7387 "ZIO mode %d enabled; timer delay (%d us).\n", 7388 ha->zio_mode, ha->zio_timer * 100); 7389 7390 icb->firmware_options_2 |= cpu_to_le32( 7391 (uint32_t)ha->zio_mode); 7392 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7393 } 7394 7395 if (rval) { 7396 ql_log(ql_log_warn, vha, 0x0070, 7397 "NVRAM configuration failed.\n"); 7398 } 7399 return (rval); 7400 } 7401 7402 static void 7403 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 7404 struct qla27xx_image_status *image_status) 7405 { 7406 ql_dbg(ql_dbg_init, vha, 0x018b, 7407 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 7408 name, "status", 7409 image_status->image_status_mask, 7410 le16_to_cpu(image_status->generation), 7411 image_status->ver_major, 7412 image_status->ver_minor, 7413 image_status->bitmap, 7414 le32_to_cpu(image_status->checksum), 7415 le32_to_cpu(image_status->signature)); 7416 } 7417 7418 static bool 7419 qla28xx_check_aux_image_status_signature( 7420 struct qla27xx_image_status *image_status) 7421 { 7422 ulong signature = le32_to_cpu(image_status->signature); 7423 7424 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 7425 } 7426 7427 static bool 7428 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 7429 { 7430 ulong signature = le32_to_cpu(image_status->signature); 7431 7432 return 7433 signature != QLA27XX_IMG_STATUS_SIGN && 7434 signature != QLA28XX_IMG_STATUS_SIGN; 7435 } 7436 7437 static ulong 7438 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 7439 { 7440 uint32_t *p = (void *)image_status; 7441 uint n = sizeof(*image_status) / sizeof(*p); 7442 uint32_t sum = 0; 7443 7444 for ( ; n--; p++) 7445 sum += le32_to_cpup(p); 7446 7447 return sum; 7448 } 7449 7450 static inline uint 7451 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 7452 { 7453 return aux->bitmap & bitmask ? 7454 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 7455 } 7456 7457 static void 7458 qla28xx_component_status( 7459 struct active_regions *active_regions, struct qla27xx_image_status *aux) 7460 { 7461 active_regions->aux.board_config = 7462 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 7463 7464 active_regions->aux.vpd_nvram = 7465 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 7466 7467 active_regions->aux.npiv_config_0_1 = 7468 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 7469 7470 active_regions->aux.npiv_config_2_3 = 7471 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 7472 } 7473 7474 static int 7475 qla27xx_compare_image_generation( 7476 struct qla27xx_image_status *pri_image_status, 7477 struct qla27xx_image_status *sec_image_status) 7478 { 7479 /* calculate generation delta as uint16 (this accounts for wrap) */ 7480 int16_t delta = 7481 le16_to_cpu(pri_image_status->generation) - 7482 le16_to_cpu(sec_image_status->generation); 7483 7484 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 7485 7486 return delta; 7487 } 7488 7489 void 7490 qla28xx_get_aux_images( 7491 struct scsi_qla_host *vha, struct active_regions *active_regions) 7492 { 7493 struct qla_hw_data *ha = vha->hw; 7494 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 7495 bool valid_pri_image = false, valid_sec_image = false; 7496 bool active_pri_image = false, active_sec_image = false; 7497 7498 if (!ha->flt_region_aux_img_status_pri) { 7499 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 7500 goto check_sec_image; 7501 } 7502 7503 qla24xx_read_flash_data(vha, (void *)&pri_aux_image_status, 7504 ha->flt_region_aux_img_status_pri, 7505 sizeof(pri_aux_image_status) >> 2); 7506 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 7507 7508 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 7509 ql_dbg(ql_dbg_init, vha, 0x018b, 7510 "Primary aux image signature (%#x) not valid\n", 7511 le32_to_cpu(pri_aux_image_status.signature)); 7512 goto check_sec_image; 7513 } 7514 7515 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 7516 ql_dbg(ql_dbg_init, vha, 0x018c, 7517 "Primary aux image checksum failed\n"); 7518 goto check_sec_image; 7519 } 7520 7521 valid_pri_image = true; 7522 7523 if (pri_aux_image_status.image_status_mask & 1) { 7524 ql_dbg(ql_dbg_init, vha, 0x018d, 7525 "Primary aux image is active\n"); 7526 active_pri_image = true; 7527 } 7528 7529 check_sec_image: 7530 if (!ha->flt_region_aux_img_status_sec) { 7531 ql_dbg(ql_dbg_init, vha, 0x018a, 7532 "Secondary aux image not addressed\n"); 7533 goto check_valid_image; 7534 } 7535 7536 qla24xx_read_flash_data(vha, (void *)&sec_aux_image_status, 7537 ha->flt_region_aux_img_status_sec, 7538 sizeof(sec_aux_image_status) >> 2); 7539 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 7540 7541 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 7542 ql_dbg(ql_dbg_init, vha, 0x018b, 7543 "Secondary aux image signature (%#x) not valid\n", 7544 le32_to_cpu(sec_aux_image_status.signature)); 7545 goto check_valid_image; 7546 } 7547 7548 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 7549 ql_dbg(ql_dbg_init, vha, 0x018c, 7550 "Secondary aux image checksum failed\n"); 7551 goto check_valid_image; 7552 } 7553 7554 valid_sec_image = true; 7555 7556 if (sec_aux_image_status.image_status_mask & 1) { 7557 ql_dbg(ql_dbg_init, vha, 0x018d, 7558 "Secondary aux image is active\n"); 7559 active_sec_image = true; 7560 } 7561 7562 check_valid_image: 7563 if (valid_pri_image && active_pri_image && 7564 valid_sec_image && active_sec_image) { 7565 if (qla27xx_compare_image_generation(&pri_aux_image_status, 7566 &sec_aux_image_status) >= 0) { 7567 qla28xx_component_status(active_regions, 7568 &pri_aux_image_status); 7569 } else { 7570 qla28xx_component_status(active_regions, 7571 &sec_aux_image_status); 7572 } 7573 } else if (valid_pri_image && active_pri_image) { 7574 qla28xx_component_status(active_regions, &pri_aux_image_status); 7575 } else if (valid_sec_image && active_sec_image) { 7576 qla28xx_component_status(active_regions, &sec_aux_image_status); 7577 } 7578 7579 ql_dbg(ql_dbg_init, vha, 0x018f, 7580 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n", 7581 active_regions->aux.board_config, 7582 active_regions->aux.vpd_nvram, 7583 active_regions->aux.npiv_config_0_1, 7584 active_regions->aux.npiv_config_2_3); 7585 } 7586 7587 void 7588 qla27xx_get_active_image(struct scsi_qla_host *vha, 7589 struct active_regions *active_regions) 7590 { 7591 struct qla_hw_data *ha = vha->hw; 7592 struct qla27xx_image_status pri_image_status, sec_image_status; 7593 bool valid_pri_image = false, valid_sec_image = false; 7594 bool active_pri_image = false, active_sec_image = false; 7595 7596 if (!ha->flt_region_img_status_pri) { 7597 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 7598 goto check_sec_image; 7599 } 7600 7601 if (qla24xx_read_flash_data(vha, (void *)(&pri_image_status), 7602 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 7603 QLA_SUCCESS) { 7604 WARN_ON_ONCE(true); 7605 goto check_sec_image; 7606 } 7607 qla27xx_print_image(vha, "Primary image", &pri_image_status); 7608 7609 if (qla27xx_check_image_status_signature(&pri_image_status)) { 7610 ql_dbg(ql_dbg_init, vha, 0x018b, 7611 "Primary image signature (%#x) not valid\n", 7612 le32_to_cpu(pri_image_status.signature)); 7613 goto check_sec_image; 7614 } 7615 7616 if (qla27xx_image_status_checksum(&pri_image_status)) { 7617 ql_dbg(ql_dbg_init, vha, 0x018c, 7618 "Primary image checksum failed\n"); 7619 goto check_sec_image; 7620 } 7621 7622 valid_pri_image = true; 7623 7624 if (pri_image_status.image_status_mask & 1) { 7625 ql_dbg(ql_dbg_init, vha, 0x018d, 7626 "Primary image is active\n"); 7627 active_pri_image = true; 7628 } 7629 7630 check_sec_image: 7631 if (!ha->flt_region_img_status_sec) { 7632 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 7633 goto check_valid_image; 7634 } 7635 7636 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7637 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 7638 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 7639 7640 if (qla27xx_check_image_status_signature(&sec_image_status)) { 7641 ql_dbg(ql_dbg_init, vha, 0x018b, 7642 "Secondary image signature (%#x) not valid\n", 7643 le32_to_cpu(sec_image_status.signature)); 7644 goto check_valid_image; 7645 } 7646 7647 if (qla27xx_image_status_checksum(&sec_image_status)) { 7648 ql_dbg(ql_dbg_init, vha, 0x018c, 7649 "Secondary image checksum failed\n"); 7650 goto check_valid_image; 7651 } 7652 7653 valid_sec_image = true; 7654 7655 if (sec_image_status.image_status_mask & 1) { 7656 ql_dbg(ql_dbg_init, vha, 0x018d, 7657 "Secondary image is active\n"); 7658 active_sec_image = true; 7659 } 7660 7661 check_valid_image: 7662 if (valid_pri_image && active_pri_image) 7663 active_regions->global = QLA27XX_PRIMARY_IMAGE; 7664 7665 if (valid_sec_image && active_sec_image) { 7666 if (!active_regions->global || 7667 qla27xx_compare_image_generation( 7668 &pri_image_status, &sec_image_status) < 0) { 7669 active_regions->global = QLA27XX_SECONDARY_IMAGE; 7670 } 7671 } 7672 7673 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 7674 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 7675 "default (boot/fw)" : 7676 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 7677 "primary" : 7678 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 7679 "secondary" : "invalid", 7680 active_regions->global); 7681 } 7682 7683 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 7684 { 7685 return 7686 !(dword[4] | dword[5] | dword[6] | dword[7]) || 7687 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 7688 } 7689 7690 static int 7691 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7692 uint32_t faddr) 7693 { 7694 int rval; 7695 uint templates, segments, fragment; 7696 ulong i; 7697 uint j; 7698 ulong dlen; 7699 uint32_t *dcode; 7700 uint32_t risc_addr, risc_size, risc_attr = 0; 7701 struct qla_hw_data *ha = vha->hw; 7702 struct req_que *req = ha->req_q_map[0]; 7703 struct fwdt *fwdt = ha->fwdt; 7704 7705 ql_dbg(ql_dbg_init, vha, 0x008b, 7706 "FW: Loading firmware from flash (%x).\n", faddr); 7707 7708 dcode = (void *)req->ring; 7709 qla24xx_read_flash_data(vha, dcode, faddr, 8); 7710 if (qla24xx_risc_firmware_invalid(dcode)) { 7711 ql_log(ql_log_fatal, vha, 0x008c, 7712 "Unable to verify the integrity of flash firmware " 7713 "image.\n"); 7714 ql_log(ql_log_fatal, vha, 0x008d, 7715 "Firmware data: %08x %08x %08x %08x.\n", 7716 dcode[0], dcode[1], dcode[2], dcode[3]); 7717 7718 return QLA_FUNCTION_FAILED; 7719 } 7720 7721 dcode = (void *)req->ring; 7722 *srisc_addr = 0; 7723 segments = FA_RISC_CODE_SEGMENTS; 7724 for (j = 0; j < segments; j++) { 7725 ql_dbg(ql_dbg_init, vha, 0x008d, 7726 "-> Loading segment %u...\n", j); 7727 qla24xx_read_flash_data(vha, dcode, faddr, 10); 7728 risc_addr = be32_to_cpu(dcode[2]); 7729 risc_size = be32_to_cpu(dcode[3]); 7730 if (!*srisc_addr) { 7731 *srisc_addr = risc_addr; 7732 risc_attr = be32_to_cpu(dcode[9]); 7733 } 7734 7735 dlen = ha->fw_transfer_size >> 2; 7736 for (fragment = 0; risc_size; fragment++) { 7737 if (dlen > risc_size) 7738 dlen = risc_size; 7739 7740 ql_dbg(ql_dbg_init, vha, 0x008e, 7741 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 7742 fragment, risc_addr, faddr, dlen); 7743 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7744 for (i = 0; i < dlen; i++) 7745 dcode[i] = swab32(dcode[i]); 7746 7747 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 7748 if (rval) { 7749 ql_log(ql_log_fatal, vha, 0x008f, 7750 "-> Failed load firmware fragment %u.\n", 7751 fragment); 7752 return QLA_FUNCTION_FAILED; 7753 } 7754 7755 faddr += dlen; 7756 risc_addr += dlen; 7757 risc_size -= dlen; 7758 } 7759 } 7760 7761 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 7762 return QLA_SUCCESS; 7763 7764 templates = (risc_attr & BIT_9) ? 2 : 1; 7765 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 7766 for (j = 0; j < templates; j++, fwdt++) { 7767 if (fwdt->template) 7768 vfree(fwdt->template); 7769 fwdt->template = NULL; 7770 fwdt->length = 0; 7771 7772 dcode = (void *)req->ring; 7773 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7774 risc_size = be32_to_cpu(dcode[2]); 7775 ql_dbg(ql_dbg_init, vha, 0x0161, 7776 "-> fwdt%u template array at %#x (%#x dwords)\n", 7777 j, faddr, risc_size); 7778 if (!risc_size || !~risc_size) { 7779 ql_dbg(ql_dbg_init, vha, 0x0162, 7780 "-> fwdt%u failed to read array\n", j); 7781 goto failed; 7782 } 7783 7784 /* skip header and ignore checksum */ 7785 faddr += 7; 7786 risc_size -= 8; 7787 7788 ql_dbg(ql_dbg_init, vha, 0x0163, 7789 "-> fwdt%u template allocate template %#x words...\n", 7790 j, risc_size); 7791 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 7792 if (!fwdt->template) { 7793 ql_log(ql_log_warn, vha, 0x0164, 7794 "-> fwdt%u failed allocate template.\n", j); 7795 goto failed; 7796 } 7797 7798 dcode = fwdt->template; 7799 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7800 7801 if (!qla27xx_fwdt_template_valid(dcode)) { 7802 ql_log(ql_log_warn, vha, 0x0165, 7803 "-> fwdt%u failed template validate\n", j); 7804 goto failed; 7805 } 7806 7807 dlen = qla27xx_fwdt_template_size(dcode); 7808 ql_dbg(ql_dbg_init, vha, 0x0166, 7809 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 7810 j, dlen, dlen / sizeof(*dcode)); 7811 if (dlen > risc_size * sizeof(*dcode)) { 7812 ql_log(ql_log_warn, vha, 0x0167, 7813 "-> fwdt%u template exceeds array (%-lu bytes)\n", 7814 j, dlen - risc_size * sizeof(*dcode)); 7815 goto failed; 7816 } 7817 7818 fwdt->length = dlen; 7819 ql_dbg(ql_dbg_init, vha, 0x0168, 7820 "-> fwdt%u loaded template ok\n", j); 7821 7822 faddr += risc_size + 1; 7823 } 7824 7825 return QLA_SUCCESS; 7826 7827 failed: 7828 if (fwdt->template) 7829 vfree(fwdt->template); 7830 fwdt->template = NULL; 7831 fwdt->length = 0; 7832 7833 return QLA_SUCCESS; 7834 } 7835 7836 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7837 7838 int 7839 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7840 { 7841 int rval; 7842 int i, fragment; 7843 uint16_t *wcode, *fwcode; 7844 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7845 struct fw_blob *blob; 7846 struct qla_hw_data *ha = vha->hw; 7847 struct req_que *req = ha->req_q_map[0]; 7848 7849 /* Load firmware blob. */ 7850 blob = qla2x00_request_firmware(vha); 7851 if (!blob) { 7852 ql_log(ql_log_info, vha, 0x0083, 7853 "Firmware image unavailable.\n"); 7854 ql_log(ql_log_info, vha, 0x0084, 7855 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7856 return QLA_FUNCTION_FAILED; 7857 } 7858 7859 rval = QLA_SUCCESS; 7860 7861 wcode = (uint16_t *)req->ring; 7862 *srisc_addr = 0; 7863 fwcode = (uint16_t *)blob->fw->data; 7864 fwclen = 0; 7865 7866 /* Validate firmware image by checking version. */ 7867 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7868 ql_log(ql_log_fatal, vha, 0x0085, 7869 "Unable to verify integrity of firmware image (%zd).\n", 7870 blob->fw->size); 7871 goto fail_fw_integrity; 7872 } 7873 for (i = 0; i < 4; i++) 7874 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7875 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7876 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7877 wcode[2] == 0 && wcode[3] == 0)) { 7878 ql_log(ql_log_fatal, vha, 0x0086, 7879 "Unable to verify integrity of firmware image.\n"); 7880 ql_log(ql_log_fatal, vha, 0x0087, 7881 "Firmware data: %04x %04x %04x %04x.\n", 7882 wcode[0], wcode[1], wcode[2], wcode[3]); 7883 goto fail_fw_integrity; 7884 } 7885 7886 seg = blob->segs; 7887 while (*seg && rval == QLA_SUCCESS) { 7888 risc_addr = *seg; 7889 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7890 risc_size = be16_to_cpu(fwcode[3]); 7891 7892 /* Validate firmware image size. */ 7893 fwclen += risc_size * sizeof(uint16_t); 7894 if (blob->fw->size < fwclen) { 7895 ql_log(ql_log_fatal, vha, 0x0088, 7896 "Unable to verify integrity of firmware image " 7897 "(%zd).\n", blob->fw->size); 7898 goto fail_fw_integrity; 7899 } 7900 7901 fragment = 0; 7902 while (risc_size > 0 && rval == QLA_SUCCESS) { 7903 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7904 if (wlen > risc_size) 7905 wlen = risc_size; 7906 ql_dbg(ql_dbg_init, vha, 0x0089, 7907 "Loading risc segment@ risc addr %x number of " 7908 "words 0x%x.\n", risc_addr, wlen); 7909 7910 for (i = 0; i < wlen; i++) 7911 wcode[i] = swab16(fwcode[i]); 7912 7913 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7914 wlen); 7915 if (rval) { 7916 ql_log(ql_log_fatal, vha, 0x008a, 7917 "Failed to load segment %d of firmware.\n", 7918 fragment); 7919 break; 7920 } 7921 7922 fwcode += wlen; 7923 risc_addr += wlen; 7924 risc_size -= wlen; 7925 fragment++; 7926 } 7927 7928 /* Next segment. */ 7929 seg++; 7930 } 7931 return rval; 7932 7933 fail_fw_integrity: 7934 return QLA_FUNCTION_FAILED; 7935 } 7936 7937 static int 7938 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7939 { 7940 int rval; 7941 uint templates, segments, fragment; 7942 uint32_t *dcode; 7943 ulong dlen; 7944 uint32_t risc_addr, risc_size, risc_attr = 0; 7945 ulong i; 7946 uint j; 7947 struct fw_blob *blob; 7948 uint32_t *fwcode; 7949 struct qla_hw_data *ha = vha->hw; 7950 struct req_que *req = ha->req_q_map[0]; 7951 struct fwdt *fwdt = ha->fwdt; 7952 7953 ql_dbg(ql_dbg_init, vha, 0x0090, 7954 "-> FW: Loading via request-firmware.\n"); 7955 7956 blob = qla2x00_request_firmware(vha); 7957 if (!blob) { 7958 ql_log(ql_log_warn, vha, 0x0092, 7959 "-> Firmware file not found.\n"); 7960 7961 return QLA_FUNCTION_FAILED; 7962 } 7963 7964 fwcode = (void *)blob->fw->data; 7965 dcode = fwcode; 7966 if (qla24xx_risc_firmware_invalid(dcode)) { 7967 ql_log(ql_log_fatal, vha, 0x0093, 7968 "Unable to verify integrity of firmware image (%zd).\n", 7969 blob->fw->size); 7970 ql_log(ql_log_fatal, vha, 0x0095, 7971 "Firmware data: %08x %08x %08x %08x.\n", 7972 dcode[0], dcode[1], dcode[2], dcode[3]); 7973 return QLA_FUNCTION_FAILED; 7974 } 7975 7976 dcode = (void *)req->ring; 7977 *srisc_addr = 0; 7978 segments = FA_RISC_CODE_SEGMENTS; 7979 for (j = 0; j < segments; j++) { 7980 ql_dbg(ql_dbg_init, vha, 0x0096, 7981 "-> Loading segment %u...\n", j); 7982 risc_addr = be32_to_cpu(fwcode[2]); 7983 risc_size = be32_to_cpu(fwcode[3]); 7984 7985 if (!*srisc_addr) { 7986 *srisc_addr = risc_addr; 7987 risc_attr = be32_to_cpu(fwcode[9]); 7988 } 7989 7990 dlen = ha->fw_transfer_size >> 2; 7991 for (fragment = 0; risc_size; fragment++) { 7992 if (dlen > risc_size) 7993 dlen = risc_size; 7994 7995 ql_dbg(ql_dbg_init, vha, 0x0097, 7996 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 7997 fragment, risc_addr, 7998 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 7999 dlen); 8000 8001 for (i = 0; i < dlen; i++) 8002 dcode[i] = swab32(fwcode[i]); 8003 8004 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8005 if (rval) { 8006 ql_log(ql_log_fatal, vha, 0x0098, 8007 "-> Failed load firmware fragment %u.\n", 8008 fragment); 8009 return QLA_FUNCTION_FAILED; 8010 } 8011 8012 fwcode += dlen; 8013 risc_addr += dlen; 8014 risc_size -= dlen; 8015 } 8016 } 8017 8018 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8019 return QLA_SUCCESS; 8020 8021 templates = (risc_attr & BIT_9) ? 2 : 1; 8022 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 8023 for (j = 0; j < templates; j++, fwdt++) { 8024 if (fwdt->template) 8025 vfree(fwdt->template); 8026 fwdt->template = NULL; 8027 fwdt->length = 0; 8028 8029 risc_size = be32_to_cpu(fwcode[2]); 8030 ql_dbg(ql_dbg_init, vha, 0x0171, 8031 "-> fwdt%u template array at %#x (%#x dwords)\n", 8032 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 8033 risc_size); 8034 if (!risc_size || !~risc_size) { 8035 ql_dbg(ql_dbg_init, vha, 0x0172, 8036 "-> fwdt%u failed to read array\n", j); 8037 goto failed; 8038 } 8039 8040 /* skip header and ignore checksum */ 8041 fwcode += 7; 8042 risc_size -= 8; 8043 8044 ql_dbg(ql_dbg_init, vha, 0x0173, 8045 "-> fwdt%u template allocate template %#x words...\n", 8046 j, risc_size); 8047 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8048 if (!fwdt->template) { 8049 ql_log(ql_log_warn, vha, 0x0174, 8050 "-> fwdt%u failed allocate template.\n", j); 8051 goto failed; 8052 } 8053 8054 dcode = fwdt->template; 8055 for (i = 0; i < risc_size; i++) 8056 dcode[i] = fwcode[i]; 8057 8058 if (!qla27xx_fwdt_template_valid(dcode)) { 8059 ql_log(ql_log_warn, vha, 0x0175, 8060 "-> fwdt%u failed template validate\n", j); 8061 goto failed; 8062 } 8063 8064 dlen = qla27xx_fwdt_template_size(dcode); 8065 ql_dbg(ql_dbg_init, vha, 0x0176, 8066 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8067 j, dlen, dlen / sizeof(*dcode)); 8068 if (dlen > risc_size * sizeof(*dcode)) { 8069 ql_log(ql_log_warn, vha, 0x0177, 8070 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8071 j, dlen - risc_size * sizeof(*dcode)); 8072 goto failed; 8073 } 8074 8075 fwdt->length = dlen; 8076 ql_dbg(ql_dbg_init, vha, 0x0178, 8077 "-> fwdt%u loaded template ok\n", j); 8078 8079 fwcode += risc_size + 1; 8080 } 8081 8082 return QLA_SUCCESS; 8083 8084 failed: 8085 if (fwdt->template) 8086 vfree(fwdt->template); 8087 fwdt->template = NULL; 8088 fwdt->length = 0; 8089 8090 return QLA_SUCCESS; 8091 } 8092 8093 int 8094 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8095 { 8096 int rval; 8097 8098 if (ql2xfwloadbin == 1) 8099 return qla81xx_load_risc(vha, srisc_addr); 8100 8101 /* 8102 * FW Load priority: 8103 * 1) Firmware via request-firmware interface (.bin file). 8104 * 2) Firmware residing in flash. 8105 */ 8106 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8107 if (rval == QLA_SUCCESS) 8108 return rval; 8109 8110 return qla24xx_load_risc_flash(vha, srisc_addr, 8111 vha->hw->flt_region_fw); 8112 } 8113 8114 int 8115 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8116 { 8117 int rval; 8118 struct qla_hw_data *ha = vha->hw; 8119 struct active_regions active_regions = { }; 8120 8121 if (ql2xfwloadbin == 2) 8122 goto try_blob_fw; 8123 8124 /* FW Load priority: 8125 * 1) Firmware residing in flash. 8126 * 2) Firmware via request-firmware interface (.bin file). 8127 * 3) Golden-Firmware residing in flash -- (limited operation). 8128 */ 8129 8130 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8131 goto try_primary_fw; 8132 8133 qla27xx_get_active_image(vha, &active_regions); 8134 8135 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8136 goto try_primary_fw; 8137 8138 ql_dbg(ql_dbg_init, vha, 0x008b, 8139 "Loading secondary firmware image.\n"); 8140 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8141 if (!rval) 8142 return rval; 8143 8144 try_primary_fw: 8145 ql_dbg(ql_dbg_init, vha, 0x008b, 8146 "Loading primary firmware image.\n"); 8147 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8148 if (!rval) 8149 return rval; 8150 8151 try_blob_fw: 8152 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8153 if (!rval || !ha->flt_region_gold_fw) 8154 return rval; 8155 8156 ql_log(ql_log_info, vha, 0x0099, 8157 "Attempting to fallback to golden firmware.\n"); 8158 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8159 if (rval) 8160 return rval; 8161 8162 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8163 ha->flags.running_gold_fw = 1; 8164 return rval; 8165 } 8166 8167 void 8168 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8169 { 8170 int ret, retries; 8171 struct qla_hw_data *ha = vha->hw; 8172 8173 if (ha->flags.pci_channel_io_perm_failure) 8174 return; 8175 if (!IS_FWI2_CAPABLE(ha)) 8176 return; 8177 if (!ha->fw_major_version) 8178 return; 8179 if (!ha->flags.fw_started) 8180 return; 8181 8182 ret = qla2x00_stop_firmware(vha); 8183 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8184 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8185 ha->isp_ops->reset_chip(vha); 8186 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8187 continue; 8188 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8189 continue; 8190 ql_log(ql_log_info, vha, 0x8015, 8191 "Attempting retry of stop-firmware command.\n"); 8192 ret = qla2x00_stop_firmware(vha); 8193 } 8194 8195 QLA_FW_STOPPED(ha); 8196 ha->flags.fw_init_done = 0; 8197 } 8198 8199 int 8200 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8201 { 8202 int rval = QLA_SUCCESS; 8203 int rval2; 8204 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8205 struct qla_hw_data *ha = vha->hw; 8206 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8207 8208 if (!vha->vp_idx) 8209 return -EINVAL; 8210 8211 rval = qla2x00_fw_ready(base_vha); 8212 8213 if (rval == QLA_SUCCESS) { 8214 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8215 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8216 } 8217 8218 vha->flags.management_server_logged_in = 0; 8219 8220 /* Login to SNS first */ 8221 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8222 BIT_1); 8223 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8224 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8225 ql_dbg(ql_dbg_init, vha, 0x0120, 8226 "Failed SNS login: loop_id=%x, rval2=%d\n", 8227 NPH_SNS, rval2); 8228 else 8229 ql_dbg(ql_dbg_init, vha, 0x0103, 8230 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8231 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8232 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8233 return (QLA_FUNCTION_FAILED); 8234 } 8235 8236 atomic_set(&vha->loop_down_timer, 0); 8237 atomic_set(&vha->loop_state, LOOP_UP); 8238 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8239 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8240 rval = qla2x00_loop_resync(base_vha); 8241 8242 return rval; 8243 } 8244 8245 /* 84XX Support **************************************************************/ 8246 8247 static LIST_HEAD(qla_cs84xx_list); 8248 static DEFINE_MUTEX(qla_cs84xx_mutex); 8249 8250 static struct qla_chip_state_84xx * 8251 qla84xx_get_chip(struct scsi_qla_host *vha) 8252 { 8253 struct qla_chip_state_84xx *cs84xx; 8254 struct qla_hw_data *ha = vha->hw; 8255 8256 mutex_lock(&qla_cs84xx_mutex); 8257 8258 /* Find any shared 84xx chip. */ 8259 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8260 if (cs84xx->bus == ha->pdev->bus) { 8261 kref_get(&cs84xx->kref); 8262 goto done; 8263 } 8264 } 8265 8266 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8267 if (!cs84xx) 8268 goto done; 8269 8270 kref_init(&cs84xx->kref); 8271 spin_lock_init(&cs84xx->access_lock); 8272 mutex_init(&cs84xx->fw_update_mutex); 8273 cs84xx->bus = ha->pdev->bus; 8274 8275 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8276 done: 8277 mutex_unlock(&qla_cs84xx_mutex); 8278 return cs84xx; 8279 } 8280 8281 static void 8282 __qla84xx_chip_release(struct kref *kref) 8283 { 8284 struct qla_chip_state_84xx *cs84xx = 8285 container_of(kref, struct qla_chip_state_84xx, kref); 8286 8287 mutex_lock(&qla_cs84xx_mutex); 8288 list_del(&cs84xx->list); 8289 mutex_unlock(&qla_cs84xx_mutex); 8290 kfree(cs84xx); 8291 } 8292 8293 void 8294 qla84xx_put_chip(struct scsi_qla_host *vha) 8295 { 8296 struct qla_hw_data *ha = vha->hw; 8297 8298 if (ha->cs84xx) 8299 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8300 } 8301 8302 static int 8303 qla84xx_init_chip(scsi_qla_host_t *vha) 8304 { 8305 int rval; 8306 uint16_t status[2]; 8307 struct qla_hw_data *ha = vha->hw; 8308 8309 mutex_lock(&ha->cs84xx->fw_update_mutex); 8310 8311 rval = qla84xx_verify_chip(vha, status); 8312 8313 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8314 8315 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8316 QLA_SUCCESS; 8317 } 8318 8319 /* 81XX Support **************************************************************/ 8320 8321 int 8322 qla81xx_nvram_config(scsi_qla_host_t *vha) 8323 { 8324 int rval; 8325 struct init_cb_81xx *icb; 8326 struct nvram_81xx *nv; 8327 uint32_t *dptr; 8328 uint8_t *dptr1, *dptr2; 8329 uint32_t chksum; 8330 uint16_t cnt; 8331 struct qla_hw_data *ha = vha->hw; 8332 uint32_t faddr; 8333 struct active_regions active_regions = { }; 8334 8335 rval = QLA_SUCCESS; 8336 icb = (struct init_cb_81xx *)ha->init_cb; 8337 nv = ha->nvram; 8338 8339 /* Determine NVRAM starting address. */ 8340 ha->nvram_size = sizeof(*nv); 8341 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8342 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8343 ha->vpd_size = FA_VPD_SIZE_82XX; 8344 8345 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8346 qla28xx_get_aux_images(vha, &active_regions); 8347 8348 /* Get VPD data into cache */ 8349 ha->vpd = ha->nvram + VPD_OFFSET; 8350 8351 faddr = ha->flt_region_vpd; 8352 if (IS_QLA28XX(ha)) { 8353 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8354 faddr = ha->flt_region_vpd_sec; 8355 ql_dbg(ql_dbg_init, vha, 0x0110, 8356 "Loading %s nvram image.\n", 8357 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8358 "primary" : "secondary"); 8359 } 8360 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8361 8362 /* Get NVRAM data into cache and calculate checksum. */ 8363 faddr = ha->flt_region_nvram; 8364 if (IS_QLA28XX(ha)) { 8365 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8366 faddr = ha->flt_region_nvram_sec; 8367 } 8368 ql_dbg(ql_dbg_init, vha, 0x0110, 8369 "Loading %s nvram image.\n", 8370 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8371 "primary" : "secondary"); 8372 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8373 8374 dptr = (uint32_t *)nv; 8375 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8376 chksum += le32_to_cpu(*dptr); 8377 8378 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8379 "Contents of NVRAM:\n"); 8380 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8381 nv, ha->nvram_size); 8382 8383 /* Bad NVRAM data, set defaults parameters. */ 8384 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 8385 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 8386 /* Reset NVRAM data. */ 8387 ql_log(ql_log_info, vha, 0x0073, 8388 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 8389 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 8390 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 8391 ql_log(ql_log_info, vha, 0x0074, 8392 "Falling back to functioning (yet invalid -- WWPN) " 8393 "defaults.\n"); 8394 8395 /* 8396 * Set default initialization control block. 8397 */ 8398 memset(nv, 0, ha->nvram_size); 8399 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8400 nv->version = cpu_to_le16(ICB_VERSION); 8401 nv->frame_payload_size = 2048; 8402 nv->execution_throttle = cpu_to_le16(0xFFFF); 8403 nv->exchange_count = cpu_to_le16(0); 8404 nv->port_name[0] = 0x21; 8405 nv->port_name[1] = 0x00 + ha->port_no + 1; 8406 nv->port_name[2] = 0x00; 8407 nv->port_name[3] = 0xe0; 8408 nv->port_name[4] = 0x8b; 8409 nv->port_name[5] = 0x1c; 8410 nv->port_name[6] = 0x55; 8411 nv->port_name[7] = 0x86; 8412 nv->node_name[0] = 0x20; 8413 nv->node_name[1] = 0x00; 8414 nv->node_name[2] = 0x00; 8415 nv->node_name[3] = 0xe0; 8416 nv->node_name[4] = 0x8b; 8417 nv->node_name[5] = 0x1c; 8418 nv->node_name[6] = 0x55; 8419 nv->node_name[7] = 0x86; 8420 nv->login_retry_count = cpu_to_le16(8); 8421 nv->interrupt_delay_timer = cpu_to_le16(0); 8422 nv->login_timeout = cpu_to_le16(0); 8423 nv->firmware_options_1 = 8424 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8425 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8426 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8427 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8428 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8429 nv->efi_parameters = cpu_to_le32(0); 8430 nv->reset_delay = 5; 8431 nv->max_luns_per_target = cpu_to_le16(128); 8432 nv->port_down_retry_count = cpu_to_le16(30); 8433 nv->link_down_timeout = cpu_to_le16(180); 8434 nv->enode_mac[0] = 0x00; 8435 nv->enode_mac[1] = 0xC0; 8436 nv->enode_mac[2] = 0xDD; 8437 nv->enode_mac[3] = 0x04; 8438 nv->enode_mac[4] = 0x05; 8439 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8440 8441 rval = 1; 8442 } 8443 8444 if (IS_T10_PI_CAPABLE(ha)) 8445 nv->frame_payload_size &= ~7; 8446 8447 qlt_81xx_config_nvram_stage1(vha, nv); 8448 8449 /* Reset Initialization control block */ 8450 memset(icb, 0, ha->init_cb_size); 8451 8452 /* Copy 1st segment. */ 8453 dptr1 = (uint8_t *)icb; 8454 dptr2 = (uint8_t *)&nv->version; 8455 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8456 while (cnt--) 8457 *dptr1++ = *dptr2++; 8458 8459 icb->login_retry_count = nv->login_retry_count; 8460 8461 /* Copy 2nd segment. */ 8462 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8463 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8464 cnt = (uint8_t *)&icb->reserved_5 - 8465 (uint8_t *)&icb->interrupt_delay_timer; 8466 while (cnt--) 8467 *dptr1++ = *dptr2++; 8468 8469 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8470 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8471 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8472 icb->enode_mac[0] = 0x00; 8473 icb->enode_mac[1] = 0xC0; 8474 icb->enode_mac[2] = 0xDD; 8475 icb->enode_mac[3] = 0x04; 8476 icb->enode_mac[4] = 0x05; 8477 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8478 } 8479 8480 /* Use extended-initialization control block. */ 8481 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8482 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8483 /* 8484 * Setup driver NVRAM options. 8485 */ 8486 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8487 "QLE8XXX"); 8488 8489 qlt_81xx_config_nvram_stage2(vha, icb); 8490 8491 /* Use alternate WWN? */ 8492 if (nv->host_p & cpu_to_le32(BIT_15)) { 8493 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8494 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8495 } 8496 8497 /* Prepare nodename */ 8498 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8499 /* 8500 * Firmware will apply the following mask if the nodename was 8501 * not provided. 8502 */ 8503 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8504 icb->node_name[0] &= 0xF0; 8505 } 8506 8507 /* Set host adapter parameters. */ 8508 ha->flags.disable_risc_code_load = 0; 8509 ha->flags.enable_lip_reset = 0; 8510 ha->flags.enable_lip_full_login = 8511 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 8512 ha->flags.enable_target_reset = 8513 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8514 ha->flags.enable_led_scheme = 0; 8515 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8516 8517 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8518 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8519 8520 /* save HBA serial number */ 8521 ha->serial0 = icb->port_name[5]; 8522 ha->serial1 = icb->port_name[6]; 8523 ha->serial2 = icb->port_name[7]; 8524 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8525 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8526 8527 icb->execution_throttle = cpu_to_le16(0xFFFF); 8528 8529 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8530 8531 /* Set minimum login_timeout to 4 seconds. */ 8532 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8533 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8534 if (le16_to_cpu(nv->login_timeout) < 4) 8535 nv->login_timeout = cpu_to_le16(4); 8536 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8537 8538 /* Set minimum RATOV to 100 tenths of a second. */ 8539 ha->r_a_tov = 100; 8540 8541 ha->loop_reset_delay = nv->reset_delay; 8542 8543 /* Link Down Timeout = 0: 8544 * 8545 * When Port Down timer expires we will start returning 8546 * I/O's to OS with "DID_NO_CONNECT". 8547 * 8548 * Link Down Timeout != 0: 8549 * 8550 * The driver waits for the link to come up after link down 8551 * before returning I/Os to OS with "DID_NO_CONNECT". 8552 */ 8553 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8554 ha->loop_down_abort_time = 8555 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8556 } else { 8557 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8558 ha->loop_down_abort_time = 8559 (LOOP_DOWN_TIME - ha->link_down_timeout); 8560 } 8561 8562 /* Need enough time to try and get the port back. */ 8563 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8564 if (qlport_down_retry) 8565 ha->port_down_retry_count = qlport_down_retry; 8566 8567 /* Set login_retry_count */ 8568 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8569 if (ha->port_down_retry_count == 8570 le16_to_cpu(nv->port_down_retry_count) && 8571 ha->port_down_retry_count > 3) 8572 ha->login_retry_count = ha->port_down_retry_count; 8573 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8574 ha->login_retry_count = ha->port_down_retry_count; 8575 if (ql2xloginretrycount) 8576 ha->login_retry_count = ql2xloginretrycount; 8577 8578 /* if not running MSI-X we need handshaking on interrupts */ 8579 if (!vha->hw->flags.msix_enabled && 8580 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 8581 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8582 8583 /* Enable ZIO. */ 8584 if (!vha->flags.init_done) { 8585 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8586 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8587 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8588 le16_to_cpu(icb->interrupt_delay_timer) : 2; 8589 } 8590 icb->firmware_options_2 &= cpu_to_le32( 8591 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8592 vha->flags.process_response_queue = 0; 8593 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8594 ha->zio_mode = QLA_ZIO_MODE_6; 8595 8596 ql_log(ql_log_info, vha, 0x0075, 8597 "ZIO mode %d enabled; timer delay (%d us).\n", 8598 ha->zio_mode, 8599 ha->zio_timer * 100); 8600 8601 icb->firmware_options_2 |= cpu_to_le32( 8602 (uint32_t)ha->zio_mode); 8603 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8604 vha->flags.process_response_queue = 1; 8605 } 8606 8607 /* enable RIDA Format2 */ 8608 icb->firmware_options_3 |= BIT_0; 8609 8610 /* N2N: driver will initiate Login instead of FW */ 8611 icb->firmware_options_3 |= BIT_8; 8612 8613 /* Determine NVMe/FCP priority for target ports */ 8614 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 8615 8616 if (rval) { 8617 ql_log(ql_log_warn, vha, 0x0076, 8618 "NVRAM configuration failed.\n"); 8619 } 8620 return (rval); 8621 } 8622 8623 int 8624 qla82xx_restart_isp(scsi_qla_host_t *vha) 8625 { 8626 int status, rval; 8627 struct qla_hw_data *ha = vha->hw; 8628 struct scsi_qla_host *vp; 8629 unsigned long flags; 8630 8631 status = qla2x00_init_rings(vha); 8632 if (!status) { 8633 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8634 ha->flags.chip_reset_done = 1; 8635 8636 status = qla2x00_fw_ready(vha); 8637 if (!status) { 8638 /* Issue a marker after FW becomes ready. */ 8639 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8640 vha->flags.online = 1; 8641 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8642 } 8643 8644 /* if no cable then assume it's good */ 8645 if ((vha->device_flags & DFLG_NO_CABLE)) 8646 status = 0; 8647 } 8648 8649 if (!status) { 8650 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8651 8652 if (!atomic_read(&vha->loop_down_timer)) { 8653 /* 8654 * Issue marker command only when we are going 8655 * to start the I/O . 8656 */ 8657 vha->marker_needed = 1; 8658 } 8659 8660 ha->isp_ops->enable_intrs(ha); 8661 8662 ha->isp_abort_cnt = 0; 8663 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8664 8665 /* Update the firmware version */ 8666 status = qla82xx_check_md_needed(vha); 8667 8668 if (ha->fce) { 8669 ha->flags.fce_enabled = 1; 8670 memset(ha->fce, 0, 8671 fce_calc_size(ha->fce_bufs)); 8672 rval = qla2x00_enable_fce_trace(vha, 8673 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8674 &ha->fce_bufs); 8675 if (rval) { 8676 ql_log(ql_log_warn, vha, 0x8001, 8677 "Unable to reinitialize FCE (%d).\n", 8678 rval); 8679 ha->flags.fce_enabled = 0; 8680 } 8681 } 8682 8683 if (ha->eft) { 8684 memset(ha->eft, 0, EFT_SIZE); 8685 rval = qla2x00_enable_eft_trace(vha, 8686 ha->eft_dma, EFT_NUM_BUFFERS); 8687 if (rval) { 8688 ql_log(ql_log_warn, vha, 0x8010, 8689 "Unable to reinitialize EFT (%d).\n", 8690 rval); 8691 } 8692 } 8693 } 8694 8695 if (!status) { 8696 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8697 "qla82xx_restart_isp succeeded.\n"); 8698 8699 spin_lock_irqsave(&ha->vport_slock, flags); 8700 list_for_each_entry(vp, &ha->vp_list, list) { 8701 if (vp->vp_idx) { 8702 atomic_inc(&vp->vref_count); 8703 spin_unlock_irqrestore(&ha->vport_slock, flags); 8704 8705 qla2x00_vp_abort_isp(vp); 8706 8707 spin_lock_irqsave(&ha->vport_slock, flags); 8708 atomic_dec(&vp->vref_count); 8709 } 8710 } 8711 spin_unlock_irqrestore(&ha->vport_slock, flags); 8712 8713 } else { 8714 ql_log(ql_log_warn, vha, 0x8016, 8715 "qla82xx_restart_isp **** FAILED ****.\n"); 8716 } 8717 8718 return status; 8719 } 8720 8721 /* 8722 * qla24xx_get_fcp_prio 8723 * Gets the fcp cmd priority value for the logged in port. 8724 * Looks for a match of the port descriptors within 8725 * each of the fcp prio config entries. If a match is found, 8726 * the tag (priority) value is returned. 8727 * 8728 * Input: 8729 * vha = scsi host structure pointer. 8730 * fcport = port structure pointer. 8731 * 8732 * Return: 8733 * non-zero (if found) 8734 * -1 (if not found) 8735 * 8736 * Context: 8737 * Kernel context 8738 */ 8739 static int 8740 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8741 { 8742 int i, entries; 8743 uint8_t pid_match, wwn_match; 8744 int priority; 8745 uint32_t pid1, pid2; 8746 uint64_t wwn1, wwn2; 8747 struct qla_fcp_prio_entry *pri_entry; 8748 struct qla_hw_data *ha = vha->hw; 8749 8750 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8751 return -1; 8752 8753 priority = -1; 8754 entries = ha->fcp_prio_cfg->num_entries; 8755 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8756 8757 for (i = 0; i < entries; i++) { 8758 pid_match = wwn_match = 0; 8759 8760 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8761 pri_entry++; 8762 continue; 8763 } 8764 8765 /* check source pid for a match */ 8766 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8767 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8768 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8769 if (pid1 == INVALID_PORT_ID) 8770 pid_match++; 8771 else if (pid1 == pid2) 8772 pid_match++; 8773 } 8774 8775 /* check destination pid for a match */ 8776 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8777 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8778 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8779 if (pid1 == INVALID_PORT_ID) 8780 pid_match++; 8781 else if (pid1 == pid2) 8782 pid_match++; 8783 } 8784 8785 /* check source WWN for a match */ 8786 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8787 wwn1 = wwn_to_u64(vha->port_name); 8788 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8789 if (wwn2 == (uint64_t)-1) 8790 wwn_match++; 8791 else if (wwn1 == wwn2) 8792 wwn_match++; 8793 } 8794 8795 /* check destination WWN for a match */ 8796 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8797 wwn1 = wwn_to_u64(fcport->port_name); 8798 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8799 if (wwn2 == (uint64_t)-1) 8800 wwn_match++; 8801 else if (wwn1 == wwn2) 8802 wwn_match++; 8803 } 8804 8805 if (pid_match == 2 || wwn_match == 2) { 8806 /* Found a matching entry */ 8807 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8808 priority = pri_entry->tag; 8809 break; 8810 } 8811 8812 pri_entry++; 8813 } 8814 8815 return priority; 8816 } 8817 8818 /* 8819 * qla24xx_update_fcport_fcp_prio 8820 * Activates fcp priority for the logged in fc port 8821 * 8822 * Input: 8823 * vha = scsi host structure pointer. 8824 * fcp = port structure pointer. 8825 * 8826 * Return: 8827 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8828 * 8829 * Context: 8830 * Kernel context. 8831 */ 8832 int 8833 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8834 { 8835 int ret; 8836 int priority; 8837 uint16_t mb[5]; 8838 8839 if (fcport->port_type != FCT_TARGET || 8840 fcport->loop_id == FC_NO_LOOP_ID) 8841 return QLA_FUNCTION_FAILED; 8842 8843 priority = qla24xx_get_fcp_prio(vha, fcport); 8844 if (priority < 0) 8845 return QLA_FUNCTION_FAILED; 8846 8847 if (IS_P3P_TYPE(vha->hw)) { 8848 fcport->fcp_prio = priority & 0xf; 8849 return QLA_SUCCESS; 8850 } 8851 8852 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8853 if (ret == QLA_SUCCESS) { 8854 if (fcport->fcp_prio != priority) 8855 ql_dbg(ql_dbg_user, vha, 0x709e, 8856 "Updated FCP_CMND priority - value=%d loop_id=%d " 8857 "port_id=%02x%02x%02x.\n", priority, 8858 fcport->loop_id, fcport->d_id.b.domain, 8859 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8860 fcport->fcp_prio = priority & 0xf; 8861 } else 8862 ql_dbg(ql_dbg_user, vha, 0x704f, 8863 "Unable to update FCP_CMND priority - ret=0x%x for " 8864 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8865 fcport->d_id.b.domain, fcport->d_id.b.area, 8866 fcport->d_id.b.al_pa); 8867 return ret; 8868 } 8869 8870 /* 8871 * qla24xx_update_all_fcp_prio 8872 * Activates fcp priority for all the logged in ports 8873 * 8874 * Input: 8875 * ha = adapter block pointer. 8876 * 8877 * Return: 8878 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8879 * 8880 * Context: 8881 * Kernel context. 8882 */ 8883 int 8884 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8885 { 8886 int ret; 8887 fc_port_t *fcport; 8888 8889 ret = QLA_FUNCTION_FAILED; 8890 /* We need to set priority for all logged in ports */ 8891 list_for_each_entry(fcport, &vha->vp_fcports, list) 8892 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8893 8894 return ret; 8895 } 8896 8897 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8898 int vp_idx, bool startqp) 8899 { 8900 int rsp_id = 0; 8901 int req_id = 0; 8902 int i; 8903 struct qla_hw_data *ha = vha->hw; 8904 uint16_t qpair_id = 0; 8905 struct qla_qpair *qpair = NULL; 8906 struct qla_msix_entry *msix; 8907 8908 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8909 ql_log(ql_log_warn, vha, 0x00181, 8910 "FW/Driver is not multi-queue capable.\n"); 8911 return NULL; 8912 } 8913 8914 if (ql2xmqsupport || ql2xnvmeenable) { 8915 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8916 if (qpair == NULL) { 8917 ql_log(ql_log_warn, vha, 0x0182, 8918 "Failed to allocate memory for queue pair.\n"); 8919 return NULL; 8920 } 8921 8922 qpair->hw = vha->hw; 8923 qpair->vha = vha; 8924 qpair->qp_lock_ptr = &qpair->qp_lock; 8925 spin_lock_init(&qpair->qp_lock); 8926 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8927 8928 /* Assign available que pair id */ 8929 mutex_lock(&ha->mq_lock); 8930 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8931 if (ha->num_qpairs >= ha->max_qpairs) { 8932 mutex_unlock(&ha->mq_lock); 8933 ql_log(ql_log_warn, vha, 0x0183, 8934 "No resources to create additional q pair.\n"); 8935 goto fail_qid_map; 8936 } 8937 ha->num_qpairs++; 8938 set_bit(qpair_id, ha->qpair_qid_map); 8939 ha->queue_pair_map[qpair_id] = qpair; 8940 qpair->id = qpair_id; 8941 qpair->vp_idx = vp_idx; 8942 qpair->fw_started = ha->flags.fw_started; 8943 INIT_LIST_HEAD(&qpair->hints_list); 8944 qpair->chip_reset = ha->base_qpair->chip_reset; 8945 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8946 qpair->enable_explicit_conf = 8947 ha->base_qpair->enable_explicit_conf; 8948 8949 for (i = 0; i < ha->msix_count; i++) { 8950 msix = &ha->msix_entries[i]; 8951 if (msix->in_use) 8952 continue; 8953 qpair->msix = msix; 8954 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8955 "Vector %x selected for qpair\n", msix->vector); 8956 break; 8957 } 8958 if (!qpair->msix) { 8959 ql_log(ql_log_warn, vha, 0x0184, 8960 "Out of MSI-X vectors!.\n"); 8961 goto fail_msix; 8962 } 8963 8964 qpair->msix->in_use = 1; 8965 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8966 qpair->pdev = ha->pdev; 8967 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 8968 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8969 8970 mutex_unlock(&ha->mq_lock); 8971 8972 /* Create response queue first */ 8973 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8974 if (!rsp_id) { 8975 ql_log(ql_log_warn, vha, 0x0185, 8976 "Failed to create response queue.\n"); 8977 goto fail_rsp; 8978 } 8979 8980 qpair->rsp = ha->rsp_q_map[rsp_id]; 8981 8982 /* Create request queue */ 8983 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8984 startqp); 8985 if (!req_id) { 8986 ql_log(ql_log_warn, vha, 0x0186, 8987 "Failed to create request queue.\n"); 8988 goto fail_req; 8989 } 8990 8991 qpair->req = ha->req_q_map[req_id]; 8992 qpair->rsp->req = qpair->req; 8993 qpair->rsp->qpair = qpair; 8994 /* init qpair to this cpu. Will adjust at run time. */ 8995 qla_cpu_update(qpair, smp_processor_id()); 8996 8997 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8998 if (ha->fw_attributes & BIT_4) 8999 qpair->difdix_supported = 1; 9000 } 9001 9002 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 9003 if (!qpair->srb_mempool) { 9004 ql_log(ql_log_warn, vha, 0xd036, 9005 "Failed to create srb mempool for qpair %d\n", 9006 qpair->id); 9007 goto fail_mempool; 9008 } 9009 9010 /* Mark as online */ 9011 qpair->online = 1; 9012 9013 if (!vha->flags.qpairs_available) 9014 vha->flags.qpairs_available = 1; 9015 9016 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 9017 "Request/Response queue pair created, id %d\n", 9018 qpair->id); 9019 ql_dbg(ql_dbg_init, vha, 0x0187, 9020 "Request/Response queue pair created, id %d\n", 9021 qpair->id); 9022 } 9023 return qpair; 9024 9025 fail_mempool: 9026 fail_req: 9027 qla25xx_delete_rsp_que(vha, qpair->rsp); 9028 fail_rsp: 9029 mutex_lock(&ha->mq_lock); 9030 qpair->msix->in_use = 0; 9031 list_del(&qpair->qp_list_elem); 9032 if (list_empty(&vha->qp_list)) 9033 vha->flags.qpairs_available = 0; 9034 fail_msix: 9035 ha->queue_pair_map[qpair_id] = NULL; 9036 clear_bit(qpair_id, ha->qpair_qid_map); 9037 ha->num_qpairs--; 9038 mutex_unlock(&ha->mq_lock); 9039 fail_qid_map: 9040 kfree(qpair); 9041 return NULL; 9042 } 9043 9044 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9045 { 9046 int ret = QLA_FUNCTION_FAILED; 9047 struct qla_hw_data *ha = qpair->hw; 9048 9049 qpair->delete_in_progress = 1; 9050 9051 ret = qla25xx_delete_req_que(vha, qpair->req); 9052 if (ret != QLA_SUCCESS) 9053 goto fail; 9054 9055 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9056 if (ret != QLA_SUCCESS) 9057 goto fail; 9058 9059 mutex_lock(&ha->mq_lock); 9060 ha->queue_pair_map[qpair->id] = NULL; 9061 clear_bit(qpair->id, ha->qpair_qid_map); 9062 ha->num_qpairs--; 9063 list_del(&qpair->qp_list_elem); 9064 if (list_empty(&vha->qp_list)) { 9065 vha->flags.qpairs_available = 0; 9066 vha->flags.qpairs_req_created = 0; 9067 vha->flags.qpairs_rsp_created = 0; 9068 } 9069 mempool_destroy(qpair->srb_mempool); 9070 kfree(qpair); 9071 mutex_unlock(&ha->mq_lock); 9072 9073 return QLA_SUCCESS; 9074 fail: 9075 return ret; 9076 } 9077