1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #include "qla_def.h" 7 #include "qla_gbl.h" 8 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/vmalloc.h> 12 13 #include "qla_devtbl.h" 14 15 #ifdef CONFIG_SPARC 16 #include <asm/prom.h> 17 #endif 18 19 #include "qla_target.h" 20 21 /* 22 * QLogic ISP2x00 Hardware Support Function Prototypes. 23 */ 24 static int qla2x00_isp_firmware(scsi_qla_host_t *); 25 static int qla2x00_setup_chip(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 32 static int qla2x00_restart_isp(scsi_qla_host_t *); 33 34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 35 static int qla84xx_init_chip(scsi_qla_host_t *); 36 static int qla25xx_init_queues(struct qla_hw_data *); 37 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 38 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 39 struct event_arg *ea); 40 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 43 44 /* SRB Extensions ---------------------------------------------------------- */ 45 46 void 47 qla2x00_sp_timeout(struct timer_list *t) 48 { 49 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 50 struct srb_iocb *iocb; 51 52 WARN_ON(irqs_disabled()); 53 iocb = &sp->u.iocb_cmd; 54 iocb->timeout(sp); 55 } 56 57 void qla2x00_sp_free(srb_t *sp) 58 { 59 struct srb_iocb *iocb = &sp->u.iocb_cmd; 60 61 del_timer(&iocb->timer); 62 qla2x00_rel_sp(sp); 63 } 64 65 void qla2xxx_rel_done_warning(srb_t *sp, int res) 66 { 67 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp); 68 } 69 70 void qla2xxx_rel_free_warning(srb_t *sp) 71 { 72 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (IS_QLAFX00(ha)) { 86 tmo = FX00_DEF_RATOV * 2; 87 } else if (!IS_FWI2_CAPABLE(ha)) { 88 /* 89 * Except for earlier ISPs where the timeout is seeded from the 90 * initialization control block. 91 */ 92 tmo = ha->login_timeout; 93 } 94 return tmo; 95 } 96 97 static void qla24xx_abort_iocb_timeout(void *data) 98 { 99 srb_t *sp = data; 100 struct srb_iocb *abt = &sp->u.iocb_cmd; 101 struct qla_qpair *qpair = sp->qpair; 102 u32 handle; 103 unsigned long flags; 104 105 if (sp->cmd_sp) 106 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 107 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 108 sp->cmd_sp->handle, sp->cmd_sp->type, 109 sp->handle, sp->type); 110 else 111 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 112 "Abort timeout 2 - hdl=%x, type=%x\n", 113 sp->handle, sp->type); 114 115 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 116 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 117 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 118 sp->cmd_sp)) 119 qpair->req->outstanding_cmds[handle] = NULL; 120 121 /* removing the abort */ 122 if (qpair->req->outstanding_cmds[handle] == sp) { 123 qpair->req->outstanding_cmds[handle] = NULL; 124 break; 125 } 126 } 127 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 128 129 if (sp->cmd_sp) 130 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 131 132 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT); 133 sp->done(sp, QLA_OS_TIMER_EXPIRED); 134 } 135 136 static void qla24xx_abort_sp_done(srb_t *sp, int res) 137 { 138 struct srb_iocb *abt = &sp->u.iocb_cmd; 139 140 del_timer(&sp->u.iocb_cmd.timer); 141 if (sp->flags & SRB_WAKEUP_ON_COMP) 142 complete(&abt->u.abt.comp); 143 else 144 sp->free(sp); 145 } 146 147 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 148 { 149 scsi_qla_host_t *vha = cmd_sp->vha; 150 struct srb_iocb *abt_iocb; 151 srb_t *sp; 152 int rval = QLA_FUNCTION_FAILED; 153 154 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 155 GFP_ATOMIC); 156 if (!sp) 157 return rval; 158 159 abt_iocb = &sp->u.iocb_cmd; 160 sp->type = SRB_ABT_CMD; 161 sp->name = "abort"; 162 sp->qpair = cmd_sp->qpair; 163 sp->cmd_sp = cmd_sp; 164 if (wait) 165 sp->flags = SRB_WAKEUP_ON_COMP; 166 167 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 168 init_completion(&abt_iocb->u.abt.comp); 169 /* FW can send 2 x ABTS's timeout/20s */ 170 qla2x00_init_timer(sp, 42); 171 172 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 173 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 174 175 sp->done = qla24xx_abort_sp_done; 176 177 ql_dbg(ql_dbg_async, vha, 0x507c, 178 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 179 cmd_sp->type); 180 181 rval = qla2x00_start_sp(sp); 182 if (rval != QLA_SUCCESS) { 183 sp->free(sp); 184 return rval; 185 } 186 187 if (wait) { 188 wait_for_completion(&abt_iocb->u.abt.comp); 189 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 190 QLA_SUCCESS : QLA_FUNCTION_FAILED; 191 sp->free(sp); 192 } 193 194 return rval; 195 } 196 197 void 198 qla2x00_async_iocb_timeout(void *data) 199 { 200 srb_t *sp = data; 201 fc_port_t *fcport = sp->fcport; 202 struct srb_iocb *lio = &sp->u.iocb_cmd; 203 int rc, h; 204 unsigned long flags; 205 206 if (fcport) { 207 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 208 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 209 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 210 211 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 212 } else { 213 pr_info("Async-%s timeout - hdl=%x.\n", 214 sp->name, sp->handle); 215 } 216 217 switch (sp->type) { 218 case SRB_LOGIN_CMD: 219 rc = qla24xx_async_abort_cmd(sp, false); 220 if (rc) { 221 /* Retry as needed. */ 222 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 223 lio->u.logio.data[1] = 224 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 225 QLA_LOGIO_LOGIN_RETRIED : 0; 226 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 227 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 228 h++) { 229 if (sp->qpair->req->outstanding_cmds[h] == 230 sp) { 231 sp->qpair->req->outstanding_cmds[h] = 232 NULL; 233 break; 234 } 235 } 236 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 237 sp->done(sp, QLA_FUNCTION_TIMEOUT); 238 } 239 break; 240 case SRB_LOGOUT_CMD: 241 case SRB_CT_PTHRU_CMD: 242 case SRB_MB_IOCB: 243 case SRB_NACK_PLOGI: 244 case SRB_NACK_PRLI: 245 case SRB_NACK_LOGO: 246 case SRB_CTRL_VP: 247 default: 248 rc = qla24xx_async_abort_cmd(sp, false); 249 if (rc) { 250 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 251 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 252 h++) { 253 if (sp->qpair->req->outstanding_cmds[h] == 254 sp) { 255 sp->qpair->req->outstanding_cmds[h] = 256 NULL; 257 break; 258 } 259 } 260 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 261 sp->done(sp, QLA_FUNCTION_TIMEOUT); 262 } 263 break; 264 } 265 } 266 267 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 268 { 269 struct scsi_qla_host *vha = sp->vha; 270 struct srb_iocb *lio = &sp->u.iocb_cmd; 271 struct event_arg ea; 272 273 ql_dbg(ql_dbg_disc, vha, 0x20dd, 274 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 275 276 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 277 278 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 279 memset(&ea, 0, sizeof(ea)); 280 ea.fcport = sp->fcport; 281 ea.data[0] = lio->u.logio.data[0]; 282 ea.data[1] = lio->u.logio.data[1]; 283 ea.iop[0] = lio->u.logio.iop[0]; 284 ea.iop[1] = lio->u.logio.iop[1]; 285 ea.sp = sp; 286 qla24xx_handle_plogi_done_event(vha, &ea); 287 } 288 289 sp->free(sp); 290 } 291 292 static inline bool 293 fcport_is_smaller(fc_port_t *fcport) 294 { 295 if (wwn_to_u64(fcport->port_name) < 296 wwn_to_u64(fcport->vha->port_name)) 297 return true; 298 else 299 return false; 300 } 301 302 static inline bool 303 fcport_is_bigger(fc_port_t *fcport) 304 { 305 return !fcport_is_smaller(fcport); 306 } 307 308 int 309 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 310 uint16_t *data) 311 { 312 srb_t *sp; 313 struct srb_iocb *lio; 314 int rval = QLA_FUNCTION_FAILED; 315 316 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 317 fcport->loop_id == FC_NO_LOOP_ID) { 318 ql_log(ql_log_warn, vha, 0xffff, 319 "%s: %8phC - not sending command.\n", 320 __func__, fcport->port_name); 321 return rval; 322 } 323 324 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 325 if (!sp) 326 goto done; 327 328 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 329 fcport->flags |= FCF_ASYNC_SENT; 330 fcport->logout_completed = 0; 331 332 sp->type = SRB_LOGIN_CMD; 333 sp->name = "login"; 334 sp->gen1 = fcport->rscn_gen; 335 sp->gen2 = fcport->login_gen; 336 337 lio = &sp->u.iocb_cmd; 338 lio->timeout = qla2x00_async_iocb_timeout; 339 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 340 341 sp->done = qla2x00_async_login_sp_done; 342 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) 343 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 344 else 345 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 346 347 if (NVME_TARGET(vha->hw, fcport)) 348 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 349 350 ql_dbg(ql_dbg_disc, vha, 0x2072, 351 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 352 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 353 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 354 fcport->login_retry); 355 356 rval = qla2x00_start_sp(sp); 357 if (rval != QLA_SUCCESS) { 358 fcport->flags |= FCF_LOGIN_NEEDED; 359 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 360 goto done_free_sp; 361 } 362 363 return rval; 364 365 done_free_sp: 366 sp->free(sp); 367 fcport->flags &= ~FCF_ASYNC_SENT; 368 done: 369 fcport->flags &= ~FCF_ASYNC_ACTIVE; 370 return rval; 371 } 372 373 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 374 { 375 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 376 sp->fcport->login_gen++; 377 qlt_logo_completion_handler(sp->fcport, res); 378 sp->free(sp); 379 } 380 381 int 382 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 383 { 384 srb_t *sp; 385 struct srb_iocb *lio; 386 int rval = QLA_FUNCTION_FAILED; 387 388 fcport->flags |= FCF_ASYNC_SENT; 389 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 390 if (!sp) 391 goto done; 392 393 sp->type = SRB_LOGOUT_CMD; 394 sp->name = "logout"; 395 396 lio = &sp->u.iocb_cmd; 397 lio->timeout = qla2x00_async_iocb_timeout; 398 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 399 400 sp->done = qla2x00_async_logout_sp_done; 401 402 ql_dbg(ql_dbg_disc, vha, 0x2070, 403 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 404 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 405 fcport->d_id.b.area, fcport->d_id.b.al_pa, 406 fcport->port_name); 407 408 rval = qla2x00_start_sp(sp); 409 if (rval != QLA_SUCCESS) 410 goto done_free_sp; 411 return rval; 412 413 done_free_sp: 414 sp->free(sp); 415 done: 416 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 417 return rval; 418 } 419 420 void 421 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 422 uint16_t *data) 423 { 424 fcport->flags &= ~FCF_ASYNC_ACTIVE; 425 /* Don't re-login in target mode */ 426 if (!fcport->tgt_session) 427 qla2x00_mark_device_lost(vha, fcport, 1); 428 qlt_logo_completion_handler(fcport, data[0]); 429 } 430 431 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 432 { 433 struct srb_iocb *lio = &sp->u.iocb_cmd; 434 struct scsi_qla_host *vha = sp->vha; 435 436 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 437 if (!test_bit(UNLOADING, &vha->dpc_flags)) 438 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 439 lio->u.logio.data); 440 sp->free(sp); 441 } 442 443 int 444 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 445 { 446 srb_t *sp; 447 struct srb_iocb *lio; 448 int rval; 449 450 rval = QLA_FUNCTION_FAILED; 451 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 452 if (!sp) 453 goto done; 454 455 sp->type = SRB_PRLO_CMD; 456 sp->name = "prlo"; 457 458 lio = &sp->u.iocb_cmd; 459 lio->timeout = qla2x00_async_iocb_timeout; 460 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 461 462 sp->done = qla2x00_async_prlo_sp_done; 463 464 ql_dbg(ql_dbg_disc, vha, 0x2070, 465 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 466 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 467 fcport->d_id.b.area, fcport->d_id.b.al_pa); 468 469 rval = qla2x00_start_sp(sp); 470 if (rval != QLA_SUCCESS) 471 goto done_free_sp; 472 473 return rval; 474 475 done_free_sp: 476 sp->free(sp); 477 done: 478 fcport->flags &= ~FCF_ASYNC_ACTIVE; 479 return rval; 480 } 481 482 static 483 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 484 { 485 struct fc_port *fcport = ea->fcport; 486 487 ql_dbg(ql_dbg_disc, vha, 0x20d2, 488 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 489 __func__, fcport->port_name, fcport->disc_state, 490 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 491 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 492 493 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 494 ea->data[0]); 495 496 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 497 ql_dbg(ql_dbg_disc, vha, 0x2066, 498 "%s %8phC: adisc fail: post delete\n", 499 __func__, ea->fcport->port_name); 500 /* deleted = 0 & logout_on_delete = force fw cleanup */ 501 fcport->deleted = 0; 502 fcport->logout_on_delete = 1; 503 qlt_schedule_sess_for_deletion(ea->fcport); 504 return; 505 } 506 507 if (ea->fcport->disc_state == DSC_DELETE_PEND) 508 return; 509 510 if (ea->sp->gen2 != ea->fcport->login_gen) { 511 /* target side must have changed it. */ 512 ql_dbg(ql_dbg_disc, vha, 0x20d3, 513 "%s %8phC generation changed\n", 514 __func__, ea->fcport->port_name); 515 return; 516 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 517 qla_rscn_replay(fcport); 518 qlt_schedule_sess_for_deletion(fcport); 519 return; 520 } 521 522 __qla24xx_handle_gpdb_event(vha, ea); 523 } 524 525 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 526 { 527 struct qla_work_evt *e; 528 529 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 530 if (!e) 531 return QLA_FUNCTION_FAILED; 532 533 e->u.fcport.fcport = fcport; 534 fcport->flags |= FCF_ASYNC_ACTIVE; 535 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND); 536 return qla2x00_post_work(vha, e); 537 } 538 539 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 540 { 541 struct scsi_qla_host *vha = sp->vha; 542 struct event_arg ea; 543 struct srb_iocb *lio = &sp->u.iocb_cmd; 544 545 ql_dbg(ql_dbg_disc, vha, 0x2066, 546 "Async done-%s res %x %8phC\n", 547 sp->name, res, sp->fcport->port_name); 548 549 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 550 551 memset(&ea, 0, sizeof(ea)); 552 ea.rc = res; 553 ea.data[0] = lio->u.logio.data[0]; 554 ea.data[1] = lio->u.logio.data[1]; 555 ea.iop[0] = lio->u.logio.iop[0]; 556 ea.iop[1] = lio->u.logio.iop[1]; 557 ea.fcport = sp->fcport; 558 ea.sp = sp; 559 560 qla24xx_handle_adisc_event(vha, &ea); 561 562 sp->free(sp); 563 } 564 565 int 566 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 567 uint16_t *data) 568 { 569 srb_t *sp; 570 struct srb_iocb *lio; 571 int rval = QLA_FUNCTION_FAILED; 572 573 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 574 return rval; 575 576 fcport->flags |= FCF_ASYNC_SENT; 577 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 578 if (!sp) 579 goto done; 580 581 sp->type = SRB_ADISC_CMD; 582 sp->name = "adisc"; 583 584 lio = &sp->u.iocb_cmd; 585 lio->timeout = qla2x00_async_iocb_timeout; 586 sp->gen1 = fcport->rscn_gen; 587 sp->gen2 = fcport->login_gen; 588 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 589 590 sp->done = qla2x00_async_adisc_sp_done; 591 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 592 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 593 594 ql_dbg(ql_dbg_disc, vha, 0x206f, 595 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 596 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 597 598 rval = qla2x00_start_sp(sp); 599 if (rval != QLA_SUCCESS) 600 goto done_free_sp; 601 602 return rval; 603 604 done_free_sp: 605 sp->free(sp); 606 done: 607 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 608 qla2x00_post_async_adisc_work(vha, fcport, data); 609 return rval; 610 } 611 612 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 613 { 614 struct qla_hw_data *ha = vha->hw; 615 616 if (IS_FWI2_CAPABLE(ha)) 617 return loop_id > NPH_LAST_HANDLE; 618 619 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 620 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 621 } 622 623 /** 624 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 625 * @vha: adapter state pointer. 626 * @dev: port structure pointer. 627 * 628 * Returns: 629 * qla2x00 local function return status code. 630 * 631 * Context: 632 * Kernel context. 633 */ 634 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 635 { 636 int rval; 637 struct qla_hw_data *ha = vha->hw; 638 unsigned long flags = 0; 639 640 rval = QLA_SUCCESS; 641 642 spin_lock_irqsave(&ha->vport_slock, flags); 643 644 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 645 if (dev->loop_id >= LOOPID_MAP_SIZE || 646 qla2x00_is_reserved_id(vha, dev->loop_id)) { 647 dev->loop_id = FC_NO_LOOP_ID; 648 rval = QLA_FUNCTION_FAILED; 649 } else { 650 set_bit(dev->loop_id, ha->loop_id_map); 651 } 652 spin_unlock_irqrestore(&ha->vport_slock, flags); 653 654 if (rval == QLA_SUCCESS) 655 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 656 "Assigning new loopid=%x, portid=%x.\n", 657 dev->loop_id, dev->d_id.b24); 658 else 659 ql_log(ql_log_warn, dev->vha, 0x2087, 660 "No loop_id's available, portid=%x.\n", 661 dev->d_id.b24); 662 663 return rval; 664 } 665 666 void qla2x00_clear_loop_id(fc_port_t *fcport) 667 { 668 struct qla_hw_data *ha = fcport->vha->hw; 669 670 if (fcport->loop_id == FC_NO_LOOP_ID || 671 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 672 return; 673 674 clear_bit(fcport->loop_id, ha->loop_id_map); 675 fcport->loop_id = FC_NO_LOOP_ID; 676 } 677 678 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 679 struct event_arg *ea) 680 { 681 fc_port_t *fcport, *conflict_fcport; 682 struct get_name_list_extended *e; 683 u16 i, n, found = 0, loop_id; 684 port_id_t id; 685 u64 wwn; 686 u16 data[2]; 687 u8 current_login_state, nvme_cls; 688 689 fcport = ea->fcport; 690 ql_dbg(ql_dbg_disc, vha, 0xffff, 691 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 692 __func__, fcport->port_name, fcport->disc_state, 693 fcport->fw_login_state, ea->rc, 694 fcport->login_gen, fcport->last_login_gen, 695 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 696 697 if (fcport->disc_state == DSC_DELETE_PEND) 698 return; 699 700 if (ea->rc) { /* rval */ 701 if (fcport->login_retry == 0) { 702 ql_dbg(ql_dbg_disc, vha, 0x20de, 703 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 704 fcport->port_name, fcport->login_retry); 705 } 706 return; 707 } 708 709 if (fcport->last_rscn_gen != fcport->rscn_gen) { 710 qla_rscn_replay(fcport); 711 qlt_schedule_sess_for_deletion(fcport); 712 return; 713 } else if (fcport->last_login_gen != fcport->login_gen) { 714 ql_dbg(ql_dbg_disc, vha, 0x20e0, 715 "%s %8phC login gen changed\n", 716 __func__, fcport->port_name); 717 return; 718 } 719 720 n = ea->data[0] / sizeof(struct get_name_list_extended); 721 722 ql_dbg(ql_dbg_disc, vha, 0x20e1, 723 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 724 __func__, __LINE__, fcport->port_name, n, 725 fcport->d_id.b.domain, fcport->d_id.b.area, 726 fcport->d_id.b.al_pa, fcport->loop_id); 727 728 for (i = 0; i < n; i++) { 729 e = &vha->gnl.l[i]; 730 wwn = wwn_to_u64(e->port_name); 731 id.b.domain = e->port_id[2]; 732 id.b.area = e->port_id[1]; 733 id.b.al_pa = e->port_id[0]; 734 id.b.rsvd_1 = 0; 735 736 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 737 continue; 738 739 if (IS_SW_RESV_ADDR(id)) 740 continue; 741 742 found = 1; 743 744 loop_id = le16_to_cpu(e->nport_handle); 745 loop_id = (loop_id & 0x7fff); 746 nvme_cls = e->current_login_state >> 4; 747 current_login_state = e->current_login_state & 0xf; 748 749 if (PRLI_PHASE(nvme_cls)) { 750 current_login_state = nvme_cls; 751 fcport->fc4_type &= ~FS_FC4TYPE_FCP; 752 fcport->fc4_type |= FS_FC4TYPE_NVME; 753 } else if (PRLI_PHASE(current_login_state)) { 754 fcport->fc4_type |= FS_FC4TYPE_FCP; 755 fcport->fc4_type &= ~FS_FC4TYPE_NVME; 756 } 757 758 ql_dbg(ql_dbg_disc, vha, 0x20e2, 759 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 760 __func__, fcport->port_name, 761 e->current_login_state, fcport->fw_login_state, 762 fcport->fc4_type, id.b24, fcport->d_id.b24, 763 loop_id, fcport->loop_id); 764 765 switch (fcport->disc_state) { 766 case DSC_DELETE_PEND: 767 case DSC_DELETED: 768 break; 769 default: 770 if ((id.b24 != fcport->d_id.b24 && 771 fcport->d_id.b24 && 772 fcport->loop_id != FC_NO_LOOP_ID) || 773 (fcport->loop_id != FC_NO_LOOP_ID && 774 fcport->loop_id != loop_id)) { 775 ql_dbg(ql_dbg_disc, vha, 0x20e3, 776 "%s %d %8phC post del sess\n", 777 __func__, __LINE__, fcport->port_name); 778 if (fcport->n2n_flag) 779 fcport->d_id.b24 = 0; 780 qlt_schedule_sess_for_deletion(fcport); 781 return; 782 } 783 break; 784 } 785 786 fcport->loop_id = loop_id; 787 if (fcport->n2n_flag) 788 fcport->d_id.b24 = id.b24; 789 790 wwn = wwn_to_u64(fcport->port_name); 791 qlt_find_sess_invalidate_other(vha, wwn, 792 id, loop_id, &conflict_fcport); 793 794 if (conflict_fcport) { 795 /* 796 * Another share fcport share the same loop_id & 797 * nport id. Conflict fcport needs to finish 798 * cleanup before this fcport can proceed to login. 799 */ 800 conflict_fcport->conflict = fcport; 801 fcport->login_pause = 1; 802 } 803 804 switch (vha->hw->current_topology) { 805 default: 806 switch (current_login_state) { 807 case DSC_LS_PRLI_COMP: 808 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 809 vha, 0x20e4, "%s %d %8phC post gpdb\n", 810 __func__, __LINE__, fcport->port_name); 811 812 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 813 fcport->port_type = FCT_INITIATOR; 814 else 815 fcport->port_type = FCT_TARGET; 816 data[0] = data[1] = 0; 817 qla2x00_post_async_adisc_work(vha, fcport, 818 data); 819 break; 820 case DSC_LS_PORT_UNAVAIL: 821 default: 822 if (fcport->loop_id == FC_NO_LOOP_ID) { 823 qla2x00_find_new_loop_id(vha, fcport); 824 fcport->fw_login_state = 825 DSC_LS_PORT_UNAVAIL; 826 } 827 ql_dbg(ql_dbg_disc, vha, 0x20e5, 828 "%s %d %8phC\n", __func__, __LINE__, 829 fcport->port_name); 830 qla24xx_fcport_handle_login(vha, fcport); 831 break; 832 } 833 break; 834 case ISP_CFG_N: 835 fcport->fw_login_state = current_login_state; 836 fcport->d_id = id; 837 switch (current_login_state) { 838 case DSC_LS_PRLI_PEND: 839 /* 840 * In the middle of PRLI. Let it finish. 841 * Allow relogin code to recheck state again 842 * with GNL. Push disc_state back to DELETED 843 * so GNL can go out again 844 */ 845 qla2x00_set_fcport_disc_state(fcport, 846 DSC_DELETED); 847 break; 848 case DSC_LS_PRLI_COMP: 849 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 850 fcport->port_type = FCT_INITIATOR; 851 else 852 fcport->port_type = FCT_TARGET; 853 854 data[0] = data[1] = 0; 855 qla2x00_post_async_adisc_work(vha, fcport, 856 data); 857 break; 858 case DSC_LS_PLOGI_COMP: 859 if (fcport_is_bigger(fcport)) { 860 /* local adapter is smaller */ 861 if (fcport->loop_id != FC_NO_LOOP_ID) 862 qla2x00_clear_loop_id(fcport); 863 864 fcport->loop_id = loop_id; 865 qla24xx_fcport_handle_login(vha, 866 fcport); 867 break; 868 } 869 fallthrough; 870 default: 871 if (fcport_is_smaller(fcport)) { 872 /* local adapter is bigger */ 873 if (fcport->loop_id != FC_NO_LOOP_ID) 874 qla2x00_clear_loop_id(fcport); 875 876 fcport->loop_id = loop_id; 877 qla24xx_fcport_handle_login(vha, 878 fcport); 879 } 880 break; 881 } 882 break; 883 } /* switch (ha->current_topology) */ 884 } 885 886 if (!found) { 887 switch (vha->hw->current_topology) { 888 case ISP_CFG_F: 889 case ISP_CFG_FL: 890 for (i = 0; i < n; i++) { 891 e = &vha->gnl.l[i]; 892 id.b.domain = e->port_id[0]; 893 id.b.area = e->port_id[1]; 894 id.b.al_pa = e->port_id[2]; 895 id.b.rsvd_1 = 0; 896 loop_id = le16_to_cpu(e->nport_handle); 897 898 if (fcport->d_id.b24 == id.b24) { 899 conflict_fcport = 900 qla2x00_find_fcport_by_wwpn(vha, 901 e->port_name, 0); 902 if (conflict_fcport) { 903 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 904 vha, 0x20e5, 905 "%s %d %8phC post del sess\n", 906 __func__, __LINE__, 907 conflict_fcport->port_name); 908 qlt_schedule_sess_for_deletion 909 (conflict_fcport); 910 } 911 } 912 /* 913 * FW already picked this loop id for 914 * another fcport 915 */ 916 if (fcport->loop_id == loop_id) 917 fcport->loop_id = FC_NO_LOOP_ID; 918 } 919 qla24xx_fcport_handle_login(vha, fcport); 920 break; 921 case ISP_CFG_N: 922 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED); 923 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 924 if (fcport->n2n_link_reset_cnt < 2) { 925 fcport->n2n_link_reset_cnt++; 926 /* 927 * remote port is not sending PLOGI. 928 * Reset link to kick start his state 929 * machine 930 */ 931 set_bit(N2N_LINK_RESET, 932 &vha->dpc_flags); 933 } else { 934 if (fcport->n2n_chip_reset < 1) { 935 ql_log(ql_log_info, vha, 0x705d, 936 "Chip reset to bring laser down"); 937 set_bit(ISP_ABORT_NEEDED, 938 &vha->dpc_flags); 939 fcport->n2n_chip_reset++; 940 } else { 941 ql_log(ql_log_info, vha, 0x705d, 942 "Remote port %8ph is not coming back\n", 943 fcport->port_name); 944 fcport->scan_state = 0; 945 } 946 } 947 qla2xxx_wake_dpc(vha); 948 } else { 949 /* 950 * report port suppose to do PLOGI. Give him 951 * more time. FW will catch it. 952 */ 953 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 954 } 955 break; 956 default: 957 break; 958 } 959 } 960 } /* gnl_event */ 961 962 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 963 { 964 struct scsi_qla_host *vha = sp->vha; 965 unsigned long flags; 966 struct fc_port *fcport = NULL, *tf; 967 u16 i, n = 0, loop_id; 968 struct event_arg ea; 969 struct get_name_list_extended *e; 970 u64 wwn; 971 struct list_head h; 972 bool found = false; 973 974 ql_dbg(ql_dbg_disc, vha, 0x20e7, 975 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 976 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 977 sp->u.iocb_cmd.u.mbx.in_mb[2]); 978 979 if (res == QLA_FUNCTION_TIMEOUT) 980 return; 981 982 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 983 memset(&ea, 0, sizeof(ea)); 984 ea.sp = sp; 985 ea.rc = res; 986 987 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 988 sizeof(struct get_name_list_extended)) { 989 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 990 sizeof(struct get_name_list_extended); 991 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 992 } 993 994 for (i = 0; i < n; i++) { 995 e = &vha->gnl.l[i]; 996 loop_id = le16_to_cpu(e->nport_handle); 997 /* mask out reserve bit */ 998 loop_id = (loop_id & 0x7fff); 999 set_bit(loop_id, vha->hw->loop_id_map); 1000 wwn = wwn_to_u64(e->port_name); 1001 1002 ql_dbg(ql_dbg_disc, vha, 0x20e8, 1003 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 1004 __func__, &wwn, e->port_id[2], e->port_id[1], 1005 e->port_id[0], e->current_login_state, e->last_login_state, 1006 (loop_id & 0x7fff)); 1007 } 1008 1009 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1010 1011 INIT_LIST_HEAD(&h); 1012 fcport = tf = NULL; 1013 if (!list_empty(&vha->gnl.fcports)) 1014 list_splice_init(&vha->gnl.fcports, &h); 1015 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1016 1017 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1018 list_del_init(&fcport->gnl_entry); 1019 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1020 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1021 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1022 ea.fcport = fcport; 1023 1024 qla24xx_handle_gnl_done_event(vha, &ea); 1025 } 1026 1027 /* create new fcport if fw has knowledge of new sessions */ 1028 for (i = 0; i < n; i++) { 1029 port_id_t id; 1030 u64 wwnn; 1031 1032 e = &vha->gnl.l[i]; 1033 wwn = wwn_to_u64(e->port_name); 1034 1035 found = false; 1036 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1037 if (!memcmp((u8 *)&wwn, fcport->port_name, 1038 WWN_SIZE)) { 1039 found = true; 1040 break; 1041 } 1042 } 1043 1044 id.b.domain = e->port_id[2]; 1045 id.b.area = e->port_id[1]; 1046 id.b.al_pa = e->port_id[0]; 1047 id.b.rsvd_1 = 0; 1048 1049 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1050 ql_dbg(ql_dbg_disc, vha, 0x2065, 1051 "%s %d %8phC %06x post new sess\n", 1052 __func__, __LINE__, (u8 *)&wwn, id.b24); 1053 wwnn = wwn_to_u64(e->node_name); 1054 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1055 (u8 *)&wwnn, NULL, 0); 1056 } 1057 } 1058 1059 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1060 vha->gnl.sent = 0; 1061 if (!list_empty(&vha->gnl.fcports)) { 1062 /* retrigger gnl */ 1063 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports, 1064 gnl_entry) { 1065 list_del_init(&fcport->gnl_entry); 1066 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1067 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS) 1068 break; 1069 } 1070 } 1071 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1072 1073 sp->free(sp); 1074 } 1075 1076 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1077 { 1078 srb_t *sp; 1079 struct srb_iocb *mbx; 1080 int rval = QLA_FUNCTION_FAILED; 1081 unsigned long flags; 1082 u16 *mb; 1083 1084 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1085 return rval; 1086 1087 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1088 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1089 1090 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1091 fcport->flags |= FCF_ASYNC_SENT; 1092 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1093 fcport->last_rscn_gen = fcport->rscn_gen; 1094 fcport->last_login_gen = fcport->login_gen; 1095 1096 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1097 if (vha->gnl.sent) { 1098 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1099 return QLA_SUCCESS; 1100 } 1101 vha->gnl.sent = 1; 1102 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1103 1104 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1105 if (!sp) 1106 goto done; 1107 1108 sp->type = SRB_MB_IOCB; 1109 sp->name = "gnlist"; 1110 sp->gen1 = fcport->rscn_gen; 1111 sp->gen2 = fcport->login_gen; 1112 1113 mbx = &sp->u.iocb_cmd; 1114 mbx->timeout = qla2x00_async_iocb_timeout; 1115 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 1116 1117 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1118 mb[0] = MBC_PORT_NODE_NAME_LIST; 1119 mb[1] = BIT_2 | BIT_3; 1120 mb[2] = MSW(vha->gnl.ldma); 1121 mb[3] = LSW(vha->gnl.ldma); 1122 mb[6] = MSW(MSD(vha->gnl.ldma)); 1123 mb[7] = LSW(MSD(vha->gnl.ldma)); 1124 mb[8] = vha->gnl.size; 1125 mb[9] = vha->vp_idx; 1126 1127 sp->done = qla24xx_async_gnl_sp_done; 1128 1129 ql_dbg(ql_dbg_disc, vha, 0x20da, 1130 "Async-%s - OUT WWPN %8phC hndl %x\n", 1131 sp->name, fcport->port_name, sp->handle); 1132 1133 rval = qla2x00_start_sp(sp); 1134 if (rval != QLA_SUCCESS) 1135 goto done_free_sp; 1136 1137 return rval; 1138 1139 done_free_sp: 1140 sp->free(sp); 1141 done: 1142 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT); 1143 return rval; 1144 } 1145 1146 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1147 { 1148 struct qla_work_evt *e; 1149 1150 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1151 if (!e) 1152 return QLA_FUNCTION_FAILED; 1153 1154 e->u.fcport.fcport = fcport; 1155 fcport->flags |= FCF_ASYNC_ACTIVE; 1156 return qla2x00_post_work(vha, e); 1157 } 1158 1159 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1160 { 1161 struct scsi_qla_host *vha = sp->vha; 1162 struct qla_hw_data *ha = vha->hw; 1163 fc_port_t *fcport = sp->fcport; 1164 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1165 struct event_arg ea; 1166 1167 ql_dbg(ql_dbg_disc, vha, 0x20db, 1168 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1169 sp->name, res, fcport->port_name, mb[1], mb[2]); 1170 1171 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1172 1173 if (res == QLA_FUNCTION_TIMEOUT) 1174 goto done; 1175 1176 memset(&ea, 0, sizeof(ea)); 1177 ea.fcport = fcport; 1178 ea.sp = sp; 1179 1180 qla24xx_handle_gpdb_event(vha, &ea); 1181 1182 done: 1183 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1184 sp->u.iocb_cmd.u.mbx.in_dma); 1185 1186 sp->free(sp); 1187 } 1188 1189 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1190 { 1191 struct qla_work_evt *e; 1192 1193 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1194 if (!e) 1195 return QLA_FUNCTION_FAILED; 1196 1197 e->u.fcport.fcport = fcport; 1198 1199 return qla2x00_post_work(vha, e); 1200 } 1201 1202 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1203 { 1204 struct scsi_qla_host *vha = sp->vha; 1205 struct srb_iocb *lio = &sp->u.iocb_cmd; 1206 struct event_arg ea; 1207 1208 ql_dbg(ql_dbg_disc, vha, 0x2129, 1209 "%s %8phC res %d \n", __func__, 1210 sp->fcport->port_name, res); 1211 1212 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1213 1214 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1215 memset(&ea, 0, sizeof(ea)); 1216 ea.fcport = sp->fcport; 1217 ea.data[0] = lio->u.logio.data[0]; 1218 ea.data[1] = lio->u.logio.data[1]; 1219 ea.iop[0] = lio->u.logio.iop[0]; 1220 ea.iop[1] = lio->u.logio.iop[1]; 1221 ea.sp = sp; 1222 1223 qla24xx_handle_prli_done_event(vha, &ea); 1224 } 1225 1226 sp->free(sp); 1227 } 1228 1229 int 1230 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1231 { 1232 srb_t *sp; 1233 struct srb_iocb *lio; 1234 int rval = QLA_FUNCTION_FAILED; 1235 1236 if (!vha->flags.online) { 1237 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1238 __func__, __LINE__, fcport->port_name); 1239 return rval; 1240 } 1241 1242 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1243 fcport->fw_login_state == DSC_LS_PRLI_PEND) && 1244 qla_dual_mode_enabled(vha)) { 1245 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n", 1246 __func__, __LINE__, fcport->port_name); 1247 return rval; 1248 } 1249 1250 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1251 if (!sp) 1252 return rval; 1253 1254 fcport->flags |= FCF_ASYNC_SENT; 1255 fcport->logout_completed = 0; 1256 1257 sp->type = SRB_PRLI_CMD; 1258 sp->name = "prli"; 1259 1260 lio = &sp->u.iocb_cmd; 1261 lio->timeout = qla2x00_async_iocb_timeout; 1262 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1263 1264 sp->done = qla2x00_async_prli_sp_done; 1265 lio->u.logio.flags = 0; 1266 1267 if (NVME_TARGET(vha->hw, fcport)) 1268 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1269 1270 ql_dbg(ql_dbg_disc, vha, 0x211b, 1271 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n", 1272 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1273 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority, 1274 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp"); 1275 1276 rval = qla2x00_start_sp(sp); 1277 if (rval != QLA_SUCCESS) { 1278 fcport->flags |= FCF_LOGIN_NEEDED; 1279 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1280 goto done_free_sp; 1281 } 1282 1283 return rval; 1284 1285 done_free_sp: 1286 sp->free(sp); 1287 fcport->flags &= ~FCF_ASYNC_SENT; 1288 return rval; 1289 } 1290 1291 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1292 { 1293 struct qla_work_evt *e; 1294 1295 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1296 if (!e) 1297 return QLA_FUNCTION_FAILED; 1298 1299 e->u.fcport.fcport = fcport; 1300 e->u.fcport.opt = opt; 1301 fcport->flags |= FCF_ASYNC_ACTIVE; 1302 return qla2x00_post_work(vha, e); 1303 } 1304 1305 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1306 { 1307 srb_t *sp; 1308 struct srb_iocb *mbx; 1309 int rval = QLA_FUNCTION_FAILED; 1310 u16 *mb; 1311 dma_addr_t pd_dma; 1312 struct port_database_24xx *pd; 1313 struct qla_hw_data *ha = vha->hw; 1314 1315 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 1316 fcport->loop_id == FC_NO_LOOP_ID) { 1317 ql_log(ql_log_warn, vha, 0xffff, 1318 "%s: %8phC - not sending command.\n", 1319 __func__, fcport->port_name); 1320 return rval; 1321 } 1322 1323 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1324 if (!sp) 1325 goto done; 1326 1327 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB); 1328 1329 fcport->flags |= FCF_ASYNC_SENT; 1330 sp->type = SRB_MB_IOCB; 1331 sp->name = "gpdb"; 1332 sp->gen1 = fcport->rscn_gen; 1333 sp->gen2 = fcport->login_gen; 1334 1335 mbx = &sp->u.iocb_cmd; 1336 mbx->timeout = qla2x00_async_iocb_timeout; 1337 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1338 1339 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1340 if (pd == NULL) { 1341 ql_log(ql_log_warn, vha, 0xd043, 1342 "Failed to allocate port database structure.\n"); 1343 goto done_free_sp; 1344 } 1345 1346 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1347 mb[0] = MBC_GET_PORT_DATABASE; 1348 mb[1] = fcport->loop_id; 1349 mb[2] = MSW(pd_dma); 1350 mb[3] = LSW(pd_dma); 1351 mb[6] = MSW(MSD(pd_dma)); 1352 mb[7] = LSW(MSD(pd_dma)); 1353 mb[9] = vha->vp_idx; 1354 mb[10] = opt; 1355 1356 mbx->u.mbx.in = pd; 1357 mbx->u.mbx.in_dma = pd_dma; 1358 1359 sp->done = qla24xx_async_gpdb_sp_done; 1360 1361 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1362 "Async-%s %8phC hndl %x opt %x\n", 1363 sp->name, fcport->port_name, sp->handle, opt); 1364 1365 rval = qla2x00_start_sp(sp); 1366 if (rval != QLA_SUCCESS) 1367 goto done_free_sp; 1368 return rval; 1369 1370 done_free_sp: 1371 if (pd) 1372 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1373 1374 sp->free(sp); 1375 fcport->flags &= ~FCF_ASYNC_SENT; 1376 done: 1377 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1378 qla24xx_post_gpdb_work(vha, fcport, opt); 1379 return rval; 1380 } 1381 1382 static 1383 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1384 { 1385 unsigned long flags; 1386 1387 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1388 ea->fcport->login_gen++; 1389 ea->fcport->deleted = 0; 1390 ea->fcport->logout_on_delete = 1; 1391 1392 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1393 vha->fcport_count++; 1394 ea->fcport->login_succ = 1; 1395 1396 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1397 qla24xx_sched_upd_fcport(ea->fcport); 1398 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1399 } else if (ea->fcport->login_succ) { 1400 /* 1401 * We have an existing session. A late RSCN delivery 1402 * must have triggered the session to be re-validate. 1403 * Session is still valid. 1404 */ 1405 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1406 "%s %d %8phC session revalidate success\n", 1407 __func__, __LINE__, ea->fcport->port_name); 1408 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE); 1409 } 1410 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1411 } 1412 1413 static 1414 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1415 { 1416 fc_port_t *fcport = ea->fcport; 1417 struct port_database_24xx *pd; 1418 struct srb *sp = ea->sp; 1419 uint8_t ls; 1420 1421 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1422 1423 fcport->flags &= ~FCF_ASYNC_SENT; 1424 1425 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1426 "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__, 1427 fcport->port_name, fcport->disc_state, pd->current_login_state, 1428 fcport->fc4_type, ea->rc); 1429 1430 if (fcport->disc_state == DSC_DELETE_PEND) 1431 return; 1432 1433 if (NVME_TARGET(vha->hw, fcport)) 1434 ls = pd->current_login_state >> 4; 1435 else 1436 ls = pd->current_login_state & 0xf; 1437 1438 if (ea->sp->gen2 != fcport->login_gen) { 1439 /* target side must have changed it. */ 1440 1441 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1442 "%s %8phC generation changed\n", 1443 __func__, fcport->port_name); 1444 return; 1445 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1446 qla_rscn_replay(fcport); 1447 qlt_schedule_sess_for_deletion(fcport); 1448 return; 1449 } 1450 1451 switch (ls) { 1452 case PDS_PRLI_COMPLETE: 1453 __qla24xx_parse_gpdb(vha, fcport, pd); 1454 break; 1455 case PDS_PLOGI_PENDING: 1456 case PDS_PLOGI_COMPLETE: 1457 case PDS_PRLI_PENDING: 1458 case PDS_PRLI2_PENDING: 1459 /* Set discovery state back to GNL to Relogin attempt */ 1460 if (qla_dual_mode_enabled(vha) || 1461 qla_ini_mode_enabled(vha)) { 1462 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 1463 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1464 } 1465 return; 1466 case PDS_LOGO_PENDING: 1467 case PDS_PORT_UNAVAILABLE: 1468 default: 1469 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1470 __func__, __LINE__, fcport->port_name); 1471 qlt_schedule_sess_for_deletion(fcport); 1472 return; 1473 } 1474 __qla24xx_handle_gpdb_event(vha, ea); 1475 } /* gpdb event */ 1476 1477 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1478 { 1479 u8 login = 0; 1480 int rc; 1481 1482 if (qla_tgt_mode_enabled(vha)) 1483 return; 1484 1485 if (qla_dual_mode_enabled(vha)) { 1486 if (N2N_TOPO(vha->hw)) { 1487 u64 mywwn, wwn; 1488 1489 mywwn = wwn_to_u64(vha->port_name); 1490 wwn = wwn_to_u64(fcport->port_name); 1491 if (mywwn > wwn) 1492 login = 1; 1493 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1494 && time_after_eq(jiffies, 1495 fcport->plogi_nack_done_deadline)) 1496 login = 1; 1497 } else { 1498 login = 1; 1499 } 1500 } else { 1501 /* initiator mode */ 1502 login = 1; 1503 } 1504 1505 if (login && fcport->login_retry) { 1506 fcport->login_retry--; 1507 if (fcport->loop_id == FC_NO_LOOP_ID) { 1508 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1509 rc = qla2x00_find_new_loop_id(vha, fcport); 1510 if (rc) { 1511 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1512 "%s %d %8phC post del sess - out of loopid\n", 1513 __func__, __LINE__, fcport->port_name); 1514 fcport->scan_state = 0; 1515 qlt_schedule_sess_for_deletion(fcport); 1516 return; 1517 } 1518 } 1519 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1520 "%s %d %8phC post login\n", 1521 __func__, __LINE__, fcport->port_name); 1522 qla2x00_post_async_login_work(vha, fcport, NULL); 1523 } 1524 } 1525 1526 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1527 { 1528 u16 data[2]; 1529 u64 wwn; 1530 u16 sec; 1531 1532 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1533 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1534 __func__, fcport->port_name, fcport->disc_state, 1535 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1536 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1537 fcport->login_gen, fcport->loop_id, fcport->scan_state); 1538 1539 if (fcport->scan_state != QLA_FCPORT_FOUND) 1540 return 0; 1541 1542 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1543 qla_dual_mode_enabled(vha) && 1544 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1545 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1546 return 0; 1547 1548 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1549 !N2N_TOPO(vha->hw)) { 1550 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1551 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1552 return 0; 1553 } 1554 } 1555 1556 /* Target won't initiate port login if fabric is present */ 1557 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1558 return 0; 1559 1560 if (fcport->flags & FCF_ASYNC_SENT) { 1561 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1562 return 0; 1563 } 1564 1565 switch (fcport->disc_state) { 1566 case DSC_DELETED: 1567 wwn = wwn_to_u64(fcport->node_name); 1568 switch (vha->hw->current_topology) { 1569 case ISP_CFG_N: 1570 if (fcport_is_smaller(fcport)) { 1571 /* this adapter is bigger */ 1572 if (fcport->login_retry) { 1573 if (fcport->loop_id == FC_NO_LOOP_ID) { 1574 qla2x00_find_new_loop_id(vha, 1575 fcport); 1576 fcport->fw_login_state = 1577 DSC_LS_PORT_UNAVAIL; 1578 } 1579 fcport->login_retry--; 1580 qla_post_els_plogi_work(vha, fcport); 1581 } else { 1582 ql_log(ql_log_info, vha, 0x705d, 1583 "Unable to reach remote port %8phC", 1584 fcport->port_name); 1585 } 1586 } else { 1587 qla24xx_post_gnl_work(vha, fcport); 1588 } 1589 break; 1590 default: 1591 if (wwn == 0) { 1592 ql_dbg(ql_dbg_disc, vha, 0xffff, 1593 "%s %d %8phC post GNNID\n", 1594 __func__, __LINE__, fcport->port_name); 1595 qla24xx_post_gnnid_work(vha, fcport); 1596 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1597 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1598 "%s %d %8phC post gnl\n", 1599 __func__, __LINE__, fcport->port_name); 1600 qla24xx_post_gnl_work(vha, fcport); 1601 } else { 1602 qla_chk_n2n_b4_login(vha, fcport); 1603 } 1604 break; 1605 } 1606 break; 1607 1608 case DSC_GNL: 1609 switch (vha->hw->current_topology) { 1610 case ISP_CFG_N: 1611 if ((fcport->current_login_state & 0xf) == 0x6) { 1612 ql_dbg(ql_dbg_disc, vha, 0x2118, 1613 "%s %d %8phC post GPDB work\n", 1614 __func__, __LINE__, fcport->port_name); 1615 fcport->chip_reset = 1616 vha->hw->base_qpair->chip_reset; 1617 qla24xx_post_gpdb_work(vha, fcport, 0); 1618 } else { 1619 ql_dbg(ql_dbg_disc, vha, 0x2118, 1620 "%s %d %8phC post %s PRLI\n", 1621 __func__, __LINE__, fcport->port_name, 1622 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1623 "FC"); 1624 qla24xx_post_prli_work(vha, fcport); 1625 } 1626 break; 1627 default: 1628 if (fcport->login_pause) { 1629 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1630 "%s %d %8phC exit\n", 1631 __func__, __LINE__, 1632 fcport->port_name); 1633 fcport->last_rscn_gen = fcport->rscn_gen; 1634 fcport->last_login_gen = fcport->login_gen; 1635 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1636 break; 1637 } 1638 qla_chk_n2n_b4_login(vha, fcport); 1639 break; 1640 } 1641 break; 1642 1643 case DSC_LOGIN_FAILED: 1644 if (N2N_TOPO(vha->hw)) 1645 qla_chk_n2n_b4_login(vha, fcport); 1646 else 1647 qlt_schedule_sess_for_deletion(fcport); 1648 break; 1649 1650 case DSC_LOGIN_COMPLETE: 1651 /* recheck login state */ 1652 data[0] = data[1] = 0; 1653 qla2x00_post_async_adisc_work(vha, fcport, data); 1654 break; 1655 1656 case DSC_LOGIN_PEND: 1657 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1658 qla24xx_post_prli_work(vha, fcport); 1659 break; 1660 1661 case DSC_UPD_FCPORT: 1662 sec = jiffies_to_msecs(jiffies - 1663 fcport->jiffies_at_registration)/1000; 1664 if (fcport->sec_since_registration < sec && sec && 1665 !(sec % 60)) { 1666 fcport->sec_since_registration = sec; 1667 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1668 "%s %8phC - Slow Rport registration(%d Sec)\n", 1669 __func__, fcport->port_name, sec); 1670 } 1671 1672 if (fcport->next_disc_state != DSC_DELETE_PEND) 1673 fcport->next_disc_state = DSC_ADISC; 1674 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1675 break; 1676 1677 default: 1678 break; 1679 } 1680 1681 return 0; 1682 } 1683 1684 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1685 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1686 { 1687 struct qla_work_evt *e; 1688 1689 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1690 if (!e) 1691 return QLA_FUNCTION_FAILED; 1692 1693 e->u.new_sess.id = *id; 1694 e->u.new_sess.pla = pla; 1695 e->u.new_sess.fc4_type = fc4_type; 1696 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1697 if (node_name) 1698 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1699 1700 return qla2x00_post_work(vha, e); 1701 } 1702 1703 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1704 { 1705 fc_port_t *fcport; 1706 unsigned long flags; 1707 1708 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1709 if (fcport) { 1710 fcport->scan_needed = 1; 1711 fcport->rscn_gen++; 1712 } 1713 1714 spin_lock_irqsave(&vha->work_lock, flags); 1715 if (vha->scan.scan_flags == 0) { 1716 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1717 vha->scan.scan_flags |= SF_QUEUED; 1718 schedule_delayed_work(&vha->scan.scan_work, 5); 1719 } 1720 spin_unlock_irqrestore(&vha->work_lock, flags); 1721 } 1722 1723 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1724 struct event_arg *ea) 1725 { 1726 fc_port_t *fcport = ea->fcport; 1727 1728 if (test_bit(UNLOADING, &vha->dpc_flags)) 1729 return; 1730 1731 ql_dbg(ql_dbg_disc, vha, 0x2102, 1732 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1733 __func__, fcport->port_name, fcport->disc_state, 1734 fcport->fw_login_state, fcport->login_pause, 1735 fcport->deleted, fcport->conflict, 1736 fcport->last_rscn_gen, fcport->rscn_gen, 1737 fcport->last_login_gen, fcport->login_gen, 1738 fcport->flags); 1739 1740 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1741 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1742 __func__, __LINE__, fcport->port_name); 1743 qla24xx_post_gnl_work(vha, fcport); 1744 return; 1745 } 1746 1747 qla24xx_fcport_handle_login(vha, fcport); 1748 } 1749 1750 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1751 struct event_arg *ea) 1752 { 1753 /* for pure Target Mode, PRLI will not be initiated */ 1754 if (vha->host->active_mode == MODE_TARGET) 1755 return; 1756 1757 ql_dbg(ql_dbg_disc, vha, 0x2118, 1758 "%s %d %8phC post PRLI\n", 1759 __func__, __LINE__, ea->fcport->port_name); 1760 qla24xx_post_prli_work(vha, ea->fcport); 1761 } 1762 1763 /* 1764 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1765 * to be consumed by the fcport 1766 */ 1767 void qla_rscn_replay(fc_port_t *fcport) 1768 { 1769 struct event_arg ea; 1770 1771 switch (fcport->disc_state) { 1772 case DSC_DELETE_PEND: 1773 return; 1774 default: 1775 break; 1776 } 1777 1778 if (fcport->scan_needed) { 1779 memset(&ea, 0, sizeof(ea)); 1780 ea.id = fcport->d_id; 1781 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1782 qla2x00_handle_rscn(fcport->vha, &ea); 1783 } 1784 } 1785 1786 static void 1787 qla2x00_tmf_iocb_timeout(void *data) 1788 { 1789 srb_t *sp = data; 1790 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1791 int rc, h; 1792 unsigned long flags; 1793 1794 rc = qla24xx_async_abort_cmd(sp, false); 1795 if (rc) { 1796 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 1797 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) { 1798 if (sp->qpair->req->outstanding_cmds[h] == sp) { 1799 sp->qpair->req->outstanding_cmds[h] = NULL; 1800 break; 1801 } 1802 } 1803 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 1804 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT); 1805 tmf->u.tmf.data = QLA_FUNCTION_FAILED; 1806 complete(&tmf->u.tmf.comp); 1807 } 1808 } 1809 1810 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 1811 { 1812 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1813 1814 complete(&tmf->u.tmf.comp); 1815 } 1816 1817 int 1818 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1819 uint32_t tag) 1820 { 1821 struct scsi_qla_host *vha = fcport->vha; 1822 struct srb_iocb *tm_iocb; 1823 srb_t *sp; 1824 int rval = QLA_FUNCTION_FAILED; 1825 1826 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1827 if (!sp) 1828 goto done; 1829 1830 tm_iocb = &sp->u.iocb_cmd; 1831 sp->type = SRB_TM_CMD; 1832 sp->name = "tmf"; 1833 1834 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1835 init_completion(&tm_iocb->u.tmf.comp); 1836 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1837 1838 tm_iocb->u.tmf.flags = flags; 1839 tm_iocb->u.tmf.lun = lun; 1840 tm_iocb->u.tmf.data = tag; 1841 sp->done = qla2x00_tmf_sp_done; 1842 1843 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1844 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1845 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1846 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1847 1848 rval = qla2x00_start_sp(sp); 1849 if (rval != QLA_SUCCESS) 1850 goto done_free_sp; 1851 wait_for_completion(&tm_iocb->u.tmf.comp); 1852 1853 rval = tm_iocb->u.tmf.data; 1854 1855 if (rval != QLA_SUCCESS) { 1856 ql_log(ql_log_warn, vha, 0x8030, 1857 "TM IOCB failed (%x).\n", rval); 1858 } 1859 1860 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1861 flags = tm_iocb->u.tmf.flags; 1862 lun = (uint16_t)tm_iocb->u.tmf.lun; 1863 1864 /* Issue Marker IOCB */ 1865 qla2x00_marker(vha, vha->hw->base_qpair, 1866 fcport->loop_id, lun, 1867 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1868 } 1869 1870 done_free_sp: 1871 sp->free(sp); 1872 fcport->flags &= ~FCF_ASYNC_SENT; 1873 done: 1874 return rval; 1875 } 1876 1877 int 1878 qla24xx_async_abort_command(srb_t *sp) 1879 { 1880 unsigned long flags = 0; 1881 1882 uint32_t handle; 1883 fc_port_t *fcport = sp->fcport; 1884 struct qla_qpair *qpair = sp->qpair; 1885 struct scsi_qla_host *vha = fcport->vha; 1886 struct req_que *req = qpair->req; 1887 1888 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1889 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1890 if (req->outstanding_cmds[handle] == sp) 1891 break; 1892 } 1893 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1894 1895 if (handle == req->num_outstanding_cmds) { 1896 /* Command not found. */ 1897 return QLA_FUNCTION_FAILED; 1898 } 1899 if (sp->type == SRB_FXIOCB_DCMD) 1900 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1901 FXDISC_ABORT_IOCTL); 1902 1903 return qla24xx_async_abort_cmd(sp, true); 1904 } 1905 1906 static void 1907 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1908 { 1909 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1910 ea->data[0]); 1911 1912 switch (ea->data[0]) { 1913 case MBS_COMMAND_COMPLETE: 1914 ql_dbg(ql_dbg_disc, vha, 0x2118, 1915 "%s %d %8phC post gpdb\n", 1916 __func__, __LINE__, ea->fcport->port_name); 1917 1918 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1919 ea->fcport->logout_on_delete = 1; 1920 ea->fcport->nvme_prli_service_param = ea->iop[0]; 1921 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 1922 ea->fcport->nvme_first_burst_size = 1923 (ea->iop[1] & 0xffff) * 512; 1924 else 1925 ea->fcport->nvme_first_burst_size = 0; 1926 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1927 break; 1928 default: 1929 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1930 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1931 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1932 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1933 break; 1934 } 1935 1936 ql_dbg(ql_dbg_disc, vha, 0x2118, 1937 "%s %d %8phC priority %s, fc4type %x\n", 1938 __func__, __LINE__, ea->fcport->port_name, 1939 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ? 1940 "FCP" : "NVMe", ea->fcport->fc4_type); 1941 1942 if (N2N_TOPO(vha->hw)) { 1943 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME) { 1944 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME; 1945 ea->fcport->fc4_type |= FS_FC4TYPE_FCP; 1946 } else { 1947 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP; 1948 ea->fcport->fc4_type |= FS_FC4TYPE_NVME; 1949 } 1950 1951 if (ea->fcport->n2n_link_reset_cnt < 3) { 1952 ea->fcport->n2n_link_reset_cnt++; 1953 vha->relogin_jif = jiffies + 2 * HZ; 1954 /* 1955 * PRLI failed. Reset link to kick start 1956 * state machine 1957 */ 1958 set_bit(N2N_LINK_RESET, &vha->dpc_flags); 1959 } else { 1960 ql_log(ql_log_warn, vha, 0x2119, 1961 "%s %d %8phC Unable to reconnect\n", 1962 __func__, __LINE__, 1963 ea->fcport->port_name); 1964 } 1965 } else { 1966 /* 1967 * switch connect. login failed. Take connection down 1968 * and allow relogin to retrigger 1969 */ 1970 if (NVME_FCP_TARGET(ea->fcport)) { 1971 ql_dbg(ql_dbg_disc, vha, 0x2118, 1972 "%s %d %8phC post %s prli\n", 1973 __func__, __LINE__, 1974 ea->fcport->port_name, 1975 (ea->fcport->fc4_type & FS_FC4TYPE_NVME) 1976 ? "NVMe" : "FCP"); 1977 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME) 1978 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME; 1979 else 1980 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP; 1981 } 1982 1983 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1984 ea->fcport->keep_nport_handle = 0; 1985 ea->fcport->logout_on_delete = 1; 1986 qlt_schedule_sess_for_deletion(ea->fcport); 1987 } 1988 break; 1989 } 1990 } 1991 1992 void 1993 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1994 { 1995 port_id_t cid; /* conflict Nport id */ 1996 u16 lid; 1997 struct fc_port *conflict_fcport; 1998 unsigned long flags; 1999 struct fc_port *fcport = ea->fcport; 2000 2001 ql_dbg(ql_dbg_disc, vha, 0xffff, 2002 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 2003 __func__, fcport->port_name, fcport->disc_state, 2004 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 2005 ea->sp->gen1, fcport->rscn_gen, 2006 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 2007 2008 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 2009 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 2010 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2011 "%s %d %8phC Remote is trying to login\n", 2012 __func__, __LINE__, fcport->port_name); 2013 return; 2014 } 2015 2016 if ((fcport->disc_state == DSC_DELETE_PEND) || 2017 (fcport->disc_state == DSC_DELETED)) { 2018 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2019 return; 2020 } 2021 2022 if (ea->sp->gen2 != fcport->login_gen) { 2023 /* target side must have changed it. */ 2024 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2025 "%s %8phC generation changed\n", 2026 __func__, fcport->port_name); 2027 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2028 return; 2029 } else if (ea->sp->gen1 != fcport->rscn_gen) { 2030 ql_dbg(ql_dbg_disc, vha, 0x20d3, 2031 "%s %8phC RSCN generation changed\n", 2032 __func__, fcport->port_name); 2033 qla_rscn_replay(fcport); 2034 qlt_schedule_sess_for_deletion(fcport); 2035 return; 2036 } 2037 2038 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 2039 ea->data[0]); 2040 2041 switch (ea->data[0]) { 2042 case MBS_COMMAND_COMPLETE: 2043 /* 2044 * Driver must validate login state - If PRLI not complete, 2045 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 2046 * requests. 2047 */ 2048 if (NVME_TARGET(vha->hw, ea->fcport)) { 2049 ql_dbg(ql_dbg_disc, vha, 0x2117, 2050 "%s %d %8phC post prli\n", 2051 __func__, __LINE__, ea->fcport->port_name); 2052 qla24xx_post_prli_work(vha, ea->fcport); 2053 } else { 2054 ql_dbg(ql_dbg_disc, vha, 0x20ea, 2055 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n", 2056 __func__, __LINE__, ea->fcport->port_name, 2057 ea->fcport->loop_id, ea->fcport->d_id.b24); 2058 2059 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2060 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2061 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2062 ea->fcport->logout_on_delete = 1; 2063 ea->fcport->send_els_logo = 0; 2064 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 2065 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2066 2067 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2068 } 2069 break; 2070 case MBS_COMMAND_ERROR: 2071 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2072 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2073 2074 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2075 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_FAILED); 2076 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 2077 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2078 else 2079 qla2x00_mark_device_lost(vha, ea->fcport, 1); 2080 break; 2081 case MBS_LOOP_ID_USED: 2082 /* data[1] = IO PARAM 1 = nport ID */ 2083 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2084 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2085 cid.b.al_pa = ea->iop[1] & 0xff; 2086 cid.b.rsvd_1 = 0; 2087 2088 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2089 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2090 __func__, __LINE__, ea->fcport->port_name, 2091 ea->fcport->loop_id, cid.b24); 2092 2093 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2094 ea->fcport->loop_id = FC_NO_LOOP_ID; 2095 qla24xx_post_gnl_work(vha, ea->fcport); 2096 break; 2097 case MBS_PORT_ID_USED: 2098 lid = ea->iop[1] & 0xffff; 2099 qlt_find_sess_invalidate_other(vha, 2100 wwn_to_u64(ea->fcport->port_name), 2101 ea->fcport->d_id, lid, &conflict_fcport); 2102 2103 if (conflict_fcport) { 2104 /* 2105 * Another fcport share the same loop_id/nport id. 2106 * Conflict fcport needs to finish cleanup before this 2107 * fcport can proceed to login. 2108 */ 2109 conflict_fcport->conflict = ea->fcport; 2110 ea->fcport->login_pause = 1; 2111 2112 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2113 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2114 __func__, __LINE__, ea->fcport->port_name, 2115 ea->fcport->d_id.b24, lid); 2116 } else { 2117 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2118 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2119 __func__, __LINE__, ea->fcport->port_name, 2120 ea->fcport->d_id.b24, lid); 2121 2122 qla2x00_clear_loop_id(ea->fcport); 2123 set_bit(lid, vha->hw->loop_id_map); 2124 ea->fcport->loop_id = lid; 2125 ea->fcport->keep_nport_handle = 0; 2126 ea->fcport->logout_on_delete = 1; 2127 qlt_schedule_sess_for_deletion(ea->fcport); 2128 } 2129 break; 2130 } 2131 return; 2132 } 2133 2134 /****************************************************************************/ 2135 /* QLogic ISP2x00 Hardware Support Functions. */ 2136 /****************************************************************************/ 2137 2138 static int 2139 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2140 { 2141 int rval = QLA_SUCCESS; 2142 struct qla_hw_data *ha = vha->hw; 2143 uint32_t idc_major_ver, idc_minor_ver; 2144 uint16_t config[4]; 2145 2146 qla83xx_idc_lock(vha, 0); 2147 2148 /* SV: TODO: Assign initialization timeout from 2149 * flash-info / other param 2150 */ 2151 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2152 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2153 2154 /* Set our fcoe function presence */ 2155 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2156 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2157 "Error while setting DRV-Presence.\n"); 2158 rval = QLA_FUNCTION_FAILED; 2159 goto exit; 2160 } 2161 2162 /* Decide the reset ownership */ 2163 qla83xx_reset_ownership(vha); 2164 2165 /* 2166 * On first protocol driver load: 2167 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2168 * register. 2169 * Others: Check compatibility with current IDC Major version. 2170 */ 2171 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2172 if (ha->flags.nic_core_reset_owner) { 2173 /* Set IDC Major version */ 2174 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2175 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2176 2177 /* Clearing IDC-Lock-Recovery register */ 2178 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2179 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2180 /* 2181 * Clear further IDC participation if we are not compatible with 2182 * the current IDC Major Version. 2183 */ 2184 ql_log(ql_log_warn, vha, 0xb07d, 2185 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2186 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2187 __qla83xx_clear_drv_presence(vha); 2188 rval = QLA_FUNCTION_FAILED; 2189 goto exit; 2190 } 2191 /* Each function sets its supported Minor version. */ 2192 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2193 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2194 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2195 2196 if (ha->flags.nic_core_reset_owner) { 2197 memset(config, 0, sizeof(config)); 2198 if (!qla81xx_get_port_config(vha, config)) 2199 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2200 QLA8XXX_DEV_READY); 2201 } 2202 2203 rval = qla83xx_idc_state_handler(vha); 2204 2205 exit: 2206 qla83xx_idc_unlock(vha, 0); 2207 2208 return rval; 2209 } 2210 2211 /* 2212 * qla2x00_initialize_adapter 2213 * Initialize board. 2214 * 2215 * Input: 2216 * ha = adapter block pointer. 2217 * 2218 * Returns: 2219 * 0 = success 2220 */ 2221 int 2222 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2223 { 2224 int rval; 2225 struct qla_hw_data *ha = vha->hw; 2226 struct req_que *req = ha->req_q_map[0]; 2227 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2228 2229 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2230 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2231 2232 /* Clear adapter flags. */ 2233 vha->flags.online = 0; 2234 ha->flags.chip_reset_done = 0; 2235 vha->flags.reset_active = 0; 2236 ha->flags.pci_channel_io_perm_failure = 0; 2237 ha->flags.eeh_busy = 0; 2238 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2239 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2240 atomic_set(&vha->loop_state, LOOP_DOWN); 2241 vha->device_flags = DFLG_NO_CABLE; 2242 vha->dpc_flags = 0; 2243 vha->flags.management_server_logged_in = 0; 2244 vha->marker_needed = 0; 2245 ha->isp_abort_cnt = 0; 2246 ha->beacon_blink_led = 0; 2247 2248 set_bit(0, ha->req_qid_map); 2249 set_bit(0, ha->rsp_qid_map); 2250 2251 ql_dbg(ql_dbg_init, vha, 0x0040, 2252 "Configuring PCI space...\n"); 2253 rval = ha->isp_ops->pci_config(vha); 2254 if (rval) { 2255 ql_log(ql_log_warn, vha, 0x0044, 2256 "Unable to configure PCI space.\n"); 2257 return (rval); 2258 } 2259 2260 ha->isp_ops->reset_chip(vha); 2261 2262 /* Check for secure flash support */ 2263 if (IS_QLA28XX(ha)) { 2264 if (rd_reg_word(®->mailbox12) & BIT_0) 2265 ha->flags.secure_adapter = 1; 2266 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n", 2267 (ha->flags.secure_adapter) ? "Yes" : "No"); 2268 } 2269 2270 2271 rval = qla2xxx_get_flash_info(vha); 2272 if (rval) { 2273 ql_log(ql_log_fatal, vha, 0x004f, 2274 "Unable to validate FLASH data.\n"); 2275 return rval; 2276 } 2277 2278 if (IS_QLA8044(ha)) { 2279 qla8044_read_reset_template(vha); 2280 2281 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2282 * If DONRESET_BIT0 is set, drivers should not set dev_state 2283 * to NEED_RESET. But if NEED_RESET is set, drivers should 2284 * should honor the reset. */ 2285 if (ql2xdontresethba == 1) 2286 qla8044_set_idc_dontreset(vha); 2287 } 2288 2289 ha->isp_ops->get_flash_version(vha, req->ring); 2290 ql_dbg(ql_dbg_init, vha, 0x0061, 2291 "Configure NVRAM parameters...\n"); 2292 2293 /* Let priority default to FCP, can be overridden by nvram_config */ 2294 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2295 2296 ha->isp_ops->nvram_config(vha); 2297 2298 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2299 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2300 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2301 2302 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2303 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2304 2305 if (ha->flags.disable_serdes) { 2306 /* Mask HBA via NVRAM settings? */ 2307 ql_log(ql_log_info, vha, 0x0077, 2308 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2309 return QLA_FUNCTION_FAILED; 2310 } 2311 2312 ql_dbg(ql_dbg_init, vha, 0x0078, 2313 "Verifying loaded RISC code...\n"); 2314 2315 /* If smartsan enabled then require fdmi and rdp enabled */ 2316 if (ql2xsmartsan) { 2317 ql2xfdmienable = 1; 2318 ql2xrdpenable = 1; 2319 } 2320 2321 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2322 rval = ha->isp_ops->chip_diag(vha); 2323 if (rval) 2324 return (rval); 2325 rval = qla2x00_setup_chip(vha); 2326 if (rval) 2327 return (rval); 2328 } 2329 2330 if (IS_QLA84XX(ha)) { 2331 ha->cs84xx = qla84xx_get_chip(vha); 2332 if (!ha->cs84xx) { 2333 ql_log(ql_log_warn, vha, 0x00d0, 2334 "Unable to configure ISP84XX.\n"); 2335 return QLA_FUNCTION_FAILED; 2336 } 2337 } 2338 2339 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2340 rval = qla2x00_init_rings(vha); 2341 2342 /* No point in continuing if firmware initialization failed. */ 2343 if (rval != QLA_SUCCESS) 2344 return rval; 2345 2346 ha->flags.chip_reset_done = 1; 2347 2348 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2349 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2350 rval = qla84xx_init_chip(vha); 2351 if (rval != QLA_SUCCESS) { 2352 ql_log(ql_log_warn, vha, 0x00d4, 2353 "Unable to initialize ISP84XX.\n"); 2354 qla84xx_put_chip(vha); 2355 } 2356 } 2357 2358 /* Load the NIC Core f/w if we are the first protocol driver. */ 2359 if (IS_QLA8031(ha)) { 2360 rval = qla83xx_nic_core_fw_load(vha); 2361 if (rval) 2362 ql_log(ql_log_warn, vha, 0x0124, 2363 "Error in initializing NIC Core f/w.\n"); 2364 } 2365 2366 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2367 qla24xx_read_fcp_prio_cfg(vha); 2368 2369 if (IS_P3P_TYPE(ha)) 2370 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2371 else 2372 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2373 2374 return (rval); 2375 } 2376 2377 /** 2378 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2379 * @vha: HA context 2380 * 2381 * Returns 0 on success. 2382 */ 2383 int 2384 qla2100_pci_config(scsi_qla_host_t *vha) 2385 { 2386 uint16_t w; 2387 unsigned long flags; 2388 struct qla_hw_data *ha = vha->hw; 2389 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2390 2391 pci_set_master(ha->pdev); 2392 pci_try_set_mwi(ha->pdev); 2393 2394 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2395 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2396 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2397 2398 pci_disable_rom(ha->pdev); 2399 2400 /* Get PCI bus information. */ 2401 spin_lock_irqsave(&ha->hardware_lock, flags); 2402 ha->pci_attr = rd_reg_word(®->ctrl_status); 2403 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2404 2405 return QLA_SUCCESS; 2406 } 2407 2408 /** 2409 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2410 * @vha: HA context 2411 * 2412 * Returns 0 on success. 2413 */ 2414 int 2415 qla2300_pci_config(scsi_qla_host_t *vha) 2416 { 2417 uint16_t w; 2418 unsigned long flags = 0; 2419 uint32_t cnt; 2420 struct qla_hw_data *ha = vha->hw; 2421 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2422 2423 pci_set_master(ha->pdev); 2424 pci_try_set_mwi(ha->pdev); 2425 2426 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2427 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2428 2429 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2430 w &= ~PCI_COMMAND_INTX_DISABLE; 2431 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2432 2433 /* 2434 * If this is a 2300 card and not 2312, reset the 2435 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2436 * the 2310 also reports itself as a 2300 so we need to get the 2437 * fb revision level -- a 6 indicates it really is a 2300 and 2438 * not a 2310. 2439 */ 2440 if (IS_QLA2300(ha)) { 2441 spin_lock_irqsave(&ha->hardware_lock, flags); 2442 2443 /* Pause RISC. */ 2444 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2445 for (cnt = 0; cnt < 30000; cnt++) { 2446 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) 2447 break; 2448 2449 udelay(10); 2450 } 2451 2452 /* Select FPM registers. */ 2453 wrt_reg_word(®->ctrl_status, 0x20); 2454 rd_reg_word(®->ctrl_status); 2455 2456 /* Get the fb rev level */ 2457 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2458 2459 if (ha->fb_rev == FPM_2300) 2460 pci_clear_mwi(ha->pdev); 2461 2462 /* Deselect FPM registers. */ 2463 wrt_reg_word(®->ctrl_status, 0x0); 2464 rd_reg_word(®->ctrl_status); 2465 2466 /* Release RISC module. */ 2467 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2468 for (cnt = 0; cnt < 30000; cnt++) { 2469 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0) 2470 break; 2471 2472 udelay(10); 2473 } 2474 2475 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2476 } 2477 2478 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2479 2480 pci_disable_rom(ha->pdev); 2481 2482 /* Get PCI bus information. */ 2483 spin_lock_irqsave(&ha->hardware_lock, flags); 2484 ha->pci_attr = rd_reg_word(®->ctrl_status); 2485 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2486 2487 return QLA_SUCCESS; 2488 } 2489 2490 /** 2491 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2492 * @vha: HA context 2493 * 2494 * Returns 0 on success. 2495 */ 2496 int 2497 qla24xx_pci_config(scsi_qla_host_t *vha) 2498 { 2499 uint16_t w; 2500 unsigned long flags = 0; 2501 struct qla_hw_data *ha = vha->hw; 2502 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2503 2504 pci_set_master(ha->pdev); 2505 pci_try_set_mwi(ha->pdev); 2506 2507 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2508 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2509 w &= ~PCI_COMMAND_INTX_DISABLE; 2510 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2511 2512 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2513 2514 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2515 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2516 pcix_set_mmrbc(ha->pdev, 2048); 2517 2518 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2519 if (pci_is_pcie(ha->pdev)) 2520 pcie_set_readrq(ha->pdev, 4096); 2521 2522 pci_disable_rom(ha->pdev); 2523 2524 ha->chip_revision = ha->pdev->revision; 2525 2526 /* Get PCI bus information. */ 2527 spin_lock_irqsave(&ha->hardware_lock, flags); 2528 ha->pci_attr = rd_reg_dword(®->ctrl_status); 2529 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2530 2531 return QLA_SUCCESS; 2532 } 2533 2534 /** 2535 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2536 * @vha: HA context 2537 * 2538 * Returns 0 on success. 2539 */ 2540 int 2541 qla25xx_pci_config(scsi_qla_host_t *vha) 2542 { 2543 uint16_t w; 2544 struct qla_hw_data *ha = vha->hw; 2545 2546 pci_set_master(ha->pdev); 2547 pci_try_set_mwi(ha->pdev); 2548 2549 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2550 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2551 w &= ~PCI_COMMAND_INTX_DISABLE; 2552 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2553 2554 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2555 if (pci_is_pcie(ha->pdev)) 2556 pcie_set_readrq(ha->pdev, 4096); 2557 2558 pci_disable_rom(ha->pdev); 2559 2560 ha->chip_revision = ha->pdev->revision; 2561 2562 return QLA_SUCCESS; 2563 } 2564 2565 /** 2566 * qla2x00_isp_firmware() - Choose firmware image. 2567 * @vha: HA context 2568 * 2569 * Returns 0 on success. 2570 */ 2571 static int 2572 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2573 { 2574 int rval; 2575 uint16_t loop_id, topo, sw_cap; 2576 uint8_t domain, area, al_pa; 2577 struct qla_hw_data *ha = vha->hw; 2578 2579 /* Assume loading risc code */ 2580 rval = QLA_FUNCTION_FAILED; 2581 2582 if (ha->flags.disable_risc_code_load) { 2583 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2584 2585 /* Verify checksum of loaded RISC code. */ 2586 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2587 if (rval == QLA_SUCCESS) { 2588 /* And, verify we are not in ROM code. */ 2589 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2590 &area, &domain, &topo, &sw_cap); 2591 } 2592 } 2593 2594 if (rval) 2595 ql_dbg(ql_dbg_init, vha, 0x007a, 2596 "**** Load RISC code ****.\n"); 2597 2598 return (rval); 2599 } 2600 2601 /** 2602 * qla2x00_reset_chip() - Reset ISP chip. 2603 * @vha: HA context 2604 * 2605 * Returns 0 on success. 2606 */ 2607 int 2608 qla2x00_reset_chip(scsi_qla_host_t *vha) 2609 { 2610 unsigned long flags = 0; 2611 struct qla_hw_data *ha = vha->hw; 2612 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2613 uint32_t cnt; 2614 uint16_t cmd; 2615 int rval = QLA_FUNCTION_FAILED; 2616 2617 if (unlikely(pci_channel_offline(ha->pdev))) 2618 return rval; 2619 2620 ha->isp_ops->disable_intrs(ha); 2621 2622 spin_lock_irqsave(&ha->hardware_lock, flags); 2623 2624 /* Turn off master enable */ 2625 cmd = 0; 2626 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2627 cmd &= ~PCI_COMMAND_MASTER; 2628 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2629 2630 if (!IS_QLA2100(ha)) { 2631 /* Pause RISC. */ 2632 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); 2633 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2634 for (cnt = 0; cnt < 30000; cnt++) { 2635 if ((rd_reg_word(®->hccr) & 2636 HCCR_RISC_PAUSE) != 0) 2637 break; 2638 udelay(100); 2639 } 2640 } else { 2641 rd_reg_word(®->hccr); /* PCI Posting. */ 2642 udelay(10); 2643 } 2644 2645 /* Select FPM registers. */ 2646 wrt_reg_word(®->ctrl_status, 0x20); 2647 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2648 2649 /* FPM Soft Reset. */ 2650 wrt_reg_word(®->fpm_diag_config, 0x100); 2651 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2652 2653 /* Toggle Fpm Reset. */ 2654 if (!IS_QLA2200(ha)) { 2655 wrt_reg_word(®->fpm_diag_config, 0x0); 2656 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */ 2657 } 2658 2659 /* Select frame buffer registers. */ 2660 wrt_reg_word(®->ctrl_status, 0x10); 2661 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2662 2663 /* Reset frame buffer FIFOs. */ 2664 if (IS_QLA2200(ha)) { 2665 WRT_FB_CMD_REG(ha, reg, 0xa000); 2666 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2667 } else { 2668 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2669 2670 /* Read back fb_cmd until zero or 3 seconds max */ 2671 for (cnt = 0; cnt < 3000; cnt++) { 2672 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2673 break; 2674 udelay(100); 2675 } 2676 } 2677 2678 /* Select RISC module registers. */ 2679 wrt_reg_word(®->ctrl_status, 0); 2680 rd_reg_word(®->ctrl_status); /* PCI Posting. */ 2681 2682 /* Reset RISC processor. */ 2683 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2684 rd_reg_word(®->hccr); /* PCI Posting. */ 2685 2686 /* Release RISC processor. */ 2687 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2688 rd_reg_word(®->hccr); /* PCI Posting. */ 2689 } 2690 2691 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); 2692 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT); 2693 2694 /* Reset ISP chip. */ 2695 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 2696 2697 /* Wait for RISC to recover from reset. */ 2698 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2699 /* 2700 * It is necessary to for a delay here since the card doesn't 2701 * respond to PCI reads during a reset. On some architectures 2702 * this will result in an MCA. 2703 */ 2704 udelay(20); 2705 for (cnt = 30000; cnt; cnt--) { 2706 if ((rd_reg_word(®->ctrl_status) & 2707 CSR_ISP_SOFT_RESET) == 0) 2708 break; 2709 udelay(100); 2710 } 2711 } else 2712 udelay(10); 2713 2714 /* Reset RISC processor. */ 2715 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 2716 2717 wrt_reg_word(®->semaphore, 0); 2718 2719 /* Release RISC processor. */ 2720 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 2721 rd_reg_word(®->hccr); /* PCI Posting. */ 2722 2723 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2724 for (cnt = 0; cnt < 30000; cnt++) { 2725 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2726 break; 2727 2728 udelay(100); 2729 } 2730 } else 2731 udelay(100); 2732 2733 /* Turn on master enable */ 2734 cmd |= PCI_COMMAND_MASTER; 2735 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2736 2737 /* Disable RISC pause on FPM parity error. */ 2738 if (!IS_QLA2100(ha)) { 2739 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2740 rd_reg_word(®->hccr); /* PCI Posting. */ 2741 } 2742 2743 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2744 2745 return QLA_SUCCESS; 2746 } 2747 2748 /** 2749 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2750 * @vha: HA context 2751 * 2752 * Returns 0 on success. 2753 */ 2754 static int 2755 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2756 { 2757 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2758 2759 if (!IS_QLA81XX(vha->hw)) 2760 return QLA_SUCCESS; 2761 2762 return qla81xx_write_mpi_register(vha, mb); 2763 } 2764 2765 /** 2766 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2767 * @vha: HA context 2768 * 2769 * Returns 0 on success. 2770 */ 2771 static inline int 2772 qla24xx_reset_risc(scsi_qla_host_t *vha) 2773 { 2774 unsigned long flags = 0; 2775 struct qla_hw_data *ha = vha->hw; 2776 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2777 uint32_t cnt; 2778 uint16_t wd; 2779 static int abts_cnt; /* ISP abort retry counts */ 2780 int rval = QLA_SUCCESS; 2781 2782 spin_lock_irqsave(&ha->hardware_lock, flags); 2783 2784 /* Reset RISC. */ 2785 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2786 for (cnt = 0; cnt < 30000; cnt++) { 2787 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2788 break; 2789 2790 udelay(10); 2791 } 2792 2793 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2794 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2795 2796 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2797 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2798 rd_reg_dword(®->hccr), 2799 rd_reg_dword(®->ctrl_status), 2800 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2801 2802 wrt_reg_dword(®->ctrl_status, 2803 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2804 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2805 2806 udelay(100); 2807 2808 /* Wait for firmware to complete NVRAM accesses. */ 2809 rd_reg_word(®->mailbox0); 2810 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 && 2811 rval == QLA_SUCCESS; cnt--) { 2812 barrier(); 2813 if (cnt) 2814 udelay(5); 2815 else 2816 rval = QLA_FUNCTION_TIMEOUT; 2817 } 2818 2819 if (rval == QLA_SUCCESS) 2820 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2821 2822 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2823 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2824 rd_reg_dword(®->hccr), 2825 rd_reg_word(®->mailbox0)); 2826 2827 /* Wait for soft-reset to complete. */ 2828 rd_reg_dword(®->ctrl_status); 2829 for (cnt = 0; cnt < 60; cnt++) { 2830 barrier(); 2831 if ((rd_reg_dword(®->ctrl_status) & 2832 CSRX_ISP_SOFT_RESET) == 0) 2833 break; 2834 2835 udelay(5); 2836 } 2837 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2838 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2839 2840 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2841 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2842 rd_reg_dword(®->hccr), 2843 rd_reg_dword(®->ctrl_status)); 2844 2845 /* If required, do an MPI FW reset now */ 2846 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2847 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2848 if (++abts_cnt < 5) { 2849 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2850 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2851 } else { 2852 /* 2853 * We exhausted the ISP abort retries. We have to 2854 * set the board offline. 2855 */ 2856 abts_cnt = 0; 2857 vha->flags.online = 0; 2858 } 2859 } 2860 } 2861 2862 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 2863 rd_reg_dword(®->hccr); 2864 2865 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 2866 rd_reg_dword(®->hccr); 2867 2868 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET); 2869 rd_reg_dword(®->hccr); 2870 2871 rd_reg_word(®->mailbox0); 2872 for (cnt = 60; rd_reg_word(®->mailbox0) != 0 && 2873 rval == QLA_SUCCESS; cnt--) { 2874 barrier(); 2875 if (cnt) 2876 udelay(5); 2877 else 2878 rval = QLA_FUNCTION_TIMEOUT; 2879 } 2880 if (rval == QLA_SUCCESS) 2881 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2882 2883 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2884 "Host Risc 0x%x, mailbox0 0x%x\n", 2885 rd_reg_dword(®->hccr), 2886 rd_reg_word(®->mailbox0)); 2887 2888 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2889 2890 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2891 "Driver in %s mode\n", 2892 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2893 2894 if (IS_NOPOLLING_TYPE(ha)) 2895 ha->isp_ops->enable_intrs(ha); 2896 2897 return rval; 2898 } 2899 2900 static void 2901 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2902 { 2903 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2904 2905 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2906 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET); 2907 } 2908 2909 static void 2910 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2911 { 2912 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2913 2914 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2915 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data); 2916 } 2917 2918 static void 2919 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2920 { 2921 uint32_t wd32 = 0; 2922 uint delta_msec = 100; 2923 uint elapsed_msec = 0; 2924 uint timeout_msec; 2925 ulong n; 2926 2927 if (vha->hw->pdev->subsystem_device != 0x0175 && 2928 vha->hw->pdev->subsystem_device != 0x0240) 2929 return; 2930 2931 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2932 udelay(100); 2933 2934 attempt: 2935 timeout_msec = TIMEOUT_SEMAPHORE; 2936 n = timeout_msec / delta_msec; 2937 while (n--) { 2938 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2939 qla25xx_read_risc_sema_reg(vha, &wd32); 2940 if (wd32 & RISC_SEMAPHORE) 2941 break; 2942 msleep(delta_msec); 2943 elapsed_msec += delta_msec; 2944 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2945 goto force; 2946 } 2947 2948 if (!(wd32 & RISC_SEMAPHORE)) 2949 goto force; 2950 2951 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2952 goto acquired; 2953 2954 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2955 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2956 n = timeout_msec / delta_msec; 2957 while (n--) { 2958 qla25xx_read_risc_sema_reg(vha, &wd32); 2959 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2960 break; 2961 msleep(delta_msec); 2962 elapsed_msec += delta_msec; 2963 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2964 goto force; 2965 } 2966 2967 if (wd32 & RISC_SEMAPHORE_FORCE) 2968 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2969 2970 goto attempt; 2971 2972 force: 2973 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2974 2975 acquired: 2976 return; 2977 } 2978 2979 /** 2980 * qla24xx_reset_chip() - Reset ISP24xx chip. 2981 * @vha: HA context 2982 * 2983 * Returns 0 on success. 2984 */ 2985 int 2986 qla24xx_reset_chip(scsi_qla_host_t *vha) 2987 { 2988 struct qla_hw_data *ha = vha->hw; 2989 int rval = QLA_FUNCTION_FAILED; 2990 2991 if (pci_channel_offline(ha->pdev) && 2992 ha->flags.pci_channel_io_perm_failure) { 2993 return rval; 2994 } 2995 2996 ha->isp_ops->disable_intrs(ha); 2997 2998 qla25xx_manipulate_risc_semaphore(vha); 2999 3000 /* Perform RISC reset. */ 3001 rval = qla24xx_reset_risc(vha); 3002 3003 return rval; 3004 } 3005 3006 /** 3007 * qla2x00_chip_diag() - Test chip for proper operation. 3008 * @vha: HA context 3009 * 3010 * Returns 0 on success. 3011 */ 3012 int 3013 qla2x00_chip_diag(scsi_qla_host_t *vha) 3014 { 3015 int rval; 3016 struct qla_hw_data *ha = vha->hw; 3017 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3018 unsigned long flags = 0; 3019 uint16_t data; 3020 uint32_t cnt; 3021 uint16_t mb[5]; 3022 struct req_que *req = ha->req_q_map[0]; 3023 3024 /* Assume a failed state */ 3025 rval = QLA_FUNCTION_FAILED; 3026 3027 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 3028 ®->flash_address); 3029 3030 spin_lock_irqsave(&ha->hardware_lock, flags); 3031 3032 /* Reset ISP chip. */ 3033 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET); 3034 3035 /* 3036 * We need to have a delay here since the card will not respond while 3037 * in reset causing an MCA on some architectures. 3038 */ 3039 udelay(20); 3040 data = qla2x00_debounce_register(®->ctrl_status); 3041 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 3042 udelay(5); 3043 data = rd_reg_word(®->ctrl_status); 3044 barrier(); 3045 } 3046 3047 if (!cnt) 3048 goto chip_diag_failed; 3049 3050 ql_dbg(ql_dbg_init, vha, 0x007c, 3051 "Reset register cleared by chip reset.\n"); 3052 3053 /* Reset RISC processor. */ 3054 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 3055 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 3056 3057 /* Workaround for QLA2312 PCI parity error */ 3058 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 3059 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 3060 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 3061 udelay(5); 3062 data = RD_MAILBOX_REG(ha, reg, 0); 3063 barrier(); 3064 } 3065 } else 3066 udelay(10); 3067 3068 if (!cnt) 3069 goto chip_diag_failed; 3070 3071 /* Check product ID of chip */ 3072 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3073 3074 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3075 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3076 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3077 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3078 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3079 mb[3] != PROD_ID_3) { 3080 ql_log(ql_log_warn, vha, 0x0062, 3081 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3082 mb[1], mb[2], mb[3]); 3083 3084 goto chip_diag_failed; 3085 } 3086 ha->product_id[0] = mb[1]; 3087 ha->product_id[1] = mb[2]; 3088 ha->product_id[2] = mb[3]; 3089 ha->product_id[3] = mb[4]; 3090 3091 /* Adjust fw RISC transfer size */ 3092 if (req->length > 1024) 3093 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3094 else 3095 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3096 req->length; 3097 3098 if (IS_QLA2200(ha) && 3099 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3100 /* Limit firmware transfer size with a 2200A */ 3101 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3102 3103 ha->device_type |= DT_ISP2200A; 3104 ha->fw_transfer_size = 128; 3105 } 3106 3107 /* Wrap Incoming Mailboxes Test. */ 3108 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3109 3110 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3111 rval = qla2x00_mbx_reg_test(vha); 3112 if (rval) 3113 ql_log(ql_log_warn, vha, 0x0080, 3114 "Failed mailbox send register test.\n"); 3115 else 3116 /* Flag a successful rval */ 3117 rval = QLA_SUCCESS; 3118 spin_lock_irqsave(&ha->hardware_lock, flags); 3119 3120 chip_diag_failed: 3121 if (rval) 3122 ql_log(ql_log_info, vha, 0x0081, 3123 "Chip diagnostics **** FAILED ****.\n"); 3124 3125 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3126 3127 return (rval); 3128 } 3129 3130 /** 3131 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3132 * @vha: HA context 3133 * 3134 * Returns 0 on success. 3135 */ 3136 int 3137 qla24xx_chip_diag(scsi_qla_host_t *vha) 3138 { 3139 int rval; 3140 struct qla_hw_data *ha = vha->hw; 3141 struct req_que *req = ha->req_q_map[0]; 3142 3143 if (IS_P3P_TYPE(ha)) 3144 return QLA_SUCCESS; 3145 3146 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3147 3148 rval = qla2x00_mbx_reg_test(vha); 3149 if (rval) { 3150 ql_log(ql_log_warn, vha, 0x0082, 3151 "Failed mailbox send register test.\n"); 3152 } else { 3153 /* Flag a successful rval */ 3154 rval = QLA_SUCCESS; 3155 } 3156 3157 return rval; 3158 } 3159 3160 static void 3161 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3162 { 3163 int rval; 3164 dma_addr_t tc_dma; 3165 void *tc; 3166 struct qla_hw_data *ha = vha->hw; 3167 3168 if (!IS_FWI2_CAPABLE(ha)) 3169 return; 3170 3171 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3172 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3173 return; 3174 3175 if (ha->fce) { 3176 ql_dbg(ql_dbg_init, vha, 0x00bd, 3177 "%s: FCE Mem is already allocated.\n", 3178 __func__); 3179 return; 3180 } 3181 3182 /* Allocate memory for Fibre Channel Event Buffer. */ 3183 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3184 GFP_KERNEL); 3185 if (!tc) { 3186 ql_log(ql_log_warn, vha, 0x00be, 3187 "Unable to allocate (%d KB) for FCE.\n", 3188 FCE_SIZE / 1024); 3189 return; 3190 } 3191 3192 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3193 ha->fce_mb, &ha->fce_bufs); 3194 if (rval) { 3195 ql_log(ql_log_warn, vha, 0x00bf, 3196 "Unable to initialize FCE (%d).\n", rval); 3197 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3198 return; 3199 } 3200 3201 ql_dbg(ql_dbg_init, vha, 0x00c0, 3202 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3203 3204 ha->flags.fce_enabled = 1; 3205 ha->fce_dma = tc_dma; 3206 ha->fce = tc; 3207 } 3208 3209 static void 3210 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3211 { 3212 int rval; 3213 dma_addr_t tc_dma; 3214 void *tc; 3215 struct qla_hw_data *ha = vha->hw; 3216 3217 if (!IS_FWI2_CAPABLE(ha)) 3218 return; 3219 3220 if (ha->eft) { 3221 ql_dbg(ql_dbg_init, vha, 0x00bd, 3222 "%s: EFT Mem is already allocated.\n", 3223 __func__); 3224 return; 3225 } 3226 3227 /* Allocate memory for Extended Trace Buffer. */ 3228 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3229 GFP_KERNEL); 3230 if (!tc) { 3231 ql_log(ql_log_warn, vha, 0x00c1, 3232 "Unable to allocate (%d KB) for EFT.\n", 3233 EFT_SIZE / 1024); 3234 return; 3235 } 3236 3237 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3238 if (rval) { 3239 ql_log(ql_log_warn, vha, 0x00c2, 3240 "Unable to initialize EFT (%d).\n", rval); 3241 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3242 return; 3243 } 3244 3245 ql_dbg(ql_dbg_init, vha, 0x00c3, 3246 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3247 3248 ha->eft_dma = tc_dma; 3249 ha->eft = tc; 3250 } 3251 3252 static void 3253 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3254 { 3255 qla2x00_init_fce_trace(vha); 3256 qla2x00_init_eft_trace(vha); 3257 } 3258 3259 void 3260 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3261 { 3262 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3263 eft_size, fce_size, mq_size; 3264 struct qla_hw_data *ha = vha->hw; 3265 struct req_que *req = ha->req_q_map[0]; 3266 struct rsp_que *rsp = ha->rsp_q_map[0]; 3267 struct qla2xxx_fw_dump *fw_dump; 3268 3269 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3270 req_q_size = rsp_q_size = 0; 3271 3272 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3273 fixed_size = sizeof(struct qla2100_fw_dump); 3274 } else if (IS_QLA23XX(ha)) { 3275 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3276 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3277 sizeof(uint16_t); 3278 } else if (IS_FWI2_CAPABLE(ha)) { 3279 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3280 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3281 else if (IS_QLA81XX(ha)) 3282 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3283 else if (IS_QLA25XX(ha)) 3284 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3285 else 3286 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3287 3288 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3289 sizeof(uint32_t); 3290 if (ha->mqenable) { 3291 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && 3292 !IS_QLA28XX(ha)) 3293 mq_size = sizeof(struct qla2xxx_mq_chain); 3294 /* 3295 * Allocate maximum buffer size for all queues - Q0. 3296 * Resizing must be done at end-of-dump processing. 3297 */ 3298 mq_size += (ha->max_req_queues - 1) * 3299 (req->length * sizeof(request_t)); 3300 mq_size += (ha->max_rsp_queues - 1) * 3301 (rsp->length * sizeof(response_t)); 3302 } 3303 if (ha->tgt.atio_ring) 3304 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3305 3306 qla2x00_init_fce_trace(vha); 3307 if (ha->fce) 3308 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3309 qla2x00_init_eft_trace(vha); 3310 if (ha->eft) 3311 eft_size = EFT_SIZE; 3312 } 3313 3314 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3315 struct fwdt *fwdt = ha->fwdt; 3316 uint j; 3317 3318 for (j = 0; j < 2; j++, fwdt++) { 3319 if (!fwdt->template) { 3320 ql_dbg(ql_dbg_init, vha, 0x00ba, 3321 "-> fwdt%u no template\n", j); 3322 continue; 3323 } 3324 ql_dbg(ql_dbg_init, vha, 0x00fa, 3325 "-> fwdt%u calculating fwdump size...\n", j); 3326 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3327 vha, fwdt->template); 3328 ql_dbg(ql_dbg_init, vha, 0x00fa, 3329 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3330 j, fwdt->dump_size); 3331 dump_size += fwdt->dump_size; 3332 } 3333 /* Add space for spare MPI fw dump. */ 3334 dump_size += ha->fwdt[1].dump_size; 3335 } else { 3336 req_q_size = req->length * sizeof(request_t); 3337 rsp_q_size = rsp->length * sizeof(response_t); 3338 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3339 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3340 + eft_size; 3341 ha->chain_offset = dump_size; 3342 dump_size += mq_size + fce_size; 3343 if (ha->exchoffld_buf) 3344 dump_size += sizeof(struct qla2xxx_offld_chain) + 3345 ha->exchoffld_size; 3346 if (ha->exlogin_buf) 3347 dump_size += sizeof(struct qla2xxx_offld_chain) + 3348 ha->exlogin_size; 3349 } 3350 3351 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3352 3353 ql_dbg(ql_dbg_init, vha, 0x00c5, 3354 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3355 __func__, dump_size, ha->fw_dump_len, 3356 ha->fw_dump_alloc_len); 3357 3358 fw_dump = vmalloc(dump_size); 3359 if (!fw_dump) { 3360 ql_log(ql_log_warn, vha, 0x00c4, 3361 "Unable to allocate (%d KB) for firmware dump.\n", 3362 dump_size / 1024); 3363 } else { 3364 mutex_lock(&ha->optrom_mutex); 3365 if (ha->fw_dumped) { 3366 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3367 vfree(ha->fw_dump); 3368 ha->fw_dump = fw_dump; 3369 ha->fw_dump_alloc_len = dump_size; 3370 ql_dbg(ql_dbg_init, vha, 0x00c5, 3371 "Re-Allocated (%d KB) and save firmware dump.\n", 3372 dump_size / 1024); 3373 } else { 3374 if (ha->fw_dump) 3375 vfree(ha->fw_dump); 3376 ha->fw_dump = fw_dump; 3377 3378 ha->fw_dump_len = ha->fw_dump_alloc_len = 3379 dump_size; 3380 ql_dbg(ql_dbg_init, vha, 0x00c5, 3381 "Allocated (%d KB) for firmware dump.\n", 3382 dump_size / 1024); 3383 3384 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3385 ha->mpi_fw_dump = (char *)fw_dump + 3386 ha->fwdt[1].dump_size; 3387 mutex_unlock(&ha->optrom_mutex); 3388 return; 3389 } 3390 3391 ha->fw_dump->signature[0] = 'Q'; 3392 ha->fw_dump->signature[1] = 'L'; 3393 ha->fw_dump->signature[2] = 'G'; 3394 ha->fw_dump->signature[3] = 'C'; 3395 ha->fw_dump->version = htonl(1); 3396 3397 ha->fw_dump->fixed_size = htonl(fixed_size); 3398 ha->fw_dump->mem_size = htonl(mem_size); 3399 ha->fw_dump->req_q_size = htonl(req_q_size); 3400 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3401 3402 ha->fw_dump->eft_size = htonl(eft_size); 3403 ha->fw_dump->eft_addr_l = 3404 htonl(LSD(ha->eft_dma)); 3405 ha->fw_dump->eft_addr_h = 3406 htonl(MSD(ha->eft_dma)); 3407 3408 ha->fw_dump->header_size = 3409 htonl(offsetof 3410 (struct qla2xxx_fw_dump, isp)); 3411 } 3412 mutex_unlock(&ha->optrom_mutex); 3413 } 3414 } 3415 } 3416 3417 static int 3418 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3419 { 3420 #define MPS_MASK 0xe0 3421 int rval; 3422 uint16_t dc; 3423 uint32_t dw; 3424 3425 if (!IS_QLA81XX(vha->hw)) 3426 return QLA_SUCCESS; 3427 3428 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3429 if (rval != QLA_SUCCESS) { 3430 ql_log(ql_log_warn, vha, 0x0105, 3431 "Unable to acquire semaphore.\n"); 3432 goto done; 3433 } 3434 3435 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3436 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3437 if (rval != QLA_SUCCESS) { 3438 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3439 goto done_release; 3440 } 3441 3442 dc &= MPS_MASK; 3443 if (dc == (dw & MPS_MASK)) 3444 goto done_release; 3445 3446 dw &= ~MPS_MASK; 3447 dw |= dc; 3448 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3449 if (rval != QLA_SUCCESS) { 3450 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3451 } 3452 3453 done_release: 3454 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3455 if (rval != QLA_SUCCESS) { 3456 ql_log(ql_log_warn, vha, 0x006d, 3457 "Unable to release semaphore.\n"); 3458 } 3459 3460 done: 3461 return rval; 3462 } 3463 3464 int 3465 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3466 { 3467 /* Don't try to reallocate the array */ 3468 if (req->outstanding_cmds) 3469 return QLA_SUCCESS; 3470 3471 if (!IS_FWI2_CAPABLE(ha)) 3472 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3473 else { 3474 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3475 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3476 else 3477 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3478 } 3479 3480 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3481 sizeof(srb_t *), 3482 GFP_KERNEL); 3483 3484 if (!req->outstanding_cmds) { 3485 /* 3486 * Try to allocate a minimal size just so we can get through 3487 * initialization. 3488 */ 3489 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3490 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3491 sizeof(srb_t *), 3492 GFP_KERNEL); 3493 3494 if (!req->outstanding_cmds) { 3495 ql_log(ql_log_fatal, NULL, 0x0126, 3496 "Failed to allocate memory for " 3497 "outstanding_cmds for req_que %p.\n", req); 3498 req->num_outstanding_cmds = 0; 3499 return QLA_FUNCTION_FAILED; 3500 } 3501 } 3502 3503 return QLA_SUCCESS; 3504 } 3505 3506 #define PRINT_FIELD(_field, _flag, _str) { \ 3507 if (a0->_field & _flag) {\ 3508 if (p) {\ 3509 strcat(ptr, "|");\ 3510 ptr++;\ 3511 leftover--;\ 3512 } \ 3513 len = snprintf(ptr, leftover, "%s", _str); \ 3514 p = 1;\ 3515 leftover -= len;\ 3516 ptr += len; \ 3517 } \ 3518 } 3519 3520 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3521 { 3522 #define STR_LEN 64 3523 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3524 u8 str[STR_LEN], *ptr, p; 3525 int leftover, len; 3526 3527 memset(str, 0, STR_LEN); 3528 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3529 ql_dbg(ql_dbg_init, vha, 0x015a, 3530 "SFP MFG Name: %s\n", str); 3531 3532 memset(str, 0, STR_LEN); 3533 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3534 ql_dbg(ql_dbg_init, vha, 0x015c, 3535 "SFP Part Name: %s\n", str); 3536 3537 /* media */ 3538 memset(str, 0, STR_LEN); 3539 ptr = str; 3540 leftover = STR_LEN; 3541 p = len = 0; 3542 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3543 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3544 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3545 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3546 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3547 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3548 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3549 ql_dbg(ql_dbg_init, vha, 0x0160, 3550 "SFP Media: %s\n", str); 3551 3552 /* link length */ 3553 memset(str, 0, STR_LEN); 3554 ptr = str; 3555 leftover = STR_LEN; 3556 p = len = 0; 3557 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3558 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3559 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3560 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3561 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3562 ql_dbg(ql_dbg_init, vha, 0x0196, 3563 "SFP Link Length: %s\n", str); 3564 3565 memset(str, 0, STR_LEN); 3566 ptr = str; 3567 leftover = STR_LEN; 3568 p = len = 0; 3569 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3570 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3571 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3572 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3573 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3574 ql_dbg(ql_dbg_init, vha, 0x016e, 3575 "SFP FC Link Tech: %s\n", str); 3576 3577 if (a0->length_km) 3578 ql_dbg(ql_dbg_init, vha, 0x016f, 3579 "SFP Distant: %d km\n", a0->length_km); 3580 if (a0->length_100m) 3581 ql_dbg(ql_dbg_init, vha, 0x0170, 3582 "SFP Distant: %d m\n", a0->length_100m*100); 3583 if (a0->length_50um_10m) 3584 ql_dbg(ql_dbg_init, vha, 0x0189, 3585 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3586 if (a0->length_62um_10m) 3587 ql_dbg(ql_dbg_init, vha, 0x018a, 3588 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3589 if (a0->length_om4_10m) 3590 ql_dbg(ql_dbg_init, vha, 0x0194, 3591 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3592 if (a0->length_om3_10m) 3593 ql_dbg(ql_dbg_init, vha, 0x0195, 3594 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3595 } 3596 3597 3598 /** 3599 * qla24xx_detect_sfp() 3600 * 3601 * @vha: adapter state pointer. 3602 * 3603 * @return 3604 * 0 -- Configure firmware to use short-range settings -- normal 3605 * buffer-to-buffer credits. 3606 * 3607 * 1 -- Configure firmware to use long-range settings -- extra 3608 * buffer-to-buffer credits should be allocated with 3609 * ha->lr_distance containing distance settings from NVRAM or SFP 3610 * (if supported). 3611 */ 3612 int 3613 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3614 { 3615 int rc, used_nvram; 3616 struct sff_8247_a0 *a; 3617 struct qla_hw_data *ha = vha->hw; 3618 struct nvram_81xx *nv = ha->nvram; 3619 #define LR_DISTANCE_UNKNOWN 2 3620 static const char * const types[] = { "Short", "Long" }; 3621 static const char * const lengths[] = { "(10km)", "(5km)", "" }; 3622 u8 ll = 0; 3623 3624 /* Seed with NVRAM settings. */ 3625 used_nvram = 0; 3626 ha->flags.lr_detected = 0; 3627 if (IS_BPM_RANGE_CAPABLE(ha) && 3628 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) { 3629 used_nvram = 1; 3630 ha->flags.lr_detected = 1; 3631 ha->lr_distance = 3632 (nv->enhanced_features >> LR_DIST_NV_POS) 3633 & LR_DIST_NV_MASK; 3634 } 3635 3636 if (!IS_BPM_ENABLED(vha)) 3637 goto out; 3638 /* Determine SR/LR capabilities of SFP/Transceiver. */ 3639 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3640 if (rc) 3641 goto out; 3642 3643 used_nvram = 0; 3644 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3645 qla2xxx_print_sfp_info(vha); 3646 3647 ha->flags.lr_detected = 0; 3648 ll = a->fc_ll_cc7; 3649 if (ll & FC_LL_VL || ll & FC_LL_L) { 3650 /* Long range, track length. */ 3651 ha->flags.lr_detected = 1; 3652 3653 if (a->length_km > 5 || a->length_100m > 50) 3654 ha->lr_distance = LR_DISTANCE_10K; 3655 else 3656 ha->lr_distance = LR_DISTANCE_5K; 3657 } 3658 3659 out: 3660 ql_dbg(ql_dbg_async, vha, 0x507b, 3661 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n", 3662 types[ha->flags.lr_detected], 3663 ha->flags.lr_detected ? lengths[ha->lr_distance] : 3664 lengths[LR_DISTANCE_UNKNOWN], 3665 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance); 3666 return ha->flags.lr_detected; 3667 } 3668 3669 void qla_init_iocb_limit(scsi_qla_host_t *vha) 3670 { 3671 u16 i, num_qps; 3672 u32 limit; 3673 struct qla_hw_data *ha = vha->hw; 3674 3675 num_qps = ha->num_qpairs + 1; 3676 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100; 3677 3678 ha->base_qpair->fwres.iocbs_total = ha->orig_fw_iocb_count; 3679 ha->base_qpair->fwres.iocbs_limit = limit; 3680 ha->base_qpair->fwres.iocbs_qp_limit = limit / num_qps; 3681 ha->base_qpair->fwres.iocbs_used = 0; 3682 for (i = 0; i < ha->max_qpairs; i++) { 3683 if (ha->queue_pair_map[i]) { 3684 ha->queue_pair_map[i]->fwres.iocbs_total = 3685 ha->orig_fw_iocb_count; 3686 ha->queue_pair_map[i]->fwres.iocbs_limit = limit; 3687 ha->queue_pair_map[i]->fwres.iocbs_qp_limit = 3688 limit / num_qps; 3689 ha->queue_pair_map[i]->fwres.iocbs_used = 0; 3690 } 3691 } 3692 } 3693 3694 /** 3695 * qla2x00_setup_chip() - Load and start RISC firmware. 3696 * @vha: HA context 3697 * 3698 * Returns 0 on success. 3699 */ 3700 static int 3701 qla2x00_setup_chip(scsi_qla_host_t *vha) 3702 { 3703 int rval; 3704 uint32_t srisc_address = 0; 3705 struct qla_hw_data *ha = vha->hw; 3706 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3707 unsigned long flags; 3708 uint16_t fw_major_version; 3709 int done_once = 0; 3710 3711 if (IS_P3P_TYPE(ha)) { 3712 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3713 if (rval == QLA_SUCCESS) { 3714 qla2x00_stop_firmware(vha); 3715 goto enable_82xx_npiv; 3716 } else 3717 goto failed; 3718 } 3719 3720 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3721 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3722 spin_lock_irqsave(&ha->hardware_lock, flags); 3723 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3724 rd_reg_word(®->hccr); 3725 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3726 } 3727 3728 qla81xx_mpi_sync(vha); 3729 3730 execute_fw_with_lr: 3731 /* Load firmware sequences */ 3732 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3733 if (rval == QLA_SUCCESS) { 3734 ql_dbg(ql_dbg_init, vha, 0x00c9, 3735 "Verifying Checksum of loaded RISC code.\n"); 3736 3737 rval = qla2x00_verify_checksum(vha, srisc_address); 3738 if (rval == QLA_SUCCESS) { 3739 /* Start firmware execution. */ 3740 ql_dbg(ql_dbg_init, vha, 0x00ca, 3741 "Starting firmware.\n"); 3742 3743 if (ql2xexlogins) 3744 ha->flags.exlogins_enabled = 1; 3745 3746 if (qla_is_exch_offld_enabled(vha)) 3747 ha->flags.exchoffld_enabled = 1; 3748 3749 rval = qla2x00_execute_fw(vha, srisc_address); 3750 /* Retrieve firmware information. */ 3751 if (rval == QLA_SUCCESS) { 3752 /* Enable BPM support? */ 3753 if (!done_once++ && qla24xx_detect_sfp(vha)) { 3754 ql_dbg(ql_dbg_init, vha, 0x00ca, 3755 "Re-starting firmware -- BPM.\n"); 3756 /* Best-effort - re-init. */ 3757 ha->isp_ops->reset_chip(vha); 3758 ha->isp_ops->chip_diag(vha); 3759 goto execute_fw_with_lr; 3760 } 3761 3762 if (IS_ZIO_THRESHOLD_CAPABLE(ha)) 3763 qla27xx_set_zio_threshold(vha, 3764 ha->last_zio_threshold); 3765 3766 rval = qla2x00_set_exlogins_buffer(vha); 3767 if (rval != QLA_SUCCESS) 3768 goto failed; 3769 3770 rval = qla2x00_set_exchoffld_buffer(vha); 3771 if (rval != QLA_SUCCESS) 3772 goto failed; 3773 3774 enable_82xx_npiv: 3775 fw_major_version = ha->fw_major_version; 3776 if (IS_P3P_TYPE(ha)) 3777 qla82xx_check_md_needed(vha); 3778 else 3779 rval = qla2x00_get_fw_version(vha); 3780 if (rval != QLA_SUCCESS) 3781 goto failed; 3782 ha->flags.npiv_supported = 0; 3783 if (IS_QLA2XXX_MIDTYPE(ha) && 3784 (ha->fw_attributes & BIT_2)) { 3785 ha->flags.npiv_supported = 1; 3786 if ((!ha->max_npiv_vports) || 3787 ((ha->max_npiv_vports + 1) % 3788 MIN_MULTI_ID_FABRIC)) 3789 ha->max_npiv_vports = 3790 MIN_MULTI_ID_FABRIC - 1; 3791 } 3792 qla2x00_get_resource_cnts(vha); 3793 qla_init_iocb_limit(vha); 3794 3795 /* 3796 * Allocate the array of outstanding commands 3797 * now that we know the firmware resources. 3798 */ 3799 rval = qla2x00_alloc_outstanding_cmds(ha, 3800 vha->req); 3801 if (rval != QLA_SUCCESS) 3802 goto failed; 3803 3804 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3805 qla2x00_alloc_offload_mem(vha); 3806 3807 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3808 qla2x00_alloc_fw_dump(vha); 3809 3810 } else { 3811 goto failed; 3812 } 3813 } else { 3814 ql_log(ql_log_fatal, vha, 0x00cd, 3815 "ISP Firmware failed checksum.\n"); 3816 goto failed; 3817 } 3818 3819 /* Enable PUREX PASSTHRU */ 3820 if (ql2xrdpenable || ha->flags.scm_supported_f) 3821 qla25xx_set_els_cmds_supported(vha); 3822 } else 3823 goto failed; 3824 3825 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3826 /* Enable proper parity. */ 3827 spin_lock_irqsave(&ha->hardware_lock, flags); 3828 if (IS_QLA2300(ha)) 3829 /* SRAM parity */ 3830 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3831 else 3832 /* SRAM, Instruction RAM and GP RAM parity */ 3833 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3834 rd_reg_word(®->hccr); 3835 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3836 } 3837 3838 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3839 ha->flags.fac_supported = 1; 3840 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3841 uint32_t size; 3842 3843 rval = qla81xx_fac_get_sector_size(vha, &size); 3844 if (rval == QLA_SUCCESS) { 3845 ha->flags.fac_supported = 1; 3846 ha->fdt_block_size = size << 2; 3847 } else { 3848 ql_log(ql_log_warn, vha, 0x00ce, 3849 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3850 ha->fw_major_version, ha->fw_minor_version, 3851 ha->fw_subminor_version); 3852 3853 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3854 IS_QLA28XX(ha)) { 3855 ha->flags.fac_supported = 0; 3856 rval = QLA_SUCCESS; 3857 } 3858 } 3859 } 3860 failed: 3861 if (rval) { 3862 ql_log(ql_log_fatal, vha, 0x00cf, 3863 "Setup chip ****FAILED****.\n"); 3864 } 3865 3866 return (rval); 3867 } 3868 3869 /** 3870 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3871 * @rsp: response queue 3872 * 3873 * Beginning of request ring has initialization control block already built 3874 * by nvram config routine. 3875 * 3876 * Returns 0 on success. 3877 */ 3878 void 3879 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3880 { 3881 uint16_t cnt; 3882 response_t *pkt; 3883 3884 rsp->ring_ptr = rsp->ring; 3885 rsp->ring_index = 0; 3886 rsp->status_srb = NULL; 3887 pkt = rsp->ring_ptr; 3888 for (cnt = 0; cnt < rsp->length; cnt++) { 3889 pkt->signature = RESPONSE_PROCESSED; 3890 pkt++; 3891 } 3892 } 3893 3894 /** 3895 * qla2x00_update_fw_options() - Read and process firmware options. 3896 * @vha: HA context 3897 * 3898 * Returns 0 on success. 3899 */ 3900 void 3901 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3902 { 3903 uint16_t swing, emphasis, tx_sens, rx_sens; 3904 struct qla_hw_data *ha = vha->hw; 3905 3906 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3907 qla2x00_get_fw_options(vha, ha->fw_options); 3908 3909 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3910 return; 3911 3912 /* Serial Link options. */ 3913 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3914 "Serial link options.\n"); 3915 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3916 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 3917 3918 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3919 if (ha->fw_seriallink_options[3] & BIT_2) { 3920 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3921 3922 /* 1G settings */ 3923 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3924 emphasis = (ha->fw_seriallink_options[2] & 3925 (BIT_4 | BIT_3)) >> 3; 3926 tx_sens = ha->fw_seriallink_options[0] & 3927 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3928 rx_sens = (ha->fw_seriallink_options[0] & 3929 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3930 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3931 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3932 if (rx_sens == 0x0) 3933 rx_sens = 0x3; 3934 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3935 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3936 ha->fw_options[10] |= BIT_5 | 3937 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3938 (tx_sens & (BIT_1 | BIT_0)); 3939 3940 /* 2G settings */ 3941 swing = (ha->fw_seriallink_options[2] & 3942 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3943 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3944 tx_sens = ha->fw_seriallink_options[1] & 3945 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3946 rx_sens = (ha->fw_seriallink_options[1] & 3947 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3948 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3949 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3950 if (rx_sens == 0x0) 3951 rx_sens = 0x3; 3952 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3953 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3954 ha->fw_options[11] |= BIT_5 | 3955 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3956 (tx_sens & (BIT_1 | BIT_0)); 3957 } 3958 3959 /* FCP2 options. */ 3960 /* Return command IOCBs without waiting for an ABTS to complete. */ 3961 ha->fw_options[3] |= BIT_13; 3962 3963 /* LED scheme. */ 3964 if (ha->flags.enable_led_scheme) 3965 ha->fw_options[2] |= BIT_12; 3966 3967 /* Detect ISP6312. */ 3968 if (IS_QLA6312(ha)) 3969 ha->fw_options[2] |= BIT_13; 3970 3971 /* Set Retry FLOGI in case of P2P connection */ 3972 if (ha->operating_mode == P2P) { 3973 ha->fw_options[2] |= BIT_3; 3974 ql_dbg(ql_dbg_disc, vha, 0x2100, 3975 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3976 __func__, ha->fw_options[2]); 3977 } 3978 3979 /* Update firmware options. */ 3980 qla2x00_set_fw_options(vha, ha->fw_options); 3981 } 3982 3983 void 3984 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3985 { 3986 int rval; 3987 struct qla_hw_data *ha = vha->hw; 3988 3989 if (IS_P3P_TYPE(ha)) 3990 return; 3991 3992 /* Hold status IOCBs until ABTS response received. */ 3993 if (ql2xfwholdabts) 3994 ha->fw_options[3] |= BIT_12; 3995 3996 /* Set Retry FLOGI in case of P2P connection */ 3997 if (ha->operating_mode == P2P) { 3998 ha->fw_options[2] |= BIT_3; 3999 ql_dbg(ql_dbg_disc, vha, 0x2101, 4000 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 4001 __func__, ha->fw_options[2]); 4002 } 4003 4004 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 4005 if (ql2xmvasynctoatio && 4006 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 4007 if (qla_tgt_mode_enabled(vha) || 4008 qla_dual_mode_enabled(vha)) 4009 ha->fw_options[2] |= BIT_11; 4010 else 4011 ha->fw_options[2] &= ~BIT_11; 4012 } 4013 4014 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4015 IS_QLA28XX(ha)) { 4016 /* 4017 * Tell FW to track each exchange to prevent 4018 * driver from using stale exchange. 4019 */ 4020 if (qla_tgt_mode_enabled(vha) || 4021 qla_dual_mode_enabled(vha)) 4022 ha->fw_options[2] |= BIT_4; 4023 else 4024 ha->fw_options[2] &= ~BIT_4; 4025 4026 /* Reserve 1/2 of emergency exchanges for ELS.*/ 4027 if (qla2xuseresexchforels) 4028 ha->fw_options[2] |= BIT_8; 4029 else 4030 ha->fw_options[2] &= ~BIT_8; 4031 } 4032 4033 if (ql2xrdpenable || ha->flags.scm_supported_f) 4034 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB; 4035 4036 /* Enable Async 8130/8131 events -- transceiver insertion/removal */ 4037 if (IS_BPM_RANGE_CAPABLE(ha)) 4038 ha->fw_options[3] |= BIT_10; 4039 4040 ql_dbg(ql_dbg_init, vha, 0x00e8, 4041 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 4042 __func__, ha->fw_options[1], ha->fw_options[2], 4043 ha->fw_options[3], vha->host->active_mode); 4044 4045 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 4046 qla2x00_set_fw_options(vha, ha->fw_options); 4047 4048 /* Update Serial Link options. */ 4049 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 4050 return; 4051 4052 rval = qla2x00_set_serdes_params(vha, 4053 le16_to_cpu(ha->fw_seriallink_options24[1]), 4054 le16_to_cpu(ha->fw_seriallink_options24[2]), 4055 le16_to_cpu(ha->fw_seriallink_options24[3])); 4056 if (rval != QLA_SUCCESS) { 4057 ql_log(ql_log_warn, vha, 0x0104, 4058 "Unable to update Serial Link options (%x).\n", rval); 4059 } 4060 } 4061 4062 void 4063 qla2x00_config_rings(struct scsi_qla_host *vha) 4064 { 4065 struct qla_hw_data *ha = vha->hw; 4066 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4067 struct req_que *req = ha->req_q_map[0]; 4068 struct rsp_que *rsp = ha->rsp_q_map[0]; 4069 4070 /* Setup ring parameters in initialization control block. */ 4071 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 4072 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 4073 ha->init_cb->request_q_length = cpu_to_le16(req->length); 4074 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 4075 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 4076 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 4077 4078 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0); 4079 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0); 4080 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0); 4081 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0); 4082 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 4083 } 4084 4085 void 4086 qla24xx_config_rings(struct scsi_qla_host *vha) 4087 { 4088 struct qla_hw_data *ha = vha->hw; 4089 device_reg_t *reg = ISP_QUE_REG(ha, 0); 4090 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 4091 struct qla_msix_entry *msix; 4092 struct init_cb_24xx *icb; 4093 uint16_t rid = 0; 4094 struct req_que *req = ha->req_q_map[0]; 4095 struct rsp_que *rsp = ha->rsp_q_map[0]; 4096 4097 /* Setup ring parameters in initialization control block. */ 4098 icb = (struct init_cb_24xx *)ha->init_cb; 4099 icb->request_q_outpointer = cpu_to_le16(0); 4100 icb->response_q_inpointer = cpu_to_le16(0); 4101 icb->request_q_length = cpu_to_le16(req->length); 4102 icb->response_q_length = cpu_to_le16(rsp->length); 4103 put_unaligned_le64(req->dma, &icb->request_q_address); 4104 put_unaligned_le64(rsp->dma, &icb->response_q_address); 4105 4106 /* Setup ATIO queue dma pointers for target mode */ 4107 icb->atio_q_inpointer = cpu_to_le16(0); 4108 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 4109 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 4110 4111 if (IS_SHADOW_REG_CAPABLE(ha)) 4112 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 4113 4114 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 4115 IS_QLA28XX(ha)) { 4116 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 4117 icb->rid = cpu_to_le16(rid); 4118 if (ha->flags.msix_enabled) { 4119 msix = &ha->msix_entries[1]; 4120 ql_dbg(ql_dbg_init, vha, 0x0019, 4121 "Registering vector 0x%x for base que.\n", 4122 msix->entry); 4123 icb->msix = cpu_to_le16(msix->entry); 4124 } 4125 /* Use alternate PCI bus number */ 4126 if (MSB(rid)) 4127 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 4128 /* Use alternate PCI devfn */ 4129 if (LSB(rid)) 4130 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 4131 4132 /* Use Disable MSIX Handshake mode for capable adapters */ 4133 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 4134 (ha->flags.msix_enabled)) { 4135 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 4136 ha->flags.disable_msix_handshake = 1; 4137 ql_dbg(ql_dbg_init, vha, 0x00fe, 4138 "MSIX Handshake Disable Mode turned on.\n"); 4139 } else { 4140 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 4141 } 4142 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4143 4144 wrt_reg_dword(®->isp25mq.req_q_in, 0); 4145 wrt_reg_dword(®->isp25mq.req_q_out, 0); 4146 wrt_reg_dword(®->isp25mq.rsp_q_in, 0); 4147 wrt_reg_dword(®->isp25mq.rsp_q_out, 0); 4148 } else { 4149 wrt_reg_dword(®->isp24.req_q_in, 0); 4150 wrt_reg_dword(®->isp24.req_q_out, 0); 4151 wrt_reg_dword(®->isp24.rsp_q_in, 0); 4152 wrt_reg_dword(®->isp24.rsp_q_out, 0); 4153 } 4154 4155 qlt_24xx_config_rings(vha); 4156 4157 /* If the user has configured the speed, set it here */ 4158 if (ha->set_data_rate) { 4159 ql_dbg(ql_dbg_init, vha, 0x00fd, 4160 "Speed set by user : %s Gbps \n", 4161 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4162 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13); 4163 } 4164 4165 /* PCI posting */ 4166 rd_reg_word(&ioreg->hccr); 4167 } 4168 4169 /** 4170 * qla2x00_init_rings() - Initializes firmware. 4171 * @vha: HA context 4172 * 4173 * Beginning of request ring has initialization control block already built 4174 * by nvram config routine. 4175 * 4176 * Returns 0 on success. 4177 */ 4178 int 4179 qla2x00_init_rings(scsi_qla_host_t *vha) 4180 { 4181 int rval; 4182 unsigned long flags = 0; 4183 int cnt, que; 4184 struct qla_hw_data *ha = vha->hw; 4185 struct req_que *req; 4186 struct rsp_que *rsp; 4187 struct mid_init_cb_24xx *mid_init_cb = 4188 (struct mid_init_cb_24xx *) ha->init_cb; 4189 4190 spin_lock_irqsave(&ha->hardware_lock, flags); 4191 4192 /* Clear outstanding commands array. */ 4193 for (que = 0; que < ha->max_req_queues; que++) { 4194 req = ha->req_q_map[que]; 4195 if (!req || !test_bit(que, ha->req_qid_map)) 4196 continue; 4197 req->out_ptr = (uint16_t *)(req->ring + req->length); 4198 *req->out_ptr = 0; 4199 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4200 req->outstanding_cmds[cnt] = NULL; 4201 4202 req->current_outstanding_cmd = 1; 4203 4204 /* Initialize firmware. */ 4205 req->ring_ptr = req->ring; 4206 req->ring_index = 0; 4207 req->cnt = req->length; 4208 } 4209 4210 for (que = 0; que < ha->max_rsp_queues; que++) { 4211 rsp = ha->rsp_q_map[que]; 4212 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4213 continue; 4214 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length); 4215 *rsp->in_ptr = 0; 4216 /* Initialize response queue entries */ 4217 if (IS_QLAFX00(ha)) 4218 qlafx00_init_response_q_entries(rsp); 4219 else 4220 qla2x00_init_response_q_entries(rsp); 4221 } 4222 4223 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4224 ha->tgt.atio_ring_index = 0; 4225 /* Initialize ATIO queue entries */ 4226 qlt_init_atio_q_entries(vha); 4227 4228 ha->isp_ops->config_rings(vha); 4229 4230 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4231 4232 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 4233 4234 if (IS_QLAFX00(ha)) { 4235 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4236 goto next_check; 4237 } 4238 4239 /* Update any ISP specific firmware options before initialization. */ 4240 ha->isp_ops->update_fw_options(vha); 4241 4242 if (ha->flags.npiv_supported) { 4243 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4244 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4245 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4246 } 4247 4248 if (IS_FWI2_CAPABLE(ha)) { 4249 mid_init_cb->options = cpu_to_le16(BIT_1); 4250 mid_init_cb->init_cb.execution_throttle = 4251 cpu_to_le16(ha->cur_fw_xcb_count); 4252 ha->flags.dport_enabled = 4253 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4254 BIT_7) != 0; 4255 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4256 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4257 /* FA-WWPN Status */ 4258 ha->flags.fawwpn_enabled = 4259 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) & 4260 BIT_6) != 0; 4261 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4262 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4263 } 4264 4265 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4266 next_check: 4267 if (rval) { 4268 ql_log(ql_log_fatal, vha, 0x00d2, 4269 "Init Firmware **** FAILED ****.\n"); 4270 } else { 4271 ql_dbg(ql_dbg_init, vha, 0x00d3, 4272 "Init Firmware -- success.\n"); 4273 QLA_FW_STARTED(ha); 4274 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4275 } 4276 4277 return (rval); 4278 } 4279 4280 /** 4281 * qla2x00_fw_ready() - Waits for firmware ready. 4282 * @vha: HA context 4283 * 4284 * Returns 0 on success. 4285 */ 4286 static int 4287 qla2x00_fw_ready(scsi_qla_host_t *vha) 4288 { 4289 int rval; 4290 unsigned long wtime, mtime, cs84xx_time; 4291 uint16_t min_wait; /* Minimum wait time if loop is down */ 4292 uint16_t wait_time; /* Wait time if loop is coming ready */ 4293 uint16_t state[6]; 4294 struct qla_hw_data *ha = vha->hw; 4295 4296 if (IS_QLAFX00(vha->hw)) 4297 return qlafx00_fw_ready(vha); 4298 4299 rval = QLA_SUCCESS; 4300 4301 /* Time to wait for loop down */ 4302 if (IS_P3P_TYPE(ha)) 4303 min_wait = 30; 4304 else 4305 min_wait = 20; 4306 4307 /* 4308 * Firmware should take at most one RATOV to login, plus 5 seconds for 4309 * our own processing. 4310 */ 4311 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4312 wait_time = min_wait; 4313 } 4314 4315 /* Min wait time if loop down */ 4316 mtime = jiffies + (min_wait * HZ); 4317 4318 /* wait time before firmware ready */ 4319 wtime = jiffies + (wait_time * HZ); 4320 4321 /* Wait for ISP to finish LIP */ 4322 if (!vha->flags.init_done) 4323 ql_log(ql_log_info, vha, 0x801e, 4324 "Waiting for LIP to complete.\n"); 4325 4326 do { 4327 memset(state, -1, sizeof(state)); 4328 rval = qla2x00_get_firmware_state(vha, state); 4329 if (rval == QLA_SUCCESS) { 4330 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4331 vha->device_flags &= ~DFLG_NO_CABLE; 4332 } 4333 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4334 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4335 "fw_state=%x 84xx=%x.\n", state[0], 4336 state[2]); 4337 if ((state[2] & FSTATE_LOGGED_IN) && 4338 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4339 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4340 "Sending verify iocb.\n"); 4341 4342 cs84xx_time = jiffies; 4343 rval = qla84xx_init_chip(vha); 4344 if (rval != QLA_SUCCESS) { 4345 ql_log(ql_log_warn, 4346 vha, 0x8007, 4347 "Init chip failed.\n"); 4348 break; 4349 } 4350 4351 /* Add time taken to initialize. */ 4352 cs84xx_time = jiffies - cs84xx_time; 4353 wtime += cs84xx_time; 4354 mtime += cs84xx_time; 4355 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4356 "Increasing wait time by %ld. " 4357 "New time %ld.\n", cs84xx_time, 4358 wtime); 4359 } 4360 } else if (state[0] == FSTATE_READY) { 4361 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4362 "F/W Ready - OK.\n"); 4363 4364 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4365 &ha->login_timeout, &ha->r_a_tov); 4366 4367 rval = QLA_SUCCESS; 4368 break; 4369 } 4370 4371 rval = QLA_FUNCTION_FAILED; 4372 4373 if (atomic_read(&vha->loop_down_timer) && 4374 state[0] != FSTATE_READY) { 4375 /* Loop down. Timeout on min_wait for states 4376 * other than Wait for Login. 4377 */ 4378 if (time_after_eq(jiffies, mtime)) { 4379 ql_log(ql_log_info, vha, 0x8038, 4380 "Cable is unplugged...\n"); 4381 4382 vha->device_flags |= DFLG_NO_CABLE; 4383 break; 4384 } 4385 } 4386 } else { 4387 /* Mailbox cmd failed. Timeout on min_wait. */ 4388 if (time_after_eq(jiffies, mtime) || 4389 ha->flags.isp82xx_fw_hung) 4390 break; 4391 } 4392 4393 if (time_after_eq(jiffies, wtime)) 4394 break; 4395 4396 /* Delay for a while */ 4397 msleep(500); 4398 } while (1); 4399 4400 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4401 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4402 state[1], state[2], state[3], state[4], state[5], jiffies); 4403 4404 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4405 ql_log(ql_log_warn, vha, 0x803b, 4406 "Firmware ready **** FAILED ****.\n"); 4407 } 4408 4409 return (rval); 4410 } 4411 4412 /* 4413 * qla2x00_configure_hba 4414 * Setup adapter context. 4415 * 4416 * Input: 4417 * ha = adapter state pointer. 4418 * 4419 * Returns: 4420 * 0 = success 4421 * 4422 * Context: 4423 * Kernel context. 4424 */ 4425 static int 4426 qla2x00_configure_hba(scsi_qla_host_t *vha) 4427 { 4428 int rval; 4429 uint16_t loop_id; 4430 uint16_t topo; 4431 uint16_t sw_cap; 4432 uint8_t al_pa; 4433 uint8_t area; 4434 uint8_t domain; 4435 char connect_type[22]; 4436 struct qla_hw_data *ha = vha->hw; 4437 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4438 port_id_t id; 4439 unsigned long flags; 4440 4441 /* Get host addresses. */ 4442 rval = qla2x00_get_adapter_id(vha, 4443 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4444 if (rval != QLA_SUCCESS) { 4445 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4446 IS_CNA_CAPABLE(ha) || 4447 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4448 ql_dbg(ql_dbg_disc, vha, 0x2008, 4449 "Loop is in a transition state.\n"); 4450 } else { 4451 ql_log(ql_log_warn, vha, 0x2009, 4452 "Unable to get host loop ID.\n"); 4453 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4454 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4455 ql_log(ql_log_warn, vha, 0x1151, 4456 "Doing link init.\n"); 4457 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4458 return rval; 4459 } 4460 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4461 } 4462 return (rval); 4463 } 4464 4465 if (topo == 4) { 4466 ql_log(ql_log_info, vha, 0x200a, 4467 "Cannot get topology - retrying.\n"); 4468 return (QLA_FUNCTION_FAILED); 4469 } 4470 4471 vha->loop_id = loop_id; 4472 4473 /* initialize */ 4474 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4475 ha->operating_mode = LOOP; 4476 ha->switch_cap = 0; 4477 4478 switch (topo) { 4479 case 0: 4480 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4481 ha->current_topology = ISP_CFG_NL; 4482 strcpy(connect_type, "(Loop)"); 4483 break; 4484 4485 case 1: 4486 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4487 ha->switch_cap = sw_cap; 4488 ha->current_topology = ISP_CFG_FL; 4489 strcpy(connect_type, "(FL_Port)"); 4490 break; 4491 4492 case 2: 4493 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4494 ha->operating_mode = P2P; 4495 ha->current_topology = ISP_CFG_N; 4496 strcpy(connect_type, "(N_Port-to-N_Port)"); 4497 break; 4498 4499 case 3: 4500 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4501 ha->switch_cap = sw_cap; 4502 ha->operating_mode = P2P; 4503 ha->current_topology = ISP_CFG_F; 4504 strcpy(connect_type, "(F_Port)"); 4505 break; 4506 4507 default: 4508 ql_dbg(ql_dbg_disc, vha, 0x200f, 4509 "HBA in unknown topology %x, using NL.\n", topo); 4510 ha->current_topology = ISP_CFG_NL; 4511 strcpy(connect_type, "(Loop)"); 4512 break; 4513 } 4514 4515 /* Save Host port and loop ID. */ 4516 /* byte order - Big Endian */ 4517 id.b.domain = domain; 4518 id.b.area = area; 4519 id.b.al_pa = al_pa; 4520 id.b.rsvd_1 = 0; 4521 spin_lock_irqsave(&ha->hardware_lock, flags); 4522 if (!(topo == 2 && ha->flags.n2n_bigger)) 4523 qlt_update_host_map(vha, id); 4524 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4525 4526 if (!vha->flags.init_done) 4527 ql_log(ql_log_info, vha, 0x2010, 4528 "Topology - %s, Host Loop address 0x%x.\n", 4529 connect_type, vha->loop_id); 4530 4531 return(rval); 4532 } 4533 4534 inline void 4535 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4536 const char *def) 4537 { 4538 char *st, *en; 4539 uint16_t index; 4540 uint64_t zero[2] = { 0 }; 4541 struct qla_hw_data *ha = vha->hw; 4542 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4543 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4544 4545 if (len > sizeof(zero)) 4546 len = sizeof(zero); 4547 if (memcmp(model, &zero, len) != 0) { 4548 memcpy(ha->model_number, model, len); 4549 st = en = ha->model_number; 4550 en += len - 1; 4551 while (en > st) { 4552 if (*en != 0x20 && *en != 0x00) 4553 break; 4554 *en-- = '\0'; 4555 } 4556 4557 index = (ha->pdev->subsystem_device & 0xff); 4558 if (use_tbl && 4559 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4560 index < QLA_MODEL_NAMES) 4561 strlcpy(ha->model_desc, 4562 qla2x00_model_name[index * 2 + 1], 4563 sizeof(ha->model_desc)); 4564 } else { 4565 index = (ha->pdev->subsystem_device & 0xff); 4566 if (use_tbl && 4567 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4568 index < QLA_MODEL_NAMES) { 4569 strlcpy(ha->model_number, 4570 qla2x00_model_name[index * 2], 4571 sizeof(ha->model_number)); 4572 strlcpy(ha->model_desc, 4573 qla2x00_model_name[index * 2 + 1], 4574 sizeof(ha->model_desc)); 4575 } else { 4576 strlcpy(ha->model_number, def, 4577 sizeof(ha->model_number)); 4578 } 4579 } 4580 if (IS_FWI2_CAPABLE(ha)) 4581 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4582 sizeof(ha->model_desc)); 4583 } 4584 4585 /* On sparc systems, obtain port and node WWN from firmware 4586 * properties. 4587 */ 4588 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4589 { 4590 #ifdef CONFIG_SPARC 4591 struct qla_hw_data *ha = vha->hw; 4592 struct pci_dev *pdev = ha->pdev; 4593 struct device_node *dp = pci_device_to_OF_node(pdev); 4594 const u8 *val; 4595 int len; 4596 4597 val = of_get_property(dp, "port-wwn", &len); 4598 if (val && len >= WWN_SIZE) 4599 memcpy(nv->port_name, val, WWN_SIZE); 4600 4601 val = of_get_property(dp, "node-wwn", &len); 4602 if (val && len >= WWN_SIZE) 4603 memcpy(nv->node_name, val, WWN_SIZE); 4604 #endif 4605 } 4606 4607 /* 4608 * NVRAM configuration for ISP 2xxx 4609 * 4610 * Input: 4611 * ha = adapter block pointer. 4612 * 4613 * Output: 4614 * initialization control block in response_ring 4615 * host adapters parameters in host adapter block 4616 * 4617 * Returns: 4618 * 0 = success. 4619 */ 4620 int 4621 qla2x00_nvram_config(scsi_qla_host_t *vha) 4622 { 4623 int rval; 4624 uint8_t chksum = 0; 4625 uint16_t cnt; 4626 uint8_t *dptr1, *dptr2; 4627 struct qla_hw_data *ha = vha->hw; 4628 init_cb_t *icb = ha->init_cb; 4629 nvram_t *nv = ha->nvram; 4630 uint8_t *ptr = ha->nvram; 4631 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4632 4633 rval = QLA_SUCCESS; 4634 4635 /* Determine NVRAM starting address. */ 4636 ha->nvram_size = sizeof(*nv); 4637 ha->nvram_base = 0; 4638 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4639 if ((rd_reg_word(®->ctrl_status) >> 14) == 1) 4640 ha->nvram_base = 0x80; 4641 4642 /* Get NVRAM data and calculate checksum. */ 4643 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4644 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4645 chksum += *ptr++; 4646 4647 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4648 "Contents of NVRAM.\n"); 4649 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4650 nv, ha->nvram_size); 4651 4652 /* Bad NVRAM data, set defaults parameters. */ 4653 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 4654 nv->nvram_version < 1) { 4655 /* Reset NVRAM data. */ 4656 ql_log(ql_log_warn, vha, 0x0064, 4657 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 4658 chksum, nv->id, nv->nvram_version); 4659 ql_log(ql_log_warn, vha, 0x0065, 4660 "Falling back to " 4661 "functioning (yet invalid -- WWPN) defaults.\n"); 4662 4663 /* 4664 * Set default initialization control block. 4665 */ 4666 memset(nv, 0, ha->nvram_size); 4667 nv->parameter_block_version = ICB_VERSION; 4668 4669 if (IS_QLA23XX(ha)) { 4670 nv->firmware_options[0] = BIT_2 | BIT_1; 4671 nv->firmware_options[1] = BIT_7 | BIT_5; 4672 nv->add_firmware_options[0] = BIT_5; 4673 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4674 nv->frame_payload_size = cpu_to_le16(2048); 4675 nv->special_options[1] = BIT_7; 4676 } else if (IS_QLA2200(ha)) { 4677 nv->firmware_options[0] = BIT_2 | BIT_1; 4678 nv->firmware_options[1] = BIT_7 | BIT_5; 4679 nv->add_firmware_options[0] = BIT_5; 4680 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4681 nv->frame_payload_size = cpu_to_le16(1024); 4682 } else if (IS_QLA2100(ha)) { 4683 nv->firmware_options[0] = BIT_3 | BIT_1; 4684 nv->firmware_options[1] = BIT_5; 4685 nv->frame_payload_size = cpu_to_le16(1024); 4686 } 4687 4688 nv->max_iocb_allocation = cpu_to_le16(256); 4689 nv->execution_throttle = cpu_to_le16(16); 4690 nv->retry_count = 8; 4691 nv->retry_delay = 1; 4692 4693 nv->port_name[0] = 33; 4694 nv->port_name[3] = 224; 4695 nv->port_name[4] = 139; 4696 4697 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4698 4699 nv->login_timeout = 4; 4700 4701 /* 4702 * Set default host adapter parameters 4703 */ 4704 nv->host_p[1] = BIT_2; 4705 nv->reset_delay = 5; 4706 nv->port_down_retry_count = 8; 4707 nv->max_luns_per_target = cpu_to_le16(8); 4708 nv->link_down_timeout = 60; 4709 4710 rval = 1; 4711 } 4712 4713 /* Reset Initialization control block */ 4714 memset(icb, 0, ha->init_cb_size); 4715 4716 /* 4717 * Setup driver NVRAM options. 4718 */ 4719 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4720 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4721 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4722 nv->firmware_options[1] &= ~BIT_4; 4723 4724 if (IS_QLA23XX(ha)) { 4725 nv->firmware_options[0] |= BIT_2; 4726 nv->firmware_options[0] &= ~BIT_3; 4727 nv->special_options[0] &= ~BIT_6; 4728 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4729 4730 if (IS_QLA2300(ha)) { 4731 if (ha->fb_rev == FPM_2310) { 4732 strcpy(ha->model_number, "QLA2310"); 4733 } else { 4734 strcpy(ha->model_number, "QLA2300"); 4735 } 4736 } else { 4737 qla2x00_set_model_info(vha, nv->model_number, 4738 sizeof(nv->model_number), "QLA23xx"); 4739 } 4740 } else if (IS_QLA2200(ha)) { 4741 nv->firmware_options[0] |= BIT_2; 4742 /* 4743 * 'Point-to-point preferred, else loop' is not a safe 4744 * connection mode setting. 4745 */ 4746 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4747 (BIT_5 | BIT_4)) { 4748 /* Force 'loop preferred, else point-to-point'. */ 4749 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4750 nv->add_firmware_options[0] |= BIT_5; 4751 } 4752 strcpy(ha->model_number, "QLA22xx"); 4753 } else /*if (IS_QLA2100(ha))*/ { 4754 strcpy(ha->model_number, "QLA2100"); 4755 } 4756 4757 /* 4758 * Copy over NVRAM RISC parameter block to initialization control block. 4759 */ 4760 dptr1 = (uint8_t *)icb; 4761 dptr2 = (uint8_t *)&nv->parameter_block_version; 4762 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4763 while (cnt--) 4764 *dptr1++ = *dptr2++; 4765 4766 /* Copy 2nd half. */ 4767 dptr1 = (uint8_t *)icb->add_firmware_options; 4768 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4769 while (cnt--) 4770 *dptr1++ = *dptr2++; 4771 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4772 /* Use alternate WWN? */ 4773 if (nv->host_p[1] & BIT_7) { 4774 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4775 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4776 } 4777 4778 /* Prepare nodename */ 4779 if ((icb->firmware_options[1] & BIT_6) == 0) { 4780 /* 4781 * Firmware will apply the following mask if the nodename was 4782 * not provided. 4783 */ 4784 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4785 icb->node_name[0] &= 0xF0; 4786 } 4787 4788 /* 4789 * Set host adapter parameters. 4790 */ 4791 4792 /* 4793 * BIT_7 in the host-parameters section allows for modification to 4794 * internal driver logging. 4795 */ 4796 if (nv->host_p[0] & BIT_7) 4797 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4798 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4799 /* Always load RISC code on non ISP2[12]00 chips. */ 4800 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4801 ha->flags.disable_risc_code_load = 0; 4802 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4803 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4804 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4805 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4806 ha->flags.disable_serdes = 0; 4807 4808 ha->operating_mode = 4809 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4810 4811 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4812 sizeof(ha->fw_seriallink_options)); 4813 4814 /* save HBA serial number */ 4815 ha->serial0 = icb->port_name[5]; 4816 ha->serial1 = icb->port_name[6]; 4817 ha->serial2 = icb->port_name[7]; 4818 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4819 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4820 4821 icb->execution_throttle = cpu_to_le16(0xFFFF); 4822 4823 ha->retry_count = nv->retry_count; 4824 4825 /* Set minimum login_timeout to 4 seconds. */ 4826 if (nv->login_timeout != ql2xlogintimeout) 4827 nv->login_timeout = ql2xlogintimeout; 4828 if (nv->login_timeout < 4) 4829 nv->login_timeout = 4; 4830 ha->login_timeout = nv->login_timeout; 4831 4832 /* Set minimum RATOV to 100 tenths of a second. */ 4833 ha->r_a_tov = 100; 4834 4835 ha->loop_reset_delay = nv->reset_delay; 4836 4837 /* Link Down Timeout = 0: 4838 * 4839 * When Port Down timer expires we will start returning 4840 * I/O's to OS with "DID_NO_CONNECT". 4841 * 4842 * Link Down Timeout != 0: 4843 * 4844 * The driver waits for the link to come up after link down 4845 * before returning I/Os to OS with "DID_NO_CONNECT". 4846 */ 4847 if (nv->link_down_timeout == 0) { 4848 ha->loop_down_abort_time = 4849 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4850 } else { 4851 ha->link_down_timeout = nv->link_down_timeout; 4852 ha->loop_down_abort_time = 4853 (LOOP_DOWN_TIME - ha->link_down_timeout); 4854 } 4855 4856 /* 4857 * Need enough time to try and get the port back. 4858 */ 4859 ha->port_down_retry_count = nv->port_down_retry_count; 4860 if (qlport_down_retry) 4861 ha->port_down_retry_count = qlport_down_retry; 4862 /* Set login_retry_count */ 4863 ha->login_retry_count = nv->retry_count; 4864 if (ha->port_down_retry_count == nv->port_down_retry_count && 4865 ha->port_down_retry_count > 3) 4866 ha->login_retry_count = ha->port_down_retry_count; 4867 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4868 ha->login_retry_count = ha->port_down_retry_count; 4869 if (ql2xloginretrycount) 4870 ha->login_retry_count = ql2xloginretrycount; 4871 4872 icb->lun_enables = cpu_to_le16(0); 4873 icb->command_resource_count = 0; 4874 icb->immediate_notify_resource_count = 0; 4875 icb->timeout = cpu_to_le16(0); 4876 4877 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4878 /* Enable RIO */ 4879 icb->firmware_options[0] &= ~BIT_3; 4880 icb->add_firmware_options[0] &= 4881 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4882 icb->add_firmware_options[0] |= BIT_2; 4883 icb->response_accumulation_timer = 3; 4884 icb->interrupt_delay_timer = 5; 4885 4886 vha->flags.process_response_queue = 1; 4887 } else { 4888 /* Enable ZIO. */ 4889 if (!vha->flags.init_done) { 4890 ha->zio_mode = icb->add_firmware_options[0] & 4891 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4892 ha->zio_timer = icb->interrupt_delay_timer ? 4893 icb->interrupt_delay_timer : 2; 4894 } 4895 icb->add_firmware_options[0] &= 4896 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4897 vha->flags.process_response_queue = 0; 4898 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4899 ha->zio_mode = QLA_ZIO_MODE_6; 4900 4901 ql_log(ql_log_info, vha, 0x0068, 4902 "ZIO mode %d enabled; timer delay (%d us).\n", 4903 ha->zio_mode, ha->zio_timer * 100); 4904 4905 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4906 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4907 vha->flags.process_response_queue = 1; 4908 } 4909 } 4910 4911 if (rval) { 4912 ql_log(ql_log_warn, vha, 0x0069, 4913 "NVRAM configuration failed.\n"); 4914 } 4915 return (rval); 4916 } 4917 4918 static void 4919 qla2x00_rport_del(void *data) 4920 { 4921 fc_port_t *fcport = data; 4922 struct fc_rport *rport; 4923 unsigned long flags; 4924 4925 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4926 rport = fcport->drport ? fcport->drport : fcport->rport; 4927 fcport->drport = NULL; 4928 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4929 if (rport) { 4930 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4931 "%s %8phN. rport %p roles %x\n", 4932 __func__, fcport->port_name, rport, 4933 rport->roles); 4934 4935 fc_remote_port_delete(rport); 4936 } 4937 } 4938 4939 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 4940 { 4941 int old_state; 4942 4943 old_state = atomic_read(&fcport->state); 4944 atomic_set(&fcport->state, state); 4945 4946 /* Don't print state transitions during initial allocation of fcport */ 4947 if (old_state && old_state != state) { 4948 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 4949 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 4950 fcport->port_name, port_state_str[old_state], 4951 port_state_str[state], fcport->d_id.b.domain, 4952 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4953 } 4954 } 4955 4956 /** 4957 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4958 * @vha: HA context 4959 * @flags: allocation flags 4960 * 4961 * Returns a pointer to the allocated fcport, or NULL, if none available. 4962 */ 4963 fc_port_t * 4964 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4965 { 4966 fc_port_t *fcport; 4967 4968 fcport = kzalloc(sizeof(fc_port_t), flags); 4969 if (!fcport) 4970 return NULL; 4971 4972 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4973 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4974 flags); 4975 if (!fcport->ct_desc.ct_sns) { 4976 ql_log(ql_log_warn, vha, 0xd049, 4977 "Failed to allocate ct_sns request.\n"); 4978 kfree(fcport); 4979 return NULL; 4980 } 4981 4982 /* Setup fcport template structure. */ 4983 fcport->vha = vha; 4984 fcport->port_type = FCT_UNKNOWN; 4985 fcport->loop_id = FC_NO_LOOP_ID; 4986 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4987 fcport->supported_classes = FC_COS_UNSPECIFIED; 4988 fcport->fp_speed = PORT_SPEED_UNKNOWN; 4989 4990 fcport->disc_state = DSC_DELETED; 4991 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4992 fcport->deleted = QLA_SESS_DELETED; 4993 fcport->login_retry = vha->hw->login_retry_count; 4994 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 4995 fcport->logout_on_delete = 1; 4996 4997 if (!fcport->ct_desc.ct_sns) { 4998 ql_log(ql_log_warn, vha, 0xd049, 4999 "Failed to allocate ct_sns request.\n"); 5000 kfree(fcport); 5001 return NULL; 5002 } 5003 5004 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 5005 INIT_WORK(&fcport->free_work, qlt_free_session_done); 5006 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 5007 INIT_LIST_HEAD(&fcport->gnl_entry); 5008 INIT_LIST_HEAD(&fcport->list); 5009 5010 INIT_LIST_HEAD(&fcport->sess_cmd_list); 5011 spin_lock_init(&fcport->sess_cmd_lock); 5012 5013 return fcport; 5014 } 5015 5016 void 5017 qla2x00_free_fcport(fc_port_t *fcport) 5018 { 5019 if (fcport->ct_desc.ct_sns) { 5020 dma_free_coherent(&fcport->vha->hw->pdev->dev, 5021 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 5022 fcport->ct_desc.ct_sns_dma); 5023 5024 fcport->ct_desc.ct_sns = NULL; 5025 } 5026 list_del(&fcport->list); 5027 qla2x00_clear_loop_id(fcport); 5028 kfree(fcport); 5029 } 5030 5031 static void qla_get_login_template(scsi_qla_host_t *vha) 5032 { 5033 struct qla_hw_data *ha = vha->hw; 5034 int rval; 5035 u32 *bp, sz; 5036 __be32 *q; 5037 5038 memset(ha->init_cb, 0, ha->init_cb_size); 5039 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size); 5040 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 5041 ha->init_cb, sz); 5042 if (rval != QLA_SUCCESS) { 5043 ql_dbg(ql_dbg_init, vha, 0x00d1, 5044 "PLOGI ELS param read fail.\n"); 5045 return; 5046 } 5047 q = (__be32 *)&ha->plogi_els_payld.fl_csp; 5048 5049 bp = (uint32_t *)ha->init_cb; 5050 cpu_to_be32_array(q, bp, sz / 4); 5051 ha->flags.plogi_template_valid = 1; 5052 } 5053 5054 /* 5055 * qla2x00_configure_loop 5056 * Updates Fibre Channel Device Database with what is actually on loop. 5057 * 5058 * Input: 5059 * ha = adapter block pointer. 5060 * 5061 * Returns: 5062 * 0 = success. 5063 * 1 = error. 5064 * 2 = database was full and device was not configured. 5065 */ 5066 static int 5067 qla2x00_configure_loop(scsi_qla_host_t *vha) 5068 { 5069 int rval; 5070 unsigned long flags, save_flags; 5071 struct qla_hw_data *ha = vha->hw; 5072 5073 rval = QLA_SUCCESS; 5074 5075 /* Get Initiator ID */ 5076 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 5077 rval = qla2x00_configure_hba(vha); 5078 if (rval != QLA_SUCCESS) { 5079 ql_dbg(ql_dbg_disc, vha, 0x2013, 5080 "Unable to configure HBA.\n"); 5081 return (rval); 5082 } 5083 } 5084 5085 save_flags = flags = vha->dpc_flags; 5086 ql_dbg(ql_dbg_disc, vha, 0x2014, 5087 "Configure loop -- dpc flags = 0x%lx.\n", flags); 5088 5089 /* 5090 * If we have both an RSCN and PORT UPDATE pending then handle them 5091 * both at the same time. 5092 */ 5093 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5094 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 5095 5096 qla2x00_get_data_rate(vha); 5097 qla_get_login_template(vha); 5098 5099 /* Determine what we need to do */ 5100 if ((ha->current_topology == ISP_CFG_FL || 5101 ha->current_topology == ISP_CFG_F) && 5102 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 5103 5104 set_bit(RSCN_UPDATE, &flags); 5105 clear_bit(LOCAL_LOOP_UPDATE, &flags); 5106 5107 } else if (ha->current_topology == ISP_CFG_NL || 5108 ha->current_topology == ISP_CFG_N) { 5109 clear_bit(RSCN_UPDATE, &flags); 5110 set_bit(LOCAL_LOOP_UPDATE, &flags); 5111 } else if (!vha->flags.online || 5112 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 5113 set_bit(RSCN_UPDATE, &flags); 5114 set_bit(LOCAL_LOOP_UPDATE, &flags); 5115 } 5116 5117 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 5118 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5119 ql_dbg(ql_dbg_disc, vha, 0x2015, 5120 "Loop resync needed, failing.\n"); 5121 rval = QLA_FUNCTION_FAILED; 5122 } else 5123 rval = qla2x00_configure_local_loop(vha); 5124 } 5125 5126 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 5127 if (LOOP_TRANSITION(vha)) { 5128 ql_dbg(ql_dbg_disc, vha, 0x2099, 5129 "Needs RSCN update and loop transition.\n"); 5130 rval = QLA_FUNCTION_FAILED; 5131 } 5132 else 5133 rval = qla2x00_configure_fabric(vha); 5134 } 5135 5136 if (rval == QLA_SUCCESS) { 5137 if (atomic_read(&vha->loop_down_timer) || 5138 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5139 rval = QLA_FUNCTION_FAILED; 5140 } else { 5141 atomic_set(&vha->loop_state, LOOP_READY); 5142 ql_dbg(ql_dbg_disc, vha, 0x2069, 5143 "LOOP READY.\n"); 5144 ha->flags.fw_init_done = 1; 5145 5146 /* 5147 * Process any ATIO queue entries that came in 5148 * while we weren't online. 5149 */ 5150 if (qla_tgt_mode_enabled(vha) || 5151 qla_dual_mode_enabled(vha)) { 5152 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 5153 qlt_24xx_process_atio_queue(vha, 0); 5154 spin_unlock_irqrestore(&ha->tgt.atio_lock, 5155 flags); 5156 } 5157 } 5158 } 5159 5160 if (rval) { 5161 ql_dbg(ql_dbg_disc, vha, 0x206a, 5162 "%s *** FAILED ***.\n", __func__); 5163 } else { 5164 ql_dbg(ql_dbg_disc, vha, 0x206b, 5165 "%s: exiting normally.\n", __func__); 5166 } 5167 5168 /* Restore state if a resync event occurred during processing */ 5169 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5170 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5171 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5172 if (test_bit(RSCN_UPDATE, &save_flags)) { 5173 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5174 } 5175 } 5176 5177 return (rval); 5178 } 5179 5180 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha) 5181 { 5182 unsigned long flags; 5183 fc_port_t *fcport; 5184 5185 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) 5186 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 5187 5188 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5189 if (fcport->n2n_flag) { 5190 qla24xx_fcport_handle_login(vha, fcport); 5191 return QLA_SUCCESS; 5192 } 5193 } 5194 5195 spin_lock_irqsave(&vha->work_lock, flags); 5196 vha->scan.scan_retry++; 5197 spin_unlock_irqrestore(&vha->work_lock, flags); 5198 5199 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5200 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5201 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5202 } 5203 return QLA_FUNCTION_FAILED; 5204 } 5205 5206 /* 5207 * qla2x00_configure_local_loop 5208 * Updates Fibre Channel Device Database with local loop devices. 5209 * 5210 * Input: 5211 * ha = adapter block pointer. 5212 * 5213 * Returns: 5214 * 0 = success. 5215 */ 5216 static int 5217 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5218 { 5219 int rval, rval2; 5220 int found_devs; 5221 int found; 5222 fc_port_t *fcport, *new_fcport; 5223 uint16_t index; 5224 uint16_t entries; 5225 struct gid_list_info *gid; 5226 uint16_t loop_id; 5227 uint8_t domain, area, al_pa; 5228 struct qla_hw_data *ha = vha->hw; 5229 unsigned long flags; 5230 5231 /* Inititae N2N login. */ 5232 if (N2N_TOPO(ha)) 5233 return qla2x00_configure_n2n_loop(vha); 5234 5235 found_devs = 0; 5236 new_fcport = NULL; 5237 entries = MAX_FIBRE_DEVICES_LOOP; 5238 5239 /* Get list of logged in devices. */ 5240 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5241 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5242 &entries); 5243 if (rval != QLA_SUCCESS) 5244 goto err; 5245 5246 ql_dbg(ql_dbg_disc, vha, 0x2011, 5247 "Entries in ID list (%d).\n", entries); 5248 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5249 ha->gid_list, entries * sizeof(*ha->gid_list)); 5250 5251 if (entries == 0) { 5252 spin_lock_irqsave(&vha->work_lock, flags); 5253 vha->scan.scan_retry++; 5254 spin_unlock_irqrestore(&vha->work_lock, flags); 5255 5256 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5257 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5258 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5259 } 5260 } else { 5261 vha->scan.scan_retry = 0; 5262 } 5263 5264 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5265 fcport->scan_state = QLA_FCPORT_SCAN; 5266 } 5267 5268 /* Allocate temporary fcport for any new fcports discovered. */ 5269 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5270 if (new_fcport == NULL) { 5271 ql_log(ql_log_warn, vha, 0x2012, 5272 "Memory allocation failed for fcport.\n"); 5273 rval = QLA_MEMORY_ALLOC_FAILED; 5274 goto err; 5275 } 5276 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5277 5278 /* Add devices to port list. */ 5279 gid = ha->gid_list; 5280 for (index = 0; index < entries; index++) { 5281 domain = gid->domain; 5282 area = gid->area; 5283 al_pa = gid->al_pa; 5284 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5285 loop_id = gid->loop_id_2100; 5286 else 5287 loop_id = le16_to_cpu(gid->loop_id); 5288 gid = (void *)gid + ha->gid_list_info_size; 5289 5290 /* Bypass reserved domain fields. */ 5291 if ((domain & 0xf0) == 0xf0) 5292 continue; 5293 5294 /* Bypass if not same domain and area of adapter. */ 5295 if (area && domain && ((area != vha->d_id.b.area) || 5296 (domain != vha->d_id.b.domain)) && 5297 (ha->current_topology == ISP_CFG_NL)) 5298 continue; 5299 5300 5301 /* Bypass invalid local loop ID. */ 5302 if (loop_id > LAST_LOCAL_LOOP_ID) 5303 continue; 5304 5305 memset(new_fcport->port_name, 0, WWN_SIZE); 5306 5307 /* Fill in member data. */ 5308 new_fcport->d_id.b.domain = domain; 5309 new_fcport->d_id.b.area = area; 5310 new_fcport->d_id.b.al_pa = al_pa; 5311 new_fcport->loop_id = loop_id; 5312 new_fcport->scan_state = QLA_FCPORT_FOUND; 5313 5314 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5315 if (rval2 != QLA_SUCCESS) { 5316 ql_dbg(ql_dbg_disc, vha, 0x2097, 5317 "Failed to retrieve fcport information " 5318 "-- get_port_database=%x, loop_id=0x%04x.\n", 5319 rval2, new_fcport->loop_id); 5320 /* Skip retry if N2N */ 5321 if (ha->current_topology != ISP_CFG_N) { 5322 ql_dbg(ql_dbg_disc, vha, 0x2105, 5323 "Scheduling resync.\n"); 5324 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5325 continue; 5326 } 5327 } 5328 5329 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5330 /* Check for matching device in port list. */ 5331 found = 0; 5332 fcport = NULL; 5333 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5334 if (memcmp(new_fcport->port_name, fcport->port_name, 5335 WWN_SIZE)) 5336 continue; 5337 5338 fcport->flags &= ~FCF_FABRIC_DEVICE; 5339 fcport->loop_id = new_fcport->loop_id; 5340 fcport->port_type = new_fcport->port_type; 5341 fcport->d_id.b24 = new_fcport->d_id.b24; 5342 memcpy(fcport->node_name, new_fcport->node_name, 5343 WWN_SIZE); 5344 fcport->scan_state = QLA_FCPORT_FOUND; 5345 found++; 5346 break; 5347 } 5348 5349 if (!found) { 5350 /* New device, add to fcports list. */ 5351 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5352 5353 /* Allocate a new replacement fcport. */ 5354 fcport = new_fcport; 5355 5356 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5357 5358 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5359 5360 if (new_fcport == NULL) { 5361 ql_log(ql_log_warn, vha, 0xd031, 5362 "Failed to allocate memory for fcport.\n"); 5363 rval = QLA_MEMORY_ALLOC_FAILED; 5364 goto err; 5365 } 5366 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5367 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5368 } 5369 5370 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5371 5372 /* Base iIDMA settings on HBA port speed. */ 5373 fcport->fp_speed = ha->link_data_rate; 5374 5375 found_devs++; 5376 } 5377 5378 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5379 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5380 break; 5381 5382 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5383 if ((qla_dual_mode_enabled(vha) || 5384 qla_ini_mode_enabled(vha)) && 5385 atomic_read(&fcport->state) == FCS_ONLINE) { 5386 qla2x00_mark_device_lost(vha, fcport, 5387 ql2xplogiabsentdevice); 5388 if (fcport->loop_id != FC_NO_LOOP_ID && 5389 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5390 fcport->port_type != FCT_INITIATOR && 5391 fcport->port_type != FCT_BROADCAST) { 5392 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5393 "%s %d %8phC post del sess\n", 5394 __func__, __LINE__, 5395 fcport->port_name); 5396 5397 qlt_schedule_sess_for_deletion(fcport); 5398 continue; 5399 } 5400 } 5401 } 5402 5403 if (fcport->scan_state == QLA_FCPORT_FOUND) 5404 qla24xx_fcport_handle_login(vha, fcport); 5405 } 5406 5407 qla2x00_free_fcport(new_fcport); 5408 5409 return rval; 5410 5411 err: 5412 ql_dbg(ql_dbg_disc, vha, 0x2098, 5413 "Configure local loop error exit: rval=%x.\n", rval); 5414 return rval; 5415 } 5416 5417 static void 5418 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5419 { 5420 int rval; 5421 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5422 struct qla_hw_data *ha = vha->hw; 5423 5424 if (!IS_IIDMA_CAPABLE(ha)) 5425 return; 5426 5427 if (atomic_read(&fcport->state) != FCS_ONLINE) 5428 return; 5429 5430 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5431 fcport->fp_speed > ha->link_data_rate || 5432 !ha->flags.gpsc_supported) 5433 return; 5434 5435 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5436 mb); 5437 if (rval != QLA_SUCCESS) { 5438 ql_dbg(ql_dbg_disc, vha, 0x2004, 5439 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5440 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5441 } else { 5442 ql_dbg(ql_dbg_disc, vha, 0x2005, 5443 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5444 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5445 fcport->fp_speed, fcport->port_name); 5446 } 5447 } 5448 5449 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5450 { 5451 qla2x00_iidma_fcport(vha, fcport); 5452 qla24xx_update_fcport_fcp_prio(vha, fcport); 5453 } 5454 5455 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5456 { 5457 struct qla_work_evt *e; 5458 5459 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5460 if (!e) 5461 return QLA_FUNCTION_FAILED; 5462 5463 e->u.fcport.fcport = fcport; 5464 return qla2x00_post_work(vha, e); 5465 } 5466 5467 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5468 static void 5469 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5470 { 5471 struct fc_rport_identifiers rport_ids; 5472 struct fc_rport *rport; 5473 unsigned long flags; 5474 5475 if (atomic_read(&fcport->state) == FCS_ONLINE) 5476 return; 5477 5478 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5479 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5480 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5481 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5482 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5483 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5484 if (!rport) { 5485 ql_log(ql_log_warn, vha, 0x2006, 5486 "Unable to allocate fc remote port.\n"); 5487 return; 5488 } 5489 5490 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5491 *((fc_port_t **)rport->dd_data) = fcport; 5492 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5493 5494 rport->supported_classes = fcport->supported_classes; 5495 5496 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 5497 if (fcport->port_type == FCT_INITIATOR) 5498 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 5499 if (fcport->port_type == FCT_TARGET) 5500 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 5501 if (fcport->port_type & FCT_NVME_INITIATOR) 5502 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 5503 if (fcport->port_type & FCT_NVME_TARGET) 5504 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 5505 if (fcport->port_type & FCT_NVME_DISCOVERY) 5506 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 5507 5508 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5509 "%s %8phN. rport %p is %s mode\n", 5510 __func__, fcport->port_name, rport, 5511 (fcport->port_type == FCT_TARGET) ? "tgt" : 5512 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5513 5514 fc_remote_port_rolechg(rport, rport_ids.roles); 5515 } 5516 5517 /* 5518 * qla2x00_update_fcport 5519 * Updates device on list. 5520 * 5521 * Input: 5522 * ha = adapter block pointer. 5523 * fcport = port structure pointer. 5524 * 5525 * Return: 5526 * 0 - Success 5527 * BIT_0 - error 5528 * 5529 * Context: 5530 * Kernel context. 5531 */ 5532 void 5533 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5534 { 5535 if (IS_SW_RESV_ADDR(fcport->d_id)) 5536 return; 5537 5538 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5539 __func__, fcport->port_name); 5540 5541 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT); 5542 fcport->login_retry = vha->hw->login_retry_count; 5543 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5544 fcport->deleted = 0; 5545 if (vha->hw->current_topology == ISP_CFG_NL) 5546 fcport->logout_on_delete = 0; 5547 else 5548 fcport->logout_on_delete = 1; 5549 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5550 5551 switch (vha->hw->current_topology) { 5552 case ISP_CFG_N: 5553 case ISP_CFG_NL: 5554 fcport->keep_nport_handle = 1; 5555 break; 5556 default: 5557 break; 5558 } 5559 5560 qla2x00_iidma_fcport(vha, fcport); 5561 5562 qla2x00_dfs_create_rport(vha, fcport); 5563 5564 if (NVME_TARGET(vha->hw, fcport)) { 5565 qla_nvme_register_remote(vha, fcport); 5566 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5567 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5568 return; 5569 } 5570 5571 qla24xx_update_fcport_fcp_prio(vha, fcport); 5572 5573 switch (vha->host->active_mode) { 5574 case MODE_INITIATOR: 5575 qla2x00_reg_remote_port(vha, fcport); 5576 break; 5577 case MODE_TARGET: 5578 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5579 !vha->vha_tgt.qla_tgt->tgt_stopped) 5580 qlt_fc_port_added(vha, fcport); 5581 break; 5582 case MODE_DUAL: 5583 qla2x00_reg_remote_port(vha, fcport); 5584 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5585 !vha->vha_tgt.qla_tgt->tgt_stopped) 5586 qlt_fc_port_added(vha, fcport); 5587 break; 5588 default: 5589 break; 5590 } 5591 5592 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5593 5594 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5595 if (fcport->id_changed) { 5596 fcport->id_changed = 0; 5597 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5598 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5599 __func__, __LINE__, fcport->port_name, 5600 vha->fcport_count); 5601 qla24xx_post_gfpnid_work(vha, fcport); 5602 } else { 5603 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5604 "%s %d %8phC post gpsc fcp_cnt %d\n", 5605 __func__, __LINE__, fcport->port_name, 5606 vha->fcport_count); 5607 qla24xx_post_gpsc_work(vha, fcport); 5608 } 5609 } 5610 5611 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE); 5612 } 5613 5614 void qla_register_fcport_fn(struct work_struct *work) 5615 { 5616 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5617 u32 rscn_gen = fcport->rscn_gen; 5618 u16 data[2]; 5619 5620 if (IS_SW_RESV_ADDR(fcport->d_id)) 5621 return; 5622 5623 qla2x00_update_fcport(fcport->vha, fcport); 5624 5625 if (rscn_gen != fcport->rscn_gen) { 5626 /* RSCN(s) came in while registration */ 5627 switch (fcport->next_disc_state) { 5628 case DSC_DELETE_PEND: 5629 qlt_schedule_sess_for_deletion(fcport); 5630 break; 5631 case DSC_ADISC: 5632 data[0] = data[1] = 0; 5633 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5634 data); 5635 break; 5636 default: 5637 break; 5638 } 5639 } 5640 } 5641 5642 /* 5643 * qla2x00_configure_fabric 5644 * Setup SNS devices with loop ID's. 5645 * 5646 * Input: 5647 * ha = adapter block pointer. 5648 * 5649 * Returns: 5650 * 0 = success. 5651 * BIT_0 = error 5652 */ 5653 static int 5654 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5655 { 5656 int rval; 5657 fc_port_t *fcport; 5658 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5659 uint16_t loop_id; 5660 LIST_HEAD(new_fcports); 5661 struct qla_hw_data *ha = vha->hw; 5662 int discovery_gen; 5663 5664 /* If FL port exists, then SNS is present */ 5665 if (IS_FWI2_CAPABLE(ha)) 5666 loop_id = NPH_F_PORT; 5667 else 5668 loop_id = SNS_FL_PORT; 5669 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5670 if (rval != QLA_SUCCESS) { 5671 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5672 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5673 5674 vha->device_flags &= ~SWITCH_FOUND; 5675 return (QLA_SUCCESS); 5676 } 5677 vha->device_flags |= SWITCH_FOUND; 5678 5679 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0); 5680 if (rval != QLA_SUCCESS) 5681 ql_dbg(ql_dbg_disc, vha, 0x20ff, 5682 "Failed to get Fabric Port Name\n"); 5683 5684 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5685 rval = qla2x00_send_change_request(vha, 0x3, 0); 5686 if (rval != QLA_SUCCESS) 5687 ql_log(ql_log_warn, vha, 0x121, 5688 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5689 rval); 5690 } 5691 5692 do { 5693 qla2x00_mgmt_svr_login(vha); 5694 5695 /* Ensure we are logged into the SNS. */ 5696 loop_id = NPH_SNS_LID(ha); 5697 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5698 0xfc, mb, BIT_1|BIT_0); 5699 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5700 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5701 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5702 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5703 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5704 return rval; 5705 } 5706 5707 /* FDMI support. */ 5708 if (ql2xfdmienable && 5709 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5710 qla2x00_fdmi_register(vha); 5711 5712 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5713 if (qla2x00_rft_id(vha)) { 5714 /* EMPTY */ 5715 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5716 "Register FC-4 TYPE failed.\n"); 5717 if (test_bit(LOOP_RESYNC_NEEDED, 5718 &vha->dpc_flags)) 5719 break; 5720 } 5721 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5722 /* EMPTY */ 5723 ql_dbg(ql_dbg_disc, vha, 0x209a, 5724 "Register FC-4 Features failed.\n"); 5725 if (test_bit(LOOP_RESYNC_NEEDED, 5726 &vha->dpc_flags)) 5727 break; 5728 } 5729 if (vha->flags.nvme_enabled) { 5730 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5731 ql_dbg(ql_dbg_disc, vha, 0x2049, 5732 "Register NVME FC Type Features failed.\n"); 5733 } 5734 } 5735 if (qla2x00_rnn_id(vha)) { 5736 /* EMPTY */ 5737 ql_dbg(ql_dbg_disc, vha, 0x2104, 5738 "Register Node Name failed.\n"); 5739 if (test_bit(LOOP_RESYNC_NEEDED, 5740 &vha->dpc_flags)) 5741 break; 5742 } else if (qla2x00_rsnn_nn(vha)) { 5743 /* EMPTY */ 5744 ql_dbg(ql_dbg_disc, vha, 0x209b, 5745 "Register Symbolic Node Name failed.\n"); 5746 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5747 break; 5748 } 5749 } 5750 5751 5752 /* Mark the time right before querying FW for connected ports. 5753 * This process is long, asynchronous and by the time it's done, 5754 * collected information might not be accurate anymore. E.g. 5755 * disconnected port might have re-connected and a brand new 5756 * session has been created. In this case session's generation 5757 * will be newer than discovery_gen. */ 5758 qlt_do_generation_tick(vha, &discovery_gen); 5759 5760 if (USE_ASYNC_SCAN(ha)) { 5761 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5762 NULL); 5763 if (rval) 5764 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5765 } else { 5766 list_for_each_entry(fcport, &vha->vp_fcports, list) 5767 fcport->scan_state = QLA_FCPORT_SCAN; 5768 5769 rval = qla2x00_find_all_fabric_devs(vha); 5770 } 5771 if (rval != QLA_SUCCESS) 5772 break; 5773 } while (0); 5774 5775 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5776 qla_nvme_register_hba(vha); 5777 5778 if (rval) 5779 ql_dbg(ql_dbg_disc, vha, 0x2068, 5780 "Configure fabric error exit rval=%d.\n", rval); 5781 5782 return (rval); 5783 } 5784 5785 /* 5786 * qla2x00_find_all_fabric_devs 5787 * 5788 * Input: 5789 * ha = adapter block pointer. 5790 * dev = database device entry pointer. 5791 * 5792 * Returns: 5793 * 0 = success. 5794 * 5795 * Context: 5796 * Kernel context. 5797 */ 5798 static int 5799 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5800 { 5801 int rval; 5802 uint16_t loop_id; 5803 fc_port_t *fcport, *new_fcport; 5804 int found; 5805 5806 sw_info_t *swl; 5807 int swl_idx; 5808 int first_dev, last_dev; 5809 port_id_t wrap = {}, nxt_d_id; 5810 struct qla_hw_data *ha = vha->hw; 5811 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5812 unsigned long flags; 5813 5814 rval = QLA_SUCCESS; 5815 5816 /* Try GID_PT to get device list, else GAN. */ 5817 if (!ha->swl) 5818 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5819 GFP_KERNEL); 5820 swl = ha->swl; 5821 if (!swl) { 5822 /*EMPTY*/ 5823 ql_dbg(ql_dbg_disc, vha, 0x209c, 5824 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5825 } else { 5826 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5827 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5828 swl = NULL; 5829 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5830 return rval; 5831 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5832 swl = NULL; 5833 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5834 return rval; 5835 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5836 swl = NULL; 5837 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5838 return rval; 5839 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5840 swl = NULL; 5841 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5842 return rval; 5843 } 5844 5845 /* If other queries succeeded probe for FC-4 type */ 5846 if (swl) { 5847 qla2x00_gff_id(vha, swl); 5848 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5849 return rval; 5850 } 5851 } 5852 swl_idx = 0; 5853 5854 /* Allocate temporary fcport for any new fcports discovered. */ 5855 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5856 if (new_fcport == NULL) { 5857 ql_log(ql_log_warn, vha, 0x209d, 5858 "Failed to allocate memory for fcport.\n"); 5859 return (QLA_MEMORY_ALLOC_FAILED); 5860 } 5861 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5862 /* Set start port ID scan at adapter ID. */ 5863 first_dev = 1; 5864 last_dev = 0; 5865 5866 /* Starting free loop ID. */ 5867 loop_id = ha->min_external_loopid; 5868 for (; loop_id <= ha->max_loop_id; loop_id++) { 5869 if (qla2x00_is_reserved_id(vha, loop_id)) 5870 continue; 5871 5872 if (ha->current_topology == ISP_CFG_FL && 5873 (atomic_read(&vha->loop_down_timer) || 5874 LOOP_TRANSITION(vha))) { 5875 atomic_set(&vha->loop_down_timer, 0); 5876 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5877 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5878 break; 5879 } 5880 5881 if (swl != NULL) { 5882 if (last_dev) { 5883 wrap.b24 = new_fcport->d_id.b24; 5884 } else { 5885 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5886 memcpy(new_fcport->node_name, 5887 swl[swl_idx].node_name, WWN_SIZE); 5888 memcpy(new_fcport->port_name, 5889 swl[swl_idx].port_name, WWN_SIZE); 5890 memcpy(new_fcport->fabric_port_name, 5891 swl[swl_idx].fabric_port_name, WWN_SIZE); 5892 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5893 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5894 5895 new_fcport->nvme_flag = 0; 5896 if (vha->flags.nvme_enabled && 5897 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 5898 ql_log(ql_log_info, vha, 0x2131, 5899 "FOUND: NVME port %8phC as FC Type 28h\n", 5900 new_fcport->port_name); 5901 } 5902 5903 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5904 last_dev = 1; 5905 } 5906 swl_idx++; 5907 } 5908 } else { 5909 /* Send GA_NXT to the switch */ 5910 rval = qla2x00_ga_nxt(vha, new_fcport); 5911 if (rval != QLA_SUCCESS) { 5912 ql_log(ql_log_warn, vha, 0x209e, 5913 "SNS scan failed -- assuming " 5914 "zero-entry result.\n"); 5915 rval = QLA_SUCCESS; 5916 break; 5917 } 5918 } 5919 5920 /* If wrap on switch device list, exit. */ 5921 if (first_dev) { 5922 wrap.b24 = new_fcport->d_id.b24; 5923 first_dev = 0; 5924 } else if (new_fcport->d_id.b24 == wrap.b24) { 5925 ql_dbg(ql_dbg_disc, vha, 0x209f, 5926 "Device wrap (%02x%02x%02x).\n", 5927 new_fcport->d_id.b.domain, 5928 new_fcport->d_id.b.area, 5929 new_fcport->d_id.b.al_pa); 5930 break; 5931 } 5932 5933 /* Bypass if same physical adapter. */ 5934 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5935 continue; 5936 5937 /* Bypass virtual ports of the same host. */ 5938 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5939 continue; 5940 5941 /* Bypass if same domain and area of adapter. */ 5942 if (((new_fcport->d_id.b24 & 0xffff00) == 5943 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5944 ISP_CFG_FL) 5945 continue; 5946 5947 /* Bypass reserved domain fields. */ 5948 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5949 continue; 5950 5951 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5952 if (ql2xgffidenable && 5953 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 5954 new_fcport->fc4_type != 0)) 5955 continue; 5956 5957 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5958 5959 /* Locate matching device in database. */ 5960 found = 0; 5961 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5962 if (memcmp(new_fcport->port_name, fcport->port_name, 5963 WWN_SIZE)) 5964 continue; 5965 5966 fcport->scan_state = QLA_FCPORT_FOUND; 5967 5968 found++; 5969 5970 /* Update port state. */ 5971 memcpy(fcport->fabric_port_name, 5972 new_fcport->fabric_port_name, WWN_SIZE); 5973 fcport->fp_speed = new_fcport->fp_speed; 5974 5975 /* 5976 * If address the same and state FCS_ONLINE 5977 * (or in target mode), nothing changed. 5978 */ 5979 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5980 (atomic_read(&fcport->state) == FCS_ONLINE || 5981 (vha->host->active_mode == MODE_TARGET))) { 5982 break; 5983 } 5984 5985 if (fcport->login_retry == 0) 5986 fcport->login_retry = 5987 vha->hw->login_retry_count; 5988 /* 5989 * If device was not a fabric device before. 5990 */ 5991 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5992 fcport->d_id.b24 = new_fcport->d_id.b24; 5993 qla2x00_clear_loop_id(fcport); 5994 fcport->flags |= (FCF_FABRIC_DEVICE | 5995 FCF_LOGIN_NEEDED); 5996 break; 5997 } 5998 5999 /* 6000 * Port ID changed or device was marked to be updated; 6001 * Log it out if still logged in and mark it for 6002 * relogin later. 6003 */ 6004 if (qla_tgt_mode_enabled(base_vha)) { 6005 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 6006 "port changed FC ID, %8phC" 6007 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 6008 fcport->port_name, 6009 fcport->d_id.b.domain, 6010 fcport->d_id.b.area, 6011 fcport->d_id.b.al_pa, 6012 fcport->loop_id, 6013 new_fcport->d_id.b.domain, 6014 new_fcport->d_id.b.area, 6015 new_fcport->d_id.b.al_pa); 6016 fcport->d_id.b24 = new_fcport->d_id.b24; 6017 break; 6018 } 6019 6020 fcport->d_id.b24 = new_fcport->d_id.b24; 6021 fcport->flags |= FCF_LOGIN_NEEDED; 6022 break; 6023 } 6024 6025 if (found && NVME_TARGET(vha->hw, fcport)) { 6026 if (fcport->disc_state == DSC_DELETE_PEND) { 6027 qla2x00_set_fcport_disc_state(fcport, DSC_GNL); 6028 vha->fcport_count--; 6029 fcport->login_succ = 0; 6030 } 6031 } 6032 6033 if (found) { 6034 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6035 continue; 6036 } 6037 /* If device was not in our fcports list, then add it. */ 6038 new_fcport->scan_state = QLA_FCPORT_FOUND; 6039 list_add_tail(&new_fcport->list, &vha->vp_fcports); 6040 6041 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 6042 6043 6044 /* Allocate a new replacement fcport. */ 6045 nxt_d_id.b24 = new_fcport->d_id.b24; 6046 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 6047 if (new_fcport == NULL) { 6048 ql_log(ql_log_warn, vha, 0xd032, 6049 "Memory allocation failed for fcport.\n"); 6050 return (QLA_MEMORY_ALLOC_FAILED); 6051 } 6052 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 6053 new_fcport->d_id.b24 = nxt_d_id.b24; 6054 } 6055 6056 qla2x00_free_fcport(new_fcport); 6057 6058 /* 6059 * Logout all previous fabric dev marked lost, except FCP2 devices. 6060 */ 6061 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6062 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 6063 break; 6064 6065 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 6066 continue; 6067 6068 if (fcport->scan_state == QLA_FCPORT_SCAN) { 6069 if ((qla_dual_mode_enabled(vha) || 6070 qla_ini_mode_enabled(vha)) && 6071 atomic_read(&fcport->state) == FCS_ONLINE) { 6072 qla2x00_mark_device_lost(vha, fcport, 6073 ql2xplogiabsentdevice); 6074 if (fcport->loop_id != FC_NO_LOOP_ID && 6075 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 6076 fcport->port_type != FCT_INITIATOR && 6077 fcport->port_type != FCT_BROADCAST) { 6078 ql_dbg(ql_dbg_disc, vha, 0x20f0, 6079 "%s %d %8phC post del sess\n", 6080 __func__, __LINE__, 6081 fcport->port_name); 6082 qlt_schedule_sess_for_deletion(fcport); 6083 continue; 6084 } 6085 } 6086 } 6087 6088 if (fcport->scan_state == QLA_FCPORT_FOUND && 6089 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 6090 qla24xx_fcport_handle_login(vha, fcport); 6091 } 6092 return (rval); 6093 } 6094 6095 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 6096 int 6097 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 6098 { 6099 int loop_id = FC_NO_LOOP_ID; 6100 int lid = NPH_MGMT_SERVER - vha->vp_idx; 6101 unsigned long flags; 6102 struct qla_hw_data *ha = vha->hw; 6103 6104 if (vha->vp_idx == 0) { 6105 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 6106 return NPH_MGMT_SERVER; 6107 } 6108 6109 /* pick id from high and work down to low */ 6110 spin_lock_irqsave(&ha->vport_slock, flags); 6111 for (; lid > 0; lid--) { 6112 if (!test_bit(lid, vha->hw->loop_id_map)) { 6113 set_bit(lid, vha->hw->loop_id_map); 6114 loop_id = lid; 6115 break; 6116 } 6117 } 6118 spin_unlock_irqrestore(&ha->vport_slock, flags); 6119 6120 return loop_id; 6121 } 6122 6123 /* 6124 * qla2x00_fabric_login 6125 * Issue fabric login command. 6126 * 6127 * Input: 6128 * ha = adapter block pointer. 6129 * device = pointer to FC device type structure. 6130 * 6131 * Returns: 6132 * 0 - Login successfully 6133 * 1 - Login failed 6134 * 2 - Initiator device 6135 * 3 - Fatal error 6136 */ 6137 int 6138 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 6139 uint16_t *next_loopid) 6140 { 6141 int rval; 6142 int retry; 6143 uint16_t tmp_loopid; 6144 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6145 struct qla_hw_data *ha = vha->hw; 6146 6147 retry = 0; 6148 tmp_loopid = 0; 6149 6150 for (;;) { 6151 ql_dbg(ql_dbg_disc, vha, 0x2000, 6152 "Trying Fabric Login w/loop id 0x%04x for port " 6153 "%02x%02x%02x.\n", 6154 fcport->loop_id, fcport->d_id.b.domain, 6155 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6156 6157 /* Login fcport on switch. */ 6158 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 6159 fcport->d_id.b.domain, fcport->d_id.b.area, 6160 fcport->d_id.b.al_pa, mb, BIT_0); 6161 if (rval != QLA_SUCCESS) { 6162 return rval; 6163 } 6164 if (mb[0] == MBS_PORT_ID_USED) { 6165 /* 6166 * Device has another loop ID. The firmware team 6167 * recommends the driver perform an implicit login with 6168 * the specified ID again. The ID we just used is save 6169 * here so we return with an ID that can be tried by 6170 * the next login. 6171 */ 6172 retry++; 6173 tmp_loopid = fcport->loop_id; 6174 fcport->loop_id = mb[1]; 6175 6176 ql_dbg(ql_dbg_disc, vha, 0x2001, 6177 "Fabric Login: port in use - next loop " 6178 "id=0x%04x, port id= %02x%02x%02x.\n", 6179 fcport->loop_id, fcport->d_id.b.domain, 6180 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6181 6182 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6183 /* 6184 * Login succeeded. 6185 */ 6186 if (retry) { 6187 /* A retry occurred before. */ 6188 *next_loopid = tmp_loopid; 6189 } else { 6190 /* 6191 * No retry occurred before. Just increment the 6192 * ID value for next login. 6193 */ 6194 *next_loopid = (fcport->loop_id + 1); 6195 } 6196 6197 if (mb[1] & BIT_0) { 6198 fcport->port_type = FCT_INITIATOR; 6199 } else { 6200 fcport->port_type = FCT_TARGET; 6201 if (mb[1] & BIT_1) { 6202 fcport->flags |= FCF_FCP2_DEVICE; 6203 } 6204 } 6205 6206 if (mb[10] & BIT_0) 6207 fcport->supported_classes |= FC_COS_CLASS2; 6208 if (mb[10] & BIT_1) 6209 fcport->supported_classes |= FC_COS_CLASS3; 6210 6211 if (IS_FWI2_CAPABLE(ha)) { 6212 if (mb[10] & BIT_7) 6213 fcport->flags |= 6214 FCF_CONF_COMP_SUPPORTED; 6215 } 6216 6217 rval = QLA_SUCCESS; 6218 break; 6219 } else if (mb[0] == MBS_LOOP_ID_USED) { 6220 /* 6221 * Loop ID already used, try next loop ID. 6222 */ 6223 fcport->loop_id++; 6224 rval = qla2x00_find_new_loop_id(vha, fcport); 6225 if (rval != QLA_SUCCESS) { 6226 /* Ran out of loop IDs to use */ 6227 break; 6228 } 6229 } else if (mb[0] == MBS_COMMAND_ERROR) { 6230 /* 6231 * Firmware possibly timed out during login. If NO 6232 * retries are left to do then the device is declared 6233 * dead. 6234 */ 6235 *next_loopid = fcport->loop_id; 6236 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6237 fcport->d_id.b.domain, fcport->d_id.b.area, 6238 fcport->d_id.b.al_pa); 6239 qla2x00_mark_device_lost(vha, fcport, 1); 6240 6241 rval = 1; 6242 break; 6243 } else { 6244 /* 6245 * unrecoverable / not handled error 6246 */ 6247 ql_dbg(ql_dbg_disc, vha, 0x2002, 6248 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6249 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6250 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6251 fcport->loop_id, jiffies); 6252 6253 *next_loopid = fcport->loop_id; 6254 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6255 fcport->d_id.b.domain, fcport->d_id.b.area, 6256 fcport->d_id.b.al_pa); 6257 qla2x00_clear_loop_id(fcport); 6258 fcport->login_retry = 0; 6259 6260 rval = 3; 6261 break; 6262 } 6263 } 6264 6265 return (rval); 6266 } 6267 6268 /* 6269 * qla2x00_local_device_login 6270 * Issue local device login command. 6271 * 6272 * Input: 6273 * ha = adapter block pointer. 6274 * loop_id = loop id of device to login to. 6275 * 6276 * Returns (Where's the #define!!!!): 6277 * 0 - Login successfully 6278 * 1 - Login failed 6279 * 3 - Fatal error 6280 */ 6281 int 6282 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6283 { 6284 int rval; 6285 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6286 6287 memset(mb, 0, sizeof(mb)); 6288 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6289 if (rval == QLA_SUCCESS) { 6290 /* Interrogate mailbox registers for any errors */ 6291 if (mb[0] == MBS_COMMAND_ERROR) 6292 rval = 1; 6293 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6294 /* device not in PCB table */ 6295 rval = 3; 6296 } 6297 6298 return (rval); 6299 } 6300 6301 /* 6302 * qla2x00_loop_resync 6303 * Resync with fibre channel devices. 6304 * 6305 * Input: 6306 * ha = adapter block pointer. 6307 * 6308 * Returns: 6309 * 0 = success 6310 */ 6311 int 6312 qla2x00_loop_resync(scsi_qla_host_t *vha) 6313 { 6314 int rval = QLA_SUCCESS; 6315 uint32_t wait_time; 6316 6317 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6318 if (vha->flags.online) { 6319 if (!(rval = qla2x00_fw_ready(vha))) { 6320 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6321 wait_time = 256; 6322 do { 6323 if (!IS_QLAFX00(vha->hw)) { 6324 /* 6325 * Issue a marker after FW becomes 6326 * ready. 6327 */ 6328 qla2x00_marker(vha, vha->hw->base_qpair, 6329 0, 0, MK_SYNC_ALL); 6330 vha->marker_needed = 0; 6331 } 6332 6333 /* Remap devices on Loop. */ 6334 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6335 6336 if (IS_QLAFX00(vha->hw)) 6337 qlafx00_configure_devices(vha); 6338 else 6339 qla2x00_configure_loop(vha); 6340 6341 wait_time--; 6342 } while (!atomic_read(&vha->loop_down_timer) && 6343 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6344 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6345 &vha->dpc_flags))); 6346 } 6347 } 6348 6349 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6350 return (QLA_FUNCTION_FAILED); 6351 6352 if (rval) 6353 ql_dbg(ql_dbg_disc, vha, 0x206c, 6354 "%s *** FAILED ***.\n", __func__); 6355 6356 return (rval); 6357 } 6358 6359 /* 6360 * qla2x00_perform_loop_resync 6361 * Description: This function will set the appropriate flags and call 6362 * qla2x00_loop_resync. If successful loop will be resynced 6363 * Arguments : scsi_qla_host_t pointer 6364 * returm : Success or Failure 6365 */ 6366 6367 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6368 { 6369 int32_t rval = 0; 6370 6371 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6372 /*Configure the flags so that resync happens properly*/ 6373 atomic_set(&ha->loop_down_timer, 0); 6374 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6375 atomic_set(&ha->loop_state, LOOP_UP); 6376 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6377 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6378 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6379 6380 rval = qla2x00_loop_resync(ha); 6381 } else 6382 atomic_set(&ha->loop_state, LOOP_DEAD); 6383 6384 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6385 } 6386 6387 return rval; 6388 } 6389 6390 void 6391 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6392 { 6393 fc_port_t *fcport; 6394 struct scsi_qla_host *vha; 6395 struct qla_hw_data *ha = base_vha->hw; 6396 unsigned long flags; 6397 6398 spin_lock_irqsave(&ha->vport_slock, flags); 6399 /* Go with deferred removal of rport references. */ 6400 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6401 atomic_inc(&vha->vref_count); 6402 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6403 if (fcport->drport && 6404 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6405 spin_unlock_irqrestore(&ha->vport_slock, flags); 6406 qla2x00_rport_del(fcport); 6407 6408 spin_lock_irqsave(&ha->vport_slock, flags); 6409 } 6410 } 6411 atomic_dec(&vha->vref_count); 6412 wake_up(&vha->vref_waitq); 6413 } 6414 spin_unlock_irqrestore(&ha->vport_slock, flags); 6415 } 6416 6417 /* Assumes idc_lock always held on entry */ 6418 void 6419 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6420 { 6421 struct qla_hw_data *ha = vha->hw; 6422 uint32_t drv_presence, drv_presence_mask; 6423 uint32_t dev_part_info1, dev_part_info2, class_type; 6424 uint32_t class_type_mask = 0x3; 6425 uint16_t fcoe_other_function = 0xffff, i; 6426 6427 if (IS_QLA8044(ha)) { 6428 drv_presence = qla8044_rd_direct(vha, 6429 QLA8044_CRB_DRV_ACTIVE_INDEX); 6430 dev_part_info1 = qla8044_rd_direct(vha, 6431 QLA8044_CRB_DEV_PART_INFO_INDEX); 6432 dev_part_info2 = qla8044_rd_direct(vha, 6433 QLA8044_CRB_DEV_PART_INFO2); 6434 } else { 6435 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6436 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6437 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6438 } 6439 for (i = 0; i < 8; i++) { 6440 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6441 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6442 (i != ha->portnum)) { 6443 fcoe_other_function = i; 6444 break; 6445 } 6446 } 6447 if (fcoe_other_function == 0xffff) { 6448 for (i = 0; i < 8; i++) { 6449 class_type = ((dev_part_info2 >> (i * 4)) & 6450 class_type_mask); 6451 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6452 ((i + 8) != ha->portnum)) { 6453 fcoe_other_function = i + 8; 6454 break; 6455 } 6456 } 6457 } 6458 /* 6459 * Prepare drv-presence mask based on fcoe functions present. 6460 * However consider only valid physical fcoe function numbers (0-15). 6461 */ 6462 drv_presence_mask = ~((1 << (ha->portnum)) | 6463 ((fcoe_other_function == 0xffff) ? 6464 0 : (1 << (fcoe_other_function)))); 6465 6466 /* We are the reset owner iff: 6467 * - No other protocol drivers present. 6468 * - This is the lowest among fcoe functions. */ 6469 if (!(drv_presence & drv_presence_mask) && 6470 (ha->portnum < fcoe_other_function)) { 6471 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6472 "This host is Reset owner.\n"); 6473 ha->flags.nic_core_reset_owner = 1; 6474 } 6475 } 6476 6477 static int 6478 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6479 { 6480 int rval = QLA_SUCCESS; 6481 struct qla_hw_data *ha = vha->hw; 6482 uint32_t drv_ack; 6483 6484 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6485 if (rval == QLA_SUCCESS) { 6486 drv_ack |= (1 << ha->portnum); 6487 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6488 } 6489 6490 return rval; 6491 } 6492 6493 static int 6494 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6495 { 6496 int rval = QLA_SUCCESS; 6497 struct qla_hw_data *ha = vha->hw; 6498 uint32_t drv_ack; 6499 6500 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6501 if (rval == QLA_SUCCESS) { 6502 drv_ack &= ~(1 << ha->portnum); 6503 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6504 } 6505 6506 return rval; 6507 } 6508 6509 static const char * 6510 qla83xx_dev_state_to_string(uint32_t dev_state) 6511 { 6512 switch (dev_state) { 6513 case QLA8XXX_DEV_COLD: 6514 return "COLD/RE-INIT"; 6515 case QLA8XXX_DEV_INITIALIZING: 6516 return "INITIALIZING"; 6517 case QLA8XXX_DEV_READY: 6518 return "READY"; 6519 case QLA8XXX_DEV_NEED_RESET: 6520 return "NEED RESET"; 6521 case QLA8XXX_DEV_NEED_QUIESCENT: 6522 return "NEED QUIESCENT"; 6523 case QLA8XXX_DEV_FAILED: 6524 return "FAILED"; 6525 case QLA8XXX_DEV_QUIESCENT: 6526 return "QUIESCENT"; 6527 default: 6528 return "Unknown"; 6529 } 6530 } 6531 6532 /* Assumes idc-lock always held on entry */ 6533 void 6534 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6535 { 6536 struct qla_hw_data *ha = vha->hw; 6537 uint32_t idc_audit_reg = 0, duration_secs = 0; 6538 6539 switch (audit_type) { 6540 case IDC_AUDIT_TIMESTAMP: 6541 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6542 idc_audit_reg = (ha->portnum) | 6543 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6544 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6545 break; 6546 6547 case IDC_AUDIT_COMPLETION: 6548 duration_secs = ((jiffies_to_msecs(jiffies) - 6549 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6550 idc_audit_reg = (ha->portnum) | 6551 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6552 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6553 break; 6554 6555 default: 6556 ql_log(ql_log_warn, vha, 0xb078, 6557 "Invalid audit type specified.\n"); 6558 break; 6559 } 6560 } 6561 6562 /* Assumes idc_lock always held on entry */ 6563 static int 6564 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6565 { 6566 struct qla_hw_data *ha = vha->hw; 6567 uint32_t idc_control, dev_state; 6568 6569 __qla83xx_get_idc_control(vha, &idc_control); 6570 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6571 ql_log(ql_log_info, vha, 0xb080, 6572 "NIC Core reset has been disabled. idc-control=0x%x\n", 6573 idc_control); 6574 return QLA_FUNCTION_FAILED; 6575 } 6576 6577 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6578 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6579 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6580 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6581 QLA8XXX_DEV_NEED_RESET); 6582 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6583 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6584 } else { 6585 const char *state = qla83xx_dev_state_to_string(dev_state); 6586 6587 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6588 6589 /* SV: XXX: Is timeout required here? */ 6590 /* Wait for IDC state change READY -> NEED_RESET */ 6591 while (dev_state == QLA8XXX_DEV_READY) { 6592 qla83xx_idc_unlock(vha, 0); 6593 msleep(200); 6594 qla83xx_idc_lock(vha, 0); 6595 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6596 } 6597 } 6598 6599 /* Send IDC ack by writing to drv-ack register */ 6600 __qla83xx_set_drv_ack(vha); 6601 6602 return QLA_SUCCESS; 6603 } 6604 6605 int 6606 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6607 { 6608 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6609 } 6610 6611 int 6612 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6613 { 6614 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6615 } 6616 6617 static int 6618 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6619 { 6620 uint32_t drv_presence = 0; 6621 struct qla_hw_data *ha = vha->hw; 6622 6623 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6624 if (drv_presence & (1 << ha->portnum)) 6625 return QLA_SUCCESS; 6626 else 6627 return QLA_TEST_FAILED; 6628 } 6629 6630 int 6631 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6632 { 6633 int rval = QLA_SUCCESS; 6634 struct qla_hw_data *ha = vha->hw; 6635 6636 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6637 "Entered %s().\n", __func__); 6638 6639 if (vha->device_flags & DFLG_DEV_FAILED) { 6640 ql_log(ql_log_warn, vha, 0xb059, 6641 "Device in unrecoverable FAILED state.\n"); 6642 return QLA_FUNCTION_FAILED; 6643 } 6644 6645 qla83xx_idc_lock(vha, 0); 6646 6647 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6648 ql_log(ql_log_warn, vha, 0xb05a, 6649 "Function=0x%x has been removed from IDC participation.\n", 6650 ha->portnum); 6651 rval = QLA_FUNCTION_FAILED; 6652 goto exit; 6653 } 6654 6655 qla83xx_reset_ownership(vha); 6656 6657 rval = qla83xx_initiating_reset(vha); 6658 6659 /* 6660 * Perform reset if we are the reset-owner, 6661 * else wait till IDC state changes to READY/FAILED. 6662 */ 6663 if (rval == QLA_SUCCESS) { 6664 rval = qla83xx_idc_state_handler(vha); 6665 6666 if (rval == QLA_SUCCESS) 6667 ha->flags.nic_core_hung = 0; 6668 __qla83xx_clear_drv_ack(vha); 6669 } 6670 6671 exit: 6672 qla83xx_idc_unlock(vha, 0); 6673 6674 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6675 6676 return rval; 6677 } 6678 6679 int 6680 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6681 { 6682 struct qla_hw_data *ha = vha->hw; 6683 int rval = QLA_FUNCTION_FAILED; 6684 6685 if (!IS_MCTP_CAPABLE(ha)) { 6686 /* This message can be removed from the final version */ 6687 ql_log(ql_log_info, vha, 0x506d, 6688 "This board is not MCTP capable\n"); 6689 return rval; 6690 } 6691 6692 if (!ha->mctp_dump) { 6693 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6694 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6695 6696 if (!ha->mctp_dump) { 6697 ql_log(ql_log_warn, vha, 0x506e, 6698 "Failed to allocate memory for mctp dump\n"); 6699 return rval; 6700 } 6701 } 6702 6703 #define MCTP_DUMP_STR_ADDR 0x00000000 6704 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6705 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6706 if (rval != QLA_SUCCESS) { 6707 ql_log(ql_log_warn, vha, 0x506f, 6708 "Failed to capture mctp dump\n"); 6709 } else { 6710 ql_log(ql_log_info, vha, 0x5070, 6711 "Mctp dump capture for host (%ld/%p).\n", 6712 vha->host_no, ha->mctp_dump); 6713 ha->mctp_dumped = 1; 6714 } 6715 6716 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6717 ha->flags.nic_core_reset_hdlr_active = 1; 6718 rval = qla83xx_restart_nic_firmware(vha); 6719 if (rval) 6720 /* NIC Core reset failed. */ 6721 ql_log(ql_log_warn, vha, 0x5071, 6722 "Failed to restart nic firmware\n"); 6723 else 6724 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6725 "Restarted NIC firmware successfully.\n"); 6726 ha->flags.nic_core_reset_hdlr_active = 0; 6727 } 6728 6729 return rval; 6730 6731 } 6732 6733 /* 6734 * qla2x00_quiesce_io 6735 * Description: This function will block the new I/Os 6736 * Its not aborting any I/Os as context 6737 * is not destroyed during quiescence 6738 * Arguments: scsi_qla_host_t 6739 * return : void 6740 */ 6741 void 6742 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6743 { 6744 struct qla_hw_data *ha = vha->hw; 6745 struct scsi_qla_host *vp; 6746 6747 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6748 "Quiescing I/O - ha=%p.\n", ha); 6749 6750 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6751 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6752 atomic_set(&vha->loop_state, LOOP_DOWN); 6753 qla2x00_mark_all_devices_lost(vha); 6754 list_for_each_entry(vp, &ha->vp_list, list) 6755 qla2x00_mark_all_devices_lost(vp); 6756 } else { 6757 if (!atomic_read(&vha->loop_down_timer)) 6758 atomic_set(&vha->loop_down_timer, 6759 LOOP_DOWN_TIME); 6760 } 6761 /* Wait for pending cmds to complete */ 6762 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 6763 != QLA_SUCCESS); 6764 } 6765 6766 void 6767 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6768 { 6769 struct qla_hw_data *ha = vha->hw; 6770 struct scsi_qla_host *vp; 6771 unsigned long flags; 6772 fc_port_t *fcport; 6773 u16 i; 6774 6775 /* For ISP82XX, driver waits for completion of the commands. 6776 * online flag should be set. 6777 */ 6778 if (!(IS_P3P_TYPE(ha))) 6779 vha->flags.online = 0; 6780 ha->flags.chip_reset_done = 0; 6781 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6782 vha->qla_stats.total_isp_aborts++; 6783 6784 ql_log(ql_log_info, vha, 0x00af, 6785 "Performing ISP error recovery - ha=%p.\n", ha); 6786 6787 ha->flags.purge_mbox = 1; 6788 /* For ISP82XX, reset_chip is just disabling interrupts. 6789 * Driver waits for the completion of the commands. 6790 * the interrupts need to be enabled. 6791 */ 6792 if (!(IS_P3P_TYPE(ha))) 6793 ha->isp_ops->reset_chip(vha); 6794 6795 ha->link_data_rate = PORT_SPEED_UNKNOWN; 6796 SAVE_TOPO(ha); 6797 ha->flags.rida_fmt2 = 0; 6798 ha->flags.n2n_ae = 0; 6799 ha->flags.lip_ae = 0; 6800 ha->current_topology = 0; 6801 QLA_FW_STOPPED(ha); 6802 ha->flags.fw_init_done = 0; 6803 ha->chip_reset++; 6804 ha->base_qpair->chip_reset = ha->chip_reset; 6805 for (i = 0; i < ha->max_qpairs; i++) { 6806 if (ha->queue_pair_map[i]) 6807 ha->queue_pair_map[i]->chip_reset = 6808 ha->base_qpair->chip_reset; 6809 } 6810 6811 /* purge MBox commands */ 6812 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6813 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6814 complete(&ha->mbx_intr_comp); 6815 } 6816 6817 i = 0; 6818 while (atomic_read(&ha->num_pend_mbx_stage3) || 6819 atomic_read(&ha->num_pend_mbx_stage2) || 6820 atomic_read(&ha->num_pend_mbx_stage1)) { 6821 msleep(20); 6822 i++; 6823 if (i > 50) 6824 break; 6825 } 6826 ha->flags.purge_mbox = 0; 6827 6828 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6829 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6830 atomic_set(&vha->loop_state, LOOP_DOWN); 6831 qla2x00_mark_all_devices_lost(vha); 6832 6833 spin_lock_irqsave(&ha->vport_slock, flags); 6834 list_for_each_entry(vp, &ha->vp_list, list) { 6835 atomic_inc(&vp->vref_count); 6836 spin_unlock_irqrestore(&ha->vport_slock, flags); 6837 6838 qla2x00_mark_all_devices_lost(vp); 6839 6840 spin_lock_irqsave(&ha->vport_slock, flags); 6841 atomic_dec(&vp->vref_count); 6842 } 6843 spin_unlock_irqrestore(&ha->vport_slock, flags); 6844 } else { 6845 if (!atomic_read(&vha->loop_down_timer)) 6846 atomic_set(&vha->loop_down_timer, 6847 LOOP_DOWN_TIME); 6848 } 6849 6850 /* Clear all async request states across all VPs. */ 6851 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6852 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6853 fcport->scan_state = 0; 6854 } 6855 spin_lock_irqsave(&ha->vport_slock, flags); 6856 list_for_each_entry(vp, &ha->vp_list, list) { 6857 atomic_inc(&vp->vref_count); 6858 spin_unlock_irqrestore(&ha->vport_slock, flags); 6859 6860 list_for_each_entry(fcport, &vp->vp_fcports, list) 6861 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6862 6863 spin_lock_irqsave(&ha->vport_slock, flags); 6864 atomic_dec(&vp->vref_count); 6865 } 6866 spin_unlock_irqrestore(&ha->vport_slock, flags); 6867 6868 if (!ha->flags.eeh_busy) { 6869 /* Make sure for ISP 82XX IO DMA is complete */ 6870 if (IS_P3P_TYPE(ha)) { 6871 qla82xx_chip_reset_cleanup(vha); 6872 ql_log(ql_log_info, vha, 0x00b4, 6873 "Done chip reset cleanup.\n"); 6874 6875 /* Done waiting for pending commands. 6876 * Reset the online flag. 6877 */ 6878 vha->flags.online = 0; 6879 } 6880 6881 /* Requeue all commands in outstanding command list. */ 6882 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6883 } 6884 /* memory barrier */ 6885 wmb(); 6886 } 6887 6888 /* 6889 * qla2x00_abort_isp 6890 * Resets ISP and aborts all outstanding commands. 6891 * 6892 * Input: 6893 * ha = adapter block pointer. 6894 * 6895 * Returns: 6896 * 0 = success 6897 */ 6898 int 6899 qla2x00_abort_isp(scsi_qla_host_t *vha) 6900 { 6901 int rval; 6902 uint8_t status = 0; 6903 struct qla_hw_data *ha = vha->hw; 6904 struct scsi_qla_host *vp; 6905 struct req_que *req = ha->req_q_map[0]; 6906 unsigned long flags; 6907 6908 if (vha->flags.online) { 6909 qla2x00_abort_isp_cleanup(vha); 6910 6911 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 6912 ha->flags.chip_reset_done = 1; 6913 vha->flags.online = 1; 6914 status = 0; 6915 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6916 return status; 6917 } 6918 6919 if (IS_QLA8031(ha)) { 6920 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6921 "Clearing fcoe driver presence.\n"); 6922 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6923 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6924 "Error while clearing DRV-Presence.\n"); 6925 } 6926 6927 if (unlikely(pci_channel_offline(ha->pdev) && 6928 ha->flags.pci_channel_io_perm_failure)) { 6929 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6930 status = 0; 6931 return status; 6932 } 6933 6934 switch (vha->qlini_mode) { 6935 case QLA2XXX_INI_MODE_DISABLED: 6936 if (!qla_tgt_mode_enabled(vha)) 6937 return 0; 6938 break; 6939 case QLA2XXX_INI_MODE_DUAL: 6940 if (!qla_dual_mode_enabled(vha)) 6941 return 0; 6942 break; 6943 case QLA2XXX_INI_MODE_ENABLED: 6944 default: 6945 break; 6946 } 6947 6948 ha->isp_ops->get_flash_version(vha, req->ring); 6949 6950 ha->isp_ops->nvram_config(vha); 6951 6952 if (!qla2x00_restart_isp(vha)) { 6953 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6954 6955 if (!atomic_read(&vha->loop_down_timer)) { 6956 /* 6957 * Issue marker command only when we are going 6958 * to start the I/O . 6959 */ 6960 vha->marker_needed = 1; 6961 } 6962 6963 vha->flags.online = 1; 6964 6965 ha->isp_ops->enable_intrs(ha); 6966 6967 ha->isp_abort_cnt = 0; 6968 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6969 6970 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6971 qla2x00_get_fw_version(vha); 6972 if (ha->fce) { 6973 ha->flags.fce_enabled = 1; 6974 memset(ha->fce, 0, 6975 fce_calc_size(ha->fce_bufs)); 6976 rval = qla2x00_enable_fce_trace(vha, 6977 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6978 &ha->fce_bufs); 6979 if (rval) { 6980 ql_log(ql_log_warn, vha, 0x8033, 6981 "Unable to reinitialize FCE " 6982 "(%d).\n", rval); 6983 ha->flags.fce_enabled = 0; 6984 } 6985 } 6986 6987 if (ha->eft) { 6988 memset(ha->eft, 0, EFT_SIZE); 6989 rval = qla2x00_enable_eft_trace(vha, 6990 ha->eft_dma, EFT_NUM_BUFFERS); 6991 if (rval) { 6992 ql_log(ql_log_warn, vha, 0x8034, 6993 "Unable to reinitialize EFT " 6994 "(%d).\n", rval); 6995 } 6996 } 6997 } else { /* failed the ISP abort */ 6998 vha->flags.online = 1; 6999 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 7000 if (ha->isp_abort_cnt == 0) { 7001 ql_log(ql_log_fatal, vha, 0x8035, 7002 "ISP error recover failed - " 7003 "board disabled.\n"); 7004 /* 7005 * The next call disables the board 7006 * completely. 7007 */ 7008 qla2x00_abort_isp_cleanup(vha); 7009 vha->flags.online = 0; 7010 clear_bit(ISP_ABORT_RETRY, 7011 &vha->dpc_flags); 7012 status = 0; 7013 } else { /* schedule another ISP abort */ 7014 ha->isp_abort_cnt--; 7015 ql_dbg(ql_dbg_taskm, vha, 0x8020, 7016 "ISP abort - retry remaining %d.\n", 7017 ha->isp_abort_cnt); 7018 status = 1; 7019 } 7020 } else { 7021 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 7022 ql_dbg(ql_dbg_taskm, vha, 0x8021, 7023 "ISP error recovery - retrying (%d) " 7024 "more times.\n", ha->isp_abort_cnt); 7025 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 7026 status = 1; 7027 } 7028 } 7029 7030 } 7031 7032 if (!status) { 7033 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 7034 qla2x00_configure_hba(vha); 7035 spin_lock_irqsave(&ha->vport_slock, flags); 7036 list_for_each_entry(vp, &ha->vp_list, list) { 7037 if (vp->vp_idx) { 7038 atomic_inc(&vp->vref_count); 7039 spin_unlock_irqrestore(&ha->vport_slock, flags); 7040 7041 qla2x00_vp_abort_isp(vp); 7042 7043 spin_lock_irqsave(&ha->vport_slock, flags); 7044 atomic_dec(&vp->vref_count); 7045 } 7046 } 7047 spin_unlock_irqrestore(&ha->vport_slock, flags); 7048 7049 if (IS_QLA8031(ha)) { 7050 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 7051 "Setting back fcoe driver presence.\n"); 7052 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 7053 ql_dbg(ql_dbg_p3p, vha, 0xb074, 7054 "Error while setting DRV-Presence.\n"); 7055 } 7056 } else { 7057 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 7058 __func__); 7059 } 7060 7061 return(status); 7062 } 7063 7064 /* 7065 * qla2x00_restart_isp 7066 * restarts the ISP after a reset 7067 * 7068 * Input: 7069 * ha = adapter block pointer. 7070 * 7071 * Returns: 7072 * 0 = success 7073 */ 7074 static int 7075 qla2x00_restart_isp(scsi_qla_host_t *vha) 7076 { 7077 int status; 7078 struct qla_hw_data *ha = vha->hw; 7079 7080 /* If firmware needs to be loaded */ 7081 if (qla2x00_isp_firmware(vha)) { 7082 vha->flags.online = 0; 7083 status = ha->isp_ops->chip_diag(vha); 7084 if (status) 7085 return status; 7086 status = qla2x00_setup_chip(vha); 7087 if (status) 7088 return status; 7089 } 7090 7091 status = qla2x00_init_rings(vha); 7092 if (status) 7093 return status; 7094 7095 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7096 ha->flags.chip_reset_done = 1; 7097 7098 /* Initialize the queues in use */ 7099 qla25xx_init_queues(ha); 7100 7101 status = qla2x00_fw_ready(vha); 7102 if (status) { 7103 /* if no cable then assume it's good */ 7104 return vha->device_flags & DFLG_NO_CABLE ? 0 : status; 7105 } 7106 7107 /* Issue a marker after FW becomes ready. */ 7108 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 7109 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7110 7111 return 0; 7112 } 7113 7114 static int 7115 qla25xx_init_queues(struct qla_hw_data *ha) 7116 { 7117 struct rsp_que *rsp = NULL; 7118 struct req_que *req = NULL; 7119 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7120 int ret = -1; 7121 int i; 7122 7123 for (i = 1; i < ha->max_rsp_queues; i++) { 7124 rsp = ha->rsp_q_map[i]; 7125 if (rsp && test_bit(i, ha->rsp_qid_map)) { 7126 rsp->options &= ~BIT_0; 7127 ret = qla25xx_init_rsp_que(base_vha, rsp); 7128 if (ret != QLA_SUCCESS) 7129 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 7130 "%s Rsp que: %d init failed.\n", 7131 __func__, rsp->id); 7132 else 7133 ql_dbg(ql_dbg_init, base_vha, 0x0100, 7134 "%s Rsp que: %d inited.\n", 7135 __func__, rsp->id); 7136 } 7137 } 7138 for (i = 1; i < ha->max_req_queues; i++) { 7139 req = ha->req_q_map[i]; 7140 if (req && test_bit(i, ha->req_qid_map)) { 7141 /* Clear outstanding commands array. */ 7142 req->options &= ~BIT_0; 7143 ret = qla25xx_init_req_que(base_vha, req); 7144 if (ret != QLA_SUCCESS) 7145 ql_dbg(ql_dbg_init, base_vha, 0x0101, 7146 "%s Req que: %d init failed.\n", 7147 __func__, req->id); 7148 else 7149 ql_dbg(ql_dbg_init, base_vha, 0x0102, 7150 "%s Req que: %d inited.\n", 7151 __func__, req->id); 7152 } 7153 } 7154 return ret; 7155 } 7156 7157 /* 7158 * qla2x00_reset_adapter 7159 * Reset adapter. 7160 * 7161 * Input: 7162 * ha = adapter block pointer. 7163 */ 7164 int 7165 qla2x00_reset_adapter(scsi_qla_host_t *vha) 7166 { 7167 unsigned long flags = 0; 7168 struct qla_hw_data *ha = vha->hw; 7169 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7170 7171 vha->flags.online = 0; 7172 ha->isp_ops->disable_intrs(ha); 7173 7174 spin_lock_irqsave(&ha->hardware_lock, flags); 7175 wrt_reg_word(®->hccr, HCCR_RESET_RISC); 7176 rd_reg_word(®->hccr); /* PCI Posting. */ 7177 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); 7178 rd_reg_word(®->hccr); /* PCI Posting. */ 7179 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7180 7181 return QLA_SUCCESS; 7182 } 7183 7184 int 7185 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7186 { 7187 unsigned long flags = 0; 7188 struct qla_hw_data *ha = vha->hw; 7189 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7190 7191 if (IS_P3P_TYPE(ha)) 7192 return QLA_SUCCESS; 7193 7194 vha->flags.online = 0; 7195 ha->isp_ops->disable_intrs(ha); 7196 7197 spin_lock_irqsave(&ha->hardware_lock, flags); 7198 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET); 7199 rd_reg_dword(®->hccr); 7200 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE); 7201 rd_reg_dword(®->hccr); 7202 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7203 7204 if (IS_NOPOLLING_TYPE(ha)) 7205 ha->isp_ops->enable_intrs(ha); 7206 7207 return QLA_SUCCESS; 7208 } 7209 7210 /* On sparc systems, obtain port and node WWN from firmware 7211 * properties. 7212 */ 7213 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7214 struct nvram_24xx *nv) 7215 { 7216 #ifdef CONFIG_SPARC 7217 struct qla_hw_data *ha = vha->hw; 7218 struct pci_dev *pdev = ha->pdev; 7219 struct device_node *dp = pci_device_to_OF_node(pdev); 7220 const u8 *val; 7221 int len; 7222 7223 val = of_get_property(dp, "port-wwn", &len); 7224 if (val && len >= WWN_SIZE) 7225 memcpy(nv->port_name, val, WWN_SIZE); 7226 7227 val = of_get_property(dp, "node-wwn", &len); 7228 if (val && len >= WWN_SIZE) 7229 memcpy(nv->node_name, val, WWN_SIZE); 7230 #endif 7231 } 7232 7233 int 7234 qla24xx_nvram_config(scsi_qla_host_t *vha) 7235 { 7236 int rval; 7237 struct init_cb_24xx *icb; 7238 struct nvram_24xx *nv; 7239 __le32 *dptr; 7240 uint8_t *dptr1, *dptr2; 7241 uint32_t chksum; 7242 uint16_t cnt; 7243 struct qla_hw_data *ha = vha->hw; 7244 7245 rval = QLA_SUCCESS; 7246 icb = (struct init_cb_24xx *)ha->init_cb; 7247 nv = ha->nvram; 7248 7249 /* Determine NVRAM starting address. */ 7250 if (ha->port_no == 0) { 7251 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7252 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7253 } else { 7254 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7255 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7256 } 7257 7258 ha->nvram_size = sizeof(*nv); 7259 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7260 7261 /* Get VPD data into cache */ 7262 ha->vpd = ha->nvram + VPD_OFFSET; 7263 ha->isp_ops->read_nvram(vha, ha->vpd, 7264 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7265 7266 /* Get NVRAM data into cache and calculate checksum. */ 7267 dptr = (__force __le32 *)nv; 7268 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7269 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7270 chksum += le32_to_cpu(*dptr); 7271 7272 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7273 "Contents of NVRAM\n"); 7274 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7275 nv, ha->nvram_size); 7276 7277 /* Bad NVRAM data, set defaults parameters. */ 7278 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7279 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7280 /* Reset NVRAM data. */ 7281 ql_log(ql_log_warn, vha, 0x006b, 7282 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7283 chksum, nv->id, nv->nvram_version); 7284 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7285 ql_log(ql_log_warn, vha, 0x006c, 7286 "Falling back to functioning (yet invalid -- WWPN) " 7287 "defaults.\n"); 7288 7289 /* 7290 * Set default initialization control block. 7291 */ 7292 memset(nv, 0, ha->nvram_size); 7293 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7294 nv->version = cpu_to_le16(ICB_VERSION); 7295 nv->frame_payload_size = cpu_to_le16(2048); 7296 nv->execution_throttle = cpu_to_le16(0xFFFF); 7297 nv->exchange_count = cpu_to_le16(0); 7298 nv->hard_address = cpu_to_le16(124); 7299 nv->port_name[0] = 0x21; 7300 nv->port_name[1] = 0x00 + ha->port_no + 1; 7301 nv->port_name[2] = 0x00; 7302 nv->port_name[3] = 0xe0; 7303 nv->port_name[4] = 0x8b; 7304 nv->port_name[5] = 0x1c; 7305 nv->port_name[6] = 0x55; 7306 nv->port_name[7] = 0x86; 7307 nv->node_name[0] = 0x20; 7308 nv->node_name[1] = 0x00; 7309 nv->node_name[2] = 0x00; 7310 nv->node_name[3] = 0xe0; 7311 nv->node_name[4] = 0x8b; 7312 nv->node_name[5] = 0x1c; 7313 nv->node_name[6] = 0x55; 7314 nv->node_name[7] = 0x86; 7315 qla24xx_nvram_wwn_from_ofw(vha, nv); 7316 nv->login_retry_count = cpu_to_le16(8); 7317 nv->interrupt_delay_timer = cpu_to_le16(0); 7318 nv->login_timeout = cpu_to_le16(0); 7319 nv->firmware_options_1 = 7320 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7321 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7322 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7323 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7324 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7325 nv->efi_parameters = cpu_to_le32(0); 7326 nv->reset_delay = 5; 7327 nv->max_luns_per_target = cpu_to_le16(128); 7328 nv->port_down_retry_count = cpu_to_le16(30); 7329 nv->link_down_timeout = cpu_to_le16(30); 7330 7331 rval = 1; 7332 } 7333 7334 if (qla_tgt_mode_enabled(vha)) { 7335 /* Don't enable full login after initial LIP */ 7336 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7337 /* Don't enable LIP full login for initiator */ 7338 nv->host_p &= cpu_to_le32(~BIT_10); 7339 } 7340 7341 qlt_24xx_config_nvram_stage1(vha, nv); 7342 7343 /* Reset Initialization control block */ 7344 memset(icb, 0, ha->init_cb_size); 7345 7346 /* Copy 1st segment. */ 7347 dptr1 = (uint8_t *)icb; 7348 dptr2 = (uint8_t *)&nv->version; 7349 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7350 while (cnt--) 7351 *dptr1++ = *dptr2++; 7352 7353 icb->login_retry_count = nv->login_retry_count; 7354 icb->link_down_on_nos = nv->link_down_on_nos; 7355 7356 /* Copy 2nd segment. */ 7357 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7358 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7359 cnt = (uint8_t *)&icb->reserved_3 - 7360 (uint8_t *)&icb->interrupt_delay_timer; 7361 while (cnt--) 7362 *dptr1++ = *dptr2++; 7363 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7364 /* 7365 * Setup driver NVRAM options. 7366 */ 7367 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7368 "QLA2462"); 7369 7370 qlt_24xx_config_nvram_stage2(vha, icb); 7371 7372 if (nv->host_p & cpu_to_le32(BIT_15)) { 7373 /* Use alternate WWN? */ 7374 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7375 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7376 } 7377 7378 /* Prepare nodename */ 7379 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7380 /* 7381 * Firmware will apply the following mask if the nodename was 7382 * not provided. 7383 */ 7384 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7385 icb->node_name[0] &= 0xF0; 7386 } 7387 7388 /* Set host adapter parameters. */ 7389 ha->flags.disable_risc_code_load = 0; 7390 ha->flags.enable_lip_reset = 0; 7391 ha->flags.enable_lip_full_login = 7392 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7393 ha->flags.enable_target_reset = 7394 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7395 ha->flags.enable_led_scheme = 0; 7396 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7397 7398 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7399 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7400 7401 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7402 sizeof(ha->fw_seriallink_options24)); 7403 7404 /* save HBA serial number */ 7405 ha->serial0 = icb->port_name[5]; 7406 ha->serial1 = icb->port_name[6]; 7407 ha->serial2 = icb->port_name[7]; 7408 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7409 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7410 7411 icb->execution_throttle = cpu_to_le16(0xFFFF); 7412 7413 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7414 7415 /* Set minimum login_timeout to 4 seconds. */ 7416 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7417 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7418 if (le16_to_cpu(nv->login_timeout) < 4) 7419 nv->login_timeout = cpu_to_le16(4); 7420 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7421 7422 /* Set minimum RATOV to 100 tenths of a second. */ 7423 ha->r_a_tov = 100; 7424 7425 ha->loop_reset_delay = nv->reset_delay; 7426 7427 /* Link Down Timeout = 0: 7428 * 7429 * When Port Down timer expires we will start returning 7430 * I/O's to OS with "DID_NO_CONNECT". 7431 * 7432 * Link Down Timeout != 0: 7433 * 7434 * The driver waits for the link to come up after link down 7435 * before returning I/Os to OS with "DID_NO_CONNECT". 7436 */ 7437 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7438 ha->loop_down_abort_time = 7439 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7440 } else { 7441 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7442 ha->loop_down_abort_time = 7443 (LOOP_DOWN_TIME - ha->link_down_timeout); 7444 } 7445 7446 /* Need enough time to try and get the port back. */ 7447 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7448 if (qlport_down_retry) 7449 ha->port_down_retry_count = qlport_down_retry; 7450 7451 /* Set login_retry_count */ 7452 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7453 if (ha->port_down_retry_count == 7454 le16_to_cpu(nv->port_down_retry_count) && 7455 ha->port_down_retry_count > 3) 7456 ha->login_retry_count = ha->port_down_retry_count; 7457 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7458 ha->login_retry_count = ha->port_down_retry_count; 7459 if (ql2xloginretrycount) 7460 ha->login_retry_count = ql2xloginretrycount; 7461 7462 /* N2N: driver will initiate Login instead of FW */ 7463 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 7464 7465 /* Enable ZIO. */ 7466 if (!vha->flags.init_done) { 7467 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7468 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7469 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7470 le16_to_cpu(icb->interrupt_delay_timer) : 2; 7471 } 7472 icb->firmware_options_2 &= cpu_to_le32( 7473 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7474 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7475 ha->zio_mode = QLA_ZIO_MODE_6; 7476 7477 ql_log(ql_log_info, vha, 0x006f, 7478 "ZIO mode %d enabled; timer delay (%d us).\n", 7479 ha->zio_mode, ha->zio_timer * 100); 7480 7481 icb->firmware_options_2 |= cpu_to_le32( 7482 (uint32_t)ha->zio_mode); 7483 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7484 } 7485 7486 if (rval) { 7487 ql_log(ql_log_warn, vha, 0x0070, 7488 "NVRAM configuration failed.\n"); 7489 } 7490 return (rval); 7491 } 7492 7493 static void 7494 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 7495 struct qla27xx_image_status *image_status) 7496 { 7497 ql_dbg(ql_dbg_init, vha, 0x018b, 7498 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 7499 name, "status", 7500 image_status->image_status_mask, 7501 le16_to_cpu(image_status->generation), 7502 image_status->ver_major, 7503 image_status->ver_minor, 7504 image_status->bitmap, 7505 le32_to_cpu(image_status->checksum), 7506 le32_to_cpu(image_status->signature)); 7507 } 7508 7509 static bool 7510 qla28xx_check_aux_image_status_signature( 7511 struct qla27xx_image_status *image_status) 7512 { 7513 ulong signature = le32_to_cpu(image_status->signature); 7514 7515 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 7516 } 7517 7518 static bool 7519 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 7520 { 7521 ulong signature = le32_to_cpu(image_status->signature); 7522 7523 return 7524 signature != QLA27XX_IMG_STATUS_SIGN && 7525 signature != QLA28XX_IMG_STATUS_SIGN; 7526 } 7527 7528 static ulong 7529 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 7530 { 7531 __le32 *p = (__force __le32 *)image_status; 7532 uint n = sizeof(*image_status) / sizeof(*p); 7533 uint32_t sum = 0; 7534 7535 for ( ; n--; p++) 7536 sum += le32_to_cpup(p); 7537 7538 return sum; 7539 } 7540 7541 static inline uint 7542 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 7543 { 7544 return aux->bitmap & bitmask ? 7545 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 7546 } 7547 7548 static void 7549 qla28xx_component_status( 7550 struct active_regions *active_regions, struct qla27xx_image_status *aux) 7551 { 7552 active_regions->aux.board_config = 7553 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 7554 7555 active_regions->aux.vpd_nvram = 7556 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 7557 7558 active_regions->aux.npiv_config_0_1 = 7559 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 7560 7561 active_regions->aux.npiv_config_2_3 = 7562 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 7563 } 7564 7565 static int 7566 qla27xx_compare_image_generation( 7567 struct qla27xx_image_status *pri_image_status, 7568 struct qla27xx_image_status *sec_image_status) 7569 { 7570 /* calculate generation delta as uint16 (this accounts for wrap) */ 7571 int16_t delta = 7572 le16_to_cpu(pri_image_status->generation) - 7573 le16_to_cpu(sec_image_status->generation); 7574 7575 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 7576 7577 return delta; 7578 } 7579 7580 void 7581 qla28xx_get_aux_images( 7582 struct scsi_qla_host *vha, struct active_regions *active_regions) 7583 { 7584 struct qla_hw_data *ha = vha->hw; 7585 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 7586 bool valid_pri_image = false, valid_sec_image = false; 7587 bool active_pri_image = false, active_sec_image = false; 7588 7589 if (!ha->flt_region_aux_img_status_pri) { 7590 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 7591 goto check_sec_image; 7592 } 7593 7594 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status, 7595 ha->flt_region_aux_img_status_pri, 7596 sizeof(pri_aux_image_status) >> 2); 7597 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 7598 7599 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 7600 ql_dbg(ql_dbg_init, vha, 0x018b, 7601 "Primary aux image signature (%#x) not valid\n", 7602 le32_to_cpu(pri_aux_image_status.signature)); 7603 goto check_sec_image; 7604 } 7605 7606 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 7607 ql_dbg(ql_dbg_init, vha, 0x018c, 7608 "Primary aux image checksum failed\n"); 7609 goto check_sec_image; 7610 } 7611 7612 valid_pri_image = true; 7613 7614 if (pri_aux_image_status.image_status_mask & 1) { 7615 ql_dbg(ql_dbg_init, vha, 0x018d, 7616 "Primary aux image is active\n"); 7617 active_pri_image = true; 7618 } 7619 7620 check_sec_image: 7621 if (!ha->flt_region_aux_img_status_sec) { 7622 ql_dbg(ql_dbg_init, vha, 0x018a, 7623 "Secondary aux image not addressed\n"); 7624 goto check_valid_image; 7625 } 7626 7627 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status, 7628 ha->flt_region_aux_img_status_sec, 7629 sizeof(sec_aux_image_status) >> 2); 7630 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 7631 7632 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 7633 ql_dbg(ql_dbg_init, vha, 0x018b, 7634 "Secondary aux image signature (%#x) not valid\n", 7635 le32_to_cpu(sec_aux_image_status.signature)); 7636 goto check_valid_image; 7637 } 7638 7639 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 7640 ql_dbg(ql_dbg_init, vha, 0x018c, 7641 "Secondary aux image checksum failed\n"); 7642 goto check_valid_image; 7643 } 7644 7645 valid_sec_image = true; 7646 7647 if (sec_aux_image_status.image_status_mask & 1) { 7648 ql_dbg(ql_dbg_init, vha, 0x018d, 7649 "Secondary aux image is active\n"); 7650 active_sec_image = true; 7651 } 7652 7653 check_valid_image: 7654 if (valid_pri_image && active_pri_image && 7655 valid_sec_image && active_sec_image) { 7656 if (qla27xx_compare_image_generation(&pri_aux_image_status, 7657 &sec_aux_image_status) >= 0) { 7658 qla28xx_component_status(active_regions, 7659 &pri_aux_image_status); 7660 } else { 7661 qla28xx_component_status(active_regions, 7662 &sec_aux_image_status); 7663 } 7664 } else if (valid_pri_image && active_pri_image) { 7665 qla28xx_component_status(active_regions, &pri_aux_image_status); 7666 } else if (valid_sec_image && active_sec_image) { 7667 qla28xx_component_status(active_regions, &sec_aux_image_status); 7668 } 7669 7670 ql_dbg(ql_dbg_init, vha, 0x018f, 7671 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n", 7672 active_regions->aux.board_config, 7673 active_regions->aux.vpd_nvram, 7674 active_regions->aux.npiv_config_0_1, 7675 active_regions->aux.npiv_config_2_3); 7676 } 7677 7678 void 7679 qla27xx_get_active_image(struct scsi_qla_host *vha, 7680 struct active_regions *active_regions) 7681 { 7682 struct qla_hw_data *ha = vha->hw; 7683 struct qla27xx_image_status pri_image_status, sec_image_status; 7684 bool valid_pri_image = false, valid_sec_image = false; 7685 bool active_pri_image = false, active_sec_image = false; 7686 7687 if (!ha->flt_region_img_status_pri) { 7688 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 7689 goto check_sec_image; 7690 } 7691 7692 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status, 7693 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 7694 QLA_SUCCESS) { 7695 WARN_ON_ONCE(true); 7696 goto check_sec_image; 7697 } 7698 qla27xx_print_image(vha, "Primary image", &pri_image_status); 7699 7700 if (qla27xx_check_image_status_signature(&pri_image_status)) { 7701 ql_dbg(ql_dbg_init, vha, 0x018b, 7702 "Primary image signature (%#x) not valid\n", 7703 le32_to_cpu(pri_image_status.signature)); 7704 goto check_sec_image; 7705 } 7706 7707 if (qla27xx_image_status_checksum(&pri_image_status)) { 7708 ql_dbg(ql_dbg_init, vha, 0x018c, 7709 "Primary image checksum failed\n"); 7710 goto check_sec_image; 7711 } 7712 7713 valid_pri_image = true; 7714 7715 if (pri_image_status.image_status_mask & 1) { 7716 ql_dbg(ql_dbg_init, vha, 0x018d, 7717 "Primary image is active\n"); 7718 active_pri_image = true; 7719 } 7720 7721 check_sec_image: 7722 if (!ha->flt_region_img_status_sec) { 7723 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 7724 goto check_valid_image; 7725 } 7726 7727 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7728 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 7729 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 7730 7731 if (qla27xx_check_image_status_signature(&sec_image_status)) { 7732 ql_dbg(ql_dbg_init, vha, 0x018b, 7733 "Secondary image signature (%#x) not valid\n", 7734 le32_to_cpu(sec_image_status.signature)); 7735 goto check_valid_image; 7736 } 7737 7738 if (qla27xx_image_status_checksum(&sec_image_status)) { 7739 ql_dbg(ql_dbg_init, vha, 0x018c, 7740 "Secondary image checksum failed\n"); 7741 goto check_valid_image; 7742 } 7743 7744 valid_sec_image = true; 7745 7746 if (sec_image_status.image_status_mask & 1) { 7747 ql_dbg(ql_dbg_init, vha, 0x018d, 7748 "Secondary image is active\n"); 7749 active_sec_image = true; 7750 } 7751 7752 check_valid_image: 7753 if (valid_pri_image && active_pri_image) 7754 active_regions->global = QLA27XX_PRIMARY_IMAGE; 7755 7756 if (valid_sec_image && active_sec_image) { 7757 if (!active_regions->global || 7758 qla27xx_compare_image_generation( 7759 &pri_image_status, &sec_image_status) < 0) { 7760 active_regions->global = QLA27XX_SECONDARY_IMAGE; 7761 } 7762 } 7763 7764 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 7765 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 7766 "default (boot/fw)" : 7767 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 7768 "primary" : 7769 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 7770 "secondary" : "invalid", 7771 active_regions->global); 7772 } 7773 7774 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 7775 { 7776 return 7777 !(dword[4] | dword[5] | dword[6] | dword[7]) || 7778 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 7779 } 7780 7781 static int 7782 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7783 uint32_t faddr) 7784 { 7785 int rval; 7786 uint templates, segments, fragment; 7787 ulong i; 7788 uint j; 7789 ulong dlen; 7790 uint32_t *dcode; 7791 uint32_t risc_addr, risc_size, risc_attr = 0; 7792 struct qla_hw_data *ha = vha->hw; 7793 struct req_que *req = ha->req_q_map[0]; 7794 struct fwdt *fwdt = ha->fwdt; 7795 7796 ql_dbg(ql_dbg_init, vha, 0x008b, 7797 "FW: Loading firmware from flash (%x).\n", faddr); 7798 7799 dcode = (uint32_t *)req->ring; 7800 qla24xx_read_flash_data(vha, dcode, faddr, 8); 7801 if (qla24xx_risc_firmware_invalid(dcode)) { 7802 ql_log(ql_log_fatal, vha, 0x008c, 7803 "Unable to verify the integrity of flash firmware " 7804 "image.\n"); 7805 ql_log(ql_log_fatal, vha, 0x008d, 7806 "Firmware data: %08x %08x %08x %08x.\n", 7807 dcode[0], dcode[1], dcode[2], dcode[3]); 7808 7809 return QLA_FUNCTION_FAILED; 7810 } 7811 7812 dcode = (uint32_t *)req->ring; 7813 *srisc_addr = 0; 7814 segments = FA_RISC_CODE_SEGMENTS; 7815 for (j = 0; j < segments; j++) { 7816 ql_dbg(ql_dbg_init, vha, 0x008d, 7817 "-> Loading segment %u...\n", j); 7818 qla24xx_read_flash_data(vha, dcode, faddr, 10); 7819 risc_addr = be32_to_cpu((__force __be32)dcode[2]); 7820 risc_size = be32_to_cpu((__force __be32)dcode[3]); 7821 if (!*srisc_addr) { 7822 *srisc_addr = risc_addr; 7823 risc_attr = be32_to_cpu((__force __be32)dcode[9]); 7824 } 7825 7826 dlen = ha->fw_transfer_size >> 2; 7827 for (fragment = 0; risc_size; fragment++) { 7828 if (dlen > risc_size) 7829 dlen = risc_size; 7830 7831 ql_dbg(ql_dbg_init, vha, 0x008e, 7832 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 7833 fragment, risc_addr, faddr, dlen); 7834 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7835 for (i = 0; i < dlen; i++) 7836 dcode[i] = swab32(dcode[i]); 7837 7838 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 7839 if (rval) { 7840 ql_log(ql_log_fatal, vha, 0x008f, 7841 "-> Failed load firmware fragment %u.\n", 7842 fragment); 7843 return QLA_FUNCTION_FAILED; 7844 } 7845 7846 faddr += dlen; 7847 risc_addr += dlen; 7848 risc_size -= dlen; 7849 } 7850 } 7851 7852 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 7853 return QLA_SUCCESS; 7854 7855 templates = (risc_attr & BIT_9) ? 2 : 1; 7856 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 7857 for (j = 0; j < templates; j++, fwdt++) { 7858 if (fwdt->template) 7859 vfree(fwdt->template); 7860 fwdt->template = NULL; 7861 fwdt->length = 0; 7862 7863 dcode = (uint32_t *)req->ring; 7864 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7865 risc_size = be32_to_cpu((__force __be32)dcode[2]); 7866 ql_dbg(ql_dbg_init, vha, 0x0161, 7867 "-> fwdt%u template array at %#x (%#x dwords)\n", 7868 j, faddr, risc_size); 7869 if (!risc_size || !~risc_size) { 7870 ql_dbg(ql_dbg_init, vha, 0x0162, 7871 "-> fwdt%u failed to read array\n", j); 7872 goto failed; 7873 } 7874 7875 /* skip header and ignore checksum */ 7876 faddr += 7; 7877 risc_size -= 8; 7878 7879 ql_dbg(ql_dbg_init, vha, 0x0163, 7880 "-> fwdt%u template allocate template %#x words...\n", 7881 j, risc_size); 7882 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 7883 if (!fwdt->template) { 7884 ql_log(ql_log_warn, vha, 0x0164, 7885 "-> fwdt%u failed allocate template.\n", j); 7886 goto failed; 7887 } 7888 7889 dcode = fwdt->template; 7890 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7891 7892 if (!qla27xx_fwdt_template_valid(dcode)) { 7893 ql_log(ql_log_warn, vha, 0x0165, 7894 "-> fwdt%u failed template validate\n", j); 7895 goto failed; 7896 } 7897 7898 dlen = qla27xx_fwdt_template_size(dcode); 7899 ql_dbg(ql_dbg_init, vha, 0x0166, 7900 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 7901 j, dlen, dlen / sizeof(*dcode)); 7902 if (dlen > risc_size * sizeof(*dcode)) { 7903 ql_log(ql_log_warn, vha, 0x0167, 7904 "-> fwdt%u template exceeds array (%-lu bytes)\n", 7905 j, dlen - risc_size * sizeof(*dcode)); 7906 goto failed; 7907 } 7908 7909 fwdt->length = dlen; 7910 ql_dbg(ql_dbg_init, vha, 0x0168, 7911 "-> fwdt%u loaded template ok\n", j); 7912 7913 faddr += risc_size + 1; 7914 } 7915 7916 return QLA_SUCCESS; 7917 7918 failed: 7919 if (fwdt->template) 7920 vfree(fwdt->template); 7921 fwdt->template = NULL; 7922 fwdt->length = 0; 7923 7924 return QLA_SUCCESS; 7925 } 7926 7927 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7928 7929 int 7930 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7931 { 7932 int rval; 7933 int i, fragment; 7934 uint16_t *wcode; 7935 __be16 *fwcode; 7936 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7937 struct fw_blob *blob; 7938 struct qla_hw_data *ha = vha->hw; 7939 struct req_que *req = ha->req_q_map[0]; 7940 7941 /* Load firmware blob. */ 7942 blob = qla2x00_request_firmware(vha); 7943 if (!blob) { 7944 ql_log(ql_log_info, vha, 0x0083, 7945 "Firmware image unavailable.\n"); 7946 ql_log(ql_log_info, vha, 0x0084, 7947 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7948 return QLA_FUNCTION_FAILED; 7949 } 7950 7951 rval = QLA_SUCCESS; 7952 7953 wcode = (uint16_t *)req->ring; 7954 *srisc_addr = 0; 7955 fwcode = (__force __be16 *)blob->fw->data; 7956 fwclen = 0; 7957 7958 /* Validate firmware image by checking version. */ 7959 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7960 ql_log(ql_log_fatal, vha, 0x0085, 7961 "Unable to verify integrity of firmware image (%zd).\n", 7962 blob->fw->size); 7963 goto fail_fw_integrity; 7964 } 7965 for (i = 0; i < 4; i++) 7966 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7967 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7968 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7969 wcode[2] == 0 && wcode[3] == 0)) { 7970 ql_log(ql_log_fatal, vha, 0x0086, 7971 "Unable to verify integrity of firmware image.\n"); 7972 ql_log(ql_log_fatal, vha, 0x0087, 7973 "Firmware data: %04x %04x %04x %04x.\n", 7974 wcode[0], wcode[1], wcode[2], wcode[3]); 7975 goto fail_fw_integrity; 7976 } 7977 7978 seg = blob->segs; 7979 while (*seg && rval == QLA_SUCCESS) { 7980 risc_addr = *seg; 7981 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7982 risc_size = be16_to_cpu(fwcode[3]); 7983 7984 /* Validate firmware image size. */ 7985 fwclen += risc_size * sizeof(uint16_t); 7986 if (blob->fw->size < fwclen) { 7987 ql_log(ql_log_fatal, vha, 0x0088, 7988 "Unable to verify integrity of firmware image " 7989 "(%zd).\n", blob->fw->size); 7990 goto fail_fw_integrity; 7991 } 7992 7993 fragment = 0; 7994 while (risc_size > 0 && rval == QLA_SUCCESS) { 7995 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7996 if (wlen > risc_size) 7997 wlen = risc_size; 7998 ql_dbg(ql_dbg_init, vha, 0x0089, 7999 "Loading risc segment@ risc addr %x number of " 8000 "words 0x%x.\n", risc_addr, wlen); 8001 8002 for (i = 0; i < wlen; i++) 8003 wcode[i] = swab16((__force u32)fwcode[i]); 8004 8005 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 8006 wlen); 8007 if (rval) { 8008 ql_log(ql_log_fatal, vha, 0x008a, 8009 "Failed to load segment %d of firmware.\n", 8010 fragment); 8011 break; 8012 } 8013 8014 fwcode += wlen; 8015 risc_addr += wlen; 8016 risc_size -= wlen; 8017 fragment++; 8018 } 8019 8020 /* Next segment. */ 8021 seg++; 8022 } 8023 return rval; 8024 8025 fail_fw_integrity: 8026 return QLA_FUNCTION_FAILED; 8027 } 8028 8029 static int 8030 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8031 { 8032 int rval; 8033 uint templates, segments, fragment; 8034 uint32_t *dcode; 8035 ulong dlen; 8036 uint32_t risc_addr, risc_size, risc_attr = 0; 8037 ulong i; 8038 uint j; 8039 struct fw_blob *blob; 8040 __be32 *fwcode; 8041 struct qla_hw_data *ha = vha->hw; 8042 struct req_que *req = ha->req_q_map[0]; 8043 struct fwdt *fwdt = ha->fwdt; 8044 8045 ql_dbg(ql_dbg_init, vha, 0x0090, 8046 "-> FW: Loading via request-firmware.\n"); 8047 8048 blob = qla2x00_request_firmware(vha); 8049 if (!blob) { 8050 ql_log(ql_log_warn, vha, 0x0092, 8051 "-> Firmware file not found.\n"); 8052 8053 return QLA_FUNCTION_FAILED; 8054 } 8055 8056 fwcode = (__force __be32 *)blob->fw->data; 8057 dcode = (__force uint32_t *)fwcode; 8058 if (qla24xx_risc_firmware_invalid(dcode)) { 8059 ql_log(ql_log_fatal, vha, 0x0093, 8060 "Unable to verify integrity of firmware image (%zd).\n", 8061 blob->fw->size); 8062 ql_log(ql_log_fatal, vha, 0x0095, 8063 "Firmware data: %08x %08x %08x %08x.\n", 8064 dcode[0], dcode[1], dcode[2], dcode[3]); 8065 return QLA_FUNCTION_FAILED; 8066 } 8067 8068 dcode = (uint32_t *)req->ring; 8069 *srisc_addr = 0; 8070 segments = FA_RISC_CODE_SEGMENTS; 8071 for (j = 0; j < segments; j++) { 8072 ql_dbg(ql_dbg_init, vha, 0x0096, 8073 "-> Loading segment %u...\n", j); 8074 risc_addr = be32_to_cpu(fwcode[2]); 8075 risc_size = be32_to_cpu(fwcode[3]); 8076 8077 if (!*srisc_addr) { 8078 *srisc_addr = risc_addr; 8079 risc_attr = be32_to_cpu(fwcode[9]); 8080 } 8081 8082 dlen = ha->fw_transfer_size >> 2; 8083 for (fragment = 0; risc_size; fragment++) { 8084 if (dlen > risc_size) 8085 dlen = risc_size; 8086 8087 ql_dbg(ql_dbg_init, vha, 0x0097, 8088 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 8089 fragment, risc_addr, 8090 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 8091 dlen); 8092 8093 for (i = 0; i < dlen; i++) 8094 dcode[i] = swab32((__force u32)fwcode[i]); 8095 8096 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 8097 if (rval) { 8098 ql_log(ql_log_fatal, vha, 0x0098, 8099 "-> Failed load firmware fragment %u.\n", 8100 fragment); 8101 return QLA_FUNCTION_FAILED; 8102 } 8103 8104 fwcode += dlen; 8105 risc_addr += dlen; 8106 risc_size -= dlen; 8107 } 8108 } 8109 8110 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8111 return QLA_SUCCESS; 8112 8113 templates = (risc_attr & BIT_9) ? 2 : 1; 8114 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 8115 for (j = 0; j < templates; j++, fwdt++) { 8116 if (fwdt->template) 8117 vfree(fwdt->template); 8118 fwdt->template = NULL; 8119 fwdt->length = 0; 8120 8121 risc_size = be32_to_cpu(fwcode[2]); 8122 ql_dbg(ql_dbg_init, vha, 0x0171, 8123 "-> fwdt%u template array at %#x (%#x dwords)\n", 8124 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 8125 risc_size); 8126 if (!risc_size || !~risc_size) { 8127 ql_dbg(ql_dbg_init, vha, 0x0172, 8128 "-> fwdt%u failed to read array\n", j); 8129 goto failed; 8130 } 8131 8132 /* skip header and ignore checksum */ 8133 fwcode += 7; 8134 risc_size -= 8; 8135 8136 ql_dbg(ql_dbg_init, vha, 0x0173, 8137 "-> fwdt%u template allocate template %#x words...\n", 8138 j, risc_size); 8139 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 8140 if (!fwdt->template) { 8141 ql_log(ql_log_warn, vha, 0x0174, 8142 "-> fwdt%u failed allocate template.\n", j); 8143 goto failed; 8144 } 8145 8146 dcode = fwdt->template; 8147 for (i = 0; i < risc_size; i++) 8148 dcode[i] = (__force u32)fwcode[i]; 8149 8150 if (!qla27xx_fwdt_template_valid(dcode)) { 8151 ql_log(ql_log_warn, vha, 0x0175, 8152 "-> fwdt%u failed template validate\n", j); 8153 goto failed; 8154 } 8155 8156 dlen = qla27xx_fwdt_template_size(dcode); 8157 ql_dbg(ql_dbg_init, vha, 0x0176, 8158 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 8159 j, dlen, dlen / sizeof(*dcode)); 8160 if (dlen > risc_size * sizeof(*dcode)) { 8161 ql_log(ql_log_warn, vha, 0x0177, 8162 "-> fwdt%u template exceeds array (%-lu bytes)\n", 8163 j, dlen - risc_size * sizeof(*dcode)); 8164 goto failed; 8165 } 8166 8167 fwdt->length = dlen; 8168 ql_dbg(ql_dbg_init, vha, 0x0178, 8169 "-> fwdt%u loaded template ok\n", j); 8170 8171 fwcode += risc_size + 1; 8172 } 8173 8174 return QLA_SUCCESS; 8175 8176 failed: 8177 if (fwdt->template) 8178 vfree(fwdt->template); 8179 fwdt->template = NULL; 8180 fwdt->length = 0; 8181 8182 return QLA_SUCCESS; 8183 } 8184 8185 int 8186 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8187 { 8188 int rval; 8189 8190 if (ql2xfwloadbin == 1) 8191 return qla81xx_load_risc(vha, srisc_addr); 8192 8193 /* 8194 * FW Load priority: 8195 * 1) Firmware via request-firmware interface (.bin file). 8196 * 2) Firmware residing in flash. 8197 */ 8198 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8199 if (rval == QLA_SUCCESS) 8200 return rval; 8201 8202 return qla24xx_load_risc_flash(vha, srisc_addr, 8203 vha->hw->flt_region_fw); 8204 } 8205 8206 int 8207 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8208 { 8209 int rval; 8210 struct qla_hw_data *ha = vha->hw; 8211 struct active_regions active_regions = { }; 8212 8213 if (ql2xfwloadbin == 2) 8214 goto try_blob_fw; 8215 8216 /* FW Load priority: 8217 * 1) Firmware residing in flash. 8218 * 2) Firmware via request-firmware interface (.bin file). 8219 * 3) Golden-Firmware residing in flash -- (limited operation). 8220 */ 8221 8222 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8223 goto try_primary_fw; 8224 8225 qla27xx_get_active_image(vha, &active_regions); 8226 8227 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8228 goto try_primary_fw; 8229 8230 ql_dbg(ql_dbg_init, vha, 0x008b, 8231 "Loading secondary firmware image.\n"); 8232 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8233 if (!rval) 8234 return rval; 8235 8236 try_primary_fw: 8237 ql_dbg(ql_dbg_init, vha, 0x008b, 8238 "Loading primary firmware image.\n"); 8239 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8240 if (!rval) 8241 return rval; 8242 8243 try_blob_fw: 8244 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8245 if (!rval || !ha->flt_region_gold_fw) 8246 return rval; 8247 8248 ql_log(ql_log_info, vha, 0x0099, 8249 "Attempting to fallback to golden firmware.\n"); 8250 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8251 if (rval) 8252 return rval; 8253 8254 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8255 ha->flags.running_gold_fw = 1; 8256 return rval; 8257 } 8258 8259 void 8260 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8261 { 8262 int ret, retries; 8263 struct qla_hw_data *ha = vha->hw; 8264 8265 if (ha->flags.pci_channel_io_perm_failure) 8266 return; 8267 if (!IS_FWI2_CAPABLE(ha)) 8268 return; 8269 if (!ha->fw_major_version) 8270 return; 8271 if (!ha->flags.fw_started) 8272 return; 8273 8274 ret = qla2x00_stop_firmware(vha); 8275 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8276 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8277 ha->isp_ops->reset_chip(vha); 8278 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8279 continue; 8280 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8281 continue; 8282 ql_log(ql_log_info, vha, 0x8015, 8283 "Attempting retry of stop-firmware command.\n"); 8284 ret = qla2x00_stop_firmware(vha); 8285 } 8286 8287 QLA_FW_STOPPED(ha); 8288 ha->flags.fw_init_done = 0; 8289 } 8290 8291 int 8292 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8293 { 8294 int rval = QLA_SUCCESS; 8295 int rval2; 8296 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8297 struct qla_hw_data *ha = vha->hw; 8298 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8299 8300 if (!vha->vp_idx) 8301 return -EINVAL; 8302 8303 rval = qla2x00_fw_ready(base_vha); 8304 8305 if (rval == QLA_SUCCESS) { 8306 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8307 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8308 } 8309 8310 vha->flags.management_server_logged_in = 0; 8311 8312 /* Login to SNS first */ 8313 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8314 BIT_1); 8315 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8316 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8317 ql_dbg(ql_dbg_init, vha, 0x0120, 8318 "Failed SNS login: loop_id=%x, rval2=%d\n", 8319 NPH_SNS, rval2); 8320 else 8321 ql_dbg(ql_dbg_init, vha, 0x0103, 8322 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8323 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8324 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8325 return (QLA_FUNCTION_FAILED); 8326 } 8327 8328 atomic_set(&vha->loop_down_timer, 0); 8329 atomic_set(&vha->loop_state, LOOP_UP); 8330 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8331 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8332 rval = qla2x00_loop_resync(base_vha); 8333 8334 return rval; 8335 } 8336 8337 /* 84XX Support **************************************************************/ 8338 8339 static LIST_HEAD(qla_cs84xx_list); 8340 static DEFINE_MUTEX(qla_cs84xx_mutex); 8341 8342 static struct qla_chip_state_84xx * 8343 qla84xx_get_chip(struct scsi_qla_host *vha) 8344 { 8345 struct qla_chip_state_84xx *cs84xx; 8346 struct qla_hw_data *ha = vha->hw; 8347 8348 mutex_lock(&qla_cs84xx_mutex); 8349 8350 /* Find any shared 84xx chip. */ 8351 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8352 if (cs84xx->bus == ha->pdev->bus) { 8353 kref_get(&cs84xx->kref); 8354 goto done; 8355 } 8356 } 8357 8358 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8359 if (!cs84xx) 8360 goto done; 8361 8362 kref_init(&cs84xx->kref); 8363 spin_lock_init(&cs84xx->access_lock); 8364 mutex_init(&cs84xx->fw_update_mutex); 8365 cs84xx->bus = ha->pdev->bus; 8366 8367 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8368 done: 8369 mutex_unlock(&qla_cs84xx_mutex); 8370 return cs84xx; 8371 } 8372 8373 static void 8374 __qla84xx_chip_release(struct kref *kref) 8375 { 8376 struct qla_chip_state_84xx *cs84xx = 8377 container_of(kref, struct qla_chip_state_84xx, kref); 8378 8379 mutex_lock(&qla_cs84xx_mutex); 8380 list_del(&cs84xx->list); 8381 mutex_unlock(&qla_cs84xx_mutex); 8382 kfree(cs84xx); 8383 } 8384 8385 void 8386 qla84xx_put_chip(struct scsi_qla_host *vha) 8387 { 8388 struct qla_hw_data *ha = vha->hw; 8389 8390 if (ha->cs84xx) 8391 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8392 } 8393 8394 static int 8395 qla84xx_init_chip(scsi_qla_host_t *vha) 8396 { 8397 int rval; 8398 uint16_t status[2]; 8399 struct qla_hw_data *ha = vha->hw; 8400 8401 mutex_lock(&ha->cs84xx->fw_update_mutex); 8402 8403 rval = qla84xx_verify_chip(vha, status); 8404 8405 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8406 8407 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8408 QLA_SUCCESS; 8409 } 8410 8411 /* 81XX Support **************************************************************/ 8412 8413 int 8414 qla81xx_nvram_config(scsi_qla_host_t *vha) 8415 { 8416 int rval; 8417 struct init_cb_81xx *icb; 8418 struct nvram_81xx *nv; 8419 __le32 *dptr; 8420 uint8_t *dptr1, *dptr2; 8421 uint32_t chksum; 8422 uint16_t cnt; 8423 struct qla_hw_data *ha = vha->hw; 8424 uint32_t faddr; 8425 struct active_regions active_regions = { }; 8426 8427 rval = QLA_SUCCESS; 8428 icb = (struct init_cb_81xx *)ha->init_cb; 8429 nv = ha->nvram; 8430 8431 /* Determine NVRAM starting address. */ 8432 ha->nvram_size = sizeof(*nv); 8433 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8434 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8435 ha->vpd_size = FA_VPD_SIZE_82XX; 8436 8437 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8438 qla28xx_get_aux_images(vha, &active_regions); 8439 8440 /* Get VPD data into cache */ 8441 ha->vpd = ha->nvram + VPD_OFFSET; 8442 8443 faddr = ha->flt_region_vpd; 8444 if (IS_QLA28XX(ha)) { 8445 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8446 faddr = ha->flt_region_vpd_sec; 8447 ql_dbg(ql_dbg_init, vha, 0x0110, 8448 "Loading %s nvram image.\n", 8449 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8450 "primary" : "secondary"); 8451 } 8452 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8453 8454 /* Get NVRAM data into cache and calculate checksum. */ 8455 faddr = ha->flt_region_nvram; 8456 if (IS_QLA28XX(ha)) { 8457 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8458 faddr = ha->flt_region_nvram_sec; 8459 } 8460 ql_dbg(ql_dbg_init, vha, 0x0110, 8461 "Loading %s nvram image.\n", 8462 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8463 "primary" : "secondary"); 8464 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8465 8466 dptr = (__force __le32 *)nv; 8467 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8468 chksum += le32_to_cpu(*dptr); 8469 8470 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8471 "Contents of NVRAM:\n"); 8472 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8473 nv, ha->nvram_size); 8474 8475 /* Bad NVRAM data, set defaults parameters. */ 8476 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 8477 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 8478 /* Reset NVRAM data. */ 8479 ql_log(ql_log_info, vha, 0x0073, 8480 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 8481 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 8482 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 8483 ql_log(ql_log_info, vha, 0x0074, 8484 "Falling back to functioning (yet invalid -- WWPN) " 8485 "defaults.\n"); 8486 8487 /* 8488 * Set default initialization control block. 8489 */ 8490 memset(nv, 0, ha->nvram_size); 8491 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8492 nv->version = cpu_to_le16(ICB_VERSION); 8493 nv->frame_payload_size = cpu_to_le16(2048); 8494 nv->execution_throttle = cpu_to_le16(0xFFFF); 8495 nv->exchange_count = cpu_to_le16(0); 8496 nv->port_name[0] = 0x21; 8497 nv->port_name[1] = 0x00 + ha->port_no + 1; 8498 nv->port_name[2] = 0x00; 8499 nv->port_name[3] = 0xe0; 8500 nv->port_name[4] = 0x8b; 8501 nv->port_name[5] = 0x1c; 8502 nv->port_name[6] = 0x55; 8503 nv->port_name[7] = 0x86; 8504 nv->node_name[0] = 0x20; 8505 nv->node_name[1] = 0x00; 8506 nv->node_name[2] = 0x00; 8507 nv->node_name[3] = 0xe0; 8508 nv->node_name[4] = 0x8b; 8509 nv->node_name[5] = 0x1c; 8510 nv->node_name[6] = 0x55; 8511 nv->node_name[7] = 0x86; 8512 nv->login_retry_count = cpu_to_le16(8); 8513 nv->interrupt_delay_timer = cpu_to_le16(0); 8514 nv->login_timeout = cpu_to_le16(0); 8515 nv->firmware_options_1 = 8516 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8517 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8518 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8519 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8520 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8521 nv->efi_parameters = cpu_to_le32(0); 8522 nv->reset_delay = 5; 8523 nv->max_luns_per_target = cpu_to_le16(128); 8524 nv->port_down_retry_count = cpu_to_le16(30); 8525 nv->link_down_timeout = cpu_to_le16(180); 8526 nv->enode_mac[0] = 0x00; 8527 nv->enode_mac[1] = 0xC0; 8528 nv->enode_mac[2] = 0xDD; 8529 nv->enode_mac[3] = 0x04; 8530 nv->enode_mac[4] = 0x05; 8531 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8532 8533 rval = 1; 8534 } 8535 8536 if (IS_T10_PI_CAPABLE(ha)) 8537 nv->frame_payload_size &= cpu_to_le16(~7); 8538 8539 qlt_81xx_config_nvram_stage1(vha, nv); 8540 8541 /* Reset Initialization control block */ 8542 memset(icb, 0, ha->init_cb_size); 8543 8544 /* Copy 1st segment. */ 8545 dptr1 = (uint8_t *)icb; 8546 dptr2 = (uint8_t *)&nv->version; 8547 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8548 while (cnt--) 8549 *dptr1++ = *dptr2++; 8550 8551 icb->login_retry_count = nv->login_retry_count; 8552 8553 /* Copy 2nd segment. */ 8554 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8555 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8556 cnt = (uint8_t *)&icb->reserved_5 - 8557 (uint8_t *)&icb->interrupt_delay_timer; 8558 while (cnt--) 8559 *dptr1++ = *dptr2++; 8560 8561 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8562 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8563 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8564 icb->enode_mac[0] = 0x00; 8565 icb->enode_mac[1] = 0xC0; 8566 icb->enode_mac[2] = 0xDD; 8567 icb->enode_mac[3] = 0x04; 8568 icb->enode_mac[4] = 0x05; 8569 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8570 } 8571 8572 /* Use extended-initialization control block. */ 8573 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8574 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8575 /* 8576 * Setup driver NVRAM options. 8577 */ 8578 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8579 "QLE8XXX"); 8580 8581 qlt_81xx_config_nvram_stage2(vha, icb); 8582 8583 /* Use alternate WWN? */ 8584 if (nv->host_p & cpu_to_le32(BIT_15)) { 8585 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8586 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8587 } 8588 8589 /* Prepare nodename */ 8590 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8591 /* 8592 * Firmware will apply the following mask if the nodename was 8593 * not provided. 8594 */ 8595 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8596 icb->node_name[0] &= 0xF0; 8597 } 8598 8599 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) { 8600 if ((nv->enhanced_features & BIT_7) == 0) 8601 ha->flags.scm_supported_a = 1; 8602 } 8603 8604 /* Set host adapter parameters. */ 8605 ha->flags.disable_risc_code_load = 0; 8606 ha->flags.enable_lip_reset = 0; 8607 ha->flags.enable_lip_full_login = 8608 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 8609 ha->flags.enable_target_reset = 8610 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8611 ha->flags.enable_led_scheme = 0; 8612 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8613 8614 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8615 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8616 8617 /* save HBA serial number */ 8618 ha->serial0 = icb->port_name[5]; 8619 ha->serial1 = icb->port_name[6]; 8620 ha->serial2 = icb->port_name[7]; 8621 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8622 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8623 8624 icb->execution_throttle = cpu_to_le16(0xFFFF); 8625 8626 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8627 8628 /* Set minimum login_timeout to 4 seconds. */ 8629 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8630 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8631 if (le16_to_cpu(nv->login_timeout) < 4) 8632 nv->login_timeout = cpu_to_le16(4); 8633 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8634 8635 /* Set minimum RATOV to 100 tenths of a second. */ 8636 ha->r_a_tov = 100; 8637 8638 ha->loop_reset_delay = nv->reset_delay; 8639 8640 /* Link Down Timeout = 0: 8641 * 8642 * When Port Down timer expires we will start returning 8643 * I/O's to OS with "DID_NO_CONNECT". 8644 * 8645 * Link Down Timeout != 0: 8646 * 8647 * The driver waits for the link to come up after link down 8648 * before returning I/Os to OS with "DID_NO_CONNECT". 8649 */ 8650 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8651 ha->loop_down_abort_time = 8652 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8653 } else { 8654 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8655 ha->loop_down_abort_time = 8656 (LOOP_DOWN_TIME - ha->link_down_timeout); 8657 } 8658 8659 /* Need enough time to try and get the port back. */ 8660 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8661 if (qlport_down_retry) 8662 ha->port_down_retry_count = qlport_down_retry; 8663 8664 /* Set login_retry_count */ 8665 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8666 if (ha->port_down_retry_count == 8667 le16_to_cpu(nv->port_down_retry_count) && 8668 ha->port_down_retry_count > 3) 8669 ha->login_retry_count = ha->port_down_retry_count; 8670 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8671 ha->login_retry_count = ha->port_down_retry_count; 8672 if (ql2xloginretrycount) 8673 ha->login_retry_count = ql2xloginretrycount; 8674 8675 /* if not running MSI-X we need handshaking on interrupts */ 8676 if (!vha->hw->flags.msix_enabled && 8677 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 8678 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8679 8680 /* Enable ZIO. */ 8681 if (!vha->flags.init_done) { 8682 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8683 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8684 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8685 le16_to_cpu(icb->interrupt_delay_timer) : 2; 8686 } 8687 icb->firmware_options_2 &= cpu_to_le32( 8688 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8689 vha->flags.process_response_queue = 0; 8690 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8691 ha->zio_mode = QLA_ZIO_MODE_6; 8692 8693 ql_log(ql_log_info, vha, 0x0075, 8694 "ZIO mode %d enabled; timer delay (%d us).\n", 8695 ha->zio_mode, 8696 ha->zio_timer * 100); 8697 8698 icb->firmware_options_2 |= cpu_to_le32( 8699 (uint32_t)ha->zio_mode); 8700 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8701 vha->flags.process_response_queue = 1; 8702 } 8703 8704 /* enable RIDA Format2 */ 8705 icb->firmware_options_3 |= cpu_to_le32(BIT_0); 8706 8707 /* N2N: driver will initiate Login instead of FW */ 8708 icb->firmware_options_3 |= cpu_to_le32(BIT_8); 8709 8710 /* Determine NVMe/FCP priority for target ports */ 8711 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 8712 8713 if (rval) { 8714 ql_log(ql_log_warn, vha, 0x0076, 8715 "NVRAM configuration failed.\n"); 8716 } 8717 return (rval); 8718 } 8719 8720 int 8721 qla82xx_restart_isp(scsi_qla_host_t *vha) 8722 { 8723 int status, rval; 8724 struct qla_hw_data *ha = vha->hw; 8725 struct scsi_qla_host *vp; 8726 unsigned long flags; 8727 8728 status = qla2x00_init_rings(vha); 8729 if (!status) { 8730 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8731 ha->flags.chip_reset_done = 1; 8732 8733 status = qla2x00_fw_ready(vha); 8734 if (!status) { 8735 /* Issue a marker after FW becomes ready. */ 8736 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8737 vha->flags.online = 1; 8738 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8739 } 8740 8741 /* if no cable then assume it's good */ 8742 if ((vha->device_flags & DFLG_NO_CABLE)) 8743 status = 0; 8744 } 8745 8746 if (!status) { 8747 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8748 8749 if (!atomic_read(&vha->loop_down_timer)) { 8750 /* 8751 * Issue marker command only when we are going 8752 * to start the I/O . 8753 */ 8754 vha->marker_needed = 1; 8755 } 8756 8757 ha->isp_ops->enable_intrs(ha); 8758 8759 ha->isp_abort_cnt = 0; 8760 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8761 8762 /* Update the firmware version */ 8763 status = qla82xx_check_md_needed(vha); 8764 8765 if (ha->fce) { 8766 ha->flags.fce_enabled = 1; 8767 memset(ha->fce, 0, 8768 fce_calc_size(ha->fce_bufs)); 8769 rval = qla2x00_enable_fce_trace(vha, 8770 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8771 &ha->fce_bufs); 8772 if (rval) { 8773 ql_log(ql_log_warn, vha, 0x8001, 8774 "Unable to reinitialize FCE (%d).\n", 8775 rval); 8776 ha->flags.fce_enabled = 0; 8777 } 8778 } 8779 8780 if (ha->eft) { 8781 memset(ha->eft, 0, EFT_SIZE); 8782 rval = qla2x00_enable_eft_trace(vha, 8783 ha->eft_dma, EFT_NUM_BUFFERS); 8784 if (rval) { 8785 ql_log(ql_log_warn, vha, 0x8010, 8786 "Unable to reinitialize EFT (%d).\n", 8787 rval); 8788 } 8789 } 8790 } 8791 8792 if (!status) { 8793 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8794 "qla82xx_restart_isp succeeded.\n"); 8795 8796 spin_lock_irqsave(&ha->vport_slock, flags); 8797 list_for_each_entry(vp, &ha->vp_list, list) { 8798 if (vp->vp_idx) { 8799 atomic_inc(&vp->vref_count); 8800 spin_unlock_irqrestore(&ha->vport_slock, flags); 8801 8802 qla2x00_vp_abort_isp(vp); 8803 8804 spin_lock_irqsave(&ha->vport_slock, flags); 8805 atomic_dec(&vp->vref_count); 8806 } 8807 } 8808 spin_unlock_irqrestore(&ha->vport_slock, flags); 8809 8810 } else { 8811 ql_log(ql_log_warn, vha, 0x8016, 8812 "qla82xx_restart_isp **** FAILED ****.\n"); 8813 } 8814 8815 return status; 8816 } 8817 8818 /* 8819 * qla24xx_get_fcp_prio 8820 * Gets the fcp cmd priority value for the logged in port. 8821 * Looks for a match of the port descriptors within 8822 * each of the fcp prio config entries. If a match is found, 8823 * the tag (priority) value is returned. 8824 * 8825 * Input: 8826 * vha = scsi host structure pointer. 8827 * fcport = port structure pointer. 8828 * 8829 * Return: 8830 * non-zero (if found) 8831 * -1 (if not found) 8832 * 8833 * Context: 8834 * Kernel context 8835 */ 8836 static int 8837 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8838 { 8839 int i, entries; 8840 uint8_t pid_match, wwn_match; 8841 int priority; 8842 uint32_t pid1, pid2; 8843 uint64_t wwn1, wwn2; 8844 struct qla_fcp_prio_entry *pri_entry; 8845 struct qla_hw_data *ha = vha->hw; 8846 8847 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8848 return -1; 8849 8850 priority = -1; 8851 entries = ha->fcp_prio_cfg->num_entries; 8852 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8853 8854 for (i = 0; i < entries; i++) { 8855 pid_match = wwn_match = 0; 8856 8857 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8858 pri_entry++; 8859 continue; 8860 } 8861 8862 /* check source pid for a match */ 8863 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8864 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8865 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8866 if (pid1 == INVALID_PORT_ID) 8867 pid_match++; 8868 else if (pid1 == pid2) 8869 pid_match++; 8870 } 8871 8872 /* check destination pid for a match */ 8873 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8874 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8875 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8876 if (pid1 == INVALID_PORT_ID) 8877 pid_match++; 8878 else if (pid1 == pid2) 8879 pid_match++; 8880 } 8881 8882 /* check source WWN for a match */ 8883 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8884 wwn1 = wwn_to_u64(vha->port_name); 8885 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8886 if (wwn2 == (uint64_t)-1) 8887 wwn_match++; 8888 else if (wwn1 == wwn2) 8889 wwn_match++; 8890 } 8891 8892 /* check destination WWN for a match */ 8893 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8894 wwn1 = wwn_to_u64(fcport->port_name); 8895 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8896 if (wwn2 == (uint64_t)-1) 8897 wwn_match++; 8898 else if (wwn1 == wwn2) 8899 wwn_match++; 8900 } 8901 8902 if (pid_match == 2 || wwn_match == 2) { 8903 /* Found a matching entry */ 8904 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8905 priority = pri_entry->tag; 8906 break; 8907 } 8908 8909 pri_entry++; 8910 } 8911 8912 return priority; 8913 } 8914 8915 /* 8916 * qla24xx_update_fcport_fcp_prio 8917 * Activates fcp priority for the logged in fc port 8918 * 8919 * Input: 8920 * vha = scsi host structure pointer. 8921 * fcp = port structure pointer. 8922 * 8923 * Return: 8924 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8925 * 8926 * Context: 8927 * Kernel context. 8928 */ 8929 int 8930 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8931 { 8932 int ret; 8933 int priority; 8934 uint16_t mb[5]; 8935 8936 if (fcport->port_type != FCT_TARGET || 8937 fcport->loop_id == FC_NO_LOOP_ID) 8938 return QLA_FUNCTION_FAILED; 8939 8940 priority = qla24xx_get_fcp_prio(vha, fcport); 8941 if (priority < 0) 8942 return QLA_FUNCTION_FAILED; 8943 8944 if (IS_P3P_TYPE(vha->hw)) { 8945 fcport->fcp_prio = priority & 0xf; 8946 return QLA_SUCCESS; 8947 } 8948 8949 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8950 if (ret == QLA_SUCCESS) { 8951 if (fcport->fcp_prio != priority) 8952 ql_dbg(ql_dbg_user, vha, 0x709e, 8953 "Updated FCP_CMND priority - value=%d loop_id=%d " 8954 "port_id=%02x%02x%02x.\n", priority, 8955 fcport->loop_id, fcport->d_id.b.domain, 8956 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8957 fcport->fcp_prio = priority & 0xf; 8958 } else 8959 ql_dbg(ql_dbg_user, vha, 0x704f, 8960 "Unable to update FCP_CMND priority - ret=0x%x for " 8961 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8962 fcport->d_id.b.domain, fcport->d_id.b.area, 8963 fcport->d_id.b.al_pa); 8964 return ret; 8965 } 8966 8967 /* 8968 * qla24xx_update_all_fcp_prio 8969 * Activates fcp priority for all the logged in ports 8970 * 8971 * Input: 8972 * ha = adapter block pointer. 8973 * 8974 * Return: 8975 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8976 * 8977 * Context: 8978 * Kernel context. 8979 */ 8980 int 8981 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8982 { 8983 int ret; 8984 fc_port_t *fcport; 8985 8986 ret = QLA_FUNCTION_FAILED; 8987 /* We need to set priority for all logged in ports */ 8988 list_for_each_entry(fcport, &vha->vp_fcports, list) 8989 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8990 8991 return ret; 8992 } 8993 8994 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8995 int vp_idx, bool startqp) 8996 { 8997 int rsp_id = 0; 8998 int req_id = 0; 8999 int i; 9000 struct qla_hw_data *ha = vha->hw; 9001 uint16_t qpair_id = 0; 9002 struct qla_qpair *qpair = NULL; 9003 struct qla_msix_entry *msix; 9004 9005 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 9006 ql_log(ql_log_warn, vha, 0x00181, 9007 "FW/Driver is not multi-queue capable.\n"); 9008 return NULL; 9009 } 9010 9011 if (ql2xmqsupport || ql2xnvmeenable) { 9012 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 9013 if (qpair == NULL) { 9014 ql_log(ql_log_warn, vha, 0x0182, 9015 "Failed to allocate memory for queue pair.\n"); 9016 return NULL; 9017 } 9018 9019 qpair->hw = vha->hw; 9020 qpair->vha = vha; 9021 qpair->qp_lock_ptr = &qpair->qp_lock; 9022 spin_lock_init(&qpair->qp_lock); 9023 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 9024 9025 /* Assign available que pair id */ 9026 mutex_lock(&ha->mq_lock); 9027 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 9028 if (ha->num_qpairs >= ha->max_qpairs) { 9029 mutex_unlock(&ha->mq_lock); 9030 ql_log(ql_log_warn, vha, 0x0183, 9031 "No resources to create additional q pair.\n"); 9032 goto fail_qid_map; 9033 } 9034 ha->num_qpairs++; 9035 set_bit(qpair_id, ha->qpair_qid_map); 9036 ha->queue_pair_map[qpair_id] = qpair; 9037 qpair->id = qpair_id; 9038 qpair->vp_idx = vp_idx; 9039 qpair->fw_started = ha->flags.fw_started; 9040 INIT_LIST_HEAD(&qpair->hints_list); 9041 qpair->chip_reset = ha->base_qpair->chip_reset; 9042 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 9043 qpair->enable_explicit_conf = 9044 ha->base_qpair->enable_explicit_conf; 9045 9046 for (i = 0; i < ha->msix_count; i++) { 9047 msix = &ha->msix_entries[i]; 9048 if (msix->in_use) 9049 continue; 9050 qpair->msix = msix; 9051 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 9052 "Vector %x selected for qpair\n", msix->vector); 9053 break; 9054 } 9055 if (!qpair->msix) { 9056 ql_log(ql_log_warn, vha, 0x0184, 9057 "Out of MSI-X vectors!.\n"); 9058 goto fail_msix; 9059 } 9060 9061 qpair->msix->in_use = 1; 9062 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 9063 qpair->pdev = ha->pdev; 9064 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 9065 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 9066 9067 mutex_unlock(&ha->mq_lock); 9068 9069 /* Create response queue first */ 9070 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 9071 if (!rsp_id) { 9072 ql_log(ql_log_warn, vha, 0x0185, 9073 "Failed to create response queue.\n"); 9074 goto fail_rsp; 9075 } 9076 9077 qpair->rsp = ha->rsp_q_map[rsp_id]; 9078 9079 /* Create request queue */ 9080 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 9081 startqp); 9082 if (!req_id) { 9083 ql_log(ql_log_warn, vha, 0x0186, 9084 "Failed to create request queue.\n"); 9085 goto fail_req; 9086 } 9087 9088 qpair->req = ha->req_q_map[req_id]; 9089 qpair->rsp->req = qpair->req; 9090 qpair->rsp->qpair = qpair; 9091 /* init qpair to this cpu. Will adjust at run time. */ 9092 qla_cpu_update(qpair, smp_processor_id()); 9093 9094 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 9095 if (ha->fw_attributes & BIT_4) 9096 qpair->difdix_supported = 1; 9097 } 9098 9099 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 9100 if (!qpair->srb_mempool) { 9101 ql_log(ql_log_warn, vha, 0xd036, 9102 "Failed to create srb mempool for qpair %d\n", 9103 qpair->id); 9104 goto fail_mempool; 9105 } 9106 9107 /* Mark as online */ 9108 qpair->online = 1; 9109 9110 if (!vha->flags.qpairs_available) 9111 vha->flags.qpairs_available = 1; 9112 9113 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 9114 "Request/Response queue pair created, id %d\n", 9115 qpair->id); 9116 ql_dbg(ql_dbg_init, vha, 0x0187, 9117 "Request/Response queue pair created, id %d\n", 9118 qpair->id); 9119 } 9120 return qpair; 9121 9122 fail_mempool: 9123 fail_req: 9124 qla25xx_delete_rsp_que(vha, qpair->rsp); 9125 fail_rsp: 9126 mutex_lock(&ha->mq_lock); 9127 qpair->msix->in_use = 0; 9128 list_del(&qpair->qp_list_elem); 9129 if (list_empty(&vha->qp_list)) 9130 vha->flags.qpairs_available = 0; 9131 fail_msix: 9132 ha->queue_pair_map[qpair_id] = NULL; 9133 clear_bit(qpair_id, ha->qpair_qid_map); 9134 ha->num_qpairs--; 9135 mutex_unlock(&ha->mq_lock); 9136 fail_qid_map: 9137 kfree(qpair); 9138 return NULL; 9139 } 9140 9141 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9142 { 9143 int ret = QLA_FUNCTION_FAILED; 9144 struct qla_hw_data *ha = qpair->hw; 9145 9146 qpair->delete_in_progress = 1; 9147 9148 ret = qla25xx_delete_req_que(vha, qpair->req); 9149 if (ret != QLA_SUCCESS) 9150 goto fail; 9151 9152 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9153 if (ret != QLA_SUCCESS) 9154 goto fail; 9155 9156 mutex_lock(&ha->mq_lock); 9157 ha->queue_pair_map[qpair->id] = NULL; 9158 clear_bit(qpair->id, ha->qpair_qid_map); 9159 ha->num_qpairs--; 9160 list_del(&qpair->qp_list_elem); 9161 if (list_empty(&vha->qp_list)) { 9162 vha->flags.qpairs_available = 0; 9163 vha->flags.qpairs_req_created = 0; 9164 vha->flags.qpairs_rsp_created = 0; 9165 } 9166 mempool_destroy(qpair->srb_mempool); 9167 kfree(qpair); 9168 mutex_unlock(&ha->mq_lock); 9169 9170 return QLA_SUCCESS; 9171 fail: 9172 return ret; 9173 } 9174