1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 struct req_que *req; 54 unsigned long flags; 55 struct qla_hw_data *ha = sp->vha->hw; 56 57 WARN_ON_ONCE(irqs_disabled()); 58 spin_lock_irqsave(&ha->hardware_lock, flags); 59 req = sp->qpair->req; 60 req->outstanding_cmds[sp->handle] = NULL; 61 iocb = &sp->u.iocb_cmd; 62 spin_unlock_irqrestore(&ha->hardware_lock, flags); 63 iocb->timeout(sp); 64 } 65 66 void 67 qla2x00_sp_free(void *ptr) 68 { 69 srb_t *sp = ptr; 70 struct srb_iocb *iocb = &sp->u.iocb_cmd; 71 72 del_timer(&iocb->timer); 73 qla2x00_rel_sp(sp); 74 } 75 76 /* Asynchronous Login/Logout Routines -------------------------------------- */ 77 78 unsigned long 79 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 80 { 81 unsigned long tmo; 82 struct qla_hw_data *ha = vha->hw; 83 84 /* Firmware should use switch negotiated r_a_tov for timeout. */ 85 tmo = ha->r_a_tov / 10 * 2; 86 if (IS_QLAFX00(ha)) { 87 tmo = FX00_DEF_RATOV * 2; 88 } else if (!IS_FWI2_CAPABLE(ha)) { 89 /* 90 * Except for earlier ISPs where the timeout is seeded from the 91 * initialization control block. 92 */ 93 tmo = ha->login_timeout; 94 } 95 return tmo; 96 } 97 98 void 99 qla2x00_async_iocb_timeout(void *data) 100 { 101 srb_t *sp = data; 102 fc_port_t *fcport = sp->fcport; 103 struct srb_iocb *lio = &sp->u.iocb_cmd; 104 int rc, h; 105 unsigned long flags; 106 107 if (fcport) { 108 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 109 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 110 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 111 112 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 113 } else { 114 pr_info("Async-%s timeout - hdl=%x.\n", 115 sp->name, sp->handle); 116 } 117 118 switch (sp->type) { 119 case SRB_LOGIN_CMD: 120 rc = qla24xx_async_abort_cmd(sp, false); 121 if (rc) { 122 /* Retry as needed. */ 123 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 124 lio->u.logio.data[1] = 125 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 126 QLA_LOGIO_LOGIN_RETRIED : 0; 127 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 128 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 129 h++) { 130 if (sp->qpair->req->outstanding_cmds[h] == 131 sp) { 132 sp->qpair->req->outstanding_cmds[h] = 133 NULL; 134 break; 135 } 136 } 137 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 138 sp->done(sp, QLA_FUNCTION_TIMEOUT); 139 } 140 break; 141 case SRB_LOGOUT_CMD: 142 case SRB_CT_PTHRU_CMD: 143 case SRB_MB_IOCB: 144 case SRB_NACK_PLOGI: 145 case SRB_NACK_PRLI: 146 case SRB_NACK_LOGO: 147 case SRB_CTRL_VP: 148 rc = qla24xx_async_abort_cmd(sp, false); 149 if (rc) { 150 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 151 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 152 h++) { 153 if (sp->qpair->req->outstanding_cmds[h] == 154 sp) { 155 sp->qpair->req->outstanding_cmds[h] = 156 NULL; 157 break; 158 } 159 } 160 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 161 sp->done(sp, QLA_FUNCTION_TIMEOUT); 162 } 163 break; 164 } 165 } 166 167 static void 168 qla2x00_async_login_sp_done(void *ptr, int res) 169 { 170 srb_t *sp = ptr; 171 struct scsi_qla_host *vha = sp->vha; 172 struct srb_iocb *lio = &sp->u.iocb_cmd; 173 struct event_arg ea; 174 175 ql_dbg(ql_dbg_disc, vha, 0x20dd, 176 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 177 178 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 179 180 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 181 memset(&ea, 0, sizeof(ea)); 182 ea.event = FCME_PLOGI_DONE; 183 ea.fcport = sp->fcport; 184 ea.data[0] = lio->u.logio.data[0]; 185 ea.data[1] = lio->u.logio.data[1]; 186 ea.iop[0] = lio->u.logio.iop[0]; 187 ea.iop[1] = lio->u.logio.iop[1]; 188 ea.sp = sp; 189 qla2x00_fcport_event_handler(vha, &ea); 190 } 191 192 sp->free(sp); 193 } 194 195 static inline bool 196 fcport_is_smaller(fc_port_t *fcport) 197 { 198 if (wwn_to_u64(fcport->port_name) < 199 wwn_to_u64(fcport->vha->port_name)) 200 return true; 201 else 202 return false; 203 } 204 205 static inline bool 206 fcport_is_bigger(fc_port_t *fcport) 207 { 208 return !fcport_is_smaller(fcport); 209 } 210 211 int 212 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 213 uint16_t *data) 214 { 215 srb_t *sp; 216 struct srb_iocb *lio; 217 int rval = QLA_FUNCTION_FAILED; 218 219 if (!vha->flags.online) 220 goto done; 221 222 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 223 if (!sp) 224 goto done; 225 226 fcport->flags |= FCF_ASYNC_SENT; 227 fcport->logout_completed = 0; 228 229 fcport->disc_state = DSC_LOGIN_PEND; 230 sp->type = SRB_LOGIN_CMD; 231 sp->name = "login"; 232 sp->gen1 = fcport->rscn_gen; 233 sp->gen2 = fcport->login_gen; 234 235 lio = &sp->u.iocb_cmd; 236 lio->timeout = qla2x00_async_iocb_timeout; 237 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 238 239 sp->done = qla2x00_async_login_sp_done; 240 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) { 241 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 242 } else { 243 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 244 245 if (fcport->fc4f_nvme) 246 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 247 248 } 249 250 ql_dbg(ql_dbg_disc, vha, 0x2072, 251 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 252 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 253 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 254 fcport->login_retry); 255 256 rval = qla2x00_start_sp(sp); 257 if (rval != QLA_SUCCESS) { 258 fcport->flags |= FCF_LOGIN_NEEDED; 259 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 260 goto done_free_sp; 261 } 262 263 return rval; 264 265 done_free_sp: 266 sp->free(sp); 267 fcport->flags &= ~FCF_ASYNC_SENT; 268 done: 269 fcport->flags &= ~FCF_ASYNC_ACTIVE; 270 return rval; 271 } 272 273 static void 274 qla2x00_async_logout_sp_done(void *ptr, int res) 275 { 276 srb_t *sp = ptr; 277 278 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 279 sp->fcport->login_gen++; 280 qlt_logo_completion_handler(sp->fcport, res); 281 sp->free(sp); 282 } 283 284 int 285 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 286 { 287 srb_t *sp; 288 struct srb_iocb *lio; 289 int rval = QLA_FUNCTION_FAILED; 290 291 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 292 return rval; 293 294 fcport->flags |= FCF_ASYNC_SENT; 295 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 296 if (!sp) 297 goto done; 298 299 sp->type = SRB_LOGOUT_CMD; 300 sp->name = "logout"; 301 302 lio = &sp->u.iocb_cmd; 303 lio->timeout = qla2x00_async_iocb_timeout; 304 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 305 306 sp->done = qla2x00_async_logout_sp_done; 307 308 ql_dbg(ql_dbg_disc, vha, 0x2070, 309 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 310 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 311 fcport->d_id.b.area, fcport->d_id.b.al_pa, 312 fcport->port_name); 313 314 rval = qla2x00_start_sp(sp); 315 if (rval != QLA_SUCCESS) 316 goto done_free_sp; 317 return rval; 318 319 done_free_sp: 320 sp->free(sp); 321 done: 322 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 323 return rval; 324 } 325 326 void 327 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 328 uint16_t *data) 329 { 330 fcport->flags &= ~FCF_ASYNC_ACTIVE; 331 /* Don't re-login in target mode */ 332 if (!fcport->tgt_session) 333 qla2x00_mark_device_lost(vha, fcport, 1, 0); 334 qlt_logo_completion_handler(fcport, data[0]); 335 } 336 337 static void 338 qla2x00_async_prlo_sp_done(void *s, int res) 339 { 340 srb_t *sp = (srb_t *)s; 341 struct srb_iocb *lio = &sp->u.iocb_cmd; 342 struct scsi_qla_host *vha = sp->vha; 343 344 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 345 if (!test_bit(UNLOADING, &vha->dpc_flags)) 346 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 347 lio->u.logio.data); 348 sp->free(sp); 349 } 350 351 int 352 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 353 { 354 srb_t *sp; 355 struct srb_iocb *lio; 356 int rval; 357 358 rval = QLA_FUNCTION_FAILED; 359 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 360 if (!sp) 361 goto done; 362 363 sp->type = SRB_PRLO_CMD; 364 sp->name = "prlo"; 365 366 lio = &sp->u.iocb_cmd; 367 lio->timeout = qla2x00_async_iocb_timeout; 368 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 369 370 sp->done = qla2x00_async_prlo_sp_done; 371 rval = qla2x00_start_sp(sp); 372 if (rval != QLA_SUCCESS) 373 goto done_free_sp; 374 375 ql_dbg(ql_dbg_disc, vha, 0x2070, 376 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 377 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 378 fcport->d_id.b.area, fcport->d_id.b.al_pa); 379 return rval; 380 381 done_free_sp: 382 sp->free(sp); 383 done: 384 fcport->flags &= ~FCF_ASYNC_ACTIVE; 385 return rval; 386 } 387 388 static 389 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 390 { 391 struct fc_port *fcport = ea->fcport; 392 393 ql_dbg(ql_dbg_disc, vha, 0x20d2, 394 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 395 __func__, fcport->port_name, fcport->disc_state, 396 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 397 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 398 399 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 400 ql_dbg(ql_dbg_disc, vha, 0x2066, 401 "%s %8phC: adisc fail: post delete\n", 402 __func__, ea->fcport->port_name); 403 /* deleted = 0 & logout_on_delete = force fw cleanup */ 404 fcport->deleted = 0; 405 fcport->logout_on_delete = 1; 406 qlt_schedule_sess_for_deletion(ea->fcport); 407 return; 408 } 409 410 if (ea->fcport->disc_state == DSC_DELETE_PEND) 411 return; 412 413 if (ea->sp->gen2 != ea->fcport->login_gen) { 414 /* target side must have changed it. */ 415 ql_dbg(ql_dbg_disc, vha, 0x20d3, 416 "%s %8phC generation changed\n", 417 __func__, ea->fcport->port_name); 418 return; 419 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 420 qla_rscn_replay(fcport); 421 qlt_schedule_sess_for_deletion(fcport); 422 return; 423 } 424 425 __qla24xx_handle_gpdb_event(vha, ea); 426 } 427 428 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 429 { 430 struct qla_work_evt *e; 431 432 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 433 if (!e) 434 return QLA_FUNCTION_FAILED; 435 436 e->u.fcport.fcport = fcport; 437 fcport->flags |= FCF_ASYNC_ACTIVE; 438 return qla2x00_post_work(vha, e); 439 } 440 441 static void 442 qla2x00_async_adisc_sp_done(void *ptr, int res) 443 { 444 srb_t *sp = ptr; 445 struct scsi_qla_host *vha = sp->vha; 446 struct event_arg ea; 447 struct srb_iocb *lio = &sp->u.iocb_cmd; 448 449 ql_dbg(ql_dbg_disc, vha, 0x2066, 450 "Async done-%s res %x %8phC\n", 451 sp->name, res, sp->fcport->port_name); 452 453 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 454 455 memset(&ea, 0, sizeof(ea)); 456 ea.event = FCME_ADISC_DONE; 457 ea.rc = res; 458 ea.data[0] = lio->u.logio.data[0]; 459 ea.data[1] = lio->u.logio.data[1]; 460 ea.iop[0] = lio->u.logio.iop[0]; 461 ea.iop[1] = lio->u.logio.iop[1]; 462 ea.fcport = sp->fcport; 463 ea.sp = sp; 464 465 qla2x00_fcport_event_handler(vha, &ea); 466 467 sp->free(sp); 468 } 469 470 int 471 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 472 uint16_t *data) 473 { 474 srb_t *sp; 475 struct srb_iocb *lio; 476 int rval; 477 478 rval = QLA_FUNCTION_FAILED; 479 fcport->flags |= FCF_ASYNC_SENT; 480 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 481 if (!sp) 482 goto done; 483 484 sp->type = SRB_ADISC_CMD; 485 sp->name = "adisc"; 486 487 lio = &sp->u.iocb_cmd; 488 lio->timeout = qla2x00_async_iocb_timeout; 489 sp->gen1 = fcport->rscn_gen; 490 sp->gen2 = fcport->login_gen; 491 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 492 493 sp->done = qla2x00_async_adisc_sp_done; 494 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 495 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 496 497 ql_dbg(ql_dbg_disc, vha, 0x206f, 498 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 499 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 500 501 rval = qla2x00_start_sp(sp); 502 if (rval != QLA_SUCCESS) 503 goto done_free_sp; 504 505 return rval; 506 507 done_free_sp: 508 sp->free(sp); 509 done: 510 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 511 qla2x00_post_async_adisc_work(vha, fcport, data); 512 return rval; 513 } 514 515 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 516 struct event_arg *ea) 517 { 518 fc_port_t *fcport, *conflict_fcport; 519 struct get_name_list_extended *e; 520 u16 i, n, found = 0, loop_id; 521 port_id_t id; 522 u64 wwn; 523 u16 data[2]; 524 u8 current_login_state; 525 526 fcport = ea->fcport; 527 ql_dbg(ql_dbg_disc, vha, 0xffff, 528 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 529 __func__, fcport->port_name, fcport->disc_state, 530 fcport->fw_login_state, ea->rc, 531 fcport->login_gen, fcport->last_login_gen, 532 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 533 534 if (fcport->disc_state == DSC_DELETE_PEND) 535 return; 536 537 if (ea->rc) { /* rval */ 538 if (fcport->login_retry == 0) { 539 ql_dbg(ql_dbg_disc, vha, 0x20de, 540 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 541 fcport->port_name, fcport->login_retry); 542 } 543 return; 544 } 545 546 if (fcport->last_rscn_gen != fcport->rscn_gen) { 547 qla_rscn_replay(fcport); 548 qlt_schedule_sess_for_deletion(fcport); 549 return; 550 } else if (fcport->last_login_gen != fcport->login_gen) { 551 ql_dbg(ql_dbg_disc, vha, 0x20e0, 552 "%s %8phC login gen changed\n", 553 __func__, fcport->port_name); 554 return; 555 } 556 557 n = ea->data[0] / sizeof(struct get_name_list_extended); 558 559 ql_dbg(ql_dbg_disc, vha, 0x20e1, 560 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 561 __func__, __LINE__, fcport->port_name, n, 562 fcport->d_id.b.domain, fcport->d_id.b.area, 563 fcport->d_id.b.al_pa, fcport->loop_id); 564 565 for (i = 0; i < n; i++) { 566 e = &vha->gnl.l[i]; 567 wwn = wwn_to_u64(e->port_name); 568 id.b.domain = e->port_id[2]; 569 id.b.area = e->port_id[1]; 570 id.b.al_pa = e->port_id[0]; 571 id.b.rsvd_1 = 0; 572 573 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 574 continue; 575 576 if (IS_SW_RESV_ADDR(id)) 577 continue; 578 579 found = 1; 580 581 loop_id = le16_to_cpu(e->nport_handle); 582 loop_id = (loop_id & 0x7fff); 583 if (fcport->fc4f_nvme) 584 current_login_state = e->current_login_state >> 4; 585 else 586 current_login_state = e->current_login_state & 0xf; 587 588 589 ql_dbg(ql_dbg_disc, vha, 0x20e2, 590 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 591 __func__, fcport->port_name, 592 e->current_login_state, fcport->fw_login_state, 593 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa, 594 fcport->d_id.b.domain, fcport->d_id.b.area, 595 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 596 597 switch (fcport->disc_state) { 598 case DSC_DELETE_PEND: 599 case DSC_DELETED: 600 break; 601 default: 602 if ((id.b24 != fcport->d_id.b24 && 603 fcport->d_id.b24) || 604 (fcport->loop_id != FC_NO_LOOP_ID && 605 fcport->loop_id != loop_id)) { 606 ql_dbg(ql_dbg_disc, vha, 0x20e3, 607 "%s %d %8phC post del sess\n", 608 __func__, __LINE__, fcport->port_name); 609 qlt_schedule_sess_for_deletion(fcport); 610 return; 611 } 612 break; 613 } 614 615 fcport->loop_id = loop_id; 616 617 wwn = wwn_to_u64(fcport->port_name); 618 qlt_find_sess_invalidate_other(vha, wwn, 619 id, loop_id, &conflict_fcport); 620 621 if (conflict_fcport) { 622 /* 623 * Another share fcport share the same loop_id & 624 * nport id. Conflict fcport needs to finish 625 * cleanup before this fcport can proceed to login. 626 */ 627 conflict_fcport->conflict = fcport; 628 fcport->login_pause = 1; 629 } 630 631 switch (vha->hw->current_topology) { 632 default: 633 switch (current_login_state) { 634 case DSC_LS_PRLI_COMP: 635 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 636 vha, 0x20e4, "%s %d %8phC post gpdb\n", 637 __func__, __LINE__, fcport->port_name); 638 639 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 640 fcport->port_type = FCT_INITIATOR; 641 else 642 fcport->port_type = FCT_TARGET; 643 data[0] = data[1] = 0; 644 qla2x00_post_async_adisc_work(vha, fcport, 645 data); 646 break; 647 case DSC_LS_PORT_UNAVAIL: 648 default: 649 if (fcport->loop_id != FC_NO_LOOP_ID) 650 qla2x00_clear_loop_id(fcport); 651 652 fcport->loop_id = loop_id; 653 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 654 qla24xx_fcport_handle_login(vha, fcport); 655 break; 656 } 657 break; 658 case ISP_CFG_N: 659 fcport->fw_login_state = current_login_state; 660 fcport->d_id = id; 661 switch (current_login_state) { 662 case DSC_LS_PRLI_COMP: 663 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 664 fcport->port_type = FCT_INITIATOR; 665 else 666 fcport->port_type = FCT_TARGET; 667 668 data[0] = data[1] = 0; 669 qla2x00_post_async_adisc_work(vha, fcport, 670 data); 671 break; 672 case DSC_LS_PLOGI_COMP: 673 if (fcport_is_bigger(fcport)) { 674 /* local adapter is smaller */ 675 if (fcport->loop_id != FC_NO_LOOP_ID) 676 qla2x00_clear_loop_id(fcport); 677 678 fcport->loop_id = loop_id; 679 qla24xx_fcport_handle_login(vha, 680 fcport); 681 break; 682 } 683 /* fall through */ 684 default: 685 if (fcport_is_smaller(fcport)) { 686 /* local adapter is bigger */ 687 if (fcport->loop_id != FC_NO_LOOP_ID) 688 qla2x00_clear_loop_id(fcport); 689 690 fcport->loop_id = loop_id; 691 qla24xx_fcport_handle_login(vha, 692 fcport); 693 } 694 break; 695 } 696 break; 697 } /* switch (ha->current_topology) */ 698 } 699 700 if (!found) { 701 switch (vha->hw->current_topology) { 702 case ISP_CFG_F: 703 case ISP_CFG_FL: 704 for (i = 0; i < n; i++) { 705 e = &vha->gnl.l[i]; 706 id.b.domain = e->port_id[0]; 707 id.b.area = e->port_id[1]; 708 id.b.al_pa = e->port_id[2]; 709 id.b.rsvd_1 = 0; 710 loop_id = le16_to_cpu(e->nport_handle); 711 712 if (fcport->d_id.b24 == id.b24) { 713 conflict_fcport = 714 qla2x00_find_fcport_by_wwpn(vha, 715 e->port_name, 0); 716 if (conflict_fcport) { 717 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 718 vha, 0x20e5, 719 "%s %d %8phC post del sess\n", 720 __func__, __LINE__, 721 conflict_fcport->port_name); 722 qlt_schedule_sess_for_deletion 723 (conflict_fcport); 724 } 725 } 726 /* 727 * FW already picked this loop id for 728 * another fcport 729 */ 730 if (fcport->loop_id == loop_id) 731 fcport->loop_id = FC_NO_LOOP_ID; 732 } 733 qla24xx_fcport_handle_login(vha, fcport); 734 break; 735 case ISP_CFG_N: 736 fcport->disc_state = DSC_DELETED; 737 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 738 if (fcport->n2n_link_reset_cnt < 2) { 739 fcport->n2n_link_reset_cnt++; 740 /* 741 * remote port is not sending PLOGI. 742 * Reset link to kick start his state 743 * machine 744 */ 745 set_bit(N2N_LINK_RESET, 746 &vha->dpc_flags); 747 } else { 748 if (fcport->n2n_chip_reset < 1) { 749 ql_log(ql_log_info, vha, 0x705d, 750 "Chip reset to bring laser down"); 751 set_bit(ISP_ABORT_NEEDED, 752 &vha->dpc_flags); 753 fcport->n2n_chip_reset++; 754 } else { 755 ql_log(ql_log_info, vha, 0x705d, 756 "Remote port %8ph is not coming back\n", 757 fcport->port_name); 758 fcport->scan_state = 0; 759 } 760 } 761 qla2xxx_wake_dpc(vha); 762 } else { 763 /* 764 * report port suppose to do PLOGI. Give him 765 * more time. FW will catch it. 766 */ 767 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 768 } 769 break; 770 default: 771 break; 772 } 773 } 774 } /* gnl_event */ 775 776 static void 777 qla24xx_async_gnl_sp_done(void *s, int res) 778 { 779 struct srb *sp = s; 780 struct scsi_qla_host *vha = sp->vha; 781 unsigned long flags; 782 struct fc_port *fcport = NULL, *tf; 783 u16 i, n = 0, loop_id; 784 struct event_arg ea; 785 struct get_name_list_extended *e; 786 u64 wwn; 787 struct list_head h; 788 bool found = false; 789 790 ql_dbg(ql_dbg_disc, vha, 0x20e7, 791 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 792 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 793 sp->u.iocb_cmd.u.mbx.in_mb[2]); 794 795 if (res == QLA_FUNCTION_TIMEOUT) 796 return; 797 798 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 799 memset(&ea, 0, sizeof(ea)); 800 ea.sp = sp; 801 ea.rc = res; 802 ea.event = FCME_GNL_DONE; 803 804 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 805 sizeof(struct get_name_list_extended)) { 806 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 807 sizeof(struct get_name_list_extended); 808 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 809 } 810 811 for (i = 0; i < n; i++) { 812 e = &vha->gnl.l[i]; 813 loop_id = le16_to_cpu(e->nport_handle); 814 /* mask out reserve bit */ 815 loop_id = (loop_id & 0x7fff); 816 set_bit(loop_id, vha->hw->loop_id_map); 817 wwn = wwn_to_u64(e->port_name); 818 819 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 820 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 821 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 822 e->port_id[0], e->current_login_state, e->last_login_state, 823 (loop_id & 0x7fff)); 824 } 825 826 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 827 828 INIT_LIST_HEAD(&h); 829 fcport = tf = NULL; 830 if (!list_empty(&vha->gnl.fcports)) 831 list_splice_init(&vha->gnl.fcports, &h); 832 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 833 834 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 835 list_del_init(&fcport->gnl_entry); 836 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 837 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 838 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 839 ea.fcport = fcport; 840 841 qla2x00_fcport_event_handler(vha, &ea); 842 } 843 844 /* create new fcport if fw has knowledge of new sessions */ 845 for (i = 0; i < n; i++) { 846 port_id_t id; 847 u64 wwnn; 848 849 e = &vha->gnl.l[i]; 850 wwn = wwn_to_u64(e->port_name); 851 852 found = false; 853 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 854 if (!memcmp((u8 *)&wwn, fcport->port_name, 855 WWN_SIZE)) { 856 found = true; 857 break; 858 } 859 } 860 861 id.b.domain = e->port_id[2]; 862 id.b.area = e->port_id[1]; 863 id.b.al_pa = e->port_id[0]; 864 id.b.rsvd_1 = 0; 865 866 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 867 ql_dbg(ql_dbg_disc, vha, 0x2065, 868 "%s %d %8phC %06x post new sess\n", 869 __func__, __LINE__, (u8 *)&wwn, id.b24); 870 wwnn = wwn_to_u64(e->node_name); 871 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 872 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 873 } 874 } 875 876 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 877 vha->gnl.sent = 0; 878 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 879 880 sp->free(sp); 881 } 882 883 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 884 { 885 srb_t *sp; 886 struct srb_iocb *mbx; 887 int rval = QLA_FUNCTION_FAILED; 888 unsigned long flags; 889 u16 *mb; 890 891 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 892 return rval; 893 894 ql_dbg(ql_dbg_disc, vha, 0x20d9, 895 "Async-gnlist WWPN %8phC \n", fcport->port_name); 896 897 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 898 fcport->flags |= FCF_ASYNC_SENT; 899 fcport->disc_state = DSC_GNL; 900 fcport->last_rscn_gen = fcport->rscn_gen; 901 fcport->last_login_gen = fcport->login_gen; 902 903 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 904 if (vha->gnl.sent) { 905 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 906 return QLA_SUCCESS; 907 } 908 vha->gnl.sent = 1; 909 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 910 911 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 912 if (!sp) 913 goto done; 914 915 sp->type = SRB_MB_IOCB; 916 sp->name = "gnlist"; 917 sp->gen1 = fcport->rscn_gen; 918 sp->gen2 = fcport->login_gen; 919 920 mbx = &sp->u.iocb_cmd; 921 mbx->timeout = qla2x00_async_iocb_timeout; 922 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 923 924 mb = sp->u.iocb_cmd.u.mbx.out_mb; 925 mb[0] = MBC_PORT_NODE_NAME_LIST; 926 mb[1] = BIT_2 | BIT_3; 927 mb[2] = MSW(vha->gnl.ldma); 928 mb[3] = LSW(vha->gnl.ldma); 929 mb[6] = MSW(MSD(vha->gnl.ldma)); 930 mb[7] = LSW(MSD(vha->gnl.ldma)); 931 mb[8] = vha->gnl.size; 932 mb[9] = vha->vp_idx; 933 934 sp->done = qla24xx_async_gnl_sp_done; 935 936 rval = qla2x00_start_sp(sp); 937 if (rval != QLA_SUCCESS) 938 goto done_free_sp; 939 940 ql_dbg(ql_dbg_disc, vha, 0x20da, 941 "Async-%s - OUT WWPN %8phC hndl %x\n", 942 sp->name, fcport->port_name, sp->handle); 943 944 return rval; 945 946 done_free_sp: 947 sp->free(sp); 948 fcport->flags &= ~FCF_ASYNC_SENT; 949 done: 950 return rval; 951 } 952 953 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 954 { 955 struct qla_work_evt *e; 956 957 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 958 if (!e) 959 return QLA_FUNCTION_FAILED; 960 961 e->u.fcport.fcport = fcport; 962 fcport->flags |= FCF_ASYNC_ACTIVE; 963 return qla2x00_post_work(vha, e); 964 } 965 966 static 967 void qla24xx_async_gpdb_sp_done(void *s, int res) 968 { 969 struct srb *sp = s; 970 struct scsi_qla_host *vha = sp->vha; 971 struct qla_hw_data *ha = vha->hw; 972 fc_port_t *fcport = sp->fcport; 973 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 974 struct event_arg ea; 975 976 ql_dbg(ql_dbg_disc, vha, 0x20db, 977 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 978 sp->name, res, fcport->port_name, mb[1], mb[2]); 979 980 if (res == QLA_FUNCTION_TIMEOUT) { 981 dma_pool_free(sp->vha->hw->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 982 sp->u.iocb_cmd.u.mbx.in_dma); 983 return; 984 } 985 986 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 987 memset(&ea, 0, sizeof(ea)); 988 ea.event = FCME_GPDB_DONE; 989 ea.fcport = fcport; 990 ea.sp = sp; 991 992 qla2x00_fcport_event_handler(vha, &ea); 993 994 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 995 sp->u.iocb_cmd.u.mbx.in_dma); 996 997 sp->free(sp); 998 } 999 1000 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1001 { 1002 struct qla_work_evt *e; 1003 1004 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1005 if (!e) 1006 return QLA_FUNCTION_FAILED; 1007 1008 e->u.fcport.fcport = fcport; 1009 1010 return qla2x00_post_work(vha, e); 1011 } 1012 1013 static void 1014 qla2x00_async_prli_sp_done(void *ptr, int res) 1015 { 1016 srb_t *sp = ptr; 1017 struct scsi_qla_host *vha = sp->vha; 1018 struct srb_iocb *lio = &sp->u.iocb_cmd; 1019 struct event_arg ea; 1020 1021 ql_dbg(ql_dbg_disc, vha, 0x2129, 1022 "%s %8phC res %d \n", __func__, 1023 sp->fcport->port_name, res); 1024 1025 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1026 1027 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1028 memset(&ea, 0, sizeof(ea)); 1029 ea.event = FCME_PRLI_DONE; 1030 ea.fcport = sp->fcport; 1031 ea.data[0] = lio->u.logio.data[0]; 1032 ea.data[1] = lio->u.logio.data[1]; 1033 ea.iop[0] = lio->u.logio.iop[0]; 1034 ea.iop[1] = lio->u.logio.iop[1]; 1035 ea.sp = sp; 1036 1037 qla2x00_fcport_event_handler(vha, &ea); 1038 } 1039 1040 sp->free(sp); 1041 } 1042 1043 int 1044 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1045 { 1046 srb_t *sp; 1047 struct srb_iocb *lio; 1048 int rval = QLA_FUNCTION_FAILED; 1049 1050 if (!vha->flags.online) 1051 return rval; 1052 1053 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1054 fcport->fw_login_state == DSC_LS_PRLI_PEND) 1055 return rval; 1056 1057 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1058 if (!sp) 1059 return rval; 1060 1061 fcport->flags |= FCF_ASYNC_SENT; 1062 fcport->logout_completed = 0; 1063 1064 sp->type = SRB_PRLI_CMD; 1065 sp->name = "prli"; 1066 1067 lio = &sp->u.iocb_cmd; 1068 lio->timeout = qla2x00_async_iocb_timeout; 1069 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1070 1071 sp->done = qla2x00_async_prli_sp_done; 1072 lio->u.logio.flags = 0; 1073 1074 if (fcport->fc4f_nvme) 1075 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1076 1077 rval = qla2x00_start_sp(sp); 1078 if (rval != QLA_SUCCESS) { 1079 fcport->flags |= FCF_LOGIN_NEEDED; 1080 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1081 goto done_free_sp; 1082 } 1083 1084 ql_dbg(ql_dbg_disc, vha, 0x211b, 1085 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 1086 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1087 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc"); 1088 1089 return rval; 1090 1091 done_free_sp: 1092 sp->free(sp); 1093 fcport->flags &= ~FCF_ASYNC_SENT; 1094 return rval; 1095 } 1096 1097 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1098 { 1099 struct qla_work_evt *e; 1100 1101 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1102 if (!e) 1103 return QLA_FUNCTION_FAILED; 1104 1105 e->u.fcport.fcport = fcport; 1106 e->u.fcport.opt = opt; 1107 fcport->flags |= FCF_ASYNC_ACTIVE; 1108 return qla2x00_post_work(vha, e); 1109 } 1110 1111 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1112 { 1113 srb_t *sp; 1114 struct srb_iocb *mbx; 1115 int rval = QLA_FUNCTION_FAILED; 1116 u16 *mb; 1117 dma_addr_t pd_dma; 1118 struct port_database_24xx *pd; 1119 struct qla_hw_data *ha = vha->hw; 1120 1121 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1122 return rval; 1123 1124 fcport->disc_state = DSC_GPDB; 1125 1126 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1127 if (!sp) 1128 goto done; 1129 1130 fcport->flags |= FCF_ASYNC_SENT; 1131 sp->type = SRB_MB_IOCB; 1132 sp->name = "gpdb"; 1133 sp->gen1 = fcport->rscn_gen; 1134 sp->gen2 = fcport->login_gen; 1135 1136 mbx = &sp->u.iocb_cmd; 1137 mbx->timeout = qla2x00_async_iocb_timeout; 1138 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1139 1140 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1141 if (pd == NULL) { 1142 ql_log(ql_log_warn, vha, 0xd043, 1143 "Failed to allocate port database structure.\n"); 1144 goto done_free_sp; 1145 } 1146 1147 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1148 mb[0] = MBC_GET_PORT_DATABASE; 1149 mb[1] = fcport->loop_id; 1150 mb[2] = MSW(pd_dma); 1151 mb[3] = LSW(pd_dma); 1152 mb[6] = MSW(MSD(pd_dma)); 1153 mb[7] = LSW(MSD(pd_dma)); 1154 mb[9] = vha->vp_idx; 1155 mb[10] = opt; 1156 1157 mbx->u.mbx.in = (void *)pd; 1158 mbx->u.mbx.in_dma = pd_dma; 1159 1160 sp->done = qla24xx_async_gpdb_sp_done; 1161 1162 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1163 "Async-%s %8phC hndl %x opt %x\n", 1164 sp->name, fcport->port_name, sp->handle, opt); 1165 1166 rval = qla2x00_start_sp(sp); 1167 if (rval != QLA_SUCCESS) 1168 goto done_free_sp; 1169 return rval; 1170 1171 done_free_sp: 1172 if (pd) 1173 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1174 1175 sp->free(sp); 1176 fcport->flags &= ~FCF_ASYNC_SENT; 1177 done: 1178 qla24xx_post_gpdb_work(vha, fcport, opt); 1179 return rval; 1180 } 1181 1182 static 1183 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1184 { 1185 unsigned long flags; 1186 1187 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1188 ea->fcport->login_gen++; 1189 ea->fcport->deleted = 0; 1190 ea->fcport->logout_on_delete = 1; 1191 1192 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1193 vha->fcport_count++; 1194 ea->fcport->login_succ = 1; 1195 1196 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1197 qla24xx_sched_upd_fcport(ea->fcport); 1198 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1199 } else if (ea->fcport->login_succ) { 1200 /* 1201 * We have an existing session. A late RSCN delivery 1202 * must have triggered the session to be re-validate. 1203 * Session is still valid. 1204 */ 1205 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1206 "%s %d %8phC session revalidate success\n", 1207 __func__, __LINE__, ea->fcport->port_name); 1208 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1209 } 1210 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1211 } 1212 1213 static 1214 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1215 { 1216 fc_port_t *fcport = ea->fcport; 1217 struct port_database_24xx *pd; 1218 struct srb *sp = ea->sp; 1219 uint8_t ls; 1220 1221 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1222 1223 fcport->flags &= ~FCF_ASYNC_SENT; 1224 1225 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1226 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name, 1227 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme, 1228 ea->rc); 1229 1230 if (fcport->disc_state == DSC_DELETE_PEND) 1231 return; 1232 1233 if (fcport->fc4f_nvme) 1234 ls = pd->current_login_state >> 4; 1235 else 1236 ls = pd->current_login_state & 0xf; 1237 1238 if (ea->sp->gen2 != fcport->login_gen) { 1239 /* target side must have changed it. */ 1240 1241 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1242 "%s %8phC generation changed\n", 1243 __func__, fcport->port_name); 1244 return; 1245 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1246 qla_rscn_replay(fcport); 1247 qlt_schedule_sess_for_deletion(fcport); 1248 return; 1249 } 1250 1251 switch (ls) { 1252 case PDS_PRLI_COMPLETE: 1253 __qla24xx_parse_gpdb(vha, fcport, pd); 1254 break; 1255 case PDS_PLOGI_PENDING: 1256 case PDS_PLOGI_COMPLETE: 1257 case PDS_PRLI_PENDING: 1258 case PDS_PRLI2_PENDING: 1259 /* Set discovery state back to GNL to Relogin attempt */ 1260 if (qla_dual_mode_enabled(vha) || 1261 qla_ini_mode_enabled(vha)) { 1262 fcport->disc_state = DSC_GNL; 1263 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1264 } 1265 return; 1266 case PDS_LOGO_PENDING: 1267 case PDS_PORT_UNAVAILABLE: 1268 default: 1269 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1270 __func__, __LINE__, fcport->port_name); 1271 qlt_schedule_sess_for_deletion(fcport); 1272 return; 1273 } 1274 __qla24xx_handle_gpdb_event(vha, ea); 1275 } /* gpdb event */ 1276 1277 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1278 { 1279 u8 login = 0; 1280 int rc; 1281 1282 if (qla_tgt_mode_enabled(vha)) 1283 return; 1284 1285 if (qla_dual_mode_enabled(vha)) { 1286 if (N2N_TOPO(vha->hw)) { 1287 u64 mywwn, wwn; 1288 1289 mywwn = wwn_to_u64(vha->port_name); 1290 wwn = wwn_to_u64(fcport->port_name); 1291 if (mywwn > wwn) 1292 login = 1; 1293 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1294 && time_after_eq(jiffies, 1295 fcport->plogi_nack_done_deadline)) 1296 login = 1; 1297 } else { 1298 login = 1; 1299 } 1300 } else { 1301 /* initiator mode */ 1302 login = 1; 1303 } 1304 1305 if (login && fcport->login_retry) { 1306 fcport->login_retry--; 1307 if (fcport->loop_id == FC_NO_LOOP_ID) { 1308 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1309 rc = qla2x00_find_new_loop_id(vha, fcport); 1310 if (rc) { 1311 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1312 "%s %d %8phC post del sess - out of loopid\n", 1313 __func__, __LINE__, fcport->port_name); 1314 fcport->scan_state = 0; 1315 qlt_schedule_sess_for_deletion(fcport); 1316 return; 1317 } 1318 } 1319 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1320 "%s %d %8phC post login\n", 1321 __func__, __LINE__, fcport->port_name); 1322 qla2x00_post_async_login_work(vha, fcport, NULL); 1323 } 1324 } 1325 1326 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1327 { 1328 u16 data[2]; 1329 u64 wwn; 1330 u16 sec; 1331 1332 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8, 1333 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1334 __func__, fcport->port_name, fcport->disc_state, 1335 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1336 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1337 fcport->login_gen, fcport->loop_id, fcport->scan_state); 1338 1339 if (fcport->scan_state != QLA_FCPORT_FOUND) 1340 return 0; 1341 1342 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1343 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1344 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1345 return 0; 1346 1347 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1348 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1349 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1350 return 0; 1351 } 1352 } 1353 1354 /* for pure Target Mode. Login will not be initiated */ 1355 if (vha->host->active_mode == MODE_TARGET) 1356 return 0; 1357 1358 if (fcport->flags & FCF_ASYNC_SENT) { 1359 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1360 return 0; 1361 } 1362 1363 switch (fcport->disc_state) { 1364 case DSC_DELETED: 1365 wwn = wwn_to_u64(fcport->node_name); 1366 switch (vha->hw->current_topology) { 1367 case ISP_CFG_N: 1368 if (fcport_is_smaller(fcport)) { 1369 /* this adapter is bigger */ 1370 if (fcport->login_retry) { 1371 if (fcport->loop_id == FC_NO_LOOP_ID) { 1372 qla2x00_find_new_loop_id(vha, 1373 fcport); 1374 fcport->fw_login_state = 1375 DSC_LS_PORT_UNAVAIL; 1376 } 1377 fcport->login_retry--; 1378 qla_post_els_plogi_work(vha, fcport); 1379 } else { 1380 ql_log(ql_log_info, vha, 0x705d, 1381 "Unable to reach remote port %8phC", 1382 fcport->port_name); 1383 } 1384 } else { 1385 qla24xx_post_gnl_work(vha, fcport); 1386 } 1387 break; 1388 default: 1389 if (wwn == 0) { 1390 ql_dbg(ql_dbg_disc, vha, 0xffff, 1391 "%s %d %8phC post GNNID\n", 1392 __func__, __LINE__, fcport->port_name); 1393 qla24xx_post_gnnid_work(vha, fcport); 1394 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1395 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1396 "%s %d %8phC post gnl\n", 1397 __func__, __LINE__, fcport->port_name); 1398 qla24xx_post_gnl_work(vha, fcport); 1399 } else { 1400 qla_chk_n2n_b4_login(vha, fcport); 1401 } 1402 break; 1403 } 1404 break; 1405 1406 case DSC_GNL: 1407 switch (vha->hw->current_topology) { 1408 case ISP_CFG_N: 1409 if ((fcport->current_login_state & 0xf) == 0x6) { 1410 ql_dbg(ql_dbg_disc, vha, 0x2118, 1411 "%s %d %8phC post GPDB work\n", 1412 __func__, __LINE__, fcport->port_name); 1413 fcport->chip_reset = 1414 vha->hw->base_qpair->chip_reset; 1415 qla24xx_post_gpdb_work(vha, fcport, 0); 1416 } else { 1417 ql_dbg(ql_dbg_disc, vha, 0x2118, 1418 "%s %d %8phC post NVMe PRLI\n", 1419 __func__, __LINE__, fcport->port_name); 1420 qla24xx_post_prli_work(vha, fcport); 1421 } 1422 break; 1423 default: 1424 if (fcport->login_pause) { 1425 fcport->last_rscn_gen = fcport->rscn_gen; 1426 fcport->last_login_gen = fcport->login_gen; 1427 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1428 break; 1429 } 1430 qla_chk_n2n_b4_login(vha, fcport); 1431 break; 1432 } 1433 break; 1434 1435 case DSC_LOGIN_FAILED: 1436 if (N2N_TOPO(vha->hw)) 1437 qla_chk_n2n_b4_login(vha, fcport); 1438 else 1439 qlt_schedule_sess_for_deletion(fcport); 1440 break; 1441 1442 case DSC_LOGIN_COMPLETE: 1443 /* recheck login state */ 1444 data[0] = data[1] = 0; 1445 qla2x00_post_async_adisc_work(vha, fcport, data); 1446 break; 1447 1448 case DSC_LOGIN_PEND: 1449 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1450 qla24xx_post_prli_work(vha, fcport); 1451 break; 1452 1453 case DSC_UPD_FCPORT: 1454 sec = jiffies_to_msecs(jiffies - 1455 fcport->jiffies_at_registration)/1000; 1456 if (fcport->sec_since_registration < sec && sec && 1457 !(sec % 60)) { 1458 fcport->sec_since_registration = sec; 1459 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1460 "%s %8phC - Slow Rport registration(%d Sec)\n", 1461 __func__, fcport->port_name, sec); 1462 } 1463 1464 if (fcport->next_disc_state != DSC_DELETE_PEND) 1465 fcport->next_disc_state = DSC_ADISC; 1466 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1467 break; 1468 1469 default: 1470 break; 1471 } 1472 1473 return 0; 1474 } 1475 1476 static 1477 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1478 { 1479 fcport->rscn_gen++; 1480 1481 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1482 "%s %8phC DS %d LS %d\n", 1483 __func__, fcport->port_name, fcport->disc_state, 1484 fcport->fw_login_state); 1485 1486 if (fcport->flags & FCF_ASYNC_SENT) 1487 return; 1488 1489 switch (fcport->disc_state) { 1490 case DSC_DELETED: 1491 case DSC_LOGIN_COMPLETE: 1492 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1493 break; 1494 default: 1495 break; 1496 } 1497 } 1498 1499 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1500 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1501 { 1502 struct qla_work_evt *e; 1503 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1504 if (!e) 1505 return QLA_FUNCTION_FAILED; 1506 1507 e->u.new_sess.id = *id; 1508 e->u.new_sess.pla = pla; 1509 e->u.new_sess.fc4_type = fc4_type; 1510 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1511 if (node_name) 1512 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1513 1514 return qla2x00_post_work(vha, e); 1515 } 1516 1517 static 1518 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1519 struct event_arg *ea) 1520 { 1521 fc_port_t *fcport = ea->fcport; 1522 1523 ql_dbg(ql_dbg_disc, vha, 0x2102, 1524 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1525 __func__, fcport->port_name, fcport->disc_state, 1526 fcport->fw_login_state, fcport->login_pause, 1527 fcport->deleted, fcport->conflict, 1528 fcport->last_rscn_gen, fcport->rscn_gen, 1529 fcport->last_login_gen, fcport->login_gen, 1530 fcport->flags); 1531 1532 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1533 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1534 return; 1535 1536 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1537 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1538 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1539 return; 1540 } 1541 } 1542 1543 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1544 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1545 __func__, __LINE__, fcport->port_name); 1546 1547 return; 1548 } 1549 1550 qla24xx_fcport_handle_login(vha, fcport); 1551 } 1552 1553 1554 static void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1555 struct event_arg *ea) 1556 { 1557 ql_dbg(ql_dbg_disc, vha, 0x2118, 1558 "%s %d %8phC post PRLI\n", 1559 __func__, __LINE__, ea->fcport->port_name); 1560 qla24xx_post_prli_work(vha, ea->fcport); 1561 } 1562 1563 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1564 { 1565 fc_port_t *f, *tf; 1566 uint32_t id = 0, mask, rid; 1567 fc_port_t *fcport; 1568 1569 switch (ea->event) { 1570 case FCME_RELOGIN: 1571 if (test_bit(UNLOADING, &vha->dpc_flags)) 1572 return; 1573 1574 qla24xx_handle_relogin_event(vha, ea); 1575 break; 1576 case FCME_RSCN: 1577 if (test_bit(UNLOADING, &vha->dpc_flags)) 1578 return; 1579 switch (ea->id.b.rsvd_1) { 1580 case RSCN_PORT_ADDR: 1581 #define BIGSCAN 1 1582 #if defined BIGSCAN & BIGSCAN > 0 1583 { 1584 unsigned long flags; 1585 fcport = qla2x00_find_fcport_by_nportid 1586 (vha, &ea->id, 1); 1587 if (fcport) { 1588 fcport->scan_needed = 1; 1589 fcport->rscn_gen++; 1590 } 1591 1592 spin_lock_irqsave(&vha->work_lock, flags); 1593 if (vha->scan.scan_flags == 0) { 1594 ql_dbg(ql_dbg_disc, vha, 0xffff, 1595 "%s: schedule\n", __func__); 1596 vha->scan.scan_flags |= SF_QUEUED; 1597 schedule_delayed_work(&vha->scan.scan_work, 5); 1598 } 1599 spin_unlock_irqrestore(&vha->work_lock, flags); 1600 } 1601 #else 1602 { 1603 int rc; 1604 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1605 if (!fcport) { 1606 /* cable moved */ 1607 rc = qla24xx_post_gpnid_work(vha, &ea->id); 1608 if (rc) { 1609 ql_log(ql_log_warn, vha, 0xd044, 1610 "RSCN GPNID work failed %06x\n", 1611 ea->id.b24); 1612 } 1613 } else { 1614 ea->fcport = fcport; 1615 fcport->scan_needed = 1; 1616 qla24xx_handle_rscn_event(fcport, ea); 1617 } 1618 } 1619 #endif 1620 break; 1621 case RSCN_AREA_ADDR: 1622 case RSCN_DOM_ADDR: 1623 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1624 mask = 0xffff00; 1625 ql_dbg(ql_dbg_async, vha, 0x5044, 1626 "RSCN: Area 0x%06x was affected\n", 1627 ea->id.b24); 1628 } else { 1629 mask = 0xff0000; 1630 ql_dbg(ql_dbg_async, vha, 0x507a, 1631 "RSCN: Domain 0x%06x was affected\n", 1632 ea->id.b24); 1633 } 1634 1635 rid = ea->id.b24 & mask; 1636 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1637 list) { 1638 id = f->d_id.b24 & mask; 1639 if (rid == id) { 1640 ea->fcport = f; 1641 qla24xx_handle_rscn_event(f, ea); 1642 } 1643 } 1644 break; 1645 case RSCN_FAB_ADDR: 1646 default: 1647 ql_log(ql_log_warn, vha, 0xd045, 1648 "RSCN: Fabric was affected. Addr format %d\n", 1649 ea->id.b.rsvd_1); 1650 qla2x00_mark_all_devices_lost(vha, 1); 1651 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1652 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1653 } 1654 break; 1655 case FCME_GNL_DONE: 1656 qla24xx_handle_gnl_done_event(vha, ea); 1657 break; 1658 case FCME_GPSC_DONE: 1659 qla24xx_handle_gpsc_event(vha, ea); 1660 break; 1661 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1662 qla24xx_handle_plogi_done_event(vha, ea); 1663 break; 1664 case FCME_PRLI_DONE: 1665 qla24xx_handle_prli_done_event(vha, ea); 1666 break; 1667 case FCME_GPDB_DONE: 1668 qla24xx_handle_gpdb_event(vha, ea); 1669 break; 1670 case FCME_GPNID_DONE: 1671 qla24xx_handle_gpnid_event(vha, ea); 1672 break; 1673 case FCME_GFFID_DONE: 1674 qla24xx_handle_gffid_event(vha, ea); 1675 break; 1676 case FCME_ADISC_DONE: 1677 qla24xx_handle_adisc_event(vha, ea); 1678 break; 1679 case FCME_GNNID_DONE: 1680 qla24xx_handle_gnnid_event(vha, ea); 1681 break; 1682 case FCME_GFPNID_DONE: 1683 qla24xx_handle_gfpnid_event(vha, ea); 1684 break; 1685 case FCME_ELS_PLOGI_DONE: 1686 qla_handle_els_plogi_done(vha, ea); 1687 break; 1688 default: 1689 BUG_ON(1); 1690 break; 1691 } 1692 } 1693 1694 /* 1695 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1696 * to be consumed by the fcport 1697 */ 1698 void qla_rscn_replay(fc_port_t *fcport) 1699 { 1700 struct event_arg ea; 1701 1702 switch (fcport->disc_state) { 1703 case DSC_DELETE_PEND: 1704 return; 1705 default: 1706 break; 1707 } 1708 1709 if (fcport->scan_needed) { 1710 memset(&ea, 0, sizeof(ea)); 1711 ea.event = FCME_RSCN; 1712 ea.id = fcport->d_id; 1713 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1714 #if defined BIGSCAN & BIGSCAN > 0 1715 qla2x00_fcport_event_handler(fcport->vha, &ea); 1716 #else 1717 qla24xx_post_gpnid_work(fcport->vha, &ea.id); 1718 #endif 1719 } 1720 } 1721 1722 static void 1723 qla2x00_tmf_iocb_timeout(void *data) 1724 { 1725 srb_t *sp = data; 1726 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1727 1728 tmf->u.tmf.comp_status = CS_TIMEOUT; 1729 complete(&tmf->u.tmf.comp); 1730 } 1731 1732 static void 1733 qla2x00_tmf_sp_done(void *ptr, int res) 1734 { 1735 srb_t *sp = ptr; 1736 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1737 1738 complete(&tmf->u.tmf.comp); 1739 } 1740 1741 int 1742 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1743 uint32_t tag) 1744 { 1745 struct scsi_qla_host *vha = fcport->vha; 1746 struct srb_iocb *tm_iocb; 1747 srb_t *sp; 1748 int rval = QLA_FUNCTION_FAILED; 1749 1750 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1751 if (!sp) 1752 goto done; 1753 1754 tm_iocb = &sp->u.iocb_cmd; 1755 sp->type = SRB_TM_CMD; 1756 sp->name = "tmf"; 1757 1758 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1759 init_completion(&tm_iocb->u.tmf.comp); 1760 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1761 1762 tm_iocb->u.tmf.flags = flags; 1763 tm_iocb->u.tmf.lun = lun; 1764 tm_iocb->u.tmf.data = tag; 1765 sp->done = qla2x00_tmf_sp_done; 1766 1767 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1768 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1769 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1770 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1771 1772 rval = qla2x00_start_sp(sp); 1773 if (rval != QLA_SUCCESS) 1774 goto done_free_sp; 1775 wait_for_completion(&tm_iocb->u.tmf.comp); 1776 1777 rval = tm_iocb->u.tmf.data; 1778 1779 if (rval != QLA_SUCCESS) { 1780 ql_log(ql_log_warn, vha, 0x8030, 1781 "TM IOCB failed (%x).\n", rval); 1782 } 1783 1784 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1785 flags = tm_iocb->u.tmf.flags; 1786 lun = (uint16_t)tm_iocb->u.tmf.lun; 1787 1788 /* Issue Marker IOCB */ 1789 qla2x00_marker(vha, vha->hw->req_q_map[0], 1790 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1791 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1792 } 1793 1794 done_free_sp: 1795 sp->free(sp); 1796 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1797 done: 1798 return rval; 1799 } 1800 1801 static void 1802 qla24xx_abort_iocb_timeout(void *data) 1803 { 1804 srb_t *sp = data; 1805 struct srb_iocb *abt = &sp->u.iocb_cmd; 1806 1807 abt->u.abt.comp_status = CS_TIMEOUT; 1808 sp->done(sp, QLA_FUNCTION_TIMEOUT); 1809 } 1810 1811 static void 1812 qla24xx_abort_sp_done(void *ptr, int res) 1813 { 1814 srb_t *sp = ptr; 1815 struct srb_iocb *abt = &sp->u.iocb_cmd; 1816 1817 if (del_timer(&sp->u.iocb_cmd.timer)) { 1818 if (sp->flags & SRB_WAKEUP_ON_COMP) 1819 complete(&abt->u.abt.comp); 1820 else 1821 sp->free(sp); 1822 } 1823 } 1824 1825 int 1826 qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 1827 { 1828 scsi_qla_host_t *vha = cmd_sp->vha; 1829 struct srb_iocb *abt_iocb; 1830 srb_t *sp; 1831 int rval = QLA_FUNCTION_FAILED; 1832 1833 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 1834 GFP_KERNEL); 1835 if (!sp) 1836 goto done; 1837 1838 abt_iocb = &sp->u.iocb_cmd; 1839 sp->type = SRB_ABT_CMD; 1840 sp->name = "abort"; 1841 sp->qpair = cmd_sp->qpair; 1842 if (wait) 1843 sp->flags = SRB_WAKEUP_ON_COMP; 1844 1845 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1846 init_completion(&abt_iocb->u.abt.comp); 1847 /* FW can send 2 x ABTS's timeout/20s */ 1848 qla2x00_init_timer(sp, 42); 1849 1850 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1851 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 1852 1853 sp->done = qla24xx_abort_sp_done; 1854 1855 ql_dbg(ql_dbg_async, vha, 0x507c, 1856 "Abort command issued - hdl=%x, type=%x\n", 1857 cmd_sp->handle, cmd_sp->type); 1858 1859 rval = qla2x00_start_sp(sp); 1860 if (rval != QLA_SUCCESS) 1861 goto done_free_sp; 1862 1863 if (wait) { 1864 wait_for_completion(&abt_iocb->u.abt.comp); 1865 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1866 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1867 } else { 1868 goto done; 1869 } 1870 1871 done_free_sp: 1872 sp->free(sp); 1873 done: 1874 return rval; 1875 } 1876 1877 int 1878 qla24xx_async_abort_command(srb_t *sp) 1879 { 1880 unsigned long flags = 0; 1881 1882 uint32_t handle; 1883 fc_port_t *fcport = sp->fcport; 1884 struct qla_qpair *qpair = sp->qpair; 1885 struct scsi_qla_host *vha = fcport->vha; 1886 struct req_que *req = qpair->req; 1887 1888 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1889 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1890 if (req->outstanding_cmds[handle] == sp) 1891 break; 1892 } 1893 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1894 1895 if (handle == req->num_outstanding_cmds) { 1896 /* Command not found. */ 1897 return QLA_FUNCTION_FAILED; 1898 } 1899 if (sp->type == SRB_FXIOCB_DCMD) 1900 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1901 FXDISC_ABORT_IOCTL); 1902 1903 return qla24xx_async_abort_cmd(sp, true); 1904 } 1905 1906 static void 1907 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1908 { 1909 switch (ea->data[0]) { 1910 case MBS_COMMAND_COMPLETE: 1911 ql_dbg(ql_dbg_disc, vha, 0x2118, 1912 "%s %d %8phC post gpdb\n", 1913 __func__, __LINE__, ea->fcport->port_name); 1914 1915 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1916 ea->fcport->logout_on_delete = 1; 1917 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1918 break; 1919 default: 1920 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1921 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1922 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1923 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1924 break; 1925 } 1926 1927 if (ea->fcport->n2n_flag) { 1928 ql_dbg(ql_dbg_disc, vha, 0x2118, 1929 "%s %d %8phC post fc4 prli\n", 1930 __func__, __LINE__, ea->fcport->port_name); 1931 ea->fcport->fc4f_nvme = 0; 1932 ea->fcport->n2n_flag = 0; 1933 qla24xx_post_prli_work(vha, ea->fcport); 1934 } 1935 ql_dbg(ql_dbg_disc, vha, 0x2119, 1936 "%s %d %8phC unhandle event of %x\n", 1937 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1938 break; 1939 } 1940 } 1941 1942 static void 1943 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1944 { 1945 port_id_t cid; /* conflict Nport id */ 1946 u16 lid; 1947 struct fc_port *conflict_fcport; 1948 unsigned long flags; 1949 struct fc_port *fcport = ea->fcport; 1950 1951 ql_dbg(ql_dbg_disc, vha, 0xffff, 1952 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1953 __func__, fcport->port_name, fcport->disc_state, 1954 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1955 ea->sp->gen1, fcport->rscn_gen, 1956 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1957 1958 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1959 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1960 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1961 "%s %d %8phC Remote is trying to login\n", 1962 __func__, __LINE__, fcport->port_name); 1963 return; 1964 } 1965 1966 if (fcport->disc_state == DSC_DELETE_PEND) 1967 return; 1968 1969 if (ea->sp->gen2 != fcport->login_gen) { 1970 /* target side must have changed it. */ 1971 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1972 "%s %8phC generation changed\n", 1973 __func__, fcport->port_name); 1974 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1975 return; 1976 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1977 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1978 "%s %8phC RSCN generation changed\n", 1979 __func__, fcport->port_name); 1980 qla_rscn_replay(fcport); 1981 qlt_schedule_sess_for_deletion(fcport); 1982 return; 1983 } 1984 1985 switch (ea->data[0]) { 1986 case MBS_COMMAND_COMPLETE: 1987 /* 1988 * Driver must validate login state - If PRLI not complete, 1989 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1990 * requests. 1991 */ 1992 if (ea->fcport->fc4f_nvme) { 1993 ql_dbg(ql_dbg_disc, vha, 0x2117, 1994 "%s %d %8phC post prli\n", 1995 __func__, __LINE__, ea->fcport->port_name); 1996 qla24xx_post_prli_work(vha, ea->fcport); 1997 } else { 1998 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1999 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 2000 __func__, __LINE__, ea->fcport->port_name, 2001 ea->fcport->loop_id, ea->fcport->d_id.b24); 2002 2003 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2004 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2005 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2006 ea->fcport->logout_on_delete = 1; 2007 ea->fcport->send_els_logo = 0; 2008 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 2009 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2010 2011 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2012 } 2013 break; 2014 case MBS_COMMAND_ERROR: 2015 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2016 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2017 2018 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2019 ea->fcport->disc_state = DSC_LOGIN_FAILED; 2020 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 2021 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2022 else 2023 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 2024 break; 2025 case MBS_LOOP_ID_USED: 2026 /* data[1] = IO PARAM 1 = nport ID */ 2027 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2028 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2029 cid.b.al_pa = ea->iop[1] & 0xff; 2030 cid.b.rsvd_1 = 0; 2031 2032 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2033 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2034 __func__, __LINE__, ea->fcport->port_name, 2035 ea->fcport->loop_id, cid.b24); 2036 2037 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2038 ea->fcport->loop_id = FC_NO_LOOP_ID; 2039 qla24xx_post_gnl_work(vha, ea->fcport); 2040 break; 2041 case MBS_PORT_ID_USED: 2042 lid = ea->iop[1] & 0xffff; 2043 qlt_find_sess_invalidate_other(vha, 2044 wwn_to_u64(ea->fcport->port_name), 2045 ea->fcport->d_id, lid, &conflict_fcport); 2046 2047 if (conflict_fcport) { 2048 /* 2049 * Another fcport share the same loop_id/nport id. 2050 * Conflict fcport needs to finish cleanup before this 2051 * fcport can proceed to login. 2052 */ 2053 conflict_fcport->conflict = ea->fcport; 2054 ea->fcport->login_pause = 1; 2055 2056 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2057 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2058 __func__, __LINE__, ea->fcport->port_name, 2059 ea->fcport->d_id.b24, lid); 2060 } else { 2061 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2062 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2063 __func__, __LINE__, ea->fcport->port_name, 2064 ea->fcport->d_id.b24, lid); 2065 2066 qla2x00_clear_loop_id(ea->fcport); 2067 set_bit(lid, vha->hw->loop_id_map); 2068 ea->fcport->loop_id = lid; 2069 ea->fcport->keep_nport_handle = 0; 2070 qlt_schedule_sess_for_deletion(ea->fcport); 2071 } 2072 break; 2073 } 2074 return; 2075 } 2076 2077 void 2078 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 2079 uint16_t *data) 2080 { 2081 qlt_logo_completion_handler(fcport, data[0]); 2082 fcport->login_gen++; 2083 fcport->flags &= ~FCF_ASYNC_ACTIVE; 2084 return; 2085 } 2086 2087 /****************************************************************************/ 2088 /* QLogic ISP2x00 Hardware Support Functions. */ 2089 /****************************************************************************/ 2090 2091 static int 2092 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2093 { 2094 int rval = QLA_SUCCESS; 2095 struct qla_hw_data *ha = vha->hw; 2096 uint32_t idc_major_ver, idc_minor_ver; 2097 uint16_t config[4]; 2098 2099 qla83xx_idc_lock(vha, 0); 2100 2101 /* SV: TODO: Assign initialization timeout from 2102 * flash-info / other param 2103 */ 2104 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2105 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2106 2107 /* Set our fcoe function presence */ 2108 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2109 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2110 "Error while setting DRV-Presence.\n"); 2111 rval = QLA_FUNCTION_FAILED; 2112 goto exit; 2113 } 2114 2115 /* Decide the reset ownership */ 2116 qla83xx_reset_ownership(vha); 2117 2118 /* 2119 * On first protocol driver load: 2120 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2121 * register. 2122 * Others: Check compatibility with current IDC Major version. 2123 */ 2124 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2125 if (ha->flags.nic_core_reset_owner) { 2126 /* Set IDC Major version */ 2127 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2128 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2129 2130 /* Clearing IDC-Lock-Recovery register */ 2131 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2132 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2133 /* 2134 * Clear further IDC participation if we are not compatible with 2135 * the current IDC Major Version. 2136 */ 2137 ql_log(ql_log_warn, vha, 0xb07d, 2138 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2139 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2140 __qla83xx_clear_drv_presence(vha); 2141 rval = QLA_FUNCTION_FAILED; 2142 goto exit; 2143 } 2144 /* Each function sets its supported Minor version. */ 2145 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2146 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2147 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2148 2149 if (ha->flags.nic_core_reset_owner) { 2150 memset(config, 0, sizeof(config)); 2151 if (!qla81xx_get_port_config(vha, config)) 2152 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2153 QLA8XXX_DEV_READY); 2154 } 2155 2156 rval = qla83xx_idc_state_handler(vha); 2157 2158 exit: 2159 qla83xx_idc_unlock(vha, 0); 2160 2161 return rval; 2162 } 2163 2164 /* 2165 * qla2x00_initialize_adapter 2166 * Initialize board. 2167 * 2168 * Input: 2169 * ha = adapter block pointer. 2170 * 2171 * Returns: 2172 * 0 = success 2173 */ 2174 int 2175 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2176 { 2177 int rval; 2178 struct qla_hw_data *ha = vha->hw; 2179 struct req_que *req = ha->req_q_map[0]; 2180 2181 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2182 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2183 2184 /* Clear adapter flags. */ 2185 vha->flags.online = 0; 2186 ha->flags.chip_reset_done = 0; 2187 vha->flags.reset_active = 0; 2188 ha->flags.pci_channel_io_perm_failure = 0; 2189 ha->flags.eeh_busy = 0; 2190 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2191 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2192 atomic_set(&vha->loop_state, LOOP_DOWN); 2193 vha->device_flags = DFLG_NO_CABLE; 2194 vha->dpc_flags = 0; 2195 vha->flags.management_server_logged_in = 0; 2196 vha->marker_needed = 0; 2197 ha->isp_abort_cnt = 0; 2198 ha->beacon_blink_led = 0; 2199 2200 set_bit(0, ha->req_qid_map); 2201 set_bit(0, ha->rsp_qid_map); 2202 2203 ql_dbg(ql_dbg_init, vha, 0x0040, 2204 "Configuring PCI space...\n"); 2205 rval = ha->isp_ops->pci_config(vha); 2206 if (rval) { 2207 ql_log(ql_log_warn, vha, 0x0044, 2208 "Unable to configure PCI space.\n"); 2209 return (rval); 2210 } 2211 2212 ha->isp_ops->reset_chip(vha); 2213 2214 rval = qla2xxx_get_flash_info(vha); 2215 if (rval) { 2216 ql_log(ql_log_fatal, vha, 0x004f, 2217 "Unable to validate FLASH data.\n"); 2218 return rval; 2219 } 2220 2221 if (IS_QLA8044(ha)) { 2222 qla8044_read_reset_template(vha); 2223 2224 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2225 * If DONRESET_BIT0 is set, drivers should not set dev_state 2226 * to NEED_RESET. But if NEED_RESET is set, drivers should 2227 * should honor the reset. */ 2228 if (ql2xdontresethba == 1) 2229 qla8044_set_idc_dontreset(vha); 2230 } 2231 2232 ha->isp_ops->get_flash_version(vha, req->ring); 2233 ql_dbg(ql_dbg_init, vha, 0x0061, 2234 "Configure NVRAM parameters...\n"); 2235 2236 ha->isp_ops->nvram_config(vha); 2237 2238 if (ha->flags.disable_serdes) { 2239 /* Mask HBA via NVRAM settings? */ 2240 ql_log(ql_log_info, vha, 0x0077, 2241 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2242 return QLA_FUNCTION_FAILED; 2243 } 2244 2245 ql_dbg(ql_dbg_init, vha, 0x0078, 2246 "Verifying loaded RISC code...\n"); 2247 2248 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2249 rval = ha->isp_ops->chip_diag(vha); 2250 if (rval) 2251 return (rval); 2252 rval = qla2x00_setup_chip(vha); 2253 if (rval) 2254 return (rval); 2255 } 2256 2257 if (IS_QLA84XX(ha)) { 2258 ha->cs84xx = qla84xx_get_chip(vha); 2259 if (!ha->cs84xx) { 2260 ql_log(ql_log_warn, vha, 0x00d0, 2261 "Unable to configure ISP84XX.\n"); 2262 return QLA_FUNCTION_FAILED; 2263 } 2264 } 2265 2266 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2267 rval = qla2x00_init_rings(vha); 2268 2269 ha->flags.chip_reset_done = 1; 2270 2271 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2272 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2273 rval = qla84xx_init_chip(vha); 2274 if (rval != QLA_SUCCESS) { 2275 ql_log(ql_log_warn, vha, 0x00d4, 2276 "Unable to initialize ISP84XX.\n"); 2277 qla84xx_put_chip(vha); 2278 } 2279 } 2280 2281 /* Load the NIC Core f/w if we are the first protocol driver. */ 2282 if (IS_QLA8031(ha)) { 2283 rval = qla83xx_nic_core_fw_load(vha); 2284 if (rval) 2285 ql_log(ql_log_warn, vha, 0x0124, 2286 "Error in initializing NIC Core f/w.\n"); 2287 } 2288 2289 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2290 qla24xx_read_fcp_prio_cfg(vha); 2291 2292 if (IS_P3P_TYPE(ha)) 2293 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2294 else 2295 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2296 2297 return (rval); 2298 } 2299 2300 /** 2301 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2302 * @vha: HA context 2303 * 2304 * Returns 0 on success. 2305 */ 2306 int 2307 qla2100_pci_config(scsi_qla_host_t *vha) 2308 { 2309 uint16_t w; 2310 unsigned long flags; 2311 struct qla_hw_data *ha = vha->hw; 2312 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2313 2314 pci_set_master(ha->pdev); 2315 pci_try_set_mwi(ha->pdev); 2316 2317 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2318 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2319 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2320 2321 pci_disable_rom(ha->pdev); 2322 2323 /* Get PCI bus information. */ 2324 spin_lock_irqsave(&ha->hardware_lock, flags); 2325 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2326 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2327 2328 return QLA_SUCCESS; 2329 } 2330 2331 /** 2332 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2333 * @vha: HA context 2334 * 2335 * Returns 0 on success. 2336 */ 2337 int 2338 qla2300_pci_config(scsi_qla_host_t *vha) 2339 { 2340 uint16_t w; 2341 unsigned long flags = 0; 2342 uint32_t cnt; 2343 struct qla_hw_data *ha = vha->hw; 2344 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2345 2346 pci_set_master(ha->pdev); 2347 pci_try_set_mwi(ha->pdev); 2348 2349 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2350 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2351 2352 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2353 w &= ~PCI_COMMAND_INTX_DISABLE; 2354 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2355 2356 /* 2357 * If this is a 2300 card and not 2312, reset the 2358 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2359 * the 2310 also reports itself as a 2300 so we need to get the 2360 * fb revision level -- a 6 indicates it really is a 2300 and 2361 * not a 2310. 2362 */ 2363 if (IS_QLA2300(ha)) { 2364 spin_lock_irqsave(&ha->hardware_lock, flags); 2365 2366 /* Pause RISC. */ 2367 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2368 for (cnt = 0; cnt < 30000; cnt++) { 2369 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2370 break; 2371 2372 udelay(10); 2373 } 2374 2375 /* Select FPM registers. */ 2376 WRT_REG_WORD(®->ctrl_status, 0x20); 2377 RD_REG_WORD(®->ctrl_status); 2378 2379 /* Get the fb rev level */ 2380 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2381 2382 if (ha->fb_rev == FPM_2300) 2383 pci_clear_mwi(ha->pdev); 2384 2385 /* Deselect FPM registers. */ 2386 WRT_REG_WORD(®->ctrl_status, 0x0); 2387 RD_REG_WORD(®->ctrl_status); 2388 2389 /* Release RISC module. */ 2390 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2391 for (cnt = 0; cnt < 30000; cnt++) { 2392 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2393 break; 2394 2395 udelay(10); 2396 } 2397 2398 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2399 } 2400 2401 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2402 2403 pci_disable_rom(ha->pdev); 2404 2405 /* Get PCI bus information. */ 2406 spin_lock_irqsave(&ha->hardware_lock, flags); 2407 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2408 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2409 2410 return QLA_SUCCESS; 2411 } 2412 2413 /** 2414 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2415 * @vha: HA context 2416 * 2417 * Returns 0 on success. 2418 */ 2419 int 2420 qla24xx_pci_config(scsi_qla_host_t *vha) 2421 { 2422 uint16_t w; 2423 unsigned long flags = 0; 2424 struct qla_hw_data *ha = vha->hw; 2425 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2426 2427 pci_set_master(ha->pdev); 2428 pci_try_set_mwi(ha->pdev); 2429 2430 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2431 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2432 w &= ~PCI_COMMAND_INTX_DISABLE; 2433 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2434 2435 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2436 2437 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2438 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2439 pcix_set_mmrbc(ha->pdev, 2048); 2440 2441 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2442 if (pci_is_pcie(ha->pdev)) 2443 pcie_set_readrq(ha->pdev, 4096); 2444 2445 pci_disable_rom(ha->pdev); 2446 2447 ha->chip_revision = ha->pdev->revision; 2448 2449 /* Get PCI bus information. */ 2450 spin_lock_irqsave(&ha->hardware_lock, flags); 2451 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2452 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2453 2454 return QLA_SUCCESS; 2455 } 2456 2457 /** 2458 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2459 * @vha: HA context 2460 * 2461 * Returns 0 on success. 2462 */ 2463 int 2464 qla25xx_pci_config(scsi_qla_host_t *vha) 2465 { 2466 uint16_t w; 2467 struct qla_hw_data *ha = vha->hw; 2468 2469 pci_set_master(ha->pdev); 2470 pci_try_set_mwi(ha->pdev); 2471 2472 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2473 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2474 w &= ~PCI_COMMAND_INTX_DISABLE; 2475 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2476 2477 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2478 if (pci_is_pcie(ha->pdev)) 2479 pcie_set_readrq(ha->pdev, 4096); 2480 2481 pci_disable_rom(ha->pdev); 2482 2483 ha->chip_revision = ha->pdev->revision; 2484 2485 return QLA_SUCCESS; 2486 } 2487 2488 /** 2489 * qla2x00_isp_firmware() - Choose firmware image. 2490 * @vha: HA context 2491 * 2492 * Returns 0 on success. 2493 */ 2494 static int 2495 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2496 { 2497 int rval; 2498 uint16_t loop_id, topo, sw_cap; 2499 uint8_t domain, area, al_pa; 2500 struct qla_hw_data *ha = vha->hw; 2501 2502 /* Assume loading risc code */ 2503 rval = QLA_FUNCTION_FAILED; 2504 2505 if (ha->flags.disable_risc_code_load) { 2506 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2507 2508 /* Verify checksum of loaded RISC code. */ 2509 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2510 if (rval == QLA_SUCCESS) { 2511 /* And, verify we are not in ROM code. */ 2512 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2513 &area, &domain, &topo, &sw_cap); 2514 } 2515 } 2516 2517 if (rval) 2518 ql_dbg(ql_dbg_init, vha, 0x007a, 2519 "**** Load RISC code ****.\n"); 2520 2521 return (rval); 2522 } 2523 2524 /** 2525 * qla2x00_reset_chip() - Reset ISP chip. 2526 * @vha: HA context 2527 * 2528 * Returns 0 on success. 2529 */ 2530 void 2531 qla2x00_reset_chip(scsi_qla_host_t *vha) 2532 { 2533 unsigned long flags = 0; 2534 struct qla_hw_data *ha = vha->hw; 2535 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2536 uint32_t cnt; 2537 uint16_t cmd; 2538 2539 if (unlikely(pci_channel_offline(ha->pdev))) 2540 return; 2541 2542 ha->isp_ops->disable_intrs(ha); 2543 2544 spin_lock_irqsave(&ha->hardware_lock, flags); 2545 2546 /* Turn off master enable */ 2547 cmd = 0; 2548 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2549 cmd &= ~PCI_COMMAND_MASTER; 2550 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2551 2552 if (!IS_QLA2100(ha)) { 2553 /* Pause RISC. */ 2554 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2555 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2556 for (cnt = 0; cnt < 30000; cnt++) { 2557 if ((RD_REG_WORD(®->hccr) & 2558 HCCR_RISC_PAUSE) != 0) 2559 break; 2560 udelay(100); 2561 } 2562 } else { 2563 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2564 udelay(10); 2565 } 2566 2567 /* Select FPM registers. */ 2568 WRT_REG_WORD(®->ctrl_status, 0x20); 2569 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2570 2571 /* FPM Soft Reset. */ 2572 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2573 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2574 2575 /* Toggle Fpm Reset. */ 2576 if (!IS_QLA2200(ha)) { 2577 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2578 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2579 } 2580 2581 /* Select frame buffer registers. */ 2582 WRT_REG_WORD(®->ctrl_status, 0x10); 2583 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2584 2585 /* Reset frame buffer FIFOs. */ 2586 if (IS_QLA2200(ha)) { 2587 WRT_FB_CMD_REG(ha, reg, 0xa000); 2588 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2589 } else { 2590 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2591 2592 /* Read back fb_cmd until zero or 3 seconds max */ 2593 for (cnt = 0; cnt < 3000; cnt++) { 2594 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2595 break; 2596 udelay(100); 2597 } 2598 } 2599 2600 /* Select RISC module registers. */ 2601 WRT_REG_WORD(®->ctrl_status, 0); 2602 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2603 2604 /* Reset RISC processor. */ 2605 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2606 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2607 2608 /* Release RISC processor. */ 2609 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2610 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2611 } 2612 2613 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2614 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2615 2616 /* Reset ISP chip. */ 2617 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2618 2619 /* Wait for RISC to recover from reset. */ 2620 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2621 /* 2622 * It is necessary to for a delay here since the card doesn't 2623 * respond to PCI reads during a reset. On some architectures 2624 * this will result in an MCA. 2625 */ 2626 udelay(20); 2627 for (cnt = 30000; cnt; cnt--) { 2628 if ((RD_REG_WORD(®->ctrl_status) & 2629 CSR_ISP_SOFT_RESET) == 0) 2630 break; 2631 udelay(100); 2632 } 2633 } else 2634 udelay(10); 2635 2636 /* Reset RISC processor. */ 2637 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2638 2639 WRT_REG_WORD(®->semaphore, 0); 2640 2641 /* Release RISC processor. */ 2642 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2643 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2644 2645 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2646 for (cnt = 0; cnt < 30000; cnt++) { 2647 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2648 break; 2649 2650 udelay(100); 2651 } 2652 } else 2653 udelay(100); 2654 2655 /* Turn on master enable */ 2656 cmd |= PCI_COMMAND_MASTER; 2657 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2658 2659 /* Disable RISC pause on FPM parity error. */ 2660 if (!IS_QLA2100(ha)) { 2661 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2662 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2663 } 2664 2665 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2666 } 2667 2668 /** 2669 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2670 * @vha: HA context 2671 * 2672 * Returns 0 on success. 2673 */ 2674 static int 2675 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2676 { 2677 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2678 2679 if (!IS_QLA81XX(vha->hw)) 2680 return QLA_SUCCESS; 2681 2682 return qla81xx_write_mpi_register(vha, mb); 2683 } 2684 2685 /** 2686 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2687 * @vha: HA context 2688 * 2689 * Returns 0 on success. 2690 */ 2691 static inline int 2692 qla24xx_reset_risc(scsi_qla_host_t *vha) 2693 { 2694 unsigned long flags = 0; 2695 struct qla_hw_data *ha = vha->hw; 2696 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2697 uint32_t cnt; 2698 uint16_t wd; 2699 static int abts_cnt; /* ISP abort retry counts */ 2700 int rval = QLA_SUCCESS; 2701 2702 spin_lock_irqsave(&ha->hardware_lock, flags); 2703 2704 /* Reset RISC. */ 2705 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2706 for (cnt = 0; cnt < 30000; cnt++) { 2707 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2708 break; 2709 2710 udelay(10); 2711 } 2712 2713 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2714 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2715 2716 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2717 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2718 RD_REG_DWORD(®->hccr), 2719 RD_REG_DWORD(®->ctrl_status), 2720 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2721 2722 WRT_REG_DWORD(®->ctrl_status, 2723 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2724 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2725 2726 udelay(100); 2727 2728 /* Wait for firmware to complete NVRAM accesses. */ 2729 RD_REG_WORD(®->mailbox0); 2730 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2731 rval == QLA_SUCCESS; cnt--) { 2732 barrier(); 2733 if (cnt) 2734 udelay(5); 2735 else 2736 rval = QLA_FUNCTION_TIMEOUT; 2737 } 2738 2739 if (rval == QLA_SUCCESS) 2740 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2741 2742 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2743 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2744 RD_REG_DWORD(®->hccr), 2745 RD_REG_DWORD(®->mailbox0)); 2746 2747 /* Wait for soft-reset to complete. */ 2748 RD_REG_DWORD(®->ctrl_status); 2749 for (cnt = 0; cnt < 60; cnt++) { 2750 barrier(); 2751 if ((RD_REG_DWORD(®->ctrl_status) & 2752 CSRX_ISP_SOFT_RESET) == 0) 2753 break; 2754 2755 udelay(5); 2756 } 2757 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2758 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2759 2760 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2761 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2762 RD_REG_DWORD(®->hccr), 2763 RD_REG_DWORD(®->ctrl_status)); 2764 2765 /* If required, do an MPI FW reset now */ 2766 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2767 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2768 if (++abts_cnt < 5) { 2769 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2770 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2771 } else { 2772 /* 2773 * We exhausted the ISP abort retries. We have to 2774 * set the board offline. 2775 */ 2776 abts_cnt = 0; 2777 vha->flags.online = 0; 2778 } 2779 } 2780 } 2781 2782 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2783 RD_REG_DWORD(®->hccr); 2784 2785 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2786 RD_REG_DWORD(®->hccr); 2787 2788 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2789 RD_REG_DWORD(®->hccr); 2790 2791 RD_REG_WORD(®->mailbox0); 2792 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2793 rval == QLA_SUCCESS; cnt--) { 2794 barrier(); 2795 if (cnt) 2796 udelay(5); 2797 else 2798 rval = QLA_FUNCTION_TIMEOUT; 2799 } 2800 if (rval == QLA_SUCCESS) 2801 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2802 2803 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2804 "Host Risc 0x%x, mailbox0 0x%x\n", 2805 RD_REG_DWORD(®->hccr), 2806 RD_REG_WORD(®->mailbox0)); 2807 2808 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2809 2810 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2811 "Driver in %s mode\n", 2812 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2813 2814 if (IS_NOPOLLING_TYPE(ha)) 2815 ha->isp_ops->enable_intrs(ha); 2816 2817 return rval; 2818 } 2819 2820 static void 2821 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2822 { 2823 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2824 2825 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2826 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2827 2828 } 2829 2830 static void 2831 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2832 { 2833 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2834 2835 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2836 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2837 } 2838 2839 static void 2840 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2841 { 2842 uint32_t wd32 = 0; 2843 uint delta_msec = 100; 2844 uint elapsed_msec = 0; 2845 uint timeout_msec; 2846 ulong n; 2847 2848 if (vha->hw->pdev->subsystem_device != 0x0175 && 2849 vha->hw->pdev->subsystem_device != 0x0240) 2850 return; 2851 2852 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2853 udelay(100); 2854 2855 attempt: 2856 timeout_msec = TIMEOUT_SEMAPHORE; 2857 n = timeout_msec / delta_msec; 2858 while (n--) { 2859 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2860 qla25xx_read_risc_sema_reg(vha, &wd32); 2861 if (wd32 & RISC_SEMAPHORE) 2862 break; 2863 msleep(delta_msec); 2864 elapsed_msec += delta_msec; 2865 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2866 goto force; 2867 } 2868 2869 if (!(wd32 & RISC_SEMAPHORE)) 2870 goto force; 2871 2872 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2873 goto acquired; 2874 2875 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2876 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2877 n = timeout_msec / delta_msec; 2878 while (n--) { 2879 qla25xx_read_risc_sema_reg(vha, &wd32); 2880 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2881 break; 2882 msleep(delta_msec); 2883 elapsed_msec += delta_msec; 2884 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2885 goto force; 2886 } 2887 2888 if (wd32 & RISC_SEMAPHORE_FORCE) 2889 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2890 2891 goto attempt; 2892 2893 force: 2894 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2895 2896 acquired: 2897 return; 2898 } 2899 2900 /** 2901 * qla24xx_reset_chip() - Reset ISP24xx chip. 2902 * @vha: HA context 2903 * 2904 * Returns 0 on success. 2905 */ 2906 void 2907 qla24xx_reset_chip(scsi_qla_host_t *vha) 2908 { 2909 struct qla_hw_data *ha = vha->hw; 2910 2911 if (pci_channel_offline(ha->pdev) && 2912 ha->flags.pci_channel_io_perm_failure) { 2913 return; 2914 } 2915 2916 ha->isp_ops->disable_intrs(ha); 2917 2918 qla25xx_manipulate_risc_semaphore(vha); 2919 2920 /* Perform RISC reset. */ 2921 qla24xx_reset_risc(vha); 2922 } 2923 2924 /** 2925 * qla2x00_chip_diag() - Test chip for proper operation. 2926 * @vha: HA context 2927 * 2928 * Returns 0 on success. 2929 */ 2930 int 2931 qla2x00_chip_diag(scsi_qla_host_t *vha) 2932 { 2933 int rval; 2934 struct qla_hw_data *ha = vha->hw; 2935 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2936 unsigned long flags = 0; 2937 uint16_t data; 2938 uint32_t cnt; 2939 uint16_t mb[5]; 2940 struct req_que *req = ha->req_q_map[0]; 2941 2942 /* Assume a failed state */ 2943 rval = QLA_FUNCTION_FAILED; 2944 2945 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2946 ®->flash_address); 2947 2948 spin_lock_irqsave(&ha->hardware_lock, flags); 2949 2950 /* Reset ISP chip. */ 2951 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2952 2953 /* 2954 * We need to have a delay here since the card will not respond while 2955 * in reset causing an MCA on some architectures. 2956 */ 2957 udelay(20); 2958 data = qla2x00_debounce_register(®->ctrl_status); 2959 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2960 udelay(5); 2961 data = RD_REG_WORD(®->ctrl_status); 2962 barrier(); 2963 } 2964 2965 if (!cnt) 2966 goto chip_diag_failed; 2967 2968 ql_dbg(ql_dbg_init, vha, 0x007c, 2969 "Reset register cleared by chip reset.\n"); 2970 2971 /* Reset RISC processor. */ 2972 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2973 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2974 2975 /* Workaround for QLA2312 PCI parity error */ 2976 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2977 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2978 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2979 udelay(5); 2980 data = RD_MAILBOX_REG(ha, reg, 0); 2981 barrier(); 2982 } 2983 } else 2984 udelay(10); 2985 2986 if (!cnt) 2987 goto chip_diag_failed; 2988 2989 /* Check product ID of chip */ 2990 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2991 2992 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2993 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2994 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2995 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2996 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2997 mb[3] != PROD_ID_3) { 2998 ql_log(ql_log_warn, vha, 0x0062, 2999 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3000 mb[1], mb[2], mb[3]); 3001 3002 goto chip_diag_failed; 3003 } 3004 ha->product_id[0] = mb[1]; 3005 ha->product_id[1] = mb[2]; 3006 ha->product_id[2] = mb[3]; 3007 ha->product_id[3] = mb[4]; 3008 3009 /* Adjust fw RISC transfer size */ 3010 if (req->length > 1024) 3011 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3012 else 3013 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3014 req->length; 3015 3016 if (IS_QLA2200(ha) && 3017 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3018 /* Limit firmware transfer size with a 2200A */ 3019 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3020 3021 ha->device_type |= DT_ISP2200A; 3022 ha->fw_transfer_size = 128; 3023 } 3024 3025 /* Wrap Incoming Mailboxes Test. */ 3026 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3027 3028 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3029 rval = qla2x00_mbx_reg_test(vha); 3030 if (rval) 3031 ql_log(ql_log_warn, vha, 0x0080, 3032 "Failed mailbox send register test.\n"); 3033 else 3034 /* Flag a successful rval */ 3035 rval = QLA_SUCCESS; 3036 spin_lock_irqsave(&ha->hardware_lock, flags); 3037 3038 chip_diag_failed: 3039 if (rval) 3040 ql_log(ql_log_info, vha, 0x0081, 3041 "Chip diagnostics **** FAILED ****.\n"); 3042 3043 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3044 3045 return (rval); 3046 } 3047 3048 /** 3049 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3050 * @vha: HA context 3051 * 3052 * Returns 0 on success. 3053 */ 3054 int 3055 qla24xx_chip_diag(scsi_qla_host_t *vha) 3056 { 3057 int rval; 3058 struct qla_hw_data *ha = vha->hw; 3059 struct req_que *req = ha->req_q_map[0]; 3060 3061 if (IS_P3P_TYPE(ha)) 3062 return QLA_SUCCESS; 3063 3064 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3065 3066 rval = qla2x00_mbx_reg_test(vha); 3067 if (rval) { 3068 ql_log(ql_log_warn, vha, 0x0082, 3069 "Failed mailbox send register test.\n"); 3070 } else { 3071 /* Flag a successful rval */ 3072 rval = QLA_SUCCESS; 3073 } 3074 3075 return rval; 3076 } 3077 3078 static void 3079 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3080 { 3081 int rval; 3082 dma_addr_t tc_dma; 3083 void *tc; 3084 struct qla_hw_data *ha = vha->hw; 3085 3086 if (ha->eft) { 3087 ql_dbg(ql_dbg_init, vha, 0x00bd, 3088 "%s: Offload Mem is already allocated.\n", 3089 __func__); 3090 return; 3091 } 3092 3093 if (IS_FWI2_CAPABLE(ha)) { 3094 /* Allocate memory for Fibre Channel Event Buffer. */ 3095 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3096 !IS_QLA27XX(ha)) 3097 goto try_eft; 3098 3099 if (ha->fce) 3100 dma_free_coherent(&ha->pdev->dev, 3101 FCE_SIZE, ha->fce, ha->fce_dma); 3102 3103 /* Allocate memory for Fibre Channel Event Buffer. */ 3104 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3105 GFP_KERNEL); 3106 if (!tc) { 3107 ql_log(ql_log_warn, vha, 0x00be, 3108 "Unable to allocate (%d KB) for FCE.\n", 3109 FCE_SIZE / 1024); 3110 goto try_eft; 3111 } 3112 3113 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3114 ha->fce_mb, &ha->fce_bufs); 3115 if (rval) { 3116 ql_log(ql_log_warn, vha, 0x00bf, 3117 "Unable to initialize FCE (%d).\n", rval); 3118 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 3119 tc_dma); 3120 ha->flags.fce_enabled = 0; 3121 goto try_eft; 3122 } 3123 ql_dbg(ql_dbg_init, vha, 0x00c0, 3124 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 3125 3126 ha->flags.fce_enabled = 1; 3127 ha->fce_dma = tc_dma; 3128 ha->fce = tc; 3129 3130 try_eft: 3131 if (ha->eft) 3132 dma_free_coherent(&ha->pdev->dev, 3133 EFT_SIZE, ha->eft, ha->eft_dma); 3134 3135 /* Allocate memory for Extended Trace Buffer. */ 3136 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3137 GFP_KERNEL); 3138 if (!tc) { 3139 ql_log(ql_log_warn, vha, 0x00c1, 3140 "Unable to allocate (%d KB) for EFT.\n", 3141 EFT_SIZE / 1024); 3142 goto eft_err; 3143 } 3144 3145 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3146 if (rval) { 3147 ql_log(ql_log_warn, vha, 0x00c2, 3148 "Unable to initialize EFT (%d).\n", rval); 3149 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 3150 tc_dma); 3151 goto eft_err; 3152 } 3153 ql_dbg(ql_dbg_init, vha, 0x00c3, 3154 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3155 3156 ha->eft_dma = tc_dma; 3157 ha->eft = tc; 3158 } 3159 3160 eft_err: 3161 return; 3162 } 3163 3164 void 3165 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3166 { 3167 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3168 eft_size, fce_size, mq_size; 3169 struct qla_hw_data *ha = vha->hw; 3170 struct req_que *req = ha->req_q_map[0]; 3171 struct rsp_que *rsp = ha->rsp_q_map[0]; 3172 struct qla2xxx_fw_dump *fw_dump; 3173 3174 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3175 req_q_size = rsp_q_size = 0; 3176 3177 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3178 fixed_size = sizeof(struct qla2100_fw_dump); 3179 } else if (IS_QLA23XX(ha)) { 3180 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3181 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3182 sizeof(uint16_t); 3183 } else if (IS_FWI2_CAPABLE(ha)) { 3184 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 3185 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3186 else if (IS_QLA81XX(ha)) 3187 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3188 else if (IS_QLA25XX(ha)) 3189 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3190 else 3191 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3192 3193 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3194 sizeof(uint32_t); 3195 if (ha->mqenable) { 3196 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 3197 mq_size = sizeof(struct qla2xxx_mq_chain); 3198 /* 3199 * Allocate maximum buffer size for all queues. 3200 * Resizing must be done at end-of-dump processing. 3201 */ 3202 mq_size += ha->max_req_queues * 3203 (req->length * sizeof(request_t)); 3204 mq_size += ha->max_rsp_queues * 3205 (rsp->length * sizeof(response_t)); 3206 } 3207 if (ha->tgt.atio_ring) 3208 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3209 /* Allocate memory for Fibre Channel Event Buffer. */ 3210 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3211 !IS_QLA27XX(ha)) 3212 goto try_eft; 3213 3214 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3215 try_eft: 3216 ql_dbg(ql_dbg_init, vha, 0x00c3, 3217 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3218 eft_size = EFT_SIZE; 3219 } 3220 3221 if (IS_QLA27XX(ha)) { 3222 if (!ha->fw_dump_template) { 3223 ql_log(ql_log_warn, vha, 0x00ba, 3224 "Failed missing fwdump template\n"); 3225 return; 3226 } 3227 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 3228 ql_dbg(ql_dbg_init, vha, 0x00fa, 3229 "-> allocating fwdump (%x bytes)...\n", dump_size); 3230 goto allocate; 3231 } 3232 3233 req_q_size = req->length * sizeof(request_t); 3234 rsp_q_size = rsp->length * sizeof(response_t); 3235 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3236 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 3237 ha->chain_offset = dump_size; 3238 dump_size += mq_size + fce_size; 3239 3240 if (ha->exchoffld_buf) 3241 dump_size += sizeof(struct qla2xxx_offld_chain) + 3242 ha->exchoffld_size; 3243 if (ha->exlogin_buf) 3244 dump_size += sizeof(struct qla2xxx_offld_chain) + 3245 ha->exlogin_size; 3246 3247 allocate: 3248 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 3249 fw_dump = vmalloc(dump_size); 3250 if (!fw_dump) { 3251 ql_log(ql_log_warn, vha, 0x00c4, 3252 "Unable to allocate (%d KB) for firmware dump.\n", 3253 dump_size / 1024); 3254 } else { 3255 if (ha->fw_dump) 3256 vfree(ha->fw_dump); 3257 ha->fw_dump = fw_dump; 3258 3259 ha->fw_dump_len = dump_size; 3260 ql_dbg(ql_dbg_init, vha, 0x00c5, 3261 "Allocated (%d KB) for firmware dump.\n", 3262 dump_size / 1024); 3263 3264 if (IS_QLA27XX(ha)) 3265 return; 3266 3267 ha->fw_dump->signature[0] = 'Q'; 3268 ha->fw_dump->signature[1] = 'L'; 3269 ha->fw_dump->signature[2] = 'G'; 3270 ha->fw_dump->signature[3] = 'C'; 3271 ha->fw_dump->version = htonl(1); 3272 3273 ha->fw_dump->fixed_size = htonl(fixed_size); 3274 ha->fw_dump->mem_size = htonl(mem_size); 3275 ha->fw_dump->req_q_size = htonl(req_q_size); 3276 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3277 3278 ha->fw_dump->eft_size = htonl(eft_size); 3279 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3280 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3281 3282 ha->fw_dump->header_size = 3283 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3284 } 3285 } 3286 } 3287 3288 static int 3289 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3290 { 3291 #define MPS_MASK 0xe0 3292 int rval; 3293 uint16_t dc; 3294 uint32_t dw; 3295 3296 if (!IS_QLA81XX(vha->hw)) 3297 return QLA_SUCCESS; 3298 3299 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3300 if (rval != QLA_SUCCESS) { 3301 ql_log(ql_log_warn, vha, 0x0105, 3302 "Unable to acquire semaphore.\n"); 3303 goto done; 3304 } 3305 3306 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3307 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3308 if (rval != QLA_SUCCESS) { 3309 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3310 goto done_release; 3311 } 3312 3313 dc &= MPS_MASK; 3314 if (dc == (dw & MPS_MASK)) 3315 goto done_release; 3316 3317 dw &= ~MPS_MASK; 3318 dw |= dc; 3319 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3320 if (rval != QLA_SUCCESS) { 3321 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3322 } 3323 3324 done_release: 3325 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3326 if (rval != QLA_SUCCESS) { 3327 ql_log(ql_log_warn, vha, 0x006d, 3328 "Unable to release semaphore.\n"); 3329 } 3330 3331 done: 3332 return rval; 3333 } 3334 3335 int 3336 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3337 { 3338 /* Don't try to reallocate the array */ 3339 if (req->outstanding_cmds) 3340 return QLA_SUCCESS; 3341 3342 if (!IS_FWI2_CAPABLE(ha)) 3343 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3344 else { 3345 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3346 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3347 else 3348 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3349 } 3350 3351 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3352 sizeof(srb_t *), 3353 GFP_KERNEL); 3354 3355 if (!req->outstanding_cmds) { 3356 /* 3357 * Try to allocate a minimal size just so we can get through 3358 * initialization. 3359 */ 3360 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3361 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3362 sizeof(srb_t *), 3363 GFP_KERNEL); 3364 3365 if (!req->outstanding_cmds) { 3366 ql_log(ql_log_fatal, NULL, 0x0126, 3367 "Failed to allocate memory for " 3368 "outstanding_cmds for req_que %p.\n", req); 3369 req->num_outstanding_cmds = 0; 3370 return QLA_FUNCTION_FAILED; 3371 } 3372 } 3373 3374 return QLA_SUCCESS; 3375 } 3376 3377 #define PRINT_FIELD(_field, _flag, _str) { \ 3378 if (a0->_field & _flag) {\ 3379 if (p) {\ 3380 strcat(ptr, "|");\ 3381 ptr++;\ 3382 leftover--;\ 3383 } \ 3384 len = snprintf(ptr, leftover, "%s", _str); \ 3385 p = 1;\ 3386 leftover -= len;\ 3387 ptr += len; \ 3388 } \ 3389 } 3390 3391 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3392 { 3393 #define STR_LEN 64 3394 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3395 u8 str[STR_LEN], *ptr, p; 3396 int leftover, len; 3397 3398 memset(str, 0, STR_LEN); 3399 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3400 ql_dbg(ql_dbg_init, vha, 0x015a, 3401 "SFP MFG Name: %s\n", str); 3402 3403 memset(str, 0, STR_LEN); 3404 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3405 ql_dbg(ql_dbg_init, vha, 0x015c, 3406 "SFP Part Name: %s\n", str); 3407 3408 /* media */ 3409 memset(str, 0, STR_LEN); 3410 ptr = str; 3411 leftover = STR_LEN; 3412 p = len = 0; 3413 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3414 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3415 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3416 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3417 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3418 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3419 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3420 ql_dbg(ql_dbg_init, vha, 0x0160, 3421 "SFP Media: %s\n", str); 3422 3423 /* link length */ 3424 memset(str, 0, STR_LEN); 3425 ptr = str; 3426 leftover = STR_LEN; 3427 p = len = 0; 3428 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3429 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3430 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3431 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3432 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3433 ql_dbg(ql_dbg_init, vha, 0x0196, 3434 "SFP Link Length: %s\n", str); 3435 3436 memset(str, 0, STR_LEN); 3437 ptr = str; 3438 leftover = STR_LEN; 3439 p = len = 0; 3440 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3441 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3442 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3443 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3444 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3445 ql_dbg(ql_dbg_init, vha, 0x016e, 3446 "SFP FC Link Tech: %s\n", str); 3447 3448 if (a0->length_km) 3449 ql_dbg(ql_dbg_init, vha, 0x016f, 3450 "SFP Distant: %d km\n", a0->length_km); 3451 if (a0->length_100m) 3452 ql_dbg(ql_dbg_init, vha, 0x0170, 3453 "SFP Distant: %d m\n", a0->length_100m*100); 3454 if (a0->length_50um_10m) 3455 ql_dbg(ql_dbg_init, vha, 0x0189, 3456 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3457 if (a0->length_62um_10m) 3458 ql_dbg(ql_dbg_init, vha, 0x018a, 3459 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3460 if (a0->length_om4_10m) 3461 ql_dbg(ql_dbg_init, vha, 0x0194, 3462 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3463 if (a0->length_om3_10m) 3464 ql_dbg(ql_dbg_init, vha, 0x0195, 3465 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3466 } 3467 3468 3469 /* 3470 * Return Code: 3471 * QLA_SUCCESS: no action 3472 * QLA_INTERFACE_ERROR: SFP is not there. 3473 * QLA_FUNCTION_FAILED: detected New SFP 3474 */ 3475 int 3476 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3477 { 3478 int rc = QLA_SUCCESS; 3479 struct sff_8247_a0 *a; 3480 struct qla_hw_data *ha = vha->hw; 3481 3482 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3483 goto out; 3484 3485 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3486 if (rc) 3487 goto out; 3488 3489 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3490 qla2xxx_print_sfp_info(vha); 3491 3492 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3493 /* long range */ 3494 ha->flags.detected_lr_sfp = 1; 3495 3496 if (a->length_km > 5 || a->length_100m > 50) 3497 ha->long_range_distance = LR_DISTANCE_10K; 3498 else 3499 ha->long_range_distance = LR_DISTANCE_5K; 3500 3501 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3502 ql_dbg(ql_dbg_async, vha, 0x507b, 3503 "Detected Long Range SFP.\n"); 3504 } else { 3505 /* short range */ 3506 ha->flags.detected_lr_sfp = 0; 3507 if (ha->flags.using_lr_setting) 3508 ql_dbg(ql_dbg_async, vha, 0x5084, 3509 "Detected Short Range SFP.\n"); 3510 } 3511 3512 if (!vha->flags.init_done) 3513 rc = QLA_SUCCESS; 3514 out: 3515 return rc; 3516 } 3517 3518 /** 3519 * qla2x00_setup_chip() - Load and start RISC firmware. 3520 * @vha: HA context 3521 * 3522 * Returns 0 on success. 3523 */ 3524 static int 3525 qla2x00_setup_chip(scsi_qla_host_t *vha) 3526 { 3527 int rval; 3528 uint32_t srisc_address = 0; 3529 struct qla_hw_data *ha = vha->hw; 3530 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3531 unsigned long flags; 3532 uint16_t fw_major_version; 3533 3534 if (IS_P3P_TYPE(ha)) { 3535 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3536 if (rval == QLA_SUCCESS) { 3537 qla2x00_stop_firmware(vha); 3538 goto enable_82xx_npiv; 3539 } else 3540 goto failed; 3541 } 3542 3543 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3544 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3545 spin_lock_irqsave(&ha->hardware_lock, flags); 3546 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3547 RD_REG_WORD(®->hccr); 3548 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3549 } 3550 3551 qla81xx_mpi_sync(vha); 3552 3553 /* Load firmware sequences */ 3554 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3555 if (rval == QLA_SUCCESS) { 3556 ql_dbg(ql_dbg_init, vha, 0x00c9, 3557 "Verifying Checksum of loaded RISC code.\n"); 3558 3559 rval = qla2x00_verify_checksum(vha, srisc_address); 3560 if (rval == QLA_SUCCESS) { 3561 /* Start firmware execution. */ 3562 ql_dbg(ql_dbg_init, vha, 0x00ca, 3563 "Starting firmware.\n"); 3564 3565 if (ql2xexlogins) 3566 ha->flags.exlogins_enabled = 1; 3567 3568 if (qla_is_exch_offld_enabled(vha)) 3569 ha->flags.exchoffld_enabled = 1; 3570 3571 rval = qla2x00_execute_fw(vha, srisc_address); 3572 /* Retrieve firmware information. */ 3573 if (rval == QLA_SUCCESS) { 3574 qla24xx_detect_sfp(vha); 3575 3576 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && 3577 (ha->zio_mode == QLA_ZIO_MODE_6)) 3578 qla27xx_set_zio_threshold(vha, 3579 ha->last_zio_threshold); 3580 3581 rval = qla2x00_set_exlogins_buffer(vha); 3582 if (rval != QLA_SUCCESS) 3583 goto failed; 3584 3585 rval = qla2x00_set_exchoffld_buffer(vha); 3586 if (rval != QLA_SUCCESS) 3587 goto failed; 3588 3589 enable_82xx_npiv: 3590 fw_major_version = ha->fw_major_version; 3591 if (IS_P3P_TYPE(ha)) 3592 qla82xx_check_md_needed(vha); 3593 else 3594 rval = qla2x00_get_fw_version(vha); 3595 if (rval != QLA_SUCCESS) 3596 goto failed; 3597 ha->flags.npiv_supported = 0; 3598 if (IS_QLA2XXX_MIDTYPE(ha) && 3599 (ha->fw_attributes & BIT_2)) { 3600 ha->flags.npiv_supported = 1; 3601 if ((!ha->max_npiv_vports) || 3602 ((ha->max_npiv_vports + 1) % 3603 MIN_MULTI_ID_FABRIC)) 3604 ha->max_npiv_vports = 3605 MIN_MULTI_ID_FABRIC - 1; 3606 } 3607 qla2x00_get_resource_cnts(vha); 3608 3609 /* 3610 * Allocate the array of outstanding commands 3611 * now that we know the firmware resources. 3612 */ 3613 rval = qla2x00_alloc_outstanding_cmds(ha, 3614 vha->req); 3615 if (rval != QLA_SUCCESS) 3616 goto failed; 3617 3618 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3619 qla2x00_alloc_offload_mem(vha); 3620 3621 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3622 qla2x00_alloc_fw_dump(vha); 3623 3624 } else { 3625 goto failed; 3626 } 3627 } else { 3628 ql_log(ql_log_fatal, vha, 0x00cd, 3629 "ISP Firmware failed checksum.\n"); 3630 goto failed; 3631 } 3632 } else 3633 goto failed; 3634 3635 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3636 /* Enable proper parity. */ 3637 spin_lock_irqsave(&ha->hardware_lock, flags); 3638 if (IS_QLA2300(ha)) 3639 /* SRAM parity */ 3640 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3641 else 3642 /* SRAM, Instruction RAM and GP RAM parity */ 3643 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3644 RD_REG_WORD(®->hccr); 3645 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3646 } 3647 3648 if (IS_QLA27XX(ha)) 3649 ha->flags.fac_supported = 1; 3650 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3651 uint32_t size; 3652 3653 rval = qla81xx_fac_get_sector_size(vha, &size); 3654 if (rval == QLA_SUCCESS) { 3655 ha->flags.fac_supported = 1; 3656 ha->fdt_block_size = size << 2; 3657 } else { 3658 ql_log(ql_log_warn, vha, 0x00ce, 3659 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3660 ha->fw_major_version, ha->fw_minor_version, 3661 ha->fw_subminor_version); 3662 3663 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3664 ha->flags.fac_supported = 0; 3665 rval = QLA_SUCCESS; 3666 } 3667 } 3668 } 3669 failed: 3670 if (rval) { 3671 ql_log(ql_log_fatal, vha, 0x00cf, 3672 "Setup chip ****FAILED****.\n"); 3673 } 3674 3675 return (rval); 3676 } 3677 3678 /** 3679 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3680 * @rsp: response queue 3681 * 3682 * Beginning of request ring has initialization control block already built 3683 * by nvram config routine. 3684 * 3685 * Returns 0 on success. 3686 */ 3687 void 3688 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3689 { 3690 uint16_t cnt; 3691 response_t *pkt; 3692 3693 rsp->ring_ptr = rsp->ring; 3694 rsp->ring_index = 0; 3695 rsp->status_srb = NULL; 3696 pkt = rsp->ring_ptr; 3697 for (cnt = 0; cnt < rsp->length; cnt++) { 3698 pkt->signature = RESPONSE_PROCESSED; 3699 pkt++; 3700 } 3701 } 3702 3703 /** 3704 * qla2x00_update_fw_options() - Read and process firmware options. 3705 * @vha: HA context 3706 * 3707 * Returns 0 on success. 3708 */ 3709 void 3710 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3711 { 3712 uint16_t swing, emphasis, tx_sens, rx_sens; 3713 struct qla_hw_data *ha = vha->hw; 3714 3715 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3716 qla2x00_get_fw_options(vha, ha->fw_options); 3717 3718 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3719 return; 3720 3721 /* Serial Link options. */ 3722 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3723 "Serial link options.\n"); 3724 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3725 (uint8_t *)&ha->fw_seriallink_options, 3726 sizeof(ha->fw_seriallink_options)); 3727 3728 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3729 if (ha->fw_seriallink_options[3] & BIT_2) { 3730 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3731 3732 /* 1G settings */ 3733 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3734 emphasis = (ha->fw_seriallink_options[2] & 3735 (BIT_4 | BIT_3)) >> 3; 3736 tx_sens = ha->fw_seriallink_options[0] & 3737 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3738 rx_sens = (ha->fw_seriallink_options[0] & 3739 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3740 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3741 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3742 if (rx_sens == 0x0) 3743 rx_sens = 0x3; 3744 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3745 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3746 ha->fw_options[10] |= BIT_5 | 3747 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3748 (tx_sens & (BIT_1 | BIT_0)); 3749 3750 /* 2G settings */ 3751 swing = (ha->fw_seriallink_options[2] & 3752 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3753 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3754 tx_sens = ha->fw_seriallink_options[1] & 3755 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3756 rx_sens = (ha->fw_seriallink_options[1] & 3757 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3758 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3759 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3760 if (rx_sens == 0x0) 3761 rx_sens = 0x3; 3762 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3763 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3764 ha->fw_options[11] |= BIT_5 | 3765 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3766 (tx_sens & (BIT_1 | BIT_0)); 3767 } 3768 3769 /* FCP2 options. */ 3770 /* Return command IOCBs without waiting for an ABTS to complete. */ 3771 ha->fw_options[3] |= BIT_13; 3772 3773 /* LED scheme. */ 3774 if (ha->flags.enable_led_scheme) 3775 ha->fw_options[2] |= BIT_12; 3776 3777 /* Detect ISP6312. */ 3778 if (IS_QLA6312(ha)) 3779 ha->fw_options[2] |= BIT_13; 3780 3781 /* Set Retry FLOGI in case of P2P connection */ 3782 if (ha->operating_mode == P2P) { 3783 ha->fw_options[2] |= BIT_3; 3784 ql_dbg(ql_dbg_disc, vha, 0x2100, 3785 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3786 __func__, ha->fw_options[2]); 3787 } 3788 3789 /* Update firmware options. */ 3790 qla2x00_set_fw_options(vha, ha->fw_options); 3791 } 3792 3793 void 3794 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3795 { 3796 int rval; 3797 struct qla_hw_data *ha = vha->hw; 3798 3799 if (IS_P3P_TYPE(ha)) 3800 return; 3801 3802 /* Hold status IOCBs until ABTS response received. */ 3803 if (ql2xfwholdabts) 3804 ha->fw_options[3] |= BIT_12; 3805 3806 /* Set Retry FLOGI in case of P2P connection */ 3807 if (ha->operating_mode == P2P) { 3808 ha->fw_options[2] |= BIT_3; 3809 ql_dbg(ql_dbg_disc, vha, 0x2101, 3810 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3811 __func__, ha->fw_options[2]); 3812 } 3813 3814 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3815 if (ql2xmvasynctoatio && 3816 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3817 if (qla_tgt_mode_enabled(vha) || 3818 qla_dual_mode_enabled(vha)) 3819 ha->fw_options[2] |= BIT_11; 3820 else 3821 ha->fw_options[2] &= ~BIT_11; 3822 } 3823 3824 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3825 /* 3826 * Tell FW to track each exchange to prevent 3827 * driver from using stale exchange. 3828 */ 3829 if (qla_tgt_mode_enabled(vha) || 3830 qla_dual_mode_enabled(vha)) 3831 ha->fw_options[2] |= BIT_4; 3832 else 3833 ha->fw_options[2] &= ~BIT_4; 3834 3835 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3836 if (qla2xuseresexchforels) 3837 ha->fw_options[2] |= BIT_8; 3838 else 3839 ha->fw_options[2] &= ~BIT_8; 3840 } 3841 3842 ql_dbg(ql_dbg_init, vha, 0x00e8, 3843 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3844 __func__, ha->fw_options[1], ha->fw_options[2], 3845 ha->fw_options[3], vha->host->active_mode); 3846 3847 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3848 qla2x00_set_fw_options(vha, ha->fw_options); 3849 3850 /* Update Serial Link options. */ 3851 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3852 return; 3853 3854 rval = qla2x00_set_serdes_params(vha, 3855 le16_to_cpu(ha->fw_seriallink_options24[1]), 3856 le16_to_cpu(ha->fw_seriallink_options24[2]), 3857 le16_to_cpu(ha->fw_seriallink_options24[3])); 3858 if (rval != QLA_SUCCESS) { 3859 ql_log(ql_log_warn, vha, 0x0104, 3860 "Unable to update Serial Link options (%x).\n", rval); 3861 } 3862 } 3863 3864 void 3865 qla2x00_config_rings(struct scsi_qla_host *vha) 3866 { 3867 struct qla_hw_data *ha = vha->hw; 3868 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3869 struct req_que *req = ha->req_q_map[0]; 3870 struct rsp_que *rsp = ha->rsp_q_map[0]; 3871 3872 /* Setup ring parameters in initialization control block. */ 3873 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3874 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3875 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3876 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3877 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3878 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3879 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3880 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3881 3882 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3883 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3884 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3885 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3886 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3887 } 3888 3889 void 3890 qla24xx_config_rings(struct scsi_qla_host *vha) 3891 { 3892 struct qla_hw_data *ha = vha->hw; 3893 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3894 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3895 struct qla_msix_entry *msix; 3896 struct init_cb_24xx *icb; 3897 uint16_t rid = 0; 3898 struct req_que *req = ha->req_q_map[0]; 3899 struct rsp_que *rsp = ha->rsp_q_map[0]; 3900 3901 /* Setup ring parameters in initialization control block. */ 3902 icb = (struct init_cb_24xx *)ha->init_cb; 3903 icb->request_q_outpointer = cpu_to_le16(0); 3904 icb->response_q_inpointer = cpu_to_le16(0); 3905 icb->request_q_length = cpu_to_le16(req->length); 3906 icb->response_q_length = cpu_to_le16(rsp->length); 3907 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3908 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3909 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3910 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3911 3912 /* Setup ATIO queue dma pointers for target mode */ 3913 icb->atio_q_inpointer = cpu_to_le16(0); 3914 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3915 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3916 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3917 3918 if (IS_SHADOW_REG_CAPABLE(ha)) 3919 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3920 3921 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3922 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3923 icb->rid = cpu_to_le16(rid); 3924 if (ha->flags.msix_enabled) { 3925 msix = &ha->msix_entries[1]; 3926 ql_dbg(ql_dbg_init, vha, 0x0019, 3927 "Registering vector 0x%x for base que.\n", 3928 msix->entry); 3929 icb->msix = cpu_to_le16(msix->entry); 3930 } 3931 /* Use alternate PCI bus number */ 3932 if (MSB(rid)) 3933 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3934 /* Use alternate PCI devfn */ 3935 if (LSB(rid)) 3936 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3937 3938 /* Use Disable MSIX Handshake mode for capable adapters */ 3939 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3940 (ha->flags.msix_enabled)) { 3941 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3942 ha->flags.disable_msix_handshake = 1; 3943 ql_dbg(ql_dbg_init, vha, 0x00fe, 3944 "MSIX Handshake Disable Mode turned on.\n"); 3945 } else { 3946 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3947 } 3948 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3949 3950 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3951 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3952 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3953 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3954 } else { 3955 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3956 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3957 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3958 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3959 } 3960 qlt_24xx_config_rings(vha); 3961 3962 /* PCI posting */ 3963 RD_REG_DWORD(&ioreg->hccr); 3964 } 3965 3966 /** 3967 * qla2x00_init_rings() - Initializes firmware. 3968 * @vha: HA context 3969 * 3970 * Beginning of request ring has initialization control block already built 3971 * by nvram config routine. 3972 * 3973 * Returns 0 on success. 3974 */ 3975 int 3976 qla2x00_init_rings(scsi_qla_host_t *vha) 3977 { 3978 int rval; 3979 unsigned long flags = 0; 3980 int cnt, que; 3981 struct qla_hw_data *ha = vha->hw; 3982 struct req_que *req; 3983 struct rsp_que *rsp; 3984 struct mid_init_cb_24xx *mid_init_cb = 3985 (struct mid_init_cb_24xx *) ha->init_cb; 3986 3987 spin_lock_irqsave(&ha->hardware_lock, flags); 3988 3989 /* Clear outstanding commands array. */ 3990 for (que = 0; que < ha->max_req_queues; que++) { 3991 req = ha->req_q_map[que]; 3992 if (!req || !test_bit(que, ha->req_qid_map)) 3993 continue; 3994 req->out_ptr = (void *)(req->ring + req->length); 3995 *req->out_ptr = 0; 3996 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3997 req->outstanding_cmds[cnt] = NULL; 3998 3999 req->current_outstanding_cmd = 1; 4000 4001 /* Initialize firmware. */ 4002 req->ring_ptr = req->ring; 4003 req->ring_index = 0; 4004 req->cnt = req->length; 4005 } 4006 4007 for (que = 0; que < ha->max_rsp_queues; que++) { 4008 rsp = ha->rsp_q_map[que]; 4009 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4010 continue; 4011 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 4012 *rsp->in_ptr = 0; 4013 /* Initialize response queue entries */ 4014 if (IS_QLAFX00(ha)) 4015 qlafx00_init_response_q_entries(rsp); 4016 else 4017 qla2x00_init_response_q_entries(rsp); 4018 } 4019 4020 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4021 ha->tgt.atio_ring_index = 0; 4022 /* Initialize ATIO queue entries */ 4023 qlt_init_atio_q_entries(vha); 4024 4025 ha->isp_ops->config_rings(vha); 4026 4027 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4028 4029 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 4030 4031 if (IS_QLAFX00(ha)) { 4032 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4033 goto next_check; 4034 } 4035 4036 /* Update any ISP specific firmware options before initialization. */ 4037 ha->isp_ops->update_fw_options(vha); 4038 4039 if (ha->flags.npiv_supported) { 4040 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4041 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4042 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4043 } 4044 4045 if (IS_FWI2_CAPABLE(ha)) { 4046 mid_init_cb->options = cpu_to_le16(BIT_1); 4047 mid_init_cb->init_cb.execution_throttle = 4048 cpu_to_le16(ha->cur_fw_xcb_count); 4049 ha->flags.dport_enabled = 4050 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 4051 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4052 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4053 /* FA-WWPN Status */ 4054 ha->flags.fawwpn_enabled = 4055 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 4056 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4057 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4058 } 4059 4060 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4061 next_check: 4062 if (rval) { 4063 ql_log(ql_log_fatal, vha, 0x00d2, 4064 "Init Firmware **** FAILED ****.\n"); 4065 } else { 4066 ql_dbg(ql_dbg_init, vha, 0x00d3, 4067 "Init Firmware -- success.\n"); 4068 QLA_FW_STARTED(ha); 4069 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4070 } 4071 4072 return (rval); 4073 } 4074 4075 /** 4076 * qla2x00_fw_ready() - Waits for firmware ready. 4077 * @vha: HA context 4078 * 4079 * Returns 0 on success. 4080 */ 4081 static int 4082 qla2x00_fw_ready(scsi_qla_host_t *vha) 4083 { 4084 int rval; 4085 unsigned long wtime, mtime, cs84xx_time; 4086 uint16_t min_wait; /* Minimum wait time if loop is down */ 4087 uint16_t wait_time; /* Wait time if loop is coming ready */ 4088 uint16_t state[6]; 4089 struct qla_hw_data *ha = vha->hw; 4090 4091 if (IS_QLAFX00(vha->hw)) 4092 return qlafx00_fw_ready(vha); 4093 4094 rval = QLA_SUCCESS; 4095 4096 /* Time to wait for loop down */ 4097 if (IS_P3P_TYPE(ha)) 4098 min_wait = 30; 4099 else 4100 min_wait = 20; 4101 4102 /* 4103 * Firmware should take at most one RATOV to login, plus 5 seconds for 4104 * our own processing. 4105 */ 4106 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4107 wait_time = min_wait; 4108 } 4109 4110 /* Min wait time if loop down */ 4111 mtime = jiffies + (min_wait * HZ); 4112 4113 /* wait time before firmware ready */ 4114 wtime = jiffies + (wait_time * HZ); 4115 4116 /* Wait for ISP to finish LIP */ 4117 if (!vha->flags.init_done) 4118 ql_log(ql_log_info, vha, 0x801e, 4119 "Waiting for LIP to complete.\n"); 4120 4121 do { 4122 memset(state, -1, sizeof(state)); 4123 rval = qla2x00_get_firmware_state(vha, state); 4124 if (rval == QLA_SUCCESS) { 4125 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4126 vha->device_flags &= ~DFLG_NO_CABLE; 4127 } 4128 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4129 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4130 "fw_state=%x 84xx=%x.\n", state[0], 4131 state[2]); 4132 if ((state[2] & FSTATE_LOGGED_IN) && 4133 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4134 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4135 "Sending verify iocb.\n"); 4136 4137 cs84xx_time = jiffies; 4138 rval = qla84xx_init_chip(vha); 4139 if (rval != QLA_SUCCESS) { 4140 ql_log(ql_log_warn, 4141 vha, 0x8007, 4142 "Init chip failed.\n"); 4143 break; 4144 } 4145 4146 /* Add time taken to initialize. */ 4147 cs84xx_time = jiffies - cs84xx_time; 4148 wtime += cs84xx_time; 4149 mtime += cs84xx_time; 4150 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4151 "Increasing wait time by %ld. " 4152 "New time %ld.\n", cs84xx_time, 4153 wtime); 4154 } 4155 } else if (state[0] == FSTATE_READY) { 4156 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4157 "F/W Ready - OK.\n"); 4158 4159 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4160 &ha->login_timeout, &ha->r_a_tov); 4161 4162 rval = QLA_SUCCESS; 4163 break; 4164 } 4165 4166 rval = QLA_FUNCTION_FAILED; 4167 4168 if (atomic_read(&vha->loop_down_timer) && 4169 state[0] != FSTATE_READY) { 4170 /* Loop down. Timeout on min_wait for states 4171 * other than Wait for Login. 4172 */ 4173 if (time_after_eq(jiffies, mtime)) { 4174 ql_log(ql_log_info, vha, 0x8038, 4175 "Cable is unplugged...\n"); 4176 4177 vha->device_flags |= DFLG_NO_CABLE; 4178 break; 4179 } 4180 } 4181 } else { 4182 /* Mailbox cmd failed. Timeout on min_wait. */ 4183 if (time_after_eq(jiffies, mtime) || 4184 ha->flags.isp82xx_fw_hung) 4185 break; 4186 } 4187 4188 if (time_after_eq(jiffies, wtime)) 4189 break; 4190 4191 /* Delay for a while */ 4192 msleep(500); 4193 } while (1); 4194 4195 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4196 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4197 state[1], state[2], state[3], state[4], state[5], jiffies); 4198 4199 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4200 ql_log(ql_log_warn, vha, 0x803b, 4201 "Firmware ready **** FAILED ****.\n"); 4202 } 4203 4204 return (rval); 4205 } 4206 4207 /* 4208 * qla2x00_configure_hba 4209 * Setup adapter context. 4210 * 4211 * Input: 4212 * ha = adapter state pointer. 4213 * 4214 * Returns: 4215 * 0 = success 4216 * 4217 * Context: 4218 * Kernel context. 4219 */ 4220 static int 4221 qla2x00_configure_hba(scsi_qla_host_t *vha) 4222 { 4223 int rval; 4224 uint16_t loop_id; 4225 uint16_t topo; 4226 uint16_t sw_cap; 4227 uint8_t al_pa; 4228 uint8_t area; 4229 uint8_t domain; 4230 char connect_type[22]; 4231 struct qla_hw_data *ha = vha->hw; 4232 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4233 port_id_t id; 4234 unsigned long flags; 4235 4236 /* Get host addresses. */ 4237 rval = qla2x00_get_adapter_id(vha, 4238 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4239 if (rval != QLA_SUCCESS) { 4240 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4241 IS_CNA_CAPABLE(ha) || 4242 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4243 ql_dbg(ql_dbg_disc, vha, 0x2008, 4244 "Loop is in a transition state.\n"); 4245 } else { 4246 ql_log(ql_log_warn, vha, 0x2009, 4247 "Unable to get host loop ID.\n"); 4248 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4249 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4250 ql_log(ql_log_warn, vha, 0x1151, 4251 "Doing link init.\n"); 4252 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4253 return rval; 4254 } 4255 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4256 } 4257 return (rval); 4258 } 4259 4260 if (topo == 4) { 4261 ql_log(ql_log_info, vha, 0x200a, 4262 "Cannot get topology - retrying.\n"); 4263 return (QLA_FUNCTION_FAILED); 4264 } 4265 4266 vha->loop_id = loop_id; 4267 4268 /* initialize */ 4269 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4270 ha->operating_mode = LOOP; 4271 ha->switch_cap = 0; 4272 4273 switch (topo) { 4274 case 0: 4275 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4276 ha->current_topology = ISP_CFG_NL; 4277 strcpy(connect_type, "(Loop)"); 4278 break; 4279 4280 case 1: 4281 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4282 ha->switch_cap = sw_cap; 4283 ha->current_topology = ISP_CFG_FL; 4284 strcpy(connect_type, "(FL_Port)"); 4285 break; 4286 4287 case 2: 4288 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4289 ha->operating_mode = P2P; 4290 ha->current_topology = ISP_CFG_N; 4291 strcpy(connect_type, "(N_Port-to-N_Port)"); 4292 break; 4293 4294 case 3: 4295 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4296 ha->switch_cap = sw_cap; 4297 ha->operating_mode = P2P; 4298 ha->current_topology = ISP_CFG_F; 4299 strcpy(connect_type, "(F_Port)"); 4300 break; 4301 4302 default: 4303 ql_dbg(ql_dbg_disc, vha, 0x200f, 4304 "HBA in unknown topology %x, using NL.\n", topo); 4305 ha->current_topology = ISP_CFG_NL; 4306 strcpy(connect_type, "(Loop)"); 4307 break; 4308 } 4309 4310 /* Save Host port and loop ID. */ 4311 /* byte order - Big Endian */ 4312 id.b.domain = domain; 4313 id.b.area = area; 4314 id.b.al_pa = al_pa; 4315 id.b.rsvd_1 = 0; 4316 spin_lock_irqsave(&ha->hardware_lock, flags); 4317 if (!(topo == 2 && ha->flags.n2n_bigger)) 4318 qlt_update_host_map(vha, id); 4319 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4320 4321 if (!vha->flags.init_done) 4322 ql_log(ql_log_info, vha, 0x2010, 4323 "Topology - %s, Host Loop address 0x%x.\n", 4324 connect_type, vha->loop_id); 4325 4326 return(rval); 4327 } 4328 4329 inline void 4330 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4331 char *def) 4332 { 4333 char *st, *en; 4334 uint16_t index; 4335 struct qla_hw_data *ha = vha->hw; 4336 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4337 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4338 4339 if (memcmp(model, BINZERO, len) != 0) { 4340 strncpy(ha->model_number, model, len); 4341 st = en = ha->model_number; 4342 en += len - 1; 4343 while (en > st) { 4344 if (*en != 0x20 && *en != 0x00) 4345 break; 4346 *en-- = '\0'; 4347 } 4348 4349 index = (ha->pdev->subsystem_device & 0xff); 4350 if (use_tbl && 4351 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4352 index < QLA_MODEL_NAMES) 4353 strncpy(ha->model_desc, 4354 qla2x00_model_name[index * 2 + 1], 4355 sizeof(ha->model_desc) - 1); 4356 } else { 4357 index = (ha->pdev->subsystem_device & 0xff); 4358 if (use_tbl && 4359 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4360 index < QLA_MODEL_NAMES) { 4361 strcpy(ha->model_number, 4362 qla2x00_model_name[index * 2]); 4363 strncpy(ha->model_desc, 4364 qla2x00_model_name[index * 2 + 1], 4365 sizeof(ha->model_desc) - 1); 4366 } else { 4367 strcpy(ha->model_number, def); 4368 } 4369 } 4370 if (IS_FWI2_CAPABLE(ha)) 4371 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4372 sizeof(ha->model_desc)); 4373 } 4374 4375 /* On sparc systems, obtain port and node WWN from firmware 4376 * properties. 4377 */ 4378 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4379 { 4380 #ifdef CONFIG_SPARC 4381 struct qla_hw_data *ha = vha->hw; 4382 struct pci_dev *pdev = ha->pdev; 4383 struct device_node *dp = pci_device_to_OF_node(pdev); 4384 const u8 *val; 4385 int len; 4386 4387 val = of_get_property(dp, "port-wwn", &len); 4388 if (val && len >= WWN_SIZE) 4389 memcpy(nv->port_name, val, WWN_SIZE); 4390 4391 val = of_get_property(dp, "node-wwn", &len); 4392 if (val && len >= WWN_SIZE) 4393 memcpy(nv->node_name, val, WWN_SIZE); 4394 #endif 4395 } 4396 4397 /* 4398 * NVRAM configuration for ISP 2xxx 4399 * 4400 * Input: 4401 * ha = adapter block pointer. 4402 * 4403 * Output: 4404 * initialization control block in response_ring 4405 * host adapters parameters in host adapter block 4406 * 4407 * Returns: 4408 * 0 = success. 4409 */ 4410 int 4411 qla2x00_nvram_config(scsi_qla_host_t *vha) 4412 { 4413 int rval; 4414 uint8_t chksum = 0; 4415 uint16_t cnt; 4416 uint8_t *dptr1, *dptr2; 4417 struct qla_hw_data *ha = vha->hw; 4418 init_cb_t *icb = ha->init_cb; 4419 nvram_t *nv = ha->nvram; 4420 uint8_t *ptr = ha->nvram; 4421 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4422 4423 rval = QLA_SUCCESS; 4424 4425 /* Determine NVRAM starting address. */ 4426 ha->nvram_size = sizeof(nvram_t); 4427 ha->nvram_base = 0; 4428 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4429 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4430 ha->nvram_base = 0x80; 4431 4432 /* Get NVRAM data and calculate checksum. */ 4433 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4434 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4435 chksum += *ptr++; 4436 4437 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4438 "Contents of NVRAM.\n"); 4439 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4440 (uint8_t *)nv, ha->nvram_size); 4441 4442 /* Bad NVRAM data, set defaults parameters. */ 4443 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4444 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4445 /* Reset NVRAM data. */ 4446 ql_log(ql_log_warn, vha, 0x0064, 4447 "Inconsistent NVRAM " 4448 "detected: checksum=0x%x id=%c version=0x%x.\n", 4449 chksum, nv->id[0], nv->nvram_version); 4450 ql_log(ql_log_warn, vha, 0x0065, 4451 "Falling back to " 4452 "functioning (yet invalid -- WWPN) defaults.\n"); 4453 4454 /* 4455 * Set default initialization control block. 4456 */ 4457 memset(nv, 0, ha->nvram_size); 4458 nv->parameter_block_version = ICB_VERSION; 4459 4460 if (IS_QLA23XX(ha)) { 4461 nv->firmware_options[0] = BIT_2 | BIT_1; 4462 nv->firmware_options[1] = BIT_7 | BIT_5; 4463 nv->add_firmware_options[0] = BIT_5; 4464 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4465 nv->frame_payload_size = 2048; 4466 nv->special_options[1] = BIT_7; 4467 } else if (IS_QLA2200(ha)) { 4468 nv->firmware_options[0] = BIT_2 | BIT_1; 4469 nv->firmware_options[1] = BIT_7 | BIT_5; 4470 nv->add_firmware_options[0] = BIT_5; 4471 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4472 nv->frame_payload_size = 1024; 4473 } else if (IS_QLA2100(ha)) { 4474 nv->firmware_options[0] = BIT_3 | BIT_1; 4475 nv->firmware_options[1] = BIT_5; 4476 nv->frame_payload_size = 1024; 4477 } 4478 4479 nv->max_iocb_allocation = cpu_to_le16(256); 4480 nv->execution_throttle = cpu_to_le16(16); 4481 nv->retry_count = 8; 4482 nv->retry_delay = 1; 4483 4484 nv->port_name[0] = 33; 4485 nv->port_name[3] = 224; 4486 nv->port_name[4] = 139; 4487 4488 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4489 4490 nv->login_timeout = 4; 4491 4492 /* 4493 * Set default host adapter parameters 4494 */ 4495 nv->host_p[1] = BIT_2; 4496 nv->reset_delay = 5; 4497 nv->port_down_retry_count = 8; 4498 nv->max_luns_per_target = cpu_to_le16(8); 4499 nv->link_down_timeout = 60; 4500 4501 rval = 1; 4502 } 4503 4504 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4505 /* 4506 * The SN2 does not provide BIOS emulation which means you can't change 4507 * potentially bogus BIOS settings. Force the use of default settings 4508 * for link rate and frame size. Hope that the rest of the settings 4509 * are valid. 4510 */ 4511 if (ia64_platform_is("sn2")) { 4512 nv->frame_payload_size = 2048; 4513 if (IS_QLA23XX(ha)) 4514 nv->special_options[1] = BIT_7; 4515 } 4516 #endif 4517 4518 /* Reset Initialization control block */ 4519 memset(icb, 0, ha->init_cb_size); 4520 4521 /* 4522 * Setup driver NVRAM options. 4523 */ 4524 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4525 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4526 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4527 nv->firmware_options[1] &= ~BIT_4; 4528 4529 if (IS_QLA23XX(ha)) { 4530 nv->firmware_options[0] |= BIT_2; 4531 nv->firmware_options[0] &= ~BIT_3; 4532 nv->special_options[0] &= ~BIT_6; 4533 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4534 4535 if (IS_QLA2300(ha)) { 4536 if (ha->fb_rev == FPM_2310) { 4537 strcpy(ha->model_number, "QLA2310"); 4538 } else { 4539 strcpy(ha->model_number, "QLA2300"); 4540 } 4541 } else { 4542 qla2x00_set_model_info(vha, nv->model_number, 4543 sizeof(nv->model_number), "QLA23xx"); 4544 } 4545 } else if (IS_QLA2200(ha)) { 4546 nv->firmware_options[0] |= BIT_2; 4547 /* 4548 * 'Point-to-point preferred, else loop' is not a safe 4549 * connection mode setting. 4550 */ 4551 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4552 (BIT_5 | BIT_4)) { 4553 /* Force 'loop preferred, else point-to-point'. */ 4554 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4555 nv->add_firmware_options[0] |= BIT_5; 4556 } 4557 strcpy(ha->model_number, "QLA22xx"); 4558 } else /*if (IS_QLA2100(ha))*/ { 4559 strcpy(ha->model_number, "QLA2100"); 4560 } 4561 4562 /* 4563 * Copy over NVRAM RISC parameter block to initialization control block. 4564 */ 4565 dptr1 = (uint8_t *)icb; 4566 dptr2 = (uint8_t *)&nv->parameter_block_version; 4567 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4568 while (cnt--) 4569 *dptr1++ = *dptr2++; 4570 4571 /* Copy 2nd half. */ 4572 dptr1 = (uint8_t *)icb->add_firmware_options; 4573 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4574 while (cnt--) 4575 *dptr1++ = *dptr2++; 4576 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4577 /* Use alternate WWN? */ 4578 if (nv->host_p[1] & BIT_7) { 4579 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4580 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4581 } 4582 4583 /* Prepare nodename */ 4584 if ((icb->firmware_options[1] & BIT_6) == 0) { 4585 /* 4586 * Firmware will apply the following mask if the nodename was 4587 * not provided. 4588 */ 4589 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4590 icb->node_name[0] &= 0xF0; 4591 } 4592 4593 /* 4594 * Set host adapter parameters. 4595 */ 4596 4597 /* 4598 * BIT_7 in the host-parameters section allows for modification to 4599 * internal driver logging. 4600 */ 4601 if (nv->host_p[0] & BIT_7) 4602 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4603 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4604 /* Always load RISC code on non ISP2[12]00 chips. */ 4605 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4606 ha->flags.disable_risc_code_load = 0; 4607 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4608 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4609 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4610 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4611 ha->flags.disable_serdes = 0; 4612 4613 ha->operating_mode = 4614 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4615 4616 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4617 sizeof(ha->fw_seriallink_options)); 4618 4619 /* save HBA serial number */ 4620 ha->serial0 = icb->port_name[5]; 4621 ha->serial1 = icb->port_name[6]; 4622 ha->serial2 = icb->port_name[7]; 4623 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4624 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4625 4626 icb->execution_throttle = cpu_to_le16(0xFFFF); 4627 4628 ha->retry_count = nv->retry_count; 4629 4630 /* Set minimum login_timeout to 4 seconds. */ 4631 if (nv->login_timeout != ql2xlogintimeout) 4632 nv->login_timeout = ql2xlogintimeout; 4633 if (nv->login_timeout < 4) 4634 nv->login_timeout = 4; 4635 ha->login_timeout = nv->login_timeout; 4636 4637 /* Set minimum RATOV to 100 tenths of a second. */ 4638 ha->r_a_tov = 100; 4639 4640 ha->loop_reset_delay = nv->reset_delay; 4641 4642 /* Link Down Timeout = 0: 4643 * 4644 * When Port Down timer expires we will start returning 4645 * I/O's to OS with "DID_NO_CONNECT". 4646 * 4647 * Link Down Timeout != 0: 4648 * 4649 * The driver waits for the link to come up after link down 4650 * before returning I/Os to OS with "DID_NO_CONNECT". 4651 */ 4652 if (nv->link_down_timeout == 0) { 4653 ha->loop_down_abort_time = 4654 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4655 } else { 4656 ha->link_down_timeout = nv->link_down_timeout; 4657 ha->loop_down_abort_time = 4658 (LOOP_DOWN_TIME - ha->link_down_timeout); 4659 } 4660 4661 /* 4662 * Need enough time to try and get the port back. 4663 */ 4664 ha->port_down_retry_count = nv->port_down_retry_count; 4665 if (qlport_down_retry) 4666 ha->port_down_retry_count = qlport_down_retry; 4667 /* Set login_retry_count */ 4668 ha->login_retry_count = nv->retry_count; 4669 if (ha->port_down_retry_count == nv->port_down_retry_count && 4670 ha->port_down_retry_count > 3) 4671 ha->login_retry_count = ha->port_down_retry_count; 4672 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4673 ha->login_retry_count = ha->port_down_retry_count; 4674 if (ql2xloginretrycount) 4675 ha->login_retry_count = ql2xloginretrycount; 4676 4677 icb->lun_enables = cpu_to_le16(0); 4678 icb->command_resource_count = 0; 4679 icb->immediate_notify_resource_count = 0; 4680 icb->timeout = cpu_to_le16(0); 4681 4682 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4683 /* Enable RIO */ 4684 icb->firmware_options[0] &= ~BIT_3; 4685 icb->add_firmware_options[0] &= 4686 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4687 icb->add_firmware_options[0] |= BIT_2; 4688 icb->response_accumulation_timer = 3; 4689 icb->interrupt_delay_timer = 5; 4690 4691 vha->flags.process_response_queue = 1; 4692 } else { 4693 /* Enable ZIO. */ 4694 if (!vha->flags.init_done) { 4695 ha->zio_mode = icb->add_firmware_options[0] & 4696 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4697 ha->zio_timer = icb->interrupt_delay_timer ? 4698 icb->interrupt_delay_timer: 2; 4699 } 4700 icb->add_firmware_options[0] &= 4701 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4702 vha->flags.process_response_queue = 0; 4703 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4704 ha->zio_mode = QLA_ZIO_MODE_6; 4705 4706 ql_log(ql_log_info, vha, 0x0068, 4707 "ZIO mode %d enabled; timer delay (%d us).\n", 4708 ha->zio_mode, ha->zio_timer * 100); 4709 4710 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4711 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4712 vha->flags.process_response_queue = 1; 4713 } 4714 } 4715 4716 if (rval) { 4717 ql_log(ql_log_warn, vha, 0x0069, 4718 "NVRAM configuration failed.\n"); 4719 } 4720 return (rval); 4721 } 4722 4723 static void 4724 qla2x00_rport_del(void *data) 4725 { 4726 fc_port_t *fcport = data; 4727 struct fc_rport *rport; 4728 unsigned long flags; 4729 4730 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4731 rport = fcport->drport ? fcport->drport: fcport->rport; 4732 fcport->drport = NULL; 4733 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4734 if (rport) { 4735 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4736 "%s %8phN. rport %p roles %x\n", 4737 __func__, fcport->port_name, rport, 4738 rport->roles); 4739 4740 fc_remote_port_delete(rport); 4741 } 4742 } 4743 4744 /** 4745 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4746 * @vha: HA context 4747 * @flags: allocation flags 4748 * 4749 * Returns a pointer to the allocated fcport, or NULL, if none available. 4750 */ 4751 fc_port_t * 4752 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4753 { 4754 fc_port_t *fcport; 4755 4756 fcport = kzalloc(sizeof(fc_port_t), flags); 4757 if (!fcport) 4758 return NULL; 4759 4760 /* Setup fcport template structure. */ 4761 fcport->vha = vha; 4762 fcport->port_type = FCT_UNKNOWN; 4763 fcport->loop_id = FC_NO_LOOP_ID; 4764 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4765 fcport->supported_classes = FC_COS_UNSPECIFIED; 4766 fcport->fp_speed = PORT_SPEED_UNKNOWN; 4767 4768 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4769 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4770 flags); 4771 fcport->disc_state = DSC_DELETED; 4772 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4773 fcport->deleted = QLA_SESS_DELETED; 4774 fcport->login_retry = vha->hw->login_retry_count; 4775 fcport->logout_on_delete = 1; 4776 4777 if (!fcport->ct_desc.ct_sns) { 4778 ql_log(ql_log_warn, vha, 0xd049, 4779 "Failed to allocate ct_sns request.\n"); 4780 kfree(fcport); 4781 fcport = NULL; 4782 } 4783 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4784 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 4785 INIT_LIST_HEAD(&fcport->gnl_entry); 4786 INIT_LIST_HEAD(&fcport->list); 4787 4788 return fcport; 4789 } 4790 4791 void 4792 qla2x00_free_fcport(fc_port_t *fcport) 4793 { 4794 if (fcport->ct_desc.ct_sns) { 4795 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4796 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4797 fcport->ct_desc.ct_sns_dma); 4798 4799 fcport->ct_desc.ct_sns = NULL; 4800 } 4801 kfree(fcport); 4802 } 4803 4804 /* 4805 * qla2x00_configure_loop 4806 * Updates Fibre Channel Device Database with what is actually on loop. 4807 * 4808 * Input: 4809 * ha = adapter block pointer. 4810 * 4811 * Returns: 4812 * 0 = success. 4813 * 1 = error. 4814 * 2 = database was full and device was not configured. 4815 */ 4816 static int 4817 qla2x00_configure_loop(scsi_qla_host_t *vha) 4818 { 4819 int rval; 4820 unsigned long flags, save_flags; 4821 struct qla_hw_data *ha = vha->hw; 4822 rval = QLA_SUCCESS; 4823 4824 /* Get Initiator ID */ 4825 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4826 rval = qla2x00_configure_hba(vha); 4827 if (rval != QLA_SUCCESS) { 4828 ql_dbg(ql_dbg_disc, vha, 0x2013, 4829 "Unable to configure HBA.\n"); 4830 return (rval); 4831 } 4832 } 4833 4834 save_flags = flags = vha->dpc_flags; 4835 ql_dbg(ql_dbg_disc, vha, 0x2014, 4836 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4837 4838 /* 4839 * If we have both an RSCN and PORT UPDATE pending then handle them 4840 * both at the same time. 4841 */ 4842 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4843 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4844 4845 qla2x00_get_data_rate(vha); 4846 4847 /* Determine what we need to do */ 4848 if (ha->current_topology == ISP_CFG_FL && 4849 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4850 4851 set_bit(RSCN_UPDATE, &flags); 4852 4853 } else if (ha->current_topology == ISP_CFG_F && 4854 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4855 4856 set_bit(RSCN_UPDATE, &flags); 4857 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4858 4859 } else if (ha->current_topology == ISP_CFG_N) { 4860 clear_bit(RSCN_UPDATE, &flags); 4861 if (qla_tgt_mode_enabled(vha)) { 4862 /* allow the other side to start the login */ 4863 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4864 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4865 } 4866 } else if (ha->current_topology == ISP_CFG_NL) { 4867 clear_bit(RSCN_UPDATE, &flags); 4868 set_bit(LOCAL_LOOP_UPDATE, &flags); 4869 } else if (!vha->flags.online || 4870 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4871 set_bit(RSCN_UPDATE, &flags); 4872 set_bit(LOCAL_LOOP_UPDATE, &flags); 4873 } 4874 4875 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4876 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4877 ql_dbg(ql_dbg_disc, vha, 0x2015, 4878 "Loop resync needed, failing.\n"); 4879 rval = QLA_FUNCTION_FAILED; 4880 } else 4881 rval = qla2x00_configure_local_loop(vha); 4882 } 4883 4884 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4885 if (LOOP_TRANSITION(vha)) { 4886 ql_dbg(ql_dbg_disc, vha, 0x2099, 4887 "Needs RSCN update and loop transition.\n"); 4888 rval = QLA_FUNCTION_FAILED; 4889 } 4890 else 4891 rval = qla2x00_configure_fabric(vha); 4892 } 4893 4894 if (rval == QLA_SUCCESS) { 4895 if (atomic_read(&vha->loop_down_timer) || 4896 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4897 rval = QLA_FUNCTION_FAILED; 4898 } else { 4899 atomic_set(&vha->loop_state, LOOP_READY); 4900 ql_dbg(ql_dbg_disc, vha, 0x2069, 4901 "LOOP READY.\n"); 4902 ha->flags.fw_init_done = 1; 4903 4904 /* 4905 * Process any ATIO queue entries that came in 4906 * while we weren't online. 4907 */ 4908 if (qla_tgt_mode_enabled(vha) || 4909 qla_dual_mode_enabled(vha)) { 4910 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 4911 qlt_24xx_process_atio_queue(vha, 0); 4912 spin_unlock_irqrestore(&ha->tgt.atio_lock, 4913 flags); 4914 } 4915 } 4916 } 4917 4918 if (rval) { 4919 ql_dbg(ql_dbg_disc, vha, 0x206a, 4920 "%s *** FAILED ***.\n", __func__); 4921 } else { 4922 ql_dbg(ql_dbg_disc, vha, 0x206b, 4923 "%s: exiting normally.\n", __func__); 4924 } 4925 4926 /* Restore state if a resync event occurred during processing */ 4927 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4928 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4929 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4930 if (test_bit(RSCN_UPDATE, &save_flags)) { 4931 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4932 } 4933 } 4934 4935 return (rval); 4936 } 4937 4938 /* 4939 * qla2x00_configure_local_loop 4940 * Updates Fibre Channel Device Database with local loop devices. 4941 * 4942 * Input: 4943 * ha = adapter block pointer. 4944 * 4945 * Returns: 4946 * 0 = success. 4947 */ 4948 static int 4949 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4950 { 4951 int rval, rval2; 4952 int found_devs; 4953 int found; 4954 fc_port_t *fcport, *new_fcport; 4955 4956 uint16_t index; 4957 uint16_t entries; 4958 char *id_iter; 4959 uint16_t loop_id; 4960 uint8_t domain, area, al_pa; 4961 struct qla_hw_data *ha = vha->hw; 4962 unsigned long flags; 4963 4964 /* Inititae N2N login. */ 4965 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4966 /* borrowing */ 4967 u32 *bp, i, sz; 4968 4969 memset(ha->init_cb, 0, ha->init_cb_size); 4970 sz = min_t(int, sizeof(struct els_plogi_payload), 4971 ha->init_cb_size); 4972 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 4973 (void *)ha->init_cb, sz); 4974 if (rval == QLA_SUCCESS) { 4975 bp = (uint32_t *)ha->init_cb; 4976 for (i = 0; i < sz/4 ; i++, bp++) 4977 *bp = cpu_to_be32(*bp); 4978 4979 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb, 4980 sizeof(ha->plogi_els_payld.data)); 4981 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4982 } else { 4983 ql_dbg(ql_dbg_init, vha, 0x00d1, 4984 "PLOGI ELS param read fail.\n"); 4985 } 4986 return QLA_SUCCESS; 4987 } 4988 4989 found_devs = 0; 4990 new_fcport = NULL; 4991 entries = MAX_FIBRE_DEVICES_LOOP; 4992 4993 /* Get list of logged in devices. */ 4994 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4995 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4996 &entries); 4997 if (rval != QLA_SUCCESS) 4998 goto cleanup_allocation; 4999 5000 ql_dbg(ql_dbg_disc, vha, 0x2011, 5001 "Entries in ID list (%d).\n", entries); 5002 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5003 (uint8_t *)ha->gid_list, 5004 entries * sizeof(struct gid_list_info)); 5005 5006 if (entries == 0) { 5007 spin_lock_irqsave(&vha->work_lock, flags); 5008 vha->scan.scan_retry++; 5009 spin_unlock_irqrestore(&vha->work_lock, flags); 5010 5011 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5012 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5013 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5014 } 5015 } else { 5016 vha->scan.scan_retry = 0; 5017 } 5018 5019 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5020 fcport->scan_state = QLA_FCPORT_SCAN; 5021 } 5022 5023 /* Allocate temporary fcport for any new fcports discovered. */ 5024 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5025 if (new_fcport == NULL) { 5026 ql_log(ql_log_warn, vha, 0x2012, 5027 "Memory allocation failed for fcport.\n"); 5028 rval = QLA_MEMORY_ALLOC_FAILED; 5029 goto cleanup_allocation; 5030 } 5031 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5032 5033 /* Add devices to port list. */ 5034 id_iter = (char *)ha->gid_list; 5035 for (index = 0; index < entries; index++) { 5036 domain = ((struct gid_list_info *)id_iter)->domain; 5037 area = ((struct gid_list_info *)id_iter)->area; 5038 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 5039 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5040 loop_id = (uint16_t) 5041 ((struct gid_list_info *)id_iter)->loop_id_2100; 5042 else 5043 loop_id = le16_to_cpu( 5044 ((struct gid_list_info *)id_iter)->loop_id); 5045 id_iter += ha->gid_list_info_size; 5046 5047 /* Bypass reserved domain fields. */ 5048 if ((domain & 0xf0) == 0xf0) 5049 continue; 5050 5051 /* Bypass if not same domain and area of adapter. */ 5052 if (area && domain && 5053 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 5054 continue; 5055 5056 /* Bypass invalid local loop ID. */ 5057 if (loop_id > LAST_LOCAL_LOOP_ID) 5058 continue; 5059 5060 memset(new_fcport->port_name, 0, WWN_SIZE); 5061 5062 /* Fill in member data. */ 5063 new_fcport->d_id.b.domain = domain; 5064 new_fcport->d_id.b.area = area; 5065 new_fcport->d_id.b.al_pa = al_pa; 5066 new_fcport->loop_id = loop_id; 5067 new_fcport->scan_state = QLA_FCPORT_FOUND; 5068 5069 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5070 if (rval2 != QLA_SUCCESS) { 5071 ql_dbg(ql_dbg_disc, vha, 0x2097, 5072 "Failed to retrieve fcport information " 5073 "-- get_port_database=%x, loop_id=0x%04x.\n", 5074 rval2, new_fcport->loop_id); 5075 /* Skip retry if N2N */ 5076 if (ha->current_topology != ISP_CFG_N) { 5077 ql_dbg(ql_dbg_disc, vha, 0x2105, 5078 "Scheduling resync.\n"); 5079 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5080 continue; 5081 } 5082 } 5083 5084 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5085 /* Check for matching device in port list. */ 5086 found = 0; 5087 fcport = NULL; 5088 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5089 if (memcmp(new_fcport->port_name, fcport->port_name, 5090 WWN_SIZE)) 5091 continue; 5092 5093 fcport->flags &= ~FCF_FABRIC_DEVICE; 5094 fcport->loop_id = new_fcport->loop_id; 5095 fcport->port_type = new_fcport->port_type; 5096 fcport->d_id.b24 = new_fcport->d_id.b24; 5097 memcpy(fcport->node_name, new_fcport->node_name, 5098 WWN_SIZE); 5099 fcport->scan_state = QLA_FCPORT_FOUND; 5100 found++; 5101 break; 5102 } 5103 5104 if (!found) { 5105 /* New device, add to fcports list. */ 5106 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5107 5108 /* Allocate a new replacement fcport. */ 5109 fcport = new_fcport; 5110 5111 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5112 5113 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5114 5115 if (new_fcport == NULL) { 5116 ql_log(ql_log_warn, vha, 0xd031, 5117 "Failed to allocate memory for fcport.\n"); 5118 rval = QLA_MEMORY_ALLOC_FAILED; 5119 goto cleanup_allocation; 5120 } 5121 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5122 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5123 } 5124 5125 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5126 5127 /* Base iIDMA settings on HBA port speed. */ 5128 fcport->fp_speed = ha->link_data_rate; 5129 5130 found_devs++; 5131 } 5132 5133 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5134 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5135 break; 5136 5137 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5138 if ((qla_dual_mode_enabled(vha) || 5139 qla_ini_mode_enabled(vha)) && 5140 atomic_read(&fcport->state) == FCS_ONLINE) { 5141 qla2x00_mark_device_lost(vha, fcport, 5142 ql2xplogiabsentdevice, 0); 5143 if (fcport->loop_id != FC_NO_LOOP_ID && 5144 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5145 fcport->port_type != FCT_INITIATOR && 5146 fcport->port_type != FCT_BROADCAST) { 5147 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5148 "%s %d %8phC post del sess\n", 5149 __func__, __LINE__, 5150 fcport->port_name); 5151 5152 qlt_schedule_sess_for_deletion(fcport); 5153 continue; 5154 } 5155 } 5156 } 5157 5158 if (fcport->scan_state == QLA_FCPORT_FOUND) 5159 qla24xx_fcport_handle_login(vha, fcport); 5160 } 5161 5162 cleanup_allocation: 5163 kfree(new_fcport); 5164 5165 if (rval != QLA_SUCCESS) { 5166 ql_dbg(ql_dbg_disc, vha, 0x2098, 5167 "Configure local loop error exit: rval=%x.\n", rval); 5168 } 5169 5170 return (rval); 5171 } 5172 5173 static void 5174 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5175 { 5176 int rval; 5177 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5178 struct qla_hw_data *ha = vha->hw; 5179 5180 if (!IS_IIDMA_CAPABLE(ha)) 5181 return; 5182 5183 if (atomic_read(&fcport->state) != FCS_ONLINE) 5184 return; 5185 5186 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5187 fcport->fp_speed > ha->link_data_rate || 5188 !ha->flags.gpsc_supported) 5189 return; 5190 5191 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5192 mb); 5193 if (rval != QLA_SUCCESS) { 5194 ql_dbg(ql_dbg_disc, vha, 0x2004, 5195 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5196 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5197 } else { 5198 ql_dbg(ql_dbg_disc, vha, 0x2005, 5199 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5200 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5201 fcport->fp_speed, fcport->port_name); 5202 } 5203 } 5204 5205 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5206 { 5207 qla2x00_iidma_fcport(vha, fcport); 5208 qla24xx_update_fcport_fcp_prio(vha, fcport); 5209 } 5210 5211 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5212 { 5213 struct qla_work_evt *e; 5214 5215 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5216 if (!e) 5217 return QLA_FUNCTION_FAILED; 5218 5219 e->u.fcport.fcport = fcport; 5220 return qla2x00_post_work(vha, e); 5221 } 5222 5223 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5224 static void 5225 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5226 { 5227 struct fc_rport_identifiers rport_ids; 5228 struct fc_rport *rport; 5229 unsigned long flags; 5230 5231 if (atomic_read(&fcport->state) == FCS_ONLINE) 5232 return; 5233 5234 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5235 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5236 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5237 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5238 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5239 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5240 if (!rport) { 5241 ql_log(ql_log_warn, vha, 0x2006, 5242 "Unable to allocate fc remote port.\n"); 5243 return; 5244 } 5245 5246 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5247 *((fc_port_t **)rport->dd_data) = fcport; 5248 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5249 5250 rport->supported_classes = fcport->supported_classes; 5251 5252 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5253 if (fcport->port_type == FCT_INITIATOR) 5254 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5255 if (fcport->port_type == FCT_TARGET) 5256 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5257 5258 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5259 "%s %8phN. rport %p is %s mode\n", 5260 __func__, fcport->port_name, rport, 5261 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5262 5263 fc_remote_port_rolechg(rport, rport_ids.roles); 5264 } 5265 5266 /* 5267 * qla2x00_update_fcport 5268 * Updates device on list. 5269 * 5270 * Input: 5271 * ha = adapter block pointer. 5272 * fcport = port structure pointer. 5273 * 5274 * Return: 5275 * 0 - Success 5276 * BIT_0 - error 5277 * 5278 * Context: 5279 * Kernel context. 5280 */ 5281 void 5282 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5283 { 5284 if (IS_SW_RESV_ADDR(fcport->d_id)) 5285 return; 5286 5287 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5288 __func__, fcport->port_name); 5289 5290 fcport->disc_state = DSC_UPD_FCPORT; 5291 fcport->login_retry = vha->hw->login_retry_count; 5292 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5293 fcport->deleted = 0; 5294 fcport->logout_on_delete = 1; 5295 fcport->login_retry = vha->hw->login_retry_count; 5296 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5297 5298 switch (vha->hw->current_topology) { 5299 case ISP_CFG_N: 5300 case ISP_CFG_NL: 5301 fcport->keep_nport_handle = 1; 5302 break; 5303 default: 5304 break; 5305 } 5306 5307 qla2x00_iidma_fcport(vha, fcport); 5308 5309 if (fcport->fc4f_nvme) { 5310 qla_nvme_register_remote(vha, fcport); 5311 fcport->disc_state = DSC_LOGIN_COMPLETE; 5312 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5313 return; 5314 } 5315 5316 qla24xx_update_fcport_fcp_prio(vha, fcport); 5317 5318 switch (vha->host->active_mode) { 5319 case MODE_INITIATOR: 5320 qla2x00_reg_remote_port(vha, fcport); 5321 break; 5322 case MODE_TARGET: 5323 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5324 !vha->vha_tgt.qla_tgt->tgt_stopped) 5325 qlt_fc_port_added(vha, fcport); 5326 break; 5327 case MODE_DUAL: 5328 qla2x00_reg_remote_port(vha, fcport); 5329 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5330 !vha->vha_tgt.qla_tgt->tgt_stopped) 5331 qlt_fc_port_added(vha, fcport); 5332 break; 5333 default: 5334 break; 5335 } 5336 5337 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5338 5339 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5340 if (fcport->id_changed) { 5341 fcport->id_changed = 0; 5342 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5343 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5344 __func__, __LINE__, fcport->port_name, 5345 vha->fcport_count); 5346 qla24xx_post_gfpnid_work(vha, fcport); 5347 } else { 5348 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5349 "%s %d %8phC post gpsc fcp_cnt %d\n", 5350 __func__, __LINE__, fcport->port_name, 5351 vha->fcport_count); 5352 qla24xx_post_gpsc_work(vha, fcport); 5353 } 5354 } 5355 5356 fcport->disc_state = DSC_LOGIN_COMPLETE; 5357 } 5358 5359 void qla_register_fcport_fn(struct work_struct *work) 5360 { 5361 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5362 u32 rscn_gen = fcport->rscn_gen; 5363 u16 data[2]; 5364 5365 if (IS_SW_RESV_ADDR(fcport->d_id)) 5366 return; 5367 5368 qla2x00_update_fcport(fcport->vha, fcport); 5369 5370 if (rscn_gen != fcport->rscn_gen) { 5371 /* RSCN(s) came in while registration */ 5372 switch (fcport->next_disc_state) { 5373 case DSC_DELETE_PEND: 5374 qlt_schedule_sess_for_deletion(fcport); 5375 break; 5376 case DSC_ADISC: 5377 data[0] = data[1] = 0; 5378 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5379 data); 5380 break; 5381 default: 5382 break; 5383 } 5384 } 5385 } 5386 5387 /* 5388 * qla2x00_configure_fabric 5389 * Setup SNS devices with loop ID's. 5390 * 5391 * Input: 5392 * ha = adapter block pointer. 5393 * 5394 * Returns: 5395 * 0 = success. 5396 * BIT_0 = error 5397 */ 5398 static int 5399 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5400 { 5401 int rval; 5402 fc_port_t *fcport; 5403 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5404 uint16_t loop_id; 5405 LIST_HEAD(new_fcports); 5406 struct qla_hw_data *ha = vha->hw; 5407 int discovery_gen; 5408 5409 /* If FL port exists, then SNS is present */ 5410 if (IS_FWI2_CAPABLE(ha)) 5411 loop_id = NPH_F_PORT; 5412 else 5413 loop_id = SNS_FL_PORT; 5414 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5415 if (rval != QLA_SUCCESS) { 5416 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5417 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5418 5419 vha->device_flags &= ~SWITCH_FOUND; 5420 return (QLA_SUCCESS); 5421 } 5422 vha->device_flags |= SWITCH_FOUND; 5423 5424 5425 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5426 rval = qla2x00_send_change_request(vha, 0x3, 0); 5427 if (rval != QLA_SUCCESS) 5428 ql_log(ql_log_warn, vha, 0x121, 5429 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5430 rval); 5431 } 5432 5433 5434 do { 5435 qla2x00_mgmt_svr_login(vha); 5436 5437 /* FDMI support. */ 5438 if (ql2xfdmienable && 5439 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5440 qla2x00_fdmi_register(vha); 5441 5442 /* Ensure we are logged into the SNS. */ 5443 loop_id = NPH_SNS_LID(ha); 5444 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5445 0xfc, mb, BIT_1|BIT_0); 5446 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5447 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5448 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5449 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5450 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5451 return rval; 5452 } 5453 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5454 if (qla2x00_rft_id(vha)) { 5455 /* EMPTY */ 5456 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5457 "Register FC-4 TYPE failed.\n"); 5458 if (test_bit(LOOP_RESYNC_NEEDED, 5459 &vha->dpc_flags)) 5460 break; 5461 } 5462 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5463 /* EMPTY */ 5464 ql_dbg(ql_dbg_disc, vha, 0x209a, 5465 "Register FC-4 Features failed.\n"); 5466 if (test_bit(LOOP_RESYNC_NEEDED, 5467 &vha->dpc_flags)) 5468 break; 5469 } 5470 if (vha->flags.nvme_enabled) { 5471 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5472 ql_dbg(ql_dbg_disc, vha, 0x2049, 5473 "Register NVME FC Type Features failed.\n"); 5474 } 5475 } 5476 if (qla2x00_rnn_id(vha)) { 5477 /* EMPTY */ 5478 ql_dbg(ql_dbg_disc, vha, 0x2104, 5479 "Register Node Name failed.\n"); 5480 if (test_bit(LOOP_RESYNC_NEEDED, 5481 &vha->dpc_flags)) 5482 break; 5483 } else if (qla2x00_rsnn_nn(vha)) { 5484 /* EMPTY */ 5485 ql_dbg(ql_dbg_disc, vha, 0x209b, 5486 "Register Symbolic Node Name failed.\n"); 5487 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5488 break; 5489 } 5490 } 5491 5492 5493 /* Mark the time right before querying FW for connected ports. 5494 * This process is long, asynchronous and by the time it's done, 5495 * collected information might not be accurate anymore. E.g. 5496 * disconnected port might have re-connected and a brand new 5497 * session has been created. In this case session's generation 5498 * will be newer than discovery_gen. */ 5499 qlt_do_generation_tick(vha, &discovery_gen); 5500 5501 if (USE_ASYNC_SCAN(ha)) { 5502 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5503 NULL); 5504 if (rval) 5505 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5506 } else { 5507 list_for_each_entry(fcport, &vha->vp_fcports, list) 5508 fcport->scan_state = QLA_FCPORT_SCAN; 5509 5510 rval = qla2x00_find_all_fabric_devs(vha); 5511 } 5512 if (rval != QLA_SUCCESS) 5513 break; 5514 } while (0); 5515 5516 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5517 qla_nvme_register_hba(vha); 5518 5519 if (rval) 5520 ql_dbg(ql_dbg_disc, vha, 0x2068, 5521 "Configure fabric error exit rval=%d.\n", rval); 5522 5523 return (rval); 5524 } 5525 5526 /* 5527 * qla2x00_find_all_fabric_devs 5528 * 5529 * Input: 5530 * ha = adapter block pointer. 5531 * dev = database device entry pointer. 5532 * 5533 * Returns: 5534 * 0 = success. 5535 * 5536 * Context: 5537 * Kernel context. 5538 */ 5539 static int 5540 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5541 { 5542 int rval; 5543 uint16_t loop_id; 5544 fc_port_t *fcport, *new_fcport; 5545 int found; 5546 5547 sw_info_t *swl; 5548 int swl_idx; 5549 int first_dev, last_dev; 5550 port_id_t wrap = {}, nxt_d_id; 5551 struct qla_hw_data *ha = vha->hw; 5552 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5553 unsigned long flags; 5554 5555 rval = QLA_SUCCESS; 5556 5557 /* Try GID_PT to get device list, else GAN. */ 5558 if (!ha->swl) 5559 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5560 GFP_KERNEL); 5561 swl = ha->swl; 5562 if (!swl) { 5563 /*EMPTY*/ 5564 ql_dbg(ql_dbg_disc, vha, 0x209c, 5565 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5566 } else { 5567 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5568 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5569 swl = NULL; 5570 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5571 return rval; 5572 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5573 swl = NULL; 5574 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5575 return rval; 5576 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5577 swl = NULL; 5578 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5579 return rval; 5580 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5581 swl = NULL; 5582 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5583 return rval; 5584 } 5585 5586 /* If other queries succeeded probe for FC-4 type */ 5587 if (swl) { 5588 qla2x00_gff_id(vha, swl); 5589 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5590 return rval; 5591 } 5592 } 5593 swl_idx = 0; 5594 5595 /* Allocate temporary fcport for any new fcports discovered. */ 5596 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5597 if (new_fcport == NULL) { 5598 ql_log(ql_log_warn, vha, 0x209d, 5599 "Failed to allocate memory for fcport.\n"); 5600 return (QLA_MEMORY_ALLOC_FAILED); 5601 } 5602 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5603 /* Set start port ID scan at adapter ID. */ 5604 first_dev = 1; 5605 last_dev = 0; 5606 5607 /* Starting free loop ID. */ 5608 loop_id = ha->min_external_loopid; 5609 for (; loop_id <= ha->max_loop_id; loop_id++) { 5610 if (qla2x00_is_reserved_id(vha, loop_id)) 5611 continue; 5612 5613 if (ha->current_topology == ISP_CFG_FL && 5614 (atomic_read(&vha->loop_down_timer) || 5615 LOOP_TRANSITION(vha))) { 5616 atomic_set(&vha->loop_down_timer, 0); 5617 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5618 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5619 break; 5620 } 5621 5622 if (swl != NULL) { 5623 if (last_dev) { 5624 wrap.b24 = new_fcport->d_id.b24; 5625 } else { 5626 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5627 memcpy(new_fcport->node_name, 5628 swl[swl_idx].node_name, WWN_SIZE); 5629 memcpy(new_fcport->port_name, 5630 swl[swl_idx].port_name, WWN_SIZE); 5631 memcpy(new_fcport->fabric_port_name, 5632 swl[swl_idx].fabric_port_name, WWN_SIZE); 5633 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5634 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5635 5636 new_fcport->nvme_flag = 0; 5637 new_fcport->fc4f_nvme = 0; 5638 if (vha->flags.nvme_enabled && 5639 swl[swl_idx].fc4f_nvme) { 5640 new_fcport->fc4f_nvme = 5641 swl[swl_idx].fc4f_nvme; 5642 ql_log(ql_log_info, vha, 0x2131, 5643 "FOUND: NVME port %8phC as FC Type 28h\n", 5644 new_fcport->port_name); 5645 } 5646 5647 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5648 last_dev = 1; 5649 } 5650 swl_idx++; 5651 } 5652 } else { 5653 /* Send GA_NXT to the switch */ 5654 rval = qla2x00_ga_nxt(vha, new_fcport); 5655 if (rval != QLA_SUCCESS) { 5656 ql_log(ql_log_warn, vha, 0x209e, 5657 "SNS scan failed -- assuming " 5658 "zero-entry result.\n"); 5659 rval = QLA_SUCCESS; 5660 break; 5661 } 5662 } 5663 5664 /* If wrap on switch device list, exit. */ 5665 if (first_dev) { 5666 wrap.b24 = new_fcport->d_id.b24; 5667 first_dev = 0; 5668 } else if (new_fcport->d_id.b24 == wrap.b24) { 5669 ql_dbg(ql_dbg_disc, vha, 0x209f, 5670 "Device wrap (%02x%02x%02x).\n", 5671 new_fcport->d_id.b.domain, 5672 new_fcport->d_id.b.area, 5673 new_fcport->d_id.b.al_pa); 5674 break; 5675 } 5676 5677 /* Bypass if same physical adapter. */ 5678 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5679 continue; 5680 5681 /* Bypass virtual ports of the same host. */ 5682 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5683 continue; 5684 5685 /* Bypass if same domain and area of adapter. */ 5686 if (((new_fcport->d_id.b24 & 0xffff00) == 5687 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5688 ISP_CFG_FL) 5689 continue; 5690 5691 /* Bypass reserved domain fields. */ 5692 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5693 continue; 5694 5695 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5696 if (ql2xgffidenable && 5697 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5698 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5699 continue; 5700 5701 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5702 5703 /* Locate matching device in database. */ 5704 found = 0; 5705 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5706 if (memcmp(new_fcport->port_name, fcport->port_name, 5707 WWN_SIZE)) 5708 continue; 5709 5710 fcport->scan_state = QLA_FCPORT_FOUND; 5711 5712 found++; 5713 5714 /* Update port state. */ 5715 memcpy(fcport->fabric_port_name, 5716 new_fcport->fabric_port_name, WWN_SIZE); 5717 fcport->fp_speed = new_fcport->fp_speed; 5718 5719 /* 5720 * If address the same and state FCS_ONLINE 5721 * (or in target mode), nothing changed. 5722 */ 5723 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5724 (atomic_read(&fcport->state) == FCS_ONLINE || 5725 (vha->host->active_mode == MODE_TARGET))) { 5726 break; 5727 } 5728 5729 /* 5730 * If device was not a fabric device before. 5731 */ 5732 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5733 fcport->d_id.b24 = new_fcport->d_id.b24; 5734 qla2x00_clear_loop_id(fcport); 5735 fcport->flags |= (FCF_FABRIC_DEVICE | 5736 FCF_LOGIN_NEEDED); 5737 break; 5738 } 5739 5740 /* 5741 * Port ID changed or device was marked to be updated; 5742 * Log it out if still logged in and mark it for 5743 * relogin later. 5744 */ 5745 if (qla_tgt_mode_enabled(base_vha)) { 5746 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5747 "port changed FC ID, %8phC" 5748 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5749 fcport->port_name, 5750 fcport->d_id.b.domain, 5751 fcport->d_id.b.area, 5752 fcport->d_id.b.al_pa, 5753 fcport->loop_id, 5754 new_fcport->d_id.b.domain, 5755 new_fcport->d_id.b.area, 5756 new_fcport->d_id.b.al_pa); 5757 fcport->d_id.b24 = new_fcport->d_id.b24; 5758 break; 5759 } 5760 5761 fcport->d_id.b24 = new_fcport->d_id.b24; 5762 fcport->flags |= FCF_LOGIN_NEEDED; 5763 break; 5764 } 5765 5766 if (fcport->fc4f_nvme) { 5767 if (fcport->disc_state == DSC_DELETE_PEND) { 5768 fcport->disc_state = DSC_GNL; 5769 vha->fcport_count--; 5770 fcport->login_succ = 0; 5771 } 5772 } 5773 5774 if (found) { 5775 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5776 continue; 5777 } 5778 /* If device was not in our fcports list, then add it. */ 5779 new_fcport->scan_state = QLA_FCPORT_FOUND; 5780 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5781 5782 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5783 5784 5785 /* Allocate a new replacement fcport. */ 5786 nxt_d_id.b24 = new_fcport->d_id.b24; 5787 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5788 if (new_fcport == NULL) { 5789 ql_log(ql_log_warn, vha, 0xd032, 5790 "Memory allocation failed for fcport.\n"); 5791 return (QLA_MEMORY_ALLOC_FAILED); 5792 } 5793 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5794 new_fcport->d_id.b24 = nxt_d_id.b24; 5795 } 5796 5797 qla2x00_free_fcport(new_fcport); 5798 5799 /* 5800 * Logout all previous fabric dev marked lost, except FCP2 devices. 5801 */ 5802 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5803 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5804 break; 5805 5806 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5807 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5808 continue; 5809 5810 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5811 if ((qla_dual_mode_enabled(vha) || 5812 qla_ini_mode_enabled(vha)) && 5813 atomic_read(&fcport->state) == FCS_ONLINE) { 5814 qla2x00_mark_device_lost(vha, fcport, 5815 ql2xplogiabsentdevice, 0); 5816 if (fcport->loop_id != FC_NO_LOOP_ID && 5817 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5818 fcport->port_type != FCT_INITIATOR && 5819 fcport->port_type != FCT_BROADCAST) { 5820 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5821 "%s %d %8phC post del sess\n", 5822 __func__, __LINE__, 5823 fcport->port_name); 5824 qlt_schedule_sess_for_deletion(fcport); 5825 continue; 5826 } 5827 } 5828 } 5829 5830 if (fcport->scan_state == QLA_FCPORT_FOUND) 5831 qla24xx_fcport_handle_login(vha, fcport); 5832 } 5833 return (rval); 5834 } 5835 5836 /* 5837 * qla2x00_find_new_loop_id 5838 * Scan through our port list and find a new usable loop ID. 5839 * 5840 * Input: 5841 * ha: adapter state pointer. 5842 * dev: port structure pointer. 5843 * 5844 * Returns: 5845 * qla2x00 local function return status code. 5846 * 5847 * Context: 5848 * Kernel context. 5849 */ 5850 int 5851 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5852 { 5853 int rval; 5854 struct qla_hw_data *ha = vha->hw; 5855 unsigned long flags = 0; 5856 5857 rval = QLA_SUCCESS; 5858 5859 spin_lock_irqsave(&ha->vport_slock, flags); 5860 5861 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5862 LOOPID_MAP_SIZE); 5863 if (dev->loop_id >= LOOPID_MAP_SIZE || 5864 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5865 dev->loop_id = FC_NO_LOOP_ID; 5866 rval = QLA_FUNCTION_FAILED; 5867 } else 5868 set_bit(dev->loop_id, ha->loop_id_map); 5869 5870 spin_unlock_irqrestore(&ha->vport_slock, flags); 5871 5872 if (rval == QLA_SUCCESS) 5873 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5874 "Assigning new loopid=%x, portid=%x.\n", 5875 dev->loop_id, dev->d_id.b24); 5876 else 5877 ql_log(ql_log_warn, dev->vha, 0x2087, 5878 "No loop_id's available, portid=%x.\n", 5879 dev->d_id.b24); 5880 5881 return (rval); 5882 } 5883 5884 5885 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 5886 int 5887 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 5888 { 5889 int loop_id = FC_NO_LOOP_ID; 5890 int lid = NPH_MGMT_SERVER - vha->vp_idx; 5891 unsigned long flags; 5892 struct qla_hw_data *ha = vha->hw; 5893 5894 if (vha->vp_idx == 0) { 5895 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 5896 return NPH_MGMT_SERVER; 5897 } 5898 5899 /* pick id from high and work down to low */ 5900 spin_lock_irqsave(&ha->vport_slock, flags); 5901 for (; lid > 0; lid--) { 5902 if (!test_bit(lid, vha->hw->loop_id_map)) { 5903 set_bit(lid, vha->hw->loop_id_map); 5904 loop_id = lid; 5905 break; 5906 } 5907 } 5908 spin_unlock_irqrestore(&ha->vport_slock, flags); 5909 5910 return loop_id; 5911 } 5912 5913 /* 5914 * qla2x00_fabric_login 5915 * Issue fabric login command. 5916 * 5917 * Input: 5918 * ha = adapter block pointer. 5919 * device = pointer to FC device type structure. 5920 * 5921 * Returns: 5922 * 0 - Login successfully 5923 * 1 - Login failed 5924 * 2 - Initiator device 5925 * 3 - Fatal error 5926 */ 5927 int 5928 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5929 uint16_t *next_loopid) 5930 { 5931 int rval; 5932 int retry; 5933 uint16_t tmp_loopid; 5934 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5935 struct qla_hw_data *ha = vha->hw; 5936 5937 retry = 0; 5938 tmp_loopid = 0; 5939 5940 for (;;) { 5941 ql_dbg(ql_dbg_disc, vha, 0x2000, 5942 "Trying Fabric Login w/loop id 0x%04x for port " 5943 "%02x%02x%02x.\n", 5944 fcport->loop_id, fcport->d_id.b.domain, 5945 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5946 5947 /* Login fcport on switch. */ 5948 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5949 fcport->d_id.b.domain, fcport->d_id.b.area, 5950 fcport->d_id.b.al_pa, mb, BIT_0); 5951 if (rval != QLA_SUCCESS) { 5952 return rval; 5953 } 5954 if (mb[0] == MBS_PORT_ID_USED) { 5955 /* 5956 * Device has another loop ID. The firmware team 5957 * recommends the driver perform an implicit login with 5958 * the specified ID again. The ID we just used is save 5959 * here so we return with an ID that can be tried by 5960 * the next login. 5961 */ 5962 retry++; 5963 tmp_loopid = fcport->loop_id; 5964 fcport->loop_id = mb[1]; 5965 5966 ql_dbg(ql_dbg_disc, vha, 0x2001, 5967 "Fabric Login: port in use - next loop " 5968 "id=0x%04x, port id= %02x%02x%02x.\n", 5969 fcport->loop_id, fcport->d_id.b.domain, 5970 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5971 5972 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5973 /* 5974 * Login succeeded. 5975 */ 5976 if (retry) { 5977 /* A retry occurred before. */ 5978 *next_loopid = tmp_loopid; 5979 } else { 5980 /* 5981 * No retry occurred before. Just increment the 5982 * ID value for next login. 5983 */ 5984 *next_loopid = (fcport->loop_id + 1); 5985 } 5986 5987 if (mb[1] & BIT_0) { 5988 fcport->port_type = FCT_INITIATOR; 5989 } else { 5990 fcport->port_type = FCT_TARGET; 5991 if (mb[1] & BIT_1) { 5992 fcport->flags |= FCF_FCP2_DEVICE; 5993 } 5994 } 5995 5996 if (mb[10] & BIT_0) 5997 fcport->supported_classes |= FC_COS_CLASS2; 5998 if (mb[10] & BIT_1) 5999 fcport->supported_classes |= FC_COS_CLASS3; 6000 6001 if (IS_FWI2_CAPABLE(ha)) { 6002 if (mb[10] & BIT_7) 6003 fcport->flags |= 6004 FCF_CONF_COMP_SUPPORTED; 6005 } 6006 6007 rval = QLA_SUCCESS; 6008 break; 6009 } else if (mb[0] == MBS_LOOP_ID_USED) { 6010 /* 6011 * Loop ID already used, try next loop ID. 6012 */ 6013 fcport->loop_id++; 6014 rval = qla2x00_find_new_loop_id(vha, fcport); 6015 if (rval != QLA_SUCCESS) { 6016 /* Ran out of loop IDs to use */ 6017 break; 6018 } 6019 } else if (mb[0] == MBS_COMMAND_ERROR) { 6020 /* 6021 * Firmware possibly timed out during login. If NO 6022 * retries are left to do then the device is declared 6023 * dead. 6024 */ 6025 *next_loopid = fcport->loop_id; 6026 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6027 fcport->d_id.b.domain, fcport->d_id.b.area, 6028 fcport->d_id.b.al_pa); 6029 qla2x00_mark_device_lost(vha, fcport, 1, 0); 6030 6031 rval = 1; 6032 break; 6033 } else { 6034 /* 6035 * unrecoverable / not handled error 6036 */ 6037 ql_dbg(ql_dbg_disc, vha, 0x2002, 6038 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6039 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6040 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6041 fcport->loop_id, jiffies); 6042 6043 *next_loopid = fcport->loop_id; 6044 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6045 fcport->d_id.b.domain, fcport->d_id.b.area, 6046 fcport->d_id.b.al_pa); 6047 qla2x00_clear_loop_id(fcport); 6048 fcport->login_retry = 0; 6049 6050 rval = 3; 6051 break; 6052 } 6053 } 6054 6055 return (rval); 6056 } 6057 6058 /* 6059 * qla2x00_local_device_login 6060 * Issue local device login command. 6061 * 6062 * Input: 6063 * ha = adapter block pointer. 6064 * loop_id = loop id of device to login to. 6065 * 6066 * Returns (Where's the #define!!!!): 6067 * 0 - Login successfully 6068 * 1 - Login failed 6069 * 3 - Fatal error 6070 */ 6071 int 6072 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6073 { 6074 int rval; 6075 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6076 6077 memset(mb, 0, sizeof(mb)); 6078 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6079 if (rval == QLA_SUCCESS) { 6080 /* Interrogate mailbox registers for any errors */ 6081 if (mb[0] == MBS_COMMAND_ERROR) 6082 rval = 1; 6083 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6084 /* device not in PCB table */ 6085 rval = 3; 6086 } 6087 6088 return (rval); 6089 } 6090 6091 /* 6092 * qla2x00_loop_resync 6093 * Resync with fibre channel devices. 6094 * 6095 * Input: 6096 * ha = adapter block pointer. 6097 * 6098 * Returns: 6099 * 0 = success 6100 */ 6101 int 6102 qla2x00_loop_resync(scsi_qla_host_t *vha) 6103 { 6104 int rval = QLA_SUCCESS; 6105 uint32_t wait_time; 6106 struct req_que *req; 6107 struct rsp_que *rsp; 6108 6109 req = vha->req; 6110 rsp = req->rsp; 6111 6112 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6113 if (vha->flags.online) { 6114 if (!(rval = qla2x00_fw_ready(vha))) { 6115 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6116 wait_time = 256; 6117 do { 6118 if (!IS_QLAFX00(vha->hw)) { 6119 /* 6120 * Issue a marker after FW becomes 6121 * ready. 6122 */ 6123 qla2x00_marker(vha, req, rsp, 0, 0, 6124 MK_SYNC_ALL); 6125 vha->marker_needed = 0; 6126 } 6127 6128 /* Remap devices on Loop. */ 6129 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6130 6131 if (IS_QLAFX00(vha->hw)) 6132 qlafx00_configure_devices(vha); 6133 else 6134 qla2x00_configure_loop(vha); 6135 6136 wait_time--; 6137 } while (!atomic_read(&vha->loop_down_timer) && 6138 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6139 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6140 &vha->dpc_flags))); 6141 } 6142 } 6143 6144 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6145 return (QLA_FUNCTION_FAILED); 6146 6147 if (rval) 6148 ql_dbg(ql_dbg_disc, vha, 0x206c, 6149 "%s *** FAILED ***.\n", __func__); 6150 6151 return (rval); 6152 } 6153 6154 /* 6155 * qla2x00_perform_loop_resync 6156 * Description: This function will set the appropriate flags and call 6157 * qla2x00_loop_resync. If successful loop will be resynced 6158 * Arguments : scsi_qla_host_t pointer 6159 * returm : Success or Failure 6160 */ 6161 6162 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6163 { 6164 int32_t rval = 0; 6165 6166 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6167 /*Configure the flags so that resync happens properly*/ 6168 atomic_set(&ha->loop_down_timer, 0); 6169 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6170 atomic_set(&ha->loop_state, LOOP_UP); 6171 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6172 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6173 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6174 6175 rval = qla2x00_loop_resync(ha); 6176 } else 6177 atomic_set(&ha->loop_state, LOOP_DEAD); 6178 6179 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6180 } 6181 6182 return rval; 6183 } 6184 6185 void 6186 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6187 { 6188 fc_port_t *fcport; 6189 struct scsi_qla_host *vha; 6190 struct qla_hw_data *ha = base_vha->hw; 6191 unsigned long flags; 6192 6193 spin_lock_irqsave(&ha->vport_slock, flags); 6194 /* Go with deferred removal of rport references. */ 6195 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6196 atomic_inc(&vha->vref_count); 6197 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6198 if (fcport->drport && 6199 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6200 spin_unlock_irqrestore(&ha->vport_slock, flags); 6201 qla2x00_rport_del(fcport); 6202 6203 spin_lock_irqsave(&ha->vport_slock, flags); 6204 } 6205 } 6206 atomic_dec(&vha->vref_count); 6207 wake_up(&vha->vref_waitq); 6208 } 6209 spin_unlock_irqrestore(&ha->vport_slock, flags); 6210 } 6211 6212 /* Assumes idc_lock always held on entry */ 6213 void 6214 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6215 { 6216 struct qla_hw_data *ha = vha->hw; 6217 uint32_t drv_presence, drv_presence_mask; 6218 uint32_t dev_part_info1, dev_part_info2, class_type; 6219 uint32_t class_type_mask = 0x3; 6220 uint16_t fcoe_other_function = 0xffff, i; 6221 6222 if (IS_QLA8044(ha)) { 6223 drv_presence = qla8044_rd_direct(vha, 6224 QLA8044_CRB_DRV_ACTIVE_INDEX); 6225 dev_part_info1 = qla8044_rd_direct(vha, 6226 QLA8044_CRB_DEV_PART_INFO_INDEX); 6227 dev_part_info2 = qla8044_rd_direct(vha, 6228 QLA8044_CRB_DEV_PART_INFO2); 6229 } else { 6230 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6231 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6232 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6233 } 6234 for (i = 0; i < 8; i++) { 6235 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6236 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6237 (i != ha->portnum)) { 6238 fcoe_other_function = i; 6239 break; 6240 } 6241 } 6242 if (fcoe_other_function == 0xffff) { 6243 for (i = 0; i < 8; i++) { 6244 class_type = ((dev_part_info2 >> (i * 4)) & 6245 class_type_mask); 6246 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6247 ((i + 8) != ha->portnum)) { 6248 fcoe_other_function = i + 8; 6249 break; 6250 } 6251 } 6252 } 6253 /* 6254 * Prepare drv-presence mask based on fcoe functions present. 6255 * However consider only valid physical fcoe function numbers (0-15). 6256 */ 6257 drv_presence_mask = ~((1 << (ha->portnum)) | 6258 ((fcoe_other_function == 0xffff) ? 6259 0 : (1 << (fcoe_other_function)))); 6260 6261 /* We are the reset owner iff: 6262 * - No other protocol drivers present. 6263 * - This is the lowest among fcoe functions. */ 6264 if (!(drv_presence & drv_presence_mask) && 6265 (ha->portnum < fcoe_other_function)) { 6266 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6267 "This host is Reset owner.\n"); 6268 ha->flags.nic_core_reset_owner = 1; 6269 } 6270 } 6271 6272 static int 6273 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6274 { 6275 int rval = QLA_SUCCESS; 6276 struct qla_hw_data *ha = vha->hw; 6277 uint32_t drv_ack; 6278 6279 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6280 if (rval == QLA_SUCCESS) { 6281 drv_ack |= (1 << ha->portnum); 6282 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6283 } 6284 6285 return rval; 6286 } 6287 6288 static int 6289 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6290 { 6291 int rval = QLA_SUCCESS; 6292 struct qla_hw_data *ha = vha->hw; 6293 uint32_t drv_ack; 6294 6295 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6296 if (rval == QLA_SUCCESS) { 6297 drv_ack &= ~(1 << ha->portnum); 6298 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6299 } 6300 6301 return rval; 6302 } 6303 6304 static const char * 6305 qla83xx_dev_state_to_string(uint32_t dev_state) 6306 { 6307 switch (dev_state) { 6308 case QLA8XXX_DEV_COLD: 6309 return "COLD/RE-INIT"; 6310 case QLA8XXX_DEV_INITIALIZING: 6311 return "INITIALIZING"; 6312 case QLA8XXX_DEV_READY: 6313 return "READY"; 6314 case QLA8XXX_DEV_NEED_RESET: 6315 return "NEED RESET"; 6316 case QLA8XXX_DEV_NEED_QUIESCENT: 6317 return "NEED QUIESCENT"; 6318 case QLA8XXX_DEV_FAILED: 6319 return "FAILED"; 6320 case QLA8XXX_DEV_QUIESCENT: 6321 return "QUIESCENT"; 6322 default: 6323 return "Unknown"; 6324 } 6325 } 6326 6327 /* Assumes idc-lock always held on entry */ 6328 void 6329 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6330 { 6331 struct qla_hw_data *ha = vha->hw; 6332 uint32_t idc_audit_reg = 0, duration_secs = 0; 6333 6334 switch (audit_type) { 6335 case IDC_AUDIT_TIMESTAMP: 6336 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6337 idc_audit_reg = (ha->portnum) | 6338 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6339 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6340 break; 6341 6342 case IDC_AUDIT_COMPLETION: 6343 duration_secs = ((jiffies_to_msecs(jiffies) - 6344 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6345 idc_audit_reg = (ha->portnum) | 6346 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6347 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6348 break; 6349 6350 default: 6351 ql_log(ql_log_warn, vha, 0xb078, 6352 "Invalid audit type specified.\n"); 6353 break; 6354 } 6355 } 6356 6357 /* Assumes idc_lock always held on entry */ 6358 static int 6359 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6360 { 6361 struct qla_hw_data *ha = vha->hw; 6362 uint32_t idc_control, dev_state; 6363 6364 __qla83xx_get_idc_control(vha, &idc_control); 6365 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6366 ql_log(ql_log_info, vha, 0xb080, 6367 "NIC Core reset has been disabled. idc-control=0x%x\n", 6368 idc_control); 6369 return QLA_FUNCTION_FAILED; 6370 } 6371 6372 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6373 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6374 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6375 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6376 QLA8XXX_DEV_NEED_RESET); 6377 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6378 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6379 } else { 6380 const char *state = qla83xx_dev_state_to_string(dev_state); 6381 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6382 6383 /* SV: XXX: Is timeout required here? */ 6384 /* Wait for IDC state change READY -> NEED_RESET */ 6385 while (dev_state == QLA8XXX_DEV_READY) { 6386 qla83xx_idc_unlock(vha, 0); 6387 msleep(200); 6388 qla83xx_idc_lock(vha, 0); 6389 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6390 } 6391 } 6392 6393 /* Send IDC ack by writing to drv-ack register */ 6394 __qla83xx_set_drv_ack(vha); 6395 6396 return QLA_SUCCESS; 6397 } 6398 6399 int 6400 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6401 { 6402 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6403 } 6404 6405 int 6406 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6407 { 6408 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6409 } 6410 6411 static int 6412 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6413 { 6414 uint32_t drv_presence = 0; 6415 struct qla_hw_data *ha = vha->hw; 6416 6417 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6418 if (drv_presence & (1 << ha->portnum)) 6419 return QLA_SUCCESS; 6420 else 6421 return QLA_TEST_FAILED; 6422 } 6423 6424 int 6425 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6426 { 6427 int rval = QLA_SUCCESS; 6428 struct qla_hw_data *ha = vha->hw; 6429 6430 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6431 "Entered %s().\n", __func__); 6432 6433 if (vha->device_flags & DFLG_DEV_FAILED) { 6434 ql_log(ql_log_warn, vha, 0xb059, 6435 "Device in unrecoverable FAILED state.\n"); 6436 return QLA_FUNCTION_FAILED; 6437 } 6438 6439 qla83xx_idc_lock(vha, 0); 6440 6441 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6442 ql_log(ql_log_warn, vha, 0xb05a, 6443 "Function=0x%x has been removed from IDC participation.\n", 6444 ha->portnum); 6445 rval = QLA_FUNCTION_FAILED; 6446 goto exit; 6447 } 6448 6449 qla83xx_reset_ownership(vha); 6450 6451 rval = qla83xx_initiating_reset(vha); 6452 6453 /* 6454 * Perform reset if we are the reset-owner, 6455 * else wait till IDC state changes to READY/FAILED. 6456 */ 6457 if (rval == QLA_SUCCESS) { 6458 rval = qla83xx_idc_state_handler(vha); 6459 6460 if (rval == QLA_SUCCESS) 6461 ha->flags.nic_core_hung = 0; 6462 __qla83xx_clear_drv_ack(vha); 6463 } 6464 6465 exit: 6466 qla83xx_idc_unlock(vha, 0); 6467 6468 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6469 6470 return rval; 6471 } 6472 6473 int 6474 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6475 { 6476 struct qla_hw_data *ha = vha->hw; 6477 int rval = QLA_FUNCTION_FAILED; 6478 6479 if (!IS_MCTP_CAPABLE(ha)) { 6480 /* This message can be removed from the final version */ 6481 ql_log(ql_log_info, vha, 0x506d, 6482 "This board is not MCTP capable\n"); 6483 return rval; 6484 } 6485 6486 if (!ha->mctp_dump) { 6487 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6488 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6489 6490 if (!ha->mctp_dump) { 6491 ql_log(ql_log_warn, vha, 0x506e, 6492 "Failed to allocate memory for mctp dump\n"); 6493 return rval; 6494 } 6495 } 6496 6497 #define MCTP_DUMP_STR_ADDR 0x00000000 6498 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6499 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6500 if (rval != QLA_SUCCESS) { 6501 ql_log(ql_log_warn, vha, 0x506f, 6502 "Failed to capture mctp dump\n"); 6503 } else { 6504 ql_log(ql_log_info, vha, 0x5070, 6505 "Mctp dump capture for host (%ld/%p).\n", 6506 vha->host_no, ha->mctp_dump); 6507 ha->mctp_dumped = 1; 6508 } 6509 6510 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6511 ha->flags.nic_core_reset_hdlr_active = 1; 6512 rval = qla83xx_restart_nic_firmware(vha); 6513 if (rval) 6514 /* NIC Core reset failed. */ 6515 ql_log(ql_log_warn, vha, 0x5071, 6516 "Failed to restart nic firmware\n"); 6517 else 6518 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6519 "Restarted NIC firmware successfully.\n"); 6520 ha->flags.nic_core_reset_hdlr_active = 0; 6521 } 6522 6523 return rval; 6524 6525 } 6526 6527 /* 6528 * qla2x00_quiesce_io 6529 * Description: This function will block the new I/Os 6530 * Its not aborting any I/Os as context 6531 * is not destroyed during quiescence 6532 * Arguments: scsi_qla_host_t 6533 * return : void 6534 */ 6535 void 6536 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6537 { 6538 struct qla_hw_data *ha = vha->hw; 6539 struct scsi_qla_host *vp; 6540 6541 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6542 "Quiescing I/O - ha=%p.\n", ha); 6543 6544 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6545 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6546 atomic_set(&vha->loop_state, LOOP_DOWN); 6547 qla2x00_mark_all_devices_lost(vha, 0); 6548 list_for_each_entry(vp, &ha->vp_list, list) 6549 qla2x00_mark_all_devices_lost(vp, 0); 6550 } else { 6551 if (!atomic_read(&vha->loop_down_timer)) 6552 atomic_set(&vha->loop_down_timer, 6553 LOOP_DOWN_TIME); 6554 } 6555 /* Wait for pending cmds to complete */ 6556 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6557 } 6558 6559 void 6560 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6561 { 6562 struct qla_hw_data *ha = vha->hw; 6563 struct scsi_qla_host *vp; 6564 unsigned long flags; 6565 fc_port_t *fcport; 6566 u16 i; 6567 6568 /* For ISP82XX, driver waits for completion of the commands. 6569 * online flag should be set. 6570 */ 6571 if (!(IS_P3P_TYPE(ha))) 6572 vha->flags.online = 0; 6573 ha->flags.chip_reset_done = 0; 6574 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6575 vha->qla_stats.total_isp_aborts++; 6576 6577 ql_log(ql_log_info, vha, 0x00af, 6578 "Performing ISP error recovery - ha=%p.\n", ha); 6579 6580 ha->flags.purge_mbox = 1; 6581 /* For ISP82XX, reset_chip is just disabling interrupts. 6582 * Driver waits for the completion of the commands. 6583 * the interrupts need to be enabled. 6584 */ 6585 if (!(IS_P3P_TYPE(ha))) 6586 ha->isp_ops->reset_chip(vha); 6587 6588 ha->link_data_rate = PORT_SPEED_UNKNOWN; 6589 SAVE_TOPO(ha); 6590 ha->flags.rida_fmt2 = 0; 6591 ha->flags.n2n_ae = 0; 6592 ha->flags.lip_ae = 0; 6593 ha->current_topology = 0; 6594 ha->flags.fw_started = 0; 6595 ha->flags.fw_init_done = 0; 6596 ha->chip_reset++; 6597 ha->base_qpair->chip_reset = ha->chip_reset; 6598 for (i = 0; i < ha->max_qpairs; i++) { 6599 if (ha->queue_pair_map[i]) 6600 ha->queue_pair_map[i]->chip_reset = 6601 ha->base_qpair->chip_reset; 6602 } 6603 6604 /* purge MBox commands */ 6605 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6606 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6607 complete(&ha->mbx_intr_comp); 6608 } 6609 6610 i = 0; 6611 while (atomic_read(&ha->num_pend_mbx_stage3) || 6612 atomic_read(&ha->num_pend_mbx_stage2) || 6613 atomic_read(&ha->num_pend_mbx_stage1)) { 6614 msleep(20); 6615 i++; 6616 if (i > 50) 6617 break; 6618 } 6619 ha->flags.purge_mbox = 0; 6620 6621 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6622 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6623 atomic_set(&vha->loop_state, LOOP_DOWN); 6624 qla2x00_mark_all_devices_lost(vha, 0); 6625 6626 spin_lock_irqsave(&ha->vport_slock, flags); 6627 list_for_each_entry(vp, &ha->vp_list, list) { 6628 atomic_inc(&vp->vref_count); 6629 spin_unlock_irqrestore(&ha->vport_slock, flags); 6630 6631 qla2x00_mark_all_devices_lost(vp, 0); 6632 6633 spin_lock_irqsave(&ha->vport_slock, flags); 6634 atomic_dec(&vp->vref_count); 6635 } 6636 spin_unlock_irqrestore(&ha->vport_slock, flags); 6637 } else { 6638 if (!atomic_read(&vha->loop_down_timer)) 6639 atomic_set(&vha->loop_down_timer, 6640 LOOP_DOWN_TIME); 6641 } 6642 6643 /* Clear all async request states across all VPs. */ 6644 list_for_each_entry(fcport, &vha->vp_fcports, list) 6645 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6646 spin_lock_irqsave(&ha->vport_slock, flags); 6647 list_for_each_entry(vp, &ha->vp_list, list) { 6648 atomic_inc(&vp->vref_count); 6649 spin_unlock_irqrestore(&ha->vport_slock, flags); 6650 6651 list_for_each_entry(fcport, &vp->vp_fcports, list) 6652 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6653 6654 spin_lock_irqsave(&ha->vport_slock, flags); 6655 atomic_dec(&vp->vref_count); 6656 } 6657 spin_unlock_irqrestore(&ha->vport_slock, flags); 6658 6659 if (!ha->flags.eeh_busy) { 6660 /* Make sure for ISP 82XX IO DMA is complete */ 6661 if (IS_P3P_TYPE(ha)) { 6662 qla82xx_chip_reset_cleanup(vha); 6663 ql_log(ql_log_info, vha, 0x00b4, 6664 "Done chip reset cleanup.\n"); 6665 6666 /* Done waiting for pending commands. 6667 * Reset the online flag. 6668 */ 6669 vha->flags.online = 0; 6670 } 6671 6672 /* Requeue all commands in outstanding command list. */ 6673 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6674 } 6675 /* memory barrier */ 6676 wmb(); 6677 } 6678 6679 /* 6680 * qla2x00_abort_isp 6681 * Resets ISP and aborts all outstanding commands. 6682 * 6683 * Input: 6684 * ha = adapter block pointer. 6685 * 6686 * Returns: 6687 * 0 = success 6688 */ 6689 int 6690 qla2x00_abort_isp(scsi_qla_host_t *vha) 6691 { 6692 int rval; 6693 uint8_t status = 0; 6694 struct qla_hw_data *ha = vha->hw; 6695 struct scsi_qla_host *vp; 6696 struct req_que *req = ha->req_q_map[0]; 6697 unsigned long flags; 6698 6699 if (vha->flags.online) { 6700 qla2x00_abort_isp_cleanup(vha); 6701 6702 if (IS_QLA8031(ha)) { 6703 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6704 "Clearing fcoe driver presence.\n"); 6705 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6706 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6707 "Error while clearing DRV-Presence.\n"); 6708 } 6709 6710 if (unlikely(pci_channel_offline(ha->pdev) && 6711 ha->flags.pci_channel_io_perm_failure)) { 6712 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6713 status = 0; 6714 return status; 6715 } 6716 6717 switch (vha->qlini_mode) { 6718 case QLA2XXX_INI_MODE_DISABLED: 6719 if (!qla_tgt_mode_enabled(vha)) 6720 return 0; 6721 break; 6722 case QLA2XXX_INI_MODE_DUAL: 6723 if (!qla_dual_mode_enabled(vha)) 6724 return 0; 6725 break; 6726 case QLA2XXX_INI_MODE_ENABLED: 6727 default: 6728 break; 6729 } 6730 6731 ha->isp_ops->get_flash_version(vha, req->ring); 6732 6733 ha->isp_ops->nvram_config(vha); 6734 6735 if (!qla2x00_restart_isp(vha)) { 6736 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6737 6738 if (!atomic_read(&vha->loop_down_timer)) { 6739 /* 6740 * Issue marker command only when we are going 6741 * to start the I/O . 6742 */ 6743 vha->marker_needed = 1; 6744 } 6745 6746 vha->flags.online = 1; 6747 6748 ha->isp_ops->enable_intrs(ha); 6749 6750 ha->isp_abort_cnt = 0; 6751 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6752 6753 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6754 qla2x00_get_fw_version(vha); 6755 if (ha->fce) { 6756 ha->flags.fce_enabled = 1; 6757 memset(ha->fce, 0, 6758 fce_calc_size(ha->fce_bufs)); 6759 rval = qla2x00_enable_fce_trace(vha, 6760 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6761 &ha->fce_bufs); 6762 if (rval) { 6763 ql_log(ql_log_warn, vha, 0x8033, 6764 "Unable to reinitialize FCE " 6765 "(%d).\n", rval); 6766 ha->flags.fce_enabled = 0; 6767 } 6768 } 6769 6770 if (ha->eft) { 6771 memset(ha->eft, 0, EFT_SIZE); 6772 rval = qla2x00_enable_eft_trace(vha, 6773 ha->eft_dma, EFT_NUM_BUFFERS); 6774 if (rval) { 6775 ql_log(ql_log_warn, vha, 0x8034, 6776 "Unable to reinitialize EFT " 6777 "(%d).\n", rval); 6778 } 6779 } 6780 } else { /* failed the ISP abort */ 6781 vha->flags.online = 1; 6782 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6783 if (ha->isp_abort_cnt == 0) { 6784 ql_log(ql_log_fatal, vha, 0x8035, 6785 "ISP error recover failed - " 6786 "board disabled.\n"); 6787 /* 6788 * The next call disables the board 6789 * completely. 6790 */ 6791 qla2x00_abort_isp_cleanup(vha); 6792 vha->flags.online = 0; 6793 clear_bit(ISP_ABORT_RETRY, 6794 &vha->dpc_flags); 6795 status = 0; 6796 } else { /* schedule another ISP abort */ 6797 ha->isp_abort_cnt--; 6798 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6799 "ISP abort - retry remaining %d.\n", 6800 ha->isp_abort_cnt); 6801 status = 1; 6802 } 6803 } else { 6804 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6805 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6806 "ISP error recovery - retrying (%d) " 6807 "more times.\n", ha->isp_abort_cnt); 6808 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6809 status = 1; 6810 } 6811 } 6812 6813 } 6814 6815 if (!status) { 6816 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6817 qla2x00_configure_hba(vha); 6818 spin_lock_irqsave(&ha->vport_slock, flags); 6819 list_for_each_entry(vp, &ha->vp_list, list) { 6820 if (vp->vp_idx) { 6821 atomic_inc(&vp->vref_count); 6822 spin_unlock_irqrestore(&ha->vport_slock, flags); 6823 6824 qla2x00_vp_abort_isp(vp); 6825 6826 spin_lock_irqsave(&ha->vport_slock, flags); 6827 atomic_dec(&vp->vref_count); 6828 } 6829 } 6830 spin_unlock_irqrestore(&ha->vport_slock, flags); 6831 6832 if (IS_QLA8031(ha)) { 6833 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6834 "Setting back fcoe driver presence.\n"); 6835 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6836 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6837 "Error while setting DRV-Presence.\n"); 6838 } 6839 } else { 6840 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6841 __func__); 6842 } 6843 6844 return(status); 6845 } 6846 6847 /* 6848 * qla2x00_restart_isp 6849 * restarts the ISP after a reset 6850 * 6851 * Input: 6852 * ha = adapter block pointer. 6853 * 6854 * Returns: 6855 * 0 = success 6856 */ 6857 static int 6858 qla2x00_restart_isp(scsi_qla_host_t *vha) 6859 { 6860 int status = 0; 6861 struct qla_hw_data *ha = vha->hw; 6862 struct req_que *req = ha->req_q_map[0]; 6863 struct rsp_que *rsp = ha->rsp_q_map[0]; 6864 6865 /* If firmware needs to be loaded */ 6866 if (qla2x00_isp_firmware(vha)) { 6867 vha->flags.online = 0; 6868 status = ha->isp_ops->chip_diag(vha); 6869 if (!status) 6870 status = qla2x00_setup_chip(vha); 6871 } 6872 6873 if (!status && !(status = qla2x00_init_rings(vha))) { 6874 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6875 ha->flags.chip_reset_done = 1; 6876 6877 /* Initialize the queues in use */ 6878 qla25xx_init_queues(ha); 6879 6880 status = qla2x00_fw_ready(vha); 6881 if (!status) { 6882 /* Issue a marker after FW becomes ready. */ 6883 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6884 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6885 } 6886 6887 /* if no cable then assume it's good */ 6888 if ((vha->device_flags & DFLG_NO_CABLE)) 6889 status = 0; 6890 } 6891 return (status); 6892 } 6893 6894 static int 6895 qla25xx_init_queues(struct qla_hw_data *ha) 6896 { 6897 struct rsp_que *rsp = NULL; 6898 struct req_que *req = NULL; 6899 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6900 int ret = -1; 6901 int i; 6902 6903 for (i = 1; i < ha->max_rsp_queues; i++) { 6904 rsp = ha->rsp_q_map[i]; 6905 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6906 rsp->options &= ~BIT_0; 6907 ret = qla25xx_init_rsp_que(base_vha, rsp); 6908 if (ret != QLA_SUCCESS) 6909 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6910 "%s Rsp que: %d init failed.\n", 6911 __func__, rsp->id); 6912 else 6913 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6914 "%s Rsp que: %d inited.\n", 6915 __func__, rsp->id); 6916 } 6917 } 6918 for (i = 1; i < ha->max_req_queues; i++) { 6919 req = ha->req_q_map[i]; 6920 if (req && test_bit(i, ha->req_qid_map)) { 6921 /* Clear outstanding commands array. */ 6922 req->options &= ~BIT_0; 6923 ret = qla25xx_init_req_que(base_vha, req); 6924 if (ret != QLA_SUCCESS) 6925 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6926 "%s Req que: %d init failed.\n", 6927 __func__, req->id); 6928 else 6929 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6930 "%s Req que: %d inited.\n", 6931 __func__, req->id); 6932 } 6933 } 6934 return ret; 6935 } 6936 6937 /* 6938 * qla2x00_reset_adapter 6939 * Reset adapter. 6940 * 6941 * Input: 6942 * ha = adapter block pointer. 6943 */ 6944 void 6945 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6946 { 6947 unsigned long flags = 0; 6948 struct qla_hw_data *ha = vha->hw; 6949 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6950 6951 vha->flags.online = 0; 6952 ha->isp_ops->disable_intrs(ha); 6953 6954 spin_lock_irqsave(&ha->hardware_lock, flags); 6955 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6956 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6957 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6958 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6959 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6960 } 6961 6962 void 6963 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6964 { 6965 unsigned long flags = 0; 6966 struct qla_hw_data *ha = vha->hw; 6967 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6968 6969 if (IS_P3P_TYPE(ha)) 6970 return; 6971 6972 vha->flags.online = 0; 6973 ha->isp_ops->disable_intrs(ha); 6974 6975 spin_lock_irqsave(&ha->hardware_lock, flags); 6976 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6977 RD_REG_DWORD(®->hccr); 6978 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6979 RD_REG_DWORD(®->hccr); 6980 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6981 6982 if (IS_NOPOLLING_TYPE(ha)) 6983 ha->isp_ops->enable_intrs(ha); 6984 } 6985 6986 /* On sparc systems, obtain port and node WWN from firmware 6987 * properties. 6988 */ 6989 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6990 struct nvram_24xx *nv) 6991 { 6992 #ifdef CONFIG_SPARC 6993 struct qla_hw_data *ha = vha->hw; 6994 struct pci_dev *pdev = ha->pdev; 6995 struct device_node *dp = pci_device_to_OF_node(pdev); 6996 const u8 *val; 6997 int len; 6998 6999 val = of_get_property(dp, "port-wwn", &len); 7000 if (val && len >= WWN_SIZE) 7001 memcpy(nv->port_name, val, WWN_SIZE); 7002 7003 val = of_get_property(dp, "node-wwn", &len); 7004 if (val && len >= WWN_SIZE) 7005 memcpy(nv->node_name, val, WWN_SIZE); 7006 #endif 7007 } 7008 7009 int 7010 qla24xx_nvram_config(scsi_qla_host_t *vha) 7011 { 7012 int rval; 7013 struct init_cb_24xx *icb; 7014 struct nvram_24xx *nv; 7015 uint32_t *dptr; 7016 uint8_t *dptr1, *dptr2; 7017 uint32_t chksum; 7018 uint16_t cnt; 7019 struct qla_hw_data *ha = vha->hw; 7020 7021 rval = QLA_SUCCESS; 7022 icb = (struct init_cb_24xx *)ha->init_cb; 7023 nv = ha->nvram; 7024 7025 /* Determine NVRAM starting address. */ 7026 if (ha->port_no == 0) { 7027 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7028 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7029 } else { 7030 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7031 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7032 } 7033 7034 ha->nvram_size = sizeof(struct nvram_24xx); 7035 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7036 7037 /* Get VPD data into cache */ 7038 ha->vpd = ha->nvram + VPD_OFFSET; 7039 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 7040 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7041 7042 /* Get NVRAM data into cache and calculate checksum. */ 7043 dptr = (uint32_t *)nv; 7044 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 7045 ha->nvram_size); 7046 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7047 chksum += le32_to_cpu(*dptr); 7048 7049 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7050 "Contents of NVRAM\n"); 7051 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7052 (uint8_t *)nv, ha->nvram_size); 7053 7054 /* Bad NVRAM data, set defaults parameters. */ 7055 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7056 || nv->id[3] != ' ' || 7057 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7058 /* Reset NVRAM data. */ 7059 ql_log(ql_log_warn, vha, 0x006b, 7060 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 7061 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 7062 ql_log(ql_log_warn, vha, 0x006c, 7063 "Falling back to functioning (yet invalid -- WWPN) " 7064 "defaults.\n"); 7065 7066 /* 7067 * Set default initialization control block. 7068 */ 7069 memset(nv, 0, ha->nvram_size); 7070 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7071 nv->version = cpu_to_le16(ICB_VERSION); 7072 nv->frame_payload_size = 2048; 7073 nv->execution_throttle = cpu_to_le16(0xFFFF); 7074 nv->exchange_count = cpu_to_le16(0); 7075 nv->hard_address = cpu_to_le16(124); 7076 nv->port_name[0] = 0x21; 7077 nv->port_name[1] = 0x00 + ha->port_no + 1; 7078 nv->port_name[2] = 0x00; 7079 nv->port_name[3] = 0xe0; 7080 nv->port_name[4] = 0x8b; 7081 nv->port_name[5] = 0x1c; 7082 nv->port_name[6] = 0x55; 7083 nv->port_name[7] = 0x86; 7084 nv->node_name[0] = 0x20; 7085 nv->node_name[1] = 0x00; 7086 nv->node_name[2] = 0x00; 7087 nv->node_name[3] = 0xe0; 7088 nv->node_name[4] = 0x8b; 7089 nv->node_name[5] = 0x1c; 7090 nv->node_name[6] = 0x55; 7091 nv->node_name[7] = 0x86; 7092 qla24xx_nvram_wwn_from_ofw(vha, nv); 7093 nv->login_retry_count = cpu_to_le16(8); 7094 nv->interrupt_delay_timer = cpu_to_le16(0); 7095 nv->login_timeout = cpu_to_le16(0); 7096 nv->firmware_options_1 = 7097 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7098 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7099 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7100 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7101 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7102 nv->efi_parameters = cpu_to_le32(0); 7103 nv->reset_delay = 5; 7104 nv->max_luns_per_target = cpu_to_le16(128); 7105 nv->port_down_retry_count = cpu_to_le16(30); 7106 nv->link_down_timeout = cpu_to_le16(30); 7107 7108 rval = 1; 7109 } 7110 7111 if (qla_tgt_mode_enabled(vha)) { 7112 /* Don't enable full login after initial LIP */ 7113 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7114 /* Don't enable LIP full login for initiator */ 7115 nv->host_p &= cpu_to_le32(~BIT_10); 7116 } 7117 7118 qlt_24xx_config_nvram_stage1(vha, nv); 7119 7120 /* Reset Initialization control block */ 7121 memset(icb, 0, ha->init_cb_size); 7122 7123 /* Copy 1st segment. */ 7124 dptr1 = (uint8_t *)icb; 7125 dptr2 = (uint8_t *)&nv->version; 7126 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7127 while (cnt--) 7128 *dptr1++ = *dptr2++; 7129 7130 icb->login_retry_count = nv->login_retry_count; 7131 icb->link_down_on_nos = nv->link_down_on_nos; 7132 7133 /* Copy 2nd segment. */ 7134 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7135 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7136 cnt = (uint8_t *)&icb->reserved_3 - 7137 (uint8_t *)&icb->interrupt_delay_timer; 7138 while (cnt--) 7139 *dptr1++ = *dptr2++; 7140 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7141 /* 7142 * Setup driver NVRAM options. 7143 */ 7144 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7145 "QLA2462"); 7146 7147 qlt_24xx_config_nvram_stage2(vha, icb); 7148 7149 if (nv->host_p & cpu_to_le32(BIT_15)) { 7150 /* Use alternate WWN? */ 7151 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7152 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7153 } 7154 7155 /* Prepare nodename */ 7156 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7157 /* 7158 * Firmware will apply the following mask if the nodename was 7159 * not provided. 7160 */ 7161 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7162 icb->node_name[0] &= 0xF0; 7163 } 7164 7165 /* Set host adapter parameters. */ 7166 ha->flags.disable_risc_code_load = 0; 7167 ha->flags.enable_lip_reset = 0; 7168 ha->flags.enable_lip_full_login = 7169 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7170 ha->flags.enable_target_reset = 7171 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7172 ha->flags.enable_led_scheme = 0; 7173 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7174 7175 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7176 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7177 7178 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7179 sizeof(ha->fw_seriallink_options24)); 7180 7181 /* save HBA serial number */ 7182 ha->serial0 = icb->port_name[5]; 7183 ha->serial1 = icb->port_name[6]; 7184 ha->serial2 = icb->port_name[7]; 7185 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7186 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7187 7188 icb->execution_throttle = cpu_to_le16(0xFFFF); 7189 7190 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7191 7192 /* Set minimum login_timeout to 4 seconds. */ 7193 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7194 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7195 if (le16_to_cpu(nv->login_timeout) < 4) 7196 nv->login_timeout = cpu_to_le16(4); 7197 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7198 7199 /* Set minimum RATOV to 100 tenths of a second. */ 7200 ha->r_a_tov = 100; 7201 7202 ha->loop_reset_delay = nv->reset_delay; 7203 7204 /* Link Down Timeout = 0: 7205 * 7206 * When Port Down timer expires we will start returning 7207 * I/O's to OS with "DID_NO_CONNECT". 7208 * 7209 * Link Down Timeout != 0: 7210 * 7211 * The driver waits for the link to come up after link down 7212 * before returning I/Os to OS with "DID_NO_CONNECT". 7213 */ 7214 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7215 ha->loop_down_abort_time = 7216 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7217 } else { 7218 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7219 ha->loop_down_abort_time = 7220 (LOOP_DOWN_TIME - ha->link_down_timeout); 7221 } 7222 7223 /* Need enough time to try and get the port back. */ 7224 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7225 if (qlport_down_retry) 7226 ha->port_down_retry_count = qlport_down_retry; 7227 7228 /* Set login_retry_count */ 7229 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7230 if (ha->port_down_retry_count == 7231 le16_to_cpu(nv->port_down_retry_count) && 7232 ha->port_down_retry_count > 3) 7233 ha->login_retry_count = ha->port_down_retry_count; 7234 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7235 ha->login_retry_count = ha->port_down_retry_count; 7236 if (ql2xloginretrycount) 7237 ha->login_retry_count = ql2xloginretrycount; 7238 7239 /* N2N: driver will initiate Login instead of FW */ 7240 icb->firmware_options_3 |= BIT_8; 7241 7242 /* Enable ZIO. */ 7243 if (!vha->flags.init_done) { 7244 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7245 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7246 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7247 le16_to_cpu(icb->interrupt_delay_timer): 2; 7248 } 7249 icb->firmware_options_2 &= cpu_to_le32( 7250 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7251 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7252 ha->zio_mode = QLA_ZIO_MODE_6; 7253 7254 ql_log(ql_log_info, vha, 0x006f, 7255 "ZIO mode %d enabled; timer delay (%d us).\n", 7256 ha->zio_mode, ha->zio_timer * 100); 7257 7258 icb->firmware_options_2 |= cpu_to_le32( 7259 (uint32_t)ha->zio_mode); 7260 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7261 } 7262 7263 if (rval) { 7264 ql_log(ql_log_warn, vha, 0x0070, 7265 "NVRAM configuration failed.\n"); 7266 } 7267 return (rval); 7268 } 7269 7270 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 7271 { 7272 struct qla27xx_image_status pri_image_status, sec_image_status; 7273 uint8_t valid_pri_image, valid_sec_image; 7274 uint32_t *wptr; 7275 uint32_t cnt, chksum, size; 7276 struct qla_hw_data *ha = vha->hw; 7277 7278 valid_pri_image = valid_sec_image = 1; 7279 ha->active_image = 0; 7280 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 7281 7282 if (!ha->flt_region_img_status_pri) { 7283 valid_pri_image = 0; 7284 goto check_sec_image; 7285 } 7286 7287 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 7288 ha->flt_region_img_status_pri, size); 7289 7290 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7291 ql_dbg(ql_dbg_init, vha, 0x018b, 7292 "Primary image signature (0x%x) not valid\n", 7293 pri_image_status.signature); 7294 valid_pri_image = 0; 7295 goto check_sec_image; 7296 } 7297 7298 wptr = (uint32_t *)(&pri_image_status); 7299 cnt = size; 7300 7301 for (chksum = 0; cnt--; wptr++) 7302 chksum += le32_to_cpu(*wptr); 7303 7304 if (chksum) { 7305 ql_dbg(ql_dbg_init, vha, 0x018c, 7306 "Checksum validation failed for primary image (0x%x)\n", 7307 chksum); 7308 valid_pri_image = 0; 7309 } 7310 7311 check_sec_image: 7312 if (!ha->flt_region_img_status_sec) { 7313 valid_sec_image = 0; 7314 goto check_valid_image; 7315 } 7316 7317 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7318 ha->flt_region_img_status_sec, size); 7319 7320 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7321 ql_dbg(ql_dbg_init, vha, 0x018d, 7322 "Secondary image signature(0x%x) not valid\n", 7323 sec_image_status.signature); 7324 valid_sec_image = 0; 7325 goto check_valid_image; 7326 } 7327 7328 wptr = (uint32_t *)(&sec_image_status); 7329 cnt = size; 7330 for (chksum = 0; cnt--; wptr++) 7331 chksum += le32_to_cpu(*wptr); 7332 if (chksum) { 7333 ql_dbg(ql_dbg_init, vha, 0x018e, 7334 "Checksum validation failed for secondary image (0x%x)\n", 7335 chksum); 7336 valid_sec_image = 0; 7337 } 7338 7339 check_valid_image: 7340 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7341 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7342 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7343 if (!ha->active_image || 7344 pri_image_status.generation_number < 7345 sec_image_status.generation_number) 7346 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7347 } 7348 7349 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n", 7350 ha->active_image == 0 ? "default bootld and fw" : 7351 ha->active_image == 1 ? "primary" : 7352 ha->active_image == 2 ? "secondary" : 7353 "Invalid"); 7354 7355 return ha->active_image; 7356 } 7357 7358 static int 7359 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7360 uint32_t faddr) 7361 { 7362 int rval = QLA_SUCCESS; 7363 int segments, fragment; 7364 uint32_t *dcode, dlen; 7365 uint32_t risc_addr; 7366 uint32_t risc_size; 7367 uint32_t i; 7368 struct qla_hw_data *ha = vha->hw; 7369 struct req_que *req = ha->req_q_map[0]; 7370 7371 ql_dbg(ql_dbg_init, vha, 0x008b, 7372 "FW: Loading firmware from flash (%x).\n", faddr); 7373 7374 rval = QLA_SUCCESS; 7375 7376 segments = FA_RISC_CODE_SEGMENTS; 7377 dcode = (uint32_t *)req->ring; 7378 *srisc_addr = 0; 7379 7380 if (IS_QLA27XX(ha) && 7381 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7382 faddr = ha->flt_region_fw_sec; 7383 7384 /* Validate firmware image by checking version. */ 7385 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7386 for (i = 0; i < 4; i++) 7387 dcode[i] = be32_to_cpu(dcode[i]); 7388 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7389 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7390 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7391 dcode[3] == 0)) { 7392 ql_log(ql_log_fatal, vha, 0x008c, 7393 "Unable to verify the integrity of flash firmware " 7394 "image.\n"); 7395 ql_log(ql_log_fatal, vha, 0x008d, 7396 "Firmware data: %08x %08x %08x %08x.\n", 7397 dcode[0], dcode[1], dcode[2], dcode[3]); 7398 7399 return QLA_FUNCTION_FAILED; 7400 } 7401 7402 while (segments && rval == QLA_SUCCESS) { 7403 /* Read segment's load information. */ 7404 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7405 7406 risc_addr = be32_to_cpu(dcode[2]); 7407 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7408 risc_size = be32_to_cpu(dcode[3]); 7409 7410 fragment = 0; 7411 while (risc_size > 0 && rval == QLA_SUCCESS) { 7412 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7413 if (dlen > risc_size) 7414 dlen = risc_size; 7415 7416 ql_dbg(ql_dbg_init, vha, 0x008e, 7417 "Loading risc segment@ risc addr %x " 7418 "number of dwords 0x%x offset 0x%x.\n", 7419 risc_addr, dlen, faddr); 7420 7421 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7422 for (i = 0; i < dlen; i++) 7423 dcode[i] = swab32(dcode[i]); 7424 7425 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7426 dlen); 7427 if (rval) { 7428 ql_log(ql_log_fatal, vha, 0x008f, 7429 "Failed to load segment %d of firmware.\n", 7430 fragment); 7431 return QLA_FUNCTION_FAILED; 7432 } 7433 7434 faddr += dlen; 7435 risc_addr += dlen; 7436 risc_size -= dlen; 7437 fragment++; 7438 } 7439 7440 /* Next segment. */ 7441 segments--; 7442 } 7443 7444 if (!IS_QLA27XX(ha)) 7445 return rval; 7446 7447 if (ha->fw_dump_template) 7448 vfree(ha->fw_dump_template); 7449 ha->fw_dump_template = NULL; 7450 ha->fw_dump_template_len = 0; 7451 7452 ql_dbg(ql_dbg_init, vha, 0x0161, 7453 "Loading fwdump template from %x\n", faddr); 7454 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7455 risc_size = be32_to_cpu(dcode[2]); 7456 ql_dbg(ql_dbg_init, vha, 0x0162, 7457 "-> array size %x dwords\n", risc_size); 7458 if (risc_size == 0 || risc_size == ~0) 7459 goto default_template; 7460 7461 dlen = (risc_size - 8) * sizeof(*dcode); 7462 ql_dbg(ql_dbg_init, vha, 0x0163, 7463 "-> template allocating %x bytes...\n", dlen); 7464 ha->fw_dump_template = vmalloc(dlen); 7465 if (!ha->fw_dump_template) { 7466 ql_log(ql_log_warn, vha, 0x0164, 7467 "Failed fwdump template allocate %x bytes.\n", risc_size); 7468 goto default_template; 7469 } 7470 7471 faddr += 7; 7472 risc_size -= 8; 7473 dcode = ha->fw_dump_template; 7474 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7475 for (i = 0; i < risc_size; i++) 7476 dcode[i] = le32_to_cpu(dcode[i]); 7477 7478 if (!qla27xx_fwdt_template_valid(dcode)) { 7479 ql_log(ql_log_warn, vha, 0x0165, 7480 "Failed fwdump template validate\n"); 7481 goto default_template; 7482 } 7483 7484 dlen = qla27xx_fwdt_template_size(dcode); 7485 ql_dbg(ql_dbg_init, vha, 0x0166, 7486 "-> template size %x bytes\n", dlen); 7487 if (dlen > risc_size * sizeof(*dcode)) { 7488 ql_log(ql_log_warn, vha, 0x0167, 7489 "Failed fwdump template exceeds array by %zx bytes\n", 7490 (size_t)(dlen - risc_size * sizeof(*dcode))); 7491 goto default_template; 7492 } 7493 ha->fw_dump_template_len = dlen; 7494 return rval; 7495 7496 default_template: 7497 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7498 if (ha->fw_dump_template) 7499 vfree(ha->fw_dump_template); 7500 ha->fw_dump_template = NULL; 7501 ha->fw_dump_template_len = 0; 7502 7503 dlen = qla27xx_fwdt_template_default_size(); 7504 ql_dbg(ql_dbg_init, vha, 0x0169, 7505 "-> template allocating %x bytes...\n", dlen); 7506 ha->fw_dump_template = vmalloc(dlen); 7507 if (!ha->fw_dump_template) { 7508 ql_log(ql_log_warn, vha, 0x016a, 7509 "Failed fwdump template allocate %x bytes.\n", risc_size); 7510 goto failed_template; 7511 } 7512 7513 dcode = ha->fw_dump_template; 7514 risc_size = dlen / sizeof(*dcode); 7515 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7516 for (i = 0; i < risc_size; i++) 7517 dcode[i] = be32_to_cpu(dcode[i]); 7518 7519 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7520 ql_log(ql_log_warn, vha, 0x016b, 7521 "Failed fwdump template validate\n"); 7522 goto failed_template; 7523 } 7524 7525 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7526 ql_dbg(ql_dbg_init, vha, 0x016c, 7527 "-> template size %x bytes\n", dlen); 7528 ha->fw_dump_template_len = dlen; 7529 return rval; 7530 7531 failed_template: 7532 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7533 if (ha->fw_dump_template) 7534 vfree(ha->fw_dump_template); 7535 ha->fw_dump_template = NULL; 7536 ha->fw_dump_template_len = 0; 7537 return rval; 7538 } 7539 7540 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7541 7542 int 7543 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7544 { 7545 int rval; 7546 int i, fragment; 7547 uint16_t *wcode, *fwcode; 7548 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7549 struct fw_blob *blob; 7550 struct qla_hw_data *ha = vha->hw; 7551 struct req_que *req = ha->req_q_map[0]; 7552 7553 /* Load firmware blob. */ 7554 blob = qla2x00_request_firmware(vha); 7555 if (!blob) { 7556 ql_log(ql_log_info, vha, 0x0083, 7557 "Firmware image unavailable.\n"); 7558 ql_log(ql_log_info, vha, 0x0084, 7559 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7560 return QLA_FUNCTION_FAILED; 7561 } 7562 7563 rval = QLA_SUCCESS; 7564 7565 wcode = (uint16_t *)req->ring; 7566 *srisc_addr = 0; 7567 fwcode = (uint16_t *)blob->fw->data; 7568 fwclen = 0; 7569 7570 /* Validate firmware image by checking version. */ 7571 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7572 ql_log(ql_log_fatal, vha, 0x0085, 7573 "Unable to verify integrity of firmware image (%zd).\n", 7574 blob->fw->size); 7575 goto fail_fw_integrity; 7576 } 7577 for (i = 0; i < 4; i++) 7578 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7579 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7580 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7581 wcode[2] == 0 && wcode[3] == 0)) { 7582 ql_log(ql_log_fatal, vha, 0x0086, 7583 "Unable to verify integrity of firmware image.\n"); 7584 ql_log(ql_log_fatal, vha, 0x0087, 7585 "Firmware data: %04x %04x %04x %04x.\n", 7586 wcode[0], wcode[1], wcode[2], wcode[3]); 7587 goto fail_fw_integrity; 7588 } 7589 7590 seg = blob->segs; 7591 while (*seg && rval == QLA_SUCCESS) { 7592 risc_addr = *seg; 7593 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7594 risc_size = be16_to_cpu(fwcode[3]); 7595 7596 /* Validate firmware image size. */ 7597 fwclen += risc_size * sizeof(uint16_t); 7598 if (blob->fw->size < fwclen) { 7599 ql_log(ql_log_fatal, vha, 0x0088, 7600 "Unable to verify integrity of firmware image " 7601 "(%zd).\n", blob->fw->size); 7602 goto fail_fw_integrity; 7603 } 7604 7605 fragment = 0; 7606 while (risc_size > 0 && rval == QLA_SUCCESS) { 7607 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7608 if (wlen > risc_size) 7609 wlen = risc_size; 7610 ql_dbg(ql_dbg_init, vha, 0x0089, 7611 "Loading risc segment@ risc addr %x number of " 7612 "words 0x%x.\n", risc_addr, wlen); 7613 7614 for (i = 0; i < wlen; i++) 7615 wcode[i] = swab16(fwcode[i]); 7616 7617 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7618 wlen); 7619 if (rval) { 7620 ql_log(ql_log_fatal, vha, 0x008a, 7621 "Failed to load segment %d of firmware.\n", 7622 fragment); 7623 break; 7624 } 7625 7626 fwcode += wlen; 7627 risc_addr += wlen; 7628 risc_size -= wlen; 7629 fragment++; 7630 } 7631 7632 /* Next segment. */ 7633 seg++; 7634 } 7635 return rval; 7636 7637 fail_fw_integrity: 7638 return QLA_FUNCTION_FAILED; 7639 } 7640 7641 static int 7642 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7643 { 7644 int rval; 7645 int segments, fragment; 7646 uint32_t *dcode, dlen; 7647 uint32_t risc_addr; 7648 uint32_t risc_size; 7649 uint32_t i; 7650 struct fw_blob *blob; 7651 const uint32_t *fwcode; 7652 uint32_t fwclen; 7653 struct qla_hw_data *ha = vha->hw; 7654 struct req_que *req = ha->req_q_map[0]; 7655 7656 /* Load firmware blob. */ 7657 blob = qla2x00_request_firmware(vha); 7658 if (!blob) { 7659 ql_log(ql_log_warn, vha, 0x0090, 7660 "Firmware image unavailable.\n"); 7661 ql_log(ql_log_warn, vha, 0x0091, 7662 "Firmware images can be retrieved from: " 7663 QLA_FW_URL ".\n"); 7664 7665 return QLA_FUNCTION_FAILED; 7666 } 7667 7668 ql_dbg(ql_dbg_init, vha, 0x0092, 7669 "FW: Loading via request-firmware.\n"); 7670 7671 rval = QLA_SUCCESS; 7672 7673 segments = FA_RISC_CODE_SEGMENTS; 7674 dcode = (uint32_t *)req->ring; 7675 *srisc_addr = 0; 7676 fwcode = (uint32_t *)blob->fw->data; 7677 fwclen = 0; 7678 7679 /* Validate firmware image by checking version. */ 7680 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7681 ql_log(ql_log_fatal, vha, 0x0093, 7682 "Unable to verify integrity of firmware image (%zd).\n", 7683 blob->fw->size); 7684 return QLA_FUNCTION_FAILED; 7685 } 7686 for (i = 0; i < 4; i++) 7687 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7688 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7689 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7690 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7691 dcode[3] == 0)) { 7692 ql_log(ql_log_fatal, vha, 0x0094, 7693 "Unable to verify integrity of firmware image (%zd).\n", 7694 blob->fw->size); 7695 ql_log(ql_log_fatal, vha, 0x0095, 7696 "Firmware data: %08x %08x %08x %08x.\n", 7697 dcode[0], dcode[1], dcode[2], dcode[3]); 7698 return QLA_FUNCTION_FAILED; 7699 } 7700 7701 while (segments && rval == QLA_SUCCESS) { 7702 risc_addr = be32_to_cpu(fwcode[2]); 7703 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7704 risc_size = be32_to_cpu(fwcode[3]); 7705 7706 /* Validate firmware image size. */ 7707 fwclen += risc_size * sizeof(uint32_t); 7708 if (blob->fw->size < fwclen) { 7709 ql_log(ql_log_fatal, vha, 0x0096, 7710 "Unable to verify integrity of firmware image " 7711 "(%zd).\n", blob->fw->size); 7712 return QLA_FUNCTION_FAILED; 7713 } 7714 7715 fragment = 0; 7716 while (risc_size > 0 && rval == QLA_SUCCESS) { 7717 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7718 if (dlen > risc_size) 7719 dlen = risc_size; 7720 7721 ql_dbg(ql_dbg_init, vha, 0x0097, 7722 "Loading risc segment@ risc addr %x " 7723 "number of dwords 0x%x.\n", risc_addr, dlen); 7724 7725 for (i = 0; i < dlen; i++) 7726 dcode[i] = swab32(fwcode[i]); 7727 7728 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7729 dlen); 7730 if (rval) { 7731 ql_log(ql_log_fatal, vha, 0x0098, 7732 "Failed to load segment %d of firmware.\n", 7733 fragment); 7734 return QLA_FUNCTION_FAILED; 7735 } 7736 7737 fwcode += dlen; 7738 risc_addr += dlen; 7739 risc_size -= dlen; 7740 fragment++; 7741 } 7742 7743 /* Next segment. */ 7744 segments--; 7745 } 7746 7747 if (!IS_QLA27XX(ha)) 7748 return rval; 7749 7750 if (ha->fw_dump_template) 7751 vfree(ha->fw_dump_template); 7752 ha->fw_dump_template = NULL; 7753 ha->fw_dump_template_len = 0; 7754 7755 ql_dbg(ql_dbg_init, vha, 0x171, 7756 "Loading fwdump template from %x\n", 7757 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7758 risc_size = be32_to_cpu(fwcode[2]); 7759 ql_dbg(ql_dbg_init, vha, 0x172, 7760 "-> array size %x dwords\n", risc_size); 7761 if (risc_size == 0 || risc_size == ~0) 7762 goto default_template; 7763 7764 dlen = (risc_size - 8) * sizeof(*fwcode); 7765 ql_dbg(ql_dbg_init, vha, 0x0173, 7766 "-> template allocating %x bytes...\n", dlen); 7767 ha->fw_dump_template = vmalloc(dlen); 7768 if (!ha->fw_dump_template) { 7769 ql_log(ql_log_warn, vha, 0x0174, 7770 "Failed fwdump template allocate %x bytes.\n", risc_size); 7771 goto default_template; 7772 } 7773 7774 fwcode += 7; 7775 risc_size -= 8; 7776 dcode = ha->fw_dump_template; 7777 for (i = 0; i < risc_size; i++) 7778 dcode[i] = le32_to_cpu(fwcode[i]); 7779 7780 if (!qla27xx_fwdt_template_valid(dcode)) { 7781 ql_log(ql_log_warn, vha, 0x0175, 7782 "Failed fwdump template validate\n"); 7783 goto default_template; 7784 } 7785 7786 dlen = qla27xx_fwdt_template_size(dcode); 7787 ql_dbg(ql_dbg_init, vha, 0x0176, 7788 "-> template size %x bytes\n", dlen); 7789 if (dlen > risc_size * sizeof(*fwcode)) { 7790 ql_log(ql_log_warn, vha, 0x0177, 7791 "Failed fwdump template exceeds array by %zx bytes\n", 7792 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7793 goto default_template; 7794 } 7795 ha->fw_dump_template_len = dlen; 7796 return rval; 7797 7798 default_template: 7799 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7800 if (ha->fw_dump_template) 7801 vfree(ha->fw_dump_template); 7802 ha->fw_dump_template = NULL; 7803 ha->fw_dump_template_len = 0; 7804 7805 dlen = qla27xx_fwdt_template_default_size(); 7806 ql_dbg(ql_dbg_init, vha, 0x0179, 7807 "-> template allocating %x bytes...\n", dlen); 7808 ha->fw_dump_template = vmalloc(dlen); 7809 if (!ha->fw_dump_template) { 7810 ql_log(ql_log_warn, vha, 0x017a, 7811 "Failed fwdump template allocate %x bytes.\n", risc_size); 7812 goto failed_template; 7813 } 7814 7815 dcode = ha->fw_dump_template; 7816 risc_size = dlen / sizeof(*fwcode); 7817 fwcode = qla27xx_fwdt_template_default(); 7818 for (i = 0; i < risc_size; i++) 7819 dcode[i] = be32_to_cpu(fwcode[i]); 7820 7821 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7822 ql_log(ql_log_warn, vha, 0x017b, 7823 "Failed fwdump template validate\n"); 7824 goto failed_template; 7825 } 7826 7827 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7828 ql_dbg(ql_dbg_init, vha, 0x017c, 7829 "-> template size %x bytes\n", dlen); 7830 ha->fw_dump_template_len = dlen; 7831 return rval; 7832 7833 failed_template: 7834 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7835 if (ha->fw_dump_template) 7836 vfree(ha->fw_dump_template); 7837 ha->fw_dump_template = NULL; 7838 ha->fw_dump_template_len = 0; 7839 return rval; 7840 } 7841 7842 int 7843 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7844 { 7845 int rval; 7846 7847 if (ql2xfwloadbin == 1) 7848 return qla81xx_load_risc(vha, srisc_addr); 7849 7850 /* 7851 * FW Load priority: 7852 * 1) Firmware via request-firmware interface (.bin file). 7853 * 2) Firmware residing in flash. 7854 */ 7855 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7856 if (rval == QLA_SUCCESS) 7857 return rval; 7858 7859 return qla24xx_load_risc_flash(vha, srisc_addr, 7860 vha->hw->flt_region_fw); 7861 } 7862 7863 int 7864 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7865 { 7866 int rval; 7867 struct qla_hw_data *ha = vha->hw; 7868 7869 if (ql2xfwloadbin == 2) 7870 goto try_blob_fw; 7871 7872 /* 7873 * FW Load priority: 7874 * 1) Firmware residing in flash. 7875 * 2) Firmware via request-firmware interface (.bin file). 7876 * 3) Golden-Firmware residing in flash -- limited operation. 7877 */ 7878 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7879 if (rval == QLA_SUCCESS) 7880 return rval; 7881 7882 try_blob_fw: 7883 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7884 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7885 return rval; 7886 7887 ql_log(ql_log_info, vha, 0x0099, 7888 "Attempting to fallback to golden firmware.\n"); 7889 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7890 if (rval != QLA_SUCCESS) 7891 return rval; 7892 7893 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7894 ha->flags.running_gold_fw = 1; 7895 return rval; 7896 } 7897 7898 void 7899 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7900 { 7901 int ret, retries; 7902 struct qla_hw_data *ha = vha->hw; 7903 7904 if (ha->flags.pci_channel_io_perm_failure) 7905 return; 7906 if (!IS_FWI2_CAPABLE(ha)) 7907 return; 7908 if (!ha->fw_major_version) 7909 return; 7910 if (!ha->flags.fw_started) 7911 return; 7912 7913 ret = qla2x00_stop_firmware(vha); 7914 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7915 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7916 ha->isp_ops->reset_chip(vha); 7917 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7918 continue; 7919 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7920 continue; 7921 ql_log(ql_log_info, vha, 0x8015, 7922 "Attempting retry of stop-firmware command.\n"); 7923 ret = qla2x00_stop_firmware(vha); 7924 } 7925 7926 QLA_FW_STOPPED(ha); 7927 ha->flags.fw_init_done = 0; 7928 } 7929 7930 int 7931 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7932 { 7933 int rval = QLA_SUCCESS; 7934 int rval2; 7935 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7936 struct qla_hw_data *ha = vha->hw; 7937 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7938 struct req_que *req; 7939 struct rsp_que *rsp; 7940 7941 if (!vha->vp_idx) 7942 return -EINVAL; 7943 7944 rval = qla2x00_fw_ready(base_vha); 7945 if (vha->qpair) 7946 req = vha->qpair->req; 7947 else 7948 req = ha->req_q_map[0]; 7949 rsp = req->rsp; 7950 7951 if (rval == QLA_SUCCESS) { 7952 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7953 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7954 } 7955 7956 vha->flags.management_server_logged_in = 0; 7957 7958 /* Login to SNS first */ 7959 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7960 BIT_1); 7961 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7962 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7963 ql_dbg(ql_dbg_init, vha, 0x0120, 7964 "Failed SNS login: loop_id=%x, rval2=%d\n", 7965 NPH_SNS, rval2); 7966 else 7967 ql_dbg(ql_dbg_init, vha, 0x0103, 7968 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7969 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7970 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7971 return (QLA_FUNCTION_FAILED); 7972 } 7973 7974 atomic_set(&vha->loop_down_timer, 0); 7975 atomic_set(&vha->loop_state, LOOP_UP); 7976 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7977 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7978 rval = qla2x00_loop_resync(base_vha); 7979 7980 return rval; 7981 } 7982 7983 /* 84XX Support **************************************************************/ 7984 7985 static LIST_HEAD(qla_cs84xx_list); 7986 static DEFINE_MUTEX(qla_cs84xx_mutex); 7987 7988 static struct qla_chip_state_84xx * 7989 qla84xx_get_chip(struct scsi_qla_host *vha) 7990 { 7991 struct qla_chip_state_84xx *cs84xx; 7992 struct qla_hw_data *ha = vha->hw; 7993 7994 mutex_lock(&qla_cs84xx_mutex); 7995 7996 /* Find any shared 84xx chip. */ 7997 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7998 if (cs84xx->bus == ha->pdev->bus) { 7999 kref_get(&cs84xx->kref); 8000 goto done; 8001 } 8002 } 8003 8004 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8005 if (!cs84xx) 8006 goto done; 8007 8008 kref_init(&cs84xx->kref); 8009 spin_lock_init(&cs84xx->access_lock); 8010 mutex_init(&cs84xx->fw_update_mutex); 8011 cs84xx->bus = ha->pdev->bus; 8012 8013 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8014 done: 8015 mutex_unlock(&qla_cs84xx_mutex); 8016 return cs84xx; 8017 } 8018 8019 static void 8020 __qla84xx_chip_release(struct kref *kref) 8021 { 8022 struct qla_chip_state_84xx *cs84xx = 8023 container_of(kref, struct qla_chip_state_84xx, kref); 8024 8025 mutex_lock(&qla_cs84xx_mutex); 8026 list_del(&cs84xx->list); 8027 mutex_unlock(&qla_cs84xx_mutex); 8028 kfree(cs84xx); 8029 } 8030 8031 void 8032 qla84xx_put_chip(struct scsi_qla_host *vha) 8033 { 8034 struct qla_hw_data *ha = vha->hw; 8035 if (ha->cs84xx) 8036 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8037 } 8038 8039 static int 8040 qla84xx_init_chip(scsi_qla_host_t *vha) 8041 { 8042 int rval; 8043 uint16_t status[2]; 8044 struct qla_hw_data *ha = vha->hw; 8045 8046 mutex_lock(&ha->cs84xx->fw_update_mutex); 8047 8048 rval = qla84xx_verify_chip(vha, status); 8049 8050 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8051 8052 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 8053 QLA_SUCCESS; 8054 } 8055 8056 /* 81XX Support **************************************************************/ 8057 8058 int 8059 qla81xx_nvram_config(scsi_qla_host_t *vha) 8060 { 8061 int rval; 8062 struct init_cb_81xx *icb; 8063 struct nvram_81xx *nv; 8064 uint32_t *dptr; 8065 uint8_t *dptr1, *dptr2; 8066 uint32_t chksum; 8067 uint16_t cnt; 8068 struct qla_hw_data *ha = vha->hw; 8069 8070 rval = QLA_SUCCESS; 8071 icb = (struct init_cb_81xx *)ha->init_cb; 8072 nv = ha->nvram; 8073 8074 /* Determine NVRAM starting address. */ 8075 ha->nvram_size = sizeof(struct nvram_81xx); 8076 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8077 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8078 ha->vpd_size = FA_VPD_SIZE_82XX; 8079 8080 /* Get VPD data into cache */ 8081 ha->vpd = ha->nvram + VPD_OFFSET; 8082 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 8083 ha->vpd_size); 8084 8085 /* Get NVRAM data into cache and calculate checksum. */ 8086 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 8087 ha->nvram_size); 8088 dptr = (uint32_t *)nv; 8089 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8090 chksum += le32_to_cpu(*dptr); 8091 8092 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8093 "Contents of NVRAM:\n"); 8094 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8095 (uint8_t *)nv, ha->nvram_size); 8096 8097 /* Bad NVRAM data, set defaults parameters. */ 8098 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 8099 || nv->id[3] != ' ' || 8100 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 8101 /* Reset NVRAM data. */ 8102 ql_log(ql_log_info, vha, 0x0073, 8103 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 8104 "version=0x%x.\n", chksum, nv->id[0], 8105 le16_to_cpu(nv->nvram_version)); 8106 ql_log(ql_log_info, vha, 0x0074, 8107 "Falling back to functioning (yet invalid -- WWPN) " 8108 "defaults.\n"); 8109 8110 /* 8111 * Set default initialization control block. 8112 */ 8113 memset(nv, 0, ha->nvram_size); 8114 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8115 nv->version = cpu_to_le16(ICB_VERSION); 8116 nv->frame_payload_size = 2048; 8117 nv->execution_throttle = cpu_to_le16(0xFFFF); 8118 nv->exchange_count = cpu_to_le16(0); 8119 nv->port_name[0] = 0x21; 8120 nv->port_name[1] = 0x00 + ha->port_no + 1; 8121 nv->port_name[2] = 0x00; 8122 nv->port_name[3] = 0xe0; 8123 nv->port_name[4] = 0x8b; 8124 nv->port_name[5] = 0x1c; 8125 nv->port_name[6] = 0x55; 8126 nv->port_name[7] = 0x86; 8127 nv->node_name[0] = 0x20; 8128 nv->node_name[1] = 0x00; 8129 nv->node_name[2] = 0x00; 8130 nv->node_name[3] = 0xe0; 8131 nv->node_name[4] = 0x8b; 8132 nv->node_name[5] = 0x1c; 8133 nv->node_name[6] = 0x55; 8134 nv->node_name[7] = 0x86; 8135 nv->login_retry_count = cpu_to_le16(8); 8136 nv->interrupt_delay_timer = cpu_to_le16(0); 8137 nv->login_timeout = cpu_to_le16(0); 8138 nv->firmware_options_1 = 8139 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8140 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8141 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8142 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8143 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8144 nv->efi_parameters = cpu_to_le32(0); 8145 nv->reset_delay = 5; 8146 nv->max_luns_per_target = cpu_to_le16(128); 8147 nv->port_down_retry_count = cpu_to_le16(30); 8148 nv->link_down_timeout = cpu_to_le16(180); 8149 nv->enode_mac[0] = 0x00; 8150 nv->enode_mac[1] = 0xC0; 8151 nv->enode_mac[2] = 0xDD; 8152 nv->enode_mac[3] = 0x04; 8153 nv->enode_mac[4] = 0x05; 8154 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8155 8156 rval = 1; 8157 } 8158 8159 if (IS_T10_PI_CAPABLE(ha)) 8160 nv->frame_payload_size &= ~7; 8161 8162 qlt_81xx_config_nvram_stage1(vha, nv); 8163 8164 /* Reset Initialization control block */ 8165 memset(icb, 0, ha->init_cb_size); 8166 8167 /* Copy 1st segment. */ 8168 dptr1 = (uint8_t *)icb; 8169 dptr2 = (uint8_t *)&nv->version; 8170 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8171 while (cnt--) 8172 *dptr1++ = *dptr2++; 8173 8174 icb->login_retry_count = nv->login_retry_count; 8175 8176 /* Copy 2nd segment. */ 8177 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8178 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8179 cnt = (uint8_t *)&icb->reserved_5 - 8180 (uint8_t *)&icb->interrupt_delay_timer; 8181 while (cnt--) 8182 *dptr1++ = *dptr2++; 8183 8184 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8185 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8186 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8187 icb->enode_mac[0] = 0x00; 8188 icb->enode_mac[1] = 0xC0; 8189 icb->enode_mac[2] = 0xDD; 8190 icb->enode_mac[3] = 0x04; 8191 icb->enode_mac[4] = 0x05; 8192 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8193 } 8194 8195 /* Use extended-initialization control block. */ 8196 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8197 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8198 /* 8199 * Setup driver NVRAM options. 8200 */ 8201 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8202 "QLE8XXX"); 8203 8204 qlt_81xx_config_nvram_stage2(vha, icb); 8205 8206 /* Use alternate WWN? */ 8207 if (nv->host_p & cpu_to_le32(BIT_15)) { 8208 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8209 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8210 } 8211 8212 /* Prepare nodename */ 8213 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8214 /* 8215 * Firmware will apply the following mask if the nodename was 8216 * not provided. 8217 */ 8218 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8219 icb->node_name[0] &= 0xF0; 8220 } 8221 8222 /* Set host adapter parameters. */ 8223 ha->flags.disable_risc_code_load = 0; 8224 ha->flags.enable_lip_reset = 0; 8225 ha->flags.enable_lip_full_login = 8226 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 8227 ha->flags.enable_target_reset = 8228 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 8229 ha->flags.enable_led_scheme = 0; 8230 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 8231 8232 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8233 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8234 8235 /* save HBA serial number */ 8236 ha->serial0 = icb->port_name[5]; 8237 ha->serial1 = icb->port_name[6]; 8238 ha->serial2 = icb->port_name[7]; 8239 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8240 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8241 8242 icb->execution_throttle = cpu_to_le16(0xFFFF); 8243 8244 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8245 8246 /* Set minimum login_timeout to 4 seconds. */ 8247 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8248 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8249 if (le16_to_cpu(nv->login_timeout) < 4) 8250 nv->login_timeout = cpu_to_le16(4); 8251 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8252 8253 /* Set minimum RATOV to 100 tenths of a second. */ 8254 ha->r_a_tov = 100; 8255 8256 ha->loop_reset_delay = nv->reset_delay; 8257 8258 /* Link Down Timeout = 0: 8259 * 8260 * When Port Down timer expires we will start returning 8261 * I/O's to OS with "DID_NO_CONNECT". 8262 * 8263 * Link Down Timeout != 0: 8264 * 8265 * The driver waits for the link to come up after link down 8266 * before returning I/Os to OS with "DID_NO_CONNECT". 8267 */ 8268 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8269 ha->loop_down_abort_time = 8270 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8271 } else { 8272 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8273 ha->loop_down_abort_time = 8274 (LOOP_DOWN_TIME - ha->link_down_timeout); 8275 } 8276 8277 /* Need enough time to try and get the port back. */ 8278 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8279 if (qlport_down_retry) 8280 ha->port_down_retry_count = qlport_down_retry; 8281 8282 /* Set login_retry_count */ 8283 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8284 if (ha->port_down_retry_count == 8285 le16_to_cpu(nv->port_down_retry_count) && 8286 ha->port_down_retry_count > 3) 8287 ha->login_retry_count = ha->port_down_retry_count; 8288 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8289 ha->login_retry_count = ha->port_down_retry_count; 8290 if (ql2xloginretrycount) 8291 ha->login_retry_count = ql2xloginretrycount; 8292 8293 /* if not running MSI-X we need handshaking on interrupts */ 8294 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8295 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8296 8297 /* Enable ZIO. */ 8298 if (!vha->flags.init_done) { 8299 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8300 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8301 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8302 le16_to_cpu(icb->interrupt_delay_timer): 2; 8303 } 8304 icb->firmware_options_2 &= cpu_to_le32( 8305 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8306 vha->flags.process_response_queue = 0; 8307 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8308 ha->zio_mode = QLA_ZIO_MODE_6; 8309 8310 ql_log(ql_log_info, vha, 0x0075, 8311 "ZIO mode %d enabled; timer delay (%d us).\n", 8312 ha->zio_mode, 8313 ha->zio_timer * 100); 8314 8315 icb->firmware_options_2 |= cpu_to_le32( 8316 (uint32_t)ha->zio_mode); 8317 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8318 vha->flags.process_response_queue = 1; 8319 } 8320 8321 /* enable RIDA Format2 */ 8322 icb->firmware_options_3 |= BIT_0; 8323 8324 /* N2N: driver will initiate Login instead of FW */ 8325 icb->firmware_options_3 |= BIT_8; 8326 8327 if (IS_QLA27XX(ha)) { 8328 icb->firmware_options_3 |= BIT_8; 8329 ql_dbg(ql_log_info, vha, 0x0075, 8330 "Enabling direct connection.\n"); 8331 } 8332 8333 if (rval) { 8334 ql_log(ql_log_warn, vha, 0x0076, 8335 "NVRAM configuration failed.\n"); 8336 } 8337 return (rval); 8338 } 8339 8340 int 8341 qla82xx_restart_isp(scsi_qla_host_t *vha) 8342 { 8343 int status, rval; 8344 struct qla_hw_data *ha = vha->hw; 8345 struct req_que *req = ha->req_q_map[0]; 8346 struct rsp_que *rsp = ha->rsp_q_map[0]; 8347 struct scsi_qla_host *vp; 8348 unsigned long flags; 8349 8350 status = qla2x00_init_rings(vha); 8351 if (!status) { 8352 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8353 ha->flags.chip_reset_done = 1; 8354 8355 status = qla2x00_fw_ready(vha); 8356 if (!status) { 8357 /* Issue a marker after FW becomes ready. */ 8358 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8359 vha->flags.online = 1; 8360 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8361 } 8362 8363 /* if no cable then assume it's good */ 8364 if ((vha->device_flags & DFLG_NO_CABLE)) 8365 status = 0; 8366 } 8367 8368 if (!status) { 8369 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8370 8371 if (!atomic_read(&vha->loop_down_timer)) { 8372 /* 8373 * Issue marker command only when we are going 8374 * to start the I/O . 8375 */ 8376 vha->marker_needed = 1; 8377 } 8378 8379 ha->isp_ops->enable_intrs(ha); 8380 8381 ha->isp_abort_cnt = 0; 8382 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8383 8384 /* Update the firmware version */ 8385 status = qla82xx_check_md_needed(vha); 8386 8387 if (ha->fce) { 8388 ha->flags.fce_enabled = 1; 8389 memset(ha->fce, 0, 8390 fce_calc_size(ha->fce_bufs)); 8391 rval = qla2x00_enable_fce_trace(vha, 8392 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8393 &ha->fce_bufs); 8394 if (rval) { 8395 ql_log(ql_log_warn, vha, 0x8001, 8396 "Unable to reinitialize FCE (%d).\n", 8397 rval); 8398 ha->flags.fce_enabled = 0; 8399 } 8400 } 8401 8402 if (ha->eft) { 8403 memset(ha->eft, 0, EFT_SIZE); 8404 rval = qla2x00_enable_eft_trace(vha, 8405 ha->eft_dma, EFT_NUM_BUFFERS); 8406 if (rval) { 8407 ql_log(ql_log_warn, vha, 0x8010, 8408 "Unable to reinitialize EFT (%d).\n", 8409 rval); 8410 } 8411 } 8412 } 8413 8414 if (!status) { 8415 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8416 "qla82xx_restart_isp succeeded.\n"); 8417 8418 spin_lock_irqsave(&ha->vport_slock, flags); 8419 list_for_each_entry(vp, &ha->vp_list, list) { 8420 if (vp->vp_idx) { 8421 atomic_inc(&vp->vref_count); 8422 spin_unlock_irqrestore(&ha->vport_slock, flags); 8423 8424 qla2x00_vp_abort_isp(vp); 8425 8426 spin_lock_irqsave(&ha->vport_slock, flags); 8427 atomic_dec(&vp->vref_count); 8428 } 8429 } 8430 spin_unlock_irqrestore(&ha->vport_slock, flags); 8431 8432 } else { 8433 ql_log(ql_log_warn, vha, 0x8016, 8434 "qla82xx_restart_isp **** FAILED ****.\n"); 8435 } 8436 8437 return status; 8438 } 8439 8440 void 8441 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8442 { 8443 struct qla_hw_data *ha = vha->hw; 8444 8445 /* Hold status IOCBs until ABTS response received. */ 8446 if (ql2xfwholdabts) 8447 ha->fw_options[3] |= BIT_12; 8448 8449 /* Set Retry FLOGI in case of P2P connection */ 8450 if (ha->operating_mode == P2P) { 8451 ha->fw_options[2] |= BIT_3; 8452 ql_dbg(ql_dbg_disc, vha, 0x2103, 8453 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8454 __func__, ha->fw_options[2]); 8455 } 8456 8457 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8458 if (ql2xmvasynctoatio) { 8459 if (qla_tgt_mode_enabled(vha) || 8460 qla_dual_mode_enabled(vha)) 8461 ha->fw_options[2] |= BIT_11; 8462 else 8463 ha->fw_options[2] &= ~BIT_11; 8464 } 8465 8466 if (qla_tgt_mode_enabled(vha) || 8467 qla_dual_mode_enabled(vha)) { 8468 /* FW auto send SCSI status during */ 8469 ha->fw_options[1] |= BIT_8; 8470 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8471 8472 /* FW perform Exchange validation */ 8473 ha->fw_options[2] |= BIT_4; 8474 } else { 8475 ha->fw_options[1] &= ~BIT_8; 8476 ha->fw_options[10] &= 0x00ff; 8477 8478 ha->fw_options[2] &= ~BIT_4; 8479 } 8480 8481 if (ql2xetsenable) { 8482 /* Enable ETS Burst. */ 8483 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8484 ha->fw_options[2] |= BIT_9; 8485 } 8486 8487 ql_dbg(ql_dbg_init, vha, 0x00e9, 8488 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8489 __func__, ha->fw_options[1], ha->fw_options[2], 8490 ha->fw_options[3], vha->host->active_mode); 8491 8492 qla2x00_set_fw_options(vha, ha->fw_options); 8493 } 8494 8495 /* 8496 * qla24xx_get_fcp_prio 8497 * Gets the fcp cmd priority value for the logged in port. 8498 * Looks for a match of the port descriptors within 8499 * each of the fcp prio config entries. If a match is found, 8500 * the tag (priority) value is returned. 8501 * 8502 * Input: 8503 * vha = scsi host structure pointer. 8504 * fcport = port structure pointer. 8505 * 8506 * Return: 8507 * non-zero (if found) 8508 * -1 (if not found) 8509 * 8510 * Context: 8511 * Kernel context 8512 */ 8513 static int 8514 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8515 { 8516 int i, entries; 8517 uint8_t pid_match, wwn_match; 8518 int priority; 8519 uint32_t pid1, pid2; 8520 uint64_t wwn1, wwn2; 8521 struct qla_fcp_prio_entry *pri_entry; 8522 struct qla_hw_data *ha = vha->hw; 8523 8524 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8525 return -1; 8526 8527 priority = -1; 8528 entries = ha->fcp_prio_cfg->num_entries; 8529 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8530 8531 for (i = 0; i < entries; i++) { 8532 pid_match = wwn_match = 0; 8533 8534 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8535 pri_entry++; 8536 continue; 8537 } 8538 8539 /* check source pid for a match */ 8540 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8541 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8542 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8543 if (pid1 == INVALID_PORT_ID) 8544 pid_match++; 8545 else if (pid1 == pid2) 8546 pid_match++; 8547 } 8548 8549 /* check destination pid for a match */ 8550 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8551 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8552 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8553 if (pid1 == INVALID_PORT_ID) 8554 pid_match++; 8555 else if (pid1 == pid2) 8556 pid_match++; 8557 } 8558 8559 /* check source WWN for a match */ 8560 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8561 wwn1 = wwn_to_u64(vha->port_name); 8562 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8563 if (wwn2 == (uint64_t)-1) 8564 wwn_match++; 8565 else if (wwn1 == wwn2) 8566 wwn_match++; 8567 } 8568 8569 /* check destination WWN for a match */ 8570 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8571 wwn1 = wwn_to_u64(fcport->port_name); 8572 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8573 if (wwn2 == (uint64_t)-1) 8574 wwn_match++; 8575 else if (wwn1 == wwn2) 8576 wwn_match++; 8577 } 8578 8579 if (pid_match == 2 || wwn_match == 2) { 8580 /* Found a matching entry */ 8581 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8582 priority = pri_entry->tag; 8583 break; 8584 } 8585 8586 pri_entry++; 8587 } 8588 8589 return priority; 8590 } 8591 8592 /* 8593 * qla24xx_update_fcport_fcp_prio 8594 * Activates fcp priority for the logged in fc port 8595 * 8596 * Input: 8597 * vha = scsi host structure pointer. 8598 * fcp = port structure pointer. 8599 * 8600 * Return: 8601 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8602 * 8603 * Context: 8604 * Kernel context. 8605 */ 8606 int 8607 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8608 { 8609 int ret; 8610 int priority; 8611 uint16_t mb[5]; 8612 8613 if (fcport->port_type != FCT_TARGET || 8614 fcport->loop_id == FC_NO_LOOP_ID) 8615 return QLA_FUNCTION_FAILED; 8616 8617 priority = qla24xx_get_fcp_prio(vha, fcport); 8618 if (priority < 0) 8619 return QLA_FUNCTION_FAILED; 8620 8621 if (IS_P3P_TYPE(vha->hw)) { 8622 fcport->fcp_prio = priority & 0xf; 8623 return QLA_SUCCESS; 8624 } 8625 8626 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8627 if (ret == QLA_SUCCESS) { 8628 if (fcport->fcp_prio != priority) 8629 ql_dbg(ql_dbg_user, vha, 0x709e, 8630 "Updated FCP_CMND priority - value=%d loop_id=%d " 8631 "port_id=%02x%02x%02x.\n", priority, 8632 fcport->loop_id, fcport->d_id.b.domain, 8633 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8634 fcport->fcp_prio = priority & 0xf; 8635 } else 8636 ql_dbg(ql_dbg_user, vha, 0x704f, 8637 "Unable to update FCP_CMND priority - ret=0x%x for " 8638 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8639 fcport->d_id.b.domain, fcport->d_id.b.area, 8640 fcport->d_id.b.al_pa); 8641 return ret; 8642 } 8643 8644 /* 8645 * qla24xx_update_all_fcp_prio 8646 * Activates fcp priority for all the logged in ports 8647 * 8648 * Input: 8649 * ha = adapter block pointer. 8650 * 8651 * Return: 8652 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8653 * 8654 * Context: 8655 * Kernel context. 8656 */ 8657 int 8658 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8659 { 8660 int ret; 8661 fc_port_t *fcport; 8662 8663 ret = QLA_FUNCTION_FAILED; 8664 /* We need to set priority for all logged in ports */ 8665 list_for_each_entry(fcport, &vha->vp_fcports, list) 8666 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8667 8668 return ret; 8669 } 8670 8671 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8672 int vp_idx, bool startqp) 8673 { 8674 int rsp_id = 0; 8675 int req_id = 0; 8676 int i; 8677 struct qla_hw_data *ha = vha->hw; 8678 uint16_t qpair_id = 0; 8679 struct qla_qpair *qpair = NULL; 8680 struct qla_msix_entry *msix; 8681 8682 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8683 ql_log(ql_log_warn, vha, 0x00181, 8684 "FW/Driver is not multi-queue capable.\n"); 8685 return NULL; 8686 } 8687 8688 if (ql2xmqsupport || ql2xnvmeenable) { 8689 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8690 if (qpair == NULL) { 8691 ql_log(ql_log_warn, vha, 0x0182, 8692 "Failed to allocate memory for queue pair.\n"); 8693 return NULL; 8694 } 8695 memset(qpair, 0, sizeof(struct qla_qpair)); 8696 8697 qpair->hw = vha->hw; 8698 qpair->vha = vha; 8699 qpair->qp_lock_ptr = &qpair->qp_lock; 8700 spin_lock_init(&qpair->qp_lock); 8701 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8702 8703 /* Assign available que pair id */ 8704 mutex_lock(&ha->mq_lock); 8705 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8706 if (ha->num_qpairs >= ha->max_qpairs) { 8707 mutex_unlock(&ha->mq_lock); 8708 ql_log(ql_log_warn, vha, 0x0183, 8709 "No resources to create additional q pair.\n"); 8710 goto fail_qid_map; 8711 } 8712 ha->num_qpairs++; 8713 set_bit(qpair_id, ha->qpair_qid_map); 8714 ha->queue_pair_map[qpair_id] = qpair; 8715 qpair->id = qpair_id; 8716 qpair->vp_idx = vp_idx; 8717 qpair->fw_started = ha->flags.fw_started; 8718 INIT_LIST_HEAD(&qpair->hints_list); 8719 qpair->chip_reset = ha->base_qpair->chip_reset; 8720 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8721 qpair->enable_explicit_conf = 8722 ha->base_qpair->enable_explicit_conf; 8723 8724 for (i = 0; i < ha->msix_count; i++) { 8725 msix = &ha->msix_entries[i]; 8726 if (msix->in_use) 8727 continue; 8728 qpair->msix = msix; 8729 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8730 "Vector %x selected for qpair\n", msix->vector); 8731 break; 8732 } 8733 if (!qpair->msix) { 8734 ql_log(ql_log_warn, vha, 0x0184, 8735 "Out of MSI-X vectors!.\n"); 8736 goto fail_msix; 8737 } 8738 8739 qpair->msix->in_use = 1; 8740 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8741 qpair->pdev = ha->pdev; 8742 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8743 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8744 8745 mutex_unlock(&ha->mq_lock); 8746 8747 /* Create response queue first */ 8748 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8749 if (!rsp_id) { 8750 ql_log(ql_log_warn, vha, 0x0185, 8751 "Failed to create response queue.\n"); 8752 goto fail_rsp; 8753 } 8754 8755 qpair->rsp = ha->rsp_q_map[rsp_id]; 8756 8757 /* Create request queue */ 8758 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8759 startqp); 8760 if (!req_id) { 8761 ql_log(ql_log_warn, vha, 0x0186, 8762 "Failed to create request queue.\n"); 8763 goto fail_req; 8764 } 8765 8766 qpair->req = ha->req_q_map[req_id]; 8767 qpair->rsp->req = qpair->req; 8768 qpair->rsp->qpair = qpair; 8769 /* init qpair to this cpu. Will adjust at run time. */ 8770 qla_cpu_update(qpair, smp_processor_id()); 8771 8772 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8773 if (ha->fw_attributes & BIT_4) 8774 qpair->difdix_supported = 1; 8775 } 8776 8777 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8778 if (!qpair->srb_mempool) { 8779 ql_log(ql_log_warn, vha, 0xd036, 8780 "Failed to create srb mempool for qpair %d\n", 8781 qpair->id); 8782 goto fail_mempool; 8783 } 8784 8785 /* Mark as online */ 8786 qpair->online = 1; 8787 8788 if (!vha->flags.qpairs_available) 8789 vha->flags.qpairs_available = 1; 8790 8791 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8792 "Request/Response queue pair created, id %d\n", 8793 qpair->id); 8794 ql_dbg(ql_dbg_init, vha, 0x0187, 8795 "Request/Response queue pair created, id %d\n", 8796 qpair->id); 8797 } 8798 return qpair; 8799 8800 fail_mempool: 8801 fail_req: 8802 qla25xx_delete_rsp_que(vha, qpair->rsp); 8803 fail_rsp: 8804 mutex_lock(&ha->mq_lock); 8805 qpair->msix->in_use = 0; 8806 list_del(&qpair->qp_list_elem); 8807 if (list_empty(&vha->qp_list)) 8808 vha->flags.qpairs_available = 0; 8809 fail_msix: 8810 ha->queue_pair_map[qpair_id] = NULL; 8811 clear_bit(qpair_id, ha->qpair_qid_map); 8812 ha->num_qpairs--; 8813 mutex_unlock(&ha->mq_lock); 8814 fail_qid_map: 8815 kfree(qpair); 8816 return NULL; 8817 } 8818 8819 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8820 { 8821 int ret = QLA_FUNCTION_FAILED; 8822 struct qla_hw_data *ha = qpair->hw; 8823 8824 qpair->delete_in_progress = 1; 8825 while (atomic_read(&qpair->ref_count)) 8826 msleep(500); 8827 8828 ret = qla25xx_delete_req_que(vha, qpair->req); 8829 if (ret != QLA_SUCCESS) 8830 goto fail; 8831 8832 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8833 if (ret != QLA_SUCCESS) 8834 goto fail; 8835 8836 mutex_lock(&ha->mq_lock); 8837 ha->queue_pair_map[qpair->id] = NULL; 8838 clear_bit(qpair->id, ha->qpair_qid_map); 8839 ha->num_qpairs--; 8840 list_del(&qpair->qp_list_elem); 8841 if (list_empty(&vha->qp_list)) { 8842 vha->flags.qpairs_available = 0; 8843 vha->flags.qpairs_req_created = 0; 8844 vha->flags.qpairs_rsp_created = 0; 8845 } 8846 mempool_destroy(qpair->srb_mempool); 8847 kfree(qpair); 8848 mutex_unlock(&ha->mq_lock); 8849 8850 return QLA_SUCCESS; 8851 fail: 8852 return ret; 8853 } 8854