1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2012 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_init_rings(scsi_qla_host_t *); 29 static int qla2x00_fw_ready(scsi_qla_host_t *); 30 static int qla2x00_configure_hba(scsi_qla_host_t *); 31 static int qla2x00_configure_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 33 static int qla2x00_configure_fabric(scsi_qla_host_t *); 34 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); 35 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, 36 uint16_t *); 37 38 static int qla2x00_restart_isp(scsi_qla_host_t *); 39 40 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 41 static int qla84xx_init_chip(scsi_qla_host_t *); 42 static int qla25xx_init_queues(struct qla_hw_data *); 43 44 /* SRB Extensions ---------------------------------------------------------- */ 45 46 void 47 qla2x00_sp_timeout(unsigned long __data) 48 { 49 srb_t *sp = (srb_t *)__data; 50 struct srb_iocb *iocb; 51 fc_port_t *fcport = sp->fcport; 52 struct qla_hw_data *ha = fcport->vha->hw; 53 struct req_que *req; 54 unsigned long flags; 55 56 spin_lock_irqsave(&ha->hardware_lock, flags); 57 req = ha->req_q_map[0]; 58 req->outstanding_cmds[sp->handle] = NULL; 59 iocb = &sp->u.iocb_cmd; 60 iocb->timeout(sp); 61 sp->free(fcport->vha, sp); 62 spin_unlock_irqrestore(&ha->hardware_lock, flags); 63 } 64 65 void 66 qla2x00_sp_free(void *data, void *ptr) 67 { 68 srb_t *sp = (srb_t *)ptr; 69 struct srb_iocb *iocb = &sp->u.iocb_cmd; 70 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 71 72 del_timer(&iocb->timer); 73 mempool_free(sp, vha->hw->srb_mempool); 74 75 QLA_VHA_MARK_NOT_BUSY(vha); 76 } 77 78 /* Asynchronous Login/Logout Routines -------------------------------------- */ 79 80 unsigned long 81 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 82 { 83 unsigned long tmo; 84 struct qla_hw_data *ha = vha->hw; 85 86 /* Firmware should use switch negotiated r_a_tov for timeout. */ 87 tmo = ha->r_a_tov / 10 * 2; 88 if (!IS_FWI2_CAPABLE(ha)) { 89 /* 90 * Except for earlier ISPs where the timeout is seeded from the 91 * initialization control block. 92 */ 93 tmo = ha->login_timeout; 94 } 95 return tmo; 96 } 97 98 static void 99 qla2x00_async_iocb_timeout(void *data) 100 { 101 srb_t *sp = (srb_t *)data; 102 fc_port_t *fcport = sp->fcport; 103 104 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 105 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n", 106 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area, 107 fcport->d_id.b.al_pa); 108 109 fcport->flags &= ~FCF_ASYNC_SENT; 110 if (sp->type == SRB_LOGIN_CMD) { 111 struct srb_iocb *lio = &sp->u.iocb_cmd; 112 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); 113 /* Retry as needed. */ 114 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 115 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 116 QLA_LOGIO_LOGIN_RETRIED : 0; 117 qla2x00_post_async_login_done_work(fcport->vha, fcport, 118 lio->u.logio.data); 119 } 120 } 121 122 static void 123 qla2x00_async_login_sp_done(void *data, void *ptr, int res) 124 { 125 srb_t *sp = (srb_t *)ptr; 126 struct srb_iocb *lio = &sp->u.iocb_cmd; 127 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 128 129 if (!test_bit(UNLOADING, &vha->dpc_flags)) 130 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, 131 lio->u.logio.data); 132 sp->free(sp->fcport->vha, sp); 133 } 134 135 int 136 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 137 uint16_t *data) 138 { 139 srb_t *sp; 140 struct srb_iocb *lio; 141 int rval; 142 143 rval = QLA_FUNCTION_FAILED; 144 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 145 if (!sp) 146 goto done; 147 148 sp->type = SRB_LOGIN_CMD; 149 sp->name = "login"; 150 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 151 152 lio = &sp->u.iocb_cmd; 153 lio->timeout = qla2x00_async_iocb_timeout; 154 sp->done = qla2x00_async_login_sp_done; 155 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 156 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 157 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 158 rval = qla2x00_start_sp(sp); 159 if (rval != QLA_SUCCESS) 160 goto done_free_sp; 161 162 ql_dbg(ql_dbg_disc, vha, 0x2072, 163 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x " 164 "retries=%d.\n", sp->handle, fcport->loop_id, 165 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 166 fcport->login_retry); 167 return rval; 168 169 done_free_sp: 170 sp->free(fcport->vha, sp); 171 done: 172 return rval; 173 } 174 175 static void 176 qla2x00_async_logout_sp_done(void *data, void *ptr, int res) 177 { 178 srb_t *sp = (srb_t *)ptr; 179 struct srb_iocb *lio = &sp->u.iocb_cmd; 180 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 181 182 if (!test_bit(UNLOADING, &vha->dpc_flags)) 183 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, 184 lio->u.logio.data); 185 sp->free(sp->fcport->vha, sp); 186 } 187 188 int 189 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 190 { 191 srb_t *sp; 192 struct srb_iocb *lio; 193 int rval; 194 195 rval = QLA_FUNCTION_FAILED; 196 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 197 if (!sp) 198 goto done; 199 200 sp->type = SRB_LOGOUT_CMD; 201 sp->name = "logout"; 202 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 203 204 lio = &sp->u.iocb_cmd; 205 lio->timeout = qla2x00_async_iocb_timeout; 206 sp->done = qla2x00_async_logout_sp_done; 207 rval = qla2x00_start_sp(sp); 208 if (rval != QLA_SUCCESS) 209 goto done_free_sp; 210 211 ql_dbg(ql_dbg_disc, vha, 0x2070, 212 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 213 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 214 fcport->d_id.b.area, fcport->d_id.b.al_pa); 215 return rval; 216 217 done_free_sp: 218 sp->free(fcport->vha, sp); 219 done: 220 return rval; 221 } 222 223 static void 224 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res) 225 { 226 srb_t *sp = (srb_t *)ptr; 227 struct srb_iocb *lio = &sp->u.iocb_cmd; 228 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 229 230 if (!test_bit(UNLOADING, &vha->dpc_flags)) 231 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, 232 lio->u.logio.data); 233 sp->free(sp->fcport->vha, sp); 234 } 235 236 int 237 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 238 uint16_t *data) 239 { 240 srb_t *sp; 241 struct srb_iocb *lio; 242 int rval; 243 244 rval = QLA_FUNCTION_FAILED; 245 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 246 if (!sp) 247 goto done; 248 249 sp->type = SRB_ADISC_CMD; 250 sp->name = "adisc"; 251 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 252 253 lio = &sp->u.iocb_cmd; 254 lio->timeout = qla2x00_async_iocb_timeout; 255 sp->done = qla2x00_async_adisc_sp_done; 256 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 257 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 258 rval = qla2x00_start_sp(sp); 259 if (rval != QLA_SUCCESS) 260 goto done_free_sp; 261 262 ql_dbg(ql_dbg_disc, vha, 0x206f, 263 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", 264 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 265 fcport->d_id.b.area, fcport->d_id.b.al_pa); 266 return rval; 267 268 done_free_sp: 269 sp->free(fcport->vha, sp); 270 done: 271 return rval; 272 } 273 274 static void 275 qla2x00_async_tm_cmd_done(void *data, void *ptr, int res) 276 { 277 srb_t *sp = (srb_t *)ptr; 278 struct srb_iocb *iocb = &sp->u.iocb_cmd; 279 struct scsi_qla_host *vha = (scsi_qla_host_t *)data; 280 uint32_t flags; 281 uint16_t lun; 282 int rval; 283 284 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 285 flags = iocb->u.tmf.flags; 286 lun = (uint16_t)iocb->u.tmf.lun; 287 288 /* Issue Marker IOCB */ 289 rval = qla2x00_marker(vha, vha->hw->req_q_map[0], 290 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 291 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 292 293 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { 294 ql_dbg(ql_dbg_taskm, vha, 0x8030, 295 "TM IOCB failed (%x).\n", rval); 296 } 297 } 298 sp->free(sp->fcport->vha, sp); 299 } 300 301 int 302 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun, 303 uint32_t tag) 304 { 305 struct scsi_qla_host *vha = fcport->vha; 306 srb_t *sp; 307 struct srb_iocb *tcf; 308 int rval; 309 310 rval = QLA_FUNCTION_FAILED; 311 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 312 if (!sp) 313 goto done; 314 315 sp->type = SRB_TM_CMD; 316 sp->name = "tmf"; 317 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 318 319 tcf = &sp->u.iocb_cmd; 320 tcf->u.tmf.flags = tm_flags; 321 tcf->u.tmf.lun = lun; 322 tcf->u.tmf.data = tag; 323 tcf->timeout = qla2x00_async_iocb_timeout; 324 sp->done = qla2x00_async_tm_cmd_done; 325 326 rval = qla2x00_start_sp(sp); 327 if (rval != QLA_SUCCESS) 328 goto done_free_sp; 329 330 ql_dbg(ql_dbg_taskm, vha, 0x802f, 331 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 332 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 333 fcport->d_id.b.area, fcport->d_id.b.al_pa); 334 return rval; 335 336 done_free_sp: 337 sp->free(fcport->vha, sp); 338 done: 339 return rval; 340 } 341 342 void 343 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, 344 uint16_t *data) 345 { 346 int rval; 347 348 switch (data[0]) { 349 case MBS_COMMAND_COMPLETE: 350 /* 351 * Driver must validate login state - If PRLI not complete, 352 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 353 * requests. 354 */ 355 rval = qla2x00_get_port_database(vha, fcport, 0); 356 if (rval == QLA_NOT_LOGGED_IN) { 357 fcport->flags &= ~FCF_ASYNC_SENT; 358 fcport->flags |= FCF_LOGIN_NEEDED; 359 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 360 break; 361 } 362 363 if (rval != QLA_SUCCESS) { 364 qla2x00_post_async_logout_work(vha, fcport, NULL); 365 qla2x00_post_async_login_work(vha, fcport, NULL); 366 break; 367 } 368 if (fcport->flags & FCF_FCP2_DEVICE) { 369 qla2x00_post_async_adisc_work(vha, fcport, data); 370 break; 371 } 372 qla2x00_update_fcport(vha, fcport); 373 break; 374 case MBS_COMMAND_ERROR: 375 fcport->flags &= ~FCF_ASYNC_SENT; 376 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 377 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 378 else 379 qla2x00_mark_device_lost(vha, fcport, 1, 0); 380 break; 381 case MBS_PORT_ID_USED: 382 fcport->loop_id = data[1]; 383 qla2x00_post_async_logout_work(vha, fcport, NULL); 384 qla2x00_post_async_login_work(vha, fcport, NULL); 385 break; 386 case MBS_LOOP_ID_USED: 387 fcport->loop_id++; 388 rval = qla2x00_find_new_loop_id(vha, fcport); 389 if (rval != QLA_SUCCESS) { 390 fcport->flags &= ~FCF_ASYNC_SENT; 391 qla2x00_mark_device_lost(vha, fcport, 1, 0); 392 break; 393 } 394 qla2x00_post_async_login_work(vha, fcport, NULL); 395 break; 396 } 397 return; 398 } 399 400 void 401 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 402 uint16_t *data) 403 { 404 qla2x00_mark_device_lost(vha, fcport, 1, 0); 405 return; 406 } 407 408 void 409 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 410 uint16_t *data) 411 { 412 if (data[0] == MBS_COMMAND_COMPLETE) { 413 qla2x00_update_fcport(vha, fcport); 414 415 return; 416 } 417 418 /* Retry login. */ 419 fcport->flags &= ~FCF_ASYNC_SENT; 420 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 421 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 422 else 423 qla2x00_mark_device_lost(vha, fcport, 1, 0); 424 425 return; 426 } 427 428 /****************************************************************************/ 429 /* QLogic ISP2x00 Hardware Support Functions. */ 430 /****************************************************************************/ 431 432 int 433 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 434 { 435 int rval = QLA_SUCCESS; 436 struct qla_hw_data *ha = vha->hw; 437 uint32_t idc_major_ver, idc_minor_ver; 438 uint16_t config[4]; 439 440 qla83xx_idc_lock(vha, 0); 441 442 /* SV: TODO: Assign initialization timeout from 443 * flash-info / other param 444 */ 445 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 446 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 447 448 /* Set our fcoe function presence */ 449 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 450 ql_dbg(ql_dbg_p3p, vha, 0xb077, 451 "Error while setting DRV-Presence.\n"); 452 rval = QLA_FUNCTION_FAILED; 453 goto exit; 454 } 455 456 /* Decide the reset ownership */ 457 qla83xx_reset_ownership(vha); 458 459 /* 460 * On first protocol driver load: 461 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 462 * register. 463 * Others: Check compatibility with current IDC Major version. 464 */ 465 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 466 if (ha->flags.nic_core_reset_owner) { 467 /* Set IDC Major version */ 468 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 469 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 470 471 /* Clearing IDC-Lock-Recovery register */ 472 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 473 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 474 /* 475 * Clear further IDC participation if we are not compatible with 476 * the current IDC Major Version. 477 */ 478 ql_log(ql_log_warn, vha, 0xb07d, 479 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 480 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 481 __qla83xx_clear_drv_presence(vha); 482 rval = QLA_FUNCTION_FAILED; 483 goto exit; 484 } 485 /* Each function sets its supported Minor version. */ 486 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 487 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 488 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 489 490 if (ha->flags.nic_core_reset_owner) { 491 memset(config, 0, sizeof(config)); 492 if (!qla81xx_get_port_config(vha, config)) 493 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 494 QLA8XXX_DEV_READY); 495 } 496 497 rval = qla83xx_idc_state_handler(vha); 498 499 exit: 500 qla83xx_idc_unlock(vha, 0); 501 502 return rval; 503 } 504 505 /* 506 * qla2x00_initialize_adapter 507 * Initialize board. 508 * 509 * Input: 510 * ha = adapter block pointer. 511 * 512 * Returns: 513 * 0 = success 514 */ 515 int 516 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 517 { 518 int rval; 519 struct qla_hw_data *ha = vha->hw; 520 struct req_que *req = ha->req_q_map[0]; 521 522 /* Clear adapter flags. */ 523 vha->flags.online = 0; 524 ha->flags.chip_reset_done = 0; 525 vha->flags.reset_active = 0; 526 ha->flags.pci_channel_io_perm_failure = 0; 527 ha->flags.eeh_busy = 0; 528 ha->flags.thermal_supported = 1; 529 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 530 atomic_set(&vha->loop_state, LOOP_DOWN); 531 vha->device_flags = DFLG_NO_CABLE; 532 vha->dpc_flags = 0; 533 vha->flags.management_server_logged_in = 0; 534 vha->marker_needed = 0; 535 ha->isp_abort_cnt = 0; 536 ha->beacon_blink_led = 0; 537 538 set_bit(0, ha->req_qid_map); 539 set_bit(0, ha->rsp_qid_map); 540 541 ql_dbg(ql_dbg_init, vha, 0x0040, 542 "Configuring PCI space...\n"); 543 rval = ha->isp_ops->pci_config(vha); 544 if (rval) { 545 ql_log(ql_log_warn, vha, 0x0044, 546 "Unable to configure PCI space.\n"); 547 return (rval); 548 } 549 550 ha->isp_ops->reset_chip(vha); 551 552 rval = qla2xxx_get_flash_info(vha); 553 if (rval) { 554 ql_log(ql_log_fatal, vha, 0x004f, 555 "Unable to validate FLASH data.\n"); 556 return (rval); 557 } 558 559 ha->isp_ops->get_flash_version(vha, req->ring); 560 ql_dbg(ql_dbg_init, vha, 0x0061, 561 "Configure NVRAM parameters...\n"); 562 563 ha->isp_ops->nvram_config(vha); 564 565 if (ha->flags.disable_serdes) { 566 /* Mask HBA via NVRAM settings? */ 567 ql_log(ql_log_info, vha, 0x0077, 568 "Masking HBA WWPN " 569 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", 570 vha->port_name[0], vha->port_name[1], 571 vha->port_name[2], vha->port_name[3], 572 vha->port_name[4], vha->port_name[5], 573 vha->port_name[6], vha->port_name[7]); 574 return QLA_FUNCTION_FAILED; 575 } 576 577 ql_dbg(ql_dbg_init, vha, 0x0078, 578 "Verifying loaded RISC code...\n"); 579 580 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 581 rval = ha->isp_ops->chip_diag(vha); 582 if (rval) 583 return (rval); 584 rval = qla2x00_setup_chip(vha); 585 if (rval) 586 return (rval); 587 } 588 589 if (IS_QLA84XX(ha)) { 590 ha->cs84xx = qla84xx_get_chip(vha); 591 if (!ha->cs84xx) { 592 ql_log(ql_log_warn, vha, 0x00d0, 593 "Unable to configure ISP84XX.\n"); 594 return QLA_FUNCTION_FAILED; 595 } 596 } 597 598 if (qla_ini_mode_enabled(vha)) 599 rval = qla2x00_init_rings(vha); 600 601 ha->flags.chip_reset_done = 1; 602 603 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 604 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 605 rval = qla84xx_init_chip(vha); 606 if (rval != QLA_SUCCESS) { 607 ql_log(ql_log_warn, vha, 0x00d4, 608 "Unable to initialize ISP84XX.\n"); 609 qla84xx_put_chip(vha); 610 } 611 } 612 613 /* Load the NIC Core f/w if we are the first protocol driver. */ 614 if (IS_QLA8031(ha)) { 615 rval = qla83xx_nic_core_fw_load(vha); 616 if (rval) 617 ql_log(ql_log_warn, vha, 0x0124, 618 "Error in initializing NIC Core f/w.\n"); 619 } 620 621 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 622 qla24xx_read_fcp_prio_cfg(vha); 623 624 return (rval); 625 } 626 627 /** 628 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 629 * @ha: HA context 630 * 631 * Returns 0 on success. 632 */ 633 int 634 qla2100_pci_config(scsi_qla_host_t *vha) 635 { 636 uint16_t w; 637 unsigned long flags; 638 struct qla_hw_data *ha = vha->hw; 639 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 640 641 pci_set_master(ha->pdev); 642 pci_try_set_mwi(ha->pdev); 643 644 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 645 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 646 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 647 648 pci_disable_rom(ha->pdev); 649 650 /* Get PCI bus information. */ 651 spin_lock_irqsave(&ha->hardware_lock, flags); 652 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 653 spin_unlock_irqrestore(&ha->hardware_lock, flags); 654 655 return QLA_SUCCESS; 656 } 657 658 /** 659 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 660 * @ha: HA context 661 * 662 * Returns 0 on success. 663 */ 664 int 665 qla2300_pci_config(scsi_qla_host_t *vha) 666 { 667 uint16_t w; 668 unsigned long flags = 0; 669 uint32_t cnt; 670 struct qla_hw_data *ha = vha->hw; 671 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 672 673 pci_set_master(ha->pdev); 674 pci_try_set_mwi(ha->pdev); 675 676 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 677 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 678 679 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 680 w &= ~PCI_COMMAND_INTX_DISABLE; 681 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 682 683 /* 684 * If this is a 2300 card and not 2312, reset the 685 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 686 * the 2310 also reports itself as a 2300 so we need to get the 687 * fb revision level -- a 6 indicates it really is a 2300 and 688 * not a 2310. 689 */ 690 if (IS_QLA2300(ha)) { 691 spin_lock_irqsave(&ha->hardware_lock, flags); 692 693 /* Pause RISC. */ 694 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 695 for (cnt = 0; cnt < 30000; cnt++) { 696 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 697 break; 698 699 udelay(10); 700 } 701 702 /* Select FPM registers. */ 703 WRT_REG_WORD(®->ctrl_status, 0x20); 704 RD_REG_WORD(®->ctrl_status); 705 706 /* Get the fb rev level */ 707 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 708 709 if (ha->fb_rev == FPM_2300) 710 pci_clear_mwi(ha->pdev); 711 712 /* Deselect FPM registers. */ 713 WRT_REG_WORD(®->ctrl_status, 0x0); 714 RD_REG_WORD(®->ctrl_status); 715 716 /* Release RISC module. */ 717 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 718 for (cnt = 0; cnt < 30000; cnt++) { 719 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 720 break; 721 722 udelay(10); 723 } 724 725 spin_unlock_irqrestore(&ha->hardware_lock, flags); 726 } 727 728 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 729 730 pci_disable_rom(ha->pdev); 731 732 /* Get PCI bus information. */ 733 spin_lock_irqsave(&ha->hardware_lock, flags); 734 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 735 spin_unlock_irqrestore(&ha->hardware_lock, flags); 736 737 return QLA_SUCCESS; 738 } 739 740 /** 741 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 742 * @ha: HA context 743 * 744 * Returns 0 on success. 745 */ 746 int 747 qla24xx_pci_config(scsi_qla_host_t *vha) 748 { 749 uint16_t w; 750 unsigned long flags = 0; 751 struct qla_hw_data *ha = vha->hw; 752 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 753 754 pci_set_master(ha->pdev); 755 pci_try_set_mwi(ha->pdev); 756 757 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 758 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 759 w &= ~PCI_COMMAND_INTX_DISABLE; 760 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 761 762 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 763 764 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 765 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 766 pcix_set_mmrbc(ha->pdev, 2048); 767 768 /* PCIe -- adjust Maximum Read Request Size (2048). */ 769 if (pci_is_pcie(ha->pdev)) 770 pcie_set_readrq(ha->pdev, 4096); 771 772 pci_disable_rom(ha->pdev); 773 774 ha->chip_revision = ha->pdev->revision; 775 776 /* Get PCI bus information. */ 777 spin_lock_irqsave(&ha->hardware_lock, flags); 778 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 779 spin_unlock_irqrestore(&ha->hardware_lock, flags); 780 781 return QLA_SUCCESS; 782 } 783 784 /** 785 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 786 * @ha: HA context 787 * 788 * Returns 0 on success. 789 */ 790 int 791 qla25xx_pci_config(scsi_qla_host_t *vha) 792 { 793 uint16_t w; 794 struct qla_hw_data *ha = vha->hw; 795 796 pci_set_master(ha->pdev); 797 pci_try_set_mwi(ha->pdev); 798 799 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 800 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 801 w &= ~PCI_COMMAND_INTX_DISABLE; 802 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 803 804 /* PCIe -- adjust Maximum Read Request Size (2048). */ 805 if (pci_is_pcie(ha->pdev)) 806 pcie_set_readrq(ha->pdev, 4096); 807 808 pci_disable_rom(ha->pdev); 809 810 ha->chip_revision = ha->pdev->revision; 811 812 return QLA_SUCCESS; 813 } 814 815 /** 816 * qla2x00_isp_firmware() - Choose firmware image. 817 * @ha: HA context 818 * 819 * Returns 0 on success. 820 */ 821 static int 822 qla2x00_isp_firmware(scsi_qla_host_t *vha) 823 { 824 int rval; 825 uint16_t loop_id, topo, sw_cap; 826 uint8_t domain, area, al_pa; 827 struct qla_hw_data *ha = vha->hw; 828 829 /* Assume loading risc code */ 830 rval = QLA_FUNCTION_FAILED; 831 832 if (ha->flags.disable_risc_code_load) { 833 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 834 835 /* Verify checksum of loaded RISC code. */ 836 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 837 if (rval == QLA_SUCCESS) { 838 /* And, verify we are not in ROM code. */ 839 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 840 &area, &domain, &topo, &sw_cap); 841 } 842 } 843 844 if (rval) 845 ql_dbg(ql_dbg_init, vha, 0x007a, 846 "**** Load RISC code ****.\n"); 847 848 return (rval); 849 } 850 851 /** 852 * qla2x00_reset_chip() - Reset ISP chip. 853 * @ha: HA context 854 * 855 * Returns 0 on success. 856 */ 857 void 858 qla2x00_reset_chip(scsi_qla_host_t *vha) 859 { 860 unsigned long flags = 0; 861 struct qla_hw_data *ha = vha->hw; 862 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 863 uint32_t cnt; 864 uint16_t cmd; 865 866 if (unlikely(pci_channel_offline(ha->pdev))) 867 return; 868 869 ha->isp_ops->disable_intrs(ha); 870 871 spin_lock_irqsave(&ha->hardware_lock, flags); 872 873 /* Turn off master enable */ 874 cmd = 0; 875 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 876 cmd &= ~PCI_COMMAND_MASTER; 877 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 878 879 if (!IS_QLA2100(ha)) { 880 /* Pause RISC. */ 881 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 882 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 883 for (cnt = 0; cnt < 30000; cnt++) { 884 if ((RD_REG_WORD(®->hccr) & 885 HCCR_RISC_PAUSE) != 0) 886 break; 887 udelay(100); 888 } 889 } else { 890 RD_REG_WORD(®->hccr); /* PCI Posting. */ 891 udelay(10); 892 } 893 894 /* Select FPM registers. */ 895 WRT_REG_WORD(®->ctrl_status, 0x20); 896 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 897 898 /* FPM Soft Reset. */ 899 WRT_REG_WORD(®->fpm_diag_config, 0x100); 900 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 901 902 /* Toggle Fpm Reset. */ 903 if (!IS_QLA2200(ha)) { 904 WRT_REG_WORD(®->fpm_diag_config, 0x0); 905 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 906 } 907 908 /* Select frame buffer registers. */ 909 WRT_REG_WORD(®->ctrl_status, 0x10); 910 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 911 912 /* Reset frame buffer FIFOs. */ 913 if (IS_QLA2200(ha)) { 914 WRT_FB_CMD_REG(ha, reg, 0xa000); 915 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 916 } else { 917 WRT_FB_CMD_REG(ha, reg, 0x00fc); 918 919 /* Read back fb_cmd until zero or 3 seconds max */ 920 for (cnt = 0; cnt < 3000; cnt++) { 921 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 922 break; 923 udelay(100); 924 } 925 } 926 927 /* Select RISC module registers. */ 928 WRT_REG_WORD(®->ctrl_status, 0); 929 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 930 931 /* Reset RISC processor. */ 932 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 933 RD_REG_WORD(®->hccr); /* PCI Posting. */ 934 935 /* Release RISC processor. */ 936 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 937 RD_REG_WORD(®->hccr); /* PCI Posting. */ 938 } 939 940 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 941 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 942 943 /* Reset ISP chip. */ 944 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 945 946 /* Wait for RISC to recover from reset. */ 947 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 948 /* 949 * It is necessary to for a delay here since the card doesn't 950 * respond to PCI reads during a reset. On some architectures 951 * this will result in an MCA. 952 */ 953 udelay(20); 954 for (cnt = 30000; cnt; cnt--) { 955 if ((RD_REG_WORD(®->ctrl_status) & 956 CSR_ISP_SOFT_RESET) == 0) 957 break; 958 udelay(100); 959 } 960 } else 961 udelay(10); 962 963 /* Reset RISC processor. */ 964 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 965 966 WRT_REG_WORD(®->semaphore, 0); 967 968 /* Release RISC processor. */ 969 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 970 RD_REG_WORD(®->hccr); /* PCI Posting. */ 971 972 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 973 for (cnt = 0; cnt < 30000; cnt++) { 974 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 975 break; 976 977 udelay(100); 978 } 979 } else 980 udelay(100); 981 982 /* Turn on master enable */ 983 cmd |= PCI_COMMAND_MASTER; 984 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 985 986 /* Disable RISC pause on FPM parity error. */ 987 if (!IS_QLA2100(ha)) { 988 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 989 RD_REG_WORD(®->hccr); /* PCI Posting. */ 990 } 991 992 spin_unlock_irqrestore(&ha->hardware_lock, flags); 993 } 994 995 /** 996 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 997 * 998 * Returns 0 on success. 999 */ 1000 int 1001 qla81xx_reset_mpi(scsi_qla_host_t *vha) 1002 { 1003 uint16_t mb[4] = {0x1010, 0, 1, 0}; 1004 1005 if (!IS_QLA81XX(vha->hw)) 1006 return QLA_SUCCESS; 1007 1008 return qla81xx_write_mpi_register(vha, mb); 1009 } 1010 1011 /** 1012 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 1013 * @ha: HA context 1014 * 1015 * Returns 0 on success. 1016 */ 1017 static inline void 1018 qla24xx_reset_risc(scsi_qla_host_t *vha) 1019 { 1020 unsigned long flags = 0; 1021 struct qla_hw_data *ha = vha->hw; 1022 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1023 uint32_t cnt, d2; 1024 uint16_t wd; 1025 static int abts_cnt; /* ISP abort retry counts */ 1026 1027 spin_lock_irqsave(&ha->hardware_lock, flags); 1028 1029 /* Reset RISC. */ 1030 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1031 for (cnt = 0; cnt < 30000; cnt++) { 1032 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 1033 break; 1034 1035 udelay(10); 1036 } 1037 1038 WRT_REG_DWORD(®->ctrl_status, 1039 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1040 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 1041 1042 udelay(100); 1043 /* Wait for firmware to complete NVRAM accesses. */ 1044 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1045 for (cnt = 10000 ; cnt && d2; cnt--) { 1046 udelay(5); 1047 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1048 barrier(); 1049 } 1050 1051 /* Wait for soft-reset to complete. */ 1052 d2 = RD_REG_DWORD(®->ctrl_status); 1053 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { 1054 udelay(5); 1055 d2 = RD_REG_DWORD(®->ctrl_status); 1056 barrier(); 1057 } 1058 1059 /* If required, do an MPI FW reset now */ 1060 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 1061 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 1062 if (++abts_cnt < 5) { 1063 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1064 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 1065 } else { 1066 /* 1067 * We exhausted the ISP abort retries. We have to 1068 * set the board offline. 1069 */ 1070 abts_cnt = 0; 1071 vha->flags.online = 0; 1072 } 1073 } 1074 } 1075 1076 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 1077 RD_REG_DWORD(®->hccr); 1078 1079 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 1080 RD_REG_DWORD(®->hccr); 1081 1082 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 1083 RD_REG_DWORD(®->hccr); 1084 1085 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1086 for (cnt = 6000000 ; cnt && d2; cnt--) { 1087 udelay(5); 1088 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1089 barrier(); 1090 } 1091 1092 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1093 1094 if (IS_NOPOLLING_TYPE(ha)) 1095 ha->isp_ops->enable_intrs(ha); 1096 } 1097 1098 /** 1099 * qla24xx_reset_chip() - Reset ISP24xx chip. 1100 * @ha: HA context 1101 * 1102 * Returns 0 on success. 1103 */ 1104 void 1105 qla24xx_reset_chip(scsi_qla_host_t *vha) 1106 { 1107 struct qla_hw_data *ha = vha->hw; 1108 1109 if (pci_channel_offline(ha->pdev) && 1110 ha->flags.pci_channel_io_perm_failure) { 1111 return; 1112 } 1113 1114 ha->isp_ops->disable_intrs(ha); 1115 1116 /* Perform RISC reset. */ 1117 qla24xx_reset_risc(vha); 1118 } 1119 1120 /** 1121 * qla2x00_chip_diag() - Test chip for proper operation. 1122 * @ha: HA context 1123 * 1124 * Returns 0 on success. 1125 */ 1126 int 1127 qla2x00_chip_diag(scsi_qla_host_t *vha) 1128 { 1129 int rval; 1130 struct qla_hw_data *ha = vha->hw; 1131 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1132 unsigned long flags = 0; 1133 uint16_t data; 1134 uint32_t cnt; 1135 uint16_t mb[5]; 1136 struct req_que *req = ha->req_q_map[0]; 1137 1138 /* Assume a failed state */ 1139 rval = QLA_FUNCTION_FAILED; 1140 1141 ql_dbg(ql_dbg_init, vha, 0x007b, 1142 "Testing device at %lx.\n", (u_long)®->flash_address); 1143 1144 spin_lock_irqsave(&ha->hardware_lock, flags); 1145 1146 /* Reset ISP chip. */ 1147 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1148 1149 /* 1150 * We need to have a delay here since the card will not respond while 1151 * in reset causing an MCA on some architectures. 1152 */ 1153 udelay(20); 1154 data = qla2x00_debounce_register(®->ctrl_status); 1155 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 1156 udelay(5); 1157 data = RD_REG_WORD(®->ctrl_status); 1158 barrier(); 1159 } 1160 1161 if (!cnt) 1162 goto chip_diag_failed; 1163 1164 ql_dbg(ql_dbg_init, vha, 0x007c, 1165 "Reset register cleared by chip reset.\n"); 1166 1167 /* Reset RISC processor. */ 1168 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1169 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1170 1171 /* Workaround for QLA2312 PCI parity error */ 1172 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1173 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 1174 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 1175 udelay(5); 1176 data = RD_MAILBOX_REG(ha, reg, 0); 1177 barrier(); 1178 } 1179 } else 1180 udelay(10); 1181 1182 if (!cnt) 1183 goto chip_diag_failed; 1184 1185 /* Check product ID of chip */ 1186 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); 1187 1188 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 1189 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 1190 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 1191 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 1192 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 1193 mb[3] != PROD_ID_3) { 1194 ql_log(ql_log_warn, vha, 0x0062, 1195 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 1196 mb[1], mb[2], mb[3]); 1197 1198 goto chip_diag_failed; 1199 } 1200 ha->product_id[0] = mb[1]; 1201 ha->product_id[1] = mb[2]; 1202 ha->product_id[2] = mb[3]; 1203 ha->product_id[3] = mb[4]; 1204 1205 /* Adjust fw RISC transfer size */ 1206 if (req->length > 1024) 1207 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 1208 else 1209 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1210 req->length; 1211 1212 if (IS_QLA2200(ha) && 1213 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 1214 /* Limit firmware transfer size with a 2200A */ 1215 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 1216 1217 ha->device_type |= DT_ISP2200A; 1218 ha->fw_transfer_size = 128; 1219 } 1220 1221 /* Wrap Incoming Mailboxes Test. */ 1222 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1223 1224 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 1225 rval = qla2x00_mbx_reg_test(vha); 1226 if (rval) 1227 ql_log(ql_log_warn, vha, 0x0080, 1228 "Failed mailbox send register test.\n"); 1229 else 1230 /* Flag a successful rval */ 1231 rval = QLA_SUCCESS; 1232 spin_lock_irqsave(&ha->hardware_lock, flags); 1233 1234 chip_diag_failed: 1235 if (rval) 1236 ql_log(ql_log_info, vha, 0x0081, 1237 "Chip diagnostics **** FAILED ****.\n"); 1238 1239 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1240 1241 return (rval); 1242 } 1243 1244 /** 1245 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 1246 * @ha: HA context 1247 * 1248 * Returns 0 on success. 1249 */ 1250 int 1251 qla24xx_chip_diag(scsi_qla_host_t *vha) 1252 { 1253 int rval; 1254 struct qla_hw_data *ha = vha->hw; 1255 struct req_que *req = ha->req_q_map[0]; 1256 1257 if (IS_QLA82XX(ha)) 1258 return QLA_SUCCESS; 1259 1260 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 1261 1262 rval = qla2x00_mbx_reg_test(vha); 1263 if (rval) { 1264 ql_log(ql_log_warn, vha, 0x0082, 1265 "Failed mailbox send register test.\n"); 1266 } else { 1267 /* Flag a successful rval */ 1268 rval = QLA_SUCCESS; 1269 } 1270 1271 return rval; 1272 } 1273 1274 void 1275 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 1276 { 1277 int rval; 1278 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 1279 eft_size, fce_size, mq_size; 1280 dma_addr_t tc_dma; 1281 void *tc; 1282 struct qla_hw_data *ha = vha->hw; 1283 struct req_que *req = ha->req_q_map[0]; 1284 struct rsp_que *rsp = ha->rsp_q_map[0]; 1285 1286 if (ha->fw_dump) { 1287 ql_dbg(ql_dbg_init, vha, 0x00bd, 1288 "Firmware dump already allocated.\n"); 1289 return; 1290 } 1291 1292 ha->fw_dumped = 0; 1293 fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 1294 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 1295 fixed_size = sizeof(struct qla2100_fw_dump); 1296 } else if (IS_QLA23XX(ha)) { 1297 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 1298 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 1299 sizeof(uint16_t); 1300 } else if (IS_FWI2_CAPABLE(ha)) { 1301 if (IS_QLA83XX(ha)) 1302 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 1303 else if (IS_QLA81XX(ha)) 1304 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 1305 else if (IS_QLA25XX(ha)) 1306 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 1307 else 1308 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 1309 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 1310 sizeof(uint32_t); 1311 if (ha->mqenable) { 1312 if (!IS_QLA83XX(ha)) 1313 mq_size = sizeof(struct qla2xxx_mq_chain); 1314 /* 1315 * Allocate maximum buffer size for all queues. 1316 * Resizing must be done at end-of-dump processing. 1317 */ 1318 mq_size += ha->max_req_queues * 1319 (req->length * sizeof(request_t)); 1320 mq_size += ha->max_rsp_queues * 1321 (rsp->length * sizeof(response_t)); 1322 } 1323 if (ha->tgt.atio_q_length) 1324 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 1325 /* Allocate memory for Fibre Channel Event Buffer. */ 1326 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha)) 1327 goto try_eft; 1328 1329 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 1330 GFP_KERNEL); 1331 if (!tc) { 1332 ql_log(ql_log_warn, vha, 0x00be, 1333 "Unable to allocate (%d KB) for FCE.\n", 1334 FCE_SIZE / 1024); 1335 goto try_eft; 1336 } 1337 1338 memset(tc, 0, FCE_SIZE); 1339 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 1340 ha->fce_mb, &ha->fce_bufs); 1341 if (rval) { 1342 ql_log(ql_log_warn, vha, 0x00bf, 1343 "Unable to initialize FCE (%d).\n", rval); 1344 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 1345 tc_dma); 1346 ha->flags.fce_enabled = 0; 1347 goto try_eft; 1348 } 1349 ql_dbg(ql_dbg_init, vha, 0x00c0, 1350 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 1351 1352 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 1353 ha->flags.fce_enabled = 1; 1354 ha->fce_dma = tc_dma; 1355 ha->fce = tc; 1356 try_eft: 1357 /* Allocate memory for Extended Trace Buffer. */ 1358 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 1359 GFP_KERNEL); 1360 if (!tc) { 1361 ql_log(ql_log_warn, vha, 0x00c1, 1362 "Unable to allocate (%d KB) for EFT.\n", 1363 EFT_SIZE / 1024); 1364 goto cont_alloc; 1365 } 1366 1367 memset(tc, 0, EFT_SIZE); 1368 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 1369 if (rval) { 1370 ql_log(ql_log_warn, vha, 0x00c2, 1371 "Unable to initialize EFT (%d).\n", rval); 1372 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 1373 tc_dma); 1374 goto cont_alloc; 1375 } 1376 ql_dbg(ql_dbg_init, vha, 0x00c3, 1377 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 1378 1379 eft_size = EFT_SIZE; 1380 ha->eft_dma = tc_dma; 1381 ha->eft = tc; 1382 } 1383 cont_alloc: 1384 req_q_size = req->length * sizeof(request_t); 1385 rsp_q_size = rsp->length * sizeof(response_t); 1386 1387 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 1388 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 1389 ha->chain_offset = dump_size; 1390 dump_size += mq_size + fce_size; 1391 1392 ha->fw_dump = vmalloc(dump_size); 1393 if (!ha->fw_dump) { 1394 ql_log(ql_log_warn, vha, 0x00c4, 1395 "Unable to allocate (%d KB) for firmware dump.\n", 1396 dump_size / 1024); 1397 1398 if (ha->fce) { 1399 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 1400 ha->fce_dma); 1401 ha->fce = NULL; 1402 ha->fce_dma = 0; 1403 } 1404 1405 if (ha->eft) { 1406 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, 1407 ha->eft_dma); 1408 ha->eft = NULL; 1409 ha->eft_dma = 0; 1410 } 1411 return; 1412 } 1413 ql_dbg(ql_dbg_init, vha, 0x00c5, 1414 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); 1415 1416 ha->fw_dump_len = dump_size; 1417 ha->fw_dump->signature[0] = 'Q'; 1418 ha->fw_dump->signature[1] = 'L'; 1419 ha->fw_dump->signature[2] = 'G'; 1420 ha->fw_dump->signature[3] = 'C'; 1421 ha->fw_dump->version = __constant_htonl(1); 1422 1423 ha->fw_dump->fixed_size = htonl(fixed_size); 1424 ha->fw_dump->mem_size = htonl(mem_size); 1425 ha->fw_dump->req_q_size = htonl(req_q_size); 1426 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 1427 1428 ha->fw_dump->eft_size = htonl(eft_size); 1429 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 1430 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 1431 1432 ha->fw_dump->header_size = 1433 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 1434 } 1435 1436 static int 1437 qla81xx_mpi_sync(scsi_qla_host_t *vha) 1438 { 1439 #define MPS_MASK 0xe0 1440 int rval; 1441 uint16_t dc; 1442 uint32_t dw; 1443 1444 if (!IS_QLA81XX(vha->hw)) 1445 return QLA_SUCCESS; 1446 1447 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 1448 if (rval != QLA_SUCCESS) { 1449 ql_log(ql_log_warn, vha, 0x0105, 1450 "Unable to acquire semaphore.\n"); 1451 goto done; 1452 } 1453 1454 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 1455 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 1456 if (rval != QLA_SUCCESS) { 1457 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 1458 goto done_release; 1459 } 1460 1461 dc &= MPS_MASK; 1462 if (dc == (dw & MPS_MASK)) 1463 goto done_release; 1464 1465 dw &= ~MPS_MASK; 1466 dw |= dc; 1467 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 1468 if (rval != QLA_SUCCESS) { 1469 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 1470 } 1471 1472 done_release: 1473 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 1474 if (rval != QLA_SUCCESS) { 1475 ql_log(ql_log_warn, vha, 0x006d, 1476 "Unable to release semaphore.\n"); 1477 } 1478 1479 done: 1480 return rval; 1481 } 1482 1483 /** 1484 * qla2x00_setup_chip() - Load and start RISC firmware. 1485 * @ha: HA context 1486 * 1487 * Returns 0 on success. 1488 */ 1489 static int 1490 qla2x00_setup_chip(scsi_qla_host_t *vha) 1491 { 1492 int rval; 1493 uint32_t srisc_address = 0; 1494 struct qla_hw_data *ha = vha->hw; 1495 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1496 unsigned long flags; 1497 uint16_t fw_major_version; 1498 1499 if (IS_QLA82XX(ha)) { 1500 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1501 if (rval == QLA_SUCCESS) { 1502 qla2x00_stop_firmware(vha); 1503 goto enable_82xx_npiv; 1504 } else 1505 goto failed; 1506 } 1507 1508 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1509 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 1510 spin_lock_irqsave(&ha->hardware_lock, flags); 1511 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 1512 RD_REG_WORD(®->hccr); 1513 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1514 } 1515 1516 qla81xx_mpi_sync(vha); 1517 1518 /* Load firmware sequences */ 1519 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1520 if (rval == QLA_SUCCESS) { 1521 ql_dbg(ql_dbg_init, vha, 0x00c9, 1522 "Verifying Checksum of loaded RISC code.\n"); 1523 1524 rval = qla2x00_verify_checksum(vha, srisc_address); 1525 if (rval == QLA_SUCCESS) { 1526 /* Start firmware execution. */ 1527 ql_dbg(ql_dbg_init, vha, 0x00ca, 1528 "Starting firmware.\n"); 1529 1530 rval = qla2x00_execute_fw(vha, srisc_address); 1531 /* Retrieve firmware information. */ 1532 if (rval == QLA_SUCCESS) { 1533 enable_82xx_npiv: 1534 fw_major_version = ha->fw_major_version; 1535 if (IS_QLA82XX(ha)) 1536 qla82xx_check_md_needed(vha); 1537 else 1538 rval = qla2x00_get_fw_version(vha); 1539 if (rval != QLA_SUCCESS) 1540 goto failed; 1541 ha->flags.npiv_supported = 0; 1542 if (IS_QLA2XXX_MIDTYPE(ha) && 1543 (ha->fw_attributes & BIT_2)) { 1544 ha->flags.npiv_supported = 1; 1545 if ((!ha->max_npiv_vports) || 1546 ((ha->max_npiv_vports + 1) % 1547 MIN_MULTI_ID_FABRIC)) 1548 ha->max_npiv_vports = 1549 MIN_MULTI_ID_FABRIC - 1; 1550 } 1551 qla2x00_get_resource_cnts(vha, NULL, 1552 &ha->fw_xcb_count, NULL, NULL, 1553 &ha->max_npiv_vports, NULL); 1554 1555 if (!fw_major_version && ql2xallocfwdump 1556 && !IS_QLA82XX(ha)) 1557 qla2x00_alloc_fw_dump(vha); 1558 } 1559 } else { 1560 ql_log(ql_log_fatal, vha, 0x00cd, 1561 "ISP Firmware failed checksum.\n"); 1562 goto failed; 1563 } 1564 } else 1565 goto failed; 1566 1567 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1568 /* Enable proper parity. */ 1569 spin_lock_irqsave(&ha->hardware_lock, flags); 1570 if (IS_QLA2300(ha)) 1571 /* SRAM parity */ 1572 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 1573 else 1574 /* SRAM, Instruction RAM and GP RAM parity */ 1575 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 1576 RD_REG_WORD(®->hccr); 1577 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1578 } 1579 1580 if (IS_QLA83XX(ha)) 1581 goto skip_fac_check; 1582 1583 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 1584 uint32_t size; 1585 1586 rval = qla81xx_fac_get_sector_size(vha, &size); 1587 if (rval == QLA_SUCCESS) { 1588 ha->flags.fac_supported = 1; 1589 ha->fdt_block_size = size << 2; 1590 } else { 1591 ql_log(ql_log_warn, vha, 0x00ce, 1592 "Unsupported FAC firmware (%d.%02d.%02d).\n", 1593 ha->fw_major_version, ha->fw_minor_version, 1594 ha->fw_subminor_version); 1595 skip_fac_check: 1596 if (IS_QLA83XX(ha)) { 1597 ha->flags.fac_supported = 0; 1598 rval = QLA_SUCCESS; 1599 } 1600 } 1601 } 1602 failed: 1603 if (rval) { 1604 ql_log(ql_log_fatal, vha, 0x00cf, 1605 "Setup chip ****FAILED****.\n"); 1606 } 1607 1608 return (rval); 1609 } 1610 1611 /** 1612 * qla2x00_init_response_q_entries() - Initializes response queue entries. 1613 * @ha: HA context 1614 * 1615 * Beginning of request ring has initialization control block already built 1616 * by nvram config routine. 1617 * 1618 * Returns 0 on success. 1619 */ 1620 void 1621 qla2x00_init_response_q_entries(struct rsp_que *rsp) 1622 { 1623 uint16_t cnt; 1624 response_t *pkt; 1625 1626 rsp->ring_ptr = rsp->ring; 1627 rsp->ring_index = 0; 1628 rsp->status_srb = NULL; 1629 pkt = rsp->ring_ptr; 1630 for (cnt = 0; cnt < rsp->length; cnt++) { 1631 pkt->signature = RESPONSE_PROCESSED; 1632 pkt++; 1633 } 1634 } 1635 1636 /** 1637 * qla2x00_update_fw_options() - Read and process firmware options. 1638 * @ha: HA context 1639 * 1640 * Returns 0 on success. 1641 */ 1642 void 1643 qla2x00_update_fw_options(scsi_qla_host_t *vha) 1644 { 1645 uint16_t swing, emphasis, tx_sens, rx_sens; 1646 struct qla_hw_data *ha = vha->hw; 1647 1648 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 1649 qla2x00_get_fw_options(vha, ha->fw_options); 1650 1651 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 1652 return; 1653 1654 /* Serial Link options. */ 1655 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 1656 "Serial link options.\n"); 1657 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 1658 (uint8_t *)&ha->fw_seriallink_options, 1659 sizeof(ha->fw_seriallink_options)); 1660 1661 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 1662 if (ha->fw_seriallink_options[3] & BIT_2) { 1663 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 1664 1665 /* 1G settings */ 1666 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 1667 emphasis = (ha->fw_seriallink_options[2] & 1668 (BIT_4 | BIT_3)) >> 3; 1669 tx_sens = ha->fw_seriallink_options[0] & 1670 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1671 rx_sens = (ha->fw_seriallink_options[0] & 1672 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1673 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 1674 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 1675 if (rx_sens == 0x0) 1676 rx_sens = 0x3; 1677 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 1678 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 1679 ha->fw_options[10] |= BIT_5 | 1680 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 1681 (tx_sens & (BIT_1 | BIT_0)); 1682 1683 /* 2G settings */ 1684 swing = (ha->fw_seriallink_options[2] & 1685 (BIT_7 | BIT_6 | BIT_5)) >> 5; 1686 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 1687 tx_sens = ha->fw_seriallink_options[1] & 1688 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1689 rx_sens = (ha->fw_seriallink_options[1] & 1690 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1691 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 1692 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 1693 if (rx_sens == 0x0) 1694 rx_sens = 0x3; 1695 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 1696 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 1697 ha->fw_options[11] |= BIT_5 | 1698 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 1699 (tx_sens & (BIT_1 | BIT_0)); 1700 } 1701 1702 /* FCP2 options. */ 1703 /* Return command IOCBs without waiting for an ABTS to complete. */ 1704 ha->fw_options[3] |= BIT_13; 1705 1706 /* LED scheme. */ 1707 if (ha->flags.enable_led_scheme) 1708 ha->fw_options[2] |= BIT_12; 1709 1710 /* Detect ISP6312. */ 1711 if (IS_QLA6312(ha)) 1712 ha->fw_options[2] |= BIT_13; 1713 1714 /* Update firmware options. */ 1715 qla2x00_set_fw_options(vha, ha->fw_options); 1716 } 1717 1718 void 1719 qla24xx_update_fw_options(scsi_qla_host_t *vha) 1720 { 1721 int rval; 1722 struct qla_hw_data *ha = vha->hw; 1723 1724 if (IS_QLA82XX(ha)) 1725 return; 1726 1727 /* Update Serial Link options. */ 1728 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 1729 return; 1730 1731 rval = qla2x00_set_serdes_params(vha, 1732 le16_to_cpu(ha->fw_seriallink_options24[1]), 1733 le16_to_cpu(ha->fw_seriallink_options24[2]), 1734 le16_to_cpu(ha->fw_seriallink_options24[3])); 1735 if (rval != QLA_SUCCESS) { 1736 ql_log(ql_log_warn, vha, 0x0104, 1737 "Unable to update Serial Link options (%x).\n", rval); 1738 } 1739 } 1740 1741 void 1742 qla2x00_config_rings(struct scsi_qla_host *vha) 1743 { 1744 struct qla_hw_data *ha = vha->hw; 1745 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1746 struct req_que *req = ha->req_q_map[0]; 1747 struct rsp_que *rsp = ha->rsp_q_map[0]; 1748 1749 /* Setup ring parameters in initialization control block. */ 1750 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); 1751 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); 1752 ha->init_cb->request_q_length = cpu_to_le16(req->length); 1753 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 1754 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 1755 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 1756 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 1757 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 1758 1759 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 1760 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 1761 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 1762 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 1763 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 1764 } 1765 1766 void 1767 qla24xx_config_rings(struct scsi_qla_host *vha) 1768 { 1769 struct qla_hw_data *ha = vha->hw; 1770 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); 1771 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 1772 struct qla_msix_entry *msix; 1773 struct init_cb_24xx *icb; 1774 uint16_t rid = 0; 1775 struct req_que *req = ha->req_q_map[0]; 1776 struct rsp_que *rsp = ha->rsp_q_map[0]; 1777 1778 /* Setup ring parameters in initialization control block. */ 1779 icb = (struct init_cb_24xx *)ha->init_cb; 1780 icb->request_q_outpointer = __constant_cpu_to_le16(0); 1781 icb->response_q_inpointer = __constant_cpu_to_le16(0); 1782 icb->request_q_length = cpu_to_le16(req->length); 1783 icb->response_q_length = cpu_to_le16(rsp->length); 1784 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 1785 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 1786 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 1787 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 1788 1789 /* Setup ATIO queue dma pointers for target mode */ 1790 icb->atio_q_inpointer = __constant_cpu_to_le16(0); 1791 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 1792 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 1793 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 1794 1795 if (ha->mqenable || IS_QLA83XX(ha)) { 1796 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); 1797 icb->rid = __constant_cpu_to_le16(rid); 1798 if (ha->flags.msix_enabled) { 1799 msix = &ha->msix_entries[1]; 1800 ql_dbg(ql_dbg_init, vha, 0x00fd, 1801 "Registering vector 0x%x for base que.\n", 1802 msix->entry); 1803 icb->msix = cpu_to_le16(msix->entry); 1804 } 1805 /* Use alternate PCI bus number */ 1806 if (MSB(rid)) 1807 icb->firmware_options_2 |= 1808 __constant_cpu_to_le32(BIT_19); 1809 /* Use alternate PCI devfn */ 1810 if (LSB(rid)) 1811 icb->firmware_options_2 |= 1812 __constant_cpu_to_le32(BIT_18); 1813 1814 /* Use Disable MSIX Handshake mode for capable adapters */ 1815 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 1816 (ha->flags.msix_enabled)) { 1817 icb->firmware_options_2 &= 1818 __constant_cpu_to_le32(~BIT_22); 1819 ha->flags.disable_msix_handshake = 1; 1820 ql_dbg(ql_dbg_init, vha, 0x00fe, 1821 "MSIX Handshake Disable Mode turned on.\n"); 1822 } else { 1823 icb->firmware_options_2 |= 1824 __constant_cpu_to_le32(BIT_22); 1825 } 1826 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); 1827 1828 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 1829 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 1830 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 1831 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 1832 } else { 1833 WRT_REG_DWORD(®->isp24.req_q_in, 0); 1834 WRT_REG_DWORD(®->isp24.req_q_out, 0); 1835 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 1836 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 1837 } 1838 qlt_24xx_config_rings(vha, reg); 1839 1840 /* PCI posting */ 1841 RD_REG_DWORD(&ioreg->hccr); 1842 } 1843 1844 /** 1845 * qla2x00_init_rings() - Initializes firmware. 1846 * @ha: HA context 1847 * 1848 * Beginning of request ring has initialization control block already built 1849 * by nvram config routine. 1850 * 1851 * Returns 0 on success. 1852 */ 1853 static int 1854 qla2x00_init_rings(scsi_qla_host_t *vha) 1855 { 1856 int rval; 1857 unsigned long flags = 0; 1858 int cnt, que; 1859 struct qla_hw_data *ha = vha->hw; 1860 struct req_que *req; 1861 struct rsp_que *rsp; 1862 struct mid_init_cb_24xx *mid_init_cb = 1863 (struct mid_init_cb_24xx *) ha->init_cb; 1864 1865 spin_lock_irqsave(&ha->hardware_lock, flags); 1866 1867 /* Clear outstanding commands array. */ 1868 for (que = 0; que < ha->max_req_queues; que++) { 1869 req = ha->req_q_map[que]; 1870 if (!req) 1871 continue; 1872 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) 1873 req->outstanding_cmds[cnt] = NULL; 1874 1875 req->current_outstanding_cmd = 1; 1876 1877 /* Initialize firmware. */ 1878 req->ring_ptr = req->ring; 1879 req->ring_index = 0; 1880 req->cnt = req->length; 1881 } 1882 1883 for (que = 0; que < ha->max_rsp_queues; que++) { 1884 rsp = ha->rsp_q_map[que]; 1885 if (!rsp) 1886 continue; 1887 /* Initialize response queue entries */ 1888 qla2x00_init_response_q_entries(rsp); 1889 } 1890 1891 spin_lock(&ha->vport_slock); 1892 1893 spin_unlock(&ha->vport_slock); 1894 1895 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 1896 ha->tgt.atio_ring_index = 0; 1897 /* Initialize ATIO queue entries */ 1898 qlt_init_atio_q_entries(vha); 1899 1900 ha->isp_ops->config_rings(vha); 1901 1902 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1903 1904 /* Update any ISP specific firmware options before initialization. */ 1905 ha->isp_ops->update_fw_options(vha); 1906 1907 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 1908 1909 if (ha->flags.npiv_supported) { 1910 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 1911 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 1912 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 1913 } 1914 1915 if (IS_FWI2_CAPABLE(ha)) { 1916 mid_init_cb->options = __constant_cpu_to_le16(BIT_1); 1917 mid_init_cb->init_cb.execution_throttle = 1918 cpu_to_le16(ha->fw_xcb_count); 1919 } 1920 1921 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 1922 if (rval) { 1923 ql_log(ql_log_fatal, vha, 0x00d2, 1924 "Init Firmware **** FAILED ****.\n"); 1925 } else { 1926 ql_dbg(ql_dbg_init, vha, 0x00d3, 1927 "Init Firmware -- success.\n"); 1928 } 1929 1930 return (rval); 1931 } 1932 1933 /** 1934 * qla2x00_fw_ready() - Waits for firmware ready. 1935 * @ha: HA context 1936 * 1937 * Returns 0 on success. 1938 */ 1939 static int 1940 qla2x00_fw_ready(scsi_qla_host_t *vha) 1941 { 1942 int rval; 1943 unsigned long wtime, mtime, cs84xx_time; 1944 uint16_t min_wait; /* Minimum wait time if loop is down */ 1945 uint16_t wait_time; /* Wait time if loop is coming ready */ 1946 uint16_t state[5]; 1947 struct qla_hw_data *ha = vha->hw; 1948 1949 rval = QLA_SUCCESS; 1950 1951 /* 20 seconds for loop down. */ 1952 min_wait = 20; 1953 1954 /* 1955 * Firmware should take at most one RATOV to login, plus 5 seconds for 1956 * our own processing. 1957 */ 1958 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 1959 wait_time = min_wait; 1960 } 1961 1962 /* Min wait time if loop down */ 1963 mtime = jiffies + (min_wait * HZ); 1964 1965 /* wait time before firmware ready */ 1966 wtime = jiffies + (wait_time * HZ); 1967 1968 /* Wait for ISP to finish LIP */ 1969 if (!vha->flags.init_done) 1970 ql_log(ql_log_info, vha, 0x801e, 1971 "Waiting for LIP to complete.\n"); 1972 1973 do { 1974 rval = qla2x00_get_firmware_state(vha, state); 1975 if (rval == QLA_SUCCESS) { 1976 if (state[0] < FSTATE_LOSS_OF_SYNC) { 1977 vha->device_flags &= ~DFLG_NO_CABLE; 1978 } 1979 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 1980 ql_dbg(ql_dbg_taskm, vha, 0x801f, 1981 "fw_state=%x 84xx=%x.\n", state[0], 1982 state[2]); 1983 if ((state[2] & FSTATE_LOGGED_IN) && 1984 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 1985 ql_dbg(ql_dbg_taskm, vha, 0x8028, 1986 "Sending verify iocb.\n"); 1987 1988 cs84xx_time = jiffies; 1989 rval = qla84xx_init_chip(vha); 1990 if (rval != QLA_SUCCESS) { 1991 ql_log(ql_log_warn, 1992 vha, 0x8007, 1993 "Init chip failed.\n"); 1994 break; 1995 } 1996 1997 /* Add time taken to initialize. */ 1998 cs84xx_time = jiffies - cs84xx_time; 1999 wtime += cs84xx_time; 2000 mtime += cs84xx_time; 2001 ql_dbg(ql_dbg_taskm, vha, 0x8008, 2002 "Increasing wait time by %ld. " 2003 "New time %ld.\n", cs84xx_time, 2004 wtime); 2005 } 2006 } else if (state[0] == FSTATE_READY) { 2007 ql_dbg(ql_dbg_taskm, vha, 0x8037, 2008 "F/W Ready - OK.\n"); 2009 2010 qla2x00_get_retry_cnt(vha, &ha->retry_count, 2011 &ha->login_timeout, &ha->r_a_tov); 2012 2013 rval = QLA_SUCCESS; 2014 break; 2015 } 2016 2017 rval = QLA_FUNCTION_FAILED; 2018 2019 if (atomic_read(&vha->loop_down_timer) && 2020 state[0] != FSTATE_READY) { 2021 /* Loop down. Timeout on min_wait for states 2022 * other than Wait for Login. 2023 */ 2024 if (time_after_eq(jiffies, mtime)) { 2025 ql_log(ql_log_info, vha, 0x8038, 2026 "Cable is unplugged...\n"); 2027 2028 vha->device_flags |= DFLG_NO_CABLE; 2029 break; 2030 } 2031 } 2032 } else { 2033 /* Mailbox cmd failed. Timeout on min_wait. */ 2034 if (time_after_eq(jiffies, mtime) || 2035 ha->flags.isp82xx_fw_hung) 2036 break; 2037 } 2038 2039 if (time_after_eq(jiffies, wtime)) 2040 break; 2041 2042 /* Delay for a while */ 2043 msleep(500); 2044 } while (1); 2045 2046 ql_dbg(ql_dbg_taskm, vha, 0x803a, 2047 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0], 2048 state[1], state[2], state[3], state[4], jiffies); 2049 2050 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 2051 ql_log(ql_log_warn, vha, 0x803b, 2052 "Firmware ready **** FAILED ****.\n"); 2053 } 2054 2055 return (rval); 2056 } 2057 2058 /* 2059 * qla2x00_configure_hba 2060 * Setup adapter context. 2061 * 2062 * Input: 2063 * ha = adapter state pointer. 2064 * 2065 * Returns: 2066 * 0 = success 2067 * 2068 * Context: 2069 * Kernel context. 2070 */ 2071 static int 2072 qla2x00_configure_hba(scsi_qla_host_t *vha) 2073 { 2074 int rval; 2075 uint16_t loop_id; 2076 uint16_t topo; 2077 uint16_t sw_cap; 2078 uint8_t al_pa; 2079 uint8_t area; 2080 uint8_t domain; 2081 char connect_type[22]; 2082 struct qla_hw_data *ha = vha->hw; 2083 unsigned long flags; 2084 2085 /* Get host addresses. */ 2086 rval = qla2x00_get_adapter_id(vha, 2087 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 2088 if (rval != QLA_SUCCESS) { 2089 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 2090 IS_CNA_CAPABLE(ha) || 2091 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 2092 ql_dbg(ql_dbg_disc, vha, 0x2008, 2093 "Loop is in a transition state.\n"); 2094 } else { 2095 ql_log(ql_log_warn, vha, 0x2009, 2096 "Unable to get host loop ID.\n"); 2097 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2098 } 2099 return (rval); 2100 } 2101 2102 if (topo == 4) { 2103 ql_log(ql_log_info, vha, 0x200a, 2104 "Cannot get topology - retrying.\n"); 2105 return (QLA_FUNCTION_FAILED); 2106 } 2107 2108 vha->loop_id = loop_id; 2109 2110 /* initialize */ 2111 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 2112 ha->operating_mode = LOOP; 2113 ha->switch_cap = 0; 2114 2115 switch (topo) { 2116 case 0: 2117 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 2118 ha->current_topology = ISP_CFG_NL; 2119 strcpy(connect_type, "(Loop)"); 2120 break; 2121 2122 case 1: 2123 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 2124 ha->switch_cap = sw_cap; 2125 ha->current_topology = ISP_CFG_FL; 2126 strcpy(connect_type, "(FL_Port)"); 2127 break; 2128 2129 case 2: 2130 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 2131 ha->operating_mode = P2P; 2132 ha->current_topology = ISP_CFG_N; 2133 strcpy(connect_type, "(N_Port-to-N_Port)"); 2134 break; 2135 2136 case 3: 2137 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 2138 ha->switch_cap = sw_cap; 2139 ha->operating_mode = P2P; 2140 ha->current_topology = ISP_CFG_F; 2141 strcpy(connect_type, "(F_Port)"); 2142 break; 2143 2144 default: 2145 ql_dbg(ql_dbg_disc, vha, 0x200f, 2146 "HBA in unknown topology %x, using NL.\n", topo); 2147 ha->current_topology = ISP_CFG_NL; 2148 strcpy(connect_type, "(Loop)"); 2149 break; 2150 } 2151 2152 /* Save Host port and loop ID. */ 2153 /* byte order - Big Endian */ 2154 vha->d_id.b.domain = domain; 2155 vha->d_id.b.area = area; 2156 vha->d_id.b.al_pa = al_pa; 2157 2158 spin_lock_irqsave(&ha->vport_slock, flags); 2159 qlt_update_vp_map(vha, SET_AL_PA); 2160 spin_unlock_irqrestore(&ha->vport_slock, flags); 2161 2162 if (!vha->flags.init_done) 2163 ql_log(ql_log_info, vha, 0x2010, 2164 "Topology - %s, Host Loop address 0x%x.\n", 2165 connect_type, vha->loop_id); 2166 2167 if (rval) { 2168 ql_log(ql_log_warn, vha, 0x2011, 2169 "%s FAILED\n", __func__); 2170 } else { 2171 ql_dbg(ql_dbg_disc, vha, 0x2012, 2172 "%s success\n", __func__); 2173 } 2174 2175 return(rval); 2176 } 2177 2178 inline void 2179 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 2180 char *def) 2181 { 2182 char *st, *en; 2183 uint16_t index; 2184 struct qla_hw_data *ha = vha->hw; 2185 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 2186 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 2187 2188 if (memcmp(model, BINZERO, len) != 0) { 2189 strncpy(ha->model_number, model, len); 2190 st = en = ha->model_number; 2191 en += len - 1; 2192 while (en > st) { 2193 if (*en != 0x20 && *en != 0x00) 2194 break; 2195 *en-- = '\0'; 2196 } 2197 2198 index = (ha->pdev->subsystem_device & 0xff); 2199 if (use_tbl && 2200 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2201 index < QLA_MODEL_NAMES) 2202 strncpy(ha->model_desc, 2203 qla2x00_model_name[index * 2 + 1], 2204 sizeof(ha->model_desc) - 1); 2205 } else { 2206 index = (ha->pdev->subsystem_device & 0xff); 2207 if (use_tbl && 2208 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2209 index < QLA_MODEL_NAMES) { 2210 strcpy(ha->model_number, 2211 qla2x00_model_name[index * 2]); 2212 strncpy(ha->model_desc, 2213 qla2x00_model_name[index * 2 + 1], 2214 sizeof(ha->model_desc) - 1); 2215 } else { 2216 strcpy(ha->model_number, def); 2217 } 2218 } 2219 if (IS_FWI2_CAPABLE(ha)) 2220 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 2221 sizeof(ha->model_desc)); 2222 } 2223 2224 /* On sparc systems, obtain port and node WWN from firmware 2225 * properties. 2226 */ 2227 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 2228 { 2229 #ifdef CONFIG_SPARC 2230 struct qla_hw_data *ha = vha->hw; 2231 struct pci_dev *pdev = ha->pdev; 2232 struct device_node *dp = pci_device_to_OF_node(pdev); 2233 const u8 *val; 2234 int len; 2235 2236 val = of_get_property(dp, "port-wwn", &len); 2237 if (val && len >= WWN_SIZE) 2238 memcpy(nv->port_name, val, WWN_SIZE); 2239 2240 val = of_get_property(dp, "node-wwn", &len); 2241 if (val && len >= WWN_SIZE) 2242 memcpy(nv->node_name, val, WWN_SIZE); 2243 #endif 2244 } 2245 2246 /* 2247 * NVRAM configuration for ISP 2xxx 2248 * 2249 * Input: 2250 * ha = adapter block pointer. 2251 * 2252 * Output: 2253 * initialization control block in response_ring 2254 * host adapters parameters in host adapter block 2255 * 2256 * Returns: 2257 * 0 = success. 2258 */ 2259 int 2260 qla2x00_nvram_config(scsi_qla_host_t *vha) 2261 { 2262 int rval; 2263 uint8_t chksum = 0; 2264 uint16_t cnt; 2265 uint8_t *dptr1, *dptr2; 2266 struct qla_hw_data *ha = vha->hw; 2267 init_cb_t *icb = ha->init_cb; 2268 nvram_t *nv = ha->nvram; 2269 uint8_t *ptr = ha->nvram; 2270 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2271 2272 rval = QLA_SUCCESS; 2273 2274 /* Determine NVRAM starting address. */ 2275 ha->nvram_size = sizeof(nvram_t); 2276 ha->nvram_base = 0; 2277 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 2278 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 2279 ha->nvram_base = 0x80; 2280 2281 /* Get NVRAM data and calculate checksum. */ 2282 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 2283 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 2284 chksum += *ptr++; 2285 2286 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 2287 "Contents of NVRAM.\n"); 2288 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 2289 (uint8_t *)nv, ha->nvram_size); 2290 2291 /* Bad NVRAM data, set defaults parameters. */ 2292 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 2293 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 2294 /* Reset NVRAM data. */ 2295 ql_log(ql_log_warn, vha, 0x0064, 2296 "Inconsistent NVRAM " 2297 "detected: checksum=0x%x id=%c version=0x%x.\n", 2298 chksum, nv->id[0], nv->nvram_version); 2299 ql_log(ql_log_warn, vha, 0x0065, 2300 "Falling back to " 2301 "functioning (yet invalid -- WWPN) defaults.\n"); 2302 2303 /* 2304 * Set default initialization control block. 2305 */ 2306 memset(nv, 0, ha->nvram_size); 2307 nv->parameter_block_version = ICB_VERSION; 2308 2309 if (IS_QLA23XX(ha)) { 2310 nv->firmware_options[0] = BIT_2 | BIT_1; 2311 nv->firmware_options[1] = BIT_7 | BIT_5; 2312 nv->add_firmware_options[0] = BIT_5; 2313 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2314 nv->frame_payload_size = __constant_cpu_to_le16(2048); 2315 nv->special_options[1] = BIT_7; 2316 } else if (IS_QLA2200(ha)) { 2317 nv->firmware_options[0] = BIT_2 | BIT_1; 2318 nv->firmware_options[1] = BIT_7 | BIT_5; 2319 nv->add_firmware_options[0] = BIT_5; 2320 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2321 nv->frame_payload_size = __constant_cpu_to_le16(1024); 2322 } else if (IS_QLA2100(ha)) { 2323 nv->firmware_options[0] = BIT_3 | BIT_1; 2324 nv->firmware_options[1] = BIT_5; 2325 nv->frame_payload_size = __constant_cpu_to_le16(1024); 2326 } 2327 2328 nv->max_iocb_allocation = __constant_cpu_to_le16(256); 2329 nv->execution_throttle = __constant_cpu_to_le16(16); 2330 nv->retry_count = 8; 2331 nv->retry_delay = 1; 2332 2333 nv->port_name[0] = 33; 2334 nv->port_name[3] = 224; 2335 nv->port_name[4] = 139; 2336 2337 qla2xxx_nvram_wwn_from_ofw(vha, nv); 2338 2339 nv->login_timeout = 4; 2340 2341 /* 2342 * Set default host adapter parameters 2343 */ 2344 nv->host_p[1] = BIT_2; 2345 nv->reset_delay = 5; 2346 nv->port_down_retry_count = 8; 2347 nv->max_luns_per_target = __constant_cpu_to_le16(8); 2348 nv->link_down_timeout = 60; 2349 2350 rval = 1; 2351 } 2352 2353 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 2354 /* 2355 * The SN2 does not provide BIOS emulation which means you can't change 2356 * potentially bogus BIOS settings. Force the use of default settings 2357 * for link rate and frame size. Hope that the rest of the settings 2358 * are valid. 2359 */ 2360 if (ia64_platform_is("sn2")) { 2361 nv->frame_payload_size = __constant_cpu_to_le16(2048); 2362 if (IS_QLA23XX(ha)) 2363 nv->special_options[1] = BIT_7; 2364 } 2365 #endif 2366 2367 /* Reset Initialization control block */ 2368 memset(icb, 0, ha->init_cb_size); 2369 2370 /* 2371 * Setup driver NVRAM options. 2372 */ 2373 nv->firmware_options[0] |= (BIT_6 | BIT_1); 2374 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 2375 nv->firmware_options[1] |= (BIT_5 | BIT_0); 2376 nv->firmware_options[1] &= ~BIT_4; 2377 2378 if (IS_QLA23XX(ha)) { 2379 nv->firmware_options[0] |= BIT_2; 2380 nv->firmware_options[0] &= ~BIT_3; 2381 nv->special_options[0] &= ~BIT_6; 2382 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 2383 2384 if (IS_QLA2300(ha)) { 2385 if (ha->fb_rev == FPM_2310) { 2386 strcpy(ha->model_number, "QLA2310"); 2387 } else { 2388 strcpy(ha->model_number, "QLA2300"); 2389 } 2390 } else { 2391 qla2x00_set_model_info(vha, nv->model_number, 2392 sizeof(nv->model_number), "QLA23xx"); 2393 } 2394 } else if (IS_QLA2200(ha)) { 2395 nv->firmware_options[0] |= BIT_2; 2396 /* 2397 * 'Point-to-point preferred, else loop' is not a safe 2398 * connection mode setting. 2399 */ 2400 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 2401 (BIT_5 | BIT_4)) { 2402 /* Force 'loop preferred, else point-to-point'. */ 2403 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 2404 nv->add_firmware_options[0] |= BIT_5; 2405 } 2406 strcpy(ha->model_number, "QLA22xx"); 2407 } else /*if (IS_QLA2100(ha))*/ { 2408 strcpy(ha->model_number, "QLA2100"); 2409 } 2410 2411 /* 2412 * Copy over NVRAM RISC parameter block to initialization control block. 2413 */ 2414 dptr1 = (uint8_t *)icb; 2415 dptr2 = (uint8_t *)&nv->parameter_block_version; 2416 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 2417 while (cnt--) 2418 *dptr1++ = *dptr2++; 2419 2420 /* Copy 2nd half. */ 2421 dptr1 = (uint8_t *)icb->add_firmware_options; 2422 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 2423 while (cnt--) 2424 *dptr1++ = *dptr2++; 2425 2426 /* Use alternate WWN? */ 2427 if (nv->host_p[1] & BIT_7) { 2428 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 2429 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 2430 } 2431 2432 /* Prepare nodename */ 2433 if ((icb->firmware_options[1] & BIT_6) == 0) { 2434 /* 2435 * Firmware will apply the following mask if the nodename was 2436 * not provided. 2437 */ 2438 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 2439 icb->node_name[0] &= 0xF0; 2440 } 2441 2442 /* 2443 * Set host adapter parameters. 2444 */ 2445 2446 /* 2447 * BIT_7 in the host-parameters section allows for modification to 2448 * internal driver logging. 2449 */ 2450 if (nv->host_p[0] & BIT_7) 2451 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 2452 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 2453 /* Always load RISC code on non ISP2[12]00 chips. */ 2454 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 2455 ha->flags.disable_risc_code_load = 0; 2456 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 2457 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 2458 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 2459 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 2460 ha->flags.disable_serdes = 0; 2461 2462 ha->operating_mode = 2463 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 2464 2465 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 2466 sizeof(ha->fw_seriallink_options)); 2467 2468 /* save HBA serial number */ 2469 ha->serial0 = icb->port_name[5]; 2470 ha->serial1 = icb->port_name[6]; 2471 ha->serial2 = icb->port_name[7]; 2472 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 2473 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 2474 2475 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 2476 2477 ha->retry_count = nv->retry_count; 2478 2479 /* Set minimum login_timeout to 4 seconds. */ 2480 if (nv->login_timeout != ql2xlogintimeout) 2481 nv->login_timeout = ql2xlogintimeout; 2482 if (nv->login_timeout < 4) 2483 nv->login_timeout = 4; 2484 ha->login_timeout = nv->login_timeout; 2485 icb->login_timeout = nv->login_timeout; 2486 2487 /* Set minimum RATOV to 100 tenths of a second. */ 2488 ha->r_a_tov = 100; 2489 2490 ha->loop_reset_delay = nv->reset_delay; 2491 2492 /* Link Down Timeout = 0: 2493 * 2494 * When Port Down timer expires we will start returning 2495 * I/O's to OS with "DID_NO_CONNECT". 2496 * 2497 * Link Down Timeout != 0: 2498 * 2499 * The driver waits for the link to come up after link down 2500 * before returning I/Os to OS with "DID_NO_CONNECT". 2501 */ 2502 if (nv->link_down_timeout == 0) { 2503 ha->loop_down_abort_time = 2504 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 2505 } else { 2506 ha->link_down_timeout = nv->link_down_timeout; 2507 ha->loop_down_abort_time = 2508 (LOOP_DOWN_TIME - ha->link_down_timeout); 2509 } 2510 2511 /* 2512 * Need enough time to try and get the port back. 2513 */ 2514 ha->port_down_retry_count = nv->port_down_retry_count; 2515 if (qlport_down_retry) 2516 ha->port_down_retry_count = qlport_down_retry; 2517 /* Set login_retry_count */ 2518 ha->login_retry_count = nv->retry_count; 2519 if (ha->port_down_retry_count == nv->port_down_retry_count && 2520 ha->port_down_retry_count > 3) 2521 ha->login_retry_count = ha->port_down_retry_count; 2522 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 2523 ha->login_retry_count = ha->port_down_retry_count; 2524 if (ql2xloginretrycount) 2525 ha->login_retry_count = ql2xloginretrycount; 2526 2527 icb->lun_enables = __constant_cpu_to_le16(0); 2528 icb->command_resource_count = 0; 2529 icb->immediate_notify_resource_count = 0; 2530 icb->timeout = __constant_cpu_to_le16(0); 2531 2532 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2533 /* Enable RIO */ 2534 icb->firmware_options[0] &= ~BIT_3; 2535 icb->add_firmware_options[0] &= 2536 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2537 icb->add_firmware_options[0] |= BIT_2; 2538 icb->response_accumulation_timer = 3; 2539 icb->interrupt_delay_timer = 5; 2540 2541 vha->flags.process_response_queue = 1; 2542 } else { 2543 /* Enable ZIO. */ 2544 if (!vha->flags.init_done) { 2545 ha->zio_mode = icb->add_firmware_options[0] & 2546 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2547 ha->zio_timer = icb->interrupt_delay_timer ? 2548 icb->interrupt_delay_timer: 2; 2549 } 2550 icb->add_firmware_options[0] &= 2551 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2552 vha->flags.process_response_queue = 0; 2553 if (ha->zio_mode != QLA_ZIO_DISABLED) { 2554 ha->zio_mode = QLA_ZIO_MODE_6; 2555 2556 ql_log(ql_log_info, vha, 0x0068, 2557 "ZIO mode %d enabled; timer delay (%d us).\n", 2558 ha->zio_mode, ha->zio_timer * 100); 2559 2560 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 2561 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 2562 vha->flags.process_response_queue = 1; 2563 } 2564 } 2565 2566 if (rval) { 2567 ql_log(ql_log_warn, vha, 0x0069, 2568 "NVRAM configuration failed.\n"); 2569 } 2570 return (rval); 2571 } 2572 2573 static void 2574 qla2x00_rport_del(void *data) 2575 { 2576 fc_port_t *fcport = data; 2577 struct fc_rport *rport; 2578 scsi_qla_host_t *vha = fcport->vha; 2579 unsigned long flags; 2580 2581 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2582 rport = fcport->drport ? fcport->drport: fcport->rport; 2583 fcport->drport = NULL; 2584 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2585 if (rport) { 2586 fc_remote_port_delete(rport); 2587 /* 2588 * Release the target mode FC NEXUS in qla_target.c code 2589 * if target mod is enabled. 2590 */ 2591 qlt_fc_port_deleted(vha, fcport); 2592 } 2593 } 2594 2595 /** 2596 * qla2x00_alloc_fcport() - Allocate a generic fcport. 2597 * @ha: HA context 2598 * @flags: allocation flags 2599 * 2600 * Returns a pointer to the allocated fcport, or NULL, if none available. 2601 */ 2602 fc_port_t * 2603 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 2604 { 2605 fc_port_t *fcport; 2606 2607 fcport = kzalloc(sizeof(fc_port_t), flags); 2608 if (!fcport) 2609 return NULL; 2610 2611 /* Setup fcport template structure. */ 2612 fcport->vha = vha; 2613 fcport->port_type = FCT_UNKNOWN; 2614 fcport->loop_id = FC_NO_LOOP_ID; 2615 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 2616 fcport->supported_classes = FC_COS_UNSPECIFIED; 2617 fcport->scan_state = QLA_FCPORT_SCAN_NONE; 2618 2619 return fcport; 2620 } 2621 2622 /* 2623 * qla2x00_configure_loop 2624 * Updates Fibre Channel Device Database with what is actually on loop. 2625 * 2626 * Input: 2627 * ha = adapter block pointer. 2628 * 2629 * Returns: 2630 * 0 = success. 2631 * 1 = error. 2632 * 2 = database was full and device was not configured. 2633 */ 2634 static int 2635 qla2x00_configure_loop(scsi_qla_host_t *vha) 2636 { 2637 int rval; 2638 unsigned long flags, save_flags; 2639 struct qla_hw_data *ha = vha->hw; 2640 rval = QLA_SUCCESS; 2641 2642 /* Get Initiator ID */ 2643 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 2644 rval = qla2x00_configure_hba(vha); 2645 if (rval != QLA_SUCCESS) { 2646 ql_dbg(ql_dbg_disc, vha, 0x2013, 2647 "Unable to configure HBA.\n"); 2648 return (rval); 2649 } 2650 } 2651 2652 save_flags = flags = vha->dpc_flags; 2653 ql_dbg(ql_dbg_disc, vha, 0x2014, 2654 "Configure loop -- dpc flags = 0x%lx.\n", flags); 2655 2656 /* 2657 * If we have both an RSCN and PORT UPDATE pending then handle them 2658 * both at the same time. 2659 */ 2660 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 2661 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 2662 2663 qla2x00_get_data_rate(vha); 2664 2665 /* Determine what we need to do */ 2666 if (ha->current_topology == ISP_CFG_FL && 2667 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 2668 2669 set_bit(RSCN_UPDATE, &flags); 2670 2671 } else if (ha->current_topology == ISP_CFG_F && 2672 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 2673 2674 set_bit(RSCN_UPDATE, &flags); 2675 clear_bit(LOCAL_LOOP_UPDATE, &flags); 2676 2677 } else if (ha->current_topology == ISP_CFG_N) { 2678 clear_bit(RSCN_UPDATE, &flags); 2679 2680 } else if (!vha->flags.online || 2681 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 2682 2683 set_bit(RSCN_UPDATE, &flags); 2684 set_bit(LOCAL_LOOP_UPDATE, &flags); 2685 } 2686 2687 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 2688 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2689 ql_dbg(ql_dbg_disc, vha, 0x2015, 2690 "Loop resync needed, failing.\n"); 2691 rval = QLA_FUNCTION_FAILED; 2692 } else 2693 rval = qla2x00_configure_local_loop(vha); 2694 } 2695 2696 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 2697 if (LOOP_TRANSITION(vha)) { 2698 ql_dbg(ql_dbg_disc, vha, 0x201e, 2699 "Needs RSCN update and loop transition.\n"); 2700 rval = QLA_FUNCTION_FAILED; 2701 } 2702 else 2703 rval = qla2x00_configure_fabric(vha); 2704 } 2705 2706 if (rval == QLA_SUCCESS) { 2707 if (atomic_read(&vha->loop_down_timer) || 2708 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2709 rval = QLA_FUNCTION_FAILED; 2710 } else { 2711 atomic_set(&vha->loop_state, LOOP_READY); 2712 ql_dbg(ql_dbg_disc, vha, 0x2069, 2713 "LOOP READY.\n"); 2714 } 2715 } 2716 2717 if (rval) { 2718 ql_dbg(ql_dbg_disc, vha, 0x206a, 2719 "%s *** FAILED ***.\n", __func__); 2720 } else { 2721 ql_dbg(ql_dbg_disc, vha, 0x206b, 2722 "%s: exiting normally.\n", __func__); 2723 } 2724 2725 /* Restore state if a resync event occurred during processing */ 2726 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2727 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 2728 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 2729 if (test_bit(RSCN_UPDATE, &save_flags)) { 2730 set_bit(RSCN_UPDATE, &vha->dpc_flags); 2731 } 2732 } 2733 2734 return (rval); 2735 } 2736 2737 2738 2739 /* 2740 * qla2x00_configure_local_loop 2741 * Updates Fibre Channel Device Database with local loop devices. 2742 * 2743 * Input: 2744 * ha = adapter block pointer. 2745 * 2746 * Returns: 2747 * 0 = success. 2748 */ 2749 static int 2750 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 2751 { 2752 int rval, rval2; 2753 int found_devs; 2754 int found; 2755 fc_port_t *fcport, *new_fcport; 2756 2757 uint16_t index; 2758 uint16_t entries; 2759 char *id_iter; 2760 uint16_t loop_id; 2761 uint8_t domain, area, al_pa; 2762 struct qla_hw_data *ha = vha->hw; 2763 2764 found_devs = 0; 2765 new_fcport = NULL; 2766 entries = MAX_FIBRE_DEVICES_LOOP; 2767 2768 /* Get list of logged in devices. */ 2769 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 2770 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 2771 &entries); 2772 if (rval != QLA_SUCCESS) 2773 goto cleanup_allocation; 2774 2775 ql_dbg(ql_dbg_disc, vha, 0x2017, 2776 "Entries in ID list (%d).\n", entries); 2777 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 2778 (uint8_t *)ha->gid_list, 2779 entries * sizeof(struct gid_list_info)); 2780 2781 /* Allocate temporary fcport for any new fcports discovered. */ 2782 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 2783 if (new_fcport == NULL) { 2784 ql_log(ql_log_warn, vha, 0x2018, 2785 "Memory allocation failed for fcport.\n"); 2786 rval = QLA_MEMORY_ALLOC_FAILED; 2787 goto cleanup_allocation; 2788 } 2789 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 2790 2791 /* 2792 * Mark local devices that were present with FCF_DEVICE_LOST for now. 2793 */ 2794 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2795 if (atomic_read(&fcport->state) == FCS_ONLINE && 2796 fcport->port_type != FCT_BROADCAST && 2797 (fcport->flags & FCF_FABRIC_DEVICE) == 0) { 2798 2799 ql_dbg(ql_dbg_disc, vha, 0x2019, 2800 "Marking port lost loop_id=0x%04x.\n", 2801 fcport->loop_id); 2802 2803 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2804 } 2805 } 2806 2807 /* Add devices to port list. */ 2808 id_iter = (char *)ha->gid_list; 2809 for (index = 0; index < entries; index++) { 2810 domain = ((struct gid_list_info *)id_iter)->domain; 2811 area = ((struct gid_list_info *)id_iter)->area; 2812 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 2813 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 2814 loop_id = (uint16_t) 2815 ((struct gid_list_info *)id_iter)->loop_id_2100; 2816 else 2817 loop_id = le16_to_cpu( 2818 ((struct gid_list_info *)id_iter)->loop_id); 2819 id_iter += ha->gid_list_info_size; 2820 2821 /* Bypass reserved domain fields. */ 2822 if ((domain & 0xf0) == 0xf0) 2823 continue; 2824 2825 /* Bypass if not same domain and area of adapter. */ 2826 if (area && domain && 2827 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 2828 continue; 2829 2830 /* Bypass invalid local loop ID. */ 2831 if (loop_id > LAST_LOCAL_LOOP_ID) 2832 continue; 2833 2834 memset(new_fcport, 0, sizeof(fc_port_t)); 2835 2836 /* Fill in member data. */ 2837 new_fcport->d_id.b.domain = domain; 2838 new_fcport->d_id.b.area = area; 2839 new_fcport->d_id.b.al_pa = al_pa; 2840 new_fcport->loop_id = loop_id; 2841 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 2842 if (rval2 != QLA_SUCCESS) { 2843 ql_dbg(ql_dbg_disc, vha, 0x201a, 2844 "Failed to retrieve fcport information " 2845 "-- get_port_database=%x, loop_id=0x%04x.\n", 2846 rval2, new_fcport->loop_id); 2847 ql_dbg(ql_dbg_disc, vha, 0x201b, 2848 "Scheduling resync.\n"); 2849 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 2850 continue; 2851 } 2852 2853 /* Check for matching device in port list. */ 2854 found = 0; 2855 fcport = NULL; 2856 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2857 if (memcmp(new_fcport->port_name, fcport->port_name, 2858 WWN_SIZE)) 2859 continue; 2860 2861 fcport->flags &= ~FCF_FABRIC_DEVICE; 2862 fcport->loop_id = new_fcport->loop_id; 2863 fcport->port_type = new_fcport->port_type; 2864 fcport->d_id.b24 = new_fcport->d_id.b24; 2865 memcpy(fcport->node_name, new_fcport->node_name, 2866 WWN_SIZE); 2867 2868 found++; 2869 break; 2870 } 2871 2872 if (!found) { 2873 /* New device, add to fcports list. */ 2874 list_add_tail(&new_fcport->list, &vha->vp_fcports); 2875 2876 /* Allocate a new replacement fcport. */ 2877 fcport = new_fcport; 2878 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 2879 if (new_fcport == NULL) { 2880 ql_log(ql_log_warn, vha, 0x201c, 2881 "Failed to allocate memory for fcport.\n"); 2882 rval = QLA_MEMORY_ALLOC_FAILED; 2883 goto cleanup_allocation; 2884 } 2885 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 2886 } 2887 2888 /* Base iIDMA settings on HBA port speed. */ 2889 fcport->fp_speed = ha->link_data_rate; 2890 2891 qla2x00_update_fcport(vha, fcport); 2892 2893 found_devs++; 2894 } 2895 2896 cleanup_allocation: 2897 kfree(new_fcport); 2898 2899 if (rval != QLA_SUCCESS) { 2900 ql_dbg(ql_dbg_disc, vha, 0x201d, 2901 "Configure local loop error exit: rval=%x.\n", rval); 2902 } 2903 2904 return (rval); 2905 } 2906 2907 static void 2908 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 2909 { 2910 char *link_speed; 2911 int rval; 2912 uint16_t mb[4]; 2913 struct qla_hw_data *ha = vha->hw; 2914 2915 if (!IS_IIDMA_CAPABLE(ha)) 2916 return; 2917 2918 if (atomic_read(&fcport->state) != FCS_ONLINE) 2919 return; 2920 2921 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 2922 fcport->fp_speed > ha->link_data_rate) 2923 return; 2924 2925 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 2926 mb); 2927 if (rval != QLA_SUCCESS) { 2928 ql_dbg(ql_dbg_disc, vha, 0x2004, 2929 "Unable to adjust iIDMA " 2930 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x " 2931 "%04x.\n", fcport->port_name[0], fcport->port_name[1], 2932 fcport->port_name[2], fcport->port_name[3], 2933 fcport->port_name[4], fcport->port_name[5], 2934 fcport->port_name[6], fcport->port_name[7], rval, 2935 fcport->fp_speed, mb[0], mb[1]); 2936 } else { 2937 link_speed = qla2x00_get_link_speed_str(ha); 2938 ql_dbg(ql_dbg_disc, vha, 0x2005, 2939 "iIDMA adjusted to %s GB/s " 2940 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed, 2941 fcport->port_name[0], fcport->port_name[1], 2942 fcport->port_name[2], fcport->port_name[3], 2943 fcport->port_name[4], fcport->port_name[5], 2944 fcport->port_name[6], fcport->port_name[7]); 2945 } 2946 } 2947 2948 static void 2949 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 2950 { 2951 struct fc_rport_identifiers rport_ids; 2952 struct fc_rport *rport; 2953 unsigned long flags; 2954 2955 qla2x00_rport_del(fcport); 2956 2957 rport_ids.node_name = wwn_to_u64(fcport->node_name); 2958 rport_ids.port_name = wwn_to_u64(fcport->port_name); 2959 rport_ids.port_id = fcport->d_id.b.domain << 16 | 2960 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 2961 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 2962 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 2963 if (!rport) { 2964 ql_log(ql_log_warn, vha, 0x2006, 2965 "Unable to allocate fc remote port.\n"); 2966 return; 2967 } 2968 /* 2969 * Create target mode FC NEXUS in qla_target.c if target mode is 2970 * enabled.. 2971 */ 2972 qlt_fc_port_added(vha, fcport); 2973 2974 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2975 *((fc_port_t **)rport->dd_data) = fcport; 2976 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2977 2978 rport->supported_classes = fcport->supported_classes; 2979 2980 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 2981 if (fcport->port_type == FCT_INITIATOR) 2982 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 2983 if (fcport->port_type == FCT_TARGET) 2984 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 2985 fc_remote_port_rolechg(rport, rport_ids.roles); 2986 } 2987 2988 /* 2989 * qla2x00_update_fcport 2990 * Updates device on list. 2991 * 2992 * Input: 2993 * ha = adapter block pointer. 2994 * fcport = port structure pointer. 2995 * 2996 * Return: 2997 * 0 - Success 2998 * BIT_0 - error 2999 * 3000 * Context: 3001 * Kernel context. 3002 */ 3003 void 3004 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 3005 { 3006 fcport->vha = vha; 3007 fcport->login_retry = 0; 3008 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 3009 3010 qla2x00_iidma_fcport(vha, fcport); 3011 qla24xx_update_fcport_fcp_prio(vha, fcport); 3012 qla2x00_reg_remote_port(vha, fcport); 3013 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 3014 } 3015 3016 /* 3017 * qla2x00_configure_fabric 3018 * Setup SNS devices with loop ID's. 3019 * 3020 * Input: 3021 * ha = adapter block pointer. 3022 * 3023 * Returns: 3024 * 0 = success. 3025 * BIT_0 = error 3026 */ 3027 static int 3028 qla2x00_configure_fabric(scsi_qla_host_t *vha) 3029 { 3030 int rval; 3031 fc_port_t *fcport; 3032 uint16_t next_loopid; 3033 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3034 uint16_t loop_id; 3035 LIST_HEAD(new_fcports); 3036 struct qla_hw_data *ha = vha->hw; 3037 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 3038 3039 /* If FL port exists, then SNS is present */ 3040 if (IS_FWI2_CAPABLE(ha)) 3041 loop_id = NPH_F_PORT; 3042 else 3043 loop_id = SNS_FL_PORT; 3044 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 3045 if (rval != QLA_SUCCESS) { 3046 ql_dbg(ql_dbg_disc, vha, 0x201f, 3047 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 3048 3049 vha->device_flags &= ~SWITCH_FOUND; 3050 return (QLA_SUCCESS); 3051 } 3052 vha->device_flags |= SWITCH_FOUND; 3053 3054 do { 3055 /* FDMI support. */ 3056 if (ql2xfdmienable && 3057 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 3058 qla2x00_fdmi_register(vha); 3059 3060 /* Ensure we are logged into the SNS. */ 3061 if (IS_FWI2_CAPABLE(ha)) 3062 loop_id = NPH_SNS; 3063 else 3064 loop_id = SIMPLE_NAME_SERVER; 3065 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 3066 0xfc, mb, BIT_1|BIT_0); 3067 if (rval != QLA_SUCCESS) { 3068 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3069 break; 3070 } 3071 if (mb[0] != MBS_COMMAND_COMPLETE) { 3072 ql_dbg(ql_dbg_disc, vha, 0x2042, 3073 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 3074 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], 3075 mb[2], mb[6], mb[7]); 3076 return (QLA_SUCCESS); 3077 } 3078 3079 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 3080 if (qla2x00_rft_id(vha)) { 3081 /* EMPTY */ 3082 ql_dbg(ql_dbg_disc, vha, 0x2045, 3083 "Register FC-4 TYPE failed.\n"); 3084 } 3085 if (qla2x00_rff_id(vha)) { 3086 /* EMPTY */ 3087 ql_dbg(ql_dbg_disc, vha, 0x2049, 3088 "Register FC-4 Features failed.\n"); 3089 } 3090 if (qla2x00_rnn_id(vha)) { 3091 /* EMPTY */ 3092 ql_dbg(ql_dbg_disc, vha, 0x204f, 3093 "Register Node Name failed.\n"); 3094 } else if (qla2x00_rsnn_nn(vha)) { 3095 /* EMPTY */ 3096 ql_dbg(ql_dbg_disc, vha, 0x2053, 3097 "Register Symobilic Node Name failed.\n"); 3098 } 3099 } 3100 3101 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); 3102 if (rval != QLA_SUCCESS) 3103 break; 3104 3105 /* Add new ports to existing port list */ 3106 list_splice_tail_init(&new_fcports, &vha->vp_fcports); 3107 3108 /* Starting free loop ID. */ 3109 next_loopid = ha->min_external_loopid; 3110 3111 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3112 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3113 break; 3114 3115 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 3116 continue; 3117 3118 /* Logout lost/gone fabric devices (non-FCP2) */ 3119 if (fcport->scan_state != QLA_FCPORT_SCAN_FOUND && 3120 atomic_read(&fcport->state) == FCS_ONLINE) { 3121 qla2x00_mark_device_lost(vha, fcport, 3122 ql2xplogiabsentdevice, 0); 3123 if (fcport->loop_id != FC_NO_LOOP_ID && 3124 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3125 fcport->port_type != FCT_INITIATOR && 3126 fcport->port_type != FCT_BROADCAST) { 3127 ha->isp_ops->fabric_logout(vha, 3128 fcport->loop_id, 3129 fcport->d_id.b.domain, 3130 fcport->d_id.b.area, 3131 fcport->d_id.b.al_pa); 3132 } 3133 continue; 3134 } 3135 fcport->scan_state = QLA_FCPORT_SCAN_NONE; 3136 3137 /* Login fabric devices that need a login */ 3138 if ((fcport->flags & FCF_LOGIN_NEEDED) != 0 && 3139 atomic_read(&vha->loop_down_timer) == 0) { 3140 if (fcport->loop_id == FC_NO_LOOP_ID) { 3141 fcport->loop_id = next_loopid; 3142 rval = qla2x00_find_new_loop_id( 3143 base_vha, fcport); 3144 if (rval != QLA_SUCCESS) { 3145 /* Ran out of IDs to use */ 3146 continue; 3147 } 3148 } 3149 } 3150 3151 /* Login and update database */ 3152 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3153 } 3154 } while (0); 3155 3156 if (rval) { 3157 ql_dbg(ql_dbg_disc, vha, 0x2068, 3158 "Configure fabric error exit rval=%d.\n", rval); 3159 } 3160 3161 return (rval); 3162 } 3163 3164 /* 3165 * qla2x00_find_all_fabric_devs 3166 * 3167 * Input: 3168 * ha = adapter block pointer. 3169 * dev = database device entry pointer. 3170 * 3171 * Returns: 3172 * 0 = success. 3173 * 3174 * Context: 3175 * Kernel context. 3176 */ 3177 static int 3178 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, 3179 struct list_head *new_fcports) 3180 { 3181 int rval; 3182 uint16_t loop_id; 3183 fc_port_t *fcport, *new_fcport, *fcptemp; 3184 int found; 3185 3186 sw_info_t *swl; 3187 int swl_idx; 3188 int first_dev, last_dev; 3189 port_id_t wrap = {}, nxt_d_id; 3190 struct qla_hw_data *ha = vha->hw; 3191 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); 3192 struct scsi_qla_host *tvp; 3193 3194 rval = QLA_SUCCESS; 3195 3196 /* Try GID_PT to get device list, else GAN. */ 3197 if (!ha->swl) 3198 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 3199 GFP_KERNEL); 3200 swl = ha->swl; 3201 if (!swl) { 3202 /*EMPTY*/ 3203 ql_dbg(ql_dbg_disc, vha, 0x2054, 3204 "GID_PT allocations failed, fallback on GA_NXT.\n"); 3205 } else { 3206 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 3207 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 3208 swl = NULL; 3209 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 3210 swl = NULL; 3211 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 3212 swl = NULL; 3213 } else if (ql2xiidmaenable && 3214 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { 3215 qla2x00_gpsc(vha, swl); 3216 } 3217 3218 /* If other queries succeeded probe for FC-4 type */ 3219 if (swl) 3220 qla2x00_gff_id(vha, swl); 3221 } 3222 swl_idx = 0; 3223 3224 /* Allocate temporary fcport for any new fcports discovered. */ 3225 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3226 if (new_fcport == NULL) { 3227 ql_log(ql_log_warn, vha, 0x205e, 3228 "Failed to allocate memory for fcport.\n"); 3229 return (QLA_MEMORY_ALLOC_FAILED); 3230 } 3231 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3232 /* Set start port ID scan at adapter ID. */ 3233 first_dev = 1; 3234 last_dev = 0; 3235 3236 /* Starting free loop ID. */ 3237 loop_id = ha->min_external_loopid; 3238 for (; loop_id <= ha->max_loop_id; loop_id++) { 3239 if (qla2x00_is_reserved_id(vha, loop_id)) 3240 continue; 3241 3242 if (ha->current_topology == ISP_CFG_FL && 3243 (atomic_read(&vha->loop_down_timer) || 3244 LOOP_TRANSITION(vha))) { 3245 atomic_set(&vha->loop_down_timer, 0); 3246 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3247 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3248 break; 3249 } 3250 3251 if (swl != NULL) { 3252 if (last_dev) { 3253 wrap.b24 = new_fcport->d_id.b24; 3254 } else { 3255 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 3256 memcpy(new_fcport->node_name, 3257 swl[swl_idx].node_name, WWN_SIZE); 3258 memcpy(new_fcport->port_name, 3259 swl[swl_idx].port_name, WWN_SIZE); 3260 memcpy(new_fcport->fabric_port_name, 3261 swl[swl_idx].fabric_port_name, WWN_SIZE); 3262 new_fcport->fp_speed = swl[swl_idx].fp_speed; 3263 new_fcport->fc4_type = swl[swl_idx].fc4_type; 3264 3265 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 3266 last_dev = 1; 3267 } 3268 swl_idx++; 3269 } 3270 } else { 3271 /* Send GA_NXT to the switch */ 3272 rval = qla2x00_ga_nxt(vha, new_fcport); 3273 if (rval != QLA_SUCCESS) { 3274 ql_log(ql_log_warn, vha, 0x2064, 3275 "SNS scan failed -- assuming " 3276 "zero-entry result.\n"); 3277 list_for_each_entry_safe(fcport, fcptemp, 3278 new_fcports, list) { 3279 list_del(&fcport->list); 3280 kfree(fcport); 3281 } 3282 rval = QLA_SUCCESS; 3283 break; 3284 } 3285 } 3286 3287 /* If wrap on switch device list, exit. */ 3288 if (first_dev) { 3289 wrap.b24 = new_fcport->d_id.b24; 3290 first_dev = 0; 3291 } else if (new_fcport->d_id.b24 == wrap.b24) { 3292 ql_dbg(ql_dbg_disc, vha, 0x2065, 3293 "Device wrap (%02x%02x%02x).\n", 3294 new_fcport->d_id.b.domain, 3295 new_fcport->d_id.b.area, 3296 new_fcport->d_id.b.al_pa); 3297 break; 3298 } 3299 3300 /* Bypass if same physical adapter. */ 3301 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 3302 continue; 3303 3304 /* Bypass virtual ports of the same host. */ 3305 found = 0; 3306 if (ha->num_vhosts) { 3307 unsigned long flags; 3308 3309 spin_lock_irqsave(&ha->vport_slock, flags); 3310 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 3311 if (new_fcport->d_id.b24 == vp->d_id.b24) { 3312 found = 1; 3313 break; 3314 } 3315 } 3316 spin_unlock_irqrestore(&ha->vport_slock, flags); 3317 3318 if (found) 3319 continue; 3320 } 3321 3322 /* Bypass if same domain and area of adapter. */ 3323 if (((new_fcport->d_id.b24 & 0xffff00) == 3324 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 3325 ISP_CFG_FL) 3326 continue; 3327 3328 /* Bypass reserved domain fields. */ 3329 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 3330 continue; 3331 3332 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 3333 if (ql2xgffidenable && 3334 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 3335 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 3336 continue; 3337 3338 /* Locate matching device in database. */ 3339 found = 0; 3340 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3341 if (memcmp(new_fcport->port_name, fcport->port_name, 3342 WWN_SIZE)) 3343 continue; 3344 3345 fcport->scan_state = QLA_FCPORT_SCAN_FOUND; 3346 3347 found++; 3348 3349 /* Update port state. */ 3350 memcpy(fcport->fabric_port_name, 3351 new_fcport->fabric_port_name, WWN_SIZE); 3352 fcport->fp_speed = new_fcport->fp_speed; 3353 3354 /* 3355 * If address the same and state FCS_ONLINE, nothing 3356 * changed. 3357 */ 3358 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 3359 atomic_read(&fcport->state) == FCS_ONLINE) { 3360 break; 3361 } 3362 3363 /* 3364 * If device was not a fabric device before. 3365 */ 3366 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3367 fcport->d_id.b24 = new_fcport->d_id.b24; 3368 qla2x00_clear_loop_id(fcport); 3369 fcport->flags |= (FCF_FABRIC_DEVICE | 3370 FCF_LOGIN_NEEDED); 3371 break; 3372 } 3373 3374 /* 3375 * Port ID changed or device was marked to be updated; 3376 * Log it out if still logged in and mark it for 3377 * relogin later. 3378 */ 3379 fcport->d_id.b24 = new_fcport->d_id.b24; 3380 fcport->flags |= FCF_LOGIN_NEEDED; 3381 if (fcport->loop_id != FC_NO_LOOP_ID && 3382 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3383 (fcport->flags & FCF_ASYNC_SENT) == 0 && 3384 fcport->port_type != FCT_INITIATOR && 3385 fcport->port_type != FCT_BROADCAST) { 3386 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3387 fcport->d_id.b.domain, fcport->d_id.b.area, 3388 fcport->d_id.b.al_pa); 3389 qla2x00_clear_loop_id(fcport); 3390 } 3391 3392 break; 3393 } 3394 3395 if (found) 3396 continue; 3397 /* If device was not in our fcports list, then add it. */ 3398 list_add_tail(&new_fcport->list, new_fcports); 3399 3400 /* Allocate a new replacement fcport. */ 3401 nxt_d_id.b24 = new_fcport->d_id.b24; 3402 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3403 if (new_fcport == NULL) { 3404 ql_log(ql_log_warn, vha, 0x2066, 3405 "Memory allocation failed for fcport.\n"); 3406 return (QLA_MEMORY_ALLOC_FAILED); 3407 } 3408 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3409 new_fcport->d_id.b24 = nxt_d_id.b24; 3410 } 3411 3412 kfree(new_fcport); 3413 3414 return (rval); 3415 } 3416 3417 /* 3418 * qla2x00_find_new_loop_id 3419 * Scan through our port list and find a new usable loop ID. 3420 * 3421 * Input: 3422 * ha: adapter state pointer. 3423 * dev: port structure pointer. 3424 * 3425 * Returns: 3426 * qla2x00 local function return status code. 3427 * 3428 * Context: 3429 * Kernel context. 3430 */ 3431 int 3432 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 3433 { 3434 int rval; 3435 struct qla_hw_data *ha = vha->hw; 3436 unsigned long flags = 0; 3437 3438 rval = QLA_SUCCESS; 3439 3440 spin_lock_irqsave(&ha->vport_slock, flags); 3441 3442 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 3443 LOOPID_MAP_SIZE); 3444 if (dev->loop_id >= LOOPID_MAP_SIZE || 3445 qla2x00_is_reserved_id(vha, dev->loop_id)) { 3446 dev->loop_id = FC_NO_LOOP_ID; 3447 rval = QLA_FUNCTION_FAILED; 3448 } else 3449 set_bit(dev->loop_id, ha->loop_id_map); 3450 3451 spin_unlock_irqrestore(&ha->vport_slock, flags); 3452 3453 if (rval == QLA_SUCCESS) 3454 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 3455 "Assigning new loopid=%x, portid=%x.\n", 3456 dev->loop_id, dev->d_id.b24); 3457 else 3458 ql_log(ql_log_warn, dev->vha, 0x2087, 3459 "No loop_id's available, portid=%x.\n", 3460 dev->d_id.b24); 3461 3462 return (rval); 3463 } 3464 3465 /* 3466 * qla2x00_fabric_dev_login 3467 * Login fabric target device and update FC port database. 3468 * 3469 * Input: 3470 * ha: adapter state pointer. 3471 * fcport: port structure list pointer. 3472 * next_loopid: contains value of a new loop ID that can be used 3473 * by the next login attempt. 3474 * 3475 * Returns: 3476 * qla2x00 local function return status code. 3477 * 3478 * Context: 3479 * Kernel context. 3480 */ 3481 static int 3482 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3483 uint16_t *next_loopid) 3484 { 3485 int rval; 3486 int retry; 3487 uint8_t opts; 3488 struct qla_hw_data *ha = vha->hw; 3489 3490 rval = QLA_SUCCESS; 3491 retry = 0; 3492 3493 if (IS_ALOGIO_CAPABLE(ha)) { 3494 if (fcport->flags & FCF_ASYNC_SENT) 3495 return rval; 3496 fcport->flags |= FCF_ASYNC_SENT; 3497 rval = qla2x00_post_async_login_work(vha, fcport, NULL); 3498 if (!rval) 3499 return rval; 3500 } 3501 3502 fcport->flags &= ~FCF_ASYNC_SENT; 3503 rval = qla2x00_fabric_login(vha, fcport, next_loopid); 3504 if (rval == QLA_SUCCESS) { 3505 /* Send an ADISC to FCP2 devices.*/ 3506 opts = 0; 3507 if (fcport->flags & FCF_FCP2_DEVICE) 3508 opts |= BIT_1; 3509 rval = qla2x00_get_port_database(vha, fcport, opts); 3510 if (rval != QLA_SUCCESS) { 3511 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3512 fcport->d_id.b.domain, fcport->d_id.b.area, 3513 fcport->d_id.b.al_pa); 3514 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3515 } else { 3516 qla2x00_update_fcport(vha, fcport); 3517 } 3518 } else { 3519 /* Retry Login. */ 3520 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3521 } 3522 3523 return (rval); 3524 } 3525 3526 /* 3527 * qla2x00_fabric_login 3528 * Issue fabric login command. 3529 * 3530 * Input: 3531 * ha = adapter block pointer. 3532 * device = pointer to FC device type structure. 3533 * 3534 * Returns: 3535 * 0 - Login successfully 3536 * 1 - Login failed 3537 * 2 - Initiator device 3538 * 3 - Fatal error 3539 */ 3540 int 3541 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3542 uint16_t *next_loopid) 3543 { 3544 int rval; 3545 int retry; 3546 uint16_t tmp_loopid; 3547 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3548 struct qla_hw_data *ha = vha->hw; 3549 3550 retry = 0; 3551 tmp_loopid = 0; 3552 3553 for (;;) { 3554 ql_dbg(ql_dbg_disc, vha, 0x2000, 3555 "Trying Fabric Login w/loop id 0x%04x for port " 3556 "%02x%02x%02x.\n", 3557 fcport->loop_id, fcport->d_id.b.domain, 3558 fcport->d_id.b.area, fcport->d_id.b.al_pa); 3559 3560 /* Login fcport on switch. */ 3561 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 3562 fcport->d_id.b.domain, fcport->d_id.b.area, 3563 fcport->d_id.b.al_pa, mb, BIT_0); 3564 if (rval != QLA_SUCCESS) { 3565 return rval; 3566 } 3567 if (mb[0] == MBS_PORT_ID_USED) { 3568 /* 3569 * Device has another loop ID. The firmware team 3570 * recommends the driver perform an implicit login with 3571 * the specified ID again. The ID we just used is save 3572 * here so we return with an ID that can be tried by 3573 * the next login. 3574 */ 3575 retry++; 3576 tmp_loopid = fcport->loop_id; 3577 fcport->loop_id = mb[1]; 3578 3579 ql_dbg(ql_dbg_disc, vha, 0x2001, 3580 "Fabric Login: port in use - next loop " 3581 "id=0x%04x, port id= %02x%02x%02x.\n", 3582 fcport->loop_id, fcport->d_id.b.domain, 3583 fcport->d_id.b.area, fcport->d_id.b.al_pa); 3584 3585 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 3586 /* 3587 * Login succeeded. 3588 */ 3589 if (retry) { 3590 /* A retry occurred before. */ 3591 *next_loopid = tmp_loopid; 3592 } else { 3593 /* 3594 * No retry occurred before. Just increment the 3595 * ID value for next login. 3596 */ 3597 *next_loopid = (fcport->loop_id + 1); 3598 } 3599 3600 if (mb[1] & BIT_0) { 3601 fcport->port_type = FCT_INITIATOR; 3602 } else { 3603 fcport->port_type = FCT_TARGET; 3604 if (mb[1] & BIT_1) { 3605 fcport->flags |= FCF_FCP2_DEVICE; 3606 } 3607 } 3608 3609 if (mb[10] & BIT_0) 3610 fcport->supported_classes |= FC_COS_CLASS2; 3611 if (mb[10] & BIT_1) 3612 fcport->supported_classes |= FC_COS_CLASS3; 3613 3614 if (IS_FWI2_CAPABLE(ha)) { 3615 if (mb[10] & BIT_7) 3616 fcport->flags |= 3617 FCF_CONF_COMP_SUPPORTED; 3618 } 3619 3620 rval = QLA_SUCCESS; 3621 break; 3622 } else if (mb[0] == MBS_LOOP_ID_USED) { 3623 /* 3624 * Loop ID already used, try next loop ID. 3625 */ 3626 fcport->loop_id++; 3627 rval = qla2x00_find_new_loop_id(vha, fcport); 3628 if (rval != QLA_SUCCESS) { 3629 /* Ran out of loop IDs to use */ 3630 break; 3631 } 3632 } else if (mb[0] == MBS_COMMAND_ERROR) { 3633 /* 3634 * Firmware possibly timed out during login. If NO 3635 * retries are left to do then the device is declared 3636 * dead. 3637 */ 3638 *next_loopid = fcport->loop_id; 3639 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3640 fcport->d_id.b.domain, fcport->d_id.b.area, 3641 fcport->d_id.b.al_pa); 3642 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3643 3644 rval = 1; 3645 break; 3646 } else { 3647 /* 3648 * unrecoverable / not handled error 3649 */ 3650 ql_dbg(ql_dbg_disc, vha, 0x2002, 3651 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 3652 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 3653 fcport->d_id.b.area, fcport->d_id.b.al_pa, 3654 fcport->loop_id, jiffies); 3655 3656 *next_loopid = fcport->loop_id; 3657 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3658 fcport->d_id.b.domain, fcport->d_id.b.area, 3659 fcport->d_id.b.al_pa); 3660 qla2x00_clear_loop_id(fcport); 3661 fcport->login_retry = 0; 3662 3663 rval = 3; 3664 break; 3665 } 3666 } 3667 3668 return (rval); 3669 } 3670 3671 /* 3672 * qla2x00_local_device_login 3673 * Issue local device login command. 3674 * 3675 * Input: 3676 * ha = adapter block pointer. 3677 * loop_id = loop id of device to login to. 3678 * 3679 * Returns (Where's the #define!!!!): 3680 * 0 - Login successfully 3681 * 1 - Login failed 3682 * 3 - Fatal error 3683 */ 3684 int 3685 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 3686 { 3687 int rval; 3688 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3689 3690 memset(mb, 0, sizeof(mb)); 3691 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 3692 if (rval == QLA_SUCCESS) { 3693 /* Interrogate mailbox registers for any errors */ 3694 if (mb[0] == MBS_COMMAND_ERROR) 3695 rval = 1; 3696 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 3697 /* device not in PCB table */ 3698 rval = 3; 3699 } 3700 3701 return (rval); 3702 } 3703 3704 /* 3705 * qla2x00_loop_resync 3706 * Resync with fibre channel devices. 3707 * 3708 * Input: 3709 * ha = adapter block pointer. 3710 * 3711 * Returns: 3712 * 0 = success 3713 */ 3714 int 3715 qla2x00_loop_resync(scsi_qla_host_t *vha) 3716 { 3717 int rval = QLA_SUCCESS; 3718 uint32_t wait_time; 3719 struct req_que *req; 3720 struct rsp_que *rsp; 3721 3722 if (vha->hw->flags.cpu_affinity_enabled) 3723 req = vha->hw->req_q_map[0]; 3724 else 3725 req = vha->req; 3726 rsp = req->rsp; 3727 3728 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 3729 if (vha->flags.online) { 3730 if (!(rval = qla2x00_fw_ready(vha))) { 3731 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 3732 wait_time = 256; 3733 do { 3734 /* Issue a marker after FW becomes ready. */ 3735 qla2x00_marker(vha, req, rsp, 0, 0, 3736 MK_SYNC_ALL); 3737 vha->marker_needed = 0; 3738 3739 /* Remap devices on Loop. */ 3740 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3741 3742 qla2x00_configure_loop(vha); 3743 wait_time--; 3744 } while (!atomic_read(&vha->loop_down_timer) && 3745 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 3746 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 3747 &vha->dpc_flags))); 3748 } 3749 } 3750 3751 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 3752 return (QLA_FUNCTION_FAILED); 3753 3754 if (rval) 3755 ql_dbg(ql_dbg_disc, vha, 0x206c, 3756 "%s *** FAILED ***.\n", __func__); 3757 3758 return (rval); 3759 } 3760 3761 /* 3762 * qla2x00_perform_loop_resync 3763 * Description: This function will set the appropriate flags and call 3764 * qla2x00_loop_resync. If successful loop will be resynced 3765 * Arguments : scsi_qla_host_t pointer 3766 * returm : Success or Failure 3767 */ 3768 3769 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 3770 { 3771 int32_t rval = 0; 3772 3773 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 3774 /*Configure the flags so that resync happens properly*/ 3775 atomic_set(&ha->loop_down_timer, 0); 3776 if (!(ha->device_flags & DFLG_NO_CABLE)) { 3777 atomic_set(&ha->loop_state, LOOP_UP); 3778 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 3779 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 3780 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 3781 3782 rval = qla2x00_loop_resync(ha); 3783 } else 3784 atomic_set(&ha->loop_state, LOOP_DEAD); 3785 3786 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 3787 } 3788 3789 return rval; 3790 } 3791 3792 void 3793 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 3794 { 3795 fc_port_t *fcport; 3796 struct scsi_qla_host *vha; 3797 struct qla_hw_data *ha = base_vha->hw; 3798 unsigned long flags; 3799 3800 spin_lock_irqsave(&ha->vport_slock, flags); 3801 /* Go with deferred removal of rport references. */ 3802 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 3803 atomic_inc(&vha->vref_count); 3804 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3805 if (fcport->drport && 3806 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 3807 spin_unlock_irqrestore(&ha->vport_slock, flags); 3808 3809 qla2x00_rport_del(fcport); 3810 3811 spin_lock_irqsave(&ha->vport_slock, flags); 3812 } 3813 } 3814 atomic_dec(&vha->vref_count); 3815 } 3816 spin_unlock_irqrestore(&ha->vport_slock, flags); 3817 } 3818 3819 /* Assumes idc_lock always held on entry */ 3820 void 3821 qla83xx_reset_ownership(scsi_qla_host_t *vha) 3822 { 3823 struct qla_hw_data *ha = vha->hw; 3824 uint32_t drv_presence, drv_presence_mask; 3825 uint32_t dev_part_info1, dev_part_info2, class_type; 3826 uint32_t class_type_mask = 0x3; 3827 uint16_t fcoe_other_function = 0xffff, i; 3828 3829 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 3830 3831 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 3832 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 3833 for (i = 0; i < 8; i++) { 3834 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 3835 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 3836 (i != ha->portnum)) { 3837 fcoe_other_function = i; 3838 break; 3839 } 3840 } 3841 if (fcoe_other_function == 0xffff) { 3842 for (i = 0; i < 8; i++) { 3843 class_type = ((dev_part_info2 >> (i * 4)) & 3844 class_type_mask); 3845 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 3846 ((i + 8) != ha->portnum)) { 3847 fcoe_other_function = i + 8; 3848 break; 3849 } 3850 } 3851 } 3852 /* 3853 * Prepare drv-presence mask based on fcoe functions present. 3854 * However consider only valid physical fcoe function numbers (0-15). 3855 */ 3856 drv_presence_mask = ~((1 << (ha->portnum)) | 3857 ((fcoe_other_function == 0xffff) ? 3858 0 : (1 << (fcoe_other_function)))); 3859 3860 /* We are the reset owner iff: 3861 * - No other protocol drivers present. 3862 * - This is the lowest among fcoe functions. */ 3863 if (!(drv_presence & drv_presence_mask) && 3864 (ha->portnum < fcoe_other_function)) { 3865 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 3866 "This host is Reset owner.\n"); 3867 ha->flags.nic_core_reset_owner = 1; 3868 } 3869 } 3870 3871 int 3872 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 3873 { 3874 int rval = QLA_SUCCESS; 3875 struct qla_hw_data *ha = vha->hw; 3876 uint32_t drv_ack; 3877 3878 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 3879 if (rval == QLA_SUCCESS) { 3880 drv_ack |= (1 << ha->portnum); 3881 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 3882 } 3883 3884 return rval; 3885 } 3886 3887 int 3888 qla83xx_set_drv_ack(scsi_qla_host_t *vha) 3889 { 3890 int rval = QLA_SUCCESS; 3891 3892 qla83xx_idc_lock(vha, 0); 3893 rval = __qla83xx_set_drv_ack(vha); 3894 qla83xx_idc_unlock(vha, 0); 3895 3896 return rval; 3897 } 3898 3899 int 3900 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 3901 { 3902 int rval = QLA_SUCCESS; 3903 struct qla_hw_data *ha = vha->hw; 3904 uint32_t drv_ack; 3905 3906 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 3907 if (rval == QLA_SUCCESS) { 3908 drv_ack &= ~(1 << ha->portnum); 3909 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 3910 } 3911 3912 return rval; 3913 } 3914 3915 int 3916 qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 3917 { 3918 int rval = QLA_SUCCESS; 3919 3920 qla83xx_idc_lock(vha, 0); 3921 rval = __qla83xx_clear_drv_ack(vha); 3922 qla83xx_idc_unlock(vha, 0); 3923 3924 return rval; 3925 } 3926 3927 const char * 3928 qla83xx_dev_state_to_string(uint32_t dev_state) 3929 { 3930 switch (dev_state) { 3931 case QLA8XXX_DEV_COLD: 3932 return "COLD/RE-INIT"; 3933 case QLA8XXX_DEV_INITIALIZING: 3934 return "INITIALIZING"; 3935 case QLA8XXX_DEV_READY: 3936 return "READY"; 3937 case QLA8XXX_DEV_NEED_RESET: 3938 return "NEED RESET"; 3939 case QLA8XXX_DEV_NEED_QUIESCENT: 3940 return "NEED QUIESCENT"; 3941 case QLA8XXX_DEV_FAILED: 3942 return "FAILED"; 3943 case QLA8XXX_DEV_QUIESCENT: 3944 return "QUIESCENT"; 3945 default: 3946 return "Unknown"; 3947 } 3948 } 3949 3950 /* Assumes idc-lock always held on entry */ 3951 void 3952 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 3953 { 3954 struct qla_hw_data *ha = vha->hw; 3955 uint32_t idc_audit_reg = 0, duration_secs = 0; 3956 3957 switch (audit_type) { 3958 case IDC_AUDIT_TIMESTAMP: 3959 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 3960 idc_audit_reg = (ha->portnum) | 3961 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 3962 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 3963 break; 3964 3965 case IDC_AUDIT_COMPLETION: 3966 duration_secs = ((jiffies_to_msecs(jiffies) - 3967 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 3968 idc_audit_reg = (ha->portnum) | 3969 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 3970 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 3971 break; 3972 3973 default: 3974 ql_log(ql_log_warn, vha, 0xb078, 3975 "Invalid audit type specified.\n"); 3976 break; 3977 } 3978 } 3979 3980 /* Assumes idc_lock always held on entry */ 3981 int 3982 qla83xx_initiating_reset(scsi_qla_host_t *vha) 3983 { 3984 struct qla_hw_data *ha = vha->hw; 3985 uint32_t idc_control, dev_state; 3986 3987 __qla83xx_get_idc_control(vha, &idc_control); 3988 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 3989 ql_log(ql_log_info, vha, 0xb080, 3990 "NIC Core reset has been disabled. idc-control=0x%x\n", 3991 idc_control); 3992 return QLA_FUNCTION_FAILED; 3993 } 3994 3995 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 3996 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 3997 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 3998 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 3999 QLA8XXX_DEV_NEED_RESET); 4000 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 4001 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 4002 } else { 4003 const char *state = qla83xx_dev_state_to_string(dev_state); 4004 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 4005 4006 /* SV: XXX: Is timeout required here? */ 4007 /* Wait for IDC state change READY -> NEED_RESET */ 4008 while (dev_state == QLA8XXX_DEV_READY) { 4009 qla83xx_idc_unlock(vha, 0); 4010 msleep(200); 4011 qla83xx_idc_lock(vha, 0); 4012 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 4013 } 4014 } 4015 4016 /* Send IDC ack by writing to drv-ack register */ 4017 __qla83xx_set_drv_ack(vha); 4018 4019 return QLA_SUCCESS; 4020 } 4021 4022 int 4023 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 4024 { 4025 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 4026 } 4027 4028 int 4029 qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 4030 { 4031 int rval = QLA_SUCCESS; 4032 4033 qla83xx_idc_lock(vha, 0); 4034 rval = __qla83xx_set_idc_control(vha, idc_control); 4035 qla83xx_idc_unlock(vha, 0); 4036 4037 return rval; 4038 } 4039 4040 int 4041 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 4042 { 4043 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 4044 } 4045 4046 int 4047 qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 4048 { 4049 int rval = QLA_SUCCESS; 4050 4051 qla83xx_idc_lock(vha, 0); 4052 rval = __qla83xx_get_idc_control(vha, idc_control); 4053 qla83xx_idc_unlock(vha, 0); 4054 4055 return rval; 4056 } 4057 4058 int 4059 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 4060 { 4061 uint32_t drv_presence = 0; 4062 struct qla_hw_data *ha = vha->hw; 4063 4064 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 4065 if (drv_presence & (1 << ha->portnum)) 4066 return QLA_SUCCESS; 4067 else 4068 return QLA_TEST_FAILED; 4069 } 4070 4071 int 4072 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 4073 { 4074 int rval = QLA_SUCCESS; 4075 struct qla_hw_data *ha = vha->hw; 4076 4077 ql_dbg(ql_dbg_p3p, vha, 0xb058, 4078 "Entered %s().\n", __func__); 4079 4080 if (vha->device_flags & DFLG_DEV_FAILED) { 4081 ql_log(ql_log_warn, vha, 0xb059, 4082 "Device in unrecoverable FAILED state.\n"); 4083 return QLA_FUNCTION_FAILED; 4084 } 4085 4086 qla83xx_idc_lock(vha, 0); 4087 4088 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 4089 ql_log(ql_log_warn, vha, 0xb05a, 4090 "Function=0x%x has been removed from IDC participation.\n", 4091 ha->portnum); 4092 rval = QLA_FUNCTION_FAILED; 4093 goto exit; 4094 } 4095 4096 qla83xx_reset_ownership(vha); 4097 4098 rval = qla83xx_initiating_reset(vha); 4099 4100 /* 4101 * Perform reset if we are the reset-owner, 4102 * else wait till IDC state changes to READY/FAILED. 4103 */ 4104 if (rval == QLA_SUCCESS) { 4105 rval = qla83xx_idc_state_handler(vha); 4106 4107 if (rval == QLA_SUCCESS) 4108 ha->flags.nic_core_hung = 0; 4109 __qla83xx_clear_drv_ack(vha); 4110 } 4111 4112 exit: 4113 qla83xx_idc_unlock(vha, 0); 4114 4115 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 4116 4117 return rval; 4118 } 4119 4120 int 4121 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 4122 { 4123 struct qla_hw_data *ha = vha->hw; 4124 int rval = QLA_FUNCTION_FAILED; 4125 4126 if (!IS_MCTP_CAPABLE(ha)) { 4127 /* This message can be removed from the final version */ 4128 ql_log(ql_log_info, vha, 0x506d, 4129 "This board is not MCTP capable\n"); 4130 return rval; 4131 } 4132 4133 if (!ha->mctp_dump) { 4134 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 4135 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 4136 4137 if (!ha->mctp_dump) { 4138 ql_log(ql_log_warn, vha, 0x506e, 4139 "Failed to allocate memory for mctp dump\n"); 4140 return rval; 4141 } 4142 } 4143 4144 #define MCTP_DUMP_STR_ADDR 0x00000000 4145 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 4146 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 4147 if (rval != QLA_SUCCESS) { 4148 ql_log(ql_log_warn, vha, 0x506f, 4149 "Failed to capture mctp dump\n"); 4150 } else { 4151 ql_log(ql_log_info, vha, 0x5070, 4152 "Mctp dump capture for host (%ld/%p).\n", 4153 vha->host_no, ha->mctp_dump); 4154 ha->mctp_dumped = 1; 4155 } 4156 4157 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 4158 ha->flags.nic_core_reset_hdlr_active = 1; 4159 rval = qla83xx_restart_nic_firmware(vha); 4160 if (rval) 4161 /* NIC Core reset failed. */ 4162 ql_log(ql_log_warn, vha, 0x5071, 4163 "Failed to restart nic firmware\n"); 4164 else 4165 ql_dbg(ql_dbg_p3p, vha, 0xb084, 4166 "Restarted NIC firmware successfully.\n"); 4167 ha->flags.nic_core_reset_hdlr_active = 0; 4168 } 4169 4170 return rval; 4171 4172 } 4173 4174 /* 4175 * qla2x00_quiesce_io 4176 * Description: This function will block the new I/Os 4177 * Its not aborting any I/Os as context 4178 * is not destroyed during quiescence 4179 * Arguments: scsi_qla_host_t 4180 * return : void 4181 */ 4182 void 4183 qla2x00_quiesce_io(scsi_qla_host_t *vha) 4184 { 4185 struct qla_hw_data *ha = vha->hw; 4186 struct scsi_qla_host *vp; 4187 4188 ql_dbg(ql_dbg_dpc, vha, 0x401d, 4189 "Quiescing I/O - ha=%p.\n", ha); 4190 4191 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 4192 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 4193 atomic_set(&vha->loop_state, LOOP_DOWN); 4194 qla2x00_mark_all_devices_lost(vha, 0); 4195 list_for_each_entry(vp, &ha->vp_list, list) 4196 qla2x00_mark_all_devices_lost(vp, 0); 4197 } else { 4198 if (!atomic_read(&vha->loop_down_timer)) 4199 atomic_set(&vha->loop_down_timer, 4200 LOOP_DOWN_TIME); 4201 } 4202 /* Wait for pending cmds to complete */ 4203 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 4204 } 4205 4206 void 4207 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 4208 { 4209 struct qla_hw_data *ha = vha->hw; 4210 struct scsi_qla_host *vp; 4211 unsigned long flags; 4212 fc_port_t *fcport; 4213 4214 /* For ISP82XX, driver waits for completion of the commands. 4215 * online flag should be set. 4216 */ 4217 if (!IS_QLA82XX(ha)) 4218 vha->flags.online = 0; 4219 ha->flags.chip_reset_done = 0; 4220 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4221 vha->qla_stats.total_isp_aborts++; 4222 4223 ql_log(ql_log_info, vha, 0x00af, 4224 "Performing ISP error recovery - ha=%p.\n", ha); 4225 4226 /* For ISP82XX, reset_chip is just disabling interrupts. 4227 * Driver waits for the completion of the commands. 4228 * the interrupts need to be enabled. 4229 */ 4230 if (!IS_QLA82XX(ha)) 4231 ha->isp_ops->reset_chip(vha); 4232 4233 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 4234 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 4235 atomic_set(&vha->loop_state, LOOP_DOWN); 4236 qla2x00_mark_all_devices_lost(vha, 0); 4237 4238 spin_lock_irqsave(&ha->vport_slock, flags); 4239 list_for_each_entry(vp, &ha->vp_list, list) { 4240 atomic_inc(&vp->vref_count); 4241 spin_unlock_irqrestore(&ha->vport_slock, flags); 4242 4243 qla2x00_mark_all_devices_lost(vp, 0); 4244 4245 spin_lock_irqsave(&ha->vport_slock, flags); 4246 atomic_dec(&vp->vref_count); 4247 } 4248 spin_unlock_irqrestore(&ha->vport_slock, flags); 4249 } else { 4250 if (!atomic_read(&vha->loop_down_timer)) 4251 atomic_set(&vha->loop_down_timer, 4252 LOOP_DOWN_TIME); 4253 } 4254 4255 /* Clear all async request states across all VPs. */ 4256 list_for_each_entry(fcport, &vha->vp_fcports, list) 4257 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4258 spin_lock_irqsave(&ha->vport_slock, flags); 4259 list_for_each_entry(vp, &ha->vp_list, list) { 4260 atomic_inc(&vp->vref_count); 4261 spin_unlock_irqrestore(&ha->vport_slock, flags); 4262 4263 list_for_each_entry(fcport, &vp->vp_fcports, list) 4264 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4265 4266 spin_lock_irqsave(&ha->vport_slock, flags); 4267 atomic_dec(&vp->vref_count); 4268 } 4269 spin_unlock_irqrestore(&ha->vport_slock, flags); 4270 4271 if (!ha->flags.eeh_busy) { 4272 /* Make sure for ISP 82XX IO DMA is complete */ 4273 if (IS_QLA82XX(ha)) { 4274 qla82xx_chip_reset_cleanup(vha); 4275 ql_log(ql_log_info, vha, 0x00b4, 4276 "Done chip reset cleanup.\n"); 4277 4278 /* Done waiting for pending commands. 4279 * Reset the online flag. 4280 */ 4281 vha->flags.online = 0; 4282 } 4283 4284 /* Requeue all commands in outstanding command list. */ 4285 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 4286 } 4287 } 4288 4289 /* 4290 * qla2x00_abort_isp 4291 * Resets ISP and aborts all outstanding commands. 4292 * 4293 * Input: 4294 * ha = adapter block pointer. 4295 * 4296 * Returns: 4297 * 0 = success 4298 */ 4299 int 4300 qla2x00_abort_isp(scsi_qla_host_t *vha) 4301 { 4302 int rval; 4303 uint8_t status = 0; 4304 struct qla_hw_data *ha = vha->hw; 4305 struct scsi_qla_host *vp; 4306 struct req_que *req = ha->req_q_map[0]; 4307 unsigned long flags; 4308 4309 if (vha->flags.online) { 4310 qla2x00_abort_isp_cleanup(vha); 4311 4312 if (IS_QLA8031(ha)) { 4313 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 4314 "Clearing fcoe driver presence.\n"); 4315 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 4316 ql_dbg(ql_dbg_p3p, vha, 0xb073, 4317 "Error while clearing DRV-Presence.\n"); 4318 } 4319 4320 if (unlikely(pci_channel_offline(ha->pdev) && 4321 ha->flags.pci_channel_io_perm_failure)) { 4322 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4323 status = 0; 4324 return status; 4325 } 4326 4327 ha->isp_ops->get_flash_version(vha, req->ring); 4328 4329 ha->isp_ops->nvram_config(vha); 4330 4331 if (!qla2x00_restart_isp(vha)) { 4332 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4333 4334 if (!atomic_read(&vha->loop_down_timer)) { 4335 /* 4336 * Issue marker command only when we are going 4337 * to start the I/O . 4338 */ 4339 vha->marker_needed = 1; 4340 } 4341 4342 vha->flags.online = 1; 4343 4344 ha->isp_ops->enable_intrs(ha); 4345 4346 ha->isp_abort_cnt = 0; 4347 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4348 4349 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 4350 qla2x00_get_fw_version(vha); 4351 if (ha->fce) { 4352 ha->flags.fce_enabled = 1; 4353 memset(ha->fce, 0, 4354 fce_calc_size(ha->fce_bufs)); 4355 rval = qla2x00_enable_fce_trace(vha, 4356 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 4357 &ha->fce_bufs); 4358 if (rval) { 4359 ql_log(ql_log_warn, vha, 0x8033, 4360 "Unable to reinitialize FCE " 4361 "(%d).\n", rval); 4362 ha->flags.fce_enabled = 0; 4363 } 4364 } 4365 4366 if (ha->eft) { 4367 memset(ha->eft, 0, EFT_SIZE); 4368 rval = qla2x00_enable_eft_trace(vha, 4369 ha->eft_dma, EFT_NUM_BUFFERS); 4370 if (rval) { 4371 ql_log(ql_log_warn, vha, 0x8034, 4372 "Unable to reinitialize EFT " 4373 "(%d).\n", rval); 4374 } 4375 } 4376 } else { /* failed the ISP abort */ 4377 vha->flags.online = 1; 4378 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 4379 if (ha->isp_abort_cnt == 0) { 4380 ql_log(ql_log_fatal, vha, 0x8035, 4381 "ISP error recover failed - " 4382 "board disabled.\n"); 4383 /* 4384 * The next call disables the board 4385 * completely. 4386 */ 4387 ha->isp_ops->reset_adapter(vha); 4388 vha->flags.online = 0; 4389 clear_bit(ISP_ABORT_RETRY, 4390 &vha->dpc_flags); 4391 status = 0; 4392 } else { /* schedule another ISP abort */ 4393 ha->isp_abort_cnt--; 4394 ql_dbg(ql_dbg_taskm, vha, 0x8020, 4395 "ISP abort - retry remaining %d.\n", 4396 ha->isp_abort_cnt); 4397 status = 1; 4398 } 4399 } else { 4400 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 4401 ql_dbg(ql_dbg_taskm, vha, 0x8021, 4402 "ISP error recovery - retrying (%d) " 4403 "more times.\n", ha->isp_abort_cnt); 4404 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4405 status = 1; 4406 } 4407 } 4408 4409 } 4410 4411 if (!status) { 4412 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 4413 4414 spin_lock_irqsave(&ha->vport_slock, flags); 4415 list_for_each_entry(vp, &ha->vp_list, list) { 4416 if (vp->vp_idx) { 4417 atomic_inc(&vp->vref_count); 4418 spin_unlock_irqrestore(&ha->vport_slock, flags); 4419 4420 qla2x00_vp_abort_isp(vp); 4421 4422 spin_lock_irqsave(&ha->vport_slock, flags); 4423 atomic_dec(&vp->vref_count); 4424 } 4425 } 4426 spin_unlock_irqrestore(&ha->vport_slock, flags); 4427 4428 if (IS_QLA8031(ha)) { 4429 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 4430 "Setting back fcoe driver presence.\n"); 4431 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 4432 ql_dbg(ql_dbg_p3p, vha, 0xb074, 4433 "Error while setting DRV-Presence.\n"); 4434 } 4435 } else { 4436 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 4437 __func__); 4438 } 4439 4440 return(status); 4441 } 4442 4443 /* 4444 * qla2x00_restart_isp 4445 * restarts the ISP after a reset 4446 * 4447 * Input: 4448 * ha = adapter block pointer. 4449 * 4450 * Returns: 4451 * 0 = success 4452 */ 4453 static int 4454 qla2x00_restart_isp(scsi_qla_host_t *vha) 4455 { 4456 int status = 0; 4457 uint32_t wait_time; 4458 struct qla_hw_data *ha = vha->hw; 4459 struct req_que *req = ha->req_q_map[0]; 4460 struct rsp_que *rsp = ha->rsp_q_map[0]; 4461 unsigned long flags; 4462 4463 /* If firmware needs to be loaded */ 4464 if (qla2x00_isp_firmware(vha)) { 4465 vha->flags.online = 0; 4466 status = ha->isp_ops->chip_diag(vha); 4467 if (!status) 4468 status = qla2x00_setup_chip(vha); 4469 } 4470 4471 if (!status && !(status = qla2x00_init_rings(vha))) { 4472 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4473 ha->flags.chip_reset_done = 1; 4474 /* Initialize the queues in use */ 4475 qla25xx_init_queues(ha); 4476 4477 status = qla2x00_fw_ready(vha); 4478 if (!status) { 4479 ql_dbg(ql_dbg_taskm, vha, 0x8031, 4480 "Start configure loop status = %d.\n", status); 4481 4482 /* Issue a marker after FW becomes ready. */ 4483 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 4484 4485 vha->flags.online = 1; 4486 4487 /* 4488 * Process any ATIO queue entries that came in 4489 * while we weren't online. 4490 */ 4491 spin_lock_irqsave(&ha->hardware_lock, flags); 4492 if (qla_tgt_mode_enabled(vha)) 4493 qlt_24xx_process_atio_queue(vha); 4494 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4495 4496 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 4497 wait_time = 256; 4498 do { 4499 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4500 qla2x00_configure_loop(vha); 4501 wait_time--; 4502 } while (!atomic_read(&vha->loop_down_timer) && 4503 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4504 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 4505 &vha->dpc_flags))); 4506 } 4507 4508 /* if no cable then assume it's good */ 4509 if ((vha->device_flags & DFLG_NO_CABLE)) 4510 status = 0; 4511 4512 ql_dbg(ql_dbg_taskm, vha, 0x8032, 4513 "Configure loop done, status = 0x%x.\n", status); 4514 } 4515 return (status); 4516 } 4517 4518 static int 4519 qla25xx_init_queues(struct qla_hw_data *ha) 4520 { 4521 struct rsp_que *rsp = NULL; 4522 struct req_que *req = NULL; 4523 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 4524 int ret = -1; 4525 int i; 4526 4527 for (i = 1; i < ha->max_rsp_queues; i++) { 4528 rsp = ha->rsp_q_map[i]; 4529 if (rsp) { 4530 rsp->options &= ~BIT_0; 4531 ret = qla25xx_init_rsp_que(base_vha, rsp); 4532 if (ret != QLA_SUCCESS) 4533 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 4534 "%s Rsp que: %d init failed.\n", 4535 __func__, rsp->id); 4536 else 4537 ql_dbg(ql_dbg_init, base_vha, 0x0100, 4538 "%s Rsp que: %d inited.\n", 4539 __func__, rsp->id); 4540 } 4541 } 4542 for (i = 1; i < ha->max_req_queues; i++) { 4543 req = ha->req_q_map[i]; 4544 if (req) { 4545 /* Clear outstanding commands array. */ 4546 req->options &= ~BIT_0; 4547 ret = qla25xx_init_req_que(base_vha, req); 4548 if (ret != QLA_SUCCESS) 4549 ql_dbg(ql_dbg_init, base_vha, 0x0101, 4550 "%s Req que: %d init failed.\n", 4551 __func__, req->id); 4552 else 4553 ql_dbg(ql_dbg_init, base_vha, 0x0102, 4554 "%s Req que: %d inited.\n", 4555 __func__, req->id); 4556 } 4557 } 4558 return ret; 4559 } 4560 4561 /* 4562 * qla2x00_reset_adapter 4563 * Reset adapter. 4564 * 4565 * Input: 4566 * ha = adapter block pointer. 4567 */ 4568 void 4569 qla2x00_reset_adapter(scsi_qla_host_t *vha) 4570 { 4571 unsigned long flags = 0; 4572 struct qla_hw_data *ha = vha->hw; 4573 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4574 4575 vha->flags.online = 0; 4576 ha->isp_ops->disable_intrs(ha); 4577 4578 spin_lock_irqsave(&ha->hardware_lock, flags); 4579 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 4580 RD_REG_WORD(®->hccr); /* PCI Posting. */ 4581 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 4582 RD_REG_WORD(®->hccr); /* PCI Posting. */ 4583 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4584 } 4585 4586 void 4587 qla24xx_reset_adapter(scsi_qla_host_t *vha) 4588 { 4589 unsigned long flags = 0; 4590 struct qla_hw_data *ha = vha->hw; 4591 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 4592 4593 if (IS_QLA82XX(ha)) 4594 return; 4595 4596 vha->flags.online = 0; 4597 ha->isp_ops->disable_intrs(ha); 4598 4599 spin_lock_irqsave(&ha->hardware_lock, flags); 4600 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 4601 RD_REG_DWORD(®->hccr); 4602 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 4603 RD_REG_DWORD(®->hccr); 4604 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4605 4606 if (IS_NOPOLLING_TYPE(ha)) 4607 ha->isp_ops->enable_intrs(ha); 4608 } 4609 4610 /* On sparc systems, obtain port and node WWN from firmware 4611 * properties. 4612 */ 4613 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 4614 struct nvram_24xx *nv) 4615 { 4616 #ifdef CONFIG_SPARC 4617 struct qla_hw_data *ha = vha->hw; 4618 struct pci_dev *pdev = ha->pdev; 4619 struct device_node *dp = pci_device_to_OF_node(pdev); 4620 const u8 *val; 4621 int len; 4622 4623 val = of_get_property(dp, "port-wwn", &len); 4624 if (val && len >= WWN_SIZE) 4625 memcpy(nv->port_name, val, WWN_SIZE); 4626 4627 val = of_get_property(dp, "node-wwn", &len); 4628 if (val && len >= WWN_SIZE) 4629 memcpy(nv->node_name, val, WWN_SIZE); 4630 #endif 4631 } 4632 4633 int 4634 qla24xx_nvram_config(scsi_qla_host_t *vha) 4635 { 4636 int rval; 4637 struct init_cb_24xx *icb; 4638 struct nvram_24xx *nv; 4639 uint32_t *dptr; 4640 uint8_t *dptr1, *dptr2; 4641 uint32_t chksum; 4642 uint16_t cnt; 4643 struct qla_hw_data *ha = vha->hw; 4644 4645 rval = QLA_SUCCESS; 4646 icb = (struct init_cb_24xx *)ha->init_cb; 4647 nv = ha->nvram; 4648 4649 /* Determine NVRAM starting address. */ 4650 if (ha->flags.port0) { 4651 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 4652 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 4653 } else { 4654 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 4655 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 4656 } 4657 ha->nvram_size = sizeof(struct nvram_24xx); 4658 ha->vpd_size = FA_NVRAM_VPD_SIZE; 4659 if (IS_QLA82XX(ha)) 4660 ha->vpd_size = FA_VPD_SIZE_82XX; 4661 4662 /* Get VPD data into cache */ 4663 ha->vpd = ha->nvram + VPD_OFFSET; 4664 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 4665 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 4666 4667 /* Get NVRAM data into cache and calculate checksum. */ 4668 dptr = (uint32_t *)nv; 4669 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 4670 ha->nvram_size); 4671 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 4672 chksum += le32_to_cpu(*dptr++); 4673 4674 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 4675 "Contents of NVRAM\n"); 4676 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 4677 (uint8_t *)nv, ha->nvram_size); 4678 4679 /* Bad NVRAM data, set defaults parameters. */ 4680 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 4681 || nv->id[3] != ' ' || 4682 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 4683 /* Reset NVRAM data. */ 4684 ql_log(ql_log_warn, vha, 0x006b, 4685 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 4686 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 4687 ql_log(ql_log_warn, vha, 0x006c, 4688 "Falling back to functioning (yet invalid -- WWPN) " 4689 "defaults.\n"); 4690 4691 /* 4692 * Set default initialization control block. 4693 */ 4694 memset(nv, 0, ha->nvram_size); 4695 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 4696 nv->version = __constant_cpu_to_le16(ICB_VERSION); 4697 nv->frame_payload_size = __constant_cpu_to_le16(2048); 4698 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 4699 nv->exchange_count = __constant_cpu_to_le16(0); 4700 nv->hard_address = __constant_cpu_to_le16(124); 4701 nv->port_name[0] = 0x21; 4702 nv->port_name[1] = 0x00 + ha->port_no; 4703 nv->port_name[2] = 0x00; 4704 nv->port_name[3] = 0xe0; 4705 nv->port_name[4] = 0x8b; 4706 nv->port_name[5] = 0x1c; 4707 nv->port_name[6] = 0x55; 4708 nv->port_name[7] = 0x86; 4709 nv->node_name[0] = 0x20; 4710 nv->node_name[1] = 0x00; 4711 nv->node_name[2] = 0x00; 4712 nv->node_name[3] = 0xe0; 4713 nv->node_name[4] = 0x8b; 4714 nv->node_name[5] = 0x1c; 4715 nv->node_name[6] = 0x55; 4716 nv->node_name[7] = 0x86; 4717 qla24xx_nvram_wwn_from_ofw(vha, nv); 4718 nv->login_retry_count = __constant_cpu_to_le16(8); 4719 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 4720 nv->login_timeout = __constant_cpu_to_le16(0); 4721 nv->firmware_options_1 = 4722 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 4723 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 4724 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 4725 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 4726 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 4727 nv->efi_parameters = __constant_cpu_to_le32(0); 4728 nv->reset_delay = 5; 4729 nv->max_luns_per_target = __constant_cpu_to_le16(128); 4730 nv->port_down_retry_count = __constant_cpu_to_le16(30); 4731 nv->link_down_timeout = __constant_cpu_to_le16(30); 4732 4733 rval = 1; 4734 } 4735 4736 if (!qla_ini_mode_enabled(vha)) { 4737 /* Don't enable full login after initial LIP */ 4738 nv->firmware_options_1 &= __constant_cpu_to_le32(~BIT_13); 4739 /* Don't enable LIP full login for initiator */ 4740 nv->host_p &= __constant_cpu_to_le32(~BIT_10); 4741 } 4742 4743 qlt_24xx_config_nvram_stage1(vha, nv); 4744 4745 /* Reset Initialization control block */ 4746 memset(icb, 0, ha->init_cb_size); 4747 4748 /* Copy 1st segment. */ 4749 dptr1 = (uint8_t *)icb; 4750 dptr2 = (uint8_t *)&nv->version; 4751 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 4752 while (cnt--) 4753 *dptr1++ = *dptr2++; 4754 4755 icb->login_retry_count = nv->login_retry_count; 4756 icb->link_down_on_nos = nv->link_down_on_nos; 4757 4758 /* Copy 2nd segment. */ 4759 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 4760 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 4761 cnt = (uint8_t *)&icb->reserved_3 - 4762 (uint8_t *)&icb->interrupt_delay_timer; 4763 while (cnt--) 4764 *dptr1++ = *dptr2++; 4765 4766 /* 4767 * Setup driver NVRAM options. 4768 */ 4769 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 4770 "QLA2462"); 4771 4772 qlt_24xx_config_nvram_stage2(vha, icb); 4773 4774 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 4775 /* Use alternate WWN? */ 4776 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4777 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4778 } 4779 4780 /* Prepare nodename */ 4781 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 4782 /* 4783 * Firmware will apply the following mask if the nodename was 4784 * not provided. 4785 */ 4786 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4787 icb->node_name[0] &= 0xF0; 4788 } 4789 4790 /* Set host adapter parameters. */ 4791 ha->flags.disable_risc_code_load = 0; 4792 ha->flags.enable_lip_reset = 0; 4793 ha->flags.enable_lip_full_login = 4794 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 4795 ha->flags.enable_target_reset = 4796 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 4797 ha->flags.enable_led_scheme = 0; 4798 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 4799 4800 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 4801 (BIT_6 | BIT_5 | BIT_4)) >> 4; 4802 4803 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 4804 sizeof(ha->fw_seriallink_options24)); 4805 4806 /* save HBA serial number */ 4807 ha->serial0 = icb->port_name[5]; 4808 ha->serial1 = icb->port_name[6]; 4809 ha->serial2 = icb->port_name[7]; 4810 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4811 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4812 4813 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 4814 4815 ha->retry_count = le16_to_cpu(nv->login_retry_count); 4816 4817 /* Set minimum login_timeout to 4 seconds. */ 4818 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 4819 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 4820 if (le16_to_cpu(nv->login_timeout) < 4) 4821 nv->login_timeout = __constant_cpu_to_le16(4); 4822 ha->login_timeout = le16_to_cpu(nv->login_timeout); 4823 icb->login_timeout = nv->login_timeout; 4824 4825 /* Set minimum RATOV to 100 tenths of a second. */ 4826 ha->r_a_tov = 100; 4827 4828 ha->loop_reset_delay = nv->reset_delay; 4829 4830 /* Link Down Timeout = 0: 4831 * 4832 * When Port Down timer expires we will start returning 4833 * I/O's to OS with "DID_NO_CONNECT". 4834 * 4835 * Link Down Timeout != 0: 4836 * 4837 * The driver waits for the link to come up after link down 4838 * before returning I/Os to OS with "DID_NO_CONNECT". 4839 */ 4840 if (le16_to_cpu(nv->link_down_timeout) == 0) { 4841 ha->loop_down_abort_time = 4842 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4843 } else { 4844 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 4845 ha->loop_down_abort_time = 4846 (LOOP_DOWN_TIME - ha->link_down_timeout); 4847 } 4848 4849 /* Need enough time to try and get the port back. */ 4850 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 4851 if (qlport_down_retry) 4852 ha->port_down_retry_count = qlport_down_retry; 4853 4854 /* Set login_retry_count */ 4855 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 4856 if (ha->port_down_retry_count == 4857 le16_to_cpu(nv->port_down_retry_count) && 4858 ha->port_down_retry_count > 3) 4859 ha->login_retry_count = ha->port_down_retry_count; 4860 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4861 ha->login_retry_count = ha->port_down_retry_count; 4862 if (ql2xloginretrycount) 4863 ha->login_retry_count = ql2xloginretrycount; 4864 4865 /* Enable ZIO. */ 4866 if (!vha->flags.init_done) { 4867 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 4868 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4869 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 4870 le16_to_cpu(icb->interrupt_delay_timer): 2; 4871 } 4872 icb->firmware_options_2 &= __constant_cpu_to_le32( 4873 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 4874 vha->flags.process_response_queue = 0; 4875 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4876 ha->zio_mode = QLA_ZIO_MODE_6; 4877 4878 ql_log(ql_log_info, vha, 0x006f, 4879 "ZIO mode %d enabled; timer delay (%d us).\n", 4880 ha->zio_mode, ha->zio_timer * 100); 4881 4882 icb->firmware_options_2 |= cpu_to_le32( 4883 (uint32_t)ha->zio_mode); 4884 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 4885 vha->flags.process_response_queue = 1; 4886 } 4887 4888 if (rval) { 4889 ql_log(ql_log_warn, vha, 0x0070, 4890 "NVRAM configuration failed.\n"); 4891 } 4892 return (rval); 4893 } 4894 4895 static int 4896 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 4897 uint32_t faddr) 4898 { 4899 int rval = QLA_SUCCESS; 4900 int segments, fragment; 4901 uint32_t *dcode, dlen; 4902 uint32_t risc_addr; 4903 uint32_t risc_size; 4904 uint32_t i; 4905 struct qla_hw_data *ha = vha->hw; 4906 struct req_que *req = ha->req_q_map[0]; 4907 4908 ql_dbg(ql_dbg_init, vha, 0x008b, 4909 "FW: Loading firmware from flash (%x).\n", faddr); 4910 4911 rval = QLA_SUCCESS; 4912 4913 segments = FA_RISC_CODE_SEGMENTS; 4914 dcode = (uint32_t *)req->ring; 4915 *srisc_addr = 0; 4916 4917 /* Validate firmware image by checking version. */ 4918 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 4919 for (i = 0; i < 4; i++) 4920 dcode[i] = be32_to_cpu(dcode[i]); 4921 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 4922 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 4923 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 4924 dcode[3] == 0)) { 4925 ql_log(ql_log_fatal, vha, 0x008c, 4926 "Unable to verify the integrity of flash firmware " 4927 "image.\n"); 4928 ql_log(ql_log_fatal, vha, 0x008d, 4929 "Firmware data: %08x %08x %08x %08x.\n", 4930 dcode[0], dcode[1], dcode[2], dcode[3]); 4931 4932 return QLA_FUNCTION_FAILED; 4933 } 4934 4935 while (segments && rval == QLA_SUCCESS) { 4936 /* Read segment's load information. */ 4937 qla24xx_read_flash_data(vha, dcode, faddr, 4); 4938 4939 risc_addr = be32_to_cpu(dcode[2]); 4940 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 4941 risc_size = be32_to_cpu(dcode[3]); 4942 4943 fragment = 0; 4944 while (risc_size > 0 && rval == QLA_SUCCESS) { 4945 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 4946 if (dlen > risc_size) 4947 dlen = risc_size; 4948 4949 ql_dbg(ql_dbg_init, vha, 0x008e, 4950 "Loading risc segment@ risc addr %x " 4951 "number of dwords 0x%x offset 0x%x.\n", 4952 risc_addr, dlen, faddr); 4953 4954 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 4955 for (i = 0; i < dlen; i++) 4956 dcode[i] = swab32(dcode[i]); 4957 4958 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4959 dlen); 4960 if (rval) { 4961 ql_log(ql_log_fatal, vha, 0x008f, 4962 "Failed to load segment %d of firmware.\n", 4963 fragment); 4964 break; 4965 } 4966 4967 faddr += dlen; 4968 risc_addr += dlen; 4969 risc_size -= dlen; 4970 fragment++; 4971 } 4972 4973 /* Next segment. */ 4974 segments--; 4975 } 4976 4977 return rval; 4978 } 4979 4980 #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" 4981 4982 int 4983 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4984 { 4985 int rval; 4986 int i, fragment; 4987 uint16_t *wcode, *fwcode; 4988 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 4989 struct fw_blob *blob; 4990 struct qla_hw_data *ha = vha->hw; 4991 struct req_que *req = ha->req_q_map[0]; 4992 4993 /* Load firmware blob. */ 4994 blob = qla2x00_request_firmware(vha); 4995 if (!blob) { 4996 ql_log(ql_log_info, vha, 0x0083, 4997 "Fimware image unavailable.\n"); 4998 ql_log(ql_log_info, vha, 0x0084, 4999 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 5000 return QLA_FUNCTION_FAILED; 5001 } 5002 5003 rval = QLA_SUCCESS; 5004 5005 wcode = (uint16_t *)req->ring; 5006 *srisc_addr = 0; 5007 fwcode = (uint16_t *)blob->fw->data; 5008 fwclen = 0; 5009 5010 /* Validate firmware image by checking version. */ 5011 if (blob->fw->size < 8 * sizeof(uint16_t)) { 5012 ql_log(ql_log_fatal, vha, 0x0085, 5013 "Unable to verify integrity of firmware image (%Zd).\n", 5014 blob->fw->size); 5015 goto fail_fw_integrity; 5016 } 5017 for (i = 0; i < 4; i++) 5018 wcode[i] = be16_to_cpu(fwcode[i + 4]); 5019 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 5020 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 5021 wcode[2] == 0 && wcode[3] == 0)) { 5022 ql_log(ql_log_fatal, vha, 0x0086, 5023 "Unable to verify integrity of firmware image.\n"); 5024 ql_log(ql_log_fatal, vha, 0x0087, 5025 "Firmware data: %04x %04x %04x %04x.\n", 5026 wcode[0], wcode[1], wcode[2], wcode[3]); 5027 goto fail_fw_integrity; 5028 } 5029 5030 seg = blob->segs; 5031 while (*seg && rval == QLA_SUCCESS) { 5032 risc_addr = *seg; 5033 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 5034 risc_size = be16_to_cpu(fwcode[3]); 5035 5036 /* Validate firmware image size. */ 5037 fwclen += risc_size * sizeof(uint16_t); 5038 if (blob->fw->size < fwclen) { 5039 ql_log(ql_log_fatal, vha, 0x0088, 5040 "Unable to verify integrity of firmware image " 5041 "(%Zd).\n", blob->fw->size); 5042 goto fail_fw_integrity; 5043 } 5044 5045 fragment = 0; 5046 while (risc_size > 0 && rval == QLA_SUCCESS) { 5047 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 5048 if (wlen > risc_size) 5049 wlen = risc_size; 5050 ql_dbg(ql_dbg_init, vha, 0x0089, 5051 "Loading risc segment@ risc addr %x number of " 5052 "words 0x%x.\n", risc_addr, wlen); 5053 5054 for (i = 0; i < wlen; i++) 5055 wcode[i] = swab16(fwcode[i]); 5056 5057 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5058 wlen); 5059 if (rval) { 5060 ql_log(ql_log_fatal, vha, 0x008a, 5061 "Failed to load segment %d of firmware.\n", 5062 fragment); 5063 break; 5064 } 5065 5066 fwcode += wlen; 5067 risc_addr += wlen; 5068 risc_size -= wlen; 5069 fragment++; 5070 } 5071 5072 /* Next segment. */ 5073 seg++; 5074 } 5075 return rval; 5076 5077 fail_fw_integrity: 5078 return QLA_FUNCTION_FAILED; 5079 } 5080 5081 static int 5082 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5083 { 5084 int rval; 5085 int segments, fragment; 5086 uint32_t *dcode, dlen; 5087 uint32_t risc_addr; 5088 uint32_t risc_size; 5089 uint32_t i; 5090 struct fw_blob *blob; 5091 uint32_t *fwcode, fwclen; 5092 struct qla_hw_data *ha = vha->hw; 5093 struct req_que *req = ha->req_q_map[0]; 5094 5095 /* Load firmware blob. */ 5096 blob = qla2x00_request_firmware(vha); 5097 if (!blob) { 5098 ql_log(ql_log_warn, vha, 0x0090, 5099 "Fimware image unavailable.\n"); 5100 ql_log(ql_log_warn, vha, 0x0091, 5101 "Firmware images can be retrieved from: " 5102 QLA_FW_URL ".\n"); 5103 5104 return QLA_FUNCTION_FAILED; 5105 } 5106 5107 ql_dbg(ql_dbg_init, vha, 0x0092, 5108 "FW: Loading via request-firmware.\n"); 5109 5110 rval = QLA_SUCCESS; 5111 5112 segments = FA_RISC_CODE_SEGMENTS; 5113 dcode = (uint32_t *)req->ring; 5114 *srisc_addr = 0; 5115 fwcode = (uint32_t *)blob->fw->data; 5116 fwclen = 0; 5117 5118 /* Validate firmware image by checking version. */ 5119 if (blob->fw->size < 8 * sizeof(uint32_t)) { 5120 ql_log(ql_log_fatal, vha, 0x0093, 5121 "Unable to verify integrity of firmware image (%Zd).\n", 5122 blob->fw->size); 5123 goto fail_fw_integrity; 5124 } 5125 for (i = 0; i < 4; i++) 5126 dcode[i] = be32_to_cpu(fwcode[i + 4]); 5127 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 5128 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 5129 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 5130 dcode[3] == 0)) { 5131 ql_log(ql_log_fatal, vha, 0x0094, 5132 "Unable to verify integrity of firmware image (%Zd).\n", 5133 blob->fw->size); 5134 ql_log(ql_log_fatal, vha, 0x0095, 5135 "Firmware data: %08x %08x %08x %08x.\n", 5136 dcode[0], dcode[1], dcode[2], dcode[3]); 5137 goto fail_fw_integrity; 5138 } 5139 5140 while (segments && rval == QLA_SUCCESS) { 5141 risc_addr = be32_to_cpu(fwcode[2]); 5142 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 5143 risc_size = be32_to_cpu(fwcode[3]); 5144 5145 /* Validate firmware image size. */ 5146 fwclen += risc_size * sizeof(uint32_t); 5147 if (blob->fw->size < fwclen) { 5148 ql_log(ql_log_fatal, vha, 0x0096, 5149 "Unable to verify integrity of firmware image " 5150 "(%Zd).\n", blob->fw->size); 5151 5152 goto fail_fw_integrity; 5153 } 5154 5155 fragment = 0; 5156 while (risc_size > 0 && rval == QLA_SUCCESS) { 5157 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 5158 if (dlen > risc_size) 5159 dlen = risc_size; 5160 5161 ql_dbg(ql_dbg_init, vha, 0x0097, 5162 "Loading risc segment@ risc addr %x " 5163 "number of dwords 0x%x.\n", risc_addr, dlen); 5164 5165 for (i = 0; i < dlen; i++) 5166 dcode[i] = swab32(fwcode[i]); 5167 5168 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 5169 dlen); 5170 if (rval) { 5171 ql_log(ql_log_fatal, vha, 0x0098, 5172 "Failed to load segment %d of firmware.\n", 5173 fragment); 5174 break; 5175 } 5176 5177 fwcode += dlen; 5178 risc_addr += dlen; 5179 risc_size -= dlen; 5180 fragment++; 5181 } 5182 5183 /* Next segment. */ 5184 segments--; 5185 } 5186 return rval; 5187 5188 fail_fw_integrity: 5189 return QLA_FUNCTION_FAILED; 5190 } 5191 5192 int 5193 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5194 { 5195 int rval; 5196 5197 if (ql2xfwloadbin == 1) 5198 return qla81xx_load_risc(vha, srisc_addr); 5199 5200 /* 5201 * FW Load priority: 5202 * 1) Firmware via request-firmware interface (.bin file). 5203 * 2) Firmware residing in flash. 5204 */ 5205 rval = qla24xx_load_risc_blob(vha, srisc_addr); 5206 if (rval == QLA_SUCCESS) 5207 return rval; 5208 5209 return qla24xx_load_risc_flash(vha, srisc_addr, 5210 vha->hw->flt_region_fw); 5211 } 5212 5213 int 5214 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 5215 { 5216 int rval; 5217 struct qla_hw_data *ha = vha->hw; 5218 5219 if (ql2xfwloadbin == 2) 5220 goto try_blob_fw; 5221 5222 /* 5223 * FW Load priority: 5224 * 1) Firmware residing in flash. 5225 * 2) Firmware via request-firmware interface (.bin file). 5226 * 3) Golden-Firmware residing in flash -- limited operation. 5227 */ 5228 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 5229 if (rval == QLA_SUCCESS) 5230 return rval; 5231 5232 try_blob_fw: 5233 rval = qla24xx_load_risc_blob(vha, srisc_addr); 5234 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 5235 return rval; 5236 5237 ql_log(ql_log_info, vha, 0x0099, 5238 "Attempting to fallback to golden firmware.\n"); 5239 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 5240 if (rval != QLA_SUCCESS) 5241 return rval; 5242 5243 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 5244 ha->flags.running_gold_fw = 1; 5245 return rval; 5246 } 5247 5248 void 5249 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 5250 { 5251 int ret, retries; 5252 struct qla_hw_data *ha = vha->hw; 5253 5254 if (ha->flags.pci_channel_io_perm_failure) 5255 return; 5256 if (!IS_FWI2_CAPABLE(ha)) 5257 return; 5258 if (!ha->fw_major_version) 5259 return; 5260 5261 ret = qla2x00_stop_firmware(vha); 5262 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 5263 ret != QLA_INVALID_COMMAND && retries ; retries--) { 5264 ha->isp_ops->reset_chip(vha); 5265 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 5266 continue; 5267 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 5268 continue; 5269 ql_log(ql_log_info, vha, 0x8015, 5270 "Attempting retry of stop-firmware command.\n"); 5271 ret = qla2x00_stop_firmware(vha); 5272 } 5273 } 5274 5275 int 5276 qla24xx_configure_vhba(scsi_qla_host_t *vha) 5277 { 5278 int rval = QLA_SUCCESS; 5279 int rval2; 5280 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5281 struct qla_hw_data *ha = vha->hw; 5282 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5283 struct req_que *req; 5284 struct rsp_que *rsp; 5285 5286 if (!vha->vp_idx) 5287 return -EINVAL; 5288 5289 rval = qla2x00_fw_ready(base_vha); 5290 if (ha->flags.cpu_affinity_enabled) 5291 req = ha->req_q_map[0]; 5292 else 5293 req = vha->req; 5294 rsp = req->rsp; 5295 5296 if (rval == QLA_SUCCESS) { 5297 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5298 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5299 } 5300 5301 vha->flags.management_server_logged_in = 0; 5302 5303 /* Login to SNS first */ 5304 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 5305 BIT_1); 5306 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5307 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 5308 ql_dbg(ql_dbg_init, vha, 0x0120, 5309 "Failed SNS login: loop_id=%x, rval2=%d\n", 5310 NPH_SNS, rval2); 5311 else 5312 ql_dbg(ql_dbg_init, vha, 0x0103, 5313 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 5314 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 5315 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 5316 return (QLA_FUNCTION_FAILED); 5317 } 5318 5319 atomic_set(&vha->loop_down_timer, 0); 5320 atomic_set(&vha->loop_state, LOOP_UP); 5321 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5322 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5323 rval = qla2x00_loop_resync(base_vha); 5324 5325 return rval; 5326 } 5327 5328 /* 84XX Support **************************************************************/ 5329 5330 static LIST_HEAD(qla_cs84xx_list); 5331 static DEFINE_MUTEX(qla_cs84xx_mutex); 5332 5333 static struct qla_chip_state_84xx * 5334 qla84xx_get_chip(struct scsi_qla_host *vha) 5335 { 5336 struct qla_chip_state_84xx *cs84xx; 5337 struct qla_hw_data *ha = vha->hw; 5338 5339 mutex_lock(&qla_cs84xx_mutex); 5340 5341 /* Find any shared 84xx chip. */ 5342 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 5343 if (cs84xx->bus == ha->pdev->bus) { 5344 kref_get(&cs84xx->kref); 5345 goto done; 5346 } 5347 } 5348 5349 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 5350 if (!cs84xx) 5351 goto done; 5352 5353 kref_init(&cs84xx->kref); 5354 spin_lock_init(&cs84xx->access_lock); 5355 mutex_init(&cs84xx->fw_update_mutex); 5356 cs84xx->bus = ha->pdev->bus; 5357 5358 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 5359 done: 5360 mutex_unlock(&qla_cs84xx_mutex); 5361 return cs84xx; 5362 } 5363 5364 static void 5365 __qla84xx_chip_release(struct kref *kref) 5366 { 5367 struct qla_chip_state_84xx *cs84xx = 5368 container_of(kref, struct qla_chip_state_84xx, kref); 5369 5370 mutex_lock(&qla_cs84xx_mutex); 5371 list_del(&cs84xx->list); 5372 mutex_unlock(&qla_cs84xx_mutex); 5373 kfree(cs84xx); 5374 } 5375 5376 void 5377 qla84xx_put_chip(struct scsi_qla_host *vha) 5378 { 5379 struct qla_hw_data *ha = vha->hw; 5380 if (ha->cs84xx) 5381 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 5382 } 5383 5384 static int 5385 qla84xx_init_chip(scsi_qla_host_t *vha) 5386 { 5387 int rval; 5388 uint16_t status[2]; 5389 struct qla_hw_data *ha = vha->hw; 5390 5391 mutex_lock(&ha->cs84xx->fw_update_mutex); 5392 5393 rval = qla84xx_verify_chip(vha, status); 5394 5395 mutex_unlock(&ha->cs84xx->fw_update_mutex); 5396 5397 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 5398 QLA_SUCCESS; 5399 } 5400 5401 /* 81XX Support **************************************************************/ 5402 5403 int 5404 qla81xx_nvram_config(scsi_qla_host_t *vha) 5405 { 5406 int rval; 5407 struct init_cb_81xx *icb; 5408 struct nvram_81xx *nv; 5409 uint32_t *dptr; 5410 uint8_t *dptr1, *dptr2; 5411 uint32_t chksum; 5412 uint16_t cnt; 5413 struct qla_hw_data *ha = vha->hw; 5414 5415 rval = QLA_SUCCESS; 5416 icb = (struct init_cb_81xx *)ha->init_cb; 5417 nv = ha->nvram; 5418 5419 /* Determine NVRAM starting address. */ 5420 ha->nvram_size = sizeof(struct nvram_81xx); 5421 ha->vpd_size = FA_NVRAM_VPD_SIZE; 5422 5423 /* Get VPD data into cache */ 5424 ha->vpd = ha->nvram + VPD_OFFSET; 5425 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 5426 ha->vpd_size); 5427 5428 /* Get NVRAM data into cache and calculate checksum. */ 5429 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 5430 ha->nvram_size); 5431 dptr = (uint32_t *)nv; 5432 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 5433 chksum += le32_to_cpu(*dptr++); 5434 5435 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 5436 "Contents of NVRAM:\n"); 5437 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 5438 (uint8_t *)nv, ha->nvram_size); 5439 5440 /* Bad NVRAM data, set defaults parameters. */ 5441 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 5442 || nv->id[3] != ' ' || 5443 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 5444 /* Reset NVRAM data. */ 5445 ql_log(ql_log_info, vha, 0x0073, 5446 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 5447 "version=0x%x.\n", chksum, nv->id[0], 5448 le16_to_cpu(nv->nvram_version)); 5449 ql_log(ql_log_info, vha, 0x0074, 5450 "Falling back to functioning (yet invalid -- WWPN) " 5451 "defaults.\n"); 5452 5453 /* 5454 * Set default initialization control block. 5455 */ 5456 memset(nv, 0, ha->nvram_size); 5457 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 5458 nv->version = __constant_cpu_to_le16(ICB_VERSION); 5459 nv->frame_payload_size = __constant_cpu_to_le16(2048); 5460 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5461 nv->exchange_count = __constant_cpu_to_le16(0); 5462 nv->port_name[0] = 0x21; 5463 nv->port_name[1] = 0x00 + ha->port_no; 5464 nv->port_name[2] = 0x00; 5465 nv->port_name[3] = 0xe0; 5466 nv->port_name[4] = 0x8b; 5467 nv->port_name[5] = 0x1c; 5468 nv->port_name[6] = 0x55; 5469 nv->port_name[7] = 0x86; 5470 nv->node_name[0] = 0x20; 5471 nv->node_name[1] = 0x00; 5472 nv->node_name[2] = 0x00; 5473 nv->node_name[3] = 0xe0; 5474 nv->node_name[4] = 0x8b; 5475 nv->node_name[5] = 0x1c; 5476 nv->node_name[6] = 0x55; 5477 nv->node_name[7] = 0x86; 5478 nv->login_retry_count = __constant_cpu_to_le16(8); 5479 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 5480 nv->login_timeout = __constant_cpu_to_le16(0); 5481 nv->firmware_options_1 = 5482 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 5483 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 5484 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 5485 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 5486 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 5487 nv->efi_parameters = __constant_cpu_to_le32(0); 5488 nv->reset_delay = 5; 5489 nv->max_luns_per_target = __constant_cpu_to_le16(128); 5490 nv->port_down_retry_count = __constant_cpu_to_le16(30); 5491 nv->link_down_timeout = __constant_cpu_to_le16(180); 5492 nv->enode_mac[0] = 0x00; 5493 nv->enode_mac[1] = 0xC0; 5494 nv->enode_mac[2] = 0xDD; 5495 nv->enode_mac[3] = 0x04; 5496 nv->enode_mac[4] = 0x05; 5497 nv->enode_mac[5] = 0x06 + ha->port_no; 5498 5499 rval = 1; 5500 } 5501 5502 if (IS_T10_PI_CAPABLE(ha)) 5503 nv->frame_payload_size &= ~7; 5504 5505 /* Reset Initialization control block */ 5506 memset(icb, 0, ha->init_cb_size); 5507 5508 /* Copy 1st segment. */ 5509 dptr1 = (uint8_t *)icb; 5510 dptr2 = (uint8_t *)&nv->version; 5511 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 5512 while (cnt--) 5513 *dptr1++ = *dptr2++; 5514 5515 icb->login_retry_count = nv->login_retry_count; 5516 5517 /* Copy 2nd segment. */ 5518 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 5519 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 5520 cnt = (uint8_t *)&icb->reserved_5 - 5521 (uint8_t *)&icb->interrupt_delay_timer; 5522 while (cnt--) 5523 *dptr1++ = *dptr2++; 5524 5525 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 5526 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 5527 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 5528 icb->enode_mac[0] = 0x00; 5529 icb->enode_mac[1] = 0xC0; 5530 icb->enode_mac[2] = 0xDD; 5531 icb->enode_mac[3] = 0x04; 5532 icb->enode_mac[4] = 0x05; 5533 icb->enode_mac[5] = 0x06 + ha->port_no; 5534 } 5535 5536 /* Use extended-initialization control block. */ 5537 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 5538 5539 /* 5540 * Setup driver NVRAM options. 5541 */ 5542 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 5543 "QLE8XXX"); 5544 5545 /* Use alternate WWN? */ 5546 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 5547 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5548 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5549 } 5550 5551 /* Prepare nodename */ 5552 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 5553 /* 5554 * Firmware will apply the following mask if the nodename was 5555 * not provided. 5556 */ 5557 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5558 icb->node_name[0] &= 0xF0; 5559 } 5560 5561 /* Set host adapter parameters. */ 5562 ha->flags.disable_risc_code_load = 0; 5563 ha->flags.enable_lip_reset = 0; 5564 ha->flags.enable_lip_full_login = 5565 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 5566 ha->flags.enable_target_reset = 5567 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 5568 ha->flags.enable_led_scheme = 0; 5569 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 5570 5571 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 5572 (BIT_6 | BIT_5 | BIT_4)) >> 4; 5573 5574 /* save HBA serial number */ 5575 ha->serial0 = icb->port_name[5]; 5576 ha->serial1 = icb->port_name[6]; 5577 ha->serial2 = icb->port_name[7]; 5578 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5579 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5580 5581 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5582 5583 ha->retry_count = le16_to_cpu(nv->login_retry_count); 5584 5585 /* Set minimum login_timeout to 4 seconds. */ 5586 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 5587 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 5588 if (le16_to_cpu(nv->login_timeout) < 4) 5589 nv->login_timeout = __constant_cpu_to_le16(4); 5590 ha->login_timeout = le16_to_cpu(nv->login_timeout); 5591 icb->login_timeout = nv->login_timeout; 5592 5593 /* Set minimum RATOV to 100 tenths of a second. */ 5594 ha->r_a_tov = 100; 5595 5596 ha->loop_reset_delay = nv->reset_delay; 5597 5598 /* Link Down Timeout = 0: 5599 * 5600 * When Port Down timer expires we will start returning 5601 * I/O's to OS with "DID_NO_CONNECT". 5602 * 5603 * Link Down Timeout != 0: 5604 * 5605 * The driver waits for the link to come up after link down 5606 * before returning I/Os to OS with "DID_NO_CONNECT". 5607 */ 5608 if (le16_to_cpu(nv->link_down_timeout) == 0) { 5609 ha->loop_down_abort_time = 5610 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5611 } else { 5612 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 5613 ha->loop_down_abort_time = 5614 (LOOP_DOWN_TIME - ha->link_down_timeout); 5615 } 5616 5617 /* Need enough time to try and get the port back. */ 5618 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 5619 if (qlport_down_retry) 5620 ha->port_down_retry_count = qlport_down_retry; 5621 5622 /* Set login_retry_count */ 5623 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 5624 if (ha->port_down_retry_count == 5625 le16_to_cpu(nv->port_down_retry_count) && 5626 ha->port_down_retry_count > 3) 5627 ha->login_retry_count = ha->port_down_retry_count; 5628 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5629 ha->login_retry_count = ha->port_down_retry_count; 5630 if (ql2xloginretrycount) 5631 ha->login_retry_count = ql2xloginretrycount; 5632 5633 /* if not running MSI-X we need handshaking on interrupts */ 5634 if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha)) 5635 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22); 5636 5637 /* Enable ZIO. */ 5638 if (!vha->flags.init_done) { 5639 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 5640 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5641 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 5642 le16_to_cpu(icb->interrupt_delay_timer): 2; 5643 } 5644 icb->firmware_options_2 &= __constant_cpu_to_le32( 5645 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 5646 vha->flags.process_response_queue = 0; 5647 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5648 ha->zio_mode = QLA_ZIO_MODE_6; 5649 5650 ql_log(ql_log_info, vha, 0x0075, 5651 "ZIO mode %d enabled; timer delay (%d us).\n", 5652 ha->zio_mode, 5653 ha->zio_timer * 100); 5654 5655 icb->firmware_options_2 |= cpu_to_le32( 5656 (uint32_t)ha->zio_mode); 5657 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 5658 vha->flags.process_response_queue = 1; 5659 } 5660 5661 if (rval) { 5662 ql_log(ql_log_warn, vha, 0x0076, 5663 "NVRAM configuration failed.\n"); 5664 } 5665 return (rval); 5666 } 5667 5668 int 5669 qla82xx_restart_isp(scsi_qla_host_t *vha) 5670 { 5671 int status, rval; 5672 uint32_t wait_time; 5673 struct qla_hw_data *ha = vha->hw; 5674 struct req_que *req = ha->req_q_map[0]; 5675 struct rsp_que *rsp = ha->rsp_q_map[0]; 5676 struct scsi_qla_host *vp; 5677 unsigned long flags; 5678 5679 status = qla2x00_init_rings(vha); 5680 if (!status) { 5681 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5682 ha->flags.chip_reset_done = 1; 5683 5684 status = qla2x00_fw_ready(vha); 5685 if (!status) { 5686 ql_log(ql_log_info, vha, 0x803c, 5687 "Start configure loop, status =%d.\n", status); 5688 5689 /* Issue a marker after FW becomes ready. */ 5690 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5691 5692 vha->flags.online = 1; 5693 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5694 wait_time = 256; 5695 do { 5696 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5697 qla2x00_configure_loop(vha); 5698 wait_time--; 5699 } while (!atomic_read(&vha->loop_down_timer) && 5700 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && 5701 wait_time && 5702 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); 5703 } 5704 5705 /* if no cable then assume it's good */ 5706 if ((vha->device_flags & DFLG_NO_CABLE)) 5707 status = 0; 5708 5709 ql_log(ql_log_info, vha, 0x8000, 5710 "Configure loop done, status = 0x%x.\n", status); 5711 } 5712 5713 if (!status) { 5714 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5715 5716 if (!atomic_read(&vha->loop_down_timer)) { 5717 /* 5718 * Issue marker command only when we are going 5719 * to start the I/O . 5720 */ 5721 vha->marker_needed = 1; 5722 } 5723 5724 vha->flags.online = 1; 5725 5726 ha->isp_ops->enable_intrs(ha); 5727 5728 ha->isp_abort_cnt = 0; 5729 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5730 5731 /* Update the firmware version */ 5732 status = qla82xx_check_md_needed(vha); 5733 5734 if (ha->fce) { 5735 ha->flags.fce_enabled = 1; 5736 memset(ha->fce, 0, 5737 fce_calc_size(ha->fce_bufs)); 5738 rval = qla2x00_enable_fce_trace(vha, 5739 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 5740 &ha->fce_bufs); 5741 if (rval) { 5742 ql_log(ql_log_warn, vha, 0x8001, 5743 "Unable to reinitialize FCE (%d).\n", 5744 rval); 5745 ha->flags.fce_enabled = 0; 5746 } 5747 } 5748 5749 if (ha->eft) { 5750 memset(ha->eft, 0, EFT_SIZE); 5751 rval = qla2x00_enable_eft_trace(vha, 5752 ha->eft_dma, EFT_NUM_BUFFERS); 5753 if (rval) { 5754 ql_log(ql_log_warn, vha, 0x8010, 5755 "Unable to reinitialize EFT (%d).\n", 5756 rval); 5757 } 5758 } 5759 } 5760 5761 if (!status) { 5762 ql_dbg(ql_dbg_taskm, vha, 0x8011, 5763 "qla82xx_restart_isp succeeded.\n"); 5764 5765 spin_lock_irqsave(&ha->vport_slock, flags); 5766 list_for_each_entry(vp, &ha->vp_list, list) { 5767 if (vp->vp_idx) { 5768 atomic_inc(&vp->vref_count); 5769 spin_unlock_irqrestore(&ha->vport_slock, flags); 5770 5771 qla2x00_vp_abort_isp(vp); 5772 5773 spin_lock_irqsave(&ha->vport_slock, flags); 5774 atomic_dec(&vp->vref_count); 5775 } 5776 } 5777 spin_unlock_irqrestore(&ha->vport_slock, flags); 5778 5779 } else { 5780 ql_log(ql_log_warn, vha, 0x8016, 5781 "qla82xx_restart_isp **** FAILED ****.\n"); 5782 } 5783 5784 return status; 5785 } 5786 5787 void 5788 qla81xx_update_fw_options(scsi_qla_host_t *vha) 5789 { 5790 struct qla_hw_data *ha = vha->hw; 5791 5792 if (!ql2xetsenable) 5793 return; 5794 5795 /* Enable ETS Burst. */ 5796 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 5797 ha->fw_options[2] |= BIT_9; 5798 qla2x00_set_fw_options(vha, ha->fw_options); 5799 } 5800 5801 /* 5802 * qla24xx_get_fcp_prio 5803 * Gets the fcp cmd priority value for the logged in port. 5804 * Looks for a match of the port descriptors within 5805 * each of the fcp prio config entries. If a match is found, 5806 * the tag (priority) value is returned. 5807 * 5808 * Input: 5809 * vha = scsi host structure pointer. 5810 * fcport = port structure pointer. 5811 * 5812 * Return: 5813 * non-zero (if found) 5814 * -1 (if not found) 5815 * 5816 * Context: 5817 * Kernel context 5818 */ 5819 static int 5820 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 5821 { 5822 int i, entries; 5823 uint8_t pid_match, wwn_match; 5824 int priority; 5825 uint32_t pid1, pid2; 5826 uint64_t wwn1, wwn2; 5827 struct qla_fcp_prio_entry *pri_entry; 5828 struct qla_hw_data *ha = vha->hw; 5829 5830 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 5831 return -1; 5832 5833 priority = -1; 5834 entries = ha->fcp_prio_cfg->num_entries; 5835 pri_entry = &ha->fcp_prio_cfg->entry[0]; 5836 5837 for (i = 0; i < entries; i++) { 5838 pid_match = wwn_match = 0; 5839 5840 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 5841 pri_entry++; 5842 continue; 5843 } 5844 5845 /* check source pid for a match */ 5846 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 5847 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 5848 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 5849 if (pid1 == INVALID_PORT_ID) 5850 pid_match++; 5851 else if (pid1 == pid2) 5852 pid_match++; 5853 } 5854 5855 /* check destination pid for a match */ 5856 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 5857 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 5858 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 5859 if (pid1 == INVALID_PORT_ID) 5860 pid_match++; 5861 else if (pid1 == pid2) 5862 pid_match++; 5863 } 5864 5865 /* check source WWN for a match */ 5866 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 5867 wwn1 = wwn_to_u64(vha->port_name); 5868 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 5869 if (wwn2 == (uint64_t)-1) 5870 wwn_match++; 5871 else if (wwn1 == wwn2) 5872 wwn_match++; 5873 } 5874 5875 /* check destination WWN for a match */ 5876 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 5877 wwn1 = wwn_to_u64(fcport->port_name); 5878 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 5879 if (wwn2 == (uint64_t)-1) 5880 wwn_match++; 5881 else if (wwn1 == wwn2) 5882 wwn_match++; 5883 } 5884 5885 if (pid_match == 2 || wwn_match == 2) { 5886 /* Found a matching entry */ 5887 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 5888 priority = pri_entry->tag; 5889 break; 5890 } 5891 5892 pri_entry++; 5893 } 5894 5895 return priority; 5896 } 5897 5898 /* 5899 * qla24xx_update_fcport_fcp_prio 5900 * Activates fcp priority for the logged in fc port 5901 * 5902 * Input: 5903 * vha = scsi host structure pointer. 5904 * fcp = port structure pointer. 5905 * 5906 * Return: 5907 * QLA_SUCCESS or QLA_FUNCTION_FAILED 5908 * 5909 * Context: 5910 * Kernel context. 5911 */ 5912 int 5913 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 5914 { 5915 int ret; 5916 int priority; 5917 uint16_t mb[5]; 5918 5919 if (fcport->port_type != FCT_TARGET || 5920 fcport->loop_id == FC_NO_LOOP_ID) 5921 return QLA_FUNCTION_FAILED; 5922 5923 priority = qla24xx_get_fcp_prio(vha, fcport); 5924 if (priority < 0) 5925 return QLA_FUNCTION_FAILED; 5926 5927 if (IS_QLA82XX(vha->hw)) { 5928 fcport->fcp_prio = priority & 0xf; 5929 return QLA_SUCCESS; 5930 } 5931 5932 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 5933 if (ret == QLA_SUCCESS) { 5934 if (fcport->fcp_prio != priority) 5935 ql_dbg(ql_dbg_user, vha, 0x709e, 5936 "Updated FCP_CMND priority - value=%d loop_id=%d " 5937 "port_id=%02x%02x%02x.\n", priority, 5938 fcport->loop_id, fcport->d_id.b.domain, 5939 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5940 fcport->fcp_prio = priority & 0xf; 5941 } else 5942 ql_dbg(ql_dbg_user, vha, 0x704f, 5943 "Unable to update FCP_CMND priority - ret=0x%x for " 5944 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 5945 fcport->d_id.b.domain, fcport->d_id.b.area, 5946 fcport->d_id.b.al_pa); 5947 return ret; 5948 } 5949 5950 /* 5951 * qla24xx_update_all_fcp_prio 5952 * Activates fcp priority for all the logged in ports 5953 * 5954 * Input: 5955 * ha = adapter block pointer. 5956 * 5957 * Return: 5958 * QLA_SUCCESS or QLA_FUNCTION_FAILED 5959 * 5960 * Context: 5961 * Kernel context. 5962 */ 5963 int 5964 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 5965 { 5966 int ret; 5967 fc_port_t *fcport; 5968 5969 ret = QLA_FUNCTION_FAILED; 5970 /* We need to set priority for all logged in ports */ 5971 list_for_each_entry(fcport, &vha->vp_fcports, list) 5972 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 5973 5974 return ret; 5975 } 5976