1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * QLogic Fibre Channel HBA Driver 4 * Copyright (c) 2003-2014 QLogic Corporation 5 */ 6 #ifndef __QLA_BSG_H 7 #define __QLA_BSG_H 8 9 /* BSG Vendor specific commands */ 10 #define QL_VND_LOOPBACK 0x01 11 #define QL_VND_A84_RESET 0x02 12 #define QL_VND_A84_UPDATE_FW 0x03 13 #define QL_VND_A84_MGMT_CMD 0x04 14 #define QL_VND_IIDMA 0x05 15 #define QL_VND_FCP_PRIO_CFG_CMD 0x06 16 #define QL_VND_READ_FLASH 0x07 17 #define QL_VND_UPDATE_FLASH 0x08 18 #define QL_VND_SET_FRU_VERSION 0x0B 19 #define QL_VND_READ_FRU_STATUS 0x0C 20 #define QL_VND_WRITE_FRU_STATUS 0x0D 21 #define QL_VND_DIAG_IO_CMD 0x0A 22 #define QL_VND_WRITE_I2C 0x10 23 #define QL_VND_READ_I2C 0x11 24 #define QL_VND_FX00_MGMT_CMD 0x12 25 #define QL_VND_SERDES_OP 0x13 26 #define QL_VND_SERDES_OP_EX 0x14 27 #define QL_VND_GET_FLASH_UPDATE_CAPS 0x15 28 #define QL_VND_SET_FLASH_UPDATE_CAPS 0x16 29 #define QL_VND_GET_BBCR_DATA 0x17 30 #define QL_VND_GET_PRIV_STATS 0x18 31 #define QL_VND_DPORT_DIAGNOSTICS 0x19 32 #define QL_VND_GET_PRIV_STATS_EX 0x1A 33 #define QL_VND_SS_GET_FLASH_IMAGE_STATUS 0x1E 34 #define QL_VND_EDIF_MGMT 0X1F 35 #define QL_VND_MANAGE_HOST_STATS 0x23 36 #define QL_VND_GET_HOST_STATS 0x24 37 #define QL_VND_GET_TGT_STATS 0x25 38 #define QL_VND_MANAGE_HOST_PORT 0x26 39 40 /* BSG Vendor specific subcode returns */ 41 #define EXT_STATUS_OK 0 42 #define EXT_STATUS_ERR 1 43 #define EXT_STATUS_BUSY 2 44 #define EXT_STATUS_INVALID_PARAM 6 45 #define EXT_STATUS_DATA_OVERRUN 7 46 #define EXT_STATUS_DATA_UNDERRUN 8 47 #define EXT_STATUS_MAILBOX 11 48 #define EXT_STATUS_BUFFER_TOO_SMALL 16 49 #define EXT_STATUS_NO_MEMORY 17 50 #define EXT_STATUS_DEVICE_OFFLINE 22 51 52 /* 53 * To support bidirectional iocb 54 * BSG Vendor specific returns 55 */ 56 #define EXT_STATUS_NOT_SUPPORTED 27 57 #define EXT_STATUS_INVALID_CFG 28 58 #define EXT_STATUS_DMA_ERR 29 59 #define EXT_STATUS_TIMEOUT 30 60 #define EXT_STATUS_THREAD_FAILED 31 61 #define EXT_STATUS_DATA_CMP_FAILED 32 62 63 /* BSG definations for interpreting CommandSent field */ 64 #define INT_DEF_LB_LOOPBACK_CMD 0 65 #define INT_DEF_LB_ECHO_CMD 1 66 67 /* Loopback related definations */ 68 #define INTERNAL_LOOPBACK 0xF1 69 #define EXTERNAL_LOOPBACK 0xF2 70 #define ENABLE_INTERNAL_LOOPBACK 0x02 71 #define ENABLE_EXTERNAL_LOOPBACK 0x04 72 #define INTERNAL_LOOPBACK_MASK 0x000E 73 #define MAX_ELS_FRAME_PAYLOAD 252 74 #define ELS_OPCODE_BYTE 0x10 75 76 /* BSG Vendor specific definations */ 77 #define A84_ISSUE_WRITE_TYPE_CMD 0 78 #define A84_ISSUE_READ_TYPE_CMD 1 79 #define A84_CLEANUP_CMD 2 80 #define A84_ISSUE_RESET_OP_FW 3 81 #define A84_ISSUE_RESET_DIAG_FW 4 82 #define A84_ISSUE_UPDATE_OPFW_CMD 5 83 #define A84_ISSUE_UPDATE_DIAGFW_CMD 6 84 85 struct qla84_mgmt_param { 86 union { 87 struct { 88 uint32_t start_addr; 89 } mem; /* for QLA84_MGMT_READ/WRITE_MEM */ 90 struct { 91 uint32_t id; 92 #define QLA84_MGMT_CONFIG_ID_UIF 1 93 #define QLA84_MGMT_CONFIG_ID_FCOE_COS 2 94 #define QLA84_MGMT_CONFIG_ID_PAUSE 3 95 #define QLA84_MGMT_CONFIG_ID_TIMEOUTS 4 96 97 uint32_t param0; 98 uint32_t param1; 99 } config; /* for QLA84_MGMT_CHNG_CONFIG */ 100 101 struct { 102 uint32_t type; 103 #define QLA84_MGMT_INFO_CONFIG_LOG_DATA 1 /* Get Config Log Data */ 104 #define QLA84_MGMT_INFO_LOG_DATA 2 /* Get Log Data */ 105 #define QLA84_MGMT_INFO_PORT_STAT 3 /* Get Port Statistics */ 106 #define QLA84_MGMT_INFO_LIF_STAT 4 /* Get LIF Statistics */ 107 #define QLA84_MGMT_INFO_ASIC_STAT 5 /* Get ASIC Statistics */ 108 #define QLA84_MGMT_INFO_CONFIG_PARAMS 6 /* Get Config Parameters */ 109 #define QLA84_MGMT_INFO_PANIC_LOG 7 /* Get Panic Log */ 110 111 uint32_t context; 112 /* 113 * context definitions for QLA84_MGMT_INFO_CONFIG_LOG_DATA 114 */ 115 #define IC_LOG_DATA_LOG_ID_DEBUG_LOG 0 116 #define IC_LOG_DATA_LOG_ID_LEARN_LOG 1 117 #define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG 2 118 #define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG 3 119 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG 4 120 #define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG 5 121 #define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG 6 122 #define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG 7 123 #define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG 8 124 #define IC_LOG_DATA_LOG_ID_DCX_LOG 9 125 126 /* 127 * context definitions for QLA84_MGMT_INFO_PORT_STAT 128 */ 129 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0 0 130 #define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1 1 131 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0 2 132 #define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1 3 133 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0 4 134 #define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1 5 135 136 137 /* 138 * context definitions for QLA84_MGMT_INFO_LIF_STAT 139 */ 140 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0 0 141 #define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1 1 142 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0 2 143 #define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1 3 144 #define IC_LIF_STATISTICS_LIF_NUMBER_CPU 6 145 146 } info; /* for QLA84_MGMT_GET_INFO */ 147 } u; 148 }; 149 150 struct qla84_msg_mgmt { 151 uint16_t cmd; 152 #define QLA84_MGMT_READ_MEM 0x00 153 #define QLA84_MGMT_WRITE_MEM 0x01 154 #define QLA84_MGMT_CHNG_CONFIG 0x02 155 #define QLA84_MGMT_GET_INFO 0x03 156 uint16_t rsrvd; 157 struct qla84_mgmt_param mgmtp;/* parameters for cmd */ 158 uint32_t len; /* bytes in payload following this struct */ 159 uint8_t payload[0]; /* payload for cmd */ 160 }; 161 162 struct qla_bsg_a84_mgmt { 163 struct qla84_msg_mgmt mgmt; 164 } __attribute__ ((packed)); 165 166 struct qla_scsi_addr { 167 uint16_t bus; 168 uint16_t target; 169 } __attribute__ ((packed)); 170 171 struct qla_ext_dest_addr { 172 union { 173 uint8_t wwnn[8]; 174 uint8_t wwpn[8]; 175 uint8_t id[4]; 176 struct qla_scsi_addr scsi_addr; 177 } dest_addr; 178 uint16_t dest_type; 179 #define EXT_DEF_TYPE_WWPN 2 180 uint16_t lun; 181 uint16_t padding[2]; 182 } __attribute__ ((packed)); 183 184 struct qla_port_param { 185 struct qla_ext_dest_addr fc_scsi_addr; 186 uint16_t mode; 187 uint16_t speed; 188 } __attribute__ ((packed)); 189 190 191 /* FRU VPD */ 192 193 #define MAX_FRU_SIZE 36 194 195 struct qla_field_address { 196 uint16_t offset; 197 uint16_t device; 198 uint16_t option; 199 } __packed; 200 201 struct qla_field_info { 202 uint8_t version[MAX_FRU_SIZE]; 203 } __packed; 204 205 struct qla_image_version { 206 struct qla_field_address field_address; 207 struct qla_field_info field_info; 208 } __packed; 209 210 struct qla_image_version_list { 211 uint32_t count; 212 struct qla_image_version version[0]; 213 } __packed; 214 215 struct qla_status_reg { 216 struct qla_field_address field_address; 217 uint8_t status_reg; 218 uint8_t reserved[7]; 219 } __packed; 220 221 struct qla_i2c_access { 222 uint16_t device; 223 uint16_t offset; 224 uint16_t option; 225 uint16_t length; 226 uint8_t buffer[0x40]; 227 } __packed; 228 229 /* 26xx serdes register interface */ 230 231 /* serdes reg commands */ 232 #define INT_SC_SERDES_READ_REG 1 233 #define INT_SC_SERDES_WRITE_REG 2 234 235 struct qla_serdes_reg { 236 uint16_t cmd; 237 uint16_t addr; 238 uint16_t val; 239 } __packed; 240 241 struct qla_serdes_reg_ex { 242 uint16_t cmd; 243 uint32_t addr; 244 uint32_t val; 245 } __packed; 246 247 struct qla_flash_update_caps { 248 uint64_t capabilities; 249 uint32_t outage_duration; 250 uint8_t reserved[20]; 251 } __packed; 252 253 /* BB_CR Status */ 254 #define QLA_BBCR_STATUS_DISABLED 0 255 #define QLA_BBCR_STATUS_ENABLED 1 256 #define QLA_BBCR_STATUS_UNKNOWN 2 257 258 /* BB_CR State */ 259 #define QLA_BBCR_STATE_OFFLINE 0 260 #define QLA_BBCR_STATE_ONLINE 1 261 262 /* BB_CR Offline Reason Code */ 263 #define QLA_BBCR_REASON_PORT_SPEED 1 264 #define QLA_BBCR_REASON_PEER_PORT 2 265 #define QLA_BBCR_REASON_SWITCH 3 266 #define QLA_BBCR_REASON_LOGIN_REJECT 4 267 268 struct qla_bbcr_data { 269 uint8_t status; /* 1 - enabled, 0 - Disabled */ 270 uint8_t state; /* 1 - online, 0 - offline */ 271 uint8_t configured_bbscn; /* 0-15 */ 272 uint8_t negotiated_bbscn; /* 0-15 */ 273 uint8_t offline_reason_code; 274 uint16_t mbx1; /* Port state */ 275 uint8_t reserved[9]; 276 } __packed; 277 278 struct qla_dport_diag { 279 uint16_t options; 280 uint32_t buf[16]; 281 uint8_t unused[62]; 282 } __packed; 283 284 /* D_Port options */ 285 #define QLA_DPORT_RESULT 0x0 286 #define QLA_DPORT_START 0x2 287 288 /* active images in flash */ 289 struct qla_active_regions { 290 uint8_t global_image; 291 uint8_t board_config; 292 uint8_t vpd_nvram; 293 uint8_t npiv_config_0_1; 294 uint8_t npiv_config_2_3; 295 uint8_t reserved[32]; 296 } __packed; 297 298 #include "qla_edif_bsg.h" 299 300 #endif 301