1 /* 2 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file 3 * 4 * Copyright (C) 2008, 2009 PMC Sierra Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 21 #ifndef _PMCRAID_H 22 #define _PMCRAID_H 23 24 #include <linux/version.h> 25 #include <linux/types.h> 26 #include <linux/completion.h> 27 #include <linux/list.h> 28 #include <scsi/scsi.h> 29 #include <scsi/scsi_cmnd.h> 30 #include <linux/cdev.h> 31 #include <net/netlink.h> 32 #include <net/genetlink.h> 33 #include <linux/connector.h> 34 /* 35 * Driver name : string representing the driver name 36 * Device file : /dev file to be used for management interfaces 37 * Driver version: version string in major_version.minor_version.patch format 38 * Driver date : date information in "Mon dd yyyy" format 39 */ 40 #define PMCRAID_DRIVER_NAME "PMC MaxRAID" 41 #define PMCRAID_DEVFILE "pmcsas" 42 #define PMCRAID_DRIVER_VERSION "1.0.2" 43 #define PMCRAID_DRIVER_DATE __DATE__ 44 45 /* Maximum number of adapters supported by current version of the driver */ 46 #define PMCRAID_MAX_ADAPTERS 1024 47 48 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */ 49 #define PMC_BIT8(n) (1 << (7-n)) 50 #define PMC_BIT16(n) (1 << (15-n)) 51 #define PMC_BIT32(n) (1 << (31-n)) 52 53 /* PMC PCI vendor ID and device ID values */ 54 #define PCI_VENDOR_ID_PMC 0x11F8 55 #define PCI_DEVICE_ID_PMC_MAXRAID 0x5220 56 57 /* 58 * MAX_CMD : maximum commands that can be outstanding with IOA 59 * MAX_IO_CMD : command blocks available for IO commands 60 * MAX_HCAM_CMD : command blocks avaibale for HCAMS 61 * MAX_INTERNAL_CMD : command blocks avaible for internal commands like reset 62 */ 63 #define PMCRAID_MAX_CMD 1024 64 #define PMCRAID_MAX_IO_CMD 1020 65 #define PMCRAID_MAX_HCAM_CMD 2 66 #define PMCRAID_MAX_INTERNAL_CMD 2 67 68 /* MAX_IOADLS : max number of scatter-gather lists supported by IOA 69 * IOADLS_INTERNAL : number of ioadls included as part of IOARCB. 70 * IOADLS_EXTERNAL : number of ioadls allocated external to IOARCB 71 */ 72 #define PMCRAID_IOADLS_INTERNAL 27 73 #define PMCRAID_IOADLS_EXTERNAL 37 74 #define PMCRAID_MAX_IOADLS PMCRAID_IOADLS_INTERNAL 75 76 /* HRRQ_ENTRY_SIZE : size of hrrq buffer 77 * IOARCB_ALIGNMENT : alignment required for IOARCB 78 * IOADL_ALIGNMENT : alignment requirement for IOADLs 79 * MSIX_VECTORS : number of MSIX vectors supported 80 */ 81 #define HRRQ_ENTRY_SIZE sizeof(__le32) 82 #define PMCRAID_IOARCB_ALIGNMENT 32 83 #define PMCRAID_IOADL_ALIGNMENT 16 84 #define PMCRAID_IOASA_ALIGNMENT 4 85 #define PMCRAID_NUM_MSIX_VECTORS 1 86 87 /* various other limits */ 88 #define PMCRAID_VENDOR_ID_LEN 8 89 #define PMCRAID_PRODUCT_ID_LEN 16 90 #define PMCRAID_SERIAL_NUM_LEN 8 91 #define PMCRAID_LUN_LEN 8 92 #define PMCRAID_MAX_CDB_LEN 16 93 #define PMCRAID_DEVICE_ID_LEN 8 94 #define PMCRAID_SENSE_DATA_LEN 256 95 #define PMCRAID_ADD_CMD_PARAM_LEN 48 96 97 #define PMCRAID_MAX_BUS_TO_SCAN 1 98 #define PMCRAID_MAX_NUM_TARGETS_PER_BUS 256 99 #define PMCRAID_MAX_NUM_LUNS_PER_TARGET 8 100 101 /* IOA bus/target/lun number of IOA resources */ 102 #define PMCRAID_IOA_BUS_ID 0xfe 103 #define PMCRAID_IOA_TARGET_ID 0xff 104 #define PMCRAID_IOA_LUN_ID 0xff 105 #define PMCRAID_VSET_BUS_ID 0x1 106 #define PMCRAID_VSET_LUN_ID 0x0 107 #define PMCRAID_PHYS_BUS_ID 0x0 108 #define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8 109 #define PMCRAID_MAX_VSET_TARGETS 240 110 #define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8 111 112 #define PMCRAID_IOA_MAX_SECTORS 32767 113 #define PMCRAID_VSET_MAX_SECTORS 512 114 #define PMCRAID_MAX_CMD_PER_LUN 254 115 116 /* Number of configuration table entries (resources) */ 117 #define PMCRAID_MAX_NUM_OF_VSETS 240 118 119 /* Todo : Check max limit for Phase 1 */ 120 #define PMCRAID_MAX_NUM_OF_PHY_DEVS 256 121 122 /* MAX_NUM_OF_DEVS includes 1 FP, 1 Dummy Enclosure device */ 123 #define PMCRAID_MAX_NUM_OF_DEVS \ 124 (PMCRAID_MAX_NUM_OF_VSETS + PMCRAID_MAX_NUM_OF_PHY_DEVS + 2) 125 126 #define PMCRAID_MAX_RESOURCES PMCRAID_MAX_NUM_OF_DEVS 127 128 /* Adapter Commands used by driver */ 129 #define PMCRAID_QUERY_RESOURCE_STATE 0xC2 130 #define PMCRAID_RESET_DEVICE 0xC3 131 /* options to select reset target */ 132 #define ENABLE_RESET_MODIFIER 0x80 133 #define RESET_DEVICE_LUN 0x40 134 #define RESET_DEVICE_TARGET 0x20 135 #define RESET_DEVICE_BUS 0x10 136 137 #define PMCRAID_IDENTIFY_HRRQ 0xC4 138 #define PMCRAID_QUERY_IOA_CONFIG 0xC5 139 #define PMCRAID_QUERY_CMD_STATUS 0xCB 140 #define PMCRAID_ABORT_CMD 0xC7 141 142 /* CANCEL ALL command, provides option for setting SYNC_COMPLETE 143 * on the target resources for which commands got cancelled 144 */ 145 #define PMCRAID_CANCEL_ALL_REQUESTS 0xCE 146 #define PMCRAID_SYNC_COMPLETE_AFTER_CANCEL PMC_BIT8(0) 147 148 /* HCAM command and types of HCAM supported by IOA */ 149 #define PMCRAID_HOST_CONTROLLED_ASYNC 0xCF 150 #define PMCRAID_HCAM_CODE_CONFIG_CHANGE 0x01 151 #define PMCRAID_HCAM_CODE_LOG_DATA 0x02 152 153 /* IOA shutdown command and various shutdown types */ 154 #define PMCRAID_IOA_SHUTDOWN 0xF7 155 #define PMCRAID_SHUTDOWN_NORMAL 0x00 156 #define PMCRAID_SHUTDOWN_PREPARE_FOR_NORMAL 0x40 157 #define PMCRAID_SHUTDOWN_NONE 0x100 158 #define PMCRAID_SHUTDOWN_ABBREV 0x80 159 160 /* SET SUPPORTED DEVICES command and the option to select all the 161 * devices to be supported 162 */ 163 #define PMCRAID_SET_SUPPORTED_DEVICES 0xFB 164 #define ALL_DEVICES_SUPPORTED PMC_BIT8(0) 165 166 /* This option is used with SCSI WRITE_BUFFER command */ 167 #define PMCRAID_WR_BUF_DOWNLOAD_AND_SAVE 0x05 168 169 /* IOASC Codes used by driver */ 170 #define PMCRAID_IOASC_SENSE_MASK 0xFFFFFF00 171 #define PMCRAID_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24) 172 #define PMCRAID_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16) 173 #define PMCRAID_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8) 174 #define PMCRAID_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff) 175 176 #define PMCRAID_IOASC_GOOD_COMPLETION 0x00000000 177 #define PMCRAID_IOASC_NR_INIT_CMD_REQUIRED 0x02040200 178 #define PMCRAID_IOASC_NR_IOA_RESET_REQUIRED 0x02048000 179 #define PMCRAID_IOASC_NR_SYNC_REQUIRED 0x023F0000 180 #define PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC 0x03110C00 181 #define PMCRAID_IOASC_HW_CANNOT_COMMUNICATE 0x04050000 182 #define PMCRAID_IOASC_HW_DEVICE_TIMEOUT 0x04080100 183 #define PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR 0x04448500 184 #define PMCRAID_IOASC_HW_IOA_RESET_REQUIRED 0x04448600 185 #define PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE 0x05250000 186 #define PMCRAID_IOASC_AC_TERMINATED_BY_HOST 0x0B5A0000 187 #define PMCRAID_IOASC_UA_BUS_WAS_RESET 0x06290000 188 #define PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER 0x06298000 189 190 /* Driver defined IOASCs */ 191 #define PMCRAID_IOASC_IOA_WAS_RESET 0x10000001 192 #define PMCRAID_IOASC_PCI_ACCESS_ERROR 0x10000002 193 194 /* Various timeout values (in milliseconds) used. If any of these are chip 195 * specific, move them to pmcraid_chip_details structure. 196 */ 197 #define PMCRAID_PCI_DEASSERT_TIMEOUT 2000 198 #define PMCRAID_BIST_TIMEOUT 2000 199 #define PMCRAID_AENWAIT_TIMEOUT 5000 200 #define PMCRAID_TRANSOP_TIMEOUT 60000 201 202 #define PMCRAID_RESET_TIMEOUT (2 * HZ) 203 #define PMCRAID_CHECK_FOR_RESET_TIMEOUT ((HZ / 10)) 204 #define PMCRAID_VSET_IO_TIMEOUT (60 * HZ) 205 #define PMCRAID_INTERNAL_TIMEOUT (60 * HZ) 206 #define PMCRAID_SHUTDOWN_TIMEOUT (150 * HZ) 207 #define PMCRAID_RESET_BUS_TIMEOUT (60 * HZ) 208 #define PMCRAID_RESET_HOST_TIMEOUT (150 * HZ) 209 #define PMCRAID_REQUEST_SENSE_TIMEOUT (30 * HZ) 210 #define PMCRAID_SET_SUP_DEV_TIMEOUT (2 * 60 * HZ) 211 212 /* structure to represent a scatter-gather element (IOADL descriptor) */ 213 struct pmcraid_ioadl_desc { 214 __le64 address; 215 __le32 data_len; 216 __u8 reserved[3]; 217 __u8 flags; 218 } __attribute__((packed, aligned(PMCRAID_IOADL_ALIGNMENT))); 219 220 /* pmcraid_ioadl_desc.flags values */ 221 #define IOADL_FLAGS_CHAINED PMC_BIT8(0) 222 #define IOADL_FLAGS_LAST_DESC PMC_BIT8(1) 223 #define IOADL_FLAGS_READ_LAST PMC_BIT8(1) 224 #define IOADL_FLAGS_WRITE_LAST PMC_BIT8(1) 225 226 227 /* additional IOARCB data which can be CDB or additional request parameters 228 * or list of IOADLs. Firmware supports max of 512 bytes for IOARCB, hence then 229 * number of IOADLs are limted to 27. In case they are more than 27, they will 230 * be used in chained form 231 */ 232 struct pmcraid_ioarcb_add_data { 233 union { 234 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_INTERNAL]; 235 __u8 add_cmd_params[PMCRAID_ADD_CMD_PARAM_LEN]; 236 } u; 237 }; 238 239 /* 240 * IOA Request Control Block 241 */ 242 struct pmcraid_ioarcb { 243 __le64 ioarcb_bus_addr; 244 __le32 resource_handle; 245 __le32 response_handle; 246 __le64 ioadl_bus_addr; 247 __le32 ioadl_length; 248 __le32 data_transfer_length; 249 __le64 ioasa_bus_addr; 250 __le16 ioasa_len; 251 __le16 cmd_timeout; 252 __le16 add_cmd_param_offset; 253 __le16 add_cmd_param_length; 254 __le32 reserved1[2]; 255 __le32 reserved2; 256 __u8 request_type; 257 __u8 request_flags0; 258 __u8 request_flags1; 259 __u8 hrrq_id; 260 __u8 cdb[PMCRAID_MAX_CDB_LEN]; 261 struct pmcraid_ioarcb_add_data add_data; 262 } __attribute__((packed, aligned(PMCRAID_IOARCB_ALIGNMENT))); 263 264 /* well known resource handle values */ 265 #define PMCRAID_IOA_RES_HANDLE 0xffffffff 266 #define PMCRAID_INVALID_RES_HANDLE 0 267 268 /* pmcraid_ioarcb.request_type values */ 269 #define REQ_TYPE_SCSI 0x00 270 #define REQ_TYPE_IOACMD 0x01 271 #define REQ_TYPE_HCAM 0x02 272 273 /* pmcraid_ioarcb.flags0 values */ 274 #define TRANSFER_DIR_WRITE PMC_BIT8(0) 275 #define INHIBIT_UL_CHECK PMC_BIT8(2) 276 #define SYNC_OVERRIDE PMC_BIT8(3) 277 #define SYNC_COMPLETE PMC_BIT8(4) 278 #define NO_LINK_DESCS PMC_BIT8(5) 279 280 /* pmcraid_ioarcb.flags1 values */ 281 #define DELAY_AFTER_RESET PMC_BIT8(0) 282 #define TASK_TAG_SIMPLE 0x10 283 #define TASK_TAG_ORDERED 0x20 284 #define TASK_TAG_QUEUE_HEAD 0x30 285 286 /* toggle bit offset in response handle */ 287 #define HRRQ_TOGGLE_BIT 0x01 288 #define HRRQ_RESPONSE_BIT 0x02 289 290 /* IOA Status Area */ 291 struct pmcraid_ioasa_vset { 292 __le32 failing_lba_hi; 293 __le32 failing_lba_lo; 294 __le32 reserved; 295 } __attribute__((packed, aligned(4))); 296 297 struct pmcraid_ioasa { 298 __le32 ioasc; 299 __le16 returned_status_length; 300 __le16 available_status_length; 301 __le32 residual_data_length; 302 __le32 ilid; 303 __le32 fd_ioasc; 304 __le32 fd_res_address; 305 __le32 fd_res_handle; 306 __le32 reserved; 307 308 /* resource specific sense information */ 309 union { 310 struct pmcraid_ioasa_vset vset; 311 } u; 312 313 /* IOA autosense data */ 314 __le16 auto_sense_length; 315 __le16 error_data_length; 316 __u8 sense_data[PMCRAID_SENSE_DATA_LEN]; 317 } __attribute__((packed, aligned(4))); 318 319 #define PMCRAID_DRIVER_ILID 0xffffffff 320 321 /* Config Table Entry per Resource */ 322 struct pmcraid_config_table_entry { 323 __u8 resource_type; 324 __u8 bus_protocol; 325 __le16 array_id; 326 __u8 common_flags0; 327 __u8 common_flags1; 328 __u8 unique_flags0; 329 __u8 unique_flags1; /*also used as vset target_id */ 330 __le32 resource_handle; 331 __le32 resource_address; 332 __u8 device_id[PMCRAID_DEVICE_ID_LEN]; 333 __u8 lun[PMCRAID_LUN_LEN]; 334 } __attribute__((packed, aligned(4))); 335 336 /* resource types (config_table_entry.resource_type values) */ 337 #define RES_TYPE_AF_DASD 0x00 338 #define RES_TYPE_GSCSI 0x01 339 #define RES_TYPE_VSET 0x02 340 #define RES_TYPE_IOA_FP 0xFF 341 342 #define RES_IS_IOA(res) ((res).resource_type == RES_TYPE_IOA_FP) 343 #define RES_IS_GSCSI(res) ((res).resource_type == RES_TYPE_GSCSI) 344 #define RES_IS_VSET(res) ((res).resource_type == RES_TYPE_VSET) 345 #define RES_IS_AFDASD(res) ((res).resource_type == RES_TYPE_AF_DASD) 346 347 /* bus_protocol values used by driver */ 348 #define RES_TYPE_VENCLOSURE 0x8 349 350 /* config_table_entry.common_flags0 */ 351 #define MULTIPATH_RESOURCE PMC_BIT32(0) 352 353 /* unique_flags1 */ 354 #define IMPORT_MODE_MANUAL PMC_BIT8(0) 355 356 /* well known resource handle values */ 357 #define RES_HANDLE_IOA 0xFFFFFFFF 358 #define RES_HANDLE_NONE 0x00000000 359 360 /* well known resource address values */ 361 #define RES_ADDRESS_IOAFP 0xFEFFFFFF 362 #define RES_ADDRESS_INVALID 0xFFFFFFFF 363 364 /* BUS/TARGET/LUN values from resource_addrr */ 365 #define RES_BUS(res_addr) (le32_to_cpu(res_addr) & 0xFF) 366 #define RES_TARGET(res_addr) ((le32_to_cpu(res_addr) >> 16) & 0xFF) 367 #define RES_LUN(res_addr) 0x0 368 369 /* configuration table structure */ 370 struct pmcraid_config_table { 371 __le16 num_entries; 372 __u8 table_format; 373 __u8 reserved1; 374 __u8 flags; 375 __u8 reserved2[11]; 376 struct pmcraid_config_table_entry entries[PMCRAID_MAX_RESOURCES]; 377 } __attribute__((packed, aligned(4))); 378 379 /* config_table.flags value */ 380 #define MICROCODE_UPDATE_REQUIRED PMC_BIT32(0) 381 382 /* 383 * HCAM format 384 */ 385 #define PMCRAID_HOSTRCB_LDNSIZE 4056 386 387 /* Error log notification format */ 388 struct pmcraid_hostrcb_error { 389 __le32 fd_ioasc; 390 __le32 fd_ra; 391 __le32 fd_rh; 392 __le32 prc; 393 union { 394 __u8 data[PMCRAID_HOSTRCB_LDNSIZE]; 395 } u; 396 } __attribute__ ((packed, aligned(4))); 397 398 struct pmcraid_hcam_hdr { 399 __u8 op_code; 400 __u8 notification_type; 401 __u8 notification_lost; 402 __u8 flags; 403 __u8 overlay_id; 404 __u8 reserved1[3]; 405 __le32 ilid; 406 __le32 timestamp1; 407 __le32 timestamp2; 408 __le32 data_len; 409 } __attribute__((packed, aligned(4))); 410 411 #define PMCRAID_AEN_GROUP 0x3 412 413 struct pmcraid_hcam_ccn { 414 struct pmcraid_hcam_hdr header; 415 struct pmcraid_config_table_entry cfg_entry; 416 } __attribute__((packed, aligned(4))); 417 418 struct pmcraid_hcam_ldn { 419 struct pmcraid_hcam_hdr header; 420 struct pmcraid_hostrcb_error error_log; 421 } __attribute__((packed, aligned(4))); 422 423 /* pmcraid_hcam.op_code values */ 424 #define HOSTRCB_TYPE_CCN 0xE1 425 #define HOSTRCB_TYPE_LDN 0xE2 426 427 /* pmcraid_hcam.notification_type values */ 428 #define NOTIFICATION_TYPE_ENTRY_CHANGED 0x0 429 #define NOTIFICATION_TYPE_ENTRY_NEW 0x1 430 #define NOTIFICATION_TYPE_ENTRY_DELETED 0x2 431 #define NOTIFICATION_TYPE_ERROR_LOG 0x10 432 #define NOTIFICATION_TYPE_INFORMATION_LOG 0x11 433 434 #define HOSTRCB_NOTIFICATIONS_LOST PMC_BIT8(0) 435 436 /* pmcraid_hcam.flags values */ 437 #define HOSTRCB_INTERNAL_OP_ERROR PMC_BIT8(0) 438 #define HOSTRCB_ERROR_RESPONSE_SENT PMC_BIT8(1) 439 440 /* pmcraid_hcam.overlay_id values */ 441 #define HOSTRCB_OVERLAY_ID_08 0x08 442 #define HOSTRCB_OVERLAY_ID_09 0x09 443 #define HOSTRCB_OVERLAY_ID_11 0x11 444 #define HOSTRCB_OVERLAY_ID_12 0x12 445 #define HOSTRCB_OVERLAY_ID_13 0x13 446 #define HOSTRCB_OVERLAY_ID_14 0x14 447 #define HOSTRCB_OVERLAY_ID_16 0x16 448 #define HOSTRCB_OVERLAY_ID_17 0x17 449 #define HOSTRCB_OVERLAY_ID_20 0x20 450 #define HOSTRCB_OVERLAY_ID_FF 0xFF 451 452 /* Implementation specific card details */ 453 struct pmcraid_chip_details { 454 /* hardware register offsets */ 455 unsigned long ioastatus; 456 unsigned long ioarrin; 457 unsigned long mailbox; 458 unsigned long global_intr_mask; 459 unsigned long ioa_host_intr; 460 unsigned long ioa_host_intr_clr; 461 unsigned long ioa_host_mask; 462 unsigned long ioa_host_mask_clr; 463 unsigned long host_ioa_intr; 464 unsigned long host_ioa_intr_clr; 465 466 /* timeout used during transitional to operational state */ 467 unsigned long transop_timeout; 468 }; 469 470 /* IOA to HOST doorbells (interrupts) */ 471 #define INTRS_TRANSITION_TO_OPERATIONAL PMC_BIT32(0) 472 #define INTRS_IOARCB_TRANSFER_FAILED PMC_BIT32(3) 473 #define INTRS_IOA_UNIT_CHECK PMC_BIT32(4) 474 #define INTRS_NO_HRRQ_FOR_CMD_RESPONSE PMC_BIT32(5) 475 #define INTRS_CRITICAL_OP_IN_PROGRESS PMC_BIT32(6) 476 #define INTRS_IO_DEBUG_ACK PMC_BIT32(7) 477 #define INTRS_IOARRIN_LOST PMC_BIT32(27) 478 #define INTRS_SYSTEM_BUS_MMIO_ERROR PMC_BIT32(28) 479 #define INTRS_IOA_PROCESSOR_ERROR PMC_BIT32(29) 480 #define INTRS_HRRQ_VALID PMC_BIT32(30) 481 #define INTRS_OPERATIONAL_STATUS PMC_BIT32(0) 482 483 /* Host to IOA Doorbells */ 484 #define DOORBELL_RUNTIME_RESET PMC_BIT32(1) 485 #define DOORBELL_IOA_RESET_ALERT PMC_BIT32(7) 486 #define DOORBELL_IOA_DEBUG_ALERT PMC_BIT32(9) 487 #define DOORBELL_ENABLE_DESTRUCTIVE_DIAGS PMC_BIT32(8) 488 #define DOORBELL_IOA_START_BIST PMC_BIT32(23) 489 #define DOORBELL_RESET_IOA PMC_BIT32(31) 490 491 /* Global interrupt mask register value */ 492 #define GLOBAL_INTERRUPT_MASK 0x4ULL 493 494 #define PMCRAID_ERROR_INTERRUPTS (INTRS_IOARCB_TRANSFER_FAILED | \ 495 INTRS_IOA_UNIT_CHECK | \ 496 INTRS_NO_HRRQ_FOR_CMD_RESPONSE | \ 497 INTRS_IOARRIN_LOST | \ 498 INTRS_SYSTEM_BUS_MMIO_ERROR | \ 499 INTRS_IOA_PROCESSOR_ERROR) 500 501 #define PMCRAID_PCI_INTERRUPTS (PMCRAID_ERROR_INTERRUPTS | \ 502 INTRS_HRRQ_VALID | \ 503 INTRS_CRITICAL_OP_IN_PROGRESS |\ 504 INTRS_TRANSITION_TO_OPERATIONAL) 505 506 /* control_block, associated with each of the commands contains IOARCB, IOADLs 507 * memory for IOASA. Additional 3 * 16 bytes are allocated in order to support 508 * additional request parameters (of max size 48) any command. 509 */ 510 struct pmcraid_control_block { 511 struct pmcraid_ioarcb ioarcb; 512 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_EXTERNAL + 3]; 513 struct pmcraid_ioasa ioasa; 514 } __attribute__ ((packed, aligned(PMCRAID_IOARCB_ALIGNMENT))); 515 516 /* pmcraid_sglist - Scatter-gather list allocated for passthrough ioctls 517 */ 518 struct pmcraid_sglist { 519 u32 order; 520 u32 num_sg; 521 u32 num_dma_sg; 522 u32 buffer_len; 523 struct scatterlist scatterlist[1]; 524 }; 525 526 /* pmcraid_cmd - LLD representation of SCSI command */ 527 struct pmcraid_cmd { 528 529 /* Ptr and bus address of DMA.able control block for this command */ 530 struct pmcraid_control_block *ioa_cb; 531 dma_addr_t ioa_cb_bus_addr; 532 533 /* sense buffer for REQUEST SENSE command if firmware is not sending 534 * auto sense data 535 */ 536 dma_addr_t sense_buffer_dma; 537 dma_addr_t dma_handle; 538 u8 *sense_buffer; 539 540 /* pointer to mid layer structure of SCSI commands */ 541 struct scsi_cmnd *scsi_cmd; 542 543 struct list_head free_list; 544 struct completion wait_for_completion; 545 struct timer_list timer; /* needed for internal commands */ 546 u32 timeout; /* current timeout value */ 547 u32 index; /* index into the command list */ 548 u8 completion_req; /* for handling internal commands */ 549 u8 release; /* for handling completions */ 550 551 void (*cmd_done) (struct pmcraid_cmd *); 552 struct pmcraid_instance *drv_inst; 553 554 struct pmcraid_sglist *sglist; /* used for passthrough IOCTLs */ 555 556 /* scratch used during reset sequence */ 557 union { 558 unsigned long time_left; 559 struct pmcraid_resource_entry *res; 560 } u; 561 }; 562 563 /* 564 * Interrupt registers of IOA 565 */ 566 struct pmcraid_interrupts { 567 void __iomem *ioa_host_interrupt_reg; 568 void __iomem *ioa_host_interrupt_clr_reg; 569 void __iomem *ioa_host_interrupt_mask_reg; 570 void __iomem *ioa_host_interrupt_mask_clr_reg; 571 void __iomem *global_interrupt_mask_reg; 572 void __iomem *host_ioa_interrupt_reg; 573 void __iomem *host_ioa_interrupt_clr_reg; 574 }; 575 576 /* ISR parameters LLD allocates (one for each MSI-X if enabled) vectors */ 577 struct pmcraid_isr_param { 578 u8 hrrq_id; /* hrrq entry index */ 579 u16 vector; /* allocated msi-x vector */ 580 struct pmcraid_instance *drv_inst; 581 }; 582 583 /* AEN message header sent as part of event data to applications */ 584 struct pmcraid_aen_msg { 585 u32 hostno; 586 u32 length; 587 u8 reserved[8]; 588 u8 data[0]; 589 }; 590 591 struct pmcraid_hostrcb { 592 struct pmcraid_instance *drv_inst; 593 struct pmcraid_aen_msg *msg; 594 struct pmcraid_hcam_hdr *hcam; /* pointer to hcam buffer */ 595 struct pmcraid_cmd *cmd; /* pointer to command block used */ 596 dma_addr_t baddr; /* system address of hcam buffer */ 597 atomic_t ignore; /* process HCAM response ? */ 598 }; 599 600 #define PMCRAID_AEN_HDR_SIZE sizeof(struct pmcraid_aen_msg) 601 602 603 604 /* 605 * Per adapter structure maintained by LLD 606 */ 607 struct pmcraid_instance { 608 /* Array of allowed-to-be-exposed resources, initialized from 609 * Configutation Table, later updated with CCNs 610 */ 611 struct pmcraid_resource_entry *res_entries; 612 613 struct list_head free_res_q; /* res_entries lists for easy lookup */ 614 struct list_head used_res_q; /* List of to be exposed resources */ 615 spinlock_t resource_lock; /* spinlock to protect resource list */ 616 617 void __iomem *mapped_dma_addr; 618 void __iomem *ioa_status; /* Iomapped IOA status register */ 619 void __iomem *mailbox; /* Iomapped mailbox register */ 620 void __iomem *ioarrin; /* IOmapped IOARR IN register */ 621 622 struct pmcraid_interrupts int_regs; 623 struct pmcraid_chip_details *chip_cfg; 624 625 /* HostRCBs needed for HCAM */ 626 struct pmcraid_hostrcb ldn; 627 struct pmcraid_hostrcb ccn; 628 629 630 /* Bus address of start of HRRQ */ 631 dma_addr_t hrrq_start_bus_addr[PMCRAID_NUM_MSIX_VECTORS]; 632 633 /* Pointer to 1st entry of HRRQ */ 634 __be32 *hrrq_start[PMCRAID_NUM_MSIX_VECTORS]; 635 636 /* Pointer to last entry of HRRQ */ 637 __be32 *hrrq_end[PMCRAID_NUM_MSIX_VECTORS]; 638 639 /* Pointer to current pointer of hrrq */ 640 __be32 *hrrq_curr[PMCRAID_NUM_MSIX_VECTORS]; 641 642 /* Lock for HRRQ access */ 643 spinlock_t hrrq_lock[PMCRAID_NUM_MSIX_VECTORS]; 644 645 /* Expected toggle bit at host */ 646 u8 host_toggle_bit[PMCRAID_NUM_MSIX_VECTORS]; 647 648 /* No of Reset IOA retries . IOA marked dead if threshold exceeds */ 649 u8 ioa_reset_attempts; 650 #define PMCRAID_RESET_ATTEMPTS 3 651 652 /* Wait Q for threads to wait for Reset IOA completion */ 653 wait_queue_head_t reset_wait_q; 654 struct pmcraid_cmd *reset_cmd; 655 656 /* structures for supporting SIGIO based AEN. */ 657 struct fasync_struct *aen_queue; 658 struct mutex aen_queue_lock; /* lock for aen subscribers list */ 659 struct cdev cdev; 660 661 struct Scsi_Host *host; /* mid layer interface structure handle */ 662 struct pci_dev *pdev; /* PCI device structure handle */ 663 664 u8 current_log_level; /* default level for logging IOASC errors */ 665 666 u8 num_hrrq; /* Number of interrupt vectors allocated */ 667 dev_t dev; /* Major-Minor numbers for Char device */ 668 669 /* Used as ISR handler argument */ 670 struct pmcraid_isr_param hrrq_vector[PMCRAID_NUM_MSIX_VECTORS]; 671 672 /* configuration table */ 673 struct pmcraid_config_table *cfg_table; 674 dma_addr_t cfg_table_bus_addr; 675 676 /* structures related to command blocks */ 677 struct kmem_cache *cmd_cachep; /* cache for cmd blocks */ 678 struct pci_pool *control_pool; /* pool for control blocks */ 679 char cmd_pool_name[64]; /* name of cmd cache */ 680 char ctl_pool_name[64]; /* name of control cache */ 681 682 struct pmcraid_cmd *cmd_list[PMCRAID_MAX_CMD]; 683 684 struct list_head free_cmd_pool; 685 struct list_head pending_cmd_pool; 686 spinlock_t free_pool_lock; /* free pool lock */ 687 spinlock_t pending_pool_lock; /* pending pool lock */ 688 689 /* No of IO commands pending with FW */ 690 atomic_t outstanding_cmds; 691 692 /* should add/delete resources to mid-layer now ?*/ 693 atomic_t expose_resources; 694 695 /* Tasklet to handle deferred processing */ 696 struct tasklet_struct isr_tasklet[PMCRAID_NUM_MSIX_VECTORS]; 697 698 /* Work-queue (Shared) for deferred reset processing */ 699 struct work_struct worker_q; 700 701 702 u32 ioa_state:4; /* For IOA Reset sequence FSM */ 703 #define IOA_STATE_OPERATIONAL 0x0 704 #define IOA_STATE_UNKNOWN 0x1 705 #define IOA_STATE_DEAD 0x2 706 #define IOA_STATE_IN_SOFT_RESET 0x3 707 #define IOA_STATE_IN_HARD_RESET 0x4 708 #define IOA_STATE_IN_RESET_ALERT 0x5 709 #define IOA_STATE_IN_BRINGDOWN 0x6 710 #define IOA_STATE_IN_BRINGUP 0x7 711 712 u32 ioa_reset_in_progress:1; /* true if IOA reset is in progress */ 713 u32 ioa_hard_reset:1; /* TRUE if Hard Reset is needed */ 714 u32 ioa_unit_check:1; /* Indicates Unit Check condition */ 715 u32 ioa_bringdown:1; /* whether IOA needs to be brought down */ 716 u32 force_ioa_reset:1; /* force adapter reset ? */ 717 u32 reinit_cfg_table:1; /* reinit config table due to lost CCN */ 718 u32 ioa_shutdown_type:2;/* shutdown type used during reset */ 719 #define SHUTDOWN_NONE 0x0 720 #define SHUTDOWN_NORMAL 0x1 721 #define SHUTDOWN_ABBREV 0x2 722 723 }; 724 725 /* LLD maintained resource entry structure */ 726 struct pmcraid_resource_entry { 727 struct list_head queue; /* link to "to be exposed" resources */ 728 struct pmcraid_config_table_entry cfg_entry; 729 struct scsi_device *scsi_dev; /* Link scsi_device structure */ 730 atomic_t read_failures; /* count of failed READ commands */ 731 atomic_t write_failures; /* count of failed WRITE commands */ 732 733 /* To indicate add/delete/modify during CCN */ 734 u8 change_detected; 735 #define RES_CHANGE_ADD 0x1 /* add this to mid-layer */ 736 #define RES_CHANGE_DEL 0x2 /* remove this from mid-layer */ 737 738 u8 reset_progress; /* Device is resetting */ 739 740 /* 741 * When IOA asks for sync (i.e. IOASC = Not Ready, Sync Required), this 742 * flag will be set, mid layer will be asked to retry. In the next 743 * attempt, this flag will be checked in queuecommand() to set 744 * SYNC_COMPLETE flag in IOARCB (flag_0). 745 */ 746 u8 sync_reqd; 747 748 /* target indicates the mapped target_id assigned to this resource if 749 * this is VSET resource. For non-VSET resources this will be un-used 750 * or zero 751 */ 752 u8 target; 753 }; 754 755 /* Data structures used in IOASC error code logging */ 756 struct pmcraid_ioasc_error { 757 u32 ioasc_code; /* IOASC code */ 758 u8 log_level; /* default log level assignment. */ 759 char *error_string; 760 }; 761 762 /* Initial log_level assignments for various IOASCs */ 763 #define IOASC_LOG_LEVEL_NONE 0x0 /* no logging */ 764 #define IOASC_LOG_LEVEL_MUST 0x1 /* must log: all high-severity errors */ 765 #define IOASC_LOG_LEVEL_HARD 0x2 /* optional – low severity errors */ 766 767 /* Error information maintained by LLD. LLD initializes the pmcraid_error_table 768 * statically. 769 */ 770 static struct pmcraid_ioasc_error pmcraid_ioasc_error_table[] = { 771 {0x01180600, IOASC_LOG_LEVEL_MUST, 772 "Recovered Error, soft media error, sector reassignment suggested"}, 773 {0x015D0000, IOASC_LOG_LEVEL_MUST, 774 "Recovered Error, failure prediction thresold exceeded"}, 775 {0x015D9200, IOASC_LOG_LEVEL_MUST, 776 "Recovered Error, soft Cache Card Battery error thresold"}, 777 {0x015D9200, IOASC_LOG_LEVEL_MUST, 778 "Recovered Error, soft Cache Card Battery error thresold"}, 779 {0x02048000, IOASC_LOG_LEVEL_MUST, 780 "Not Ready, IOA Reset Required"}, 781 {0x02408500, IOASC_LOG_LEVEL_MUST, 782 "Not Ready, IOA microcode download required"}, 783 {0x03110B00, IOASC_LOG_LEVEL_MUST, 784 "Medium Error, data unreadable, reassignment suggested"}, 785 {0x03110C00, IOASC_LOG_LEVEL_MUST, 786 "Medium Error, data unreadable do not reassign"}, 787 {0x03310000, IOASC_LOG_LEVEL_MUST, 788 "Medium Error, media corrupted"}, 789 {0x04050000, IOASC_LOG_LEVEL_MUST, 790 "Hardware Error, IOA can't communicate with device"}, 791 {0x04080000, IOASC_LOG_LEVEL_MUST, 792 "Hardware Error, device bus error"}, 793 {0x04080000, IOASC_LOG_LEVEL_MUST, 794 "Hardware Error, device bus is not functioning"}, 795 {0x04118000, IOASC_LOG_LEVEL_MUST, 796 "Hardware Error, IOA reserved area data check"}, 797 {0x04118100, IOASC_LOG_LEVEL_MUST, 798 "Hardware Error, IOA reserved area invalid data pattern"}, 799 {0x04118200, IOASC_LOG_LEVEL_MUST, 800 "Hardware Error, IOA reserved area LRC error"}, 801 {0x04320000, IOASC_LOG_LEVEL_MUST, 802 "Hardware Error, reassignment space exhausted"}, 803 {0x04330000, IOASC_LOG_LEVEL_MUST, 804 "Hardware Error, data transfer underlength error"}, 805 {0x04330000, IOASC_LOG_LEVEL_MUST, 806 "Hardware Error, data transfer overlength error"}, 807 {0x04418000, IOASC_LOG_LEVEL_MUST, 808 "Hardware Error, PCI bus error"}, 809 {0x04440000, IOASC_LOG_LEVEL_MUST, 810 "Hardware Error, device error"}, 811 {0x04448300, IOASC_LOG_LEVEL_MUST, 812 "Hardware Error, undefined device response"}, 813 {0x04448400, IOASC_LOG_LEVEL_MUST, 814 "Hardware Error, IOA microcode error"}, 815 {0x04448600, IOASC_LOG_LEVEL_MUST, 816 "Hardware Error, IOA reset required"}, 817 {0x04449200, IOASC_LOG_LEVEL_MUST, 818 "Hardware Error, hard Cache Fearuee Card Battery error"}, 819 {0x0444A000, IOASC_LOG_LEVEL_MUST, 820 "Hardware Error, failed device altered"}, 821 {0x0444A200, IOASC_LOG_LEVEL_MUST, 822 "Hardware Error, data check after reassignment"}, 823 {0x0444A300, IOASC_LOG_LEVEL_MUST, 824 "Hardware Error, LRC error after reassignment"}, 825 {0x044A0000, IOASC_LOG_LEVEL_MUST, 826 "Hardware Error, device bus error (msg/cmd phase)"}, 827 {0x04670400, IOASC_LOG_LEVEL_MUST, 828 "Hardware Error, new device can't be used"}, 829 {0x04678000, IOASC_LOG_LEVEL_MUST, 830 "Hardware Error, invalid multiadapter configuration"}, 831 {0x04678100, IOASC_LOG_LEVEL_MUST, 832 "Hardware Error, incorrect connection between enclosures"}, 833 {0x04678200, IOASC_LOG_LEVEL_MUST, 834 "Hardware Error, connections exceed IOA design limits"}, 835 {0x04678300, IOASC_LOG_LEVEL_MUST, 836 "Hardware Error, incorrect multipath connection"}, 837 {0x04679000, IOASC_LOG_LEVEL_MUST, 838 "Hardware Error, command to LUN failed"}, 839 {0x064C8000, IOASC_LOG_LEVEL_HARD, 840 "Unit Attention, cache exists for missing/failed device"}, 841 {0x06670100, IOASC_LOG_LEVEL_HARD, 842 "Unit Attention, incompatible exposed mode device"}, 843 {0x06670600, IOASC_LOG_LEVEL_HARD, 844 "Unit Attention, attachment of logical unit failed"}, 845 {0x06678000, IOASC_LOG_LEVEL_MUST, 846 "Unit Attention, cables exceed connective design limit"}, 847 {0x06678300, IOASC_LOG_LEVEL_MUST, 848 "Unit Attention, incomplete multipath connection between" \ 849 "IOA and enclosure"}, 850 {0x06678400, IOASC_LOG_LEVEL_MUST, 851 "Unit Attention, incomplete multipath connection between" \ 852 "device and enclosure"}, 853 {0x06678500, IOASC_LOG_LEVEL_MUST, 854 "Unit Attention, incomplete multipath connection between" \ 855 "IOA and remote IOA"}, 856 {0x06678600, IOASC_LOG_LEVEL_HARD, 857 "Unit Attention, missing remote IOA"}, 858 {0x06679100, IOASC_LOG_LEVEL_HARD, 859 "Unit Attention, enclosure doesn't support required multipath" \ 860 "function"}, 861 {0x06698200, IOASC_LOG_LEVEL_HARD, 862 "Unit Attention, corrupt array parity detected on device"}, 863 {0x066B0200, IOASC_LOG_LEVEL_MUST, 864 "Unit Attention, array exposed"}, 865 {0x066B8200, IOASC_LOG_LEVEL_HARD, 866 "Unit Attention, exposed array is still protected"}, 867 {0x066B9200, IOASC_LOG_LEVEL_MUST, 868 "Unit Attention, Multipath redundancy level got worse"}, 869 {0x07270000, IOASC_LOG_LEVEL_HARD, 870 "Data Protect, device is read/write protected by IOA"}, 871 {0x07278000, IOASC_LOG_LEVEL_HARD, 872 "Data Protect, IOA doesn't support device attribute"}, 873 {0x07278100, IOASC_LOG_LEVEL_HARD, 874 "Data Protect, NVRAM mirroring prohibited"}, 875 {0x07278400, IOASC_LOG_LEVEL_MUST, 876 "Data Protect, array is short 2 or more devices"}, 877 {0x07278600, IOASC_LOG_LEVEL_MUST, 878 "Data Protect, exposed array is short a required device"}, 879 {0x07278700, IOASC_LOG_LEVEL_MUST, 880 "Data Protect, array members not at required addresses"}, 881 {0x07278800, IOASC_LOG_LEVEL_MUST, 882 "Data Protect, exposed mode device resource address conflict"}, 883 {0x07278900, IOASC_LOG_LEVEL_MUST, 884 "Data Protect, incorrect resource address of exposed mode device"}, 885 {0x07278A00, IOASC_LOG_LEVEL_MUST, 886 "Data Protect, Array is missing a device and parity is out of sync"}, 887 {0x07278B00, IOASC_LOG_LEVEL_MUST, 888 "Data Protect, maximum number of arrays already exist"}, 889 {0x07278C00, IOASC_LOG_LEVEL_HARD, 890 "Data Protect, cannot locate cache data for device"}, 891 {0x07278D00, IOASC_LOG_LEVEL_HARD, 892 "Data Protect, cache data exits for a changed device"}, 893 {0x07279100, IOASC_LOG_LEVEL_MUST, 894 "Data Protect, detection of a device requiring format"}, 895 {0x07279200, IOASC_LOG_LEVEL_MUST, 896 "Data Protect, IOA exceeds maximum number of devices"}, 897 {0x07279600, IOASC_LOG_LEVEL_MUST, 898 "Data Protect, missing array, volume set is not functional"}, 899 {0x07279700, IOASC_LOG_LEVEL_MUST, 900 "Data Protect, single device for a volume set"}, 901 {0x07279800, IOASC_LOG_LEVEL_MUST, 902 "Data Protect, missing multiple devices for a volume set"}, 903 {0x07279900, IOASC_LOG_LEVEL_HARD, 904 "Data Protect, maximum number of volument sets already exists"}, 905 {0x07279A00, IOASC_LOG_LEVEL_MUST, 906 "Data Protect, other volume set problem"}, 907 }; 908 909 /* macros to help in debugging */ 910 #define pmcraid_err(...) \ 911 printk(KERN_ERR "MaxRAID: "__VA_ARGS__) 912 913 #define pmcraid_info(...) \ 914 if (pmcraid_debug_log) \ 915 printk(KERN_INFO "MaxRAID: "__VA_ARGS__) 916 917 /* check if given command is a SCSI READ or SCSI WRITE command */ 918 #define SCSI_READ_CMD 0x1 /* any of SCSI READ commands */ 919 #define SCSI_WRITE_CMD 0x2 /* any of SCSI WRITE commands */ 920 #define SCSI_CMD_TYPE(opcode) \ 921 ({ u8 op = opcode; u8 __type = 0;\ 922 if (op == READ_6 || op == READ_10 || op == READ_12 || op == READ_16)\ 923 __type = SCSI_READ_CMD;\ 924 else if (op == WRITE_6 || op == WRITE_10 || op == WRITE_12 || \ 925 op == WRITE_16)\ 926 __type = SCSI_WRITE_CMD;\ 927 __type;\ 928 }) 929 930 #define IS_SCSI_READ_WRITE(opcode) \ 931 ({ u8 __type = SCSI_CMD_TYPE(opcode); \ 932 (__type == SCSI_READ_CMD || __type == SCSI_WRITE_CMD) ? 1 : 0;\ 933 }) 934 935 936 /* 937 * pmcraid_ioctl_header - definition of header structure that preceeds all the 938 * buffers given as ioctl arguements. 939 * 940 * .signature : always ASCII string, "PMCRAID" 941 * .reserved : not used 942 * .buffer_length : length of the buffer following the header 943 */ 944 struct pmcraid_ioctl_header { 945 u8 signature[8]; 946 u32 reserved; 947 u32 buffer_length; 948 }; 949 950 #define PMCRAID_IOCTL_SIGNATURE "PMCRAID" 951 952 953 /* 954 * pmcraid_event_details - defines AEN details that apps can retrieve from LLD 955 * 956 * .rcb_ccn - complete RCB of CCN 957 * .rcb_ldn - complete RCB of CCN 958 */ 959 struct pmcraid_event_details { 960 struct pmcraid_hcam_ccn rcb_ccn; 961 struct pmcraid_hcam_ldn rcb_ldn; 962 }; 963 964 /* 965 * pmcraid_driver_ioctl_buffer - structure passed as argument to most of the 966 * PMC driver handled ioctls. 967 */ 968 struct pmcraid_driver_ioctl_buffer { 969 struct pmcraid_ioctl_header ioctl_header; 970 struct pmcraid_event_details event_details; 971 }; 972 973 /* 974 * pmcraid_passthrough_ioctl_buffer - structure given as argument to 975 * passthrough(or firmware handled) IOCTL commands. Note that ioarcb requires 976 * 32-byte alignment so, it is necessary to pack this structure to avoid any 977 * holes between ioctl_header and passthrough buffer 978 * 979 * .ioactl_header : ioctl header 980 * .ioarcb : filled-up ioarcb buffer, driver always reads this buffer 981 * .ioasa : buffer for ioasa, driver fills this with IOASA from firmware 982 * .request_buffer: The I/O buffer (flat), driver reads/writes to this based on 983 * the transfer directions passed in ioarcb.flags0. Contents 984 * of this buffer are valid only when ioarcb.data_transfer_len 985 * is not zero. 986 */ 987 struct pmcraid_passthrough_ioctl_buffer { 988 struct pmcraid_ioctl_header ioctl_header; 989 struct pmcraid_ioarcb ioarcb; 990 struct pmcraid_ioasa ioasa; 991 u8 request_buffer[1]; 992 } __attribute__ ((packed)); 993 994 /* 995 * keys to differentiate between driver handled IOCTLs and passthrough 996 * IOCTLs passed to IOA. driver determines the ioctl type using macro 997 * _IOC_TYPE 998 */ 999 #define PMCRAID_DRIVER_IOCTL 'D' 1000 #define PMCRAID_PASSTHROUGH_IOCTL 'F' 1001 1002 #define DRV_IOCTL(n, size) \ 1003 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_DRIVER_IOCTL, (n), (size)) 1004 1005 #define FMW_IOCTL(n, size) \ 1006 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_PASSTHROUGH_IOCTL, (n), (size)) 1007 1008 /* 1009 * _ARGSIZE: macro that gives size of the argument type passed to an IOCTL cmd. 1010 * This is to facilitate applications avoiding un-necessary memory allocations. 1011 * For example, most of driver handled ioctls do not require ioarcb, ioasa. 1012 */ 1013 #define _ARGSIZE(arg) (sizeof(struct pmcraid_ioctl_header) + sizeof(arg)) 1014 1015 /* Driver handled IOCTL command definitions */ 1016 1017 #define PMCRAID_IOCTL_RESET_ADAPTER \ 1018 DRV_IOCTL(5, sizeof(struct pmcraid_ioctl_header)) 1019 1020 /* passthrough/firmware handled commands */ 1021 #define PMCRAID_IOCTL_PASSTHROUGH_COMMAND \ 1022 FMW_IOCTL(1, sizeof(struct pmcraid_passthrough_ioctl_buffer)) 1023 1024 #define PMCRAID_IOCTL_DOWNLOAD_MICROCODE \ 1025 FMW_IOCTL(2, sizeof(struct pmcraid_passthrough_ioctl_buffer)) 1026 1027 1028 #endif /* _PMCRAID_H */ 1029