1f5860992SSakthivel K /* 2f5860992SSakthivel K * PMC-Sierra SPCv/ve 8088/8089 SAS/SATA based host adapters driver 3f5860992SSakthivel K * 4f5860992SSakthivel K * Copyright (c) 2008-2009 PMC-Sierra, Inc., 5f5860992SSakthivel K * All rights reserved. 6f5860992SSakthivel K * 7f5860992SSakthivel K * Redistribution and use in source and binary forms, with or without 8f5860992SSakthivel K * modification, are permitted provided that the following conditions 9f5860992SSakthivel K * are met: 10f5860992SSakthivel K * 1. Redistributions of source code must retain the above copyright 11f5860992SSakthivel K * notice, this list of conditions, and the following disclaimer, 12f5860992SSakthivel K * without modification. 13f5860992SSakthivel K * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14f5860992SSakthivel K * substantially similar to the "NO WARRANTY" disclaimer below 15f5860992SSakthivel K * ("Disclaimer") and any redistribution must be conditioned upon 16f5860992SSakthivel K * including a substantially similar Disclaimer requirement for further 17f5860992SSakthivel K * binary redistribution. 18f5860992SSakthivel K * 3. Neither the names of the above-listed copyright holders nor the names 19f5860992SSakthivel K * of any contributors may be used to endorse or promote products derived 20f5860992SSakthivel K * from this software without specific prior written permission. 21f5860992SSakthivel K * 22f5860992SSakthivel K * Alternatively, this software may be distributed under the terms of the 23f5860992SSakthivel K * GNU General Public License ("GPL") version 2 as published by the Free 24f5860992SSakthivel K * Software Foundation. 25f5860992SSakthivel K * 26f5860992SSakthivel K * NO WARRANTY 27f5860992SSakthivel K * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28f5860992SSakthivel K * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29f5860992SSakthivel K * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30f5860992SSakthivel K * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31f5860992SSakthivel K * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32f5860992SSakthivel K * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33f5860992SSakthivel K * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34f5860992SSakthivel K * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35f5860992SSakthivel K * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36f5860992SSakthivel K * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37f5860992SSakthivel K * POSSIBILITY OF SUCH DAMAGES. 38f5860992SSakthivel K * 39f5860992SSakthivel K */ 40f5860992SSakthivel K #include <linux/slab.h> 41f5860992SSakthivel K #include "pm8001_sas.h" 42f5860992SSakthivel K #include "pm80xx_hwi.h" 43f5860992SSakthivel K #include "pm8001_chips.h" 44f5860992SSakthivel K #include "pm8001_ctl.h" 45f5860992SSakthivel K 46f5860992SSakthivel K #define SMP_DIRECT 1 47f5860992SSakthivel K #define SMP_INDIRECT 2 48d078b511SAnand Kumar Santhanam 49d078b511SAnand Kumar Santhanam 50d078b511SAnand Kumar Santhanam int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shift_value) 51d078b511SAnand Kumar Santhanam { 52d078b511SAnand Kumar Santhanam u32 reg_val; 53d078b511SAnand Kumar Santhanam unsigned long start; 54d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, shift_value); 55d078b511SAnand Kumar Santhanam /* confirm the setting is written */ 56d078b511SAnand Kumar Santhanam start = jiffies + HZ; /* 1 sec */ 57d078b511SAnand Kumar Santhanam do { 58d078b511SAnand Kumar Santhanam reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER); 59d078b511SAnand Kumar Santhanam } while ((reg_val != shift_value) && time_before(jiffies, start)); 60d078b511SAnand Kumar Santhanam if (reg_val != shift_value) { 61d078b511SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 62d078b511SAnand Kumar Santhanam pm8001_printk("TIMEOUT:MEMBASE_II_SHIFT_REGISTER" 63d078b511SAnand Kumar Santhanam " = 0x%x\n", reg_val)); 64d078b511SAnand Kumar Santhanam return -1; 65d078b511SAnand Kumar Santhanam } 66d078b511SAnand Kumar Santhanam return 0; 67d078b511SAnand Kumar Santhanam } 68d078b511SAnand Kumar Santhanam 69d078b511SAnand Kumar Santhanam void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset, 70d078b511SAnand Kumar Santhanam const void *destination, 71d078b511SAnand Kumar Santhanam u32 dw_count, u32 bus_base_number) 72d078b511SAnand Kumar Santhanam { 73d078b511SAnand Kumar Santhanam u32 index, value, offset; 74d078b511SAnand Kumar Santhanam u32 *destination1; 75d078b511SAnand Kumar Santhanam destination1 = (u32 *)destination; 76d078b511SAnand Kumar Santhanam 77d078b511SAnand Kumar Santhanam for (index = 0; index < dw_count; index += 4, destination1++) { 78d078b511SAnand Kumar Santhanam offset = (soffset + index / 4); 79d078b511SAnand Kumar Santhanam if (offset < (64 * 1024)) { 80d078b511SAnand Kumar Santhanam value = pm8001_cr32(pm8001_ha, bus_base_number, offset); 81d078b511SAnand Kumar Santhanam *destination1 = cpu_to_le32(value); 82d078b511SAnand Kumar Santhanam } 83d078b511SAnand Kumar Santhanam } 84d078b511SAnand Kumar Santhanam return; 85d078b511SAnand Kumar Santhanam } 86d078b511SAnand Kumar Santhanam 87d078b511SAnand Kumar Santhanam ssize_t pm80xx_get_fatal_dump(struct device *cdev, 88d078b511SAnand Kumar Santhanam struct device_attribute *attr, char *buf) 89d078b511SAnand Kumar Santhanam { 90d078b511SAnand Kumar Santhanam struct Scsi_Host *shost = class_to_shost(cdev); 91d078b511SAnand Kumar Santhanam struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 92d078b511SAnand Kumar Santhanam struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 93d078b511SAnand Kumar Santhanam void __iomem *fatal_table_address = pm8001_ha->fatal_tbl_addr; 94d078b511SAnand Kumar Santhanam u32 accum_len , reg_val, index, *temp; 95d078b511SAnand Kumar Santhanam unsigned long start; 96d078b511SAnand Kumar Santhanam u8 *direct_data; 97d078b511SAnand Kumar Santhanam char *fatal_error_data = buf; 98d078b511SAnand Kumar Santhanam 99d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = buf; 100d078b511SAnand Kumar Santhanam if (pm8001_ha->chip_id == chip_8001) { 101d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 102d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 103d078b511SAnand Kumar Santhanam "Not supported for SPC controller"); 104d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 105d078b511SAnand Kumar Santhanam (char *)buf; 106d078b511SAnand Kumar Santhanam } 107d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 108d078b511SAnand Kumar Santhanam PM8001_IO_DBG(pm8001_ha, 109d078b511SAnand Kumar Santhanam pm8001_printk("forensic_info TYPE_NON_FATAL..............\n")); 110d078b511SAnand Kumar Santhanam direct_data = (u8 *)fatal_error_data; 111d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL; 112d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET; 113d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 114d078b511SAnand Kumar Santhanam 115d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = direct_data; 116d078b511SAnand Kumar Santhanam 117d078b511SAnand Kumar Santhanam /* start to get data */ 118d078b511SAnand Kumar Santhanam /* Program the MEMBASE II Shifting Register with 0x00.*/ 119d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 120d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 121d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 122d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 123d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 124d078b511SAnand Kumar Santhanam } 125cf370066SViswas G 126d078b511SAnand Kumar Santhanam /* Read until accum_len is retrived */ 127d078b511SAnand Kumar Santhanam accum_len = pm8001_mr32(fatal_table_address, 128d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 129d078b511SAnand Kumar Santhanam PM8001_IO_DBG(pm8001_ha, pm8001_printk("accum_len 0x%x\n", 130d078b511SAnand Kumar Santhanam accum_len)); 131d078b511SAnand Kumar Santhanam if (accum_len == 0xFFFFFFFF) { 132d078b511SAnand Kumar Santhanam PM8001_IO_DBG(pm8001_ha, 133d078b511SAnand Kumar Santhanam pm8001_printk("Possible PCI issue 0x%x not expected\n", 134d078b511SAnand Kumar Santhanam accum_len)); 135cf370066SViswas G return -EIO; 136d078b511SAnand Kumar Santhanam } 137d078b511SAnand Kumar Santhanam if (accum_len == 0 || accum_len >= 0x100000) { 138d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 139d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 140d078b511SAnand Kumar Santhanam "%08x ", 0xFFFFFFFF); 141d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 142d078b511SAnand Kumar Santhanam (char *)buf; 143d078b511SAnand Kumar Santhanam } 144d078b511SAnand Kumar Santhanam temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 145d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 0) { 146d078b511SAnand Kumar Santhanam moreData: 147d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_data) { 148d078b511SAnand Kumar Santhanam /* Data is in bar, copy to host memory */ 149d078b511SAnand Kumar Santhanam pm80xx_pci_mem_copy(pm8001_ha, pm8001_ha->fatal_bar_loc, 150d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr, 151d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len , 152d078b511SAnand Kumar Santhanam 1); 153d078b511SAnand Kumar Santhanam } 154d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc += 155d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 156d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_offset += 157d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 158d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset += 159d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 160d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 161d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 162d078b511SAnand Kumar Santhanam 163d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_last_offset >= accum_len) { 164d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 165d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 166d078b511SAnand Kumar Santhanam "%08x ", 3); 167d078b511SAnand Kumar Santhanam for (index = 0; index < (SYSFS_OFFSET / 4); index++) { 168d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 169d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 170d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 171d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 172d078b511SAnand Kumar Santhanam } 173d078b511SAnand Kumar Santhanam 174d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 175d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 1; 176d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset = 0; 177d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 178d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 179d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 180d078b511SAnand Kumar Santhanam (char *)buf; 181d078b511SAnand Kumar Santhanam } 182d078b511SAnand Kumar Santhanam if (pm8001_ha->fatal_bar_loc < (64 * 1024)) { 183d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 184d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 185d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 186d078b511SAnand Kumar Santhanam "%08x ", 2); 187d078b511SAnand Kumar Santhanam for (index = 0; index < (SYSFS_OFFSET / 4); index++) { 188d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 189d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 190d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 191d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 192d078b511SAnand Kumar Santhanam } 193d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 194d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 195d078b511SAnand Kumar Santhanam (char *)buf; 196d078b511SAnand Kumar Santhanam } 197d078b511SAnand Kumar Santhanam 198d078b511SAnand Kumar Santhanam /* Increment the MEMBASE II Shifting Register value by 0x100.*/ 199d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 200d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 201d078b511SAnand Kumar Santhanam "%08x ", 2); 202d078b511SAnand Kumar Santhanam for (index = 0; index < 256; index++) { 203d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 204d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 205d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 206d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 207d078b511SAnand Kumar Santhanam } 208d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset += 0x100; 209d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 210d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 211d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 212d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 213d078b511SAnand Kumar Santhanam (char *)buf; 214d078b511SAnand Kumar Santhanam } 215d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 1) { 216d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset = 0; 217d078b511SAnand Kumar Santhanam /* Read 64K of the debug data. */ 218d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 219d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 220d078b511SAnand Kumar Santhanam pm8001_mw32(fatal_table_address, 221d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 222d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_HANDSHAKE_RDY); 223d078b511SAnand Kumar Santhanam 224d078b511SAnand Kumar Santhanam /* Poll FDDHSHK until clear */ 225d078b511SAnand Kumar Santhanam start = jiffies + (2 * HZ); /* 2 sec */ 226d078b511SAnand Kumar Santhanam 227d078b511SAnand Kumar Santhanam do { 228d078b511SAnand Kumar Santhanam reg_val = pm8001_mr32(fatal_table_address, 229d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE); 230d078b511SAnand Kumar Santhanam } while ((reg_val) && time_before(jiffies, start)); 231d078b511SAnand Kumar Santhanam 232d078b511SAnand Kumar Santhanam if (reg_val != 0) { 233d078b511SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 234d078b511SAnand Kumar Santhanam pm8001_printk("TIMEOUT:MEMBASE_II_SHIFT_REGISTER" 235d078b511SAnand Kumar Santhanam " = 0x%x\n", reg_val)); 236cf370066SViswas G return -EIO; 237d078b511SAnand Kumar Santhanam } 238d078b511SAnand Kumar Santhanam 239d078b511SAnand Kumar Santhanam /* Read the next 64K of the debug data. */ 240d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 241d078b511SAnand Kumar Santhanam if (pm8001_mr32(fatal_table_address, 242d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_STATUS) != 243d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) { 244d078b511SAnand Kumar Santhanam pm8001_mw32(fatal_table_address, 245d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 0); 246d078b511SAnand Kumar Santhanam goto moreData; 247d078b511SAnand Kumar Santhanam } else { 248d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 249d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 250d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 251d078b511SAnand Kumar Santhanam "%08x ", 4); 252d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0xFFFFFFFF; 253d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len = 0; 254d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_offset = 0; 255d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 256d078b511SAnand Kumar Santhanam } 257d078b511SAnand Kumar Santhanam } 258d078b511SAnand Kumar Santhanam 259d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 260d078b511SAnand Kumar Santhanam (char *)buf; 261d078b511SAnand Kumar Santhanam } 262d078b511SAnand Kumar Santhanam 263f5860992SSakthivel K /** 264f5860992SSakthivel K * read_main_config_table - read the configure table and save it. 265f5860992SSakthivel K * @pm8001_ha: our hba card information 266f5860992SSakthivel K */ 267f5860992SSakthivel K static void read_main_config_table(struct pm8001_hba_info *pm8001_ha) 268f5860992SSakthivel K { 269f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 270f5860992SSakthivel K 271f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature = 272f5860992SSakthivel K pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); 273f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev = 274f5860992SSakthivel K pm8001_mr32(address, MAIN_INTERFACE_REVISION); 275f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev = 276f5860992SSakthivel K pm8001_mr32(address, MAIN_FW_REVISION); 277f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io = 278f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); 279f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl = 280f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); 281f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag = 282f5860992SSakthivel K pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); 283f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset = 284f5860992SSakthivel K pm8001_mr32(address, MAIN_GST_OFFSET); 285f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset = 286f5860992SSakthivel K pm8001_mr32(address, MAIN_IBQ_OFFSET); 287f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset = 288f5860992SSakthivel K pm8001_mr32(address, MAIN_OBQ_OFFSET); 289f5860992SSakthivel K 290f5860992SSakthivel K /* read Error Dump Offset and Length */ 291f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 = 292f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); 293f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 = 294f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); 295f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 = 296f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); 297f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 = 298f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); 299f5860992SSakthivel K 300f5860992SSakthivel K /* read GPIO LED settings from the configuration table */ 301f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping = 302f5860992SSakthivel K pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); 303f5860992SSakthivel K 304f5860992SSakthivel K /* read analog Setting offset from the configuration table */ 305f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset = 306f5860992SSakthivel K pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); 307f5860992SSakthivel K 308f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset = 309f5860992SSakthivel K pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); 310f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset = 311f5860992SSakthivel K pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); 3128414cd80SViswas G /* read port recover and reset timeout */ 3138414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer = 3148414cd80SViswas G pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); 31524fff017SViswas G /* read ILA and inactive firmware version */ 31624fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version = 31724fff017SViswas G pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE); 31824fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version = 31924fff017SViswas G pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION); 320f5860992SSakthivel K } 321f5860992SSakthivel K 322f5860992SSakthivel K /** 323f5860992SSakthivel K * read_general_status_table - read the general status table and save it. 324f5860992SSakthivel K * @pm8001_ha: our hba card information 325f5860992SSakthivel K */ 326f5860992SSakthivel K static void read_general_status_table(struct pm8001_hba_info *pm8001_ha) 327f5860992SSakthivel K { 328f5860992SSakthivel K void __iomem *address = pm8001_ha->general_stat_tbl_addr; 329f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate = 330f5860992SSakthivel K pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); 331f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 = 332f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); 333f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 = 334f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); 335f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt = 336f5860992SSakthivel K pm8001_mr32(address, GST_MSGUTCNT_OFFSET); 337f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt = 338f5860992SSakthivel K pm8001_mr32(address, GST_IOPTCNT_OFFSET); 339f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val = 340f5860992SSakthivel K pm8001_mr32(address, GST_GPIO_INPUT_VAL); 341f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[0] = 342f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET0); 343f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[1] = 344f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET1); 345f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[2] = 346f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET2); 347f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[3] = 348f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET3); 349f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[4] = 350f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET4); 351f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[5] = 352f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET5); 353f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[6] = 354f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET6); 355f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[7] = 356f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET7); 357f5860992SSakthivel K } 358f5860992SSakthivel K /** 359f5860992SSakthivel K * read_phy_attr_table - read the phy attribute table and save it. 360f5860992SSakthivel K * @pm8001_ha: our hba card information 361f5860992SSakthivel K */ 362f5860992SSakthivel K static void read_phy_attr_table(struct pm8001_hba_info *pm8001_ha) 363f5860992SSakthivel K { 364f5860992SSakthivel K void __iomem *address = pm8001_ha->pspa_q_tbl_addr; 365f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[0] = 366f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); 367f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[1] = 368f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); 369f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[2] = 370f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); 371f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[3] = 372f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); 373f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[4] = 374f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); 375f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[5] = 376f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); 377f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[6] = 378f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); 379f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[7] = 380f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); 381f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[8] = 382f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); 383f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[9] = 384f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); 385f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[10] = 386f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); 387f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[11] = 388f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); 389f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[12] = 390f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); 391f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[13] = 392f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); 393f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[14] = 394f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); 395f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[15] = 396f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); 397f5860992SSakthivel K 398f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[0] = 399f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); 400f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[1] = 401f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); 402f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[2] = 403f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); 404f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[3] = 405f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); 406f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[4] = 407f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); 408f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[5] = 409f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); 410f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[6] = 411f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); 412f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[7] = 413f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); 414f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[8] = 415f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); 416f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[9] = 417f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); 418f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[10] = 419f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); 420f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[11] = 421f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); 422f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[12] = 423f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); 424f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[13] = 425f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); 426f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[14] = 427f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); 428f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[15] = 429f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); 430f5860992SSakthivel K 431f5860992SSakthivel K } 432f5860992SSakthivel K 433f5860992SSakthivel K /** 434f5860992SSakthivel K * read_inbnd_queue_table - read the inbound queue table and save it. 435f5860992SSakthivel K * @pm8001_ha: our hba card information 436f5860992SSakthivel K */ 437f5860992SSakthivel K static void read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 438f5860992SSakthivel K { 439f5860992SSakthivel K int i; 440f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 441f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) { 442f5860992SSakthivel K u32 offset = i * 0x20; 443f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 444f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 445f5860992SSakthivel K (offset + IB_PIPCI_BAR))); 446f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 447f5860992SSakthivel K pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); 448f5860992SSakthivel K } 449f5860992SSakthivel K } 450f5860992SSakthivel K 451f5860992SSakthivel K /** 452f5860992SSakthivel K * read_outbnd_queue_table - read the outbound queue table and save it. 453f5860992SSakthivel K * @pm8001_ha: our hba card information 454f5860992SSakthivel K */ 455f5860992SSakthivel K static void read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 456f5860992SSakthivel K { 457f5860992SSakthivel K int i; 458f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 459f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) { 460f5860992SSakthivel K u32 offset = i * 0x24; 461f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 462f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 463f5860992SSakthivel K (offset + OB_CIPCI_BAR))); 464f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 465f5860992SSakthivel K pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); 466f5860992SSakthivel K } 467f5860992SSakthivel K } 468f5860992SSakthivel K 469f5860992SSakthivel K /** 470f5860992SSakthivel K * init_default_table_values - init the default table. 471f5860992SSakthivel K * @pm8001_ha: our hba card information 472f5860992SSakthivel K */ 473f5860992SSakthivel K static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) 474f5860992SSakthivel K { 475f5860992SSakthivel K int i; 476f5860992SSakthivel K u32 offsetib, offsetob; 477f5860992SSakthivel K void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr; 478f5860992SSakthivel K void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr; 479f5860992SSakthivel K 480f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr = 481f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_hi; 482f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr = 483f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_lo; 484f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size = 485f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 486f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity = 0x01; 487f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr = 488f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_hi; 489f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr = 490f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_lo; 491f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size = 492f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 493f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01; 494f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01; 495f5860992SSakthivel K 496c6b9ef57SSakthivel K /* Disable end to end CRC checking */ 497c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16); 498c6b9ef57SSakthivel K 499f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) { 500f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt = 5019504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30); 502f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].upper_base_addr = 503f5860992SSakthivel K pm8001_ha->memoryMap.region[IB + i].phys_addr_hi; 504f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].lower_base_addr = 505f5860992SSakthivel K pm8001_ha->memoryMap.region[IB + i].phys_addr_lo; 506f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].base_virt = 507f5860992SSakthivel K (u8 *)pm8001_ha->memoryMap.region[IB + i].virt_ptr; 508f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].total_length = 509f5860992SSakthivel K pm8001_ha->memoryMap.region[IB + i].total_len; 510f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr = 511f5860992SSakthivel K pm8001_ha->memoryMap.region[CI + i].phys_addr_hi; 512f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr = 513f5860992SSakthivel K pm8001_ha->memoryMap.region[CI + i].phys_addr_lo; 514f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_virt = 515f5860992SSakthivel K pm8001_ha->memoryMap.region[CI + i].virt_ptr; 516f5860992SSakthivel K offsetib = i * 0x20; 517f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 518f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressib, 519f5860992SSakthivel K (offsetib + 0x14))); 520f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 521f5860992SSakthivel K pm8001_mr32(addressib, (offsetib + 0x18)); 522f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].producer_idx = 0; 523f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].consumer_index = 0; 524f5860992SSakthivel K } 525f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) { 526f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].element_size_cnt = 5279504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30); 528f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].upper_base_addr = 529f5860992SSakthivel K pm8001_ha->memoryMap.region[OB + i].phys_addr_hi; 530f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].lower_base_addr = 531f5860992SSakthivel K pm8001_ha->memoryMap.region[OB + i].phys_addr_lo; 532f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].base_virt = 533f5860992SSakthivel K (u8 *)pm8001_ha->memoryMap.region[OB + i].virt_ptr; 534f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].total_length = 535f5860992SSakthivel K pm8001_ha->memoryMap.region[OB + i].total_len; 536f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr = 537f5860992SSakthivel K pm8001_ha->memoryMap.region[PI + i].phys_addr_hi; 538f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr = 539f5860992SSakthivel K pm8001_ha->memoryMap.region[PI + i].phys_addr_lo; 540f5860992SSakthivel K /* interrupt vector based on oq */ 541f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24); 542f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_virt = 543f5860992SSakthivel K pm8001_ha->memoryMap.region[PI + i].virt_ptr; 544f5860992SSakthivel K offsetob = i * 0x24; 545f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 546f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressob, 547f5860992SSakthivel K offsetob + 0x14)); 548f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 549f5860992SSakthivel K pm8001_mr32(addressob, (offsetob + 0x18)); 550f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0; 551f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].producer_index = 0; 552f5860992SSakthivel K } 553f5860992SSakthivel K } 554f5860992SSakthivel K 555f5860992SSakthivel K /** 556f5860992SSakthivel K * update_main_config_table - update the main default table to the HBA. 557f5860992SSakthivel K * @pm8001_ha: our hba card information 558f5860992SSakthivel K */ 559f5860992SSakthivel K static void update_main_config_table(struct pm8001_hba_info *pm8001_ha) 560f5860992SSakthivel K { 561f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 562f5860992SSakthivel K pm8001_mw32(address, MAIN_IQNPPD_HPPD_OFFSET, 563f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_q_nppd_hppd); 564f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_HI, 565f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr); 566f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_LO, 567f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr); 568f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_BUFF_SIZE, 569f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size); 570f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_OPTION, 571f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity); 572f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_HI, 573f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr); 574f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_LO, 575f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr); 576f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_BUFF_SIZE, 577f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size); 578f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_OPTION, 579f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity); 58072349b62SDeepak Ukey /* Update Fatal error interrupt vector */ 58172349b62SDeepak Ukey pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= 58272349b62SDeepak Ukey ((pm8001_ha->number_of_intr - 1) << 8); 583f5860992SSakthivel K pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT, 584f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt); 585c6b9ef57SSakthivel K pm8001_mw32(address, MAIN_EVENT_CRC_CHECK, 586c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump); 587f5860992SSakthivel K 588f5860992SSakthivel K /* SPCv specific */ 589f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping &= 0xCFFFFFFF; 590f5860992SSakthivel K /* Set GPIOLED to 0x2 for LED indicator */ 591f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000; 592f5860992SSakthivel K pm8001_mw32(address, MAIN_GPIO_LED_FLAGS_OFFSET, 593f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping); 594f5860992SSakthivel K 595f5860992SSakthivel K pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 596f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 597f5860992SSakthivel K pm8001_mw32(address, MAIN_INT_REASSERTION_DELAY, 598f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interrupt_reassertion_delay); 5998414cd80SViswas G 6008414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 0xffff0000; 6018414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 6028414cd80SViswas G PORT_RECOVERY_TIMEOUT; 60361daffdeSViswas G if (pm8001_ha->chip_id == chip_8006) { 60461daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 60561daffdeSViswas G 0x0000ffff; 60661daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 60761daffdeSViswas G 0x140000; 60861daffdeSViswas G } 6098414cd80SViswas G pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 6108414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 611f5860992SSakthivel K } 612f5860992SSakthivel K 613f5860992SSakthivel K /** 614f5860992SSakthivel K * update_inbnd_queue_table - update the inbound queue table to the HBA. 615f5860992SSakthivel K * @pm8001_ha: our hba card information 616f5860992SSakthivel K */ 617f5860992SSakthivel K static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 618f5860992SSakthivel K int number) 619f5860992SSakthivel K { 620f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 621f5860992SSakthivel K u16 offset = number * 0x20; 622f5860992SSakthivel K pm8001_mw32(address, offset + IB_PROPERITY_OFFSET, 623f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 624f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_HI_OFFSET, 625f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].upper_base_addr); 626f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_LO_OFFSET, 627f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 628f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_HI_OFFSET, 629f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr); 630f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_LO_OFFSET, 631f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 632f5860992SSakthivel K } 633f5860992SSakthivel K 634f5860992SSakthivel K /** 635f5860992SSakthivel K * update_outbnd_queue_table - update the outbound queue table to the HBA. 636f5860992SSakthivel K * @pm8001_ha: our hba card information 637f5860992SSakthivel K */ 638f5860992SSakthivel K static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 639f5860992SSakthivel K int number) 640f5860992SSakthivel K { 641f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 642f5860992SSakthivel K u16 offset = number * 0x24; 643f5860992SSakthivel K pm8001_mw32(address, offset + OB_PROPERITY_OFFSET, 644f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 645f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_HI_OFFSET, 646f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].upper_base_addr); 647f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_LO_OFFSET, 648f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 649f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_HI_OFFSET, 650f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr); 651f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_LO_OFFSET, 652f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 653f5860992SSakthivel K pm8001_mw32(address, offset + OB_INTERRUPT_COALES_OFFSET, 654f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay); 655f5860992SSakthivel K } 656f5860992SSakthivel K 657f5860992SSakthivel K /** 658f5860992SSakthivel K * mpi_init_check - check firmware initialization status. 659f5860992SSakthivel K * @pm8001_ha: our hba card information 660f5860992SSakthivel K */ 661f5860992SSakthivel K static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) 662f5860992SSakthivel K { 663f5860992SSakthivel K u32 max_wait_count; 664f5860992SSakthivel K u32 value; 665f5860992SSakthivel K u32 gst_len_mpistate; 666f5860992SSakthivel K 667f5860992SSakthivel K /* Write bit0=1 to Inbound DoorBell Register to tell the SPC FW the 668f5860992SSakthivel K table is updated */ 669f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE); 670f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 671a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 672a9a923e5SAnand Kumar Santhanam max_wait_count = 4 * 1000 * 1000;/* 4 sec */ 673a9a923e5SAnand Kumar Santhanam } else { 674a9a923e5SAnand Kumar Santhanam max_wait_count = 2 * 1000 * 1000;/* 2 sec */ 675a9a923e5SAnand Kumar Santhanam } 676f5860992SSakthivel K do { 677f5860992SSakthivel K udelay(1); 678f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 679f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_UPDATE; 680f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 681f5860992SSakthivel K 682f5860992SSakthivel K if (!max_wait_count) 683f5860992SSakthivel K return -1; 684f5860992SSakthivel K /* check the MPI-State for initialization upto 100ms*/ 685f5860992SSakthivel K max_wait_count = 100 * 1000;/* 100 msec */ 686f5860992SSakthivel K do { 687f5860992SSakthivel K udelay(1); 688f5860992SSakthivel K gst_len_mpistate = 689f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 690f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 691f5860992SSakthivel K } while ((GST_MPI_STATE_INIT != 692f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count)); 693f5860992SSakthivel K if (!max_wait_count) 694f5860992SSakthivel K return -1; 695f5860992SSakthivel K 696f5860992SSakthivel K /* check MPI Initialization error */ 697f5860992SSakthivel K gst_len_mpistate = gst_len_mpistate >> 16; 698f5860992SSakthivel K if (0x0000 != gst_len_mpistate) 699f5860992SSakthivel K return -1; 700f5860992SSakthivel K 701f5860992SSakthivel K return 0; 702f5860992SSakthivel K } 703f5860992SSakthivel K 704f5860992SSakthivel K /** 705f5860992SSakthivel K * check_fw_ready - The LLDD check if the FW is ready, if not, return error. 706f5860992SSakthivel K * @pm8001_ha: our hba card information 707f5860992SSakthivel K */ 708f5860992SSakthivel K static int check_fw_ready(struct pm8001_hba_info *pm8001_ha) 709f5860992SSakthivel K { 710f5860992SSakthivel K u32 value; 711f5860992SSakthivel K u32 max_wait_count; 712f5860992SSakthivel K u32 max_wait_time; 713f5860992SSakthivel K int ret = 0; 714f5860992SSakthivel K 715f5860992SSakthivel K /* reset / PCIe ready */ 716f5860992SSakthivel K max_wait_time = max_wait_count = 100 * 1000; /* 100 milli sec */ 717f5860992SSakthivel K do { 718f5860992SSakthivel K udelay(1); 719f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 720f5860992SSakthivel K } while ((value == 0xFFFFFFFF) && (--max_wait_count)); 721f5860992SSakthivel K 722f5860992SSakthivel K /* check ila status */ 723f5860992SSakthivel K max_wait_time = max_wait_count = 1000 * 1000; /* 1000 milli sec */ 724f5860992SSakthivel K do { 725f5860992SSakthivel K udelay(1); 726f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 727f5860992SSakthivel K } while (((value & SCRATCH_PAD_ILA_READY) != 728f5860992SSakthivel K SCRATCH_PAD_ILA_READY) && (--max_wait_count)); 729f5860992SSakthivel K if (!max_wait_count) 730f5860992SSakthivel K ret = -1; 731f5860992SSakthivel K else { 732f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 733f5860992SSakthivel K pm8001_printk(" ila ready status in %d millisec\n", 734f5860992SSakthivel K (max_wait_time - max_wait_count))); 735f5860992SSakthivel K } 736f5860992SSakthivel K 737f5860992SSakthivel K /* check RAAE status */ 738f5860992SSakthivel K max_wait_time = max_wait_count = 1800 * 1000; /* 1800 milli sec */ 739f5860992SSakthivel K do { 740f5860992SSakthivel K udelay(1); 741f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 742f5860992SSakthivel K } while (((value & SCRATCH_PAD_RAAE_READY) != 743f5860992SSakthivel K SCRATCH_PAD_RAAE_READY) && (--max_wait_count)); 744f5860992SSakthivel K if (!max_wait_count) 745f5860992SSakthivel K ret = -1; 746f5860992SSakthivel K else { 747f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 748f5860992SSakthivel K pm8001_printk(" raae ready status in %d millisec\n", 749f5860992SSakthivel K (max_wait_time - max_wait_count))); 750f5860992SSakthivel K } 751f5860992SSakthivel K 752f5860992SSakthivel K /* check iop0 status */ 753f5860992SSakthivel K max_wait_time = max_wait_count = 600 * 1000; /* 600 milli sec */ 754f5860992SSakthivel K do { 755f5860992SSakthivel K udelay(1); 756f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 757f5860992SSakthivel K } while (((value & SCRATCH_PAD_IOP0_READY) != SCRATCH_PAD_IOP0_READY) && 758f5860992SSakthivel K (--max_wait_count)); 759f5860992SSakthivel K if (!max_wait_count) 760f5860992SSakthivel K ret = -1; 761f5860992SSakthivel K else { 762f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 763f5860992SSakthivel K pm8001_printk(" iop0 ready status in %d millisec\n", 764f5860992SSakthivel K (max_wait_time - max_wait_count))); 765f5860992SSakthivel K } 766f5860992SSakthivel K 767f5860992SSakthivel K /* check iop1 status only for 16 port controllers */ 768f5860992SSakthivel K if ((pm8001_ha->chip_id != chip_8008) && 769f5860992SSakthivel K (pm8001_ha->chip_id != chip_8009)) { 770f5860992SSakthivel K /* 200 milli sec */ 771f5860992SSakthivel K max_wait_time = max_wait_count = 200 * 1000; 772f5860992SSakthivel K do { 773f5860992SSakthivel K udelay(1); 774f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 775f5860992SSakthivel K } while (((value & SCRATCH_PAD_IOP1_READY) != 776f5860992SSakthivel K SCRATCH_PAD_IOP1_READY) && (--max_wait_count)); 777f5860992SSakthivel K if (!max_wait_count) 778f5860992SSakthivel K ret = -1; 779f5860992SSakthivel K else { 780f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 781f5860992SSakthivel K "iop1 ready status in %d millisec\n", 782f5860992SSakthivel K (max_wait_time - max_wait_count))); 783f5860992SSakthivel K } 784f5860992SSakthivel K } 785f5860992SSakthivel K 786f5860992SSakthivel K return ret; 787f5860992SSakthivel K } 788f5860992SSakthivel K 789f5860992SSakthivel K static void init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) 790f5860992SSakthivel K { 791f5860992SSakthivel K void __iomem *base_addr; 792f5860992SSakthivel K u32 value; 793f5860992SSakthivel K u32 offset; 794f5860992SSakthivel K u32 pcibar; 795f5860992SSakthivel K u32 pcilogic; 796f5860992SSakthivel K 797f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 798f5860992SSakthivel K offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */ 799f5860992SSakthivel K 800f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 801f5860992SSakthivel K pm8001_printk("Scratchpad 0 Offset: 0x%x value 0x%x\n", 802f5860992SSakthivel K offset, value)); 803f5860992SSakthivel K pcilogic = (value & 0xFC000000) >> 26; 804f5860992SSakthivel K pcibar = get_pci_bar_index(pcilogic); 805f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 806f5860992SSakthivel K pm8001_printk("Scratchpad 0 PCI BAR: %d\n", pcibar)); 807f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr = base_addr = 808f5860992SSakthivel K pm8001_ha->io_mem[pcibar].memvirtaddr + offset; 809f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr = 810f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x18) & 811f5860992SSakthivel K 0xFFFFFF); 812f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr = 813f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C) & 814f5860992SSakthivel K 0xFFFFFF); 815f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr = 816f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x20) & 817f5860992SSakthivel K 0xFFFFFF); 818f5860992SSakthivel K pm8001_ha->ivt_tbl_addr = 819f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C) & 820f5860992SSakthivel K 0xFFFFFF); 821f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr = 822f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x90) & 823f5860992SSakthivel K 0xFFFFFF); 824d078b511SAnand Kumar Santhanam pm8001_ha->fatal_tbl_addr = 825d078b511SAnand Kumar Santhanam base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) & 826d078b511SAnand Kumar Santhanam 0xFFFFFF); 827f5860992SSakthivel K 828f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 829f5860992SSakthivel K pm8001_printk("GST OFFSET 0x%x\n", 830f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x18))); 831f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 832f5860992SSakthivel K pm8001_printk("INBND OFFSET 0x%x\n", 833f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C))); 834f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 835f5860992SSakthivel K pm8001_printk("OBND OFFSET 0x%x\n", 836f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x20))); 837f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 838f5860992SSakthivel K pm8001_printk("IVT OFFSET 0x%x\n", 839f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C))); 840f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 841f5860992SSakthivel K pm8001_printk("PSPA OFFSET 0x%x\n", 842f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x90))); 843f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 844f5860992SSakthivel K pm8001_printk("addr - main cfg %p general status %p\n", 845f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr, 846f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr)); 847f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 848f5860992SSakthivel K pm8001_printk("addr - inbnd %p obnd %p\n", 849f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr, 850f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr)); 851f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 852f5860992SSakthivel K pm8001_printk("addr - pspa %p ivt %p\n", 853f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr, 854f5860992SSakthivel K pm8001_ha->ivt_tbl_addr)); 855f5860992SSakthivel K } 856f5860992SSakthivel K 857f5860992SSakthivel K /** 858f5860992SSakthivel K * pm80xx_set_thermal_config - support the thermal configuration 859f5860992SSakthivel K * @pm8001_ha: our hba card information. 860f5860992SSakthivel K */ 861a6cb3d01SSakthivel K int 862f5860992SSakthivel K pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha) 863f5860992SSakthivel K { 864f5860992SSakthivel K struct set_ctrl_cfg_req payload; 865f5860992SSakthivel K struct inbound_queue_table *circularQ; 866f5860992SSakthivel K int rc; 867f5860992SSakthivel K u32 tag; 868f5860992SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 869842784e0SViswas G u32 page_code; 870f5860992SSakthivel K 871f5860992SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 872f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 873f5860992SSakthivel K if (rc) 874f5860992SSakthivel K return -1; 875f5860992SSakthivel K 876f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 877f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 878842784e0SViswas G 879842784e0SViswas G if (IS_SPCV_12G(pm8001_ha->pdev)) 880842784e0SViswas G page_code = THERMAL_PAGE_CODE_7H; 881842784e0SViswas G else 882842784e0SViswas G page_code = THERMAL_PAGE_CODE_8H; 883842784e0SViswas G 884f5860992SSakthivel K payload.cfg_pg[0] = (THERMAL_LOG_ENABLE << 9) | 885842784e0SViswas G (THERMAL_ENABLE << 8) | page_code; 886f5860992SSakthivel K payload.cfg_pg[1] = (LTEMPHIL << 24) | (RTEMPHIL << 8); 887f5860992SSakthivel K 888f5860992SSakthivel K rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 8895533abcaSTomas Henzl if (rc) 8905533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 891f5860992SSakthivel K return rc; 892f5860992SSakthivel K 893f5860992SSakthivel K } 894f5860992SSakthivel K 895f5860992SSakthivel K /** 896a6cb3d01SSakthivel K * pm80xx_set_sas_protocol_timer_config - support the SAS Protocol 897a6cb3d01SSakthivel K * Timer configuration page 898a6cb3d01SSakthivel K * @pm8001_ha: our hba card information. 899a6cb3d01SSakthivel K */ 900a6cb3d01SSakthivel K static int 901a6cb3d01SSakthivel K pm80xx_set_sas_protocol_timer_config(struct pm8001_hba_info *pm8001_ha) 902a6cb3d01SSakthivel K { 903a6cb3d01SSakthivel K struct set_ctrl_cfg_req payload; 904a6cb3d01SSakthivel K struct inbound_queue_table *circularQ; 905a6cb3d01SSakthivel K SASProtocolTimerConfig_t SASConfigPage; 906a6cb3d01SSakthivel K int rc; 907a6cb3d01SSakthivel K u32 tag; 908a6cb3d01SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 909a6cb3d01SSakthivel K 910a6cb3d01SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 911a6cb3d01SSakthivel K memset(&SASConfigPage, 0, sizeof(SASProtocolTimerConfig_t)); 912a6cb3d01SSakthivel K 913a6cb3d01SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 914a6cb3d01SSakthivel K 915a6cb3d01SSakthivel K if (rc) 916a6cb3d01SSakthivel K return -1; 917a6cb3d01SSakthivel K 918a6cb3d01SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 919a6cb3d01SSakthivel K payload.tag = cpu_to_le32(tag); 920a6cb3d01SSakthivel K 921a6cb3d01SSakthivel K SASConfigPage.pageCode = SAS_PROTOCOL_TIMER_CONFIG_PAGE; 922a6cb3d01SSakthivel K SASConfigPage.MST_MSI = 3 << 15; 923a6cb3d01SSakthivel K SASConfigPage.STP_SSP_MCT_TMO = (STP_MCT_TMO << 16) | SSP_MCT_TMO; 924a6cb3d01SSakthivel K SASConfigPage.STP_FRM_TMO = (SAS_MAX_OPEN_TIME << 24) | 925a6cb3d01SSakthivel K (SMP_MAX_CONN_TIMER << 16) | STP_FRM_TIMER; 926a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = STP_IDLE_TIME; 927a6cb3d01SSakthivel K 928a6cb3d01SSakthivel K if (SASConfigPage.STP_IDLE_TMO > 0x3FFFFFF) 929a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = 0x3FFFFFF; 930a6cb3d01SSakthivel K 931a6cb3d01SSakthivel K 932a6cb3d01SSakthivel K SASConfigPage.OPNRJT_RTRY_INTVL = (SAS_MFD << 16) | 933a6cb3d01SSakthivel K SAS_OPNRJT_RTRY_INTVL; 934a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO = (SAS_DOPNRJT_RTRY_TMO << 16) 935a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_TMO; 936a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR = (SAS_DOPNRJT_RTRY_THR << 16) 937a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_THR; 938a6cb3d01SSakthivel K SASConfigPage.MAX_AIP = SAS_MAX_AIP; 939a6cb3d01SSakthivel K 940a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 941a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.pageCode " 942a6cb3d01SSakthivel K "0x%08x\n", SASConfigPage.pageCode)); 943a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 944a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.MST_MSI " 945a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.MST_MSI)); 946a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 947a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.STP_SSP_MCT_TMO " 948a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.STP_SSP_MCT_TMO)); 949a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 950a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.STP_FRM_TMO " 951a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.STP_FRM_TMO)); 952a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 953a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.STP_IDLE_TMO " 954a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.STP_IDLE_TMO)); 955a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 956a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.OPNRJT_RTRY_INTVL " 957a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.OPNRJT_RTRY_INTVL)); 958a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 959a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO " 960a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO)); 961a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 962a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR " 963a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR)); 964a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk("SASConfigPage.MAX_AIP " 965a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.MAX_AIP)); 966a6cb3d01SSakthivel K 967a6cb3d01SSakthivel K memcpy(&payload.cfg_pg, &SASConfigPage, 968a6cb3d01SSakthivel K sizeof(SASProtocolTimerConfig_t)); 969a6cb3d01SSakthivel K 970a6cb3d01SSakthivel K rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 9715533abcaSTomas Henzl if (rc) 9725533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 973a6cb3d01SSakthivel K 974a6cb3d01SSakthivel K return rc; 975a6cb3d01SSakthivel K } 976a6cb3d01SSakthivel K 977a6cb3d01SSakthivel K /** 978f5860992SSakthivel K * pm80xx_get_encrypt_info - Check for encryption 979f5860992SSakthivel K * @pm8001_ha: our hba card information. 980f5860992SSakthivel K */ 981f5860992SSakthivel K static int 982f5860992SSakthivel K pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha) 983f5860992SSakthivel K { 984f5860992SSakthivel K u32 scratch3_value; 985da225498SRickard Strandqvist int ret = -1; 986f5860992SSakthivel K 987f5860992SSakthivel K /* Read encryption status from SCRATCH PAD 3 */ 988f5860992SSakthivel K scratch3_value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 989f5860992SSakthivel K 990f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 991f5860992SSakthivel K SCRATCH_PAD3_ENC_READY) { 992f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 993f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 994f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 995f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 996f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 997f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 998f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 999f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1000f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1001f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1002f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1003f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0; 1004f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1005f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X." 1006f5860992SSakthivel K "Cipher mode 0x%x Sec mode 0x%x status 0x%x\n", 1007f5860992SSakthivel K scratch3_value, pm8001_ha->encrypt_info.cipher_mode, 1008f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 1009f5860992SSakthivel K pm8001_ha->encrypt_info.status)); 1010f5860992SSakthivel K ret = 0; 1011f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_READY) == 1012f5860992SSakthivel K SCRATCH_PAD3_ENC_DISABLED) { 1013f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1014f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n", 1015f5860992SSakthivel K scratch3_value)); 1016f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0xFFFFFFFF; 1017f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = 0; 1018f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = 0; 1019da225498SRickard Strandqvist ret = 0; 1020f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1021f5860992SSakthivel K SCRATCH_PAD3_ENC_DIS_ERR) { 1022f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1023f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1024f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1025f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1026f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1027f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1028f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1029f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1030f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1031f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1032f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1033f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1034f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1035f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1036f5860992SSakthivel K "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X." 1037f5860992SSakthivel K "Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 1038f5860992SSakthivel K scratch3_value, pm8001_ha->encrypt_info.cipher_mode, 1039f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 1040f5860992SSakthivel K pm8001_ha->encrypt_info.status)); 1041f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1042f5860992SSakthivel K SCRATCH_PAD3_ENC_ENA_ERR) { 1043f5860992SSakthivel K 1044f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1045f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1046f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1047f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1048f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1049f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1050f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1051f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1052f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1053f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1054f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1055f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1056f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1057f5860992SSakthivel K 1058f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1059f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X." 1060f5860992SSakthivel K "Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 1061f5860992SSakthivel K scratch3_value, pm8001_ha->encrypt_info.cipher_mode, 1062f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 1063f5860992SSakthivel K pm8001_ha->encrypt_info.status)); 1064f5860992SSakthivel K } 1065f5860992SSakthivel K return ret; 1066f5860992SSakthivel K } 1067f5860992SSakthivel K 1068f5860992SSakthivel K /** 1069f5860992SSakthivel K * pm80xx_encrypt_update - update flash with encryption informtion 1070f5860992SSakthivel K * @pm8001_ha: our hba card information. 1071f5860992SSakthivel K */ 1072f5860992SSakthivel K static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha) 1073f5860992SSakthivel K { 1074f5860992SSakthivel K struct kek_mgmt_req payload; 1075f5860992SSakthivel K struct inbound_queue_table *circularQ; 1076f5860992SSakthivel K int rc; 1077f5860992SSakthivel K u32 tag; 1078f5860992SSakthivel K u32 opc = OPC_INB_KEK_MANAGEMENT; 1079f5860992SSakthivel K 1080f5860992SSakthivel K memset(&payload, 0, sizeof(struct kek_mgmt_req)); 1081f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1082f5860992SSakthivel K if (rc) 1083f5860992SSakthivel K return -1; 1084f5860992SSakthivel K 1085f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1086f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1087f5860992SSakthivel K /* Currently only one key is used. New KEK index is 1. 1088f5860992SSakthivel K * Current KEK index is 1. Store KEK to NVRAM is 1. 1089f5860992SSakthivel K */ 1090f5860992SSakthivel K payload.new_curidx_ksop = ((1 << 24) | (1 << 16) | (1 << 8) | 1091f5860992SSakthivel K KEK_MGMT_SUBOP_KEYCARDUPDATE); 1092f5860992SSakthivel K 1093f5860992SSakthivel K rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 10945533abcaSTomas Henzl if (rc) 10955533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1096f5860992SSakthivel K 1097f5860992SSakthivel K return rc; 1098f5860992SSakthivel K } 1099f5860992SSakthivel K 1100f5860992SSakthivel K /** 1101f5860992SSakthivel K * pm8001_chip_init - the main init function that initialize whole PM8001 chip. 1102f5860992SSakthivel K * @pm8001_ha: our hba card information 1103f5860992SSakthivel K */ 1104f5860992SSakthivel K static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha) 1105f5860992SSakthivel K { 1106f5860992SSakthivel K int ret; 1107f5860992SSakthivel K u8 i = 0; 1108f5860992SSakthivel K 1109f5860992SSakthivel K /* check the firmware status */ 1110f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 1111f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1112f5860992SSakthivel K pm8001_printk("Firmware is not ready!\n")); 1113f5860992SSakthivel K return -EBUSY; 1114f5860992SSakthivel K } 1115f5860992SSakthivel K 111672349b62SDeepak Ukey /* Initialize the controller fatal error flag */ 111772349b62SDeepak Ukey pm8001_ha->controller_fatal_error = false; 111872349b62SDeepak Ukey 1119f5860992SSakthivel K /* Initialize pci space address eg: mpi offset */ 1120f5860992SSakthivel K init_pci_device_addresses(pm8001_ha); 1121f5860992SSakthivel K init_default_table_values(pm8001_ha); 1122f5860992SSakthivel K read_main_config_table(pm8001_ha); 1123f5860992SSakthivel K read_general_status_table(pm8001_ha); 1124f5860992SSakthivel K read_inbnd_queue_table(pm8001_ha); 1125f5860992SSakthivel K read_outbnd_queue_table(pm8001_ha); 1126f5860992SSakthivel K read_phy_attr_table(pm8001_ha); 1127f5860992SSakthivel K 1128f5860992SSakthivel K /* update main config table ,inbound table and outbound table */ 1129f5860992SSakthivel K update_main_config_table(pm8001_ha); 1130f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) 1131f5860992SSakthivel K update_inbnd_queue_table(pm8001_ha, i); 1132f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) 1133f5860992SSakthivel K update_outbnd_queue_table(pm8001_ha, i); 1134f5860992SSakthivel K 1135f5860992SSakthivel K /* notify firmware update finished and check initialization status */ 1136f5860992SSakthivel K if (0 == mpi_init_check(pm8001_ha)) { 1137f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1138f5860992SSakthivel K pm8001_printk("MPI initialize successful!\n")); 1139f5860992SSakthivel K } else 1140f5860992SSakthivel K return -EBUSY; 1141f5860992SSakthivel K 1142a6cb3d01SSakthivel K /* send SAS protocol timer configuration page to FW */ 1143a6cb3d01SSakthivel K ret = pm80xx_set_sas_protocol_timer_config(pm8001_ha); 1144f5860992SSakthivel K 1145f5860992SSakthivel K /* Check for encryption */ 1146f5860992SSakthivel K if (pm8001_ha->chip->encrypt) { 1147f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1148f5860992SSakthivel K pm8001_printk("Checking for encryption\n")); 1149f5860992SSakthivel K ret = pm80xx_get_encrypt_info(pm8001_ha); 1150f5860992SSakthivel K if (ret == -1) { 1151f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1152f5860992SSakthivel K pm8001_printk("Encryption error !!\n")); 1153f5860992SSakthivel K if (pm8001_ha->encrypt_info.status == 0x81) { 1154f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1155f5860992SSakthivel K "Encryption enabled with error." 1156f5860992SSakthivel K "Saving encryption key to flash\n")); 1157f5860992SSakthivel K pm80xx_encrypt_update(pm8001_ha); 1158f5860992SSakthivel K } 1159f5860992SSakthivel K } 1160f5860992SSakthivel K } 1161f5860992SSakthivel K return 0; 1162f5860992SSakthivel K } 1163f5860992SSakthivel K 1164f5860992SSakthivel K static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) 1165f5860992SSakthivel K { 1166f5860992SSakthivel K u32 max_wait_count; 1167f5860992SSakthivel K u32 value; 1168f5860992SSakthivel K u32 gst_len_mpistate; 1169f5860992SSakthivel K init_pci_device_addresses(pm8001_ha); 1170f5860992SSakthivel K /* Write bit1=1 to Inbound DoorBell Register to tell the SPC FW the 1171f5860992SSakthivel K table is stop */ 1172f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_RESET); 1173f5860992SSakthivel K 1174f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1175a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 1176a9a923e5SAnand Kumar Santhanam max_wait_count = 4 * 1000 * 1000;/* 4 sec */ 1177a9a923e5SAnand Kumar Santhanam } else { 1178a9a923e5SAnand Kumar Santhanam max_wait_count = 2 * 1000 * 1000;/* 2 sec */ 1179a9a923e5SAnand Kumar Santhanam } 1180f5860992SSakthivel K do { 1181f5860992SSakthivel K udelay(1); 1182f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1183f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_RESET; 1184f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1185f5860992SSakthivel K 1186f5860992SSakthivel K if (!max_wait_count) { 1187f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1188f5860992SSakthivel K pm8001_printk("TIMEOUT:IBDB value/=%x\n", value)); 1189f5860992SSakthivel K return -1; 1190f5860992SSakthivel K } 1191f5860992SSakthivel K 1192f5860992SSakthivel K /* check the MPI-State for termination in progress */ 1193f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1194f5860992SSakthivel K max_wait_count = 2 * 1000 * 1000; /* 2 sec for spcv/ve */ 1195f5860992SSakthivel K do { 1196f5860992SSakthivel K udelay(1); 1197f5860992SSakthivel K gst_len_mpistate = 1198f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1199f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1200f5860992SSakthivel K if (GST_MPI_STATE_UNINIT == 1201f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) 1202f5860992SSakthivel K break; 1203f5860992SSakthivel K } while (--max_wait_count); 1204f5860992SSakthivel K if (!max_wait_count) { 1205f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1206f5860992SSakthivel K pm8001_printk(" TIME OUT MPI State = 0x%x\n", 1207f5860992SSakthivel K gst_len_mpistate & GST_MPI_STATE_MASK)); 1208f5860992SSakthivel K return -1; 1209f5860992SSakthivel K } 1210f5860992SSakthivel K 1211f5860992SSakthivel K return 0; 1212f5860992SSakthivel K } 1213f5860992SSakthivel K 1214f5860992SSakthivel K /** 1215f5860992SSakthivel K * pm8001_chip_soft_rst - soft reset the PM8001 chip, so that the clear all 1216f5860992SSakthivel K * the FW register status to the originated status. 1217f5860992SSakthivel K * @pm8001_ha: our hba card information 1218f5860992SSakthivel K */ 1219f5860992SSakthivel K 1220f5860992SSakthivel K static int 1221f5860992SSakthivel K pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha) 1222f5860992SSakthivel K { 1223f5860992SSakthivel K u32 regval; 1224f5860992SSakthivel K u32 bootloader_state; 122506f12f22SAnand Kumar Santhanam u32 ibutton0, ibutton1; 1226f5860992SSakthivel K 122772349b62SDeepak Ukey /* Process MPI table uninitialization only if FW is ready */ 122872349b62SDeepak Ukey if (!pm8001_ha->controller_fatal_error) { 1229f5860992SSakthivel K /* Check if MPI is in ready state to reset */ 1230f5860992SSakthivel K if (mpi_uninit_check(pm8001_ha) != 0) { 123172349b62SDeepak Ukey regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 123272349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 123372349b62SDeepak Ukey "MPI state is not ready scratch1 :0x%x\n", 123472349b62SDeepak Ukey regval)); 1235f5860992SSakthivel K return -1; 1236f5860992SSakthivel K } 123772349b62SDeepak Ukey } 1238f5860992SSakthivel K /* checked for reset register normal state; 0x0 */ 1239f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 1240f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1241f5860992SSakthivel K pm8001_printk("reset register before write : 0x%x\n", regval)); 1242f5860992SSakthivel K 1243f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE); 1244f5860992SSakthivel K mdelay(500); 1245f5860992SSakthivel K 1246f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 1247f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1248f5860992SSakthivel K pm8001_printk("reset register after write 0x%x\n", regval)); 1249f5860992SSakthivel K 1250f5860992SSakthivel K if ((regval & SPCv_SOFT_RESET_READ_MASK) == 1251f5860992SSakthivel K SPCv_SOFT_RESET_NORMAL_RESET_OCCURED) { 1252f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 1253f5860992SSakthivel K pm8001_printk(" soft reset successful [regval: 0x%x]\n", 1254f5860992SSakthivel K regval)); 1255f5860992SSakthivel K } else { 1256f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 1257f5860992SSakthivel K pm8001_printk(" soft reset failed [regval: 0x%x]\n", 1258f5860992SSakthivel K regval)); 1259f5860992SSakthivel K 1260f5860992SSakthivel K /* check bootloader is successfully executed or in HDA mode */ 1261f5860992SSakthivel K bootloader_state = 1262f5860992SSakthivel K pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) & 1263f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_MASK; 1264f5860992SSakthivel K 1265f5860992SSakthivel K if (bootloader_state == SCRATCH_PAD1_BOOTSTATE_HDA_SEEPROM) { 1266f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1267f5860992SSakthivel K "Bootloader state - HDA mode SEEPROM\n")); 1268f5860992SSakthivel K } else if (bootloader_state == 1269f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_BOOTSTRAP) { 1270f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1271f5860992SSakthivel K "Bootloader state - HDA mode Bootstrap Pin\n")); 1272f5860992SSakthivel K } else if (bootloader_state == 1273f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_SOFTRESET) { 1274f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1275f5860992SSakthivel K "Bootloader state - HDA mode soft reset\n")); 1276f5860992SSakthivel K } else if (bootloader_state == 1277f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_CRIT_ERROR) { 1278f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1279f5860992SSakthivel K "Bootloader state-HDA mode critical error\n")); 1280f5860992SSakthivel K } 1281f5860992SSakthivel K return -EBUSY; 1282f5860992SSakthivel K } 1283f5860992SSakthivel K 1284f5860992SSakthivel K /* check the firmware status after reset */ 1285f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 1286f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1287f5860992SSakthivel K pm8001_printk("Firmware is not ready!\n")); 128806f12f22SAnand Kumar Santhanam /* check iButton feature support for motherboard controller */ 128906f12f22SAnand Kumar Santhanam if (pm8001_ha->pdev->subsystem_vendor != 129006f12f22SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2 && 1291faf321b0SBenjamin Rood pm8001_ha->pdev->subsystem_vendor != 1292faf321b0SBenjamin Rood PCI_VENDOR_ID_ATTO && 129306f12f22SAnand Kumar Santhanam pm8001_ha->pdev->subsystem_vendor != 0) { 129406f12f22SAnand Kumar Santhanam ibutton0 = pm8001_cr32(pm8001_ha, 0, 129506f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_6); 129606f12f22SAnand Kumar Santhanam ibutton1 = pm8001_cr32(pm8001_ha, 0, 129706f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_7); 129806f12f22SAnand Kumar Santhanam if (!ibutton0 && !ibutton1) { 129906f12f22SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 130006f12f22SAnand Kumar Santhanam pm8001_printk("iButton Feature is" 130106f12f22SAnand Kumar Santhanam " not Available!!!\n")); 1302f5860992SSakthivel K return -EBUSY; 1303f5860992SSakthivel K } 130406f12f22SAnand Kumar Santhanam if (ibutton0 == 0xdeadbeef && ibutton1 == 0xdeadbeef) { 130506f12f22SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 130606f12f22SAnand Kumar Santhanam pm8001_printk("CRC Check for iButton" 130706f12f22SAnand Kumar Santhanam " Feature Failed!!!\n")); 130806f12f22SAnand Kumar Santhanam return -EBUSY; 130906f12f22SAnand Kumar Santhanam } 131006f12f22SAnand Kumar Santhanam } 131106f12f22SAnand Kumar Santhanam } 1312f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1313f5860992SSakthivel K pm8001_printk("SPCv soft reset Complete\n")); 1314f5860992SSakthivel K return 0; 1315f5860992SSakthivel K } 1316f5860992SSakthivel K 1317f5860992SSakthivel K static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha) 1318f5860992SSakthivel K { 1319f5860992SSakthivel K u32 i; 1320f5860992SSakthivel K 1321f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1322f5860992SSakthivel K pm8001_printk("chip reset start\n")); 1323f5860992SSakthivel K 1324f5860992SSakthivel K /* do SPCv chip reset. */ 1325f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11); 1326f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1327f5860992SSakthivel K pm8001_printk("SPC soft reset Complete\n")); 1328f5860992SSakthivel K 1329f5860992SSakthivel K /* Check this ..whether delay is required or no */ 1330f5860992SSakthivel K /* delay 10 usec */ 1331f5860992SSakthivel K udelay(10); 1332f5860992SSakthivel K 1333f5860992SSakthivel K /* wait for 20 msec until the firmware gets reloaded */ 1334f5860992SSakthivel K i = 20; 1335f5860992SSakthivel K do { 1336f5860992SSakthivel K mdelay(1); 1337f5860992SSakthivel K } while ((--i) != 0); 1338f5860992SSakthivel K 1339f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1340f5860992SSakthivel K pm8001_printk("chip reset finished\n")); 1341f5860992SSakthivel K } 1342f5860992SSakthivel K 1343f5860992SSakthivel K /** 1344f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1345f5860992SSakthivel K * @pm8001_ha: our hba card information 1346f5860992SSakthivel K */ 1347f5860992SSakthivel K static void 1348f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha) 1349f5860992SSakthivel K { 1350f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); 1351f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); 1352f5860992SSakthivel K } 1353f5860992SSakthivel K 1354f5860992SSakthivel K /** 1355f5860992SSakthivel K * pm8001_chip_intx_interrupt_disable- disable PM8001 chip interrupt 1356f5860992SSakthivel K * @pm8001_ha: our hba card information 1357f5860992SSakthivel K */ 1358f5860992SSakthivel K static void 1359f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha) 1360f5860992SSakthivel K { 1361f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL); 1362f5860992SSakthivel K } 1363f5860992SSakthivel K 1364f5860992SSakthivel K /** 1365f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1366f5860992SSakthivel K * @pm8001_ha: our hba card information 1367f5860992SSakthivel K */ 1368f5860992SSakthivel K static void 1369f5860992SSakthivel K pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1370f5860992SSakthivel K { 1371f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1372f5860992SSakthivel K u32 mask; 1373f5860992SSakthivel K mask = (u32)(1 << vec); 1374f5860992SSakthivel K 1375f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF)); 1376f5860992SSakthivel K return; 1377f5860992SSakthivel K #endif 1378f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(pm8001_ha); 1379f5860992SSakthivel K 1380f5860992SSakthivel K } 1381f5860992SSakthivel K 1382f5860992SSakthivel K /** 1383f5860992SSakthivel K * pm8001_chip_interrupt_disable- disable PM8001 chip interrupt 1384f5860992SSakthivel K * @pm8001_ha: our hba card information 1385f5860992SSakthivel K */ 1386f5860992SSakthivel K static void 1387f5860992SSakthivel K pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1388f5860992SSakthivel K { 1389f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1390f5860992SSakthivel K u32 mask; 1391f5860992SSakthivel K if (vec == 0xFF) 1392f5860992SSakthivel K mask = 0xFFFFFFFF; 1393f5860992SSakthivel K else 1394f5860992SSakthivel K mask = (u32)(1 << vec); 1395f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF)); 1396f5860992SSakthivel K return; 1397f5860992SSakthivel K #endif 1398f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(pm8001_ha); 1399f5860992SSakthivel K } 1400f5860992SSakthivel K 1401c6b9ef57SSakthivel K static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha, 1402c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1403c6b9ef57SSakthivel K { 1404c6b9ef57SSakthivel K int res; 1405c6b9ef57SSakthivel K u32 ccb_tag; 1406c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1407c6b9ef57SSakthivel K struct sas_task *task = NULL; 1408c6b9ef57SSakthivel K struct task_abort_req task_abort; 1409c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1410c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_ABORT; 1411c6b9ef57SSakthivel K int ret; 1412c6b9ef57SSakthivel K 1413c6b9ef57SSakthivel K if (!pm8001_ha_dev) { 1414c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("dev is null\n")); 1415c6b9ef57SSakthivel K return; 1416c6b9ef57SSakthivel K } 1417c6b9ef57SSakthivel K 1418c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1419c6b9ef57SSakthivel K 1420c6b9ef57SSakthivel K if (!task) { 1421c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("cannot " 1422c6b9ef57SSakthivel K "allocate task\n")); 1423c6b9ef57SSakthivel K return; 1424c6b9ef57SSakthivel K } 1425c6b9ef57SSakthivel K 1426c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1427c6b9ef57SSakthivel K 1428c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 14295533abcaSTomas Henzl if (res) { 14305533abcaSTomas Henzl sas_free_task(task); 1431c6b9ef57SSakthivel K return; 14325533abcaSTomas Henzl } 1433c6b9ef57SSakthivel K 1434c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1435c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1436c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1437c6b9ef57SSakthivel K ccb->task = task; 1438c6b9ef57SSakthivel K 1439c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1440c6b9ef57SSakthivel K 1441c6b9ef57SSakthivel K memset(&task_abort, 0, sizeof(task_abort)); 1442c6b9ef57SSakthivel K task_abort.abort_all = cpu_to_le32(1); 1443c6b9ef57SSakthivel K task_abort.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1444c6b9ef57SSakthivel K task_abort.tag = cpu_to_le32(ccb_tag); 1445c6b9ef57SSakthivel K 1446c6b9ef57SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 0); 14475533abcaSTomas Henzl if (ret) { 14485533abcaSTomas Henzl sas_free_task(task); 14495533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 14505533abcaSTomas Henzl } 1451c6b9ef57SSakthivel K } 1452c6b9ef57SSakthivel K 1453c6b9ef57SSakthivel K static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha, 1454c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1455c6b9ef57SSakthivel K { 1456c6b9ef57SSakthivel K struct sata_start_req sata_cmd; 1457c6b9ef57SSakthivel K int res; 1458c6b9ef57SSakthivel K u32 ccb_tag; 1459c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1460c6b9ef57SSakthivel K struct sas_task *task = NULL; 1461c6b9ef57SSakthivel K struct host_to_dev_fis fis; 1462c6b9ef57SSakthivel K struct domain_device *dev; 1463c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1464c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 1465c6b9ef57SSakthivel K 1466c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1467c6b9ef57SSakthivel K 1468c6b9ef57SSakthivel K if (!task) { 1469c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1470c6b9ef57SSakthivel K pm8001_printk("cannot allocate task !!!\n")); 1471c6b9ef57SSakthivel K return; 1472c6b9ef57SSakthivel K } 1473c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1474c6b9ef57SSakthivel K 1475c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 1476c6b9ef57SSakthivel K if (res) { 14775533abcaSTomas Henzl sas_free_task(task); 1478c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1479c6b9ef57SSakthivel K pm8001_printk("cannot allocate tag !!!\n")); 1480c6b9ef57SSakthivel K return; 1481c6b9ef57SSakthivel K } 1482c6b9ef57SSakthivel K 1483c6b9ef57SSakthivel K /* allocate domain device by ourselves as libsas 1484c6b9ef57SSakthivel K * is not going to provide any 1485c6b9ef57SSakthivel K */ 1486c6b9ef57SSakthivel K dev = kzalloc(sizeof(struct domain_device), GFP_ATOMIC); 1487c6b9ef57SSakthivel K if (!dev) { 14885533abcaSTomas Henzl sas_free_task(task); 14895533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 1490c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1491c6b9ef57SSakthivel K pm8001_printk("Domain device cannot be allocated\n")); 1492c6b9ef57SSakthivel K return; 14935533abcaSTomas Henzl } 14945533abcaSTomas Henzl 1495c6b9ef57SSakthivel K task->dev = dev; 1496c6b9ef57SSakthivel K task->dev->lldd_dev = pm8001_ha_dev; 1497c6b9ef57SSakthivel K 1498c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1499c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1500c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1501c6b9ef57SSakthivel K ccb->task = task; 15020b6df110SViswas G ccb->n_elem = 0; 1503c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_READ_LOG_FLAG; 1504c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_2ND_RLE_FLAG; 1505c6b9ef57SSakthivel K 1506c6b9ef57SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 1507c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1508c6b9ef57SSakthivel K 1509c6b9ef57SSakthivel K /* construct read log FIS */ 1510c6b9ef57SSakthivel K memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1511c6b9ef57SSakthivel K fis.fis_type = 0x27; 1512c6b9ef57SSakthivel K fis.flags = 0x80; 1513c6b9ef57SSakthivel K fis.command = ATA_CMD_READ_LOG_EXT; 1514c6b9ef57SSakthivel K fis.lbal = 0x10; 1515c6b9ef57SSakthivel K fis.sector_count = 0x1; 1516c6b9ef57SSakthivel K 1517c6b9ef57SSakthivel K sata_cmd.tag = cpu_to_le32(ccb_tag); 1518c6b9ef57SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1519c6b9ef57SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad |= ((0x1 << 7) | (0x5 << 9)); 1520c6b9ef57SSakthivel K memcpy(&sata_cmd.sata_fis, &fis, sizeof(struct host_to_dev_fis)); 1521c6b9ef57SSakthivel K 1522c6b9ef57SSakthivel K res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 0); 15235533abcaSTomas Henzl if (res) { 15245533abcaSTomas Henzl sas_free_task(task); 15255533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 15265533abcaSTomas Henzl kfree(dev); 15275533abcaSTomas Henzl } 1528c6b9ef57SSakthivel K } 1529c6b9ef57SSakthivel K 1530f5860992SSakthivel K /** 1531f5860992SSakthivel K * mpi_ssp_completion- process the event that FW response to the SSP request. 1532f5860992SSakthivel K * @pm8001_ha: our hba card information 1533f5860992SSakthivel K * @piomb: the message contents of this outbound message. 1534f5860992SSakthivel K * 1535f5860992SSakthivel K * When FW has completed a ssp request for example a IO request, after it has 1536f5860992SSakthivel K * filled the SG data with the data, it will trigger this event represent 1537f5860992SSakthivel K * that he has finished the job,please check the coresponding buffer. 1538f5860992SSakthivel K * So we will tell the caller who maybe waiting the result to tell upper layer 1539f5860992SSakthivel K * that the task has been finished. 1540f5860992SSakthivel K */ 1541f5860992SSakthivel K static void 1542f5860992SSakthivel K mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb) 1543f5860992SSakthivel K { 1544f5860992SSakthivel K struct sas_task *t; 1545f5860992SSakthivel K struct pm8001_ccb_info *ccb; 1546f5860992SSakthivel K unsigned long flags; 1547f5860992SSakthivel K u32 status; 1548f5860992SSakthivel K u32 param; 1549f5860992SSakthivel K u32 tag; 1550f5860992SSakthivel K struct ssp_completion_resp *psspPayload; 1551f5860992SSakthivel K struct task_status_struct *ts; 1552f5860992SSakthivel K struct ssp_response_iu *iu; 1553f5860992SSakthivel K struct pm8001_device *pm8001_dev; 1554f5860992SSakthivel K psspPayload = (struct ssp_completion_resp *)(piomb + 4); 1555f5860992SSakthivel K status = le32_to_cpu(psspPayload->status); 1556f5860992SSakthivel K tag = le32_to_cpu(psspPayload->tag); 1557f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 1558f5860992SSakthivel K if ((status == IO_ABORTED) && ccb->open_retry) { 1559f5860992SSakthivel K /* Being completed by another */ 1560f5860992SSakthivel K ccb->open_retry = 0; 1561f5860992SSakthivel K return; 1562f5860992SSakthivel K } 1563f5860992SSakthivel K pm8001_dev = ccb->device; 1564f5860992SSakthivel K param = le32_to_cpu(psspPayload->param); 1565f5860992SSakthivel K t = ccb->task; 1566f5860992SSakthivel K 1567f5860992SSakthivel K if (status && status != IO_UNDERFLOW) 1568f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1569f5860992SSakthivel K pm8001_printk("sas IO status 0x%x\n", status)); 1570f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 1571f5860992SSakthivel K return; 1572f5860992SSakthivel K ts = &t->task_status; 1573cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 1574cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 1575cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) 1576cb269c26SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 1577cb269c26SAnand Kumar Santhanam pm8001_printk("SAS Address of IO Failure Drive" 1578cb269c26SAnand Kumar Santhanam ":%016llx", SAS_ADDR(t->dev->sas_addr))); 1579cb269c26SAnand Kumar Santhanam 1580f5860992SSakthivel K switch (status) { 1581f5860992SSakthivel K case IO_SUCCESS: 1582f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1583f5860992SSakthivel K pm8001_printk("IO_SUCCESS ,param = 0x%x\n", 1584f5860992SSakthivel K param)); 1585f5860992SSakthivel K if (param == 0) { 1586f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1587f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 1588f5860992SSakthivel K } else { 1589f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1590f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 1591f5860992SSakthivel K ts->residual = param; 1592f5860992SSakthivel K iu = &psspPayload->ssp_resp_iu; 1593f5860992SSakthivel K sas_ssp_task_response(pm8001_ha->dev, t, iu); 1594f5860992SSakthivel K } 1595f5860992SSakthivel K if (pm8001_dev) 1596f5860992SSakthivel K pm8001_dev->running_req--; 1597f5860992SSakthivel K break; 1598f5860992SSakthivel K case IO_ABORTED: 1599f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1600f5860992SSakthivel K pm8001_printk("IO_ABORTED IOMB Tag\n")); 1601f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1602f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 1603f5860992SSakthivel K break; 1604f5860992SSakthivel K case IO_UNDERFLOW: 1605f5860992SSakthivel K /* SSP Completion with error */ 1606f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1607f5860992SSakthivel K pm8001_printk("IO_UNDERFLOW ,param = 0x%x\n", 1608f5860992SSakthivel K param)); 1609f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1610f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 1611f5860992SSakthivel K ts->residual = param; 1612f5860992SSakthivel K if (pm8001_dev) 1613f5860992SSakthivel K pm8001_dev->running_req--; 1614f5860992SSakthivel K break; 1615f5860992SSakthivel K case IO_NO_DEVICE: 1616f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1617f5860992SSakthivel K pm8001_printk("IO_NO_DEVICE\n")); 1618f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1619f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 1620f5860992SSakthivel K break; 1621f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 1622f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1623f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 1624f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1625f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1626f5860992SSakthivel K /* Force the midlayer to retry */ 1627f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1628f5860992SSakthivel K break; 1629f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 1630f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1631f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 1632f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1633f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1634f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1635f5860992SSakthivel K break; 163627ecfa5eSViswas G case IO_XFER_ERROR_INVALID_SSP_RSP_FRAME: 163727ecfa5eSViswas G PM8001_IO_DBG(pm8001_ha, 163827ecfa5eSViswas G pm8001_printk("IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n")); 163927ecfa5eSViswas G ts->resp = SAS_TASK_COMPLETE; 164027ecfa5eSViswas G ts->stat = SAS_OPEN_REJECT; 164127ecfa5eSViswas G ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 164227ecfa5eSViswas G break; 1643f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 1644f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1645f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 1646f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1647f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1648f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 1649f5860992SSakthivel K break; 1650f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 1651f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1652f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 1653f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1654f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1655f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1656f5860992SSakthivel K break; 1657f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 1658f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1659f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 1660f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1661f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1662f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1663f5860992SSakthivel K break; 1664f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 1665a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 1666a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 1667a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 1668a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 1669a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 1670f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1671f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 1672f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1673f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1674f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1675f5860992SSakthivel K if (!t->uldd_task) 1676f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 1677f5860992SSakthivel K pm8001_dev, 1678f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 1679f5860992SSakthivel K break; 1680f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 1681f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1682f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 1683f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1684f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1685f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 1686f5860992SSakthivel K break; 1687f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 1688f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 1689f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 1690f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1691f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1692f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 1693f5860992SSakthivel K break; 1694f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 1695f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1696f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 1697f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1698f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1699f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 1700f5860992SSakthivel K break; 1701f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 1702f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1703f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 1704f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1705f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1706f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1707f5860992SSakthivel K break; 1708f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 1709f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1710f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n")); 1711f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1712f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 1713f5860992SSakthivel K break; 1714f5860992SSakthivel K case IO_XFER_ERROR_DMA: 1715f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1716f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_DMA\n")); 1717f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1718f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1719f5860992SSakthivel K break; 1720f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 1721f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1722f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 1723f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1724f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1725f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1726f5860992SSakthivel K break; 1727f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 1728f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1729f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n")); 1730f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1731f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1732f5860992SSakthivel K break; 1733f5860992SSakthivel K case IO_PORT_IN_RESET: 1734f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1735f5860992SSakthivel K pm8001_printk("IO_PORT_IN_RESET\n")); 1736f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1737f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1738f5860992SSakthivel K break; 1739f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 1740f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1741f5860992SSakthivel K pm8001_printk("IO_DS_NON_OPERATIONAL\n")); 1742f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1743f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1744f5860992SSakthivel K if (!t->uldd_task) 1745f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 1746f5860992SSakthivel K pm8001_dev, 1747f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 1748f5860992SSakthivel K break; 1749f5860992SSakthivel K case IO_DS_IN_RECOVERY: 1750f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1751f5860992SSakthivel K pm8001_printk("IO_DS_IN_RECOVERY\n")); 1752f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1753f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1754f5860992SSakthivel K break; 1755f5860992SSakthivel K case IO_TM_TAG_NOT_FOUND: 1756f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1757f5860992SSakthivel K pm8001_printk("IO_TM_TAG_NOT_FOUND\n")); 1758f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1759f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1760f5860992SSakthivel K break; 1761f5860992SSakthivel K case IO_SSP_EXT_IU_ZERO_LEN_ERROR: 1762f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1763f5860992SSakthivel K pm8001_printk("IO_SSP_EXT_IU_ZERO_LEN_ERROR\n")); 1764f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1765f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1766f5860992SSakthivel K break; 1767f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 1768f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1769f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n")); 1770f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1771f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1772f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1773f5860992SSakthivel K break; 1774f5860992SSakthivel K default: 1775f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1776f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", status)); 1777f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 1778f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1779f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1780f5860992SSakthivel K break; 1781f5860992SSakthivel K } 1782f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1783f5860992SSakthivel K pm8001_printk("scsi_status = 0x%x\n ", 1784f5860992SSakthivel K psspPayload->ssp_resp_iu.status)); 1785f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 1786f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 1787f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 1788f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 1789f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 1790f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 1791f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 1792f5860992SSakthivel K "task 0x%p done with io_status 0x%x resp 0x%x " 1793f5860992SSakthivel K "stat 0x%x but aborted by upper layer!\n", 1794f5860992SSakthivel K t, status, ts->resp, ts->stat)); 1795869ddbdcSViswas G if (t->slow_task) 1796869ddbdcSViswas G complete(&t->slow_task->completion); 1797f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 1798f5860992SSakthivel K } else { 1799f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 1800f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 1801f5860992SSakthivel K mb();/* in order to force CPU ordering */ 1802f5860992SSakthivel K t->task_done(t); 1803f5860992SSakthivel K } 1804f5860992SSakthivel K } 1805f5860992SSakthivel K 1806f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 1807f5860992SSakthivel K static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 1808f5860992SSakthivel K { 1809f5860992SSakthivel K struct sas_task *t; 1810f5860992SSakthivel K unsigned long flags; 1811f5860992SSakthivel K struct task_status_struct *ts; 1812f5860992SSakthivel K struct pm8001_ccb_info *ccb; 1813f5860992SSakthivel K struct pm8001_device *pm8001_dev; 1814f5860992SSakthivel K struct ssp_event_resp *psspPayload = 1815f5860992SSakthivel K (struct ssp_event_resp *)(piomb + 4); 1816f5860992SSakthivel K u32 event = le32_to_cpu(psspPayload->event); 1817f5860992SSakthivel K u32 tag = le32_to_cpu(psspPayload->tag); 1818f5860992SSakthivel K u32 port_id = le32_to_cpu(psspPayload->port_id); 1819f5860992SSakthivel K 1820f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 1821f5860992SSakthivel K t = ccb->task; 1822f5860992SSakthivel K pm8001_dev = ccb->device; 1823f5860992SSakthivel K if (event) 1824f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1825f5860992SSakthivel K pm8001_printk("sas IO status 0x%x\n", event)); 1826f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 1827f5860992SSakthivel K return; 1828f5860992SSakthivel K ts = &t->task_status; 1829f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1830f5860992SSakthivel K pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n", 1831f5860992SSakthivel K port_id, tag, event)); 1832f5860992SSakthivel K switch (event) { 1833f5860992SSakthivel K case IO_OVERFLOW: 1834f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n");) 1835f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1836f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1837f5860992SSakthivel K ts->residual = 0; 1838f5860992SSakthivel K if (pm8001_dev) 1839f5860992SSakthivel K pm8001_dev->running_req--; 1840f5860992SSakthivel K break; 1841f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 1842f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1843f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 1844f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK); 1845f5860992SSakthivel K return; 1846f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 1847f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1848f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 1849f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1850f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1851f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1852f5860992SSakthivel K break; 1853f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 1854f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 1855f5860992SSakthivel K "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 1856f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1857f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1858f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 1859f5860992SSakthivel K break; 1860f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 1861f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1862f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 1863f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1864f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1865f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1866f5860992SSakthivel K break; 1867f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 1868f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1869f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 1870f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1871f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1872f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1873f5860992SSakthivel K break; 1874f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 1875a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 1876a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 1877a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 1878a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 1879a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 1880f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1881f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 1882f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1883f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1884f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1885f5860992SSakthivel K if (!t->uldd_task) 1886f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 1887f5860992SSakthivel K pm8001_dev, 1888f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 1889f5860992SSakthivel K break; 1890f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 1891f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1892f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 1893f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1894f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1895f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 1896f5860992SSakthivel K break; 1897f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 1898f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 1899f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 1900f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1901f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1902f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 1903f5860992SSakthivel K break; 1904f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 1905f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1906f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 1907f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1908f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1909f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 1910f5860992SSakthivel K break; 1911f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 1912f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1913f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 1914f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1915f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1916f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1917f5860992SSakthivel K break; 1918f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 1919f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1920f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n")); 1921f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1922f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 1923f5860992SSakthivel K break; 1924f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 1925f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1926f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 1927f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT); 1928f5860992SSakthivel K return; 1929f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 1930f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1931f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n")); 1932f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1933f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1934f5860992SSakthivel K break; 1935f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 1936f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1937f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n")); 1938f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1939f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1940f5860992SSakthivel K break; 1941f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 1942f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1943f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n")); 1944f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1945f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1946f5860992SSakthivel K break; 1947f5860992SSakthivel K case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT: 1948f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1949f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n")); 1950f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1951f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1952f5860992SSakthivel K break; 1953f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 1954f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1955f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n")); 1956f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1957f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1958f5860992SSakthivel K break; 1959f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 1960f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1961f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n")); 1962f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1963f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1964f5860992SSakthivel K break; 1965a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 1966a6cb3d01SSakthivel K PM8001_IO_DBG(pm8001_ha, 1967a6cb3d01SSakthivel K pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n")); 1968a6cb3d01SSakthivel K /* TBC: used default set values */ 1969a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1970a6cb3d01SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1971a6cb3d01SSakthivel K break; 1972f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 1973f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1974f5860992SSakthivel K pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n")); 1975f5860992SSakthivel K return; 1976f5860992SSakthivel K default: 1977f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1978f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", event)); 1979f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 1980f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1981f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1982f5860992SSakthivel K break; 1983f5860992SSakthivel K } 1984f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 1985f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 1986f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 1987f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 1988f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 1989f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 1990f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 1991f5860992SSakthivel K "task 0x%p done with event 0x%x resp 0x%x " 1992f5860992SSakthivel K "stat 0x%x but aborted by upper layer!\n", 1993f5860992SSakthivel K t, event, ts->resp, ts->stat)); 1994f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 1995f5860992SSakthivel K } else { 1996f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 1997f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 1998f5860992SSakthivel K mb();/* in order to force CPU ordering */ 1999f5860992SSakthivel K t->task_done(t); 2000f5860992SSakthivel K } 2001f5860992SSakthivel K } 2002f5860992SSakthivel K 2003f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2004f5860992SSakthivel K static void 2005f5860992SSakthivel K mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 2006f5860992SSakthivel K { 2007f5860992SSakthivel K struct sas_task *t; 2008f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2009f5860992SSakthivel K u32 param; 2010f5860992SSakthivel K u32 status; 2011f5860992SSakthivel K u32 tag; 2012cb269c26SAnand Kumar Santhanam int i, j; 2013cb269c26SAnand Kumar Santhanam u8 sata_addr_low[4]; 2014cb269c26SAnand Kumar Santhanam u32 temp_sata_addr_low, temp_sata_addr_hi; 2015cb269c26SAnand Kumar Santhanam u8 sata_addr_hi[4]; 2016f5860992SSakthivel K struct sata_completion_resp *psataPayload; 2017f5860992SSakthivel K struct task_status_struct *ts; 2018f5860992SSakthivel K struct ata_task_resp *resp ; 2019f5860992SSakthivel K u32 *sata_resp; 2020f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2021c6b9ef57SSakthivel K unsigned long flags; 2022f5860992SSakthivel K 2023f5860992SSakthivel K psataPayload = (struct sata_completion_resp *)(piomb + 4); 2024f5860992SSakthivel K status = le32_to_cpu(psataPayload->status); 2025f5860992SSakthivel K tag = le32_to_cpu(psataPayload->tag); 2026f5860992SSakthivel K 2027c6b9ef57SSakthivel K if (!tag) { 2028c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2029c6b9ef57SSakthivel K pm8001_printk("tag null\n")); 2030c6b9ef57SSakthivel K return; 2031c6b9ef57SSakthivel K } 2032f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2033f5860992SSakthivel K param = le32_to_cpu(psataPayload->param); 2034c6b9ef57SSakthivel K if (ccb) { 2035f5860992SSakthivel K t = ccb->task; 2036f5860992SSakthivel K pm8001_dev = ccb->device; 2037c6b9ef57SSakthivel K } else { 2038f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2039c6b9ef57SSakthivel K pm8001_printk("ccb null\n")); 2040f5860992SSakthivel K return; 2041c6b9ef57SSakthivel K } 2042c6b9ef57SSakthivel K 2043c6b9ef57SSakthivel K if (t) { 2044c6b9ef57SSakthivel K if (t->dev && (t->dev->lldd_dev)) 2045c6b9ef57SSakthivel K pm8001_dev = t->dev->lldd_dev; 2046c6b9ef57SSakthivel K } else { 2047c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2048c6b9ef57SSakthivel K pm8001_printk("task null\n")); 2049c6b9ef57SSakthivel K return; 2050c6b9ef57SSakthivel K } 2051c6b9ef57SSakthivel K 2052c6b9ef57SSakthivel K if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG)) 2053c6b9ef57SSakthivel K && unlikely(!t || !t->lldd_task || !t->dev)) { 2054c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2055c6b9ef57SSakthivel K pm8001_printk("task or dev null\n")); 2056c6b9ef57SSakthivel K return; 2057c6b9ef57SSakthivel K } 2058c6b9ef57SSakthivel K 2059c6b9ef57SSakthivel K ts = &t->task_status; 2060c6b9ef57SSakthivel K if (!ts) { 2061c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2062c6b9ef57SSakthivel K pm8001_printk("ts null\n")); 2063c6b9ef57SSakthivel K return; 2064c6b9ef57SSakthivel K } 2065cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 2066cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 2067cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) { 2068cb269c26SAnand Kumar Santhanam if (!((t->dev->parent) && 2069cb269c26SAnand Kumar Santhanam (DEV_IS_EXPANDER(t->dev->parent->dev_type)))) { 2070cb269c26SAnand Kumar Santhanam for (i = 0 , j = 4; i <= 3 && j <= 7; i++ , j++) 2071cb269c26SAnand Kumar Santhanam sata_addr_low[i] = pm8001_ha->sas_addr[j]; 2072cb269c26SAnand Kumar Santhanam for (i = 0 , j = 0; i <= 3 && j <= 3; i++ , j++) 2073cb269c26SAnand Kumar Santhanam sata_addr_hi[i] = pm8001_ha->sas_addr[j]; 2074cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_low, sata_addr_low, 2075cb269c26SAnand Kumar Santhanam sizeof(sata_addr_low)); 2076cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_hi, sata_addr_hi, 2077cb269c26SAnand Kumar Santhanam sizeof(sata_addr_hi)); 2078cb269c26SAnand Kumar Santhanam temp_sata_addr_hi = (((temp_sata_addr_hi >> 24) & 0xff) 2079cb269c26SAnand Kumar Santhanam |((temp_sata_addr_hi << 8) & 2080cb269c26SAnand Kumar Santhanam 0xff0000) | 2081cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi >> 8) 2082cb269c26SAnand Kumar Santhanam & 0xff00) | 2083cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi << 24) & 2084cb269c26SAnand Kumar Santhanam 0xff000000)); 2085cb269c26SAnand Kumar Santhanam temp_sata_addr_low = ((((temp_sata_addr_low >> 24) 2086cb269c26SAnand Kumar Santhanam & 0xff) | 2087cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 8) 2088cb269c26SAnand Kumar Santhanam & 0xff0000) | 2089cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low >> 8) 2090cb269c26SAnand Kumar Santhanam & 0xff00) | 2091cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 24) 2092cb269c26SAnand Kumar Santhanam & 0xff000000)) + 2093cb269c26SAnand Kumar Santhanam pm8001_dev->attached_phy + 2094cb269c26SAnand Kumar Santhanam 0x10); 2095cb269c26SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 2096cb269c26SAnand Kumar Santhanam pm8001_printk("SAS Address of IO Failure Drive:" 2097cb269c26SAnand Kumar Santhanam "%08x%08x", temp_sata_addr_hi, 2098cb269c26SAnand Kumar Santhanam temp_sata_addr_low)); 2099f5860992SSakthivel K 2100cb269c26SAnand Kumar Santhanam } else { 2101cb269c26SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 2102cb269c26SAnand Kumar Santhanam pm8001_printk("SAS Address of IO Failure Drive:" 2103cb269c26SAnand Kumar Santhanam "%016llx", SAS_ADDR(t->dev->sas_addr))); 2104cb269c26SAnand Kumar Santhanam } 2105cb269c26SAnand Kumar Santhanam } 2106f5860992SSakthivel K switch (status) { 2107f5860992SSakthivel K case IO_SUCCESS: 2108f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n")); 2109f5860992SSakthivel K if (param == 0) { 2110f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2111f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 2112c6b9ef57SSakthivel K /* check if response is for SEND READ LOG */ 2113c6b9ef57SSakthivel K if (pm8001_dev && 2114c6b9ef57SSakthivel K (pm8001_dev->id & NCQ_READ_LOG_FLAG)) { 2115c6b9ef57SSakthivel K /* set new bit for abort_all */ 2116c6b9ef57SSakthivel K pm8001_dev->id |= NCQ_ABORT_ALL_FLAG; 2117c6b9ef57SSakthivel K /* clear bit for read log */ 2118c6b9ef57SSakthivel K pm8001_dev->id = pm8001_dev->id & 0x7FFFFFFF; 2119c6b9ef57SSakthivel K pm80xx_send_abort_all(pm8001_ha, pm8001_dev); 2120c6b9ef57SSakthivel K /* Free the tag */ 2121c6b9ef57SSakthivel K pm8001_tag_free(pm8001_ha, tag); 2122c6b9ef57SSakthivel K sas_free_task(t); 2123c6b9ef57SSakthivel K return; 2124c6b9ef57SSakthivel K } 2125f5860992SSakthivel K } else { 2126f5860992SSakthivel K u8 len; 2127f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2128f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 2129f5860992SSakthivel K ts->residual = param; 2130f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2131f5860992SSakthivel K pm8001_printk("SAS_PROTO_RESPONSE len = %d\n", 2132f5860992SSakthivel K param)); 2133f5860992SSakthivel K sata_resp = &psataPayload->sata_resp[0]; 2134f5860992SSakthivel K resp = (struct ata_task_resp *)ts->buf; 2135f5860992SSakthivel K if (t->ata_task.dma_xfer == 0 && 2136f73bdebdSChristoph Hellwig t->data_dir == DMA_FROM_DEVICE) { 2137f5860992SSakthivel K len = sizeof(struct pio_setup_fis); 2138f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2139f5860992SSakthivel K pm8001_printk("PIO read len = %d\n", len)); 2140f5860992SSakthivel K } else if (t->ata_task.use_ncq) { 2141f5860992SSakthivel K len = sizeof(struct set_dev_bits_fis); 2142f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2143f5860992SSakthivel K pm8001_printk("FPDMA len = %d\n", len)); 2144f5860992SSakthivel K } else { 2145f5860992SSakthivel K len = sizeof(struct dev_to_host_fis); 2146f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2147f5860992SSakthivel K pm8001_printk("other len = %d\n", len)); 2148f5860992SSakthivel K } 2149f5860992SSakthivel K if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) { 2150f5860992SSakthivel K resp->frame_len = len; 2151f5860992SSakthivel K memcpy(&resp->ending_fis[0], sata_resp, len); 2152f5860992SSakthivel K ts->buf_valid_size = sizeof(*resp); 2153f5860992SSakthivel K } else 2154f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2155f5860992SSakthivel K pm8001_printk("response to large\n")); 2156f5860992SSakthivel K } 2157f5860992SSakthivel K if (pm8001_dev) 2158f5860992SSakthivel K pm8001_dev->running_req--; 2159f5860992SSakthivel K break; 2160f5860992SSakthivel K case IO_ABORTED: 2161f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2162f5860992SSakthivel K pm8001_printk("IO_ABORTED IOMB Tag\n")); 2163f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2164f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2165f5860992SSakthivel K if (pm8001_dev) 2166f5860992SSakthivel K pm8001_dev->running_req--; 2167f5860992SSakthivel K break; 2168f5860992SSakthivel K /* following cases are to do cases */ 2169f5860992SSakthivel K case IO_UNDERFLOW: 2170f5860992SSakthivel K /* SATA Completion with error */ 2171f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2172f5860992SSakthivel K pm8001_printk("IO_UNDERFLOW param = %d\n", param)); 2173f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2174f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2175f5860992SSakthivel K ts->residual = param; 2176f5860992SSakthivel K if (pm8001_dev) 2177f5860992SSakthivel K pm8001_dev->running_req--; 2178f5860992SSakthivel K break; 2179f5860992SSakthivel K case IO_NO_DEVICE: 2180f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2181f5860992SSakthivel K pm8001_printk("IO_NO_DEVICE\n")); 2182f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2183f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 2184f5860992SSakthivel K break; 2185f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2186f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2187f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2188f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2189f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2190f5860992SSakthivel K break; 2191f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2192f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2193f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2194f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2195f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2196f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2197f5860992SSakthivel K break; 2198f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2199f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2200f5860992SSakthivel K "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2201f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2202f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2203f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2204f5860992SSakthivel K break; 2205f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2206f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2207f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2208f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2209f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2210f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2211f5860992SSakthivel K break; 2212f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2213f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2214f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2215f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2216f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2217f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2218f5860992SSakthivel K break; 2219f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2220a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2221a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2222a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2223a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2224a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2225f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2226f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2227f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2228f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2229f5860992SSakthivel K if (!t->uldd_task) { 2230f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2231f5860992SSakthivel K pm8001_dev, 2232f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2233f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2234f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 22352b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2236f5860992SSakthivel K return; 2237f5860992SSakthivel K } 2238f5860992SSakthivel K break; 2239f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2240f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2241f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2242f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2243f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2244f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2245f5860992SSakthivel K if (!t->uldd_task) { 2246f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2247f5860992SSakthivel K pm8001_dev, 2248f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2249f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2250f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 22512b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2252f5860992SSakthivel K return; 2253f5860992SSakthivel K } 2254f5860992SSakthivel K break; 2255f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 2256f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2257f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 2258f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2259f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2260f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2261f5860992SSakthivel K break; 2262f5860992SSakthivel K case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY: 2263f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2264f5860992SSakthivel K "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n")); 2265f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2266f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2267f5860992SSakthivel K if (!t->uldd_task) { 2268f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2269f5860992SSakthivel K pm8001_dev, 2270f5860992SSakthivel K IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY); 2271f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2272f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 22732b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2274f5860992SSakthivel K return; 2275f5860992SSakthivel K } 2276f5860992SSakthivel K break; 2277f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 2278f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2279f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 2280f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2281f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2282f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2283f5860992SSakthivel K break; 2284f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 2285f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2286f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 2287f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2288f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2289f5860992SSakthivel K break; 2290f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 2291f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2292f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n")); 2293f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2294f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2295f5860992SSakthivel K break; 2296f5860992SSakthivel K case IO_XFER_ERROR_DMA: 2297f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2298f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_DMA\n")); 2299f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2300f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2301f5860992SSakthivel K break; 2302f5860992SSakthivel K case IO_XFER_ERROR_SATA_LINK_TIMEOUT: 2303f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2304f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_SATA_LINK_TIMEOUT\n")); 2305f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2306f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2307f5860992SSakthivel K break; 2308f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 2309f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2310f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n")); 2311f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2312f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2313f5860992SSakthivel K break; 2314f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2315f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2316f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2317f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2318f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2319f5860992SSakthivel K break; 2320f5860992SSakthivel K case IO_PORT_IN_RESET: 2321f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2322f5860992SSakthivel K pm8001_printk("IO_PORT_IN_RESET\n")); 2323f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2324f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2325f5860992SSakthivel K break; 2326f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 2327f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2328f5860992SSakthivel K pm8001_printk("IO_DS_NON_OPERATIONAL\n")); 2329f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2330f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2331f5860992SSakthivel K if (!t->uldd_task) { 2332f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2333f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2334f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2335f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 23362b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2337f5860992SSakthivel K return; 2338f5860992SSakthivel K } 2339f5860992SSakthivel K break; 2340f5860992SSakthivel K case IO_DS_IN_RECOVERY: 2341f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2342f5860992SSakthivel K pm8001_printk("IO_DS_IN_RECOVERY\n")); 2343f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2344f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2345f5860992SSakthivel K break; 2346f5860992SSakthivel K case IO_DS_IN_ERROR: 2347f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2348f5860992SSakthivel K pm8001_printk("IO_DS_IN_ERROR\n")); 2349f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2350f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2351f5860992SSakthivel K if (!t->uldd_task) { 2352f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2353f5860992SSakthivel K IO_DS_IN_ERROR); 2354f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2355f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 23562b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2357f5860992SSakthivel K return; 2358f5860992SSakthivel K } 2359f5860992SSakthivel K break; 2360f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 2361f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2362f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n")); 2363f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2364f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2365f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 236650acde8eSJohannes Thumshirn break; 2367f5860992SSakthivel K default: 2368f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2369f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", status)); 2370f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2371f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2372f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2373f5860992SSakthivel K break; 2374f5860992SSakthivel K } 2375f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2376f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2377f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2378f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2379f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2380f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2381f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2382f5860992SSakthivel K pm8001_printk("task 0x%p done with io_status 0x%x" 2383f5860992SSakthivel K " resp 0x%x stat 0x%x but aborted by upper layer!\n", 2384f5860992SSakthivel K t, status, ts->resp, ts->stat)); 2385f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 23862b01d816SSuresh Thiagarajan } else { 2387f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 23882b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2389f5860992SSakthivel K } 2390f5860992SSakthivel K } 2391f5860992SSakthivel K 2392f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2393f5860992SSakthivel K static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 2394f5860992SSakthivel K { 2395f5860992SSakthivel K struct sas_task *t; 2396f5860992SSakthivel K struct task_status_struct *ts; 2397f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2398f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2399f5860992SSakthivel K struct sata_event_resp *psataPayload = 2400f5860992SSakthivel K (struct sata_event_resp *)(piomb + 4); 2401f5860992SSakthivel K u32 event = le32_to_cpu(psataPayload->event); 2402f5860992SSakthivel K u32 tag = le32_to_cpu(psataPayload->tag); 2403f5860992SSakthivel K u32 port_id = le32_to_cpu(psataPayload->port_id); 2404c6b9ef57SSakthivel K u32 dev_id = le32_to_cpu(psataPayload->device_id); 2405c6b9ef57SSakthivel K unsigned long flags; 2406f5860992SSakthivel K 2407f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2408c6b9ef57SSakthivel K 2409c6b9ef57SSakthivel K if (ccb) { 2410f5860992SSakthivel K t = ccb->task; 2411f5860992SSakthivel K pm8001_dev = ccb->device; 2412c6b9ef57SSakthivel K } else { 2413c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2414c6b9ef57SSakthivel K pm8001_printk("No CCB !!!. returning\n")); 2415c6b9ef57SSakthivel K return; 2416c6b9ef57SSakthivel K } 2417f5860992SSakthivel K if (event) 2418f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2419c6b9ef57SSakthivel K pm8001_printk("SATA EVENT 0x%x\n", event)); 2420c6b9ef57SSakthivel K 2421c6b9ef57SSakthivel K /* Check if this is NCQ error */ 2422c6b9ef57SSakthivel K if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) { 2423c6b9ef57SSakthivel K /* find device using device id */ 2424c6b9ef57SSakthivel K pm8001_dev = pm8001_find_dev(pm8001_ha, dev_id); 2425c6b9ef57SSakthivel K /* send read log extension */ 2426c6b9ef57SSakthivel K if (pm8001_dev) 2427c6b9ef57SSakthivel K pm80xx_send_read_log(pm8001_ha, pm8001_dev); 2428f5860992SSakthivel K return; 2429c6b9ef57SSakthivel K } 2430c6b9ef57SSakthivel K 2431c6b9ef57SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) { 2432c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2433c6b9ef57SSakthivel K pm8001_printk("task or dev null\n")); 2434c6b9ef57SSakthivel K return; 2435c6b9ef57SSakthivel K } 2436c6b9ef57SSakthivel K 2437f5860992SSakthivel K ts = &t->task_status; 2438f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2439f5860992SSakthivel K pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n", 2440f5860992SSakthivel K port_id, tag, event)); 2441f5860992SSakthivel K switch (event) { 2442f5860992SSakthivel K case IO_OVERFLOW: 2443f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n")); 2444f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2445f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2446f5860992SSakthivel K ts->residual = 0; 2447f5860992SSakthivel K if (pm8001_dev) 2448f5860992SSakthivel K pm8001_dev->running_req--; 2449f5860992SSakthivel K break; 2450f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2451f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2452f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2453f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2454f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2455f5860992SSakthivel K break; 2456f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2457f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2458f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2459f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2460f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2461f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2462f5860992SSakthivel K break; 2463f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2464f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2465f5860992SSakthivel K "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2466f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2467f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2468f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2469f5860992SSakthivel K break; 2470f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2471f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2472f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2473f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2474f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2475f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2476f5860992SSakthivel K break; 2477f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2478f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2479f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2480f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2481f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2482f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2483f5860992SSakthivel K break; 2484f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2485a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2486a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2487a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2488a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2489a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2490a6cb3d01SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2491f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2492f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2493f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2494f5860992SSakthivel K if (!t->uldd_task) { 2495f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2496f5860992SSakthivel K pm8001_dev, 2497f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2498f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2499f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 25002b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2501f5860992SSakthivel K return; 2502f5860992SSakthivel K } 2503f5860992SSakthivel K break; 2504f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2505f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2506f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2507f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2508f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2509f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2510f5860992SSakthivel K break; 2511f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 2512f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2513f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 2514f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2515f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2516f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2517f5860992SSakthivel K break; 2518f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 2519f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2520f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 2521f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2522f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2523f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2524f5860992SSakthivel K break; 2525f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 2526f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2527f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 2528f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2529f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2530f5860992SSakthivel K break; 2531f5860992SSakthivel K case IO_XFER_ERROR_PEER_ABORTED: 2532f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2533f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PEER_ABORTED\n")); 2534f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2535f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2536f5860992SSakthivel K break; 2537f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 2538f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2539f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n")); 2540f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2541f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2542f5860992SSakthivel K break; 2543f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2544f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2545f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2546f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2547f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2548f5860992SSakthivel K break; 2549f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 2550f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2551f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n")); 2552f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2553f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2554f5860992SSakthivel K break; 2555f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 2556f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2557f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n")); 2558f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2559f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2560f5860992SSakthivel K break; 2561f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 2562f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2563f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n")); 2564f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2565f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2566f5860992SSakthivel K break; 2567f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 2568f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2569f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n")); 2570f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2571f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2572f5860992SSakthivel K break; 2573f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 2574f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2575f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n")); 2576f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2577f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2578f5860992SSakthivel K break; 2579f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 2580f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2581f5860992SSakthivel K pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n")); 2582f5860992SSakthivel K break; 2583f5860992SSakthivel K case IO_XFER_PIO_SETUP_ERROR: 2584f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2585f5860992SSakthivel K pm8001_printk("IO_XFER_PIO_SETUP_ERROR\n")); 2586f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2587f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2588f5860992SSakthivel K break; 2589a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 2590a6cb3d01SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2591a6cb3d01SSakthivel K pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n")); 2592a6cb3d01SSakthivel K /* TBC: used default set values */ 2593a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2594a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2595a6cb3d01SSakthivel K break; 2596a6cb3d01SSakthivel K case IO_XFER_DMA_ACTIVATE_TIMEOUT: 2597a6cb3d01SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2598a6cb3d01SSakthivel K pm8001_printk("IO_XFR_DMA_ACTIVATE_TIMEOUT\n")); 2599a6cb3d01SSakthivel K /* TBC: used default set values */ 2600a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2601a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2602a6cb3d01SSakthivel K break; 2603f5860992SSakthivel K default: 2604f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2605f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", event)); 2606f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2607f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2608f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2609f5860992SSakthivel K break; 2610f5860992SSakthivel K } 2611f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2612f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2613f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2614f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2615f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2616f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2617f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2618f5860992SSakthivel K pm8001_printk("task 0x%p done with io_status 0x%x" 2619f5860992SSakthivel K " resp 0x%x stat 0x%x but aborted by upper layer!\n", 2620f5860992SSakthivel K t, event, ts->resp, ts->stat)); 2621f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 26222b01d816SSuresh Thiagarajan } else { 2623f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 26242b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2625f5860992SSakthivel K } 2626f5860992SSakthivel K } 2627f5860992SSakthivel K 2628f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2629f5860992SSakthivel K static void 2630f5860992SSakthivel K mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 2631f5860992SSakthivel K { 2632f5860992SSakthivel K u32 param, i; 2633f5860992SSakthivel K struct sas_task *t; 2634f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2635f5860992SSakthivel K unsigned long flags; 2636f5860992SSakthivel K u32 status; 2637f5860992SSakthivel K u32 tag; 2638f5860992SSakthivel K struct smp_completion_resp *psmpPayload; 2639f5860992SSakthivel K struct task_status_struct *ts; 2640f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2641f5860992SSakthivel K char *pdma_respaddr = NULL; 2642f5860992SSakthivel K 2643f5860992SSakthivel K psmpPayload = (struct smp_completion_resp *)(piomb + 4); 2644f5860992SSakthivel K status = le32_to_cpu(psmpPayload->status); 2645f5860992SSakthivel K tag = le32_to_cpu(psmpPayload->tag); 2646f5860992SSakthivel K 2647f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2648f5860992SSakthivel K param = le32_to_cpu(psmpPayload->param); 2649f5860992SSakthivel K t = ccb->task; 2650f5860992SSakthivel K ts = &t->task_status; 2651f5860992SSakthivel K pm8001_dev = ccb->device; 2652f5860992SSakthivel K if (status) 2653f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2654f5860992SSakthivel K pm8001_printk("smp IO status 0x%x\n", status)); 2655f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 2656f5860992SSakthivel K return; 2657f5860992SSakthivel K 2658f5860992SSakthivel K switch (status) { 2659f5860992SSakthivel K 2660f5860992SSakthivel K case IO_SUCCESS: 2661f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n")); 2662f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2663f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 2664f5860992SSakthivel K if (pm8001_dev) 2665f5860992SSakthivel K pm8001_dev->running_req--; 2666f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 2667f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2668f5860992SSakthivel K pm8001_printk("DIRECT RESPONSE Length:%d\n", 2669f5860992SSakthivel K param)); 2670f5860992SSakthivel K pdma_respaddr = (char *)(phys_to_virt(cpu_to_le64 2671f5860992SSakthivel K ((u64)sg_dma_address 2672f5860992SSakthivel K (&t->smp_task.smp_resp)))); 2673f5860992SSakthivel K for (i = 0; i < param; i++) { 2674f5860992SSakthivel K *(pdma_respaddr+i) = psmpPayload->_r_a[i]; 2675f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2676f5860992SSakthivel K "SMP Byte%d DMA data 0x%x psmp 0x%x\n", 2677f5860992SSakthivel K i, *(pdma_respaddr+i), 2678f5860992SSakthivel K psmpPayload->_r_a[i])); 2679f5860992SSakthivel K } 2680f5860992SSakthivel K } 2681f5860992SSakthivel K break; 2682f5860992SSakthivel K case IO_ABORTED: 2683f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2684f5860992SSakthivel K pm8001_printk("IO_ABORTED IOMB\n")); 2685f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2686f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2687f5860992SSakthivel K if (pm8001_dev) 2688f5860992SSakthivel K pm8001_dev->running_req--; 2689f5860992SSakthivel K break; 2690f5860992SSakthivel K case IO_OVERFLOW: 2691f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n")); 2692f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2693f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2694f5860992SSakthivel K ts->residual = 0; 2695f5860992SSakthivel K if (pm8001_dev) 2696f5860992SSakthivel K pm8001_dev->running_req--; 2697f5860992SSakthivel K break; 2698f5860992SSakthivel K case IO_NO_DEVICE: 2699f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_NO_DEVICE\n")); 2700f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2701f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 2702f5860992SSakthivel K break; 2703f5860992SSakthivel K case IO_ERROR_HW_TIMEOUT: 2704f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2705f5860992SSakthivel K pm8001_printk("IO_ERROR_HW_TIMEOUT\n")); 2706f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2707f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 2708f5860992SSakthivel K break; 2709f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2710f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2711f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2712f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2713f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 2714f5860992SSakthivel K break; 2715f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2716f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2717f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2718f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2719f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 2720f5860992SSakthivel K break; 2721f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2722f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2723f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2724f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2725f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2726f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2727f5860992SSakthivel K break; 2728f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2729f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2730f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2731f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2732f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2733f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2734f5860992SSakthivel K break; 2735f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2736f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2737f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2738f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2739f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2740f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2741f5860992SSakthivel K break; 2742f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2743a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2744a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2745a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2746a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2747a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2748f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2749f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2750f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2751f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2752f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2753f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2754f5860992SSakthivel K pm8001_dev, 2755f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2756f5860992SSakthivel K break; 2757f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2758f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2759f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2760f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2761f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2762f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2763f5860992SSakthivel K break; 2764f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 2765f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk(\ 2766f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 2767f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2768f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2769f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2770f5860992SSakthivel K break; 2771f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 2772f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2773f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 2774f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2775f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2776f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2777f5860992SSakthivel K break; 2778f5860992SSakthivel K case IO_XFER_ERROR_RX_FRAME: 2779f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2780f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_RX_FRAME\n")); 2781f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2782f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2783f5860992SSakthivel K break; 2784f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2785f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2786f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2787f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2788f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2789f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2790f5860992SSakthivel K break; 2791f5860992SSakthivel K case IO_ERROR_INTERNAL_SMP_RESOURCE: 2792f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2793f5860992SSakthivel K pm8001_printk("IO_ERROR_INTERNAL_SMP_RESOURCE\n")); 2794f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2795f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2796f5860992SSakthivel K break; 2797f5860992SSakthivel K case IO_PORT_IN_RESET: 2798f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2799f5860992SSakthivel K pm8001_printk("IO_PORT_IN_RESET\n")); 2800f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2801f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2802f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2803f5860992SSakthivel K break; 2804f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 2805f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2806f5860992SSakthivel K pm8001_printk("IO_DS_NON_OPERATIONAL\n")); 2807f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2808f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2809f5860992SSakthivel K break; 2810f5860992SSakthivel K case IO_DS_IN_RECOVERY: 2811f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2812f5860992SSakthivel K pm8001_printk("IO_DS_IN_RECOVERY\n")); 2813f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2814f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2815f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2816f5860992SSakthivel K break; 2817f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 2818f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2819f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n")); 2820f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2821f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2822f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2823f5860992SSakthivel K break; 2824f5860992SSakthivel K default: 2825f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2826f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", status)); 2827f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2828f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2829f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2830f5860992SSakthivel K break; 2831f5860992SSakthivel K } 2832f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2833f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2834f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2835f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2836f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2837f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2838f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 2839f5860992SSakthivel K "task 0x%p done with io_status 0x%x resp 0x%x" 2840f5860992SSakthivel K "stat 0x%x but aborted by upper layer!\n", 2841f5860992SSakthivel K t, status, ts->resp, ts->stat)); 2842f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2843f5860992SSakthivel K } else { 2844f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2845f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2846f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2847f5860992SSakthivel K t->task_done(t); 2848f5860992SSakthivel K } 2849f5860992SSakthivel K } 2850f5860992SSakthivel K 2851f5860992SSakthivel K /** 2852f5860992SSakthivel K * pm80xx_hw_event_ack_req- For PM8001,some events need to acknowage to FW. 2853f5860992SSakthivel K * @pm8001_ha: our hba card information 2854f5860992SSakthivel K * @Qnum: the outbound queue message number. 2855f5860992SSakthivel K * @SEA: source of event to ack 2856f5860992SSakthivel K * @port_id: port id. 2857f5860992SSakthivel K * @phyId: phy id. 2858f5860992SSakthivel K * @param0: parameter 0. 2859f5860992SSakthivel K * @param1: parameter 1. 2860f5860992SSakthivel K */ 2861f5860992SSakthivel K static void pm80xx_hw_event_ack_req(struct pm8001_hba_info *pm8001_ha, 2862f5860992SSakthivel K u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, u32 param1) 2863f5860992SSakthivel K { 2864f5860992SSakthivel K struct hw_event_ack_req payload; 2865f5860992SSakthivel K u32 opc = OPC_INB_SAS_HW_EVENT_ACK; 2866f5860992SSakthivel K 2867f5860992SSakthivel K struct inbound_queue_table *circularQ; 2868f5860992SSakthivel K 2869f5860992SSakthivel K memset((u8 *)&payload, 0, sizeof(payload)); 2870f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[Qnum]; 2871f5860992SSakthivel K payload.tag = cpu_to_le32(1); 2872f5860992SSakthivel K payload.phyid_sea_portid = cpu_to_le32(((SEA & 0xFFFF) << 8) | 2873f5860992SSakthivel K ((phyId & 0xFF) << 24) | (port_id & 0xFF)); 2874f5860992SSakthivel K payload.param0 = cpu_to_le32(param0); 2875f5860992SSakthivel K payload.param1 = cpu_to_le32(param1); 2876f5860992SSakthivel K pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 2877f5860992SSakthivel K } 2878f5860992SSakthivel K 2879f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 2880f5860992SSakthivel K u32 phyId, u32 phy_op); 2881f5860992SSakthivel K 28828414cd80SViswas G static void hw_event_port_recover(struct pm8001_hba_info *pm8001_ha, 28838414cd80SViswas G void *piomb) 28848414cd80SViswas G { 28858414cd80SViswas G struct hw_event_resp *pPayload = (struct hw_event_resp *)(piomb + 4); 28868414cd80SViswas G u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 28878414cd80SViswas G u8 phy_id = (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 28888414cd80SViswas G u32 lr_status_evt_portid = 28898414cd80SViswas G le32_to_cpu(pPayload->lr_status_evt_portid); 28908414cd80SViswas G u8 deviceType = pPayload->sas_identify.dev_type; 28918414cd80SViswas G u8 link_rate = (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 28928414cd80SViswas G struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 28938414cd80SViswas G u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 28948414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 28958414cd80SViswas G 28968414cd80SViswas G if (deviceType == SAS_END_DEVICE) { 28978414cd80SViswas G pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 28988414cd80SViswas G PHY_NOTIFY_ENABLE_SPINUP); 28998414cd80SViswas G } 29008414cd80SViswas G 29018414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 29028414cd80SViswas G pm8001_get_lrate_mode(phy, link_rate); 29038414cd80SViswas G phy->sas_phy.oob_mode = SAS_OOB_MODE; 29048414cd80SViswas G phy->phy_state = PHY_STATE_LINK_UP_SPCV; 29058414cd80SViswas G phy->phy_attached = 1; 29068414cd80SViswas G } 29078414cd80SViswas G 2908f5860992SSakthivel K /** 2909f5860992SSakthivel K * hw_event_sas_phy_up -FW tells me a SAS phy up event. 2910f5860992SSakthivel K * @pm8001_ha: our hba card information 2911f5860992SSakthivel K * @piomb: IO message buffer 2912f5860992SSakthivel K */ 2913f5860992SSakthivel K static void 2914f5860992SSakthivel K hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 2915f5860992SSakthivel K { 2916f5860992SSakthivel K struct hw_event_resp *pPayload = 2917f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 2918f5860992SSakthivel K u32 lr_status_evt_portid = 2919f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 2920f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 2921f5860992SSakthivel K 2922f5860992SSakthivel K u8 link_rate = 2923f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 2924f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 2925f5860992SSakthivel K u8 phy_id = 2926f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 2927f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 2928f5860992SSakthivel K 2929f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 2930f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 2931f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 2932f5860992SSakthivel K unsigned long flags; 2933f5860992SSakthivel K u8 deviceType = pPayload->sas_identify.dev_type; 2934f5860992SSakthivel K port->port_state = portstate; 29358414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 29367d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 2937f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 2938f5860992SSakthivel K "portid:%d; phyid:%d; linkrate:%d; " 2939f5860992SSakthivel K "portstate:%x; devicetype:%x\n", 2940f5860992SSakthivel K port_id, phy_id, link_rate, portstate, deviceType)); 2941f5860992SSakthivel K 2942f5860992SSakthivel K switch (deviceType) { 2943f5860992SSakthivel K case SAS_PHY_UNUSED: 2944f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 2945f5860992SSakthivel K pm8001_printk("device type no device.\n")); 2946f5860992SSakthivel K break; 2947f5860992SSakthivel K case SAS_END_DEVICE: 2948f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n")); 2949f5860992SSakthivel K pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 2950f5860992SSakthivel K PHY_NOTIFY_ENABLE_SPINUP); 2951f5860992SSakthivel K port->port_attached = 1; 2952f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 2953f5860992SSakthivel K break; 2954f5860992SSakthivel K case SAS_EDGE_EXPANDER_DEVICE: 2955f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 2956f5860992SSakthivel K pm8001_printk("expander device.\n")); 2957f5860992SSakthivel K port->port_attached = 1; 2958f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 2959f5860992SSakthivel K break; 2960f5860992SSakthivel K case SAS_FANOUT_EXPANDER_DEVICE: 2961f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 2962f5860992SSakthivel K pm8001_printk("fanout expander device.\n")); 2963f5860992SSakthivel K port->port_attached = 1; 2964f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 2965f5860992SSakthivel K break; 2966f5860992SSakthivel K default: 2967f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 2968f5860992SSakthivel K pm8001_printk("unknown device type(%x)\n", deviceType)); 2969f5860992SSakthivel K break; 2970f5860992SSakthivel K } 2971f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SAS; 2972f5860992SSakthivel K phy->identify.device_type = deviceType; 2973f5860992SSakthivel K phy->phy_attached = 1; 2974f5860992SSakthivel K if (phy->identify.device_type == SAS_END_DEVICE) 2975f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SSP; 2976f5860992SSakthivel K else if (phy->identify.device_type != SAS_PHY_UNUSED) 2977f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; 2978f5860992SSakthivel K phy->sas_phy.oob_mode = SAS_OOB_MODE; 2979f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); 2980f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 2981f5860992SSakthivel K memcpy(phy->frame_rcvd, &pPayload->sas_identify, 2982f5860992SSakthivel K sizeof(struct sas_identify_frame)-4); 2983f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct sas_identify_frame) - 4; 2984f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 2985f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 2986f5860992SSakthivel K if (pm8001_ha->flags == PM8001F_RUN_TIME) 2987f5860992SSakthivel K mdelay(200);/*delay a moment to wait disk to spinup*/ 2988f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 2989f5860992SSakthivel K } 2990f5860992SSakthivel K 2991f5860992SSakthivel K /** 2992f5860992SSakthivel K * hw_event_sata_phy_up -FW tells me a SATA phy up event. 2993f5860992SSakthivel K * @pm8001_ha: our hba card information 2994f5860992SSakthivel K * @piomb: IO message buffer 2995f5860992SSakthivel K */ 2996f5860992SSakthivel K static void 2997f5860992SSakthivel K hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 2998f5860992SSakthivel K { 2999f5860992SSakthivel K struct hw_event_resp *pPayload = 3000f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3001f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3002f5860992SSakthivel K u32 lr_status_evt_portid = 3003f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3004f5860992SSakthivel K u8 link_rate = 3005f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3006f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3007f5860992SSakthivel K u8 phy_id = 3008f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3009f5860992SSakthivel K 3010f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3011f5860992SSakthivel K 3012f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3013f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3014f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3015f5860992SSakthivel K unsigned long flags; 3016f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3017f5860992SSakthivel K "port id %d, phy id %d link_rate %d portstate 0x%x\n", 3018f5860992SSakthivel K port_id, phy_id, link_rate, portstate)); 3019f5860992SSakthivel K 3020f5860992SSakthivel K port->port_state = portstate; 30217d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 3022f5860992SSakthivel K port->port_attached = 1; 3023f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3024f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SATA; 3025f5860992SSakthivel K phy->phy_attached = 1; 3026f5860992SSakthivel K phy->sas_phy.oob_mode = SATA_OOB_MODE; 3027f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); 3028f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3029f5860992SSakthivel K memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), 3030f5860992SSakthivel K sizeof(struct dev_to_host_fis)); 3031f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct dev_to_host_fis); 3032f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SATA; 3033aa9f8328SJames Bottomley phy->identify.device_type = SAS_SATA_DEV; 3034f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3035f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3036f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3037f5860992SSakthivel K } 3038f5860992SSakthivel K 3039f5860992SSakthivel K /** 3040f5860992SSakthivel K * hw_event_phy_down -we should notify the libsas the phy is down. 3041f5860992SSakthivel K * @pm8001_ha: our hba card information 3042f5860992SSakthivel K * @piomb: IO message buffer 3043f5860992SSakthivel K */ 3044f5860992SSakthivel K static void 3045f5860992SSakthivel K hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) 3046f5860992SSakthivel K { 3047f5860992SSakthivel K struct hw_event_resp *pPayload = 3048f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3049f5860992SSakthivel K 3050f5860992SSakthivel K u32 lr_status_evt_portid = 3051f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3052f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3053f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3054f5860992SSakthivel K u8 phy_id = 3055f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3056f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3057f5860992SSakthivel K 3058f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3059f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3060869ddbdcSViswas G u32 port_sata = (phy->phy_type & PORT_TYPE_SATA); 3061f5860992SSakthivel K port->port_state = portstate; 3062f5860992SSakthivel K phy->identify.device_type = 0; 3063f5860992SSakthivel K phy->phy_attached = 0; 3064f5860992SSakthivel K switch (portstate) { 3065f5860992SSakthivel K case PORT_VALID: 3066f5860992SSakthivel K break; 3067f5860992SSakthivel K case PORT_INVALID: 3068f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3069f5860992SSakthivel K pm8001_printk(" PortInvalid portID %d\n", port_id)); 3070f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3071f5860992SSakthivel K pm8001_printk(" Last phy Down and port invalid\n")); 3072869ddbdcSViswas G if (port_sata) { 30738414cd80SViswas G phy->phy_type = 0; 3074f5860992SSakthivel K port->port_attached = 0; 3075f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3076f5860992SSakthivel K port_id, phy_id, 0, 0); 30778414cd80SViswas G } 30788414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3079f5860992SSakthivel K break; 3080f5860992SSakthivel K case PORT_IN_RESET: 3081f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3082f5860992SSakthivel K pm8001_printk(" Port In Reset portID %d\n", port_id)); 3083f5860992SSakthivel K break; 3084f5860992SSakthivel K case PORT_NOT_ESTABLISHED: 3085f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 30868414cd80SViswas G pm8001_printk(" Phy Down and PORT_NOT_ESTABLISHED\n")); 3087f5860992SSakthivel K port->port_attached = 0; 3088f5860992SSakthivel K break; 3089f5860992SSakthivel K case PORT_LOSTCOMM: 3090f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 30918414cd80SViswas G pm8001_printk(" Phy Down and PORT_LOSTCOMM\n")); 3092f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3093f5860992SSakthivel K pm8001_printk(" Last phy Down and port invalid\n")); 3094869ddbdcSViswas G if (port_sata) { 3095f5860992SSakthivel K port->port_attached = 0; 30968414cd80SViswas G phy->phy_type = 0; 3097f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3098f5860992SSakthivel K port_id, phy_id, 0, 0); 30998414cd80SViswas G } 31008414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3101f5860992SSakthivel K break; 3102f5860992SSakthivel K default: 3103f5860992SSakthivel K port->port_attached = 0; 3104f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 31058414cd80SViswas G pm8001_printk(" Phy Down and(default) = 0x%x\n", 3106f5860992SSakthivel K portstate)); 3107f5860992SSakthivel K break; 3108f5860992SSakthivel K 3109f5860992SSakthivel K } 3110869ddbdcSViswas G if (port_sata && (portstate != PORT_IN_RESET)) { 3111869ddbdcSViswas G struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3112869ddbdcSViswas G 3113869ddbdcSViswas G sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); 3114869ddbdcSViswas G } 3115f5860992SSakthivel K } 3116f5860992SSakthivel K 3117f5860992SSakthivel K static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3118f5860992SSakthivel K { 3119f5860992SSakthivel K struct phy_start_resp *pPayload = 3120f5860992SSakthivel K (struct phy_start_resp *)(piomb + 4); 3121f5860992SSakthivel K u32 status = 3122f5860992SSakthivel K le32_to_cpu(pPayload->status); 3123f5860992SSakthivel K u32 phy_id = 3124f5860992SSakthivel K le32_to_cpu(pPayload->phyid); 3125f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3126f5860992SSakthivel K 3127f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 3128f5860992SSakthivel K pm8001_printk("phy start resp status:0x%x, phyid:0x%x\n", 3129f5860992SSakthivel K status, phy_id)); 3130f5860992SSakthivel K if (status == 0) { 3131cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DOWN; 3132cd135754SDeepak Ukey if (pm8001_ha->flags == PM8001F_RUN_TIME && 3133cd135754SDeepak Ukey phy->enable_completion != NULL) 3134f5860992SSakthivel K complete(phy->enable_completion); 3135f5860992SSakthivel K } 3136f5860992SSakthivel K return 0; 3137f5860992SSakthivel K 3138f5860992SSakthivel K } 3139f5860992SSakthivel K 3140f5860992SSakthivel K /** 3141f5860992SSakthivel K * mpi_thermal_hw_event -The hw event has come. 3142f5860992SSakthivel K * @pm8001_ha: our hba card information 3143f5860992SSakthivel K * @piomb: IO message buffer 3144f5860992SSakthivel K */ 3145f5860992SSakthivel K static int mpi_thermal_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3146f5860992SSakthivel K { 3147f5860992SSakthivel K struct thermal_hw_event *pPayload = 3148f5860992SSakthivel K (struct thermal_hw_event *)(piomb + 4); 3149f5860992SSakthivel K 3150f5860992SSakthivel K u32 thermal_event = le32_to_cpu(pPayload->thermal_event); 3151f5860992SSakthivel K u32 rht_lht = le32_to_cpu(pPayload->rht_lht); 3152f5860992SSakthivel K 3153f5860992SSakthivel K if (thermal_event & 0x40) { 3154f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3155f5860992SSakthivel K "Thermal Event: Local high temperature violated!\n")); 3156f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3157f5860992SSakthivel K "Thermal Event: Measured local high temperature %d\n", 3158f5860992SSakthivel K ((rht_lht & 0xFF00) >> 8))); 3159f5860992SSakthivel K } 3160f5860992SSakthivel K if (thermal_event & 0x10) { 3161f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3162f5860992SSakthivel K "Thermal Event: Remote high temperature violated!\n")); 3163f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3164f5860992SSakthivel K "Thermal Event: Measured remote high temperature %d\n", 3165f5860992SSakthivel K ((rht_lht & 0xFF000000) >> 24))); 3166f5860992SSakthivel K } 3167f5860992SSakthivel K return 0; 3168f5860992SSakthivel K } 3169f5860992SSakthivel K 3170f5860992SSakthivel K /** 3171f5860992SSakthivel K * mpi_hw_event -The hw event has come. 3172f5860992SSakthivel K * @pm8001_ha: our hba card information 3173f5860992SSakthivel K * @piomb: IO message buffer 3174f5860992SSakthivel K */ 3175f5860992SSakthivel K static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3176f5860992SSakthivel K { 31778414cd80SViswas G unsigned long flags, i; 3178f5860992SSakthivel K struct hw_event_resp *pPayload = 3179f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3180f5860992SSakthivel K u32 lr_status_evt_portid = 3181f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3182f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3183f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3184f5860992SSakthivel K u8 phy_id = 3185f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3186f5860992SSakthivel K u16 eventType = 3187f5860992SSakthivel K (u16)((lr_status_evt_portid & 0x00FFFF00) >> 8); 3188f5860992SSakthivel K u8 status = 3189f5860992SSakthivel K (u8)((lr_status_evt_portid & 0x0F000000) >> 24); 3190f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3191f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 31928414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 3193f5860992SSakthivel K struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; 3194f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3195f5860992SSakthivel K pm8001_printk("portid:%d phyid:%d event:0x%x status:0x%x\n", 3196f5860992SSakthivel K port_id, phy_id, eventType, status)); 3197f5860992SSakthivel K 3198f5860992SSakthivel K switch (eventType) { 3199f5860992SSakthivel K 3200f5860992SSakthivel K case HW_EVENT_SAS_PHY_UP: 3201f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3202f5860992SSakthivel K pm8001_printk("HW_EVENT_PHY_START_STATUS\n")); 3203f5860992SSakthivel K hw_event_sas_phy_up(pm8001_ha, piomb); 3204f5860992SSakthivel K break; 3205f5860992SSakthivel K case HW_EVENT_SATA_PHY_UP: 3206f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3207f5860992SSakthivel K pm8001_printk("HW_EVENT_SATA_PHY_UP\n")); 3208f5860992SSakthivel K hw_event_sata_phy_up(pm8001_ha, piomb); 3209f5860992SSakthivel K break; 3210f5860992SSakthivel K case HW_EVENT_SATA_SPINUP_HOLD: 3211f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3212f5860992SSakthivel K pm8001_printk("HW_EVENT_SATA_SPINUP_HOLD\n")); 3213f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); 3214f5860992SSakthivel K break; 3215f5860992SSakthivel K case HW_EVENT_PHY_DOWN: 3216f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3217f5860992SSakthivel K pm8001_printk("HW_EVENT_PHY_DOWN\n")); 3218869ddbdcSViswas G hw_event_phy_down(pm8001_ha, piomb); 3219869ddbdcSViswas G if (pm8001_ha->reset_in_progress) { 3220869ddbdcSViswas G PM8001_MSG_DBG(pm8001_ha, 3221869ddbdcSViswas G pm8001_printk("Reset in progress\n")); 3222869ddbdcSViswas G return 0; 3223869ddbdcSViswas G } 3224f5860992SSakthivel K phy->phy_attached = 0; 3225cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3226f5860992SSakthivel K break; 3227f5860992SSakthivel K case HW_EVENT_PORT_INVALID: 3228f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3229f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_INVALID\n")); 3230f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3231f5860992SSakthivel K phy->phy_attached = 0; 3232f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3233f5860992SSakthivel K break; 3234f5860992SSakthivel K /* the broadcast change primitive received, tell the LIBSAS this event 3235f5860992SSakthivel K to revalidate the sas domain*/ 3236f5860992SSakthivel K case HW_EVENT_BROADCAST_CHANGE: 3237f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3238f5860992SSakthivel K pm8001_printk("HW_EVENT_BROADCAST_CHANGE\n")); 3239f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE, 3240f5860992SSakthivel K port_id, phy_id, 1, 0); 3241f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3242f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; 3243f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3244f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3245f5860992SSakthivel K break; 3246f5860992SSakthivel K case HW_EVENT_PHY_ERROR: 3247f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3248f5860992SSakthivel K pm8001_printk("HW_EVENT_PHY_ERROR\n")); 3249f5860992SSakthivel K sas_phy_disconnected(&phy->sas_phy); 3250f5860992SSakthivel K phy->phy_attached = 0; 3251f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); 3252f5860992SSakthivel K break; 3253f5860992SSakthivel K case HW_EVENT_BROADCAST_EXP: 3254f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3255f5860992SSakthivel K pm8001_printk("HW_EVENT_BROADCAST_EXP\n")); 3256f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3257f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; 3258f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3259f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3260f5860992SSakthivel K break; 3261f5860992SSakthivel K case HW_EVENT_LINK_ERR_INVALID_DWORD: 3262f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3263f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_INVALID_DWORD\n")); 3264f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3265f5860992SSakthivel K HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0); 3266f5860992SSakthivel K break; 3267f5860992SSakthivel K case HW_EVENT_LINK_ERR_DISPARITY_ERROR: 3268f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3269f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_DISPARITY_ERROR\n")); 3270f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3271f5860992SSakthivel K HW_EVENT_LINK_ERR_DISPARITY_ERROR, 3272f5860992SSakthivel K port_id, phy_id, 0, 0); 3273f5860992SSakthivel K break; 3274f5860992SSakthivel K case HW_EVENT_LINK_ERR_CODE_VIOLATION: 3275f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3276f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_CODE_VIOLATION\n")); 3277f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3278f5860992SSakthivel K HW_EVENT_LINK_ERR_CODE_VIOLATION, 3279f5860992SSakthivel K port_id, phy_id, 0, 0); 3280f5860992SSakthivel K break; 3281f5860992SSakthivel K case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH: 3282f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3283f5860992SSakthivel K "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n")); 3284f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3285f5860992SSakthivel K HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH, 3286f5860992SSakthivel K port_id, phy_id, 0, 0); 3287f5860992SSakthivel K break; 3288f5860992SSakthivel K case HW_EVENT_MALFUNCTION: 3289f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3290f5860992SSakthivel K pm8001_printk("HW_EVENT_MALFUNCTION\n")); 3291f5860992SSakthivel K break; 3292f5860992SSakthivel K case HW_EVENT_BROADCAST_SES: 3293f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3294f5860992SSakthivel K pm8001_printk("HW_EVENT_BROADCAST_SES\n")); 3295f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3296f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; 3297f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3298f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3299f5860992SSakthivel K break; 3300f5860992SSakthivel K case HW_EVENT_INBOUND_CRC_ERROR: 3301f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3302f5860992SSakthivel K pm8001_printk("HW_EVENT_INBOUND_CRC_ERROR\n")); 3303f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3304f5860992SSakthivel K HW_EVENT_INBOUND_CRC_ERROR, 3305f5860992SSakthivel K port_id, phy_id, 0, 0); 3306f5860992SSakthivel K break; 3307f5860992SSakthivel K case HW_EVENT_HARD_RESET_RECEIVED: 3308f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3309f5860992SSakthivel K pm8001_printk("HW_EVENT_HARD_RESET_RECEIVED\n")); 3310f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET); 3311f5860992SSakthivel K break; 3312f5860992SSakthivel K case HW_EVENT_ID_FRAME_TIMEOUT: 3313f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3314f5860992SSakthivel K pm8001_printk("HW_EVENT_ID_FRAME_TIMEOUT\n")); 3315f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3316f5860992SSakthivel K phy->phy_attached = 0; 3317f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3318f5860992SSakthivel K break; 3319f5860992SSakthivel K case HW_EVENT_LINK_ERR_PHY_RESET_FAILED: 3320f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3321f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n")); 3322f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3323f5860992SSakthivel K HW_EVENT_LINK_ERR_PHY_RESET_FAILED, 3324f5860992SSakthivel K port_id, phy_id, 0, 0); 3325f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3326f5860992SSakthivel K phy->phy_attached = 0; 3327f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3328f5860992SSakthivel K break; 3329f5860992SSakthivel K case HW_EVENT_PORT_RESET_TIMER_TMO: 3330f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3331f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RESET_TIMER_TMO\n")); 3332869ddbdcSViswas G pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3333869ddbdcSViswas G port_id, phy_id, 0, 0); 3334f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3335f5860992SSakthivel K phy->phy_attached = 0; 3336f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3337869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3338869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3339869ddbdcSViswas G PORT_RESET_TMO; 3340869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3341869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3342869ddbdcSViswas G } 3343f5860992SSakthivel K break; 3344f5860992SSakthivel K case HW_EVENT_PORT_RECOVERY_TIMER_TMO: 3345f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3346f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RECOVERY_TIMER_TMO\n")); 3347a6cb3d01SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3348a6cb3d01SSakthivel K HW_EVENT_PORT_RECOVERY_TIMER_TMO, 3349a6cb3d01SSakthivel K port_id, phy_id, 0, 0); 33508414cd80SViswas G for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 33518414cd80SViswas G if (port->wide_port_phymap & (1 << i)) { 33528414cd80SViswas G phy = &pm8001_ha->phy[i]; 33538414cd80SViswas G sas_ha->notify_phy_event(&phy->sas_phy, 33548414cd80SViswas G PHYE_LOSS_OF_SIGNAL); 33558414cd80SViswas G port->wide_port_phymap &= ~(1 << i); 33568414cd80SViswas G } 33578414cd80SViswas G } 3358f5860992SSakthivel K break; 3359f5860992SSakthivel K case HW_EVENT_PORT_RECOVER: 3360f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3361f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RECOVER\n")); 33628414cd80SViswas G hw_event_port_recover(pm8001_ha, piomb); 3363f5860992SSakthivel K break; 3364f5860992SSakthivel K case HW_EVENT_PORT_RESET_COMPLETE: 3365f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3366f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RESET_COMPLETE\n")); 3367869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3368869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3369869ddbdcSViswas G PORT_RESET_SUCCESS; 3370869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3371869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3372869ddbdcSViswas G } 3373f5860992SSakthivel K break; 3374f5860992SSakthivel K case EVENT_BROADCAST_ASYNCH_EVENT: 3375f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3376f5860992SSakthivel K pm8001_printk("EVENT_BROADCAST_ASYNCH_EVENT\n")); 3377f5860992SSakthivel K break; 3378f5860992SSakthivel K default: 3379f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3380f5860992SSakthivel K pm8001_printk("Unknown event type 0x%x\n", eventType)); 3381f5860992SSakthivel K break; 3382f5860992SSakthivel K } 3383f5860992SSakthivel K return 0; 3384f5860992SSakthivel K } 3385f5860992SSakthivel K 3386f5860992SSakthivel K /** 3387f5860992SSakthivel K * mpi_phy_stop_resp - SPCv specific 3388f5860992SSakthivel K * @pm8001_ha: our hba card information 3389f5860992SSakthivel K * @piomb: IO message buffer 3390f5860992SSakthivel K */ 3391f5860992SSakthivel K static int mpi_phy_stop_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3392f5860992SSakthivel K { 3393f5860992SSakthivel K struct phy_stop_resp *pPayload = 3394f5860992SSakthivel K (struct phy_stop_resp *)(piomb + 4); 3395f5860992SSakthivel K u32 status = 3396f5860992SSakthivel K le32_to_cpu(pPayload->status); 3397f5860992SSakthivel K u32 phyid = 3398cd135754SDeepak Ukey le32_to_cpu(pPayload->phyid) & 0xFF; 3399f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phyid]; 3400f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3401f5860992SSakthivel K pm8001_printk("phy:0x%x status:0x%x\n", 3402f5860992SSakthivel K phyid, status)); 3403cd135754SDeepak Ukey if (status == PHY_STOP_SUCCESS || 3404cd135754SDeepak Ukey status == PHY_STOP_ERR_DEVICE_ATTACHED) 3405cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3406f5860992SSakthivel K return 0; 3407f5860992SSakthivel K } 3408f5860992SSakthivel K 3409f5860992SSakthivel K /** 3410f5860992SSakthivel K * mpi_set_controller_config_resp - SPCv specific 3411f5860992SSakthivel K * @pm8001_ha: our hba card information 3412f5860992SSakthivel K * @piomb: IO message buffer 3413f5860992SSakthivel K */ 3414f5860992SSakthivel K static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3415f5860992SSakthivel K void *piomb) 3416f5860992SSakthivel K { 3417f5860992SSakthivel K struct set_ctrl_cfg_resp *pPayload = 3418f5860992SSakthivel K (struct set_ctrl_cfg_resp *)(piomb + 4); 3419f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3420f5860992SSakthivel K u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd); 3421f5860992SSakthivel K 3422f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3423f5860992SSakthivel K "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n", 3424f5860992SSakthivel K status, err_qlfr_pgcd)); 3425f5860992SSakthivel K 3426f5860992SSakthivel K return 0; 3427f5860992SSakthivel K } 3428f5860992SSakthivel K 3429f5860992SSakthivel K /** 3430f5860992SSakthivel K * mpi_get_controller_config_resp - SPCv specific 3431f5860992SSakthivel K * @pm8001_ha: our hba card information 3432f5860992SSakthivel K * @piomb: IO message buffer 3433f5860992SSakthivel K */ 3434f5860992SSakthivel K static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3435f5860992SSakthivel K void *piomb) 3436f5860992SSakthivel K { 3437f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3438f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3439f5860992SSakthivel K 3440f5860992SSakthivel K return 0; 3441f5860992SSakthivel K } 3442f5860992SSakthivel K 3443f5860992SSakthivel K /** 3444f5860992SSakthivel K * mpi_get_phy_profile_resp - SPCv specific 3445f5860992SSakthivel K * @pm8001_ha: our hba card information 3446f5860992SSakthivel K * @piomb: IO message buffer 3447f5860992SSakthivel K */ 3448f5860992SSakthivel K static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3449f5860992SSakthivel K void *piomb) 3450f5860992SSakthivel K { 3451f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3452f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3453f5860992SSakthivel K 3454f5860992SSakthivel K return 0; 3455f5860992SSakthivel K } 3456f5860992SSakthivel K 3457f5860992SSakthivel K /** 3458f5860992SSakthivel K * mpi_flash_op_ext_resp - SPCv specific 3459f5860992SSakthivel K * @pm8001_ha: our hba card information 3460f5860992SSakthivel K * @piomb: IO message buffer 3461f5860992SSakthivel K */ 3462f5860992SSakthivel K static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3463f5860992SSakthivel K { 3464f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3465f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3466f5860992SSakthivel K 3467f5860992SSakthivel K return 0; 3468f5860992SSakthivel K } 3469f5860992SSakthivel K 3470f5860992SSakthivel K /** 3471f5860992SSakthivel K * mpi_set_phy_profile_resp - SPCv specific 3472f5860992SSakthivel K * @pm8001_ha: our hba card information 3473f5860992SSakthivel K * @piomb: IO message buffer 3474f5860992SSakthivel K */ 3475f5860992SSakthivel K static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3476f5860992SSakthivel K void *piomb) 3477f5860992SSakthivel K { 347827909407SAnand Kumar Santhanam u8 page_code; 347927909407SAnand Kumar Santhanam struct set_phy_profile_resp *pPayload = 348027909407SAnand Kumar Santhanam (struct set_phy_profile_resp *)(piomb + 4); 348127909407SAnand Kumar Santhanam u32 ppc_phyid = le32_to_cpu(pPayload->ppc_phyid); 348227909407SAnand Kumar Santhanam u32 status = le32_to_cpu(pPayload->status); 3483f5860992SSakthivel K 348427909407SAnand Kumar Santhanam page_code = (u8)((ppc_phyid & 0xFF00) >> 8); 348527909407SAnand Kumar Santhanam if (status) { 348627909407SAnand Kumar Santhanam /* status is FAILED */ 348727909407SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 348827909407SAnand Kumar Santhanam pm8001_printk("PhyProfile command failed with status " 348927909407SAnand Kumar Santhanam "0x%08X \n", status)); 349027909407SAnand Kumar Santhanam return -1; 349127909407SAnand Kumar Santhanam } else { 349227909407SAnand Kumar Santhanam if (page_code != SAS_PHY_ANALOG_SETTINGS_PAGE) { 349327909407SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 349427909407SAnand Kumar Santhanam pm8001_printk("Invalid page code 0x%X\n", 349527909407SAnand Kumar Santhanam page_code)); 349627909407SAnand Kumar Santhanam return -1; 349727909407SAnand Kumar Santhanam } 349827909407SAnand Kumar Santhanam } 3499f5860992SSakthivel K return 0; 3500f5860992SSakthivel K } 3501f5860992SSakthivel K 3502f5860992SSakthivel K /** 3503f5860992SSakthivel K * mpi_kek_management_resp - SPCv specific 3504f5860992SSakthivel K * @pm8001_ha: our hba card information 3505f5860992SSakthivel K * @piomb: IO message buffer 3506f5860992SSakthivel K */ 3507f5860992SSakthivel K static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha, 3508f5860992SSakthivel K void *piomb) 3509f5860992SSakthivel K { 3510f5860992SSakthivel K struct kek_mgmt_resp *pPayload = (struct kek_mgmt_resp *)(piomb + 4); 3511f5860992SSakthivel K 3512f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3513f5860992SSakthivel K u32 kidx_new_curr_ksop = le32_to_cpu(pPayload->kidx_new_curr_ksop); 3514f5860992SSakthivel K u32 err_qlfr = le32_to_cpu(pPayload->err_qlfr); 3515f5860992SSakthivel K 3516f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3517f5860992SSakthivel K "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n", 3518f5860992SSakthivel K status, kidx_new_curr_ksop, err_qlfr)); 3519f5860992SSakthivel K 3520f5860992SSakthivel K return 0; 3521f5860992SSakthivel K } 3522f5860992SSakthivel K 3523f5860992SSakthivel K /** 3524f5860992SSakthivel K * mpi_dek_management_resp - SPCv specific 3525f5860992SSakthivel K * @pm8001_ha: our hba card information 3526f5860992SSakthivel K * @piomb: IO message buffer 3527f5860992SSakthivel K */ 3528f5860992SSakthivel K static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha, 3529f5860992SSakthivel K void *piomb) 3530f5860992SSakthivel K { 3531f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3532f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3533f5860992SSakthivel K 3534f5860992SSakthivel K return 0; 3535f5860992SSakthivel K } 3536f5860992SSakthivel K 3537f5860992SSakthivel K /** 3538f5860992SSakthivel K * ssp_coalesced_comp_resp - SPCv specific 3539f5860992SSakthivel K * @pm8001_ha: our hba card information 3540f5860992SSakthivel K * @piomb: IO message buffer 3541f5860992SSakthivel K */ 3542f5860992SSakthivel K static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha, 3543f5860992SSakthivel K void *piomb) 3544f5860992SSakthivel K { 3545f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3546f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3547f5860992SSakthivel K 3548f5860992SSakthivel K return 0; 3549f5860992SSakthivel K } 3550f5860992SSakthivel K 3551f5860992SSakthivel K /** 3552f5860992SSakthivel K * process_one_iomb - process one outbound Queue memory block 3553f5860992SSakthivel K * @pm8001_ha: our hba card information 3554f5860992SSakthivel K * @piomb: IO message buffer 3555f5860992SSakthivel K */ 3556f5860992SSakthivel K static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, void *piomb) 3557f5860992SSakthivel K { 3558f5860992SSakthivel K __le32 pHeader = *(__le32 *)piomb; 3559f5860992SSakthivel K u32 opc = (u32)((le32_to_cpu(pHeader)) & 0xFFF); 3560f5860992SSakthivel K 3561f5860992SSakthivel K switch (opc) { 3562f5860992SSakthivel K case OPC_OUB_ECHO: 3563f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk("OPC_OUB_ECHO\n")); 3564f5860992SSakthivel K break; 3565f5860992SSakthivel K case OPC_OUB_HW_EVENT: 3566f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3567f5860992SSakthivel K pm8001_printk("OPC_OUB_HW_EVENT\n")); 3568f5860992SSakthivel K mpi_hw_event(pm8001_ha, piomb); 3569f5860992SSakthivel K break; 3570f5860992SSakthivel K case OPC_OUB_THERM_HW_EVENT: 3571f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3572f5860992SSakthivel K pm8001_printk("OPC_OUB_THERMAL_EVENT\n")); 3573f5860992SSakthivel K mpi_thermal_hw_event(pm8001_ha, piomb); 3574f5860992SSakthivel K break; 3575f5860992SSakthivel K case OPC_OUB_SSP_COMP: 3576f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3577f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_COMP\n")); 3578f5860992SSakthivel K mpi_ssp_completion(pm8001_ha, piomb); 3579f5860992SSakthivel K break; 3580f5860992SSakthivel K case OPC_OUB_SMP_COMP: 3581f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3582f5860992SSakthivel K pm8001_printk("OPC_OUB_SMP_COMP\n")); 3583f5860992SSakthivel K mpi_smp_completion(pm8001_ha, piomb); 3584f5860992SSakthivel K break; 3585f5860992SSakthivel K case OPC_OUB_LOCAL_PHY_CNTRL: 3586f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3587f5860992SSakthivel K pm8001_printk("OPC_OUB_LOCAL_PHY_CNTRL\n")); 3588f5860992SSakthivel K pm8001_mpi_local_phy_ctl(pm8001_ha, piomb); 3589f5860992SSakthivel K break; 3590f5860992SSakthivel K case OPC_OUB_DEV_REGIST: 3591f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3592f5860992SSakthivel K pm8001_printk("OPC_OUB_DEV_REGIST\n")); 3593f5860992SSakthivel K pm8001_mpi_reg_resp(pm8001_ha, piomb); 3594f5860992SSakthivel K break; 3595f5860992SSakthivel K case OPC_OUB_DEREG_DEV: 3596f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 35978b513d0cSMasanari Iida pm8001_printk("unregister the device\n")); 3598f5860992SSakthivel K pm8001_mpi_dereg_resp(pm8001_ha, piomb); 3599f5860992SSakthivel K break; 3600f5860992SSakthivel K case OPC_OUB_GET_DEV_HANDLE: 3601f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3602f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_DEV_HANDLE\n")); 3603f5860992SSakthivel K break; 3604f5860992SSakthivel K case OPC_OUB_SATA_COMP: 3605f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3606f5860992SSakthivel K pm8001_printk("OPC_OUB_SATA_COMP\n")); 3607f5860992SSakthivel K mpi_sata_completion(pm8001_ha, piomb); 3608f5860992SSakthivel K break; 3609f5860992SSakthivel K case OPC_OUB_SATA_EVENT: 3610f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3611f5860992SSakthivel K pm8001_printk("OPC_OUB_SATA_EVENT\n")); 3612f5860992SSakthivel K mpi_sata_event(pm8001_ha, piomb); 3613f5860992SSakthivel K break; 3614f5860992SSakthivel K case OPC_OUB_SSP_EVENT: 3615f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3616f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_EVENT\n")); 3617f5860992SSakthivel K mpi_ssp_event(pm8001_ha, piomb); 3618f5860992SSakthivel K break; 3619f5860992SSakthivel K case OPC_OUB_DEV_HANDLE_ARRIV: 3620f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3621f5860992SSakthivel K pm8001_printk("OPC_OUB_DEV_HANDLE_ARRIV\n")); 3622f5860992SSakthivel K /*This is for target*/ 3623f5860992SSakthivel K break; 3624f5860992SSakthivel K case OPC_OUB_SSP_RECV_EVENT: 3625f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3626f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_RECV_EVENT\n")); 3627f5860992SSakthivel K /*This is for target*/ 3628f5860992SSakthivel K break; 3629f5860992SSakthivel K case OPC_OUB_FW_FLASH_UPDATE: 3630f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3631f5860992SSakthivel K pm8001_printk("OPC_OUB_FW_FLASH_UPDATE\n")); 3632f5860992SSakthivel K pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb); 3633f5860992SSakthivel K break; 3634f5860992SSakthivel K case OPC_OUB_GPIO_RESPONSE: 3635f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3636f5860992SSakthivel K pm8001_printk("OPC_OUB_GPIO_RESPONSE\n")); 3637f5860992SSakthivel K break; 3638f5860992SSakthivel K case OPC_OUB_GPIO_EVENT: 3639f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3640f5860992SSakthivel K pm8001_printk("OPC_OUB_GPIO_EVENT\n")); 3641f5860992SSakthivel K break; 3642f5860992SSakthivel K case OPC_OUB_GENERAL_EVENT: 3643f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3644f5860992SSakthivel K pm8001_printk("OPC_OUB_GENERAL_EVENT\n")); 3645f5860992SSakthivel K pm8001_mpi_general_event(pm8001_ha, piomb); 3646f5860992SSakthivel K break; 3647f5860992SSakthivel K case OPC_OUB_SSP_ABORT_RSP: 3648f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3649f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_ABORT_RSP\n")); 3650f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3651f5860992SSakthivel K break; 3652f5860992SSakthivel K case OPC_OUB_SATA_ABORT_RSP: 3653f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3654f5860992SSakthivel K pm8001_printk("OPC_OUB_SATA_ABORT_RSP\n")); 3655f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3656f5860992SSakthivel K break; 3657f5860992SSakthivel K case OPC_OUB_SAS_DIAG_MODE_START_END: 3658f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3659f5860992SSakthivel K pm8001_printk("OPC_OUB_SAS_DIAG_MODE_START_END\n")); 3660f5860992SSakthivel K break; 3661f5860992SSakthivel K case OPC_OUB_SAS_DIAG_EXECUTE: 3662f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3663f5860992SSakthivel K pm8001_printk("OPC_OUB_SAS_DIAG_EXECUTE\n")); 3664f5860992SSakthivel K break; 3665f5860992SSakthivel K case OPC_OUB_GET_TIME_STAMP: 3666f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3667f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_TIME_STAMP\n")); 3668f5860992SSakthivel K break; 3669f5860992SSakthivel K case OPC_OUB_SAS_HW_EVENT_ACK: 3670f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3671f5860992SSakthivel K pm8001_printk("OPC_OUB_SAS_HW_EVENT_ACK\n")); 3672f5860992SSakthivel K break; 3673f5860992SSakthivel K case OPC_OUB_PORT_CONTROL: 3674f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3675f5860992SSakthivel K pm8001_printk("OPC_OUB_PORT_CONTROL\n")); 3676f5860992SSakthivel K break; 3677f5860992SSakthivel K case OPC_OUB_SMP_ABORT_RSP: 3678f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3679f5860992SSakthivel K pm8001_printk("OPC_OUB_SMP_ABORT_RSP\n")); 3680f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3681f5860992SSakthivel K break; 3682f5860992SSakthivel K case OPC_OUB_GET_NVMD_DATA: 3683f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3684f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_NVMD_DATA\n")); 3685f5860992SSakthivel K pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb); 3686f5860992SSakthivel K break; 3687f5860992SSakthivel K case OPC_OUB_SET_NVMD_DATA: 3688f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3689f5860992SSakthivel K pm8001_printk("OPC_OUB_SET_NVMD_DATA\n")); 3690f5860992SSakthivel K pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb); 3691f5860992SSakthivel K break; 3692f5860992SSakthivel K case OPC_OUB_DEVICE_HANDLE_REMOVAL: 3693f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3694f5860992SSakthivel K pm8001_printk("OPC_OUB_DEVICE_HANDLE_REMOVAL\n")); 3695f5860992SSakthivel K break; 3696f5860992SSakthivel K case OPC_OUB_SET_DEVICE_STATE: 3697f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3698f5860992SSakthivel K pm8001_printk("OPC_OUB_SET_DEVICE_STATE\n")); 3699f5860992SSakthivel K pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb); 3700f5860992SSakthivel K break; 3701f5860992SSakthivel K case OPC_OUB_GET_DEVICE_STATE: 3702f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3703f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_DEVICE_STATE\n")); 3704f5860992SSakthivel K break; 3705f5860992SSakthivel K case OPC_OUB_SET_DEV_INFO: 3706f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3707f5860992SSakthivel K pm8001_printk("OPC_OUB_SET_DEV_INFO\n")); 3708f5860992SSakthivel K break; 3709f5860992SSakthivel K /* spcv specifc commands */ 3710f5860992SSakthivel K case OPC_OUB_PHY_START_RESP: 3711f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3712f5860992SSakthivel K "OPC_OUB_PHY_START_RESP opcode:%x\n", opc)); 3713f5860992SSakthivel K mpi_phy_start_resp(pm8001_ha, piomb); 3714f5860992SSakthivel K break; 3715f5860992SSakthivel K case OPC_OUB_PHY_STOP_RESP: 3716f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3717f5860992SSakthivel K "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc)); 3718f5860992SSakthivel K mpi_phy_stop_resp(pm8001_ha, piomb); 3719f5860992SSakthivel K break; 3720f5860992SSakthivel K case OPC_OUB_SET_CONTROLLER_CONFIG: 3721f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3722f5860992SSakthivel K "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc)); 3723f5860992SSakthivel K mpi_set_controller_config_resp(pm8001_ha, piomb); 3724f5860992SSakthivel K break; 3725f5860992SSakthivel K case OPC_OUB_GET_CONTROLLER_CONFIG: 3726f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3727f5860992SSakthivel K "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc)); 3728f5860992SSakthivel K mpi_get_controller_config_resp(pm8001_ha, piomb); 3729f5860992SSakthivel K break; 3730f5860992SSakthivel K case OPC_OUB_GET_PHY_PROFILE: 3731f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3732f5860992SSakthivel K "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc)); 3733f5860992SSakthivel K mpi_get_phy_profile_resp(pm8001_ha, piomb); 3734f5860992SSakthivel K break; 3735f5860992SSakthivel K case OPC_OUB_FLASH_OP_EXT: 3736f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3737f5860992SSakthivel K "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc)); 3738f5860992SSakthivel K mpi_flash_op_ext_resp(pm8001_ha, piomb); 3739f5860992SSakthivel K break; 3740f5860992SSakthivel K case OPC_OUB_SET_PHY_PROFILE: 3741f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3742f5860992SSakthivel K "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc)); 3743f5860992SSakthivel K mpi_set_phy_profile_resp(pm8001_ha, piomb); 3744f5860992SSakthivel K break; 3745f5860992SSakthivel K case OPC_OUB_KEK_MANAGEMENT_RESP: 3746f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3747f5860992SSakthivel K "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc)); 3748f5860992SSakthivel K mpi_kek_management_resp(pm8001_ha, piomb); 3749f5860992SSakthivel K break; 3750f5860992SSakthivel K case OPC_OUB_DEK_MANAGEMENT_RESP: 3751f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3752f5860992SSakthivel K "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc)); 3753f5860992SSakthivel K mpi_dek_management_resp(pm8001_ha, piomb); 3754f5860992SSakthivel K break; 3755f5860992SSakthivel K case OPC_OUB_SSP_COALESCED_COMP_RESP: 3756f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3757f5860992SSakthivel K "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc)); 3758f5860992SSakthivel K ssp_coalesced_comp_resp(pm8001_ha, piomb); 3759f5860992SSakthivel K break; 3760f5860992SSakthivel K default: 3761f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3762f5860992SSakthivel K "Unknown outbound Queue IOMB OPC = 0x%x\n", opc)); 3763f5860992SSakthivel K break; 3764f5860992SSakthivel K } 3765f5860992SSakthivel K } 3766f5860992SSakthivel K 376772349b62SDeepak Ukey static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha) 376872349b62SDeepak Ukey { 376972349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 377072349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_0: 0x%x\n", 377172349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0))); 377272349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 377372349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_1:0x%x\n", 377472349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1))); 377572349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 377672349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_2: 0x%x\n", 377772349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2))); 377872349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 377972349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_3: 0x%x\n", 378072349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3))); 378172349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 378272349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_0: 0x%x\n", 378372349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0))); 378472349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 378572349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_1: 0x%x\n", 378672349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1))); 378772349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 378872349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_2: 0x%x\n", 378972349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2))); 379072349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 379172349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_3: 0x%x\n", 379272349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3))); 379372349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 379472349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_4: 0x%x\n", 379572349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4))); 379672349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 379772349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_5: 0x%x\n", 379872349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5))); 379972349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 380072349b62SDeepak Ukey pm8001_printk("MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n", 380172349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6))); 380272349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 380372349b62SDeepak Ukey pm8001_printk("MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n", 380472349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7))); 380572349b62SDeepak Ukey } 380672349b62SDeepak Ukey 3807f5860992SSakthivel K static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) 3808f5860992SSakthivel K { 3809f5860992SSakthivel K struct outbound_queue_table *circularQ; 3810f5860992SSakthivel K void *pMsg1 = NULL; 3811f5860992SSakthivel K u8 uninitialized_var(bc); 3812f5860992SSakthivel K u32 ret = MPI_IO_STATUS_FAIL; 3813f5860992SSakthivel K unsigned long flags; 381472349b62SDeepak Ukey u32 regval; 3815f5860992SSakthivel K 381672349b62SDeepak Ukey if (vec == (pm8001_ha->number_of_intr - 1)) { 381772349b62SDeepak Ukey regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 381872349b62SDeepak Ukey if ((regval & SCRATCH_PAD_MIPSALL_READY) != 381972349b62SDeepak Ukey SCRATCH_PAD_MIPSALL_READY) { 382072349b62SDeepak Ukey pm8001_ha->controller_fatal_error = true; 382172349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 382272349b62SDeepak Ukey "Firmware Fatal error! Regval:0x%x\n", regval)); 382372349b62SDeepak Ukey print_scratchpad_registers(pm8001_ha); 382472349b62SDeepak Ukey return ret; 382572349b62SDeepak Ukey } 382672349b62SDeepak Ukey } 3827f5860992SSakthivel K spin_lock_irqsave(&pm8001_ha->lock, flags); 3828f5860992SSakthivel K circularQ = &pm8001_ha->outbnd_q_tbl[vec]; 3829f5860992SSakthivel K do { 383072349b62SDeepak Ukey /* spurious interrupt during setup if kexec-ing and 383172349b62SDeepak Ukey * driver doing a doorbell access w/ the pre-kexec oq 383272349b62SDeepak Ukey * interrupt setup. 383372349b62SDeepak Ukey */ 383472349b62SDeepak Ukey if (!circularQ->pi_virt) 383572349b62SDeepak Ukey break; 3836f5860992SSakthivel K ret = pm8001_mpi_msg_consume(pm8001_ha, circularQ, &pMsg1, &bc); 3837f5860992SSakthivel K if (MPI_IO_STATUS_SUCCESS == ret) { 3838f5860992SSakthivel K /* process the outbound message */ 3839f5860992SSakthivel K process_one_iomb(pm8001_ha, (void *)(pMsg1 - 4)); 3840f5860992SSakthivel K /* free the message from the outbound circular buffer */ 3841f5860992SSakthivel K pm8001_mpi_msg_free_set(pm8001_ha, pMsg1, 3842f5860992SSakthivel K circularQ, bc); 3843f5860992SSakthivel K } 3844f5860992SSakthivel K if (MPI_IO_STATUS_BUSY == ret) { 3845f5860992SSakthivel K /* Update the producer index from SPC */ 3846f5860992SSakthivel K circularQ->producer_index = 3847f5860992SSakthivel K cpu_to_le32(pm8001_read_32(circularQ->pi_virt)); 3848f5860992SSakthivel K if (le32_to_cpu(circularQ->producer_index) == 3849f5860992SSakthivel K circularQ->consumer_idx) 3850f5860992SSakthivel K /* OQ is empty */ 3851f5860992SSakthivel K break; 3852f5860992SSakthivel K } 3853f5860992SSakthivel K } while (1); 3854f5860992SSakthivel K spin_unlock_irqrestore(&pm8001_ha->lock, flags); 3855f5860992SSakthivel K return ret; 3856f5860992SSakthivel K } 3857f5860992SSakthivel K 3858f73bdebdSChristoph Hellwig /* DMA_... to our direction translation. */ 3859f5860992SSakthivel K static const u8 data_dir_flags[] = { 3860f73bdebdSChristoph Hellwig [DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT, /* UNSPECIFIED */ 3861f73bdebdSChristoph Hellwig [DMA_TO_DEVICE] = DATA_DIR_OUT, /* OUTBOUND */ 3862f73bdebdSChristoph Hellwig [DMA_FROM_DEVICE] = DATA_DIR_IN, /* INBOUND */ 3863f73bdebdSChristoph Hellwig [DMA_NONE] = DATA_DIR_NONE, /* NO TRANSFER */ 3864f5860992SSakthivel K }; 3865f5860992SSakthivel K 3866f5860992SSakthivel K static void build_smp_cmd(u32 deviceID, __le32 hTag, 3867f5860992SSakthivel K struct smp_req *psmp_cmd, int mode, int length) 3868f5860992SSakthivel K { 3869f5860992SSakthivel K psmp_cmd->tag = hTag; 3870f5860992SSakthivel K psmp_cmd->device_id = cpu_to_le32(deviceID); 3871f5860992SSakthivel K if (mode == SMP_DIRECT) { 3872f5860992SSakthivel K length = length - 4; /* subtract crc */ 3873f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(length << 16); 3874f5860992SSakthivel K } else { 3875f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(1|(1 << 1)); 3876f5860992SSakthivel K } 3877f5860992SSakthivel K } 3878f5860992SSakthivel K 3879f5860992SSakthivel K /** 3880f5860992SSakthivel K * pm8001_chip_smp_req - send a SMP task to FW 3881f5860992SSakthivel K * @pm8001_ha: our hba card information. 3882f5860992SSakthivel K * @ccb: the ccb information this request used. 3883f5860992SSakthivel K */ 3884f5860992SSakthivel K static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, 3885f5860992SSakthivel K struct pm8001_ccb_info *ccb) 3886f5860992SSakthivel K { 3887f5860992SSakthivel K int elem, rc; 3888f5860992SSakthivel K struct sas_task *task = ccb->task; 3889f5860992SSakthivel K struct domain_device *dev = task->dev; 3890f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 3891f5860992SSakthivel K struct scatterlist *sg_req, *sg_resp; 3892f5860992SSakthivel K u32 req_len, resp_len; 3893f5860992SSakthivel K struct smp_req smp_cmd; 3894f5860992SSakthivel K u32 opc; 3895f5860992SSakthivel K struct inbound_queue_table *circularQ; 3896f5860992SSakthivel K char *preq_dma_addr = NULL; 3897f5860992SSakthivel K __le64 tmp_addr; 3898f5860992SSakthivel K u32 i, length; 3899f5860992SSakthivel K 3900f5860992SSakthivel K memset(&smp_cmd, 0, sizeof(smp_cmd)); 3901f5860992SSakthivel K /* 3902f5860992SSakthivel K * DMA-map SMP request, response buffers 3903f5860992SSakthivel K */ 3904f5860992SSakthivel K sg_req = &task->smp_task.smp_req; 3905f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE); 3906f5860992SSakthivel K if (!elem) 3907f5860992SSakthivel K return -ENOMEM; 3908f5860992SSakthivel K req_len = sg_dma_len(sg_req); 3909f5860992SSakthivel K 3910f5860992SSakthivel K sg_resp = &task->smp_task.smp_resp; 3911f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE); 3912f5860992SSakthivel K if (!elem) { 3913f5860992SSakthivel K rc = -ENOMEM; 3914f5860992SSakthivel K goto err_out; 3915f5860992SSakthivel K } 3916f5860992SSakthivel K resp_len = sg_dma_len(sg_resp); 3917f5860992SSakthivel K /* must be in dwords */ 3918f5860992SSakthivel K if ((req_len & 0x3) || (resp_len & 0x3)) { 3919f5860992SSakthivel K rc = -EINVAL; 3920f5860992SSakthivel K goto err_out_2; 3921f5860992SSakthivel K } 3922f5860992SSakthivel K 3923f5860992SSakthivel K opc = OPC_INB_SMP_REQUEST; 3924f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 3925f5860992SSakthivel K smp_cmd.tag = cpu_to_le32(ccb->ccb_tag); 3926f5860992SSakthivel K 3927f5860992SSakthivel K length = sg_req->length; 3928f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3929f5860992SSakthivel K pm8001_printk("SMP Frame Length %d\n", sg_req->length)); 3930f5860992SSakthivel K if (!(length - 8)) 3931f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_DIRECT; 3932f5860992SSakthivel K else 3933f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_INDIRECT; 3934f5860992SSakthivel K 3935f5860992SSakthivel K 3936f5860992SSakthivel K tmp_addr = cpu_to_le64((u64)sg_dma_address(&task->smp_task.smp_req)); 3937f5860992SSakthivel K preq_dma_addr = (char *)phys_to_virt(tmp_addr); 3938f5860992SSakthivel K 3939f5860992SSakthivel K /* INDIRECT MODE command settings. Use DMA */ 3940f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) { 3941f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3942f5860992SSakthivel K pm8001_printk("SMP REQUEST INDIRECT MODE\n")); 3943f5860992SSakthivel K /* for SPCv indirect mode. Place the top 4 bytes of 3944f5860992SSakthivel K * SMP Request header here. */ 3945f5860992SSakthivel K for (i = 0; i < 4; i++) 3946f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr + i); 3947f5860992SSakthivel K /* exclude top 4 bytes for SMP req header */ 3948f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 3949f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 3950cb993e5dSAnand Kumar Santhanam (&task->smp_task.smp_req) + 4); 3951f5860992SSakthivel K /* exclude 4 bytes for SMP req header and CRC */ 3952f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 3953f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-8); 3954f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 3955f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 3956f5860992SSakthivel K (&task->smp_task.smp_resp)); 3957f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 3958f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len 3959f5860992SSakthivel K (&task->smp_task.smp_resp)-4); 3960f5860992SSakthivel K } else { /* DIRECT MODE */ 3961f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 3962f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 3963f5860992SSakthivel K (&task->smp_task.smp_req)); 3964f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 3965f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-4); 3966f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 3967f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 3968f5860992SSakthivel K (&task->smp_task.smp_resp)); 3969f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 3970f5860992SSakthivel K cpu_to_le32 3971f5860992SSakthivel K ((u32)sg_dma_len(&task->smp_task.smp_resp)-4); 3972f5860992SSakthivel K } 3973f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 3974f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3975f5860992SSakthivel K pm8001_printk("SMP REQUEST DIRECT MODE\n")); 3976f5860992SSakthivel K for (i = 0; i < length; i++) 3977f5860992SSakthivel K if (i < 16) { 3978f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr+i); 3979f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3980f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 3981f5860992SSakthivel K i, smp_cmd.smp_req16[i], 3982f5860992SSakthivel K *(preq_dma_addr))); 3983f5860992SSakthivel K } else { 3984f5860992SSakthivel K smp_cmd.smp_req[i] = *(preq_dma_addr+i); 3985f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3986f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 3987f5860992SSakthivel K i, smp_cmd.smp_req[i], 3988f5860992SSakthivel K *(preq_dma_addr))); 3989f5860992SSakthivel K } 3990f5860992SSakthivel K } 3991f5860992SSakthivel K 3992f5860992SSakthivel K build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag, 3993f5860992SSakthivel K &smp_cmd, pm8001_ha->smp_exp_mode, length); 39945533abcaSTomas Henzl rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 39955533abcaSTomas Henzl (u32 *)&smp_cmd, 0); 39965533abcaSTomas Henzl if (rc) 39975533abcaSTomas Henzl goto err_out_2; 3998f5860992SSakthivel K return 0; 3999f5860992SSakthivel K 4000f5860992SSakthivel K err_out_2: 4001f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1, 4002f73bdebdSChristoph Hellwig DMA_FROM_DEVICE); 4003f5860992SSakthivel K err_out: 4004f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1, 4005f73bdebdSChristoph Hellwig DMA_TO_DEVICE); 4006f5860992SSakthivel K return rc; 4007f5860992SSakthivel K } 4008f5860992SSakthivel K 4009f5860992SSakthivel K static int check_enc_sas_cmd(struct sas_task *task) 4010f5860992SSakthivel K { 4011e73823f7SJames Bottomley u8 cmd = task->ssp_task.cmd->cmnd[0]; 4012e73823f7SJames Bottomley 4013e73823f7SJames Bottomley if (cmd == READ_10 || cmd == WRITE_10 || cmd == WRITE_VERIFY) 4014f5860992SSakthivel K return 1; 4015f5860992SSakthivel K else 4016f5860992SSakthivel K return 0; 4017f5860992SSakthivel K } 4018f5860992SSakthivel K 4019f5860992SSakthivel K static int check_enc_sat_cmd(struct sas_task *task) 4020f5860992SSakthivel K { 4021f5860992SSakthivel K int ret = 0; 4022f5860992SSakthivel K switch (task->ata_task.fis.command) { 4023f5860992SSakthivel K case ATA_CMD_FPDMA_READ: 4024f5860992SSakthivel K case ATA_CMD_READ_EXT: 4025f5860992SSakthivel K case ATA_CMD_READ: 4026f5860992SSakthivel K case ATA_CMD_FPDMA_WRITE: 4027f5860992SSakthivel K case ATA_CMD_WRITE_EXT: 4028f5860992SSakthivel K case ATA_CMD_WRITE: 4029f5860992SSakthivel K case ATA_CMD_PIO_READ: 4030f5860992SSakthivel K case ATA_CMD_PIO_READ_EXT: 4031f5860992SSakthivel K case ATA_CMD_PIO_WRITE: 4032f5860992SSakthivel K case ATA_CMD_PIO_WRITE_EXT: 4033f5860992SSakthivel K ret = 1; 4034f5860992SSakthivel K break; 4035f5860992SSakthivel K default: 4036f5860992SSakthivel K ret = 0; 4037f5860992SSakthivel K break; 4038f5860992SSakthivel K } 4039f5860992SSakthivel K return ret; 4040f5860992SSakthivel K } 4041f5860992SSakthivel K 4042f5860992SSakthivel K /** 4043f5860992SSakthivel K * pm80xx_chip_ssp_io_req - send a SSP task to FW 4044f5860992SSakthivel K * @pm8001_ha: our hba card information. 4045f5860992SSakthivel K * @ccb: the ccb information this request used. 4046f5860992SSakthivel K */ 4047f5860992SSakthivel K static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, 4048f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4049f5860992SSakthivel K { 4050f5860992SSakthivel K struct sas_task *task = ccb->task; 4051f5860992SSakthivel K struct domain_device *dev = task->dev; 4052f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4053f5860992SSakthivel K struct ssp_ini_io_start_req ssp_cmd; 4054f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4055f5860992SSakthivel K int ret; 40560ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 40570ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4058f5860992SSakthivel K struct inbound_queue_table *circularQ; 4059f9cd6cbdSAnand Kumar Santhanam u32 q_index; 4060f5860992SSakthivel K u32 opc = OPC_INB_SSPINIIOSTART; 4061f5860992SSakthivel K memset(&ssp_cmd, 0, sizeof(ssp_cmd)); 4062f5860992SSakthivel K memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); 4063f5860992SSakthivel K /* data address domain added for spcv; set to 0 by host, 4064f5860992SSakthivel K * used internally by controller 4065f5860992SSakthivel K * 0 for SAS 1.1 and SAS 2.0 compatible TLR 4066f5860992SSakthivel K */ 4067f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = 4068f5860992SSakthivel K cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0); 4069f5860992SSakthivel K ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4070f5860992SSakthivel K ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); 4071f5860992SSakthivel K ssp_cmd.tag = cpu_to_le32(tag); 4072f5860992SSakthivel K if (task->ssp_task.enable_first_burst) 4073f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= 0x80; 4074f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_prio << 3); 4075f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_attr & 7); 4076e73823f7SJames Bottomley memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd, 4077e73823f7SJames Bottomley task->ssp_task.cmd->cmd_len); 4078f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM; 4079f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4080f5860992SSakthivel K 4081f5860992SSakthivel K /* Check if encryption is set */ 4082f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4083f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) { 4084f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4085f5860992SSakthivel K "Encryption enabled.Sending Encrypt SAS command 0x%x\n", 4086e73823f7SJames Bottomley task->ssp_task.cmd->cmnd[0])); 4087f5860992SSakthivel K opc = OPC_INB_SSP_INI_DIF_ENC_IO; 4088f5860992SSakthivel K /* enable encryption. 0 for SAS 1.1 and SAS 2.0 compatible TLR*/ 4089f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = cpu_to_le32 4090f5860992SSakthivel K ((data_dir_flags[task->data_dir] << 8) | 0x20 | 0x0); 4091f5860992SSakthivel K 4092f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4093f5860992SSakthivel K if (task->num_scatter > 1) { 4094f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4095f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 4096f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4097f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4098f5860992SSakthivel K ssp_cmd.enc_addr_low = 4099f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4100f5860992SSakthivel K ssp_cmd.enc_addr_high = 4101f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4102f5860992SSakthivel K ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 4103f5860992SSakthivel K } else if (task->num_scatter == 1) { 4104f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4105f5860992SSakthivel K ssp_cmd.enc_addr_low = 4106f5860992SSakthivel K cpu_to_le32(lower_32_bits(dma_addr)); 4107f5860992SSakthivel K ssp_cmd.enc_addr_high = 4108f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4109f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4110f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 41110ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 41120ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 41130ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.enc_len) - 1; 41140ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 41150ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 41160ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.enc_addr_high) { 41170ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 41180ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 41190ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x " 41200ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low=" 41210ecdf00bSAnand Kumar Santhanam "0x%08x has crossed 4G boundary\n", 41220ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.enc_len, 41230ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 41240ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 41250ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 41260ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 41270ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 41280ecdf00bSAnand Kumar Santhanam buf_prd[0]); 41290ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_low = 41300ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 41310ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_high = 41320ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 41330ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 41340ecdf00bSAnand Kumar Santhanam } 4135f5860992SSakthivel K } else if (task->num_scatter == 0) { 4136f5860992SSakthivel K ssp_cmd.enc_addr_low = 0; 4137f5860992SSakthivel K ssp_cmd.enc_addr_high = 0; 4138f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4139f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 4140f5860992SSakthivel K } 4141f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4142f5860992SSakthivel K ssp_cmd.key_cmode = 0x6 << 4; 4143f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4144e73823f7SJames Bottomley ssp_cmd.twk_val0 = cpu_to_le32((task->ssp_task.cmd->cmnd[2] << 24) | 4145e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[3] << 16) | 4146e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[4] << 8) | 4147e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[5])); 4148f5860992SSakthivel K } else { 4149f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4150f5860992SSakthivel K "Sending Normal SAS command 0x%x inb q %x\n", 4151f9cd6cbdSAnand Kumar Santhanam task->ssp_task.cmd->cmnd[0], q_index)); 4152f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4153f5860992SSakthivel K if (task->num_scatter > 1) { 4154f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, ccb->n_elem, 4155f5860992SSakthivel K ccb->buf_prd); 4156f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4157f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4158f5860992SSakthivel K ssp_cmd.addr_low = 4159f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4160f5860992SSakthivel K ssp_cmd.addr_high = 4161f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4162f5860992SSakthivel K ssp_cmd.esgl = cpu_to_le32(1<<31); 4163f5860992SSakthivel K } else if (task->num_scatter == 1) { 4164f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4165f5860992SSakthivel K ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(dma_addr)); 4166f5860992SSakthivel K ssp_cmd.addr_high = 4167f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4168f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4169f5860992SSakthivel K ssp_cmd.esgl = 0; 41700ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 41710ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 41720ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.len) - 1; 41730ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 41740ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 41750ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.addr_high) { 41760ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 41770ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 41780ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x " 41790ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low=" 41800ecdf00bSAnand Kumar Santhanam "0x%08x has crossed 4G boundary\n", 41810ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.len, 41820ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 41830ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 41840ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 41850ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 41860ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 41870ecdf00bSAnand Kumar Santhanam buf_prd[0]); 41880ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_low = 41890ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 41900ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_high = 41910ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 41920ecdf00bSAnand Kumar Santhanam ssp_cmd.esgl = cpu_to_le32(1<<31); 41930ecdf00bSAnand Kumar Santhanam } 4194f5860992SSakthivel K } else if (task->num_scatter == 0) { 4195f5860992SSakthivel K ssp_cmd.addr_low = 0; 4196f5860992SSakthivel K ssp_cmd.addr_high = 0; 4197f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4198f5860992SSakthivel K ssp_cmd.esgl = 0; 4199f5860992SSakthivel K } 4200f5860992SSakthivel K } 4201f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM; 4202f9cd6cbdSAnand Kumar Santhanam ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 4203f9cd6cbdSAnand Kumar Santhanam &ssp_cmd, q_index); 4204f5860992SSakthivel K return ret; 4205f5860992SSakthivel K } 4206f5860992SSakthivel K 4207f5860992SSakthivel K static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, 4208f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4209f5860992SSakthivel K { 4210f5860992SSakthivel K struct sas_task *task = ccb->task; 4211f5860992SSakthivel K struct domain_device *dev = task->dev; 4212f5860992SSakthivel K struct pm8001_device *pm8001_ha_dev = dev->lldd_dev; 4213f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4214f5860992SSakthivel K int ret; 4215f9cd6cbdSAnand Kumar Santhanam u32 q_index; 4216f5860992SSakthivel K struct sata_start_req sata_cmd; 4217f5860992SSakthivel K u32 hdr_tag, ncg_tag = 0; 42180ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 42190ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4220f5860992SSakthivel K u32 ATAP = 0x0; 4221f5860992SSakthivel K u32 dir; 4222f5860992SSakthivel K struct inbound_queue_table *circularQ; 4223c6b9ef57SSakthivel K unsigned long flags; 4224f5860992SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 4225f5860992SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 4226f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM; 4227f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4228f5860992SSakthivel K 4229f73bdebdSChristoph Hellwig if (task->data_dir == DMA_NONE) { 4230f5860992SSakthivel K ATAP = 0x04; /* no data*/ 4231f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("no data\n")); 4232f5860992SSakthivel K } else if (likely(!task->ata_task.device_control_reg_update)) { 4233f5860992SSakthivel K if (task->ata_task.dma_xfer) { 4234f5860992SSakthivel K ATAP = 0x06; /* DMA */ 4235f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("DMA\n")); 4236f5860992SSakthivel K } else { 4237f5860992SSakthivel K ATAP = 0x05; /* PIO*/ 4238f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("PIO\n")); 4239f5860992SSakthivel K } 4240f5860992SSakthivel K if (task->ata_task.use_ncq && 42411cbd772dSHannes Reinecke dev->sata_dev.class != ATA_DEV_ATAPI) { 4242f5860992SSakthivel K ATAP = 0x07; /* FPDMA */ 4243f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("FPDMA\n")); 4244f5860992SSakthivel K } 4245f5860992SSakthivel K } 4246c6b9ef57SSakthivel K if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) { 4247c6b9ef57SSakthivel K task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 4248f5860992SSakthivel K ncg_tag = hdr_tag; 4249c6b9ef57SSakthivel K } 4250f5860992SSakthivel K dir = data_dir_flags[task->data_dir] << 8; 4251f5860992SSakthivel K sata_cmd.tag = cpu_to_le32(tag); 4252f5860992SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 4253f5860992SSakthivel K sata_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4254f5860992SSakthivel K 4255f5860992SSakthivel K sata_cmd.sata_fis = task->ata_task.fis; 4256f5860992SSakthivel K if (likely(!task->ata_task.device_control_reg_update)) 4257f5860992SSakthivel K sata_cmd.sata_fis.flags |= 0x80;/* C=1: update ATA cmd reg */ 4258f5860992SSakthivel K sata_cmd.sata_fis.flags &= 0xF0;/* PM_PORT field shall be 0 */ 4259f5860992SSakthivel K 4260f5860992SSakthivel K /* Check if encryption is set */ 4261f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4262f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) { 4263f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4264f5860992SSakthivel K "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n", 4265f5860992SSakthivel K sata_cmd.sata_fis.command)); 4266f5860992SSakthivel K opc = OPC_INB_SATA_DIF_ENC_IO; 4267f5860992SSakthivel K 4268f5860992SSakthivel K /* set encryption bit */ 4269f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4270f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16)| 4271f5860992SSakthivel K ((ATAP & 0x3f) << 10) | 0x20 | dir); 4272f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4273f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4274f5860992SSakthivel K if (task->num_scatter > 1) { 4275f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4276f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 4277f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4278f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4279f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(phys_addr); 4280f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(phys_addr); 4281f5860992SSakthivel K sata_cmd.enc_esgl = cpu_to_le32(1 << 31); 4282f5860992SSakthivel K } else if (task->num_scatter == 1) { 4283f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4284f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(dma_addr); 4285f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(dma_addr); 4286f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4287f5860992SSakthivel K sata_cmd.enc_esgl = 0; 42880ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 42890ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 42900ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.enc_len) - 1; 42910ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 42920ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 42930ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.enc_addr_high) { 42940ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 42950ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 42960ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x " 42970ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low" 42980ecdf00bSAnand Kumar Santhanam "=0x%08x has crossed 4G boundary\n", 42990ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.enc_len, 43000ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 43010ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 43020ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 43030ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 43040ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 43050ecdf00bSAnand Kumar Santhanam buf_prd[0]); 43060ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_low = 43070ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 43080ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_high = 43090ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 43100ecdf00bSAnand Kumar Santhanam sata_cmd.enc_esgl = 43110ecdf00bSAnand Kumar Santhanam cpu_to_le32(1 << 31); 43120ecdf00bSAnand Kumar Santhanam } 4313f5860992SSakthivel K } else if (task->num_scatter == 0) { 4314f5860992SSakthivel K sata_cmd.enc_addr_low = 0; 4315f5860992SSakthivel K sata_cmd.enc_addr_high = 0; 4316f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4317f5860992SSakthivel K sata_cmd.enc_esgl = 0; 4318f5860992SSakthivel K } 4319f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4320f5860992SSakthivel K sata_cmd.key_index_mode = 0x6 << 4; 4321f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4322f5860992SSakthivel K sata_cmd.twk_val0 = 4323f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbal_exp << 24) | 4324f5860992SSakthivel K (sata_cmd.sata_fis.lbah << 16) | 4325f5860992SSakthivel K (sata_cmd.sata_fis.lbam << 8) | 4326f5860992SSakthivel K (sata_cmd.sata_fis.lbal)); 4327f5860992SSakthivel K sata_cmd.twk_val1 = 4328f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbah_exp << 8) | 4329f5860992SSakthivel K (sata_cmd.sata_fis.lbam_exp)); 4330f5860992SSakthivel K } else { 4331f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4332f5860992SSakthivel K "Sending Normal SATA command 0x%x inb %x\n", 4333f9cd6cbdSAnand Kumar Santhanam sata_cmd.sata_fis.command, q_index)); 4334f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4335f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4336f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16) | 4337f5860992SSakthivel K ((ATAP & 0x3f) << 10) | dir); 4338f5860992SSakthivel K 4339f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4340f5860992SSakthivel K if (task->num_scatter > 1) { 4341f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4342f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 4343f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4344f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4345f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(phys_addr); 4346f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(phys_addr); 4347f5860992SSakthivel K sata_cmd.esgl = cpu_to_le32(1 << 31); 4348f5860992SSakthivel K } else if (task->num_scatter == 1) { 4349f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4350f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(dma_addr); 4351f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(dma_addr); 4352f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4353f5860992SSakthivel K sata_cmd.esgl = 0; 43540ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 43550ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 43560ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.len) - 1; 43570ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 43580ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 43590ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.addr_high) { 43600ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 43610ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 43620ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x" 43630ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low=" 43640ecdf00bSAnand Kumar Santhanam "0x%08x has crossed 4G boundary\n", 43650ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.len, 43660ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 43670ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 43680ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 43690ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 43700ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 43710ecdf00bSAnand Kumar Santhanam buf_prd[0]); 43720ecdf00bSAnand Kumar Santhanam sata_cmd.addr_low = 43730ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 43740ecdf00bSAnand Kumar Santhanam sata_cmd.addr_high = 43750ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 43760ecdf00bSAnand Kumar Santhanam sata_cmd.esgl = cpu_to_le32(1 << 31); 43770ecdf00bSAnand Kumar Santhanam } 4378f5860992SSakthivel K } else if (task->num_scatter == 0) { 4379f5860992SSakthivel K sata_cmd.addr_low = 0; 4380f5860992SSakthivel K sata_cmd.addr_high = 0; 4381f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4382f5860992SSakthivel K sata_cmd.esgl = 0; 4383f5860992SSakthivel K } 4384f5860992SSakthivel K /* scsi cdb */ 4385f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[0] = 4386f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[0]) | 4387f5860992SSakthivel K (task->ata_task.atapi_packet[1] << 8) | 4388f5860992SSakthivel K (task->ata_task.atapi_packet[2] << 16) | 4389f5860992SSakthivel K (task->ata_task.atapi_packet[3] << 24))); 4390f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[1] = 4391f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[4]) | 4392f5860992SSakthivel K (task->ata_task.atapi_packet[5] << 8) | 4393f5860992SSakthivel K (task->ata_task.atapi_packet[6] << 16) | 4394f5860992SSakthivel K (task->ata_task.atapi_packet[7] << 24))); 4395f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[2] = 4396f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[8]) | 4397f5860992SSakthivel K (task->ata_task.atapi_packet[9] << 8) | 4398f5860992SSakthivel K (task->ata_task.atapi_packet[10] << 16) | 4399f5860992SSakthivel K (task->ata_task.atapi_packet[11] << 24))); 4400f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[3] = 4401f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[12]) | 4402f5860992SSakthivel K (task->ata_task.atapi_packet[13] << 8) | 4403f5860992SSakthivel K (task->ata_task.atapi_packet[14] << 16) | 4404f5860992SSakthivel K (task->ata_task.atapi_packet[15] << 24))); 4405f5860992SSakthivel K } 4406c6b9ef57SSakthivel K 4407c6b9ef57SSakthivel K /* Check for read log for failed drive and return */ 4408c6b9ef57SSakthivel K if (sata_cmd.sata_fis.command == 0x2f) { 4409c6b9ef57SSakthivel K if (pm8001_ha_dev && ((pm8001_ha_dev->id & NCQ_READ_LOG_FLAG) || 4410c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_ABORT_ALL_FLAG) || 4411c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_2ND_RLE_FLAG))) { 4412c6b9ef57SSakthivel K struct task_status_struct *ts; 4413c6b9ef57SSakthivel K 4414c6b9ef57SSakthivel K pm8001_ha_dev->id &= 0xDFFFFFFF; 4415c6b9ef57SSakthivel K ts = &task->task_status; 4416c6b9ef57SSakthivel K 4417c6b9ef57SSakthivel K spin_lock_irqsave(&task->task_state_lock, flags); 4418c6b9ef57SSakthivel K ts->resp = SAS_TASK_COMPLETE; 4419c6b9ef57SSakthivel K ts->stat = SAM_STAT_GOOD; 4420c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_STATE_PENDING; 4421c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 4422c6b9ef57SSakthivel K task->task_state_flags |= SAS_TASK_STATE_DONE; 4423c6b9ef57SSakthivel K if (unlikely((task->task_state_flags & 4424c6b9ef57SSakthivel K SAS_TASK_STATE_ABORTED))) { 4425c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4426c6b9ef57SSakthivel K flags); 4427c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 4428c6b9ef57SSakthivel K pm8001_printk("task 0x%p resp 0x%x " 4429c6b9ef57SSakthivel K " stat 0x%x but aborted by upper layer " 4430c6b9ef57SSakthivel K "\n", task, ts->resp, ts->stat)); 4431c6b9ef57SSakthivel K pm8001_ccb_task_free(pm8001_ha, task, ccb, tag); 4432c6b9ef57SSakthivel K return 0; 44332b01d816SSuresh Thiagarajan } else { 4434c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4435c6b9ef57SSakthivel K flags); 44362b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, task, 44372b01d816SSuresh Thiagarajan ccb, tag); 4438c6b9ef57SSakthivel K return 0; 4439c6b9ef57SSakthivel K } 4440c6b9ef57SSakthivel K } 4441c6b9ef57SSakthivel K } 4442f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM; 4443f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 4444f9cd6cbdSAnand Kumar Santhanam &sata_cmd, q_index); 4445f5860992SSakthivel K return ret; 4446f5860992SSakthivel K } 4447f5860992SSakthivel K 4448f5860992SSakthivel K /** 4449f5860992SSakthivel K * pm80xx_chip_phy_start_req - start phy via PHY_START COMMAND 4450f5860992SSakthivel K * @pm8001_ha: our hba card information. 4451f5860992SSakthivel K * @num: the inbound queue number 4452f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4453f5860992SSakthivel K */ 4454f5860992SSakthivel K static int 4455f5860992SSakthivel K pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) 4456f5860992SSakthivel K { 4457f5860992SSakthivel K struct phy_start_req payload; 4458f5860992SSakthivel K struct inbound_queue_table *circularQ; 4459f5860992SSakthivel K int ret; 4460f5860992SSakthivel K u32 tag = 0x01; 4461f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTART; 4462f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4463f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4464f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4465f5860992SSakthivel K 4466f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 4467f5860992SSakthivel K pm8001_printk("PHY START REQ for phy_id %d\n", phy_id)); 4468f5860992SSakthivel K /* 4469f5860992SSakthivel K ** [0:7] PHY Identifier 4470f5860992SSakthivel K ** [8:11] link rate 1.5G, 3G, 6G 4471f5860992SSakthivel K ** [12:13] link mode 01b SAS mode; 10b SATA mode; 11b Auto mode 4472f5860992SSakthivel K ** [14] 0b disable spin up hold; 1b enable spin up hold 4473f5860992SSakthivel K ** [15] ob no change in current PHY analig setup 1b enable using SPAST 4474f5860992SSakthivel K */ 4475a9a923e5SAnand Kumar Santhanam if (!IS_SPCV_12G(pm8001_ha->pdev)) 4476f5860992SSakthivel K payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE | 4477f5860992SSakthivel K LINKMODE_AUTO | LINKRATE_15 | 4478f5860992SSakthivel K LINKRATE_30 | LINKRATE_60 | phy_id); 4479a9a923e5SAnand Kumar Santhanam else 4480a9a923e5SAnand Kumar Santhanam payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE | 4481a9a923e5SAnand Kumar Santhanam LINKMODE_AUTO | LINKRATE_15 | 4482a9a923e5SAnand Kumar Santhanam LINKRATE_30 | LINKRATE_60 | LINKRATE_120 | 4483a9a923e5SAnand Kumar Santhanam phy_id); 4484a9a923e5SAnand Kumar Santhanam 4485f5860992SSakthivel K /* SSC Disable and SAS Analog ST configuration */ 4486f5860992SSakthivel K /** 4487f5860992SSakthivel K payload.ase_sh_lm_slr_phyid = 4488f5860992SSakthivel K cpu_to_le32(SSC_DISABLE_30 | SAS_ASE | SPINHOLD_DISABLE | 4489f5860992SSakthivel K LINKMODE_AUTO | LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | 4490f5860992SSakthivel K phy_id); 4491f5860992SSakthivel K Have to add "SAS PHY Analog Setup SPASTI 1 Byte" Based on need 4492f5860992SSakthivel K **/ 4493f5860992SSakthivel K 4494aa9f8328SJames Bottomley payload.sas_identify.dev_type = SAS_END_DEVICE; 4495f5860992SSakthivel K payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL; 4496f5860992SSakthivel K memcpy(payload.sas_identify.sas_addr, 44976c85e4bcSViswas G &pm8001_ha->phy[phy_id].dev_sas_addr, SAS_ADDR_SIZE); 4498f5860992SSakthivel K payload.sas_identify.phy_id = phy_id; 4499f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 0); 4500f5860992SSakthivel K return ret; 4501f5860992SSakthivel K } 4502f5860992SSakthivel K 4503f5860992SSakthivel K /** 4504f5860992SSakthivel K * pm8001_chip_phy_stop_req - start phy via PHY_STOP COMMAND 4505f5860992SSakthivel K * @pm8001_ha: our hba card information. 4506f5860992SSakthivel K * @num: the inbound queue number 4507f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4508f5860992SSakthivel K */ 4509f5860992SSakthivel K static int pm80xx_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha, 4510f5860992SSakthivel K u8 phy_id) 4511f5860992SSakthivel K { 4512f5860992SSakthivel K struct phy_stop_req payload; 4513f5860992SSakthivel K struct inbound_queue_table *circularQ; 4514f5860992SSakthivel K int ret; 4515f5860992SSakthivel K u32 tag = 0x01; 4516f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTOP; 4517f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4518f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4519f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4520f5860992SSakthivel K payload.phy_id = cpu_to_le32(phy_id); 4521f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 0); 4522f5860992SSakthivel K return ret; 4523f5860992SSakthivel K } 4524f5860992SSakthivel K 4525f5860992SSakthivel K /** 4526f5860992SSakthivel K * see comments on pm8001_mpi_reg_resp. 4527f5860992SSakthivel K */ 4528f5860992SSakthivel K static int pm80xx_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha, 4529f5860992SSakthivel K struct pm8001_device *pm8001_dev, u32 flag) 4530f5860992SSakthivel K { 4531f5860992SSakthivel K struct reg_dev_req payload; 4532f5860992SSakthivel K u32 opc; 4533f5860992SSakthivel K u32 stp_sspsmp_sata = 0x4; 4534f5860992SSakthivel K struct inbound_queue_table *circularQ; 4535f5860992SSakthivel K u32 linkrate, phy_id; 4536f5860992SSakthivel K int rc, tag = 0xdeadbeef; 4537f5860992SSakthivel K struct pm8001_ccb_info *ccb; 4538f5860992SSakthivel K u8 retryFlag = 0x1; 4539f5860992SSakthivel K u16 firstBurstSize = 0; 4540f5860992SSakthivel K u16 ITNT = 2000; 4541f5860992SSakthivel K struct domain_device *dev = pm8001_dev->sas_device; 4542f5860992SSakthivel K struct domain_device *parent_dev = dev->parent; 4543f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4544f5860992SSakthivel K 4545f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4546f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 4547f5860992SSakthivel K if (rc) 4548f5860992SSakthivel K return rc; 4549f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 4550f5860992SSakthivel K ccb->device = pm8001_dev; 4551f5860992SSakthivel K ccb->ccb_tag = tag; 4552f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4553f5860992SSakthivel K 4554f5860992SSakthivel K if (flag == 1) { 4555f5860992SSakthivel K stp_sspsmp_sata = 0x02; /*direct attached sata */ 4556f5860992SSakthivel K } else { 4557aa9f8328SJames Bottomley if (pm8001_dev->dev_type == SAS_SATA_DEV) 4558f5860992SSakthivel K stp_sspsmp_sata = 0x00; /* stp*/ 4559aa9f8328SJames Bottomley else if (pm8001_dev->dev_type == SAS_END_DEVICE || 4560aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_EDGE_EXPANDER_DEVICE || 4561aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_FANOUT_EXPANDER_DEVICE) 4562f5860992SSakthivel K stp_sspsmp_sata = 0x01; /*ssp or smp*/ 4563f5860992SSakthivel K } 4564f5860992SSakthivel K if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) 4565f5860992SSakthivel K phy_id = parent_dev->ex_dev.ex_phy->phy_id; 4566f5860992SSakthivel K else 4567f5860992SSakthivel K phy_id = pm8001_dev->attached_phy; 4568f5860992SSakthivel K 4569f5860992SSakthivel K opc = OPC_INB_REG_DEV; 4570f5860992SSakthivel K 4571f5860992SSakthivel K linkrate = (pm8001_dev->sas_device->linkrate < dev->port->linkrate) ? 4572f5860992SSakthivel K pm8001_dev->sas_device->linkrate : dev->port->linkrate; 4573f5860992SSakthivel K 4574f5860992SSakthivel K payload.phyid_portid = 4575f5860992SSakthivel K cpu_to_le32(((pm8001_dev->sas_device->port->id) & 0xFF) | 4576f5860992SSakthivel K ((phy_id & 0xFF) << 8)); 4577f5860992SSakthivel K 4578f5860992SSakthivel K payload.dtype_dlr_mcn_ir_retry = cpu_to_le32((retryFlag & 0x01) | 4579f5860992SSakthivel K ((linkrate & 0x0F) << 24) | 4580f5860992SSakthivel K ((stp_sspsmp_sata & 0x03) << 28)); 4581f5860992SSakthivel K payload.firstburstsize_ITNexustimeout = 4582f5860992SSakthivel K cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); 4583f5860992SSakthivel K 4584f5860992SSakthivel K memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr, 4585f5860992SSakthivel K SAS_ADDR_SIZE); 4586f5860992SSakthivel K 4587f5860992SSakthivel K rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 45885533abcaSTomas Henzl if (rc) 45895533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 4590f5860992SSakthivel K 4591f5860992SSakthivel K return rc; 4592f5860992SSakthivel K } 4593f5860992SSakthivel K 4594f5860992SSakthivel K /** 4595f5860992SSakthivel K * pm80xx_chip_phy_ctl_req - support the local phy operation 4596f5860992SSakthivel K * @pm8001_ha: our hba card information. 4597f5860992SSakthivel K * @num: the inbound queue number 4598f5860992SSakthivel K * @phy_id: the phy id which we wanted to operate 4599f5860992SSakthivel K * @phy_op: 4600f5860992SSakthivel K */ 4601f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 4602f5860992SSakthivel K u32 phyId, u32 phy_op) 4603f5860992SSakthivel K { 460425c6edbdSViswas G u32 tag; 460525c6edbdSViswas G int rc; 4606f5860992SSakthivel K struct local_phy_ctl_req payload; 4607f5860992SSakthivel K struct inbound_queue_table *circularQ; 4608f5860992SSakthivel K u32 opc = OPC_INB_LOCAL_PHY_CONTROL; 4609f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 461025c6edbdSViswas G rc = pm8001_tag_alloc(pm8001_ha, &tag); 461125c6edbdSViswas G if (rc) 461225c6edbdSViswas G return rc; 4613f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 461425c6edbdSViswas G payload.tag = cpu_to_le32(tag); 4615f5860992SSakthivel K payload.phyop_phyid = 4616f5860992SSakthivel K cpu_to_le32(((phy_op & 0xFF) << 8) | (phyId & 0xFF)); 461725c6edbdSViswas G return pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 4618f5860992SSakthivel K } 4619f5860992SSakthivel K 4620f310a4eaSColin Ian King static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) 4621f5860992SSakthivel K { 4622f5860992SSakthivel K #ifdef PM8001_USE_MSIX 4623f5860992SSakthivel K return 1; 4624292c04ccSColin Ian King #else 4625292c04ccSColin Ian King u32 value; 4626292c04ccSColin Ian King 4627f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); 4628f5860992SSakthivel K if (value) 4629f5860992SSakthivel K return 1; 4630f5860992SSakthivel K return 0; 4631292c04ccSColin Ian King #endif 4632f5860992SSakthivel K } 4633f5860992SSakthivel K 4634f5860992SSakthivel K /** 4635f5860992SSakthivel K * pm8001_chip_isr - PM8001 isr handler. 4636f5860992SSakthivel K * @pm8001_ha: our hba card information. 4637f5860992SSakthivel K * @irq: irq number. 4638f5860992SSakthivel K * @stat: stat. 4639f5860992SSakthivel K */ 4640f5860992SSakthivel K static irqreturn_t 4641f5860992SSakthivel K pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec) 4642f5860992SSakthivel K { 4643f5860992SSakthivel K pm80xx_chip_interrupt_disable(pm8001_ha, vec); 4644f5860992SSakthivel K process_oq(pm8001_ha, vec); 4645f5860992SSakthivel K pm80xx_chip_interrupt_enable(pm8001_ha, vec); 4646f5860992SSakthivel K return IRQ_HANDLED; 4647f5860992SSakthivel K } 4648f5860992SSakthivel K 464927909407SAnand Kumar Santhanam void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha, 465027909407SAnand Kumar Santhanam u32 operation, u32 phyid, u32 length, u32 *buf) 465127909407SAnand Kumar Santhanam { 465227909407SAnand Kumar Santhanam u32 tag , i, j = 0; 465327909407SAnand Kumar Santhanam int rc; 465427909407SAnand Kumar Santhanam struct set_phy_profile_req payload; 465527909407SAnand Kumar Santhanam struct inbound_queue_table *circularQ; 465627909407SAnand Kumar Santhanam u32 opc = OPC_INB_SET_PHY_PROFILE; 465727909407SAnand Kumar Santhanam 465827909407SAnand Kumar Santhanam memset(&payload, 0, sizeof(payload)); 465927909407SAnand Kumar Santhanam rc = pm8001_tag_alloc(pm8001_ha, &tag); 466027909407SAnand Kumar Santhanam if (rc) 466127909407SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("Invalid tag\n")); 466227909407SAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[0]; 466327909407SAnand Kumar Santhanam payload.tag = cpu_to_le32(tag); 466427909407SAnand Kumar Santhanam payload.ppc_phyid = (((operation & 0xF) << 8) | (phyid & 0xFF)); 466527909407SAnand Kumar Santhanam PM8001_INIT_DBG(pm8001_ha, 466627909407SAnand Kumar Santhanam pm8001_printk(" phy profile command for phy %x ,length is %d\n", 466727909407SAnand Kumar Santhanam payload.ppc_phyid, length)); 466827909407SAnand Kumar Santhanam for (i = length; i < (length + PHY_DWORD_LENGTH - 1); i++) { 466927909407SAnand Kumar Santhanam payload.reserved[j] = cpu_to_le32(*((u32 *)buf + i)); 467027909407SAnand Kumar Santhanam j++; 467127909407SAnand Kumar Santhanam } 46725533abcaSTomas Henzl rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 46735533abcaSTomas Henzl if (rc) 46745533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 467527909407SAnand Kumar Santhanam } 467627909407SAnand Kumar Santhanam 467727909407SAnand Kumar Santhanam void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha, 467827909407SAnand Kumar Santhanam u32 length, u8 *buf) 467927909407SAnand Kumar Santhanam { 4680fdd0a66bSYueHaibing u32 i; 468127909407SAnand Kumar Santhanam 468227909407SAnand Kumar Santhanam for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 468327909407SAnand Kumar Santhanam mpi_set_phy_profile_req(pm8001_ha, 468427909407SAnand Kumar Santhanam SAS_PHY_ANALOG_SETTINGS_PAGE, i, length, (u32 *)buf); 468527909407SAnand Kumar Santhanam length = length + PHY_DWORD_LENGTH; 468627909407SAnand Kumar Santhanam } 468727909407SAnand Kumar Santhanam PM8001_INIT_DBG(pm8001_ha, pm8001_printk("phy settings completed\n")); 468827909407SAnand Kumar Santhanam } 4689c5614df7SBenjamin Rood 4690c5614df7SBenjamin Rood void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha, 4691c5614df7SBenjamin Rood u32 phy, u32 length, u32 *buf) 4692c5614df7SBenjamin Rood { 4693c5614df7SBenjamin Rood u32 tag, opc; 4694c5614df7SBenjamin Rood int rc, i; 4695c5614df7SBenjamin Rood struct set_phy_profile_req payload; 4696c5614df7SBenjamin Rood struct inbound_queue_table *circularQ; 4697c5614df7SBenjamin Rood 4698c5614df7SBenjamin Rood memset(&payload, 0, sizeof(payload)); 4699c5614df7SBenjamin Rood 4700c5614df7SBenjamin Rood rc = pm8001_tag_alloc(pm8001_ha, &tag); 4701c5614df7SBenjamin Rood if (rc) 4702c5614df7SBenjamin Rood PM8001_INIT_DBG(pm8001_ha, pm8001_printk("Invalid tag")); 4703c5614df7SBenjamin Rood 4704c5614df7SBenjamin Rood circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4705c5614df7SBenjamin Rood opc = OPC_INB_SET_PHY_PROFILE; 4706c5614df7SBenjamin Rood 4707c5614df7SBenjamin Rood payload.tag = cpu_to_le32(tag); 4708c5614df7SBenjamin Rood payload.ppc_phyid = (((SAS_PHY_ANALOG_SETTINGS_PAGE & 0xF) << 8) 4709c5614df7SBenjamin Rood | (phy & 0xFF)); 4710c5614df7SBenjamin Rood 4711c5614df7SBenjamin Rood for (i = 0; i < length; i++) 4712c5614df7SBenjamin Rood payload.reserved[i] = cpu_to_le32(*(buf + i)); 4713c5614df7SBenjamin Rood 4714c5614df7SBenjamin Rood rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 4715c5614df7SBenjamin Rood if (rc) 4716c5614df7SBenjamin Rood pm8001_tag_free(pm8001_ha, tag); 4717c5614df7SBenjamin Rood 4718c5614df7SBenjamin Rood PM8001_INIT_DBG(pm8001_ha, 4719c5614df7SBenjamin Rood pm8001_printk("PHY %d settings applied", phy)); 4720c5614df7SBenjamin Rood } 4721f5860992SSakthivel K const struct pm8001_dispatch pm8001_80xx_dispatch = { 4722f5860992SSakthivel K .name = "pmc80xx", 4723f5860992SSakthivel K .chip_init = pm80xx_chip_init, 4724f5860992SSakthivel K .chip_soft_rst = pm80xx_chip_soft_rst, 4725f5860992SSakthivel K .chip_rst = pm80xx_hw_chip_rst, 4726f5860992SSakthivel K .chip_iounmap = pm8001_chip_iounmap, 4727f5860992SSakthivel K .isr = pm80xx_chip_isr, 4728f310a4eaSColin Ian King .is_our_interrupt = pm80xx_chip_is_our_interrupt, 4729f5860992SSakthivel K .isr_process_oq = process_oq, 4730f5860992SSakthivel K .interrupt_enable = pm80xx_chip_interrupt_enable, 4731f5860992SSakthivel K .interrupt_disable = pm80xx_chip_interrupt_disable, 4732f5860992SSakthivel K .make_prd = pm8001_chip_make_sg, 4733f5860992SSakthivel K .smp_req = pm80xx_chip_smp_req, 4734f5860992SSakthivel K .ssp_io_req = pm80xx_chip_ssp_io_req, 4735f5860992SSakthivel K .sata_req = pm80xx_chip_sata_req, 4736f5860992SSakthivel K .phy_start_req = pm80xx_chip_phy_start_req, 4737f5860992SSakthivel K .phy_stop_req = pm80xx_chip_phy_stop_req, 4738f5860992SSakthivel K .reg_dev_req = pm80xx_chip_reg_dev_req, 4739f5860992SSakthivel K .dereg_dev_req = pm8001_chip_dereg_dev_req, 4740f5860992SSakthivel K .phy_ctl_req = pm80xx_chip_phy_ctl_req, 4741f5860992SSakthivel K .task_abort = pm8001_chip_abort_task, 4742f5860992SSakthivel K .ssp_tm_req = pm8001_chip_ssp_tm_req, 4743f5860992SSakthivel K .get_nvmd_req = pm8001_chip_get_nvmd_req, 4744f5860992SSakthivel K .set_nvmd_req = pm8001_chip_set_nvmd_req, 4745f5860992SSakthivel K .fw_flash_update_req = pm8001_chip_fw_flash_update_req, 4746f5860992SSakthivel K .set_dev_state_req = pm8001_chip_set_dev_state_req, 4747f5860992SSakthivel K }; 4748