1f5860992SSakthivel K /* 2f5860992SSakthivel K * PMC-Sierra SPCv/ve 8088/8089 SAS/SATA based host adapters driver 3f5860992SSakthivel K * 4f5860992SSakthivel K * Copyright (c) 2008-2009 PMC-Sierra, Inc., 5f5860992SSakthivel K * All rights reserved. 6f5860992SSakthivel K * 7f5860992SSakthivel K * Redistribution and use in source and binary forms, with or without 8f5860992SSakthivel K * modification, are permitted provided that the following conditions 9f5860992SSakthivel K * are met: 10f5860992SSakthivel K * 1. Redistributions of source code must retain the above copyright 11f5860992SSakthivel K * notice, this list of conditions, and the following disclaimer, 12f5860992SSakthivel K * without modification. 13f5860992SSakthivel K * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14f5860992SSakthivel K * substantially similar to the "NO WARRANTY" disclaimer below 15f5860992SSakthivel K * ("Disclaimer") and any redistribution must be conditioned upon 16f5860992SSakthivel K * including a substantially similar Disclaimer requirement for further 17f5860992SSakthivel K * binary redistribution. 18f5860992SSakthivel K * 3. Neither the names of the above-listed copyright holders nor the names 19f5860992SSakthivel K * of any contributors may be used to endorse or promote products derived 20f5860992SSakthivel K * from this software without specific prior written permission. 21f5860992SSakthivel K * 22f5860992SSakthivel K * Alternatively, this software may be distributed under the terms of the 23f5860992SSakthivel K * GNU General Public License ("GPL") version 2 as published by the Free 24f5860992SSakthivel K * Software Foundation. 25f5860992SSakthivel K * 26f5860992SSakthivel K * NO WARRANTY 27f5860992SSakthivel K * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28f5860992SSakthivel K * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29f5860992SSakthivel K * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30f5860992SSakthivel K * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31f5860992SSakthivel K * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32f5860992SSakthivel K * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33f5860992SSakthivel K * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34f5860992SSakthivel K * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35f5860992SSakthivel K * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36f5860992SSakthivel K * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37f5860992SSakthivel K * POSSIBILITY OF SUCH DAMAGES. 38f5860992SSakthivel K * 39f5860992SSakthivel K */ 40f5860992SSakthivel K #include <linux/slab.h> 41f5860992SSakthivel K #include "pm8001_sas.h" 42f5860992SSakthivel K #include "pm80xx_hwi.h" 43f5860992SSakthivel K #include "pm8001_chips.h" 44f5860992SSakthivel K #include "pm8001_ctl.h" 458ceddda3SChangyuan Lyu #include "pm80xx_tracepoints.h" 46f5860992SSakthivel K 47f5860992SSakthivel K #define SMP_DIRECT 1 48f5860992SSakthivel K #define SMP_INDIRECT 2 49d078b511SAnand Kumar Santhanam 50d078b511SAnand Kumar Santhanam 51d078b511SAnand Kumar Santhanam int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shift_value) 52d078b511SAnand Kumar Santhanam { 53d078b511SAnand Kumar Santhanam u32 reg_val; 54d078b511SAnand Kumar Santhanam unsigned long start; 55d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, shift_value); 56d078b511SAnand Kumar Santhanam /* confirm the setting is written */ 57d078b511SAnand Kumar Santhanam start = jiffies + HZ; /* 1 sec */ 58d078b511SAnand Kumar Santhanam do { 59d078b511SAnand Kumar Santhanam reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER); 60d078b511SAnand Kumar Santhanam } while ((reg_val != shift_value) && time_before(jiffies, start)); 61d078b511SAnand Kumar Santhanam if (reg_val != shift_value) { 621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MEMBASE_II_SHIFT_REGISTER = 0x%x\n", 631b5d2793SJoe Perches reg_val); 64d078b511SAnand Kumar Santhanam return -1; 65d078b511SAnand Kumar Santhanam } 66d078b511SAnand Kumar Santhanam return 0; 67d078b511SAnand Kumar Santhanam } 68d078b511SAnand Kumar Santhanam 69ea310f57SLee Jones static void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset, 70d078b511SAnand Kumar Santhanam const void *destination, 71d078b511SAnand Kumar Santhanam u32 dw_count, u32 bus_base_number) 72d078b511SAnand Kumar Santhanam { 73d078b511SAnand Kumar Santhanam u32 index, value, offset; 74d078b511SAnand Kumar Santhanam u32 *destination1; 75d078b511SAnand Kumar Santhanam destination1 = (u32 *)destination; 76d078b511SAnand Kumar Santhanam 77d078b511SAnand Kumar Santhanam for (index = 0; index < dw_count; index += 4, destination1++) { 78044f59deSDeepak Ukey offset = (soffset + index); 79d078b511SAnand Kumar Santhanam if (offset < (64 * 1024)) { 80d078b511SAnand Kumar Santhanam value = pm8001_cr32(pm8001_ha, bus_base_number, offset); 81d078b511SAnand Kumar Santhanam *destination1 = cpu_to_le32(value); 82d078b511SAnand Kumar Santhanam } 83d078b511SAnand Kumar Santhanam } 84d078b511SAnand Kumar Santhanam return; 85d078b511SAnand Kumar Santhanam } 86d078b511SAnand Kumar Santhanam 87d078b511SAnand Kumar Santhanam ssize_t pm80xx_get_fatal_dump(struct device *cdev, 88d078b511SAnand Kumar Santhanam struct device_attribute *attr, char *buf) 89d078b511SAnand Kumar Santhanam { 90d078b511SAnand Kumar Santhanam struct Scsi_Host *shost = class_to_shost(cdev); 91d078b511SAnand Kumar Santhanam struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 92d078b511SAnand Kumar Santhanam struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 93d078b511SAnand Kumar Santhanam void __iomem *fatal_table_address = pm8001_ha->fatal_tbl_addr; 94d078b511SAnand Kumar Santhanam u32 accum_len, reg_val, index, *temp; 95044f59deSDeepak Ukey u32 status = 1; 96d078b511SAnand Kumar Santhanam unsigned long start; 97d078b511SAnand Kumar Santhanam u8 *direct_data; 98d078b511SAnand Kumar Santhanam char *fatal_error_data = buf; 99044f59deSDeepak Ukey u32 length_to_read; 100044f59deSDeepak Ukey u32 offset; 101d078b511SAnand Kumar Santhanam 102d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = buf; 103d078b511SAnand Kumar Santhanam if (pm8001_ha->chip_id == chip_8001) { 104d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 105d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 106d078b511SAnand Kumar Santhanam "Not supported for SPC controller"); 107d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 108d078b511SAnand Kumar Santhanam (char *)buf; 109d078b511SAnand Kumar Santhanam } 110044f59deSDeepak Ukey /* initialize variables for very first call from host application */ 111d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 1121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 1131b5d2793SJoe Perches "forensic_info TYPE_NON_FATAL..............\n"); 114d078b511SAnand Kumar Santhanam direct_data = (u8 *)fatal_error_data; 115d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL; 116d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET; 117044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_offset = 0; 118d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 119044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 0; 120044f59deSDeepak Ukey 121044f59deSDeepak Ukey /* Write signature to fatal dump table */ 122044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 123044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_SIGNATURE, 0x1234abcd); 124d078b511SAnand Kumar Santhanam 125d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = direct_data; 1261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: status1 %d\n", status); 1271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: read_len 0x%x\n", 1281b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.read_len); 1291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_len 0x%x\n", 1301b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_len); 1311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_offset 0x%x\n", 1321b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_offset); 133044f59deSDeepak Ukey } 134044f59deSDeepak Ukey if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 135d078b511SAnand Kumar Santhanam /* start to get data */ 136d078b511SAnand Kumar Santhanam /* Program the MEMBASE II Shifting Register with 0x00.*/ 137d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 138d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 139d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 140d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 141d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 142d078b511SAnand Kumar Santhanam } 143cf370066SViswas G 144bb6beabfSRandy Dunlap /* Read until accum_len is retrieved */ 145d078b511SAnand Kumar Santhanam accum_len = pm8001_mr32(fatal_table_address, 146d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 147044f59deSDeepak Ukey /* Determine length of data between previously stored transfer length 148044f59deSDeepak Ukey * and current accumulated transfer length 149044f59deSDeepak Ukey */ 150044f59deSDeepak Ukey length_to_read = 151044f59deSDeepak Ukey accum_len - pm8001_ha->forensic_preserved_accumulated_transfer; 1521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: accum_len 0x%x\n", 1531b5d2793SJoe Perches accum_len); 1541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: length_to_read 0x%x\n", 1551b5d2793SJoe Perches length_to_read); 1561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: last_offset 0x%x\n", 1571b5d2793SJoe Perches pm8001_ha->forensic_last_offset); 1581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: read_len 0x%x\n", 1591b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.read_len); 1601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_len 0x%x\n", 1611b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_len); 1621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_offset 0x%x\n", 1631b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_offset); 164044f59deSDeepak Ukey 165044f59deSDeepak Ukey /* If accumulated length failed to read correctly fail the attempt.*/ 166d078b511SAnand Kumar Santhanam if (accum_len == 0xFFFFFFFF) { 1671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 1681b5d2793SJoe Perches "Possible PCI issue 0x%x not expected\n", 1691b5d2793SJoe Perches accum_len); 170044f59deSDeepak Ukey return status; 171d078b511SAnand Kumar Santhanam } 172044f59deSDeepak Ukey /* If accumulated length is zero fail the attempt */ 173044f59deSDeepak Ukey if (accum_len == 0) { 174d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 175d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 176d078b511SAnand Kumar Santhanam "%08x ", 0xFFFFFFFF); 177d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 178d078b511SAnand Kumar Santhanam (char *)buf; 179d078b511SAnand Kumar Santhanam } 180044f59deSDeepak Ukey /* Accumulated length is good so start capturing the first data */ 181d078b511SAnand Kumar Santhanam temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 182d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 0) { 183d078b511SAnand Kumar Santhanam moreData: 184044f59deSDeepak Ukey /* If data to read is less than SYSFS_OFFSET then reduce the 185044f59deSDeepak Ukey * length of dataLen 186044f59deSDeepak Ukey */ 187044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset + SYSFS_OFFSET 188044f59deSDeepak Ukey > length_to_read) { 189044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 190044f59deSDeepak Ukey length_to_read - 191044f59deSDeepak Ukey pm8001_ha->forensic_last_offset; 192044f59deSDeepak Ukey } else { 193044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 194044f59deSDeepak Ukey SYSFS_OFFSET; 195044f59deSDeepak Ukey } 196d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_data) { 197d078b511SAnand Kumar Santhanam /* Data is in bar, copy to host memory */ 198044f59deSDeepak Ukey pm80xx_pci_mem_copy(pm8001_ha, 199044f59deSDeepak Ukey pm8001_ha->fatal_bar_loc, 200d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr, 201044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len, 1); 202d078b511SAnand Kumar Santhanam } 203d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc += 204d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 205d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_offset += 206d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 207d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset += 208d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 209d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 210d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 211d078b511SAnand Kumar Santhanam 212044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset >= length_to_read) { 213d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 214d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 215d078b511SAnand Kumar Santhanam "%08x ", 3); 216044f59deSDeepak Ukey for (index = 0; index < 217044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 218044f59deSDeepak Ukey / 4); index++) { 219d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 220044f59deSDeepak Ukey sprintf( 221044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 222d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 223d078b511SAnand Kumar Santhanam } 224d078b511SAnand Kumar Santhanam 225d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 226d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 1; 227d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset = 0; 228d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 229044f59deSDeepak Ukey status = 0; 230044f59deSDeepak Ukey offset = (int) 231044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 232044f59deSDeepak Ukey - (char *)buf); 2331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 2341b5d2793SJoe Perches "get_fatal_spcv:return1 0x%x\n", offset); 235d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 236d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 237d078b511SAnand Kumar Santhanam (char *)buf; 238d078b511SAnand Kumar Santhanam } 239d078b511SAnand Kumar Santhanam if (pm8001_ha->fatal_bar_loc < (64 * 1024)) { 240d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 241d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 242d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 243d078b511SAnand Kumar Santhanam "%08x ", 2); 244044f59deSDeepak Ukey for (index = 0; index < 245044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 246044f59deSDeepak Ukey / 4); index++) { 247044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 248044f59deSDeepak Ukey += sprintf(pm8001_ha-> 249d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 250d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 251d078b511SAnand Kumar Santhanam } 252044f59deSDeepak Ukey status = 0; 253044f59deSDeepak Ukey offset = (int) 254044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 255044f59deSDeepak Ukey - (char *)buf); 2561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 2571b5d2793SJoe Perches "get_fatal_spcv:return2 0x%x\n", offset); 258d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 259d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 260d078b511SAnand Kumar Santhanam (char *)buf; 261d078b511SAnand Kumar Santhanam } 262d078b511SAnand Kumar Santhanam 263d078b511SAnand Kumar Santhanam /* Increment the MEMBASE II Shifting Register value by 0x100.*/ 264d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 265d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 266d078b511SAnand Kumar Santhanam "%08x ", 2); 267044f59deSDeepak Ukey for (index = 0; index < 268044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 269044f59deSDeepak Ukey / 4) ; index++) { 270d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 271d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 272d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 273d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 274d078b511SAnand Kumar Santhanam } 275d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset += 0x100; 276d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 277d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 278d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 279044f59deSDeepak Ukey status = 0; 280044f59deSDeepak Ukey offset = (int) 281044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 282044f59deSDeepak Ukey - (char *)buf); 2831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return3 0x%x\n", 2841b5d2793SJoe Perches offset); 285d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 286d078b511SAnand Kumar Santhanam (char *)buf; 287d078b511SAnand Kumar Santhanam } 288d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 1) { 289044f59deSDeepak Ukey /* store previous accumulated length before triggering next 290044f59deSDeepak Ukey * accumulated length update 291044f59deSDeepak Ukey */ 292044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 293044f59deSDeepak Ukey pm8001_mr32(fatal_table_address, 294044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 295044f59deSDeepak Ukey 296044f59deSDeepak Ukey /* continue capturing the fatal log until Dump status is 0x3 */ 297044f59deSDeepak Ukey if (pm8001_mr32(fatal_table_address, 298044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS) < 299044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) { 300044f59deSDeepak Ukey 301044f59deSDeepak Ukey /* reset fddstat bit by writing to zero*/ 302044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 303044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS, 0x0); 304044f59deSDeepak Ukey 305044f59deSDeepak Ukey /* set dump control value to '1' so that new data will 306044f59deSDeepak Ukey * be transferred to shared memory 307044f59deSDeepak Ukey */ 308d078b511SAnand Kumar Santhanam pm8001_mw32(fatal_table_address, 309d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 310d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_HANDSHAKE_RDY); 311d078b511SAnand Kumar Santhanam 312d078b511SAnand Kumar Santhanam /*Poll FDDHSHK until clear */ 313d078b511SAnand Kumar Santhanam start = jiffies + (2 * HZ); /* 2 sec */ 314d078b511SAnand Kumar Santhanam 315d078b511SAnand Kumar Santhanam do { 316d078b511SAnand Kumar Santhanam reg_val = pm8001_mr32(fatal_table_address, 317d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE); 318d078b511SAnand Kumar Santhanam } while ((reg_val) && time_before(jiffies, start)); 319d078b511SAnand Kumar Santhanam 320d078b511SAnand Kumar Santhanam if (reg_val != 0) { 3211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 322044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_HDSHAKE 0x%x\n", 3231b5d2793SJoe Perches reg_val); 324044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 325044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 326044f59deSDeepak Ukey sprintf( 327044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 328044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 329044f59deSDeepak Ukey return((char *) 330044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 331044f59deSDeepak Ukey - (char *)buf); 332d078b511SAnand Kumar Santhanam } 333044f59deSDeepak Ukey /* Poll status register until set to 2 or 334044f59deSDeepak Ukey * 3 for up to 2 seconds 335044f59deSDeepak Ukey */ 336044f59deSDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 337d078b511SAnand Kumar Santhanam 338044f59deSDeepak Ukey do { 339044f59deSDeepak Ukey reg_val = pm8001_mr32(fatal_table_address, 340044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS); 3410e7c353eSColin Ian King } while (((reg_val != 2) && (reg_val != 3)) && 342044f59deSDeepak Ukey time_before(jiffies, start)); 343044f59deSDeepak Ukey 344044f59deSDeepak Ukey if (reg_val < 2) { 3451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 346044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_STATUS = 0x%x\n", 3471b5d2793SJoe Perches reg_val); 348044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 349044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 350044f59deSDeepak Ukey sprintf( 351044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 352044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 353ec2e7e1aSViswas G return((char *)pm8001_ha->forensic_info.data_buf.direct_data - 354ec2e7e1aSViswas G (char *)buf); 355ec2e7e1aSViswas G } 356ec2e7e1aSViswas G /* reset fatal_forensic_shift_offset back to zero and reset MEMBASE 2 register to zero */ 357ec2e7e1aSViswas G pm8001_ha->fatal_forensic_shift_offset = 0; /* location in 64k region */ 358044f59deSDeepak Ukey pm8001_cw32(pm8001_ha, 0, 359044f59deSDeepak Ukey MEMBASE_II_SHIFT_REGISTER, 360044f59deSDeepak Ukey pm8001_ha->fatal_forensic_shift_offset); 361044f59deSDeepak Ukey } 362044f59deSDeepak Ukey /* Read the next block of the debug data.*/ 363044f59deSDeepak Ukey length_to_read = pm8001_mr32(fatal_table_address, 364044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN) - 365044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer; 366044f59deSDeepak Ukey if (length_to_read != 0x0) { 367d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 368d078b511SAnand Kumar Santhanam goto moreData; 369d078b511SAnand Kumar Santhanam } else { 370d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 3717b382122SColin Ian King sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 372d078b511SAnand Kumar Santhanam "%08x ", 4); 3737b382122SColin Ian King pm8001_ha->forensic_info.data_buf.read_len = 0xFFFFFFFF; 3747b382122SColin Ian King pm8001_ha->forensic_info.data_buf.direct_len = 0; 3757b382122SColin Ian King pm8001_ha->forensic_info.data_buf.direct_offset = 0; 376d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 377d078b511SAnand Kumar Santhanam } 378d078b511SAnand Kumar Santhanam } 379044f59deSDeepak Ukey offset = (int)((char *)pm8001_ha->forensic_info.data_buf.direct_data 380044f59deSDeepak Ukey - (char *)buf); 3811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return4 0x%x\n", offset); 382ec2e7e1aSViswas G return ((char *)pm8001_ha->forensic_info.data_buf.direct_data - 383ec2e7e1aSViswas G (char *)buf); 384d078b511SAnand Kumar Santhanam } 385d078b511SAnand Kumar Santhanam 386dba2cc03SDeepak Ukey /* pm80xx_get_non_fatal_dump - dump the nonfatal data from the dma 387dba2cc03SDeepak Ukey * location by the firmware. 388dba2cc03SDeepak Ukey */ 389dba2cc03SDeepak Ukey ssize_t pm80xx_get_non_fatal_dump(struct device *cdev, 390dba2cc03SDeepak Ukey struct device_attribute *attr, char *buf) 391dba2cc03SDeepak Ukey { 392dba2cc03SDeepak Ukey struct Scsi_Host *shost = class_to_shost(cdev); 393dba2cc03SDeepak Ukey struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 394dba2cc03SDeepak Ukey struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 395dba2cc03SDeepak Ukey void __iomem *nonfatal_table_address = pm8001_ha->fatal_tbl_addr; 396dba2cc03SDeepak Ukey u32 accum_len = 0; 397dba2cc03SDeepak Ukey u32 total_len = 0; 398dba2cc03SDeepak Ukey u32 reg_val = 0; 399dba2cc03SDeepak Ukey u32 *temp = NULL; 400dba2cc03SDeepak Ukey u32 index = 0; 401dba2cc03SDeepak Ukey u32 output_length; 402dba2cc03SDeepak Ukey unsigned long start = 0; 403dba2cc03SDeepak Ukey char *buf_copy = buf; 404dba2cc03SDeepak Ukey 405dba2cc03SDeepak Ukey temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 406dba2cc03SDeepak Ukey if (++pm8001_ha->non_fatal_count == 1) { 407dba2cc03SDeepak Ukey if (pm8001_ha->chip_id == chip_8001) { 408dba2cc03SDeepak Ukey snprintf(pm8001_ha->forensic_info.data_buf.direct_data, 409dba2cc03SDeepak Ukey PAGE_SIZE, "Not supported for SPC controller"); 410dba2cc03SDeepak Ukey return 0; 411dba2cc03SDeepak Ukey } 4121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "forensic_info TYPE_NON_FATAL...\n"); 413dba2cc03SDeepak Ukey /* 414dba2cc03SDeepak Ukey * Step 1: Write the host buffer parameters in the MPI Fatal and 415dba2cc03SDeepak Ukey * Non-Fatal Error Dump Capture Table.This is the buffer 416dba2cc03SDeepak Ukey * where debug data will be DMAed to. 417dba2cc03SDeepak Ukey */ 418dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 419dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_LO_OFFSET, 420dba2cc03SDeepak Ukey pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_lo); 421dba2cc03SDeepak Ukey 422dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 423dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_HI_OFFSET, 424dba2cc03SDeepak Ukey pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_hi); 425dba2cc03SDeepak Ukey 426dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 427dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_LENGTH, SYSFS_OFFSET); 428dba2cc03SDeepak Ukey 429dba2cc03SDeepak Ukey /* Optionally, set the DUMPCTRL bit to 1 if the host 430dba2cc03SDeepak Ukey * keeps sending active I/Os while capturing the non-fatal 431dba2cc03SDeepak Ukey * debug data. Otherwise, leave this bit set to zero 432dba2cc03SDeepak Ukey */ 433dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 434dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_HANDSHAKE, MPI_FATAL_EDUMP_HANDSHAKE_RDY); 435dba2cc03SDeepak Ukey 436dba2cc03SDeepak Ukey /* 437dba2cc03SDeepak Ukey * Step 2: Clear Accumulative Length of Debug Data Transferred 438dba2cc03SDeepak Ukey * [ACCDDLEN] field in the MPI Fatal and Non-Fatal Error Dump 439dba2cc03SDeepak Ukey * Capture Table to zero. 440dba2cc03SDeepak Ukey */ 441dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 442dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN, 0); 443dba2cc03SDeepak Ukey 444dba2cc03SDeepak Ukey /* initiallize previous accumulated length to 0 */ 445dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 0; 446dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 447dba2cc03SDeepak Ukey } 448dba2cc03SDeepak Ukey 449dba2cc03SDeepak Ukey total_len = pm8001_mr32(nonfatal_table_address, 450dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_TOTAL_LEN); 451dba2cc03SDeepak Ukey /* 452dba2cc03SDeepak Ukey * Step 3:Clear Fatal/Non-Fatal Debug Data Transfer Status [FDDTSTAT] 453dba2cc03SDeepak Ukey * field and then request that the SPCv controller transfer the debug 454dba2cc03SDeepak Ukey * data by setting bit 7 of the Inbound Doorbell Set Register. 455dba2cc03SDeepak Ukey */ 456dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, MPI_FATAL_EDUMP_TABLE_STATUS, 0); 457dba2cc03SDeepak Ukey pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, 458dba2cc03SDeepak Ukey SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP); 459dba2cc03SDeepak Ukey 460dba2cc03SDeepak Ukey /* 461dba2cc03SDeepak Ukey * Step 4.1: Read back the Inbound Doorbell Set Register (by polling for 462dba2cc03SDeepak Ukey * 2 seconds) until register bit 7 is cleared. 463dba2cc03SDeepak Ukey * This step only indicates the request is accepted by the controller. 464dba2cc03SDeepak Ukey */ 465dba2cc03SDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 466dba2cc03SDeepak Ukey do { 467dba2cc03SDeepak Ukey reg_val = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET) & 468dba2cc03SDeepak Ukey SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP; 469dba2cc03SDeepak Ukey } while ((reg_val != 0) && time_before(jiffies, start)); 470dba2cc03SDeepak Ukey 471dba2cc03SDeepak Ukey /* Step 4.2: To check the completion of the transfer, poll the Fatal/Non 472dba2cc03SDeepak Ukey * Fatal Debug Data Transfer Status [FDDTSTAT] field for 2 seconds in 473dba2cc03SDeepak Ukey * the MPI Fatal and Non-Fatal Error Dump Capture Table. 474dba2cc03SDeepak Ukey */ 475dba2cc03SDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 476dba2cc03SDeepak Ukey do { 477dba2cc03SDeepak Ukey reg_val = pm8001_mr32(nonfatal_table_address, 478dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS); 479dba2cc03SDeepak Ukey } while ((!reg_val) && time_before(jiffies, start)); 480dba2cc03SDeepak Ukey 481dba2cc03SDeepak Ukey if ((reg_val == 0x00) || 482dba2cc03SDeepak Ukey (reg_val == MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED) || 483dba2cc03SDeepak Ukey (reg_val > MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE)) { 484dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 485dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 0xFFFFFFFF); 486dba2cc03SDeepak Ukey pm8001_ha->non_fatal_count = 0; 487dba2cc03SDeepak Ukey return (buf_copy - buf); 488dba2cc03SDeepak Ukey } else if (reg_val == 489dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA) { 490dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 2); 491dba2cc03SDeepak Ukey } else if ((reg_val == MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) || 492dba2cc03SDeepak Ukey (pm8001_ha->non_fatal_read_length >= total_len)) { 493dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 494dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 4); 495dba2cc03SDeepak Ukey pm8001_ha->non_fatal_count = 0; 496dba2cc03SDeepak Ukey } 497dba2cc03SDeepak Ukey accum_len = pm8001_mr32(nonfatal_table_address, 498dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 499dba2cc03SDeepak Ukey output_length = accum_len - 500dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer; 501dba2cc03SDeepak Ukey 502dba2cc03SDeepak Ukey for (index = 0; index < output_length/4; index++) 503dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, 504dba2cc03SDeepak Ukey "%08x ", *(temp+index)); 505dba2cc03SDeepak Ukey 506dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length += output_length; 507dba2cc03SDeepak Ukey 508dba2cc03SDeepak Ukey /* store current accumulated length to use in next iteration as 509dba2cc03SDeepak Ukey * the previous accumulated length 510dba2cc03SDeepak Ukey */ 511dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = accum_len; 512dba2cc03SDeepak Ukey return (buf_copy - buf); 513dba2cc03SDeepak Ukey } 514dba2cc03SDeepak Ukey 515f5860992SSakthivel K /** 516f5860992SSakthivel K * read_main_config_table - read the configure table and save it. 517f5860992SSakthivel K * @pm8001_ha: our hba card information 518f5860992SSakthivel K */ 519f5860992SSakthivel K static void read_main_config_table(struct pm8001_hba_info *pm8001_ha) 520f5860992SSakthivel K { 521f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 522f5860992SSakthivel K 523f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature = 524f5860992SSakthivel K pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); 525f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev = 526f5860992SSakthivel K pm8001_mr32(address, MAIN_INTERFACE_REVISION); 527f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev = 528f5860992SSakthivel K pm8001_mr32(address, MAIN_FW_REVISION); 529f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io = 530f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); 531f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl = 532f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); 533f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag = 534f5860992SSakthivel K pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); 535f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset = 536f5860992SSakthivel K pm8001_mr32(address, MAIN_GST_OFFSET); 537f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset = 538f5860992SSakthivel K pm8001_mr32(address, MAIN_IBQ_OFFSET); 539f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset = 540f5860992SSakthivel K pm8001_mr32(address, MAIN_OBQ_OFFSET); 541f5860992SSakthivel K 542f5860992SSakthivel K /* read Error Dump Offset and Length */ 543f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 = 544f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); 545f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 = 546f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); 547f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 = 548f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); 549f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 = 550f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); 551f5860992SSakthivel K 552f5860992SSakthivel K /* read GPIO LED settings from the configuration table */ 553f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping = 554f5860992SSakthivel K pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); 555f5860992SSakthivel K 556f5860992SSakthivel K /* read analog Setting offset from the configuration table */ 557f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset = 558f5860992SSakthivel K pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); 559f5860992SSakthivel K 560f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset = 561f5860992SSakthivel K pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); 562f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset = 563f5860992SSakthivel K pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); 5648414cd80SViswas G /* read port recover and reset timeout */ 5658414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer = 5668414cd80SViswas G pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); 56724fff017SViswas G /* read ILA and inactive firmware version */ 56824fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version = 56924fff017SViswas G pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE); 57024fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version = 57124fff017SViswas G pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION); 5727370672dSpeter chang 5731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5747370672dSpeter chang "Main cfg table: sign:%x interface rev:%x fw_rev:%x\n", 5757370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature, 5767370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev, 5771b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev); 5787370672dSpeter chang 5791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5807370672dSpeter chang "table offset: gst:%x iq:%x oq:%x int vec:%x phy attr:%x\n", 5817370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset, 5827370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset, 5837370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset, 5847370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset, 5851b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset); 5867370672dSpeter chang 5871b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5887370672dSpeter chang "Main cfg table; ila rev:%x Inactive fw rev:%x\n", 5897370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version, 5901b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version); 591f5860992SSakthivel K } 592f5860992SSakthivel K 593f5860992SSakthivel K /** 594f5860992SSakthivel K * read_general_status_table - read the general status table and save it. 595f5860992SSakthivel K * @pm8001_ha: our hba card information 596f5860992SSakthivel K */ 597f5860992SSakthivel K static void read_general_status_table(struct pm8001_hba_info *pm8001_ha) 598f5860992SSakthivel K { 599f5860992SSakthivel K void __iomem *address = pm8001_ha->general_stat_tbl_addr; 600f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate = 601f5860992SSakthivel K pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); 602f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 = 603f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); 604f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 = 605f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); 606f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt = 607f5860992SSakthivel K pm8001_mr32(address, GST_MSGUTCNT_OFFSET); 608f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt = 609f5860992SSakthivel K pm8001_mr32(address, GST_IOPTCNT_OFFSET); 610f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val = 611f5860992SSakthivel K pm8001_mr32(address, GST_GPIO_INPUT_VAL); 612f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[0] = 613f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET0); 614f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[1] = 615f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET1); 616f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[2] = 617f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET2); 618f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[3] = 619f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET3); 620f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[4] = 621f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET4); 622f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[5] = 623f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET5); 624f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[6] = 625f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET6); 626f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[7] = 627f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET7); 628f5860992SSakthivel K } 629f5860992SSakthivel K /** 630f5860992SSakthivel K * read_phy_attr_table - read the phy attribute table and save it. 631f5860992SSakthivel K * @pm8001_ha: our hba card information 632f5860992SSakthivel K */ 633f5860992SSakthivel K static void read_phy_attr_table(struct pm8001_hba_info *pm8001_ha) 634f5860992SSakthivel K { 635f5860992SSakthivel K void __iomem *address = pm8001_ha->pspa_q_tbl_addr; 636f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[0] = 637f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); 638f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[1] = 639f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); 640f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[2] = 641f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); 642f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[3] = 643f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); 644f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[4] = 645f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); 646f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[5] = 647f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); 648f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[6] = 649f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); 650f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[7] = 651f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); 652f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[8] = 653f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); 654f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[9] = 655f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); 656f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[10] = 657f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); 658f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[11] = 659f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); 660f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[12] = 661f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); 662f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[13] = 663f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); 664f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[14] = 665f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); 666f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[15] = 667f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); 668f5860992SSakthivel K 669f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[0] = 670f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); 671f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[1] = 672f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); 673f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[2] = 674f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); 675f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[3] = 676f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); 677f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[4] = 678f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); 679f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[5] = 680f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); 681f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[6] = 682f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); 683f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[7] = 684f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); 685f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[8] = 686f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); 687f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[9] = 688f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); 689f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[10] = 690f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); 691f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[11] = 692f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); 693f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[12] = 694f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); 695f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[13] = 696f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); 697f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[14] = 698f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); 699f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[15] = 700f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); 701f5860992SSakthivel K 702f5860992SSakthivel K } 703f5860992SSakthivel K 704f5860992SSakthivel K /** 705f5860992SSakthivel K * read_inbnd_queue_table - read the inbound queue table and save it. 706f5860992SSakthivel K * @pm8001_ha: our hba card information 707f5860992SSakthivel K */ 708f5860992SSakthivel K static void read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 709f5860992SSakthivel K { 710f5860992SSakthivel K int i; 711f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 71205c6c029SViswas G for (i = 0; i < PM8001_MAX_INB_NUM; i++) { 713f5860992SSakthivel K u32 offset = i * 0x20; 714f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 715f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 716f5860992SSakthivel K (offset + IB_PIPCI_BAR))); 717f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 718f5860992SSakthivel K pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); 719f5860992SSakthivel K } 720f5860992SSakthivel K } 721f5860992SSakthivel K 722f5860992SSakthivel K /** 723f5860992SSakthivel K * read_outbnd_queue_table - read the outbound queue table and save it. 724f5860992SSakthivel K * @pm8001_ha: our hba card information 725f5860992SSakthivel K */ 726f5860992SSakthivel K static void read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 727f5860992SSakthivel K { 728f5860992SSakthivel K int i; 729f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 73005c6c029SViswas G for (i = 0; i < PM8001_MAX_OUTB_NUM; i++) { 731f5860992SSakthivel K u32 offset = i * 0x24; 732f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 733f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 734f5860992SSakthivel K (offset + OB_CIPCI_BAR))); 735f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 736f5860992SSakthivel K pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); 737f5860992SSakthivel K } 738f5860992SSakthivel K } 739f5860992SSakthivel K 740f5860992SSakthivel K /** 741f5860992SSakthivel K * init_default_table_values - init the default table. 742f5860992SSakthivel K * @pm8001_ha: our hba card information 743f5860992SSakthivel K */ 744f5860992SSakthivel K static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) 745f5860992SSakthivel K { 746f5860992SSakthivel K int i; 747f5860992SSakthivel K u32 offsetib, offsetob; 748f5860992SSakthivel K void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr; 749f5860992SSakthivel K void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr; 75005c6c029SViswas G u32 ib_offset = pm8001_ha->ib_offset; 75105c6c029SViswas G u32 ob_offset = pm8001_ha->ob_offset; 75205c6c029SViswas G u32 ci_offset = pm8001_ha->ci_offset; 75305c6c029SViswas G u32 pi_offset = pm8001_ha->pi_offset; 754f5860992SSakthivel K 755f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr = 756f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_hi; 757f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr = 758f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_lo; 759f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size = 760f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 761f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity = 0x01; 762f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr = 763f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_hi; 764f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr = 765f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_lo; 766f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size = 767f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 768f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01; 769f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01; 770f5860992SSakthivel K 771c6b9ef57SSakthivel K /* Disable end to end CRC checking */ 772c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16); 773c6b9ef57SSakthivel K 77405c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 775f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt = 7769504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30); 777f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].upper_base_addr = 77805c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi; 779f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].lower_base_addr = 78005c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo; 781f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].base_virt = 78205c6c029SViswas G (u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr; 783f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].total_length = 78405c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].total_len; 785f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr = 78605c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi; 787f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr = 78805c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo; 789f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_virt = 79005c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr; 791b431472bSViswas G pm8001_write_32(pm8001_ha->inbnd_q_tbl[i].ci_virt, 0, 0); 792f5860992SSakthivel K offsetib = i * 0x20; 793f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 794f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressib, 795f5860992SSakthivel K (offsetib + 0x14))); 796f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 797f5860992SSakthivel K pm8001_mr32(addressib, (offsetib + 0x18)); 798f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].producer_idx = 0; 799f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].consumer_index = 0; 8007370672dSpeter chang 8011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8027370672dSpeter chang "IQ %d pi_bar 0x%x pi_offset 0x%x\n", i, 8037370672dSpeter chang pm8001_ha->inbnd_q_tbl[i].pi_pci_bar, 8041b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[i].pi_offset); 805f5860992SSakthivel K } 80605c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 807f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].element_size_cnt = 8089504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30); 809f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].upper_base_addr = 81005c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi; 811f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].lower_base_addr = 81205c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo; 813f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].base_virt = 81405c6c029SViswas G (u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr; 815f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].total_length = 81605c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].total_len; 817f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr = 81805c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi; 819f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr = 82005c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo; 821f5860992SSakthivel K /* interrupt vector based on oq */ 822f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24); 823f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_virt = 82405c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr; 825b431472bSViswas G pm8001_write_32(pm8001_ha->outbnd_q_tbl[i].pi_virt, 0, 0); 826f5860992SSakthivel K offsetob = i * 0x24; 827f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 828f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressob, 829f5860992SSakthivel K offsetob + 0x14)); 830f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 831f5860992SSakthivel K pm8001_mr32(addressob, (offsetob + 0x18)); 832f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0; 833f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].producer_index = 0; 8347370672dSpeter chang 8351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8367370672dSpeter chang "OQ %d ci_bar 0x%x ci_offset 0x%x\n", i, 8377370672dSpeter chang pm8001_ha->outbnd_q_tbl[i].ci_pci_bar, 8381b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[i].ci_offset); 839f5860992SSakthivel K } 840f5860992SSakthivel K } 841f5860992SSakthivel K 842f5860992SSakthivel K /** 843f5860992SSakthivel K * update_main_config_table - update the main default table to the HBA. 844f5860992SSakthivel K * @pm8001_ha: our hba card information 845f5860992SSakthivel K */ 846f5860992SSakthivel K static void update_main_config_table(struct pm8001_hba_info *pm8001_ha) 847f5860992SSakthivel K { 848f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 849f5860992SSakthivel K pm8001_mw32(address, MAIN_IQNPPD_HPPD_OFFSET, 850f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_q_nppd_hppd); 851f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_HI, 852f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr); 853f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_LO, 854f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr); 855f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_BUFF_SIZE, 856f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size); 857f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_OPTION, 858f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity); 859f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_HI, 860f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr); 861f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_LO, 862f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr); 863f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_BUFF_SIZE, 864f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size); 865f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_OPTION, 866f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity); 86772349b62SDeepak Ukey /* Update Fatal error interrupt vector */ 86872349b62SDeepak Ukey pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= 86905c6c029SViswas G ((pm8001_ha->max_q_num - 1) << 8); 870f5860992SSakthivel K pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT, 871f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt); 8721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8737370672dSpeter chang "Updated Fatal error interrupt vector 0x%x\n", 8741b5d2793SJoe Perches pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT)); 8757370672dSpeter chang 876c6b9ef57SSakthivel K pm8001_mw32(address, MAIN_EVENT_CRC_CHECK, 877c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump); 878f5860992SSakthivel K 879f5860992SSakthivel K /* SPCv specific */ 880f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping &= 0xCFFFFFFF; 881f5860992SSakthivel K /* Set GPIOLED to 0x2 for LED indicator */ 882f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000; 883f5860992SSakthivel K pm8001_mw32(address, MAIN_GPIO_LED_FLAGS_OFFSET, 884f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping); 8851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8867370672dSpeter chang "Programming DW 0x21 in main cfg table with 0x%x\n", 8871b5d2793SJoe Perches pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET)); 888f5860992SSakthivel K 889f5860992SSakthivel K pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 890f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 891f5860992SSakthivel K pm8001_mw32(address, MAIN_INT_REASSERTION_DELAY, 892f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interrupt_reassertion_delay); 8938414cd80SViswas G 8948414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 0xffff0000; 8958414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 8968414cd80SViswas G PORT_RECOVERY_TIMEOUT; 89761daffdeSViswas G if (pm8001_ha->chip_id == chip_8006) { 89861daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 89961daffdeSViswas G 0x0000ffff; 90061daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 901196ba662SDeepak Ukey CHIP_8006_PORT_RECOVERY_TIMEOUT; 90261daffdeSViswas G } 9038414cd80SViswas G pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 9048414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 905f5860992SSakthivel K } 906f5860992SSakthivel K 907f5860992SSakthivel K /** 908f5860992SSakthivel K * update_inbnd_queue_table - update the inbound queue table to the HBA. 909f5860992SSakthivel K * @pm8001_ha: our hba card information 9106ad4a517SLee Jones * @number: entry in the queue 911f5860992SSakthivel K */ 912f5860992SSakthivel K static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 913f5860992SSakthivel K int number) 914f5860992SSakthivel K { 915f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 916f5860992SSakthivel K u16 offset = number * 0x20; 917f5860992SSakthivel K pm8001_mw32(address, offset + IB_PROPERITY_OFFSET, 918f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 919f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_HI_OFFSET, 920f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].upper_base_addr); 921f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_LO_OFFSET, 922f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 923f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_HI_OFFSET, 924f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr); 925f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_LO_OFFSET, 926f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 9277370672dSpeter chang 9281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9297370672dSpeter chang "IQ %d: Element pri size 0x%x\n", 9307370672dSpeter chang number, 9311b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 9327370672dSpeter chang 9331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9347370672dSpeter chang "IQ upr base addr 0x%x IQ lwr base addr 0x%x\n", 9357370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].upper_base_addr, 9361b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 9377370672dSpeter chang 9381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9397370672dSpeter chang "CI upper base addr 0x%x CI lower base addr 0x%x\n", 9407370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr, 9411b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 942f5860992SSakthivel K } 943f5860992SSakthivel K 944f5860992SSakthivel K /** 945f5860992SSakthivel K * update_outbnd_queue_table - update the outbound queue table to the HBA. 946f5860992SSakthivel K * @pm8001_ha: our hba card information 9476ad4a517SLee Jones * @number: entry in the queue 948f5860992SSakthivel K */ 949f5860992SSakthivel K static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 950f5860992SSakthivel K int number) 951f5860992SSakthivel K { 952f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 953f5860992SSakthivel K u16 offset = number * 0x24; 954f5860992SSakthivel K pm8001_mw32(address, offset + OB_PROPERITY_OFFSET, 955f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 956f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_HI_OFFSET, 957f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].upper_base_addr); 958f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_LO_OFFSET, 959f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 960f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_HI_OFFSET, 961f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr); 962f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_LO_OFFSET, 963f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 964f5860992SSakthivel K pm8001_mw32(address, offset + OB_INTERRUPT_COALES_OFFSET, 965f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay); 9667370672dSpeter chang 9671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9687370672dSpeter chang "OQ %d: Element pri size 0x%x\n", 9697370672dSpeter chang number, 9701b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 9717370672dSpeter chang 9721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9737370672dSpeter chang "OQ upr base addr 0x%x OQ lwr base addr 0x%x\n", 9747370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].upper_base_addr, 9751b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 9767370672dSpeter chang 9771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9787370672dSpeter chang "PI upper base addr 0x%x PI lower base addr 0x%x\n", 9797370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr, 9801b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 981f5860992SSakthivel K } 982f5860992SSakthivel K 983f5860992SSakthivel K /** 984f5860992SSakthivel K * mpi_init_check - check firmware initialization status. 985f5860992SSakthivel K * @pm8001_ha: our hba card information 986f5860992SSakthivel K */ 987f5860992SSakthivel K static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) 988f5860992SSakthivel K { 989f5860992SSakthivel K u32 max_wait_count; 990f5860992SSakthivel K u32 value; 991f5860992SSakthivel K u32 gst_len_mpistate; 992f5860992SSakthivel K 993f5860992SSakthivel K /* Write bit0=1 to Inbound DoorBell Register to tell the SPC FW the 994f5860992SSakthivel K table is updated */ 995f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE); 996f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 997a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 998e90e2362Sianyar max_wait_count = SPCV_DOORBELL_CLEAR_TIMEOUT; 999a9a923e5SAnand Kumar Santhanam } else { 1000e90e2362Sianyar max_wait_count = SPC_DOORBELL_CLEAR_TIMEOUT; 1001a9a923e5SAnand Kumar Santhanam } 1002f5860992SSakthivel K do { 1003d71023afSakshatzen msleep(FW_READY_INTERVAL); 1004f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1005f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_UPDATE; 1006f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1007f5860992SSakthivel K 100805c6c029SViswas G if (!max_wait_count) { 100905c6c029SViswas G /* additional check */ 10101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 10111b5d2793SJoe Perches "Inb doorbell clear not toggled[value:%x]\n", 10121b5d2793SJoe Perches value); 101305c6c029SViswas G return -EBUSY; 101405c6c029SViswas G } 1015f5860992SSakthivel K /* check the MPI-State for initialization up to 100ms*/ 1016d71023afSakshatzen max_wait_count = 5;/* 100 msec */ 1017f5860992SSakthivel K do { 1018d71023afSakshatzen msleep(FW_READY_INTERVAL); 1019f5860992SSakthivel K gst_len_mpistate = 1020f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1021f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1022f5860992SSakthivel K } while ((GST_MPI_STATE_INIT != 1023f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count)); 1024f5860992SSakthivel K if (!max_wait_count) 102505c6c029SViswas G return -EBUSY; 1026f5860992SSakthivel K 1027f5860992SSakthivel K /* check MPI Initialization error */ 1028f5860992SSakthivel K gst_len_mpistate = gst_len_mpistate >> 16; 1029f5860992SSakthivel K if (0x0000 != gst_len_mpistate) 103005c6c029SViswas G return -EBUSY; 1031f5860992SSakthivel K 1032f5860992SSakthivel K return 0; 1033f5860992SSakthivel K } 1034f5860992SSakthivel K 1035f5860992SSakthivel K /** 1036f5860992SSakthivel K * check_fw_ready - The LLDD check if the FW is ready, if not, return error. 103748cd6b38Sakshatzen * This function sleeps hence it must not be used in atomic context. 1038f5860992SSakthivel K * @pm8001_ha: our hba card information 1039f5860992SSakthivel K */ 1040f5860992SSakthivel K static int check_fw_ready(struct pm8001_hba_info *pm8001_ha) 1041f5860992SSakthivel K { 1042f5860992SSakthivel K u32 value; 1043f5860992SSakthivel K u32 max_wait_count; 1044f5860992SSakthivel K u32 max_wait_time; 10456b2f2d05SBhavesh Jashnani u32 expected_mask; 1046f5860992SSakthivel K int ret = 0; 1047f5860992SSakthivel K 1048f5860992SSakthivel K /* reset / PCIe ready */ 104948cd6b38Sakshatzen max_wait_time = max_wait_count = 5; /* 100 milli sec */ 1050f5860992SSakthivel K do { 105148cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1052f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1053f5860992SSakthivel K } while ((value == 0xFFFFFFFF) && (--max_wait_count)); 1054f5860992SSakthivel K 10556b2f2d05SBhavesh Jashnani /* check ila, RAAE and iops status */ 1056f5860992SSakthivel K if ((pm8001_ha->chip_id != chip_8008) && 1057f5860992SSakthivel K (pm8001_ha->chip_id != chip_8009)) { 10586b2f2d05SBhavesh Jashnani max_wait_time = max_wait_count = 180; /* 3600 milli sec */ 10596b2f2d05SBhavesh Jashnani expected_mask = SCRATCH_PAD_ILA_READY | 10606b2f2d05SBhavesh Jashnani SCRATCH_PAD_RAAE_READY | 10616b2f2d05SBhavesh Jashnani SCRATCH_PAD_IOP0_READY | 10626b2f2d05SBhavesh Jashnani SCRATCH_PAD_IOP1_READY; 10636b2f2d05SBhavesh Jashnani } else { 10646b2f2d05SBhavesh Jashnani max_wait_time = max_wait_count = 170; /* 3400 milli sec */ 10656b2f2d05SBhavesh Jashnani expected_mask = SCRATCH_PAD_ILA_READY | 10666b2f2d05SBhavesh Jashnani SCRATCH_PAD_RAAE_READY | 10676b2f2d05SBhavesh Jashnani SCRATCH_PAD_IOP0_READY; 10686b2f2d05SBhavesh Jashnani } 1069f5860992SSakthivel K do { 107048cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1071f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 10726b2f2d05SBhavesh Jashnani } while (((value & expected_mask) != 10736b2f2d05SBhavesh Jashnani expected_mask) && (--max_wait_count)); 10746b2f2d05SBhavesh Jashnani if (!max_wait_count) { 10756b2f2d05SBhavesh Jashnani pm8001_dbg(pm8001_ha, INIT, 10766b2f2d05SBhavesh Jashnani "At least one FW component failed to load within %d millisec: Scratchpad1: 0x%x\n", 10776b2f2d05SBhavesh Jashnani max_wait_time * FW_READY_INTERVAL, value); 1078f5860992SSakthivel K ret = -1; 10796b2f2d05SBhavesh Jashnani } else { 10801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 10816b2f2d05SBhavesh Jashnani "All FW components ready by %d ms\n", 10826b2f2d05SBhavesh Jashnani (max_wait_time - max_wait_count) * FW_READY_INTERVAL); 1083f5860992SSakthivel K } 1084f5860992SSakthivel K return ret; 1085f5860992SSakthivel K } 1086f5860992SSakthivel K 108795652f98Sakshatzen static int init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) 1088f5860992SSakthivel K { 1089f5860992SSakthivel K void __iomem *base_addr; 1090f5860992SSakthivel K u32 value; 1091f5860992SSakthivel K u32 offset; 1092f5860992SSakthivel K u32 pcibar; 1093f5860992SSakthivel K u32 pcilogic; 1094f5860992SSakthivel K 1095f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 109695652f98Sakshatzen 1097bb6beabfSRandy Dunlap /* 109895652f98Sakshatzen * lower 26 bits of SCRATCHPAD0 register describes offset within the 109995652f98Sakshatzen * PCIe BAR where the MPI configuration table is present 110095652f98Sakshatzen */ 1101f5860992SSakthivel K offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */ 1102f5860992SSakthivel K 11031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n", 11041b5d2793SJoe Perches offset, value); 1105bb6beabfSRandy Dunlap /* 110695652f98Sakshatzen * Upper 6 bits describe the offset within PCI config space where BAR 110795652f98Sakshatzen * is located. 110895652f98Sakshatzen */ 1109f5860992SSakthivel K pcilogic = (value & 0xFC000000) >> 26; 1110f5860992SSakthivel K pcibar = get_pci_bar_index(pcilogic); 11111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar); 111295652f98Sakshatzen 1113bb6beabfSRandy Dunlap /* 111495652f98Sakshatzen * Make sure the offset falls inside the ioremapped PCI BAR 111595652f98Sakshatzen */ 111695652f98Sakshatzen if (offset > pm8001_ha->io_mem[pcibar].memsize) { 111795652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 111895652f98Sakshatzen "Main cfg tbl offset outside %u > %u\n", 111995652f98Sakshatzen offset, pm8001_ha->io_mem[pcibar].memsize); 112095652f98Sakshatzen return -EBUSY; 112195652f98Sakshatzen } 1122f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr = base_addr = 1123f5860992SSakthivel K pm8001_ha->io_mem[pcibar].memvirtaddr + offset; 112495652f98Sakshatzen 1125bb6beabfSRandy Dunlap /* 112695652f98Sakshatzen * Validate main configuration table address: first DWord should read 112795652f98Sakshatzen * "PMCS" 112895652f98Sakshatzen */ 112995652f98Sakshatzen value = pm8001_mr32(pm8001_ha->main_cfg_tbl_addr, 0); 113095652f98Sakshatzen if (memcmp(&value, "PMCS", 4) != 0) { 113195652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 113295652f98Sakshatzen "BAD main config signature 0x%x\n", 113395652f98Sakshatzen value); 113495652f98Sakshatzen return -EBUSY; 113595652f98Sakshatzen } 113695652f98Sakshatzen pm8001_dbg(pm8001_ha, INIT, 113795652f98Sakshatzen "VALID main config signature 0x%x\n", value); 1138f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr = 1139f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x18) & 1140f5860992SSakthivel K 0xFFFFFF); 1141f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr = 1142f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C) & 1143f5860992SSakthivel K 0xFFFFFF); 1144f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr = 1145f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x20) & 1146f5860992SSakthivel K 0xFFFFFF); 1147f5860992SSakthivel K pm8001_ha->ivt_tbl_addr = 1148f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C) & 1149f5860992SSakthivel K 0xFFFFFF); 1150f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr = 1151f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x90) & 1152f5860992SSakthivel K 0xFFFFFF); 1153d078b511SAnand Kumar Santhanam pm8001_ha->fatal_tbl_addr = 1154d078b511SAnand Kumar Santhanam base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) & 1155d078b511SAnand Kumar Santhanam 0xFFFFFF); 1156f5860992SSakthivel K 11571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "GST OFFSET 0x%x\n", 11581b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x18)); 11591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "INBND OFFSET 0x%x\n", 11601b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C)); 11611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "OBND OFFSET 0x%x\n", 11621b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x20)); 11631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "IVT OFFSET 0x%x\n", 11641b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C)); 11651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PSPA OFFSET 0x%x\n", 11661b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x90)); 11671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - main cfg %p general status %p\n", 1168f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr, 11691b5d2793SJoe Perches pm8001_ha->general_stat_tbl_addr); 11701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - inbnd %p obnd %p\n", 1171f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr, 11721b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl_addr); 11731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - pspa %p ivt %p\n", 1174f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr, 11751b5d2793SJoe Perches pm8001_ha->ivt_tbl_addr); 117695652f98Sakshatzen return 0; 1177f5860992SSakthivel K } 1178f5860992SSakthivel K 1179f5860992SSakthivel K /** 1180f5860992SSakthivel K * pm80xx_set_thermal_config - support the thermal configuration 1181f5860992SSakthivel K * @pm8001_ha: our hba card information. 1182f5860992SSakthivel K */ 1183a6cb3d01SSakthivel K int 1184f5860992SSakthivel K pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha) 1185f5860992SSakthivel K { 1186f5860992SSakthivel K struct set_ctrl_cfg_req payload; 1187f5860992SSakthivel K struct inbound_queue_table *circularQ; 1188f5860992SSakthivel K int rc; 1189f5860992SSakthivel K u32 tag; 1190f5860992SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1191842784e0SViswas G u32 page_code; 1192f5860992SSakthivel K 1193f5860992SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1194f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1195f5860992SSakthivel K if (rc) 1196f5860992SSakthivel K return -1; 1197f5860992SSakthivel K 1198f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1199f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1200842784e0SViswas G 1201842784e0SViswas G if (IS_SPCV_12G(pm8001_ha->pdev)) 1202842784e0SViswas G page_code = THERMAL_PAGE_CODE_7H; 1203842784e0SViswas G else 1204842784e0SViswas G page_code = THERMAL_PAGE_CODE_8H; 1205842784e0SViswas G 1206f5860992SSakthivel K payload.cfg_pg[0] = (THERMAL_LOG_ENABLE << 9) | 1207842784e0SViswas G (THERMAL_ENABLE << 8) | page_code; 1208f5860992SSakthivel K payload.cfg_pg[1] = (LTEMPHIL << 24) | (RTEMPHIL << 8); 1209f5860992SSakthivel K 12101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 12117370672dSpeter chang "Setting up thermal config. cfg_pg 0 0x%x cfg_pg 1 0x%x\n", 12121b5d2793SJoe Perches payload.cfg_pg[0], payload.cfg_pg[1]); 12137370672dSpeter chang 121491a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 121591a43fa6Speter chang sizeof(payload), 0); 12165533abcaSTomas Henzl if (rc) 12175533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1218f5860992SSakthivel K return rc; 1219f5860992SSakthivel K 1220f5860992SSakthivel K } 1221f5860992SSakthivel K 1222f5860992SSakthivel K /** 1223a6cb3d01SSakthivel K * pm80xx_set_sas_protocol_timer_config - support the SAS Protocol 1224a6cb3d01SSakthivel K * Timer configuration page 1225a6cb3d01SSakthivel K * @pm8001_ha: our hba card information. 1226a6cb3d01SSakthivel K */ 1227a6cb3d01SSakthivel K static int 1228a6cb3d01SSakthivel K pm80xx_set_sas_protocol_timer_config(struct pm8001_hba_info *pm8001_ha) 1229a6cb3d01SSakthivel K { 1230a6cb3d01SSakthivel K struct set_ctrl_cfg_req payload; 1231a6cb3d01SSakthivel K struct inbound_queue_table *circularQ; 1232a6cb3d01SSakthivel K SASProtocolTimerConfig_t SASConfigPage; 1233a6cb3d01SSakthivel K int rc; 1234a6cb3d01SSakthivel K u32 tag; 1235a6cb3d01SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1236a6cb3d01SSakthivel K 1237a6cb3d01SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1238a6cb3d01SSakthivel K memset(&SASConfigPage, 0, sizeof(SASProtocolTimerConfig_t)); 1239a6cb3d01SSakthivel K 1240a6cb3d01SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1241a6cb3d01SSakthivel K 1242a6cb3d01SSakthivel K if (rc) 1243a6cb3d01SSakthivel K return -1; 1244a6cb3d01SSakthivel K 1245a6cb3d01SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1246a6cb3d01SSakthivel K payload.tag = cpu_to_le32(tag); 1247a6cb3d01SSakthivel K 1248a6cb3d01SSakthivel K SASConfigPage.pageCode = SAS_PROTOCOL_TIMER_CONFIG_PAGE; 1249a6cb3d01SSakthivel K SASConfigPage.MST_MSI = 3 << 15; 1250a6cb3d01SSakthivel K SASConfigPage.STP_SSP_MCT_TMO = (STP_MCT_TMO << 16) | SSP_MCT_TMO; 1251a6cb3d01SSakthivel K SASConfigPage.STP_FRM_TMO = (SAS_MAX_OPEN_TIME << 24) | 1252a6cb3d01SSakthivel K (SMP_MAX_CONN_TIMER << 16) | STP_FRM_TIMER; 1253a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = STP_IDLE_TIME; 1254a6cb3d01SSakthivel K 1255a6cb3d01SSakthivel K if (SASConfigPage.STP_IDLE_TMO > 0x3FFFFFF) 1256a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = 0x3FFFFFF; 1257a6cb3d01SSakthivel K 1258a6cb3d01SSakthivel K 1259a6cb3d01SSakthivel K SASConfigPage.OPNRJT_RTRY_INTVL = (SAS_MFD << 16) | 1260a6cb3d01SSakthivel K SAS_OPNRJT_RTRY_INTVL; 1261a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO = (SAS_DOPNRJT_RTRY_TMO << 16) 1262a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_TMO; 1263a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR = (SAS_DOPNRJT_RTRY_THR << 16) 1264a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_THR; 1265a6cb3d01SSakthivel K SASConfigPage.MAX_AIP = SAS_MAX_AIP; 1266a6cb3d01SSakthivel K 12671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.pageCode 0x%08x\n", 12681b5d2793SJoe Perches SASConfigPage.pageCode); 12691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MST_MSI 0x%08x\n", 12701b5d2793SJoe Perches SASConfigPage.MST_MSI); 12711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_SSP_MCT_TMO 0x%08x\n", 12721b5d2793SJoe Perches SASConfigPage.STP_SSP_MCT_TMO); 12731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_FRM_TMO 0x%08x\n", 12741b5d2793SJoe Perches SASConfigPage.STP_FRM_TMO); 12751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_IDLE_TMO 0x%08x\n", 12761b5d2793SJoe Perches SASConfigPage.STP_IDLE_TMO); 12771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.OPNRJT_RTRY_INTVL 0x%08x\n", 12781b5d2793SJoe Perches SASConfigPage.OPNRJT_RTRY_INTVL); 12791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO 0x%08x\n", 12801b5d2793SJoe Perches SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO); 12811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR 0x%08x\n", 12821b5d2793SJoe Perches SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR); 12831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MAX_AIP 0x%08x\n", 12841b5d2793SJoe Perches SASConfigPage.MAX_AIP); 1285a6cb3d01SSakthivel K 1286a6cb3d01SSakthivel K memcpy(&payload.cfg_pg, &SASConfigPage, 1287a6cb3d01SSakthivel K sizeof(SASProtocolTimerConfig_t)); 1288a6cb3d01SSakthivel K 128991a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 129091a43fa6Speter chang sizeof(payload), 0); 12915533abcaSTomas Henzl if (rc) 12925533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1293a6cb3d01SSakthivel K 1294a6cb3d01SSakthivel K return rc; 1295a6cb3d01SSakthivel K } 1296a6cb3d01SSakthivel K 1297a6cb3d01SSakthivel K /** 1298f5860992SSakthivel K * pm80xx_get_encrypt_info - Check for encryption 1299f5860992SSakthivel K * @pm8001_ha: our hba card information. 1300f5860992SSakthivel K */ 1301f5860992SSakthivel K static int 1302f5860992SSakthivel K pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha) 1303f5860992SSakthivel K { 1304f5860992SSakthivel K u32 scratch3_value; 1305da225498SRickard Strandqvist int ret = -1; 1306f5860992SSakthivel K 1307f5860992SSakthivel K /* Read encryption status from SCRATCH PAD 3 */ 1308f5860992SSakthivel K scratch3_value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 1309f5860992SSakthivel K 1310f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1311f5860992SSakthivel K SCRATCH_PAD3_ENC_READY) { 1312f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1313f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1314f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1315f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1316f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1317f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1318f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1319f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1320f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1321f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1322f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1323f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0; 13241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13251b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X.Cipher mode 0x%x Sec mode 0x%x status 0x%x\n", 13261b5d2793SJoe Perches scratch3_value, 13271b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1328f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13291b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1330f5860992SSakthivel K ret = 0; 1331f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_READY) == 1332f5860992SSakthivel K SCRATCH_PAD3_ENC_DISABLED) { 13331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 1334f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n", 13351b5d2793SJoe Perches scratch3_value); 1336f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0xFFFFFFFF; 1337f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = 0; 1338f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = 0; 1339da225498SRickard Strandqvist ret = 0; 1340f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1341f5860992SSakthivel K SCRATCH_PAD3_ENC_DIS_ERR) { 1342f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1343f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1344f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1345f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1346f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1347f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1348f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1349f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1350f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1351f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1352f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1353f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1354f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 13551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13561b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 13571b5d2793SJoe Perches scratch3_value, 13581b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1359f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13601b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1361f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1362f5860992SSakthivel K SCRATCH_PAD3_ENC_ENA_ERR) { 1363f5860992SSakthivel K 1364f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1365f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1366f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1367f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1368f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1369f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1370f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1371f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1372f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1373f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1374f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1375f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1376f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1377f5860992SSakthivel K 13781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13791b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 13801b5d2793SJoe Perches scratch3_value, 13811b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1382f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13831b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1384f5860992SSakthivel K } 1385f5860992SSakthivel K return ret; 1386f5860992SSakthivel K } 1387f5860992SSakthivel K 1388f5860992SSakthivel K /** 1389bb6beabfSRandy Dunlap * pm80xx_encrypt_update - update flash with encryption information 1390f5860992SSakthivel K * @pm8001_ha: our hba card information. 1391f5860992SSakthivel K */ 1392f5860992SSakthivel K static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha) 1393f5860992SSakthivel K { 1394f5860992SSakthivel K struct kek_mgmt_req payload; 1395f5860992SSakthivel K struct inbound_queue_table *circularQ; 1396f5860992SSakthivel K int rc; 1397f5860992SSakthivel K u32 tag; 1398f5860992SSakthivel K u32 opc = OPC_INB_KEK_MANAGEMENT; 1399f5860992SSakthivel K 1400f5860992SSakthivel K memset(&payload, 0, sizeof(struct kek_mgmt_req)); 1401f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1402f5860992SSakthivel K if (rc) 1403f5860992SSakthivel K return -1; 1404f5860992SSakthivel K 1405f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1406f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1407f5860992SSakthivel K /* Currently only one key is used. New KEK index is 1. 1408f5860992SSakthivel K * Current KEK index is 1. Store KEK to NVRAM is 1. 1409f5860992SSakthivel K */ 1410f5860992SSakthivel K payload.new_curidx_ksop = ((1 << 24) | (1 << 16) | (1 << 8) | 1411f5860992SSakthivel K KEK_MGMT_SUBOP_KEYCARDUPDATE); 1412f5860992SSakthivel K 14131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 14147370672dSpeter chang "Saving Encryption info to flash. payload 0x%x\n", 14151b5d2793SJoe Perches payload.new_curidx_ksop); 14167370672dSpeter chang 141791a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 141891a43fa6Speter chang sizeof(payload), 0); 14195533abcaSTomas Henzl if (rc) 14205533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1421f5860992SSakthivel K 1422f5860992SSakthivel K return rc; 1423f5860992SSakthivel K } 1424f5860992SSakthivel K 1425f5860992SSakthivel K /** 1426bb6beabfSRandy Dunlap * pm80xx_chip_init - the main init function that initializes whole PM8001 chip. 1427f5860992SSakthivel K * @pm8001_ha: our hba card information 1428f5860992SSakthivel K */ 1429f5860992SSakthivel K static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha) 1430f5860992SSakthivel K { 1431f5860992SSakthivel K int ret; 1432f5860992SSakthivel K u8 i = 0; 1433f5860992SSakthivel K 1434f5860992SSakthivel K /* check the firmware status */ 1435f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 14361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); 1437f5860992SSakthivel K return -EBUSY; 1438f5860992SSakthivel K } 1439f5860992SSakthivel K 144072349b62SDeepak Ukey /* Initialize the controller fatal error flag */ 144172349b62SDeepak Ukey pm8001_ha->controller_fatal_error = false; 144272349b62SDeepak Ukey 1443f5860992SSakthivel K /* Initialize pci space address eg: mpi offset */ 144495652f98Sakshatzen ret = init_pci_device_addresses(pm8001_ha); 144595652f98Sakshatzen if (ret) { 144695652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 144795652f98Sakshatzen "Failed to init pci addresses"); 144895652f98Sakshatzen return ret; 144995652f98Sakshatzen } 1450f5860992SSakthivel K init_default_table_values(pm8001_ha); 1451f5860992SSakthivel K read_main_config_table(pm8001_ha); 1452f5860992SSakthivel K read_general_status_table(pm8001_ha); 1453f5860992SSakthivel K read_inbnd_queue_table(pm8001_ha); 1454f5860992SSakthivel K read_outbnd_queue_table(pm8001_ha); 1455f5860992SSakthivel K read_phy_attr_table(pm8001_ha); 1456f5860992SSakthivel K 1457f5860992SSakthivel K /* update main config table ,inbound table and outbound table */ 1458f5860992SSakthivel K update_main_config_table(pm8001_ha); 145905c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 1460f5860992SSakthivel K update_inbnd_queue_table(pm8001_ha, i); 1461f5860992SSakthivel K update_outbnd_queue_table(pm8001_ha, i); 146205c6c029SViswas G } 1463f5860992SSakthivel K /* notify firmware update finished and check initialization status */ 1464f5860992SSakthivel K if (0 == mpi_init_check(pm8001_ha)) { 14651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n"); 1466f5860992SSakthivel K } else 1467f5860992SSakthivel K return -EBUSY; 1468f5860992SSakthivel K 1469a6cb3d01SSakthivel K /* send SAS protocol timer configuration page to FW */ 1470a6cb3d01SSakthivel K ret = pm80xx_set_sas_protocol_timer_config(pm8001_ha); 1471f5860992SSakthivel K 1472f5860992SSakthivel K /* Check for encryption */ 1473f5860992SSakthivel K if (pm8001_ha->chip->encrypt) { 14741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Checking for encryption\n"); 1475f5860992SSakthivel K ret = pm80xx_get_encrypt_info(pm8001_ha); 1476f5860992SSakthivel K if (ret == -1) { 14771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Encryption error !!\n"); 1478f5860992SSakthivel K if (pm8001_ha->encrypt_info.status == 0x81) { 14791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 14801b5d2793SJoe Perches "Encryption enabled with error.Saving encryption key to flash\n"); 1481f5860992SSakthivel K pm80xx_encrypt_update(pm8001_ha); 1482f5860992SSakthivel K } 1483f5860992SSakthivel K } 1484f5860992SSakthivel K } 1485f5860992SSakthivel K return 0; 1486f5860992SSakthivel K } 1487f5860992SSakthivel K 1488f5860992SSakthivel K static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) 1489f5860992SSakthivel K { 1490f5860992SSakthivel K u32 max_wait_count; 1491f5860992SSakthivel K u32 value; 1492f5860992SSakthivel K u32 gst_len_mpistate; 149395652f98Sakshatzen int ret; 149495652f98Sakshatzen 149595652f98Sakshatzen ret = init_pci_device_addresses(pm8001_ha); 149695652f98Sakshatzen if (ret) { 149795652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 149895652f98Sakshatzen "Failed to init pci addresses"); 149995652f98Sakshatzen return ret; 150095652f98Sakshatzen } 150195652f98Sakshatzen 1502f5860992SSakthivel K /* Write bit1=1 to Inbound DoorBell Register to tell the SPC FW the 1503f5860992SSakthivel K table is stop */ 1504f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_RESET); 1505f5860992SSakthivel K 1506f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1507a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 15086f305bf6SIgor Pylypiv max_wait_count = SPCV_DOORBELL_CLEAR_TIMEOUT; 1509a9a923e5SAnand Kumar Santhanam } else { 15106f305bf6SIgor Pylypiv max_wait_count = SPC_DOORBELL_CLEAR_TIMEOUT; 1511a9a923e5SAnand Kumar Santhanam } 1512f5860992SSakthivel K do { 15136f305bf6SIgor Pylypiv msleep(FW_READY_INTERVAL); 1514f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1515f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_RESET; 1516f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1517f5860992SSakthivel K 1518f5860992SSakthivel K if (!max_wait_count) { 15191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=%x\n", value); 1520f5860992SSakthivel K return -1; 1521f5860992SSakthivel K } 1522f5860992SSakthivel K 1523f5860992SSakthivel K /* check the MPI-State for termination in progress */ 1524f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 15256f305bf6SIgor Pylypiv max_wait_count = 100; /* 2 sec for spcv/ve */ 1526f5860992SSakthivel K do { 15276f305bf6SIgor Pylypiv msleep(FW_READY_INTERVAL); 1528f5860992SSakthivel K gst_len_mpistate = 1529f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1530f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1531f5860992SSakthivel K if (GST_MPI_STATE_UNINIT == 1532f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) 1533f5860992SSakthivel K break; 1534f5860992SSakthivel K } while (--max_wait_count); 1535f5860992SSakthivel K if (!max_wait_count) { 15361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n", 15371b5d2793SJoe Perches gst_len_mpistate & GST_MPI_STATE_MASK); 1538f5860992SSakthivel K return -1; 1539f5860992SSakthivel K } 1540f5860992SSakthivel K 1541f5860992SSakthivel K return 0; 1542f5860992SSakthivel K } 1543f5860992SSakthivel K 1544f5860992SSakthivel K /** 1545bb6beabfSRandy Dunlap * pm80xx_fatal_errors - returns non-zero *ONLY* when fatal errors 1546a961ea0aSakshatzen * @pm8001_ha: our hba card information 1547a961ea0aSakshatzen * 1548a961ea0aSakshatzen * Fatal errors are recoverable only after a host reboot. 1549a961ea0aSakshatzen */ 1550a961ea0aSakshatzen int 1551a961ea0aSakshatzen pm80xx_fatal_errors(struct pm8001_hba_info *pm8001_ha) 1552a961ea0aSakshatzen { 1553a961ea0aSakshatzen int ret = 0; 1554a961ea0aSakshatzen u32 scratch_pad_rsvd0 = pm8001_cr32(pm8001_ha, 0, 1555a961ea0aSakshatzen MSGU_HOST_SCRATCH_PAD_6); 1556a961ea0aSakshatzen u32 scratch_pad_rsvd1 = pm8001_cr32(pm8001_ha, 0, 1557a961ea0aSakshatzen MSGU_HOST_SCRATCH_PAD_7); 1558a961ea0aSakshatzen u32 scratch_pad1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1559a961ea0aSakshatzen u32 scratch_pad2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2); 1560a961ea0aSakshatzen u32 scratch_pad3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 1561a961ea0aSakshatzen 1562a961ea0aSakshatzen if (pm8001_ha->chip_id != chip_8006 && 1563a961ea0aSakshatzen pm8001_ha->chip_id != chip_8074 && 1564a961ea0aSakshatzen pm8001_ha->chip_id != chip_8076) { 1565a961ea0aSakshatzen return 0; 1566a961ea0aSakshatzen } 1567a961ea0aSakshatzen 1568a961ea0aSakshatzen if (MSGU_SCRATCHPAD1_STATE_FATAL_ERROR(scratch_pad1)) { 1569a961ea0aSakshatzen pm8001_dbg(pm8001_ha, FAIL, 1570a961ea0aSakshatzen "Fatal error SCRATCHPAD1 = 0x%x SCRATCHPAD2 = 0x%x SCRATCHPAD3 = 0x%x SCRATCHPAD_RSVD0 = 0x%x SCRATCHPAD_RSVD1 = 0x%x\n", 1571a961ea0aSakshatzen scratch_pad1, scratch_pad2, scratch_pad3, 1572a961ea0aSakshatzen scratch_pad_rsvd0, scratch_pad_rsvd1); 1573a961ea0aSakshatzen ret = 1; 1574a961ea0aSakshatzen } 1575a961ea0aSakshatzen 1576a961ea0aSakshatzen return ret; 1577a961ea0aSakshatzen } 1578a961ea0aSakshatzen 1579a961ea0aSakshatzen /** 1580bb6beabfSRandy Dunlap * pm80xx_chip_soft_rst - soft reset the PM8001 chip, so that all 1581bb6beabfSRandy Dunlap * FW register status are reset to the originated status. 1582f5860992SSakthivel K * @pm8001_ha: our hba card information 1583f5860992SSakthivel K */ 1584f5860992SSakthivel K 1585f5860992SSakthivel K static int 1586f5860992SSakthivel K pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha) 1587f5860992SSakthivel K { 1588f5860992SSakthivel K u32 regval; 1589f5860992SSakthivel K u32 bootloader_state; 159006f12f22SAnand Kumar Santhanam u32 ibutton0, ibutton1; 1591f5860992SSakthivel K 159272349b62SDeepak Ukey /* Process MPI table uninitialization only if FW is ready */ 159372349b62SDeepak Ukey if (!pm8001_ha->controller_fatal_error) { 1594f5860992SSakthivel K /* Check if MPI is in ready state to reset */ 1595f5860992SSakthivel K if (mpi_uninit_check(pm8001_ha) != 0) { 1596d384be6eSVikram Auradkar u32 r0 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 1597d384be6eSVikram Auradkar u32 r1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1598d384be6eSVikram Auradkar u32 r2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2); 1599d384be6eSVikram Auradkar u32 r3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 16001b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 1601d384be6eSVikram Auradkar "MPI state is not ready scratch: %x:%x:%x:%x\n", 16021b5d2793SJoe Perches r0, r1, r2, r3); 1603d384be6eSVikram Auradkar /* if things aren't ready but the bootloader is ok then 1604d384be6eSVikram Auradkar * try the reset anyway. 1605d384be6eSVikram Auradkar */ 1606d384be6eSVikram Auradkar if (r1 & SCRATCH_PAD1_BOOTSTATE_MASK) 1607f5860992SSakthivel K return -1; 1608f5860992SSakthivel K } 160972349b62SDeepak Ukey } 1610f5860992SSakthivel K /* checked for reset register normal state; 0x0 */ 1611f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 16121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "reset register before write : 0x%x\n", 16131b5d2793SJoe Perches regval); 1614f5860992SSakthivel K 1615f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE); 16164daf1ef3SVikram Auradkar msleep(500); 1617f5860992SSakthivel K 1618f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 16191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "reset register after write 0x%x\n", 16201b5d2793SJoe Perches regval); 1621f5860992SSakthivel K 1622f5860992SSakthivel K if ((regval & SPCv_SOFT_RESET_READ_MASK) == 1623f5860992SSakthivel K SPCv_SOFT_RESET_NORMAL_RESET_OCCURED) { 16241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16251b5d2793SJoe Perches " soft reset successful [regval: 0x%x]\n", 16261b5d2793SJoe Perches regval); 1627f5860992SSakthivel K } else { 16281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16291b5d2793SJoe Perches " soft reset failed [regval: 0x%x]\n", 16301b5d2793SJoe Perches regval); 1631f5860992SSakthivel K 1632f5860992SSakthivel K /* check bootloader is successfully executed or in HDA mode */ 1633f5860992SSakthivel K bootloader_state = 1634f5860992SSakthivel K pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) & 1635f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_MASK; 1636f5860992SSakthivel K 1637f5860992SSakthivel K if (bootloader_state == SCRATCH_PAD1_BOOTSTATE_HDA_SEEPROM) { 16381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16391b5d2793SJoe Perches "Bootloader state - HDA mode SEEPROM\n"); 1640f5860992SSakthivel K } else if (bootloader_state == 1641f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_BOOTSTRAP) { 16421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16431b5d2793SJoe Perches "Bootloader state - HDA mode Bootstrap Pin\n"); 1644f5860992SSakthivel K } else if (bootloader_state == 1645f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_SOFTRESET) { 16461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16471b5d2793SJoe Perches "Bootloader state - HDA mode soft reset\n"); 1648f5860992SSakthivel K } else if (bootloader_state == 1649f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_CRIT_ERROR) { 16501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16511b5d2793SJoe Perches "Bootloader state-HDA mode critical error\n"); 1652f5860992SSakthivel K } 1653f5860992SSakthivel K return -EBUSY; 1654f5860992SSakthivel K } 1655f5860992SSakthivel K 1656f5860992SSakthivel K /* check the firmware status after reset */ 1657f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 16581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); 165906f12f22SAnand Kumar Santhanam /* check iButton feature support for motherboard controller */ 166006f12f22SAnand Kumar Santhanam if (pm8001_ha->pdev->subsystem_vendor != 166106f12f22SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2 && 1662faf321b0SBenjamin Rood pm8001_ha->pdev->subsystem_vendor != 1663faf321b0SBenjamin Rood PCI_VENDOR_ID_ATTO && 166406f12f22SAnand Kumar Santhanam pm8001_ha->pdev->subsystem_vendor != 0) { 166506f12f22SAnand Kumar Santhanam ibutton0 = pm8001_cr32(pm8001_ha, 0, 166606f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_6); 166706f12f22SAnand Kumar Santhanam ibutton1 = pm8001_cr32(pm8001_ha, 0, 166806f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_7); 166906f12f22SAnand Kumar Santhanam if (!ibutton0 && !ibutton1) { 16701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 16711b5d2793SJoe Perches "iButton Feature is not Available!!!\n"); 1672f5860992SSakthivel K return -EBUSY; 1673f5860992SSakthivel K } 167406f12f22SAnand Kumar Santhanam if (ibutton0 == 0xdeadbeef && ibutton1 == 0xdeadbeef) { 16751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 16761b5d2793SJoe Perches "CRC Check for iButton Feature Failed!!!\n"); 167706f12f22SAnand Kumar Santhanam return -EBUSY; 167806f12f22SAnand Kumar Santhanam } 167906f12f22SAnand Kumar Santhanam } 168006f12f22SAnand Kumar Santhanam } 16811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SPCv soft reset Complete\n"); 1682f5860992SSakthivel K return 0; 1683f5860992SSakthivel K } 1684f5860992SSakthivel K 1685f5860992SSakthivel K static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha) 1686f5860992SSakthivel K { 1687f5860992SSakthivel K u32 i; 1688f5860992SSakthivel K 16891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "chip reset start\n"); 1690f5860992SSakthivel K 1691f5860992SSakthivel K /* do SPCv chip reset. */ 1692f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11); 16931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n"); 1694f5860992SSakthivel K 1695f5860992SSakthivel K /* Check this ..whether delay is required or no */ 1696f5860992SSakthivel K /* delay 10 usec */ 1697f5860992SSakthivel K udelay(10); 1698f5860992SSakthivel K 1699f5860992SSakthivel K /* wait for 20 msec until the firmware gets reloaded */ 1700f5860992SSakthivel K i = 20; 1701f5860992SSakthivel K do { 1702f5860992SSakthivel K mdelay(1); 1703f5860992SSakthivel K } while ((--i) != 0); 1704f5860992SSakthivel K 17051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n"); 1706f5860992SSakthivel K } 1707f5860992SSakthivel K 1708f5860992SSakthivel K /** 17097cdaf12eSLee Jones * pm80xx_chip_intx_interrupt_enable - enable PM8001 chip interrupt 1710f5860992SSakthivel K * @pm8001_ha: our hba card information 1711f5860992SSakthivel K */ 1712f5860992SSakthivel K static void 1713f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha) 1714f5860992SSakthivel K { 1715f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); 1716f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); 1717f5860992SSakthivel K } 1718f5860992SSakthivel K 1719f5860992SSakthivel K /** 17207cdaf12eSLee Jones * pm80xx_chip_intx_interrupt_disable - disable PM8001 chip interrupt 1721f5860992SSakthivel K * @pm8001_ha: our hba card information 1722f5860992SSakthivel K */ 1723f5860992SSakthivel K static void 1724f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha) 1725f5860992SSakthivel K { 1726f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL); 1727f5860992SSakthivel K } 1728f5860992SSakthivel K 1729f5860992SSakthivel K /** 17307cdaf12eSLee Jones * pm80xx_chip_interrupt_enable - enable PM8001 chip interrupt 1731f5860992SSakthivel K * @pm8001_ha: our hba card information 17326ad4a517SLee Jones * @vec: interrupt number to enable 1733f5860992SSakthivel K */ 1734f5860992SSakthivel K static void 1735f5860992SSakthivel K pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1736f5860992SSakthivel K { 1737f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1738f5860992SSakthivel K u32 mask; 1739f5860992SSakthivel K mask = (u32)(1 << vec); 1740f5860992SSakthivel K 1741f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF)); 1742f5860992SSakthivel K return; 1743f5860992SSakthivel K #endif 1744f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(pm8001_ha); 1745f5860992SSakthivel K 1746f5860992SSakthivel K } 1747f5860992SSakthivel K 1748f5860992SSakthivel K /** 17497cdaf12eSLee Jones * pm80xx_chip_interrupt_disable - disable PM8001 chip interrupt 1750f5860992SSakthivel K * @pm8001_ha: our hba card information 17516ad4a517SLee Jones * @vec: interrupt number to disable 1752f5860992SSakthivel K */ 1753f5860992SSakthivel K static void 1754f5860992SSakthivel K pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1755f5860992SSakthivel K { 1756f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1757f5860992SSakthivel K u32 mask; 1758f5860992SSakthivel K if (vec == 0xFF) 1759f5860992SSakthivel K mask = 0xFFFFFFFF; 1760f5860992SSakthivel K else 1761f5860992SSakthivel K mask = (u32)(1 << vec); 1762f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF)); 1763f5860992SSakthivel K return; 1764f5860992SSakthivel K #endif 1765f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(pm8001_ha); 1766f5860992SSakthivel K } 1767f5860992SSakthivel K 1768c6b9ef57SSakthivel K static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha, 1769c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1770c6b9ef57SSakthivel K { 1771c6b9ef57SSakthivel K int res; 1772c6b9ef57SSakthivel K u32 ccb_tag; 1773c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1774c6b9ef57SSakthivel K struct sas_task *task = NULL; 1775c6b9ef57SSakthivel K struct task_abort_req task_abort; 1776c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1777c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_ABORT; 1778c6b9ef57SSakthivel K int ret; 1779c6b9ef57SSakthivel K 1780c6b9ef57SSakthivel K if (!pm8001_ha_dev) { 17811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "dev is null\n"); 1782c6b9ef57SSakthivel K return; 1783c6b9ef57SSakthivel K } 1784c6b9ef57SSakthivel K 1785c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1786c6b9ef57SSakthivel K 1787c6b9ef57SSakthivel K if (!task) { 17881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task\n"); 1789c6b9ef57SSakthivel K return; 1790c6b9ef57SSakthivel K } 1791c6b9ef57SSakthivel K 1792c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1793c6b9ef57SSakthivel K 1794c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 17955533abcaSTomas Henzl if (res) { 17965533abcaSTomas Henzl sas_free_task(task); 1797c6b9ef57SSakthivel K return; 17985533abcaSTomas Henzl } 1799c6b9ef57SSakthivel K 1800c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1801c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1802c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1803c6b9ef57SSakthivel K ccb->task = task; 1804c6b9ef57SSakthivel K 1805c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1806c6b9ef57SSakthivel K 1807c6b9ef57SSakthivel K memset(&task_abort, 0, sizeof(task_abort)); 1808c6b9ef57SSakthivel K task_abort.abort_all = cpu_to_le32(1); 1809c6b9ef57SSakthivel K task_abort.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1810c6b9ef57SSakthivel K task_abort.tag = cpu_to_le32(ccb_tag); 1811c6b9ef57SSakthivel K 181291a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 181391a43fa6Speter chang sizeof(task_abort), 0); 18141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Executing abort task end\n"); 18155533abcaSTomas Henzl if (ret) { 18165533abcaSTomas Henzl sas_free_task(task); 18175533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18185533abcaSTomas Henzl } 1819c6b9ef57SSakthivel K } 1820c6b9ef57SSakthivel K 1821c6b9ef57SSakthivel K static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha, 1822c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1823c6b9ef57SSakthivel K { 1824c6b9ef57SSakthivel K struct sata_start_req sata_cmd; 1825c6b9ef57SSakthivel K int res; 1826c6b9ef57SSakthivel K u32 ccb_tag; 1827c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1828c6b9ef57SSakthivel K struct sas_task *task = NULL; 1829c6b9ef57SSakthivel K struct host_to_dev_fis fis; 1830c6b9ef57SSakthivel K struct domain_device *dev; 1831c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1832c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 1833c6b9ef57SSakthivel K 1834c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1835c6b9ef57SSakthivel K 1836c6b9ef57SSakthivel K if (!task) { 18371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task !!!\n"); 1838c6b9ef57SSakthivel K return; 1839c6b9ef57SSakthivel K } 1840c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1841c6b9ef57SSakthivel K 1842c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 1843c6b9ef57SSakthivel K if (res) { 18445533abcaSTomas Henzl sas_free_task(task); 18451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate tag !!!\n"); 1846c6b9ef57SSakthivel K return; 1847c6b9ef57SSakthivel K } 1848c6b9ef57SSakthivel K 1849c6b9ef57SSakthivel K /* allocate domain device by ourselves as libsas 1850c6b9ef57SSakthivel K * is not going to provide any 1851c6b9ef57SSakthivel K */ 1852c6b9ef57SSakthivel K dev = kzalloc(sizeof(struct domain_device), GFP_ATOMIC); 1853c6b9ef57SSakthivel K if (!dev) { 18545533abcaSTomas Henzl sas_free_task(task); 18555533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 18571b5d2793SJoe Perches "Domain device cannot be allocated\n"); 1858c6b9ef57SSakthivel K return; 18595533abcaSTomas Henzl } 18605533abcaSTomas Henzl 1861c6b9ef57SSakthivel K task->dev = dev; 1862c6b9ef57SSakthivel K task->dev->lldd_dev = pm8001_ha_dev; 1863c6b9ef57SSakthivel K 1864c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1865c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1866c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1867c6b9ef57SSakthivel K ccb->task = task; 18680b6df110SViswas G ccb->n_elem = 0; 1869c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_READ_LOG_FLAG; 1870c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_2ND_RLE_FLAG; 1871c6b9ef57SSakthivel K 1872c6b9ef57SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 1873c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1874c6b9ef57SSakthivel K 1875c6b9ef57SSakthivel K /* construct read log FIS */ 1876c6b9ef57SSakthivel K memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1877c6b9ef57SSakthivel K fis.fis_type = 0x27; 1878c6b9ef57SSakthivel K fis.flags = 0x80; 1879c6b9ef57SSakthivel K fis.command = ATA_CMD_READ_LOG_EXT; 1880c6b9ef57SSakthivel K fis.lbal = 0x10; 1881c6b9ef57SSakthivel K fis.sector_count = 0x1; 1882c6b9ef57SSakthivel K 1883c6b9ef57SSakthivel K sata_cmd.tag = cpu_to_le32(ccb_tag); 1884c6b9ef57SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1885c6b9ef57SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad |= ((0x1 << 7) | (0x5 << 9)); 1886c6b9ef57SSakthivel K memcpy(&sata_cmd.sata_fis, &fis, sizeof(struct host_to_dev_fis)); 1887c6b9ef57SSakthivel K 188891a43fa6Speter chang res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 188991a43fa6Speter chang sizeof(sata_cmd), 0); 18901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Executing read log end\n"); 18915533abcaSTomas Henzl if (res) { 18925533abcaSTomas Henzl sas_free_task(task); 18935533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18945533abcaSTomas Henzl kfree(dev); 18955533abcaSTomas Henzl } 1896c6b9ef57SSakthivel K } 1897c6b9ef57SSakthivel K 1898f5860992SSakthivel K /** 1899f5860992SSakthivel K * mpi_ssp_completion - process the event that FW response to the SSP request. 1900f5860992SSakthivel K * @pm8001_ha: our hba card information 1901f5860992SSakthivel K * @piomb: the message contents of this outbound message. 1902f5860992SSakthivel K * 1903f5860992SSakthivel K * When FW has completed a ssp request for example a IO request, after it has 1904bb6beabfSRandy Dunlap * filled the SG data with the data, it will trigger this event representing 1905bb6beabfSRandy Dunlap * that he has finished the job; please check the corresponding buffer. 1906f5860992SSakthivel K * So we will tell the caller who maybe waiting the result to tell upper layer 1907f5860992SSakthivel K * that the task has been finished. 1908f5860992SSakthivel K */ 1909f5860992SSakthivel K static void 1910f5860992SSakthivel K mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 1911f5860992SSakthivel K { 1912f5860992SSakthivel K struct sas_task *t; 1913f5860992SSakthivel K struct pm8001_ccb_info *ccb; 1914f5860992SSakthivel K unsigned long flags; 1915f5860992SSakthivel K u32 status; 1916f5860992SSakthivel K u32 param; 1917f5860992SSakthivel K u32 tag; 1918f5860992SSakthivel K struct ssp_completion_resp *psspPayload; 1919f5860992SSakthivel K struct task_status_struct *ts; 1920f5860992SSakthivel K struct ssp_response_iu *iu; 1921f5860992SSakthivel K struct pm8001_device *pm8001_dev; 1922f5860992SSakthivel K psspPayload = (struct ssp_completion_resp *)(piomb + 4); 1923f5860992SSakthivel K status = le32_to_cpu(psspPayload->status); 1924f5860992SSakthivel K tag = le32_to_cpu(psspPayload->tag); 1925f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 1926f5860992SSakthivel K if ((status == IO_ABORTED) && ccb->open_retry) { 1927f5860992SSakthivel K /* Being completed by another */ 1928f5860992SSakthivel K ccb->open_retry = 0; 1929f5860992SSakthivel K return; 1930f5860992SSakthivel K } 1931f5860992SSakthivel K pm8001_dev = ccb->device; 1932f5860992SSakthivel K param = le32_to_cpu(psspPayload->param); 1933f5860992SSakthivel K t = ccb->task; 1934f5860992SSakthivel K 1935f5860992SSakthivel K if (status && status != IO_UNDERFLOW) 19361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status); 1937f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 1938f5860992SSakthivel K return; 1939f5860992SSakthivel K ts = &t->task_status; 19407370672dSpeter chang 19411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 19421b5d2793SJoe Perches "tag::0x%x, status::0x%x task::0x%p\n", tag, status, t); 19437370672dSpeter chang 1944cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 1945cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 1946cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) 19471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n", 19481b5d2793SJoe Perches SAS_ADDR(t->dev->sas_addr)); 1949cb269c26SAnand Kumar Santhanam 1950f5860992SSakthivel K switch (status) { 1951f5860992SSakthivel K case IO_SUCCESS: 19521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS ,param = 0x%x\n", 19531b5d2793SJoe Perches param); 1954f5860992SSakthivel K if (param == 0) { 1955f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1956d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_GOOD; 1957f5860992SSakthivel K } else { 1958f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1959f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 1960f5860992SSakthivel K ts->residual = param; 1961f5860992SSakthivel K iu = &psspPayload->ssp_resp_iu; 1962f5860992SSakthivel K sas_ssp_task_response(pm8001_ha->dev, t, iu); 1963f5860992SSakthivel K } 1964f5860992SSakthivel K if (pm8001_dev) 19654a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1966f5860992SSakthivel K break; 1967f5860992SSakthivel K case IO_ABORTED: 19681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); 1969f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1970f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 19714a2efd4bSViswas G if (pm8001_dev) 19724a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1973f5860992SSakthivel K break; 1974f5860992SSakthivel K case IO_UNDERFLOW: 1975f5860992SSakthivel K /* SSP Completion with error */ 19761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW ,param = 0x%x\n", 19771b5d2793SJoe Perches param); 1978f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1979f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 1980f5860992SSakthivel K ts->residual = param; 1981f5860992SSakthivel K if (pm8001_dev) 19824a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1983f5860992SSakthivel K break; 1984f5860992SSakthivel K case IO_NO_DEVICE: 19851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 1986f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1987f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 19884a2efd4bSViswas G if (pm8001_dev) 19894a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1990f5860992SSakthivel K break; 1991f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 19921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 1993f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1994f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1995f5860992SSakthivel K /* Force the midlayer to retry */ 1996f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 19974a2efd4bSViswas G if (pm8001_dev) 19984a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1999f5860992SSakthivel K break; 2000f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 20011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2002f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2003f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2004f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20054a2efd4bSViswas G if (pm8001_dev) 20064a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2007f5860992SSakthivel K break; 200827ecfa5eSViswas G case IO_XFER_ERROR_INVALID_SSP_RSP_FRAME: 20091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20101b5d2793SJoe Perches "IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n"); 201127ecfa5eSViswas G ts->resp = SAS_TASK_COMPLETE; 201227ecfa5eSViswas G ts->stat = SAS_OPEN_REJECT; 201327ecfa5eSViswas G ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20144a2efd4bSViswas G if (pm8001_dev) 20154a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 201627ecfa5eSViswas G break; 2017f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 20181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20191b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2020f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2021f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2022f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 20234a2efd4bSViswas G if (pm8001_dev) 20244a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2025f5860992SSakthivel K break; 2026f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 20271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20281b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2029f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2030f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2031f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 20324a2efd4bSViswas G if (pm8001_dev) 20334a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2034f5860992SSakthivel K break; 2035f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 20361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2037f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2038f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2039f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20404a2efd4bSViswas G if (pm8001_dev) 20414a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2042f5860992SSakthivel K break; 2043f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2044a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2045a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2046a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2047a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2048a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 20491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2050f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2051f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2052f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2053f5860992SSakthivel K if (!t->uldd_task) 2054f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2055f5860992SSakthivel K pm8001_dev, 2056f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2057f5860992SSakthivel K break; 2058f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 20591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20601b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2061f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2062f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2063f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 20644a2efd4bSViswas G if (pm8001_dev) 20654a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2066f5860992SSakthivel K break; 2067f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 20681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20691b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2070f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2071f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2072f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 20734a2efd4bSViswas G if (pm8001_dev) 20744a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2075f5860992SSakthivel K break; 2076f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 20771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20781b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2079f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2080f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2081f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 20824a2efd4bSViswas G if (pm8001_dev) 20834a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2084f5860992SSakthivel K break; 2085f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 20861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2087f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2088f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2089f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20904a2efd4bSViswas G if (pm8001_dev) 20914a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2092f5860992SSakthivel K break; 2093f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 20941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2095f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2096f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 20974a2efd4bSViswas G if (pm8001_dev) 20984a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2099f5860992SSakthivel K break; 2100f5860992SSakthivel K case IO_XFER_ERROR_DMA: 21011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); 2102f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2103f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21044a2efd4bSViswas G if (pm8001_dev) 21054a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2106f5860992SSakthivel K break; 2107f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 21081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2109f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2110f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2111f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 21124a2efd4bSViswas G if (pm8001_dev) 21134a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2114f5860992SSakthivel K break; 2115f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 21161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2117f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2118f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21194a2efd4bSViswas G if (pm8001_dev) 21204a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2121f5860992SSakthivel K break; 2122f5860992SSakthivel K case IO_PORT_IN_RESET: 21231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 2124f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2125f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21264a2efd4bSViswas G if (pm8001_dev) 21274a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2128f5860992SSakthivel K break; 2129f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 21301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 2131f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2132f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2133f5860992SSakthivel K if (!t->uldd_task) 2134f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2135f5860992SSakthivel K pm8001_dev, 2136f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2137f5860992SSakthivel K break; 2138f5860992SSakthivel K case IO_DS_IN_RECOVERY: 21391b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 2140f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2141f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21424a2efd4bSViswas G if (pm8001_dev) 21434a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2144f5860992SSakthivel K break; 2145f5860992SSakthivel K case IO_TM_TAG_NOT_FOUND: 21461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n"); 2147f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2148f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21494a2efd4bSViswas G if (pm8001_dev) 21504a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2151f5860992SSakthivel K break; 2152f5860992SSakthivel K case IO_SSP_EXT_IU_ZERO_LEN_ERROR: 21531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"); 2154f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2155f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21564a2efd4bSViswas G if (pm8001_dev) 21574a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2158f5860992SSakthivel K break; 2159f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 21601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 21611b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 2162f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2163f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2164f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 21654a2efd4bSViswas G if (pm8001_dev) 21664a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2167f5860992SSakthivel K break; 2168f5860992SSakthivel K default: 21691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); 2170f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2171f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2172f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21734a2efd4bSViswas G if (pm8001_dev) 21744a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2175f5860992SSakthivel K break; 2176f5860992SSakthivel K } 21771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "scsi_status = 0x%x\n ", 21781b5d2793SJoe Perches psspPayload->ssp_resp_iu.status); 2179f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2180f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2181f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2182f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2183f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2184f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 21851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 21861b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 21871b5d2793SJoe Perches t, status, ts->resp, ts->stat); 2188869ddbdcSViswas G if (t->slow_task) 2189869ddbdcSViswas G complete(&t->slow_task->completion); 2190f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2191f5860992SSakthivel K } else { 2192f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2193f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2194f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2195f5860992SSakthivel K t->task_done(t); 2196f5860992SSakthivel K } 2197f5860992SSakthivel K } 2198f5860992SSakthivel K 2199f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2200f5860992SSakthivel K static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 2201f5860992SSakthivel K { 2202f5860992SSakthivel K struct sas_task *t; 2203f5860992SSakthivel K unsigned long flags; 2204f5860992SSakthivel K struct task_status_struct *ts; 2205f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2206f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2207f5860992SSakthivel K struct ssp_event_resp *psspPayload = 2208f5860992SSakthivel K (struct ssp_event_resp *)(piomb + 4); 2209f5860992SSakthivel K u32 event = le32_to_cpu(psspPayload->event); 2210f5860992SSakthivel K u32 tag = le32_to_cpu(psspPayload->tag); 2211f5860992SSakthivel K u32 port_id = le32_to_cpu(psspPayload->port_id); 2212f5860992SSakthivel K 2213f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2214f5860992SSakthivel K t = ccb->task; 2215f5860992SSakthivel K pm8001_dev = ccb->device; 2216f5860992SSakthivel K if (event) 22171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event); 2218f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 2219f5860992SSakthivel K return; 2220f5860992SSakthivel K ts = &t->task_status; 22211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", 22221b5d2793SJoe Perches port_id, tag, event); 2223f5860992SSakthivel K switch (event) { 2224f5860992SSakthivel K case IO_OVERFLOW: 22251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 2226f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2227f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2228f5860992SSakthivel K ts->residual = 0; 2229f5860992SSakthivel K if (pm8001_dev) 22304a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2231f5860992SSakthivel K break; 2232f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 22331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2234f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK); 2235f5860992SSakthivel K return; 2236f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 22371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2238f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2239f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2240f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2241f5860992SSakthivel K break; 2242f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 22431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22441b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2245f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2246f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2247f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2248f5860992SSakthivel K break; 2249f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 22501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22511b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2252f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2253f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2254f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2255f5860992SSakthivel K break; 2256f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 22571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2258f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2259f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2260f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2261f5860992SSakthivel K break; 2262f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2263a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2264a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2265a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2266a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2267a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 22681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2269f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2270f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2271f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2272f5860992SSakthivel K if (!t->uldd_task) 2273f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2274f5860992SSakthivel K pm8001_dev, 2275f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2276f5860992SSakthivel K break; 2277f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 22781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22791b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2280f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2281f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2282f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2283f5860992SSakthivel K break; 2284f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 22851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22861b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2287f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2288f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2289f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2290f5860992SSakthivel K break; 2291f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 22921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22931b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2294f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2295f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2296f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2297f5860992SSakthivel K break; 2298f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 22991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2300f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2301f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2302f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2303f5860992SSakthivel K break; 2304f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 23051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2306f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2307f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2308f5860992SSakthivel K break; 2309f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 23101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2311f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT); 2312f5860992SSakthivel K return; 2313f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 23141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); 2315f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2316f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2317f5860992SSakthivel K break; 2318f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 23191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); 2320f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2321f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2322f5860992SSakthivel K break; 2323f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 23241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 23251b5d2793SJoe Perches "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); 2326f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2327f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2328f5860992SSakthivel K break; 2329f5860992SSakthivel K case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT: 23301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 23311b5d2793SJoe Perches "IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n"); 2332f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2333f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2334f5860992SSakthivel K break; 2335f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 23361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2337f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2338f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2339f5860992SSakthivel K break; 2340f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 23411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 23421b5d2793SJoe Perches "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); 2343f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2344f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2345f5860992SSakthivel K break; 2346a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 23471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, 23481b5d2793SJoe Perches "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"); 2349a6cb3d01SSakthivel K /* TBC: used default set values */ 2350a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2351a6cb3d01SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2352a6cb3d01SSakthivel K break; 2353f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 23541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); 2355f5860992SSakthivel K return; 2356f5860992SSakthivel K default: 23571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event); 2358f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2359f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2360f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2361f5860992SSakthivel K break; 2362f5860992SSakthivel K } 2363f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2364f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2365f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2366f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2367f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2368f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 23691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 23701b5d2793SJoe Perches "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 23711b5d2793SJoe Perches t, event, ts->resp, ts->stat); 2372f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2373f5860992SSakthivel K } else { 2374f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2375f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2376f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2377f5860992SSakthivel K t->task_done(t); 2378f5860992SSakthivel K } 2379f5860992SSakthivel K } 2380f5860992SSakthivel K 2381f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2382f5860992SSakthivel K static void 2383b27a4053SAjish Koshy mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, 2384b27a4053SAjish Koshy struct outbound_queue_table *circularQ, void *piomb) 2385f5860992SSakthivel K { 2386f5860992SSakthivel K struct sas_task *t; 2387f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2388f5860992SSakthivel K u32 param; 2389f5860992SSakthivel K u32 status; 2390f5860992SSakthivel K u32 tag; 2391cb269c26SAnand Kumar Santhanam int i, j; 2392cb269c26SAnand Kumar Santhanam u8 sata_addr_low[4]; 2393cb269c26SAnand Kumar Santhanam u32 temp_sata_addr_low, temp_sata_addr_hi; 2394cb269c26SAnand Kumar Santhanam u8 sata_addr_hi[4]; 2395f5860992SSakthivel K struct sata_completion_resp *psataPayload; 2396f5860992SSakthivel K struct task_status_struct *ts; 2397f5860992SSakthivel K struct ata_task_resp *resp ; 2398f5860992SSakthivel K u32 *sata_resp; 2399f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2400c6b9ef57SSakthivel K unsigned long flags; 2401f5860992SSakthivel K 2402f5860992SSakthivel K psataPayload = (struct sata_completion_resp *)(piomb + 4); 2403f5860992SSakthivel K status = le32_to_cpu(psataPayload->status); 240460de1a67SIgor Pylypiv param = le32_to_cpu(psataPayload->param); 2405f5860992SSakthivel K tag = le32_to_cpu(psataPayload->tag); 2406f5860992SSakthivel K 2407c6b9ef57SSakthivel K if (!tag) { 24081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "tag null\n"); 2409c6b9ef57SSakthivel K return; 2410c6b9ef57SSakthivel K } 241160de1a67SIgor Pylypiv 2412f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2413f5860992SSakthivel K t = ccb->task; 2414f5860992SSakthivel K pm8001_dev = ccb->device; 2415c6b9ef57SSakthivel K 2416c6b9ef57SSakthivel K if (t) { 2417c6b9ef57SSakthivel K if (t->dev && (t->dev->lldd_dev)) 2418c6b9ef57SSakthivel K pm8001_dev = t->dev->lldd_dev; 2419c6b9ef57SSakthivel K } else { 24201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task null\n"); 2421c6b9ef57SSakthivel K return; 2422c6b9ef57SSakthivel K } 2423c6b9ef57SSakthivel K 2424c6b9ef57SSakthivel K if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG)) 2425c6b9ef57SSakthivel K && unlikely(!t || !t->lldd_task || !t->dev)) { 24261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); 2427c6b9ef57SSakthivel K return; 2428c6b9ef57SSakthivel K } 2429c6b9ef57SSakthivel K 2430c6b9ef57SSakthivel K ts = &t->task_status; 24317370672dSpeter chang 24324f608fbcSVishakha Channapattan if (status != IO_SUCCESS) { 24334f608fbcSVishakha Channapattan pm8001_dbg(pm8001_ha, FAIL, 24344f608fbcSVishakha Channapattan "IO failed device_id %u status 0x%x tag %d\n", 24354f608fbcSVishakha Channapattan pm8001_dev->device_id, status, tag); 24364f608fbcSVishakha Channapattan } 24377370672dSpeter chang 2438cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 2439cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 2440cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) { 2441cb269c26SAnand Kumar Santhanam if (!((t->dev->parent) && 2442924a3541SJohn Garry (dev_is_expander(t->dev->parent->dev_type)))) { 2443cb269c26SAnand Kumar Santhanam for (i = 0, j = 4; i <= 3 && j <= 7; i++, j++) 2444cb269c26SAnand Kumar Santhanam sata_addr_low[i] = pm8001_ha->sas_addr[j]; 2445cb269c26SAnand Kumar Santhanam for (i = 0, j = 0; i <= 3 && j <= 3; i++, j++) 2446cb269c26SAnand Kumar Santhanam sata_addr_hi[i] = pm8001_ha->sas_addr[j]; 2447cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_low, sata_addr_low, 2448cb269c26SAnand Kumar Santhanam sizeof(sata_addr_low)); 2449cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_hi, sata_addr_hi, 2450cb269c26SAnand Kumar Santhanam sizeof(sata_addr_hi)); 2451cb269c26SAnand Kumar Santhanam temp_sata_addr_hi = (((temp_sata_addr_hi >> 24) & 0xff) 2452cb269c26SAnand Kumar Santhanam |((temp_sata_addr_hi << 8) & 2453cb269c26SAnand Kumar Santhanam 0xff0000) | 2454cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi >> 8) 2455cb269c26SAnand Kumar Santhanam & 0xff00) | 2456cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi << 24) & 2457cb269c26SAnand Kumar Santhanam 0xff000000)); 2458cb269c26SAnand Kumar Santhanam temp_sata_addr_low = ((((temp_sata_addr_low >> 24) 2459cb269c26SAnand Kumar Santhanam & 0xff) | 2460cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 8) 2461cb269c26SAnand Kumar Santhanam & 0xff0000) | 2462cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low >> 8) 2463cb269c26SAnand Kumar Santhanam & 0xff00) | 2464cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 24) 2465cb269c26SAnand Kumar Santhanam & 0xff000000)) + 2466cb269c26SAnand Kumar Santhanam pm8001_dev->attached_phy + 2467cb269c26SAnand Kumar Santhanam 0x10); 24681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 24691b5d2793SJoe Perches "SAS Address of IO Failure Drive:%08x%08x\n", 24701b5d2793SJoe Perches temp_sata_addr_hi, 24711b5d2793SJoe Perches temp_sata_addr_low); 2472f5860992SSakthivel K 2473cb269c26SAnand Kumar Santhanam } else { 24741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 24751b5d2793SJoe Perches "SAS Address of IO Failure Drive:%016llx\n", 24761b5d2793SJoe Perches SAS_ADDR(t->dev->sas_addr)); 2477cb269c26SAnand Kumar Santhanam } 2478cb269c26SAnand Kumar Santhanam } 2479f5860992SSakthivel K switch (status) { 2480f5860992SSakthivel K case IO_SUCCESS: 24811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); 2482f5860992SSakthivel K if (param == 0) { 2483f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2484d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_GOOD; 2485c6b9ef57SSakthivel K /* check if response is for SEND READ LOG */ 2486c6b9ef57SSakthivel K if (pm8001_dev && 2487c6b9ef57SSakthivel K (pm8001_dev->id & NCQ_READ_LOG_FLAG)) { 2488c6b9ef57SSakthivel K /* set new bit for abort_all */ 2489c6b9ef57SSakthivel K pm8001_dev->id |= NCQ_ABORT_ALL_FLAG; 2490c6b9ef57SSakthivel K /* clear bit for read log */ 2491c6b9ef57SSakthivel K pm8001_dev->id = pm8001_dev->id & 0x7FFFFFFF; 2492c6b9ef57SSakthivel K pm80xx_send_abort_all(pm8001_ha, pm8001_dev); 2493c6b9ef57SSakthivel K /* Free the tag */ 2494c6b9ef57SSakthivel K pm8001_tag_free(pm8001_ha, tag); 2495c6b9ef57SSakthivel K sas_free_task(t); 2496c6b9ef57SSakthivel K return; 2497c6b9ef57SSakthivel K } 2498f5860992SSakthivel K } else { 2499f5860992SSakthivel K u8 len; 2500f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2501f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 2502f5860992SSakthivel K ts->residual = param; 25031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25041b5d2793SJoe Perches "SAS_PROTO_RESPONSE len = %d\n", 25051b5d2793SJoe Perches param); 2506f5860992SSakthivel K sata_resp = &psataPayload->sata_resp[0]; 2507f5860992SSakthivel K resp = (struct ata_task_resp *)ts->buf; 2508f5860992SSakthivel K if (t->ata_task.dma_xfer == 0 && 2509f73bdebdSChristoph Hellwig t->data_dir == DMA_FROM_DEVICE) { 2510f5860992SSakthivel K len = sizeof(struct pio_setup_fis); 25111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25121b5d2793SJoe Perches "PIO read len = %d\n", len); 2513f5860992SSakthivel K } else if (t->ata_task.use_ncq) { 2514f5860992SSakthivel K len = sizeof(struct set_dev_bits_fis); 25151b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n", 25161b5d2793SJoe Perches len); 2517f5860992SSakthivel K } else { 2518f5860992SSakthivel K len = sizeof(struct dev_to_host_fis); 25191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "other len = %d\n", 25201b5d2793SJoe Perches len); 2521f5860992SSakthivel K } 2522f5860992SSakthivel K if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) { 2523f5860992SSakthivel K resp->frame_len = len; 2524f5860992SSakthivel K memcpy(&resp->ending_fis[0], sata_resp, len); 2525f5860992SSakthivel K ts->buf_valid_size = sizeof(*resp); 2526f5860992SSakthivel K } else 25271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25281b5d2793SJoe Perches "response too large\n"); 2529f5860992SSakthivel K } 2530f5860992SSakthivel K if (pm8001_dev) 25314a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2532f5860992SSakthivel K break; 2533f5860992SSakthivel K case IO_ABORTED: 25341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); 2535f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2536f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2537f5860992SSakthivel K if (pm8001_dev) 25384a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2539f5860992SSakthivel K break; 2540f5860992SSakthivel K /* following cases are to do cases */ 2541f5860992SSakthivel K case IO_UNDERFLOW: 2542f5860992SSakthivel K /* SATA Completion with error */ 25431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param); 2544f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2545f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2546f5860992SSakthivel K ts->residual = param; 2547f5860992SSakthivel K if (pm8001_dev) 25484a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2549f5860992SSakthivel K break; 2550f5860992SSakthivel K case IO_NO_DEVICE: 25511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 2552f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2553f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 25544a2efd4bSViswas G if (pm8001_dev) 25554a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2556f5860992SSakthivel K break; 2557f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 25581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2559f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2560f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 25614a2efd4bSViswas G if (pm8001_dev) 25624a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2563f5860992SSakthivel K break; 2564f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 25651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2566f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2567f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2568f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 25694a2efd4bSViswas G if (pm8001_dev) 25704a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2571f5860992SSakthivel K break; 2572f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 25731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25741b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2575f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2576f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2577f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 25784a2efd4bSViswas G if (pm8001_dev) 25794a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2580f5860992SSakthivel K break; 2581f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 25821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25831b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2584f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2585f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2586f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 25874a2efd4bSViswas G if (pm8001_dev) 25884a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2589f5860992SSakthivel K break; 2590f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 25911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2592f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2593f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2594f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 25954a2efd4bSViswas G if (pm8001_dev) 25964a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2597f5860992SSakthivel K break; 2598f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2599a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2600a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2601a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2602a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2603a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 26041b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2605f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2606f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2607f5860992SSakthivel K if (!t->uldd_task) { 2608f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2609f5860992SSakthivel K pm8001_dev, 2610f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2611f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2612f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2613b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2614b27a4053SAjish Koshy circularQ->lock_flags); 26152b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2616b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2617b27a4053SAjish Koshy circularQ->lock_flags); 2618f5860992SSakthivel K return; 2619f5860992SSakthivel K } 2620f5860992SSakthivel K break; 2621f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 26221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26231b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2624f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2625f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2626f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2627f5860992SSakthivel K if (!t->uldd_task) { 2628f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2629f5860992SSakthivel K pm8001_dev, 2630f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2631f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2632f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2633b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2634b27a4053SAjish Koshy circularQ->lock_flags); 26352b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2636b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2637b27a4053SAjish Koshy circularQ->lock_flags); 2638f5860992SSakthivel K return; 2639f5860992SSakthivel K } 2640f5860992SSakthivel K break; 2641f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 26421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26431b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2644f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2645f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2646f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 26474a2efd4bSViswas G if (pm8001_dev) 26484a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2649f5860992SSakthivel K break; 2650f5860992SSakthivel K case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY: 26511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26521b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n"); 2653f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2654f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2655f5860992SSakthivel K if (!t->uldd_task) { 2656f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2657f5860992SSakthivel K pm8001_dev, 2658f5860992SSakthivel K IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY); 2659f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2660f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2661b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2662b27a4053SAjish Koshy circularQ->lock_flags); 26632b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2664b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2665b27a4053SAjish Koshy circularQ->lock_flags); 2666f5860992SSakthivel K return; 2667f5860992SSakthivel K } 2668f5860992SSakthivel K break; 2669f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 26701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26711b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2672f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2673f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2674f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 26754a2efd4bSViswas G if (pm8001_dev) 26764a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2677f5860992SSakthivel K break; 2678f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 26791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2680f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2681f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 26824a2efd4bSViswas G if (pm8001_dev) 26834a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2684f5860992SSakthivel K break; 2685f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 26861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2687f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2688f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 26894a2efd4bSViswas G if (pm8001_dev) 26904a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2691f5860992SSakthivel K break; 2692f5860992SSakthivel K case IO_XFER_ERROR_DMA: 26931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); 2694f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2695f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 26964a2efd4bSViswas G if (pm8001_dev) 26974a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2698f5860992SSakthivel K break; 2699f5860992SSakthivel K case IO_XFER_ERROR_SATA_LINK_TIMEOUT: 27001b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"); 2701f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2702f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27034a2efd4bSViswas G if (pm8001_dev) 27044a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2705f5860992SSakthivel K break; 2706f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 27071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); 2708f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2709f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 27104a2efd4bSViswas G if (pm8001_dev) 27114a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2712f5860992SSakthivel K break; 2713f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 27141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2715f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2716f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 27174a2efd4bSViswas G if (pm8001_dev) 27184a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2719f5860992SSakthivel K break; 2720f5860992SSakthivel K case IO_PORT_IN_RESET: 27211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 2722f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2723f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27244a2efd4bSViswas G if (pm8001_dev) 27254a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2726f5860992SSakthivel K break; 2727f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 27281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 2729f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2730f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2731f5860992SSakthivel K if (!t->uldd_task) { 2732f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2733f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2734f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2735f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2736b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2737b27a4053SAjish Koshy circularQ->lock_flags); 27382b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2739b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2740b27a4053SAjish Koshy circularQ->lock_flags); 2741f5860992SSakthivel K return; 2742f5860992SSakthivel K } 2743f5860992SSakthivel K break; 2744f5860992SSakthivel K case IO_DS_IN_RECOVERY: 27451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 2746f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2747f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27484a2efd4bSViswas G if (pm8001_dev) 27494a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2750f5860992SSakthivel K break; 2751f5860992SSakthivel K case IO_DS_IN_ERROR: 27521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n"); 2753f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2754f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2755f5860992SSakthivel K if (!t->uldd_task) { 2756f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2757f5860992SSakthivel K IO_DS_IN_ERROR); 2758f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2759f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2760b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2761b27a4053SAjish Koshy circularQ->lock_flags); 27622b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2763b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2764b27a4053SAjish Koshy circularQ->lock_flags); 2765f5860992SSakthivel K return; 2766f5860992SSakthivel K } 2767f5860992SSakthivel K break; 2768f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 27691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 27701b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 2771f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2772f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2773f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 27744a2efd4bSViswas G if (pm8001_dev) 27754a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 277650acde8eSJohannes Thumshirn break; 2777f5860992SSakthivel K default: 27784f608fbcSVishakha Channapattan pm8001_dbg(pm8001_ha, DEVIO, 27794f608fbcSVishakha Channapattan "Unknown status device_id %u status 0x%x tag %d\n", 27804f608fbcSVishakha Channapattan pm8001_dev->device_id, status, tag); 2781f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2782f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2783f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27844a2efd4bSViswas G if (pm8001_dev) 27854a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2786f5860992SSakthivel K break; 2787f5860992SSakthivel K } 2788f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2789f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2790f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2791f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2792f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2793f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 27941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 27951b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 27961b5d2793SJoe Perches t, status, ts->resp, ts->stat); 2797ce21c63eSpeter chang if (t->slow_task) 2798ce21c63eSpeter chang complete(&t->slow_task->completion); 2799f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 28002b01d816SSuresh Thiagarajan } else { 2801f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2802b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2803b27a4053SAjish Koshy circularQ->lock_flags); 28042b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2805b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2806b27a4053SAjish Koshy circularQ->lock_flags); 2807f5860992SSakthivel K } 2808f5860992SSakthivel K } 2809f5860992SSakthivel K 2810f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2811b27a4053SAjish Koshy static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha, 2812b27a4053SAjish Koshy struct outbound_queue_table *circularQ, void *piomb) 2813f5860992SSakthivel K { 2814f5860992SSakthivel K struct sas_task *t; 2815f5860992SSakthivel K struct task_status_struct *ts; 2816f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2817f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2818f5860992SSakthivel K struct sata_event_resp *psataPayload = 2819f5860992SSakthivel K (struct sata_event_resp *)(piomb + 4); 2820f5860992SSakthivel K u32 event = le32_to_cpu(psataPayload->event); 2821f5860992SSakthivel K u32 tag = le32_to_cpu(psataPayload->tag); 2822f5860992SSakthivel K u32 port_id = le32_to_cpu(psataPayload->port_id); 2823c6b9ef57SSakthivel K u32 dev_id = le32_to_cpu(psataPayload->device_id); 2824c6b9ef57SSakthivel K unsigned long flags; 2825f5860992SSakthivel K 2826f5860992SSakthivel K if (event) 28271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event); 2828c6b9ef57SSakthivel K 2829c6b9ef57SSakthivel K /* Check if this is NCQ error */ 2830c6b9ef57SSakthivel K if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) { 2831c6b9ef57SSakthivel K /* find device using device id */ 2832c6b9ef57SSakthivel K pm8001_dev = pm8001_find_dev(pm8001_ha, dev_id); 2833c6b9ef57SSakthivel K /* send read log extension */ 2834c6b9ef57SSakthivel K if (pm8001_dev) 2835c6b9ef57SSakthivel K pm80xx_send_read_log(pm8001_ha, pm8001_dev); 2836f5860992SSakthivel K return; 2837c6b9ef57SSakthivel K } 2838c6b9ef57SSakthivel K 283960de1a67SIgor Pylypiv ccb = &pm8001_ha->ccb_info[tag]; 284060de1a67SIgor Pylypiv t = ccb->task; 284160de1a67SIgor Pylypiv pm8001_dev = ccb->device; 284260de1a67SIgor Pylypiv 2843c6b9ef57SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) { 28441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); 2845c6b9ef57SSakthivel K return; 2846c6b9ef57SSakthivel K } 2847c6b9ef57SSakthivel K 2848f5860992SSakthivel K ts = &t->task_status; 28491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", 28501b5d2793SJoe Perches port_id, tag, event); 2851f5860992SSakthivel K switch (event) { 2852f5860992SSakthivel K case IO_OVERFLOW: 28531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 2854f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2855f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2856f5860992SSakthivel K ts->residual = 0; 2857f5860992SSakthivel K if (pm8001_dev) 28584a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2859f5860992SSakthivel K break; 2860f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 28611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2862f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2863f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2864f5860992SSakthivel K break; 2865f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 28661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2867f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2868f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2869f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2870f5860992SSakthivel K break; 2871f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 28721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28731b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2874f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2875f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2876f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2877f5860992SSakthivel K break; 2878f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 28791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28801b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2881f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2882f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2883f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2884f5860992SSakthivel K break; 2885f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 28861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2887f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2888f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2889f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2890f5860992SSakthivel K break; 2891f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2892a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2893a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2894a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2895a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2896a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 28971b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 28981b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2899f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2900f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2901f5860992SSakthivel K if (!t->uldd_task) { 2902f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2903f5860992SSakthivel K pm8001_dev, 2904f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2905f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2906f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2907b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2908b27a4053SAjish Koshy circularQ->lock_flags); 29092b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2910b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2911b27a4053SAjish Koshy circularQ->lock_flags); 2912f5860992SSakthivel K return; 2913f5860992SSakthivel K } 2914f5860992SSakthivel K break; 2915f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 29161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29171b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2918f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2919f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2920f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2921f5860992SSakthivel K break; 2922f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 29231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29241b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2925f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2926f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2927f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2928f5860992SSakthivel K break; 2929f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 29301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29311b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2932f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2933f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2934f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2935f5860992SSakthivel K break; 2936f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 29371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2938f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2939f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2940f5860992SSakthivel K break; 2941f5860992SSakthivel K case IO_XFER_ERROR_PEER_ABORTED: 29421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n"); 2943f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2944f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2945f5860992SSakthivel K break; 2946f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 29471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); 2948f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2949f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2950f5860992SSakthivel K break; 2951f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 29521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2953f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2954f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2955f5860992SSakthivel K break; 2956f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 29571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); 2958f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2959f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2960f5860992SSakthivel K break; 2961f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 29621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); 2963f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2964f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2965f5860992SSakthivel K break; 2966f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 29671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29681b5d2793SJoe Perches "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); 2969f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2970f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2971f5860992SSakthivel K break; 2972f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 29731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2974f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2975f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2976f5860992SSakthivel K break; 2977f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 29781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29791b5d2793SJoe Perches "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); 2980f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2981f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2982f5860992SSakthivel K break; 2983f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 29841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); 2985f5860992SSakthivel K break; 2986f5860992SSakthivel K case IO_XFER_PIO_SETUP_ERROR: 29871b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n"); 2988f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2989f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2990f5860992SSakthivel K break; 2991a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 29921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 29931b5d2793SJoe Perches "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"); 2994a6cb3d01SSakthivel K /* TBC: used default set values */ 2995a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2996a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2997a6cb3d01SSakthivel K break; 2998a6cb3d01SSakthivel K case IO_XFER_DMA_ACTIVATE_TIMEOUT: 29991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "IO_XFR_DMA_ACTIVATE_TIMEOUT\n"); 3000a6cb3d01SSakthivel K /* TBC: used default set values */ 3001a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3002a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 3003a6cb3d01SSakthivel K break; 3004f5860992SSakthivel K default: 30051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "Unknown status 0x%x\n", event); 3006f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 3007f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3008f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 3009f5860992SSakthivel K break; 3010f5860992SSakthivel K } 3011f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 3012f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 3013f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 3014f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 3015f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 3016f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 30171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 30181b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 30191b5d2793SJoe Perches t, event, ts->resp, ts->stat); 3020f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 30212b01d816SSuresh Thiagarajan } else { 3022f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 3023b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 3024b27a4053SAjish Koshy circularQ->lock_flags); 30252b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 3026b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 3027b27a4053SAjish Koshy circularQ->lock_flags); 3028f5860992SSakthivel K } 3029f5860992SSakthivel K } 3030f5860992SSakthivel K 3031f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 3032f5860992SSakthivel K static void 3033f5860992SSakthivel K mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 3034f5860992SSakthivel K { 3035f5860992SSakthivel K u32 param, i; 3036f5860992SSakthivel K struct sas_task *t; 3037f5860992SSakthivel K struct pm8001_ccb_info *ccb; 3038f5860992SSakthivel K unsigned long flags; 3039f5860992SSakthivel K u32 status; 3040f5860992SSakthivel K u32 tag; 3041f5860992SSakthivel K struct smp_completion_resp *psmpPayload; 3042f5860992SSakthivel K struct task_status_struct *ts; 3043f5860992SSakthivel K struct pm8001_device *pm8001_dev; 3044f5860992SSakthivel K char *pdma_respaddr = NULL; 3045f5860992SSakthivel K 3046f5860992SSakthivel K psmpPayload = (struct smp_completion_resp *)(piomb + 4); 3047f5860992SSakthivel K status = le32_to_cpu(psmpPayload->status); 3048f5860992SSakthivel K tag = le32_to_cpu(psmpPayload->tag); 3049f5860992SSakthivel K 3050f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 3051f5860992SSakthivel K param = le32_to_cpu(psmpPayload->param); 3052f5860992SSakthivel K t = ccb->task; 3053f5860992SSakthivel K ts = &t->task_status; 3054f5860992SSakthivel K pm8001_dev = ccb->device; 3055f5860992SSakthivel K if (status) 30561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status); 3057f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 3058f5860992SSakthivel K return; 3059f5860992SSakthivel K 30601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, "tag::0x%x status::0x%x\n", tag, status); 30617370672dSpeter chang 3062f5860992SSakthivel K switch (status) { 3063f5860992SSakthivel K 3064f5860992SSakthivel K case IO_SUCCESS: 30651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); 3066f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3067d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_GOOD; 3068f5860992SSakthivel K if (pm8001_dev) 30694a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3070f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 30711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30721b5d2793SJoe Perches "DIRECT RESPONSE Length:%d\n", 30731b5d2793SJoe Perches param); 3074f5860992SSakthivel K pdma_respaddr = (char *)(phys_to_virt(cpu_to_le64 3075f5860992SSakthivel K ((u64)sg_dma_address 3076f5860992SSakthivel K (&t->smp_task.smp_resp)))); 3077f5860992SSakthivel K for (i = 0; i < param; i++) { 3078f5860992SSakthivel K *(pdma_respaddr+i) = psmpPayload->_r_a[i]; 30791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3080f5860992SSakthivel K "SMP Byte%d DMA data 0x%x psmp 0x%x\n", 3081f5860992SSakthivel K i, *(pdma_respaddr + i), 30821b5d2793SJoe Perches psmpPayload->_r_a[i]); 3083f5860992SSakthivel K } 3084f5860992SSakthivel K } 3085f5860992SSakthivel K break; 3086f5860992SSakthivel K case IO_ABORTED: 30871b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n"); 3088f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3089f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 3090f5860992SSakthivel K if (pm8001_dev) 30914a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3092f5860992SSakthivel K break; 3093f5860992SSakthivel K case IO_OVERFLOW: 30941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 3095f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3096f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 3097f5860992SSakthivel K ts->residual = 0; 3098f5860992SSakthivel K if (pm8001_dev) 30994a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3100f5860992SSakthivel K break; 3101f5860992SSakthivel K case IO_NO_DEVICE: 31021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 3103f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3104f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 3105f5860992SSakthivel K break; 3106f5860992SSakthivel K case IO_ERROR_HW_TIMEOUT: 31071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n"); 3108f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3109d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_BUSY; 3110f5860992SSakthivel K break; 3111f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 31121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 3113f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3114d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_BUSY; 3115f5860992SSakthivel K break; 3116f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 31171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 3118f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3119d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_BUSY; 3120f5860992SSakthivel K break; 3121f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 31221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31231b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 3124f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3125f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3126f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3127f5860992SSakthivel K break; 3128f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 31291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31301b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 3131f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3132f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3133f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3134f5860992SSakthivel K break; 3135f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 31361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 3137f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3138f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3139f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 3140f5860992SSakthivel K break; 3141f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 3142a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 3143a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 3144a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 3145a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 3146a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 31471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 3148f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3149f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3150f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3151f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 3152f5860992SSakthivel K pm8001_dev, 3153f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 3154f5860992SSakthivel K break; 3155f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 31561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31571b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 3158f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3159f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3160f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 3161f5860992SSakthivel K break; 3162f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 31631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31641b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 3165f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3166f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3167f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 3168f5860992SSakthivel K break; 3169f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 31701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31711b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 3172f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3173f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3174f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 3175f5860992SSakthivel K break; 3176f5860992SSakthivel K case IO_XFER_ERROR_RX_FRAME: 31771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n"); 3178f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3179f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3180f5860992SSakthivel K break; 3181f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 31821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 3183f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3184f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3185f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3186f5860992SSakthivel K break; 3187f5860992SSakthivel K case IO_ERROR_INTERNAL_SMP_RESOURCE: 31881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n"); 3189f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3190f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 3191f5860992SSakthivel K break; 3192f5860992SSakthivel K case IO_PORT_IN_RESET: 31931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 3194f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3195f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3196f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3197f5860992SSakthivel K break; 3198f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 31991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 3200f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3201f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3202f5860992SSakthivel K break; 3203f5860992SSakthivel K case IO_DS_IN_RECOVERY: 32041b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 3205f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3206f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3207f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3208f5860992SSakthivel K break; 3209f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 32101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 32111b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 3212f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3213f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3214f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3215f5860992SSakthivel K break; 3216f5860992SSakthivel K default: 32171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); 3218f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3219f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3220f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 3221f5860992SSakthivel K break; 3222f5860992SSakthivel K } 3223f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 3224f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 3225f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 3226f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 3227f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 3228f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 32291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 32301b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%xstat 0x%x but aborted by upper layer!\n", 32311b5d2793SJoe Perches t, status, ts->resp, ts->stat); 3232f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3233f5860992SSakthivel K } else { 3234f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 3235f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3236f5860992SSakthivel K mb();/* in order to force CPU ordering */ 3237f5860992SSakthivel K t->task_done(t); 3238f5860992SSakthivel K } 3239f5860992SSakthivel K } 3240f5860992SSakthivel K 3241f5860992SSakthivel K /** 3242bb6beabfSRandy Dunlap * pm80xx_hw_event_ack_req- For PM8001, some events need to acknowledge to FW. 3243f5860992SSakthivel K * @pm8001_ha: our hba card information 3244f5860992SSakthivel K * @Qnum: the outbound queue message number. 3245f5860992SSakthivel K * @SEA: source of event to ack 3246f5860992SSakthivel K * @port_id: port id. 3247f5860992SSakthivel K * @phyId: phy id. 3248f5860992SSakthivel K * @param0: parameter 0. 3249f5860992SSakthivel K * @param1: parameter 1. 3250f5860992SSakthivel K */ 3251f5860992SSakthivel K static void pm80xx_hw_event_ack_req(struct pm8001_hba_info *pm8001_ha, 3252f5860992SSakthivel K u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, u32 param1) 3253f5860992SSakthivel K { 3254f5860992SSakthivel K struct hw_event_ack_req payload; 3255f5860992SSakthivel K u32 opc = OPC_INB_SAS_HW_EVENT_ACK; 3256f5860992SSakthivel K 3257f5860992SSakthivel K struct inbound_queue_table *circularQ; 3258f5860992SSakthivel K 3259f5860992SSakthivel K memset((u8 *)&payload, 0, sizeof(payload)); 3260f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[Qnum]; 3261f5860992SSakthivel K payload.tag = cpu_to_le32(1); 3262f5860992SSakthivel K payload.phyid_sea_portid = cpu_to_le32(((SEA & 0xFFFF) << 8) | 3263f5860992SSakthivel K ((phyId & 0xFF) << 24) | (port_id & 0xFF)); 3264f5860992SSakthivel K payload.param0 = cpu_to_le32(param0); 3265f5860992SSakthivel K payload.param1 = cpu_to_le32(param1); 326691a43fa6Speter chang pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 326791a43fa6Speter chang sizeof(payload), 0); 3268f5860992SSakthivel K } 3269f5860992SSakthivel K 3270f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 3271f5860992SSakthivel K u32 phyId, u32 phy_op); 3272f5860992SSakthivel K 32738414cd80SViswas G static void hw_event_port_recover(struct pm8001_hba_info *pm8001_ha, 32748414cd80SViswas G void *piomb) 32758414cd80SViswas G { 32768414cd80SViswas G struct hw_event_resp *pPayload = (struct hw_event_resp *)(piomb + 4); 32778414cd80SViswas G u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 32788414cd80SViswas G u8 phy_id = (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 32798414cd80SViswas G u32 lr_status_evt_portid = 32808414cd80SViswas G le32_to_cpu(pPayload->lr_status_evt_portid); 32818414cd80SViswas G u8 deviceType = pPayload->sas_identify.dev_type; 32828414cd80SViswas G u8 link_rate = (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 32838414cd80SViswas G struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 32848414cd80SViswas G u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 32858414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 32868414cd80SViswas G 32878414cd80SViswas G if (deviceType == SAS_END_DEVICE) { 32888414cd80SViswas G pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 32898414cd80SViswas G PHY_NOTIFY_ENABLE_SPINUP); 32908414cd80SViswas G } 32918414cd80SViswas G 32928414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 32938414cd80SViswas G pm8001_get_lrate_mode(phy, link_rate); 32948414cd80SViswas G phy->sas_phy.oob_mode = SAS_OOB_MODE; 32958414cd80SViswas G phy->phy_state = PHY_STATE_LINK_UP_SPCV; 32968414cd80SViswas G phy->phy_attached = 1; 32978414cd80SViswas G } 32988414cd80SViswas G 3299f5860992SSakthivel K /** 3300f5860992SSakthivel K * hw_event_sas_phy_up - FW tells me a SAS phy up event. 3301f5860992SSakthivel K * @pm8001_ha: our hba card information 3302f5860992SSakthivel K * @piomb: IO message buffer 3303f5860992SSakthivel K */ 3304f5860992SSakthivel K static void 3305f5860992SSakthivel K hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3306f5860992SSakthivel K { 3307f5860992SSakthivel K struct hw_event_resp *pPayload = 3308f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3309f5860992SSakthivel K u32 lr_status_evt_portid = 3310f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3311f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3312f5860992SSakthivel K 3313f5860992SSakthivel K u8 link_rate = 3314f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3315f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3316f5860992SSakthivel K u8 phy_id = 3317f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3318f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3319f5860992SSakthivel K 3320f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3321f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3322f5860992SSakthivel K unsigned long flags; 3323f5860992SSakthivel K u8 deviceType = pPayload->sas_identify.dev_type; 332408d0a992SAjish Koshy phy->port = port; 332508d0a992SAjish Koshy port->port_id = port_id; 3326f5860992SSakthivel K port->port_state = portstate; 33278414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 33287d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 33291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 33301b5d2793SJoe Perches "portid:%d; phyid:%d; linkrate:%d; portstate:%x; devicetype:%x\n", 33311b5d2793SJoe Perches port_id, phy_id, link_rate, portstate, deviceType); 3332f5860992SSakthivel K 3333f5860992SSakthivel K switch (deviceType) { 3334f5860992SSakthivel K case SAS_PHY_UNUSED: 33351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "device type no device.\n"); 3336f5860992SSakthivel K break; 3337f5860992SSakthivel K case SAS_END_DEVICE: 33381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "end device.\n"); 3339f5860992SSakthivel K pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 3340f5860992SSakthivel K PHY_NOTIFY_ENABLE_SPINUP); 3341f5860992SSakthivel K port->port_attached = 1; 3342f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3343f5860992SSakthivel K break; 3344f5860992SSakthivel K case SAS_EDGE_EXPANDER_DEVICE: 33451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "expander device.\n"); 3346f5860992SSakthivel K port->port_attached = 1; 3347f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3348f5860992SSakthivel K break; 3349f5860992SSakthivel K case SAS_FANOUT_EXPANDER_DEVICE: 33501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n"); 3351f5860992SSakthivel K port->port_attached = 1; 3352f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3353f5860992SSakthivel K break; 3354f5860992SSakthivel K default: 33551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n", 33561b5d2793SJoe Perches deviceType); 3357f5860992SSakthivel K break; 3358f5860992SSakthivel K } 3359f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SAS; 3360f5860992SSakthivel K phy->identify.device_type = deviceType; 3361f5860992SSakthivel K phy->phy_attached = 1; 3362f5860992SSakthivel K if (phy->identify.device_type == SAS_END_DEVICE) 3363f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SSP; 3364f5860992SSakthivel K else if (phy->identify.device_type != SAS_PHY_UNUSED) 3365f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; 3366f5860992SSakthivel K phy->sas_phy.oob_mode = SAS_OOB_MODE; 3367de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE, GFP_ATOMIC); 3368f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3369f5860992SSakthivel K memcpy(phy->frame_rcvd, &pPayload->sas_identify, 3370f5860992SSakthivel K sizeof(struct sas_identify_frame)-4); 3371f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct sas_identify_frame) - 4; 3372f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3373f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3374f5860992SSakthivel K if (pm8001_ha->flags == PM8001F_RUN_TIME) 33754ba9e516SAhmed S. Darwish mdelay(200); /* delay a moment to wait for disk to spin up */ 3376f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3377f5860992SSakthivel K } 3378f5860992SSakthivel K 3379f5860992SSakthivel K /** 3380f5860992SSakthivel K * hw_event_sata_phy_up - FW tells me a SATA phy up event. 3381f5860992SSakthivel K * @pm8001_ha: our hba card information 3382f5860992SSakthivel K * @piomb: IO message buffer 3383f5860992SSakthivel K */ 3384f5860992SSakthivel K static void 3385f5860992SSakthivel K hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3386f5860992SSakthivel K { 3387f5860992SSakthivel K struct hw_event_resp *pPayload = 3388f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3389f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3390f5860992SSakthivel K u32 lr_status_evt_portid = 3391f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3392f5860992SSakthivel K u8 link_rate = 3393f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3394f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3395f5860992SSakthivel K u8 phy_id = 3396f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3397f5860992SSakthivel K 3398f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3399f5860992SSakthivel K 3400f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3401f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3402f5860992SSakthivel K unsigned long flags; 34031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 3404f5860992SSakthivel K "port id %d, phy id %d link_rate %d portstate 0x%x\n", 34051b5d2793SJoe Perches port_id, phy_id, link_rate, portstate); 3406f5860992SSakthivel K 340708d0a992SAjish Koshy phy->port = port; 340808d0a992SAjish Koshy port->port_id = port_id; 3409f5860992SSakthivel K port->port_state = portstate; 34107d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 3411f5860992SSakthivel K port->port_attached = 1; 3412f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3413f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SATA; 3414f5860992SSakthivel K phy->phy_attached = 1; 3415f5860992SSakthivel K phy->sas_phy.oob_mode = SATA_OOB_MODE; 3416de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE, GFP_ATOMIC); 3417f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3418f5860992SSakthivel K memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), 3419f5860992SSakthivel K sizeof(struct dev_to_host_fis)); 3420f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct dev_to_host_fis); 3421f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SATA; 3422aa9f8328SJames Bottomley phy->identify.device_type = SAS_SATA_DEV; 3423f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3424f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3425f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3426f5860992SSakthivel K } 3427f5860992SSakthivel K 3428f5860992SSakthivel K /** 3429f5860992SSakthivel K * hw_event_phy_down - we should notify the libsas the phy is down. 3430f5860992SSakthivel K * @pm8001_ha: our hba card information 3431f5860992SSakthivel K * @piomb: IO message buffer 3432f5860992SSakthivel K */ 3433f5860992SSakthivel K static void 3434f5860992SSakthivel K hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) 3435f5860992SSakthivel K { 3436f5860992SSakthivel K struct hw_event_resp *pPayload = 3437f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3438f5860992SSakthivel K 3439f5860992SSakthivel K u32 lr_status_evt_portid = 3440f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3441f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3442f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3443f5860992SSakthivel K u8 phy_id = 3444f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3445f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3446f5860992SSakthivel K 3447f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3448f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3449869ddbdcSViswas G u32 port_sata = (phy->phy_type & PORT_TYPE_SATA); 3450f5860992SSakthivel K port->port_state = portstate; 3451f5860992SSakthivel K phy->identify.device_type = 0; 3452f5860992SSakthivel K phy->phy_attached = 0; 3453f5860992SSakthivel K switch (portstate) { 3454f5860992SSakthivel K case PORT_VALID: 3455f5860992SSakthivel K break; 3456f5860992SSakthivel K case PORT_INVALID: 34571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n", 34581b5d2793SJoe Perches port_id); 34591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34601b5d2793SJoe Perches " Last phy Down and port invalid\n"); 3461869ddbdcSViswas G if (port_sata) { 34628414cd80SViswas G phy->phy_type = 0; 3463f5860992SSakthivel K port->port_attached = 0; 3464f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3465f5860992SSakthivel K port_id, phy_id, 0, 0); 34668414cd80SViswas G } 34678414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3468f5860992SSakthivel K break; 3469f5860992SSakthivel K case PORT_IN_RESET: 34701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n", 34711b5d2793SJoe Perches port_id); 3472f5860992SSakthivel K break; 3473f5860992SSakthivel K case PORT_NOT_ESTABLISHED: 34741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34751b5d2793SJoe Perches " Phy Down and PORT_NOT_ESTABLISHED\n"); 3476f5860992SSakthivel K port->port_attached = 0; 3477f5860992SSakthivel K break; 3478f5860992SSakthivel K case PORT_LOSTCOMM: 34791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " Phy Down and PORT_LOSTCOMM\n"); 34801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34811b5d2793SJoe Perches " Last phy Down and port invalid\n"); 3482869ddbdcSViswas G if (port_sata) { 3483f5860992SSakthivel K port->port_attached = 0; 34848414cd80SViswas G phy->phy_type = 0; 3485f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3486f5860992SSakthivel K port_id, phy_id, 0, 0); 34878414cd80SViswas G } 34888414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3489f5860992SSakthivel K break; 3490f5860992SSakthivel K default: 3491f5860992SSakthivel K port->port_attached = 0; 34921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 34931b5d2793SJoe Perches " Phy Down and(default) = 0x%x\n", 34941b5d2793SJoe Perches portstate); 3495f5860992SSakthivel K break; 3496f5860992SSakthivel K 3497f5860992SSakthivel K } 3498121181f3SJohn Garry if (port_sata && (portstate != PORT_IN_RESET)) 3499de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL, 3500cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3501f5860992SSakthivel K } 3502f5860992SSakthivel K 3503f5860992SSakthivel K static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3504f5860992SSakthivel K { 3505f5860992SSakthivel K struct phy_start_resp *pPayload = 3506f5860992SSakthivel K (struct phy_start_resp *)(piomb + 4); 3507f5860992SSakthivel K u32 status = 3508f5860992SSakthivel K le32_to_cpu(pPayload->status); 3509f5860992SSakthivel K u32 phy_id = 3510744798fcSIgor Pylypiv le32_to_cpu(pPayload->phyid) & 0xFF; 3511f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3512f5860992SSakthivel K 35131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 35141b5d2793SJoe Perches "phy start resp status:0x%x, phyid:0x%x\n", 35151b5d2793SJoe Perches status, phy_id); 3516d1acd81bSAjish Koshy if (status == 0) 3517cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DOWN; 3518d1acd81bSAjish Koshy 3519cd135754SDeepak Ukey if (pm8001_ha->flags == PM8001F_RUN_TIME && 3520e703977bSpeter chang phy->enable_completion != NULL) { 3521f5860992SSakthivel K complete(phy->enable_completion); 3522e703977bSpeter chang phy->enable_completion = NULL; 3523e703977bSpeter chang } 3524f5860992SSakthivel K return 0; 3525f5860992SSakthivel K 3526f5860992SSakthivel K } 3527f5860992SSakthivel K 3528f5860992SSakthivel K /** 3529bb6beabfSRandy Dunlap * mpi_thermal_hw_event - a thermal hw event has come. 3530f5860992SSakthivel K * @pm8001_ha: our hba card information 3531f5860992SSakthivel K * @piomb: IO message buffer 3532f5860992SSakthivel K */ 3533f5860992SSakthivel K static int mpi_thermal_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3534f5860992SSakthivel K { 3535f5860992SSakthivel K struct thermal_hw_event *pPayload = 3536f5860992SSakthivel K (struct thermal_hw_event *)(piomb + 4); 3537f5860992SSakthivel K 3538f5860992SSakthivel K u32 thermal_event = le32_to_cpu(pPayload->thermal_event); 3539f5860992SSakthivel K u32 rht_lht = le32_to_cpu(pPayload->rht_lht); 3540f5860992SSakthivel K 3541f5860992SSakthivel K if (thermal_event & 0x40) { 35421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 35431b5d2793SJoe Perches "Thermal Event: Local high temperature violated!\n"); 35441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3545f5860992SSakthivel K "Thermal Event: Measured local high temperature %d\n", 35461b5d2793SJoe Perches ((rht_lht & 0xFF00) >> 8)); 3547f5860992SSakthivel K } 3548f5860992SSakthivel K if (thermal_event & 0x10) { 35491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 35501b5d2793SJoe Perches "Thermal Event: Remote high temperature violated!\n"); 35511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3552f5860992SSakthivel K "Thermal Event: Measured remote high temperature %d\n", 35531b5d2793SJoe Perches ((rht_lht & 0xFF000000) >> 24)); 3554f5860992SSakthivel K } 3555f5860992SSakthivel K return 0; 3556f5860992SSakthivel K } 3557f5860992SSakthivel K 3558f5860992SSakthivel K /** 3559f5860992SSakthivel K * mpi_hw_event - The hw event has come. 3560f5860992SSakthivel K * @pm8001_ha: our hba card information 3561f5860992SSakthivel K * @piomb: IO message buffer 3562f5860992SSakthivel K */ 3563f5860992SSakthivel K static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3564f5860992SSakthivel K { 35658414cd80SViswas G unsigned long flags, i; 3566f5860992SSakthivel K struct hw_event_resp *pPayload = 3567f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3568f5860992SSakthivel K u32 lr_status_evt_portid = 3569f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3570f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3571f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3572f5860992SSakthivel K u8 phy_id = 3573f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3574f5860992SSakthivel K u16 eventType = 3575f5860992SSakthivel K (u16)((lr_status_evt_portid & 0x00FFFF00) >> 8); 3576f5860992SSakthivel K u8 status = 3577f5860992SSakthivel K (u8)((lr_status_evt_portid & 0x0F000000) >> 24); 3578f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3579f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 35808414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 3581f5860992SSakthivel K struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; 35821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 35831b5d2793SJoe Perches "portid:%d phyid:%d event:0x%x status:0x%x\n", 35841b5d2793SJoe Perches port_id, phy_id, eventType, status); 3585f5860992SSakthivel K 3586f5860992SSakthivel K switch (eventType) { 3587f5860992SSakthivel K 3588f5860992SSakthivel K case HW_EVENT_SAS_PHY_UP: 35891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n"); 3590f5860992SSakthivel K hw_event_sas_phy_up(pm8001_ha, piomb); 3591f5860992SSakthivel K break; 3592f5860992SSakthivel K case HW_EVENT_SATA_PHY_UP: 35931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n"); 3594f5860992SSakthivel K hw_event_sata_phy_up(pm8001_ha, piomb); 3595f5860992SSakthivel K break; 3596f5860992SSakthivel K case HW_EVENT_SATA_SPINUP_HOLD: 35971b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n"); 3598de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD, 3599cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3600f5860992SSakthivel K break; 3601f5860992SSakthivel K case HW_EVENT_PHY_DOWN: 36021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n"); 3603869ddbdcSViswas G hw_event_phy_down(pm8001_ha, piomb); 3604869ddbdcSViswas G if (pm8001_ha->reset_in_progress) { 36051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "Reset in progress\n"); 3606869ddbdcSViswas G return 0; 3607869ddbdcSViswas G } 3608f5860992SSakthivel K phy->phy_attached = 0; 3609cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3610f5860992SSakthivel K break; 3611f5860992SSakthivel K case HW_EVENT_PORT_INVALID: 36121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n"); 3613f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3614f5860992SSakthivel K phy->phy_attached = 0; 3615de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3616cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3617f5860992SSakthivel K break; 3618f5860992SSakthivel K /* the broadcast change primitive received, tell the LIBSAS this event 3619f5860992SSakthivel K to revalidate the sas domain*/ 3620f5860992SSakthivel K case HW_EVENT_BROADCAST_CHANGE: 36211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n"); 3622f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE, 3623f5860992SSakthivel K port_id, phy_id, 1, 0); 3624f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3625f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; 3626f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3627de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, 3628cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3629f5860992SSakthivel K break; 3630f5860992SSakthivel K case HW_EVENT_PHY_ERROR: 36311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n"); 3632f5860992SSakthivel K sas_phy_disconnected(&phy->sas_phy); 3633f5860992SSakthivel K phy->phy_attached = 0; 3634de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR, GFP_ATOMIC); 3635f5860992SSakthivel K break; 3636f5860992SSakthivel K case HW_EVENT_BROADCAST_EXP: 36371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n"); 3638f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3639f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; 3640f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3641de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, 3642cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3643f5860992SSakthivel K break; 3644f5860992SSakthivel K case HW_EVENT_LINK_ERR_INVALID_DWORD: 36451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36461b5d2793SJoe Perches "HW_EVENT_LINK_ERR_INVALID_DWORD\n"); 3647f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3648f5860992SSakthivel K HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0); 3649f5860992SSakthivel K break; 3650f5860992SSakthivel K case HW_EVENT_LINK_ERR_DISPARITY_ERROR: 36511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36521b5d2793SJoe Perches "HW_EVENT_LINK_ERR_DISPARITY_ERROR\n"); 3653f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3654f5860992SSakthivel K HW_EVENT_LINK_ERR_DISPARITY_ERROR, 3655f5860992SSakthivel K port_id, phy_id, 0, 0); 3656f5860992SSakthivel K break; 3657f5860992SSakthivel K case HW_EVENT_LINK_ERR_CODE_VIOLATION: 36581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36591b5d2793SJoe Perches "HW_EVENT_LINK_ERR_CODE_VIOLATION\n"); 3660f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3661f5860992SSakthivel K HW_EVENT_LINK_ERR_CODE_VIOLATION, 3662f5860992SSakthivel K port_id, phy_id, 0, 0); 3663f5860992SSakthivel K break; 3664f5860992SSakthivel K case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH: 36651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36661b5d2793SJoe Perches "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n"); 3667f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3668f5860992SSakthivel K HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH, 3669f5860992SSakthivel K port_id, phy_id, 0, 0); 3670f5860992SSakthivel K break; 3671f5860992SSakthivel K case HW_EVENT_MALFUNCTION: 36721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n"); 3673f5860992SSakthivel K break; 3674f5860992SSakthivel K case HW_EVENT_BROADCAST_SES: 36751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n"); 3676f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3677f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; 3678f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3679de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, 3680cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3681f5860992SSakthivel K break; 3682f5860992SSakthivel K case HW_EVENT_INBOUND_CRC_ERROR: 36831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n"); 3684f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3685f5860992SSakthivel K HW_EVENT_INBOUND_CRC_ERROR, 3686f5860992SSakthivel K port_id, phy_id, 0, 0); 3687f5860992SSakthivel K break; 3688f5860992SSakthivel K case HW_EVENT_HARD_RESET_RECEIVED: 36891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n"); 3690de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_HARD_RESET, GFP_ATOMIC); 3691f5860992SSakthivel K break; 3692f5860992SSakthivel K case HW_EVENT_ID_FRAME_TIMEOUT: 36931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n"); 3694f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3695f5860992SSakthivel K phy->phy_attached = 0; 3696de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3697cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3698f5860992SSakthivel K break; 3699f5860992SSakthivel K case HW_EVENT_LINK_ERR_PHY_RESET_FAILED: 37001b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 37011b5d2793SJoe Perches "HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n"); 3702f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3703f5860992SSakthivel K HW_EVENT_LINK_ERR_PHY_RESET_FAILED, 3704f5860992SSakthivel K port_id, phy_id, 0, 0); 3705f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3706f5860992SSakthivel K phy->phy_attached = 0; 3707de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3708cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3709f5860992SSakthivel K break; 3710f5860992SSakthivel K case HW_EVENT_PORT_RESET_TIMER_TMO: 37111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n"); 3712*ee05cb71SAjish Koshy if (!pm8001_ha->phy[phy_id].reset_completion) { 3713869ddbdcSViswas G pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3714869ddbdcSViswas G port_id, phy_id, 0, 0); 3715*ee05cb71SAjish Koshy } 3716f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3717f5860992SSakthivel K phy->phy_attached = 0; 3718de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3719cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3720869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3721869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3722869ddbdcSViswas G PORT_RESET_TMO; 3723869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3724869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3725869ddbdcSViswas G } 3726f5860992SSakthivel K break; 3727f5860992SSakthivel K case HW_EVENT_PORT_RECOVERY_TIMER_TMO: 37281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 37291b5d2793SJoe Perches "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"); 3730a6cb3d01SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3731a6cb3d01SSakthivel K HW_EVENT_PORT_RECOVERY_TIMER_TMO, 3732a6cb3d01SSakthivel K port_id, phy_id, 0, 0); 37338414cd80SViswas G for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 37348414cd80SViswas G if (port->wide_port_phymap & (1 << i)) { 37358414cd80SViswas G phy = &pm8001_ha->phy[i]; 3736de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, 3737cd4e8176SAhmed S. Darwish PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC); 37388414cd80SViswas G port->wide_port_phymap &= ~(1 << i); 37398414cd80SViswas G } 37408414cd80SViswas G } 3741f5860992SSakthivel K break; 3742f5860992SSakthivel K case HW_EVENT_PORT_RECOVER: 37431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n"); 37448414cd80SViswas G hw_event_port_recover(pm8001_ha, piomb); 3745f5860992SSakthivel K break; 3746f5860992SSakthivel K case HW_EVENT_PORT_RESET_COMPLETE: 37471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n"); 3748869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3749869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3750869ddbdcSViswas G PORT_RESET_SUCCESS; 3751869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3752869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3753869ddbdcSViswas G } 3754f5860992SSakthivel K break; 3755f5860992SSakthivel K case EVENT_BROADCAST_ASYNCH_EVENT: 37561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n"); 3757f5860992SSakthivel K break; 3758f5860992SSakthivel K default: 37591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type 0x%x\n", 37601b5d2793SJoe Perches eventType); 3761f5860992SSakthivel K break; 3762f5860992SSakthivel K } 3763f5860992SSakthivel K return 0; 3764f5860992SSakthivel K } 3765f5860992SSakthivel K 3766f5860992SSakthivel K /** 3767f5860992SSakthivel K * mpi_phy_stop_resp - SPCv specific 3768f5860992SSakthivel K * @pm8001_ha: our hba card information 3769f5860992SSakthivel K * @piomb: IO message buffer 3770f5860992SSakthivel K */ 3771f5860992SSakthivel K static int mpi_phy_stop_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3772f5860992SSakthivel K { 3773f5860992SSakthivel K struct phy_stop_resp *pPayload = 3774f5860992SSakthivel K (struct phy_stop_resp *)(piomb + 4); 3775f5860992SSakthivel K u32 status = 3776f5860992SSakthivel K le32_to_cpu(pPayload->status); 3777f5860992SSakthivel K u32 phyid = 3778cd135754SDeepak Ukey le32_to_cpu(pPayload->phyid) & 0xFF; 3779f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phyid]; 37801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "phy:0x%x status:0x%x\n", 37811b5d2793SJoe Perches phyid, status); 3782cd135754SDeepak Ukey if (status == PHY_STOP_SUCCESS || 3783cd135754SDeepak Ukey status == PHY_STOP_ERR_DEVICE_ATTACHED) 3784cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3785f5860992SSakthivel K return 0; 3786f5860992SSakthivel K } 3787f5860992SSakthivel K 3788f5860992SSakthivel K /** 3789f5860992SSakthivel K * mpi_set_controller_config_resp - SPCv specific 3790f5860992SSakthivel K * @pm8001_ha: our hba card information 3791f5860992SSakthivel K * @piomb: IO message buffer 3792f5860992SSakthivel K */ 3793f5860992SSakthivel K static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3794f5860992SSakthivel K void *piomb) 3795f5860992SSakthivel K { 3796f5860992SSakthivel K struct set_ctrl_cfg_resp *pPayload = 3797f5860992SSakthivel K (struct set_ctrl_cfg_resp *)(piomb + 4); 3798f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3799f5860992SSakthivel K u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd); 3800f5860992SSakthivel K 38011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 3802f5860992SSakthivel K "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n", 38031b5d2793SJoe Perches status, err_qlfr_pgcd); 3804f5860992SSakthivel K 3805f5860992SSakthivel K return 0; 3806f5860992SSakthivel K } 3807f5860992SSakthivel K 3808f5860992SSakthivel K /** 3809f5860992SSakthivel K * mpi_get_controller_config_resp - SPCv specific 3810f5860992SSakthivel K * @pm8001_ha: our hba card information 3811f5860992SSakthivel K * @piomb: IO message buffer 3812f5860992SSakthivel K */ 3813f5860992SSakthivel K static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3814f5860992SSakthivel K void *piomb) 3815f5860992SSakthivel K { 38161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3817f5860992SSakthivel K 3818f5860992SSakthivel K return 0; 3819f5860992SSakthivel K } 3820f5860992SSakthivel K 3821f5860992SSakthivel K /** 3822f5860992SSakthivel K * mpi_get_phy_profile_resp - SPCv specific 3823f5860992SSakthivel K * @pm8001_ha: our hba card information 3824f5860992SSakthivel K * @piomb: IO message buffer 3825f5860992SSakthivel K */ 3826f5860992SSakthivel K static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3827f5860992SSakthivel K void *piomb) 3828f5860992SSakthivel K { 38291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3830f5860992SSakthivel K 3831f5860992SSakthivel K return 0; 3832f5860992SSakthivel K } 3833f5860992SSakthivel K 3834f5860992SSakthivel K /** 3835f5860992SSakthivel K * mpi_flash_op_ext_resp - SPCv specific 3836f5860992SSakthivel K * @pm8001_ha: our hba card information 3837f5860992SSakthivel K * @piomb: IO message buffer 3838f5860992SSakthivel K */ 3839f5860992SSakthivel K static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3840f5860992SSakthivel K { 38411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3842f5860992SSakthivel K 3843f5860992SSakthivel K return 0; 3844f5860992SSakthivel K } 3845f5860992SSakthivel K 3846f5860992SSakthivel K /** 3847f5860992SSakthivel K * mpi_set_phy_profile_resp - SPCv specific 3848f5860992SSakthivel K * @pm8001_ha: our hba card information 3849f5860992SSakthivel K * @piomb: IO message buffer 3850f5860992SSakthivel K */ 3851f5860992SSakthivel K static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3852f5860992SSakthivel K void *piomb) 3853f5860992SSakthivel K { 38549d9c7c20Syuuzheng u32 tag; 385527909407SAnand Kumar Santhanam u8 page_code; 38569d9c7c20Syuuzheng int rc = 0; 385727909407SAnand Kumar Santhanam struct set_phy_profile_resp *pPayload = 385827909407SAnand Kumar Santhanam (struct set_phy_profile_resp *)(piomb + 4); 385927909407SAnand Kumar Santhanam u32 ppc_phyid = le32_to_cpu(pPayload->ppc_phyid); 386027909407SAnand Kumar Santhanam u32 status = le32_to_cpu(pPayload->status); 3861f5860992SSakthivel K 38629d9c7c20Syuuzheng tag = le32_to_cpu(pPayload->tag); 386327909407SAnand Kumar Santhanam page_code = (u8)((ppc_phyid & 0xFF00) >> 8); 386427909407SAnand Kumar Santhanam if (status) { 386527909407SAnand Kumar Santhanam /* status is FAILED */ 38661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 38671b5d2793SJoe Perches "PhyProfile command failed with status 0x%08X\n", 38681b5d2793SJoe Perches status); 38699d9c7c20Syuuzheng rc = -1; 387027909407SAnand Kumar Santhanam } else { 387127909407SAnand Kumar Santhanam if (page_code != SAS_PHY_ANALOG_SETTINGS_PAGE) { 38721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Invalid page code 0x%X\n", 38731b5d2793SJoe Perches page_code); 38749d9c7c20Syuuzheng rc = -1; 387527909407SAnand Kumar Santhanam } 387627909407SAnand Kumar Santhanam } 38779d9c7c20Syuuzheng pm8001_tag_free(pm8001_ha, tag); 38789d9c7c20Syuuzheng return rc; 3879f5860992SSakthivel K } 3880f5860992SSakthivel K 3881f5860992SSakthivel K /** 3882f5860992SSakthivel K * mpi_kek_management_resp - SPCv specific 3883f5860992SSakthivel K * @pm8001_ha: our hba card information 3884f5860992SSakthivel K * @piomb: IO message buffer 3885f5860992SSakthivel K */ 3886f5860992SSakthivel K static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha, 3887f5860992SSakthivel K void *piomb) 3888f5860992SSakthivel K { 3889f5860992SSakthivel K struct kek_mgmt_resp *pPayload = (struct kek_mgmt_resp *)(piomb + 4); 3890f5860992SSakthivel K 3891f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3892f5860992SSakthivel K u32 kidx_new_curr_ksop = le32_to_cpu(pPayload->kidx_new_curr_ksop); 3893f5860992SSakthivel K u32 err_qlfr = le32_to_cpu(pPayload->err_qlfr); 3894f5860992SSakthivel K 38951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 3896f5860992SSakthivel K "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n", 38971b5d2793SJoe Perches status, kidx_new_curr_ksop, err_qlfr); 3898f5860992SSakthivel K 3899f5860992SSakthivel K return 0; 3900f5860992SSakthivel K } 3901f5860992SSakthivel K 3902f5860992SSakthivel K /** 3903f5860992SSakthivel K * mpi_dek_management_resp - SPCv specific 3904f5860992SSakthivel K * @pm8001_ha: our hba card information 3905f5860992SSakthivel K * @piomb: IO message buffer 3906f5860992SSakthivel K */ 3907f5860992SSakthivel K static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha, 3908f5860992SSakthivel K void *piomb) 3909f5860992SSakthivel K { 39101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3911f5860992SSakthivel K 3912f5860992SSakthivel K return 0; 3913f5860992SSakthivel K } 3914f5860992SSakthivel K 3915f5860992SSakthivel K /** 3916f5860992SSakthivel K * ssp_coalesced_comp_resp - SPCv specific 3917f5860992SSakthivel K * @pm8001_ha: our hba card information 3918f5860992SSakthivel K * @piomb: IO message buffer 3919f5860992SSakthivel K */ 3920f5860992SSakthivel K static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha, 3921f5860992SSakthivel K void *piomb) 3922f5860992SSakthivel K { 39231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3924f5860992SSakthivel K 3925f5860992SSakthivel K return 0; 3926f5860992SSakthivel K } 3927f5860992SSakthivel K 3928f5860992SSakthivel K /** 3929f5860992SSakthivel K * process_one_iomb - process one outbound Queue memory block 3930f5860992SSakthivel K * @pm8001_ha: our hba card information 3931f5860992SSakthivel K * @piomb: IO message buffer 3932f5860992SSakthivel K */ 3933b27a4053SAjish Koshy static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, 3934b27a4053SAjish Koshy struct outbound_queue_table *circularQ, void *piomb) 3935f5860992SSakthivel K { 3936f5860992SSakthivel K __le32 pHeader = *(__le32 *)piomb; 3937f5860992SSakthivel K u32 opc = (u32)((le32_to_cpu(pHeader)) & 0xFFF); 3938f5860992SSakthivel K 3939f5860992SSakthivel K switch (opc) { 3940f5860992SSakthivel K case OPC_OUB_ECHO: 39411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n"); 3942f5860992SSakthivel K break; 3943f5860992SSakthivel K case OPC_OUB_HW_EVENT: 39441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n"); 3945f5860992SSakthivel K mpi_hw_event(pm8001_ha, piomb); 3946f5860992SSakthivel K break; 3947f5860992SSakthivel K case OPC_OUB_THERM_HW_EVENT: 39481b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_THERMAL_EVENT\n"); 3949f5860992SSakthivel K mpi_thermal_hw_event(pm8001_ha, piomb); 3950f5860992SSakthivel K break; 3951f5860992SSakthivel K case OPC_OUB_SSP_COMP: 39521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n"); 3953f5860992SSakthivel K mpi_ssp_completion(pm8001_ha, piomb); 3954f5860992SSakthivel K break; 3955f5860992SSakthivel K case OPC_OUB_SMP_COMP: 39561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n"); 3957f5860992SSakthivel K mpi_smp_completion(pm8001_ha, piomb); 3958f5860992SSakthivel K break; 3959f5860992SSakthivel K case OPC_OUB_LOCAL_PHY_CNTRL: 39601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n"); 3961f5860992SSakthivel K pm8001_mpi_local_phy_ctl(pm8001_ha, piomb); 3962f5860992SSakthivel K break; 3963f5860992SSakthivel K case OPC_OUB_DEV_REGIST: 39641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n"); 3965f5860992SSakthivel K pm8001_mpi_reg_resp(pm8001_ha, piomb); 3966f5860992SSakthivel K break; 3967f5860992SSakthivel K case OPC_OUB_DEREG_DEV: 39681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "unregister the device\n"); 3969f5860992SSakthivel K pm8001_mpi_dereg_resp(pm8001_ha, piomb); 3970f5860992SSakthivel K break; 3971f5860992SSakthivel K case OPC_OUB_GET_DEV_HANDLE: 39721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n"); 3973f5860992SSakthivel K break; 3974f5860992SSakthivel K case OPC_OUB_SATA_COMP: 39751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n"); 3976b27a4053SAjish Koshy mpi_sata_completion(pm8001_ha, circularQ, piomb); 3977f5860992SSakthivel K break; 3978f5860992SSakthivel K case OPC_OUB_SATA_EVENT: 39791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n"); 3980b27a4053SAjish Koshy mpi_sata_event(pm8001_ha, circularQ, piomb); 3981f5860992SSakthivel K break; 3982f5860992SSakthivel K case OPC_OUB_SSP_EVENT: 39831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n"); 3984f5860992SSakthivel K mpi_ssp_event(pm8001_ha, piomb); 3985f5860992SSakthivel K break; 3986f5860992SSakthivel K case OPC_OUB_DEV_HANDLE_ARRIV: 39871b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n"); 3988f5860992SSakthivel K /*This is for target*/ 3989f5860992SSakthivel K break; 3990f5860992SSakthivel K case OPC_OUB_SSP_RECV_EVENT: 39911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n"); 3992f5860992SSakthivel K /*This is for target*/ 3993f5860992SSakthivel K break; 3994f5860992SSakthivel K case OPC_OUB_FW_FLASH_UPDATE: 39951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n"); 3996f5860992SSakthivel K pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb); 3997f5860992SSakthivel K break; 3998f5860992SSakthivel K case OPC_OUB_GPIO_RESPONSE: 39991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n"); 4000f5860992SSakthivel K break; 4001f5860992SSakthivel K case OPC_OUB_GPIO_EVENT: 40021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n"); 4003f5860992SSakthivel K break; 4004f5860992SSakthivel K case OPC_OUB_GENERAL_EVENT: 40051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n"); 4006f5860992SSakthivel K pm8001_mpi_general_event(pm8001_ha, piomb); 4007f5860992SSakthivel K break; 4008f5860992SSakthivel K case OPC_OUB_SSP_ABORT_RSP: 40091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n"); 4010f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 4011f5860992SSakthivel K break; 4012f5860992SSakthivel K case OPC_OUB_SATA_ABORT_RSP: 40131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n"); 4014f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 4015f5860992SSakthivel K break; 4016f5860992SSakthivel K case OPC_OUB_SAS_DIAG_MODE_START_END: 40171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40181b5d2793SJoe Perches "OPC_OUB_SAS_DIAG_MODE_START_END\n"); 4019f5860992SSakthivel K break; 4020f5860992SSakthivel K case OPC_OUB_SAS_DIAG_EXECUTE: 40211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n"); 4022f5860992SSakthivel K break; 4023f5860992SSakthivel K case OPC_OUB_GET_TIME_STAMP: 40241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n"); 4025f5860992SSakthivel K break; 4026f5860992SSakthivel K case OPC_OUB_SAS_HW_EVENT_ACK: 40271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n"); 4028f5860992SSakthivel K break; 4029f5860992SSakthivel K case OPC_OUB_PORT_CONTROL: 40301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n"); 4031f5860992SSakthivel K break; 4032f5860992SSakthivel K case OPC_OUB_SMP_ABORT_RSP: 40331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n"); 4034f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 4035f5860992SSakthivel K break; 4036f5860992SSakthivel K case OPC_OUB_GET_NVMD_DATA: 40371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n"); 4038f5860992SSakthivel K pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb); 4039f5860992SSakthivel K break; 4040f5860992SSakthivel K case OPC_OUB_SET_NVMD_DATA: 40411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n"); 4042f5860992SSakthivel K pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb); 4043f5860992SSakthivel K break; 4044f5860992SSakthivel K case OPC_OUB_DEVICE_HANDLE_REMOVAL: 40451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n"); 4046f5860992SSakthivel K break; 4047f5860992SSakthivel K case OPC_OUB_SET_DEVICE_STATE: 40481b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n"); 4049f5860992SSakthivel K pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb); 4050f5860992SSakthivel K break; 4051f5860992SSakthivel K case OPC_OUB_GET_DEVICE_STATE: 40521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n"); 4053f5860992SSakthivel K break; 4054f5860992SSakthivel K case OPC_OUB_SET_DEV_INFO: 40551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n"); 4056f5860992SSakthivel K break; 4057bb6beabfSRandy Dunlap /* spcv specific commands */ 4058f5860992SSakthivel K case OPC_OUB_PHY_START_RESP: 40591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40601b5d2793SJoe Perches "OPC_OUB_PHY_START_RESP opcode:%x\n", opc); 4061f5860992SSakthivel K mpi_phy_start_resp(pm8001_ha, piomb); 4062f5860992SSakthivel K break; 4063f5860992SSakthivel K case OPC_OUB_PHY_STOP_RESP: 40641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40651b5d2793SJoe Perches "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc); 4066f5860992SSakthivel K mpi_phy_stop_resp(pm8001_ha, piomb); 4067f5860992SSakthivel K break; 4068f5860992SSakthivel K case OPC_OUB_SET_CONTROLLER_CONFIG: 40691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40701b5d2793SJoe Perches "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc); 4071f5860992SSakthivel K mpi_set_controller_config_resp(pm8001_ha, piomb); 4072f5860992SSakthivel K break; 4073f5860992SSakthivel K case OPC_OUB_GET_CONTROLLER_CONFIG: 40741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40751b5d2793SJoe Perches "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc); 4076f5860992SSakthivel K mpi_get_controller_config_resp(pm8001_ha, piomb); 4077f5860992SSakthivel K break; 4078f5860992SSakthivel K case OPC_OUB_GET_PHY_PROFILE: 40791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40801b5d2793SJoe Perches "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc); 4081f5860992SSakthivel K mpi_get_phy_profile_resp(pm8001_ha, piomb); 4082f5860992SSakthivel K break; 4083f5860992SSakthivel K case OPC_OUB_FLASH_OP_EXT: 40841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40851b5d2793SJoe Perches "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc); 4086f5860992SSakthivel K mpi_flash_op_ext_resp(pm8001_ha, piomb); 4087f5860992SSakthivel K break; 4088f5860992SSakthivel K case OPC_OUB_SET_PHY_PROFILE: 40891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40901b5d2793SJoe Perches "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc); 4091f5860992SSakthivel K mpi_set_phy_profile_resp(pm8001_ha, piomb); 4092f5860992SSakthivel K break; 4093f5860992SSakthivel K case OPC_OUB_KEK_MANAGEMENT_RESP: 40941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40951b5d2793SJoe Perches "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc); 4096f5860992SSakthivel K mpi_kek_management_resp(pm8001_ha, piomb); 4097f5860992SSakthivel K break; 4098f5860992SSakthivel K case OPC_OUB_DEK_MANAGEMENT_RESP: 40991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 41001b5d2793SJoe Perches "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc); 4101f5860992SSakthivel K mpi_dek_management_resp(pm8001_ha, piomb); 4102f5860992SSakthivel K break; 4103f5860992SSakthivel K case OPC_OUB_SSP_COALESCED_COMP_RESP: 41041b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 41051b5d2793SJoe Perches "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc); 4106f5860992SSakthivel K ssp_coalesced_comp_resp(pm8001_ha, piomb); 4107f5860992SSakthivel K break; 4108f5860992SSakthivel K default: 41091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 41101b5d2793SJoe Perches "Unknown outbound Queue IOMB OPC = 0x%x\n", opc); 4111f5860992SSakthivel K break; 4112f5860992SSakthivel K } 4113f5860992SSakthivel K } 4114f5860992SSakthivel K 411572349b62SDeepak Ukey static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha) 411672349b62SDeepak Ukey { 41171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_0: 0x%x\n", 41181b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0)); 41191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_1:0x%x\n", 41201b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1)); 41211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_2: 0x%x\n", 41221b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)); 41231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_3: 0x%x\n", 41241b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3)); 41251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_0: 0x%x\n", 41261b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0)); 41271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_1: 0x%x\n", 41281b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1)); 41291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_2: 0x%x\n", 41301b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2)); 41311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_3: 0x%x\n", 41321b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3)); 41331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_4: 0x%x\n", 41341b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4)); 41351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_5: 0x%x\n", 41361b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5)); 41371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n", 41381b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6)); 41391b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n", 41401b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7)); 414172349b62SDeepak Ukey } 414272349b62SDeepak Ukey 4143f5860992SSakthivel K static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) 4144f5860992SSakthivel K { 4145f5860992SSakthivel K struct outbound_queue_table *circularQ; 4146f5860992SSakthivel K void *pMsg1 = NULL; 41473f649ab7SKees Cook u8 bc; 4148f5860992SSakthivel K u32 ret = MPI_IO_STATUS_FAIL; 414972349b62SDeepak Ukey u32 regval; 4150f5860992SSakthivel K 415105c6c029SViswas G if (vec == (pm8001_ha->max_q_num - 1)) { 415272349b62SDeepak Ukey regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 415372349b62SDeepak Ukey if ((regval & SCRATCH_PAD_MIPSALL_READY) != 415472349b62SDeepak Ukey SCRATCH_PAD_MIPSALL_READY) { 415572349b62SDeepak Ukey pm8001_ha->controller_fatal_error = true; 41561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 41571b5d2793SJoe Perches "Firmware Fatal error! Regval:0x%x\n", 41581b5d2793SJoe Perches regval); 41594f5deeb4SRuksar Devadi pm8001_handle_event(pm8001_ha, NULL, IO_FATAL_ERROR); 416072349b62SDeepak Ukey print_scratchpad_registers(pm8001_ha); 416172349b62SDeepak Ukey return ret; 416272349b62SDeepak Ukey } 416372349b62SDeepak Ukey } 4164f5860992SSakthivel K circularQ = &pm8001_ha->outbnd_q_tbl[vec]; 4165b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, circularQ->lock_flags); 4166f5860992SSakthivel K do { 416772349b62SDeepak Ukey /* spurious interrupt during setup if kexec-ing and 416872349b62SDeepak Ukey * driver doing a doorbell access w/ the pre-kexec oq 416972349b62SDeepak Ukey * interrupt setup. 417072349b62SDeepak Ukey */ 417172349b62SDeepak Ukey if (!circularQ->pi_virt) 417272349b62SDeepak Ukey break; 4173f5860992SSakthivel K ret = pm8001_mpi_msg_consume(pm8001_ha, circularQ, &pMsg1, &bc); 4174f5860992SSakthivel K if (MPI_IO_STATUS_SUCCESS == ret) { 4175f5860992SSakthivel K /* process the outbound message */ 4176b27a4053SAjish Koshy process_one_iomb(pm8001_ha, circularQ, 4177b27a4053SAjish Koshy (void *)(pMsg1 - 4)); 4178f5860992SSakthivel K /* free the message from the outbound circular buffer */ 4179f5860992SSakthivel K pm8001_mpi_msg_free_set(pm8001_ha, pMsg1, 4180f5860992SSakthivel K circularQ, bc); 4181f5860992SSakthivel K } 4182f5860992SSakthivel K if (MPI_IO_STATUS_BUSY == ret) { 4183f5860992SSakthivel K /* Update the producer index from SPC */ 4184f5860992SSakthivel K circularQ->producer_index = 4185f5860992SSakthivel K cpu_to_le32(pm8001_read_32(circularQ->pi_virt)); 4186f5860992SSakthivel K if (le32_to_cpu(circularQ->producer_index) == 4187f5860992SSakthivel K circularQ->consumer_idx) 4188f5860992SSakthivel K /* OQ is empty */ 4189f5860992SSakthivel K break; 4190f5860992SSakthivel K } 4191f5860992SSakthivel K } while (1); 4192b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, circularQ->lock_flags); 4193f5860992SSakthivel K return ret; 4194f5860992SSakthivel K } 4195f5860992SSakthivel K 4196f73bdebdSChristoph Hellwig /* DMA_... to our direction translation. */ 4197f5860992SSakthivel K static const u8 data_dir_flags[] = { 4198f73bdebdSChristoph Hellwig [DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT, /* UNSPECIFIED */ 4199f73bdebdSChristoph Hellwig [DMA_TO_DEVICE] = DATA_DIR_OUT, /* OUTBOUND */ 4200f73bdebdSChristoph Hellwig [DMA_FROM_DEVICE] = DATA_DIR_IN, /* INBOUND */ 4201f73bdebdSChristoph Hellwig [DMA_NONE] = DATA_DIR_NONE, /* NO TRANSFER */ 4202f5860992SSakthivel K }; 4203f5860992SSakthivel K 4204f5860992SSakthivel K static void build_smp_cmd(u32 deviceID, __le32 hTag, 4205f5860992SSakthivel K struct smp_req *psmp_cmd, int mode, int length) 4206f5860992SSakthivel K { 4207f5860992SSakthivel K psmp_cmd->tag = hTag; 4208f5860992SSakthivel K psmp_cmd->device_id = cpu_to_le32(deviceID); 4209f5860992SSakthivel K if (mode == SMP_DIRECT) { 4210f5860992SSakthivel K length = length - 4; /* subtract crc */ 4211f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(length << 16); 4212f5860992SSakthivel K } else { 4213f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(1|(1 << 1)); 4214f5860992SSakthivel K } 4215f5860992SSakthivel K } 4216f5860992SSakthivel K 4217f5860992SSakthivel K /** 4218bb6beabfSRandy Dunlap * pm80xx_chip_smp_req - send an SMP task to FW 4219f5860992SSakthivel K * @pm8001_ha: our hba card information. 4220f5860992SSakthivel K * @ccb: the ccb information this request used. 4221f5860992SSakthivel K */ 4222f5860992SSakthivel K static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, 4223f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4224f5860992SSakthivel K { 4225f5860992SSakthivel K int elem, rc; 4226f5860992SSakthivel K struct sas_task *task = ccb->task; 4227f5860992SSakthivel K struct domain_device *dev = task->dev; 4228f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4229f5860992SSakthivel K struct scatterlist *sg_req, *sg_resp; 4230f5860992SSakthivel K u32 req_len, resp_len; 4231f5860992SSakthivel K struct smp_req smp_cmd; 4232f5860992SSakthivel K u32 opc; 4233f5860992SSakthivel K struct inbound_queue_table *circularQ; 4234f5860992SSakthivel K char *preq_dma_addr = NULL; 4235f5860992SSakthivel K __le64 tmp_addr; 4236f5860992SSakthivel K u32 i, length; 4237f5860992SSakthivel K 4238f5860992SSakthivel K memset(&smp_cmd, 0, sizeof(smp_cmd)); 4239f5860992SSakthivel K /* 4240f5860992SSakthivel K * DMA-map SMP request, response buffers 4241f5860992SSakthivel K */ 4242f5860992SSakthivel K sg_req = &task->smp_task.smp_req; 4243f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE); 4244f5860992SSakthivel K if (!elem) 4245f5860992SSakthivel K return -ENOMEM; 4246f5860992SSakthivel K req_len = sg_dma_len(sg_req); 4247f5860992SSakthivel K 4248f5860992SSakthivel K sg_resp = &task->smp_task.smp_resp; 4249f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE); 4250f5860992SSakthivel K if (!elem) { 4251f5860992SSakthivel K rc = -ENOMEM; 4252f5860992SSakthivel K goto err_out; 4253f5860992SSakthivel K } 4254f5860992SSakthivel K resp_len = sg_dma_len(sg_resp); 4255f5860992SSakthivel K /* must be in dwords */ 4256f5860992SSakthivel K if ((req_len & 0x3) || (resp_len & 0x3)) { 4257f5860992SSakthivel K rc = -EINVAL; 4258f5860992SSakthivel K goto err_out_2; 4259f5860992SSakthivel K } 4260f5860992SSakthivel K 4261f5860992SSakthivel K opc = OPC_INB_SMP_REQUEST; 4262f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4263f5860992SSakthivel K smp_cmd.tag = cpu_to_le32(ccb->ccb_tag); 4264f5860992SSakthivel K 4265f5860992SSakthivel K length = sg_req->length; 42661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP Frame Length %d\n", sg_req->length); 4267f5860992SSakthivel K if (!(length - 8)) 4268f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_DIRECT; 4269f5860992SSakthivel K else 4270f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_INDIRECT; 4271f5860992SSakthivel K 4272f5860992SSakthivel K 4273f5860992SSakthivel K tmp_addr = cpu_to_le64((u64)sg_dma_address(&task->smp_task.smp_req)); 4274f5860992SSakthivel K preq_dma_addr = (char *)phys_to_virt(tmp_addr); 4275f5860992SSakthivel K 4276f5860992SSakthivel K /* INDIRECT MODE command settings. Use DMA */ 4277f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) { 42781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP REQUEST INDIRECT MODE\n"); 4279f5860992SSakthivel K /* for SPCv indirect mode. Place the top 4 bytes of 4280f5860992SSakthivel K * SMP Request header here. */ 4281f5860992SSakthivel K for (i = 0; i < 4; i++) 4282f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr + i); 4283f5860992SSakthivel K /* exclude top 4 bytes for SMP req header */ 4284f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4285f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4286cb993e5dSAnand Kumar Santhanam (&task->smp_task.smp_req) + 4); 4287f5860992SSakthivel K /* exclude 4 bytes for SMP req header and CRC */ 4288f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4289f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-8); 4290f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4291f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4292f5860992SSakthivel K (&task->smp_task.smp_resp)); 4293f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4294f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len 4295f5860992SSakthivel K (&task->smp_task.smp_resp)-4); 4296f5860992SSakthivel K } else { /* DIRECT MODE */ 4297f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4298f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4299f5860992SSakthivel K (&task->smp_task.smp_req)); 4300f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4301f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-4); 4302f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4303f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4304f5860992SSakthivel K (&task->smp_task.smp_resp)); 4305f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4306f5860992SSakthivel K cpu_to_le32 4307f5860992SSakthivel K ((u32)sg_dma_len(&task->smp_task.smp_resp)-4); 4308f5860992SSakthivel K } 4309f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 43101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP REQUEST DIRECT MODE\n"); 4311f5860992SSakthivel K for (i = 0; i < length; i++) 4312f5860992SSakthivel K if (i < 16) { 4313f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr+i); 43141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4315f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4316f5860992SSakthivel K i, smp_cmd.smp_req16[i], 43171b5d2793SJoe Perches *(preq_dma_addr)); 4318f5860992SSakthivel K } else { 4319f5860992SSakthivel K smp_cmd.smp_req[i] = *(preq_dma_addr+i); 43201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4321f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4322f5860992SSakthivel K i, smp_cmd.smp_req[i], 43231b5d2793SJoe Perches *(preq_dma_addr)); 4324f5860992SSakthivel K } 4325f5860992SSakthivel K } 4326f5860992SSakthivel K 4327f5860992SSakthivel K build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag, 4328f5860992SSakthivel K &smp_cmd, pm8001_ha->smp_exp_mode, length); 432991a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd, 433091a43fa6Speter chang sizeof(smp_cmd), 0); 43315533abcaSTomas Henzl if (rc) 43325533abcaSTomas Henzl goto err_out_2; 4333f5860992SSakthivel K return 0; 4334f5860992SSakthivel K 4335f5860992SSakthivel K err_out_2: 4336f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1, 4337f73bdebdSChristoph Hellwig DMA_FROM_DEVICE); 4338f5860992SSakthivel K err_out: 4339f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1, 4340f73bdebdSChristoph Hellwig DMA_TO_DEVICE); 4341f5860992SSakthivel K return rc; 4342f5860992SSakthivel K } 4343f5860992SSakthivel K 4344f5860992SSakthivel K static int check_enc_sas_cmd(struct sas_task *task) 4345f5860992SSakthivel K { 4346e73823f7SJames Bottomley u8 cmd = task->ssp_task.cmd->cmnd[0]; 4347e73823f7SJames Bottomley 4348e73823f7SJames Bottomley if (cmd == READ_10 || cmd == WRITE_10 || cmd == WRITE_VERIFY) 4349f5860992SSakthivel K return 1; 4350f5860992SSakthivel K else 4351f5860992SSakthivel K return 0; 4352f5860992SSakthivel K } 4353f5860992SSakthivel K 4354f5860992SSakthivel K static int check_enc_sat_cmd(struct sas_task *task) 4355f5860992SSakthivel K { 4356f5860992SSakthivel K int ret = 0; 4357f5860992SSakthivel K switch (task->ata_task.fis.command) { 4358f5860992SSakthivel K case ATA_CMD_FPDMA_READ: 4359f5860992SSakthivel K case ATA_CMD_READ_EXT: 4360f5860992SSakthivel K case ATA_CMD_READ: 4361f5860992SSakthivel K case ATA_CMD_FPDMA_WRITE: 4362f5860992SSakthivel K case ATA_CMD_WRITE_EXT: 4363f5860992SSakthivel K case ATA_CMD_WRITE: 4364f5860992SSakthivel K case ATA_CMD_PIO_READ: 4365f5860992SSakthivel K case ATA_CMD_PIO_READ_EXT: 4366f5860992SSakthivel K case ATA_CMD_PIO_WRITE: 4367f5860992SSakthivel K case ATA_CMD_PIO_WRITE_EXT: 4368f5860992SSakthivel K ret = 1; 4369f5860992SSakthivel K break; 4370f5860992SSakthivel K default: 4371f5860992SSakthivel K ret = 0; 4372f5860992SSakthivel K break; 4373f5860992SSakthivel K } 4374f5860992SSakthivel K return ret; 4375f5860992SSakthivel K } 4376f5860992SSakthivel K 4377f5860992SSakthivel K /** 4378bb6beabfSRandy Dunlap * pm80xx_chip_ssp_io_req - send an SSP task to FW 4379f5860992SSakthivel K * @pm8001_ha: our hba card information. 4380f5860992SSakthivel K * @ccb: the ccb information this request used. 4381f5860992SSakthivel K */ 4382f5860992SSakthivel K static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, 4383f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4384f5860992SSakthivel K { 4385f5860992SSakthivel K struct sas_task *task = ccb->task; 4386f5860992SSakthivel K struct domain_device *dev = task->dev; 4387f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4388f5860992SSakthivel K struct ssp_ini_io_start_req ssp_cmd; 4389f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4390f5860992SSakthivel K int ret; 43910ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 43920ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4393f5860992SSakthivel K struct inbound_queue_table *circularQ; 439405c6c029SViswas G u32 q_index, cpu_id; 4395f5860992SSakthivel K u32 opc = OPC_INB_SSPINIIOSTART; 4396f5860992SSakthivel K memset(&ssp_cmd, 0, sizeof(ssp_cmd)); 4397f5860992SSakthivel K memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); 4398f5860992SSakthivel K /* data address domain added for spcv; set to 0 by host, 4399f5860992SSakthivel K * used internally by controller 4400f5860992SSakthivel K * 0 for SAS 1.1 and SAS 2.0 compatible TLR 4401f5860992SSakthivel K */ 4402f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = 4403f5860992SSakthivel K cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0); 4404f5860992SSakthivel K ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4405f5860992SSakthivel K ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); 4406f5860992SSakthivel K ssp_cmd.tag = cpu_to_le32(tag); 4407f5860992SSakthivel K if (task->ssp_task.enable_first_burst) 4408f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= 0x80; 4409f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_prio << 3); 4410f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_attr & 7); 4411e73823f7SJames Bottomley memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd, 4412e73823f7SJames Bottomley task->ssp_task.cmd->cmd_len); 441305c6c029SViswas G cpu_id = smp_processor_id(); 441405c6c029SViswas G q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); 4415f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4416f5860992SSakthivel K 4417f5860992SSakthivel K /* Check if encryption is set */ 4418f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4419f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) { 44201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4421f5860992SSakthivel K "Encryption enabled.Sending Encrypt SAS command 0x%x\n", 44221b5d2793SJoe Perches task->ssp_task.cmd->cmnd[0]); 4423f5860992SSakthivel K opc = OPC_INB_SSP_INI_DIF_ENC_IO; 4424f5860992SSakthivel K /* enable encryption. 0 for SAS 1.1 and SAS 2.0 compatible TLR*/ 4425f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = cpu_to_le32 4426f5860992SSakthivel K ((data_dir_flags[task->data_dir] << 8) | 0x20 | 0x0); 4427f5860992SSakthivel K 4428f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4429f5860992SSakthivel K if (task->num_scatter > 1) { 4430f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4431f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 44325a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4433f5860992SSakthivel K ssp_cmd.enc_addr_low = 4434f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4435f5860992SSakthivel K ssp_cmd.enc_addr_high = 4436f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4437f5860992SSakthivel K ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 4438f5860992SSakthivel K } else if (task->num_scatter == 1) { 4439f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4440f5860992SSakthivel K ssp_cmd.enc_addr_low = 4441f5860992SSakthivel K cpu_to_le32(lower_32_bits(dma_addr)); 4442f5860992SSakthivel K ssp_cmd.enc_addr_high = 4443f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4444f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4445f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 44460ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 44470ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 44480ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.enc_len) - 1; 44490ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 44500ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 44510ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.enc_addr_high) { 44521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 44531b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 44540ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.enc_len, 44551b5d2793SJoe Perches end_addr_high, end_addr_low); 44560ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 44570ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 44585a141315SViswas G phys_addr = ccb->ccb_dma_handle; 44590ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_low = 44600ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 44610ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_high = 44620ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 44630ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 44640ecdf00bSAnand Kumar Santhanam } 4465f5860992SSakthivel K } else if (task->num_scatter == 0) { 4466f5860992SSakthivel K ssp_cmd.enc_addr_low = 0; 4467f5860992SSakthivel K ssp_cmd.enc_addr_high = 0; 4468f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4469f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 4470f5860992SSakthivel K } 4471f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4472f5860992SSakthivel K ssp_cmd.key_cmode = 0x6 << 4; 4473f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4474e73823f7SJames Bottomley ssp_cmd.twk_val0 = cpu_to_le32((task->ssp_task.cmd->cmnd[2] << 24) | 4475e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[3] << 16) | 4476e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[4] << 8) | 4477e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[5])); 4478f5860992SSakthivel K } else { 44791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4480f5860992SSakthivel K "Sending Normal SAS command 0x%x inb q %x\n", 44811b5d2793SJoe Perches task->ssp_task.cmd->cmnd[0], q_index); 4482f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4483f5860992SSakthivel K if (task->num_scatter > 1) { 4484f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, ccb->n_elem, 4485f5860992SSakthivel K ccb->buf_prd); 44865a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4487f5860992SSakthivel K ssp_cmd.addr_low = 4488f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4489f5860992SSakthivel K ssp_cmd.addr_high = 4490f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4491f5860992SSakthivel K ssp_cmd.esgl = cpu_to_le32(1<<31); 4492f5860992SSakthivel K } else if (task->num_scatter == 1) { 4493f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4494f5860992SSakthivel K ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(dma_addr)); 4495f5860992SSakthivel K ssp_cmd.addr_high = 4496f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4497f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4498f5860992SSakthivel K ssp_cmd.esgl = 0; 44990ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 45000ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 45010ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.len) - 1; 45020ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 45030ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 45040ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.addr_high) { 45051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 45061b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 45070ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.len, 45081b5d2793SJoe Perches end_addr_high, end_addr_low); 45090ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 45100ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 45115a141315SViswas G phys_addr = ccb->ccb_dma_handle; 45120ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_low = 45130ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 45140ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_high = 45150ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 45160ecdf00bSAnand Kumar Santhanam ssp_cmd.esgl = cpu_to_le32(1<<31); 45170ecdf00bSAnand Kumar Santhanam } 4518f5860992SSakthivel K } else if (task->num_scatter == 0) { 4519f5860992SSakthivel K ssp_cmd.addr_low = 0; 4520f5860992SSakthivel K ssp_cmd.addr_high = 0; 4521f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4522f5860992SSakthivel K ssp_cmd.esgl = 0; 4523f5860992SSakthivel K } 4524f5860992SSakthivel K } 4525f9cd6cbdSAnand Kumar Santhanam ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 452691a43fa6Speter chang &ssp_cmd, sizeof(ssp_cmd), q_index); 4527f5860992SSakthivel K return ret; 4528f5860992SSakthivel K } 4529f5860992SSakthivel K 4530f5860992SSakthivel K static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, 4531f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4532f5860992SSakthivel K { 4533f5860992SSakthivel K struct sas_task *task = ccb->task; 4534f5860992SSakthivel K struct domain_device *dev = task->dev; 4535f5860992SSakthivel K struct pm8001_device *pm8001_ha_dev = dev->lldd_dev; 45368ceddda3SChangyuan Lyu struct ata_queued_cmd *qc = task->uldd_task; 4537f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4538f5860992SSakthivel K int ret; 453905c6c029SViswas G u32 q_index, cpu_id; 4540f5860992SSakthivel K struct sata_start_req sata_cmd; 4541f5860992SSakthivel K u32 hdr_tag, ncg_tag = 0; 45420ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 45430ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4544f5860992SSakthivel K u32 ATAP = 0x0; 4545f5860992SSakthivel K u32 dir; 4546f5860992SSakthivel K struct inbound_queue_table *circularQ; 4547c6b9ef57SSakthivel K unsigned long flags; 4548f5860992SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 4549f5860992SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 455005c6c029SViswas G cpu_id = smp_processor_id(); 455105c6c029SViswas G q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); 4552f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4553f5860992SSakthivel K 4554f73bdebdSChristoph Hellwig if (task->data_dir == DMA_NONE) { 4555f5860992SSakthivel K ATAP = 0x04; /* no data*/ 45561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "no data\n"); 4557f5860992SSakthivel K } else if (likely(!task->ata_task.device_control_reg_update)) { 4558f5860992SSakthivel K if (task->ata_task.dma_xfer) { 4559f5860992SSakthivel K ATAP = 0x06; /* DMA */ 45601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "DMA\n"); 4561f5860992SSakthivel K } else { 4562f5860992SSakthivel K ATAP = 0x05; /* PIO*/ 45631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "PIO\n"); 4564f5860992SSakthivel K } 4565f5860992SSakthivel K if (task->ata_task.use_ncq && 45661cbd772dSHannes Reinecke dev->sata_dev.class != ATA_DEV_ATAPI) { 4567f5860992SSakthivel K ATAP = 0x07; /* FPDMA */ 45681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "FPDMA\n"); 4569f5860992SSakthivel K } 4570f5860992SSakthivel K } 4571c6b9ef57SSakthivel K if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) { 4572c6b9ef57SSakthivel K task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 4573f5860992SSakthivel K ncg_tag = hdr_tag; 4574c6b9ef57SSakthivel K } 4575f5860992SSakthivel K dir = data_dir_flags[task->data_dir] << 8; 4576f5860992SSakthivel K sata_cmd.tag = cpu_to_le32(tag); 4577f5860992SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 4578f5860992SSakthivel K sata_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4579f5860992SSakthivel K 4580f5860992SSakthivel K sata_cmd.sata_fis = task->ata_task.fis; 4581f5860992SSakthivel K if (likely(!task->ata_task.device_control_reg_update)) 4582f5860992SSakthivel K sata_cmd.sata_fis.flags |= 0x80;/* C=1: update ATA cmd reg */ 4583f5860992SSakthivel K sata_cmd.sata_fis.flags &= 0xF0;/* PM_PORT field shall be 0 */ 4584f5860992SSakthivel K 4585f5860992SSakthivel K /* Check if encryption is set */ 4586f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4587f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) { 45881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4589f5860992SSakthivel K "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n", 45901b5d2793SJoe Perches sata_cmd.sata_fis.command); 4591f5860992SSakthivel K opc = OPC_INB_SATA_DIF_ENC_IO; 4592f5860992SSakthivel K 4593f5860992SSakthivel K /* set encryption bit */ 4594f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4595f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16)| 4596f5860992SSakthivel K ((ATAP & 0x3f) << 10) | 0x20 | dir); 4597f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4598f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4599f5860992SSakthivel K if (task->num_scatter > 1) { 4600f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4601f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 46025a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4603f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(phys_addr); 4604f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(phys_addr); 4605f5860992SSakthivel K sata_cmd.enc_esgl = cpu_to_le32(1 << 31); 4606f5860992SSakthivel K } else if (task->num_scatter == 1) { 4607f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4608f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(dma_addr); 4609f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(dma_addr); 4610f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4611f5860992SSakthivel K sata_cmd.enc_esgl = 0; 46120ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 46130ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 46140ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.enc_len) - 1; 46150ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 46160ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 46170ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.enc_addr_high) { 46181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 46191b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 46200ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.enc_len, 46211b5d2793SJoe Perches end_addr_high, end_addr_low); 46220ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 46230ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 46245a141315SViswas G phys_addr = ccb->ccb_dma_handle; 46250ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_low = 46260ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 46270ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_high = 46280ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 46290ecdf00bSAnand Kumar Santhanam sata_cmd.enc_esgl = 46300ecdf00bSAnand Kumar Santhanam cpu_to_le32(1 << 31); 46310ecdf00bSAnand Kumar Santhanam } 4632f5860992SSakthivel K } else if (task->num_scatter == 0) { 4633f5860992SSakthivel K sata_cmd.enc_addr_low = 0; 4634f5860992SSakthivel K sata_cmd.enc_addr_high = 0; 4635f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4636f5860992SSakthivel K sata_cmd.enc_esgl = 0; 4637f5860992SSakthivel K } 4638f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4639f5860992SSakthivel K sata_cmd.key_index_mode = 0x6 << 4; 4640f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4641f5860992SSakthivel K sata_cmd.twk_val0 = 4642f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbal_exp << 24) | 4643f5860992SSakthivel K (sata_cmd.sata_fis.lbah << 16) | 4644f5860992SSakthivel K (sata_cmd.sata_fis.lbam << 8) | 4645f5860992SSakthivel K (sata_cmd.sata_fis.lbal)); 4646f5860992SSakthivel K sata_cmd.twk_val1 = 4647f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbah_exp << 8) | 4648f5860992SSakthivel K (sata_cmd.sata_fis.lbam_exp)); 4649f5860992SSakthivel K } else { 46501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4651f5860992SSakthivel K "Sending Normal SATA command 0x%x inb %x\n", 46521b5d2793SJoe Perches sata_cmd.sata_fis.command, q_index); 4653f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4654f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4655f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16) | 4656f5860992SSakthivel K ((ATAP & 0x3f) << 10) | dir); 4657f5860992SSakthivel K 4658f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4659f5860992SSakthivel K if (task->num_scatter > 1) { 4660f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4661f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 46625a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4663f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(phys_addr); 4664f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(phys_addr); 4665f5860992SSakthivel K sata_cmd.esgl = cpu_to_le32(1 << 31); 4666f5860992SSakthivel K } else if (task->num_scatter == 1) { 4667f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4668f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(dma_addr); 4669f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(dma_addr); 4670f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4671f5860992SSakthivel K sata_cmd.esgl = 0; 46720ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 46730ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 46740ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.len) - 1; 46750ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 46760ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 46770ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.addr_high) { 46781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 46791b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%xend_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 46800ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.len, 46811b5d2793SJoe Perches end_addr_high, end_addr_low); 46820ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 46830ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 46845a141315SViswas G phys_addr = ccb->ccb_dma_handle; 46850ecdf00bSAnand Kumar Santhanam sata_cmd.addr_low = 46860ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 46870ecdf00bSAnand Kumar Santhanam sata_cmd.addr_high = 46880ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 46890ecdf00bSAnand Kumar Santhanam sata_cmd.esgl = cpu_to_le32(1 << 31); 46900ecdf00bSAnand Kumar Santhanam } 4691f5860992SSakthivel K } else if (task->num_scatter == 0) { 4692f5860992SSakthivel K sata_cmd.addr_low = 0; 4693f5860992SSakthivel K sata_cmd.addr_high = 0; 4694f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4695f5860992SSakthivel K sata_cmd.esgl = 0; 4696f5860992SSakthivel K } 4697f5860992SSakthivel K /* scsi cdb */ 4698f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[0] = 4699f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[0]) | 4700f5860992SSakthivel K (task->ata_task.atapi_packet[1] << 8) | 4701f5860992SSakthivel K (task->ata_task.atapi_packet[2] << 16) | 4702f5860992SSakthivel K (task->ata_task.atapi_packet[3] << 24))); 4703f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[1] = 4704f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[4]) | 4705f5860992SSakthivel K (task->ata_task.atapi_packet[5] << 8) | 4706f5860992SSakthivel K (task->ata_task.atapi_packet[6] << 16) | 4707f5860992SSakthivel K (task->ata_task.atapi_packet[7] << 24))); 4708f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[2] = 4709f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[8]) | 4710f5860992SSakthivel K (task->ata_task.atapi_packet[9] << 8) | 4711f5860992SSakthivel K (task->ata_task.atapi_packet[10] << 16) | 4712f5860992SSakthivel K (task->ata_task.atapi_packet[11] << 24))); 4713f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[3] = 4714f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[12]) | 4715f5860992SSakthivel K (task->ata_task.atapi_packet[13] << 8) | 4716f5860992SSakthivel K (task->ata_task.atapi_packet[14] << 16) | 4717f5860992SSakthivel K (task->ata_task.atapi_packet[15] << 24))); 4718f5860992SSakthivel K } 4719c6b9ef57SSakthivel K 4720c6b9ef57SSakthivel K /* Check for read log for failed drive and return */ 4721c6b9ef57SSakthivel K if (sata_cmd.sata_fis.command == 0x2f) { 4722c6b9ef57SSakthivel K if (pm8001_ha_dev && ((pm8001_ha_dev->id & NCQ_READ_LOG_FLAG) || 4723c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_ABORT_ALL_FLAG) || 4724c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_2ND_RLE_FLAG))) { 4725c6b9ef57SSakthivel K struct task_status_struct *ts; 4726c6b9ef57SSakthivel K 4727c6b9ef57SSakthivel K pm8001_ha_dev->id &= 0xDFFFFFFF; 4728c6b9ef57SSakthivel K ts = &task->task_status; 4729c6b9ef57SSakthivel K 4730c6b9ef57SSakthivel K spin_lock_irqsave(&task->task_state_lock, flags); 4731c6b9ef57SSakthivel K ts->resp = SAS_TASK_COMPLETE; 4732d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_GOOD; 4733c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_STATE_PENDING; 4734c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 4735c6b9ef57SSakthivel K task->task_state_flags |= SAS_TASK_STATE_DONE; 4736c6b9ef57SSakthivel K if (unlikely((task->task_state_flags & 4737c6b9ef57SSakthivel K SAS_TASK_STATE_ABORTED))) { 4738c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4739c6b9ef57SSakthivel K flags); 47401b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 47411b5d2793SJoe Perches "task 0x%p resp 0x%x stat 0x%x but aborted by upper layer\n", 47421b5d2793SJoe Perches task, ts->resp, 47431b5d2793SJoe Perches ts->stat); 4744c6b9ef57SSakthivel K pm8001_ccb_task_free(pm8001_ha, task, ccb, tag); 4745c6b9ef57SSakthivel K return 0; 47462b01d816SSuresh Thiagarajan } else { 4747c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4748c6b9ef57SSakthivel K flags); 47492b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, task, 47502b01d816SSuresh Thiagarajan ccb, tag); 47514a2efd4bSViswas G atomic_dec(&pm8001_ha_dev->running_req); 4752c6b9ef57SSakthivel K return 0; 4753c6b9ef57SSakthivel K } 4754c6b9ef57SSakthivel K } 4755c6b9ef57SSakthivel K } 47568ceddda3SChangyuan Lyu trace_pm80xx_request_issue(pm8001_ha->id, 47578ceddda3SChangyuan Lyu ccb->device ? ccb->device->attached_phy : PM8001_MAX_PHYS, 47588ceddda3SChangyuan Lyu ccb->ccb_tag, opc, 47598ceddda3SChangyuan Lyu qc ? qc->tf.command : 0, // ata opcode 47608ceddda3SChangyuan Lyu ccb->device ? atomic_read(&ccb->device->running_req) : 0); 4761f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 476291a43fa6Speter chang &sata_cmd, sizeof(sata_cmd), q_index); 4763f5860992SSakthivel K return ret; 4764f5860992SSakthivel K } 4765f5860992SSakthivel K 4766f5860992SSakthivel K /** 4767f5860992SSakthivel K * pm80xx_chip_phy_start_req - start phy via PHY_START COMMAND 4768f5860992SSakthivel K * @pm8001_ha: our hba card information. 4769f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4770f5860992SSakthivel K */ 4771f5860992SSakthivel K static int 4772f5860992SSakthivel K pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) 4773f5860992SSakthivel K { 4774f5860992SSakthivel K struct phy_start_req payload; 4775f5860992SSakthivel K struct inbound_queue_table *circularQ; 4776f5860992SSakthivel K int ret; 4777f5860992SSakthivel K u32 tag = 0x01; 4778f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTART; 4779f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4780f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4781f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4782f5860992SSakthivel K 47831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PHY START REQ for phy_id %d\n", phy_id); 4784a9a923e5SAnand Kumar Santhanam 47853e253d96Speter chang payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE | 47863e253d96Speter chang LINKMODE_AUTO | pm8001_ha->link_rate | phy_id); 4787f5860992SSakthivel K /* SSC Disable and SAS Analog ST configuration */ 4788bb6beabfSRandy Dunlap /* 4789f5860992SSakthivel K payload.ase_sh_lm_slr_phyid = 4790f5860992SSakthivel K cpu_to_le32(SSC_DISABLE_30 | SAS_ASE | SPINHOLD_DISABLE | 4791f5860992SSakthivel K LINKMODE_AUTO | LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | 4792f5860992SSakthivel K phy_id); 4793f5860992SSakthivel K Have to add "SAS PHY Analog Setup SPASTI 1 Byte" Based on need 4794bb6beabfSRandy Dunlap */ 4795f5860992SSakthivel K 4796aa9f8328SJames Bottomley payload.sas_identify.dev_type = SAS_END_DEVICE; 4797f5860992SSakthivel K payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL; 4798f5860992SSakthivel K memcpy(payload.sas_identify.sas_addr, 47993e253d96Speter chang &pm8001_ha->sas_addr, SAS_ADDR_SIZE); 4800f5860992SSakthivel K payload.sas_identify.phy_id = phy_id; 480191a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 480291a43fa6Speter chang sizeof(payload), 0); 4803f5860992SSakthivel K return ret; 4804f5860992SSakthivel K } 4805f5860992SSakthivel K 4806f5860992SSakthivel K /** 48077cdaf12eSLee Jones * pm80xx_chip_phy_stop_req - start phy via PHY_STOP COMMAND 4808f5860992SSakthivel K * @pm8001_ha: our hba card information. 4809f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4810f5860992SSakthivel K */ 4811f5860992SSakthivel K static int pm80xx_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha, 4812f5860992SSakthivel K u8 phy_id) 4813f5860992SSakthivel K { 4814f5860992SSakthivel K struct phy_stop_req payload; 4815f5860992SSakthivel K struct inbound_queue_table *circularQ; 4816f5860992SSakthivel K int ret; 4817f5860992SSakthivel K u32 tag = 0x01; 4818f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTOP; 4819f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4820f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4821f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4822f5860992SSakthivel K payload.phy_id = cpu_to_le32(phy_id); 482391a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 482491a43fa6Speter chang sizeof(payload), 0); 4825f5860992SSakthivel K return ret; 4826f5860992SSakthivel K } 4827f5860992SSakthivel K 48286ad4a517SLee Jones /* 4829f5860992SSakthivel K * see comments on pm8001_mpi_reg_resp. 4830f5860992SSakthivel K */ 4831f5860992SSakthivel K static int pm80xx_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha, 4832f5860992SSakthivel K struct pm8001_device *pm8001_dev, u32 flag) 4833f5860992SSakthivel K { 4834f5860992SSakthivel K struct reg_dev_req payload; 4835f5860992SSakthivel K u32 opc; 4836f5860992SSakthivel K u32 stp_sspsmp_sata = 0x4; 4837f5860992SSakthivel K struct inbound_queue_table *circularQ; 4838f5860992SSakthivel K u32 linkrate, phy_id; 4839f5860992SSakthivel K int rc, tag = 0xdeadbeef; 4840f5860992SSakthivel K struct pm8001_ccb_info *ccb; 4841f5860992SSakthivel K u8 retryFlag = 0x1; 4842f5860992SSakthivel K u16 firstBurstSize = 0; 4843f5860992SSakthivel K u16 ITNT = 2000; 4844f5860992SSakthivel K struct domain_device *dev = pm8001_dev->sas_device; 4845f5860992SSakthivel K struct domain_device *parent_dev = dev->parent; 484608d0a992SAjish Koshy struct pm8001_port *port = dev->port->lldd_port; 4847f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4848f5860992SSakthivel K 4849f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4850f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 4851f5860992SSakthivel K if (rc) 4852f5860992SSakthivel K return rc; 4853f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 4854f5860992SSakthivel K ccb->device = pm8001_dev; 4855f5860992SSakthivel K ccb->ccb_tag = tag; 4856f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4857f5860992SSakthivel K 4858f5860992SSakthivel K if (flag == 1) { 4859f5860992SSakthivel K stp_sspsmp_sata = 0x02; /*direct attached sata */ 4860f5860992SSakthivel K } else { 4861aa9f8328SJames Bottomley if (pm8001_dev->dev_type == SAS_SATA_DEV) 4862f5860992SSakthivel K stp_sspsmp_sata = 0x00; /* stp*/ 4863aa9f8328SJames Bottomley else if (pm8001_dev->dev_type == SAS_END_DEVICE || 48644f632918SIgor Pylypiv dev_is_expander(pm8001_dev->dev_type)) 4865f5860992SSakthivel K stp_sspsmp_sata = 0x01; /*ssp or smp*/ 4866f5860992SSakthivel K } 4867924a3541SJohn Garry if (parent_dev && dev_is_expander(parent_dev->dev_type)) 4868f5860992SSakthivel K phy_id = parent_dev->ex_dev.ex_phy->phy_id; 4869f5860992SSakthivel K else 4870f5860992SSakthivel K phy_id = pm8001_dev->attached_phy; 4871f5860992SSakthivel K 4872f5860992SSakthivel K opc = OPC_INB_REG_DEV; 4873f5860992SSakthivel K 4874f5860992SSakthivel K linkrate = (pm8001_dev->sas_device->linkrate < dev->port->linkrate) ? 4875f5860992SSakthivel K pm8001_dev->sas_device->linkrate : dev->port->linkrate; 4876f5860992SSakthivel K 4877f5860992SSakthivel K payload.phyid_portid = 487808d0a992SAjish Koshy cpu_to_le32(((port->port_id) & 0xFF) | 4879f5860992SSakthivel K ((phy_id & 0xFF) << 8)); 4880f5860992SSakthivel K 4881f5860992SSakthivel K payload.dtype_dlr_mcn_ir_retry = cpu_to_le32((retryFlag & 0x01) | 4882f5860992SSakthivel K ((linkrate & 0x0F) << 24) | 4883f5860992SSakthivel K ((stp_sspsmp_sata & 0x03) << 28)); 4884f5860992SSakthivel K payload.firstburstsize_ITNexustimeout = 4885f5860992SSakthivel K cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); 4886f5860992SSakthivel K 4887f5860992SSakthivel K memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr, 4888f5860992SSakthivel K SAS_ADDR_SIZE); 4889f5860992SSakthivel K 489091a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 489191a43fa6Speter chang sizeof(payload), 0); 48925533abcaSTomas Henzl if (rc) 48935533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 4894f5860992SSakthivel K 4895f5860992SSakthivel K return rc; 4896f5860992SSakthivel K } 4897f5860992SSakthivel K 4898f5860992SSakthivel K /** 4899f5860992SSakthivel K * pm80xx_chip_phy_ctl_req - support the local phy operation 4900f5860992SSakthivel K * @pm8001_ha: our hba card information. 49016ad4a517SLee Jones * @phyId: the phy id which we wanted to operate 49026ad4a517SLee Jones * @phy_op: phy operation to request 4903f5860992SSakthivel K */ 4904f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 4905f5860992SSakthivel K u32 phyId, u32 phy_op) 4906f5860992SSakthivel K { 490725c6edbdSViswas G u32 tag; 490825c6edbdSViswas G int rc; 4909f5860992SSakthivel K struct local_phy_ctl_req payload; 4910f5860992SSakthivel K struct inbound_queue_table *circularQ; 4911f5860992SSakthivel K u32 opc = OPC_INB_LOCAL_PHY_CONTROL; 4912f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 491325c6edbdSViswas G rc = pm8001_tag_alloc(pm8001_ha, &tag); 491425c6edbdSViswas G if (rc) 491525c6edbdSViswas G return rc; 4916f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 491725c6edbdSViswas G payload.tag = cpu_to_le32(tag); 4918f5860992SSakthivel K payload.phyop_phyid = 4919f5860992SSakthivel K cpu_to_le32(((phy_op & 0xFF) << 8) | (phyId & 0xFF)); 492091a43fa6Speter chang return pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 492191a43fa6Speter chang sizeof(payload), 0); 4922f5860992SSakthivel K } 4923f5860992SSakthivel K 4924f310a4eaSColin Ian King static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) 4925f5860992SSakthivel K { 4926f5860992SSakthivel K #ifdef PM8001_USE_MSIX 4927f5860992SSakthivel K return 1; 4928292c04ccSColin Ian King #else 4929292c04ccSColin Ian King u32 value; 4930292c04ccSColin Ian King 4931f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); 4932f5860992SSakthivel K if (value) 4933f5860992SSakthivel K return 1; 4934f5860992SSakthivel K return 0; 4935292c04ccSColin Ian King #endif 4936f5860992SSakthivel K } 4937f5860992SSakthivel K 4938f5860992SSakthivel K /** 49397cdaf12eSLee Jones * pm80xx_chip_isr - PM8001 isr handler. 4940f5860992SSakthivel K * @pm8001_ha: our hba card information. 49416ad4a517SLee Jones * @vec: irq number. 4942f5860992SSakthivel K */ 4943f5860992SSakthivel K static irqreturn_t 4944f5860992SSakthivel K pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec) 4945f5860992SSakthivel K { 4946f5860992SSakthivel K pm80xx_chip_interrupt_disable(pm8001_ha, vec); 49471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 49487370672dSpeter chang "irq vec %d, ODMR:0x%x\n", 49491b5d2793SJoe Perches vec, pm8001_cr32(pm8001_ha, 0, 0x30)); 4950f5860992SSakthivel K process_oq(pm8001_ha, vec); 4951f5860992SSakthivel K pm80xx_chip_interrupt_enable(pm8001_ha, vec); 4952f5860992SSakthivel K return IRQ_HANDLED; 4953f5860992SSakthivel K } 4954f5860992SSakthivel K 4955ea310f57SLee Jones static void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha, 4956ea310f57SLee Jones u32 operation, u32 phyid, 4957ea310f57SLee Jones u32 length, u32 *buf) 495827909407SAnand Kumar Santhanam { 495927909407SAnand Kumar Santhanam u32 tag, i, j = 0; 496027909407SAnand Kumar Santhanam int rc; 496127909407SAnand Kumar Santhanam struct set_phy_profile_req payload; 496227909407SAnand Kumar Santhanam struct inbound_queue_table *circularQ; 496327909407SAnand Kumar Santhanam u32 opc = OPC_INB_SET_PHY_PROFILE; 496427909407SAnand Kumar Santhanam 496527909407SAnand Kumar Santhanam memset(&payload, 0, sizeof(payload)); 496627909407SAnand Kumar Santhanam rc = pm8001_tag_alloc(pm8001_ha, &tag); 496727909407SAnand Kumar Santhanam if (rc) 49681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Invalid tag\n"); 496927909407SAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[0]; 497027909407SAnand Kumar Santhanam payload.tag = cpu_to_le32(tag); 497127909407SAnand Kumar Santhanam payload.ppc_phyid = (((operation & 0xF) << 8) | (phyid & 0xFF)); 49721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 49731b5d2793SJoe Perches " phy profile command for phy %x ,length is %d\n", 49741b5d2793SJoe Perches payload.ppc_phyid, length); 497527909407SAnand Kumar Santhanam for (i = length; i < (length + PHY_DWORD_LENGTH - 1); i++) { 497627909407SAnand Kumar Santhanam payload.reserved[j] = cpu_to_le32(*((u32 *)buf + i)); 497727909407SAnand Kumar Santhanam j++; 497827909407SAnand Kumar Santhanam } 497991a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 498091a43fa6Speter chang sizeof(payload), 0); 49815533abcaSTomas Henzl if (rc) 49825533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 498327909407SAnand Kumar Santhanam } 498427909407SAnand Kumar Santhanam 498527909407SAnand Kumar Santhanam void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha, 498627909407SAnand Kumar Santhanam u32 length, u8 *buf) 498727909407SAnand Kumar Santhanam { 4988fdd0a66bSYueHaibing u32 i; 498927909407SAnand Kumar Santhanam 499027909407SAnand Kumar Santhanam for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 499127909407SAnand Kumar Santhanam mpi_set_phy_profile_req(pm8001_ha, 499227909407SAnand Kumar Santhanam SAS_PHY_ANALOG_SETTINGS_PAGE, i, length, (u32 *)buf); 499327909407SAnand Kumar Santhanam length = length + PHY_DWORD_LENGTH; 499427909407SAnand Kumar Santhanam } 49951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "phy settings completed\n"); 499627909407SAnand Kumar Santhanam } 4997c5614df7SBenjamin Rood 4998c5614df7SBenjamin Rood void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha, 4999c5614df7SBenjamin Rood u32 phy, u32 length, u32 *buf) 5000c5614df7SBenjamin Rood { 5001c5614df7SBenjamin Rood u32 tag, opc; 5002c5614df7SBenjamin Rood int rc, i; 5003c5614df7SBenjamin Rood struct set_phy_profile_req payload; 5004c5614df7SBenjamin Rood struct inbound_queue_table *circularQ; 5005c5614df7SBenjamin Rood 5006c5614df7SBenjamin Rood memset(&payload, 0, sizeof(payload)); 5007c5614df7SBenjamin Rood 5008c5614df7SBenjamin Rood rc = pm8001_tag_alloc(pm8001_ha, &tag); 5009c5614df7SBenjamin Rood if (rc) 50101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Invalid tag\n"); 5011c5614df7SBenjamin Rood 5012c5614df7SBenjamin Rood circularQ = &pm8001_ha->inbnd_q_tbl[0]; 5013c5614df7SBenjamin Rood opc = OPC_INB_SET_PHY_PROFILE; 5014c5614df7SBenjamin Rood 5015c5614df7SBenjamin Rood payload.tag = cpu_to_le32(tag); 5016c5614df7SBenjamin Rood payload.ppc_phyid = (((SAS_PHY_ANALOG_SETTINGS_PAGE & 0xF) << 8) 5017c5614df7SBenjamin Rood | (phy & 0xFF)); 5018c5614df7SBenjamin Rood 5019c5614df7SBenjamin Rood for (i = 0; i < length; i++) 5020c5614df7SBenjamin Rood payload.reserved[i] = cpu_to_le32(*(buf + i)); 5021c5614df7SBenjamin Rood 502291a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 502391a43fa6Speter chang sizeof(payload), 0); 5024c5614df7SBenjamin Rood if (rc) 5025c5614df7SBenjamin Rood pm8001_tag_free(pm8001_ha, tag); 5026c5614df7SBenjamin Rood 50271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PHY %d settings applied\n", phy); 5028c5614df7SBenjamin Rood } 5029f5860992SSakthivel K const struct pm8001_dispatch pm8001_80xx_dispatch = { 5030f5860992SSakthivel K .name = "pmc80xx", 5031f5860992SSakthivel K .chip_init = pm80xx_chip_init, 5032f5860992SSakthivel K .chip_soft_rst = pm80xx_chip_soft_rst, 5033f5860992SSakthivel K .chip_rst = pm80xx_hw_chip_rst, 5034f5860992SSakthivel K .chip_iounmap = pm8001_chip_iounmap, 5035f5860992SSakthivel K .isr = pm80xx_chip_isr, 5036f310a4eaSColin Ian King .is_our_interrupt = pm80xx_chip_is_our_interrupt, 5037f5860992SSakthivel K .isr_process_oq = process_oq, 5038f5860992SSakthivel K .interrupt_enable = pm80xx_chip_interrupt_enable, 5039f5860992SSakthivel K .interrupt_disable = pm80xx_chip_interrupt_disable, 5040f5860992SSakthivel K .make_prd = pm8001_chip_make_sg, 5041f5860992SSakthivel K .smp_req = pm80xx_chip_smp_req, 5042f5860992SSakthivel K .ssp_io_req = pm80xx_chip_ssp_io_req, 5043f5860992SSakthivel K .sata_req = pm80xx_chip_sata_req, 5044f5860992SSakthivel K .phy_start_req = pm80xx_chip_phy_start_req, 5045f5860992SSakthivel K .phy_stop_req = pm80xx_chip_phy_stop_req, 5046f5860992SSakthivel K .reg_dev_req = pm80xx_chip_reg_dev_req, 5047f5860992SSakthivel K .dereg_dev_req = pm8001_chip_dereg_dev_req, 5048f5860992SSakthivel K .phy_ctl_req = pm80xx_chip_phy_ctl_req, 5049f5860992SSakthivel K .task_abort = pm8001_chip_abort_task, 5050f5860992SSakthivel K .ssp_tm_req = pm8001_chip_ssp_tm_req, 5051f5860992SSakthivel K .get_nvmd_req = pm8001_chip_get_nvmd_req, 5052f5860992SSakthivel K .set_nvmd_req = pm8001_chip_set_nvmd_req, 5053f5860992SSakthivel K .fw_flash_update_req = pm8001_chip_fw_flash_update_req, 5054f5860992SSakthivel K .set_dev_state_req = pm8001_chip_set_dev_state_req, 5055a961ea0aSakshatzen .fatal_errors = pm80xx_fatal_errors, 5056*ee05cb71SAjish Koshy .hw_event_ack_req = pm80xx_hw_event_ack_req, 5057f5860992SSakthivel K }; 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