1f5860992SSakthivel K /* 2f5860992SSakthivel K * PMC-Sierra SPCv/ve 8088/8089 SAS/SATA based host adapters driver 3f5860992SSakthivel K * 4f5860992SSakthivel K * Copyright (c) 2008-2009 PMC-Sierra, Inc., 5f5860992SSakthivel K * All rights reserved. 6f5860992SSakthivel K * 7f5860992SSakthivel K * Redistribution and use in source and binary forms, with or without 8f5860992SSakthivel K * modification, are permitted provided that the following conditions 9f5860992SSakthivel K * are met: 10f5860992SSakthivel K * 1. Redistributions of source code must retain the above copyright 11f5860992SSakthivel K * notice, this list of conditions, and the following disclaimer, 12f5860992SSakthivel K * without modification. 13f5860992SSakthivel K * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14f5860992SSakthivel K * substantially similar to the "NO WARRANTY" disclaimer below 15f5860992SSakthivel K * ("Disclaimer") and any redistribution must be conditioned upon 16f5860992SSakthivel K * including a substantially similar Disclaimer requirement for further 17f5860992SSakthivel K * binary redistribution. 18f5860992SSakthivel K * 3. Neither the names of the above-listed copyright holders nor the names 19f5860992SSakthivel K * of any contributors may be used to endorse or promote products derived 20f5860992SSakthivel K * from this software without specific prior written permission. 21f5860992SSakthivel K * 22f5860992SSakthivel K * Alternatively, this software may be distributed under the terms of the 23f5860992SSakthivel K * GNU General Public License ("GPL") version 2 as published by the Free 24f5860992SSakthivel K * Software Foundation. 25f5860992SSakthivel K * 26f5860992SSakthivel K * NO WARRANTY 27f5860992SSakthivel K * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28f5860992SSakthivel K * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29f5860992SSakthivel K * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30f5860992SSakthivel K * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31f5860992SSakthivel K * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32f5860992SSakthivel K * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33f5860992SSakthivel K * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34f5860992SSakthivel K * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35f5860992SSakthivel K * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36f5860992SSakthivel K * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37f5860992SSakthivel K * POSSIBILITY OF SUCH DAMAGES. 38f5860992SSakthivel K * 39f5860992SSakthivel K */ 40f5860992SSakthivel K #include <linux/slab.h> 41f5860992SSakthivel K #include "pm8001_sas.h" 42f5860992SSakthivel K #include "pm80xx_hwi.h" 43f5860992SSakthivel K #include "pm8001_chips.h" 44f5860992SSakthivel K #include "pm8001_ctl.h" 45f5860992SSakthivel K 46f5860992SSakthivel K #define SMP_DIRECT 1 47f5860992SSakthivel K #define SMP_INDIRECT 2 48d078b511SAnand Kumar Santhanam 49d078b511SAnand Kumar Santhanam 50d078b511SAnand Kumar Santhanam int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shift_value) 51d078b511SAnand Kumar Santhanam { 52d078b511SAnand Kumar Santhanam u32 reg_val; 53d078b511SAnand Kumar Santhanam unsigned long start; 54d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, shift_value); 55d078b511SAnand Kumar Santhanam /* confirm the setting is written */ 56d078b511SAnand Kumar Santhanam start = jiffies + HZ; /* 1 sec */ 57d078b511SAnand Kumar Santhanam do { 58d078b511SAnand Kumar Santhanam reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER); 59d078b511SAnand Kumar Santhanam } while ((reg_val != shift_value) && time_before(jiffies, start)); 60d078b511SAnand Kumar Santhanam if (reg_val != shift_value) { 611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MEMBASE_II_SHIFT_REGISTER = 0x%x\n", 621b5d2793SJoe Perches reg_val); 63d078b511SAnand Kumar Santhanam return -1; 64d078b511SAnand Kumar Santhanam } 65d078b511SAnand Kumar Santhanam return 0; 66d078b511SAnand Kumar Santhanam } 67d078b511SAnand Kumar Santhanam 68ea310f57SLee Jones static void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset, 69d078b511SAnand Kumar Santhanam const void *destination, 70d078b511SAnand Kumar Santhanam u32 dw_count, u32 bus_base_number) 71d078b511SAnand Kumar Santhanam { 72d078b511SAnand Kumar Santhanam u32 index, value, offset; 73d078b511SAnand Kumar Santhanam u32 *destination1; 74d078b511SAnand Kumar Santhanam destination1 = (u32 *)destination; 75d078b511SAnand Kumar Santhanam 76d078b511SAnand Kumar Santhanam for (index = 0; index < dw_count; index += 4, destination1++) { 77044f59deSDeepak Ukey offset = (soffset + index); 78d078b511SAnand Kumar Santhanam if (offset < (64 * 1024)) { 79d078b511SAnand Kumar Santhanam value = pm8001_cr32(pm8001_ha, bus_base_number, offset); 80d078b511SAnand Kumar Santhanam *destination1 = cpu_to_le32(value); 81d078b511SAnand Kumar Santhanam } 82d078b511SAnand Kumar Santhanam } 83d078b511SAnand Kumar Santhanam return; 84d078b511SAnand Kumar Santhanam } 85d078b511SAnand Kumar Santhanam 86d078b511SAnand Kumar Santhanam ssize_t pm80xx_get_fatal_dump(struct device *cdev, 87d078b511SAnand Kumar Santhanam struct device_attribute *attr, char *buf) 88d078b511SAnand Kumar Santhanam { 89d078b511SAnand Kumar Santhanam struct Scsi_Host *shost = class_to_shost(cdev); 90d078b511SAnand Kumar Santhanam struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 91d078b511SAnand Kumar Santhanam struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 92d078b511SAnand Kumar Santhanam void __iomem *fatal_table_address = pm8001_ha->fatal_tbl_addr; 93d078b511SAnand Kumar Santhanam u32 accum_len , reg_val, index, *temp; 94044f59deSDeepak Ukey u32 status = 1; 95d078b511SAnand Kumar Santhanam unsigned long start; 96d078b511SAnand Kumar Santhanam u8 *direct_data; 97d078b511SAnand Kumar Santhanam char *fatal_error_data = buf; 98044f59deSDeepak Ukey u32 length_to_read; 99044f59deSDeepak Ukey u32 offset; 100d078b511SAnand Kumar Santhanam 101d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = buf; 102d078b511SAnand Kumar Santhanam if (pm8001_ha->chip_id == chip_8001) { 103d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 104d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 105d078b511SAnand Kumar Santhanam "Not supported for SPC controller"); 106d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 107d078b511SAnand Kumar Santhanam (char *)buf; 108d078b511SAnand Kumar Santhanam } 109044f59deSDeepak Ukey /* initialize variables for very first call from host application */ 110d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 1111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 1121b5d2793SJoe Perches "forensic_info TYPE_NON_FATAL..............\n"); 113d078b511SAnand Kumar Santhanam direct_data = (u8 *)fatal_error_data; 114d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL; 115d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET; 116044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_offset = 0; 117d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 118044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 0; 119044f59deSDeepak Ukey 120044f59deSDeepak Ukey /* Write signature to fatal dump table */ 121044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 122044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_SIGNATURE, 0x1234abcd); 123d078b511SAnand Kumar Santhanam 124d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = direct_data; 1251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: status1 %d\n", status); 1261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: read_len 0x%x\n", 1271b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.read_len); 1281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_len 0x%x\n", 1291b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_len); 1301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_offset 0x%x\n", 1311b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_offset); 132044f59deSDeepak Ukey } 133044f59deSDeepak Ukey if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 134d078b511SAnand Kumar Santhanam /* start to get data */ 135d078b511SAnand Kumar Santhanam /* Program the MEMBASE II Shifting Register with 0x00.*/ 136d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 137d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 138d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 139d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 140d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 141d078b511SAnand Kumar Santhanam } 142cf370066SViswas G 143d078b511SAnand Kumar Santhanam /* Read until accum_len is retrived */ 144d078b511SAnand Kumar Santhanam accum_len = pm8001_mr32(fatal_table_address, 145d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 146044f59deSDeepak Ukey /* Determine length of data between previously stored transfer length 147044f59deSDeepak Ukey * and current accumulated transfer length 148044f59deSDeepak Ukey */ 149044f59deSDeepak Ukey length_to_read = 150044f59deSDeepak Ukey accum_len - pm8001_ha->forensic_preserved_accumulated_transfer; 1511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: accum_len 0x%x\n", 1521b5d2793SJoe Perches accum_len); 1531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: length_to_read 0x%x\n", 1541b5d2793SJoe Perches length_to_read); 1551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: last_offset 0x%x\n", 1561b5d2793SJoe Perches pm8001_ha->forensic_last_offset); 1571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: read_len 0x%x\n", 1581b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.read_len); 1591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_len 0x%x\n", 1601b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_len); 1611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_offset 0x%x\n", 1621b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_offset); 163044f59deSDeepak Ukey 164044f59deSDeepak Ukey /* If accumulated length failed to read correctly fail the attempt.*/ 165d078b511SAnand Kumar Santhanam if (accum_len == 0xFFFFFFFF) { 1661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 1671b5d2793SJoe Perches "Possible PCI issue 0x%x not expected\n", 1681b5d2793SJoe Perches accum_len); 169044f59deSDeepak Ukey return status; 170d078b511SAnand Kumar Santhanam } 171044f59deSDeepak Ukey /* If accumulated length is zero fail the attempt */ 172044f59deSDeepak Ukey if (accum_len == 0) { 173d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 174d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 175d078b511SAnand Kumar Santhanam "%08x ", 0xFFFFFFFF); 176d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 177d078b511SAnand Kumar Santhanam (char *)buf; 178d078b511SAnand Kumar Santhanam } 179044f59deSDeepak Ukey /* Accumulated length is good so start capturing the first data */ 180d078b511SAnand Kumar Santhanam temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 181d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 0) { 182d078b511SAnand Kumar Santhanam moreData: 183044f59deSDeepak Ukey /* If data to read is less than SYSFS_OFFSET then reduce the 184044f59deSDeepak Ukey * length of dataLen 185044f59deSDeepak Ukey */ 186044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset + SYSFS_OFFSET 187044f59deSDeepak Ukey > length_to_read) { 188044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 189044f59deSDeepak Ukey length_to_read - 190044f59deSDeepak Ukey pm8001_ha->forensic_last_offset; 191044f59deSDeepak Ukey } else { 192044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 193044f59deSDeepak Ukey SYSFS_OFFSET; 194044f59deSDeepak Ukey } 195d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_data) { 196d078b511SAnand Kumar Santhanam /* Data is in bar, copy to host memory */ 197044f59deSDeepak Ukey pm80xx_pci_mem_copy(pm8001_ha, 198044f59deSDeepak Ukey pm8001_ha->fatal_bar_loc, 199d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr, 200044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len, 1); 201d078b511SAnand Kumar Santhanam } 202d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc += 203d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 204d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_offset += 205d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 206d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset += 207d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 208d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 209d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 210d078b511SAnand Kumar Santhanam 211044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset >= length_to_read) { 212d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 213d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 214d078b511SAnand Kumar Santhanam "%08x ", 3); 215044f59deSDeepak Ukey for (index = 0; index < 216044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 217044f59deSDeepak Ukey / 4); index++) { 218d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 219044f59deSDeepak Ukey sprintf( 220044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 221d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 222d078b511SAnand Kumar Santhanam } 223d078b511SAnand Kumar Santhanam 224d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 225d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 1; 226d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset = 0; 227d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 228044f59deSDeepak Ukey status = 0; 229044f59deSDeepak Ukey offset = (int) 230044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 231044f59deSDeepak Ukey - (char *)buf); 2321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 2331b5d2793SJoe Perches "get_fatal_spcv:return1 0x%x\n", offset); 234d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 235d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 236d078b511SAnand Kumar Santhanam (char *)buf; 237d078b511SAnand Kumar Santhanam } 238d078b511SAnand Kumar Santhanam if (pm8001_ha->fatal_bar_loc < (64 * 1024)) { 239d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 240d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 241d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 242d078b511SAnand Kumar Santhanam "%08x ", 2); 243044f59deSDeepak Ukey for (index = 0; index < 244044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 245044f59deSDeepak Ukey / 4); index++) { 246044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 247044f59deSDeepak Ukey += sprintf(pm8001_ha-> 248d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 249d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 250d078b511SAnand Kumar Santhanam } 251044f59deSDeepak Ukey status = 0; 252044f59deSDeepak Ukey offset = (int) 253044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 254044f59deSDeepak Ukey - (char *)buf); 2551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 2561b5d2793SJoe Perches "get_fatal_spcv:return2 0x%x\n", offset); 257d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 258d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 259d078b511SAnand Kumar Santhanam (char *)buf; 260d078b511SAnand Kumar Santhanam } 261d078b511SAnand Kumar Santhanam 262d078b511SAnand Kumar Santhanam /* Increment the MEMBASE II Shifting Register value by 0x100.*/ 263d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 264d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 265d078b511SAnand Kumar Santhanam "%08x ", 2); 266044f59deSDeepak Ukey for (index = 0; index < 267044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 268044f59deSDeepak Ukey / 4) ; index++) { 269d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 270d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 271d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 272d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 273d078b511SAnand Kumar Santhanam } 274d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset += 0x100; 275d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 276d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 277d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 278044f59deSDeepak Ukey status = 0; 279044f59deSDeepak Ukey offset = (int) 280044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 281044f59deSDeepak Ukey - (char *)buf); 2821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return3 0x%x\n", 2831b5d2793SJoe Perches offset); 284d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 285d078b511SAnand Kumar Santhanam (char *)buf; 286d078b511SAnand Kumar Santhanam } 287d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 1) { 288044f59deSDeepak Ukey /* store previous accumulated length before triggering next 289044f59deSDeepak Ukey * accumulated length update 290044f59deSDeepak Ukey */ 291044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 292044f59deSDeepak Ukey pm8001_mr32(fatal_table_address, 293044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 294044f59deSDeepak Ukey 295044f59deSDeepak Ukey /* continue capturing the fatal log until Dump status is 0x3 */ 296044f59deSDeepak Ukey if (pm8001_mr32(fatal_table_address, 297044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS) < 298044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) { 299044f59deSDeepak Ukey 300044f59deSDeepak Ukey /* reset fddstat bit by writing to zero*/ 301044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 302044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS, 0x0); 303044f59deSDeepak Ukey 304044f59deSDeepak Ukey /* set dump control value to '1' so that new data will 305044f59deSDeepak Ukey * be transferred to shared memory 306044f59deSDeepak Ukey */ 307d078b511SAnand Kumar Santhanam pm8001_mw32(fatal_table_address, 308d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 309d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_HANDSHAKE_RDY); 310d078b511SAnand Kumar Santhanam 311d078b511SAnand Kumar Santhanam /*Poll FDDHSHK until clear */ 312d078b511SAnand Kumar Santhanam start = jiffies + (2 * HZ); /* 2 sec */ 313d078b511SAnand Kumar Santhanam 314d078b511SAnand Kumar Santhanam do { 315d078b511SAnand Kumar Santhanam reg_val = pm8001_mr32(fatal_table_address, 316d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE); 317d078b511SAnand Kumar Santhanam } while ((reg_val) && time_before(jiffies, start)); 318d078b511SAnand Kumar Santhanam 319d078b511SAnand Kumar Santhanam if (reg_val != 0) { 3201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 321044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_HDSHAKE 0x%x\n", 3221b5d2793SJoe Perches reg_val); 323044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 324044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 325044f59deSDeepak Ukey sprintf( 326044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 327044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 328044f59deSDeepak Ukey return((char *) 329044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 330044f59deSDeepak Ukey - (char *)buf); 331d078b511SAnand Kumar Santhanam } 332044f59deSDeepak Ukey /* Poll status register until set to 2 or 333044f59deSDeepak Ukey * 3 for up to 2 seconds 334044f59deSDeepak Ukey */ 335044f59deSDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 336d078b511SAnand Kumar Santhanam 337044f59deSDeepak Ukey do { 338044f59deSDeepak Ukey reg_val = pm8001_mr32(fatal_table_address, 339044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS); 3400e7c353eSColin Ian King } while (((reg_val != 2) && (reg_val != 3)) && 341044f59deSDeepak Ukey time_before(jiffies, start)); 342044f59deSDeepak Ukey 343044f59deSDeepak Ukey if (reg_val < 2) { 3441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 345044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_STATUS = 0x%x\n", 3461b5d2793SJoe Perches reg_val); 347044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 348044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 349044f59deSDeepak Ukey sprintf( 350044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 351044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 352ec2e7e1aSViswas G return((char *)pm8001_ha->forensic_info.data_buf.direct_data - 353ec2e7e1aSViswas G (char *)buf); 354ec2e7e1aSViswas G } 355ec2e7e1aSViswas G /* reset fatal_forensic_shift_offset back to zero and reset MEMBASE 2 register to zero */ 356ec2e7e1aSViswas G pm8001_ha->fatal_forensic_shift_offset = 0; /* location in 64k region */ 357044f59deSDeepak Ukey pm8001_cw32(pm8001_ha, 0, 358044f59deSDeepak Ukey MEMBASE_II_SHIFT_REGISTER, 359044f59deSDeepak Ukey pm8001_ha->fatal_forensic_shift_offset); 360044f59deSDeepak Ukey } 361044f59deSDeepak Ukey /* Read the next block of the debug data.*/ 362044f59deSDeepak Ukey length_to_read = pm8001_mr32(fatal_table_address, 363044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN) - 364044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer; 365044f59deSDeepak Ukey if (length_to_read != 0x0) { 366d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 367d078b511SAnand Kumar Santhanam goto moreData; 368d078b511SAnand Kumar Santhanam } else { 369d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 3707b382122SColin Ian King sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 371d078b511SAnand Kumar Santhanam "%08x ", 4); 3727b382122SColin Ian King pm8001_ha->forensic_info.data_buf.read_len = 0xFFFFFFFF; 3737b382122SColin Ian King pm8001_ha->forensic_info.data_buf.direct_len = 0; 3747b382122SColin Ian King pm8001_ha->forensic_info.data_buf.direct_offset = 0; 375d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 376d078b511SAnand Kumar Santhanam } 377d078b511SAnand Kumar Santhanam } 378044f59deSDeepak Ukey offset = (int)((char *)pm8001_ha->forensic_info.data_buf.direct_data 379044f59deSDeepak Ukey - (char *)buf); 3801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return4 0x%x\n", offset); 381ec2e7e1aSViswas G return ((char *)pm8001_ha->forensic_info.data_buf.direct_data - 382ec2e7e1aSViswas G (char *)buf); 383d078b511SAnand Kumar Santhanam } 384d078b511SAnand Kumar Santhanam 385dba2cc03SDeepak Ukey /* pm80xx_get_non_fatal_dump - dump the nonfatal data from the dma 386dba2cc03SDeepak Ukey * location by the firmware. 387dba2cc03SDeepak Ukey */ 388dba2cc03SDeepak Ukey ssize_t pm80xx_get_non_fatal_dump(struct device *cdev, 389dba2cc03SDeepak Ukey struct device_attribute *attr, char *buf) 390dba2cc03SDeepak Ukey { 391dba2cc03SDeepak Ukey struct Scsi_Host *shost = class_to_shost(cdev); 392dba2cc03SDeepak Ukey struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 393dba2cc03SDeepak Ukey struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 394dba2cc03SDeepak Ukey void __iomem *nonfatal_table_address = pm8001_ha->fatal_tbl_addr; 395dba2cc03SDeepak Ukey u32 accum_len = 0; 396dba2cc03SDeepak Ukey u32 total_len = 0; 397dba2cc03SDeepak Ukey u32 reg_val = 0; 398dba2cc03SDeepak Ukey u32 *temp = NULL; 399dba2cc03SDeepak Ukey u32 index = 0; 400dba2cc03SDeepak Ukey u32 output_length; 401dba2cc03SDeepak Ukey unsigned long start = 0; 402dba2cc03SDeepak Ukey char *buf_copy = buf; 403dba2cc03SDeepak Ukey 404dba2cc03SDeepak Ukey temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 405dba2cc03SDeepak Ukey if (++pm8001_ha->non_fatal_count == 1) { 406dba2cc03SDeepak Ukey if (pm8001_ha->chip_id == chip_8001) { 407dba2cc03SDeepak Ukey snprintf(pm8001_ha->forensic_info.data_buf.direct_data, 408dba2cc03SDeepak Ukey PAGE_SIZE, "Not supported for SPC controller"); 409dba2cc03SDeepak Ukey return 0; 410dba2cc03SDeepak Ukey } 4111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "forensic_info TYPE_NON_FATAL...\n"); 412dba2cc03SDeepak Ukey /* 413dba2cc03SDeepak Ukey * Step 1: Write the host buffer parameters in the MPI Fatal and 414dba2cc03SDeepak Ukey * Non-Fatal Error Dump Capture Table.This is the buffer 415dba2cc03SDeepak Ukey * where debug data will be DMAed to. 416dba2cc03SDeepak Ukey */ 417dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 418dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_LO_OFFSET, 419dba2cc03SDeepak Ukey pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_lo); 420dba2cc03SDeepak Ukey 421dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 422dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_HI_OFFSET, 423dba2cc03SDeepak Ukey pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_hi); 424dba2cc03SDeepak Ukey 425dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 426dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_LENGTH, SYSFS_OFFSET); 427dba2cc03SDeepak Ukey 428dba2cc03SDeepak Ukey /* Optionally, set the DUMPCTRL bit to 1 if the host 429dba2cc03SDeepak Ukey * keeps sending active I/Os while capturing the non-fatal 430dba2cc03SDeepak Ukey * debug data. Otherwise, leave this bit set to zero 431dba2cc03SDeepak Ukey */ 432dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 433dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_HANDSHAKE, MPI_FATAL_EDUMP_HANDSHAKE_RDY); 434dba2cc03SDeepak Ukey 435dba2cc03SDeepak Ukey /* 436dba2cc03SDeepak Ukey * Step 2: Clear Accumulative Length of Debug Data Transferred 437dba2cc03SDeepak Ukey * [ACCDDLEN] field in the MPI Fatal and Non-Fatal Error Dump 438dba2cc03SDeepak Ukey * Capture Table to zero. 439dba2cc03SDeepak Ukey */ 440dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 441dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN, 0); 442dba2cc03SDeepak Ukey 443dba2cc03SDeepak Ukey /* initiallize previous accumulated length to 0 */ 444dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 0; 445dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 446dba2cc03SDeepak Ukey } 447dba2cc03SDeepak Ukey 448dba2cc03SDeepak Ukey total_len = pm8001_mr32(nonfatal_table_address, 449dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_TOTAL_LEN); 450dba2cc03SDeepak Ukey /* 451dba2cc03SDeepak Ukey * Step 3:Clear Fatal/Non-Fatal Debug Data Transfer Status [FDDTSTAT] 452dba2cc03SDeepak Ukey * field and then request that the SPCv controller transfer the debug 453dba2cc03SDeepak Ukey * data by setting bit 7 of the Inbound Doorbell Set Register. 454dba2cc03SDeepak Ukey */ 455dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, MPI_FATAL_EDUMP_TABLE_STATUS, 0); 456dba2cc03SDeepak Ukey pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, 457dba2cc03SDeepak Ukey SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP); 458dba2cc03SDeepak Ukey 459dba2cc03SDeepak Ukey /* 460dba2cc03SDeepak Ukey * Step 4.1: Read back the Inbound Doorbell Set Register (by polling for 461dba2cc03SDeepak Ukey * 2 seconds) until register bit 7 is cleared. 462dba2cc03SDeepak Ukey * This step only indicates the request is accepted by the controller. 463dba2cc03SDeepak Ukey */ 464dba2cc03SDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 465dba2cc03SDeepak Ukey do { 466dba2cc03SDeepak Ukey reg_val = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET) & 467dba2cc03SDeepak Ukey SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP; 468dba2cc03SDeepak Ukey } while ((reg_val != 0) && time_before(jiffies, start)); 469dba2cc03SDeepak Ukey 470dba2cc03SDeepak Ukey /* Step 4.2: To check the completion of the transfer, poll the Fatal/Non 471dba2cc03SDeepak Ukey * Fatal Debug Data Transfer Status [FDDTSTAT] field for 2 seconds in 472dba2cc03SDeepak Ukey * the MPI Fatal and Non-Fatal Error Dump Capture Table. 473dba2cc03SDeepak Ukey */ 474dba2cc03SDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 475dba2cc03SDeepak Ukey do { 476dba2cc03SDeepak Ukey reg_val = pm8001_mr32(nonfatal_table_address, 477dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS); 478dba2cc03SDeepak Ukey } while ((!reg_val) && time_before(jiffies, start)); 479dba2cc03SDeepak Ukey 480dba2cc03SDeepak Ukey if ((reg_val == 0x00) || 481dba2cc03SDeepak Ukey (reg_val == MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED) || 482dba2cc03SDeepak Ukey (reg_val > MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE)) { 483dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 484dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 0xFFFFFFFF); 485dba2cc03SDeepak Ukey pm8001_ha->non_fatal_count = 0; 486dba2cc03SDeepak Ukey return (buf_copy - buf); 487dba2cc03SDeepak Ukey } else if (reg_val == 488dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA) { 489dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 2); 490dba2cc03SDeepak Ukey } else if ((reg_val == MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) || 491dba2cc03SDeepak Ukey (pm8001_ha->non_fatal_read_length >= total_len)) { 492dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 493dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 4); 494dba2cc03SDeepak Ukey pm8001_ha->non_fatal_count = 0; 495dba2cc03SDeepak Ukey } 496dba2cc03SDeepak Ukey accum_len = pm8001_mr32(nonfatal_table_address, 497dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 498dba2cc03SDeepak Ukey output_length = accum_len - 499dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer; 500dba2cc03SDeepak Ukey 501dba2cc03SDeepak Ukey for (index = 0; index < output_length/4; index++) 502dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, 503dba2cc03SDeepak Ukey "%08x ", *(temp+index)); 504dba2cc03SDeepak Ukey 505dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length += output_length; 506dba2cc03SDeepak Ukey 507dba2cc03SDeepak Ukey /* store current accumulated length to use in next iteration as 508dba2cc03SDeepak Ukey * the previous accumulated length 509dba2cc03SDeepak Ukey */ 510dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = accum_len; 511dba2cc03SDeepak Ukey return (buf_copy - buf); 512dba2cc03SDeepak Ukey } 513dba2cc03SDeepak Ukey 514f5860992SSakthivel K /** 515f5860992SSakthivel K * read_main_config_table - read the configure table and save it. 516f5860992SSakthivel K * @pm8001_ha: our hba card information 517f5860992SSakthivel K */ 518f5860992SSakthivel K static void read_main_config_table(struct pm8001_hba_info *pm8001_ha) 519f5860992SSakthivel K { 520f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 521f5860992SSakthivel K 522f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature = 523f5860992SSakthivel K pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); 524f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev = 525f5860992SSakthivel K pm8001_mr32(address, MAIN_INTERFACE_REVISION); 526f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev = 527f5860992SSakthivel K pm8001_mr32(address, MAIN_FW_REVISION); 528f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io = 529f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); 530f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl = 531f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); 532f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag = 533f5860992SSakthivel K pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); 534f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset = 535f5860992SSakthivel K pm8001_mr32(address, MAIN_GST_OFFSET); 536f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset = 537f5860992SSakthivel K pm8001_mr32(address, MAIN_IBQ_OFFSET); 538f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset = 539f5860992SSakthivel K pm8001_mr32(address, MAIN_OBQ_OFFSET); 540f5860992SSakthivel K 541f5860992SSakthivel K /* read Error Dump Offset and Length */ 542f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 = 543f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); 544f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 = 545f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); 546f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 = 547f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); 548f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 = 549f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); 550f5860992SSakthivel K 551f5860992SSakthivel K /* read GPIO LED settings from the configuration table */ 552f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping = 553f5860992SSakthivel K pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); 554f5860992SSakthivel K 555f5860992SSakthivel K /* read analog Setting offset from the configuration table */ 556f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset = 557f5860992SSakthivel K pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); 558f5860992SSakthivel K 559f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset = 560f5860992SSakthivel K pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); 561f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset = 562f5860992SSakthivel K pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); 5638414cd80SViswas G /* read port recover and reset timeout */ 5648414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer = 5658414cd80SViswas G pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); 56624fff017SViswas G /* read ILA and inactive firmware version */ 56724fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version = 56824fff017SViswas G pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE); 56924fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version = 57024fff017SViswas G pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION); 5717370672dSpeter chang 5721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5737370672dSpeter chang "Main cfg table: sign:%x interface rev:%x fw_rev:%x\n", 5747370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature, 5757370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev, 5761b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev); 5777370672dSpeter chang 5781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5797370672dSpeter chang "table offset: gst:%x iq:%x oq:%x int vec:%x phy attr:%x\n", 5807370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset, 5817370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset, 5827370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset, 5837370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset, 5841b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset); 5857370672dSpeter chang 5861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5877370672dSpeter chang "Main cfg table; ila rev:%x Inactive fw rev:%x\n", 5887370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version, 5891b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version); 590f5860992SSakthivel K } 591f5860992SSakthivel K 592f5860992SSakthivel K /** 593f5860992SSakthivel K * read_general_status_table - read the general status table and save it. 594f5860992SSakthivel K * @pm8001_ha: our hba card information 595f5860992SSakthivel K */ 596f5860992SSakthivel K static void read_general_status_table(struct pm8001_hba_info *pm8001_ha) 597f5860992SSakthivel K { 598f5860992SSakthivel K void __iomem *address = pm8001_ha->general_stat_tbl_addr; 599f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate = 600f5860992SSakthivel K pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); 601f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 = 602f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); 603f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 = 604f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); 605f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt = 606f5860992SSakthivel K pm8001_mr32(address, GST_MSGUTCNT_OFFSET); 607f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt = 608f5860992SSakthivel K pm8001_mr32(address, GST_IOPTCNT_OFFSET); 609f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val = 610f5860992SSakthivel K pm8001_mr32(address, GST_GPIO_INPUT_VAL); 611f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[0] = 612f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET0); 613f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[1] = 614f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET1); 615f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[2] = 616f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET2); 617f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[3] = 618f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET3); 619f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[4] = 620f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET4); 621f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[5] = 622f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET5); 623f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[6] = 624f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET6); 625f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[7] = 626f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET7); 627f5860992SSakthivel K } 628f5860992SSakthivel K /** 629f5860992SSakthivel K * read_phy_attr_table - read the phy attribute table and save it. 630f5860992SSakthivel K * @pm8001_ha: our hba card information 631f5860992SSakthivel K */ 632f5860992SSakthivel K static void read_phy_attr_table(struct pm8001_hba_info *pm8001_ha) 633f5860992SSakthivel K { 634f5860992SSakthivel K void __iomem *address = pm8001_ha->pspa_q_tbl_addr; 635f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[0] = 636f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); 637f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[1] = 638f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); 639f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[2] = 640f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); 641f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[3] = 642f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); 643f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[4] = 644f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); 645f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[5] = 646f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); 647f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[6] = 648f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); 649f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[7] = 650f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); 651f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[8] = 652f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); 653f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[9] = 654f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); 655f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[10] = 656f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); 657f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[11] = 658f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); 659f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[12] = 660f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); 661f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[13] = 662f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); 663f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[14] = 664f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); 665f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[15] = 666f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); 667f5860992SSakthivel K 668f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[0] = 669f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); 670f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[1] = 671f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); 672f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[2] = 673f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); 674f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[3] = 675f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); 676f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[4] = 677f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); 678f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[5] = 679f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); 680f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[6] = 681f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); 682f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[7] = 683f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); 684f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[8] = 685f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); 686f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[9] = 687f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); 688f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[10] = 689f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); 690f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[11] = 691f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); 692f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[12] = 693f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); 694f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[13] = 695f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); 696f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[14] = 697f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); 698f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[15] = 699f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); 700f5860992SSakthivel K 701f5860992SSakthivel K } 702f5860992SSakthivel K 703f5860992SSakthivel K /** 704f5860992SSakthivel K * read_inbnd_queue_table - read the inbound queue table and save it. 705f5860992SSakthivel K * @pm8001_ha: our hba card information 706f5860992SSakthivel K */ 707f5860992SSakthivel K static void read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 708f5860992SSakthivel K { 709f5860992SSakthivel K int i; 710f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 71105c6c029SViswas G for (i = 0; i < PM8001_MAX_INB_NUM; i++) { 712f5860992SSakthivel K u32 offset = i * 0x20; 713f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 714f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 715f5860992SSakthivel K (offset + IB_PIPCI_BAR))); 716f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 717f5860992SSakthivel K pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); 718f5860992SSakthivel K } 719f5860992SSakthivel K } 720f5860992SSakthivel K 721f5860992SSakthivel K /** 722f5860992SSakthivel K * read_outbnd_queue_table - read the outbound queue table and save it. 723f5860992SSakthivel K * @pm8001_ha: our hba card information 724f5860992SSakthivel K */ 725f5860992SSakthivel K static void read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 726f5860992SSakthivel K { 727f5860992SSakthivel K int i; 728f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 72905c6c029SViswas G for (i = 0; i < PM8001_MAX_OUTB_NUM; i++) { 730f5860992SSakthivel K u32 offset = i * 0x24; 731f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 732f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 733f5860992SSakthivel K (offset + OB_CIPCI_BAR))); 734f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 735f5860992SSakthivel K pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); 736f5860992SSakthivel K } 737f5860992SSakthivel K } 738f5860992SSakthivel K 739f5860992SSakthivel K /** 740f5860992SSakthivel K * init_default_table_values - init the default table. 741f5860992SSakthivel K * @pm8001_ha: our hba card information 742f5860992SSakthivel K */ 743f5860992SSakthivel K static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) 744f5860992SSakthivel K { 745f5860992SSakthivel K int i; 746f5860992SSakthivel K u32 offsetib, offsetob; 747f5860992SSakthivel K void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr; 748f5860992SSakthivel K void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr; 74905c6c029SViswas G u32 ib_offset = pm8001_ha->ib_offset; 75005c6c029SViswas G u32 ob_offset = pm8001_ha->ob_offset; 75105c6c029SViswas G u32 ci_offset = pm8001_ha->ci_offset; 75205c6c029SViswas G u32 pi_offset = pm8001_ha->pi_offset; 753f5860992SSakthivel K 754f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr = 755f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_hi; 756f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr = 757f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_lo; 758f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size = 759f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 760f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity = 0x01; 761f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr = 762f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_hi; 763f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr = 764f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_lo; 765f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size = 766f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 767f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01; 768f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01; 769f5860992SSakthivel K 770c6b9ef57SSakthivel K /* Disable end to end CRC checking */ 771c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16); 772c6b9ef57SSakthivel K 77305c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 774f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt = 7759504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30); 776f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].upper_base_addr = 77705c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi; 778f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].lower_base_addr = 77905c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo; 780f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].base_virt = 78105c6c029SViswas G (u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr; 782f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].total_length = 78305c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].total_len; 784f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr = 78505c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi; 786f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr = 78705c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo; 788f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_virt = 78905c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr; 790f5860992SSakthivel K offsetib = i * 0x20; 791f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 792f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressib, 793f5860992SSakthivel K (offsetib + 0x14))); 794f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 795f5860992SSakthivel K pm8001_mr32(addressib, (offsetib + 0x18)); 796f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].producer_idx = 0; 797f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].consumer_index = 0; 7987370672dSpeter chang 7991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8007370672dSpeter chang "IQ %d pi_bar 0x%x pi_offset 0x%x\n", i, 8017370672dSpeter chang pm8001_ha->inbnd_q_tbl[i].pi_pci_bar, 8021b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[i].pi_offset); 803f5860992SSakthivel K } 80405c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 805f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].element_size_cnt = 8069504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30); 807f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].upper_base_addr = 80805c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi; 809f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].lower_base_addr = 81005c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo; 811f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].base_virt = 81205c6c029SViswas G (u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr; 813f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].total_length = 81405c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].total_len; 815f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr = 81605c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi; 817f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr = 81805c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo; 819f5860992SSakthivel K /* interrupt vector based on oq */ 820f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24); 821f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_virt = 82205c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr; 823f5860992SSakthivel K offsetob = i * 0x24; 824f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 825f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressob, 826f5860992SSakthivel K offsetob + 0x14)); 827f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 828f5860992SSakthivel K pm8001_mr32(addressob, (offsetob + 0x18)); 829f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0; 830f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].producer_index = 0; 8317370672dSpeter chang 8321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8337370672dSpeter chang "OQ %d ci_bar 0x%x ci_offset 0x%x\n", i, 8347370672dSpeter chang pm8001_ha->outbnd_q_tbl[i].ci_pci_bar, 8351b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[i].ci_offset); 836f5860992SSakthivel K } 837f5860992SSakthivel K } 838f5860992SSakthivel K 839f5860992SSakthivel K /** 840f5860992SSakthivel K * update_main_config_table - update the main default table to the HBA. 841f5860992SSakthivel K * @pm8001_ha: our hba card information 842f5860992SSakthivel K */ 843f5860992SSakthivel K static void update_main_config_table(struct pm8001_hba_info *pm8001_ha) 844f5860992SSakthivel K { 845f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 846f5860992SSakthivel K pm8001_mw32(address, MAIN_IQNPPD_HPPD_OFFSET, 847f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_q_nppd_hppd); 848f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_HI, 849f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr); 850f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_LO, 851f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr); 852f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_BUFF_SIZE, 853f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size); 854f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_OPTION, 855f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity); 856f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_HI, 857f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr); 858f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_LO, 859f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr); 860f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_BUFF_SIZE, 861f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size); 862f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_OPTION, 863f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity); 86472349b62SDeepak Ukey /* Update Fatal error interrupt vector */ 86572349b62SDeepak Ukey pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= 86605c6c029SViswas G ((pm8001_ha->max_q_num - 1) << 8); 867f5860992SSakthivel K pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT, 868f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt); 8691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8707370672dSpeter chang "Updated Fatal error interrupt vector 0x%x\n", 8711b5d2793SJoe Perches pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT)); 8727370672dSpeter chang 873c6b9ef57SSakthivel K pm8001_mw32(address, MAIN_EVENT_CRC_CHECK, 874c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump); 875f5860992SSakthivel K 876f5860992SSakthivel K /* SPCv specific */ 877f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping &= 0xCFFFFFFF; 878f5860992SSakthivel K /* Set GPIOLED to 0x2 for LED indicator */ 879f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000; 880f5860992SSakthivel K pm8001_mw32(address, MAIN_GPIO_LED_FLAGS_OFFSET, 881f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping); 8821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8837370672dSpeter chang "Programming DW 0x21 in main cfg table with 0x%x\n", 8841b5d2793SJoe Perches pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET)); 885f5860992SSakthivel K 886f5860992SSakthivel K pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 887f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 888f5860992SSakthivel K pm8001_mw32(address, MAIN_INT_REASSERTION_DELAY, 889f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interrupt_reassertion_delay); 8908414cd80SViswas G 8918414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 0xffff0000; 8928414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 8938414cd80SViswas G PORT_RECOVERY_TIMEOUT; 89461daffdeSViswas G if (pm8001_ha->chip_id == chip_8006) { 89561daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 89661daffdeSViswas G 0x0000ffff; 89761daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 898196ba662SDeepak Ukey CHIP_8006_PORT_RECOVERY_TIMEOUT; 89961daffdeSViswas G } 9008414cd80SViswas G pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 9018414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 902f5860992SSakthivel K } 903f5860992SSakthivel K 904f5860992SSakthivel K /** 905f5860992SSakthivel K * update_inbnd_queue_table - update the inbound queue table to the HBA. 906f5860992SSakthivel K * @pm8001_ha: our hba card information 9076ad4a517SLee Jones * @number: entry in the queue 908f5860992SSakthivel K */ 909f5860992SSakthivel K static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 910f5860992SSakthivel K int number) 911f5860992SSakthivel K { 912f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 913f5860992SSakthivel K u16 offset = number * 0x20; 914f5860992SSakthivel K pm8001_mw32(address, offset + IB_PROPERITY_OFFSET, 915f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 916f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_HI_OFFSET, 917f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].upper_base_addr); 918f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_LO_OFFSET, 919f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 920f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_HI_OFFSET, 921f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr); 922f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_LO_OFFSET, 923f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 9247370672dSpeter chang 9251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9267370672dSpeter chang "IQ %d: Element pri size 0x%x\n", 9277370672dSpeter chang number, 9281b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 9297370672dSpeter chang 9301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9317370672dSpeter chang "IQ upr base addr 0x%x IQ lwr base addr 0x%x\n", 9327370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].upper_base_addr, 9331b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 9347370672dSpeter chang 9351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9367370672dSpeter chang "CI upper base addr 0x%x CI lower base addr 0x%x\n", 9377370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr, 9381b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 939f5860992SSakthivel K } 940f5860992SSakthivel K 941f5860992SSakthivel K /** 942f5860992SSakthivel K * update_outbnd_queue_table - update the outbound queue table to the HBA. 943f5860992SSakthivel K * @pm8001_ha: our hba card information 9446ad4a517SLee Jones * @number: entry in the queue 945f5860992SSakthivel K */ 946f5860992SSakthivel K static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 947f5860992SSakthivel K int number) 948f5860992SSakthivel K { 949f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 950f5860992SSakthivel K u16 offset = number * 0x24; 951f5860992SSakthivel K pm8001_mw32(address, offset + OB_PROPERITY_OFFSET, 952f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 953f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_HI_OFFSET, 954f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].upper_base_addr); 955f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_LO_OFFSET, 956f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 957f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_HI_OFFSET, 958f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr); 959f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_LO_OFFSET, 960f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 961f5860992SSakthivel K pm8001_mw32(address, offset + OB_INTERRUPT_COALES_OFFSET, 962f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay); 9637370672dSpeter chang 9641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9657370672dSpeter chang "OQ %d: Element pri size 0x%x\n", 9667370672dSpeter chang number, 9671b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 9687370672dSpeter chang 9691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9707370672dSpeter chang "OQ upr base addr 0x%x OQ lwr base addr 0x%x\n", 9717370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].upper_base_addr, 9721b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 9737370672dSpeter chang 9741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9757370672dSpeter chang "PI upper base addr 0x%x PI lower base addr 0x%x\n", 9767370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr, 9771b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 978f5860992SSakthivel K } 979f5860992SSakthivel K 980f5860992SSakthivel K /** 981f5860992SSakthivel K * mpi_init_check - check firmware initialization status. 982f5860992SSakthivel K * @pm8001_ha: our hba card information 983f5860992SSakthivel K */ 984f5860992SSakthivel K static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) 985f5860992SSakthivel K { 986f5860992SSakthivel K u32 max_wait_count; 987f5860992SSakthivel K u32 value; 988f5860992SSakthivel K u32 gst_len_mpistate; 989f5860992SSakthivel K 990f5860992SSakthivel K /* Write bit0=1 to Inbound DoorBell Register to tell the SPC FW the 991f5860992SSakthivel K table is updated */ 992f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE); 993f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 994a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 995e90e2362Sianyar max_wait_count = SPCV_DOORBELL_CLEAR_TIMEOUT; 996a9a923e5SAnand Kumar Santhanam } else { 997e90e2362Sianyar max_wait_count = SPC_DOORBELL_CLEAR_TIMEOUT; 998a9a923e5SAnand Kumar Santhanam } 999f5860992SSakthivel K do { 1000d71023afSakshatzen msleep(FW_READY_INTERVAL); 1001f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1002f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_UPDATE; 1003f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1004f5860992SSakthivel K 100505c6c029SViswas G if (!max_wait_count) { 100605c6c029SViswas G /* additional check */ 10071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 10081b5d2793SJoe Perches "Inb doorbell clear not toggled[value:%x]\n", 10091b5d2793SJoe Perches value); 101005c6c029SViswas G return -EBUSY; 101105c6c029SViswas G } 1012f5860992SSakthivel K /* check the MPI-State for initialization upto 100ms*/ 1013d71023afSakshatzen max_wait_count = 5;/* 100 msec */ 1014f5860992SSakthivel K do { 1015d71023afSakshatzen msleep(FW_READY_INTERVAL); 1016f5860992SSakthivel K gst_len_mpistate = 1017f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1018f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1019f5860992SSakthivel K } while ((GST_MPI_STATE_INIT != 1020f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count)); 1021f5860992SSakthivel K if (!max_wait_count) 102205c6c029SViswas G return -EBUSY; 1023f5860992SSakthivel K 1024f5860992SSakthivel K /* check MPI Initialization error */ 1025f5860992SSakthivel K gst_len_mpistate = gst_len_mpistate >> 16; 1026f5860992SSakthivel K if (0x0000 != gst_len_mpistate) 102705c6c029SViswas G return -EBUSY; 1028f5860992SSakthivel K 1029f5860992SSakthivel K return 0; 1030f5860992SSakthivel K } 1031f5860992SSakthivel K 1032f5860992SSakthivel K /** 1033f5860992SSakthivel K * check_fw_ready - The LLDD check if the FW is ready, if not, return error. 103448cd6b38Sakshatzen * This function sleeps hence it must not be used in atomic context. 1035f5860992SSakthivel K * @pm8001_ha: our hba card information 1036f5860992SSakthivel K */ 1037f5860992SSakthivel K static int check_fw_ready(struct pm8001_hba_info *pm8001_ha) 1038f5860992SSakthivel K { 1039f5860992SSakthivel K u32 value; 1040f5860992SSakthivel K u32 max_wait_count; 1041f5860992SSakthivel K u32 max_wait_time; 10426b2f2d05SBhavesh Jashnani u32 expected_mask; 1043f5860992SSakthivel K int ret = 0; 1044f5860992SSakthivel K 1045f5860992SSakthivel K /* reset / PCIe ready */ 104648cd6b38Sakshatzen max_wait_time = max_wait_count = 5; /* 100 milli sec */ 1047f5860992SSakthivel K do { 104848cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1049f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1050f5860992SSakthivel K } while ((value == 0xFFFFFFFF) && (--max_wait_count)); 1051f5860992SSakthivel K 10526b2f2d05SBhavesh Jashnani /* check ila, RAAE and iops status */ 1053f5860992SSakthivel K if ((pm8001_ha->chip_id != chip_8008) && 1054f5860992SSakthivel K (pm8001_ha->chip_id != chip_8009)) { 10556b2f2d05SBhavesh Jashnani max_wait_time = max_wait_count = 180; /* 3600 milli sec */ 10566b2f2d05SBhavesh Jashnani expected_mask = SCRATCH_PAD_ILA_READY | 10576b2f2d05SBhavesh Jashnani SCRATCH_PAD_RAAE_READY | 10586b2f2d05SBhavesh Jashnani SCRATCH_PAD_IOP0_READY | 10596b2f2d05SBhavesh Jashnani SCRATCH_PAD_IOP1_READY; 10606b2f2d05SBhavesh Jashnani } else { 10616b2f2d05SBhavesh Jashnani max_wait_time = max_wait_count = 170; /* 3400 milli sec */ 10626b2f2d05SBhavesh Jashnani expected_mask = SCRATCH_PAD_ILA_READY | 10636b2f2d05SBhavesh Jashnani SCRATCH_PAD_RAAE_READY | 10646b2f2d05SBhavesh Jashnani SCRATCH_PAD_IOP0_READY; 10656b2f2d05SBhavesh Jashnani } 1066f5860992SSakthivel K do { 106748cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1068f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 10696b2f2d05SBhavesh Jashnani } while (((value & expected_mask) != 10706b2f2d05SBhavesh Jashnani expected_mask) && (--max_wait_count)); 10716b2f2d05SBhavesh Jashnani if (!max_wait_count) { 10726b2f2d05SBhavesh Jashnani pm8001_dbg(pm8001_ha, INIT, 10736b2f2d05SBhavesh Jashnani "At least one FW component failed to load within %d millisec: Scratchpad1: 0x%x\n", 10746b2f2d05SBhavesh Jashnani max_wait_time * FW_READY_INTERVAL, value); 1075f5860992SSakthivel K ret = -1; 10766b2f2d05SBhavesh Jashnani } else { 10771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 10786b2f2d05SBhavesh Jashnani "All FW components ready by %d ms\n", 10796b2f2d05SBhavesh Jashnani (max_wait_time - max_wait_count) * FW_READY_INTERVAL); 1080f5860992SSakthivel K } 1081f5860992SSakthivel K return ret; 1082f5860992SSakthivel K } 1083f5860992SSakthivel K 108495652f98Sakshatzen static int init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) 1085f5860992SSakthivel K { 1086f5860992SSakthivel K void __iomem *base_addr; 1087f5860992SSakthivel K u32 value; 1088f5860992SSakthivel K u32 offset; 1089f5860992SSakthivel K u32 pcibar; 1090f5860992SSakthivel K u32 pcilogic; 1091f5860992SSakthivel K 1092f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 109395652f98Sakshatzen 109495652f98Sakshatzen /** 109595652f98Sakshatzen * lower 26 bits of SCRATCHPAD0 register describes offset within the 109695652f98Sakshatzen * PCIe BAR where the MPI configuration table is present 109795652f98Sakshatzen */ 1098f5860992SSakthivel K offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */ 1099f5860992SSakthivel K 11001b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n", 11011b5d2793SJoe Perches offset, value); 110295652f98Sakshatzen /** 110395652f98Sakshatzen * Upper 6 bits describe the offset within PCI config space where BAR 110495652f98Sakshatzen * is located. 110595652f98Sakshatzen */ 1106f5860992SSakthivel K pcilogic = (value & 0xFC000000) >> 26; 1107f5860992SSakthivel K pcibar = get_pci_bar_index(pcilogic); 11081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar); 110995652f98Sakshatzen 111095652f98Sakshatzen /** 111195652f98Sakshatzen * Make sure the offset falls inside the ioremapped PCI BAR 111295652f98Sakshatzen */ 111395652f98Sakshatzen if (offset > pm8001_ha->io_mem[pcibar].memsize) { 111495652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 111595652f98Sakshatzen "Main cfg tbl offset outside %u > %u\n", 111695652f98Sakshatzen offset, pm8001_ha->io_mem[pcibar].memsize); 111795652f98Sakshatzen return -EBUSY; 111895652f98Sakshatzen } 1119f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr = base_addr = 1120f5860992SSakthivel K pm8001_ha->io_mem[pcibar].memvirtaddr + offset; 112195652f98Sakshatzen 112295652f98Sakshatzen /** 112395652f98Sakshatzen * Validate main configuration table address: first DWord should read 112495652f98Sakshatzen * "PMCS" 112595652f98Sakshatzen */ 112695652f98Sakshatzen value = pm8001_mr32(pm8001_ha->main_cfg_tbl_addr, 0); 112795652f98Sakshatzen if (memcmp(&value, "PMCS", 4) != 0) { 112895652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 112995652f98Sakshatzen "BAD main config signature 0x%x\n", 113095652f98Sakshatzen value); 113195652f98Sakshatzen return -EBUSY; 113295652f98Sakshatzen } 113395652f98Sakshatzen pm8001_dbg(pm8001_ha, INIT, 113495652f98Sakshatzen "VALID main config signature 0x%x\n", value); 1135f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr = 1136f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x18) & 1137f5860992SSakthivel K 0xFFFFFF); 1138f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr = 1139f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C) & 1140f5860992SSakthivel K 0xFFFFFF); 1141f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr = 1142f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x20) & 1143f5860992SSakthivel K 0xFFFFFF); 1144f5860992SSakthivel K pm8001_ha->ivt_tbl_addr = 1145f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C) & 1146f5860992SSakthivel K 0xFFFFFF); 1147f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr = 1148f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x90) & 1149f5860992SSakthivel K 0xFFFFFF); 1150d078b511SAnand Kumar Santhanam pm8001_ha->fatal_tbl_addr = 1151d078b511SAnand Kumar Santhanam base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) & 1152d078b511SAnand Kumar Santhanam 0xFFFFFF); 1153f5860992SSakthivel K 11541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "GST OFFSET 0x%x\n", 11551b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x18)); 11561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "INBND OFFSET 0x%x\n", 11571b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C)); 11581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "OBND OFFSET 0x%x\n", 11591b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x20)); 11601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "IVT OFFSET 0x%x\n", 11611b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C)); 11621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PSPA OFFSET 0x%x\n", 11631b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x90)); 11641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - main cfg %p general status %p\n", 1165f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr, 11661b5d2793SJoe Perches pm8001_ha->general_stat_tbl_addr); 11671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - inbnd %p obnd %p\n", 1168f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr, 11691b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl_addr); 11701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - pspa %p ivt %p\n", 1171f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr, 11721b5d2793SJoe Perches pm8001_ha->ivt_tbl_addr); 117395652f98Sakshatzen return 0; 1174f5860992SSakthivel K } 1175f5860992SSakthivel K 1176f5860992SSakthivel K /** 1177f5860992SSakthivel K * pm80xx_set_thermal_config - support the thermal configuration 1178f5860992SSakthivel K * @pm8001_ha: our hba card information. 1179f5860992SSakthivel K */ 1180a6cb3d01SSakthivel K int 1181f5860992SSakthivel K pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha) 1182f5860992SSakthivel K { 1183f5860992SSakthivel K struct set_ctrl_cfg_req payload; 1184f5860992SSakthivel K struct inbound_queue_table *circularQ; 1185f5860992SSakthivel K int rc; 1186f5860992SSakthivel K u32 tag; 1187f5860992SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1188842784e0SViswas G u32 page_code; 1189f5860992SSakthivel K 1190f5860992SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1191f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1192f5860992SSakthivel K if (rc) 1193f5860992SSakthivel K return -1; 1194f5860992SSakthivel K 1195f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1196f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1197842784e0SViswas G 1198842784e0SViswas G if (IS_SPCV_12G(pm8001_ha->pdev)) 1199842784e0SViswas G page_code = THERMAL_PAGE_CODE_7H; 1200842784e0SViswas G else 1201842784e0SViswas G page_code = THERMAL_PAGE_CODE_8H; 1202842784e0SViswas G 1203f5860992SSakthivel K payload.cfg_pg[0] = (THERMAL_LOG_ENABLE << 9) | 1204842784e0SViswas G (THERMAL_ENABLE << 8) | page_code; 1205f5860992SSakthivel K payload.cfg_pg[1] = (LTEMPHIL << 24) | (RTEMPHIL << 8); 1206f5860992SSakthivel K 12071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 12087370672dSpeter chang "Setting up thermal config. cfg_pg 0 0x%x cfg_pg 1 0x%x\n", 12091b5d2793SJoe Perches payload.cfg_pg[0], payload.cfg_pg[1]); 12107370672dSpeter chang 121191a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 121291a43fa6Speter chang sizeof(payload), 0); 12135533abcaSTomas Henzl if (rc) 12145533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1215f5860992SSakthivel K return rc; 1216f5860992SSakthivel K 1217f5860992SSakthivel K } 1218f5860992SSakthivel K 1219f5860992SSakthivel K /** 1220a6cb3d01SSakthivel K * pm80xx_set_sas_protocol_timer_config - support the SAS Protocol 1221a6cb3d01SSakthivel K * Timer configuration page 1222a6cb3d01SSakthivel K * @pm8001_ha: our hba card information. 1223a6cb3d01SSakthivel K */ 1224a6cb3d01SSakthivel K static int 1225a6cb3d01SSakthivel K pm80xx_set_sas_protocol_timer_config(struct pm8001_hba_info *pm8001_ha) 1226a6cb3d01SSakthivel K { 1227a6cb3d01SSakthivel K struct set_ctrl_cfg_req payload; 1228a6cb3d01SSakthivel K struct inbound_queue_table *circularQ; 1229a6cb3d01SSakthivel K SASProtocolTimerConfig_t SASConfigPage; 1230a6cb3d01SSakthivel K int rc; 1231a6cb3d01SSakthivel K u32 tag; 1232a6cb3d01SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1233a6cb3d01SSakthivel K 1234a6cb3d01SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1235a6cb3d01SSakthivel K memset(&SASConfigPage, 0, sizeof(SASProtocolTimerConfig_t)); 1236a6cb3d01SSakthivel K 1237a6cb3d01SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1238a6cb3d01SSakthivel K 1239a6cb3d01SSakthivel K if (rc) 1240a6cb3d01SSakthivel K return -1; 1241a6cb3d01SSakthivel K 1242a6cb3d01SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1243a6cb3d01SSakthivel K payload.tag = cpu_to_le32(tag); 1244a6cb3d01SSakthivel K 1245a6cb3d01SSakthivel K SASConfigPage.pageCode = SAS_PROTOCOL_TIMER_CONFIG_PAGE; 1246a6cb3d01SSakthivel K SASConfigPage.MST_MSI = 3 << 15; 1247a6cb3d01SSakthivel K SASConfigPage.STP_SSP_MCT_TMO = (STP_MCT_TMO << 16) | SSP_MCT_TMO; 1248a6cb3d01SSakthivel K SASConfigPage.STP_FRM_TMO = (SAS_MAX_OPEN_TIME << 24) | 1249a6cb3d01SSakthivel K (SMP_MAX_CONN_TIMER << 16) | STP_FRM_TIMER; 1250a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = STP_IDLE_TIME; 1251a6cb3d01SSakthivel K 1252a6cb3d01SSakthivel K if (SASConfigPage.STP_IDLE_TMO > 0x3FFFFFF) 1253a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = 0x3FFFFFF; 1254a6cb3d01SSakthivel K 1255a6cb3d01SSakthivel K 1256a6cb3d01SSakthivel K SASConfigPage.OPNRJT_RTRY_INTVL = (SAS_MFD << 16) | 1257a6cb3d01SSakthivel K SAS_OPNRJT_RTRY_INTVL; 1258a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO = (SAS_DOPNRJT_RTRY_TMO << 16) 1259a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_TMO; 1260a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR = (SAS_DOPNRJT_RTRY_THR << 16) 1261a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_THR; 1262a6cb3d01SSakthivel K SASConfigPage.MAX_AIP = SAS_MAX_AIP; 1263a6cb3d01SSakthivel K 12641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.pageCode 0x%08x\n", 12651b5d2793SJoe Perches SASConfigPage.pageCode); 12661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MST_MSI 0x%08x\n", 12671b5d2793SJoe Perches SASConfigPage.MST_MSI); 12681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_SSP_MCT_TMO 0x%08x\n", 12691b5d2793SJoe Perches SASConfigPage.STP_SSP_MCT_TMO); 12701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_FRM_TMO 0x%08x\n", 12711b5d2793SJoe Perches SASConfigPage.STP_FRM_TMO); 12721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_IDLE_TMO 0x%08x\n", 12731b5d2793SJoe Perches SASConfigPage.STP_IDLE_TMO); 12741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.OPNRJT_RTRY_INTVL 0x%08x\n", 12751b5d2793SJoe Perches SASConfigPage.OPNRJT_RTRY_INTVL); 12761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO 0x%08x\n", 12771b5d2793SJoe Perches SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO); 12781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR 0x%08x\n", 12791b5d2793SJoe Perches SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR); 12801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MAX_AIP 0x%08x\n", 12811b5d2793SJoe Perches SASConfigPage.MAX_AIP); 1282a6cb3d01SSakthivel K 1283a6cb3d01SSakthivel K memcpy(&payload.cfg_pg, &SASConfigPage, 1284a6cb3d01SSakthivel K sizeof(SASProtocolTimerConfig_t)); 1285a6cb3d01SSakthivel K 128691a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 128791a43fa6Speter chang sizeof(payload), 0); 12885533abcaSTomas Henzl if (rc) 12895533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1290a6cb3d01SSakthivel K 1291a6cb3d01SSakthivel K return rc; 1292a6cb3d01SSakthivel K } 1293a6cb3d01SSakthivel K 1294a6cb3d01SSakthivel K /** 1295f5860992SSakthivel K * pm80xx_get_encrypt_info - Check for encryption 1296f5860992SSakthivel K * @pm8001_ha: our hba card information. 1297f5860992SSakthivel K */ 1298f5860992SSakthivel K static int 1299f5860992SSakthivel K pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha) 1300f5860992SSakthivel K { 1301f5860992SSakthivel K u32 scratch3_value; 1302da225498SRickard Strandqvist int ret = -1; 1303f5860992SSakthivel K 1304f5860992SSakthivel K /* Read encryption status from SCRATCH PAD 3 */ 1305f5860992SSakthivel K scratch3_value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 1306f5860992SSakthivel K 1307f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1308f5860992SSakthivel K SCRATCH_PAD3_ENC_READY) { 1309f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1310f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1311f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1312f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1313f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1314f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1315f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1316f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1317f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1318f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1319f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1320f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0; 13211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13221b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X.Cipher mode 0x%x Sec mode 0x%x status 0x%x\n", 13231b5d2793SJoe Perches scratch3_value, 13241b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1325f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13261b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1327f5860992SSakthivel K ret = 0; 1328f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_READY) == 1329f5860992SSakthivel K SCRATCH_PAD3_ENC_DISABLED) { 13301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 1331f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n", 13321b5d2793SJoe Perches scratch3_value); 1333f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0xFFFFFFFF; 1334f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = 0; 1335f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = 0; 1336da225498SRickard Strandqvist ret = 0; 1337f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1338f5860992SSakthivel K SCRATCH_PAD3_ENC_DIS_ERR) { 1339f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1340f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1341f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1342f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1343f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1344f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1345f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1346f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1347f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1348f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1349f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1350f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1351f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 13521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13531b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 13541b5d2793SJoe Perches scratch3_value, 13551b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1356f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13571b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1358f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1359f5860992SSakthivel K SCRATCH_PAD3_ENC_ENA_ERR) { 1360f5860992SSakthivel K 1361f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1362f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1363f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1364f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1365f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1366f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1367f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1368f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1369f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1370f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1371f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1372f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1373f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1374f5860992SSakthivel K 13751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13761b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 13771b5d2793SJoe Perches scratch3_value, 13781b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1379f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13801b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1381f5860992SSakthivel K } 1382f5860992SSakthivel K return ret; 1383f5860992SSakthivel K } 1384f5860992SSakthivel K 1385f5860992SSakthivel K /** 1386f5860992SSakthivel K * pm80xx_encrypt_update - update flash with encryption informtion 1387f5860992SSakthivel K * @pm8001_ha: our hba card information. 1388f5860992SSakthivel K */ 1389f5860992SSakthivel K static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha) 1390f5860992SSakthivel K { 1391f5860992SSakthivel K struct kek_mgmt_req payload; 1392f5860992SSakthivel K struct inbound_queue_table *circularQ; 1393f5860992SSakthivel K int rc; 1394f5860992SSakthivel K u32 tag; 1395f5860992SSakthivel K u32 opc = OPC_INB_KEK_MANAGEMENT; 1396f5860992SSakthivel K 1397f5860992SSakthivel K memset(&payload, 0, sizeof(struct kek_mgmt_req)); 1398f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1399f5860992SSakthivel K if (rc) 1400f5860992SSakthivel K return -1; 1401f5860992SSakthivel K 1402f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1403f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1404f5860992SSakthivel K /* Currently only one key is used. New KEK index is 1. 1405f5860992SSakthivel K * Current KEK index is 1. Store KEK to NVRAM is 1. 1406f5860992SSakthivel K */ 1407f5860992SSakthivel K payload.new_curidx_ksop = ((1 << 24) | (1 << 16) | (1 << 8) | 1408f5860992SSakthivel K KEK_MGMT_SUBOP_KEYCARDUPDATE); 1409f5860992SSakthivel K 14101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 14117370672dSpeter chang "Saving Encryption info to flash. payload 0x%x\n", 14121b5d2793SJoe Perches payload.new_curidx_ksop); 14137370672dSpeter chang 141491a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 141591a43fa6Speter chang sizeof(payload), 0); 14165533abcaSTomas Henzl if (rc) 14175533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1418f5860992SSakthivel K 1419f5860992SSakthivel K return rc; 1420f5860992SSakthivel K } 1421f5860992SSakthivel K 1422f5860992SSakthivel K /** 1423f5860992SSakthivel K * pm8001_chip_init - the main init function that initialize whole PM8001 chip. 1424f5860992SSakthivel K * @pm8001_ha: our hba card information 1425f5860992SSakthivel K */ 1426f5860992SSakthivel K static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha) 1427f5860992SSakthivel K { 1428f5860992SSakthivel K int ret; 1429f5860992SSakthivel K u8 i = 0; 1430f5860992SSakthivel K 1431f5860992SSakthivel K /* check the firmware status */ 1432f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 14331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); 1434f5860992SSakthivel K return -EBUSY; 1435f5860992SSakthivel K } 1436f5860992SSakthivel K 143772349b62SDeepak Ukey /* Initialize the controller fatal error flag */ 143872349b62SDeepak Ukey pm8001_ha->controller_fatal_error = false; 143972349b62SDeepak Ukey 1440f5860992SSakthivel K /* Initialize pci space address eg: mpi offset */ 144195652f98Sakshatzen ret = init_pci_device_addresses(pm8001_ha); 144295652f98Sakshatzen if (ret) { 144395652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 144495652f98Sakshatzen "Failed to init pci addresses"); 144595652f98Sakshatzen return ret; 144695652f98Sakshatzen } 1447f5860992SSakthivel K init_default_table_values(pm8001_ha); 1448f5860992SSakthivel K read_main_config_table(pm8001_ha); 1449f5860992SSakthivel K read_general_status_table(pm8001_ha); 1450f5860992SSakthivel K read_inbnd_queue_table(pm8001_ha); 1451f5860992SSakthivel K read_outbnd_queue_table(pm8001_ha); 1452f5860992SSakthivel K read_phy_attr_table(pm8001_ha); 1453f5860992SSakthivel K 1454f5860992SSakthivel K /* update main config table ,inbound table and outbound table */ 1455f5860992SSakthivel K update_main_config_table(pm8001_ha); 145605c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 1457f5860992SSakthivel K update_inbnd_queue_table(pm8001_ha, i); 1458f5860992SSakthivel K update_outbnd_queue_table(pm8001_ha, i); 145905c6c029SViswas G } 1460f5860992SSakthivel K /* notify firmware update finished and check initialization status */ 1461f5860992SSakthivel K if (0 == mpi_init_check(pm8001_ha)) { 14621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n"); 1463f5860992SSakthivel K } else 1464f5860992SSakthivel K return -EBUSY; 1465f5860992SSakthivel K 1466a6cb3d01SSakthivel K /* send SAS protocol timer configuration page to FW */ 1467a6cb3d01SSakthivel K ret = pm80xx_set_sas_protocol_timer_config(pm8001_ha); 1468f5860992SSakthivel K 1469f5860992SSakthivel K /* Check for encryption */ 1470f5860992SSakthivel K if (pm8001_ha->chip->encrypt) { 14711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Checking for encryption\n"); 1472f5860992SSakthivel K ret = pm80xx_get_encrypt_info(pm8001_ha); 1473f5860992SSakthivel K if (ret == -1) { 14741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Encryption error !!\n"); 1475f5860992SSakthivel K if (pm8001_ha->encrypt_info.status == 0x81) { 14761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 14771b5d2793SJoe Perches "Encryption enabled with error.Saving encryption key to flash\n"); 1478f5860992SSakthivel K pm80xx_encrypt_update(pm8001_ha); 1479f5860992SSakthivel K } 1480f5860992SSakthivel K } 1481f5860992SSakthivel K } 1482f5860992SSakthivel K return 0; 1483f5860992SSakthivel K } 1484f5860992SSakthivel K 1485f5860992SSakthivel K static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) 1486f5860992SSakthivel K { 1487f5860992SSakthivel K u32 max_wait_count; 1488f5860992SSakthivel K u32 value; 1489f5860992SSakthivel K u32 gst_len_mpistate; 149095652f98Sakshatzen int ret; 149195652f98Sakshatzen 149295652f98Sakshatzen ret = init_pci_device_addresses(pm8001_ha); 149395652f98Sakshatzen if (ret) { 149495652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 149595652f98Sakshatzen "Failed to init pci addresses"); 149695652f98Sakshatzen return ret; 149795652f98Sakshatzen } 149895652f98Sakshatzen 1499f5860992SSakthivel K /* Write bit1=1 to Inbound DoorBell Register to tell the SPC FW the 1500f5860992SSakthivel K table is stop */ 1501f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_RESET); 1502f5860992SSakthivel K 1503f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1504a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 1505a9a923e5SAnand Kumar Santhanam max_wait_count = 4 * 1000 * 1000;/* 4 sec */ 1506a9a923e5SAnand Kumar Santhanam } else { 1507a9a923e5SAnand Kumar Santhanam max_wait_count = 2 * 1000 * 1000;/* 2 sec */ 1508a9a923e5SAnand Kumar Santhanam } 1509f5860992SSakthivel K do { 1510f5860992SSakthivel K udelay(1); 1511f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1512f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_RESET; 1513f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1514f5860992SSakthivel K 1515f5860992SSakthivel K if (!max_wait_count) { 15161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=%x\n", value); 1517f5860992SSakthivel K return -1; 1518f5860992SSakthivel K } 1519f5860992SSakthivel K 1520f5860992SSakthivel K /* check the MPI-State for termination in progress */ 1521f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1522f5860992SSakthivel K max_wait_count = 2 * 1000 * 1000; /* 2 sec for spcv/ve */ 1523f5860992SSakthivel K do { 1524f5860992SSakthivel K udelay(1); 1525f5860992SSakthivel K gst_len_mpistate = 1526f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1527f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1528f5860992SSakthivel K if (GST_MPI_STATE_UNINIT == 1529f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) 1530f5860992SSakthivel K break; 1531f5860992SSakthivel K } while (--max_wait_count); 1532f5860992SSakthivel K if (!max_wait_count) { 15331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n", 15341b5d2793SJoe Perches gst_len_mpistate & GST_MPI_STATE_MASK); 1535f5860992SSakthivel K return -1; 1536f5860992SSakthivel K } 1537f5860992SSakthivel K 1538f5860992SSakthivel K return 0; 1539f5860992SSakthivel K } 1540f5860992SSakthivel K 1541f5860992SSakthivel K /** 1542a961ea0aSakshatzen * pm80xx_fatal_errors - returns non zero *ONLY* when fatal errors 1543a961ea0aSakshatzen * @pm8001_ha: our hba card information 1544a961ea0aSakshatzen * 1545a961ea0aSakshatzen * Fatal errors are recoverable only after a host reboot. 1546a961ea0aSakshatzen */ 1547a961ea0aSakshatzen int 1548a961ea0aSakshatzen pm80xx_fatal_errors(struct pm8001_hba_info *pm8001_ha) 1549a961ea0aSakshatzen { 1550a961ea0aSakshatzen int ret = 0; 1551a961ea0aSakshatzen u32 scratch_pad_rsvd0 = pm8001_cr32(pm8001_ha, 0, 1552a961ea0aSakshatzen MSGU_HOST_SCRATCH_PAD_6); 1553a961ea0aSakshatzen u32 scratch_pad_rsvd1 = pm8001_cr32(pm8001_ha, 0, 1554a961ea0aSakshatzen MSGU_HOST_SCRATCH_PAD_7); 1555a961ea0aSakshatzen u32 scratch_pad1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1556a961ea0aSakshatzen u32 scratch_pad2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2); 1557a961ea0aSakshatzen u32 scratch_pad3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 1558a961ea0aSakshatzen 1559a961ea0aSakshatzen if (pm8001_ha->chip_id != chip_8006 && 1560a961ea0aSakshatzen pm8001_ha->chip_id != chip_8074 && 1561a961ea0aSakshatzen pm8001_ha->chip_id != chip_8076) { 1562a961ea0aSakshatzen return 0; 1563a961ea0aSakshatzen } 1564a961ea0aSakshatzen 1565a961ea0aSakshatzen if (MSGU_SCRATCHPAD1_STATE_FATAL_ERROR(scratch_pad1)) { 1566a961ea0aSakshatzen pm8001_dbg(pm8001_ha, FAIL, 1567a961ea0aSakshatzen "Fatal error SCRATCHPAD1 = 0x%x SCRATCHPAD2 = 0x%x SCRATCHPAD3 = 0x%x SCRATCHPAD_RSVD0 = 0x%x SCRATCHPAD_RSVD1 = 0x%x\n", 1568a961ea0aSakshatzen scratch_pad1, scratch_pad2, scratch_pad3, 1569a961ea0aSakshatzen scratch_pad_rsvd0, scratch_pad_rsvd1); 1570a961ea0aSakshatzen ret = 1; 1571a961ea0aSakshatzen } 1572a961ea0aSakshatzen 1573a961ea0aSakshatzen return ret; 1574a961ea0aSakshatzen } 1575a961ea0aSakshatzen 1576a961ea0aSakshatzen /** 1577f5860992SSakthivel K * pm8001_chip_soft_rst - soft reset the PM8001 chip, so that the clear all 1578f5860992SSakthivel K * the FW register status to the originated status. 1579f5860992SSakthivel K * @pm8001_ha: our hba card information 1580f5860992SSakthivel K */ 1581f5860992SSakthivel K 1582f5860992SSakthivel K static int 1583f5860992SSakthivel K pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha) 1584f5860992SSakthivel K { 1585f5860992SSakthivel K u32 regval; 1586f5860992SSakthivel K u32 bootloader_state; 158706f12f22SAnand Kumar Santhanam u32 ibutton0, ibutton1; 1588f5860992SSakthivel K 158972349b62SDeepak Ukey /* Process MPI table uninitialization only if FW is ready */ 159072349b62SDeepak Ukey if (!pm8001_ha->controller_fatal_error) { 1591f5860992SSakthivel K /* Check if MPI is in ready state to reset */ 1592f5860992SSakthivel K if (mpi_uninit_check(pm8001_ha) != 0) { 1593d384be6eSVikram Auradkar u32 r0 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 1594d384be6eSVikram Auradkar u32 r1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1595d384be6eSVikram Auradkar u32 r2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2); 1596d384be6eSVikram Auradkar u32 r3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 15971b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 1598d384be6eSVikram Auradkar "MPI state is not ready scratch: %x:%x:%x:%x\n", 15991b5d2793SJoe Perches r0, r1, r2, r3); 1600d384be6eSVikram Auradkar /* if things aren't ready but the bootloader is ok then 1601d384be6eSVikram Auradkar * try the reset anyway. 1602d384be6eSVikram Auradkar */ 1603d384be6eSVikram Auradkar if (r1 & SCRATCH_PAD1_BOOTSTATE_MASK) 1604f5860992SSakthivel K return -1; 1605f5860992SSakthivel K } 160672349b62SDeepak Ukey } 1607f5860992SSakthivel K /* checked for reset register normal state; 0x0 */ 1608f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 16091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "reset register before write : 0x%x\n", 16101b5d2793SJoe Perches regval); 1611f5860992SSakthivel K 1612f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE); 16134daf1ef3SVikram Auradkar msleep(500); 1614f5860992SSakthivel K 1615f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 16161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "reset register after write 0x%x\n", 16171b5d2793SJoe Perches regval); 1618f5860992SSakthivel K 1619f5860992SSakthivel K if ((regval & SPCv_SOFT_RESET_READ_MASK) == 1620f5860992SSakthivel K SPCv_SOFT_RESET_NORMAL_RESET_OCCURED) { 16211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16221b5d2793SJoe Perches " soft reset successful [regval: 0x%x]\n", 16231b5d2793SJoe Perches regval); 1624f5860992SSakthivel K } else { 16251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16261b5d2793SJoe Perches " soft reset failed [regval: 0x%x]\n", 16271b5d2793SJoe Perches regval); 1628f5860992SSakthivel K 1629f5860992SSakthivel K /* check bootloader is successfully executed or in HDA mode */ 1630f5860992SSakthivel K bootloader_state = 1631f5860992SSakthivel K pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) & 1632f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_MASK; 1633f5860992SSakthivel K 1634f5860992SSakthivel K if (bootloader_state == SCRATCH_PAD1_BOOTSTATE_HDA_SEEPROM) { 16351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16361b5d2793SJoe Perches "Bootloader state - HDA mode SEEPROM\n"); 1637f5860992SSakthivel K } else if (bootloader_state == 1638f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_BOOTSTRAP) { 16391b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16401b5d2793SJoe Perches "Bootloader state - HDA mode Bootstrap Pin\n"); 1641f5860992SSakthivel K } else if (bootloader_state == 1642f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_SOFTRESET) { 16431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16441b5d2793SJoe Perches "Bootloader state - HDA mode soft reset\n"); 1645f5860992SSakthivel K } else if (bootloader_state == 1646f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_CRIT_ERROR) { 16471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16481b5d2793SJoe Perches "Bootloader state-HDA mode critical error\n"); 1649f5860992SSakthivel K } 1650f5860992SSakthivel K return -EBUSY; 1651f5860992SSakthivel K } 1652f5860992SSakthivel K 1653f5860992SSakthivel K /* check the firmware status after reset */ 1654f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 16551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); 165606f12f22SAnand Kumar Santhanam /* check iButton feature support for motherboard controller */ 165706f12f22SAnand Kumar Santhanam if (pm8001_ha->pdev->subsystem_vendor != 165806f12f22SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2 && 1659faf321b0SBenjamin Rood pm8001_ha->pdev->subsystem_vendor != 1660faf321b0SBenjamin Rood PCI_VENDOR_ID_ATTO && 166106f12f22SAnand Kumar Santhanam pm8001_ha->pdev->subsystem_vendor != 0) { 166206f12f22SAnand Kumar Santhanam ibutton0 = pm8001_cr32(pm8001_ha, 0, 166306f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_6); 166406f12f22SAnand Kumar Santhanam ibutton1 = pm8001_cr32(pm8001_ha, 0, 166506f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_7); 166606f12f22SAnand Kumar Santhanam if (!ibutton0 && !ibutton1) { 16671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 16681b5d2793SJoe Perches "iButton Feature is not Available!!!\n"); 1669f5860992SSakthivel K return -EBUSY; 1670f5860992SSakthivel K } 167106f12f22SAnand Kumar Santhanam if (ibutton0 == 0xdeadbeef && ibutton1 == 0xdeadbeef) { 16721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 16731b5d2793SJoe Perches "CRC Check for iButton Feature Failed!!!\n"); 167406f12f22SAnand Kumar Santhanam return -EBUSY; 167506f12f22SAnand Kumar Santhanam } 167606f12f22SAnand Kumar Santhanam } 167706f12f22SAnand Kumar Santhanam } 16781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SPCv soft reset Complete\n"); 1679f5860992SSakthivel K return 0; 1680f5860992SSakthivel K } 1681f5860992SSakthivel K 1682f5860992SSakthivel K static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha) 1683f5860992SSakthivel K { 1684f5860992SSakthivel K u32 i; 1685f5860992SSakthivel K 16861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "chip reset start\n"); 1687f5860992SSakthivel K 1688f5860992SSakthivel K /* do SPCv chip reset. */ 1689f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11); 16901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n"); 1691f5860992SSakthivel K 1692f5860992SSakthivel K /* Check this ..whether delay is required or no */ 1693f5860992SSakthivel K /* delay 10 usec */ 1694f5860992SSakthivel K udelay(10); 1695f5860992SSakthivel K 1696f5860992SSakthivel K /* wait for 20 msec until the firmware gets reloaded */ 1697f5860992SSakthivel K i = 20; 1698f5860992SSakthivel K do { 1699f5860992SSakthivel K mdelay(1); 1700f5860992SSakthivel K } while ((--i) != 0); 1701f5860992SSakthivel K 17021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n"); 1703f5860992SSakthivel K } 1704f5860992SSakthivel K 1705f5860992SSakthivel K /** 1706f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1707f5860992SSakthivel K * @pm8001_ha: our hba card information 1708f5860992SSakthivel K */ 1709f5860992SSakthivel K static void 1710f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha) 1711f5860992SSakthivel K { 1712f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); 1713f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); 1714f5860992SSakthivel K } 1715f5860992SSakthivel K 1716f5860992SSakthivel K /** 1717f5860992SSakthivel K * pm8001_chip_intx_interrupt_disable- disable PM8001 chip interrupt 1718f5860992SSakthivel K * @pm8001_ha: our hba card information 1719f5860992SSakthivel K */ 1720f5860992SSakthivel K static void 1721f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha) 1722f5860992SSakthivel K { 1723f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL); 1724f5860992SSakthivel K } 1725f5860992SSakthivel K 1726f5860992SSakthivel K /** 1727f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1728f5860992SSakthivel K * @pm8001_ha: our hba card information 17296ad4a517SLee Jones * @vec: interrupt number to enable 1730f5860992SSakthivel K */ 1731f5860992SSakthivel K static void 1732f5860992SSakthivel K pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1733f5860992SSakthivel K { 1734f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1735f5860992SSakthivel K u32 mask; 1736f5860992SSakthivel K mask = (u32)(1 << vec); 1737f5860992SSakthivel K 1738f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF)); 1739f5860992SSakthivel K return; 1740f5860992SSakthivel K #endif 1741f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(pm8001_ha); 1742f5860992SSakthivel K 1743f5860992SSakthivel K } 1744f5860992SSakthivel K 1745f5860992SSakthivel K /** 1746f5860992SSakthivel K * pm8001_chip_interrupt_disable- disable PM8001 chip interrupt 1747f5860992SSakthivel K * @pm8001_ha: our hba card information 17486ad4a517SLee Jones * @vec: interrupt number to disable 1749f5860992SSakthivel K */ 1750f5860992SSakthivel K static void 1751f5860992SSakthivel K pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1752f5860992SSakthivel K { 1753f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1754f5860992SSakthivel K u32 mask; 1755f5860992SSakthivel K if (vec == 0xFF) 1756f5860992SSakthivel K mask = 0xFFFFFFFF; 1757f5860992SSakthivel K else 1758f5860992SSakthivel K mask = (u32)(1 << vec); 1759f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF)); 1760f5860992SSakthivel K return; 1761f5860992SSakthivel K #endif 1762f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(pm8001_ha); 1763f5860992SSakthivel K } 1764f5860992SSakthivel K 1765c6b9ef57SSakthivel K static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha, 1766c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1767c6b9ef57SSakthivel K { 1768c6b9ef57SSakthivel K int res; 1769c6b9ef57SSakthivel K u32 ccb_tag; 1770c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1771c6b9ef57SSakthivel K struct sas_task *task = NULL; 1772c6b9ef57SSakthivel K struct task_abort_req task_abort; 1773c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1774c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_ABORT; 1775c6b9ef57SSakthivel K int ret; 1776c6b9ef57SSakthivel K 1777c6b9ef57SSakthivel K if (!pm8001_ha_dev) { 17781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "dev is null\n"); 1779c6b9ef57SSakthivel K return; 1780c6b9ef57SSakthivel K } 1781c6b9ef57SSakthivel K 1782c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1783c6b9ef57SSakthivel K 1784c6b9ef57SSakthivel K if (!task) { 17851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task\n"); 1786c6b9ef57SSakthivel K return; 1787c6b9ef57SSakthivel K } 1788c6b9ef57SSakthivel K 1789c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1790c6b9ef57SSakthivel K 1791c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 17925533abcaSTomas Henzl if (res) { 17935533abcaSTomas Henzl sas_free_task(task); 1794c6b9ef57SSakthivel K return; 17955533abcaSTomas Henzl } 1796c6b9ef57SSakthivel K 1797c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1798c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1799c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1800c6b9ef57SSakthivel K ccb->task = task; 1801c6b9ef57SSakthivel K 1802c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1803c6b9ef57SSakthivel K 1804c6b9ef57SSakthivel K memset(&task_abort, 0, sizeof(task_abort)); 1805c6b9ef57SSakthivel K task_abort.abort_all = cpu_to_le32(1); 1806c6b9ef57SSakthivel K task_abort.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1807c6b9ef57SSakthivel K task_abort.tag = cpu_to_le32(ccb_tag); 1808c6b9ef57SSakthivel K 180991a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 181091a43fa6Speter chang sizeof(task_abort), 0); 18111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Executing abort task end\n"); 18125533abcaSTomas Henzl if (ret) { 18135533abcaSTomas Henzl sas_free_task(task); 18145533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18155533abcaSTomas Henzl } 1816c6b9ef57SSakthivel K } 1817c6b9ef57SSakthivel K 1818c6b9ef57SSakthivel K static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha, 1819c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1820c6b9ef57SSakthivel K { 1821c6b9ef57SSakthivel K struct sata_start_req sata_cmd; 1822c6b9ef57SSakthivel K int res; 1823c6b9ef57SSakthivel K u32 ccb_tag; 1824c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1825c6b9ef57SSakthivel K struct sas_task *task = NULL; 1826c6b9ef57SSakthivel K struct host_to_dev_fis fis; 1827c6b9ef57SSakthivel K struct domain_device *dev; 1828c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1829c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 1830c6b9ef57SSakthivel K 1831c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1832c6b9ef57SSakthivel K 1833c6b9ef57SSakthivel K if (!task) { 18341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task !!!\n"); 1835c6b9ef57SSakthivel K return; 1836c6b9ef57SSakthivel K } 1837c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1838c6b9ef57SSakthivel K 1839c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 1840c6b9ef57SSakthivel K if (res) { 18415533abcaSTomas Henzl sas_free_task(task); 18421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate tag !!!\n"); 1843c6b9ef57SSakthivel K return; 1844c6b9ef57SSakthivel K } 1845c6b9ef57SSakthivel K 1846c6b9ef57SSakthivel K /* allocate domain device by ourselves as libsas 1847c6b9ef57SSakthivel K * is not going to provide any 1848c6b9ef57SSakthivel K */ 1849c6b9ef57SSakthivel K dev = kzalloc(sizeof(struct domain_device), GFP_ATOMIC); 1850c6b9ef57SSakthivel K if (!dev) { 18515533abcaSTomas Henzl sas_free_task(task); 18525533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 18541b5d2793SJoe Perches "Domain device cannot be allocated\n"); 1855c6b9ef57SSakthivel K return; 18565533abcaSTomas Henzl } 18575533abcaSTomas Henzl 1858c6b9ef57SSakthivel K task->dev = dev; 1859c6b9ef57SSakthivel K task->dev->lldd_dev = pm8001_ha_dev; 1860c6b9ef57SSakthivel K 1861c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1862c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1863c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1864c6b9ef57SSakthivel K ccb->task = task; 18650b6df110SViswas G ccb->n_elem = 0; 1866c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_READ_LOG_FLAG; 1867c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_2ND_RLE_FLAG; 1868c6b9ef57SSakthivel K 1869c6b9ef57SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 1870c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1871c6b9ef57SSakthivel K 1872c6b9ef57SSakthivel K /* construct read log FIS */ 1873c6b9ef57SSakthivel K memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1874c6b9ef57SSakthivel K fis.fis_type = 0x27; 1875c6b9ef57SSakthivel K fis.flags = 0x80; 1876c6b9ef57SSakthivel K fis.command = ATA_CMD_READ_LOG_EXT; 1877c6b9ef57SSakthivel K fis.lbal = 0x10; 1878c6b9ef57SSakthivel K fis.sector_count = 0x1; 1879c6b9ef57SSakthivel K 1880c6b9ef57SSakthivel K sata_cmd.tag = cpu_to_le32(ccb_tag); 1881c6b9ef57SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1882c6b9ef57SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad |= ((0x1 << 7) | (0x5 << 9)); 1883c6b9ef57SSakthivel K memcpy(&sata_cmd.sata_fis, &fis, sizeof(struct host_to_dev_fis)); 1884c6b9ef57SSakthivel K 188591a43fa6Speter chang res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 188691a43fa6Speter chang sizeof(sata_cmd), 0); 18871b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Executing read log end\n"); 18885533abcaSTomas Henzl if (res) { 18895533abcaSTomas Henzl sas_free_task(task); 18905533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18915533abcaSTomas Henzl kfree(dev); 18925533abcaSTomas Henzl } 1893c6b9ef57SSakthivel K } 1894c6b9ef57SSakthivel K 1895f5860992SSakthivel K /** 1896f5860992SSakthivel K * mpi_ssp_completion- process the event that FW response to the SSP request. 1897f5860992SSakthivel K * @pm8001_ha: our hba card information 1898f5860992SSakthivel K * @piomb: the message contents of this outbound message. 1899f5860992SSakthivel K * 1900f5860992SSakthivel K * When FW has completed a ssp request for example a IO request, after it has 1901f5860992SSakthivel K * filled the SG data with the data, it will trigger this event represent 1902f5860992SSakthivel K * that he has finished the job,please check the coresponding buffer. 1903f5860992SSakthivel K * So we will tell the caller who maybe waiting the result to tell upper layer 1904f5860992SSakthivel K * that the task has been finished. 1905f5860992SSakthivel K */ 1906f5860992SSakthivel K static void 1907f5860992SSakthivel K mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb) 1908f5860992SSakthivel K { 1909f5860992SSakthivel K struct sas_task *t; 1910f5860992SSakthivel K struct pm8001_ccb_info *ccb; 1911f5860992SSakthivel K unsigned long flags; 1912f5860992SSakthivel K u32 status; 1913f5860992SSakthivel K u32 param; 1914f5860992SSakthivel K u32 tag; 1915f5860992SSakthivel K struct ssp_completion_resp *psspPayload; 1916f5860992SSakthivel K struct task_status_struct *ts; 1917f5860992SSakthivel K struct ssp_response_iu *iu; 1918f5860992SSakthivel K struct pm8001_device *pm8001_dev; 1919f5860992SSakthivel K psspPayload = (struct ssp_completion_resp *)(piomb + 4); 1920f5860992SSakthivel K status = le32_to_cpu(psspPayload->status); 1921f5860992SSakthivel K tag = le32_to_cpu(psspPayload->tag); 1922f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 1923f5860992SSakthivel K if ((status == IO_ABORTED) && ccb->open_retry) { 1924f5860992SSakthivel K /* Being completed by another */ 1925f5860992SSakthivel K ccb->open_retry = 0; 1926f5860992SSakthivel K return; 1927f5860992SSakthivel K } 1928f5860992SSakthivel K pm8001_dev = ccb->device; 1929f5860992SSakthivel K param = le32_to_cpu(psspPayload->param); 1930f5860992SSakthivel K t = ccb->task; 1931f5860992SSakthivel K 1932f5860992SSakthivel K if (status && status != IO_UNDERFLOW) 19331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status); 1934f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 1935f5860992SSakthivel K return; 1936f5860992SSakthivel K ts = &t->task_status; 19377370672dSpeter chang 19381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 19391b5d2793SJoe Perches "tag::0x%x, status::0x%x task::0x%p\n", tag, status, t); 19407370672dSpeter chang 1941cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 1942cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 1943cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) 19441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n", 19451b5d2793SJoe Perches SAS_ADDR(t->dev->sas_addr)); 1946cb269c26SAnand Kumar Santhanam 1947f5860992SSakthivel K switch (status) { 1948f5860992SSakthivel K case IO_SUCCESS: 19491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS ,param = 0x%x\n", 19501b5d2793SJoe Perches param); 1951f5860992SSakthivel K if (param == 0) { 1952f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1953f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 1954f5860992SSakthivel K } else { 1955f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1956f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 1957f5860992SSakthivel K ts->residual = param; 1958f5860992SSakthivel K iu = &psspPayload->ssp_resp_iu; 1959f5860992SSakthivel K sas_ssp_task_response(pm8001_ha->dev, t, iu); 1960f5860992SSakthivel K } 1961f5860992SSakthivel K if (pm8001_dev) 19624a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1963f5860992SSakthivel K break; 1964f5860992SSakthivel K case IO_ABORTED: 19651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); 1966f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1967f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 19684a2efd4bSViswas G if (pm8001_dev) 19694a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1970f5860992SSakthivel K break; 1971f5860992SSakthivel K case IO_UNDERFLOW: 1972f5860992SSakthivel K /* SSP Completion with error */ 19731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW ,param = 0x%x\n", 19741b5d2793SJoe Perches param); 1975f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1976f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 1977f5860992SSakthivel K ts->residual = param; 1978f5860992SSakthivel K if (pm8001_dev) 19794a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1980f5860992SSakthivel K break; 1981f5860992SSakthivel K case IO_NO_DEVICE: 19821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 1983f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1984f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 19854a2efd4bSViswas G if (pm8001_dev) 19864a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1987f5860992SSakthivel K break; 1988f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 19891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 1990f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1991f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1992f5860992SSakthivel K /* Force the midlayer to retry */ 1993f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 19944a2efd4bSViswas G if (pm8001_dev) 19954a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1996f5860992SSakthivel K break; 1997f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 19981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 1999f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2000f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2001f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20024a2efd4bSViswas G if (pm8001_dev) 20034a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2004f5860992SSakthivel K break; 200527ecfa5eSViswas G case IO_XFER_ERROR_INVALID_SSP_RSP_FRAME: 20061b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20071b5d2793SJoe Perches "IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n"); 200827ecfa5eSViswas G ts->resp = SAS_TASK_COMPLETE; 200927ecfa5eSViswas G ts->stat = SAS_OPEN_REJECT; 201027ecfa5eSViswas G ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20114a2efd4bSViswas G if (pm8001_dev) 20124a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 201327ecfa5eSViswas G break; 2014f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 20151b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20161b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2017f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2018f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2019f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 20204a2efd4bSViswas G if (pm8001_dev) 20214a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2022f5860992SSakthivel K break; 2023f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 20241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20251b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2026f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2027f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2028f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 20294a2efd4bSViswas G if (pm8001_dev) 20304a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2031f5860992SSakthivel K break; 2032f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 20331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2034f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2035f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2036f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20374a2efd4bSViswas G if (pm8001_dev) 20384a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2039f5860992SSakthivel K break; 2040f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2041a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2042a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2043a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2044a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2045a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 20461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2047f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2048f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2049f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2050f5860992SSakthivel K if (!t->uldd_task) 2051f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2052f5860992SSakthivel K pm8001_dev, 2053f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2054f5860992SSakthivel K break; 2055f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 20561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20571b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2058f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2059f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2060f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 20614a2efd4bSViswas G if (pm8001_dev) 20624a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2063f5860992SSakthivel K break; 2064f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 20651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20661b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2067f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2068f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2069f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 20704a2efd4bSViswas G if (pm8001_dev) 20714a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2072f5860992SSakthivel K break; 2073f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 20741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20751b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2076f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2077f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2078f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 20794a2efd4bSViswas G if (pm8001_dev) 20804a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2081f5860992SSakthivel K break; 2082f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 20831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2084f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2085f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2086f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20874a2efd4bSViswas G if (pm8001_dev) 20884a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2089f5860992SSakthivel K break; 2090f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 20911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2092f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2093f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 20944a2efd4bSViswas G if (pm8001_dev) 20954a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2096f5860992SSakthivel K break; 2097f5860992SSakthivel K case IO_XFER_ERROR_DMA: 20981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); 2099f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2100f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21014a2efd4bSViswas G if (pm8001_dev) 21024a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2103f5860992SSakthivel K break; 2104f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 21051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2106f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2107f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2108f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 21094a2efd4bSViswas G if (pm8001_dev) 21104a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2111f5860992SSakthivel K break; 2112f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 21131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2114f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2115f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21164a2efd4bSViswas G if (pm8001_dev) 21174a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2118f5860992SSakthivel K break; 2119f5860992SSakthivel K case IO_PORT_IN_RESET: 21201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 2121f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2122f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21234a2efd4bSViswas G if (pm8001_dev) 21244a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2125f5860992SSakthivel K break; 2126f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 21271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 2128f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2129f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2130f5860992SSakthivel K if (!t->uldd_task) 2131f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2132f5860992SSakthivel K pm8001_dev, 2133f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2134f5860992SSakthivel K break; 2135f5860992SSakthivel K case IO_DS_IN_RECOVERY: 21361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 2137f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2138f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21394a2efd4bSViswas G if (pm8001_dev) 21404a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2141f5860992SSakthivel K break; 2142f5860992SSakthivel K case IO_TM_TAG_NOT_FOUND: 21431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n"); 2144f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2145f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21464a2efd4bSViswas G if (pm8001_dev) 21474a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2148f5860992SSakthivel K break; 2149f5860992SSakthivel K case IO_SSP_EXT_IU_ZERO_LEN_ERROR: 21501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"); 2151f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2152f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21534a2efd4bSViswas G if (pm8001_dev) 21544a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2155f5860992SSakthivel K break; 2156f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 21571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 21581b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 2159f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2160f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2161f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 21624a2efd4bSViswas G if (pm8001_dev) 21634a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2164f5860992SSakthivel K break; 2165f5860992SSakthivel K default: 21661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); 2167f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2168f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2169f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21704a2efd4bSViswas G if (pm8001_dev) 21714a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2172f5860992SSakthivel K break; 2173f5860992SSakthivel K } 21741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "scsi_status = 0x%x\n ", 21751b5d2793SJoe Perches psspPayload->ssp_resp_iu.status); 2176f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2177f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2178f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2179f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2180f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2181f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 21821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 21831b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 21841b5d2793SJoe Perches t, status, ts->resp, ts->stat); 2185869ddbdcSViswas G if (t->slow_task) 2186869ddbdcSViswas G complete(&t->slow_task->completion); 2187f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2188f5860992SSakthivel K } else { 2189f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2190f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2191f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2192f5860992SSakthivel K t->task_done(t); 2193f5860992SSakthivel K } 2194f5860992SSakthivel K } 2195f5860992SSakthivel K 2196f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2197f5860992SSakthivel K static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 2198f5860992SSakthivel K { 2199f5860992SSakthivel K struct sas_task *t; 2200f5860992SSakthivel K unsigned long flags; 2201f5860992SSakthivel K struct task_status_struct *ts; 2202f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2203f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2204f5860992SSakthivel K struct ssp_event_resp *psspPayload = 2205f5860992SSakthivel K (struct ssp_event_resp *)(piomb + 4); 2206f5860992SSakthivel K u32 event = le32_to_cpu(psspPayload->event); 2207f5860992SSakthivel K u32 tag = le32_to_cpu(psspPayload->tag); 2208f5860992SSakthivel K u32 port_id = le32_to_cpu(psspPayload->port_id); 2209f5860992SSakthivel K 2210f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2211f5860992SSakthivel K t = ccb->task; 2212f5860992SSakthivel K pm8001_dev = ccb->device; 2213f5860992SSakthivel K if (event) 22141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event); 2215f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 2216f5860992SSakthivel K return; 2217f5860992SSakthivel K ts = &t->task_status; 22181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", 22191b5d2793SJoe Perches port_id, tag, event); 2220f5860992SSakthivel K switch (event) { 2221f5860992SSakthivel K case IO_OVERFLOW: 22221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 2223f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2224f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2225f5860992SSakthivel K ts->residual = 0; 2226f5860992SSakthivel K if (pm8001_dev) 22274a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2228f5860992SSakthivel K break; 2229f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 22301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2231f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK); 2232f5860992SSakthivel K return; 2233f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 22341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2235f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2236f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2237f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2238f5860992SSakthivel K break; 2239f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 22401b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22411b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2242f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2243f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2244f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2245f5860992SSakthivel K break; 2246f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 22471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22481b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2249f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2250f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2251f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2252f5860992SSakthivel K break; 2253f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 22541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2255f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2256f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2257f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2258f5860992SSakthivel K break; 2259f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2260a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2261a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2262a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2263a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2264a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 22651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2266f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2267f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2268f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2269f5860992SSakthivel K if (!t->uldd_task) 2270f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2271f5860992SSakthivel K pm8001_dev, 2272f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2273f5860992SSakthivel K break; 2274f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 22751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22761b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2277f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2278f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2279f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2280f5860992SSakthivel K break; 2281f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 22821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22831b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2284f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2285f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2286f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2287f5860992SSakthivel K break; 2288f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 22891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22901b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2291f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2292f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2293f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2294f5860992SSakthivel K break; 2295f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 22961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2297f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2298f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2299f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2300f5860992SSakthivel K break; 2301f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 23021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2303f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2304f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2305f5860992SSakthivel K break; 2306f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 23071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2308f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT); 2309f5860992SSakthivel K return; 2310f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 23111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); 2312f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2313f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2314f5860992SSakthivel K break; 2315f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 23161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); 2317f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2318f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2319f5860992SSakthivel K break; 2320f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 23211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 23221b5d2793SJoe Perches "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); 2323f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2324f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2325f5860992SSakthivel K break; 2326f5860992SSakthivel K case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT: 23271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 23281b5d2793SJoe Perches "IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n"); 2329f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2330f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2331f5860992SSakthivel K break; 2332f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 23331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2334f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2335f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2336f5860992SSakthivel K break; 2337f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 23381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 23391b5d2793SJoe Perches "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); 2340f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2341f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2342f5860992SSakthivel K break; 2343a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 23441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, 23451b5d2793SJoe Perches "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"); 2346a6cb3d01SSakthivel K /* TBC: used default set values */ 2347a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2348a6cb3d01SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2349a6cb3d01SSakthivel K break; 2350f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 23511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); 2352f5860992SSakthivel K return; 2353f5860992SSakthivel K default: 23541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event); 2355f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2356f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2357f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2358f5860992SSakthivel K break; 2359f5860992SSakthivel K } 2360f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2361f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2362f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2363f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2364f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2365f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 23661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 23671b5d2793SJoe Perches "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 23681b5d2793SJoe Perches t, event, ts->resp, ts->stat); 2369f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2370f5860992SSakthivel K } else { 2371f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2372f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2373f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2374f5860992SSakthivel K t->task_done(t); 2375f5860992SSakthivel K } 2376f5860992SSakthivel K } 2377f5860992SSakthivel K 2378f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2379f5860992SSakthivel K static void 2380f5860992SSakthivel K mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 2381f5860992SSakthivel K { 2382f5860992SSakthivel K struct sas_task *t; 2383f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2384f5860992SSakthivel K u32 param; 2385f5860992SSakthivel K u32 status; 2386f5860992SSakthivel K u32 tag; 2387cb269c26SAnand Kumar Santhanam int i, j; 2388cb269c26SAnand Kumar Santhanam u8 sata_addr_low[4]; 2389cb269c26SAnand Kumar Santhanam u32 temp_sata_addr_low, temp_sata_addr_hi; 2390cb269c26SAnand Kumar Santhanam u8 sata_addr_hi[4]; 2391f5860992SSakthivel K struct sata_completion_resp *psataPayload; 2392f5860992SSakthivel K struct task_status_struct *ts; 2393f5860992SSakthivel K struct ata_task_resp *resp ; 2394f5860992SSakthivel K u32 *sata_resp; 2395f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2396c6b9ef57SSakthivel K unsigned long flags; 2397f5860992SSakthivel K 2398f5860992SSakthivel K psataPayload = (struct sata_completion_resp *)(piomb + 4); 2399f5860992SSakthivel K status = le32_to_cpu(psataPayload->status); 2400f5860992SSakthivel K tag = le32_to_cpu(psataPayload->tag); 2401f5860992SSakthivel K 2402c6b9ef57SSakthivel K if (!tag) { 24031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "tag null\n"); 2404c6b9ef57SSakthivel K return; 2405c6b9ef57SSakthivel K } 2406f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2407f5860992SSakthivel K param = le32_to_cpu(psataPayload->param); 2408c6b9ef57SSakthivel K if (ccb) { 2409f5860992SSakthivel K t = ccb->task; 2410f5860992SSakthivel K pm8001_dev = ccb->device; 2411c6b9ef57SSakthivel K } else { 24121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "ccb null\n"); 2413f5860992SSakthivel K return; 2414c6b9ef57SSakthivel K } 2415c6b9ef57SSakthivel K 2416c6b9ef57SSakthivel K if (t) { 2417c6b9ef57SSakthivel K if (t->dev && (t->dev->lldd_dev)) 2418c6b9ef57SSakthivel K pm8001_dev = t->dev->lldd_dev; 2419c6b9ef57SSakthivel K } else { 24201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task null\n"); 2421c6b9ef57SSakthivel K return; 2422c6b9ef57SSakthivel K } 2423c6b9ef57SSakthivel K 2424c6b9ef57SSakthivel K if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG)) 2425c6b9ef57SSakthivel K && unlikely(!t || !t->lldd_task || !t->dev)) { 24261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); 2427c6b9ef57SSakthivel K return; 2428c6b9ef57SSakthivel K } 2429c6b9ef57SSakthivel K 2430c6b9ef57SSakthivel K ts = &t->task_status; 2431c6b9ef57SSakthivel K if (!ts) { 24321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "ts null\n"); 2433c6b9ef57SSakthivel K return; 2434c6b9ef57SSakthivel K } 24357370672dSpeter chang 24364f608fbcSVishakha Channapattan if (status != IO_SUCCESS) { 24374f608fbcSVishakha Channapattan pm8001_dbg(pm8001_ha, FAIL, 24384f608fbcSVishakha Channapattan "IO failed device_id %u status 0x%x tag %d\n", 24394f608fbcSVishakha Channapattan pm8001_dev->device_id, status, tag); 24404f608fbcSVishakha Channapattan } 24417370672dSpeter chang 2442cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 2443cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 2444cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) { 2445cb269c26SAnand Kumar Santhanam if (!((t->dev->parent) && 2446924a3541SJohn Garry (dev_is_expander(t->dev->parent->dev_type)))) { 2447cb269c26SAnand Kumar Santhanam for (i = 0 , j = 4; i <= 3 && j <= 7; i++ , j++) 2448cb269c26SAnand Kumar Santhanam sata_addr_low[i] = pm8001_ha->sas_addr[j]; 2449cb269c26SAnand Kumar Santhanam for (i = 0 , j = 0; i <= 3 && j <= 3; i++ , j++) 2450cb269c26SAnand Kumar Santhanam sata_addr_hi[i] = pm8001_ha->sas_addr[j]; 2451cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_low, sata_addr_low, 2452cb269c26SAnand Kumar Santhanam sizeof(sata_addr_low)); 2453cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_hi, sata_addr_hi, 2454cb269c26SAnand Kumar Santhanam sizeof(sata_addr_hi)); 2455cb269c26SAnand Kumar Santhanam temp_sata_addr_hi = (((temp_sata_addr_hi >> 24) & 0xff) 2456cb269c26SAnand Kumar Santhanam |((temp_sata_addr_hi << 8) & 2457cb269c26SAnand Kumar Santhanam 0xff0000) | 2458cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi >> 8) 2459cb269c26SAnand Kumar Santhanam & 0xff00) | 2460cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi << 24) & 2461cb269c26SAnand Kumar Santhanam 0xff000000)); 2462cb269c26SAnand Kumar Santhanam temp_sata_addr_low = ((((temp_sata_addr_low >> 24) 2463cb269c26SAnand Kumar Santhanam & 0xff) | 2464cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 8) 2465cb269c26SAnand Kumar Santhanam & 0xff0000) | 2466cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low >> 8) 2467cb269c26SAnand Kumar Santhanam & 0xff00) | 2468cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 24) 2469cb269c26SAnand Kumar Santhanam & 0xff000000)) + 2470cb269c26SAnand Kumar Santhanam pm8001_dev->attached_phy + 2471cb269c26SAnand Kumar Santhanam 0x10); 24721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 24731b5d2793SJoe Perches "SAS Address of IO Failure Drive:%08x%08x\n", 24741b5d2793SJoe Perches temp_sata_addr_hi, 24751b5d2793SJoe Perches temp_sata_addr_low); 2476f5860992SSakthivel K 2477cb269c26SAnand Kumar Santhanam } else { 24781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 24791b5d2793SJoe Perches "SAS Address of IO Failure Drive:%016llx\n", 24801b5d2793SJoe Perches SAS_ADDR(t->dev->sas_addr)); 2481cb269c26SAnand Kumar Santhanam } 2482cb269c26SAnand Kumar Santhanam } 2483f5860992SSakthivel K switch (status) { 2484f5860992SSakthivel K case IO_SUCCESS: 24851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); 2486f5860992SSakthivel K if (param == 0) { 2487f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2488f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 2489c6b9ef57SSakthivel K /* check if response is for SEND READ LOG */ 2490c6b9ef57SSakthivel K if (pm8001_dev && 2491c6b9ef57SSakthivel K (pm8001_dev->id & NCQ_READ_LOG_FLAG)) { 2492c6b9ef57SSakthivel K /* set new bit for abort_all */ 2493c6b9ef57SSakthivel K pm8001_dev->id |= NCQ_ABORT_ALL_FLAG; 2494c6b9ef57SSakthivel K /* clear bit for read log */ 2495c6b9ef57SSakthivel K pm8001_dev->id = pm8001_dev->id & 0x7FFFFFFF; 2496c6b9ef57SSakthivel K pm80xx_send_abort_all(pm8001_ha, pm8001_dev); 2497c6b9ef57SSakthivel K /* Free the tag */ 2498c6b9ef57SSakthivel K pm8001_tag_free(pm8001_ha, tag); 2499c6b9ef57SSakthivel K sas_free_task(t); 2500c6b9ef57SSakthivel K return; 2501c6b9ef57SSakthivel K } 2502f5860992SSakthivel K } else { 2503f5860992SSakthivel K u8 len; 2504f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2505f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 2506f5860992SSakthivel K ts->residual = param; 25071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25081b5d2793SJoe Perches "SAS_PROTO_RESPONSE len = %d\n", 25091b5d2793SJoe Perches param); 2510f5860992SSakthivel K sata_resp = &psataPayload->sata_resp[0]; 2511f5860992SSakthivel K resp = (struct ata_task_resp *)ts->buf; 2512f5860992SSakthivel K if (t->ata_task.dma_xfer == 0 && 2513f73bdebdSChristoph Hellwig t->data_dir == DMA_FROM_DEVICE) { 2514f5860992SSakthivel K len = sizeof(struct pio_setup_fis); 25151b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25161b5d2793SJoe Perches "PIO read len = %d\n", len); 2517f5860992SSakthivel K } else if (t->ata_task.use_ncq) { 2518f5860992SSakthivel K len = sizeof(struct set_dev_bits_fis); 25191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n", 25201b5d2793SJoe Perches len); 2521f5860992SSakthivel K } else { 2522f5860992SSakthivel K len = sizeof(struct dev_to_host_fis); 25231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "other len = %d\n", 25241b5d2793SJoe Perches len); 2525f5860992SSakthivel K } 2526f5860992SSakthivel K if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) { 2527f5860992SSakthivel K resp->frame_len = len; 2528f5860992SSakthivel K memcpy(&resp->ending_fis[0], sata_resp, len); 2529f5860992SSakthivel K ts->buf_valid_size = sizeof(*resp); 2530f5860992SSakthivel K } else 25311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25321b5d2793SJoe Perches "response too large\n"); 2533f5860992SSakthivel K } 2534f5860992SSakthivel K if (pm8001_dev) 25354a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2536f5860992SSakthivel K break; 2537f5860992SSakthivel K case IO_ABORTED: 25381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); 2539f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2540f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2541f5860992SSakthivel K if (pm8001_dev) 25424a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2543f5860992SSakthivel K break; 2544f5860992SSakthivel K /* following cases are to do cases */ 2545f5860992SSakthivel K case IO_UNDERFLOW: 2546f5860992SSakthivel K /* SATA Completion with error */ 25471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param); 2548f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2549f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2550f5860992SSakthivel K ts->residual = param; 2551f5860992SSakthivel K if (pm8001_dev) 25524a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2553f5860992SSakthivel K break; 2554f5860992SSakthivel K case IO_NO_DEVICE: 25551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 2556f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2557f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 25584a2efd4bSViswas G if (pm8001_dev) 25594a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2560f5860992SSakthivel K break; 2561f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 25621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2563f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2564f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 25654a2efd4bSViswas G if (pm8001_dev) 25664a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2567f5860992SSakthivel K break; 2568f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 25691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2570f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2571f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2572f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 25734a2efd4bSViswas G if (pm8001_dev) 25744a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2575f5860992SSakthivel K break; 2576f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 25771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25781b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2579f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2580f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2581f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 25824a2efd4bSViswas G if (pm8001_dev) 25834a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2584f5860992SSakthivel K break; 2585f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 25861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25871b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2588f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2589f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2590f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 25914a2efd4bSViswas G if (pm8001_dev) 25924a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2593f5860992SSakthivel K break; 2594f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 25951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2596f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2597f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2598f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 25994a2efd4bSViswas G if (pm8001_dev) 26004a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2601f5860992SSakthivel K break; 2602f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2603a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2604a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2605a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2606a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2607a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 26081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2609f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2610f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2611f5860992SSakthivel K if (!t->uldd_task) { 2612f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2613f5860992SSakthivel K pm8001_dev, 2614f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2615f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2616f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 26172b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2618f5860992SSakthivel K return; 2619f5860992SSakthivel K } 2620f5860992SSakthivel K break; 2621f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 26221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26231b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2624f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2625f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2626f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2627f5860992SSakthivel K if (!t->uldd_task) { 2628f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2629f5860992SSakthivel K pm8001_dev, 2630f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2631f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2632f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 26332b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2634f5860992SSakthivel K return; 2635f5860992SSakthivel K } 2636f5860992SSakthivel K break; 2637f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 26381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26391b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2640f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2641f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2642f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 26434a2efd4bSViswas G if (pm8001_dev) 26444a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2645f5860992SSakthivel K break; 2646f5860992SSakthivel K case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY: 26471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26481b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n"); 2649f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2650f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2651f5860992SSakthivel K if (!t->uldd_task) { 2652f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2653f5860992SSakthivel K pm8001_dev, 2654f5860992SSakthivel K IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY); 2655f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2656f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 26572b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2658f5860992SSakthivel K return; 2659f5860992SSakthivel K } 2660f5860992SSakthivel K break; 2661f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 26621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26631b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2664f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2665f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2666f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 26674a2efd4bSViswas G if (pm8001_dev) 26684a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2669f5860992SSakthivel K break; 2670f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 26711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2672f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2673f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 26744a2efd4bSViswas G if (pm8001_dev) 26754a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2676f5860992SSakthivel K break; 2677f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 26781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2679f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2680f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 26814a2efd4bSViswas G if (pm8001_dev) 26824a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2683f5860992SSakthivel K break; 2684f5860992SSakthivel K case IO_XFER_ERROR_DMA: 26851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); 2686f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2687f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 26884a2efd4bSViswas G if (pm8001_dev) 26894a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2690f5860992SSakthivel K break; 2691f5860992SSakthivel K case IO_XFER_ERROR_SATA_LINK_TIMEOUT: 26921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"); 2693f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2694f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 26954a2efd4bSViswas G if (pm8001_dev) 26964a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2697f5860992SSakthivel K break; 2698f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 26991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); 2700f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2701f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 27024a2efd4bSViswas G if (pm8001_dev) 27034a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2704f5860992SSakthivel K break; 2705f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 27061b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2707f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2708f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 27094a2efd4bSViswas G if (pm8001_dev) 27104a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2711f5860992SSakthivel K break; 2712f5860992SSakthivel K case IO_PORT_IN_RESET: 27131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 2714f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2715f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27164a2efd4bSViswas G if (pm8001_dev) 27174a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2718f5860992SSakthivel K break; 2719f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 27201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 2721f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2722f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2723f5860992SSakthivel K if (!t->uldd_task) { 2724f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2725f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2726f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2727f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 27282b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2729f5860992SSakthivel K return; 2730f5860992SSakthivel K } 2731f5860992SSakthivel K break; 2732f5860992SSakthivel K case IO_DS_IN_RECOVERY: 27331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 2734f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2735f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27364a2efd4bSViswas G if (pm8001_dev) 27374a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2738f5860992SSakthivel K break; 2739f5860992SSakthivel K case IO_DS_IN_ERROR: 27401b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n"); 2741f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2742f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2743f5860992SSakthivel K if (!t->uldd_task) { 2744f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2745f5860992SSakthivel K IO_DS_IN_ERROR); 2746f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2747f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 27482b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2749f5860992SSakthivel K return; 2750f5860992SSakthivel K } 2751f5860992SSakthivel K break; 2752f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 27531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 27541b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 2755f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2756f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2757f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 27584a2efd4bSViswas G if (pm8001_dev) 27594a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 276050acde8eSJohannes Thumshirn break; 2761f5860992SSakthivel K default: 27624f608fbcSVishakha Channapattan pm8001_dbg(pm8001_ha, DEVIO, 27634f608fbcSVishakha Channapattan "Unknown status device_id %u status 0x%x tag %d\n", 27644f608fbcSVishakha Channapattan pm8001_dev->device_id, status, tag); 2765f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2766f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2767f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27684a2efd4bSViswas G if (pm8001_dev) 27694a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2770f5860992SSakthivel K break; 2771f5860992SSakthivel K } 2772f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2773f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2774f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2775f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2776f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2777f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 27781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 27791b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 27801b5d2793SJoe Perches t, status, ts->resp, ts->stat); 2781ce21c63eSpeter chang if (t->slow_task) 2782ce21c63eSpeter chang complete(&t->slow_task->completion); 2783f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 27842b01d816SSuresh Thiagarajan } else { 2785f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 27862b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2787f5860992SSakthivel K } 2788f5860992SSakthivel K } 2789f5860992SSakthivel K 2790f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2791f5860992SSakthivel K static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 2792f5860992SSakthivel K { 2793f5860992SSakthivel K struct sas_task *t; 2794f5860992SSakthivel K struct task_status_struct *ts; 2795f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2796f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2797f5860992SSakthivel K struct sata_event_resp *psataPayload = 2798f5860992SSakthivel K (struct sata_event_resp *)(piomb + 4); 2799f5860992SSakthivel K u32 event = le32_to_cpu(psataPayload->event); 2800f5860992SSakthivel K u32 tag = le32_to_cpu(psataPayload->tag); 2801f5860992SSakthivel K u32 port_id = le32_to_cpu(psataPayload->port_id); 2802c6b9ef57SSakthivel K u32 dev_id = le32_to_cpu(psataPayload->device_id); 2803c6b9ef57SSakthivel K unsigned long flags; 2804f5860992SSakthivel K 2805f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2806c6b9ef57SSakthivel K 2807c6b9ef57SSakthivel K if (ccb) { 2808f5860992SSakthivel K t = ccb->task; 2809f5860992SSakthivel K pm8001_dev = ccb->device; 2810c6b9ef57SSakthivel K } else { 28111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "No CCB !!!. returning\n"); 2812c6b9ef57SSakthivel K return; 2813c6b9ef57SSakthivel K } 2814f5860992SSakthivel K if (event) 28151b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event); 2816c6b9ef57SSakthivel K 2817c6b9ef57SSakthivel K /* Check if this is NCQ error */ 2818c6b9ef57SSakthivel K if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) { 2819c6b9ef57SSakthivel K /* find device using device id */ 2820c6b9ef57SSakthivel K pm8001_dev = pm8001_find_dev(pm8001_ha, dev_id); 2821c6b9ef57SSakthivel K /* send read log extension */ 2822c6b9ef57SSakthivel K if (pm8001_dev) 2823c6b9ef57SSakthivel K pm80xx_send_read_log(pm8001_ha, pm8001_dev); 2824f5860992SSakthivel K return; 2825c6b9ef57SSakthivel K } 2826c6b9ef57SSakthivel K 2827c6b9ef57SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) { 28281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); 2829c6b9ef57SSakthivel K return; 2830c6b9ef57SSakthivel K } 2831c6b9ef57SSakthivel K 2832f5860992SSakthivel K ts = &t->task_status; 28331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", 28341b5d2793SJoe Perches port_id, tag, event); 2835f5860992SSakthivel K switch (event) { 2836f5860992SSakthivel K case IO_OVERFLOW: 28371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 2838f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2839f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2840f5860992SSakthivel K ts->residual = 0; 2841f5860992SSakthivel K if (pm8001_dev) 28424a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2843f5860992SSakthivel K break; 2844f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 28451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2846f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2847f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2848f5860992SSakthivel K break; 2849f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 28501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2851f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2852f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2853f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2854f5860992SSakthivel K break; 2855f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 28561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28571b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2858f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2859f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2860f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2861f5860992SSakthivel K break; 2862f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 28631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28641b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2865f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2866f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2867f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2868f5860992SSakthivel K break; 2869f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 28701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2871f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2872f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2873f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2874f5860992SSakthivel K break; 2875f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2876a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2877a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2878a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2879a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2880a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 28811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 28821b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2883f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2884f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2885f5860992SSakthivel K if (!t->uldd_task) { 2886f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2887f5860992SSakthivel K pm8001_dev, 2888f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2889f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2890f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 28912b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2892f5860992SSakthivel K return; 2893f5860992SSakthivel K } 2894f5860992SSakthivel K break; 2895f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 28961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28971b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2898f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2899f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2900f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2901f5860992SSakthivel K break; 2902f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 29031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29041b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2905f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2906f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2907f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2908f5860992SSakthivel K break; 2909f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 29101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29111b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2912f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2913f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2914f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2915f5860992SSakthivel K break; 2916f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 29171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2918f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2919f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2920f5860992SSakthivel K break; 2921f5860992SSakthivel K case IO_XFER_ERROR_PEER_ABORTED: 29221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n"); 2923f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2924f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2925f5860992SSakthivel K break; 2926f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 29271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); 2928f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2929f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2930f5860992SSakthivel K break; 2931f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 29321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2933f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2934f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2935f5860992SSakthivel K break; 2936f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 29371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); 2938f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2939f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2940f5860992SSakthivel K break; 2941f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 29421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); 2943f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2944f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2945f5860992SSakthivel K break; 2946f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 29471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29481b5d2793SJoe Perches "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); 2949f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2950f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2951f5860992SSakthivel K break; 2952f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 29531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2954f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2955f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2956f5860992SSakthivel K break; 2957f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 29581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29591b5d2793SJoe Perches "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); 2960f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2961f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2962f5860992SSakthivel K break; 2963f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 29641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); 2965f5860992SSakthivel K break; 2966f5860992SSakthivel K case IO_XFER_PIO_SETUP_ERROR: 29671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n"); 2968f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2969f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2970f5860992SSakthivel K break; 2971a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 29721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 29731b5d2793SJoe Perches "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"); 2974a6cb3d01SSakthivel K /* TBC: used default set values */ 2975a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2976a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2977a6cb3d01SSakthivel K break; 2978a6cb3d01SSakthivel K case IO_XFER_DMA_ACTIVATE_TIMEOUT: 29791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "IO_XFR_DMA_ACTIVATE_TIMEOUT\n"); 2980a6cb3d01SSakthivel K /* TBC: used default set values */ 2981a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2982a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2983a6cb3d01SSakthivel K break; 2984f5860992SSakthivel K default: 29851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "Unknown status 0x%x\n", event); 2986f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2987f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2988f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2989f5860992SSakthivel K break; 2990f5860992SSakthivel K } 2991f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2992f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2993f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2994f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2995f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2996f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 29971b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 29981b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 29991b5d2793SJoe Perches t, event, ts->resp, ts->stat); 3000f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 30012b01d816SSuresh Thiagarajan } else { 3002f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 30032b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 3004f5860992SSakthivel K } 3005f5860992SSakthivel K } 3006f5860992SSakthivel K 3007f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 3008f5860992SSakthivel K static void 3009f5860992SSakthivel K mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 3010f5860992SSakthivel K { 3011f5860992SSakthivel K u32 param, i; 3012f5860992SSakthivel K struct sas_task *t; 3013f5860992SSakthivel K struct pm8001_ccb_info *ccb; 3014f5860992SSakthivel K unsigned long flags; 3015f5860992SSakthivel K u32 status; 3016f5860992SSakthivel K u32 tag; 3017f5860992SSakthivel K struct smp_completion_resp *psmpPayload; 3018f5860992SSakthivel K struct task_status_struct *ts; 3019f5860992SSakthivel K struct pm8001_device *pm8001_dev; 3020f5860992SSakthivel K char *pdma_respaddr = NULL; 3021f5860992SSakthivel K 3022f5860992SSakthivel K psmpPayload = (struct smp_completion_resp *)(piomb + 4); 3023f5860992SSakthivel K status = le32_to_cpu(psmpPayload->status); 3024f5860992SSakthivel K tag = le32_to_cpu(psmpPayload->tag); 3025f5860992SSakthivel K 3026f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 3027f5860992SSakthivel K param = le32_to_cpu(psmpPayload->param); 3028f5860992SSakthivel K t = ccb->task; 3029f5860992SSakthivel K ts = &t->task_status; 3030f5860992SSakthivel K pm8001_dev = ccb->device; 3031f5860992SSakthivel K if (status) 30321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status); 3033f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 3034f5860992SSakthivel K return; 3035f5860992SSakthivel K 30361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, "tag::0x%x status::0x%x\n", tag, status); 30377370672dSpeter chang 3038f5860992SSakthivel K switch (status) { 3039f5860992SSakthivel K 3040f5860992SSakthivel K case IO_SUCCESS: 30411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); 3042f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3043f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 3044f5860992SSakthivel K if (pm8001_dev) 30454a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3046f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 30471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30481b5d2793SJoe Perches "DIRECT RESPONSE Length:%d\n", 30491b5d2793SJoe Perches param); 3050f5860992SSakthivel K pdma_respaddr = (char *)(phys_to_virt(cpu_to_le64 3051f5860992SSakthivel K ((u64)sg_dma_address 3052f5860992SSakthivel K (&t->smp_task.smp_resp)))); 3053f5860992SSakthivel K for (i = 0; i < param; i++) { 3054f5860992SSakthivel K *(pdma_respaddr+i) = psmpPayload->_r_a[i]; 30551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3056f5860992SSakthivel K "SMP Byte%d DMA data 0x%x psmp 0x%x\n", 3057f5860992SSakthivel K i, *(pdma_respaddr + i), 30581b5d2793SJoe Perches psmpPayload->_r_a[i]); 3059f5860992SSakthivel K } 3060f5860992SSakthivel K } 3061f5860992SSakthivel K break; 3062f5860992SSakthivel K case IO_ABORTED: 30631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n"); 3064f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3065f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 3066f5860992SSakthivel K if (pm8001_dev) 30674a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3068f5860992SSakthivel K break; 3069f5860992SSakthivel K case IO_OVERFLOW: 30701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 3071f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3072f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 3073f5860992SSakthivel K ts->residual = 0; 3074f5860992SSakthivel K if (pm8001_dev) 30754a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3076f5860992SSakthivel K break; 3077f5860992SSakthivel K case IO_NO_DEVICE: 30781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 3079f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3080f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 3081f5860992SSakthivel K break; 3082f5860992SSakthivel K case IO_ERROR_HW_TIMEOUT: 30831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n"); 3084f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3085f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 3086f5860992SSakthivel K break; 3087f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 30881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 3089f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3090f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 3091f5860992SSakthivel K break; 3092f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 30931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 3094f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3095f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 3096f5860992SSakthivel K break; 3097f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 30981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30991b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 3100f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3101f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3102f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3103f5860992SSakthivel K break; 3104f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 31051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31061b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 3107f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3108f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3109f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3110f5860992SSakthivel K break; 3111f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 31121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 3113f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3114f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3115f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 3116f5860992SSakthivel K break; 3117f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 3118a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 3119a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 3120a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 3121a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 3122a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 31231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 3124f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3125f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3126f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3127f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 3128f5860992SSakthivel K pm8001_dev, 3129f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 3130f5860992SSakthivel K break; 3131f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 31321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31331b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 3134f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3135f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3136f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 3137f5860992SSakthivel K break; 3138f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 31391b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31401b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 3141f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3142f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3143f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 3144f5860992SSakthivel K break; 3145f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 31461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31471b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 3148f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3149f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3150f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 3151f5860992SSakthivel K break; 3152f5860992SSakthivel K case IO_XFER_ERROR_RX_FRAME: 31531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n"); 3154f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3155f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3156f5860992SSakthivel K break; 3157f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 31581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 3159f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3160f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3161f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3162f5860992SSakthivel K break; 3163f5860992SSakthivel K case IO_ERROR_INTERNAL_SMP_RESOURCE: 31641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n"); 3165f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3166f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 3167f5860992SSakthivel K break; 3168f5860992SSakthivel K case IO_PORT_IN_RESET: 31691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 3170f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3171f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3172f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3173f5860992SSakthivel K break; 3174f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 31751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 3176f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3177f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3178f5860992SSakthivel K break; 3179f5860992SSakthivel K case IO_DS_IN_RECOVERY: 31801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 3181f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3182f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3183f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3184f5860992SSakthivel K break; 3185f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 31861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31871b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 3188f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3189f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3190f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3191f5860992SSakthivel K break; 3192f5860992SSakthivel K default: 31931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); 3194f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3195f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3196f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 3197f5860992SSakthivel K break; 3198f5860992SSakthivel K } 3199f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 3200f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 3201f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 3202f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 3203f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 3204f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 32051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 32061b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%xstat 0x%x but aborted by upper layer!\n", 32071b5d2793SJoe Perches t, status, ts->resp, ts->stat); 3208f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3209f5860992SSakthivel K } else { 3210f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 3211f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3212f5860992SSakthivel K mb();/* in order to force CPU ordering */ 3213f5860992SSakthivel K t->task_done(t); 3214f5860992SSakthivel K } 3215f5860992SSakthivel K } 3216f5860992SSakthivel K 3217f5860992SSakthivel K /** 3218f5860992SSakthivel K * pm80xx_hw_event_ack_req- For PM8001,some events need to acknowage to FW. 3219f5860992SSakthivel K * @pm8001_ha: our hba card information 3220f5860992SSakthivel K * @Qnum: the outbound queue message number. 3221f5860992SSakthivel K * @SEA: source of event to ack 3222f5860992SSakthivel K * @port_id: port id. 3223f5860992SSakthivel K * @phyId: phy id. 3224f5860992SSakthivel K * @param0: parameter 0. 3225f5860992SSakthivel K * @param1: parameter 1. 3226f5860992SSakthivel K */ 3227f5860992SSakthivel K static void pm80xx_hw_event_ack_req(struct pm8001_hba_info *pm8001_ha, 3228f5860992SSakthivel K u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, u32 param1) 3229f5860992SSakthivel K { 3230f5860992SSakthivel K struct hw_event_ack_req payload; 3231f5860992SSakthivel K u32 opc = OPC_INB_SAS_HW_EVENT_ACK; 3232f5860992SSakthivel K 3233f5860992SSakthivel K struct inbound_queue_table *circularQ; 3234f5860992SSakthivel K 3235f5860992SSakthivel K memset((u8 *)&payload, 0, sizeof(payload)); 3236f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[Qnum]; 3237f5860992SSakthivel K payload.tag = cpu_to_le32(1); 3238f5860992SSakthivel K payload.phyid_sea_portid = cpu_to_le32(((SEA & 0xFFFF) << 8) | 3239f5860992SSakthivel K ((phyId & 0xFF) << 24) | (port_id & 0xFF)); 3240f5860992SSakthivel K payload.param0 = cpu_to_le32(param0); 3241f5860992SSakthivel K payload.param1 = cpu_to_le32(param1); 324291a43fa6Speter chang pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 324391a43fa6Speter chang sizeof(payload), 0); 3244f5860992SSakthivel K } 3245f5860992SSakthivel K 3246f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 3247f5860992SSakthivel K u32 phyId, u32 phy_op); 3248f5860992SSakthivel K 32498414cd80SViswas G static void hw_event_port_recover(struct pm8001_hba_info *pm8001_ha, 32508414cd80SViswas G void *piomb) 32518414cd80SViswas G { 32528414cd80SViswas G struct hw_event_resp *pPayload = (struct hw_event_resp *)(piomb + 4); 32538414cd80SViswas G u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 32548414cd80SViswas G u8 phy_id = (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 32558414cd80SViswas G u32 lr_status_evt_portid = 32568414cd80SViswas G le32_to_cpu(pPayload->lr_status_evt_portid); 32578414cd80SViswas G u8 deviceType = pPayload->sas_identify.dev_type; 32588414cd80SViswas G u8 link_rate = (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 32598414cd80SViswas G struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 32608414cd80SViswas G u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 32618414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 32628414cd80SViswas G 32638414cd80SViswas G if (deviceType == SAS_END_DEVICE) { 32648414cd80SViswas G pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 32658414cd80SViswas G PHY_NOTIFY_ENABLE_SPINUP); 32668414cd80SViswas G } 32678414cd80SViswas G 32688414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 32698414cd80SViswas G pm8001_get_lrate_mode(phy, link_rate); 32708414cd80SViswas G phy->sas_phy.oob_mode = SAS_OOB_MODE; 32718414cd80SViswas G phy->phy_state = PHY_STATE_LINK_UP_SPCV; 32728414cd80SViswas G phy->phy_attached = 1; 32738414cd80SViswas G } 32748414cd80SViswas G 3275f5860992SSakthivel K /** 3276f5860992SSakthivel K * hw_event_sas_phy_up -FW tells me a SAS phy up event. 3277f5860992SSakthivel K * @pm8001_ha: our hba card information 3278f5860992SSakthivel K * @piomb: IO message buffer 3279f5860992SSakthivel K */ 3280f5860992SSakthivel K static void 3281f5860992SSakthivel K hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3282f5860992SSakthivel K { 3283f5860992SSakthivel K struct hw_event_resp *pPayload = 3284f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3285f5860992SSakthivel K u32 lr_status_evt_portid = 3286f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3287f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3288f5860992SSakthivel K 3289f5860992SSakthivel K u8 link_rate = 3290f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3291f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3292f5860992SSakthivel K u8 phy_id = 3293f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3294f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3295f5860992SSakthivel K 3296f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3297f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3298f5860992SSakthivel K unsigned long flags; 3299f5860992SSakthivel K u8 deviceType = pPayload->sas_identify.dev_type; 3300f5860992SSakthivel K port->port_state = portstate; 33018414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 33027d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 33031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 33041b5d2793SJoe Perches "portid:%d; phyid:%d; linkrate:%d; portstate:%x; devicetype:%x\n", 33051b5d2793SJoe Perches port_id, phy_id, link_rate, portstate, deviceType); 3306f5860992SSakthivel K 3307f5860992SSakthivel K switch (deviceType) { 3308f5860992SSakthivel K case SAS_PHY_UNUSED: 33091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "device type no device.\n"); 3310f5860992SSakthivel K break; 3311f5860992SSakthivel K case SAS_END_DEVICE: 33121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "end device.\n"); 3313f5860992SSakthivel K pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 3314f5860992SSakthivel K PHY_NOTIFY_ENABLE_SPINUP); 3315f5860992SSakthivel K port->port_attached = 1; 3316f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3317f5860992SSakthivel K break; 3318f5860992SSakthivel K case SAS_EDGE_EXPANDER_DEVICE: 33191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "expander device.\n"); 3320f5860992SSakthivel K port->port_attached = 1; 3321f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3322f5860992SSakthivel K break; 3323f5860992SSakthivel K case SAS_FANOUT_EXPANDER_DEVICE: 33241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n"); 3325f5860992SSakthivel K port->port_attached = 1; 3326f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3327f5860992SSakthivel K break; 3328f5860992SSakthivel K default: 33291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n", 33301b5d2793SJoe Perches deviceType); 3331f5860992SSakthivel K break; 3332f5860992SSakthivel K } 3333f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SAS; 3334f5860992SSakthivel K phy->identify.device_type = deviceType; 3335f5860992SSakthivel K phy->phy_attached = 1; 3336f5860992SSakthivel K if (phy->identify.device_type == SAS_END_DEVICE) 3337f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SSP; 3338f5860992SSakthivel K else if (phy->identify.device_type != SAS_PHY_UNUSED) 3339f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; 3340f5860992SSakthivel K phy->sas_phy.oob_mode = SAS_OOB_MODE; 3341*de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE, GFP_ATOMIC); 3342f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3343f5860992SSakthivel K memcpy(phy->frame_rcvd, &pPayload->sas_identify, 3344f5860992SSakthivel K sizeof(struct sas_identify_frame)-4); 3345f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct sas_identify_frame) - 4; 3346f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3347f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3348f5860992SSakthivel K if (pm8001_ha->flags == PM8001F_RUN_TIME) 33494ba9e516SAhmed S. Darwish mdelay(200); /* delay a moment to wait for disk to spin up */ 3350f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3351f5860992SSakthivel K } 3352f5860992SSakthivel K 3353f5860992SSakthivel K /** 3354f5860992SSakthivel K * hw_event_sata_phy_up -FW tells me a SATA phy up event. 3355f5860992SSakthivel K * @pm8001_ha: our hba card information 3356f5860992SSakthivel K * @piomb: IO message buffer 3357f5860992SSakthivel K */ 3358f5860992SSakthivel K static void 3359f5860992SSakthivel K hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3360f5860992SSakthivel K { 3361f5860992SSakthivel K struct hw_event_resp *pPayload = 3362f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3363f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3364f5860992SSakthivel K u32 lr_status_evt_portid = 3365f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3366f5860992SSakthivel K u8 link_rate = 3367f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3368f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3369f5860992SSakthivel K u8 phy_id = 3370f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3371f5860992SSakthivel K 3372f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3373f5860992SSakthivel K 3374f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3375f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3376f5860992SSakthivel K unsigned long flags; 33771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 3378f5860992SSakthivel K "port id %d, phy id %d link_rate %d portstate 0x%x\n", 33791b5d2793SJoe Perches port_id, phy_id, link_rate, portstate); 3380f5860992SSakthivel K 3381f5860992SSakthivel K port->port_state = portstate; 33827d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 3383f5860992SSakthivel K port->port_attached = 1; 3384f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3385f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SATA; 3386f5860992SSakthivel K phy->phy_attached = 1; 3387f5860992SSakthivel K phy->sas_phy.oob_mode = SATA_OOB_MODE; 3388*de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE, GFP_ATOMIC); 3389f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3390f5860992SSakthivel K memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), 3391f5860992SSakthivel K sizeof(struct dev_to_host_fis)); 3392f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct dev_to_host_fis); 3393f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SATA; 3394aa9f8328SJames Bottomley phy->identify.device_type = SAS_SATA_DEV; 3395f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3396f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3397f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3398f5860992SSakthivel K } 3399f5860992SSakthivel K 3400f5860992SSakthivel K /** 3401f5860992SSakthivel K * hw_event_phy_down -we should notify the libsas the phy is down. 3402f5860992SSakthivel K * @pm8001_ha: our hba card information 3403f5860992SSakthivel K * @piomb: IO message buffer 3404f5860992SSakthivel K */ 3405f5860992SSakthivel K static void 3406f5860992SSakthivel K hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) 3407f5860992SSakthivel K { 3408f5860992SSakthivel K struct hw_event_resp *pPayload = 3409f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3410f5860992SSakthivel K 3411f5860992SSakthivel K u32 lr_status_evt_portid = 3412f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3413f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3414f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3415f5860992SSakthivel K u8 phy_id = 3416f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3417f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3418f5860992SSakthivel K 3419f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3420f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3421869ddbdcSViswas G u32 port_sata = (phy->phy_type & PORT_TYPE_SATA); 3422f5860992SSakthivel K port->port_state = portstate; 3423f5860992SSakthivel K phy->identify.device_type = 0; 3424f5860992SSakthivel K phy->phy_attached = 0; 3425f5860992SSakthivel K switch (portstate) { 3426f5860992SSakthivel K case PORT_VALID: 3427f5860992SSakthivel K break; 3428f5860992SSakthivel K case PORT_INVALID: 34291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n", 34301b5d2793SJoe Perches port_id); 34311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34321b5d2793SJoe Perches " Last phy Down and port invalid\n"); 3433869ddbdcSViswas G if (port_sata) { 34348414cd80SViswas G phy->phy_type = 0; 3435f5860992SSakthivel K port->port_attached = 0; 3436f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3437f5860992SSakthivel K port_id, phy_id, 0, 0); 34388414cd80SViswas G } 34398414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3440f5860992SSakthivel K break; 3441f5860992SSakthivel K case PORT_IN_RESET: 34421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n", 34431b5d2793SJoe Perches port_id); 3444f5860992SSakthivel K break; 3445f5860992SSakthivel K case PORT_NOT_ESTABLISHED: 34461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34471b5d2793SJoe Perches " Phy Down and PORT_NOT_ESTABLISHED\n"); 3448f5860992SSakthivel K port->port_attached = 0; 3449f5860992SSakthivel K break; 3450f5860992SSakthivel K case PORT_LOSTCOMM: 34511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " Phy Down and PORT_LOSTCOMM\n"); 34521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34531b5d2793SJoe Perches " Last phy Down and port invalid\n"); 3454869ddbdcSViswas G if (port_sata) { 3455f5860992SSakthivel K port->port_attached = 0; 34568414cd80SViswas G phy->phy_type = 0; 3457f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3458f5860992SSakthivel K port_id, phy_id, 0, 0); 34598414cd80SViswas G } 34608414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3461f5860992SSakthivel K break; 3462f5860992SSakthivel K default: 3463f5860992SSakthivel K port->port_attached = 0; 34641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 34651b5d2793SJoe Perches " Phy Down and(default) = 0x%x\n", 34661b5d2793SJoe Perches portstate); 3467f5860992SSakthivel K break; 3468f5860992SSakthivel K 3469f5860992SSakthivel K } 3470121181f3SJohn Garry if (port_sata && (portstate != PORT_IN_RESET)) 3471*de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL, 3472cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3473f5860992SSakthivel K } 3474f5860992SSakthivel K 3475f5860992SSakthivel K static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3476f5860992SSakthivel K { 3477f5860992SSakthivel K struct phy_start_resp *pPayload = 3478f5860992SSakthivel K (struct phy_start_resp *)(piomb + 4); 3479f5860992SSakthivel K u32 status = 3480f5860992SSakthivel K le32_to_cpu(pPayload->status); 3481f5860992SSakthivel K u32 phy_id = 3482f5860992SSakthivel K le32_to_cpu(pPayload->phyid); 3483f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3484f5860992SSakthivel K 34851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 34861b5d2793SJoe Perches "phy start resp status:0x%x, phyid:0x%x\n", 34871b5d2793SJoe Perches status, phy_id); 3488f5860992SSakthivel K if (status == 0) { 3489cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DOWN; 3490cd135754SDeepak Ukey if (pm8001_ha->flags == PM8001F_RUN_TIME && 3491e703977bSpeter chang phy->enable_completion != NULL) { 3492f5860992SSakthivel K complete(phy->enable_completion); 3493e703977bSpeter chang phy->enable_completion = NULL; 3494e703977bSpeter chang } 3495f5860992SSakthivel K } 3496f5860992SSakthivel K return 0; 3497f5860992SSakthivel K 3498f5860992SSakthivel K } 3499f5860992SSakthivel K 3500f5860992SSakthivel K /** 3501f5860992SSakthivel K * mpi_thermal_hw_event -The hw event has come. 3502f5860992SSakthivel K * @pm8001_ha: our hba card information 3503f5860992SSakthivel K * @piomb: IO message buffer 3504f5860992SSakthivel K */ 3505f5860992SSakthivel K static int mpi_thermal_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3506f5860992SSakthivel K { 3507f5860992SSakthivel K struct thermal_hw_event *pPayload = 3508f5860992SSakthivel K (struct thermal_hw_event *)(piomb + 4); 3509f5860992SSakthivel K 3510f5860992SSakthivel K u32 thermal_event = le32_to_cpu(pPayload->thermal_event); 3511f5860992SSakthivel K u32 rht_lht = le32_to_cpu(pPayload->rht_lht); 3512f5860992SSakthivel K 3513f5860992SSakthivel K if (thermal_event & 0x40) { 35141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 35151b5d2793SJoe Perches "Thermal Event: Local high temperature violated!\n"); 35161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3517f5860992SSakthivel K "Thermal Event: Measured local high temperature %d\n", 35181b5d2793SJoe Perches ((rht_lht & 0xFF00) >> 8)); 3519f5860992SSakthivel K } 3520f5860992SSakthivel K if (thermal_event & 0x10) { 35211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 35221b5d2793SJoe Perches "Thermal Event: Remote high temperature violated!\n"); 35231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3524f5860992SSakthivel K "Thermal Event: Measured remote high temperature %d\n", 35251b5d2793SJoe Perches ((rht_lht & 0xFF000000) >> 24)); 3526f5860992SSakthivel K } 3527f5860992SSakthivel K return 0; 3528f5860992SSakthivel K } 3529f5860992SSakthivel K 3530f5860992SSakthivel K /** 3531f5860992SSakthivel K * mpi_hw_event -The hw event has come. 3532f5860992SSakthivel K * @pm8001_ha: our hba card information 3533f5860992SSakthivel K * @piomb: IO message buffer 3534f5860992SSakthivel K */ 3535f5860992SSakthivel K static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3536f5860992SSakthivel K { 35378414cd80SViswas G unsigned long flags, i; 3538f5860992SSakthivel K struct hw_event_resp *pPayload = 3539f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3540f5860992SSakthivel K u32 lr_status_evt_portid = 3541f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3542f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3543f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3544f5860992SSakthivel K u8 phy_id = 3545f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3546f5860992SSakthivel K u16 eventType = 3547f5860992SSakthivel K (u16)((lr_status_evt_portid & 0x00FFFF00) >> 8); 3548f5860992SSakthivel K u8 status = 3549f5860992SSakthivel K (u8)((lr_status_evt_portid & 0x0F000000) >> 24); 3550f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3551f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 35528414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 3553f5860992SSakthivel K struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; 35541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 35551b5d2793SJoe Perches "portid:%d phyid:%d event:0x%x status:0x%x\n", 35561b5d2793SJoe Perches port_id, phy_id, eventType, status); 3557f5860992SSakthivel K 3558f5860992SSakthivel K switch (eventType) { 3559f5860992SSakthivel K 3560f5860992SSakthivel K case HW_EVENT_SAS_PHY_UP: 35611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n"); 3562f5860992SSakthivel K hw_event_sas_phy_up(pm8001_ha, piomb); 3563f5860992SSakthivel K break; 3564f5860992SSakthivel K case HW_EVENT_SATA_PHY_UP: 35651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n"); 3566f5860992SSakthivel K hw_event_sata_phy_up(pm8001_ha, piomb); 3567f5860992SSakthivel K break; 3568f5860992SSakthivel K case HW_EVENT_SATA_SPINUP_HOLD: 35691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n"); 3570*de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD, 3571cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3572f5860992SSakthivel K break; 3573f5860992SSakthivel K case HW_EVENT_PHY_DOWN: 35741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n"); 3575869ddbdcSViswas G hw_event_phy_down(pm8001_ha, piomb); 3576869ddbdcSViswas G if (pm8001_ha->reset_in_progress) { 35771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "Reset in progress\n"); 3578869ddbdcSViswas G return 0; 3579869ddbdcSViswas G } 3580f5860992SSakthivel K phy->phy_attached = 0; 3581cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3582f5860992SSakthivel K break; 3583f5860992SSakthivel K case HW_EVENT_PORT_INVALID: 35841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n"); 3585f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3586f5860992SSakthivel K phy->phy_attached = 0; 3587*de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3588cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3589f5860992SSakthivel K break; 3590f5860992SSakthivel K /* the broadcast change primitive received, tell the LIBSAS this event 3591f5860992SSakthivel K to revalidate the sas domain*/ 3592f5860992SSakthivel K case HW_EVENT_BROADCAST_CHANGE: 35931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n"); 3594f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE, 3595f5860992SSakthivel K port_id, phy_id, 1, 0); 3596f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3597f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; 3598f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3599*de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, 3600cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3601f5860992SSakthivel K break; 3602f5860992SSakthivel K case HW_EVENT_PHY_ERROR: 36031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n"); 3604f5860992SSakthivel K sas_phy_disconnected(&phy->sas_phy); 3605f5860992SSakthivel K phy->phy_attached = 0; 3606*de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR, GFP_ATOMIC); 3607f5860992SSakthivel K break; 3608f5860992SSakthivel K case HW_EVENT_BROADCAST_EXP: 36091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n"); 3610f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3611f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; 3612f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3613*de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, 3614cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3615f5860992SSakthivel K break; 3616f5860992SSakthivel K case HW_EVENT_LINK_ERR_INVALID_DWORD: 36171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36181b5d2793SJoe Perches "HW_EVENT_LINK_ERR_INVALID_DWORD\n"); 3619f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3620f5860992SSakthivel K HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0); 3621f5860992SSakthivel K break; 3622f5860992SSakthivel K case HW_EVENT_LINK_ERR_DISPARITY_ERROR: 36231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36241b5d2793SJoe Perches "HW_EVENT_LINK_ERR_DISPARITY_ERROR\n"); 3625f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3626f5860992SSakthivel K HW_EVENT_LINK_ERR_DISPARITY_ERROR, 3627f5860992SSakthivel K port_id, phy_id, 0, 0); 3628f5860992SSakthivel K break; 3629f5860992SSakthivel K case HW_EVENT_LINK_ERR_CODE_VIOLATION: 36301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36311b5d2793SJoe Perches "HW_EVENT_LINK_ERR_CODE_VIOLATION\n"); 3632f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3633f5860992SSakthivel K HW_EVENT_LINK_ERR_CODE_VIOLATION, 3634f5860992SSakthivel K port_id, phy_id, 0, 0); 3635f5860992SSakthivel K break; 3636f5860992SSakthivel K case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH: 36371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36381b5d2793SJoe Perches "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n"); 3639f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3640f5860992SSakthivel K HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH, 3641f5860992SSakthivel K port_id, phy_id, 0, 0); 3642f5860992SSakthivel K break; 3643f5860992SSakthivel K case HW_EVENT_MALFUNCTION: 36441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n"); 3645f5860992SSakthivel K break; 3646f5860992SSakthivel K case HW_EVENT_BROADCAST_SES: 36471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n"); 3648f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3649f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; 3650f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3651*de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, 3652cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3653f5860992SSakthivel K break; 3654f5860992SSakthivel K case HW_EVENT_INBOUND_CRC_ERROR: 36551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n"); 3656f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3657f5860992SSakthivel K HW_EVENT_INBOUND_CRC_ERROR, 3658f5860992SSakthivel K port_id, phy_id, 0, 0); 3659f5860992SSakthivel K break; 3660f5860992SSakthivel K case HW_EVENT_HARD_RESET_RECEIVED: 36611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n"); 3662*de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_HARD_RESET, GFP_ATOMIC); 3663f5860992SSakthivel K break; 3664f5860992SSakthivel K case HW_EVENT_ID_FRAME_TIMEOUT: 36651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n"); 3666f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3667f5860992SSakthivel K phy->phy_attached = 0; 3668*de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3669cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3670f5860992SSakthivel K break; 3671f5860992SSakthivel K case HW_EVENT_LINK_ERR_PHY_RESET_FAILED: 36721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36731b5d2793SJoe Perches "HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n"); 3674f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3675f5860992SSakthivel K HW_EVENT_LINK_ERR_PHY_RESET_FAILED, 3676f5860992SSakthivel K port_id, phy_id, 0, 0); 3677f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3678f5860992SSakthivel K phy->phy_attached = 0; 3679*de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3680cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3681f5860992SSakthivel K break; 3682f5860992SSakthivel K case HW_EVENT_PORT_RESET_TIMER_TMO: 36831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n"); 3684869ddbdcSViswas G pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3685869ddbdcSViswas G port_id, phy_id, 0, 0); 3686f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3687f5860992SSakthivel K phy->phy_attached = 0; 3688*de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3689cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3690869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3691869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3692869ddbdcSViswas G PORT_RESET_TMO; 3693869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3694869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3695869ddbdcSViswas G } 3696f5860992SSakthivel K break; 3697f5860992SSakthivel K case HW_EVENT_PORT_RECOVERY_TIMER_TMO: 36981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36991b5d2793SJoe Perches "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"); 3700a6cb3d01SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3701a6cb3d01SSakthivel K HW_EVENT_PORT_RECOVERY_TIMER_TMO, 3702a6cb3d01SSakthivel K port_id, phy_id, 0, 0); 37038414cd80SViswas G for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 37048414cd80SViswas G if (port->wide_port_phymap & (1 << i)) { 37058414cd80SViswas G phy = &pm8001_ha->phy[i]; 3706*de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, 3707cd4e8176SAhmed S. Darwish PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC); 37088414cd80SViswas G port->wide_port_phymap &= ~(1 << i); 37098414cd80SViswas G } 37108414cd80SViswas G } 3711f5860992SSakthivel K break; 3712f5860992SSakthivel K case HW_EVENT_PORT_RECOVER: 37131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n"); 37148414cd80SViswas G hw_event_port_recover(pm8001_ha, piomb); 3715f5860992SSakthivel K break; 3716f5860992SSakthivel K case HW_EVENT_PORT_RESET_COMPLETE: 37171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n"); 3718869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3719869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3720869ddbdcSViswas G PORT_RESET_SUCCESS; 3721869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3722869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3723869ddbdcSViswas G } 3724f5860992SSakthivel K break; 3725f5860992SSakthivel K case EVENT_BROADCAST_ASYNCH_EVENT: 37261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n"); 3727f5860992SSakthivel K break; 3728f5860992SSakthivel K default: 37291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type 0x%x\n", 37301b5d2793SJoe Perches eventType); 3731f5860992SSakthivel K break; 3732f5860992SSakthivel K } 3733f5860992SSakthivel K return 0; 3734f5860992SSakthivel K } 3735f5860992SSakthivel K 3736f5860992SSakthivel K /** 3737f5860992SSakthivel K * mpi_phy_stop_resp - SPCv specific 3738f5860992SSakthivel K * @pm8001_ha: our hba card information 3739f5860992SSakthivel K * @piomb: IO message buffer 3740f5860992SSakthivel K */ 3741f5860992SSakthivel K static int mpi_phy_stop_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3742f5860992SSakthivel K { 3743f5860992SSakthivel K struct phy_stop_resp *pPayload = 3744f5860992SSakthivel K (struct phy_stop_resp *)(piomb + 4); 3745f5860992SSakthivel K u32 status = 3746f5860992SSakthivel K le32_to_cpu(pPayload->status); 3747f5860992SSakthivel K u32 phyid = 3748cd135754SDeepak Ukey le32_to_cpu(pPayload->phyid) & 0xFF; 3749f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phyid]; 37501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "phy:0x%x status:0x%x\n", 37511b5d2793SJoe Perches phyid, status); 3752cd135754SDeepak Ukey if (status == PHY_STOP_SUCCESS || 3753cd135754SDeepak Ukey status == PHY_STOP_ERR_DEVICE_ATTACHED) 3754cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3755f5860992SSakthivel K return 0; 3756f5860992SSakthivel K } 3757f5860992SSakthivel K 3758f5860992SSakthivel K /** 3759f5860992SSakthivel K * mpi_set_controller_config_resp - SPCv specific 3760f5860992SSakthivel K * @pm8001_ha: our hba card information 3761f5860992SSakthivel K * @piomb: IO message buffer 3762f5860992SSakthivel K */ 3763f5860992SSakthivel K static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3764f5860992SSakthivel K void *piomb) 3765f5860992SSakthivel K { 3766f5860992SSakthivel K struct set_ctrl_cfg_resp *pPayload = 3767f5860992SSakthivel K (struct set_ctrl_cfg_resp *)(piomb + 4); 3768f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3769f5860992SSakthivel K u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd); 3770f5860992SSakthivel K 37711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 3772f5860992SSakthivel K "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n", 37731b5d2793SJoe Perches status, err_qlfr_pgcd); 3774f5860992SSakthivel K 3775f5860992SSakthivel K return 0; 3776f5860992SSakthivel K } 3777f5860992SSakthivel K 3778f5860992SSakthivel K /** 3779f5860992SSakthivel K * mpi_get_controller_config_resp - SPCv specific 3780f5860992SSakthivel K * @pm8001_ha: our hba card information 3781f5860992SSakthivel K * @piomb: IO message buffer 3782f5860992SSakthivel K */ 3783f5860992SSakthivel K static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3784f5860992SSakthivel K void *piomb) 3785f5860992SSakthivel K { 37861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3787f5860992SSakthivel K 3788f5860992SSakthivel K return 0; 3789f5860992SSakthivel K } 3790f5860992SSakthivel K 3791f5860992SSakthivel K /** 3792f5860992SSakthivel K * mpi_get_phy_profile_resp - SPCv specific 3793f5860992SSakthivel K * @pm8001_ha: our hba card information 3794f5860992SSakthivel K * @piomb: IO message buffer 3795f5860992SSakthivel K */ 3796f5860992SSakthivel K static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3797f5860992SSakthivel K void *piomb) 3798f5860992SSakthivel K { 37991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3800f5860992SSakthivel K 3801f5860992SSakthivel K return 0; 3802f5860992SSakthivel K } 3803f5860992SSakthivel K 3804f5860992SSakthivel K /** 3805f5860992SSakthivel K * mpi_flash_op_ext_resp - SPCv specific 3806f5860992SSakthivel K * @pm8001_ha: our hba card information 3807f5860992SSakthivel K * @piomb: IO message buffer 3808f5860992SSakthivel K */ 3809f5860992SSakthivel K static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3810f5860992SSakthivel K { 38111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3812f5860992SSakthivel K 3813f5860992SSakthivel K return 0; 3814f5860992SSakthivel K } 3815f5860992SSakthivel K 3816f5860992SSakthivel K /** 3817f5860992SSakthivel K * mpi_set_phy_profile_resp - SPCv specific 3818f5860992SSakthivel K * @pm8001_ha: our hba card information 3819f5860992SSakthivel K * @piomb: IO message buffer 3820f5860992SSakthivel K */ 3821f5860992SSakthivel K static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3822f5860992SSakthivel K void *piomb) 3823f5860992SSakthivel K { 38249d9c7c20Syuuzheng u32 tag; 382527909407SAnand Kumar Santhanam u8 page_code; 38269d9c7c20Syuuzheng int rc = 0; 382727909407SAnand Kumar Santhanam struct set_phy_profile_resp *pPayload = 382827909407SAnand Kumar Santhanam (struct set_phy_profile_resp *)(piomb + 4); 382927909407SAnand Kumar Santhanam u32 ppc_phyid = le32_to_cpu(pPayload->ppc_phyid); 383027909407SAnand Kumar Santhanam u32 status = le32_to_cpu(pPayload->status); 3831f5860992SSakthivel K 38329d9c7c20Syuuzheng tag = le32_to_cpu(pPayload->tag); 383327909407SAnand Kumar Santhanam page_code = (u8)((ppc_phyid & 0xFF00) >> 8); 383427909407SAnand Kumar Santhanam if (status) { 383527909407SAnand Kumar Santhanam /* status is FAILED */ 38361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 38371b5d2793SJoe Perches "PhyProfile command failed with status 0x%08X\n", 38381b5d2793SJoe Perches status); 38399d9c7c20Syuuzheng rc = -1; 384027909407SAnand Kumar Santhanam } else { 384127909407SAnand Kumar Santhanam if (page_code != SAS_PHY_ANALOG_SETTINGS_PAGE) { 38421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Invalid page code 0x%X\n", 38431b5d2793SJoe Perches page_code); 38449d9c7c20Syuuzheng rc = -1; 384527909407SAnand Kumar Santhanam } 384627909407SAnand Kumar Santhanam } 38479d9c7c20Syuuzheng pm8001_tag_free(pm8001_ha, tag); 38489d9c7c20Syuuzheng return rc; 3849f5860992SSakthivel K } 3850f5860992SSakthivel K 3851f5860992SSakthivel K /** 3852f5860992SSakthivel K * mpi_kek_management_resp - SPCv specific 3853f5860992SSakthivel K * @pm8001_ha: our hba card information 3854f5860992SSakthivel K * @piomb: IO message buffer 3855f5860992SSakthivel K */ 3856f5860992SSakthivel K static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha, 3857f5860992SSakthivel K void *piomb) 3858f5860992SSakthivel K { 3859f5860992SSakthivel K struct kek_mgmt_resp *pPayload = (struct kek_mgmt_resp *)(piomb + 4); 3860f5860992SSakthivel K 3861f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3862f5860992SSakthivel K u32 kidx_new_curr_ksop = le32_to_cpu(pPayload->kidx_new_curr_ksop); 3863f5860992SSakthivel K u32 err_qlfr = le32_to_cpu(pPayload->err_qlfr); 3864f5860992SSakthivel K 38651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 3866f5860992SSakthivel K "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n", 38671b5d2793SJoe Perches status, kidx_new_curr_ksop, err_qlfr); 3868f5860992SSakthivel K 3869f5860992SSakthivel K return 0; 3870f5860992SSakthivel K } 3871f5860992SSakthivel K 3872f5860992SSakthivel K /** 3873f5860992SSakthivel K * mpi_dek_management_resp - SPCv specific 3874f5860992SSakthivel K * @pm8001_ha: our hba card information 3875f5860992SSakthivel K * @piomb: IO message buffer 3876f5860992SSakthivel K */ 3877f5860992SSakthivel K static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha, 3878f5860992SSakthivel K void *piomb) 3879f5860992SSakthivel K { 38801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3881f5860992SSakthivel K 3882f5860992SSakthivel K return 0; 3883f5860992SSakthivel K } 3884f5860992SSakthivel K 3885f5860992SSakthivel K /** 3886f5860992SSakthivel K * ssp_coalesced_comp_resp - SPCv specific 3887f5860992SSakthivel K * @pm8001_ha: our hba card information 3888f5860992SSakthivel K * @piomb: IO message buffer 3889f5860992SSakthivel K */ 3890f5860992SSakthivel K static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha, 3891f5860992SSakthivel K void *piomb) 3892f5860992SSakthivel K { 38931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3894f5860992SSakthivel K 3895f5860992SSakthivel K return 0; 3896f5860992SSakthivel K } 3897f5860992SSakthivel K 3898f5860992SSakthivel K /** 3899f5860992SSakthivel K * process_one_iomb - process one outbound Queue memory block 3900f5860992SSakthivel K * @pm8001_ha: our hba card information 3901f5860992SSakthivel K * @piomb: IO message buffer 3902f5860992SSakthivel K */ 3903f5860992SSakthivel K static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, void *piomb) 3904f5860992SSakthivel K { 3905f5860992SSakthivel K __le32 pHeader = *(__le32 *)piomb; 3906f5860992SSakthivel K u32 opc = (u32)((le32_to_cpu(pHeader)) & 0xFFF); 3907f5860992SSakthivel K 3908f5860992SSakthivel K switch (opc) { 3909f5860992SSakthivel K case OPC_OUB_ECHO: 39101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n"); 3911f5860992SSakthivel K break; 3912f5860992SSakthivel K case OPC_OUB_HW_EVENT: 39131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n"); 3914f5860992SSakthivel K mpi_hw_event(pm8001_ha, piomb); 3915f5860992SSakthivel K break; 3916f5860992SSakthivel K case OPC_OUB_THERM_HW_EVENT: 39171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_THERMAL_EVENT\n"); 3918f5860992SSakthivel K mpi_thermal_hw_event(pm8001_ha, piomb); 3919f5860992SSakthivel K break; 3920f5860992SSakthivel K case OPC_OUB_SSP_COMP: 39211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n"); 3922f5860992SSakthivel K mpi_ssp_completion(pm8001_ha, piomb); 3923f5860992SSakthivel K break; 3924f5860992SSakthivel K case OPC_OUB_SMP_COMP: 39251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n"); 3926f5860992SSakthivel K mpi_smp_completion(pm8001_ha, piomb); 3927f5860992SSakthivel K break; 3928f5860992SSakthivel K case OPC_OUB_LOCAL_PHY_CNTRL: 39291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n"); 3930f5860992SSakthivel K pm8001_mpi_local_phy_ctl(pm8001_ha, piomb); 3931f5860992SSakthivel K break; 3932f5860992SSakthivel K case OPC_OUB_DEV_REGIST: 39331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n"); 3934f5860992SSakthivel K pm8001_mpi_reg_resp(pm8001_ha, piomb); 3935f5860992SSakthivel K break; 3936f5860992SSakthivel K case OPC_OUB_DEREG_DEV: 39371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "unregister the device\n"); 3938f5860992SSakthivel K pm8001_mpi_dereg_resp(pm8001_ha, piomb); 3939f5860992SSakthivel K break; 3940f5860992SSakthivel K case OPC_OUB_GET_DEV_HANDLE: 39411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n"); 3942f5860992SSakthivel K break; 3943f5860992SSakthivel K case OPC_OUB_SATA_COMP: 39441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n"); 3945f5860992SSakthivel K mpi_sata_completion(pm8001_ha, piomb); 3946f5860992SSakthivel K break; 3947f5860992SSakthivel K case OPC_OUB_SATA_EVENT: 39481b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n"); 3949f5860992SSakthivel K mpi_sata_event(pm8001_ha, piomb); 3950f5860992SSakthivel K break; 3951f5860992SSakthivel K case OPC_OUB_SSP_EVENT: 39521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n"); 3953f5860992SSakthivel K mpi_ssp_event(pm8001_ha, piomb); 3954f5860992SSakthivel K break; 3955f5860992SSakthivel K case OPC_OUB_DEV_HANDLE_ARRIV: 39561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n"); 3957f5860992SSakthivel K /*This is for target*/ 3958f5860992SSakthivel K break; 3959f5860992SSakthivel K case OPC_OUB_SSP_RECV_EVENT: 39601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n"); 3961f5860992SSakthivel K /*This is for target*/ 3962f5860992SSakthivel K break; 3963f5860992SSakthivel K case OPC_OUB_FW_FLASH_UPDATE: 39641b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n"); 3965f5860992SSakthivel K pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb); 3966f5860992SSakthivel K break; 3967f5860992SSakthivel K case OPC_OUB_GPIO_RESPONSE: 39681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n"); 3969f5860992SSakthivel K break; 3970f5860992SSakthivel K case OPC_OUB_GPIO_EVENT: 39711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n"); 3972f5860992SSakthivel K break; 3973f5860992SSakthivel K case OPC_OUB_GENERAL_EVENT: 39741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n"); 3975f5860992SSakthivel K pm8001_mpi_general_event(pm8001_ha, piomb); 3976f5860992SSakthivel K break; 3977f5860992SSakthivel K case OPC_OUB_SSP_ABORT_RSP: 39781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n"); 3979f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3980f5860992SSakthivel K break; 3981f5860992SSakthivel K case OPC_OUB_SATA_ABORT_RSP: 39821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n"); 3983f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3984f5860992SSakthivel K break; 3985f5860992SSakthivel K case OPC_OUB_SAS_DIAG_MODE_START_END: 39861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 39871b5d2793SJoe Perches "OPC_OUB_SAS_DIAG_MODE_START_END\n"); 3988f5860992SSakthivel K break; 3989f5860992SSakthivel K case OPC_OUB_SAS_DIAG_EXECUTE: 39901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n"); 3991f5860992SSakthivel K break; 3992f5860992SSakthivel K case OPC_OUB_GET_TIME_STAMP: 39931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n"); 3994f5860992SSakthivel K break; 3995f5860992SSakthivel K case OPC_OUB_SAS_HW_EVENT_ACK: 39961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n"); 3997f5860992SSakthivel K break; 3998f5860992SSakthivel K case OPC_OUB_PORT_CONTROL: 39991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n"); 4000f5860992SSakthivel K break; 4001f5860992SSakthivel K case OPC_OUB_SMP_ABORT_RSP: 40021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n"); 4003f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 4004f5860992SSakthivel K break; 4005f5860992SSakthivel K case OPC_OUB_GET_NVMD_DATA: 40061b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n"); 4007f5860992SSakthivel K pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb); 4008f5860992SSakthivel K break; 4009f5860992SSakthivel K case OPC_OUB_SET_NVMD_DATA: 40101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n"); 4011f5860992SSakthivel K pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb); 4012f5860992SSakthivel K break; 4013f5860992SSakthivel K case OPC_OUB_DEVICE_HANDLE_REMOVAL: 40141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n"); 4015f5860992SSakthivel K break; 4016f5860992SSakthivel K case OPC_OUB_SET_DEVICE_STATE: 40171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n"); 4018f5860992SSakthivel K pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb); 4019f5860992SSakthivel K break; 4020f5860992SSakthivel K case OPC_OUB_GET_DEVICE_STATE: 40211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n"); 4022f5860992SSakthivel K break; 4023f5860992SSakthivel K case OPC_OUB_SET_DEV_INFO: 40241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n"); 4025f5860992SSakthivel K break; 4026f5860992SSakthivel K /* spcv specifc commands */ 4027f5860992SSakthivel K case OPC_OUB_PHY_START_RESP: 40281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40291b5d2793SJoe Perches "OPC_OUB_PHY_START_RESP opcode:%x\n", opc); 4030f5860992SSakthivel K mpi_phy_start_resp(pm8001_ha, piomb); 4031f5860992SSakthivel K break; 4032f5860992SSakthivel K case OPC_OUB_PHY_STOP_RESP: 40331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40341b5d2793SJoe Perches "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc); 4035f5860992SSakthivel K mpi_phy_stop_resp(pm8001_ha, piomb); 4036f5860992SSakthivel K break; 4037f5860992SSakthivel K case OPC_OUB_SET_CONTROLLER_CONFIG: 40381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40391b5d2793SJoe Perches "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc); 4040f5860992SSakthivel K mpi_set_controller_config_resp(pm8001_ha, piomb); 4041f5860992SSakthivel K break; 4042f5860992SSakthivel K case OPC_OUB_GET_CONTROLLER_CONFIG: 40431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40441b5d2793SJoe Perches "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc); 4045f5860992SSakthivel K mpi_get_controller_config_resp(pm8001_ha, piomb); 4046f5860992SSakthivel K break; 4047f5860992SSakthivel K case OPC_OUB_GET_PHY_PROFILE: 40481b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40491b5d2793SJoe Perches "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc); 4050f5860992SSakthivel K mpi_get_phy_profile_resp(pm8001_ha, piomb); 4051f5860992SSakthivel K break; 4052f5860992SSakthivel K case OPC_OUB_FLASH_OP_EXT: 40531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40541b5d2793SJoe Perches "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc); 4055f5860992SSakthivel K mpi_flash_op_ext_resp(pm8001_ha, piomb); 4056f5860992SSakthivel K break; 4057f5860992SSakthivel K case OPC_OUB_SET_PHY_PROFILE: 40581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40591b5d2793SJoe Perches "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc); 4060f5860992SSakthivel K mpi_set_phy_profile_resp(pm8001_ha, piomb); 4061f5860992SSakthivel K break; 4062f5860992SSakthivel K case OPC_OUB_KEK_MANAGEMENT_RESP: 40631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40641b5d2793SJoe Perches "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc); 4065f5860992SSakthivel K mpi_kek_management_resp(pm8001_ha, piomb); 4066f5860992SSakthivel K break; 4067f5860992SSakthivel K case OPC_OUB_DEK_MANAGEMENT_RESP: 40681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40691b5d2793SJoe Perches "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc); 4070f5860992SSakthivel K mpi_dek_management_resp(pm8001_ha, piomb); 4071f5860992SSakthivel K break; 4072f5860992SSakthivel K case OPC_OUB_SSP_COALESCED_COMP_RESP: 40731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40741b5d2793SJoe Perches "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc); 4075f5860992SSakthivel K ssp_coalesced_comp_resp(pm8001_ha, piomb); 4076f5860992SSakthivel K break; 4077f5860992SSakthivel K default: 40781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 40791b5d2793SJoe Perches "Unknown outbound Queue IOMB OPC = 0x%x\n", opc); 4080f5860992SSakthivel K break; 4081f5860992SSakthivel K } 4082f5860992SSakthivel K } 4083f5860992SSakthivel K 408472349b62SDeepak Ukey static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha) 408572349b62SDeepak Ukey { 40861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_0: 0x%x\n", 40871b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0)); 40881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_1:0x%x\n", 40891b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1)); 40901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_2: 0x%x\n", 40911b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)); 40921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_3: 0x%x\n", 40931b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3)); 40941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_0: 0x%x\n", 40951b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0)); 40961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_1: 0x%x\n", 40971b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1)); 40981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_2: 0x%x\n", 40991b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2)); 41001b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_3: 0x%x\n", 41011b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3)); 41021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_4: 0x%x\n", 41031b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4)); 41041b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_5: 0x%x\n", 41051b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5)); 41061b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n", 41071b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6)); 41081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n", 41091b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7)); 411072349b62SDeepak Ukey } 411172349b62SDeepak Ukey 4112f5860992SSakthivel K static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) 4113f5860992SSakthivel K { 4114f5860992SSakthivel K struct outbound_queue_table *circularQ; 4115f5860992SSakthivel K void *pMsg1 = NULL; 41163f649ab7SKees Cook u8 bc; 4117f5860992SSakthivel K u32 ret = MPI_IO_STATUS_FAIL; 4118f5860992SSakthivel K unsigned long flags; 411972349b62SDeepak Ukey u32 regval; 4120f5860992SSakthivel K 412105c6c029SViswas G if (vec == (pm8001_ha->max_q_num - 1)) { 412272349b62SDeepak Ukey regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 412372349b62SDeepak Ukey if ((regval & SCRATCH_PAD_MIPSALL_READY) != 412472349b62SDeepak Ukey SCRATCH_PAD_MIPSALL_READY) { 412572349b62SDeepak Ukey pm8001_ha->controller_fatal_error = true; 41261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 41271b5d2793SJoe Perches "Firmware Fatal error! Regval:0x%x\n", 41281b5d2793SJoe Perches regval); 412972349b62SDeepak Ukey print_scratchpad_registers(pm8001_ha); 413072349b62SDeepak Ukey return ret; 413172349b62SDeepak Ukey } 413272349b62SDeepak Ukey } 4133f5860992SSakthivel K spin_lock_irqsave(&pm8001_ha->lock, flags); 4134f5860992SSakthivel K circularQ = &pm8001_ha->outbnd_q_tbl[vec]; 4135f5860992SSakthivel K do { 413672349b62SDeepak Ukey /* spurious interrupt during setup if kexec-ing and 413772349b62SDeepak Ukey * driver doing a doorbell access w/ the pre-kexec oq 413872349b62SDeepak Ukey * interrupt setup. 413972349b62SDeepak Ukey */ 414072349b62SDeepak Ukey if (!circularQ->pi_virt) 414172349b62SDeepak Ukey break; 4142f5860992SSakthivel K ret = pm8001_mpi_msg_consume(pm8001_ha, circularQ, &pMsg1, &bc); 4143f5860992SSakthivel K if (MPI_IO_STATUS_SUCCESS == ret) { 4144f5860992SSakthivel K /* process the outbound message */ 4145f5860992SSakthivel K process_one_iomb(pm8001_ha, (void *)(pMsg1 - 4)); 4146f5860992SSakthivel K /* free the message from the outbound circular buffer */ 4147f5860992SSakthivel K pm8001_mpi_msg_free_set(pm8001_ha, pMsg1, 4148f5860992SSakthivel K circularQ, bc); 4149f5860992SSakthivel K } 4150f5860992SSakthivel K if (MPI_IO_STATUS_BUSY == ret) { 4151f5860992SSakthivel K /* Update the producer index from SPC */ 4152f5860992SSakthivel K circularQ->producer_index = 4153f5860992SSakthivel K cpu_to_le32(pm8001_read_32(circularQ->pi_virt)); 4154f5860992SSakthivel K if (le32_to_cpu(circularQ->producer_index) == 4155f5860992SSakthivel K circularQ->consumer_idx) 4156f5860992SSakthivel K /* OQ is empty */ 4157f5860992SSakthivel K break; 4158f5860992SSakthivel K } 4159f5860992SSakthivel K } while (1); 4160f5860992SSakthivel K spin_unlock_irqrestore(&pm8001_ha->lock, flags); 4161f5860992SSakthivel K return ret; 4162f5860992SSakthivel K } 4163f5860992SSakthivel K 4164f73bdebdSChristoph Hellwig /* DMA_... to our direction translation. */ 4165f5860992SSakthivel K static const u8 data_dir_flags[] = { 4166f73bdebdSChristoph Hellwig [DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT, /* UNSPECIFIED */ 4167f73bdebdSChristoph Hellwig [DMA_TO_DEVICE] = DATA_DIR_OUT, /* OUTBOUND */ 4168f73bdebdSChristoph Hellwig [DMA_FROM_DEVICE] = DATA_DIR_IN, /* INBOUND */ 4169f73bdebdSChristoph Hellwig [DMA_NONE] = DATA_DIR_NONE, /* NO TRANSFER */ 4170f5860992SSakthivel K }; 4171f5860992SSakthivel K 4172f5860992SSakthivel K static void build_smp_cmd(u32 deviceID, __le32 hTag, 4173f5860992SSakthivel K struct smp_req *psmp_cmd, int mode, int length) 4174f5860992SSakthivel K { 4175f5860992SSakthivel K psmp_cmd->tag = hTag; 4176f5860992SSakthivel K psmp_cmd->device_id = cpu_to_le32(deviceID); 4177f5860992SSakthivel K if (mode == SMP_DIRECT) { 4178f5860992SSakthivel K length = length - 4; /* subtract crc */ 4179f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(length << 16); 4180f5860992SSakthivel K } else { 4181f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(1|(1 << 1)); 4182f5860992SSakthivel K } 4183f5860992SSakthivel K } 4184f5860992SSakthivel K 4185f5860992SSakthivel K /** 4186f5860992SSakthivel K * pm8001_chip_smp_req - send a SMP task to FW 4187f5860992SSakthivel K * @pm8001_ha: our hba card information. 4188f5860992SSakthivel K * @ccb: the ccb information this request used. 4189f5860992SSakthivel K */ 4190f5860992SSakthivel K static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, 4191f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4192f5860992SSakthivel K { 4193f5860992SSakthivel K int elem, rc; 4194f5860992SSakthivel K struct sas_task *task = ccb->task; 4195f5860992SSakthivel K struct domain_device *dev = task->dev; 4196f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4197f5860992SSakthivel K struct scatterlist *sg_req, *sg_resp; 4198f5860992SSakthivel K u32 req_len, resp_len; 4199f5860992SSakthivel K struct smp_req smp_cmd; 4200f5860992SSakthivel K u32 opc; 4201f5860992SSakthivel K struct inbound_queue_table *circularQ; 4202f5860992SSakthivel K char *preq_dma_addr = NULL; 4203f5860992SSakthivel K __le64 tmp_addr; 4204f5860992SSakthivel K u32 i, length; 4205f5860992SSakthivel K 4206f5860992SSakthivel K memset(&smp_cmd, 0, sizeof(smp_cmd)); 4207f5860992SSakthivel K /* 4208f5860992SSakthivel K * DMA-map SMP request, response buffers 4209f5860992SSakthivel K */ 4210f5860992SSakthivel K sg_req = &task->smp_task.smp_req; 4211f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE); 4212f5860992SSakthivel K if (!elem) 4213f5860992SSakthivel K return -ENOMEM; 4214f5860992SSakthivel K req_len = sg_dma_len(sg_req); 4215f5860992SSakthivel K 4216f5860992SSakthivel K sg_resp = &task->smp_task.smp_resp; 4217f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE); 4218f5860992SSakthivel K if (!elem) { 4219f5860992SSakthivel K rc = -ENOMEM; 4220f5860992SSakthivel K goto err_out; 4221f5860992SSakthivel K } 4222f5860992SSakthivel K resp_len = sg_dma_len(sg_resp); 4223f5860992SSakthivel K /* must be in dwords */ 4224f5860992SSakthivel K if ((req_len & 0x3) || (resp_len & 0x3)) { 4225f5860992SSakthivel K rc = -EINVAL; 4226f5860992SSakthivel K goto err_out_2; 4227f5860992SSakthivel K } 4228f5860992SSakthivel K 4229f5860992SSakthivel K opc = OPC_INB_SMP_REQUEST; 4230f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4231f5860992SSakthivel K smp_cmd.tag = cpu_to_le32(ccb->ccb_tag); 4232f5860992SSakthivel K 4233f5860992SSakthivel K length = sg_req->length; 42341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP Frame Length %d\n", sg_req->length); 4235f5860992SSakthivel K if (!(length - 8)) 4236f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_DIRECT; 4237f5860992SSakthivel K else 4238f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_INDIRECT; 4239f5860992SSakthivel K 4240f5860992SSakthivel K 4241f5860992SSakthivel K tmp_addr = cpu_to_le64((u64)sg_dma_address(&task->smp_task.smp_req)); 4242f5860992SSakthivel K preq_dma_addr = (char *)phys_to_virt(tmp_addr); 4243f5860992SSakthivel K 4244f5860992SSakthivel K /* INDIRECT MODE command settings. Use DMA */ 4245f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) { 42461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP REQUEST INDIRECT MODE\n"); 4247f5860992SSakthivel K /* for SPCv indirect mode. Place the top 4 bytes of 4248f5860992SSakthivel K * SMP Request header here. */ 4249f5860992SSakthivel K for (i = 0; i < 4; i++) 4250f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr + i); 4251f5860992SSakthivel K /* exclude top 4 bytes for SMP req header */ 4252f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4253f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4254cb993e5dSAnand Kumar Santhanam (&task->smp_task.smp_req) + 4); 4255f5860992SSakthivel K /* exclude 4 bytes for SMP req header and CRC */ 4256f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4257f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-8); 4258f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4259f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4260f5860992SSakthivel K (&task->smp_task.smp_resp)); 4261f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4262f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len 4263f5860992SSakthivel K (&task->smp_task.smp_resp)-4); 4264f5860992SSakthivel K } else { /* DIRECT MODE */ 4265f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4266f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4267f5860992SSakthivel K (&task->smp_task.smp_req)); 4268f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4269f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-4); 4270f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4271f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4272f5860992SSakthivel K (&task->smp_task.smp_resp)); 4273f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4274f5860992SSakthivel K cpu_to_le32 4275f5860992SSakthivel K ((u32)sg_dma_len(&task->smp_task.smp_resp)-4); 4276f5860992SSakthivel K } 4277f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 42781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP REQUEST DIRECT MODE\n"); 4279f5860992SSakthivel K for (i = 0; i < length; i++) 4280f5860992SSakthivel K if (i < 16) { 4281f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr+i); 42821b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4283f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4284f5860992SSakthivel K i, smp_cmd.smp_req16[i], 42851b5d2793SJoe Perches *(preq_dma_addr)); 4286f5860992SSakthivel K } else { 4287f5860992SSakthivel K smp_cmd.smp_req[i] = *(preq_dma_addr+i); 42881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4289f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4290f5860992SSakthivel K i, smp_cmd.smp_req[i], 42911b5d2793SJoe Perches *(preq_dma_addr)); 4292f5860992SSakthivel K } 4293f5860992SSakthivel K } 4294f5860992SSakthivel K 4295f5860992SSakthivel K build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag, 4296f5860992SSakthivel K &smp_cmd, pm8001_ha->smp_exp_mode, length); 429791a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd, 429891a43fa6Speter chang sizeof(smp_cmd), 0); 42995533abcaSTomas Henzl if (rc) 43005533abcaSTomas Henzl goto err_out_2; 4301f5860992SSakthivel K return 0; 4302f5860992SSakthivel K 4303f5860992SSakthivel K err_out_2: 4304f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1, 4305f73bdebdSChristoph Hellwig DMA_FROM_DEVICE); 4306f5860992SSakthivel K err_out: 4307f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1, 4308f73bdebdSChristoph Hellwig DMA_TO_DEVICE); 4309f5860992SSakthivel K return rc; 4310f5860992SSakthivel K } 4311f5860992SSakthivel K 4312f5860992SSakthivel K static int check_enc_sas_cmd(struct sas_task *task) 4313f5860992SSakthivel K { 4314e73823f7SJames Bottomley u8 cmd = task->ssp_task.cmd->cmnd[0]; 4315e73823f7SJames Bottomley 4316e73823f7SJames Bottomley if (cmd == READ_10 || cmd == WRITE_10 || cmd == WRITE_VERIFY) 4317f5860992SSakthivel K return 1; 4318f5860992SSakthivel K else 4319f5860992SSakthivel K return 0; 4320f5860992SSakthivel K } 4321f5860992SSakthivel K 4322f5860992SSakthivel K static int check_enc_sat_cmd(struct sas_task *task) 4323f5860992SSakthivel K { 4324f5860992SSakthivel K int ret = 0; 4325f5860992SSakthivel K switch (task->ata_task.fis.command) { 4326f5860992SSakthivel K case ATA_CMD_FPDMA_READ: 4327f5860992SSakthivel K case ATA_CMD_READ_EXT: 4328f5860992SSakthivel K case ATA_CMD_READ: 4329f5860992SSakthivel K case ATA_CMD_FPDMA_WRITE: 4330f5860992SSakthivel K case ATA_CMD_WRITE_EXT: 4331f5860992SSakthivel K case ATA_CMD_WRITE: 4332f5860992SSakthivel K case ATA_CMD_PIO_READ: 4333f5860992SSakthivel K case ATA_CMD_PIO_READ_EXT: 4334f5860992SSakthivel K case ATA_CMD_PIO_WRITE: 4335f5860992SSakthivel K case ATA_CMD_PIO_WRITE_EXT: 4336f5860992SSakthivel K ret = 1; 4337f5860992SSakthivel K break; 4338f5860992SSakthivel K default: 4339f5860992SSakthivel K ret = 0; 4340f5860992SSakthivel K break; 4341f5860992SSakthivel K } 4342f5860992SSakthivel K return ret; 4343f5860992SSakthivel K } 4344f5860992SSakthivel K 4345f5860992SSakthivel K /** 4346f5860992SSakthivel K * pm80xx_chip_ssp_io_req - send a SSP task to FW 4347f5860992SSakthivel K * @pm8001_ha: our hba card information. 4348f5860992SSakthivel K * @ccb: the ccb information this request used. 4349f5860992SSakthivel K */ 4350f5860992SSakthivel K static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, 4351f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4352f5860992SSakthivel K { 4353f5860992SSakthivel K struct sas_task *task = ccb->task; 4354f5860992SSakthivel K struct domain_device *dev = task->dev; 4355f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4356f5860992SSakthivel K struct ssp_ini_io_start_req ssp_cmd; 4357f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4358f5860992SSakthivel K int ret; 43590ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 43600ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4361f5860992SSakthivel K struct inbound_queue_table *circularQ; 436205c6c029SViswas G u32 q_index, cpu_id; 4363f5860992SSakthivel K u32 opc = OPC_INB_SSPINIIOSTART; 4364f5860992SSakthivel K memset(&ssp_cmd, 0, sizeof(ssp_cmd)); 4365f5860992SSakthivel K memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); 4366f5860992SSakthivel K /* data address domain added for spcv; set to 0 by host, 4367f5860992SSakthivel K * used internally by controller 4368f5860992SSakthivel K * 0 for SAS 1.1 and SAS 2.0 compatible TLR 4369f5860992SSakthivel K */ 4370f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = 4371f5860992SSakthivel K cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0); 4372f5860992SSakthivel K ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4373f5860992SSakthivel K ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); 4374f5860992SSakthivel K ssp_cmd.tag = cpu_to_le32(tag); 4375f5860992SSakthivel K if (task->ssp_task.enable_first_burst) 4376f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= 0x80; 4377f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_prio << 3); 4378f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_attr & 7); 4379e73823f7SJames Bottomley memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd, 4380e73823f7SJames Bottomley task->ssp_task.cmd->cmd_len); 438105c6c029SViswas G cpu_id = smp_processor_id(); 438205c6c029SViswas G q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); 4383f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4384f5860992SSakthivel K 4385f5860992SSakthivel K /* Check if encryption is set */ 4386f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4387f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) { 43881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4389f5860992SSakthivel K "Encryption enabled.Sending Encrypt SAS command 0x%x\n", 43901b5d2793SJoe Perches task->ssp_task.cmd->cmnd[0]); 4391f5860992SSakthivel K opc = OPC_INB_SSP_INI_DIF_ENC_IO; 4392f5860992SSakthivel K /* enable encryption. 0 for SAS 1.1 and SAS 2.0 compatible TLR*/ 4393f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = cpu_to_le32 4394f5860992SSakthivel K ((data_dir_flags[task->data_dir] << 8) | 0x20 | 0x0); 4395f5860992SSakthivel K 4396f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4397f5860992SSakthivel K if (task->num_scatter > 1) { 4398f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4399f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 44005a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4401f5860992SSakthivel K ssp_cmd.enc_addr_low = 4402f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4403f5860992SSakthivel K ssp_cmd.enc_addr_high = 4404f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4405f5860992SSakthivel K ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 4406f5860992SSakthivel K } else if (task->num_scatter == 1) { 4407f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4408f5860992SSakthivel K ssp_cmd.enc_addr_low = 4409f5860992SSakthivel K cpu_to_le32(lower_32_bits(dma_addr)); 4410f5860992SSakthivel K ssp_cmd.enc_addr_high = 4411f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4412f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4413f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 44140ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 44150ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 44160ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.enc_len) - 1; 44170ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 44180ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 44190ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.enc_addr_high) { 44201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 44211b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 44220ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.enc_len, 44231b5d2793SJoe Perches end_addr_high, end_addr_low); 44240ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 44250ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 44265a141315SViswas G phys_addr = ccb->ccb_dma_handle; 44270ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_low = 44280ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 44290ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_high = 44300ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 44310ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 44320ecdf00bSAnand Kumar Santhanam } 4433f5860992SSakthivel K } else if (task->num_scatter == 0) { 4434f5860992SSakthivel K ssp_cmd.enc_addr_low = 0; 4435f5860992SSakthivel K ssp_cmd.enc_addr_high = 0; 4436f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4437f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 4438f5860992SSakthivel K } 4439f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4440f5860992SSakthivel K ssp_cmd.key_cmode = 0x6 << 4; 4441f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4442e73823f7SJames Bottomley ssp_cmd.twk_val0 = cpu_to_le32((task->ssp_task.cmd->cmnd[2] << 24) | 4443e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[3] << 16) | 4444e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[4] << 8) | 4445e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[5])); 4446f5860992SSakthivel K } else { 44471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4448f5860992SSakthivel K "Sending Normal SAS command 0x%x inb q %x\n", 44491b5d2793SJoe Perches task->ssp_task.cmd->cmnd[0], q_index); 4450f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4451f5860992SSakthivel K if (task->num_scatter > 1) { 4452f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, ccb->n_elem, 4453f5860992SSakthivel K ccb->buf_prd); 44545a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4455f5860992SSakthivel K ssp_cmd.addr_low = 4456f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4457f5860992SSakthivel K ssp_cmd.addr_high = 4458f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4459f5860992SSakthivel K ssp_cmd.esgl = cpu_to_le32(1<<31); 4460f5860992SSakthivel K } else if (task->num_scatter == 1) { 4461f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4462f5860992SSakthivel K ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(dma_addr)); 4463f5860992SSakthivel K ssp_cmd.addr_high = 4464f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4465f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4466f5860992SSakthivel K ssp_cmd.esgl = 0; 44670ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 44680ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 44690ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.len) - 1; 44700ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 44710ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 44720ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.addr_high) { 44731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 44741b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 44750ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.len, 44761b5d2793SJoe Perches end_addr_high, end_addr_low); 44770ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 44780ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 44795a141315SViswas G phys_addr = ccb->ccb_dma_handle; 44800ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_low = 44810ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 44820ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_high = 44830ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 44840ecdf00bSAnand Kumar Santhanam ssp_cmd.esgl = cpu_to_le32(1<<31); 44850ecdf00bSAnand Kumar Santhanam } 4486f5860992SSakthivel K } else if (task->num_scatter == 0) { 4487f5860992SSakthivel K ssp_cmd.addr_low = 0; 4488f5860992SSakthivel K ssp_cmd.addr_high = 0; 4489f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4490f5860992SSakthivel K ssp_cmd.esgl = 0; 4491f5860992SSakthivel K } 4492f5860992SSakthivel K } 4493f9cd6cbdSAnand Kumar Santhanam ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 449491a43fa6Speter chang &ssp_cmd, sizeof(ssp_cmd), q_index); 4495f5860992SSakthivel K return ret; 4496f5860992SSakthivel K } 4497f5860992SSakthivel K 4498f5860992SSakthivel K static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, 4499f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4500f5860992SSakthivel K { 4501f5860992SSakthivel K struct sas_task *task = ccb->task; 4502f5860992SSakthivel K struct domain_device *dev = task->dev; 4503f5860992SSakthivel K struct pm8001_device *pm8001_ha_dev = dev->lldd_dev; 4504f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4505f5860992SSakthivel K int ret; 450605c6c029SViswas G u32 q_index, cpu_id; 4507f5860992SSakthivel K struct sata_start_req sata_cmd; 4508f5860992SSakthivel K u32 hdr_tag, ncg_tag = 0; 45090ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 45100ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4511f5860992SSakthivel K u32 ATAP = 0x0; 4512f5860992SSakthivel K u32 dir; 4513f5860992SSakthivel K struct inbound_queue_table *circularQ; 4514c6b9ef57SSakthivel K unsigned long flags; 4515f5860992SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 4516f5860992SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 451705c6c029SViswas G cpu_id = smp_processor_id(); 451805c6c029SViswas G q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); 4519f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4520f5860992SSakthivel K 4521f73bdebdSChristoph Hellwig if (task->data_dir == DMA_NONE) { 4522f5860992SSakthivel K ATAP = 0x04; /* no data*/ 45231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "no data\n"); 4524f5860992SSakthivel K } else if (likely(!task->ata_task.device_control_reg_update)) { 4525f5860992SSakthivel K if (task->ata_task.dma_xfer) { 4526f5860992SSakthivel K ATAP = 0x06; /* DMA */ 45271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "DMA\n"); 4528f5860992SSakthivel K } else { 4529f5860992SSakthivel K ATAP = 0x05; /* PIO*/ 45301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "PIO\n"); 4531f5860992SSakthivel K } 4532f5860992SSakthivel K if (task->ata_task.use_ncq && 45331cbd772dSHannes Reinecke dev->sata_dev.class != ATA_DEV_ATAPI) { 4534f5860992SSakthivel K ATAP = 0x07; /* FPDMA */ 45351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "FPDMA\n"); 4536f5860992SSakthivel K } 4537f5860992SSakthivel K } 4538c6b9ef57SSakthivel K if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) { 4539c6b9ef57SSakthivel K task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 4540f5860992SSakthivel K ncg_tag = hdr_tag; 4541c6b9ef57SSakthivel K } 4542f5860992SSakthivel K dir = data_dir_flags[task->data_dir] << 8; 4543f5860992SSakthivel K sata_cmd.tag = cpu_to_le32(tag); 4544f5860992SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 4545f5860992SSakthivel K sata_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4546f5860992SSakthivel K 4547f5860992SSakthivel K sata_cmd.sata_fis = task->ata_task.fis; 4548f5860992SSakthivel K if (likely(!task->ata_task.device_control_reg_update)) 4549f5860992SSakthivel K sata_cmd.sata_fis.flags |= 0x80;/* C=1: update ATA cmd reg */ 4550f5860992SSakthivel K sata_cmd.sata_fis.flags &= 0xF0;/* PM_PORT field shall be 0 */ 4551f5860992SSakthivel K 4552f5860992SSakthivel K /* Check if encryption is set */ 4553f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4554f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) { 45551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4556f5860992SSakthivel K "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n", 45571b5d2793SJoe Perches sata_cmd.sata_fis.command); 4558f5860992SSakthivel K opc = OPC_INB_SATA_DIF_ENC_IO; 4559f5860992SSakthivel K 4560f5860992SSakthivel K /* set encryption bit */ 4561f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4562f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16)| 4563f5860992SSakthivel K ((ATAP & 0x3f) << 10) | 0x20 | dir); 4564f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4565f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4566f5860992SSakthivel K if (task->num_scatter > 1) { 4567f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4568f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 45695a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4570f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(phys_addr); 4571f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(phys_addr); 4572f5860992SSakthivel K sata_cmd.enc_esgl = cpu_to_le32(1 << 31); 4573f5860992SSakthivel K } else if (task->num_scatter == 1) { 4574f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4575f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(dma_addr); 4576f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(dma_addr); 4577f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4578f5860992SSakthivel K sata_cmd.enc_esgl = 0; 45790ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 45800ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 45810ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.enc_len) - 1; 45820ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 45830ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 45840ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.enc_addr_high) { 45851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 45861b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 45870ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.enc_len, 45881b5d2793SJoe Perches end_addr_high, end_addr_low); 45890ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 45900ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 45915a141315SViswas G phys_addr = ccb->ccb_dma_handle; 45920ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_low = 45930ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 45940ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_high = 45950ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 45960ecdf00bSAnand Kumar Santhanam sata_cmd.enc_esgl = 45970ecdf00bSAnand Kumar Santhanam cpu_to_le32(1 << 31); 45980ecdf00bSAnand Kumar Santhanam } 4599f5860992SSakthivel K } else if (task->num_scatter == 0) { 4600f5860992SSakthivel K sata_cmd.enc_addr_low = 0; 4601f5860992SSakthivel K sata_cmd.enc_addr_high = 0; 4602f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4603f5860992SSakthivel K sata_cmd.enc_esgl = 0; 4604f5860992SSakthivel K } 4605f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4606f5860992SSakthivel K sata_cmd.key_index_mode = 0x6 << 4; 4607f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4608f5860992SSakthivel K sata_cmd.twk_val0 = 4609f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbal_exp << 24) | 4610f5860992SSakthivel K (sata_cmd.sata_fis.lbah << 16) | 4611f5860992SSakthivel K (sata_cmd.sata_fis.lbam << 8) | 4612f5860992SSakthivel K (sata_cmd.sata_fis.lbal)); 4613f5860992SSakthivel K sata_cmd.twk_val1 = 4614f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbah_exp << 8) | 4615f5860992SSakthivel K (sata_cmd.sata_fis.lbam_exp)); 4616f5860992SSakthivel K } else { 46171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4618f5860992SSakthivel K "Sending Normal SATA command 0x%x inb %x\n", 46191b5d2793SJoe Perches sata_cmd.sata_fis.command, q_index); 4620f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4621f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4622f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16) | 4623f5860992SSakthivel K ((ATAP & 0x3f) << 10) | dir); 4624f5860992SSakthivel K 4625f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4626f5860992SSakthivel K if (task->num_scatter > 1) { 4627f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4628f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 46295a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4630f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(phys_addr); 4631f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(phys_addr); 4632f5860992SSakthivel K sata_cmd.esgl = cpu_to_le32(1 << 31); 4633f5860992SSakthivel K } else if (task->num_scatter == 1) { 4634f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4635f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(dma_addr); 4636f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(dma_addr); 4637f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4638f5860992SSakthivel K sata_cmd.esgl = 0; 46390ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 46400ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 46410ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.len) - 1; 46420ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 46430ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 46440ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.addr_high) { 46451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 46461b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%xend_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 46470ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.len, 46481b5d2793SJoe Perches end_addr_high, end_addr_low); 46490ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 46500ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 46515a141315SViswas G phys_addr = ccb->ccb_dma_handle; 46520ecdf00bSAnand Kumar Santhanam sata_cmd.addr_low = 46530ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 46540ecdf00bSAnand Kumar Santhanam sata_cmd.addr_high = 46550ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 46560ecdf00bSAnand Kumar Santhanam sata_cmd.esgl = cpu_to_le32(1 << 31); 46570ecdf00bSAnand Kumar Santhanam } 4658f5860992SSakthivel K } else if (task->num_scatter == 0) { 4659f5860992SSakthivel K sata_cmd.addr_low = 0; 4660f5860992SSakthivel K sata_cmd.addr_high = 0; 4661f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4662f5860992SSakthivel K sata_cmd.esgl = 0; 4663f5860992SSakthivel K } 4664f5860992SSakthivel K /* scsi cdb */ 4665f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[0] = 4666f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[0]) | 4667f5860992SSakthivel K (task->ata_task.atapi_packet[1] << 8) | 4668f5860992SSakthivel K (task->ata_task.atapi_packet[2] << 16) | 4669f5860992SSakthivel K (task->ata_task.atapi_packet[3] << 24))); 4670f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[1] = 4671f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[4]) | 4672f5860992SSakthivel K (task->ata_task.atapi_packet[5] << 8) | 4673f5860992SSakthivel K (task->ata_task.atapi_packet[6] << 16) | 4674f5860992SSakthivel K (task->ata_task.atapi_packet[7] << 24))); 4675f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[2] = 4676f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[8]) | 4677f5860992SSakthivel K (task->ata_task.atapi_packet[9] << 8) | 4678f5860992SSakthivel K (task->ata_task.atapi_packet[10] << 16) | 4679f5860992SSakthivel K (task->ata_task.atapi_packet[11] << 24))); 4680f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[3] = 4681f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[12]) | 4682f5860992SSakthivel K (task->ata_task.atapi_packet[13] << 8) | 4683f5860992SSakthivel K (task->ata_task.atapi_packet[14] << 16) | 4684f5860992SSakthivel K (task->ata_task.atapi_packet[15] << 24))); 4685f5860992SSakthivel K } 4686c6b9ef57SSakthivel K 4687c6b9ef57SSakthivel K /* Check for read log for failed drive and return */ 4688c6b9ef57SSakthivel K if (sata_cmd.sata_fis.command == 0x2f) { 4689c6b9ef57SSakthivel K if (pm8001_ha_dev && ((pm8001_ha_dev->id & NCQ_READ_LOG_FLAG) || 4690c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_ABORT_ALL_FLAG) || 4691c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_2ND_RLE_FLAG))) { 4692c6b9ef57SSakthivel K struct task_status_struct *ts; 4693c6b9ef57SSakthivel K 4694c6b9ef57SSakthivel K pm8001_ha_dev->id &= 0xDFFFFFFF; 4695c6b9ef57SSakthivel K ts = &task->task_status; 4696c6b9ef57SSakthivel K 4697c6b9ef57SSakthivel K spin_lock_irqsave(&task->task_state_lock, flags); 4698c6b9ef57SSakthivel K ts->resp = SAS_TASK_COMPLETE; 4699c6b9ef57SSakthivel K ts->stat = SAM_STAT_GOOD; 4700c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_STATE_PENDING; 4701c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 4702c6b9ef57SSakthivel K task->task_state_flags |= SAS_TASK_STATE_DONE; 4703c6b9ef57SSakthivel K if (unlikely((task->task_state_flags & 4704c6b9ef57SSakthivel K SAS_TASK_STATE_ABORTED))) { 4705c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4706c6b9ef57SSakthivel K flags); 47071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 47081b5d2793SJoe Perches "task 0x%p resp 0x%x stat 0x%x but aborted by upper layer\n", 47091b5d2793SJoe Perches task, ts->resp, 47101b5d2793SJoe Perches ts->stat); 4711c6b9ef57SSakthivel K pm8001_ccb_task_free(pm8001_ha, task, ccb, tag); 4712c6b9ef57SSakthivel K return 0; 47132b01d816SSuresh Thiagarajan } else { 4714c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4715c6b9ef57SSakthivel K flags); 47162b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, task, 47172b01d816SSuresh Thiagarajan ccb, tag); 47184a2efd4bSViswas G atomic_dec(&pm8001_ha_dev->running_req); 4719c6b9ef57SSakthivel K return 0; 4720c6b9ef57SSakthivel K } 4721c6b9ef57SSakthivel K } 4722c6b9ef57SSakthivel K } 4723f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 472491a43fa6Speter chang &sata_cmd, sizeof(sata_cmd), q_index); 4725f5860992SSakthivel K return ret; 4726f5860992SSakthivel K } 4727f5860992SSakthivel K 4728f5860992SSakthivel K /** 4729f5860992SSakthivel K * pm80xx_chip_phy_start_req - start phy via PHY_START COMMAND 4730f5860992SSakthivel K * @pm8001_ha: our hba card information. 4731f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4732f5860992SSakthivel K */ 4733f5860992SSakthivel K static int 4734f5860992SSakthivel K pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) 4735f5860992SSakthivel K { 4736f5860992SSakthivel K struct phy_start_req payload; 4737f5860992SSakthivel K struct inbound_queue_table *circularQ; 4738f5860992SSakthivel K int ret; 4739f5860992SSakthivel K u32 tag = 0x01; 4740f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTART; 4741f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4742f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4743f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4744f5860992SSakthivel K 47451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PHY START REQ for phy_id %d\n", phy_id); 4746a9a923e5SAnand Kumar Santhanam 47473e253d96Speter chang payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE | 47483e253d96Speter chang LINKMODE_AUTO | pm8001_ha->link_rate | phy_id); 4749f5860992SSakthivel K /* SSC Disable and SAS Analog ST configuration */ 4750f5860992SSakthivel K /** 4751f5860992SSakthivel K payload.ase_sh_lm_slr_phyid = 4752f5860992SSakthivel K cpu_to_le32(SSC_DISABLE_30 | SAS_ASE | SPINHOLD_DISABLE | 4753f5860992SSakthivel K LINKMODE_AUTO | LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | 4754f5860992SSakthivel K phy_id); 4755f5860992SSakthivel K Have to add "SAS PHY Analog Setup SPASTI 1 Byte" Based on need 4756f5860992SSakthivel K **/ 4757f5860992SSakthivel K 4758aa9f8328SJames Bottomley payload.sas_identify.dev_type = SAS_END_DEVICE; 4759f5860992SSakthivel K payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL; 4760f5860992SSakthivel K memcpy(payload.sas_identify.sas_addr, 47613e253d96Speter chang &pm8001_ha->sas_addr, SAS_ADDR_SIZE); 4762f5860992SSakthivel K payload.sas_identify.phy_id = phy_id; 476391a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 476491a43fa6Speter chang sizeof(payload), 0); 4765f5860992SSakthivel K return ret; 4766f5860992SSakthivel K } 4767f5860992SSakthivel K 4768f5860992SSakthivel K /** 4769f5860992SSakthivel K * pm8001_chip_phy_stop_req - start phy via PHY_STOP COMMAND 4770f5860992SSakthivel K * @pm8001_ha: our hba card information. 4771f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4772f5860992SSakthivel K */ 4773f5860992SSakthivel K static int pm80xx_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha, 4774f5860992SSakthivel K u8 phy_id) 4775f5860992SSakthivel K { 4776f5860992SSakthivel K struct phy_stop_req payload; 4777f5860992SSakthivel K struct inbound_queue_table *circularQ; 4778f5860992SSakthivel K int ret; 4779f5860992SSakthivel K u32 tag = 0x01; 4780f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTOP; 4781f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4782f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4783f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4784f5860992SSakthivel K payload.phy_id = cpu_to_le32(phy_id); 478591a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 478691a43fa6Speter chang sizeof(payload), 0); 4787f5860992SSakthivel K return ret; 4788f5860992SSakthivel K } 4789f5860992SSakthivel K 47906ad4a517SLee Jones /* 4791f5860992SSakthivel K * see comments on pm8001_mpi_reg_resp. 4792f5860992SSakthivel K */ 4793f5860992SSakthivel K static int pm80xx_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha, 4794f5860992SSakthivel K struct pm8001_device *pm8001_dev, u32 flag) 4795f5860992SSakthivel K { 4796f5860992SSakthivel K struct reg_dev_req payload; 4797f5860992SSakthivel K u32 opc; 4798f5860992SSakthivel K u32 stp_sspsmp_sata = 0x4; 4799f5860992SSakthivel K struct inbound_queue_table *circularQ; 4800f5860992SSakthivel K u32 linkrate, phy_id; 4801f5860992SSakthivel K int rc, tag = 0xdeadbeef; 4802f5860992SSakthivel K struct pm8001_ccb_info *ccb; 4803f5860992SSakthivel K u8 retryFlag = 0x1; 4804f5860992SSakthivel K u16 firstBurstSize = 0; 4805f5860992SSakthivel K u16 ITNT = 2000; 4806f5860992SSakthivel K struct domain_device *dev = pm8001_dev->sas_device; 4807f5860992SSakthivel K struct domain_device *parent_dev = dev->parent; 4808f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4809f5860992SSakthivel K 4810f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4811f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 4812f5860992SSakthivel K if (rc) 4813f5860992SSakthivel K return rc; 4814f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 4815f5860992SSakthivel K ccb->device = pm8001_dev; 4816f5860992SSakthivel K ccb->ccb_tag = tag; 4817f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4818f5860992SSakthivel K 4819f5860992SSakthivel K if (flag == 1) { 4820f5860992SSakthivel K stp_sspsmp_sata = 0x02; /*direct attached sata */ 4821f5860992SSakthivel K } else { 4822aa9f8328SJames Bottomley if (pm8001_dev->dev_type == SAS_SATA_DEV) 4823f5860992SSakthivel K stp_sspsmp_sata = 0x00; /* stp*/ 4824aa9f8328SJames Bottomley else if (pm8001_dev->dev_type == SAS_END_DEVICE || 4825aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_EDGE_EXPANDER_DEVICE || 4826aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_FANOUT_EXPANDER_DEVICE) 4827f5860992SSakthivel K stp_sspsmp_sata = 0x01; /*ssp or smp*/ 4828f5860992SSakthivel K } 4829924a3541SJohn Garry if (parent_dev && dev_is_expander(parent_dev->dev_type)) 4830f5860992SSakthivel K phy_id = parent_dev->ex_dev.ex_phy->phy_id; 4831f5860992SSakthivel K else 4832f5860992SSakthivel K phy_id = pm8001_dev->attached_phy; 4833f5860992SSakthivel K 4834f5860992SSakthivel K opc = OPC_INB_REG_DEV; 4835f5860992SSakthivel K 4836f5860992SSakthivel K linkrate = (pm8001_dev->sas_device->linkrate < dev->port->linkrate) ? 4837f5860992SSakthivel K pm8001_dev->sas_device->linkrate : dev->port->linkrate; 4838f5860992SSakthivel K 4839f5860992SSakthivel K payload.phyid_portid = 4840f5860992SSakthivel K cpu_to_le32(((pm8001_dev->sas_device->port->id) & 0xFF) | 4841f5860992SSakthivel K ((phy_id & 0xFF) << 8)); 4842f5860992SSakthivel K 4843f5860992SSakthivel K payload.dtype_dlr_mcn_ir_retry = cpu_to_le32((retryFlag & 0x01) | 4844f5860992SSakthivel K ((linkrate & 0x0F) << 24) | 4845f5860992SSakthivel K ((stp_sspsmp_sata & 0x03) << 28)); 4846f5860992SSakthivel K payload.firstburstsize_ITNexustimeout = 4847f5860992SSakthivel K cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); 4848f5860992SSakthivel K 4849f5860992SSakthivel K memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr, 4850f5860992SSakthivel K SAS_ADDR_SIZE); 4851f5860992SSakthivel K 485291a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 485391a43fa6Speter chang sizeof(payload), 0); 48545533abcaSTomas Henzl if (rc) 48555533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 4856f5860992SSakthivel K 4857f5860992SSakthivel K return rc; 4858f5860992SSakthivel K } 4859f5860992SSakthivel K 4860f5860992SSakthivel K /** 4861f5860992SSakthivel K * pm80xx_chip_phy_ctl_req - support the local phy operation 4862f5860992SSakthivel K * @pm8001_ha: our hba card information. 48636ad4a517SLee Jones * @phyId: the phy id which we wanted to operate 48646ad4a517SLee Jones * @phy_op: phy operation to request 4865f5860992SSakthivel K */ 4866f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 4867f5860992SSakthivel K u32 phyId, u32 phy_op) 4868f5860992SSakthivel K { 486925c6edbdSViswas G u32 tag; 487025c6edbdSViswas G int rc; 4871f5860992SSakthivel K struct local_phy_ctl_req payload; 4872f5860992SSakthivel K struct inbound_queue_table *circularQ; 4873f5860992SSakthivel K u32 opc = OPC_INB_LOCAL_PHY_CONTROL; 4874f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 487525c6edbdSViswas G rc = pm8001_tag_alloc(pm8001_ha, &tag); 487625c6edbdSViswas G if (rc) 487725c6edbdSViswas G return rc; 4878f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 487925c6edbdSViswas G payload.tag = cpu_to_le32(tag); 4880f5860992SSakthivel K payload.phyop_phyid = 4881f5860992SSakthivel K cpu_to_le32(((phy_op & 0xFF) << 8) | (phyId & 0xFF)); 488291a43fa6Speter chang return pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 488391a43fa6Speter chang sizeof(payload), 0); 4884f5860992SSakthivel K } 4885f5860992SSakthivel K 4886f310a4eaSColin Ian King static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) 4887f5860992SSakthivel K { 4888f5860992SSakthivel K #ifdef PM8001_USE_MSIX 4889f5860992SSakthivel K return 1; 4890292c04ccSColin Ian King #else 4891292c04ccSColin Ian King u32 value; 4892292c04ccSColin Ian King 4893f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); 4894f5860992SSakthivel K if (value) 4895f5860992SSakthivel K return 1; 4896f5860992SSakthivel K return 0; 4897292c04ccSColin Ian King #endif 4898f5860992SSakthivel K } 4899f5860992SSakthivel K 4900f5860992SSakthivel K /** 4901f5860992SSakthivel K * pm8001_chip_isr - PM8001 isr handler. 4902f5860992SSakthivel K * @pm8001_ha: our hba card information. 49036ad4a517SLee Jones * @vec: irq number. 4904f5860992SSakthivel K */ 4905f5860992SSakthivel K static irqreturn_t 4906f5860992SSakthivel K pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec) 4907f5860992SSakthivel K { 4908f5860992SSakthivel K pm80xx_chip_interrupt_disable(pm8001_ha, vec); 49091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 49107370672dSpeter chang "irq vec %d, ODMR:0x%x\n", 49111b5d2793SJoe Perches vec, pm8001_cr32(pm8001_ha, 0, 0x30)); 4912f5860992SSakthivel K process_oq(pm8001_ha, vec); 4913f5860992SSakthivel K pm80xx_chip_interrupt_enable(pm8001_ha, vec); 4914f5860992SSakthivel K return IRQ_HANDLED; 4915f5860992SSakthivel K } 4916f5860992SSakthivel K 4917ea310f57SLee Jones static void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha, 4918ea310f57SLee Jones u32 operation, u32 phyid, 4919ea310f57SLee Jones u32 length, u32 *buf) 492027909407SAnand Kumar Santhanam { 492127909407SAnand Kumar Santhanam u32 tag , i, j = 0; 492227909407SAnand Kumar Santhanam int rc; 492327909407SAnand Kumar Santhanam struct set_phy_profile_req payload; 492427909407SAnand Kumar Santhanam struct inbound_queue_table *circularQ; 492527909407SAnand Kumar Santhanam u32 opc = OPC_INB_SET_PHY_PROFILE; 492627909407SAnand Kumar Santhanam 492727909407SAnand Kumar Santhanam memset(&payload, 0, sizeof(payload)); 492827909407SAnand Kumar Santhanam rc = pm8001_tag_alloc(pm8001_ha, &tag); 492927909407SAnand Kumar Santhanam if (rc) 49301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Invalid tag\n"); 493127909407SAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[0]; 493227909407SAnand Kumar Santhanam payload.tag = cpu_to_le32(tag); 493327909407SAnand Kumar Santhanam payload.ppc_phyid = (((operation & 0xF) << 8) | (phyid & 0xFF)); 49341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 49351b5d2793SJoe Perches " phy profile command for phy %x ,length is %d\n", 49361b5d2793SJoe Perches payload.ppc_phyid, length); 493727909407SAnand Kumar Santhanam for (i = length; i < (length + PHY_DWORD_LENGTH - 1); i++) { 493827909407SAnand Kumar Santhanam payload.reserved[j] = cpu_to_le32(*((u32 *)buf + i)); 493927909407SAnand Kumar Santhanam j++; 494027909407SAnand Kumar Santhanam } 494191a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 494291a43fa6Speter chang sizeof(payload), 0); 49435533abcaSTomas Henzl if (rc) 49445533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 494527909407SAnand Kumar Santhanam } 494627909407SAnand Kumar Santhanam 494727909407SAnand Kumar Santhanam void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha, 494827909407SAnand Kumar Santhanam u32 length, u8 *buf) 494927909407SAnand Kumar Santhanam { 4950fdd0a66bSYueHaibing u32 i; 495127909407SAnand Kumar Santhanam 495227909407SAnand Kumar Santhanam for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 495327909407SAnand Kumar Santhanam mpi_set_phy_profile_req(pm8001_ha, 495427909407SAnand Kumar Santhanam SAS_PHY_ANALOG_SETTINGS_PAGE, i, length, (u32 *)buf); 495527909407SAnand Kumar Santhanam length = length + PHY_DWORD_LENGTH; 495627909407SAnand Kumar Santhanam } 49571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "phy settings completed\n"); 495827909407SAnand Kumar Santhanam } 4959c5614df7SBenjamin Rood 4960c5614df7SBenjamin Rood void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha, 4961c5614df7SBenjamin Rood u32 phy, u32 length, u32 *buf) 4962c5614df7SBenjamin Rood { 4963c5614df7SBenjamin Rood u32 tag, opc; 4964c5614df7SBenjamin Rood int rc, i; 4965c5614df7SBenjamin Rood struct set_phy_profile_req payload; 4966c5614df7SBenjamin Rood struct inbound_queue_table *circularQ; 4967c5614df7SBenjamin Rood 4968c5614df7SBenjamin Rood memset(&payload, 0, sizeof(payload)); 4969c5614df7SBenjamin Rood 4970c5614df7SBenjamin Rood rc = pm8001_tag_alloc(pm8001_ha, &tag); 4971c5614df7SBenjamin Rood if (rc) 49721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Invalid tag\n"); 4973c5614df7SBenjamin Rood 4974c5614df7SBenjamin Rood circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4975c5614df7SBenjamin Rood opc = OPC_INB_SET_PHY_PROFILE; 4976c5614df7SBenjamin Rood 4977c5614df7SBenjamin Rood payload.tag = cpu_to_le32(tag); 4978c5614df7SBenjamin Rood payload.ppc_phyid = (((SAS_PHY_ANALOG_SETTINGS_PAGE & 0xF) << 8) 4979c5614df7SBenjamin Rood | (phy & 0xFF)); 4980c5614df7SBenjamin Rood 4981c5614df7SBenjamin Rood for (i = 0; i < length; i++) 4982c5614df7SBenjamin Rood payload.reserved[i] = cpu_to_le32(*(buf + i)); 4983c5614df7SBenjamin Rood 498491a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 498591a43fa6Speter chang sizeof(payload), 0); 4986c5614df7SBenjamin Rood if (rc) 4987c5614df7SBenjamin Rood pm8001_tag_free(pm8001_ha, tag); 4988c5614df7SBenjamin Rood 49891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PHY %d settings applied\n", phy); 4990c5614df7SBenjamin Rood } 4991f5860992SSakthivel K const struct pm8001_dispatch pm8001_80xx_dispatch = { 4992f5860992SSakthivel K .name = "pmc80xx", 4993f5860992SSakthivel K .chip_init = pm80xx_chip_init, 4994f5860992SSakthivel K .chip_soft_rst = pm80xx_chip_soft_rst, 4995f5860992SSakthivel K .chip_rst = pm80xx_hw_chip_rst, 4996f5860992SSakthivel K .chip_iounmap = pm8001_chip_iounmap, 4997f5860992SSakthivel K .isr = pm80xx_chip_isr, 4998f310a4eaSColin Ian King .is_our_interrupt = pm80xx_chip_is_our_interrupt, 4999f5860992SSakthivel K .isr_process_oq = process_oq, 5000f5860992SSakthivel K .interrupt_enable = pm80xx_chip_interrupt_enable, 5001f5860992SSakthivel K .interrupt_disable = pm80xx_chip_interrupt_disable, 5002f5860992SSakthivel K .make_prd = pm8001_chip_make_sg, 5003f5860992SSakthivel K .smp_req = pm80xx_chip_smp_req, 5004f5860992SSakthivel K .ssp_io_req = pm80xx_chip_ssp_io_req, 5005f5860992SSakthivel K .sata_req = pm80xx_chip_sata_req, 5006f5860992SSakthivel K .phy_start_req = pm80xx_chip_phy_start_req, 5007f5860992SSakthivel K .phy_stop_req = pm80xx_chip_phy_stop_req, 5008f5860992SSakthivel K .reg_dev_req = pm80xx_chip_reg_dev_req, 5009f5860992SSakthivel K .dereg_dev_req = pm8001_chip_dereg_dev_req, 5010f5860992SSakthivel K .phy_ctl_req = pm80xx_chip_phy_ctl_req, 5011f5860992SSakthivel K .task_abort = pm8001_chip_abort_task, 5012f5860992SSakthivel K .ssp_tm_req = pm8001_chip_ssp_tm_req, 5013f5860992SSakthivel K .get_nvmd_req = pm8001_chip_get_nvmd_req, 5014f5860992SSakthivel K .set_nvmd_req = pm8001_chip_set_nvmd_req, 5015f5860992SSakthivel K .fw_flash_update_req = pm8001_chip_fw_flash_update_req, 5016f5860992SSakthivel K .set_dev_state_req = pm8001_chip_set_dev_state_req, 5017a961ea0aSakshatzen .fatal_errors = pm80xx_fatal_errors, 5018f5860992SSakthivel K }; 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