1f5860992SSakthivel K /* 2f5860992SSakthivel K * PMC-Sierra SPCv/ve 8088/8089 SAS/SATA based host adapters driver 3f5860992SSakthivel K * 4f5860992SSakthivel K * Copyright (c) 2008-2009 PMC-Sierra, Inc., 5f5860992SSakthivel K * All rights reserved. 6f5860992SSakthivel K * 7f5860992SSakthivel K * Redistribution and use in source and binary forms, with or without 8f5860992SSakthivel K * modification, are permitted provided that the following conditions 9f5860992SSakthivel K * are met: 10f5860992SSakthivel K * 1. Redistributions of source code must retain the above copyright 11f5860992SSakthivel K * notice, this list of conditions, and the following disclaimer, 12f5860992SSakthivel K * without modification. 13f5860992SSakthivel K * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14f5860992SSakthivel K * substantially similar to the "NO WARRANTY" disclaimer below 15f5860992SSakthivel K * ("Disclaimer") and any redistribution must be conditioned upon 16f5860992SSakthivel K * including a substantially similar Disclaimer requirement for further 17f5860992SSakthivel K * binary redistribution. 18f5860992SSakthivel K * 3. Neither the names of the above-listed copyright holders nor the names 19f5860992SSakthivel K * of any contributors may be used to endorse or promote products derived 20f5860992SSakthivel K * from this software without specific prior written permission. 21f5860992SSakthivel K * 22f5860992SSakthivel K * Alternatively, this software may be distributed under the terms of the 23f5860992SSakthivel K * GNU General Public License ("GPL") version 2 as published by the Free 24f5860992SSakthivel K * Software Foundation. 25f5860992SSakthivel K * 26f5860992SSakthivel K * NO WARRANTY 27f5860992SSakthivel K * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28f5860992SSakthivel K * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29f5860992SSakthivel K * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30f5860992SSakthivel K * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31f5860992SSakthivel K * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32f5860992SSakthivel K * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33f5860992SSakthivel K * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34f5860992SSakthivel K * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35f5860992SSakthivel K * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36f5860992SSakthivel K * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37f5860992SSakthivel K * POSSIBILITY OF SUCH DAMAGES. 38f5860992SSakthivel K * 39f5860992SSakthivel K */ 40f5860992SSakthivel K #include <linux/slab.h> 41f5860992SSakthivel K #include "pm8001_sas.h" 42f5860992SSakthivel K #include "pm80xx_hwi.h" 43f5860992SSakthivel K #include "pm8001_chips.h" 44f5860992SSakthivel K #include "pm8001_ctl.h" 458ceddda3SChangyuan Lyu #include "pm80xx_tracepoints.h" 46f5860992SSakthivel K 47f5860992SSakthivel K #define SMP_DIRECT 1 48f5860992SSakthivel K #define SMP_INDIRECT 2 49d078b511SAnand Kumar Santhanam 50d078b511SAnand Kumar Santhanam 51d078b511SAnand Kumar Santhanam int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shift_value) 52d078b511SAnand Kumar Santhanam { 53d078b511SAnand Kumar Santhanam u32 reg_val; 54d078b511SAnand Kumar Santhanam unsigned long start; 55d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, shift_value); 56d078b511SAnand Kumar Santhanam /* confirm the setting is written */ 57d078b511SAnand Kumar Santhanam start = jiffies + HZ; /* 1 sec */ 58d078b511SAnand Kumar Santhanam do { 59d078b511SAnand Kumar Santhanam reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER); 60d078b511SAnand Kumar Santhanam } while ((reg_val != shift_value) && time_before(jiffies, start)); 61d078b511SAnand Kumar Santhanam if (reg_val != shift_value) { 621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MEMBASE_II_SHIFT_REGISTER = 0x%x\n", 631b5d2793SJoe Perches reg_val); 64d078b511SAnand Kumar Santhanam return -1; 65d078b511SAnand Kumar Santhanam } 66d078b511SAnand Kumar Santhanam return 0; 67d078b511SAnand Kumar Santhanam } 68d078b511SAnand Kumar Santhanam 69ea310f57SLee Jones static void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset, 703762d8f6SDamien Le Moal __le32 *destination, 71d078b511SAnand Kumar Santhanam u32 dw_count, u32 bus_base_number) 72d078b511SAnand Kumar Santhanam { 73d078b511SAnand Kumar Santhanam u32 index, value, offset; 74d078b511SAnand Kumar Santhanam 753762d8f6SDamien Le Moal for (index = 0; index < dw_count; index += 4, destination++) { 76044f59deSDeepak Ukey offset = (soffset + index); 77d078b511SAnand Kumar Santhanam if (offset < (64 * 1024)) { 78d078b511SAnand Kumar Santhanam value = pm8001_cr32(pm8001_ha, bus_base_number, offset); 793762d8f6SDamien Le Moal *destination = cpu_to_le32(value); 80d078b511SAnand Kumar Santhanam } 81d078b511SAnand Kumar Santhanam } 82d078b511SAnand Kumar Santhanam return; 83d078b511SAnand Kumar Santhanam } 84d078b511SAnand Kumar Santhanam 85d078b511SAnand Kumar Santhanam ssize_t pm80xx_get_fatal_dump(struct device *cdev, 86d078b511SAnand Kumar Santhanam struct device_attribute *attr, char *buf) 87d078b511SAnand Kumar Santhanam { 88d078b511SAnand Kumar Santhanam struct Scsi_Host *shost = class_to_shost(cdev); 89d078b511SAnand Kumar Santhanam struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 90d078b511SAnand Kumar Santhanam struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 91d078b511SAnand Kumar Santhanam void __iomem *fatal_table_address = pm8001_ha->fatal_tbl_addr; 92d078b511SAnand Kumar Santhanam u32 accum_len, reg_val, index, *temp; 93044f59deSDeepak Ukey u32 status = 1; 94d078b511SAnand Kumar Santhanam unsigned long start; 95d078b511SAnand Kumar Santhanam u8 *direct_data; 96d078b511SAnand Kumar Santhanam char *fatal_error_data = buf; 97044f59deSDeepak Ukey u32 length_to_read; 98044f59deSDeepak Ukey u32 offset; 99d078b511SAnand Kumar Santhanam 100d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = buf; 101d078b511SAnand Kumar Santhanam if (pm8001_ha->chip_id == chip_8001) { 102d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 103d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 104d078b511SAnand Kumar Santhanam "Not supported for SPC controller"); 105d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 106d078b511SAnand Kumar Santhanam (char *)buf; 107d078b511SAnand Kumar Santhanam } 108044f59deSDeepak Ukey /* initialize variables for very first call from host application */ 109d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 1101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 1111b5d2793SJoe Perches "forensic_info TYPE_NON_FATAL..............\n"); 112d078b511SAnand Kumar Santhanam direct_data = (u8 *)fatal_error_data; 113d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL; 114d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET; 115044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_offset = 0; 116d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 117044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 0; 118044f59deSDeepak Ukey 119044f59deSDeepak Ukey /* Write signature to fatal dump table */ 120044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 121044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_SIGNATURE, 0x1234abcd); 122d078b511SAnand Kumar Santhanam 123d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = direct_data; 1241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: status1 %d\n", status); 1251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: read_len 0x%x\n", 1261b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.read_len); 1271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_len 0x%x\n", 1281b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_len); 1291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "ossaHwCB: direct_offset 0x%x\n", 1301b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_offset); 131044f59deSDeepak Ukey } 132044f59deSDeepak Ukey if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 133d078b511SAnand Kumar Santhanam /* start to get data */ 134d078b511SAnand Kumar Santhanam /* Program the MEMBASE II Shifting Register with 0x00.*/ 135d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 136d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 137d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 138d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 139d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 140d078b511SAnand Kumar Santhanam } 141cf370066SViswas G 142bb6beabfSRandy Dunlap /* Read until accum_len is retrieved */ 143d078b511SAnand Kumar Santhanam accum_len = pm8001_mr32(fatal_table_address, 144d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 145044f59deSDeepak Ukey /* Determine length of data between previously stored transfer length 146044f59deSDeepak Ukey * and current accumulated transfer length 147044f59deSDeepak Ukey */ 148044f59deSDeepak Ukey length_to_read = 149044f59deSDeepak Ukey accum_len - pm8001_ha->forensic_preserved_accumulated_transfer; 1501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: accum_len 0x%x\n", 1511b5d2793SJoe Perches accum_len); 1521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: length_to_read 0x%x\n", 1531b5d2793SJoe Perches length_to_read); 1541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: last_offset 0x%x\n", 1551b5d2793SJoe Perches pm8001_ha->forensic_last_offset); 1561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: read_len 0x%x\n", 1571b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.read_len); 1581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_len 0x%x\n", 1591b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_len); 1601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv:: direct_offset 0x%x\n", 1611b5d2793SJoe Perches pm8001_ha->forensic_info.data_buf.direct_offset); 162044f59deSDeepak Ukey 163044f59deSDeepak Ukey /* If accumulated length failed to read correctly fail the attempt.*/ 164d078b511SAnand Kumar Santhanam if (accum_len == 0xFFFFFFFF) { 1651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 1661b5d2793SJoe Perches "Possible PCI issue 0x%x not expected\n", 1671b5d2793SJoe Perches accum_len); 168044f59deSDeepak Ukey return status; 169d078b511SAnand Kumar Santhanam } 170044f59deSDeepak Ukey /* If accumulated length is zero fail the attempt */ 171044f59deSDeepak Ukey if (accum_len == 0) { 172d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 173d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 174d078b511SAnand Kumar Santhanam "%08x ", 0xFFFFFFFF); 175d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 176d078b511SAnand Kumar Santhanam (char *)buf; 177d078b511SAnand Kumar Santhanam } 178044f59deSDeepak Ukey /* Accumulated length is good so start capturing the first data */ 179d078b511SAnand Kumar Santhanam temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 180d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 0) { 181d078b511SAnand Kumar Santhanam moreData: 182044f59deSDeepak Ukey /* If data to read is less than SYSFS_OFFSET then reduce the 183044f59deSDeepak Ukey * length of dataLen 184044f59deSDeepak Ukey */ 185044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset + SYSFS_OFFSET 186044f59deSDeepak Ukey > length_to_read) { 187044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 188044f59deSDeepak Ukey length_to_read - 189044f59deSDeepak Ukey pm8001_ha->forensic_last_offset; 190044f59deSDeepak Ukey } else { 191044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 192044f59deSDeepak Ukey SYSFS_OFFSET; 193044f59deSDeepak Ukey } 194d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_data) { 195d078b511SAnand Kumar Santhanam /* Data is in bar, copy to host memory */ 196044f59deSDeepak Ukey pm80xx_pci_mem_copy(pm8001_ha, 197044f59deSDeepak Ukey pm8001_ha->fatal_bar_loc, 198d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr, 199044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len, 1); 200d078b511SAnand Kumar Santhanam } 201d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc += 202d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 203d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_offset += 204d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 205d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset += 206d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 207d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 208d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 209d078b511SAnand Kumar Santhanam 210044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset >= length_to_read) { 211d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 212d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 213d078b511SAnand Kumar Santhanam "%08x ", 3); 214044f59deSDeepak Ukey for (index = 0; index < 215044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 216044f59deSDeepak Ukey / 4); index++) { 217d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 218044f59deSDeepak Ukey sprintf( 219044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 220d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 221d078b511SAnand Kumar Santhanam } 222d078b511SAnand Kumar Santhanam 223d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 224d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 1; 225d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset = 0; 226d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 227044f59deSDeepak Ukey status = 0; 228044f59deSDeepak Ukey offset = (int) 229044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 230044f59deSDeepak Ukey - (char *)buf); 2311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 2321b5d2793SJoe Perches "get_fatal_spcv:return1 0x%x\n", offset); 233d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 234d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 235d078b511SAnand Kumar Santhanam (char *)buf; 236d078b511SAnand Kumar Santhanam } 237d078b511SAnand Kumar Santhanam if (pm8001_ha->fatal_bar_loc < (64 * 1024)) { 238d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 239d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 240d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 241d078b511SAnand Kumar Santhanam "%08x ", 2); 242044f59deSDeepak Ukey for (index = 0; index < 243044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 244044f59deSDeepak Ukey / 4); index++) { 245044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 246044f59deSDeepak Ukey += sprintf(pm8001_ha-> 247d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 248d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 249d078b511SAnand Kumar Santhanam } 250044f59deSDeepak Ukey status = 0; 251044f59deSDeepak Ukey offset = (int) 252044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 253044f59deSDeepak Ukey - (char *)buf); 2541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 2551b5d2793SJoe Perches "get_fatal_spcv:return2 0x%x\n", offset); 256d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 257d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 258d078b511SAnand Kumar Santhanam (char *)buf; 259d078b511SAnand Kumar Santhanam } 260d078b511SAnand Kumar Santhanam 261d078b511SAnand Kumar Santhanam /* Increment the MEMBASE II Shifting Register value by 0x100.*/ 262d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 263d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 264d078b511SAnand Kumar Santhanam "%08x ", 2); 265044f59deSDeepak Ukey for (index = 0; index < 266044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 267044f59deSDeepak Ukey / 4) ; index++) { 268d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 269d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 270d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 271d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 272d078b511SAnand Kumar Santhanam } 273d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset += 0x100; 274d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 275d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 276d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 277044f59deSDeepak Ukey status = 0; 278044f59deSDeepak Ukey offset = (int) 279044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 280044f59deSDeepak Ukey - (char *)buf); 2811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return3 0x%x\n", 2821b5d2793SJoe Perches offset); 283d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 284d078b511SAnand Kumar Santhanam (char *)buf; 285d078b511SAnand Kumar Santhanam } 286d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 1) { 287044f59deSDeepak Ukey /* store previous accumulated length before triggering next 288044f59deSDeepak Ukey * accumulated length update 289044f59deSDeepak Ukey */ 290044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 291044f59deSDeepak Ukey pm8001_mr32(fatal_table_address, 292044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 293044f59deSDeepak Ukey 294044f59deSDeepak Ukey /* continue capturing the fatal log until Dump status is 0x3 */ 295044f59deSDeepak Ukey if (pm8001_mr32(fatal_table_address, 296044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS) < 297044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) { 298044f59deSDeepak Ukey 299044f59deSDeepak Ukey /* reset fddstat bit by writing to zero*/ 300044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 301044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS, 0x0); 302044f59deSDeepak Ukey 303044f59deSDeepak Ukey /* set dump control value to '1' so that new data will 304044f59deSDeepak Ukey * be transferred to shared memory 305044f59deSDeepak Ukey */ 306d078b511SAnand Kumar Santhanam pm8001_mw32(fatal_table_address, 307d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 308d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_HANDSHAKE_RDY); 309d078b511SAnand Kumar Santhanam 310d078b511SAnand Kumar Santhanam /*Poll FDDHSHK until clear */ 311d078b511SAnand Kumar Santhanam start = jiffies + (2 * HZ); /* 2 sec */ 312d078b511SAnand Kumar Santhanam 313d078b511SAnand Kumar Santhanam do { 314d078b511SAnand Kumar Santhanam reg_val = pm8001_mr32(fatal_table_address, 315d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE); 316d078b511SAnand Kumar Santhanam } while ((reg_val) && time_before(jiffies, start)); 317d078b511SAnand Kumar Santhanam 318d078b511SAnand Kumar Santhanam if (reg_val != 0) { 3191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 320044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_HDSHAKE 0x%x\n", 3211b5d2793SJoe Perches reg_val); 322044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 323044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 324044f59deSDeepak Ukey sprintf( 325044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 326044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 327044f59deSDeepak Ukey return((char *) 328044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 329044f59deSDeepak Ukey - (char *)buf); 330d078b511SAnand Kumar Santhanam } 331044f59deSDeepak Ukey /* Poll status register until set to 2 or 332044f59deSDeepak Ukey * 3 for up to 2 seconds 333044f59deSDeepak Ukey */ 334044f59deSDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 335d078b511SAnand Kumar Santhanam 336044f59deSDeepak Ukey do { 337044f59deSDeepak Ukey reg_val = pm8001_mr32(fatal_table_address, 338044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS); 3390e7c353eSColin Ian King } while (((reg_val != 2) && (reg_val != 3)) && 340044f59deSDeepak Ukey time_before(jiffies, start)); 341044f59deSDeepak Ukey 342044f59deSDeepak Ukey if (reg_val < 2) { 3431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 344044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_STATUS = 0x%x\n", 3451b5d2793SJoe Perches reg_val); 346044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 347044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 348044f59deSDeepak Ukey sprintf( 349044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 350044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 351ec2e7e1aSViswas G return((char *)pm8001_ha->forensic_info.data_buf.direct_data - 352ec2e7e1aSViswas G (char *)buf); 353ec2e7e1aSViswas G } 354ec2e7e1aSViswas G /* reset fatal_forensic_shift_offset back to zero and reset MEMBASE 2 register to zero */ 355ec2e7e1aSViswas G pm8001_ha->fatal_forensic_shift_offset = 0; /* location in 64k region */ 356044f59deSDeepak Ukey pm8001_cw32(pm8001_ha, 0, 357044f59deSDeepak Ukey MEMBASE_II_SHIFT_REGISTER, 358044f59deSDeepak Ukey pm8001_ha->fatal_forensic_shift_offset); 359044f59deSDeepak Ukey } 360044f59deSDeepak Ukey /* Read the next block of the debug data.*/ 361044f59deSDeepak Ukey length_to_read = pm8001_mr32(fatal_table_address, 362044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN) - 363044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer; 364044f59deSDeepak Ukey if (length_to_read != 0x0) { 365d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 366d078b511SAnand Kumar Santhanam goto moreData; 367d078b511SAnand Kumar Santhanam } else { 368d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 3697b382122SColin Ian King sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 370d078b511SAnand Kumar Santhanam "%08x ", 4); 3717b382122SColin Ian King pm8001_ha->forensic_info.data_buf.read_len = 0xFFFFFFFF; 3727b382122SColin Ian King pm8001_ha->forensic_info.data_buf.direct_len = 0; 3737b382122SColin Ian King pm8001_ha->forensic_info.data_buf.direct_offset = 0; 374d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 375d078b511SAnand Kumar Santhanam } 376d078b511SAnand Kumar Santhanam } 377044f59deSDeepak Ukey offset = (int)((char *)pm8001_ha->forensic_info.data_buf.direct_data 378044f59deSDeepak Ukey - (char *)buf); 3791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "get_fatal_spcv: return4 0x%x\n", offset); 380ec2e7e1aSViswas G return ((char *)pm8001_ha->forensic_info.data_buf.direct_data - 381ec2e7e1aSViswas G (char *)buf); 382d078b511SAnand Kumar Santhanam } 383d078b511SAnand Kumar Santhanam 384dba2cc03SDeepak Ukey /* pm80xx_get_non_fatal_dump - dump the nonfatal data from the dma 385dba2cc03SDeepak Ukey * location by the firmware. 386dba2cc03SDeepak Ukey */ 387dba2cc03SDeepak Ukey ssize_t pm80xx_get_non_fatal_dump(struct device *cdev, 388dba2cc03SDeepak Ukey struct device_attribute *attr, char *buf) 389dba2cc03SDeepak Ukey { 390dba2cc03SDeepak Ukey struct Scsi_Host *shost = class_to_shost(cdev); 391dba2cc03SDeepak Ukey struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 392dba2cc03SDeepak Ukey struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 393dba2cc03SDeepak Ukey void __iomem *nonfatal_table_address = pm8001_ha->fatal_tbl_addr; 394dba2cc03SDeepak Ukey u32 accum_len = 0; 395dba2cc03SDeepak Ukey u32 total_len = 0; 396dba2cc03SDeepak Ukey u32 reg_val = 0; 397dba2cc03SDeepak Ukey u32 *temp = NULL; 398dba2cc03SDeepak Ukey u32 index = 0; 399dba2cc03SDeepak Ukey u32 output_length; 400dba2cc03SDeepak Ukey unsigned long start = 0; 401dba2cc03SDeepak Ukey char *buf_copy = buf; 402dba2cc03SDeepak Ukey 403dba2cc03SDeepak Ukey temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 404dba2cc03SDeepak Ukey if (++pm8001_ha->non_fatal_count == 1) { 405dba2cc03SDeepak Ukey if (pm8001_ha->chip_id == chip_8001) { 406dba2cc03SDeepak Ukey snprintf(pm8001_ha->forensic_info.data_buf.direct_data, 407dba2cc03SDeepak Ukey PAGE_SIZE, "Not supported for SPC controller"); 408dba2cc03SDeepak Ukey return 0; 409dba2cc03SDeepak Ukey } 4101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "forensic_info TYPE_NON_FATAL...\n"); 411dba2cc03SDeepak Ukey /* 412dba2cc03SDeepak Ukey * Step 1: Write the host buffer parameters in the MPI Fatal and 413dba2cc03SDeepak Ukey * Non-Fatal Error Dump Capture Table.This is the buffer 414dba2cc03SDeepak Ukey * where debug data will be DMAed to. 415dba2cc03SDeepak Ukey */ 416dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 417dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_LO_OFFSET, 418dba2cc03SDeepak Ukey pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_lo); 419dba2cc03SDeepak Ukey 420dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 421dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_HI_OFFSET, 422dba2cc03SDeepak Ukey pm8001_ha->memoryMap.region[FORENSIC_MEM].phys_addr_hi); 423dba2cc03SDeepak Ukey 424dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 425dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_LENGTH, SYSFS_OFFSET); 426dba2cc03SDeepak Ukey 427dba2cc03SDeepak Ukey /* Optionally, set the DUMPCTRL bit to 1 if the host 428dba2cc03SDeepak Ukey * keeps sending active I/Os while capturing the non-fatal 429dba2cc03SDeepak Ukey * debug data. Otherwise, leave this bit set to zero 430dba2cc03SDeepak Ukey */ 431dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 432dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_HANDSHAKE, MPI_FATAL_EDUMP_HANDSHAKE_RDY); 433dba2cc03SDeepak Ukey 434dba2cc03SDeepak Ukey /* 435dba2cc03SDeepak Ukey * Step 2: Clear Accumulative Length of Debug Data Transferred 436dba2cc03SDeepak Ukey * [ACCDDLEN] field in the MPI Fatal and Non-Fatal Error Dump 437dba2cc03SDeepak Ukey * Capture Table to zero. 438dba2cc03SDeepak Ukey */ 439dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, 440dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN, 0); 441dba2cc03SDeepak Ukey 442dba2cc03SDeepak Ukey /* initiallize previous accumulated length to 0 */ 443dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 0; 444dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 445dba2cc03SDeepak Ukey } 446dba2cc03SDeepak Ukey 447dba2cc03SDeepak Ukey total_len = pm8001_mr32(nonfatal_table_address, 448dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_TOTAL_LEN); 449dba2cc03SDeepak Ukey /* 450dba2cc03SDeepak Ukey * Step 3:Clear Fatal/Non-Fatal Debug Data Transfer Status [FDDTSTAT] 451dba2cc03SDeepak Ukey * field and then request that the SPCv controller transfer the debug 452dba2cc03SDeepak Ukey * data by setting bit 7 of the Inbound Doorbell Set Register. 453dba2cc03SDeepak Ukey */ 454dba2cc03SDeepak Ukey pm8001_mw32(nonfatal_table_address, MPI_FATAL_EDUMP_TABLE_STATUS, 0); 455dba2cc03SDeepak Ukey pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, 456dba2cc03SDeepak Ukey SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP); 457dba2cc03SDeepak Ukey 458dba2cc03SDeepak Ukey /* 459dba2cc03SDeepak Ukey * Step 4.1: Read back the Inbound Doorbell Set Register (by polling for 460dba2cc03SDeepak Ukey * 2 seconds) until register bit 7 is cleared. 461dba2cc03SDeepak Ukey * This step only indicates the request is accepted by the controller. 462dba2cc03SDeepak Ukey */ 463dba2cc03SDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 464dba2cc03SDeepak Ukey do { 465dba2cc03SDeepak Ukey reg_val = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET) & 466dba2cc03SDeepak Ukey SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP; 467dba2cc03SDeepak Ukey } while ((reg_val != 0) && time_before(jiffies, start)); 468dba2cc03SDeepak Ukey 469dba2cc03SDeepak Ukey /* Step 4.2: To check the completion of the transfer, poll the Fatal/Non 470dba2cc03SDeepak Ukey * Fatal Debug Data Transfer Status [FDDTSTAT] field for 2 seconds in 471dba2cc03SDeepak Ukey * the MPI Fatal and Non-Fatal Error Dump Capture Table. 472dba2cc03SDeepak Ukey */ 473dba2cc03SDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 474dba2cc03SDeepak Ukey do { 475dba2cc03SDeepak Ukey reg_val = pm8001_mr32(nonfatal_table_address, 476dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS); 477dba2cc03SDeepak Ukey } while ((!reg_val) && time_before(jiffies, start)); 478dba2cc03SDeepak Ukey 479dba2cc03SDeepak Ukey if ((reg_val == 0x00) || 480dba2cc03SDeepak Ukey (reg_val == MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED) || 481dba2cc03SDeepak Ukey (reg_val > MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE)) { 482dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 483dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 0xFFFFFFFF); 484dba2cc03SDeepak Ukey pm8001_ha->non_fatal_count = 0; 485dba2cc03SDeepak Ukey return (buf_copy - buf); 486dba2cc03SDeepak Ukey } else if (reg_val == 487dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA) { 488dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 2); 489dba2cc03SDeepak Ukey } else if ((reg_val == MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) || 490dba2cc03SDeepak Ukey (pm8001_ha->non_fatal_read_length >= total_len)) { 491dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length = 0; 492dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, "%08x ", 4); 493dba2cc03SDeepak Ukey pm8001_ha->non_fatal_count = 0; 494dba2cc03SDeepak Ukey } 495dba2cc03SDeepak Ukey accum_len = pm8001_mr32(nonfatal_table_address, 496dba2cc03SDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 497dba2cc03SDeepak Ukey output_length = accum_len - 498dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer; 499dba2cc03SDeepak Ukey 500dba2cc03SDeepak Ukey for (index = 0; index < output_length/4; index++) 501dba2cc03SDeepak Ukey buf_copy += snprintf(buf_copy, PAGE_SIZE, 502dba2cc03SDeepak Ukey "%08x ", *(temp+index)); 503dba2cc03SDeepak Ukey 504dba2cc03SDeepak Ukey pm8001_ha->non_fatal_read_length += output_length; 505dba2cc03SDeepak Ukey 506dba2cc03SDeepak Ukey /* store current accumulated length to use in next iteration as 507dba2cc03SDeepak Ukey * the previous accumulated length 508dba2cc03SDeepak Ukey */ 509dba2cc03SDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = accum_len; 510dba2cc03SDeepak Ukey return (buf_copy - buf); 511dba2cc03SDeepak Ukey } 512dba2cc03SDeepak Ukey 513f5860992SSakthivel K /** 514f5860992SSakthivel K * read_main_config_table - read the configure table and save it. 515f5860992SSakthivel K * @pm8001_ha: our hba card information 516f5860992SSakthivel K */ 517f5860992SSakthivel K static void read_main_config_table(struct pm8001_hba_info *pm8001_ha) 518f5860992SSakthivel K { 519f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 520f5860992SSakthivel K 521f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature = 522f5860992SSakthivel K pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); 523f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev = 524f5860992SSakthivel K pm8001_mr32(address, MAIN_INTERFACE_REVISION); 525f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev = 526f5860992SSakthivel K pm8001_mr32(address, MAIN_FW_REVISION); 527f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io = 528f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); 529f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl = 530f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); 531f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag = 532f5860992SSakthivel K pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); 533f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset = 534f5860992SSakthivel K pm8001_mr32(address, MAIN_GST_OFFSET); 535f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset = 536f5860992SSakthivel K pm8001_mr32(address, MAIN_IBQ_OFFSET); 537f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset = 538f5860992SSakthivel K pm8001_mr32(address, MAIN_OBQ_OFFSET); 539f5860992SSakthivel K 540f5860992SSakthivel K /* read Error Dump Offset and Length */ 541f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 = 542f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); 543f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 = 544f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); 545f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 = 546f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); 547f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 = 548f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); 549f5860992SSakthivel K 550f5860992SSakthivel K /* read GPIO LED settings from the configuration table */ 551f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping = 552f5860992SSakthivel K pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); 553f5860992SSakthivel K 554f5860992SSakthivel K /* read analog Setting offset from the configuration table */ 555f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset = 556f5860992SSakthivel K pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); 557f5860992SSakthivel K 558f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset = 559f5860992SSakthivel K pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); 560f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset = 561f5860992SSakthivel K pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); 5628414cd80SViswas G /* read port recover and reset timeout */ 5638414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer = 5648414cd80SViswas G pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); 56524fff017SViswas G /* read ILA and inactive firmware version */ 56624fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version = 56724fff017SViswas G pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE); 56824fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version = 56924fff017SViswas G pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION); 5707370672dSpeter chang 5711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5727370672dSpeter chang "Main cfg table: sign:%x interface rev:%x fw_rev:%x\n", 5737370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature, 5747370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev, 5751b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev); 5767370672dSpeter chang 5771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5787370672dSpeter chang "table offset: gst:%x iq:%x oq:%x int vec:%x phy attr:%x\n", 5797370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset, 5807370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset, 5817370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset, 5827370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset, 5831b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset); 5847370672dSpeter chang 5851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 5867370672dSpeter chang "Main cfg table; ila rev:%x Inactive fw rev:%x\n", 5877370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version, 5881b5d2793SJoe Perches pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version); 589f5860992SSakthivel K } 590f5860992SSakthivel K 591f5860992SSakthivel K /** 592f5860992SSakthivel K * read_general_status_table - read the general status table and save it. 593f5860992SSakthivel K * @pm8001_ha: our hba card information 594f5860992SSakthivel K */ 595f5860992SSakthivel K static void read_general_status_table(struct pm8001_hba_info *pm8001_ha) 596f5860992SSakthivel K { 597f5860992SSakthivel K void __iomem *address = pm8001_ha->general_stat_tbl_addr; 598f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate = 599f5860992SSakthivel K pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); 600f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 = 601f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); 602f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 = 603f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); 604f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt = 605f5860992SSakthivel K pm8001_mr32(address, GST_MSGUTCNT_OFFSET); 606f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt = 607f5860992SSakthivel K pm8001_mr32(address, GST_IOPTCNT_OFFSET); 608f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val = 609f5860992SSakthivel K pm8001_mr32(address, GST_GPIO_INPUT_VAL); 610f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[0] = 611f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET0); 612f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[1] = 613f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET1); 614f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[2] = 615f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET2); 616f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[3] = 617f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET3); 618f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[4] = 619f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET4); 620f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[5] = 621f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET5); 622f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[6] = 623f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET6); 624f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[7] = 625f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET7); 626f5860992SSakthivel K } 627f5860992SSakthivel K /** 628f5860992SSakthivel K * read_phy_attr_table - read the phy attribute table and save it. 629f5860992SSakthivel K * @pm8001_ha: our hba card information 630f5860992SSakthivel K */ 631f5860992SSakthivel K static void read_phy_attr_table(struct pm8001_hba_info *pm8001_ha) 632f5860992SSakthivel K { 633f5860992SSakthivel K void __iomem *address = pm8001_ha->pspa_q_tbl_addr; 634f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[0] = 635f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); 636f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[1] = 637f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); 638f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[2] = 639f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); 640f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[3] = 641f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); 642f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[4] = 643f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); 644f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[5] = 645f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); 646f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[6] = 647f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); 648f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[7] = 649f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); 650f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[8] = 651f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); 652f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[9] = 653f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); 654f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[10] = 655f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); 656f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[11] = 657f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); 658f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[12] = 659f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); 660f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[13] = 661f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); 662f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[14] = 663f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); 664f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[15] = 665f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); 666f5860992SSakthivel K 667f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[0] = 668f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); 669f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[1] = 670f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); 671f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[2] = 672f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); 673f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[3] = 674f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); 675f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[4] = 676f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); 677f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[5] = 678f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); 679f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[6] = 680f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); 681f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[7] = 682f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); 683f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[8] = 684f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); 685f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[9] = 686f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); 687f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[10] = 688f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); 689f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[11] = 690f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); 691f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[12] = 692f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); 693f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[13] = 694f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); 695f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[14] = 696f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); 697f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[15] = 698f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); 699f5860992SSakthivel K 700f5860992SSakthivel K } 701f5860992SSakthivel K 702f5860992SSakthivel K /** 703f5860992SSakthivel K * read_inbnd_queue_table - read the inbound queue table and save it. 704f5860992SSakthivel K * @pm8001_ha: our hba card information 705f5860992SSakthivel K */ 706f5860992SSakthivel K static void read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 707f5860992SSakthivel K { 708f5860992SSakthivel K int i; 709f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 71005c6c029SViswas G for (i = 0; i < PM8001_MAX_INB_NUM; i++) { 711f5860992SSakthivel K u32 offset = i * 0x20; 712f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 713f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 714f5860992SSakthivel K (offset + IB_PIPCI_BAR))); 715f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 716f5860992SSakthivel K pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); 717f5860992SSakthivel K } 718f5860992SSakthivel K } 719f5860992SSakthivel K 720f5860992SSakthivel K /** 721f5860992SSakthivel K * read_outbnd_queue_table - read the outbound queue table and save it. 722f5860992SSakthivel K * @pm8001_ha: our hba card information 723f5860992SSakthivel K */ 724f5860992SSakthivel K static void read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 725f5860992SSakthivel K { 726f5860992SSakthivel K int i; 727f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 72805c6c029SViswas G for (i = 0; i < PM8001_MAX_OUTB_NUM; i++) { 729f5860992SSakthivel K u32 offset = i * 0x24; 730f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 731f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 732f5860992SSakthivel K (offset + OB_CIPCI_BAR))); 733f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 734f5860992SSakthivel K pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); 735f5860992SSakthivel K } 736f5860992SSakthivel K } 737f5860992SSakthivel K 738f5860992SSakthivel K /** 739f5860992SSakthivel K * init_default_table_values - init the default table. 740f5860992SSakthivel K * @pm8001_ha: our hba card information 741f5860992SSakthivel K */ 742f5860992SSakthivel K static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) 743f5860992SSakthivel K { 744f5860992SSakthivel K int i; 745f5860992SSakthivel K u32 offsetib, offsetob; 746f5860992SSakthivel K void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr; 747f5860992SSakthivel K void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr; 74805c6c029SViswas G u32 ib_offset = pm8001_ha->ib_offset; 74905c6c029SViswas G u32 ob_offset = pm8001_ha->ob_offset; 75005c6c029SViswas G u32 ci_offset = pm8001_ha->ci_offset; 75105c6c029SViswas G u32 pi_offset = pm8001_ha->pi_offset; 752f5860992SSakthivel K 753f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr = 754f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_hi; 755f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr = 756f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_lo; 757f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size = 758f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 759f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity = 0x01; 760f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr = 761f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_hi; 762f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr = 763f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_lo; 764f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size = 765f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 766f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01; 767f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01; 768f5860992SSakthivel K 769c6b9ef57SSakthivel K /* Disable end to end CRC checking */ 770c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16); 771c6b9ef57SSakthivel K 77205c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 773f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt = 7749504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30); 775f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].upper_base_addr = 77605c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi; 777f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].lower_base_addr = 77805c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo; 779f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].base_virt = 78005c6c029SViswas G (u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr; 781f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].total_length = 78205c6c029SViswas G pm8001_ha->memoryMap.region[ib_offset + i].total_len; 783f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr = 78405c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi; 785f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr = 78605c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo; 787f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_virt = 78805c6c029SViswas G pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr; 789b431472bSViswas G pm8001_write_32(pm8001_ha->inbnd_q_tbl[i].ci_virt, 0, 0); 790f5860992SSakthivel K offsetib = i * 0x20; 791f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 792f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressib, 793f5860992SSakthivel K (offsetib + 0x14))); 794f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 795f5860992SSakthivel K pm8001_mr32(addressib, (offsetib + 0x18)); 796f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].producer_idx = 0; 797f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].consumer_index = 0; 7987370672dSpeter chang 7991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8007370672dSpeter chang "IQ %d pi_bar 0x%x pi_offset 0x%x\n", i, 8017370672dSpeter chang pm8001_ha->inbnd_q_tbl[i].pi_pci_bar, 8021b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[i].pi_offset); 803f5860992SSakthivel K } 80405c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 805f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].element_size_cnt = 8069504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30); 807f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].upper_base_addr = 80805c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi; 809f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].lower_base_addr = 81005c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo; 811f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].base_virt = 81205c6c029SViswas G (u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr; 813f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].total_length = 81405c6c029SViswas G pm8001_ha->memoryMap.region[ob_offset + i].total_len; 815f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr = 81605c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi; 817f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr = 81805c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo; 819f5860992SSakthivel K /* interrupt vector based on oq */ 820f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24); 821f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_virt = 82205c6c029SViswas G pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr; 823b431472bSViswas G pm8001_write_32(pm8001_ha->outbnd_q_tbl[i].pi_virt, 0, 0); 824f5860992SSakthivel K offsetob = i * 0x24; 825f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 826f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressob, 827f5860992SSakthivel K offsetob + 0x14)); 828f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 829f5860992SSakthivel K pm8001_mr32(addressob, (offsetob + 0x18)); 830f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0; 831f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].producer_index = 0; 8327370672dSpeter chang 8331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8347370672dSpeter chang "OQ %d ci_bar 0x%x ci_offset 0x%x\n", i, 8357370672dSpeter chang pm8001_ha->outbnd_q_tbl[i].ci_pci_bar, 8361b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[i].ci_offset); 837f5860992SSakthivel K } 838f5860992SSakthivel K } 839f5860992SSakthivel K 840f5860992SSakthivel K /** 841f5860992SSakthivel K * update_main_config_table - update the main default table to the HBA. 842f5860992SSakthivel K * @pm8001_ha: our hba card information 843f5860992SSakthivel K */ 844f5860992SSakthivel K static void update_main_config_table(struct pm8001_hba_info *pm8001_ha) 845f5860992SSakthivel K { 846f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 847f5860992SSakthivel K pm8001_mw32(address, MAIN_IQNPPD_HPPD_OFFSET, 848f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_q_nppd_hppd); 849f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_HI, 850f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr); 851f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_LO, 852f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr); 853f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_BUFF_SIZE, 854f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size); 855f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_OPTION, 856f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity); 857f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_HI, 858f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr); 859f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_LO, 860f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr); 861f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_BUFF_SIZE, 862f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size); 863f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_OPTION, 864f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity); 86572349b62SDeepak Ukey /* Update Fatal error interrupt vector */ 86672349b62SDeepak Ukey pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= 86705c6c029SViswas G ((pm8001_ha->max_q_num - 1) << 8); 868f5860992SSakthivel K pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT, 869f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt); 8701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8717370672dSpeter chang "Updated Fatal error interrupt vector 0x%x\n", 8721b5d2793SJoe Perches pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT)); 8737370672dSpeter chang 874c6b9ef57SSakthivel K pm8001_mw32(address, MAIN_EVENT_CRC_CHECK, 875c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump); 876f5860992SSakthivel K 877f5860992SSakthivel K /* SPCv specific */ 878f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping &= 0xCFFFFFFF; 879f5860992SSakthivel K /* Set GPIOLED to 0x2 for LED indicator */ 880f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000; 881f5860992SSakthivel K pm8001_mw32(address, MAIN_GPIO_LED_FLAGS_OFFSET, 882f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping); 8831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 8847370672dSpeter chang "Programming DW 0x21 in main cfg table with 0x%x\n", 8851b5d2793SJoe Perches pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET)); 886f5860992SSakthivel K 887f5860992SSakthivel K pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 888f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 889f5860992SSakthivel K pm8001_mw32(address, MAIN_INT_REASSERTION_DELAY, 890f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interrupt_reassertion_delay); 8918414cd80SViswas G 8928414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 0xffff0000; 8938414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 8948414cd80SViswas G PORT_RECOVERY_TIMEOUT; 89561daffdeSViswas G if (pm8001_ha->chip_id == chip_8006) { 89661daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 89761daffdeSViswas G 0x0000ffff; 89861daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 899196ba662SDeepak Ukey CHIP_8006_PORT_RECOVERY_TIMEOUT; 90061daffdeSViswas G } 9018414cd80SViswas G pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 9028414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 903f5860992SSakthivel K } 904f5860992SSakthivel K 905f5860992SSakthivel K /** 906f5860992SSakthivel K * update_inbnd_queue_table - update the inbound queue table to the HBA. 907f5860992SSakthivel K * @pm8001_ha: our hba card information 9086ad4a517SLee Jones * @number: entry in the queue 909f5860992SSakthivel K */ 910f5860992SSakthivel K static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 911f5860992SSakthivel K int number) 912f5860992SSakthivel K { 913f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 914f5860992SSakthivel K u16 offset = number * 0x20; 915f5860992SSakthivel K pm8001_mw32(address, offset + IB_PROPERITY_OFFSET, 916f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 917f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_HI_OFFSET, 918f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].upper_base_addr); 919f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_LO_OFFSET, 920f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 921f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_HI_OFFSET, 922f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr); 923f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_LO_OFFSET, 924f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 9257370672dSpeter chang 9261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9277370672dSpeter chang "IQ %d: Element pri size 0x%x\n", 9287370672dSpeter chang number, 9291b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 9307370672dSpeter chang 9311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9327370672dSpeter chang "IQ upr base addr 0x%x IQ lwr base addr 0x%x\n", 9337370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].upper_base_addr, 9341b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 9357370672dSpeter chang 9361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9377370672dSpeter chang "CI upper base addr 0x%x CI lower base addr 0x%x\n", 9387370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr, 9391b5d2793SJoe Perches pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 940f5860992SSakthivel K } 941f5860992SSakthivel K 942f5860992SSakthivel K /** 943f5860992SSakthivel K * update_outbnd_queue_table - update the outbound queue table to the HBA. 944f5860992SSakthivel K * @pm8001_ha: our hba card information 9456ad4a517SLee Jones * @number: entry in the queue 946f5860992SSakthivel K */ 947f5860992SSakthivel K static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 948f5860992SSakthivel K int number) 949f5860992SSakthivel K { 950f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 951f5860992SSakthivel K u16 offset = number * 0x24; 952f5860992SSakthivel K pm8001_mw32(address, offset + OB_PROPERITY_OFFSET, 953f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 954f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_HI_OFFSET, 955f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].upper_base_addr); 956f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_LO_OFFSET, 957f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 958f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_HI_OFFSET, 959f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr); 960f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_LO_OFFSET, 961f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 962f5860992SSakthivel K pm8001_mw32(address, offset + OB_INTERRUPT_COALES_OFFSET, 963f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay); 9647370672dSpeter chang 9651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9667370672dSpeter chang "OQ %d: Element pri size 0x%x\n", 9677370672dSpeter chang number, 9681b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 9697370672dSpeter chang 9701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9717370672dSpeter chang "OQ upr base addr 0x%x OQ lwr base addr 0x%x\n", 9727370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].upper_base_addr, 9731b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 9747370672dSpeter chang 9751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 9767370672dSpeter chang "PI upper base addr 0x%x PI lower base addr 0x%x\n", 9777370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr, 9781b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 979f5860992SSakthivel K } 980f5860992SSakthivel K 981f5860992SSakthivel K /** 982f5860992SSakthivel K * mpi_init_check - check firmware initialization status. 983f5860992SSakthivel K * @pm8001_ha: our hba card information 984f5860992SSakthivel K */ 985f5860992SSakthivel K static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) 986f5860992SSakthivel K { 987f5860992SSakthivel K u32 max_wait_count; 988f5860992SSakthivel K u32 value; 989f5860992SSakthivel K u32 gst_len_mpistate; 990f5860992SSakthivel K 991f5860992SSakthivel K /* Write bit0=1 to Inbound DoorBell Register to tell the SPC FW the 992f5860992SSakthivel K table is updated */ 993f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE); 994f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 995a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 996e90e2362Sianyar max_wait_count = SPCV_DOORBELL_CLEAR_TIMEOUT; 997a9a923e5SAnand Kumar Santhanam } else { 998e90e2362Sianyar max_wait_count = SPC_DOORBELL_CLEAR_TIMEOUT; 999a9a923e5SAnand Kumar Santhanam } 1000f5860992SSakthivel K do { 1001d71023afSakshatzen msleep(FW_READY_INTERVAL); 1002f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1003f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_UPDATE; 1004f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1005f5860992SSakthivel K 100605c6c029SViswas G if (!max_wait_count) { 100705c6c029SViswas G /* additional check */ 10081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 10091b5d2793SJoe Perches "Inb doorbell clear not toggled[value:%x]\n", 10101b5d2793SJoe Perches value); 101105c6c029SViswas G return -EBUSY; 101205c6c029SViswas G } 1013f5860992SSakthivel K /* check the MPI-State for initialization up to 100ms*/ 1014d71023afSakshatzen max_wait_count = 5;/* 100 msec */ 1015f5860992SSakthivel K do { 1016d71023afSakshatzen msleep(FW_READY_INTERVAL); 1017f5860992SSakthivel K gst_len_mpistate = 1018f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1019f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1020f5860992SSakthivel K } while ((GST_MPI_STATE_INIT != 1021f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count)); 1022f5860992SSakthivel K if (!max_wait_count) 102305c6c029SViswas G return -EBUSY; 1024f5860992SSakthivel K 1025f5860992SSakthivel K /* check MPI Initialization error */ 1026f5860992SSakthivel K gst_len_mpistate = gst_len_mpistate >> 16; 1027f5860992SSakthivel K if (0x0000 != gst_len_mpistate) 102805c6c029SViswas G return -EBUSY; 1029f5860992SSakthivel K 1030f5860992SSakthivel K return 0; 1031f5860992SSakthivel K } 1032f5860992SSakthivel K 1033f5860992SSakthivel K /** 1034f5860992SSakthivel K * check_fw_ready - The LLDD check if the FW is ready, if not, return error. 103548cd6b38Sakshatzen * This function sleeps hence it must not be used in atomic context. 1036f5860992SSakthivel K * @pm8001_ha: our hba card information 1037f5860992SSakthivel K */ 1038f5860992SSakthivel K static int check_fw_ready(struct pm8001_hba_info *pm8001_ha) 1039f5860992SSakthivel K { 1040f5860992SSakthivel K u32 value; 1041f5860992SSakthivel K u32 max_wait_count; 1042f5860992SSakthivel K u32 max_wait_time; 10436b2f2d05SBhavesh Jashnani u32 expected_mask; 1044f5860992SSakthivel K int ret = 0; 1045f5860992SSakthivel K 1046f5860992SSakthivel K /* reset / PCIe ready */ 104748cd6b38Sakshatzen max_wait_time = max_wait_count = 5; /* 100 milli sec */ 1048f5860992SSakthivel K do { 104948cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1050f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1051f5860992SSakthivel K } while ((value == 0xFFFFFFFF) && (--max_wait_count)); 1052f5860992SSakthivel K 10536b2f2d05SBhavesh Jashnani /* check ila, RAAE and iops status */ 1054f5860992SSakthivel K if ((pm8001_ha->chip_id != chip_8008) && 1055f5860992SSakthivel K (pm8001_ha->chip_id != chip_8009)) { 10566b2f2d05SBhavesh Jashnani max_wait_time = max_wait_count = 180; /* 3600 milli sec */ 10576b2f2d05SBhavesh Jashnani expected_mask = SCRATCH_PAD_ILA_READY | 10586b2f2d05SBhavesh Jashnani SCRATCH_PAD_RAAE_READY | 10596b2f2d05SBhavesh Jashnani SCRATCH_PAD_IOP0_READY | 10606b2f2d05SBhavesh Jashnani SCRATCH_PAD_IOP1_READY; 10616b2f2d05SBhavesh Jashnani } else { 10626b2f2d05SBhavesh Jashnani max_wait_time = max_wait_count = 170; /* 3400 milli sec */ 10636b2f2d05SBhavesh Jashnani expected_mask = SCRATCH_PAD_ILA_READY | 10646b2f2d05SBhavesh Jashnani SCRATCH_PAD_RAAE_READY | 10656b2f2d05SBhavesh Jashnani SCRATCH_PAD_IOP0_READY; 10666b2f2d05SBhavesh Jashnani } 1067f5860992SSakthivel K do { 106848cd6b38Sakshatzen msleep(FW_READY_INTERVAL); 1069f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 10706b2f2d05SBhavesh Jashnani } while (((value & expected_mask) != 10716b2f2d05SBhavesh Jashnani expected_mask) && (--max_wait_count)); 10726b2f2d05SBhavesh Jashnani if (!max_wait_count) { 10736b2f2d05SBhavesh Jashnani pm8001_dbg(pm8001_ha, INIT, 10746b2f2d05SBhavesh Jashnani "At least one FW component failed to load within %d millisec: Scratchpad1: 0x%x\n", 10756b2f2d05SBhavesh Jashnani max_wait_time * FW_READY_INTERVAL, value); 1076f5860992SSakthivel K ret = -1; 10776b2f2d05SBhavesh Jashnani } else { 10781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 10796b2f2d05SBhavesh Jashnani "All FW components ready by %d ms\n", 10806b2f2d05SBhavesh Jashnani (max_wait_time - max_wait_count) * FW_READY_INTERVAL); 1081f5860992SSakthivel K } 1082f5860992SSakthivel K return ret; 1083f5860992SSakthivel K } 1084f5860992SSakthivel K 108595652f98Sakshatzen static int init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) 1086f5860992SSakthivel K { 1087f5860992SSakthivel K void __iomem *base_addr; 1088f5860992SSakthivel K u32 value; 1089f5860992SSakthivel K u32 offset; 1090f5860992SSakthivel K u32 pcibar; 1091f5860992SSakthivel K u32 pcilogic; 1092f5860992SSakthivel K 1093f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 109495652f98Sakshatzen 1095bb6beabfSRandy Dunlap /* 109695652f98Sakshatzen * lower 26 bits of SCRATCHPAD0 register describes offset within the 109795652f98Sakshatzen * PCIe BAR where the MPI configuration table is present 109895652f98Sakshatzen */ 1099f5860992SSakthivel K offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */ 1100f5860992SSakthivel K 11011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, "Scratchpad 0 Offset: 0x%x value 0x%x\n", 11021b5d2793SJoe Perches offset, value); 1103bb6beabfSRandy Dunlap /* 110495652f98Sakshatzen * Upper 6 bits describe the offset within PCI config space where BAR 110595652f98Sakshatzen * is located. 110695652f98Sakshatzen */ 1107f5860992SSakthivel K pcilogic = (value & 0xFC000000) >> 26; 1108f5860992SSakthivel K pcibar = get_pci_bar_index(pcilogic); 11091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar); 111095652f98Sakshatzen 1111bb6beabfSRandy Dunlap /* 111295652f98Sakshatzen * Make sure the offset falls inside the ioremapped PCI BAR 111395652f98Sakshatzen */ 111495652f98Sakshatzen if (offset > pm8001_ha->io_mem[pcibar].memsize) { 111595652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 111695652f98Sakshatzen "Main cfg tbl offset outside %u > %u\n", 111795652f98Sakshatzen offset, pm8001_ha->io_mem[pcibar].memsize); 111895652f98Sakshatzen return -EBUSY; 111995652f98Sakshatzen } 1120f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr = base_addr = 1121f5860992SSakthivel K pm8001_ha->io_mem[pcibar].memvirtaddr + offset; 112295652f98Sakshatzen 1123bb6beabfSRandy Dunlap /* 112495652f98Sakshatzen * Validate main configuration table address: first DWord should read 112595652f98Sakshatzen * "PMCS" 112695652f98Sakshatzen */ 112795652f98Sakshatzen value = pm8001_mr32(pm8001_ha->main_cfg_tbl_addr, 0); 112895652f98Sakshatzen if (memcmp(&value, "PMCS", 4) != 0) { 112995652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 113095652f98Sakshatzen "BAD main config signature 0x%x\n", 113195652f98Sakshatzen value); 113295652f98Sakshatzen return -EBUSY; 113395652f98Sakshatzen } 113495652f98Sakshatzen pm8001_dbg(pm8001_ha, INIT, 113595652f98Sakshatzen "VALID main config signature 0x%x\n", value); 1136f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr = 1137f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x18) & 1138f5860992SSakthivel K 0xFFFFFF); 1139f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr = 1140f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C) & 1141f5860992SSakthivel K 0xFFFFFF); 1142f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr = 1143f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x20) & 1144f5860992SSakthivel K 0xFFFFFF); 1145f5860992SSakthivel K pm8001_ha->ivt_tbl_addr = 1146f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C) & 1147f5860992SSakthivel K 0xFFFFFF); 1148f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr = 1149f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x90) & 1150f5860992SSakthivel K 0xFFFFFF); 1151d078b511SAnand Kumar Santhanam pm8001_ha->fatal_tbl_addr = 1152d078b511SAnand Kumar Santhanam base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) & 1153d078b511SAnand Kumar Santhanam 0xFFFFFF); 1154f5860992SSakthivel K 11551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "GST OFFSET 0x%x\n", 11561b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x18)); 11571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "INBND OFFSET 0x%x\n", 11581b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C)); 11591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "OBND OFFSET 0x%x\n", 11601b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x20)); 11611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "IVT OFFSET 0x%x\n", 11621b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C)); 11631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PSPA OFFSET 0x%x\n", 11641b5d2793SJoe Perches pm8001_cr32(pm8001_ha, pcibar, offset + 0x90)); 11651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - main cfg %p general status %p\n", 1166f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr, 11671b5d2793SJoe Perches pm8001_ha->general_stat_tbl_addr); 11681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - inbnd %p obnd %p\n", 1169f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr, 11701b5d2793SJoe Perches pm8001_ha->outbnd_q_tbl_addr); 11711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "addr - pspa %p ivt %p\n", 1172f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr, 11731b5d2793SJoe Perches pm8001_ha->ivt_tbl_addr); 117495652f98Sakshatzen return 0; 1175f5860992SSakthivel K } 1176f5860992SSakthivel K 1177f5860992SSakthivel K /** 1178f5860992SSakthivel K * pm80xx_set_thermal_config - support the thermal configuration 1179f5860992SSakthivel K * @pm8001_ha: our hba card information. 1180f5860992SSakthivel K */ 1181a6cb3d01SSakthivel K int 1182f5860992SSakthivel K pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha) 1183f5860992SSakthivel K { 1184f5860992SSakthivel K struct set_ctrl_cfg_req payload; 1185f5860992SSakthivel K struct inbound_queue_table *circularQ; 1186f5860992SSakthivel K int rc; 1187f5860992SSakthivel K u32 tag; 1188f5860992SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1189842784e0SViswas G u32 page_code; 1190f5860992SSakthivel K 1191f5860992SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1192f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1193f5860992SSakthivel K if (rc) 1194f5860992SSakthivel K return -1; 1195f5860992SSakthivel K 1196f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1197f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1198842784e0SViswas G 1199842784e0SViswas G if (IS_SPCV_12G(pm8001_ha->pdev)) 1200842784e0SViswas G page_code = THERMAL_PAGE_CODE_7H; 1201842784e0SViswas G else 1202842784e0SViswas G page_code = THERMAL_PAGE_CODE_8H; 1203842784e0SViswas G 1204*bb225b12SDamien Le Moal payload.cfg_pg[0] = 1205*bb225b12SDamien Le Moal cpu_to_le32((THERMAL_LOG_ENABLE << 9) | 1206*bb225b12SDamien Le Moal (THERMAL_ENABLE << 8) | page_code); 1207*bb225b12SDamien Le Moal payload.cfg_pg[1] = 1208*bb225b12SDamien Le Moal cpu_to_le32((LTEMPHIL << 24) | (RTEMPHIL << 8)); 1209f5860992SSakthivel K 12101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 12117370672dSpeter chang "Setting up thermal config. cfg_pg 0 0x%x cfg_pg 1 0x%x\n", 12121b5d2793SJoe Perches payload.cfg_pg[0], payload.cfg_pg[1]); 12137370672dSpeter chang 121491a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 121591a43fa6Speter chang sizeof(payload), 0); 12165533abcaSTomas Henzl if (rc) 12175533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1218f5860992SSakthivel K return rc; 1219f5860992SSakthivel K 1220f5860992SSakthivel K } 1221f5860992SSakthivel K 1222f5860992SSakthivel K /** 1223a6cb3d01SSakthivel K * pm80xx_set_sas_protocol_timer_config - support the SAS Protocol 1224a6cb3d01SSakthivel K * Timer configuration page 1225a6cb3d01SSakthivel K * @pm8001_ha: our hba card information. 1226a6cb3d01SSakthivel K */ 1227a6cb3d01SSakthivel K static int 1228a6cb3d01SSakthivel K pm80xx_set_sas_protocol_timer_config(struct pm8001_hba_info *pm8001_ha) 1229a6cb3d01SSakthivel K { 1230a6cb3d01SSakthivel K struct set_ctrl_cfg_req payload; 1231a6cb3d01SSakthivel K struct inbound_queue_table *circularQ; 1232a6cb3d01SSakthivel K SASProtocolTimerConfig_t SASConfigPage; 1233a6cb3d01SSakthivel K int rc; 1234a6cb3d01SSakthivel K u32 tag; 1235a6cb3d01SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1236a6cb3d01SSakthivel K 1237a6cb3d01SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1238a6cb3d01SSakthivel K memset(&SASConfigPage, 0, sizeof(SASProtocolTimerConfig_t)); 1239a6cb3d01SSakthivel K 1240a6cb3d01SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1241a6cb3d01SSakthivel K 1242a6cb3d01SSakthivel K if (rc) 1243a6cb3d01SSakthivel K return -1; 1244a6cb3d01SSakthivel K 1245a6cb3d01SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1246a6cb3d01SSakthivel K payload.tag = cpu_to_le32(tag); 1247a6cb3d01SSakthivel K 1248a6cb3d01SSakthivel K SASConfigPage.pageCode = SAS_PROTOCOL_TIMER_CONFIG_PAGE; 1249a6cb3d01SSakthivel K SASConfigPage.MST_MSI = 3 << 15; 1250a6cb3d01SSakthivel K SASConfigPage.STP_SSP_MCT_TMO = (STP_MCT_TMO << 16) | SSP_MCT_TMO; 1251a6cb3d01SSakthivel K SASConfigPage.STP_FRM_TMO = (SAS_MAX_OPEN_TIME << 24) | 1252a6cb3d01SSakthivel K (SMP_MAX_CONN_TIMER << 16) | STP_FRM_TIMER; 1253a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = STP_IDLE_TIME; 1254a6cb3d01SSakthivel K 1255a6cb3d01SSakthivel K if (SASConfigPage.STP_IDLE_TMO > 0x3FFFFFF) 1256a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = 0x3FFFFFF; 1257a6cb3d01SSakthivel K 1258a6cb3d01SSakthivel K 1259a6cb3d01SSakthivel K SASConfigPage.OPNRJT_RTRY_INTVL = (SAS_MFD << 16) | 1260a6cb3d01SSakthivel K SAS_OPNRJT_RTRY_INTVL; 1261a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO = (SAS_DOPNRJT_RTRY_TMO << 16) 1262a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_TMO; 1263a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR = (SAS_DOPNRJT_RTRY_THR << 16) 1264a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_THR; 1265a6cb3d01SSakthivel K SASConfigPage.MAX_AIP = SAS_MAX_AIP; 1266a6cb3d01SSakthivel K 12671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.pageCode 0x%08x\n", 12681b5d2793SJoe Perches SASConfigPage.pageCode); 12691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MST_MSI 0x%08x\n", 12701b5d2793SJoe Perches SASConfigPage.MST_MSI); 12711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_SSP_MCT_TMO 0x%08x\n", 12721b5d2793SJoe Perches SASConfigPage.STP_SSP_MCT_TMO); 12731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_FRM_TMO 0x%08x\n", 12741b5d2793SJoe Perches SASConfigPage.STP_FRM_TMO); 12751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.STP_IDLE_TMO 0x%08x\n", 12761b5d2793SJoe Perches SASConfigPage.STP_IDLE_TMO); 12771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.OPNRJT_RTRY_INTVL 0x%08x\n", 12781b5d2793SJoe Perches SASConfigPage.OPNRJT_RTRY_INTVL); 12791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO 0x%08x\n", 12801b5d2793SJoe Perches SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO); 12811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR 0x%08x\n", 12821b5d2793SJoe Perches SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR); 12831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SASConfigPage.MAX_AIP 0x%08x\n", 12841b5d2793SJoe Perches SASConfigPage.MAX_AIP); 1285a6cb3d01SSakthivel K 1286a6cb3d01SSakthivel K memcpy(&payload.cfg_pg, &SASConfigPage, 1287a6cb3d01SSakthivel K sizeof(SASProtocolTimerConfig_t)); 1288a6cb3d01SSakthivel K 128991a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 129091a43fa6Speter chang sizeof(payload), 0); 12915533abcaSTomas Henzl if (rc) 12925533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1293a6cb3d01SSakthivel K 1294a6cb3d01SSakthivel K return rc; 1295a6cb3d01SSakthivel K } 1296a6cb3d01SSakthivel K 1297a6cb3d01SSakthivel K /** 1298f5860992SSakthivel K * pm80xx_get_encrypt_info - Check for encryption 1299f5860992SSakthivel K * @pm8001_ha: our hba card information. 1300f5860992SSakthivel K */ 1301f5860992SSakthivel K static int 1302f5860992SSakthivel K pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha) 1303f5860992SSakthivel K { 1304f5860992SSakthivel K u32 scratch3_value; 1305da225498SRickard Strandqvist int ret = -1; 1306f5860992SSakthivel K 1307f5860992SSakthivel K /* Read encryption status from SCRATCH PAD 3 */ 1308f5860992SSakthivel K scratch3_value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 1309f5860992SSakthivel K 1310f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1311f5860992SSakthivel K SCRATCH_PAD3_ENC_READY) { 1312f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1313f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1314f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1315f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1316f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1317f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1318f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1319f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1320f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1321f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1322f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1323f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0; 13241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13251b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X.Cipher mode 0x%x Sec mode 0x%x status 0x%x\n", 13261b5d2793SJoe Perches scratch3_value, 13271b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1328f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13291b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1330f5860992SSakthivel K ret = 0; 1331f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_READY) == 1332f5860992SSakthivel K SCRATCH_PAD3_ENC_DISABLED) { 13331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 1334f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n", 13351b5d2793SJoe Perches scratch3_value); 1336f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0xFFFFFFFF; 1337f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = 0; 1338f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = 0; 1339da225498SRickard Strandqvist ret = 0; 1340f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1341f5860992SSakthivel K SCRATCH_PAD3_ENC_DIS_ERR) { 1342f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1343f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1344f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1345f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1346f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1347f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1348f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1349f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1350f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1351f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1352f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1353f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1354f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 13551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13561b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 13571b5d2793SJoe Perches scratch3_value, 13581b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1359f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13601b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1361f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1362f5860992SSakthivel K SCRATCH_PAD3_ENC_ENA_ERR) { 1363f5860992SSakthivel K 1364f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1365f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1366f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1367f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1368f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1369f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1370f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1371f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1372f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1373f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1374f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1375f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1376f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1377f5860992SSakthivel K 13781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 13791b5d2793SJoe Perches "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X.Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 13801b5d2793SJoe Perches scratch3_value, 13811b5d2793SJoe Perches pm8001_ha->encrypt_info.cipher_mode, 1382f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 13831b5d2793SJoe Perches pm8001_ha->encrypt_info.status); 1384f5860992SSakthivel K } 1385f5860992SSakthivel K return ret; 1386f5860992SSakthivel K } 1387f5860992SSakthivel K 1388f5860992SSakthivel K /** 1389bb6beabfSRandy Dunlap * pm80xx_encrypt_update - update flash with encryption information 1390f5860992SSakthivel K * @pm8001_ha: our hba card information. 1391f5860992SSakthivel K */ 1392f5860992SSakthivel K static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha) 1393f5860992SSakthivel K { 1394f5860992SSakthivel K struct kek_mgmt_req payload; 1395f5860992SSakthivel K struct inbound_queue_table *circularQ; 1396f5860992SSakthivel K int rc; 1397f5860992SSakthivel K u32 tag; 1398f5860992SSakthivel K u32 opc = OPC_INB_KEK_MANAGEMENT; 1399f5860992SSakthivel K 1400f5860992SSakthivel K memset(&payload, 0, sizeof(struct kek_mgmt_req)); 1401f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1402f5860992SSakthivel K if (rc) 1403f5860992SSakthivel K return -1; 1404f5860992SSakthivel K 1405f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1406f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1407f5860992SSakthivel K /* Currently only one key is used. New KEK index is 1. 1408f5860992SSakthivel K * Current KEK index is 1. Store KEK to NVRAM is 1. 1409f5860992SSakthivel K */ 1410f5860992SSakthivel K payload.new_curidx_ksop = ((1 << 24) | (1 << 16) | (1 << 8) | 1411f5860992SSakthivel K KEK_MGMT_SUBOP_KEYCARDUPDATE); 1412f5860992SSakthivel K 14131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 14147370672dSpeter chang "Saving Encryption info to flash. payload 0x%x\n", 14151b5d2793SJoe Perches payload.new_curidx_ksop); 14167370672dSpeter chang 141791a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 141891a43fa6Speter chang sizeof(payload), 0); 14195533abcaSTomas Henzl if (rc) 14205533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1421f5860992SSakthivel K 1422f5860992SSakthivel K return rc; 1423f5860992SSakthivel K } 1424f5860992SSakthivel K 1425f5860992SSakthivel K /** 1426bb6beabfSRandy Dunlap * pm80xx_chip_init - the main init function that initializes whole PM8001 chip. 1427f5860992SSakthivel K * @pm8001_ha: our hba card information 1428f5860992SSakthivel K */ 1429f5860992SSakthivel K static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha) 1430f5860992SSakthivel K { 1431f5860992SSakthivel K int ret; 1432f5860992SSakthivel K u8 i = 0; 1433f5860992SSakthivel K 1434f5860992SSakthivel K /* check the firmware status */ 1435f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 14361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); 1437f5860992SSakthivel K return -EBUSY; 1438f5860992SSakthivel K } 1439f5860992SSakthivel K 144072349b62SDeepak Ukey /* Initialize the controller fatal error flag */ 144172349b62SDeepak Ukey pm8001_ha->controller_fatal_error = false; 144272349b62SDeepak Ukey 1443f5860992SSakthivel K /* Initialize pci space address eg: mpi offset */ 144495652f98Sakshatzen ret = init_pci_device_addresses(pm8001_ha); 144595652f98Sakshatzen if (ret) { 144695652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 144795652f98Sakshatzen "Failed to init pci addresses"); 144895652f98Sakshatzen return ret; 144995652f98Sakshatzen } 1450f5860992SSakthivel K init_default_table_values(pm8001_ha); 1451f5860992SSakthivel K read_main_config_table(pm8001_ha); 1452f5860992SSakthivel K read_general_status_table(pm8001_ha); 1453f5860992SSakthivel K read_inbnd_queue_table(pm8001_ha); 1454f5860992SSakthivel K read_outbnd_queue_table(pm8001_ha); 1455f5860992SSakthivel K read_phy_attr_table(pm8001_ha); 1456f5860992SSakthivel K 1457f5860992SSakthivel K /* update main config table ,inbound table and outbound table */ 1458f5860992SSakthivel K update_main_config_table(pm8001_ha); 145905c6c029SViswas G for (i = 0; i < pm8001_ha->max_q_num; i++) { 1460f5860992SSakthivel K update_inbnd_queue_table(pm8001_ha, i); 1461f5860992SSakthivel K update_outbnd_queue_table(pm8001_ha, i); 146205c6c029SViswas G } 1463f5860992SSakthivel K /* notify firmware update finished and check initialization status */ 1464f5860992SSakthivel K if (0 == mpi_init_check(pm8001_ha)) { 14651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n"); 1466f5860992SSakthivel K } else 1467f5860992SSakthivel K return -EBUSY; 1468f5860992SSakthivel K 1469a6cb3d01SSakthivel K /* send SAS protocol timer configuration page to FW */ 1470a6cb3d01SSakthivel K ret = pm80xx_set_sas_protocol_timer_config(pm8001_ha); 1471f5860992SSakthivel K 1472f5860992SSakthivel K /* Check for encryption */ 1473f5860992SSakthivel K if (pm8001_ha->chip->encrypt) { 14741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Checking for encryption\n"); 1475f5860992SSakthivel K ret = pm80xx_get_encrypt_info(pm8001_ha); 1476f5860992SSakthivel K if (ret == -1) { 14771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Encryption error !!\n"); 1478f5860992SSakthivel K if (pm8001_ha->encrypt_info.status == 0x81) { 14791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 14801b5d2793SJoe Perches "Encryption enabled with error.Saving encryption key to flash\n"); 1481f5860992SSakthivel K pm80xx_encrypt_update(pm8001_ha); 1482f5860992SSakthivel K } 1483f5860992SSakthivel K } 1484f5860992SSakthivel K } 1485f5860992SSakthivel K return 0; 1486f5860992SSakthivel K } 1487f5860992SSakthivel K 1488f5860992SSakthivel K static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) 1489f5860992SSakthivel K { 1490f5860992SSakthivel K u32 max_wait_count; 1491f5860992SSakthivel K u32 value; 1492f5860992SSakthivel K u32 gst_len_mpistate; 149395652f98Sakshatzen int ret; 149495652f98Sakshatzen 149595652f98Sakshatzen ret = init_pci_device_addresses(pm8001_ha); 149695652f98Sakshatzen if (ret) { 149795652f98Sakshatzen pm8001_dbg(pm8001_ha, FAIL, 149895652f98Sakshatzen "Failed to init pci addresses"); 149995652f98Sakshatzen return ret; 150095652f98Sakshatzen } 150195652f98Sakshatzen 1502f5860992SSakthivel K /* Write bit1=1 to Inbound DoorBell Register to tell the SPC FW the 1503f5860992SSakthivel K table is stop */ 1504f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_RESET); 1505f5860992SSakthivel K 1506f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1507a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 15086f305bf6SIgor Pylypiv max_wait_count = SPCV_DOORBELL_CLEAR_TIMEOUT; 1509a9a923e5SAnand Kumar Santhanam } else { 15106f305bf6SIgor Pylypiv max_wait_count = SPC_DOORBELL_CLEAR_TIMEOUT; 1511a9a923e5SAnand Kumar Santhanam } 1512f5860992SSakthivel K do { 15136f305bf6SIgor Pylypiv msleep(FW_READY_INTERVAL); 1514f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1515f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_RESET; 1516f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1517f5860992SSakthivel K 1518f5860992SSakthivel K if (!max_wait_count) { 15191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=%x\n", value); 1520f5860992SSakthivel K return -1; 1521f5860992SSakthivel K } 1522f5860992SSakthivel K 1523f5860992SSakthivel K /* check the MPI-State for termination in progress */ 1524f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 15256f305bf6SIgor Pylypiv max_wait_count = 100; /* 2 sec for spcv/ve */ 1526f5860992SSakthivel K do { 15276f305bf6SIgor Pylypiv msleep(FW_READY_INTERVAL); 1528f5860992SSakthivel K gst_len_mpistate = 1529f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1530f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1531f5860992SSakthivel K if (GST_MPI_STATE_UNINIT == 1532f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) 1533f5860992SSakthivel K break; 1534f5860992SSakthivel K } while (--max_wait_count); 1535f5860992SSakthivel K if (!max_wait_count) { 15361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n", 15371b5d2793SJoe Perches gst_len_mpistate & GST_MPI_STATE_MASK); 1538f5860992SSakthivel K return -1; 1539f5860992SSakthivel K } 1540f5860992SSakthivel K 1541f5860992SSakthivel K return 0; 1542f5860992SSakthivel K } 1543f5860992SSakthivel K 1544f5860992SSakthivel K /** 1545bb6beabfSRandy Dunlap * pm80xx_fatal_errors - returns non-zero *ONLY* when fatal errors 1546a961ea0aSakshatzen * @pm8001_ha: our hba card information 1547a961ea0aSakshatzen * 1548a961ea0aSakshatzen * Fatal errors are recoverable only after a host reboot. 1549a961ea0aSakshatzen */ 1550a961ea0aSakshatzen int 1551a961ea0aSakshatzen pm80xx_fatal_errors(struct pm8001_hba_info *pm8001_ha) 1552a961ea0aSakshatzen { 1553a961ea0aSakshatzen int ret = 0; 1554a961ea0aSakshatzen u32 scratch_pad_rsvd0 = pm8001_cr32(pm8001_ha, 0, 1555a961ea0aSakshatzen MSGU_HOST_SCRATCH_PAD_6); 1556a961ea0aSakshatzen u32 scratch_pad_rsvd1 = pm8001_cr32(pm8001_ha, 0, 1557a961ea0aSakshatzen MSGU_HOST_SCRATCH_PAD_7); 1558a961ea0aSakshatzen u32 scratch_pad1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1559a961ea0aSakshatzen u32 scratch_pad2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2); 1560a961ea0aSakshatzen u32 scratch_pad3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 1561a961ea0aSakshatzen 1562a961ea0aSakshatzen if (pm8001_ha->chip_id != chip_8006 && 1563a961ea0aSakshatzen pm8001_ha->chip_id != chip_8074 && 1564a961ea0aSakshatzen pm8001_ha->chip_id != chip_8076) { 1565a961ea0aSakshatzen return 0; 1566a961ea0aSakshatzen } 1567a961ea0aSakshatzen 1568a961ea0aSakshatzen if (MSGU_SCRATCHPAD1_STATE_FATAL_ERROR(scratch_pad1)) { 1569a961ea0aSakshatzen pm8001_dbg(pm8001_ha, FAIL, 1570a961ea0aSakshatzen "Fatal error SCRATCHPAD1 = 0x%x SCRATCHPAD2 = 0x%x SCRATCHPAD3 = 0x%x SCRATCHPAD_RSVD0 = 0x%x SCRATCHPAD_RSVD1 = 0x%x\n", 1571a961ea0aSakshatzen scratch_pad1, scratch_pad2, scratch_pad3, 1572a961ea0aSakshatzen scratch_pad_rsvd0, scratch_pad_rsvd1); 1573a961ea0aSakshatzen ret = 1; 1574a961ea0aSakshatzen } 1575a961ea0aSakshatzen 1576a961ea0aSakshatzen return ret; 1577a961ea0aSakshatzen } 1578a961ea0aSakshatzen 1579a961ea0aSakshatzen /** 1580bb6beabfSRandy Dunlap * pm80xx_chip_soft_rst - soft reset the PM8001 chip, so that all 1581bb6beabfSRandy Dunlap * FW register status are reset to the originated status. 1582f5860992SSakthivel K * @pm8001_ha: our hba card information 1583f5860992SSakthivel K */ 1584f5860992SSakthivel K 1585f5860992SSakthivel K static int 1586f5860992SSakthivel K pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha) 1587f5860992SSakthivel K { 1588f5860992SSakthivel K u32 regval; 1589f5860992SSakthivel K u32 bootloader_state; 159006f12f22SAnand Kumar Santhanam u32 ibutton0, ibutton1; 1591f5860992SSakthivel K 159272349b62SDeepak Ukey /* Process MPI table uninitialization only if FW is ready */ 159372349b62SDeepak Ukey if (!pm8001_ha->controller_fatal_error) { 1594f5860992SSakthivel K /* Check if MPI is in ready state to reset */ 1595f5860992SSakthivel K if (mpi_uninit_check(pm8001_ha) != 0) { 1596d384be6eSVikram Auradkar u32 r0 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 1597d384be6eSVikram Auradkar u32 r1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1598d384be6eSVikram Auradkar u32 r2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2); 1599d384be6eSVikram Auradkar u32 r3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 16001b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 1601d384be6eSVikram Auradkar "MPI state is not ready scratch: %x:%x:%x:%x\n", 16021b5d2793SJoe Perches r0, r1, r2, r3); 1603d384be6eSVikram Auradkar /* if things aren't ready but the bootloader is ok then 1604d384be6eSVikram Auradkar * try the reset anyway. 1605d384be6eSVikram Auradkar */ 1606d384be6eSVikram Auradkar if (r1 & SCRATCH_PAD1_BOOTSTATE_MASK) 1607f5860992SSakthivel K return -1; 1608f5860992SSakthivel K } 160972349b62SDeepak Ukey } 1610f5860992SSakthivel K /* checked for reset register normal state; 0x0 */ 1611f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 16121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "reset register before write : 0x%x\n", 16131b5d2793SJoe Perches regval); 1614f5860992SSakthivel K 1615f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE); 16164daf1ef3SVikram Auradkar msleep(500); 1617f5860992SSakthivel K 1618f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 16191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "reset register after write 0x%x\n", 16201b5d2793SJoe Perches regval); 1621f5860992SSakthivel K 1622f5860992SSakthivel K if ((regval & SPCv_SOFT_RESET_READ_MASK) == 1623f5860992SSakthivel K SPCv_SOFT_RESET_NORMAL_RESET_OCCURED) { 16241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16251b5d2793SJoe Perches " soft reset successful [regval: 0x%x]\n", 16261b5d2793SJoe Perches regval); 1627f5860992SSakthivel K } else { 16281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16291b5d2793SJoe Perches " soft reset failed [regval: 0x%x]\n", 16301b5d2793SJoe Perches regval); 1631f5860992SSakthivel K 1632f5860992SSakthivel K /* check bootloader is successfully executed or in HDA mode */ 1633f5860992SSakthivel K bootloader_state = 1634f5860992SSakthivel K pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) & 1635f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_MASK; 1636f5860992SSakthivel K 1637f5860992SSakthivel K if (bootloader_state == SCRATCH_PAD1_BOOTSTATE_HDA_SEEPROM) { 16381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16391b5d2793SJoe Perches "Bootloader state - HDA mode SEEPROM\n"); 1640f5860992SSakthivel K } else if (bootloader_state == 1641f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_BOOTSTRAP) { 16421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16431b5d2793SJoe Perches "Bootloader state - HDA mode Bootstrap Pin\n"); 1644f5860992SSakthivel K } else if (bootloader_state == 1645f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_SOFTRESET) { 16461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16471b5d2793SJoe Perches "Bootloader state - HDA mode soft reset\n"); 1648f5860992SSakthivel K } else if (bootloader_state == 1649f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_CRIT_ERROR) { 16501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 16511b5d2793SJoe Perches "Bootloader state-HDA mode critical error\n"); 1652f5860992SSakthivel K } 1653f5860992SSakthivel K return -EBUSY; 1654f5860992SSakthivel K } 1655f5860992SSakthivel K 1656f5860992SSakthivel K /* check the firmware status after reset */ 1657f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 16581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); 165906f12f22SAnand Kumar Santhanam /* check iButton feature support for motherboard controller */ 166006f12f22SAnand Kumar Santhanam if (pm8001_ha->pdev->subsystem_vendor != 166106f12f22SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2 && 1662faf321b0SBenjamin Rood pm8001_ha->pdev->subsystem_vendor != 1663faf321b0SBenjamin Rood PCI_VENDOR_ID_ATTO && 166406f12f22SAnand Kumar Santhanam pm8001_ha->pdev->subsystem_vendor != 0) { 166506f12f22SAnand Kumar Santhanam ibutton0 = pm8001_cr32(pm8001_ha, 0, 166606f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_6); 166706f12f22SAnand Kumar Santhanam ibutton1 = pm8001_cr32(pm8001_ha, 0, 166806f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_7); 166906f12f22SAnand Kumar Santhanam if (!ibutton0 && !ibutton1) { 16701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 16711b5d2793SJoe Perches "iButton Feature is not Available!!!\n"); 1672f5860992SSakthivel K return -EBUSY; 1673f5860992SSakthivel K } 167406f12f22SAnand Kumar Santhanam if (ibutton0 == 0xdeadbeef && ibutton1 == 0xdeadbeef) { 16751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 16761b5d2793SJoe Perches "CRC Check for iButton Feature Failed!!!\n"); 167706f12f22SAnand Kumar Santhanam return -EBUSY; 167806f12f22SAnand Kumar Santhanam } 167906f12f22SAnand Kumar Santhanam } 168006f12f22SAnand Kumar Santhanam } 16811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SPCv soft reset Complete\n"); 1682f5860992SSakthivel K return 0; 1683f5860992SSakthivel K } 1684f5860992SSakthivel K 1685f5860992SSakthivel K static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha) 1686f5860992SSakthivel K { 1687f5860992SSakthivel K u32 i; 1688f5860992SSakthivel K 16891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "chip reset start\n"); 1690f5860992SSakthivel K 1691f5860992SSakthivel K /* do SPCv chip reset. */ 1692f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11); 16931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n"); 1694f5860992SSakthivel K 1695f5860992SSakthivel K /* Check this ..whether delay is required or no */ 1696f5860992SSakthivel K /* delay 10 usec */ 1697f5860992SSakthivel K udelay(10); 1698f5860992SSakthivel K 1699f5860992SSakthivel K /* wait for 20 msec until the firmware gets reloaded */ 1700f5860992SSakthivel K i = 20; 1701f5860992SSakthivel K do { 1702f5860992SSakthivel K mdelay(1); 1703f5860992SSakthivel K } while ((--i) != 0); 1704f5860992SSakthivel K 17051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n"); 1706f5860992SSakthivel K } 1707f5860992SSakthivel K 1708f5860992SSakthivel K /** 17097cdaf12eSLee Jones * pm80xx_chip_intx_interrupt_enable - enable PM8001 chip interrupt 1710f5860992SSakthivel K * @pm8001_ha: our hba card information 1711f5860992SSakthivel K */ 1712f5860992SSakthivel K static void 1713f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha) 1714f5860992SSakthivel K { 1715f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); 1716f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); 1717f5860992SSakthivel K } 1718f5860992SSakthivel K 1719f5860992SSakthivel K /** 17207cdaf12eSLee Jones * pm80xx_chip_intx_interrupt_disable - disable PM8001 chip interrupt 1721f5860992SSakthivel K * @pm8001_ha: our hba card information 1722f5860992SSakthivel K */ 1723f5860992SSakthivel K static void 1724f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha) 1725f5860992SSakthivel K { 1726f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL); 1727f5860992SSakthivel K } 1728f5860992SSakthivel K 1729f5860992SSakthivel K /** 17307cdaf12eSLee Jones * pm80xx_chip_interrupt_enable - enable PM8001 chip interrupt 1731f5860992SSakthivel K * @pm8001_ha: our hba card information 17326ad4a517SLee Jones * @vec: interrupt number to enable 1733f5860992SSakthivel K */ 1734f5860992SSakthivel K static void 1735f5860992SSakthivel K pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1736f5860992SSakthivel K { 1737f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1738f5860992SSakthivel K u32 mask; 1739f5860992SSakthivel K mask = (u32)(1 << vec); 1740f5860992SSakthivel K 1741f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF)); 1742f5860992SSakthivel K return; 1743f5860992SSakthivel K #endif 1744f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(pm8001_ha); 1745f5860992SSakthivel K 1746f5860992SSakthivel K } 1747f5860992SSakthivel K 1748f5860992SSakthivel K /** 17497cdaf12eSLee Jones * pm80xx_chip_interrupt_disable - disable PM8001 chip interrupt 1750f5860992SSakthivel K * @pm8001_ha: our hba card information 17516ad4a517SLee Jones * @vec: interrupt number to disable 1752f5860992SSakthivel K */ 1753f5860992SSakthivel K static void 1754f5860992SSakthivel K pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1755f5860992SSakthivel K { 1756f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1757f5860992SSakthivel K u32 mask; 1758f5860992SSakthivel K if (vec == 0xFF) 1759f5860992SSakthivel K mask = 0xFFFFFFFF; 1760f5860992SSakthivel K else 1761f5860992SSakthivel K mask = (u32)(1 << vec); 1762f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF)); 1763f5860992SSakthivel K return; 1764f5860992SSakthivel K #endif 1765f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(pm8001_ha); 1766f5860992SSakthivel K } 1767f5860992SSakthivel K 1768c6b9ef57SSakthivel K static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha, 1769c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1770c6b9ef57SSakthivel K { 1771c6b9ef57SSakthivel K int res; 1772c6b9ef57SSakthivel K u32 ccb_tag; 1773c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1774c6b9ef57SSakthivel K struct sas_task *task = NULL; 1775c6b9ef57SSakthivel K struct task_abort_req task_abort; 1776c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1777c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_ABORT; 1778c6b9ef57SSakthivel K int ret; 1779c6b9ef57SSakthivel K 1780c6b9ef57SSakthivel K if (!pm8001_ha_dev) { 17811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "dev is null\n"); 1782c6b9ef57SSakthivel K return; 1783c6b9ef57SSakthivel K } 1784c6b9ef57SSakthivel K 1785c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1786c6b9ef57SSakthivel K 1787c6b9ef57SSakthivel K if (!task) { 17881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task\n"); 1789c6b9ef57SSakthivel K return; 1790c6b9ef57SSakthivel K } 1791c6b9ef57SSakthivel K 1792c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1793c6b9ef57SSakthivel K 1794c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 17955533abcaSTomas Henzl if (res) { 17965533abcaSTomas Henzl sas_free_task(task); 1797c6b9ef57SSakthivel K return; 17985533abcaSTomas Henzl } 1799c6b9ef57SSakthivel K 1800c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1801c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1802c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1803c6b9ef57SSakthivel K ccb->task = task; 1804c6b9ef57SSakthivel K 1805c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1806c6b9ef57SSakthivel K 1807c6b9ef57SSakthivel K memset(&task_abort, 0, sizeof(task_abort)); 1808c6b9ef57SSakthivel K task_abort.abort_all = cpu_to_le32(1); 1809c6b9ef57SSakthivel K task_abort.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1810c6b9ef57SSakthivel K task_abort.tag = cpu_to_le32(ccb_tag); 1811c6b9ef57SSakthivel K 181291a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 181391a43fa6Speter chang sizeof(task_abort), 0); 18141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Executing abort task end\n"); 18155533abcaSTomas Henzl if (ret) { 18165533abcaSTomas Henzl sas_free_task(task); 18175533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18185533abcaSTomas Henzl } 1819c6b9ef57SSakthivel K } 1820c6b9ef57SSakthivel K 1821c6b9ef57SSakthivel K static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha, 1822c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1823c6b9ef57SSakthivel K { 1824c6b9ef57SSakthivel K struct sata_start_req sata_cmd; 1825c6b9ef57SSakthivel K int res; 1826c6b9ef57SSakthivel K u32 ccb_tag; 1827c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1828c6b9ef57SSakthivel K struct sas_task *task = NULL; 1829c6b9ef57SSakthivel K struct host_to_dev_fis fis; 1830c6b9ef57SSakthivel K struct domain_device *dev; 1831c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1832c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 1833c6b9ef57SSakthivel K 1834c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1835c6b9ef57SSakthivel K 1836c6b9ef57SSakthivel K if (!task) { 18371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate task !!!\n"); 1838c6b9ef57SSakthivel K return; 1839c6b9ef57SSakthivel K } 1840c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1841c6b9ef57SSakthivel K 1842c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 1843c6b9ef57SSakthivel K if (res) { 18445533abcaSTomas Henzl sas_free_task(task); 18451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "cannot allocate tag !!!\n"); 1846c6b9ef57SSakthivel K return; 1847c6b9ef57SSakthivel K } 1848c6b9ef57SSakthivel K 1849c6b9ef57SSakthivel K /* allocate domain device by ourselves as libsas 1850c6b9ef57SSakthivel K * is not going to provide any 1851c6b9ef57SSakthivel K */ 1852c6b9ef57SSakthivel K dev = kzalloc(sizeof(struct domain_device), GFP_ATOMIC); 1853c6b9ef57SSakthivel K if (!dev) { 18545533abcaSTomas Henzl sas_free_task(task); 18555533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 18571b5d2793SJoe Perches "Domain device cannot be allocated\n"); 1858c6b9ef57SSakthivel K return; 18595533abcaSTomas Henzl } 18605533abcaSTomas Henzl 1861c6b9ef57SSakthivel K task->dev = dev; 1862c6b9ef57SSakthivel K task->dev->lldd_dev = pm8001_ha_dev; 1863c6b9ef57SSakthivel K 1864c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1865c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1866c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1867c6b9ef57SSakthivel K ccb->task = task; 18680b6df110SViswas G ccb->n_elem = 0; 1869c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_READ_LOG_FLAG; 1870c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_2ND_RLE_FLAG; 1871c6b9ef57SSakthivel K 1872c6b9ef57SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 1873c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1874c6b9ef57SSakthivel K 1875c6b9ef57SSakthivel K /* construct read log FIS */ 1876c6b9ef57SSakthivel K memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1877c6b9ef57SSakthivel K fis.fis_type = 0x27; 1878c6b9ef57SSakthivel K fis.flags = 0x80; 1879c6b9ef57SSakthivel K fis.command = ATA_CMD_READ_LOG_EXT; 1880c6b9ef57SSakthivel K fis.lbal = 0x10; 1881c6b9ef57SSakthivel K fis.sector_count = 0x1; 1882c6b9ef57SSakthivel K 1883c6b9ef57SSakthivel K sata_cmd.tag = cpu_to_le32(ccb_tag); 1884c6b9ef57SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 18851a37b673SDamien Le Moal sata_cmd.ncqtag_atap_dir_m_dad = cpu_to_le32(((0x1 << 7) | (0x5 << 9))); 1886c6b9ef57SSakthivel K memcpy(&sata_cmd.sata_fis, &fis, sizeof(struct host_to_dev_fis)); 1887c6b9ef57SSakthivel K 188891a43fa6Speter chang res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 188991a43fa6Speter chang sizeof(sata_cmd), 0); 18901b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Executing read log end\n"); 18915533abcaSTomas Henzl if (res) { 18925533abcaSTomas Henzl sas_free_task(task); 18935533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 18945533abcaSTomas Henzl kfree(dev); 18955533abcaSTomas Henzl } 1896c6b9ef57SSakthivel K } 1897c6b9ef57SSakthivel K 1898f5860992SSakthivel K /** 1899f5860992SSakthivel K * mpi_ssp_completion - process the event that FW response to the SSP request. 1900f5860992SSakthivel K * @pm8001_ha: our hba card information 1901f5860992SSakthivel K * @piomb: the message contents of this outbound message. 1902f5860992SSakthivel K * 1903f5860992SSakthivel K * When FW has completed a ssp request for example a IO request, after it has 1904bb6beabfSRandy Dunlap * filled the SG data with the data, it will trigger this event representing 1905bb6beabfSRandy Dunlap * that he has finished the job; please check the corresponding buffer. 1906f5860992SSakthivel K * So we will tell the caller who maybe waiting the result to tell upper layer 1907f5860992SSakthivel K * that the task has been finished. 1908f5860992SSakthivel K */ 1909f5860992SSakthivel K static void 1910f5860992SSakthivel K mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 1911f5860992SSakthivel K { 1912f5860992SSakthivel K struct sas_task *t; 1913f5860992SSakthivel K struct pm8001_ccb_info *ccb; 1914f5860992SSakthivel K unsigned long flags; 1915f5860992SSakthivel K u32 status; 1916f5860992SSakthivel K u32 param; 1917f5860992SSakthivel K u32 tag; 1918f5860992SSakthivel K struct ssp_completion_resp *psspPayload; 1919f5860992SSakthivel K struct task_status_struct *ts; 1920f5860992SSakthivel K struct ssp_response_iu *iu; 1921f5860992SSakthivel K struct pm8001_device *pm8001_dev; 1922f5860992SSakthivel K psspPayload = (struct ssp_completion_resp *)(piomb + 4); 1923f5860992SSakthivel K status = le32_to_cpu(psspPayload->status); 1924f5860992SSakthivel K tag = le32_to_cpu(psspPayload->tag); 1925f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 1926f5860992SSakthivel K if ((status == IO_ABORTED) && ccb->open_retry) { 1927f5860992SSakthivel K /* Being completed by another */ 1928f5860992SSakthivel K ccb->open_retry = 0; 1929f5860992SSakthivel K return; 1930f5860992SSakthivel K } 1931f5860992SSakthivel K pm8001_dev = ccb->device; 1932f5860992SSakthivel K param = le32_to_cpu(psspPayload->param); 1933f5860992SSakthivel K t = ccb->task; 1934f5860992SSakthivel K 1935f5860992SSakthivel K if (status && status != IO_UNDERFLOW) 19361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status); 1937f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 1938f5860992SSakthivel K return; 1939f5860992SSakthivel K ts = &t->task_status; 19407370672dSpeter chang 19411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 19421b5d2793SJoe Perches "tag::0x%x, status::0x%x task::0x%p\n", tag, status, t); 19437370672dSpeter chang 1944cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 1945cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 1946cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) 19471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n", 19481b5d2793SJoe Perches SAS_ADDR(t->dev->sas_addr)); 1949cb269c26SAnand Kumar Santhanam 1950f5860992SSakthivel K switch (status) { 1951f5860992SSakthivel K case IO_SUCCESS: 19521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS ,param = 0x%x\n", 19531b5d2793SJoe Perches param); 1954f5860992SSakthivel K if (param == 0) { 1955f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1956d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_GOOD; 1957f5860992SSakthivel K } else { 1958f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1959f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 1960f5860992SSakthivel K ts->residual = param; 1961f5860992SSakthivel K iu = &psspPayload->ssp_resp_iu; 1962f5860992SSakthivel K sas_ssp_task_response(pm8001_ha->dev, t, iu); 1963f5860992SSakthivel K } 1964f5860992SSakthivel K if (pm8001_dev) 19654a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1966f5860992SSakthivel K break; 1967f5860992SSakthivel K case IO_ABORTED: 19681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); 1969f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1970f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 19714a2efd4bSViswas G if (pm8001_dev) 19724a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1973f5860992SSakthivel K break; 1974f5860992SSakthivel K case IO_UNDERFLOW: 1975f5860992SSakthivel K /* SSP Completion with error */ 19761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW ,param = 0x%x\n", 19771b5d2793SJoe Perches param); 1978f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1979f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 1980f5860992SSakthivel K ts->residual = param; 1981f5860992SSakthivel K if (pm8001_dev) 19824a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1983f5860992SSakthivel K break; 1984f5860992SSakthivel K case IO_NO_DEVICE: 19851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 1986f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1987f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 19884a2efd4bSViswas G if (pm8001_dev) 19894a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1990f5860992SSakthivel K break; 1991f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 19921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 1993f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1994f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1995f5860992SSakthivel K /* Force the midlayer to retry */ 1996f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 19974a2efd4bSViswas G if (pm8001_dev) 19984a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 1999f5860992SSakthivel K break; 2000f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 20011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2002f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2003f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2004f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20054a2efd4bSViswas G if (pm8001_dev) 20064a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2007f5860992SSakthivel K break; 200827ecfa5eSViswas G case IO_XFER_ERROR_INVALID_SSP_RSP_FRAME: 20091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20101b5d2793SJoe Perches "IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n"); 201127ecfa5eSViswas G ts->resp = SAS_TASK_COMPLETE; 201227ecfa5eSViswas G ts->stat = SAS_OPEN_REJECT; 201327ecfa5eSViswas G ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20144a2efd4bSViswas G if (pm8001_dev) 20154a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 201627ecfa5eSViswas G break; 2017f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 20181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20191b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2020f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2021f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2022f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 20234a2efd4bSViswas G if (pm8001_dev) 20244a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2025f5860992SSakthivel K break; 2026f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 20271b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20281b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2029f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2030f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2031f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 20324a2efd4bSViswas G if (pm8001_dev) 20334a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2034f5860992SSakthivel K break; 2035f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 20361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2037f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2038f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2039f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20404a2efd4bSViswas G if (pm8001_dev) 20414a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2042f5860992SSakthivel K break; 2043f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2044a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2045a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2046a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2047a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2048a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 20491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2050f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2051f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2052f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2053f5860992SSakthivel K if (!t->uldd_task) 2054f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2055f5860992SSakthivel K pm8001_dev, 2056f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2057f5860992SSakthivel K break; 2058f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 20591b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20601b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2061f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2062f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2063f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 20644a2efd4bSViswas G if (pm8001_dev) 20654a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2066f5860992SSakthivel K break; 2067f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 20681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20691b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2070f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2071f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2072f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 20734a2efd4bSViswas G if (pm8001_dev) 20744a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2075f5860992SSakthivel K break; 2076f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 20771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 20781b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2079f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2080f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2081f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 20824a2efd4bSViswas G if (pm8001_dev) 20834a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2084f5860992SSakthivel K break; 2085f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 20861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2087f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2088f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2089f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 20904a2efd4bSViswas G if (pm8001_dev) 20914a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2092f5860992SSakthivel K break; 2093f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 20941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2095f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2096f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 20974a2efd4bSViswas G if (pm8001_dev) 20984a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2099f5860992SSakthivel K break; 2100f5860992SSakthivel K case IO_XFER_ERROR_DMA: 21011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); 2102f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2103f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21044a2efd4bSViswas G if (pm8001_dev) 21054a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2106f5860992SSakthivel K break; 2107f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 21081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2109f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2110f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2111f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 21124a2efd4bSViswas G if (pm8001_dev) 21134a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2114f5860992SSakthivel K break; 2115f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 21161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2117f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2118f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21194a2efd4bSViswas G if (pm8001_dev) 21204a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2121f5860992SSakthivel K break; 2122f5860992SSakthivel K case IO_PORT_IN_RESET: 21231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 2124f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2125f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21264a2efd4bSViswas G if (pm8001_dev) 21274a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2128f5860992SSakthivel K break; 2129f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 21301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 2131f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2132f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2133f5860992SSakthivel K if (!t->uldd_task) 2134f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2135f5860992SSakthivel K pm8001_dev, 2136f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2137f5860992SSakthivel K break; 2138f5860992SSakthivel K case IO_DS_IN_RECOVERY: 21391b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 2140f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2141f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21424a2efd4bSViswas G if (pm8001_dev) 21434a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2144f5860992SSakthivel K break; 2145f5860992SSakthivel K case IO_TM_TAG_NOT_FOUND: 21461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n"); 2147f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2148f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21494a2efd4bSViswas G if (pm8001_dev) 21504a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2151f5860992SSakthivel K break; 2152f5860992SSakthivel K case IO_SSP_EXT_IU_ZERO_LEN_ERROR: 21531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"); 2154f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2155f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21564a2efd4bSViswas G if (pm8001_dev) 21574a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2158f5860992SSakthivel K break; 2159f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 21601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 21611b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 2162f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2163f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2164f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 21654a2efd4bSViswas G if (pm8001_dev) 21664a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2167f5860992SSakthivel K break; 2168f5860992SSakthivel K default: 21691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); 2170f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2171f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2172f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 21734a2efd4bSViswas G if (pm8001_dev) 21744a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2175f5860992SSakthivel K break; 2176f5860992SSakthivel K } 21771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "scsi_status = 0x%x\n ", 21781b5d2793SJoe Perches psspPayload->ssp_resp_iu.status); 2179f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2180f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2181f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2182f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2183f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 21841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 21851b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 21861b5d2793SJoe Perches t, status, ts->resp, ts->stat); 2187df7abcaaSJohn Garry pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2188869ddbdcSViswas G if (t->slow_task) 2189869ddbdcSViswas G complete(&t->slow_task->completion); 2190f5860992SSakthivel K } else { 2191f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2192f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2193f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2194f5860992SSakthivel K t->task_done(t); 2195f5860992SSakthivel K } 2196f5860992SSakthivel K } 2197f5860992SSakthivel K 2198f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2199f5860992SSakthivel K static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 2200f5860992SSakthivel K { 2201f5860992SSakthivel K struct sas_task *t; 2202f5860992SSakthivel K unsigned long flags; 2203f5860992SSakthivel K struct task_status_struct *ts; 2204f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2205f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2206f5860992SSakthivel K struct ssp_event_resp *psspPayload = 2207f5860992SSakthivel K (struct ssp_event_resp *)(piomb + 4); 2208f5860992SSakthivel K u32 event = le32_to_cpu(psspPayload->event); 2209f5860992SSakthivel K u32 tag = le32_to_cpu(psspPayload->tag); 2210f5860992SSakthivel K u32 port_id = le32_to_cpu(psspPayload->port_id); 2211f5860992SSakthivel K 2212f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2213f5860992SSakthivel K t = ccb->task; 2214f5860992SSakthivel K pm8001_dev = ccb->device; 2215f5860992SSakthivel K if (event) 22161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event); 2217f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 2218f5860992SSakthivel K return; 2219f5860992SSakthivel K ts = &t->task_status; 22201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", 22211b5d2793SJoe Perches port_id, tag, event); 2222f5860992SSakthivel K switch (event) { 2223f5860992SSakthivel K case IO_OVERFLOW: 22241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 2225f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2226f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2227f5860992SSakthivel K ts->residual = 0; 2228f5860992SSakthivel K if (pm8001_dev) 22294a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2230f5860992SSakthivel K break; 2231f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 22321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2233f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK); 2234f5860992SSakthivel K return; 2235f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 22361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2237f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2238f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2239f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2240f5860992SSakthivel K break; 2241f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 22421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22431b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2244f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2245f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2246f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2247f5860992SSakthivel K break; 2248f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 22491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22501b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2251f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2252f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2253f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2254f5860992SSakthivel K break; 2255f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 22561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2257f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2258f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2259f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2260f5860992SSakthivel K break; 2261f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2262a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2263a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2264a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2265a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2266a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 22671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2268f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2269f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2270f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2271f5860992SSakthivel K if (!t->uldd_task) 2272f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2273f5860992SSakthivel K pm8001_dev, 2274f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2275f5860992SSakthivel K break; 2276f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 22771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22781b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2279f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2280f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2281f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2282f5860992SSakthivel K break; 2283f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 22841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22851b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2286f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2287f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2288f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2289f5860992SSakthivel K break; 2290f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 22911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 22921b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2293f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2294f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2295f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2296f5860992SSakthivel K break; 2297f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 22981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2299f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2300f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2301f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2302f5860992SSakthivel K break; 2303f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 23041b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2305f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2306f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2307f5860992SSakthivel K break; 2308f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 23091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2310f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT); 2311f5860992SSakthivel K return; 2312f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 23131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); 2314f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2315f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2316f5860992SSakthivel K break; 2317f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 23181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); 2319f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2320f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2321f5860992SSakthivel K break; 2322f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 23231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 23241b5d2793SJoe Perches "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); 2325f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2326f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2327f5860992SSakthivel K break; 2328f5860992SSakthivel K case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT: 23291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 23301b5d2793SJoe Perches "IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n"); 2331f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2332f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2333f5860992SSakthivel K break; 2334f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 23351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2336f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2337f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2338f5860992SSakthivel K break; 2339f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 23401b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 23411b5d2793SJoe Perches "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); 2342f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2343f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2344f5860992SSakthivel K break; 2345a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 23461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, 23471b5d2793SJoe Perches "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"); 2348a6cb3d01SSakthivel K /* TBC: used default set values */ 2349a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2350a6cb3d01SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2351a6cb3d01SSakthivel K break; 2352f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 23531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); 2354f5860992SSakthivel K return; 2355f5860992SSakthivel K default: 23561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event); 2357f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2358f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2359f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2360f5860992SSakthivel K break; 2361f5860992SSakthivel K } 2362f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2363f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2364f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2365f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2366f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 23671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 23681b5d2793SJoe Perches "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 23691b5d2793SJoe Perches t, event, ts->resp, ts->stat); 2370f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2371f5860992SSakthivel K } else { 2372f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2373f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2374f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2375f5860992SSakthivel K t->task_done(t); 2376f5860992SSakthivel K } 2377f5860992SSakthivel K } 2378f5860992SSakthivel K 2379f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2380f5860992SSakthivel K static void 2381b27a4053SAjish Koshy mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, 2382b27a4053SAjish Koshy struct outbound_queue_table *circularQ, void *piomb) 2383f5860992SSakthivel K { 2384f5860992SSakthivel K struct sas_task *t; 2385f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2386f5860992SSakthivel K u32 param; 2387f5860992SSakthivel K u32 status; 2388f5860992SSakthivel K u32 tag; 2389cb269c26SAnand Kumar Santhanam int i, j; 2390cb269c26SAnand Kumar Santhanam u8 sata_addr_low[4]; 2391cb269c26SAnand Kumar Santhanam u32 temp_sata_addr_low, temp_sata_addr_hi; 2392cb269c26SAnand Kumar Santhanam u8 sata_addr_hi[4]; 2393f5860992SSakthivel K struct sata_completion_resp *psataPayload; 2394f5860992SSakthivel K struct task_status_struct *ts; 2395f5860992SSakthivel K struct ata_task_resp *resp ; 2396f5860992SSakthivel K u32 *sata_resp; 2397f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2398c6b9ef57SSakthivel K unsigned long flags; 2399f5860992SSakthivel K 2400f5860992SSakthivel K psataPayload = (struct sata_completion_resp *)(piomb + 4); 2401f5860992SSakthivel K status = le32_to_cpu(psataPayload->status); 240260de1a67SIgor Pylypiv param = le32_to_cpu(psataPayload->param); 2403f5860992SSakthivel K tag = le32_to_cpu(psataPayload->tag); 2404f5860992SSakthivel K 2405c6b9ef57SSakthivel K if (!tag) { 24061b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "tag null\n"); 2407c6b9ef57SSakthivel K return; 2408c6b9ef57SSakthivel K } 240960de1a67SIgor Pylypiv 2410f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2411f5860992SSakthivel K t = ccb->task; 2412f5860992SSakthivel K pm8001_dev = ccb->device; 2413c6b9ef57SSakthivel K 2414c6b9ef57SSakthivel K if (t) { 2415c6b9ef57SSakthivel K if (t->dev && (t->dev->lldd_dev)) 2416c6b9ef57SSakthivel K pm8001_dev = t->dev->lldd_dev; 2417c6b9ef57SSakthivel K } else { 24181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task null\n"); 2419c6b9ef57SSakthivel K return; 2420c6b9ef57SSakthivel K } 2421c6b9ef57SSakthivel K 2422c6b9ef57SSakthivel K if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG)) 2423c6b9ef57SSakthivel K && unlikely(!t || !t->lldd_task || !t->dev)) { 24241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); 2425c6b9ef57SSakthivel K return; 2426c6b9ef57SSakthivel K } 2427c6b9ef57SSakthivel K 2428c6b9ef57SSakthivel K ts = &t->task_status; 24297370672dSpeter chang 24304f608fbcSVishakha Channapattan if (status != IO_SUCCESS) { 24314f608fbcSVishakha Channapattan pm8001_dbg(pm8001_ha, FAIL, 24324f608fbcSVishakha Channapattan "IO failed device_id %u status 0x%x tag %d\n", 24334f608fbcSVishakha Channapattan pm8001_dev->device_id, status, tag); 24344f608fbcSVishakha Channapattan } 24357370672dSpeter chang 2436cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 2437cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 2438cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) { 2439cb269c26SAnand Kumar Santhanam if (!((t->dev->parent) && 2440924a3541SJohn Garry (dev_is_expander(t->dev->parent->dev_type)))) { 2441cb269c26SAnand Kumar Santhanam for (i = 0, j = 4; i <= 3 && j <= 7; i++, j++) 2442cb269c26SAnand Kumar Santhanam sata_addr_low[i] = pm8001_ha->sas_addr[j]; 2443cb269c26SAnand Kumar Santhanam for (i = 0, j = 0; i <= 3 && j <= 3; i++, j++) 2444cb269c26SAnand Kumar Santhanam sata_addr_hi[i] = pm8001_ha->sas_addr[j]; 2445cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_low, sata_addr_low, 2446cb269c26SAnand Kumar Santhanam sizeof(sata_addr_low)); 2447cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_hi, sata_addr_hi, 2448cb269c26SAnand Kumar Santhanam sizeof(sata_addr_hi)); 2449cb269c26SAnand Kumar Santhanam temp_sata_addr_hi = (((temp_sata_addr_hi >> 24) & 0xff) 2450cb269c26SAnand Kumar Santhanam |((temp_sata_addr_hi << 8) & 2451cb269c26SAnand Kumar Santhanam 0xff0000) | 2452cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi >> 8) 2453cb269c26SAnand Kumar Santhanam & 0xff00) | 2454cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi << 24) & 2455cb269c26SAnand Kumar Santhanam 0xff000000)); 2456cb269c26SAnand Kumar Santhanam temp_sata_addr_low = ((((temp_sata_addr_low >> 24) 2457cb269c26SAnand Kumar Santhanam & 0xff) | 2458cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 8) 2459cb269c26SAnand Kumar Santhanam & 0xff0000) | 2460cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low >> 8) 2461cb269c26SAnand Kumar Santhanam & 0xff00) | 2462cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 24) 2463cb269c26SAnand Kumar Santhanam & 0xff000000)) + 2464cb269c26SAnand Kumar Santhanam pm8001_dev->attached_phy + 2465cb269c26SAnand Kumar Santhanam 0x10); 24661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 24671b5d2793SJoe Perches "SAS Address of IO Failure Drive:%08x%08x\n", 24681b5d2793SJoe Perches temp_sata_addr_hi, 24691b5d2793SJoe Perches temp_sata_addr_low); 2470f5860992SSakthivel K 2471cb269c26SAnand Kumar Santhanam } else { 24721b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 24731b5d2793SJoe Perches "SAS Address of IO Failure Drive:%016llx\n", 24741b5d2793SJoe Perches SAS_ADDR(t->dev->sas_addr)); 2475cb269c26SAnand Kumar Santhanam } 2476cb269c26SAnand Kumar Santhanam } 2477f5860992SSakthivel K switch (status) { 2478f5860992SSakthivel K case IO_SUCCESS: 24791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); 2480f5860992SSakthivel K if (param == 0) { 2481f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2482d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_GOOD; 2483c6b9ef57SSakthivel K /* check if response is for SEND READ LOG */ 2484c6b9ef57SSakthivel K if (pm8001_dev && 2485c6b9ef57SSakthivel K (pm8001_dev->id & NCQ_READ_LOG_FLAG)) { 2486c6b9ef57SSakthivel K /* set new bit for abort_all */ 2487c6b9ef57SSakthivel K pm8001_dev->id |= NCQ_ABORT_ALL_FLAG; 2488c6b9ef57SSakthivel K /* clear bit for read log */ 2489c6b9ef57SSakthivel K pm8001_dev->id = pm8001_dev->id & 0x7FFFFFFF; 2490c6b9ef57SSakthivel K pm80xx_send_abort_all(pm8001_ha, pm8001_dev); 2491c6b9ef57SSakthivel K /* Free the tag */ 2492c6b9ef57SSakthivel K pm8001_tag_free(pm8001_ha, tag); 2493c6b9ef57SSakthivel K sas_free_task(t); 2494c6b9ef57SSakthivel K return; 2495c6b9ef57SSakthivel K } 2496f5860992SSakthivel K } else { 2497f5860992SSakthivel K u8 len; 2498f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2499f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 2500f5860992SSakthivel K ts->residual = param; 25011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25021b5d2793SJoe Perches "SAS_PROTO_RESPONSE len = %d\n", 25031b5d2793SJoe Perches param); 2504f5860992SSakthivel K sata_resp = &psataPayload->sata_resp[0]; 2505f5860992SSakthivel K resp = (struct ata_task_resp *)ts->buf; 2506f5860992SSakthivel K if (t->ata_task.dma_xfer == 0 && 2507f73bdebdSChristoph Hellwig t->data_dir == DMA_FROM_DEVICE) { 2508f5860992SSakthivel K len = sizeof(struct pio_setup_fis); 25091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25101b5d2793SJoe Perches "PIO read len = %d\n", len); 2511f5860992SSakthivel K } else if (t->ata_task.use_ncq) { 2512f5860992SSakthivel K len = sizeof(struct set_dev_bits_fis); 25131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n", 25141b5d2793SJoe Perches len); 2515f5860992SSakthivel K } else { 2516f5860992SSakthivel K len = sizeof(struct dev_to_host_fis); 25171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "other len = %d\n", 25181b5d2793SJoe Perches len); 2519f5860992SSakthivel K } 2520f5860992SSakthivel K if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) { 2521f5860992SSakthivel K resp->frame_len = len; 2522f5860992SSakthivel K memcpy(&resp->ending_fis[0], sata_resp, len); 2523f5860992SSakthivel K ts->buf_valid_size = sizeof(*resp); 2524f5860992SSakthivel K } else 25251b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25261b5d2793SJoe Perches "response too large\n"); 2527f5860992SSakthivel K } 2528f5860992SSakthivel K if (pm8001_dev) 25294a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2530f5860992SSakthivel K break; 2531f5860992SSakthivel K case IO_ABORTED: 25321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); 2533f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2534f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2535f5860992SSakthivel K if (pm8001_dev) 25364a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2537f5860992SSakthivel K break; 2538f5860992SSakthivel K /* following cases are to do cases */ 2539f5860992SSakthivel K case IO_UNDERFLOW: 2540f5860992SSakthivel K /* SATA Completion with error */ 25411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param); 2542f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2543f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2544f5860992SSakthivel K ts->residual = param; 2545f5860992SSakthivel K if (pm8001_dev) 25464a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2547f5860992SSakthivel K break; 2548f5860992SSakthivel K case IO_NO_DEVICE: 25491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 2550f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2551f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 25524a2efd4bSViswas G if (pm8001_dev) 25534a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2554f5860992SSakthivel K break; 2555f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 25561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2557f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2558f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 25594a2efd4bSViswas G if (pm8001_dev) 25604a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2561f5860992SSakthivel K break; 2562f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 25631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2564f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2565f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2566f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 25674a2efd4bSViswas G if (pm8001_dev) 25684a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2569f5860992SSakthivel K break; 2570f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 25711b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25721b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2573f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2574f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2575f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 25764a2efd4bSViswas G if (pm8001_dev) 25774a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2578f5860992SSakthivel K break; 2579f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 25801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 25811b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2582f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2583f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2584f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 25854a2efd4bSViswas G if (pm8001_dev) 25864a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2587f5860992SSakthivel K break; 2588f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 25891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2590f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2591f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2592f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 25934a2efd4bSViswas G if (pm8001_dev) 25944a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2595f5860992SSakthivel K break; 2596f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2597a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2598a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2599a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2600a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2601a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 26021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2603f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2604f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2605f5860992SSakthivel K if (!t->uldd_task) { 2606f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2607f5860992SSakthivel K pm8001_dev, 2608f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2609f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2610f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2611b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2612b27a4053SAjish Koshy circularQ->lock_flags); 26132b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2614b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2615b27a4053SAjish Koshy circularQ->lock_flags); 2616f5860992SSakthivel K return; 2617f5860992SSakthivel K } 2618f5860992SSakthivel K break; 2619f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 26201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26211b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2622f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2623f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2624f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2625f5860992SSakthivel K if (!t->uldd_task) { 2626f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2627f5860992SSakthivel K pm8001_dev, 2628f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2629f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2630f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2631b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2632b27a4053SAjish Koshy circularQ->lock_flags); 26332b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2634b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2635b27a4053SAjish Koshy circularQ->lock_flags); 2636f5860992SSakthivel K return; 2637f5860992SSakthivel K } 2638f5860992SSakthivel K break; 2639f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 26401b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26411b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2642f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2643f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2644f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 26454a2efd4bSViswas G if (pm8001_dev) 26464a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2647f5860992SSakthivel K break; 2648f5860992SSakthivel K case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY: 26491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26501b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n"); 2651f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2652f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2653f5860992SSakthivel K if (!t->uldd_task) { 2654f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2655f5860992SSakthivel K pm8001_dev, 2656f5860992SSakthivel K IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY); 2657f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2658f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2659b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2660b27a4053SAjish Koshy circularQ->lock_flags); 26612b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2662b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2663b27a4053SAjish Koshy circularQ->lock_flags); 2664f5860992SSakthivel K return; 2665f5860992SSakthivel K } 2666f5860992SSakthivel K break; 2667f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 26681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 26691b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2670f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2671f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2672f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 26734a2efd4bSViswas G if (pm8001_dev) 26744a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2675f5860992SSakthivel K break; 2676f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 26771b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2678f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2679f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 26804a2efd4bSViswas G if (pm8001_dev) 26814a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2682f5860992SSakthivel K break; 2683f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 26841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); 2685f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2686f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 26874a2efd4bSViswas G if (pm8001_dev) 26884a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2689f5860992SSakthivel K break; 2690f5860992SSakthivel K case IO_XFER_ERROR_DMA: 26911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); 2692f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2693f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 26944a2efd4bSViswas G if (pm8001_dev) 26954a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2696f5860992SSakthivel K break; 2697f5860992SSakthivel K case IO_XFER_ERROR_SATA_LINK_TIMEOUT: 26981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"); 2699f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2700f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27014a2efd4bSViswas G if (pm8001_dev) 27024a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2703f5860992SSakthivel K break; 2704f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 27051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); 2706f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2707f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 27084a2efd4bSViswas G if (pm8001_dev) 27094a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2710f5860992SSakthivel K break; 2711f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 27121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2713f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2714f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 27154a2efd4bSViswas G if (pm8001_dev) 27164a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2717f5860992SSakthivel K break; 2718f5860992SSakthivel K case IO_PORT_IN_RESET: 27191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 2720f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2721f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27224a2efd4bSViswas G if (pm8001_dev) 27234a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2724f5860992SSakthivel K break; 2725f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 27261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 2727f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2728f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2729f5860992SSakthivel K if (!t->uldd_task) { 2730f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2731f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2732f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2733f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2734b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2735b27a4053SAjish Koshy circularQ->lock_flags); 27362b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2737b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2738b27a4053SAjish Koshy circularQ->lock_flags); 2739f5860992SSakthivel K return; 2740f5860992SSakthivel K } 2741f5860992SSakthivel K break; 2742f5860992SSakthivel K case IO_DS_IN_RECOVERY: 27431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 2744f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2745f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27464a2efd4bSViswas G if (pm8001_dev) 27474a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2748f5860992SSakthivel K break; 2749f5860992SSakthivel K case IO_DS_IN_ERROR: 27501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n"); 2751f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2752f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2753f5860992SSakthivel K if (!t->uldd_task) { 2754f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2755f5860992SSakthivel K IO_DS_IN_ERROR); 2756f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2757f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2758b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2759b27a4053SAjish Koshy circularQ->lock_flags); 27602b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2761b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2762b27a4053SAjish Koshy circularQ->lock_flags); 2763f5860992SSakthivel K return; 2764f5860992SSakthivel K } 2765f5860992SSakthivel K break; 2766f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 27671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 27681b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 2769f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2770f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2771f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 27724a2efd4bSViswas G if (pm8001_dev) 27734a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 277450acde8eSJohannes Thumshirn break; 2775f5860992SSakthivel K default: 27764f608fbcSVishakha Channapattan pm8001_dbg(pm8001_ha, DEVIO, 27774f608fbcSVishakha Channapattan "Unknown status device_id %u status 0x%x tag %d\n", 27784f608fbcSVishakha Channapattan pm8001_dev->device_id, status, tag); 2779f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2780f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2781f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 27824a2efd4bSViswas G if (pm8001_dev) 27834a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 2784f5860992SSakthivel K break; 2785f5860992SSakthivel K } 2786f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2787f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2788f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2789f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2790f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 27911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 27921b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", 27931b5d2793SJoe Perches t, status, ts->resp, ts->stat); 2794df7abcaaSJohn Garry pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2795ce21c63eSpeter chang if (t->slow_task) 2796ce21c63eSpeter chang complete(&t->slow_task->completion); 27972b01d816SSuresh Thiagarajan } else { 2798f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2799b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, 2800b27a4053SAjish Koshy circularQ->lock_flags); 28012b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2802b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, 2803b27a4053SAjish Koshy circularQ->lock_flags); 2804f5860992SSakthivel K } 2805f5860992SSakthivel K } 2806f5860992SSakthivel K 2807f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2808b27a4053SAjish Koshy static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha, 2809b27a4053SAjish Koshy struct outbound_queue_table *circularQ, void *piomb) 2810f5860992SSakthivel K { 2811f5860992SSakthivel K struct sas_task *t; 2812f5860992SSakthivel K struct task_status_struct *ts; 2813f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2814f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2815f5860992SSakthivel K struct sata_event_resp *psataPayload = 2816f5860992SSakthivel K (struct sata_event_resp *)(piomb + 4); 2817f5860992SSakthivel K u32 event = le32_to_cpu(psataPayload->event); 2818f5860992SSakthivel K u32 tag = le32_to_cpu(psataPayload->tag); 2819f5860992SSakthivel K u32 port_id = le32_to_cpu(psataPayload->port_id); 2820c6b9ef57SSakthivel K u32 dev_id = le32_to_cpu(psataPayload->device_id); 2821f5860992SSakthivel K 2822f5860992SSakthivel K if (event) 28231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event); 2824c6b9ef57SSakthivel K 2825c6b9ef57SSakthivel K /* Check if this is NCQ error */ 2826c6b9ef57SSakthivel K if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) { 2827c6b9ef57SSakthivel K /* find device using device id */ 2828c6b9ef57SSakthivel K pm8001_dev = pm8001_find_dev(pm8001_ha, dev_id); 2829c6b9ef57SSakthivel K /* send read log extension */ 2830c6b9ef57SSakthivel K if (pm8001_dev) 2831c6b9ef57SSakthivel K pm80xx_send_read_log(pm8001_ha, pm8001_dev); 2832f5860992SSakthivel K return; 2833c6b9ef57SSakthivel K } 2834c6b9ef57SSakthivel K 283560de1a67SIgor Pylypiv ccb = &pm8001_ha->ccb_info[tag]; 283660de1a67SIgor Pylypiv t = ccb->task; 283760de1a67SIgor Pylypiv pm8001_dev = ccb->device; 283860de1a67SIgor Pylypiv 2839c6b9ef57SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) { 28401b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); 2841c6b9ef57SSakthivel K return; 2842c6b9ef57SSakthivel K } 2843c6b9ef57SSakthivel K 2844f5860992SSakthivel K ts = &t->task_status; 28451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IOERR, "port_id:0x%x, tag:0x%x, event:0x%x\n", 28461b5d2793SJoe Perches port_id, tag, event); 2847f5860992SSakthivel K switch (event) { 2848f5860992SSakthivel K case IO_OVERFLOW: 28491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 2850f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2851f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2852f5860992SSakthivel K ts->residual = 0; 2853f5860992SSakthivel K break; 2854f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 28551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 2856f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2857f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2858f5860992SSakthivel K break; 2859f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 28601b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 2861f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2862f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2863f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2864f5860992SSakthivel K break; 2865f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 28661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28671b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 2868f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2869f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2870f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2871f5860992SSakthivel K break; 2872f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 28731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 28741b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 2875f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2876f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2877f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2878f5860992SSakthivel K break; 2879f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 28801b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 2881f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2882f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2883f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2884f5860992SSakthivel K break; 2885f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2886a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2887a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2888a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2889a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2890a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 28911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 28921b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 2893f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2894f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2895f5860992SSakthivel K if (!t->uldd_task) { 2896f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2897f5860992SSakthivel K pm8001_dev, 2898f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2899f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2900f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2901f5860992SSakthivel K return; 2902f5860992SSakthivel K } 2903f5860992SSakthivel K break; 2904f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 29051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29061b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 2907f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2908f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2909f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2910f5860992SSakthivel K break; 2911f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 29121b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29131b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 2914f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2915f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2916f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2917f5860992SSakthivel K break; 2918f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 29191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29201b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 2921f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2922f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2923f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2924f5860992SSakthivel K break; 2925f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 29261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); 2927f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2928f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2929f5860992SSakthivel K break; 2930f5860992SSakthivel K case IO_XFER_ERROR_PEER_ABORTED: 29311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n"); 2932f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2933f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2934f5860992SSakthivel K break; 2935f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 29361b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); 2937f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2938f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2939f5860992SSakthivel K break; 2940f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 29411b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 2942f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2943f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2944f5860992SSakthivel K break; 2945f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 29461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); 2947f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2948f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2949f5860992SSakthivel K break; 2950f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 29511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); 2952f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2953f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2954f5860992SSakthivel K break; 2955f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 29561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29571b5d2793SJoe Perches "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); 2958f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2959f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2960f5860992SSakthivel K break; 2961f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 29621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); 2963f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2964f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2965f5860992SSakthivel K break; 2966f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 29671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 29681b5d2793SJoe Perches "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); 2969f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2970f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2971f5860992SSakthivel K break; 2972f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 29731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); 2974f5860992SSakthivel K break; 2975f5860992SSakthivel K case IO_XFER_PIO_SETUP_ERROR: 29761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n"); 2977f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2978f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2979f5860992SSakthivel K break; 2980a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 29811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 29821b5d2793SJoe Perches "IO_XFR_ERROR_INTERNAL_CRC_ERROR\n"); 2983a6cb3d01SSakthivel K /* TBC: used default set values */ 2984a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2985a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2986a6cb3d01SSakthivel K break; 2987a6cb3d01SSakthivel K case IO_XFER_DMA_ACTIVATE_TIMEOUT: 29881b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "IO_XFR_DMA_ACTIVATE_TIMEOUT\n"); 2989a6cb3d01SSakthivel K /* TBC: used default set values */ 2990a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2991a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2992a6cb3d01SSakthivel K break; 2993f5860992SSakthivel K default: 29941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "Unknown status 0x%x\n", event); 2995f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2996f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2997f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2998f5860992SSakthivel K break; 2999f5860992SSakthivel K } 3000f5860992SSakthivel K } 3001f5860992SSakthivel K 3002f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 3003f5860992SSakthivel K static void 3004f5860992SSakthivel K mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 3005f5860992SSakthivel K { 3006f5860992SSakthivel K u32 param, i; 3007f5860992SSakthivel K struct sas_task *t; 3008f5860992SSakthivel K struct pm8001_ccb_info *ccb; 3009f5860992SSakthivel K unsigned long flags; 3010f5860992SSakthivel K u32 status; 3011f5860992SSakthivel K u32 tag; 3012f5860992SSakthivel K struct smp_completion_resp *psmpPayload; 3013f5860992SSakthivel K struct task_status_struct *ts; 3014f5860992SSakthivel K struct pm8001_device *pm8001_dev; 3015f5860992SSakthivel K 3016f5860992SSakthivel K psmpPayload = (struct smp_completion_resp *)(piomb + 4); 3017f5860992SSakthivel K status = le32_to_cpu(psmpPayload->status); 3018f5860992SSakthivel K tag = le32_to_cpu(psmpPayload->tag); 3019f5860992SSakthivel K 3020f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 3021f5860992SSakthivel K param = le32_to_cpu(psmpPayload->param); 3022f5860992SSakthivel K t = ccb->task; 3023f5860992SSakthivel K ts = &t->task_status; 3024f5860992SSakthivel K pm8001_dev = ccb->device; 3025f5860992SSakthivel K if (status) 30261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status); 3027f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 3028f5860992SSakthivel K return; 3029f5860992SSakthivel K 30301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, "tag::0x%x status::0x%x\n", tag, status); 30317370672dSpeter chang 3032f5860992SSakthivel K switch (status) { 3033f5860992SSakthivel K 3034f5860992SSakthivel K case IO_SUCCESS: 30351b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); 3036f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3037d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_GOOD; 3038f5860992SSakthivel K if (pm8001_dev) 30394a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3040f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 30412fe24343SJohn Garry struct scatterlist *sg_resp = &t->smp_task.smp_resp; 30422fe24343SJohn Garry u8 *payload; 30432fe24343SJohn Garry void *to; 30442fe24343SJohn Garry 30451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30461b5d2793SJoe Perches "DIRECT RESPONSE Length:%d\n", 30471b5d2793SJoe Perches param); 30482fe24343SJohn Garry to = kmap_atomic(sg_page(sg_resp)); 30492fe24343SJohn Garry payload = to + sg_resp->offset; 3050f5860992SSakthivel K for (i = 0; i < param; i++) { 30512fe24343SJohn Garry *(payload + i) = psmpPayload->_r_a[i]; 30521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3053f5860992SSakthivel K "SMP Byte%d DMA data 0x%x psmp 0x%x\n", 30542fe24343SJohn Garry i, *(payload + i), 30551b5d2793SJoe Perches psmpPayload->_r_a[i]); 3056f5860992SSakthivel K } 30572fe24343SJohn Garry kunmap_atomic(to); 3058f5860992SSakthivel K } 3059f5860992SSakthivel K break; 3060f5860992SSakthivel K case IO_ABORTED: 30611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n"); 3062f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3063f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 3064f5860992SSakthivel K if (pm8001_dev) 30654a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3066f5860992SSakthivel K break; 3067f5860992SSakthivel K case IO_OVERFLOW: 30681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); 3069f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3070f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 3071f5860992SSakthivel K ts->residual = 0; 3072f5860992SSakthivel K if (pm8001_dev) 30734a2efd4bSViswas G atomic_dec(&pm8001_dev->running_req); 3074f5860992SSakthivel K break; 3075f5860992SSakthivel K case IO_NO_DEVICE: 30761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); 3077f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3078f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 3079f5860992SSakthivel K break; 3080f5860992SSakthivel K case IO_ERROR_HW_TIMEOUT: 30811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n"); 3082f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3083d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_BUSY; 3084f5860992SSakthivel K break; 3085f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 30861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); 3087f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3088d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_BUSY; 3089f5860992SSakthivel K break; 3090f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 30911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); 3092f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3093d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_BUSY; 3094f5860992SSakthivel K break; 3095f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 30961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 30971b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); 3098f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3099f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3100f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3101f5860992SSakthivel K break; 3102f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 31031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31041b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); 3105f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3106f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3107f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3108f5860992SSakthivel K break; 3109f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 31101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); 3111f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3112f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3113f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 3114f5860992SSakthivel K break; 3115f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 3116a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 3117a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 3118a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 3119a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 3120a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 31211b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); 3122f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3123f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3124f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 3125f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 3126f5860992SSakthivel K pm8001_dev, 3127f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 3128f5860992SSakthivel K break; 3129f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 31301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31311b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); 3132f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3133f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3134f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 3135f5860992SSakthivel K break; 3136f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 31371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31381b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); 3139f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3140f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3141f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 3142f5860992SSakthivel K break; 3143f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 31441b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31451b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); 3146f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3147f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3148f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 3149f5860992SSakthivel K break; 3150f5860992SSakthivel K case IO_XFER_ERROR_RX_FRAME: 31511b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n"); 3152f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3153f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3154f5860992SSakthivel K break; 3155f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 31561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); 3157f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3158f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3159f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3160f5860992SSakthivel K break; 3161f5860992SSakthivel K case IO_ERROR_INTERNAL_SMP_RESOURCE: 31621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n"); 3163f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3164f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 3165f5860992SSakthivel K break; 3166f5860992SSakthivel K case IO_PORT_IN_RESET: 31671b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); 3168f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3169f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3170f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3171f5860992SSakthivel K break; 3172f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 31731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); 3174f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3175f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3176f5860992SSakthivel K break; 3177f5860992SSakthivel K case IO_DS_IN_RECOVERY: 31781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); 3179f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3180f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3181f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3182f5860992SSakthivel K break; 3183f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 31841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 31851b5d2793SJoe Perches "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); 3186f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3187f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3188f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3189f5860992SSakthivel K break; 3190f5860992SSakthivel K default: 31911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); 3192f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3193f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3194f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 3195f5860992SSakthivel K break; 3196f5860992SSakthivel K } 3197f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 3198f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 3199f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 3200f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 3201f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 32021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 32031b5d2793SJoe Perches "task 0x%p done with io_status 0x%x resp 0x%xstat 0x%x but aborted by upper layer!\n", 32041b5d2793SJoe Perches t, status, ts->resp, ts->stat); 3205f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3206f5860992SSakthivel K } else { 3207f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 3208f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3209f5860992SSakthivel K mb();/* in order to force CPU ordering */ 3210f5860992SSakthivel K t->task_done(t); 3211f5860992SSakthivel K } 3212f5860992SSakthivel K } 3213f5860992SSakthivel K 3214f5860992SSakthivel K /** 3215bb6beabfSRandy Dunlap * pm80xx_hw_event_ack_req- For PM8001, some events need to acknowledge to FW. 3216f5860992SSakthivel K * @pm8001_ha: our hba card information 3217f5860992SSakthivel K * @Qnum: the outbound queue message number. 3218f5860992SSakthivel K * @SEA: source of event to ack 3219f5860992SSakthivel K * @port_id: port id. 3220f5860992SSakthivel K * @phyId: phy id. 3221f5860992SSakthivel K * @param0: parameter 0. 3222f5860992SSakthivel K * @param1: parameter 1. 3223f5860992SSakthivel K */ 3224f5860992SSakthivel K static void pm80xx_hw_event_ack_req(struct pm8001_hba_info *pm8001_ha, 3225f5860992SSakthivel K u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, u32 param1) 3226f5860992SSakthivel K { 3227f5860992SSakthivel K struct hw_event_ack_req payload; 3228f5860992SSakthivel K u32 opc = OPC_INB_SAS_HW_EVENT_ACK; 3229f5860992SSakthivel K 3230f5860992SSakthivel K struct inbound_queue_table *circularQ; 3231f5860992SSakthivel K 3232f5860992SSakthivel K memset((u8 *)&payload, 0, sizeof(payload)); 3233f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[Qnum]; 3234f5860992SSakthivel K payload.tag = cpu_to_le32(1); 3235f5860992SSakthivel K payload.phyid_sea_portid = cpu_to_le32(((SEA & 0xFFFF) << 8) | 3236f5860992SSakthivel K ((phyId & 0xFF) << 24) | (port_id & 0xFF)); 3237f5860992SSakthivel K payload.param0 = cpu_to_le32(param0); 3238f5860992SSakthivel K payload.param1 = cpu_to_le32(param1); 323991a43fa6Speter chang pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 324091a43fa6Speter chang sizeof(payload), 0); 3241f5860992SSakthivel K } 3242f5860992SSakthivel K 3243f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 3244f5860992SSakthivel K u32 phyId, u32 phy_op); 3245f5860992SSakthivel K 32468414cd80SViswas G static void hw_event_port_recover(struct pm8001_hba_info *pm8001_ha, 32478414cd80SViswas G void *piomb) 32488414cd80SViswas G { 32498414cd80SViswas G struct hw_event_resp *pPayload = (struct hw_event_resp *)(piomb + 4); 32508414cd80SViswas G u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 32518414cd80SViswas G u8 phy_id = (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 32528414cd80SViswas G u32 lr_status_evt_portid = 32538414cd80SViswas G le32_to_cpu(pPayload->lr_status_evt_portid); 32548414cd80SViswas G u8 deviceType = pPayload->sas_identify.dev_type; 32558414cd80SViswas G u8 link_rate = (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 32568414cd80SViswas G struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 32578414cd80SViswas G u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 32588414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 32598414cd80SViswas G 32608414cd80SViswas G if (deviceType == SAS_END_DEVICE) { 32618414cd80SViswas G pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 32628414cd80SViswas G PHY_NOTIFY_ENABLE_SPINUP); 32638414cd80SViswas G } 32648414cd80SViswas G 32658414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 32668414cd80SViswas G pm8001_get_lrate_mode(phy, link_rate); 32678414cd80SViswas G phy->sas_phy.oob_mode = SAS_OOB_MODE; 32688414cd80SViswas G phy->phy_state = PHY_STATE_LINK_UP_SPCV; 32698414cd80SViswas G phy->phy_attached = 1; 32708414cd80SViswas G } 32718414cd80SViswas G 3272f5860992SSakthivel K /** 3273f5860992SSakthivel K * hw_event_sas_phy_up - FW tells me a SAS phy up event. 3274f5860992SSakthivel K * @pm8001_ha: our hba card information 3275f5860992SSakthivel K * @piomb: IO message buffer 3276f5860992SSakthivel K */ 3277f5860992SSakthivel K static void 3278f5860992SSakthivel K hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3279f5860992SSakthivel K { 3280f5860992SSakthivel K struct hw_event_resp *pPayload = 3281f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3282f5860992SSakthivel K u32 lr_status_evt_portid = 3283f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3284f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3285f5860992SSakthivel K 3286f5860992SSakthivel K u8 link_rate = 3287f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3288f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3289f5860992SSakthivel K u8 phy_id = 3290f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3291f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3292f5860992SSakthivel K 3293f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3294f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3295f5860992SSakthivel K unsigned long flags; 3296f5860992SSakthivel K u8 deviceType = pPayload->sas_identify.dev_type; 329708d0a992SAjish Koshy phy->port = port; 329808d0a992SAjish Koshy port->port_id = port_id; 3299f5860992SSakthivel K port->port_state = portstate; 33008414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 33017d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 33021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 33031b5d2793SJoe Perches "portid:%d; phyid:%d; linkrate:%d; portstate:%x; devicetype:%x\n", 33041b5d2793SJoe Perches port_id, phy_id, link_rate, portstate, deviceType); 3305f5860992SSakthivel K 3306f5860992SSakthivel K switch (deviceType) { 3307f5860992SSakthivel K case SAS_PHY_UNUSED: 33081b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "device type no device.\n"); 3309f5860992SSakthivel K break; 3310f5860992SSakthivel K case SAS_END_DEVICE: 33111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "end device.\n"); 3312f5860992SSakthivel K pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 3313f5860992SSakthivel K PHY_NOTIFY_ENABLE_SPINUP); 3314f5860992SSakthivel K port->port_attached = 1; 3315f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3316f5860992SSakthivel K break; 3317f5860992SSakthivel K case SAS_EDGE_EXPANDER_DEVICE: 33181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "expander device.\n"); 3319f5860992SSakthivel K port->port_attached = 1; 3320f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3321f5860992SSakthivel K break; 3322f5860992SSakthivel K case SAS_FANOUT_EXPANDER_DEVICE: 33231b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n"); 3324f5860992SSakthivel K port->port_attached = 1; 3325f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3326f5860992SSakthivel K break; 3327f5860992SSakthivel K default: 33281b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n", 33291b5d2793SJoe Perches deviceType); 3330f5860992SSakthivel K break; 3331f5860992SSakthivel K } 3332f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SAS; 3333f5860992SSakthivel K phy->identify.device_type = deviceType; 3334f5860992SSakthivel K phy->phy_attached = 1; 3335f5860992SSakthivel K if (phy->identify.device_type == SAS_END_DEVICE) 3336f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SSP; 3337f5860992SSakthivel K else if (phy->identify.device_type != SAS_PHY_UNUSED) 3338f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; 3339f5860992SSakthivel K phy->sas_phy.oob_mode = SAS_OOB_MODE; 3340de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE, GFP_ATOMIC); 3341f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3342f5860992SSakthivel K memcpy(phy->frame_rcvd, &pPayload->sas_identify, 3343f5860992SSakthivel K sizeof(struct sas_identify_frame)-4); 3344f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct sas_identify_frame) - 4; 3345f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3346f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3347f5860992SSakthivel K if (pm8001_ha->flags == PM8001F_RUN_TIME) 33484ba9e516SAhmed S. Darwish mdelay(200); /* delay a moment to wait for disk to spin up */ 3349f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3350f5860992SSakthivel K } 3351f5860992SSakthivel K 3352f5860992SSakthivel K /** 3353f5860992SSakthivel K * hw_event_sata_phy_up - FW tells me a SATA phy up event. 3354f5860992SSakthivel K * @pm8001_ha: our hba card information 3355f5860992SSakthivel K * @piomb: IO message buffer 3356f5860992SSakthivel K */ 3357f5860992SSakthivel K static void 3358f5860992SSakthivel K hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3359f5860992SSakthivel K { 3360f5860992SSakthivel K struct hw_event_resp *pPayload = 3361f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3362f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3363f5860992SSakthivel K u32 lr_status_evt_portid = 3364f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3365f5860992SSakthivel K u8 link_rate = 3366f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3367f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3368f5860992SSakthivel K u8 phy_id = 3369f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3370f5860992SSakthivel K 3371f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3372f5860992SSakthivel K 3373f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3374f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3375f5860992SSakthivel K unsigned long flags; 33761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 3377f5860992SSakthivel K "port id %d, phy id %d link_rate %d portstate 0x%x\n", 33781b5d2793SJoe Perches port_id, phy_id, link_rate, portstate); 3379f5860992SSakthivel K 338008d0a992SAjish Koshy phy->port = port; 338108d0a992SAjish Koshy port->port_id = port_id; 3382f5860992SSakthivel K port->port_state = portstate; 33837d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 3384f5860992SSakthivel K port->port_attached = 1; 3385f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3386f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SATA; 3387f5860992SSakthivel K phy->phy_attached = 1; 3388f5860992SSakthivel K phy->sas_phy.oob_mode = SATA_OOB_MODE; 3389de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE, GFP_ATOMIC); 3390f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3391f5860992SSakthivel K memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), 3392f5860992SSakthivel K sizeof(struct dev_to_host_fis)); 3393f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct dev_to_host_fis); 3394f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SATA; 3395aa9f8328SJames Bottomley phy->identify.device_type = SAS_SATA_DEV; 3396f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3397f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3398f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3399f5860992SSakthivel K } 3400f5860992SSakthivel K 3401f5860992SSakthivel K /** 3402f5860992SSakthivel K * hw_event_phy_down - we should notify the libsas the phy is down. 3403f5860992SSakthivel K * @pm8001_ha: our hba card information 3404f5860992SSakthivel K * @piomb: IO message buffer 3405f5860992SSakthivel K */ 3406f5860992SSakthivel K static void 3407f5860992SSakthivel K hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) 3408f5860992SSakthivel K { 3409f5860992SSakthivel K struct hw_event_resp *pPayload = 3410f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3411f5860992SSakthivel K 3412f5860992SSakthivel K u32 lr_status_evt_portid = 3413f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3414f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3415f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3416f5860992SSakthivel K u8 phy_id = 3417f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3418f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3419f5860992SSakthivel K 3420f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3421f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3422869ddbdcSViswas G u32 port_sata = (phy->phy_type & PORT_TYPE_SATA); 3423f5860992SSakthivel K port->port_state = portstate; 3424f5860992SSakthivel K phy->identify.device_type = 0; 3425f5860992SSakthivel K phy->phy_attached = 0; 3426f5860992SSakthivel K switch (portstate) { 3427f5860992SSakthivel K case PORT_VALID: 3428f5860992SSakthivel K break; 3429f5860992SSakthivel K case PORT_INVALID: 34301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n", 34311b5d2793SJoe Perches port_id); 34321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34331b5d2793SJoe Perches " Last phy Down and port invalid\n"); 3434869ddbdcSViswas G if (port_sata) { 34358414cd80SViswas G phy->phy_type = 0; 3436f5860992SSakthivel K port->port_attached = 0; 3437f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3438f5860992SSakthivel K port_id, phy_id, 0, 0); 34398414cd80SViswas G } 34408414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3441f5860992SSakthivel K break; 3442f5860992SSakthivel K case PORT_IN_RESET: 34431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n", 34441b5d2793SJoe Perches port_id); 3445f5860992SSakthivel K break; 3446f5860992SSakthivel K case PORT_NOT_ESTABLISHED: 34471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34481b5d2793SJoe Perches " Phy Down and PORT_NOT_ESTABLISHED\n"); 3449f5860992SSakthivel K port->port_attached = 0; 3450f5860992SSakthivel K break; 3451f5860992SSakthivel K case PORT_LOSTCOMM: 34521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " Phy Down and PORT_LOSTCOMM\n"); 34531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 34541b5d2793SJoe Perches " Last phy Down and port invalid\n"); 3455869ddbdcSViswas G if (port_sata) { 3456f5860992SSakthivel K port->port_attached = 0; 34578414cd80SViswas G phy->phy_type = 0; 3458f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3459f5860992SSakthivel K port_id, phy_id, 0, 0); 34608414cd80SViswas G } 34618414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3462f5860992SSakthivel K break; 3463f5860992SSakthivel K default: 3464f5860992SSakthivel K port->port_attached = 0; 34651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 34661b5d2793SJoe Perches " Phy Down and(default) = 0x%x\n", 34671b5d2793SJoe Perches portstate); 3468f5860992SSakthivel K break; 3469f5860992SSakthivel K 3470f5860992SSakthivel K } 3471121181f3SJohn Garry if (port_sata && (portstate != PORT_IN_RESET)) 3472de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL, 3473cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3474f5860992SSakthivel K } 3475f5860992SSakthivel K 3476f5860992SSakthivel K static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3477f5860992SSakthivel K { 3478f5860992SSakthivel K struct phy_start_resp *pPayload = 3479f5860992SSakthivel K (struct phy_start_resp *)(piomb + 4); 3480f5860992SSakthivel K u32 status = 3481f5860992SSakthivel K le32_to_cpu(pPayload->status); 3482f5860992SSakthivel K u32 phy_id = 3483744798fcSIgor Pylypiv le32_to_cpu(pPayload->phyid) & 0xFF; 3484f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3485f5860992SSakthivel K 34861b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 34871b5d2793SJoe Perches "phy start resp status:0x%x, phyid:0x%x\n", 34881b5d2793SJoe Perches status, phy_id); 3489d1acd81bSAjish Koshy if (status == 0) 3490cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DOWN; 3491d1acd81bSAjish Koshy 3492cd135754SDeepak Ukey if (pm8001_ha->flags == PM8001F_RUN_TIME && 3493e703977bSpeter chang phy->enable_completion != NULL) { 3494f5860992SSakthivel K complete(phy->enable_completion); 3495e703977bSpeter chang phy->enable_completion = NULL; 3496e703977bSpeter chang } 3497f5860992SSakthivel K return 0; 3498f5860992SSakthivel K 3499f5860992SSakthivel K } 3500f5860992SSakthivel K 3501f5860992SSakthivel K /** 3502bb6beabfSRandy Dunlap * mpi_thermal_hw_event - a thermal hw event has come. 3503f5860992SSakthivel K * @pm8001_ha: our hba card information 3504f5860992SSakthivel K * @piomb: IO message buffer 3505f5860992SSakthivel K */ 3506f5860992SSakthivel K static int mpi_thermal_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3507f5860992SSakthivel K { 3508f5860992SSakthivel K struct thermal_hw_event *pPayload = 3509f5860992SSakthivel K (struct thermal_hw_event *)(piomb + 4); 3510f5860992SSakthivel K 3511f5860992SSakthivel K u32 thermal_event = le32_to_cpu(pPayload->thermal_event); 3512f5860992SSakthivel K u32 rht_lht = le32_to_cpu(pPayload->rht_lht); 3513f5860992SSakthivel K 3514f5860992SSakthivel K if (thermal_event & 0x40) { 35151b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 35161b5d2793SJoe Perches "Thermal Event: Local high temperature violated!\n"); 35171b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3518f5860992SSakthivel K "Thermal Event: Measured local high temperature %d\n", 35191b5d2793SJoe Perches ((rht_lht & 0xFF00) >> 8)); 3520f5860992SSakthivel K } 3521f5860992SSakthivel K if (thermal_event & 0x10) { 35221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 35231b5d2793SJoe Perches "Thermal Event: Remote high temperature violated!\n"); 35241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 3525f5860992SSakthivel K "Thermal Event: Measured remote high temperature %d\n", 35261b5d2793SJoe Perches ((rht_lht & 0xFF000000) >> 24)); 3527f5860992SSakthivel K } 3528f5860992SSakthivel K return 0; 3529f5860992SSakthivel K } 3530f5860992SSakthivel K 3531f5860992SSakthivel K /** 3532f5860992SSakthivel K * mpi_hw_event - The hw event has come. 3533f5860992SSakthivel K * @pm8001_ha: our hba card information 3534f5860992SSakthivel K * @piomb: IO message buffer 3535f5860992SSakthivel K */ 3536f5860992SSakthivel K static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3537f5860992SSakthivel K { 35388414cd80SViswas G unsigned long flags, i; 3539f5860992SSakthivel K struct hw_event_resp *pPayload = 3540f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3541f5860992SSakthivel K u32 lr_status_evt_portid = 3542f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3543f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3544f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3545f5860992SSakthivel K u8 phy_id = 3546f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3547f5860992SSakthivel K u16 eventType = 3548f5860992SSakthivel K (u16)((lr_status_evt_portid & 0x00FFFF00) >> 8); 3549f5860992SSakthivel K u8 status = 3550f5860992SSakthivel K (u8)((lr_status_evt_portid & 0x0F000000) >> 24); 3551f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3552f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 35538414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 3554f5860992SSakthivel K struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; 35551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEV, 35561b5d2793SJoe Perches "portid:%d phyid:%d event:0x%x status:0x%x\n", 35571b5d2793SJoe Perches port_id, phy_id, eventType, status); 3558f5860992SSakthivel K 3559f5860992SSakthivel K switch (eventType) { 3560f5860992SSakthivel K 3561f5860992SSakthivel K case HW_EVENT_SAS_PHY_UP: 35621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n"); 3563f5860992SSakthivel K hw_event_sas_phy_up(pm8001_ha, piomb); 3564f5860992SSakthivel K break; 3565f5860992SSakthivel K case HW_EVENT_SATA_PHY_UP: 35661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n"); 3567f5860992SSakthivel K hw_event_sata_phy_up(pm8001_ha, piomb); 3568f5860992SSakthivel K break; 3569f5860992SSakthivel K case HW_EVENT_SATA_SPINUP_HOLD: 35701b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n"); 3571de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD, 3572cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3573f5860992SSakthivel K break; 3574f5860992SSakthivel K case HW_EVENT_PHY_DOWN: 35751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n"); 3576869ddbdcSViswas G hw_event_phy_down(pm8001_ha, piomb); 3577869ddbdcSViswas G if (pm8001_ha->reset_in_progress) { 35781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "Reset in progress\n"); 3579869ddbdcSViswas G return 0; 3580869ddbdcSViswas G } 3581f5860992SSakthivel K phy->phy_attached = 0; 3582cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3583f5860992SSakthivel K break; 3584f5860992SSakthivel K case HW_EVENT_PORT_INVALID: 35851b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n"); 3586f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3587f5860992SSakthivel K phy->phy_attached = 0; 3588de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3589cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3590f5860992SSakthivel K break; 3591f5860992SSakthivel K /* the broadcast change primitive received, tell the LIBSAS this event 3592f5860992SSakthivel K to revalidate the sas domain*/ 3593f5860992SSakthivel K case HW_EVENT_BROADCAST_CHANGE: 35941b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n"); 3595f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE, 3596f5860992SSakthivel K port_id, phy_id, 1, 0); 3597f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3598f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; 3599f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3600de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, 3601cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3602f5860992SSakthivel K break; 3603f5860992SSakthivel K case HW_EVENT_PHY_ERROR: 36041b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n"); 3605f5860992SSakthivel K sas_phy_disconnected(&phy->sas_phy); 3606f5860992SSakthivel K phy->phy_attached = 0; 3607de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR, GFP_ATOMIC); 3608f5860992SSakthivel K break; 3609f5860992SSakthivel K case HW_EVENT_BROADCAST_EXP: 36101b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n"); 3611f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3612f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; 3613f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3614de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, 3615cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3616f5860992SSakthivel K break; 3617f5860992SSakthivel K case HW_EVENT_LINK_ERR_INVALID_DWORD: 36181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36191b5d2793SJoe Perches "HW_EVENT_LINK_ERR_INVALID_DWORD\n"); 3620f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3621f5860992SSakthivel K HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0); 3622f5860992SSakthivel K break; 3623f5860992SSakthivel K case HW_EVENT_LINK_ERR_DISPARITY_ERROR: 36241b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36251b5d2793SJoe Perches "HW_EVENT_LINK_ERR_DISPARITY_ERROR\n"); 3626f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3627f5860992SSakthivel K HW_EVENT_LINK_ERR_DISPARITY_ERROR, 3628f5860992SSakthivel K port_id, phy_id, 0, 0); 3629f5860992SSakthivel K break; 3630f5860992SSakthivel K case HW_EVENT_LINK_ERR_CODE_VIOLATION: 36311b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36321b5d2793SJoe Perches "HW_EVENT_LINK_ERR_CODE_VIOLATION\n"); 3633f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3634f5860992SSakthivel K HW_EVENT_LINK_ERR_CODE_VIOLATION, 3635f5860992SSakthivel K port_id, phy_id, 0, 0); 3636f5860992SSakthivel K break; 3637f5860992SSakthivel K case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH: 36381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36391b5d2793SJoe Perches "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n"); 3640f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3641f5860992SSakthivel K HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH, 3642f5860992SSakthivel K port_id, phy_id, 0, 0); 3643f5860992SSakthivel K break; 3644f5860992SSakthivel K case HW_EVENT_MALFUNCTION: 36451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n"); 3646f5860992SSakthivel K break; 3647f5860992SSakthivel K case HW_EVENT_BROADCAST_SES: 36481b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n"); 3649f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3650f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; 3651f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3652de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, 3653cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3654f5860992SSakthivel K break; 3655f5860992SSakthivel K case HW_EVENT_INBOUND_CRC_ERROR: 36561b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n"); 3657f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3658f5860992SSakthivel K HW_EVENT_INBOUND_CRC_ERROR, 3659f5860992SSakthivel K port_id, phy_id, 0, 0); 3660f5860992SSakthivel K break; 3661f5860992SSakthivel K case HW_EVENT_HARD_RESET_RECEIVED: 36621b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n"); 3663de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_HARD_RESET, GFP_ATOMIC); 3664f5860992SSakthivel K break; 3665f5860992SSakthivel K case HW_EVENT_ID_FRAME_TIMEOUT: 36661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n"); 3667f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3668f5860992SSakthivel K phy->phy_attached = 0; 3669de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3670cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3671f5860992SSakthivel K break; 3672f5860992SSakthivel K case HW_EVENT_LINK_ERR_PHY_RESET_FAILED: 36731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 36741b5d2793SJoe Perches "HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n"); 3675f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3676f5860992SSakthivel K HW_EVENT_LINK_ERR_PHY_RESET_FAILED, 3677f5860992SSakthivel K port_id, phy_id, 0, 0); 3678f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3679f5860992SSakthivel K phy->phy_attached = 0; 3680de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3681cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3682f5860992SSakthivel K break; 3683f5860992SSakthivel K case HW_EVENT_PORT_RESET_TIMER_TMO: 36841b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n"); 3685ee05cb71SAjish Koshy if (!pm8001_ha->phy[phy_id].reset_completion) { 3686869ddbdcSViswas G pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3687869ddbdcSViswas G port_id, phy_id, 0, 0); 3688ee05cb71SAjish Koshy } 3689f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3690f5860992SSakthivel K phy->phy_attached = 0; 3691de6d7547SAhmed S. Darwish sas_notify_port_event(sas_phy, PORTE_LINK_RESET_ERR, 3692cd4e8176SAhmed S. Darwish GFP_ATOMIC); 3693869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3694869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3695869ddbdcSViswas G PORT_RESET_TMO; 3696869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3697869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3698869ddbdcSViswas G } 3699f5860992SSakthivel K break; 3700f5860992SSakthivel K case HW_EVENT_PORT_RECOVERY_TIMER_TMO: 37011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 37021b5d2793SJoe Perches "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"); 3703a6cb3d01SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3704a6cb3d01SSakthivel K HW_EVENT_PORT_RECOVERY_TIMER_TMO, 3705a6cb3d01SSakthivel K port_id, phy_id, 0, 0); 37068414cd80SViswas G for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 37078414cd80SViswas G if (port->wide_port_phymap & (1 << i)) { 37088414cd80SViswas G phy = &pm8001_ha->phy[i]; 3709de6d7547SAhmed S. Darwish sas_notify_phy_event(&phy->sas_phy, 3710cd4e8176SAhmed S. Darwish PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC); 37118414cd80SViswas G port->wide_port_phymap &= ~(1 << i); 37128414cd80SViswas G } 37138414cd80SViswas G } 3714f5860992SSakthivel K break; 3715f5860992SSakthivel K case HW_EVENT_PORT_RECOVER: 37161b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n"); 37178414cd80SViswas G hw_event_port_recover(pm8001_ha, piomb); 3718f5860992SSakthivel K break; 3719f5860992SSakthivel K case HW_EVENT_PORT_RESET_COMPLETE: 37201b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n"); 3721869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3722869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3723869ddbdcSViswas G PORT_RESET_SUCCESS; 3724869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3725869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3726869ddbdcSViswas G } 3727f5860992SSakthivel K break; 3728f5860992SSakthivel K case EVENT_BROADCAST_ASYNCH_EVENT: 37291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n"); 3730f5860992SSakthivel K break; 3731f5860992SSakthivel K default: 37321b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type 0x%x\n", 37331b5d2793SJoe Perches eventType); 3734f5860992SSakthivel K break; 3735f5860992SSakthivel K } 3736f5860992SSakthivel K return 0; 3737f5860992SSakthivel K } 3738f5860992SSakthivel K 3739f5860992SSakthivel K /** 3740f5860992SSakthivel K * mpi_phy_stop_resp - SPCv specific 3741f5860992SSakthivel K * @pm8001_ha: our hba card information 3742f5860992SSakthivel K * @piomb: IO message buffer 3743f5860992SSakthivel K */ 3744f5860992SSakthivel K static int mpi_phy_stop_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3745f5860992SSakthivel K { 3746f5860992SSakthivel K struct phy_stop_resp *pPayload = 3747f5860992SSakthivel K (struct phy_stop_resp *)(piomb + 4); 3748f5860992SSakthivel K u32 status = 3749f5860992SSakthivel K le32_to_cpu(pPayload->status); 3750f5860992SSakthivel K u32 phyid = 3751cd135754SDeepak Ukey le32_to_cpu(pPayload->phyid) & 0xFF; 3752f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phyid]; 37531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "phy:0x%x status:0x%x\n", 37541b5d2793SJoe Perches phyid, status); 3755cd135754SDeepak Ukey if (status == PHY_STOP_SUCCESS || 3756cd135754SDeepak Ukey status == PHY_STOP_ERR_DEVICE_ATTACHED) 3757cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3758f5860992SSakthivel K return 0; 3759f5860992SSakthivel K } 3760f5860992SSakthivel K 3761f5860992SSakthivel K /** 3762f5860992SSakthivel K * mpi_set_controller_config_resp - SPCv specific 3763f5860992SSakthivel K * @pm8001_ha: our hba card information 3764f5860992SSakthivel K * @piomb: IO message buffer 3765f5860992SSakthivel K */ 3766f5860992SSakthivel K static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3767f5860992SSakthivel K void *piomb) 3768f5860992SSakthivel K { 3769f5860992SSakthivel K struct set_ctrl_cfg_resp *pPayload = 3770f5860992SSakthivel K (struct set_ctrl_cfg_resp *)(piomb + 4); 3771f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3772f5860992SSakthivel K u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd); 3773f5860992SSakthivel K 37741b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 3775f5860992SSakthivel K "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n", 37761b5d2793SJoe Perches status, err_qlfr_pgcd); 3777f5860992SSakthivel K 3778f5860992SSakthivel K return 0; 3779f5860992SSakthivel K } 3780f5860992SSakthivel K 3781f5860992SSakthivel K /** 3782f5860992SSakthivel K * mpi_get_controller_config_resp - SPCv specific 3783f5860992SSakthivel K * @pm8001_ha: our hba card information 3784f5860992SSakthivel K * @piomb: IO message buffer 3785f5860992SSakthivel K */ 3786f5860992SSakthivel K static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3787f5860992SSakthivel K void *piomb) 3788f5860992SSakthivel K { 37891b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3790f5860992SSakthivel K 3791f5860992SSakthivel K return 0; 3792f5860992SSakthivel K } 3793f5860992SSakthivel K 3794f5860992SSakthivel K /** 3795f5860992SSakthivel K * mpi_get_phy_profile_resp - SPCv specific 3796f5860992SSakthivel K * @pm8001_ha: our hba card information 3797f5860992SSakthivel K * @piomb: IO message buffer 3798f5860992SSakthivel K */ 3799f5860992SSakthivel K static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3800f5860992SSakthivel K void *piomb) 3801f5860992SSakthivel K { 38021b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3803f5860992SSakthivel K 3804f5860992SSakthivel K return 0; 3805f5860992SSakthivel K } 3806f5860992SSakthivel K 3807f5860992SSakthivel K /** 3808f5860992SSakthivel K * mpi_flash_op_ext_resp - SPCv specific 3809f5860992SSakthivel K * @pm8001_ha: our hba card information 3810f5860992SSakthivel K * @piomb: IO message buffer 3811f5860992SSakthivel K */ 3812f5860992SSakthivel K static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3813f5860992SSakthivel K { 38141b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3815f5860992SSakthivel K 3816f5860992SSakthivel K return 0; 3817f5860992SSakthivel K } 3818f5860992SSakthivel K 3819f5860992SSakthivel K /** 3820f5860992SSakthivel K * mpi_set_phy_profile_resp - SPCv specific 3821f5860992SSakthivel K * @pm8001_ha: our hba card information 3822f5860992SSakthivel K * @piomb: IO message buffer 3823f5860992SSakthivel K */ 3824f5860992SSakthivel K static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3825f5860992SSakthivel K void *piomb) 3826f5860992SSakthivel K { 38279d9c7c20Syuuzheng u32 tag; 382827909407SAnand Kumar Santhanam u8 page_code; 38299d9c7c20Syuuzheng int rc = 0; 383027909407SAnand Kumar Santhanam struct set_phy_profile_resp *pPayload = 383127909407SAnand Kumar Santhanam (struct set_phy_profile_resp *)(piomb + 4); 383227909407SAnand Kumar Santhanam u32 ppc_phyid = le32_to_cpu(pPayload->ppc_phyid); 383327909407SAnand Kumar Santhanam u32 status = le32_to_cpu(pPayload->status); 3834f5860992SSakthivel K 38359d9c7c20Syuuzheng tag = le32_to_cpu(pPayload->tag); 383627909407SAnand Kumar Santhanam page_code = (u8)((ppc_phyid & 0xFF00) >> 8); 383727909407SAnand Kumar Santhanam if (status) { 383827909407SAnand Kumar Santhanam /* status is FAILED */ 38391b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 38401b5d2793SJoe Perches "PhyProfile command failed with status 0x%08X\n", 38411b5d2793SJoe Perches status); 38429d9c7c20Syuuzheng rc = -1; 384327909407SAnand Kumar Santhanam } else { 384427909407SAnand Kumar Santhanam if (page_code != SAS_PHY_ANALOG_SETTINGS_PAGE) { 38451b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Invalid page code 0x%X\n", 38461b5d2793SJoe Perches page_code); 38479d9c7c20Syuuzheng rc = -1; 384827909407SAnand Kumar Santhanam } 384927909407SAnand Kumar Santhanam } 38509d9c7c20Syuuzheng pm8001_tag_free(pm8001_ha, tag); 38519d9c7c20Syuuzheng return rc; 3852f5860992SSakthivel K } 3853f5860992SSakthivel K 3854f5860992SSakthivel K /** 3855f5860992SSakthivel K * mpi_kek_management_resp - SPCv specific 3856f5860992SSakthivel K * @pm8001_ha: our hba card information 3857f5860992SSakthivel K * @piomb: IO message buffer 3858f5860992SSakthivel K */ 3859f5860992SSakthivel K static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha, 3860f5860992SSakthivel K void *piomb) 3861f5860992SSakthivel K { 3862f5860992SSakthivel K struct kek_mgmt_resp *pPayload = (struct kek_mgmt_resp *)(piomb + 4); 3863f5860992SSakthivel K 3864f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3865f5860992SSakthivel K u32 kidx_new_curr_ksop = le32_to_cpu(pPayload->kidx_new_curr_ksop); 3866f5860992SSakthivel K u32 err_qlfr = le32_to_cpu(pPayload->err_qlfr); 3867f5860992SSakthivel K 38681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 3869f5860992SSakthivel K "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n", 38701b5d2793SJoe Perches status, kidx_new_curr_ksop, err_qlfr); 3871f5860992SSakthivel K 3872f5860992SSakthivel K return 0; 3873f5860992SSakthivel K } 3874f5860992SSakthivel K 3875f5860992SSakthivel K /** 3876f5860992SSakthivel K * mpi_dek_management_resp - SPCv specific 3877f5860992SSakthivel K * @pm8001_ha: our hba card information 3878f5860992SSakthivel K * @piomb: IO message buffer 3879f5860992SSakthivel K */ 3880f5860992SSakthivel K static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha, 3881f5860992SSakthivel K void *piomb) 3882f5860992SSakthivel K { 38831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3884f5860992SSakthivel K 3885f5860992SSakthivel K return 0; 3886f5860992SSakthivel K } 3887f5860992SSakthivel K 3888f5860992SSakthivel K /** 3889f5860992SSakthivel K * ssp_coalesced_comp_resp - SPCv specific 3890f5860992SSakthivel K * @pm8001_ha: our hba card information 3891f5860992SSakthivel K * @piomb: IO message buffer 3892f5860992SSakthivel K */ 3893f5860992SSakthivel K static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha, 3894f5860992SSakthivel K void *piomb) 3895f5860992SSakthivel K { 38961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, " pm80xx_addition_functionality\n"); 3897f5860992SSakthivel K 3898f5860992SSakthivel K return 0; 3899f5860992SSakthivel K } 3900f5860992SSakthivel K 3901f5860992SSakthivel K /** 3902f5860992SSakthivel K * process_one_iomb - process one outbound Queue memory block 3903f5860992SSakthivel K * @pm8001_ha: our hba card information 39040aed75fdSJohn Garry * @circularQ: outbound circular queue 3905f5860992SSakthivel K * @piomb: IO message buffer 3906f5860992SSakthivel K */ 3907b27a4053SAjish Koshy static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, 3908b27a4053SAjish Koshy struct outbound_queue_table *circularQ, void *piomb) 3909f5860992SSakthivel K { 3910f5860992SSakthivel K __le32 pHeader = *(__le32 *)piomb; 3911f5860992SSakthivel K u32 opc = (u32)((le32_to_cpu(pHeader)) & 0xFFF); 3912f5860992SSakthivel K 3913f5860992SSakthivel K switch (opc) { 3914f5860992SSakthivel K case OPC_OUB_ECHO: 39151b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n"); 3916f5860992SSakthivel K break; 3917f5860992SSakthivel K case OPC_OUB_HW_EVENT: 39181b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n"); 3919f5860992SSakthivel K mpi_hw_event(pm8001_ha, piomb); 3920f5860992SSakthivel K break; 3921f5860992SSakthivel K case OPC_OUB_THERM_HW_EVENT: 39221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_THERMAL_EVENT\n"); 3923f5860992SSakthivel K mpi_thermal_hw_event(pm8001_ha, piomb); 3924f5860992SSakthivel K break; 3925f5860992SSakthivel K case OPC_OUB_SSP_COMP: 39261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n"); 3927f5860992SSakthivel K mpi_ssp_completion(pm8001_ha, piomb); 3928f5860992SSakthivel K break; 3929f5860992SSakthivel K case OPC_OUB_SMP_COMP: 39301b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n"); 3931f5860992SSakthivel K mpi_smp_completion(pm8001_ha, piomb); 3932f5860992SSakthivel K break; 3933f5860992SSakthivel K case OPC_OUB_LOCAL_PHY_CNTRL: 39341b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n"); 3935f5860992SSakthivel K pm8001_mpi_local_phy_ctl(pm8001_ha, piomb); 3936f5860992SSakthivel K break; 3937f5860992SSakthivel K case OPC_OUB_DEV_REGIST: 39381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n"); 3939f5860992SSakthivel K pm8001_mpi_reg_resp(pm8001_ha, piomb); 3940f5860992SSakthivel K break; 3941f5860992SSakthivel K case OPC_OUB_DEREG_DEV: 39421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "unregister the device\n"); 3943f5860992SSakthivel K pm8001_mpi_dereg_resp(pm8001_ha, piomb); 3944f5860992SSakthivel K break; 3945f5860992SSakthivel K case OPC_OUB_GET_DEV_HANDLE: 39461b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n"); 3947f5860992SSakthivel K break; 3948f5860992SSakthivel K case OPC_OUB_SATA_COMP: 39491b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n"); 3950b27a4053SAjish Koshy mpi_sata_completion(pm8001_ha, circularQ, piomb); 3951f5860992SSakthivel K break; 3952f5860992SSakthivel K case OPC_OUB_SATA_EVENT: 39531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n"); 3954b27a4053SAjish Koshy mpi_sata_event(pm8001_ha, circularQ, piomb); 3955f5860992SSakthivel K break; 3956f5860992SSakthivel K case OPC_OUB_SSP_EVENT: 39571b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n"); 3958f5860992SSakthivel K mpi_ssp_event(pm8001_ha, piomb); 3959f5860992SSakthivel K break; 3960f5860992SSakthivel K case OPC_OUB_DEV_HANDLE_ARRIV: 39611b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n"); 3962f5860992SSakthivel K /*This is for target*/ 3963f5860992SSakthivel K break; 3964f5860992SSakthivel K case OPC_OUB_SSP_RECV_EVENT: 39651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n"); 3966f5860992SSakthivel K /*This is for target*/ 3967f5860992SSakthivel K break; 3968f5860992SSakthivel K case OPC_OUB_FW_FLASH_UPDATE: 39691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n"); 3970f5860992SSakthivel K pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb); 3971f5860992SSakthivel K break; 3972f5860992SSakthivel K case OPC_OUB_GPIO_RESPONSE: 39731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n"); 3974f5860992SSakthivel K break; 3975f5860992SSakthivel K case OPC_OUB_GPIO_EVENT: 39761b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n"); 3977f5860992SSakthivel K break; 3978f5860992SSakthivel K case OPC_OUB_GENERAL_EVENT: 39791b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n"); 3980f5860992SSakthivel K pm8001_mpi_general_event(pm8001_ha, piomb); 3981f5860992SSakthivel K break; 3982f5860992SSakthivel K case OPC_OUB_SSP_ABORT_RSP: 39831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n"); 3984f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3985f5860992SSakthivel K break; 3986f5860992SSakthivel K case OPC_OUB_SATA_ABORT_RSP: 39871b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n"); 3988f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3989f5860992SSakthivel K break; 3990f5860992SSakthivel K case OPC_OUB_SAS_DIAG_MODE_START_END: 39911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 39921b5d2793SJoe Perches "OPC_OUB_SAS_DIAG_MODE_START_END\n"); 3993f5860992SSakthivel K break; 3994f5860992SSakthivel K case OPC_OUB_SAS_DIAG_EXECUTE: 39951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n"); 3996f5860992SSakthivel K break; 3997f5860992SSakthivel K case OPC_OUB_GET_TIME_STAMP: 39981b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n"); 3999f5860992SSakthivel K break; 4000f5860992SSakthivel K case OPC_OUB_SAS_HW_EVENT_ACK: 40011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n"); 4002f5860992SSakthivel K break; 4003f5860992SSakthivel K case OPC_OUB_PORT_CONTROL: 40041b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n"); 4005f5860992SSakthivel K break; 4006f5860992SSakthivel K case OPC_OUB_SMP_ABORT_RSP: 40071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n"); 4008f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 4009f5860992SSakthivel K break; 4010f5860992SSakthivel K case OPC_OUB_GET_NVMD_DATA: 40111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n"); 4012f5860992SSakthivel K pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb); 4013f5860992SSakthivel K break; 4014f5860992SSakthivel K case OPC_OUB_SET_NVMD_DATA: 40151b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n"); 4016f5860992SSakthivel K pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb); 4017f5860992SSakthivel K break; 4018f5860992SSakthivel K case OPC_OUB_DEVICE_HANDLE_REMOVAL: 40191b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n"); 4020f5860992SSakthivel K break; 4021f5860992SSakthivel K case OPC_OUB_SET_DEVICE_STATE: 40221b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n"); 4023f5860992SSakthivel K pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb); 4024f5860992SSakthivel K break; 4025f5860992SSakthivel K case OPC_OUB_GET_DEVICE_STATE: 40261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n"); 4027f5860992SSakthivel K break; 4028f5860992SSakthivel K case OPC_OUB_SET_DEV_INFO: 40291b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n"); 4030f5860992SSakthivel K break; 4031bb6beabfSRandy Dunlap /* spcv specific commands */ 4032f5860992SSakthivel K case OPC_OUB_PHY_START_RESP: 40331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40341b5d2793SJoe Perches "OPC_OUB_PHY_START_RESP opcode:%x\n", opc); 4035f5860992SSakthivel K mpi_phy_start_resp(pm8001_ha, piomb); 4036f5860992SSakthivel K break; 4037f5860992SSakthivel K case OPC_OUB_PHY_STOP_RESP: 40381b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40391b5d2793SJoe Perches "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc); 4040f5860992SSakthivel K mpi_phy_stop_resp(pm8001_ha, piomb); 4041f5860992SSakthivel K break; 4042f5860992SSakthivel K case OPC_OUB_SET_CONTROLLER_CONFIG: 40431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40441b5d2793SJoe Perches "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc); 4045f5860992SSakthivel K mpi_set_controller_config_resp(pm8001_ha, piomb); 4046f5860992SSakthivel K break; 4047f5860992SSakthivel K case OPC_OUB_GET_CONTROLLER_CONFIG: 40481b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40491b5d2793SJoe Perches "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc); 4050f5860992SSakthivel K mpi_get_controller_config_resp(pm8001_ha, piomb); 4051f5860992SSakthivel K break; 4052f5860992SSakthivel K case OPC_OUB_GET_PHY_PROFILE: 40531b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40541b5d2793SJoe Perches "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc); 4055f5860992SSakthivel K mpi_get_phy_profile_resp(pm8001_ha, piomb); 4056f5860992SSakthivel K break; 4057f5860992SSakthivel K case OPC_OUB_FLASH_OP_EXT: 40581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40591b5d2793SJoe Perches "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc); 4060f5860992SSakthivel K mpi_flash_op_ext_resp(pm8001_ha, piomb); 4061f5860992SSakthivel K break; 4062f5860992SSakthivel K case OPC_OUB_SET_PHY_PROFILE: 40631b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40641b5d2793SJoe Perches "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc); 4065f5860992SSakthivel K mpi_set_phy_profile_resp(pm8001_ha, piomb); 4066f5860992SSakthivel K break; 4067f5860992SSakthivel K case OPC_OUB_KEK_MANAGEMENT_RESP: 40681b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40691b5d2793SJoe Perches "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc); 4070f5860992SSakthivel K mpi_kek_management_resp(pm8001_ha, piomb); 4071f5860992SSakthivel K break; 4072f5860992SSakthivel K case OPC_OUB_DEK_MANAGEMENT_RESP: 40731b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40741b5d2793SJoe Perches "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc); 4075f5860992SSakthivel K mpi_dek_management_resp(pm8001_ha, piomb); 4076f5860992SSakthivel K break; 4077f5860992SSakthivel K case OPC_OUB_SSP_COALESCED_COMP_RESP: 40781b5d2793SJoe Perches pm8001_dbg(pm8001_ha, MSG, 40791b5d2793SJoe Perches "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc); 4080f5860992SSakthivel K ssp_coalesced_comp_resp(pm8001_ha, piomb); 4081f5860992SSakthivel K break; 4082f5860992SSakthivel K default: 40831b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 40841b5d2793SJoe Perches "Unknown outbound Queue IOMB OPC = 0x%x\n", opc); 4085f5860992SSakthivel K break; 4086f5860992SSakthivel K } 4087f5860992SSakthivel K } 4088f5860992SSakthivel K 408972349b62SDeepak Ukey static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha) 409072349b62SDeepak Ukey { 40911b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_0: 0x%x\n", 40921b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0)); 40931b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_1:0x%x\n", 40941b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1)); 40951b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_2: 0x%x\n", 40961b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2)); 40971b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_SCRATCH_PAD_3: 0x%x\n", 40981b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3)); 40991b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_0: 0x%x\n", 41001b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0)); 41011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_1: 0x%x\n", 41021b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1)); 41031b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_2: 0x%x\n", 41041b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2)); 41051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_3: 0x%x\n", 41061b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3)); 41071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_4: 0x%x\n", 41081b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4)); 41091b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_HOST_SCRATCH_PAD_5: 0x%x\n", 41101b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5)); 41111b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n", 41121b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6)); 41131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n", 41141b5d2793SJoe Perches pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7)); 411572349b62SDeepak Ukey } 411672349b62SDeepak Ukey 4117f5860992SSakthivel K static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) 4118f5860992SSakthivel K { 4119f5860992SSakthivel K struct outbound_queue_table *circularQ; 4120f5860992SSakthivel K void *pMsg1 = NULL; 41213f649ab7SKees Cook u8 bc; 4122f5860992SSakthivel K u32 ret = MPI_IO_STATUS_FAIL; 412372349b62SDeepak Ukey u32 regval; 4124f5860992SSakthivel K 412562afb379SJohn Garry /* 412662afb379SJohn Garry * Fatal errors are programmed to be signalled in irq vector 412762afb379SJohn Garry * pm8001_ha->max_q_num - 1 through pm8001_ha->main_cfg_tbl.pm80xx_tbl. 412862afb379SJohn Garry * fatal_err_interrupt 412962afb379SJohn Garry */ 413005c6c029SViswas G if (vec == (pm8001_ha->max_q_num - 1)) { 413162afb379SJohn Garry u32 mipsall_ready; 413262afb379SJohn Garry 413362afb379SJohn Garry if (pm8001_ha->chip_id == chip_8008 || 413462afb379SJohn Garry pm8001_ha->chip_id == chip_8009) 413562afb379SJohn Garry mipsall_ready = SCRATCH_PAD_MIPSALL_READY_8PORT; 413662afb379SJohn Garry else 413762afb379SJohn Garry mipsall_ready = SCRATCH_PAD_MIPSALL_READY_16PORT; 413862afb379SJohn Garry 413972349b62SDeepak Ukey regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 414062afb379SJohn Garry if ((regval & mipsall_ready) != mipsall_ready) { 414172349b62SDeepak Ukey pm8001_ha->controller_fatal_error = true; 41421b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 41431b5d2793SJoe Perches "Firmware Fatal error! Regval:0x%x\n", 41441b5d2793SJoe Perches regval); 41454f5deeb4SRuksar Devadi pm8001_handle_event(pm8001_ha, NULL, IO_FATAL_ERROR); 414672349b62SDeepak Ukey print_scratchpad_registers(pm8001_ha); 414772349b62SDeepak Ukey return ret; 414872349b62SDeepak Ukey } 414972349b62SDeepak Ukey } 4150f5860992SSakthivel K circularQ = &pm8001_ha->outbnd_q_tbl[vec]; 4151b27a4053SAjish Koshy spin_lock_irqsave(&circularQ->oq_lock, circularQ->lock_flags); 4152f5860992SSakthivel K do { 415372349b62SDeepak Ukey /* spurious interrupt during setup if kexec-ing and 415472349b62SDeepak Ukey * driver doing a doorbell access w/ the pre-kexec oq 415572349b62SDeepak Ukey * interrupt setup. 415672349b62SDeepak Ukey */ 415772349b62SDeepak Ukey if (!circularQ->pi_virt) 415872349b62SDeepak Ukey break; 4159f5860992SSakthivel K ret = pm8001_mpi_msg_consume(pm8001_ha, circularQ, &pMsg1, &bc); 4160f5860992SSakthivel K if (MPI_IO_STATUS_SUCCESS == ret) { 4161f5860992SSakthivel K /* process the outbound message */ 4162b27a4053SAjish Koshy process_one_iomb(pm8001_ha, circularQ, 4163b27a4053SAjish Koshy (void *)(pMsg1 - 4)); 4164f5860992SSakthivel K /* free the message from the outbound circular buffer */ 4165f5860992SSakthivel K pm8001_mpi_msg_free_set(pm8001_ha, pMsg1, 4166f5860992SSakthivel K circularQ, bc); 4167f5860992SSakthivel K } 4168f5860992SSakthivel K if (MPI_IO_STATUS_BUSY == ret) { 4169f5860992SSakthivel K /* Update the producer index from SPC */ 4170f5860992SSakthivel K circularQ->producer_index = 4171f5860992SSakthivel K cpu_to_le32(pm8001_read_32(circularQ->pi_virt)); 4172f5860992SSakthivel K if (le32_to_cpu(circularQ->producer_index) == 4173f5860992SSakthivel K circularQ->consumer_idx) 4174f5860992SSakthivel K /* OQ is empty */ 4175f5860992SSakthivel K break; 4176f5860992SSakthivel K } 4177f5860992SSakthivel K } while (1); 4178b27a4053SAjish Koshy spin_unlock_irqrestore(&circularQ->oq_lock, circularQ->lock_flags); 4179f5860992SSakthivel K return ret; 4180f5860992SSakthivel K } 4181f5860992SSakthivel K 4182f73bdebdSChristoph Hellwig /* DMA_... to our direction translation. */ 4183f5860992SSakthivel K static const u8 data_dir_flags[] = { 4184f73bdebdSChristoph Hellwig [DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT, /* UNSPECIFIED */ 4185f73bdebdSChristoph Hellwig [DMA_TO_DEVICE] = DATA_DIR_OUT, /* OUTBOUND */ 4186f73bdebdSChristoph Hellwig [DMA_FROM_DEVICE] = DATA_DIR_IN, /* INBOUND */ 4187f73bdebdSChristoph Hellwig [DMA_NONE] = DATA_DIR_NONE, /* NO TRANSFER */ 4188f5860992SSakthivel K }; 4189f5860992SSakthivel K 4190f5860992SSakthivel K static void build_smp_cmd(u32 deviceID, __le32 hTag, 4191f5860992SSakthivel K struct smp_req *psmp_cmd, int mode, int length) 4192f5860992SSakthivel K { 4193f5860992SSakthivel K psmp_cmd->tag = hTag; 4194f5860992SSakthivel K psmp_cmd->device_id = cpu_to_le32(deviceID); 4195f5860992SSakthivel K if (mode == SMP_DIRECT) { 4196f5860992SSakthivel K length = length - 4; /* subtract crc */ 4197f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(length << 16); 4198f5860992SSakthivel K } else { 4199f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(1|(1 << 1)); 4200f5860992SSakthivel K } 4201f5860992SSakthivel K } 4202f5860992SSakthivel K 4203f5860992SSakthivel K /** 4204bb6beabfSRandy Dunlap * pm80xx_chip_smp_req - send an SMP task to FW 4205f5860992SSakthivel K * @pm8001_ha: our hba card information. 4206f5860992SSakthivel K * @ccb: the ccb information this request used. 4207f5860992SSakthivel K */ 4208f5860992SSakthivel K static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, 4209f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4210f5860992SSakthivel K { 4211f5860992SSakthivel K int elem, rc; 4212f5860992SSakthivel K struct sas_task *task = ccb->task; 4213f5860992SSakthivel K struct domain_device *dev = task->dev; 4214f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 42152fe24343SJohn Garry struct scatterlist *sg_req, *sg_resp, *smp_req; 4216f5860992SSakthivel K u32 req_len, resp_len; 4217f5860992SSakthivel K struct smp_req smp_cmd; 4218f5860992SSakthivel K u32 opc; 4219f5860992SSakthivel K struct inbound_queue_table *circularQ; 4220f5860992SSakthivel K u32 i, length; 42212fe24343SJohn Garry u8 *payload; 42222fe24343SJohn Garry u8 *to; 4223f5860992SSakthivel K 4224f5860992SSakthivel K memset(&smp_cmd, 0, sizeof(smp_cmd)); 4225f5860992SSakthivel K /* 4226f5860992SSakthivel K * DMA-map SMP request, response buffers 4227f5860992SSakthivel K */ 4228f5860992SSakthivel K sg_req = &task->smp_task.smp_req; 4229f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE); 4230f5860992SSakthivel K if (!elem) 4231f5860992SSakthivel K return -ENOMEM; 4232f5860992SSakthivel K req_len = sg_dma_len(sg_req); 4233f5860992SSakthivel K 4234f5860992SSakthivel K sg_resp = &task->smp_task.smp_resp; 4235f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE); 4236f5860992SSakthivel K if (!elem) { 4237f5860992SSakthivel K rc = -ENOMEM; 4238f5860992SSakthivel K goto err_out; 4239f5860992SSakthivel K } 4240f5860992SSakthivel K resp_len = sg_dma_len(sg_resp); 4241f5860992SSakthivel K /* must be in dwords */ 4242f5860992SSakthivel K if ((req_len & 0x3) || (resp_len & 0x3)) { 4243f5860992SSakthivel K rc = -EINVAL; 4244f5860992SSakthivel K goto err_out_2; 4245f5860992SSakthivel K } 4246f5860992SSakthivel K 4247f5860992SSakthivel K opc = OPC_INB_SMP_REQUEST; 4248f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4249f5860992SSakthivel K smp_cmd.tag = cpu_to_le32(ccb->ccb_tag); 4250f5860992SSakthivel K 4251f5860992SSakthivel K length = sg_req->length; 42521b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP Frame Length %d\n", sg_req->length); 4253f5860992SSakthivel K if (!(length - 8)) 4254f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_DIRECT; 4255f5860992SSakthivel K else 4256f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_INDIRECT; 4257f5860992SSakthivel K 4258f5860992SSakthivel K 42592fe24343SJohn Garry smp_req = &task->smp_task.smp_req; 42602fe24343SJohn Garry to = kmap_atomic(sg_page(smp_req)); 42612fe24343SJohn Garry payload = to + smp_req->offset; 4262f5860992SSakthivel K 4263f5860992SSakthivel K /* INDIRECT MODE command settings. Use DMA */ 4264f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) { 42651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP REQUEST INDIRECT MODE\n"); 4266f5860992SSakthivel K /* for SPCv indirect mode. Place the top 4 bytes of 4267f5860992SSakthivel K * SMP Request header here. */ 4268f5860992SSakthivel K for (i = 0; i < 4; i++) 42692fe24343SJohn Garry smp_cmd.smp_req16[i] = *(payload + i); 4270f5860992SSakthivel K /* exclude top 4 bytes for SMP req header */ 4271f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4272f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4273cb993e5dSAnand Kumar Santhanam (&task->smp_task.smp_req) + 4); 4274f5860992SSakthivel K /* exclude 4 bytes for SMP req header and CRC */ 4275f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4276f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-8); 4277f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4278f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4279f5860992SSakthivel K (&task->smp_task.smp_resp)); 4280f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4281f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len 4282f5860992SSakthivel K (&task->smp_task.smp_resp)-4); 4283f5860992SSakthivel K } else { /* DIRECT MODE */ 4284f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4285f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4286f5860992SSakthivel K (&task->smp_task.smp_req)); 4287f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4288f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-4); 4289f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4290f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4291f5860992SSakthivel K (&task->smp_task.smp_resp)); 4292f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4293f5860992SSakthivel K cpu_to_le32 4294f5860992SSakthivel K ((u32)sg_dma_len(&task->smp_task.smp_resp)-4); 4295f5860992SSakthivel K } 4296f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 42971b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "SMP REQUEST DIRECT MODE\n"); 4298f5860992SSakthivel K for (i = 0; i < length; i++) 4299f5860992SSakthivel K if (i < 16) { 43002fe24343SJohn Garry smp_cmd.smp_req16[i] = *(payload + i); 43011b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4302f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4303f5860992SSakthivel K i, smp_cmd.smp_req16[i], 43042fe24343SJohn Garry *(payload)); 4305f5860992SSakthivel K } else { 43062fe24343SJohn Garry smp_cmd.smp_req[i] = *(payload + i); 43071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4308f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4309f5860992SSakthivel K i, smp_cmd.smp_req[i], 43102fe24343SJohn Garry *(payload)); 4311f5860992SSakthivel K } 4312f5860992SSakthivel K } 43132fe24343SJohn Garry kunmap_atomic(to); 4314f5860992SSakthivel K build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag, 4315f5860992SSakthivel K &smp_cmd, pm8001_ha->smp_exp_mode, length); 431691a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd, 431791a43fa6Speter chang sizeof(smp_cmd), 0); 43185533abcaSTomas Henzl if (rc) 43195533abcaSTomas Henzl goto err_out_2; 4320f5860992SSakthivel K return 0; 4321f5860992SSakthivel K 4322f5860992SSakthivel K err_out_2: 4323f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1, 4324f73bdebdSChristoph Hellwig DMA_FROM_DEVICE); 4325f5860992SSakthivel K err_out: 4326f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1, 4327f73bdebdSChristoph Hellwig DMA_TO_DEVICE); 4328f5860992SSakthivel K return rc; 4329f5860992SSakthivel K } 4330f5860992SSakthivel K 4331f5860992SSakthivel K static int check_enc_sas_cmd(struct sas_task *task) 4332f5860992SSakthivel K { 4333e73823f7SJames Bottomley u8 cmd = task->ssp_task.cmd->cmnd[0]; 4334e73823f7SJames Bottomley 4335e73823f7SJames Bottomley if (cmd == READ_10 || cmd == WRITE_10 || cmd == WRITE_VERIFY) 4336f5860992SSakthivel K return 1; 4337f5860992SSakthivel K else 4338f5860992SSakthivel K return 0; 4339f5860992SSakthivel K } 4340f5860992SSakthivel K 4341f5860992SSakthivel K static int check_enc_sat_cmd(struct sas_task *task) 4342f5860992SSakthivel K { 4343f5860992SSakthivel K int ret = 0; 4344f5860992SSakthivel K switch (task->ata_task.fis.command) { 4345f5860992SSakthivel K case ATA_CMD_FPDMA_READ: 4346f5860992SSakthivel K case ATA_CMD_READ_EXT: 4347f5860992SSakthivel K case ATA_CMD_READ: 4348f5860992SSakthivel K case ATA_CMD_FPDMA_WRITE: 4349f5860992SSakthivel K case ATA_CMD_WRITE_EXT: 4350f5860992SSakthivel K case ATA_CMD_WRITE: 4351f5860992SSakthivel K case ATA_CMD_PIO_READ: 4352f5860992SSakthivel K case ATA_CMD_PIO_READ_EXT: 4353f5860992SSakthivel K case ATA_CMD_PIO_WRITE: 4354f5860992SSakthivel K case ATA_CMD_PIO_WRITE_EXT: 4355f5860992SSakthivel K ret = 1; 4356f5860992SSakthivel K break; 4357f5860992SSakthivel K default: 4358f5860992SSakthivel K ret = 0; 4359f5860992SSakthivel K break; 4360f5860992SSakthivel K } 4361f5860992SSakthivel K return ret; 4362f5860992SSakthivel K } 4363f5860992SSakthivel K 4364f5860992SSakthivel K /** 4365bb6beabfSRandy Dunlap * pm80xx_chip_ssp_io_req - send an SSP task to FW 4366f5860992SSakthivel K * @pm8001_ha: our hba card information. 4367f5860992SSakthivel K * @ccb: the ccb information this request used. 4368f5860992SSakthivel K */ 4369f5860992SSakthivel K static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, 4370f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4371f5860992SSakthivel K { 4372f5860992SSakthivel K struct sas_task *task = ccb->task; 4373f5860992SSakthivel K struct domain_device *dev = task->dev; 4374f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4375f5860992SSakthivel K struct ssp_ini_io_start_req ssp_cmd; 4376f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4377f5860992SSakthivel K int ret; 43780ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 43790ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4380f5860992SSakthivel K struct inbound_queue_table *circularQ; 438105c6c029SViswas G u32 q_index, cpu_id; 4382f5860992SSakthivel K u32 opc = OPC_INB_SSPINIIOSTART; 4383f5860992SSakthivel K memset(&ssp_cmd, 0, sizeof(ssp_cmd)); 4384f5860992SSakthivel K memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); 4385f5860992SSakthivel K /* data address domain added for spcv; set to 0 by host, 4386f5860992SSakthivel K * used internally by controller 4387f5860992SSakthivel K * 0 for SAS 1.1 and SAS 2.0 compatible TLR 4388f5860992SSakthivel K */ 4389f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = 4390f5860992SSakthivel K cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0); 4391f5860992SSakthivel K ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4392f5860992SSakthivel K ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); 4393f5860992SSakthivel K ssp_cmd.tag = cpu_to_le32(tag); 4394f5860992SSakthivel K if (task->ssp_task.enable_first_burst) 4395f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= 0x80; 4396f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_prio << 3); 4397f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_attr & 7); 4398e73823f7SJames Bottomley memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd, 4399e73823f7SJames Bottomley task->ssp_task.cmd->cmd_len); 440005c6c029SViswas G cpu_id = smp_processor_id(); 440105c6c029SViswas G q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); 4402f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4403f5860992SSakthivel K 4404f5860992SSakthivel K /* Check if encryption is set */ 4405f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4406f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) { 44071b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4408f5860992SSakthivel K "Encryption enabled.Sending Encrypt SAS command 0x%x\n", 44091b5d2793SJoe Perches task->ssp_task.cmd->cmnd[0]); 4410f5860992SSakthivel K opc = OPC_INB_SSP_INI_DIF_ENC_IO; 4411f5860992SSakthivel K /* enable encryption. 0 for SAS 1.1 and SAS 2.0 compatible TLR*/ 4412f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = cpu_to_le32 4413f5860992SSakthivel K ((data_dir_flags[task->data_dir] << 8) | 0x20 | 0x0); 4414f5860992SSakthivel K 4415f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4416f5860992SSakthivel K if (task->num_scatter > 1) { 4417f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4418f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 44195a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4420f5860992SSakthivel K ssp_cmd.enc_addr_low = 4421f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4422f5860992SSakthivel K ssp_cmd.enc_addr_high = 4423f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4424f5860992SSakthivel K ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 4425f5860992SSakthivel K } else if (task->num_scatter == 1) { 4426f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4427f5860992SSakthivel K ssp_cmd.enc_addr_low = 4428f5860992SSakthivel K cpu_to_le32(lower_32_bits(dma_addr)); 4429f5860992SSakthivel K ssp_cmd.enc_addr_high = 4430f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4431f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4432f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 44330ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 44340ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 44350ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.enc_len) - 1; 44360ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 44370ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 44380ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.enc_addr_high) { 44391b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 44401b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 44410ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.enc_len, 44421b5d2793SJoe Perches end_addr_high, end_addr_low); 44430ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 44440ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 44455a141315SViswas G phys_addr = ccb->ccb_dma_handle; 44460ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_low = 44470ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 44480ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_high = 44490ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 44500ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 44510ecdf00bSAnand Kumar Santhanam } 4452f5860992SSakthivel K } else if (task->num_scatter == 0) { 4453f5860992SSakthivel K ssp_cmd.enc_addr_low = 0; 4454f5860992SSakthivel K ssp_cmd.enc_addr_high = 0; 4455f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4456f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 4457f5860992SSakthivel K } 4458f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4459f5860992SSakthivel K ssp_cmd.key_cmode = 0x6 << 4; 4460f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4461e73823f7SJames Bottomley ssp_cmd.twk_val0 = cpu_to_le32((task->ssp_task.cmd->cmnd[2] << 24) | 4462e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[3] << 16) | 4463e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[4] << 8) | 4464e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[5])); 4465f5860992SSakthivel K } else { 44661b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4467f5860992SSakthivel K "Sending Normal SAS command 0x%x inb q %x\n", 44681b5d2793SJoe Perches task->ssp_task.cmd->cmnd[0], q_index); 4469f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4470f5860992SSakthivel K if (task->num_scatter > 1) { 4471f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, ccb->n_elem, 4472f5860992SSakthivel K ccb->buf_prd); 44735a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4474f5860992SSakthivel K ssp_cmd.addr_low = 4475f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4476f5860992SSakthivel K ssp_cmd.addr_high = 4477f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4478f5860992SSakthivel K ssp_cmd.esgl = cpu_to_le32(1<<31); 4479f5860992SSakthivel K } else if (task->num_scatter == 1) { 4480f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4481f5860992SSakthivel K ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(dma_addr)); 4482f5860992SSakthivel K ssp_cmd.addr_high = 4483f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4484f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4485f5860992SSakthivel K ssp_cmd.esgl = 0; 44860ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 44870ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 44880ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.len) - 1; 44890ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 44900ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 44910ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.addr_high) { 44921b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 44931b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 44940ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.len, 44951b5d2793SJoe Perches end_addr_high, end_addr_low); 44960ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 44970ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 44985a141315SViswas G phys_addr = ccb->ccb_dma_handle; 44990ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_low = 45000ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 45010ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_high = 45020ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 45030ecdf00bSAnand Kumar Santhanam ssp_cmd.esgl = cpu_to_le32(1<<31); 45040ecdf00bSAnand Kumar Santhanam } 4505f5860992SSakthivel K } else if (task->num_scatter == 0) { 4506f5860992SSakthivel K ssp_cmd.addr_low = 0; 4507f5860992SSakthivel K ssp_cmd.addr_high = 0; 4508f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4509f5860992SSakthivel K ssp_cmd.esgl = 0; 4510f5860992SSakthivel K } 4511f5860992SSakthivel K } 4512f9cd6cbdSAnand Kumar Santhanam ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 451391a43fa6Speter chang &ssp_cmd, sizeof(ssp_cmd), q_index); 4514f5860992SSakthivel K return ret; 4515f5860992SSakthivel K } 4516f5860992SSakthivel K 4517f5860992SSakthivel K static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, 4518f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4519f5860992SSakthivel K { 4520f5860992SSakthivel K struct sas_task *task = ccb->task; 4521f5860992SSakthivel K struct domain_device *dev = task->dev; 4522f5860992SSakthivel K struct pm8001_device *pm8001_ha_dev = dev->lldd_dev; 45238ceddda3SChangyuan Lyu struct ata_queued_cmd *qc = task->uldd_task; 4524f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4525f5860992SSakthivel K int ret; 452605c6c029SViswas G u32 q_index, cpu_id; 4527f5860992SSakthivel K struct sata_start_req sata_cmd; 4528f5860992SSakthivel K u32 hdr_tag, ncg_tag = 0; 45290ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 45300ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4531f5860992SSakthivel K u32 ATAP = 0x0; 4532f5860992SSakthivel K u32 dir; 4533f5860992SSakthivel K struct inbound_queue_table *circularQ; 4534c6b9ef57SSakthivel K unsigned long flags; 4535f5860992SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 4536f5860992SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 453705c6c029SViswas G cpu_id = smp_processor_id(); 453805c6c029SViswas G q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num); 4539f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4540f5860992SSakthivel K 4541f73bdebdSChristoph Hellwig if (task->data_dir == DMA_NONE) { 4542f5860992SSakthivel K ATAP = 0x04; /* no data*/ 45431b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "no data\n"); 4544f5860992SSakthivel K } else if (likely(!task->ata_task.device_control_reg_update)) { 4545f5860992SSakthivel K if (task->ata_task.dma_xfer) { 4546f5860992SSakthivel K ATAP = 0x06; /* DMA */ 45471b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "DMA\n"); 4548f5860992SSakthivel K } else { 4549f5860992SSakthivel K ATAP = 0x05; /* PIO*/ 45501b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "PIO\n"); 4551f5860992SSakthivel K } 4552f5860992SSakthivel K if (task->ata_task.use_ncq && 45531cbd772dSHannes Reinecke dev->sata_dev.class != ATA_DEV_ATAPI) { 4554f5860992SSakthivel K ATAP = 0x07; /* FPDMA */ 45551b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, "FPDMA\n"); 4556f5860992SSakthivel K } 4557f5860992SSakthivel K } 4558c6b9ef57SSakthivel K if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) { 4559c6b9ef57SSakthivel K task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 4560f5860992SSakthivel K ncg_tag = hdr_tag; 4561c6b9ef57SSakthivel K } 4562f5860992SSakthivel K dir = data_dir_flags[task->data_dir] << 8; 4563f5860992SSakthivel K sata_cmd.tag = cpu_to_le32(tag); 4564f5860992SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 4565f5860992SSakthivel K sata_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4566f5860992SSakthivel K 4567f5860992SSakthivel K sata_cmd.sata_fis = task->ata_task.fis; 4568f5860992SSakthivel K if (likely(!task->ata_task.device_control_reg_update)) 4569f5860992SSakthivel K sata_cmd.sata_fis.flags |= 0x80;/* C=1: update ATA cmd reg */ 4570f5860992SSakthivel K sata_cmd.sata_fis.flags &= 0xF0;/* PM_PORT field shall be 0 */ 4571f5860992SSakthivel K 4572f5860992SSakthivel K /* Check if encryption is set */ 4573f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4574f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) { 45751b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4576f5860992SSakthivel K "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n", 45771b5d2793SJoe Perches sata_cmd.sata_fis.command); 4578f5860992SSakthivel K opc = OPC_INB_SATA_DIF_ENC_IO; 4579f5860992SSakthivel K 4580f5860992SSakthivel K /* set encryption bit */ 4581f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4582f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16)| 4583f5860992SSakthivel K ((ATAP & 0x3f) << 10) | 0x20 | dir); 4584f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4585f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4586f5860992SSakthivel K if (task->num_scatter > 1) { 4587f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4588f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 45895a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4590f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(phys_addr); 4591f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(phys_addr); 4592f5860992SSakthivel K sata_cmd.enc_esgl = cpu_to_le32(1 << 31); 4593f5860992SSakthivel K } else if (task->num_scatter == 1) { 4594f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4595f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(dma_addr); 4596f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(dma_addr); 4597f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4598f5860992SSakthivel K sata_cmd.enc_esgl = 0; 45990ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 46000ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 46010ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.enc_len) - 1; 46020ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 46030ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 46040ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.enc_addr_high) { 46051b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 46061b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%x end_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 46070ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.enc_len, 46081b5d2793SJoe Perches end_addr_high, end_addr_low); 46090ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 46100ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 46115a141315SViswas G phys_addr = ccb->ccb_dma_handle; 46120ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_low = 46130ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 46140ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_high = 46150ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 46160ecdf00bSAnand Kumar Santhanam sata_cmd.enc_esgl = 46170ecdf00bSAnand Kumar Santhanam cpu_to_le32(1 << 31); 46180ecdf00bSAnand Kumar Santhanam } 4619f5860992SSakthivel K } else if (task->num_scatter == 0) { 4620f5860992SSakthivel K sata_cmd.enc_addr_low = 0; 4621f5860992SSakthivel K sata_cmd.enc_addr_high = 0; 4622f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4623f5860992SSakthivel K sata_cmd.enc_esgl = 0; 4624f5860992SSakthivel K } 4625f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4626f5860992SSakthivel K sata_cmd.key_index_mode = 0x6 << 4; 4627f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4628f5860992SSakthivel K sata_cmd.twk_val0 = 4629f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbal_exp << 24) | 4630f5860992SSakthivel K (sata_cmd.sata_fis.lbah << 16) | 4631f5860992SSakthivel K (sata_cmd.sata_fis.lbam << 8) | 4632f5860992SSakthivel K (sata_cmd.sata_fis.lbal)); 4633f5860992SSakthivel K sata_cmd.twk_val1 = 4634f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbah_exp << 8) | 4635f5860992SSakthivel K (sata_cmd.sata_fis.lbam_exp)); 4636f5860992SSakthivel K } else { 46371b5d2793SJoe Perches pm8001_dbg(pm8001_ha, IO, 4638f5860992SSakthivel K "Sending Normal SATA command 0x%x inb %x\n", 46391b5d2793SJoe Perches sata_cmd.sata_fis.command, q_index); 4640f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4641f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4642f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16) | 4643f5860992SSakthivel K ((ATAP & 0x3f) << 10) | dir); 4644f5860992SSakthivel K 4645f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4646f5860992SSakthivel K if (task->num_scatter > 1) { 4647f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4648f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 46495a141315SViswas G phys_addr = ccb->ccb_dma_handle; 4650f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(phys_addr); 4651f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(phys_addr); 4652f5860992SSakthivel K sata_cmd.esgl = cpu_to_le32(1 << 31); 4653f5860992SSakthivel K } else if (task->num_scatter == 1) { 4654f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4655f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(dma_addr); 4656f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(dma_addr); 4657f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4658f5860992SSakthivel K sata_cmd.esgl = 0; 46590ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 46600ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 46610ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.len) - 1; 46620ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 46630ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 46640ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.addr_high) { 46651b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 46661b5d2793SJoe Perches "The sg list address start_addr=0x%016llx data_len=0x%xend_addr_high=0x%08x end_addr_low=0x%08x has crossed 4G boundary\n", 46670ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.len, 46681b5d2793SJoe Perches end_addr_high, end_addr_low); 46690ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 46700ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 46715a141315SViswas G phys_addr = ccb->ccb_dma_handle; 46720ecdf00bSAnand Kumar Santhanam sata_cmd.addr_low = 46730ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 46740ecdf00bSAnand Kumar Santhanam sata_cmd.addr_high = 46750ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 46760ecdf00bSAnand Kumar Santhanam sata_cmd.esgl = cpu_to_le32(1 << 31); 46770ecdf00bSAnand Kumar Santhanam } 4678f5860992SSakthivel K } else if (task->num_scatter == 0) { 4679f5860992SSakthivel K sata_cmd.addr_low = 0; 4680f5860992SSakthivel K sata_cmd.addr_high = 0; 4681f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4682f5860992SSakthivel K sata_cmd.esgl = 0; 4683f5860992SSakthivel K } 4684f5860992SSakthivel K /* scsi cdb */ 4685f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[0] = 4686f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[0]) | 4687f5860992SSakthivel K (task->ata_task.atapi_packet[1] << 8) | 4688f5860992SSakthivel K (task->ata_task.atapi_packet[2] << 16) | 4689f5860992SSakthivel K (task->ata_task.atapi_packet[3] << 24))); 4690f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[1] = 4691f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[4]) | 4692f5860992SSakthivel K (task->ata_task.atapi_packet[5] << 8) | 4693f5860992SSakthivel K (task->ata_task.atapi_packet[6] << 16) | 4694f5860992SSakthivel K (task->ata_task.atapi_packet[7] << 24))); 4695f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[2] = 4696f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[8]) | 4697f5860992SSakthivel K (task->ata_task.atapi_packet[9] << 8) | 4698f5860992SSakthivel K (task->ata_task.atapi_packet[10] << 16) | 4699f5860992SSakthivel K (task->ata_task.atapi_packet[11] << 24))); 4700f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[3] = 4701f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[12]) | 4702f5860992SSakthivel K (task->ata_task.atapi_packet[13] << 8) | 4703f5860992SSakthivel K (task->ata_task.atapi_packet[14] << 16) | 4704f5860992SSakthivel K (task->ata_task.atapi_packet[15] << 24))); 4705f5860992SSakthivel K } 4706c6b9ef57SSakthivel K 4707c6b9ef57SSakthivel K /* Check for read log for failed drive and return */ 4708c6b9ef57SSakthivel K if (sata_cmd.sata_fis.command == 0x2f) { 4709c6b9ef57SSakthivel K if (pm8001_ha_dev && ((pm8001_ha_dev->id & NCQ_READ_LOG_FLAG) || 4710c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_ABORT_ALL_FLAG) || 4711c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_2ND_RLE_FLAG))) { 4712c6b9ef57SSakthivel K struct task_status_struct *ts; 4713c6b9ef57SSakthivel K 4714c6b9ef57SSakthivel K pm8001_ha_dev->id &= 0xDFFFFFFF; 4715c6b9ef57SSakthivel K ts = &task->task_status; 4716c6b9ef57SSakthivel K 4717c6b9ef57SSakthivel K spin_lock_irqsave(&task->task_state_lock, flags); 4718c6b9ef57SSakthivel K ts->resp = SAS_TASK_COMPLETE; 4719d377f415SBart Van Assche ts->stat = SAS_SAM_STAT_GOOD; 4720c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_STATE_PENDING; 4721c6b9ef57SSakthivel K task->task_state_flags |= SAS_TASK_STATE_DONE; 4722c6b9ef57SSakthivel K if (unlikely((task->task_state_flags & 4723c6b9ef57SSakthivel K SAS_TASK_STATE_ABORTED))) { 4724c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4725c6b9ef57SSakthivel K flags); 47261b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, 47271b5d2793SJoe Perches "task 0x%p resp 0x%x stat 0x%x but aborted by upper layer\n", 47281b5d2793SJoe Perches task, ts->resp, 47291b5d2793SJoe Perches ts->stat); 4730c6b9ef57SSakthivel K pm8001_ccb_task_free(pm8001_ha, task, ccb, tag); 4731c6b9ef57SSakthivel K return 0; 47322b01d816SSuresh Thiagarajan } else { 4733c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4734c6b9ef57SSakthivel K flags); 47352b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, task, 47362b01d816SSuresh Thiagarajan ccb, tag); 47374a2efd4bSViswas G atomic_dec(&pm8001_ha_dev->running_req); 4738c6b9ef57SSakthivel K return 0; 4739c6b9ef57SSakthivel K } 4740c6b9ef57SSakthivel K } 4741c6b9ef57SSakthivel K } 47428ceddda3SChangyuan Lyu trace_pm80xx_request_issue(pm8001_ha->id, 47438ceddda3SChangyuan Lyu ccb->device ? ccb->device->attached_phy : PM8001_MAX_PHYS, 47448ceddda3SChangyuan Lyu ccb->ccb_tag, opc, 47458ceddda3SChangyuan Lyu qc ? qc->tf.command : 0, // ata opcode 47468ceddda3SChangyuan Lyu ccb->device ? atomic_read(&ccb->device->running_req) : 0); 4747f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 474891a43fa6Speter chang &sata_cmd, sizeof(sata_cmd), q_index); 4749f5860992SSakthivel K return ret; 4750f5860992SSakthivel K } 4751f5860992SSakthivel K 4752f5860992SSakthivel K /** 4753f5860992SSakthivel K * pm80xx_chip_phy_start_req - start phy via PHY_START COMMAND 4754f5860992SSakthivel K * @pm8001_ha: our hba card information. 4755f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4756f5860992SSakthivel K */ 4757f5860992SSakthivel K static int 4758f5860992SSakthivel K pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) 4759f5860992SSakthivel K { 4760f5860992SSakthivel K struct phy_start_req payload; 4761f5860992SSakthivel K struct inbound_queue_table *circularQ; 4762f5860992SSakthivel K int ret; 4763f5860992SSakthivel K u32 tag = 0x01; 4764f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTART; 4765f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4766f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4767f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4768f5860992SSakthivel K 47691b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PHY START REQ for phy_id %d\n", phy_id); 4770a9a923e5SAnand Kumar Santhanam 47713e253d96Speter chang payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE | 47723e253d96Speter chang LINKMODE_AUTO | pm8001_ha->link_rate | phy_id); 4773f5860992SSakthivel K /* SSC Disable and SAS Analog ST configuration */ 4774bb6beabfSRandy Dunlap /* 4775f5860992SSakthivel K payload.ase_sh_lm_slr_phyid = 4776f5860992SSakthivel K cpu_to_le32(SSC_DISABLE_30 | SAS_ASE | SPINHOLD_DISABLE | 4777f5860992SSakthivel K LINKMODE_AUTO | LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | 4778f5860992SSakthivel K phy_id); 4779f5860992SSakthivel K Have to add "SAS PHY Analog Setup SPASTI 1 Byte" Based on need 4780bb6beabfSRandy Dunlap */ 4781f5860992SSakthivel K 4782aa9f8328SJames Bottomley payload.sas_identify.dev_type = SAS_END_DEVICE; 4783f5860992SSakthivel K payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL; 4784f5860992SSakthivel K memcpy(payload.sas_identify.sas_addr, 47853e253d96Speter chang &pm8001_ha->sas_addr, SAS_ADDR_SIZE); 4786f5860992SSakthivel K payload.sas_identify.phy_id = phy_id; 478791a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 478891a43fa6Speter chang sizeof(payload), 0); 4789f5860992SSakthivel K return ret; 4790f5860992SSakthivel K } 4791f5860992SSakthivel K 4792f5860992SSakthivel K /** 47937cdaf12eSLee Jones * pm80xx_chip_phy_stop_req - start phy via PHY_STOP COMMAND 4794f5860992SSakthivel K * @pm8001_ha: our hba card information. 4795f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4796f5860992SSakthivel K */ 4797f5860992SSakthivel K static int pm80xx_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha, 4798f5860992SSakthivel K u8 phy_id) 4799f5860992SSakthivel K { 4800f5860992SSakthivel K struct phy_stop_req payload; 4801f5860992SSakthivel K struct inbound_queue_table *circularQ; 4802f5860992SSakthivel K int ret; 4803f5860992SSakthivel K u32 tag = 0x01; 4804f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTOP; 4805f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4806f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4807f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4808f5860992SSakthivel K payload.phy_id = cpu_to_le32(phy_id); 480991a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 481091a43fa6Speter chang sizeof(payload), 0); 4811f5860992SSakthivel K return ret; 4812f5860992SSakthivel K } 4813f5860992SSakthivel K 48146ad4a517SLee Jones /* 4815f5860992SSakthivel K * see comments on pm8001_mpi_reg_resp. 4816f5860992SSakthivel K */ 4817f5860992SSakthivel K static int pm80xx_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha, 4818f5860992SSakthivel K struct pm8001_device *pm8001_dev, u32 flag) 4819f5860992SSakthivel K { 4820f5860992SSakthivel K struct reg_dev_req payload; 4821f5860992SSakthivel K u32 opc; 4822f5860992SSakthivel K u32 stp_sspsmp_sata = 0x4; 4823f5860992SSakthivel K struct inbound_queue_table *circularQ; 4824f5860992SSakthivel K u32 linkrate, phy_id; 4825f5860992SSakthivel K int rc, tag = 0xdeadbeef; 4826f5860992SSakthivel K struct pm8001_ccb_info *ccb; 4827f5860992SSakthivel K u8 retryFlag = 0x1; 4828f5860992SSakthivel K u16 firstBurstSize = 0; 4829f5860992SSakthivel K u16 ITNT = 2000; 4830f5860992SSakthivel K struct domain_device *dev = pm8001_dev->sas_device; 4831f5860992SSakthivel K struct domain_device *parent_dev = dev->parent; 483208d0a992SAjish Koshy struct pm8001_port *port = dev->port->lldd_port; 4833f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4834f5860992SSakthivel K 4835f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4836f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 4837f5860992SSakthivel K if (rc) 4838f5860992SSakthivel K return rc; 4839f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 4840f5860992SSakthivel K ccb->device = pm8001_dev; 4841f5860992SSakthivel K ccb->ccb_tag = tag; 4842f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4843f5860992SSakthivel K 4844f5860992SSakthivel K if (flag == 1) { 4845f5860992SSakthivel K stp_sspsmp_sata = 0x02; /*direct attached sata */ 4846f5860992SSakthivel K } else { 4847aa9f8328SJames Bottomley if (pm8001_dev->dev_type == SAS_SATA_DEV) 4848f5860992SSakthivel K stp_sspsmp_sata = 0x00; /* stp*/ 4849aa9f8328SJames Bottomley else if (pm8001_dev->dev_type == SAS_END_DEVICE || 48504f632918SIgor Pylypiv dev_is_expander(pm8001_dev->dev_type)) 4851f5860992SSakthivel K stp_sspsmp_sata = 0x01; /*ssp or smp*/ 4852f5860992SSakthivel K } 4853924a3541SJohn Garry if (parent_dev && dev_is_expander(parent_dev->dev_type)) 4854f5860992SSakthivel K phy_id = parent_dev->ex_dev.ex_phy->phy_id; 4855f5860992SSakthivel K else 4856f5860992SSakthivel K phy_id = pm8001_dev->attached_phy; 4857f5860992SSakthivel K 4858f5860992SSakthivel K opc = OPC_INB_REG_DEV; 4859f5860992SSakthivel K 4860f5860992SSakthivel K linkrate = (pm8001_dev->sas_device->linkrate < dev->port->linkrate) ? 4861f5860992SSakthivel K pm8001_dev->sas_device->linkrate : dev->port->linkrate; 4862f5860992SSakthivel K 4863f5860992SSakthivel K payload.phyid_portid = 486408d0a992SAjish Koshy cpu_to_le32(((port->port_id) & 0xFF) | 4865f5860992SSakthivel K ((phy_id & 0xFF) << 8)); 4866f5860992SSakthivel K 4867f5860992SSakthivel K payload.dtype_dlr_mcn_ir_retry = cpu_to_le32((retryFlag & 0x01) | 4868f5860992SSakthivel K ((linkrate & 0x0F) << 24) | 4869f5860992SSakthivel K ((stp_sspsmp_sata & 0x03) << 28)); 4870f5860992SSakthivel K payload.firstburstsize_ITNexustimeout = 4871f5860992SSakthivel K cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); 4872f5860992SSakthivel K 4873f5860992SSakthivel K memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr, 4874f5860992SSakthivel K SAS_ADDR_SIZE); 4875f5860992SSakthivel K 487691a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 487791a43fa6Speter chang sizeof(payload), 0); 48785533abcaSTomas Henzl if (rc) 48795533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 4880f5860992SSakthivel K 4881f5860992SSakthivel K return rc; 4882f5860992SSakthivel K } 4883f5860992SSakthivel K 4884f5860992SSakthivel K /** 4885f5860992SSakthivel K * pm80xx_chip_phy_ctl_req - support the local phy operation 4886f5860992SSakthivel K * @pm8001_ha: our hba card information. 48876ad4a517SLee Jones * @phyId: the phy id which we wanted to operate 48886ad4a517SLee Jones * @phy_op: phy operation to request 4889f5860992SSakthivel K */ 4890f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 4891f5860992SSakthivel K u32 phyId, u32 phy_op) 4892f5860992SSakthivel K { 489325c6edbdSViswas G u32 tag; 489425c6edbdSViswas G int rc; 4895f5860992SSakthivel K struct local_phy_ctl_req payload; 4896f5860992SSakthivel K struct inbound_queue_table *circularQ; 4897f5860992SSakthivel K u32 opc = OPC_INB_LOCAL_PHY_CONTROL; 4898f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 489925c6edbdSViswas G rc = pm8001_tag_alloc(pm8001_ha, &tag); 490025c6edbdSViswas G if (rc) 490125c6edbdSViswas G return rc; 4902f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 490325c6edbdSViswas G payload.tag = cpu_to_le32(tag); 4904f5860992SSakthivel K payload.phyop_phyid = 4905f5860992SSakthivel K cpu_to_le32(((phy_op & 0xFF) << 8) | (phyId & 0xFF)); 490691a43fa6Speter chang return pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 490791a43fa6Speter chang sizeof(payload), 0); 4908f5860992SSakthivel K } 4909f5860992SSakthivel K 4910f310a4eaSColin Ian King static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) 4911f5860992SSakthivel K { 4912f5860992SSakthivel K #ifdef PM8001_USE_MSIX 4913f5860992SSakthivel K return 1; 4914292c04ccSColin Ian King #else 4915292c04ccSColin Ian King u32 value; 4916292c04ccSColin Ian King 4917f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); 4918f5860992SSakthivel K if (value) 4919f5860992SSakthivel K return 1; 4920f5860992SSakthivel K return 0; 4921292c04ccSColin Ian King #endif 4922f5860992SSakthivel K } 4923f5860992SSakthivel K 4924f5860992SSakthivel K /** 49257cdaf12eSLee Jones * pm80xx_chip_isr - PM8001 isr handler. 4926f5860992SSakthivel K * @pm8001_ha: our hba card information. 49276ad4a517SLee Jones * @vec: irq number. 4928f5860992SSakthivel K */ 4929f5860992SSakthivel K static irqreturn_t 4930f5860992SSakthivel K pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec) 4931f5860992SSakthivel K { 4932f5860992SSakthivel K pm80xx_chip_interrupt_disable(pm8001_ha, vec); 49331b5d2793SJoe Perches pm8001_dbg(pm8001_ha, DEVIO, 49347370672dSpeter chang "irq vec %d, ODMR:0x%x\n", 49351b5d2793SJoe Perches vec, pm8001_cr32(pm8001_ha, 0, 0x30)); 4936f5860992SSakthivel K process_oq(pm8001_ha, vec); 4937f5860992SSakthivel K pm80xx_chip_interrupt_enable(pm8001_ha, vec); 4938f5860992SSakthivel K return IRQ_HANDLED; 4939f5860992SSakthivel K } 4940f5860992SSakthivel K 4941ea310f57SLee Jones static void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha, 4942ea310f57SLee Jones u32 operation, u32 phyid, 4943ea310f57SLee Jones u32 length, u32 *buf) 494427909407SAnand Kumar Santhanam { 494527909407SAnand Kumar Santhanam u32 tag, i, j = 0; 494627909407SAnand Kumar Santhanam int rc; 494727909407SAnand Kumar Santhanam struct set_phy_profile_req payload; 494827909407SAnand Kumar Santhanam struct inbound_queue_table *circularQ; 494927909407SAnand Kumar Santhanam u32 opc = OPC_INB_SET_PHY_PROFILE; 495027909407SAnand Kumar Santhanam 495127909407SAnand Kumar Santhanam memset(&payload, 0, sizeof(payload)); 495227909407SAnand Kumar Santhanam rc = pm8001_tag_alloc(pm8001_ha, &tag); 495327909407SAnand Kumar Santhanam if (rc) 49541b5d2793SJoe Perches pm8001_dbg(pm8001_ha, FAIL, "Invalid tag\n"); 495527909407SAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[0]; 495627909407SAnand Kumar Santhanam payload.tag = cpu_to_le32(tag); 495727909407SAnand Kumar Santhanam payload.ppc_phyid = (((operation & 0xF) << 8) | (phyid & 0xFF)); 49581b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, 49591b5d2793SJoe Perches " phy profile command for phy %x ,length is %d\n", 49601b5d2793SJoe Perches payload.ppc_phyid, length); 496127909407SAnand Kumar Santhanam for (i = length; i < (length + PHY_DWORD_LENGTH - 1); i++) { 496227909407SAnand Kumar Santhanam payload.reserved[j] = cpu_to_le32(*((u32 *)buf + i)); 496327909407SAnand Kumar Santhanam j++; 496427909407SAnand Kumar Santhanam } 496591a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 496691a43fa6Speter chang sizeof(payload), 0); 49675533abcaSTomas Henzl if (rc) 49685533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 496927909407SAnand Kumar Santhanam } 497027909407SAnand Kumar Santhanam 497127909407SAnand Kumar Santhanam void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha, 497227909407SAnand Kumar Santhanam u32 length, u8 *buf) 497327909407SAnand Kumar Santhanam { 4974fdd0a66bSYueHaibing u32 i; 497527909407SAnand Kumar Santhanam 497627909407SAnand Kumar Santhanam for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 497727909407SAnand Kumar Santhanam mpi_set_phy_profile_req(pm8001_ha, 497827909407SAnand Kumar Santhanam SAS_PHY_ANALOG_SETTINGS_PAGE, i, length, (u32 *)buf); 497927909407SAnand Kumar Santhanam length = length + PHY_DWORD_LENGTH; 498027909407SAnand Kumar Santhanam } 49811b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "phy settings completed\n"); 498227909407SAnand Kumar Santhanam } 4983c5614df7SBenjamin Rood 4984c5614df7SBenjamin Rood void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha, 4985c5614df7SBenjamin Rood u32 phy, u32 length, u32 *buf) 4986c5614df7SBenjamin Rood { 4987c5614df7SBenjamin Rood u32 tag, opc; 4988c5614df7SBenjamin Rood int rc, i; 4989c5614df7SBenjamin Rood struct set_phy_profile_req payload; 4990c5614df7SBenjamin Rood struct inbound_queue_table *circularQ; 4991c5614df7SBenjamin Rood 4992c5614df7SBenjamin Rood memset(&payload, 0, sizeof(payload)); 4993c5614df7SBenjamin Rood 4994c5614df7SBenjamin Rood rc = pm8001_tag_alloc(pm8001_ha, &tag); 4995c5614df7SBenjamin Rood if (rc) 49961b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "Invalid tag\n"); 4997c5614df7SBenjamin Rood 4998c5614df7SBenjamin Rood circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4999c5614df7SBenjamin Rood opc = OPC_INB_SET_PHY_PROFILE; 5000c5614df7SBenjamin Rood 5001c5614df7SBenjamin Rood payload.tag = cpu_to_le32(tag); 5002c5614df7SBenjamin Rood payload.ppc_phyid = (((SAS_PHY_ANALOG_SETTINGS_PAGE & 0xF) << 8) 5003c5614df7SBenjamin Rood | (phy & 0xFF)); 5004c5614df7SBenjamin Rood 5005c5614df7SBenjamin Rood for (i = 0; i < length; i++) 5006c5614df7SBenjamin Rood payload.reserved[i] = cpu_to_le32(*(buf + i)); 5007c5614df7SBenjamin Rood 500891a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 500991a43fa6Speter chang sizeof(payload), 0); 5010c5614df7SBenjamin Rood if (rc) 5011c5614df7SBenjamin Rood pm8001_tag_free(pm8001_ha, tag); 5012c5614df7SBenjamin Rood 50131b5d2793SJoe Perches pm8001_dbg(pm8001_ha, INIT, "PHY %d settings applied\n", phy); 5014c5614df7SBenjamin Rood } 5015f5860992SSakthivel K const struct pm8001_dispatch pm8001_80xx_dispatch = { 5016f5860992SSakthivel K .name = "pmc80xx", 5017f5860992SSakthivel K .chip_init = pm80xx_chip_init, 5018f5860992SSakthivel K .chip_soft_rst = pm80xx_chip_soft_rst, 5019f5860992SSakthivel K .chip_rst = pm80xx_hw_chip_rst, 5020f5860992SSakthivel K .chip_iounmap = pm8001_chip_iounmap, 5021f5860992SSakthivel K .isr = pm80xx_chip_isr, 5022f310a4eaSColin Ian King .is_our_interrupt = pm80xx_chip_is_our_interrupt, 5023f5860992SSakthivel K .isr_process_oq = process_oq, 5024f5860992SSakthivel K .interrupt_enable = pm80xx_chip_interrupt_enable, 5025f5860992SSakthivel K .interrupt_disable = pm80xx_chip_interrupt_disable, 5026f5860992SSakthivel K .make_prd = pm8001_chip_make_sg, 5027f5860992SSakthivel K .smp_req = pm80xx_chip_smp_req, 5028f5860992SSakthivel K .ssp_io_req = pm80xx_chip_ssp_io_req, 5029f5860992SSakthivel K .sata_req = pm80xx_chip_sata_req, 5030f5860992SSakthivel K .phy_start_req = pm80xx_chip_phy_start_req, 5031f5860992SSakthivel K .phy_stop_req = pm80xx_chip_phy_stop_req, 5032f5860992SSakthivel K .reg_dev_req = pm80xx_chip_reg_dev_req, 5033f5860992SSakthivel K .dereg_dev_req = pm8001_chip_dereg_dev_req, 5034f5860992SSakthivel K .phy_ctl_req = pm80xx_chip_phy_ctl_req, 5035f5860992SSakthivel K .task_abort = pm8001_chip_abort_task, 5036f5860992SSakthivel K .ssp_tm_req = pm8001_chip_ssp_tm_req, 5037f5860992SSakthivel K .get_nvmd_req = pm8001_chip_get_nvmd_req, 5038f5860992SSakthivel K .set_nvmd_req = pm8001_chip_set_nvmd_req, 5039f5860992SSakthivel K .fw_flash_update_req = pm8001_chip_fw_flash_update_req, 5040f5860992SSakthivel K .set_dev_state_req = pm8001_chip_set_dev_state_req, 5041a961ea0aSakshatzen .fatal_errors = pm80xx_fatal_errors, 5042ee05cb71SAjish Koshy .hw_event_ack_req = pm80xx_hw_event_ack_req, 5043f5860992SSakthivel K }; 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