1f5860992SSakthivel K /* 2f5860992SSakthivel K * PMC-Sierra SPCv/ve 8088/8089 SAS/SATA based host adapters driver 3f5860992SSakthivel K * 4f5860992SSakthivel K * Copyright (c) 2008-2009 PMC-Sierra, Inc., 5f5860992SSakthivel K * All rights reserved. 6f5860992SSakthivel K * 7f5860992SSakthivel K * Redistribution and use in source and binary forms, with or without 8f5860992SSakthivel K * modification, are permitted provided that the following conditions 9f5860992SSakthivel K * are met: 10f5860992SSakthivel K * 1. Redistributions of source code must retain the above copyright 11f5860992SSakthivel K * notice, this list of conditions, and the following disclaimer, 12f5860992SSakthivel K * without modification. 13f5860992SSakthivel K * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14f5860992SSakthivel K * substantially similar to the "NO WARRANTY" disclaimer below 15f5860992SSakthivel K * ("Disclaimer") and any redistribution must be conditioned upon 16f5860992SSakthivel K * including a substantially similar Disclaimer requirement for further 17f5860992SSakthivel K * binary redistribution. 18f5860992SSakthivel K * 3. Neither the names of the above-listed copyright holders nor the names 19f5860992SSakthivel K * of any contributors may be used to endorse or promote products derived 20f5860992SSakthivel K * from this software without specific prior written permission. 21f5860992SSakthivel K * 22f5860992SSakthivel K * Alternatively, this software may be distributed under the terms of the 23f5860992SSakthivel K * GNU General Public License ("GPL") version 2 as published by the Free 24f5860992SSakthivel K * Software Foundation. 25f5860992SSakthivel K * 26f5860992SSakthivel K * NO WARRANTY 27f5860992SSakthivel K * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28f5860992SSakthivel K * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29f5860992SSakthivel K * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30f5860992SSakthivel K * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31f5860992SSakthivel K * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32f5860992SSakthivel K * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33f5860992SSakthivel K * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34f5860992SSakthivel K * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35f5860992SSakthivel K * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36f5860992SSakthivel K * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37f5860992SSakthivel K * POSSIBILITY OF SUCH DAMAGES. 38f5860992SSakthivel K * 39f5860992SSakthivel K */ 40f5860992SSakthivel K #include <linux/slab.h> 41f5860992SSakthivel K #include "pm8001_sas.h" 42f5860992SSakthivel K #include "pm80xx_hwi.h" 43f5860992SSakthivel K #include "pm8001_chips.h" 44f5860992SSakthivel K #include "pm8001_ctl.h" 45f5860992SSakthivel K 46f5860992SSakthivel K #define SMP_DIRECT 1 47f5860992SSakthivel K #define SMP_INDIRECT 2 48d078b511SAnand Kumar Santhanam 49d078b511SAnand Kumar Santhanam 50d078b511SAnand Kumar Santhanam int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shift_value) 51d078b511SAnand Kumar Santhanam { 52d078b511SAnand Kumar Santhanam u32 reg_val; 53d078b511SAnand Kumar Santhanam unsigned long start; 54d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, shift_value); 55d078b511SAnand Kumar Santhanam /* confirm the setting is written */ 56d078b511SAnand Kumar Santhanam start = jiffies + HZ; /* 1 sec */ 57d078b511SAnand Kumar Santhanam do { 58d078b511SAnand Kumar Santhanam reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER); 59d078b511SAnand Kumar Santhanam } while ((reg_val != shift_value) && time_before(jiffies, start)); 60d078b511SAnand Kumar Santhanam if (reg_val != shift_value) { 61d078b511SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 62d078b511SAnand Kumar Santhanam pm8001_printk("TIMEOUT:MEMBASE_II_SHIFT_REGISTER" 63d078b511SAnand Kumar Santhanam " = 0x%x\n", reg_val)); 64d078b511SAnand Kumar Santhanam return -1; 65d078b511SAnand Kumar Santhanam } 66d078b511SAnand Kumar Santhanam return 0; 67d078b511SAnand Kumar Santhanam } 68d078b511SAnand Kumar Santhanam 69d078b511SAnand Kumar Santhanam void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset, 70d078b511SAnand Kumar Santhanam const void *destination, 71d078b511SAnand Kumar Santhanam u32 dw_count, u32 bus_base_number) 72d078b511SAnand Kumar Santhanam { 73d078b511SAnand Kumar Santhanam u32 index, value, offset; 74d078b511SAnand Kumar Santhanam u32 *destination1; 75d078b511SAnand Kumar Santhanam destination1 = (u32 *)destination; 76d078b511SAnand Kumar Santhanam 77d078b511SAnand Kumar Santhanam for (index = 0; index < dw_count; index += 4, destination1++) { 78044f59deSDeepak Ukey offset = (soffset + index); 79d078b511SAnand Kumar Santhanam if (offset < (64 * 1024)) { 80d078b511SAnand Kumar Santhanam value = pm8001_cr32(pm8001_ha, bus_base_number, offset); 81d078b511SAnand Kumar Santhanam *destination1 = cpu_to_le32(value); 82d078b511SAnand Kumar Santhanam } 83d078b511SAnand Kumar Santhanam } 84d078b511SAnand Kumar Santhanam return; 85d078b511SAnand Kumar Santhanam } 86d078b511SAnand Kumar Santhanam 87d078b511SAnand Kumar Santhanam ssize_t pm80xx_get_fatal_dump(struct device *cdev, 88d078b511SAnand Kumar Santhanam struct device_attribute *attr, char *buf) 89d078b511SAnand Kumar Santhanam { 90d078b511SAnand Kumar Santhanam struct Scsi_Host *shost = class_to_shost(cdev); 91d078b511SAnand Kumar Santhanam struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 92d078b511SAnand Kumar Santhanam struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 93d078b511SAnand Kumar Santhanam void __iomem *fatal_table_address = pm8001_ha->fatal_tbl_addr; 94d078b511SAnand Kumar Santhanam u32 accum_len , reg_val, index, *temp; 95044f59deSDeepak Ukey u32 status = 1; 96d078b511SAnand Kumar Santhanam unsigned long start; 97d078b511SAnand Kumar Santhanam u8 *direct_data; 98d078b511SAnand Kumar Santhanam char *fatal_error_data = buf; 99044f59deSDeepak Ukey u32 length_to_read; 100044f59deSDeepak Ukey u32 offset; 101d078b511SAnand Kumar Santhanam 102d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = buf; 103d078b511SAnand Kumar Santhanam if (pm8001_ha->chip_id == chip_8001) { 104d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 105d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 106d078b511SAnand Kumar Santhanam "Not supported for SPC controller"); 107d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 108d078b511SAnand Kumar Santhanam (char *)buf; 109d078b511SAnand Kumar Santhanam } 110044f59deSDeepak Ukey /* initialize variables for very first call from host application */ 111d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 112d078b511SAnand Kumar Santhanam PM8001_IO_DBG(pm8001_ha, 113d078b511SAnand Kumar Santhanam pm8001_printk("forensic_info TYPE_NON_FATAL..............\n")); 114d078b511SAnand Kumar Santhanam direct_data = (u8 *)fatal_error_data; 115d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL; 116d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET; 117044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_offset = 0; 118d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 119044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 0; 120044f59deSDeepak Ukey 121044f59deSDeepak Ukey /* Write signature to fatal dump table */ 122044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 123044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_SIGNATURE, 0x1234abcd); 124d078b511SAnand Kumar Santhanam 125d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = direct_data; 126044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 127044f59deSDeepak Ukey pm8001_printk("ossaHwCB: status1 %d\n", status)); 128044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 129044f59deSDeepak Ukey pm8001_printk("ossaHwCB: read_len 0x%x\n", 130044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.read_len)); 131044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 132044f59deSDeepak Ukey pm8001_printk("ossaHwCB: direct_len 0x%x\n", 133044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len)); 134044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 135044f59deSDeepak Ukey pm8001_printk("ossaHwCB: direct_offset 0x%x\n", 136044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_offset)); 137044f59deSDeepak Ukey } 138044f59deSDeepak Ukey if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 139d078b511SAnand Kumar Santhanam /* start to get data */ 140d078b511SAnand Kumar Santhanam /* Program the MEMBASE II Shifting Register with 0x00.*/ 141d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 142d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 143d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 144d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 145d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 146d078b511SAnand Kumar Santhanam } 147cf370066SViswas G 148d078b511SAnand Kumar Santhanam /* Read until accum_len is retrived */ 149d078b511SAnand Kumar Santhanam accum_len = pm8001_mr32(fatal_table_address, 150d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 151044f59deSDeepak Ukey /* Determine length of data between previously stored transfer length 152044f59deSDeepak Ukey * and current accumulated transfer length 153044f59deSDeepak Ukey */ 154044f59deSDeepak Ukey length_to_read = 155044f59deSDeepak Ukey accum_len - pm8001_ha->forensic_preserved_accumulated_transfer; 156044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 157044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv: accum_len 0x%x\n", accum_len)); 158044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 159044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv: length_to_read 0x%x\n", 160044f59deSDeepak Ukey length_to_read)); 161044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 162044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv: last_offset 0x%x\n", 163044f59deSDeepak Ukey pm8001_ha->forensic_last_offset)); 164044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 165044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv: read_len 0x%x\n", 166044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.read_len)); 167044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 168044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv:: direct_len 0x%x\n", 169044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len)); 170044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 171044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv:: direct_offset 0x%x\n", 172044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_offset)); 173044f59deSDeepak Ukey 174044f59deSDeepak Ukey /* If accumulated length failed to read correctly fail the attempt.*/ 175d078b511SAnand Kumar Santhanam if (accum_len == 0xFFFFFFFF) { 176d078b511SAnand Kumar Santhanam PM8001_IO_DBG(pm8001_ha, 177d078b511SAnand Kumar Santhanam pm8001_printk("Possible PCI issue 0x%x not expected\n", 178d078b511SAnand Kumar Santhanam accum_len)); 179044f59deSDeepak Ukey return status; 180d078b511SAnand Kumar Santhanam } 181044f59deSDeepak Ukey /* If accumulated length is zero fail the attempt */ 182044f59deSDeepak Ukey if (accum_len == 0) { 183d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 184d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 185d078b511SAnand Kumar Santhanam "%08x ", 0xFFFFFFFF); 186d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 187d078b511SAnand Kumar Santhanam (char *)buf; 188d078b511SAnand Kumar Santhanam } 189044f59deSDeepak Ukey /* Accumulated length is good so start capturing the first data */ 190d078b511SAnand Kumar Santhanam temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 191d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 0) { 192d078b511SAnand Kumar Santhanam moreData: 193044f59deSDeepak Ukey /* If data to read is less than SYSFS_OFFSET then reduce the 194044f59deSDeepak Ukey * length of dataLen 195044f59deSDeepak Ukey */ 196044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset + SYSFS_OFFSET 197044f59deSDeepak Ukey > length_to_read) { 198044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 199044f59deSDeepak Ukey length_to_read - 200044f59deSDeepak Ukey pm8001_ha->forensic_last_offset; 201044f59deSDeepak Ukey } else { 202044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len = 203044f59deSDeepak Ukey SYSFS_OFFSET; 204044f59deSDeepak Ukey } 205d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_data) { 206d078b511SAnand Kumar Santhanam /* Data is in bar, copy to host memory */ 207044f59deSDeepak Ukey pm80xx_pci_mem_copy(pm8001_ha, 208044f59deSDeepak Ukey pm8001_ha->fatal_bar_loc, 209d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr, 210044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len, 1); 211d078b511SAnand Kumar Santhanam } 212d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc += 213d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 214d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_offset += 215d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 216d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset += 217d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 218d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 219d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 220d078b511SAnand Kumar Santhanam 221044f59deSDeepak Ukey if (pm8001_ha->forensic_last_offset >= length_to_read) { 222d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 223d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 224d078b511SAnand Kumar Santhanam "%08x ", 3); 225044f59deSDeepak Ukey for (index = 0; index < 226044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 227044f59deSDeepak Ukey / 4); index++) { 228d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 229044f59deSDeepak Ukey sprintf( 230044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 231d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 232d078b511SAnand Kumar Santhanam } 233d078b511SAnand Kumar Santhanam 234d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 235d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 1; 236d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset = 0; 237d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 238044f59deSDeepak Ukey status = 0; 239044f59deSDeepak Ukey offset = (int) 240044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 241044f59deSDeepak Ukey - (char *)buf); 242044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 243044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv:return1 0x%x\n", offset)); 244d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 245d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 246d078b511SAnand Kumar Santhanam (char *)buf; 247d078b511SAnand Kumar Santhanam } 248d078b511SAnand Kumar Santhanam if (pm8001_ha->fatal_bar_loc < (64 * 1024)) { 249d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 250d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 251d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 252d078b511SAnand Kumar Santhanam "%08x ", 2); 253044f59deSDeepak Ukey for (index = 0; index < 254044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 255044f59deSDeepak Ukey / 4); index++) { 256044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 257044f59deSDeepak Ukey += sprintf(pm8001_ha-> 258d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 259d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 260d078b511SAnand Kumar Santhanam } 261044f59deSDeepak Ukey status = 0; 262044f59deSDeepak Ukey offset = (int) 263044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 264044f59deSDeepak Ukey - (char *)buf); 265044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 266044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv:return2 0x%x\n", offset)); 267d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 268d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 269d078b511SAnand Kumar Santhanam (char *)buf; 270d078b511SAnand Kumar Santhanam } 271d078b511SAnand Kumar Santhanam 272d078b511SAnand Kumar Santhanam /* Increment the MEMBASE II Shifting Register value by 0x100.*/ 273d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 274d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 275d078b511SAnand Kumar Santhanam "%08x ", 2); 276044f59deSDeepak Ukey for (index = 0; index < 277044f59deSDeepak Ukey (pm8001_ha->forensic_info.data_buf.direct_len 278044f59deSDeepak Ukey / 4) ; index++) { 279d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 280d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 281d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 282d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 283d078b511SAnand Kumar Santhanam } 284d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset += 0x100; 285d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 286d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 287d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 288044f59deSDeepak Ukey status = 0; 289044f59deSDeepak Ukey offset = (int) 290044f59deSDeepak Ukey ((char *)pm8001_ha->forensic_info.data_buf.direct_data 291044f59deSDeepak Ukey - (char *)buf); 292044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 293044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv: return3 0x%x\n", offset)); 294d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 295d078b511SAnand Kumar Santhanam (char *)buf; 296d078b511SAnand Kumar Santhanam } 297d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 1) { 298044f59deSDeepak Ukey /* store previous accumulated length before triggering next 299044f59deSDeepak Ukey * accumulated length update 300044f59deSDeepak Ukey */ 301044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer = 302044f59deSDeepak Ukey pm8001_mr32(fatal_table_address, 303044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 304044f59deSDeepak Ukey 305044f59deSDeepak Ukey /* continue capturing the fatal log until Dump status is 0x3 */ 306044f59deSDeepak Ukey if (pm8001_mr32(fatal_table_address, 307044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS) < 308044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) { 309044f59deSDeepak Ukey 310044f59deSDeepak Ukey /* reset fddstat bit by writing to zero*/ 311044f59deSDeepak Ukey pm8001_mw32(fatal_table_address, 312044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS, 0x0); 313044f59deSDeepak Ukey 314044f59deSDeepak Ukey /* set dump control value to '1' so that new data will 315044f59deSDeepak Ukey * be transferred to shared memory 316044f59deSDeepak Ukey */ 317d078b511SAnand Kumar Santhanam pm8001_mw32(fatal_table_address, 318d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 319d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_HANDSHAKE_RDY); 320d078b511SAnand Kumar Santhanam 321d078b511SAnand Kumar Santhanam /*Poll FDDHSHK until clear */ 322d078b511SAnand Kumar Santhanam start = jiffies + (2 * HZ); /* 2 sec */ 323d078b511SAnand Kumar Santhanam 324d078b511SAnand Kumar Santhanam do { 325d078b511SAnand Kumar Santhanam reg_val = pm8001_mr32(fatal_table_address, 326d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE); 327d078b511SAnand Kumar Santhanam } while ((reg_val) && time_before(jiffies, start)); 328d078b511SAnand Kumar Santhanam 329d078b511SAnand Kumar Santhanam if (reg_val != 0) { 330044f59deSDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 331044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_HDSHAKE 0x%x\n", 332044f59deSDeepak Ukey reg_val)); 333044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 334044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 335044f59deSDeepak Ukey sprintf( 336044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 337044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 338044f59deSDeepak Ukey return((char *) 339044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data 340044f59deSDeepak Ukey - (char *)buf); 341d078b511SAnand Kumar Santhanam } 342044f59deSDeepak Ukey /* Poll status register until set to 2 or 343044f59deSDeepak Ukey * 3 for up to 2 seconds 344044f59deSDeepak Ukey */ 345044f59deSDeepak Ukey start = jiffies + (2 * HZ); /* 2 sec */ 346d078b511SAnand Kumar Santhanam 347044f59deSDeepak Ukey do { 348044f59deSDeepak Ukey reg_val = pm8001_mr32(fatal_table_address, 349044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_STATUS); 3500e7c353eSColin Ian King } while (((reg_val != 2) && (reg_val != 3)) && 351044f59deSDeepak Ukey time_before(jiffies, start)); 352044f59deSDeepak Ukey 353044f59deSDeepak Ukey if (reg_val < 2) { 354044f59deSDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 355044f59deSDeepak Ukey "TIMEOUT:MPI_FATAL_EDUMP_TABLE_STATUS = 0x%x\n", 356044f59deSDeepak Ukey reg_val)); 357044f59deSDeepak Ukey /* Fail the dump if a timeout occurs */ 358044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data += 359044f59deSDeepak Ukey sprintf( 360044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 361044f59deSDeepak Ukey "%08x ", 0xFFFFFFFF); 362044f59deSDeepak Ukey pm8001_cw32(pm8001_ha, 0, 363044f59deSDeepak Ukey MEMBASE_II_SHIFT_REGISTER, 364044f59deSDeepak Ukey pm8001_ha->fatal_forensic_shift_offset); 365044f59deSDeepak Ukey } 366044f59deSDeepak Ukey /* Read the next block of the debug data.*/ 367044f59deSDeepak Ukey length_to_read = pm8001_mr32(fatal_table_address, 368044f59deSDeepak Ukey MPI_FATAL_EDUMP_TABLE_ACCUM_LEN) - 369044f59deSDeepak Ukey pm8001_ha->forensic_preserved_accumulated_transfer; 370044f59deSDeepak Ukey if (length_to_read != 0x0) { 371d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 372d078b511SAnand Kumar Santhanam goto moreData; 373d078b511SAnand Kumar Santhanam } else { 374d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 375044f59deSDeepak Ukey sprintf( 376044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_data, 377d078b511SAnand Kumar Santhanam "%08x ", 4); 378044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.read_len 379044f59deSDeepak Ukey = 0xFFFFFFFF; 380044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_len 381044f59deSDeepak Ukey = 0; 382044f59deSDeepak Ukey pm8001_ha->forensic_info.data_buf.direct_offset 383044f59deSDeepak Ukey = 0; 384d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 385d078b511SAnand Kumar Santhanam } 386d078b511SAnand Kumar Santhanam } 387044f59deSDeepak Ukey } 388044f59deSDeepak Ukey offset = (int)((char *)pm8001_ha->forensic_info.data_buf.direct_data 389044f59deSDeepak Ukey - (char *)buf); 390044f59deSDeepak Ukey PM8001_IO_DBG(pm8001_ha, 391044f59deSDeepak Ukey pm8001_printk("get_fatal_spcv: return4 0x%x\n", offset)); 392d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 393d078b511SAnand Kumar Santhanam (char *)buf; 394d078b511SAnand Kumar Santhanam } 395d078b511SAnand Kumar Santhanam 396f5860992SSakthivel K /** 397f5860992SSakthivel K * read_main_config_table - read the configure table and save it. 398f5860992SSakthivel K * @pm8001_ha: our hba card information 399f5860992SSakthivel K */ 400f5860992SSakthivel K static void read_main_config_table(struct pm8001_hba_info *pm8001_ha) 401f5860992SSakthivel K { 402f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 403f5860992SSakthivel K 404f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature = 405f5860992SSakthivel K pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); 406f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev = 407f5860992SSakthivel K pm8001_mr32(address, MAIN_INTERFACE_REVISION); 408f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev = 409f5860992SSakthivel K pm8001_mr32(address, MAIN_FW_REVISION); 410f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io = 411f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); 412f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl = 413f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); 414f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag = 415f5860992SSakthivel K pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); 416f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset = 417f5860992SSakthivel K pm8001_mr32(address, MAIN_GST_OFFSET); 418f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset = 419f5860992SSakthivel K pm8001_mr32(address, MAIN_IBQ_OFFSET); 420f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset = 421f5860992SSakthivel K pm8001_mr32(address, MAIN_OBQ_OFFSET); 422f5860992SSakthivel K 423f5860992SSakthivel K /* read Error Dump Offset and Length */ 424f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 = 425f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); 426f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 = 427f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); 428f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 = 429f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); 430f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 = 431f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); 432f5860992SSakthivel K 433f5860992SSakthivel K /* read GPIO LED settings from the configuration table */ 434f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping = 435f5860992SSakthivel K pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); 436f5860992SSakthivel K 437f5860992SSakthivel K /* read analog Setting offset from the configuration table */ 438f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset = 439f5860992SSakthivel K pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); 440f5860992SSakthivel K 441f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset = 442f5860992SSakthivel K pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); 443f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset = 444f5860992SSakthivel K pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); 4458414cd80SViswas G /* read port recover and reset timeout */ 4468414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer = 4478414cd80SViswas G pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); 44824fff017SViswas G /* read ILA and inactive firmware version */ 44924fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version = 45024fff017SViswas G pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE); 45124fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version = 45224fff017SViswas G pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION); 4537370672dSpeter chang 4547370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 4557370672dSpeter chang "Main cfg table: sign:%x interface rev:%x fw_rev:%x\n", 4567370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature, 4577370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev, 4587370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev)); 4597370672dSpeter chang 4607370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 4617370672dSpeter chang "table offset: gst:%x iq:%x oq:%x int vec:%x phy attr:%x\n", 4627370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset, 4637370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset, 4647370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset, 4657370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset, 4667370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset)); 4677370672dSpeter chang 4687370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 4697370672dSpeter chang "Main cfg table; ila rev:%x Inactive fw rev:%x\n", 4707370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version, 4717370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version)); 472f5860992SSakthivel K } 473f5860992SSakthivel K 474f5860992SSakthivel K /** 475f5860992SSakthivel K * read_general_status_table - read the general status table and save it. 476f5860992SSakthivel K * @pm8001_ha: our hba card information 477f5860992SSakthivel K */ 478f5860992SSakthivel K static void read_general_status_table(struct pm8001_hba_info *pm8001_ha) 479f5860992SSakthivel K { 480f5860992SSakthivel K void __iomem *address = pm8001_ha->general_stat_tbl_addr; 481f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate = 482f5860992SSakthivel K pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); 483f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 = 484f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); 485f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 = 486f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); 487f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt = 488f5860992SSakthivel K pm8001_mr32(address, GST_MSGUTCNT_OFFSET); 489f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt = 490f5860992SSakthivel K pm8001_mr32(address, GST_IOPTCNT_OFFSET); 491f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val = 492f5860992SSakthivel K pm8001_mr32(address, GST_GPIO_INPUT_VAL); 493f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[0] = 494f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET0); 495f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[1] = 496f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET1); 497f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[2] = 498f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET2); 499f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[3] = 500f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET3); 501f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[4] = 502f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET4); 503f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[5] = 504f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET5); 505f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[6] = 506f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET6); 507f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[7] = 508f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET7); 509f5860992SSakthivel K } 510f5860992SSakthivel K /** 511f5860992SSakthivel K * read_phy_attr_table - read the phy attribute table and save it. 512f5860992SSakthivel K * @pm8001_ha: our hba card information 513f5860992SSakthivel K */ 514f5860992SSakthivel K static void read_phy_attr_table(struct pm8001_hba_info *pm8001_ha) 515f5860992SSakthivel K { 516f5860992SSakthivel K void __iomem *address = pm8001_ha->pspa_q_tbl_addr; 517f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[0] = 518f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); 519f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[1] = 520f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); 521f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[2] = 522f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); 523f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[3] = 524f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); 525f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[4] = 526f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); 527f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[5] = 528f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); 529f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[6] = 530f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); 531f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[7] = 532f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); 533f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[8] = 534f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); 535f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[9] = 536f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); 537f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[10] = 538f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); 539f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[11] = 540f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); 541f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[12] = 542f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); 543f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[13] = 544f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); 545f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[14] = 546f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); 547f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[15] = 548f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); 549f5860992SSakthivel K 550f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[0] = 551f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); 552f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[1] = 553f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); 554f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[2] = 555f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); 556f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[3] = 557f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); 558f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[4] = 559f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); 560f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[5] = 561f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); 562f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[6] = 563f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); 564f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[7] = 565f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); 566f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[8] = 567f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); 568f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[9] = 569f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); 570f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[10] = 571f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); 572f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[11] = 573f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); 574f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[12] = 575f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); 576f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[13] = 577f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); 578f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[14] = 579f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); 580f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[15] = 581f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); 582f5860992SSakthivel K 583f5860992SSakthivel K } 584f5860992SSakthivel K 585f5860992SSakthivel K /** 586f5860992SSakthivel K * read_inbnd_queue_table - read the inbound queue table and save it. 587f5860992SSakthivel K * @pm8001_ha: our hba card information 588f5860992SSakthivel K */ 589f5860992SSakthivel K static void read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 590f5860992SSakthivel K { 591f5860992SSakthivel K int i; 592f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 593f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) { 594f5860992SSakthivel K u32 offset = i * 0x20; 595f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 596f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 597f5860992SSakthivel K (offset + IB_PIPCI_BAR))); 598f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 599f5860992SSakthivel K pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); 600f5860992SSakthivel K } 601f5860992SSakthivel K } 602f5860992SSakthivel K 603f5860992SSakthivel K /** 604f5860992SSakthivel K * read_outbnd_queue_table - read the outbound queue table and save it. 605f5860992SSakthivel K * @pm8001_ha: our hba card information 606f5860992SSakthivel K */ 607f5860992SSakthivel K static void read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 608f5860992SSakthivel K { 609f5860992SSakthivel K int i; 610f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 611f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) { 612f5860992SSakthivel K u32 offset = i * 0x24; 613f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 614f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 615f5860992SSakthivel K (offset + OB_CIPCI_BAR))); 616f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 617f5860992SSakthivel K pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); 618f5860992SSakthivel K } 619f5860992SSakthivel K } 620f5860992SSakthivel K 621f5860992SSakthivel K /** 622f5860992SSakthivel K * init_default_table_values - init the default table. 623f5860992SSakthivel K * @pm8001_ha: our hba card information 624f5860992SSakthivel K */ 625f5860992SSakthivel K static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) 626f5860992SSakthivel K { 627f5860992SSakthivel K int i; 628f5860992SSakthivel K u32 offsetib, offsetob; 629f5860992SSakthivel K void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr; 630f5860992SSakthivel K void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr; 631f5860992SSakthivel K 632f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr = 633f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_hi; 634f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr = 635f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_lo; 636f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size = 637f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 638f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity = 0x01; 639f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr = 640f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_hi; 641f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr = 642f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_lo; 643f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size = 644f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 645f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01; 646f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01; 647f5860992SSakthivel K 648c6b9ef57SSakthivel K /* Disable end to end CRC checking */ 649c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16); 650c6b9ef57SSakthivel K 651f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) { 652f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt = 6539504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30); 654f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].upper_base_addr = 655f5860992SSakthivel K pm8001_ha->memoryMap.region[IB + i].phys_addr_hi; 656f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].lower_base_addr = 657f5860992SSakthivel K pm8001_ha->memoryMap.region[IB + i].phys_addr_lo; 658f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].base_virt = 659f5860992SSakthivel K (u8 *)pm8001_ha->memoryMap.region[IB + i].virt_ptr; 660f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].total_length = 661f5860992SSakthivel K pm8001_ha->memoryMap.region[IB + i].total_len; 662f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr = 663f5860992SSakthivel K pm8001_ha->memoryMap.region[CI + i].phys_addr_hi; 664f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr = 665f5860992SSakthivel K pm8001_ha->memoryMap.region[CI + i].phys_addr_lo; 666f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_virt = 667f5860992SSakthivel K pm8001_ha->memoryMap.region[CI + i].virt_ptr; 668f5860992SSakthivel K offsetib = i * 0x20; 669f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 670f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressib, 671f5860992SSakthivel K (offsetib + 0x14))); 672f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 673f5860992SSakthivel K pm8001_mr32(addressib, (offsetib + 0x18)); 674f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].producer_idx = 0; 675f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].consumer_index = 0; 6767370672dSpeter chang 6777370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 6787370672dSpeter chang "IQ %d pi_bar 0x%x pi_offset 0x%x\n", i, 6797370672dSpeter chang pm8001_ha->inbnd_q_tbl[i].pi_pci_bar, 6807370672dSpeter chang pm8001_ha->inbnd_q_tbl[i].pi_offset)); 681f5860992SSakthivel K } 682f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) { 683f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].element_size_cnt = 6849504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30); 685f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].upper_base_addr = 686f5860992SSakthivel K pm8001_ha->memoryMap.region[OB + i].phys_addr_hi; 687f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].lower_base_addr = 688f5860992SSakthivel K pm8001_ha->memoryMap.region[OB + i].phys_addr_lo; 689f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].base_virt = 690f5860992SSakthivel K (u8 *)pm8001_ha->memoryMap.region[OB + i].virt_ptr; 691f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].total_length = 692f5860992SSakthivel K pm8001_ha->memoryMap.region[OB + i].total_len; 693f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr = 694f5860992SSakthivel K pm8001_ha->memoryMap.region[PI + i].phys_addr_hi; 695f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr = 696f5860992SSakthivel K pm8001_ha->memoryMap.region[PI + i].phys_addr_lo; 697f5860992SSakthivel K /* interrupt vector based on oq */ 698f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24); 699f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_virt = 700f5860992SSakthivel K pm8001_ha->memoryMap.region[PI + i].virt_ptr; 701f5860992SSakthivel K offsetob = i * 0x24; 702f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 703f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressob, 704f5860992SSakthivel K offsetob + 0x14)); 705f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 706f5860992SSakthivel K pm8001_mr32(addressob, (offsetob + 0x18)); 707f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0; 708f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].producer_index = 0; 7097370672dSpeter chang 7107370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 7117370672dSpeter chang "OQ %d ci_bar 0x%x ci_offset 0x%x\n", i, 7127370672dSpeter chang pm8001_ha->outbnd_q_tbl[i].ci_pci_bar, 7137370672dSpeter chang pm8001_ha->outbnd_q_tbl[i].ci_offset)); 714f5860992SSakthivel K } 715f5860992SSakthivel K } 716f5860992SSakthivel K 717f5860992SSakthivel K /** 718f5860992SSakthivel K * update_main_config_table - update the main default table to the HBA. 719f5860992SSakthivel K * @pm8001_ha: our hba card information 720f5860992SSakthivel K */ 721f5860992SSakthivel K static void update_main_config_table(struct pm8001_hba_info *pm8001_ha) 722f5860992SSakthivel K { 723f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 724f5860992SSakthivel K pm8001_mw32(address, MAIN_IQNPPD_HPPD_OFFSET, 725f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_q_nppd_hppd); 726f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_HI, 727f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr); 728f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_LO, 729f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr); 730f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_BUFF_SIZE, 731f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size); 732f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_OPTION, 733f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity); 734f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_HI, 735f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr); 736f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_LO, 737f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr); 738f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_BUFF_SIZE, 739f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size); 740f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_OPTION, 741f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity); 74272349b62SDeepak Ukey /* Update Fatal error interrupt vector */ 74372349b62SDeepak Ukey pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= 74472349b62SDeepak Ukey ((pm8001_ha->number_of_intr - 1) << 8); 745f5860992SSakthivel K pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT, 746f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt); 7477370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 7487370672dSpeter chang "Updated Fatal error interrupt vector 0x%x\n", 7497370672dSpeter chang pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT))); 7507370672dSpeter chang 751c6b9ef57SSakthivel K pm8001_mw32(address, MAIN_EVENT_CRC_CHECK, 752c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump); 753f5860992SSakthivel K 754f5860992SSakthivel K /* SPCv specific */ 755f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping &= 0xCFFFFFFF; 756f5860992SSakthivel K /* Set GPIOLED to 0x2 for LED indicator */ 757f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000; 758f5860992SSakthivel K pm8001_mw32(address, MAIN_GPIO_LED_FLAGS_OFFSET, 759f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping); 7607370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 7617370672dSpeter chang "Programming DW 0x21 in main cfg table with 0x%x\n", 7627370672dSpeter chang pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET))); 763f5860992SSakthivel K 764f5860992SSakthivel K pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 765f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 766f5860992SSakthivel K pm8001_mw32(address, MAIN_INT_REASSERTION_DELAY, 767f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interrupt_reassertion_delay); 7688414cd80SViswas G 7698414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 0xffff0000; 7708414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 7718414cd80SViswas G PORT_RECOVERY_TIMEOUT; 77261daffdeSViswas G if (pm8001_ha->chip_id == chip_8006) { 77361daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 77461daffdeSViswas G 0x0000ffff; 77561daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 776196ba662SDeepak Ukey CHIP_8006_PORT_RECOVERY_TIMEOUT; 77761daffdeSViswas G } 7788414cd80SViswas G pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 7798414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 780f5860992SSakthivel K } 781f5860992SSakthivel K 782f5860992SSakthivel K /** 783f5860992SSakthivel K * update_inbnd_queue_table - update the inbound queue table to the HBA. 784f5860992SSakthivel K * @pm8001_ha: our hba card information 785f5860992SSakthivel K */ 786f5860992SSakthivel K static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 787f5860992SSakthivel K int number) 788f5860992SSakthivel K { 789f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 790f5860992SSakthivel K u16 offset = number * 0x20; 791f5860992SSakthivel K pm8001_mw32(address, offset + IB_PROPERITY_OFFSET, 792f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 793f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_HI_OFFSET, 794f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].upper_base_addr); 795f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_LO_OFFSET, 796f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 797f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_HI_OFFSET, 798f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr); 799f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_LO_OFFSET, 800f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 8017370672dSpeter chang 8027370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 8037370672dSpeter chang "IQ %d: Element pri size 0x%x\n", 8047370672dSpeter chang number, 8057370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt)); 8067370672dSpeter chang 8077370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 8087370672dSpeter chang "IQ upr base addr 0x%x IQ lwr base addr 0x%x\n", 8097370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].upper_base_addr, 8107370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].lower_base_addr)); 8117370672dSpeter chang 8127370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 8137370672dSpeter chang "CI upper base addr 0x%x CI lower base addr 0x%x\n", 8147370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr, 8157370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr)); 816f5860992SSakthivel K } 817f5860992SSakthivel K 818f5860992SSakthivel K /** 819f5860992SSakthivel K * update_outbnd_queue_table - update the outbound queue table to the HBA. 820f5860992SSakthivel K * @pm8001_ha: our hba card information 821f5860992SSakthivel K */ 822f5860992SSakthivel K static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 823f5860992SSakthivel K int number) 824f5860992SSakthivel K { 825f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 826f5860992SSakthivel K u16 offset = number * 0x24; 827f5860992SSakthivel K pm8001_mw32(address, offset + OB_PROPERITY_OFFSET, 828f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 829f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_HI_OFFSET, 830f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].upper_base_addr); 831f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_LO_OFFSET, 832f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 833f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_HI_OFFSET, 834f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr); 835f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_LO_OFFSET, 836f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 837f5860992SSakthivel K pm8001_mw32(address, offset + OB_INTERRUPT_COALES_OFFSET, 838f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay); 8397370672dSpeter chang 8407370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 8417370672dSpeter chang "OQ %d: Element pri size 0x%x\n", 8427370672dSpeter chang number, 8437370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].element_size_cnt)); 8447370672dSpeter chang 8457370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 8467370672dSpeter chang "OQ upr base addr 0x%x OQ lwr base addr 0x%x\n", 8477370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].upper_base_addr, 8487370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].lower_base_addr)); 8497370672dSpeter chang 8507370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 8517370672dSpeter chang "PI upper base addr 0x%x PI lower base addr 0x%x\n", 8527370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr, 8537370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr)); 854f5860992SSakthivel K } 855f5860992SSakthivel K 856f5860992SSakthivel K /** 857f5860992SSakthivel K * mpi_init_check - check firmware initialization status. 858f5860992SSakthivel K * @pm8001_ha: our hba card information 859f5860992SSakthivel K */ 860f5860992SSakthivel K static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) 861f5860992SSakthivel K { 862f5860992SSakthivel K u32 max_wait_count; 863f5860992SSakthivel K u32 value; 864f5860992SSakthivel K u32 gst_len_mpistate; 865f5860992SSakthivel K 866f5860992SSakthivel K /* Write bit0=1 to Inbound DoorBell Register to tell the SPC FW the 867f5860992SSakthivel K table is updated */ 868f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE); 869f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 870a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 871e90e2362Sianyar max_wait_count = SPCV_DOORBELL_CLEAR_TIMEOUT; 872a9a923e5SAnand Kumar Santhanam } else { 873e90e2362Sianyar max_wait_count = SPC_DOORBELL_CLEAR_TIMEOUT; 874a9a923e5SAnand Kumar Santhanam } 875f5860992SSakthivel K do { 876f5860992SSakthivel K udelay(1); 877f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 878f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_UPDATE; 879f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 880f5860992SSakthivel K 881f5860992SSakthivel K if (!max_wait_count) 882f5860992SSakthivel K return -1; 883f5860992SSakthivel K /* check the MPI-State for initialization upto 100ms*/ 884f5860992SSakthivel K max_wait_count = 100 * 1000;/* 100 msec */ 885f5860992SSakthivel K do { 886f5860992SSakthivel K udelay(1); 887f5860992SSakthivel K gst_len_mpistate = 888f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 889f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 890f5860992SSakthivel K } while ((GST_MPI_STATE_INIT != 891f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count)); 892f5860992SSakthivel K if (!max_wait_count) 893f5860992SSakthivel K return -1; 894f5860992SSakthivel K 895f5860992SSakthivel K /* check MPI Initialization error */ 896f5860992SSakthivel K gst_len_mpistate = gst_len_mpistate >> 16; 897f5860992SSakthivel K if (0x0000 != gst_len_mpistate) 898f5860992SSakthivel K return -1; 899f5860992SSakthivel K 900f5860992SSakthivel K return 0; 901f5860992SSakthivel K } 902f5860992SSakthivel K 903f5860992SSakthivel K /** 904f5860992SSakthivel K * check_fw_ready - The LLDD check if the FW is ready, if not, return error. 905f5860992SSakthivel K * @pm8001_ha: our hba card information 906f5860992SSakthivel K */ 907f5860992SSakthivel K static int check_fw_ready(struct pm8001_hba_info *pm8001_ha) 908f5860992SSakthivel K { 909f5860992SSakthivel K u32 value; 910f5860992SSakthivel K u32 max_wait_count; 911f5860992SSakthivel K u32 max_wait_time; 912f5860992SSakthivel K int ret = 0; 913f5860992SSakthivel K 914f5860992SSakthivel K /* reset / PCIe ready */ 915f5860992SSakthivel K max_wait_time = max_wait_count = 100 * 1000; /* 100 milli sec */ 916f5860992SSakthivel K do { 917f5860992SSakthivel K udelay(1); 918f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 919f5860992SSakthivel K } while ((value == 0xFFFFFFFF) && (--max_wait_count)); 920f5860992SSakthivel K 921f5860992SSakthivel K /* check ila status */ 922f5860992SSakthivel K max_wait_time = max_wait_count = 1000 * 1000; /* 1000 milli sec */ 923f5860992SSakthivel K do { 924f5860992SSakthivel K udelay(1); 925f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 926f5860992SSakthivel K } while (((value & SCRATCH_PAD_ILA_READY) != 927f5860992SSakthivel K SCRATCH_PAD_ILA_READY) && (--max_wait_count)); 928f5860992SSakthivel K if (!max_wait_count) 929f5860992SSakthivel K ret = -1; 930f5860992SSakthivel K else { 931f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 932f5860992SSakthivel K pm8001_printk(" ila ready status in %d millisec\n", 933f5860992SSakthivel K (max_wait_time - max_wait_count))); 934f5860992SSakthivel K } 935f5860992SSakthivel K 936f5860992SSakthivel K /* check RAAE status */ 937f5860992SSakthivel K max_wait_time = max_wait_count = 1800 * 1000; /* 1800 milli sec */ 938f5860992SSakthivel K do { 939f5860992SSakthivel K udelay(1); 940f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 941f5860992SSakthivel K } while (((value & SCRATCH_PAD_RAAE_READY) != 942f5860992SSakthivel K SCRATCH_PAD_RAAE_READY) && (--max_wait_count)); 943f5860992SSakthivel K if (!max_wait_count) 944f5860992SSakthivel K ret = -1; 945f5860992SSakthivel K else { 946f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 947f5860992SSakthivel K pm8001_printk(" raae ready status in %d millisec\n", 948f5860992SSakthivel K (max_wait_time - max_wait_count))); 949f5860992SSakthivel K } 950f5860992SSakthivel K 951f5860992SSakthivel K /* check iop0 status */ 952f5860992SSakthivel K max_wait_time = max_wait_count = 600 * 1000; /* 600 milli sec */ 953f5860992SSakthivel K do { 954f5860992SSakthivel K udelay(1); 955f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 956f5860992SSakthivel K } while (((value & SCRATCH_PAD_IOP0_READY) != SCRATCH_PAD_IOP0_READY) && 957f5860992SSakthivel K (--max_wait_count)); 958f5860992SSakthivel K if (!max_wait_count) 959f5860992SSakthivel K ret = -1; 960f5860992SSakthivel K else { 961f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 962f5860992SSakthivel K pm8001_printk(" iop0 ready status in %d millisec\n", 963f5860992SSakthivel K (max_wait_time - max_wait_count))); 964f5860992SSakthivel K } 965f5860992SSakthivel K 966f5860992SSakthivel K /* check iop1 status only for 16 port controllers */ 967f5860992SSakthivel K if ((pm8001_ha->chip_id != chip_8008) && 968f5860992SSakthivel K (pm8001_ha->chip_id != chip_8009)) { 969f5860992SSakthivel K /* 200 milli sec */ 970f5860992SSakthivel K max_wait_time = max_wait_count = 200 * 1000; 971f5860992SSakthivel K do { 972f5860992SSakthivel K udelay(1); 973f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 974f5860992SSakthivel K } while (((value & SCRATCH_PAD_IOP1_READY) != 975f5860992SSakthivel K SCRATCH_PAD_IOP1_READY) && (--max_wait_count)); 976f5860992SSakthivel K if (!max_wait_count) 977f5860992SSakthivel K ret = -1; 978f5860992SSakthivel K else { 979f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 980f5860992SSakthivel K "iop1 ready status in %d millisec\n", 981f5860992SSakthivel K (max_wait_time - max_wait_count))); 982f5860992SSakthivel K } 983f5860992SSakthivel K } 984f5860992SSakthivel K 985f5860992SSakthivel K return ret; 986f5860992SSakthivel K } 987f5860992SSakthivel K 988f5860992SSakthivel K static void init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) 989f5860992SSakthivel K { 990f5860992SSakthivel K void __iomem *base_addr; 991f5860992SSakthivel K u32 value; 992f5860992SSakthivel K u32 offset; 993f5860992SSakthivel K u32 pcibar; 994f5860992SSakthivel K u32 pcilogic; 995f5860992SSakthivel K 996f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 997f5860992SSakthivel K offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */ 998f5860992SSakthivel K 9997370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, 1000f5860992SSakthivel K pm8001_printk("Scratchpad 0 Offset: 0x%x value 0x%x\n", 1001f5860992SSakthivel K offset, value)); 1002f5860992SSakthivel K pcilogic = (value & 0xFC000000) >> 26; 1003f5860992SSakthivel K pcibar = get_pci_bar_index(pcilogic); 1004f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1005f5860992SSakthivel K pm8001_printk("Scratchpad 0 PCI BAR: %d\n", pcibar)); 1006f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr = base_addr = 1007f5860992SSakthivel K pm8001_ha->io_mem[pcibar].memvirtaddr + offset; 1008f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr = 1009f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x18) & 1010f5860992SSakthivel K 0xFFFFFF); 1011f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr = 1012f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C) & 1013f5860992SSakthivel K 0xFFFFFF); 1014f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr = 1015f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x20) & 1016f5860992SSakthivel K 0xFFFFFF); 1017f5860992SSakthivel K pm8001_ha->ivt_tbl_addr = 1018f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C) & 1019f5860992SSakthivel K 0xFFFFFF); 1020f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr = 1021f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x90) & 1022f5860992SSakthivel K 0xFFFFFF); 1023d078b511SAnand Kumar Santhanam pm8001_ha->fatal_tbl_addr = 1024d078b511SAnand Kumar Santhanam base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) & 1025d078b511SAnand Kumar Santhanam 0xFFFFFF); 1026f5860992SSakthivel K 1027f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1028f5860992SSakthivel K pm8001_printk("GST OFFSET 0x%x\n", 1029f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x18))); 1030f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1031f5860992SSakthivel K pm8001_printk("INBND OFFSET 0x%x\n", 1032f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C))); 1033f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1034f5860992SSakthivel K pm8001_printk("OBND OFFSET 0x%x\n", 1035f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x20))); 1036f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1037f5860992SSakthivel K pm8001_printk("IVT OFFSET 0x%x\n", 1038f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C))); 1039f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1040f5860992SSakthivel K pm8001_printk("PSPA OFFSET 0x%x\n", 1041f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x90))); 1042f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1043f5860992SSakthivel K pm8001_printk("addr - main cfg %p general status %p\n", 1044f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr, 1045f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr)); 1046f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1047f5860992SSakthivel K pm8001_printk("addr - inbnd %p obnd %p\n", 1048f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr, 1049f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr)); 1050f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1051f5860992SSakthivel K pm8001_printk("addr - pspa %p ivt %p\n", 1052f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr, 1053f5860992SSakthivel K pm8001_ha->ivt_tbl_addr)); 1054f5860992SSakthivel K } 1055f5860992SSakthivel K 1056f5860992SSakthivel K /** 1057f5860992SSakthivel K * pm80xx_set_thermal_config - support the thermal configuration 1058f5860992SSakthivel K * @pm8001_ha: our hba card information. 1059f5860992SSakthivel K */ 1060a6cb3d01SSakthivel K int 1061f5860992SSakthivel K pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha) 1062f5860992SSakthivel K { 1063f5860992SSakthivel K struct set_ctrl_cfg_req payload; 1064f5860992SSakthivel K struct inbound_queue_table *circularQ; 1065f5860992SSakthivel K int rc; 1066f5860992SSakthivel K u32 tag; 1067f5860992SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1068842784e0SViswas G u32 page_code; 1069f5860992SSakthivel K 1070f5860992SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1071f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1072f5860992SSakthivel K if (rc) 1073f5860992SSakthivel K return -1; 1074f5860992SSakthivel K 1075f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1076f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1077842784e0SViswas G 1078842784e0SViswas G if (IS_SPCV_12G(pm8001_ha->pdev)) 1079842784e0SViswas G page_code = THERMAL_PAGE_CODE_7H; 1080842784e0SViswas G else 1081842784e0SViswas G page_code = THERMAL_PAGE_CODE_8H; 1082842784e0SViswas G 1083f5860992SSakthivel K payload.cfg_pg[0] = (THERMAL_LOG_ENABLE << 9) | 1084842784e0SViswas G (THERMAL_ENABLE << 8) | page_code; 1085f5860992SSakthivel K payload.cfg_pg[1] = (LTEMPHIL << 24) | (RTEMPHIL << 8); 1086f5860992SSakthivel K 10877370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 10887370672dSpeter chang "Setting up thermal config. cfg_pg 0 0x%x cfg_pg 1 0x%x\n", 10897370672dSpeter chang payload.cfg_pg[0], payload.cfg_pg[1])); 10907370672dSpeter chang 109191a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 109291a43fa6Speter chang sizeof(payload), 0); 10935533abcaSTomas Henzl if (rc) 10945533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1095f5860992SSakthivel K return rc; 1096f5860992SSakthivel K 1097f5860992SSakthivel K } 1098f5860992SSakthivel K 1099f5860992SSakthivel K /** 1100a6cb3d01SSakthivel K * pm80xx_set_sas_protocol_timer_config - support the SAS Protocol 1101a6cb3d01SSakthivel K * Timer configuration page 1102a6cb3d01SSakthivel K * @pm8001_ha: our hba card information. 1103a6cb3d01SSakthivel K */ 1104a6cb3d01SSakthivel K static int 1105a6cb3d01SSakthivel K pm80xx_set_sas_protocol_timer_config(struct pm8001_hba_info *pm8001_ha) 1106a6cb3d01SSakthivel K { 1107a6cb3d01SSakthivel K struct set_ctrl_cfg_req payload; 1108a6cb3d01SSakthivel K struct inbound_queue_table *circularQ; 1109a6cb3d01SSakthivel K SASProtocolTimerConfig_t SASConfigPage; 1110a6cb3d01SSakthivel K int rc; 1111a6cb3d01SSakthivel K u32 tag; 1112a6cb3d01SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 1113a6cb3d01SSakthivel K 1114a6cb3d01SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 1115a6cb3d01SSakthivel K memset(&SASConfigPage, 0, sizeof(SASProtocolTimerConfig_t)); 1116a6cb3d01SSakthivel K 1117a6cb3d01SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1118a6cb3d01SSakthivel K 1119a6cb3d01SSakthivel K if (rc) 1120a6cb3d01SSakthivel K return -1; 1121a6cb3d01SSakthivel K 1122a6cb3d01SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1123a6cb3d01SSakthivel K payload.tag = cpu_to_le32(tag); 1124a6cb3d01SSakthivel K 1125a6cb3d01SSakthivel K SASConfigPage.pageCode = SAS_PROTOCOL_TIMER_CONFIG_PAGE; 1126a6cb3d01SSakthivel K SASConfigPage.MST_MSI = 3 << 15; 1127a6cb3d01SSakthivel K SASConfigPage.STP_SSP_MCT_TMO = (STP_MCT_TMO << 16) | SSP_MCT_TMO; 1128a6cb3d01SSakthivel K SASConfigPage.STP_FRM_TMO = (SAS_MAX_OPEN_TIME << 24) | 1129a6cb3d01SSakthivel K (SMP_MAX_CONN_TIMER << 16) | STP_FRM_TIMER; 1130a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = STP_IDLE_TIME; 1131a6cb3d01SSakthivel K 1132a6cb3d01SSakthivel K if (SASConfigPage.STP_IDLE_TMO > 0x3FFFFFF) 1133a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = 0x3FFFFFF; 1134a6cb3d01SSakthivel K 1135a6cb3d01SSakthivel K 1136a6cb3d01SSakthivel K SASConfigPage.OPNRJT_RTRY_INTVL = (SAS_MFD << 16) | 1137a6cb3d01SSakthivel K SAS_OPNRJT_RTRY_INTVL; 1138a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO = (SAS_DOPNRJT_RTRY_TMO << 16) 1139a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_TMO; 1140a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR = (SAS_DOPNRJT_RTRY_THR << 16) 1141a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_THR; 1142a6cb3d01SSakthivel K SASConfigPage.MAX_AIP = SAS_MAX_AIP; 1143a6cb3d01SSakthivel K 1144a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1145a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.pageCode " 1146a6cb3d01SSakthivel K "0x%08x\n", SASConfigPage.pageCode)); 1147a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1148a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.MST_MSI " 1149a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.MST_MSI)); 1150a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1151a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.STP_SSP_MCT_TMO " 1152a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.STP_SSP_MCT_TMO)); 1153a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1154a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.STP_FRM_TMO " 1155a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.STP_FRM_TMO)); 1156a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1157a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.STP_IDLE_TMO " 1158a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.STP_IDLE_TMO)); 1159a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1160a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.OPNRJT_RTRY_INTVL " 1161a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.OPNRJT_RTRY_INTVL)); 1162a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1163a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO " 1164a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO)); 1165a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1166a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR " 1167a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR)); 1168a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk("SASConfigPage.MAX_AIP " 1169a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.MAX_AIP)); 1170a6cb3d01SSakthivel K 1171a6cb3d01SSakthivel K memcpy(&payload.cfg_pg, &SASConfigPage, 1172a6cb3d01SSakthivel K sizeof(SASProtocolTimerConfig_t)); 1173a6cb3d01SSakthivel K 117491a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 117591a43fa6Speter chang sizeof(payload), 0); 11765533abcaSTomas Henzl if (rc) 11775533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1178a6cb3d01SSakthivel K 1179a6cb3d01SSakthivel K return rc; 1180a6cb3d01SSakthivel K } 1181a6cb3d01SSakthivel K 1182a6cb3d01SSakthivel K /** 1183f5860992SSakthivel K * pm80xx_get_encrypt_info - Check for encryption 1184f5860992SSakthivel K * @pm8001_ha: our hba card information. 1185f5860992SSakthivel K */ 1186f5860992SSakthivel K static int 1187f5860992SSakthivel K pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha) 1188f5860992SSakthivel K { 1189f5860992SSakthivel K u32 scratch3_value; 1190da225498SRickard Strandqvist int ret = -1; 1191f5860992SSakthivel K 1192f5860992SSakthivel K /* Read encryption status from SCRATCH PAD 3 */ 1193f5860992SSakthivel K scratch3_value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 1194f5860992SSakthivel K 1195f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1196f5860992SSakthivel K SCRATCH_PAD3_ENC_READY) { 1197f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1198f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1199f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1200f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1201f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1202f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1203f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1204f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1205f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1206f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1207f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1208f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0; 1209f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1210f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X." 1211f5860992SSakthivel K "Cipher mode 0x%x Sec mode 0x%x status 0x%x\n", 1212f5860992SSakthivel K scratch3_value, pm8001_ha->encrypt_info.cipher_mode, 1213f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 1214f5860992SSakthivel K pm8001_ha->encrypt_info.status)); 1215f5860992SSakthivel K ret = 0; 1216f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_READY) == 1217f5860992SSakthivel K SCRATCH_PAD3_ENC_DISABLED) { 1218f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1219f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n", 1220f5860992SSakthivel K scratch3_value)); 1221f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0xFFFFFFFF; 1222f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = 0; 1223f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = 0; 1224da225498SRickard Strandqvist ret = 0; 1225f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1226f5860992SSakthivel K SCRATCH_PAD3_ENC_DIS_ERR) { 1227f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1228f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1229f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1230f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1231f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1232f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1233f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1234f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1235f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1236f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1237f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1238f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1239f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1240f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1241f5860992SSakthivel K "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X." 1242f5860992SSakthivel K "Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 1243f5860992SSakthivel K scratch3_value, pm8001_ha->encrypt_info.cipher_mode, 1244f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 1245f5860992SSakthivel K pm8001_ha->encrypt_info.status)); 1246f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1247f5860992SSakthivel K SCRATCH_PAD3_ENC_ENA_ERR) { 1248f5860992SSakthivel K 1249f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1250f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1251f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1252f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1253f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1254f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1255f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1256f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1257f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1258f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1259f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1260f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1261f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1262f5860992SSakthivel K 1263f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1264f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X." 1265f5860992SSakthivel K "Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 1266f5860992SSakthivel K scratch3_value, pm8001_ha->encrypt_info.cipher_mode, 1267f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 1268f5860992SSakthivel K pm8001_ha->encrypt_info.status)); 1269f5860992SSakthivel K } 1270f5860992SSakthivel K return ret; 1271f5860992SSakthivel K } 1272f5860992SSakthivel K 1273f5860992SSakthivel K /** 1274f5860992SSakthivel K * pm80xx_encrypt_update - update flash with encryption informtion 1275f5860992SSakthivel K * @pm8001_ha: our hba card information. 1276f5860992SSakthivel K */ 1277f5860992SSakthivel K static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha) 1278f5860992SSakthivel K { 1279f5860992SSakthivel K struct kek_mgmt_req payload; 1280f5860992SSakthivel K struct inbound_queue_table *circularQ; 1281f5860992SSakthivel K int rc; 1282f5860992SSakthivel K u32 tag; 1283f5860992SSakthivel K u32 opc = OPC_INB_KEK_MANAGEMENT; 1284f5860992SSakthivel K 1285f5860992SSakthivel K memset(&payload, 0, sizeof(struct kek_mgmt_req)); 1286f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1287f5860992SSakthivel K if (rc) 1288f5860992SSakthivel K return -1; 1289f5860992SSakthivel K 1290f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1291f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1292f5860992SSakthivel K /* Currently only one key is used. New KEK index is 1. 1293f5860992SSakthivel K * Current KEK index is 1. Store KEK to NVRAM is 1. 1294f5860992SSakthivel K */ 1295f5860992SSakthivel K payload.new_curidx_ksop = ((1 << 24) | (1 << 16) | (1 << 8) | 1296f5860992SSakthivel K KEK_MGMT_SUBOP_KEYCARDUPDATE); 1297f5860992SSakthivel K 12987370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 12997370672dSpeter chang "Saving Encryption info to flash. payload 0x%x\n", 13007370672dSpeter chang payload.new_curidx_ksop)); 13017370672dSpeter chang 130291a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 130391a43fa6Speter chang sizeof(payload), 0); 13045533abcaSTomas Henzl if (rc) 13055533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1306f5860992SSakthivel K 1307f5860992SSakthivel K return rc; 1308f5860992SSakthivel K } 1309f5860992SSakthivel K 1310f5860992SSakthivel K /** 1311f5860992SSakthivel K * pm8001_chip_init - the main init function that initialize whole PM8001 chip. 1312f5860992SSakthivel K * @pm8001_ha: our hba card information 1313f5860992SSakthivel K */ 1314f5860992SSakthivel K static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha) 1315f5860992SSakthivel K { 1316f5860992SSakthivel K int ret; 1317f5860992SSakthivel K u8 i = 0; 1318f5860992SSakthivel K 1319f5860992SSakthivel K /* check the firmware status */ 1320f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 1321f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1322f5860992SSakthivel K pm8001_printk("Firmware is not ready!\n")); 1323f5860992SSakthivel K return -EBUSY; 1324f5860992SSakthivel K } 1325f5860992SSakthivel K 132672349b62SDeepak Ukey /* Initialize the controller fatal error flag */ 132772349b62SDeepak Ukey pm8001_ha->controller_fatal_error = false; 132872349b62SDeepak Ukey 1329f5860992SSakthivel K /* Initialize pci space address eg: mpi offset */ 1330f5860992SSakthivel K init_pci_device_addresses(pm8001_ha); 1331f5860992SSakthivel K init_default_table_values(pm8001_ha); 1332f5860992SSakthivel K read_main_config_table(pm8001_ha); 1333f5860992SSakthivel K read_general_status_table(pm8001_ha); 1334f5860992SSakthivel K read_inbnd_queue_table(pm8001_ha); 1335f5860992SSakthivel K read_outbnd_queue_table(pm8001_ha); 1336f5860992SSakthivel K read_phy_attr_table(pm8001_ha); 1337f5860992SSakthivel K 1338f5860992SSakthivel K /* update main config table ,inbound table and outbound table */ 1339f5860992SSakthivel K update_main_config_table(pm8001_ha); 1340f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) 1341f5860992SSakthivel K update_inbnd_queue_table(pm8001_ha, i); 1342f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) 1343f5860992SSakthivel K update_outbnd_queue_table(pm8001_ha, i); 1344f5860992SSakthivel K 1345f5860992SSakthivel K /* notify firmware update finished and check initialization status */ 1346f5860992SSakthivel K if (0 == mpi_init_check(pm8001_ha)) { 1347f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1348f5860992SSakthivel K pm8001_printk("MPI initialize successful!\n")); 1349f5860992SSakthivel K } else 1350f5860992SSakthivel K return -EBUSY; 1351f5860992SSakthivel K 1352a6cb3d01SSakthivel K /* send SAS protocol timer configuration page to FW */ 1353a6cb3d01SSakthivel K ret = pm80xx_set_sas_protocol_timer_config(pm8001_ha); 1354f5860992SSakthivel K 1355f5860992SSakthivel K /* Check for encryption */ 1356f5860992SSakthivel K if (pm8001_ha->chip->encrypt) { 1357f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1358f5860992SSakthivel K pm8001_printk("Checking for encryption\n")); 1359f5860992SSakthivel K ret = pm80xx_get_encrypt_info(pm8001_ha); 1360f5860992SSakthivel K if (ret == -1) { 1361f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1362f5860992SSakthivel K pm8001_printk("Encryption error !!\n")); 1363f5860992SSakthivel K if (pm8001_ha->encrypt_info.status == 0x81) { 1364f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1365f5860992SSakthivel K "Encryption enabled with error." 1366f5860992SSakthivel K "Saving encryption key to flash\n")); 1367f5860992SSakthivel K pm80xx_encrypt_update(pm8001_ha); 1368f5860992SSakthivel K } 1369f5860992SSakthivel K } 1370f5860992SSakthivel K } 1371f5860992SSakthivel K return 0; 1372f5860992SSakthivel K } 1373f5860992SSakthivel K 1374f5860992SSakthivel K static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) 1375f5860992SSakthivel K { 1376f5860992SSakthivel K u32 max_wait_count; 1377f5860992SSakthivel K u32 value; 1378f5860992SSakthivel K u32 gst_len_mpistate; 1379f5860992SSakthivel K init_pci_device_addresses(pm8001_ha); 1380f5860992SSakthivel K /* Write bit1=1 to Inbound DoorBell Register to tell the SPC FW the 1381f5860992SSakthivel K table is stop */ 1382f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_RESET); 1383f5860992SSakthivel K 1384f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1385a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 1386a9a923e5SAnand Kumar Santhanam max_wait_count = 4 * 1000 * 1000;/* 4 sec */ 1387a9a923e5SAnand Kumar Santhanam } else { 1388a9a923e5SAnand Kumar Santhanam max_wait_count = 2 * 1000 * 1000;/* 2 sec */ 1389a9a923e5SAnand Kumar Santhanam } 1390f5860992SSakthivel K do { 1391f5860992SSakthivel K udelay(1); 1392f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1393f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_RESET; 1394f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1395f5860992SSakthivel K 1396f5860992SSakthivel K if (!max_wait_count) { 1397f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1398f5860992SSakthivel K pm8001_printk("TIMEOUT:IBDB value/=%x\n", value)); 1399f5860992SSakthivel K return -1; 1400f5860992SSakthivel K } 1401f5860992SSakthivel K 1402f5860992SSakthivel K /* check the MPI-State for termination in progress */ 1403f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1404f5860992SSakthivel K max_wait_count = 2 * 1000 * 1000; /* 2 sec for spcv/ve */ 1405f5860992SSakthivel K do { 1406f5860992SSakthivel K udelay(1); 1407f5860992SSakthivel K gst_len_mpistate = 1408f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1409f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1410f5860992SSakthivel K if (GST_MPI_STATE_UNINIT == 1411f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) 1412f5860992SSakthivel K break; 1413f5860992SSakthivel K } while (--max_wait_count); 1414f5860992SSakthivel K if (!max_wait_count) { 1415f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1416f5860992SSakthivel K pm8001_printk(" TIME OUT MPI State = 0x%x\n", 1417f5860992SSakthivel K gst_len_mpistate & GST_MPI_STATE_MASK)); 1418f5860992SSakthivel K return -1; 1419f5860992SSakthivel K } 1420f5860992SSakthivel K 1421f5860992SSakthivel K return 0; 1422f5860992SSakthivel K } 1423f5860992SSakthivel K 1424f5860992SSakthivel K /** 1425f5860992SSakthivel K * pm8001_chip_soft_rst - soft reset the PM8001 chip, so that the clear all 1426f5860992SSakthivel K * the FW register status to the originated status. 1427f5860992SSakthivel K * @pm8001_ha: our hba card information 1428f5860992SSakthivel K */ 1429f5860992SSakthivel K 1430f5860992SSakthivel K static int 1431f5860992SSakthivel K pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha) 1432f5860992SSakthivel K { 1433f5860992SSakthivel K u32 regval; 1434f5860992SSakthivel K u32 bootloader_state; 143506f12f22SAnand Kumar Santhanam u32 ibutton0, ibutton1; 1436f5860992SSakthivel K 143772349b62SDeepak Ukey /* Process MPI table uninitialization only if FW is ready */ 143872349b62SDeepak Ukey if (!pm8001_ha->controller_fatal_error) { 1439f5860992SSakthivel K /* Check if MPI is in ready state to reset */ 1440f5860992SSakthivel K if (mpi_uninit_check(pm8001_ha) != 0) { 1441d384be6eSVikram Auradkar u32 r0 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 1442d384be6eSVikram Auradkar u32 r1 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 1443d384be6eSVikram Auradkar u32 r2 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2); 1444d384be6eSVikram Auradkar u32 r3 = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 144572349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 1446d384be6eSVikram Auradkar "MPI state is not ready scratch: %x:%x:%x:%x\n", 1447d384be6eSVikram Auradkar r0, r1, r2, r3)); 1448d384be6eSVikram Auradkar /* if things aren't ready but the bootloader is ok then 1449d384be6eSVikram Auradkar * try the reset anyway. 1450d384be6eSVikram Auradkar */ 1451d384be6eSVikram Auradkar if (r1 & SCRATCH_PAD1_BOOTSTATE_MASK) 1452f5860992SSakthivel K return -1; 1453f5860992SSakthivel K } 145472349b62SDeepak Ukey } 1455f5860992SSakthivel K /* checked for reset register normal state; 0x0 */ 1456f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 1457f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1458f5860992SSakthivel K pm8001_printk("reset register before write : 0x%x\n", regval)); 1459f5860992SSakthivel K 1460f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE); 14614daf1ef3SVikram Auradkar msleep(500); 1462f5860992SSakthivel K 1463f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 1464f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1465f5860992SSakthivel K pm8001_printk("reset register after write 0x%x\n", regval)); 1466f5860992SSakthivel K 1467f5860992SSakthivel K if ((regval & SPCv_SOFT_RESET_READ_MASK) == 1468f5860992SSakthivel K SPCv_SOFT_RESET_NORMAL_RESET_OCCURED) { 1469f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 1470f5860992SSakthivel K pm8001_printk(" soft reset successful [regval: 0x%x]\n", 1471f5860992SSakthivel K regval)); 1472f5860992SSakthivel K } else { 1473f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 1474f5860992SSakthivel K pm8001_printk(" soft reset failed [regval: 0x%x]\n", 1475f5860992SSakthivel K regval)); 1476f5860992SSakthivel K 1477f5860992SSakthivel K /* check bootloader is successfully executed or in HDA mode */ 1478f5860992SSakthivel K bootloader_state = 1479f5860992SSakthivel K pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) & 1480f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_MASK; 1481f5860992SSakthivel K 1482f5860992SSakthivel K if (bootloader_state == SCRATCH_PAD1_BOOTSTATE_HDA_SEEPROM) { 1483f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1484f5860992SSakthivel K "Bootloader state - HDA mode SEEPROM\n")); 1485f5860992SSakthivel K } else if (bootloader_state == 1486f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_BOOTSTRAP) { 1487f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1488f5860992SSakthivel K "Bootloader state - HDA mode Bootstrap Pin\n")); 1489f5860992SSakthivel K } else if (bootloader_state == 1490f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_SOFTRESET) { 1491f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1492f5860992SSakthivel K "Bootloader state - HDA mode soft reset\n")); 1493f5860992SSakthivel K } else if (bootloader_state == 1494f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_CRIT_ERROR) { 1495f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1496f5860992SSakthivel K "Bootloader state-HDA mode critical error\n")); 1497f5860992SSakthivel K } 1498f5860992SSakthivel K return -EBUSY; 1499f5860992SSakthivel K } 1500f5860992SSakthivel K 1501f5860992SSakthivel K /* check the firmware status after reset */ 1502f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 1503f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1504f5860992SSakthivel K pm8001_printk("Firmware is not ready!\n")); 150506f12f22SAnand Kumar Santhanam /* check iButton feature support for motherboard controller */ 150606f12f22SAnand Kumar Santhanam if (pm8001_ha->pdev->subsystem_vendor != 150706f12f22SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2 && 1508faf321b0SBenjamin Rood pm8001_ha->pdev->subsystem_vendor != 1509faf321b0SBenjamin Rood PCI_VENDOR_ID_ATTO && 151006f12f22SAnand Kumar Santhanam pm8001_ha->pdev->subsystem_vendor != 0) { 151106f12f22SAnand Kumar Santhanam ibutton0 = pm8001_cr32(pm8001_ha, 0, 151206f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_6); 151306f12f22SAnand Kumar Santhanam ibutton1 = pm8001_cr32(pm8001_ha, 0, 151406f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_7); 151506f12f22SAnand Kumar Santhanam if (!ibutton0 && !ibutton1) { 151606f12f22SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 151706f12f22SAnand Kumar Santhanam pm8001_printk("iButton Feature is" 151806f12f22SAnand Kumar Santhanam " not Available!!!\n")); 1519f5860992SSakthivel K return -EBUSY; 1520f5860992SSakthivel K } 152106f12f22SAnand Kumar Santhanam if (ibutton0 == 0xdeadbeef && ibutton1 == 0xdeadbeef) { 152206f12f22SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 152306f12f22SAnand Kumar Santhanam pm8001_printk("CRC Check for iButton" 152406f12f22SAnand Kumar Santhanam " Feature Failed!!!\n")); 152506f12f22SAnand Kumar Santhanam return -EBUSY; 152606f12f22SAnand Kumar Santhanam } 152706f12f22SAnand Kumar Santhanam } 152806f12f22SAnand Kumar Santhanam } 1529f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1530f5860992SSakthivel K pm8001_printk("SPCv soft reset Complete\n")); 1531f5860992SSakthivel K return 0; 1532f5860992SSakthivel K } 1533f5860992SSakthivel K 1534f5860992SSakthivel K static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha) 1535f5860992SSakthivel K { 1536f5860992SSakthivel K u32 i; 1537f5860992SSakthivel K 1538f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1539f5860992SSakthivel K pm8001_printk("chip reset start\n")); 1540f5860992SSakthivel K 1541f5860992SSakthivel K /* do SPCv chip reset. */ 1542f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11); 1543f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1544f5860992SSakthivel K pm8001_printk("SPC soft reset Complete\n")); 1545f5860992SSakthivel K 1546f5860992SSakthivel K /* Check this ..whether delay is required or no */ 1547f5860992SSakthivel K /* delay 10 usec */ 1548f5860992SSakthivel K udelay(10); 1549f5860992SSakthivel K 1550f5860992SSakthivel K /* wait for 20 msec until the firmware gets reloaded */ 1551f5860992SSakthivel K i = 20; 1552f5860992SSakthivel K do { 1553f5860992SSakthivel K mdelay(1); 1554f5860992SSakthivel K } while ((--i) != 0); 1555f5860992SSakthivel K 1556f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1557f5860992SSakthivel K pm8001_printk("chip reset finished\n")); 1558f5860992SSakthivel K } 1559f5860992SSakthivel K 1560f5860992SSakthivel K /** 1561f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1562f5860992SSakthivel K * @pm8001_ha: our hba card information 1563f5860992SSakthivel K */ 1564f5860992SSakthivel K static void 1565f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha) 1566f5860992SSakthivel K { 1567f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); 1568f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); 1569f5860992SSakthivel K } 1570f5860992SSakthivel K 1571f5860992SSakthivel K /** 1572f5860992SSakthivel K * pm8001_chip_intx_interrupt_disable- disable PM8001 chip interrupt 1573f5860992SSakthivel K * @pm8001_ha: our hba card information 1574f5860992SSakthivel K */ 1575f5860992SSakthivel K static void 1576f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha) 1577f5860992SSakthivel K { 1578f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL); 1579f5860992SSakthivel K } 1580f5860992SSakthivel K 1581f5860992SSakthivel K /** 1582f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1583f5860992SSakthivel K * @pm8001_ha: our hba card information 1584f5860992SSakthivel K */ 1585f5860992SSakthivel K static void 1586f5860992SSakthivel K pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1587f5860992SSakthivel K { 1588f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1589f5860992SSakthivel K u32 mask; 1590f5860992SSakthivel K mask = (u32)(1 << vec); 1591f5860992SSakthivel K 1592f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF)); 1593f5860992SSakthivel K return; 1594f5860992SSakthivel K #endif 1595f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(pm8001_ha); 1596f5860992SSakthivel K 1597f5860992SSakthivel K } 1598f5860992SSakthivel K 1599f5860992SSakthivel K /** 1600f5860992SSakthivel K * pm8001_chip_interrupt_disable- disable PM8001 chip interrupt 1601f5860992SSakthivel K * @pm8001_ha: our hba card information 1602f5860992SSakthivel K */ 1603f5860992SSakthivel K static void 1604f5860992SSakthivel K pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1605f5860992SSakthivel K { 1606f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1607f5860992SSakthivel K u32 mask; 1608f5860992SSakthivel K if (vec == 0xFF) 1609f5860992SSakthivel K mask = 0xFFFFFFFF; 1610f5860992SSakthivel K else 1611f5860992SSakthivel K mask = (u32)(1 << vec); 1612f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF)); 1613f5860992SSakthivel K return; 1614f5860992SSakthivel K #endif 1615f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(pm8001_ha); 1616f5860992SSakthivel K } 1617f5860992SSakthivel K 1618c6b9ef57SSakthivel K static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha, 1619c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1620c6b9ef57SSakthivel K { 1621c6b9ef57SSakthivel K int res; 1622c6b9ef57SSakthivel K u32 ccb_tag; 1623c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1624c6b9ef57SSakthivel K struct sas_task *task = NULL; 1625c6b9ef57SSakthivel K struct task_abort_req task_abort; 1626c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1627c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_ABORT; 1628c6b9ef57SSakthivel K int ret; 1629c6b9ef57SSakthivel K 1630c6b9ef57SSakthivel K if (!pm8001_ha_dev) { 1631c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("dev is null\n")); 1632c6b9ef57SSakthivel K return; 1633c6b9ef57SSakthivel K } 1634c6b9ef57SSakthivel K 1635c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1636c6b9ef57SSakthivel K 1637c6b9ef57SSakthivel K if (!task) { 1638c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("cannot " 1639c6b9ef57SSakthivel K "allocate task\n")); 1640c6b9ef57SSakthivel K return; 1641c6b9ef57SSakthivel K } 1642c6b9ef57SSakthivel K 1643c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1644c6b9ef57SSakthivel K 1645c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 16465533abcaSTomas Henzl if (res) { 16475533abcaSTomas Henzl sas_free_task(task); 1648c6b9ef57SSakthivel K return; 16495533abcaSTomas Henzl } 1650c6b9ef57SSakthivel K 1651c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1652c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1653c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1654c6b9ef57SSakthivel K ccb->task = task; 1655c6b9ef57SSakthivel K 1656c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1657c6b9ef57SSakthivel K 1658c6b9ef57SSakthivel K memset(&task_abort, 0, sizeof(task_abort)); 1659c6b9ef57SSakthivel K task_abort.abort_all = cpu_to_le32(1); 1660c6b9ef57SSakthivel K task_abort.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1661c6b9ef57SSakthivel K task_abort.tag = cpu_to_le32(ccb_tag); 1662c6b9ef57SSakthivel K 166391a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 166491a43fa6Speter chang sizeof(task_abort), 0); 166591a43fa6Speter chang PM8001_FAIL_DBG(pm8001_ha, 166691a43fa6Speter chang pm8001_printk("Executing abort task end\n")); 16675533abcaSTomas Henzl if (ret) { 16685533abcaSTomas Henzl sas_free_task(task); 16695533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 16705533abcaSTomas Henzl } 1671c6b9ef57SSakthivel K } 1672c6b9ef57SSakthivel K 1673c6b9ef57SSakthivel K static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha, 1674c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1675c6b9ef57SSakthivel K { 1676c6b9ef57SSakthivel K struct sata_start_req sata_cmd; 1677c6b9ef57SSakthivel K int res; 1678c6b9ef57SSakthivel K u32 ccb_tag; 1679c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1680c6b9ef57SSakthivel K struct sas_task *task = NULL; 1681c6b9ef57SSakthivel K struct host_to_dev_fis fis; 1682c6b9ef57SSakthivel K struct domain_device *dev; 1683c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1684c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 1685c6b9ef57SSakthivel K 1686c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1687c6b9ef57SSakthivel K 1688c6b9ef57SSakthivel K if (!task) { 1689c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1690c6b9ef57SSakthivel K pm8001_printk("cannot allocate task !!!\n")); 1691c6b9ef57SSakthivel K return; 1692c6b9ef57SSakthivel K } 1693c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1694c6b9ef57SSakthivel K 1695c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 1696c6b9ef57SSakthivel K if (res) { 16975533abcaSTomas Henzl sas_free_task(task); 1698c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1699c6b9ef57SSakthivel K pm8001_printk("cannot allocate tag !!!\n")); 1700c6b9ef57SSakthivel K return; 1701c6b9ef57SSakthivel K } 1702c6b9ef57SSakthivel K 1703c6b9ef57SSakthivel K /* allocate domain device by ourselves as libsas 1704c6b9ef57SSakthivel K * is not going to provide any 1705c6b9ef57SSakthivel K */ 1706c6b9ef57SSakthivel K dev = kzalloc(sizeof(struct domain_device), GFP_ATOMIC); 1707c6b9ef57SSakthivel K if (!dev) { 17085533abcaSTomas Henzl sas_free_task(task); 17095533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 1710c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1711c6b9ef57SSakthivel K pm8001_printk("Domain device cannot be allocated\n")); 1712c6b9ef57SSakthivel K return; 17135533abcaSTomas Henzl } 17145533abcaSTomas Henzl 1715c6b9ef57SSakthivel K task->dev = dev; 1716c6b9ef57SSakthivel K task->dev->lldd_dev = pm8001_ha_dev; 1717c6b9ef57SSakthivel K 1718c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1719c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1720c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1721c6b9ef57SSakthivel K ccb->task = task; 17220b6df110SViswas G ccb->n_elem = 0; 1723c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_READ_LOG_FLAG; 1724c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_2ND_RLE_FLAG; 1725c6b9ef57SSakthivel K 1726c6b9ef57SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 1727c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1728c6b9ef57SSakthivel K 1729c6b9ef57SSakthivel K /* construct read log FIS */ 1730c6b9ef57SSakthivel K memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1731c6b9ef57SSakthivel K fis.fis_type = 0x27; 1732c6b9ef57SSakthivel K fis.flags = 0x80; 1733c6b9ef57SSakthivel K fis.command = ATA_CMD_READ_LOG_EXT; 1734c6b9ef57SSakthivel K fis.lbal = 0x10; 1735c6b9ef57SSakthivel K fis.sector_count = 0x1; 1736c6b9ef57SSakthivel K 1737c6b9ef57SSakthivel K sata_cmd.tag = cpu_to_le32(ccb_tag); 1738c6b9ef57SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1739c6b9ef57SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad |= ((0x1 << 7) | (0x5 << 9)); 1740c6b9ef57SSakthivel K memcpy(&sata_cmd.sata_fis, &fis, sizeof(struct host_to_dev_fis)); 1741c6b9ef57SSakthivel K 174291a43fa6Speter chang res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 174391a43fa6Speter chang sizeof(sata_cmd), 0); 174491a43fa6Speter chang PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("Executing read log end\n")); 17455533abcaSTomas Henzl if (res) { 17465533abcaSTomas Henzl sas_free_task(task); 17475533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 17485533abcaSTomas Henzl kfree(dev); 17495533abcaSTomas Henzl } 1750c6b9ef57SSakthivel K } 1751c6b9ef57SSakthivel K 1752f5860992SSakthivel K /** 1753f5860992SSakthivel K * mpi_ssp_completion- process the event that FW response to the SSP request. 1754f5860992SSakthivel K * @pm8001_ha: our hba card information 1755f5860992SSakthivel K * @piomb: the message contents of this outbound message. 1756f5860992SSakthivel K * 1757f5860992SSakthivel K * When FW has completed a ssp request for example a IO request, after it has 1758f5860992SSakthivel K * filled the SG data with the data, it will trigger this event represent 1759f5860992SSakthivel K * that he has finished the job,please check the coresponding buffer. 1760f5860992SSakthivel K * So we will tell the caller who maybe waiting the result to tell upper layer 1761f5860992SSakthivel K * that the task has been finished. 1762f5860992SSakthivel K */ 1763f5860992SSakthivel K static void 1764f5860992SSakthivel K mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb) 1765f5860992SSakthivel K { 1766f5860992SSakthivel K struct sas_task *t; 1767f5860992SSakthivel K struct pm8001_ccb_info *ccb; 1768f5860992SSakthivel K unsigned long flags; 1769f5860992SSakthivel K u32 status; 1770f5860992SSakthivel K u32 param; 1771f5860992SSakthivel K u32 tag; 1772f5860992SSakthivel K struct ssp_completion_resp *psspPayload; 1773f5860992SSakthivel K struct task_status_struct *ts; 1774f5860992SSakthivel K struct ssp_response_iu *iu; 1775f5860992SSakthivel K struct pm8001_device *pm8001_dev; 1776f5860992SSakthivel K psspPayload = (struct ssp_completion_resp *)(piomb + 4); 1777f5860992SSakthivel K status = le32_to_cpu(psspPayload->status); 1778f5860992SSakthivel K tag = le32_to_cpu(psspPayload->tag); 1779f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 1780f5860992SSakthivel K if ((status == IO_ABORTED) && ccb->open_retry) { 1781f5860992SSakthivel K /* Being completed by another */ 1782f5860992SSakthivel K ccb->open_retry = 0; 1783f5860992SSakthivel K return; 1784f5860992SSakthivel K } 1785f5860992SSakthivel K pm8001_dev = ccb->device; 1786f5860992SSakthivel K param = le32_to_cpu(psspPayload->param); 1787f5860992SSakthivel K t = ccb->task; 1788f5860992SSakthivel K 1789f5860992SSakthivel K if (status && status != IO_UNDERFLOW) 1790f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1791f5860992SSakthivel K pm8001_printk("sas IO status 0x%x\n", status)); 1792f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 1793f5860992SSakthivel K return; 1794f5860992SSakthivel K ts = &t->task_status; 17957370672dSpeter chang 17967370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 17977370672dSpeter chang "tag::0x%x, status::0x%x task::0x%p\n", tag, status, t)); 17987370672dSpeter chang 1799cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 1800cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 1801cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) 1802cb269c26SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 1803cb269c26SAnand Kumar Santhanam pm8001_printk("SAS Address of IO Failure Drive" 1804cb269c26SAnand Kumar Santhanam ":%016llx", SAS_ADDR(t->dev->sas_addr))); 1805cb269c26SAnand Kumar Santhanam 1806f5860992SSakthivel K switch (status) { 1807f5860992SSakthivel K case IO_SUCCESS: 1808f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1809f5860992SSakthivel K pm8001_printk("IO_SUCCESS ,param = 0x%x\n", 1810f5860992SSakthivel K param)); 1811f5860992SSakthivel K if (param == 0) { 1812f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1813f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 1814f5860992SSakthivel K } else { 1815f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1816f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 1817f5860992SSakthivel K ts->residual = param; 1818f5860992SSakthivel K iu = &psspPayload->ssp_resp_iu; 1819f5860992SSakthivel K sas_ssp_task_response(pm8001_ha->dev, t, iu); 1820f5860992SSakthivel K } 1821f5860992SSakthivel K if (pm8001_dev) 1822f5860992SSakthivel K pm8001_dev->running_req--; 1823f5860992SSakthivel K break; 1824f5860992SSakthivel K case IO_ABORTED: 1825f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1826f5860992SSakthivel K pm8001_printk("IO_ABORTED IOMB Tag\n")); 1827f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1828f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 1829f5860992SSakthivel K break; 1830f5860992SSakthivel K case IO_UNDERFLOW: 1831f5860992SSakthivel K /* SSP Completion with error */ 1832f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1833f5860992SSakthivel K pm8001_printk("IO_UNDERFLOW ,param = 0x%x\n", 1834f5860992SSakthivel K param)); 1835f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1836f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 1837f5860992SSakthivel K ts->residual = param; 1838f5860992SSakthivel K if (pm8001_dev) 1839f5860992SSakthivel K pm8001_dev->running_req--; 1840f5860992SSakthivel K break; 1841f5860992SSakthivel K case IO_NO_DEVICE: 1842f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1843f5860992SSakthivel K pm8001_printk("IO_NO_DEVICE\n")); 1844f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1845f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 1846f5860992SSakthivel K break; 1847f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 1848f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1849f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 1850f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1851f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1852f5860992SSakthivel K /* Force the midlayer to retry */ 1853f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1854f5860992SSakthivel K break; 1855f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 1856f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1857f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 1858f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1859f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1860f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1861f5860992SSakthivel K break; 186227ecfa5eSViswas G case IO_XFER_ERROR_INVALID_SSP_RSP_FRAME: 186327ecfa5eSViswas G PM8001_IO_DBG(pm8001_ha, 186427ecfa5eSViswas G pm8001_printk("IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n")); 186527ecfa5eSViswas G ts->resp = SAS_TASK_COMPLETE; 186627ecfa5eSViswas G ts->stat = SAS_OPEN_REJECT; 186727ecfa5eSViswas G ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 186827ecfa5eSViswas G break; 1869f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 1870f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1871f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 1872f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1873f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1874f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 1875f5860992SSakthivel K break; 1876f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 1877f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1878f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 1879f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1880f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1881f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1882f5860992SSakthivel K break; 1883f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 1884f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1885f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 1886f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1887f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1888f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1889f5860992SSakthivel K break; 1890f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 1891a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 1892a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 1893a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 1894a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 1895a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 1896f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1897f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 1898f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1899f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1900f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1901f5860992SSakthivel K if (!t->uldd_task) 1902f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 1903f5860992SSakthivel K pm8001_dev, 1904f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 1905f5860992SSakthivel K break; 1906f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 1907f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1908f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 1909f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1910f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1911f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 1912f5860992SSakthivel K break; 1913f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 1914f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 1915f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 1916f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1917f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1918f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 1919f5860992SSakthivel K break; 1920f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 1921f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1922f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 1923f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1924f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1925f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 1926f5860992SSakthivel K break; 1927f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 1928f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1929f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 1930f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1931f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1932f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1933f5860992SSakthivel K break; 1934f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 1935f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1936f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n")); 1937f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1938f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 1939f5860992SSakthivel K break; 1940f5860992SSakthivel K case IO_XFER_ERROR_DMA: 1941f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1942f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_DMA\n")); 1943f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1944f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1945f5860992SSakthivel K break; 1946f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 1947f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1948f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 1949f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1950f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1951f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1952f5860992SSakthivel K break; 1953f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 1954f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1955f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n")); 1956f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1957f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1958f5860992SSakthivel K break; 1959f5860992SSakthivel K case IO_PORT_IN_RESET: 1960f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1961f5860992SSakthivel K pm8001_printk("IO_PORT_IN_RESET\n")); 1962f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1963f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1964f5860992SSakthivel K break; 1965f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 1966f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1967f5860992SSakthivel K pm8001_printk("IO_DS_NON_OPERATIONAL\n")); 1968f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1969f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1970f5860992SSakthivel K if (!t->uldd_task) 1971f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 1972f5860992SSakthivel K pm8001_dev, 1973f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 1974f5860992SSakthivel K break; 1975f5860992SSakthivel K case IO_DS_IN_RECOVERY: 1976f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1977f5860992SSakthivel K pm8001_printk("IO_DS_IN_RECOVERY\n")); 1978f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1979f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1980f5860992SSakthivel K break; 1981f5860992SSakthivel K case IO_TM_TAG_NOT_FOUND: 1982f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1983f5860992SSakthivel K pm8001_printk("IO_TM_TAG_NOT_FOUND\n")); 1984f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1985f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1986f5860992SSakthivel K break; 1987f5860992SSakthivel K case IO_SSP_EXT_IU_ZERO_LEN_ERROR: 1988f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1989f5860992SSakthivel K pm8001_printk("IO_SSP_EXT_IU_ZERO_LEN_ERROR\n")); 1990f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1991f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1992f5860992SSakthivel K break; 1993f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 1994f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1995f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n")); 1996f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1997f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1998f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1999f5860992SSakthivel K break; 2000f5860992SSakthivel K default: 20017370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 2002f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", status)); 2003f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2004f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2005f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2006f5860992SSakthivel K break; 2007f5860992SSakthivel K } 2008f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2009f5860992SSakthivel K pm8001_printk("scsi_status = 0x%x\n ", 2010f5860992SSakthivel K psspPayload->ssp_resp_iu.status)); 2011f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2012f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2013f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2014f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2015f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2016f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2017f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 2018f5860992SSakthivel K "task 0x%p done with io_status 0x%x resp 0x%x " 2019f5860992SSakthivel K "stat 0x%x but aborted by upper layer!\n", 2020f5860992SSakthivel K t, status, ts->resp, ts->stat)); 2021869ddbdcSViswas G if (t->slow_task) 2022869ddbdcSViswas G complete(&t->slow_task->completion); 2023f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2024f5860992SSakthivel K } else { 2025f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2026f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2027f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2028f5860992SSakthivel K t->task_done(t); 2029f5860992SSakthivel K } 2030f5860992SSakthivel K } 2031f5860992SSakthivel K 2032f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2033f5860992SSakthivel K static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 2034f5860992SSakthivel K { 2035f5860992SSakthivel K struct sas_task *t; 2036f5860992SSakthivel K unsigned long flags; 2037f5860992SSakthivel K struct task_status_struct *ts; 2038f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2039f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2040f5860992SSakthivel K struct ssp_event_resp *psspPayload = 2041f5860992SSakthivel K (struct ssp_event_resp *)(piomb + 4); 2042f5860992SSakthivel K u32 event = le32_to_cpu(psspPayload->event); 2043f5860992SSakthivel K u32 tag = le32_to_cpu(psspPayload->tag); 2044f5860992SSakthivel K u32 port_id = le32_to_cpu(psspPayload->port_id); 2045f5860992SSakthivel K 2046f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2047f5860992SSakthivel K t = ccb->task; 2048f5860992SSakthivel K pm8001_dev = ccb->device; 2049f5860992SSakthivel K if (event) 2050f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2051f5860992SSakthivel K pm8001_printk("sas IO status 0x%x\n", event)); 2052f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 2053f5860992SSakthivel K return; 2054f5860992SSakthivel K ts = &t->task_status; 20557370672dSpeter chang PM8001_IOERR_DBG(pm8001_ha, 2056f5860992SSakthivel K pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n", 2057f5860992SSakthivel K port_id, tag, event)); 2058f5860992SSakthivel K switch (event) { 2059f5860992SSakthivel K case IO_OVERFLOW: 2060f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n");) 2061f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2062f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2063f5860992SSakthivel K ts->residual = 0; 2064f5860992SSakthivel K if (pm8001_dev) 2065f5860992SSakthivel K pm8001_dev->running_req--; 2066f5860992SSakthivel K break; 2067f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2068f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2069f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2070f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK); 2071f5860992SSakthivel K return; 2072f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2073f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2074f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2075f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2076f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2077f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2078f5860992SSakthivel K break; 2079f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2080f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2081f5860992SSakthivel K "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2082f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2083f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2084f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2085f5860992SSakthivel K break; 2086f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2087f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2088f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2089f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2090f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2091f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2092f5860992SSakthivel K break; 2093f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2094f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2095f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2096f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2097f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2098f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2099f5860992SSakthivel K break; 2100f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2101a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2102a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2103a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2104a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2105a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2106f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2107f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2108f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2109f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2110f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2111f5860992SSakthivel K if (!t->uldd_task) 2112f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2113f5860992SSakthivel K pm8001_dev, 2114f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2115f5860992SSakthivel K break; 2116f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2117f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2118f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2119f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2120f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2121f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2122f5860992SSakthivel K break; 2123f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 2124f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2125f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 2126f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2127f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2128f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2129f5860992SSakthivel K break; 2130f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 2131f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2132f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 2133f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2134f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2135f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2136f5860992SSakthivel K break; 2137f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 2138f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2139f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 2140f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2141f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2142f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2143f5860992SSakthivel K break; 2144f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 2145f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2146f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n")); 2147f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2148f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2149f5860992SSakthivel K break; 2150f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2151f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2152f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2153f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT); 2154f5860992SSakthivel K return; 2155f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 2156f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2157f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n")); 2158f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2159f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2160f5860992SSakthivel K break; 2161f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 2162f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2163f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n")); 2164f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2165f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2166f5860992SSakthivel K break; 2167f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 2168f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2169f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n")); 2170f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2171f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2172f5860992SSakthivel K break; 2173f5860992SSakthivel K case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT: 2174f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2175f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n")); 2176f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2177f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2178f5860992SSakthivel K break; 2179f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 2180f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2181f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n")); 2182f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2183f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2184f5860992SSakthivel K break; 2185f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 2186f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2187f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n")); 2188f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2189f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2190f5860992SSakthivel K break; 2191a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 21927370672dSpeter chang PM8001_IOERR_DBG(pm8001_ha, 2193a6cb3d01SSakthivel K pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n")); 2194a6cb3d01SSakthivel K /* TBC: used default set values */ 2195a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2196a6cb3d01SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2197a6cb3d01SSakthivel K break; 2198f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 2199f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2200f5860992SSakthivel K pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n")); 2201f5860992SSakthivel K return; 2202f5860992SSakthivel K default: 22037370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 2204f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", event)); 2205f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2206f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2207f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2208f5860992SSakthivel K break; 2209f5860992SSakthivel K } 2210f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2211f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2212f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2213f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2214f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2215f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2216f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 2217f5860992SSakthivel K "task 0x%p done with event 0x%x resp 0x%x " 2218f5860992SSakthivel K "stat 0x%x but aborted by upper layer!\n", 2219f5860992SSakthivel K t, event, ts->resp, ts->stat)); 2220f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2221f5860992SSakthivel K } else { 2222f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2223f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2224f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2225f5860992SSakthivel K t->task_done(t); 2226f5860992SSakthivel K } 2227f5860992SSakthivel K } 2228f5860992SSakthivel K 2229f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2230f5860992SSakthivel K static void 2231f5860992SSakthivel K mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 2232f5860992SSakthivel K { 2233f5860992SSakthivel K struct sas_task *t; 2234f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2235f5860992SSakthivel K u32 param; 2236f5860992SSakthivel K u32 status; 2237f5860992SSakthivel K u32 tag; 2238cb269c26SAnand Kumar Santhanam int i, j; 2239cb269c26SAnand Kumar Santhanam u8 sata_addr_low[4]; 2240cb269c26SAnand Kumar Santhanam u32 temp_sata_addr_low, temp_sata_addr_hi; 2241cb269c26SAnand Kumar Santhanam u8 sata_addr_hi[4]; 2242f5860992SSakthivel K struct sata_completion_resp *psataPayload; 2243f5860992SSakthivel K struct task_status_struct *ts; 2244f5860992SSakthivel K struct ata_task_resp *resp ; 2245f5860992SSakthivel K u32 *sata_resp; 2246f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2247c6b9ef57SSakthivel K unsigned long flags; 2248f5860992SSakthivel K 2249f5860992SSakthivel K psataPayload = (struct sata_completion_resp *)(piomb + 4); 2250f5860992SSakthivel K status = le32_to_cpu(psataPayload->status); 2251f5860992SSakthivel K tag = le32_to_cpu(psataPayload->tag); 2252f5860992SSakthivel K 2253c6b9ef57SSakthivel K if (!tag) { 2254c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2255c6b9ef57SSakthivel K pm8001_printk("tag null\n")); 2256c6b9ef57SSakthivel K return; 2257c6b9ef57SSakthivel K } 2258f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2259f5860992SSakthivel K param = le32_to_cpu(psataPayload->param); 2260c6b9ef57SSakthivel K if (ccb) { 2261f5860992SSakthivel K t = ccb->task; 2262f5860992SSakthivel K pm8001_dev = ccb->device; 2263c6b9ef57SSakthivel K } else { 2264f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2265c6b9ef57SSakthivel K pm8001_printk("ccb null\n")); 2266f5860992SSakthivel K return; 2267c6b9ef57SSakthivel K } 2268c6b9ef57SSakthivel K 2269c6b9ef57SSakthivel K if (t) { 2270c6b9ef57SSakthivel K if (t->dev && (t->dev->lldd_dev)) 2271c6b9ef57SSakthivel K pm8001_dev = t->dev->lldd_dev; 2272c6b9ef57SSakthivel K } else { 2273c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2274c6b9ef57SSakthivel K pm8001_printk("task null\n")); 2275c6b9ef57SSakthivel K return; 2276c6b9ef57SSakthivel K } 2277c6b9ef57SSakthivel K 2278c6b9ef57SSakthivel K if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG)) 2279c6b9ef57SSakthivel K && unlikely(!t || !t->lldd_task || !t->dev)) { 2280c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2281c6b9ef57SSakthivel K pm8001_printk("task or dev null\n")); 2282c6b9ef57SSakthivel K return; 2283c6b9ef57SSakthivel K } 2284c6b9ef57SSakthivel K 2285c6b9ef57SSakthivel K ts = &t->task_status; 2286c6b9ef57SSakthivel K if (!ts) { 2287c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2288c6b9ef57SSakthivel K pm8001_printk("ts null\n")); 2289c6b9ef57SSakthivel K return; 2290c6b9ef57SSakthivel K } 22917370672dSpeter chang 22927370672dSpeter chang if (unlikely(status)) 22937370672dSpeter chang PM8001_IOERR_DBG(pm8001_ha, pm8001_printk( 22947370672dSpeter chang "status:0x%x, tag:0x%x, task::0x%p\n", 22957370672dSpeter chang status, tag, t)); 22967370672dSpeter chang 2297cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 2298cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 2299cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) { 2300cb269c26SAnand Kumar Santhanam if (!((t->dev->parent) && 2301924a3541SJohn Garry (dev_is_expander(t->dev->parent->dev_type)))) { 2302cb269c26SAnand Kumar Santhanam for (i = 0 , j = 4; i <= 3 && j <= 7; i++ , j++) 2303cb269c26SAnand Kumar Santhanam sata_addr_low[i] = pm8001_ha->sas_addr[j]; 2304cb269c26SAnand Kumar Santhanam for (i = 0 , j = 0; i <= 3 && j <= 3; i++ , j++) 2305cb269c26SAnand Kumar Santhanam sata_addr_hi[i] = pm8001_ha->sas_addr[j]; 2306cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_low, sata_addr_low, 2307cb269c26SAnand Kumar Santhanam sizeof(sata_addr_low)); 2308cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_hi, sata_addr_hi, 2309cb269c26SAnand Kumar Santhanam sizeof(sata_addr_hi)); 2310cb269c26SAnand Kumar Santhanam temp_sata_addr_hi = (((temp_sata_addr_hi >> 24) & 0xff) 2311cb269c26SAnand Kumar Santhanam |((temp_sata_addr_hi << 8) & 2312cb269c26SAnand Kumar Santhanam 0xff0000) | 2313cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi >> 8) 2314cb269c26SAnand Kumar Santhanam & 0xff00) | 2315cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi << 24) & 2316cb269c26SAnand Kumar Santhanam 0xff000000)); 2317cb269c26SAnand Kumar Santhanam temp_sata_addr_low = ((((temp_sata_addr_low >> 24) 2318cb269c26SAnand Kumar Santhanam & 0xff) | 2319cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 8) 2320cb269c26SAnand Kumar Santhanam & 0xff0000) | 2321cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low >> 8) 2322cb269c26SAnand Kumar Santhanam & 0xff00) | 2323cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 24) 2324cb269c26SAnand Kumar Santhanam & 0xff000000)) + 2325cb269c26SAnand Kumar Santhanam pm8001_dev->attached_phy + 2326cb269c26SAnand Kumar Santhanam 0x10); 2327cb269c26SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 2328cb269c26SAnand Kumar Santhanam pm8001_printk("SAS Address of IO Failure Drive:" 2329cb269c26SAnand Kumar Santhanam "%08x%08x", temp_sata_addr_hi, 2330cb269c26SAnand Kumar Santhanam temp_sata_addr_low)); 2331f5860992SSakthivel K 2332cb269c26SAnand Kumar Santhanam } else { 2333cb269c26SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 2334cb269c26SAnand Kumar Santhanam pm8001_printk("SAS Address of IO Failure Drive:" 2335cb269c26SAnand Kumar Santhanam "%016llx", SAS_ADDR(t->dev->sas_addr))); 2336cb269c26SAnand Kumar Santhanam } 2337cb269c26SAnand Kumar Santhanam } 2338f5860992SSakthivel K switch (status) { 2339f5860992SSakthivel K case IO_SUCCESS: 2340f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n")); 2341f5860992SSakthivel K if (param == 0) { 2342f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2343f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 2344c6b9ef57SSakthivel K /* check if response is for SEND READ LOG */ 2345c6b9ef57SSakthivel K if (pm8001_dev && 2346c6b9ef57SSakthivel K (pm8001_dev->id & NCQ_READ_LOG_FLAG)) { 2347c6b9ef57SSakthivel K /* set new bit for abort_all */ 2348c6b9ef57SSakthivel K pm8001_dev->id |= NCQ_ABORT_ALL_FLAG; 2349c6b9ef57SSakthivel K /* clear bit for read log */ 2350c6b9ef57SSakthivel K pm8001_dev->id = pm8001_dev->id & 0x7FFFFFFF; 2351c6b9ef57SSakthivel K pm80xx_send_abort_all(pm8001_ha, pm8001_dev); 2352c6b9ef57SSakthivel K /* Free the tag */ 2353c6b9ef57SSakthivel K pm8001_tag_free(pm8001_ha, tag); 2354c6b9ef57SSakthivel K sas_free_task(t); 2355c6b9ef57SSakthivel K return; 2356c6b9ef57SSakthivel K } 2357f5860992SSakthivel K } else { 2358f5860992SSakthivel K u8 len; 2359f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2360f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 2361f5860992SSakthivel K ts->residual = param; 2362f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2363f5860992SSakthivel K pm8001_printk("SAS_PROTO_RESPONSE len = %d\n", 2364f5860992SSakthivel K param)); 2365f5860992SSakthivel K sata_resp = &psataPayload->sata_resp[0]; 2366f5860992SSakthivel K resp = (struct ata_task_resp *)ts->buf; 2367f5860992SSakthivel K if (t->ata_task.dma_xfer == 0 && 2368f73bdebdSChristoph Hellwig t->data_dir == DMA_FROM_DEVICE) { 2369f5860992SSakthivel K len = sizeof(struct pio_setup_fis); 2370f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2371f5860992SSakthivel K pm8001_printk("PIO read len = %d\n", len)); 2372f5860992SSakthivel K } else if (t->ata_task.use_ncq) { 2373f5860992SSakthivel K len = sizeof(struct set_dev_bits_fis); 2374f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2375f5860992SSakthivel K pm8001_printk("FPDMA len = %d\n", len)); 2376f5860992SSakthivel K } else { 2377f5860992SSakthivel K len = sizeof(struct dev_to_host_fis); 2378f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2379f5860992SSakthivel K pm8001_printk("other len = %d\n", len)); 2380f5860992SSakthivel K } 2381f5860992SSakthivel K if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) { 2382f5860992SSakthivel K resp->frame_len = len; 2383f5860992SSakthivel K memcpy(&resp->ending_fis[0], sata_resp, len); 2384f5860992SSakthivel K ts->buf_valid_size = sizeof(*resp); 2385f5860992SSakthivel K } else 2386f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 238720bc1ad2SColin Ian King pm8001_printk("response too large\n")); 2388f5860992SSakthivel K } 2389f5860992SSakthivel K if (pm8001_dev) 2390f5860992SSakthivel K pm8001_dev->running_req--; 2391f5860992SSakthivel K break; 2392f5860992SSakthivel K case IO_ABORTED: 2393f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2394f5860992SSakthivel K pm8001_printk("IO_ABORTED IOMB Tag\n")); 2395f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2396f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2397f5860992SSakthivel K if (pm8001_dev) 2398f5860992SSakthivel K pm8001_dev->running_req--; 2399f5860992SSakthivel K break; 2400f5860992SSakthivel K /* following cases are to do cases */ 2401f5860992SSakthivel K case IO_UNDERFLOW: 2402f5860992SSakthivel K /* SATA Completion with error */ 2403f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2404f5860992SSakthivel K pm8001_printk("IO_UNDERFLOW param = %d\n", param)); 2405f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2406f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2407f5860992SSakthivel K ts->residual = param; 2408f5860992SSakthivel K if (pm8001_dev) 2409f5860992SSakthivel K pm8001_dev->running_req--; 2410f5860992SSakthivel K break; 2411f5860992SSakthivel K case IO_NO_DEVICE: 2412f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2413f5860992SSakthivel K pm8001_printk("IO_NO_DEVICE\n")); 2414f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2415f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 2416f5860992SSakthivel K break; 2417f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2418f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2419f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2420f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2421f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2422f5860992SSakthivel K break; 2423f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2424f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2425f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2426f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2427f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2428f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2429f5860992SSakthivel K break; 2430f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2431f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2432f5860992SSakthivel K "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2433f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2434f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2435f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2436f5860992SSakthivel K break; 2437f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2438f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2439f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2440f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2441f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2442f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2443f5860992SSakthivel K break; 2444f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2445f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2446f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2447f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2448f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2449f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2450f5860992SSakthivel K break; 2451f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2452a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2453a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2454a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2455a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2456a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2457f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2458f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2459f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2460f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2461f5860992SSakthivel K if (!t->uldd_task) { 2462f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2463f5860992SSakthivel K pm8001_dev, 2464f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2465f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2466f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 24672b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2468f5860992SSakthivel K return; 2469f5860992SSakthivel K } 2470f5860992SSakthivel K break; 2471f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2472f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2473f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2474f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2475f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2476f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2477f5860992SSakthivel K if (!t->uldd_task) { 2478f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2479f5860992SSakthivel K pm8001_dev, 2480f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2481f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2482f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 24832b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2484f5860992SSakthivel K return; 2485f5860992SSakthivel K } 2486f5860992SSakthivel K break; 2487f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 2488f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2489f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 2490f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2491f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2492f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2493f5860992SSakthivel K break; 2494f5860992SSakthivel K case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY: 2495f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2496f5860992SSakthivel K "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n")); 2497f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2498f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2499f5860992SSakthivel K if (!t->uldd_task) { 2500f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2501f5860992SSakthivel K pm8001_dev, 2502f5860992SSakthivel K IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY); 2503f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2504f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 25052b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2506f5860992SSakthivel K return; 2507f5860992SSakthivel K } 2508f5860992SSakthivel K break; 2509f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 2510f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2511f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 2512f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2513f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2514f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2515f5860992SSakthivel K break; 2516f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 2517f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2518f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 2519f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2520f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2521f5860992SSakthivel K break; 2522f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 2523f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2524f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n")); 2525f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2526f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2527f5860992SSakthivel K break; 2528f5860992SSakthivel K case IO_XFER_ERROR_DMA: 2529f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2530f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_DMA\n")); 2531f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2532f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2533f5860992SSakthivel K break; 2534f5860992SSakthivel K case IO_XFER_ERROR_SATA_LINK_TIMEOUT: 2535f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2536f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_SATA_LINK_TIMEOUT\n")); 2537f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2538f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2539f5860992SSakthivel K break; 2540f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 2541f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2542f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n")); 2543f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2544f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2545f5860992SSakthivel K break; 2546f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2547f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2548f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2549f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2550f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2551f5860992SSakthivel K break; 2552f5860992SSakthivel K case IO_PORT_IN_RESET: 2553f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2554f5860992SSakthivel K pm8001_printk("IO_PORT_IN_RESET\n")); 2555f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2556f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2557f5860992SSakthivel K break; 2558f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 2559f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2560f5860992SSakthivel K pm8001_printk("IO_DS_NON_OPERATIONAL\n")); 2561f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2562f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2563f5860992SSakthivel K if (!t->uldd_task) { 2564f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2565f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2566f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2567f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 25682b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2569f5860992SSakthivel K return; 2570f5860992SSakthivel K } 2571f5860992SSakthivel K break; 2572f5860992SSakthivel K case IO_DS_IN_RECOVERY: 2573f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2574f5860992SSakthivel K pm8001_printk("IO_DS_IN_RECOVERY\n")); 2575f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2576f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2577f5860992SSakthivel K break; 2578f5860992SSakthivel K case IO_DS_IN_ERROR: 2579f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2580f5860992SSakthivel K pm8001_printk("IO_DS_IN_ERROR\n")); 2581f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2582f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2583f5860992SSakthivel K if (!t->uldd_task) { 2584f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2585f5860992SSakthivel K IO_DS_IN_ERROR); 2586f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2587f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 25882b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2589f5860992SSakthivel K return; 2590f5860992SSakthivel K } 2591f5860992SSakthivel K break; 2592f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 2593f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2594f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n")); 2595f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2596f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2597f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 259850acde8eSJohannes Thumshirn break; 2599f5860992SSakthivel K default: 26007370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 2601f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", status)); 2602f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2603f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2604f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2605f5860992SSakthivel K break; 2606f5860992SSakthivel K } 2607f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2608f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2609f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2610f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2611f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2612f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2613f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2614f5860992SSakthivel K pm8001_printk("task 0x%p done with io_status 0x%x" 2615f5860992SSakthivel K " resp 0x%x stat 0x%x but aborted by upper layer!\n", 2616f5860992SSakthivel K t, status, ts->resp, ts->stat)); 2617ce21c63eSpeter chang if (t->slow_task) 2618ce21c63eSpeter chang complete(&t->slow_task->completion); 2619f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 26202b01d816SSuresh Thiagarajan } else { 2621f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 26222b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2623f5860992SSakthivel K } 2624f5860992SSakthivel K } 2625f5860992SSakthivel K 2626f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2627f5860992SSakthivel K static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 2628f5860992SSakthivel K { 2629f5860992SSakthivel K struct sas_task *t; 2630f5860992SSakthivel K struct task_status_struct *ts; 2631f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2632f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2633f5860992SSakthivel K struct sata_event_resp *psataPayload = 2634f5860992SSakthivel K (struct sata_event_resp *)(piomb + 4); 2635f5860992SSakthivel K u32 event = le32_to_cpu(psataPayload->event); 2636f5860992SSakthivel K u32 tag = le32_to_cpu(psataPayload->tag); 2637f5860992SSakthivel K u32 port_id = le32_to_cpu(psataPayload->port_id); 2638c6b9ef57SSakthivel K u32 dev_id = le32_to_cpu(psataPayload->device_id); 2639c6b9ef57SSakthivel K unsigned long flags; 2640f5860992SSakthivel K 2641f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2642c6b9ef57SSakthivel K 2643c6b9ef57SSakthivel K if (ccb) { 2644f5860992SSakthivel K t = ccb->task; 2645f5860992SSakthivel K pm8001_dev = ccb->device; 2646c6b9ef57SSakthivel K } else { 2647c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2648c6b9ef57SSakthivel K pm8001_printk("No CCB !!!. returning\n")); 2649c6b9ef57SSakthivel K return; 2650c6b9ef57SSakthivel K } 2651f5860992SSakthivel K if (event) 2652f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2653c6b9ef57SSakthivel K pm8001_printk("SATA EVENT 0x%x\n", event)); 2654c6b9ef57SSakthivel K 2655c6b9ef57SSakthivel K /* Check if this is NCQ error */ 2656c6b9ef57SSakthivel K if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) { 2657c6b9ef57SSakthivel K /* find device using device id */ 2658c6b9ef57SSakthivel K pm8001_dev = pm8001_find_dev(pm8001_ha, dev_id); 2659c6b9ef57SSakthivel K /* send read log extension */ 2660c6b9ef57SSakthivel K if (pm8001_dev) 2661c6b9ef57SSakthivel K pm80xx_send_read_log(pm8001_ha, pm8001_dev); 2662f5860992SSakthivel K return; 2663c6b9ef57SSakthivel K } 2664c6b9ef57SSakthivel K 2665c6b9ef57SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) { 2666c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2667c6b9ef57SSakthivel K pm8001_printk("task or dev null\n")); 2668c6b9ef57SSakthivel K return; 2669c6b9ef57SSakthivel K } 2670c6b9ef57SSakthivel K 2671f5860992SSakthivel K ts = &t->task_status; 26727370672dSpeter chang PM8001_IOERR_DBG(pm8001_ha, 2673f5860992SSakthivel K pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n", 2674f5860992SSakthivel K port_id, tag, event)); 2675f5860992SSakthivel K switch (event) { 2676f5860992SSakthivel K case IO_OVERFLOW: 2677f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n")); 2678f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2679f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2680f5860992SSakthivel K ts->residual = 0; 2681f5860992SSakthivel K if (pm8001_dev) 2682f5860992SSakthivel K pm8001_dev->running_req--; 2683f5860992SSakthivel K break; 2684f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2685f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2686f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2687f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2688f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2689f5860992SSakthivel K break; 2690f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2691f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2692f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2693f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2694f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2695f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2696f5860992SSakthivel K break; 2697f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2698f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2699f5860992SSakthivel K "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2700f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2701f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2702f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2703f5860992SSakthivel K break; 2704f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2705f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2706f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2707f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2708f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2709f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2710f5860992SSakthivel K break; 2711f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2712f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2713f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2714f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2715f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2716f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2717f5860992SSakthivel K break; 2718f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2719a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2720a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2721a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2722a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2723a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2724a6cb3d01SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2725f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2726f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2727f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2728f5860992SSakthivel K if (!t->uldd_task) { 2729f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2730f5860992SSakthivel K pm8001_dev, 2731f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2732f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2733f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 27342b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2735f5860992SSakthivel K return; 2736f5860992SSakthivel K } 2737f5860992SSakthivel K break; 2738f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2739f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2740f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2741f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2742f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2743f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2744f5860992SSakthivel K break; 2745f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 2746f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2747f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 2748f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2749f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2750f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2751f5860992SSakthivel K break; 2752f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 2753f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2754f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 2755f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2756f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2757f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2758f5860992SSakthivel K break; 2759f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 2760f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2761f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 2762f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2763f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2764f5860992SSakthivel K break; 2765f5860992SSakthivel K case IO_XFER_ERROR_PEER_ABORTED: 2766f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2767f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PEER_ABORTED\n")); 2768f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2769f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2770f5860992SSakthivel K break; 2771f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 2772f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2773f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n")); 2774f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2775f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2776f5860992SSakthivel K break; 2777f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2778f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2779f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2780f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2781f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2782f5860992SSakthivel K break; 2783f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 2784f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2785f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n")); 2786f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2787f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2788f5860992SSakthivel K break; 2789f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 2790f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2791f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n")); 2792f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2793f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2794f5860992SSakthivel K break; 2795f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 2796f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2797f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n")); 2798f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2799f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2800f5860992SSakthivel K break; 2801f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 2802f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2803f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n")); 2804f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2805f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2806f5860992SSakthivel K break; 2807f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 2808f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2809f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n")); 2810f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2811f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2812f5860992SSakthivel K break; 2813f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 2814f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2815f5860992SSakthivel K pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n")); 2816f5860992SSakthivel K break; 2817f5860992SSakthivel K case IO_XFER_PIO_SETUP_ERROR: 2818f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2819f5860992SSakthivel K pm8001_printk("IO_XFER_PIO_SETUP_ERROR\n")); 2820f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2821f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2822f5860992SSakthivel K break; 2823a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 2824a6cb3d01SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2825a6cb3d01SSakthivel K pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n")); 2826a6cb3d01SSakthivel K /* TBC: used default set values */ 2827a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2828a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2829a6cb3d01SSakthivel K break; 2830a6cb3d01SSakthivel K case IO_XFER_DMA_ACTIVATE_TIMEOUT: 2831a6cb3d01SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2832a6cb3d01SSakthivel K pm8001_printk("IO_XFR_DMA_ACTIVATE_TIMEOUT\n")); 2833a6cb3d01SSakthivel K /* TBC: used default set values */ 2834a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2835a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2836a6cb3d01SSakthivel K break; 2837f5860992SSakthivel K default: 2838f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2839f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", event)); 2840f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2841f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2842f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2843f5860992SSakthivel K break; 2844f5860992SSakthivel K } 2845f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2846f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2847f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2848f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2849f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2850f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2851f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2852f5860992SSakthivel K pm8001_printk("task 0x%p done with io_status 0x%x" 2853f5860992SSakthivel K " resp 0x%x stat 0x%x but aborted by upper layer!\n", 2854f5860992SSakthivel K t, event, ts->resp, ts->stat)); 2855f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 28562b01d816SSuresh Thiagarajan } else { 2857f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 28582b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2859f5860992SSakthivel K } 2860f5860992SSakthivel K } 2861f5860992SSakthivel K 2862f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2863f5860992SSakthivel K static void 2864f5860992SSakthivel K mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 2865f5860992SSakthivel K { 2866f5860992SSakthivel K u32 param, i; 2867f5860992SSakthivel K struct sas_task *t; 2868f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2869f5860992SSakthivel K unsigned long flags; 2870f5860992SSakthivel K u32 status; 2871f5860992SSakthivel K u32 tag; 2872f5860992SSakthivel K struct smp_completion_resp *psmpPayload; 2873f5860992SSakthivel K struct task_status_struct *ts; 2874f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2875f5860992SSakthivel K char *pdma_respaddr = NULL; 2876f5860992SSakthivel K 2877f5860992SSakthivel K psmpPayload = (struct smp_completion_resp *)(piomb + 4); 2878f5860992SSakthivel K status = le32_to_cpu(psmpPayload->status); 2879f5860992SSakthivel K tag = le32_to_cpu(psmpPayload->tag); 2880f5860992SSakthivel K 2881f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2882f5860992SSakthivel K param = le32_to_cpu(psmpPayload->param); 2883f5860992SSakthivel K t = ccb->task; 2884f5860992SSakthivel K ts = &t->task_status; 2885f5860992SSakthivel K pm8001_dev = ccb->device; 2886f5860992SSakthivel K if (status) 2887f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2888f5860992SSakthivel K pm8001_printk("smp IO status 0x%x\n", status)); 2889f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 2890f5860992SSakthivel K return; 2891f5860992SSakthivel K 28927370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, 28937370672dSpeter chang pm8001_printk("tag::0x%x status::0x%x\n", tag, status)); 28947370672dSpeter chang 2895f5860992SSakthivel K switch (status) { 2896f5860992SSakthivel K 2897f5860992SSakthivel K case IO_SUCCESS: 2898f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n")); 2899f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2900f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 2901f5860992SSakthivel K if (pm8001_dev) 2902f5860992SSakthivel K pm8001_dev->running_req--; 2903f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 2904f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2905f5860992SSakthivel K pm8001_printk("DIRECT RESPONSE Length:%d\n", 2906f5860992SSakthivel K param)); 2907f5860992SSakthivel K pdma_respaddr = (char *)(phys_to_virt(cpu_to_le64 2908f5860992SSakthivel K ((u64)sg_dma_address 2909f5860992SSakthivel K (&t->smp_task.smp_resp)))); 2910f5860992SSakthivel K for (i = 0; i < param; i++) { 2911f5860992SSakthivel K *(pdma_respaddr+i) = psmpPayload->_r_a[i]; 2912f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2913f5860992SSakthivel K "SMP Byte%d DMA data 0x%x psmp 0x%x\n", 2914f5860992SSakthivel K i, *(pdma_respaddr+i), 2915f5860992SSakthivel K psmpPayload->_r_a[i])); 2916f5860992SSakthivel K } 2917f5860992SSakthivel K } 2918f5860992SSakthivel K break; 2919f5860992SSakthivel K case IO_ABORTED: 2920f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2921f5860992SSakthivel K pm8001_printk("IO_ABORTED IOMB\n")); 2922f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2923f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2924f5860992SSakthivel K if (pm8001_dev) 2925f5860992SSakthivel K pm8001_dev->running_req--; 2926f5860992SSakthivel K break; 2927f5860992SSakthivel K case IO_OVERFLOW: 2928f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n")); 2929f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2930f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2931f5860992SSakthivel K ts->residual = 0; 2932f5860992SSakthivel K if (pm8001_dev) 2933f5860992SSakthivel K pm8001_dev->running_req--; 2934f5860992SSakthivel K break; 2935f5860992SSakthivel K case IO_NO_DEVICE: 2936f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_NO_DEVICE\n")); 2937f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2938f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 2939f5860992SSakthivel K break; 2940f5860992SSakthivel K case IO_ERROR_HW_TIMEOUT: 2941f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2942f5860992SSakthivel K pm8001_printk("IO_ERROR_HW_TIMEOUT\n")); 2943f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2944f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 2945f5860992SSakthivel K break; 2946f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2947f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2948f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2949f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2950f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 2951f5860992SSakthivel K break; 2952f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2953f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2954f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2955f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2956f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 2957f5860992SSakthivel K break; 2958f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2959f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2960f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2961f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2962f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2963f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2964f5860992SSakthivel K break; 2965f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2966f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2967f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2968f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2969f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2970f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2971f5860992SSakthivel K break; 2972f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2973f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2974f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2975f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2976f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2977f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2978f5860992SSakthivel K break; 2979f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2980a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2981a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2982a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2983a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2984a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2985f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2986f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2987f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2988f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2989f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2990f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2991f5860992SSakthivel K pm8001_dev, 2992f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2993f5860992SSakthivel K break; 2994f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2995f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2996f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2997f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2998f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2999f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 3000f5860992SSakthivel K break; 3001f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 3002f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk(\ 3003f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 3004f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3005f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3006f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 3007f5860992SSakthivel K break; 3008f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 3009f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3010f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 3011f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3012f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3013f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 3014f5860992SSakthivel K break; 3015f5860992SSakthivel K case IO_XFER_ERROR_RX_FRAME: 3016f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3017f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_RX_FRAME\n")); 3018f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3019f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3020f5860992SSakthivel K break; 3021f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 3022f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3023f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 3024f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3025f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3026f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3027f5860992SSakthivel K break; 3028f5860992SSakthivel K case IO_ERROR_INTERNAL_SMP_RESOURCE: 3029f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3030f5860992SSakthivel K pm8001_printk("IO_ERROR_INTERNAL_SMP_RESOURCE\n")); 3031f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3032f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 3033f5860992SSakthivel K break; 3034f5860992SSakthivel K case IO_PORT_IN_RESET: 3035f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3036f5860992SSakthivel K pm8001_printk("IO_PORT_IN_RESET\n")); 3037f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3038f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3039f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3040f5860992SSakthivel K break; 3041f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 3042f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3043f5860992SSakthivel K pm8001_printk("IO_DS_NON_OPERATIONAL\n")); 3044f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3045f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3046f5860992SSakthivel K break; 3047f5860992SSakthivel K case IO_DS_IN_RECOVERY: 3048f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3049f5860992SSakthivel K pm8001_printk("IO_DS_IN_RECOVERY\n")); 3050f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3051f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3052f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3053f5860992SSakthivel K break; 3054f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 3055f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 3056f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n")); 3057f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3058f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 3059f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 3060f5860992SSakthivel K break; 3061f5860992SSakthivel K default: 30627370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 3063f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", status)); 3064f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 3065f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 3066f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 3067f5860992SSakthivel K break; 3068f5860992SSakthivel K } 3069f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 3070f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 3071f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 3072f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 3073f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 3074f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 3075f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 3076f5860992SSakthivel K "task 0x%p done with io_status 0x%x resp 0x%x" 3077f5860992SSakthivel K "stat 0x%x but aborted by upper layer!\n", 3078f5860992SSakthivel K t, status, ts->resp, ts->stat)); 3079f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3080f5860992SSakthivel K } else { 3081f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 3082f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 3083f5860992SSakthivel K mb();/* in order to force CPU ordering */ 3084f5860992SSakthivel K t->task_done(t); 3085f5860992SSakthivel K } 3086f5860992SSakthivel K } 3087f5860992SSakthivel K 3088f5860992SSakthivel K /** 3089f5860992SSakthivel K * pm80xx_hw_event_ack_req- For PM8001,some events need to acknowage to FW. 3090f5860992SSakthivel K * @pm8001_ha: our hba card information 3091f5860992SSakthivel K * @Qnum: the outbound queue message number. 3092f5860992SSakthivel K * @SEA: source of event to ack 3093f5860992SSakthivel K * @port_id: port id. 3094f5860992SSakthivel K * @phyId: phy id. 3095f5860992SSakthivel K * @param0: parameter 0. 3096f5860992SSakthivel K * @param1: parameter 1. 3097f5860992SSakthivel K */ 3098f5860992SSakthivel K static void pm80xx_hw_event_ack_req(struct pm8001_hba_info *pm8001_ha, 3099f5860992SSakthivel K u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, u32 param1) 3100f5860992SSakthivel K { 3101f5860992SSakthivel K struct hw_event_ack_req payload; 3102f5860992SSakthivel K u32 opc = OPC_INB_SAS_HW_EVENT_ACK; 3103f5860992SSakthivel K 3104f5860992SSakthivel K struct inbound_queue_table *circularQ; 3105f5860992SSakthivel K 3106f5860992SSakthivel K memset((u8 *)&payload, 0, sizeof(payload)); 3107f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[Qnum]; 3108f5860992SSakthivel K payload.tag = cpu_to_le32(1); 3109f5860992SSakthivel K payload.phyid_sea_portid = cpu_to_le32(((SEA & 0xFFFF) << 8) | 3110f5860992SSakthivel K ((phyId & 0xFF) << 24) | (port_id & 0xFF)); 3111f5860992SSakthivel K payload.param0 = cpu_to_le32(param0); 3112f5860992SSakthivel K payload.param1 = cpu_to_le32(param1); 311391a43fa6Speter chang pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 311491a43fa6Speter chang sizeof(payload), 0); 3115f5860992SSakthivel K } 3116f5860992SSakthivel K 3117f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 3118f5860992SSakthivel K u32 phyId, u32 phy_op); 3119f5860992SSakthivel K 31208414cd80SViswas G static void hw_event_port_recover(struct pm8001_hba_info *pm8001_ha, 31218414cd80SViswas G void *piomb) 31228414cd80SViswas G { 31238414cd80SViswas G struct hw_event_resp *pPayload = (struct hw_event_resp *)(piomb + 4); 31248414cd80SViswas G u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 31258414cd80SViswas G u8 phy_id = (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 31268414cd80SViswas G u32 lr_status_evt_portid = 31278414cd80SViswas G le32_to_cpu(pPayload->lr_status_evt_portid); 31288414cd80SViswas G u8 deviceType = pPayload->sas_identify.dev_type; 31298414cd80SViswas G u8 link_rate = (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 31308414cd80SViswas G struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 31318414cd80SViswas G u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 31328414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 31338414cd80SViswas G 31348414cd80SViswas G if (deviceType == SAS_END_DEVICE) { 31358414cd80SViswas G pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 31368414cd80SViswas G PHY_NOTIFY_ENABLE_SPINUP); 31378414cd80SViswas G } 31388414cd80SViswas G 31398414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 31408414cd80SViswas G pm8001_get_lrate_mode(phy, link_rate); 31418414cd80SViswas G phy->sas_phy.oob_mode = SAS_OOB_MODE; 31428414cd80SViswas G phy->phy_state = PHY_STATE_LINK_UP_SPCV; 31438414cd80SViswas G phy->phy_attached = 1; 31448414cd80SViswas G } 31458414cd80SViswas G 3146f5860992SSakthivel K /** 3147f5860992SSakthivel K * hw_event_sas_phy_up -FW tells me a SAS phy up event. 3148f5860992SSakthivel K * @pm8001_ha: our hba card information 3149f5860992SSakthivel K * @piomb: IO message buffer 3150f5860992SSakthivel K */ 3151f5860992SSakthivel K static void 3152f5860992SSakthivel K hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3153f5860992SSakthivel K { 3154f5860992SSakthivel K struct hw_event_resp *pPayload = 3155f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3156f5860992SSakthivel K u32 lr_status_evt_portid = 3157f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3158f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3159f5860992SSakthivel K 3160f5860992SSakthivel K u8 link_rate = 3161f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3162f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3163f5860992SSakthivel K u8 phy_id = 3164f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3165f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3166f5860992SSakthivel K 3167f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3168f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3169f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3170f5860992SSakthivel K unsigned long flags; 3171f5860992SSakthivel K u8 deviceType = pPayload->sas_identify.dev_type; 3172f5860992SSakthivel K port->port_state = portstate; 31738414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 31747d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 3175f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3176f5860992SSakthivel K "portid:%d; phyid:%d; linkrate:%d; " 3177f5860992SSakthivel K "portstate:%x; devicetype:%x\n", 3178f5860992SSakthivel K port_id, phy_id, link_rate, portstate, deviceType)); 3179f5860992SSakthivel K 3180f5860992SSakthivel K switch (deviceType) { 3181f5860992SSakthivel K case SAS_PHY_UNUSED: 3182f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3183f5860992SSakthivel K pm8001_printk("device type no device.\n")); 3184f5860992SSakthivel K break; 3185f5860992SSakthivel K case SAS_END_DEVICE: 3186f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n")); 3187f5860992SSakthivel K pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 3188f5860992SSakthivel K PHY_NOTIFY_ENABLE_SPINUP); 3189f5860992SSakthivel K port->port_attached = 1; 3190f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3191f5860992SSakthivel K break; 3192f5860992SSakthivel K case SAS_EDGE_EXPANDER_DEVICE: 3193f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3194f5860992SSakthivel K pm8001_printk("expander device.\n")); 3195f5860992SSakthivel K port->port_attached = 1; 3196f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3197f5860992SSakthivel K break; 3198f5860992SSakthivel K case SAS_FANOUT_EXPANDER_DEVICE: 3199f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3200f5860992SSakthivel K pm8001_printk("fanout expander device.\n")); 3201f5860992SSakthivel K port->port_attached = 1; 3202f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3203f5860992SSakthivel K break; 3204f5860992SSakthivel K default: 32057370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 3206f5860992SSakthivel K pm8001_printk("unknown device type(%x)\n", deviceType)); 3207f5860992SSakthivel K break; 3208f5860992SSakthivel K } 3209f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SAS; 3210f5860992SSakthivel K phy->identify.device_type = deviceType; 3211f5860992SSakthivel K phy->phy_attached = 1; 3212f5860992SSakthivel K if (phy->identify.device_type == SAS_END_DEVICE) 3213f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SSP; 3214f5860992SSakthivel K else if (phy->identify.device_type != SAS_PHY_UNUSED) 3215f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; 3216f5860992SSakthivel K phy->sas_phy.oob_mode = SAS_OOB_MODE; 3217f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); 3218f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3219f5860992SSakthivel K memcpy(phy->frame_rcvd, &pPayload->sas_identify, 3220f5860992SSakthivel K sizeof(struct sas_identify_frame)-4); 3221f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct sas_identify_frame) - 4; 3222f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3223f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3224f5860992SSakthivel K if (pm8001_ha->flags == PM8001F_RUN_TIME) 32254daf1ef3SVikram Auradkar msleep(200);/*delay a moment to wait disk to spinup*/ 3226f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3227f5860992SSakthivel K } 3228f5860992SSakthivel K 3229f5860992SSakthivel K /** 3230f5860992SSakthivel K * hw_event_sata_phy_up -FW tells me a SATA phy up event. 3231f5860992SSakthivel K * @pm8001_ha: our hba card information 3232f5860992SSakthivel K * @piomb: IO message buffer 3233f5860992SSakthivel K */ 3234f5860992SSakthivel K static void 3235f5860992SSakthivel K hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3236f5860992SSakthivel K { 3237f5860992SSakthivel K struct hw_event_resp *pPayload = 3238f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3239f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3240f5860992SSakthivel K u32 lr_status_evt_portid = 3241f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3242f5860992SSakthivel K u8 link_rate = 3243f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3244f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3245f5860992SSakthivel K u8 phy_id = 3246f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3247f5860992SSakthivel K 3248f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3249f5860992SSakthivel K 3250f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3251f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3252f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3253f5860992SSakthivel K unsigned long flags; 32547370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk( 3255f5860992SSakthivel K "port id %d, phy id %d link_rate %d portstate 0x%x\n", 3256f5860992SSakthivel K port_id, phy_id, link_rate, portstate)); 3257f5860992SSakthivel K 3258f5860992SSakthivel K port->port_state = portstate; 32597d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 3260f5860992SSakthivel K port->port_attached = 1; 3261f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3262f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SATA; 3263f5860992SSakthivel K phy->phy_attached = 1; 3264f5860992SSakthivel K phy->sas_phy.oob_mode = SATA_OOB_MODE; 3265f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); 3266f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3267f5860992SSakthivel K memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), 3268f5860992SSakthivel K sizeof(struct dev_to_host_fis)); 3269f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct dev_to_host_fis); 3270f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SATA; 3271aa9f8328SJames Bottomley phy->identify.device_type = SAS_SATA_DEV; 3272f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3273f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3274f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3275f5860992SSakthivel K } 3276f5860992SSakthivel K 3277f5860992SSakthivel K /** 3278f5860992SSakthivel K * hw_event_phy_down -we should notify the libsas the phy is down. 3279f5860992SSakthivel K * @pm8001_ha: our hba card information 3280f5860992SSakthivel K * @piomb: IO message buffer 3281f5860992SSakthivel K */ 3282f5860992SSakthivel K static void 3283f5860992SSakthivel K hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) 3284f5860992SSakthivel K { 3285f5860992SSakthivel K struct hw_event_resp *pPayload = 3286f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3287f5860992SSakthivel K 3288f5860992SSakthivel K u32 lr_status_evt_portid = 3289f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3290f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3291f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3292f5860992SSakthivel K u8 phy_id = 3293f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3294f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3295f5860992SSakthivel K 3296f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3297f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3298869ddbdcSViswas G u32 port_sata = (phy->phy_type & PORT_TYPE_SATA); 3299f5860992SSakthivel K port->port_state = portstate; 3300f5860992SSakthivel K phy->identify.device_type = 0; 3301f5860992SSakthivel K phy->phy_attached = 0; 3302f5860992SSakthivel K switch (portstate) { 3303f5860992SSakthivel K case PORT_VALID: 3304f5860992SSakthivel K break; 3305f5860992SSakthivel K case PORT_INVALID: 3306f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3307f5860992SSakthivel K pm8001_printk(" PortInvalid portID %d\n", port_id)); 3308f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3309f5860992SSakthivel K pm8001_printk(" Last phy Down and port invalid\n")); 3310869ddbdcSViswas G if (port_sata) { 33118414cd80SViswas G phy->phy_type = 0; 3312f5860992SSakthivel K port->port_attached = 0; 3313f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3314f5860992SSakthivel K port_id, phy_id, 0, 0); 33158414cd80SViswas G } 33168414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3317f5860992SSakthivel K break; 3318f5860992SSakthivel K case PORT_IN_RESET: 3319f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3320f5860992SSakthivel K pm8001_printk(" Port In Reset portID %d\n", port_id)); 3321f5860992SSakthivel K break; 3322f5860992SSakthivel K case PORT_NOT_ESTABLISHED: 3323f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 33248414cd80SViswas G pm8001_printk(" Phy Down and PORT_NOT_ESTABLISHED\n")); 3325f5860992SSakthivel K port->port_attached = 0; 3326f5860992SSakthivel K break; 3327f5860992SSakthivel K case PORT_LOSTCOMM: 3328f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 33298414cd80SViswas G pm8001_printk(" Phy Down and PORT_LOSTCOMM\n")); 3330f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3331f5860992SSakthivel K pm8001_printk(" Last phy Down and port invalid\n")); 3332869ddbdcSViswas G if (port_sata) { 3333f5860992SSakthivel K port->port_attached = 0; 33348414cd80SViswas G phy->phy_type = 0; 3335f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3336f5860992SSakthivel K port_id, phy_id, 0, 0); 33378414cd80SViswas G } 33388414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3339f5860992SSakthivel K break; 3340f5860992SSakthivel K default: 3341f5860992SSakthivel K port->port_attached = 0; 33427370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 33438414cd80SViswas G pm8001_printk(" Phy Down and(default) = 0x%x\n", 3344f5860992SSakthivel K portstate)); 3345f5860992SSakthivel K break; 3346f5860992SSakthivel K 3347f5860992SSakthivel K } 3348869ddbdcSViswas G if (port_sata && (portstate != PORT_IN_RESET)) { 3349869ddbdcSViswas G struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3350869ddbdcSViswas G 3351869ddbdcSViswas G sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); 3352869ddbdcSViswas G } 3353f5860992SSakthivel K } 3354f5860992SSakthivel K 3355f5860992SSakthivel K static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3356f5860992SSakthivel K { 3357f5860992SSakthivel K struct phy_start_resp *pPayload = 3358f5860992SSakthivel K (struct phy_start_resp *)(piomb + 4); 3359f5860992SSakthivel K u32 status = 3360f5860992SSakthivel K le32_to_cpu(pPayload->status); 3361f5860992SSakthivel K u32 phy_id = 3362f5860992SSakthivel K le32_to_cpu(pPayload->phyid); 3363f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3364f5860992SSakthivel K 3365f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 3366f5860992SSakthivel K pm8001_printk("phy start resp status:0x%x, phyid:0x%x\n", 3367f5860992SSakthivel K status, phy_id)); 3368f5860992SSakthivel K if (status == 0) { 3369cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DOWN; 3370cd135754SDeepak Ukey if (pm8001_ha->flags == PM8001F_RUN_TIME && 3371e703977bSpeter chang phy->enable_completion != NULL) { 3372f5860992SSakthivel K complete(phy->enable_completion); 3373e703977bSpeter chang phy->enable_completion = NULL; 3374e703977bSpeter chang } 3375f5860992SSakthivel K } 3376f5860992SSakthivel K return 0; 3377f5860992SSakthivel K 3378f5860992SSakthivel K } 3379f5860992SSakthivel K 3380f5860992SSakthivel K /** 3381f5860992SSakthivel K * mpi_thermal_hw_event -The hw event has come. 3382f5860992SSakthivel K * @pm8001_ha: our hba card information 3383f5860992SSakthivel K * @piomb: IO message buffer 3384f5860992SSakthivel K */ 3385f5860992SSakthivel K static int mpi_thermal_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3386f5860992SSakthivel K { 3387f5860992SSakthivel K struct thermal_hw_event *pPayload = 3388f5860992SSakthivel K (struct thermal_hw_event *)(piomb + 4); 3389f5860992SSakthivel K 3390f5860992SSakthivel K u32 thermal_event = le32_to_cpu(pPayload->thermal_event); 3391f5860992SSakthivel K u32 rht_lht = le32_to_cpu(pPayload->rht_lht); 3392f5860992SSakthivel K 3393f5860992SSakthivel K if (thermal_event & 0x40) { 3394f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3395f5860992SSakthivel K "Thermal Event: Local high temperature violated!\n")); 3396f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3397f5860992SSakthivel K "Thermal Event: Measured local high temperature %d\n", 3398f5860992SSakthivel K ((rht_lht & 0xFF00) >> 8))); 3399f5860992SSakthivel K } 3400f5860992SSakthivel K if (thermal_event & 0x10) { 3401f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3402f5860992SSakthivel K "Thermal Event: Remote high temperature violated!\n")); 3403f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3404f5860992SSakthivel K "Thermal Event: Measured remote high temperature %d\n", 3405f5860992SSakthivel K ((rht_lht & 0xFF000000) >> 24))); 3406f5860992SSakthivel K } 3407f5860992SSakthivel K return 0; 3408f5860992SSakthivel K } 3409f5860992SSakthivel K 3410f5860992SSakthivel K /** 3411f5860992SSakthivel K * mpi_hw_event -The hw event has come. 3412f5860992SSakthivel K * @pm8001_ha: our hba card information 3413f5860992SSakthivel K * @piomb: IO message buffer 3414f5860992SSakthivel K */ 3415f5860992SSakthivel K static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3416f5860992SSakthivel K { 34178414cd80SViswas G unsigned long flags, i; 3418f5860992SSakthivel K struct hw_event_resp *pPayload = 3419f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3420f5860992SSakthivel K u32 lr_status_evt_portid = 3421f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3422f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3423f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3424f5860992SSakthivel K u8 phy_id = 3425f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3426f5860992SSakthivel K u16 eventType = 3427f5860992SSakthivel K (u16)((lr_status_evt_portid & 0x00FFFF00) >> 8); 3428f5860992SSakthivel K u8 status = 3429f5860992SSakthivel K (u8)((lr_status_evt_portid & 0x0F000000) >> 24); 3430f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3431f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 34328414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 3433f5860992SSakthivel K struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; 34347370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, 3435f5860992SSakthivel K pm8001_printk("portid:%d phyid:%d event:0x%x status:0x%x\n", 3436f5860992SSakthivel K port_id, phy_id, eventType, status)); 3437f5860992SSakthivel K 3438f5860992SSakthivel K switch (eventType) { 3439f5860992SSakthivel K 3440f5860992SSakthivel K case HW_EVENT_SAS_PHY_UP: 3441f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3442f5860992SSakthivel K pm8001_printk("HW_EVENT_PHY_START_STATUS\n")); 3443f5860992SSakthivel K hw_event_sas_phy_up(pm8001_ha, piomb); 3444f5860992SSakthivel K break; 3445f5860992SSakthivel K case HW_EVENT_SATA_PHY_UP: 3446f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3447f5860992SSakthivel K pm8001_printk("HW_EVENT_SATA_PHY_UP\n")); 3448f5860992SSakthivel K hw_event_sata_phy_up(pm8001_ha, piomb); 3449f5860992SSakthivel K break; 3450f5860992SSakthivel K case HW_EVENT_SATA_SPINUP_HOLD: 3451f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3452f5860992SSakthivel K pm8001_printk("HW_EVENT_SATA_SPINUP_HOLD\n")); 3453f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); 3454f5860992SSakthivel K break; 3455f5860992SSakthivel K case HW_EVENT_PHY_DOWN: 3456f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3457f5860992SSakthivel K pm8001_printk("HW_EVENT_PHY_DOWN\n")); 3458869ddbdcSViswas G hw_event_phy_down(pm8001_ha, piomb); 3459869ddbdcSViswas G if (pm8001_ha->reset_in_progress) { 3460869ddbdcSViswas G PM8001_MSG_DBG(pm8001_ha, 3461869ddbdcSViswas G pm8001_printk("Reset in progress\n")); 3462869ddbdcSViswas G return 0; 3463869ddbdcSViswas G } 3464f5860992SSakthivel K phy->phy_attached = 0; 3465cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3466f5860992SSakthivel K break; 3467f5860992SSakthivel K case HW_EVENT_PORT_INVALID: 3468f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3469f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_INVALID\n")); 3470f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3471f5860992SSakthivel K phy->phy_attached = 0; 3472f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3473f5860992SSakthivel K break; 3474f5860992SSakthivel K /* the broadcast change primitive received, tell the LIBSAS this event 3475f5860992SSakthivel K to revalidate the sas domain*/ 3476f5860992SSakthivel K case HW_EVENT_BROADCAST_CHANGE: 3477f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3478f5860992SSakthivel K pm8001_printk("HW_EVENT_BROADCAST_CHANGE\n")); 3479f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE, 3480f5860992SSakthivel K port_id, phy_id, 1, 0); 3481f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3482f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; 3483f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3484f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3485f5860992SSakthivel K break; 3486f5860992SSakthivel K case HW_EVENT_PHY_ERROR: 3487f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3488f5860992SSakthivel K pm8001_printk("HW_EVENT_PHY_ERROR\n")); 3489f5860992SSakthivel K sas_phy_disconnected(&phy->sas_phy); 3490f5860992SSakthivel K phy->phy_attached = 0; 3491f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); 3492f5860992SSakthivel K break; 3493f5860992SSakthivel K case HW_EVENT_BROADCAST_EXP: 3494f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3495f5860992SSakthivel K pm8001_printk("HW_EVENT_BROADCAST_EXP\n")); 3496f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3497f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; 3498f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3499f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3500f5860992SSakthivel K break; 3501f5860992SSakthivel K case HW_EVENT_LINK_ERR_INVALID_DWORD: 3502f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3503f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_INVALID_DWORD\n")); 3504f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3505f5860992SSakthivel K HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0); 3506f5860992SSakthivel K break; 3507f5860992SSakthivel K case HW_EVENT_LINK_ERR_DISPARITY_ERROR: 3508f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3509f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_DISPARITY_ERROR\n")); 3510f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3511f5860992SSakthivel K HW_EVENT_LINK_ERR_DISPARITY_ERROR, 3512f5860992SSakthivel K port_id, phy_id, 0, 0); 3513f5860992SSakthivel K break; 3514f5860992SSakthivel K case HW_EVENT_LINK_ERR_CODE_VIOLATION: 3515f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3516f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_CODE_VIOLATION\n")); 3517f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3518f5860992SSakthivel K HW_EVENT_LINK_ERR_CODE_VIOLATION, 3519f5860992SSakthivel K port_id, phy_id, 0, 0); 3520f5860992SSakthivel K break; 3521f5860992SSakthivel K case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH: 3522f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3523f5860992SSakthivel K "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n")); 3524f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3525f5860992SSakthivel K HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH, 3526f5860992SSakthivel K port_id, phy_id, 0, 0); 3527f5860992SSakthivel K break; 3528f5860992SSakthivel K case HW_EVENT_MALFUNCTION: 3529f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3530f5860992SSakthivel K pm8001_printk("HW_EVENT_MALFUNCTION\n")); 3531f5860992SSakthivel K break; 3532f5860992SSakthivel K case HW_EVENT_BROADCAST_SES: 3533f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3534f5860992SSakthivel K pm8001_printk("HW_EVENT_BROADCAST_SES\n")); 3535f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3536f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; 3537f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3538f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3539f5860992SSakthivel K break; 3540f5860992SSakthivel K case HW_EVENT_INBOUND_CRC_ERROR: 3541f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3542f5860992SSakthivel K pm8001_printk("HW_EVENT_INBOUND_CRC_ERROR\n")); 3543f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3544f5860992SSakthivel K HW_EVENT_INBOUND_CRC_ERROR, 3545f5860992SSakthivel K port_id, phy_id, 0, 0); 3546f5860992SSakthivel K break; 3547f5860992SSakthivel K case HW_EVENT_HARD_RESET_RECEIVED: 3548f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3549f5860992SSakthivel K pm8001_printk("HW_EVENT_HARD_RESET_RECEIVED\n")); 3550f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET); 3551f5860992SSakthivel K break; 3552f5860992SSakthivel K case HW_EVENT_ID_FRAME_TIMEOUT: 3553f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3554f5860992SSakthivel K pm8001_printk("HW_EVENT_ID_FRAME_TIMEOUT\n")); 3555f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3556f5860992SSakthivel K phy->phy_attached = 0; 3557f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3558f5860992SSakthivel K break; 3559f5860992SSakthivel K case HW_EVENT_LINK_ERR_PHY_RESET_FAILED: 3560f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3561f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n")); 3562f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3563f5860992SSakthivel K HW_EVENT_LINK_ERR_PHY_RESET_FAILED, 3564f5860992SSakthivel K port_id, phy_id, 0, 0); 3565f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3566f5860992SSakthivel K phy->phy_attached = 0; 3567f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3568f5860992SSakthivel K break; 3569f5860992SSakthivel K case HW_EVENT_PORT_RESET_TIMER_TMO: 3570f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3571f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RESET_TIMER_TMO\n")); 3572869ddbdcSViswas G pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3573869ddbdcSViswas G port_id, phy_id, 0, 0); 3574f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3575f5860992SSakthivel K phy->phy_attached = 0; 3576f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3577869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3578869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3579869ddbdcSViswas G PORT_RESET_TMO; 3580869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3581869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3582869ddbdcSViswas G } 3583f5860992SSakthivel K break; 3584f5860992SSakthivel K case HW_EVENT_PORT_RECOVERY_TIMER_TMO: 3585f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3586f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RECOVERY_TIMER_TMO\n")); 3587a6cb3d01SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3588a6cb3d01SSakthivel K HW_EVENT_PORT_RECOVERY_TIMER_TMO, 3589a6cb3d01SSakthivel K port_id, phy_id, 0, 0); 35908414cd80SViswas G for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 35918414cd80SViswas G if (port->wide_port_phymap & (1 << i)) { 35928414cd80SViswas G phy = &pm8001_ha->phy[i]; 35938414cd80SViswas G sas_ha->notify_phy_event(&phy->sas_phy, 35948414cd80SViswas G PHYE_LOSS_OF_SIGNAL); 35958414cd80SViswas G port->wide_port_phymap &= ~(1 << i); 35968414cd80SViswas G } 35978414cd80SViswas G } 3598f5860992SSakthivel K break; 3599f5860992SSakthivel K case HW_EVENT_PORT_RECOVER: 3600f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3601f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RECOVER\n")); 36028414cd80SViswas G hw_event_port_recover(pm8001_ha, piomb); 3603f5860992SSakthivel K break; 3604f5860992SSakthivel K case HW_EVENT_PORT_RESET_COMPLETE: 3605f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3606f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RESET_COMPLETE\n")); 3607869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3608869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3609869ddbdcSViswas G PORT_RESET_SUCCESS; 3610869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3611869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3612869ddbdcSViswas G } 3613f5860992SSakthivel K break; 3614f5860992SSakthivel K case EVENT_BROADCAST_ASYNCH_EVENT: 3615f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3616f5860992SSakthivel K pm8001_printk("EVENT_BROADCAST_ASYNCH_EVENT\n")); 3617f5860992SSakthivel K break; 3618f5860992SSakthivel K default: 36197370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 3620f5860992SSakthivel K pm8001_printk("Unknown event type 0x%x\n", eventType)); 3621f5860992SSakthivel K break; 3622f5860992SSakthivel K } 3623f5860992SSakthivel K return 0; 3624f5860992SSakthivel K } 3625f5860992SSakthivel K 3626f5860992SSakthivel K /** 3627f5860992SSakthivel K * mpi_phy_stop_resp - SPCv specific 3628f5860992SSakthivel K * @pm8001_ha: our hba card information 3629f5860992SSakthivel K * @piomb: IO message buffer 3630f5860992SSakthivel K */ 3631f5860992SSakthivel K static int mpi_phy_stop_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3632f5860992SSakthivel K { 3633f5860992SSakthivel K struct phy_stop_resp *pPayload = 3634f5860992SSakthivel K (struct phy_stop_resp *)(piomb + 4); 3635f5860992SSakthivel K u32 status = 3636f5860992SSakthivel K le32_to_cpu(pPayload->status); 3637f5860992SSakthivel K u32 phyid = 3638cd135754SDeepak Ukey le32_to_cpu(pPayload->phyid) & 0xFF; 3639f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phyid]; 3640f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3641f5860992SSakthivel K pm8001_printk("phy:0x%x status:0x%x\n", 3642f5860992SSakthivel K phyid, status)); 3643cd135754SDeepak Ukey if (status == PHY_STOP_SUCCESS || 3644cd135754SDeepak Ukey status == PHY_STOP_ERR_DEVICE_ATTACHED) 3645cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3646f5860992SSakthivel K return 0; 3647f5860992SSakthivel K } 3648f5860992SSakthivel K 3649f5860992SSakthivel K /** 3650f5860992SSakthivel K * mpi_set_controller_config_resp - SPCv specific 3651f5860992SSakthivel K * @pm8001_ha: our hba card information 3652f5860992SSakthivel K * @piomb: IO message buffer 3653f5860992SSakthivel K */ 3654f5860992SSakthivel K static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3655f5860992SSakthivel K void *piomb) 3656f5860992SSakthivel K { 3657f5860992SSakthivel K struct set_ctrl_cfg_resp *pPayload = 3658f5860992SSakthivel K (struct set_ctrl_cfg_resp *)(piomb + 4); 3659f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3660f5860992SSakthivel K u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd); 3661f5860992SSakthivel K 3662f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3663f5860992SSakthivel K "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n", 3664f5860992SSakthivel K status, err_qlfr_pgcd)); 3665f5860992SSakthivel K 3666f5860992SSakthivel K return 0; 3667f5860992SSakthivel K } 3668f5860992SSakthivel K 3669f5860992SSakthivel K /** 3670f5860992SSakthivel K * mpi_get_controller_config_resp - SPCv specific 3671f5860992SSakthivel K * @pm8001_ha: our hba card information 3672f5860992SSakthivel K * @piomb: IO message buffer 3673f5860992SSakthivel K */ 3674f5860992SSakthivel K static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3675f5860992SSakthivel K void *piomb) 3676f5860992SSakthivel K { 3677f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3678f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3679f5860992SSakthivel K 3680f5860992SSakthivel K return 0; 3681f5860992SSakthivel K } 3682f5860992SSakthivel K 3683f5860992SSakthivel K /** 3684f5860992SSakthivel K * mpi_get_phy_profile_resp - SPCv specific 3685f5860992SSakthivel K * @pm8001_ha: our hba card information 3686f5860992SSakthivel K * @piomb: IO message buffer 3687f5860992SSakthivel K */ 3688f5860992SSakthivel K static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3689f5860992SSakthivel K void *piomb) 3690f5860992SSakthivel K { 3691f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3692f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3693f5860992SSakthivel K 3694f5860992SSakthivel K return 0; 3695f5860992SSakthivel K } 3696f5860992SSakthivel K 3697f5860992SSakthivel K /** 3698f5860992SSakthivel K * mpi_flash_op_ext_resp - SPCv specific 3699f5860992SSakthivel K * @pm8001_ha: our hba card information 3700f5860992SSakthivel K * @piomb: IO message buffer 3701f5860992SSakthivel K */ 3702f5860992SSakthivel K static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3703f5860992SSakthivel K { 3704f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3705f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3706f5860992SSakthivel K 3707f5860992SSakthivel K return 0; 3708f5860992SSakthivel K } 3709f5860992SSakthivel K 3710f5860992SSakthivel K /** 3711f5860992SSakthivel K * mpi_set_phy_profile_resp - SPCv specific 3712f5860992SSakthivel K * @pm8001_ha: our hba card information 3713f5860992SSakthivel K * @piomb: IO message buffer 3714f5860992SSakthivel K */ 3715f5860992SSakthivel K static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3716f5860992SSakthivel K void *piomb) 3717f5860992SSakthivel K { 37189d9c7c20Syuuzheng u32 tag; 371927909407SAnand Kumar Santhanam u8 page_code; 37209d9c7c20Syuuzheng int rc = 0; 372127909407SAnand Kumar Santhanam struct set_phy_profile_resp *pPayload = 372227909407SAnand Kumar Santhanam (struct set_phy_profile_resp *)(piomb + 4); 372327909407SAnand Kumar Santhanam u32 ppc_phyid = le32_to_cpu(pPayload->ppc_phyid); 372427909407SAnand Kumar Santhanam u32 status = le32_to_cpu(pPayload->status); 3725f5860992SSakthivel K 37269d9c7c20Syuuzheng tag = le32_to_cpu(pPayload->tag); 372727909407SAnand Kumar Santhanam page_code = (u8)((ppc_phyid & 0xFF00) >> 8); 372827909407SAnand Kumar Santhanam if (status) { 372927909407SAnand Kumar Santhanam /* status is FAILED */ 373027909407SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 373127909407SAnand Kumar Santhanam pm8001_printk("PhyProfile command failed with status " 373227909407SAnand Kumar Santhanam "0x%08X \n", status)); 37339d9c7c20Syuuzheng rc = -1; 373427909407SAnand Kumar Santhanam } else { 373527909407SAnand Kumar Santhanam if (page_code != SAS_PHY_ANALOG_SETTINGS_PAGE) { 373627909407SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 373727909407SAnand Kumar Santhanam pm8001_printk("Invalid page code 0x%X\n", 373827909407SAnand Kumar Santhanam page_code)); 37399d9c7c20Syuuzheng rc = -1; 374027909407SAnand Kumar Santhanam } 374127909407SAnand Kumar Santhanam } 37429d9c7c20Syuuzheng pm8001_tag_free(pm8001_ha, tag); 37439d9c7c20Syuuzheng return rc; 3744f5860992SSakthivel K } 3745f5860992SSakthivel K 3746f5860992SSakthivel K /** 3747f5860992SSakthivel K * mpi_kek_management_resp - SPCv specific 3748f5860992SSakthivel K * @pm8001_ha: our hba card information 3749f5860992SSakthivel K * @piomb: IO message buffer 3750f5860992SSakthivel K */ 3751f5860992SSakthivel K static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha, 3752f5860992SSakthivel K void *piomb) 3753f5860992SSakthivel K { 3754f5860992SSakthivel K struct kek_mgmt_resp *pPayload = (struct kek_mgmt_resp *)(piomb + 4); 3755f5860992SSakthivel K 3756f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3757f5860992SSakthivel K u32 kidx_new_curr_ksop = le32_to_cpu(pPayload->kidx_new_curr_ksop); 3758f5860992SSakthivel K u32 err_qlfr = le32_to_cpu(pPayload->err_qlfr); 3759f5860992SSakthivel K 3760f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3761f5860992SSakthivel K "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n", 3762f5860992SSakthivel K status, kidx_new_curr_ksop, err_qlfr)); 3763f5860992SSakthivel K 3764f5860992SSakthivel K return 0; 3765f5860992SSakthivel K } 3766f5860992SSakthivel K 3767f5860992SSakthivel K /** 3768f5860992SSakthivel K * mpi_dek_management_resp - SPCv specific 3769f5860992SSakthivel K * @pm8001_ha: our hba card information 3770f5860992SSakthivel K * @piomb: IO message buffer 3771f5860992SSakthivel K */ 3772f5860992SSakthivel K static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha, 3773f5860992SSakthivel K void *piomb) 3774f5860992SSakthivel K { 3775f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3776f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3777f5860992SSakthivel K 3778f5860992SSakthivel K return 0; 3779f5860992SSakthivel K } 3780f5860992SSakthivel K 3781f5860992SSakthivel K /** 3782f5860992SSakthivel K * ssp_coalesced_comp_resp - SPCv specific 3783f5860992SSakthivel K * @pm8001_ha: our hba card information 3784f5860992SSakthivel K * @piomb: IO message buffer 3785f5860992SSakthivel K */ 3786f5860992SSakthivel K static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha, 3787f5860992SSakthivel K void *piomb) 3788f5860992SSakthivel K { 3789f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3790f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3791f5860992SSakthivel K 3792f5860992SSakthivel K return 0; 3793f5860992SSakthivel K } 3794f5860992SSakthivel K 3795f5860992SSakthivel K /** 3796f5860992SSakthivel K * process_one_iomb - process one outbound Queue memory block 3797f5860992SSakthivel K * @pm8001_ha: our hba card information 3798f5860992SSakthivel K * @piomb: IO message buffer 3799f5860992SSakthivel K */ 3800f5860992SSakthivel K static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, void *piomb) 3801f5860992SSakthivel K { 3802f5860992SSakthivel K __le32 pHeader = *(__le32 *)piomb; 3803f5860992SSakthivel K u32 opc = (u32)((le32_to_cpu(pHeader)) & 0xFFF); 3804f5860992SSakthivel K 3805f5860992SSakthivel K switch (opc) { 3806f5860992SSakthivel K case OPC_OUB_ECHO: 3807f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk("OPC_OUB_ECHO\n")); 3808f5860992SSakthivel K break; 3809f5860992SSakthivel K case OPC_OUB_HW_EVENT: 3810f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3811f5860992SSakthivel K pm8001_printk("OPC_OUB_HW_EVENT\n")); 3812f5860992SSakthivel K mpi_hw_event(pm8001_ha, piomb); 3813f5860992SSakthivel K break; 3814f5860992SSakthivel K case OPC_OUB_THERM_HW_EVENT: 3815f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3816f5860992SSakthivel K pm8001_printk("OPC_OUB_THERMAL_EVENT\n")); 3817f5860992SSakthivel K mpi_thermal_hw_event(pm8001_ha, piomb); 3818f5860992SSakthivel K break; 3819f5860992SSakthivel K case OPC_OUB_SSP_COMP: 3820f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3821f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_COMP\n")); 3822f5860992SSakthivel K mpi_ssp_completion(pm8001_ha, piomb); 3823f5860992SSakthivel K break; 3824f5860992SSakthivel K case OPC_OUB_SMP_COMP: 3825f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3826f5860992SSakthivel K pm8001_printk("OPC_OUB_SMP_COMP\n")); 3827f5860992SSakthivel K mpi_smp_completion(pm8001_ha, piomb); 3828f5860992SSakthivel K break; 3829f5860992SSakthivel K case OPC_OUB_LOCAL_PHY_CNTRL: 3830f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3831f5860992SSakthivel K pm8001_printk("OPC_OUB_LOCAL_PHY_CNTRL\n")); 3832f5860992SSakthivel K pm8001_mpi_local_phy_ctl(pm8001_ha, piomb); 3833f5860992SSakthivel K break; 3834f5860992SSakthivel K case OPC_OUB_DEV_REGIST: 3835f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3836f5860992SSakthivel K pm8001_printk("OPC_OUB_DEV_REGIST\n")); 3837f5860992SSakthivel K pm8001_mpi_reg_resp(pm8001_ha, piomb); 3838f5860992SSakthivel K break; 3839f5860992SSakthivel K case OPC_OUB_DEREG_DEV: 3840f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 38418b513d0cSMasanari Iida pm8001_printk("unregister the device\n")); 3842f5860992SSakthivel K pm8001_mpi_dereg_resp(pm8001_ha, piomb); 3843f5860992SSakthivel K break; 3844f5860992SSakthivel K case OPC_OUB_GET_DEV_HANDLE: 3845f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3846f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_DEV_HANDLE\n")); 3847f5860992SSakthivel K break; 3848f5860992SSakthivel K case OPC_OUB_SATA_COMP: 3849f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3850f5860992SSakthivel K pm8001_printk("OPC_OUB_SATA_COMP\n")); 3851f5860992SSakthivel K mpi_sata_completion(pm8001_ha, piomb); 3852f5860992SSakthivel K break; 3853f5860992SSakthivel K case OPC_OUB_SATA_EVENT: 3854f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3855f5860992SSakthivel K pm8001_printk("OPC_OUB_SATA_EVENT\n")); 3856f5860992SSakthivel K mpi_sata_event(pm8001_ha, piomb); 3857f5860992SSakthivel K break; 3858f5860992SSakthivel K case OPC_OUB_SSP_EVENT: 3859f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3860f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_EVENT\n")); 3861f5860992SSakthivel K mpi_ssp_event(pm8001_ha, piomb); 3862f5860992SSakthivel K break; 3863f5860992SSakthivel K case OPC_OUB_DEV_HANDLE_ARRIV: 3864f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3865f5860992SSakthivel K pm8001_printk("OPC_OUB_DEV_HANDLE_ARRIV\n")); 3866f5860992SSakthivel K /*This is for target*/ 3867f5860992SSakthivel K break; 3868f5860992SSakthivel K case OPC_OUB_SSP_RECV_EVENT: 3869f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3870f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_RECV_EVENT\n")); 3871f5860992SSakthivel K /*This is for target*/ 3872f5860992SSakthivel K break; 3873f5860992SSakthivel K case OPC_OUB_FW_FLASH_UPDATE: 3874f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3875f5860992SSakthivel K pm8001_printk("OPC_OUB_FW_FLASH_UPDATE\n")); 3876f5860992SSakthivel K pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb); 3877f5860992SSakthivel K break; 3878f5860992SSakthivel K case OPC_OUB_GPIO_RESPONSE: 3879f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3880f5860992SSakthivel K pm8001_printk("OPC_OUB_GPIO_RESPONSE\n")); 3881f5860992SSakthivel K break; 3882f5860992SSakthivel K case OPC_OUB_GPIO_EVENT: 3883f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3884f5860992SSakthivel K pm8001_printk("OPC_OUB_GPIO_EVENT\n")); 3885f5860992SSakthivel K break; 3886f5860992SSakthivel K case OPC_OUB_GENERAL_EVENT: 3887f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3888f5860992SSakthivel K pm8001_printk("OPC_OUB_GENERAL_EVENT\n")); 3889f5860992SSakthivel K pm8001_mpi_general_event(pm8001_ha, piomb); 3890f5860992SSakthivel K break; 3891f5860992SSakthivel K case OPC_OUB_SSP_ABORT_RSP: 3892f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3893f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_ABORT_RSP\n")); 3894f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3895f5860992SSakthivel K break; 3896f5860992SSakthivel K case OPC_OUB_SATA_ABORT_RSP: 3897f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3898f5860992SSakthivel K pm8001_printk("OPC_OUB_SATA_ABORT_RSP\n")); 3899f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3900f5860992SSakthivel K break; 3901f5860992SSakthivel K case OPC_OUB_SAS_DIAG_MODE_START_END: 3902f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3903f5860992SSakthivel K pm8001_printk("OPC_OUB_SAS_DIAG_MODE_START_END\n")); 3904f5860992SSakthivel K break; 3905f5860992SSakthivel K case OPC_OUB_SAS_DIAG_EXECUTE: 3906f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3907f5860992SSakthivel K pm8001_printk("OPC_OUB_SAS_DIAG_EXECUTE\n")); 3908f5860992SSakthivel K break; 3909f5860992SSakthivel K case OPC_OUB_GET_TIME_STAMP: 3910f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3911f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_TIME_STAMP\n")); 3912f5860992SSakthivel K break; 3913f5860992SSakthivel K case OPC_OUB_SAS_HW_EVENT_ACK: 3914f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3915f5860992SSakthivel K pm8001_printk("OPC_OUB_SAS_HW_EVENT_ACK\n")); 3916f5860992SSakthivel K break; 3917f5860992SSakthivel K case OPC_OUB_PORT_CONTROL: 3918f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3919f5860992SSakthivel K pm8001_printk("OPC_OUB_PORT_CONTROL\n")); 3920f5860992SSakthivel K break; 3921f5860992SSakthivel K case OPC_OUB_SMP_ABORT_RSP: 3922f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3923f5860992SSakthivel K pm8001_printk("OPC_OUB_SMP_ABORT_RSP\n")); 3924f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3925f5860992SSakthivel K break; 3926f5860992SSakthivel K case OPC_OUB_GET_NVMD_DATA: 3927f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3928f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_NVMD_DATA\n")); 3929f5860992SSakthivel K pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb); 3930f5860992SSakthivel K break; 3931f5860992SSakthivel K case OPC_OUB_SET_NVMD_DATA: 3932f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3933f5860992SSakthivel K pm8001_printk("OPC_OUB_SET_NVMD_DATA\n")); 3934f5860992SSakthivel K pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb); 3935f5860992SSakthivel K break; 3936f5860992SSakthivel K case OPC_OUB_DEVICE_HANDLE_REMOVAL: 3937f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3938f5860992SSakthivel K pm8001_printk("OPC_OUB_DEVICE_HANDLE_REMOVAL\n")); 3939f5860992SSakthivel K break; 3940f5860992SSakthivel K case OPC_OUB_SET_DEVICE_STATE: 3941f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3942f5860992SSakthivel K pm8001_printk("OPC_OUB_SET_DEVICE_STATE\n")); 3943f5860992SSakthivel K pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb); 3944f5860992SSakthivel K break; 3945f5860992SSakthivel K case OPC_OUB_GET_DEVICE_STATE: 3946f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3947f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_DEVICE_STATE\n")); 3948f5860992SSakthivel K break; 3949f5860992SSakthivel K case OPC_OUB_SET_DEV_INFO: 3950f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3951f5860992SSakthivel K pm8001_printk("OPC_OUB_SET_DEV_INFO\n")); 3952f5860992SSakthivel K break; 3953f5860992SSakthivel K /* spcv specifc commands */ 3954f5860992SSakthivel K case OPC_OUB_PHY_START_RESP: 3955f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3956f5860992SSakthivel K "OPC_OUB_PHY_START_RESP opcode:%x\n", opc)); 3957f5860992SSakthivel K mpi_phy_start_resp(pm8001_ha, piomb); 3958f5860992SSakthivel K break; 3959f5860992SSakthivel K case OPC_OUB_PHY_STOP_RESP: 3960f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3961f5860992SSakthivel K "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc)); 3962f5860992SSakthivel K mpi_phy_stop_resp(pm8001_ha, piomb); 3963f5860992SSakthivel K break; 3964f5860992SSakthivel K case OPC_OUB_SET_CONTROLLER_CONFIG: 3965f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3966f5860992SSakthivel K "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc)); 3967f5860992SSakthivel K mpi_set_controller_config_resp(pm8001_ha, piomb); 3968f5860992SSakthivel K break; 3969f5860992SSakthivel K case OPC_OUB_GET_CONTROLLER_CONFIG: 3970f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3971f5860992SSakthivel K "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc)); 3972f5860992SSakthivel K mpi_get_controller_config_resp(pm8001_ha, piomb); 3973f5860992SSakthivel K break; 3974f5860992SSakthivel K case OPC_OUB_GET_PHY_PROFILE: 3975f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3976f5860992SSakthivel K "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc)); 3977f5860992SSakthivel K mpi_get_phy_profile_resp(pm8001_ha, piomb); 3978f5860992SSakthivel K break; 3979f5860992SSakthivel K case OPC_OUB_FLASH_OP_EXT: 3980f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3981f5860992SSakthivel K "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc)); 3982f5860992SSakthivel K mpi_flash_op_ext_resp(pm8001_ha, piomb); 3983f5860992SSakthivel K break; 3984f5860992SSakthivel K case OPC_OUB_SET_PHY_PROFILE: 3985f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3986f5860992SSakthivel K "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc)); 3987f5860992SSakthivel K mpi_set_phy_profile_resp(pm8001_ha, piomb); 3988f5860992SSakthivel K break; 3989f5860992SSakthivel K case OPC_OUB_KEK_MANAGEMENT_RESP: 3990f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3991f5860992SSakthivel K "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc)); 3992f5860992SSakthivel K mpi_kek_management_resp(pm8001_ha, piomb); 3993f5860992SSakthivel K break; 3994f5860992SSakthivel K case OPC_OUB_DEK_MANAGEMENT_RESP: 3995f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3996f5860992SSakthivel K "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc)); 3997f5860992SSakthivel K mpi_dek_management_resp(pm8001_ha, piomb); 3998f5860992SSakthivel K break; 3999f5860992SSakthivel K case OPC_OUB_SSP_COALESCED_COMP_RESP: 4000f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 4001f5860992SSakthivel K "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc)); 4002f5860992SSakthivel K ssp_coalesced_comp_resp(pm8001_ha, piomb); 4003f5860992SSakthivel K break; 4004f5860992SSakthivel K default: 40057370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk( 4006f5860992SSakthivel K "Unknown outbound Queue IOMB OPC = 0x%x\n", opc)); 4007f5860992SSakthivel K break; 4008f5860992SSakthivel K } 4009f5860992SSakthivel K } 4010f5860992SSakthivel K 401172349b62SDeepak Ukey static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha) 401272349b62SDeepak Ukey { 401372349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 401472349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_0: 0x%x\n", 401572349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0))); 401672349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 401772349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_1:0x%x\n", 401872349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1))); 401972349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 402072349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_2: 0x%x\n", 402172349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2))); 402272349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 402372349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_3: 0x%x\n", 402472349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3))); 402572349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 402672349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_0: 0x%x\n", 402772349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0))); 402872349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 402972349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_1: 0x%x\n", 403072349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1))); 403172349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 403272349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_2: 0x%x\n", 403372349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2))); 403472349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 403572349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_3: 0x%x\n", 403672349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3))); 403772349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 403872349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_4: 0x%x\n", 403972349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4))); 404072349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 404172349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_5: 0x%x\n", 404272349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5))); 404372349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 404472349b62SDeepak Ukey pm8001_printk("MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n", 404572349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6))); 404672349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 404772349b62SDeepak Ukey pm8001_printk("MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n", 404872349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7))); 404972349b62SDeepak Ukey } 405072349b62SDeepak Ukey 4051f5860992SSakthivel K static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) 4052f5860992SSakthivel K { 4053f5860992SSakthivel K struct outbound_queue_table *circularQ; 4054f5860992SSakthivel K void *pMsg1 = NULL; 4055f5860992SSakthivel K u8 uninitialized_var(bc); 4056f5860992SSakthivel K u32 ret = MPI_IO_STATUS_FAIL; 4057f5860992SSakthivel K unsigned long flags; 405872349b62SDeepak Ukey u32 regval; 4059f5860992SSakthivel K 406072349b62SDeepak Ukey if (vec == (pm8001_ha->number_of_intr - 1)) { 406172349b62SDeepak Ukey regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 406272349b62SDeepak Ukey if ((regval & SCRATCH_PAD_MIPSALL_READY) != 406372349b62SDeepak Ukey SCRATCH_PAD_MIPSALL_READY) { 406472349b62SDeepak Ukey pm8001_ha->controller_fatal_error = true; 406572349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 406672349b62SDeepak Ukey "Firmware Fatal error! Regval:0x%x\n", regval)); 406772349b62SDeepak Ukey print_scratchpad_registers(pm8001_ha); 406872349b62SDeepak Ukey return ret; 406972349b62SDeepak Ukey } 407072349b62SDeepak Ukey } 4071f5860992SSakthivel K spin_lock_irqsave(&pm8001_ha->lock, flags); 4072f5860992SSakthivel K circularQ = &pm8001_ha->outbnd_q_tbl[vec]; 4073f5860992SSakthivel K do { 407472349b62SDeepak Ukey /* spurious interrupt during setup if kexec-ing and 407572349b62SDeepak Ukey * driver doing a doorbell access w/ the pre-kexec oq 407672349b62SDeepak Ukey * interrupt setup. 407772349b62SDeepak Ukey */ 407872349b62SDeepak Ukey if (!circularQ->pi_virt) 407972349b62SDeepak Ukey break; 4080f5860992SSakthivel K ret = pm8001_mpi_msg_consume(pm8001_ha, circularQ, &pMsg1, &bc); 4081f5860992SSakthivel K if (MPI_IO_STATUS_SUCCESS == ret) { 4082f5860992SSakthivel K /* process the outbound message */ 4083f5860992SSakthivel K process_one_iomb(pm8001_ha, (void *)(pMsg1 - 4)); 4084f5860992SSakthivel K /* free the message from the outbound circular buffer */ 4085f5860992SSakthivel K pm8001_mpi_msg_free_set(pm8001_ha, pMsg1, 4086f5860992SSakthivel K circularQ, bc); 4087f5860992SSakthivel K } 4088f5860992SSakthivel K if (MPI_IO_STATUS_BUSY == ret) { 4089f5860992SSakthivel K /* Update the producer index from SPC */ 4090f5860992SSakthivel K circularQ->producer_index = 4091f5860992SSakthivel K cpu_to_le32(pm8001_read_32(circularQ->pi_virt)); 4092f5860992SSakthivel K if (le32_to_cpu(circularQ->producer_index) == 4093f5860992SSakthivel K circularQ->consumer_idx) 4094f5860992SSakthivel K /* OQ is empty */ 4095f5860992SSakthivel K break; 4096f5860992SSakthivel K } 4097f5860992SSakthivel K } while (1); 4098f5860992SSakthivel K spin_unlock_irqrestore(&pm8001_ha->lock, flags); 4099f5860992SSakthivel K return ret; 4100f5860992SSakthivel K } 4101f5860992SSakthivel K 4102f73bdebdSChristoph Hellwig /* DMA_... to our direction translation. */ 4103f5860992SSakthivel K static const u8 data_dir_flags[] = { 4104f73bdebdSChristoph Hellwig [DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT, /* UNSPECIFIED */ 4105f73bdebdSChristoph Hellwig [DMA_TO_DEVICE] = DATA_DIR_OUT, /* OUTBOUND */ 4106f73bdebdSChristoph Hellwig [DMA_FROM_DEVICE] = DATA_DIR_IN, /* INBOUND */ 4107f73bdebdSChristoph Hellwig [DMA_NONE] = DATA_DIR_NONE, /* NO TRANSFER */ 4108f5860992SSakthivel K }; 4109f5860992SSakthivel K 4110f5860992SSakthivel K static void build_smp_cmd(u32 deviceID, __le32 hTag, 4111f5860992SSakthivel K struct smp_req *psmp_cmd, int mode, int length) 4112f5860992SSakthivel K { 4113f5860992SSakthivel K psmp_cmd->tag = hTag; 4114f5860992SSakthivel K psmp_cmd->device_id = cpu_to_le32(deviceID); 4115f5860992SSakthivel K if (mode == SMP_DIRECT) { 4116f5860992SSakthivel K length = length - 4; /* subtract crc */ 4117f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(length << 16); 4118f5860992SSakthivel K } else { 4119f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(1|(1 << 1)); 4120f5860992SSakthivel K } 4121f5860992SSakthivel K } 4122f5860992SSakthivel K 4123f5860992SSakthivel K /** 4124f5860992SSakthivel K * pm8001_chip_smp_req - send a SMP task to FW 4125f5860992SSakthivel K * @pm8001_ha: our hba card information. 4126f5860992SSakthivel K * @ccb: the ccb information this request used. 4127f5860992SSakthivel K */ 4128f5860992SSakthivel K static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, 4129f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4130f5860992SSakthivel K { 4131f5860992SSakthivel K int elem, rc; 4132f5860992SSakthivel K struct sas_task *task = ccb->task; 4133f5860992SSakthivel K struct domain_device *dev = task->dev; 4134f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4135f5860992SSakthivel K struct scatterlist *sg_req, *sg_resp; 4136f5860992SSakthivel K u32 req_len, resp_len; 4137f5860992SSakthivel K struct smp_req smp_cmd; 4138f5860992SSakthivel K u32 opc; 4139f5860992SSakthivel K struct inbound_queue_table *circularQ; 4140f5860992SSakthivel K char *preq_dma_addr = NULL; 4141f5860992SSakthivel K __le64 tmp_addr; 4142f5860992SSakthivel K u32 i, length; 4143f5860992SSakthivel K 4144f5860992SSakthivel K memset(&smp_cmd, 0, sizeof(smp_cmd)); 4145f5860992SSakthivel K /* 4146f5860992SSakthivel K * DMA-map SMP request, response buffers 4147f5860992SSakthivel K */ 4148f5860992SSakthivel K sg_req = &task->smp_task.smp_req; 4149f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE); 4150f5860992SSakthivel K if (!elem) 4151f5860992SSakthivel K return -ENOMEM; 4152f5860992SSakthivel K req_len = sg_dma_len(sg_req); 4153f5860992SSakthivel K 4154f5860992SSakthivel K sg_resp = &task->smp_task.smp_resp; 4155f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE); 4156f5860992SSakthivel K if (!elem) { 4157f5860992SSakthivel K rc = -ENOMEM; 4158f5860992SSakthivel K goto err_out; 4159f5860992SSakthivel K } 4160f5860992SSakthivel K resp_len = sg_dma_len(sg_resp); 4161f5860992SSakthivel K /* must be in dwords */ 4162f5860992SSakthivel K if ((req_len & 0x3) || (resp_len & 0x3)) { 4163f5860992SSakthivel K rc = -EINVAL; 4164f5860992SSakthivel K goto err_out_2; 4165f5860992SSakthivel K } 4166f5860992SSakthivel K 4167f5860992SSakthivel K opc = OPC_INB_SMP_REQUEST; 4168f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4169f5860992SSakthivel K smp_cmd.tag = cpu_to_le32(ccb->ccb_tag); 4170f5860992SSakthivel K 4171f5860992SSakthivel K length = sg_req->length; 4172f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 4173f5860992SSakthivel K pm8001_printk("SMP Frame Length %d\n", sg_req->length)); 4174f5860992SSakthivel K if (!(length - 8)) 4175f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_DIRECT; 4176f5860992SSakthivel K else 4177f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_INDIRECT; 4178f5860992SSakthivel K 4179f5860992SSakthivel K 4180f5860992SSakthivel K tmp_addr = cpu_to_le64((u64)sg_dma_address(&task->smp_task.smp_req)); 4181f5860992SSakthivel K preq_dma_addr = (char *)phys_to_virt(tmp_addr); 4182f5860992SSakthivel K 4183f5860992SSakthivel K /* INDIRECT MODE command settings. Use DMA */ 4184f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) { 4185f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 4186f5860992SSakthivel K pm8001_printk("SMP REQUEST INDIRECT MODE\n")); 4187f5860992SSakthivel K /* for SPCv indirect mode. Place the top 4 bytes of 4188f5860992SSakthivel K * SMP Request header here. */ 4189f5860992SSakthivel K for (i = 0; i < 4; i++) 4190f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr + i); 4191f5860992SSakthivel K /* exclude top 4 bytes for SMP req header */ 4192f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4193f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4194cb993e5dSAnand Kumar Santhanam (&task->smp_task.smp_req) + 4); 4195f5860992SSakthivel K /* exclude 4 bytes for SMP req header and CRC */ 4196f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4197f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-8); 4198f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4199f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4200f5860992SSakthivel K (&task->smp_task.smp_resp)); 4201f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4202f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len 4203f5860992SSakthivel K (&task->smp_task.smp_resp)-4); 4204f5860992SSakthivel K } else { /* DIRECT MODE */ 4205f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4206f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4207f5860992SSakthivel K (&task->smp_task.smp_req)); 4208f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4209f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-4); 4210f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4211f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4212f5860992SSakthivel K (&task->smp_task.smp_resp)); 4213f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4214f5860992SSakthivel K cpu_to_le32 4215f5860992SSakthivel K ((u32)sg_dma_len(&task->smp_task.smp_resp)-4); 4216f5860992SSakthivel K } 4217f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 4218f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 4219f5860992SSakthivel K pm8001_printk("SMP REQUEST DIRECT MODE\n")); 4220f5860992SSakthivel K for (i = 0; i < length; i++) 4221f5860992SSakthivel K if (i < 16) { 4222f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr+i); 4223f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4224f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4225f5860992SSakthivel K i, smp_cmd.smp_req16[i], 4226f5860992SSakthivel K *(preq_dma_addr))); 4227f5860992SSakthivel K } else { 4228f5860992SSakthivel K smp_cmd.smp_req[i] = *(preq_dma_addr+i); 4229f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4230f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4231f5860992SSakthivel K i, smp_cmd.smp_req[i], 4232f5860992SSakthivel K *(preq_dma_addr))); 4233f5860992SSakthivel K } 4234f5860992SSakthivel K } 4235f5860992SSakthivel K 4236f5860992SSakthivel K build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag, 4237f5860992SSakthivel K &smp_cmd, pm8001_ha->smp_exp_mode, length); 423891a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd, 423991a43fa6Speter chang sizeof(smp_cmd), 0); 42405533abcaSTomas Henzl if (rc) 42415533abcaSTomas Henzl goto err_out_2; 4242f5860992SSakthivel K return 0; 4243f5860992SSakthivel K 4244f5860992SSakthivel K err_out_2: 4245f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1, 4246f73bdebdSChristoph Hellwig DMA_FROM_DEVICE); 4247f5860992SSakthivel K err_out: 4248f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1, 4249f73bdebdSChristoph Hellwig DMA_TO_DEVICE); 4250f5860992SSakthivel K return rc; 4251f5860992SSakthivel K } 4252f5860992SSakthivel K 4253f5860992SSakthivel K static int check_enc_sas_cmd(struct sas_task *task) 4254f5860992SSakthivel K { 4255e73823f7SJames Bottomley u8 cmd = task->ssp_task.cmd->cmnd[0]; 4256e73823f7SJames Bottomley 4257e73823f7SJames Bottomley if (cmd == READ_10 || cmd == WRITE_10 || cmd == WRITE_VERIFY) 4258f5860992SSakthivel K return 1; 4259f5860992SSakthivel K else 4260f5860992SSakthivel K return 0; 4261f5860992SSakthivel K } 4262f5860992SSakthivel K 4263f5860992SSakthivel K static int check_enc_sat_cmd(struct sas_task *task) 4264f5860992SSakthivel K { 4265f5860992SSakthivel K int ret = 0; 4266f5860992SSakthivel K switch (task->ata_task.fis.command) { 4267f5860992SSakthivel K case ATA_CMD_FPDMA_READ: 4268f5860992SSakthivel K case ATA_CMD_READ_EXT: 4269f5860992SSakthivel K case ATA_CMD_READ: 4270f5860992SSakthivel K case ATA_CMD_FPDMA_WRITE: 4271f5860992SSakthivel K case ATA_CMD_WRITE_EXT: 4272f5860992SSakthivel K case ATA_CMD_WRITE: 4273f5860992SSakthivel K case ATA_CMD_PIO_READ: 4274f5860992SSakthivel K case ATA_CMD_PIO_READ_EXT: 4275f5860992SSakthivel K case ATA_CMD_PIO_WRITE: 4276f5860992SSakthivel K case ATA_CMD_PIO_WRITE_EXT: 4277f5860992SSakthivel K ret = 1; 4278f5860992SSakthivel K break; 4279f5860992SSakthivel K default: 4280f5860992SSakthivel K ret = 0; 4281f5860992SSakthivel K break; 4282f5860992SSakthivel K } 4283f5860992SSakthivel K return ret; 4284f5860992SSakthivel K } 4285f5860992SSakthivel K 4286f5860992SSakthivel K /** 4287f5860992SSakthivel K * pm80xx_chip_ssp_io_req - send a SSP task to FW 4288f5860992SSakthivel K * @pm8001_ha: our hba card information. 4289f5860992SSakthivel K * @ccb: the ccb information this request used. 4290f5860992SSakthivel K */ 4291f5860992SSakthivel K static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, 4292f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4293f5860992SSakthivel K { 4294f5860992SSakthivel K struct sas_task *task = ccb->task; 4295f5860992SSakthivel K struct domain_device *dev = task->dev; 4296f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4297f5860992SSakthivel K struct ssp_ini_io_start_req ssp_cmd; 4298f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4299f5860992SSakthivel K int ret; 43000ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 43010ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4302f5860992SSakthivel K struct inbound_queue_table *circularQ; 4303f9cd6cbdSAnand Kumar Santhanam u32 q_index; 4304f5860992SSakthivel K u32 opc = OPC_INB_SSPINIIOSTART; 4305f5860992SSakthivel K memset(&ssp_cmd, 0, sizeof(ssp_cmd)); 4306f5860992SSakthivel K memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); 4307f5860992SSakthivel K /* data address domain added for spcv; set to 0 by host, 4308f5860992SSakthivel K * used internally by controller 4309f5860992SSakthivel K * 0 for SAS 1.1 and SAS 2.0 compatible TLR 4310f5860992SSakthivel K */ 4311f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = 4312f5860992SSakthivel K cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0); 4313f5860992SSakthivel K ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4314f5860992SSakthivel K ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); 4315f5860992SSakthivel K ssp_cmd.tag = cpu_to_le32(tag); 4316f5860992SSakthivel K if (task->ssp_task.enable_first_burst) 4317f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= 0x80; 4318f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_prio << 3); 4319f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_attr & 7); 4320e73823f7SJames Bottomley memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd, 4321e73823f7SJames Bottomley task->ssp_task.cmd->cmd_len); 4322f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM; 4323f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4324f5860992SSakthivel K 4325f5860992SSakthivel K /* Check if encryption is set */ 4326f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4327f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) { 4328f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4329f5860992SSakthivel K "Encryption enabled.Sending Encrypt SAS command 0x%x\n", 4330e73823f7SJames Bottomley task->ssp_task.cmd->cmnd[0])); 4331f5860992SSakthivel K opc = OPC_INB_SSP_INI_DIF_ENC_IO; 4332f5860992SSakthivel K /* enable encryption. 0 for SAS 1.1 and SAS 2.0 compatible TLR*/ 4333f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = cpu_to_le32 4334f5860992SSakthivel K ((data_dir_flags[task->data_dir] << 8) | 0x20 | 0x0); 4335f5860992SSakthivel K 4336f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4337f5860992SSakthivel K if (task->num_scatter > 1) { 4338f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4339f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 4340f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4341f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4342f5860992SSakthivel K ssp_cmd.enc_addr_low = 4343f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4344f5860992SSakthivel K ssp_cmd.enc_addr_high = 4345f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4346f5860992SSakthivel K ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 4347f5860992SSakthivel K } else if (task->num_scatter == 1) { 4348f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4349f5860992SSakthivel K ssp_cmd.enc_addr_low = 4350f5860992SSakthivel K cpu_to_le32(lower_32_bits(dma_addr)); 4351f5860992SSakthivel K ssp_cmd.enc_addr_high = 4352f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4353f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4354f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 43550ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 43560ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 43570ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.enc_len) - 1; 43580ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 43590ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 43600ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.enc_addr_high) { 43610ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 43620ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 43630ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x " 43640ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low=" 43650ecdf00bSAnand Kumar Santhanam "0x%08x has crossed 4G boundary\n", 43660ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.enc_len, 43670ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 43680ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 43690ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 43700ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 43710ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 43720ecdf00bSAnand Kumar Santhanam buf_prd[0]); 43730ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_low = 43740ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 43750ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_high = 43760ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 43770ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 43780ecdf00bSAnand Kumar Santhanam } 4379f5860992SSakthivel K } else if (task->num_scatter == 0) { 4380f5860992SSakthivel K ssp_cmd.enc_addr_low = 0; 4381f5860992SSakthivel K ssp_cmd.enc_addr_high = 0; 4382f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4383f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 4384f5860992SSakthivel K } 4385f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4386f5860992SSakthivel K ssp_cmd.key_cmode = 0x6 << 4; 4387f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4388e73823f7SJames Bottomley ssp_cmd.twk_val0 = cpu_to_le32((task->ssp_task.cmd->cmnd[2] << 24) | 4389e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[3] << 16) | 4390e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[4] << 8) | 4391e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[5])); 4392f5860992SSakthivel K } else { 4393f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4394f5860992SSakthivel K "Sending Normal SAS command 0x%x inb q %x\n", 4395f9cd6cbdSAnand Kumar Santhanam task->ssp_task.cmd->cmnd[0], q_index)); 4396f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4397f5860992SSakthivel K if (task->num_scatter > 1) { 4398f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, ccb->n_elem, 4399f5860992SSakthivel K ccb->buf_prd); 4400f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4401f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4402f5860992SSakthivel K ssp_cmd.addr_low = 4403f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4404f5860992SSakthivel K ssp_cmd.addr_high = 4405f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4406f5860992SSakthivel K ssp_cmd.esgl = cpu_to_le32(1<<31); 4407f5860992SSakthivel K } else if (task->num_scatter == 1) { 4408f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4409f5860992SSakthivel K ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(dma_addr)); 4410f5860992SSakthivel K ssp_cmd.addr_high = 4411f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4412f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4413f5860992SSakthivel K ssp_cmd.esgl = 0; 44140ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 44150ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 44160ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.len) - 1; 44170ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 44180ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 44190ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.addr_high) { 44200ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 44210ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 44220ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x " 44230ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low=" 44240ecdf00bSAnand Kumar Santhanam "0x%08x has crossed 4G boundary\n", 44250ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.len, 44260ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 44270ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 44280ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 44290ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 44300ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 44310ecdf00bSAnand Kumar Santhanam buf_prd[0]); 44320ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_low = 44330ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 44340ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_high = 44350ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 44360ecdf00bSAnand Kumar Santhanam ssp_cmd.esgl = cpu_to_le32(1<<31); 44370ecdf00bSAnand Kumar Santhanam } 4438f5860992SSakthivel K } else if (task->num_scatter == 0) { 4439f5860992SSakthivel K ssp_cmd.addr_low = 0; 4440f5860992SSakthivel K ssp_cmd.addr_high = 0; 4441f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4442f5860992SSakthivel K ssp_cmd.esgl = 0; 4443f5860992SSakthivel K } 4444f5860992SSakthivel K } 4445f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM; 4446f9cd6cbdSAnand Kumar Santhanam ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 444791a43fa6Speter chang &ssp_cmd, sizeof(ssp_cmd), q_index); 4448f5860992SSakthivel K return ret; 4449f5860992SSakthivel K } 4450f5860992SSakthivel K 4451f5860992SSakthivel K static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, 4452f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4453f5860992SSakthivel K { 4454f5860992SSakthivel K struct sas_task *task = ccb->task; 4455f5860992SSakthivel K struct domain_device *dev = task->dev; 4456f5860992SSakthivel K struct pm8001_device *pm8001_ha_dev = dev->lldd_dev; 4457f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4458f5860992SSakthivel K int ret; 4459f9cd6cbdSAnand Kumar Santhanam u32 q_index; 4460f5860992SSakthivel K struct sata_start_req sata_cmd; 4461f5860992SSakthivel K u32 hdr_tag, ncg_tag = 0; 44620ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 44630ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4464f5860992SSakthivel K u32 ATAP = 0x0; 4465f5860992SSakthivel K u32 dir; 4466f5860992SSakthivel K struct inbound_queue_table *circularQ; 4467c6b9ef57SSakthivel K unsigned long flags; 4468f5860992SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 4469f5860992SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 4470f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM; 4471f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4472f5860992SSakthivel K 4473f73bdebdSChristoph Hellwig if (task->data_dir == DMA_NONE) { 4474f5860992SSakthivel K ATAP = 0x04; /* no data*/ 4475f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("no data\n")); 4476f5860992SSakthivel K } else if (likely(!task->ata_task.device_control_reg_update)) { 4477f5860992SSakthivel K if (task->ata_task.dma_xfer) { 4478f5860992SSakthivel K ATAP = 0x06; /* DMA */ 4479f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("DMA\n")); 4480f5860992SSakthivel K } else { 4481f5860992SSakthivel K ATAP = 0x05; /* PIO*/ 4482f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("PIO\n")); 4483f5860992SSakthivel K } 4484f5860992SSakthivel K if (task->ata_task.use_ncq && 44851cbd772dSHannes Reinecke dev->sata_dev.class != ATA_DEV_ATAPI) { 4486f5860992SSakthivel K ATAP = 0x07; /* FPDMA */ 4487f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("FPDMA\n")); 4488f5860992SSakthivel K } 4489f5860992SSakthivel K } 4490c6b9ef57SSakthivel K if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) { 4491c6b9ef57SSakthivel K task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 4492f5860992SSakthivel K ncg_tag = hdr_tag; 4493c6b9ef57SSakthivel K } 4494f5860992SSakthivel K dir = data_dir_flags[task->data_dir] << 8; 4495f5860992SSakthivel K sata_cmd.tag = cpu_to_le32(tag); 4496f5860992SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 4497f5860992SSakthivel K sata_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4498f5860992SSakthivel K 4499f5860992SSakthivel K sata_cmd.sata_fis = task->ata_task.fis; 4500f5860992SSakthivel K if (likely(!task->ata_task.device_control_reg_update)) 4501f5860992SSakthivel K sata_cmd.sata_fis.flags |= 0x80;/* C=1: update ATA cmd reg */ 4502f5860992SSakthivel K sata_cmd.sata_fis.flags &= 0xF0;/* PM_PORT field shall be 0 */ 4503f5860992SSakthivel K 4504f5860992SSakthivel K /* Check if encryption is set */ 4505f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4506f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) { 4507f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4508f5860992SSakthivel K "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n", 4509f5860992SSakthivel K sata_cmd.sata_fis.command)); 4510f5860992SSakthivel K opc = OPC_INB_SATA_DIF_ENC_IO; 4511f5860992SSakthivel K 4512f5860992SSakthivel K /* set encryption bit */ 4513f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4514f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16)| 4515f5860992SSakthivel K ((ATAP & 0x3f) << 10) | 0x20 | dir); 4516f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4517f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4518f5860992SSakthivel K if (task->num_scatter > 1) { 4519f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4520f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 4521f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4522f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4523f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(phys_addr); 4524f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(phys_addr); 4525f5860992SSakthivel K sata_cmd.enc_esgl = cpu_to_le32(1 << 31); 4526f5860992SSakthivel K } else if (task->num_scatter == 1) { 4527f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4528f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(dma_addr); 4529f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(dma_addr); 4530f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4531f5860992SSakthivel K sata_cmd.enc_esgl = 0; 45320ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 45330ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 45340ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.enc_len) - 1; 45350ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 45360ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 45370ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.enc_addr_high) { 45380ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 45390ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 45400ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x " 45410ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low" 45420ecdf00bSAnand Kumar Santhanam "=0x%08x has crossed 4G boundary\n", 45430ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.enc_len, 45440ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 45450ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 45460ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 45470ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 45480ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 45490ecdf00bSAnand Kumar Santhanam buf_prd[0]); 45500ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_low = 45510ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 45520ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_high = 45530ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 45540ecdf00bSAnand Kumar Santhanam sata_cmd.enc_esgl = 45550ecdf00bSAnand Kumar Santhanam cpu_to_le32(1 << 31); 45560ecdf00bSAnand Kumar Santhanam } 4557f5860992SSakthivel K } else if (task->num_scatter == 0) { 4558f5860992SSakthivel K sata_cmd.enc_addr_low = 0; 4559f5860992SSakthivel K sata_cmd.enc_addr_high = 0; 4560f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4561f5860992SSakthivel K sata_cmd.enc_esgl = 0; 4562f5860992SSakthivel K } 4563f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4564f5860992SSakthivel K sata_cmd.key_index_mode = 0x6 << 4; 4565f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4566f5860992SSakthivel K sata_cmd.twk_val0 = 4567f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbal_exp << 24) | 4568f5860992SSakthivel K (sata_cmd.sata_fis.lbah << 16) | 4569f5860992SSakthivel K (sata_cmd.sata_fis.lbam << 8) | 4570f5860992SSakthivel K (sata_cmd.sata_fis.lbal)); 4571f5860992SSakthivel K sata_cmd.twk_val1 = 4572f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbah_exp << 8) | 4573f5860992SSakthivel K (sata_cmd.sata_fis.lbam_exp)); 4574f5860992SSakthivel K } else { 4575f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4576f5860992SSakthivel K "Sending Normal SATA command 0x%x inb %x\n", 4577f9cd6cbdSAnand Kumar Santhanam sata_cmd.sata_fis.command, q_index)); 4578f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4579f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4580f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16) | 4581f5860992SSakthivel K ((ATAP & 0x3f) << 10) | dir); 4582f5860992SSakthivel K 4583f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4584f5860992SSakthivel K if (task->num_scatter > 1) { 4585f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4586f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 4587f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4588f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4589f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(phys_addr); 4590f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(phys_addr); 4591f5860992SSakthivel K sata_cmd.esgl = cpu_to_le32(1 << 31); 4592f5860992SSakthivel K } else if (task->num_scatter == 1) { 4593f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4594f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(dma_addr); 4595f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(dma_addr); 4596f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4597f5860992SSakthivel K sata_cmd.esgl = 0; 45980ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 45990ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 46000ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.len) - 1; 46010ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 46020ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 46030ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.addr_high) { 46040ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 46050ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 46060ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x" 46070ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low=" 46080ecdf00bSAnand Kumar Santhanam "0x%08x has crossed 4G boundary\n", 46090ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.len, 46100ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 46110ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 46120ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 46130ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 46140ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 46150ecdf00bSAnand Kumar Santhanam buf_prd[0]); 46160ecdf00bSAnand Kumar Santhanam sata_cmd.addr_low = 46170ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 46180ecdf00bSAnand Kumar Santhanam sata_cmd.addr_high = 46190ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 46200ecdf00bSAnand Kumar Santhanam sata_cmd.esgl = cpu_to_le32(1 << 31); 46210ecdf00bSAnand Kumar Santhanam } 4622f5860992SSakthivel K } else if (task->num_scatter == 0) { 4623f5860992SSakthivel K sata_cmd.addr_low = 0; 4624f5860992SSakthivel K sata_cmd.addr_high = 0; 4625f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4626f5860992SSakthivel K sata_cmd.esgl = 0; 4627f5860992SSakthivel K } 4628f5860992SSakthivel K /* scsi cdb */ 4629f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[0] = 4630f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[0]) | 4631f5860992SSakthivel K (task->ata_task.atapi_packet[1] << 8) | 4632f5860992SSakthivel K (task->ata_task.atapi_packet[2] << 16) | 4633f5860992SSakthivel K (task->ata_task.atapi_packet[3] << 24))); 4634f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[1] = 4635f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[4]) | 4636f5860992SSakthivel K (task->ata_task.atapi_packet[5] << 8) | 4637f5860992SSakthivel K (task->ata_task.atapi_packet[6] << 16) | 4638f5860992SSakthivel K (task->ata_task.atapi_packet[7] << 24))); 4639f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[2] = 4640f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[8]) | 4641f5860992SSakthivel K (task->ata_task.atapi_packet[9] << 8) | 4642f5860992SSakthivel K (task->ata_task.atapi_packet[10] << 16) | 4643f5860992SSakthivel K (task->ata_task.atapi_packet[11] << 24))); 4644f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[3] = 4645f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[12]) | 4646f5860992SSakthivel K (task->ata_task.atapi_packet[13] << 8) | 4647f5860992SSakthivel K (task->ata_task.atapi_packet[14] << 16) | 4648f5860992SSakthivel K (task->ata_task.atapi_packet[15] << 24))); 4649f5860992SSakthivel K } 4650c6b9ef57SSakthivel K 4651c6b9ef57SSakthivel K /* Check for read log for failed drive and return */ 4652c6b9ef57SSakthivel K if (sata_cmd.sata_fis.command == 0x2f) { 4653c6b9ef57SSakthivel K if (pm8001_ha_dev && ((pm8001_ha_dev->id & NCQ_READ_LOG_FLAG) || 4654c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_ABORT_ALL_FLAG) || 4655c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_2ND_RLE_FLAG))) { 4656c6b9ef57SSakthivel K struct task_status_struct *ts; 4657c6b9ef57SSakthivel K 4658c6b9ef57SSakthivel K pm8001_ha_dev->id &= 0xDFFFFFFF; 4659c6b9ef57SSakthivel K ts = &task->task_status; 4660c6b9ef57SSakthivel K 4661c6b9ef57SSakthivel K spin_lock_irqsave(&task->task_state_lock, flags); 4662c6b9ef57SSakthivel K ts->resp = SAS_TASK_COMPLETE; 4663c6b9ef57SSakthivel K ts->stat = SAM_STAT_GOOD; 4664c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_STATE_PENDING; 4665c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 4666c6b9ef57SSakthivel K task->task_state_flags |= SAS_TASK_STATE_DONE; 4667c6b9ef57SSakthivel K if (unlikely((task->task_state_flags & 4668c6b9ef57SSakthivel K SAS_TASK_STATE_ABORTED))) { 4669c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4670c6b9ef57SSakthivel K flags); 4671c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 4672c6b9ef57SSakthivel K pm8001_printk("task 0x%p resp 0x%x " 4673c6b9ef57SSakthivel K " stat 0x%x but aborted by upper layer " 4674c6b9ef57SSakthivel K "\n", task, ts->resp, ts->stat)); 4675c6b9ef57SSakthivel K pm8001_ccb_task_free(pm8001_ha, task, ccb, tag); 4676c6b9ef57SSakthivel K return 0; 46772b01d816SSuresh Thiagarajan } else { 4678c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4679c6b9ef57SSakthivel K flags); 46802b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, task, 46812b01d816SSuresh Thiagarajan ccb, tag); 4682c6b9ef57SSakthivel K return 0; 4683c6b9ef57SSakthivel K } 4684c6b9ef57SSakthivel K } 4685c6b9ef57SSakthivel K } 4686f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM; 4687f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 468891a43fa6Speter chang &sata_cmd, sizeof(sata_cmd), q_index); 4689f5860992SSakthivel K return ret; 4690f5860992SSakthivel K } 4691f5860992SSakthivel K 4692f5860992SSakthivel K /** 4693f5860992SSakthivel K * pm80xx_chip_phy_start_req - start phy via PHY_START COMMAND 4694f5860992SSakthivel K * @pm8001_ha: our hba card information. 4695f5860992SSakthivel K * @num: the inbound queue number 4696f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4697f5860992SSakthivel K */ 4698f5860992SSakthivel K static int 4699f5860992SSakthivel K pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) 4700f5860992SSakthivel K { 4701f5860992SSakthivel K struct phy_start_req payload; 4702f5860992SSakthivel K struct inbound_queue_table *circularQ; 4703f5860992SSakthivel K int ret; 4704f5860992SSakthivel K u32 tag = 0x01; 4705f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTART; 4706f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4707f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4708f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4709f5860992SSakthivel K 4710f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 4711f5860992SSakthivel K pm8001_printk("PHY START REQ for phy_id %d\n", phy_id)); 4712a9a923e5SAnand Kumar Santhanam 47133e253d96Speter chang payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE | 47143e253d96Speter chang LINKMODE_AUTO | pm8001_ha->link_rate | phy_id); 4715f5860992SSakthivel K /* SSC Disable and SAS Analog ST configuration */ 4716f5860992SSakthivel K /** 4717f5860992SSakthivel K payload.ase_sh_lm_slr_phyid = 4718f5860992SSakthivel K cpu_to_le32(SSC_DISABLE_30 | SAS_ASE | SPINHOLD_DISABLE | 4719f5860992SSakthivel K LINKMODE_AUTO | LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | 4720f5860992SSakthivel K phy_id); 4721f5860992SSakthivel K Have to add "SAS PHY Analog Setup SPASTI 1 Byte" Based on need 4722f5860992SSakthivel K **/ 4723f5860992SSakthivel K 4724aa9f8328SJames Bottomley payload.sas_identify.dev_type = SAS_END_DEVICE; 4725f5860992SSakthivel K payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL; 4726f5860992SSakthivel K memcpy(payload.sas_identify.sas_addr, 47273e253d96Speter chang &pm8001_ha->sas_addr, SAS_ADDR_SIZE); 4728f5860992SSakthivel K payload.sas_identify.phy_id = phy_id; 472991a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 473091a43fa6Speter chang sizeof(payload), 0); 4731f5860992SSakthivel K return ret; 4732f5860992SSakthivel K } 4733f5860992SSakthivel K 4734f5860992SSakthivel K /** 4735f5860992SSakthivel K * pm8001_chip_phy_stop_req - start phy via PHY_STOP COMMAND 4736f5860992SSakthivel K * @pm8001_ha: our hba card information. 4737f5860992SSakthivel K * @num: the inbound queue number 4738f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4739f5860992SSakthivel K */ 4740f5860992SSakthivel K static int pm80xx_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha, 4741f5860992SSakthivel K u8 phy_id) 4742f5860992SSakthivel K { 4743f5860992SSakthivel K struct phy_stop_req payload; 4744f5860992SSakthivel K struct inbound_queue_table *circularQ; 4745f5860992SSakthivel K int ret; 4746f5860992SSakthivel K u32 tag = 0x01; 4747f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTOP; 4748f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4749f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4750f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4751f5860992SSakthivel K payload.phy_id = cpu_to_le32(phy_id); 475291a43fa6Speter chang ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 475391a43fa6Speter chang sizeof(payload), 0); 4754f5860992SSakthivel K return ret; 4755f5860992SSakthivel K } 4756f5860992SSakthivel K 4757f5860992SSakthivel K /** 4758f5860992SSakthivel K * see comments on pm8001_mpi_reg_resp. 4759f5860992SSakthivel K */ 4760f5860992SSakthivel K static int pm80xx_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha, 4761f5860992SSakthivel K struct pm8001_device *pm8001_dev, u32 flag) 4762f5860992SSakthivel K { 4763f5860992SSakthivel K struct reg_dev_req payload; 4764f5860992SSakthivel K u32 opc; 4765f5860992SSakthivel K u32 stp_sspsmp_sata = 0x4; 4766f5860992SSakthivel K struct inbound_queue_table *circularQ; 4767f5860992SSakthivel K u32 linkrate, phy_id; 4768f5860992SSakthivel K int rc, tag = 0xdeadbeef; 4769f5860992SSakthivel K struct pm8001_ccb_info *ccb; 4770f5860992SSakthivel K u8 retryFlag = 0x1; 4771f5860992SSakthivel K u16 firstBurstSize = 0; 4772f5860992SSakthivel K u16 ITNT = 2000; 4773f5860992SSakthivel K struct domain_device *dev = pm8001_dev->sas_device; 4774f5860992SSakthivel K struct domain_device *parent_dev = dev->parent; 4775f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4776f5860992SSakthivel K 4777f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4778f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 4779f5860992SSakthivel K if (rc) 4780f5860992SSakthivel K return rc; 4781f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 4782f5860992SSakthivel K ccb->device = pm8001_dev; 4783f5860992SSakthivel K ccb->ccb_tag = tag; 4784f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4785f5860992SSakthivel K 4786f5860992SSakthivel K if (flag == 1) { 4787f5860992SSakthivel K stp_sspsmp_sata = 0x02; /*direct attached sata */ 4788f5860992SSakthivel K } else { 4789aa9f8328SJames Bottomley if (pm8001_dev->dev_type == SAS_SATA_DEV) 4790f5860992SSakthivel K stp_sspsmp_sata = 0x00; /* stp*/ 4791aa9f8328SJames Bottomley else if (pm8001_dev->dev_type == SAS_END_DEVICE || 4792aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_EDGE_EXPANDER_DEVICE || 4793aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_FANOUT_EXPANDER_DEVICE) 4794f5860992SSakthivel K stp_sspsmp_sata = 0x01; /*ssp or smp*/ 4795f5860992SSakthivel K } 4796924a3541SJohn Garry if (parent_dev && dev_is_expander(parent_dev->dev_type)) 4797f5860992SSakthivel K phy_id = parent_dev->ex_dev.ex_phy->phy_id; 4798f5860992SSakthivel K else 4799f5860992SSakthivel K phy_id = pm8001_dev->attached_phy; 4800f5860992SSakthivel K 4801f5860992SSakthivel K opc = OPC_INB_REG_DEV; 4802f5860992SSakthivel K 4803f5860992SSakthivel K linkrate = (pm8001_dev->sas_device->linkrate < dev->port->linkrate) ? 4804f5860992SSakthivel K pm8001_dev->sas_device->linkrate : dev->port->linkrate; 4805f5860992SSakthivel K 4806f5860992SSakthivel K payload.phyid_portid = 4807f5860992SSakthivel K cpu_to_le32(((pm8001_dev->sas_device->port->id) & 0xFF) | 4808f5860992SSakthivel K ((phy_id & 0xFF) << 8)); 4809f5860992SSakthivel K 4810f5860992SSakthivel K payload.dtype_dlr_mcn_ir_retry = cpu_to_le32((retryFlag & 0x01) | 4811f5860992SSakthivel K ((linkrate & 0x0F) << 24) | 4812f5860992SSakthivel K ((stp_sspsmp_sata & 0x03) << 28)); 4813f5860992SSakthivel K payload.firstburstsize_ITNexustimeout = 4814f5860992SSakthivel K cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); 4815f5860992SSakthivel K 4816f5860992SSakthivel K memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr, 4817f5860992SSakthivel K SAS_ADDR_SIZE); 4818f5860992SSakthivel K 481991a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 482091a43fa6Speter chang sizeof(payload), 0); 48215533abcaSTomas Henzl if (rc) 48225533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 4823f5860992SSakthivel K 4824f5860992SSakthivel K return rc; 4825f5860992SSakthivel K } 4826f5860992SSakthivel K 4827f5860992SSakthivel K /** 4828f5860992SSakthivel K * pm80xx_chip_phy_ctl_req - support the local phy operation 4829f5860992SSakthivel K * @pm8001_ha: our hba card information. 4830f5860992SSakthivel K * @num: the inbound queue number 4831f5860992SSakthivel K * @phy_id: the phy id which we wanted to operate 4832f5860992SSakthivel K * @phy_op: 4833f5860992SSakthivel K */ 4834f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 4835f5860992SSakthivel K u32 phyId, u32 phy_op) 4836f5860992SSakthivel K { 483725c6edbdSViswas G u32 tag; 483825c6edbdSViswas G int rc; 4839f5860992SSakthivel K struct local_phy_ctl_req payload; 4840f5860992SSakthivel K struct inbound_queue_table *circularQ; 4841f5860992SSakthivel K u32 opc = OPC_INB_LOCAL_PHY_CONTROL; 4842f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 484325c6edbdSViswas G rc = pm8001_tag_alloc(pm8001_ha, &tag); 484425c6edbdSViswas G if (rc) 484525c6edbdSViswas G return rc; 4846f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 484725c6edbdSViswas G payload.tag = cpu_to_le32(tag); 4848f5860992SSakthivel K payload.phyop_phyid = 4849f5860992SSakthivel K cpu_to_le32(((phy_op & 0xFF) << 8) | (phyId & 0xFF)); 485091a43fa6Speter chang return pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 485191a43fa6Speter chang sizeof(payload), 0); 4852f5860992SSakthivel K } 4853f5860992SSakthivel K 4854f310a4eaSColin Ian King static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) 4855f5860992SSakthivel K { 4856f5860992SSakthivel K #ifdef PM8001_USE_MSIX 4857f5860992SSakthivel K return 1; 4858292c04ccSColin Ian King #else 4859292c04ccSColin Ian King u32 value; 4860292c04ccSColin Ian King 4861f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); 4862f5860992SSakthivel K if (value) 4863f5860992SSakthivel K return 1; 4864f5860992SSakthivel K return 0; 4865292c04ccSColin Ian King #endif 4866f5860992SSakthivel K } 4867f5860992SSakthivel K 4868f5860992SSakthivel K /** 4869f5860992SSakthivel K * pm8001_chip_isr - PM8001 isr handler. 4870f5860992SSakthivel K * @pm8001_ha: our hba card information. 4871f5860992SSakthivel K * @irq: irq number. 4872f5860992SSakthivel K * @stat: stat. 4873f5860992SSakthivel K */ 4874f5860992SSakthivel K static irqreturn_t 4875f5860992SSakthivel K pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec) 4876f5860992SSakthivel K { 4877f5860992SSakthivel K pm80xx_chip_interrupt_disable(pm8001_ha, vec); 48787370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk( 48797370672dSpeter chang "irq vec %d, ODMR:0x%x\n", 48807370672dSpeter chang vec, pm8001_cr32(pm8001_ha, 0, 0x30))); 4881f5860992SSakthivel K process_oq(pm8001_ha, vec); 4882f5860992SSakthivel K pm80xx_chip_interrupt_enable(pm8001_ha, vec); 4883f5860992SSakthivel K return IRQ_HANDLED; 4884f5860992SSakthivel K } 4885f5860992SSakthivel K 488627909407SAnand Kumar Santhanam void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha, 488727909407SAnand Kumar Santhanam u32 operation, u32 phyid, u32 length, u32 *buf) 488827909407SAnand Kumar Santhanam { 488927909407SAnand Kumar Santhanam u32 tag , i, j = 0; 489027909407SAnand Kumar Santhanam int rc; 489127909407SAnand Kumar Santhanam struct set_phy_profile_req payload; 489227909407SAnand Kumar Santhanam struct inbound_queue_table *circularQ; 489327909407SAnand Kumar Santhanam u32 opc = OPC_INB_SET_PHY_PROFILE; 489427909407SAnand Kumar Santhanam 489527909407SAnand Kumar Santhanam memset(&payload, 0, sizeof(payload)); 489627909407SAnand Kumar Santhanam rc = pm8001_tag_alloc(pm8001_ha, &tag); 489727909407SAnand Kumar Santhanam if (rc) 489827909407SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("Invalid tag\n")); 489927909407SAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[0]; 490027909407SAnand Kumar Santhanam payload.tag = cpu_to_le32(tag); 490127909407SAnand Kumar Santhanam payload.ppc_phyid = (((operation & 0xF) << 8) | (phyid & 0xFF)); 490227909407SAnand Kumar Santhanam PM8001_INIT_DBG(pm8001_ha, 490327909407SAnand Kumar Santhanam pm8001_printk(" phy profile command for phy %x ,length is %d\n", 490427909407SAnand Kumar Santhanam payload.ppc_phyid, length)); 490527909407SAnand Kumar Santhanam for (i = length; i < (length + PHY_DWORD_LENGTH - 1); i++) { 490627909407SAnand Kumar Santhanam payload.reserved[j] = cpu_to_le32(*((u32 *)buf + i)); 490727909407SAnand Kumar Santhanam j++; 490827909407SAnand Kumar Santhanam } 490991a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 491091a43fa6Speter chang sizeof(payload), 0); 49115533abcaSTomas Henzl if (rc) 49125533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 491327909407SAnand Kumar Santhanam } 491427909407SAnand Kumar Santhanam 491527909407SAnand Kumar Santhanam void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha, 491627909407SAnand Kumar Santhanam u32 length, u8 *buf) 491727909407SAnand Kumar Santhanam { 4918fdd0a66bSYueHaibing u32 i; 491927909407SAnand Kumar Santhanam 492027909407SAnand Kumar Santhanam for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 492127909407SAnand Kumar Santhanam mpi_set_phy_profile_req(pm8001_ha, 492227909407SAnand Kumar Santhanam SAS_PHY_ANALOG_SETTINGS_PAGE, i, length, (u32 *)buf); 492327909407SAnand Kumar Santhanam length = length + PHY_DWORD_LENGTH; 492427909407SAnand Kumar Santhanam } 492527909407SAnand Kumar Santhanam PM8001_INIT_DBG(pm8001_ha, pm8001_printk("phy settings completed\n")); 492627909407SAnand Kumar Santhanam } 4927c5614df7SBenjamin Rood 4928c5614df7SBenjamin Rood void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha, 4929c5614df7SBenjamin Rood u32 phy, u32 length, u32 *buf) 4930c5614df7SBenjamin Rood { 4931c5614df7SBenjamin Rood u32 tag, opc; 4932c5614df7SBenjamin Rood int rc, i; 4933c5614df7SBenjamin Rood struct set_phy_profile_req payload; 4934c5614df7SBenjamin Rood struct inbound_queue_table *circularQ; 4935c5614df7SBenjamin Rood 4936c5614df7SBenjamin Rood memset(&payload, 0, sizeof(payload)); 4937c5614df7SBenjamin Rood 4938c5614df7SBenjamin Rood rc = pm8001_tag_alloc(pm8001_ha, &tag); 4939c5614df7SBenjamin Rood if (rc) 4940c5614df7SBenjamin Rood PM8001_INIT_DBG(pm8001_ha, pm8001_printk("Invalid tag")); 4941c5614df7SBenjamin Rood 4942c5614df7SBenjamin Rood circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4943c5614df7SBenjamin Rood opc = OPC_INB_SET_PHY_PROFILE; 4944c5614df7SBenjamin Rood 4945c5614df7SBenjamin Rood payload.tag = cpu_to_le32(tag); 4946c5614df7SBenjamin Rood payload.ppc_phyid = (((SAS_PHY_ANALOG_SETTINGS_PAGE & 0xF) << 8) 4947c5614df7SBenjamin Rood | (phy & 0xFF)); 4948c5614df7SBenjamin Rood 4949c5614df7SBenjamin Rood for (i = 0; i < length; i++) 4950c5614df7SBenjamin Rood payload.reserved[i] = cpu_to_le32(*(buf + i)); 4951c5614df7SBenjamin Rood 495291a43fa6Speter chang rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 495391a43fa6Speter chang sizeof(payload), 0); 4954c5614df7SBenjamin Rood if (rc) 4955c5614df7SBenjamin Rood pm8001_tag_free(pm8001_ha, tag); 4956c5614df7SBenjamin Rood 4957c5614df7SBenjamin Rood PM8001_INIT_DBG(pm8001_ha, 4958c5614df7SBenjamin Rood pm8001_printk("PHY %d settings applied", phy)); 4959c5614df7SBenjamin Rood } 4960f5860992SSakthivel K const struct pm8001_dispatch pm8001_80xx_dispatch = { 4961f5860992SSakthivel K .name = "pmc80xx", 4962f5860992SSakthivel K .chip_init = pm80xx_chip_init, 4963f5860992SSakthivel K .chip_soft_rst = pm80xx_chip_soft_rst, 4964f5860992SSakthivel K .chip_rst = pm80xx_hw_chip_rst, 4965f5860992SSakthivel K .chip_iounmap = pm8001_chip_iounmap, 4966f5860992SSakthivel K .isr = pm80xx_chip_isr, 4967f310a4eaSColin Ian King .is_our_interrupt = pm80xx_chip_is_our_interrupt, 4968f5860992SSakthivel K .isr_process_oq = process_oq, 4969f5860992SSakthivel K .interrupt_enable = pm80xx_chip_interrupt_enable, 4970f5860992SSakthivel K .interrupt_disable = pm80xx_chip_interrupt_disable, 4971f5860992SSakthivel K .make_prd = pm8001_chip_make_sg, 4972f5860992SSakthivel K .smp_req = pm80xx_chip_smp_req, 4973f5860992SSakthivel K .ssp_io_req = pm80xx_chip_ssp_io_req, 4974f5860992SSakthivel K .sata_req = pm80xx_chip_sata_req, 4975f5860992SSakthivel K .phy_start_req = pm80xx_chip_phy_start_req, 4976f5860992SSakthivel K .phy_stop_req = pm80xx_chip_phy_stop_req, 4977f5860992SSakthivel K .reg_dev_req = pm80xx_chip_reg_dev_req, 4978f5860992SSakthivel K .dereg_dev_req = pm8001_chip_dereg_dev_req, 4979f5860992SSakthivel K .phy_ctl_req = pm80xx_chip_phy_ctl_req, 4980f5860992SSakthivel K .task_abort = pm8001_chip_abort_task, 4981f5860992SSakthivel K .ssp_tm_req = pm8001_chip_ssp_tm_req, 4982f5860992SSakthivel K .get_nvmd_req = pm8001_chip_get_nvmd_req, 4983f5860992SSakthivel K .set_nvmd_req = pm8001_chip_set_nvmd_req, 4984f5860992SSakthivel K .fw_flash_update_req = pm8001_chip_fw_flash_update_req, 4985f5860992SSakthivel K .set_dev_state_req = pm8001_chip_set_dev_state_req, 4986f5860992SSakthivel K }; 4987