1f5860992SSakthivel K /* 2f5860992SSakthivel K * PMC-Sierra SPCv/ve 8088/8089 SAS/SATA based host adapters driver 3f5860992SSakthivel K * 4f5860992SSakthivel K * Copyright (c) 2008-2009 PMC-Sierra, Inc., 5f5860992SSakthivel K * All rights reserved. 6f5860992SSakthivel K * 7f5860992SSakthivel K * Redistribution and use in source and binary forms, with or without 8f5860992SSakthivel K * modification, are permitted provided that the following conditions 9f5860992SSakthivel K * are met: 10f5860992SSakthivel K * 1. Redistributions of source code must retain the above copyright 11f5860992SSakthivel K * notice, this list of conditions, and the following disclaimer, 12f5860992SSakthivel K * without modification. 13f5860992SSakthivel K * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14f5860992SSakthivel K * substantially similar to the "NO WARRANTY" disclaimer below 15f5860992SSakthivel K * ("Disclaimer") and any redistribution must be conditioned upon 16f5860992SSakthivel K * including a substantially similar Disclaimer requirement for further 17f5860992SSakthivel K * binary redistribution. 18f5860992SSakthivel K * 3. Neither the names of the above-listed copyright holders nor the names 19f5860992SSakthivel K * of any contributors may be used to endorse or promote products derived 20f5860992SSakthivel K * from this software without specific prior written permission. 21f5860992SSakthivel K * 22f5860992SSakthivel K * Alternatively, this software may be distributed under the terms of the 23f5860992SSakthivel K * GNU General Public License ("GPL") version 2 as published by the Free 24f5860992SSakthivel K * Software Foundation. 25f5860992SSakthivel K * 26f5860992SSakthivel K * NO WARRANTY 27f5860992SSakthivel K * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28f5860992SSakthivel K * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29f5860992SSakthivel K * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 30f5860992SSakthivel K * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31f5860992SSakthivel K * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32f5860992SSakthivel K * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33f5860992SSakthivel K * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34f5860992SSakthivel K * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 35f5860992SSakthivel K * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 36f5860992SSakthivel K * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37f5860992SSakthivel K * POSSIBILITY OF SUCH DAMAGES. 38f5860992SSakthivel K * 39f5860992SSakthivel K */ 40f5860992SSakthivel K #include <linux/slab.h> 41f5860992SSakthivel K #include "pm8001_sas.h" 42f5860992SSakthivel K #include "pm80xx_hwi.h" 43f5860992SSakthivel K #include "pm8001_chips.h" 44f5860992SSakthivel K #include "pm8001_ctl.h" 45f5860992SSakthivel K 46f5860992SSakthivel K #define SMP_DIRECT 1 47f5860992SSakthivel K #define SMP_INDIRECT 2 48d078b511SAnand Kumar Santhanam 49d078b511SAnand Kumar Santhanam 50d078b511SAnand Kumar Santhanam int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shift_value) 51d078b511SAnand Kumar Santhanam { 52d078b511SAnand Kumar Santhanam u32 reg_val; 53d078b511SAnand Kumar Santhanam unsigned long start; 54d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, shift_value); 55d078b511SAnand Kumar Santhanam /* confirm the setting is written */ 56d078b511SAnand Kumar Santhanam start = jiffies + HZ; /* 1 sec */ 57d078b511SAnand Kumar Santhanam do { 58d078b511SAnand Kumar Santhanam reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER); 59d078b511SAnand Kumar Santhanam } while ((reg_val != shift_value) && time_before(jiffies, start)); 60d078b511SAnand Kumar Santhanam if (reg_val != shift_value) { 61d078b511SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 62d078b511SAnand Kumar Santhanam pm8001_printk("TIMEOUT:MEMBASE_II_SHIFT_REGISTER" 63d078b511SAnand Kumar Santhanam " = 0x%x\n", reg_val)); 64d078b511SAnand Kumar Santhanam return -1; 65d078b511SAnand Kumar Santhanam } 66d078b511SAnand Kumar Santhanam return 0; 67d078b511SAnand Kumar Santhanam } 68d078b511SAnand Kumar Santhanam 69d078b511SAnand Kumar Santhanam void pm80xx_pci_mem_copy(struct pm8001_hba_info *pm8001_ha, u32 soffset, 70d078b511SAnand Kumar Santhanam const void *destination, 71d078b511SAnand Kumar Santhanam u32 dw_count, u32 bus_base_number) 72d078b511SAnand Kumar Santhanam { 73d078b511SAnand Kumar Santhanam u32 index, value, offset; 74d078b511SAnand Kumar Santhanam u32 *destination1; 75d078b511SAnand Kumar Santhanam destination1 = (u32 *)destination; 76d078b511SAnand Kumar Santhanam 77d078b511SAnand Kumar Santhanam for (index = 0; index < dw_count; index += 4, destination1++) { 78d078b511SAnand Kumar Santhanam offset = (soffset + index / 4); 79d078b511SAnand Kumar Santhanam if (offset < (64 * 1024)) { 80d078b511SAnand Kumar Santhanam value = pm8001_cr32(pm8001_ha, bus_base_number, offset); 81d078b511SAnand Kumar Santhanam *destination1 = cpu_to_le32(value); 82d078b511SAnand Kumar Santhanam } 83d078b511SAnand Kumar Santhanam } 84d078b511SAnand Kumar Santhanam return; 85d078b511SAnand Kumar Santhanam } 86d078b511SAnand Kumar Santhanam 87d078b511SAnand Kumar Santhanam ssize_t pm80xx_get_fatal_dump(struct device *cdev, 88d078b511SAnand Kumar Santhanam struct device_attribute *attr, char *buf) 89d078b511SAnand Kumar Santhanam { 90d078b511SAnand Kumar Santhanam struct Scsi_Host *shost = class_to_shost(cdev); 91d078b511SAnand Kumar Santhanam struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 92d078b511SAnand Kumar Santhanam struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; 93d078b511SAnand Kumar Santhanam void __iomem *fatal_table_address = pm8001_ha->fatal_tbl_addr; 94d078b511SAnand Kumar Santhanam u32 accum_len , reg_val, index, *temp; 95d078b511SAnand Kumar Santhanam unsigned long start; 96d078b511SAnand Kumar Santhanam u8 *direct_data; 97d078b511SAnand Kumar Santhanam char *fatal_error_data = buf; 98d078b511SAnand Kumar Santhanam 99d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = buf; 100d078b511SAnand Kumar Santhanam if (pm8001_ha->chip_id == chip_8001) { 101d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 102d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 103d078b511SAnand Kumar Santhanam "Not supported for SPC controller"); 104d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 105d078b511SAnand Kumar Santhanam (char *)buf; 106d078b511SAnand Kumar Santhanam } 107d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_offset == 0) { 108d078b511SAnand Kumar Santhanam PM8001_IO_DBG(pm8001_ha, 109d078b511SAnand Kumar Santhanam pm8001_printk("forensic_info TYPE_NON_FATAL..............\n")); 110d078b511SAnand Kumar Santhanam direct_data = (u8 *)fatal_error_data; 111d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_type = TYPE_NON_FATAL; 112d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len = SYSFS_OFFSET; 113d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 114d078b511SAnand Kumar Santhanam 115d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data = direct_data; 116d078b511SAnand Kumar Santhanam 117d078b511SAnand Kumar Santhanam /* start to get data */ 118d078b511SAnand Kumar Santhanam /* Program the MEMBASE II Shifting Register with 0x00.*/ 119d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 120d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 121d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 122d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 123d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 124d078b511SAnand Kumar Santhanam } 125cf370066SViswas G 126d078b511SAnand Kumar Santhanam /* Read until accum_len is retrived */ 127d078b511SAnand Kumar Santhanam accum_len = pm8001_mr32(fatal_table_address, 128d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_ACCUM_LEN); 129d078b511SAnand Kumar Santhanam PM8001_IO_DBG(pm8001_ha, pm8001_printk("accum_len 0x%x\n", 130d078b511SAnand Kumar Santhanam accum_len)); 131d078b511SAnand Kumar Santhanam if (accum_len == 0xFFFFFFFF) { 132d078b511SAnand Kumar Santhanam PM8001_IO_DBG(pm8001_ha, 133d078b511SAnand Kumar Santhanam pm8001_printk("Possible PCI issue 0x%x not expected\n", 134d078b511SAnand Kumar Santhanam accum_len)); 135cf370066SViswas G return -EIO; 136d078b511SAnand Kumar Santhanam } 137d078b511SAnand Kumar Santhanam if (accum_len == 0 || accum_len >= 0x100000) { 138d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 139d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 140d078b511SAnand Kumar Santhanam "%08x ", 0xFFFFFFFF); 141d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 142d078b511SAnand Kumar Santhanam (char *)buf; 143d078b511SAnand Kumar Santhanam } 144d078b511SAnand Kumar Santhanam temp = (u32 *)pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr; 145d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 0) { 146d078b511SAnand Kumar Santhanam moreData: 147d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_info.data_buf.direct_data) { 148d078b511SAnand Kumar Santhanam /* Data is in bar, copy to host memory */ 149d078b511SAnand Kumar Santhanam pm80xx_pci_mem_copy(pm8001_ha, pm8001_ha->fatal_bar_loc, 150d078b511SAnand Kumar Santhanam pm8001_ha->memoryMap.region[FORENSIC_MEM].virt_ptr, 151d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len , 152d078b511SAnand Kumar Santhanam 1); 153d078b511SAnand Kumar Santhanam } 154d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc += 155d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 156d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_offset += 157d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 158d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset += 159d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 160d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 161d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len; 162d078b511SAnand Kumar Santhanam 163d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_last_offset >= accum_len) { 164d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 165d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 166d078b511SAnand Kumar Santhanam "%08x ", 3); 167d078b511SAnand Kumar Santhanam for (index = 0; index < (SYSFS_OFFSET / 4); index++) { 168d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 169d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 170d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 171d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 172d078b511SAnand Kumar Santhanam } 173d078b511SAnand Kumar Santhanam 174d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 175d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 1; 176d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset = 0; 177d078b511SAnand Kumar Santhanam pm8001_ha->forensic_last_offset = 0; 178d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 179d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 180d078b511SAnand Kumar Santhanam (char *)buf; 181d078b511SAnand Kumar Santhanam } 182d078b511SAnand Kumar Santhanam if (pm8001_ha->fatal_bar_loc < (64 * 1024)) { 183d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 184d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 185d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 186d078b511SAnand Kumar Santhanam "%08x ", 2); 187d078b511SAnand Kumar Santhanam for (index = 0; index < (SYSFS_OFFSET / 4); index++) { 188d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 189d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 190d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 191d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 192d078b511SAnand Kumar Santhanam } 193d078b511SAnand Kumar Santhanam return (char *)pm8001_ha-> 194d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data - 195d078b511SAnand Kumar Santhanam (char *)buf; 196d078b511SAnand Kumar Santhanam } 197d078b511SAnand Kumar Santhanam 198d078b511SAnand Kumar Santhanam /* Increment the MEMBASE II Shifting Register value by 0x100.*/ 199d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 200d078b511SAnand Kumar Santhanam sprintf(pm8001_ha->forensic_info.data_buf.direct_data, 201d078b511SAnand Kumar Santhanam "%08x ", 2); 202d078b511SAnand Kumar Santhanam for (index = 0; index < 256; index++) { 203d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 204d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 205d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 206d078b511SAnand Kumar Santhanam "%08x ", *(temp + index)); 207d078b511SAnand Kumar Santhanam } 208d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset += 0x100; 209d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 210d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 211d078b511SAnand Kumar Santhanam pm8001_ha->fatal_bar_loc = 0; 212d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 213d078b511SAnand Kumar Santhanam (char *)buf; 214d078b511SAnand Kumar Santhanam } 215d078b511SAnand Kumar Santhanam if (pm8001_ha->forensic_fatal_step == 1) { 216d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset = 0; 217d078b511SAnand Kumar Santhanam /* Read 64K of the debug data. */ 218d078b511SAnand Kumar Santhanam pm8001_cw32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER, 219d078b511SAnand Kumar Santhanam pm8001_ha->fatal_forensic_shift_offset); 220d078b511SAnand Kumar Santhanam pm8001_mw32(fatal_table_address, 221d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 222d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_HANDSHAKE_RDY); 223d078b511SAnand Kumar Santhanam 224d078b511SAnand Kumar Santhanam /* Poll FDDHSHK until clear */ 225d078b511SAnand Kumar Santhanam start = jiffies + (2 * HZ); /* 2 sec */ 226d078b511SAnand Kumar Santhanam 227d078b511SAnand Kumar Santhanam do { 228d078b511SAnand Kumar Santhanam reg_val = pm8001_mr32(fatal_table_address, 229d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE); 230d078b511SAnand Kumar Santhanam } while ((reg_val) && time_before(jiffies, start)); 231d078b511SAnand Kumar Santhanam 232d078b511SAnand Kumar Santhanam if (reg_val != 0) { 233d078b511SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 234d078b511SAnand Kumar Santhanam pm8001_printk("TIMEOUT:MEMBASE_II_SHIFT_REGISTER" 235d078b511SAnand Kumar Santhanam " = 0x%x\n", reg_val)); 236cf370066SViswas G return -EIO; 237d078b511SAnand Kumar Santhanam } 238d078b511SAnand Kumar Santhanam 239d078b511SAnand Kumar Santhanam /* Read the next 64K of the debug data. */ 240d078b511SAnand Kumar Santhanam pm8001_ha->forensic_fatal_step = 0; 241d078b511SAnand Kumar Santhanam if (pm8001_mr32(fatal_table_address, 242d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_STATUS) != 243d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE) { 244d078b511SAnand Kumar Santhanam pm8001_mw32(fatal_table_address, 245d078b511SAnand Kumar Santhanam MPI_FATAL_EDUMP_TABLE_HANDSHAKE, 0); 246d078b511SAnand Kumar Santhanam goto moreData; 247d078b511SAnand Kumar Santhanam } else { 248d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_data += 249d078b511SAnand Kumar Santhanam sprintf(pm8001_ha-> 250d078b511SAnand Kumar Santhanam forensic_info.data_buf.direct_data, 251d078b511SAnand Kumar Santhanam "%08x ", 4); 252d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0xFFFFFFFF; 253d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_len = 0; 254d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.direct_offset = 0; 255d078b511SAnand Kumar Santhanam pm8001_ha->forensic_info.data_buf.read_len = 0; 256d078b511SAnand Kumar Santhanam } 257d078b511SAnand Kumar Santhanam } 258d078b511SAnand Kumar Santhanam 259d078b511SAnand Kumar Santhanam return (char *)pm8001_ha->forensic_info.data_buf.direct_data - 260d078b511SAnand Kumar Santhanam (char *)buf; 261d078b511SAnand Kumar Santhanam } 262d078b511SAnand Kumar Santhanam 263f5860992SSakthivel K /** 264f5860992SSakthivel K * read_main_config_table - read the configure table and save it. 265f5860992SSakthivel K * @pm8001_ha: our hba card information 266f5860992SSakthivel K */ 267f5860992SSakthivel K static void read_main_config_table(struct pm8001_hba_info *pm8001_ha) 268f5860992SSakthivel K { 269f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 270f5860992SSakthivel K 271f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature = 272f5860992SSakthivel K pm8001_mr32(address, MAIN_SIGNATURE_OFFSET); 273f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev = 274f5860992SSakthivel K pm8001_mr32(address, MAIN_INTERFACE_REVISION); 275f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev = 276f5860992SSakthivel K pm8001_mr32(address, MAIN_FW_REVISION); 277f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io = 278f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_OUTSTANDING_IO_OFFSET); 279f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl = 280f5860992SSakthivel K pm8001_mr32(address, MAIN_MAX_SGL_OFFSET); 281f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag = 282f5860992SSakthivel K pm8001_mr32(address, MAIN_CNTRL_CAP_OFFSET); 283f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset = 284f5860992SSakthivel K pm8001_mr32(address, MAIN_GST_OFFSET); 285f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset = 286f5860992SSakthivel K pm8001_mr32(address, MAIN_IBQ_OFFSET); 287f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset = 288f5860992SSakthivel K pm8001_mr32(address, MAIN_OBQ_OFFSET); 289f5860992SSakthivel K 290f5860992SSakthivel K /* read Error Dump Offset and Length */ 291f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 = 292f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET); 293f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 = 294f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH); 295f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 = 296f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET); 297f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 = 298f5860992SSakthivel K pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH); 299f5860992SSakthivel K 300f5860992SSakthivel K /* read GPIO LED settings from the configuration table */ 301f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping = 302f5860992SSakthivel K pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET); 303f5860992SSakthivel K 304f5860992SSakthivel K /* read analog Setting offset from the configuration table */ 305f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset = 306f5860992SSakthivel K pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET); 307f5860992SSakthivel K 308f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset = 309f5860992SSakthivel K pm8001_mr32(address, MAIN_INT_VECTOR_TABLE_OFFSET); 310f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset = 311f5860992SSakthivel K pm8001_mr32(address, MAIN_SAS_PHY_ATTR_TABLE_OFFSET); 3128414cd80SViswas G /* read port recover and reset timeout */ 3138414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer = 3148414cd80SViswas G pm8001_mr32(address, MAIN_PORT_RECOVERY_TIMER); 31524fff017SViswas G /* read ILA and inactive firmware version */ 31624fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version = 31724fff017SViswas G pm8001_mr32(address, MAIN_MPI_ILA_RELEASE_TYPE); 31824fff017SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version = 31924fff017SViswas G pm8001_mr32(address, MAIN_MPI_INACTIVE_FW_VERSION); 3207370672dSpeter chang 3217370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 3227370672dSpeter chang "Main cfg table: sign:%x interface rev:%x fw_rev:%x\n", 3237370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature, 3247370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev, 3257370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev)); 3267370672dSpeter chang 3277370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 3287370672dSpeter chang "table offset: gst:%x iq:%x oq:%x int vec:%x phy attr:%x\n", 3297370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset, 3307370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset, 3317370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset, 3327370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset, 3337370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset)); 3347370672dSpeter chang 3357370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 3367370672dSpeter chang "Main cfg table; ila rev:%x Inactive fw rev:%x\n", 3377370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version, 3387370672dSpeter chang pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version)); 339f5860992SSakthivel K } 340f5860992SSakthivel K 341f5860992SSakthivel K /** 342f5860992SSakthivel K * read_general_status_table - read the general status table and save it. 343f5860992SSakthivel K * @pm8001_ha: our hba card information 344f5860992SSakthivel K */ 345f5860992SSakthivel K static void read_general_status_table(struct pm8001_hba_info *pm8001_ha) 346f5860992SSakthivel K { 347f5860992SSakthivel K void __iomem *address = pm8001_ha->general_stat_tbl_addr; 348f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate = 349f5860992SSakthivel K pm8001_mr32(address, GST_GSTLEN_MPIS_OFFSET); 350f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 = 351f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE0_OFFSET); 352f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 = 353f5860992SSakthivel K pm8001_mr32(address, GST_IQ_FREEZE_STATE1_OFFSET); 354f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt = 355f5860992SSakthivel K pm8001_mr32(address, GST_MSGUTCNT_OFFSET); 356f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt = 357f5860992SSakthivel K pm8001_mr32(address, GST_IOPTCNT_OFFSET); 358f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val = 359f5860992SSakthivel K pm8001_mr32(address, GST_GPIO_INPUT_VAL); 360f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[0] = 361f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET0); 362f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[1] = 363f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET1); 364f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[2] = 365f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET2); 366f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[3] = 367f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET3); 368f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[4] = 369f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET4); 370f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[5] = 371f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET5); 372f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[6] = 373f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET6); 374f5860992SSakthivel K pm8001_ha->gs_tbl.pm80xx_tbl.recover_err_info[7] = 375f5860992SSakthivel K pm8001_mr32(address, GST_RERRINFO_OFFSET7); 376f5860992SSakthivel K } 377f5860992SSakthivel K /** 378f5860992SSakthivel K * read_phy_attr_table - read the phy attribute table and save it. 379f5860992SSakthivel K * @pm8001_ha: our hba card information 380f5860992SSakthivel K */ 381f5860992SSakthivel K static void read_phy_attr_table(struct pm8001_hba_info *pm8001_ha) 382f5860992SSakthivel K { 383f5860992SSakthivel K void __iomem *address = pm8001_ha->pspa_q_tbl_addr; 384f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[0] = 385f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE0_OFFSET); 386f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[1] = 387f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE1_OFFSET); 388f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[2] = 389f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE2_OFFSET); 390f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[3] = 391f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE3_OFFSET); 392f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[4] = 393f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE4_OFFSET); 394f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[5] = 395f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE5_OFFSET); 396f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[6] = 397f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE6_OFFSET); 398f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[7] = 399f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE7_OFFSET); 400f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[8] = 401f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE8_OFFSET); 402f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[9] = 403f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE9_OFFSET); 404f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[10] = 405f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE10_OFFSET); 406f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[11] = 407f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE11_OFFSET); 408f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[12] = 409f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE12_OFFSET); 410f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[13] = 411f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE13_OFFSET); 412f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[14] = 413f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE14_OFFSET); 414f5860992SSakthivel K pm8001_ha->phy_attr_table.phystart1_16[15] = 415f5860992SSakthivel K pm8001_mr32(address, PSPA_PHYSTATE15_OFFSET); 416f5860992SSakthivel K 417f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[0] = 418f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID0_OFFSET); 419f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[1] = 420f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID1_OFFSET); 421f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[2] = 422f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID2_OFFSET); 423f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[3] = 424f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID3_OFFSET); 425f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[4] = 426f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID4_OFFSET); 427f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[5] = 428f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID5_OFFSET); 429f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[6] = 430f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID6_OFFSET); 431f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[7] = 432f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID7_OFFSET); 433f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[8] = 434f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID8_OFFSET); 435f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[9] = 436f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID9_OFFSET); 437f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[10] = 438f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID10_OFFSET); 439f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[11] = 440f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID11_OFFSET); 441f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[12] = 442f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID12_OFFSET); 443f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[13] = 444f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID13_OFFSET); 445f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[14] = 446f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID14_OFFSET); 447f5860992SSakthivel K pm8001_ha->phy_attr_table.outbound_hw_event_pid1_16[15] = 448f5860992SSakthivel K pm8001_mr32(address, PSPA_OB_HW_EVENT_PID15_OFFSET); 449f5860992SSakthivel K 450f5860992SSakthivel K } 451f5860992SSakthivel K 452f5860992SSakthivel K /** 453f5860992SSakthivel K * read_inbnd_queue_table - read the inbound queue table and save it. 454f5860992SSakthivel K * @pm8001_ha: our hba card information 455f5860992SSakthivel K */ 456f5860992SSakthivel K static void read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 457f5860992SSakthivel K { 458f5860992SSakthivel K int i; 459f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 460f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) { 461f5860992SSakthivel K u32 offset = i * 0x20; 462f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 463f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 464f5860992SSakthivel K (offset + IB_PIPCI_BAR))); 465f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 466f5860992SSakthivel K pm8001_mr32(address, (offset + IB_PIPCI_BAR_OFFSET)); 467f5860992SSakthivel K } 468f5860992SSakthivel K } 469f5860992SSakthivel K 470f5860992SSakthivel K /** 471f5860992SSakthivel K * read_outbnd_queue_table - read the outbound queue table and save it. 472f5860992SSakthivel K * @pm8001_ha: our hba card information 473f5860992SSakthivel K */ 474f5860992SSakthivel K static void read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha) 475f5860992SSakthivel K { 476f5860992SSakthivel K int i; 477f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 478f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) { 479f5860992SSakthivel K u32 offset = i * 0x24; 480f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 481f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(address, 482f5860992SSakthivel K (offset + OB_CIPCI_BAR))); 483f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 484f5860992SSakthivel K pm8001_mr32(address, (offset + OB_CIPCI_BAR_OFFSET)); 485f5860992SSakthivel K } 486f5860992SSakthivel K } 487f5860992SSakthivel K 488f5860992SSakthivel K /** 489f5860992SSakthivel K * init_default_table_values - init the default table. 490f5860992SSakthivel K * @pm8001_ha: our hba card information 491f5860992SSakthivel K */ 492f5860992SSakthivel K static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) 493f5860992SSakthivel K { 494f5860992SSakthivel K int i; 495f5860992SSakthivel K u32 offsetib, offsetob; 496f5860992SSakthivel K void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr; 497f5860992SSakthivel K void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr; 498f5860992SSakthivel K 499f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr = 500f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_hi; 501f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr = 502f5860992SSakthivel K pm8001_ha->memoryMap.region[AAP1].phys_addr_lo; 503f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size = 504f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 505f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity = 0x01; 506f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr = 507f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_hi; 508f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr = 509f5860992SSakthivel K pm8001_ha->memoryMap.region[IOP].phys_addr_lo; 510f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size = 511f5860992SSakthivel K PM8001_EVENT_LOG_SIZE; 512f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity = 0x01; 513f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt = 0x01; 514f5860992SSakthivel K 515c6b9ef57SSakthivel K /* Disable end to end CRC checking */ 516c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16); 517c6b9ef57SSakthivel K 518f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) { 519f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt = 5209504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30); 521f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].upper_base_addr = 522f5860992SSakthivel K pm8001_ha->memoryMap.region[IB + i].phys_addr_hi; 523f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].lower_base_addr = 524f5860992SSakthivel K pm8001_ha->memoryMap.region[IB + i].phys_addr_lo; 525f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].base_virt = 526f5860992SSakthivel K (u8 *)pm8001_ha->memoryMap.region[IB + i].virt_ptr; 527f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].total_length = 528f5860992SSakthivel K pm8001_ha->memoryMap.region[IB + i].total_len; 529f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr = 530f5860992SSakthivel K pm8001_ha->memoryMap.region[CI + i].phys_addr_hi; 531f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr = 532f5860992SSakthivel K pm8001_ha->memoryMap.region[CI + i].phys_addr_lo; 533f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].ci_virt = 534f5860992SSakthivel K pm8001_ha->memoryMap.region[CI + i].virt_ptr; 535f5860992SSakthivel K offsetib = i * 0x20; 536f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = 537f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressib, 538f5860992SSakthivel K (offsetib + 0x14))); 539f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].pi_offset = 540f5860992SSakthivel K pm8001_mr32(addressib, (offsetib + 0x18)); 541f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].producer_idx = 0; 542f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[i].consumer_index = 0; 5437370672dSpeter chang 5447370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 5457370672dSpeter chang "IQ %d pi_bar 0x%x pi_offset 0x%x\n", i, 5467370672dSpeter chang pm8001_ha->inbnd_q_tbl[i].pi_pci_bar, 5477370672dSpeter chang pm8001_ha->inbnd_q_tbl[i].pi_offset)); 548f5860992SSakthivel K } 549f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) { 550f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].element_size_cnt = 5519504a923SHans Verkuil PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30); 552f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].upper_base_addr = 553f5860992SSakthivel K pm8001_ha->memoryMap.region[OB + i].phys_addr_hi; 554f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].lower_base_addr = 555f5860992SSakthivel K pm8001_ha->memoryMap.region[OB + i].phys_addr_lo; 556f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].base_virt = 557f5860992SSakthivel K (u8 *)pm8001_ha->memoryMap.region[OB + i].virt_ptr; 558f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].total_length = 559f5860992SSakthivel K pm8001_ha->memoryMap.region[OB + i].total_len; 560f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr = 561f5860992SSakthivel K pm8001_ha->memoryMap.region[PI + i].phys_addr_hi; 562f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr = 563f5860992SSakthivel K pm8001_ha->memoryMap.region[PI + i].phys_addr_lo; 564f5860992SSakthivel K /* interrupt vector based on oq */ 565f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24); 566f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].pi_virt = 567f5860992SSakthivel K pm8001_ha->memoryMap.region[PI + i].virt_ptr; 568f5860992SSakthivel K offsetob = i * 0x24; 569f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = 570f5860992SSakthivel K get_pci_bar_index(pm8001_mr32(addressob, 571f5860992SSakthivel K offsetob + 0x14)); 572f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].ci_offset = 573f5860992SSakthivel K pm8001_mr32(addressob, (offsetob + 0x18)); 574f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0; 575f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[i].producer_index = 0; 5767370672dSpeter chang 5777370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 5787370672dSpeter chang "OQ %d ci_bar 0x%x ci_offset 0x%x\n", i, 5797370672dSpeter chang pm8001_ha->outbnd_q_tbl[i].ci_pci_bar, 5807370672dSpeter chang pm8001_ha->outbnd_q_tbl[i].ci_offset)); 581f5860992SSakthivel K } 582f5860992SSakthivel K } 583f5860992SSakthivel K 584f5860992SSakthivel K /** 585f5860992SSakthivel K * update_main_config_table - update the main default table to the HBA. 586f5860992SSakthivel K * @pm8001_ha: our hba card information 587f5860992SSakthivel K */ 588f5860992SSakthivel K static void update_main_config_table(struct pm8001_hba_info *pm8001_ha) 589f5860992SSakthivel K { 590f5860992SSakthivel K void __iomem *address = pm8001_ha->main_cfg_tbl_addr; 591f5860992SSakthivel K pm8001_mw32(address, MAIN_IQNPPD_HPPD_OFFSET, 592f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_q_nppd_hppd); 593f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_HI, 594f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr); 595f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_ADDR_LO, 596f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_event_log_addr); 597f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_BUFF_SIZE, 598f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_size); 599f5860992SSakthivel K pm8001_mw32(address, MAIN_EVENT_LOG_OPTION, 600f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.event_log_severity); 601f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_HI, 602f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_pcs_event_log_addr); 603f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_ADDR_LO, 604f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.lower_pcs_event_log_addr); 605f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_BUFF_SIZE, 606f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_size); 607f5860992SSakthivel K pm8001_mw32(address, MAIN_PCS_EVENT_LOG_OPTION, 608f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity); 60972349b62SDeepak Ukey /* Update Fatal error interrupt vector */ 61072349b62SDeepak Ukey pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt |= 61172349b62SDeepak Ukey ((pm8001_ha->number_of_intr - 1) << 8); 612f5860992SSakthivel K pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT, 613f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt); 6147370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 6157370672dSpeter chang "Updated Fatal error interrupt vector 0x%x\n", 6167370672dSpeter chang pm8001_mr32(address, MAIN_FATAL_ERROR_INTERRUPT))); 6177370672dSpeter chang 618c6b9ef57SSakthivel K pm8001_mw32(address, MAIN_EVENT_CRC_CHECK, 619c6b9ef57SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump); 620f5860992SSakthivel K 621f5860992SSakthivel K /* SPCv specific */ 622f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping &= 0xCFFFFFFF; 623f5860992SSakthivel K /* Set GPIOLED to 0x2 for LED indicator */ 624f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping |= 0x20000000; 625f5860992SSakthivel K pm8001_mw32(address, MAIN_GPIO_LED_FLAGS_OFFSET, 626f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.gpio_led_mapping); 6277370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 6287370672dSpeter chang "Programming DW 0x21 in main cfg table with 0x%x\n", 6297370672dSpeter chang pm8001_mr32(address, MAIN_GPIO_LED_FLAGS_OFFSET))); 630f5860992SSakthivel K 631f5860992SSakthivel K pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 632f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 633f5860992SSakthivel K pm8001_mw32(address, MAIN_INT_REASSERTION_DELAY, 634f5860992SSakthivel K pm8001_ha->main_cfg_tbl.pm80xx_tbl.interrupt_reassertion_delay); 6358414cd80SViswas G 6368414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 0xffff0000; 6378414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 6388414cd80SViswas G PORT_RECOVERY_TIMEOUT; 63961daffdeSViswas G if (pm8001_ha->chip_id == chip_8006) { 64061daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer &= 64161daffdeSViswas G 0x0000ffff; 64261daffdeSViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer |= 643196ba662SDeepak Ukey CHIP_8006_PORT_RECOVERY_TIMEOUT; 64461daffdeSViswas G } 6458414cd80SViswas G pm8001_mw32(address, MAIN_PORT_RECOVERY_TIMER, 6468414cd80SViswas G pm8001_ha->main_cfg_tbl.pm80xx_tbl.port_recovery_timer); 647f5860992SSakthivel K } 648f5860992SSakthivel K 649f5860992SSakthivel K /** 650f5860992SSakthivel K * update_inbnd_queue_table - update the inbound queue table to the HBA. 651f5860992SSakthivel K * @pm8001_ha: our hba card information 652f5860992SSakthivel K */ 653f5860992SSakthivel K static void update_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 654f5860992SSakthivel K int number) 655f5860992SSakthivel K { 656f5860992SSakthivel K void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; 657f5860992SSakthivel K u16 offset = number * 0x20; 658f5860992SSakthivel K pm8001_mw32(address, offset + IB_PROPERITY_OFFSET, 659f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); 660f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_HI_OFFSET, 661f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].upper_base_addr); 662f5860992SSakthivel K pm8001_mw32(address, offset + IB_BASE_ADDR_LO_OFFSET, 663f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].lower_base_addr); 664f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_HI_OFFSET, 665f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr); 666f5860992SSakthivel K pm8001_mw32(address, offset + IB_CI_BASE_ADDR_LO_OFFSET, 667f5860992SSakthivel K pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); 6687370672dSpeter chang 6697370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 6707370672dSpeter chang "IQ %d: Element pri size 0x%x\n", 6717370672dSpeter chang number, 6727370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt)); 6737370672dSpeter chang 6747370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 6757370672dSpeter chang "IQ upr base addr 0x%x IQ lwr base addr 0x%x\n", 6767370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].upper_base_addr, 6777370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].lower_base_addr)); 6787370672dSpeter chang 6797370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 6807370672dSpeter chang "CI upper base addr 0x%x CI lower base addr 0x%x\n", 6817370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr, 6827370672dSpeter chang pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr)); 683f5860992SSakthivel K } 684f5860992SSakthivel K 685f5860992SSakthivel K /** 686f5860992SSakthivel K * update_outbnd_queue_table - update the outbound queue table to the HBA. 687f5860992SSakthivel K * @pm8001_ha: our hba card information 688f5860992SSakthivel K */ 689f5860992SSakthivel K static void update_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha, 690f5860992SSakthivel K int number) 691f5860992SSakthivel K { 692f5860992SSakthivel K void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; 693f5860992SSakthivel K u16 offset = number * 0x24; 694f5860992SSakthivel K pm8001_mw32(address, offset + OB_PROPERITY_OFFSET, 695f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].element_size_cnt); 696f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_HI_OFFSET, 697f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].upper_base_addr); 698f5860992SSakthivel K pm8001_mw32(address, offset + OB_BASE_ADDR_LO_OFFSET, 699f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].lower_base_addr); 700f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_HI_OFFSET, 701f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr); 702f5860992SSakthivel K pm8001_mw32(address, offset + OB_PI_BASE_ADDR_LO_OFFSET, 703f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); 704f5860992SSakthivel K pm8001_mw32(address, offset + OB_INTERRUPT_COALES_OFFSET, 705f5860992SSakthivel K pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay); 7067370672dSpeter chang 7077370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 7087370672dSpeter chang "OQ %d: Element pri size 0x%x\n", 7097370672dSpeter chang number, 7107370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].element_size_cnt)); 7117370672dSpeter chang 7127370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 7137370672dSpeter chang "OQ upr base addr 0x%x OQ lwr base addr 0x%x\n", 7147370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].upper_base_addr, 7157370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].lower_base_addr)); 7167370672dSpeter chang 7177370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 7187370672dSpeter chang "PI upper base addr 0x%x PI lower base addr 0x%x\n", 7197370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr, 7207370672dSpeter chang pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr)); 721f5860992SSakthivel K } 722f5860992SSakthivel K 723f5860992SSakthivel K /** 724f5860992SSakthivel K * mpi_init_check - check firmware initialization status. 725f5860992SSakthivel K * @pm8001_ha: our hba card information 726f5860992SSakthivel K */ 727f5860992SSakthivel K static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) 728f5860992SSakthivel K { 729f5860992SSakthivel K u32 max_wait_count; 730f5860992SSakthivel K u32 value; 731f5860992SSakthivel K u32 gst_len_mpistate; 732f5860992SSakthivel K 733f5860992SSakthivel K /* Write bit0=1 to Inbound DoorBell Register to tell the SPC FW the 734f5860992SSakthivel K table is updated */ 735f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_UPDATE); 736f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 737a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 738a9a923e5SAnand Kumar Santhanam max_wait_count = 4 * 1000 * 1000;/* 4 sec */ 739a9a923e5SAnand Kumar Santhanam } else { 740a9a923e5SAnand Kumar Santhanam max_wait_count = 2 * 1000 * 1000;/* 2 sec */ 741a9a923e5SAnand Kumar Santhanam } 742f5860992SSakthivel K do { 743f5860992SSakthivel K udelay(1); 744f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 745f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_UPDATE; 746f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 747f5860992SSakthivel K 748f5860992SSakthivel K if (!max_wait_count) 749f5860992SSakthivel K return -1; 750f5860992SSakthivel K /* check the MPI-State for initialization upto 100ms*/ 751f5860992SSakthivel K max_wait_count = 100 * 1000;/* 100 msec */ 752f5860992SSakthivel K do { 753f5860992SSakthivel K udelay(1); 754f5860992SSakthivel K gst_len_mpistate = 755f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 756f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 757f5860992SSakthivel K } while ((GST_MPI_STATE_INIT != 758f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count)); 759f5860992SSakthivel K if (!max_wait_count) 760f5860992SSakthivel K return -1; 761f5860992SSakthivel K 762f5860992SSakthivel K /* check MPI Initialization error */ 763f5860992SSakthivel K gst_len_mpistate = gst_len_mpistate >> 16; 764f5860992SSakthivel K if (0x0000 != gst_len_mpistate) 765f5860992SSakthivel K return -1; 766f5860992SSakthivel K 767f5860992SSakthivel K return 0; 768f5860992SSakthivel K } 769f5860992SSakthivel K 770f5860992SSakthivel K /** 771f5860992SSakthivel K * check_fw_ready - The LLDD check if the FW is ready, if not, return error. 772f5860992SSakthivel K * @pm8001_ha: our hba card information 773f5860992SSakthivel K */ 774f5860992SSakthivel K static int check_fw_ready(struct pm8001_hba_info *pm8001_ha) 775f5860992SSakthivel K { 776f5860992SSakthivel K u32 value; 777f5860992SSakthivel K u32 max_wait_count; 778f5860992SSakthivel K u32 max_wait_time; 779f5860992SSakthivel K int ret = 0; 780f5860992SSakthivel K 781f5860992SSakthivel K /* reset / PCIe ready */ 782f5860992SSakthivel K max_wait_time = max_wait_count = 100 * 1000; /* 100 milli sec */ 783f5860992SSakthivel K do { 784f5860992SSakthivel K udelay(1); 785f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 786f5860992SSakthivel K } while ((value == 0xFFFFFFFF) && (--max_wait_count)); 787f5860992SSakthivel K 788f5860992SSakthivel K /* check ila status */ 789f5860992SSakthivel K max_wait_time = max_wait_count = 1000 * 1000; /* 1000 milli sec */ 790f5860992SSakthivel K do { 791f5860992SSakthivel K udelay(1); 792f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 793f5860992SSakthivel K } while (((value & SCRATCH_PAD_ILA_READY) != 794f5860992SSakthivel K SCRATCH_PAD_ILA_READY) && (--max_wait_count)); 795f5860992SSakthivel K if (!max_wait_count) 796f5860992SSakthivel K ret = -1; 797f5860992SSakthivel K else { 798f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 799f5860992SSakthivel K pm8001_printk(" ila ready status in %d millisec\n", 800f5860992SSakthivel K (max_wait_time - max_wait_count))); 801f5860992SSakthivel K } 802f5860992SSakthivel K 803f5860992SSakthivel K /* check RAAE status */ 804f5860992SSakthivel K max_wait_time = max_wait_count = 1800 * 1000; /* 1800 milli sec */ 805f5860992SSakthivel K do { 806f5860992SSakthivel K udelay(1); 807f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 808f5860992SSakthivel K } while (((value & SCRATCH_PAD_RAAE_READY) != 809f5860992SSakthivel K SCRATCH_PAD_RAAE_READY) && (--max_wait_count)); 810f5860992SSakthivel K if (!max_wait_count) 811f5860992SSakthivel K ret = -1; 812f5860992SSakthivel K else { 813f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 814f5860992SSakthivel K pm8001_printk(" raae ready status in %d millisec\n", 815f5860992SSakthivel K (max_wait_time - max_wait_count))); 816f5860992SSakthivel K } 817f5860992SSakthivel K 818f5860992SSakthivel K /* check iop0 status */ 819f5860992SSakthivel K max_wait_time = max_wait_count = 600 * 1000; /* 600 milli sec */ 820f5860992SSakthivel K do { 821f5860992SSakthivel K udelay(1); 822f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 823f5860992SSakthivel K } while (((value & SCRATCH_PAD_IOP0_READY) != SCRATCH_PAD_IOP0_READY) && 824f5860992SSakthivel K (--max_wait_count)); 825f5860992SSakthivel K if (!max_wait_count) 826f5860992SSakthivel K ret = -1; 827f5860992SSakthivel K else { 828f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 829f5860992SSakthivel K pm8001_printk(" iop0 ready status in %d millisec\n", 830f5860992SSakthivel K (max_wait_time - max_wait_count))); 831f5860992SSakthivel K } 832f5860992SSakthivel K 833f5860992SSakthivel K /* check iop1 status only for 16 port controllers */ 834f5860992SSakthivel K if ((pm8001_ha->chip_id != chip_8008) && 835f5860992SSakthivel K (pm8001_ha->chip_id != chip_8009)) { 836f5860992SSakthivel K /* 200 milli sec */ 837f5860992SSakthivel K max_wait_time = max_wait_count = 200 * 1000; 838f5860992SSakthivel K do { 839f5860992SSakthivel K udelay(1); 840f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 841f5860992SSakthivel K } while (((value & SCRATCH_PAD_IOP1_READY) != 842f5860992SSakthivel K SCRATCH_PAD_IOP1_READY) && (--max_wait_count)); 843f5860992SSakthivel K if (!max_wait_count) 844f5860992SSakthivel K ret = -1; 845f5860992SSakthivel K else { 846f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 847f5860992SSakthivel K "iop1 ready status in %d millisec\n", 848f5860992SSakthivel K (max_wait_time - max_wait_count))); 849f5860992SSakthivel K } 850f5860992SSakthivel K } 851f5860992SSakthivel K 852f5860992SSakthivel K return ret; 853f5860992SSakthivel K } 854f5860992SSakthivel K 855f5860992SSakthivel K static void init_pci_device_addresses(struct pm8001_hba_info *pm8001_ha) 856f5860992SSakthivel K { 857f5860992SSakthivel K void __iomem *base_addr; 858f5860992SSakthivel K u32 value; 859f5860992SSakthivel K u32 offset; 860f5860992SSakthivel K u32 pcibar; 861f5860992SSakthivel K u32 pcilogic; 862f5860992SSakthivel K 863f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0); 864f5860992SSakthivel K offset = value & 0x03FFFFFF; /* scratch pad 0 TBL address */ 865f5860992SSakthivel K 8667370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, 867f5860992SSakthivel K pm8001_printk("Scratchpad 0 Offset: 0x%x value 0x%x\n", 868f5860992SSakthivel K offset, value)); 869f5860992SSakthivel K pcilogic = (value & 0xFC000000) >> 26; 870f5860992SSakthivel K pcibar = get_pci_bar_index(pcilogic); 871f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 872f5860992SSakthivel K pm8001_printk("Scratchpad 0 PCI BAR: %d\n", pcibar)); 873f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr = base_addr = 874f5860992SSakthivel K pm8001_ha->io_mem[pcibar].memvirtaddr + offset; 875f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr = 876f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x18) & 877f5860992SSakthivel K 0xFFFFFF); 878f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr = 879f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C) & 880f5860992SSakthivel K 0xFFFFFF); 881f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr = 882f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x20) & 883f5860992SSakthivel K 0xFFFFFF); 884f5860992SSakthivel K pm8001_ha->ivt_tbl_addr = 885f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C) & 886f5860992SSakthivel K 0xFFFFFF); 887f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr = 888f5860992SSakthivel K base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0x90) & 889f5860992SSakthivel K 0xFFFFFF); 890d078b511SAnand Kumar Santhanam pm8001_ha->fatal_tbl_addr = 891d078b511SAnand Kumar Santhanam base_addr + (pm8001_cr32(pm8001_ha, pcibar, offset + 0xA0) & 892d078b511SAnand Kumar Santhanam 0xFFFFFF); 893f5860992SSakthivel K 894f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 895f5860992SSakthivel K pm8001_printk("GST OFFSET 0x%x\n", 896f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x18))); 897f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 898f5860992SSakthivel K pm8001_printk("INBND OFFSET 0x%x\n", 899f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x1C))); 900f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 901f5860992SSakthivel K pm8001_printk("OBND OFFSET 0x%x\n", 902f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x20))); 903f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 904f5860992SSakthivel K pm8001_printk("IVT OFFSET 0x%x\n", 905f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x8C))); 906f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 907f5860992SSakthivel K pm8001_printk("PSPA OFFSET 0x%x\n", 908f5860992SSakthivel K pm8001_cr32(pm8001_ha, pcibar, offset + 0x90))); 909f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 910f5860992SSakthivel K pm8001_printk("addr - main cfg %p general status %p\n", 911f5860992SSakthivel K pm8001_ha->main_cfg_tbl_addr, 912f5860992SSakthivel K pm8001_ha->general_stat_tbl_addr)); 913f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 914f5860992SSakthivel K pm8001_printk("addr - inbnd %p obnd %p\n", 915f5860992SSakthivel K pm8001_ha->inbnd_q_tbl_addr, 916f5860992SSakthivel K pm8001_ha->outbnd_q_tbl_addr)); 917f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 918f5860992SSakthivel K pm8001_printk("addr - pspa %p ivt %p\n", 919f5860992SSakthivel K pm8001_ha->pspa_q_tbl_addr, 920f5860992SSakthivel K pm8001_ha->ivt_tbl_addr)); 921f5860992SSakthivel K } 922f5860992SSakthivel K 923f5860992SSakthivel K /** 924f5860992SSakthivel K * pm80xx_set_thermal_config - support the thermal configuration 925f5860992SSakthivel K * @pm8001_ha: our hba card information. 926f5860992SSakthivel K */ 927a6cb3d01SSakthivel K int 928f5860992SSakthivel K pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha) 929f5860992SSakthivel K { 930f5860992SSakthivel K struct set_ctrl_cfg_req payload; 931f5860992SSakthivel K struct inbound_queue_table *circularQ; 932f5860992SSakthivel K int rc; 933f5860992SSakthivel K u32 tag; 934f5860992SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 935842784e0SViswas G u32 page_code; 936f5860992SSakthivel K 937f5860992SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 938f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 939f5860992SSakthivel K if (rc) 940f5860992SSakthivel K return -1; 941f5860992SSakthivel K 942f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 943f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 944842784e0SViswas G 945842784e0SViswas G if (IS_SPCV_12G(pm8001_ha->pdev)) 946842784e0SViswas G page_code = THERMAL_PAGE_CODE_7H; 947842784e0SViswas G else 948842784e0SViswas G page_code = THERMAL_PAGE_CODE_8H; 949842784e0SViswas G 950f5860992SSakthivel K payload.cfg_pg[0] = (THERMAL_LOG_ENABLE << 9) | 951842784e0SViswas G (THERMAL_ENABLE << 8) | page_code; 952f5860992SSakthivel K payload.cfg_pg[1] = (LTEMPHIL << 24) | (RTEMPHIL << 8); 953f5860992SSakthivel K 9547370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 9557370672dSpeter chang "Setting up thermal config. cfg_pg 0 0x%x cfg_pg 1 0x%x\n", 9567370672dSpeter chang payload.cfg_pg[0], payload.cfg_pg[1])); 9577370672dSpeter chang 958f5860992SSakthivel K rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 9595533abcaSTomas Henzl if (rc) 9605533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 961f5860992SSakthivel K return rc; 962f5860992SSakthivel K 963f5860992SSakthivel K } 964f5860992SSakthivel K 965f5860992SSakthivel K /** 966a6cb3d01SSakthivel K * pm80xx_set_sas_protocol_timer_config - support the SAS Protocol 967a6cb3d01SSakthivel K * Timer configuration page 968a6cb3d01SSakthivel K * @pm8001_ha: our hba card information. 969a6cb3d01SSakthivel K */ 970a6cb3d01SSakthivel K static int 971a6cb3d01SSakthivel K pm80xx_set_sas_protocol_timer_config(struct pm8001_hba_info *pm8001_ha) 972a6cb3d01SSakthivel K { 973a6cb3d01SSakthivel K struct set_ctrl_cfg_req payload; 974a6cb3d01SSakthivel K struct inbound_queue_table *circularQ; 975a6cb3d01SSakthivel K SASProtocolTimerConfig_t SASConfigPage; 976a6cb3d01SSakthivel K int rc; 977a6cb3d01SSakthivel K u32 tag; 978a6cb3d01SSakthivel K u32 opc = OPC_INB_SET_CONTROLLER_CONFIG; 979a6cb3d01SSakthivel K 980a6cb3d01SSakthivel K memset(&payload, 0, sizeof(struct set_ctrl_cfg_req)); 981a6cb3d01SSakthivel K memset(&SASConfigPage, 0, sizeof(SASProtocolTimerConfig_t)); 982a6cb3d01SSakthivel K 983a6cb3d01SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 984a6cb3d01SSakthivel K 985a6cb3d01SSakthivel K if (rc) 986a6cb3d01SSakthivel K return -1; 987a6cb3d01SSakthivel K 988a6cb3d01SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 989a6cb3d01SSakthivel K payload.tag = cpu_to_le32(tag); 990a6cb3d01SSakthivel K 991a6cb3d01SSakthivel K SASConfigPage.pageCode = SAS_PROTOCOL_TIMER_CONFIG_PAGE; 992a6cb3d01SSakthivel K SASConfigPage.MST_MSI = 3 << 15; 993a6cb3d01SSakthivel K SASConfigPage.STP_SSP_MCT_TMO = (STP_MCT_TMO << 16) | SSP_MCT_TMO; 994a6cb3d01SSakthivel K SASConfigPage.STP_FRM_TMO = (SAS_MAX_OPEN_TIME << 24) | 995a6cb3d01SSakthivel K (SMP_MAX_CONN_TIMER << 16) | STP_FRM_TIMER; 996a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = STP_IDLE_TIME; 997a6cb3d01SSakthivel K 998a6cb3d01SSakthivel K if (SASConfigPage.STP_IDLE_TMO > 0x3FFFFFF) 999a6cb3d01SSakthivel K SASConfigPage.STP_IDLE_TMO = 0x3FFFFFF; 1000a6cb3d01SSakthivel K 1001a6cb3d01SSakthivel K 1002a6cb3d01SSakthivel K SASConfigPage.OPNRJT_RTRY_INTVL = (SAS_MFD << 16) | 1003a6cb3d01SSakthivel K SAS_OPNRJT_RTRY_INTVL; 1004a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO = (SAS_DOPNRJT_RTRY_TMO << 16) 1005a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_TMO; 1006a6cb3d01SSakthivel K SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR = (SAS_DOPNRJT_RTRY_THR << 16) 1007a6cb3d01SSakthivel K | SAS_COPNRJT_RTRY_THR; 1008a6cb3d01SSakthivel K SASConfigPage.MAX_AIP = SAS_MAX_AIP; 1009a6cb3d01SSakthivel K 1010a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1011a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.pageCode " 1012a6cb3d01SSakthivel K "0x%08x\n", SASConfigPage.pageCode)); 1013a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1014a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.MST_MSI " 1015a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.MST_MSI)); 1016a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1017a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.STP_SSP_MCT_TMO " 1018a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.STP_SSP_MCT_TMO)); 1019a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1020a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.STP_FRM_TMO " 1021a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.STP_FRM_TMO)); 1022a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1023a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.STP_IDLE_TMO " 1024a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.STP_IDLE_TMO)); 1025a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1026a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.OPNRJT_RTRY_INTVL " 1027a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.OPNRJT_RTRY_INTVL)); 1028a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1029a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO " 1030a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_TMO)); 1031a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1032a6cb3d01SSakthivel K pm8001_printk("SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR " 1033a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.Data_Cmd_OPNRJT_RTRY_THR)); 1034a6cb3d01SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk("SASConfigPage.MAX_AIP " 1035a6cb3d01SSakthivel K " 0x%08x\n", SASConfigPage.MAX_AIP)); 1036a6cb3d01SSakthivel K 1037a6cb3d01SSakthivel K memcpy(&payload.cfg_pg, &SASConfigPage, 1038a6cb3d01SSakthivel K sizeof(SASProtocolTimerConfig_t)); 1039a6cb3d01SSakthivel K 1040a6cb3d01SSakthivel K rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 10415533abcaSTomas Henzl if (rc) 10425533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1043a6cb3d01SSakthivel K 1044a6cb3d01SSakthivel K return rc; 1045a6cb3d01SSakthivel K } 1046a6cb3d01SSakthivel K 1047a6cb3d01SSakthivel K /** 1048f5860992SSakthivel K * pm80xx_get_encrypt_info - Check for encryption 1049f5860992SSakthivel K * @pm8001_ha: our hba card information. 1050f5860992SSakthivel K */ 1051f5860992SSakthivel K static int 1052f5860992SSakthivel K pm80xx_get_encrypt_info(struct pm8001_hba_info *pm8001_ha) 1053f5860992SSakthivel K { 1054f5860992SSakthivel K u32 scratch3_value; 1055da225498SRickard Strandqvist int ret = -1; 1056f5860992SSakthivel K 1057f5860992SSakthivel K /* Read encryption status from SCRATCH PAD 3 */ 1058f5860992SSakthivel K scratch3_value = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3); 1059f5860992SSakthivel K 1060f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1061f5860992SSakthivel K SCRATCH_PAD3_ENC_READY) { 1062f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1063f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1064f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1065f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1066f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1067f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1068f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1069f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1070f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1071f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1072f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1073f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0; 1074f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1075f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_READY 0x%08X." 1076f5860992SSakthivel K "Cipher mode 0x%x Sec mode 0x%x status 0x%x\n", 1077f5860992SSakthivel K scratch3_value, pm8001_ha->encrypt_info.cipher_mode, 1078f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 1079f5860992SSakthivel K pm8001_ha->encrypt_info.status)); 1080f5860992SSakthivel K ret = 0; 1081f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_READY) == 1082f5860992SSakthivel K SCRATCH_PAD3_ENC_DISABLED) { 1083f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1084f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENC_DISABLED 0x%08X\n", 1085f5860992SSakthivel K scratch3_value)); 1086f5860992SSakthivel K pm8001_ha->encrypt_info.status = 0xFFFFFFFF; 1087f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = 0; 1088f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = 0; 1089da225498SRickard Strandqvist ret = 0; 1090f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1091f5860992SSakthivel K SCRATCH_PAD3_ENC_DIS_ERR) { 1092f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1093f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1094f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1095f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1096f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1097f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1098f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1099f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1100f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1101f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1102f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1103f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1104f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1105f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1106f5860992SSakthivel K "Encryption: SCRATCH_PAD3_DIS_ERR 0x%08X." 1107f5860992SSakthivel K "Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 1108f5860992SSakthivel K scratch3_value, pm8001_ha->encrypt_info.cipher_mode, 1109f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 1110f5860992SSakthivel K pm8001_ha->encrypt_info.status)); 1111f5860992SSakthivel K } else if ((scratch3_value & SCRATCH_PAD3_ENC_MASK) == 1112f5860992SSakthivel K SCRATCH_PAD3_ENC_ENA_ERR) { 1113f5860992SSakthivel K 1114f5860992SSakthivel K pm8001_ha->encrypt_info.status = 1115f5860992SSakthivel K (scratch3_value & SCRATCH_PAD3_ERR_CODE) >> 16; 1116f5860992SSakthivel K if (scratch3_value & SCRATCH_PAD3_XTS_ENABLED) 1117f5860992SSakthivel K pm8001_ha->encrypt_info.cipher_mode = CIPHER_MODE_XTS; 1118f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1119f5860992SSakthivel K SCRATCH_PAD3_SMF_ENABLED) 1120f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMF; 1121f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1122f5860992SSakthivel K SCRATCH_PAD3_SMA_ENABLED) 1123f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMA; 1124f5860992SSakthivel K if ((scratch3_value & SCRATCH_PAD3_SM_MASK) == 1125f5860992SSakthivel K SCRATCH_PAD3_SMB_ENABLED) 1126f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode = SEC_MODE_SMB; 1127f5860992SSakthivel K 1128f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1129f5860992SSakthivel K "Encryption: SCRATCH_PAD3_ENA_ERR 0x%08X." 1130f5860992SSakthivel K "Cipher mode 0x%x sec mode 0x%x status 0x%x\n", 1131f5860992SSakthivel K scratch3_value, pm8001_ha->encrypt_info.cipher_mode, 1132f5860992SSakthivel K pm8001_ha->encrypt_info.sec_mode, 1133f5860992SSakthivel K pm8001_ha->encrypt_info.status)); 1134f5860992SSakthivel K } 1135f5860992SSakthivel K return ret; 1136f5860992SSakthivel K } 1137f5860992SSakthivel K 1138f5860992SSakthivel K /** 1139f5860992SSakthivel K * pm80xx_encrypt_update - update flash with encryption informtion 1140f5860992SSakthivel K * @pm8001_ha: our hba card information. 1141f5860992SSakthivel K */ 1142f5860992SSakthivel K static int pm80xx_encrypt_update(struct pm8001_hba_info *pm8001_ha) 1143f5860992SSakthivel K { 1144f5860992SSakthivel K struct kek_mgmt_req payload; 1145f5860992SSakthivel K struct inbound_queue_table *circularQ; 1146f5860992SSakthivel K int rc; 1147f5860992SSakthivel K u32 tag; 1148f5860992SSakthivel K u32 opc = OPC_INB_KEK_MANAGEMENT; 1149f5860992SSakthivel K 1150f5860992SSakthivel K memset(&payload, 0, sizeof(struct kek_mgmt_req)); 1151f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 1152f5860992SSakthivel K if (rc) 1153f5860992SSakthivel K return -1; 1154f5860992SSakthivel K 1155f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1156f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 1157f5860992SSakthivel K /* Currently only one key is used. New KEK index is 1. 1158f5860992SSakthivel K * Current KEK index is 1. Store KEK to NVRAM is 1. 1159f5860992SSakthivel K */ 1160f5860992SSakthivel K payload.new_curidx_ksop = ((1 << 24) | (1 << 16) | (1 << 8) | 1161f5860992SSakthivel K KEK_MGMT_SUBOP_KEYCARDUPDATE); 1162f5860992SSakthivel K 11637370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 11647370672dSpeter chang "Saving Encryption info to flash. payload 0x%x\n", 11657370672dSpeter chang payload.new_curidx_ksop)); 11667370672dSpeter chang 1167f5860992SSakthivel K rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 11685533abcaSTomas Henzl if (rc) 11695533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 1170f5860992SSakthivel K 1171f5860992SSakthivel K return rc; 1172f5860992SSakthivel K } 1173f5860992SSakthivel K 1174f5860992SSakthivel K /** 1175f5860992SSakthivel K * pm8001_chip_init - the main init function that initialize whole PM8001 chip. 1176f5860992SSakthivel K * @pm8001_ha: our hba card information 1177f5860992SSakthivel K */ 1178f5860992SSakthivel K static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha) 1179f5860992SSakthivel K { 1180f5860992SSakthivel K int ret; 1181f5860992SSakthivel K u8 i = 0; 1182f5860992SSakthivel K 1183f5860992SSakthivel K /* check the firmware status */ 1184f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 1185f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1186f5860992SSakthivel K pm8001_printk("Firmware is not ready!\n")); 1187f5860992SSakthivel K return -EBUSY; 1188f5860992SSakthivel K } 1189f5860992SSakthivel K 119072349b62SDeepak Ukey /* Initialize the controller fatal error flag */ 119172349b62SDeepak Ukey pm8001_ha->controller_fatal_error = false; 119272349b62SDeepak Ukey 1193f5860992SSakthivel K /* Initialize pci space address eg: mpi offset */ 1194f5860992SSakthivel K init_pci_device_addresses(pm8001_ha); 1195f5860992SSakthivel K init_default_table_values(pm8001_ha); 1196f5860992SSakthivel K read_main_config_table(pm8001_ha); 1197f5860992SSakthivel K read_general_status_table(pm8001_ha); 1198f5860992SSakthivel K read_inbnd_queue_table(pm8001_ha); 1199f5860992SSakthivel K read_outbnd_queue_table(pm8001_ha); 1200f5860992SSakthivel K read_phy_attr_table(pm8001_ha); 1201f5860992SSakthivel K 1202f5860992SSakthivel K /* update main config table ,inbound table and outbound table */ 1203f5860992SSakthivel K update_main_config_table(pm8001_ha); 1204f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) 1205f5860992SSakthivel K update_inbnd_queue_table(pm8001_ha, i); 1206f5860992SSakthivel K for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) 1207f5860992SSakthivel K update_outbnd_queue_table(pm8001_ha, i); 1208f5860992SSakthivel K 1209f5860992SSakthivel K /* notify firmware update finished and check initialization status */ 1210f5860992SSakthivel K if (0 == mpi_init_check(pm8001_ha)) { 1211f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1212f5860992SSakthivel K pm8001_printk("MPI initialize successful!\n")); 1213f5860992SSakthivel K } else 1214f5860992SSakthivel K return -EBUSY; 1215f5860992SSakthivel K 1216a6cb3d01SSakthivel K /* send SAS protocol timer configuration page to FW */ 1217a6cb3d01SSakthivel K ret = pm80xx_set_sas_protocol_timer_config(pm8001_ha); 1218f5860992SSakthivel K 1219f5860992SSakthivel K /* Check for encryption */ 1220f5860992SSakthivel K if (pm8001_ha->chip->encrypt) { 1221f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1222f5860992SSakthivel K pm8001_printk("Checking for encryption\n")); 1223f5860992SSakthivel K ret = pm80xx_get_encrypt_info(pm8001_ha); 1224f5860992SSakthivel K if (ret == -1) { 1225f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1226f5860992SSakthivel K pm8001_printk("Encryption error !!\n")); 1227f5860992SSakthivel K if (pm8001_ha->encrypt_info.status == 0x81) { 1228f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, pm8001_printk( 1229f5860992SSakthivel K "Encryption enabled with error." 1230f5860992SSakthivel K "Saving encryption key to flash\n")); 1231f5860992SSakthivel K pm80xx_encrypt_update(pm8001_ha); 1232f5860992SSakthivel K } 1233f5860992SSakthivel K } 1234f5860992SSakthivel K } 1235f5860992SSakthivel K return 0; 1236f5860992SSakthivel K } 1237f5860992SSakthivel K 1238f5860992SSakthivel K static int mpi_uninit_check(struct pm8001_hba_info *pm8001_ha) 1239f5860992SSakthivel K { 1240f5860992SSakthivel K u32 max_wait_count; 1241f5860992SSakthivel K u32 value; 1242f5860992SSakthivel K u32 gst_len_mpistate; 1243f5860992SSakthivel K init_pci_device_addresses(pm8001_ha); 1244f5860992SSakthivel K /* Write bit1=1 to Inbound DoorBell Register to tell the SPC FW the 1245f5860992SSakthivel K table is stop */ 1246f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_IBDB_SET, SPCv_MSGU_CFG_TABLE_RESET); 1247f5860992SSakthivel K 1248f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1249a9a923e5SAnand Kumar Santhanam if (IS_SPCV_12G(pm8001_ha->pdev)) { 1250a9a923e5SAnand Kumar Santhanam max_wait_count = 4 * 1000 * 1000;/* 4 sec */ 1251a9a923e5SAnand Kumar Santhanam } else { 1252a9a923e5SAnand Kumar Santhanam max_wait_count = 2 * 1000 * 1000;/* 2 sec */ 1253a9a923e5SAnand Kumar Santhanam } 1254f5860992SSakthivel K do { 1255f5860992SSakthivel K udelay(1); 1256f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_IBDB_SET); 1257f5860992SSakthivel K value &= SPCv_MSGU_CFG_TABLE_RESET; 1258f5860992SSakthivel K } while ((value != 0) && (--max_wait_count)); 1259f5860992SSakthivel K 1260f5860992SSakthivel K if (!max_wait_count) { 1261f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1262f5860992SSakthivel K pm8001_printk("TIMEOUT:IBDB value/=%x\n", value)); 1263f5860992SSakthivel K return -1; 1264f5860992SSakthivel K } 1265f5860992SSakthivel K 1266f5860992SSakthivel K /* check the MPI-State for termination in progress */ 1267f5860992SSakthivel K /* wait until Inbound DoorBell Clear Register toggled */ 1268f5860992SSakthivel K max_wait_count = 2 * 1000 * 1000; /* 2 sec for spcv/ve */ 1269f5860992SSakthivel K do { 1270f5860992SSakthivel K udelay(1); 1271f5860992SSakthivel K gst_len_mpistate = 1272f5860992SSakthivel K pm8001_mr32(pm8001_ha->general_stat_tbl_addr, 1273f5860992SSakthivel K GST_GSTLEN_MPIS_OFFSET); 1274f5860992SSakthivel K if (GST_MPI_STATE_UNINIT == 1275f5860992SSakthivel K (gst_len_mpistate & GST_MPI_STATE_MASK)) 1276f5860992SSakthivel K break; 1277f5860992SSakthivel K } while (--max_wait_count); 1278f5860992SSakthivel K if (!max_wait_count) { 1279f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1280f5860992SSakthivel K pm8001_printk(" TIME OUT MPI State = 0x%x\n", 1281f5860992SSakthivel K gst_len_mpistate & GST_MPI_STATE_MASK)); 1282f5860992SSakthivel K return -1; 1283f5860992SSakthivel K } 1284f5860992SSakthivel K 1285f5860992SSakthivel K return 0; 1286f5860992SSakthivel K } 1287f5860992SSakthivel K 1288f5860992SSakthivel K /** 1289f5860992SSakthivel K * pm8001_chip_soft_rst - soft reset the PM8001 chip, so that the clear all 1290f5860992SSakthivel K * the FW register status to the originated status. 1291f5860992SSakthivel K * @pm8001_ha: our hba card information 1292f5860992SSakthivel K */ 1293f5860992SSakthivel K 1294f5860992SSakthivel K static int 1295f5860992SSakthivel K pm80xx_chip_soft_rst(struct pm8001_hba_info *pm8001_ha) 1296f5860992SSakthivel K { 1297f5860992SSakthivel K u32 regval; 1298f5860992SSakthivel K u32 bootloader_state; 129906f12f22SAnand Kumar Santhanam u32 ibutton0, ibutton1; 1300f5860992SSakthivel K 130172349b62SDeepak Ukey /* Process MPI table uninitialization only if FW is ready */ 130272349b62SDeepak Ukey if (!pm8001_ha->controller_fatal_error) { 1303f5860992SSakthivel K /* Check if MPI is in ready state to reset */ 1304f5860992SSakthivel K if (mpi_uninit_check(pm8001_ha) != 0) { 130572349b62SDeepak Ukey regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 130672349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 130772349b62SDeepak Ukey "MPI state is not ready scratch1 :0x%x\n", 130872349b62SDeepak Ukey regval)); 1309f5860992SSakthivel K return -1; 1310f5860992SSakthivel K } 131172349b62SDeepak Ukey } 1312f5860992SSakthivel K /* checked for reset register normal state; 0x0 */ 1313f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 1314f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1315f5860992SSakthivel K pm8001_printk("reset register before write : 0x%x\n", regval)); 1316f5860992SSakthivel K 1317f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, SPCv_NORMAL_RESET_VALUE); 13184daf1ef3SVikram Auradkar msleep(500); 1319f5860992SSakthivel K 1320f5860992SSakthivel K regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); 1321f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1322f5860992SSakthivel K pm8001_printk("reset register after write 0x%x\n", regval)); 1323f5860992SSakthivel K 1324f5860992SSakthivel K if ((regval & SPCv_SOFT_RESET_READ_MASK) == 1325f5860992SSakthivel K SPCv_SOFT_RESET_NORMAL_RESET_OCCURED) { 1326f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 1327f5860992SSakthivel K pm8001_printk(" soft reset successful [regval: 0x%x]\n", 1328f5860992SSakthivel K regval)); 1329f5860992SSakthivel K } else { 1330f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 1331f5860992SSakthivel K pm8001_printk(" soft reset failed [regval: 0x%x]\n", 1332f5860992SSakthivel K regval)); 1333f5860992SSakthivel K 1334f5860992SSakthivel K /* check bootloader is successfully executed or in HDA mode */ 1335f5860992SSakthivel K bootloader_state = 1336f5860992SSakthivel K pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1) & 1337f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_MASK; 1338f5860992SSakthivel K 1339f5860992SSakthivel K if (bootloader_state == SCRATCH_PAD1_BOOTSTATE_HDA_SEEPROM) { 1340f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1341f5860992SSakthivel K "Bootloader state - HDA mode SEEPROM\n")); 1342f5860992SSakthivel K } else if (bootloader_state == 1343f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_BOOTSTRAP) { 1344f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1345f5860992SSakthivel K "Bootloader state - HDA mode Bootstrap Pin\n")); 1346f5860992SSakthivel K } else if (bootloader_state == 1347f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_HDA_SOFTRESET) { 1348f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1349f5860992SSakthivel K "Bootloader state - HDA mode soft reset\n")); 1350f5860992SSakthivel K } else if (bootloader_state == 1351f5860992SSakthivel K SCRATCH_PAD1_BOOTSTATE_CRIT_ERROR) { 1352f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 1353f5860992SSakthivel K "Bootloader state-HDA mode critical error\n")); 1354f5860992SSakthivel K } 1355f5860992SSakthivel K return -EBUSY; 1356f5860992SSakthivel K } 1357f5860992SSakthivel K 1358f5860992SSakthivel K /* check the firmware status after reset */ 1359f5860992SSakthivel K if (-1 == check_fw_ready(pm8001_ha)) { 1360f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1361f5860992SSakthivel K pm8001_printk("Firmware is not ready!\n")); 136206f12f22SAnand Kumar Santhanam /* check iButton feature support for motherboard controller */ 136306f12f22SAnand Kumar Santhanam if (pm8001_ha->pdev->subsystem_vendor != 136406f12f22SAnand Kumar Santhanam PCI_VENDOR_ID_ADAPTEC2 && 1365faf321b0SBenjamin Rood pm8001_ha->pdev->subsystem_vendor != 1366faf321b0SBenjamin Rood PCI_VENDOR_ID_ATTO && 136706f12f22SAnand Kumar Santhanam pm8001_ha->pdev->subsystem_vendor != 0) { 136806f12f22SAnand Kumar Santhanam ibutton0 = pm8001_cr32(pm8001_ha, 0, 136906f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_6); 137006f12f22SAnand Kumar Santhanam ibutton1 = pm8001_cr32(pm8001_ha, 0, 137106f12f22SAnand Kumar Santhanam MSGU_HOST_SCRATCH_PAD_7); 137206f12f22SAnand Kumar Santhanam if (!ibutton0 && !ibutton1) { 137306f12f22SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 137406f12f22SAnand Kumar Santhanam pm8001_printk("iButton Feature is" 137506f12f22SAnand Kumar Santhanam " not Available!!!\n")); 1376f5860992SSakthivel K return -EBUSY; 1377f5860992SSakthivel K } 137806f12f22SAnand Kumar Santhanam if (ibutton0 == 0xdeadbeef && ibutton1 == 0xdeadbeef) { 137906f12f22SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 138006f12f22SAnand Kumar Santhanam pm8001_printk("CRC Check for iButton" 138106f12f22SAnand Kumar Santhanam " Feature Failed!!!\n")); 138206f12f22SAnand Kumar Santhanam return -EBUSY; 138306f12f22SAnand Kumar Santhanam } 138406f12f22SAnand Kumar Santhanam } 138506f12f22SAnand Kumar Santhanam } 1386f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1387f5860992SSakthivel K pm8001_printk("SPCv soft reset Complete\n")); 1388f5860992SSakthivel K return 0; 1389f5860992SSakthivel K } 1390f5860992SSakthivel K 1391f5860992SSakthivel K static void pm80xx_hw_chip_rst(struct pm8001_hba_info *pm8001_ha) 1392f5860992SSakthivel K { 1393f5860992SSakthivel K u32 i; 1394f5860992SSakthivel K 1395f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1396f5860992SSakthivel K pm8001_printk("chip reset start\n")); 1397f5860992SSakthivel K 1398f5860992SSakthivel K /* do SPCv chip reset. */ 1399f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, SPC_REG_SOFT_RESET, 0x11); 1400f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1401f5860992SSakthivel K pm8001_printk("SPC soft reset Complete\n")); 1402f5860992SSakthivel K 1403f5860992SSakthivel K /* Check this ..whether delay is required or no */ 1404f5860992SSakthivel K /* delay 10 usec */ 1405f5860992SSakthivel K udelay(10); 1406f5860992SSakthivel K 1407f5860992SSakthivel K /* wait for 20 msec until the firmware gets reloaded */ 1408f5860992SSakthivel K i = 20; 1409f5860992SSakthivel K do { 1410f5860992SSakthivel K mdelay(1); 1411f5860992SSakthivel K } while ((--i) != 0); 1412f5860992SSakthivel K 1413f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 1414f5860992SSakthivel K pm8001_printk("chip reset finished\n")); 1415f5860992SSakthivel K } 1416f5860992SSakthivel K 1417f5860992SSakthivel K /** 1418f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1419f5860992SSakthivel K * @pm8001_ha: our hba card information 1420f5860992SSakthivel K */ 1421f5860992SSakthivel K static void 1422f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(struct pm8001_hba_info *pm8001_ha) 1423f5860992SSakthivel K { 1424f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, ODMR_CLEAR_ALL); 1425f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODCR, ODCR_CLEAR_ALL); 1426f5860992SSakthivel K } 1427f5860992SSakthivel K 1428f5860992SSakthivel K /** 1429f5860992SSakthivel K * pm8001_chip_intx_interrupt_disable- disable PM8001 chip interrupt 1430f5860992SSakthivel K * @pm8001_ha: our hba card information 1431f5860992SSakthivel K */ 1432f5860992SSakthivel K static void 1433f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(struct pm8001_hba_info *pm8001_ha) 1434f5860992SSakthivel K { 1435f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, ODMR_MASK_ALL); 1436f5860992SSakthivel K } 1437f5860992SSakthivel K 1438f5860992SSakthivel K /** 1439f5860992SSakthivel K * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt 1440f5860992SSakthivel K * @pm8001_ha: our hba card information 1441f5860992SSakthivel K */ 1442f5860992SSakthivel K static void 1443f5860992SSakthivel K pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1444f5860992SSakthivel K { 1445f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1446f5860992SSakthivel K u32 mask; 1447f5860992SSakthivel K mask = (u32)(1 << vec); 1448f5860992SSakthivel K 1449f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF)); 1450f5860992SSakthivel K return; 1451f5860992SSakthivel K #endif 1452f5860992SSakthivel K pm80xx_chip_intx_interrupt_enable(pm8001_ha); 1453f5860992SSakthivel K 1454f5860992SSakthivel K } 1455f5860992SSakthivel K 1456f5860992SSakthivel K /** 1457f5860992SSakthivel K * pm8001_chip_interrupt_disable- disable PM8001 chip interrupt 1458f5860992SSakthivel K * @pm8001_ha: our hba card information 1459f5860992SSakthivel K */ 1460f5860992SSakthivel K static void 1461f5860992SSakthivel K pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec) 1462f5860992SSakthivel K { 1463f5860992SSakthivel K #ifdef PM8001_USE_MSIX 1464f5860992SSakthivel K u32 mask; 1465f5860992SSakthivel K if (vec == 0xFF) 1466f5860992SSakthivel K mask = 0xFFFFFFFF; 1467f5860992SSakthivel K else 1468f5860992SSakthivel K mask = (u32)(1 << vec); 1469f5860992SSakthivel K pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF)); 1470f5860992SSakthivel K return; 1471f5860992SSakthivel K #endif 1472f5860992SSakthivel K pm80xx_chip_intx_interrupt_disable(pm8001_ha); 1473f5860992SSakthivel K } 1474f5860992SSakthivel K 1475c6b9ef57SSakthivel K static void pm80xx_send_abort_all(struct pm8001_hba_info *pm8001_ha, 1476c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1477c6b9ef57SSakthivel K { 1478c6b9ef57SSakthivel K int res; 1479c6b9ef57SSakthivel K u32 ccb_tag; 1480c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1481c6b9ef57SSakthivel K struct sas_task *task = NULL; 1482c6b9ef57SSakthivel K struct task_abort_req task_abort; 1483c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1484c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_ABORT; 1485c6b9ef57SSakthivel K int ret; 1486c6b9ef57SSakthivel K 1487c6b9ef57SSakthivel K if (!pm8001_ha_dev) { 1488c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("dev is null\n")); 1489c6b9ef57SSakthivel K return; 1490c6b9ef57SSakthivel K } 1491c6b9ef57SSakthivel K 1492c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1493c6b9ef57SSakthivel K 1494c6b9ef57SSakthivel K if (!task) { 1495c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("cannot " 1496c6b9ef57SSakthivel K "allocate task\n")); 1497c6b9ef57SSakthivel K return; 1498c6b9ef57SSakthivel K } 1499c6b9ef57SSakthivel K 1500c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1501c6b9ef57SSakthivel K 1502c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 15035533abcaSTomas Henzl if (res) { 15045533abcaSTomas Henzl sas_free_task(task); 1505c6b9ef57SSakthivel K return; 15065533abcaSTomas Henzl } 1507c6b9ef57SSakthivel K 1508c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1509c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1510c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1511c6b9ef57SSakthivel K ccb->task = task; 1512c6b9ef57SSakthivel K 1513c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1514c6b9ef57SSakthivel K 1515c6b9ef57SSakthivel K memset(&task_abort, 0, sizeof(task_abort)); 1516c6b9ef57SSakthivel K task_abort.abort_all = cpu_to_le32(1); 1517c6b9ef57SSakthivel K task_abort.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1518c6b9ef57SSakthivel K task_abort.tag = cpu_to_le32(ccb_tag); 1519c6b9ef57SSakthivel K 1520c6b9ef57SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &task_abort, 0); 15215533abcaSTomas Henzl if (ret) { 15225533abcaSTomas Henzl sas_free_task(task); 15235533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 15245533abcaSTomas Henzl } 1525c6b9ef57SSakthivel K } 1526c6b9ef57SSakthivel K 1527c6b9ef57SSakthivel K static void pm80xx_send_read_log(struct pm8001_hba_info *pm8001_ha, 1528c6b9ef57SSakthivel K struct pm8001_device *pm8001_ha_dev) 1529c6b9ef57SSakthivel K { 1530c6b9ef57SSakthivel K struct sata_start_req sata_cmd; 1531c6b9ef57SSakthivel K int res; 1532c6b9ef57SSakthivel K u32 ccb_tag; 1533c6b9ef57SSakthivel K struct pm8001_ccb_info *ccb; 1534c6b9ef57SSakthivel K struct sas_task *task = NULL; 1535c6b9ef57SSakthivel K struct host_to_dev_fis fis; 1536c6b9ef57SSakthivel K struct domain_device *dev; 1537c6b9ef57SSakthivel K struct inbound_queue_table *circularQ; 1538c6b9ef57SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 1539c6b9ef57SSakthivel K 1540c6b9ef57SSakthivel K task = sas_alloc_slow_task(GFP_ATOMIC); 1541c6b9ef57SSakthivel K 1542c6b9ef57SSakthivel K if (!task) { 1543c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1544c6b9ef57SSakthivel K pm8001_printk("cannot allocate task !!!\n")); 1545c6b9ef57SSakthivel K return; 1546c6b9ef57SSakthivel K } 1547c6b9ef57SSakthivel K task->task_done = pm8001_task_done; 1548c6b9ef57SSakthivel K 1549c6b9ef57SSakthivel K res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 1550c6b9ef57SSakthivel K if (res) { 15515533abcaSTomas Henzl sas_free_task(task); 1552c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1553c6b9ef57SSakthivel K pm8001_printk("cannot allocate tag !!!\n")); 1554c6b9ef57SSakthivel K return; 1555c6b9ef57SSakthivel K } 1556c6b9ef57SSakthivel K 1557c6b9ef57SSakthivel K /* allocate domain device by ourselves as libsas 1558c6b9ef57SSakthivel K * is not going to provide any 1559c6b9ef57SSakthivel K */ 1560c6b9ef57SSakthivel K dev = kzalloc(sizeof(struct domain_device), GFP_ATOMIC); 1561c6b9ef57SSakthivel K if (!dev) { 15625533abcaSTomas Henzl sas_free_task(task); 15635533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 1564c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1565c6b9ef57SSakthivel K pm8001_printk("Domain device cannot be allocated\n")); 1566c6b9ef57SSakthivel K return; 15675533abcaSTomas Henzl } 15685533abcaSTomas Henzl 1569c6b9ef57SSakthivel K task->dev = dev; 1570c6b9ef57SSakthivel K task->dev->lldd_dev = pm8001_ha_dev; 1571c6b9ef57SSakthivel K 1572c6b9ef57SSakthivel K ccb = &pm8001_ha->ccb_info[ccb_tag]; 1573c6b9ef57SSakthivel K ccb->device = pm8001_ha_dev; 1574c6b9ef57SSakthivel K ccb->ccb_tag = ccb_tag; 1575c6b9ef57SSakthivel K ccb->task = task; 15760b6df110SViswas G ccb->n_elem = 0; 1577c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_READ_LOG_FLAG; 1578c6b9ef57SSakthivel K pm8001_ha_dev->id |= NCQ_2ND_RLE_FLAG; 1579c6b9ef57SSakthivel K 1580c6b9ef57SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 1581c6b9ef57SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 1582c6b9ef57SSakthivel K 1583c6b9ef57SSakthivel K /* construct read log FIS */ 1584c6b9ef57SSakthivel K memset(&fis, 0, sizeof(struct host_to_dev_fis)); 1585c6b9ef57SSakthivel K fis.fis_type = 0x27; 1586c6b9ef57SSakthivel K fis.flags = 0x80; 1587c6b9ef57SSakthivel K fis.command = ATA_CMD_READ_LOG_EXT; 1588c6b9ef57SSakthivel K fis.lbal = 0x10; 1589c6b9ef57SSakthivel K fis.sector_count = 0x1; 1590c6b9ef57SSakthivel K 1591c6b9ef57SSakthivel K sata_cmd.tag = cpu_to_le32(ccb_tag); 1592c6b9ef57SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 1593c6b9ef57SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad |= ((0x1 << 7) | (0x5 << 9)); 1594c6b9ef57SSakthivel K memcpy(&sata_cmd.sata_fis, &fis, sizeof(struct host_to_dev_fis)); 1595c6b9ef57SSakthivel K 1596c6b9ef57SSakthivel K res = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &sata_cmd, 0); 15975533abcaSTomas Henzl if (res) { 15985533abcaSTomas Henzl sas_free_task(task); 15995533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, ccb_tag); 16005533abcaSTomas Henzl kfree(dev); 16015533abcaSTomas Henzl } 1602c6b9ef57SSakthivel K } 1603c6b9ef57SSakthivel K 1604f5860992SSakthivel K /** 1605f5860992SSakthivel K * mpi_ssp_completion- process the event that FW response to the SSP request. 1606f5860992SSakthivel K * @pm8001_ha: our hba card information 1607f5860992SSakthivel K * @piomb: the message contents of this outbound message. 1608f5860992SSakthivel K * 1609f5860992SSakthivel K * When FW has completed a ssp request for example a IO request, after it has 1610f5860992SSakthivel K * filled the SG data with the data, it will trigger this event represent 1611f5860992SSakthivel K * that he has finished the job,please check the coresponding buffer. 1612f5860992SSakthivel K * So we will tell the caller who maybe waiting the result to tell upper layer 1613f5860992SSakthivel K * that the task has been finished. 1614f5860992SSakthivel K */ 1615f5860992SSakthivel K static void 1616f5860992SSakthivel K mpi_ssp_completion(struct pm8001_hba_info *pm8001_ha , void *piomb) 1617f5860992SSakthivel K { 1618f5860992SSakthivel K struct sas_task *t; 1619f5860992SSakthivel K struct pm8001_ccb_info *ccb; 1620f5860992SSakthivel K unsigned long flags; 1621f5860992SSakthivel K u32 status; 1622f5860992SSakthivel K u32 param; 1623f5860992SSakthivel K u32 tag; 1624f5860992SSakthivel K struct ssp_completion_resp *psspPayload; 1625f5860992SSakthivel K struct task_status_struct *ts; 1626f5860992SSakthivel K struct ssp_response_iu *iu; 1627f5860992SSakthivel K struct pm8001_device *pm8001_dev; 1628f5860992SSakthivel K psspPayload = (struct ssp_completion_resp *)(piomb + 4); 1629f5860992SSakthivel K status = le32_to_cpu(psspPayload->status); 1630f5860992SSakthivel K tag = le32_to_cpu(psspPayload->tag); 1631f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 1632f5860992SSakthivel K if ((status == IO_ABORTED) && ccb->open_retry) { 1633f5860992SSakthivel K /* Being completed by another */ 1634f5860992SSakthivel K ccb->open_retry = 0; 1635f5860992SSakthivel K return; 1636f5860992SSakthivel K } 1637f5860992SSakthivel K pm8001_dev = ccb->device; 1638f5860992SSakthivel K param = le32_to_cpu(psspPayload->param); 1639f5860992SSakthivel K t = ccb->task; 1640f5860992SSakthivel K 1641f5860992SSakthivel K if (status && status != IO_UNDERFLOW) 1642f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1643f5860992SSakthivel K pm8001_printk("sas IO status 0x%x\n", status)); 1644f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 1645f5860992SSakthivel K return; 1646f5860992SSakthivel K ts = &t->task_status; 16477370672dSpeter chang 16487370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, pm8001_printk( 16497370672dSpeter chang "tag::0x%x, status::0x%x task::0x%p\n", tag, status, t)); 16507370672dSpeter chang 1651cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 1652cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 1653cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) 1654cb269c26SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 1655cb269c26SAnand Kumar Santhanam pm8001_printk("SAS Address of IO Failure Drive" 1656cb269c26SAnand Kumar Santhanam ":%016llx", SAS_ADDR(t->dev->sas_addr))); 1657cb269c26SAnand Kumar Santhanam 1658f5860992SSakthivel K switch (status) { 1659f5860992SSakthivel K case IO_SUCCESS: 1660f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1661f5860992SSakthivel K pm8001_printk("IO_SUCCESS ,param = 0x%x\n", 1662f5860992SSakthivel K param)); 1663f5860992SSakthivel K if (param == 0) { 1664f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1665f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 1666f5860992SSakthivel K } else { 1667f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1668f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 1669f5860992SSakthivel K ts->residual = param; 1670f5860992SSakthivel K iu = &psspPayload->ssp_resp_iu; 1671f5860992SSakthivel K sas_ssp_task_response(pm8001_ha->dev, t, iu); 1672f5860992SSakthivel K } 1673f5860992SSakthivel K if (pm8001_dev) 1674f5860992SSakthivel K pm8001_dev->running_req--; 1675f5860992SSakthivel K break; 1676f5860992SSakthivel K case IO_ABORTED: 1677f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1678f5860992SSakthivel K pm8001_printk("IO_ABORTED IOMB Tag\n")); 1679f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1680f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 1681f5860992SSakthivel K break; 1682f5860992SSakthivel K case IO_UNDERFLOW: 1683f5860992SSakthivel K /* SSP Completion with error */ 1684f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1685f5860992SSakthivel K pm8001_printk("IO_UNDERFLOW ,param = 0x%x\n", 1686f5860992SSakthivel K param)); 1687f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1688f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 1689f5860992SSakthivel K ts->residual = param; 1690f5860992SSakthivel K if (pm8001_dev) 1691f5860992SSakthivel K pm8001_dev->running_req--; 1692f5860992SSakthivel K break; 1693f5860992SSakthivel K case IO_NO_DEVICE: 1694f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1695f5860992SSakthivel K pm8001_printk("IO_NO_DEVICE\n")); 1696f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1697f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 1698f5860992SSakthivel K break; 1699f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 1700f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1701f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 1702f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1703f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1704f5860992SSakthivel K /* Force the midlayer to retry */ 1705f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1706f5860992SSakthivel K break; 1707f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 1708f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1709f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 1710f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1711f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1712f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1713f5860992SSakthivel K break; 171427ecfa5eSViswas G case IO_XFER_ERROR_INVALID_SSP_RSP_FRAME: 171527ecfa5eSViswas G PM8001_IO_DBG(pm8001_ha, 171627ecfa5eSViswas G pm8001_printk("IO_XFER_ERROR_INVALID_SSP_RSP_FRAME\n")); 171727ecfa5eSViswas G ts->resp = SAS_TASK_COMPLETE; 171827ecfa5eSViswas G ts->stat = SAS_OPEN_REJECT; 171927ecfa5eSViswas G ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 172027ecfa5eSViswas G break; 1721f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 1722f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1723f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 1724f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1725f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1726f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 1727f5860992SSakthivel K break; 1728f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 1729f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1730f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 1731f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1732f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1733f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1734f5860992SSakthivel K break; 1735f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 1736f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1737f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 1738f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1739f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1740f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1741f5860992SSakthivel K break; 1742f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 1743a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 1744a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 1745a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 1746a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 1747a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 1748f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1749f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 1750f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1751f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1752f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1753f5860992SSakthivel K if (!t->uldd_task) 1754f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 1755f5860992SSakthivel K pm8001_dev, 1756f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 1757f5860992SSakthivel K break; 1758f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 1759f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1760f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 1761f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1762f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1763f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 1764f5860992SSakthivel K break; 1765f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 1766f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 1767f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 1768f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1769f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1770f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 1771f5860992SSakthivel K break; 1772f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 1773f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1774f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 1775f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 1776f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1777f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 1778f5860992SSakthivel K break; 1779f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 1780f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1781f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 1782f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1783f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1784f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1785f5860992SSakthivel K break; 1786f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 1787f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1788f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n")); 1789f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1790f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 1791f5860992SSakthivel K break; 1792f5860992SSakthivel K case IO_XFER_ERROR_DMA: 1793f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1794f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_DMA\n")); 1795f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1796f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1797f5860992SSakthivel K break; 1798f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 1799f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1800f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 1801f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1802f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1803f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1804f5860992SSakthivel K break; 1805f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 1806f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1807f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n")); 1808f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1809f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1810f5860992SSakthivel K break; 1811f5860992SSakthivel K case IO_PORT_IN_RESET: 1812f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1813f5860992SSakthivel K pm8001_printk("IO_PORT_IN_RESET\n")); 1814f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1815f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1816f5860992SSakthivel K break; 1817f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 1818f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1819f5860992SSakthivel K pm8001_printk("IO_DS_NON_OPERATIONAL\n")); 1820f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1821f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1822f5860992SSakthivel K if (!t->uldd_task) 1823f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 1824f5860992SSakthivel K pm8001_dev, 1825f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 1826f5860992SSakthivel K break; 1827f5860992SSakthivel K case IO_DS_IN_RECOVERY: 1828f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1829f5860992SSakthivel K pm8001_printk("IO_DS_IN_RECOVERY\n")); 1830f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1831f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1832f5860992SSakthivel K break; 1833f5860992SSakthivel K case IO_TM_TAG_NOT_FOUND: 1834f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1835f5860992SSakthivel K pm8001_printk("IO_TM_TAG_NOT_FOUND\n")); 1836f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1837f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1838f5860992SSakthivel K break; 1839f5860992SSakthivel K case IO_SSP_EXT_IU_ZERO_LEN_ERROR: 1840f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1841f5860992SSakthivel K pm8001_printk("IO_SSP_EXT_IU_ZERO_LEN_ERROR\n")); 1842f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1843f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1844f5860992SSakthivel K break; 1845f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 1846f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1847f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n")); 1848f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1849f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1850f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1851f5860992SSakthivel K break; 1852f5860992SSakthivel K default: 18537370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 1854f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", status)); 1855f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 1856f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1857f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1858f5860992SSakthivel K break; 1859f5860992SSakthivel K } 1860f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1861f5860992SSakthivel K pm8001_printk("scsi_status = 0x%x\n ", 1862f5860992SSakthivel K psspPayload->ssp_resp_iu.status)); 1863f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 1864f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 1865f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 1866f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 1867f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 1868f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 1869f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 1870f5860992SSakthivel K "task 0x%p done with io_status 0x%x resp 0x%x " 1871f5860992SSakthivel K "stat 0x%x but aborted by upper layer!\n", 1872f5860992SSakthivel K t, status, ts->resp, ts->stat)); 1873869ddbdcSViswas G if (t->slow_task) 1874869ddbdcSViswas G complete(&t->slow_task->completion); 1875f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 1876f5860992SSakthivel K } else { 1877f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 1878f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 1879f5860992SSakthivel K mb();/* in order to force CPU ordering */ 1880f5860992SSakthivel K t->task_done(t); 1881f5860992SSakthivel K } 1882f5860992SSakthivel K } 1883f5860992SSakthivel K 1884f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 1885f5860992SSakthivel K static void mpi_ssp_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 1886f5860992SSakthivel K { 1887f5860992SSakthivel K struct sas_task *t; 1888f5860992SSakthivel K unsigned long flags; 1889f5860992SSakthivel K struct task_status_struct *ts; 1890f5860992SSakthivel K struct pm8001_ccb_info *ccb; 1891f5860992SSakthivel K struct pm8001_device *pm8001_dev; 1892f5860992SSakthivel K struct ssp_event_resp *psspPayload = 1893f5860992SSakthivel K (struct ssp_event_resp *)(piomb + 4); 1894f5860992SSakthivel K u32 event = le32_to_cpu(psspPayload->event); 1895f5860992SSakthivel K u32 tag = le32_to_cpu(psspPayload->tag); 1896f5860992SSakthivel K u32 port_id = le32_to_cpu(psspPayload->port_id); 1897f5860992SSakthivel K 1898f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 1899f5860992SSakthivel K t = ccb->task; 1900f5860992SSakthivel K pm8001_dev = ccb->device; 1901f5860992SSakthivel K if (event) 1902f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 1903f5860992SSakthivel K pm8001_printk("sas IO status 0x%x\n", event)); 1904f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 1905f5860992SSakthivel K return; 1906f5860992SSakthivel K ts = &t->task_status; 19077370672dSpeter chang PM8001_IOERR_DBG(pm8001_ha, 1908f5860992SSakthivel K pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n", 1909f5860992SSakthivel K port_id, tag, event)); 1910f5860992SSakthivel K switch (event) { 1911f5860992SSakthivel K case IO_OVERFLOW: 1912f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n");) 1913f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1914f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 1915f5860992SSakthivel K ts->residual = 0; 1916f5860992SSakthivel K if (pm8001_dev) 1917f5860992SSakthivel K pm8001_dev->running_req--; 1918f5860992SSakthivel K break; 1919f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 1920f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1921f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 1922f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_ERROR_BREAK); 1923f5860992SSakthivel K return; 1924f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 1925f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1926f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 1927f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1928f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1929f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1930f5860992SSakthivel K break; 1931f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 1932f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 1933f5860992SSakthivel K "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 1934f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1935f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1936f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 1937f5860992SSakthivel K break; 1938f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 1939f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1940f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 1941f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1942f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1943f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1944f5860992SSakthivel K break; 1945f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 1946f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1947f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 1948f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1949f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1950f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1951f5860992SSakthivel K break; 1952f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 1953a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 1954a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 1955a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 1956a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 1957a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 1958f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1959f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 1960f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1961f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1962f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 1963f5860992SSakthivel K if (!t->uldd_task) 1964f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 1965f5860992SSakthivel K pm8001_dev, 1966f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 1967f5860992SSakthivel K break; 1968f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 1969f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1970f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 1971f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1972f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1973f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 1974f5860992SSakthivel K break; 1975f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 1976f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 1977f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 1978f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1979f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1980f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 1981f5860992SSakthivel K break; 1982f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 1983f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1984f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 1985f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1986f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1987f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 1988f5860992SSakthivel K break; 1989f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 1990f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1991f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 1992f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 1993f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 1994f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 1995f5860992SSakthivel K break; 1996f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 1997f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 1998f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n")); 1999f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2000f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2001f5860992SSakthivel K break; 2002f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2003f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2004f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2005f5860992SSakthivel K pm8001_handle_event(pm8001_ha, t, IO_XFER_OPEN_RETRY_TIMEOUT); 2006f5860992SSakthivel K return; 2007f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 2008f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2009f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n")); 2010f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2011f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2012f5860992SSakthivel K break; 2013f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 2014f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2015f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n")); 2016f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2017f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2018f5860992SSakthivel K break; 2019f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 2020f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2021f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n")); 2022f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2023f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2024f5860992SSakthivel K break; 2025f5860992SSakthivel K case IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT: 2026f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2027f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n")); 2028f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2029f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2030f5860992SSakthivel K break; 2031f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 2032f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2033f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n")); 2034f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2035f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2036f5860992SSakthivel K break; 2037f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 2038f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2039f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n")); 2040f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2041f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2042f5860992SSakthivel K break; 2043a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 20447370672dSpeter chang PM8001_IOERR_DBG(pm8001_ha, 2045a6cb3d01SSakthivel K pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n")); 2046a6cb3d01SSakthivel K /* TBC: used default set values */ 2047a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2048a6cb3d01SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2049a6cb3d01SSakthivel K break; 2050f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 2051f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2052f5860992SSakthivel K pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n")); 2053f5860992SSakthivel K return; 2054f5860992SSakthivel K default: 20557370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 2056f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", event)); 2057f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2058f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2059f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2060f5860992SSakthivel K break; 2061f5860992SSakthivel K } 2062f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2063f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2064f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2065f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2066f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2067f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2068f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 2069f5860992SSakthivel K "task 0x%p done with event 0x%x resp 0x%x " 2070f5860992SSakthivel K "stat 0x%x but aborted by upper layer!\n", 2071f5860992SSakthivel K t, event, ts->resp, ts->stat)); 2072f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2073f5860992SSakthivel K } else { 2074f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2075f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2076f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2077f5860992SSakthivel K t->task_done(t); 2078f5860992SSakthivel K } 2079f5860992SSakthivel K } 2080f5860992SSakthivel K 2081f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2082f5860992SSakthivel K static void 2083f5860992SSakthivel K mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 2084f5860992SSakthivel K { 2085f5860992SSakthivel K struct sas_task *t; 2086f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2087f5860992SSakthivel K u32 param; 2088f5860992SSakthivel K u32 status; 2089f5860992SSakthivel K u32 tag; 2090cb269c26SAnand Kumar Santhanam int i, j; 2091cb269c26SAnand Kumar Santhanam u8 sata_addr_low[4]; 2092cb269c26SAnand Kumar Santhanam u32 temp_sata_addr_low, temp_sata_addr_hi; 2093cb269c26SAnand Kumar Santhanam u8 sata_addr_hi[4]; 2094f5860992SSakthivel K struct sata_completion_resp *psataPayload; 2095f5860992SSakthivel K struct task_status_struct *ts; 2096f5860992SSakthivel K struct ata_task_resp *resp ; 2097f5860992SSakthivel K u32 *sata_resp; 2098f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2099c6b9ef57SSakthivel K unsigned long flags; 2100f5860992SSakthivel K 2101f5860992SSakthivel K psataPayload = (struct sata_completion_resp *)(piomb + 4); 2102f5860992SSakthivel K status = le32_to_cpu(psataPayload->status); 2103f5860992SSakthivel K tag = le32_to_cpu(psataPayload->tag); 2104f5860992SSakthivel K 2105c6b9ef57SSakthivel K if (!tag) { 2106c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2107c6b9ef57SSakthivel K pm8001_printk("tag null\n")); 2108c6b9ef57SSakthivel K return; 2109c6b9ef57SSakthivel K } 2110f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2111f5860992SSakthivel K param = le32_to_cpu(psataPayload->param); 2112c6b9ef57SSakthivel K if (ccb) { 2113f5860992SSakthivel K t = ccb->task; 2114f5860992SSakthivel K pm8001_dev = ccb->device; 2115c6b9ef57SSakthivel K } else { 2116f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2117c6b9ef57SSakthivel K pm8001_printk("ccb null\n")); 2118f5860992SSakthivel K return; 2119c6b9ef57SSakthivel K } 2120c6b9ef57SSakthivel K 2121c6b9ef57SSakthivel K if (t) { 2122c6b9ef57SSakthivel K if (t->dev && (t->dev->lldd_dev)) 2123c6b9ef57SSakthivel K pm8001_dev = t->dev->lldd_dev; 2124c6b9ef57SSakthivel K } else { 2125c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2126c6b9ef57SSakthivel K pm8001_printk("task null\n")); 2127c6b9ef57SSakthivel K return; 2128c6b9ef57SSakthivel K } 2129c6b9ef57SSakthivel K 2130c6b9ef57SSakthivel K if ((pm8001_dev && !(pm8001_dev->id & NCQ_READ_LOG_FLAG)) 2131c6b9ef57SSakthivel K && unlikely(!t || !t->lldd_task || !t->dev)) { 2132c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2133c6b9ef57SSakthivel K pm8001_printk("task or dev null\n")); 2134c6b9ef57SSakthivel K return; 2135c6b9ef57SSakthivel K } 2136c6b9ef57SSakthivel K 2137c6b9ef57SSakthivel K ts = &t->task_status; 2138c6b9ef57SSakthivel K if (!ts) { 2139c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2140c6b9ef57SSakthivel K pm8001_printk("ts null\n")); 2141c6b9ef57SSakthivel K return; 2142c6b9ef57SSakthivel K } 21437370672dSpeter chang 21447370672dSpeter chang if (unlikely(status)) 21457370672dSpeter chang PM8001_IOERR_DBG(pm8001_ha, pm8001_printk( 21467370672dSpeter chang "status:0x%x, tag:0x%x, task::0x%p\n", 21477370672dSpeter chang status, tag, t)); 21487370672dSpeter chang 2149cb269c26SAnand Kumar Santhanam /* Print sas address of IO failed device */ 2150cb269c26SAnand Kumar Santhanam if ((status != IO_SUCCESS) && (status != IO_OVERFLOW) && 2151cb269c26SAnand Kumar Santhanam (status != IO_UNDERFLOW)) { 2152cb269c26SAnand Kumar Santhanam if (!((t->dev->parent) && 2153924a3541SJohn Garry (dev_is_expander(t->dev->parent->dev_type)))) { 2154cb269c26SAnand Kumar Santhanam for (i = 0 , j = 4; i <= 3 && j <= 7; i++ , j++) 2155cb269c26SAnand Kumar Santhanam sata_addr_low[i] = pm8001_ha->sas_addr[j]; 2156cb269c26SAnand Kumar Santhanam for (i = 0 , j = 0; i <= 3 && j <= 3; i++ , j++) 2157cb269c26SAnand Kumar Santhanam sata_addr_hi[i] = pm8001_ha->sas_addr[j]; 2158cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_low, sata_addr_low, 2159cb269c26SAnand Kumar Santhanam sizeof(sata_addr_low)); 2160cb269c26SAnand Kumar Santhanam memcpy(&temp_sata_addr_hi, sata_addr_hi, 2161cb269c26SAnand Kumar Santhanam sizeof(sata_addr_hi)); 2162cb269c26SAnand Kumar Santhanam temp_sata_addr_hi = (((temp_sata_addr_hi >> 24) & 0xff) 2163cb269c26SAnand Kumar Santhanam |((temp_sata_addr_hi << 8) & 2164cb269c26SAnand Kumar Santhanam 0xff0000) | 2165cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi >> 8) 2166cb269c26SAnand Kumar Santhanam & 0xff00) | 2167cb269c26SAnand Kumar Santhanam ((temp_sata_addr_hi << 24) & 2168cb269c26SAnand Kumar Santhanam 0xff000000)); 2169cb269c26SAnand Kumar Santhanam temp_sata_addr_low = ((((temp_sata_addr_low >> 24) 2170cb269c26SAnand Kumar Santhanam & 0xff) | 2171cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 8) 2172cb269c26SAnand Kumar Santhanam & 0xff0000) | 2173cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low >> 8) 2174cb269c26SAnand Kumar Santhanam & 0xff00) | 2175cb269c26SAnand Kumar Santhanam ((temp_sata_addr_low << 24) 2176cb269c26SAnand Kumar Santhanam & 0xff000000)) + 2177cb269c26SAnand Kumar Santhanam pm8001_dev->attached_phy + 2178cb269c26SAnand Kumar Santhanam 0x10); 2179cb269c26SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 2180cb269c26SAnand Kumar Santhanam pm8001_printk("SAS Address of IO Failure Drive:" 2181cb269c26SAnand Kumar Santhanam "%08x%08x", temp_sata_addr_hi, 2182cb269c26SAnand Kumar Santhanam temp_sata_addr_low)); 2183f5860992SSakthivel K 2184cb269c26SAnand Kumar Santhanam } else { 2185cb269c26SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 2186cb269c26SAnand Kumar Santhanam pm8001_printk("SAS Address of IO Failure Drive:" 2187cb269c26SAnand Kumar Santhanam "%016llx", SAS_ADDR(t->dev->sas_addr))); 2188cb269c26SAnand Kumar Santhanam } 2189cb269c26SAnand Kumar Santhanam } 2190f5860992SSakthivel K switch (status) { 2191f5860992SSakthivel K case IO_SUCCESS: 2192f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n")); 2193f5860992SSakthivel K if (param == 0) { 2194f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2195f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 2196c6b9ef57SSakthivel K /* check if response is for SEND READ LOG */ 2197c6b9ef57SSakthivel K if (pm8001_dev && 2198c6b9ef57SSakthivel K (pm8001_dev->id & NCQ_READ_LOG_FLAG)) { 2199c6b9ef57SSakthivel K /* set new bit for abort_all */ 2200c6b9ef57SSakthivel K pm8001_dev->id |= NCQ_ABORT_ALL_FLAG; 2201c6b9ef57SSakthivel K /* clear bit for read log */ 2202c6b9ef57SSakthivel K pm8001_dev->id = pm8001_dev->id & 0x7FFFFFFF; 2203c6b9ef57SSakthivel K pm80xx_send_abort_all(pm8001_ha, pm8001_dev); 2204c6b9ef57SSakthivel K /* Free the tag */ 2205c6b9ef57SSakthivel K pm8001_tag_free(pm8001_ha, tag); 2206c6b9ef57SSakthivel K sas_free_task(t); 2207c6b9ef57SSakthivel K return; 2208c6b9ef57SSakthivel K } 2209f5860992SSakthivel K } else { 2210f5860992SSakthivel K u8 len; 2211f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2212f5860992SSakthivel K ts->stat = SAS_PROTO_RESPONSE; 2213f5860992SSakthivel K ts->residual = param; 2214f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2215f5860992SSakthivel K pm8001_printk("SAS_PROTO_RESPONSE len = %d\n", 2216f5860992SSakthivel K param)); 2217f5860992SSakthivel K sata_resp = &psataPayload->sata_resp[0]; 2218f5860992SSakthivel K resp = (struct ata_task_resp *)ts->buf; 2219f5860992SSakthivel K if (t->ata_task.dma_xfer == 0 && 2220f73bdebdSChristoph Hellwig t->data_dir == DMA_FROM_DEVICE) { 2221f5860992SSakthivel K len = sizeof(struct pio_setup_fis); 2222f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2223f5860992SSakthivel K pm8001_printk("PIO read len = %d\n", len)); 2224f5860992SSakthivel K } else if (t->ata_task.use_ncq) { 2225f5860992SSakthivel K len = sizeof(struct set_dev_bits_fis); 2226f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2227f5860992SSakthivel K pm8001_printk("FPDMA len = %d\n", len)); 2228f5860992SSakthivel K } else { 2229f5860992SSakthivel K len = sizeof(struct dev_to_host_fis); 2230f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2231f5860992SSakthivel K pm8001_printk("other len = %d\n", len)); 2232f5860992SSakthivel K } 2233f5860992SSakthivel K if (SAS_STATUS_BUF_SIZE >= sizeof(*resp)) { 2234f5860992SSakthivel K resp->frame_len = len; 2235f5860992SSakthivel K memcpy(&resp->ending_fis[0], sata_resp, len); 2236f5860992SSakthivel K ts->buf_valid_size = sizeof(*resp); 2237f5860992SSakthivel K } else 2238f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2239f5860992SSakthivel K pm8001_printk("response to large\n")); 2240f5860992SSakthivel K } 2241f5860992SSakthivel K if (pm8001_dev) 2242f5860992SSakthivel K pm8001_dev->running_req--; 2243f5860992SSakthivel K break; 2244f5860992SSakthivel K case IO_ABORTED: 2245f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2246f5860992SSakthivel K pm8001_printk("IO_ABORTED IOMB Tag\n")); 2247f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2248f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2249f5860992SSakthivel K if (pm8001_dev) 2250f5860992SSakthivel K pm8001_dev->running_req--; 2251f5860992SSakthivel K break; 2252f5860992SSakthivel K /* following cases are to do cases */ 2253f5860992SSakthivel K case IO_UNDERFLOW: 2254f5860992SSakthivel K /* SATA Completion with error */ 2255f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2256f5860992SSakthivel K pm8001_printk("IO_UNDERFLOW param = %d\n", param)); 2257f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2258f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2259f5860992SSakthivel K ts->residual = param; 2260f5860992SSakthivel K if (pm8001_dev) 2261f5860992SSakthivel K pm8001_dev->running_req--; 2262f5860992SSakthivel K break; 2263f5860992SSakthivel K case IO_NO_DEVICE: 2264f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2265f5860992SSakthivel K pm8001_printk("IO_NO_DEVICE\n")); 2266f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2267f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 2268f5860992SSakthivel K break; 2269f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2270f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2271f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2272f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2273f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2274f5860992SSakthivel K break; 2275f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2276f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2277f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2278f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2279f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2280f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2281f5860992SSakthivel K break; 2282f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2283f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2284f5860992SSakthivel K "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2285f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2286f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2287f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2288f5860992SSakthivel K break; 2289f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2290f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2291f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2292f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2293f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2294f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2295f5860992SSakthivel K break; 2296f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2297f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2298f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2299f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2300f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2301f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2302f5860992SSakthivel K break; 2303f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2304a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2305a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2306a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2307a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2308a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2309f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2310f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2311f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2312f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2313f5860992SSakthivel K if (!t->uldd_task) { 2314f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2315f5860992SSakthivel K pm8001_dev, 2316f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2317f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2318f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 23192b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2320f5860992SSakthivel K return; 2321f5860992SSakthivel K } 2322f5860992SSakthivel K break; 2323f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2324f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2325f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2326f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2327f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2328f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2329f5860992SSakthivel K if (!t->uldd_task) { 2330f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2331f5860992SSakthivel K pm8001_dev, 2332f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2333f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2334f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 23352b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2336f5860992SSakthivel K return; 2337f5860992SSakthivel K } 2338f5860992SSakthivel K break; 2339f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 2340f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2341f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 2342f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2343f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2344f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2345f5860992SSakthivel K break; 2346f5860992SSakthivel K case IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY: 2347f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2348f5860992SSakthivel K "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n")); 2349f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2350f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2351f5860992SSakthivel K if (!t->uldd_task) { 2352f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2353f5860992SSakthivel K pm8001_dev, 2354f5860992SSakthivel K IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY); 2355f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2356f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 23572b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2358f5860992SSakthivel K return; 2359f5860992SSakthivel K } 2360f5860992SSakthivel K break; 2361f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 2362f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2363f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 2364f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2365f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2366f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2367f5860992SSakthivel K break; 2368f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 2369f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2370f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 2371f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2372f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2373f5860992SSakthivel K break; 2374f5860992SSakthivel K case IO_XFER_ERROR_ACK_NAK_TIMEOUT: 2375f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2376f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_ACK_NAK_TIMEOUT\n")); 2377f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2378f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2379f5860992SSakthivel K break; 2380f5860992SSakthivel K case IO_XFER_ERROR_DMA: 2381f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2382f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_DMA\n")); 2383f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2384f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2385f5860992SSakthivel K break; 2386f5860992SSakthivel K case IO_XFER_ERROR_SATA_LINK_TIMEOUT: 2387f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2388f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_SATA_LINK_TIMEOUT\n")); 2389f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2390f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2391f5860992SSakthivel K break; 2392f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 2393f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2394f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n")); 2395f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2396f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2397f5860992SSakthivel K break; 2398f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2399f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2400f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2401f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2402f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2403f5860992SSakthivel K break; 2404f5860992SSakthivel K case IO_PORT_IN_RESET: 2405f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2406f5860992SSakthivel K pm8001_printk("IO_PORT_IN_RESET\n")); 2407f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2408f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2409f5860992SSakthivel K break; 2410f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 2411f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2412f5860992SSakthivel K pm8001_printk("IO_DS_NON_OPERATIONAL\n")); 2413f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2414f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2415f5860992SSakthivel K if (!t->uldd_task) { 2416f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2417f5860992SSakthivel K IO_DS_NON_OPERATIONAL); 2418f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2419f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 24202b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2421f5860992SSakthivel K return; 2422f5860992SSakthivel K } 2423f5860992SSakthivel K break; 2424f5860992SSakthivel K case IO_DS_IN_RECOVERY: 2425f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2426f5860992SSakthivel K pm8001_printk("IO_DS_IN_RECOVERY\n")); 2427f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2428f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2429f5860992SSakthivel K break; 2430f5860992SSakthivel K case IO_DS_IN_ERROR: 2431f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2432f5860992SSakthivel K pm8001_printk("IO_DS_IN_ERROR\n")); 2433f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2434f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2435f5860992SSakthivel K if (!t->uldd_task) { 2436f5860992SSakthivel K pm8001_handle_event(pm8001_ha, pm8001_dev, 2437f5860992SSakthivel K IO_DS_IN_ERROR); 2438f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2439f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 24402b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2441f5860992SSakthivel K return; 2442f5860992SSakthivel K } 2443f5860992SSakthivel K break; 2444f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 2445f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2446f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n")); 2447f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2448f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2449f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 245050acde8eSJohannes Thumshirn break; 2451f5860992SSakthivel K default: 24527370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 2453f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", status)); 2454f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2455f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2456f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2457f5860992SSakthivel K break; 2458f5860992SSakthivel K } 2459f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2460f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2461f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2462f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2463f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2464f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2465f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2466f5860992SSakthivel K pm8001_printk("task 0x%p done with io_status 0x%x" 2467f5860992SSakthivel K " resp 0x%x stat 0x%x but aborted by upper layer!\n", 2468f5860992SSakthivel K t, status, ts->resp, ts->stat)); 2469ce21c63eSpeter chang if (t->slow_task) 2470ce21c63eSpeter chang complete(&t->slow_task->completion); 2471f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 24722b01d816SSuresh Thiagarajan } else { 2473f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 24742b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2475f5860992SSakthivel K } 2476f5860992SSakthivel K } 2477f5860992SSakthivel K 2478f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2479f5860992SSakthivel K static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 2480f5860992SSakthivel K { 2481f5860992SSakthivel K struct sas_task *t; 2482f5860992SSakthivel K struct task_status_struct *ts; 2483f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2484f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2485f5860992SSakthivel K struct sata_event_resp *psataPayload = 2486f5860992SSakthivel K (struct sata_event_resp *)(piomb + 4); 2487f5860992SSakthivel K u32 event = le32_to_cpu(psataPayload->event); 2488f5860992SSakthivel K u32 tag = le32_to_cpu(psataPayload->tag); 2489f5860992SSakthivel K u32 port_id = le32_to_cpu(psataPayload->port_id); 2490c6b9ef57SSakthivel K u32 dev_id = le32_to_cpu(psataPayload->device_id); 2491c6b9ef57SSakthivel K unsigned long flags; 2492f5860992SSakthivel K 2493f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2494c6b9ef57SSakthivel K 2495c6b9ef57SSakthivel K if (ccb) { 2496f5860992SSakthivel K t = ccb->task; 2497f5860992SSakthivel K pm8001_dev = ccb->device; 2498c6b9ef57SSakthivel K } else { 2499c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2500c6b9ef57SSakthivel K pm8001_printk("No CCB !!!. returning\n")); 2501c6b9ef57SSakthivel K return; 2502c6b9ef57SSakthivel K } 2503f5860992SSakthivel K if (event) 2504f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2505c6b9ef57SSakthivel K pm8001_printk("SATA EVENT 0x%x\n", event)); 2506c6b9ef57SSakthivel K 2507c6b9ef57SSakthivel K /* Check if this is NCQ error */ 2508c6b9ef57SSakthivel K if (event == IO_XFER_ERROR_ABORTED_NCQ_MODE) { 2509c6b9ef57SSakthivel K /* find device using device id */ 2510c6b9ef57SSakthivel K pm8001_dev = pm8001_find_dev(pm8001_ha, dev_id); 2511c6b9ef57SSakthivel K /* send read log extension */ 2512c6b9ef57SSakthivel K if (pm8001_dev) 2513c6b9ef57SSakthivel K pm80xx_send_read_log(pm8001_ha, pm8001_dev); 2514f5860992SSakthivel K return; 2515c6b9ef57SSakthivel K } 2516c6b9ef57SSakthivel K 2517c6b9ef57SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) { 2518c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2519c6b9ef57SSakthivel K pm8001_printk("task or dev null\n")); 2520c6b9ef57SSakthivel K return; 2521c6b9ef57SSakthivel K } 2522c6b9ef57SSakthivel K 2523f5860992SSakthivel K ts = &t->task_status; 25247370672dSpeter chang PM8001_IOERR_DBG(pm8001_ha, 2525f5860992SSakthivel K pm8001_printk("port_id:0x%x, tag:0x%x, event:0x%x\n", 2526f5860992SSakthivel K port_id, tag, event)); 2527f5860992SSakthivel K switch (event) { 2528f5860992SSakthivel K case IO_OVERFLOW: 2529f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n")); 2530f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2531f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2532f5860992SSakthivel K ts->residual = 0; 2533f5860992SSakthivel K if (pm8001_dev) 2534f5860992SSakthivel K pm8001_dev->running_req--; 2535f5860992SSakthivel K break; 2536f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2537f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2538f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2539f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2540f5860992SSakthivel K ts->stat = SAS_INTERRUPTED; 2541f5860992SSakthivel K break; 2542f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2543f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2544f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2545f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2546f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2547f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2548f5860992SSakthivel K break; 2549f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2550f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2551f5860992SSakthivel K "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2552f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2553f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2554f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_EPROTO; 2555f5860992SSakthivel K break; 2556f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2557f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2558f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2559f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2560f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2561f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2562f5860992SSakthivel K break; 2563f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2564f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2565f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2566f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2567f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2568f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2569f5860992SSakthivel K break; 2570f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2571a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2572a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2573a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2574a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2575a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2576a6cb3d01SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2577f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2578f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2579f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2580f5860992SSakthivel K if (!t->uldd_task) { 2581f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2582f5860992SSakthivel K pm8001_dev, 2583f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2584f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2585f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 25862b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2587f5860992SSakthivel K return; 2588f5860992SSakthivel K } 2589f5860992SSakthivel K break; 2590f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2591f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2592f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2593f5860992SSakthivel K ts->resp = SAS_TASK_UNDELIVERED; 2594f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2595f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2596f5860992SSakthivel K break; 2597f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 2598f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2599f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 2600f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2601f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2602f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2603f5860992SSakthivel K break; 2604f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 2605f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2606f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 2607f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2608f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2609f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2610f5860992SSakthivel K break; 2611f5860992SSakthivel K case IO_XFER_ERROR_NAK_RECEIVED: 2612f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2613f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_NAK_RECEIVED\n")); 2614f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2615f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2616f5860992SSakthivel K break; 2617f5860992SSakthivel K case IO_XFER_ERROR_PEER_ABORTED: 2618f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2619f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PEER_ABORTED\n")); 2620f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2621f5860992SSakthivel K ts->stat = SAS_NAK_R_ERR; 2622f5860992SSakthivel K break; 2623f5860992SSakthivel K case IO_XFER_ERROR_REJECTED_NCQ_MODE: 2624f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2625f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_REJECTED_NCQ_MODE\n")); 2626f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2627f5860992SSakthivel K ts->stat = SAS_DATA_UNDERRUN; 2628f5860992SSakthivel K break; 2629f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2630f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2631f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2632f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2633f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2634f5860992SSakthivel K break; 2635f5860992SSakthivel K case IO_XFER_ERROR_UNEXPECTED_PHASE: 2636f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2637f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_UNEXPECTED_PHASE\n")); 2638f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2639f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2640f5860992SSakthivel K break; 2641f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_OVERRUN: 2642f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2643f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_OVERRUN\n")); 2644f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2645f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2646f5860992SSakthivel K break; 2647f5860992SSakthivel K case IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED: 2648f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2649f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n")); 2650f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2651f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2652f5860992SSakthivel K break; 2653f5860992SSakthivel K case IO_XFER_ERROR_OFFSET_MISMATCH: 2654f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2655f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_OFFSET_MISMATCH\n")); 2656f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2657f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2658f5860992SSakthivel K break; 2659f5860992SSakthivel K case IO_XFER_ERROR_XFER_ZERO_DATA_LEN: 2660f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2661f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n")); 2662f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2663f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2664f5860992SSakthivel K break; 2665f5860992SSakthivel K case IO_XFER_CMD_FRAME_ISSUED: 2666f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2667f5860992SSakthivel K pm8001_printk("IO_XFER_CMD_FRAME_ISSUED\n")); 2668f5860992SSakthivel K break; 2669f5860992SSakthivel K case IO_XFER_PIO_SETUP_ERROR: 2670f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2671f5860992SSakthivel K pm8001_printk("IO_XFER_PIO_SETUP_ERROR\n")); 2672f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2673f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2674f5860992SSakthivel K break; 2675a6cb3d01SSakthivel K case IO_XFER_ERROR_INTERNAL_CRC_ERROR: 2676a6cb3d01SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2677a6cb3d01SSakthivel K pm8001_printk("IO_XFR_ERROR_INTERNAL_CRC_ERROR\n")); 2678a6cb3d01SSakthivel K /* TBC: used default set values */ 2679a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2680a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2681a6cb3d01SSakthivel K break; 2682a6cb3d01SSakthivel K case IO_XFER_DMA_ACTIVATE_TIMEOUT: 2683a6cb3d01SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2684a6cb3d01SSakthivel K pm8001_printk("IO_XFR_DMA_ACTIVATE_TIMEOUT\n")); 2685a6cb3d01SSakthivel K /* TBC: used default set values */ 2686a6cb3d01SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2687a6cb3d01SSakthivel K ts->stat = SAS_OPEN_TO; 2688a6cb3d01SSakthivel K break; 2689f5860992SSakthivel K default: 2690f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2691f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", event)); 2692f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2693f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2694f5860992SSakthivel K ts->stat = SAS_OPEN_TO; 2695f5860992SSakthivel K break; 2696f5860992SSakthivel K } 2697f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2698f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2699f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2700f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2701f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2702f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2703f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2704f5860992SSakthivel K pm8001_printk("task 0x%p done with io_status 0x%x" 2705f5860992SSakthivel K " resp 0x%x stat 0x%x but aborted by upper layer!\n", 2706f5860992SSakthivel K t, event, ts->resp, ts->stat)); 2707f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 27082b01d816SSuresh Thiagarajan } else { 2709f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 27102b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, t, ccb, tag); 2711f5860992SSakthivel K } 2712f5860992SSakthivel K } 2713f5860992SSakthivel K 2714f5860992SSakthivel K /*See the comments for mpi_ssp_completion */ 2715f5860992SSakthivel K static void 2716f5860992SSakthivel K mpi_smp_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) 2717f5860992SSakthivel K { 2718f5860992SSakthivel K u32 param, i; 2719f5860992SSakthivel K struct sas_task *t; 2720f5860992SSakthivel K struct pm8001_ccb_info *ccb; 2721f5860992SSakthivel K unsigned long flags; 2722f5860992SSakthivel K u32 status; 2723f5860992SSakthivel K u32 tag; 2724f5860992SSakthivel K struct smp_completion_resp *psmpPayload; 2725f5860992SSakthivel K struct task_status_struct *ts; 2726f5860992SSakthivel K struct pm8001_device *pm8001_dev; 2727f5860992SSakthivel K char *pdma_respaddr = NULL; 2728f5860992SSakthivel K 2729f5860992SSakthivel K psmpPayload = (struct smp_completion_resp *)(piomb + 4); 2730f5860992SSakthivel K status = le32_to_cpu(psmpPayload->status); 2731f5860992SSakthivel K tag = le32_to_cpu(psmpPayload->tag); 2732f5860992SSakthivel K 2733f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 2734f5860992SSakthivel K param = le32_to_cpu(psmpPayload->param); 2735f5860992SSakthivel K t = ccb->task; 2736f5860992SSakthivel K ts = &t->task_status; 2737f5860992SSakthivel K pm8001_dev = ccb->device; 2738f5860992SSakthivel K if (status) 2739f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 2740f5860992SSakthivel K pm8001_printk("smp IO status 0x%x\n", status)); 2741f5860992SSakthivel K if (unlikely(!t || !t->lldd_task || !t->dev)) 2742f5860992SSakthivel K return; 2743f5860992SSakthivel K 27447370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, 27457370672dSpeter chang pm8001_printk("tag::0x%x status::0x%x\n", tag, status)); 27467370672dSpeter chang 2747f5860992SSakthivel K switch (status) { 2748f5860992SSakthivel K 2749f5860992SSakthivel K case IO_SUCCESS: 2750f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_SUCCESS\n")); 2751f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2752f5860992SSakthivel K ts->stat = SAM_STAT_GOOD; 2753f5860992SSakthivel K if (pm8001_dev) 2754f5860992SSakthivel K pm8001_dev->running_req--; 2755f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 2756f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2757f5860992SSakthivel K pm8001_printk("DIRECT RESPONSE Length:%d\n", 2758f5860992SSakthivel K param)); 2759f5860992SSakthivel K pdma_respaddr = (char *)(phys_to_virt(cpu_to_le64 2760f5860992SSakthivel K ((u64)sg_dma_address 2761f5860992SSakthivel K (&t->smp_task.smp_resp)))); 2762f5860992SSakthivel K for (i = 0; i < param; i++) { 2763f5860992SSakthivel K *(pdma_respaddr+i) = psmpPayload->_r_a[i]; 2764f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 2765f5860992SSakthivel K "SMP Byte%d DMA data 0x%x psmp 0x%x\n", 2766f5860992SSakthivel K i, *(pdma_respaddr+i), 2767f5860992SSakthivel K psmpPayload->_r_a[i])); 2768f5860992SSakthivel K } 2769f5860992SSakthivel K } 2770f5860992SSakthivel K break; 2771f5860992SSakthivel K case IO_ABORTED: 2772f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2773f5860992SSakthivel K pm8001_printk("IO_ABORTED IOMB\n")); 2774f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2775f5860992SSakthivel K ts->stat = SAS_ABORTED_TASK; 2776f5860992SSakthivel K if (pm8001_dev) 2777f5860992SSakthivel K pm8001_dev->running_req--; 2778f5860992SSakthivel K break; 2779f5860992SSakthivel K case IO_OVERFLOW: 2780f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_UNDERFLOW\n")); 2781f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2782f5860992SSakthivel K ts->stat = SAS_DATA_OVERRUN; 2783f5860992SSakthivel K ts->residual = 0; 2784f5860992SSakthivel K if (pm8001_dev) 2785f5860992SSakthivel K pm8001_dev->running_req--; 2786f5860992SSakthivel K break; 2787f5860992SSakthivel K case IO_NO_DEVICE: 2788f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("IO_NO_DEVICE\n")); 2789f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2790f5860992SSakthivel K ts->stat = SAS_PHY_DOWN; 2791f5860992SSakthivel K break; 2792f5860992SSakthivel K case IO_ERROR_HW_TIMEOUT: 2793f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2794f5860992SSakthivel K pm8001_printk("IO_ERROR_HW_TIMEOUT\n")); 2795f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2796f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 2797f5860992SSakthivel K break; 2798f5860992SSakthivel K case IO_XFER_ERROR_BREAK: 2799f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2800f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_BREAK\n")); 2801f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2802f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 2803f5860992SSakthivel K break; 2804f5860992SSakthivel K case IO_XFER_ERROR_PHY_NOT_READY: 2805f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2806f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_PHY_NOT_READY\n")); 2807f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2808f5860992SSakthivel K ts->stat = SAM_STAT_BUSY; 2809f5860992SSakthivel K break; 2810f5860992SSakthivel K case IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED: 2811f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2812f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n")); 2813f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2814f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2815f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2816f5860992SSakthivel K break; 2817f5860992SSakthivel K case IO_OPEN_CNX_ERROR_ZONE_VIOLATION: 2818f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2819f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n")); 2820f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2821f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2822f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2823f5860992SSakthivel K break; 2824f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BREAK: 2825f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2826f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BREAK\n")); 2827f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2828f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2829f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; 2830f5860992SSakthivel K break; 2831f5860992SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS: 2832a6cb3d01SSakthivel K case IO_XFER_OPEN_RETRY_BACKOFF_THRESHOLD_REACHED: 2833a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_TMO: 2834a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_NO_DEST: 2835a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_OPEN_COLLIDE: 2836a6cb3d01SSakthivel K case IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS_PATHWAY_BLOCKED: 2837f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2838f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n")); 2839f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2840f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2841f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_UNKNOWN; 2842f5860992SSakthivel K pm8001_handle_event(pm8001_ha, 2843f5860992SSakthivel K pm8001_dev, 2844f5860992SSakthivel K IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS); 2845f5860992SSakthivel K break; 2846f5860992SSakthivel K case IO_OPEN_CNX_ERROR_BAD_DESTINATION: 2847f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2848f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_BAD_DESTINATION\n")); 2849f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2850f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2851f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_BAD_DEST; 2852f5860992SSakthivel K break; 2853f5860992SSakthivel K case IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED: 2854f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk(\ 2855f5860992SSakthivel K "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n")); 2856f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2857f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2858f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_CONN_RATE; 2859f5860992SSakthivel K break; 2860f5860992SSakthivel K case IO_OPEN_CNX_ERROR_WRONG_DESTINATION: 2861f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2862f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n")); 2863f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2864f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2865f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_WRONG_DEST; 2866f5860992SSakthivel K break; 2867f5860992SSakthivel K case IO_XFER_ERROR_RX_FRAME: 2868f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2869f5860992SSakthivel K pm8001_printk("IO_XFER_ERROR_RX_FRAME\n")); 2870f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2871f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2872f5860992SSakthivel K break; 2873f5860992SSakthivel K case IO_XFER_OPEN_RETRY_TIMEOUT: 2874f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2875f5860992SSakthivel K pm8001_printk("IO_XFER_OPEN_RETRY_TIMEOUT\n")); 2876f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2877f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2878f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2879f5860992SSakthivel K break; 2880f5860992SSakthivel K case IO_ERROR_INTERNAL_SMP_RESOURCE: 2881f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2882f5860992SSakthivel K pm8001_printk("IO_ERROR_INTERNAL_SMP_RESOURCE\n")); 2883f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2884f5860992SSakthivel K ts->stat = SAS_QUEUE_FULL; 2885f5860992SSakthivel K break; 2886f5860992SSakthivel K case IO_PORT_IN_RESET: 2887f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2888f5860992SSakthivel K pm8001_printk("IO_PORT_IN_RESET\n")); 2889f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2890f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2891f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2892f5860992SSakthivel K break; 2893f5860992SSakthivel K case IO_DS_NON_OPERATIONAL: 2894f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2895f5860992SSakthivel K pm8001_printk("IO_DS_NON_OPERATIONAL\n")); 2896f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2897f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2898f5860992SSakthivel K break; 2899f5860992SSakthivel K case IO_DS_IN_RECOVERY: 2900f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2901f5860992SSakthivel K pm8001_printk("IO_DS_IN_RECOVERY\n")); 2902f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2903f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2904f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2905f5860992SSakthivel K break; 2906f5860992SSakthivel K case IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY: 2907f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 2908f5860992SSakthivel K pm8001_printk("IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n")); 2909f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2910f5860992SSakthivel K ts->stat = SAS_OPEN_REJECT; 2911f5860992SSakthivel K ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; 2912f5860992SSakthivel K break; 2913f5860992SSakthivel K default: 29147370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 2915f5860992SSakthivel K pm8001_printk("Unknown status 0x%x\n", status)); 2916f5860992SSakthivel K ts->resp = SAS_TASK_COMPLETE; 2917f5860992SSakthivel K ts->stat = SAS_DEV_NO_RESPONSE; 2918f5860992SSakthivel K /* not allowed case. Therefore, return failed status */ 2919f5860992SSakthivel K break; 2920f5860992SSakthivel K } 2921f5860992SSakthivel K spin_lock_irqsave(&t->task_state_lock, flags); 2922f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_STATE_PENDING; 2923f5860992SSakthivel K t->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 2924f5860992SSakthivel K t->task_state_flags |= SAS_TASK_STATE_DONE; 2925f5860992SSakthivel K if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { 2926f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2927f5860992SSakthivel K PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 2928f5860992SSakthivel K "task 0x%p done with io_status 0x%x resp 0x%x" 2929f5860992SSakthivel K "stat 0x%x but aborted by upper layer!\n", 2930f5860992SSakthivel K t, status, ts->resp, ts->stat)); 2931f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2932f5860992SSakthivel K } else { 2933f5860992SSakthivel K spin_unlock_irqrestore(&t->task_state_lock, flags); 2934f5860992SSakthivel K pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2935f5860992SSakthivel K mb();/* in order to force CPU ordering */ 2936f5860992SSakthivel K t->task_done(t); 2937f5860992SSakthivel K } 2938f5860992SSakthivel K } 2939f5860992SSakthivel K 2940f5860992SSakthivel K /** 2941f5860992SSakthivel K * pm80xx_hw_event_ack_req- For PM8001,some events need to acknowage to FW. 2942f5860992SSakthivel K * @pm8001_ha: our hba card information 2943f5860992SSakthivel K * @Qnum: the outbound queue message number. 2944f5860992SSakthivel K * @SEA: source of event to ack 2945f5860992SSakthivel K * @port_id: port id. 2946f5860992SSakthivel K * @phyId: phy id. 2947f5860992SSakthivel K * @param0: parameter 0. 2948f5860992SSakthivel K * @param1: parameter 1. 2949f5860992SSakthivel K */ 2950f5860992SSakthivel K static void pm80xx_hw_event_ack_req(struct pm8001_hba_info *pm8001_ha, 2951f5860992SSakthivel K u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0, u32 param1) 2952f5860992SSakthivel K { 2953f5860992SSakthivel K struct hw_event_ack_req payload; 2954f5860992SSakthivel K u32 opc = OPC_INB_SAS_HW_EVENT_ACK; 2955f5860992SSakthivel K 2956f5860992SSakthivel K struct inbound_queue_table *circularQ; 2957f5860992SSakthivel K 2958f5860992SSakthivel K memset((u8 *)&payload, 0, sizeof(payload)); 2959f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[Qnum]; 2960f5860992SSakthivel K payload.tag = cpu_to_le32(1); 2961f5860992SSakthivel K payload.phyid_sea_portid = cpu_to_le32(((SEA & 0xFFFF) << 8) | 2962f5860992SSakthivel K ((phyId & 0xFF) << 24) | (port_id & 0xFF)); 2963f5860992SSakthivel K payload.param0 = cpu_to_le32(param0); 2964f5860992SSakthivel K payload.param1 = cpu_to_le32(param1); 2965f5860992SSakthivel K pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 2966f5860992SSakthivel K } 2967f5860992SSakthivel K 2968f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 2969f5860992SSakthivel K u32 phyId, u32 phy_op); 2970f5860992SSakthivel K 29718414cd80SViswas G static void hw_event_port_recover(struct pm8001_hba_info *pm8001_ha, 29728414cd80SViswas G void *piomb) 29738414cd80SViswas G { 29748414cd80SViswas G struct hw_event_resp *pPayload = (struct hw_event_resp *)(piomb + 4); 29758414cd80SViswas G u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 29768414cd80SViswas G u8 phy_id = (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 29778414cd80SViswas G u32 lr_status_evt_portid = 29788414cd80SViswas G le32_to_cpu(pPayload->lr_status_evt_portid); 29798414cd80SViswas G u8 deviceType = pPayload->sas_identify.dev_type; 29808414cd80SViswas G u8 link_rate = (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 29818414cd80SViswas G struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 29828414cd80SViswas G u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 29838414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 29848414cd80SViswas G 29858414cd80SViswas G if (deviceType == SAS_END_DEVICE) { 29868414cd80SViswas G pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 29878414cd80SViswas G PHY_NOTIFY_ENABLE_SPINUP); 29888414cd80SViswas G } 29898414cd80SViswas G 29908414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 29918414cd80SViswas G pm8001_get_lrate_mode(phy, link_rate); 29928414cd80SViswas G phy->sas_phy.oob_mode = SAS_OOB_MODE; 29938414cd80SViswas G phy->phy_state = PHY_STATE_LINK_UP_SPCV; 29948414cd80SViswas G phy->phy_attached = 1; 29958414cd80SViswas G } 29968414cd80SViswas G 2997f5860992SSakthivel K /** 2998f5860992SSakthivel K * hw_event_sas_phy_up -FW tells me a SAS phy up event. 2999f5860992SSakthivel K * @pm8001_ha: our hba card information 3000f5860992SSakthivel K * @piomb: IO message buffer 3001f5860992SSakthivel K */ 3002f5860992SSakthivel K static void 3003f5860992SSakthivel K hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3004f5860992SSakthivel K { 3005f5860992SSakthivel K struct hw_event_resp *pPayload = 3006f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3007f5860992SSakthivel K u32 lr_status_evt_portid = 3008f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3009f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3010f5860992SSakthivel K 3011f5860992SSakthivel K u8 link_rate = 3012f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3013f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3014f5860992SSakthivel K u8 phy_id = 3015f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3016f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3017f5860992SSakthivel K 3018f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3019f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3020f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3021f5860992SSakthivel K unsigned long flags; 3022f5860992SSakthivel K u8 deviceType = pPayload->sas_identify.dev_type; 3023f5860992SSakthivel K port->port_state = portstate; 30248414cd80SViswas G port->wide_port_phymap |= (1U << phy_id); 30257d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 3026f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3027f5860992SSakthivel K "portid:%d; phyid:%d; linkrate:%d; " 3028f5860992SSakthivel K "portstate:%x; devicetype:%x\n", 3029f5860992SSakthivel K port_id, phy_id, link_rate, portstate, deviceType)); 3030f5860992SSakthivel K 3031f5860992SSakthivel K switch (deviceType) { 3032f5860992SSakthivel K case SAS_PHY_UNUSED: 3033f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3034f5860992SSakthivel K pm8001_printk("device type no device.\n")); 3035f5860992SSakthivel K break; 3036f5860992SSakthivel K case SAS_END_DEVICE: 3037f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n")); 3038f5860992SSakthivel K pm80xx_chip_phy_ctl_req(pm8001_ha, phy_id, 3039f5860992SSakthivel K PHY_NOTIFY_ENABLE_SPINUP); 3040f5860992SSakthivel K port->port_attached = 1; 3041f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3042f5860992SSakthivel K break; 3043f5860992SSakthivel K case SAS_EDGE_EXPANDER_DEVICE: 3044f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3045f5860992SSakthivel K pm8001_printk("expander device.\n")); 3046f5860992SSakthivel K port->port_attached = 1; 3047f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3048f5860992SSakthivel K break; 3049f5860992SSakthivel K case SAS_FANOUT_EXPANDER_DEVICE: 3050f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3051f5860992SSakthivel K pm8001_printk("fanout expander device.\n")); 3052f5860992SSakthivel K port->port_attached = 1; 3053f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3054f5860992SSakthivel K break; 3055f5860992SSakthivel K default: 30567370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 3057f5860992SSakthivel K pm8001_printk("unknown device type(%x)\n", deviceType)); 3058f5860992SSakthivel K break; 3059f5860992SSakthivel K } 3060f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SAS; 3061f5860992SSakthivel K phy->identify.device_type = deviceType; 3062f5860992SSakthivel K phy->phy_attached = 1; 3063f5860992SSakthivel K if (phy->identify.device_type == SAS_END_DEVICE) 3064f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SSP; 3065f5860992SSakthivel K else if (phy->identify.device_type != SAS_PHY_UNUSED) 3066f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; 3067f5860992SSakthivel K phy->sas_phy.oob_mode = SAS_OOB_MODE; 3068f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); 3069f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3070f5860992SSakthivel K memcpy(phy->frame_rcvd, &pPayload->sas_identify, 3071f5860992SSakthivel K sizeof(struct sas_identify_frame)-4); 3072f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct sas_identify_frame) - 4; 3073f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3074f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3075f5860992SSakthivel K if (pm8001_ha->flags == PM8001F_RUN_TIME) 30764daf1ef3SVikram Auradkar msleep(200);/*delay a moment to wait disk to spinup*/ 3077f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3078f5860992SSakthivel K } 3079f5860992SSakthivel K 3080f5860992SSakthivel K /** 3081f5860992SSakthivel K * hw_event_sata_phy_up -FW tells me a SATA phy up event. 3082f5860992SSakthivel K * @pm8001_ha: our hba card information 3083f5860992SSakthivel K * @piomb: IO message buffer 3084f5860992SSakthivel K */ 3085f5860992SSakthivel K static void 3086f5860992SSakthivel K hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) 3087f5860992SSakthivel K { 3088f5860992SSakthivel K struct hw_event_resp *pPayload = 3089f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3090f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3091f5860992SSakthivel K u32 lr_status_evt_portid = 3092f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3093f5860992SSakthivel K u8 link_rate = 3094f5860992SSakthivel K (u8)((lr_status_evt_portid & 0xF0000000) >> 28); 3095f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3096f5860992SSakthivel K u8 phy_id = 3097f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3098f5860992SSakthivel K 3099f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3100f5860992SSakthivel K 3101f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3102f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3103f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3104f5860992SSakthivel K unsigned long flags; 31057370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk( 3106f5860992SSakthivel K "port id %d, phy id %d link_rate %d portstate 0x%x\n", 3107f5860992SSakthivel K port_id, phy_id, link_rate, portstate)); 3108f5860992SSakthivel K 3109f5860992SSakthivel K port->port_state = portstate; 31107d029005SNikith Ganigarakoppal phy->phy_state = PHY_STATE_LINK_UP_SPCV; 3111f5860992SSakthivel K port->port_attached = 1; 3112f5860992SSakthivel K pm8001_get_lrate_mode(phy, link_rate); 3113f5860992SSakthivel K phy->phy_type |= PORT_TYPE_SATA; 3114f5860992SSakthivel K phy->phy_attached = 1; 3115f5860992SSakthivel K phy->sas_phy.oob_mode = SATA_OOB_MODE; 3116f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE); 3117f5860992SSakthivel K spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); 3118f5860992SSakthivel K memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), 3119f5860992SSakthivel K sizeof(struct dev_to_host_fis)); 3120f5860992SSakthivel K phy->frame_rcvd_size = sizeof(struct dev_to_host_fis); 3121f5860992SSakthivel K phy->identify.target_port_protocols = SAS_PROTOCOL_SATA; 3122aa9f8328SJames Bottomley phy->identify.device_type = SAS_SATA_DEV; 3123f5860992SSakthivel K pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); 3124f5860992SSakthivel K spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); 3125f5860992SSakthivel K pm8001_bytes_dmaed(pm8001_ha, phy_id); 3126f5860992SSakthivel K } 3127f5860992SSakthivel K 3128f5860992SSakthivel K /** 3129f5860992SSakthivel K * hw_event_phy_down -we should notify the libsas the phy is down. 3130f5860992SSakthivel K * @pm8001_ha: our hba card information 3131f5860992SSakthivel K * @piomb: IO message buffer 3132f5860992SSakthivel K */ 3133f5860992SSakthivel K static void 3134f5860992SSakthivel K hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) 3135f5860992SSakthivel K { 3136f5860992SSakthivel K struct hw_event_resp *pPayload = 3137f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3138f5860992SSakthivel K 3139f5860992SSakthivel K u32 lr_status_evt_portid = 3140f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3141f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3142f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3143f5860992SSakthivel K u8 phy_id = 3144f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3145f5860992SSakthivel K u8 portstate = (u8)(phyid_npip_portstate & 0x0000000F); 3146f5860992SSakthivel K 3147f5860992SSakthivel K struct pm8001_port *port = &pm8001_ha->port[port_id]; 3148f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3149869ddbdcSViswas G u32 port_sata = (phy->phy_type & PORT_TYPE_SATA); 3150f5860992SSakthivel K port->port_state = portstate; 3151f5860992SSakthivel K phy->identify.device_type = 0; 3152f5860992SSakthivel K phy->phy_attached = 0; 3153f5860992SSakthivel K switch (portstate) { 3154f5860992SSakthivel K case PORT_VALID: 3155f5860992SSakthivel K break; 3156f5860992SSakthivel K case PORT_INVALID: 3157f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3158f5860992SSakthivel K pm8001_printk(" PortInvalid portID %d\n", port_id)); 3159f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3160f5860992SSakthivel K pm8001_printk(" Last phy Down and port invalid\n")); 3161869ddbdcSViswas G if (port_sata) { 31628414cd80SViswas G phy->phy_type = 0; 3163f5860992SSakthivel K port->port_attached = 0; 3164f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3165f5860992SSakthivel K port_id, phy_id, 0, 0); 31668414cd80SViswas G } 31678414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3168f5860992SSakthivel K break; 3169f5860992SSakthivel K case PORT_IN_RESET: 3170f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3171f5860992SSakthivel K pm8001_printk(" Port In Reset portID %d\n", port_id)); 3172f5860992SSakthivel K break; 3173f5860992SSakthivel K case PORT_NOT_ESTABLISHED: 3174f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 31758414cd80SViswas G pm8001_printk(" Phy Down and PORT_NOT_ESTABLISHED\n")); 3176f5860992SSakthivel K port->port_attached = 0; 3177f5860992SSakthivel K break; 3178f5860992SSakthivel K case PORT_LOSTCOMM: 3179f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 31808414cd80SViswas G pm8001_printk(" Phy Down and PORT_LOSTCOMM\n")); 3181f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3182f5860992SSakthivel K pm8001_printk(" Last phy Down and port invalid\n")); 3183869ddbdcSViswas G if (port_sata) { 3184f5860992SSakthivel K port->port_attached = 0; 31858414cd80SViswas G phy->phy_type = 0; 3186f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3187f5860992SSakthivel K port_id, phy_id, 0, 0); 31888414cd80SViswas G } 31898414cd80SViswas G sas_phy_disconnected(&phy->sas_phy); 3190f5860992SSakthivel K break; 3191f5860992SSakthivel K default: 3192f5860992SSakthivel K port->port_attached = 0; 31937370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 31948414cd80SViswas G pm8001_printk(" Phy Down and(default) = 0x%x\n", 3195f5860992SSakthivel K portstate)); 3196f5860992SSakthivel K break; 3197f5860992SSakthivel K 3198f5860992SSakthivel K } 3199869ddbdcSViswas G if (port_sata && (portstate != PORT_IN_RESET)) { 3200869ddbdcSViswas G struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3201869ddbdcSViswas G 3202869ddbdcSViswas G sas_ha->notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL); 3203869ddbdcSViswas G } 3204f5860992SSakthivel K } 3205f5860992SSakthivel K 3206f5860992SSakthivel K static int mpi_phy_start_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3207f5860992SSakthivel K { 3208f5860992SSakthivel K struct phy_start_resp *pPayload = 3209f5860992SSakthivel K (struct phy_start_resp *)(piomb + 4); 3210f5860992SSakthivel K u32 status = 3211f5860992SSakthivel K le32_to_cpu(pPayload->status); 3212f5860992SSakthivel K u32 phy_id = 3213f5860992SSakthivel K le32_to_cpu(pPayload->phyid); 3214f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 3215f5860992SSakthivel K 3216f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 3217f5860992SSakthivel K pm8001_printk("phy start resp status:0x%x, phyid:0x%x\n", 3218f5860992SSakthivel K status, phy_id)); 3219f5860992SSakthivel K if (status == 0) { 3220cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DOWN; 3221cd135754SDeepak Ukey if (pm8001_ha->flags == PM8001F_RUN_TIME && 3222e703977bSpeter chang phy->enable_completion != NULL) { 3223f5860992SSakthivel K complete(phy->enable_completion); 3224e703977bSpeter chang phy->enable_completion = NULL; 3225e703977bSpeter chang } 3226f5860992SSakthivel K } 3227f5860992SSakthivel K return 0; 3228f5860992SSakthivel K 3229f5860992SSakthivel K } 3230f5860992SSakthivel K 3231f5860992SSakthivel K /** 3232f5860992SSakthivel K * mpi_thermal_hw_event -The hw event has come. 3233f5860992SSakthivel K * @pm8001_ha: our hba card information 3234f5860992SSakthivel K * @piomb: IO message buffer 3235f5860992SSakthivel K */ 3236f5860992SSakthivel K static int mpi_thermal_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3237f5860992SSakthivel K { 3238f5860992SSakthivel K struct thermal_hw_event *pPayload = 3239f5860992SSakthivel K (struct thermal_hw_event *)(piomb + 4); 3240f5860992SSakthivel K 3241f5860992SSakthivel K u32 thermal_event = le32_to_cpu(pPayload->thermal_event); 3242f5860992SSakthivel K u32 rht_lht = le32_to_cpu(pPayload->rht_lht); 3243f5860992SSakthivel K 3244f5860992SSakthivel K if (thermal_event & 0x40) { 3245f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3246f5860992SSakthivel K "Thermal Event: Local high temperature violated!\n")); 3247f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3248f5860992SSakthivel K "Thermal Event: Measured local high temperature %d\n", 3249f5860992SSakthivel K ((rht_lht & 0xFF00) >> 8))); 3250f5860992SSakthivel K } 3251f5860992SSakthivel K if (thermal_event & 0x10) { 3252f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3253f5860992SSakthivel K "Thermal Event: Remote high temperature violated!\n")); 3254f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 3255f5860992SSakthivel K "Thermal Event: Measured remote high temperature %d\n", 3256f5860992SSakthivel K ((rht_lht & 0xFF000000) >> 24))); 3257f5860992SSakthivel K } 3258f5860992SSakthivel K return 0; 3259f5860992SSakthivel K } 3260f5860992SSakthivel K 3261f5860992SSakthivel K /** 3262f5860992SSakthivel K * mpi_hw_event -The hw event has come. 3263f5860992SSakthivel K * @pm8001_ha: our hba card information 3264f5860992SSakthivel K * @piomb: IO message buffer 3265f5860992SSakthivel K */ 3266f5860992SSakthivel K static int mpi_hw_event(struct pm8001_hba_info *pm8001_ha, void *piomb) 3267f5860992SSakthivel K { 32688414cd80SViswas G unsigned long flags, i; 3269f5860992SSakthivel K struct hw_event_resp *pPayload = 3270f5860992SSakthivel K (struct hw_event_resp *)(piomb + 4); 3271f5860992SSakthivel K u32 lr_status_evt_portid = 3272f5860992SSakthivel K le32_to_cpu(pPayload->lr_status_evt_portid); 3273f5860992SSakthivel K u32 phyid_npip_portstate = le32_to_cpu(pPayload->phyid_npip_portstate); 3274f5860992SSakthivel K u8 port_id = (u8)(lr_status_evt_portid & 0x000000FF); 3275f5860992SSakthivel K u8 phy_id = 3276f5860992SSakthivel K (u8)((phyid_npip_portstate & 0xFF0000) >> 16); 3277f5860992SSakthivel K u16 eventType = 3278f5860992SSakthivel K (u16)((lr_status_evt_portid & 0x00FFFF00) >> 8); 3279f5860992SSakthivel K u8 status = 3280f5860992SSakthivel K (u8)((lr_status_evt_portid & 0x0F000000) >> 24); 3281f5860992SSakthivel K struct sas_ha_struct *sas_ha = pm8001_ha->sas; 3282f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 32838414cd80SViswas G struct pm8001_port *port = &pm8001_ha->port[port_id]; 3284f5860992SSakthivel K struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; 32857370672dSpeter chang PM8001_DEV_DBG(pm8001_ha, 3286f5860992SSakthivel K pm8001_printk("portid:%d phyid:%d event:0x%x status:0x%x\n", 3287f5860992SSakthivel K port_id, phy_id, eventType, status)); 3288f5860992SSakthivel K 3289f5860992SSakthivel K switch (eventType) { 3290f5860992SSakthivel K 3291f5860992SSakthivel K case HW_EVENT_SAS_PHY_UP: 3292f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3293f5860992SSakthivel K pm8001_printk("HW_EVENT_PHY_START_STATUS\n")); 3294f5860992SSakthivel K hw_event_sas_phy_up(pm8001_ha, piomb); 3295f5860992SSakthivel K break; 3296f5860992SSakthivel K case HW_EVENT_SATA_PHY_UP: 3297f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3298f5860992SSakthivel K pm8001_printk("HW_EVENT_SATA_PHY_UP\n")); 3299f5860992SSakthivel K hw_event_sata_phy_up(pm8001_ha, piomb); 3300f5860992SSakthivel K break; 3301f5860992SSakthivel K case HW_EVENT_SATA_SPINUP_HOLD: 3302f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3303f5860992SSakthivel K pm8001_printk("HW_EVENT_SATA_SPINUP_HOLD\n")); 3304f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD); 3305f5860992SSakthivel K break; 3306f5860992SSakthivel K case HW_EVENT_PHY_DOWN: 3307f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3308f5860992SSakthivel K pm8001_printk("HW_EVENT_PHY_DOWN\n")); 3309869ddbdcSViswas G hw_event_phy_down(pm8001_ha, piomb); 3310869ddbdcSViswas G if (pm8001_ha->reset_in_progress) { 3311869ddbdcSViswas G PM8001_MSG_DBG(pm8001_ha, 3312869ddbdcSViswas G pm8001_printk("Reset in progress\n")); 3313869ddbdcSViswas G return 0; 3314869ddbdcSViswas G } 3315f5860992SSakthivel K phy->phy_attached = 0; 3316cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3317f5860992SSakthivel K break; 3318f5860992SSakthivel K case HW_EVENT_PORT_INVALID: 3319f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3320f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_INVALID\n")); 3321f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3322f5860992SSakthivel K phy->phy_attached = 0; 3323f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3324f5860992SSakthivel K break; 3325f5860992SSakthivel K /* the broadcast change primitive received, tell the LIBSAS this event 3326f5860992SSakthivel K to revalidate the sas domain*/ 3327f5860992SSakthivel K case HW_EVENT_BROADCAST_CHANGE: 3328f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3329f5860992SSakthivel K pm8001_printk("HW_EVENT_BROADCAST_CHANGE\n")); 3330f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_BROADCAST_CHANGE, 3331f5860992SSakthivel K port_id, phy_id, 1, 0); 3332f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3333f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; 3334f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3335f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3336f5860992SSakthivel K break; 3337f5860992SSakthivel K case HW_EVENT_PHY_ERROR: 3338f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3339f5860992SSakthivel K pm8001_printk("HW_EVENT_PHY_ERROR\n")); 3340f5860992SSakthivel K sas_phy_disconnected(&phy->sas_phy); 3341f5860992SSakthivel K phy->phy_attached = 0; 3342f5860992SSakthivel K sas_ha->notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR); 3343f5860992SSakthivel K break; 3344f5860992SSakthivel K case HW_EVENT_BROADCAST_EXP: 3345f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3346f5860992SSakthivel K pm8001_printk("HW_EVENT_BROADCAST_EXP\n")); 3347f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3348f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; 3349f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3350f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3351f5860992SSakthivel K break; 3352f5860992SSakthivel K case HW_EVENT_LINK_ERR_INVALID_DWORD: 3353f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3354f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_INVALID_DWORD\n")); 3355f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3356f5860992SSakthivel K HW_EVENT_LINK_ERR_INVALID_DWORD, port_id, phy_id, 0, 0); 3357f5860992SSakthivel K break; 3358f5860992SSakthivel K case HW_EVENT_LINK_ERR_DISPARITY_ERROR: 3359f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3360f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_DISPARITY_ERROR\n")); 3361f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3362f5860992SSakthivel K HW_EVENT_LINK_ERR_DISPARITY_ERROR, 3363f5860992SSakthivel K port_id, phy_id, 0, 0); 3364f5860992SSakthivel K break; 3365f5860992SSakthivel K case HW_EVENT_LINK_ERR_CODE_VIOLATION: 3366f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3367f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_CODE_VIOLATION\n")); 3368f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3369f5860992SSakthivel K HW_EVENT_LINK_ERR_CODE_VIOLATION, 3370f5860992SSakthivel K port_id, phy_id, 0, 0); 3371f5860992SSakthivel K break; 3372f5860992SSakthivel K case HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH: 3373f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3374f5860992SSakthivel K "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n")); 3375f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3376f5860992SSakthivel K HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH, 3377f5860992SSakthivel K port_id, phy_id, 0, 0); 3378f5860992SSakthivel K break; 3379f5860992SSakthivel K case HW_EVENT_MALFUNCTION: 3380f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3381f5860992SSakthivel K pm8001_printk("HW_EVENT_MALFUNCTION\n")); 3382f5860992SSakthivel K break; 3383f5860992SSakthivel K case HW_EVENT_BROADCAST_SES: 3384f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3385f5860992SSakthivel K pm8001_printk("HW_EVENT_BROADCAST_SES\n")); 3386f5860992SSakthivel K spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); 3387f5860992SSakthivel K sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; 3388f5860992SSakthivel K spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); 3389f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_BROADCAST_RCVD); 3390f5860992SSakthivel K break; 3391f5860992SSakthivel K case HW_EVENT_INBOUND_CRC_ERROR: 3392f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3393f5860992SSakthivel K pm8001_printk("HW_EVENT_INBOUND_CRC_ERROR\n")); 3394f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3395f5860992SSakthivel K HW_EVENT_INBOUND_CRC_ERROR, 3396f5860992SSakthivel K port_id, phy_id, 0, 0); 3397f5860992SSakthivel K break; 3398f5860992SSakthivel K case HW_EVENT_HARD_RESET_RECEIVED: 3399f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3400f5860992SSakthivel K pm8001_printk("HW_EVENT_HARD_RESET_RECEIVED\n")); 3401f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_HARD_RESET); 3402f5860992SSakthivel K break; 3403f5860992SSakthivel K case HW_EVENT_ID_FRAME_TIMEOUT: 3404f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3405f5860992SSakthivel K pm8001_printk("HW_EVENT_ID_FRAME_TIMEOUT\n")); 3406f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3407f5860992SSakthivel K phy->phy_attached = 0; 3408f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3409f5860992SSakthivel K break; 3410f5860992SSakthivel K case HW_EVENT_LINK_ERR_PHY_RESET_FAILED: 3411f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3412f5860992SSakthivel K pm8001_printk("HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n")); 3413f5860992SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3414f5860992SSakthivel K HW_EVENT_LINK_ERR_PHY_RESET_FAILED, 3415f5860992SSakthivel K port_id, phy_id, 0, 0); 3416f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3417f5860992SSakthivel K phy->phy_attached = 0; 3418f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3419f5860992SSakthivel K break; 3420f5860992SSakthivel K case HW_EVENT_PORT_RESET_TIMER_TMO: 3421f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3422f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RESET_TIMER_TMO\n")); 3423869ddbdcSViswas G pm80xx_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3424869ddbdcSViswas G port_id, phy_id, 0, 0); 3425f5860992SSakthivel K sas_phy_disconnected(sas_phy); 3426f5860992SSakthivel K phy->phy_attached = 0; 3427f5860992SSakthivel K sas_ha->notify_port_event(sas_phy, PORTE_LINK_RESET_ERR); 3428869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3429869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3430869ddbdcSViswas G PORT_RESET_TMO; 3431869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3432869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3433869ddbdcSViswas G } 3434f5860992SSakthivel K break; 3435f5860992SSakthivel K case HW_EVENT_PORT_RECOVERY_TIMER_TMO: 3436f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3437f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RECOVERY_TIMER_TMO\n")); 3438a6cb3d01SSakthivel K pm80xx_hw_event_ack_req(pm8001_ha, 0, 3439a6cb3d01SSakthivel K HW_EVENT_PORT_RECOVERY_TIMER_TMO, 3440a6cb3d01SSakthivel K port_id, phy_id, 0, 0); 34418414cd80SViswas G for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 34428414cd80SViswas G if (port->wide_port_phymap & (1 << i)) { 34438414cd80SViswas G phy = &pm8001_ha->phy[i]; 34448414cd80SViswas G sas_ha->notify_phy_event(&phy->sas_phy, 34458414cd80SViswas G PHYE_LOSS_OF_SIGNAL); 34468414cd80SViswas G port->wide_port_phymap &= ~(1 << i); 34478414cd80SViswas G } 34488414cd80SViswas G } 3449f5860992SSakthivel K break; 3450f5860992SSakthivel K case HW_EVENT_PORT_RECOVER: 3451f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3452f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RECOVER\n")); 34538414cd80SViswas G hw_event_port_recover(pm8001_ha, piomb); 3454f5860992SSakthivel K break; 3455f5860992SSakthivel K case HW_EVENT_PORT_RESET_COMPLETE: 3456f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3457f5860992SSakthivel K pm8001_printk("HW_EVENT_PORT_RESET_COMPLETE\n")); 3458869ddbdcSViswas G if (pm8001_ha->phy[phy_id].reset_completion) { 3459869ddbdcSViswas G pm8001_ha->phy[phy_id].port_reset_status = 3460869ddbdcSViswas G PORT_RESET_SUCCESS; 3461869ddbdcSViswas G complete(pm8001_ha->phy[phy_id].reset_completion); 3462869ddbdcSViswas G pm8001_ha->phy[phy_id].reset_completion = NULL; 3463869ddbdcSViswas G } 3464f5860992SSakthivel K break; 3465f5860992SSakthivel K case EVENT_BROADCAST_ASYNCH_EVENT: 3466f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3467f5860992SSakthivel K pm8001_printk("EVENT_BROADCAST_ASYNCH_EVENT\n")); 3468f5860992SSakthivel K break; 3469f5860992SSakthivel K default: 34707370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, 3471f5860992SSakthivel K pm8001_printk("Unknown event type 0x%x\n", eventType)); 3472f5860992SSakthivel K break; 3473f5860992SSakthivel K } 3474f5860992SSakthivel K return 0; 3475f5860992SSakthivel K } 3476f5860992SSakthivel K 3477f5860992SSakthivel K /** 3478f5860992SSakthivel K * mpi_phy_stop_resp - SPCv specific 3479f5860992SSakthivel K * @pm8001_ha: our hba card information 3480f5860992SSakthivel K * @piomb: IO message buffer 3481f5860992SSakthivel K */ 3482f5860992SSakthivel K static int mpi_phy_stop_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3483f5860992SSakthivel K { 3484f5860992SSakthivel K struct phy_stop_resp *pPayload = 3485f5860992SSakthivel K (struct phy_stop_resp *)(piomb + 4); 3486f5860992SSakthivel K u32 status = 3487f5860992SSakthivel K le32_to_cpu(pPayload->status); 3488f5860992SSakthivel K u32 phyid = 3489cd135754SDeepak Ukey le32_to_cpu(pPayload->phyid) & 0xFF; 3490f5860992SSakthivel K struct pm8001_phy *phy = &pm8001_ha->phy[phyid]; 3491f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3492f5860992SSakthivel K pm8001_printk("phy:0x%x status:0x%x\n", 3493f5860992SSakthivel K phyid, status)); 3494cd135754SDeepak Ukey if (status == PHY_STOP_SUCCESS || 3495cd135754SDeepak Ukey status == PHY_STOP_ERR_DEVICE_ATTACHED) 3496cd135754SDeepak Ukey phy->phy_state = PHY_LINK_DISABLE; 3497f5860992SSakthivel K return 0; 3498f5860992SSakthivel K } 3499f5860992SSakthivel K 3500f5860992SSakthivel K /** 3501f5860992SSakthivel K * mpi_set_controller_config_resp - SPCv specific 3502f5860992SSakthivel K * @pm8001_ha: our hba card information 3503f5860992SSakthivel K * @piomb: IO message buffer 3504f5860992SSakthivel K */ 3505f5860992SSakthivel K static int mpi_set_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3506f5860992SSakthivel K void *piomb) 3507f5860992SSakthivel K { 3508f5860992SSakthivel K struct set_ctrl_cfg_resp *pPayload = 3509f5860992SSakthivel K (struct set_ctrl_cfg_resp *)(piomb + 4); 3510f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3511f5860992SSakthivel K u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd); 3512f5860992SSakthivel K 3513f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3514f5860992SSakthivel K "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n", 3515f5860992SSakthivel K status, err_qlfr_pgcd)); 3516f5860992SSakthivel K 3517f5860992SSakthivel K return 0; 3518f5860992SSakthivel K } 3519f5860992SSakthivel K 3520f5860992SSakthivel K /** 3521f5860992SSakthivel K * mpi_get_controller_config_resp - SPCv specific 3522f5860992SSakthivel K * @pm8001_ha: our hba card information 3523f5860992SSakthivel K * @piomb: IO message buffer 3524f5860992SSakthivel K */ 3525f5860992SSakthivel K static int mpi_get_controller_config_resp(struct pm8001_hba_info *pm8001_ha, 3526f5860992SSakthivel K void *piomb) 3527f5860992SSakthivel K { 3528f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3529f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3530f5860992SSakthivel K 3531f5860992SSakthivel K return 0; 3532f5860992SSakthivel K } 3533f5860992SSakthivel K 3534f5860992SSakthivel K /** 3535f5860992SSakthivel K * mpi_get_phy_profile_resp - SPCv specific 3536f5860992SSakthivel K * @pm8001_ha: our hba card information 3537f5860992SSakthivel K * @piomb: IO message buffer 3538f5860992SSakthivel K */ 3539f5860992SSakthivel K static int mpi_get_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3540f5860992SSakthivel K void *piomb) 3541f5860992SSakthivel K { 3542f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3543f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3544f5860992SSakthivel K 3545f5860992SSakthivel K return 0; 3546f5860992SSakthivel K } 3547f5860992SSakthivel K 3548f5860992SSakthivel K /** 3549f5860992SSakthivel K * mpi_flash_op_ext_resp - SPCv specific 3550f5860992SSakthivel K * @pm8001_ha: our hba card information 3551f5860992SSakthivel K * @piomb: IO message buffer 3552f5860992SSakthivel K */ 3553f5860992SSakthivel K static int mpi_flash_op_ext_resp(struct pm8001_hba_info *pm8001_ha, void *piomb) 3554f5860992SSakthivel K { 3555f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3556f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3557f5860992SSakthivel K 3558f5860992SSakthivel K return 0; 3559f5860992SSakthivel K } 3560f5860992SSakthivel K 3561f5860992SSakthivel K /** 3562f5860992SSakthivel K * mpi_set_phy_profile_resp - SPCv specific 3563f5860992SSakthivel K * @pm8001_ha: our hba card information 3564f5860992SSakthivel K * @piomb: IO message buffer 3565f5860992SSakthivel K */ 3566f5860992SSakthivel K static int mpi_set_phy_profile_resp(struct pm8001_hba_info *pm8001_ha, 3567f5860992SSakthivel K void *piomb) 3568f5860992SSakthivel K { 356927909407SAnand Kumar Santhanam u8 page_code; 357027909407SAnand Kumar Santhanam struct set_phy_profile_resp *pPayload = 357127909407SAnand Kumar Santhanam (struct set_phy_profile_resp *)(piomb + 4); 357227909407SAnand Kumar Santhanam u32 ppc_phyid = le32_to_cpu(pPayload->ppc_phyid); 357327909407SAnand Kumar Santhanam u32 status = le32_to_cpu(pPayload->status); 3574f5860992SSakthivel K 357527909407SAnand Kumar Santhanam page_code = (u8)((ppc_phyid & 0xFF00) >> 8); 357627909407SAnand Kumar Santhanam if (status) { 357727909407SAnand Kumar Santhanam /* status is FAILED */ 357827909407SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 357927909407SAnand Kumar Santhanam pm8001_printk("PhyProfile command failed with status " 358027909407SAnand Kumar Santhanam "0x%08X \n", status)); 358127909407SAnand Kumar Santhanam return -1; 358227909407SAnand Kumar Santhanam } else { 358327909407SAnand Kumar Santhanam if (page_code != SAS_PHY_ANALOG_SETTINGS_PAGE) { 358427909407SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 358527909407SAnand Kumar Santhanam pm8001_printk("Invalid page code 0x%X\n", 358627909407SAnand Kumar Santhanam page_code)); 358727909407SAnand Kumar Santhanam return -1; 358827909407SAnand Kumar Santhanam } 358927909407SAnand Kumar Santhanam } 3590f5860992SSakthivel K return 0; 3591f5860992SSakthivel K } 3592f5860992SSakthivel K 3593f5860992SSakthivel K /** 3594f5860992SSakthivel K * mpi_kek_management_resp - SPCv specific 3595f5860992SSakthivel K * @pm8001_ha: our hba card information 3596f5860992SSakthivel K * @piomb: IO message buffer 3597f5860992SSakthivel K */ 3598f5860992SSakthivel K static int mpi_kek_management_resp(struct pm8001_hba_info *pm8001_ha, 3599f5860992SSakthivel K void *piomb) 3600f5860992SSakthivel K { 3601f5860992SSakthivel K struct kek_mgmt_resp *pPayload = (struct kek_mgmt_resp *)(piomb + 4); 3602f5860992SSakthivel K 3603f5860992SSakthivel K u32 status = le32_to_cpu(pPayload->status); 3604f5860992SSakthivel K u32 kidx_new_curr_ksop = le32_to_cpu(pPayload->kidx_new_curr_ksop); 3605f5860992SSakthivel K u32 err_qlfr = le32_to_cpu(pPayload->err_qlfr); 3606f5860992SSakthivel K 3607f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3608f5860992SSakthivel K "KEK MGMT RESP. Status 0x%x idx_ksop 0x%x err_qlfr 0x%x\n", 3609f5860992SSakthivel K status, kidx_new_curr_ksop, err_qlfr)); 3610f5860992SSakthivel K 3611f5860992SSakthivel K return 0; 3612f5860992SSakthivel K } 3613f5860992SSakthivel K 3614f5860992SSakthivel K /** 3615f5860992SSakthivel K * mpi_dek_management_resp - SPCv specific 3616f5860992SSakthivel K * @pm8001_ha: our hba card information 3617f5860992SSakthivel K * @piomb: IO message buffer 3618f5860992SSakthivel K */ 3619f5860992SSakthivel K static int mpi_dek_management_resp(struct pm8001_hba_info *pm8001_ha, 3620f5860992SSakthivel K void *piomb) 3621f5860992SSakthivel K { 3622f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3623f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3624f5860992SSakthivel K 3625f5860992SSakthivel K return 0; 3626f5860992SSakthivel K } 3627f5860992SSakthivel K 3628f5860992SSakthivel K /** 3629f5860992SSakthivel K * ssp_coalesced_comp_resp - SPCv specific 3630f5860992SSakthivel K * @pm8001_ha: our hba card information 3631f5860992SSakthivel K * @piomb: IO message buffer 3632f5860992SSakthivel K */ 3633f5860992SSakthivel K static int ssp_coalesced_comp_resp(struct pm8001_hba_info *pm8001_ha, 3634f5860992SSakthivel K void *piomb) 3635f5860992SSakthivel K { 3636f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3637f5860992SSakthivel K pm8001_printk(" pm80xx_addition_functionality\n")); 3638f5860992SSakthivel K 3639f5860992SSakthivel K return 0; 3640f5860992SSakthivel K } 3641f5860992SSakthivel K 3642f5860992SSakthivel K /** 3643f5860992SSakthivel K * process_one_iomb - process one outbound Queue memory block 3644f5860992SSakthivel K * @pm8001_ha: our hba card information 3645f5860992SSakthivel K * @piomb: IO message buffer 3646f5860992SSakthivel K */ 3647f5860992SSakthivel K static void process_one_iomb(struct pm8001_hba_info *pm8001_ha, void *piomb) 3648f5860992SSakthivel K { 3649f5860992SSakthivel K __le32 pHeader = *(__le32 *)piomb; 3650f5860992SSakthivel K u32 opc = (u32)((le32_to_cpu(pHeader)) & 0xFFF); 3651f5860992SSakthivel K 3652f5860992SSakthivel K switch (opc) { 3653f5860992SSakthivel K case OPC_OUB_ECHO: 3654f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk("OPC_OUB_ECHO\n")); 3655f5860992SSakthivel K break; 3656f5860992SSakthivel K case OPC_OUB_HW_EVENT: 3657f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3658f5860992SSakthivel K pm8001_printk("OPC_OUB_HW_EVENT\n")); 3659f5860992SSakthivel K mpi_hw_event(pm8001_ha, piomb); 3660f5860992SSakthivel K break; 3661f5860992SSakthivel K case OPC_OUB_THERM_HW_EVENT: 3662f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3663f5860992SSakthivel K pm8001_printk("OPC_OUB_THERMAL_EVENT\n")); 3664f5860992SSakthivel K mpi_thermal_hw_event(pm8001_ha, piomb); 3665f5860992SSakthivel K break; 3666f5860992SSakthivel K case OPC_OUB_SSP_COMP: 3667f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3668f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_COMP\n")); 3669f5860992SSakthivel K mpi_ssp_completion(pm8001_ha, piomb); 3670f5860992SSakthivel K break; 3671f5860992SSakthivel K case OPC_OUB_SMP_COMP: 3672f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3673f5860992SSakthivel K pm8001_printk("OPC_OUB_SMP_COMP\n")); 3674f5860992SSakthivel K mpi_smp_completion(pm8001_ha, piomb); 3675f5860992SSakthivel K break; 3676f5860992SSakthivel K case OPC_OUB_LOCAL_PHY_CNTRL: 3677f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3678f5860992SSakthivel K pm8001_printk("OPC_OUB_LOCAL_PHY_CNTRL\n")); 3679f5860992SSakthivel K pm8001_mpi_local_phy_ctl(pm8001_ha, piomb); 3680f5860992SSakthivel K break; 3681f5860992SSakthivel K case OPC_OUB_DEV_REGIST: 3682f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3683f5860992SSakthivel K pm8001_printk("OPC_OUB_DEV_REGIST\n")); 3684f5860992SSakthivel K pm8001_mpi_reg_resp(pm8001_ha, piomb); 3685f5860992SSakthivel K break; 3686f5860992SSakthivel K case OPC_OUB_DEREG_DEV: 3687f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 36888b513d0cSMasanari Iida pm8001_printk("unregister the device\n")); 3689f5860992SSakthivel K pm8001_mpi_dereg_resp(pm8001_ha, piomb); 3690f5860992SSakthivel K break; 3691f5860992SSakthivel K case OPC_OUB_GET_DEV_HANDLE: 3692f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3693f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_DEV_HANDLE\n")); 3694f5860992SSakthivel K break; 3695f5860992SSakthivel K case OPC_OUB_SATA_COMP: 3696f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3697f5860992SSakthivel K pm8001_printk("OPC_OUB_SATA_COMP\n")); 3698f5860992SSakthivel K mpi_sata_completion(pm8001_ha, piomb); 3699f5860992SSakthivel K break; 3700f5860992SSakthivel K case OPC_OUB_SATA_EVENT: 3701f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3702f5860992SSakthivel K pm8001_printk("OPC_OUB_SATA_EVENT\n")); 3703f5860992SSakthivel K mpi_sata_event(pm8001_ha, piomb); 3704f5860992SSakthivel K break; 3705f5860992SSakthivel K case OPC_OUB_SSP_EVENT: 3706f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3707f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_EVENT\n")); 3708f5860992SSakthivel K mpi_ssp_event(pm8001_ha, piomb); 3709f5860992SSakthivel K break; 3710f5860992SSakthivel K case OPC_OUB_DEV_HANDLE_ARRIV: 3711f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3712f5860992SSakthivel K pm8001_printk("OPC_OUB_DEV_HANDLE_ARRIV\n")); 3713f5860992SSakthivel K /*This is for target*/ 3714f5860992SSakthivel K break; 3715f5860992SSakthivel K case OPC_OUB_SSP_RECV_EVENT: 3716f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3717f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_RECV_EVENT\n")); 3718f5860992SSakthivel K /*This is for target*/ 3719f5860992SSakthivel K break; 3720f5860992SSakthivel K case OPC_OUB_FW_FLASH_UPDATE: 3721f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3722f5860992SSakthivel K pm8001_printk("OPC_OUB_FW_FLASH_UPDATE\n")); 3723f5860992SSakthivel K pm8001_mpi_fw_flash_update_resp(pm8001_ha, piomb); 3724f5860992SSakthivel K break; 3725f5860992SSakthivel K case OPC_OUB_GPIO_RESPONSE: 3726f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3727f5860992SSakthivel K pm8001_printk("OPC_OUB_GPIO_RESPONSE\n")); 3728f5860992SSakthivel K break; 3729f5860992SSakthivel K case OPC_OUB_GPIO_EVENT: 3730f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3731f5860992SSakthivel K pm8001_printk("OPC_OUB_GPIO_EVENT\n")); 3732f5860992SSakthivel K break; 3733f5860992SSakthivel K case OPC_OUB_GENERAL_EVENT: 3734f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3735f5860992SSakthivel K pm8001_printk("OPC_OUB_GENERAL_EVENT\n")); 3736f5860992SSakthivel K pm8001_mpi_general_event(pm8001_ha, piomb); 3737f5860992SSakthivel K break; 3738f5860992SSakthivel K case OPC_OUB_SSP_ABORT_RSP: 3739f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3740f5860992SSakthivel K pm8001_printk("OPC_OUB_SSP_ABORT_RSP\n")); 3741f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3742f5860992SSakthivel K break; 3743f5860992SSakthivel K case OPC_OUB_SATA_ABORT_RSP: 3744f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3745f5860992SSakthivel K pm8001_printk("OPC_OUB_SATA_ABORT_RSP\n")); 3746f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3747f5860992SSakthivel K break; 3748f5860992SSakthivel K case OPC_OUB_SAS_DIAG_MODE_START_END: 3749f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3750f5860992SSakthivel K pm8001_printk("OPC_OUB_SAS_DIAG_MODE_START_END\n")); 3751f5860992SSakthivel K break; 3752f5860992SSakthivel K case OPC_OUB_SAS_DIAG_EXECUTE: 3753f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3754f5860992SSakthivel K pm8001_printk("OPC_OUB_SAS_DIAG_EXECUTE\n")); 3755f5860992SSakthivel K break; 3756f5860992SSakthivel K case OPC_OUB_GET_TIME_STAMP: 3757f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3758f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_TIME_STAMP\n")); 3759f5860992SSakthivel K break; 3760f5860992SSakthivel K case OPC_OUB_SAS_HW_EVENT_ACK: 3761f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3762f5860992SSakthivel K pm8001_printk("OPC_OUB_SAS_HW_EVENT_ACK\n")); 3763f5860992SSakthivel K break; 3764f5860992SSakthivel K case OPC_OUB_PORT_CONTROL: 3765f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3766f5860992SSakthivel K pm8001_printk("OPC_OUB_PORT_CONTROL\n")); 3767f5860992SSakthivel K break; 3768f5860992SSakthivel K case OPC_OUB_SMP_ABORT_RSP: 3769f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3770f5860992SSakthivel K pm8001_printk("OPC_OUB_SMP_ABORT_RSP\n")); 3771f5860992SSakthivel K pm8001_mpi_task_abort_resp(pm8001_ha, piomb); 3772f5860992SSakthivel K break; 3773f5860992SSakthivel K case OPC_OUB_GET_NVMD_DATA: 3774f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3775f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_NVMD_DATA\n")); 3776f5860992SSakthivel K pm8001_mpi_get_nvmd_resp(pm8001_ha, piomb); 3777f5860992SSakthivel K break; 3778f5860992SSakthivel K case OPC_OUB_SET_NVMD_DATA: 3779f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3780f5860992SSakthivel K pm8001_printk("OPC_OUB_SET_NVMD_DATA\n")); 3781f5860992SSakthivel K pm8001_mpi_set_nvmd_resp(pm8001_ha, piomb); 3782f5860992SSakthivel K break; 3783f5860992SSakthivel K case OPC_OUB_DEVICE_HANDLE_REMOVAL: 3784f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3785f5860992SSakthivel K pm8001_printk("OPC_OUB_DEVICE_HANDLE_REMOVAL\n")); 3786f5860992SSakthivel K break; 3787f5860992SSakthivel K case OPC_OUB_SET_DEVICE_STATE: 3788f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3789f5860992SSakthivel K pm8001_printk("OPC_OUB_SET_DEVICE_STATE\n")); 3790f5860992SSakthivel K pm8001_mpi_set_dev_state_resp(pm8001_ha, piomb); 3791f5860992SSakthivel K break; 3792f5860992SSakthivel K case OPC_OUB_GET_DEVICE_STATE: 3793f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3794f5860992SSakthivel K pm8001_printk("OPC_OUB_GET_DEVICE_STATE\n")); 3795f5860992SSakthivel K break; 3796f5860992SSakthivel K case OPC_OUB_SET_DEV_INFO: 3797f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, 3798f5860992SSakthivel K pm8001_printk("OPC_OUB_SET_DEV_INFO\n")); 3799f5860992SSakthivel K break; 3800f5860992SSakthivel K /* spcv specifc commands */ 3801f5860992SSakthivel K case OPC_OUB_PHY_START_RESP: 3802f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3803f5860992SSakthivel K "OPC_OUB_PHY_START_RESP opcode:%x\n", opc)); 3804f5860992SSakthivel K mpi_phy_start_resp(pm8001_ha, piomb); 3805f5860992SSakthivel K break; 3806f5860992SSakthivel K case OPC_OUB_PHY_STOP_RESP: 3807f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3808f5860992SSakthivel K "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc)); 3809f5860992SSakthivel K mpi_phy_stop_resp(pm8001_ha, piomb); 3810f5860992SSakthivel K break; 3811f5860992SSakthivel K case OPC_OUB_SET_CONTROLLER_CONFIG: 3812f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3813f5860992SSakthivel K "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc)); 3814f5860992SSakthivel K mpi_set_controller_config_resp(pm8001_ha, piomb); 3815f5860992SSakthivel K break; 3816f5860992SSakthivel K case OPC_OUB_GET_CONTROLLER_CONFIG: 3817f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3818f5860992SSakthivel K "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc)); 3819f5860992SSakthivel K mpi_get_controller_config_resp(pm8001_ha, piomb); 3820f5860992SSakthivel K break; 3821f5860992SSakthivel K case OPC_OUB_GET_PHY_PROFILE: 3822f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3823f5860992SSakthivel K "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc)); 3824f5860992SSakthivel K mpi_get_phy_profile_resp(pm8001_ha, piomb); 3825f5860992SSakthivel K break; 3826f5860992SSakthivel K case OPC_OUB_FLASH_OP_EXT: 3827f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3828f5860992SSakthivel K "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc)); 3829f5860992SSakthivel K mpi_flash_op_ext_resp(pm8001_ha, piomb); 3830f5860992SSakthivel K break; 3831f5860992SSakthivel K case OPC_OUB_SET_PHY_PROFILE: 3832f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3833f5860992SSakthivel K "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc)); 3834f5860992SSakthivel K mpi_set_phy_profile_resp(pm8001_ha, piomb); 3835f5860992SSakthivel K break; 3836f5860992SSakthivel K case OPC_OUB_KEK_MANAGEMENT_RESP: 3837f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3838f5860992SSakthivel K "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc)); 3839f5860992SSakthivel K mpi_kek_management_resp(pm8001_ha, piomb); 3840f5860992SSakthivel K break; 3841f5860992SSakthivel K case OPC_OUB_DEK_MANAGEMENT_RESP: 3842f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3843f5860992SSakthivel K "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc)); 3844f5860992SSakthivel K mpi_dek_management_resp(pm8001_ha, piomb); 3845f5860992SSakthivel K break; 3846f5860992SSakthivel K case OPC_OUB_SSP_COALESCED_COMP_RESP: 3847f5860992SSakthivel K PM8001_MSG_DBG(pm8001_ha, pm8001_printk( 3848f5860992SSakthivel K "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc)); 3849f5860992SSakthivel K ssp_coalesced_comp_resp(pm8001_ha, piomb); 3850f5860992SSakthivel K break; 3851f5860992SSakthivel K default: 38527370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk( 3853f5860992SSakthivel K "Unknown outbound Queue IOMB OPC = 0x%x\n", opc)); 3854f5860992SSakthivel K break; 3855f5860992SSakthivel K } 3856f5860992SSakthivel K } 3857f5860992SSakthivel K 385872349b62SDeepak Ukey static void print_scratchpad_registers(struct pm8001_hba_info *pm8001_ha) 385972349b62SDeepak Ukey { 386072349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 386172349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_0: 0x%x\n", 386272349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_0))); 386372349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 386472349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_1:0x%x\n", 386572349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1))); 386672349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 386772349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_2: 0x%x\n", 386872349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_2))); 386972349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 387072349b62SDeepak Ukey pm8001_printk("MSGU_SCRATCH_PAD_3: 0x%x\n", 387172349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_3))); 387272349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 387372349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_0: 0x%x\n", 387472349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_0))); 387572349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 387672349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_1: 0x%x\n", 387772349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_1))); 387872349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 387972349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_2: 0x%x\n", 388072349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_2))); 388172349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 388272349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_3: 0x%x\n", 388372349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_3))); 388472349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 388572349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_4: 0x%x\n", 388672349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_4))); 388772349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 388872349b62SDeepak Ukey pm8001_printk("MSGU_HOST_SCRATCH_PAD_5: 0x%x\n", 388972349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_5))); 389072349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 389172349b62SDeepak Ukey pm8001_printk("MSGU_RSVD_SCRATCH_PAD_0: 0x%x\n", 389272349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_6))); 389372349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, 389472349b62SDeepak Ukey pm8001_printk("MSGU_RSVD_SCRATCH_PAD_1: 0x%x\n", 389572349b62SDeepak Ukey pm8001_cr32(pm8001_ha, 0, MSGU_HOST_SCRATCH_PAD_7))); 389672349b62SDeepak Ukey } 389772349b62SDeepak Ukey 3898f5860992SSakthivel K static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) 3899f5860992SSakthivel K { 3900f5860992SSakthivel K struct outbound_queue_table *circularQ; 3901f5860992SSakthivel K void *pMsg1 = NULL; 3902f5860992SSakthivel K u8 uninitialized_var(bc); 3903f5860992SSakthivel K u32 ret = MPI_IO_STATUS_FAIL; 3904f5860992SSakthivel K unsigned long flags; 390572349b62SDeepak Ukey u32 regval; 3906f5860992SSakthivel K 390772349b62SDeepak Ukey if (vec == (pm8001_ha->number_of_intr - 1)) { 390872349b62SDeepak Ukey regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); 390972349b62SDeepak Ukey if ((regval & SCRATCH_PAD_MIPSALL_READY) != 391072349b62SDeepak Ukey SCRATCH_PAD_MIPSALL_READY) { 391172349b62SDeepak Ukey pm8001_ha->controller_fatal_error = true; 391272349b62SDeepak Ukey PM8001_FAIL_DBG(pm8001_ha, pm8001_printk( 391372349b62SDeepak Ukey "Firmware Fatal error! Regval:0x%x\n", regval)); 391472349b62SDeepak Ukey print_scratchpad_registers(pm8001_ha); 391572349b62SDeepak Ukey return ret; 391672349b62SDeepak Ukey } 391772349b62SDeepak Ukey } 3918f5860992SSakthivel K spin_lock_irqsave(&pm8001_ha->lock, flags); 3919f5860992SSakthivel K circularQ = &pm8001_ha->outbnd_q_tbl[vec]; 3920f5860992SSakthivel K do { 392172349b62SDeepak Ukey /* spurious interrupt during setup if kexec-ing and 392272349b62SDeepak Ukey * driver doing a doorbell access w/ the pre-kexec oq 392372349b62SDeepak Ukey * interrupt setup. 392472349b62SDeepak Ukey */ 392572349b62SDeepak Ukey if (!circularQ->pi_virt) 392672349b62SDeepak Ukey break; 3927f5860992SSakthivel K ret = pm8001_mpi_msg_consume(pm8001_ha, circularQ, &pMsg1, &bc); 3928f5860992SSakthivel K if (MPI_IO_STATUS_SUCCESS == ret) { 3929f5860992SSakthivel K /* process the outbound message */ 3930f5860992SSakthivel K process_one_iomb(pm8001_ha, (void *)(pMsg1 - 4)); 3931f5860992SSakthivel K /* free the message from the outbound circular buffer */ 3932f5860992SSakthivel K pm8001_mpi_msg_free_set(pm8001_ha, pMsg1, 3933f5860992SSakthivel K circularQ, bc); 3934f5860992SSakthivel K } 3935f5860992SSakthivel K if (MPI_IO_STATUS_BUSY == ret) { 3936f5860992SSakthivel K /* Update the producer index from SPC */ 3937f5860992SSakthivel K circularQ->producer_index = 3938f5860992SSakthivel K cpu_to_le32(pm8001_read_32(circularQ->pi_virt)); 3939f5860992SSakthivel K if (le32_to_cpu(circularQ->producer_index) == 3940f5860992SSakthivel K circularQ->consumer_idx) 3941f5860992SSakthivel K /* OQ is empty */ 3942f5860992SSakthivel K break; 3943f5860992SSakthivel K } 3944f5860992SSakthivel K } while (1); 3945f5860992SSakthivel K spin_unlock_irqrestore(&pm8001_ha->lock, flags); 3946f5860992SSakthivel K return ret; 3947f5860992SSakthivel K } 3948f5860992SSakthivel K 3949f73bdebdSChristoph Hellwig /* DMA_... to our direction translation. */ 3950f5860992SSakthivel K static const u8 data_dir_flags[] = { 3951f73bdebdSChristoph Hellwig [DMA_BIDIRECTIONAL] = DATA_DIR_BYRECIPIENT, /* UNSPECIFIED */ 3952f73bdebdSChristoph Hellwig [DMA_TO_DEVICE] = DATA_DIR_OUT, /* OUTBOUND */ 3953f73bdebdSChristoph Hellwig [DMA_FROM_DEVICE] = DATA_DIR_IN, /* INBOUND */ 3954f73bdebdSChristoph Hellwig [DMA_NONE] = DATA_DIR_NONE, /* NO TRANSFER */ 3955f5860992SSakthivel K }; 3956f5860992SSakthivel K 3957f5860992SSakthivel K static void build_smp_cmd(u32 deviceID, __le32 hTag, 3958f5860992SSakthivel K struct smp_req *psmp_cmd, int mode, int length) 3959f5860992SSakthivel K { 3960f5860992SSakthivel K psmp_cmd->tag = hTag; 3961f5860992SSakthivel K psmp_cmd->device_id = cpu_to_le32(deviceID); 3962f5860992SSakthivel K if (mode == SMP_DIRECT) { 3963f5860992SSakthivel K length = length - 4; /* subtract crc */ 3964f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(length << 16); 3965f5860992SSakthivel K } else { 3966f5860992SSakthivel K psmp_cmd->len_ip_ir = cpu_to_le32(1|(1 << 1)); 3967f5860992SSakthivel K } 3968f5860992SSakthivel K } 3969f5860992SSakthivel K 3970f5860992SSakthivel K /** 3971f5860992SSakthivel K * pm8001_chip_smp_req - send a SMP task to FW 3972f5860992SSakthivel K * @pm8001_ha: our hba card information. 3973f5860992SSakthivel K * @ccb: the ccb information this request used. 3974f5860992SSakthivel K */ 3975f5860992SSakthivel K static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, 3976f5860992SSakthivel K struct pm8001_ccb_info *ccb) 3977f5860992SSakthivel K { 3978f5860992SSakthivel K int elem, rc; 3979f5860992SSakthivel K struct sas_task *task = ccb->task; 3980f5860992SSakthivel K struct domain_device *dev = task->dev; 3981f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 3982f5860992SSakthivel K struct scatterlist *sg_req, *sg_resp; 3983f5860992SSakthivel K u32 req_len, resp_len; 3984f5860992SSakthivel K struct smp_req smp_cmd; 3985f5860992SSakthivel K u32 opc; 3986f5860992SSakthivel K struct inbound_queue_table *circularQ; 3987f5860992SSakthivel K char *preq_dma_addr = NULL; 3988f5860992SSakthivel K __le64 tmp_addr; 3989f5860992SSakthivel K u32 i, length; 3990f5860992SSakthivel K 3991f5860992SSakthivel K memset(&smp_cmd, 0, sizeof(smp_cmd)); 3992f5860992SSakthivel K /* 3993f5860992SSakthivel K * DMA-map SMP request, response buffers 3994f5860992SSakthivel K */ 3995f5860992SSakthivel K sg_req = &task->smp_task.smp_req; 3996f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE); 3997f5860992SSakthivel K if (!elem) 3998f5860992SSakthivel K return -ENOMEM; 3999f5860992SSakthivel K req_len = sg_dma_len(sg_req); 4000f5860992SSakthivel K 4001f5860992SSakthivel K sg_resp = &task->smp_task.smp_resp; 4002f73bdebdSChristoph Hellwig elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE); 4003f5860992SSakthivel K if (!elem) { 4004f5860992SSakthivel K rc = -ENOMEM; 4005f5860992SSakthivel K goto err_out; 4006f5860992SSakthivel K } 4007f5860992SSakthivel K resp_len = sg_dma_len(sg_resp); 4008f5860992SSakthivel K /* must be in dwords */ 4009f5860992SSakthivel K if ((req_len & 0x3) || (resp_len & 0x3)) { 4010f5860992SSakthivel K rc = -EINVAL; 4011f5860992SSakthivel K goto err_out_2; 4012f5860992SSakthivel K } 4013f5860992SSakthivel K 4014f5860992SSakthivel K opc = OPC_INB_SMP_REQUEST; 4015f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4016f5860992SSakthivel K smp_cmd.tag = cpu_to_le32(ccb->ccb_tag); 4017f5860992SSakthivel K 4018f5860992SSakthivel K length = sg_req->length; 4019f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 4020f5860992SSakthivel K pm8001_printk("SMP Frame Length %d\n", sg_req->length)); 4021f5860992SSakthivel K if (!(length - 8)) 4022f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_DIRECT; 4023f5860992SSakthivel K else 4024f5860992SSakthivel K pm8001_ha->smp_exp_mode = SMP_INDIRECT; 4025f5860992SSakthivel K 4026f5860992SSakthivel K 4027f5860992SSakthivel K tmp_addr = cpu_to_le64((u64)sg_dma_address(&task->smp_task.smp_req)); 4028f5860992SSakthivel K preq_dma_addr = (char *)phys_to_virt(tmp_addr); 4029f5860992SSakthivel K 4030f5860992SSakthivel K /* INDIRECT MODE command settings. Use DMA */ 4031f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_INDIRECT) { 4032f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 4033f5860992SSakthivel K pm8001_printk("SMP REQUEST INDIRECT MODE\n")); 4034f5860992SSakthivel K /* for SPCv indirect mode. Place the top 4 bytes of 4035f5860992SSakthivel K * SMP Request header here. */ 4036f5860992SSakthivel K for (i = 0; i < 4; i++) 4037f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr + i); 4038f5860992SSakthivel K /* exclude top 4 bytes for SMP req header */ 4039f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4040f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4041cb993e5dSAnand Kumar Santhanam (&task->smp_task.smp_req) + 4); 4042f5860992SSakthivel K /* exclude 4 bytes for SMP req header and CRC */ 4043f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4044f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-8); 4045f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4046f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4047f5860992SSakthivel K (&task->smp_task.smp_resp)); 4048f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4049f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len 4050f5860992SSakthivel K (&task->smp_task.smp_resp)-4); 4051f5860992SSakthivel K } else { /* DIRECT MODE */ 4052f5860992SSakthivel K smp_cmd.long_smp_req.long_req_addr = 4053f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4054f5860992SSakthivel K (&task->smp_task.smp_req)); 4055f5860992SSakthivel K smp_cmd.long_smp_req.long_req_size = 4056f5860992SSakthivel K cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-4); 4057f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_addr = 4058f5860992SSakthivel K cpu_to_le64((u64)sg_dma_address 4059f5860992SSakthivel K (&task->smp_task.smp_resp)); 4060f5860992SSakthivel K smp_cmd.long_smp_req.long_resp_size = 4061f5860992SSakthivel K cpu_to_le32 4062f5860992SSakthivel K ((u32)sg_dma_len(&task->smp_task.smp_resp)-4); 4063f5860992SSakthivel K } 4064f5860992SSakthivel K if (pm8001_ha->smp_exp_mode == SMP_DIRECT) { 4065f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, 4066f5860992SSakthivel K pm8001_printk("SMP REQUEST DIRECT MODE\n")); 4067f5860992SSakthivel K for (i = 0; i < length; i++) 4068f5860992SSakthivel K if (i < 16) { 4069f5860992SSakthivel K smp_cmd.smp_req16[i] = *(preq_dma_addr+i); 4070f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4071f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4072f5860992SSakthivel K i, smp_cmd.smp_req16[i], 4073f5860992SSakthivel K *(preq_dma_addr))); 4074f5860992SSakthivel K } else { 4075f5860992SSakthivel K smp_cmd.smp_req[i] = *(preq_dma_addr+i); 4076f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4077f5860992SSakthivel K "Byte[%d]:%x (DMA data:%x)\n", 4078f5860992SSakthivel K i, smp_cmd.smp_req[i], 4079f5860992SSakthivel K *(preq_dma_addr))); 4080f5860992SSakthivel K } 4081f5860992SSakthivel K } 4082f5860992SSakthivel K 4083f5860992SSakthivel K build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag, 4084f5860992SSakthivel K &smp_cmd, pm8001_ha->smp_exp_mode, length); 40855533abcaSTomas Henzl rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 40865533abcaSTomas Henzl (u32 *)&smp_cmd, 0); 40875533abcaSTomas Henzl if (rc) 40885533abcaSTomas Henzl goto err_out_2; 4089f5860992SSakthivel K return 0; 4090f5860992SSakthivel K 4091f5860992SSakthivel K err_out_2: 4092f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1, 4093f73bdebdSChristoph Hellwig DMA_FROM_DEVICE); 4094f5860992SSakthivel K err_out: 4095f5860992SSakthivel K dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1, 4096f73bdebdSChristoph Hellwig DMA_TO_DEVICE); 4097f5860992SSakthivel K return rc; 4098f5860992SSakthivel K } 4099f5860992SSakthivel K 4100f5860992SSakthivel K static int check_enc_sas_cmd(struct sas_task *task) 4101f5860992SSakthivel K { 4102e73823f7SJames Bottomley u8 cmd = task->ssp_task.cmd->cmnd[0]; 4103e73823f7SJames Bottomley 4104e73823f7SJames Bottomley if (cmd == READ_10 || cmd == WRITE_10 || cmd == WRITE_VERIFY) 4105f5860992SSakthivel K return 1; 4106f5860992SSakthivel K else 4107f5860992SSakthivel K return 0; 4108f5860992SSakthivel K } 4109f5860992SSakthivel K 4110f5860992SSakthivel K static int check_enc_sat_cmd(struct sas_task *task) 4111f5860992SSakthivel K { 4112f5860992SSakthivel K int ret = 0; 4113f5860992SSakthivel K switch (task->ata_task.fis.command) { 4114f5860992SSakthivel K case ATA_CMD_FPDMA_READ: 4115f5860992SSakthivel K case ATA_CMD_READ_EXT: 4116f5860992SSakthivel K case ATA_CMD_READ: 4117f5860992SSakthivel K case ATA_CMD_FPDMA_WRITE: 4118f5860992SSakthivel K case ATA_CMD_WRITE_EXT: 4119f5860992SSakthivel K case ATA_CMD_WRITE: 4120f5860992SSakthivel K case ATA_CMD_PIO_READ: 4121f5860992SSakthivel K case ATA_CMD_PIO_READ_EXT: 4122f5860992SSakthivel K case ATA_CMD_PIO_WRITE: 4123f5860992SSakthivel K case ATA_CMD_PIO_WRITE_EXT: 4124f5860992SSakthivel K ret = 1; 4125f5860992SSakthivel K break; 4126f5860992SSakthivel K default: 4127f5860992SSakthivel K ret = 0; 4128f5860992SSakthivel K break; 4129f5860992SSakthivel K } 4130f5860992SSakthivel K return ret; 4131f5860992SSakthivel K } 4132f5860992SSakthivel K 4133f5860992SSakthivel K /** 4134f5860992SSakthivel K * pm80xx_chip_ssp_io_req - send a SSP task to FW 4135f5860992SSakthivel K * @pm8001_ha: our hba card information. 4136f5860992SSakthivel K * @ccb: the ccb information this request used. 4137f5860992SSakthivel K */ 4138f5860992SSakthivel K static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, 4139f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4140f5860992SSakthivel K { 4141f5860992SSakthivel K struct sas_task *task = ccb->task; 4142f5860992SSakthivel K struct domain_device *dev = task->dev; 4143f5860992SSakthivel K struct pm8001_device *pm8001_dev = dev->lldd_dev; 4144f5860992SSakthivel K struct ssp_ini_io_start_req ssp_cmd; 4145f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4146f5860992SSakthivel K int ret; 41470ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 41480ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4149f5860992SSakthivel K struct inbound_queue_table *circularQ; 4150f9cd6cbdSAnand Kumar Santhanam u32 q_index; 4151f5860992SSakthivel K u32 opc = OPC_INB_SSPINIIOSTART; 4152f5860992SSakthivel K memset(&ssp_cmd, 0, sizeof(ssp_cmd)); 4153f5860992SSakthivel K memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); 4154f5860992SSakthivel K /* data address domain added for spcv; set to 0 by host, 4155f5860992SSakthivel K * used internally by controller 4156f5860992SSakthivel K * 0 for SAS 1.1 and SAS 2.0 compatible TLR 4157f5860992SSakthivel K */ 4158f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = 4159f5860992SSakthivel K cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0); 4160f5860992SSakthivel K ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4161f5860992SSakthivel K ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); 4162f5860992SSakthivel K ssp_cmd.tag = cpu_to_le32(tag); 4163f5860992SSakthivel K if (task->ssp_task.enable_first_burst) 4164f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= 0x80; 4165f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_prio << 3); 4166f5860992SSakthivel K ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_attr & 7); 4167e73823f7SJames Bottomley memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd, 4168e73823f7SJames Bottomley task->ssp_task.cmd->cmd_len); 4169f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM; 4170f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4171f5860992SSakthivel K 4172f5860992SSakthivel K /* Check if encryption is set */ 4173f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4174f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sas_cmd(task)) { 4175f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4176f5860992SSakthivel K "Encryption enabled.Sending Encrypt SAS command 0x%x\n", 4177e73823f7SJames Bottomley task->ssp_task.cmd->cmnd[0])); 4178f5860992SSakthivel K opc = OPC_INB_SSP_INI_DIF_ENC_IO; 4179f5860992SSakthivel K /* enable encryption. 0 for SAS 1.1 and SAS 2.0 compatible TLR*/ 4180f5860992SSakthivel K ssp_cmd.dad_dir_m_tlr = cpu_to_le32 4181f5860992SSakthivel K ((data_dir_flags[task->data_dir] << 8) | 0x20 | 0x0); 4182f5860992SSakthivel K 4183f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4184f5860992SSakthivel K if (task->num_scatter > 1) { 4185f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4186f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 4187f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4188f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4189f5860992SSakthivel K ssp_cmd.enc_addr_low = 4190f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4191f5860992SSakthivel K ssp_cmd.enc_addr_high = 4192f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4193f5860992SSakthivel K ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 4194f5860992SSakthivel K } else if (task->num_scatter == 1) { 4195f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4196f5860992SSakthivel K ssp_cmd.enc_addr_low = 4197f5860992SSakthivel K cpu_to_le32(lower_32_bits(dma_addr)); 4198f5860992SSakthivel K ssp_cmd.enc_addr_high = 4199f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4200f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4201f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 42020ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 42030ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 42040ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.enc_len) - 1; 42050ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 42060ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 42070ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.enc_addr_high) { 42080ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 42090ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 42100ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x " 42110ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low=" 42120ecdf00bSAnand Kumar Santhanam "0x%08x has crossed 4G boundary\n", 42130ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.enc_len, 42140ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 42150ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 42160ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 42170ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 42180ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 42190ecdf00bSAnand Kumar Santhanam buf_prd[0]); 42200ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_low = 42210ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 42220ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_addr_high = 42230ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 42240ecdf00bSAnand Kumar Santhanam ssp_cmd.enc_esgl = cpu_to_le32(1<<31); 42250ecdf00bSAnand Kumar Santhanam } 4226f5860992SSakthivel K } else if (task->num_scatter == 0) { 4227f5860992SSakthivel K ssp_cmd.enc_addr_low = 0; 4228f5860992SSakthivel K ssp_cmd.enc_addr_high = 0; 4229f5860992SSakthivel K ssp_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4230f5860992SSakthivel K ssp_cmd.enc_esgl = 0; 4231f5860992SSakthivel K } 4232f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4233f5860992SSakthivel K ssp_cmd.key_cmode = 0x6 << 4; 4234f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4235e73823f7SJames Bottomley ssp_cmd.twk_val0 = cpu_to_le32((task->ssp_task.cmd->cmnd[2] << 24) | 4236e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[3] << 16) | 4237e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[4] << 8) | 4238e73823f7SJames Bottomley (task->ssp_task.cmd->cmnd[5])); 4239f5860992SSakthivel K } else { 4240f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4241f5860992SSakthivel K "Sending Normal SAS command 0x%x inb q %x\n", 4242f9cd6cbdSAnand Kumar Santhanam task->ssp_task.cmd->cmnd[0], q_index)); 4243f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4244f5860992SSakthivel K if (task->num_scatter > 1) { 4245f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, ccb->n_elem, 4246f5860992SSakthivel K ccb->buf_prd); 4247f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4248f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4249f5860992SSakthivel K ssp_cmd.addr_low = 4250f5860992SSakthivel K cpu_to_le32(lower_32_bits(phys_addr)); 4251f5860992SSakthivel K ssp_cmd.addr_high = 4252f5860992SSakthivel K cpu_to_le32(upper_32_bits(phys_addr)); 4253f5860992SSakthivel K ssp_cmd.esgl = cpu_to_le32(1<<31); 4254f5860992SSakthivel K } else if (task->num_scatter == 1) { 4255f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4256f5860992SSakthivel K ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(dma_addr)); 4257f5860992SSakthivel K ssp_cmd.addr_high = 4258f5860992SSakthivel K cpu_to_le32(upper_32_bits(dma_addr)); 4259f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4260f5860992SSakthivel K ssp_cmd.esgl = 0; 42610ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 42620ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 42630ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + ssp_cmd.len) - 1; 42640ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 42650ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 42660ecdf00bSAnand Kumar Santhanam if (end_addr_high != ssp_cmd.addr_high) { 42670ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 42680ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 42690ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x " 42700ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low=" 42710ecdf00bSAnand Kumar Santhanam "0x%08x has crossed 4G boundary\n", 42720ecdf00bSAnand Kumar Santhanam start_addr, ssp_cmd.len, 42730ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 42740ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 42750ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 42760ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 42770ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 42780ecdf00bSAnand Kumar Santhanam buf_prd[0]); 42790ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_low = 42800ecdf00bSAnand Kumar Santhanam cpu_to_le32(lower_32_bits(phys_addr)); 42810ecdf00bSAnand Kumar Santhanam ssp_cmd.addr_high = 42820ecdf00bSAnand Kumar Santhanam cpu_to_le32(upper_32_bits(phys_addr)); 42830ecdf00bSAnand Kumar Santhanam ssp_cmd.esgl = cpu_to_le32(1<<31); 42840ecdf00bSAnand Kumar Santhanam } 4285f5860992SSakthivel K } else if (task->num_scatter == 0) { 4286f5860992SSakthivel K ssp_cmd.addr_low = 0; 4287f5860992SSakthivel K ssp_cmd.addr_high = 0; 4288f5860992SSakthivel K ssp_cmd.len = cpu_to_le32(task->total_xfer_len); 4289f5860992SSakthivel K ssp_cmd.esgl = 0; 4290f5860992SSakthivel K } 4291f5860992SSakthivel K } 4292f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM; 4293f9cd6cbdSAnand Kumar Santhanam ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 4294f9cd6cbdSAnand Kumar Santhanam &ssp_cmd, q_index); 4295f5860992SSakthivel K return ret; 4296f5860992SSakthivel K } 4297f5860992SSakthivel K 4298f5860992SSakthivel K static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, 4299f5860992SSakthivel K struct pm8001_ccb_info *ccb) 4300f5860992SSakthivel K { 4301f5860992SSakthivel K struct sas_task *task = ccb->task; 4302f5860992SSakthivel K struct domain_device *dev = task->dev; 4303f5860992SSakthivel K struct pm8001_device *pm8001_ha_dev = dev->lldd_dev; 4304f5860992SSakthivel K u32 tag = ccb->ccb_tag; 4305f5860992SSakthivel K int ret; 4306f9cd6cbdSAnand Kumar Santhanam u32 q_index; 4307f5860992SSakthivel K struct sata_start_req sata_cmd; 4308f5860992SSakthivel K u32 hdr_tag, ncg_tag = 0; 43090ecdf00bSAnand Kumar Santhanam u64 phys_addr, start_addr, end_addr; 43100ecdf00bSAnand Kumar Santhanam u32 end_addr_high, end_addr_low; 4311f5860992SSakthivel K u32 ATAP = 0x0; 4312f5860992SSakthivel K u32 dir; 4313f5860992SSakthivel K struct inbound_queue_table *circularQ; 4314c6b9ef57SSakthivel K unsigned long flags; 4315f5860992SSakthivel K u32 opc = OPC_INB_SATA_HOST_OPSTART; 4316f5860992SSakthivel K memset(&sata_cmd, 0, sizeof(sata_cmd)); 4317f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM; 4318f9cd6cbdSAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; 4319f5860992SSakthivel K 4320f73bdebdSChristoph Hellwig if (task->data_dir == DMA_NONE) { 4321f5860992SSakthivel K ATAP = 0x04; /* no data*/ 4322f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("no data\n")); 4323f5860992SSakthivel K } else if (likely(!task->ata_task.device_control_reg_update)) { 4324f5860992SSakthivel K if (task->ata_task.dma_xfer) { 4325f5860992SSakthivel K ATAP = 0x06; /* DMA */ 4326f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("DMA\n")); 4327f5860992SSakthivel K } else { 4328f5860992SSakthivel K ATAP = 0x05; /* PIO*/ 4329f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("PIO\n")); 4330f5860992SSakthivel K } 4331f5860992SSakthivel K if (task->ata_task.use_ncq && 43321cbd772dSHannes Reinecke dev->sata_dev.class != ATA_DEV_ATAPI) { 4333f5860992SSakthivel K ATAP = 0x07; /* FPDMA */ 4334f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk("FPDMA\n")); 4335f5860992SSakthivel K } 4336f5860992SSakthivel K } 4337c6b9ef57SSakthivel K if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) { 4338c6b9ef57SSakthivel K task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 4339f5860992SSakthivel K ncg_tag = hdr_tag; 4340c6b9ef57SSakthivel K } 4341f5860992SSakthivel K dir = data_dir_flags[task->data_dir] << 8; 4342f5860992SSakthivel K sata_cmd.tag = cpu_to_le32(tag); 4343f5860992SSakthivel K sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 4344f5860992SSakthivel K sata_cmd.data_len = cpu_to_le32(task->total_xfer_len); 4345f5860992SSakthivel K 4346f5860992SSakthivel K sata_cmd.sata_fis = task->ata_task.fis; 4347f5860992SSakthivel K if (likely(!task->ata_task.device_control_reg_update)) 4348f5860992SSakthivel K sata_cmd.sata_fis.flags |= 0x80;/* C=1: update ATA cmd reg */ 4349f5860992SSakthivel K sata_cmd.sata_fis.flags &= 0xF0;/* PM_PORT field shall be 0 */ 4350f5860992SSakthivel K 4351f5860992SSakthivel K /* Check if encryption is set */ 4352f5860992SSakthivel K if (pm8001_ha->chip->encrypt && 4353f5860992SSakthivel K !(pm8001_ha->encrypt_info.status) && check_enc_sat_cmd(task)) { 4354f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4355f5860992SSakthivel K "Encryption enabled.Sending Encrypt SATA cmd 0x%x\n", 4356f5860992SSakthivel K sata_cmd.sata_fis.command)); 4357f5860992SSakthivel K opc = OPC_INB_SATA_DIF_ENC_IO; 4358f5860992SSakthivel K 4359f5860992SSakthivel K /* set encryption bit */ 4360f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4361f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16)| 4362f5860992SSakthivel K ((ATAP & 0x3f) << 10) | 0x20 | dir); 4363f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4364f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4365f5860992SSakthivel K if (task->num_scatter > 1) { 4366f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4367f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 4368f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4369f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4370f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(phys_addr); 4371f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(phys_addr); 4372f5860992SSakthivel K sata_cmd.enc_esgl = cpu_to_le32(1 << 31); 4373f5860992SSakthivel K } else if (task->num_scatter == 1) { 4374f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4375f5860992SSakthivel K sata_cmd.enc_addr_low = lower_32_bits(dma_addr); 4376f5860992SSakthivel K sata_cmd.enc_addr_high = upper_32_bits(dma_addr); 4377f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4378f5860992SSakthivel K sata_cmd.enc_esgl = 0; 43790ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 43800ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 43810ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.enc_len) - 1; 43820ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 43830ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 43840ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.enc_addr_high) { 43850ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 43860ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 43870ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x " 43880ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low" 43890ecdf00bSAnand Kumar Santhanam "=0x%08x has crossed 4G boundary\n", 43900ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.enc_len, 43910ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 43920ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 43930ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 43940ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 43950ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 43960ecdf00bSAnand Kumar Santhanam buf_prd[0]); 43970ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_low = 43980ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 43990ecdf00bSAnand Kumar Santhanam sata_cmd.enc_addr_high = 44000ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 44010ecdf00bSAnand Kumar Santhanam sata_cmd.enc_esgl = 44020ecdf00bSAnand Kumar Santhanam cpu_to_le32(1 << 31); 44030ecdf00bSAnand Kumar Santhanam } 4404f5860992SSakthivel K } else if (task->num_scatter == 0) { 4405f5860992SSakthivel K sata_cmd.enc_addr_low = 0; 4406f5860992SSakthivel K sata_cmd.enc_addr_high = 0; 4407f5860992SSakthivel K sata_cmd.enc_len = cpu_to_le32(task->total_xfer_len); 4408f5860992SSakthivel K sata_cmd.enc_esgl = 0; 4409f5860992SSakthivel K } 4410f5860992SSakthivel K /* XTS mode. All other fields are 0 */ 4411f5860992SSakthivel K sata_cmd.key_index_mode = 0x6 << 4; 4412f5860992SSakthivel K /* set tweak values. Should be the start lba */ 4413f5860992SSakthivel K sata_cmd.twk_val0 = 4414f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbal_exp << 24) | 4415f5860992SSakthivel K (sata_cmd.sata_fis.lbah << 16) | 4416f5860992SSakthivel K (sata_cmd.sata_fis.lbam << 8) | 4417f5860992SSakthivel K (sata_cmd.sata_fis.lbal)); 4418f5860992SSakthivel K sata_cmd.twk_val1 = 4419f5860992SSakthivel K cpu_to_le32((sata_cmd.sata_fis.lbah_exp << 8) | 4420f5860992SSakthivel K (sata_cmd.sata_fis.lbam_exp)); 4421f5860992SSakthivel K } else { 4422f5860992SSakthivel K PM8001_IO_DBG(pm8001_ha, pm8001_printk( 4423f5860992SSakthivel K "Sending Normal SATA command 0x%x inb %x\n", 4424f9cd6cbdSAnand Kumar Santhanam sata_cmd.sata_fis.command, q_index)); 4425f5860992SSakthivel K /* dad (bit 0-1) is 0 */ 4426f5860992SSakthivel K sata_cmd.ncqtag_atap_dir_m_dad = 4427f5860992SSakthivel K cpu_to_le32(((ncg_tag & 0xff)<<16) | 4428f5860992SSakthivel K ((ATAP & 0x3f) << 10) | dir); 4429f5860992SSakthivel K 4430f5860992SSakthivel K /* fill in PRD (scatter/gather) table, if any */ 4431f5860992SSakthivel K if (task->num_scatter > 1) { 4432f5860992SSakthivel K pm8001_chip_make_sg(task->scatter, 4433f5860992SSakthivel K ccb->n_elem, ccb->buf_prd); 4434f5860992SSakthivel K phys_addr = ccb->ccb_dma_handle + 4435f5860992SSakthivel K offsetof(struct pm8001_ccb_info, buf_prd[0]); 4436f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(phys_addr); 4437f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(phys_addr); 4438f5860992SSakthivel K sata_cmd.esgl = cpu_to_le32(1 << 31); 4439f5860992SSakthivel K } else if (task->num_scatter == 1) { 4440f5860992SSakthivel K u64 dma_addr = sg_dma_address(task->scatter); 4441f5860992SSakthivel K sata_cmd.addr_low = lower_32_bits(dma_addr); 4442f5860992SSakthivel K sata_cmd.addr_high = upper_32_bits(dma_addr); 4443f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4444f5860992SSakthivel K sata_cmd.esgl = 0; 44450ecdf00bSAnand Kumar Santhanam /* Check 4G Boundary */ 44460ecdf00bSAnand Kumar Santhanam start_addr = cpu_to_le64(dma_addr); 44470ecdf00bSAnand Kumar Santhanam end_addr = (start_addr + sata_cmd.len) - 1; 44480ecdf00bSAnand Kumar Santhanam end_addr_low = cpu_to_le32(lower_32_bits(end_addr)); 44490ecdf00bSAnand Kumar Santhanam end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); 44500ecdf00bSAnand Kumar Santhanam if (end_addr_high != sata_cmd.addr_high) { 44510ecdf00bSAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, 44520ecdf00bSAnand Kumar Santhanam pm8001_printk("The sg list address " 44530ecdf00bSAnand Kumar Santhanam "start_addr=0x%016llx data_len=0x%x" 44540ecdf00bSAnand Kumar Santhanam "end_addr_high=0x%08x end_addr_low=" 44550ecdf00bSAnand Kumar Santhanam "0x%08x has crossed 4G boundary\n", 44560ecdf00bSAnand Kumar Santhanam start_addr, sata_cmd.len, 44570ecdf00bSAnand Kumar Santhanam end_addr_high, end_addr_low)); 44580ecdf00bSAnand Kumar Santhanam pm8001_chip_make_sg(task->scatter, 1, 44590ecdf00bSAnand Kumar Santhanam ccb->buf_prd); 44600ecdf00bSAnand Kumar Santhanam phys_addr = ccb->ccb_dma_handle + 44610ecdf00bSAnand Kumar Santhanam offsetof(struct pm8001_ccb_info, 44620ecdf00bSAnand Kumar Santhanam buf_prd[0]); 44630ecdf00bSAnand Kumar Santhanam sata_cmd.addr_low = 44640ecdf00bSAnand Kumar Santhanam lower_32_bits(phys_addr); 44650ecdf00bSAnand Kumar Santhanam sata_cmd.addr_high = 44660ecdf00bSAnand Kumar Santhanam upper_32_bits(phys_addr); 44670ecdf00bSAnand Kumar Santhanam sata_cmd.esgl = cpu_to_le32(1 << 31); 44680ecdf00bSAnand Kumar Santhanam } 4469f5860992SSakthivel K } else if (task->num_scatter == 0) { 4470f5860992SSakthivel K sata_cmd.addr_low = 0; 4471f5860992SSakthivel K sata_cmd.addr_high = 0; 4472f5860992SSakthivel K sata_cmd.len = cpu_to_le32(task->total_xfer_len); 4473f5860992SSakthivel K sata_cmd.esgl = 0; 4474f5860992SSakthivel K } 4475f5860992SSakthivel K /* scsi cdb */ 4476f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[0] = 4477f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[0]) | 4478f5860992SSakthivel K (task->ata_task.atapi_packet[1] << 8) | 4479f5860992SSakthivel K (task->ata_task.atapi_packet[2] << 16) | 4480f5860992SSakthivel K (task->ata_task.atapi_packet[3] << 24))); 4481f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[1] = 4482f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[4]) | 4483f5860992SSakthivel K (task->ata_task.atapi_packet[5] << 8) | 4484f5860992SSakthivel K (task->ata_task.atapi_packet[6] << 16) | 4485f5860992SSakthivel K (task->ata_task.atapi_packet[7] << 24))); 4486f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[2] = 4487f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[8]) | 4488f5860992SSakthivel K (task->ata_task.atapi_packet[9] << 8) | 4489f5860992SSakthivel K (task->ata_task.atapi_packet[10] << 16) | 4490f5860992SSakthivel K (task->ata_task.atapi_packet[11] << 24))); 4491f5860992SSakthivel K sata_cmd.atapi_scsi_cdb[3] = 4492f5860992SSakthivel K cpu_to_le32(((task->ata_task.atapi_packet[12]) | 4493f5860992SSakthivel K (task->ata_task.atapi_packet[13] << 8) | 4494f5860992SSakthivel K (task->ata_task.atapi_packet[14] << 16) | 4495f5860992SSakthivel K (task->ata_task.atapi_packet[15] << 24))); 4496f5860992SSakthivel K } 4497c6b9ef57SSakthivel K 4498c6b9ef57SSakthivel K /* Check for read log for failed drive and return */ 4499c6b9ef57SSakthivel K if (sata_cmd.sata_fis.command == 0x2f) { 4500c6b9ef57SSakthivel K if (pm8001_ha_dev && ((pm8001_ha_dev->id & NCQ_READ_LOG_FLAG) || 4501c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_ABORT_ALL_FLAG) || 4502c6b9ef57SSakthivel K (pm8001_ha_dev->id & NCQ_2ND_RLE_FLAG))) { 4503c6b9ef57SSakthivel K struct task_status_struct *ts; 4504c6b9ef57SSakthivel K 4505c6b9ef57SSakthivel K pm8001_ha_dev->id &= 0xDFFFFFFF; 4506c6b9ef57SSakthivel K ts = &task->task_status; 4507c6b9ef57SSakthivel K 4508c6b9ef57SSakthivel K spin_lock_irqsave(&task->task_state_lock, flags); 4509c6b9ef57SSakthivel K ts->resp = SAS_TASK_COMPLETE; 4510c6b9ef57SSakthivel K ts->stat = SAM_STAT_GOOD; 4511c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_STATE_PENDING; 4512c6b9ef57SSakthivel K task->task_state_flags &= ~SAS_TASK_AT_INITIATOR; 4513c6b9ef57SSakthivel K task->task_state_flags |= SAS_TASK_STATE_DONE; 4514c6b9ef57SSakthivel K if (unlikely((task->task_state_flags & 4515c6b9ef57SSakthivel K SAS_TASK_STATE_ABORTED))) { 4516c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4517c6b9ef57SSakthivel K flags); 4518c6b9ef57SSakthivel K PM8001_FAIL_DBG(pm8001_ha, 4519c6b9ef57SSakthivel K pm8001_printk("task 0x%p resp 0x%x " 4520c6b9ef57SSakthivel K " stat 0x%x but aborted by upper layer " 4521c6b9ef57SSakthivel K "\n", task, ts->resp, ts->stat)); 4522c6b9ef57SSakthivel K pm8001_ccb_task_free(pm8001_ha, task, ccb, tag); 4523c6b9ef57SSakthivel K return 0; 45242b01d816SSuresh Thiagarajan } else { 4525c6b9ef57SSakthivel K spin_unlock_irqrestore(&task->task_state_lock, 4526c6b9ef57SSakthivel K flags); 45272b01d816SSuresh Thiagarajan pm8001_ccb_task_free_done(pm8001_ha, task, 45282b01d816SSuresh Thiagarajan ccb, tag); 4529c6b9ef57SSakthivel K return 0; 4530c6b9ef57SSakthivel K } 4531c6b9ef57SSakthivel K } 4532c6b9ef57SSakthivel K } 4533f9cd6cbdSAnand Kumar Santhanam q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM; 4534f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, 4535f9cd6cbdSAnand Kumar Santhanam &sata_cmd, q_index); 4536f5860992SSakthivel K return ret; 4537f5860992SSakthivel K } 4538f5860992SSakthivel K 4539f5860992SSakthivel K /** 4540f5860992SSakthivel K * pm80xx_chip_phy_start_req - start phy via PHY_START COMMAND 4541f5860992SSakthivel K * @pm8001_ha: our hba card information. 4542f5860992SSakthivel K * @num: the inbound queue number 4543f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4544f5860992SSakthivel K */ 4545f5860992SSakthivel K static int 4546f5860992SSakthivel K pm80xx_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) 4547f5860992SSakthivel K { 4548f5860992SSakthivel K struct phy_start_req payload; 4549f5860992SSakthivel K struct inbound_queue_table *circularQ; 4550f5860992SSakthivel K int ret; 4551f5860992SSakthivel K u32 tag = 0x01; 4552f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTART; 4553f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4554f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4555f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4556f5860992SSakthivel K 4557f5860992SSakthivel K PM8001_INIT_DBG(pm8001_ha, 4558f5860992SSakthivel K pm8001_printk("PHY START REQ for phy_id %d\n", phy_id)); 4559f5860992SSakthivel K /* 4560f5860992SSakthivel K ** [0:7] PHY Identifier 4561f5860992SSakthivel K ** [8:11] link rate 1.5G, 3G, 6G 4562f5860992SSakthivel K ** [12:13] link mode 01b SAS mode; 10b SATA mode; 11b Auto mode 4563f5860992SSakthivel K ** [14] 0b disable spin up hold; 1b enable spin up hold 4564f5860992SSakthivel K ** [15] ob no change in current PHY analig setup 1b enable using SPAST 4565f5860992SSakthivel K */ 4566a9a923e5SAnand Kumar Santhanam if (!IS_SPCV_12G(pm8001_ha->pdev)) 4567f5860992SSakthivel K payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE | 4568f5860992SSakthivel K LINKMODE_AUTO | LINKRATE_15 | 4569f5860992SSakthivel K LINKRATE_30 | LINKRATE_60 | phy_id); 4570a9a923e5SAnand Kumar Santhanam else 4571a9a923e5SAnand Kumar Santhanam payload.ase_sh_lm_slr_phyid = cpu_to_le32(SPINHOLD_DISABLE | 4572a9a923e5SAnand Kumar Santhanam LINKMODE_AUTO | LINKRATE_15 | 4573a9a923e5SAnand Kumar Santhanam LINKRATE_30 | LINKRATE_60 | LINKRATE_120 | 4574a9a923e5SAnand Kumar Santhanam phy_id); 4575a9a923e5SAnand Kumar Santhanam 4576f5860992SSakthivel K /* SSC Disable and SAS Analog ST configuration */ 4577f5860992SSakthivel K /** 4578f5860992SSakthivel K payload.ase_sh_lm_slr_phyid = 4579f5860992SSakthivel K cpu_to_le32(SSC_DISABLE_30 | SAS_ASE | SPINHOLD_DISABLE | 4580f5860992SSakthivel K LINKMODE_AUTO | LINKRATE_15 | LINKRATE_30 | LINKRATE_60 | 4581f5860992SSakthivel K phy_id); 4582f5860992SSakthivel K Have to add "SAS PHY Analog Setup SPASTI 1 Byte" Based on need 4583f5860992SSakthivel K **/ 4584f5860992SSakthivel K 4585aa9f8328SJames Bottomley payload.sas_identify.dev_type = SAS_END_DEVICE; 4586f5860992SSakthivel K payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL; 4587f5860992SSakthivel K memcpy(payload.sas_identify.sas_addr, 45886c85e4bcSViswas G &pm8001_ha->phy[phy_id].dev_sas_addr, SAS_ADDR_SIZE); 4589f5860992SSakthivel K payload.sas_identify.phy_id = phy_id; 4590f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 0); 4591f5860992SSakthivel K return ret; 4592f5860992SSakthivel K } 4593f5860992SSakthivel K 4594f5860992SSakthivel K /** 4595f5860992SSakthivel K * pm8001_chip_phy_stop_req - start phy via PHY_STOP COMMAND 4596f5860992SSakthivel K * @pm8001_ha: our hba card information. 4597f5860992SSakthivel K * @num: the inbound queue number 4598f5860992SSakthivel K * @phy_id: the phy id which we wanted to start up. 4599f5860992SSakthivel K */ 4600f5860992SSakthivel K static int pm80xx_chip_phy_stop_req(struct pm8001_hba_info *pm8001_ha, 4601f5860992SSakthivel K u8 phy_id) 4602f5860992SSakthivel K { 4603f5860992SSakthivel K struct phy_stop_req payload; 4604f5860992SSakthivel K struct inbound_queue_table *circularQ; 4605f5860992SSakthivel K int ret; 4606f5860992SSakthivel K u32 tag = 0x01; 4607f5860992SSakthivel K u32 opcode = OPC_INB_PHYSTOP; 4608f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4609f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4610f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4611f5860992SSakthivel K payload.phy_id = cpu_to_le32(phy_id); 4612f5860992SSakthivel K ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opcode, &payload, 0); 4613f5860992SSakthivel K return ret; 4614f5860992SSakthivel K } 4615f5860992SSakthivel K 4616f5860992SSakthivel K /** 4617f5860992SSakthivel K * see comments on pm8001_mpi_reg_resp. 4618f5860992SSakthivel K */ 4619f5860992SSakthivel K static int pm80xx_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha, 4620f5860992SSakthivel K struct pm8001_device *pm8001_dev, u32 flag) 4621f5860992SSakthivel K { 4622f5860992SSakthivel K struct reg_dev_req payload; 4623f5860992SSakthivel K u32 opc; 4624f5860992SSakthivel K u32 stp_sspsmp_sata = 0x4; 4625f5860992SSakthivel K struct inbound_queue_table *circularQ; 4626f5860992SSakthivel K u32 linkrate, phy_id; 4627f5860992SSakthivel K int rc, tag = 0xdeadbeef; 4628f5860992SSakthivel K struct pm8001_ccb_info *ccb; 4629f5860992SSakthivel K u8 retryFlag = 0x1; 4630f5860992SSakthivel K u16 firstBurstSize = 0; 4631f5860992SSakthivel K u16 ITNT = 2000; 4632f5860992SSakthivel K struct domain_device *dev = pm8001_dev->sas_device; 4633f5860992SSakthivel K struct domain_device *parent_dev = dev->parent; 4634f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4635f5860992SSakthivel K 4636f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 4637f5860992SSakthivel K rc = pm8001_tag_alloc(pm8001_ha, &tag); 4638f5860992SSakthivel K if (rc) 4639f5860992SSakthivel K return rc; 4640f5860992SSakthivel K ccb = &pm8001_ha->ccb_info[tag]; 4641f5860992SSakthivel K ccb->device = pm8001_dev; 4642f5860992SSakthivel K ccb->ccb_tag = tag; 4643f5860992SSakthivel K payload.tag = cpu_to_le32(tag); 4644f5860992SSakthivel K 4645f5860992SSakthivel K if (flag == 1) { 4646f5860992SSakthivel K stp_sspsmp_sata = 0x02; /*direct attached sata */ 4647f5860992SSakthivel K } else { 4648aa9f8328SJames Bottomley if (pm8001_dev->dev_type == SAS_SATA_DEV) 4649f5860992SSakthivel K stp_sspsmp_sata = 0x00; /* stp*/ 4650aa9f8328SJames Bottomley else if (pm8001_dev->dev_type == SAS_END_DEVICE || 4651aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_EDGE_EXPANDER_DEVICE || 4652aa9f8328SJames Bottomley pm8001_dev->dev_type == SAS_FANOUT_EXPANDER_DEVICE) 4653f5860992SSakthivel K stp_sspsmp_sata = 0x01; /*ssp or smp*/ 4654f5860992SSakthivel K } 4655924a3541SJohn Garry if (parent_dev && dev_is_expander(parent_dev->dev_type)) 4656f5860992SSakthivel K phy_id = parent_dev->ex_dev.ex_phy->phy_id; 4657f5860992SSakthivel K else 4658f5860992SSakthivel K phy_id = pm8001_dev->attached_phy; 4659f5860992SSakthivel K 4660f5860992SSakthivel K opc = OPC_INB_REG_DEV; 4661f5860992SSakthivel K 4662f5860992SSakthivel K linkrate = (pm8001_dev->sas_device->linkrate < dev->port->linkrate) ? 4663f5860992SSakthivel K pm8001_dev->sas_device->linkrate : dev->port->linkrate; 4664f5860992SSakthivel K 4665f5860992SSakthivel K payload.phyid_portid = 4666f5860992SSakthivel K cpu_to_le32(((pm8001_dev->sas_device->port->id) & 0xFF) | 4667f5860992SSakthivel K ((phy_id & 0xFF) << 8)); 4668f5860992SSakthivel K 4669f5860992SSakthivel K payload.dtype_dlr_mcn_ir_retry = cpu_to_le32((retryFlag & 0x01) | 4670f5860992SSakthivel K ((linkrate & 0x0F) << 24) | 4671f5860992SSakthivel K ((stp_sspsmp_sata & 0x03) << 28)); 4672f5860992SSakthivel K payload.firstburstsize_ITNexustimeout = 4673f5860992SSakthivel K cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); 4674f5860992SSakthivel K 4675f5860992SSakthivel K memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr, 4676f5860992SSakthivel K SAS_ADDR_SIZE); 4677f5860992SSakthivel K 4678f5860992SSakthivel K rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 46795533abcaSTomas Henzl if (rc) 46805533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 4681f5860992SSakthivel K 4682f5860992SSakthivel K return rc; 4683f5860992SSakthivel K } 4684f5860992SSakthivel K 4685f5860992SSakthivel K /** 4686f5860992SSakthivel K * pm80xx_chip_phy_ctl_req - support the local phy operation 4687f5860992SSakthivel K * @pm8001_ha: our hba card information. 4688f5860992SSakthivel K * @num: the inbound queue number 4689f5860992SSakthivel K * @phy_id: the phy id which we wanted to operate 4690f5860992SSakthivel K * @phy_op: 4691f5860992SSakthivel K */ 4692f5860992SSakthivel K static int pm80xx_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, 4693f5860992SSakthivel K u32 phyId, u32 phy_op) 4694f5860992SSakthivel K { 469525c6edbdSViswas G u32 tag; 469625c6edbdSViswas G int rc; 4697f5860992SSakthivel K struct local_phy_ctl_req payload; 4698f5860992SSakthivel K struct inbound_queue_table *circularQ; 4699f5860992SSakthivel K u32 opc = OPC_INB_LOCAL_PHY_CONTROL; 4700f5860992SSakthivel K memset(&payload, 0, sizeof(payload)); 470125c6edbdSViswas G rc = pm8001_tag_alloc(pm8001_ha, &tag); 470225c6edbdSViswas G if (rc) 470325c6edbdSViswas G return rc; 4704f5860992SSakthivel K circularQ = &pm8001_ha->inbnd_q_tbl[0]; 470525c6edbdSViswas G payload.tag = cpu_to_le32(tag); 4706f5860992SSakthivel K payload.phyop_phyid = 4707f5860992SSakthivel K cpu_to_le32(((phy_op & 0xFF) << 8) | (phyId & 0xFF)); 470825c6edbdSViswas G return pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 4709f5860992SSakthivel K } 4710f5860992SSakthivel K 4711f310a4eaSColin Ian King static u32 pm80xx_chip_is_our_interrupt(struct pm8001_hba_info *pm8001_ha) 4712f5860992SSakthivel K { 4713f5860992SSakthivel K #ifdef PM8001_USE_MSIX 4714f5860992SSakthivel K return 1; 4715292c04ccSColin Ian King #else 4716292c04ccSColin Ian King u32 value; 4717292c04ccSColin Ian King 4718f5860992SSakthivel K value = pm8001_cr32(pm8001_ha, 0, MSGU_ODR); 4719f5860992SSakthivel K if (value) 4720f5860992SSakthivel K return 1; 4721f5860992SSakthivel K return 0; 4722292c04ccSColin Ian King #endif 4723f5860992SSakthivel K } 4724f5860992SSakthivel K 4725f5860992SSakthivel K /** 4726f5860992SSakthivel K * pm8001_chip_isr - PM8001 isr handler. 4727f5860992SSakthivel K * @pm8001_ha: our hba card information. 4728f5860992SSakthivel K * @irq: irq number. 4729f5860992SSakthivel K * @stat: stat. 4730f5860992SSakthivel K */ 4731f5860992SSakthivel K static irqreturn_t 4732f5860992SSakthivel K pm80xx_chip_isr(struct pm8001_hba_info *pm8001_ha, u8 vec) 4733f5860992SSakthivel K { 4734f5860992SSakthivel K pm80xx_chip_interrupt_disable(pm8001_ha, vec); 47357370672dSpeter chang PM8001_DEVIO_DBG(pm8001_ha, pm8001_printk( 47367370672dSpeter chang "irq vec %d, ODMR:0x%x\n", 47377370672dSpeter chang vec, pm8001_cr32(pm8001_ha, 0, 0x30))); 4738f5860992SSakthivel K process_oq(pm8001_ha, vec); 4739f5860992SSakthivel K pm80xx_chip_interrupt_enable(pm8001_ha, vec); 4740f5860992SSakthivel K return IRQ_HANDLED; 4741f5860992SSakthivel K } 4742f5860992SSakthivel K 474327909407SAnand Kumar Santhanam void mpi_set_phy_profile_req(struct pm8001_hba_info *pm8001_ha, 474427909407SAnand Kumar Santhanam u32 operation, u32 phyid, u32 length, u32 *buf) 474527909407SAnand Kumar Santhanam { 474627909407SAnand Kumar Santhanam u32 tag , i, j = 0; 474727909407SAnand Kumar Santhanam int rc; 474827909407SAnand Kumar Santhanam struct set_phy_profile_req payload; 474927909407SAnand Kumar Santhanam struct inbound_queue_table *circularQ; 475027909407SAnand Kumar Santhanam u32 opc = OPC_INB_SET_PHY_PROFILE; 475127909407SAnand Kumar Santhanam 475227909407SAnand Kumar Santhanam memset(&payload, 0, sizeof(payload)); 475327909407SAnand Kumar Santhanam rc = pm8001_tag_alloc(pm8001_ha, &tag); 475427909407SAnand Kumar Santhanam if (rc) 475527909407SAnand Kumar Santhanam PM8001_FAIL_DBG(pm8001_ha, pm8001_printk("Invalid tag\n")); 475627909407SAnand Kumar Santhanam circularQ = &pm8001_ha->inbnd_q_tbl[0]; 475727909407SAnand Kumar Santhanam payload.tag = cpu_to_le32(tag); 475827909407SAnand Kumar Santhanam payload.ppc_phyid = (((operation & 0xF) << 8) | (phyid & 0xFF)); 475927909407SAnand Kumar Santhanam PM8001_INIT_DBG(pm8001_ha, 476027909407SAnand Kumar Santhanam pm8001_printk(" phy profile command for phy %x ,length is %d\n", 476127909407SAnand Kumar Santhanam payload.ppc_phyid, length)); 476227909407SAnand Kumar Santhanam for (i = length; i < (length + PHY_DWORD_LENGTH - 1); i++) { 476327909407SAnand Kumar Santhanam payload.reserved[j] = cpu_to_le32(*((u32 *)buf + i)); 476427909407SAnand Kumar Santhanam j++; 476527909407SAnand Kumar Santhanam } 47665533abcaSTomas Henzl rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 47675533abcaSTomas Henzl if (rc) 47685533abcaSTomas Henzl pm8001_tag_free(pm8001_ha, tag); 476927909407SAnand Kumar Santhanam } 477027909407SAnand Kumar Santhanam 477127909407SAnand Kumar Santhanam void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha, 477227909407SAnand Kumar Santhanam u32 length, u8 *buf) 477327909407SAnand Kumar Santhanam { 4774fdd0a66bSYueHaibing u32 i; 477527909407SAnand Kumar Santhanam 477627909407SAnand Kumar Santhanam for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 477727909407SAnand Kumar Santhanam mpi_set_phy_profile_req(pm8001_ha, 477827909407SAnand Kumar Santhanam SAS_PHY_ANALOG_SETTINGS_PAGE, i, length, (u32 *)buf); 477927909407SAnand Kumar Santhanam length = length + PHY_DWORD_LENGTH; 478027909407SAnand Kumar Santhanam } 478127909407SAnand Kumar Santhanam PM8001_INIT_DBG(pm8001_ha, pm8001_printk("phy settings completed\n")); 478227909407SAnand Kumar Santhanam } 4783c5614df7SBenjamin Rood 4784c5614df7SBenjamin Rood void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha, 4785c5614df7SBenjamin Rood u32 phy, u32 length, u32 *buf) 4786c5614df7SBenjamin Rood { 4787c5614df7SBenjamin Rood u32 tag, opc; 4788c5614df7SBenjamin Rood int rc, i; 4789c5614df7SBenjamin Rood struct set_phy_profile_req payload; 4790c5614df7SBenjamin Rood struct inbound_queue_table *circularQ; 4791c5614df7SBenjamin Rood 4792c5614df7SBenjamin Rood memset(&payload, 0, sizeof(payload)); 4793c5614df7SBenjamin Rood 4794c5614df7SBenjamin Rood rc = pm8001_tag_alloc(pm8001_ha, &tag); 4795c5614df7SBenjamin Rood if (rc) 4796c5614df7SBenjamin Rood PM8001_INIT_DBG(pm8001_ha, pm8001_printk("Invalid tag")); 4797c5614df7SBenjamin Rood 4798c5614df7SBenjamin Rood circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4799c5614df7SBenjamin Rood opc = OPC_INB_SET_PHY_PROFILE; 4800c5614df7SBenjamin Rood 4801c5614df7SBenjamin Rood payload.tag = cpu_to_le32(tag); 4802c5614df7SBenjamin Rood payload.ppc_phyid = (((SAS_PHY_ANALOG_SETTINGS_PAGE & 0xF) << 8) 4803c5614df7SBenjamin Rood | (phy & 0xFF)); 4804c5614df7SBenjamin Rood 4805c5614df7SBenjamin Rood for (i = 0; i < length; i++) 4806c5614df7SBenjamin Rood payload.reserved[i] = cpu_to_le32(*(buf + i)); 4807c5614df7SBenjamin Rood 4808c5614df7SBenjamin Rood rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &payload, 0); 4809c5614df7SBenjamin Rood if (rc) 4810c5614df7SBenjamin Rood pm8001_tag_free(pm8001_ha, tag); 4811c5614df7SBenjamin Rood 4812c5614df7SBenjamin Rood PM8001_INIT_DBG(pm8001_ha, 4813c5614df7SBenjamin Rood pm8001_printk("PHY %d settings applied", phy)); 4814c5614df7SBenjamin Rood } 4815f5860992SSakthivel K const struct pm8001_dispatch pm8001_80xx_dispatch = { 4816f5860992SSakthivel K .name = "pmc80xx", 4817f5860992SSakthivel K .chip_init = pm80xx_chip_init, 4818f5860992SSakthivel K .chip_soft_rst = pm80xx_chip_soft_rst, 4819f5860992SSakthivel K .chip_rst = pm80xx_hw_chip_rst, 4820f5860992SSakthivel K .chip_iounmap = pm8001_chip_iounmap, 4821f5860992SSakthivel K .isr = pm80xx_chip_isr, 4822f310a4eaSColin Ian King .is_our_interrupt = pm80xx_chip_is_our_interrupt, 4823f5860992SSakthivel K .isr_process_oq = process_oq, 4824f5860992SSakthivel K .interrupt_enable = pm80xx_chip_interrupt_enable, 4825f5860992SSakthivel K .interrupt_disable = pm80xx_chip_interrupt_disable, 4826f5860992SSakthivel K .make_prd = pm8001_chip_make_sg, 4827f5860992SSakthivel K .smp_req = pm80xx_chip_smp_req, 4828f5860992SSakthivel K .ssp_io_req = pm80xx_chip_ssp_io_req, 4829f5860992SSakthivel K .sata_req = pm80xx_chip_sata_req, 4830f5860992SSakthivel K .phy_start_req = pm80xx_chip_phy_start_req, 4831f5860992SSakthivel K .phy_stop_req = pm80xx_chip_phy_stop_req, 4832f5860992SSakthivel K .reg_dev_req = pm80xx_chip_reg_dev_req, 4833f5860992SSakthivel K .dereg_dev_req = pm8001_chip_dereg_dev_req, 4834f5860992SSakthivel K .phy_ctl_req = pm80xx_chip_phy_ctl_req, 4835f5860992SSakthivel K .task_abort = pm8001_chip_abort_task, 4836f5860992SSakthivel K .ssp_tm_req = pm8001_chip_ssp_tm_req, 4837f5860992SSakthivel K .get_nvmd_req = pm8001_chip_get_nvmd_req, 4838f5860992SSakthivel K .set_nvmd_req = pm8001_chip_set_nvmd_req, 4839f5860992SSakthivel K .fw_flash_update_req = pm8001_chip_fw_flash_update_req, 4840f5860992SSakthivel K .set_dev_state_req = pm8001_chip_set_dev_state_req, 4841f5860992SSakthivel K }; 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